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r19072 Tuesday 20th November, 2012 at 18:22:59 UTC by Angelo Salese
(MESS) PC-88VA: Disabled FDC sub-system thru define switch
[src/mess/drivers]pc88va.c

trunk/src/mess/drivers/pc88va.c
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3131#include "formats/pc_dsk.h"
3232#include "formats/xdf_dsk.h"
3333
34/* Note: for the time being, just disable FDC CPU, it's for PC-8801 compatibility mode anyway ... */
35#define TEST_SUBFDC 0
36
3437struct tsp_t
3538{
3639   UINT16 tvram_vreg_offset;
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8992   DECLARE_WRITE16_MEMBER(backupram_wp_0_w);
9093   DECLARE_READ8_MEMBER(hdd_status_r);
9194   DECLARE_WRITE8_MEMBER(upd765_mc_w);
95   #if TEST_SUBFDC
9296   DECLARE_READ8_MEMBER(upd765_tc_r);
97   #else
98   DECLARE_READ8_MEMBER(no_subfdc_r);
99   #endif
93100   DECLARE_READ8_MEMBER(pc88va_fdc_r);
94101   DECLARE_WRITE8_MEMBER(pc88va_fdc_w);
95102   DECLARE_READ16_MEMBER(sysop_r);
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956963   return 0x20;
957964}
958965
966/* TODO: check this */
959967WRITE8_MEMBER(pc88va_state::upd765_mc_w)
960968{
961969   machine().device<floppy_connector>("upd765:0")->get_device()->mon_w(!(data & 1));
962970   machine().device<floppy_connector>("upd765:1")->get_device()->mon_w(!(data & 2));
963971}
964972
965TIMER_CALLBACK_MEMBER(pc88va_state::pc8801fd_upd765_tc_to_zero)
966{
967   machine().device<upd765a_device>("upd765")->tc_w(false);
968}
969
970READ8_MEMBER(pc88va_state::upd765_tc_r)
971{
972   machine().device<upd765a_device>("upd765")->tc_w(true);
973   machine().scheduler().timer_set(attotime::from_usec(50), timer_expired_delegate(FUNC(pc88va_state::pc8801fd_upd765_tc_to_zero),this));
974   return 0;
975}
976
977973READ8_MEMBER(pc88va_state::pc88va_fdc_r)
978974{
979975   printf("%08x\n",offset);
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1001997        */
1002998      case 0x00: // FDC mode register
1003999         m_fdc_mode = data & 1;
1000         #if TEST_SUBFDC
10041001         machine().device("fdccpu")->execute().set_input_line(INPUT_LINE_HALT, (m_fdc_mode) ? ASSERT_LINE : CLEAR_LINE);
1002         #endif
10051003         break;
10061004      /*
10071005        --x- ---- CLK: FDC clock selection (0) 4.8MHz (1) 8 MHz
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10951093   // ...
10961094}
10971095
1096#if !TEST_SUBFDC
1097READ8_MEMBER(pc88va_state::no_subfdc_r)
1098{
1099   return machine().rand();
1100}
1101#endif
1102
10981103static ADDRESS_MAP_START( pc88va_io_map, AS_IO, 16, pc88va_state )
10991104   AM_RANGE(0x0000, 0x000f) AM_READ8(key_r,0xffff) // Keyboard ROW reading
11001105//  AM_RANGE(0x0010, 0x0010) Printer / Calendar Clock Interface
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11181123//  AM_RANGE(0x00e6, 0x00e6) 8214 IRQ mask (*)
11191124//  AM_RANGE(0x00e8, 0x00e9) ? (*)
11201125//  AM_RANGE(0x00ec, 0x00ed) ? (*)
1126   #if TEST_SUBFDC
11211127   AM_RANGE(0x00fc, 0x00ff) AM_DEVREADWRITE8("d8255_2", i8255_device, read, write, 0xffff) // d8255 2, FDD
1128   #else
1129   AM_RANGE(0x00fc, 0x00ff) AM_READ8(no_subfdc_r,0xffff) AM_WRITENOP
1130   #endif
11221131
11231132   AM_RANGE(0x0100, 0x0101) AM_READWRITE(screen_ctrl_r,screen_ctrl_w) // Screen Control Register
11241133//  AM_RANGE(0x0102, 0x0103) Graphic Screen Control Register
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11691178// (*) are specific N88 V1 / V2 ports
11701179
11711180/* FDC subsytem CPU */
1181#if TEST_SUBFDC
11721182static ADDRESS_MAP_START( pc88va_z80_map, AS_PROGRAM, 8, pc88va_state )
11731183   AM_RANGE(0x0000, 0x1fff) AM_ROM
11741184   AM_RANGE(0x4000, 0x7fff) AM_RAM
11751185ADDRESS_MAP_END
11761186
1187TIMER_CALLBACK_MEMBER(pc88va_state::pc8801fd_upd765_tc_to_zero)
1188{
1189   machine().device<upd765a_device>("upd765")->tc_w(false);
1190}
1191
1192READ8_MEMBER(pc88va_state::upd765_tc_r)
1193{
1194   machine().device<upd765a_device>("upd765")->tc_w(true);
1195   machine().scheduler().timer_set(attotime::from_usec(50), timer_expired_delegate(FUNC(pc88va_state::pc8801fd_upd765_tc_to_zero),this));
1196   return 0;
1197}
1198
11771199WRITE8_MEMBER(pc88va_state::fdc_irq_vector_w)
11781200{
11791201   m_fdc_irq_opcode = data;
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11871209   AM_RANGE(0xfa, 0xfb) AM_DEVICE("upd765", upd765a_device, map )
11881210   AM_RANGE(0xfc, 0xff) AM_DEVREADWRITE("d8255_2s", i8255_device, read, write)
11891211ADDRESS_MAP_END
1212#endif
11901213
1191
11921214/* TODO: active low or active high? */
11931215static INPUT_PORTS_START( pc88va )
11941216   PORT_START("KEY0")
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14081430
14091431READ8_MEMBER(pc88va_state::cpu_8255_c_r)
14101432{
1411
14121433   return m_i8255_1_pc >> 4;
14131434}
14141435
14151436WRITE8_MEMBER(pc88va_state::cpu_8255_c_w)
14161437{
1417
14181438   m_i8255_0_pc = data;
14191439}
14201440
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14301450
14311451READ8_MEMBER(pc88va_state::fdc_8255_c_r)
14321452{
1433
14341453   return m_i8255_0_pc >> 4;
14351454}
14361455
14371456WRITE8_MEMBER(pc88va_state::fdc_8255_c_w)
14381457{
1439
14401458   m_i8255_1_pc = data;
14411459}
14421460
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15671585   m_fdc_mode = 0;
15681586   m_fdc_irq_opcode = 0x00; //0x7f ld a,a !
15691587
1588   #if TEST_SUBFDC
15701589   machine().device("fdccpu")->execute().set_input_line_vector(0, 0);
1590   #endif
15711591}
15721592
15731593INTERRUPT_GEN_MEMBER(pc88va_state::pc88va_vrtc_irq)
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16451665   MCFG_CPU_IO_MAP(pc88va_io_map)
16461666   MCFG_CPU_VBLANK_INT_DRIVER("screen", pc88va_state, pc88va_vrtc_irq)
16471667
1668#if TEST_SUBFDC
16481669   MCFG_CPU_ADD("fdccpu", Z80, 8000000)        /* 8 MHz */
16491670   MCFG_CPU_PROGRAM_MAP(pc88va_z80_map)
16501671   MCFG_CPU_IO_MAP(pc88va_z80_io_map)
16511672
16521673   MCFG_QUANTUM_PERFECT_CPU("maincpu")
1674#endif
16531675
16541676   MCFG_SCREEN_ADD("screen", RASTER)
16551677   MCFG_SCREEN_REFRESH_RATE(60)
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16611683//  MCFG_PALETTE_INIT_OVERRIDE(pc88va_state, pc8801 )
16621684   MCFG_GFXDECODE( pc88va )
16631685
1664
1665
16661686   MCFG_I8255_ADD( "d8255_2", master_fdd_intf )
16671687   MCFG_I8255_ADD( "d8255_3", r232c_ctrl_intf )
16681688

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