trunk/src/mame/drivers/namcos23.c
| r18694 | r18695 | |
| 1238 | 1238 | #define S23_HSYNC (16666150) |
| 1239 | 1239 | #define S23_MODECLOCK (130205) |
| 1240 | 1240 | |
| 1241 | | #define MAIN_VBLANK_IRQ 1 |
| 1242 | | #define MAIN_C361_IRQ 2 |
| 1243 | | #define MAIN_SUBCPU_IRQ 4 |
| 1244 | | #define MAIN_C435_IRQ 8 |
| 1245 | | #define MAIN_C422_IRQ 16 |
| 1241 | #define MAIN_VBLANK_IRQ 0x01 |
| 1242 | #define MAIN_C361_IRQ 0x02 |
| 1243 | #define MAIN_SUBCPU_IRQ 0x04 |
| 1244 | #define MAIN_C435_IRQ 0x08 |
| 1245 | #define MAIN_C422_IRQ 0x10 |
| 1246 | #define MAIN_C450_IRQ 0x20 |
| 1247 | #define MAIN_C451_IRQ 0x40 |
| 1246 | 1248 | |
| 1247 | 1249 | enum { MODEL, FLUSH }; |
| 1248 | 1250 | |
| r18694 | r18695 | |
| 1484 | 1486 | // level 5: C422 |
| 1485 | 1487 | if (changed & MAIN_C422_IRQ) |
| 1486 | 1488 | m_maincpu->set_input_line(MIPS3_IRQ3, (cause & MAIN_C422_IRQ) ? ASSERT_LINE : CLEAR_LINE); |
| 1489 | |
| 1490 | // crszone(sys23ev2) has a different configuration, are they hardwired or configured by software? (where?).. |
| 1491 | // level 3: C422/subcpu |
| 1492 | // level 4: vblank |
| 1493 | // level 5: C451/C361 |
| 1494 | // level 6: C450 |
| 1487 | 1495 | } |
| 1488 | 1496 | |
| 1489 | 1497 | static UINT16 nthword( const UINT32 *pSource, int offs ) |
| r18694 | r18695 | |
| 1862 | 1870 | { |
| 1863 | 1871 | switch (offset) |
| 1864 | 1872 | { |
| 1873 | // current raster position |
| 1874 | // how does it work exactly? it's not understood in namcos22 either (also has a c361) |
| 1865 | 1875 | case 5: |
| 1866 | 1876 | update_main_interrupts(m_main_irqcause & ~MAIN_C361_IRQ); |
| 1867 | | return machine().primary_screen->vblank() ? 0x1ff : machine().primary_screen->vpos(); |
| 1877 | return machine().primary_screen->vpos()*2 | (machine().primary_screen->vblank() ? 1 : 0); |
| 1868 | 1878 | case 6: |
| 1869 | 1879 | update_main_interrupts(m_main_irqcause & ~MAIN_C361_IRQ); |
| 1870 | | return machine().primary_screen->vblank() ? ~0 : 0; |
| 1880 | return machine().primary_screen->vblank() ? 1 : 0; |
| 1871 | 1881 | } |
| 1872 | 1882 | |
| 1873 | 1883 | logerror("c361_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)space.device().state().state_int(MIPS3_R31)); |