trunk/src/mess/drivers/ti99_8.c
r18258 | r18259 | |
217 | 217 | #define VERBOSE 0 |
218 | 218 | #define LOG logerror |
219 | 219 | |
220 | | class ti99_8 : public driver_device |
| 220 | class ti99_8_state : public driver_device |
221 | 221 | { |
222 | 222 | public: |
223 | | ti99_8(const machine_config &mconfig, device_type type, const char *tag) |
| 223 | ti99_8_state(const machine_config &mconfig, device_type type, const char *tag) |
224 | 224 | : driver_device(mconfig, type, tag) { } |
225 | 225 | |
226 | 226 | // CRU (Communication Register Unit) handling |
r18258 | r18259 | |
279 | 279 | Memory map. We have a configurable mapper, so we need to delegate the |
280 | 280 | job to the mapper completely. |
281 | 281 | */ |
282 | | static ADDRESS_MAP_START(memmap, AS_PROGRAM, 8, ti99_8) |
| 282 | static ADDRESS_MAP_START(memmap, AS_PROGRAM, 8, ti99_8_state) |
283 | 283 | AM_RANGE(0x0000, 0xffff) AM_DEVREADWRITE(MAPPER_TAG, ti998_mapper_device, readm, writem ) |
284 | 284 | ADDRESS_MAP_END |
285 | 285 | |
r18258 | r18259 | |
290 | 290 | (decoded by the "Vaquerro" chip, signal NNOICS*) |
291 | 291 | */ |
292 | 292 | |
293 | | static ADDRESS_MAP_START(crumap, AS_IO, 8, ti99_8) |
| 293 | static ADDRESS_MAP_START(crumap, AS_IO, 8, ti99_8_state) |
294 | 294 | AM_RANGE(0x0000, 0x0003) AM_DEVREAD(TMS9901_TAG, tms9901_device, read) |
295 | 295 | AM_RANGE(0x0000, 0x02ff) AM_READ(cruread) |
296 | 296 | |
r18258 | r18259 | |
406 | 406 | |
407 | 407 | static GROM_CONFIG(grom0_config) |
408 | 408 | { |
409 | | false, 0, region_grom, 0x0000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready), GROMFREQ |
| 409 | false, 0, region_grom, 0x0000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready), GROMFREQ |
410 | 410 | }; |
411 | 411 | |
412 | 412 | static GROM_CONFIG(grom1_config) |
413 | 413 | { |
414 | | false, 1, region_grom, 0x2000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready), GROMFREQ |
| 414 | false, 1, region_grom, 0x2000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready), GROMFREQ |
415 | 415 | }; |
416 | 416 | |
417 | 417 | static GROM_CONFIG(grom2_config) |
418 | 418 | { |
419 | | false, 2, region_grom, 0x4000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready), GROMFREQ |
| 419 | false, 2, region_grom, 0x4000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready), GROMFREQ |
420 | 420 | }; |
421 | 421 | |
422 | 422 | /**************************************************** |
r18258 | r18259 | |
447 | 447 | |
448 | 448 | #define GROM_LIBRARY_CONFIG(_conf, _region) \ |
449 | 449 | static GROM_CONFIG(_conf##0) \ |
450 | | { false, 0, _region, 0x0000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready), GROMFREQ }; \ |
| 450 | { false, 0, _region, 0x0000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready), GROMFREQ }; \ |
451 | 451 | static GROM_CONFIG(_conf##1) \ |
452 | | { false, 1, _region, 0x2000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready), GROMFREQ }; \ |
| 452 | { false, 1, _region, 0x2000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready), GROMFREQ }; \ |
453 | 453 | static GROM_CONFIG(_conf##2) \ |
454 | | { false, 2, _region, 0x4000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready), GROMFREQ }; \ |
| 454 | { false, 2, _region, 0x4000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready), GROMFREQ }; \ |
455 | 455 | static GROM_CONFIG(_conf##3) \ |
456 | | { false, 3, _region, 0x6000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready), GROMFREQ }; \ |
| 456 | { false, 3, _region, 0x6000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready), GROMFREQ }; \ |
457 | 457 | static GROM_CONFIG(_conf##4) \ |
458 | | { false, 4, _region, 0x8000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready), GROMFREQ }; \ |
| 458 | { false, 4, _region, 0x8000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready), GROMFREQ }; \ |
459 | 459 | static GROM_CONFIG(_conf##5) \ |
460 | | { false, 5, _region, 0xa000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready), GROMFREQ }; \ |
| 460 | { false, 5, _region, 0xa000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready), GROMFREQ }; \ |
461 | 461 | static GROM_CONFIG(_conf##6) \ |
462 | | { false, 6, _region, 0xc000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready), GROMFREQ }; \ |
| 462 | { false, 6, _region, 0xc000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready), GROMFREQ }; \ |
463 | 463 | static GROM_CONFIG(_conf##7) \ |
464 | | { false, 7, _region, 0xe000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready), GROMFREQ }; |
| 464 | { false, 7, _region, 0xe000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready), GROMFREQ }; |
465 | 465 | |
466 | 466 | GROM_LIBRARY_CONFIG(pascal0, pascal0_region) |
467 | 467 | GROM_LIBRARY_CONFIG(pascal1, pascal12_region) |
r18258 | r18259 | |
469 | 469 | |
470 | 470 | static GROMPORT_CONFIG(console_cartslot) |
471 | 471 | { |
472 | | DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready), |
473 | | DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_reset) |
| 472 | DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready), |
| 473 | DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_reset) |
474 | 474 | }; |
475 | 475 | |
476 | 476 | static PERIBOX_CONFIG( peribox_conf ) |
477 | 477 | { |
478 | | DEVCB_DRIVER_LINE_MEMBER(ti99_8, extint), // INTA |
479 | | DEVCB_DRIVER_LINE_MEMBER(ti99_8, notconnected), // INTB |
480 | | DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready), // READY |
| 478 | DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, extint), // INTA |
| 479 | DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, notconnected), // INTB |
| 480 | DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready), // READY |
481 | 481 | 0x70000 // Address bus prefix (AMA/AMB/AMC) |
482 | 482 | }; |
483 | 483 | |
484 | | READ8_MEMBER( ti99_8::cruread ) |
| 484 | READ8_MEMBER( ti99_8_state::cruread ) |
485 | 485 | { |
486 | 486 | // if (VERBOSE>6) LOG("read access to CRU address %04x\n", offset << 4); |
487 | 487 | UINT8 value = 0; |
r18258 | r18259 | |
497 | 497 | return value; |
498 | 498 | } |
499 | 499 | |
500 | | WRITE8_MEMBER( ti99_8::cruwrite ) |
| 500 | WRITE8_MEMBER( ti99_8_state::cruwrite ) |
501 | 501 | { |
502 | 502 | if (VERBOSE>8) LOG("ti99_8: CRU %04x <- %x\n", offset<<1, data); |
503 | 503 | m_mapper->cruwrite(offset<<1, data); |
r18258 | r18259 | |
518 | 518 | "COL8", "COL9", "COL10", "COL11", "COL12", "COL13" |
519 | 519 | }; |
520 | 520 | |
521 | | READ8_MEMBER( ti99_8::read_by_9901 ) |
| 521 | READ8_MEMBER( ti99_8_state::read_by_9901 ) |
522 | 522 | { |
523 | 523 | int answer=0; |
524 | 524 | UINT8 joyst; |
r18258 | r18259 | |
590 | 590 | /* |
591 | 591 | WRITE key column select (P2-P4), TI-99/8 |
592 | 592 | */ |
593 | | void ti99_8::set_keyboard_column(int number, int data) |
| 593 | void ti99_8_state::set_keyboard_column(int number, int data) |
594 | 594 | { |
595 | 595 | if (data != 0) m_keyboard_column |= 1 << number; |
596 | 596 | else m_keyboard_column &= ~(1 << number); |
r18258 | r18259 | |
601 | 601 | } |
602 | 602 | } |
603 | 603 | |
604 | | WRITE_LINE_MEMBER( ti99_8::keyC0 ) |
| 604 | WRITE_LINE_MEMBER( ti99_8_state::keyC0 ) |
605 | 605 | { |
606 | 606 | set_keyboard_column(0, state); |
607 | 607 | } |
608 | 608 | |
609 | | WRITE_LINE_MEMBER( ti99_8::keyC1 ) |
| 609 | WRITE_LINE_MEMBER( ti99_8_state::keyC1 ) |
610 | 610 | { |
611 | 611 | set_keyboard_column(1, state); |
612 | 612 | } |
613 | 613 | |
614 | | WRITE_LINE_MEMBER( ti99_8::keyC2 ) |
| 614 | WRITE_LINE_MEMBER( ti99_8_state::keyC2 ) |
615 | 615 | { |
616 | 616 | set_keyboard_column(2, state); |
617 | 617 | } |
618 | 618 | |
619 | | WRITE_LINE_MEMBER( ti99_8::keyC3 ) |
| 619 | WRITE_LINE_MEMBER( ti99_8_state::keyC3 ) |
620 | 620 | { |
621 | 621 | set_keyboard_column(3, state); |
622 | 622 | } |
r18258 | r18259 | |
624 | 624 | /* |
625 | 625 | Set 99/4A compatibility mode (CRUS=1) |
626 | 626 | */ |
627 | | WRITE_LINE_MEMBER( ti99_8::CRUS ) |
| 627 | WRITE_LINE_MEMBER( ti99_8_state::CRUS ) |
628 | 628 | { |
629 | 629 | m_mapper->CRUS_set(state==ASSERT_LINE); |
630 | 630 | } |
r18258 | r18259 | |
632 | 632 | /* |
633 | 633 | Set mapper /PTGEN. This is negative logic; we use PTGE as the positive logic signal. |
634 | 634 | */ |
635 | | WRITE_LINE_MEMBER( ti99_8::PTGEN ) |
| 635 | WRITE_LINE_MEMBER( ti99_8_state::PTGEN ) |
636 | 636 | { |
637 | 637 | m_mapper->PTGE_set(state==CLEAR_LINE); |
638 | 638 | } |
r18258 | r18259 | |
640 | 640 | /* |
641 | 641 | Control cassette tape unit motor (P6) |
642 | 642 | */ |
643 | | WRITE_LINE_MEMBER( ti99_8::cassette_motor ) |
| 643 | WRITE_LINE_MEMBER( ti99_8_state::cassette_motor ) |
644 | 644 | { |
645 | 645 | cassette_image_device *img = machine().device<cassette_image_device>(CASSETTE_TAG); |
646 | 646 | img->change_state(state==ASSERT_LINE? CASSETTE_MOTOR_ENABLED : CASSETTE_MOTOR_DISABLED,CASSETTE_MASK_MOTOR); |
r18258 | r18259 | |
653 | 653 | We do not really need to emulate this as the tape recorder generates sound |
654 | 654 | on its own. |
655 | 655 | */ |
656 | | WRITE_LINE_MEMBER( ti99_8::audio_gate ) |
| 656 | WRITE_LINE_MEMBER( ti99_8_state::audio_gate ) |
657 | 657 | { |
658 | 658 | } |
659 | 659 | |
r18258 | r18259 | |
661 | 661 | Tape output (P9) |
662 | 662 | I think polarity is correct, but don't take my word for it. |
663 | 663 | */ |
664 | | WRITE_LINE_MEMBER( ti99_8::cassette_output ) |
| 664 | WRITE_LINE_MEMBER( ti99_8_state::cassette_output ) |
665 | 665 | { |
666 | 666 | machine().device<cassette_image_device>(CASSETTE_TAG)->output(state==ASSERT_LINE? +1 : -1); |
667 | 667 | } |
668 | 668 | |
669 | | WRITE8_MEMBER( ti99_8::tms9901_interrupt ) |
| 669 | WRITE8_MEMBER( ti99_8_state::tms9901_interrupt ) |
670 | 670 | { |
671 | 671 | m_cpu->set_input_line(INPUT_LINE_99XX_INT1, data); |
672 | 672 | } |
r18258 | r18259 | |
676 | 676 | TMS9901_INT1 | TMS9901_INT2 | TMS9901_INTC, |
677 | 677 | |
678 | 678 | // read handler |
679 | | DEVCB_DRIVER_MEMBER(ti99_8, read_by_9901), |
| 679 | DEVCB_DRIVER_MEMBER(ti99_8_state, read_by_9901), |
680 | 680 | |
681 | 681 | // write handlers |
682 | 682 | { |
683 | | DEVCB_DRIVER_LINE_MEMBER(ti99_8, keyC0), |
684 | | DEVCB_DRIVER_LINE_MEMBER(ti99_8, keyC1), |
685 | | DEVCB_DRIVER_LINE_MEMBER(ti99_8, keyC2), |
686 | | DEVCB_DRIVER_LINE_MEMBER(ti99_8, keyC3), |
687 | | DEVCB_DRIVER_LINE_MEMBER(ti99_8, CRUS), |
688 | | DEVCB_DRIVER_LINE_MEMBER(ti99_8, PTGEN), |
689 | | DEVCB_DRIVER_LINE_MEMBER(ti99_8, cassette_motor), |
| 683 | DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, keyC0), |
| 684 | DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, keyC1), |
| 685 | DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, keyC2), |
| 686 | DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, keyC3), |
| 687 | DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, CRUS), |
| 688 | DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, PTGEN), |
| 689 | DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, cassette_motor), |
690 | 690 | DEVCB_NULL, |
691 | | DEVCB_DRIVER_LINE_MEMBER(ti99_8, audio_gate), |
692 | | DEVCB_DRIVER_LINE_MEMBER(ti99_8, cassette_output), |
| 691 | DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, audio_gate), |
| 692 | DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, cassette_output), |
693 | 693 | DEVCB_NULL, |
694 | 694 | DEVCB_NULL, |
695 | 695 | DEVCB_NULL, |
r18258 | r18259 | |
698 | 698 | DEVCB_NULL |
699 | 699 | }, |
700 | 700 | |
701 | | DEVCB_DRIVER_MEMBER(ti99_8, tms9901_interrupt) |
| 701 | DEVCB_DRIVER_MEMBER(ti99_8_state, tms9901_interrupt) |
702 | 702 | }; |
703 | 703 | |
704 | 704 | /*****************************************************************************/ |
r18258 | r18259 | |
706 | 706 | /* |
707 | 707 | set the state of TMS9901's INT2 (called by the tms9928 core) |
708 | 708 | */ |
709 | | WRITE_LINE_MEMBER( ti99_8::set_tms9901_INT2 ) |
| 709 | WRITE_LINE_MEMBER( ti99_8_state::set_tms9901_INT2 ) |
710 | 710 | { |
711 | 711 | if (VERBOSE>6) LOG("ti99_8: VDP int 2 on tms9901, level=%02x\n", state); |
712 | 712 | m_tms9901->set_single_int(2, state); |
r18258 | r18259 | |
717 | 717 | ***********************************************************/ |
718 | 718 | |
719 | 719 | |
720 | | WRITE_LINE_MEMBER( ti99_8::console_ready ) |
| 720 | WRITE_LINE_MEMBER( ti99_8_state::console_ready ) |
721 | 721 | { |
722 | 722 | if (VERBOSE>6) LOG("ti99_8: READY level=%02x\n", state); |
723 | 723 | m_ready_line = state; |
r18258 | r18259 | |
728 | 728 | /* |
729 | 729 | The RESET line leading to a reset of the CPU. |
730 | 730 | */ |
731 | | WRITE_LINE_MEMBER( ti99_8::console_reset ) |
| 731 | WRITE_LINE_MEMBER( ti99_8_state::console_reset ) |
732 | 732 | { |
733 | 733 | if (machine().phase() != MACHINE_PHASE_INIT) |
734 | 734 | { |
r18258 | r18259 | |
742 | 742 | the READY line, and the mapper raises READY depending on the clock pulse. |
743 | 743 | So we must make sure this does not interfere. |
744 | 744 | */ |
745 | | WRITE_LINE_MEMBER( ti99_8::console_ready_mapper ) |
| 745 | WRITE_LINE_MEMBER( ti99_8_state::console_ready_mapper ) |
746 | 746 | { |
747 | 747 | if (VERBOSE>6) LOG("ti99_8: READY level (mapper) = %02x\n", state); |
748 | 748 | m_ready_line1 = state; |
749 | 749 | m_cpu->set_ready((m_ready_line == ASSERT_LINE && m_ready_line1 == ASSERT_LINE)? ASSERT_LINE : CLEAR_LINE); |
750 | 750 | } |
751 | 751 | |
752 | | WRITE_LINE_MEMBER( ti99_8::extint ) |
| 752 | WRITE_LINE_MEMBER( ti99_8_state::extint ) |
753 | 753 | { |
754 | 754 | if (VERBOSE>6) LOG("ti99_8: EXTINT level = %02x\n", state); |
755 | 755 | if (m_tms9901 != NULL) |
756 | 756 | m_tms9901->set_single_int(1, state); |
757 | 757 | } |
758 | 758 | |
759 | | WRITE_LINE_MEMBER( ti99_8::notconnected ) |
| 759 | WRITE_LINE_MEMBER( ti99_8_state::notconnected ) |
760 | 760 | { |
761 | 761 | if (VERBOSE>6) LOG("ti99_8: Setting a not connected line ... ignored\n"); |
762 | 762 | } |
r18258 | r18259 | |
765 | 765 | { |
766 | 766 | SCREEN_TAG, |
767 | 767 | 0x4000, |
768 | | DEVCB_DRIVER_LINE_MEMBER(ti99_8, set_tms9901_INT2) |
| 768 | DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, set_tms9901_INT2) |
769 | 769 | }; |
770 | 770 | |
771 | | WRITE8_MEMBER( ti99_8::external_operation ) |
| 771 | WRITE8_MEMBER( ti99_8_state::external_operation ) |
772 | 772 | { |
773 | 773 | static const char* extop[8] = { "inv1", "inv2", "IDLE", "RSET", "inv3", "CKON", "CKOF", "LREX" }; |
774 | 774 | if (VERBOSE>1) LOG("External operation %s not implemented on TI-99 board\n", extop[offset]); |
r18258 | r18259 | |
777 | 777 | /* |
778 | 778 | Clock line from the CPU. Used to control wait state generation. |
779 | 779 | */ |
780 | | WRITE_LINE_MEMBER( ti99_8::clock_out ) |
| 780 | WRITE_LINE_MEMBER( ti99_8_state::clock_out ) |
781 | 781 | { |
782 | 782 | m_mapper->clock_in(state); |
783 | 783 | } |
r18258 | r18259 | |
791 | 791 | */ |
792 | 792 | static TMS9995_CONFIG( ti99_8_processor_config ) |
793 | 793 | { |
794 | | DEVCB_DRIVER_MEMBER(ti99_8, external_operation), |
| 794 | DEVCB_DRIVER_MEMBER(ti99_8_state, external_operation), |
795 | 795 | DEVCB_NULL, // Instruction acquisition |
796 | | DEVCB_DRIVER_LINE_MEMBER(ti99_8, clock_out), |
| 796 | DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, clock_out), |
797 | 797 | DEVCB_NULL, // wait |
798 | 798 | DEVCB_NULL, // HOLDA |
799 | 799 | NO_INTERNAL_RAM, |
r18258 | r18259 | |
802 | 802 | |
803 | 803 | static TI_SOUND_CONFIG( sound_conf ) |
804 | 804 | { |
805 | | DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready) // READY |
| 805 | DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready) // READY |
806 | 806 | }; |
807 | 807 | |
808 | 808 | /* |
r18258 | r18259 | |
902 | 902 | |
903 | 903 | static MAPPER8_CONFIG( mapper_conf ) |
904 | 904 | { |
905 | | DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready_mapper), // READY |
| 905 | DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready_mapper), // READY |
906 | 906 | mapper_devices |
907 | 907 | }; |
908 | 908 | |
909 | 909 | static SPEECH8_CONFIG( speech_config ) |
910 | 910 | { |
911 | | DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready), // READY |
| 911 | DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready), // READY |
912 | 912 | }; |
913 | 913 | |
914 | 914 | static JOYPORT_CONFIG( joyport8_60 ) |
r18258 | r18259 | |
923 | 923 | 50 |
924 | 924 | }; |
925 | 925 | |
926 | | void ti99_8::machine_start() |
| 926 | void ti99_8_state::machine_start() |
927 | 927 | { |
928 | 928 | m_cpu = static_cast<tms9995_device*>(machine().device("maincpu")); |
929 | 929 | m_tms9901 = static_cast<tms9901_device*>(machine().device(TMS9901_TAG)); |
r18258 | r18259 | |
938 | 938 | m_firstjoy = 14; |
939 | 939 | } |
940 | 940 | |
941 | | void ti99_8::machine_reset() |
| 941 | void ti99_8_state::machine_reset() |
942 | 942 | { |
943 | 943 | |
944 | 944 | m_cpu->set_hold(CLEAR_LINE); |
r18258 | r18259 | |
957 | 957 | m_ready_line = m_ready_line1 = ASSERT_LINE; |
958 | 958 | } |
959 | 959 | |
960 | | static MACHINE_CONFIG_START( ti99_8_60hz, ti99_8 ) |
| 960 | static MACHINE_CONFIG_START( ti99_8_60hz, ti99_8_state ) |
961 | 961 | /* basic machine hardware */ |
962 | 962 | /* TMS9995-MP9537 CPU @ 10.7 MHz */ |
963 | 963 | MCFG_TMS9995_ADD("maincpu", TMS9995, 10738635, memmap, crumap, ti99_8_processor_config) |
r18258 | r18259 | |
1001 | 1001 | MACHINE_CONFIG_END |
1002 | 1002 | |
1003 | 1003 | |
1004 | | static MACHINE_CONFIG_START( ti99_8_50hz, ti99_8 ) |
| 1004 | static MACHINE_CONFIG_START( ti99_8_50hz, ti99_8_state ) |
1005 | 1005 | /* basic machine hardware */ |
1006 | 1006 | /* TMS9995-MP9537 CPU @ 10.7 MHz */ |
1007 | 1007 | MCFG_TMS9995_ADD("maincpu", TMS9995, 10738635, memmap, crumap, ti99_8_processor_config) |
trunk/src/mess/drivers/ti99_4p.c
r18258 | r18259 | |
57 | 57 | #define VERBOSE 1 |
58 | 58 | #define LOG logerror |
59 | 59 | |
60 | | class ti99_4p : public driver_device |
| 60 | class ti99_4p_state : public driver_device |
61 | 61 | { |
62 | 62 | public: |
63 | | ti99_4p(const machine_config &mconfig, device_type type, const char *tag) |
| 63 | ti99_4p_state(const machine_config &mconfig, device_type type, const char *tag) |
64 | 64 | : driver_device(mconfig, type, tag) { } |
65 | 65 | |
66 | 66 | DECLARE_WRITE_LINE_MEMBER( console_ready ); |
r18258 | r18259 | |
168 | 168 | |
169 | 169 | }; |
170 | 170 | |
171 | | static ADDRESS_MAP_START(memmap, AS_PROGRAM, 16, ti99_4p) |
| 171 | static ADDRESS_MAP_START(memmap, AS_PROGRAM, 16, ti99_4p_state) |
172 | 172 | AM_RANGE(0x0000, 0xffff) AM_READWRITE( memread, memwrite ) |
173 | 173 | ADDRESS_MAP_END |
174 | 174 | |
175 | | static ADDRESS_MAP_START(cru_map, AS_IO, 8, ti99_4p) |
| 175 | static ADDRESS_MAP_START(cru_map, AS_IO, 8, ti99_4p_state) |
176 | 176 | AM_RANGE(0x0000, 0x003f) AM_DEVREAD(TMS9901_TAG, tms9901_device, read) |
177 | 177 | AM_RANGE(0x0000, 0x01ff) AM_READ( cruread ) |
178 | 178 | |
r18258 | r18259 | |
260 | 260 | /* |
261 | 261 | Memory access |
262 | 262 | */ |
263 | | READ16_MEMBER( ti99_4p::memread ) |
| 263 | READ16_MEMBER( ti99_4p_state::memread ) |
264 | 264 | { |
265 | 265 | int addroff = offset << 1; |
266 | 266 | if (m_rom0 == NULL) return 0; // premature access |
r18258 | r18259 | |
336 | 336 | return value; |
337 | 337 | } |
338 | 338 | |
339 | | WRITE16_MEMBER( ti99_4p::memwrite ) |
| 339 | WRITE16_MEMBER( ti99_4p_state::memwrite ) |
340 | 340 | { |
341 | 341 | // m_cpu->execute().adjust_icount(-4); |
342 | 342 | |
r18258 | r18259 | |
416 | 416 | The datamux is connected to the clock line in order to operate |
417 | 417 | the wait state counter. |
418 | 418 | */ |
419 | | void ti99_4p::clock_in(int clock) |
| 419 | void ti99_4p_state::clock_in(int clock) |
420 | 420 | { |
421 | 421 | if (clock==ASSERT_LINE && m_waitcount!=0) |
422 | 422 | { |
r18258 | r18259 | |
426 | 426 | } |
427 | 427 | |
428 | 428 | |
429 | | READ16_MEMBER( ti99_4p::datamux_read ) |
| 429 | READ16_MEMBER( ti99_4p_state::datamux_read ) |
430 | 430 | { |
431 | 431 | UINT8 hbyte = 0; |
432 | 432 | UINT16 addroff = (offset << 1); |
r18258 | r18259 | |
451 | 451 | Write access. |
452 | 452 | TODO: use the 16-bit expansion in the box for suitable cards |
453 | 453 | */ |
454 | | WRITE16_MEMBER( ti99_4p::datamux_write ) |
| 454 | WRITE16_MEMBER( ti99_4p_state::datamux_write ) |
455 | 455 | { |
456 | 456 | UINT16 addroff = (offset << 1); |
457 | 457 | // printf("write address = %04x, value = %04x, memmask = %4x\n", addroff, data, mem_mask); |
r18258 | r18259 | |
479 | 479 | /* |
480 | 480 | CRU write |
481 | 481 | */ |
482 | | WRITE8_MEMBER( ti99_4p::cruwrite ) |
| 482 | WRITE8_MEMBER( ti99_4p_state::cruwrite ) |
483 | 483 | { |
484 | 484 | int addroff = offset<<1; |
485 | 485 | |
r18258 | r18259 | |
503 | 503 | m_peribox->cruwrite(addroff, data); |
504 | 504 | } |
505 | 505 | |
506 | | READ8_MEMBER( ti99_4p::cruread ) |
| 506 | READ8_MEMBER( ti99_4p_state::cruread ) |
507 | 507 | { |
508 | 508 | UINT8 value = 0; |
509 | 509 | m_peribox->crureadz(offset<<4, &value); |
r18258 | r18259 | |
519 | 519 | 0x2000-0x3fff and 0xa000-0xffff, and the mapper area is at 0x4000-0x401e |
520 | 520 | (only even addresses). |
521 | 521 | */ |
522 | | READ16_MEMBER( ti99_4p::samsmem_read ) |
| 522 | READ16_MEMBER( ti99_4p_state::samsmem_read ) |
523 | 523 | { |
524 | 524 | UINT32 address = 0; |
525 | 525 | int addroff = offset << 1; |
r18258 | r18259 | |
536 | 536 | /* |
537 | 537 | Memory write |
538 | 538 | */ |
539 | | WRITE16_MEMBER( ti99_4p::samsmem_write ) |
| 539 | WRITE16_MEMBER( ti99_4p_state::samsmem_write ) |
540 | 540 | { |
541 | 541 | UINT32 address = 0; |
542 | 542 | int addroff = offset << 1; |
r18258 | r18259 | |
555 | 555 | ****************************************************************************/ |
556 | 556 | static const char *const column[] = { "COL0", "COL1", "COL2", "COL3", "COL4", "COL5" }; |
557 | 557 | |
558 | | READ8_MEMBER( ti99_4p::read_by_9901 ) |
| 558 | READ8_MEMBER( ti99_4p_state::read_by_9901 ) |
559 | 559 | { |
560 | 560 | int answer=0; |
561 | 561 | |
r18258 | r18259 | |
613 | 613 | /* |
614 | 614 | WRITE key column select (P2-P4) |
615 | 615 | */ |
616 | | void ti99_4p::set_keyboard_column(int number, int data) |
| 616 | void ti99_4p_state::set_keyboard_column(int number, int data) |
617 | 617 | { |
618 | 618 | if (data!=0) m_keyboard_column |= 1 << number; |
619 | 619 | else m_keyboard_column &= ~(1 << number); |
r18258 | r18259 | |
624 | 624 | } |
625 | 625 | } |
626 | 626 | |
627 | | WRITE_LINE_MEMBER( ti99_4p::keyC0 ) |
| 627 | WRITE_LINE_MEMBER( ti99_4p_state::keyC0 ) |
628 | 628 | { |
629 | 629 | set_keyboard_column(0, state); |
630 | 630 | } |
631 | 631 | |
632 | | WRITE_LINE_MEMBER( ti99_4p::keyC1 ) |
| 632 | WRITE_LINE_MEMBER( ti99_4p_state::keyC1 ) |
633 | 633 | { |
634 | 634 | set_keyboard_column(1, state); |
635 | 635 | } |
636 | 636 | |
637 | | WRITE_LINE_MEMBER( ti99_4p::keyC2 ) |
| 637 | WRITE_LINE_MEMBER( ti99_4p_state::keyC2 ) |
638 | 638 | { |
639 | 639 | set_keyboard_column(2, state); |
640 | 640 | } |
r18258 | r18259 | |
642 | 642 | /* |
643 | 643 | WRITE alpha lock line (P5) |
644 | 644 | */ |
645 | | WRITE_LINE_MEMBER( ti99_4p::alphaW ) |
| 645 | WRITE_LINE_MEMBER( ti99_4p_state::alphaW ) |
646 | 646 | { |
647 | 647 | m_check_alphalock = (state==0); |
648 | 648 | } |
r18258 | r18259 | |
650 | 650 | /* |
651 | 651 | command CS1 (only) tape unit motor (P6) |
652 | 652 | */ |
653 | | WRITE_LINE_MEMBER( ti99_4p::cs_motor ) |
| 653 | WRITE_LINE_MEMBER( ti99_4p_state::cs_motor ) |
654 | 654 | { |
655 | 655 | m_cassette->change_state((state!=0)? CASSETTE_MOTOR_ENABLED : CASSETTE_MOTOR_DISABLED,CASSETTE_MASK_MOTOR); |
656 | 656 | } |
r18258 | r18259 | |
664 | 664 | We do not really need to emulate this as the tape recorder generates sound |
665 | 665 | on its own. |
666 | 666 | */ |
667 | | WRITE_LINE_MEMBER( ti99_4p::audio_gate ) |
| 667 | WRITE_LINE_MEMBER( ti99_4p_state::audio_gate ) |
668 | 668 | { |
669 | 669 | } |
670 | 670 | |
671 | 671 | /* |
672 | 672 | tape output (P9) |
673 | 673 | */ |
674 | | WRITE_LINE_MEMBER( ti99_4p::cassette_output ) |
| 674 | WRITE_LINE_MEMBER( ti99_4p_state::cassette_output ) |
675 | 675 | { |
676 | 676 | m_cassette->output((state!=0)? +1 : -1); |
677 | 677 | } |
r18258 | r18259 | |
682 | 682 | TMS9901_INT1 | TMS9901_INT2 | TMS9901_INTC, /* only input pins whose state is always known */ |
683 | 683 | |
684 | 684 | // read handler |
685 | | DEVCB_DRIVER_MEMBER(ti99_4p, read_by_9901), |
| 685 | DEVCB_DRIVER_MEMBER(ti99_4p_state, read_by_9901), |
686 | 686 | |
687 | 687 | { // write handlers |
688 | 688 | DEVCB_NULL, |
689 | 689 | DEVCB_NULL, |
690 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4p, keyC0), |
691 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4p, keyC1), |
692 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4p, keyC2), |
693 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4p, alphaW), |
694 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4p, cs_motor), |
| 690 | DEVCB_DRIVER_LINE_MEMBER(ti99_4p_state, keyC0), |
| 691 | DEVCB_DRIVER_LINE_MEMBER(ti99_4p_state, keyC1), |
| 692 | DEVCB_DRIVER_LINE_MEMBER(ti99_4p_state, keyC2), |
| 693 | DEVCB_DRIVER_LINE_MEMBER(ti99_4p_state, alphaW), |
| 694 | DEVCB_DRIVER_LINE_MEMBER(ti99_4p_state, cs_motor), |
695 | 695 | DEVCB_NULL, |
696 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4p, audio_gate), |
697 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4p, cassette_output), |
| 696 | DEVCB_DRIVER_LINE_MEMBER(ti99_4p_state, audio_gate), |
| 697 | DEVCB_DRIVER_LINE_MEMBER(ti99_4p_state, cassette_output), |
698 | 698 | DEVCB_NULL, |
699 | 699 | DEVCB_NULL, |
700 | 700 | DEVCB_NULL, |
r18258 | r18259 | |
704 | 704 | }, |
705 | 705 | |
706 | 706 | /* interrupt handler */ |
707 | | DEVCB_DRIVER_MEMBER(ti99_4p, tms9901_interrupt) |
| 707 | DEVCB_DRIVER_MEMBER(ti99_4p_state, tms9901_interrupt) |
708 | 708 | }; |
709 | 709 | |
710 | 710 | /*************************************************************************** |
r18258 | r18259 | |
717 | 717 | no chance to make another device pull down the same line; the CPU just |
718 | 718 | won't access any other device in this time. |
719 | 719 | */ |
720 | | WRITE_LINE_MEMBER( ti99_4p::console_ready ) |
| 720 | WRITE_LINE_MEMBER( ti99_4p_state::console_ready ) |
721 | 721 | { |
722 | 722 | m_ready_line = state; |
723 | 723 | int combined = (m_ready_line == ASSERT_LINE && m_ready_line_dmux == ASSERT_LINE)? ASSERT_LINE : CLEAR_LINE; |
r18258 | r18259 | |
735 | 735 | the READY line, and the datamux raises READY depending on the clock pulse. |
736 | 736 | So we must make sure this does not interfere. |
737 | 737 | */ |
738 | | WRITE_LINE_MEMBER( ti99_4p::console_ready_dmux ) |
| 738 | WRITE_LINE_MEMBER( ti99_4p_state::console_ready_dmux ) |
739 | 739 | { |
740 | 740 | m_ready_line_dmux = state; |
741 | 741 | int combined = (m_ready_line == ASSERT_LINE && m_ready_line_dmux == ASSERT_LINE)? ASSERT_LINE : CLEAR_LINE; |
r18258 | r18259 | |
749 | 749 | } |
750 | 750 | |
751 | 751 | |
752 | | WRITE_LINE_MEMBER( ti99_4p::extint ) |
| 752 | WRITE_LINE_MEMBER( ti99_4p_state::extint ) |
753 | 753 | { |
754 | 754 | if (VERBOSE>6) LOG("ti99_4p: EXTINT level = %02x\n", state); |
755 | 755 | if (m_tms9901 != NULL) |
756 | 756 | m_tms9901->set_single_int(1, state); |
757 | 757 | } |
758 | 758 | |
759 | | WRITE_LINE_MEMBER( ti99_4p::notconnected ) |
| 759 | WRITE_LINE_MEMBER( ti99_4p_state::notconnected ) |
760 | 760 | { |
761 | 761 | if (VERBOSE>6) LOG("ti99_4p: Setting a not connected line ... ignored\n"); |
762 | 762 | } |
r18258 | r18259 | |
764 | 764 | /* |
765 | 765 | Clock line from the CPU. Used to control wait state generation. |
766 | 766 | */ |
767 | | WRITE_LINE_MEMBER( ti99_4p::clock_out ) |
| 767 | WRITE_LINE_MEMBER( ti99_4p_state::clock_out ) |
768 | 768 | { |
769 | 769 | clock_in(state); |
770 | 770 | } |
771 | 771 | |
772 | | WRITE8_MEMBER( ti99_4p::tms9901_interrupt ) |
| 772 | WRITE8_MEMBER( ti99_4p_state::tms9901_interrupt ) |
773 | 773 | { |
774 | 774 | // offset contains the interrupt level (0-15) |
775 | 775 | // However, the TI board just ignores that level and hardwires it to 1 |
r18258 | r18259 | |
777 | 777 | m_cpu->set_input_line(INPUT_LINE_99XX_INTREQ, data); |
778 | 778 | } |
779 | 779 | |
780 | | READ8_MEMBER( ti99_4p::interrupt_level ) |
| 780 | READ8_MEMBER( ti99_4p_state::interrupt_level ) |
781 | 781 | { |
782 | 782 | // On the TI-99 systems these IC lines are not used; the input lines |
783 | 783 | // at the CPU are hardwired to level 1. |
784 | 784 | return 1; |
785 | 785 | } |
786 | 786 | |
787 | | WRITE8_MEMBER( ti99_4p::external_operation ) |
| 787 | WRITE8_MEMBER( ti99_4p_state::external_operation ) |
788 | 788 | { |
789 | 789 | static const char* extop[8] = { "inv1", "inv2", "IDLE", "RSET", "inv3", "CKON", "CKOF", "LREX" }; |
790 | 790 | if (VERBOSE>1) LOG("External operation %s not implemented on the SGCPU board\n", extop[offset]); |
r18258 | r18259 | |
794 | 794 | |
795 | 795 | static PERIBOX_CONFIG( peribox_conf ) |
796 | 796 | { |
797 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4p, extint), // INTA |
798 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4p, notconnected), // INTB |
799 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4p, console_ready), // READY |
| 797 | DEVCB_DRIVER_LINE_MEMBER(ti99_4p_state, extint), // INTA |
| 798 | DEVCB_DRIVER_LINE_MEMBER(ti99_4p_state, notconnected), // INTB |
| 799 | DEVCB_DRIVER_LINE_MEMBER(ti99_4p_state, console_ready), // READY |
800 | 800 | 0x70000 // Address bus prefix (AMA/AMB/AMC) |
801 | 801 | }; |
802 | 802 | |
803 | 803 | static TMS99xx_CONFIG( sgcpu_cpuconf ) |
804 | 804 | { |
805 | | DEVCB_DRIVER_MEMBER(ti99_4p, external_operation), |
806 | | DEVCB_DRIVER_MEMBER(ti99_4p, interrupt_level), |
| 805 | DEVCB_DRIVER_MEMBER(ti99_4p_state, external_operation), |
| 806 | DEVCB_DRIVER_MEMBER(ti99_4p_state, interrupt_level), |
807 | 807 | DEVCB_NULL, // Instruction acquisition |
808 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4p, clock_out), |
| 808 | DEVCB_DRIVER_LINE_MEMBER(ti99_4p_state, clock_out), |
809 | 809 | DEVCB_NULL, // wait |
810 | 810 | DEVCB_NULL // Hold acknowledge |
811 | 811 | }; |
812 | 812 | |
813 | | void ti99_4p::machine_start() |
| 813 | void ti99_4p_state::machine_start() |
814 | 814 | { |
815 | 815 | |
816 | 816 | m_cpu = static_cast<tms9900_device*>(machine().device("maincpu")); |
r18258 | r18259 | |
841 | 841 | /* |
842 | 842 | set the state of int2 (called by the v9938) |
843 | 843 | */ |
844 | | void ti99_4p::set_tms9901_INT2_from_v9938(v99x8_device &vdp, int state) |
| 844 | void ti99_4p_state::set_tms9901_INT2_from_v9938(v99x8_device &vdp, int state) |
845 | 845 | { |
846 | 846 | m_tms9901->set_single_int(2, state); |
847 | 847 | } |
848 | 848 | |
849 | 849 | static TI_SOUND_CONFIG( sound_conf ) |
850 | 850 | { |
851 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4p, console_ready) // READY |
| 851 | DEVCB_DRIVER_LINE_MEMBER(ti99_4p_state, console_ready) // READY |
852 | 852 | }; |
853 | 853 | |
854 | 854 | static JOYPORT_CONFIG( joyport4a_60 ) |
r18258 | r18259 | |
860 | 860 | /* |
861 | 861 | Reset the machine. |
862 | 862 | */ |
863 | | MACHINE_RESET_MEMBER(ti99_4p,ti99_4p) |
| 863 | MACHINE_RESET_MEMBER(ti99_4p_state,ti99_4p) |
864 | 864 | { |
865 | 865 | m_tms9901->set_single_int(12, 0); |
866 | 866 | |
r18258 | r18259 | |
868 | 868 | m_cpu->set_hold(CLEAR_LINE); |
869 | 869 | } |
870 | 870 | |
871 | | TIMER_DEVICE_CALLBACK_MEMBER(ti99_4p::sgcpu_hblank_interrupt) |
| 871 | TIMER_DEVICE_CALLBACK_MEMBER(ti99_4p_state::sgcpu_hblank_interrupt) |
872 | 872 | { |
873 | 873 | machine().device<v9938_device>(VDP_TAG)->interrupt(); |
874 | 874 | } |
r18258 | r18259 | |
876 | 876 | /* |
877 | 877 | Machine description. |
878 | 878 | */ |
879 | | static MACHINE_CONFIG_START( ti99_4p_60hz, ti99_4p ) |
| 879 | static MACHINE_CONFIG_START( ti99_4p_60hz, ti99_4p_state ) |
880 | 880 | /* basic machine hardware */ |
881 | 881 | /* TMS9900 CPU @ 3.0 MHz */ |
882 | 882 | MCFG_TMS99xx_ADD("maincpu", TMS9900, 3000000, memmap, cru_map, sgcpu_cpuconf) |
r18258 | r18259 | |
887 | 887 | // interlace mode, but in non-interlace modes only half of the lines are |
888 | 888 | // painted. Accordingly, the full set of lines is refreshed at 30 Hz, |
889 | 889 | // not 60 Hz. This should be fixed in the v9938 emulation. |
890 | | MCFG_TI_V9938_ADD(VIDEO_SYSTEM_TAG, 30, SCREEN_TAG, 2500, 512+32, (212+28)*2, DEVICE_SELF, ti99_4p, set_tms9901_INT2_from_v9938) |
891 | | MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", ti99_4p, sgcpu_hblank_interrupt, SCREEN_TAG, 0, 1) |
| 890 | MCFG_TI_V9938_ADD(VIDEO_SYSTEM_TAG, 30, SCREEN_TAG, 2500, 512+32, (212+28)*2, DEVICE_SELF, ti99_4p_state, set_tms9901_INT2_from_v9938) |
| 891 | MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", ti99_4p_state, sgcpu_hblank_interrupt, SCREEN_TAG, 0, 1) |
892 | 892 | |
893 | 893 | // tms9901 |
894 | 894 | MCFG_TMS9901_ADD(TMS9901_TAG, tms9901_wiring_sgcpu, 3000000) |
trunk/src/mess/drivers/ti99_4x.c
r18258 | r18259 | |
60 | 60 | /* |
61 | 61 | The console. |
62 | 62 | */ |
63 | | class ti99_4x : public driver_device |
| 63 | class ti99_4x_state : public driver_device |
64 | 64 | { |
65 | 65 | public: |
66 | | ti99_4x(const machine_config &mconfig, device_type type, const char *tag) |
| 66 | ti99_4x_state(const machine_config &mconfig, device_type type, const char *tag) |
67 | 67 | : driver_device(mconfig, type, tag) { } |
68 | 68 | |
69 | 69 | // CRU (Communication Register Unit) handling |
r18258 | r18259 | |
132 | 132 | to the 16bit bus, and the wait state logic is not active during their |
133 | 133 | accesses. |
134 | 134 | */ |
135 | | static ADDRESS_MAP_START(memmap, AS_PROGRAM, 16, ti99_4x) |
| 135 | static ADDRESS_MAP_START(memmap, AS_PROGRAM, 16, ti99_4x_state) |
136 | 136 | ADDRESS_MAP_GLOBAL_MASK(0xffff) |
137 | 137 | AM_RANGE(0x0000, 0x1fff) AM_ROM |
138 | 138 | AM_RANGE(0x8000, 0x80ff) AM_MIRROR(0x0300) AM_RAM |
r18258 | r18259 | |
159 | 159 | |
160 | 160 | Write:0000 - 01ff corresponds to bit 0 of base address 0000 - 03fe |
161 | 161 | */ |
162 | | static ADDRESS_MAP_START(cru_map, AS_IO, 8, ti99_4x) |
| 162 | static ADDRESS_MAP_START(cru_map, AS_IO, 8, ti99_4x_state) |
163 | 163 | AM_RANGE(0x0000, 0x003f) AM_DEVREAD(TMS9901_TAG, tms9901_device, read) |
164 | 164 | AM_RANGE(0x0000, 0x01ff) AM_READ(cruread) |
165 | 165 | |
r18258 | r18259 | |
234 | 234 | PORT_CONFSETTING( 0x01, DEF_STR( On ) ) |
235 | 235 | |
236 | 236 | PORT_START( "LOADINT ") |
237 | | PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Load interrupt") PORT_CODE(KEYCODE_PRTSCR) PORT_CHANGED_MEMBER(DEVICE_SELF, ti99_4x, load_interrupt, 1) |
| 237 | PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Load interrupt") PORT_CODE(KEYCODE_PRTSCR) PORT_CHANGED_MEMBER(DEVICE_SELF, ti99_4x_state, load_interrupt, 1) |
238 | 238 | |
239 | 239 | PORT_START("COL0") // col 0 |
240 | 240 | PORT_BIT(0x88, IP_ACTIVE_LOW, IPT_UNUSED) |
r18258 | r18259 | |
310 | 310 | |
311 | 311 | static GROM_CONFIG(grom0_config) |
312 | 312 | { |
313 | | false, 0, region_grom, 0x0000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_4x, console_ready), GROMFREQ |
| 313 | false, 0, region_grom, 0x0000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, console_ready), GROMFREQ |
314 | 314 | }; |
315 | 315 | |
316 | 316 | static GROM_CONFIG(grom1_config) |
317 | 317 | { |
318 | | false, 1, region_grom, 0x2000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_4x, console_ready), GROMFREQ |
| 318 | false, 1, region_grom, 0x2000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, console_ready), GROMFREQ |
319 | 319 | }; |
320 | 320 | |
321 | 321 | static GROM_CONFIG(grom2_config) |
322 | 322 | { |
323 | | false, 2, region_grom, 0x4000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_4x, console_ready), GROMFREQ |
| 323 | false, 2, region_grom, 0x4000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, console_ready), GROMFREQ |
324 | 324 | }; |
325 | 325 | |
326 | 326 | static GROMPORT_CONFIG(console_cartslot) |
327 | 327 | { |
328 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4x, console_ready), |
329 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4x, console_reset) |
| 328 | DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, console_ready), |
| 329 | DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, console_reset) |
330 | 330 | }; |
331 | 331 | |
332 | 332 | static PERIBOX_CONFIG( peribox_conf ) |
333 | 333 | { |
334 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4x, extint), // INTA |
335 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4x, notconnected), // INTB |
336 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4x, console_ready), // READY |
| 334 | DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, extint), // INTA |
| 335 | DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, notconnected), // INTB |
| 336 | DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, console_ready), // READY |
337 | 337 | 0x70000 // Address bus prefix (AMA/AMB/AMC) |
338 | 338 | }; |
339 | 339 | |
340 | 340 | static TI_SOUND_CONFIG( sound_conf ) |
341 | 341 | { |
342 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4x, console_ready) // READY |
| 342 | DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, console_ready) // READY |
343 | 343 | }; |
344 | 344 | |
345 | | READ8_MEMBER( ti99_4x::cruread ) |
| 345 | READ8_MEMBER( ti99_4x_state::cruread ) |
346 | 346 | { |
347 | 347 | // if (VERBOSE>6) LOG("read access to CRU address %04x\n", offset << 4); |
348 | 348 | UINT8 value = 0; |
r18258 | r18259 | |
356 | 356 | return value; |
357 | 357 | } |
358 | 358 | |
359 | | WRITE8_MEMBER( ti99_4x::cruwrite ) |
| 359 | WRITE8_MEMBER( ti99_4x_state::cruwrite ) |
360 | 360 | { |
361 | 361 | if (VERBOSE>6) LOG("ti99_4x: write access to CRU address %04x\n", offset << 1); |
362 | 362 | m_gromport->cruwrite(offset<<1, data); |
363 | 363 | m_peribox->cruwrite(offset<<1, data); |
364 | 364 | } |
365 | 365 | |
366 | | WRITE8_MEMBER( ti99_4x::external_operation ) |
| 366 | WRITE8_MEMBER( ti99_4x_state::external_operation ) |
367 | 367 | { |
368 | 368 | static const char* extop[8] = { "inv1", "inv2", "IDLE", "RSET", "inv3", "CKON", "CKOF", "LREX" }; |
369 | 369 | // Some games (e.g. Slymoids) actually use IDLE for synchronization |
r18258 | r18259 | |
402 | 402 | |
403 | 403 | static const char *const column[] = { "COL0", "COL1", "COL2", "COL3", "COL4", "COL5" }; |
404 | 404 | |
405 | | READ8_MEMBER( ti99_4x::read_by_9901 ) |
| 405 | READ8_MEMBER( ti99_4x_state::read_by_9901 ) |
406 | 406 | { |
407 | 407 | int answer=0; |
408 | 408 | |
r18258 | r18259 | |
475 | 475 | /* |
476 | 476 | Handler for tms9901 P0 pin (handset data acknowledge) |
477 | 477 | */ |
478 | | WRITE_LINE_MEMBER( ti99_4x::handset_ack ) |
| 478 | WRITE_LINE_MEMBER( ti99_4x_state::handset_ack ) |
479 | 479 | { |
480 | 480 | // Write a value to the joyport. If there is a handset this will set its |
481 | 481 | // ACK line. |
r18258 | r18259 | |
485 | 485 | /* |
486 | 486 | WRITE key column select (P2-P4), TI-99/4 |
487 | 487 | */ |
488 | | void ti99_4x::set_keyboard_column(int number, int data) |
| 488 | void ti99_4x_state::set_keyboard_column(int number, int data) |
489 | 489 | { |
490 | 490 | if (data != 0) |
491 | 491 | m_keyboard_column |= 1 << number; |
r18258 | r18259 | |
506 | 506 | // joystick 2 = column 7 |
507 | 507 | } |
508 | 508 | |
509 | | WRITE_LINE_MEMBER( ti99_4x::keyC0 ) |
| 509 | WRITE_LINE_MEMBER( ti99_4x_state::keyC0 ) |
510 | 510 | { |
511 | 511 | set_keyboard_column(0, state); |
512 | 512 | } |
513 | 513 | |
514 | | WRITE_LINE_MEMBER( ti99_4x::keyC1 ) |
| 514 | WRITE_LINE_MEMBER( ti99_4x_state::keyC1 ) |
515 | 515 | { |
516 | 516 | set_keyboard_column(1, state); |
517 | 517 | } |
518 | 518 | |
519 | | WRITE_LINE_MEMBER( ti99_4x::keyC2 ) |
| 519 | WRITE_LINE_MEMBER( ti99_4x_state::keyC2 ) |
520 | 520 | { |
521 | 521 | set_keyboard_column(2, state); |
522 | 522 | } |
r18258 | r18259 | |
524 | 524 | /* |
525 | 525 | Select alpha lock line - TI99/4a only (P5) |
526 | 526 | */ |
527 | | WRITE_LINE_MEMBER( ti99_4x::alphaW ) |
| 527 | WRITE_LINE_MEMBER( ti99_4x_state::alphaW ) |
528 | 528 | { |
529 | 529 | m_check_alphalock = (state==0); |
530 | 530 | } |
r18258 | r18259 | |
532 | 532 | /* |
533 | 533 | Control CS1 tape unit motor (P6) |
534 | 534 | */ |
535 | | WRITE_LINE_MEMBER( ti99_4x::cs1_motor ) |
| 535 | WRITE_LINE_MEMBER( ti99_4x_state::cs1_motor ) |
536 | 536 | { |
537 | 537 | cassette_image_device *img = machine().device<cassette_image_device>(CASSETTE_TAG); |
538 | 538 | img->change_state(state==ASSERT_LINE? CASSETTE_MOTOR_ENABLED : CASSETTE_MOTOR_DISABLED,CASSETTE_MASK_MOTOR); |
r18258 | r18259 | |
541 | 541 | /* |
542 | 542 | Control CS2 tape unit motor (P7) |
543 | 543 | */ |
544 | | WRITE_LINE_MEMBER( ti99_4x::cs2_motor ) |
| 544 | WRITE_LINE_MEMBER( ti99_4x_state::cs2_motor ) |
545 | 545 | { |
546 | 546 | cassette_image_device *img = machine().device<cassette_image_device>(CASSETTE2_TAG); |
547 | 547 | img->change_state(state==ASSERT_LINE? CASSETTE_MOTOR_ENABLED : CASSETTE_MOTOR_DISABLED,CASSETTE_MASK_MOTOR); |
r18258 | r18259 | |
554 | 554 | We do not really need to emulate this as the tape recorder generates sound |
555 | 555 | on its own. |
556 | 556 | */ |
557 | | WRITE_LINE_MEMBER( ti99_4x::audio_gate ) |
| 557 | WRITE_LINE_MEMBER( ti99_4x_state::audio_gate ) |
558 | 558 | { |
559 | 559 | } |
560 | 560 | |
r18258 | r18259 | |
562 | 562 | Tape output (P9) |
563 | 563 | I think polarity is correct, but don't take my word for it. |
564 | 564 | */ |
565 | | WRITE_LINE_MEMBER( ti99_4x::cassette_output ) |
| 565 | WRITE_LINE_MEMBER( ti99_4x_state::cassette_output ) |
566 | 566 | { |
567 | 567 | machine().device<cassette_image_device>(CASSETTE_TAG)->output(state==ASSERT_LINE? +1 : -1); |
568 | 568 | machine().device<cassette_image_device>(CASSETTE2_TAG)->output(state==ASSERT_LINE? +1 : -1); |
569 | 569 | } |
570 | 570 | |
571 | | WRITE8_MEMBER( ti99_4x::tms9901_interrupt ) |
| 571 | WRITE8_MEMBER( ti99_4x_state::tms9901_interrupt ) |
572 | 572 | { |
573 | 573 | // offset contains the interrupt level (0-15) |
574 | 574 | // However, the TI board just ignores that level and hardwires it to 1 |
r18258 | r18259 | |
576 | 576 | m_cpu->set_input_line(INPUT_LINE_99XX_INTREQ, data); |
577 | 577 | } |
578 | 578 | |
579 | | READ8_MEMBER( ti99_4x::interrupt_level ) |
| 579 | READ8_MEMBER( ti99_4x_state::interrupt_level ) |
580 | 580 | { |
581 | 581 | // On the TI-99 systems these IC lines are not used; the input lines |
582 | 582 | // at the CPU are hardwired to level 1. |
r18258 | r18259 | |
586 | 586 | /* |
587 | 587 | Clock line from the CPU. Used to control wait state generation. |
588 | 588 | */ |
589 | | WRITE_LINE_MEMBER( ti99_4x::clock_out ) |
| 589 | WRITE_LINE_MEMBER( ti99_4x_state::clock_out ) |
590 | 590 | { |
591 | 591 | m_datamux->clock_in(state); |
592 | 592 | } |
r18258 | r18259 | |
596 | 596 | /* |
597 | 597 | set the state of TMS9901's INT2 (called by the tms9928 core) |
598 | 598 | */ |
599 | | WRITE_LINE_MEMBER( ti99_4x::set_tms9901_INT2 ) |
| 599 | WRITE_LINE_MEMBER( ti99_4x_state::set_tms9901_INT2 ) |
600 | 600 | { |
601 | 601 | if (VERBOSE>6) LOG("ti99_4x: VDP int 2 on tms9901, level=%d\n", state); |
602 | 602 | m_tms9901->set_single_int(2, state); |
603 | 603 | } |
604 | 604 | |
605 | | void ti99_4x::set_tms9901_INT2_from_v9938(v99x8_device &vdp, int state) |
| 605 | void ti99_4x_state::set_tms9901_INT2_from_v9938(v99x8_device &vdp, int state) |
606 | 606 | { |
607 | 607 | m_tms9901->set_single_int(2, state); |
608 | 608 | } |
r18258 | r18259 | |
610 | 610 | /* |
611 | 611 | set the state of TMS9901's INT12 (called by the handset prototype of TI-99/4) |
612 | 612 | */ |
613 | | WRITE_LINE_MEMBER( ti99_4x::set_tms9901_INT12) |
| 613 | WRITE_LINE_MEMBER( ti99_4x_state::set_tms9901_INT12) |
614 | 614 | { |
615 | 615 | m_tms9901->set_single_int(12, state); |
616 | 616 | } |
r18258 | r18259 | |
619 | 619 | One of the common hardware mods was to add a switch to trigger a LOAD |
620 | 620 | interrupt (NMI) |
621 | 621 | */ |
622 | | INPUT_CHANGED_MEMBER( ti99_4x::load_interrupt ) |
| 622 | INPUT_CHANGED_MEMBER( ti99_4x_state::load_interrupt ) |
623 | 623 | { |
624 | 624 | m_cpu->set_input_line(INPUT_LINE_NMI, (newval==0)? ASSERT_LINE : CLEAR_LINE); |
625 | 625 | } |
r18258 | r18259 | |
634 | 634 | no chance to make another device pull down the same line; the CPU just |
635 | 635 | won't access any other device in this time. |
636 | 636 | */ |
637 | | WRITE_LINE_MEMBER( ti99_4x::console_ready ) |
| 637 | WRITE_LINE_MEMBER( ti99_4x_state::console_ready ) |
638 | 638 | { |
639 | 639 | m_ready_line = state; |
640 | 640 | int combined = (m_ready_line == ASSERT_LINE && m_ready_line_dmux == ASSERT_LINE)? ASSERT_LINE : CLEAR_LINE; |
r18258 | r18259 | |
650 | 650 | /* |
651 | 651 | The RESET line leading to a reset of the CPU. |
652 | 652 | */ |
653 | | WRITE_LINE_MEMBER( ti99_4x::console_reset ) |
| 653 | WRITE_LINE_MEMBER( ti99_4x_state::console_reset ) |
654 | 654 | { |
655 | 655 | if (machine().phase() != MACHINE_PHASE_INIT) |
656 | 656 | { |
r18258 | r18259 | |
664 | 664 | the READY line, and the datamux raises READY depending on the clock pulse. |
665 | 665 | So we must make sure this does not interfere. |
666 | 666 | */ |
667 | | WRITE_LINE_MEMBER( ti99_4x::console_ready_dmux ) |
| 667 | WRITE_LINE_MEMBER( ti99_4x_state::console_ready_dmux ) |
668 | 668 | { |
669 | 669 | m_ready_line_dmux = state; |
670 | 670 | int combined = (m_ready_line == ASSERT_LINE && m_ready_line_dmux == ASSERT_LINE)? ASSERT_LINE : CLEAR_LINE; |
r18258 | r18259 | |
677 | 677 | m_cpu->set_ready(combined); |
678 | 678 | } |
679 | 679 | |
680 | | WRITE_LINE_MEMBER( ti99_4x::extint ) |
| 680 | WRITE_LINE_MEMBER( ti99_4x_state::extint ) |
681 | 681 | { |
682 | 682 | if (VERBOSE>6) LOG("ti99_4x: EXTINT level = %02x\n", state); |
683 | 683 | if (m_tms9901 != NULL) |
684 | 684 | m_tms9901->set_single_int(1, state); |
685 | 685 | } |
686 | 686 | |
687 | | WRITE_LINE_MEMBER( ti99_4x::notconnected ) |
| 687 | WRITE_LINE_MEMBER( ti99_4x_state::notconnected ) |
688 | 688 | { |
689 | 689 | if (VERBOSE>6) LOG("ti99_4x: Setting a not connected line ... ignored\n"); |
690 | 690 | } |
r18258 | r18259 | |
695 | 695 | { |
696 | 696 | SCREEN_TAG, |
697 | 697 | 0x4000, |
698 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4x, set_tms9901_INT2) |
| 698 | DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, set_tms9901_INT2) |
699 | 699 | }; |
700 | 700 | |
701 | 701 | /* TMS9901 setup. */ |
r18258 | r18259 | |
704 | 704 | TMS9901_INT1 | TMS9901_INT2 | TMS9901_INTC, /* only input pins whose state is always known */ |
705 | 705 | |
706 | 706 | // read handler |
707 | | DEVCB_DRIVER_MEMBER(ti99_4x, read_by_9901), |
| 707 | DEVCB_DRIVER_MEMBER(ti99_4x_state, read_by_9901), |
708 | 708 | |
709 | 709 | // write handlers |
710 | 710 | { |
711 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4x, handset_ack), |
| 711 | DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, handset_ack), |
712 | 712 | DEVCB_NULL, |
713 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4x, keyC0), |
714 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4x, keyC1), |
715 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4x, keyC2), |
| 713 | DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, keyC0), |
| 714 | DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, keyC1), |
| 715 | DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, keyC2), |
716 | 716 | DEVCB_NULL, |
717 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4x, cs1_motor), |
718 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4x, cs2_motor), |
719 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4x, audio_gate), |
720 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4x, cassette_output), |
| 717 | DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, cs1_motor), |
| 718 | DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, cs2_motor), |
| 719 | DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, audio_gate), |
| 720 | DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, cassette_output), |
721 | 721 | DEVCB_NULL, |
722 | 722 | DEVCB_NULL, |
723 | 723 | DEVCB_NULL, |
r18258 | r18259 | |
727 | 727 | }, |
728 | 728 | |
729 | 729 | // interrupt handler |
730 | | DEVCB_DRIVER_MEMBER(ti99_4x, tms9901_interrupt) |
| 730 | DEVCB_DRIVER_MEMBER(ti99_4x_state, tms9901_interrupt) |
731 | 731 | }; |
732 | 732 | |
733 | 733 | const tms9901_interface tms9901_wiring_ti99_4a = |
r18258 | r18259 | |
735 | 735 | TMS9901_INT1 | TMS9901_INT2 | TMS9901_INTC, |
736 | 736 | |
737 | 737 | // read handler |
738 | | DEVCB_DRIVER_MEMBER(ti99_4x, read_by_9901), |
| 738 | DEVCB_DRIVER_MEMBER(ti99_4x_state, read_by_9901), |
739 | 739 | |
740 | 740 | // write handlers |
741 | 741 | { |
742 | 742 | DEVCB_NULL, |
743 | 743 | DEVCB_NULL, |
744 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4x, keyC0), |
745 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4x, keyC1), |
746 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4x, keyC2), |
747 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4x, alphaW), |
748 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4x, cs1_motor), |
749 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4x, cs2_motor), |
750 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4x, audio_gate), |
751 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4x, cassette_output), |
| 744 | DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, keyC0), |
| 745 | DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, keyC1), |
| 746 | DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, keyC2), |
| 747 | DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, alphaW), |
| 748 | DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, cs1_motor), |
| 749 | DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, cs2_motor), |
| 750 | DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, audio_gate), |
| 751 | DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, cassette_output), |
752 | 752 | DEVCB_NULL, |
753 | 753 | DEVCB_NULL, |
754 | 754 | DEVCB_NULL, |
r18258 | r18259 | |
757 | 757 | DEVCB_NULL |
758 | 758 | }, |
759 | 759 | |
760 | | DEVCB_DRIVER_MEMBER(ti99_4x, tms9901_interrupt) |
| 760 | DEVCB_DRIVER_MEMBER(ti99_4x_state, tms9901_interrupt) |
761 | 761 | }; |
762 | 762 | |
763 | 763 | /* |
r18258 | r18259 | |
796 | 796 | |
797 | 797 | static DMUX_CONFIG( datamux_conf ) |
798 | 798 | { |
799 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4x, console_ready_dmux), // READY |
| 799 | DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, console_ready_dmux), // READY |
800 | 800 | dmux_devices |
801 | 801 | }; |
802 | 802 | |
803 | 803 | static DMUX_CONFIG( datamux_conf_ev ) |
804 | 804 | { |
805 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4x, console_ready_dmux), // READY |
| 805 | DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, console_ready_dmux), // READY |
806 | 806 | dmux_devices_ev |
807 | 807 | }; |
808 | 808 | |
809 | 809 | static TMS99xx_CONFIG( ti99_cpuconf ) |
810 | 810 | { |
811 | | DEVCB_DRIVER_MEMBER(ti99_4x, external_operation), |
812 | | DEVCB_DRIVER_MEMBER(ti99_4x, interrupt_level), |
| 811 | DEVCB_DRIVER_MEMBER(ti99_4x_state, external_operation), |
| 812 | DEVCB_DRIVER_MEMBER(ti99_4x_state, interrupt_level), |
813 | 813 | DEVCB_NULL, // Instruction acquisition |
814 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4x, clock_out), |
| 814 | DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, clock_out), |
815 | 815 | DEVCB_NULL, // wait |
816 | 816 | DEVCB_NULL // Hold acknowledge |
817 | 817 | }; |
818 | 818 | |
819 | 819 | static JOYPORT_CONFIG( joyport4_60 ) |
820 | 820 | { |
821 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4x, set_tms9901_INT12), |
| 821 | DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, set_tms9901_INT12), |
822 | 822 | 60 |
823 | 823 | }; |
824 | 824 | |
825 | 825 | static JOYPORT_CONFIG( joyport4_50 ) |
826 | 826 | { |
827 | | DEVCB_DRIVER_LINE_MEMBER(ti99_4x, set_tms9901_INT12), |
| 827 | DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, set_tms9901_INT12), |
828 | 828 | 50 |
829 | 829 | }; |
830 | 830 | |
r18258 | r18259 | |
845 | 845 | Machine definitions |
846 | 846 | ******************************************************************************/ |
847 | 847 | |
848 | | MACHINE_START_MEMBER(ti99_4x,ti99_4) |
| 848 | MACHINE_START_MEMBER(ti99_4x_state,ti99_4) |
849 | 849 | { |
850 | 850 | |
851 | 851 | m_cpu = static_cast<tms9900_device*>(machine().device("maincpu")); |
r18258 | r18259 | |
867 | 867 | m_ready_line = m_ready_line_dmux = ASSERT_LINE; |
868 | 868 | } |
869 | 869 | |
870 | | MACHINE_RESET_MEMBER(ti99_4x,ti99_4) |
| 870 | MACHINE_RESET_MEMBER(ti99_4x_state,ti99_4) |
871 | 871 | { |
872 | 872 | m_cpu->set_ready(ASSERT_LINE); |
873 | 873 | m_cpu->set_hold(CLEAR_LINE); |
r18258 | r18259 | |
876 | 876 | /* |
877 | 877 | TI-99/4 - the predecessor of the more popular TI-99/4A |
878 | 878 | */ |
879 | | static MACHINE_CONFIG_START( ti99_4_60hz, ti99_4x ) |
| 879 | static MACHINE_CONFIG_START( ti99_4_60hz, ti99_4x_state ) |
880 | 880 | /* CPU */ |
881 | 881 | MCFG_TMS99xx_ADD("maincpu", TMS9900, 3000000, memmap, cru_map, ti99_cpuconf) |
882 | 882 | |
883 | | MCFG_MACHINE_START_OVERRIDE(ti99_4x, ti99_4 ) |
884 | | MCFG_MACHINE_RESET_OVERRIDE(ti99_4x, ti99_4 ) |
| 883 | MCFG_MACHINE_START_OVERRIDE(ti99_4x_state, ti99_4 ) |
| 884 | MCFG_MACHINE_RESET_OVERRIDE(ti99_4x_state, ti99_4 ) |
885 | 885 | |
886 | 886 | MCFG_TI_TMS991x_ADD_NTSC(VIDEO_SYSTEM_TAG, TMS9918, ti99_4_tms9928a_interface) |
887 | 887 | |
r18258 | r18259 | |
917 | 917 | |
918 | 918 | MACHINE_CONFIG_END |
919 | 919 | |
920 | | static MACHINE_CONFIG_START( ti99_4_50hz, ti99_4x ) |
| 920 | static MACHINE_CONFIG_START( ti99_4_50hz, ti99_4x_state ) |
921 | 921 | /* CPU */ |
922 | 922 | MCFG_TMS99xx_ADD("maincpu", TMS9900, 3000000, memmap, cru_map, ti99_cpuconf) |
923 | 923 | |
924 | | MCFG_MACHINE_START_OVERRIDE(ti99_4x, ti99_4 ) |
925 | | MCFG_MACHINE_RESET_OVERRIDE(ti99_4x, ti99_4 ) |
| 924 | MCFG_MACHINE_START_OVERRIDE(ti99_4x_state, ti99_4 ) |
| 925 | MCFG_MACHINE_RESET_OVERRIDE(ti99_4x_state, ti99_4 ) |
926 | 926 | |
927 | 927 | /* video hardware */ |
928 | 928 | MCFG_TI_TMS991x_ADD_PAL(VIDEO_SYSTEM_TAG, TMS9929, ti99_4_tms9928a_interface) |
r18258 | r18259 | |
963 | 963 | TI-99/4A - replaced the 99/4 |
964 | 964 | */ |
965 | 965 | |
966 | | MACHINE_START_MEMBER(ti99_4x,ti99_4a) |
| 966 | MACHINE_START_MEMBER(ti99_4x_state,ti99_4a) |
967 | 967 | { |
968 | 968 | |
969 | 969 | m_cpu = static_cast<tms9900_device*>(machine().device("maincpu")); |
r18258 | r18259 | |
982 | 982 | m_ready_line = m_ready_line_dmux = ASSERT_LINE; |
983 | 983 | } |
984 | 984 | |
985 | | MACHINE_RESET_MEMBER(ti99_4x,ti99_4a) |
| 985 | MACHINE_RESET_MEMBER(ti99_4x_state,ti99_4a) |
986 | 986 | { |
987 | 987 | m_cpu->set_ready(ASSERT_LINE); |
988 | 988 | m_cpu->set_hold(CLEAR_LINE); |
989 | 989 | } |
990 | 990 | |
991 | | static MACHINE_CONFIG_START( ti99_4a_60hz, ti99_4x ) |
| 991 | static MACHINE_CONFIG_START( ti99_4a_60hz, ti99_4x_state ) |
992 | 992 | /* CPU */ |
993 | 993 | MCFG_TMS99xx_ADD("maincpu", TMS9900, 3000000, memmap, cru_map, ti99_cpuconf) |
994 | 994 | |
995 | | MCFG_MACHINE_START_OVERRIDE(ti99_4x, ti99_4a ) |
996 | | MCFG_MACHINE_RESET_OVERRIDE(ti99_4x, ti99_4a ) |
| 995 | MCFG_MACHINE_START_OVERRIDE(ti99_4x_state, ti99_4a ) |
| 996 | MCFG_MACHINE_RESET_OVERRIDE(ti99_4x_state, ti99_4a ) |
997 | 997 | |
998 | 998 | /* Video hardware */ |
999 | 999 | MCFG_TI_TMS991x_ADD_NTSC(VIDEO_SYSTEM_TAG, TMS9918A, ti99_4_tms9928a_interface) |
r18258 | r18259 | |
1030 | 1030 | |
1031 | 1031 | MACHINE_CONFIG_END |
1032 | 1032 | |
1033 | | static MACHINE_CONFIG_START( ti99_4a_50hz, ti99_4x ) |
| 1033 | static MACHINE_CONFIG_START( ti99_4a_50hz, ti99_4x_state ) |
1034 | 1034 | /* CPU */ |
1035 | 1035 | MCFG_TMS99xx_ADD("maincpu", TMS9900, 3000000, memmap, cru_map, ti99_cpuconf) |
1036 | 1036 | |
1037 | | MCFG_MACHINE_START_OVERRIDE(ti99_4x, ti99_4a ) |
1038 | | MCFG_MACHINE_RESET_OVERRIDE(ti99_4x, ti99_4a ) |
| 1037 | MCFG_MACHINE_START_OVERRIDE(ti99_4x_state, ti99_4a ) |
| 1038 | MCFG_MACHINE_RESET_OVERRIDE(ti99_4x_state, ti99_4a ) |
1039 | 1039 | |
1040 | 1040 | /* Video hardware */ |
1041 | 1041 | MCFG_TI_TMS991x_ADD_PAL(VIDEO_SYSTEM_TAG, TMS9929A, ti99_4_tms9928a_interface) |
r18258 | r18259 | |
1073 | 1073 | MACHINE_CONFIG_END |
1074 | 1074 | |
1075 | 1075 | |
1076 | | TIMER_DEVICE_CALLBACK_MEMBER(ti99_4x::ti99_4ev_hblank_interrupt) |
| 1076 | TIMER_DEVICE_CALLBACK_MEMBER(ti99_4x_state::ti99_4ev_hblank_interrupt) |
1077 | 1077 | { |
1078 | 1078 | machine().device<v9938_device>(VDP_TAG)->interrupt(); |
1079 | 1079 | } |
r18258 | r18259 | |
1082 | 1082 | TI-99/4A with 80-column support. Actually a separate expansion card (EVPC), |
1083 | 1083 | replacing the console video processor. |
1084 | 1084 | */ |
1085 | | static MACHINE_CONFIG_START( ti99_4ev_60hz, ti99_4x ) |
| 1085 | static MACHINE_CONFIG_START( ti99_4ev_60hz, ti99_4x_state ) |
1086 | 1086 | /* CPU */ |
1087 | 1087 | MCFG_TMS99xx_ADD("maincpu", TMS9900, 3000000, memmap, cru_map, ti99_cpuconf) |
1088 | 1088 | |
1089 | | MCFG_MACHINE_START_OVERRIDE(ti99_4x, ti99_4a ) |
| 1089 | MCFG_MACHINE_START_OVERRIDE(ti99_4x_state, ti99_4a ) |
1090 | 1090 | |
1091 | 1091 | /* video hardware */ |
1092 | 1092 | // Although we should have a 60 Hz screen rate, we have to set it to 30 here. |
r18258 | r18259 | |
1094 | 1094 | // interlace mode, but in non-interlace modes only half of the lines are |
1095 | 1095 | // painted. Accordingly, the full set of lines is refreshed at 30 Hz, |
1096 | 1096 | // not 60 Hz. This should be fixed in the v9938 emulation. |
1097 | | MCFG_TI_V9938_ADD(VIDEO_SYSTEM_TAG, 30, SCREEN_TAG, 2500, 512+32, (212+28)*2, DEVICE_SELF, ti99_4x, set_tms9901_INT2_from_v9938) |
1098 | | MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", ti99_4x, ti99_4ev_hblank_interrupt, SCREEN_TAG, 0, 1) |
| 1097 | MCFG_TI_V9938_ADD(VIDEO_SYSTEM_TAG, 30, SCREEN_TAG, 2500, 512+32, (212+28)*2, DEVICE_SELF, ti99_4x_state, set_tms9901_INT2_from_v9938) |
| 1098 | MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", ti99_4x_state, ti99_4ev_hblank_interrupt, SCREEN_TAG, 0, 1) |
1099 | 1099 | |
1100 | 1100 | /* Main board */ |
1101 | 1101 | MCFG_TMS9901_ADD(TMS9901_TAG, tms9901_wiring_ti99_4a, 3000000) |
trunk/src/mess/drivers/geneve.c
r18258 | r18259 | |
219 | 219 | #define SRAM_SIZE 384*1024 // maximum SRAM expansion on-board |
220 | 220 | #define DRAM_SIZE 512*1024 |
221 | 221 | |
222 | | class geneve : public driver_device |
| 222 | class geneve_state : public driver_device |
223 | 223 | { |
224 | 224 | public: |
225 | | geneve(const machine_config &mconfig, device_type type, const char *tag) |
| 225 | geneve_state(const machine_config &mconfig, device_type type, const char *tag) |
226 | 226 | : driver_device(mconfig, type, tag) { } |
227 | 227 | |
228 | 228 | // CRU (Communication Register Unit) handling |
r18258 | r18259 | |
281 | 281 | Memory map |
282 | 282 | */ |
283 | 283 | |
284 | | static ADDRESS_MAP_START(memmap, AS_PROGRAM, 8, geneve) |
| 284 | static ADDRESS_MAP_START(memmap, AS_PROGRAM, 8, geneve_state) |
285 | 285 | AM_RANGE(0x0000, 0xffff) AM_DEVREADWRITE(GMAPPER_TAG, geneve_mapper_device, readm, writem) |
286 | 286 | ADDRESS_MAP_END |
287 | 287 | |
r18258 | r18259 | |
293 | 293 | TODO: Check whether A0-A2 are available for CRU addressing since those |
294 | 294 | bits are usually routed through the mapper first. |
295 | 295 | */ |
296 | | static ADDRESS_MAP_START(crumap, AS_IO, 8, geneve) |
| 296 | static ADDRESS_MAP_START(crumap, AS_IO, 8, geneve_state) |
297 | 297 | AM_RANGE(0x0000, 0x0003) AM_DEVREAD(TMS9901_TAG, tms9901_device, read) |
298 | 298 | AM_RANGE(0x0000, 0x0fff) AM_READ( cruread ) |
299 | 299 | |
r18258 | r18259 | |
337 | 337 | #define CRU_CONTROL_BASE 0x1ee0 |
338 | 338 | #define CRU_SSTEP_BASE 0x13c0 |
339 | 339 | |
340 | | WRITE8_MEMBER ( geneve::cruwrite ) |
| 340 | WRITE8_MEMBER ( geneve_state::cruwrite ) |
341 | 341 | { |
342 | 342 | int addroff = offset << 1; |
343 | 343 | |
r18258 | r18259 | |
407 | 407 | } |
408 | 408 | } |
409 | 409 | |
410 | | READ8_MEMBER( geneve::cruread ) |
| 410 | READ8_MEMBER( geneve_state::cruread ) |
411 | 411 | { |
412 | 412 | UINT8 value = 0; |
413 | 413 | int addroff = offset << 4; |
r18258 | r18259 | |
433 | 433 | CRU callbacks |
434 | 434 | ***********************************************************************/ |
435 | 435 | |
436 | | READ8_MEMBER( geneve::read_by_9901 ) |
| 436 | READ8_MEMBER( geneve_state::read_by_9901 ) |
437 | 437 | { |
438 | 438 | int answer = 0; |
439 | 439 | |
r18258 | r18259 | |
495 | 495 | /* |
496 | 496 | Write PE bus reset line |
497 | 497 | */ |
498 | | WRITE_LINE_MEMBER( geneve::peripheral_bus_reset ) |
| 498 | WRITE_LINE_MEMBER( geneve_state::peripheral_bus_reset ) |
499 | 499 | { |
500 | 500 | if (VERBOSE>0) LOG("geneve: peripheral bus reset request; not implemented yet.\n"); |
501 | 501 | } |
r18258 | r18259 | |
503 | 503 | /* |
504 | 504 | Write VDP reset line |
505 | 505 | */ |
506 | | WRITE_LINE_MEMBER( geneve::VDP_reset ) |
| 506 | WRITE_LINE_MEMBER( geneve_state::VDP_reset ) |
507 | 507 | { |
508 | 508 | if (VERBOSE>0) LOG("geneve: Video reset request; not implemented yet.\n"); |
509 | 509 | } |
r18258 | r18259 | |
511 | 511 | /* |
512 | 512 | Write joystick select line. 1 selects joystick 1 (pin 7), 0 selects joystick 2 (pin 2) |
513 | 513 | */ |
514 | | WRITE_LINE_MEMBER( geneve::joystick_select ) |
| 514 | WRITE_LINE_MEMBER( geneve_state::joystick_select ) |
515 | 515 | { |
516 | 516 | m_joyport->write_port((state==ASSERT_LINE)? 1:2); |
517 | 517 | } |
r18258 | r18259 | |
519 | 519 | /* |
520 | 520 | Write external mem cycles (0=long, 1=short) |
521 | 521 | */ |
522 | | WRITE_LINE_MEMBER( geneve::extbus_wait_states ) |
| 522 | WRITE_LINE_MEMBER( geneve_state::extbus_wait_states ) |
523 | 523 | { |
524 | 524 | if (VERBOSE>0) LOG("geneve: external bus wait states set to %d, not implemented yet.\n", state); |
525 | 525 | } |
r18258 | r18259 | |
528 | 528 | Write vdp wait cycles (1=add 14 cycles, 0=add none) |
529 | 529 | see above for waitstate handling |
530 | 530 | */ |
531 | | WRITE_LINE_MEMBER( geneve::video_wait_states ) |
| 531 | WRITE_LINE_MEMBER( geneve_state::video_wait_states ) |
532 | 532 | { |
533 | 533 | if (VERBOSE>1) LOG("geneve: video wait states set to %d\n", state); |
534 | 534 | m_mapper->set_video_waitstates(state==ASSERT_LINE); |
r18258 | r18259 | |
541 | 541 | but again it is ignored. Anyway, the TMS9995 has only two external inputs |
542 | 542 | (INT1 and INT4). |
543 | 543 | */ |
544 | | WRITE8_MEMBER( geneve::tms9901_interrupt ) |
| 544 | WRITE8_MEMBER( geneve_state::tms9901_interrupt ) |
545 | 545 | { |
546 | 546 | /* INTREQ is connected to INT1. */ |
547 | 547 | m_cpu->set_input_line(INPUT_LINE_99XX_INT1, data); |
r18258 | r18259 | |
553 | 553 | TMS9901_INT1 | TMS9901_INT2 | TMS9901_INT8 | TMS9901_INTB | TMS9901_INTC, /* only input pins whose state is always known */ |
554 | 554 | |
555 | 555 | // read handler |
556 | | DEVCB_DRIVER_MEMBER(geneve, read_by_9901), |
| 556 | DEVCB_DRIVER_MEMBER(geneve_state, read_by_9901), |
557 | 557 | |
558 | 558 | { /* write handlers */ |
559 | | DEVCB_DRIVER_LINE_MEMBER(geneve, peripheral_bus_reset), |
560 | | DEVCB_DRIVER_LINE_MEMBER(geneve, VDP_reset), |
561 | | DEVCB_DRIVER_LINE_MEMBER(geneve, joystick_select), |
| 559 | DEVCB_DRIVER_LINE_MEMBER(geneve_state, peripheral_bus_reset), |
| 560 | DEVCB_DRIVER_LINE_MEMBER(geneve_state, VDP_reset), |
| 561 | DEVCB_DRIVER_LINE_MEMBER(geneve_state, joystick_select), |
562 | 562 | DEVCB_NULL, |
563 | 563 | DEVCB_NULL, |
564 | 564 | DEVCB_NULL, |
565 | 565 | DEVCB_DEVICE_LINE_MEMBER(GKEYBOARD_TAG, geneve_keyboard_device, reset_line), |
566 | | DEVCB_DRIVER_LINE_MEMBER(geneve, extbus_wait_states), |
| 566 | DEVCB_DRIVER_LINE_MEMBER(geneve_state, extbus_wait_states), |
567 | 567 | DEVCB_NULL, |
568 | | DEVCB_DRIVER_LINE_MEMBER(geneve, video_wait_states), |
| 568 | DEVCB_DRIVER_LINE_MEMBER(geneve_state, video_wait_states), |
569 | 569 | DEVCB_NULL, |
570 | 570 | DEVCB_NULL, |
571 | 571 | DEVCB_NULL, |
r18258 | r18259 | |
575 | 575 | }, |
576 | 576 | |
577 | 577 | /* interrupt handler */ |
578 | | DEVCB_DRIVER_MEMBER(geneve, tms9901_interrupt) |
| 578 | DEVCB_DRIVER_MEMBER(geneve_state, tms9901_interrupt) |
579 | 579 | }; |
580 | 580 | |
581 | 581 | /******************************************************************* |
r18258 | r18259 | |
584 | 584 | /* |
585 | 585 | inta is connected to both tms9901 IRQ1 line and to tms9995 INT4/EC line. |
586 | 586 | */ |
587 | | WRITE_LINE_MEMBER( geneve::inta ) |
| 587 | WRITE_LINE_MEMBER( geneve_state::inta ) |
588 | 588 | { |
589 | 589 | m_inta = (state!=0)? ASSERT_LINE : CLEAR_LINE; |
590 | 590 | m_tms9901->set_single_int(1, state); |
r18258 | r18259 | |
594 | 594 | /* |
595 | 595 | intb is connected to tms9901 IRQ12 line. |
596 | 596 | */ |
597 | | WRITE_LINE_MEMBER( geneve::intb ) |
| 597 | WRITE_LINE_MEMBER( geneve_state::intb ) |
598 | 598 | { |
599 | 599 | m_intb = (state!=0)? ASSERT_LINE : CLEAR_LINE; |
600 | 600 | m_tms9901->set_single_int(12, state); |
601 | 601 | } |
602 | 602 | |
603 | | WRITE_LINE_MEMBER( geneve::ext_ready ) |
| 603 | WRITE_LINE_MEMBER( geneve_state::ext_ready ) |
604 | 604 | { |
605 | 605 | if (VERBOSE>6) LOG("ti99_8: READY level (ext) =%02x\n", state); |
606 | 606 | m_ready_line = state; |
607 | 607 | m_cpu->set_ready((m_ready_line == ASSERT_LINE && m_ready_line1 == ASSERT_LINE)? ASSERT_LINE : CLEAR_LINE); |
608 | 608 | } |
609 | 609 | |
610 | | WRITE_LINE_MEMBER( geneve::mapper_ready ) |
| 610 | WRITE_LINE_MEMBER( geneve_state::mapper_ready ) |
611 | 611 | { |
612 | 612 | if (VERBOSE>6) LOG("geneve: READY level (mapper) = %02x\n", state); |
613 | 613 | m_ready_line1 = state; |
r18258 | r18259 | |
617 | 617 | /* |
618 | 618 | set the state of int2 (called by the v9938 core) |
619 | 619 | */ |
620 | | void geneve::set_tms9901_INT2_from_v9938(v99x8_device &vdp, int state) |
| 620 | void geneve_state::set_tms9901_INT2_from_v9938(v99x8_device &vdp, int state) |
621 | 621 | { |
622 | 622 | m_int2 = (state!=0)? ASSERT_LINE : CLEAR_LINE; |
623 | 623 | m_tms9901->set_single_int(2, state); |
r18258 | r18259 | |
626 | 626 | /* |
627 | 627 | Interrupt from the keyboard. |
628 | 628 | */ |
629 | | WRITE_LINE_MEMBER( geneve::keyboard_interrupt ) |
| 629 | WRITE_LINE_MEMBER( geneve_state::keyboard_interrupt ) |
630 | 630 | { |
631 | 631 | m_keyint = (state!=0)? ASSERT_LINE : CLEAR_LINE; |
632 | 632 | m_tms9901->set_single_int(8, state); |
r18258 | r18259 | |
635 | 635 | /* |
636 | 636 | scanline interrupt |
637 | 637 | */ |
638 | | TIMER_DEVICE_CALLBACK_MEMBER(geneve::geneve_hblank_interrupt) |
| 638 | TIMER_DEVICE_CALLBACK_MEMBER(geneve_state::geneve_hblank_interrupt) |
639 | 639 | { |
640 | 640 | int scanline = param; |
641 | 641 | |
r18258 | r18259 | |
653 | 653 | } |
654 | 654 | } |
655 | 655 | |
656 | | WRITE8_MEMBER( geneve::external_operation ) |
| 656 | WRITE8_MEMBER( geneve_state::external_operation ) |
657 | 657 | { |
658 | 658 | static const char* extop[8] = { "inv1", "inv2", "IDLE", "RSET", "inv3", "CKON", "CKOF", "LREX" }; |
659 | 659 | if (VERBOSE>1) |
r18258 | r18259 | |
663 | 663 | /* |
664 | 664 | Clock line from the CPU. Used to control wait state generation. |
665 | 665 | */ |
666 | | WRITE_LINE_MEMBER( geneve::clock_out ) |
| 666 | WRITE_LINE_MEMBER( geneve_state::clock_out ) |
667 | 667 | { |
668 | 668 | m_mapper->clock_in(state); |
669 | 669 | } |
670 | 670 | |
671 | 671 | static TMS9995_CONFIG( geneve_processor_config ) |
672 | 672 | { |
673 | | DEVCB_DRIVER_MEMBER(geneve, external_operation), |
| 673 | DEVCB_DRIVER_MEMBER(geneve_state, external_operation), |
674 | 674 | DEVCB_NULL, // Instruction acquisition |
675 | | DEVCB_DRIVER_LINE_MEMBER(geneve, clock_out), |
| 675 | DEVCB_DRIVER_LINE_MEMBER(geneve_state, clock_out), |
676 | 676 | DEVCB_NULL, // wait |
677 | 677 | DEVCB_NULL, // HOLDA |
678 | 678 | INTERNAL_RAM, // use internal RAM |
r18258 | r18259 | |
681 | 681 | |
682 | 682 | static TI_SOUND_CONFIG( sound_conf ) |
683 | 683 | { |
684 | | DEVCB_DRIVER_LINE_MEMBER(geneve, ext_ready) // READY |
| 684 | DEVCB_DRIVER_LINE_MEMBER(geneve_state, ext_ready) // READY |
685 | 685 | }; |
686 | 686 | |
687 | 687 | static const mm58274c_interface geneve_mm58274c_interface = |
r18258 | r18259 | |
692 | 692 | |
693 | 693 | static GENEVE_KEYBOARD_CONFIG( geneve_keyb_conf ) |
694 | 694 | { |
695 | | DEVCB_DRIVER_LINE_MEMBER(geneve, keyboard_interrupt) |
| 695 | DEVCB_DRIVER_LINE_MEMBER(geneve_state, keyboard_interrupt) |
696 | 696 | }; |
697 | 697 | |
698 | 698 | static PERIBOX_CONFIG( peribox_conf ) |
699 | 699 | { |
700 | | DEVCB_DRIVER_LINE_MEMBER(geneve, inta), // INTA |
701 | | DEVCB_DRIVER_LINE_MEMBER(geneve, intb), // INTB |
702 | | DEVCB_DRIVER_LINE_MEMBER(geneve, ext_ready), // READY |
| 700 | DEVCB_DRIVER_LINE_MEMBER(geneve_state, inta), // INTA |
| 701 | DEVCB_DRIVER_LINE_MEMBER(geneve_state, intb), // INTB |
| 702 | DEVCB_DRIVER_LINE_MEMBER(geneve_state, ext_ready), // READY |
703 | 703 | 0x00000 // Address bus prefix (Mapper will produce prefixes) |
704 | 704 | }; |
705 | 705 | |
706 | 706 | static GENEVE_MAPPER_CONFIG( mapper_conf ) |
707 | 707 | { |
708 | | DEVCB_DRIVER_LINE_MEMBER(geneve, mapper_ready) // READY |
| 708 | DEVCB_DRIVER_LINE_MEMBER(geneve_state, mapper_ready) // READY |
709 | 709 | }; |
710 | 710 | |
711 | 711 | static JOYPORT_CONFIG( joyport_60 ) |
r18258 | r18259 | |
714 | 714 | 60 |
715 | 715 | }; |
716 | 716 | |
717 | | DRIVER_INIT_MEMBER(geneve,geneve) |
| 717 | DRIVER_INIT_MEMBER(geneve_state,geneve) |
718 | 718 | { |
719 | 719 | } |
720 | 720 | |
721 | | void geneve::machine_start() |
| 721 | void geneve_state::machine_start() |
722 | 722 | { |
723 | 723 | m_tms9901 = static_cast<tms9901_device*>(machine().device(TMS9901_TAG)); |
724 | 724 | m_mapper = static_cast<geneve_mapper_device*>(machine().device(GMAPPER_TAG)); |
r18258 | r18259 | |
732 | 732 | /* |
733 | 733 | Reset the machine. |
734 | 734 | */ |
735 | | void geneve::machine_reset() |
| 735 | void geneve_state::machine_reset() |
736 | 736 | { |
737 | 737 | m_inta = CLEAR_LINE; // flag reflecting the INTA line |
738 | 738 | m_intb = CLEAR_LINE; // flag reflecting the INTB line |
r18258 | r18259 | |
750 | 750 | m_joyport->write_port(0x01); // select Joystick 1 |
751 | 751 | } |
752 | 752 | |
753 | | static MACHINE_CONFIG_START( geneve_60hz, geneve ) |
| 753 | static MACHINE_CONFIG_START( geneve_60hz, geneve_state ) |
754 | 754 | // basic machine hardware |
755 | 755 | // TMS9995 CPU @ 12.0 MHz |
756 | 756 | MCFG_TMS9995_ADD("maincpu", TMS9995, 12000000, memmap, crumap, geneve_processor_config) |
r18258 | r18259 | |
762 | 762 | // interlace mode, but in non-interlace modes only half of the lines are |
763 | 763 | // painted. Accordingly, the full set of lines is refreshed at 30 Hz, |
764 | 764 | // not 60 Hz. This should be fixed in the v9938 emulation. |
765 | | MCFG_TI_V9938_ADD(VIDEO_SYSTEM_TAG, 30, SCREEN_TAG, 2500, 512+32, (212+28)*2, DEVICE_SELF, geneve, set_tms9901_INT2_from_v9938) |
766 | | MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", geneve, geneve_hblank_interrupt, SCREEN_TAG, 0, 1) /* 262.5 in 60Hz, 312.5 in 50Hz */ |
| 765 | MCFG_TI_V9938_ADD(VIDEO_SYSTEM_TAG, 30, SCREEN_TAG, 2500, 512+32, (212+28)*2, DEVICE_SELF, geneve_state, set_tms9901_INT2_from_v9938) |
| 766 | MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", geneve_state, geneve_hblank_interrupt, SCREEN_TAG, 0, 1) /* 262.5 in 60Hz, 312.5 in 50Hz */ |
767 | 767 | |
768 | 768 | // Main board components |
769 | 769 | MCFG_TMS9901_ADD(TMS9901_TAG, tms9901_wiring_geneve, 3000000) |
r18258 | r18259 | |
802 | 802 | ROM_END |
803 | 803 | |
804 | 804 | /* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME */ |
805 | | COMP( 1987,geneve, 0, 0, geneve_60hz, geneve, geneve, geneve, "Myarc", "Geneve 9640" , 0) |
| 805 | COMP( 1987,geneve, 0, 0, geneve_60hz, geneve, geneve_state, geneve, "Myarc", "Geneve 9640" , 0) |
trunk/src/mess/drivers/tm990189.c
r18258 | r18259 | |
69 | 69 | #include "tm990189v.lh" |
70 | 70 | |
71 | 71 | |
72 | | class tm990189 : public driver_device |
| 72 | class tm990189_state : public driver_device |
73 | 73 | { |
74 | 74 | public: |
75 | | tm990189(const machine_config &mconfig, device_type type, const char *tag) |
| 75 | tm990189_state(const machine_config &mconfig, device_type type, const char *tag) |
76 | 76 | : driver_device(mconfig, type, tag), |
77 | 77 | m_tms9980a(*this, "maincpu"), |
78 | 78 | m_speaker(*this, SPEAKER_TAG), |
r18258 | r18259 | |
161 | 161 | |
162 | 162 | |
163 | 163 | |
164 | | MACHINE_RESET_MEMBER(tm990189,tm990_189) |
| 164 | MACHINE_RESET_MEMBER(tm990189_state,tm990_189) |
165 | 165 | { |
166 | 166 | m_tms9980a->set_ready(ASSERT_LINE); |
167 | 167 | m_tms9980a->set_hold(CLEAR_LINE); |
168 | 168 | hold_load(machine()); |
169 | 169 | } |
170 | 170 | |
171 | | MACHINE_START_MEMBER(tm990189,tm990_189) |
| 171 | MACHINE_START_MEMBER(tm990189_state,tm990_189) |
172 | 172 | { |
173 | 173 | m_displayena_timer = machine().scheduler().timer_alloc(FUNC_NULL); |
174 | 174 | } |
r18258 | r18259 | |
180 | 180 | DEVCB_NULL |
181 | 181 | }; |
182 | 182 | |
183 | | MACHINE_START_MEMBER(tm990189,tm990_189_v) |
| 183 | MACHINE_START_MEMBER(tm990189_state,tm990_189_v) |
184 | 184 | { |
185 | 185 | |
186 | 186 | m_displayena_timer = machine().scheduler().timer_alloc(FUNC_NULL); |
r18258 | r18259 | |
191 | 191 | m_joy2y_timer = machine().scheduler().timer_alloc(FUNC_NULL); |
192 | 192 | } |
193 | 193 | |
194 | | MACHINE_RESET_MEMBER(tm990189,tm990_189_v) |
| 194 | MACHINE_RESET_MEMBER(tm990189_state,tm990_189_v) |
195 | 195 | { |
196 | 196 | m_tms9980a->set_ready(ASSERT_LINE); |
197 | 197 | m_tms9980a->set_hold(CLEAR_LINE); |
r18258 | r18259 | |
201 | 201 | /* |
202 | 202 | Will be called back from the CPU when triggering an interrupt. |
203 | 203 | */ |
204 | | READ8_MEMBER( tm990189::interrupt_level ) |
| 204 | READ8_MEMBER( tm990189_state::interrupt_level ) |
205 | 205 | { |
206 | 206 | return m_ic_state; |
207 | 207 | } |
r18258 | r18259 | |
212 | 212 | |
213 | 213 | static TIMER_CALLBACK(clear_load) |
214 | 214 | { |
215 | | tm990189 *state = machine.driver_data<tm990189>(); |
| 215 | tm990189_state *state = machine.driver_data<tm990189_state>(); |
216 | 216 | state->m_load_state = FALSE; |
217 | 217 | state->m_tms9980a->set_input_line(0, CLEAR_LINE); |
218 | 218 | } |
219 | 219 | |
220 | 220 | static void hold_load(running_machine &machine) |
221 | 221 | { |
222 | | tm990189 *state = machine.driver_data<tm990189>(); |
| 222 | tm990189_state *state = machine.driver_data<tm990189_state>(); |
223 | 223 | state->m_load_state = TRUE; |
224 | 224 | state->m_ic_state = 2; // LOAD interrupt |
225 | 225 | state->m_tms9980a->set_input_line(0, ASSERT_LINE); |
r18258 | r18259 | |
229 | 229 | /* |
230 | 230 | LOAD interrupt switch |
231 | 231 | */ |
232 | | INPUT_CHANGED_MEMBER( tm990189::load_interrupt ) |
| 232 | INPUT_CHANGED_MEMBER( tm990189_state::load_interrupt ) |
233 | 233 | { |
234 | 234 | // When depressed, fire LOAD (neg logic) |
235 | 235 | if (newval==CLEAR_LINE) hold_load(machine()); |
r18258 | r18259 | |
243 | 243 | Supports EIA and TTY terminals, and an optional 9918 controller. |
244 | 244 | */ |
245 | 245 | |
246 | | void tm990189::draw_digit() |
| 246 | void tm990189_state::draw_digit() |
247 | 247 | { |
248 | 248 | m_segment_state[m_digitsel] |= ~m_segment; |
249 | 249 | } |
250 | 250 | |
251 | 251 | |
252 | | TIMER_DEVICE_CALLBACK_MEMBER(tm990189::display_callback) |
| 252 | TIMER_DEVICE_CALLBACK_MEMBER(tm990189_state::display_callback) |
253 | 253 | { |
254 | 254 | UINT8 i; |
255 | 255 | char ledname[8]; |
r18258 | r18259 | |
275 | 275 | tms9901 code |
276 | 276 | */ |
277 | 277 | |
278 | | WRITE8_MEMBER( tm990189::usr9901_interrupt_callback ) |
| 278 | WRITE8_MEMBER( tm990189_state::usr9901_interrupt_callback ) |
279 | 279 | { |
280 | 280 | // Triggered by internal timer (set by ROM to 1.6 ms cycle) on level 3 |
281 | 281 | // or by keyboard interrupt (level 6) |
r18258 | r18259 | |
286 | 286 | } |
287 | 287 | } |
288 | 288 | |
289 | | void tm990189::led_set(int offset, bool state) |
| 289 | void tm990189_state::led_set(int offset, bool state) |
290 | 290 | { |
291 | 291 | if (state) |
292 | 292 | m_LED_state |= (1 << offset); |
r18258 | r18259 | |
294 | 294 | m_LED_state &= ~(1 << offset); |
295 | 295 | } |
296 | 296 | |
297 | | WRITE_LINE_MEMBER( tm990189::usr9901_led0_w ) |
| 297 | WRITE_LINE_MEMBER( tm990189_state::usr9901_led0_w ) |
298 | 298 | { |
299 | 299 | led_set(0, state); |
300 | 300 | } |
301 | 301 | |
302 | | WRITE_LINE_MEMBER( tm990189::usr9901_led1_w ) |
| 302 | WRITE_LINE_MEMBER( tm990189_state::usr9901_led1_w ) |
303 | 303 | { |
304 | 304 | led_set(1, state); |
305 | 305 | } |
306 | 306 | |
307 | | WRITE_LINE_MEMBER( tm990189::usr9901_led2_w ) |
| 307 | WRITE_LINE_MEMBER( tm990189_state::usr9901_led2_w ) |
308 | 308 | { |
309 | 309 | led_set(2, state); |
310 | 310 | } |
311 | 311 | |
312 | | WRITE_LINE_MEMBER( tm990189::usr9901_led3_w ) |
| 312 | WRITE_LINE_MEMBER( tm990189_state::usr9901_led3_w ) |
313 | 313 | { |
314 | 314 | led_set(3, state); |
315 | 315 | } |
316 | 316 | |
317 | | WRITE8_MEMBER( tm990189::sys9901_interrupt_callback ) |
| 317 | WRITE8_MEMBER( tm990189_state::sys9901_interrupt_callback ) |
318 | 318 | { |
319 | 319 | machine().device<tms9901_device>("tms9901_0")->set_single_int(5, (data!=0)? ASSERT_LINE:CLEAR_LINE); |
320 | 320 | } |
321 | 321 | |
322 | | READ8_MEMBER( tm990189::sys9901_r ) |
| 322 | READ8_MEMBER( tm990189_state::sys9901_r ) |
323 | 323 | { |
324 | 324 | UINT8 data = 0; |
325 | 325 | if (offset == TMS9901_CB_INT7) |
r18258 | r18259 | |
338 | 338 | return data; |
339 | 339 | } |
340 | 340 | |
341 | | void tm990189::digitsel(int offset, bool state) |
| 341 | void tm990189_state::digitsel(int offset, bool state) |
342 | 342 | { |
343 | 343 | if (state) |
344 | 344 | m_digitsel |= 1 << offset; |
r18258 | r18259 | |
346 | 346 | m_digitsel &= ~ (1 << offset); |
347 | 347 | } |
348 | 348 | |
349 | | WRITE_LINE_MEMBER( tm990189::sys9901_digitsel0_w ) |
| 349 | WRITE_LINE_MEMBER( tm990189_state::sys9901_digitsel0_w ) |
350 | 350 | { |
351 | 351 | digitsel(0, state); |
352 | 352 | } |
353 | | WRITE_LINE_MEMBER( tm990189::sys9901_digitsel1_w ) |
| 353 | WRITE_LINE_MEMBER( tm990189_state::sys9901_digitsel1_w ) |
354 | 354 | { |
355 | 355 | digitsel(1, state); |
356 | 356 | } |
357 | | WRITE_LINE_MEMBER( tm990189::sys9901_digitsel2_w ) |
| 357 | WRITE_LINE_MEMBER( tm990189_state::sys9901_digitsel2_w ) |
358 | 358 | { |
359 | 359 | digitsel(2, state); |
360 | 360 | } |
361 | | WRITE_LINE_MEMBER( tm990189::sys9901_digitsel3_w ) |
| 361 | WRITE_LINE_MEMBER( tm990189_state::sys9901_digitsel3_w ) |
362 | 362 | { |
363 | 363 | digitsel(3, state); |
364 | 364 | } |
365 | 365 | |
366 | 366 | |
367 | | void tm990189::segment_set(int offset, bool state) |
| 367 | void tm990189_state::segment_set(int offset, bool state) |
368 | 368 | { |
369 | 369 | if (state) |
370 | 370 | m_segment |= 1 << offset; |
r18258 | r18259 | |
376 | 376 | } |
377 | 377 | } |
378 | 378 | |
379 | | WRITE_LINE_MEMBER( tm990189::sys9901_segment0_w ) |
| 379 | WRITE_LINE_MEMBER( tm990189_state::sys9901_segment0_w ) |
380 | 380 | { |
381 | 381 | segment_set(0, state); |
382 | 382 | } |
383 | | WRITE_LINE_MEMBER( tm990189::sys9901_segment1_w ) |
| 383 | WRITE_LINE_MEMBER( tm990189_state::sys9901_segment1_w ) |
384 | 384 | { |
385 | 385 | segment_set(1, state); |
386 | 386 | } |
387 | | WRITE_LINE_MEMBER( tm990189::sys9901_segment2_w ) |
| 387 | WRITE_LINE_MEMBER( tm990189_state::sys9901_segment2_w ) |
388 | 388 | { |
389 | 389 | segment_set(2, state); |
390 | 390 | } |
391 | | WRITE_LINE_MEMBER( tm990189::sys9901_segment3_w ) |
| 391 | WRITE_LINE_MEMBER( tm990189_state::sys9901_segment3_w ) |
392 | 392 | { |
393 | 393 | segment_set(3, state); |
394 | 394 | } |
395 | | WRITE_LINE_MEMBER( tm990189::sys9901_segment4_w ) |
| 395 | WRITE_LINE_MEMBER( tm990189_state::sys9901_segment4_w ) |
396 | 396 | { |
397 | 397 | segment_set(4, state); |
398 | 398 | } |
399 | | WRITE_LINE_MEMBER( tm990189::sys9901_segment5_w ) |
| 399 | WRITE_LINE_MEMBER( tm990189_state::sys9901_segment5_w ) |
400 | 400 | { |
401 | 401 | segment_set(5, state); |
402 | 402 | } |
403 | | WRITE_LINE_MEMBER( tm990189::sys9901_segment6_w ) |
| 403 | WRITE_LINE_MEMBER( tm990189_state::sys9901_segment6_w ) |
404 | 404 | { |
405 | 405 | segment_set(6, state); |
406 | 406 | } |
407 | | WRITE_LINE_MEMBER( tm990189::sys9901_segment7_w ) |
| 407 | WRITE_LINE_MEMBER( tm990189_state::sys9901_segment7_w ) |
408 | 408 | { |
409 | 409 | segment_set(7, state); |
410 | 410 | } |
411 | 411 | |
412 | | WRITE_LINE_MEMBER( tm990189::sys9901_dsplytrgr_w ) |
| 412 | WRITE_LINE_MEMBER( tm990189_state::sys9901_dsplytrgr_w ) |
413 | 413 | { |
414 | 414 | if ((!state) && (m_digitsel < 10)) |
415 | 415 | { |
r18258 | r18259 | |
418 | 418 | } |
419 | 419 | } |
420 | 420 | |
421 | | WRITE_LINE_MEMBER( tm990189::sys9901_shiftlight_w ) |
| 421 | WRITE_LINE_MEMBER( tm990189_state::sys9901_shiftlight_w ) |
422 | 422 | { |
423 | 423 | if (state) |
424 | 424 | m_LED_state |= 0x10; |
r18258 | r18259 | |
426 | 426 | m_LED_state &= ~0x10; |
427 | 427 | } |
428 | 428 | |
429 | | WRITE_LINE_MEMBER( tm990189::sys9901_spkrdrive_w ) |
| 429 | WRITE_LINE_MEMBER( tm990189_state::sys9901_spkrdrive_w ) |
430 | 430 | { |
431 | 431 | device_t *speaker = machine().device(SPEAKER_TAG); |
432 | 432 | speaker_level_w(speaker, state); |
433 | 433 | } |
434 | 434 | |
435 | | WRITE_LINE_MEMBER( tm990189::sys9901_tapewdata_w ) |
| 435 | WRITE_LINE_MEMBER( tm990189_state::sys9901_tapewdata_w ) |
436 | 436 | { |
437 | 437 | machine().device<cassette_image_device>(CASSETTE_TAG)->output(state ? +1.0 : -1.0); |
438 | 438 | } |
r18258 | r18259 | |
486 | 486 | |
487 | 487 | void tm990_189_rs232_image_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) |
488 | 488 | { |
489 | | //tm990189 *state = machine.driver_data<tm990189>(); |
| 489 | //tm990189_state *state = machine.driver_data<tm990189_state>(); |
490 | 490 | UINT8 buf; |
491 | 491 | if (/*state->m_rs232_rts &&*/ /*(mame_ftell(state->m_rs232_fp) < mame_fsize(state->m_rs232_fp))*/1) |
492 | 492 | { |
r18258 | r18259 | |
498 | 498 | |
499 | 499 | bool tm990_189_rs232_image_device::call_load() |
500 | 500 | { |
501 | | tm990189 *state = machine().driver_data<tm990189>(); |
| 501 | tm990189_state *state = machine().driver_data<tm990189_state>(); |
502 | 502 | tms9902_device* tms9902 = static_cast<tms9902_device*>(machine().device("tms9902")); |
503 | 503 | tms9902->rcv_dsr(ASSERT_LINE); |
504 | 504 | state->m_rs232_input_timer = timer_alloc(); |
r18258 | r18259 | |
509 | 509 | |
510 | 510 | void tm990_189_rs232_image_device::call_unload() |
511 | 511 | { |
512 | | tm990189 *state = machine().driver_data<tm990189>(); |
| 512 | tm990189_state *state = machine().driver_data<tm990189_state>(); |
513 | 513 | tms9902_device* tms9902 = static_cast<tms9902_device*>(machine().device("tms9902")); |
514 | 514 | tms9902->rcv_dsr(CLEAR_LINE); |
515 | 515 | |
r18258 | r18259 | |
527 | 527 | tms9902->set_cts(RTS); |
528 | 528 | } */ |
529 | 529 | |
530 | | WRITE8_MEMBER( tm990189::xmit_callback ) |
| 530 | WRITE8_MEMBER( tm990189_state::xmit_callback ) |
531 | 531 | { |
532 | 532 | UINT8 buf = data; |
533 | 533 | if (m_rs232_fp) m_rs232_fp->fwrite(&buf, 1); |
r18258 | r18259 | |
536 | 536 | /* |
537 | 537 | External instruction decoding |
538 | 538 | */ |
539 | | WRITE8_MEMBER( tm990189::external_operation ) |
| 539 | WRITE8_MEMBER( tm990189_state::external_operation ) |
540 | 540 | { |
541 | 541 | switch (offset) |
542 | 542 | { |
r18258 | r18259 | |
569 | 569 | Video Board handling |
570 | 570 | */ |
571 | 571 | |
572 | | READ8_MEMBER( tm990189::video_vdp_r ) |
| 572 | READ8_MEMBER( tm990189_state::video_vdp_r ) |
573 | 573 | { |
574 | 574 | int reply = 0; |
575 | 575 | |
r18258 | r18259 | |
600 | 600 | return reply; |
601 | 601 | } |
602 | 602 | |
603 | | WRITE8_MEMBER( tm990189::video_vdp_w ) |
| 603 | WRITE8_MEMBER( tm990189_state::video_vdp_w ) |
604 | 604 | { |
605 | 605 | if (offset & 1) |
606 | 606 | { |
r18258 | r18259 | |
611 | 611 | } |
612 | 612 | } |
613 | 613 | |
614 | | READ8_MEMBER( tm990189::video_joy_r ) |
| 614 | READ8_MEMBER( tm990189_state::video_joy_r ) |
615 | 615 | { |
616 | 616 | UINT8 data = ioport("BUTTONS")->read(); |
617 | 617 | |
r18258 | r18259 | |
630 | 630 | return data; |
631 | 631 | } |
632 | 632 | |
633 | | WRITE8_MEMBER( tm990189::video_joy_w ) |
| 633 | WRITE8_MEMBER( tm990189_state::video_joy_w ) |
634 | 634 | { |
635 | 635 | m_joy1x_timer->reset(attotime::from_usec(ioport("JOY1_X")->read()*28+28)); |
636 | 636 | m_joy1y_timer->reset(attotime::from_usec(ioport("JOY1_Y")->read()*28+28)); |
r18258 | r18259 | |
648 | 648 | |
649 | 649 | /* write handlers */ |
650 | 650 | { |
651 | | DEVCB_DRIVER_LINE_MEMBER(tm990189, usr9901_led0_w), |
652 | | DEVCB_DRIVER_LINE_MEMBER(tm990189, usr9901_led1_w), |
653 | | DEVCB_DRIVER_LINE_MEMBER(tm990189, usr9901_led2_w), |
654 | | DEVCB_DRIVER_LINE_MEMBER(tm990189, usr9901_led3_w), |
| 651 | DEVCB_DRIVER_LINE_MEMBER(tm990189_state, usr9901_led0_w), |
| 652 | DEVCB_DRIVER_LINE_MEMBER(tm990189_state, usr9901_led1_w), |
| 653 | DEVCB_DRIVER_LINE_MEMBER(tm990189_state, usr9901_led2_w), |
| 654 | DEVCB_DRIVER_LINE_MEMBER(tm990189_state, usr9901_led3_w), |
655 | 655 | DEVCB_NULL, |
656 | 656 | DEVCB_NULL, |
657 | 657 | DEVCB_NULL, |
r18258 | r18259 | |
667 | 667 | }, |
668 | 668 | |
669 | 669 | /* interrupt handler */ |
670 | | DEVCB_DRIVER_MEMBER(tm990189, usr9901_interrupt_callback) |
| 670 | DEVCB_DRIVER_MEMBER(tm990189_state, usr9901_interrupt_callback) |
671 | 671 | }; |
672 | 672 | |
673 | 673 | /* system tms9901 setup */ |
r18258 | r18259 | |
676 | 676 | 0, /* only input pins whose state is always known */ |
677 | 677 | |
678 | 678 | /* Read handler. Covers all input lines (see tms9901.h) */ |
679 | | DEVCB_DRIVER_MEMBER(tm990189, sys9901_r), |
| 679 | DEVCB_DRIVER_MEMBER(tm990189_state, sys9901_r), |
680 | 680 | |
681 | 681 | /* write handlers */ |
682 | 682 | { |
683 | | DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_digitsel0_w), |
684 | | DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_digitsel1_w), |
685 | | DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_digitsel2_w), |
686 | | DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_digitsel3_w), |
687 | | DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_segment0_w), |
688 | | DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_segment1_w), |
689 | | DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_segment2_w), |
690 | | DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_segment3_w), |
691 | | DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_segment4_w), |
692 | | DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_segment5_w), |
693 | | DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_segment6_w), |
694 | | DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_segment7_w), |
695 | | DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_dsplytrgr_w), |
696 | | DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_shiftlight_w), |
697 | | DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_spkrdrive_w), |
698 | | DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_tapewdata_w) |
| 683 | DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_digitsel0_w), |
| 684 | DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_digitsel1_w), |
| 685 | DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_digitsel2_w), |
| 686 | DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_digitsel3_w), |
| 687 | DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_segment0_w), |
| 688 | DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_segment1_w), |
| 689 | DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_segment2_w), |
| 690 | DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_segment3_w), |
| 691 | DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_segment4_w), |
| 692 | DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_segment5_w), |
| 693 | DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_segment6_w), |
| 694 | DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_segment7_w), |
| 695 | DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_dsplytrgr_w), |
| 696 | DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_shiftlight_w), |
| 697 | DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_spkrdrive_w), |
| 698 | DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_tapewdata_w) |
699 | 699 | }, |
700 | 700 | |
701 | 701 | /* interrupt handler */ |
702 | | DEVCB_DRIVER_MEMBER(tm990189, sys9901_interrupt_callback) |
| 702 | DEVCB_DRIVER_MEMBER(tm990189_state, sys9901_interrupt_callback) |
703 | 703 | }; |
704 | 704 | |
705 | 705 | /* |
r18258 | r18259 | |
734 | 734 | { |
735 | 735 | DEVCB_NULL, /*int_callback,*/ /* called when interrupt pin state changes */ |
736 | 736 | DEVCB_NULL, /*rcv_callback,*/ /* called when a character shall be received */ |
737 | | DEVCB_DRIVER_MEMBER(tm990189, xmit_callback), /* called when a character is transmitted */ |
| 737 | DEVCB_DRIVER_MEMBER(tm990189_state, xmit_callback), /* called when a character is transmitted */ |
738 | 738 | DEVCB_NULL /* called for setting interface parameters and line states */ |
739 | 739 | }; |
740 | 740 | |
741 | | static ADDRESS_MAP_START( tm990_189_memmap, AS_PROGRAM, 8, tm990189 ) |
| 741 | static ADDRESS_MAP_START( tm990_189_memmap, AS_PROGRAM, 8, tm990189_state ) |
742 | 742 | AM_RANGE(0x0000, 0x07ff) AM_RAM /* RAM */ |
743 | 743 | AM_RANGE(0x0800, 0x0fff) AM_ROM /* extra ROM - application programs with unibug, remaining 2kb of program for university basic */ |
744 | 744 | AM_RANGE(0x1000, 0x2fff) AM_NOP /* reserved for expansion (RAM and/or tms9918 video controller) */ |
745 | 745 | AM_RANGE(0x3000, 0x3fff) AM_ROM /* main ROM - unibug or university basic */ |
746 | 746 | ADDRESS_MAP_END |
747 | 747 | |
748 | | static ADDRESS_MAP_START( tm990_189_v_memmap, AS_PROGRAM, 8, tm990189 ) |
| 748 | static ADDRESS_MAP_START( tm990_189_v_memmap, AS_PROGRAM, 8, tm990189_state ) |
749 | 749 | AM_RANGE(0x0000, 0x07ff) AM_RAM /* RAM */ |
750 | 750 | AM_RANGE(0x0800, 0x0fff) AM_ROM /* extra ROM - application programs with unibug, remaining 2kb of program for university basic */ |
751 | 751 | |
r18258 | r18259 | |
813 | 813 | d |
814 | 814 | */ |
815 | 815 | |
816 | | static ADDRESS_MAP_START( tm990_189_cru_map, AS_IO, 8, tm990189 ) |
| 816 | static ADDRESS_MAP_START( tm990_189_cru_map, AS_IO, 8, tm990189_state ) |
817 | 817 | AM_RANGE(0x0000, 0x003f) AM_DEVREAD("tms9901_0", tms9901_device, read) /* user I/O tms9901 */ |
818 | 818 | AM_RANGE(0x0040, 0x006f) AM_DEVREAD("tms9901_1", tms9901_device, read) /* system I/O tms9901 */ |
819 | 819 | AM_RANGE(0x0080, 0x00cf) AM_DEVREAD("tms9902", tms9902_device, cruread) /* optional tms9902 */ |
r18258 | r18259 | |
825 | 825 | |
826 | 826 | static TMS99xx_CONFIG( cpuconf ) |
827 | 827 | { |
828 | | DEVCB_DRIVER_MEMBER(tm990189, external_operation), |
829 | | DEVCB_DRIVER_MEMBER(tm990189, interrupt_level), |
| 828 | DEVCB_DRIVER_MEMBER(tm990189_state, external_operation), |
| 829 | DEVCB_DRIVER_MEMBER(tm990189_state, interrupt_level), |
830 | 830 | DEVCB_NULL, // Instruction acquisition |
831 | 831 | DEVCB_NULL, // Clock out |
832 | 832 | DEVCB_NULL, // wait |
833 | 833 | DEVCB_NULL // Hold acknowledge |
834 | 834 | }; |
835 | 835 | |
836 | | static MACHINE_CONFIG_START( tm990_189, tm990189 ) |
| 836 | static MACHINE_CONFIG_START( tm990_189, tm990189_state ) |
837 | 837 | /* basic machine hardware */ |
838 | 838 | MCFG_TMS99xx_ADD("maincpu", TMS9980A, 2000000, tm990_189_memmap, tm990_189_cru_map, cpuconf) |
839 | 839 | |
840 | | MCFG_MACHINE_START_OVERRIDE(tm990189, tm990_189 ) |
841 | | MCFG_MACHINE_RESET_OVERRIDE(tm990189, tm990_189 ) |
| 840 | MCFG_MACHINE_START_OVERRIDE(tm990189_state, tm990_189 ) |
| 841 | MCFG_MACHINE_RESET_OVERRIDE(tm990189_state, tm990_189 ) |
842 | 842 | |
843 | 843 | /* Video hardware */ |
844 | 844 | MCFG_DEFAULT_LAYOUT(layout_tm990189) |
r18258 | r18259 | |
856 | 856 | MCFG_TMS9901_ADD("tms9901_1", sys9901reset_param, 2000000) |
857 | 857 | MCFG_TMS9902_ADD("tms9902", tms9902_params, 2000000) |
858 | 858 | MCFG_TM990_189_RS232_ADD("rs232") |
859 | | MCFG_TIMER_DRIVER_ADD_PERIODIC("display_timer", tm990189, display_callback, attotime::from_hz(30)) |
| 859 | MCFG_TIMER_DRIVER_ADD_PERIODIC("display_timer", tm990189_state, display_callback, attotime::from_hz(30)) |
860 | 860 | // Need to delay the timer, or it will spoil the initial LOAD |
861 | 861 | // TODO: Fix this, probably inside CPU |
862 | 862 | MCFG_TIMER_START_DELAY(attotime::from_msec(150)) |
863 | 863 | MACHINE_CONFIG_END |
864 | 864 | |
865 | | static MACHINE_CONFIG_START( tm990_189_v, tm990189 ) |
| 865 | static MACHINE_CONFIG_START( tm990_189_v, tm990189_state ) |
866 | 866 | /* basic machine hardware */ |
867 | 867 | MCFG_TMS99xx_ADD("maincpu", TMS9980A, 2000000, tm990_189_v_memmap, tm990_189_cru_map, cpuconf) |
868 | 868 | |
869 | | MCFG_MACHINE_START_OVERRIDE(tm990189, tm990_189_v ) |
870 | | MCFG_MACHINE_RESET_OVERRIDE(tm990189, tm990_189_v ) |
| 869 | MCFG_MACHINE_START_OVERRIDE(tm990189_state, tm990_189_v ) |
| 870 | MCFG_MACHINE_RESET_OVERRIDE(tm990189_state, tm990_189_v ) |
871 | 871 | |
872 | 872 | /* video hardware */ |
873 | 873 | MCFG_TMS9928A_ADD( "tms9918", TMS9918, tms9918_interface ) |
r18258 | r18259 | |
888 | 888 | MCFG_TMS9901_ADD("tms9901_1", sys9901reset_param, 2000000) |
889 | 889 | MCFG_TMS9902_ADD("tms9902", tms9902_params, 2000000) |
890 | 890 | MCFG_TM990_189_RS232_ADD("rs232") |
891 | | MCFG_TIMER_DRIVER_ADD_PERIODIC("display_timer", tm990189, display_callback, attotime::from_hz(30)) |
| 891 | MCFG_TIMER_DRIVER_ADD_PERIODIC("display_timer", tm990189_state, display_callback, attotime::from_hz(30)) |
892 | 892 | MCFG_TIMER_START_DELAY(attotime::from_msec(150)) |
893 | 893 | MACHINE_CONFIG_END |
894 | 894 | |
r18258 | r18259 | |
931 | 931 | static INPUT_PORTS_START(tm990_189) |
932 | 932 | |
933 | 933 | PORT_START( "LOADINT ") |
934 | | PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Load interrupt") PORT_CODE(KEYCODE_PRTSCR) PORT_CHANGED_MEMBER(DEVICE_SELF, tm990189, load_interrupt, 1) |
| 934 | PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Load interrupt") PORT_CODE(KEYCODE_PRTSCR) PORT_CHANGED_MEMBER(DEVICE_SELF, tm990189_state, load_interrupt, 1) |
935 | 935 | |
936 | 936 | /* 45-key calculator-like alphanumeric keyboard... */ |
937 | 937 | PORT_START("LINE0") /* row 0 */ |