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r18259 Wednesday 3rd October, 2012 at 12:12:48 UTC by Miodrag Milanović
Rename driver state classes to have _state in their names (no whatsnew)
[src/mess/drivers]geneve.c ti99_4p.c ti99_4x.c ti99_8.c tm990189.c

trunk/src/mess/drivers/ti99_8.c
r18258r18259
217217#define VERBOSE 0
218218#define LOG logerror
219219
220class ti99_8 : public driver_device
220class ti99_8_state : public driver_device
221221{
222222public:
223   ti99_8(const machine_config &mconfig, device_type type, const char *tag)
223   ti99_8_state(const machine_config &mconfig, device_type type, const char *tag)
224224      : driver_device(mconfig, type, tag) { }
225225
226226   // CRU (Communication Register Unit) handling
r18258r18259
279279    Memory map. We have a configurable mapper, so we need to delegate the
280280    job to the mapper completely.
281281*/
282static ADDRESS_MAP_START(memmap, AS_PROGRAM, 8, ti99_8)
282static ADDRESS_MAP_START(memmap, AS_PROGRAM, 8, ti99_8_state)
283283   AM_RANGE(0x0000, 0xffff) AM_DEVREADWRITE(MAPPER_TAG, ti998_mapper_device, readm, writem )
284284ADDRESS_MAP_END
285285
r18258r18259
290290    (decoded by the "Vaquerro" chip, signal NNOICS*)
291291*/
292292
293static ADDRESS_MAP_START(crumap, AS_IO, 8, ti99_8)
293static ADDRESS_MAP_START(crumap, AS_IO, 8, ti99_8_state)
294294   AM_RANGE(0x0000, 0x0003) AM_DEVREAD(TMS9901_TAG, tms9901_device, read)
295295   AM_RANGE(0x0000, 0x02ff) AM_READ(cruread)
296296
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406406
407407static GROM_CONFIG(grom0_config)
408408{
409   false, 0, region_grom, 0x0000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready), GROMFREQ
409   false, 0, region_grom, 0x0000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready), GROMFREQ
410410};
411411
412412static GROM_CONFIG(grom1_config)
413413{
414   false, 1, region_grom, 0x2000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready), GROMFREQ
414   false, 1, region_grom, 0x2000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready), GROMFREQ
415415};
416416
417417static GROM_CONFIG(grom2_config)
418418{
419   false, 2, region_grom, 0x4000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready), GROMFREQ
419   false, 2, region_grom, 0x4000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready), GROMFREQ
420420};
421421
422422/****************************************************
r18258r18259
447447
448448#define GROM_LIBRARY_CONFIG(_conf, _region) \
449449static GROM_CONFIG(_conf##0) \
450{   false, 0, _region, 0x0000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready), GROMFREQ }; \
450{   false, 0, _region, 0x0000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready), GROMFREQ }; \
451451static GROM_CONFIG(_conf##1) \
452{   false, 1, _region, 0x2000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready), GROMFREQ }; \
452{   false, 1, _region, 0x2000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready), GROMFREQ }; \
453453static GROM_CONFIG(_conf##2) \
454{   false, 2, _region, 0x4000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready), GROMFREQ }; \
454{   false, 2, _region, 0x4000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready), GROMFREQ }; \
455455static GROM_CONFIG(_conf##3) \
456{   false, 3, _region, 0x6000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready), GROMFREQ }; \
456{   false, 3, _region, 0x6000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready), GROMFREQ }; \
457457static GROM_CONFIG(_conf##4) \
458{   false, 4, _region, 0x8000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready), GROMFREQ }; \
458{   false, 4, _region, 0x8000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready), GROMFREQ }; \
459459static GROM_CONFIG(_conf##5) \
460{   false, 5, _region, 0xa000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready), GROMFREQ }; \
460{   false, 5, _region, 0xa000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready), GROMFREQ }; \
461461static GROM_CONFIG(_conf##6) \
462{   false, 6, _region, 0xc000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready), GROMFREQ }; \
462{   false, 6, _region, 0xc000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready), GROMFREQ }; \
463463static GROM_CONFIG(_conf##7) \
464{   false, 7, _region, 0xe000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready), GROMFREQ };
464{   false, 7, _region, 0xe000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready), GROMFREQ };
465465
466466GROM_LIBRARY_CONFIG(pascal0, pascal0_region)
467467GROM_LIBRARY_CONFIG(pascal1, pascal12_region)
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469469
470470static GROMPORT_CONFIG(console_cartslot)
471471{
472   DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready),
473   DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_reset)
472   DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready),
473   DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_reset)
474474};
475475
476476static PERIBOX_CONFIG( peribox_conf )
477477{
478   DEVCB_DRIVER_LINE_MEMBER(ti99_8, extint),         // INTA
479   DEVCB_DRIVER_LINE_MEMBER(ti99_8, notconnected),      // INTB
480   DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready),   // READY
478   DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, extint),         // INTA
479   DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, notconnected),      // INTB
480   DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready),   // READY
481481   0x70000                                    // Address bus prefix (AMA/AMB/AMC)
482482};
483483
484READ8_MEMBER( ti99_8::cruread )
484READ8_MEMBER( ti99_8_state::cruread )
485485{
486486//  if (VERBOSE>6) LOG("read access to CRU address %04x\n", offset << 4);
487487   UINT8 value = 0;
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497497   return value;
498498}
499499
500WRITE8_MEMBER( ti99_8::cruwrite )
500WRITE8_MEMBER( ti99_8_state::cruwrite )
501501{
502502   if (VERBOSE>8) LOG("ti99_8: CRU %04x <- %x\n", offset<<1, data);
503503   m_mapper->cruwrite(offset<<1, data);
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518518   "COL8", "COL9", "COL10", "COL11", "COL12", "COL13"
519519};
520520
521READ8_MEMBER( ti99_8::read_by_9901 )
521READ8_MEMBER( ti99_8_state::read_by_9901 )
522522{
523523   int answer=0;
524524   UINT8 joyst;
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590590/*
591591    WRITE key column select (P2-P4), TI-99/8
592592*/
593void ti99_8::set_keyboard_column(int number, int data)
593void ti99_8_state::set_keyboard_column(int number, int data)
594594{
595595   if (data != 0)      m_keyboard_column |= 1 << number;
596596   else            m_keyboard_column &= ~(1 << number);
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601601   }
602602}
603603
604WRITE_LINE_MEMBER( ti99_8::keyC0 )
604WRITE_LINE_MEMBER( ti99_8_state::keyC0 )
605605{
606606   set_keyboard_column(0, state);
607607}
608608
609WRITE_LINE_MEMBER( ti99_8::keyC1 )
609WRITE_LINE_MEMBER( ti99_8_state::keyC1 )
610610{
611611   set_keyboard_column(1, state);
612612}
613613
614WRITE_LINE_MEMBER( ti99_8::keyC2 )
614WRITE_LINE_MEMBER( ti99_8_state::keyC2 )
615615{
616616   set_keyboard_column(2, state);
617617}
618618
619WRITE_LINE_MEMBER( ti99_8::keyC3 )
619WRITE_LINE_MEMBER( ti99_8_state::keyC3 )
620620{
621621   set_keyboard_column(3, state);
622622}
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624624/*
625625    Set 99/4A compatibility mode (CRUS=1)
626626*/
627WRITE_LINE_MEMBER( ti99_8::CRUS )
627WRITE_LINE_MEMBER( ti99_8_state::CRUS )
628628{
629629   m_mapper->CRUS_set(state==ASSERT_LINE);
630630}
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632632/*
633633    Set mapper /PTGEN. This is negative logic; we use PTGE as the positive logic signal.
634634*/
635WRITE_LINE_MEMBER( ti99_8::PTGEN )
635WRITE_LINE_MEMBER( ti99_8_state::PTGEN )
636636{
637637   m_mapper->PTGE_set(state==CLEAR_LINE);
638638}
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640640/*
641641    Control cassette tape unit motor (P6)
642642*/
643WRITE_LINE_MEMBER( ti99_8::cassette_motor )
643WRITE_LINE_MEMBER( ti99_8_state::cassette_motor )
644644{
645645   cassette_image_device *img = machine().device<cassette_image_device>(CASSETTE_TAG);
646646   img->change_state(state==ASSERT_LINE? CASSETTE_MOTOR_ENABLED : CASSETTE_MOTOR_DISABLED,CASSETTE_MASK_MOTOR);
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653653    We do not really need to emulate this as the tape recorder generates sound
654654    on its own.
655655*/
656WRITE_LINE_MEMBER( ti99_8::audio_gate )
656WRITE_LINE_MEMBER( ti99_8_state::audio_gate )
657657{
658658}
659659
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661661    Tape output (P9)
662662    I think polarity is correct, but don't take my word for it.
663663*/
664WRITE_LINE_MEMBER( ti99_8::cassette_output )
664WRITE_LINE_MEMBER( ti99_8_state::cassette_output )
665665{
666666   machine().device<cassette_image_device>(CASSETTE_TAG)->output(state==ASSERT_LINE? +1 : -1);
667667}
668668
669WRITE8_MEMBER( ti99_8::tms9901_interrupt )
669WRITE8_MEMBER( ti99_8_state::tms9901_interrupt )
670670{
671671   m_cpu->set_input_line(INPUT_LINE_99XX_INT1, data);
672672}
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676676   TMS9901_INT1 | TMS9901_INT2 | TMS9901_INTC,
677677
678678   // read handler
679   DEVCB_DRIVER_MEMBER(ti99_8, read_by_9901),
679   DEVCB_DRIVER_MEMBER(ti99_8_state, read_by_9901),
680680
681681   // write handlers
682682   {
683      DEVCB_DRIVER_LINE_MEMBER(ti99_8, keyC0),
684      DEVCB_DRIVER_LINE_MEMBER(ti99_8, keyC1),
685      DEVCB_DRIVER_LINE_MEMBER(ti99_8, keyC2),
686      DEVCB_DRIVER_LINE_MEMBER(ti99_8, keyC3),
687      DEVCB_DRIVER_LINE_MEMBER(ti99_8, CRUS),
688      DEVCB_DRIVER_LINE_MEMBER(ti99_8, PTGEN),
689      DEVCB_DRIVER_LINE_MEMBER(ti99_8, cassette_motor),
683      DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, keyC0),
684      DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, keyC1),
685      DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, keyC2),
686      DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, keyC3),
687      DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, CRUS),
688      DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, PTGEN),
689      DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, cassette_motor),
690690      DEVCB_NULL,
691      DEVCB_DRIVER_LINE_MEMBER(ti99_8, audio_gate),
692      DEVCB_DRIVER_LINE_MEMBER(ti99_8, cassette_output),
691      DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, audio_gate),
692      DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, cassette_output),
693693      DEVCB_NULL,
694694      DEVCB_NULL,
695695      DEVCB_NULL,
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698698      DEVCB_NULL
699699   },
700700
701   DEVCB_DRIVER_MEMBER(ti99_8, tms9901_interrupt)
701   DEVCB_DRIVER_MEMBER(ti99_8_state, tms9901_interrupt)
702702};
703703
704704/*****************************************************************************/
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706706/*
707707    set the state of TMS9901's INT2 (called by the tms9928 core)
708708*/
709WRITE_LINE_MEMBER( ti99_8::set_tms9901_INT2 )
709WRITE_LINE_MEMBER( ti99_8_state::set_tms9901_INT2 )
710710{
711711   if (VERBOSE>6) LOG("ti99_8: VDP int 2 on tms9901, level=%02x\n", state);
712712   m_tms9901->set_single_int(2, state);
r18258r18259
717717***********************************************************/
718718
719719
720WRITE_LINE_MEMBER( ti99_8::console_ready )
720WRITE_LINE_MEMBER( ti99_8_state::console_ready )
721721{
722722   if (VERBOSE>6) LOG("ti99_8: READY level=%02x\n", state);
723723   m_ready_line = state;
r18258r18259
728728/*
729729    The RESET line leading to a reset of the CPU.
730730*/
731WRITE_LINE_MEMBER( ti99_8::console_reset )
731WRITE_LINE_MEMBER( ti99_8_state::console_reset )
732732{
733733   if (machine().phase() != MACHINE_PHASE_INIT)
734734   {
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742742    the READY line, and the mapper raises READY depending on the clock pulse.
743743    So we must make sure this does not interfere.
744744*/
745WRITE_LINE_MEMBER( ti99_8::console_ready_mapper )
745WRITE_LINE_MEMBER( ti99_8_state::console_ready_mapper )
746746{
747747   if (VERBOSE>6) LOG("ti99_8: READY level (mapper) = %02x\n", state);
748748   m_ready_line1 = state;
749749   m_cpu->set_ready((m_ready_line == ASSERT_LINE && m_ready_line1 == ASSERT_LINE)? ASSERT_LINE : CLEAR_LINE);
750750}
751751
752WRITE_LINE_MEMBER( ti99_8::extint )
752WRITE_LINE_MEMBER( ti99_8_state::extint )
753753{
754754   if (VERBOSE>6) LOG("ti99_8: EXTINT level = %02x\n", state);
755755   if (m_tms9901 != NULL)
756756      m_tms9901->set_single_int(1, state);
757757}
758758
759WRITE_LINE_MEMBER( ti99_8::notconnected )
759WRITE_LINE_MEMBER( ti99_8_state::notconnected )
760760{
761761   if (VERBOSE>6) LOG("ti99_8: Setting a not connected line ... ignored\n");
762762}
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765765{
766766   SCREEN_TAG,
767767   0x4000,
768   DEVCB_DRIVER_LINE_MEMBER(ti99_8, set_tms9901_INT2)
768   DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, set_tms9901_INT2)
769769};
770770
771WRITE8_MEMBER( ti99_8::external_operation )
771WRITE8_MEMBER( ti99_8_state::external_operation )
772772{
773773   static const char* extop[8] = { "inv1", "inv2", "IDLE", "RSET", "inv3", "CKON", "CKOF", "LREX" };
774774   if (VERBOSE>1) LOG("External operation %s not implemented on TI-99 board\n", extop[offset]);
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777777/*
778778    Clock line from the CPU. Used to control wait state generation.
779779*/
780WRITE_LINE_MEMBER( ti99_8::clock_out )
780WRITE_LINE_MEMBER( ti99_8_state::clock_out )
781781{
782782   m_mapper->clock_in(state);
783783}
r18258r18259
791791*/
792792static TMS9995_CONFIG( ti99_8_processor_config )
793793{
794   DEVCB_DRIVER_MEMBER(ti99_8, external_operation),
794   DEVCB_DRIVER_MEMBER(ti99_8_state, external_operation),
795795   DEVCB_NULL,      // Instruction acquisition
796   DEVCB_DRIVER_LINE_MEMBER(ti99_8, clock_out),
796   DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, clock_out),
797797   DEVCB_NULL,      // wait
798798   DEVCB_NULL,      // HOLDA
799799   NO_INTERNAL_RAM,
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802802
803803static TI_SOUND_CONFIG( sound_conf )
804804{
805   DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready)   // READY
805   DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready)   // READY
806806};
807807
808808/*
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902902
903903static MAPPER8_CONFIG( mapper_conf )
904904{
905   DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready_mapper),   // READY
905   DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready_mapper),   // READY
906906   mapper_devices
907907};
908908
909909static SPEECH8_CONFIG( speech_config )
910910{
911   DEVCB_DRIVER_LINE_MEMBER(ti99_8, console_ready),   // READY
911   DEVCB_DRIVER_LINE_MEMBER(ti99_8_state, console_ready),   // READY
912912};
913913
914914static JOYPORT_CONFIG( joyport8_60 )
r18258r18259
923923   50
924924};
925925
926void ti99_8::machine_start()
926void ti99_8_state::machine_start()
927927{
928928   m_cpu = static_cast<tms9995_device*>(machine().device("maincpu"));
929929   m_tms9901 = static_cast<tms9901_device*>(machine().device(TMS9901_TAG));
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938938   m_firstjoy = 14;
939939}
940940
941void ti99_8::machine_reset()
941void ti99_8_state::machine_reset()
942942{
943943
944944   m_cpu->set_hold(CLEAR_LINE);
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957957   m_ready_line = m_ready_line1 = ASSERT_LINE;
958958}
959959
960static MACHINE_CONFIG_START( ti99_8_60hz, ti99_8 )
960static MACHINE_CONFIG_START( ti99_8_60hz, ti99_8_state )
961961   /* basic machine hardware */
962962   /* TMS9995-MP9537 CPU @ 10.7 MHz */
963963   MCFG_TMS9995_ADD("maincpu", TMS9995, 10738635, memmap, crumap, ti99_8_processor_config)
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10011001MACHINE_CONFIG_END
10021002
10031003
1004static MACHINE_CONFIG_START( ti99_8_50hz, ti99_8 )
1004static MACHINE_CONFIG_START( ti99_8_50hz, ti99_8_state )
10051005   /* basic machine hardware */
10061006   /* TMS9995-MP9537 CPU @ 10.7 MHz */
10071007   MCFG_TMS9995_ADD("maincpu", TMS9995, 10738635, memmap, crumap, ti99_8_processor_config)
trunk/src/mess/drivers/ti99_4p.c
r18258r18259
5757#define VERBOSE 1
5858#define LOG logerror
5959
60class ti99_4p : public driver_device
60class ti99_4p_state : public driver_device
6161{
6262public:
63   ti99_4p(const machine_config &mconfig, device_type type, const char *tag)
63   ti99_4p_state(const machine_config &mconfig, device_type type, const char *tag)
6464      : driver_device(mconfig, type, tag) { }
6565
6666   DECLARE_WRITE_LINE_MEMBER( console_ready );
r18258r18259
168168
169169};
170170
171static ADDRESS_MAP_START(memmap, AS_PROGRAM, 16, ti99_4p)
171static ADDRESS_MAP_START(memmap, AS_PROGRAM, 16, ti99_4p_state)
172172   AM_RANGE(0x0000, 0xffff) AM_READWRITE( memread, memwrite )
173173ADDRESS_MAP_END
174174
175static ADDRESS_MAP_START(cru_map, AS_IO, 8, ti99_4p)
175static ADDRESS_MAP_START(cru_map, AS_IO, 8, ti99_4p_state)
176176   AM_RANGE(0x0000, 0x003f) AM_DEVREAD(TMS9901_TAG, tms9901_device, read)
177177   AM_RANGE(0x0000, 0x01ff) AM_READ( cruread )
178178
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260260/*
261261    Memory access
262262*/
263READ16_MEMBER( ti99_4p::memread )
263READ16_MEMBER( ti99_4p_state::memread )
264264{
265265   int addroff = offset << 1;
266266   if (m_rom0 == NULL) return 0;   // premature access
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336336   return value;
337337}
338338
339WRITE16_MEMBER( ti99_4p::memwrite )
339WRITE16_MEMBER( ti99_4p_state::memwrite )
340340{
341341//  m_cpu->execute().adjust_icount(-4);
342342
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416416    The datamux is connected to the clock line in order to operate
417417    the wait state counter.
418418*/
419void ti99_4p::clock_in(int clock)
419void ti99_4p_state::clock_in(int clock)
420420{
421421   if (clock==ASSERT_LINE && m_waitcount!=0)
422422   {
r18258r18259
426426}
427427
428428
429READ16_MEMBER( ti99_4p::datamux_read )
429READ16_MEMBER( ti99_4p_state::datamux_read )
430430{
431431   UINT8 hbyte = 0;
432432   UINT16 addroff = (offset << 1);
r18258r18259
451451    Write access.
452452    TODO: use the 16-bit expansion in the box for suitable cards
453453*/
454WRITE16_MEMBER( ti99_4p::datamux_write )
454WRITE16_MEMBER( ti99_4p_state::datamux_write )
455455{
456456   UINT16 addroff = (offset << 1);
457457//  printf("write address = %04x, value = %04x, memmask = %4x\n", addroff, data, mem_mask);
r18258r18259
479479/*
480480    CRU write
481481*/
482WRITE8_MEMBER( ti99_4p::cruwrite )
482WRITE8_MEMBER( ti99_4p_state::cruwrite )
483483{
484484   int addroff = offset<<1;
485485
r18258r18259
503503   m_peribox->cruwrite(addroff, data);
504504}
505505
506READ8_MEMBER( ti99_4p::cruread )
506READ8_MEMBER( ti99_4p_state::cruread )
507507{
508508   UINT8 value = 0;
509509   m_peribox->crureadz(offset<<4, &value);
r18258r18259
519519    0x2000-0x3fff and 0xa000-0xffff, and the mapper area is at 0x4000-0x401e
520520    (only even addresses).
521521*/
522READ16_MEMBER( ti99_4p::samsmem_read )
522READ16_MEMBER( ti99_4p_state::samsmem_read )
523523{
524524   UINT32 address = 0;
525525   int addroff = offset << 1;
r18258r18259
536536/*
537537    Memory write
538538*/
539WRITE16_MEMBER( ti99_4p::samsmem_write )
539WRITE16_MEMBER( ti99_4p_state::samsmem_write )
540540{
541541   UINT32 address = 0;
542542   int addroff = offset << 1;
r18258r18259
555555****************************************************************************/
556556static const char *const column[] = { "COL0", "COL1", "COL2", "COL3", "COL4", "COL5" };
557557
558READ8_MEMBER( ti99_4p::read_by_9901 )
558READ8_MEMBER( ti99_4p_state::read_by_9901 )
559559{
560560   int answer=0;
561561
r18258r18259
613613/*
614614    WRITE key column select (P2-P4)
615615*/
616void ti99_4p::set_keyboard_column(int number, int data)
616void ti99_4p_state::set_keyboard_column(int number, int data)
617617{
618618   if (data!=0)   m_keyboard_column |= 1 << number;
619619   else         m_keyboard_column &= ~(1 << number);
r18258r18259
624624   }
625625}
626626
627WRITE_LINE_MEMBER( ti99_4p::keyC0 )
627WRITE_LINE_MEMBER( ti99_4p_state::keyC0 )
628628{
629629   set_keyboard_column(0, state);
630630}
631631
632WRITE_LINE_MEMBER( ti99_4p::keyC1 )
632WRITE_LINE_MEMBER( ti99_4p_state::keyC1 )
633633{
634634   set_keyboard_column(1, state);
635635}
636636
637WRITE_LINE_MEMBER( ti99_4p::keyC2 )
637WRITE_LINE_MEMBER( ti99_4p_state::keyC2 )
638638{
639639   set_keyboard_column(2, state);
640640}
r18258r18259
642642/*
643643    WRITE alpha lock line (P5)
644644*/
645WRITE_LINE_MEMBER( ti99_4p::alphaW )
645WRITE_LINE_MEMBER( ti99_4p_state::alphaW )
646646{
647647   m_check_alphalock = (state==0);
648648}
r18258r18259
650650/*
651651    command CS1 (only) tape unit motor (P6)
652652*/
653WRITE_LINE_MEMBER( ti99_4p::cs_motor )
653WRITE_LINE_MEMBER( ti99_4p_state::cs_motor )
654654{
655655   m_cassette->change_state((state!=0)? CASSETTE_MOTOR_ENABLED : CASSETTE_MOTOR_DISABLED,CASSETTE_MASK_MOTOR);
656656}
r18258r18259
664664    We do not really need to emulate this as the tape recorder generates sound
665665    on its own.
666666*/
667WRITE_LINE_MEMBER( ti99_4p::audio_gate )
667WRITE_LINE_MEMBER( ti99_4p_state::audio_gate )
668668{
669669}
670670
671671/*
672672    tape output (P9)
673673*/
674WRITE_LINE_MEMBER( ti99_4p::cassette_output )
674WRITE_LINE_MEMBER( ti99_4p_state::cassette_output )
675675{
676676   m_cassette->output((state!=0)? +1 : -1);
677677}
r18258r18259
682682   TMS9901_INT1 | TMS9901_INT2 | TMS9901_INTC,   /* only input pins whose state is always known */
683683
684684   // read handler
685   DEVCB_DRIVER_MEMBER(ti99_4p, read_by_9901),
685   DEVCB_DRIVER_MEMBER(ti99_4p_state, read_by_9901),
686686
687687   {   // write handlers
688688      DEVCB_NULL,
689689      DEVCB_NULL,
690      DEVCB_DRIVER_LINE_MEMBER(ti99_4p, keyC0),
691      DEVCB_DRIVER_LINE_MEMBER(ti99_4p, keyC1),
692      DEVCB_DRIVER_LINE_MEMBER(ti99_4p, keyC2),
693      DEVCB_DRIVER_LINE_MEMBER(ti99_4p, alphaW),
694      DEVCB_DRIVER_LINE_MEMBER(ti99_4p, cs_motor),
690      DEVCB_DRIVER_LINE_MEMBER(ti99_4p_state, keyC0),
691      DEVCB_DRIVER_LINE_MEMBER(ti99_4p_state, keyC1),
692      DEVCB_DRIVER_LINE_MEMBER(ti99_4p_state, keyC2),
693      DEVCB_DRIVER_LINE_MEMBER(ti99_4p_state, alphaW),
694      DEVCB_DRIVER_LINE_MEMBER(ti99_4p_state, cs_motor),
695695      DEVCB_NULL,
696      DEVCB_DRIVER_LINE_MEMBER(ti99_4p, audio_gate),
697      DEVCB_DRIVER_LINE_MEMBER(ti99_4p, cassette_output),
696      DEVCB_DRIVER_LINE_MEMBER(ti99_4p_state, audio_gate),
697      DEVCB_DRIVER_LINE_MEMBER(ti99_4p_state, cassette_output),
698698      DEVCB_NULL,
699699      DEVCB_NULL,
700700      DEVCB_NULL,
r18258r18259
704704   },
705705
706706   /* interrupt handler */
707   DEVCB_DRIVER_MEMBER(ti99_4p, tms9901_interrupt)
707   DEVCB_DRIVER_MEMBER(ti99_4p_state, tms9901_interrupt)
708708};
709709
710710/***************************************************************************
r18258r18259
717717    no chance to make another device pull down the same line; the CPU just
718718    won't access any other device in this time.
719719*/
720WRITE_LINE_MEMBER( ti99_4p::console_ready )
720WRITE_LINE_MEMBER( ti99_4p_state::console_ready )
721721{
722722   m_ready_line = state;
723723   int combined = (m_ready_line == ASSERT_LINE && m_ready_line_dmux == ASSERT_LINE)? ASSERT_LINE : CLEAR_LINE;
r18258r18259
735735    the READY line, and the datamux raises READY depending on the clock pulse.
736736    So we must make sure this does not interfere.
737737*/
738WRITE_LINE_MEMBER( ti99_4p::console_ready_dmux )
738WRITE_LINE_MEMBER( ti99_4p_state::console_ready_dmux )
739739{
740740   m_ready_line_dmux = state;
741741   int combined = (m_ready_line == ASSERT_LINE && m_ready_line_dmux == ASSERT_LINE)? ASSERT_LINE : CLEAR_LINE;
r18258r18259
749749}
750750
751751
752WRITE_LINE_MEMBER( ti99_4p::extint )
752WRITE_LINE_MEMBER( ti99_4p_state::extint )
753753{
754754   if (VERBOSE>6) LOG("ti99_4p: EXTINT level = %02x\n", state);
755755   if (m_tms9901 != NULL)
756756      m_tms9901->set_single_int(1, state);
757757}
758758
759WRITE_LINE_MEMBER( ti99_4p::notconnected )
759WRITE_LINE_MEMBER( ti99_4p_state::notconnected )
760760{
761761   if (VERBOSE>6) LOG("ti99_4p: Setting a not connected line ... ignored\n");
762762}
r18258r18259
764764/*
765765    Clock line from the CPU. Used to control wait state generation.
766766*/
767WRITE_LINE_MEMBER( ti99_4p::clock_out )
767WRITE_LINE_MEMBER( ti99_4p_state::clock_out )
768768{
769769   clock_in(state);
770770}
771771
772WRITE8_MEMBER( ti99_4p::tms9901_interrupt )
772WRITE8_MEMBER( ti99_4p_state::tms9901_interrupt )
773773{
774774   // offset contains the interrupt level (0-15)
775775   // However, the TI board just ignores that level and hardwires it to 1
r18258r18259
777777   m_cpu->set_input_line(INPUT_LINE_99XX_INTREQ, data);
778778}
779779
780READ8_MEMBER( ti99_4p::interrupt_level )
780READ8_MEMBER( ti99_4p_state::interrupt_level )
781781{
782782   // On the TI-99 systems these IC lines are not used; the input lines
783783   // at the CPU are hardwired to level 1.
784784   return 1;
785785}
786786
787WRITE8_MEMBER( ti99_4p::external_operation )
787WRITE8_MEMBER( ti99_4p_state::external_operation )
788788{
789789   static const char* extop[8] = { "inv1", "inv2", "IDLE", "RSET", "inv3", "CKON", "CKOF", "LREX" };
790790   if (VERBOSE>1) LOG("External operation %s not implemented on the SGCPU board\n", extop[offset]);
r18258r18259
794794
795795static PERIBOX_CONFIG( peribox_conf )
796796{
797   DEVCB_DRIVER_LINE_MEMBER(ti99_4p, extint),         // INTA
798   DEVCB_DRIVER_LINE_MEMBER(ti99_4p, notconnected),   // INTB
799   DEVCB_DRIVER_LINE_MEMBER(ti99_4p, console_ready),   // READY
797   DEVCB_DRIVER_LINE_MEMBER(ti99_4p_state, extint),         // INTA
798   DEVCB_DRIVER_LINE_MEMBER(ti99_4p_state, notconnected),   // INTB
799   DEVCB_DRIVER_LINE_MEMBER(ti99_4p_state, console_ready),   // READY
800800   0x70000                                    // Address bus prefix (AMA/AMB/AMC)
801801};
802802
803803static TMS99xx_CONFIG( sgcpu_cpuconf )
804804{
805   DEVCB_DRIVER_MEMBER(ti99_4p, external_operation),
806   DEVCB_DRIVER_MEMBER(ti99_4p, interrupt_level),
805   DEVCB_DRIVER_MEMBER(ti99_4p_state, external_operation),
806   DEVCB_DRIVER_MEMBER(ti99_4p_state, interrupt_level),
807807   DEVCB_NULL,      // Instruction acquisition
808   DEVCB_DRIVER_LINE_MEMBER(ti99_4p, clock_out),
808   DEVCB_DRIVER_LINE_MEMBER(ti99_4p_state, clock_out),
809809   DEVCB_NULL,      // wait
810810   DEVCB_NULL      // Hold acknowledge
811811};
812812
813void ti99_4p::machine_start()
813void ti99_4p_state::machine_start()
814814{
815815
816816   m_cpu = static_cast<tms9900_device*>(machine().device("maincpu"));
r18258r18259
841841/*
842842    set the state of int2 (called by the v9938)
843843*/
844void ti99_4p::set_tms9901_INT2_from_v9938(v99x8_device &vdp, int state)
844void ti99_4p_state::set_tms9901_INT2_from_v9938(v99x8_device &vdp, int state)
845845{
846846   m_tms9901->set_single_int(2, state);
847847}
848848
849849static TI_SOUND_CONFIG( sound_conf )
850850{
851   DEVCB_DRIVER_LINE_MEMBER(ti99_4p, console_ready)   // READY
851   DEVCB_DRIVER_LINE_MEMBER(ti99_4p_state, console_ready)   // READY
852852};
853853
854854static JOYPORT_CONFIG( joyport4a_60 )
r18258r18259
860860/*
861861    Reset the machine.
862862*/
863MACHINE_RESET_MEMBER(ti99_4p,ti99_4p)
863MACHINE_RESET_MEMBER(ti99_4p_state,ti99_4p)
864864{
865865   m_tms9901->set_single_int(12, 0);
866866
r18258r18259
868868   m_cpu->set_hold(CLEAR_LINE);
869869}
870870
871TIMER_DEVICE_CALLBACK_MEMBER(ti99_4p::sgcpu_hblank_interrupt)
871TIMER_DEVICE_CALLBACK_MEMBER(ti99_4p_state::sgcpu_hblank_interrupt)
872872{
873873   machine().device<v9938_device>(VDP_TAG)->interrupt();
874874}
r18258r18259
876876/*
877877    Machine description.
878878*/
879static MACHINE_CONFIG_START( ti99_4p_60hz, ti99_4p )
879static MACHINE_CONFIG_START( ti99_4p_60hz, ti99_4p_state )
880880   /* basic machine hardware */
881881   /* TMS9900 CPU @ 3.0 MHz */
882882   MCFG_TMS99xx_ADD("maincpu", TMS9900, 3000000, memmap, cru_map, sgcpu_cpuconf)
r18258r18259
887887   // interlace mode, but in non-interlace modes only half of the lines are
888888   // painted. Accordingly, the full set of lines is refreshed at 30 Hz,
889889   // not 60 Hz. This should be fixed in the v9938 emulation.
890   MCFG_TI_V9938_ADD(VIDEO_SYSTEM_TAG, 30, SCREEN_TAG, 2500, 512+32, (212+28)*2, DEVICE_SELF, ti99_4p, set_tms9901_INT2_from_v9938)
891   MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", ti99_4p, sgcpu_hblank_interrupt, SCREEN_TAG, 0, 1)
890   MCFG_TI_V9938_ADD(VIDEO_SYSTEM_TAG, 30, SCREEN_TAG, 2500, 512+32, (212+28)*2, DEVICE_SELF, ti99_4p_state, set_tms9901_INT2_from_v9938)
891   MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", ti99_4p_state, sgcpu_hblank_interrupt, SCREEN_TAG, 0, 1)
892892
893893   // tms9901
894894   MCFG_TMS9901_ADD(TMS9901_TAG, tms9901_wiring_sgcpu, 3000000)
trunk/src/mess/drivers/ti99_4x.c
r18258r18259
6060/*
6161    The console.
6262*/
63class ti99_4x : public driver_device
63class ti99_4x_state : public driver_device
6464{
6565public:
66   ti99_4x(const machine_config &mconfig, device_type type, const char *tag)
66   ti99_4x_state(const machine_config &mconfig, device_type type, const char *tag)
6767      : driver_device(mconfig, type, tag) { }
6868
6969   // CRU (Communication Register Unit) handling
r18258r18259
132132    to the 16bit bus, and the wait state logic is not active during their
133133    accesses.
134134*/
135static ADDRESS_MAP_START(memmap, AS_PROGRAM, 16, ti99_4x)
135static ADDRESS_MAP_START(memmap, AS_PROGRAM, 16, ti99_4x_state)
136136   ADDRESS_MAP_GLOBAL_MASK(0xffff)
137137   AM_RANGE(0x0000, 0x1fff) AM_ROM
138138   AM_RANGE(0x8000, 0x80ff) AM_MIRROR(0x0300) AM_RAM
r18258r18259
159159
160160    Write:0000 - 01ff corresponds to bit 0 of base address 0000 - 03fe
161161*/
162static ADDRESS_MAP_START(cru_map, AS_IO, 8, ti99_4x)
162static ADDRESS_MAP_START(cru_map, AS_IO, 8, ti99_4x_state)
163163   AM_RANGE(0x0000, 0x003f) AM_DEVREAD(TMS9901_TAG, tms9901_device, read)
164164   AM_RANGE(0x0000, 0x01ff) AM_READ(cruread)
165165
r18258r18259
234234      PORT_CONFSETTING(    0x01, DEF_STR( On ) )
235235
236236   PORT_START( "LOADINT ")
237      PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Load interrupt") PORT_CODE(KEYCODE_PRTSCR) PORT_CHANGED_MEMBER(DEVICE_SELF, ti99_4x, load_interrupt, 1)
237      PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Load interrupt") PORT_CODE(KEYCODE_PRTSCR) PORT_CHANGED_MEMBER(DEVICE_SELF, ti99_4x_state, load_interrupt, 1)
238238
239239   PORT_START("COL0")   // col 0
240240      PORT_BIT(0x88, IP_ACTIVE_LOW, IPT_UNUSED)
r18258r18259
310310
311311static GROM_CONFIG(grom0_config)
312312{
313   false, 0, region_grom, 0x0000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_4x, console_ready), GROMFREQ
313   false, 0, region_grom, 0x0000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, console_ready), GROMFREQ
314314};
315315
316316static GROM_CONFIG(grom1_config)
317317{
318   false, 1, region_grom, 0x2000, 0x1800,  DEVCB_DRIVER_LINE_MEMBER(ti99_4x, console_ready), GROMFREQ
318   false, 1, region_grom, 0x2000, 0x1800,  DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, console_ready), GROMFREQ
319319};
320320
321321static GROM_CONFIG(grom2_config)
322322{
323   false, 2, region_grom, 0x4000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_4x, console_ready), GROMFREQ
323   false, 2, region_grom, 0x4000, 0x1800, DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, console_ready), GROMFREQ
324324};
325325
326326static GROMPORT_CONFIG(console_cartslot)
327327{
328   DEVCB_DRIVER_LINE_MEMBER(ti99_4x, console_ready),
329   DEVCB_DRIVER_LINE_MEMBER(ti99_4x, console_reset)
328   DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, console_ready),
329   DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, console_reset)
330330};
331331
332332static PERIBOX_CONFIG( peribox_conf )
333333{
334   DEVCB_DRIVER_LINE_MEMBER(ti99_4x, extint),         // INTA
335   DEVCB_DRIVER_LINE_MEMBER(ti99_4x, notconnected),   // INTB
336   DEVCB_DRIVER_LINE_MEMBER(ti99_4x, console_ready),   // READY
334   DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, extint),         // INTA
335   DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, notconnected),   // INTB
336   DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, console_ready),   // READY
337337   0x70000                                    // Address bus prefix (AMA/AMB/AMC)
338338};
339339
340340static TI_SOUND_CONFIG( sound_conf )
341341{
342   DEVCB_DRIVER_LINE_MEMBER(ti99_4x, console_ready)   // READY
342   DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, console_ready)   // READY
343343};
344344
345READ8_MEMBER( ti99_4x::cruread )
345READ8_MEMBER( ti99_4x_state::cruread )
346346{
347347//  if (VERBOSE>6) LOG("read access to CRU address %04x\n", offset << 4);
348348   UINT8 value = 0;
r18258r18259
356356   return value;
357357}
358358
359WRITE8_MEMBER( ti99_4x::cruwrite )
359WRITE8_MEMBER( ti99_4x_state::cruwrite )
360360{
361361   if (VERBOSE>6) LOG("ti99_4x: write access to CRU address %04x\n", offset << 1);
362362   m_gromport->cruwrite(offset<<1, data);
363363   m_peribox->cruwrite(offset<<1, data);
364364}
365365
366WRITE8_MEMBER( ti99_4x::external_operation )
366WRITE8_MEMBER( ti99_4x_state::external_operation )
367367{
368368   static const char* extop[8] = { "inv1", "inv2", "IDLE", "RSET", "inv3", "CKON", "CKOF", "LREX" };
369369   // Some games (e.g. Slymoids) actually use IDLE for synchronization
r18258r18259
402402
403403static const char *const column[] = { "COL0", "COL1", "COL2", "COL3", "COL4", "COL5" };
404404
405READ8_MEMBER( ti99_4x::read_by_9901 )
405READ8_MEMBER( ti99_4x_state::read_by_9901 )
406406{
407407   int answer=0;
408408
r18258r18259
475475/*
476476    Handler for tms9901 P0 pin (handset data acknowledge)
477477*/
478WRITE_LINE_MEMBER( ti99_4x::handset_ack )
478WRITE_LINE_MEMBER( ti99_4x_state::handset_ack )
479479{
480480   // Write a value to the joyport. If there is a handset this will set its
481481   // ACK line.
r18258r18259
485485/*
486486    WRITE key column select (P2-P4), TI-99/4
487487*/
488void ti99_4x::set_keyboard_column(int number, int data)
488void ti99_4x_state::set_keyboard_column(int number, int data)
489489{
490490   if (data != 0)
491491      m_keyboard_column |= 1 << number;
r18258r18259
506506   //           joystick 2 = column 7
507507}
508508
509WRITE_LINE_MEMBER( ti99_4x::keyC0 )
509WRITE_LINE_MEMBER( ti99_4x_state::keyC0 )
510510{
511511   set_keyboard_column(0, state);
512512}
513513
514WRITE_LINE_MEMBER( ti99_4x::keyC1 )
514WRITE_LINE_MEMBER( ti99_4x_state::keyC1 )
515515{
516516   set_keyboard_column(1, state);
517517}
518518
519WRITE_LINE_MEMBER( ti99_4x::keyC2 )
519WRITE_LINE_MEMBER( ti99_4x_state::keyC2 )
520520{
521521   set_keyboard_column(2, state);
522522}
r18258r18259
524524/*
525525    Select alpha lock line - TI99/4a only (P5)
526526*/
527WRITE_LINE_MEMBER( ti99_4x::alphaW )
527WRITE_LINE_MEMBER( ti99_4x_state::alphaW )
528528{
529529   m_check_alphalock = (state==0);
530530}
r18258r18259
532532/*
533533    Control CS1 tape unit motor (P6)
534534*/
535WRITE_LINE_MEMBER( ti99_4x::cs1_motor )
535WRITE_LINE_MEMBER( ti99_4x_state::cs1_motor )
536536{
537537   cassette_image_device *img = machine().device<cassette_image_device>(CASSETTE_TAG);
538538   img->change_state(state==ASSERT_LINE? CASSETTE_MOTOR_ENABLED : CASSETTE_MOTOR_DISABLED,CASSETTE_MASK_MOTOR);
r18258r18259
541541/*
542542    Control CS2 tape unit motor (P7)
543543*/
544WRITE_LINE_MEMBER( ti99_4x::cs2_motor )
544WRITE_LINE_MEMBER( ti99_4x_state::cs2_motor )
545545{
546546   cassette_image_device *img = machine().device<cassette_image_device>(CASSETTE2_TAG);
547547   img->change_state(state==ASSERT_LINE? CASSETTE_MOTOR_ENABLED : CASSETTE_MOTOR_DISABLED,CASSETTE_MASK_MOTOR);
r18258r18259
554554    We do not really need to emulate this as the tape recorder generates sound
555555    on its own.
556556*/
557WRITE_LINE_MEMBER( ti99_4x::audio_gate )
557WRITE_LINE_MEMBER( ti99_4x_state::audio_gate )
558558{
559559}
560560
r18258r18259
562562    Tape output (P9)
563563    I think polarity is correct, but don't take my word for it.
564564*/
565WRITE_LINE_MEMBER( ti99_4x::cassette_output )
565WRITE_LINE_MEMBER( ti99_4x_state::cassette_output )
566566{
567567   machine().device<cassette_image_device>(CASSETTE_TAG)->output(state==ASSERT_LINE? +1 : -1);
568568   machine().device<cassette_image_device>(CASSETTE2_TAG)->output(state==ASSERT_LINE? +1 : -1);
569569}
570570
571WRITE8_MEMBER( ti99_4x::tms9901_interrupt )
571WRITE8_MEMBER( ti99_4x_state::tms9901_interrupt )
572572{
573573   // offset contains the interrupt level (0-15)
574574   // However, the TI board just ignores that level and hardwires it to 1
r18258r18259
576576   m_cpu->set_input_line(INPUT_LINE_99XX_INTREQ, data);
577577}
578578
579READ8_MEMBER( ti99_4x::interrupt_level )
579READ8_MEMBER( ti99_4x_state::interrupt_level )
580580{
581581   // On the TI-99 systems these IC lines are not used; the input lines
582582   // at the CPU are hardwired to level 1.
r18258r18259
586586/*
587587    Clock line from the CPU. Used to control wait state generation.
588588*/
589WRITE_LINE_MEMBER( ti99_4x::clock_out )
589WRITE_LINE_MEMBER( ti99_4x_state::clock_out )
590590{
591591   m_datamux->clock_in(state);
592592}
r18258r18259
596596/*
597597    set the state of TMS9901's INT2 (called by the tms9928 core)
598598*/
599WRITE_LINE_MEMBER( ti99_4x::set_tms9901_INT2 )
599WRITE_LINE_MEMBER( ti99_4x_state::set_tms9901_INT2 )
600600{
601601   if (VERBOSE>6) LOG("ti99_4x: VDP int 2 on tms9901, level=%d\n", state);
602602   m_tms9901->set_single_int(2, state);
603603}
604604
605void ti99_4x::set_tms9901_INT2_from_v9938(v99x8_device &vdp, int state)
605void ti99_4x_state::set_tms9901_INT2_from_v9938(v99x8_device &vdp, int state)
606606{
607607   m_tms9901->set_single_int(2, state);
608608}
r18258r18259
610610/*
611611    set the state of TMS9901's INT12 (called by the handset prototype of TI-99/4)
612612*/
613WRITE_LINE_MEMBER( ti99_4x::set_tms9901_INT12)
613WRITE_LINE_MEMBER( ti99_4x_state::set_tms9901_INT12)
614614{
615615   m_tms9901->set_single_int(12, state);
616616}
r18258r18259
619619    One of the common hardware mods was to add a switch to trigger a LOAD
620620    interrupt (NMI)
621621*/
622INPUT_CHANGED_MEMBER( ti99_4x::load_interrupt )
622INPUT_CHANGED_MEMBER( ti99_4x_state::load_interrupt )
623623{
624624   m_cpu->set_input_line(INPUT_LINE_NMI, (newval==0)? ASSERT_LINE : CLEAR_LINE);
625625}
r18258r18259
634634    no chance to make another device pull down the same line; the CPU just
635635    won't access any other device in this time.
636636*/
637WRITE_LINE_MEMBER( ti99_4x::console_ready )
637WRITE_LINE_MEMBER( ti99_4x_state::console_ready )
638638{
639639   m_ready_line = state;
640640   int combined = (m_ready_line == ASSERT_LINE && m_ready_line_dmux == ASSERT_LINE)? ASSERT_LINE : CLEAR_LINE;
r18258r18259
650650/*
651651    The RESET line leading to a reset of the CPU.
652652*/
653WRITE_LINE_MEMBER( ti99_4x::console_reset )
653WRITE_LINE_MEMBER( ti99_4x_state::console_reset )
654654{
655655   if (machine().phase() != MACHINE_PHASE_INIT)
656656   {
r18258r18259
664664    the READY line, and the datamux raises READY depending on the clock pulse.
665665    So we must make sure this does not interfere.
666666*/
667WRITE_LINE_MEMBER( ti99_4x::console_ready_dmux )
667WRITE_LINE_MEMBER( ti99_4x_state::console_ready_dmux )
668668{
669669   m_ready_line_dmux = state;
670670   int combined = (m_ready_line == ASSERT_LINE && m_ready_line_dmux == ASSERT_LINE)? ASSERT_LINE : CLEAR_LINE;
r18258r18259
677677   m_cpu->set_ready(combined);
678678}
679679
680WRITE_LINE_MEMBER( ti99_4x::extint )
680WRITE_LINE_MEMBER( ti99_4x_state::extint )
681681{
682682   if (VERBOSE>6) LOG("ti99_4x: EXTINT level = %02x\n", state);
683683   if (m_tms9901 != NULL)
684684      m_tms9901->set_single_int(1, state);
685685}
686686
687WRITE_LINE_MEMBER( ti99_4x::notconnected )
687WRITE_LINE_MEMBER( ti99_4x_state::notconnected )
688688{
689689   if (VERBOSE>6) LOG("ti99_4x: Setting a not connected line ... ignored\n");
690690}
r18258r18259
695695{
696696   SCREEN_TAG,
697697   0x4000,
698   DEVCB_DRIVER_LINE_MEMBER(ti99_4x, set_tms9901_INT2)
698   DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, set_tms9901_INT2)
699699};
700700
701701/* TMS9901 setup. */
r18258r18259
704704   TMS9901_INT1 | TMS9901_INT2 | TMS9901_INTC,   /* only input pins whose state is always known */
705705
706706   // read handler
707   DEVCB_DRIVER_MEMBER(ti99_4x, read_by_9901),
707   DEVCB_DRIVER_MEMBER(ti99_4x_state, read_by_9901),
708708
709709   // write handlers
710710   {
711      DEVCB_DRIVER_LINE_MEMBER(ti99_4x, handset_ack),
711      DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, handset_ack),
712712      DEVCB_NULL,
713      DEVCB_DRIVER_LINE_MEMBER(ti99_4x, keyC0),
714      DEVCB_DRIVER_LINE_MEMBER(ti99_4x, keyC1),
715      DEVCB_DRIVER_LINE_MEMBER(ti99_4x, keyC2),
713      DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, keyC0),
714      DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, keyC1),
715      DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, keyC2),
716716      DEVCB_NULL,
717      DEVCB_DRIVER_LINE_MEMBER(ti99_4x, cs1_motor),
718      DEVCB_DRIVER_LINE_MEMBER(ti99_4x, cs2_motor),
719      DEVCB_DRIVER_LINE_MEMBER(ti99_4x, audio_gate),
720      DEVCB_DRIVER_LINE_MEMBER(ti99_4x, cassette_output),
717      DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, cs1_motor),
718      DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, cs2_motor),
719      DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, audio_gate),
720      DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, cassette_output),
721721      DEVCB_NULL,
722722      DEVCB_NULL,
723723      DEVCB_NULL,
r18258r18259
727727   },
728728
729729   // interrupt handler
730   DEVCB_DRIVER_MEMBER(ti99_4x, tms9901_interrupt)
730   DEVCB_DRIVER_MEMBER(ti99_4x_state, tms9901_interrupt)
731731};
732732
733733const tms9901_interface tms9901_wiring_ti99_4a =
r18258r18259
735735   TMS9901_INT1 | TMS9901_INT2 | TMS9901_INTC,
736736
737737   // read handler
738   DEVCB_DRIVER_MEMBER(ti99_4x, read_by_9901),
738   DEVCB_DRIVER_MEMBER(ti99_4x_state, read_by_9901),
739739
740740   // write handlers
741741   {
742742      DEVCB_NULL,
743743      DEVCB_NULL,
744      DEVCB_DRIVER_LINE_MEMBER(ti99_4x, keyC0),
745      DEVCB_DRIVER_LINE_MEMBER(ti99_4x, keyC1),
746      DEVCB_DRIVER_LINE_MEMBER(ti99_4x, keyC2),
747      DEVCB_DRIVER_LINE_MEMBER(ti99_4x, alphaW),
748      DEVCB_DRIVER_LINE_MEMBER(ti99_4x, cs1_motor),
749      DEVCB_DRIVER_LINE_MEMBER(ti99_4x, cs2_motor),
750      DEVCB_DRIVER_LINE_MEMBER(ti99_4x, audio_gate),
751      DEVCB_DRIVER_LINE_MEMBER(ti99_4x, cassette_output),
744      DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, keyC0),
745      DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, keyC1),
746      DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, keyC2),
747      DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, alphaW),
748      DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, cs1_motor),
749      DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, cs2_motor),
750      DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, audio_gate),
751      DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, cassette_output),
752752      DEVCB_NULL,
753753      DEVCB_NULL,
754754      DEVCB_NULL,
r18258r18259
757757      DEVCB_NULL
758758   },
759759
760   DEVCB_DRIVER_MEMBER(ti99_4x, tms9901_interrupt)
760   DEVCB_DRIVER_MEMBER(ti99_4x_state, tms9901_interrupt)
761761};
762762
763763/*
r18258r18259
796796
797797static DMUX_CONFIG( datamux_conf )
798798{
799   DEVCB_DRIVER_LINE_MEMBER(ti99_4x, console_ready_dmux),   // READY
799   DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, console_ready_dmux),   // READY
800800   dmux_devices
801801};
802802
803803static DMUX_CONFIG( datamux_conf_ev )
804804{
805   DEVCB_DRIVER_LINE_MEMBER(ti99_4x, console_ready_dmux),   // READY
805   DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, console_ready_dmux),   // READY
806806   dmux_devices_ev
807807};
808808
809809static TMS99xx_CONFIG( ti99_cpuconf )
810810{
811   DEVCB_DRIVER_MEMBER(ti99_4x, external_operation),
812   DEVCB_DRIVER_MEMBER(ti99_4x, interrupt_level),
811   DEVCB_DRIVER_MEMBER(ti99_4x_state, external_operation),
812   DEVCB_DRIVER_MEMBER(ti99_4x_state, interrupt_level),
813813   DEVCB_NULL,      // Instruction acquisition
814   DEVCB_DRIVER_LINE_MEMBER(ti99_4x, clock_out),
814   DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, clock_out),
815815   DEVCB_NULL,      // wait
816816   DEVCB_NULL      // Hold acknowledge
817817};
818818
819819static JOYPORT_CONFIG( joyport4_60 )
820820{
821   DEVCB_DRIVER_LINE_MEMBER(ti99_4x, set_tms9901_INT12),
821   DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, set_tms9901_INT12),
822822   60
823823};
824824
825825static JOYPORT_CONFIG( joyport4_50 )
826826{
827   DEVCB_DRIVER_LINE_MEMBER(ti99_4x, set_tms9901_INT12),
827   DEVCB_DRIVER_LINE_MEMBER(ti99_4x_state, set_tms9901_INT12),
828828   50
829829};
830830
r18258r18259
845845    Machine definitions
846846******************************************************************************/
847847
848MACHINE_START_MEMBER(ti99_4x,ti99_4)
848MACHINE_START_MEMBER(ti99_4x_state,ti99_4)
849849{
850850
851851   m_cpu = static_cast<tms9900_device*>(machine().device("maincpu"));
r18258r18259
867867   m_ready_line = m_ready_line_dmux = ASSERT_LINE;
868868}
869869
870MACHINE_RESET_MEMBER(ti99_4x,ti99_4)
870MACHINE_RESET_MEMBER(ti99_4x_state,ti99_4)
871871{
872872   m_cpu->set_ready(ASSERT_LINE);
873873   m_cpu->set_hold(CLEAR_LINE);
r18258r18259
876876/*
877877    TI-99/4 - the predecessor of the more popular TI-99/4A
878878*/
879static MACHINE_CONFIG_START( ti99_4_60hz, ti99_4x )
879static MACHINE_CONFIG_START( ti99_4_60hz, ti99_4x_state )
880880   /* CPU */
881881   MCFG_TMS99xx_ADD("maincpu", TMS9900, 3000000, memmap, cru_map, ti99_cpuconf)
882882
883   MCFG_MACHINE_START_OVERRIDE(ti99_4x, ti99_4 )
884   MCFG_MACHINE_RESET_OVERRIDE(ti99_4x, ti99_4 )
883   MCFG_MACHINE_START_OVERRIDE(ti99_4x_state, ti99_4 )
884   MCFG_MACHINE_RESET_OVERRIDE(ti99_4x_state, ti99_4 )
885885
886886   MCFG_TI_TMS991x_ADD_NTSC(VIDEO_SYSTEM_TAG, TMS9918, ti99_4_tms9928a_interface)
887887
r18258r18259
917917
918918MACHINE_CONFIG_END
919919
920static MACHINE_CONFIG_START( ti99_4_50hz, ti99_4x )
920static MACHINE_CONFIG_START( ti99_4_50hz, ti99_4x_state )
921921   /* CPU */
922922   MCFG_TMS99xx_ADD("maincpu", TMS9900, 3000000, memmap, cru_map, ti99_cpuconf)
923923
924   MCFG_MACHINE_START_OVERRIDE(ti99_4x, ti99_4 )
925   MCFG_MACHINE_RESET_OVERRIDE(ti99_4x, ti99_4 )
924   MCFG_MACHINE_START_OVERRIDE(ti99_4x_state, ti99_4 )
925   MCFG_MACHINE_RESET_OVERRIDE(ti99_4x_state, ti99_4 )
926926
927927   /* video hardware */
928928   MCFG_TI_TMS991x_ADD_PAL(VIDEO_SYSTEM_TAG, TMS9929, ti99_4_tms9928a_interface)
r18258r18259
963963    TI-99/4A - replaced the 99/4
964964*/
965965
966MACHINE_START_MEMBER(ti99_4x,ti99_4a)
966MACHINE_START_MEMBER(ti99_4x_state,ti99_4a)
967967{
968968
969969   m_cpu = static_cast<tms9900_device*>(machine().device("maincpu"));
r18258r18259
982982   m_ready_line = m_ready_line_dmux = ASSERT_LINE;
983983}
984984
985MACHINE_RESET_MEMBER(ti99_4x,ti99_4a)
985MACHINE_RESET_MEMBER(ti99_4x_state,ti99_4a)
986986{
987987   m_cpu->set_ready(ASSERT_LINE);
988988   m_cpu->set_hold(CLEAR_LINE);
989989}
990990
991static MACHINE_CONFIG_START( ti99_4a_60hz, ti99_4x )
991static MACHINE_CONFIG_START( ti99_4a_60hz, ti99_4x_state )
992992   /* CPU */
993993   MCFG_TMS99xx_ADD("maincpu", TMS9900, 3000000, memmap, cru_map, ti99_cpuconf)
994994
995   MCFG_MACHINE_START_OVERRIDE(ti99_4x, ti99_4a )
996   MCFG_MACHINE_RESET_OVERRIDE(ti99_4x, ti99_4a )
995   MCFG_MACHINE_START_OVERRIDE(ti99_4x_state, ti99_4a )
996   MCFG_MACHINE_RESET_OVERRIDE(ti99_4x_state, ti99_4a )
997997
998998   /* Video hardware */
999999   MCFG_TI_TMS991x_ADD_NTSC(VIDEO_SYSTEM_TAG, TMS9918A, ti99_4_tms9928a_interface)
r18258r18259
10301030
10311031MACHINE_CONFIG_END
10321032
1033static MACHINE_CONFIG_START( ti99_4a_50hz, ti99_4x )
1033static MACHINE_CONFIG_START( ti99_4a_50hz, ti99_4x_state )
10341034   /* CPU */
10351035   MCFG_TMS99xx_ADD("maincpu", TMS9900, 3000000, memmap, cru_map, ti99_cpuconf)
10361036
1037   MCFG_MACHINE_START_OVERRIDE(ti99_4x, ti99_4a )
1038   MCFG_MACHINE_RESET_OVERRIDE(ti99_4x, ti99_4a )
1037   MCFG_MACHINE_START_OVERRIDE(ti99_4x_state, ti99_4a )
1038   MCFG_MACHINE_RESET_OVERRIDE(ti99_4x_state, ti99_4a )
10391039
10401040   /* Video hardware */
10411041   MCFG_TI_TMS991x_ADD_PAL(VIDEO_SYSTEM_TAG, TMS9929A, ti99_4_tms9928a_interface)
r18258r18259
10731073MACHINE_CONFIG_END
10741074
10751075
1076TIMER_DEVICE_CALLBACK_MEMBER(ti99_4x::ti99_4ev_hblank_interrupt)
1076TIMER_DEVICE_CALLBACK_MEMBER(ti99_4x_state::ti99_4ev_hblank_interrupt)
10771077{
10781078   machine().device<v9938_device>(VDP_TAG)->interrupt();
10791079}
r18258r18259
10821082    TI-99/4A with 80-column support. Actually a separate expansion card (EVPC),
10831083    replacing the console video processor.
10841084*/
1085static MACHINE_CONFIG_START( ti99_4ev_60hz, ti99_4x )
1085static MACHINE_CONFIG_START( ti99_4ev_60hz, ti99_4x_state )
10861086   /* CPU */
10871087   MCFG_TMS99xx_ADD("maincpu", TMS9900, 3000000, memmap, cru_map, ti99_cpuconf)
10881088
1089   MCFG_MACHINE_START_OVERRIDE(ti99_4x, ti99_4a )
1089   MCFG_MACHINE_START_OVERRIDE(ti99_4x_state, ti99_4a )
10901090
10911091   /* video hardware */
10921092   // Although we should have a 60 Hz screen rate, we have to set it to 30 here.
r18258r18259
10941094   // interlace mode, but in non-interlace modes only half of the lines are
10951095   // painted. Accordingly, the full set of lines is refreshed at 30 Hz,
10961096   // not 60 Hz. This should be fixed in the v9938 emulation.
1097   MCFG_TI_V9938_ADD(VIDEO_SYSTEM_TAG, 30, SCREEN_TAG, 2500, 512+32, (212+28)*2, DEVICE_SELF, ti99_4x, set_tms9901_INT2_from_v9938)
1098   MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", ti99_4x, ti99_4ev_hblank_interrupt, SCREEN_TAG, 0, 1)
1097   MCFG_TI_V9938_ADD(VIDEO_SYSTEM_TAG, 30, SCREEN_TAG, 2500, 512+32, (212+28)*2, DEVICE_SELF, ti99_4x_state, set_tms9901_INT2_from_v9938)
1098   MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", ti99_4x_state, ti99_4ev_hblank_interrupt, SCREEN_TAG, 0, 1)
10991099
11001100   /* Main board */
11011101   MCFG_TMS9901_ADD(TMS9901_TAG, tms9901_wiring_ti99_4a, 3000000)
trunk/src/mess/drivers/geneve.c
r18258r18259
219219#define SRAM_SIZE 384*1024   // maximum SRAM expansion on-board
220220#define DRAM_SIZE 512*1024
221221
222class geneve : public driver_device
222class geneve_state : public driver_device
223223{
224224public:
225   geneve(const machine_config &mconfig, device_type type, const char *tag)
225   geneve_state(const machine_config &mconfig, device_type type, const char *tag)
226226      : driver_device(mconfig, type, tag) { }
227227
228228   // CRU (Communication Register Unit) handling
r18258r18259
281281    Memory map
282282*/
283283
284static ADDRESS_MAP_START(memmap, AS_PROGRAM, 8, geneve)
284static ADDRESS_MAP_START(memmap, AS_PROGRAM, 8, geneve_state)
285285   AM_RANGE(0x0000, 0xffff) AM_DEVREADWRITE(GMAPPER_TAG, geneve_mapper_device, readm, writem)
286286ADDRESS_MAP_END
287287
r18258r18259
293293    TODO: Check whether A0-A2 are available for CRU addressing since those
294294    bits are usually routed through the mapper first.
295295*/
296static ADDRESS_MAP_START(crumap, AS_IO, 8, geneve)
296static ADDRESS_MAP_START(crumap, AS_IO, 8, geneve_state)
297297   AM_RANGE(0x0000, 0x0003) AM_DEVREAD(TMS9901_TAG, tms9901_device, read)
298298   AM_RANGE(0x0000, 0x0fff) AM_READ( cruread )
299299
r18258r18259
337337#define CRU_CONTROL_BASE 0x1ee0
338338#define CRU_SSTEP_BASE 0x13c0
339339
340WRITE8_MEMBER ( geneve::cruwrite )
340WRITE8_MEMBER ( geneve_state::cruwrite )
341341{
342342   int addroff = offset << 1;
343343
r18258r18259
407407   }
408408}
409409
410READ8_MEMBER( geneve::cruread )
410READ8_MEMBER( geneve_state::cruread )
411411{
412412   UINT8 value = 0;
413413   int addroff = offset << 4;
r18258r18259
433433    CRU callbacks
434434***********************************************************************/
435435
436READ8_MEMBER( geneve::read_by_9901 )
436READ8_MEMBER( geneve_state::read_by_9901 )
437437{
438438   int answer = 0;
439439
r18258r18259
495495/*
496496    Write PE bus reset line
497497*/
498WRITE_LINE_MEMBER( geneve::peripheral_bus_reset )
498WRITE_LINE_MEMBER( geneve_state::peripheral_bus_reset )
499499{
500500   if (VERBOSE>0) LOG("geneve: peripheral bus reset request; not implemented yet.\n");
501501}
r18258r18259
503503/*
504504    Write VDP reset line
505505*/
506WRITE_LINE_MEMBER( geneve::VDP_reset )
506WRITE_LINE_MEMBER( geneve_state::VDP_reset )
507507{
508508   if (VERBOSE>0) LOG("geneve: Video reset request; not implemented yet.\n");
509509}
r18258r18259
511511/*
512512    Write joystick select line. 1 selects joystick 1 (pin 7), 0 selects joystick 2 (pin 2)
513513*/
514WRITE_LINE_MEMBER( geneve::joystick_select )
514WRITE_LINE_MEMBER( geneve_state::joystick_select )
515515{
516516   m_joyport->write_port((state==ASSERT_LINE)? 1:2);
517517}
r18258r18259
519519/*
520520    Write external mem cycles (0=long, 1=short)
521521*/
522WRITE_LINE_MEMBER( geneve::extbus_wait_states )
522WRITE_LINE_MEMBER( geneve_state::extbus_wait_states )
523523{
524524   if (VERBOSE>0) LOG("geneve: external bus wait states set to %d, not implemented yet.\n", state);
525525}
r18258r18259
528528    Write vdp wait cycles (1=add 14 cycles, 0=add none)
529529    see above for waitstate handling
530530*/
531WRITE_LINE_MEMBER( geneve::video_wait_states )
531WRITE_LINE_MEMBER( geneve_state::video_wait_states )
532532{
533533   if (VERBOSE>1) LOG("geneve: video wait states set to %d\n", state);
534534   m_mapper->set_video_waitstates(state==ASSERT_LINE);
r18258r18259
541541    but again it is ignored. Anyway, the TMS9995 has only two external inputs
542542    (INT1 and INT4).
543543*/
544WRITE8_MEMBER( geneve::tms9901_interrupt )
544WRITE8_MEMBER( geneve_state::tms9901_interrupt )
545545{
546546   /* INTREQ is connected to INT1. */
547547   m_cpu->set_input_line(INPUT_LINE_99XX_INT1, data);
r18258r18259
553553   TMS9901_INT1 | TMS9901_INT2 | TMS9901_INT8 | TMS9901_INTB | TMS9901_INTC,   /* only input pins whose state is always known */
554554
555555   // read handler
556   DEVCB_DRIVER_MEMBER(geneve, read_by_9901),
556   DEVCB_DRIVER_MEMBER(geneve_state, read_by_9901),
557557
558558   {   /* write handlers */
559      DEVCB_DRIVER_LINE_MEMBER(geneve, peripheral_bus_reset),
560      DEVCB_DRIVER_LINE_MEMBER(geneve, VDP_reset),
561      DEVCB_DRIVER_LINE_MEMBER(geneve, joystick_select),
559      DEVCB_DRIVER_LINE_MEMBER(geneve_state, peripheral_bus_reset),
560      DEVCB_DRIVER_LINE_MEMBER(geneve_state, VDP_reset),
561      DEVCB_DRIVER_LINE_MEMBER(geneve_state, joystick_select),
562562      DEVCB_NULL,
563563      DEVCB_NULL,
564564      DEVCB_NULL,
565565      DEVCB_DEVICE_LINE_MEMBER(GKEYBOARD_TAG, geneve_keyboard_device, reset_line),
566      DEVCB_DRIVER_LINE_MEMBER(geneve, extbus_wait_states),
566      DEVCB_DRIVER_LINE_MEMBER(geneve_state, extbus_wait_states),
567567      DEVCB_NULL,
568      DEVCB_DRIVER_LINE_MEMBER(geneve, video_wait_states),
568      DEVCB_DRIVER_LINE_MEMBER(geneve_state, video_wait_states),
569569      DEVCB_NULL,
570570      DEVCB_NULL,
571571      DEVCB_NULL,
r18258r18259
575575   },
576576
577577   /* interrupt handler */
578   DEVCB_DRIVER_MEMBER(geneve, tms9901_interrupt)
578   DEVCB_DRIVER_MEMBER(geneve_state, tms9901_interrupt)
579579};
580580
581581/*******************************************************************
r18258r18259
584584/*
585585    inta is connected to both tms9901 IRQ1 line and to tms9995 INT4/EC line.
586586*/
587WRITE_LINE_MEMBER( geneve::inta )
587WRITE_LINE_MEMBER( geneve_state::inta )
588588{
589589   m_inta = (state!=0)? ASSERT_LINE : CLEAR_LINE;
590590   m_tms9901->set_single_int(1, state);
r18258r18259
594594/*
595595    intb is connected to tms9901 IRQ12 line.
596596*/
597WRITE_LINE_MEMBER( geneve::intb )
597WRITE_LINE_MEMBER( geneve_state::intb )
598598{
599599   m_intb = (state!=0)? ASSERT_LINE : CLEAR_LINE;
600600   m_tms9901->set_single_int(12, state);
601601}
602602
603WRITE_LINE_MEMBER( geneve::ext_ready )
603WRITE_LINE_MEMBER( geneve_state::ext_ready )
604604{
605605   if (VERBOSE>6) LOG("ti99_8: READY level (ext) =%02x\n", state);
606606   m_ready_line = state;
607607   m_cpu->set_ready((m_ready_line == ASSERT_LINE && m_ready_line1 == ASSERT_LINE)? ASSERT_LINE : CLEAR_LINE);
608608}
609609
610WRITE_LINE_MEMBER( geneve::mapper_ready )
610WRITE_LINE_MEMBER( geneve_state::mapper_ready )
611611{
612612   if (VERBOSE>6) LOG("geneve: READY level (mapper) = %02x\n", state);
613613   m_ready_line1 = state;
r18258r18259
617617/*
618618    set the state of int2 (called by the v9938 core)
619619*/
620void geneve::set_tms9901_INT2_from_v9938(v99x8_device &vdp, int state)
620void geneve_state::set_tms9901_INT2_from_v9938(v99x8_device &vdp, int state)
621621{
622622   m_int2 = (state!=0)? ASSERT_LINE : CLEAR_LINE;
623623   m_tms9901->set_single_int(2, state);
r18258r18259
626626/*
627627    Interrupt from the keyboard.
628628*/
629WRITE_LINE_MEMBER( geneve::keyboard_interrupt )
629WRITE_LINE_MEMBER( geneve_state::keyboard_interrupt )
630630{
631631   m_keyint = (state!=0)? ASSERT_LINE : CLEAR_LINE;
632632   m_tms9901->set_single_int(8, state);
r18258r18259
635635/*
636636    scanline interrupt
637637*/
638TIMER_DEVICE_CALLBACK_MEMBER(geneve::geneve_hblank_interrupt)
638TIMER_DEVICE_CALLBACK_MEMBER(geneve_state::geneve_hblank_interrupt)
639639{
640640   int scanline = param;
641641
r18258r18259
653653   }
654654}
655655
656WRITE8_MEMBER( geneve::external_operation )
656WRITE8_MEMBER( geneve_state::external_operation )
657657{
658658   static const char* extop[8] = { "inv1", "inv2", "IDLE", "RSET", "inv3", "CKON", "CKOF", "LREX" };
659659   if (VERBOSE>1)
r18258r18259
663663/*
664664    Clock line from the CPU. Used to control wait state generation.
665665*/
666WRITE_LINE_MEMBER( geneve::clock_out )
666WRITE_LINE_MEMBER( geneve_state::clock_out )
667667{
668668   m_mapper->clock_in(state);
669669}
670670
671671static TMS9995_CONFIG( geneve_processor_config )
672672{
673   DEVCB_DRIVER_MEMBER(geneve, external_operation),
673   DEVCB_DRIVER_MEMBER(geneve_state, external_operation),
674674   DEVCB_NULL,         // Instruction acquisition
675   DEVCB_DRIVER_LINE_MEMBER(geneve, clock_out),
675   DEVCB_DRIVER_LINE_MEMBER(geneve_state, clock_out),
676676   DEVCB_NULL,         // wait
677677   DEVCB_NULL,         // HOLDA
678678   INTERNAL_RAM,      // use internal RAM
r18258r18259
681681
682682static TI_SOUND_CONFIG( sound_conf )
683683{
684   DEVCB_DRIVER_LINE_MEMBER(geneve, ext_ready)   // READY
684   DEVCB_DRIVER_LINE_MEMBER(geneve_state, ext_ready)   // READY
685685};
686686
687687static const mm58274c_interface geneve_mm58274c_interface =
r18258r18259
692692
693693static GENEVE_KEYBOARD_CONFIG( geneve_keyb_conf )
694694{
695   DEVCB_DRIVER_LINE_MEMBER(geneve, keyboard_interrupt)
695   DEVCB_DRIVER_LINE_MEMBER(geneve_state, keyboard_interrupt)
696696};
697697
698698static PERIBOX_CONFIG( peribox_conf )
699699{
700   DEVCB_DRIVER_LINE_MEMBER(geneve, inta),         // INTA
701   DEVCB_DRIVER_LINE_MEMBER(geneve, intb),         // INTB
702   DEVCB_DRIVER_LINE_MEMBER(geneve, ext_ready),   // READY
700   DEVCB_DRIVER_LINE_MEMBER(geneve_state, inta),         // INTA
701   DEVCB_DRIVER_LINE_MEMBER(geneve_state, intb),         // INTB
702   DEVCB_DRIVER_LINE_MEMBER(geneve_state, ext_ready),   // READY
703703   0x00000                                 // Address bus prefix (Mapper will produce prefixes)
704704};
705705
706706static GENEVE_MAPPER_CONFIG( mapper_conf )
707707{
708   DEVCB_DRIVER_LINE_MEMBER(geneve, mapper_ready)   // READY
708   DEVCB_DRIVER_LINE_MEMBER(geneve_state, mapper_ready)   // READY
709709};
710710
711711static JOYPORT_CONFIG( joyport_60 )
r18258r18259
714714   60
715715};
716716
717DRIVER_INIT_MEMBER(geneve,geneve)
717DRIVER_INIT_MEMBER(geneve_state,geneve)
718718{
719719}
720720
721void geneve::machine_start()
721void geneve_state::machine_start()
722722{
723723   m_tms9901 = static_cast<tms9901_device*>(machine().device(TMS9901_TAG));
724724   m_mapper = static_cast<geneve_mapper_device*>(machine().device(GMAPPER_TAG));
r18258r18259
732732/*
733733    Reset the machine.
734734*/
735void geneve::machine_reset()
735void geneve_state::machine_reset()
736736{
737737   m_inta = CLEAR_LINE;   // flag reflecting the INTA line
738738   m_intb = CLEAR_LINE;   // flag reflecting the INTB line
r18258r18259
750750   m_joyport->write_port(0x01);   // select Joystick 1
751751}
752752
753static MACHINE_CONFIG_START( geneve_60hz, geneve )
753static MACHINE_CONFIG_START( geneve_60hz, geneve_state )
754754   // basic machine hardware
755755   // TMS9995 CPU @ 12.0 MHz
756756   MCFG_TMS9995_ADD("maincpu", TMS9995, 12000000, memmap, crumap, geneve_processor_config)
r18258r18259
762762   // interlace mode, but in non-interlace modes only half of the lines are
763763   // painted. Accordingly, the full set of lines is refreshed at 30 Hz,
764764   // not 60 Hz. This should be fixed in the v9938 emulation.
765   MCFG_TI_V9938_ADD(VIDEO_SYSTEM_TAG, 30, SCREEN_TAG, 2500, 512+32, (212+28)*2, DEVICE_SELF, geneve, set_tms9901_INT2_from_v9938)
766   MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", geneve, geneve_hblank_interrupt, SCREEN_TAG, 0, 1) /* 262.5 in 60Hz, 312.5 in 50Hz */
765   MCFG_TI_V9938_ADD(VIDEO_SYSTEM_TAG, 30, SCREEN_TAG, 2500, 512+32, (212+28)*2, DEVICE_SELF, geneve_state, set_tms9901_INT2_from_v9938)
766   MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", geneve_state, geneve_hblank_interrupt, SCREEN_TAG, 0, 1) /* 262.5 in 60Hz, 312.5 in 50Hz */
767767
768768   // Main board components
769769   MCFG_TMS9901_ADD(TMS9901_TAG, tms9901_wiring_geneve, 3000000)
r18258r18259
802802ROM_END
803803
804804/*    YEAR  NAME      PARENT    COMPAT  MACHINE      INPUT    INIT       COMPANY     FULLNAME */
805COMP( 1987,geneve,   0,      0,      geneve_60hz,  geneve, geneve,  geneve,      "Myarc",   "Geneve 9640" , 0)
805COMP( 1987,geneve,   0,      0,      geneve_60hz,  geneve, geneve_state,  geneve,      "Myarc",   "Geneve 9640" , 0)
trunk/src/mess/drivers/tm990189.c
r18258r18259
6969#include "tm990189v.lh"
7070
7171
72class tm990189 : public driver_device
72class tm990189_state : public driver_device
7373{
7474public:
75   tm990189(const machine_config &mconfig, device_type type, const char *tag)
75   tm990189_state(const machine_config &mconfig, device_type type, const char *tag)
7676      : driver_device(mconfig, type, tag),
7777   m_tms9980a(*this, "maincpu"),
7878   m_speaker(*this, SPEAKER_TAG),
r18258r18259
161161
162162
163163
164MACHINE_RESET_MEMBER(tm990189,tm990_189)
164MACHINE_RESET_MEMBER(tm990189_state,tm990_189)
165165{
166166   m_tms9980a->set_ready(ASSERT_LINE);
167167   m_tms9980a->set_hold(CLEAR_LINE);
168168   hold_load(machine());
169169}
170170
171MACHINE_START_MEMBER(tm990189,tm990_189)
171MACHINE_START_MEMBER(tm990189_state,tm990_189)
172172{
173173   m_displayena_timer = machine().scheduler().timer_alloc(FUNC_NULL);
174174}
r18258r18259
180180   DEVCB_NULL
181181};
182182
183MACHINE_START_MEMBER(tm990189,tm990_189_v)
183MACHINE_START_MEMBER(tm990189_state,tm990_189_v)
184184{
185185
186186   m_displayena_timer = machine().scheduler().timer_alloc(FUNC_NULL);
r18258r18259
191191   m_joy2y_timer = machine().scheduler().timer_alloc(FUNC_NULL);
192192}
193193
194MACHINE_RESET_MEMBER(tm990189,tm990_189_v)
194MACHINE_RESET_MEMBER(tm990189_state,tm990_189_v)
195195{
196196   m_tms9980a->set_ready(ASSERT_LINE);
197197   m_tms9980a->set_hold(CLEAR_LINE);
r18258r18259
201201/*
202202    Will be called back from the CPU when triggering an interrupt.
203203*/
204READ8_MEMBER( tm990189::interrupt_level )
204READ8_MEMBER( tm990189_state::interrupt_level )
205205{
206206   return m_ic_state;
207207}
r18258r18259
212212
213213static TIMER_CALLBACK(clear_load)
214214{
215   tm990189 *state = machine.driver_data<tm990189>();
215   tm990189_state *state = machine.driver_data<tm990189_state>();
216216   state->m_load_state = FALSE;
217217   state->m_tms9980a->set_input_line(0, CLEAR_LINE);
218218}
219219
220220static void hold_load(running_machine &machine)
221221{
222   tm990189 *state = machine.driver_data<tm990189>();
222   tm990189_state *state = machine.driver_data<tm990189_state>();
223223   state->m_load_state = TRUE;
224224   state->m_ic_state = 2;      // LOAD interrupt
225225   state->m_tms9980a->set_input_line(0, ASSERT_LINE);
r18258r18259
229229/*
230230    LOAD interrupt switch
231231*/
232INPUT_CHANGED_MEMBER( tm990189::load_interrupt )
232INPUT_CHANGED_MEMBER( tm990189_state::load_interrupt )
233233{
234234   // When depressed, fire LOAD (neg logic)
235235   if (newval==CLEAR_LINE) hold_load(machine());
r18258r18259
243243    Supports EIA and TTY terminals, and an optional 9918 controller.
244244*/
245245
246void tm990189::draw_digit()
246void tm990189_state::draw_digit()
247247{
248248   m_segment_state[m_digitsel] |= ~m_segment;
249249}
250250
251251
252TIMER_DEVICE_CALLBACK_MEMBER(tm990189::display_callback)
252TIMER_DEVICE_CALLBACK_MEMBER(tm990189_state::display_callback)
253253{
254254   UINT8 i;
255255   char ledname[8];
r18258r18259
275275    tms9901 code
276276*/
277277
278WRITE8_MEMBER( tm990189::usr9901_interrupt_callback )
278WRITE8_MEMBER( tm990189_state::usr9901_interrupt_callback )
279279{
280280   // Triggered by internal timer (set by ROM to 1.6 ms cycle) on level 3
281281   // or by keyboard interrupt (level 6)
r18258r18259
286286   }
287287}
288288
289void tm990189::led_set(int offset, bool state)
289void tm990189_state::led_set(int offset, bool state)
290290{
291291   if (state)
292292      m_LED_state |= (1 << offset);
r18258r18259
294294      m_LED_state &= ~(1 << offset);
295295}
296296
297WRITE_LINE_MEMBER( tm990189::usr9901_led0_w )
297WRITE_LINE_MEMBER( tm990189_state::usr9901_led0_w )
298298{
299299   led_set(0, state);
300300}
301301
302WRITE_LINE_MEMBER( tm990189::usr9901_led1_w )
302WRITE_LINE_MEMBER( tm990189_state::usr9901_led1_w )
303303{
304304   led_set(1, state);
305305}
306306
307WRITE_LINE_MEMBER( tm990189::usr9901_led2_w )
307WRITE_LINE_MEMBER( tm990189_state::usr9901_led2_w )
308308{
309309   led_set(2, state);
310310}
311311
312WRITE_LINE_MEMBER( tm990189::usr9901_led3_w )
312WRITE_LINE_MEMBER( tm990189_state::usr9901_led3_w )
313313{
314314   led_set(3, state);
315315}
316316
317WRITE8_MEMBER( tm990189::sys9901_interrupt_callback )
317WRITE8_MEMBER( tm990189_state::sys9901_interrupt_callback )
318318{
319319   machine().device<tms9901_device>("tms9901_0")->set_single_int(5, (data!=0)? ASSERT_LINE:CLEAR_LINE);
320320}
321321
322READ8_MEMBER( tm990189::sys9901_r )
322READ8_MEMBER( tm990189_state::sys9901_r )
323323{
324324   UINT8 data = 0;
325325   if (offset == TMS9901_CB_INT7)
r18258r18259
338338   return data;
339339}
340340
341void tm990189::digitsel(int offset, bool state)
341void tm990189_state::digitsel(int offset, bool state)
342342{
343343   if (state)
344344      m_digitsel |= 1 << offset;
r18258r18259
346346      m_digitsel &= ~ (1 << offset);
347347}
348348
349WRITE_LINE_MEMBER( tm990189::sys9901_digitsel0_w )
349WRITE_LINE_MEMBER( tm990189_state::sys9901_digitsel0_w )
350350{
351351   digitsel(0, state);
352352}
353WRITE_LINE_MEMBER( tm990189::sys9901_digitsel1_w )
353WRITE_LINE_MEMBER( tm990189_state::sys9901_digitsel1_w )
354354{
355355   digitsel(1, state);
356356}
357WRITE_LINE_MEMBER( tm990189::sys9901_digitsel2_w )
357WRITE_LINE_MEMBER( tm990189_state::sys9901_digitsel2_w )
358358{
359359   digitsel(2, state);
360360}
361WRITE_LINE_MEMBER( tm990189::sys9901_digitsel3_w )
361WRITE_LINE_MEMBER( tm990189_state::sys9901_digitsel3_w )
362362{
363363   digitsel(3, state);
364364}
365365
366366
367void tm990189::segment_set(int offset, bool state)
367void tm990189_state::segment_set(int offset, bool state)
368368{
369369   if (state)
370370      m_segment |= 1 << offset;
r18258r18259
376376   }
377377}
378378
379WRITE_LINE_MEMBER( tm990189::sys9901_segment0_w )
379WRITE_LINE_MEMBER( tm990189_state::sys9901_segment0_w )
380380{
381381   segment_set(0, state);
382382}
383WRITE_LINE_MEMBER( tm990189::sys9901_segment1_w )
383WRITE_LINE_MEMBER( tm990189_state::sys9901_segment1_w )
384384{
385385   segment_set(1, state);
386386}
387WRITE_LINE_MEMBER( tm990189::sys9901_segment2_w )
387WRITE_LINE_MEMBER( tm990189_state::sys9901_segment2_w )
388388{
389389   segment_set(2, state);
390390}
391WRITE_LINE_MEMBER( tm990189::sys9901_segment3_w )
391WRITE_LINE_MEMBER( tm990189_state::sys9901_segment3_w )
392392{
393393   segment_set(3, state);
394394}
395WRITE_LINE_MEMBER( tm990189::sys9901_segment4_w )
395WRITE_LINE_MEMBER( tm990189_state::sys9901_segment4_w )
396396{
397397   segment_set(4, state);
398398}
399WRITE_LINE_MEMBER( tm990189::sys9901_segment5_w )
399WRITE_LINE_MEMBER( tm990189_state::sys9901_segment5_w )
400400{
401401   segment_set(5, state);
402402}
403WRITE_LINE_MEMBER( tm990189::sys9901_segment6_w )
403WRITE_LINE_MEMBER( tm990189_state::sys9901_segment6_w )
404404{
405405   segment_set(6, state);
406406}
407WRITE_LINE_MEMBER( tm990189::sys9901_segment7_w )
407WRITE_LINE_MEMBER( tm990189_state::sys9901_segment7_w )
408408{
409409   segment_set(7, state);
410410}
411411
412WRITE_LINE_MEMBER( tm990189::sys9901_dsplytrgr_w )
412WRITE_LINE_MEMBER( tm990189_state::sys9901_dsplytrgr_w )
413413{
414414   if ((!state) && (m_digitsel < 10))
415415   {
r18258r18259
418418   }
419419}
420420
421WRITE_LINE_MEMBER( tm990189::sys9901_shiftlight_w )
421WRITE_LINE_MEMBER( tm990189_state::sys9901_shiftlight_w )
422422{
423423   if (state)
424424      m_LED_state |= 0x10;
r18258r18259
426426      m_LED_state &= ~0x10;
427427}
428428
429WRITE_LINE_MEMBER( tm990189::sys9901_spkrdrive_w )
429WRITE_LINE_MEMBER( tm990189_state::sys9901_spkrdrive_w )
430430{
431431   device_t *speaker = machine().device(SPEAKER_TAG);
432432   speaker_level_w(speaker, state);
433433}
434434
435WRITE_LINE_MEMBER( tm990189::sys9901_tapewdata_w )
435WRITE_LINE_MEMBER( tm990189_state::sys9901_tapewdata_w )
436436{
437437   machine().device<cassette_image_device>(CASSETTE_TAG)->output(state ? +1.0 : -1.0);
438438}
r18258r18259
486486
487487void tm990_189_rs232_image_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
488488{
489   //tm990189 *state = machine.driver_data<tm990189>();
489   //tm990189_state *state = machine.driver_data<tm990189_state>();
490490   UINT8 buf;
491491   if (/*state->m_rs232_rts &&*/ /*(mame_ftell(state->m_rs232_fp) < mame_fsize(state->m_rs232_fp))*/1)
492492   {
r18258r18259
498498
499499bool tm990_189_rs232_image_device::call_load()
500500{
501   tm990189 *state = machine().driver_data<tm990189>();
501   tm990189_state *state = machine().driver_data<tm990189_state>();
502502   tms9902_device* tms9902 = static_cast<tms9902_device*>(machine().device("tms9902"));
503503   tms9902->rcv_dsr(ASSERT_LINE);
504504   state->m_rs232_input_timer = timer_alloc();
r18258r18259
509509
510510void tm990_189_rs232_image_device::call_unload()
511511{
512   tm990189 *state = machine().driver_data<tm990189>();
512   tm990189_state *state = machine().driver_data<tm990189_state>();
513513   tms9902_device* tms9902 = static_cast<tms9902_device*>(machine().device("tms9902"));
514514   tms9902->rcv_dsr(CLEAR_LINE);
515515
r18258r18259
527527    tms9902->set_cts(RTS);
528528} */
529529
530WRITE8_MEMBER( tm990189::xmit_callback )
530WRITE8_MEMBER( tm990189_state::xmit_callback )
531531{
532532   UINT8 buf = data;
533533   if (m_rs232_fp)   m_rs232_fp->fwrite(&buf, 1);
r18258r18259
536536/*
537537    External instruction decoding
538538*/
539WRITE8_MEMBER( tm990189::external_operation )
539WRITE8_MEMBER( tm990189_state::external_operation )
540540{
541541   switch (offset)
542542   {
r18258r18259
569569    Video Board handling
570570*/
571571
572READ8_MEMBER( tm990189::video_vdp_r )
572READ8_MEMBER( tm990189_state::video_vdp_r )
573573{
574574   int reply = 0;
575575
r18258r18259
600600   return reply;
601601}
602602
603WRITE8_MEMBER( tm990189::video_vdp_w )
603WRITE8_MEMBER( tm990189_state::video_vdp_w )
604604{
605605   if (offset & 1)
606606   {
r18258r18259
611611   }
612612}
613613
614READ8_MEMBER( tm990189::video_joy_r )
614READ8_MEMBER( tm990189_state::video_joy_r )
615615{
616616   UINT8 data = ioport("BUTTONS")->read();
617617
r18258r18259
630630   return data;
631631}
632632
633WRITE8_MEMBER( tm990189::video_joy_w )
633WRITE8_MEMBER( tm990189_state::video_joy_w )
634634{
635635   m_joy1x_timer->reset(attotime::from_usec(ioport("JOY1_X")->read()*28+28));
636636   m_joy1y_timer->reset(attotime::from_usec(ioport("JOY1_Y")->read()*28+28));
r18258r18259
648648
649649   /* write handlers */
650650   {
651      DEVCB_DRIVER_LINE_MEMBER(tm990189, usr9901_led0_w),
652      DEVCB_DRIVER_LINE_MEMBER(tm990189, usr9901_led1_w),
653      DEVCB_DRIVER_LINE_MEMBER(tm990189, usr9901_led2_w),
654      DEVCB_DRIVER_LINE_MEMBER(tm990189, usr9901_led3_w),
651      DEVCB_DRIVER_LINE_MEMBER(tm990189_state, usr9901_led0_w),
652      DEVCB_DRIVER_LINE_MEMBER(tm990189_state, usr9901_led1_w),
653      DEVCB_DRIVER_LINE_MEMBER(tm990189_state, usr9901_led2_w),
654      DEVCB_DRIVER_LINE_MEMBER(tm990189_state, usr9901_led3_w),
655655      DEVCB_NULL,
656656      DEVCB_NULL,
657657      DEVCB_NULL,
r18258r18259
667667   },
668668
669669   /* interrupt handler */
670   DEVCB_DRIVER_MEMBER(tm990189, usr9901_interrupt_callback)
670   DEVCB_DRIVER_MEMBER(tm990189_state, usr9901_interrupt_callback)
671671};
672672
673673/* system tms9901 setup */
r18258r18259
676676   0,   /* only input pins whose state is always known */
677677
678678   /* Read handler. Covers all input lines (see tms9901.h) */
679   DEVCB_DRIVER_MEMBER(tm990189, sys9901_r),
679   DEVCB_DRIVER_MEMBER(tm990189_state, sys9901_r),
680680
681681   /* write handlers */
682682   {
683      DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_digitsel0_w),
684      DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_digitsel1_w),
685      DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_digitsel2_w),
686      DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_digitsel3_w),
687      DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_segment0_w),
688      DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_segment1_w),
689      DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_segment2_w),
690      DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_segment3_w),
691      DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_segment4_w),
692      DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_segment5_w),
693      DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_segment6_w),
694      DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_segment7_w),
695      DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_dsplytrgr_w),
696      DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_shiftlight_w),
697      DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_spkrdrive_w),
698      DEVCB_DRIVER_LINE_MEMBER(tm990189, sys9901_tapewdata_w)
683      DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_digitsel0_w),
684      DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_digitsel1_w),
685      DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_digitsel2_w),
686      DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_digitsel3_w),
687      DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_segment0_w),
688      DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_segment1_w),
689      DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_segment2_w),
690      DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_segment3_w),
691      DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_segment4_w),
692      DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_segment5_w),
693      DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_segment6_w),
694      DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_segment7_w),
695      DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_dsplytrgr_w),
696      DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_shiftlight_w),
697      DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_spkrdrive_w),
698      DEVCB_DRIVER_LINE_MEMBER(tm990189_state, sys9901_tapewdata_w)
699699   },
700700
701701   /* interrupt handler */
702   DEVCB_DRIVER_MEMBER(tm990189, sys9901_interrupt_callback)
702   DEVCB_DRIVER_MEMBER(tm990189_state, sys9901_interrupt_callback)
703703};
704704
705705/*
r18258r18259
734734{
735735   DEVCB_NULL,            /*int_callback,*/   /* called when interrupt pin state changes */
736736   DEVCB_NULL,            /*rcv_callback,*/   /* called when a character shall be received  */
737   DEVCB_DRIVER_MEMBER(tm990189, xmit_callback),         /* called when a character is transmitted */
737   DEVCB_DRIVER_MEMBER(tm990189_state, xmit_callback),         /* called when a character is transmitted */
738738   DEVCB_NULL            /* called for setting interface parameters and line states */
739739};
740740
741static ADDRESS_MAP_START( tm990_189_memmap, AS_PROGRAM, 8, tm990189 )
741static ADDRESS_MAP_START( tm990_189_memmap, AS_PROGRAM, 8, tm990189_state )
742742   AM_RANGE(0x0000, 0x07ff) AM_RAM                           /* RAM */
743743   AM_RANGE(0x0800, 0x0fff) AM_ROM                           /* extra ROM - application programs with unibug, remaining 2kb of program for university basic */
744744   AM_RANGE(0x1000, 0x2fff) AM_NOP                           /* reserved for expansion (RAM and/or tms9918 video controller) */
745745   AM_RANGE(0x3000, 0x3fff) AM_ROM                           /* main ROM - unibug or university basic */
746746ADDRESS_MAP_END
747747
748static ADDRESS_MAP_START( tm990_189_v_memmap, AS_PROGRAM, 8, tm990189 )
748static ADDRESS_MAP_START( tm990_189_v_memmap, AS_PROGRAM, 8, tm990189_state )
749749   AM_RANGE(0x0000, 0x07ff) AM_RAM                           /* RAM */
750750   AM_RANGE(0x0800, 0x0fff) AM_ROM                           /* extra ROM - application programs with unibug, remaining 2kb of program for university basic */
751751
r18258r18259
813813           d
814814*/
815815
816static ADDRESS_MAP_START( tm990_189_cru_map, AS_IO, 8, tm990189 )
816static ADDRESS_MAP_START( tm990_189_cru_map, AS_IO, 8, tm990189_state )
817817   AM_RANGE(0x0000, 0x003f) AM_DEVREAD("tms9901_0", tms9901_device, read)      /* user I/O tms9901 */
818818   AM_RANGE(0x0040, 0x006f) AM_DEVREAD("tms9901_1", tms9901_device, read)      /* system I/O tms9901 */
819819   AM_RANGE(0x0080, 0x00cf) AM_DEVREAD("tms9902", tms9902_device, cruread)      /* optional tms9902 */
r18258r18259
825825
826826static TMS99xx_CONFIG( cpuconf )
827827{
828   DEVCB_DRIVER_MEMBER(tm990189, external_operation),
829   DEVCB_DRIVER_MEMBER(tm990189, interrupt_level),
828   DEVCB_DRIVER_MEMBER(tm990189_state, external_operation),
829   DEVCB_DRIVER_MEMBER(tm990189_state, interrupt_level),
830830   DEVCB_NULL,      // Instruction acquisition
831831   DEVCB_NULL,      // Clock out
832832   DEVCB_NULL,      // wait
833833   DEVCB_NULL      // Hold acknowledge
834834};
835835
836static MACHINE_CONFIG_START( tm990_189, tm990189 )
836static MACHINE_CONFIG_START( tm990_189, tm990189_state )
837837   /* basic machine hardware */
838838   MCFG_TMS99xx_ADD("maincpu", TMS9980A, 2000000, tm990_189_memmap, tm990_189_cru_map, cpuconf)
839839
840   MCFG_MACHINE_START_OVERRIDE(tm990189, tm990_189 )
841   MCFG_MACHINE_RESET_OVERRIDE(tm990189, tm990_189 )
840   MCFG_MACHINE_START_OVERRIDE(tm990189_state, tm990_189 )
841   MCFG_MACHINE_RESET_OVERRIDE(tm990189_state, tm990_189 )
842842
843843   /* Video hardware */
844844   MCFG_DEFAULT_LAYOUT(layout_tm990189)
r18258r18259
856856   MCFG_TMS9901_ADD("tms9901_1", sys9901reset_param, 2000000)
857857   MCFG_TMS9902_ADD("tms9902", tms9902_params, 2000000)
858858   MCFG_TM990_189_RS232_ADD("rs232")
859   MCFG_TIMER_DRIVER_ADD_PERIODIC("display_timer", tm990189, display_callback, attotime::from_hz(30))
859   MCFG_TIMER_DRIVER_ADD_PERIODIC("display_timer", tm990189_state, display_callback, attotime::from_hz(30))
860860   // Need to delay the timer, or it will spoil the initial LOAD
861861   // TODO: Fix this, probably inside CPU
862862   MCFG_TIMER_START_DELAY(attotime::from_msec(150))
863863MACHINE_CONFIG_END
864864
865static MACHINE_CONFIG_START( tm990_189_v, tm990189 )
865static MACHINE_CONFIG_START( tm990_189_v, tm990189_state )
866866   /* basic machine hardware */
867867   MCFG_TMS99xx_ADD("maincpu", TMS9980A, 2000000, tm990_189_v_memmap, tm990_189_cru_map, cpuconf)
868868
869   MCFG_MACHINE_START_OVERRIDE(tm990189, tm990_189_v )
870   MCFG_MACHINE_RESET_OVERRIDE(tm990189, tm990_189_v )
869   MCFG_MACHINE_START_OVERRIDE(tm990189_state, tm990_189_v )
870   MCFG_MACHINE_RESET_OVERRIDE(tm990189_state, tm990_189_v )
871871
872872   /* video hardware */
873873   MCFG_TMS9928A_ADD( "tms9918", TMS9918, tms9918_interface )
r18258r18259
888888   MCFG_TMS9901_ADD("tms9901_1", sys9901reset_param, 2000000)
889889   MCFG_TMS9902_ADD("tms9902", tms9902_params,   2000000)
890890   MCFG_TM990_189_RS232_ADD("rs232")
891   MCFG_TIMER_DRIVER_ADD_PERIODIC("display_timer", tm990189, display_callback, attotime::from_hz(30))
891   MCFG_TIMER_DRIVER_ADD_PERIODIC("display_timer", tm990189_state, display_callback, attotime::from_hz(30))
892892   MCFG_TIMER_START_DELAY(attotime::from_msec(150))
893893MACHINE_CONFIG_END
894894
r18258r18259
931931static INPUT_PORTS_START(tm990_189)
932932
933933   PORT_START( "LOADINT ")
934      PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Load interrupt") PORT_CODE(KEYCODE_PRTSCR) PORT_CHANGED_MEMBER(DEVICE_SELF, tm990189, load_interrupt, 1)
934      PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Load interrupt") PORT_CODE(KEYCODE_PRTSCR) PORT_CHANGED_MEMBER(DEVICE_SELF, tm990189_state, load_interrupt, 1)
935935
936936   /* 45-key calculator-like alphanumeric keyboard... */
937937   PORT_START("LINE0")    /* row 0 */

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