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r18258 Wednesday 3rd October, 2012 at 09:27:22 UTC by Miodrag Milanović
Replace some *_DEVICE_HANDLER with _MEMBER calls in MESS section (no whatsnew)

[src/mess/drivers]	ace.c adam.c amstrad.c apple2.c apple2gs.c bbc.c bullet.c bw12.c cgenie.c coleco.c einstein.c enterp.c fm7.c fmtowns.c huebler.c kaypro.c kyocera.c m5.c msx.c mtx.c nascom1.c nc.c nes.c ob68k1a.c osi.c pc.c pce.c pcw.c pcw16.c pes.c pet.c pokemini.c portfoli.c ql.c rmnimbus.c samcoupe.c sg1000.c sms.c ssystem3.c super6.c svi318.c tandy2k.c tsispch.c v1050.c victor9k.c x1.c x68k.c xerox820.c xor100.c z80ne.c
[src/mess/includes]	a7800.h ac1.h ace.h adam.h amstrad.h apple1.h apple2.h apple2gs.h apple3.h b2m.h bbc.h bebox.h bullet.h bw12.h c64_legacy.h c65.h cgenie.h coleco.h concept.h dgn_beta.h einstein.h enterp.h fm7.h fmtowns.h huebler.h irisha.h kaypro.h kramermc.h kyocera.h lisa.h lviv.h m5.h mac.h macpci.h mc80.h microtan.h msx.h mtx.h mz700.h nascom1.h nc.h nes.h ob68k1a.h oric.h orion.h osi.h partner.h pc.h pce.h pcw.h pcw16.h pecom.h pes.h pet.h pk8020.h pmd85.h pokemini.h poly88.h portfoli.h pp01.h ql.h radio86.h rmnimbus.h samcoupe.h sg1000.h sms.h ssystem3.h super6.h super80.h svi318.h sym1.h tandy2k.h trs80.h tsispch.h v1050.h victor9k.h x1.h x68k.h xerox820.h xor100.h z80ne.h
[src/mess/machine]	a7800.c ac1.c amstrad.c apple1.c apple3.c b2m.c bbc.c bebox.c c64.c c65.c cgenie.c concept.c dgn_beta.c irisha.c kaypro.c kramermc.c lisa.c lviv.c mac.c macpci.c mc80.c microtan.c msx.c mtx.c mz700.c nascom1.c oric.c orion.c partner.c pc.c pecom.c pet.c pk8020.c pmd85.c pokemini.c poly88.c pp01.c radio86.c rmnimbus.c samcoupe.c sms.c super80.c svi318.c sym1.c trs80.c z80ne.c
[src/mess/video]	bbc.c dgn_beta.c pecom.c pet.c

trunk/src/mess/machine/microtan.c

r18257	r18258
161	161	/**************************************************************
162	162	* VIA callback functions for VIA #0
163	163	**************************************************************/
164		static READ8_DEVICE_HANDLER (via_0_in_a )
	164	READ8_MEMBER(microtan_state::via_0_in_a)
165	165	{
166		int data = space.machine().root_device().ioport("JOY")->read();
	166	int data = machine().root_device().ioport("JOY")->read();
167	167	LOG(("microtan_via_0_in_a %02X\n", data));
168	168	return data;
169	169	}
170	170
171		static READ8_DEVICE_HANDLER ( via_0_in_b )
	171	READ8_MEMBER(microtan_state::via_0_in_b)
172	172	{
173	173	int data = 0xff;
174	174	LOG(("microtan_via_0_in_b %02X\n", data));
175	175	return data;
176	176	}
177	177
178		static READ8_DEVICE_HANDLER ( via_0_in_ca1 )
	178	READ8_MEMBER(microtan_state::via_0_in_ca1)
179	179	{
180	180	int data = 1;
181	181	LOG(("microtan_via_0_in_ca1 %d\n", data));
182	182	return data;
183	183	}
184	184
185		static READ8_DEVICE_HANDLER ( via_0_in_cb1 )
	185	READ8_MEMBER(microtan_state::via_0_in_cb1)
186	186	{
187	187	int data = 1;
188	188	LOG(("microtan_via_0_in_cb1 %d\n", data));
189	189	return data;
190	190	}
191	191
192		static READ8_DEVICE_HANDLER ( via_0_in_ca2 )
	192	READ8_MEMBER(microtan_state::via_0_in_ca2)
193	193	{
194	194	int data = 1;
195	195	LOG(("microtan_via_0_in_ca2 %d\n", data));
196	196	return data;
197	197	}
198	198
199		static READ8_DEVICE_HANDLER ( via_0_in_cb2 )
	199	READ8_MEMBER(microtan_state::via_0_in_cb2)
200	200	{
201	201	int data = 1;
202	202	LOG(("microtan_via_0_in_cb2 %d\n", data));
203	203	return data;
204	204	}
205	205
206		static WRITE8_DEVICE_HANDLER ( via_0_out_a )
	206	WRITE8_MEMBER(microtan_state::via_0_out_a)
207	207	{
208	208	LOG(("microtan_via_0_out_a %02X\n", data));
209	209	}
210	210
211		static WRITE8_DEVICE_HANDLER (via_0_out_b )
	211	WRITE8_MEMBER(microtan_state::via_0_out_b)
212	212	{
213	213	LOG(("microtan_via_0_out_b %02X\n", data));
214	214	/* bit #7 is the cassette output signal */
215		cassette_device_image(space.machine())->output(data & 0x80 ? +1.0 : -1.0);
	215	cassette_device_image(machine())->output(data & 0x80 ? +1.0 : -1.0);
216	216	}
217	217
218		static WRITE8_DEVICE_HANDLER ( via_0_out_ca2 )
	218	WRITE8_MEMBER(microtan_state::via_0_out_ca2)
219	219	{
220	220	LOG(("microtan_via_0_out_ca2 %d\n", data));
221	221	}
222	222
223		static WRITE8_DEVICE_HANDLER (via_0_out_cb2 )
	223	WRITE8_MEMBER(microtan_state::via_0_out_cb2)
224	224	{
225	225	LOG(("microtan_via_0_out_cb2 %d\n", data));
226	226	}
r18257	r18258
236	236	/**************************************************************
237	237	* VIA callback functions for VIA #1
238	238	**************************************************************/
239		static READ8_DEVICE_HANDLER ( via_1_in_a )
	239	READ8_MEMBER(microtan_state::via_1_in_a)
240	240	{
241	241	int data = 0xff;
242	242	LOG(("microtan_via_1_in_a %02X\n", data));
243	243	return data;
244	244	}
245	245
246		static READ8_DEVICE_HANDLER ( via_1_in_b )
	246	READ8_MEMBER(microtan_state::via_1_in_b)
247	247	{
248	248	int data = 0xff;
249	249	LOG(("microtan_via_1_in_b %02X\n", data));
250	250	return data;
251	251	}
252	252
253		static READ8_DEVICE_HANDLER ( via_1_in_ca1 )
	253	READ8_MEMBER(microtan_state::via_1_in_ca1)
254	254	{
255	255	int data = 1;
256	256	LOG(("microtan_via_1_in_ca1 %d\n", data));
257	257	return data;
258	258	}
259	259
260		static READ8_DEVICE_HANDLER ( via_1_in_cb1 )
	260	READ8_MEMBER(microtan_state::via_1_in_cb1)
261	261	{
262	262	int data = 1;
263	263	LOG(("microtan_via_1_in_cb1 %d\n", data));
264	264	return data;
265	265	}
266	266
267		static READ8_DEVICE_HANDLER ( via_1_in_ca2 )
	267	READ8_MEMBER(microtan_state::via_1_in_ca2)
268	268	{
269	269	int data = 1;
270	270	LOG(("microtan_via_1_in_ca2 %d\n", data));
271	271	return data;
272	272	}
273	273
274		static READ8_DEVICE_HANDLER ( via_1_in_cb2 )
	274	READ8_MEMBER(microtan_state::via_1_in_cb2)
275	275	{
276	276	int data = 1;
277	277	LOG(("microtan_via_1_in_cb2 %d\n", data));
278	278	return data;
279	279	}
280	280
281		static WRITE8_DEVICE_HANDLER ( via_1_out_a )
	281	WRITE8_MEMBER(microtan_state::via_1_out_a)
282	282	{
283	283	LOG(("microtan_via_1_out_a %02X\n", data));
284	284	}
285	285
286		static WRITE8_DEVICE_HANDLER ( via_1_out_b )
	286	WRITE8_MEMBER(microtan_state::via_1_out_b)
287	287	{
288	288	LOG(("microtan_via_1_out_b %02X\n", data));
289	289	}
290	290
291		static WRITE8_DEVICE_HANDLER (via_1_out_ca2 )
	291	WRITE8_MEMBER(microtan_state::via_1_out_ca2)
292	292	{
293	293	LOG(("microtan_via_1_out_ca2 %d\n", data));
294	294	}
295	295
296		static WRITE8_DEVICE_HANDLER ( via_1_out_cb2 )
	296	WRITE8_MEMBER(microtan_state::via_1_out_cb2)
297	297	{
298	298	LOG(("microtan_via_1_out_cb2 %d\n", data));
299	299	}
r18257	r18258
312	312	const via6522_interface microtan_via6522_0 =
313	313	{
314	314	/* VIA#1 at bfc0-bfcf*/
315		DEVCB_HANDLER(via_0_in_a),   DEVCB_HANDLER(via_0_in_b),
316		DEVCB_HANDLER(via_0_in_ca1), DEVCB_HANDLER(via_0_in_cb1),
317		DEVCB_HANDLER(via_0_in_ca2), DEVCB_HANDLER(via_0_in_cb2),
318		DEVCB_HANDLER(via_0_out_a),  DEVCB_HANDLER(via_0_out_b),
	315	DEVCB_DRIVER_MEMBER(microtan_state,via_0_in_a),   DEVCB_DRIVER_MEMBER(microtan_state,via_0_in_b),
	316	DEVCB_DRIVER_MEMBER(microtan_state,via_0_in_ca1), DEVCB_DRIVER_MEMBER(microtan_state,via_0_in_cb1),
	317	DEVCB_DRIVER_MEMBER(microtan_state,via_0_in_ca2), DEVCB_DRIVER_MEMBER(microtan_state,via_0_in_cb2),
	318	DEVCB_DRIVER_MEMBER(microtan_state,via_0_out_a),  DEVCB_DRIVER_MEMBER(microtan_state,via_0_out_b),
319	319	DEVCB_NULL, DEVCB_NULL,
320		DEVCB_HANDLER(via_0_out_ca2),DEVCB_HANDLER(via_0_out_cb2),
	320	DEVCB_DRIVER_MEMBER(microtan_state,via_0_out_ca2),DEVCB_DRIVER_MEMBER(microtan_state,via_0_out_cb2),
321	321	DEVCB_LINE(via_0_irq)
322	322	};
323	323
324	324	const via6522_interface microtan_via6522_1 =
325	325	{
326	326	/* VIA#1 at bfe0-bfef*/
327		DEVCB_HANDLER(via_1_in_a),   DEVCB_HANDLER(via_1_in_b),
328		DEVCB_HANDLER(via_1_in_ca1), DEVCB_HANDLER(via_1_in_cb1),
329		DEVCB_HANDLER(via_1_in_ca2), DEVCB_HANDLER(via_1_in_cb2),
330		DEVCB_HANDLER(via_1_out_a),  DEVCB_HANDLER(via_1_out_b),
	327	DEVCB_DRIVER_MEMBER(microtan_state,via_1_in_a),   DEVCB_DRIVER_MEMBER(microtan_state,via_1_in_b),
	328	DEVCB_DRIVER_MEMBER(microtan_state,via_1_in_ca1), DEVCB_DRIVER_MEMBER(microtan_state,via_1_in_cb1),
	329	DEVCB_DRIVER_MEMBER(microtan_state,via_1_in_ca2), DEVCB_DRIVER_MEMBER(microtan_state,via_1_in_cb2),
	330	DEVCB_DRIVER_MEMBER(microtan_state,via_1_out_a),  DEVCB_DRIVER_MEMBER(microtan_state,via_1_out_b),
331	331	DEVCB_NULL, DEVCB_NULL,
332		DEVCB_HANDLER(via_1_out_ca2),DEVCB_HANDLER(via_1_out_cb2),
	332	DEVCB_DRIVER_MEMBER(microtan_state,via_1_out_ca2),DEVCB_DRIVER_MEMBER(microtan_state,via_1_out_cb2),
333	333	DEVCB_LINE(via_1_irq)
334	334	};
335	335

trunk/src/mess/machine/pmd85.c

r18257	r18258
238	238
239	239	*******************************************************************************/
240	240
241		static  READ8_DEVICE_HANDLER ( pmd85_ppi_0_porta_r )
	241	READ8_MEMBER(pmd85_state::pmd85_ppi_0_porta_r)
242	242	{
243	243	return 0xff;
244	244	}
245	245
246		static  READ8_DEVICE_HANDLER ( pmd85_ppi_0_portb_r )
	246	READ8_MEMBER(pmd85_state::pmd85_ppi_0_portb_r)
247	247	{
248		pmd85_state *state = device->machine().driver_data<pmd85_state>();
249	248	static const char *const keynames[] = {
250	249	"KEY0", "KEY1", "KEY2", "KEY3", "KEY4", "KEY5", "KEY6", "KEY7",
251	250	"KEY8", "KEY9", "KEY10", "KEY11", "KEY12", "KEY13", "KEY14", "KEY15"
252	251	};
253	252
254		return device->machine().root_device().ioport(keynames[(state->m_ppi_port_outputs[0][0] & 0x0f)])->read() & device->machine().root_device().ioport("KEY15")->read();
	253	return machine().root_device().ioport(keynames[(m_ppi_port_outputs[0][0] & 0x0f)])->read() & machine().root_device().ioport("KEY15")->read();
255	254	}
256	255
257		static  READ8_DEVICE_HANDLER ( pmd85_ppi_0_portc_r )
	256	READ8_MEMBER(pmd85_state::pmd85_ppi_0_portc_r)
258	257	{
259	258	return 0xff;
260	259	}
261	260
262		static WRITE8_DEVICE_HANDLER ( pmd85_ppi_0_porta_w )
	261	WRITE8_MEMBER(pmd85_state::pmd85_ppi_0_porta_w)
263	262	{
264		pmd85_state *state = space.machine().driver_data<pmd85_state>();
265		state->m_ppi_port_outputs[0][0] = data;
	263	m_ppi_port_outputs[0][0] = data;
266	264	}
267	265
268		static WRITE8_DEVICE_HANDLER ( pmd85_ppi_0_portb_w )
	266	WRITE8_MEMBER(pmd85_state::pmd85_ppi_0_portb_w)
269	267	{
270		pmd85_state *state = space.machine().driver_data<pmd85_state>();
271		state->m_ppi_port_outputs[0][1] = data;
	268	m_ppi_port_outputs[0][1] = data;
272	269	}
273	270
274		static WRITE8_DEVICE_HANDLER ( pmd85_ppi_0_portc_w )
	271	WRITE8_MEMBER(pmd85_state::pmd85_ppi_0_portc_w)
275	272	{
276		pmd85_state *state = space.machine().driver_data<pmd85_state>();
277		state->m_ppi_port_outputs[0][2] = data;
278		set_led_status(space.machine(), PMD85_LED_2, (data & 0x08) ? 1 : 0);
279		set_led_status(space.machine(), PMD85_LED_3, (data & 0x04) ? 1 : 0);
	273	m_ppi_port_outputs[0][2] = data;
	274	set_led_status(machine(), PMD85_LED_2, (data & 0x08) ? 1 : 0);
	275	set_led_status(machine(), PMD85_LED_3, (data & 0x04) ? 1 : 0);
280	276	}
281	277
282	278	/*******************************************************************************
r18257	r18258
287	283
288	284	*******************************************************************************/
289	285
290		static  READ8_DEVICE_HANDLER ( mato_ppi_0_portb_r )
	286	READ8_MEMBER(pmd85_state::mato_ppi_0_portb_r)
291	287	{
292		pmd85_state *state = device->machine().driver_data<pmd85_state>();
293	288	int i;
294	289	UINT8 data = 0xff;
295	290	static const char *const keynames[] = { "KEY0", "KEY1", "KEY2", "KEY3", "KEY4", "KEY5", "KEY6", "KEY7" };
296	291
297	292	for (i = 0; i < 8; i++)
298	293	{
299		if (!BIT(state->m_ppi_port_outputs[0][0], i))
300		data &= device->machine().root_device().ioport(keynames[i])->read();
	294	if (!BIT(m_ppi_port_outputs[0][0], i))
	295	data &= machine().root_device().ioport(keynames[i])->read();
301	296	}
302	297	return data;
303	298	}
304	299
305		static  READ8_DEVICE_HANDLER ( mato_ppi_0_portc_r )
	300	READ8_MEMBER(pmd85_state::mato_ppi_0_portc_r)
306	301	{
307		return device->machine().root_device().ioport("KEY8")->read() | 0x8f;
	302	return machine().root_device().ioport("KEY8")->read() | 0x8f;
308	303	}
309	304
310		static WRITE8_DEVICE_HANDLER ( mato_ppi_0_portc_w )
	305	WRITE8_MEMBER(pmd85_state::mato_ppi_0_portc_w)
311	306	{
312		pmd85_state *state = space.machine().driver_data<pmd85_state>();
313		state->m_ppi_port_outputs[0][2] = data;
314		set_led_status(space.machine(), PMD85_LED_2, BIT(data, 3));
315		set_led_status(space.machine(), PMD85_LED_3, BIT(data, 2));
	307	m_ppi_port_outputs[0][2] = data;
	308	set_led_status(machine(), PMD85_LED_2, BIT(data, 3));
	309	set_led_status(machine(), PMD85_LED_3, BIT(data, 2));
316	310	}
317	311
318	312	/*******************************************************************************
r18257	r18258
323	317
324	318	*******************************************************************************/
325	319
326		static READ8_DEVICE_HANDLER ( pmd85_ppi_1_porta_r )
	320	READ8_MEMBER(pmd85_state::pmd85_ppi_1_porta_r)
327	321	{
328	322	return 0xff;
329	323	}
330	324
331		static READ8_DEVICE_HANDLER ( pmd85_ppi_1_portb_r )
	325	READ8_MEMBER(pmd85_state::pmd85_ppi_1_portb_r)
332	326	{
333	327	return 0xff;
334	328	}
335	329
336		static READ8_DEVICE_HANDLER ( pmd85_ppi_1_portc_r )
	330	READ8_MEMBER(pmd85_state::pmd85_ppi_1_portc_r)
337	331	{
338	332	return 0xff;
339	333	}
340	334
341		static WRITE8_DEVICE_HANDLER ( pmd85_ppi_1_porta_w )
	335	WRITE8_MEMBER(pmd85_state::pmd85_ppi_1_porta_w)
342	336	{
343		pmd85_state *state = space.machine().driver_data<pmd85_state>();
344		state->m_ppi_port_outputs[1][0] = data;
	337	m_ppi_port_outputs[1][0] = data;
345	338	}
346	339
347		static WRITE8_DEVICE_HANDLER ( pmd85_ppi_1_portb_w )
	340	WRITE8_MEMBER(pmd85_state::pmd85_ppi_1_portb_w)
348	341	{
349		pmd85_state *state = space.machine().driver_data<pmd85_state>();
350		state->m_ppi_port_outputs[1][1] = data;
	342	m_ppi_port_outputs[1][1] = data;
351	343	}
352	344
353		static WRITE8_DEVICE_HANDLER ( pmd85_ppi_1_portc_w )
	345	WRITE8_MEMBER(pmd85_state::pmd85_ppi_1_portc_w)
354	346	{
355		pmd85_state *state = space.machine().driver_data<pmd85_state>();
356		state->m_ppi_port_outputs[1][2] = data;
	347	m_ppi_port_outputs[1][2] = data;
357	348	}
358	349
359	350	/*******************************************************************************
r18257	r18258
368	359
369	360	*******************************************************************************/
370	361
371		static READ8_DEVICE_HANDLER ( pmd85_ppi_2_porta_r )
	362	READ8_MEMBER(pmd85_state::pmd85_ppi_2_porta_r)
372	363	{
373	364	return 0xff;
374	365	}
375	366
376		static READ8_DEVICE_HANDLER ( pmd85_ppi_2_portb_r )
	367	READ8_MEMBER(pmd85_state::pmd85_ppi_2_portb_r)
377	368	{
378	369	return 0xff;
379	370	}
380	371
381		static READ8_DEVICE_HANDLER ( pmd85_ppi_2_portc_r )
	372	READ8_MEMBER(pmd85_state::pmd85_ppi_2_portc_r)
382	373	{
383	374	return 0xff;
384	375	}
385	376
386		static WRITE8_DEVICE_HANDLER ( pmd85_ppi_2_porta_w )
	377	WRITE8_MEMBER(pmd85_state::pmd85_ppi_2_porta_w)
387	378	{
388		pmd85_state *state = space.machine().driver_data<pmd85_state>();
389		state->m_ppi_port_outputs[2][0] = data;
	379	m_ppi_port_outputs[2][0] = data;
390	380	}
391	381
392		static WRITE8_DEVICE_HANDLER ( pmd85_ppi_2_portb_w )
	382	WRITE8_MEMBER(pmd85_state::pmd85_ppi_2_portb_w)
393	383	{
394		pmd85_state *state = space.machine().driver_data<pmd85_state>();
395		state->m_ppi_port_outputs[2][1] = data;
	384	m_ppi_port_outputs[2][1] = data;
396	385	}
397	386
398		static WRITE8_DEVICE_HANDLER ( pmd85_ppi_2_portc_w )
	387	WRITE8_MEMBER(pmd85_state::pmd85_ppi_2_portc_w)
399	388	{
400		pmd85_state *state = space.machine().driver_data<pmd85_state>();
401		state->m_ppi_port_outputs[2][2] = data;
	389	m_ppi_port_outputs[2][2] = data;
402	390	}
403	391
404	392	/*******************************************************************************
r18257	r18258
456	444
457	445	*******************************************************************************/
458	446
459		static READ8_DEVICE_HANDLER ( pmd85_ppi_3_porta_r )
	447	READ8_MEMBER(pmd85_state::pmd85_ppi_3_porta_r)
460	448	{
461		pmd85_state *state = space.machine().driver_data<pmd85_state>();
462		if (state->memregion("user1")->base() != NULL)
463		return state->memregion("user1")->base()[state->m_ppi_port_outputs[3][1] | (state->m_ppi_port_outputs[3][2] << 8)];
	449	if (memregion("user1")->base() != NULL)
	450	return memregion("user1")->base()[m_ppi_port_outputs[3][1] | (m_ppi_port_outputs[3][2] << 8)];
464	451	else
465	452	return 0;
466	453	}
467	454
468		static READ8_DEVICE_HANDLER ( pmd85_ppi_3_portb_r )
	455	READ8_MEMBER(pmd85_state::pmd85_ppi_3_portb_r)
469	456	{
470	457	return 0xff;
471	458	}
472	459
473		static READ8_DEVICE_HANDLER ( pmd85_ppi_3_portc_r )
	460	READ8_MEMBER(pmd85_state::pmd85_ppi_3_portc_r)
474	461	{
475	462	return 0xff;
476	463	}
477	464
478		static WRITE8_DEVICE_HANDLER ( pmd85_ppi_3_porta_w )
	465	WRITE8_MEMBER(pmd85_state::pmd85_ppi_3_porta_w)
479	466	{
480		pmd85_state *state = space.machine().driver_data<pmd85_state>();
481		state->m_ppi_port_outputs[3][0] = data;
	467	m_ppi_port_outputs[3][0] = data;
482	468	}
483	469
484		static WRITE8_DEVICE_HANDLER ( pmd85_ppi_3_portb_w )
	470	WRITE8_MEMBER(pmd85_state::pmd85_ppi_3_portb_w)
485	471	{
486		pmd85_state *state = space.machine().driver_data<pmd85_state>();
487		state->m_ppi_port_outputs[3][1] = data;
	472	m_ppi_port_outputs[3][1] = data;
488	473	}
489	474
490		static WRITE8_DEVICE_HANDLER ( pmd85_ppi_3_portc_w )
	475	WRITE8_MEMBER(pmd85_state::pmd85_ppi_3_portc_w)
491	476	{
492		pmd85_state *state = space.machine().driver_data<pmd85_state>();
493		state->m_ppi_port_outputs[3][2] = data;
	477	m_ppi_port_outputs[3][2] = data;
494	478	}
495	479
496	480	/*******************************************************************************
r18257	r18258
715	699	const i8255_interface pmd85_ppi8255_interface[4] =
716	700	{
717	701	{
718		DEVCB_HANDLER(pmd85_ppi_0_porta_r),
719		DEVCB_HANDLER(pmd85_ppi_0_porta_w),
720		DEVCB_HANDLER(pmd85_ppi_0_portb_r),
721		DEVCB_HANDLER(pmd85_ppi_0_portb_w),
722		DEVCB_HANDLER(pmd85_ppi_0_portc_r),
723		DEVCB_HANDLER(pmd85_ppi_0_portc_w)
	702	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_0_porta_r),
	703	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_0_porta_w),
	704	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_0_portb_r),
	705	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_0_portb_w),
	706	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_0_portc_r),
	707	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_0_portc_w)
724	708	},
725	709	{
726		DEVCB_HANDLER(pmd85_ppi_1_porta_r),
727		DEVCB_HANDLER(pmd85_ppi_1_porta_w),
728		DEVCB_HANDLER(pmd85_ppi_1_portb_r),
729		DEVCB_HANDLER(pmd85_ppi_1_portb_w),
730		DEVCB_HANDLER(pmd85_ppi_1_portc_r),
731		DEVCB_HANDLER(pmd85_ppi_1_portc_w)
	710	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_1_porta_r),
	711	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_1_porta_w),
	712	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_1_portb_r),
	713	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_1_portb_w),
	714	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_1_portc_r),
	715	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_1_portc_w)
732	716	},
733	717	{
734		DEVCB_HANDLER(pmd85_ppi_2_porta_r),
735		DEVCB_HANDLER(pmd85_ppi_2_porta_w),
736		DEVCB_HANDLER(pmd85_ppi_2_portb_r),
737		DEVCB_HANDLER(pmd85_ppi_2_portb_w),
738		DEVCB_HANDLER(pmd85_ppi_2_portc_r),
739		DEVCB_HANDLER(pmd85_ppi_2_portc_w)
	718	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_2_porta_r),
	719	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_2_porta_w),
	720	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_2_portb_r),
	721	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_2_portb_w),
	722	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_2_portc_r),
	723	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_2_portc_w)
740	724	},
741	725	{
742		DEVCB_HANDLER(pmd85_ppi_3_porta_r),
743		DEVCB_HANDLER(pmd85_ppi_3_porta_w),
744		DEVCB_HANDLER(pmd85_ppi_3_portb_r),
745		DEVCB_HANDLER(pmd85_ppi_3_portb_w),
746		DEVCB_HANDLER(pmd85_ppi_3_portc_r),
747		DEVCB_HANDLER(pmd85_ppi_3_portc_w)
	726	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_3_porta_r),
	727	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_3_porta_w),
	728	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_3_portb_r),
	729	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_3_portb_w),
	730	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_3_portc_r),
	731	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_3_portc_w)
748	732	}
749	733	};
750	734
751	735	const i8255_interface alfa_ppi8255_interface[3] =
752	736	{
753	737	{
754		DEVCB_HANDLER(pmd85_ppi_0_porta_r),
755		DEVCB_HANDLER(pmd85_ppi_0_porta_w),
756		DEVCB_HANDLER(pmd85_ppi_0_portb_r),
757		DEVCB_HANDLER(pmd85_ppi_0_portb_w),
758		DEVCB_HANDLER(pmd85_ppi_0_portc_r),
759		DEVCB_HANDLER(pmd85_ppi_0_portc_w)
	738	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_0_porta_r),
	739	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_0_porta_w),
	740	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_0_portb_r),
	741	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_0_portb_w),
	742	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_0_portc_r),
	743	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_0_portc_w)
760	744	},
761	745	{
762		DEVCB_HANDLER(pmd85_ppi_1_porta_r),
763		DEVCB_HANDLER(pmd85_ppi_1_porta_w),
764		DEVCB_HANDLER(pmd85_ppi_1_portb_r),
765		DEVCB_HANDLER(pmd85_ppi_1_portb_w),
766		DEVCB_HANDLER(pmd85_ppi_1_portc_r),
767		DEVCB_HANDLER(pmd85_ppi_1_portc_w)
	746	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_1_porta_r),
	747	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_1_porta_w),
	748	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_1_portb_r),
	749	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_1_portb_w),
	750	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_1_portc_r),
	751	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_1_portc_w)
768	752	},
769	753	{
770		DEVCB_HANDLER(pmd85_ppi_2_porta_r),
771		DEVCB_HANDLER(pmd85_ppi_2_porta_w),
772		DEVCB_HANDLER(pmd85_ppi_2_portb_r),
773		DEVCB_HANDLER(pmd85_ppi_2_portb_w),
774		DEVCB_HANDLER(pmd85_ppi_2_portc_r),
775		DEVCB_HANDLER(pmd85_ppi_2_portc_w)
	754	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_2_porta_r),
	755	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_2_porta_w),
	756	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_2_portb_r),
	757	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_2_portb_w),
	758	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_2_portc_r),
	759	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_2_portc_w)
776	760	}
777	761	};
778	762
779	763	I8255_INTERFACE( mato_ppi8255_interface )
780	764	{
781		DEVCB_HANDLER(pmd85_ppi_0_porta_r),
782		DEVCB_HANDLER(pmd85_ppi_0_porta_w),
783		DEVCB_HANDLER(mato_ppi_0_portb_r),
784		DEVCB_HANDLER(pmd85_ppi_0_portb_w),
785		DEVCB_HANDLER(mato_ppi_0_portc_r),
786		DEVCB_HANDLER(mato_ppi_0_portc_w)
	765	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_0_porta_r),
	766	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_0_porta_w),
	767	DEVCB_DRIVER_MEMBER(pmd85_state,mato_ppi_0_portb_r),
	768	DEVCB_DRIVER_MEMBER(pmd85_state,pmd85_ppi_0_portb_w),
	769	DEVCB_DRIVER_MEMBER(pmd85_state,mato_ppi_0_portc_r),
	770	DEVCB_DRIVER_MEMBER(pmd85_state,mato_ppi_0_portc_w)
787	771	};
788	772
789	773

trunk/src/mess/machine/nascom1.c

r18257	r18258
39	39	*
40	40	*************************************/
41	41
42		static WRITE_LINE_DEVICE_HANDLER( nascom2_fdc_intrq_w )
	42	WRITE_LINE_MEMBER(nascom1_state::nascom2_fdc_intrq_w)
43	43	{
44		nascom1_state *drvstate = device->machine().driver_data<nascom1_state>();
45		drvstate->m_nascom2_fdc.irq = state;
	44	m_nascom2_fdc.irq = state;
46	45	}
47	46
48		static WRITE_LINE_DEVICE_HANDLER( nascom2_fdc_drq_w )
	47	WRITE_LINE_MEMBER(nascom1_state::nascom2_fdc_drq_w)
49	48	{
50		nascom1_state *drvstate = device->machine().driver_data<nascom1_state>();
51		drvstate->m_nascom2_fdc.drq = state;
	49	m_nascom2_fdc.drq = state;
52	50	}
53	51
54	52	const wd17xx_interface nascom2_wd17xx_interface =
55	53	{
56	54	DEVCB_LINE_VCC,
57		DEVCB_LINE(nascom2_fdc_intrq_w),
58		DEVCB_LINE(nascom2_fdc_drq_w),
	55	DEVCB_DRIVER_LINE_MEMBER(nascom1_state,nascom2_fdc_intrq_w),
	56	DEVCB_DRIVER_LINE_MEMBER(nascom1_state,nascom2_fdc_drq_w),
59	57	{FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3}
60	58	};
61	59
r18257	r18258
170	168	}
171	169
172	170
173		READ8_DEVICE_HANDLER( nascom1_hd6402_si )
	171	READ8_MEMBER(nascom1_state::nascom1_hd6402_si)
174	172	{
175	173	return 1;
176	174	}
177	175
178	176
179		WRITE8_DEVICE_HANDLER( nascom1_hd6402_so )
	177	WRITE8_MEMBER(nascom1_state::nascom1_hd6402_so)
180	178	{
181	179	}
182	180

trunk/src/mess/machine/samcoupe.c

r18257	r18258
158	158	REAL TIME CLOCK
159	159	***************************************************************************/
160	160
161		static READ8_DEVICE_HANDLER( samcoupe_rtc_r )
	161	READ8_MEMBER(samcoupe_state::samcoupe_rtc_r)
162	162	{
163		address_space &spaceio = space.machine().device("maincpu")->memory().space(AS_IO);
164		msm6242_device *rtc = dynamic_cast<msm6242_device*>(device);
	163	address_space &spaceio = machine().device("maincpu")->memory().space(AS_IO);
	164	msm6242_device *rtc = dynamic_cast<msm6242_device*>(machine().device("sambus_clock"));
165	165	return rtc->read(spaceio,offset >> 12);
166	166	}
167	167
168	168
169		static WRITE8_DEVICE_HANDLER( samcoupe_rtc_w )
	169	WRITE8_MEMBER(samcoupe_state::samcoupe_rtc_w)
170	170	{
171		address_space &spaceio = space.machine().device("maincpu")->memory().space(AS_IO);
172		msm6242_device *rtc = dynamic_cast<msm6242_device*>(device);
	171	address_space &spaceio = machine().device("maincpu")->memory().space(AS_IO);
	172	msm6242_device *rtc = dynamic_cast<msm6242_device*>(machine().device("sambus_clock"));
173	173	rtc->write(spaceio,offset >> 12, data);
174	174	}
175	175
r18257	r18258
261	261	if (machine().root_device().ioport("config")->read() & 0x01)
262	262	{
263	263	/* install RTC */
264		device_t *rtc = machine().device("sambus_clock");
265		spaceio.install_legacy_readwrite_handler(*rtc, 0xef, 0xef, 0xffff, 0xff00, FUNC(samcoupe_rtc_r), FUNC(samcoupe_rtc_w));
	264	spaceio.install_readwrite_handler(0xef, 0xef, 0xffff, 0xff00, read8_delegate(FUNC(samcoupe_state::samcoupe_rtc_r),this), write8_delegate(FUNC(samcoupe_state::samcoupe_rtc_w),this));
266	265	}
267	266	else
268	267	{

trunk/src/mess/machine/irisha.c

r18257	r18258
117	117	DEVCB_DRIVER_MEMBER(irisha_state, irisha_8255_portc_w),
118	118	};
119	119
120		static WRITE_LINE_DEVICE_HANDLER( irisha_pic_set_int_line )
	120	WRITE_LINE_MEMBER(irisha_state::irisha_pic_set_int_line)
121	121	{
122		device->machine().device("maincpu")->execute().set_input_line(0, state ? HOLD_LINE : CLEAR_LINE);
	122	machine().device("maincpu")->execute().set_input_line(0, state ? HOLD_LINE : CLEAR_LINE);
123	123	}
124	124
125	125	const struct pic8259_interface irisha_pic8259_config =
126	126	{
127		DEVCB_LINE(irisha_pic_set_int_line),
	127	DEVCB_DRIVER_LINE_MEMBER(irisha_state,irisha_pic_set_int_line),
128	128	DEVCB_LINE_VCC,
129	129	DEVCB_NULL
130	130	};

trunk/src/mess/machine/orion.c

r18257	r18258
27	27
28	28
29	29
30		static READ8_DEVICE_HANDLER (orion_romdisk_porta_r )
	30	READ8_MEMBER(orion_state::orion_romdisk_porta_r)
31	31	{
32		orion_state *state = space.machine().driver_data<orion_state>();
33		UINT8 *romdisk = state->memregion("maincpu")->base() + 0x10000;
34		return romdisk[state->m_romdisk_msb*256+state->m_romdisk_lsb];
	32	UINT8 *romdisk = memregion("maincpu")->base() + 0x10000;
	33	return romdisk[m_romdisk_msb*256+m_romdisk_lsb];
35	34	}
36	35
37		static WRITE8_DEVICE_HANDLER (orion_romdisk_portb_w )
	36	WRITE8_MEMBER(orion_state::orion_romdisk_portb_w)
38	37	{
39		orion_state *state = space.machine().driver_data<orion_state>();
40		state->m_romdisk_lsb = data;
	38	m_romdisk_lsb = data;
41	39	}
42	40
43		static WRITE8_DEVICE_HANDLER (orion_romdisk_portc_w )
	41	WRITE8_MEMBER(orion_state::orion_romdisk_portc_w)
44	42	{
45		orion_state *state = space.machine().driver_data<orion_state>();
46		state->m_romdisk_msb = data;
	43	m_romdisk_msb = data;
47	44	}
48	45
49	46	I8255A_INTERFACE( orion128_ppi8255_interface_1)
50	47	{
51		DEVCB_HANDLER(orion_romdisk_porta_r),
	48	DEVCB_DRIVER_MEMBER(orion_state,orion_romdisk_porta_r),
52	49	DEVCB_NULL,
53	50	DEVCB_NULL,
54		DEVCB_HANDLER(orion_romdisk_portb_w),
	51	DEVCB_DRIVER_MEMBER(orion_state,orion_romdisk_portb_w),
55	52	DEVCB_NULL,
56		DEVCB_HANDLER(orion_romdisk_portc_w)
	53	DEVCB_DRIVER_MEMBER(orion_state,orion_romdisk_portc_w)
57	54	};
58	55
59	56

trunk/src/mess/machine/a7800.c

r18257	r18258
38	38	6532 RIOT
39	39	***************************************************************************/
40	40
41		static READ8_DEVICE_HANDLER( riot_joystick_r )
	41	READ8_MEMBER(a7800_state::riot_joystick_r)
42	42	{
43		return space.machine().root_device().ioport("joysticks")->read();
	43	return machine().root_device().ioport("joysticks")->read();
44	44	}
45	45
46		static READ8_DEVICE_HANDLER( riot_console_button_r )
	46	READ8_MEMBER(a7800_state::riot_console_button_r)
47	47	{
48		return space.machine().root_device().ioport("console_buttons")->read();
	48	return machine().root_device().ioport("console_buttons")->read();
49	49	}
50	50
51		static WRITE8_DEVICE_HANDLER( riot_button_pullup_w )
	51	WRITE8_MEMBER(a7800_state::riot_button_pullup_w)
52	52	{
53		a7800_state *state = space.machine().driver_data<a7800_state>();
54		state->m_p1_one_button = data & 0x04; // pin 6 of the controller port is held high by the riot chip when reading two-button controllers (from schematic)
55		state->m_p2_one_button = data & 0x10;
	53	m_p1_one_button = data & 0x04; // pin 6 of the controller port is held high by the riot chip when reading two-button controllers (from schematic)
	54	m_p2_one_button = data & 0x10;
56	55	}
57	56
58	57	const riot6532_interface a7800_r6532_interface =
59	58	{
60		DEVCB_HANDLER(riot_joystick_r),
61		DEVCB_HANDLER(riot_console_button_r),
	59	DEVCB_DRIVER_MEMBER(a7800_state,riot_joystick_r),
	60	DEVCB_DRIVER_MEMBER(a7800_state,riot_console_button_r),
62	61	DEVCB_NULL,
63		DEVCB_HANDLER(riot_button_pullup_w),
	62	DEVCB_DRIVER_MEMBER(a7800_state,riot_button_pullup_w),
64	63	DEVCB_NULL
65	64	};
66	65

trunk/src/mess/machine/poly88.c

r18257	r18258
218	218	device.execute().set_input_line(0, HOLD_LINE);
219	219	}
220	220
221		static WRITE_LINE_DEVICE_HANDLER( poly88_usart_rxready )
	221	WRITE_LINE_MEMBER(poly88_state::poly88_usart_rxready)
222	222	{
223		//poly88_state *drvstate = device->machine().driver_data<poly88_state>();
224		//drvstate->m_int_vector = 0xe7;
225		//device->execute().set_input_line(0, HOLD_LINE);
	223	//drvm_int_vector = 0xe7;
	224	//execute().set_input_line(0, HOLD_LINE);
226	225	}
227	226
228	227	const i8251_interface poly88_usart_interface=
r18257	r18258
232	231	DEVCB_NULL,
233	232	DEVCB_NULL,
234	233	DEVCB_NULL,
235		DEVCB_LINE(poly88_usart_rxready),
	234	DEVCB_DRIVER_LINE_MEMBER(poly88_state,poly88_usart_rxready),
236	235	DEVCB_NULL,
237	236	DEVCB_NULL,
238	237	DEVCB_NULL

trunk/src/mess/machine/svi318.c

r18257	r18258
34	34
35	35	/* Serial ports */
36	36
37		static WRITE_LINE_DEVICE_HANDLER( svi318_ins8250_interrupt )
	37	WRITE_LINE_MEMBER(svi318_state::svi318_ins8250_interrupt)
38	38	{
39		svi318_state *drvstate = device->machine().driver_data<svi318_state>();
40		if (drvstate->m_svi.bankLow != SVI_CART)
	39	if (m_svi.bankLow != SVI_CART)
41	40	{
42		device->machine().device("maincpu")->execute().set_input_line(0, (state ? HOLD_LINE : CLEAR_LINE));
	41	machine().device("maincpu")->execute().set_input_line(0, (state ? HOLD_LINE : CLEAR_LINE));
43	42	}
44	43	}
45	44	#if 0
r18257	r18258
55	54	DEVCB_NULL,
56	55	DEVCB_NULL,
57	56	DEVCB_NULL,
58		DEVCB_LINE(svi318_ins8250_interrupt),
	57	DEVCB_DRIVER_LINE_MEMBER(svi318_state,svi318_ins8250_interrupt),
59	58	DEVCB_NULL,
60	59	DEVCB_NULL
61	60	},
r18257	r18258
63	62	DEVCB_NULL,
64	63	DEVCB_NULL,
65	64	DEVCB_NULL,
66		DEVCB_LINE(svi318_ins8250_interrupt),
	65	DEVCB_DRIVER_LINE_MEMBER(svi318_state,svi318_ins8250_interrupt),
67	66	DEVCB_NULL,
68	67	DEVCB_NULL
69	68	}
r18257	r18258
144	143	8  CASR     Cassette, Read data
145	144	*/
146	145
147		static READ8_DEVICE_HANDLER ( svi318_ppi_port_a_r )
	146	READ8_MEMBER(svi318_state::svi318_ppi_port_a_r)
148	147	{
149	148	int data = 0x0f;
150	149
151		if ((space.machine().device<cassette_image_device>(CASSETTE_TAG))->input() > 0.0038)
	150	if ((machine().device<cassette_image_device>(CASSETTE_TAG))->input() > 0.0038)
152	151	data |= 0x80;
153		if (!svi318_cassette_present(space.machine(), 0))
	152	if (!svi318_cassette_present(machine(), 0))
154	153	data |= 0x40;
155		data |= space.machine().root_device().ioport("BUTTONS")->read() & 0x30;
	154	data |= machine().root_device().ioport("BUTTONS")->read() & 0x30;
156	155
157	156	return data;
158	157	}
r18257	r18258
170	169	8  IN7  Keyboard, Column status of selected line
171	170	*/
172	171
173		static READ8_DEVICE_HANDLER ( svi318_ppi_port_b_r )
	172	READ8_MEMBER(svi318_state::svi318_ppi_port_b_r)
174	173	{
175		svi318_state *state = space.machine().driver_data<svi318_state>();
176	174	int row;
177	175	static const char *const keynames[] = {
178	176	"LINE0", "LINE1", "LINE2", "LINE3", "LINE4", "LINE5",
179	177	"LINE6", "LINE7", "LINE8", "LINE9", "LINE10"
180	178	};
181	179
182		row = state->m_svi.keyboard_row;
	180	row = m_svi.keyboard_row;
183	181	if (row <= 10)
184		return space.machine().root_device().ioport(keynames[row])->read();
	182	return machine().root_device().ioport(keynames[row])->read();
185	183
186	184	return 0xff;
187	185	}
r18257	r18258
199	197	8  SOUND  Keyboard, Click sound bit (pulse)
200	198	*/
201	199
202		static WRITE8_DEVICE_HANDLER ( svi318_ppi_port_c_w )
	200	WRITE8_MEMBER(svi318_state::svi318_ppi_port_c_w)
203	201	{
204		svi318_state *state = space.machine().driver_data<svi318_state>();
205	202	int val;
206	203
207	204	/* key click */
208	205	val = (data & 0x80) ? 0x3e : 0;
209	206	val += (data & 0x40) ? 0x3e : 0;
210		space.machine().device<dac_device>("dac")->write_signed8(val);
	207	machine().device<dac_device>("dac")->write_signed8(val);
211	208
212	209	/* cassette motor on/off */
213		if (svi318_cassette_present(space.machine(), 0))
	210	if (svi318_cassette_present(machine(), 0))
214	211	{
215	212
216		space.machine().device<cassette_image_device>(CASSETTE_TAG)->change_state(
	213	machine().device<cassette_image_device>(CASSETTE_TAG)->change_state(
217	214	(data & 0x10) ? CASSETTE_MOTOR_DISABLED : CASSETTE_MOTOR_ENABLED,
218	215	CASSETTE_MOTOR_DISABLED);
219	216	}
220	217
221	218	/* cassette signal write */
222		space.machine().device<cassette_image_device>(CASSETTE_TAG)->output((data & 0x20) ? -1.0 : +1.0);
	219	machine().device<cassette_image_device>(CASSETTE_TAG)->output((data & 0x20) ? -1.0 : +1.0);
223	220
224		state->m_svi.keyboard_row = data & 0x0F;
	221	m_svi.keyboard_row = data & 0x0F;
225	222	}
226	223
227	224	I8255_INTERFACE( svi318_ppi8255_interface )
228	225	{
229		DEVCB_HANDLER(svi318_ppi_port_a_r),
	226	DEVCB_DRIVER_MEMBER(svi318_state,svi318_ppi_port_a_r),
230	227	DEVCB_NULL,
231		DEVCB_HANDLER(svi318_ppi_port_b_r),
	228	DEVCB_DRIVER_MEMBER(svi318_state,svi318_ppi_port_b_r),
232	229	DEVCB_NULL,
233	230	DEVCB_NULL,
234		DEVCB_HANDLER(svi318_ppi_port_c_w)
	231	DEVCB_DRIVER_MEMBER(svi318_state,svi318_ppi_port_c_w)
235	232	};
236	233
237	234	WRITE8_MEMBER(svi318_state::svi318_ppi_w)
r18257	r18258
288	285
289	286	/* Disk drives  */
290	287
291		static WRITE_LINE_DEVICE_HANDLER( svi_fdc_intrq_w )
	288	WRITE_LINE_MEMBER(svi318_state::svi_fdc_intrq_w)
292	289	{
293		svi318_state *drvstate = device->machine().driver_data<svi318_state>();
294		drvstate->m_fdc.irq = state;
	290	m_fdc.irq = state;
295	291	}
296	292
297		static WRITE_LINE_DEVICE_HANDLER( svi_fdc_drq_w )
	293	WRITE_LINE_MEMBER(svi318_state::svi_fdc_drq_w)
298	294	{
299		svi318_state *drvstate = device->machine().driver_data<svi318_state>();
300		drvstate->m_fdc.drq = state;
	295	m_fdc.drq = state;
301	296	}
302	297
303	298	const wd17xx_interface svi_wd17xx_interface =
304	299	{
305	300	DEVCB_NULL,
306		DEVCB_LINE(svi_fdc_intrq_w),
307		DEVCB_LINE(svi_fdc_drq_w),
	301	DEVCB_DRIVER_LINE_MEMBER(svi318_state,svi_fdc_intrq_w),
	302	DEVCB_DRIVER_LINE_MEMBER(svi318_state,svi_fdc_drq_w),
308	303	{FLOPPY_0, FLOPPY_1, NULL, NULL}
309	304	};
310	305

trunk/src/mess/machine/trs80.c

r18257	r18258
667	667	trs80_fdc_interrupt_internal(machine());
668	668	}
669	669
670		static WRITE_LINE_DEVICE_HANDLER( trs80_fdc_intrq_w )
	670	WRITE_LINE_MEMBER(trs80_state::trs80_fdc_intrq_w)
671	671	{
672		trs80_state *drvstate = device->machine().driver_data<trs80_state>();
673	672	if (state)
674	673	{
675		trs80_fdc_interrupt_internal(device->machine());
	674	trs80_fdc_interrupt_internal(machine());
676	675	}
677	676	else
678	677	{
679		if (drvstate->m_model4)
680		drvstate->m_nmi_data = 0;
	678	if (m_model4)
	679	m_nmi_data = 0;
681	680	else
682		drvstate->m_irq &= ~IRQ_M1_FDC;
	681	m_irq &= ~IRQ_M1_FDC;
683	682	}
684	683	}
685	684
686	685	const wd17xx_interface trs80_wd17xx_interface =
687	686	{
688	687	DEVCB_NULL,
689		DEVCB_LINE(trs80_fdc_intrq_w),
	688	DEVCB_DRIVER_LINE_MEMBER(trs80_state,trs80_fdc_intrq_w),
690	689	DEVCB_NULL,
691	690	{FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3}
692	691	};

trunk/src/mess/machine/z80ne.c

r18257	r18258
609	609	}
610	610	}
611	611
612		READ8_DEVICE_HANDLER( lx388_mc6847_videoram_r )
	612	READ8_MEMBER(z80ne_state::lx388_mc6847_videoram_r)
613	613	{
614		z80ne_state *state = space.machine().driver_data<z80ne_state>();
615	614	if (offset == ~0) return 0xff;
616	615
617		UINT8 *videoram = state->m_videoram;
	616	UINT8 *videoram = m_videoram;
618	617	int d6 = BIT(videoram[offset], 6);
619	618	int d7 = BIT(videoram[offset], 7);
620	619
621		state->m_vdg->inv_w(d6 && d7);
622		state->m_vdg->as_w(!d6 && d7);
623		state->m_vdg->intext_w(!d6 && d7);
	620	m_vdg->inv_w(d6 && d7);
	621	m_vdg->as_w(!d6 && d7);
	622	m_vdg->intext_w(!d6 && d7);
624	623
625	624	return videoram[offset];
626	625	}
r18257	r18258
648	647	*
649	648	*/
650	649
651		WRITE8_DEVICE_HANDLER(lx390_motor_w)
	650	WRITE8_MEMBER(z80ne_state::lx390_motor_w)
652	651	{
653		z80ne_state *state = space.machine().driver_data<z80ne_state>();
654	652	/* Selection of drive and parameters
655	653	A write also causes the selected drive motor to turn on for about 3 seconds.
656	654	When the motor turns off, the drive is deselected.
r18257	r18258
677	675	if (data & 8)
678	676	drive = 3;
679	677
680		state->m_wd17xx_state.head = (data & 32) ? 1 : 0;
681		state->m_wd17xx_state.drive = data & 0x0F;
	678	m_wd17xx_state.head = (data & 32) ? 1 : 0;
	679	m_wd17xx_state.drive = data & 0x0F;
682	680
683	681	/* no drive selected, turn off all leds */
684		if (!state->m_wd17xx_state.drive)
	682	if (!m_wd17xx_state.drive)
685	683	{
686	684	output_set_value("drv0", 0);
687	685	output_set_value("drv1", 0);
r18257	r18258
690	688	if (drive < 4)
691	689	{
692	690	LOG(("lx390_motor_w, set drive %1d\n", drive));
693		wd17xx_set_drive(device,drive);
694		LOG(("lx390_motor_w, set side %1d\n", state->m_wd17xx_state.head));
695		wd17xx_set_side(device, state->m_wd17xx_state.head);
	691	wd17xx_set_drive(machine().device("wd1771"),drive);
	692	LOG(("lx390_motor_w, set side %1d\n", m_wd17xx_state.head));
	693	wd17xx_set_side(machine().device("wd1771"), m_wd17xx_state.head);
696	694	}
697	695	}
698	696
699		READ8_DEVICE_HANDLER(lx390_reset_bank)
	697	READ8_MEMBER(z80ne_state::lx390_reset_bank)
700	698	{
701		z80ne_state *state = space.machine().driver_data<z80ne_state>();
702	699	offs_t pc;
703	700
704	701	/* if PC is not in range, we are under integrated debugger control, DON'T SWAP */
705		pc = space.machine().device("z80ne")->safe_pc();
	702	pc = machine().device("z80ne")->safe_pc();
706	703	if((pc >= 0xf000) && (pc <=0xffff))
707	704	{
708	705	LOG(("lx390_reset_bank, reset memory bank 1\n"));
709		state->membank("bank1")->set_entry(0); /* RAM at 0x0000 (bank 1) */
	706	membank("bank1")->set_entry(0); /* RAM at 0x0000 (bank 1) */
710	707	}
711	708	else
712	709	{
r18257	r18258
715	712	return 0xff;
716	713	}
717	714
718		READ8_DEVICE_HANDLER(lx390_fdc_r)
	715	READ8_MEMBER(z80ne_state::lx390_fdc_r)
719	716	{
720	717	UINT8 d;
721	718
722	719	switch(offset)
723	720	{
724	721	case 0:
725		d = wd17xx_status_r(device, space, 0) ^ 0xff;
	722	d = wd17xx_status_r(machine().device("wd1771"), space, 0) ^ 0xff;
726	723	LOG(("lx390_fdc_r, WD17xx status: %02x\n", d));
727	724	break;
728	725	case 1:
729		d = wd17xx_track_r(device, space, 0) ^ 0xff;
	726	d = wd17xx_track_r(machine().device("wd1771"), space, 0) ^ 0xff;
730	727	LOG(("lx390_fdc_r, WD17xx track:  %02x\n", d));
731	728	break;
732	729	case 2:
733		d = wd17xx_sector_r(device, space, 0) ^ 0xff;
	730	d = wd17xx_sector_r(machine().device("wd1771"), space, 0) ^ 0xff;
734	731	LOG(("lx390_fdc_r, WD17xx sector: %02x\n", d));
735	732	break;
736	733	case 3:
737		d = wd17xx_data_r(device, space, 0) ^ 0xff;
	734	d = wd17xx_data_r(machine().device("wd1771"), space, 0) ^ 0xff;
738	735	LOG(("lx390_fdc_r, WD17xx data3:  %02x\n", d));
739	736	break;
740	737	case 6:
741	738	d = 0xff;
742		lx390_reset_bank(device, space, 0);
	739	lx390_reset_bank(space, 0);
743	740	break;
744	741	case 7:
745		d = wd17xx_data_r(device, space, 3) ^ 0xff;
	742	d = wd17xx_data_r(machine().device("wd1771"), space, 3) ^ 0xff;
746	743	LOG(("lx390_fdc_r, WD17xx data7, force:  %02x\n", d));
747	744	break;
748	745	default:
r18257	r18258
751	748	return d;
752	749	}
753	750
754		WRITE8_DEVICE_HANDLER(lx390_fdc_w)
	751	WRITE8_MEMBER(z80ne_state::lx390_fdc_w)
755	752	{
756		z80ne_state *state = space.machine().driver_data<z80ne_state>();
757	753	UINT8 d;
758	754
759	755	d = data;
r18257	r18258
761	757	{
762	758	case 0:
763	759	LOG(("lx390_fdc_w, WD17xx command: %02x\n", d));
764		wd17xx_command_w(device, space, offset, d ^ 0xff);
765		if (state->m_wd17xx_state.drive & 1)
	760	wd17xx_command_w(machine().device("wd1771"), space, offset, d ^ 0xff);
	761	if (m_wd17xx_state.drive & 1)
766	762	output_set_value("drv0", 2);
767		else if (state->m_wd17xx_state.drive & 2)
	763	else if (m_wd17xx_state.drive & 2)
768	764	output_set_value("drv1", 2);
769	765	break;
770	766	case 1:
771	767	LOG(("lx390_fdc_w, WD17xx track:   %02x\n", d));
772		wd17xx_track_w(device, space, offset, d ^ 0xff);
	768	wd17xx_track_w(machine().device("wd1771"), space, offset, d ^ 0xff);
773	769	break;
774	770	case 2:
775	771	LOG(("lx390_fdc_w, WD17xx sector:  %02x\n", d));
776		wd17xx_sector_w(device, space, offset, d ^ 0xff);
	772	wd17xx_sector_w(machine().device("wd1771"), space, offset, d ^ 0xff);
777	773	break;
778	774	case 3:
779		wd17xx_data_w(device, space, 0, d ^ 0xff);
	775	wd17xx_data_w(machine().device("wd1771"), space, 0, d ^ 0xff);
780	776	LOG(("lx390_fdc_w, WD17xx data3:   %02x\n", d));
781	777	break;
782	778	case 6:
783	779	LOG(("lx390_fdc_w, motor_w:   %02x\n", d));
784		lx390_motor_w(device, space, 0, d);
	780	lx390_motor_w(space, 0, d);
785	781	break;
786	782	case 7:
787	783	LOG(("lx390_fdc_w, WD17xx data7, force:   %02x\n", d));
788		wd17xx_data_w(device, space, 3, d ^ 0xff);
	784	wd17xx_data_w(machine().device("wd1771"), space, 3, d ^ 0xff);
789	785	break;
790	786	}
791	787	}

trunk/src/mess/machine/kaypro.c

r18257	r18258
13	13
14	14	************************************************************/
15	15
16		static WRITE_LINE_DEVICE_HANDLER( kaypro_interrupt )
	16	WRITE_LINE_MEMBER(kaypro_state::kaypro_interrupt)
17	17	{
18		device->machine().device("maincpu")->execute().set_input_line(0, state);
	18	machine().device("maincpu")->execute().set_input_line(0, state);
19	19	}
20	20
21	21	READ8_MEMBER( kaypro_state::pio_system_r )
r18257	r18258
227	227
228	228	const z80sio_interface kaypro_sio_intf =
229	229	{
230		DEVCB_LINE(kaypro_interrupt),   /* interrupt handler */
	230	DEVCB_DRIVER_LINE_MEMBER(kaypro_state,kaypro_interrupt),   /* interrupt handler */
231	231	DEVCB_NULL,         /* DTR changed handler */
232	232	DEVCB_NULL,         /* RTS changed handler */
233	233	DEVCB_NULL,         /* BREAK changed handler */
r18257	r18258
235	235	DEVCB_NULL         /* receive handler - which channel is this for? */
236	236	};
237	237
238		READ8_DEVICE_HANDLER( kaypro_sio_r )
	238	READ8_MEMBER(kaypro_state::kaypro_sio_r)
239	239	{
240	240	if (!offset)
241		return dynamic_cast<z80sio_device*>(device)->data_read(0);
	241	return dynamic_cast<z80sio_device*>(machine().device("z80sio"))->data_read(0);
242	242	else
243	243	if (offset == 1)
244		//      return z80sio_d_r(device, 1);
245		return kay_kbd_d_r(space.machine());
	244	//      return z80sio_d_r(machine().device("z80sio"), 1);
	245	return kay_kbd_d_r(machine());
246	246	else
247	247	if (offset == 2)
248		return dynamic_cast<z80sio_device*>(device)->control_read(0);
	248	return dynamic_cast<z80sio_device*>(machine().device("z80sio"))->control_read(0);
249	249	else
250		//      return z80sio_c_r(device, 1);
251		return kay_kbd_c_r(space.machine());
	250	//      return z80sio_c_r(machine().device("z80sio"), 1);
	251	return kay_kbd_c_r(machine());
252	252	}
253	253
254		WRITE8_DEVICE_HANDLER( kaypro_sio_w )
	254	WRITE8_MEMBER(kaypro_state::kaypro_sio_w)
255	255	{
256	256	if (!offset)
257		dynamic_cast<z80sio_device*>(device)->data_write(0, data);
	257	dynamic_cast<z80sio_device*>(machine().device("z80sio"))->data_write(0, data);
258	258	else
259	259	if (offset == 1)
260		//      z80sio_d_w(device, 1, data);
261		kay_kbd_d_w(space.machine(), data);
	260	//      z80sio_d_w(machine().device("z80sio"), 1, data);
	261	kay_kbd_d_w(machine(), data);
262	262	else
263	263	if (offset == 2)
264		dynamic_cast<z80sio_device*>(device)->control_write(0, data);
	264	dynamic_cast<z80sio_device*>(machine().device("z80sio"))->control_write(0, data);
265	265	else
266		dynamic_cast<z80sio_device*>(device)->control_write(1, data);
	266	dynamic_cast<z80sio_device*>(machine().device("z80sio"))->control_write(1, data);
267	267	}
268	268
269	269

trunk/src/mess/machine/partner.c

r18257	r18258
26	26	m_tape_value = 0x80;
27	27	}
28	28
29		static WRITE_LINE_DEVICE_HANDLER( partner_wd17xx_drq_w )
	29	WRITE_LINE_MEMBER(partner_state::partner_wd17xx_drq_w)
30	30	{
	31	device_t *device = machine().device("dma8257");
31	32	if (state)
32	33	i8257_drq0_w(device, 1);
33	34	}
r18257	r18258
36	37	{
37	38	DEVCB_LINE_GND,
38	39	DEVCB_NULL,
39		DEVCB_DEVICE_LINE("dma8257", partner_wd17xx_drq_w),
	40	DEVCB_DRIVER_LINE_MEMBER(partner_state,partner_wd17xx_drq_w),
40	41	{FLOPPY_0, FLOPPY_1, NULL, NULL}
41	42	};
42	43
r18257	r18258
357	358	partner_bank_switch(machine());
358	359	}
359	360
360		static WRITE_LINE_DEVICE_HANDLER( hrq_w )
	361	WRITE_LINE_MEMBER(partner_state::hrq_w)
361	362	{
362	363	/* HACK - this should be connected to the BUSREQ line of Z80 */
363		device->machine().device("maincpu")->execute().set_input_line(INPUT_LINE_HALT, state);
	364	machine().device("maincpu")->execute().set_input_line(INPUT_LINE_HALT, state);
364	365
365	366	/* HACK - this should be connected to the BUSACK line of Z80 */
366		i8257_hlda_w(device, state);
	367	i8257_hlda_w(machine().device("dma8257"), state);
367	368	}
368	369
369	370	static UINT8 memory_read_byte(address_space &space, offs_t address, UINT8 mem_mask) { return space.read_byte(address); }
r18257	r18258
371	372
372	373	I8257_INTERFACE( partner_dma )
373	374	{
374		DEVCB_LINE(hrq_w),
	375	DEVCB_DRIVER_LINE_MEMBER(partner_state,hrq_w),
375	376	DEVCB_NULL,
376	377	DEVCB_NULL,
377	378	DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, memory_read_byte),

trunk/src/mess/machine/ac1.c

r18257	r18258
11	11	#include "imagedev/cassette.h"
12	12	#include "includes/ac1.h"
13	13
14		static READ8_DEVICE_HANDLER (ac1_port_b_r)
	14	READ8_MEMBER(ac1_state::ac1_port_b_r)
15	15	{
16		ac1_state *state = space.machine().driver_data<ac1_state>();
17	16	UINT8 data = 0x7f;
18	17
19		if (state->m_cassette->input() > 0.03)
	18	if (m_cassette->input() > 0.03)
20	19	data |= 0x80;
21	20
22	21	return data;
r18257	r18258
24	23
25	24	#define BNOT(x) ((x) ? 0 : 1)
26	25
27		static READ8_DEVICE_HANDLER (ac1_port_a_r)
	26	READ8_MEMBER(ac1_state::ac1_port_a_r)
28	27	{
29		UINT8 line0 = space.machine().root_device().ioport("LINE0")->read();
30		UINT8 line1 = space.machine().root_device().ioport("LINE1")->read();
31		UINT8 line2 = space.machine().root_device().ioport("LINE2")->read();
32		UINT8 line3 = space.machine().root_device().ioport("LINE3")->read();
33		UINT8 line4 = space.machine().root_device().ioport("LINE4")->read();
34		UINT8 line5 = space.machine().root_device().ioport("LINE5")->read();
35		UINT8 line6 = space.machine().root_device().ioport("LINE6")->read();
	28	UINT8 line0 = machine().root_device().ioport("LINE0")->read();
	29	UINT8 line1 = machine().root_device().ioport("LINE1")->read();
	30	UINT8 line2 = machine().root_device().ioport("LINE2")->read();
	31	UINT8 line3 = machine().root_device().ioport("LINE3")->read();
	32	UINT8 line4 = machine().root_device().ioport("LINE4")->read();
	33	UINT8 line5 = machine().root_device().ioport("LINE5")->read();
	34	UINT8 line6 = machine().root_device().ioport("LINE6")->read();
36	35
37	36	UINT8 SH    = BNOT(BIT(line6,0));
38	37	UINT8 CTRL  = BNOT(BIT(line6,1));
r18257	r18258
74	73	return td0 + (td1 << 1) +(td2 << 2) +(td3 << 3) +(td4 << 4) +(td5 << 5) +(td6 << 6) +(tast << 7);
75	74	}
76	75
77		static WRITE8_DEVICE_HANDLER (ac1_port_a_w)
	76	WRITE8_MEMBER(ac1_state::ac1_port_a_w)
78	77	{
79	78	}
80	79
81		static WRITE8_DEVICE_HANDLER (ac1_port_b_w)
	80	WRITE8_MEMBER(ac1_state::ac1_port_b_w)
82	81	{
83	82	/*
84	83
r18257	r18258
94	93	7       cassette in
95	94
96	95	*/
97		ac1_state *state = space.machine().driver_data<ac1_state>();
98		state->m_cassette->output((data & 0x40) ? -1.0 : +1.0);
	96	m_cassette->output((data & 0x40) ? -1.0 : +1.0);
99	97	}
100	98
101	99	Z80PIO_INTERFACE( ac1_z80pio_intf )
102	100	{
103	101	DEVCB_NULL,   /* callback when change interrupt status */
104		DEVCB_HANDLER(ac1_port_a_r),
105		DEVCB_HANDLER(ac1_port_a_w),
	102	DEVCB_DRIVER_MEMBER(ac1_state,ac1_port_a_r),
	103	DEVCB_DRIVER_MEMBER(ac1_state,ac1_port_a_w),
106	104	DEVCB_NULL,
107		DEVCB_HANDLER(ac1_port_b_r),
108		DEVCB_HANDLER(ac1_port_b_w),
	105	DEVCB_DRIVER_MEMBER(ac1_state,ac1_port_b_r),
	106	DEVCB_DRIVER_MEMBER(ac1_state,ac1_port_b_w),
109	107	DEVCB_NULL
110	108	};
111	109

trunk/src/mess/machine/sym1.c

r18257	r18258
31	31	******************************************************************************/
32	32
33	33
34		static WRITE_LINE_DEVICE_HANDLER( sym1_74145_output_0_w )
	34	WRITE_LINE_MEMBER(sym1_state::sym1_74145_output_0_w)
35	35	{
36		sym1_state *drvstate = device->machine().driver_data<sym1_state>();
37		if (state) drvstate->m_led_update->adjust(LED_REFRESH_DELAY);
	36	if (state) m_led_update->adjust(LED_REFRESH_DELAY);
38	37	}
39	38
40	39
41		static WRITE_LINE_DEVICE_HANDLER( sym1_74145_output_1_w )
	40	WRITE_LINE_MEMBER(sym1_state::sym1_74145_output_1_w)
42	41	{
43		sym1_state *drvstate = device->machine().driver_data<sym1_state>();
44		if (state) drvstate->m_led_update->adjust(LED_REFRESH_DELAY, 1);
	42	if (state) m_led_update->adjust(LED_REFRESH_DELAY, 1);
45	43	}
46	44
47	45
48		static WRITE_LINE_DEVICE_HANDLER( sym1_74145_output_2_w )
	46	WRITE_LINE_MEMBER(sym1_state::sym1_74145_output_2_w)
49	47	{
50		sym1_state *drvstate = device->machine().driver_data<sym1_state>();
51		if (state) drvstate->m_led_update->adjust(LED_REFRESH_DELAY, 2);
	48	if (state) m_led_update->adjust(LED_REFRESH_DELAY, 2);
52	49	}
53	50
54	51
55		static WRITE_LINE_DEVICE_HANDLER( sym1_74145_output_3_w )
	52	WRITE_LINE_MEMBER(sym1_state::sym1_74145_output_3_w)
56	53	{
57		sym1_state *drvstate = device->machine().driver_data<sym1_state>();
58		if (state) drvstate->m_led_update->adjust(LED_REFRESH_DELAY, 3);
	54	if (state) m_led_update->adjust(LED_REFRESH_DELAY, 3);
59	55	}
60	56
61	57
62		static WRITE_LINE_DEVICE_HANDLER( sym1_74145_output_4_w )
	58	WRITE_LINE_MEMBER(sym1_state::sym1_74145_output_4_w)
63	59	{
64		sym1_state *drvstate = device->machine().driver_data<sym1_state>();
65		if (state) drvstate->m_led_update->adjust(LED_REFRESH_DELAY, 4);
	60	if (state) m_led_update->adjust(LED_REFRESH_DELAY, 4);
66	61	}
67	62
68	63
69		static WRITE_LINE_DEVICE_HANDLER( sym1_74145_output_5_w )
	64	WRITE_LINE_MEMBER(sym1_state::sym1_74145_output_5_w)
70	65	{
71		sym1_state *drvstate = device->machine().driver_data<sym1_state>();
72		if (state) drvstate->m_led_update->adjust(LED_REFRESH_DELAY, 5);
	66	if (state) m_led_update->adjust(LED_REFRESH_DELAY, 5);
73	67	}
74	68
75	69
r18257	r18258
79	73	}
80	74
81	75
82		static READ8_DEVICE_HANDLER(sym1_riot_a_r)
	76	READ8_MEMBER(sym1_state::sym1_riot_a_r)
83	77	{
84		sym1_state *state = space.machine().driver_data<sym1_state>();
85	78	int data = 0x7f;
86	79
87	80	/* scan keypad rows */
88		if (!(state->m_riot_port_a & 0x80)) data &= space.machine().root_device().ioport("ROW-0")->read();
89		if (!(state->m_riot_port_b & 0x01)) data &= space.machine().root_device().ioport("ROW-1")->read();
90		if (!(state->m_riot_port_b & 0x02)) data &= space.machine().root_device().ioport("ROW-2")->read();
91		if (!(state->m_riot_port_b & 0x04)) data &= space.machine().root_device().ioport("ROW-3")->read();
	81	if (!(m_riot_port_a & 0x80)) data &= machine().root_device().ioport("ROW-0")->read();
	82	if (!(m_riot_port_b & 0x01)) data &= machine().root_device().ioport("ROW-1")->read();
	83	if (!(m_riot_port_b & 0x02)) data &= machine().root_device().ioport("ROW-2")->read();
	84	if (!(m_riot_port_b & 0x04)) data &= machine().root_device().ioport("ROW-3")->read();
92	85
93	86	/* determine column */
94		if ( ((state->m_riot_port_a ^ 0xff) & (state->ioport("ROW-0")->read() ^ 0xff)) & 0x7f )
	87	if ( ((m_riot_port_a ^ 0xff) & (ioport("ROW-0")->read() ^ 0xff)) & 0x7f )
95	88	data &= ~0x80;
96	89
97	90	return data;
98	91	}
99	92
100	93
101		static READ8_DEVICE_HANDLER(sym1_riot_b_r)
	94	READ8_MEMBER(sym1_state::sym1_riot_b_r)
102	95	{
103		sym1_state *state = space.machine().driver_data<sym1_state>();
104	96	int data = 0xff;
105	97
106	98	/* determine column */
107		if ( ((state->m_riot_port_a ^ 0xff) & (space.machine().root_device().ioport("ROW-1")->read() ^ 0xff)) & 0x7f )
	99	if ( ((m_riot_port_a ^ 0xff) & (machine().root_device().ioport("ROW-1")->read() ^ 0xff)) & 0x7f )
108	100	data &= ~0x01;
109	101
110		if ( ((state->m_riot_port_a ^ 0xff) & (space.machine().root_device().ioport("ROW-2")->read() ^ 0xff)) & 0x3f )
	102	if ( ((m_riot_port_a ^ 0xff) & (machine().root_device().ioport("ROW-2")->read() ^ 0xff)) & 0x3f )
111	103	data &= ~0x02;
112	104
113		if ( ((state->m_riot_port_a ^ 0xff) & (state->ioport("ROW-3")->read() ^ 0xff)) & 0x1f )
	105	if ( ((m_riot_port_a ^ 0xff) & (ioport("ROW-3")->read() ^ 0xff)) & 0x1f )
114	106	data &= ~0x04;
115	107
116	108	data &= ~0x80; // else hangs 8b02
r18257	r18258
119	111	}
120	112
121	113
122		static WRITE8_DEVICE_HANDLER(sym1_riot_a_w)
	114	WRITE8_MEMBER(sym1_state::sym1_riot_a_w)
123	115	{
124		sym1_state *state = space.machine().driver_data<sym1_state>();
125		logerror("%x: riot_a_w 0x%02x\n", space.machine().device("maincpu") ->safe_pc( ), data);
	116	logerror("%x: riot_a_w 0x%02x\n", machine().device("maincpu") ->safe_pc( ), data);
126	117
127	118	/* save for later use */
128		state->m_riot_port_a = data;
	119	m_riot_port_a = data;
129	120	}
130	121
131	122
132		static WRITE8_DEVICE_HANDLER(sym1_riot_b_w)
	123	WRITE8_MEMBER(sym1_state::sym1_riot_b_w)
133	124	{
134		sym1_state *state = space.machine().driver_data<sym1_state>();
135		logerror("%x: riot_b_w 0x%02x\n", space.machine().device("maincpu") ->safe_pc( ), data);
	125	logerror("%x: riot_b_w 0x%02x\n", machine().device("maincpu") ->safe_pc( ), data);
136	126
137	127	/* save for later use */
138		state->m_riot_port_b = data;
	128	m_riot_port_b = data;
139	129
140	130	/* first 4 pins are connected to the 74145 */
141		space.machine().device<ttl74145_device>("ttl74145")->write(data & 0x0f);
	131	machine().device<ttl74145_device>("ttl74145")->write(data & 0x0f);
142	132	}
143	133
144	134
145	135	const riot6532_interface sym1_r6532_interface =
146	136	{
147		DEVCB_HANDLER(sym1_riot_a_r),
148		DEVCB_HANDLER(sym1_riot_b_r),
149		DEVCB_HANDLER(sym1_riot_a_w),
150		DEVCB_HANDLER(sym1_riot_b_w)
	137	DEVCB_DRIVER_MEMBER(sym1_state,sym1_riot_a_r),
	138	DEVCB_DRIVER_MEMBER(sym1_state,sym1_riot_b_r),
	139	DEVCB_DRIVER_MEMBER(sym1_state,sym1_riot_a_w),
	140	DEVCB_DRIVER_MEMBER(sym1_state,sym1_riot_b_w)
151	141	};
152	142
153	143
154	144	const ttl74145_interface sym1_ttl74145_intf =
155	145	{
156		DEVCB_LINE(sym1_74145_output_0_w),  /* connected to DS0 */
157		DEVCB_LINE(sym1_74145_output_1_w),  /* connected to DS1 */
158		DEVCB_LINE(sym1_74145_output_2_w),  /* connected to DS2 */
159		DEVCB_LINE(sym1_74145_output_3_w),  /* connected to DS3 */
160		DEVCB_LINE(sym1_74145_output_4_w),  /* connected to DS4 */
161		DEVCB_LINE(sym1_74145_output_5_w),  /* connected to DS5 */
	146	DEVCB_DRIVER_LINE_MEMBER(sym1_state,sym1_74145_output_0_w),  /* connected to DS0 */
	147	DEVCB_DRIVER_LINE_MEMBER(sym1_state,sym1_74145_output_1_w),  /* connected to DS1 */
	148	DEVCB_DRIVER_LINE_MEMBER(sym1_state,sym1_74145_output_2_w),  /* connected to DS2 */
	149	DEVCB_DRIVER_LINE_MEMBER(sym1_state,sym1_74145_output_3_w),  /* connected to DS3 */
	150	DEVCB_DRIVER_LINE_MEMBER(sym1_state,sym1_74145_output_4_w),  /* connected to DS4 */
	151	DEVCB_DRIVER_LINE_MEMBER(sym1_state,sym1_74145_output_5_w),  /* connected to DS5 */
162	152	DEVCB_DEVICE_LINE(SPEAKER_TAG, speaker_level_w),
163	153	DEVCB_NULL,   /* not connected */
164	154	DEVCB_NULL,   /* not connected */
r18257	r18258
177	167	}
178	168
179	169
180		static READ8_DEVICE_HANDLER( sym1_via0_b_r )
	170	READ8_MEMBER(sym1_state::sym1_via0_b_r)
181	171	{
182	172	return 0xff;
183	173	}
184	174
185	175
186		static WRITE8_DEVICE_HANDLER( sym1_via0_b_w )
	176	WRITE8_MEMBER(sym1_state::sym1_via0_b_w)
187	177	{
188		logerror("%s: via0_b_w 0x%02x\n", space.machine().describe_context(), data);
	178	logerror("%s: via0_b_w 0x%02x\n", machine().describe_context(), data);
189	179	}
190	180
191	181
r18257	r18258
194	184	* PA2: Write protect RAM 0x800-0xbff
195	185	* PA3: Write protect RAM 0xc00-0xfff
196	186	*/
197		static WRITE8_DEVICE_HANDLER( sym1_via2_a_w )
	187	WRITE8_MEMBER(sym1_state::sym1_via2_a_w)
198	188	{
199		address_space &cpu0space = space.machine().device( "maincpu")->memory().space( AS_PROGRAM );
	189	address_space &cpu0space = machine().device( "maincpu")->memory().space( AS_PROGRAM );
200	190
201	191	logerror("SYM1 VIA2 W 0x%02x\n", data);
202	192
203		if ((space.machine().root_device().ioport("WP")->read() & 0x01) && !(data & 0x01)) {
	193	if ((machine().root_device().ioport("WP")->read() & 0x01) && !(data & 0x01)) {
204	194	cpu0space.nop_write(0xa600, 0xa67f);
205	195	} else {
206	196	cpu0space.install_write_bank(0xa600, 0xa67f, "bank5");
207	197	}
208		if ((space.machine().root_device().ioport("WP")->read() & 0x02) && !(data & 0x02)) {
	198	if ((machine().root_device().ioport("WP")->read() & 0x02) && !(data & 0x02)) {
209	199	cpu0space.nop_write(0x0400, 0x07ff);
210	200	} else {
211	201	cpu0space.install_write_bank(0x0400, 0x07ff, "bank2");
212	202	}
213		if ((space.machine().root_device().ioport("WP")->read() & 0x04) && !(data & 0x04)) {
	203	if ((machine().root_device().ioport("WP")->read() & 0x04) && !(data & 0x04)) {
214	204	cpu0space.nop_write(0x0800, 0x0bff);
215	205	} else {
216	206	cpu0space.install_write_bank(0x0800, 0x0bff, "bank3");
217	207	}
218		if ((space.machine().root_device().ioport("WP")->read() & 0x08) && !(data & 0x08)) {
	208	if ((machine().root_device().ioport("WP")->read() & 0x08) && !(data & 0x08)) {
219	209	cpu0space.nop_write(0x0c00, 0x0fff);
220	210	} else {
221	211	cpu0space.install_write_bank(0x0c00, 0x0fff, "bank4");
r18257	r18258
226	216	const via6522_interface sym1_via0 =
227	217	{
228	218	DEVCB_NULL,           /* VIA Port A Input */
229		DEVCB_HANDLER(sym1_via0_b_r),  /* VIA Port B Input */
	219	DEVCB_DRIVER_MEMBER(sym1_state,sym1_via0_b_r),  /* VIA Port B Input */
230	220	DEVCB_NULL,           /* VIA Port CA1 Input */
231	221	DEVCB_NULL,           /* VIA Port CB1 Input */
232	222	DEVCB_NULL,           /* VIA Port CA2 Input */
233	223	DEVCB_NULL,           /* VIA Port CB2 Input */
234	224	DEVCB_NULL,           /* VIA Port A Output */
235		DEVCB_HANDLER(sym1_via0_b_w),  /* VIA Port B Output */
	225	DEVCB_DRIVER_MEMBER(sym1_state,sym1_via0_b_w),  /* VIA Port B Output */
236	226	DEVCB_NULL,           /* VIA Port CA1 Output */
237	227	DEVCB_NULL,           /* VIA Port CB1 Output */
238	228	DEVCB_NULL,           /* VIA Port CA2 Output */
r18257	r18258
267	257	DEVCB_NULL,           /* VIA Port CB1 Input */
268	258	DEVCB_NULL,           /* VIA Port CA2 Input */
269	259	DEVCB_NULL,           /* VIA Port CB2 Input */
270		DEVCB_HANDLER(sym1_via2_a_w),  /* VIA Port A Output */
	260	DEVCB_DRIVER_MEMBER(sym1_state,sym1_via2_a_w),  /* VIA Port A Output */
271	261	DEVCB_NULL,           /* VIA Port B Output */
272	262	DEVCB_NULL,           /* VIA Port CA1 Output */
273	263	DEVCB_NULL,           /* VIA Port CB1 Output */

trunk/src/mess/machine/bebox.c

r18257	r18258
521	521	*
522	522	*************************************************************/
523	523
524		static WRITE_LINE_DEVICE_HANDLER( bebox_pic8259_master_set_int_line )
	524	WRITE_LINE_MEMBER(bebox_state::bebox_pic8259_master_set_int_line)
525	525	{
526		bebox_set_irq_bit(device->machine(), 5, state);
	526	bebox_set_irq_bit(machine(), 5, state);
527	527	}
528	528
529		static WRITE_LINE_DEVICE_HANDLER( bebox_pic8259_slave_set_int_line )
	529	WRITE_LINE_MEMBER(bebox_state::bebox_pic8259_slave_set_int_line)
530	530	{
531		bebox_state *drvstate = device->machine().driver_data<bebox_state>();
532		if (drvstate->m_devices.pic8259_master)
533		pic8259_ir2_w(drvstate->m_devices.pic8259_master, state);
	531	if (m_devices.pic8259_master)
	532	pic8259_ir2_w(m_devices.pic8259_master, state);
534	533	}
535	534
536		static READ8_DEVICE_HANDLER( get_slave_ack )
	535	READ8_MEMBER(bebox_state::get_slave_ack)
537	536	{
538		bebox_state *state = space.machine().driver_data<bebox_state>();
539	537	if (offset==2) { // IRQ = 2
540		return pic8259_acknowledge(state->m_devices.pic8259_slave);
	538	return pic8259_acknowledge(m_devices.pic8259_slave);
541	539	}
542	540	return 0x00;
543	541	}
544	542
545	543	const struct pic8259_interface bebox_pic8259_master_config =
546	544	{
547		DEVCB_LINE(bebox_pic8259_master_set_int_line),
	545	DEVCB_DRIVER_LINE_MEMBER(bebox_state,bebox_pic8259_master_set_int_line),
548	546	DEVCB_LINE_VCC,
549		DEVCB_HANDLER(get_slave_ack)
	547	DEVCB_DRIVER_MEMBER(bebox_state,get_slave_ack)
550	548	};
551	549
552	550	const struct pic8259_interface bebox_pic8259_slave_config =
553	551	{
554		DEVCB_LINE(bebox_pic8259_slave_set_int_line),
	552	DEVCB_DRIVER_LINE_MEMBER(bebox_state,bebox_pic8259_slave_set_int_line),
555	553	DEVCB_LINE_GND,
556	554	DEVCB_NULL
557	555	};
r18257	r18258
753	751	}
754	752
755	753
756		static WRITE_LINE_DEVICE_HANDLER( bebox_dma_hrq_changed )
	754	WRITE_LINE_MEMBER(bebox_state::bebox_dma_hrq_changed)
757	755	{
758		device->machine().device("ppc1")->execute().set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE);
	756	machine().device("ppc1")->execute().set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE);
759	757
760	758	/* Assert HLDA */
761		i8237_hlda_w( device, state );
	759	i8237_hlda_w( machine().device("dma8237_1"), state );
762	760	}
763	761
764	762
r18257	r18258
780	778	}
781	779
782	780
783		static READ8_DEVICE_HANDLER( bebox_dma8237_fdc_dack_r ) {
784		return pc_fdc_dack_r(space.machine(),space);
	781	READ8_MEMBER(bebox_state::bebox_dma8237_fdc_dack_r){
	782	return pc_fdc_dack_r(machine(),space);
785	783	}
786	784
787	785
788		static WRITE8_DEVICE_HANDLER( bebox_dma8237_fdc_dack_w ) {
789		pc_fdc_dack_w( space.machine(), space, data );
	786	WRITE8_MEMBER(bebox_state::bebox_dma8237_fdc_dack_w){
	787	pc_fdc_dack_w( machine(), space, data );
790	788	}
791	789
792	790
793		static WRITE_LINE_DEVICE_HANDLER( bebox_dma8237_out_eop ) {
794		pc_fdc_set_tc_state( device->machine(), state );
	791	WRITE_LINE_MEMBER(bebox_state::bebox_dma8237_out_eop){
	792	pc_fdc_set_tc_state( machine(), state );
795	793	}
796	794
797		static void set_dma_channel(device_t *device, int channel, int state)
	795	static void set_dma_channel(running_machine &machine, int channel, int state)
798	796	{
799		bebox_state *drvstate = device->machine().driver_data<bebox_state>();
	797	bebox_state *drvstate = machine.driver_data<bebox_state>();
800	798	if (!state) drvstate->m_dma_channel = channel;
801	799	}
802	800
803		static WRITE_LINE_DEVICE_HANDLER( pc_dack0_w ) { set_dma_channel(device, 0, state); }
804		static WRITE_LINE_DEVICE_HANDLER( pc_dack1_w ) { set_dma_channel(device, 1, state); }
805		static WRITE_LINE_DEVICE_HANDLER( pc_dack2_w ) { set_dma_channel(device, 2, state); }
806		static WRITE_LINE_DEVICE_HANDLER( pc_dack3_w ) { set_dma_channel(device, 3, state); }
	801	WRITE_LINE_MEMBER(bebox_state::pc_dack0_w){ set_dma_channel(machine(), 0, state); }
	802	WRITE_LINE_MEMBER(bebox_state::pc_dack1_w){ set_dma_channel(machine(), 1, state); }
	803	WRITE_LINE_MEMBER(bebox_state::pc_dack2_w){ set_dma_channel(machine(), 2, state); }
	804	WRITE_LINE_MEMBER(bebox_state::pc_dack3_w){ set_dma_channel(machine(), 3, state); }
807	805
808	806
809	807	I8237_INTERFACE( bebox_dma8237_1_config )
810	808	{
811		DEVCB_LINE(bebox_dma_hrq_changed),
812		DEVCB_LINE(bebox_dma8237_out_eop),
	809	DEVCB_DRIVER_LINE_MEMBER(bebox_state,bebox_dma_hrq_changed),
	810	DEVCB_DRIVER_LINE_MEMBER(bebox_state,bebox_dma8237_out_eop),
813	811	DEVCB_MEMORY_HANDLER("ppc1", PROGRAM, bebox_dma_read_byte),
814	812	DEVCB_MEMORY_HANDLER("ppc1", PROGRAM, bebox_dma_write_byte),
815		{ DEVCB_NULL, DEVCB_NULL, DEVCB_HANDLER(bebox_dma8237_fdc_dack_r), DEVCB_NULL },
816		{ DEVCB_NULL, DEVCB_NULL, DEVCB_HANDLER(bebox_dma8237_fdc_dack_w), DEVCB_NULL },
817		{ DEVCB_LINE(pc_dack0_w), DEVCB_LINE(pc_dack1_w), DEVCB_LINE(pc_dack2_w), DEVCB_LINE(pc_dack3_w) }
	813	{ DEVCB_NULL, DEVCB_NULL, DEVCB_DRIVER_MEMBER(bebox_state,bebox_dma8237_fdc_dack_r), DEVCB_NULL },
	814	{ DEVCB_NULL, DEVCB_NULL, DEVCB_DRIVER_MEMBER(bebox_state,bebox_dma8237_fdc_dack_w), DEVCB_NULL },
	815	{ DEVCB_DRIVER_LINE_MEMBER(bebox_state,pc_dack0_w), DEVCB_DRIVER_LINE_MEMBER(bebox_state,pc_dack1_w), DEVCB_DRIVER_LINE_MEMBER(bebox_state,pc_dack2_w), DEVCB_DRIVER_LINE_MEMBER(bebox_state,pc_dack3_w) }
818	816	};
819	817
820	818
r18257	r18258
836	834	*
837	835	*************************************/
838	836
839		static WRITE_LINE_DEVICE_HANDLER( bebox_timer0_w )
	837	WRITE_LINE_MEMBER(bebox_state::bebox_timer0_w)
840	838	{
841		bebox_state *drvstate = device->machine().driver_data<bebox_state>();
842		if (drvstate->m_devices.pic8259_master)
843		pic8259_ir0_w(drvstate->m_devices.pic8259_master, state);
	839	if (m_devices.pic8259_master)
	840	pic8259_ir0_w(m_devices.pic8259_master, state);
844	841	}
845	842
846	843
r18257	r18258
850	847	{
851	848	4772720/4,            /* heartbeat IRQ */
852	849	DEVCB_NULL,
853		DEVCB_LINE(bebox_timer0_w)
	850	DEVCB_DRIVER_LINE_MEMBER(bebox_state,bebox_timer0_w)
854	851	},
855	852	{
856	853	4772720/4,            /* dram refresh */

trunk/src/mess/machine/pecom.c

r18257	r18258
111	111
112	112	/* CDP1802 Interface */
113	113
114		static READ_LINE_DEVICE_HANDLER( clear_r )
	114	READ_LINE_MEMBER(pecom_state::clear_r)
115	115	{
116		pecom_state *state = device->machine().driver_data<pecom_state>();
117
118		return state->m_reset;
	116	return m_reset;
119	117	}
120	118
121		static READ_LINE_DEVICE_HANDLER( ef2_r )
	119	READ_LINE_MEMBER(pecom_state::ef2_r)
122	120	{
123		int shift = BIT(device->machine().root_device().ioport("CNT")->read(), 1);
	121	device_t *device = machine().device(CASSETTE_TAG);
	122	int shift = BIT(machine().root_device().ioport("CNT")->read(), 1);
124	123	double cas = dynamic_cast<cassette_image_device *>(device)->input();
125	124
126	125	return (cas > 0.0) | shift;
r18257	r18258
148	147	return flags;
149	148	}
150	149	*/
151		static WRITE_LINE_DEVICE_HANDLER( pecom64_q_w )
	150	WRITE_LINE_MEMBER(pecom_state::pecom64_q_w)
152	151	{
	152	device_t *device = machine().device(CASSETTE_TAG);
153	153	dynamic_cast<cassette_image_device *>(device)->output(state ? -1.0 : +1.0);
154	154	}
155	155
r18257	r18258
176	176	COSMAC_INTERFACE( pecom64_cdp1802_config )
177	177	{
178	178	DEVCB_LINE_VCC,
179		DEVCB_LINE(clear_r),
	179	DEVCB_DRIVER_LINE_MEMBER(pecom_state,clear_r),
180	180	DEVCB_NULL,
181		DEVCB_DEVICE_LINE(CASSETTE_TAG, ef2_r),
	181	DEVCB_DRIVER_LINE_MEMBER(pecom_state,ef2_r),
182	182	DEVCB_NULL,
183	183	DEVCB_NULL,
184		DEVCB_DEVICE_LINE(CASSETTE_TAG, pecom64_q_w),
	184	DEVCB_DRIVER_LINE_MEMBER(pecom_state,pecom64_q_w),
185	185	DEVCB_NULL,
186	186	DEVCB_NULL,
187	187	pecom64_sc_w,

trunk/src/mess/machine/macpci.c

r18257	r18258
26	26
27	27	/* VIA1 Handlers */
28	28
29		static DECLARE_READ8_DEVICE_HANDLER(mac_via_in_a);
30		static DECLARE_READ8_DEVICE_HANDLER(mac_via_in_b);
31		static DECLARE_READ8_DEVICE_HANDLER(mac_adb_via_in_cb2);
32		static DECLARE_WRITE8_DEVICE_HANDLER(mac_via_out_a);
33		static DECLARE_WRITE8_DEVICE_HANDLER(mac_via_out_b);
34		static DECLARE_WRITE8_DEVICE_HANDLER(mac_adb_via_out_cb2);
35	29	static void mac_via_irq(device_t *device, int state);
36	30
37	31	const via6522_interface pcimac_via6522_intf =
38	32	{
39		DEVCB_HANDLER(mac_via_in_a), DEVCB_HANDLER(mac_via_in_b),
	33	DEVCB_DRIVER_MEMBER(macpci_state,mac_via_in_a), DEVCB_DRIVER_MEMBER(macpci_state,mac_via_in_b),
40	34	DEVCB_NULL, DEVCB_NULL,
41		DEVCB_NULL, DEVCB_HANDLER(mac_adb_via_in_cb2),
42		DEVCB_HANDLER(mac_via_out_a), DEVCB_HANDLER(mac_via_out_b),
	35	DEVCB_NULL, DEVCB_DRIVER_MEMBER(macpci_state,mac_adb_via_in_cb2),
	36	DEVCB_DRIVER_MEMBER(macpci_state,mac_via_out_a), DEVCB_DRIVER_MEMBER(macpci_state,mac_via_out_b),
43	37	DEVCB_NULL, DEVCB_NULL,
44		DEVCB_NULL, DEVCB_HANDLER(mac_adb_via_out_cb2),
	38	DEVCB_NULL, DEVCB_DRIVER_MEMBER(macpci_state,mac_adb_via_out_cb2),
45	39	DEVCB_LINE(mac_via_irq)
46	40	};
47	41
r18257	r18258
49	43	{
50	44	}
51	45
52		static READ8_DEVICE_HANDLER(mac_via_in_a)
	46	READ8_MEMBER(macpci_state::mac_via_in_a)
53	47	{
54		//  macpci_state *mac = space.machine().driver_data<macpci_state>();
55
56	48	//    printf("VIA1 IN_A (PC %x)\n", mac->m_maincpu->pc());
57	49
58	50	return 0x80;
59	51	}
60	52
61		static READ8_DEVICE_HANDLER(mac_via_in_b)
	53	READ8_MEMBER(macpci_state::mac_via_in_b)
62	54	{
63	55	int val = 0;
64		macpci_state *mac = space.machine().driver_data<macpci_state>();
	56	val |= m_cuda->get_treq()<<3;
65	57
66		val |= mac->m_cuda->get_treq()<<3;
	58	//    printf("VIA1 IN B = %02x (PC %x)\n", val, m_maincpu->pc());
67	59
68		//    printf("VIA1 IN B = %02x (PC %x)\n", val, mac->m_maincpu->pc());
69
70	60	return val;
71	61	}
72	62
73		static WRITE8_DEVICE_HANDLER(mac_via_out_a)
	63	WRITE8_MEMBER(macpci_state::mac_via_out_a)
74	64	{
75		//  macpci_state *mac = space.machine().driver_data<macpci_state>();
76
77		//    printf("VIA1 OUT A: %02x (PC %x)\n", data, mac->m_maincpu->pc());
	65	//    printf("VIA1 OUT A: %02x (PC %x)\n", data, m_maincpu->pc());
78	66	}
79	67
80		static WRITE8_DEVICE_HANDLER(mac_via_out_b)
	68	WRITE8_MEMBER(macpci_state::mac_via_out_b)
81	69	{
82		macpci_state *mac = space.machine().driver_data<macpci_state>();
	70	//    printf("VIA1 OUT B: %02x (PC %x)\n", data, m_maincpu->pc());
83	71
84		//    printf("VIA1 OUT B: %02x (PC %x)\n", data, mac->m_maincpu->pc());
85
86	72	#if LOG_ADB
87		printf("PPC: New Cuda state: TIP %d BYTEACK %d (PC %x)\n", (data>>5)&1, (data>>4)&1, mac->m_maincpu->pc());
	73	printf("PPC: New Cuda state: TIP %d BYTEACK %d (PC %x)\n", (data>>5)&1, (data>>4)&1, m_maincpu->pc());
88	74	#endif
89		mac->m_cuda->set_byteack((data&0x10) ? 1 : 0);
90		mac->m_cuda->set_tip((data&0x20) ? 1 : 0);
	75	m_cuda->set_byteack((data&0x10) ? 1 : 0);
	76	m_cuda->set_tip((data&0x20) ? 1 : 0);
91	77	}
92	78
93	79	READ16_MEMBER ( macpci_state::mac_via_r )
r18257	r18258
122	108	m_maincpu->adjust_icount(m_via_cycles);
123	109	}
124	110
125		static READ8_DEVICE_HANDLER(mac_adb_via_in_cb2)
	111	READ8_MEMBER(macpci_state::mac_adb_via_in_cb2)
126	112	{
127	113	UINT8 ret;
128		macpci_state *mac = space.machine().driver_data<macpci_state>();
129
130		ret = mac->m_cuda->get_via_data();
	114	ret = m_cuda->get_via_data();
131	115	#if LOG_ADB
132	116	printf("PPC: Read VIA_DATA %x\n", ret);
133	117	#endif
r18257	r18258
135	119	return ret;
136	120	}
137	121
138		static WRITE8_DEVICE_HANDLER(mac_adb_via_out_cb2)
	122	WRITE8_MEMBER(macpci_state::mac_adb_via_out_cb2)
139	123	{
140		macpci_state *mac = space.machine().driver_data<macpci_state>();
141
142		mac->m_cuda->set_via_data(data & 1);
	124	m_cuda->set_via_data(data & 1);
143	125	}
144	126
145	127	void macpci_state::machine_start()

trunk/src/mess/machine/radio86.c

r18257	r18258
41	41	m_radio_ram_disk = auto_alloc_array(machine(), UINT8, 0x20000);
42	42	memset(m_radio_ram_disk,0,0x20000);
43	43	}
44		static READ8_DEVICE_HANDLER (radio86_8255_portb_r2 )
	44	READ8_MEMBER(radio86_state::radio86_8255_portb_r2)
45	45	{
46		radio86_state *state = space.machine().driver_data<radio86_state>();
47	46	UINT8 key = 0xff;
48		if ((state->m_keyboard_mask & 0x01)!=0) { key &= state->ioport("LINE0")->read(); }
49		if ((state->m_keyboard_mask & 0x02)!=0) { key &= space.machine().root_device().ioport("LINE1")->read(); }
50		if ((state->m_keyboard_mask & 0x04)!=0) { key &= space.machine().root_device().ioport("LINE2")->read(); }
51		if ((state->m_keyboard_mask & 0x08)!=0) { key &= space.machine().root_device().ioport("LINE3")->read(); }
52		if ((state->m_keyboard_mask & 0x10)!=0) { key &= space.machine().root_device().ioport("LINE4")->read(); }
53		if ((state->m_keyboard_mask & 0x20)!=0) { key &= space.machine().root_device().ioport("LINE5")->read(); }
54		if ((state->m_keyboard_mask & 0x40)!=0) { key &= space.machine().root_device().ioport("LINE6")->read(); }
55		if ((state->m_keyboard_mask & 0x80)!=0) { key &= space.machine().root_device().ioport("LINE7")->read(); }
	47	if ((m_keyboard_mask & 0x01)!=0) { key &= ioport("LINE0")->read(); }
	48	if ((m_keyboard_mask & 0x02)!=0) { key &= machine().root_device().ioport("LINE1")->read(); }
	49	if ((m_keyboard_mask & 0x04)!=0) { key &= machine().root_device().ioport("LINE2")->read(); }
	50	if ((m_keyboard_mask & 0x08)!=0) { key &= machine().root_device().ioport("LINE3")->read(); }
	51	if ((m_keyboard_mask & 0x10)!=0) { key &= machine().root_device().ioport("LINE4")->read(); }
	52	if ((m_keyboard_mask & 0x20)!=0) { key &= machine().root_device().ioport("LINE5")->read(); }
	53	if ((m_keyboard_mask & 0x40)!=0) { key &= machine().root_device().ioport("LINE6")->read(); }
	54	if ((m_keyboard_mask & 0x80)!=0) { key &= machine().root_device().ioport("LINE7")->read(); }
56	55	return key;
57	56	}
58	57
59		static READ8_DEVICE_HANDLER (radio86_8255_portc_r2 )
	58	READ8_MEMBER(radio86_state::radio86_8255_portc_r2)
60	59	{
61		radio86_state *state = space.machine().driver_data<radio86_state>();
62		double level = (space.machine().device<cassette_image_device>(CASSETTE_TAG)->input());
63		UINT8 dat = state->ioport("LINE8")->read();
	60	double level = (machine().device<cassette_image_device>(CASSETTE_TAG)->input());
	61	UINT8 dat = ioport("LINE8")->read();
64	62	if (level <  0) {
65		dat ^= state->m_tape_value;
	63	dat ^= m_tape_value;
66	64	}
67	65	return dat;
68	66	}
69	67
70		static WRITE8_DEVICE_HANDLER (radio86_8255_porta_w2 )
	68	WRITE8_MEMBER(radio86_state::radio86_8255_porta_w2)
71	69	{
72		radio86_state *state = space.machine().driver_data<radio86_state>();
73		state->m_keyboard_mask = data ^ 0xff;
	70	m_keyboard_mask = data ^ 0xff;
74	71	}
75	72
76		static WRITE8_DEVICE_HANDLER (radio86_8255_portc_w2 )
	73	WRITE8_MEMBER(radio86_state::radio86_8255_portc_w2)
77	74	{
78		space.machine().device<cassette_image_device>(CASSETTE_TAG)->output(data & 0x01 ? 1 : -1);
	75	machine().device<cassette_image_device>(CASSETTE_TAG)->output(data & 0x01 ? 1 : -1);
79	76	}
80	77
81	78
82	79	I8255A_INTERFACE( radio86_ppi8255_interface_1 )
83	80	{
84	81	DEVCB_NULL,
85		DEVCB_HANDLER(radio86_8255_porta_w2),
86		DEVCB_HANDLER(radio86_8255_portb_r2),
	82	DEVCB_DRIVER_MEMBER(radio86_state,radio86_8255_porta_w2),
	83	DEVCB_DRIVER_MEMBER(radio86_state,radio86_8255_portb_r2),
87	84	DEVCB_NULL,
88		DEVCB_HANDLER(radio86_8255_portc_r2),
89		DEVCB_HANDLER(radio86_8255_portc_w2),
	85	DEVCB_DRIVER_MEMBER(radio86_state,radio86_8255_portc_r2),
	86	DEVCB_DRIVER_MEMBER(radio86_state,radio86_8255_portc_w2),
90	87	};
91	88
92	89	I8255A_INTERFACE( mikrosha_ppi8255_interface_1 )
93	90	{
94		DEVCB_HANDLER(radio86_8255_portb_r2),
	91	DEVCB_DRIVER_MEMBER(radio86_state,radio86_8255_portb_r2),
95	92	DEVCB_NULL,
96	93	DEVCB_NULL,
97		DEVCB_HANDLER(radio86_8255_porta_w2),
98		DEVCB_HANDLER(radio86_8255_portc_r2),
99		DEVCB_HANDLER(radio86_8255_portc_w2),
	94	DEVCB_DRIVER_MEMBER(radio86_state,radio86_8255_porta_w2),
	95	DEVCB_DRIVER_MEMBER(radio86_state,radio86_8255_portc_r2),
	96	DEVCB_DRIVER_MEMBER(radio86_state,radio86_8255_portc_w2),
100	97	};
101	98
102	99
103	100
104		static READ8_DEVICE_HANDLER (rk7007_8255_portc_r )
	101	READ8_MEMBER(radio86_state::rk7007_8255_portc_r)
105	102	{
106		radio86_state *state = space.machine().driver_data<radio86_state>();
107		double level = (space.machine().device<cassette_image_device>(CASSETTE_TAG)->input());
	103	double level = (machine().device<cassette_image_device>(CASSETTE_TAG)->input());
108	104	UINT8 key = 0xff;
109		if ((state->m_keyboard_mask & 0x01)!=0) { key &= state->ioport("CLINE0")->read(); }
110		if ((state->m_keyboard_mask & 0x02)!=0) { key &= space.machine().root_device().ioport("CLINE1")->read(); }
111		if ((state->m_keyboard_mask & 0x04)!=0) { key &= space.machine().root_device().ioport("CLINE2")->read(); }
112		if ((state->m_keyboard_mask & 0x08)!=0) { key &= space.machine().root_device().ioport("CLINE3")->read(); }
113		if ((state->m_keyboard_mask & 0x10)!=0) { key &= space.machine().root_device().ioport("CLINE4")->read(); }
114		if ((state->m_keyboard_mask & 0x20)!=0) { key &= space.machine().root_device().ioport("CLINE5")->read(); }
115		if ((state->m_keyboard_mask & 0x40)!=0) { key &= space.machine().root_device().ioport("CLINE6")->read(); }
116		if ((state->m_keyboard_mask & 0x80)!=0) { key &= space.machine().root_device().ioport("CLINE7")->read(); }
	105	if ((m_keyboard_mask & 0x01)!=0) { key &= ioport("CLINE0")->read(); }
	106	if ((m_keyboard_mask & 0x02)!=0) { key &= machine().root_device().ioport("CLINE1")->read(); }
	107	if ((m_keyboard_mask & 0x04)!=0) { key &= machine().root_device().ioport("CLINE2")->read(); }
	108	if ((m_keyboard_mask & 0x08)!=0) { key &= machine().root_device().ioport("CLINE3")->read(); }
	109	if ((m_keyboard_mask & 0x10)!=0) { key &= machine().root_device().ioport("CLINE4")->read(); }
	110	if ((m_keyboard_mask & 0x20)!=0) { key &= machine().root_device().ioport("CLINE5")->read(); }
	111	if ((m_keyboard_mask & 0x40)!=0) { key &= machine().root_device().ioport("CLINE6")->read(); }
	112	if ((m_keyboard_mask & 0x80)!=0) { key &= machine().root_device().ioport("CLINE7")->read(); }
117	113	key &= 0xe0;
118	114	if (level <  0) {
119		key ^= state->m_tape_value;
	115	key ^= m_tape_value;
120	116	}
121	117	return key;
122	118	}
r18257	r18258
124	120	I8255A_INTERFACE( rk7007_ppi8255_interface )
125	121	{
126	122	DEVCB_NULL,
127		DEVCB_HANDLER(radio86_8255_porta_w2),
128		DEVCB_HANDLER(radio86_8255_portb_r2),
	123	DEVCB_DRIVER_MEMBER(radio86_state,radio86_8255_porta_w2),
	124	DEVCB_DRIVER_MEMBER(radio86_state,radio86_8255_portb_r2),
129	125	DEVCB_NULL,
130		DEVCB_HANDLER(rk7007_8255_portc_r),
131		DEVCB_HANDLER(radio86_8255_portc_w2),
	126	DEVCB_DRIVER_MEMBER(radio86_state,rk7007_8255_portc_r),
	127	DEVCB_DRIVER_MEMBER(radio86_state,radio86_8255_portc_w2),
132	128	};
133	129
134		static WRITE_LINE_DEVICE_HANDLER( hrq_w )
	130	WRITE_LINE_MEMBER(radio86_state::hrq_w)
135	131	{
136	132	/* HACK - this should be connected to the BUSREQ line of Z80 */
137		device->machine().device("maincpu")->execute().set_input_line(INPUT_LINE_HALT, state);
	133	machine().device("maincpu")->execute().set_input_line(INPUT_LINE_HALT, state);
138	134
139	135	/* HACK - this should be connected to the BUSACK line of Z80 */
140		i8257_hlda_w(device, state);
	136	i8257_hlda_w(machine().device("dma8257"), state);
141	137	}
142	138
143	139	static UINT8 memory_read_byte(address_space &space, offs_t address, UINT8 mem_mask) { return space.read_byte(address); }
r18257	r18258
145	141
146	142	I8257_INTERFACE( radio86_dma )
147	143	{
148		DEVCB_LINE(hrq_w),
	144	DEVCB_DRIVER_LINE_MEMBER(radio86_state,hrq_w),
149	145	DEVCB_NULL,
150	146	DEVCB_NULL,
151	147	DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, memory_read_byte),
r18257	r18258
190	186	m_disk_sel = data;
191	187	}
192	188
193		static READ8_DEVICE_HANDLER (radio86_romdisk_porta_r )
	189	READ8_MEMBER(radio86_state::radio86_romdisk_porta_r)
194	190	{
195		radio86_state *state = space.machine().driver_data<radio86_state>();
196		UINT8 *romdisk = state->memregion("maincpu")->base() + 0x10000;
197		if ((state->m_disk_sel & 0x0f) ==0) {
198		return romdisk[state->m_romdisk_msb*256+state->m_romdisk_lsb];
	191	UINT8 *romdisk = memregion("maincpu")->base() + 0x10000;
	192	if ((m_disk_sel & 0x0f) ==0) {
	193	return romdisk[m_romdisk_msb*256+m_romdisk_lsb];
199	194	} else {
200		if (state->m_disk_sel==0xdf) {
201		return state->m_radio_ram_disk[state->m_romdisk_msb*256+state->m_romdisk_lsb + 0x10000];
	195	if (m_disk_sel==0xdf) {
	196	return m_radio_ram_disk[m_romdisk_msb*256+m_romdisk_lsb + 0x10000];
202	197	} else {
203		return state->m_radio_ram_disk[state->m_romdisk_msb*256+state->m_romdisk_lsb];
	198	return m_radio_ram_disk[m_romdisk_msb*256+m_romdisk_lsb];
204	199	}
205	200	}
206	201	}
207	202
208		static WRITE8_DEVICE_HANDLER (radio86_romdisk_portb_w )
	203	WRITE8_MEMBER(radio86_state::radio86_romdisk_portb_w)
209	204	{
210		radio86_state *state = space.machine().driver_data<radio86_state>();
211		state->m_romdisk_lsb = data;
	205	m_romdisk_lsb = data;
212	206	}
213	207
214		static WRITE8_DEVICE_HANDLER (radio86_romdisk_portc_w )
	208	WRITE8_MEMBER(radio86_state::radio86_romdisk_portc_w)
215	209	{
216		radio86_state *state = space.machine().driver_data<radio86_state>();
217		state->m_romdisk_msb = data;
	210	m_romdisk_msb = data;
218	211	}
219	212
220	213	I8255A_INTERFACE( radio86_ppi8255_interface_2 )
221	214	{
222		DEVCB_HANDLER(radio86_romdisk_porta_r),
	215	DEVCB_DRIVER_MEMBER(radio86_state,radio86_romdisk_porta_r),
223	216	DEVCB_NULL,
224	217	DEVCB_NULL,
225		DEVCB_HANDLER(radio86_romdisk_portb_w),
	218	DEVCB_DRIVER_MEMBER(radio86_state,radio86_romdisk_portb_w),
226	219	DEVCB_NULL,
227		DEVCB_HANDLER(radio86_romdisk_portc_w)
	220	DEVCB_DRIVER_MEMBER(radio86_state,radio86_romdisk_portc_w)
228	221	};
229	222
230		static WRITE8_DEVICE_HANDLER (mikrosha_8255_font_page_w )
	223	WRITE8_MEMBER(radio86_state::mikrosha_8255_font_page_w)
231	224	{
232		radio86_state *state = space.machine().driver_data<radio86_state>();
233		state->m_mikrosha_font_page = (data  > 7) & 1;
	225	m_mikrosha_font_page = (data  > 7) & 1;
234	226	}
235	227
236	228	I8255A_INTERFACE( mikrosha_ppi8255_interface_2 )
r18257	r18258
238	230	DEVCB_NULL,
239	231	DEVCB_NULL,
240	232	DEVCB_NULL,
241		DEVCB_HANDLER(mikrosha_8255_font_page_w),
	233	DEVCB_DRIVER_MEMBER(radio86_state,mikrosha_8255_font_page_w),
242	234	DEVCB_NULL,
243	235	DEVCB_NULL
244	236	};

trunk/src/mess/machine/c64.c

r18257	r18258
78	78	*  see machine/cbm.c
79	79	*/
80	80
81		static READ8_DEVICE_HANDLER( c64_cia0_port_a_r )
	81	READ8_MEMBER(legacy_c64_state::c64_cia0_port_a_r)
82	82	{
83		UINT8 cia0portb = mos6526_pb_r(space.machine().device("cia_0"), space, 0);
	83	UINT8 cia0portb = mos6526_pb_r(machine().device("cia_0"), space, 0);
84	84
85		return cbm_common_cia0_port_a_r(device, cia0portb);
	85	return cbm_common_cia0_port_a_r(machine().device("cia_0"), cia0portb);
86	86	}
87	87
88		static READ8_DEVICE_HANDLER( c64_cia0_port_b_r )
	88	READ8_MEMBER(legacy_c64_state::c64_cia0_port_b_r)
89	89	{
90		UINT8 cia0porta = mos6526_pa_r(space.machine().device("cia_0"), space, 0);
	90	UINT8 cia0porta = mos6526_pa_r(machine().device("cia_0"), space, 0);
91	91
92		return cbm_common_cia0_port_b_r(device, cia0porta);
	92	return cbm_common_cia0_port_b_r(machine().device("cia_0"), cia0porta);
93	93	}
94	94
95		static WRITE8_DEVICE_HANDLER( c64_cia0_port_b_w )
	95	WRITE8_MEMBER(legacy_c64_state::c64_cia0_port_b_w)
96	96	{
97		device_t *vic2 = space.machine().device("vic2");
	97	device_t *vic2 = machine().device("vic2");
98	98	vic2_lightpen_write(vic2, data & 0x10);
99	99	}
100	100
r18257	r18258
133	133	DEVCB_NULL,   /* pc_func */
134	134	DEVCB_NULL,
135	135	DEVCB_NULL,
136		DEVCB_HANDLER(c64_cia0_port_a_r),
	136	DEVCB_DRIVER_MEMBER(legacy_c64_state,c64_cia0_port_a_r),
137	137	DEVCB_NULL,
138		DEVCB_HANDLER(c64_cia0_port_b_r),
139		DEVCB_HANDLER(c64_cia0_port_b_w)
	138	DEVCB_DRIVER_MEMBER(legacy_c64_state,c64_cia0_port_b_r),
	139	DEVCB_DRIVER_MEMBER(legacy_c64_state,c64_cia0_port_b_w)
140	140	};
141	141
142	142	const mos6526_interface c64_pal_cia0 =
r18257	r18258
145	145	DEVCB_NULL,   /* pc_func */
146	146	DEVCB_NULL,
147	147	DEVCB_NULL,
148		DEVCB_HANDLER(c64_cia0_port_a_r),
	148	DEVCB_DRIVER_MEMBER(legacy_c64_state,c64_cia0_port_a_r),
149	149	DEVCB_NULL,
150		DEVCB_HANDLER(c64_cia0_port_b_r),
151		DEVCB_HANDLER(c64_cia0_port_b_w)
	150	DEVCB_DRIVER_MEMBER(legacy_c64_state,c64_cia0_port_b_r),
	151	DEVCB_DRIVER_MEMBER(legacy_c64_state,c64_cia0_port_b_w)
152	152	};
153	153
154	154
r18257	r18258
175	175	* flag restore key or rs232 received data input
176	176	* irq to nmi connected ?
177	177	*/
178		static READ8_DEVICE_HANDLER( c64_cia1_port_a_r )
	178	READ8_MEMBER(legacy_c64_state::c64_cia1_port_a_r)
179	179	{
180		legacy_c64_state *state = space.machine().driver_data<legacy_c64_state>();
181
182	180	UINT8 value = 0xff;
183	181
184		if (!state->m_iec->clk_r())
	182	if (!m_iec->clk_r())
185	183	value &= ~0x40;
186	184
187		if (!state->m_iec->data_r())
	185	if (!m_iec->data_r())
188	186	value &= ~0x80;
189	187
190	188	return value;
191	189	}
192	190
193		static WRITE8_DEVICE_HANDLER( c64_cia1_port_a_w )
	191	WRITE8_MEMBER(legacy_c64_state::c64_cia1_port_a_w)
194	192	{
195		legacy_c64_state *state = space.machine().driver_data<legacy_c64_state>();
196	193	static const int helper[4] = {0xc000, 0x8000, 0x4000, 0x0000};
197	194
198		state->m_iec->clk_w(!(data & 0x10));
199		state->m_iec->data_w(!(data & 0x20));
200		state->m_iec->atn_w(!(data & 0x08));
201		state->m_vicaddr = state->m_memory + helper[data & 0x03];
	195	m_iec->clk_w(!(data & 0x10));
	196	m_iec->data_w(!(data & 0x20));
	197	m_iec->atn_w(!(data & 0x08));
	198	m_vicaddr = m_memory + helper[data & 0x03];
202	199	}
203	200
204	201	static void c64_cia1_interrupt( device_t *device, int level )
r18257	r18258
212	209	DEVCB_NULL,   /* pc_func */
213	210	DEVCB_NULL,
214	211	DEVCB_NULL,
215		DEVCB_HANDLER(c64_cia1_port_a_r),
216		DEVCB_HANDLER(c64_cia1_port_a_w),
	212	DEVCB_DRIVER_MEMBER(legacy_c64_state,c64_cia1_port_a_r),
	213	DEVCB_DRIVER_MEMBER(legacy_c64_state,c64_cia1_port_a_w),
217	214	DEVCB_NULL,
218	215	DEVCB_NULL
219	216	};
r18257	r18258
224	221	DEVCB_NULL,   /* pc_func */
225	222	DEVCB_NULL,
226	223	DEVCB_NULL,
227		DEVCB_HANDLER(c64_cia1_port_a_r),
228		DEVCB_HANDLER(c64_cia1_port_a_w),
	224	DEVCB_DRIVER_MEMBER(legacy_c64_state,c64_cia1_port_a_r),
	225	DEVCB_DRIVER_MEMBER(legacy_c64_state,c64_cia1_port_a_w),
229	226	DEVCB_NULL,
230	227	DEVCB_NULL
231	228	};
r18257	r18258
530	527	state->m_old_data = data;
531	528	}
532	529
533		/**
534		ddr bit 1 port line is output
535		port bit 1 port line is high
536
537		p0 output loram
538		p1 output hiram
539		p2 output charen
540		p3 output cassette data
541		p4 input cassette switch
542		p5 output cassette motor
543		p6,7 not available on M6510
544		*/
545
546		WRITE8_DEVICE_HANDLER(c64_m6510_port_write)
547		{
548		legacy_c64_state *state = space.machine().driver_data<legacy_c64_state>();
549
550		UINT8 direction = offset; // HACK ALERT!
551
552		/* if line is marked as input then keep current value */
553		data = (state->m_port_data & ~direction) | (data & direction);
554
555		/* resistors make P0,P1,P2 go high when respective line is changed to input */
556		if (!(direction & 0x04))
557		data |= 0x04;
558
559		if (!(direction & 0x02))
560		data |= 0x02;
561
562		if (!(direction & 0x01))
563		data |= 0x01;
564
565		state->m_port_data = data;
566
567		if (state->m_tape_on)
568		{
569		if (direction & 0x08)
570		{
571		space.machine().device<cassette_image_device>(CASSETTE_TAG)->output((data & 0x08) ? -(0x5a9e >> 1) : +(0x5a9e >> 1));
572		}
573
574		if (direction & 0x20)
575		{
576		if(!(data & 0x20))
577		{
578		space.machine().device<cassette_image_device>(CASSETTE_TAG)->change_state(CASSETTE_MOTOR_ENABLED, CASSETTE_MASK_MOTOR);
579		state->m_datasette_timer->adjust(attotime::zero, 0, attotime::from_hz(44100));
580		}
581		else
582		{
583		space.machine().device<cassette_image_device>(CASSETTE_TAG)->change_state(CASSETTE_MOTOR_DISABLED, CASSETTE_MASK_MOTOR);
584		state->m_datasette_timer->reset();
585		}
586		}
587		}
588
589		if (!state->m_ultimax)
590		c64_bankswitch(space.machine(), 0);
591
592		state->m_memory[0x000] = device->memory().space(AS_PROGRAM).read_byte(0);
593		state->m_memory[0x001] = device->memory().space(AS_PROGRAM).read_byte(1);
594
595		}
596
597		READ8_DEVICE_HANDLER(c64_m6510_port_read)
598		{
599		legacy_c64_state *state = space.machine().driver_data<legacy_c64_state>();
600		UINT8 data = state->m_port_data;
601
602		if (state->m_tape_on)
603		{
604		if ((space.machine().device<cassette_image_device>(CASSETTE_TAG)->get_state() & CASSETTE_MASK_UISTATE) != CASSETTE_STOPPED)
605		data &= ~0x10;
606		else
607		data |=  0x10;
608		}
609
610		return data;
611		}
612
613
614	530	int c64_paddle_read( device_t *device, address_space &space, int which )
615	531	{
616	532	running_machine &machine = device->machine();

trunk/src/mess/machine/bbc.c

r18257	r18258
906	906	}
907	907
908	908
909		static WRITE8_DEVICE_HANDLER( bbcb_via_system_write_porta )
	909	WRITE8_MEMBER(bbc_state::bbcb_via_system_write_porta)
910	910	{
911		bbc_state *state = space.machine().driver_data<bbc_state>();
912	911	//logerror("SYSTEM write porta %d\n",data);
913	912
914		state->m_via_system_porta = data;
915		if (state->m_b0_sound == 0)
	913	m_via_system_porta = data;
	914	if (m_b0_sound == 0)
916	915	{
917	916	//logerror("Doing an unsafe write to the sound chip %d \n",data);
918		state->m_sn->write(space, 0,state->m_via_system_porta);
	917	m_sn->write(space, 0,m_via_system_porta);
919	918	}
920		if (state->m_b3_keyboard == 0)
	919	if (m_b3_keyboard == 0)
921	920	{
922	921	//logerror("Doing an unsafe write to the keyboard %d \n",data);
923		state->m_via_system_porta = bbc_keyboard(space, state->m_via_system_porta);
	922	m_via_system_porta = bbc_keyboard(space, m_via_system_porta);
924	923	}
925		if (state->m_Master) MC146818_set(space);
	924	if (m_Master) MC146818_set(space);
926	925	}
927	926
928	927
929		static WRITE8_DEVICE_HANDLER( bbcb_via_system_write_portb )
	928	WRITE8_MEMBER(bbc_state::bbcb_via_system_write_portb)
930	929	{
931		bbc_state *state = space.machine().driver_data<bbc_state>();
932	930	int bit, value;
933	931	bit = data & 0x07;
934	932	value = (data >> 3) & 0x01;
r18257	r18258
941	939	switch (bit)
942	940	{
943	941	case 0:
944		if (state->m_b0_sound == 0)
	942	if (m_b0_sound == 0)
945	943	{
946		state->m_b0_sound = 1;
	944	m_b0_sound = 1;
947	945	}
948	946	break;
949	947	case 1:
950		if (state->m_Master)
	948	if (m_Master)
951	949	{
952		if (state->m_MC146818_WR == 0)
	950	if (m_MC146818_WR == 0)
953	951	{
954	952	/* BBC MASTER has NV RAM Here */
955		state->m_MC146818_WR = 1;
	953	m_MC146818_WR = 1;
956	954	MC146818_set(space);
957	955	}
958	956	}
959	957	else
960	958	{
961		if (state->m_b1_speech_read == 0)
	959	if (m_b1_speech_read == 0)
962	960	{
963	961	/* VSP TMS 5220 */
964		state->m_b1_speech_read = 1;
	962	m_b1_speech_read = 1;
965	963	}
966	964	}
967	965	break;
968	966	case 2:
969		if (state->m_Master)
	967	if (m_Master)
970	968	{
971		if (state->m_MC146818_DS == 0)
	969	if (m_MC146818_DS == 0)
972	970	{
973	971	/* BBC MASTER has NV RAM Here */
974		state->m_MC146818_DS = 1;
	972	m_MC146818_DS = 1;
975	973	MC146818_set(space);
976	974	}
977	975	}
978	976	else
979	977	{
980		if (state->m_b2_speech_write == 0)
	978	if (m_b2_speech_write == 0)
981	979	{
982	980	/* VSP TMS 5220 */
983		state->m_b2_speech_write = 1;
	981	m_b2_speech_write = 1;
984	982	}
985	983	}
986	984	break;
987	985	case 3:
988		if (state->m_b3_keyboard == 0)
	986	if (m_b3_keyboard == 0)
989	987	{
990		state->m_b3_keyboard = 1;
	988	m_b3_keyboard = 1;
991	989	}
992	990	break;
993	991	case 4:
994		if (state->m_b4_video0 == 0)
	992	if (m_b4_video0 == 0)
995	993	{
996		state->m_b4_video0 = 1;
	994	m_b4_video0 = 1;
997	995	}
998	996	break;
999	997	case 5:
1000		if (state->m_b5_video1 == 0)
	998	if (m_b5_video1 == 0)
1001	999	{
1002		state->m_b5_video1 = 1;
	1000	m_b5_video1 = 1;
1003	1001	}
1004	1002	break;
1005	1003	case 6:
1006		if (state->m_b6_caps_lock_led == 0)
	1004	if (m_b6_caps_lock_led == 0)
1007	1005	{
1008		state->m_b6_caps_lock_led = 1;
	1006	m_b6_caps_lock_led = 1;
1009	1007	/* call caps lock led update */
1010	1008	}
1011	1009	break;
1012	1010	case 7:
1013		if (state->m_b7_shift_lock_led == 0)
	1011	if (m_b7_shift_lock_led == 0)
1014	1012	{
1015		state->m_b7_shift_lock_led = 1;
	1013	m_b7_shift_lock_led = 1;
1016	1014	/* call shift lock led update */
1017	1015	}
1018	1016	break;
r18257	r18258
1023	1021	switch (bit)
1024	1022	{
1025	1023	case 0:
1026		if (state->m_b0_sound == 1)
	1024	if (m_b0_sound == 1)
1027	1025	{
1028		state->m_b0_sound = 0;
1029		state->m_sn->write(space, 0, state->m_via_system_porta);
	1026	m_b0_sound = 0;
	1027	m_sn->write(space, 0, m_via_system_porta);
1030	1028	}
1031	1029	break;
1032	1030	case 1:
1033		if (state->m_Master)
	1031	if (m_Master)
1034	1032	{
1035		if (state->m_MC146818_WR == 1)
	1033	if (m_MC146818_WR == 1)
1036	1034	{
1037	1035	/* BBC MASTER has NV RAM Here */
1038		state->m_MC146818_WR = 0;
	1036	m_MC146818_WR = 0;
1039	1037	MC146818_set(space);
1040	1038	}
1041	1039	}
1042	1040	else
1043	1041	{
1044		if (state->m_b1_speech_read == 1)
	1042	if (m_b1_speech_read == 1)
1045	1043	{
1046	1044	/* VSP TMS 5220 */
1047		state->m_b1_speech_read = 0;
	1045	m_b1_speech_read = 0;
1048	1046	}
1049	1047	}
1050	1048	break;
1051	1049	case 2:
1052		if (state->m_Master)
	1050	if (m_Master)
1053	1051	{
1054		if (state->m_MC146818_DS == 1)
	1052	if (m_MC146818_DS == 1)
1055	1053	{
1056	1054	/* BBC MASTER has NV RAM Here */
1057		state->m_MC146818_DS = 0;
	1055	m_MC146818_DS = 0;
1058	1056	MC146818_set(space);
1059	1057	}
1060	1058	}
1061	1059	else
1062	1060	{
1063		if (state->m_b2_speech_write == 1)
	1061	if (m_b2_speech_write == 1)
1064	1062	{
1065	1063	/* VSP TMS 5220 */
1066		state->m_b2_speech_write = 0;
	1064	m_b2_speech_write = 0;
1067	1065	}
1068	1066	}
1069	1067	break;
1070	1068	case 3:
1071		if (state->m_b3_keyboard == 1)
	1069	if (m_b3_keyboard == 1)
1072	1070	{
1073		state->m_b3_keyboard = 0;
	1071	m_b3_keyboard = 0;
1074	1072	/* *** call keyboard enabled *** */
1075		state->m_via_system_porta=bbc_keyboard(space, state->m_via_system_porta);
	1073	m_via_system_porta=bbc_keyboard(space, m_via_system_porta);
1076	1074	}
1077	1075	break;
1078	1076	case 4:
1079		if (state->m_b4_video0 == 1)
	1077	if (m_b4_video0 == 1)
1080	1078	{
1081		state->m_b4_video0 = 0;
	1079	m_b4_video0 = 0;
1082	1080	}
1083	1081	break;
1084	1082	case 5:
1085		if (state->m_b5_video1 == 1)
	1083	if (m_b5_video1 == 1)
1086	1084	{
1087		state->m_b5_video1 = 0;
	1085	m_b5_video1 = 0;
1088	1086	}
1089	1087	break;
1090	1088	case 6:
1091		if (state->m_b6_caps_lock_led == 1)
	1089	if (m_b6_caps_lock_led == 1)
1092	1090	{
1093		state->m_b6_caps_lock_led = 0;
	1091	m_b6_caps_lock_led = 0;
1094	1092	/* call caps lock led update */
1095	1093	}
1096	1094	break;
1097	1095	case 7:
1098		if (state->m_b7_shift_lock_led == 1)
	1096	if (m_b7_shift_lock_led == 1)
1099	1097	{
1100		state->m_b7_shift_lock_led = 0;
	1098	m_b7_shift_lock_led = 0;
1101	1099	/* call shift lock led update */
1102	1100	}
1103	1101	break;
r18257	r18258
1106	1104
1107	1105
1108	1106
1109		if (state->m_Master)
	1107	if (m_Master)
1110	1108	{
1111	1109	//set the Address Select
1112		if (state->m_MC146818_AS != ((data>>7)&1))
	1110	if (m_MC146818_AS != ((data>>7)&1))
1113	1111	{
1114		state->m_MC146818_AS=(data>>7)&1;
	1112	m_MC146818_AS=(data>>7)&1;
1115	1113	MC146818_set(space);
1116	1114	}
1117	1115
1118	1116	//if CE changes
1119		if (state->m_MC146818_CE != ((data>>6)&1))
	1117	if (m_MC146818_CE != ((data>>6)&1))
1120	1118	{
1121		state->m_MC146818_CE=(data>>6)&1;
	1119	m_MC146818_CE=(data>>6)&1;
1122	1120	MC146818_set(space);
1123	1121	}
1124	1122	}
1125	1123	}
1126	1124
1127	1125
1128		static READ8_DEVICE_HANDLER( bbcb_via_system_read_porta )
	1126	READ8_MEMBER(bbc_state::bbcb_via_system_read_porta)
1129	1127	{
1130		bbc_state *state = space.machine().driver_data<bbc_state>();
1131		//logerror("SYSTEM read porta %d\n",state->m_via_system_porta);
1132		return state->m_via_system_porta;
	1128	//logerror("SYSTEM read porta %d\n",m_via_system_porta);
	1129	return m_via_system_porta;
1133	1130	}
1134	1131
1135	1132	// D4 of portb is joystick fire button 1
r18257	r18258
1151	1148	#endif
1152	1149
1153	1150
1154		static READ8_DEVICE_HANDLER( bbcb_via_system_read_portb )
	1151	READ8_MEMBER(bbc_state::bbcb_via_system_read_portb)
1155	1152	{
1156	1153	//TMSint=(!tms5220_int_r())&1;
1157	1154	//TMSrdy=(!tms5220_readyq_r())&1;
1158	1155
1159	1156	//logerror("SYSTEM read portb %d\n",0xf | input_port(machine, "IN0")|(TMSint<<6)|(TMSrdy<<7));
1160	1157
1161		return (0xf | space.machine().root_device().ioport("IN0")->read()|(TMSint<<6)|(TMSrdy<<7));
	1158	return (0xf | machine().root_device().ioport("IN0")->read()|(TMSint<<6)|(TMSrdy<<7));
1162	1159	}
1163	1160
1164	1161
1165	1162	/* vertical sync pulse from video circuit */
1166		static READ8_DEVICE_HANDLER( bbcb_via_system_read_ca1 )
	1163	READ8_MEMBER(bbc_state::bbcb_via_system_read_ca1)
1167	1164	{
1168	1165	return 0x01;
1169	1166	}
1170	1167
1171	1168
1172	1169	/* joystick EOC */
1173		static READ8_DEVICE_HANDLER( bbcb_via_system_read_cb1 )
	1170	READ8_MEMBER(bbc_state::bbcb_via_system_read_cb1)
1174	1171	{
1175		return uPD7002_EOC_r(space.machine().device("upd7002"),space,0);
	1172	return uPD7002_EOC_r(machine().device("upd7002"),space,0);
1176	1173	}
1177	1174
1178	1175
1179	1176	/* keyboard pressed detect */
1180		static READ8_DEVICE_HANDLER( bbcb_via_system_read_ca2 )
	1177	READ8_MEMBER(bbc_state::bbcb_via_system_read_ca2)
1181	1178	{
1182	1179	return 0x01;
1183	1180	}
1184	1181
1185	1182
1186	1183	/* light pen strobe detect (not emulated) */
1187		static READ8_DEVICE_HANDLER( bbcb_via_system_read_cb2 )
	1184	READ8_MEMBER(bbc_state::bbcb_via_system_read_cb2)
1188	1185	{
1189	1186	return 0x01;
1190	1187	}
1191	1188
1192	1189
1193		static WRITE_LINE_DEVICE_HANDLER( bbcb_via_system_irq_w )
	1190	WRITE_LINE_MEMBER(bbc_state::bbcb_via_system_irq_w)
1194	1191	{
1195		bbc_state *driver_state = device->machine().driver_data<bbc_state>();
1196		driver_state->m_via_system_irq = state;
	1192	m_via_system_irq = state;
1197	1193
1198		driver_state->check_interrupts();
	1194	check_interrupts();
1199	1195	}
1200	1196
1201	1197	const via6522_interface bbcb_system_via =
1202	1198	{
1203		DEVCB_HANDLER(bbcb_via_system_read_porta),
1204		DEVCB_HANDLER(bbcb_via_system_read_portb),
1205		DEVCB_HANDLER(bbcb_via_system_read_ca1),
1206		DEVCB_HANDLER(bbcb_via_system_read_cb1),
1207		DEVCB_HANDLER(bbcb_via_system_read_ca2),
1208		DEVCB_HANDLER(bbcb_via_system_read_cb2),
1209		DEVCB_HANDLER(bbcb_via_system_write_porta),
1210		DEVCB_HANDLER(bbcb_via_system_write_portb),
	1199	DEVCB_DRIVER_MEMBER(bbc_state,bbcb_via_system_read_porta),
	1200	DEVCB_DRIVER_MEMBER(bbc_state,bbcb_via_system_read_portb),
	1201	DEVCB_DRIVER_MEMBER(bbc_state,bbcb_via_system_read_ca1),
	1202	DEVCB_DRIVER_MEMBER(bbc_state,bbcb_via_system_read_cb1),
	1203	DEVCB_DRIVER_MEMBER(bbc_state,bbcb_via_system_read_ca2),
	1204	DEVCB_DRIVER_MEMBER(bbc_state,bbcb_via_system_read_cb2),
	1205	DEVCB_DRIVER_MEMBER(bbc_state,bbcb_via_system_write_porta),
	1206	DEVCB_DRIVER_MEMBER(bbc_state,bbcb_via_system_write_portb),
1211	1207	DEVCB_NULL,
1212	1208	DEVCB_NULL,
1213	1209	DEVCB_NULL,
1214	1210	DEVCB_NULL,
1215		DEVCB_LINE(bbcb_via_system_irq_w)
	1211	DEVCB_DRIVER_LINE_MEMBER(bbc_state,bbcb_via_system_irq_w)
1216	1212	};
1217	1213
1218	1214
r18257	r18258
1226	1222	***********************************************************************/
1227	1223
1228	1224	/* USER VIA 6522 port B is connected to the BBC user port */
1229		static READ8_DEVICE_HANDLER( bbcb_via_user_read_portb )
	1225	READ8_MEMBER(bbc_state::bbcb_via_user_read_portb)
1230	1226	{
1231	1227	return 0xff;
1232	1228	}
1233	1229
1234		static WRITE8_DEVICE_HANDLER( bbcb_via_user_write_portb )
	1230	WRITE8_MEMBER(bbc_state::bbcb_via_user_write_portb)
1235	1231	{
1236		bbc_state *state = space.machine().driver_data<bbc_state>();
1237		state->m_userport = data;
	1232	m_userport = data;
1238	1233	}
1239	1234
1240		static WRITE_LINE_DEVICE_HANDLER( bbcb_via_user_irq_w )
	1235	WRITE_LINE_MEMBER(bbc_state::bbcb_via_user_irq_w)
1241	1236	{
1242		bbc_state *driver_state = device->machine().driver_data<bbc_state>();
1243		driver_state->m_via_user_irq = state;
	1237	m_via_user_irq = state;
1244	1238
1245		driver_state->check_interrupts();
	1239	check_interrupts();
1246	1240	}
1247	1241
1248	1242	const via6522_interface bbcb_user_via =
1249	1243	{
1250	1244	DEVCB_NULL,   //via_user_read_porta,
1251		DEVCB_HANDLER(bbcb_via_user_read_portb),
	1245	DEVCB_DRIVER_MEMBER(bbc_state,bbcb_via_user_read_portb),
1252	1246	DEVCB_NULL,   //via_user_read_ca1,
1253	1247	DEVCB_NULL,   //via_user_read_cb1,
1254	1248	DEVCB_NULL,   //via_user_read_ca2,
1255	1249	DEVCB_NULL,   //via_user_read_cb2,
1256	1250	DEVCB_DEVICE_MEMBER("centronics", centronics_device, write),
1257		DEVCB_HANDLER(bbcb_via_user_write_portb),
	1251	DEVCB_DRIVER_MEMBER(bbc_state,bbcb_via_user_write_portb),
1258	1252	DEVCB_NULL, //via_user_write_ca1
1259	1253	DEVCB_NULL, //via_user_write_cb1
1260	1254	DEVCB_DEVICE_LINE_MEMBER("centronics", centronics_device, strobe_w),
1261	1255	DEVCB_NULL,   //via_user_write_cb2,
1262		DEVCB_LINE(bbcb_via_user_irq_w)
	1256	DEVCB_DRIVER_LINE_MEMBER(bbc_state,bbcb_via_user_irq_w)
1263	1257	};
1264	1258
1265	1259
r18257	r18258
1562	1556	drvstate->m_previous_wd177x_int_state = bbc_state;
1563	1557	}
1564	1558
1565		static WRITE_LINE_DEVICE_HANDLER( bbc_wd177x_intrq_w )
	1559	WRITE_LINE_MEMBER(bbc_state::bbc_wd177x_intrq_w)
1566	1560	{
1567		bbc_state *drvstate = device->machine().driver_data<bbc_state>();
1568		drvstate->m_wd177x_irq_state = state;
1569		bbc_update_fdq_int(device->machine(), state);
	1561	m_wd177x_irq_state = state;
	1562	bbc_update_fdq_int(machine(), state);
1570	1563	}
1571	1564
1572		static WRITE_LINE_DEVICE_HANDLER( bbc_wd177x_drq_w )
	1565	WRITE_LINE_MEMBER(bbc_state::bbc_wd177x_drq_w)
1573	1566	{
1574		bbc_state *drvstate = device->machine().driver_data<bbc_state>();
1575		drvstate->m_wd177x_drq_state = state;
1576		bbc_update_fdq_int(device->machine(), state);
	1567	m_wd177x_drq_state = state;
	1568	bbc_update_fdq_int(machine(), state);
1577	1569	}
1578	1570
1579	1571	const wd17xx_interface bbc_wd17xx_interface =
1580	1572	{
1581	1573	DEVCB_NULL,
1582		DEVCB_LINE(bbc_wd177x_intrq_w),
1583		DEVCB_LINE(bbc_wd177x_drq_w),
	1574	DEVCB_DRIVER_LINE_MEMBER(bbc_state,bbc_wd177x_intrq_w),
	1575	DEVCB_DRIVER_LINE_MEMBER(bbc_state,bbc_wd177x_drq_w),
1584	1576	{FLOPPY_0, FLOPPY_1, NULL, NULL}
1585	1577	};
1586	1578

trunk/src/mess/machine/pc.c

r18257	r18258
53	53	if(VERBOSE_PIO>=N) \
54	54	{ \
55	55	if( M ) \
56		logerror("%11.6f: %-24s",machine.time().as_double(),(char*)M ); \
	56	logerror("%11.6f: %-24s",machine().time().as_double(),(char*)M ); \
57	57	logerror A; \
58	58	} \
59	59	} while (0)
r18257	r18258
168	168	}
169	169
170	170
171		static WRITE_LINE_DEVICE_HANDLER( pc_dma_hrq_changed )
	171	WRITE_LINE_MEMBER(pc_state::pc_dma_hrq_changed)
172	172	{
173		pc_state *st = device->machine().driver_data<pc_state>();
174		st->m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE);
	173	device_t *device = machine().device("dma8237");
	174	m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE);
175	175
176	176	/* Assert HLDA */
177	177	i8237_hlda_w( device, state );
r18257	r18258
200	200	}
201	201
202	202
203		static READ8_DEVICE_HANDLER( pc_dma8237_fdc_dack_r )
	203	READ8_MEMBER(pc_state::pc_dma8237_fdc_dack_r)
204	204	{
205		return pc_fdc_dack_r(space.machine(), space);
	205	return pc_fdc_dack_r(machine(), space);
206	206	}
207	207
208	208
209		static READ8_DEVICE_HANDLER( pc_dma8237_hdc_dack_r )
	209	READ8_MEMBER(pc_state::pc_dma8237_hdc_dack_r)
210	210	{
211	211	return 0xff;
212	212	}
213	213
214	214
215		static WRITE8_DEVICE_HANDLER( pc_dma8237_fdc_dack_w )
	215	WRITE8_MEMBER(pc_state::pc_dma8237_fdc_dack_w)
216	216	{
217		pc_fdc_dack_w( space.machine(), space, data );
	217	pc_fdc_dack_w( machine(), space, data );
218	218	}
219	219
220	220
221		static WRITE8_DEVICE_HANDLER( pc_dma8237_hdc_dack_w )
	221	WRITE8_MEMBER(pc_state::pc_dma8237_hdc_dack_w)
222	222	{
223	223	}
224	224
225	225
226		static WRITE8_DEVICE_HANDLER( pc_dma8237_0_dack_w )
	226	WRITE8_MEMBER(pc_state::pc_dma8237_0_dack_w)
227	227	{
228		pc_state *st = space.machine().driver_data<pc_state>();
229		st->m_u73_q2 = 0;
230		i8237_dreq0_w( st->m_dma8237, st->m_u73_q2 );
	228	m_u73_q2 = 0;
	229	i8237_dreq0_w( m_dma8237, m_u73_q2 );
231	230	}
232	231
233	232
234		static WRITE_LINE_DEVICE_HANDLER( pc_dma8237_out_eop )
	233	WRITE_LINE_MEMBER(pc_state::pc_dma8237_out_eop)
235	234	{
236		pc_fdc_set_tc_state( device->machine(), state == ASSERT_LINE ? 0 : 1 );
	235	pc_fdc_set_tc_state( machine(), state == ASSERT_LINE ? 0 : 1 );
237	236	}
238	237
239		static void set_dma_channel(device_t *device, int channel, int state)
	238	static void set_dma_channel(running_machine &machine, int channel, int state)
240	239	{
241		pc_state *st = device->machine().driver_data<pc_state>();
	240	pc_state *st = machine.driver_data<pc_state>();
242	241
243	242	if (!state) st->m_dma_channel = channel;
244	243	}
245	244
246		static WRITE_LINE_DEVICE_HANDLER( pc_dack0_w ) { set_dma_channel(device, 0, state); }
247		static WRITE_LINE_DEVICE_HANDLER( pc_dack1_w ) { set_dma_channel(device, 1, state); }
248		static WRITE_LINE_DEVICE_HANDLER( pc_dack2_w ) { set_dma_channel(device, 2, state); }
249		static WRITE_LINE_DEVICE_HANDLER( pc_dack3_w ) { set_dma_channel(device, 3, state); }
	245	WRITE_LINE_MEMBER(pc_state::pc_dack0_w){ set_dma_channel(machine(), 0, state); }
	246	WRITE_LINE_MEMBER(pc_state::pc_dack1_w){ set_dma_channel(machine(), 1, state); }
	247	WRITE_LINE_MEMBER(pc_state::pc_dack2_w){ set_dma_channel(machine(), 2, state); }
	248	WRITE_LINE_MEMBER(pc_state::pc_dack3_w){ set_dma_channel(machine(), 3, state); }
250	249
251	250	I8237_INTERFACE( ibm5150_dma8237_config )
252	251	{
253		DEVCB_DEVICE_LINE("dma8237", pc_dma_hrq_changed),
254		DEVCB_DEVICE_LINE("dma8237", pc_dma8237_out_eop),
	252	DEVCB_DRIVER_LINE_MEMBER(pc_state,pc_dma_hrq_changed),
	253	DEVCB_DRIVER_LINE_MEMBER(pc_state,pc_dma8237_out_eop),
255	254	DEVCB_DRIVER_MEMBER(pc_state, pc_dma_read_byte),
256	255	DEVCB_DRIVER_MEMBER(pc_state, pc_dma_write_byte),
257		{ DEVCB_NULL, DEVCB_NULL, DEVCB_DEVICE_HANDLER("dma8237", pc_dma8237_fdc_dack_r), DEVCB_DEVICE_HANDLER("dma8237", pc_dma8237_hdc_dack_r) },
258		{ DEVCB_DEVICE_HANDLER("dma8237", pc_dma8237_0_dack_w), DEVCB_NULL, DEVCB_DEVICE_HANDLER("dma8237", pc_dma8237_fdc_dack_w), DEVCB_DEVICE_HANDLER("dma8237", pc_dma8237_hdc_dack_w) },
259		{ DEVCB_DEVICE_LINE("dma8237", pc_dack0_w), DEVCB_DEVICE_LINE("dma8237", pc_dack1_w), DEVCB_DEVICE_LINE("dma8237", pc_dack2_w), DEVCB_DEVICE_LINE("dma8237", pc_dack3_w) }
	256	{ DEVCB_NULL, DEVCB_NULL, DEVCB_DRIVER_MEMBER(pc_state,pc_dma8237_fdc_dack_r), DEVCB_DRIVER_MEMBER(pc_state, pc_dma8237_hdc_dack_r) },
	257	{ DEVCB_DRIVER_MEMBER(pc_state, pc_dma8237_0_dack_w), DEVCB_NULL, DEVCB_DRIVER_MEMBER(pc_state,pc_dma8237_fdc_dack_w), DEVCB_DRIVER_MEMBER(pc_state, pc_dma8237_hdc_dack_w) },
	258	{ DEVCB_DRIVER_LINE_MEMBER(pc_state,pc_dack0_w), DEVCB_DRIVER_LINE_MEMBER(pc_state, pc_dack1_w), DEVCB_DRIVER_LINE_MEMBER(pc_state, pc_dack2_w), DEVCB_DRIVER_LINE_MEMBER(pc_state, pc_dack3_w) }
260	259	};
261	260
262	261
r18257	r18258
296	295	machine().firstcpu->set_input_line(0, param ? ASSERT_LINE : CLEAR_LINE);
297	296	}
298	297
299		static WRITE_LINE_DEVICE_HANDLER( pcjr_pic8259_set_int_line )
	298	WRITE_LINE_MEMBER(pc_state::pcjr_pic8259_set_int_line)
300	299	{
301		if ( device->machine().firstcpu->pc() == 0xF0454 )
	300	if ( machine().firstcpu->pc() == 0xF0454 )
302	301	{
303		pc_int_delay_timer->adjust( device->machine().firstcpu->cycles_to_attotime(1), state );
	302	pc_int_delay_timer->adjust( machine().firstcpu->cycles_to_attotime(1), state );
304	303	}
305	304	else
306	305	{
307		device->machine().firstcpu->set_input_line(0, state ? ASSERT_LINE : CLEAR_LINE);
	306	machine().firstcpu->set_input_line(0, state ? ASSERT_LINE : CLEAR_LINE);
308	307	}
309	308	}
310	309
311	310	const struct pic8259_interface pcjr_pic8259_config =
312	311	{
313		DEVCB_LINE(pcjr_pic8259_set_int_line),
	312	DEVCB_DRIVER_LINE_MEMBER(pc_state,pcjr_pic8259_set_int_line),
314	313	DEVCB_LINE_VCC,
315	314	DEVCB_NULL
316	315	};
r18257	r18258
352	351	*
353	352	*************************************************************/
354	353
355		static WRITE_LINE_DEVICE_HANDLER( ibm5150_pit8253_out1_changed )
	354	WRITE_LINE_MEMBER(pc_state::ibm5150_pit8253_out1_changed)
356	355	{
357		pc_state *st = device->machine().driver_data<pc_state>();
358	356	/* Trigger DMA channel #0 */
359		if ( st->m_out1 == 0 && state == 1 && st->m_u73_q2 == 0 )
	357	if ( m_out1 == 0 && state == 1 && m_u73_q2 == 0 )
360	358	{
361		st->m_u73_q2 = 1;
362		i8237_dreq0_w( st->m_dma8237, st->m_u73_q2 );
	359	m_u73_q2 = 1;
	360	i8237_dreq0_w( m_dma8237, m_u73_q2 );
363	361	}
364		st->m_out1 = state;
	362	m_out1 = state;
365	363	}
366	364
367	365
368		static WRITE_LINE_DEVICE_HANDLER( ibm5150_pit8253_out2_changed )
	366	WRITE_LINE_MEMBER(pc_state::ibm5150_pit8253_out2_changed)
369	367	{
370		pc_speaker_set_input( device->machine(), state );
	368	pc_speaker_set_input( machine(), state );
371	369	}
372	370
373	371
r18257	r18258
381	379	}, {
382	380	XTAL_14_31818MHz/12,            /* dram refresh */
383	381	DEVCB_NULL,
384		DEVCB_LINE(ibm5150_pit8253_out1_changed)
	382	DEVCB_DRIVER_LINE_MEMBER(pc_state,ibm5150_pit8253_out1_changed)
385	383	}, {
386	384	XTAL_14_31818MHz/12,            /* pio port c pin 4, and speaker polling enough */
387	385	DEVCB_NULL,
388		DEVCB_LINE(ibm5150_pit8253_out2_changed)
	386	DEVCB_DRIVER_LINE_MEMBER(pc_state,ibm5150_pit8253_out2_changed)
389	387	}
390	388	}
391	389	};
r18257	r18258
411	409	}, {
412	410	XTAL_14_31818MHz/12,              /* pio port c pin 4, and speaker polling enough */
413	411	DEVCB_NULL,
414		DEVCB_LINE(ibm5150_pit8253_out2_changed)
	412	DEVCB_DRIVER_LINE_MEMBER(pc_state,ibm5150_pit8253_out2_changed)
415	413	}
416	414	}
417	415	};
r18257	r18258
432	430	}, {
433	431	XTAL_16MHz/12,              /* pio port c pin 4, and speaker polling enough */
434	432	DEVCB_NULL,
435		DEVCB_LINE(ibm5150_pit8253_out2_changed)
	433	DEVCB_DRIVER_LINE_MEMBER(pc_state,ibm5150_pit8253_out2_changed)
436	434	}
437	435	}
438	436	};
r18257	r18258
444	442	**********************************************************/
445	443
446	444	/* called when a interrupt is set/cleared from com hardware */
447		static WRITE_LINE_DEVICE_HANDLER( pc_com_interrupt_1 )
	445	WRITE_LINE_MEMBER(pc_state::pc_com_interrupt_1)
448	446	{
449		pc_state *st = device->machine().driver_data<pc_state>();
450		pic8259_ir4_w(st->m_pic8259, state);
	447	pic8259_ir4_w(m_pic8259, state);
451	448	}
452	449
453		static WRITE_LINE_DEVICE_HANDLER( pc_com_interrupt_2 )
	450	WRITE_LINE_MEMBER(pc_state::pc_com_interrupt_2)
454	451	{
455		pc_state *st = device->machine().driver_data<pc_state>();
456		pic8259_ir3_w(st->m_pic8259, state);
	452	pic8259_ir3_w(m_pic8259, state);
457	453	}
458	454
459	455	const ins8250_interface ibm5150_com_interface[4]=
r18257	r18258
462	458	DEVCB_DEVICE_LINE_MEMBER("serport0", serial_port_device, tx),
463	459	DEVCB_DEVICE_LINE_MEMBER("serport0", rs232_port_device, dtr_w),
464	460	DEVCB_DEVICE_LINE_MEMBER("serport0", rs232_port_device, rts_w),
465		DEVCB_LINE(pc_com_interrupt_1),
	461	DEVCB_DRIVER_LINE_MEMBER(pc_state,pc_com_interrupt_1),
466	462	DEVCB_NULL,
467	463	DEVCB_NULL
468	464	},
r18257	r18258
470	466	DEVCB_DEVICE_LINE_MEMBER("serport1", serial_port_device, tx),
471	467	DEVCB_DEVICE_LINE_MEMBER("serport1", rs232_port_device, dtr_w),
472	468	DEVCB_DEVICE_LINE_MEMBER("serport1", rs232_port_device, rts_w),
473		DEVCB_LINE(pc_com_interrupt_2),
	469	DEVCB_DRIVER_LINE_MEMBER(pc_state,pc_com_interrupt_2),
474	470	DEVCB_NULL,
475	471	DEVCB_NULL
476	472	},
r18257	r18258
478	474	DEVCB_DEVICE_LINE_MEMBER("serport2", serial_port_device, tx),
479	475	DEVCB_DEVICE_LINE_MEMBER("serport2", rs232_port_device, dtr_w),
480	476	DEVCB_DEVICE_LINE_MEMBER("serport2", rs232_port_device, rts_w),
481		DEVCB_LINE(pc_com_interrupt_1),
	477	DEVCB_DRIVER_LINE_MEMBER(pc_state,pc_com_interrupt_1),
482	478	DEVCB_NULL,
483	479	DEVCB_NULL
484	480	},
r18257	r18258
486	482	DEVCB_DEVICE_LINE_MEMBER("serport3", serial_port_device, tx),
487	483	DEVCB_DEVICE_LINE_MEMBER("serport3", rs232_port_device, dtr_w),
488	484	DEVCB_DEVICE_LINE_MEMBER("serport3", rs232_port_device, rts_w),
489		DEVCB_LINE(pc_com_interrupt_2),
	485	DEVCB_DRIVER_LINE_MEMBER(pc_state,pc_com_interrupt_2),
490	486	DEVCB_NULL,
491	487	DEVCB_NULL
492	488	}
r18257	r18258
756	752	}
757	753
758	754
759		static READ8_DEVICE_HANDLER (ibm5160_ppi_porta_r)
	755	READ8_MEMBER(pc_state::ibm5160_ppi_porta_r)
760	756	{
761	757	int data = 0xFF;
762		running_machine &machine = space.machine();
763		pc_state *st = space.machine().driver_data<pc_state>();
764
765	758	/* KB port A */
766		if (st->m_ppi_keyboard_clear)
	759	if (m_ppi_keyboard_clear)
767	760	{
768	761	/*   0  0 - no floppy drives
769	762	*   1  Not used
r18257	r18258
774	767	*      01 - color 40x25
775	768	* 6-7  The number of floppy disk drives
776	769	*/
777		data = space.machine().root_device().ioport("DSW0")->read();
	770	data = machine().root_device().ioport("DSW0")->read();
778	771	}
779	772	else
780	773	{
781		data = st->m_ppi_shift_register;
	774	data = m_ppi_shift_register;
782	775	}
783	776	PIO_LOG(1,"PIO_A_r",("$%02x\n", data));
784	777	return data;
785	778	}
786	779
787	780
788		static READ8_DEVICE_HANDLER ( ibm5160_ppi_portc_r )
	781	READ8_MEMBER(pc_state::ibm5160_ppi_portc_r)
789	782	{
790		pc_state *st = space.machine().driver_data<pc_state>();
791		int timer2_output = pit8253_get_output( st->m_pit8253, 2 );
	783	int timer2_output = pit8253_get_output( m_pit8253, 2 );
792	784	int data=0xff;
793		running_machine &machine = space.machine();
794	785
795	786	data&=~0x80; // no parity error
796	787	data&=~0x40; // no error on expansion board
797	788	/* KB port C: equipment flags */
798	789	//  if (pc_port[0x61] & 0x08)
799		if (st->m_ppi_portc_switch_high)
	790	if (m_ppi_portc_switch_high)
800	791	{
801	792	/* read hi nibble of S2 */
802		data = (data & 0xf0) | ((space.machine().root_device().ioport("DSW0")->read() >> 4) & 0x0f);
	793	data = (data & 0xf0) | ((machine().root_device().ioport("DSW0")->read() >> 4) & 0x0f);
803	794	PIO_LOG(1,"PIO_C_r (hi)",("$%02x\n", data));
804	795	}
805	796	else
806	797	{
807	798	/* read lo nibble of S2 */
808		data = (data & 0xf0) | (space.machine().root_device().ioport("DSW0")->read() & 0x0f);
	799	data = (data & 0xf0) | (machine().root_device().ioport("DSW0")->read() & 0x0f);
809	800	PIO_LOG(1,"PIO_C_r (lo)",("$%02x\n", data));
810	801	}
811	802
812		if ( st->m_ppi_portb & 0x01 )
	803	if ( m_ppi_portb & 0x01 )
813	804	{
814	805	data = ( data & ~0x10 ) | ( timer2_output ? 0x10 : 0x00 );
815	806	}
r18257	r18258
819	810	}
820	811
821	812
822		static WRITE8_DEVICE_HANDLER( ibm5160_ppi_portb_w )
	813	WRITE8_MEMBER(pc_state::ibm5160_ppi_portb_w)
823	814	{
824		pc_state *st = space.machine().driver_data<pc_state>();
825
826	815	/* PPI controller port B*/
827		st->m_ppi_portb = data;
828		st->m_ppi_portc_switch_high = data & 0x08;
829		st->m_ppi_keyboard_clear = data & 0x80;
830		st->m_ppi_keyb_clock = data & 0x40;
831		pit8253_gate2_w(st->m_pit8253, BIT(data, 0));
832		pc_speaker_set_spkrdata( space.machine(), data & 0x02 );
	816	m_ppi_portb = data;
	817	m_ppi_portc_switch_high = data & 0x08;
	818	m_ppi_keyboard_clear = data & 0x80;
	819	m_ppi_keyb_clock = data & 0x40;
	820	pit8253_gate2_w(m_pit8253, BIT(data, 0));
	821	pc_speaker_set_spkrdata( machine(), data & 0x02 );
833	822
834		st->m_ppi_clock_signal = ( st->m_ppi_keyb_clock ) ? 1 : 0;
835		st->m_pc_kbdc->clock_write_from_mb(st->m_ppi_clock_signal);
	823	m_ppi_clock_signal = ( m_ppi_keyb_clock ) ? 1 : 0;
	824	m_pc_kbdc->clock_write_from_mb(m_ppi_clock_signal);
836	825
837	826	/* If PB7 is set clear the shift register and reset the IRQ line */
838		if ( st->m_ppi_keyboard_clear )
	827	if ( m_ppi_keyboard_clear )
839	828	{
840		pic8259_ir1_w(st->m_pic8259, 0);
841		st->m_ppi_shift_register = 0;
842		st->m_ppi_shift_enable = 1;
	829	pic8259_ir1_w(m_pic8259, 0);
	830	m_ppi_shift_register = 0;
	831	m_ppi_shift_enable = 1;
843	832	}
844	833	}
845	834
846	835
847	836	I8255_INTERFACE( ibm5160_ppi8255_interface )
848	837	{
849		DEVCB_HANDLER(ibm5160_ppi_porta_r),
	838	DEVCB_DRIVER_MEMBER(pc_state,ibm5160_ppi_porta_r),
850	839	DEVCB_NULL,
851	840	DEVCB_NULL,
852		DEVCB_HANDLER(ibm5160_ppi_portb_w),
853		DEVCB_HANDLER(ibm5160_ppi_portc_r),
	841	DEVCB_DRIVER_MEMBER(pc_state,ibm5160_ppi_portb_w),
	842	DEVCB_DRIVER_MEMBER(pc_state,ibm5160_ppi_portc_r),
854	843	DEVCB_NULL
855	844	};
856	845
857	846
858		static READ8_DEVICE_HANDLER (pc_ppi_porta_r)
	847	READ8_MEMBER(pc_state::pc_ppi_porta_r)
859	848	{
860	849	int data = 0xFF;
861		running_machine &machine = space.machine();
862		pc_state *st = space.machine().driver_data<pc_state>();
863	850
864	851	/* KB port A */
865		if (st->m_ppi_keyboard_clear)
	852	if (m_ppi_keyboard_clear)
866	853	{
867	854	/*   0  0 - no floppy drives
868	855	*   1  Not used
r18257	r18258
873	860	*      01 - color 40x25
874	861	* 6-7  The number of floppy disk drives
875	862	*/
876		data = space.machine().root_device().ioport("DSW0")->read();
	863	data = machine().root_device().ioport("DSW0")->read();
877	864	}
878	865	else
879	866	{
r18257	r18258
884	871	}
885	872
886	873
887		static WRITE8_DEVICE_HANDLER( pc_ppi_portb_w )
	874	WRITE8_MEMBER(pc_state::pc_ppi_portb_w)
888	875	{
889		pc_state *st = space.machine().driver_data<pc_state>();
890	876	/* PPI controller port B*/
891		st->m_ppi_portb = data;
892		st->m_ppi_portc_switch_high = data & 0x08;
893		st->m_ppi_keyboard_clear = data & 0x80;
894		st->m_ppi_keyb_clock = data & 0x40;
895		pit8253_gate2_w(st->m_pit8253, BIT(data, 0));
896		pc_speaker_set_spkrdata( space.machine(), data & 0x02 );
897		pc_keyb_set_clock( st->m_ppi_keyb_clock );
	877	m_ppi_portb = data;
	878	m_ppi_portc_switch_high = data & 0x08;
	879	m_ppi_keyboard_clear = data & 0x80;
	880	m_ppi_keyb_clock = data & 0x40;
	881	pit8253_gate2_w(m_pit8253, BIT(data, 0));
	882	pc_speaker_set_spkrdata( machine(), data & 0x02 );
	883	pc_keyb_set_clock( m_ppi_keyb_clock );
898	884
899		if ( st->m_ppi_keyboard_clear )
	885	if ( m_ppi_keyboard_clear )
900	886	pc_keyb_clear();
901	887	}
902	888
903	889
904	890	I8255_INTERFACE( pc_ppi8255_interface )
905	891	{
906		DEVCB_HANDLER(pc_ppi_porta_r),
	892	DEVCB_DRIVER_MEMBER(pc_state,pc_ppi_porta_r),
907	893	DEVCB_NULL,
908	894	DEVCB_NULL,
909		DEVCB_HANDLER(pc_ppi_portb_w),
910		DEVCB_HANDLER(ibm5160_ppi_portc_r),
	895	DEVCB_DRIVER_MEMBER(pc_state,pc_ppi_portb_w),
	896	DEVCB_DRIVER_MEMBER(pc_state,ibm5160_ppi_portc_r),
911	897	DEVCB_NULL
912	898	};
913	899
r18257	r18258
958	944	}
959	945	}
960	946
961		static READ8_DEVICE_HANDLER ( mc1502_ppi_porta_r )
	947	READ8_MEMBER(pc_state::mc1502_ppi_porta_r)
962	948	{
963		running_machine &machine = space.machine();
964
965		DBG_LOG(1,"mc1502_ppi_porta_r",("= %02X\n", mc1502_keyb.latch));
	949	//   DBG_LOG(1,"mc1502_ppi_porta_r",("= %02X\n", mc1502_keyb.latch));
966	950	return mc1502_keyb.latch;
967	951	}
968	952
969		static WRITE8_DEVICE_HANDLER ( mc1502_ppi_porta_w )
	953	WRITE8_MEMBER(pc_state::mc1502_ppi_porta_w)
970	954	{
971		pc_state *st = space.machine().driver_data<pc_state>();
972		running_machine &machine = space.machine();
973
974		DBG_LOG(1,"mc1502_ppi_porta_w",("( %02X )\n", data));
	955	//   DBG_LOG(1,"mc1502_ppi_porta_w",("( %02X )\n", data));
975	956	mc1502_keyb.latch = data;
976	957	if (mc1502_keyb.pulsing)
977	958	mc1502_keyb.pulsing--;
978		pic8259_ir1_w(st->m_pic8259, 0);
	959	pic8259_ir1_w(m_pic8259, 0);
979	960	}
980	961
981		static WRITE8_DEVICE_HANDLER ( mc1502_ppi_portb_w )
	962	WRITE8_MEMBER(pc_state::mc1502_ppi_portb_w)
982	963	{
983		pc_state *st = space.machine().driver_data<pc_state>();
984		running_machine &machine = space.machine();
985
986		DBG_LOG(2,"mc1502_ppi_portb_w",("( %02X )\n", data));
987		st->m_ppi_portb = data;
988		pit8253_gate2_w(space.machine().device("pit8253"), BIT(data, 0));
989		pc_speaker_set_spkrdata( space.machine(), data & 0x02 );
	964	//   DBG_LOG(2,"mc1502_ppi_portb_w",("( %02X )\n", data));
	965	m_ppi_portb = data;
	966	pit8253_gate2_w(machine().device("pit8253"), BIT(data, 0));
	967	pc_speaker_set_spkrdata( machine(), data & 0x02 );
990	968	}
991	969
992		static READ8_DEVICE_HANDLER ( mc1502_ppi_portc_r )
	970	READ8_MEMBER(pc_state::mc1502_ppi_portc_r)
993	971	{
994		running_machine &machine = space.machine();
995		pc_state *st = space.machine().driver_data<pc_state>();
996		int timer2_output = pit8253_get_output( space.machine().device("pit8253"), 2 );
	972	int timer2_output = pit8253_get_output( machine().device("pit8253"), 2 );
997	973	int data = 0xff;
998		double tap_val = (space.machine().device<cassette_image_device>(CASSETTE_TAG)->input());
	974	double tap_val = (machine().device<cassette_image_device>(CASSETTE_TAG)->input());
999	975
1000	976	//  0x80 -- serial RxD
1001	977	//  0x40 -- CASS IN, also loops back T2OUT (gated by CASWR)
1002		data = ( data & ~0x40 ) | ( tap_val < 0 ? 0x40 : 0x00 ) | ( (BIT(st->m_ppi_portb, 7) && timer2_output) ? 0x40 : 0x00 );
	978	data = ( data & ~0x40 ) | ( tap_val < 0 ? 0x40 : 0x00 ) | ( (BIT(m_ppi_portb, 7) && timer2_output) ? 0x40 : 0x00 );
1003	979	//  0x20 -- T2OUT
1004	980	data = ( data & ~0x20 ) | ( timer2_output ? 0x20 : 0x00 );
1005	981	//  0x10 -- SNDOUT
1006		data = ( data & ~0x10 ) | ( (BIT(st->m_ppi_portb, 1) && timer2_output) ? 0x10 : 0x00 );
	982	data = ( data & ~0x10 ) | ( (BIT(m_ppi_portb, 1) && timer2_output) ? 0x10 : 0x00 );
1007	983
1008		DBG_LOG(2,"mc1502_ppi_portc_r",("= %02X (tap_val %f t2out %d) at %s\n",
1009		data, tap_val, timer2_output, machine.describe_context()));
	984	//   DBG_LOG(2,"mc1502_ppi_portc_r",("= %02X (tap_val %f t2out %d) at %s\n",
	985	//      data, tap_val, timer2_output, machine().describe_context()));
1010	986	return data;
1011	987	}
1012	988
1013		static READ8_DEVICE_HANDLER ( mc1502_kppi_porta_r )
	989	READ8_MEMBER(pc_state::mc1502_kppi_porta_r)
1014	990	{
1015		running_machine &machine = space.machine();
1016	991	UINT8 key = 0;
1017	992
1018		if (mc1502_keyb.mask & 0x0001) { key |= machine.root_device().ioport("Y1")->read(); }
1019		if (mc1502_keyb.mask & 0x0002) { key |= machine.root_device().ioport("Y2")->read(); }
1020		if (mc1502_keyb.mask & 0x0004) { key |= machine.root_device().ioport("Y3")->read(); }
1021		if (mc1502_keyb.mask & 0x0008) { key |= machine.root_device().ioport("Y4")->read(); }
1022		if (mc1502_keyb.mask & 0x0010) { key |= machine.root_device().ioport("Y5")->read(); }
1023		if (mc1502_keyb.mask & 0x0020) { key |= machine.root_device().ioport("Y6")->read(); }
1024		if (mc1502_keyb.mask & 0x0040) { key |= machine.root_device().ioport("Y7")->read(); }
1025		if (mc1502_keyb.mask & 0x0080) { key |= machine.root_device().ioport("Y8")->read(); }
1026		if (mc1502_keyb.mask & 0x0100) { key |= machine.root_device().ioport("Y9")->read(); }
1027		if (mc1502_keyb.mask & 0x0200) { key |= machine.root_device().ioport("Y10")->read(); }
1028		if (mc1502_keyb.mask & 0x0400) { key |= machine.root_device().ioport("Y11")->read(); }
1029		if (mc1502_keyb.mask & 0x0800) { key |= machine.root_device().ioport("Y12")->read(); }
	993	if (mc1502_keyb.mask & 0x0001) { key |= machine().root_device().ioport("Y1")->read(); }
	994	if (mc1502_keyb.mask & 0x0002) { key |= machine().root_device().ioport("Y2")->read(); }
	995	if (mc1502_keyb.mask & 0x0004) { key |= machine().root_device().ioport("Y3")->read(); }
	996	if (mc1502_keyb.mask & 0x0008) { key |= machine().root_device().ioport("Y4")->read(); }
	997	if (mc1502_keyb.mask & 0x0010) { key |= machine().root_device().ioport("Y5")->read(); }
	998	if (mc1502_keyb.mask & 0x0020) { key |= machine().root_device().ioport("Y6")->read(); }
	999	if (mc1502_keyb.mask & 0x0040) { key |= machine().root_device().ioport("Y7")->read(); }
	1000	if (mc1502_keyb.mask & 0x0080) { key |= machine().root_device().ioport("Y8")->read(); }
	1001	if (mc1502_keyb.mask & 0x0100) { key |= machine().root_device().ioport("Y9")->read(); }
	1002	if (mc1502_keyb.mask & 0x0200) { key |= machine().root_device().ioport("Y10")->read(); }
	1003	if (mc1502_keyb.mask & 0x0400) { key |= machine().root_device().ioport("Y11")->read(); }
	1004	if (mc1502_keyb.mask & 0x0800) { key |= machine().root_device().ioport("Y12")->read(); }
1030	1005	key ^= 0xff;
1031		DBG_LOG(2,"mc1502_kppi_porta_r",("= %02X\n", key));
	1006	//   DBG_LOG(2,"mc1502_kppi_porta_r",("= %02X\n", key));
1032	1007	return key;
1033	1008	}
1034	1009
1035		static WRITE8_DEVICE_HANDLER ( mc1502_kppi_portb_w )
	1010	WRITE8_MEMBER(pc_state::mc1502_kppi_portb_w)
1036	1011	{
1037		running_machine &machine = space.machine();
1038
1039	1012	mc1502_keyb.mask &= ~255;
1040	1013	mc1502_keyb.mask |= data ^ 255;
1041	1014	if (!BIT(data, 0))
1042	1015	mc1502_keyb.mask |= 1 << 11;
1043	1016	else
1044	1017	mc1502_keyb.mask &= ~(1 << 11);
1045		DBG_LOG(2,"mc1502_kppi_portb_w",("( %02X -> %04X )\n", data, mc1502_keyb.mask));
	1018	//   DBG_LOG(2,"mc1502_kppi_portb_w",("( %02X -> %04X )\n", data, mc1502_keyb.mask));
1046	1019	}
1047	1020
1048		static WRITE8_DEVICE_HANDLER ( mc1502_kppi_portc_w )
	1021	WRITE8_MEMBER(pc_state::mc1502_kppi_portc_w)
1049	1022	{
1050		running_machine &machine = space.machine();
1051
1052	1023	mc1502_keyb.mask &= ~(7 << 8);
1053	1024	mc1502_keyb.mask |= ((data ^ 7) & 7) << 8;
1054		DBG_LOG(2,"mc1502_kppi_portc_w",("( %02X -> %04X )\n", data, mc1502_keyb.mask));
	1025	//   DBG_LOG(2,"mc1502_kppi_portc_w",("( %02X -> %04X )\n", data, mc1502_keyb.mask));
1055	1026	}
1056	1027
1057	1028
1058		static WRITE8_DEVICE_HANDLER ( pcjr_ppi_portb_w )
	1029	WRITE8_MEMBER(pc_state::pcjr_ppi_portb_w)
1059	1030	{
1060		pc_state *st = space.machine().driver_data<pc_state>();
1061	1031	/* KB controller port B */
1062		st->m_ppi_portb = data;
1063		st->m_ppi_portc_switch_high = data & 0x08;
1064		pit8253_gate2_w(space.machine().device("pit8253"), BIT(data, 0));
1065		pc_speaker_set_spkrdata( space.machine(), data & 0x02 );
	1032	m_ppi_portb = data;
	1033	m_ppi_portc_switch_high = data & 0x08;
	1034	pit8253_gate2_w(machine().device("pit8253"), BIT(data, 0));
	1035	pc_speaker_set_spkrdata( machine(), data & 0x02 );
1066	1036
1067		space.machine().device<cassette_image_device>(CASSETTE_TAG)->change_state(( data & 0x08 ) ? CASSETTE_MOTOR_DISABLED : CASSETTE_MOTOR_ENABLED,CASSETTE_MASK_MOTOR);
	1037	machine().device<cassette_image_device>(CASSETTE_TAG)->change_state(( data & 0x08 ) ? CASSETTE_MOTOR_DISABLED : CASSETTE_MOTOR_ENABLED,CASSETTE_MASK_MOTOR);
1068	1038	}
1069	1039
1070	1040
1071	1041	/*
1072	1042	* On a PCJR none of the port A bits are connected.
1073	1043	*/
1074		static READ8_DEVICE_HANDLER (pcjr_ppi_porta_r )
	1044	READ8_MEMBER(pc_state::pcjr_ppi_porta_r)
1075	1045	{
1076	1046	int data;
1077		running_machine &machine = space.machine();
1078	1047
1079	1048	data = 0xff;
1080	1049	PIO_LOG(1,"PIO_A_r",("$%02x\n", data));
r18257	r18258
1093	1062	* PC6 - KYBD IN
1094	1063	* PC7 - (keyboard) CABLE CONNECTED
1095	1064	*/
1096		static READ8_DEVICE_HANDLER ( pcjr_ppi_portc_r )
	1065	READ8_MEMBER(pc_state::pcjr_ppi_portc_r)
1097	1066	{
1098		pc_state *st = space.machine().driver_data<pc_state>();
1099		int timer2_output = pit8253_get_output( space.machine().device("pit8253"), 2 );
	1067	int timer2_output = pit8253_get_output( machine().device("pit8253"), 2 );
1100	1068	int data=0xff;
1101	1069
1102	1070	data&=~0x80;
1103	1071	data &= ~0x04;      /* floppy drive installed */
1104		if ( space.machine().device<ram_device>(RAM_TAG)->size() > 64 * 1024 )   /* more than 64KB ram installed */
	1072	if ( machine().device<ram_device>(RAM_TAG)->size() > 64 * 1024 )   /* more than 64KB ram installed */
1105	1073	data &= ~0x08;
1106	1074	data = ( data & ~0x01 ) | ( pcjr_keyb.latch ? 0x01: 0x00 );
1107		if ( ! ( st->m_ppi_portb & 0x08 ) )
	1075	if ( ! ( m_ppi_portb & 0x08 ) )
1108	1076	{
1109		double tap_val = (space.machine().device<cassette_image_device>(CASSETTE_TAG)->input());
	1077	double tap_val = (machine().device<cassette_image_device>(CASSETTE_TAG)->input());
1110	1078
1111	1079	if ( tap_val < 0 )
1112	1080	{
r18257	r18258
1119	1087	}
1120	1088	else
1121	1089	{
1122		if ( st->m_ppi_portb & 0x01 )
	1090	if ( m_ppi_portb & 0x01 )
1123	1091	{
1124	1092	data = ( data & ~0x10 ) | ( timer2_output ? 0x10 : 0x00 );
1125	1093	}
r18257	r18258
1133	1101
1134	1102	I8255_INTERFACE( pcjr_ppi8255_interface )
1135	1103	{
1136		DEVCB_HANDLER(pcjr_ppi_porta_r),
	1104	DEVCB_DRIVER_MEMBER(pc_state,pcjr_ppi_porta_r),
1137	1105	DEVCB_NULL,
1138	1106	DEVCB_NULL,
1139		DEVCB_HANDLER(pcjr_ppi_portb_w),
1140		DEVCB_HANDLER(pcjr_ppi_portc_r),
	1107	DEVCB_DRIVER_MEMBER(pc_state,pcjr_ppi_portb_w),
	1108	DEVCB_DRIVER_MEMBER(pc_state,pcjr_ppi_portc_r),
1141	1109	DEVCB_NULL
1142	1110	};
1143	1111
1144	1112	I8255_INTERFACE( mc1502_ppi8255_interface )
1145	1113	{
1146		DEVCB_HANDLER(mc1502_ppi_porta_r),
1147		DEVCB_HANDLER(mc1502_ppi_porta_w),
	1114	DEVCB_DRIVER_MEMBER(pc_state,mc1502_ppi_porta_r),
	1115	DEVCB_DRIVER_MEMBER(pc_state,mc1502_ppi_porta_w),
1148	1116	DEVCB_NULL,
1149		DEVCB_HANDLER(mc1502_ppi_portb_w),
1150		DEVCB_HANDLER(mc1502_ppi_portc_r),
	1117	DEVCB_DRIVER_MEMBER(pc_state,mc1502_ppi_portb_w),
	1118	DEVCB_DRIVER_MEMBER(pc_state,mc1502_ppi_portc_r),
1151	1119	DEVCB_NULL
1152	1120	};
1153	1121
1154	1122	I8255_INTERFACE( mc1502_ppi8255_interface_2 )
1155	1123	{
1156		DEVCB_HANDLER(mc1502_kppi_porta_r),
	1124	DEVCB_DRIVER_MEMBER(pc_state,mc1502_kppi_porta_r),
1157	1125	DEVCB_NULL,
1158	1126	DEVCB_NULL,
1159		DEVCB_HANDLER(mc1502_kppi_portb_w),
	1127	DEVCB_DRIVER_MEMBER(pc_state,mc1502_kppi_portb_w),
1160	1128	DEVCB_NULL,
1161		DEVCB_HANDLER(mc1502_kppi_portc_w)
	1129	DEVCB_DRIVER_MEMBER(pc_state,mc1502_kppi_portc_w)
1162	1130	};
1163	1131
1164	1132
r18257	r18258
1232	1200	* MC1502 uses a FD1793 clone instead of uPD765
1233	1201	*/
1234	1202
1235		READ8_DEVICE_HANDLER( mc1502_wd17xx_aux_r )
	1203	READ8_MEMBER(pc_state::mc1502_wd17xx_aux_r)
1236	1204	{
1237	1205	UINT8 data;
1238	1206
r18257	r18258
1241	1209	return data;
1242	1210	}
1243	1211
1244		WRITE8_DEVICE_HANDLER( mc1502_wd17xx_aux_w )
	1212	WRITE8_MEMBER(pc_state::mc1502_wd17xx_aux_w)
1245	1213	{
1246	1214	// master reset
1247		wd17xx_mr_w(device, BIT(data, 0));
	1215	wd17xx_mr_w(machine().device("vg93"), BIT(data, 0));
1248	1216
1249	1217	// SIDE ONE
1250		wd17xx_set_side(device, BIT(data, 1));
	1218	wd17xx_set_side(machine().device("vg93"), BIT(data, 1));
1251	1219
1252	1220	// bits 2, 3 -- motor on (drive 0, 1)
1253	1221
1254	1222	// DRIVE SEL
1255		wd17xx_set_drive(device, BIT(data, 4));
	1223	wd17xx_set_drive(machine().device("vg93"), BIT(data, 4));
1256	1224	}
1257	1225
1258	1226	/*
1259	1227	* Accesses to this port block (halt the CPU until DRQ, INTRQ or MOTOR ON)
1260	1228	*/
1261		READ8_DEVICE_HANDLER( mc1502_wd17xx_drq_r )
	1229	READ8_MEMBER(pc_state::mc1502_wd17xx_drq_r)
1262	1230	{
1263	1231	UINT8 data;
1264	1232	UINT64 newpc;
1265	1233
1266		data = wd17xx_drq_r(device);
1267		if (!data && !wd17xx_intrq_r(device)) {
	1234	data = wd17xx_drq_r(machine().device("vg93"));
	1235	if (!data && !wd17xx_intrq_r(machine().device("vg93"))) {
1268	1236	/* fake cpu halt by resetting PC one insn back */
1269		newpc = space.machine().firstcpu->pc();
1270		space.machine().firstcpu->set_pc( newpc - 1 );
	1237	newpc = machine().firstcpu->pc();
	1238	machine().firstcpu->set_pc( newpc - 1 );
1271	1239	}
1272	1240
1273	1241	return data;
1274	1242	}
1275	1243
1276		READ8_DEVICE_HANDLER( mc1502_wd17xx_motor_r )
	1244	READ8_MEMBER(pc_state::mc1502_wd17xx_motor_r)
1277	1245	{
1278	1246	UINT8 data;
1279	1247

trunk/src/mess/machine/mc80.c

r18257	r18258
31	31	{
32	32	}
33	33
34		static WRITE_LINE_DEVICE_HANDLER( ctc_z2_w )
	34	WRITE_LINE_MEMBER(mc80_state::ctc_z2_w)
35	35	{
36		downcast<z80ctc_device *>(device)->trg0(state);
37		downcast<z80ctc_device *>(device)->trg1(state);
	36	downcast<z80ctc_device *>(machine().device("z80ctc"))->trg0(state);
	37	downcast<z80ctc_device *>(machine().device("z80ctc"))->trg1(state);
38	38	}
39	39
40	40	Z80CTC_INTERFACE( mc8020_ctc_intf )
r18257	r18258
42	42	DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0),
43	43	DEVCB_DRIVER_LINE_MEMBER(mc80_state, ctc_z0_w),
44	44	DEVCB_DRIVER_LINE_MEMBER(mc80_state, ctc_z1_w),
45		DEVCB_LINE(ctc_z2_w)
	45	DEVCB_DRIVER_LINE_MEMBER(mc80_state,ctc_z2_w)
46	46	};
47	47
48	48

trunk/src/mess/machine/c65.c

r18257	r18258
70	70	*  see machine/cbm.c
71	71	*/
72	72
73		static READ8_DEVICE_HANDLER( c65_cia0_port_a_r )
	73	READ8_MEMBER(c65_state::c65_cia0_port_a_r)
74	74	{
75		UINT8 cia0portb = mos6526_pb_r(space.machine().device("cia_0"), space, 0);
	75	UINT8 cia0portb = mos6526_pb_r(machine().device("cia_0"), space, 0);
76	76
77		return cbm_common_cia0_port_a_r(device, cia0portb);
	77	return cbm_common_cia0_port_a_r(machine().device("cia_0"), cia0portb);
78	78	}
79	79
80		static READ8_DEVICE_HANDLER( c65_cia0_port_b_r )
	80	READ8_MEMBER(c65_state::c65_cia0_port_b_r)
81	81	{
82		c65_state *state = space.machine().driver_data<c65_state>();
83	82	UINT8 value = 0xff;
84		UINT8 cia0porta = mos6526_pa_r(space.machine().device("cia_0"), space, 0);
	83	UINT8 cia0porta = mos6526_pa_r(machine().device("cia_0"), space, 0);
85	84
86		value &= cbm_common_cia0_port_b_r(device, cia0porta);
	85	value &= cbm_common_cia0_port_b_r(machine().device("cia_0"), cia0porta);
87	86
88		if (!(state->m_6511_port & 0x02))
89		value &= state->m_keyline;
	87	if (!(m_6511_port & 0x02))
	88	value &= m_keyline;
90	89
91	90	return value;
92	91	}
93	92
94		static WRITE8_DEVICE_HANDLER( c65_cia0_port_b_w )
	93	WRITE8_MEMBER(c65_state::c65_cia0_port_b_w)
95	94	{
96	95	//  was there lightpen support in c65 video chip?
97		//  device_t *vic3 = space.machine().device("vic3");
	96	//  device_t *vic3 = machine().device("vic3");
98	97	//  vic3_lightpen_write(vic3, data & 0x10);
99	98	}
100	99
r18257	r18258
136	135	DEVCB_NULL,   /* pc_func */
137	136	DEVCB_NULL,
138	137	DEVCB_NULL,
139		DEVCB_HANDLER(c65_cia0_port_a_r),
	138	DEVCB_DRIVER_MEMBER(c65_state,c65_cia0_port_a_r),
140	139	DEVCB_NULL,
141		DEVCB_HANDLER(c65_cia0_port_b_r),
142		DEVCB_HANDLER(c65_cia0_port_b_w)
	140	DEVCB_DRIVER_MEMBER(c65_state,c65_cia0_port_b_r),
	141	DEVCB_DRIVER_MEMBER(c65_state,c65_cia0_port_b_w)
143	142	};
144	143
145	144	/*
r18257	r18258
165	164	* flag restore key or rs232 received data input
166	165	* irq to nmi connected ?
167	166	*/
168		static READ8_DEVICE_HANDLER( c65_cia1_port_a_r )
	167	READ8_MEMBER(c65_state::c65_cia1_port_a_r)
169	168	{
170		c65_state *state = space.machine().driver_data<c65_state>();
171	169	UINT8 value = 0xff;
172	170
173		if (!state->m_iec->clk_r())
	171	if (!m_iec->clk_r())
174	172	value &= ~0x40;
175	173
176		if (!state->m_iec->data_r())
	174	if (!m_iec->data_r())
177	175	value &= ~0x80;
178	176
179	177	return value;
180	178	}
181	179
182		static WRITE8_DEVICE_HANDLER( c65_cia1_port_a_w )
	180	WRITE8_MEMBER(c65_state::c65_cia1_port_a_w)
183	181	{
184		c65_state *state = space.machine().driver_data<c65_state>();
185	182	static const int helper[4] = {0xc000, 0x8000, 0x4000, 0x0000};
186	183
187		state->m_iec->atn_w(!BIT(data, 3));
188		state->m_iec->clk_w(!BIT(data, 4));
189		state->m_iec->data_w(!BIT(data, 5));
	184	m_iec->atn_w(!BIT(data, 3));
	185	m_iec->clk_w(!BIT(data, 4));
	186	m_iec->data_w(!BIT(data, 5));
190	187
191		state->m_vicaddr = state->m_memory + helper[data & 0x03];
	188	m_vicaddr = m_memory + helper[data & 0x03];
192	189	}
193	190
194		static WRITE_LINE_DEVICE_HANDLER( c65_cia1_interrupt )
	191	WRITE_LINE_MEMBER(c65_state::c65_cia1_interrupt)
195	192	{
196		c65_nmi(device->machine());
	193	c65_nmi(machine());
197	194	}
198	195
199	196	const mos6526_interface c65_cia1 =
200	197	{
201		DEVCB_LINE(c65_cia1_interrupt),
	198	DEVCB_DRIVER_LINE_MEMBER(c65_state,c65_cia1_interrupt),
202	199	DEVCB_NULL,   /* pc_func */
203	200	DEVCB_NULL,
204	201	DEVCB_NULL,
205		DEVCB_HANDLER(c65_cia1_port_a_r),
206		DEVCB_HANDLER(c65_cia1_port_a_w),
	202	DEVCB_DRIVER_MEMBER(c65_state,c65_cia1_port_a_r),
	203	DEVCB_DRIVER_MEMBER(c65_state,c65_cia1_port_a_w),
207	204	DEVCB_NULL,
208	205	DEVCB_NULL
209	206	};

trunk/src/mess/machine/amstrad.c

r18257	r18258
215	215	}
216	216
217	217
218		WRITE_LINE_DEVICE_HANDLER( aleste_interrupt )
	218	WRITE_LINE_MEMBER(amstrad_state::aleste_interrupt)
219	219	{
220		amstrad_state *drvstate = device->machine().driver_data<amstrad_state>();
221	220	if(state == CLEAR_LINE)
222		drvstate->m_aleste_fdc_int = 0;
	221	m_aleste_fdc_int = 0;
223	222	else
224		drvstate->m_aleste_fdc_int = 1;
	223	m_aleste_fdc_int = 1;
225	224	}
226	225
227	226
r18257	r18258
827	826	}
828	827
829	828
830		static WRITE_LINE_DEVICE_HANDLER( amstrad_hsync_changed )
	829	WRITE_LINE_MEMBER(amstrad_state::amstrad_hsync_changed)
831	830	{
832		amstrad_state *drvstate = device->machine().driver_data<amstrad_state>();
833		amstrad_update_video(device->machine());
	831	amstrad_update_video(machine());
834	832
835	833	/* The gate array reacts to de-assertion of the hsycnc 6845 line */
836		if ( drvstate->m_gate_array.hsync && !state )
	834	if ( m_gate_array.hsync && !state )
837	835	{
838		drvstate->m_gate_array.hsync_counter++;
	836	m_gate_array.hsync_counter++;
839	837	/* Advance to next drawing line */
840		drvstate->m_gate_array.y++;
841		drvstate->m_gate_array.line_ticks = 0;
842		if ( drvstate->m_gate_array.y >= 0 && drvstate->m_gate_array.y < drvstate->m_gate_array.bitmap->height() )
	838	m_gate_array.y++;
	839	m_gate_array.line_ticks = 0;
	840	if ( m_gate_array.y >= 0 && m_gate_array.y < m_gate_array.bitmap->height() )
843	841	{
844		drvstate->m_gate_array.draw_p = &drvstate->m_gate_array.bitmap->pix16(drvstate->m_gate_array.y);
	842	m_gate_array.draw_p = &m_gate_array.bitmap->pix16(m_gate_array.y);
845	843	}
846	844	else
847	845	{
848		drvstate->m_gate_array.draw_p = NULL;
	846	m_gate_array.draw_p = NULL;
849	847	}
850	848
851		if ( drvstate->m_gate_array.hsync_after_vsync_counter != 0 )  // counters still operate regardless of PRI state
	849	if ( m_gate_array.hsync_after_vsync_counter != 0 )  // counters still operate regardless of PRI state
852	850	{
853		drvstate->m_gate_array.hsync_after_vsync_counter--;
	851	m_gate_array.hsync_after_vsync_counter--;
854	852
855		if (drvstate->m_gate_array.hsync_after_vsync_counter == 0)
	853	if (m_gate_array.hsync_after_vsync_counter == 0)
856	854	{
857		if (drvstate->m_gate_array.hsync_counter >= 32)
	855	if (m_gate_array.hsync_counter >= 32)
858	856	{
859		device->machine().device("maincpu")->execute().set_input_line(0, ASSERT_LINE);
	857	machine().device("maincpu")->execute().set_input_line(0, ASSERT_LINE);
860	858	}
861		drvstate->m_gate_array.hsync_counter = 0;
	859	m_gate_array.hsync_counter = 0;
862	860	}
863	861	}
864	862
865		if ( drvstate->m_gate_array.hsync_counter >= 52 )
	863	if ( m_gate_array.hsync_counter >= 52 )
866	864	{
867		drvstate->m_gate_array.hsync_counter = 0;
868		device->machine().device("maincpu")->execute().set_input_line(0, ASSERT_LINE);
	865	m_gate_array.hsync_counter = 0;
	866	machine().device("maincpu")->execute().set_input_line(0, ASSERT_LINE);
869	867	}
870	868	}
871		drvstate->m_gate_array.hsync = state ? 1 : 0;
	869	m_gate_array.hsync = state ? 1 : 0;
872	870	}
873	871
874	872
875		static WRITE_LINE_DEVICE_HANDLER( amstrad_plus_hsync_changed )
	873	WRITE_LINE_MEMBER(amstrad_state::amstrad_plus_hsync_changed)
876	874	{
877		amstrad_state *drvstate = device->machine().driver_data<amstrad_state>();
878		amstrad_plus_update_video(device->machine());
	875	amstrad_plus_update_video(machine());
879	876
880		if ( drvstate->m_gate_array.hsync && !state )
	877	if ( m_gate_array.hsync && !state )
881	878	{
882		drvstate->m_gate_array.hsync_counter++;
	879	m_gate_array.hsync_counter++;
883	880	/* Advance to next drawing line */
884		drvstate->m_gate_array.y++;
885		drvstate->m_gate_array.line_ticks = 0;
886		if ( drvstate->m_gate_array.y >= 0 && drvstate->m_gate_array.y < drvstate->m_gate_array.bitmap->height() )
	881	m_gate_array.y++;
	882	m_gate_array.line_ticks = 0;
	883	if ( m_gate_array.y >= 0 && m_gate_array.y < m_gate_array.bitmap->height() )
887	884	{
888		drvstate->m_gate_array.draw_p = &drvstate->m_gate_array.bitmap->pix16(drvstate->m_gate_array.y);
	885	m_gate_array.draw_p = &m_gate_array.bitmap->pix16(m_gate_array.y);
889	886	}
890	887	else
891	888	{
892		drvstate->m_gate_array.draw_p = NULL;
	889	m_gate_array.draw_p = NULL;
893	890	}
894	891
895		if ( drvstate->m_gate_array.hsync_after_vsync_counter != 0 )  // counters still operate regardless of PRI state
	892	if ( m_gate_array.hsync_after_vsync_counter != 0 )  // counters still operate regardless of PRI state
896	893	{
897		drvstate->m_gate_array.hsync_after_vsync_counter--;
	894	m_gate_array.hsync_after_vsync_counter--;
898	895
899		if (drvstate->m_gate_array.hsync_after_vsync_counter == 0)
	896	if (m_gate_array.hsync_after_vsync_counter == 0)
900	897	{
901		if (drvstate->m_gate_array.hsync_counter >= 32)
	898	if (m_gate_array.hsync_counter >= 32)
902	899	{
903		if( drvstate->m_asic.pri == 0 || drvstate->m_asic.enabled == 0)
	900	if( m_asic.pri == 0 || m_asic.enabled == 0)
904	901	{
905		device->machine().device("maincpu")->execute().set_input_line(0, ASSERT_LINE);
	902	machine().device("maincpu")->execute().set_input_line(0, ASSERT_LINE);
906	903	}
907	904	}
908		drvstate->m_gate_array.hsync_counter = 0;
	905	m_gate_array.hsync_counter = 0;
909	906	}
910	907	}
911	908
912		if ( drvstate->m_gate_array.hsync_counter >= 52 )
	909	if ( m_gate_array.hsync_counter >= 52 )
913	910	{
914		drvstate->m_gate_array.hsync_counter = 0;
915		if ( drvstate->m_asic.pri == 0 || drvstate->m_asic.enabled == 0 )
	911	m_gate_array.hsync_counter = 0;
	912	if ( m_asic.pri == 0 || m_asic.enabled == 0 )
916	913	{
917		device->machine().device("maincpu")->execute().set_input_line(0, ASSERT_LINE);
	914	machine().device("maincpu")->execute().set_input_line(0, ASSERT_LINE);
918	915	}
919	916	}
920	917
921		if ( drvstate->m_asic.enabled )
	918	if ( m_asic.enabled )
922	919	{
923	920	// CPC+/GX4000 Programmable Raster Interrupt (disabled if &6800 in ASIC RAM is 0)
924		if ( drvstate->m_asic.pri != 0 )
	921	if ( m_asic.pri != 0 )
925	922	{
926		if ( drvstate->m_asic.pri == drvstate->m_asic.vpos - 1 )
	923	if ( m_asic.pri == m_asic.vpos - 1 )
927	924	{
928		logerror("PRI: triggered, scanline %d\n",drvstate->m_asic.pri);
929		device->machine().device("maincpu")->execute().set_input_line(0, ASSERT_LINE);
930		drvstate->m_plus_irq_cause = 0x06;  // raster interrupt vector
931		drvstate->m_gate_array.hsync_counter &= ~0x20;  // ASIC PRI resets the MSB of the raster counter
	925	logerror("PRI: triggered, scanline %d\n",m_asic.pri);
	926	machine().device("maincpu")->execute().set_input_line(0, ASSERT_LINE);
	927	m_plus_irq_cause = 0x06;  // raster interrupt vector
	928	m_gate_array.hsync_counter &= ~0x20;  // ASIC PRI resets the MSB of the raster counter
932	929	}
933	930	}
934	931	// CPC+/GX4000 Split screen registers  (disabled if &6801 in ASIC RAM is 0)
935		if(drvstate->m_asic.ram[0x2801] != 0)
	932	if(m_asic.ram[0x2801] != 0)
936	933	{
937		if ( drvstate->m_asic.ram[0x2801] == drvstate->m_asic.vpos - 1 )   // split occurs here (hopefully)
	934	if ( m_asic.ram[0x2801] == m_asic.vpos - 1 )   // split occurs here (hopefully)
938	935	{
939		logerror("SSCR: Split screen occurred at scanline %d\n",drvstate->m_asic.ram[0x2801]);
	936	logerror("SSCR: Split screen occurred at scanline %d\n",m_asic.ram[0x2801]);
940	937	}
941	938	}
942	939	// CPC+/GX4000 DMA channels
943		amstrad_plus_handle_dma(device->machine());  // a DMA command is handled at the leading edge of HSYNC (every 64us)
944		if(drvstate->m_asic.de_start != 0)
945		drvstate->m_asic.vpos++;
	940	amstrad_plus_handle_dma(machine());  // a DMA command is handled at the leading edge of HSYNC (every 64us)
	941	if(m_asic.de_start != 0)
	942	m_asic.vpos++;
946	943	}
947	944	}
948		drvstate->m_gate_array.hsync = state ? 1 : 0;
	945	m_gate_array.hsync = state ? 1 : 0;
949	946	}
950	947
951	948
952		static WRITE_LINE_DEVICE_HANDLER( amstrad_vsync_changed )
	949	WRITE_LINE_MEMBER(amstrad_state::amstrad_vsync_changed)
953	950	{
954		amstrad_state *drvstate = device->machine().driver_data<amstrad_state>();
955		amstrad_update_video(device->machine());
	951	amstrad_update_video(machine());
956	952
957		if ( ! drvstate->m_gate_array.vsync && state )
	953	if ( ! m_gate_array.vsync && state )
958	954	{
959	955	/* Reset the amstrad_CRTC_HS_After_VS_Counter */
960		drvstate->m_gate_array.hsync_after_vsync_counter = 3;
	956	m_gate_array.hsync_after_vsync_counter = 3;
961	957
962	958	/* Start of new frame */
963		drvstate->m_gate_array.y = -1;
964		drvstate->m_asic.vpos = 1;
965		drvstate->m_asic.de_start = 0;
	959	m_gate_array.y = -1;
	960	m_asic.vpos = 1;
	961	m_asic.de_start = 0;
966	962	}
967	963
968		drvstate->m_gate_array.vsync = state ? 1 : 0;
	964	m_gate_array.vsync = state ? 1 : 0;
969	965
970	966	/* Schedule a write to PC2 */
971		device->machine().scheduler().timer_set( attotime::zero, timer_expired_delegate(FUNC(amstrad_state::amstrad_pc2_low),drvstate));
	967	machine().scheduler().timer_set( attotime::zero, timer_expired_delegate(FUNC(amstrad_state::amstrad_pc2_low),this));
972	968	}
973	969
974	970
975		static WRITE_LINE_DEVICE_HANDLER( amstrad_plus_vsync_changed )
	971	WRITE_LINE_MEMBER(amstrad_state::amstrad_plus_vsync_changed)
976	972	{
977		amstrad_state *drvstate = device->machine().driver_data<amstrad_state>();
978		amstrad_plus_update_video(device->machine());
	973	amstrad_plus_update_video(machine());
979	974
980		if ( ! drvstate->m_gate_array.vsync && state )
	975	if ( ! m_gate_array.vsync && state )
981	976	{
982	977	/* Reset the amstrad_CRTC_HS_After_VS_Counter */
983		drvstate->m_gate_array.hsync_after_vsync_counter = 3;
	978	m_gate_array.hsync_after_vsync_counter = 3;
984	979
985	980	/* Start of new frame */
986		drvstate->m_gate_array.y = -1;
987		drvstate->m_asic.vpos = 1;
988		drvstate->m_asic.de_start = 0;
	981	m_gate_array.y = -1;
	982	m_asic.vpos = 1;
	983	m_asic.de_start = 0;
989	984	}
990	985
991		drvstate->m_gate_array.vsync = state ? 1 : 0;
	986	m_gate_array.vsync = state ? 1 : 0;
992	987
993	988	/* Schedule a write to PC2 */
994		device->machine().scheduler().timer_set( attotime::zero, timer_expired_delegate(FUNC(amstrad_state::amstrad_pc2_low),drvstate));
	989	machine().scheduler().timer_set( attotime::zero, timer_expired_delegate(FUNC(amstrad_state::amstrad_pc2_low),this));
995	990	}
996	991
997	992
998		static WRITE_LINE_DEVICE_HANDLER( amstrad_de_changed )
	993	WRITE_LINE_MEMBER(amstrad_state::amstrad_de_changed)
999	994	{
1000		amstrad_state *drvstate = device->machine().driver_data<amstrad_state>();
1001		amstrad_update_video(device->machine());
	995	amstrad_update_video(machine());
1002	996
1003		if ( ! drvstate->m_gate_array.de && state )
	997	if ( ! m_gate_array.de && state )
1004	998	{
1005	999	/* DE became active, store the starting MA and RA signals */
1006		mc6845_device *mc6845 = drvstate->m_crtc;
	1000	mc6845_device *mc6845 = m_crtc;
1007	1001
1008		drvstate->m_gate_array.ma = mc6845->get_ma();
1009		drvstate->m_gate_array.ra = mc6845->get_ra();
1010		logerror("y = %d; ma = %02x; ra = %02x, address = %04x\n", drvstate->m_gate_array.y, drvstate->m_gate_array.ma, drvstate->m_gate_array.ra, ( ( drvstate->m_gate_array.ma & 0x3000 ) << 2 ) | ( ( drvstate->m_gate_array.ra & 0x07 ) << 11 ) | ( ( drvstate->m_gate_array.ma & 0x3ff ) << 1 ) );
1011		amstrad_gate_array_get_video_data(device->machine());
1012		drvstate->m_asic.de_start = 1;
	1002	m_gate_array.ma = mc6845->get_ma();
	1003	m_gate_array.ra = mc6845->get_ra();
	1004	logerror("y = %d; ma = %02x; ra = %02x, address = %04x\n", m_gate_array.y, m_gate_array.ma, m_gate_array.ra, ( ( m_gate_array.ma & 0x3000 ) << 2 ) | ( ( m_gate_array.ra & 0x07 ) << 11 ) | ( ( m_gate_array.ma & 0x3ff ) << 1 ) );
	1005	amstrad_gate_array_get_video_data(machine());
	1006	m_asic.de_start = 1;
1013	1007	}
1014	1008
1015		drvstate->m_gate_array.de = state ? 1 : 0;
	1009	m_gate_array.de = state ? 1 : 0;
1016	1010	}
1017	1011
1018	1012
1019		static WRITE_LINE_DEVICE_HANDLER( amstrad_plus_de_changed )
	1013	WRITE_LINE_MEMBER(amstrad_state::amstrad_plus_de_changed)
1020	1014	{
1021		amstrad_state *drvstate = device->machine().driver_data<amstrad_state>();
1022		amstrad_plus_update_video(device->machine());
	1015	amstrad_plus_update_video(machine());
1023	1016
1024		if ( ! drvstate->m_gate_array.de && state )
	1017	if ( ! m_gate_array.de && state )
1025	1018	{
1026	1019	/* DE became active, store the starting MA and RA signals */
1027		mc6845_device *mc6845 = drvstate->m_crtc;
	1020	mc6845_device *mc6845 = m_crtc;
1028	1021
1029		drvstate->m_gate_array.ma = mc6845->get_ma();
1030		drvstate->m_gate_array.ra = mc6845->get_ra();
1031		drvstate->m_asic.h_start = drvstate->m_gate_array.line_ticks;
1032		drvstate->m_asic.de_start = 1;
	1022	m_gate_array.ma = mc6845->get_ma();
	1023	m_gate_array.ra = mc6845->get_ra();
	1024	m_asic.h_start = m_gate_array.line_ticks;
	1025	m_asic.de_start = 1;
1033	1026
1034	1027	/* Start of screen */
1035		if ( drvstate->m_asic.vpos == 1 )
	1028	if ( m_asic.vpos == 1 )
1036	1029	{
1037		drvstate->m_asic.split_ma_base = 0x0000;
1038		drvstate->m_asic.split_ma_started = 0x0000;
	1030	m_asic.split_ma_base = 0x0000;
	1031	m_asic.split_ma_started = 0x0000;
1039	1032	}
1040	1033	/* Start of split screen section */
1041		else if ( drvstate->m_asic.enabled && drvstate->m_asic.ram[0x2801] != 0 && drvstate->m_asic.ram[0x2801] == drvstate->m_asic.vpos - 1 )
	1034	else if ( m_asic.enabled && m_asic.ram[0x2801] != 0 && m_asic.ram[0x2801] == m_asic.vpos - 1 )
1042	1035	{
1043		drvstate->m_asic.split_ma_started = drvstate->m_gate_array.ma;
1044		drvstate->m_asic.split_ma_base = ( drvstate->m_asic.ram[0x2802] << 8 ) | drvstate->m_asic.ram[0x2803];
	1036	m_asic.split_ma_started = m_gate_array.ma;
	1037	m_asic.split_ma_base = ( m_asic.ram[0x2802] << 8 ) | m_asic.ram[0x2803];
1045	1038	}
1046	1039
1047		drvstate->m_gate_array.colour = drvstate->m_asic.ram[0x2420] + ( drvstate->m_asic.ram[0x2421] << 8 );
1048		drvstate->m_asic.hscroll = drvstate->m_asic.ram[0x2804] & 0x0f;
	1040	m_gate_array.colour = m_asic.ram[0x2420] + ( m_asic.ram[0x2421] << 8 );
	1041	m_asic.hscroll = m_asic.ram[0x2804] & 0x0f;
1049	1042
1050		if ( drvstate->m_asic.hscroll == 0 )
1051		amstrad_plus_gate_array_get_video_data(device->machine());
	1043	if ( m_asic.hscroll == 0 )
	1044	amstrad_plus_gate_array_get_video_data(machine());
1052	1045	}
1053	1046
1054		if ( drvstate->m_gate_array.de && ! state )
	1047	if ( m_gate_array.de && ! state )
1055	1048	{
1056		drvstate->m_asic.h_end = drvstate->m_gate_array.line_ticks;
1057		amstrad_plus_update_video_sprites(device->machine());
	1049	m_asic.h_end = m_gate_array.line_ticks;
	1050	amstrad_plus_update_video_sprites(machine());
1058	1051	}
1059	1052
1060		drvstate->m_gate_array.de = state ? 1 : 0;
	1053	m_gate_array.de = state ? 1 : 0;
1061	1054	}
1062	1055
1063	1056
r18257	r18258
1086	1079	NULL,                           /* begin_update */
1087	1080	NULL,                           /* update_row */
1088	1081	NULL,                           /* end_update */
1089		DEVCB_LINE(amstrad_de_changed),         /* on_de_changed */
	1082	DEVCB_DRIVER_LINE_MEMBER(amstrad_state,amstrad_de_changed),         /* on_de_changed */
1090	1083	DEVCB_NULL,                        /* on_cur_changed */
1091		DEVCB_LINE(amstrad_hsync_changed),      /* on_hsync_changed */
1092		DEVCB_LINE(amstrad_vsync_changed),      /* on_vsync_changed */
	1084	DEVCB_DRIVER_LINE_MEMBER(amstrad_state,amstrad_hsync_changed),      /* on_hsync_changed */
	1085	DEVCB_DRIVER_LINE_MEMBER(amstrad_state,amstrad_vsync_changed),      /* on_vsync_changed */
1093	1086	NULL
1094	1087	};
1095	1088
r18257	r18258
1101	1094	NULL,                              /* begin_update */
1102	1095	NULL,                              /* update_row */
1103	1096	NULL,                              /* end_update */
1104		DEVCB_LINE(amstrad_plus_de_changed),      /* on_de_changed */
	1097	DEVCB_DRIVER_LINE_MEMBER(amstrad_state,amstrad_plus_de_changed),      /* on_de_changed */
1105	1098	DEVCB_NULL,                           /* on_cur_changed */
1106		DEVCB_LINE(amstrad_plus_hsync_changed),      /* on_hsync_changed */
1107		DEVCB_LINE(amstrad_plus_vsync_changed),      /* on_vsync_changed */
	1099	DEVCB_DRIVER_LINE_MEMBER(amstrad_state,amstrad_plus_hsync_changed),      /* on_hsync_changed */
	1100	DEVCB_DRIVER_LINE_MEMBER(amstrad_state,amstrad_plus_vsync_changed),      /* on_vsync_changed */
1108	1101	NULL
1109	1102	};
1110	1103
r18257	r18258
2505	2498
2506	2499
2507	2500	/* Read/Write 8255 PPI port A (connected to AY-3-8912 databus) */
2508		READ8_DEVICE_HANDLER ( amstrad_ppi_porta_r )
	2501	READ8_MEMBER(amstrad_state::amstrad_ppi_porta_r)
2509	2502	{
2510		amstrad_state *state = space.machine().driver_data<amstrad_state>();
2511		update_psg(space.machine());
2512		return state->m_ppi_port_inputs[amstrad_ppi_PortA];
	2503	update_psg(machine());
	2504	return m_ppi_port_inputs[amstrad_ppi_PortA];
2513	2505	}
2514	2506
2515	2507
2516		WRITE8_DEVICE_HANDLER ( amstrad_ppi_porta_w )
	2508	WRITE8_MEMBER(amstrad_state::amstrad_ppi_porta_w)
2517	2509	{
2518		amstrad_state *state = space.machine().driver_data<amstrad_state>();
2519		state->m_ppi_port_outputs[amstrad_ppi_PortA] = data;
2520		update_psg(space.machine());
	2510	m_ppi_port_outputs[amstrad_ppi_PortA] = data;
	2511	update_psg(machine());
2521	2512	}
2522	2513
2523	2514
r18257	r18258
2547	2538	*/
2548	2539
2549	2540
2550		READ8_DEVICE_HANDLER (amstrad_ppi_portb_r)
	2541	READ8_MEMBER(amstrad_state::amstrad_ppi_portb_r)
2551	2542	{
2552		amstrad_state *state = space.machine().driver_data<amstrad_state>();
2553	2543	int data = 0;
2554	2544	/* Set b7 with cassette tape input */
2555		if(state->m_system_type != SYSTEM_GX4000)
	2545	if(m_system_type != SYSTEM_GX4000)
2556	2546	{
2557		if (state->m_cassette->input() > 0.03)
	2547	if (m_cassette->input() > 0.03)
2558	2548	{
2559	2549	data |= (1<<7);
2560	2550	}
2561	2551	}
2562	2552	/* Set b6 with Parallel/Printer port ready */
2563		if(state->m_system_type != SYSTEM_GX4000)
	2553	if(m_system_type != SYSTEM_GX4000)
2564	2554	{
2565		centronics_device *printer = state->m_centronics;
	2555	centronics_device *printer = m_centronics;
2566	2556	data |= printer->busy_r() << 6;
2567	2557	}
2568	2558	/* Set b4-b1 50Hz/60Hz state and manufacturer name defined by links on PCB */
2569		data |= (state->m_ppi_port_inputs[amstrad_ppi_PortB] & 0x1e);
	2559	data |= (m_ppi_port_inputs[amstrad_ppi_PortB] & 0x1e);
2570	2560
2571	2561	/*  Set b0 with VSync state from the CRTC */
2572		data |= state->m_gate_array.vsync;
	2562	data |= m_gate_array.vsync;
2573	2563
2574		if(state->m_aleste_mode & 0x04)
	2564	if(m_aleste_mode & 0x04)
2575	2565	{
2576		if(state->m_aleste_fdc_int == 0)
	2566	if(m_aleste_fdc_int == 0)
2577	2567	data &= ~0x02;
2578	2568	else
2579	2569	data |= 0x02;
r18257	r18258
2581	2571
2582	2572	logerror("amstrad_ppi_portb_r\n");
2583	2573	/* Schedule a write to PC2 */
2584		space.machine().scheduler().timer_set( attotime::zero, timer_expired_delegate(FUNC(amstrad_state::amstrad_pc2_low),state));
	2574	machine().scheduler().timer_set( attotime::zero, timer_expired_delegate(FUNC(amstrad_state::amstrad_pc2_low),this));
2585	2575
2586	2576	return data;
2587	2577	}
r18257	r18258
2601	2591
2602	2592	/* previous_ppi_portc_w value */
2603	2593
2604		WRITE8_DEVICE_HANDLER ( amstrad_ppi_portc_w )
	2594	WRITE8_MEMBER(amstrad_state::amstrad_ppi_portc_w)
2605	2595	{
2606		amstrad_state *state = space.machine().driver_data<amstrad_state>();
2607	2596	int changed_data;
2608	2597
2609		state->m_previous_ppi_portc_w = state->m_ppi_port_outputs[amstrad_ppi_PortC];
	2598	m_previous_ppi_portc_w = m_ppi_port_outputs[amstrad_ppi_PortC];
2610	2599	/* Write the data to Port C */
2611		changed_data = state->m_previous_ppi_portc_w^data;
	2600	changed_data = m_previous_ppi_portc_w^data;
2612	2601
2613		state->m_ppi_port_outputs[amstrad_ppi_PortC] = data;
	2602	m_ppi_port_outputs[amstrad_ppi_PortC] = data;
2614	2603
2615	2604	/* get b7 and b6 (PSG Function Selected */
2616		state->m_Psg_FunctionSelected = ((data & 0xC0)>>6);
	2605	m_Psg_FunctionSelected = ((data & 0xC0)>>6);
2617	2606
2618	2607	/* MC146818 function */
2619		state->m_aleste_rtc_function = data & 0x07;
	2608	m_aleste_rtc_function = data & 0x07;
2620	2609
2621	2610	/* Perform PSG function */
2622		update_psg(space.machine());
	2611	update_psg(machine());
2623	2612
2624	2613	/* b5 Cassette Write data */
2625		if(state->m_system_type != SYSTEM_GX4000)
	2614	if(m_system_type != SYSTEM_GX4000)
2626	2615	{
2627	2616	if ((changed_data & 0x20) != 0)
2628	2617	{
2629		state->m_cassette->output(((data & 0x20) ? -1.0 : +1.0));
	2618	m_cassette->output(((data & 0x20) ? -1.0 : +1.0));
2630	2619	}
2631	2620	}
2632	2621
2633	2622	/* b4 Cassette Motor Control */
2634		if(state->m_system_type != SYSTEM_GX4000)
	2623	if(m_system_type != SYSTEM_GX4000)
2635	2624	{
2636	2625	if ((changed_data & 0x10) != 0)
2637	2626	{
2638		state->m_cassette->change_state(
	2627	m_cassette->change_state(
2639	2628	((data & 0x10) ? CASSETTE_MOTOR_ENABLED : CASSETTE_MOTOR_DISABLED),
2640	2629	CASSETTE_MASK_MOTOR);
2641	2630	}

trunk/src/mess/machine/b2m.c

r18257	r18258
143	143	}
144	144
145	145
146		static WRITE_LINE_DEVICE_HANDLER(bm2_pit_out1)
	146	WRITE_LINE_MEMBER(b2m_state::bm2_pit_out1)
147	147	{
148		b2m_state *st =  device->machine().driver_data<b2m_state>();
149		speaker_level_w(st->m_speaker, state);
	148	speaker_level_w(m_speaker, state);
150	149	}
151	150
152	151	const struct pit8253_config b2m_pit8253_intf =
r18257	r18258
160	159	{
161	160	2000000,
162	161	DEVCB_NULL,
163		DEVCB_DEVICE_LINE("pit8253", bm2_pit_out1)
	162	DEVCB_DRIVER_LINE_MEMBER(b2m_state,bm2_pit_out1)
164	163	},
165	164	{
166	165	2000000,
r18257	r18258
170	169	}
171	170	};
172	171
173		static WRITE8_DEVICE_HANDLER (b2m_8255_porta_w )
	172	WRITE8_MEMBER(b2m_state::b2m_8255_porta_w)
174	173	{
175		b2m_state *state = space.machine().driver_data<b2m_state>();
176		state->m_b2m_8255_porta = data;
	174	m_b2m_8255_porta = data;
177	175	}
178		static WRITE8_DEVICE_HANDLER (b2m_8255_portb_w )
	176	WRITE8_MEMBER(b2m_state::b2m_8255_portb_w)
179	177	{
180		b2m_state *state = space.machine().driver_data<b2m_state>();
181		state->m_b2m_video_scroll = data;
	178	m_b2m_video_scroll = data;
182	179	}
183	180
184		static WRITE8_DEVICE_HANDLER (b2m_8255_portc_w )
	181	WRITE8_MEMBER(b2m_state::b2m_8255_portc_w)
185	182	{
186		b2m_state *state = space.machine().driver_data<b2m_state>();
187
188		state->m_b2m_8255_portc = data;
189		b2m_set_bank(space.machine(), state->m_b2m_8255_portc & 7);
190		state->m_b2m_video_page = (state->m_b2m_8255_portc >> 7) & 1;
	183	m_b2m_8255_portc = data;
	184	b2m_set_bank(machine(), m_b2m_8255_portc & 7);
	185	m_b2m_video_page = (m_b2m_8255_portc >> 7) & 1;
191	186	}
192	187
193		static READ8_DEVICE_HANDLER (b2m_8255_portb_r )
	188	READ8_MEMBER(b2m_state::b2m_8255_portb_r)
194	189	{
195		b2m_state *state = space.machine().driver_data<b2m_state>();
196		return state->m_b2m_video_scroll;
	190	return m_b2m_video_scroll;
197	191	}
198	192
199	193	I8255A_INTERFACE( b2m_ppi8255_interface_1 )
200	194	{
201	195	DEVCB_NULL,
202		DEVCB_DEVICE_HANDLER("ppi8255_1", b2m_8255_porta_w),
203		DEVCB_DEVICE_HANDLER("ppi8255_1", b2m_8255_portb_r),
204		DEVCB_DEVICE_HANDLER("ppi8255_1", b2m_8255_portb_w),
	196	DEVCB_DRIVER_MEMBER(b2m_state,b2m_8255_porta_w),
	197	DEVCB_DRIVER_MEMBER(b2m_state,b2m_8255_portb_r),
	198	DEVCB_DRIVER_MEMBER(b2m_state,b2m_8255_portb_w),
205	199	DEVCB_NULL,
206		DEVCB_DEVICE_HANDLER("ppi8255_1", b2m_8255_portc_w)
	200	DEVCB_DRIVER_MEMBER(b2m_state,b2m_8255_portc_w)
207	201	};
208	202
209	203
210	204
211		static WRITE8_DEVICE_HANDLER (b2m_ext_8255_portc_w )
	205	WRITE8_MEMBER(b2m_state::b2m_ext_8255_portc_w)
212	206	{
213	207	UINT8 drive = ((data >> 1) & 1) ^ 1;
214	208	UINT8 side  = (data  & 1) ^ 1;
215		b2m_state *state = space.machine().driver_data<b2m_state>();
216		floppy_mon_w(floppy_get_device(space.machine(), 0), 1);
217		floppy_mon_w(floppy_get_device(space.machine(), 1), 1);
	209	floppy_mon_w(floppy_get_device(machine(), 0), 1);
	210	floppy_mon_w(floppy_get_device(machine(), 1), 1);
218	211
219		if (state->m_b2m_drive!=drive) {
220		wd17xx_set_drive(state->m_fdc,drive);
221		floppy_mon_w(floppy_get_device(space.machine(), 0), 0);
222		floppy_drive_set_ready_state(floppy_get_device(space.machine(), 0), 1, 1);
223		state->m_b2m_drive = drive;
	212	if (m_b2m_drive!=drive) {
	213	wd17xx_set_drive(m_fdc,drive);
	214	floppy_mon_w(floppy_get_device(machine(), 0), 0);
	215	floppy_drive_set_ready_state(floppy_get_device(machine(), 0), 1, 1);
	216	m_b2m_drive = drive;
224	217	}
225		if (state->m_b2m_side!=side) {
226		wd17xx_set_side(state->m_fdc,side);
227		floppy_mon_w(floppy_get_device(space.machine(), 1), 0);
228		floppy_drive_set_ready_state(floppy_get_device(space.machine(), 1), 1, 1);
229		state->m_b2m_side = side;
	218	if (m_b2m_side!=side) {
	219	wd17xx_set_side(m_fdc,side);
	220	floppy_mon_w(floppy_get_device(machine(), 1), 0);
	221	floppy_drive_set_ready_state(floppy_get_device(machine(), 1), 1, 1);
	222	m_b2m_side = side;
230	223	}
231		wd17xx_dden_w(state->m_fdc, 0);
	224	wd17xx_dden_w(m_fdc, 0);
232	225	}
233	226
234	227	I8255A_INTERFACE( b2m_ppi8255_interface_2 )
r18257	r18258
238	231	DEVCB_NULL,
239	232	DEVCB_NULL,
240	233	DEVCB_NULL,
241		DEVCB_DEVICE_HANDLER("ppi8255_2", b2m_ext_8255_portc_w)
	234	DEVCB_DRIVER_MEMBER(b2m_state,b2m_ext_8255_portc_w)
242	235	};
243	236
244		static READ8_DEVICE_HANDLER (b2m_romdisk_porta_r )
	237	READ8_MEMBER(b2m_state::b2m_romdisk_porta_r)
245	238	{
246		b2m_state *state = space.machine().driver_data<b2m_state>();
247
248		UINT8 *romdisk = state->memregion("maincpu")->base() + 0x12000;
249		return romdisk[state->m_b2m_romdisk_msb*256+state->m_b2m_romdisk_lsb];
	239	UINT8 *romdisk = memregion("maincpu")->base() + 0x12000;
	240	return romdisk[m_b2m_romdisk_msb*256+m_b2m_romdisk_lsb];
250	241	}
251	242
252		static WRITE8_DEVICE_HANDLER (b2m_romdisk_portb_w )
	243	WRITE8_MEMBER(b2m_state::b2m_romdisk_portb_w)
253	244	{
254		b2m_state *state = space.machine().driver_data<b2m_state>();
255		state->m_b2m_romdisk_lsb = data;
	245	m_b2m_romdisk_lsb = data;
256	246	}
257	247
258		static WRITE8_DEVICE_HANDLER (b2m_romdisk_portc_w )
	248	WRITE8_MEMBER(b2m_state::b2m_romdisk_portc_w)
259	249	{
260		b2m_state *state = space.machine().driver_data<b2m_state>();
261		state->m_b2m_romdisk_msb = data & 0x7f;
	250	m_b2m_romdisk_msb = data & 0x7f;
262	251	}
263	252
264	253	I8255A_INTERFACE( b2m_ppi8255_interface_3 )
265	254	{
266		DEVCB_DEVICE_HANDLER("ppi8255_3", b2m_romdisk_porta_r),
	255	DEVCB_DRIVER_MEMBER(b2m_state,b2m_romdisk_porta_r),
267	256	DEVCB_NULL,
268	257	DEVCB_NULL,
269		DEVCB_DEVICE_HANDLER("ppi8255_3", b2m_romdisk_portb_w),
	258	DEVCB_DRIVER_MEMBER(b2m_state,b2m_romdisk_portb_w),
270	259	DEVCB_NULL,
271		DEVCB_DEVICE_HANDLER("ppi8255_3", b2m_romdisk_portc_w)
	260	DEVCB_DRIVER_MEMBER(b2m_state,b2m_romdisk_portc_w)
272	261	};
273	262
274		static WRITE_LINE_DEVICE_HANDLER( b2m_pic_set_int_line )
	263	WRITE_LINE_MEMBER(b2m_state::b2m_pic_set_int_line)
275	264	{
276		device->machine().device("maincpu")->execute().set_input_line(0, state ?  HOLD_LINE : CLEAR_LINE);
	265	machine().device("maincpu")->execute().set_input_line(0, state ?  HOLD_LINE : CLEAR_LINE);
277	266	}
278	267
279	268	/* Driver initialization */
r18257	r18258
352	341
353	342	const struct pic8259_interface b2m_pic8259_config =
354	343	{
355		DEVCB_LINE(b2m_pic_set_int_line),
	344	DEVCB_DRIVER_LINE_MEMBER(b2m_state,b2m_pic_set_int_line),
356	345	DEVCB_LINE_VCC,
357	346	DEVCB_NULL
358	347	};

trunk/src/mess/machine/oric.c

r18257	r18258
134	134	/* bit 0 = BC1 state */
135	135
136	136	/* this port is also used to read printer data */
137		static READ8_DEVICE_HANDLER ( oric_via_in_a_func )
	137	READ8_MEMBER(oric_state::oric_via_in_a_func)
138	138	{
139		oric_state *state = space.machine().driver_data<oric_state>();
140
141	139	/*logerror("port a read\r\n"); */
142	140
143	141	/* access psg? */
144		if (state->m_psg_control!=0)
	142	if (m_psg_control!=0)
145	143	{
146	144	/* if psg is in read register state return reg data */
147		if (state->m_psg_control==0x01)
148		return ay8910_r(space.machine().device("ay8912"), space, 0);
	145	if (m_psg_control==0x01)
	146	return ay8910_r(machine().device("ay8912"), space, 0);
149	147
150	148	/* return high-impedance */
151	149	return 0x0ff;
152	150	}
153	151
154	152	/* correct?? */
155		return state->m_via_port_a_data;
	153	return m_via_port_a_data;
156	154	}
157	155
158		static READ8_DEVICE_HANDLER ( oric_via_in_b_func )
	156	READ8_MEMBER(oric_state::oric_via_in_b_func)
159	157	{
160		oric_state *state = space.machine().driver_data<oric_state>();
161	158	int data;
162	159
163		oric_keyboard_sense_refresh(space.machine());
	160	oric_keyboard_sense_refresh(machine());
164	161
165		data = state->m_key_sense_bit;
166		data |= state->m_keyboard_line & 0x07;
	162	data = m_key_sense_bit;
	163	data |= m_keyboard_line & 0x07;
167	164
168	165	return data;
169	166	}
r18257	r18258
209	206	}
210	207	}
211	208
212		static WRITE8_DEVICE_HANDLER ( oric_via_out_a_func )
	209	WRITE8_MEMBER(oric_state::oric_via_out_a_func)
213	210	{
214		oric_state *state = space.machine().driver_data<oric_state>();
215		state->m_via_port_a_data = data;
	211	m_via_port_a_data = data;
216	212
217	213	oric_psg_connection_refresh(space);
218	214
219	215
220		if (state->m_psg_control==0)
	216	if (m_psg_control==0)
221	217	{
222	218	/* if psg not selected, write to printer */
223		centronics_device *centronics = space.machine().device<centronics_device>("centronics");
224		centronics->write(space.machine().driver_data()->generic_space(), 0, data);
	219	centronics_device *centronics = machine().device<centronics_device>("centronics");
	220	centronics->write(machine().driver_data()->generic_space(), 0, data);
225	221	}
226	222	}
227	223
r18257	r18258
281	277	via_0->write_cb1(data);
282	278	}
283	279
284		static WRITE8_DEVICE_HANDLER ( oric_via_out_b_func )
	280	WRITE8_MEMBER(oric_state::oric_via_out_b_func)
285	281	{
286		oric_state *state = space.machine().driver_data<oric_state>();
287		centronics_device *centronics = space.machine().device<centronics_device>("centronics");
	282	centronics_device *centronics = machine().device<centronics_device>("centronics");
288	283
289	284	/* KEYBOARD */
290		state->m_keyboard_line = data & 0x07;
	285	m_keyboard_line = data & 0x07;
291	286
292	287	/* CASSETTE */
293	288	/* cassette motor control */
294		cassette_device_image(space.machine())->change_state(
	289	cassette_device_image(machine())->change_state(
295	290	(data & 0x40) ? CASSETTE_MOTOR_ENABLED : CASSETTE_MOTOR_DISABLED,
296	291	CASSETTE_MOTOR_DISABLED);
297	292
298	293	/* cassette data out */
299		cassette_device_image(space.machine())->output((data & (1<<7)) ? -1.0 : +1.0);
	294	cassette_device_image(machine())->output((data & (1<<7)) ? -1.0 : +1.0);
300	295
301	296	/* centronics STROBE is connected to PB4 */
302	297	centronics->strobe_w(BIT(data, 4));
303	298
304	299	oric_psg_connection_refresh(space);
305		state->m_previous_portb_data = data;
	300	m_previous_portb_data = data;
306	301	}
307	302
308	303
309		static READ8_DEVICE_HANDLER ( oric_via_in_ca2_func )
	304	READ8_MEMBER(oric_state::oric_via_in_ca2_func)
310	305	{
311		oric_state *state = space.machine().driver_data<oric_state>();
312		return state->m_psg_control & 1;
	306	return m_psg_control & 1;
313	307	}
314	308
315		static READ8_DEVICE_HANDLER ( oric_via_in_cb2_func )
	309	READ8_MEMBER(oric_state::oric_via_in_cb2_func)
316	310	{
317		oric_state *state = space.machine().driver_data<oric_state>();
318		return (state->m_psg_control>>1) & 1;
	311	return (m_psg_control>>1) & 1;
319	312	}
320	313
321		static WRITE8_DEVICE_HANDLER ( oric_via_out_ca2_func )
	314	WRITE8_MEMBER(oric_state::oric_via_out_ca2_func)
322	315	{
323		oric_state *state = space.machine().driver_data<oric_state>();
324		state->m_psg_control &=~1;
	316	m_psg_control &=~1;
325	317
326	318	if (data)
327		state->m_psg_control |=1;
	319	m_psg_control |=1;
328	320
329	321	oric_psg_connection_refresh(space);
330	322	}
331	323
332		static WRITE8_DEVICE_HANDLER ( oric_via_out_cb2_func )
	324	WRITE8_MEMBER(oric_state::oric_via_out_cb2_func)
333	325	{
334		oric_state *state = space.machine().driver_data<oric_state>();
335		state->m_psg_control &=~2;
	326	m_psg_control &=~2;
336	327
337	328	if (data)
338		state->m_psg_control |=2;
	329	m_psg_control |=2;
339	330
340	331	oric_psg_connection_refresh(space);
341	332	}
r18257	r18258
394	385
395	386	const via6522_interface oric_6522_interface=
396	387	{
397		DEVCB_HANDLER(oric_via_in_a_func),
398		DEVCB_HANDLER(oric_via_in_b_func),
	388	DEVCB_DRIVER_MEMBER(oric_state,oric_via_in_a_func),
	389	DEVCB_DRIVER_MEMBER(oric_state,oric_via_in_b_func),
399	390	DEVCB_NULL,            /* printer acknowledge - handled by callback*/
400	391	DEVCB_NULL,            /* tape input - handled by timer */
401		DEVCB_HANDLER(oric_via_in_ca2_func),
402		DEVCB_HANDLER(oric_via_in_cb2_func),
403		DEVCB_HANDLER(oric_via_out_a_func),
404		DEVCB_HANDLER(oric_via_out_b_func),
	392	DEVCB_DRIVER_MEMBER(oric_state,oric_via_in_ca2_func),
	393	DEVCB_DRIVER_MEMBER(oric_state,oric_via_in_cb2_func),
	394	DEVCB_DRIVER_MEMBER(oric_state,oric_via_out_a_func),
	395	DEVCB_DRIVER_MEMBER(oric_state,oric_via_out_b_func),
405	396	DEVCB_NULL,
406	397	DEVCB_NULL,
407		DEVCB_HANDLER(oric_via_out_ca2_func),
408		DEVCB_HANDLER(oric_via_out_cb2_func),
	398	DEVCB_DRIVER_MEMBER(oric_state,oric_via_out_ca2_func),
	399	DEVCB_DRIVER_MEMBER(oric_state,oric_via_out_cb2_func),
409	400	DEVCB_LINE(oric_via_irq_func),
410	401	};
411	402
r18257	r18258
658	649	}
659	650
660	651	/* DRQ is connected to interrupt */
661		static WRITE_LINE_DEVICE_HANDLER( oric_jasmin_wd179x_drq_w )
	652	WRITE_LINE_MEMBER(oric_state::oric_jasmin_wd179x_drq_w)
662	653	{
663		oric_state *drvstate = device->machine().driver_data<oric_state>();
664	654	if (state)
665		drvstate->m_irqs |= (1<<1);
	655	m_irqs |= (1<<1);
666	656	else
667		drvstate->m_irqs &=~(1<<1);
	657	m_irqs &=~(1<<1);
668	658
669		oric_refresh_ints(device->machine());
	659	oric_refresh_ints(machine());
670	660	}
671	661
672	662	READ8_MEMBER(oric_state::oric_jasmin_r)
r18257	r18258
795	785	oric_refresh_ints(machine);
796	786	}
797	787
798		static WRITE_LINE_DEVICE_HANDLER( oric_microdisc_wd179x_intrq_w )
	788	WRITE_LINE_MEMBER(oric_state::oric_microdisc_wd179x_intrq_w)
799	789	{
800		oric_state *drvstate = device->machine().driver_data<oric_state>();
801		drvstate->m_wd179x_int_state = state;
	790	m_wd179x_int_state = state;
802	791
803	792	if (state)
804		drvstate->m_port_314_r &= ~(1<<7);
	793	m_port_314_r &= ~(1<<7);
805	794	else
806		drvstate->m_port_314_r |=(1<<7);
	795	m_port_314_r |=(1<<7);
807	796
808		oric_microdisc_refresh_wd179x_ints(device->machine());
	797	oric_microdisc_refresh_wd179x_ints(machine());
809	798	}
810	799
811		static WRITE_LINE_DEVICE_HANDLER( oric_microdisc_wd179x_drq_w )
	800	WRITE_LINE_MEMBER(oric_state::oric_microdisc_wd179x_drq_w)
812	801	{
813		oric_state *drvstate = device->machine().driver_data<oric_state>();
814	802	if (state)
815		drvstate->m_port_318_r &=~(1<<7);
	803	m_port_318_r &=~(1<<7);
816	804	else
817		drvstate->m_port_318_r |= (1<<7);
	805	m_port_318_r |= (1<<7);
818	806	}
819	807
820	808	static void oric_microdisc_set_mem_0x0c000(running_machine &machine)
r18257	r18258
999	987
1000	988	/*********************************************************/
1001	989
1002		static WRITE_LINE_DEVICE_HANDLER( oric_wd179x_intrq_w )
	990	WRITE_LINE_MEMBER(oric_state::oric_wd179x_intrq_w)
1003	991	{
1004		if ((device->machine().root_device().ioport("FLOPPY")->read() & 0x07) == ORIC_FLOPPY_INTERFACE_MICRODISC)
1005		oric_microdisc_wd179x_intrq_w(device, state);
	992	if ((machine().root_device().ioport("FLOPPY")->read() & 0x07) == ORIC_FLOPPY_INTERFACE_MICRODISC)
	993	oric_microdisc_wd179x_intrq_w(state);
1006	994	}
1007	995
1008		static WRITE_LINE_DEVICE_HANDLER( oric_wd179x_drq_w )
	996	WRITE_LINE_MEMBER(oric_state::oric_wd179x_drq_w)
1009	997	{
1010		switch (device->machine().root_device().ioport("FLOPPY")->read() &  0x07)
	998	switch (machine().root_device().ioport("FLOPPY")->read() &  0x07)
1011	999	{
1012	1000	default:
1013	1001	case ORIC_FLOPPY_INTERFACE_NONE:
1014	1002	case ORIC_FLOPPY_INTERFACE_APPLE2:
1015	1003	return;
1016	1004	case ORIC_FLOPPY_INTERFACE_MICRODISC:
1017		oric_microdisc_wd179x_drq_w(device, state);
	1005	oric_microdisc_wd179x_drq_w(state);
1018	1006	return;
1019	1007	case ORIC_FLOPPY_INTERFACE_JASMIN:
1020		oric_jasmin_wd179x_drq_w(device, state);
	1008	oric_jasmin_wd179x_drq_w(state);
1021	1009	return;
1022	1010	}
1023	1011	}
r18257	r18258
1025	1013	const wd17xx_interface oric_wd17xx_interface =
1026	1014	{
1027	1015	DEVCB_NULL,
1028		DEVCB_LINE(oric_wd179x_intrq_w),
1029		DEVCB_LINE(oric_wd179x_drq_w),
	1016	DEVCB_DRIVER_LINE_MEMBER(oric_state,oric_wd179x_intrq_w),
	1017	DEVCB_DRIVER_LINE_MEMBER(oric_state,oric_wd179x_drq_w),
1030	1018	{FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3}
1031	1019	};
1032	1020
r18257	r18258
1278	1266	}
1279	1267	}
1280	1268
1281		static READ8_DEVICE_HANDLER(telestrat_via2_in_a_func)
	1269	READ8_MEMBER(oric_state::telestrat_via2_in_a_func)
1282	1270	{
1283		oric_state *state = space.machine().driver_data<oric_state>();
1284		//logerror("via 2 - port a %02x\n",state->m_telestrat_via2_port_a_data);
1285		return state->m_telestrat_via2_port_a_data;
	1271	//logerror("via 2 - port a %02x\n",m_telestrat_via2_port_a_data);
	1272	return m_telestrat_via2_port_a_data;
1286	1273	}
1287	1274
1288	1275
1289		static WRITE8_DEVICE_HANDLER(telestrat_via2_out_a_func)
	1276	WRITE8_MEMBER(oric_state::telestrat_via2_out_a_func)
1290	1277	{
1291		oric_state *state = space.machine().driver_data<oric_state>();
1292	1278	//logerror("via 2 - port a w: %02x\n",data);
1293	1279
1294		state->m_telestrat_via2_port_a_data = data;
	1280	m_telestrat_via2_port_a_data = data;
1295	1281
1296		if (((data^state->m_telestrat_bank_selection) & 0x07)!=0)
	1282	if (((data^m_telestrat_bank_selection) & 0x07)!=0)
1297	1283	{
1298		state->m_telestrat_bank_selection = data & 0x07;
	1284	m_telestrat_bank_selection = data & 0x07;
1299	1285
1300		telestrat_refresh_mem(space.machine());
	1286	telestrat_refresh_mem(machine());
1301	1287	}
1302	1288	}
1303	1289
1304		static READ8_DEVICE_HANDLER(telestrat_via2_in_b_func)
	1290	READ8_MEMBER(oric_state::telestrat_via2_in_b_func)
1305	1291	{
1306		oric_state *state = space.machine().driver_data<oric_state>();
1307	1292	unsigned char data = 0x01f;
1308	1293
1309	1294	/* left joystick selected? */
1310		if (state->m_telestrat_via2_port_b_data & (1<<6))
	1295	if (m_telestrat_via2_port_b_data & (1<<6))
1311	1296	{
1312		data &= state->ioport("JOY0")->read();
	1297	data &= ioport("JOY0")->read();
1313	1298	}
1314	1299
1315	1300	/* right joystick selected? */
1316		if (state->m_telestrat_via2_port_b_data & (1<<7))
	1301	if (m_telestrat_via2_port_b_data & (1<<7))
1317	1302	{
1318		data &= space.machine().root_device().ioport("JOY1")->read();
	1303	data &= machine().root_device().ioport("JOY1")->read();
1319	1304	}
1320	1305
1321		data |= state->m_telestrat_via2_port_b_data & ((1<<7) | (1<<6) | (1<<5));
	1306	data |= m_telestrat_via2_port_b_data & ((1<<7) | (1<<6) | (1<<5));
1322	1307
1323	1308	return data;
1324	1309	}
1325	1310
1326		static WRITE8_DEVICE_HANDLER(telestrat_via2_out_b_func)
	1311	WRITE8_MEMBER(oric_state::telestrat_via2_out_b_func)
1327	1312	{
1328		oric_state *state = space.machine().driver_data<oric_state>();
1329		state->m_telestrat_via2_port_b_data = data;
	1313	m_telestrat_via2_port_b_data = data;
1330	1314	}
1331	1315
1332	1316
r18257	r18258
1347	1331
1348	1332	const via6522_interface telestrat_via2_interface=
1349	1333	{
1350		DEVCB_HANDLER(telestrat_via2_in_a_func),
1351		DEVCB_HANDLER(telestrat_via2_in_b_func),
	1334	DEVCB_DRIVER_MEMBER(oric_state,telestrat_via2_in_a_func),
	1335	DEVCB_DRIVER_MEMBER(oric_state,telestrat_via2_in_b_func),
1352	1336	DEVCB_NULL,
1353	1337	DEVCB_NULL,
1354	1338	DEVCB_NULL,
1355	1339	DEVCB_NULL,
1356		DEVCB_HANDLER(telestrat_via2_out_a_func),
1357		DEVCB_HANDLER(telestrat_via2_out_b_func),
	1340	DEVCB_DRIVER_MEMBER(oric_state,telestrat_via2_out_a_func),
	1341	DEVCB_DRIVER_MEMBER(oric_state,telestrat_via2_out_b_func),
1358	1342	DEVCB_NULL,
1359	1343	DEVCB_NULL,
1360	1344	DEVCB_NULL,

trunk/src/mess/machine/pet.c

r18257	r18258
45	45	cb1 video sync in
46	46	cb2 cassette 1 motor out
47	47	*/
48		static READ8_DEVICE_HANDLER( pia0_pa_r )
	48	READ8_MEMBER(pet_state::pia0_pa_r)
49	49	{
50		pet_state *state = space.machine().driver_data<pet_state>();
51	50	/*
52	51
53	52	bit     description
r18257	r18258
66	65	UINT8 data = 0;
67	66
68	67	/* key */
69		data |= state->m_keyline_select;
	68	data |= m_keyline_select;
70	69
71	70	/* #1 cassette switch */
72		data |= ((space.machine().device<cassette_image_device>(CASSETTE_TAG)->get_state() & CASSETTE_MASK_UISTATE) == CASSETTE_STOPPED) << 4;
	71	data |= ((machine().device<cassette_image_device>(CASSETTE_TAG)->get_state() & CASSETTE_MASK_UISTATE) == CASSETTE_STOPPED) << 4;
73	72
74	73	/* #2 cassette switch */
75		data |= ((space.machine().device<cassette_image_device>(CASSETTE2_TAG)->get_state() & CASSETTE_MASK_UISTATE) == CASSETTE_STOPPED) << 5;
	74	data |= ((machine().device<cassette_image_device>(CASSETTE2_TAG)->get_state() & CASSETTE_MASK_UISTATE) == CASSETTE_STOPPED) << 5;
76	75
77	76	/* end or identify in */
78		data |= state->m_ieee->eoi_r() << 6;
	77	data |= m_ieee->eoi_r() << 6;
79	78
80	79	/* diagnostic jumper */
81	80	data |= 0x80;
r18257	r18258
83	82	return data;
84	83	}
85	84
86		static WRITE8_DEVICE_HANDLER( pia0_pa_w )
	85	WRITE8_MEMBER(pet_state::pia0_pa_w)
87	86	{
88		pet_state *state = space.machine().driver_data<pet_state>();
89	87	/*
90	88
91	89	bit     description
r18257	r18258
102	100	*/
103	101
104	102	/* key */
105		state->m_keyline_select = data & 0x0f;
	103	m_keyline_select = data & 0x0f;
106	104	}
107	105
108	106	/* Keyboard reading/handling for regular keyboard */
109		static READ8_DEVICE_HANDLER( kin_r )
	107	READ8_MEMBER(pet_state::kin_r)
110	108	{
111		pet_state *state = space.machine().driver_data<pet_state>();
112	109	/*
113	110
114	111	bit     description
r18257	r18258
130	127	"ROW5", "ROW6", "ROW7", "ROW8", "ROW9"
131	128	};
132	129
133		if (state->m_keyline_select < 10)
	130	if (m_keyline_select < 10)
134	131	{
135		data = space.machine().root_device().ioport(keynames[state->m_keyline_select])->read();
	132	data = machine().root_device().ioport(keynames[m_keyline_select])->read();
136	133	/* Check for left-shift lock */
137		if ((state->m_keyline_select == 8) && (space.machine().root_device().ioport("SPECIAL")->read() & 0x80))
	134	if ((m_keyline_select == 8) && (machine().root_device().ioport("SPECIAL")->read() & 0x80))
138	135	data &= 0xfe;
139	136	}
140	137	return data;
141	138	}
142	139
143	140	/* Keyboard handling for business keyboard */
144		static READ8_DEVICE_HANDLER( petb_kin_r )
	141	READ8_MEMBER(pet_state::petb_kin_r)
145	142	{
146	143	UINT8 data = 0xff;
147		pet_state *state = space.machine().driver_data<pet_state>();
148	144	static const char *const keynames[] = {
149	145	"ROW0", "ROW1", "ROW2", "ROW3", "ROW4",
150	146	"ROW5", "ROW6", "ROW7", "ROW8", "ROW9"
151	147	};
152	148
153		if (state->m_keyline_select < 10)
	149	if (m_keyline_select < 10)
154	150	{
155		data = space.machine().root_device().ioport(keynames[state->m_keyline_select])->read();
	151	data = machine().root_device().ioport(keynames[m_keyline_select])->read();
156	152	/* Check for left-shift lock */
157	153	/* 2008-05 FP: For some reason, superpet read it in the opposite way!! */
158	154	/* While waiting for confirmation from docs, we add a workaround here. */
159		if (state->m_superpet)
	155	if (m_superpet)
160	156	{
161		if ((state->m_keyline_select == 6) && !(space.machine().root_device().ioport("SPECIAL")->read() & 0x80))
	157	if ((m_keyline_select == 6) && !(machine().root_device().ioport("SPECIAL")->read() & 0x80))
162	158	data &= 0xfe;
163	159	}
164	160	else
165	161	{
166		if ((state->m_keyline_select == 6) && (space.machine().root_device().ioport("SPECIAL")->read() & 0x80))
	162	if ((m_keyline_select == 6) && (machine().root_device().ioport("SPECIAL")->read() & 0x80))
167	163	data &= 0xfe;
168	164	}
169	165	}
170	166	return data;
171	167	}
172	168
173		static READ8_DEVICE_HANDLER( cass1_r )
	169	READ8_MEMBER(pet_state::cass1_r)
174	170	{
175	171	// cassette 1 read
176		return (space.machine().device<cassette_image_device>(CASSETTE_TAG)->input() > +0.0) ? 1 : 0;
	172	return (machine().device<cassette_image_device>(CASSETTE_TAG)->input() > +0.0) ? 1 : 0;
177	173	}
178	174
179		static WRITE8_DEVICE_HANDLER( cass1_motor_w )
	175	WRITE8_MEMBER(pet_state::cass1_motor_w)
180	176	{
181		pet_state *state = space.machine().driver_data<pet_state>();
182	177	if (!data)
183	178	{
184		space.machine().device<cassette_image_device>(CASSETTE_TAG)->change_state(CASSETTE_MOTOR_ENABLED,CASSETTE_MASK_MOTOR);
185		state->m_datasette1_timer->adjust(attotime::zero, 0, attotime::from_hz(48000));   // I put 48000 because I was given some .wav with this freq
	179	machine().device<cassette_image_device>(CASSETTE_TAG)->change_state(CASSETTE_MOTOR_ENABLED,CASSETTE_MASK_MOTOR);
	180	m_datasette1_timer->adjust(attotime::zero, 0, attotime::from_hz(48000));   // I put 48000 because I was given some .wav with this freq
186	181	}
187	182	else
188	183	{
189		space.machine().device<cassette_image_device>(CASSETTE_TAG)->change_state(CASSETTE_MOTOR_DISABLED ,CASSETTE_MASK_MOTOR);
190		state->m_datasette1_timer->reset();
	184	machine().device<cassette_image_device>(CASSETTE_TAG)->change_state(CASSETTE_MOTOR_DISABLED ,CASSETTE_MASK_MOTOR);
	185	m_datasette1_timer->reset();
191	186	}
192	187	}
193	188
194		static WRITE_LINE_DEVICE_HANDLER( pia0_irq_w )
	189	WRITE_LINE_MEMBER(pet_state::pia0_irq_w)
195	190	{
196		pet_state *driver_state = device->machine().driver_data<pet_state>();
	191	m_pia0_irq = state;
	192	int level = (m_pia0_irq | m_pia1_irq | m_via_irq) ? ASSERT_LINE : CLEAR_LINE;
197	193
198		driver_state->m_pia0_irq = state;
199		int level = (driver_state->m_pia0_irq | driver_state->m_pia1_irq | driver_state->m_via_irq) ? ASSERT_LINE : CLEAR_LINE;
200
201		device->machine().firstcpu->set_input_line(INPUT_LINE_IRQ0, level);
	194	machine().firstcpu->set_input_line(INPUT_LINE_IRQ0, level);
202	195	}
203	196
204	197	const pia6821_interface pet_pia0 =
205	198	{
206		DEVCB_HANDLER(pia0_pa_r),      /* in_a_func */
207		DEVCB_HANDLER(kin_r),         /* in_b_func */
208		DEVCB_HANDLER(cass1_r),         /* in_ca1_func */
	199	DEVCB_DRIVER_MEMBER(pet_state,pia0_pa_r),      /* in_a_func */
	200	DEVCB_DRIVER_MEMBER(pet_state,kin_r),         /* in_b_func */
	201	DEVCB_DRIVER_MEMBER(pet_state,cass1_r),         /* in_ca1_func */
209	202	DEVCB_NULL,                  /* in_cb1_func */
210	203	DEVCB_NULL,                  /* in_ca2_func */
211	204	DEVCB_NULL,                  /* in_cb2_func */
212		DEVCB_HANDLER(pia0_pa_w),      /* out_a_func */
	205	DEVCB_DRIVER_MEMBER(pet_state,pia0_pa_w),      /* out_a_func */
213	206	DEVCB_NULL,                  /* out_b_func */
214	207	DEVCB_DEVICE_LINE_MEMBER(IEEE488_TAG, ieee488_device, eoi_w),         /* out_ca2_func */
215		DEVCB_HANDLER(cass1_motor_w),   /* out_cb2_func */
216		DEVCB_LINE(pia0_irq_w),         /* irq_a_func */
217		DEVCB_LINE(pia0_irq_w)         /* irq_b_func */
	208	DEVCB_DRIVER_MEMBER(pet_state,cass1_motor_w),   /* out_cb2_func */
	209	DEVCB_DRIVER_LINE_MEMBER(pet_state,pia0_irq_w),         /* irq_a_func */
	210	DEVCB_DRIVER_LINE_MEMBER(pet_state,pia0_irq_w)         /* irq_b_func */
218	211	};
219	212
220	213	const pia6821_interface petb_pia0 =
221	214	{
222		DEVCB_HANDLER(pia0_pa_r),      /* in_a_func */
223		DEVCB_HANDLER(petb_kin_r),      /* in_b_func */
224		DEVCB_HANDLER(cass1_r),         /* in_ca1_func */
	215	DEVCB_DRIVER_MEMBER(pet_state,pia0_pa_r),      /* in_a_func */
	216	DEVCB_DRIVER_MEMBER(pet_state,petb_kin_r),      /* in_b_func */
	217	DEVCB_DRIVER_MEMBER(pet_state,cass1_r),         /* in_ca1_func */
225	218	DEVCB_NULL,                  /* in_cb1_func */
226	219	DEVCB_NULL,                  /* in_ca2_func */
227	220	DEVCB_NULL,                  /* in_cb2_func */
228		DEVCB_HANDLER(pia0_pa_w),      /* out_a_func */
	221	DEVCB_DRIVER_MEMBER(pet_state,pia0_pa_w),      /* out_a_func */
229	222	DEVCB_NULL,                  /* out_b_func */
230	223	DEVCB_DEVICE_LINE_MEMBER(IEEE488_TAG, ieee488_device, eoi_w),         /* out_ca2_func */
231		DEVCB_HANDLER(cass1_motor_w),   /* out_cb2_func */
232		DEVCB_LINE(pia0_irq_w),         /* irq_a_func */
233		DEVCB_LINE(pia0_irq_w)         /* irq_b_func */
	224	DEVCB_DRIVER_MEMBER(pet_state,cass1_motor_w),   /* out_cb2_func */
	225	DEVCB_DRIVER_LINE_MEMBER(pet_state,pia0_irq_w),         /* irq_a_func */
	226	DEVCB_DRIVER_LINE_MEMBER(pet_state,pia0_irq_w)         /* irq_b_func */
234	227	};
235	228
236	229	/* pia at 0xe820 (ieee488)
r18257	r18258
242	235	cb2 dav out
243	236	*/
244	237
245		static WRITE_LINE_DEVICE_HANDLER( pia1_irq_w )
	238	WRITE_LINE_MEMBER(pet_state::pia1_irq_w)
246	239	{
247		pet_state *driver_state = device->machine().driver_data<pet_state>();
	240	m_pia1_irq = state;
	241	int level = (m_pia0_irq | m_pia1_irq | m_via_irq) ? ASSERT_LINE : CLEAR_LINE;
248	242
249		driver_state->m_pia1_irq = state;
250		int level = (driver_state->m_pia0_irq | driver_state->m_pia1_irq | driver_state->m_via_irq) ? ASSERT_LINE : CLEAR_LINE;
251
252		device->machine().firstcpu->set_input_line(INPUT_LINE_IRQ0, level);
	243	machine().firstcpu->set_input_line(INPUT_LINE_IRQ0, level);
253	244	}
254	245
255	246	const pia6821_interface pet_pia1 =
r18257	r18258
264	255	DEVCB_DEVICE_MEMBER(IEEE488_TAG, ieee488_device, dio_w),               /* out_b_func */
265	256	DEVCB_DEVICE_LINE_MEMBER(IEEE488_TAG, ieee488_device, ndac_w),               /* out_ca2_func */
266	257	DEVCB_DEVICE_LINE_MEMBER(IEEE488_TAG, ieee488_device, dav_w),               /* out_cb2_func */
267		DEVCB_LINE(pia1_irq_w),               /* irq_a_func */
268		DEVCB_LINE(pia1_irq_w)               /* irq_b_func */
	258	DEVCB_DRIVER_LINE_MEMBER(pet_state,pia1_irq_w),               /* irq_a_func */
	259	DEVCB_DRIVER_LINE_MEMBER(pet_state,pia1_irq_w)               /* irq_b_func */
269	260	};
270	261
271	262	/* userport, cassettes, rest ieee488
r18257	r18258
285	276	cb1 cassettes
286	277	cb2 user port
287	278	*/
288		static READ8_DEVICE_HANDLER( via_pb_r )
	279	READ8_MEMBER(pet_state::via_pb_r)
289	280	{
290	281	/*
291	282
r18257	r18258
302	293
303	294	*/
304	295
305		pet_state *state = space.machine().driver_data<pet_state>();
306	296	UINT8 data = 0;
307	297
308	298	/* not data accepted in */
309		data |= state->m_ieee->ndac_r();
	299	data |= m_ieee->ndac_r();
310	300
311	301	/* sync in */
312	302
313	303	/* not ready for data in */
314		data |= state->m_ieee->nrfd_r() << 6;
	304	data |= m_ieee->nrfd_r() << 6;
315	305
316	306	/* data valid in */
317		data |= state->m_ieee->dav_r() << 7;
	307	data |= m_ieee->dav_r() << 7;
318	308
319	309	return data;
320	310	}
321	311
322		static READ_LINE_DEVICE_HANDLER( cass2_r )
	312	READ_LINE_MEMBER(pet_state::cass2_r)
323	313	{
324	314	// cassette 2 read
325		return (device->machine().device<cassette_image_device>(CASSETTE2_TAG)->input() > +0.0) ? 1 : 0;
	315	return (machine().device<cassette_image_device>(CASSETTE2_TAG)->input() > +0.0) ? 1 : 0;
326	316	}
327	317
328		static WRITE8_DEVICE_HANDLER( via_pb_w )
	318	WRITE8_MEMBER(pet_state::via_pb_w)
329	319	{
330	320	/*
331	321
r18257	r18258
342	332
343	333	*/
344	334
345		pet_state *state = space.machine().driver_data<pet_state>();
346
347	335	/* not ready for data out */
348		state->m_ieee->nrfd_w(BIT(data, 1));
	336	m_ieee->nrfd_w(BIT(data, 1));
349	337
350	338	/* attention out */
351		state->m_ieee->atn_w(BIT(data, 2));
	339	m_ieee->atn_w(BIT(data, 2));
352	340
353	341	/* cassette write */
354		space.machine().device<cassette_image_device>(CASSETTE_TAG)->output(BIT(data, 3) ? -(0x5a9e >> 1) : +(0x5a9e >> 1));
355		space.machine().device<cassette_image_device>(CASSETTE2_TAG)->output(BIT(data, 3) ? -(0x5a9e >> 1) : +(0x5a9e >> 1));
	342	machine().device<cassette_image_device>(CASSETTE_TAG)->output(BIT(data, 3) ? -(0x5a9e >> 1) : +(0x5a9e >> 1));
	343	machine().device<cassette_image_device>(CASSETTE2_TAG)->output(BIT(data, 3) ? -(0x5a9e >> 1) : +(0x5a9e >> 1));
356	344
357	345	/* #2 cassette motor */
358	346	if (BIT(data, 4))
359	347	{
360		space.machine().device<cassette_image_device>(CASSETTE2_TAG)->change_state(CASSETTE_MOTOR_ENABLED, CASSETTE_MASK_MOTOR);
361		state->m_datasette2_timer->adjust(attotime::zero, 0, attotime::from_hz(48000));   // I put 48000 because I was given some .wav with this freq
	348	machine().device<cassette_image_device>(CASSETTE2_TAG)->change_state(CASSETTE_MOTOR_ENABLED, CASSETTE_MASK_MOTOR);
	349	m_datasette2_timer->adjust(attotime::zero, 0, attotime::from_hz(48000));   // I put 48000 because I was given some .wav with this freq
362	350	}
363	351	else
364	352	{
365		space.machine().device<cassette_image_device>(CASSETTE2_TAG)->change_state(CASSETTE_MOTOR_DISABLED, CASSETTE_MASK_MOTOR);
366		state->m_datasette2_timer->reset();
	353	machine().device<cassette_image_device>(CASSETTE2_TAG)->change_state(CASSETTE_MOTOR_DISABLED, CASSETTE_MASK_MOTOR);
	354	m_datasette2_timer->reset();
367	355	}
368	356	}
369	357
370		static WRITE_LINE_DEVICE_HANDLER( gb_w )
	358	WRITE_LINE_MEMBER(pet_state::gb_w)
371	359	{
372		pet_state *drvstate = device->machine().driver_data<pet_state>();
373		DBG_LOG(device->machine(), 1, "address line", ("%d\n", state));
374		if (state) drvstate->m_font |= 1;
375		else drvstate->m_font &= ~1;
	360	DBG_LOG(machine(), 1, "address line", ("%d\n", state));
	361	if (state) m_font |= 1;
	362	else m_font &= ~1;
376	363	}
377	364
378		static WRITE_LINE_DEVICE_HANDLER( via_irq_w )
	365	WRITE_LINE_MEMBER(pet_state::via_irq_w)
379	366	{
380		pet_state *driver_state = device->machine().driver_data<pet_state>();
	367	m_via_irq = state;
	368	int level = (m_pia0_irq | m_pia1_irq | m_via_irq) ? ASSERT_LINE : CLEAR_LINE;
381	369
382		driver_state->m_via_irq = state;
383		int level = (driver_state->m_pia0_irq | driver_state->m_pia1_irq | driver_state->m_via_irq) ? ASSERT_LINE : CLEAR_LINE;
384
385		device->machine().firstcpu->set_input_line(INPUT_LINE_IRQ0, level);
	370	machine().firstcpu->set_input_line(INPUT_LINE_IRQ0, level);
386	371	}
387	372
388	373	const via6522_interface pet_via =
389	374	{
390	375	DEVCB_NULL,               /* in_a_func */
391		DEVCB_HANDLER(via_pb_r),   /* in_b_func */
	376	DEVCB_DRIVER_MEMBER(pet_state,via_pb_r),   /* in_b_func */
392	377	DEVCB_NULL,               /* in_ca1_func */
393		DEVCB_LINE(cass2_r),      /* in_cb1_func */
	378	DEVCB_DRIVER_LINE_MEMBER(pet_state,cass2_r),      /* in_cb1_func */
394	379	DEVCB_NULL,               /* in_ca2_func */
395	380	DEVCB_NULL,               /* in_cb2_func */
396	381	DEVCB_NULL,               /* out_a_func */
397		DEVCB_HANDLER(via_pb_w),   /* out_b_func */
	382	DEVCB_DRIVER_MEMBER(pet_state,via_pb_w),   /* out_b_func */
398	383	DEVCB_NULL,               /* out_ca1_func */
399		DEVCB_LINE(gb_w),         /* out_ca2_func */
	384	DEVCB_DRIVER_LINE_MEMBER(pet_state,gb_w),         /* out_ca2_func */
400	385	DEVCB_NULL,               /* out_ca2_func */
401	386	DEVCB_NULL,               /* out_cb2_func */
402		DEVCB_LINE(via_irq_w)      /* out_irq_func */
	387	DEVCB_DRIVER_LINE_MEMBER(pet_state,via_irq_w)      /* out_irq_func */
403	388	};
404	389
405	390

trunk/src/mess/machine/concept.c

r18257	r18258
39	39	/*static int ready;*/         /* ready line from monochip, role unknown */
40	40
41	41	/* Via */
42		static DECLARE_READ8_DEVICE_HANDLER(via_in_a);
43		static DECLARE_WRITE8_DEVICE_HANDLER(via_out_a);
44		static DECLARE_READ8_DEVICE_HANDLER(via_in_b);
45		static DECLARE_WRITE8_DEVICE_HANDLER(via_out_b);
46		static DECLARE_WRITE8_DEVICE_HANDLER(via_out_cb2);
47	42	static void via_irq_func(device_t *device, int state);
48	43
49	44
50	45	const via6522_interface concept_via6522_intf =
51	46	{   /* main via */
52		DEVCB_HANDLER(via_in_a), DEVCB_HANDLER(via_in_b),
	47	DEVCB_DRIVER_MEMBER(concept_state,via_in_a), DEVCB_DRIVER_MEMBER(concept_state,via_in_b),
53	48	DEVCB_NULL, DEVCB_NULL,
54	49	DEVCB_NULL, DEVCB_NULL,
55		DEVCB_HANDLER(via_out_a), DEVCB_HANDLER(via_out_b),
	50	DEVCB_DRIVER_MEMBER(concept_state,via_out_a), DEVCB_DRIVER_MEMBER(concept_state,via_out_b),
56	51	DEVCB_NULL, DEVCB_NULL,
57		DEVCB_NULL, DEVCB_HANDLER(via_out_cb2),
	52	DEVCB_NULL, DEVCB_DRIVER_MEMBER(concept_state,via_out_cb2),
58	53	DEVCB_LINE(via_irq_func)
59	54	};
60	55
r18257	r18258
195	190	6: DCD1 (I)
196	191	7: IOX (O)
197	192	*/
198		static  READ8_DEVICE_HANDLER(via_in_a)
	193	READ8_MEMBER(concept_state::via_in_a)
199	194	{
200	195	LOG(("via_in_a: VIA port A (Omninet and COMM port status) read\n"));
201	196	return 1;      /* omninet ready always 1 */
202	197	}
203	198
204		static WRITE8_DEVICE_HANDLER(via_out_a)
	199	WRITE8_MEMBER(concept_state::via_out_a)
205	200	{
206	201	LOG(("via_out_a: VIA port A status written: data=0x%2.2x\n", data));
207	202	/*iox = (data & 0x80) != 0;*/
r18257	r18258
219	214	6: boot switch 0 (I)
220	215	7: boot switch 1 (I)
221	216	*/
222		static READ8_DEVICE_HANDLER(via_in_b)
	217	READ8_MEMBER(concept_state::via_in_b)
223	218	{
224	219	UINT8 status;
225	220
226		status = ((space.machine().root_device().ioport("DSW0")->read() & 0x80) >> 1) | ((space.machine().root_device().ioport("DSW0")->read() & 0x40) << 1);
	221	status = ((machine().root_device().ioport("DSW0")->read() & 0x80) >> 1) | ((machine().root_device().ioport("DSW0")->read() & 0x40) << 1);
227	222	LOG(("via_in_b: VIA port B (DIP switches, Video, Comm Rate) - status: 0x%2.2x\n", status));
228	223	return status;
229	224	}
230	225
231		static WRITE8_DEVICE_HANDLER(via_out_b)
	226	WRITE8_MEMBER(concept_state::via_out_b)
232	227	{
233	228	VLOG(("via_out_b: VIA port B (Video Control and COMM rate select) written: data=0x%2.2x\n", data));
234	229	}
r18257	r18258
236	231	/*
237	232	VIA CB2: used as sound output
238	233	*/
239		static WRITE8_DEVICE_HANDLER(via_out_cb2)
	234	WRITE8_MEMBER(concept_state::via_out_cb2)
240	235	{
241	236	LOG(("via_out_cb2: Sound control written: data=0x%2.2x\n", data));
242	237	}
r18257	r18258
551	546	install_expansion_slot(slot, read8_delegate(FUNC(concept_state::concept_fdc_reg_r),this), write8_delegate(FUNC(concept_state::concept_fdc_reg_w),this), read8_delegate(FUNC(concept_state::concept_fdc_rom_r),this), write8_delegate());
552	547	}
553	548
554		static WRITE_LINE_DEVICE_HANDLER( concept_fdc_intrq_w )
	549	WRITE_LINE_MEMBER(concept_state::concept_fdc_intrq_w)
555	550	{
556		concept_state *drvstate = device->machine().driver_data<concept_state>();
557	551	if (state)
558		drvstate->m_fdc_local_status |= LS_INT_mask;
	552	m_fdc_local_status |= LS_INT_mask;
559	553	else
560		drvstate->m_fdc_local_status &= ~LS_INT_mask;
	554	m_fdc_local_status &= ~LS_INT_mask;
561	555	}
562	556
563		static WRITE_LINE_DEVICE_HANDLER( concept_fdc_drq_w )
	557	WRITE_LINE_MEMBER(concept_state::concept_fdc_drq_w)
564	558	{
565		concept_state *drvstate = device->machine().driver_data<concept_state>();
566	559	if (state)
567		drvstate->m_fdc_local_status |= LS_DRQ_mask;
	560	m_fdc_local_status |= LS_DRQ_mask;
568	561	else
569		drvstate->m_fdc_local_status &= ~LS_DRQ_mask;
	562	m_fdc_local_status &= ~LS_DRQ_mask;
570	563	}
571	564
572	565	const wd17xx_interface concept_wd17xx_interface =
573	566	{
574	567	DEVCB_NULL,
575		DEVCB_LINE(concept_fdc_intrq_w),
576		DEVCB_LINE(concept_fdc_drq_w),
	568	DEVCB_DRIVER_LINE_MEMBER(concept_state,concept_fdc_intrq_w),
	569	DEVCB_DRIVER_LINE_MEMBER(concept_state,concept_fdc_drq_w),
577	570	{FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3}
578	571	};
579	572

trunk/src/mess/machine/sms.c

r18257	r18258
770	770	Check if the pause button is pressed.
771	771	If the gamegear is in sms mode, check if the start button is pressed.
772	772	*/
773		WRITE_LINE_DEVICE_HANDLER( sms_pause_callback )
	773	WRITE_LINE_MEMBER(sms_state::sms_pause_callback)
774	774	{
775		sms_state *driver_state = device->machine().driver_data<sms_state>();
776
777		if (driver_state->m_is_gamegear && !(driver_state->m_cartridge[driver_state->m_current_cartridge].features & CF_GG_SMS_MODE))
	775	if (m_is_gamegear && !(m_cartridge[m_current_cartridge].features & CF_GG_SMS_MODE))
778	776	return;
779	777
780		if (!(driver_state->ioport(driver_state->m_is_gamegear ? "START" : "PAUSE")->read() & 0x80))
	778	if (!(ioport(m_is_gamegear ? "START" : "PAUSE")->read() & 0x80))
781	779	{
782		if (!driver_state->m_paused)
	780	if (!m_paused)
783	781	{
784		device->machine().device("maincpu")->execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE);
	782	machine().device("maincpu")->execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE);
785	783	}
786		driver_state->m_paused = 1;
	784	m_paused = 1;
787	785	}
788	786	else
789	787	{
790		driver_state->m_paused = 0;
	788	m_paused = 0;
791	789	}
792	790
793	791	/* clear Light Phaser latch flags for next frame */
794		driver_state->m_lphaser_1_latch = 0;
795		driver_state->m_lphaser_2_latch = 0;
	792	m_lphaser_1_latch = 0;
	793	m_lphaser_2_latch = 0;
796	794	}
797	795
798	796	READ8_MEMBER(sms_state::sms_input_port_0_r)
r18257	r18258
2095	2093	m_store_control = data;
2096	2094	}
2097	2095
2098		WRITE_LINE_DEVICE_HANDLER( sms_store_int_callback )
	2096	WRITE_LINE_MEMBER(sms_state::sms_store_int_callback)
2099	2097	{
2100		sms_state *driver_state = device->machine().driver_data<sms_state>();
2101		(driver_state->m_store_control & 0x01 ? driver_state->m_control_cpu : driver_state->m_main_cpu)->execute().set_input_line(0, state);
	2098	(m_store_control & 0x01 ? m_control_cpu : m_main_cpu)->execute().set_input_line(0, state);
2102	2099	}
2103	2100
2104	2101

trunk/src/mess/machine/super80.c

r18257	r18258
12	12	m_keylatch = data;
13	13	};
14	14
15		static READ8_DEVICE_HANDLER( pio_port_b_r ) // cannot be modernised yet as super80 hangs at start
	15	READ8_MEMBER(super80_state::pio_port_b_r)// cannot be modernised yet as super80 hangs at start
16	16	{
17		super80_state *state = space.machine().driver_data<super80_state>();
18	17	char kbdrow[6];
19	18	UINT8 i;
20	19	UINT8 data = 0xff;
r18257	r18258
22	21	for (i = 0; i < 8; i++)
23	22	{
24	23	sprintf(kbdrow,"X%d",i);
25		if (!BIT(state->m_keylatch, i)) data &= state->ioport(kbdrow)->read();
	24	if (!BIT(m_keylatch, i)) data &= ioport(kbdrow)->read();
26	25	}
27	26
28	27	return data;
r18257	r18258
34	33	DEVCB_NULL,
35	34	DEVCB_DRIVER_MEMBER(super80_state, pio_port_a_w),
36	35	DEVCB_NULL,         /* portA ready active callback (not used in super80) */
37		DEVCB_HANDLER(pio_port_b_r),
	36	DEVCB_DRIVER_MEMBER(super80_state,pio_port_b_r),
38	37	DEVCB_NULL,
39	38	DEVCB_NULL         /* portB ready active callback (not used in super80) */
40	39	};
r18257	r18258
93	92	m_cass_data[1] = 0;
94	93	}
95	94
96		m_pio->port_b_write(pio_port_b_r(m_pio,generic_space(),0,0xff));
	95	m_pio->port_b_write(pio_port_b_r(generic_space(),0,0xff));
97	96	}
98	97
99	98	/* after the first 4 bytes have been read from ROM, switch the ram back in */

trunk/src/mess/machine/cgenie.c

r18257	r18258
419	419	}
420	420	}
421	421
422		static WRITE_LINE_DEVICE_HANDLER( cgenie_fdc_intrq_w )
	422	WRITE_LINE_MEMBER(cgenie_state::cgenie_fdc_intrq_w)
423	423	{
424		cgenie_state *drvstate = device->machine().driver_data<cgenie_state>();
425	424	/* if disc hardware is not enabled, do not cause an int */
426		if (!( drvstate->ioport("DSW0")->read() & 0x80 ))
	425	if (!( ioport("DSW0")->read() & 0x80 ))
427	426	return;
428	427
429	428	if (state)
430	429	{
431		if( (drvstate->m_irq_status & IRQ_FDC) == 0 )
	430	if( (m_irq_status & IRQ_FDC) == 0 )
432	431	{
433		drvstate->m_irq_status |= IRQ_FDC;
434		device->machine().device("maincpu")->execute().set_input_line(0, HOLD_LINE);
	432	m_irq_status |= IRQ_FDC;
	433	machine().device("maincpu")->execute().set_input_line(0, HOLD_LINE);
435	434	}
436	435	}
437	436	else
438	437	{
439		drvstate->m_irq_status &= ~IRQ_FDC;
	438	m_irq_status &= ~IRQ_FDC;
440	439	}
441	440	}
442	441
443	442	const wd17xx_interface cgenie_wd17xx_interface =
444	443	{
445	444	DEVCB_NULL,
446		DEVCB_LINE(cgenie_fdc_intrq_w),
	445	DEVCB_DRIVER_LINE_MEMBER(cgenie_state,cgenie_fdc_intrq_w),
447	446	DEVCB_NULL,
448	447	{FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3}
449	448	};
r18257	r18258
601	600	}
602	601
603	602
604		READ8_DEVICE_HANDLER( cgenie_sh_control_port_r )
	603	READ8_MEMBER(cgenie_state::cgenie_sh_control_port_r)
605	604	{
606		cgenie_state *state = space.machine().driver_data<cgenie_state>();
607		return state->m_control_port;
	605	return m_control_port;
608	606	}
609	607
610		WRITE8_DEVICE_HANDLER( cgenie_sh_control_port_w )
	608	WRITE8_MEMBER(cgenie_state::cgenie_sh_control_port_w)
611	609	{
612		cgenie_state *state = space.machine().driver_data<cgenie_state>();
613		state->m_control_port = data;
614		ay8910_address_w(device, space, offset, data);
	610	m_control_port = data;
	611	ay8910_address_w(machine().device("ay8910"), space, offset, data);
615	612	}

trunk/src/mess/machine/mz700.c

r18257	r18258
36	36	} while (0)
37	37
38	38
39		static DECLARE_READ8_DEVICE_HANDLER ( pio_port_b_r );
40		static DECLARE_READ8_DEVICE_HANDLER ( pio_port_c_r );
41		static DECLARE_WRITE8_DEVICE_HANDLER ( pio_port_a_w );
42		static DECLARE_WRITE8_DEVICE_HANDLER ( pio_port_c_w );
43
44	39	I8255_INTERFACE( mz700_ppi8255_interface )
45	40	{
46	41	DEVCB_NULL,
47		DEVCB_DEVICE_HANDLER("ls145", pio_port_a_w),
48		DEVCB_DEVICE_HANDLER("ls145", pio_port_b_r),
	42	DEVCB_DRIVER_MEMBER(mz_state,pio_port_a_w),
	43	DEVCB_DRIVER_MEMBER(mz_state,pio_port_b_r),
49	44	DEVCB_NULL,
50		DEVCB_DEVICE_HANDLER("ppi8255", pio_port_c_r),
51		DEVCB_DEVICE_HANDLER("ppi8255", pio_port_c_w)
	45	DEVCB_DRIVER_MEMBER(mz_state,pio_port_c_r),
	46	DEVCB_DRIVER_MEMBER(mz_state,pio_port_c_w)
52	47	};
53	48
54	49
55		static WRITE_LINE_DEVICE_HANDLER( pit_out0_changed );
56		static WRITE_LINE_DEVICE_HANDLER( pit_irq_2 );
57	50
	51
	52
58	53	const struct pit8253_config mz700_pit8253_config =
59	54	{
60	55	{
61	56	/* clockin             gate            callback */
62		{ XTAL_17_73447MHz/20, DEVCB_NULL,     DEVCB_DEVICE_LINE("pit8253", pit_out0_changed) },
	57	{ XTAL_17_73447MHz/20, DEVCB_NULL,     DEVCB_DRIVER_LINE_MEMBER(mz_state,pit_out0_changed) },
63	58	{             15611.0, DEVCB_LINE_VCC, DEVCB_DEVICE_LINE("pit8253", pit8253_clk2_w)   },
64		{                  0, DEVCB_LINE_VCC, DEVCB_DEVICE_LINE("pit8253", pit_irq_2)        },
	59	{                  0, DEVCB_LINE_VCC, DEVCB_DRIVER_LINE_MEMBER(mz_state,pit_irq_2)        },
65	60	}
66	61	};
67	62
r18257	r18258
69	64	{
70	65	{
71	66	/* clockin             gate            callback */
72		{ XTAL_17_73447MHz/16, DEVCB_NULL,     DEVCB_DEVICE_LINE("pit8253", pit_out0_changed) },
	67	{ XTAL_17_73447MHz/16, DEVCB_NULL,     DEVCB_DRIVER_LINE_MEMBER(mz_state,pit_out0_changed) },
73	68	{             15611.0, DEVCB_LINE_VCC, DEVCB_DEVICE_LINE("pit8253", pit8253_clk2_w)   },
74		{                  0, DEVCB_LINE_VCC, DEVCB_DEVICE_LINE("pit8253", pit_irq_2)        },
	69	{                  0, DEVCB_LINE_VCC, DEVCB_DRIVER_LINE_MEMBER(mz_state,pit_irq_2)        },
75	70	}
76	71	};
77	72
r18257	r18258
407	402
408	403	/* Timer 0 is the clock for the speaker output */
409	404
410		static WRITE_LINE_DEVICE_HANDLER( pit_out0_changed )
	405	WRITE_LINE_MEMBER(mz_state::pit_out0_changed)
411	406	{
412		mz_state *drvstate = device->machine().driver_data<mz_state>();
413		device_t *speaker = device->machine().device(SPEAKER_TAG);
414		if((drvstate->m_prev_state==0) && (state==1)) {
415		drvstate->m_speaker_level ^= 1;
	407	device_t *speaker = machine().device(SPEAKER_TAG);
	408	if((m_prev_state==0) && (state==1)) {
	409	m_speaker_level ^= 1;
416	410	}
417		drvstate->m_prev_state = state;
418		speaker_level_w( speaker, drvstate->m_speaker_level);
	411	m_prev_state = state;
	412	speaker_level_w( speaker, m_speaker_level);
419	413	}
420	414
421	415	/* timer 2 is the AM/PM (12 hour) interrupt */
422		static WRITE_LINE_DEVICE_HANDLER( pit_irq_2 )
	416	WRITE_LINE_MEMBER(mz_state::pit_irq_2)
423	417	{
424		mz_state *mz = device->machine().driver_data<mz_state>();
425
426		if (!mz->m_intmsk)
427		device->machine().device("maincpu")->execute().set_input_line(0, state);
	418	if (!m_intmsk)
	419	machine().device("maincpu")->execute().set_input_line(0, state);
428	420	}
429	421
430	422
r18257	r18258
432	424	8255 PPI
433	425	***************************************************************************/
434	426
435		static READ8_DEVICE_HANDLER( pio_port_b_r )
	427	READ8_MEMBER(mz_state::pio_port_b_r)
436	428	{
	429	device_t *device = machine().device("ls145");
437	430	int key_line = dynamic_cast<ttl74145_device *>(device)->read();
438	431	const char *const keynames[10] = { "ROW0", "ROW1", "ROW2", "ROW3", "ROW4", "ROW5", "ROW6", "ROW7", "ROW8", "ROW9" };
439	432	int i;
r18257	r18258
442	435	for(i=0;i<10;i++)
443	436	{
444	437	if(key_line & (1 << i))
445		res |= space.machine().root_device().ioport(keynames[i])->read();
	438	res |= machine().root_device().ioport(keynames[i])->read();
446	439	}
447	440
448	441	return res;
r18257	r18258
454	447	* bit 5 in     tape data (RDATA)
455	448	* bit 4 in     motor (1 = on)
456	449	*/
457		static READ8_DEVICE_HANDLER( pio_port_c_r )
	450	READ8_MEMBER(mz_state::pio_port_c_r)
458	451	{
459		cassette_image_device *cas = space.machine().device<cassette_image_device>(CASSETTE_TAG);
460		mz_state *mz = space.machine().driver_data<mz_state>();
	452	cassette_image_device *cas = machine().device<cassette_image_device>(CASSETTE_TAG);
461	453	UINT8 data = 0;
462	454
463	455	/* note: this is actually connected to Q output of the motor-control flip-flop (see below) */
r18257	r18258
467	459	if ((cas)->input() > 0.0038)
468	460	data |= 0x20;       /* set the RDATA status */
469	461
470		data |= mz->m_cursor_timer << 6;
471		data |= space.machine().primary_screen->vblank() << 7;
	462	data |= m_cursor_timer << 6;
	463	data |= machine().primary_screen->vblank() << 7;
472	464
473		LOG(2,"mz700_pio_port_c_r",("%02X\n", data),space.machine());
	465	LOG(2,"mz700_pio_port_c_r",("%02X\n", data),machine());
474	466
475	467	return data;
476	468	}
477	469
478	470
479		static WRITE8_DEVICE_HANDLER( pio_port_a_w )
	471	WRITE8_MEMBER(mz_state::pio_port_a_w)
480	472	{
481		timer_device *timer = space.machine().device<timer_device>("cursor");
	473	device_t *device = machine().device("ls145");
	474	timer_device *timer = machine().device<timer_device>("cursor");
482	475
483		LOG(2,"mz700_pio_port_a_w",("%02X\n", data),space.machine());
	476	LOG(2,"mz700_pio_port_a_w",("%02X\n", data),machine());
484	477
485	478	/* the ls145 is connected to PA0-PA3 */
486	479	dynamic_cast<ttl74145_device *>(device)->write(data & 0x07);
r18257	r18258
490	483	}
491	484
492	485
493		static WRITE8_DEVICE_HANDLER( pio_port_c_w )
	486	WRITE8_MEMBER(mz_state::pio_port_c_w)
494	487	{
495	488	/*
496	489	* bit 3 out    motor control (0 = on)
r18257	r18258
499	492	* bit 0 out    unused
500	493	*/
501	494
502		//  UINT8 state = cassette_get_state(space.machine().device<cassette_image_device>(CASSETTE_TAG));
	495	//  UINT8 state = cassette_get_state(machine().device<cassette_image_device>(CASSETTE_TAG));
503	496	//  UINT8 action = ((~pio_port_c_output & 8) & (data & 8));     /* detect low-to-high transition */
504	497
505	498	/* The motor control circuit consists of a resistor, capacitor, invertor, nand-gate, and D flip-flop.
r18257	r18258
512	505	If you load from the command-line or the software-picker, type in L <enter> immediately. */
513	506	#if 0
514	507
515		space.machine().device<cassette_image_device>(CASSETTE_TAG)->change_state(
	508	machine().device<cassette_image_device>(CASSETTE_TAG)->change_state(
516	509	((data & 0x08) && mz700_motor_on) ? CASSETTE_MOTOR_ENABLED : CASSETTE_MOTOR_DISABLED,
517	510	CASSETTE_MOTOR_DISABLED);
518	511
519	512	#endif
520	513
521		LOG(2,"mz700_pio_port_c_w",("%02X\n", data),space.machine());
	514	LOG(2,"mz700_pio_port_c_w",("%02X\n", data),machine());
522	515
523		space.machine().device<cassette_image_device>(CASSETTE_TAG)->output((data & 0x02) ? +1.0 : -1.0);
	516	machine().device<cassette_image_device>(CASSETTE_TAG)->output((data & 0x02) ? +1.0 : -1.0);
524	517	}
525	518
526	519
r18257	r18258
543	536	device->machine().device("maincpu")->execute().set_input_line(0, which);
544	537	}
545	538
546		static READ8_DEVICE_HANDLER( mz800_z80pio_port_a_r )
	539	READ8_MEMBER(mz_state::mz800_z80pio_port_a_r)
547	540	{
548		centronics_device *centronics = space.machine().device<centronics_device>("centronics");
	541	centronics_device *centronics = machine().device<centronics_device>("centronics");
549	542	UINT8 result = 0;
550	543
551	544	result |= centronics->busy_r();
552	545	result |= centronics->pe_r() << 1;
553		result |= space.machine().primary_screen->hblank() << 5;
	546	result |= machine().primary_screen->hblank() << 5;
554	547
555	548	return result;
556	549	}
557	550
558		static WRITE8_DEVICE_HANDLER( mz800_z80pio_port_a_w )
	551	WRITE8_MEMBER(mz_state::mz800_z80pio_port_a_w)
559	552	{
560		centronics_device *centronics = space.machine().device<centronics_device>("centronics");
	553	centronics_device *centronics = machine().device<centronics_device>("centronics");
561	554
562	555	centronics->init_prime_w(BIT(data, 6));
563	556	centronics->strobe_w(BIT(data, 7));
r18257	r18258
566	559	const z80pio_interface mz800_z80pio_config =
567	560	{
568	561	DEVCB_DEVICE_LINE("z80pio", mz800_z80pio_irq),
569		DEVCB_DEVICE_HANDLER("z80pio", mz800_z80pio_port_a_r),
570		DEVCB_DEVICE_HANDLER("z80pio", mz800_z80pio_port_a_w),
	562	DEVCB_DRIVER_MEMBER(mz_state,mz800_z80pio_port_a_r),
	563	DEVCB_DRIVER_MEMBER(mz_state,mz800_z80pio_port_a_w),
571	564	DEVCB_NULL,
572	565	DEVCB_NULL,
573	566	DEVCB_DEVICE_MEMBER("centronics", centronics_device, write),

trunk/src/mess/machine/rmnimbus.c

r18257	r18258
67	67
68	68	#include "includes/rmnimbus.h"
69	69
70		static WRITE_LINE_DEVICE_HANDLER( sio_interrupt );
71		//static DECLARE_WRITE8_DEVICE_HANDLER( sio_dtr_w );
72		static DECLARE_WRITE16_DEVICE_HANDLER( sio_serial_transmit );
73		static DECLARE_READ16_DEVICE_HANDLER( sio_serial_receive );
74	70
75	71
76	72	/*-------------------------------------------------------------------------*/
r18257	r18258
113	109
114	110	const z80sio_interface nimbus_sio_intf =
115	111	{
116		DEVCB_LINE(sio_interrupt),         /* interrupt handler */
	112	DEVCB_DRIVER_LINE_MEMBER(rmnimbus_state,sio_interrupt),         /* interrupt handler */
117	113	DEVCB_NULL, //sio_dtr_w,             /* DTR changed handler */
118	114	DEVCB_NULL,                  /* RTS changed handler */
119	115	DEVCB_NULL,                  /* BREAK changed handler */
120		DEVCB_HANDLER(sio_serial_transmit),   /* transmit handler */
121		DEVCB_HANDLER(sio_serial_receive)      /* receive handler */
	116	DEVCB_DRIVER_MEMBER16(rmnimbus_state,sio_serial_transmit),   /* transmit handler */
	117	DEVCB_DRIVER_MEMBER16(rmnimbus_state,sio_serial_receive)      /* receive handler */
122	118	};
123	119
124	120	/* Floppy drives WD2793 */
125	121
126		static WRITE_LINE_DEVICE_HANDLER( nimbus_fdc_intrq_w );
127		static WRITE_LINE_DEVICE_HANDLER( nimbus_fdc_drq_w );
128	122
	123
	124
129	125	const wd17xx_interface nimbus_wd17xx_interface =
130	126	{
131	127	DEVCB_LINE_GND,
132		DEVCB_LINE(nimbus_fdc_intrq_w),
133		DEVCB_LINE(nimbus_fdc_drq_w),
	128	DEVCB_DRIVER_LINE_MEMBER(rmnimbus_state,nimbus_fdc_intrq_w),
	129	DEVCB_DRIVER_LINE_MEMBER(rmnimbus_state,nimbus_fdc_drq_w),
134	130	{FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3}
135	131	};
136	132
r18257	r18258
2182	2178
2183	2179	/* Z80 SIO/2 */
2184	2180
2185		static WRITE_LINE_DEVICE_HANDLER( sio_interrupt )
	2181	WRITE_LINE_MEMBER(rmnimbus_state::sio_interrupt)
2186	2182	{
2187		rmnimbus_state *drvstate = device->machine().driver_data<rmnimbus_state>();
2188	2183	if(LOG_SIO)
2189	2184	logerror("SIO Interrupt state=%02X\n",state);
2190	2185
2191	2186	// Don't re-trigger if already active !
2192		if(state!=drvstate->m_sio_int_state)
	2187	if(state!=m_sio_int_state)
2193	2188	{
2194		drvstate->m_sio_int_state=state;
	2189	m_sio_int_state=state;
2195	2190
2196	2191	if(state)
2197		external_int(device->machine(),0,EXTERNAL_INT_Z80SIO);
	2192	external_int(machine(),0,EXTERNAL_INT_Z80SIO);
2198	2193	}
2199	2194	}
2200	2195
2201	2196	#ifdef UNUSED_FUNCTION
2202		WRITE8_DEVICE_HANDLER( sio_dtr_w )
	2197	WRITE8_MEMBER(rmnimbus_state::sio_dtr_w)
2203	2198	{
2204	2199	if (offset == 1)
2205	2200	{
r18257	r18258
2207	2202	}
2208	2203	#endif
2209	2204
2210		static WRITE16_DEVICE_HANDLER( sio_serial_transmit )
	2205	WRITE16_MEMBER(rmnimbus_state::sio_serial_transmit)
2211	2206	{
2212	2207	}
2213	2208
2214		static READ16_DEVICE_HANDLER( sio_serial_receive )
	2209	READ16_MEMBER(rmnimbus_state::sio_serial_receive)
2215	2210	{
2216	2211	if(offset==0)
2217	2212	{
2218		return keyboard_queue_read(space.machine());
	2213	return keyboard_queue_read(machine());
2219	2214	}
2220	2215	else
2221	2216	return -1;
r18257	r18258
2250	2245	}
2251	2246	}
2252	2247
2253		static WRITE_LINE_DEVICE_HANDLER( nimbus_fdc_intrq_w )
	2248	WRITE_LINE_MEMBER(rmnimbus_state::nimbus_fdc_intrq_w)
2254	2249	{
2255		set_disk_int(device->machine(),state);
	2250	set_disk_int(machine(),state);
2256	2251	}
2257	2252
2258		static WRITE_LINE_DEVICE_HANDLER( nimbus_fdc_drq_w )
	2253	WRITE_LINE_MEMBER(rmnimbus_state::nimbus_fdc_drq_w)
2259	2254	{
2260		rmnimbus_state *drvstate = device->machine().driver_data<rmnimbus_state>();
2261
2262	2255	if(LOG_DISK)
2263	2256	logerror("nimbus_drives_drq_w(%d)\n", state);
2264	2257
2265		if(state && FDC_DRQ_ENABLED(drvstate))
2266		drq_callback(device->machine(),1);
	2258	if(state && FDC_DRQ_ENABLED(this))
	2259	drq_callback(machine(),1);
2267	2260	}
2268	2261
2269	2262	static UINT8 fdc_driveno(UINT8 drivesel)
r18257	r18258
3017	3010	***********************************************************************/
3018	3011
3019	3012	/* USER VIA 6522 port B is connected to the BBC user port */
3020		static READ8_DEVICE_HANDLER( nimbus_via_read_portb )
	3013	READ8_MEMBER(rmnimbus_state::nimbus_via_read_portb)
3021	3014	{
3022	3015	return 0xff;
3023	3016	}
3024	3017
3025		static WRITE8_DEVICE_HANDLER( nimbus_via_write_portb )
	3018	WRITE8_MEMBER(rmnimbus_state::nimbus_via_write_portb)
3026	3019	{
3027	3020	}
3028	3021
3029		static WRITE_LINE_DEVICE_HANDLER( nimbus_via_irq_w )
	3022	WRITE_LINE_MEMBER(rmnimbus_state::nimbus_via_irq_w)
3030	3023	{
3031	3024	if(state)
3032		external_int(device->machine(),VIA_INT,0x00);
	3025	external_int(machine(),VIA_INT,0x00);
3033	3026	}
3034	3027
3035	3028	const via6522_interface nimbus_via =
3036	3029	{
3037	3030	DEVCB_NULL,   //via_user_read_porta,
3038		DEVCB_HANDLER(nimbus_via_read_portb),
	3031	DEVCB_DRIVER_MEMBER(rmnimbus_state,nimbus_via_read_portb),
3039	3032	DEVCB_NULL,   //via_user_read_ca1,
3040	3033	DEVCB_NULL,   //via_user_read_cb1,
3041	3034	DEVCB_NULL,   //via_user_read_ca2,
3042	3035	DEVCB_NULL,   //via_user_read_cb2,
3043	3036	DEVCB_DEVICE_MEMBER(CENTRONICS_TAG, centronics_device, write),
3044		DEVCB_HANDLER(nimbus_via_write_portb),
	3037	DEVCB_DRIVER_MEMBER(rmnimbus_state,nimbus_via_write_portb),
3045	3038	DEVCB_NULL, //via_user_write_ca1
3046	3039	DEVCB_NULL, //via_user_write_cb1
3047	3040	DEVCB_DEVICE_LINE_MEMBER(CENTRONICS_TAG, centronics_device, strobe_w),
3048	3041	DEVCB_NULL,   //via_user_write_cb2,
3049		DEVCB_LINE(nimbus_via_irq_w)
	3042	DEVCB_DRIVER_LINE_MEMBER(rmnimbus_state,nimbus_via_irq_w)
3050	3043	};
3051	3044
3052		WRITE_LINE_DEVICE_HANDLER(nimbus_ack_w)
	3045	WRITE_LINE_MEMBER(rmnimbus_state::nimbus_ack_w)
3053	3046	{
3054		via6522_device *via_1 = device->machine().device<via6522_device>(VIA_TAG);
	3047	via6522_device *via_1 = machine().device<via6522_device>(VIA_TAG);
3055	3048	via_1->write_ca1(!state); /* ack seems to be inverted? */
3056	3049	}
3057	3050

trunk/src/mess/machine/mac.c

r18257	r18258
104	104	#include "machine/ram.h"
105	105	#include "debugger.h"
106	106
107		#define AUDIO_IS_CLASSIC (mac->m_model <= MODEL_MAC_CLASSIC)
	107	#define AUDIO_IS_CLASSIC (m_model <= MODEL_MAC_CLASSIC)
108	108	#define MAC_HAS_VIA2   ((m_model >= MODEL_MAC_II) && (m_model != MODEL_MAC_IIFX))
109	109
110	110	#define ASC_INTS_RBV   ((mac->m_model >= MODEL_MAC_IICI) && (mac->m_model <= MODEL_MAC_IIVI)) || ((mac->m_model >= MODEL_MAC_LC) && (mac->m_model <= MODEL_MAC_COLOR_CLASSIC))
r18257	r18258
132	132	static int scan_keyboard(running_machine &machine);
133	133
134	134	static void keyboard_receive(running_machine &machine, int val);
135		static DECLARE_READ8_DEVICE_HANDLER(mac_via_in_a);
136		static DECLARE_READ8_DEVICE_HANDLER(mac_via_in_b);
137		static DECLARE_READ8_DEVICE_HANDLER(mac_adb_via_in_cb2);
138		static DECLARE_WRITE8_DEVICE_HANDLER(mac_via_out_a);
139		static DECLARE_WRITE8_DEVICE_HANDLER(mac_via_out_b);
140		static DECLARE_WRITE8_DEVICE_HANDLER(mac_adb_via_out_cb2);
141		static DECLARE_WRITE8_DEVICE_HANDLER(mac_via_out_cb2);
142		static DECLARE_READ8_DEVICE_HANDLER(mac_via2_in_a);
143		static DECLARE_READ8_DEVICE_HANDLER(mac_via2_in_b);
144		static DECLARE_WRITE8_DEVICE_HANDLER(mac_via2_out_a);
145		static DECLARE_WRITE8_DEVICE_HANDLER(mac_via2_out_b);
	135
146	136	static void mac_via_irq(device_t *device, int state);
147	137	static void mac_via2_irq(device_t *device, int state);
148	138	static offs_t mac_dasm_override(device_t &device, char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, int options);
149	139
150	140	const via6522_interface mac_via6522_intf =
151	141	{
152		DEVCB_HANDLER(mac_via_in_a), DEVCB_HANDLER(mac_via_in_b),
	142	DEVCB_DRIVER_MEMBER(mac_state,mac_via_in_a), DEVCB_DRIVER_MEMBER(mac_state,mac_via_in_b),
153	143	DEVCB_NULL, DEVCB_NULL,
154	144	DEVCB_NULL, DEVCB_NULL,
155		DEVCB_HANDLER(mac_via_out_a), DEVCB_HANDLER(mac_via_out_b),
	145	DEVCB_DRIVER_MEMBER(mac_state,mac_via_out_a), DEVCB_DRIVER_MEMBER(mac_state,mac_via_out_b),
156	146	DEVCB_NULL, DEVCB_NULL,
157		DEVCB_NULL, DEVCB_HANDLER(mac_via_out_cb2),
	147	DEVCB_NULL, DEVCB_DRIVER_MEMBER(mac_state,mac_via_out_cb2),
158	148	DEVCB_LINE(mac_via_irq)
159	149	};
160	150
161	151	const via6522_interface mac_via6522_adb_intf =
162	152	{
163		DEVCB_HANDLER(mac_via_in_a), DEVCB_HANDLER(mac_via_in_b),
	153	DEVCB_DRIVER_MEMBER(mac_state,mac_via_in_a), DEVCB_DRIVER_MEMBER(mac_state,mac_via_in_b),
164	154	DEVCB_NULL, DEVCB_NULL,
165		DEVCB_NULL, DEVCB_HANDLER(mac_adb_via_in_cb2),
166		DEVCB_HANDLER(mac_via_out_a), DEVCB_HANDLER(mac_via_out_b),
	155	DEVCB_NULL, DEVCB_DRIVER_MEMBER(mac_state,mac_adb_via_in_cb2),
	156	DEVCB_DRIVER_MEMBER(mac_state,mac_via_out_a), DEVCB_DRIVER_MEMBER(mac_state,mac_via_out_b),
167	157	DEVCB_NULL, DEVCB_NULL,
168		DEVCB_NULL, DEVCB_HANDLER(mac_adb_via_out_cb2),
	158	DEVCB_NULL, DEVCB_DRIVER_MEMBER(mac_state,mac_adb_via_out_cb2),
169	159	DEVCB_LINE(mac_via_irq)
170	160	};
171	161
172	162	const via6522_interface mac_via6522_2_intf =
173	163	{
174		DEVCB_HANDLER(mac_via2_in_a), DEVCB_HANDLER(mac_via2_in_b),
	164	DEVCB_DRIVER_MEMBER(mac_state,mac_via2_in_a), DEVCB_DRIVER_MEMBER(mac_state,mac_via2_in_b),
175	165	DEVCB_NULL, DEVCB_NULL,
176	166	DEVCB_NULL, DEVCB_NULL,
177		DEVCB_HANDLER(mac_via2_out_a), DEVCB_HANDLER(mac_via2_out_b),
	167	DEVCB_DRIVER_MEMBER(mac_state,mac_via2_out_a), DEVCB_DRIVER_MEMBER(mac_state,mac_via2_out_b),
178	168	DEVCB_NULL, DEVCB_NULL,
179	169	DEVCB_NULL, DEVCB_NULL,
180	170	DEVCB_LINE(mac_via2_irq)
r18257	r18258
735	725	}
736	726	}
737	727
738		static WRITE8_DEVICE_HANDLER(mac_via_out_cb2)
	728	WRITE8_MEMBER(mac_state::mac_via_out_cb2)
739	729	{
740		mac_state *mac = space.machine().driver_data<mac_state>();
741
742		if (mac->m_kbd_comm == FALSE && data == 0)
	730	if (m_kbd_comm == FALSE && data == 0)
743	731	{
744	732	/* Mac pulls CB2 down to initiate communication */
745		mac->m_kbd_comm = TRUE;
746		mac->m_kbd_receive = TRUE;
747		space.machine().scheduler().timer_set(attotime::from_usec(100), timer_expired_delegate(FUNC(mac_state::kbd_clock),mac));
	733	m_kbd_comm = TRUE;
	734	m_kbd_receive = TRUE;
	735	machine().scheduler().timer_set(attotime::from_usec(100), timer_expired_delegate(FUNC(mac_state::kbd_clock),this));
748	736	}
749		if (mac->m_kbd_comm == TRUE && mac->m_kbd_receive == TRUE)
	737	if (m_kbd_comm == TRUE && m_kbd_receive == TRUE)
750	738	{
751	739	/* Shift in what mac is sending */
752		mac->m_kbd_shift_reg = (mac->m_kbd_shift_reg & ~1) | data;
	740	m_kbd_shift_reg = (m_kbd_shift_reg & ~1) | data;
753	741	}
754	742	}
755	743
r18257	r18258
1175	1163	applefdc_w(fdc, space, (offset >> 8), data>>8);
1176	1164	}
1177	1165
1178		static READ8_DEVICE_HANDLER(mac_adb_via_in_cb2)
	1166	READ8_MEMBER(mac_state::mac_adb_via_in_cb2)
1179	1167	{
1180	1168	UINT8 ret;
1181		mac_state *mac = space.machine().driver_data<mac_state>();
1182
1183	1169	if (ADB_IS_EGRET)
1184	1170	{
1185		ret = mac->m_egret->get_via_data();
	1171	ret = m_egret->get_via_data();
1186	1172	#if LOG_ADB
1187	1173	printf("68K: Read VIA_DATA %x\n", ret);
1188	1174	#endif
1189	1175	}
1190	1176	else if (ADB_IS_CUDA)
1191	1177	{
1192		ret = mac->m_cuda->get_via_data();
	1178	ret = m_cuda->get_via_data();
1193	1179	#if LOG_ADB
1194	1180	printf("68K: Read VIA_DATA %x\n", ret);
1195	1181	#endif
1196	1182	}
1197	1183	else
1198	1184	{
1199		ret = (mac->m_adb_send & 0x80)>>7;
1200		mac->m_adb_send <<= 1;
	1185	ret = (m_adb_send & 0x80)>>7;
	1186	m_adb_send <<= 1;
1201	1187	}
1202	1188
1203	1189	//  printf("VIA IN CB2 = %x\n", ret);
r18257	r18258
1205	1191	return ret;
1206	1192	}
1207	1193
1208		static WRITE8_DEVICE_HANDLER(mac_adb_via_out_cb2)
	1194	WRITE8_MEMBER(mac_state::mac_adb_via_out_cb2)
1209	1195	{
1210		mac_state *mac = space.machine().driver_data<mac_state>();
1211
1212	1196	//        printf("VIA OUT CB2 = %x\n", data);
1213	1197	if (ADB_IS_EGRET)
1214	1198	{
1215		mac->m_egret->set_via_data(data & 1);
	1199	m_egret->set_via_data(data & 1);
1216	1200	}
1217	1201	else if (ADB_IS_CUDA)
1218	1202	{
1219		mac->m_cuda->set_via_data(data & 1);
	1203	m_cuda->set_via_data(data & 1);
1220	1204	}
1221	1205	else
1222	1206	{
1223		mac->m_adb_command <<= 1;
1224		mac->m_adb_command |= data & 1;
	1207	m_adb_command <<= 1;
	1208	m_adb_command |= data & 1;
1225	1209	}
1226	1210	}
1227	1211
r18257	r18258
1261	1245	#define PA2 0x04
1262	1246	#define PA1 0x02
1263	1247
1264		static READ8_DEVICE_HANDLER(mac_via_in_a)
	1248	READ8_MEMBER(mac_state::mac_via_in_a)
1265	1249	{
1266		mac_state *mac = space.machine().driver_data<mac_state>();
	1250	//  printf("VIA1 IN_A (PC %x)\n", machine().device("maincpu")->safe_pc());
1267	1251
1268		//  printf("VIA1 IN_A (PC %x)\n", space.machine().device("maincpu")->safe_pc());
1269
1270		switch (mac->m_model)
	1252	switch (m_model)
1271	1253	{
1272	1254	case MODEL_MAC_PORTABLE:
1273	1255	case MODEL_MAC_PB100:
1274	1256	#if LOG_ADB
1275		//          printf("Read PM data %x\n", mac->m_pm_data_recv);
	1257	//          printf("Read PM data %x\n", m_pm_data_recv);
1276	1258	#endif
1277		return mac->m_pm_data_recv;
	1259	return m_pm_data_recv;
1278	1260
1279	1261	case MODEL_MAC_CLASSIC:
1280	1262	case MODEL_MAC_II:
r18257	r18258
1328	1310	return 0x80;
1329	1311	}
1330	1312
1331		static READ8_DEVICE_HANDLER(mac_via_in_b)
	1313	READ8_MEMBER(mac_state::mac_via_in_b)
1332	1314	{
1333	1315	int val = 0;
1334		mac_state *mac = space.machine().driver_data<mac_state>();
1335
1336	1316	// portable/PB100 is pretty different
1337		if (mac->m_model >= MODEL_MAC_PORTABLE && mac->m_model <= MODEL_MAC_PB100)
	1317	if (m_model >= MODEL_MAC_PORTABLE && m_model <= MODEL_MAC_PB100)
1338	1318	{
1339		//      printf("Read VIA B: PM_ACK %x\n", mac->m_pm_ack);
1340		val = 0x80 | 0x04 | mac->m_pm_ack;   // SCC wait/request (bit 2 must be set at 900c1a or startup tests always fail)
	1319	//      printf("Read VIA B: PM_ACK %x\n", m_pm_ack);
	1320	val = 0x80 | 0x04 | m_pm_ack;   // SCC wait/request (bit 2 must be set at 900c1a or startup tests always fail)
1341	1321	}
1342	1322	else
1343	1323	{
1344	1324	/* video beam in display (! VBLANK && ! HBLANK basically) */
1345		if (space.machine().primary_screen->vpos() >= MAC_V_VIS)
	1325	if (machine().primary_screen->vpos() >= MAC_V_VIS)
1346	1326	val |= 0x40;
1347	1327
1348		if (ADB_IS_BITBANG)
	1328	if (ADB_IS_BITBANG_CLASS)
1349	1329	{
1350		val |= mac->m_adb_state<<4;
	1330	val |= m_adb_state<<4;
1351	1331
1352		if (!mac->m_adb_irq_pending)
	1332	if (!m_adb_irq_pending)
1353	1333	{
1354	1334	val |= 0x08;
1355	1335	}
1356	1336	}
1357	1337	else if (ADB_IS_EGRET)
1358	1338	{
1359		val |= mac->m_egret->get_xcvr_session()<<3;
	1339	val |= m_egret->get_xcvr_session()<<3;
1360	1340	}
1361	1341	else if (ADB_IS_CUDA)
1362	1342	{
1363		val |= mac->m_cuda->get_treq()<<3;
	1343	val |= m_cuda->get_treq()<<3;
1364	1344	}
1365	1345	else
1366	1346	{
1367		if (mac->m_mouse_bit_y)   /* Mouse Y2 */
	1347	if (m_mouse_bit_y)   /* Mouse Y2 */
1368	1348	val |= 0x20;
1369		if (mac->m_mouse_bit_x)   /* Mouse X2 */
	1349	if (m_mouse_bit_x)   /* Mouse X2 */
1370	1350	val |= 0x10;
1371		if ((space.machine().root_device().ioport("MOUSE0")->read() & 0x01) == 0)
	1351	if ((machine().root_device().ioport("MOUSE0")->read() & 0x01) == 0)
1372	1352	val |= 0x08;
1373	1353	}
1374		if (mac->m_rtc_data_out)
	1354	if (m_rtc_data_out)
1375	1355	val |= 1;
1376	1356	}
1377	1357
1378		//  printf("VIA1 IN_B = %02x (PC %x)\n", val, space.machine().device("maincpu")->safe_pc());
	1358	//  printf("VIA1 IN_B = %02x (PC %x)\n", val, machine().device("maincpu")->safe_pc());
1379	1359
1380	1360	return val;
1381	1361	}
1382	1362
1383		static WRITE8_DEVICE_HANDLER(mac_via_out_a)
	1363	WRITE8_MEMBER(mac_state::mac_via_out_a)
1384	1364	{
1385		device_t *sound = space.machine().device("custom");
1386		device_t *fdc = space.machine().device("fdc");
1387		mac_state *mac = space.machine().driver_data<mac_state>();
	1365	device_t *sound = machine().device("custom");
	1366	device_t *fdc = machine().device("fdc");
	1367	//  printf("VIA1 OUT A: %02x (PC %x)\n", data, machine().device("maincpu")->safe_pc());
1388	1368
1389		//  printf("VIA1 OUT A: %02x (PC %x)\n", data, space.machine().device("maincpu")->safe_pc());
1390
1391	1369	if (ADB_IS_PM_VIA1)
1392	1370	{
1393	1371	#if LOG_ADB
1394	1372	//      printf("%02x to PM\n", data);
1395	1373	#endif
1396		mac->m_pm_data_send = data;
	1374	m_pm_data_send = data;
1397	1375	return;
1398	1376	}
1399	1377
1400	1378	set_scc_waitrequest((data & 0x80) >> 7);
1401		mac->m_screen_buffer = (data & 0x40) >> 6;
	1379	m_screen_buffer = (data & 0x40) >> 6;
1402	1380	sony_set_sel_line(fdc,(data & 0x20) >> 5);
1403		if (mac->m_model == MODEL_MAC_SE)   // on SE this selects which floppy drive (0 = upper, 1 = lower)
	1381	if (m_model == MODEL_MAC_SE)   // on SE this selects which floppy drive (0 = upper, 1 = lower)
1404	1382	{
1405		mac->m_drive_select = ((data & 0x10) >> 4);
	1383	m_drive_select = ((data & 0x10) >> 4);
1406	1384	}
1407	1385
1408		if (mac->m_model < MODEL_MAC_SE)   // SE no longer has dual buffers
	1386	if (m_model < MODEL_MAC_SE)   // SE no longer has dual buffers
1409	1387	{
1410	1388	mac_set_sound_buffer(sound, (data & 0x08) >> 3);
1411	1389	}
1412	1390
1413		if (mac->m_model < MODEL_MAC_II)
	1391	if (m_model < MODEL_MAC_II)
1414	1392	{
1415	1393	mac_set_volume(sound, data & 0x07);
1416	1394	}
r18257	r18258
1418	1396	/* Early Mac models had VIA A4 control overlaying.  In the Mac SE (and
1419	1397	* possibly later models), overlay was set on reset, but cleared on the
1420	1398	* first access to the ROM. */
1421		if (mac->m_model < MODEL_MAC_SE)
	1399	if (m_model < MODEL_MAC_SE)
1422	1400	{
1423		mac->set_memory_overlay((data & 0x10) >> 4);
	1401	set_memory_overlay((data & 0x10) >> 4);
1424	1402	}
1425	1403	}
1426	1404
1427		static WRITE8_DEVICE_HANDLER(mac_via_out_b)
	1405	WRITE8_MEMBER(mac_state::mac_via_out_b)
1428	1406	{
1429		device_t *sound = space.machine().device("custom");
	1407	device_t *sound = machine().device("custom");
1430	1408	int new_rtc_rTCClk;
1431		mac_state *mac = space.machine().driver_data<mac_state>();
	1409	//  printf("VIA1 OUT B: %02x (PC %x)\n", data, machine().device("maincpu")->safe_pc());
1432	1410
1433		//  printf("VIA1 OUT B: %02x (PC %x)\n", data, space.machine().device("maincpu")->safe_pc());
1434
1435	1411	if (ADB_IS_PM_VIA1)
1436	1412	{
1437		device_t *fdc = space.machine().device("fdc");
	1413	device_t *fdc = machine().device("fdc");
1438	1414
1439	1415	sony_set_sel_line(fdc,(data & 0x20) >> 5);
1440		mac->m_drive_select = ((data & 0x10) >> 4);
	1416	m_drive_select = ((data & 0x10) >> 4);
1441	1417
1442		if ((data & 1) && !(mac->m_pm_req & 1))
	1418	if ((data & 1) && !(m_pm_req & 1))
1443	1419	{
1444	1420	#if LOG_ADB
1445	1421	printf("PM: 68k dropping /REQ\n");
1446	1422	#endif
1447	1423
1448		if (mac->m_pm_state == 0)    // do this in receive state only
	1424	if (m_pm_state == 0)    // do this in receive state only
1449	1425	{
1450		mac->m_pm_data_recv = 0xff;
1451		mac->m_pm_ack |= 2;
	1426	m_pm_data_recv = 0xff;
	1427	m_pm_ack |= 2;
1452	1428
1453	1429	// check if length byte matches
1454		if ((mac->m_pm_dptr >= 2) && (mac->m_pm_cmd[1] == (mac->m_pm_dptr-2)))
	1430	if ((m_pm_dptr >= 2) && (m_pm_cmd[1] == (m_pm_dptr-2)))
1455	1431	{
1456		mac->pmu_exec();
	1432	pmu_exec();
1457	1433	#if LOG_ADB
1458		printf("PMU exec: command %02x length %d\n", mac->m_pm_cmd[0], mac->m_pm_cmd[1]);
	1434	printf("PMU exec: command %02x length %d\n", m_pm_cmd[0], m_pm_cmd[1]);
1459	1435	#endif
1460	1436	}
1461	1437	}
1462	1438	}
1463		else if (!(data & 1) && (mac->m_pm_req & 1))
	1439	else if (!(data & 1) && (m_pm_req & 1))
1464	1440	{
1465		if (mac->m_pm_state == 0)
	1441	if (m_pm_state == 0)
1466	1442	{
1467	1443	#if LOG_ADB
1468		printf("PM: 68k asserting /REQ, clocking in byte [%d] = %02x\n", mac->m_pm_dptr, mac->m_pm_data_send);
	1444	printf("PM: 68k asserting /REQ, clocking in byte [%d] = %02x\n", m_pm_dptr, m_pm_data_send);
1469	1445	#endif
1470		mac->m_pm_ack &= ~2;   // clear, we're waiting for more bytes
1471		mac->m_pm_cmd[mac->m_pm_dptr++] = mac->m_pm_data_send;
	1446	m_pm_ack &= ~2;   // clear, we're waiting for more bytes
	1447	m_pm_cmd[m_pm_dptr++] = m_pm_data_send;
1472	1448	}
1473	1449	else   // receiving, so this is different
1474	1450	{
1475		mac->m_pm_data_recv = mac->m_pm_out[mac->m_pm_sptr++];
1476		mac->m_pm_slen--;
1477		mac->m_pm_ack |= 2;   // raise ACK to indicate available byte
	1451	m_pm_data_recv = m_pm_out[m_pm_sptr++];
	1452	m_pm_slen--;
	1453	m_pm_ack |= 2;   // raise ACK to indicate available byte
1478	1454	#if LOG_ADB
1479		printf("PM: 68k asserted /REQ, sending byte %02x\n", mac->m_pm_data_recv);
	1455	printf("PM: 68k asserted /REQ, sending byte %02x\n", m_pm_data_recv);
1480	1456	#endif
1481	1457
1482	1458	// another byte to send?
1483		if (mac->m_pm_slen)
	1459	if (m_pm_slen)
1484	1460	{
1485		mac->m_pmu_send_timer->adjust(attotime(0, ATTOSECONDS_IN_USEC(100)));
	1461	m_pmu_send_timer->adjust(attotime(0, ATTOSECONDS_IN_USEC(100)));
1486	1462	}
1487	1463	else
1488	1464	{
1489		mac->m_pm_state = 0;   // back to receive state
1490		mac->m_pmu_send_timer->adjust(attotime::never);
	1465	m_pm_state = 0;   // back to receive state
	1466	m_pmu_send_timer->adjust(attotime::never);
1491	1467	}
1492	1468	}
1493	1469	}
1494	1470
1495		mac->m_pm_req = data & 1;
	1471	m_pm_req = data & 1;
1496	1472	return;
1497	1473	}
1498	1474
r18257	r18258
1502	1478	}
1503	1479
1504	1480	// SE and Classic have SCSI enable/disable here
1505		if ((mac->m_model == MODEL_MAC_SE) || (mac->m_model == MODEL_MAC_CLASSIC))
	1481	if ((m_model == MODEL_MAC_SE) || (m_model == MODEL_MAC_CLASSIC))
1506	1482	{
1507		mac->m_scsiirq_enable = (data & 0x40) ? 0 : 1;
1508		//      printf("VIAB & 0x40 = %02x, IRQ enable %d\n", data & 0x40, mac->m_scsiirq_enable);
	1483	m_scsiirq_enable = (data & 0x40) ? 0 : 1;
	1484	//      printf("VIAB & 0x40 = %02x, IRQ enable %d\n", data & 0x40, m_scsiirq_enable);
1509	1485	}
1510	1486
1511		if (mac->m_model == MODEL_MAC_SE30)
	1487	if (m_model == MODEL_MAC_SE30)
1512	1488	{
1513	1489	// 0x40 = 0 means enable vblank on SE/30
1514		mac->m_se30_vbl_enable = (data & 0x40) ? 0 : 1;
	1490	m_se30_vbl_enable = (data & 0x40) ? 0 : 1;
1515	1491
1516	1492	// clear the interrupt if we disabled it
1517		if (!mac->m_se30_vbl_enable)
	1493	if (!m_se30_vbl_enable)
1518	1494	{
1519		mac->nubus_slot_interrupt(0xe, 0);
	1495	nubus_slot_interrupt(0xe, 0);
1520	1496	}
1521	1497	}
1522	1498
1523		mac->rtc_write_rTCEnb(data & 0x04);
	1499	rtc_write_rTCEnb(data & 0x04);
1524	1500	new_rtc_rTCClk = (data >> 1) & 0x01;
1525		if ((! new_rtc_rTCClk) && (mac->m_rtc_rTCClk))
1526		mac->rtc_shift_data(data & 0x01);
1527		mac->m_rtc_rTCClk = new_rtc_rTCClk;
	1501	if ((! new_rtc_rTCClk) && (m_rtc_rTCClk))
	1502	rtc_shift_data(data & 0x01);
	1503	m_rtc_rTCClk = new_rtc_rTCClk;
1528	1504
1529		if (ADB_IS_BITBANG)
	1505	if (ADB_IS_BITBANG_CLASS)
1530	1506	{
1531		mac->mac_adb_newaction((data & 0x30) >> 4);
	1507	mac_adb_newaction((data & 0x30) >> 4);
1532	1508	}
1533	1509	else if (ADB_IS_EGRET)
1534	1510	{
1535	1511	#if LOG_ADB
1536		printf("68K: New Egret state: SS %d VF %d (PC %x)\n", (data>>5)&1, (data>>4)&1, mac->m_maincpu->pc());
	1512	printf("68K: New Egret state: SS %d VF %d (PC %x)\n", (data>>5)&1, (data>>4)&1, m_maincpu->pc());
1537	1513	#endif
1538		mac->m_egret->set_via_full((data&0x10) ? 1 : 0);
1539		mac->m_egret->set_sys_session((data&0x20) ? 1 : 0);
	1514	m_egret->set_via_full((data&0x10) ? 1 : 0);
	1515	m_egret->set_sys_session((data&0x20) ? 1 : 0);
1540	1516	}
1541	1517	else if (ADB_IS_CUDA)
1542	1518	{
1543	1519	#if LOG_ADB
1544		printf("68K: New Cuda state: TIP %d BYTEACK %d (PC %x)\n", (data>>5)&1, (data>>4)&1, mac->m_maincpu->pc());
	1520	printf("68K: New Cuda state: TIP %d BYTEACK %d (PC %x)\n", (data>>5)&1, (data>>4)&1, m_maincpu->pc());
1545	1521	#endif
1546		mac->m_cuda->set_byteack((data&0x10) ? 1 : 0);
1547		mac->m_cuda->set_tip((data&0x20) ? 1 : 0);
	1522	m_cuda->set_byteack((data&0x10) ? 1 : 0);
	1523	m_cuda->set_tip((data&0x20) ? 1 : 0);
1548	1524	}
1549	1525	}
1550	1526
r18257	r18258
1628	1604	}
1629	1605
1630	1606
1631		static READ8_DEVICE_HANDLER(mac_via2_in_a)
	1607	READ8_MEMBER(mac_state::mac_via2_in_a)
1632	1608	{
1633	1609	UINT8 result;
1634		mac_state *mac = space.machine().driver_data<mac_state>();
1635
1636	1610	if (ADB_IS_PM_VIA2)
1637	1611	{
1638		result = mac->m_pm_data_recv;
	1612	result = m_pm_data_recv;
1639	1613	}
1640		else if ((mac->m_model == MODEL_MAC_QUADRA_700) || (mac->m_model == MODEL_MAC_QUADRA_900) || (mac->m_model == MODEL_MAC_QUADRA_950))
	1614	else if ((m_model == MODEL_MAC_QUADRA_700) || (m_model == MODEL_MAC_QUADRA_900) || (m_model == MODEL_MAC_QUADRA_950))
1641	1615	{
1642		result = 0x80 | mac->m_nubus_irq_state;
	1616	result = 0x80 | m_nubus_irq_state;
1643	1617	}
1644	1618	else
1645	1619	{
1646		result = 0xc0 | mac->m_nubus_irq_state;
	1620	result = 0xc0 | m_nubus_irq_state;
1647	1621	}
1648	1622
1649	1623	return result;
1650	1624	}
1651	1625
1652		static READ8_DEVICE_HANDLER(mac_via2_in_b)
	1626	READ8_MEMBER(mac_state::mac_via2_in_b)
1653	1627	{
1654		mac_state *mac =space.machine().driver_data<mac_state>();
	1628	//  logerror("VIA2 IN B (PC %x)\n", machine().device("maincpu")->safe_pc());
1655	1629
1656		//  logerror("VIA2 IN B (PC %x)\n", space.machine().device("maincpu")->safe_pc());
1657
1658	1630	if (ADB_IS_PM_VIA2)
1659	1631	{
1660		if (mac->m_pm_ack == 2)
	1632	if (m_pm_ack == 2)
1661	1633	{
1662	1634	return 0xcf;
1663	1635	}
r18257	r18258
1667	1639	}
1668	1640	}
1669	1641
1670		if ((mac->m_model == MODEL_MAC_LC) || (mac->m_model == MODEL_MAC_LC_II) || (mac->m_model == MODEL_MAC_CLASSIC_II))
	1642	if ((m_model == MODEL_MAC_LC) || (m_model == MODEL_MAC_LC_II) || (m_model == MODEL_MAC_CLASSIC_II))
1671	1643	{
1672	1644	return 0x4f;
1673	1645	}
1674	1646
1675		if ((mac->m_model == MODEL_MAC_SE30) || (mac->m_model == MODEL_MAC_IIX))
	1647	if ((m_model == MODEL_MAC_SE30) || (m_model == MODEL_MAC_IIX))
1676	1648	{
1677	1649	return 0x87;   // bits 3 and 6 are tied low on SE/30
1678	1650	}
r18257	r18258
1680	1652	return 0xcf;      // indicate no NuBus transaction error
1681	1653	}
1682	1654
1683		static WRITE8_DEVICE_HANDLER(mac_via2_out_a)
	1655	WRITE8_MEMBER(mac_state::mac_via2_out_a)
1684	1656	{
1685		mac_state *mac = space.machine().driver_data<mac_state>();
1686
1687		//  logerror("VIA2 OUT A: %02x (PC %x)\n", data, space.machine().device("maincpu")->safe_pc());
	1657	//  logerror("VIA2 OUT A: %02x (PC %x)\n", data, machine().device("maincpu")->safe_pc());
1688	1658	if (ADB_IS_PM_VIA2)
1689	1659	{
1690		mac->m_pm_data_send = data;
	1660	m_pm_data_send = data;
1691	1661	return;
1692	1662	}
1693	1663	}
1694	1664
1695		static WRITE8_DEVICE_HANDLER(mac_via2_out_b)
	1665	WRITE8_MEMBER(mac_state::mac_via2_out_b)
1696	1666	{
1697		mac_state *mac = space.machine().driver_data<mac_state>();
	1667	//  logerror("VIA2 OUT B: %02x (PC %x)\n", data, machine().device("maincpu")->safe_pc());
1698	1668
1699		//  logerror("VIA2 OUT B: %02x (PC %x)\n", data, space.machine().device("maincpu")->safe_pc());
1700
1701	1669	if (ADB_IS_PM_VIA2)
1702	1670	{
1703		if ((data & 4) && !(mac->m_pm_req & 4))
	1671	if ((data & 4) && !(m_pm_req & 4))
1704	1672	{
1705	1673	#if LOG_ADB
1706	1674	printf("PM: 68k dropping /REQ\n");
1707	1675	#endif
1708	1676
1709		if (mac->m_pm_state == 0)    // do this in receive state only
	1677	if (m_pm_state == 0)    // do this in receive state only
1710	1678	{
1711		mac->m_pm_data_recv = 0xff;
1712		mac->m_pm_ack |= 2;
	1679	m_pm_data_recv = 0xff;
	1680	m_pm_ack |= 2;
1713	1681
1714	1682	// check if length byte matches
1715		if ((mac->m_pm_dptr >= 2) && (mac->m_pm_cmd[1] == (mac->m_pm_dptr-2)))
	1683	if ((m_pm_dptr >= 2) && (m_pm_cmd[1] == (m_pm_dptr-2)))
1716	1684	{
1717		mac->pmu_exec();
	1685	pmu_exec();
1718	1686	#if LOG_ADB
1719		printf("PMU exec: command %02x length %d\n", mac->m_pm_cmd[0], mac->m_pm_cmd[1]);
	1687	printf("PMU exec: command %02x length %d\n", m_pm_cmd[0], m_pm_cmd[1]);
1720	1688	#endif
1721	1689	}
1722	1690	}
1723	1691	}
1724		else if (!(data & 4) && (mac->m_pm_req & 4))
	1692	else if (!(data & 4) && (m_pm_req & 4))
1725	1693	{
1726		if (mac->m_pm_state == 0)
	1694	if (m_pm_state == 0)
1727	1695	{
1728	1696	#if LOG_ADB
1729		printf("PM: 68k asserting /REQ, clocking in byte [%d] = %02x\n", mac->m_pm_dptr, mac->m_pm_data_send);
	1697	printf("PM: 68k asserting /REQ, clocking in byte [%d] = %02x\n", m_pm_dptr, m_pm_data_send);
1730	1698	#endif
1731		mac->m_pm_ack &= ~2;   // clear, we're waiting for more bytes
1732		mac->m_pm_cmd[mac->m_pm_dptr++] = mac->m_pm_data_send;
	1699	m_pm_ack &= ~2;   // clear, we're waiting for more bytes
	1700	m_pm_cmd[m_pm_dptr++] = m_pm_data_send;
1733	1701	}
1734	1702	else   // receiving, so this is different
1735	1703	{
1736		mac->m_pm_data_recv = mac->m_pm_out[mac->m_pm_sptr++];
1737		mac->m_pm_slen--;
1738		mac->m_pm_ack |= 2;   // raise ACK to indicate available byte
	1704	m_pm_data_recv = m_pm_out[m_pm_sptr++];
	1705	m_pm_slen--;
	1706	m_pm_ack |= 2;   // raise ACK to indicate available byte
1739	1707	#if LOG_ADB
1740		printf("PM: 68k asserted /REQ, sending byte %02x\n", mac->m_pm_data_recv);
	1708	printf("PM: 68k asserted /REQ, sending byte %02x\n", m_pm_data_recv);
1741	1709	#endif
1742	1710
1743	1711	// another byte to send?
1744		if (mac->m_pm_slen)
	1712	if (m_pm_slen)
1745	1713	{
1746		mac->m_pmu_send_timer->adjust(attotime(0, ATTOSECONDS_IN_USEC(100)));
	1714	m_pmu_send_timer->adjust(attotime(0, ATTOSECONDS_IN_USEC(100)));
1747	1715	}
1748	1716	else
1749	1717	{
1750		mac->m_pm_state = 0;   // back to receive state
1751		mac->m_pmu_send_timer->adjust(attotime::never);
	1718	m_pm_state = 0;   // back to receive state
	1719	m_pmu_send_timer->adjust(attotime::never);
1752	1720	}
1753	1721	}
1754	1722	}
1755	1723
1756		mac->m_pm_req = data & 4;
	1724	m_pm_req = data & 4;
1757	1725	return;
1758	1726	}
1759	1727	else
1760	1728	{
1761	1729	// chain 60.15 Hz to VIA1
1762		mac->m_via1->write_ca1(data>>7);
	1730	m_via1->write_ca1(data>>7);
1763	1731	}
1764	1732
1765		if (mac->m_model == MODEL_MAC_II)
	1733	if (m_model == MODEL_MAC_II)
1766	1734	{
1767		m68k_set_hmmu_enable(mac->m_maincpu, (data & 0x8) ? M68K_HMMU_DISABLE : M68K_HMMU_ENABLE_II);
	1735	m68k_set_hmmu_enable(m_maincpu, (data & 0x8) ? M68K_HMMU_DISABLE : M68K_HMMU_ENABLE_II);
1768	1736	}
1769	1737	}
1770	1738

trunk/src/mess/machine/apple1.c

r18257	r18258
51	51	#include "imagedev/cassette.h"
52	52	#include "machine/ram.h"
53	53
54
55
56
57		static DECLARE_READ8_DEVICE_HANDLER( apple1_pia0_kbdin );
58		static DECLARE_WRITE8_DEVICE_HANDLER( apple1_pia0_dspout );
59		static DECLARE_WRITE8_DEVICE_HANDLER( apple1_pia0_dsp_write_signal );
60
61
62
63
64	54	/*****************************************************************************
65	55	**  Structures
66	56	*****************************************************************************/
r18257	r18258
72	62
73	63	const pia6821_interface apple1_pia0 =
74	64	{
75		DEVCB_DEVICE_HANDLER("pia", apple1_pia0_kbdin),            /* Port A input (keyboard) */
	65	DEVCB_DRIVER_MEMBER(apple1_state,apple1_pia0_kbdin),            /* Port A input (keyboard) */
76	66	DEVCB_NULL,                              /* Port B input (display status) */
77	67	DEVCB_NULL,                              /* CA1 input (key pressed) */
78	68	DEVCB_NULL,                              /* CB1 input (display ready) */
79	69	DEVCB_NULL,                              /* CA2 not used as input */
80	70	DEVCB_NULL,                              /* CB2 not used as input */
81	71	DEVCB_NULL,                              /* Port A not used as output */
82		DEVCB_DEVICE_HANDLER("pia", apple1_pia0_dspout),            /* Port B output (display) */
	72	DEVCB_DRIVER_MEMBER(apple1_state,apple1_pia0_dspout),            /* Port B output (display) */
83	73	DEVCB_NULL,                              /* CA2 not used as output */
84		DEVCB_DEVICE_HANDLER("pia", apple1_pia0_dsp_write_signal),   /* CB2 output (display write) */
	74	DEVCB_DRIVER_MEMBER(apple1_state,apple1_pia0_dsp_write_signal),   /* CB2 output (display write) */
85	75	DEVCB_NULL,                              /* IRQA not connected */
86	76	DEVCB_NULL                              /* IRQB not connected */
87	77	};
r18257	r18258
381	371	/*****************************************************************************
382	372	**  READ/WRITE HANDLERS
383	373	*****************************************************************************/
384		static READ8_DEVICE_HANDLER( apple1_pia0_kbdin )
	374	READ8_MEMBER(apple1_state::apple1_pia0_kbdin)
385	375	{
386		apple1_state *state = space.machine().driver_data<apple1_state>();
387	376	/* Bit 7 of the keyboard input is permanently wired high.  This is
388	377	what the ROM Monitor software expects. */
389		return state->m_kbd_data | 0x80;
	378	return m_kbd_data | 0x80;
390	379	}
391	380
392		static WRITE8_DEVICE_HANDLER( apple1_pia0_dspout )
	381	WRITE8_MEMBER(apple1_state::apple1_pia0_dspout)
393	382	{
394	383	/* Send an ASCII character to the video hardware. */
395		apple1_vh_dsp_w(space.machine(), data);
	384	apple1_vh_dsp_w(machine(), data);
396	385	}
397	386
398		static WRITE8_DEVICE_HANDLER( apple1_pia0_dsp_write_signal )
	387	WRITE8_MEMBER(apple1_state::apple1_pia0_dsp_write_signal)
399	388	{
	389	device_t *device = machine().device("pia");
400	390	/* PIA output CB2 is inverted to become the DA signal, used to
401	391	signal a display write to the video hardware. */
402	392
r18257	r18258
411	401	Only then will it assert \RDA to signal readiness for another
412	402	write.  Thus the write delay depends on the cursor position and
413	403	where the display is in the refresh cycle. */
414		apple1_state *state = space.machine().driver_data<apple1_state>();
415	404	if (!data)
416		space.machine().scheduler().timer_set(apple1_vh_dsp_time_to_ready(space.machine()), timer_expired_delegate(FUNC(apple1_state::apple1_dsp_ready_start),state));
	405	machine().scheduler().timer_set(apple1_vh_dsp_time_to_ready(machine()), timer_expired_delegate(FUNC(apple1_state::apple1_dsp_ready_start),this));
417	406	}
418	407
419	408	TIMER_CALLBACK_MEMBER(apple1_state::apple1_dsp_ready_start)

trunk/src/mess/machine/lisa.c

r18257	r18258
91	91	a hard disk
92	92	*/
93	93
94		static DECLARE_READ8_DEVICE_HANDLER(COPS_via_in_b);
95		static DECLARE_WRITE8_DEVICE_HANDLER(COPS_via_out_a);
96		static DECLARE_WRITE8_DEVICE_HANDLER(COPS_via_out_b);
97		static DECLARE_WRITE8_DEVICE_HANDLER(COPS_via_out_ca2);
98		static DECLARE_WRITE8_DEVICE_HANDLER(COPS_via_out_cb2);
99	94	static void COPS_via_irq_func(device_t *device, int val);
100		static DECLARE_READ8_DEVICE_HANDLER(parallel_via_in_b);
101	95
102	96
103	97	const via6522_interface lisa_via6522_0_intf =
104	98	{
105	99	/* COPS via */
106		DEVCB_NULL, DEVCB_HANDLER(COPS_via_in_b),
	100	DEVCB_NULL, DEVCB_DRIVER_MEMBER(lisa_state,COPS_via_in_b),
107	101	DEVCB_NULL, DEVCB_NULL,
108	102	DEVCB_NULL, DEVCB_NULL,
109		DEVCB_HANDLER(COPS_via_out_a), DEVCB_HANDLER(COPS_via_out_b),
110		DEVCB_HANDLER(COPS_via_out_ca2), DEVCB_HANDLER(COPS_via_out_cb2),
	103	DEVCB_DRIVER_MEMBER(lisa_state,COPS_via_out_a), DEVCB_DRIVER_MEMBER(lisa_state,COPS_via_out_b),
	104	DEVCB_DRIVER_MEMBER(lisa_state,COPS_via_out_ca2), DEVCB_DRIVER_MEMBER(lisa_state,COPS_via_out_cb2),
111	105	DEVCB_NULL, DEVCB_NULL,
112	106	DEVCB_LINE(COPS_via_irq_func),
113	107	};
r18257	r18258
115	109	const via6522_interface lisa_via6522_1_intf =
116	110	{
117	111	/* parallel interface via - incomplete */
118		DEVCB_NULL, DEVCB_HANDLER(parallel_via_in_b),
	112	DEVCB_NULL, DEVCB_DRIVER_MEMBER(lisa_state,parallel_via_in_b),
119	113	DEVCB_NULL, DEVCB_NULL,
120	114	DEVCB_NULL, DEVCB_NULL,
121	115	DEVCB_NULL, DEVCB_NULL,
r18257	r18258
676	670	CA1 (I) : COPS sending valid data
677	671	CA2 (O) : VIA -> COPS handshake
678	672	*/
679		static WRITE8_DEVICE_HANDLER(COPS_via_out_a)
	673	WRITE8_MEMBER(lisa_state::COPS_via_out_a)
680	674	{
681		lisa_state *state = space.machine().driver_data<lisa_state>();
682	675	//    printf("VIA A = %02x\n", data);
683		state->m_COPS_command = data;
	676	m_COPS_command = data;
684	677	}
685	678
686		static WRITE8_DEVICE_HANDLER(COPS_via_out_ca2)
	679	WRITE8_MEMBER(lisa_state::COPS_via_out_ca2)
687	680	{
688		lisa_state *state = space.machine().driver_data<lisa_state>();
689		state->m_hold_COPS_data = data;
	681	m_hold_COPS_data = data;
690	682
691	683	/*logerror("COPS CA2 line state : %d\n", val);*/
692	684
693	685	/*logerror("COPS_via_out_ca2 : trying to send data to VIA\n");*/
694		COPS_send_data_if_possible(space.machine());
	686	COPS_send_data_if_possible(machine());
695	687	}
696	688
697	689	/*
r18257	r18258
708	700	CB1 : not used
709	701	CB2 (O) : sound output
710	702	*/
711		static READ8_DEVICE_HANDLER(COPS_via_in_b)
	703	READ8_MEMBER(lisa_state::COPS_via_in_b)
712	704	{
713		lisa_state *state = space.machine().driver_data<lisa_state>();
714	705	int val = 0;
715	706
716		if (state->m_COPS_Ready)
	707	if (m_COPS_Ready)
717	708	val |= 0x40;
718	709
719		if (state->m_FDIR)
	710	if (m_FDIR)
720	711	val |= 0x10;
721	712
722	713	return val;
723	714	}
724	715
725		static WRITE8_DEVICE_HANDLER(COPS_via_out_b)
	716	WRITE8_MEMBER(lisa_state::COPS_via_out_b)
726	717	{
727		lisa_state *state = space.machine().driver_data<lisa_state>();
728		via6522_device *via_0 = space.machine().device<via6522_device>("via6522_0");
	718	via6522_device *via_0 = machine().device<via6522_device>("via6522_0");
729	719
730	720	/* pull-up */
731	721	data |= (~ via_0->read(space,VIA_DDRA)) & 0x01;
732	722
733	723	if (data & 0x01)
734	724	{
735		if (state->m_COPS_force_unplug)
	725	if (m_COPS_force_unplug)
736	726	{
737		state->m_COPS_force_unplug = 0;
738		plug_keyboard(space.machine());
	727	m_COPS_force_unplug = 0;
	728	plug_keyboard(machine());
739	729	}
740	730	}
741	731	else
742	732	{
743		if (! state->m_COPS_force_unplug)
	733	if (! m_COPS_force_unplug)
744	734	{
745		state->m_COPS_force_unplug = 1;
746		unplug_keyboard(space.machine());
	735	m_COPS_force_unplug = 1;
	736	unplug_keyboard(machine());
747	737	//reset_COPS(state);
748	738	}
749	739	}
750	740	}
751	741
752		static WRITE8_DEVICE_HANDLER(COPS_via_out_cb2)
	742	WRITE8_MEMBER(lisa_state::COPS_via_out_cb2)
753	743	{
754		device_t *speaker = space.machine().device(SPEAKER_TAG);
	744	device_t *speaker = machine().device(SPEAKER_TAG);
755	745	speaker_level_w(speaker, data);
756	746	}
757	747
r18257	r18258
785	775	CB1 : not used
786	776	CB2 (I) : current parity latch value
787	777	*/
788		static READ8_DEVICE_HANDLER(parallel_via_in_b)
	778	READ8_MEMBER(lisa_state::parallel_via_in_b)
789	779	{
790		lisa_state *state = space.machine().driver_data<lisa_state>();
791	780	int val = 0;
792	781
793		if (state->m_DISK_DIAG)
	782	if (m_DISK_DIAG)
794	783	val |= 0x40;
795	784
796	785	/* tell there is no hard disk : */
r18257	r18258
1067	1056	init_COPS(machine());
1068	1057
1069	1058	{
1070		via6522_device *via_0 = machine().device<via6522_device>("via6522_0");
1071		COPS_via_out_ca2(via_0, generic_space(), 0, 0);   /* VIA core forgets to do so */
	1059	COPS_via_out_ca2(generic_space(), 0, 0);   /* VIA core forgets to do so */
1072	1060	}
1073	1061
1074	1062	/* initialize floppy */

trunk/src/mess/machine/msx.c

r18257	r18258
620	620	m_psg_b = data;
621	621	}
622	622
623		WRITE8_DEVICE_HANDLER( msx_printer_strobe_w )
	623	WRITE8_MEMBER(msx_state::msx_printer_strobe_w)
624	624	{
625		space.machine().device<centronics_device>("centronics")->strobe_w(BIT(data, 1));
	625	machine().device<centronics_device>("centronics")->strobe_w(BIT(data, 1));
626	626	}
627	627
628		WRITE8_DEVICE_HANDLER( msx_printer_data_w )
	628	WRITE8_MEMBER(msx_state::msx_printer_data_w)
629	629	{
630		if (space.machine().root_device().ioport("DSW")->read() & 0x80)
	630	if (machine().root_device().ioport("DSW")->read() & 0x80)
631	631	/* SIMPL emulation */
632		space.machine().device<dac_device>("dac")->write_signed8(data);
	632	machine().device<dac_device>("dac")->write_signed8(data);
633	633	else
634		space.machine().device<centronics_device>("centronics")->write(space.machine().driver_data()->generic_space(), 0, data);
	634	machine().device<centronics_device>("centronics")->write(machine().driver_data()->generic_space(), 0, data);
635	635	}
636	636
637		READ8_DEVICE_HANDLER( msx_printer_status_r )
	637	READ8_MEMBER(msx_state::msx_printer_status_r)
638	638	{
639	639	UINT8 result = 0xfd;
640	640
641		if (space.machine().root_device().ioport("DSW")->read() & 0x80)
	641	if (machine().root_device().ioport("DSW")->read() & 0x80)
642	642	return 0xff;
643	643
644		result |= space.machine().device<centronics_device>("centronics")->busy_r() << 1;
	644	result |= machine().device<centronics_device>("centronics")->busy_r() << 1;
645	645
646	646	return result;
647	647	}

trunk/src/mess/machine/lviv.c

r18257	r18258
53	53	return address;
54	54	}
55	55
56		static READ8_DEVICE_HANDLER ( lviv_ppi_0_porta_r )
	56	READ8_MEMBER(lviv_state::lviv_ppi_0_porta_r)
57	57	{
58	58	return 0xff;
59	59	}
60	60
61		static READ8_DEVICE_HANDLER ( lviv_ppi_0_portb_r )
	61	READ8_MEMBER(lviv_state::lviv_ppi_0_portb_r)
62	62	{
63	63	return 0xff;
64	64	}
65	65
66		static READ8_DEVICE_HANDLER ( lviv_ppi_0_portc_r )
	66	READ8_MEMBER(lviv_state::lviv_ppi_0_portc_r)
67	67	{
68		lviv_state *state = space.machine().driver_data<lviv_state>();
69		UINT8 data = state->m_ppi_port_outputs[0][2] & 0x0f;
70		if (space.machine().device<cassette_image_device>(CASSETTE_TAG)->input() > 0.038)
	68	UINT8 data = m_ppi_port_outputs[0][2] & 0x0f;
	69	if (machine().device<cassette_image_device>(CASSETTE_TAG)->input() > 0.038)
71	70	data |= 0x10;
72		if (state->m_ppi_port_outputs[0][0] & state->ioport("JOY")->read())
	71	if (m_ppi_port_outputs[0][0] & ioport("JOY")->read())
73	72	data |= 0x80;
74	73	return data;
75	74	}
76	75
77		static WRITE8_DEVICE_HANDLER ( lviv_ppi_0_porta_w )
	76	WRITE8_MEMBER(lviv_state::lviv_ppi_0_porta_w)
78	77	{
79		lviv_state *state = space.machine().driver_data<lviv_state>();
80		state->m_ppi_port_outputs[0][0] = data;
	78	m_ppi_port_outputs[0][0] = data;
81	79	}
82	80
83		static WRITE8_DEVICE_HANDLER ( lviv_ppi_0_portb_w )
	81	WRITE8_MEMBER(lviv_state::lviv_ppi_0_portb_w)
84	82	{
85		lviv_state *state = space.machine().driver_data<lviv_state>();
86		state->m_ppi_port_outputs[0][1] = data;
87		lviv_update_palette(space.machine(), data&0x7f);
	83	m_ppi_port_outputs[0][1] = data;
	84	lviv_update_palette(machine(), data&0x7f);
88	85	}
89	86
90		static WRITE8_DEVICE_HANDLER ( lviv_ppi_0_portc_w )   /* tape in/out, video memory on/off */
	87	WRITE8_MEMBER(lviv_state::lviv_ppi_0_portc_w)/* tape in/out, video memory on/off */
91	88	{
92		lviv_state *state = space.machine().driver_data<lviv_state>();
93		device_t *speaker = space.machine().device(SPEAKER_TAG);
94		state->m_ppi_port_outputs[0][2] = data;
95		if (state->m_ppi_port_outputs[0][1]&0x80)
	89	device_t *speaker = machine().device(SPEAKER_TAG);
	90	m_ppi_port_outputs[0][2] = data;
	91	if (m_ppi_port_outputs[0][1]&0x80)
96	92	speaker_level_w(speaker, data&0x01);
97		space.machine().device<cassette_image_device>(CASSETTE_TAG)->output((data & 0x01) ? -1.0 : 1.0);
98		lviv_update_memory(space.machine());
	93	machine().device<cassette_image_device>(CASSETTE_TAG)->output((data & 0x01) ? -1.0 : 1.0);
	94	lviv_update_memory(machine());
99	95	}
100	96
101		static READ8_DEVICE_HANDLER ( lviv_ppi_1_porta_r )
	97	READ8_MEMBER(lviv_state::lviv_ppi_1_porta_r)
102	98	{
103	99	return 0xff;
104	100	}
105	101
106		static READ8_DEVICE_HANDLER ( lviv_ppi_1_portb_r )   /* keyboard reading */
	102	READ8_MEMBER(lviv_state::lviv_ppi_1_portb_r)/* keyboard reading */
107	103	{
108		lviv_state *state = space.machine().driver_data<lviv_state>();
109		return   ((state->m_ppi_port_outputs[1][0] & 0x01) ? 0xff : space.machine().root_device().ioport("KEY0")->read()) &
110		((state->m_ppi_port_outputs[1][0] & 0x02) ? 0xff : space.machine().root_device().ioport("KEY1")->read()) &
111		((state->m_ppi_port_outputs[1][0] & 0x04) ? 0xff : space.machine().root_device().ioport("KEY2")->read()) &
112		((state->m_ppi_port_outputs[1][0] & 0x08) ? 0xff : space.machine().root_device().ioport("KEY3")->read()) &
113		((state->m_ppi_port_outputs[1][0] & 0x10) ? 0xff : space.machine().root_device().ioport("KEY4")->read()) &
114		((state->m_ppi_port_outputs[1][0] & 0x20) ? 0xff : space.machine().root_device().ioport("KEY5")->read()) &
115		((state->m_ppi_port_outputs[1][0] & 0x40) ? 0xff : space.machine().root_device().ioport("KEY6")->read()) &
116		((state->m_ppi_port_outputs[1][0] & 0x80) ? 0xff : state->ioport("KEY7")->read());
	104	return   ((m_ppi_port_outputs[1][0] & 0x01) ? 0xff : machine().root_device().ioport("KEY0")->read()) &
	105	((m_ppi_port_outputs[1][0] & 0x02) ? 0xff : machine().root_device().ioport("KEY1")->read()) &
	106	((m_ppi_port_outputs[1][0] & 0x04) ? 0xff : machine().root_device().ioport("KEY2")->read()) &
	107	((m_ppi_port_outputs[1][0] & 0x08) ? 0xff : machine().root_device().ioport("KEY3")->read()) &
	108	((m_ppi_port_outputs[1][0] & 0x10) ? 0xff : machine().root_device().ioport("KEY4")->read()) &
	109	((m_ppi_port_outputs[1][0] & 0x20) ? 0xff : machine().root_device().ioport("KEY5")->read()) &
	110	((m_ppi_port_outputs[1][0] & 0x40) ? 0xff : machine().root_device().ioport("KEY6")->read()) &
	111	((m_ppi_port_outputs[1][0] & 0x80) ? 0xff : ioport("KEY7")->read());
117	112	}
118	113
119		static READ8_DEVICE_HANDLER ( lviv_ppi_1_portc_r )     /* keyboard reading */
	114	READ8_MEMBER(lviv_state::lviv_ppi_1_portc_r)/* keyboard reading */
120	115	{
121		lviv_state *state = space.machine().driver_data<lviv_state>();
122		return   ((state->m_ppi_port_outputs[1][2] & 0x01) ? 0xff : space.machine().root_device().ioport("KEY8")->read()) &
123		((state->m_ppi_port_outputs[1][2] & 0x02) ? 0xff : space.machine().root_device().ioport("KEY9" )->read()) &
124		((state->m_ppi_port_outputs[1][2] & 0x04) ? 0xff : space.machine().root_device().ioport("KEY10")->read()) &
125		((state->m_ppi_port_outputs[1][2] & 0x08) ? 0xff : state->ioport("KEY11")->read());
	116	return   ((m_ppi_port_outputs[1][2] & 0x01) ? 0xff : machine().root_device().ioport("KEY8")->read()) &
	117	((m_ppi_port_outputs[1][2] & 0x02) ? 0xff : machine().root_device().ioport("KEY9" )->read()) &
	118	((m_ppi_port_outputs[1][2] & 0x04) ? 0xff : machine().root_device().ioport("KEY10")->read()) &
	119	((m_ppi_port_outputs[1][2] & 0x08) ? 0xff : ioport("KEY11")->read());
126	120	}
127	121
128		static WRITE8_DEVICE_HANDLER ( lviv_ppi_1_porta_w )   /* kayboard scaning */
	122	WRITE8_MEMBER(lviv_state::lviv_ppi_1_porta_w)/* kayboard scaning */
129	123	{
130		lviv_state *state = space.machine().driver_data<lviv_state>();
131		state->m_ppi_port_outputs[1][0] = data;
	124	m_ppi_port_outputs[1][0] = data;
132	125	}
133	126
134		static WRITE8_DEVICE_HANDLER ( lviv_ppi_1_portb_w )
	127	WRITE8_MEMBER(lviv_state::lviv_ppi_1_portb_w)
135	128	{
136		lviv_state *state = space.machine().driver_data<lviv_state>();
137		state->m_ppi_port_outputs[1][1] = data;
	129	m_ppi_port_outputs[1][1] = data;
138	130	}
139	131
140		static WRITE8_DEVICE_HANDLER ( lviv_ppi_1_portc_w )   /* kayboard scaning */
	132	WRITE8_MEMBER(lviv_state::lviv_ppi_1_portc_w)/* kayboard scaning */
141	133	{
142		lviv_state *state = space.machine().driver_data<lviv_state>();
143		state->m_ppi_port_outputs[1][2] = data;
	134	m_ppi_port_outputs[1][2] = data;
144	135	}
145	136
146	137
r18257	r18258
212	203
213	204	I8255A_INTERFACE( lviv_ppi8255_interface_0 )
214	205	{
215		DEVCB_HANDLER(lviv_ppi_0_porta_r),
216		DEVCB_HANDLER(lviv_ppi_0_porta_w),
217		DEVCB_HANDLER(lviv_ppi_0_portb_r),
218		DEVCB_HANDLER(lviv_ppi_0_portb_w),
219		DEVCB_HANDLER(lviv_ppi_0_portc_r),
220		DEVCB_HANDLER(lviv_ppi_0_portc_w)
	206	DEVCB_DRIVER_MEMBER(lviv_state,lviv_ppi_0_porta_r),
	207	DEVCB_DRIVER_MEMBER(lviv_state,lviv_ppi_0_porta_w),
	208	DEVCB_DRIVER_MEMBER(lviv_state,lviv_ppi_0_portb_r),
	209	DEVCB_DRIVER_MEMBER(lviv_state,lviv_ppi_0_portb_w),
	210	DEVCB_DRIVER_MEMBER(lviv_state,lviv_ppi_0_portc_r),
	211	DEVCB_DRIVER_MEMBER(lviv_state,lviv_ppi_0_portc_w)
221	212	};
222	213
223	214	I8255A_INTERFACE( lviv_ppi8255_interface_1 )
224	215	{
225		DEVCB_HANDLER(lviv_ppi_1_porta_r),
226		DEVCB_HANDLER(lviv_ppi_1_porta_w),
227		DEVCB_HANDLER(lviv_ppi_1_portb_r),
228		DEVCB_HANDLER(lviv_ppi_1_portb_w),
229		DEVCB_HANDLER(lviv_ppi_1_portc_r),
230		DEVCB_HANDLER(lviv_ppi_1_portc_w)
	216	DEVCB_DRIVER_MEMBER(lviv_state,lviv_ppi_1_porta_r),
	217	DEVCB_DRIVER_MEMBER(lviv_state,lviv_ppi_1_porta_w),
	218	DEVCB_DRIVER_MEMBER(lviv_state,lviv_ppi_1_portb_r),
	219	DEVCB_DRIVER_MEMBER(lviv_state,lviv_ppi_1_portb_w),
	220	DEVCB_DRIVER_MEMBER(lviv_state,lviv_ppi_1_portc_r),
	221	DEVCB_DRIVER_MEMBER(lviv_state,lviv_ppi_1_portc_w)
231	222	};
232	223
233	224	void lviv_state::machine_reset()

trunk/src/mess/machine/dgn_beta.c

r18257	r18258
92	92
93	93	/* Debugging variables */
94	94
95		static DECLARE_READ8_DEVICE_HANDLER(d_pia0_pa_r);
96		static DECLARE_WRITE8_DEVICE_HANDLER(d_pia0_pa_w);
97		static DECLARE_READ8_DEVICE_HANDLER(d_pia0_pb_r);
98		static DECLARE_WRITE8_DEVICE_HANDLER(d_pia0_pb_w);
99		static DECLARE_WRITE8_DEVICE_HANDLER(d_pia0_cb2_w);
100		static WRITE_LINE_DEVICE_HANDLER(d_pia0_irq_a);
101		static WRITE_LINE_DEVICE_HANDLER(d_pia0_irq_b);
102		static DECLARE_READ8_DEVICE_HANDLER(d_pia1_pa_r);
103		static DECLARE_WRITE8_DEVICE_HANDLER(d_pia1_pa_w);
104		static DECLARE_READ8_DEVICE_HANDLER(d_pia1_pb_r);
105		static DECLARE_WRITE8_DEVICE_HANDLER(d_pia1_pb_w);
106		static WRITE_LINE_DEVICE_HANDLER(d_pia1_irq_a);
107		static WRITE_LINE_DEVICE_HANDLER(d_pia1_irq_b);
108		static DECLARE_READ8_DEVICE_HANDLER(d_pia2_pa_r);
109		static DECLARE_WRITE8_DEVICE_HANDLER(d_pia2_pa_w);
110		static DECLARE_READ8_DEVICE_HANDLER(d_pia2_pb_r);
111		static DECLARE_WRITE8_DEVICE_HANDLER(d_pia2_pb_w);
112		static WRITE_LINE_DEVICE_HANDLER(d_pia2_irq_a);
113		static WRITE_LINE_DEVICE_HANDLER(d_pia2_irq_b);
114	95
	96
115	97	static void cpu0_recalc_irq(running_machine &machine, int state);
116	98	static void cpu0_recalc_firq(running_machine &machine, int state);
117	99
r18257	r18258
128	110	/* PIA 0 at $FC20-$FC23 I46 */
129	111	{
130	112	/*inputs : A/B,CA/B1,CA/B2 */
131		DEVCB_HANDLER(d_pia0_pa_r),
132		DEVCB_HANDLER(d_pia0_pb_r),
	113	DEVCB_DRIVER_MEMBER(dgn_beta_state,d_pia0_pa_r),
	114	DEVCB_DRIVER_MEMBER(dgn_beta_state,d_pia0_pb_r),
133	115	DEVCB_NULL,
134	116	DEVCB_NULL,
135	117	DEVCB_NULL,
136	118	DEVCB_NULL,
137	119	/*outputs: A/B,CA/B2       */
138		DEVCB_HANDLER(d_pia0_pa_w),
139		DEVCB_HANDLER(d_pia0_pb_w),
	120	DEVCB_DRIVER_MEMBER(dgn_beta_state,d_pia0_pa_w),
	121	DEVCB_DRIVER_MEMBER(dgn_beta_state,d_pia0_pb_w),
140	122	DEVCB_NULL,
141		DEVCB_HANDLER(d_pia0_cb2_w),
	123	DEVCB_DRIVER_MEMBER(dgn_beta_state,d_pia0_cb2_w),
142	124	/*irqs   : A/B         */
143		DEVCB_LINE(d_pia0_irq_a),
144		DEVCB_LINE(d_pia0_irq_b)
	125	DEVCB_DRIVER_LINE_MEMBER(dgn_beta_state,d_pia0_irq_a),
	126	DEVCB_DRIVER_LINE_MEMBER(dgn_beta_state,d_pia0_irq_b)
145	127	},
146	128
147	129	/* PIA 1 at $FC24-$FC27 I63 */
148	130	{
149	131	/*inputs : A/B,CA/B1,CA/B2 */
150		DEVCB_HANDLER(d_pia1_pa_r),
151		DEVCB_HANDLER(d_pia1_pb_r),
	132	DEVCB_DRIVER_MEMBER(dgn_beta_state,d_pia1_pa_r),
	133	DEVCB_DRIVER_MEMBER(dgn_beta_state,d_pia1_pb_r),
152	134	DEVCB_NULL,
153	135	DEVCB_NULL,
154	136	DEVCB_NULL,
155	137	DEVCB_NULL,
156	138	/*outputs: A/B,CA/B2       */
157		DEVCB_HANDLER(d_pia1_pa_w),
158		DEVCB_HANDLER(d_pia1_pb_w),
	139	DEVCB_DRIVER_MEMBER(dgn_beta_state,d_pia1_pa_w),
	140	DEVCB_DRIVER_MEMBER(dgn_beta_state,d_pia1_pb_w),
159	141	DEVCB_NULL,
160	142	DEVCB_NULL,
161	143	/*irqs   : A/B         */
162		DEVCB_LINE(d_pia1_irq_a),
163		DEVCB_LINE(d_pia1_irq_b)
	144	DEVCB_DRIVER_LINE_MEMBER(dgn_beta_state,d_pia1_irq_a),
	145	DEVCB_DRIVER_LINE_MEMBER(dgn_beta_state,d_pia1_irq_b)
164	146	},
165	147
166	148	/* PIA 2 at FCC0-FCC3 I28 */
r18257	r18258
168	150	/* from the WD2797 */
169	151	{
170	152	/*inputs : A/B,CA/B1,CA/B2 */
171		DEVCB_HANDLER(d_pia2_pa_r),
172		DEVCB_HANDLER(d_pia2_pb_r),
	153	DEVCB_DRIVER_MEMBER(dgn_beta_state,d_pia2_pa_r),
	154	DEVCB_DRIVER_MEMBER(dgn_beta_state,d_pia2_pb_r),
173	155	DEVCB_NULL,
174	156	DEVCB_NULL,
175	157	DEVCB_NULL,
176	158	DEVCB_NULL,
177	159	/*outputs: A/B,CA/B2       */
178		DEVCB_HANDLER(d_pia2_pa_w),
179		DEVCB_HANDLER(d_pia2_pb_w),
	160	DEVCB_DRIVER_MEMBER(dgn_beta_state,d_pia2_pa_w),
	161	DEVCB_DRIVER_MEMBER(dgn_beta_state,d_pia2_pb_w),
180	162	DEVCB_NULL,
181	163	DEVCB_NULL,
182	164	/*irqs   : A/B         */
183		DEVCB_LINE(d_pia2_irq_a),
184		DEVCB_LINE(d_pia2_irq_b)
	165	DEVCB_DRIVER_LINE_MEMBER(dgn_beta_state,d_pia2_irq_a),
	166	DEVCB_DRIVER_LINE_MEMBER(dgn_beta_state,d_pia2_irq_b)
185	167	}
186	168	};
187	169
r18257	r18258
534	516	CB1 I36/39/6845(Horz Sync)
535	517	CB2 Keyboard (out) Low loads input shift reg
536	518	*/
537		static READ8_DEVICE_HANDLER(d_pia0_pa_r)
	519	READ8_MEMBER(dgn_beta_state::d_pia0_pa_r)
538	520	{
539	521	return 0;
540	522	}
541	523
542		static WRITE8_DEVICE_HANDLER(d_pia0_pa_w)
	524	WRITE8_MEMBER(dgn_beta_state::d_pia0_pa_w)
543	525	{
544	526	}
545	527
546		static READ8_DEVICE_HANDLER(d_pia0_pb_r)
	528	READ8_MEMBER(dgn_beta_state::d_pia0_pb_r)
547	529	{
548		dgn_beta_state *state = space.machine().driver_data<dgn_beta_state>();
549	530	int RetVal;
550	531	int Idx;
551	532	int Selected;
r18257	r18258
556	537
557	538	LOG_KEYBOARD(("PB Read\n"));
558	539
559		state->m_KAny_next = 0;
	540	m_KAny_next = 0;
560	541
561		Selected = SelectedKeyrow(state, state->m_RowShifter);
	542	Selected = SelectedKeyrow(this, m_RowShifter);
562	543
563	544	/* Scan the whole keyboard, if output shifter is all low */
564	545	/* This actually scans in the keyboard */
565		if(state->m_RowShifter == 0x00)
	546	if(m_RowShifter == 0x00)
566	547	{
567	548	for(Idx=0; Idx<NoKeyrows; Idx++)
568	549	{
569		state->m_Keyboard[Idx] = space.machine().root_device().ioport(keynames[Idx])->read();
	550	m_Keyboard[Idx] = machine().root_device().ioport(keynames[Idx])->read();
570	551
571		if(state->m_Keyboard[Idx] != 0x7F)
572		state->m_KAny_next = 1;
	552	if(m_Keyboard[Idx] != 0x7F)
	553	m_KAny_next = 1;
573	554	}
574	555	}
575	556	else   /* Just scan current row, from previously read values */
576	557	{
577		if(GetKeyRow(state, Selected) != NO_KEY_PRESSED)
578		state->m_KAny_next = 1;
	558	if(GetKeyRow(this, Selected) != NO_KEY_PRESSED)
	559	m_KAny_next = 1;
579	560	}
580	561
581		RetVal = (state->m_KInDat_next<<5) | (state->m_KAny_next<<2);
	562	RetVal = (m_KInDat_next<<5) | (m_KAny_next<<2);
582	563
583		LOG_KEYBOARD(("FC22=$%02X KAny=%d\n", RetVal, state->m_KAny_next));
	564	LOG_KEYBOARD(("FC22=$%02X KAny=%d\n", RetVal, m_KAny_next));
584	565
585	566	return RetVal;
586	567	}
587	568
588		static WRITE8_DEVICE_HANDLER(d_pia0_pb_w)
	569	WRITE8_MEMBER(dgn_beta_state::d_pia0_pb_w)
589	570	{
590		dgn_beta_state *state = space.machine().driver_data<dgn_beta_state>();
591	571	int   InClkState;
592	572	//int   OutClkState;
593	573
r18257	r18258
596	576	InClkState   = data & KInClk;
597	577	//OutClkState   = data & KOutClk;
598	578
599		LOG_KEYBOARD(("InClkState=$%02X OldInClkState=$%02X Keyrow=$%02X ",InClkState,(state->m_d_pia0_pb_last & KInClk),state->m_Keyrow));
	579	LOG_KEYBOARD(("InClkState=$%02X OldInClkState=$%02X Keyrow=$%02X ",InClkState,(m_d_pia0_pb_last & KInClk),m_Keyrow));
600	580
601	581	/* Input clock bit has changed state */
602		if ((InClkState) != (state->m_d_pia0_pb_last & KInClk))
	582	if ((InClkState) != (m_d_pia0_pb_last & KInClk))
603	583	{
604	584	/* Clock in bit */
605	585	if(InClkState)
606	586	{
607		state->m_KInDat_next=(~state->m_Keyrow & 0x40)>>6;
608		state->m_Keyrow = ((state->m_Keyrow<<1) | 0x01) & 0x7F ;
609		LOG_KEYBOARD(("Keyrow=$%02X KInDat_next=%X\n",state->m_Keyrow,state->m_KInDat_next));
	587	m_KInDat_next=(~m_Keyrow & 0x40)>>6;
	588	m_Keyrow = ((m_Keyrow<<1) | 0x01) & 0x7F ;
	589	LOG_KEYBOARD(("Keyrow=$%02X KInDat_next=%X\n",m_Keyrow,m_KInDat_next));
610	590	}
611	591	}
612	592
613		state->m_d_pia0_pb_last=data;
	593	m_d_pia0_pb_last=data;
614	594	}
615	595
616		static WRITE8_DEVICE_HANDLER(d_pia0_cb2_w)
	596	WRITE8_MEMBER(dgn_beta_state::d_pia0_cb2_w)
617	597	{
618		dgn_beta_state *state = space.machine().driver_data<dgn_beta_state>();
619	598	int   RowNo;
620	599	LOG_KEYBOARD(("\nCB2 Write\n"));
621	600
622	601	/* load keyrow on rising edge of CB2 */
623		if((data==1) && (state->m_d_pia0_cb2_last==0))
	602	if((data==1) && (m_d_pia0_cb2_last==0))
624	603	{
625		RowNo=SelectedKeyrow(state, state->m_RowShifter);
626		state->m_Keyrow=GetKeyRow(state, RowNo);
	604	RowNo=SelectedKeyrow(this, m_RowShifter);
	605	m_Keyrow=GetKeyRow(this, RowNo);
627	606
628	607	/* Output clock rising edge, clock CB2 value into rowshifterlow to high transition */
629	608	/* In the beta the shift registers are a cmos 4015, and a cmos 4013 in series */
630		state->m_RowShifter = (state->m_RowShifter<<1) | ((state->m_d_pia0_pb_last & KOutDat)>>4);
631		state->m_RowShifter &= 0x3FF;
632		LOG_KEYBOARD(("Rowshifter=$%02X Keyrow=$%02X\n",state->m_RowShifter,state->m_Keyrow));
633		if (VERBOSE) debug_console_printf(space.machine(), "rowshifter clocked, value=%3X, RowNo=%d, Keyrow=%2X\n",state->m_RowShifter,RowNo,state->m_Keyrow);
	609	m_RowShifter = (m_RowShifter<<1) | ((m_d_pia0_pb_last & KOutDat)>>4);
	610	m_RowShifter &= 0x3FF;
	611	LOG_KEYBOARD(("Rowshifter=$%02X Keyrow=$%02X\n",m_RowShifter,m_Keyrow));
	612	if (VERBOSE) debug_console_printf(machine(), "rowshifter clocked, value=%3X, RowNo=%d, Keyrow=%2X\n",m_RowShifter,RowNo,m_Keyrow);
634	613	}
635	614
636		state->m_d_pia0_cb2_last=data;
	615	m_d_pia0_cb2_last=data;
637	616	}
638	617
639	618
640		static WRITE_LINE_DEVICE_HANDLER( d_pia0_irq_a )
	619	WRITE_LINE_MEMBER(dgn_beta_state::d_pia0_irq_a)
641	620	{
642		cpu0_recalc_irq(device->machine(), state);
	621	cpu0_recalc_irq(machine(), state);
643	622	}
644	623
645		static WRITE_LINE_DEVICE_HANDLER( d_pia0_irq_b )
	624	WRITE_LINE_MEMBER(dgn_beta_state::d_pia0_irq_b)
646	625	{
647		cpu0_recalc_firq(device->machine(), state);
	626	cpu0_recalc_firq(machine(), state);
648	627	}
649	628
650	629	/* PIA #1 at $FC24-$FC27 I63
r18257	r18258
657	636	Baud rate               PB1..PB5 ????
658	637	*/
659	638
660		static READ8_DEVICE_HANDLER(d_pia1_pa_r)
	639	READ8_MEMBER(dgn_beta_state::d_pia1_pa_r)
661	640	{
662	641	return 0;
663	642	}
664	643
665		static WRITE8_DEVICE_HANDLER(d_pia1_pa_w)
	644	WRITE8_MEMBER(dgn_beta_state::d_pia1_pa_w)
666	645	{
667		dgn_beta_state *state = space.machine().driver_data<dgn_beta_state>();
668	646	int   HALT_DMA;
669		device_t *fdc = space.machine().device(FDC_TAG);
	647	device_t *fdc = machine().device(FDC_TAG);
670	648
671	649	/* Only play with halt line if halt bit changed since last write */
672		if((data & 0x80) != state->m_d_pia1_pa_last)
	650	if((data & 0x80) != m_d_pia1_pa_last)
673	651	{
674	652	/* Bit 7 of $FF24, seems to control HALT on second CPU (through an inverter) */
675	653	if(data & 0x80)
r18257	r18258
678	656	HALT_DMA = CLEAR_LINE;
679	657
680	658	LOG_HALT(("DMA_CPU HALT=%d\n", HALT_DMA));
681		space.machine().device(DMACPU_TAG)->execute().set_input_line(INPUT_LINE_HALT, HALT_DMA);
	659	machine().device(DMACPU_TAG)->execute().set_input_line(INPUT_LINE_HALT, HALT_DMA);
682	660
683	661	/* CPU un-halted let it run ! */
684	662	if (HALT_DMA == CLEAR_LINE)
685		space.machine().device(MAINCPU_TAG)->execute().yield();
	663	machine().device(MAINCPU_TAG)->execute().yield();
686	664
687		state->m_d_pia1_pa_last = data & 0x80;
	665	m_d_pia1_pa_last = data & 0x80;
688	666	}
689	667
690	668	/* Drive selects are binary encoded on PA0 & PA1 */
r18257	r18258
695	673	LOG_DISK(("Set density %s\n", BIT(data, 6) ? "low" : "high"));
696	674	}
697	675
698		static READ8_DEVICE_HANDLER(d_pia1_pb_r)
	676	READ8_MEMBER(dgn_beta_state::d_pia1_pb_r)
699	677	{
700	678	return 0;
701	679	}
702	680
703		static WRITE8_DEVICE_HANDLER(d_pia1_pb_w)
	681	WRITE8_MEMBER(dgn_beta_state::d_pia1_pb_w)
704	682	{
705		dgn_beta_state *state = space.machine().driver_data<dgn_beta_state>();
706	683	int   HALT_CPU;
707	684
708	685	/* Only play with halt line if halt bit changed since last write */
709		if((data & 0x02) != state->m_d_pia1_pb_last)
	686	if((data & 0x02) != m_d_pia1_pb_last)
710	687	{
711	688	/* Bit 1 of $FF26, seems to control HALT on primary CPU */
712	689	if(data & 0x02)
r18257	r18258
715	692	HALT_CPU = ASSERT_LINE;
716	693
717	694	LOG_HALT(("MAIN_CPU HALT=%d\n", HALT_CPU));
718		space.machine().device(MAINCPU_TAG)->execute().set_input_line(INPUT_LINE_HALT, HALT_CPU);
	695	machine().device(MAINCPU_TAG)->execute().set_input_line(INPUT_LINE_HALT, HALT_CPU);
719	696
720		state->m_d_pia1_pb_last = data & 0x02;
	697	m_d_pia1_pb_last = data & 0x02;
721	698
722	699	/* CPU un-halted let it run ! */
723	700	if (HALT_CPU == CLEAR_LINE)
724		space.machine().device(DMACPU_TAG)->execute().yield();
	701	machine().device(DMACPU_TAG)->execute().yield();
725	702	}
726	703	}
727	704
728		static WRITE_LINE_DEVICE_HANDLER( d_pia1_irq_a )
	705	WRITE_LINE_MEMBER(dgn_beta_state::d_pia1_irq_a)
729	706	{
730		cpu0_recalc_irq(device->machine(), state);
	707	cpu0_recalc_irq(machine(), state);
731	708	}
732	709
733		static WRITE_LINE_DEVICE_HANDLER( d_pia1_irq_b )
	710	WRITE_LINE_MEMBER(dgn_beta_state::d_pia1_irq_b)
734	711	{
735		cpu0_recalc_irq(device->machine(), state);
	712	cpu0_recalc_irq(machine(), state);
736	713	}
737	714
738	715	/* PIA #2 at FCC0-FCC3 I28
r18257	r18258
744	721	Graphics control PB0..PB7 ???
745	722	VSYNC intutrupt CB2
746	723	*/
747		static READ8_DEVICE_HANDLER(d_pia2_pa_r)
	724	READ8_MEMBER(dgn_beta_state::d_pia2_pa_r)
748	725	{
749	726	return 0;
750	727	}
751	728
752		static WRITE8_DEVICE_HANDLER(d_pia2_pa_w)
	729	WRITE8_MEMBER(dgn_beta_state::d_pia2_pa_w)
753	730	{
754		dgn_beta_state *state = space.machine().driver_data<dgn_beta_state>();
755	731	int OldTask;
756	732	int OldEnableMap;
757	733	int NMI;
r18257	r18258
762	738	NMI=(data & 0x80);
763	739
764	740	/* only take action if NMI changed */
765		if(NMI != state->m_DMA_NMI_LAST)
	741	if(NMI != m_DMA_NMI_LAST)
766	742	{
767	743	LOG_INTS(("cpu1 NMI : %d\n", NMI));
768	744	if(!NMI)
769	745	{
770		space.machine().device(DMACPU_TAG)->execute().set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
	746	machine().device(DMACPU_TAG)->execute().set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
771	747	logerror("device_yield()\n");
772		space.machine().device(DMACPU_TAG)->execute().yield();   /* Let DMA CPU run */
	748	machine().device(DMACPU_TAG)->execute().yield();   /* Let DMA CPU run */
773	749	}
774	750	else
775	751	{
776		space.machine().device(DMACPU_TAG)->execute().set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
	752	machine().device(DMACPU_TAG)->execute().set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
777	753	}
778	754
779		state->m_DMA_NMI_LAST = NMI;   /* Save it for next time */
	755	m_DMA_NMI_LAST = NMI;   /* Save it for next time */
780	756	}
781	757
782		OldEnableMap = state->m_EnableMapRegs;
	758	OldEnableMap = m_EnableMapRegs;
783	759	/* Bit 6 seems to enable memory paging */
784	760	if(data & 0x40)
785		state->m_EnableMapRegs = 0;
	761	m_EnableMapRegs = 0;
786	762	else
787		state->m_EnableMapRegs = 1;
	763	m_EnableMapRegs = 1;
788	764
789	765	/* Bits 0..3 seem to control which task register is selected */
790		OldTask = state->m_PIATaskReg;
791		state->m_PIATaskReg = data & 0x0F;
	766	OldTask = m_PIATaskReg;
	767	m_PIATaskReg = data & 0x0F;
792	768
793		LOG_TASK(("OldTask=$%02X EnableMapRegs=%d OldEnableMap=%d\n", OldTask, state->m_EnableMapRegs, OldEnableMap));
	769	LOG_TASK(("OldTask=$%02X EnableMapRegs=%d OldEnableMap=%d\n", OldTask, m_EnableMapRegs, OldEnableMap));
794	770
795	771	// Maping was enabled or disabled, select apropreate task reg
796	772	// and map it in
797		if (state->m_EnableMapRegs != OldEnableMap)
	773	if (m_EnableMapRegs != OldEnableMap)
798	774	{
799		if(state->m_EnableMapRegs)
800		state->m_TaskReg = state->m_PIATaskReg;
	775	if(m_EnableMapRegs)
	776	m_TaskReg = m_PIATaskReg;
801	777	else
802		state->m_TaskReg = NoPagingTask;
	778	m_TaskReg = NoPagingTask;
803	779
804		UpdateBanks(space.machine(), 0, IOPage + 1);
	780	UpdateBanks(machine(), 0, IOPage + 1);
805	781	}
806	782	else
807	783	{
808	784	// Update ram banks only if task reg changed and mapping enabled
809		if ((state->m_PIATaskReg != OldTask) && (state->m_EnableMapRegs))
	785	if ((m_PIATaskReg != OldTask) && (m_EnableMapRegs))
810	786	{
811		state->m_TaskReg = state->m_PIATaskReg;
812		UpdateBanks(space.machine(), 0, IOPage + 1);
	787	m_TaskReg = m_PIATaskReg;
	788	UpdateBanks(machine(), 0, IOPage + 1);
813	789	}
814	790	}
815		LOG_TASK(("TaskReg=$%02X PIATaskReg=$%02X\n", state->m_TaskReg, state->m_PIATaskReg));
	791	LOG_TASK(("TaskReg=$%02X PIATaskReg=$%02X\n", m_TaskReg, m_PIATaskReg));
816	792	}
817	793
818		static READ8_DEVICE_HANDLER(d_pia2_pb_r)
	794	READ8_MEMBER(dgn_beta_state::d_pia2_pb_r)
819	795	{
820	796	return 0;
821	797	}
822	798
823		static WRITE8_DEVICE_HANDLER(d_pia2_pb_w)
	799	WRITE8_MEMBER(dgn_beta_state::d_pia2_pb_w)
824	800	{
825	801	/* Update top video address lines */
826		dgnbeta_vid_set_gctrl(space.machine(), data);
	802	dgnbeta_vid_set_gctrl(machine(), data);
827	803	}
828	804
829		static WRITE_LINE_DEVICE_HANDLER( d_pia2_irq_a )
	805	WRITE_LINE_MEMBER(dgn_beta_state::d_pia2_irq_a)
830	806	{
831		cpu0_recalc_irq(device->machine(), state);
	807	cpu0_recalc_irq(machine(), state);
832	808	}
833	809
834		static WRITE_LINE_DEVICE_HANDLER( d_pia2_irq_b )
	810	WRITE_LINE_MEMBER(dgn_beta_state::d_pia2_irq_b)
835	811	{
836		cpu0_recalc_irq(device->machine(), state);
	812	cpu0_recalc_irq(machine(), state);
837	813	}
838	814
839	815	/************************************ Recalculate CPU inturrupts ****************************/
r18257	r18258
888	864	/********************************************************************************************/
889	865
890	866	/* The INTRQ line goes through pia2 ca1, in exactly the same way as DRQ from DragonDos does */
891		static WRITE_LINE_DEVICE_HANDLER( dgnbeta_fdc_intrq_w )
	867	WRITE_LINE_MEMBER(dgn_beta_state::dgnbeta_fdc_intrq_w)
892	868	{
893		dgn_beta_state *drvstate = device->machine().driver_data<dgn_beta_state>();
	869	device_t *device = machine().device(PIA_2_TAG);
894	870	LOG_DISK(("dgnbeta_fdc_intrq_w(%d)\n", state));
895		if(drvstate->m_wd2797_written)
	871	if(m_wd2797_written)
896	872	downcast<pia6821_device *>(device)->ca1_w(state);
897	873	}
898	874
899	875	/* DRQ is routed through various logic to the FIRQ inturrupt line on *BOTH* CPUs */
900		static WRITE_LINE_DEVICE_HANDLER( dgnbeta_fdc_drq_w )
	876	WRITE_LINE_MEMBER(dgn_beta_state::dgnbeta_fdc_drq_w)
901	877	{
902	878	LOG_DISK(("dgnbeta_fdc_drq_w(%d)\n", state));
903		cpu1_recalc_firq(device->machine(), state);
	879	cpu1_recalc_firq(machine(), state);
904	880	}
905	881
906	882	const wd17xx_interface dgnbeta_wd17xx_interface =
907	883	{
908	884	DEVCB_NULL,
909		DEVCB_DEVICE_LINE(PIA_2_TAG, dgnbeta_fdc_intrq_w),
910		DEVCB_LINE(dgnbeta_fdc_drq_w),
	885	DEVCB_DRIVER_LINE_MEMBER(dgn_beta_state,dgnbeta_fdc_intrq_w),
	886	DEVCB_DRIVER_LINE_MEMBER(dgn_beta_state,dgnbeta_fdc_drq_w),
911	887	{FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3}
912	888	};
913	889

trunk/src/mess/machine/pokemini.c

r18257	r18258
381	381	}
382	382
383	383
384		WRITE8_DEVICE_HANDLER( pokemini_hwreg_w )
	384	WRITE8_MEMBER(pokemini_state::pokemini_hwreg_w)
385	385	{
386		pokemini_state *state = space.machine().driver_data<pokemini_state>();
387	386	static const int timer_to_cycles_fast[8] = { 2, 8, 32, 64, 128, 256, 1024, 4096 };
388	387	static const int timer_to_cycles_slow[8] = { 128, 256, 512, 1024, 2048, 4096, 8192, 16384 };
389	388
r18257	r18258
401	400	case 0x02:   /* CPU related?
402	401	Bit 0-7 R/W Unknown
403	402	*/
404		logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", space.machine().firstcpu->pc( ), offset, data );
	403	logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", machine().firstcpu->pc( ), offset, data );
405	404	break;
406	405	case 0x08:   /* Seconds-timer control
407	406	Bit 0   R/W Timer enable
r18257	r18258
410	409	*/
411	410	if ( data & 0x02 )
412	411	{
413		state->m_pm_reg[0x09] = 0x00;
414		state->m_pm_reg[0x0A] = 0x00;
415		state->m_pm_reg[0x0B] = 0x00;
	412	m_pm_reg[0x09] = 0x00;
	413	m_pm_reg[0x0A] = 0x00;
	414	m_pm_reg[0x0B] = 0x00;
416	415	data &= ~0x02;
417	416	}
418	417	break;
r18257	r18258
433	432	Bit 5   R   Battery status: 0 - battery OK, 1 - battery low
434	433	Bit 6-7     Unused
435	434	*/
436		logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", space.machine().firstcpu->pc( ), offset, data );
	435	logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", machine().firstcpu->pc( ), offset, data );
437	436	break;
438	437	case 0x18:   /* Timer 1 pre-scale + enable
439	438	Bit 0-2 R/W low timer 1 prescaler select
r18257	r18258
450	449	Bit 7   R/W Enable high counting
451	450	*/
452	451	/* Check for prescaler change for the low counter */
453		if ( ( data & 0x07 ) != ( state->m_pm_reg[0x18] & 0x07 ) )
	452	if ( ( data & 0x07 ) != ( m_pm_reg[0x18] & 0x07 ) )
454	453	{
455	454	int index = data & 0x07;
456		int cycles = ( state->m_pm_reg[0x19] & 0x01 ) ? timer_to_cycles_slow[index] : timer_to_cycles_fast[index];
	455	int cycles = ( m_pm_reg[0x19] & 0x01 ) ? timer_to_cycles_slow[index] : timer_to_cycles_fast[index];
457	456
458		state->m_timers.timer1->adjust(attotime::zero, 0, space.machine().device<cpu_device>("maincpu")->cycles_to_attotime(cycles));
	457	m_timers.timer1->adjust(attotime::zero, 0, machine().device<cpu_device>("maincpu")->cycles_to_attotime(cycles));
459	458	}
460	459
461	460	/* Check for prescaler change for the high counter */
462		if ( ( data & 0x70 ) != ( state->m_pm_reg[0x18] & 0x70 ) )
	461	if ( ( data & 0x70 ) != ( m_pm_reg[0x18] & 0x70 ) )
463	462	{
464	463	int index = ( data >> 4 ) & 0x07;
465		int cycles = ( state->m_pm_reg[0x19] & 0x02 ) ? timer_to_cycles_slow[index] : timer_to_cycles_fast[index];
	464	int cycles = ( m_pm_reg[0x19] & 0x02 ) ? timer_to_cycles_slow[index] : timer_to_cycles_fast[index];
466	465
467		state->m_timers.timer1_hi->adjust(attotime::zero, 0, space.machine().device<cpu_device>("maincpu")->cycles_to_attotime(cycles));
	466	m_timers.timer1_hi->adjust(attotime::zero, 0, machine().device<cpu_device>("maincpu")->cycles_to_attotime(cycles));
468	467	}
469	468
470	469	/* Check if timer1 low should be enabled */
471		if ( ( data & 0x08 ) && ( state->m_pm_reg[0x30] & 0x04 ) &&
472		( ( ( state->m_pm_reg[0x19] & 0x10 ) && ( state->m_pm_reg[0x19] & 0x01 ) ) ||
473		( ( state->m_pm_reg[0x19] & 0x20 ) && ! ( state->m_pm_reg[0x19] & 0x01 ) ) ) )
	470	if ( ( data & 0x08 ) && ( m_pm_reg[0x30] & 0x04 ) &&
	471	( ( ( m_pm_reg[0x19] & 0x10 ) && ( m_pm_reg[0x19] & 0x01 ) ) ||
	472	( ( m_pm_reg[0x19] & 0x20 ) && ! ( m_pm_reg[0x19] & 0x01 ) ) ) )
474	473	{
475		state->m_timers.timer1->enable( 1 );
	474	m_timers.timer1->enable( 1 );
476	475	}
477	476	else
478	477	{
479		state->m_timers.timer1->enable( 0 );
	478	m_timers.timer1->enable( 0 );
480	479	}
481	480
482	481	/* Check if timer1 high should be enabled */
483		if ( ( data & 0x80 ) && ( state->m_pm_reg[0x31] & 0x04 ) && ! ( state->m_pm_reg[0x30] & 0x80 ) &&
484		( ( ( state->m_pm_reg[0x19] & 0x10 ) && ( state->m_pm_reg[0x19] & 0x02 ) ) ||
485		( ( state->m_pm_reg[0x19] & 0x20 ) && ! ( state->m_pm_reg[0x19] & 0x02 ) ) ) )
	482	if ( ( data & 0x80 ) && ( m_pm_reg[0x31] & 0x04 ) && ! ( m_pm_reg[0x30] & 0x80 ) &&
	483	( ( ( m_pm_reg[0x19] & 0x10 ) && ( m_pm_reg[0x19] & 0x02 ) ) ||
	484	( ( m_pm_reg[0x19] & 0x20 ) && ! ( m_pm_reg[0x19] & 0x02 ) ) ) )
486	485	{
487		state->m_timers.timer1_hi->enable( 1 );
	486	m_timers.timer1_hi->enable( 1 );
488	487	}
489	488	else
490	489	{
491		state->m_timers.timer1_hi->enable( 0 );
	490	m_timers.timer1_hi->enable( 0 );
492	491	}
493	492	break;
494	493	case 0x19:   /* Timers 1 speed
r18257	r18258
500	499	Bit 6-7     Unused
501	500	*/
502	501	/* Check for prescaler change for the high counter */
503		if ( ( data & 0x01 ) != ( state->m_pm_reg[0x19] & 0x01 ) )
	502	if ( ( data & 0x01 ) != ( m_pm_reg[0x19] & 0x01 ) )
504	503	{
505		int index = state->m_pm_reg[0x18] & 0x07;
	504	int index = m_pm_reg[0x18] & 0x07;
506	505	int cycles = ( data & 0x01 ) ? timer_to_cycles_slow[index] : timer_to_cycles_fast[index];
507	506
508		state->m_timers.timer1->adjust(attotime::zero, 0, space.machine().device<cpu_device>("maincpu")->cycles_to_attotime(cycles));
	507	m_timers.timer1->adjust(attotime::zero, 0, machine().device<cpu_device>("maincpu")->cycles_to_attotime(cycles));
509	508	}
510	509
511	510	/* Check for prescaler change for the low counter */
512		if ( ( data & 0x02 ) != ( state->m_pm_reg[0x19] & 0x02 ) )
	511	if ( ( data & 0x02 ) != ( m_pm_reg[0x19] & 0x02 ) )
513	512	{
514		int index = ( state->m_pm_reg[0x18] >> 4 ) & 0x07;
	513	int index = ( m_pm_reg[0x18] >> 4 ) & 0x07;
515	514	int cycles = ( data & 0x02 ) ? timer_to_cycles_slow[index] : timer_to_cycles_fast[index];
516	515
517		state->m_timers.timer1_hi->adjust(attotime::zero, 0, space.machine().device<cpu_device>("maincpu")->cycles_to_attotime(cycles));
	516	m_timers.timer1_hi->adjust(attotime::zero, 0, machine().device<cpu_device>("maincpu")->cycles_to_attotime(cycles));
518	517	}
519	518
520	519	{
r18257	r18258
525	524	/* Check which fast timers should be enabled */
526	525	if ( data & 0x20 )
527	526	{
528		if ( ( state->m_pm_reg[0x18] & 0x08 ) && ( state->m_pm_reg[0x30] & 0x04 ) && ! ( data & 0x01 ) )
	527	if ( ( m_pm_reg[0x18] & 0x08 ) && ( m_pm_reg[0x30] & 0x04 ) && ! ( data & 0x01 ) )
529	528	timer1_enable = 1;
530	529
531		if ( ( state->m_pm_reg[0x18] & 0x80 ) && ( state->m_pm_reg[0x31] & 0x04 ) && ! ( state->m_pm_reg[0x30] & 0x80 ) && ! ( data & 0x02 ) )
	530	if ( ( m_pm_reg[0x18] & 0x80 ) && ( m_pm_reg[0x31] & 0x04 ) && ! ( m_pm_reg[0x30] & 0x80 ) && ! ( data & 0x02 ) )
532	531	timer1_hi_enable = 1;
533	532
534		if ( ( state->m_pm_reg[0x1A] & 0x08 ) && ( state->m_pm_reg[0x38] & 0x04 ) && ! ( state->m_pm_reg[0x1B] & 0x01 ) )
	533	if ( ( m_pm_reg[0x1A] & 0x08 ) && ( m_pm_reg[0x38] & 0x04 ) && ! ( m_pm_reg[0x1B] & 0x01 ) )
535	534	timer2_enable = 1;
536	535
537		if ( ( state->m_pm_reg[0x1A] & 0x80 ) && ( state->m_pm_reg[0x39] & 0x04 ) && ! ( state->m_pm_reg[0x38] & 0x80 ) && ! ( state->m_pm_reg[0x1B] & 0x02 ) )
	536	if ( ( m_pm_reg[0x1A] & 0x80 ) && ( m_pm_reg[0x39] & 0x04 ) && ! ( m_pm_reg[0x38] & 0x80 ) && ! ( m_pm_reg[0x1B] & 0x02 ) )
538	537	timer2_hi_enable = 1;
539	538
540		if ( ( state->m_pm_reg[0x1C] & 0x08 ) && ( state->m_pm_reg[0x48] & 0x04 ) && ! ( state->m_pm_reg[0x1D] & 0x01 ) )
	539	if ( ( m_pm_reg[0x1C] & 0x08 ) && ( m_pm_reg[0x48] & 0x04 ) && ! ( m_pm_reg[0x1D] & 0x01 ) )
541	540	timer3_enable = 1;
542	541
543		if ( ( state->m_pm_reg[0x1C] & 0x80 ) && ( state->m_pm_reg[0x49] & 0x04 ) && ! ( state->m_pm_reg[0x48] & 0x80 ) && ! ( state->m_pm_reg[0x1D] & 0x02 ) )
	542	if ( ( m_pm_reg[0x1C] & 0x80 ) && ( m_pm_reg[0x49] & 0x04 ) && ! ( m_pm_reg[0x48] & 0x80 ) && ! ( m_pm_reg[0x1D] & 0x02 ) )
544	543	timer3_hi_enable = 1;
545	544	}
546	545
547	546	/* Check which slow timers should be enabled */
548	547	if ( data & 0x10 )
549	548	{
550		if ( ( state->m_pm_reg[0x18] & 0x08 ) && ( data & 0x01 ) )
	549	if ( ( m_pm_reg[0x18] & 0x08 ) && ( data & 0x01 ) )
551	550	timer1_enable = 1;
552	551
553		if ( ( state->m_pm_reg[0x1A] & 0x08 ) && ( state->m_pm_reg[0x1B] & 0x01 ) )
	552	if ( ( m_pm_reg[0x1A] & 0x08 ) && ( m_pm_reg[0x1B] & 0x01 ) )
554	553	timer2_enable = 1;
555	554
556		if ( ( state->m_pm_reg[0x1C] & 0x08 ) && ( state->m_pm_reg[0x1D] & 0x01 ) )
	555	if ( ( m_pm_reg[0x1C] & 0x08 ) && ( m_pm_reg[0x1D] & 0x01 ) )
557	556	timer3_enable = 1;
558	557	}
559		state->m_timers.timer1->enable( timer1_enable );
560		state->m_timers.timer1_hi->enable( timer1_hi_enable );
561		state->m_timers.timer2->enable( timer2_enable );
562		state->m_timers.timer2_hi->enable( timer2_hi_enable );
563		state->m_timers.timer3->enable( timer3_enable );
564		state->m_timers.timer3_hi->enable( timer3_hi_enable );
	558	m_timers.timer1->enable( timer1_enable );
	559	m_timers.timer1_hi->enable( timer1_hi_enable );
	560	m_timers.timer2->enable( timer2_enable );
	561	m_timers.timer2_hi->enable( timer2_hi_enable );
	562	m_timers.timer3->enable( timer3_enable );
	563	m_timers.timer3_hi->enable( timer3_hi_enable );
565	564	}
566	565	break;
567	566	case 0x1A:   /* Timer 2 pre-scale + enable
r18257	r18258
579	578	Bit 7   R/W Enable high counting
580	579	*/
581	580	/* Check for prescaler change for the low counter */
582		if ( ( data & 0x07 ) != ( state->m_pm_reg[0x1A] & 0x07 ) )
	581	if ( ( data & 0x07 ) != ( m_pm_reg[0x1A] & 0x07 ) )
583	582	{
584	583	int index = data & 0x07;
585		int cycles = ( state->m_pm_reg[0x1B] & 0x01 ) ? timer_to_cycles_slow[index] : timer_to_cycles_fast[index];
	584	int cycles = ( m_pm_reg[0x1B] & 0x01 ) ? timer_to_cycles_slow[index] : timer_to_cycles_fast[index];
586	585
587		state->m_timers.timer2->adjust(attotime::zero, 0, space.machine().device<cpu_device>("maincpu")->cycles_to_attotime(cycles));
	586	m_timers.timer2->adjust(attotime::zero, 0, machine().device<cpu_device>("maincpu")->cycles_to_attotime(cycles));
588	587	}
589	588
590	589	/* Check for prescaler change for the high counter */
591		if ( ( data & 0x70 ) != ( state->m_pm_reg[0x1A] & 0x70 ) )
	590	if ( ( data & 0x70 ) != ( m_pm_reg[0x1A] & 0x70 ) )
592	591	{
593	592	int index = ( data >> 4 ) & 0x07;
594		int cycles = ( state->m_pm_reg[0x1B] & 0x02 ) ? timer_to_cycles_slow[index] : timer_to_cycles_fast[index];
	593	int cycles = ( m_pm_reg[0x1B] & 0x02 ) ? timer_to_cycles_slow[index] : timer_to_cycles_fast[index];
595	594
596		state->m_timers.timer2_hi->adjust(attotime::zero, 0, space.machine().device<cpu_device>("maincpu")->cycles_to_attotime(cycles));
	595	m_timers.timer2_hi->adjust(attotime::zero, 0, machine().device<cpu_device>("maincpu")->cycles_to_attotime(cycles));
597	596	}
598	597
599	598	/* Check if timer2 low should be enabled */
600		if ( ( data & 0x08 ) && ( state->m_pm_reg[0x38] & 0x04 ) &&
601		( ( ( state->m_pm_reg[0x19] & 0x10 ) && ( state->m_pm_reg[0x1B] & 0x01 ) ) ||
602		( ( state->m_pm_reg[0x19] & 0x20 ) && ! ( state->m_pm_reg[0x1B] & 0x01 ) ) ) )
	599	if ( ( data & 0x08 ) && ( m_pm_reg[0x38] & 0x04 ) &&
	600	( ( ( m_pm_reg[0x19] & 0x10 ) && ( m_pm_reg[0x1B] & 0x01 ) ) ||
	601	( ( m_pm_reg[0x19] & 0x20 ) && ! ( m_pm_reg[0x1B] & 0x01 ) ) ) )
603	602	{
604		state->m_timers.timer2->enable( 1 );
	603	m_timers.timer2->enable( 1 );
605	604	}
606	605	else
607	606	{
608		state->m_timers.timer2->enable( 0 );
	607	m_timers.timer2->enable( 0 );
609	608	}
610	609
611	610	/* Check if timer2 high should be enabled */
612		if ( ( data & 0x80 ) && ( state->m_pm_reg[0x39] & 0x04 ) && ! ( state->m_pm_reg[0x38] & 0x80 ) &&
613		( ( ( state->m_pm_reg[0x19] & 0x10 ) && ( state->m_pm_reg[0x1B] & 0x02 ) ) ||
614		( ( state->m_pm_reg[0x19] & 0x20 ) && ! ( state->m_pm_reg[0x1B] & 0x02 ) ) ) )
	611	if ( ( data & 0x80 ) && ( m_pm_reg[0x39] & 0x04 ) && ! ( m_pm_reg[0x38] & 0x80 ) &&
	612	( ( ( m_pm_reg[0x19] & 0x10 ) && ( m_pm_reg[0x1B] & 0x02 ) ) ||
	613	( ( m_pm_reg[0x19] & 0x20 ) && ! ( m_pm_reg[0x1B] & 0x02 ) ) ) )
615	614	{
616		state->m_timers.timer2_hi->enable( 1 );
	615	m_timers.timer2_hi->enable( 1 );
617	616	}
618	617	else
619	618	{
620		state->m_timers.timer2_hi->enable( 0 );
	619	m_timers.timer2_hi->enable( 0 );
621	620	}
622	621	break;
623	622	case 0x1B:   /* Timer 2 speeds
r18257	r18258
625	624	Bit 1   R/W Select slow timer for timer 2 hi
626	625	*/
627	626	/* Check for prescaler change for the high counter */
628		if ( ( data & 0x01 ) != ( state->m_pm_reg[0x1B] & 0x01 ) )
	627	if ( ( data & 0x01 ) != ( m_pm_reg[0x1B] & 0x01 ) )
629	628	{
630		int index = state->m_pm_reg[0x1A] & 0x07;
	629	int index = m_pm_reg[0x1A] & 0x07;
631	630	int cycles = ( data & 0x01 ) ? timer_to_cycles_slow[index] : timer_to_cycles_fast[index];
632	631
633		state->m_timers.timer2->adjust(attotime::zero, 0, space.machine().device<cpu_device>("maincpu")->cycles_to_attotime(cycles));
	632	m_timers.timer2->adjust(attotime::zero, 0, machine().device<cpu_device>("maincpu")->cycles_to_attotime(cycles));
634	633
635		if ( ( state->m_pm_reg[0x1A] & 0x08 ) && ( state->m_pm_reg[0x38] & 0x04 ) &&
636		( ( ( state->m_pm_reg[0x19] & 0x10 ) && ( data & 0x01 ) ) ||
637		( ( state->m_pm_reg[0x19] & 0x20 ) && ! ( data & 0x01 ) ) ) )
	634	if ( ( m_pm_reg[0x1A] & 0x08 ) && ( m_pm_reg[0x38] & 0x04 ) &&
	635	( ( ( m_pm_reg[0x19] & 0x10 ) && ( data & 0x01 ) ) ||
	636	( ( m_pm_reg[0x19] & 0x20 ) && ! ( data & 0x01 ) ) ) )
638	637	{
639		state->m_timers.timer2->enable( 1 );
	638	m_timers.timer2->enable( 1 );
640	639	}
641	640	else
642	641	{
643		state->m_timers.timer2->enable( 0 );
	642	m_timers.timer2->enable( 0 );
644	643	}
645	644	}
646	645
647	646	/* Check for prescaler change for the low counter */
648		if ( ( data & 0x02 ) != ( state->m_pm_reg[0x1B] & 0x02 ) )
	647	if ( ( data & 0x02 ) != ( m_pm_reg[0x1B] & 0x02 ) )
649	648	{
650		int index = ( state->m_pm_reg[0x1A] >> 4 ) & 0x07;
	649	int index = ( m_pm_reg[0x1A] >> 4 ) & 0x07;
651	650	int cycles = ( data & 0x02 ) ? timer_to_cycles_slow[index] : timer_to_cycles_fast[index];
652	651
653		state->m_timers.timer2_hi->adjust(attotime::zero, 0, space.machine().device<cpu_device>("maincpu")->cycles_to_attotime(cycles));
	652	m_timers.timer2_hi->adjust(attotime::zero, 0, machine().device<cpu_device>("maincpu")->cycles_to_attotime(cycles));
654	653
655		if ( ( state->m_pm_reg[0x1A] & 0x80 ) && ( state->m_pm_reg[0x39] & 0x04 ) && ! ( state->m_pm_reg[0x38] & 0x80 ) &&
656		( ( ( state->m_pm_reg[0x19] & 0x10 ) && ( data & 0x02 ) ) ||
657		( ( state->m_pm_reg[0x19] & 0x20 ) && ! ( data & 0x02 ) ) ) )
	654	if ( ( m_pm_reg[0x1A] & 0x80 ) && ( m_pm_reg[0x39] & 0x04 ) && ! ( m_pm_reg[0x38] & 0x80 ) &&
	655	( ( ( m_pm_reg[0x19] & 0x10 ) && ( data & 0x02 ) ) ||
	656	( ( m_pm_reg[0x19] & 0x20 ) && ! ( data & 0x02 ) ) ) )
658	657	{
659		state->m_timers.timer2_hi->enable( 1 );
	658	m_timers.timer2_hi->enable( 1 );
660	659	}
661	660	else
662	661	{
663		state->m_timers.timer2_hi->enable( 0 );
	662	m_timers.timer2_hi->enable( 0 );
664	663	}
665	664	}
666	665	break;
r18257	r18258
679	678	Bit 7   R/W Enable high counting
680	679	*/
681	680	/* Check for prescaler change for the low counter */
682		if ( ( data & 0x07 ) != ( state->m_pm_reg[0x1C] & 0x07 ) )
	681	if ( ( data & 0x07 ) != ( m_pm_reg[0x1C] & 0x07 ) )
683	682	{
684	683	int index = data & 0x07;
685		int cycles = ( state->m_pm_reg[0x1D] & 0x01 ) ? timer_to_cycles_slow[index] : timer_to_cycles_fast[index];
	684	int cycles = ( m_pm_reg[0x1D] & 0x01 ) ? timer_to_cycles_slow[index] : timer_to_cycles_fast[index];
686	685
687		state->m_timers.timer3->adjust(attotime::zero, 0, space.machine().device<cpu_device>("maincpu")->cycles_to_attotime(cycles));
	686	m_timers.timer3->adjust(attotime::zero, 0, machine().device<cpu_device>("maincpu")->cycles_to_attotime(cycles));
688	687	}
689	688
690	689	/* Check for prescaler change for the high counter */
691		if ( ( data & 0x70 ) != ( state->m_pm_reg[0x1C] & 0x70 ) )
	690	if ( ( data & 0x70 ) != ( m_pm_reg[0x1C] & 0x70 ) )
692	691	{
693	692	int index = ( data >> 4 ) & 0x07;
694		int cycles = ( state->m_pm_reg[0x1D] & 0x02 ) ? timer_to_cycles_slow[index] : timer_to_cycles_fast[index];
	693	int cycles = ( m_pm_reg[0x1D] & 0x02 ) ? timer_to_cycles_slow[index] : timer_to_cycles_fast[index];
695	694
696		state->m_timers.timer3_hi->adjust(attotime::zero, 0, space.machine().device<cpu_device>("maincpu")->cycles_to_attotime(cycles));
	695	m_timers.timer3_hi->adjust(attotime::zero, 0, machine().device<cpu_device>("maincpu")->cycles_to_attotime(cycles));
697	696	}
698	697
699	698	/* Check if timer2 low should be enabled */
700		if ( ( data & 0x08 ) && ( state->m_pm_reg[0x48] & 0x04 ) &&
701		( ( ( state->m_pm_reg[0x19] & 0x10 ) && ( state->m_pm_reg[0x1D] & 0x01 ) ) ||
702		( ( state->m_pm_reg[0x19] & 0x20 ) && ! ( state->m_pm_reg[0x1D] & 0x01 ) ) ) )
	699	if ( ( data & 0x08 ) && ( m_pm_reg[0x48] & 0x04 ) &&
	700	( ( ( m_pm_reg[0x19] & 0x10 ) && ( m_pm_reg[0x1D] & 0x01 ) ) ||
	701	( ( m_pm_reg[0x19] & 0x20 ) && ! ( m_pm_reg[0x1D] & 0x01 ) ) ) )
703	702	{
704		state->m_timers.timer3->enable( 1 );
	703	m_timers.timer3->enable( 1 );
705	704	}
706	705	else
707	706	{
708		state->m_timers.timer3->enable( 0 );
	707	m_timers.timer3->enable( 0 );
709	708	}
710	709
711	710	/* Check if timer2 high should be enabled */
712		if ( ( data & 0x80 ) && ( state->m_pm_reg[0x49] & 0x04 ) && ! ( state->m_pm_reg[0x48] & 0x80 ) &&
713		( ( ( state->m_pm_reg[0x19] & 0x10 ) && ( state->m_pm_reg[0x1D] & 0x02 ) ) ||
714		( ( state->m_pm_reg[0x19] & 0x20 ) && ! ( state->m_pm_reg[0x1D] & 0x02 ) ) ) )
	711	if ( ( data & 0x80 ) && ( m_pm_reg[0x49] & 0x04 ) && ! ( m_pm_reg[0x48] & 0x80 ) &&
	712	( ( ( m_pm_reg[0x19] & 0x10 ) && ( m_pm_reg[0x1D] & 0x02 ) ) ||
	713	( ( m_pm_reg[0x19] & 0x20 ) && ! ( m_pm_reg[0x1D] & 0x02 ) ) ) )
715	714	{
716		state->m_timers.timer3_hi->enable( 1 );
	715	m_timers.timer3_hi->enable( 1 );
717	716	}
718	717	else
719	718	{
720		state->m_timers.timer3_hi->enable( 0 );
	719	m_timers.timer3_hi->enable( 0 );
721	720	}
722	721	break;
723	722	case 0x1D:   /* Timer 3 speeds
r18257	r18258
725	724	Bit 1   R/W Select slow timer for timer 3 hi
726	725	*/
727	726	/* Check for prescaler change for the high counter */
728		if ( ( data & 0x01 ) != ( state->m_pm_reg[0x1D] & 0x01 ) )
	727	if ( ( data & 0x01 ) != ( m_pm_reg[0x1D] & 0x01 ) )
729	728	{
730		int index = state->m_pm_reg[0x1C] & 0x07;
	729	int index = m_pm_reg[0x1C] & 0x07;
731	730	int cycles = ( data & 0x01 ) ? timer_to_cycles_slow[index] : timer_to_cycles_fast[index];
732	731
733		state->m_timers.timer3->adjust(attotime::zero, 0, space.machine().device<cpu_device>("maincpu")->cycles_to_attotime(cycles));
	732	m_timers.timer3->adjust(attotime::zero, 0, machine().device<cpu_device>("maincpu")->cycles_to_attotime(cycles));
734	733
735		if ( ( state->m_pm_reg[0x1C] & 0x08 ) && ( state->m_pm_reg[0x48] & 0x04 ) &&
736		( ( ( state->m_pm_reg[0x19] & 0x10 ) && ( data & 0x01 ) ) ||
737		( ( state->m_pm_reg[0x19] & 0x20 ) && ! ( data & 0x01 ) ) ) )
	734	if ( ( m_pm_reg[0x1C] & 0x08 ) && ( m_pm_reg[0x48] & 0x04 ) &&
	735	( ( ( m_pm_reg[0x19] & 0x10 ) && ( data & 0x01 ) ) ||
	736	( ( m_pm_reg[0x19] & 0x20 ) && ! ( data & 0x01 ) ) ) )
738	737	{
739		state->m_timers.timer3->enable( 1 );
	738	m_timers.timer3->enable( 1 );
740	739	}
741	740	else
742	741	{
743		state->m_timers.timer3->enable( 0 );
	742	m_timers.timer3->enable( 0 );
744	743	}
745	744	}
746	745
747	746	/* Check for prescaler change for the low counter */
748		if ( ( data & 0x02 ) != ( state->m_pm_reg[0x1D] & 0x02 ) )
	747	if ( ( data & 0x02 ) != ( m_pm_reg[0x1D] & 0x02 ) )
749	748	{
750		int index = ( state->m_pm_reg[0x1C] >> 4 ) & 0x07;
	749	int index = ( m_pm_reg[0x1C] >> 4 ) & 0x07;
751	750	int cycles = ( data & 0x02 ) ? timer_to_cycles_slow[index] : timer_to_cycles_fast[index];
752	751
753		state->m_timers.timer3_hi->adjust(attotime::zero, 0, space.machine().device<cpu_device>("maincpu")->cycles_to_attotime(cycles));
	752	m_timers.timer3_hi->adjust(attotime::zero, 0, machine().device<cpu_device>("maincpu")->cycles_to_attotime(cycles));
754	753
755		if ( ( state->m_pm_reg[0x1C] & 0x80 ) && ( state->m_pm_reg[0x49] & 0x04 ) && ! ( state->m_pm_reg[0x48] & 0x80 ) &&
756		( ( ( state->m_pm_reg[0x19] & 0x10 ) && ( data & 0x02 ) ) ||
757		( ( state->m_pm_reg[0x19] & 0x20 ) && ! ( data & 0x02 ) ) ) )
	754	if ( ( m_pm_reg[0x1C] & 0x80 ) && ( m_pm_reg[0x49] & 0x04 ) && ! ( m_pm_reg[0x48] & 0x80 ) &&
	755	( ( ( m_pm_reg[0x19] & 0x10 ) && ( data & 0x02 ) ) ||
	756	( ( m_pm_reg[0x19] & 0x20 ) && ! ( data & 0x02 ) ) ) )
758	757	{
759		state->m_timers.timer3_hi->enable( 1 );
	758	m_timers.timer3_hi->enable( 1 );
760	759	}
761	760	else
762	761	{
763		state->m_timers.timer3_hi->enable( 0 );
	762	m_timers.timer3_hi->enable( 0 );
764	763	}
765	764	}
766	765	break;
r18257	r18258
770	769	Bit 4-5 R/W Timer 2 overflow Interrupt #3-#4
771	770	Bit 6-7 R/W VDraw/VBlank trigger Interrupt #1-#2
772	771	*/
773		state->m_pm_reg[0x20] = data;
774		pokemini_check_irqs(space.machine());
	772	m_pm_reg[0x20] = data;
	773	pokemini_check_irqs(machine());
775	774	break;
776	775	case 0x21:   /* Event #15-#22 priority
777	776	Bit 0-1 R/W Unknown
778	777	Bit 2-3 R/W All keypad interrupts - Interrupt #15-#22
779	778	Bit 4-7 R/W Unknown
780	779	*/
781		state->m_pm_reg[0x21] = data;
782		pokemini_check_irqs(space.machine());
	780	m_pm_reg[0x21] = data;
	781	pokemini_check_irqs(machine());
783	782	break;
784	783	case 0x22:   /* Event #9-#14 priority
785	784	Bit 0-1 R/W All #9 - #14 events - Interrupt #9-#14
786	785	Bit 2-7     Unused
787	786	*/
788		state->m_pm_reg[0x22] = data;
789		pokemini_check_irqs(space.machine());
	787	m_pm_reg[0x22] = data;
	788	pokemini_check_irqs(machine());
790	789	break;
791	790	case 0x23:   /* Event #1-#8 enable
792	791	Bit 0   R/W Timer 3 overflow (mirror) - Enable Interrupt #8
r18257	r18258
798	797	Bit 6   R/W V-Draw trigger - Enable Interrupt #2
799	798	Bit 7   R/W V-Blank trigger - Enable Interrupt #1
800	799	*/
801		state->m_pm_reg[0x23] = data;
802		pokemini_check_irqs(space.machine());
	800	m_pm_reg[0x23] = data;
	801	pokemini_check_irqs(machine());
803	802	break;
804	803	case 0x24:   /* Event #9-#12 enable
805	804	Bit 0-5 R/W Unknown
806	805	Bit 6-7     Unused
807	806	*/
808		state->m_pm_reg[0x24] = data;
809		pokemini_check_irqs(space.machine());
	807	m_pm_reg[0x24] = data;
	808	pokemini_check_irqs(machine());
810	809	break;
811	810	case 0x25:   /* Event #15-#22 enable
812	811	Bit 0   R/W Press key "A" event - Enable interrupt #22
r18257	r18258
818	817	Bit 6   R/W Press D-pad right key event - Enable interrupt #16
819	818	Bit 7   R/W Press power button event - Enable interrupt #15
820	819	*/
821		state->m_pm_reg[0x25] = data;
822		pokemini_check_irqs(space.machine());
	820	m_pm_reg[0x25] = data;
	821	pokemini_check_irqs(machine());
823	822	break;
824	823	case 0x26:   /* Event #13-#14 enable
825	824	Bit 0-2 R/W Unknown
r18257	r18258
828	827	Bit 6   R/W Shock detector trigger - Enable interrupt #14
829	828	Bit 7   R/W IR receiver - low to high trigger - Enable interrupt #13
830	829	*/
831		state->m_pm_reg[0x26] = data;
832		pokemini_check_irqs(space.machine());
	830	m_pm_reg[0x26] = data;
	831	pokemini_check_irqs(machine());
833	832	break;
834	833	case 0x27:   /* Interrupt active flag #1-#8
835	834	Bit 0       Timer 3 overflow (mirror) / Clear interrupt #8
r18257	r18258
841	840	Bit 6       VDraw trigger / Clear interrupt #2
842	841	Bit 7       VBlank trigger / Clear interrupt #1
843	842	*/
844		state->m_pm_reg[0x27] &= ~data;
845		pokemini_check_irqs(space.machine());
	843	m_pm_reg[0x27] &= ~data;
	844	pokemini_check_irqs(machine());
846	845	return;
847	846	case 0x28:   /* Interrupt active flag #9-#12
848	847	Bit 0-1     Unknown
r18257	r18258
852	851	Bit 5       Unknown / Clear interrupt #9
853	852	Bit 6-7     Unknown
854	853	*/
855		state->m_pm_reg[0x28] &= ~data;
856		pokemini_check_irqs(space.machine());
	854	m_pm_reg[0x28] &= ~data;
	855	pokemini_check_irqs(machine());
857	856	return;
858	857	case 0x29:   /* Interrupt active flag #15-#22
859	858	Bit 0       Press key "A" event / Clear interrupt #22
r18257	r18258
865	864	Bit 6       Press D-pad right key event / Clear interrupt #16
866	865	Bit 7       Press power button event / Clear interrupt #15
867	866	*/
868		state->m_pm_reg[0x29] &= ~data;
869		pokemini_check_irqs(space.machine());
	867	m_pm_reg[0x29] &= ~data;
	868	pokemini_check_irqs(machine());
870	869	return;
871	870	case 0x2A:   /* Interrupt active flag #13-#14
872	871	Bit 0-5     Unknown
873	872	Bit 6       Shock detector trigger / Clear interrupt #14
874	873	Bit 7       Unknown / Clear interrupt #13
875	874	*/
876		state->m_pm_reg[0x2A] &= ~data;
877		pokemini_check_irqs(space.machine());
	875	m_pm_reg[0x2A] &= ~data;
	876	pokemini_check_irqs(machine());
878	877	return;
879	878	case 0x30:   /* Timer 1 control 1
880	879	Bit 0   R/W Unknown
r18257	r18258
886	885	*/
887	886	if ( data & 0x02 )
888	887	{
889		state->m_pm_reg[0x36] = state->m_pm_reg[0x32];
	888	m_pm_reg[0x36] = m_pm_reg[0x32];
890	889	data &= ~0x02;
891	890	}
892	891
893		if ( ( data & 0x04 ) && ( state->m_pm_reg[0x18] & 0x08 ) &&
894		( ( ( state->m_pm_reg[0x19] & 0x20 ) && ! ( state->m_pm_reg[0x19] & 0x01 ) ) ||
895		( ( state->m_pm_reg[0x19] & 0x10 ) && ( state->m_pm_reg[0x19] & 0x01 ) ) ) )
	892	if ( ( data & 0x04 ) && ( m_pm_reg[0x18] & 0x08 ) &&
	893	( ( ( m_pm_reg[0x19] & 0x20 ) && ! ( m_pm_reg[0x19] & 0x01 ) ) ||
	894	( ( m_pm_reg[0x19] & 0x10 ) && ( m_pm_reg[0x19] & 0x01 ) ) ) )
896	895	{
897		state->m_timers.timer1->enable( 1 );
	896	m_timers.timer1->enable( 1 );
898	897	}
899	898	else
900	899	{
901		state->m_timers.timer1->enable( 0 );
	900	m_timers.timer1->enable( 0 );
902	901	}
903	902
904		if ( ( state->m_pm_reg[0x31] & 0x04 ) && ! ( data & 0x80 ) && ( state->m_pm_reg[0x18] & 0x80 ) &&
905		( ( ( state->m_pm_reg[0x19] & 0x20 ) && ! ( state->m_pm_reg[0x19] & 0x02 ) ) ||
906		( ( state->m_pm_reg[0x19] & 0x10 ) && ( state->m_pm_reg[0x19] & 0x02 ) ) ) )
	903	if ( ( m_pm_reg[0x31] & 0x04 ) && ! ( data & 0x80 ) && ( m_pm_reg[0x18] & 0x80 ) &&
	904	( ( ( m_pm_reg[0x19] & 0x20 ) && ! ( m_pm_reg[0x19] & 0x02 ) ) ||
	905	( ( m_pm_reg[0x19] & 0x10 ) && ( m_pm_reg[0x19] & 0x02 ) ) ) )
907	906	{
908		state->m_timers.timer1_hi->enable( 1 );
	907	m_timers.timer1_hi->enable( 1 );
909	908	}
910	909	else
911	910	{
912		state->m_timers.timer1_hi->enable( 0 );
	911	m_timers.timer1_hi->enable( 0 );
913	912	}
914	913	break;
915	914	case 0x31:   /* Timer 1 control 2
r18257	r18258
921	920	*/
922	921	if ( data & 0x02 )
923	922	{
924		state->m_pm_reg[0x37] = state->m_pm_reg[0x33];
	923	m_pm_reg[0x37] = m_pm_reg[0x33];
925	924	data &= ~0x02;
926	925	}
927	926
928		if ( ( data & 0x04 ) && ! ( state->m_pm_reg[0x30] & 0x80 ) && ( state->m_pm_reg[0x18] & 0x80 ) &&
929		( ( ( state->m_pm_reg[0x19] & 0x20 ) && ! ( state->m_pm_reg[0x19] & 0x02 ) ) ||
930		( ( state->m_pm_reg[0x19] & 0x10 ) && ( state->m_pm_reg[0x19] & 0x02 ) ) ) )
	927	if ( ( data & 0x04 ) && ! ( m_pm_reg[0x30] & 0x80 ) && ( m_pm_reg[0x18] & 0x80 ) &&
	928	( ( ( m_pm_reg[0x19] & 0x20 ) && ! ( m_pm_reg[0x19] & 0x02 ) ) ||
	929	( ( m_pm_reg[0x19] & 0x10 ) && ( m_pm_reg[0x19] & 0x02 ) ) ) )
931	930	{
932		state->m_timers.timer1_hi->enable( 1 );
	931	m_timers.timer1_hi->enable( 1 );
933	932	}
934	933	else
935	934	{
936		state->m_timers.timer1_hi->enable( 0 );
	935	m_timers.timer1_hi->enable( 0 );
937	936	}
938	937	break;
939	938	case 0x32:   /* Timer 1 preset value (low)
r18257	r18258
948	947	*/
949	948	case 0x35:   /* Timer 1 sound-pivot (high, unused)
950	949	*/
951		logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", space.machine().firstcpu->pc( ), offset, data );
	950	logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", machine().firstcpu->pc( ), offset, data );
952	951	break;
953	952	case 0x36:   /* Timer 1 counter (low), read only
954	953	*/
r18257	r18258
966	965	*/
967	966	if ( data & 0x02 )
968	967	{
969		state->m_pm_reg[0x3E] = state->m_pm_reg[0x3A];
	968	m_pm_reg[0x3E] = m_pm_reg[0x3A];
970	969	data &= ~0x02;
971	970	}
972	971
973		if ( ( data & 0x04 ) && ( state->m_pm_reg[0x1A] & 0x08 ) &&
974		( ( ( state->m_pm_reg[0x19] & 0x20 ) && ! ( state->m_pm_reg[0x1A] & 0x01 ) ) ||
975		( ( state->m_pm_reg[0x19] & 0x10 ) && ( state->m_pm_reg[0x1A] & 0x01 ) ) ) )
	972	if ( ( data & 0x04 ) && ( m_pm_reg[0x1A] & 0x08 ) &&
	973	( ( ( m_pm_reg[0x19] & 0x20 ) && ! ( m_pm_reg[0x1A] & 0x01 ) ) ||
	974	( ( m_pm_reg[0x19] & 0x10 ) && ( m_pm_reg[0x1A] & 0x01 ) ) ) )
976	975	{
977		state->m_timers.timer2->enable( 1 );
	976	m_timers.timer2->enable( 1 );
978	977	}
979	978	else
980	979	{
981		state->m_timers.timer2->enable( 0 );
	980	m_timers.timer2->enable( 0 );
982	981	}
983		if ( ( state->m_pm_reg[0x39] & 0x04 ) && ! ( data & 0x80 ) && ( state->m_pm_reg[0x1A] & 0x80 ) &&
984		( ( ( state->m_pm_reg[0x19] & 0x20 ) && ! ( state->m_pm_reg[0x1B] & 0x02 ) ) ||
985		( ( state->m_pm_reg[0x19] & 0x10 ) && ( state->m_pm_reg[0x1B] & 0x02 ) ) ) )
	982	if ( ( m_pm_reg[0x39] & 0x04 ) && ! ( data & 0x80 ) && ( m_pm_reg[0x1A] & 0x80 ) &&
	983	( ( ( m_pm_reg[0x19] & 0x20 ) && ! ( m_pm_reg[0x1B] & 0x02 ) ) ||
	984	( ( m_pm_reg[0x19] & 0x10 ) && ( m_pm_reg[0x1B] & 0x02 ) ) ) )
986	985	{
987		state->m_timers.timer2_hi->enable( 1 );
	986	m_timers.timer2_hi->enable( 1 );
988	987	}
989	988	else
990	989	{
991		state->m_timers.timer2_hi->enable( 0 );
	990	m_timers.timer2_hi->enable( 0 );
992	991	}
993	992	break;
994	993	case 0x39:   /* Timer 2 control 2
r18257	r18258
1000	999	*/
1001	1000	if ( data & 0x02 )
1002	1001	{
1003		state->m_pm_reg[0x3F] = state->m_pm_reg[0x3A];
	1002	m_pm_reg[0x3F] = m_pm_reg[0x3A];
1004	1003	data &= ~0x02;
1005	1004	}
1006	1005
1007		if ( ( data & 0x04 ) && ! ( state->m_pm_reg[0x38] & 0x80 ) && ( state->m_pm_reg[0x1A] & 0x80 ) &&
1008		( ( ( state->m_pm_reg[0x19] & 0x20 ) && ! ( state->m_pm_reg[0x1B] & 0x02 ) ) ||
1009		( ( state->m_pm_reg[0x19] & 0x10 ) && ( state->m_pm_reg[0x1B] & 0x02 ) ) ) )
	1006	if ( ( data & 0x04 ) && ! ( m_pm_reg[0x38] & 0x80 ) && ( m_pm_reg[0x1A] & 0x80 ) &&
	1007	( ( ( m_pm_reg[0x19] & 0x20 ) && ! ( m_pm_reg[0x1B] & 0x02 ) ) ||
	1008	( ( m_pm_reg[0x19] & 0x10 ) && ( m_pm_reg[0x1B] & 0x02 ) ) ) )
1010	1009	{
1011		state->m_timers.timer2_hi->enable( 1 );
	1010	m_timers.timer2_hi->enable( 1 );
1012	1011	}
1013	1012	else
1014	1013	{
1015		state->m_timers.timer2_hi->enable( 0 );
	1014	m_timers.timer2_hi->enable( 0 );
1016	1015	}
1017	1016	break;
1018	1017	case 0x3A:   /* Timer 2 preset value (low)
r18257	r18258
1027	1026	*/
1028	1027	case 0x3D:   /* Timer 2 sound-pivot (high, unused)
1029	1028	*/
1030		logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", space.machine().firstcpu->pc( ), offset, data );
	1029	logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", machine().firstcpu->pc( ), offset, data );
1031	1030	break;
1032	1031	case 0x3E:   /* Timer 2 counter (low), read only
1033	1032	Bit 0-7 R/W Timer 2 counter value bit 0-7
r18257	r18258
1044	1043	*/
1045	1044	if ( data & 0x02 )
1046	1045	{
1047		state->m_pm_reg[0x41] = 0;
	1046	m_pm_reg[0x41] = 0;
1048	1047	data &= ~0x02;
1049	1048	}
1050	1049	break;
r18257	r18258
1062	1061	*/
1063	1062	if ( data & 0x02 )
1064	1063	{
1065		state->m_pm_reg[0x4E] = state->m_pm_reg[0x4A];
	1064	m_pm_reg[0x4E] = m_pm_reg[0x4A];
1066	1065	data &= ~0x02;
1067	1066	}
1068	1067
1069		if ( ( data & 0x04 ) && ( state->m_pm_reg[0x1C] & 0x08 ) &&
1070		( ( ( state->m_pm_reg[0x19] & 0x20 ) && ! ( state->m_pm_reg[0x1D] & 0x01 ) ) ||
1071		( ( state->m_pm_reg[0x19] & 0x10 ) && ( state->m_pm_reg[0x1D] & 0x01 ) ) ) )
	1068	if ( ( data & 0x04 ) && ( m_pm_reg[0x1C] & 0x08 ) &&
	1069	( ( ( m_pm_reg[0x19] & 0x20 ) && ! ( m_pm_reg[0x1D] & 0x01 ) ) ||
	1070	( ( m_pm_reg[0x19] & 0x10 ) && ( m_pm_reg[0x1D] & 0x01 ) ) ) )
1072	1071	{
1073		state->m_timers.timer3->enable( 1 );
	1072	m_timers.timer3->enable( 1 );
1074	1073	}
1075	1074	else
1076	1075	{
1077		state->m_timers.timer3->enable( 0 );
	1076	m_timers.timer3->enable( 0 );
1078	1077	}
1079		if ( ( state->m_pm_reg[0x49] & 0x04 ) && ! ( data & 0x80 ) && ( state->m_pm_reg[0x1C] & 0x80 ) &&
1080		( ( ( state->m_pm_reg[0x19] & 0x20 ) && ! ( state->m_pm_reg[0x1D] & 0x02 ) ) ||
1081		( ( state->m_pm_reg[0x19] & 0x10 ) && ( state->m_pm_reg[0x1D] & 0x02 ) ) ) )
	1078	if ( ( m_pm_reg[0x49] & 0x04 ) && ! ( data & 0x80 ) && ( m_pm_reg[0x1C] & 0x80 ) &&
	1079	( ( ( m_pm_reg[0x19] & 0x20 ) && ! ( m_pm_reg[0x1D] & 0x02 ) ) ||
	1080	( ( m_pm_reg[0x19] & 0x10 ) && ( m_pm_reg[0x1D] & 0x02 ) ) ) )
1082	1081	{
1083		state->m_timers.timer3_hi->enable( 1 );
	1082	m_timers.timer3_hi->enable( 1 );
1084	1083	}
1085	1084	else
1086	1085	{
1087		state->m_timers.timer3_hi->enable( 0 );
	1086	m_timers.timer3_hi->enable( 0 );
1088	1087	}
1089		state->m_pm_reg[0x48] = data;
1090		pokemini_update_sound(space.machine());
	1088	m_pm_reg[0x48] = data;
	1089	pokemini_update_sound(machine());
1091	1090	break;
1092	1091	case 0x49:   /* Timer 3 control 2
1093	1092	Bit 0   R/W Unknown
r18257	r18258
1098	1097	*/
1099	1098	if ( data & 0x02 )
1100	1099	{
1101		state->m_pm_reg[0x4F] = state->m_pm_reg[0x4B];
	1100	m_pm_reg[0x4F] = m_pm_reg[0x4B];
1102	1101	data &= ~0x02;
1103	1102	}
1104	1103
1105		if ( ( data & 0x04 ) && ! ( state->m_pm_reg[0x48] & 0x80 ) && ( state->m_pm_reg[0x1C] & 0x80 ) &&
1106		( ( ( state->m_pm_reg[0x19] & 0x20 ) && ! ( state->m_pm_reg[0x1D] & 0x02 ) ) ||
1107		( ( state->m_pm_reg[0x19] & 0x10 ) && ( state->m_pm_reg[0x1D] & 0x02 ) ) ) )
	1104	if ( ( data & 0x04 ) && ! ( m_pm_reg[0x48] & 0x80 ) && ( m_pm_reg[0x1C] & 0x80 ) &&
	1105	( ( ( m_pm_reg[0x19] & 0x20 ) && ! ( m_pm_reg[0x1D] & 0x02 ) ) ||
	1106	( ( m_pm_reg[0x19] & 0x10 ) && ( m_pm_reg[0x1D] & 0x02 ) ) ) )
1108	1107	{
1109		state->m_timers.timer3_hi->enable( 1 );
	1108	m_timers.timer3_hi->enable( 1 );
1110	1109	}
1111	1110	else
1112	1111	{
1113		state->m_timers.timer3_hi->enable( 0 );
	1112	m_timers.timer3_hi->enable( 0 );
1114	1113	}
1115		state->m_pm_reg[0x49] = data;
1116		pokemini_update_sound(space.machine());
	1114	m_pm_reg[0x49] = data;
	1115	pokemini_update_sound(machine());
1117	1116	break;
1118	1117	case 0x4A:   /* Timer 3 preset value (low)
1119	1118	Bit 0-7 R/W Timer 3 preset value bit 0-7
1120	1119	*/
1121		state->m_pm_reg[0x4A] = data;
1122		pokemini_update_sound(space.machine());
	1120	m_pm_reg[0x4A] = data;
	1121	pokemini_update_sound(machine());
1123	1122	break;
1124	1123	case 0x4B:   /* Timer 3 preset value (high)
1125	1124	Bit 0-7 R/W Timer 3 preset value bit 8-15
1126	1125	*/
1127		state->m_pm_reg[0x4B] = data;
1128		pokemini_update_sound(space.machine());
	1126	m_pm_reg[0x4B] = data;
	1127	pokemini_update_sound(machine());
1129	1128	break;
1130	1129	case 0x4C:   /* Timer 3 sound-pivot (low)
1131	1130	Bit 0-7 R/W Timer 3 sound-pivot value bit 0-7
1132	1131	*/
1133		state->m_pm_reg[0x4C] = data;
1134		pokemini_update_sound(space.machine());
	1132	m_pm_reg[0x4C] = data;
	1133	pokemini_update_sound(machine());
1135	1134	break;
1136	1135	case 0x4D:   /* Timer 3 sound-pivot (high)
1137	1136	Bit 0-7 R/W Timer 3 sound-pivot value bit 8-15
r18257	r18258
1141	1140	Pulse-Width of 50% = Half of preset-value
1142	1141	Pulse-Width of 100% = Same as preset-value
1143	1142	*/
1144		state->m_pm_reg[0x4D] = data;
1145		pokemini_update_sound(space.machine());
	1143	m_pm_reg[0x4D] = data;
	1144	pokemini_update_sound(machine());
1146	1145	break;
1147	1146	case 0x4E:   /* Timer 3 counter (low), read only
1148	1147	Bit 0-7 R/W Timer 3 counter value bit 0-7
r18257	r18258
1184	1183	Bit 6       Always 1
1185	1184	Bit 7   R/W IR received bit (mirror, if device not selected: 0)
1186	1185	*/
1187		if ( state->m_pm_reg[0x60] & 0x04 )
1188		i2cmem_sda_write(device, ( data & 0x04 ) ? 1 : 0 );
	1186	if ( m_pm_reg[0x60] & 0x04 )
	1187	i2cmem_sda_write(machine().device("i2cmem"), ( data & 0x04 ) ? 1 : 0 );
1189	1188
1190		if ( state->m_pm_reg[0x60] & 0x08 )
1191		i2cmem_scl_write(device, ( data & 0x08 ) ? 1 : 0 );
	1189	if ( m_pm_reg[0x60] & 0x08 )
	1190	i2cmem_scl_write(machine().device("i2cmem"), ( data & 0x08 ) ? 1 : 0 );
1192	1191	break;
1193	1192	case 0x70:   /* Sound related */
1194		state->m_pm_reg[0x70] = data;
1195		pokemini_update_sound(space.machine());
	1193	m_pm_reg[0x70] = data;
	1194	pokemini_update_sound(machine());
1196	1195	break;
1197	1196	case 0x71:   /* Sound volume
1198	1197	Bit 0-1 R/W Sound volume
r18257	r18258
1203	1202	Bit 2   R/W Always set to 0
1204	1203	Bit 3-7     Unused
1205	1204	*/
1206		state->m_pm_reg[0x71] = data;
1207		pokemini_update_sound(space.machine());
	1205	m_pm_reg[0x71] = data;
	1206	pokemini_update_sound(machine());
1208	1207	break;
1209	1208	case 0x80:   /* LCD control
1210	1209	Bit 0   R/W Invert colors; 0 - normal, 1 - inverted
r18257	r18258
1218	1217	11 - 24x8 (prohibited code)
1219	1218	Bit 6-7      Unused
1220	1219	*/
1221		state->m_prc.colors_inverted = ( data & 0x01 ) ? 1 : 0;
1222		state->m_prc.background_enabled = ( data & 0x02 ) ? 1 : 0;
1223		state->m_prc.sprites_enabled = ( data & 0x04 ) ? 1 : 0;
1224		state->m_prc.copy_enabled = ( data & 0x08 ) ? 1 : 0;
1225		state->m_prc.map_size = ( data >> 4 ) & 0x03;
1226		switch( state->m_prc.map_size )
	1220	m_prc.colors_inverted = ( data & 0x01 ) ? 1 : 0;
	1221	m_prc.background_enabled = ( data & 0x02 ) ? 1 : 0;
	1222	m_prc.sprites_enabled = ( data & 0x04 ) ? 1 : 0;
	1223	m_prc.copy_enabled = ( data & 0x08 ) ? 1 : 0;
	1224	m_prc.map_size = ( data >> 4 ) & 0x03;
	1225	switch( m_prc.map_size )
1227	1226	{
1228	1227	case 0:
1229		state->m_prc.map_size_x = 12; break;
	1228	m_prc.map_size_x = 12; break;
1230	1229	case 1:
1231		state->m_prc.map_size_x = 16; break;
	1230	m_prc.map_size_x = 16; break;
1232	1231	case 2:
1233	1232	case 3:
1234		state->m_prc.map_size_x = 24; break;
	1233	m_prc.map_size_x = 24; break;
1235	1234	}
1236	1235	break;
1237	1236	case 0x81:   /* LCD render refresh rate
r18257	r18258
1249	1248	*/
1250	1249	switch ( data & 0x0E )
1251	1250	{
1252		case 0x00:   state->m_prc.max_frame_count = 3; break;
1253		case 0x02:   state->m_prc.max_frame_count = 6; break;
1254		case 0x04:   state->m_prc.max_frame_count = 9; break;
1255		case 0x06:   state->m_prc.max_frame_count = 12; break;
1256		case 0x08:   state->m_prc.max_frame_count = 2; break;
1257		case 0x0A:   state->m_prc.max_frame_count = 4; break;
1258		case 0x0C:   state->m_prc.max_frame_count = 6; break;
1259		case 0x0E:   state->m_prc.max_frame_count = 8; break;
	1251	case 0x00:   m_prc.max_frame_count = 3; break;
	1252	case 0x02:   m_prc.max_frame_count = 6; break;
	1253	case 0x04:   m_prc.max_frame_count = 9; break;
	1254	case 0x06:   m_prc.max_frame_count = 12; break;
	1255	case 0x08:   m_prc.max_frame_count = 2; break;
	1256	case 0x0A:   m_prc.max_frame_count = 4; break;
	1257	case 0x0C:   m_prc.max_frame_count = 6; break;
	1258	case 0x0E:   m_prc.max_frame_count = 8; break;
1260	1259	}
1261	1260	break;
1262	1261	case 0x82:   /* BG tile data memory offset (low)
r18257	r18258
1264	1263	Bit 3-7 R/W BG tile data memory offset bit 3-7
1265	1264	*/
1266	1265	data &= 0xF8;
1267		state->m_prc.bg_tiles = ( state->m_prc.bg_tiles & 0xFFFF00 ) | data;
	1266	m_prc.bg_tiles = ( m_prc.bg_tiles & 0xFFFF00 ) | data;
1268	1267	break;
1269	1268	case 0x83:   /* BG tile data memory offset (mid)
1270	1269	Bit 0-7 R/W BG tile data memory offset bit 8-15
1271	1270	*/
1272		state->m_prc.bg_tiles = ( state->m_prc.bg_tiles & 0xFF00FF ) | ( data << 8 );
	1271	m_prc.bg_tiles = ( m_prc.bg_tiles & 0xFF00FF ) | ( data << 8 );
1273	1272	break;
1274	1273	case 0x84:   /* BG tile data memory offset (high)
1275	1274	Bit 0-4 R/W BG tile data memory offset bit 16-20
1276	1275	Bit 5-7     Unused
1277	1276	*/
1278	1277	data &= 0x1F;
1279		state->m_prc.bg_tiles = ( state->m_prc.bg_tiles & 0x00FFFF ) | ( data << 16 );
	1278	m_prc.bg_tiles = ( m_prc.bg_tiles & 0x00FFFF ) | ( data << 16 );
1280	1279	break;
1281	1280	case 0x85:   /* BG vertical move
1282	1281	Bit 0-6 R/W Move the background up, move range:
r18257	r18258
1292	1291	Map size 2: 0x00 to 0x60
1293	1292	Bit 7       Unused
1294	1293	*/
1295		logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", space.machine().firstcpu->pc( ), offset, data );
	1294	logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", machine().firstcpu->pc( ), offset, data );
1296	1295	break;
1297	1296	case 0x87:   /* Sprite tile data memory offset (low)
1298	1297	Bit 0-5     Always "0"
1299	1298	Bit 6-7 R/W Sprite tile data memory offset bit 6-7
1300	1299	*/
1301	1300	data &= 0xC0;
1302		state->m_prc.spr_tiles = ( state->m_prc.spr_tiles & 0xFFFF00 ) | data;
	1301	m_prc.spr_tiles = ( m_prc.spr_tiles & 0xFFFF00 ) | data;
1303	1302	break;
1304	1303	case 0x88:   /* Sprite tile data memory offset (med)
1305	1304	Bit 0-7 R/W Sprite tile data memory offset bit 8-15
1306	1305	*/
1307		state->m_prc.spr_tiles = ( state->m_prc.spr_tiles & 0xFF00FF ) | ( data << 8 );
	1306	m_prc.spr_tiles = ( m_prc.spr_tiles & 0xFF00FF ) | ( data << 8 );
1308	1307	break;
1309	1308	case 0x89:   /* Sprite tile data memory offset (high)
1310	1309	Bit 0-4 R/W Sprite tile data memory offset bit 16-20
1311	1310	Bit 5-7     Unused
1312	1311	*/
1313	1312	data &= 0x1F;
1314		state->m_prc.spr_tiles = ( state->m_prc.spr_tiles & 0x00FFFF ) | ( data << 16 );
	1313	m_prc.spr_tiles = ( m_prc.spr_tiles & 0x00FFFF ) | ( data << 16 );
1315	1314	break;
1316	1315	case 0x8A:   /* LCD status
1317	1316	Bit 0   R   Unknown
r18257	r18258
1333	1332	//      lcd_data_w( data );
1334	1333	break;
1335	1334	default:
1336		logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", space.machine().firstcpu->pc( ), offset, data );
	1335	logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", machine().firstcpu->pc( ), offset, data );
1337	1336	break;
1338	1337	}
1339		state->m_pm_reg[offset] = data;
	1338	m_pm_reg[offset] = data;
1340	1339	}
1341	1340
1342		READ8_DEVICE_HANDLER( pokemini_hwreg_r )
	1341	READ8_MEMBER(pokemini_state::pokemini_hwreg_r)
1343	1342	{
1344		pokemini_state *state = space.machine().driver_data<pokemini_state>();
1345		UINT8 data = state->m_pm_reg[offset];
	1343	UINT8 data = m_pm_reg[offset];
1346	1344
1347	1345	switch( offset )
1348	1346	{
1349		case 0x52:   return state->ioport("INPUTS")->read();
	1347	case 0x52:   return ioport("INPUTS")->read();
1350	1348	case 0x61:
1351		if ( ! ( state->m_pm_reg[0x60] & 0x04 ) )
	1349	if ( ! ( m_pm_reg[0x60] & 0x04 ) )
1352	1350	{
1353		data = ( data & ~ 0x04 ) | ( i2cmem_sda_read( device) ? 0x04 : 0x00 );
	1351	data = ( data & ~ 0x04 ) | ( i2cmem_sda_read( machine().device("i2cmem")) ? 0x04 : 0x00 );
1354	1352	}
1355	1353
1356		if ( ! ( state->m_pm_reg[0x60] & 0x08 ) )
	1354	if ( ! ( m_pm_reg[0x60] & 0x08 ) )
1357	1355	{
1358	1356	data &= ~0x08;
1359	1357	}
1360	1358	break;
1361		case 0x81:   return ( state->m_pm_reg[offset] & 0x0F ) | ( state->m_prc.frame_count << 4 );
1362		case 0x8A:   return state->m_prc.count;
	1359	case 0x81:   return ( m_pm_reg[offset] & 0x0F ) | ( m_prc.frame_count << 4 );
	1360	case 0x8A:   return m_prc.count;
1363	1361	}
1364	1362	return data;
1365	1363	}

trunk/src/mess/machine/pk8020.c

r18257	r18258
846	846	}
847	847	}
848	848
849		static READ8_DEVICE_HANDLER(pk8020_porta_r)
	849	READ8_MEMBER(pk8020_state::pk8020_porta_r)
850	850	{
851		pk8020_state *state = space.machine().driver_data<pk8020_state>();
852		return 0xf0 | (state->m_takt <<1) | (state->m_text_attr)<<3;
	851	return 0xf0 | (m_takt <<1) | (m_text_attr)<<3;
853	852	}
854	853
855		static WRITE8_DEVICE_HANDLER(pk8020_portc_w)
	854	WRITE8_MEMBER(pk8020_state::pk8020_portc_w)
856	855	{
857		pk8020_state *state = space.machine().driver_data<pk8020_state>();
858		state->m_video_page_access =(data>>6) & 3;
859		state->m_attr = (data >> 4) & 3;
860		state->m_wide = (data >> 3) & 1;
861		state->m_font = (data >> 2) & 1;
862		state->m_video_page = (data & 3);
	856	m_video_page_access =(data>>6) & 3;
	857	m_attr = (data >> 4) & 3;
	858	m_wide = (data >> 3) & 1;
	859	m_font = (data >> 2) & 1;
	860	m_video_page = (data & 3);
863	861
864	862
865		state->m_portc_data = data;
	863	m_portc_data = data;
866	864	}
867	865
868		static WRITE8_DEVICE_HANDLER(pk8020_portb_w)
	866	WRITE8_MEMBER(pk8020_state::pk8020_portb_w)
869	867	{
870		device_t *fdc = space.machine().device("wd1793");
	868	device_t *fdc = machine().device("wd1793");
871	869	// Turn all motors off
872		floppy_mon_w(floppy_get_device(space.machine(), 0), 1);
873		floppy_mon_w(floppy_get_device(space.machine(), 1), 1);
874		floppy_mon_w(floppy_get_device(space.machine(), 2), 1);
875		floppy_mon_w(floppy_get_device(space.machine(), 3), 1);
	870	floppy_mon_w(floppy_get_device(machine(), 0), 1);
	871	floppy_mon_w(floppy_get_device(machine(), 1), 1);
	872	floppy_mon_w(floppy_get_device(machine(), 2), 1);
	873	floppy_mon_w(floppy_get_device(machine(), 3), 1);
876	874	wd17xx_set_side(fdc,BIT(data,4));
877	875	if (BIT(data,0)) {
878	876	wd17xx_set_drive(fdc,0);
879		floppy_mon_w(floppy_get_device(space.machine(), 0), 0);
880		floppy_drive_set_ready_state(floppy_get_device(space.machine(), 0), 1, 1);
	877	floppy_mon_w(floppy_get_device(machine(), 0), 0);
	878	floppy_drive_set_ready_state(floppy_get_device(machine(), 0), 1, 1);
881	879	} else if (BIT(data,1)) {
882	880	wd17xx_set_drive(fdc,1);
883		floppy_mon_w(floppy_get_device(space.machine(), 1), 0);
884		floppy_drive_set_ready_state(floppy_get_device(space.machine(), 1), 1, 1);
	881	floppy_mon_w(floppy_get_device(machine(), 1), 0);
	882	floppy_drive_set_ready_state(floppy_get_device(machine(), 1), 1, 1);
885	883	} else if (BIT(data,2)) {
886	884	wd17xx_set_drive(fdc,2);
887		floppy_mon_w(floppy_get_device(space.machine(), 2), 0);
888		floppy_drive_set_ready_state(floppy_get_device(space.machine(), 2), 1, 1);
	885	floppy_mon_w(floppy_get_device(machine(), 2), 0);
	886	floppy_drive_set_ready_state(floppy_get_device(machine(), 2), 1, 1);
889	887	} else if (BIT(data,3)) {
890	888	wd17xx_set_drive(fdc,3);
891		floppy_mon_w(floppy_get_device(space.machine(), 3), 0);
892		floppy_drive_set_ready_state(floppy_get_device(space.machine(), 3), 1, 1);
	889	floppy_mon_w(floppy_get_device(machine(), 3), 0);
	890	floppy_drive_set_ready_state(floppy_get_device(machine(), 3), 1, 1);
893	891	}
894	892	}
895	893
896		static READ8_DEVICE_HANDLER(pk8020_portc_r)
	894	READ8_MEMBER(pk8020_state::pk8020_portc_r)
897	895	{
898		pk8020_state *state = space.machine().driver_data<pk8020_state>();
899		return state->m_portc_data;
	896	return m_portc_data;
900	897	}
901	898
902	899
903	900	I8255A_INTERFACE( pk8020_ppi8255_interface_1 )
904	901	{
905		DEVCB_HANDLER(pk8020_porta_r),
	902	DEVCB_DRIVER_MEMBER(pk8020_state,pk8020_porta_r),
906	903	DEVCB_NULL,
907	904	DEVCB_NULL,
908		DEVCB_HANDLER(pk8020_portb_w),
909		DEVCB_HANDLER(pk8020_portc_r),
910		DEVCB_HANDLER(pk8020_portc_w)
	905	DEVCB_DRIVER_MEMBER(pk8020_state,pk8020_portb_w),
	906	DEVCB_DRIVER_MEMBER(pk8020_state,pk8020_portc_r),
	907	DEVCB_DRIVER_MEMBER(pk8020_state,pk8020_portc_w)
911	908	};
912	909
913		static WRITE8_DEVICE_HANDLER(pk8020_2_portc_w)
	910	WRITE8_MEMBER(pk8020_state::pk8020_2_portc_w)
914	911	{
915		pk8020_state *state = space.machine().driver_data<pk8020_state>();
916		device_t *speaker = space.machine().device(SPEAKER_TAG);
	912	device_t *speaker = machine().device(SPEAKER_TAG);
917	913
918		state->m_sound_gate = BIT(data,3);
	914	m_sound_gate = BIT(data,3);
919	915
920		speaker_level_w(speaker, state->m_sound_gate ? state->m_sound_level : 0);
	916	speaker_level_w(speaker, m_sound_gate ? m_sound_level : 0);
921	917	}
922	918
923	919	I8255A_INTERFACE( pk8020_ppi8255_interface_2 )
r18257	r18258
927	923	DEVCB_NULL,
928	924	DEVCB_NULL,
929	925	DEVCB_NULL,
930		DEVCB_HANDLER(pk8020_2_portc_w)
	926	DEVCB_DRIVER_MEMBER(pk8020_state,pk8020_2_portc_w)
931	927	};
932	928
933	929	I8255A_INTERFACE( pk8020_ppi8255_interface_3 )
r18257	r18258
940	936	DEVCB_NULL
941	937	};
942	938
943		static WRITE_LINE_DEVICE_HANDLER( pk8020_pit_out0 )
	939	WRITE_LINE_MEMBER(pk8020_state::pk8020_pit_out0)
944	940	{
945		pk8020_state *drvstate = device->machine().driver_data<pk8020_state>();
946		device_t *speaker = device->machine().device(SPEAKER_TAG);
	941	device_t *speaker = machine().device(SPEAKER_TAG);
947	942
948		drvstate->m_sound_level = state;
	943	m_sound_level = state;
949	944
950		speaker_level_w(speaker, drvstate->m_sound_gate ? drvstate->m_sound_level : 0);
	945	speaker_level_w(speaker, m_sound_gate ? m_sound_level : 0);
951	946	}
952	947
953	948
954		static WRITE_LINE_DEVICE_HANDLER(pk8020_pit_out1)
	949	WRITE_LINE_MEMBER(pk8020_state::pk8020_pit_out1)
955	950	{
956	951	}
957	952
r18257	r18258
962	957	{
963	958	XTAL_20MHz / 10,
964	959	DEVCB_NULL,
965		DEVCB_LINE(pk8020_pit_out0)
	960	DEVCB_DRIVER_LINE_MEMBER(pk8020_state,pk8020_pit_out0)
966	961	},
967	962	{
968	963	XTAL_20MHz / 10,
969	964	DEVCB_NULL,
970		DEVCB_LINE(pk8020_pit_out1)
	965	DEVCB_DRIVER_LINE_MEMBER(pk8020_state,pk8020_pit_out1)
971	966	},
972	967	{
973	968	(XTAL_20MHz / 8) / 164,
r18257	r18258
977	972	}
978	973	};
979	974
980		static WRITE_LINE_DEVICE_HANDLER( pk8020_pic_set_int_line )
	975	WRITE_LINE_MEMBER(pk8020_state::pk8020_pic_set_int_line)
981	976	{
982		device->machine().device("maincpu")->execute().set_input_line(0, state ? HOLD_LINE : CLEAR_LINE);
	977	machine().device("maincpu")->execute().set_input_line(0, state ? HOLD_LINE : CLEAR_LINE);
983	978	}
984	979
985	980	const struct pic8259_interface pk8020_pic8259_config =
986	981	{
987		DEVCB_LINE(pk8020_pic_set_int_line),
	982	DEVCB_DRIVER_LINE_MEMBER(pk8020_state,pk8020_pic_set_int_line),
988	983	DEVCB_LINE_VCC,
989	984	DEVCB_NULL
990	985	};

trunk/src/mess/machine/mtx.c

r18257	r18258
27	27	mtx_strobe_r - centronics strobe
28	28	-------------------------------------------------*/
29	29
30		READ8_DEVICE_HANDLER( mtx_strobe_r )
	30	READ8_MEMBER(mtx_state::mtx_strobe_r)
31	31	{
32		centronics_device *centronics = space.machine().device<centronics_device>(CENTRONICS_TAG);
	32	centronics_device *centronics = machine().device<centronics_device>(CENTRONICS_TAG);
33	33	/* set STROBE low */
34	34	centronics->strobe_w(FALSE);
35	35
r18257	r18258
117	117	READ8_MEMBER(mtx_state::mtx_sound_strobe_r)
118	118	{
119	119	m_sn->write(space, 0, m_sound_latch);
120
121	120	return 0xff;
122	121	}
123	122
r18257	r18258
134	133	mtx_cst_w - cassette write
135	134	-------------------------------------------------*/
136	135
137		WRITE8_DEVICE_HANDLER( mtx_cst_w )
	136	WRITE8_MEMBER(mtx_state::mtx_cst_w)
138	137	{
139		dynamic_cast<cassette_image_device *>(device)->output( BIT(data, 0) ? -1 : 1);
	138	dynamic_cast<cassette_image_device *>(machine().device(CASSETTE_TAG))->output( BIT(data, 0) ? -1 : 1);
140	139	}
141	140
142	141	/*-------------------------------------------------
143	142	mtx_prt_r - centronics status
144	143	-------------------------------------------------*/
145	144
146		READ8_DEVICE_HANDLER( mtx_prt_r )
	145	READ8_MEMBER(mtx_state::mtx_prt_r)
147	146	{
148		centronics_device *centronics = space.machine().device<centronics_device>(CENTRONICS_TAG);
	147	centronics_device *centronics = machine().device<centronics_device>(CENTRONICS_TAG);
149	148
150	149	/*
151	150

trunk/src/mess/machine/pp01.c

r18257	r18258
156	156	}
157	157
158	158
159		static WRITE_LINE_DEVICE_HANDLER( pp01_pit_out0 )
	159	WRITE_LINE_MEMBER(pp01_state::pp01_pit_out0)
160	160	{
161	161	}
162	162
163		static WRITE_LINE_DEVICE_HANDLER( pp01_pit_out1 )
	163	WRITE_LINE_MEMBER(pp01_state::pp01_pit_out1)
164	164	{
165	165	}
166	166
r18257	r18258
170	170	{
171	171	0,
172	172	DEVCB_NULL,
173		DEVCB_DEVICE_LINE("pit8253", pp01_pit_out0)
	173	DEVCB_DRIVER_LINE_MEMBER(pp01_state,pp01_pit_out0)
174	174	},
175	175	{
176	176	2000000,
177	177	DEVCB_NULL,
178		DEVCB_DEVICE_LINE("pit8253", pp01_pit_out1)
	178	DEVCB_DRIVER_LINE_MEMBER(pp01_state,pp01_pit_out1)
179	179	},
180	180	{
181	181	2000000,
r18257	r18258
185	185	}
186	186	};
187	187
188		static READ8_DEVICE_HANDLER (pp01_8255_porta_r )
	188	READ8_MEMBER(pp01_state::pp01_8255_porta_r)
189	189	{
190		pp01_state *state = space.machine().driver_data<pp01_state>();
191		return state->m_video_scroll;
	190	return m_video_scroll;
192	191	}
193		static WRITE8_DEVICE_HANDLER (pp01_8255_porta_w )
	192	WRITE8_MEMBER(pp01_state::pp01_8255_porta_w)
194	193	{
195		pp01_state *state = space.machine().driver_data<pp01_state>();
196		state->m_video_scroll = data;
	194	m_video_scroll = data;
197	195	}
198	196
199		static READ8_DEVICE_HANDLER (pp01_8255_portb_r )
	197	READ8_MEMBER(pp01_state::pp01_8255_portb_r)
200	198	{
201		pp01_state *state = space.machine().driver_data<pp01_state>();
202	199	static const char *const keynames[] = {
203	200	"LINE0", "LINE1", "LINE2", "LINE3", "LINE4", "LINE5", "LINE6", "LINE7",
204	201	"LINE8", "LINE9", "LINEA", "LINEB", "LINEC", "LINED", "LINEE", "LINEF"
205	202	};
206	203
207		return (space.machine().root_device().ioport(keynames[state->m_key_line])->read() & 0x3F) | (space.machine().root_device().ioport("LINEALL")->read() & 0xC0);
	204	return (machine().root_device().ioport(keynames[m_key_line])->read() & 0x3F) | (machine().root_device().ioport("LINEALL")->read() & 0xC0);
208	205	}
209		static WRITE8_DEVICE_HANDLER (pp01_8255_portb_w )
	206	WRITE8_MEMBER(pp01_state::pp01_8255_portb_w)
210	207	{
211	208	//logerror("pp01_8255_portb_w %02x\n",data);
212	209
213	210	}
214	211
215		static WRITE8_DEVICE_HANDLER (pp01_8255_portc_w )
	212	WRITE8_MEMBER(pp01_state::pp01_8255_portc_w)
216	213	{
217		pp01_state *state = space.machine().driver_data<pp01_state>();
218		state->m_key_line = data & 0x0f;
	214	m_key_line = data & 0x0f;
219	215	}
220	216
221		static READ8_DEVICE_HANDLER (pp01_8255_portc_r )
	217	READ8_MEMBER(pp01_state::pp01_8255_portc_r)
222	218	{
223	219	return 0xff;
224	220	}
r18257	r18258
227	223
228	224	I8255A_INTERFACE( pp01_ppi8255_interface )
229	225	{
230		DEVCB_DEVICE_HANDLER("ppi8255", pp01_8255_porta_r),
231		DEVCB_DEVICE_HANDLER("ppi8255", pp01_8255_porta_w),
232		DEVCB_DEVICE_HANDLER("ppi8255", pp01_8255_portb_r),
233		DEVCB_DEVICE_HANDLER("ppi8255", pp01_8255_portb_w),
234		DEVCB_DEVICE_HANDLER("ppi8255", pp01_8255_portc_r),
235		DEVCB_DEVICE_HANDLER("ppi8255", pp01_8255_portc_w)
	226	DEVCB_DRIVER_MEMBER(pp01_state,pp01_8255_porta_r),
	227	DEVCB_DRIVER_MEMBER(pp01_state,pp01_8255_porta_w),
	228	DEVCB_DRIVER_MEMBER(pp01_state,pp01_8255_portb_r),
	229	DEVCB_DRIVER_MEMBER(pp01_state,pp01_8255_portb_w),
	230	DEVCB_DRIVER_MEMBER(pp01_state,pp01_8255_portc_r),
	231	DEVCB_DRIVER_MEMBER(pp01_state,pp01_8255_portc_w)
236	232	};
237	233

trunk/src/mess/machine/apple3.c

r18257	r18258
467	467
468	468
469	469	/* these are here to appease the Apple /// confidence tests */
470		static READ8_DEVICE_HANDLER(apple3_via_1_in_a) { return ~0; }
471		static READ8_DEVICE_HANDLER(apple3_via_1_in_b) { return ~0; }
	470	READ8_MEMBER(apple3_state::apple3_via_1_in_a){ return ~0; }
	471	READ8_MEMBER(apple3_state::apple3_via_1_in_b){ return ~0; }
472	472
473		static WRITE8_DEVICE_HANDLER(apple3_via_0_out_a)
	473	WRITE8_MEMBER(apple3_state::apple3_via_0_out_a)
474	474	{
475		apple3_state *state = space.machine().driver_data<apple3_state>();
476		apple3_via_out(space.machine(), &state->m_via_0_a, data);
	475	apple3_via_out(machine(), &m_via_0_a, data);
477	476	}
478	477
479		static WRITE8_DEVICE_HANDLER(apple3_via_0_out_b)
	478	WRITE8_MEMBER(apple3_state::apple3_via_0_out_b)
480	479	{
481		apple3_state *state = space.machine().driver_data<apple3_state>();
482		apple3_via_out(space.machine(), &state->m_via_0_b, data);
	480	apple3_via_out(machine(), &m_via_0_b, data);
483	481	}
484	482
485		static WRITE8_DEVICE_HANDLER(apple3_via_1_out_a)
	483	WRITE8_MEMBER(apple3_state::apple3_via_1_out_a)
486	484	{
487		apple3_state *state = space.machine().driver_data<apple3_state>();
488		apple3_via_out(space.machine(), &state->m_via_1_a, data);
	485	apple3_via_out(machine(), &m_via_1_a, data);
489	486	}
490	487
491		static WRITE8_DEVICE_HANDLER(apple3_via_1_out_b)
	488	WRITE8_MEMBER(apple3_state::apple3_via_1_out_b)
492	489	{
493		apple3_state *state = space.machine().driver_data<apple3_state>();
494		apple3_via_out(space.machine(), &state->m_via_1_b, data);
	490	apple3_via_out(machine(), &m_via_1_b, data);
495	491	}
496	492
497	493	static void apple2_via_1_irq_func(device_t *device, int state)
r18257	r18258
513	509	DEVCB_NULL,               /* in_cb1_func */
514	510	DEVCB_NULL,               /* in_ca2_func */
515	511	DEVCB_NULL,               /* in_cb2_func */
516		DEVCB_HANDLER(apple3_via_0_out_a),      /* out_a_func */
517		DEVCB_HANDLER(apple3_via_0_out_b),      /* out_b_func */
	512	DEVCB_DRIVER_MEMBER(apple3_state,apple3_via_0_out_a),      /* out_a_func */
	513	DEVCB_DRIVER_MEMBER(apple3_state,apple3_via_0_out_b),      /* out_b_func */
518	514	DEVCB_NULL,               /* out_ca1_func */
519	515	DEVCB_NULL,               /* out_cb1_func */
520	516	DEVCB_NULL,               /* out_ca2_func */
r18257	r18258
524	520
525	521	const via6522_interface apple3_via_1_intf =
526	522	{
527		DEVCB_HANDLER(apple3_via_1_in_a),      /* in_a_func */
528		DEVCB_HANDLER(apple3_via_1_in_b),      /* in_b_func */
	523	DEVCB_DRIVER_MEMBER(apple3_state,apple3_via_1_in_a),      /* in_a_func */
	524	DEVCB_DRIVER_MEMBER(apple3_state,apple3_via_1_in_b),      /* in_b_func */
529	525	DEVCB_NULL,               /* in_ca1_func */
530	526	DEVCB_NULL,               /* in_cb1_func */
531	527	DEVCB_NULL,               /* in_ca2_func */
532	528	DEVCB_NULL,               /* in_cb2_func */
533		DEVCB_HANDLER(apple3_via_1_out_a),      /* out_a_func */
534		DEVCB_HANDLER(apple3_via_1_out_b),      /* out_b_func */
	529	DEVCB_DRIVER_MEMBER(apple3_state,apple3_via_1_out_a),      /* out_a_func */
	530	DEVCB_DRIVER_MEMBER(apple3_state,apple3_via_1_out_b),      /* out_b_func */
535	531	DEVCB_NULL,               /* out_ca1_func */
536	532	DEVCB_NULL,               /* out_cb1_func */
537	533	DEVCB_NULL,               /* out_ca2_func */

trunk/src/mess/machine/kramermc.c

r18257	r18258
12	12	#include "includes/kramermc.h"
13	13
14	14
15		static READ8_DEVICE_HANDLER (kramermc_port_a_r)
	15	READ8_MEMBER(kramermc_state::kramermc_port_a_r)
16	16	{
17	17	return 0xff;
18	18	}
19	19
20		static READ8_DEVICE_HANDLER (kramermc_port_b_r)
	20	READ8_MEMBER(kramermc_state::kramermc_port_b_r)
21	21	{
22		kramermc_state *state = space.machine().driver_data<kramermc_state>();
23	22	static const char *const keynames[] = { "LINE0", "LINE1", "LINE2", "LINE3", "LINE4", "LINE5", "LINE6", "LINE7" };
24	23
25		return space.machine().root_device().ioport(keynames[state->m_key_row])->read();
	24	return machine().root_device().ioport(keynames[m_key_row])->read();
26	25	}
27	26
28		static WRITE8_DEVICE_HANDLER (kramermc_port_a_w)
	27	WRITE8_MEMBER(kramermc_state::kramermc_port_a_w)
29	28	{
30		kramermc_state *state = space.machine().driver_data<kramermc_state>();
31		state->m_key_row = ((data >> 1) & 0x07);
	29	m_key_row = ((data >> 1) & 0x07);
32	30	}
33	31
34	32	Z80PIO_INTERFACE( kramermc_z80pio_intf )
35	33	{
36	34	DEVCB_NULL,   /* callback when change interrupt status */
37		DEVCB_HANDLER(kramermc_port_a_r),
38		DEVCB_HANDLER(kramermc_port_a_w),
	35	DEVCB_DRIVER_MEMBER(kramermc_state,kramermc_port_a_r),
	36	DEVCB_DRIVER_MEMBER(kramermc_state,kramermc_port_a_w),
39	37	DEVCB_NULL,
40		DEVCB_HANDLER(kramermc_port_b_r),
	38	DEVCB_DRIVER_MEMBER(kramermc_state,kramermc_port_b_r),
41	39	DEVCB_NULL,
42	40	DEVCB_NULL
43	41	};

trunk/src/mess/includes/mz700.h

r18257	r18258
83	83	UINT32 screen_update_mz800(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
84	84	TIMER_DEVICE_CALLBACK_MEMBER(ne556_cursor_callback);
85	85	TIMER_DEVICE_CALLBACK_MEMBER(ne556_other_callback);
	86	DECLARE_WRITE_LINE_MEMBER(pit_out0_changed);
	87	DECLARE_WRITE_LINE_MEMBER(pit_irq_2);
	88	DECLARE_READ8_MEMBER(pio_port_b_r);
	89	DECLARE_READ8_MEMBER(pio_port_c_r);
	90	DECLARE_WRITE8_MEMBER(pio_port_a_w);
	91	DECLARE_WRITE8_MEMBER(pio_port_c_w);
	92	DECLARE_READ8_MEMBER(mz800_z80pio_port_a_r);
	93	DECLARE_WRITE8_MEMBER(mz800_z80pio_port_a_w);
86	94	};
87	95
88	96

trunk/src/mess/includes/bullet.h

r18257	r18258
94	94	int m_exrdy1;
95	95	int m_exrdy2;
96	96	TIMER_DEVICE_CALLBACK_MEMBER(ctc_tick);
	97	DECLARE_WRITE_LINE_MEMBER(dart_rxtxca_w);
97	98	};
98	99
99	100	class bulletf_state : public bullet_state

trunk/src/mess/includes/x1.h

r18257	r18258
205	205	TIMER_CALLBACK_MEMBER(x1_rtc_increment);
206	206	TIMER_DEVICE_CALLBACK_MEMBER(x1_cmt_wind_timer);
207	207	TIMER_DEVICE_CALLBACK_MEMBER(x1_keyboard_callback);
	208	DECLARE_WRITE_LINE_MEMBER(fdc_drq_w);
208	209	};
209	210
210	211	/*----------- defined in machine/x1.c -----------*/

trunk/src/mess/includes/pmd85.h

r18257	r18258
43	43	TIMER_CALLBACK_MEMBER(pmd85_cassette_timer_callback);
44	44	TIMER_CALLBACK_MEMBER(pmd_reset);
45	45	TIMER_CALLBACK_MEMBER(setup_machine_state);
	46	DECLARE_READ8_MEMBER(pmd85_ppi_0_porta_r);
	47	DECLARE_READ8_MEMBER(pmd85_ppi_0_portb_r);
	48	DECLARE_READ8_MEMBER(pmd85_ppi_0_portc_r);
	49	DECLARE_WRITE8_MEMBER(pmd85_ppi_0_porta_w);
	50	DECLARE_WRITE8_MEMBER(pmd85_ppi_0_portb_w);
	51	DECLARE_WRITE8_MEMBER(pmd85_ppi_0_portc_w);
	52	DECLARE_READ8_MEMBER(mato_ppi_0_portb_r);
	53	DECLARE_READ8_MEMBER(mato_ppi_0_portc_r);
	54	DECLARE_WRITE8_MEMBER(mato_ppi_0_portc_w);
	55	DECLARE_READ8_MEMBER(pmd85_ppi_1_porta_r);
	56	DECLARE_READ8_MEMBER(pmd85_ppi_1_portb_r);
	57	DECLARE_READ8_MEMBER(pmd85_ppi_1_portc_r);
	58	DECLARE_WRITE8_MEMBER(pmd85_ppi_1_porta_w);
	59	DECLARE_WRITE8_MEMBER(pmd85_ppi_1_portb_w);
	60	DECLARE_WRITE8_MEMBER(pmd85_ppi_1_portc_w);
	61	DECLARE_READ8_MEMBER(pmd85_ppi_2_porta_r);
	62	DECLARE_READ8_MEMBER(pmd85_ppi_2_portb_r);
	63	DECLARE_READ8_MEMBER(pmd85_ppi_2_portc_r);
	64	DECLARE_WRITE8_MEMBER(pmd85_ppi_2_porta_w);
	65	DECLARE_WRITE8_MEMBER(pmd85_ppi_2_portb_w);
	66	DECLARE_WRITE8_MEMBER(pmd85_ppi_2_portc_w);
	67	DECLARE_READ8_MEMBER(pmd85_ppi_3_porta_r);
	68	DECLARE_READ8_MEMBER(pmd85_ppi_3_portb_r);
	69	DECLARE_READ8_MEMBER(pmd85_ppi_3_portc_r);
	70	DECLARE_WRITE8_MEMBER(pmd85_ppi_3_porta_w);
	71	DECLARE_WRITE8_MEMBER(pmd85_ppi_3_portb_w);
	72	DECLARE_WRITE8_MEMBER(pmd85_ppi_3_portc_w);
46	73	};
47	74
48	75

trunk/src/mess/includes/portfoli.h

r18257	r18258
88	88	TIMER_DEVICE_CALLBACK_MEMBER(keyboard_tick);
89	89	TIMER_DEVICE_CALLBACK_MEMBER(system_tick);
90	90	TIMER_DEVICE_CALLBACK_MEMBER(counter_tick);
	91	DECLARE_READ8_MEMBER(hd61830_rd_r);
91	92	};
92	93
93	94	#endif

trunk/src/mess/includes/poly88.h

r18257	r18258
39	39	TIMER_CALLBACK_MEMBER(keyboard_callback);
40	40	TIMER_CALLBACK_MEMBER(poly88_cassette_timer_callback);
41	41	TIMER_CALLBACK_MEMBER(setup_machine_state);
	42	DECLARE_WRITE_LINE_MEMBER(poly88_usart_rxready);
42	43	};
43	44
44	45

trunk/src/mess/includes/mtx.h

r18257	r18258
52	52	/* timers */
53	53	device_t *m_cassette_timer;
54	54
55		DECLARE_READ8_MEMBER(mtx_sound_strobe_r);
56	55	DECLARE_WRITE8_MEMBER(mtx_bankswitch_w);
57	56	DECLARE_WRITE8_MEMBER(mtx_sound_latch_w);
58	57	DECLARE_WRITE8_MEMBER(mtx_sense_w);
r18257	r18258
67	66	DECLARE_MACHINE_RESET(mtx512);
68	67	TIMER_DEVICE_CALLBACK_MEMBER(ctc_tick);
69	68	TIMER_DEVICE_CALLBACK_MEMBER(cassette_tick);
	69	DECLARE_WRITE_LINE_MEMBER(ctc_trg1_w);
	70	DECLARE_WRITE_LINE_MEMBER(ctc_trg2_w);
	71	DECLARE_WRITE_LINE_MEMBER(mtx_tms9929a_interrupt);
	72	DECLARE_READ8_MEMBER(mtx_strobe_r);
	73	DECLARE_READ8_MEMBER(mtx_sound_strobe_r);
	74	DECLARE_WRITE8_MEMBER(mtx_cst_w);
	75	DECLARE_READ8_MEMBER(mtx_prt_r);
70	76	};
71	77
72	78	/*----------- defined in machine/mtx.c -----------*/
73	79
74	80	SNAPSHOT_LOAD( mtx );
75	81
76		/* Cassette */
77		DECLARE_WRITE8_DEVICE_HANDLER( mtx_cst_w );
78
79		/* Printer */
80		DECLARE_READ8_DEVICE_HANDLER( mtx_strobe_r );
81		DECLARE_READ8_DEVICE_HANDLER( mtx_prt_r );
82
83
84	82	#endif /* __MTX_H__ */

trunk/src/mess/includes/apple2.h

r18257	r18258
243	243	DECLARE_MACHINE_START(space84);
244	244	UINT32 screen_update_apple2(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
245	245	TIMER_DEVICE_CALLBACK_MEMBER(apple2_interrupt);
	246	DECLARE_WRITE8_MEMBER(a2bus_irq_w);
	247	DECLARE_WRITE8_MEMBER(a2bus_nmi_w);
	248	DECLARE_WRITE8_MEMBER(a2bus_inh_w);
246	249	};
247	250
248	251

trunk/src/mess/includes/super6.h

r18257	r18258
78	78	UINT8 m_bank0;
79	79	UINT8 m_bank1;
80	80	TIMER_DEVICE_CALLBACK_MEMBER(ctc_tick);
	81	DECLARE_WRITE8_MEMBER(dummy_w);
81	82	};
82	83
83	84	#endif

trunk/src/mess/includes/concept.h

r18257	r18258
69	69	DECLARE_READ8_MEMBER(concept_hdc_reg_r);
70	70	DECLARE_WRITE8_MEMBER(concept_hdc_reg_w);
71	71	DECLARE_READ8_MEMBER(concept_hdc_rom_r);
	72	DECLARE_READ8_MEMBER(via_in_a);
	73	DECLARE_WRITE8_MEMBER(via_out_a);
	74	DECLARE_READ8_MEMBER(via_in_b);
	75	DECLARE_WRITE8_MEMBER(via_out_b);
	76	DECLARE_WRITE8_MEMBER(via_out_cb2);
	77	DECLARE_WRITE_LINE_MEMBER(concept_fdc_intrq_w);
	78	DECLARE_WRITE_LINE_MEMBER(concept_fdc_drq_w);
72	79	};
73	80
74	81

trunk/src/mess/includes/svi318.h

r18257	r18258
75	75	DECLARE_MACHINE_RESET(svi328_806);
76	76	DECLARE_VIDEO_START(svi328_806);
77	77	DECLARE_MACHINE_START(svi318_ntsc);
	78	DECLARE_WRITE_LINE_MEMBER(vdp_interrupt);
	79	DECLARE_WRITE_LINE_MEMBER(svi318_ins8250_interrupt);
	80	DECLARE_READ8_MEMBER(svi318_ppi_port_a_r);
	81	DECLARE_READ8_MEMBER(svi318_ppi_port_b_r);
	82	DECLARE_WRITE8_MEMBER(svi318_ppi_port_c_w);
	83	DECLARE_WRITE_LINE_MEMBER(svi_fdc_intrq_w);
	84	DECLARE_WRITE_LINE_MEMBER(svi_fdc_drq_w);
78	85	};
79	86
80	87

trunk/src/mess/includes/sms.h

r18257	r18258
190	190	TIMER_CALLBACK_MEMBER(lightgun_tick);
191	191	TIMER_CALLBACK_MEMBER(lphaser_1_callback);
192	192	TIMER_CALLBACK_MEMBER(lphaser_2_callback);
	193	DECLARE_WRITE_LINE_MEMBER(sms_int_callback);
	194	DECLARE_WRITE_LINE_MEMBER(sms_pause_callback);
	195	DECLARE_WRITE_LINE_MEMBER(sms_store_int_callback);
193	196	};
194	197
195	198
196	199	/*----------- defined in machine/sms.c -----------*/
197	200
198		/* Function prototypes */
199
200		WRITE_LINE_DEVICE_HANDLER( sms_pause_callback );
201		WRITE_LINE_DEVICE_HANDLER( sms_store_int_callback );
202
203	201	DEVICE_START( sms_cart );
204	202	DEVICE_IMAGE_LOAD( sms_cart );
205	203

trunk/src/mess/includes/adam.h

r18257	r18258
127	127	int m_wr1;
128	128	int m_track;
129	129	TIMER_DEVICE_CALLBACK_MEMBER(paddle_tick);
	130	DECLARE_WRITE_LINE_MEMBER(adam_vdp_interrupt);
130	131	};
131	132
132	133	#endif

trunk/src/mess/includes/mc80.h

r18257	r18258
45	45	UINT32 screen_update_mc8020(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
46	46	UINT32 screen_update_mc8030(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
47	47	TIMER_DEVICE_CALLBACK_MEMBER(mc8020_kbd);
	48	DECLARE_WRITE_LINE_MEMBER(ctc_z2_w);
48	49	};
49	50
50	51

trunk/src/mess/includes/v1050.h

r18257	r18258
162	162	TIMER_DEVICE_CALLBACK_MEMBER(sasi_rst_tick);
163	163	TIMER_DEVICE_CALLBACK_MEMBER(kb_8251_tick);
164	164	TIMER_DEVICE_CALLBACK_MEMBER(sio_8251_tick);
	165	DECLARE_WRITE_LINE_MEMBER(pic_int_w);
	166	DECLARE_WRITE8_MEMBER(disp_ppi_pc_w);
	167	DECLARE_WRITE8_MEMBER(m6502_ppi_pc_w);
	168	DECLARE_WRITE8_MEMBER(misc_ppi_pb_w);
	169	DECLARE_READ8_MEMBER(misc_ppi_pc_r);
165	170	};
166	171
167	172	//----------- defined in video/v1050.c -----------

trunk/src/mess/includes/bw12.h

r18257	r18258
90	90	int m_motor0;
91	91	int m_motor1;
92	92	TIMER_DEVICE_CALLBACK_MEMBER(floppy_motor_off_tick);
	93	DECLARE_WRITE_LINE_MEMBER(pit_out0_w);
93	94	};
94	95
95	96	#endif

trunk/src/mess/includes/microtan.h

r18257	r18258
55	55	INTERRUPT_GEN_MEMBER(microtan_interrupt);
56	56	TIMER_CALLBACK_MEMBER(microtan_read_cassette);
57	57	TIMER_CALLBACK_MEMBER(microtan_pulse_nmi);
	58	DECLARE_READ8_MEMBER(via_0_in_a);
	59	DECLARE_READ8_MEMBER(via_0_in_b);
	60	DECLARE_READ8_MEMBER(via_0_in_ca1);
	61	DECLARE_READ8_MEMBER(via_0_in_cb1);
	62	DECLARE_READ8_MEMBER(via_0_in_ca2);
	63	DECLARE_READ8_MEMBER(via_0_in_cb2);
	64	DECLARE_WRITE8_MEMBER(via_0_out_a);
	65	DECLARE_WRITE8_MEMBER(via_0_out_b);
	66	DECLARE_WRITE8_MEMBER(via_0_out_ca2);
	67	DECLARE_WRITE8_MEMBER(via_0_out_cb2);
	68	DECLARE_READ8_MEMBER(via_1_in_a);
	69	DECLARE_READ8_MEMBER(via_1_in_b);
	70	DECLARE_READ8_MEMBER(via_1_in_ca1);
	71	DECLARE_READ8_MEMBER(via_1_in_cb1);
	72	DECLARE_READ8_MEMBER(via_1_in_ca2);
	73	DECLARE_READ8_MEMBER(via_1_in_cb2);
	74	DECLARE_WRITE8_MEMBER(via_1_out_a);
	75	DECLARE_WRITE8_MEMBER(via_1_out_b);
	76	DECLARE_WRITE8_MEMBER(via_1_out_ca2);
	77	DECLARE_WRITE8_MEMBER(via_1_out_cb2);
58	78	};
59	79
60	80

trunk/src/mess/includes/radio86.h

r18257	r18258
40	40	DECLARE_PALETTE_INIT(radio86);
41	41	UINT32 screen_update_radio86(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
42	42	TIMER_CALLBACK_MEMBER(radio86_reset);
	43	DECLARE_READ8_MEMBER(radio86_8255_portb_r2);
	44	DECLARE_READ8_MEMBER(radio86_8255_portc_r2);
	45	DECLARE_WRITE8_MEMBER(radio86_8255_porta_w2);
	46	DECLARE_WRITE8_MEMBER(radio86_8255_portc_w2);
	47	DECLARE_READ8_MEMBER(rk7007_8255_portc_r);
	48	DECLARE_WRITE_LINE_MEMBER(hrq_w);
	49	DECLARE_READ8_MEMBER(radio86_romdisk_porta_r);
	50	DECLARE_WRITE8_MEMBER(radio86_romdisk_portb_w);
	51	DECLARE_WRITE8_MEMBER(radio86_romdisk_portc_w);
	52	DECLARE_WRITE8_MEMBER(mikrosha_8255_font_page_w);
43	53	};
44	54
45	55

trunk/src/mess/includes/einstein.h

r18257	r18258
85	85	UINT32 screen_update_einstein2(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
86	86	TIMER_DEVICE_CALLBACK_MEMBER(einstein_keyboard_timer_callback);
87	87	TIMER_DEVICE_CALLBACK_MEMBER(einstein_ctc_trigger_callback);
	88	DECLARE_WRITE_LINE_MEMBER(einstein_6845_de_changed);
	89	DECLARE_WRITE8_MEMBER(einstein_drsel_w);
	90	DECLARE_WRITE_LINE_MEMBER(einstein_serial_transmit_clock);
	91	DECLARE_WRITE_LINE_MEMBER(einstein_serial_receive_clock);
88	92	};
89	93
90	94

trunk/src/mess/includes/pk8020.h

r18257	r18258
46	46	virtual void palette_init();
47	47	UINT32 screen_update_pk8020(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
48	48	INTERRUPT_GEN_MEMBER(pk8020_interrupt);
	49	DECLARE_READ8_MEMBER(pk8020_porta_r);
	50	DECLARE_WRITE8_MEMBER(pk8020_portc_w);
	51	DECLARE_WRITE8_MEMBER(pk8020_portb_w);
	52	DECLARE_READ8_MEMBER(pk8020_portc_r);
	53	DECLARE_WRITE8_MEMBER(pk8020_2_portc_w);
	54	DECLARE_WRITE_LINE_MEMBER(pk8020_pit_out0);
	55	DECLARE_WRITE_LINE_MEMBER(pk8020_pit_out1);
	56	DECLARE_WRITE_LINE_MEMBER(pk8020_pic_set_int_line);
49	57	};
50	58
51	59

trunk/src/mess/includes/orion.h

r18257	r18258
64	64	DECLARE_MACHINE_RESET(orionpro);
65	65	UINT32 screen_update_orion128(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
66	66	INTERRUPT_GEN_MEMBER(orionz80_interrupt);
	67	DECLARE_READ8_MEMBER(orion_romdisk_porta_r);
	68	DECLARE_WRITE8_MEMBER(orion_romdisk_portb_w);
	69	DECLARE_WRITE8_MEMBER(orion_romdisk_portc_w);
67	70	};
68	71
69	72	/*----------- defined in machine/orion.c -----------*/

trunk/src/mess/includes/ssystem3.h

r18257	r18258
48	48	virtual void video_start();
49	49	virtual void palette_init();
50	50	UINT32 screen_update_ssystem3(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	51	DECLARE_WRITE8_MEMBER(ssystem3_via_write_a);
	52	DECLARE_READ8_MEMBER(ssystem3_via_read_a);
	53	DECLARE_READ8_MEMBER(ssystem3_via_read_b);
	54	DECLARE_WRITE8_MEMBER(ssystem3_via_write_b);
51	55	};
52	56
53	57

trunk/src/mess/includes/rmnimbus.h

r18257	r18258
232	232	TIMER_CALLBACK_MEMBER(dma_timer_callback);
233	233	TIMER_CALLBACK_MEMBER(keyscan_callback);
234	234	TIMER_CALLBACK_MEMBER(mouse_callback);
	235	DECLARE_WRITE_LINE_MEMBER(sio_interrupt);
	236	DECLARE_WRITE8_MEMBER(sio_dtr_w);
	237	DECLARE_WRITE16_MEMBER(sio_serial_transmit);
	238	DECLARE_READ16_MEMBER(sio_serial_receive);
	239	DECLARE_WRITE_LINE_MEMBER(nimbus_fdc_intrq_w);
	240	DECLARE_WRITE_LINE_MEMBER(nimbus_fdc_drq_w);
	241	DECLARE_READ8_MEMBER(nimbus_via_read_portb);
	242	DECLARE_WRITE8_MEMBER(nimbus_via_write_portb);
	243	DECLARE_WRITE_LINE_MEMBER(nimbus_via_irq_w);
	244	DECLARE_WRITE_LINE_MEMBER(nimbus_ack_w);
235	245	};
236	246
237	247
r18257	r18258
435	445
436	446	extern const via6522_interface nimbus_via;
437	447
438		WRITE_LINE_DEVICE_HANDLER(nimbus_ack_w);
439	448
440
441	449	/*----------- defined in video/rmnimbus.c -----------*/
442	450
443	451

trunk/src/mess/includes/bebox.h

r18257	r18258
42	42	virtual void machine_start();
43	43	virtual void machine_reset();
44	44	TIMER_CALLBACK_MEMBER(bebox_get_devices);
	45	DECLARE_WRITE_LINE_MEMBER(bebox_pic8259_master_set_int_line);
	46	DECLARE_WRITE_LINE_MEMBER(bebox_pic8259_slave_set_int_line);
	47	DECLARE_READ8_MEMBER(get_slave_ack);
	48	DECLARE_WRITE_LINE_MEMBER(bebox_dma_hrq_changed);
	49	DECLARE_READ8_MEMBER(bebox_dma8237_fdc_dack_r);
	50	DECLARE_WRITE8_MEMBER(bebox_dma8237_fdc_dack_w);
	51	DECLARE_WRITE_LINE_MEMBER(bebox_dma8237_out_eop);
	52	DECLARE_WRITE_LINE_MEMBER(pc_dack0_w);
	53	DECLARE_WRITE_LINE_MEMBER(pc_dack1_w);
	54	DECLARE_WRITE_LINE_MEMBER(pc_dack2_w);
	55	DECLARE_WRITE_LINE_MEMBER(pc_dack3_w);
	56	DECLARE_WRITE_LINE_MEMBER(bebox_timer0_w);
45	57	};
46	58
47	59

trunk/src/mess/includes/a7800.h

r18257	r18258
67	67	DECLARE_PALETTE_INIT(a7800p);
68	68	UINT32 screen_update_a7800(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
69	69	TIMER_DEVICE_CALLBACK_MEMBER(a7800_interrupt);
	70	DECLARE_READ8_MEMBER(riot_joystick_r);
	71	DECLARE_READ8_MEMBER(riot_console_button_r);
	72	DECLARE_WRITE8_MEMBER(riot_button_pullup_w);
70	73	};
71	74
72	75	/*----------- defined in machine/a7800.c -----------*/

trunk/src/mess/includes/super80.h

r18257	r18258
89	89	TIMER_CALLBACK_MEMBER(super80_timer);
90	90	TIMER_CALLBACK_MEMBER(super80_reset);
91	91	TIMER_CALLBACK_MEMBER(super80_halfspeed);
	92	DECLARE_READ8_MEMBER(pio_port_b_r);
92	93	};
93	94
94	95

trunk/src/mess/includes/pce.h

r18257	r18258
149	149	TIMER_CALLBACK_MEMBER(pce_cd_adpcm_fadein_callback);
150	150	TIMER_CALLBACK_MEMBER(pce_cd_clear_ack);
151	151	TIMER_CALLBACK_MEMBER(pce_cd_adpcm_dma_timer_callback);
	152	DECLARE_WRITE_LINE_MEMBER(pce_irq_changed);
152	153	};
153	154
154	155

trunk/src/mess/includes/samcoupe.h

r18257	r18258
86	86	TIMER_CALLBACK_MEMBER(irq_off);
87	87	TIMER_CALLBACK_MEMBER(samcoupe_mouse_reset);
88	88	TIMER_CALLBACK_MEMBER(sam_video_update_callback);
	89	DECLARE_READ8_MEMBER(samcoupe_lpt1_busy_r);
	90	DECLARE_WRITE8_MEMBER(samcoupe_lpt1_strobe_w);
	91	DECLARE_READ8_MEMBER(samcoupe_lpt2_busy_r);
	92	DECLARE_WRITE8_MEMBER(samcoupe_lpt2_strobe_w);
	93	DECLARE_READ8_MEMBER(samcoupe_rtc_r);
	94	DECLARE_WRITE8_MEMBER(samcoupe_rtc_w);
89	95	};
90	96
91	97

trunk/src/mess/includes/ql.h

r18257	r18258
133	133	int      m_disk_io_base;
134	134	UINT8   m_disk_io_byte;
135	135	UINT8   m_printer_char;
	136	DECLARE_READ_LINE_MEMBER(disk_io_dden_r);
	137	DECLARE_WRITE_LINE_MEMBER(disk_io_intrq_w);
	138	DECLARE_WRITE_LINE_MEMBER(disk_io_drq_w);
136	139	};
137	140
138	141	#endif

trunk/src/mess/includes/c64_legacy.h

r18257	r18258
91	91	DECLARE_DRIVER_INIT( c64gs );
92	92	DECLARE_DRIVER_INIT( sx64 );
93	93	INTERRUPT_GEN_MEMBER(c64_frame_interrupt);
	94	DECLARE_READ8_MEMBER(c64_cia0_port_a_r);
	95	DECLARE_READ8_MEMBER(c64_cia0_port_b_r);
	96	DECLARE_WRITE8_MEMBER(c64_cia0_port_b_w);
	97	DECLARE_READ8_MEMBER(c64_cia1_port_a_r);
	98	DECLARE_WRITE8_MEMBER(c64_cia1_port_a_w);
94	99	};
95	100
96	101
r18257	r18258
98	103
99	104	/* private area */
100	105
101		extern DECLARE_READ8_DEVICE_HANDLER(c64_m6510_port_read);
102		extern DECLARE_WRITE8_DEVICE_HANDLER(c64_m6510_port_write);
103
104	106	DECLARE_READ8_HANDLER ( c64_colorram_read );
105	107	DECLARE_WRITE8_HANDLER ( c64_colorram_write );
106	108

trunk/src/mess/includes/apple3.h

r18257	r18258
61	61	DECLARE_VIDEO_START(apple3);
62	62	UINT32 screen_update_apple3(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
63	63	INTERRUPT_GEN_MEMBER(apple3_interrupt);
	64	DECLARE_READ8_MEMBER(apple3_via_1_in_a);
	65	DECLARE_READ8_MEMBER(apple3_via_1_in_b);
	66	DECLARE_WRITE8_MEMBER(apple3_via_0_out_a);
	67	DECLARE_WRITE8_MEMBER(apple3_via_0_out_b);
	68	DECLARE_WRITE8_MEMBER(apple3_via_1_out_a);
	69	DECLARE_WRITE8_MEMBER(apple3_via_1_out_b);
64	70	};
65	71
66	72

trunk/src/mess/includes/bbc.h

r18257	r18258
286	286	INTERRUPT_GEN_MEMBER(bbcb_keyscan);
287	287	INTERRUPT_GEN_MEMBER(bbcm_keyscan);
288	288	TIMER_CALLBACK_MEMBER(bbc_tape_timer_cb);
	289	DECLARE_WRITE_LINE_MEMBER(bbcb_ack_w);
	290	DECLARE_WRITE_LINE_MEMBER(bbcb_acia6850_irq_w);
	291	DECLARE_WRITE_LINE_MEMBER(econet_clk_w);
	292	DECLARE_WRITE8_MEMBER(bbcb_via_system_write_porta);
	293	DECLARE_WRITE8_MEMBER(bbcb_via_system_write_portb);
	294	DECLARE_READ8_MEMBER(bbcb_via_system_read_porta);
	295	DECLARE_READ8_MEMBER(bbcb_via_system_read_portb);
	296	DECLARE_READ8_MEMBER(bbcb_via_system_read_ca1);
	297	DECLARE_READ8_MEMBER(bbcb_via_system_read_cb1);
	298	DECLARE_READ8_MEMBER(bbcb_via_system_read_ca2);
	299	DECLARE_READ8_MEMBER(bbcb_via_system_read_cb2);
	300	DECLARE_WRITE_LINE_MEMBER(bbcb_via_system_irq_w);
	301	DECLARE_READ8_MEMBER(bbcb_via_user_read_portb);
	302	DECLARE_WRITE8_MEMBER(bbcb_via_user_write_portb);
	303	DECLARE_WRITE_LINE_MEMBER(bbcb_via_user_irq_w);
	304	DECLARE_WRITE_LINE_MEMBER(bbc_wd177x_intrq_w);
	305	DECLARE_WRITE_LINE_MEMBER(bbc_wd177x_drq_w);
	306	DECLARE_WRITE_LINE_MEMBER(bbc_vsync);
289	307	};
290	308
291	309

trunk/src/mess/includes/lisa.h

r18257	r18258
168	168	TIMER_CALLBACK_MEMBER(handle_mouse);
169	169	TIMER_CALLBACK_MEMBER(read_COPS_command);
170	170	TIMER_CALLBACK_MEMBER(set_COPS_ready);
	171	DECLARE_WRITE8_MEMBER(COPS_via_out_a);
	172	DECLARE_WRITE8_MEMBER(COPS_via_out_ca2);
	173	DECLARE_READ8_MEMBER(COPS_via_in_b);
	174	DECLARE_WRITE8_MEMBER(COPS_via_out_b);
	175	DECLARE_WRITE8_MEMBER(COPS_via_out_cb2);
	176	DECLARE_READ8_MEMBER(parallel_via_in_b);
171	177	};
172	178
173	179

trunk/src/mess/includes/fm7.h

r18257	r18258
246	246	TIMER_CALLBACK_MEMBER(fm7_keyboard_poll);
247	247	TIMER_CALLBACK_MEMBER(fm77av_alu_task_end);
248	248	TIMER_CALLBACK_MEMBER(fm77av_vsync);
	249	DECLARE_WRITE_LINE_MEMBER(fm7_fdc_intrq_w);
	250	DECLARE_WRITE_LINE_MEMBER(fm7_fdc_drq_w);
	251	DECLARE_READ8_MEMBER(fm77av_joy_1_r);
	252	DECLARE_READ8_MEMBER(fm77av_joy_2_r);
249	253	};
250	254
251	255	#endif /*FM7_H_*/

trunk/src/mess/includes/sym1.h

r18257	r18258
42	42	DECLARE_DRIVER_INIT(sym1);
43	43	virtual void machine_reset();
44	44	TIMER_CALLBACK_MEMBER(led_refresh);
	45	DECLARE_WRITE_LINE_MEMBER(sym1_74145_output_0_w);
	46	DECLARE_WRITE_LINE_MEMBER(sym1_74145_output_1_w);
	47	DECLARE_WRITE_LINE_MEMBER(sym1_74145_output_2_w);
	48	DECLARE_WRITE_LINE_MEMBER(sym1_74145_output_3_w);
	49	DECLARE_WRITE_LINE_MEMBER(sym1_74145_output_4_w);
	50	DECLARE_WRITE_LINE_MEMBER(sym1_74145_output_5_w);
	51	DECLARE_READ8_MEMBER(sym1_riot_a_r);
	52	DECLARE_READ8_MEMBER(sym1_riot_b_r);
	53	DECLARE_WRITE8_MEMBER(sym1_riot_a_w);
	54	DECLARE_WRITE8_MEMBER(sym1_riot_b_w);
	55	DECLARE_READ8_MEMBER(sym1_via0_b_r);
	56	DECLARE_WRITE8_MEMBER(sym1_via0_b_w);
	57	DECLARE_WRITE8_MEMBER(sym1_via2_a_w);
45	58	};
46	59
47	60	/*----------- defined in machine/sym1.c -----------*/

trunk/src/mess/includes/macpci.h

r18257	r18258
159	159	emu_timer *m_scanline_timer;
160	160	UINT32 screen_update_pippin(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
161	161	TIMER_CALLBACK_MEMBER(mac_6015_tick);
	162	DECLARE_READ8_MEMBER(mac_via_in_a);
	163	DECLARE_READ8_MEMBER(mac_via_in_b);
	164	DECLARE_WRITE8_MEMBER(mac_via_out_a);
	165	DECLARE_WRITE8_MEMBER(mac_via_out_b);
	166	DECLARE_READ8_MEMBER(mac_adb_via_in_cb2);
	167	DECLARE_WRITE8_MEMBER(mac_adb_via_out_cb2);
162	168	};
163	169
164	170	#endif /* PCIMAC_H_ */

trunk/src/mess/includes/xerox820.h

r18257	r18258
85	85	TIMER_CALLBACK_MEMBER(bigboard_beepoff);
86	86	TIMER_DEVICE_CALLBACK_MEMBER(xerox820_keyboard_tick);
87	87	TIMER_DEVICE_CALLBACK_MEMBER(ctc_tick);
	88	DECLARE_WRITE_LINE_MEMBER(ctc_z0_w);
	89	DECLARE_WRITE_LINE_MEMBER(ctc_z2_w);
88	90	};
89	91
90	92	class xerox820ii_state : public xerox820_state

trunk/src/mess/includes/x68k.h

r18257	r18258
285	285	TIMER_CALLBACK_MEMBER(x68k_crtc_raster_end);
286	286	TIMER_CALLBACK_MEMBER(x68k_crtc_raster_irq);
287	287	TIMER_CALLBACK_MEMBER(x68k_crtc_vblank_irq);
	288	DECLARE_READ8_MEMBER(ppi_port_a_r);
	289	DECLARE_READ8_MEMBER(ppi_port_b_r);
	290	DECLARE_READ8_MEMBER(ppi_port_c_r);
	291	DECLARE_WRITE8_MEMBER(ppi_port_c_w);
	292	DECLARE_WRITE_LINE_MEMBER(fdc_irq);
	293	DECLARE_WRITE_LINE_MEMBER(fdc_drq);
	294	DECLARE_WRITE8_MEMBER(x68k_ct_w);
	295	DECLARE_WRITE_LINE_MEMBER(x68k_rtc_alarm_irq);
	296	DECLARE_WRITE8_MEMBER(x68030_adpcm_w);
	297	DECLARE_WRITE_LINE_MEMBER(mfp_irq_callback);
	298	DECLARE_WRITE_LINE_MEMBER(x68k_scsi_irq);
	299	DECLARE_WRITE_LINE_MEMBER(x68k_scsi_drq);
288	300	};
289	301
290	302

trunk/src/mess/includes/partner.h

r18257	r18258
26	26	DECLARE_DRIVER_INIT(partner);
27	27	DECLARE_MACHINE_START(partner);
28	28	DECLARE_MACHINE_RESET(partner);
	29	DECLARE_WRITE_LINE_MEMBER(partner_wd17xx_drq_w);
	30	DECLARE_WRITE_LINE_MEMBER(hrq_w);
29	31	};
30	32
31	33

trunk/src/mess/includes/trs80.h

r18257	r18258
125	125	INTERRUPT_GEN_MEMBER(trs80_rtc_interrupt);
126	126	INTERRUPT_GEN_MEMBER(trs80_fdc_interrupt);
127	127	TIMER_CALLBACK_MEMBER(cassette_data_callback);
	128	DECLARE_WRITE_LINE_MEMBER(trs80_fdc_intrq_w);
128	129	};
129	130
130	131

trunk/src/mess/includes/lviv.h

r18257	r18258
28	28	virtual void palette_init();
29	29	UINT32 screen_update_lviv(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
30	30	TIMER_CALLBACK_MEMBER(lviv_reset);
	31	DECLARE_READ8_MEMBER(lviv_ppi_0_porta_r);
	32	DECLARE_READ8_MEMBER(lviv_ppi_0_portb_r);
	33	DECLARE_READ8_MEMBER(lviv_ppi_0_portc_r);
	34	DECLARE_WRITE8_MEMBER(lviv_ppi_0_porta_w);
	35	DECLARE_WRITE8_MEMBER(lviv_ppi_0_portb_w);
	36	DECLARE_WRITE8_MEMBER(lviv_ppi_0_portc_w);
	37	DECLARE_READ8_MEMBER(lviv_ppi_1_porta_r);
	38	DECLARE_READ8_MEMBER(lviv_ppi_1_portb_r);
	39	DECLARE_READ8_MEMBER(lviv_ppi_1_portc_r);
	40	DECLARE_WRITE8_MEMBER(lviv_ppi_1_porta_w);
	41	DECLARE_WRITE8_MEMBER(lviv_ppi_1_portb_w);
	42	DECLARE_WRITE8_MEMBER(lviv_ppi_1_portc_w);
31	43	};
32	44
33	45

trunk/src/mess/includes/xor100.h

r18257	r18258
66	66	int m_fdc_irq;
67	67	int m_fdc_drq;
68	68	int m_fdc_dden;
	69	DECLARE_WRITE_LINE_MEMBER(com5016_fr_w);
	70	DECLARE_WRITE_LINE_MEMBER(com5016_ft_w);
	71	DECLARE_READ8_MEMBER(i8255_pc_r);
	72	DECLARE_WRITE_LINE_MEMBER(ctc_z0_w);
	73	DECLARE_WRITE_LINE_MEMBER(ctc_z1_w);
	74	DECLARE_WRITE_LINE_MEMBER(ctc_z2_w);
	75	DECLARE_WRITE8_MEMBER(xor100_kbd_put);
69	76	};
70	77
71	78	#endif

trunk/src/mess/includes/oric.h

r18257	r18258
110	110	UINT32 screen_update_oric(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
111	111	TIMER_CALLBACK_MEMBER(oric_refresh_tape);
112	112	TIMER_CALLBACK_MEMBER(oric_vh_timer_callback);
	113	DECLARE_READ8_MEMBER(oric_via_in_a_func);
	114	DECLARE_READ8_MEMBER(oric_via_in_b_func);
	115	DECLARE_WRITE8_MEMBER(oric_via_out_a_func);
	116	DECLARE_WRITE8_MEMBER(oric_via_out_b_func);
	117	DECLARE_READ8_MEMBER(oric_via_in_ca2_func);
	118	DECLARE_READ8_MEMBER(oric_via_in_cb2_func);
	119	DECLARE_WRITE8_MEMBER(oric_via_out_ca2_func);
	120	DECLARE_WRITE8_MEMBER(oric_via_out_cb2_func);
	121	DECLARE_WRITE_LINE_MEMBER(oric_jasmin_wd179x_drq_w);
	122	DECLARE_WRITE_LINE_MEMBER(oric_microdisc_wd179x_intrq_w);
	123	DECLARE_WRITE_LINE_MEMBER(oric_microdisc_wd179x_drq_w);
	124	DECLARE_WRITE_LINE_MEMBER(oric_wd179x_intrq_w);
	125	DECLARE_WRITE_LINE_MEMBER(oric_wd179x_drq_w);
	126	DECLARE_READ8_MEMBER(telestrat_via2_in_a_func);
	127	DECLARE_WRITE8_MEMBER(telestrat_via2_out_a_func);
	128	DECLARE_READ8_MEMBER(telestrat_via2_in_b_func);
	129	DECLARE_WRITE8_MEMBER(telestrat_via2_out_b_func);
113	130	};
114	131
115	132	/*----------- defined in machine/oric.c -----------*/

trunk/src/mess/includes/fmtowns.h

r18257	r18258
281	281	TIMER_CALLBACK_MEMBER(towns_delay_cdda);
282	282	TIMER_CALLBACK_MEMBER(towns_sprite_done);
283	283	TIMER_CALLBACK_MEMBER(towns_vblank_end);
	284	DECLARE_WRITE_LINE_MEMBER(towns_scsi_irq);
	285	DECLARE_WRITE_LINE_MEMBER(towns_scsi_drq);
	286	DECLARE_WRITE_LINE_MEMBER(towns_pic_irq);
	287	DECLARE_WRITE_LINE_MEMBER(towns_pit_out0_changed);
	288	DECLARE_WRITE_LINE_MEMBER(towns_pit_out1_changed);
	289	DECLARE_READ8_MEMBER(get_slave_ack);
284	290	};
285	291
286	292	class marty_state : public towns_state

trunk/src/mess/includes/c65.h

r18257	r18258
67	67	UINT32 screen_update_c65(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
68	68	INTERRUPT_GEN_MEMBER(vic3_raster_irq);
69	69	INTERRUPT_GEN_MEMBER(c65_frame_interrupt);
	70	DECLARE_READ8_MEMBER(c65_cia0_port_a_r);
	71	DECLARE_READ8_MEMBER(c65_cia0_port_b_r);
	72	DECLARE_WRITE8_MEMBER(c65_cia0_port_b_w);
	73	DECLARE_READ8_MEMBER(c65_cia1_port_a_r);
	74	DECLARE_WRITE8_MEMBER(c65_cia1_port_a_w);
	75	DECLARE_WRITE_LINE_MEMBER(c65_cia1_interrupt);
70	76	};
71	77
72	78

trunk/src/mess/includes/mac.h

r18257	r18258
28	28	// model helpers
29	29	#define ADB_IS_BITBANG   ((mac->m_model == MODEL_MAC_SE || mac->m_model == MODEL_MAC_CLASSIC) || (mac->m_model >= MODEL_MAC_II && mac->m_model <= MODEL_MAC_IICI) || (mac->m_model == MODEL_MAC_SE30) || (mac->m_model == MODEL_MAC_QUADRA_700))
30	30	#define ADB_IS_BITBANG_CLASS   ((m_model == MODEL_MAC_SE || m_model == MODEL_MAC_CLASSIC) || (m_model >= MODEL_MAC_II && m_model <= MODEL_MAC_IICI) || (m_model == MODEL_MAC_SE30) || (m_model == MODEL_MAC_QUADRA_700))
31		#define ADB_IS_EGRET   (mac->m_model >= MODEL_MAC_LC && mac->m_model <= MODEL_MAC_CLASSIC_II) || ((mac->m_model >= MODEL_MAC_IISI) && (mac->m_model <= MODEL_MAC_IIVI))
32		#define ADB_IS_CUDA       ((mac->m_model >= MODEL_MAC_COLOR_CLASSIC && mac->m_model <= MODEL_MAC_LC_580) || ((mac->m_model >= MODEL_MAC_QUADRA_660AV) && (mac->m_model <= MODEL_MAC_QUADRA_630)) || (mac->m_model >= MODEL_MAC_POWERMAC_6100))
33		#define ADB_IS_PM_VIA1   (mac->m_model >= MODEL_MAC_PORTABLE && mac->m_model <= MODEL_MAC_PB100)
34		#define ADB_IS_PM_VIA2   (mac->m_model >= MODEL_MAC_PB140 && mac->m_model <= MODEL_MAC_PBDUO_270c)
	31	#define ADB_IS_EGRET   (m_model >= MODEL_MAC_LC && m_model <= MODEL_MAC_CLASSIC_II) || ((m_model >= MODEL_MAC_IISI) && (m_model <= MODEL_MAC_IIVI))
	32	#define ADB_IS_CUDA       ((m_model >= MODEL_MAC_COLOR_CLASSIC && m_model <= MODEL_MAC_LC_580) || ((m_model >= MODEL_MAC_QUADRA_660AV) && (m_model <= MODEL_MAC_QUADRA_630)) || (m_model >= MODEL_MAC_POWERMAC_6100))
	33	#define ADB_IS_PM_VIA1   (m_model >= MODEL_MAC_PORTABLE && m_model <= MODEL_MAC_PB100)
	34	#define ADB_IS_PM_VIA2   (m_model >= MODEL_MAC_PB140 && m_model <= MODEL_MAC_PBDUO_270c)
35	35	#define ADB_IS_PM_VIA1_CLASS   (m_model >= MODEL_MAC_PORTABLE && m_model <= MODEL_MAC_PB100)
36	36	#define ADB_IS_PM_VIA2_CLASS   (m_model >= MODEL_MAC_PB140 && m_model <= MODEL_MAC_PBDUO_270c)
37	37	#define ADB_IS_PM_CLASS   ((m_model >= MODEL_MAC_PORTABLE && m_model <= MODEL_MAC_PB100) || (m_model >= MODEL_MAC_PB140 && m_model <= MODEL_MAC_PBDUO_270c))
r18257	r18258
529	529	TIMER_CALLBACK_MEMBER(mac_scanline_tick);
530	530	TIMER_CALLBACK_MEMBER(dafb_vbl_tick);
531	531	TIMER_CALLBACK_MEMBER(dafb_cursor_tick);
	532	DECLARE_WRITE8_MEMBER(mac_via_out_cb2);
	533	DECLARE_READ8_MEMBER(mac_adb_via_in_cb2);
	534	DECLARE_WRITE8_MEMBER(mac_adb_via_out_cb2);
	535	DECLARE_READ8_MEMBER(mac_via_in_a);
	536	DECLARE_READ8_MEMBER(mac_via_in_b);
	537	DECLARE_WRITE8_MEMBER(mac_via_out_a);
	538	DECLARE_WRITE8_MEMBER(mac_via_out_b);
	539	DECLARE_READ8_MEMBER(mac_via2_in_a);
	540	DECLARE_READ8_MEMBER(mac_via2_in_b);
	541	DECLARE_WRITE8_MEMBER(mac_via2_out_a);
	542	DECLARE_WRITE8_MEMBER(mac_via2_out_b);
532	543	};
533	544
534	545	#endif /* MAC_H_ */

trunk/src/mess/includes/nascom1.h

r18257	r18258
50	50	virtual void machine_reset();
51	51	UINT32 screen_update_nascom1(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
52	52	UINT32 screen_update_nascom2(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	53	DECLARE_WRITE_LINE_MEMBER(nascom2_fdc_intrq_w);
	54	DECLARE_WRITE_LINE_MEMBER(nascom2_fdc_drq_w);
	55	DECLARE_READ8_MEMBER(nascom1_hd6402_si);
	56	DECLARE_WRITE8_MEMBER(nascom1_hd6402_so);
53	57	};
54	58
55	59
r18257	r18258
60	64	DEVICE_IMAGE_LOAD( nascom1_cassette );
61	65	DEVICE_IMAGE_UNLOAD( nascom1_cassette );
62	66	SNAPSHOT_LOAD( nascom1 );
63
64		DECLARE_READ8_DEVICE_HANDLER( nascom1_hd6402_si );
65		DECLARE_WRITE8_DEVICE_HANDLER( nascom1_hd6402_so );
66
67	67	#endif /* NASCOM1_H_ */

trunk/src/mess/includes/pecom.h

r18257	r18258
41	41	DECLARE_VIDEO_START(pecom);
42	42	DECLARE_INPUT_CHANGED_MEMBER(ef_w);
43	43	TIMER_CALLBACK_MEMBER(reset_tick);
	44	DECLARE_READ_LINE_MEMBER(clear_r);
	45	DECLARE_READ_LINE_MEMBER(ef2_r);
	46	DECLARE_WRITE_LINE_MEMBER(pecom64_q_w);
	47	DECLARE_WRITE_LINE_MEMBER(pecom_prd_w);
44	48	};
45	49
46	50	/*----------- defined in machine/pecom.c -----------*/

trunk/src/mess/includes/dgn_beta.h

r18257	r18258
161	161	DECLARE_WRITE8_MEMBER(dgnbeta_ram_bE_w);
162	162	DECLARE_WRITE8_MEMBER(dgnbeta_ram_bF_w);
163	163	DECLARE_WRITE8_MEMBER(dgnbeta_ram_bG_w);
	164	DECLARE_READ8_MEMBER(d_pia0_pa_r);
	165	DECLARE_WRITE8_MEMBER(d_pia0_pa_w);
	166	DECLARE_READ8_MEMBER(d_pia0_pb_r);
	167	DECLARE_WRITE8_MEMBER(d_pia0_pb_w);
	168	DECLARE_WRITE8_MEMBER(d_pia0_cb2_w);
	169	DECLARE_WRITE_LINE_MEMBER(d_pia0_irq_a);
	170	DECLARE_WRITE_LINE_MEMBER(d_pia0_irq_b);
	171	DECLARE_READ8_MEMBER(d_pia1_pa_r);
	172	DECLARE_WRITE8_MEMBER(d_pia1_pa_w);
	173	DECLARE_READ8_MEMBER(d_pia1_pb_r);
	174	DECLARE_WRITE8_MEMBER(d_pia1_pb_w);
	175	DECLARE_WRITE_LINE_MEMBER(d_pia1_irq_a);
	176	DECLARE_WRITE_LINE_MEMBER(d_pia1_irq_b);
	177	DECLARE_READ8_MEMBER(d_pia2_pa_r);
	178	DECLARE_WRITE8_MEMBER(d_pia2_pa_w);
	179	DECLARE_READ8_MEMBER(d_pia2_pb_r);
	180	DECLARE_WRITE8_MEMBER(d_pia2_pb_w);
	181	DECLARE_WRITE_LINE_MEMBER(d_pia2_irq_a);
	182	DECLARE_WRITE_LINE_MEMBER(d_pia2_irq_b);
	183	DECLARE_WRITE_LINE_MEMBER(dgnbeta_fdc_intrq_w);
	184	DECLARE_WRITE_LINE_MEMBER(dgnbeta_fdc_drq_w);
	185	DECLARE_WRITE_LINE_MEMBER(dgnbeta_vsync_changed);
164	186	};
165	187
166	188

trunk/src/mess/includes/ac1.h

r18257	r18258
22	22	virtual void video_start();
23	23	UINT32 screen_update_ac1(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
24	24	UINT32 screen_update_ac1_32(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	25	DECLARE_READ8_MEMBER(ac1_port_b_r);
	26	DECLARE_READ8_MEMBER(ac1_port_a_r);
	27	DECLARE_WRITE8_MEMBER(ac1_port_a_w);
	28	DECLARE_WRITE8_MEMBER(ac1_port_b_w);
25	29	};
26	30
27	31

trunk/src/mess/includes/tsispch.h

r18257	r18258
43	43	DECLARE_READ16_MEMBER(dsp_status_r);
44	44	DECLARE_WRITE16_MEMBER(dsp_status_w);
45	45	DECLARE_DRIVER_INIT(prose2k);
	46	DECLARE_WRITE_LINE_MEMBER(i8251_rxrdy_int);
	47	DECLARE_WRITE_LINE_MEMBER(i8251_txempty_int);
	48	DECLARE_WRITE_LINE_MEMBER(i8251_txrdy_int);
	49	DECLARE_WRITE_LINE_MEMBER(pic8259_set_int_line);
46	50	};
47	51
48	52

trunk/src/mess/includes/apple2gs.h

r18257	r18258
145	145	TIMER_CALLBACK_MEMBER(apple2gs_clock_tick);
146	146	TIMER_CALLBACK_MEMBER(apple2gs_qsecond_tick);
147	147	TIMER_CALLBACK_MEMBER(apple2gs_scanline_tick);
	148	DECLARE_WRITE8_MEMBER(a2bus_irq_w);
	149	DECLARE_WRITE8_MEMBER(a2bus_nmi_w);
	150	DECLARE_WRITE8_MEMBER(a2bus_inh_w);
148	151	};
149	152
150	153

trunk/src/mess/includes/nes.h

r18257	r18258
126	126	UINT32 screen_update_nes(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
127	127	TIMER_CALLBACK_MEMBER(nes_irq_callback);
128	128	TIMER_CALLBACK_MEMBER(lightgun_tick);
	129	DECLARE_READ8_MEMBER(psg_4015_r);
	130	DECLARE_WRITE8_MEMBER(psg_4015_w);
	131	DECLARE_WRITE8_MEMBER(psg_4017_w);
129	132	};
130	133
131	134	/*----------- defined in machine/nes.c -----------*/

trunk/src/mess/includes/pes.h

r18257	r18258
39	39	DECLARE_READ8_MEMBER(port1_r);
40	40	DECLARE_READ8_MEMBER(port3_r);
41	41	DECLARE_DRIVER_INIT(pes);
	42	DECLARE_WRITE8_MEMBER(pes_kbd_input);
42	43	};
43	44
44	45

trunk/src/mess/includes/cgenie.h

r18257	r18258
74	74	INTERRUPT_GEN_MEMBER(cgenie_timer_interrupt);
75	75	INTERRUPT_GEN_MEMBER(cgenie_frame_interrupt);
76	76	TIMER_CALLBACK_MEMBER(handle_cassette_input);
	77	DECLARE_WRITE_LINE_MEMBER(cgenie_fdc_intrq_w);
	78	DECLARE_READ8_MEMBER(cgenie_sh_control_port_r);
	79	DECLARE_WRITE8_MEMBER(cgenie_sh_control_port_w);
77	80	};
78	81
79	82
80	83	/*----------- defined in machine/cgenie.c -----------*/
81	84
82		DECLARE_READ8_DEVICE_HANDLER( cgenie_sh_control_port_r );
83		DECLARE_WRITE8_DEVICE_HANDLER( cgenie_sh_control_port_w );
84	85
85	86	extern const wd17xx_interface cgenie_wd17xx_interface;
86	87

trunk/src/mess/includes/amstrad.h

r18257	r18258
173	173	TIMER_CALLBACK_MEMBER(amstrad_pc2_low);
174	174	TIMER_CALLBACK_MEMBER(amstrad_video_update_timer);
175	175	TIMER_CALLBACK_MEMBER(cb_set_resolution);
	176	DECLARE_WRITE_LINE_MEMBER(aleste_interrupt);
	177	DECLARE_WRITE_LINE_MEMBER(amstrad_hsync_changed);
	178	DECLARE_WRITE_LINE_MEMBER(amstrad_plus_hsync_changed);
	179	DECLARE_WRITE_LINE_MEMBER(amstrad_vsync_changed);
	180	DECLARE_WRITE_LINE_MEMBER(amstrad_plus_vsync_changed);
	181	DECLARE_WRITE_LINE_MEMBER(amstrad_de_changed);
	182	DECLARE_WRITE_LINE_MEMBER(amstrad_plus_de_changed);
	183	DECLARE_READ8_MEMBER(amstrad_ppi_porta_r);
	184	DECLARE_WRITE8_MEMBER(amstrad_ppi_porta_w);
	185	DECLARE_READ8_MEMBER(amstrad_ppi_portb_r);
	186	DECLARE_WRITE8_MEMBER(amstrad_ppi_portc_w);
176	187	};
177	188
178	189
179	190	/*----------- defined in machine/amstrad.c -----------*/
180	191
181	192
182
183		DECLARE_READ8_DEVICE_HANDLER( amstrad_ppi_porta_r );
184		DECLARE_READ8_DEVICE_HANDLER( amstrad_ppi_portb_r );
185		DECLARE_WRITE8_DEVICE_HANDLER( amstrad_ppi_porta_w );
186		DECLARE_WRITE8_DEVICE_HANDLER( amstrad_ppi_portc_w );
187
188
189		WRITE_LINE_DEVICE_HANDLER( aleste_interrupt );
190	193	WRITE_LINE_DEVICE_HANDLER( cpc_irq_w );
191	194	WRITE_LINE_DEVICE_HANDLER( cpc_nmi_w );
192	195	WRITE_LINE_DEVICE_HANDLER( cpc_romdis );
193	196	WRITE_LINE_DEVICE_HANDLER( cpc_romen );
194	197
195
196
197
198
199
200
201
202
203
204
205
206	198	SNAPSHOT_LOAD( amstrad );
207	199
208	200	DEVICE_IMAGE_LOAD(amstrad_plus_cartridge);

trunk/src/mess/includes/kyocera.h

r18257	r18258
115	115	int m_bell;            /* bell output */
116	116
117	117	DECLARE_PALETTE_INIT(kc85);
	118	DECLARE_WRITE_LINE_MEMBER(kc85_sod_w);
	119	DECLARE_READ_LINE_MEMBER(kc85_sid_r);
118	120	};
119	121
120	122	class trsm100_state : public kc85_state

trunk/src/mess/includes/pc.h

r18257	r18258
91	91	TIMER_DEVICE_CALLBACK_MEMBER(pc_frame_interrupt);
92	92	TIMER_DEVICE_CALLBACK_MEMBER(pc_vga_frame_interrupt);
93	93	TIMER_DEVICE_CALLBACK_MEMBER(pcjr_frame_interrupt);
	94	DECLARE_WRITE_LINE_MEMBER(pc_dma_hrq_changed);
	95	DECLARE_READ8_MEMBER(pc_dma8237_fdc_dack_r);
	96	DECLARE_READ8_MEMBER(pc_dma8237_hdc_dack_r);
	97	DECLARE_WRITE8_MEMBER(pc_dma8237_fdc_dack_w);
	98	DECLARE_WRITE8_MEMBER(pc_dma8237_hdc_dack_w);
	99	DECLARE_WRITE8_MEMBER(pc_dma8237_0_dack_w);
	100	DECLARE_WRITE_LINE_MEMBER(pc_dma8237_out_eop);
	101	DECLARE_WRITE_LINE_MEMBER(pc_dack0_w);
	102	DECLARE_WRITE_LINE_MEMBER(pc_dack1_w);
	103	DECLARE_WRITE_LINE_MEMBER(pc_dack2_w);
	104	DECLARE_WRITE_LINE_MEMBER(pc_dack3_w);
	105	DECLARE_WRITE_LINE_MEMBER(pcjr_pic8259_set_int_line);
	106	DECLARE_WRITE_LINE_MEMBER(ibm5150_pit8253_out1_changed);
	107	DECLARE_WRITE_LINE_MEMBER(ibm5150_pit8253_out2_changed);
	108	DECLARE_WRITE_LINE_MEMBER(pc_com_interrupt_1);
	109	DECLARE_WRITE_LINE_MEMBER(pc_com_interrupt_2);
	110	DECLARE_READ8_MEMBER(ibm5160_ppi_porta_r);
	111	DECLARE_READ8_MEMBER(ibm5160_ppi_portc_r);
	112	DECLARE_WRITE8_MEMBER(ibm5160_ppi_portb_w);
	113	DECLARE_READ8_MEMBER(pc_ppi_porta_r);
	114	DECLARE_WRITE8_MEMBER(pc_ppi_portb_w);
	115	DECLARE_READ8_MEMBER(mc1502_ppi_porta_r);
	116	DECLARE_WRITE8_MEMBER(mc1502_ppi_porta_w);
	117	DECLARE_WRITE8_MEMBER(mc1502_ppi_portb_w);
	118	DECLARE_READ8_MEMBER(mc1502_ppi_portc_r);
	119	DECLARE_READ8_MEMBER(mc1502_kppi_porta_r);
	120	DECLARE_WRITE8_MEMBER(mc1502_kppi_portb_w);
	121	DECLARE_WRITE8_MEMBER(mc1502_kppi_portc_w);
	122	DECLARE_WRITE8_MEMBER(pcjr_ppi_portb_w);
	123	DECLARE_READ8_MEMBER(pcjr_ppi_porta_r);
	124	DECLARE_READ8_MEMBER(pcjr_ppi_portc_r);
	125	DECLARE_READ8_MEMBER(mc1502_wd17xx_aux_r);
	126	DECLARE_WRITE8_MEMBER(mc1502_wd17xx_aux_w);
	127	DECLARE_READ8_MEMBER(mc1502_wd17xx_drq_r);
	128	DECLARE_READ8_MEMBER(mc1502_wd17xx_motor_r);
94	129	};
95	130
96	131	/*----------- defined in machine/pc.c -----------*/
r18257	r18258
117	152	void mess_init_pc_common( running_machine &machine, UINT32 flags, void (*set_keyb_int_func)(running_machine &, int), void (*set_hdc_int_func)(running_machine &,int,int));
118	153
119	154
120
121		DECLARE_READ8_DEVICE_HANDLER( mc1502_wd17xx_drq_r );
122		DECLARE_READ8_DEVICE_HANDLER( mc1502_wd17xx_aux_r );
123		DECLARE_READ8_DEVICE_HANDLER( mc1502_wd17xx_motor_r );
124		DECLARE_WRITE8_DEVICE_HANDLER( mc1502_wd17xx_aux_w );
125
126	155	DEVICE_IMAGE_LOAD( pcjr_cartridge );
127	156
128	157	void pc_rtc_init(running_machine &machine);

trunk/src/mess/includes/z80ne.h

r18257	r18258
108	108	DECLARE_INPUT_CHANGED_MEMBER(z80ne_nmi);
109	109	TIMER_CALLBACK_MEMBER(z80ne_cassette_tc);
110	110	TIMER_CALLBACK_MEMBER(z80ne_kbd_scan);
	111	DECLARE_READ8_MEMBER(lx388_mc6847_videoram_r);
	112	DECLARE_WRITE8_MEMBER(lx390_motor_w);
	113	DECLARE_READ8_MEMBER(lx390_reset_bank);
	114	DECLARE_READ8_MEMBER(lx390_fdc_r);
	115	DECLARE_WRITE8_MEMBER(lx390_fdc_w);
111	116	};
112	117
113
114		/*----------- defined in machine/z80ne.c -----------*/
115
116		DECLARE_READ8_DEVICE_HANDLER(lx388_mc6847_videoram_r);
117		DECLARE_READ8_DEVICE_HANDLER(lx390_fdc_r);
118		DECLARE_WRITE8_DEVICE_HANDLER(lx390_fdc_w);
119		DECLARE_READ8_DEVICE_HANDLER(lx390_reset_bank);
120		DECLARE_WRITE8_DEVICE_HANDLER(lx390_motor_w);
121
122	118	#endif /* Z80NE_H_ */

trunk/src/mess/includes/kaypro.h

r18257	r18258
80	80	UINT32 screen_update_omni2(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
81	81	INTERRUPT_GEN_MEMBER(kay_kbd_interrupt);
82	82	TIMER_CALLBACK_MEMBER(kaypro_timer_callback);
	83	DECLARE_WRITE_LINE_MEMBER(kaypro_interrupt);
	84	DECLARE_READ8_MEMBER(kaypro_sio_r);
	85	DECLARE_WRITE8_MEMBER(kaypro_sio_w);
83	86	};
84	87
85	88
r18257	r18258
100	103	extern const z80sio_interface kaypro_sio_intf;
101	104	extern const wd17xx_interface kaypro_wd1793_interface;
102	105
103		DECLARE_READ8_DEVICE_HANDLER( kaypro_sio_r );
104		DECLARE_WRITE8_DEVICE_HANDLER( kaypro_sio_w );
105	106
106
107	107	QUICKLOAD_LOAD( kayproii );
108	108	QUICKLOAD_LOAD( kaypro2x );
109	109

trunk/src/mess/includes/msx.h

r18257	r18258
126	126	DECLARE_MACHINE_RESET(msx2);
127	127	INTERRUPT_GEN_MEMBER(msx_interrupt);
128	128	TIMER_DEVICE_CALLBACK_MEMBER(msx2_interrupt);
	129	DECLARE_WRITE8_MEMBER(msx_ay8910_w);
	130	DECLARE_WRITE8_MEMBER(msx_printer_strobe_w);
	131	DECLARE_WRITE8_MEMBER(msx_printer_data_w);
	132	DECLARE_READ8_MEMBER(msx_printer_status_r);
129	133	};
130	134
131	135
r18257	r18258
141	145	void msx_vdp_interrupt(device_t *, v99x8_device &device, int i);
142	146
143	147	/* I/O functions */
144		DECLARE_READ8_DEVICE_HANDLER( msx_printer_status_r );
145		DECLARE_WRITE8_DEVICE_HANDLER( msx_printer_strobe_w );
146		DECLARE_WRITE8_DEVICE_HANDLER( msx_printer_data_w );
147	148
148
149	149	#endif /* __MSX_H__ */

trunk/src/mess/includes/sg1000.h

r18257	r18258
73	73	/* TV Draw state */
74	74	UINT8 m_tvdraw_data;
75	75	TIMER_CALLBACK_MEMBER(lightgun_tick);
	76	DECLARE_WRITE_LINE_MEMBER(sg1000_vdp_interrupt);
76	77	};
77	78
78	79	class sc3000_state : public sg1000_state
r18257	r18258
114	115	DECLARE_READ8_MEMBER( ppi_pa_r );
115	116	DECLARE_WRITE8_MEMBER( ppi_pc_w );
116	117	DECLARE_WRITE_LINE_MEMBER( fdc_intrq_w );
	118	DECLARE_WRITE_LINE_MEMBER(sf7000_fdc_index_callback);
117	119
118	120	/* floppy state */
119	121	int m_fdc_irq;

trunk/src/mess/includes/pokemini.h

r18257	r18258
73	73	TIMER_CALLBACK_MEMBER(pokemini_timer3_callback);
74	74	TIMER_CALLBACK_MEMBER(pokemini_timer3_hi_callback);
75	75	TIMER_CALLBACK_MEMBER(pokemini_prc_counter_callback);
	76	DECLARE_WRITE8_MEMBER(pokemini_hwreg_w);
	77	DECLARE_READ8_MEMBER(pokemini_hwreg_r);
76	78	};
77	79
78	80
79	81	/*----------- defined in machine/pokemini.c -----------*/
80
81		DECLARE_WRITE8_DEVICE_HANDLER( pokemini_hwreg_w );
82		DECLARE_READ8_DEVICE_HANDLER( pokemini_hwreg_r );
83
84	82	DEVICE_IMAGE_LOAD( pokemini_cart );
85	83
86	84	#endif /* POKEMINI_H */

trunk/src/mess/includes/b2m.h

r18257	r18258
50	50	virtual void palette_init();
51	51	UINT32 screen_update_b2m(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
52	52	INTERRUPT_GEN_MEMBER(b2m_vblank_interrupt);
	53	DECLARE_WRITE_LINE_MEMBER(bm2_pit_out1);
	54	DECLARE_WRITE8_MEMBER(b2m_8255_porta_w);
	55	DECLARE_WRITE8_MEMBER(b2m_8255_portb_w);
	56	DECLARE_WRITE8_MEMBER(b2m_8255_portc_w);
	57	DECLARE_READ8_MEMBER(b2m_8255_portb_r);
	58	DECLARE_WRITE8_MEMBER(b2m_ext_8255_portc_w);
	59	DECLARE_READ8_MEMBER(b2m_romdisk_porta_r);
	60	DECLARE_WRITE8_MEMBER(b2m_romdisk_portb_w);
	61	DECLARE_WRITE8_MEMBER(b2m_romdisk_portc_w);
	62	DECLARE_WRITE_LINE_MEMBER(b2m_pic_set_int_line);
53	63	};
54	64
55	65	/*----------- defined in machine/b2m.c -----------*/

trunk/src/mess/includes/ace.h

r18257	r18258
60	60	UINT32 screen_update_ace(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
61	61	TIMER_DEVICE_CALLBACK_MEMBER(set_irq);
62	62	TIMER_DEVICE_CALLBACK_MEMBER(clear_irq);
	63	DECLARE_READ8_MEMBER(pio_ad_r);
	64	DECLARE_READ8_MEMBER(pio_bd_r);
	65	DECLARE_READ8_MEMBER(pio_ac_r);
	66	DECLARE_READ8_MEMBER(pio_bc_r);
	67	DECLARE_WRITE8_MEMBER(pio_ad_w);
	68	DECLARE_WRITE8_MEMBER(pio_bd_w);
	69	DECLARE_WRITE8_MEMBER(pio_ac_w);
	70	DECLARE_WRITE8_MEMBER(pio_bc_w);
	71	DECLARE_READ8_MEMBER(sby_r);
	72	DECLARE_WRITE8_MEMBER(ald_w);
63	73	};
64	74
65	75	#endif /* ACE_H_ */

trunk/src/mess/includes/enterp.h

r18257	r18258
32	32	virtual void video_start();
33	33	virtual void palette_init();
34	34	UINT32 screen_update_epnick(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	35	DECLARE_WRITE8_MEMBER(enterprise_dave_reg_write);
	36	DECLARE_READ8_MEMBER(enterprise_dave_reg_read);
	37	DECLARE_WRITE_LINE_MEMBER(enterp_wd1770_intrq_w);
	38	DECLARE_WRITE_LINE_MEMBER(enterp_wd1770_drq_w);
35	39	};
36	40
37	41

trunk/src/mess/includes/coleco.h

r18257	r18258
47	47	TIMER_CALLBACK_MEMBER(paddle_irqreset_callback);
48	48	TIMER_CALLBACK_MEMBER(paddle_pulse_callback);
49	49	TIMER_DEVICE_CALLBACK_MEMBER(paddle_update_callback);
	50	DECLARE_WRITE_LINE_MEMBER(coleco_vdp_interrupt);
50	51	};
51	52
52	53	#endif

trunk/src/mess/includes/ob68k1a.h

r18257	r18258
41	41	DECLARE_WRITE8_MEMBER( com8116_w );
42	42	DECLARE_READ8_MEMBER( pia_r );
43	43	DECLARE_WRITE8_MEMBER( pia_w );
	44	DECLARE_WRITE_LINE_MEMBER(rx_tx_0_w);
	45	DECLARE_WRITE_LINE_MEMBER(rx_tx_1_w);
44	46	};
45	47
46	48	#endif

trunk/src/mess/includes/tandy2k.h

r18257	r18258
136	136	/* sound state */
137	137	int m_outspkr;
138	138	int m_spkrdata;
	139	DECLARE_READ8_MEMBER(fldtc_r);
	140	DECLARE_WRITE8_MEMBER(fldtc_w);
139	141	};
140	142
141	143	#endif

trunk/src/mess/includes/irisha.h

r18257	r18258
48	48	virtual void video_start();
49	49	UINT32 screen_update_irisha(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
50	50	TIMER_CALLBACK_MEMBER(irisha_key);
	51	DECLARE_WRITE_LINE_MEMBER(irisha_pic_set_int_line);
51	52	};
52	53
53	54

trunk/src/mess/includes/pp01.h

r18257	r18258
34	34	virtual void video_start();
35	35	virtual void palette_init();
36	36	UINT32 screen_update_pp01(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	37	DECLARE_WRITE_LINE_MEMBER(pp01_pit_out0);
	38	DECLARE_WRITE_LINE_MEMBER(pp01_pit_out1);
	39	DECLARE_READ8_MEMBER(pp01_8255_porta_r);
	40	DECLARE_WRITE8_MEMBER(pp01_8255_porta_w);
	41	DECLARE_READ8_MEMBER(pp01_8255_portb_r);
	42	DECLARE_WRITE8_MEMBER(pp01_8255_portb_w);
	43	DECLARE_WRITE8_MEMBER(pp01_8255_portc_w);
	44	DECLARE_READ8_MEMBER(pp01_8255_portc_r);
37	45	};
38	46
39	47

trunk/src/mess/includes/m5.h

r18257	r18258
70	70	int m_obfa;
71	71	DECLARE_DRIVER_INIT(pal);
72	72	DECLARE_DRIVER_INIT(ntsc);
	73	DECLARE_WRITE_LINE_MEMBER(sordm5_video_interrupt_callback);
73	74	};
74	75
75	76	#endif

trunk/src/mess/includes/apple1.h

r18257	r18258
52	52	TIMER_CALLBACK_MEMBER(apple1_kbd_strobe_end);
53	53	TIMER_CALLBACK_MEMBER(apple1_dsp_ready_start);
54	54	TIMER_CALLBACK_MEMBER(apple1_dsp_ready_end);
	55	DECLARE_READ8_MEMBER(apple1_pia0_kbdin);
	56	DECLARE_WRITE8_MEMBER(apple1_pia0_dspout);
	57	DECLARE_WRITE8_MEMBER(apple1_pia0_dsp_write_signal);
55	58	};
56	59
57	60

trunk/src/mess/includes/huebler.h

r18257	r18258
52	52	required_shared_ptr<UINT8> m_video_ram;
53	53	const UINT8 *m_char_rom;
54	54	TIMER_DEVICE_CALLBACK_MEMBER(keyboard_tick);
	55	DECLARE_WRITE_LINE_MEMBER(ctc_z0_w);
	56	DECLARE_WRITE_LINE_MEMBER(ctc_z2_w);
	57	DECLARE_READ_LINE_MEMBER(cassette_r);
	58	DECLARE_WRITE_LINE_MEMBER(cassette_w);
55	59	};
56	60
57	61	#endif

trunk/src/mess/includes/pet.h

r18257	r18258
60	60	TIMER_CALLBACK_MEMBER(pet_interrupt);
61	61	TIMER_CALLBACK_MEMBER(pet_tape1_timer);
62	62	TIMER_CALLBACK_MEMBER(pet_tape2_timer);
	63	DECLARE_READ8_MEMBER(pia0_pa_r);
	64	DECLARE_WRITE8_MEMBER(pia0_pa_w);
	65	DECLARE_READ8_MEMBER(kin_r);
	66	DECLARE_READ8_MEMBER(petb_kin_r);
	67	DECLARE_READ8_MEMBER(cass1_r);
	68	DECLARE_WRITE8_MEMBER(cass1_motor_w);
	69	DECLARE_WRITE_LINE_MEMBER(pia0_irq_w);
	70	DECLARE_WRITE_LINE_MEMBER(pia1_irq_w);
	71	DECLARE_READ8_MEMBER(via_pb_r);
	72	DECLARE_READ_LINE_MEMBER(cass2_r);
	73	DECLARE_WRITE8_MEMBER(via_pb_w);
	74	DECLARE_WRITE_LINE_MEMBER(gb_w);
	75	DECLARE_WRITE_LINE_MEMBER(via_irq_w);
	76	DECLARE_WRITE_LINE_MEMBER(pet_display_enable_changed);
63	77	};
64	78
65	79	/*----------- defined in video/pet.c -----------*/
r18257	r18258
71	85
72	86	MC6845_UPDATE_ROW( pet40_update_row );
73	87	MC6845_UPDATE_ROW( pet80_update_row );
74		WRITE_LINE_DEVICE_HANDLER( pet_display_enable_changed );
75	88
76	89
77	90	/*----------- defined in machine/pet.c -----------*/

trunk/src/mess/includes/pcw.h

r18257	r18258
106	106	TIMER_CALLBACK_MEMBER(pcw_pins_callback);
107	107	TIMER_CALLBACK_MEMBER(setup_beep);
108	108	TIMER_DEVICE_CALLBACK_MEMBER(pcw_timer_interrupt);
	109	DECLARE_WRITE_LINE_MEMBER(pcw_fdc_interrupt);
109	110	};
110	111
111	112	#endif /* PCW_H_ */

trunk/src/mess/includes/osi.h

r18257	r18258
65	65	/* floppy state */
66	66	int m_fdc_index;
67	67	TIMER_CALLBACK_MEMBER(setup_beep);
	68	DECLARE_WRITE_LINE_MEMBER(osi470_index_callback);
68	69	};
69	70
70	71	class c1p_state : public sb2m600_state

trunk/src/mess/includes/nc.h

r18257	r18258
83	83	TIMER_CALLBACK_MEMBER(nc_keyboard_timer_callback);
84	84	TIMER_CALLBACK_MEMBER(nc_serial_timer_callback);
85	85	TIMER_DEVICE_CALLBACK_MEMBER(dummy_timer_callback);
	86	DECLARE_WRITE_LINE_MEMBER(nc100_tc8521_alarm_callback);
	87	DECLARE_WRITE_LINE_MEMBER(nc100_txrdy_callback);
	88	DECLARE_WRITE_LINE_MEMBER(nc100_rxrdy_callback);
	89	DECLARE_WRITE_LINE_MEMBER(nc100_centronics_ack_w);
	90	DECLARE_WRITE_LINE_MEMBER(nc200_centronics_ack_w);
	91	DECLARE_WRITE_LINE_MEMBER(nc200_txrdy_callback);
	92	DECLARE_WRITE_LINE_MEMBER(nc200_rxrdy_callback);
	93	DECLARE_WRITE_LINE_MEMBER(nc200_fdc_interrupt);
86	94	};
87	95
88	96

trunk/src/mess/includes/pcw16.h

r18257	r18258
101	101	TIMER_DEVICE_CALLBACK_MEMBER(pcw16_timer_callback);
102	102	TIMER_DEVICE_CALLBACK_MEMBER(pcw16_keyboard_timer_callback);
103	103	TIMER_DEVICE_CALLBACK_MEMBER(rtc_timer_callback);
	104	DECLARE_WRITE_LINE_MEMBER(pcw16_com_interrupt_1);
	105	DECLARE_WRITE_LINE_MEMBER(pcw16_com_interrupt_2);
	106	DECLARE_WRITE_LINE_MEMBER(pcw16_com_tx_0);
	107	DECLARE_WRITE_LINE_MEMBER(pcw16_com_dtr_0);
	108	DECLARE_WRITE_LINE_MEMBER(pcw16_com_rts_0);
	109	DECLARE_WRITE_LINE_MEMBER(pcw16_com_tx_1);
	110	DECLARE_WRITE_LINE_MEMBER(pcw16_com_dtr_1);
	111	DECLARE_WRITE_LINE_MEMBER(pcw16_com_rts_1);
104	112	};
105	113
106	114	#endif /* PCW16_H_ */

trunk/src/mess/includes/kramermc.h

r18257	r18258
20	20	virtual void machine_reset();
21	21	virtual void video_start();
22	22	UINT32 screen_update_kramermc(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	23	DECLARE_READ8_MEMBER(kramermc_port_a_r);
	24	DECLARE_READ8_MEMBER(kramermc_port_b_r);
	25	DECLARE_WRITE8_MEMBER(kramermc_port_a_w);
23	26	};
24	27
25	28

trunk/src/mess/includes/victor9k.h

r18257	r18258
125	125	int m_se[2];                  /* stepper enable */
126	126	int m_drive;                  /* selected drive */
127	127	int m_side;                     /* selected side */
	128	DECLARE_WRITE_LINE_MEMBER(mux_serial_b_w);
	129	DECLARE_WRITE_LINE_MEMBER(mux_serial_a_w);
128	130	};
129	131
130	132	#endif

trunk/src/mess/video/pecom.c

r18257	r18258
70	70	return BIT(pmd, 7);
71	71	}
72	72
73		static WRITE_LINE_DEVICE_HANDLER( pecom_prd_w )
	73	WRITE_LINE_MEMBER(pecom_state::pecom_prd_w)
74	74	{
75		pecom_state *driver_state = device->machine().driver_data<pecom_state>();
76
77	75	// every other PRD triggers a DMAOUT request
78		if (driver_state->m_dma)
	76	if (m_dma)
79	77	{
80		device->machine().device(CDP1802_TAG)->execute().set_input_line(COSMAC_INPUT_LINE_DMAOUT, HOLD_LINE);
	78	machine().device(CDP1802_TAG)->execute().set_input_line(COSMAC_INPUT_LINE_DMAOUT, HOLD_LINE);
81	79	}
82	80
83		driver_state->m_dma = !driver_state->m_dma;
	81	m_dma = !m_dma;
84	82	}
85	83
86	84	static CDP1869_INTERFACE( pecom_cdp1869_intf )
r18257	r18258
91	89	pecom_pcb_r,
92	90	pecom_char_ram_r,
93	91	pecom_char_ram_w,
94		DEVCB_LINE(pecom_prd_w)
	92	DEVCB_DRIVER_LINE_MEMBER(pecom_state,pecom_prd_w)
95	93	};
96	94
97	95	VIDEO_START_MEMBER(pecom_state,pecom)

trunk/src/mess/video/bbc.c

r18257	r18258
276	276	}
277	277	}
278	278
279		static WRITE_LINE_DEVICE_HANDLER( bbc_vsync )
	279	WRITE_LINE_MEMBER(bbc_state::bbc_vsync)
280	280	{
281		bbc_state *bstate = device->machine().driver_data<bbc_state>();
282		bstate->m_trom->dew_w(state);
	281	m_trom->dew_w(state);
283	282	}
284	283
285	284
r18257	r18258
293	292	DEVCB_NULL,                  /* on_de_changed */
294	293	DEVCB_NULL,                  /* on_cur_changed */
295	294	DEVCB_NULL,                  /* on_hsync_changed */
296		DEVCB_LINE(bbc_vsync),         /* on_vsync_changed */
	295	DEVCB_DRIVER_LINE_MEMBER(bbc_state,bbc_vsync),         /* on_vsync_changed */
297	296	NULL
298	297	};
299	298

trunk/src/mess/video/pet.c

r18257	r18258
106	106	}
107	107	}
108	108
109		WRITE_LINE_DEVICE_HANDLER( pet_display_enable_changed )
	109	WRITE_LINE_MEMBER(pet_state::pet_display_enable_changed)
110	110	{
111	111	}
112	112

trunk/src/mess/video/dgn_beta.c

r18257	r18258
240	240
241	241	}
242	242
243		static WRITE_LINE_DEVICE_HANDLER( dgnbeta_vsync_changed )
	243	WRITE_LINE_MEMBER(dgn_beta_state::dgnbeta_vsync_changed)
244	244	{
245		dgn_beta_state *st = device->machine().driver_data<dgn_beta_state>();
246
247		st->m_beta_VSync=state;
248		if (!st->m_beta_VSync)
	245	m_beta_VSync=state;
	246	if (!m_beta_VSync)
249	247	{
250		st->m_FlashCount++;
251		if(st->m_FlashCount==10)
	248	m_FlashCount++;
	249	if(m_FlashCount==10)
252	250	{
253		st->m_FlashCount=0;         // Reset counter
254		st->m_FlashBit=(!st->m_FlashBit) & 0x01;   // Invert flash bit.
	251	m_FlashCount=0;         // Reset counter
	252	m_FlashBit=(!m_FlashBit) & 0x01;   // Invert flash bit.
255	253	}
256	254	}
257	255
258		dgn_beta_frame_interrupt(device->machine(), state);
	256	dgn_beta_frame_interrupt(machine(), state);
259	257	}
260	258
261	259	const mc6845_interface dgnbeta_crtc6845_interface =
r18257	r18258
268	266	DEVCB_NULL,
269	267	DEVCB_NULL,
270	268	DEVCB_NULL,
271		DEVCB_LINE(dgnbeta_vsync_changed),
	269	DEVCB_DRIVER_LINE_MEMBER(dgn_beta_state,dgnbeta_vsync_changed),
272	270	NULL
273	271	};
274	272

trunk/src/mess/drivers/bullet.c

r18257	r18258
683	683	m_ctc->trg2(0);
684	684	}
685	685
686		static WRITE_LINE_DEVICE_HANDLER( dart_rxtxca_w )
	686	WRITE_LINE_MEMBER(bullet_state::dart_rxtxca_w)
687	687	{
	688	device_t *device = machine().device(Z80DART_TAG);
688	689	z80dart_txca_w(device, state);
689	690	z80dart_rxca_w(device, state);
690	691	}
r18257	r18258
692	693	static Z80CTC_INTERFACE( ctc_intf )
693	694	{
694	695	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),      // interrupt handler
695		DEVCB_DEVICE_LINE(Z80DART_TAG, dart_rxtxca_w),      // ZC/TO0 callback
	696	DEVCB_DRIVER_LINE_MEMBER(bullet_state,dart_rxtxca_w),      // ZC/TO0 callback
696	697	DEVCB_DEVICE_LINE(Z80DART_TAG, z80dart_rxtxcb_w),   // ZC/TO1 callback
697	698	DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF, z80ctc_device, trg3)                     // ZC/TO2 callback
698	699	};

trunk/src/mess/drivers/fm7.c

r18257	r18258
396	396	*  Main CPU: I/O ports 0xfd18 - 0xfd1f
397	397	*  Floppy Disk Controller (MB8877A)
398	398	*/
399		static WRITE_LINE_DEVICE_HANDLER( fm7_fdc_intrq_w )
	399	WRITE_LINE_MEMBER(fm7_state::fm7_fdc_intrq_w)
400	400	{
401		fm7_state *drvstate = device->machine().driver_data<fm7_state>();
402		drvstate->m_fdc_irq_flag = state;
	401	m_fdc_irq_flag = state;
403	402	}
404	403
405		static WRITE_LINE_DEVICE_HANDLER( fm7_fdc_drq_w )
	404	WRITE_LINE_MEMBER(fm7_state::fm7_fdc_drq_w)
406	405	{
407		fm7_state *drvstate = device->machine().driver_data<fm7_state>();
408		drvstate->m_fdc_drq_flag = state;
	406	m_fdc_drq_flag = state;
409	407	}
410	408
411	409	READ8_MEMBER(fm7_state::fm7_fdc_r)
r18257	r18258
940	938	return ret;
941	939	}
942	940
943		static READ8_DEVICE_HANDLER( fm77av_joy_1_r )
	941	READ8_MEMBER(fm7_state::fm77av_joy_1_r)
944	942	{
945		return space.machine().root_device().ioport("joy1")->read();
	943	return machine().root_device().ioport("joy1")->read();
946	944	}
947	945
948		static READ8_DEVICE_HANDLER( fm77av_joy_2_r )
	946	READ8_MEMBER(fm7_state::fm77av_joy_2_r)
949	947	{
950		return space.machine().root_device().ioport("joy2")->read();
	948	return machine().root_device().ioport("joy2")->read();
951	949	}
952	950
953	951	READ8_MEMBER(fm7_state::fm7_unknown_r)
r18257	r18258
1971	1969	static const wd17xx_interface fm7_mb8877a_interface =
1972	1970	{
1973	1971	DEVCB_NULL,
1974		DEVCB_LINE(fm7_fdc_intrq_w),
1975		DEVCB_LINE(fm7_fdc_drq_w),
	1972	DEVCB_DRIVER_LINE_MEMBER(fm7_state,fm7_fdc_intrq_w),
	1973	DEVCB_DRIVER_LINE_MEMBER(fm7_state,fm7_fdc_drq_w),
1976	1974	{FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3}
1977	1975	};
1978	1976
r18257	r18258
1991	1989	{
1992	1990	AY8910_LEGACY_OUTPUT,
1993	1991	AY8910_DEFAULT_LOADS,
1994		DEVCB_HANDLER(fm77av_joy_1_r),
1995		DEVCB_HANDLER(fm77av_joy_2_r),
	1992	DEVCB_DRIVER_MEMBER(fm7_state,fm77av_joy_1_r),
	1993	DEVCB_DRIVER_MEMBER(fm7_state,fm77av_joy_2_r),
1996	1994	DEVCB_NULL,               /* portA write */
1997	1995	DEVCB_NULL               /* portB write */
1998	1996	},

trunk/src/mess/drivers/svi318.c

r18257	r18258
260	260	DEVCB_DRIVER_MEMBER(svi318_state, svi318_psg_port_b_w)
261	261	};
262	262
263		static WRITE_LINE_DEVICE_HANDLER(vdp_interrupt)
	263	WRITE_LINE_MEMBER(svi318_state::vdp_interrupt)
264	264	{
265		device->machine().device("maincpu")->execute().set_input_line(0, (state ? HOLD_LINE : CLEAR_LINE));
	265	machine().device("maincpu")->execute().set_input_line(0, (state ? HOLD_LINE : CLEAR_LINE));
266	266	}
267	267
268	268	static TMS9928A_INTERFACE(svi318_tms9928a_interface)
269	269	{
270	270	"screen",
271	271	0x4000,
272		DEVCB_LINE(vdp_interrupt)
	272	DEVCB_DRIVER_LINE_MEMBER(svi318_state,vdp_interrupt)
273	273	};
274	274
275	275	static const cassette_interface svi318_cassette_interface =

trunk/src/mess/drivers/pc.c

r18257	r18258
157	157	AM_RANGE(0x0040, 0x0043) AM_DEVREADWRITE_LEGACY("pit8253", pit8253_r, pit8253_w)
158	158	AM_RANGE(0x0060, 0x0063) AM_DEVREADWRITE("ppi8255", i8255_device, read, write)
159	159	AM_RANGE(0x0068, 0x006B) AM_DEVREADWRITE("ppi8255n2", i8255_device, read, write)   // keyboard poll
160		AM_RANGE(0x0100, 0x0100) AM_DEVREADWRITE_LEGACY("vg93", mc1502_wd17xx_aux_r, mc1502_wd17xx_aux_w)
161		AM_RANGE(0x0108, 0x0108) AM_DEVREAD_LEGACY("vg93", mc1502_wd17xx_drq_r)         // blocking read!
162		AM_RANGE(0x010a, 0x010a) AM_DEVREAD_LEGACY("vg93", mc1502_wd17xx_motor_r)
	160	AM_RANGE(0x0100, 0x0100) AM_READWRITE(mc1502_wd17xx_aux_r, mc1502_wd17xx_aux_w)
	161	AM_RANGE(0x0108, 0x0108) AM_READ(mc1502_wd17xx_drq_r)         // blocking read!
	162	AM_RANGE(0x010a, 0x010a) AM_READ(mc1502_wd17xx_motor_r)
163	163	AM_RANGE(0x010c, 0x010c) AM_DEVREADWRITE_LEGACY("vg93", wd17xx_status_r, wd17xx_command_w)
164	164	AM_RANGE(0x010d, 0x010d) AM_DEVREADWRITE_LEGACY("vg93", wd17xx_track_r, wd17xx_track_w)
165	165	AM_RANGE(0x010e, 0x010e) AM_DEVREADWRITE_LEGACY("vg93", wd17xx_sector_r, wd17xx_sector_w)

trunk/src/mess/drivers/victor9k.c

r18257	r18258
123	123
124	124	// Intel 8253 Interface
125	125
126		static WRITE_LINE_DEVICE_HANDLER( mux_serial_b_w )
	126	WRITE_LINE_MEMBER(victor9k_state::mux_serial_b_w)
127	127	{
128	128	}
129	129
130		static WRITE_LINE_DEVICE_HANDLER( mux_serial_a_w )
	130	WRITE_LINE_MEMBER(victor9k_state::mux_serial_a_w)
131	131	{
132	132	}
133	133
r18257	r18258
137	137	{
138	138	2500000,
139	139	DEVCB_LINE_VCC,
140		DEVCB_LINE(mux_serial_b_w)
	140	DEVCB_DRIVER_LINE_MEMBER(victor9k_state,mux_serial_b_w)
141	141	}, {
142	142	2500000,
143	143	DEVCB_LINE_VCC,
144		DEVCB_LINE(mux_serial_a_w)
	144	DEVCB_DRIVER_LINE_MEMBER(victor9k_state,mux_serial_a_w)
145	145	}, {
146	146	100000,
147	147	DEVCB_LINE_VCC,

trunk/src/mess/drivers/nes.c

r18257	r18258
21	21	#include "formats/nes_dsk.h"
22	22
23	23
24		static READ8_DEVICE_HANDLER( psg_4015_r )
	24	READ8_MEMBER(nes_state::psg_4015_r)
25	25	{
	26	device_t *device = machine().device("nessound");
26	27	return nes_psg_r(device, space, 0x15);
27	28	}
28	29
29		static WRITE8_DEVICE_HANDLER( psg_4015_w )
	30	WRITE8_MEMBER(nes_state::psg_4015_w)
30	31	{
	32	device_t *device = machine().device("nessound");
31	33	nes_psg_w(device, space, 0x15, data);
32	34	}
33	35
34		static WRITE8_DEVICE_HANDLER( psg_4017_w )
	36	WRITE8_MEMBER(nes_state::psg_4017_w)
35	37	{
	38	device_t *device = machine().device("nessound");
36	39	nes_psg_w(device, space, 0x17, data);
37	40	}
38	41
r18257	r18258
46	49	AM_RANGE(0x2000, 0x3fff) AM_DEVREADWRITE("ppu", ppu2c0x_device, read, write)      /* PPU registers */
47	50	AM_RANGE(0x4000, 0x4013) AM_DEVREADWRITE_LEGACY("nessound", nes_psg_r, nes_psg_w)      /* PSG primary registers */
48	51	AM_RANGE(0x4014, 0x4014) AM_WRITE(nes_vh_sprite_dma_w)            /* stupid address space hole */
49		AM_RANGE(0x4015, 0x4015) AM_DEVREADWRITE_LEGACY("nessound", psg_4015_r, psg_4015_w)      /* PSG status / first control register */
	52	AM_RANGE(0x4015, 0x4015) AM_READWRITE(psg_4015_r, psg_4015_w)      /* PSG status / first control register */
50	53	AM_RANGE(0x4016, 0x4016) AM_READWRITE(nes_IN0_r, nes_IN0_w)         /* IN0 - input port 1 */
51	54	AM_RANGE(0x4017, 0x4017) AM_READ(nes_IN1_r)                     /* IN1 - input port 2 */
52		AM_RANGE(0x4017, 0x4017) AM_DEVWRITE_LEGACY("nessound", psg_4017_w)      /* PSG second control register */
	55	AM_RANGE(0x4017, 0x4017) AM_WRITE(psg_4017_w)      /* PSG second control register */
53	56	AM_RANGE(0x4100, 0x5fff) AM_READWRITE(nes_low_mapper_r, nes_low_mapper_w)   /* Perform unholy acts on the machine */
54	57	ADDRESS_MAP_END
55	58

trunk/src/mess/drivers/portfoli.c

r18257	r18258
649	649	//  HD61830_INTERFACE( lcdc_intf )
650	650	//-------------------------------------------------
651	651
652		static READ8_DEVICE_HANDLER( hd61830_rd_r )
	652	READ8_MEMBER(portfolio_state::hd61830_rd_r)
653	653	{
654	654	UINT16 address = ((offset & 0xff) << 3) | ((offset >> 12) & 0x07);
655		UINT8 data = space.machine().root_device().memregion(HD61830_TAG)->base()[address];
	655	UINT8 data = machine().root_device().memregion(HD61830_TAG)->base()[address];
656	656
657	657	return data;
658	658	}
r18257	r18258
660	660	static HD61830_INTERFACE( lcdc_intf )
661	661	{
662	662	SCREEN_TAG,
663		DEVCB_HANDLER(hd61830_rd_r)
	663	DEVCB_DRIVER_MEMBER(portfolio_state,hd61830_rd_r)
664	664	};
665	665
666	666	//-------------------------------------------------

trunk/src/mess/drivers/msx.c

r18257	r18258
341	341	ADDRESS_MAP_END
342	342
343	343
344		static WRITE8_DEVICE_HANDLER( msx_ay8910_w )
	344	WRITE8_MEMBER(msx_state::msx_ay8910_w)
345	345	{
	346	device_t *device = machine().device("ay8910");
346	347	if ( offset & 1 )
347	348	ay8910_data_w( device, space, offset, data );
348	349	else
r18257	r18258
355	356	ADDRESS_MAP_GLOBAL_MASK(0xff)
356	357	AM_RANGE( 0x77, 0x77) AM_WRITE(msx_90in1_w)
357	358	AM_RANGE( 0x7c, 0x7d) AM_WRITE(msx_fmpac_w)
358		AM_RANGE( 0x90, 0x90) AM_DEVREADWRITE_LEGACY("centronics", msx_printer_status_r, msx_printer_strobe_w)
359		AM_RANGE( 0x91, 0x91) AM_DEVWRITE_LEGACY("centronics", msx_printer_data_w)
360		AM_RANGE( 0xa0, 0xa7) AM_DEVREADWRITE_LEGACY("ay8910", ay8910_r, msx_ay8910_w)
	359	AM_RANGE( 0x90, 0x90) AM_READWRITE(msx_printer_status_r, msx_printer_strobe_w)
	360	AM_RANGE( 0x91, 0x91) AM_WRITE(msx_printer_data_w)
	361	AM_RANGE( 0xa0, 0xa7) AM_DEVREAD_LEGACY("ay8910", ay8910_r) AM_WRITE(msx_ay8910_w)
361	362	AM_RANGE( 0xa8, 0xab) AM_DEVREADWRITE("ppi8255", i8255_device, read, write)
362	363	AM_RANGE( 0x98, 0x98) AM_DEVREADWRITE("tms9928a", tms9928a_device, vram_read, vram_write)
363	364	AM_RANGE( 0x99, 0x99) AM_DEVREADWRITE("tms9928a", tms9928a_device, register_read, register_write)
r18257	r18258
370	371	ADDRESS_MAP_GLOBAL_MASK(0xff)
371	372	AM_RANGE( 0x77, 0x77) AM_WRITE(msx_90in1_w)
372	373	AM_RANGE( 0x7c, 0x7d) AM_WRITE(msx_fmpac_w)
373		AM_RANGE( 0x90, 0x90) AM_DEVREADWRITE_LEGACY("centronics", msx_printer_status_r, msx_printer_strobe_w)
374		AM_RANGE( 0x91, 0x91) AM_DEVWRITE_LEGACY("centronics", msx_printer_data_w)
375		AM_RANGE( 0xa0, 0xa7) AM_DEVREADWRITE_LEGACY("ay8910", ay8910_r, msx_ay8910_w)
	374	AM_RANGE( 0x90, 0x90) AM_READWRITE(msx_printer_status_r, msx_printer_strobe_w)
	375	AM_RANGE( 0x91, 0x91) AM_WRITE(msx_printer_data_w)
	376	AM_RANGE( 0xa0, 0xa7) AM_DEVREAD_LEGACY("ay8910", ay8910_r) AM_WRITE(msx_ay8910_w)
376	377	AM_RANGE( 0xa8, 0xab) AM_DEVREADWRITE("ppi8255", i8255_device, read, write)
377	378	AM_RANGE( 0x98, 0x9b) AM_DEVREADWRITE("v9938", v9938_device, read, write)
378	379	AM_RANGE( 0xb4, 0xb4) AM_WRITE(msx_rtc_latch_w)

trunk/src/mess/drivers/x1.c

r18257	r18258
1058	1058	{FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3}
1059	1059	};
1060	1060
1061		static WRITE_LINE_DEVICE_HANDLER( fdc_drq_w )
	1061	WRITE_LINE_MEMBER(x1_state::fdc_drq_w)
1062	1062	{
1063		z80dma_rdy_w(device->machine().device("dma"), state ^ 1);
	1063	z80dma_rdy_w(machine().device("dma"), state ^ 1);
1064	1064	}
1065	1065
1066	1066	static const wd17xx_interface x1turbo_mb8877a_interface =
1067	1067	{
1068	1068	DEVCB_NULL,
1069	1069	DEVCB_NULL,
1070		DEVCB_DEVICE_LINE("fdc", fdc_drq_w),
	1070	DEVCB_DRIVER_LINE_MEMBER(x1_state,fdc_drq_w),
1071	1071	{FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3}
1072	1072	};
1073	1073

trunk/src/mess/drivers/rmnimbus.c

r18257	r18258
90	90
91	91	static const centronics_interface nimbus_centronics_config =
92	92	{
93		DEVCB_DEVICE_LINE(VIA_TAG,nimbus_ack_w),
	93	DEVCB_DRIVER_LINE_MEMBER(rmnimbus_state, nimbus_ack_w),
94	94	DEVCB_NULL,
95	95	DEVCB_NULL
96	96	};

trunk/src/mess/drivers/cgenie.c

r18257	r18258
60	60
61	61	static ADDRESS_MAP_START (cgenie_io, AS_IO, 8, cgenie_state )
62	62	ADDRESS_MAP_GLOBAL_MASK(0xff)
63		AM_RANGE(0xf8, 0xf8) AM_DEVREADWRITE_LEGACY("ay8910", cgenie_sh_control_port_r, cgenie_sh_control_port_w )
	63	AM_RANGE(0xf8, 0xf8) AM_READWRITE(cgenie_sh_control_port_r, cgenie_sh_control_port_w )
64	64	AM_RANGE(0xf9, 0xf9) AM_DEVREADWRITE_LEGACY("ay8910", ay8910_r, ay8910_data_w )
65	65	AM_RANGE(0xfa, 0xfa) AM_READWRITE_LEGACY(cgenie_index_r, cgenie_index_w )
66	66	AM_RANGE(0xfb, 0xfb) AM_READWRITE_LEGACY(cgenie_register_r, cgenie_register_w )

trunk/src/mess/drivers/fmtowns.c

r18257	r18258
133	133	};
134	134
135	135
136		static WRITE_LINE_DEVICE_HANDLER( towns_pic_irq );
137	136
	137
138	138	INLINE UINT8 byte_to_bcd(UINT8 val)
139	139	{
140	140	return ((val / 10) << 4) | (val % 10);
r18257	r18258
1892	1892	state->m_scsi->fmscsi_data_w(data & 0xff);
1893	1893	}
1894	1894
1895		static WRITE_LINE_DEVICE_HANDLER( towns_scsi_irq )
	1895	WRITE_LINE_MEMBER(towns_state::towns_scsi_irq)
1896	1896	{
1897		towns_state* tstate = device->machine().driver_data<towns_state>();
1898		pic8259_ir0_w(tstate->m_pic_slave, state);
	1897	pic8259_ir0_w(m_pic_slave, state);
1899	1898	if(IRQ_LOG)
1900	1899	logerror("PIC: IRQ8 (SCSI) set to %i\n",state);
1901	1900	}
1902	1901
1903		static WRITE_LINE_DEVICE_HANDLER( towns_scsi_drq )
	1902	WRITE_LINE_MEMBER(towns_state::towns_scsi_drq)
1904	1903	{
1905		towns_state* tstate = device->machine().driver_data<towns_state>();
1906		upd71071_dmarq(tstate->m_dma_1,state,1);  // SCSI HDs use channel 1
	1904	upd71071_dmarq(m_dma_1,state,1);  // SCSI HDs use channel 1
1907	1905	}
1908	1906
1909	1907
r18257	r18258
2002	2000	}
2003	2001	}
2004	2002
2005		static WRITE_LINE_DEVICE_HANDLER( towns_pic_irq )
	2003	WRITE_LINE_MEMBER(towns_state::towns_pic_irq)
2006	2004	{
2007		device->machine().device("maincpu")->execute().set_input_line(0, state ? HOLD_LINE : CLEAR_LINE);
	2005	machine().device("maincpu")->execute().set_input_line(0, state ? HOLD_LINE : CLEAR_LINE);
2008	2006	//  logerror("PIC#1: set IRQ line to %i\n",interrupt);
2009	2007	}
2010	2008
2011		static WRITE_LINE_DEVICE_HANDLER( towns_pit_out0_changed )
	2009	WRITE_LINE_MEMBER(towns_state::towns_pit_out0_changed)
2012	2010	{
2013		towns_state* tstate = device->machine().driver_data<towns_state>();
2014		device_t* dev = tstate->m_pic_master;
	2011	device_t* dev = m_pic_master;
2015	2012
2016		if(tstate->m_towns_timer_mask & 0x01)
	2013	if(m_towns_timer_mask & 0x01)
2017	2014	{
2018		tstate->m_timer0 = state;
	2015	m_timer0 = state;
2019	2016	if(IRQ_LOG) logerror("PIC: IRQ0 (PIT Timer ch0) set to %i\n",state);
2020	2017	}
2021	2018	else
2022		tstate->m_timer0 = 0;
	2019	m_timer0 = 0;
2023	2020
2024		pic8259_ir0_w(dev, tstate->m_timer0 || tstate->m_timer1);
	2021	pic8259_ir0_w(dev, m_timer0 || m_timer1);
2025	2022	}
2026	2023
2027		static WRITE_LINE_DEVICE_HANDLER( towns_pit_out1_changed )
	2024	WRITE_LINE_MEMBER(towns_state::towns_pit_out1_changed)
2028	2025	{
2029		towns_state* tstate = device->machine().driver_data<towns_state>();
2030		device_t* dev = tstate->m_pic_master;
	2026	device_t* dev = m_pic_master;
2031	2027
2032		if(tstate->m_towns_timer_mask & 0x02)
	2028	if(m_towns_timer_mask & 0x02)
2033	2029	{
2034		tstate->m_timer1 = state;
	2030	m_timer1 = state;
2035	2031	if(IRQ_LOG) logerror("PIC: IRQ0 (PIT Timer ch1) set to %i\n",state);
2036	2032	}
2037	2033	else
2038		tstate->m_timer1 = 0;
	2034	m_timer1 = 0;
2039	2035
2040		pic8259_ir0_w(dev, tstate->m_timer0 || tstate->m_timer1);
	2036	pic8259_ir0_w(dev, m_timer0 || m_timer1);
2041	2037	}
2042	2038
2043	2039	WRITE_LINE_MEMBER( towns_state::pit_out2_changed )
r18257	r18258
2515	2511	{
2516	2512	307200,
2517	2513	DEVCB_NULL,
2518		DEVCB_LINE(towns_pit_out0_changed)
	2514	DEVCB_DRIVER_LINE_MEMBER(towns_state,towns_pit_out0_changed)
2519	2515	},
2520	2516	{
2521	2517	307200,
2522	2518	DEVCB_NULL,
2523		DEVCB_LINE(towns_pit_out1_changed)
	2519	DEVCB_DRIVER_LINE_MEMBER(towns_state,towns_pit_out1_changed)
2524	2520	},
2525	2521	{
2526	2522	307200,
r18257	r18258
2551	2547	}
2552	2548	};
2553	2549
2554		static READ8_DEVICE_HANDLER( get_slave_ack )
	2550	READ8_MEMBER(towns_state::get_slave_ack)
2555	2551	{
2556		towns_state* state = space.machine().driver_data<towns_state>();
2557	2552	if (offset==7) { // IRQ = 7
2558		return pic8259_acknowledge(state->m_pic_slave);
	2553	return pic8259_acknowledge(m_pic_slave);
2559	2554	}
2560	2555	return 0x00;
2561	2556	}
2562	2557	static const struct pic8259_interface towns_pic8259_master_config =
2563	2558	{
2564		DEVCB_LINE(towns_pic_irq),
	2559	DEVCB_DRIVER_LINE_MEMBER(towns_state,towns_pic_irq),
2565	2560	DEVCB_LINE_VCC,
2566		DEVCB_HANDLER(get_slave_ack)
	2561	DEVCB_DRIVER_MEMBER(towns_state,get_slave_ack)
2567	2562	};
2568	2563
2569	2564
r18257	r18258
2624	2619
2625	2620	static const FMSCSIinterface towns_scsi_config =
2626	2621	{
2627		DEVCB_LINE(towns_scsi_irq),
2628		DEVCB_LINE(towns_scsi_drq)
	2622	DEVCB_DRIVER_LINE_MEMBER(towns_state,towns_scsi_irq),
	2623	DEVCB_DRIVER_LINE_MEMBER(towns_state,towns_scsi_drq)
2629	2624	};
2630	2625
2631	2626	static const gfx_layout fnt_chars_16x16 =

trunk/src/mess/drivers/xerox820.c

r18257	r18258
557	557	m_ctc->trg0(0);
558	558	}
559	559
560		static WRITE_LINE_DEVICE_HANDLER( ctc_z0_w )
	560	WRITE_LINE_MEMBER(xerox820_state::ctc_z0_w)
561	561	{
	562	//   device_t *device = machine().device(Z80CTC_TAG);
562	563	//  z80ctc_trg1_w(device, state);
563	564	}
564	565
565		static WRITE_LINE_DEVICE_HANDLER( ctc_z2_w )
	566	WRITE_LINE_MEMBER(xerox820_state::ctc_z2_w)
566	567	{
	568	//   device_t *device = machine().device(Z80CTC_TAG);
	569
567	570	//  z80ctc_trg3_w(device, state);
568	571	}
569	572
570	573	static Z80CTC_INTERFACE( ctc_intf )
571	574	{
572	575	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),   /* interrupt handler */
573		DEVCB_DEVICE_LINE(Z80CTC_TAG, ctc_z0_w),      /* ZC/TO0 callback */
	576	DEVCB_DRIVER_LINE_MEMBER(xerox820_state,ctc_z0_w),      /* ZC/TO0 callback */
574	577	DEVCB_DEVICE_LINE_MEMBER(Z80CTC_TAG, z80ctc_device, trg2),   /* ZC/TO1 callback */
575		DEVCB_DEVICE_LINE(Z80CTC_TAG, ctc_z2_w)      /* ZC/TO2 callback */
	578	DEVCB_DRIVER_LINE_MEMBER(xerox820_state,ctc_z2_w)      /* ZC/TO2 callback */
576	579	};
577	580
578	581	/* Z80 Daisy Chain */

trunk/src/mess/drivers/nascom1.c

r18257	r18258
257	257	AY_3_1015,
258	258	( XTAL_16MHz / 16 ) / 256,
259	259	( XTAL_16MHz / 16 ) / 256,
260		DEVCB_HANDLER(nascom1_hd6402_si),
261		DEVCB_HANDLER(nascom1_hd6402_so),
	260	DEVCB_DRIVER_MEMBER(nascom1_state, nascom1_hd6402_si),
	261	DEVCB_DRIVER_MEMBER(nascom1_state, nascom1_hd6402_so),
262	262	DEVCB_NULL
263	263	};
264	264

trunk/src/mess/drivers/kaypro.c

r18257	r18258
50	50	ADDRESS_MAP_GLOBAL_MASK(0xff)
51	51	ADDRESS_MAP_UNMAP_HIGH
52	52	AM_RANGE(0x00, 0x03) AM_DEVWRITE("brg", com8116_device, stt_w)
53		AM_RANGE(0x04, 0x07) AM_DEVREADWRITE_LEGACY("z80sio", kaypro_sio_r, kaypro_sio_w)
	53	AM_RANGE(0x04, 0x07) AM_READWRITE(kaypro_sio_r, kaypro_sio_w)
54	54	AM_RANGE(0x08, 0x0b) AM_DEVREADWRITE("z80pio_g", z80pio_device, read_alt, write_alt)
55	55	AM_RANGE(0x0c, 0x0f) AM_DEVWRITE("brg", com8116_device, str_w)
56	56	AM_RANGE(0x10, 0x13) AM_DEVREADWRITE_LEGACY("wd1793", wd17xx_r, wd17xx_w)
r18257	r18258
61	61	ADDRESS_MAP_GLOBAL_MASK(0xff)
62	62	ADDRESS_MAP_UNMAP_HIGH
63	63	AM_RANGE(0x00, 0x03) AM_DEVWRITE("brg", com8116_device, str_w)
64		AM_RANGE(0x04, 0x07) AM_DEVREADWRITE_LEGACY("z80sio", kaypro_sio_r, kaypro_sio_w)
	64	AM_RANGE(0x04, 0x07) AM_READWRITE(kaypro_sio_r, kaypro_sio_w)
65	65	AM_RANGE(0x08, 0x0b) AM_DEVWRITE("brg", com8116_device, stt_w)
66	66	AM_RANGE(0x0c, 0x0f) AM_DEVREADWRITE("z80sio_2x", z80sio_device, read, write)
67	67	AM_RANGE(0x10, 0x13) AM_DEVREADWRITE_LEGACY("wd1793", wd17xx_r, wd17xx_w)

trunk/src/mess/drivers/mtx.c

r18257	r18258
56	56
57	57	static ADDRESS_MAP_START( mtx_io, AS_IO, 8, mtx_state )
58	58	ADDRESS_MAP_GLOBAL_MASK(0xff)
59		AM_RANGE(0x00, 0x00) AM_DEVREAD_LEGACY(CENTRONICS_TAG, mtx_strobe_r) AM_WRITE(mtx_bankswitch_w)
	59	AM_RANGE(0x00, 0x00) AM_READWRITE(mtx_strobe_r, mtx_bankswitch_w)
60	60	AM_RANGE(0x01, 0x01) AM_DEVREADWRITE("tms9929a", tms9929a_device, vram_read, vram_write)
61	61	AM_RANGE(0x02, 0x02) AM_DEVREADWRITE("tms9929a", tms9929a_device, register_read, register_write)
62		AM_RANGE(0x03, 0x03) AM_READ(mtx_sound_strobe_r) AM_DEVWRITE_LEGACY(CASSETTE_TAG, mtx_cst_w)
63		AM_RANGE(0x04, 0x04) AM_DEVREAD_LEGACY(CENTRONICS_TAG, mtx_prt_r)
	62	AM_RANGE(0x03, 0x03) AM_READWRITE(mtx_sound_strobe_r, mtx_cst_w)
	63	AM_RANGE(0x04, 0x04) AM_READ(mtx_prt_r)
64	64	AM_RANGE(0x04, 0x04) AM_DEVWRITE(CENTRONICS_TAG, centronics_device, write)
65	65	AM_RANGE(0x05, 0x05) AM_READWRITE(mtx_key_lo_r, mtx_sense_w)
66	66	AM_RANGE(0x06, 0x06) AM_READWRITE(mtx_key_hi_r, mtx_sound_latch_w)
r18257	r18258
218	218	m_z80ctc->trg2(0);
219	219	}
220	220
221		static WRITE_LINE_DEVICE_HANDLER( ctc_trg1_w )
	221	WRITE_LINE_MEMBER(mtx_state::ctc_trg1_w)
222	222	{
223		mtx_state *driver_state = device->machine().driver_data<mtx_state>();
224
225		if (driver_state->m_z80dart != NULL)
	223	if (m_z80dart != NULL)
226	224	{
227		z80dart_rxca_w(driver_state->m_z80dart, state);
228		z80dart_txca_w(driver_state->m_z80dart, state);
	225	z80dart_rxca_w(m_z80dart, state);
	226	z80dart_txca_w(m_z80dart, state);
229	227	}
230	228	}
231	229
232		static WRITE_LINE_DEVICE_HANDLER( ctc_trg2_w )
	230	WRITE_LINE_MEMBER(mtx_state::ctc_trg2_w)
233	231	{
234		mtx_state *driver_state = device->machine().driver_data<mtx_state>();
235
236		if (driver_state->m_z80dart != NULL)
	232	if (m_z80dart != NULL)
237	233	{
238		z80dart_rxtxcb_w(driver_state->m_z80dart, state);
	234	z80dart_rxtxcb_w(m_z80dart, state);
239	235	}
240	236	}
241	237
r18257	r18258
243	239	{
244	240	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),
245	241	DEVCB_NULL,
246		DEVCB_LINE(ctc_trg1_w),
247		DEVCB_LINE(ctc_trg2_w)
	242	DEVCB_DRIVER_LINE_MEMBER(mtx_state,ctc_trg1_w),
	243	DEVCB_DRIVER_LINE_MEMBER(mtx_state,ctc_trg2_w)
248	244	};
249	245
250	246	/*-------------------------------------------------
r18257	r18258
320	316	mtx_tms9928a_interface
321	317	-------------------------------------------------*/
322	318
323		static WRITE_LINE_DEVICE_HANDLER(mtx_tms9929a_interrupt)
	319	WRITE_LINE_MEMBER(mtx_state::mtx_tms9929a_interrupt)
324	320	{
325		mtx_state *drv_state = device->machine().driver_data<mtx_state>();
326
327		drv_state->m_z80ctc->trg0(state ? 0 : 1);
	321	m_z80ctc->trg0(state ? 0 : 1);
328	322	}
329	323
330	324	static TMS9928A_INTERFACE(mtx_tms9928a_interface)
331	325	{
332	326	"screen",
333	327	0x4000,
334		DEVCB_LINE(mtx_tms9929a_interrupt)
	328	DEVCB_DRIVER_LINE_MEMBER(mtx_state,mtx_tms9929a_interrupt)
335	329	};
336	330
337	331	/*-------------------------------------------------

trunk/src/mess/drivers/amstrad.c

r18257	r18258
126	126	-----------------------------*/
127	127	static I8255_INTERFACE( amstrad_ppi8255_interface )
128	128	{
129		DEVCB_HANDLER(amstrad_ppi_porta_r),   /* port A read */
130		DEVCB_HANDLER(amstrad_ppi_porta_w),   /* port A write */
131		DEVCB_HANDLER(amstrad_ppi_portb_r),   /* port B read */
	129	DEVCB_DRIVER_MEMBER(amstrad_state,amstrad_ppi_porta_r),   /* port A read */
	130	DEVCB_DRIVER_MEMBER(amstrad_state,amstrad_ppi_porta_w),   /* port A write */
	131	DEVCB_DRIVER_MEMBER(amstrad_state,amstrad_ppi_portb_r),   /* port B read */
132	132	DEVCB_NULL,                     /* port B write */
133	133	DEVCB_NULL,                     /* port C read */
134		DEVCB_HANDLER(amstrad_ppi_portc_w)   /* port C write */
	134	DEVCB_DRIVER_MEMBER(amstrad_state,amstrad_ppi_portc_w)   /* port C write */
135	135	};
136	136
137	137
r18257	r18258
148	148	/* Aleste uses an 8272A, with the interrupt flag visible on PPI port B */
149	149	static const upd765_interface aleste_8272_interface =
150	150	{
151		DEVCB_LINE(aleste_interrupt),
	151	DEVCB_DRIVER_LINE_MEMBER(amstrad_state,aleste_interrupt),
152	152	DEVCB_NULL,
153	153	NULL,
154	154	UPD765_RDY_PIN_CONNECTED,

trunk/src/mess/drivers/kyocera.c

r18257	r18258
1269	1269	NULL
1270	1270	};
1271	1271
1272		static WRITE_LINE_DEVICE_HANDLER( kc85_sod_w )
	1272	WRITE_LINE_MEMBER(kc85_state::kc85_sod_w)
1273	1273	{
	1274	device_t *device = machine().device(CASSETTE_TAG);
1274	1275	dynamic_cast<cassette_image_device *>(device)->output(state ? +1.0 : -1.0);
1275	1276	}
1276	1277
1277		static READ_LINE_DEVICE_HANDLER( kc85_sid_r )
	1278	READ_LINE_MEMBER(kc85_state::kc85_sid_r)
1278	1279	{
	1280	device_t *device = machine().device(CASSETTE_TAG);
1279	1281	return dynamic_cast<cassette_image_device *>(device)->input() > 0.0;
1280	1282	}
1281	1283
r18257	r18258
1283	1285	{
1284	1286	DEVCB_NULL,            /* STATUS changed callback */
1285	1287	DEVCB_NULL,            /* INTE changed callback */
1286		DEVCB_DEVICE_LINE(CASSETTE_TAG, kc85_sid_r),   /* SID changed callback (I8085A only) */
1287		DEVCB_DEVICE_LINE(CASSETTE_TAG, kc85_sod_w)   /* SOD changed callback (I8085A only) */
	1288	DEVCB_DRIVER_LINE_MEMBER(kc85_state,kc85_sid_r),   /* SID changed callback (I8085A only) */
	1289	DEVCB_DRIVER_LINE_MEMBER(kc85_state,kc85_sod_w)   /* SOD changed callback (I8085A only) */
1288	1290	};
1289	1291
1290	1292	TIMER_DEVICE_CALLBACK_MEMBER(tandy200_state::tandy200_tp_tick)

trunk/src/mess/drivers/enterp.c

r18257	r18258
98	98
99	99
100	100	/* EP specific handling of dave register write */
101		static WRITE8_DEVICE_HANDLER( enterprise_dave_reg_write )
	101	WRITE8_MEMBER(ep_state::enterprise_dave_reg_write)
102	102	{
103		ep_state *ep = space.machine().driver_data<ep_state>();
104
105	103	switch (offset)
106	104	{
107	105	case 0x10:
108	106	case 0x11:
109	107	case 0x12:
110	108	case 0x13:
111		enterprise_update_memory_page(space.machine().device("maincpu")->memory().space(AS_PROGRAM), offset - 0x0f, data);
	109	enterprise_update_memory_page(machine().device("maincpu")->memory().space(AS_PROGRAM), offset - 0x0f, data);
112	110	break;
113	111
114	112	case 0x15:
115		ep->keyboard_line = data & 15;
	113	keyboard_line = data & 15;
116	114	break;
117	115	}
118	116	}
119	117
120	118
121		static READ8_DEVICE_HANDLER( enterprise_dave_reg_read )
	119	READ8_MEMBER(ep_state::enterprise_dave_reg_read)
122	120	{
123	121	static const char *const keynames[] =
124	122	{
r18257	r18258
126	124	"LINE5", "LINE6", "LINE7", "LINE8", "LINE9"
127	125	};
128	126
129		ep_state *ep = space.machine().driver_data<ep_state>();
130
131	127	switch (offset)
132	128	{
133	129	case 0x015:
134	130	/* read keyboard line */
135		dave_set_reg(device, 0x015, space.machine().root_device().ioport(keynames[ep->keyboard_line])->read());
	131	dave_set_reg(machine().device("custom"), 0x015, machine().root_device().ioport(keynames[keyboard_line])->read());
136	132	break;
137	133
138	134	case 0x016:
139	135	{
140	136	int ExternalJoystickInputs;
141		int ExternalJoystickPortInput = space.machine().root_device().ioport("JOY1")->read();
	137	int ExternalJoystickPortInput = machine().root_device().ioport("JOY1")->read();
142	138
143		if (ep->keyboard_line <= 4)
	139	if (keyboard_line <= 4)
144	140	{
145		ExternalJoystickInputs = ExternalJoystickPortInput>>(4-(ep->keyboard_line));
	141	ExternalJoystickInputs = ExternalJoystickPortInput>>(4-(keyboard_line));
146	142	}
147	143	else
148	144	{
149	145	ExternalJoystickInputs = 1;
150	146	}
151	147
152		dave_set_reg(device, 0x016, (0x0fe | (ExternalJoystickInputs & 0x01)));
	148	dave_set_reg(machine().device("custom"), 0x016, (0x0fe | (ExternalJoystickInputs & 0x01)));
153	149	}
154	150	break;
155	151
r18257	r18258
164	160	whats going on. */
165	161	static const dave_interface enterprise_dave_interface =
166	162	{
167		DEVCB_HANDLER(enterprise_dave_reg_read),
168		DEVCB_HANDLER(enterprise_dave_reg_write),
	163	DEVCB_DRIVER_MEMBER(ep_state,enterprise_dave_reg_read),
	164	DEVCB_DRIVER_MEMBER(ep_state,enterprise_dave_reg_write),
169	165	DEVCB_CPU_INPUT_LINE("maincpu", 0)
170	166	};
171	167
r18257	r18258
180	176	FLOPPY/EXDOS
181	177	***************************************************************************/
182	178
183		static WRITE_LINE_DEVICE_HANDLER( enterp_wd1770_intrq_w )
	179	WRITE_LINE_MEMBER(ep_state::enterp_wd1770_intrq_w)
184	180	{
185		ep_state *ep = device->machine().driver_data<ep_state>();
186
187	181	if (state)
188		ep->exdos_card_value |= 0x02;
	182	exdos_card_value |= 0x02;
189	183	else
190		ep->exdos_card_value &= ~0x02;
	184	exdos_card_value &= ~0x02;
191	185	}
192	186
193		static WRITE_LINE_DEVICE_HANDLER( enterp_wd1770_drq_w )
	187	WRITE_LINE_MEMBER(ep_state::enterp_wd1770_drq_w)
194	188	{
195		ep_state *ep = device->machine().driver_data<ep_state>();
196
197	189	if (state)
198		ep->exdos_card_value |= 0x80;
	190	exdos_card_value |= 0x80;
199	191	else
200		ep->exdos_card_value &= ~0x80;
	192	exdos_card_value &= ~0x80;
201	193	}
202	194
203	195
r18257	r18258
417	409	static const wd17xx_interface enterp_wd1770_interface =
418	410	{
419	411	DEVCB_NULL,
420		DEVCB_LINE(enterp_wd1770_intrq_w),
421		DEVCB_LINE(enterp_wd1770_drq_w),
	412	DEVCB_DRIVER_LINE_MEMBER(ep_state,enterp_wd1770_intrq_w),
	413	DEVCB_DRIVER_LINE_MEMBER(ep_state,enterp_wd1770_drq_w),
422	414	{FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3}
423	415	};
424	416

trunk/src/mess/drivers/coleco.c

r18257	r18258
165	165
166	166	/* Interrupts */
167	167
168		static WRITE_LINE_DEVICE_HANDLER(coleco_vdp_interrupt)
	168	WRITE_LINE_MEMBER(coleco_state::coleco_vdp_interrupt)
169	169	{
170		coleco_state *drvstate = device->machine().driver_data<coleco_state>();
171
172	170	// NMI on rising edge
173		if (state && !drvstate->m_last_nmi_state)
174		drvstate->m_maincpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
	171	if (state && !m_last_nmi_state)
	172	m_maincpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
175	173
176		drvstate->m_last_nmi_state = state;
	174	m_last_nmi_state = state;
177	175	}
178	176
179	177	TIMER_CALLBACK_MEMBER(coleco_state::paddle_d7reset_callback)
r18257	r18258
240	238	{
241	239	"screen",
242	240	0x4000,
243		DEVCB_LINE(coleco_vdp_interrupt)
	241	DEVCB_DRIVER_LINE_MEMBER(coleco_state,coleco_vdp_interrupt)
244	242	};
245	243
246	244

trunk/src/mess/drivers/ql.c

r18257	r18258
364	364	}
365	365	}
366	366
367		static READ_LINE_DEVICE_HANDLER( disk_io_dden_r )
	367	READ_LINE_MEMBER(ql_state::disk_io_dden_r)
368	368	{
369		ql_state *state = device->machine().driver_data<ql_state>();
370
371		if(state->m_disk_type==DISK_TYPE_SANDY)
372		return ((state->m_disk_io_byte & SANDY_DDEN_MASK) >> SANDY_DDEN_SHIFT);
	369	if(m_disk_type==DISK_TYPE_SANDY)
	370	return ((m_disk_io_byte & SANDY_DDEN_MASK) >> SANDY_DDEN_SHIFT);
373	371	else
374	372	return 0;
375	373	}
376	374
377		static WRITE_LINE_DEVICE_HANDLER( disk_io_intrq_w )
	375	WRITE_LINE_MEMBER(ql_state::disk_io_intrq_w)
378	376	{
379	377	//logerror("DiskIO:intrq = %d\n",state);
380	378	}
381	379
382		static WRITE_LINE_DEVICE_HANDLER( disk_io_drq_w )
	380	WRITE_LINE_MEMBER(ql_state::disk_io_drq_w)
383	381	{
384	382	//logerror("DiskIO:drq = %d\n",state);
385	383	}
r18257	r18258
846	844
847	845	wd17xx_interface ql_wd17xx_interface =
848	846	{
849		DEVCB_LINE(disk_io_dden_r),
850		DEVCB_LINE(disk_io_intrq_w),
851		DEVCB_LINE(disk_io_drq_w),
	847	DEVCB_DRIVER_LINE_MEMBER(ql_state,disk_io_dden_r),
	848	DEVCB_DRIVER_LINE_MEMBER(ql_state,disk_io_intrq_w),
	849	DEVCB_DRIVER_LINE_MEMBER(ql_state,disk_io_drq_w),
852	850	{FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3}
853	851	};
854	852

trunk/src/mess/drivers/pce.c

r18257	r18258
501	501	}
502	502
503	503
504		static WRITE_LINE_DEVICE_HANDLER( pce_irq_changed )
	504	WRITE_LINE_MEMBER(pce_state::pce_irq_changed)
505	505	{
506		device->machine().device("maincpu")->execute().set_input_line(0, state);
	506	machine().device("maincpu")->execute().set_input_line(0, state);
507	507	}
508	508
509	509
510	510	static const huc6270_interface pce_huc6270_config =
511	511	{
512	512	0x10000,
513		DEVCB_LINE(pce_irq_changed)
	513	DEVCB_DRIVER_LINE_MEMBER(pce_state,pce_irq_changed)
514	514	};
515	515
516	516
r18257	r18258
527	527	static const huc6270_interface sgx_huc6270_0_config =
528	528	{
529	529	0x10000,
530		DEVCB_LINE(pce_irq_changed)
	530	DEVCB_DRIVER_LINE_MEMBER(pce_state,pce_irq_changed)
531	531	};
532	532
533	533
534	534	static const huc6270_interface sgx_huc6270_1_config =
535	535	{
536	536	0x10000,
537		DEVCB_LINE(pce_irq_changed)
	537	DEVCB_DRIVER_LINE_MEMBER(pce_state,pce_irq_changed)
538	538	};
539	539
540	540

trunk/src/mess/drivers/ob68k1a.c

r18257	r18258
251	251	//  COM8116_INTERFACE( dbrg_intf )
252	252	//-------------------------------------------------
253	253
254		static WRITE_LINE_DEVICE_HANDLER( rx_tx_w )
	254	WRITE_LINE_MEMBER(ob68k1a_state::rx_tx_0_w)
255	255	{
	256	device_t *device = machine().device(MC6850_0_TAG);
256	257	downcast<acia6850_device *>(device)->rx_clock_in();
257	258	downcast<acia6850_device *>(device)->tx_clock_in();
258	259	}
259	260
	261	WRITE_LINE_MEMBER(ob68k1a_state::rx_tx_1_w)
	262	{
	263	device_t *device = machine().device(MC6850_1_TAG);
	264	downcast<acia6850_device *>(device)->rx_clock_in();
	265	downcast<acia6850_device *>(device)->tx_clock_in();
	266	}
	267
260	268	static COM8116_INTERFACE( dbrg_intf )
261	269	{
262	270	DEVCB_NULL,      /* fX/4 output */
263		DEVCB_DEVICE_LINE(MC6850_0_TAG, rx_tx_w),
264		DEVCB_DEVICE_LINE(MC6850_1_TAG, rx_tx_w),
	271	DEVCB_DRIVER_LINE_MEMBER(ob68k1a_state,rx_tx_0_w),
	272	DEVCB_DRIVER_LINE_MEMBER(ob68k1a_state,rx_tx_1_w),
265	273	{ 101376, 67584, 46080, 37686, 33792, 16896, 8448, 4224, 2816, 2534, 2112, 1408, 1056, 704, 528, 264 },         /* receiver divisor ROM */
266	274	{ 101376, 67584, 46080, 37686, 33792, 16896, 8448, 4224, 2816, 2534, 2112, 1408, 1056, 704, 528, 264 },         /* transmitter divisor ROM */
267	275	};

trunk/src/mess/drivers/bw12.c

r18257	r18258
541	541
542	542	/* PIT8253 Interface */
543	543
544		static WRITE_LINE_DEVICE_HANDLER( pit_out0_w )
	544	WRITE_LINE_MEMBER(bw12_state::pit_out0_w)
545	545	{
	546	device_t *device = machine().device("DEVCB_DRIVER_LINE_MEMBER(Z80SIO_TAG, bw12_state,pit_out0_w)");
546	547	z80dart_txca_w(device, state);
547	548	z80dart_rxca_w(device, state);
548	549	}
r18257	r18258
558	559	{
559	560	XTAL_1_8432MHz,
560	561	DEVCB_NULL,
561		DEVCB_DEVICE_LINE(Z80SIO_TAG, pit_out0_w)
	562	DEVCB_DRIVER_LINE_MEMBER(bw12_state,pit_out0_w)
562	563	},
563	564	{
564	565	XTAL_1_8432MHz,

trunk/src/mess/drivers/pokemini.c

r18257	r18258
13	13	static ADDRESS_MAP_START( pokemini_mem_map, AS_PROGRAM, 8, pokemini_state )
14	14	AM_RANGE( 0x000000, 0x000FFF )  AM_ROM                     /* bios */
15	15	AM_RANGE( 0x001000, 0x001FFF )   AM_RAM AM_SHARE("p_ram")            /* VRAM/RAM */
16		AM_RANGE( 0x002000, 0x0020FF )  AM_DEVREADWRITE_LEGACY("i2cmem", pokemini_hwreg_r, pokemini_hwreg_w )   /* hardware registers */
	16	AM_RANGE( 0x002000, 0x0020FF )  AM_READWRITE(pokemini_hwreg_r, pokemini_hwreg_w )   /* hardware registers */
17	17	AM_RANGE( 0x002100, 0x1FFFFF )  AM_ROM                     /* cartridge area */
18	18	ADDRESS_MAP_END
19	19

trunk/src/mess/drivers/tandy2k.c

r18257	r18258
195	195	}
196	196	}
197	197
198		static READ8_DEVICE_HANDLER( fldtc_r )
	198	READ8_MEMBER(tandy2k_state::fldtc_r)
199	199	{
	200	device_t *device = machine().device("AM_RANGE(0x00004, 0x00005) AM_READWRITE8(I8272A_TAG, fldtc_r, fldtc_w, 0x00ff)");
200	201	upd765_tc_w(device, 1);
201	202	upd765_tc_w(device, 0);
202	203
203	204	return 0;
204	205	}
205	206
206		static WRITE8_DEVICE_HANDLER( fldtc_w )
	207	WRITE8_MEMBER(tandy2k_state::fldtc_w)
207	208	{
	209	device_t *device = machine().device(I8272A_TAG);
208	210	upd765_tc_w(device, 1);
209	211	upd765_tc_w(device, 0);
210	212	}
r18257	r18258
269	271	ADDRESS_MAP_UNMAP_HIGH
270	272	AM_RANGE(0x00000, 0x00001) AM_READWRITE8(enable_r, enable_w, 0x00ff)
271	273	AM_RANGE(0x00002, 0x00003) AM_WRITE8(dma_mux_w, 0x00ff)
272		AM_RANGE(0x00004, 0x00005) AM_DEVREADWRITE8_LEGACY(I8272A_TAG, fldtc_r, fldtc_w, 0x00ff)
	274	AM_RANGE(0x00004, 0x00005) AM_READWRITE8(fldtc_r, fldtc_w, 0x00ff)
273	275	AM_RANGE(0x00010, 0x00013) AM_DEVREADWRITE8(I8251A_TAG, i8251_device, data_r, data_w, 0x00ff)
274	276	AM_RANGE(0x00030, 0x00031) AM_DEVREAD8_LEGACY(I8272A_TAG, upd765_status_r, 0x00ff)
275	277	AM_RANGE(0x00032, 0x00033) AM_DEVREADWRITE8_LEGACY(I8272A_TAG, upd765_data_r, upd765_data_w, 0x00ff)

trunk/src/mess/drivers/huebler.c

r18257	r18258
247	247
248	248	/* Z80-CTC Interface */
249	249
250		static WRITE_LINE_DEVICE_HANDLER( ctc_z0_w )
	250	WRITE_LINE_MEMBER(amu880_state::ctc_z0_w)
251	251	{
252	252	}
253	253
254		static WRITE_LINE_DEVICE_HANDLER( ctc_z2_w )
	254	WRITE_LINE_MEMBER(amu880_state::ctc_z2_w)
255	255	{
256	256	/* cassette transmit/receive clock */
257	257	}
r18257	r18258
259	259	static Z80CTC_INTERFACE( ctc_intf )
260	260	{
261	261	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),   /* interrupt handler */
262		DEVCB_LINE(ctc_z0_w),   /* ZC/TO0 callback */
	262	DEVCB_DRIVER_LINE_MEMBER(amu880_state,ctc_z0_w),   /* ZC/TO0 callback */
263	263	DEVCB_DEVICE_LINE(Z80SIO_TAG, z80dart_rxtxcb_w),   /* ZC/TO1 callback */
264		DEVCB_LINE(ctc_z2_w)   /* ZC/TO2 callback */
	264	DEVCB_DRIVER_LINE_MEMBER(amu880_state,ctc_z2_w)   /* ZC/TO2 callback */
265	265	};
266	266
267	267	/* Z80-PIO Interface */
r18257	r18258
290	290
291	291	/* Z80-SIO Interface */
292	292
293		static READ_LINE_DEVICE_HANDLER( cassette_r )
	293	READ_LINE_MEMBER(amu880_state::cassette_r)
294	294	{
	295	device_t *device = machine().device(CASSETTE_TAG);
295	296	cassette_image_device* dev = dynamic_cast<cassette_image_device*>(device);
296	297	return dev->input() < 0.0;
297	298	}
298	299
299		static WRITE_LINE_DEVICE_HANDLER( cassette_w )
	300	WRITE_LINE_MEMBER(amu880_state::cassette_w)
300	301	{
	302	device_t *device = machine().device(CASSETTE_TAG);
301	303	cassette_image_device* dev = dynamic_cast<cassette_image_device*>(device);
302	304	dev->output(state ? -1.0 : +1.0);
303	305	}
r18257	r18258
306	308	{
307	309	0, 0, 0, 0,
308	310
309		DEVCB_DEVICE_LINE(CASSETTE_TAG, cassette_r),
310		DEVCB_DEVICE_LINE(CASSETTE_TAG, cassette_w),
	311	DEVCB_DRIVER_LINE_MEMBER(amu880_state, cassette_r),
	312	DEVCB_DRIVER_LINE_MEMBER(amu880_state, cassette_w),
311	313	DEVCB_NULL,
312	314	DEVCB_NULL,
313	315	DEVCB_NULL,

trunk/src/mess/drivers/bbc.c

r18257	r18258
717	717	};
718	718
719	719
720		static WRITE_LINE_DEVICE_HANDLER(bbcb_ack_w)
	720	WRITE_LINE_MEMBER(bbc_state::bbcb_ack_w)
721	721	{
722		via6522_device *via_1 = device->machine().device<via6522_device>("via6522_1");
	722	via6522_device *via_1 = machine().device<via6522_device>("via6522_1");
723	723	via_1->write_ca1(!state); /* ack seems to be inverted? */
724	724	}
725	725
726	726	static const centronics_interface bbcb_centronics_config =
727	727	{
728		DEVCB_DEVICE_LINE("via6522_1",bbcb_ack_w),
	728	DEVCB_DRIVER_LINE_MEMBER(bbc_state,bbcb_ack_w),
729	729	DEVCB_NULL,
730	730	DEVCB_NULL
731	731	};
732	732
733		static WRITE_LINE_DEVICE_HANDLER( bbcb_acia6850_irq_w )
	733	WRITE_LINE_MEMBER(bbc_state::bbcb_acia6850_irq_w)
734	734	{
735		bbc_state *driver_state = device->machine().driver_data<bbc_state>();
736		driver_state->m_acia_irq = state;
	735	m_acia_irq = state;
737	736
738		driver_state->check_interrupts();
	737	check_interrupts();
739	738	}
740	739
741	740	static ACIA6850_INTERFACE( bbc_acia6850_interface )
r18257	r18258
747	746	DEVCB_NULL,
748	747	DEVCB_NULL,
749	748	DEVCB_NULL,
750		DEVCB_LINE(bbcb_acia6850_irq_w)
	749	DEVCB_DRIVER_LINE_MEMBER(bbc_state,bbcb_acia6850_irq_w)
751	750	};
752	751
753	752	static LEGACY_FLOPPY_OPTIONS_START(bbc)
r18257	r18258
798	797	DEVCB_NULL
799	798	};
800	799
801		static WRITE_LINE_DEVICE_HANDLER( econet_clk_w )
	800	WRITE_LINE_MEMBER(bbc_state::econet_clk_w)
802	801	{
	802	device_t *device = machine().device("mc6854");
803	803	mc6854_rxc_w(device, state);
804	804	mc6854_txc_w(device, state);
805	805	}
806	806
807	807	static ECONET_INTERFACE( econet_intf )
808	808	{
809		DEVCB_DEVICE_LINE("mc6854", econet_clk_w),
	809	DEVCB_DRIVER_LINE_MEMBER(bbc_state,econet_clk_w),
810	810	DEVCB_NULL
811	811	};
812	812

trunk/src/mess/drivers/v1050.c

r18257	r18258
594	594
595	595	// 8214 Interface
596	596
597		static WRITE_LINE_DEVICE_HANDLER( pic_int_w )
	597	WRITE_LINE_MEMBER(v1050_state::pic_int_w)
598	598	{
599	599	if (state == ASSERT_LINE)
600	600	{
601		device->execute().set_input_line(INPUT_LINE_IRQ0, ASSERT_LINE);
	601	execute().set_input_line(INPUT_LINE_IRQ0, ASSERT_LINE);
602	602	}
603	603	}
604	604
605	605	static I8214_INTERFACE( pic_intf )
606	606	{
607		DEVCB_DEVICE_LINE(Z80_TAG, pic_int_w),
	607	DEVCB_DRIVER_LINE_MEMBER(v1050_state,pic_int_w),
608	608	DEVCB_NULL
609	609	};
610	610
r18257	r18258
617	617
618	618	// Display 8255A Interface
619	619
620		static WRITE8_DEVICE_HANDLER( disp_ppi_pc_w )
	620	WRITE8_MEMBER(v1050_state::disp_ppi_pc_w)
621	621	{
	622	device_t *device = machine().device(I8255A_M6502_TAG);
622	623	i8255_device *ppi = static_cast<i8255_device*>(device);
623	624
624	625	ppi->pc2_w(BIT(data, 6));
r18257	r18258
632	633	DEVCB_NULL,                     // Port B read
633	634	DEVCB_NULL,                     // Port B write
634	635	DEVCB_NULL,                     // Port C read
635		DEVCB_DEVICE_HANDLER(I8255A_M6502_TAG, disp_ppi_pc_w)      // Port C write
	636	DEVCB_DRIVER_MEMBER(v1050_state,disp_ppi_pc_w)      // Port C write
636	637	};
637	638
638		static WRITE8_DEVICE_HANDLER( m6502_ppi_pc_w )
	639	WRITE8_MEMBER(v1050_state::m6502_ppi_pc_w)
639	640	{
	641	device_t *device = machine().device(I8255A_DISP_TAG);
640	642	i8255_device *ppi = static_cast<i8255_device*>(device);
641	643
642	644	ppi->pc2_w(BIT(data, 7));
r18257	r18258
650	652	DEVCB_NULL,                     // Port B read
651	653	DEVCB_NULL,                     // Port B write
652	654	DEVCB_NULL,                     // Port C read
653		DEVCB_DEVICE_HANDLER(I8255A_DISP_TAG, m6502_ppi_pc_w)   // Port C write
	655	DEVCB_DRIVER_MEMBER(v1050_state,m6502_ppi_pc_w)   // Port C write
654	656	};
655	657
656	658	// Miscellanous 8255A Interface
r18257	r18258
693	695	wd17xx_dden_w(m_fdc, BIT(data, 7));
694	696	}
695	697
696		static WRITE8_DEVICE_HANDLER( misc_ppi_pb_w )
	698	WRITE8_MEMBER(v1050_state::misc_ppi_pb_w)
697	699	{
698		centronics_device *centronics = space.machine().device<centronics_device>(CENTRONICS_TAG);
699		centronics->write( space.machine().driver_data()->generic_space() , 0, ~data & 0xff);
	700	centronics_device *centronics = machine().device<centronics_device>(CENTRONICS_TAG);
	701	centronics->write( machine().driver_data()->generic_space() , 0, ~data & 0xff);
700	702	}
701	703
702		static READ8_DEVICE_HANDLER( misc_ppi_pc_r )
	704	READ8_MEMBER(v1050_state::misc_ppi_pc_r)
703	705	{
704	706	/*
705	707
r18257	r18258
717	719	*/
718	720
719	721	UINT8 data = 0;
720		centronics_device *centronics = space.machine().device<centronics_device>(CENTRONICS_TAG);
	722	centronics_device *centronics = machine().device<centronics_device>(CENTRONICS_TAG);
721	723	data |= centronics->not_busy_r() << 4;
722	724	data |= centronics->pe_r() << 5;
723	725
r18257	r18258
779	781	DEVCB_NULL,                     // Port A read
780	782	DEVCB_DRIVER_MEMBER(v1050_state, misc_ppi_pa_w),      // Port A write
781	783	DEVCB_NULL,                     // Port B read
782		DEVCB_DEVICE_HANDLER(CENTRONICS_TAG, misc_ppi_pb_w),      // Port B write
783		DEVCB_DEVICE_HANDLER(CENTRONICS_TAG, misc_ppi_pc_r),      // Port C read
	784	DEVCB_DRIVER_MEMBER(v1050_state,misc_ppi_pb_w),      // Port B write
	785	DEVCB_DRIVER_MEMBER(v1050_state,misc_ppi_pc_r),      // Port C read
784	786	DEVCB_DRIVER_MEMBER(v1050_state, misc_ppi_pc_w)      // Port C write
785	787	};
786	788

trunk/src/mess/drivers/apple2.c

r18257	r18258
222	222	#define PADDLE_SENSITIVITY      10
223	223	#define PADDLE_AUTOCENTER       0
224	224
225		static WRITE8_DEVICE_HANDLER(a2bus_irq_w)
	225	WRITE8_MEMBER(apple2_state::a2bus_irq_w)
226	226	{
227		apple2_state *a2 = space.machine().driver_data<apple2_state>();
228
229		a2->m_maincpu->set_input_line(M6502_IRQ_LINE, data);
	227	m_maincpu->set_input_line(M6502_IRQ_LINE, data);
230	228	}
231	229
232		static WRITE8_DEVICE_HANDLER(a2bus_nmi_w)
	230	WRITE8_MEMBER(apple2_state::a2bus_nmi_w)
233	231	{
234		apple2_state *a2 = space.machine().driver_data<apple2_state>();
235
236		a2->m_maincpu->set_input_line(INPUT_LINE_NMI, data);
	232	m_maincpu->set_input_line(INPUT_LINE_NMI, data);
237	233	}
238	234
239		static WRITE8_DEVICE_HANDLER(a2bus_inh_w)
	235	WRITE8_MEMBER(apple2_state::a2bus_inh_w)
240	236	{
241		apple2_state *a2 = space.machine().driver_data<apple2_state>();
242
243		a2->m_inh_slot = data;
244		apple2_update_memory(space.machine());
	237	m_inh_slot = data;
	238	apple2_update_memory(machine());
245	239	}
246	240
247	241	/***************************************************************************
r18257	r18258
596	590	static const struct a2bus_interface a2bus_intf =
597	591	{
598	592	// interrupt lines
599		DEVCB_HANDLER(a2bus_irq_w),
600		DEVCB_HANDLER(a2bus_nmi_w),
601		DEVCB_HANDLER(a2bus_inh_w)
	593	DEVCB_DRIVER_MEMBER(apple2_state,a2bus_irq_w),
	594	DEVCB_DRIVER_MEMBER(apple2_state,a2bus_nmi_w),
	595	DEVCB_DRIVER_MEMBER(apple2_state,a2bus_inh_w)
602	596	};
603	597
604	598	static const struct a2eauxslot_interface a2eauxbus_intf =
605	599	{
606	600	// interrupt lines
607		DEVCB_HANDLER(a2bus_irq_w),
608		DEVCB_HANDLER(a2bus_nmi_w)
	601	DEVCB_DRIVER_MEMBER(apple2_state,a2bus_irq_w),
	602	DEVCB_DRIVER_MEMBER(apple2_state,a2bus_nmi_w)
609	603	};
610	604
611	605	static SLOT_INTERFACE_START(apple2_slot0_cards)

trunk/src/mess/drivers/super6.c

r18257	r18258
509	509	//  GENERIC_TERMINAL_INTERFACE( terminal_intf )
510	510	//-------------------------------------------------
511	511
512		static WRITE8_DEVICE_HANDLER( dummy_w )
	512	WRITE8_MEMBER(super6_state::dummy_w)
513	513	{
514	514	// handled in Z80DART_INTERFACE
515	515	}
516	516
517	517	static GENERIC_TERMINAL_INTERFACE( terminal_intf )
518	518	{
519		DEVCB_HANDLER(dummy_w)
	519	DEVCB_DRIVER_MEMBER(super6_state,dummy_w)
520	520	};
521	521
522	522

trunk/src/mess/drivers/x68k.c

r18257	r18258
856	856	}
857	857
858	858	// Judging from the XM6 source code, PPI ports A and B are joystick inputs
859		static READ8_DEVICE_HANDLER( ppi_port_a_r )
	859	READ8_MEMBER(x68k_state::ppi_port_a_r)
860	860	{
861		x68k_state *state = space.machine().driver_data<x68k_state>();
862		int ctrl = space.machine().root_device().ioport("ctrltype")->read() & 0x0f;
	861	int ctrl = machine().root_device().ioport("ctrltype")->read() & 0x0f;
863	862
864	863	switch(ctrl)
865	864	{
866	865	case 0x00:  // standard MSX/FM-Towns joystick
867		if(state->m_joy.joy1_enable == 0)
868		return state->ioport("joy1")->read();
	866	if(m_joy.joy1_enable == 0)
	867	return ioport("joy1")->read();
869	868	else
870	869	return 0xff;
871	870	case 0x01:  // 3-button Megadrive gamepad
872		return md_3button_r(device,1);
	871	return md_3button_r(machine().device("ppi8255"),1);
873	872	case 0x02:  // 6-button Megadrive gamepad
874		return md_6button_r(device,1);
	873	return md_6button_r(machine().device("ppi8255"),1);
875	874	case 0x03:  // XPD-1LR
876		return xpd1lr_r(device,1);
	875	return xpd1lr_r(machine().device("ppi8255"),1);
877	876	}
878	877
879	878	return 0xff;
880	879	}
881	880
882		static READ8_DEVICE_HANDLER( ppi_port_b_r )
	881	READ8_MEMBER(x68k_state::ppi_port_b_r)
883	882	{
884		x68k_state *state = space.machine().driver_data<x68k_state>();
885		int ctrl = space.machine().root_device().ioport("ctrltype")->read() & 0xf0;
	883	int ctrl = machine().root_device().ioport("ctrltype")->read() & 0xf0;
886	884
887	885	switch(ctrl)
888	886	{
889	887	case 0x00:  // standard MSX/FM-Towns joystick
890		if(state->m_joy.joy2_enable == 0)
891		return state->ioport("joy2")->read();
	888	if(m_joy.joy2_enable == 0)
	889	return ioport("joy2")->read();
892	890	else
893	891	return 0xff;
894	892	case 0x10:  // 3-button Megadrive gamepad
895		return md_3button_r(device,2);
	893	return md_3button_r(machine().device("ppi8255"),2);
896	894	case 0x20:  // 6-button Megadrive gamepad
897		return md_6button_r(device,2);
	895	return md_6button_r(machine().device("ppi8255"),2);
898	896	case 0x30:  // XPD-1LR
899		return xpd1lr_r(device,2);
	897	return xpd1lr_r(machine().device("ppi8255"),2);
900	898	}
901	899
902	900	return 0xff;
903	901	}
904	902
905		static READ8_DEVICE_HANDLER( ppi_port_c_r )
	903	READ8_MEMBER(x68k_state::ppi_port_c_r)
906	904	{
907		x68k_state *state = space.machine().driver_data<x68k_state>();
908		return state->m_ppi_port[2];
	905	return m_ppi_port[2];
909	906	}
910	907
911	908	/* PPI port C (Joystick control, R/W)
r18257	r18258
916	913	bits 3,2 - ADPCM Sample rate
917	914	bits 1,0 - ADPCM Pan
918	915	*/
919		static WRITE8_DEVICE_HANDLER( ppi_port_c_w )
	916	WRITE8_MEMBER(x68k_state::ppi_port_c_w)
920	917	{
921		x68k_state *state = space.machine().driver_data<x68k_state>();
922	918	// ADPCM / Joystick control
923		device_t *oki = space.machine().device("okim6258");
	919	device_t *oki = machine().device("okim6258");
924	920
925		state->m_ppi_port[2] = data;
926		if((data & 0x0f) != (state->m_ppi_prev & 0x0f))
	921	m_ppi_port[2] = data;
	922	if((data & 0x0f) != (m_ppi_prev & 0x0f))
927	923	{
928		state->m_adpcm.pan = data & 0x03;
929		state->m_adpcm.rate = data & 0x0c;
930		x68k_set_adpcm(space.machine());
	924	m_adpcm.pan = data & 0x03;
	925	m_adpcm.rate = data & 0x0c;
	926	x68k_set_adpcm(machine());
931	927	okim6258_set_divider(oki, (data >> 2) & 3);
932	928	}
933	929
934	930	// The joystick enable bits also handle the multiplexer for various controllers
935		state->m_joy.joy1_enable = data & 0x10;
936		state->m_mdctrl.mux1 = data & 0x10;
937		if((state->m_ppi_prev & 0x10) == 0x00 && (data & 0x10) == 0x10)
	931	m_joy.joy1_enable = data & 0x10;
	932	m_mdctrl.mux1 = data & 0x10;
	933	if((m_ppi_prev & 0x10) == 0x00 && (data & 0x10) == 0x10)
938	934	{
939		state->m_mdctrl.seq1++;
940		state->m_mdctrl.io_timeout1->adjust(space.machine().device<cpu_device>("maincpu")->cycles_to_attotime(8192));
	935	m_mdctrl.seq1++;
	936	m_mdctrl.io_timeout1->adjust(machine().device<cpu_device>("maincpu")->cycles_to_attotime(8192));
941	937	}
942	938
943		state->m_joy.joy2_enable = data & 0x20;
944		state->m_mdctrl.mux2 = data & 0x20;
945		if((state->m_ppi_prev & 0x20) == 0x00 && (data & 0x20) == 0x20)
	939	m_joy.joy2_enable = data & 0x20;
	940	m_mdctrl.mux2 = data & 0x20;
	941	if((m_ppi_prev & 0x20) == 0x00 && (data & 0x20) == 0x20)
946	942	{
947		state->m_mdctrl.seq2++;
948		state->m_mdctrl.io_timeout2->adjust(space.machine().device<cpu_device>("maincpu")->cycles_to_attotime(8192));
	943	m_mdctrl.seq2++;
	944	m_mdctrl.io_timeout2->adjust(machine().device<cpu_device>("maincpu")->cycles_to_attotime(8192));
949	945	}
950		state->m_ppi_prev = data;
	946	m_ppi_prev = data;
951	947
952		state->m_joy.ioc6 = data & 0x40;
953		state->m_joy.ioc7 = data & 0x80;
	948	m_joy.ioc6 = data & 0x40;
	949	m_joy.ioc7 = data & 0x80;
954	950	}
955	951
956	952
r18257	r18258
1073	1069	}
1074	1070	}
1075	1071
1076		static WRITE_LINE_DEVICE_HANDLER( fdc_irq )
	1072	WRITE_LINE_MEMBER(x68k_state::fdc_irq)
1077	1073	{
1078		x68k_state *drvstate = device->machine().driver_data<x68k_state>();
1079		if((drvstate->m_ioc.irqstatus & 0x04) && state == ASSERT_LINE)
	1074	if((m_ioc.irqstatus & 0x04) && state == ASSERT_LINE)
1080	1075	{
1081		drvstate->m_current_vector[1] = drvstate->m_ioc.fdcvector;
1082		drvstate->m_ioc.irqstatus |= 0x80;
1083		drvstate->m_current_irq_line = 1;
	1076	m_current_vector[1] = m_ioc.fdcvector;
	1077	m_ioc.irqstatus |= 0x80;
	1078	m_current_irq_line = 1;
1084	1079	logerror("FDC: IRQ triggered\n");
1085		device->machine().device("maincpu")->execute().set_input_line_and_vector(1, ASSERT_LINE, drvstate->m_current_vector[1]);
	1080	machine().device("maincpu")->execute().set_input_line_and_vector(1, ASSERT_LINE, m_current_vector[1]);
1086	1081	}
1087	1082	}
1088	1083
r18257	r18258
1104	1099	upd765_dack_w(fdc, machine.driver_data()->generic_space(), 0, data);
1105	1100	}
1106	1101
1107		static WRITE_LINE_DEVICE_HANDLER ( fdc_drq )
	1102	WRITE_LINE_MEMBER(x68k_state::fdc_drq)
1108	1103	{
1109		x68k_state *drvstate = device->machine().driver_data<x68k_state>();
1110		drvstate->m_fdc.drq_state = state;
	1104	m_fdc.drq_state = state;
1111	1105	}
1112	1106
1113	1107	static WRITE16_HANDLER( x68k_fm_w )
r18257	r18258
1129	1123	return 0xffff;
1130	1124	}
1131	1125
1132		static WRITE8_DEVICE_HANDLER( x68k_ct_w )
	1126	WRITE8_MEMBER(x68k_state::x68k_ct_w)
1133	1127	{
1134		x68k_state *state = space.machine().driver_data<x68k_state>();
1135		device_t *fdc = space.machine().device("upd72065");
1136		device_t *okim = space.machine().device("okim6258");
	1128	device_t *fdc = machine().device("upd72065");
	1129	device_t *okim = machine().device("okim6258");
1137	1130
1138	1131	// CT1 and CT2 bits from YM2151 port 0x1b
1139	1132	// CT1 - ADPCM clock - 0 = 8MHz, 1 = 4MHz
1140	1133	// CT2 - 1 = Set ready state of FDC
1141	1134	upd765_ready_w(fdc,data & 0x01);
1142		state->m_adpcm.clock = data & 0x02;
1143		x68k_set_adpcm(space.machine());
	1135	m_adpcm.clock = data & 0x02;
	1136	x68k_set_adpcm(machine());
1144	1137	okim6258_set_clock(okim, data & 0x02 ? 4000000 : 8000000);
1145	1138	}
1146	1139
r18257	r18258
1503	1496	state->m_rtc->write(space, offset, data);
1504	1497	}
1505	1498
1506		static WRITE_LINE_DEVICE_HANDLER( x68k_rtc_alarm_irq )
	1499	WRITE_LINE_MEMBER(x68k_state::x68k_rtc_alarm_irq)
1507	1500	{
1508		x68k_state *drvstate = device->machine().driver_data<x68k_state>();
1509
1510		if(drvstate->m_mfp.aer & 0x01)
	1501	if(m_mfp.aer & 0x01)
1511	1502	{
1512	1503	if(state == 1)
1513	1504	{
1514		drvstate->m_mfp.gpio |= 0x01;
1515		drvstate->m_mfpdev->i0_w(1);
	1505	m_mfp.gpio |= 0x01;
	1506	m_mfpdev->i0_w(1);
1516	1507	//mfp_trigger_irq(MFP_IRQ_GPIP0);  // RTC ALARM
1517	1508	}
1518	1509	}
r18257	r18258
1520	1511	{
1521	1512	if(state == 0)
1522	1513	{
1523		drvstate->m_mfp.gpio &= ~0x01;
1524		drvstate->m_mfpdev->i0_w(0);
	1514	m_mfp.gpio &= ~0x01;
	1515	m_mfpdev->i0_w(0);
1525	1516	//mfp_trigger_irq(MFP_IRQ_GPIP0);  // RTC ALARM
1526	1517	}
1527	1518	}
r18257	r18258
1858	1849	return data;
1859	1850	}
1860	1851
1861		static WRITE8_DEVICE_HANDLER( x68030_adpcm_w )
	1852	WRITE8_MEMBER(x68k_state::x68030_adpcm_w)
1862	1853	{
	1854	device_t *device = machine().device("okim6258");
1863	1855	switch(offset)
1864	1856	{
1865	1857	case 0x00:
r18257	r18258
1871	1863	}
1872	1864	}
1873	1865
1874		static WRITE_LINE_DEVICE_HANDLER( mfp_irq_callback )
	1866	WRITE_LINE_MEMBER(x68k_state::mfp_irq_callback)
1875	1867	{
1876		x68k_state *drvstate = device->machine().driver_data<x68k_state>();
1877		if(drvstate->m_mfp_prev == CLEAR_LINE && state == CLEAR_LINE)  // eliminate unnecessary calls to set the IRQ line for speed reasons
	1868	if(m_mfp_prev == CLEAR_LINE && state == CLEAR_LINE)  // eliminate unnecessary calls to set the IRQ line for speed reasons
1878	1869	return;
1879	1870	if(state != CLEAR_LINE)
1880	1871	state = HOLD_LINE;  // to get around erroneous spurious interrupt
1881		//  if((state->m_ioc.irqstatus & 0xc0) != 0)  // if the FDC is busy, then we don't want to miss that IRQ
	1872	//  if((m_ioc.irqstatus & 0xc0) != 0)  // if the FDC is busy, then we don't want to miss that IRQ
1882	1873	//      return;
1883		device->machine().device("maincpu")->execute().set_input_line(6, state);
1884		drvstate->m_current_vector[6] = 0;
1885		drvstate->m_mfp_prev = state;
	1874	machine().device("maincpu")->execute().set_input_line(6, state);
	1875	m_current_vector[6] = 0;
	1876	m_mfp_prev = state;
1886	1877	}
1887	1878
1888	1879	INTERRUPT_GEN_MEMBER(x68k_state::x68k_vsync_irq)
r18257	r18258
1933	1924	return state->m_current_vector[irqline];
1934	1925	}
1935	1926
1936		static WRITE_LINE_DEVICE_HANDLER( x68k_scsi_irq )
	1927	WRITE_LINE_MEMBER(x68k_state::x68k_scsi_irq)
1937	1928	{
1938		x68k_state *tstate = device->machine().driver_data<x68k_state>();
1939	1929	// TODO : Internal SCSI IRQ vector 0x6c, External SCSI IRQ vector 0xf6, IRQs go through the IOSC (IRQ line 1)
1940	1930	if(state != 0)
1941	1931	{
1942		tstate->m_current_vector[1] = 0x6c;
1943		tstate->m_current_irq_line = 1;
1944		device->machine().device("maincpu")->execute().set_input_line_and_vector(1,ASSERT_LINE,tstate->m_current_vector[1]);
	1932	m_current_vector[1] = 0x6c;
	1933	m_current_irq_line = 1;
	1934	machine().device("maincpu")->execute().set_input_line_and_vector(1,ASSERT_LINE,m_current_vector[1]);
1945	1935	}
1946	1936	}
1947	1937
1948		static WRITE_LINE_DEVICE_HANDLER( x68k_scsi_drq )
	1938	WRITE_LINE_MEMBER(x68k_state::x68k_scsi_drq)
1949	1939	{
1950	1940	// TODO
1951	1941	}
r18257	r18258
2042	2032	//  AM_RANGE(0xe8c000, 0xe8dfff) AM_READWRITE_LEGACY(x68k_printer_r, x68k_printer_w)
2043	2033	AM_RANGE(0xe8e000, 0xe8ffff) AM_READWRITE16_LEGACY(x68k_sysport_r, x68k_sysport_w,0xffffffff)
2044	2034	AM_RANGE(0xe90000, 0xe91fff) AM_READWRITE16_LEGACY(x68k_fm_r, x68k_fm_w,0xffffffff)
2045		AM_RANGE(0xe92000, 0xe92003) AM_DEVREADWRITE8_LEGACY("okim6258", okim6258_status_r, x68030_adpcm_w, 0x00ff00ff)
	2035	AM_RANGE(0xe92000, 0xe92003) AM_DEVREAD8_LEGACY("okim6258", okim6258_status_r, 0x00ff00ff) AM_WRITE8(x68030_adpcm_w, 0x00ff00ff)
2046	2036	AM_RANGE(0xe94000, 0xe95fff) AM_READWRITE16_LEGACY(x68k_fdc_r, x68k_fdc_w,0xffffffff)
2047	2037	//  AM_RANGE(0xe96000, 0xe9601f) AM_DEVREADWRITE16_LEGACY("x68k_hdc",x68k_hdc_r, x68k_hdc_w,0xffffffff)
2048	2038	AM_RANGE(0xe96020, 0xe9603f) AM_DEVREADWRITE8("scsi:mb89352",mb89352_device,mb89352_r,mb89352_w,0x00ff00ff)
r18257	r18258
2074	2064	4000000,                                 /* timer clock */
2075	2065	0,                                       /* receive clock */
2076	2066	0,                                       /* transmit clock */
2077		DEVCB_LINE(mfp_irq_callback),                  /* interrupt */
	2067	DEVCB_DRIVER_LINE_MEMBER(x68k_state,mfp_irq_callback),                  /* interrupt */
2078	2068	DEVCB_DRIVER_MEMBER(x68k_state, mfp_gpio_r),      /* GPIO read */
2079	2069	DEVCB_NULL,                                 /* GPIO write */
2080	2070	DEVCB_NULL,                                 /* TAO */
r18257	r18258
2089	2079
2090	2080	static I8255A_INTERFACE( ppi_interface )
2091	2081	{
2092		DEVCB_HANDLER(ppi_port_a_r),
	2082	DEVCB_DRIVER_MEMBER(x68k_state,ppi_port_a_r),
2093	2083	DEVCB_NULL,
2094		DEVCB_HANDLER(ppi_port_b_r),
	2084	DEVCB_DRIVER_MEMBER(x68k_state,ppi_port_b_r),
2095	2085	DEVCB_NULL,
2096		DEVCB_HANDLER(ppi_port_c_r),
2097		DEVCB_HANDLER(ppi_port_c_w)
	2086	DEVCB_DRIVER_MEMBER(x68k_state,ppi_port_c_r),
	2087	DEVCB_DRIVER_MEMBER(x68k_state,ppi_port_c_w)
2098	2088	};
2099	2089
2100	2090	static const hd63450_intf dmac_interface =
r18257	r18258
2112	2102
2113	2103	static const upd765_interface fdc_interface =
2114	2104	{
2115		DEVCB_LINE(fdc_irq),
2116		DEVCB_LINE(fdc_drq),
	2105	DEVCB_DRIVER_LINE_MEMBER(x68k_state,fdc_irq),
	2106	DEVCB_DRIVER_LINE_MEMBER(x68k_state,fdc_drq),
2117	2107	NULL,
2118	2108	UPD765_RDY_PIN_CONNECTED,
2119	2109	{FLOPPY_0,FLOPPY_1,FLOPPY_2,FLOPPY_3}
r18257	r18258
2122	2112	static const ym2151_interface x68k_ym2151_interface =
2123	2113	{
2124	2114	DEVCB_LINE(x68k_fm_irq),
2125		DEVCB_HANDLER(x68k_ct_w)  // CT1, CT2 from YM2151 port 0x1b
	2115	DEVCB_DRIVER_MEMBER(x68k_state,x68k_ct_w)  // CT1, CT2 from YM2151 port 0x1b
2126	2116	};
2127	2117
2128	2118	static const okim6258_interface x68k_okim6258_interface =
r18257	r18258
2134	2124
2135	2125	static RP5C15_INTERFACE( rtc_intf )
2136	2126	{
2137		DEVCB_LINE(x68k_rtc_alarm_irq),
	2127	DEVCB_DRIVER_LINE_MEMBER(x68k_state,x68k_rtc_alarm_irq),
2138	2128	DEVCB_NULL
2139	2129	};
2140	2130
r18257	r18258
2519	2509
2520	2510	static const mb89352_interface x68k_scsi_intf =
2521	2511	{
2522		DEVCB_LINE(x68k_scsi_irq),
2523		DEVCB_LINE(x68k_scsi_drq)
	2512	DEVCB_DRIVER_LINE_MEMBER(x68k_state,x68k_scsi_irq),
	2513	DEVCB_DRIVER_LINE_MEMBER(x68k_state,x68k_scsi_drq)
2524	2514	};
2525	2515
2526	2516	static X68K_EXPANSION_INTERFACE(x68k_exp_intf)

trunk/src/mess/drivers/pes.c

r18257	r18258
65	65	#include "machine/terminal.h"
66	66
67	67	/* Devices */
68		static WRITE8_DEVICE_HANDLER( pes_kbd_input )
	68	WRITE8_MEMBER(pes_state::pes_kbd_input)
69	69	{
70		pes_state *state = space.machine().driver_data<pes_state>();
71	70	#ifdef DEBUG_FIFO
72	71	fprintf(stderr,"keyboard input: %c, ", data);
73	72	#endif
74	73	// if fifo is full (head ptr = tail ptr-1), do not increment the head ptr and do not store the data
75		if (((state->m_infifo_tail_ptr-1)&0x1F) == state->m_infifo_head_ptr)
	74	if (((m_infifo_tail_ptr-1)&0x1F) == m_infifo_head_ptr)
76	75	{
77	76	logerror("infifo was full, write ignored!\n");
78	77	#ifdef DEBUG_FIFO
r18257	r18258
80	79	#endif
81	80	return;
82	81	}
83		state->m_infifo[state->m_infifo_head_ptr] = data;
84		state->m_infifo_head_ptr++;
85		state->m_infifo_head_ptr&=0x1F;
	82	m_infifo[m_infifo_head_ptr] = data;
	83	m_infifo_head_ptr++;
	84	m_infifo_head_ptr&=0x1F;
86	85	#ifdef DEBUG_FIFO
87		fprintf(stderr,"kb input fifo fullness: %d\n",(state->m_infifo_head_ptr-state->m_infifo_tail_ptr)&0x1F);
	86	fprintf(stderr,"kb input fifo fullness: %d\n",(m_infifo_head_ptr-m_infifo_tail_ptr)&0x1F);
88	87	#endif
89	88	// todo: following two should be set so clear happens after one cpu cycle
90		space.machine().device("maincpu")->execute().set_input_line(MCS51_RX_LINE, ASSERT_LINE);
91		space.machine().device("maincpu")->execute().set_input_line(MCS51_RX_LINE, CLEAR_LINE);
	89	machine().device("maincpu")->execute().set_input_line(MCS51_RX_LINE, ASSERT_LINE);
	90	machine().device("maincpu")->execute().set_input_line(MCS51_RX_LINE, CLEAR_LINE);
92	91	}
93	92
94	93	static GENERIC_TERMINAL_INTERFACE( pes_terminal_intf )
95	94	{
96		DEVCB_HANDLER(pes_kbd_input)
	95	DEVCB_DRIVER_MEMBER(pes_state,pes_kbd_input)
97	96	};
98	97
99	98	/* Helper Functions */

trunk/src/mess/drivers/m5.c

r18257	r18258
432	432	//  TMS9928a_interface vdp_intf
433	433	//-------------------------------------------------
434	434
435		static WRITE_LINE_DEVICE_HANDLER(sordm5_video_interrupt_callback)
	435	WRITE_LINE_MEMBER(m5_state::sordm5_video_interrupt_callback)
436	436	{
437		m5_state *driver_state = device->machine().driver_data<m5_state>();
438
439	437	if (state)
440	438	{
441		driver_state->m_ctc->trg3(1);
442		driver_state->m_ctc->trg3(0);
	439	m_ctc->trg3(1);
	440	m_ctc->trg3(0);
443	441	}
444	442	}
445	443
r18257	r18258
447	445	{
448	446	"screen",
449	447	0x4000,
450		DEVCB_LINE(sordm5_video_interrupt_callback)
	448	DEVCB_DRIVER_LINE_MEMBER(m5_state,sordm5_video_interrupt_callback)
451	449	};
452	450
453	451

trunk/src/mess/drivers/ace.c

r18257	r18258
160	160	//   pio_r -
161	161	//-------------------------------------------------
162	162
163		static READ8_DEVICE_HANDLER( pio_ad_r )
	163	READ8_MEMBER(ace_state::pio_ad_r)
164	164	{
	165	device_t *device = machine().device(Z80PIO_TAG);
165	166	return dynamic_cast<z80pio_device*>(device)->data_read(0);
166	167	}
167	168
168		static READ8_DEVICE_HANDLER( pio_bd_r )
	169	READ8_MEMBER(ace_state::pio_bd_r)
169	170	{
	171	device_t *device = machine().device(Z80PIO_TAG);
170	172	return dynamic_cast<z80pio_device*>(device)->data_read(1);
171	173	}
172	174
173		static READ8_DEVICE_HANDLER( pio_ac_r )
	175	READ8_MEMBER(ace_state::pio_ac_r)
174	176	{
	177	device_t *device = machine().device(Z80PIO_TAG);
175	178	return dynamic_cast<z80pio_device*>(device)->control_read();
176	179	}
177	180
178		static READ8_DEVICE_HANDLER( pio_bc_r )
	181	READ8_MEMBER(ace_state::pio_bc_r)
179	182	{
	183	device_t *device = machine().device(Z80PIO_TAG);
180	184	return dynamic_cast<z80pio_device*>(device)->control_read();
181	185	}
182	186
r18257	r18258
185	189	//   pio_w -
186	190	//-------------------------------------------------
187	191
188		static WRITE8_DEVICE_HANDLER( pio_ad_w )
	192	WRITE8_MEMBER(ace_state::pio_ad_w)
189	193	{
	194	device_t *device = machine().device(Z80PIO_TAG);
190	195	dynamic_cast<z80pio_device*>(device)->data_write(0, data);
191	196	}
192	197
193		static WRITE8_DEVICE_HANDLER( pio_bd_w )
	198	WRITE8_MEMBER(ace_state::pio_bd_w)
194	199	{
	200	device_t *device = machine().device(Z80PIO_TAG);
195	201	dynamic_cast<z80pio_device*>(device)->data_write(1, data);
196	202	}
197	203
198		static WRITE8_DEVICE_HANDLER( pio_ac_w )
	204	WRITE8_MEMBER(ace_state::pio_ac_w)
199	205	{
	206	device_t *device = machine().device(Z80PIO_TAG);
200	207	dynamic_cast<z80pio_device*>(device)->control_write(0, data);
201	208	}
202	209
203		static WRITE8_DEVICE_HANDLER( pio_bc_w )
	210	WRITE8_MEMBER(ace_state::pio_bc_w)
204	211	{
	212	device_t *device = machine().device(Z80PIO_TAG);
205	213	dynamic_cast<z80pio_device*>(device)->control_write(1, data);
206	214	}
207	215
r18257	r18258
235	243	AM_RANGE(0x43, 0x43) AM_MIRROR(0xff80) AM_READWRITE(ppi_pb_r, ppi_pb_w)
236	244	AM_RANGE(0x45, 0x45) AM_MIRROR(0xff80) AM_READWRITE(ppi_pc_r, ppi_pc_w)
237	245	AM_RANGE(0x47, 0x47) AM_MIRROR(0xff80) AM_READWRITE(ppi_control_r, ppi_control_w)
238		AM_RANGE(0x81, 0x81) AM_MIRROR(0xff38) AM_DEVREADWRITE_LEGACY(Z80PIO_TAG, pio_ad_r, pio_ad_w)
239		AM_RANGE(0x83, 0x83) AM_MIRROR(0xff38) AM_DEVREADWRITE_LEGACY(Z80PIO_TAG, pio_bd_r, pio_bd_w)
240		AM_RANGE(0x85, 0x85) AM_MIRROR(0xff38) AM_DEVREADWRITE_LEGACY(Z80PIO_TAG, pio_ac_r, pio_ac_w)
241		AM_RANGE(0x87, 0x87) AM_MIRROR(0xff38) AM_DEVREADWRITE_LEGACY(Z80PIO_TAG, pio_bc_r, pio_bc_w)
	246	AM_RANGE(0x81, 0x81) AM_MIRROR(0xff38) AM_READWRITE(pio_ad_r, pio_ad_w)
	247	AM_RANGE(0x83, 0x83) AM_MIRROR(0xff38) AM_READWRITE(pio_bd_r, pio_bd_w)
	248	AM_RANGE(0x85, 0x85) AM_MIRROR(0xff38) AM_READWRITE(pio_ac_r, pio_ac_w)
	249	AM_RANGE(0x87, 0x87) AM_MIRROR(0xff38) AM_READWRITE(pio_bc_r, pio_bc_w)
242	250	AM_RANGE(0xfd, 0xfd) AM_MIRROR(0xff00) AM_DEVWRITE_LEGACY(AY8910_TAG, ay8910_address_w)
243	251	AM_RANGE(0xff, 0xff) AM_MIRROR(0xff00) AM_DEVREADWRITE_LEGACY(AY8910_TAG, ay8910_r, ay8910_data_w)
244	252	ADDRESS_MAP_END
r18257	r18258
468	476	//  I8255A_INTERFACE( ppi_intf )
469	477	//-------------------------------------------------
470	478
471		static READ8_DEVICE_HANDLER( sby_r )
	479	READ8_MEMBER(ace_state::sby_r)
472	480	{
	481	device_t *device = machine().device(SP0256AL2_TAG);
473	482	/*
474	483
475	484	bit     description
r18257	r18258
488	497	return sp0256_sby_r(device);
489	498	}
490	499
491		static WRITE8_DEVICE_HANDLER( ald_w )
	500	WRITE8_MEMBER(ace_state::ald_w)
492	501	{
	502	device_t *device = machine().device(SP0256AL2_TAG);
493	503	/*
494	504
495	505	bit     description
r18257	r18258
515	525	{
516	526	DEVCB_NULL,
517	527	DEVCB_NULL,
518		DEVCB_DEVICE_HANDLER(SP0256AL2_TAG, sby_r),
519		DEVCB_DEVICE_HANDLER(SP0256AL2_TAG, ald_w),
	528	DEVCB_DRIVER_MEMBER(ace_state,sby_r),
	529	DEVCB_DRIVER_MEMBER(ace_state,ald_w),
520	530	DEVCB_NULL,
521	531	DEVCB_NULL
522	532	};

trunk/src/mess/drivers/nc.c

r18257	r18258
837	837	}
838	838
839	839
840		static WRITE_LINE_DEVICE_HANDLER(nc100_tc8521_alarm_callback)
	840	WRITE_LINE_MEMBER(nc_state::nc100_tc8521_alarm_callback)
841	841	{
842	842	// TODO
843	843	}
844	844
845		static WRITE_LINE_DEVICE_HANDLER( nc100_txrdy_callback )
	845	WRITE_LINE_MEMBER(nc_state::nc100_txrdy_callback)
846	846	{
847		nc_state *drvstate = device->machine().driver_data<nc_state>();
848		drvstate->m_irq_latch &= ~(1 << 1);
	847	m_irq_latch &= ~(1 << 1);
849	848
850	849	/* uart on? */
851		if ((drvstate->m_uart_control & (1 << 3)) == 0)
	850	if ((m_uart_control & (1 << 3)) == 0)
852	851	{
853	852	if (state)
854	853	{
855	854	logerror("tx ready\n");
856		drvstate->m_irq_latch |= (1 << 1);
	855	m_irq_latch |= (1 << 1);
857	856	}
858	857	}
859	858
860		nc_update_interrupts(device->machine());
	859	nc_update_interrupts(machine());
861	860	}
862	861
863		static WRITE_LINE_DEVICE_HANDLER( nc100_rxrdy_callback )
	862	WRITE_LINE_MEMBER(nc_state::nc100_rxrdy_callback)
864	863	{
865		nc_state *drvstate = device->machine().driver_data<nc_state>();
866		drvstate->m_irq_latch &= ~(1<<0);
	864	m_irq_latch &= ~(1<<0);
867	865
868		if ((drvstate->m_uart_control & (1<<3))==0)
	866	if ((m_uart_control & (1<<3))==0)
869	867	{
870	868	if (state)
871	869	{
872	870	logerror("rx ready\n");
873		drvstate->m_irq_latch |= (1<<0);
	871	m_irq_latch |= (1<<0);
874	872	}
875	873	}
876	874
877		nc_update_interrupts(device->machine());
	875	nc_update_interrupts(machine());
878	876	}
879	877
880	878
881	879	static RP5C01_INTERFACE( rtc_intf )
882	880	{
883		DEVCB_LINE(nc100_tc8521_alarm_callback)
	881	DEVCB_DRIVER_LINE_MEMBER(nc_state,nc100_tc8521_alarm_callback)
884	882	};
885	883
886	884	static const i8251_interface nc100_uart_interface =
r18257	r18258
890	888	DEVCB_NULL,
891	889	DEVCB_NULL,
892	890	DEVCB_NULL,
893		DEVCB_LINE(nc100_rxrdy_callback),
894		DEVCB_LINE(nc100_txrdy_callback),
	891	DEVCB_DRIVER_LINE_MEMBER(nc_state,nc100_rxrdy_callback),
	892	DEVCB_DRIVER_LINE_MEMBER(nc_state,nc100_txrdy_callback),
895	893	DEVCB_NULL,
896	894	DEVCB_NULL
897	895	};
898	896
899	897
900		static WRITE_LINE_DEVICE_HANDLER( nc100_centronics_ack_w )
	898	WRITE_LINE_MEMBER(nc_state::nc100_centronics_ack_w)
901	899	{
902		nc_state *drvstate = device->machine().driver_data<nc_state>();
903	900	if (state)
904		drvstate->m_irq_status |= 0x04;
	901	m_irq_status |= 0x04;
905	902	else
906		drvstate->m_irq_status &= ~0x04;
	903	m_irq_status &= ~0x04;
907	904
908	905	/* trigger an int if the irq is set */
909		nc_update_interrupts(device->machine());
	906	nc_update_interrupts(machine());
910	907	}
911	908
912	909	static const centronics_interface nc100_centronics_config =
913	910	{
914		DEVCB_LINE(nc100_centronics_ack_w),
	911	DEVCB_DRIVER_LINE_MEMBER(nc_state,nc100_centronics_ack_w),
915	912	DEVCB_NULL,
916	913	DEVCB_NULL
917	914	};
r18257	r18258
1183	1180	#endif
1184	1181
1185	1182
1186		static WRITE_LINE_DEVICE_HANDLER( nc200_centronics_ack_w )
	1183	WRITE_LINE_MEMBER(nc_state::nc200_centronics_ack_w)
1187	1184	{
1188		nc_state *drvstate = device->machine().driver_data<nc_state>();
1189	1185	if (state)
1190		drvstate->m_irq_status |= 0x01;
	1186	m_irq_status |= 0x01;
1191	1187	else
1192		drvstate->m_irq_status &= ~0x01;
	1188	m_irq_status &= ~0x01;
1193	1189
1194	1190	/* trigger an int if the irq is set */
1195		nc_update_interrupts(device->machine());
	1191	nc_update_interrupts(machine());
1196	1192	}
1197	1193
1198	1194	static const centronics_interface nc200_centronics_config =
1199	1195	{
1200		DEVCB_LINE(nc200_centronics_ack_w),
	1196	DEVCB_DRIVER_LINE_MEMBER(nc_state,nc200_centronics_ack_w),
1201	1197	DEVCB_NULL,
1202	1198	DEVCB_NULL
1203	1199	};
r18257	r18258
1222	1218	nc_update_interrupts(machine);
1223	1219	}
1224	1220
1225		static WRITE_LINE_DEVICE_HANDLER( nc200_txrdy_callback )
	1221	WRITE_LINE_MEMBER(nc_state::nc200_txrdy_callback)
1226	1222	{
1227		//nc_state *drvstate = machine.driver_data<nc_state>();
1228		//  drvstate->m_nc200_uart_interrupt_irq &=~(1<<0);
	1223	//nc_state *drvstate = machine().driver_data<nc_state>();
	1224	//  m_nc200_uart_interrupt_irq &=~(1<<0);
1229	1225	//
1230	1226	//  if (state)
1231	1227	//  {
1232		//      drvstate->m_nc200_uart_interrupt_irq |=(1<<0);
	1228	//      m_nc200_uart_interrupt_irq |=(1<<0);
1233	1229	//  }
1234	1230	//
1235		//  nc200_refresh_uart_interrupt(device->machine());
	1231	//  nc200_refresh_uart_interrupt(machine());
1236	1232	}
1237	1233
1238		static WRITE_LINE_DEVICE_HANDLER( nc200_rxrdy_callback )
	1234	WRITE_LINE_MEMBER(nc_state::nc200_rxrdy_callback)
1239	1235	{
1240		nc_state *drvstate = device->machine().driver_data<nc_state>();
1241		drvstate->m_nc200_uart_interrupt_irq &=~(1<<1);
	1236	m_nc200_uart_interrupt_irq &=~(1<<1);
1242	1237
1243	1238	if (state)
1244	1239	{
1245		drvstate->m_nc200_uart_interrupt_irq |=(1<<1);
	1240	m_nc200_uart_interrupt_irq |=(1<<1);
1246	1241	}
1247	1242
1248		nc200_refresh_uart_interrupt(device->machine());
	1243	nc200_refresh_uart_interrupt(machine());
1249	1244	}
1250	1245
1251	1246	static const i8251_interface nc200_uart_interface=
r18257	r18258
1255	1250	DEVCB_NULL,
1256	1251	DEVCB_NULL,
1257	1252	DEVCB_NULL,
1258		DEVCB_LINE(nc200_rxrdy_callback),
1259		DEVCB_LINE(nc200_txrdy_callback),
	1253	DEVCB_DRIVER_LINE_MEMBER(nc_state,nc200_rxrdy_callback),
	1254	DEVCB_DRIVER_LINE_MEMBER(nc_state,nc200_txrdy_callback),
1260	1255	DEVCB_NULL,
1261	1256	DEVCB_NULL
1262	1257	};
1263	1258
1264	1259
1265		static WRITE_LINE_DEVICE_HANDLER( nc200_fdc_interrupt )
	1260	WRITE_LINE_MEMBER(nc_state::nc200_fdc_interrupt)
1266	1261	{
1267		nc_state *drvstate = device->machine().driver_data<nc_state>();
1268	1262	#if 0
1269		drvstate->m_irq_latch &=~(1<<5);
	1263	m_irq_latch &=~(1<<5);
1270	1264
1271	1265	if (state)
1272	1266	{
1273		drvstate->m_irq_latch |=(1<<5);
	1267	m_irq_latch |=(1<<5);
1274	1268	}
1275	1269	#endif
1276		drvstate->m_irq_status &=~(1<<5);
	1270	m_irq_status &=~(1<<5);
1277	1271
1278	1272	if (state)
1279	1273	{
1280		drvstate->m_irq_status |=(1<<5);
	1274	m_irq_status |=(1<<5);
1281	1275	}
1282	1276
1283		nc_update_interrupts(device->machine());
	1277	nc_update_interrupts(machine());
1284	1278	}
1285	1279
1286	1280	static const upd765_interface nc200_upd765_interface=
1287	1281	{
1288		DEVCB_LINE(nc200_fdc_interrupt),
	1282	DEVCB_DRIVER_LINE_MEMBER(nc_state,nc200_fdc_interrupt),
1289	1283	DEVCB_NULL,
1290	1284	NULL,
1291	1285	UPD765_RDY_PIN_CONNECTED,

trunk/src/mess/drivers/einstein.c

r18257	r18258
132	132	}
133	133	}
134	134
135		static WRITE_LINE_DEVICE_HANDLER( einstein_6845_de_changed )
	135	WRITE_LINE_MEMBER(einstein_state::einstein_6845_de_changed)
136	136	{
137		einstein_state *einstein = device->machine().driver_data<einstein_state>();
138		einstein->m_de=state;
	137	m_de=state;
139	138	}
140	139
141	140	/* bit 0 - latched display enabled (DE) from 6845
r18257	r18258
236	235	FLOPPY DRIVES
237	236	***************************************************************************/
238	237
239		static WRITE8_DEVICE_HANDLER( einstein_drsel_w )
	238	WRITE8_MEMBER(einstein_state::einstein_drsel_w)
240	239	{
241		einstein_state *einstein = space.machine().driver_data<einstein_state>();
242	240	if(VERBOSE_DISK)
243		logerror("%s: einstein_drsel_w %02x\n", space.machine().describe_context(), data);
	241	logerror("%s: einstein_drsel_w %02x\n", machine().describe_context(), data);
244	242
245	243	/* bit 0 to 3 select the drive */
246	244	static const char *names[] = { "fd0", "fd1", "fd2", "fd3" };
247	245	floppy_image_device *floppy = 0;
248	246	for(int i=0; i<4; i++) {
249	247	if(BIT(data, i)) {
250		floppy_connector *con = space.machine().device<floppy_connector>(names[i]);
	248	floppy_connector *con = machine().device<floppy_connector>(names[i]);
251	249	if(con)
252	250	floppy = con->get_device();
253	251	}
254	252	}
255	253
256	254	/* double sided drive connected? */
257		if (space.machine().root_device().ioport("config")->read() & data)
	255	if (machine().root_device().ioport("config")->read() & data)
258	256	{
259	257	/* bit 4 selects the side then */
260	258	//floppy->ss_w(BIT(data, 4));
261	259	}
262	260	if (floppy) floppy->ss_w(0);
263		einstein->m_fdc->set_floppy(floppy);
	261	m_fdc->set_floppy(floppy);
264	262	}
265	263
266	264
r18257	r18258
283	281	UART
284	282	***************************************************************************/
285	283
286		static WRITE_LINE_DEVICE_HANDLER( einstein_serial_transmit_clock )
	284	WRITE_LINE_MEMBER(einstein_state::einstein_serial_transmit_clock)
287	285	{
288		i8251_device *uart = device->machine().device<i8251_device>(IC_I060);
	286	i8251_device *uart = machine().device<i8251_device>(IC_I060);
289	287	uart->transmit_clock();
290	288	}
291	289
292		static WRITE_LINE_DEVICE_HANDLER( einstein_serial_receive_clock )
	290	WRITE_LINE_MEMBER(einstein_state::einstein_serial_receive_clock)
293	291	{
294		i8251_device *uart = device->machine().device<i8251_device>(IC_I060);
	292	i8251_device *uart = machine().device<i8251_device>(IC_I060);
295	293	uart->receive_clock();
296	294	}
297	295
r18257	r18258
521	519	/* block 4, internal controls */
522	520	AM_RANGE(0x20, 0x20) AM_MIRROR(0xff00) AM_READWRITE(einstein_kybintmsk_r, einstein_kybintmsk_w)
523	521	AM_RANGE(0x21, 0x21) AM_MIRROR(0xff00) AM_WRITE(einstein_adcintmsk_w)
524		AM_RANGE(0x23, 0x23) AM_MIRROR(0xff00) AM_DEVWRITE_LEGACY(IC_I042, einstein_drsel_w)
	522	AM_RANGE(0x23, 0x23) AM_MIRROR(0xff00) AM_WRITE(einstein_drsel_w)
525	523	AM_RANGE(0x24, 0x24) AM_MIRROR(0xff00) AM_WRITE(einstein_rom_w)
526	524	AM_RANGE(0x25, 0x25) AM_MIRROR(0xff00) AM_WRITE(einstein_fire_int_w)
527	525	/* block 5, z80ctc */
r18257	r18258
692	690	static Z80CTC_INTERFACE( einstein_ctc_intf )
693	691	{
694	692	DEVCB_NULL,
695		DEVCB_LINE(einstein_serial_transmit_clock),
696		DEVCB_LINE(einstein_serial_receive_clock),
	693	DEVCB_DRIVER_LINE_MEMBER(einstein_state,einstein_serial_transmit_clock),
	694	DEVCB_DRIVER_LINE_MEMBER(einstein_state,einstein_serial_receive_clock),
697	695	DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF, z80ctc_device, trg3)
698	696	};
699	697
r18257	r18258
733	731	NULL,
734	732	einstein_6845_update_row,
735	733	NULL,
736		DEVCB_LINE(einstein_6845_de_changed),
	734	DEVCB_DRIVER_LINE_MEMBER(einstein_state,einstein_6845_de_changed),
737	735	DEVCB_NULL,
738	736	DEVCB_NULL,
739	737	DEVCB_NULL,

trunk/src/mess/drivers/pet.c

r18257	r18258
603	603	NULL,
604	604	pet40_update_row,
605	605	NULL,
606		DEVCB_LINE(pet_display_enable_changed),
	606	DEVCB_DRIVER_LINE_MEMBER(pet_state, pet_display_enable_changed),
607	607	DEVCB_NULL,
608	608	DEVCB_NULL,
609	609	DEVCB_NULL,
r18257	r18258
616	616	NULL,
617	617	pet80_update_row,
618	618	NULL,
619		DEVCB_LINE(pet_display_enable_changed),
	619	DEVCB_DRIVER_LINE_MEMBER(pet_state, pet_display_enable_changed),
620	620	DEVCB_NULL,
621	621	DEVCB_NULL,
622	622	DEVCB_NULL,

trunk/src/mess/drivers/pcw.c

r18257	r18258
113	113	static const UINT8 half_step_table[4] = { 0x01, 0x02, 0x04, 0x08 };
114	114	static const UINT8 full_step_table[4] = { 0x03, 0x06, 0x0c, 0x09 };
115	115
116		static WRITE_LINE_DEVICE_HANDLER( pcw_fdc_interrupt );
117	116
	117
118	118	static void pcw_update_interrupt_counter(pcw_state *state)
119	119	{
120	120	/* never increments past 15! */
r18257	r18258
129	129	/NMI depending on choice (see system control below) */
130	130	static const upd765_interface pcw_upd765_interface =
131	131	{
132		DEVCB_LINE(pcw_fdc_interrupt),
	132	DEVCB_DRIVER_LINE_MEMBER(pcw_state,pcw_fdc_interrupt),
133	133	DEVCB_NULL,
134	134	NULL,
135	135	UPD765_RDY_PIN_CONNECTED,
r18257	r18258
179	179	}
180	180
181	181	/* fdc interrupt callback. set/clear fdc int */
182		static WRITE_LINE_DEVICE_HANDLER( pcw_fdc_interrupt )
	182	WRITE_LINE_MEMBER(pcw_state::pcw_fdc_interrupt)
183	183	{
184		pcw_state *drvstate = device->machine().driver_data<pcw_state>();
185	184	if (state == CLEAR_LINE)
186		drvstate->m_system_status &= ~(1<<5);
	185	m_system_status &= ~(1<<5);
187	186	else
188	187	{
189		drvstate->m_system_status |= (1<<5);
190		if(drvstate->m_fdc_interrupt_code == 0)  // NMI is held until interrupt type is changed
191		drvstate->m_nmi_flag = 1;
	188	m_system_status |= (1<<5);
	189	if(m_fdc_interrupt_code == 0)  // NMI is held until interrupt type is changed
	190	m_nmi_flag = 1;
192	191	}
193	192	}
194	193

trunk/src/mess/drivers/xor100.c

r18257	r18258
360	360
361	361	/* COM5016 Interface */
362	362
363		static WRITE_LINE_DEVICE_HANDLER( com5016_fr_w )
	363	WRITE_LINE_MEMBER(xor100_state::com5016_fr_w)
364	364	{
	365	device_t *device = machine().device(I8251_A_TAG);
365	366	i8251_device* uart = dynamic_cast<i8251_device*>(device);
366	367	uart->transmit_clock();
367	368	uart->receive_clock();
368	369	}
369	370
370		static WRITE_LINE_DEVICE_HANDLER( com5016_ft_w )
	371	WRITE_LINE_MEMBER(xor100_state::com5016_ft_w)
371	372	{
	373	device_t *device = machine().device(I8251_B_TAG);
372	374	i8251_device* uart = dynamic_cast<i8251_device*>(device);
373	375	uart->transmit_clock();
374	376	uart->receive_clock();
r18257	r18258
377	379	static COM8116_INTERFACE( com5016_intf )
378	380	{
379	381	DEVCB_NULL,               /* fX/4 output */
380		DEVCB_DEVICE_LINE(I8251_A_TAG, com5016_fr_w),   /* fR output */
381		DEVCB_DEVICE_LINE(I8251_B_TAG, com5016_ft_w),   /* fT output */
	382	DEVCB_DRIVER_LINE_MEMBER(xor100_state,com5016_fr_w),   /* fR output */
	383	DEVCB_DRIVER_LINE_MEMBER(xor100_state,com5016_ft_w),   /* fT output */
382	384	{ 101376, 67584, 46080, 37686, 33792, 16896, 8448, 4224, 2816, 2534, 2112, 1408, 1056, 704, 528, 264 },   // WRONG?
383	385	{ 101376, 67584, 46080, 37686, 33792, 16896, 8448, 4224, 2816, 2534, 2112, 1408, 1056, 704, 528, 264 },   // WRONG?
384	386	};
r18257	r18258
415	417
416	418	/* Printer 8255A Interface */
417	419
418		static READ8_DEVICE_HANDLER( i8255_pc_r )
	420	READ8_MEMBER(xor100_state::i8255_pc_r)
419	421	{
420		centronics_device *centronics = space.machine().device<centronics_device>("centronics");
	422	centronics_device *centronics = machine().device<centronics_device>("centronics");
421	423	/*
422	424
423	425	bit     description
r18257	r18258
450	452	DEVCB_DEVICE_MEMBER(CENTRONICS_TAG, centronics_device, write),
451	453	DEVCB_NULL,
452	454	DEVCB_DEVICE_LINE_MEMBER(CENTRONICS_TAG, centronics_device, strobe_w),
453		DEVCB_DEVICE_HANDLER(CENTRONICS_TAG, i8255_pc_r),
	455	DEVCB_DRIVER_MEMBER(xor100_state,i8255_pc_r),
454	456	DEVCB_NULL
455	457	};
456	458
r18257	r18258
463	465
464	466	/* Z80-CTC Interface */
465	467
466		static WRITE_LINE_DEVICE_HANDLER( ctc_z0_w )
	468	WRITE_LINE_MEMBER(xor100_state::ctc_z0_w)
467	469	{
468	470	}
469	471
470		static WRITE_LINE_DEVICE_HANDLER( ctc_z1_w )
	472	WRITE_LINE_MEMBER(xor100_state::ctc_z1_w)
471	473	{
472	474	}
473	475
474		static WRITE_LINE_DEVICE_HANDLER( ctc_z2_w )
	476	WRITE_LINE_MEMBER(xor100_state::ctc_z2_w)
475	477	{
476	478	}
477	479
478	480	static Z80CTC_INTERFACE( ctc_intf )
479	481	{
480	482	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),   /* interrupt handler */
481		DEVCB_LINE(ctc_z0_w),         /* ZC/TO0 callback */
482		DEVCB_LINE(ctc_z1_w),         /* ZC/TO1 callback */
483		DEVCB_LINE(ctc_z2_w)          /* ZC/TO2 callback */
	483	DEVCB_DRIVER_LINE_MEMBER(xor100_state,ctc_z0_w),         /* ZC/TO0 callback */
	484	DEVCB_DRIVER_LINE_MEMBER(xor100_state,ctc_z1_w),         /* ZC/TO1 callback */
	485	DEVCB_DRIVER_LINE_MEMBER(xor100_state,ctc_z2_w)          /* ZC/TO2 callback */
484	486	};
485	487
486	488	/* WD1795-02 Interface */
r18257	r18258
518	520
519	521	/* Terminal Interface */
520	522
521		static WRITE8_DEVICE_HANDLER( xor100_kbd_put )
	523	WRITE8_MEMBER(xor100_state::xor100_kbd_put)
522	524	{
523		i8251_device* uart = dynamic_cast<i8251_device*>(device);
	525	i8251_device* uart = dynamic_cast<i8251_device*>(machine().device(I8251_B_TAG));
524	526	uart->receive_character(data);
525	527	}
526	528
527	529	static GENERIC_TERMINAL_INTERFACE( xor100_terminal_intf )
528	530	{
529		DEVCB_DEVICE_HANDLER(I8251_B_TAG, xor100_kbd_put)
	531	DEVCB_DRIVER_MEMBER(xor100_state,xor100_kbd_put)
530	532	};
531	533
532	534	/* Machine Initialization */

trunk/src/mess/drivers/ssystem3.c

r18257	r18258
117	117	*ready=FALSE;
118	118	}
119	119
120		static WRITE8_DEVICE_HANDLER(ssystem3_via_write_a)
	120	WRITE8_MEMBER(ssystem3_state::ssystem3_via_write_a)
121	121	{
122		ssystem3_state *state = space.machine().driver_data<ssystem3_state>();
123		state->m_porta=data;
	122	m_porta=data;
124	123	//  logerror("%.4x via port a write %02x\n",(int)activecpu_get_pc(), data);
125	124	}
126	125
127		static READ8_DEVICE_HANDLER(ssystem3_via_read_a)
	126	READ8_MEMBER(ssystem3_state::ssystem3_via_read_a)
128	127	{
129		ssystem3_state *state = space.machine().driver_data<ssystem3_state>();
130	128	UINT8 data=0xff;
131	129	#if 1 // time switch
132		if (!(state->m_porta&0x10)) data&=space.machine().root_device().ioport("matrix1")->read()|0xf1;
133		if (!(state->m_porta&0x20)) data&=space.machine().root_device().ioport("matrix2")->read()|0xf1;
134		if (!(state->m_porta&0x40)) data&=space.machine().root_device().ioport("matrix3")->read()|0xf1;
135		if (!(state->m_porta&0x80)) data&=space.machine().root_device().ioport("matrix4")->read()|0xf1;
	130	if (!(m_porta&0x10)) data&=machine().root_device().ioport("matrix1")->read()|0xf1;
	131	if (!(m_porta&0x20)) data&=machine().root_device().ioport("matrix2")->read()|0xf1;
	132	if (!(m_porta&0x40)) data&=machine().root_device().ioport("matrix3")->read()|0xf1;
	133	if (!(m_porta&0x80)) data&=machine().root_device().ioport("matrix4")->read()|0xf1;
136	134	#else
137		if (!(state->m_porta&0x10)) data&=space.machine().root_device().ioport("matrix1")->read()|0xf0;
138		if (!(state->m_porta&0x20)) data&=space.machine().root_device().ioport("matrix2")->read()|0xf0;
139		if (!(state->m_porta&0x40)) data&=space.machine().root_device().ioport("matrix3")->read()|0xf0;
140		if (!(state->m_porta&0x80)) data&=space.machine().root_device().ioport("matrix4")->read()|0xf0;
	135	if (!(m_porta&0x10)) data&=machine().root_device().ioport("matrix1")->read()|0xf0;
	136	if (!(m_porta&0x20)) data&=machine().root_device().ioport("matrix2")->read()|0xf0;
	137	if (!(m_porta&0x40)) data&=machine().root_device().ioport("matrix3")->read()|0xf0;
	138	if (!(m_porta&0x80)) data&=machine().root_device().ioport("matrix4")->read()|0xf0;
141	139	#endif
142		if (!(state->m_porta&1)) {
143		if (!(space.machine().root_device().ioport("matrix1")->read()&1)) data&=~0x10;
144		if (!(space.machine().root_device().ioport("matrix2")->read()&1)) data&=~0x20;
145		if (!(space.machine().root_device().ioport("matrix3")->read()&1)) data&=~0x40;
146		if (!(state->ioport("matrix4")->read()&1)) data&=~0x80;
	140	if (!(m_porta&1)) {
	141	if (!(machine().root_device().ioport("matrix1")->read()&1)) data&=~0x10;
	142	if (!(machine().root_device().ioport("matrix2")->read()&1)) data&=~0x20;
	143	if (!(machine().root_device().ioport("matrix3")->read()&1)) data&=~0x40;
	144	if (!(ioport("matrix4")->read()&1)) data&=~0x80;
147	145	}
148		if (!(state->m_porta&2)) {
149		if (!(space.machine().root_device().ioport("matrix1")->read()&2)) data&=~0x10;
150		if (!(space.machine().root_device().ioport("matrix2")->read()&2)) data&=~0x20;
151		if (!(space.machine().root_device().ioport("matrix3")->read()&2)) data&=~0x40;
152		if (!(space.machine().root_device().ioport("matrix4")->read()&2)) data&=~0x80;
	146	if (!(m_porta&2)) {
	147	if (!(machine().root_device().ioport("matrix1")->read()&2)) data&=~0x10;
	148	if (!(machine().root_device().ioport("matrix2")->read()&2)) data&=~0x20;
	149	if (!(machine().root_device().ioport("matrix3")->read()&2)) data&=~0x40;
	150	if (!(machine().root_device().ioport("matrix4")->read()&2)) data&=~0x80;
153	151	}
154		if (!(state->m_porta&4)) {
155		if (!(space.machine().root_device().ioport("matrix1")->read()&4)) data&=~0x10;
156		if (!(space.machine().root_device().ioport("matrix2")->read()&4)) data&=~0x20;
157		if (!(space.machine().root_device().ioport("matrix3")->read()&4)) data&=~0x40;
158		if (!(space.machine().root_device().ioport("matrix4")->read()&4)) data&=~0x80;
	152	if (!(m_porta&4)) {
	153	if (!(machine().root_device().ioport("matrix1")->read()&4)) data&=~0x10;
	154	if (!(machine().root_device().ioport("matrix2")->read()&4)) data&=~0x20;
	155	if (!(machine().root_device().ioport("matrix3")->read()&4)) data&=~0x40;
	156	if (!(machine().root_device().ioport("matrix4")->read()&4)) data&=~0x80;
159	157	}
160		if (!(state->m_porta&8)) {
161		if (!(space.machine().root_device().ioport("matrix1")->read()&8)) data&=~0x10;
162		if (!(space.machine().root_device().ioport("matrix2")->read()&8)) data&=~0x20;
163		if (!(space.machine().root_device().ioport("matrix3")->read()&8)) data&=~0x40;
164		if (!(space.machine().root_device().ioport("matrix4")->read()&8)) data&=~0x80;
	158	if (!(m_porta&8)) {
	159	if (!(machine().root_device().ioport("matrix1")->read()&8)) data&=~0x10;
	160	if (!(machine().root_device().ioport("matrix2")->read()&8)) data&=~0x20;
	161	if (!(machine().root_device().ioport("matrix3")->read()&8)) data&=~0x40;
	162	if (!(machine().root_device().ioport("matrix4")->read()&8)) data&=~0x80;
165	163	}
166	164	//  logerror("%.4x via port a read %02x\n",(int)activecpu_get_pc(), data);
167	165	return data;
r18257	r18258
189	187	bit 5: input low x/$37 4 (else 1)
190	188
191	189	*/
192		static READ8_DEVICE_HANDLER(ssystem3_via_read_b)
	190	READ8_MEMBER(ssystem3_state::ssystem3_via_read_b)
193	191	{
194	192	UINT8 data=0xff;
195	193	int on, ready;
196		ssystem3_playfield_read(space.machine(), &on, &ready);
	194	ssystem3_playfield_read(machine(), &on, &ready);
197	195	if (!on) data&=~0x20;
198	196	if (!ready) data&=~0x10;
199	197	return data;
200	198	}
201	199
202		static WRITE8_DEVICE_HANDLER(ssystem3_via_write_b)
	200	WRITE8_MEMBER(ssystem3_state::ssystem3_via_write_b)
203	201	{
204		via6522_device *via_0 = space.machine().device<via6522_device>("via6522_0");
	202	via6522_device *via_0 = machine().device<via6522_device>("via6522_0");
205	203	UINT8 d;
206	204
207		ssystem3_playfield_write(space.machine(), data&1, data&8);
208		ssystem3_lcd_write(space.machine(), data&4, data&2);
	205	ssystem3_playfield_write(machine(), data&1, data&8);
	206	ssystem3_lcd_write(machine(), data&4, data&2);
209	207
210		d=ssystem3_via_read_b(via_0, space, 0, mem_mask)&~0x40;
	208	d=ssystem3_via_read_b(space, 0, mem_mask)&~0x40;
211	209	if (data&0x80) d|=0x40;
212	210	//  d&=~0x8f;
213	211	via_0->write_portb(space,0, d );
r18257	r18258
215	213
216	214	static const via6522_interface ssystem3_via_config=
217	215	{
218		DEVCB_HANDLER(ssystem3_via_read_a),//read8_machine_func in_a_func;
219		DEVCB_HANDLER(ssystem3_via_read_b),//read8_machine_func in_b_func;
	216	DEVCB_DRIVER_MEMBER(ssystem3_state,ssystem3_via_read_a),//read8_machine_func in_a_func;
	217	DEVCB_DRIVER_MEMBER(ssystem3_state,ssystem3_via_read_b),//read8_machine_func in_b_func;
220	218	DEVCB_NULL,//read8_machine_func in_ca1_func;
221	219	DEVCB_NULL,//read8_machine_func in_cb1_func;
222	220	DEVCB_NULL,//read8_machine_func in_ca2_func;
223	221	DEVCB_NULL,//read8_machine_func in_cb2_func;
224		DEVCB_HANDLER(ssystem3_via_write_a),//write8_machine_func out_a_func;
225		DEVCB_HANDLER(ssystem3_via_write_b),//write8_machine_func out_b_func;
	222	DEVCB_DRIVER_MEMBER(ssystem3_state,ssystem3_via_write_a),//write8_machine_func out_a_func;
	223	DEVCB_DRIVER_MEMBER(ssystem3_state,ssystem3_via_write_b),//write8_machine_func out_b_func;
226	224	DEVCB_NULL,//write8_machine_func out_ca2_func;
227	225	DEVCB_NULL,//write8_machine_func out_cb2_func;
228	226	DEVCB_NULL,//void (*irq_func)(int state);

trunk/src/mess/drivers/osi.c

r18257	r18258
362	362	C011 ACIAIO         DISK CONTROLLER ACIA I/O PORT
363	363	*/
364	364
365		static WRITE_LINE_DEVICE_HANDLER(osi470_index_callback)
	365	WRITE_LINE_MEMBER(sb2m600_state::osi470_index_callback)
366	366	{
367		sb2m600_state *driver_state = device->machine().driver_data<sb2m600_state>();
368
369		driver_state->m_fdc_index = state;
	367	m_fdc_index = state;
370	368	}
371	369
372	370	READ8_MEMBER( c1pmf_state::osi470_pia_pa_r )
r18257	r18258
741	739
742	740	static const floppy_interface osi_floppy_interface =
743	741	{
744		DEVCB_LINE(osi470_index_callback),
	742	DEVCB_DRIVER_LINE_MEMBER(sb2m600_state,osi470_index_callback),
745	743	DEVCB_NULL,
746	744	DEVCB_NULL,
747	745	DEVCB_NULL,

trunk/src/mess/drivers/z80ne.c

r18257	r18258
171	171
172	172	static ADDRESS_MAP_START( z80netf_io, AS_IO, 8, z80ne_state )
173	173	ADDRESS_MAP_GLOBAL_MASK(0xff)
174		AM_RANGE(0xd0, 0xd7) AM_DEVREADWRITE_LEGACY("wd1771", lx390_fdc_r, lx390_fdc_w)
	174	AM_RANGE(0xd0, 0xd7) AM_READWRITE(lx390_fdc_r, lx390_fdc_w)
175	175	AM_RANGE(0xea, 0xea) AM_READ(lx388_data_r )
176	176	AM_RANGE(0xeb, 0xeb) AM_READ(lx388_read_field_sync )
177	177	AM_RANGE(0xee, 0xee) AM_READWRITE(lx385_data_r, lx385_data_w )
r18257	r18258
455	455	static const mc6847_interface z80net_mc6847_intf =
456	456	{
457	457	"lx388",
458		DEVCB_HANDLER(lx388_mc6847_videoram_r),
	458	DEVCB_DRIVER_MEMBER(z80ne_state, lx388_mc6847_videoram_r),
459	459	DEVCB_NULL,
460	460	DEVCB_NULL,
461	461

trunk/src/mess/drivers/samcoupe.c

r18257	r18258
265	265	return m_attribute;
266	266	}
267	267
268		static READ8_DEVICE_HANDLER( samcoupe_lpt1_busy_r )
	268	READ8_MEMBER(samcoupe_state::samcoupe_lpt1_busy_r)
269	269	{
270		centronics_device *centronics = space.machine().device<centronics_device>("lpt1");
	270	centronics_device *centronics = machine().device<centronics_device>("lpt1");
271	271	return centronics->busy_r();
272	272	}
273	273
274		static WRITE8_DEVICE_HANDLER( samcoupe_lpt1_strobe_w )
	274	WRITE8_MEMBER(samcoupe_state::samcoupe_lpt1_strobe_w)
275	275	{
276		centronics_device *centronics = space.machine().device<centronics_device>("lpt1");
	276	centronics_device *centronics = machine().device<centronics_device>("lpt1");
277	277	centronics->strobe_w(data);
278	278	}
279	279
280		static READ8_DEVICE_HANDLER( samcoupe_lpt2_busy_r )
	280	READ8_MEMBER(samcoupe_state::samcoupe_lpt2_busy_r)
281	281	{
282		centronics_device *centronics = space.machine().device<centronics_device>("lpt2");
	282	centronics_device *centronics = machine().device<centronics_device>("lpt2");
283	283	return centronics->busy_r();
284	284	}
285	285
286		static WRITE8_DEVICE_HANDLER( samcoupe_lpt2_strobe_w )
	286	WRITE8_MEMBER(samcoupe_state::samcoupe_lpt2_strobe_w)
287	287	{
288		centronics_device *centronics = space.machine().device<centronics_device>("lpt2");
	288	centronics_device *centronics = machine().device<centronics_device>("lpt2");
289	289	centronics->strobe_w(data);
290	290	}
291	291
r18257	r18258
305	305	AM_RANGE(0x0080, 0x0081) AM_MIRROR(0xff00) AM_MASK(0xffff) AM_WRITE(samcoupe_ext_mem_w)
306	306	AM_RANGE(0x00e0, 0x00e7) AM_MIRROR(0xff10) AM_MASK(0xffff) AM_READWRITE(samcoupe_disk_r, samcoupe_disk_w)
307	307	AM_RANGE(0x00e8, 0x00e8) AM_MIRROR(0xff00) AM_MASK(0xffff) AM_DEVWRITE("lpt1", centronics_device, write)
308		AM_RANGE(0x00e9, 0x00e9) AM_MIRROR(0xff00) AM_MASK(0xffff) AM_DEVREADWRITE_LEGACY("lpt1", samcoupe_lpt1_busy_r, samcoupe_lpt1_strobe_w)
	308	AM_RANGE(0x00e9, 0x00e9) AM_MIRROR(0xff00) AM_MASK(0xffff) AM_READWRITE(samcoupe_lpt1_busy_r, samcoupe_lpt1_strobe_w)
309	309	AM_RANGE(0x00ea, 0x00ea) AM_MIRROR(0xff00) AM_MASK(0xffff) AM_DEVWRITE("lpt2", centronics_device, write)
310		AM_RANGE(0x00eb, 0x00eb) AM_MIRROR(0xff00) AM_MASK(0xffff) AM_DEVREADWRITE_LEGACY("lpt2", samcoupe_lpt2_busy_r, samcoupe_lpt2_strobe_w)
	310	AM_RANGE(0x00eb, 0x00eb) AM_MIRROR(0xff00) AM_MASK(0xffff) AM_READWRITE(samcoupe_lpt2_busy_r, samcoupe_lpt2_strobe_w)
311	311	AM_RANGE(0x00f8, 0x00f8) AM_MIRROR(0xff00) AM_MASK(0xffff) AM_READWRITE(samcoupe_pen_r, samcoupe_clut_w)
312	312	AM_RANGE(0x00f9, 0x00f9) AM_MIRROR(0xff00) AM_MASK(0xffff) AM_READWRITE(samcoupe_status_r, samcoupe_line_int_w)
313	313	AM_RANGE(0x00fa, 0x00fa) AM_MIRROR(0xff00) AM_MASK(0xffff) AM_READWRITE(samcoupe_lmpr_r, samcoupe_lmpr_w)

trunk/src/mess/drivers/sg1000.c

r18257	r18258
517	517	TMS9928a_interface tms9928a_interface
518	518	-------------------------------------------------*/
519	519
520		static WRITE_LINE_DEVICE_HANDLER(sg1000_vdp_interrupt)
	520	WRITE_LINE_MEMBER(sg1000_state::sg1000_vdp_interrupt)
521	521	{
522		device->machine().device(Z80_TAG)->execute().set_input_line(INPUT_LINE_IRQ0, state);
	522	machine().device(Z80_TAG)->execute().set_input_line(INPUT_LINE_IRQ0, state);
523	523	}
524	524
525	525	static TMS9928A_INTERFACE(sg1000_tms9918a_interface)
526	526	{
527	527	"screen",
528	528	0x4000,
529		DEVCB_LINE(sg1000_vdp_interrupt)
	529	DEVCB_DRIVER_LINE_MEMBER(sg1000_state,sg1000_vdp_interrupt)
530	530	};
531	531
532	532	/*-------------------------------------------------
r18257	r18258
984	984	sf7000_fdc_index_callback -
985	985	-------------------------------------------------*/
986	986
987		static WRITE_LINE_DEVICE_HANDLER(sf7000_fdc_index_callback)
	987	WRITE_LINE_MEMBER(sf7000_state::sf7000_fdc_index_callback)
988	988	{
989		sf7000_state *driver_state = device->machine().driver_data<sf7000_state>();
990
991		driver_state->m_fdc_index = state;
	989	m_fdc_index = state;
992	990	}
993	991
994	992	/*-------------------------------------------------
r18257	r18258
997	995
998	996	static const floppy_interface sf7000_floppy_interface =
999	997	{
1000		DEVCB_LINE(sf7000_fdc_index_callback),
	998	DEVCB_DRIVER_LINE_MEMBER(sf7000_state,sf7000_fdc_index_callback),
1001	999	DEVCB_NULL,
1002	1000	DEVCB_NULL,
1003	1001	DEVCB_NULL,

trunk/src/mess/drivers/tsispch.c

r18257	r18258
127	127	/*****************************************************************************
128	128	USART 8251 and Terminal stuff
129	129	*****************************************************************************/
130		static WRITE_LINE_DEVICE_HANDLER( i8251_rxrdy_int )
	130	WRITE_LINE_MEMBER(tsispch_state::i8251_rxrdy_int)
131	131	{
132		pic8259_ir1_w(device->machine().device("pic8259"), state);
	132	pic8259_ir1_w(machine().device("pic8259"), state);
133	133	}
134	134
135		static WRITE_LINE_DEVICE_HANDLER( i8251_txempty_int )
	135	WRITE_LINE_MEMBER(tsispch_state::i8251_txempty_int)
136	136	{
137		pic8259_ir2_w(device->machine().device("pic8259"), state);
	137	pic8259_ir2_w(machine().device("pic8259"), state);
138	138	}
139	139
140		static WRITE_LINE_DEVICE_HANDLER( i8251_txrdy_int )
	140	WRITE_LINE_MEMBER(tsispch_state::i8251_txrdy_int)
141	141	{
142		pic8259_ir3_w(device->machine().device("pic8259"), state);
	142	pic8259_ir3_w(machine().device("pic8259"), state);
143	143	}
144	144
145	145	const i8251_interface i8251_config =
r18257	r18258
149	149	DEVCB_NULL, // in dsr
150	150	DEVCB_NULL, // out dtr
151	151	DEVCB_NULL, // out rts
152		DEVCB_LINE(i8251_rxrdy_int), // out rxrdy
153		DEVCB_LINE(i8251_txrdy_int), // out txrdy
154		DEVCB_LINE(i8251_txempty_int), // out txempty
	152	DEVCB_DRIVER_LINE_MEMBER(tsispch_state,i8251_rxrdy_int), // out rxrdy
	153	DEVCB_DRIVER_LINE_MEMBER(tsispch_state,i8251_txrdy_int), // out txrdy
	154	DEVCB_DRIVER_LINE_MEMBER(tsispch_state,i8251_txempty_int), // out txempty
155	155	DEVCB_NULL  // out syndet
156	156	};
157	157
r18257	r18258
168	168	/*****************************************************************************
169	169	PIC 8259 stuff
170	170	*****************************************************************************/
171		static WRITE_LINE_DEVICE_HANDLER( pic8259_set_int_line )
	171	WRITE_LINE_MEMBER(tsispch_state::pic8259_set_int_line)
172	172	{
173		device->machine().device("maincpu")->execute().set_input_line(0, state ? HOLD_LINE : CLEAR_LINE);
	173	machine().device("maincpu")->execute().set_input_line(0, state ? HOLD_LINE : CLEAR_LINE);
174	174	}
175	175
176	176	static const struct pic8259_interface pic8259_config =
177	177	{
178		DEVCB_LINE(pic8259_set_int_line),
	178	DEVCB_DRIVER_LINE_MEMBER(tsispch_state,pic8259_set_int_line),
179	179	DEVCB_LINE_VCC,
180	180	DEVCB_NULL
181	181	};

trunk/src/mess/drivers/pcw16.c

r18257	r18258
1312	1312	};
1313	1313
1314	1314
1315		static WRITE_LINE_DEVICE_HANDLER( pcw16_com_interrupt_1 )
	1315	WRITE_LINE_MEMBER(pcw16_state::pcw16_com_interrupt_1)
1316	1316	{
1317		pcw16_state *drvstate = device->machine().driver_data<pcw16_state>();
1318		drvstate->m_system_status &= ~(1 << 4);
	1317	m_system_status &= ~(1 << 4);
1319	1318
1320	1319	if ( state ) {
1321		drvstate->m_system_status |= (1 << 4);
	1320	m_system_status |= (1 << 4);
1322	1321	}
1323	1322
1324		drvstate->pcw16_refresh_ints();
	1323	pcw16_refresh_ints();
1325	1324	}
1326	1325
1327	1326
1328		static WRITE_LINE_DEVICE_HANDLER( pcw16_com_interrupt_2 )
	1327	WRITE_LINE_MEMBER(pcw16_state::pcw16_com_interrupt_2)
1329	1328	{
1330		pcw16_state *drvstate = device->machine().driver_data<pcw16_state>();
1331		drvstate->m_system_status &= ~(1 << 3);
	1329	m_system_status &= ~(1 << 3);
1332	1330
1333	1331	if ( state ) {
1334		drvstate->m_system_status |= (1 << 3);
	1332	m_system_status |= (1 << 3);
1335	1333	}
1336	1334
1337		drvstate->pcw16_refresh_ints();
	1335	pcw16_refresh_ints();
1338	1336	}
1339	1337
1340		static WRITE_LINE_DEVICE_HANDLER( pcw16_com_tx_0 ) { }
1341		static WRITE_LINE_DEVICE_HANDLER( pcw16_com_dtr_0 ) { }
1342		static WRITE_LINE_DEVICE_HANDLER( pcw16_com_rts_0 ) { }
	1338	WRITE_LINE_MEMBER(pcw16_state::pcw16_com_tx_0){ }
	1339	WRITE_LINE_MEMBER(pcw16_state::pcw16_com_dtr_0){ }
	1340	WRITE_LINE_MEMBER(pcw16_state::pcw16_com_rts_0){ }
1343	1341
1344		static WRITE_LINE_DEVICE_HANDLER( pcw16_com_tx_1 ) { }
1345		static WRITE_LINE_DEVICE_HANDLER( pcw16_com_dtr_1 ) { }
1346		static WRITE_LINE_DEVICE_HANDLER( pcw16_com_rts_1 ) { }
	1342	WRITE_LINE_MEMBER(pcw16_state::pcw16_com_tx_1){ }
	1343	WRITE_LINE_MEMBER(pcw16_state::pcw16_com_dtr_1){ }
	1344	WRITE_LINE_MEMBER(pcw16_state::pcw16_com_rts_1){ }
1347	1345
1348	1346	static const ins8250_interface pcw16_com_interface[2]=
1349	1347	{
1350	1348	{
1351		DEVCB_LINE(pcw16_com_tx_0),
1352		DEVCB_LINE(pcw16_com_dtr_0),
1353		DEVCB_LINE(pcw16_com_rts_0),
1354		DEVCB_LINE(pcw16_com_interrupt_1),
	1349	DEVCB_DRIVER_LINE_MEMBER(pcw16_state,pcw16_com_tx_0),
	1350	DEVCB_DRIVER_LINE_MEMBER(pcw16_state,pcw16_com_dtr_0),
	1351	DEVCB_DRIVER_LINE_MEMBER(pcw16_state,pcw16_com_rts_0),
	1352	DEVCB_DRIVER_LINE_MEMBER(pcw16_state,pcw16_com_interrupt_1),
1355	1353	DEVCB_NULL,
1356	1354	DEVCB_NULL
1357	1355	},
1358	1356	{
1359		DEVCB_LINE(pcw16_com_tx_1),
1360		DEVCB_LINE(pcw16_com_dtr_1),
1361		DEVCB_LINE(pcw16_com_rts_1),
1362		DEVCB_LINE(pcw16_com_interrupt_2),
	1357	DEVCB_DRIVER_LINE_MEMBER(pcw16_state,pcw16_com_tx_1),
	1358	DEVCB_DRIVER_LINE_MEMBER(pcw16_state,pcw16_com_dtr_1),
	1359	DEVCB_DRIVER_LINE_MEMBER(pcw16_state,pcw16_com_rts_1),
	1360	DEVCB_DRIVER_LINE_MEMBER(pcw16_state,pcw16_com_interrupt_2),
1363	1361	DEVCB_NULL,
1364	1362	DEVCB_NULL
1365	1363	}

trunk/src/mess/drivers/sms.c

r18257	r18258
306	306	INPUT_PORTS_END
307	307
308	308
309		static WRITE_LINE_DEVICE_HANDLER( sms_int_callback )
	309	WRITE_LINE_MEMBER(sms_state::sms_int_callback)
310	310	{
311		device->machine().device("maincpu")->execute().set_input_line(0, state);
	311	machine().device("maincpu")->execute().set_input_line(0, state);
312	312	}
313	313
314	314	static const sega315_5124_interface _315_5124_ntsc_intf =
315	315	{
316	316	false,
317	317	"screen",
318		DEVCB_LINE(sms_int_callback),
319		DEVCB_LINE(sms_pause_callback)
	318	DEVCB_DRIVER_LINE_MEMBER(sms_state,sms_int_callback),
	319	DEVCB_DRIVER_LINE_MEMBER(sms_state,sms_pause_callback)
320	320	};
321	321
322	322	static const sega315_5124_interface _315_5124_pal_intf =
323	323	{
324	324	true,
325	325	"screen",
326		DEVCB_LINE(sms_int_callback),
327		DEVCB_LINE(sms_pause_callback)
	326	DEVCB_DRIVER_LINE_MEMBER(sms_state,sms_int_callback),
	327	DEVCB_DRIVER_LINE_MEMBER(sms_state,sms_pause_callback)
328	328	};
329	329
330	330	static const sega315_5124_interface sms_store_intf =
331	331	{
332	332	false,
333	333	"screen",
334		DEVCB_LINE(sms_store_int_callback),
335		DEVCB_LINE(sms_pause_callback)
	334	DEVCB_DRIVER_LINE_MEMBER(sms_state,sms_store_int_callback),
	335	DEVCB_DRIVER_LINE_MEMBER(sms_state,sms_pause_callback)
336	336	};
337	337
338	338

trunk/src/mess/drivers/apple2gs.c

r18257	r18258
182	182	/* nothing in the address map - everything is added dynamically */
183	183	ADDRESS_MAP_END
184	184
185		static WRITE8_DEVICE_HANDLER(a2bus_irq_w)
	185	WRITE8_MEMBER(apple2gs_state::a2bus_irq_w)
186	186	{
187	187	if (data)
188	188	{
189		apple2gs_add_irq(space.machine(), IRQ_SLOT);
	189	apple2gs_add_irq(machine(), IRQ_SLOT);
190	190	}
191	191	else
192	192	{
193		apple2gs_remove_irq(space.machine(), IRQ_SLOT);
	193	apple2gs_remove_irq(machine(), IRQ_SLOT);
194	194	}
195	195	}
196	196
197		static WRITE8_DEVICE_HANDLER(a2bus_nmi_w)
	197	WRITE8_MEMBER(apple2gs_state::a2bus_nmi_w)
198	198	{
199		apple2gs_state *a2 = space.machine().driver_data<apple2gs_state>();
200
201		a2->m_maincpu->set_input_line(INPUT_LINE_NMI, data);
	199	m_maincpu->set_input_line(INPUT_LINE_NMI, data);
202	200	}
203	201
204		static WRITE8_DEVICE_HANDLER(a2bus_inh_w)
	202	WRITE8_MEMBER(apple2gs_state::a2bus_inh_w)
205	203	{
206		apple2_state *a2 = space.machine().driver_data<apple2_state>();
207
208		a2->m_inh_slot = data;
209		apple2_update_memory(space.machine());
	204	m_inh_slot = data;
	205	apple2_update_memory(machine());
210	206	}
211	207
212	208	static const struct a2bus_interface a2bus_intf =
213	209	{
214	210	// interrupt lines
215		DEVCB_HANDLER(a2bus_irq_w),
216		DEVCB_HANDLER(a2bus_nmi_w),
217		DEVCB_HANDLER(a2bus_inh_w)
	211	DEVCB_DRIVER_MEMBER(apple2gs_state,a2bus_irq_w),
	212	DEVCB_DRIVER_MEMBER(apple2gs_state,a2bus_nmi_w),
	213	DEVCB_DRIVER_MEMBER(apple2gs_state,a2bus_inh_w)
218	214	};
219	215
220	216	static SLOT_INTERFACE_START(apple2_cards)

trunk/src/mess/drivers/adam.c

r18257	r18258
1497	1497	//  TMS9928a_interface tms9928a_interface
1498	1498	//-------------------------------------------------
1499	1499
1500		static WRITE_LINE_DEVICE_HANDLER(adam_vdp_interrupt)
	1500	WRITE_LINE_MEMBER(adam_state::adam_vdp_interrupt)
1501	1501	{
1502		adam_state *driver_state = device->machine().driver_data<adam_state>();
1503
1504		if (state && !driver_state->m_vdp_nmi)
	1502	if (state && !m_vdp_nmi)
1505	1503	{
1506		device->machine().device(Z80_TAG)->execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE);
	1504	machine().device(Z80_TAG)->execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE);
1507	1505	}
1508	1506
1509		driver_state->m_vdp_nmi = state;
	1507	m_vdp_nmi = state;
1510	1508	}
1511	1509
1512	1510	static TMS9928A_INTERFACE(adam_tms9928a_interface)
1513	1511	{
1514	1512	"screen",
1515	1513	0x4000,
1516		DEVCB_LINE(adam_vdp_interrupt)
	1514	DEVCB_DRIVER_LINE_MEMBER(adam_state,adam_vdp_interrupt)
1517	1515	};
1518	1516
1519	1517	//-------------------------------------------------

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