trunk/src/mess/machine/nes_pcb.c
| r18064 | r18065 | |
| 714 | 714 | |
| 715 | 715 | *************************************************************/ |
| 716 | 716 | |
| 717 | | WRITE8_MEMBER(nes_state::uxrom_w) |
| 717 | WRITE8_MEMBER(nes_carts_state::uxrom_w) |
| 718 | 718 | { |
| 719 | 719 | LOG_MMC(("uxrom_w, offset: %04x, data: %02x\n", offset, data)); |
| 720 | 720 | |
| r18064 | r18065 | |
| 737 | 737 | |
| 738 | 738 | *************************************************************/ |
| 739 | 739 | |
| 740 | | WRITE8_MEMBER(nes_state::uxrom_cc_w) |
| 740 | WRITE8_MEMBER(nes_carts_state::uxrom_cc_w) |
| 741 | 741 | { |
| 742 | 742 | LOG_MMC(("uxrom_cc_w, offset: %04x, data: %02x\n", offset, data)); |
| 743 | 743 | |
| r18064 | r18065 | |
| 760 | 760 | |
| 761 | 761 | *************************************************************/ |
| 762 | 762 | |
| 763 | | WRITE8_MEMBER(nes_state::un1rom_w) |
| 763 | WRITE8_MEMBER(nes_carts_state::un1rom_w) |
| 764 | 764 | { |
| 765 | 765 | LOG_MMC(("un1rom_w, offset: %04x, data: %02x\n", offset, data)); |
| 766 | 766 | |
| r18064 | r18065 | |
| 791 | 791 | |
| 792 | 792 | *************************************************************/ |
| 793 | 793 | |
| 794 | | WRITE8_MEMBER(nes_state::cnrom_w) |
| 794 | WRITE8_MEMBER(nes_carts_state::cnrom_w) |
| 795 | 795 | { |
| 796 | 796 | LOG_MMC(("cnrom_w, offset: %04x, data: %02x\n", offset, data)); |
| 797 | 797 | |
| r18064 | r18065 | |
| 820 | 820 | |
| 821 | 821 | *************************************************************/ |
| 822 | 822 | |
| 823 | | WRITE8_MEMBER(nes_state::bandai_pt554_m_w) |
| 823 | WRITE8_MEMBER(nes_carts_state::bandai_pt554_m_w) |
| 824 | 824 | { |
| 825 | 825 | LOG_MMC(("Bandai PT-554 Sound write, data: %02x\n", data)); |
| 826 | 826 | |
| r18064 | r18065 | |
| 845 | 845 | |
| 846 | 846 | *************************************************************/ |
| 847 | 847 | |
| 848 | | WRITE8_MEMBER(nes_state::cprom_w) |
| 848 | WRITE8_MEMBER(nes_carts_state::cprom_w) |
| 849 | 849 | { |
| 850 | 850 | LOG_MMC(("cprom_w, offset: %04x, data: %02x\n", offset, data)); |
| 851 | 851 | chr4_4(machine(), data, CHRRAM); |
| r18064 | r18065 | |
| 867 | 867 | |
| 868 | 868 | *************************************************************/ |
| 869 | 869 | |
| 870 | | WRITE8_MEMBER(nes_state::axrom_w) |
| 870 | WRITE8_MEMBER(nes_carts_state::axrom_w) |
| 871 | 871 | { |
| 872 | 872 | LOG_MMC(("axrom_w, offset: %04x, data: %02x\n", offset, data)); |
| 873 | 873 | |
| r18064 | r18065 | |
| 887 | 887 | |
| 888 | 888 | *************************************************************/ |
| 889 | 889 | |
| 890 | | WRITE8_MEMBER(nes_state::bxrom_w) |
| 890 | WRITE8_MEMBER(nes_carts_state::bxrom_w) |
| 891 | 891 | { |
| 892 | 892 | /* This portion of the mapper is nearly identical to Mapper 7, except no one-screen mirroring */ |
| 893 | 893 | /* Deadly Towers is really a BxROM game - the demo screens look wrong using mapper 7. */ |
| r18064 | r18065 | |
| 908 | 908 | |
| 909 | 909 | *************************************************************/ |
| 910 | 910 | |
| 911 | | WRITE8_MEMBER(nes_state::gxrom_w) |
| 911 | WRITE8_MEMBER(nes_carts_state::gxrom_w) |
| 912 | 912 | { |
| 913 | 913 | LOG_MMC(("gxrom_w, offset %04x, data: %02x\n", offset, data)); |
| 914 | 914 | |
| r18064 | r18065 | |
| 1100 | 1100 | } |
| 1101 | 1101 | } |
| 1102 | 1102 | |
| 1103 | | WRITE8_MEMBER(nes_state::sxrom_w) |
| 1103 | WRITE8_MEMBER(nes_carts_state::sxrom_w) |
| 1104 | 1104 | { |
| 1105 | | |
| 1106 | 1105 | LOG_MMC(("sxrom_w, offset: %04x, data: %02x\n", offset, data)); |
| 1107 | 1106 | common_sxrom_write_handler(space, offset, data, m_pcb_id); |
| 1108 | 1107 | } |
| r18064 | r18065 | |
| 1148 | 1147 | } |
| 1149 | 1148 | } |
| 1150 | 1149 | |
| 1151 | | WRITE8_MEMBER(nes_state::pxrom_w) |
| 1150 | WRITE8_MEMBER(nes_carts_state::pxrom_w) |
| 1152 | 1151 | { |
| 1153 | 1152 | LOG_MMC(("pxrom_w, offset: %04x, data: %02x\n", offset, data)); |
| 1154 | 1153 | switch (offset & 0x7000) |
| r18064 | r18065 | |
| 1197 | 1196 | |
| 1198 | 1197 | *************************************************************/ |
| 1199 | 1198 | |
| 1200 | | WRITE8_MEMBER(nes_state::fxrom_w) |
| 1199 | WRITE8_MEMBER(nes_carts_state::fxrom_w) |
| 1201 | 1200 | { |
| 1202 | 1201 | LOG_MMC(("fxrom_w, offset: %04x, data: %02x\n", offset, data)); |
| 1203 | 1202 | switch (offset & 0x7000) |
| r18064 | r18065 | |
| 1294 | 1293 | state->m_IRQ_clear = 0; |
| 1295 | 1294 | } |
| 1296 | 1295 | |
| 1297 | | WRITE8_MEMBER(nes_state::txrom_w) |
| 1296 | WRITE8_MEMBER(nes_carts_state::txrom_w) |
| 1298 | 1297 | { |
| 1299 | 1298 | UINT8 mmc_helper, cmd; |
| 1300 | 1299 | |
| r18064 | r18065 | |
| 1371 | 1370 | |
| 1372 | 1371 | *************************************************************/ |
| 1373 | 1372 | |
| 1374 | | WRITE8_MEMBER(nes_state::hkrom_m_w) |
| 1373 | WRITE8_MEMBER(nes_carts_state::hkrom_m_w) |
| 1375 | 1374 | { |
| 1376 | 1375 | UINT8 write_hi, write_lo; |
| 1377 | 1376 | LOG_MMC(("hkrom_m_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 1390 | 1389 | m_mapper_bram[offset & (m_mapper_bram_size - 1)] = data; |
| 1391 | 1390 | } |
| 1392 | 1391 | |
| 1393 | | READ8_MEMBER(nes_state::hkrom_m_r) |
| 1392 | READ8_MEMBER(nes_carts_state::hkrom_m_r) |
| 1394 | 1393 | { |
| 1395 | 1394 | LOG_MMC(("hkrom_m_r, offset: %04x\n", offset)); |
| 1396 | 1395 | |
| r18064 | r18065 | |
| 1410 | 1409 | return 0x00; |
| 1411 | 1410 | } |
| 1412 | 1411 | |
| 1413 | | WRITE8_MEMBER(nes_state::hkrom_w) |
| 1412 | WRITE8_MEMBER(nes_carts_state::hkrom_w) |
| 1414 | 1413 | { |
| 1415 | 1414 | UINT8 mmc6_helper; |
| 1416 | 1415 | LOG_MMC(("hkrom_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 1487 | 1486 | chr1_x(machine, start, bank, source); |
| 1488 | 1487 | } |
| 1489 | 1488 | |
| 1490 | | WRITE8_MEMBER(nes_state::txsrom_w) |
| 1489 | WRITE8_MEMBER(nes_carts_state::txsrom_w) |
| 1491 | 1490 | { |
| 1492 | 1491 | LOG_MMC(("txsrom_w, offset: %04x, data: %02x\n", offset, data)); |
| 1493 | 1492 | |
| r18064 | r18065 | |
| 1537 | 1536 | chr1_x(machine, chr_page ^ 7, (state->m_mmc_vrom_bank[5] & chr_mask[5]), chr_src[5]); |
| 1538 | 1537 | } |
| 1539 | 1538 | |
| 1540 | | WRITE8_MEMBER(nes_state::tqrom_w) |
| 1539 | WRITE8_MEMBER(nes_carts_state::tqrom_w) |
| 1541 | 1540 | { |
| 1542 | 1541 | UINT8 mmc_helper, cmd; |
| 1543 | 1542 | LOG_MMC(("tqrom_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 1588 | 1587 | |
| 1589 | 1588 | *************************************************************/ |
| 1590 | 1589 | |
| 1591 | | WRITE8_MEMBER(nes_state::zz_m_w) |
| 1590 | WRITE8_MEMBER(nes_carts_state::zz_m_w) |
| 1592 | 1591 | { |
| 1593 | 1592 | UINT8 mmc_helper = data & 0x07; |
| 1594 | 1593 | LOG_MMC(("zz_m_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 1610 | 1609 | |
| 1611 | 1610 | *************************************************************/ |
| 1612 | 1611 | |
| 1613 | | WRITE8_MEMBER(nes_state::qj_m_w) |
| 1612 | WRITE8_MEMBER(nes_carts_state::qj_m_w) |
| 1614 | 1613 | { |
| 1615 | 1614 | LOG_MMC(("qj_m_w, offset: %04x, data: %02x\n", offset, data)); |
| 1616 | 1615 | |
| r18064 | r18065 | |
| 1846 | 1845 | } |
| 1847 | 1846 | } |
| 1848 | 1847 | |
| 1849 | | READ8_MEMBER(nes_state::exrom_l_r) |
| 1848 | READ8_MEMBER(nes_carts_state::exrom_l_r) |
| 1850 | 1849 | { |
| 1851 | 1850 | int retVal; |
| 1852 | 1851 | |
| r18064 | r18065 | |
| 1882 | 1881 | } |
| 1883 | 1882 | |
| 1884 | 1883 | |
| 1885 | | WRITE8_MEMBER(nes_state::exrom_l_w) |
| 1884 | WRITE8_MEMBER(nes_carts_state::exrom_l_w) |
| 1886 | 1885 | { |
| 1887 | 1886 | |
| 1888 | 1887 | // LOG_MMC(("Mapper 5 write, offset: %04x, data: %02x\n", offset + 0x4100, data)); |
| r18064 | r18065 | |
| 2383 | 2382 | } |
| 2384 | 2383 | } |
| 2385 | 2384 | |
| 2386 | | WRITE8_MEMBER(nes_state::ntbrom_w) |
| 2385 | WRITE8_MEMBER(nes_carts_state::ntbrom_w) |
| 2387 | 2386 | { |
| 2388 | 2387 | |
| 2389 | 2388 | LOG_MMC(("ntbrom_w, offset %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 2461 | 2460 | } |
| 2462 | 2461 | } |
| 2463 | 2462 | |
| 2464 | | WRITE8_MEMBER(nes_state::jxrom_w) |
| 2463 | WRITE8_MEMBER(nes_carts_state::jxrom_w) |
| 2465 | 2464 | { |
| 2466 | 2465 | LOG_MMC(("jxrom_w, offset %04x, data: %02x\n", offset, data)); |
| 2467 | 2466 | |
| r18064 | r18065 | |
| 2553 | 2552 | |
| 2554 | 2553 | *************************************************************/ |
| 2555 | 2554 | |
| 2556 | | WRITE8_MEMBER(nes_state::dxrom_w) |
| 2555 | WRITE8_MEMBER(nes_carts_state::dxrom_w) |
| 2557 | 2556 | { |
| 2558 | 2557 | LOG_MMC(("dxrom_w, offset: %04x, data: %02x\n", offset, data)); |
| 2559 | 2558 | |
| r18064 | r18065 | |
| 2595 | 2594 | |
| 2596 | 2595 | *************************************************************/ |
| 2597 | 2596 | |
| 2598 | | WRITE8_MEMBER(nes_state::namcot3453_w) |
| 2597 | WRITE8_MEMBER(nes_carts_state::namcot3453_w) |
| 2599 | 2598 | { |
| 2600 | 2599 | LOG_MMC(("namcot3453_w, offset: %04x, data: %02x\n", offset, data)); |
| 2601 | 2600 | |
| r18064 | r18065 | |
| 2618 | 2617 | |
| 2619 | 2618 | *************************************************************/ |
| 2620 | 2619 | |
| 2621 | | WRITE8_MEMBER(nes_state::namcot3446_w) |
| 2620 | WRITE8_MEMBER(nes_carts_state::namcot3446_w) |
| 2622 | 2621 | { |
| 2623 | 2622 | LOG_MMC(("namcot3446_w, offset: %04x, data: %02x\n", offset, data)); |
| 2624 | 2623 | |
| r18064 | r18065 | |
| 2662 | 2661 | |
| 2663 | 2662 | *************************************************************/ |
| 2664 | 2663 | |
| 2665 | | WRITE8_MEMBER(nes_state::namcot3425_w) |
| 2664 | WRITE8_MEMBER(nes_carts_state::namcot3425_w) |
| 2666 | 2665 | { |
| 2667 | 2666 | UINT8 mode; |
| 2668 | 2667 | LOG_MMC(("namcot3425_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 2715 | 2714 | |
| 2716 | 2715 | *************************************************************/ |
| 2717 | 2716 | |
| 2718 | | WRITE8_MEMBER(nes_state::dis_74x377_w) |
| 2717 | WRITE8_MEMBER(nes_carts_state::dis_74x377_w) |
| 2719 | 2718 | { |
| 2720 | 2719 | LOG_MMC(("dis_74x377_w, offset: %04x, data: %02x\n", offset, data)); |
| 2721 | 2720 | |
| r18064 | r18065 | |
| 2731 | 2730 | |
| 2732 | 2731 | *************************************************************/ |
| 2733 | 2732 | |
| 2734 | | WRITE8_MEMBER(nes_state::dis_74x139x74_m_w) |
| 2733 | WRITE8_MEMBER(nes_carts_state::dis_74x139x74_m_w) |
| 2735 | 2734 | { |
| 2736 | 2735 | LOG_MMC(("dis_74x139x74_m_w, offset: %04x, data: %02x\n", offset, data)); |
| 2737 | 2736 | |
| r18064 | r18065 | |
| 2748 | 2747 | |
| 2749 | 2748 | *************************************************************/ |
| 2750 | 2749 | |
| 2751 | | WRITE8_MEMBER(nes_state::dis_74x161x138_m_w) |
| 2750 | WRITE8_MEMBER(nes_carts_state::dis_74x161x138_m_w) |
| 2752 | 2751 | { |
| 2753 | 2752 | LOG_MMC(("dis_74x161x138_m_w, offset: %04x, data: %02x\n", offset, data)); |
| 2754 | 2753 | |
| r18064 | r18065 | |
| 2768 | 2767 | |
| 2769 | 2768 | *************************************************************/ |
| 2770 | 2769 | |
| 2771 | | WRITE8_MEMBER(nes_state::dis_74x161x161x32_w) |
| 2770 | WRITE8_MEMBER(nes_carts_state::dis_74x161x161x32_w) |
| 2772 | 2771 | { |
| 2773 | 2772 | LOG_MMC(("dis_74x161x161x32_w, offset: %04x, data: %02x\n", offset, data)); |
| 2774 | 2773 | |
| r18064 | r18065 | |
| 2821 | 2820 | } |
| 2822 | 2821 | } |
| 2823 | 2822 | |
| 2824 | | WRITE8_MEMBER(nes_state::lz93d50_w) |
| 2823 | WRITE8_MEMBER(nes_carts_state::lz93d50_w) |
| 2825 | 2824 | { |
| 2826 | 2825 | LOG_MMC(("lz93d50_w, offset: %04x, data: %02x\n", offset, data)); |
| 2827 | 2826 | |
| r18064 | r18065 | |
| 2858 | 2857 | } |
| 2859 | 2858 | } |
| 2860 | 2859 | |
| 2861 | | WRITE8_MEMBER(nes_state::lz93d50_m_w) |
| 2860 | WRITE8_MEMBER(nes_carts_state::lz93d50_m_w) |
| 2862 | 2861 | { |
| 2863 | 2862 | LOG_MMC(("lz93d50_m_w, offset: %04x, data: %02x\n", offset, data)); |
| 2864 | 2863 | |
| r18064 | r18065 | |
| 2883 | 2882 | prg16_cdef(machine, mmc_helper | 0x0f); |
| 2884 | 2883 | } |
| 2885 | 2884 | |
| 2886 | | WRITE8_MEMBER(nes_state::fjump2_w) |
| 2885 | WRITE8_MEMBER(nes_carts_state::fjump2_w) |
| 2887 | 2886 | { |
| 2888 | 2887 | LOG_MMC(("fjump2_w, offset: %04x, data: %02x\n", offset, data)); |
| 2889 | 2888 | |
| r18064 | r18065 | |
| 2916 | 2915 | |
| 2917 | 2916 | *************************************************************/ |
| 2918 | 2917 | |
| 2919 | | WRITE8_MEMBER(nes_state::bandai_ks_w) |
| 2918 | WRITE8_MEMBER(nes_carts_state::bandai_ks_w) |
| 2920 | 2919 | { |
| 2921 | 2920 | LOG_MMC(("bandai_ks_w, offset: %04x, data: %02x\n", offset, data)); |
| 2922 | 2921 | |
| r18064 | r18065 | |
| 2936 | 2935 | |
| 2937 | 2936 | *************************************************************/ |
| 2938 | 2937 | |
| 2939 | | WRITE8_MEMBER(nes_state::bandai_ok_w) |
| 2938 | WRITE8_MEMBER(nes_carts_state::bandai_ok_w) |
| 2940 | 2939 | { |
| 2941 | 2940 | UINT8 mmc_helper; |
| 2942 | 2941 | LOG_MMC(("mapper96_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 2959 | 2958 | |
| 2960 | 2959 | *************************************************************/ |
| 2961 | 2960 | |
| 2962 | | WRITE8_MEMBER(nes_state::lrog017_w) |
| 2961 | WRITE8_MEMBER(nes_carts_state::lrog017_w) |
| 2963 | 2962 | { |
| 2964 | 2963 | LOG_MMC(("lrog017_w, offset: %04x, data: %02x\n", offset, data)); |
| 2965 | 2964 | |
| r18064 | r18065 | |
| 2975 | 2974 | |
| 2976 | 2975 | *************************************************************/ |
| 2977 | 2976 | |
| 2978 | | WRITE8_MEMBER(nes_state::irem_hd_w) |
| 2977 | WRITE8_MEMBER(nes_carts_state::irem_hd_w) |
| 2979 | 2978 | { |
| 2980 | 2979 | LOG_MMC(("irem_hd_w, offset: %04x, data: %02x\n", offset, data)); |
| 2981 | 2980 | |
| r18064 | r18065 | |
| 2996 | 2995 | |
| 2997 | 2996 | *************************************************************/ |
| 2998 | 2997 | |
| 2999 | | WRITE8_MEMBER(nes_state::tam_s1_w) |
| 2998 | WRITE8_MEMBER(nes_carts_state::tam_s1_w) |
| 3000 | 2999 | { |
| 3001 | 3000 | LOG_MMC(("tam_s1_w, offset: %04x, data: %02x\n", offset, data)); |
| 3002 | 3001 | |
| r18064 | r18065 | |
| 3017 | 3016 | |
| 3018 | 3017 | *************************************************************/ |
| 3019 | 3018 | |
| 3020 | | WRITE8_MEMBER(nes_state::g101_w) |
| 3019 | WRITE8_MEMBER(nes_carts_state::g101_w) |
| 3021 | 3020 | { |
| 3022 | 3021 | LOG_MMC(("g101_w, offset: %04x, data: %02x\n", offset, data)); |
| 3023 | 3022 | |
| r18064 | r18065 | |
| 3072 | 3071 | } |
| 3073 | 3072 | } |
| 3074 | 3073 | |
| 3075 | | WRITE8_MEMBER(nes_state::h3001_w) |
| 3074 | WRITE8_MEMBER(nes_carts_state::h3001_w) |
| 3076 | 3075 | { |
| 3077 | 3076 | LOG_MMC(("h3001_w, offset %04x, data: %02x\n", offset, data)); |
| 3078 | 3077 | |
| r18064 | r18065 | |
| 3184 | 3183 | } |
| 3185 | 3184 | } |
| 3186 | 3185 | |
| 3187 | | WRITE8_MEMBER(nes_state::ss88006_w) |
| 3186 | WRITE8_MEMBER(nes_carts_state::ss88006_w) |
| 3188 | 3187 | { |
| 3189 | 3188 | UINT8 bank; |
| 3190 | 3189 | LOG_MMC(("mapper18_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 3281 | 3280 | |
| 3282 | 3281 | *************************************************************/ |
| 3283 | 3282 | |
| 3284 | | WRITE8_MEMBER(nes_state::jf11_m_w) |
| 3283 | WRITE8_MEMBER(nes_carts_state::jf11_m_w) |
| 3285 | 3284 | { |
| 3286 | 3285 | LOG_MMC(("jf11_m_w, offset: %04x, data: %02x\n", offset, data)); |
| 3287 | 3286 | chr8(machine(), data, CHRROM); |
| r18064 | r18065 | |
| 3302 | 3301 | |
| 3303 | 3302 | *************************************************************/ |
| 3304 | 3303 | |
| 3305 | | WRITE8_MEMBER(nes_state::jf13_m_w) |
| 3304 | WRITE8_MEMBER(nes_carts_state::jf13_m_w) |
| 3306 | 3305 | { |
| 3307 | 3306 | LOG_MMC(("jf13_m_w, offset: %04x, data: %02x\n", offset, data)); |
| 3308 | 3307 | |
| r18064 | r18065 | |
| 3331 | 3330 | |
| 3332 | 3331 | *************************************************************/ |
| 3333 | 3332 | |
| 3334 | | WRITE8_MEMBER(nes_state::jf16_w) |
| 3333 | WRITE8_MEMBER(nes_carts_state::jf16_w) |
| 3335 | 3334 | { |
| 3336 | 3335 | LOG_MMC(("jf16_w, offset: %04x, data: %02x\n", offset, data)); |
| 3337 | 3336 | |
| r18064 | r18065 | |
| 3355 | 3354 | |
| 3356 | 3355 | *************************************************************/ |
| 3357 | 3356 | |
| 3358 | | WRITE8_MEMBER(nes_state::jf17_w) |
| 3357 | WRITE8_MEMBER(nes_carts_state::jf17_w) |
| 3359 | 3358 | { |
| 3360 | 3359 | LOG_MMC(("jf17_w, offset: %04x, data: %02x\n", offset, data)); |
| 3361 | 3360 | |
| r18064 | r18065 | |
| 3381 | 3380 | |
| 3382 | 3381 | *************************************************************/ |
| 3383 | 3382 | |
| 3384 | | WRITE8_MEMBER(nes_state::jf19_w) |
| 3383 | WRITE8_MEMBER(nes_carts_state::jf19_w) |
| 3385 | 3384 | { |
| 3386 | 3385 | LOG_MMC(("jf19_w, offset: %04x, data: %02x\n", offset, data)); |
| 3387 | 3386 | |
| r18064 | r18065 | |
| 3405 | 3404 | |
| 3406 | 3405 | *************************************************************/ |
| 3407 | 3406 | |
| 3408 | | WRITE8_MEMBER(nes_state::konami_vrc1_w) |
| 3407 | WRITE8_MEMBER(nes_carts_state::konami_vrc1_w) |
| 3409 | 3408 | { |
| 3410 | 3409 | LOG_MMC(("konami_vrc1_w, offset: %04x, data: %02x\n", offset, data)); |
| 3411 | 3410 | |
| r18064 | r18065 | |
| 3446 | 3445 | |
| 3447 | 3446 | *************************************************************/ |
| 3448 | 3447 | |
| 3449 | | WRITE8_MEMBER(nes_state::konami_vrc2_w) |
| 3448 | WRITE8_MEMBER(nes_carts_state::konami_vrc2_w) |
| 3450 | 3449 | { |
| 3451 | 3450 | UINT8 bank, shift, mask; |
| 3452 | 3451 | UINT32 shifted_offs = (offset & 0x7000) |
| r18064 | r18065 | |
| 3493 | 3492 | |
| 3494 | 3493 | *************************************************************/ |
| 3495 | 3494 | |
| 3496 | | WRITE8_MEMBER(nes_state::konami_vrc3_w) |
| 3495 | WRITE8_MEMBER(nes_carts_state::konami_vrc3_w) |
| 3497 | 3496 | { |
| 3498 | 3497 | LOG_MMC(("konami_vrc3_w, offset: %04x, data: %02x\n", offset, data)); |
| 3499 | 3498 | |
| r18064 | r18065 | |
| 3560 | 3559 | } |
| 3561 | 3560 | } |
| 3562 | 3561 | |
| 3563 | | WRITE8_MEMBER(nes_state::konami_vrc4_w) |
| 3562 | WRITE8_MEMBER(nes_carts_state::konami_vrc4_w) |
| 3564 | 3563 | { |
| 3565 | 3564 | UINT8 bank, shift, mask; |
| 3566 | 3565 | UINT32 shifted_offs = (offset & 0x7000) |
| r18064 | r18065 | |
| 3648 | 3647 | |
| 3649 | 3648 | *************************************************************/ |
| 3650 | 3649 | |
| 3651 | | WRITE8_MEMBER(nes_state::konami_vrc6_w) |
| 3650 | WRITE8_MEMBER(nes_carts_state::konami_vrc6_w) |
| 3652 | 3651 | { |
| 3653 | 3652 | UINT8 bank; |
| 3654 | 3653 | UINT32 shifted_offs = (offset & 0x7000) |
| r18064 | r18065 | |
| 3727 | 3726 | |
| 3728 | 3727 | *************************************************************/ |
| 3729 | 3728 | |
| 3730 | | WRITE8_MEMBER(nes_state::konami_vrc7_w) |
| 3729 | WRITE8_MEMBER(nes_carts_state::konami_vrc7_w) |
| 3731 | 3730 | { |
| 3732 | 3731 | UINT8 bank; |
| 3733 | 3732 | LOG_MMC(("konami_vrc7_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 3830 | 3829 | } |
| 3831 | 3830 | } |
| 3832 | 3831 | |
| 3833 | | WRITE8_MEMBER(nes_state::namcot163_l_w) |
| 3832 | WRITE8_MEMBER(nes_carts_state::namcot163_l_w) |
| 3834 | 3833 | { |
| 3835 | 3834 | LOG_MMC(("namcot163_l_w, offset: %04x, data: %02x\n", offset, data)); |
| 3836 | 3835 | offset += 0x100; |
| r18064 | r18065 | |
| 3850 | 3849 | } |
| 3851 | 3850 | } |
| 3852 | 3851 | |
| 3853 | | READ8_MEMBER(nes_state::namcot163_l_r) |
| 3852 | READ8_MEMBER(nes_carts_state::namcot163_l_r) |
| 3854 | 3853 | { |
| 3855 | 3854 | LOG_MMC(("namcot163_l_r, offset: %04x\n", offset)); |
| 3856 | 3855 | offset += 0x100; |
| r18064 | r18065 | |
| 3876 | 3875 | set_nt_page(machine, page, ROM, data, 0); |
| 3877 | 3876 | } |
| 3878 | 3877 | |
| 3879 | | WRITE8_MEMBER(nes_state::namcot163_w) |
| 3878 | WRITE8_MEMBER(nes_carts_state::namcot163_w) |
| 3880 | 3879 | { |
| 3881 | 3880 | LOG_MMC(("namcot163_w, offset: %04x, data: %02x\n", offset, data)); |
| 3882 | 3881 | switch (offset & 0x7800) |
| r18064 | r18065 | |
| 3927 | 3926 | |
| 3928 | 3927 | *************************************************************/ |
| 3929 | 3928 | |
| 3930 | | WRITE8_MEMBER(nes_state::sunsoft1_m_w) |
| 3929 | WRITE8_MEMBER(nes_carts_state::sunsoft1_m_w) |
| 3931 | 3930 | { |
| 3932 | 3931 | LOG_MMC(("sunsoft1_m_w, offset: %04x, data: %02x\n", offset, data)); |
| 3933 | 3932 | |
| r18064 | r18065 | |
| 3951 | 3950 | |
| 3952 | 3951 | *************************************************************/ |
| 3953 | 3952 | |
| 3954 | | WRITE8_MEMBER(nes_state::sunsoft2_w) |
| 3953 | WRITE8_MEMBER(nes_carts_state::sunsoft2_w) |
| 3955 | 3954 | { |
| 3956 | 3955 | UINT8 sunsoft_helper = (data & 0x07) | ((data & 0x80) ? 0x08 : 0x00); |
| 3957 | 3956 | LOG_MMC(("sunsoft2_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 3997 | 3996 | } |
| 3998 | 3997 | } |
| 3999 | 3998 | |
| 4000 | | WRITE8_MEMBER(nes_state::sunsoft3_w) |
| 3999 | WRITE8_MEMBER(nes_carts_state::sunsoft3_w) |
| 4001 | 4000 | { |
| 4002 | 4001 | LOG_MMC(("sunsoft3_w, offset %04x, data: %02x\n", offset, data)); |
| 4003 | 4002 | |
| r18064 | r18065 | |
| 4059 | 4058 | |
| 4060 | 4059 | *************************************************************/ |
| 4061 | 4060 | |
| 4062 | | WRITE8_MEMBER(nes_state::tc0190fmc_w) |
| 4061 | WRITE8_MEMBER(nes_carts_state::tc0190fmc_w) |
| 4063 | 4062 | { |
| 4064 | 4063 | LOG_MMC(("tc0190fmc_w, offset: %04x, data: %02x\n", offset, data)); |
| 4065 | 4064 | |
| r18064 | r18065 | |
| 4112 | 4111 | |
| 4113 | 4112 | *************************************************************/ |
| 4114 | 4113 | |
| 4115 | | WRITE8_MEMBER(nes_state::tc0190fmc_p16_w) |
| 4114 | WRITE8_MEMBER(nes_carts_state::tc0190fmc_p16_w) |
| 4116 | 4115 | { |
| 4117 | 4116 | LOG_MMC(("tc0190fmc_p16_w, offset: %04x, data: %02x\n", offset, data)); |
| 4118 | 4117 | |
| r18064 | r18065 | |
| 4162 | 4161 | |
| 4163 | 4162 | *************************************************************/ |
| 4164 | 4163 | |
| 4165 | | WRITE8_MEMBER(nes_state::x1005_m_w) |
| 4164 | WRITE8_MEMBER(nes_carts_state::x1005_m_w) |
| 4166 | 4165 | { |
| 4167 | 4166 | LOG_MMC(("x1005_m_w, offset: %04x, data: %02x\n", offset, data)); |
| 4168 | 4167 | |
| r18064 | r18065 | |
| 4217 | 4216 | m_mapper_bram[offset & (m_mapper_bram_size - 1)] = data; |
| 4218 | 4217 | } |
| 4219 | 4218 | |
| 4220 | | READ8_MEMBER(nes_state::x1005_m_r) |
| 4219 | READ8_MEMBER(nes_carts_state::x1005_m_r) |
| 4221 | 4220 | { |
| 4222 | 4221 | LOG_MMC(("x1005a_m_r, offset: %04x\n", offset)); |
| 4223 | 4222 | |
| r18064 | r18065 | |
| 4229 | 4228 | return 0xff; |
| 4230 | 4229 | } |
| 4231 | 4230 | |
| 4232 | | WRITE8_MEMBER(nes_state::x1005a_m_w) |
| 4231 | WRITE8_MEMBER(nes_carts_state::x1005a_m_w) |
| 4233 | 4232 | { |
| 4234 | 4233 | LOG_MMC(("x1005a_m_w, offset: %04x, data: %02x\n", offset, data)); |
| 4235 | 4234 | |
| r18064 | r18065 | |
| 4287 | 4286 | chr1_x(machine, 7 ^ state->m_mmc_latch1, state->m_mmc_vrom_bank[5], CHRROM); |
| 4288 | 4287 | } |
| 4289 | 4288 | |
| 4290 | | WRITE8_MEMBER(nes_state::x1017_m_w) |
| 4289 | WRITE8_MEMBER(nes_carts_state::x1017_m_w) |
| 4291 | 4290 | { |
| 4292 | 4291 | UINT8 reg = offset & 0x07; |
| 4293 | 4292 | LOG_MMC(("x1017_m_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 4337 | 4336 | } |
| 4338 | 4337 | } |
| 4339 | 4338 | |
| 4340 | | READ8_MEMBER(nes_state::x1017_m_r) |
| 4339 | READ8_MEMBER(nes_carts_state::x1017_m_r) |
| 4341 | 4340 | { |
| 4342 | 4341 | LOG_MMC(("x1017_m_r, offset: %04x\n", offset)); |
| 4343 | 4342 | |
| r18064 | r18065 | |
| 4370 | 4369 | |
| 4371 | 4370 | *************************************************************/ |
| 4372 | 4371 | |
| 4373 | | WRITE8_MEMBER(nes_state::agci_50282_w) |
| 4372 | WRITE8_MEMBER(nes_carts_state::agci_50282_w) |
| 4374 | 4373 | { |
| 4375 | 4374 | LOG_MMC(("agci_50282_w, offset: %04x, data: %02x\n", offset, data)); |
| 4376 | 4375 | |
| r18064 | r18065 | |
| 4389 | 4388 | |
| 4390 | 4389 | *************************************************************/ |
| 4391 | 4390 | |
| 4392 | | WRITE8_MEMBER(nes_state::nina01_m_w) |
| 4391 | WRITE8_MEMBER(nes_carts_state::nina01_m_w) |
| 4393 | 4392 | { |
| 4394 | 4393 | LOG_MMC(("nina01_m_w, offset: %04x, data: %02x\n", offset, data)); |
| 4395 | 4394 | |
| r18064 | r18065 | |
| 4420 | 4419 | |
| 4421 | 4420 | *************************************************************/ |
| 4422 | 4421 | |
| 4423 | | WRITE8_MEMBER(nes_state::nina06_l_w) |
| 4422 | WRITE8_MEMBER(nes_carts_state::nina06_l_w) |
| 4424 | 4423 | { |
| 4425 | 4424 | LOG_MMC(("nina06_l_w, offset: %04x, data: %02x\n", offset, data)); |
| 4426 | 4425 | |
| r18064 | r18065 | |
| 4439 | 4438 | |
| 4440 | 4439 | *************************************************************/ |
| 4441 | 4440 | |
| 4442 | | WRITE8_MEMBER(nes_state::ae_act52_w) |
| 4441 | WRITE8_MEMBER(nes_carts_state::ae_act52_w) |
| 4443 | 4442 | { |
| 4444 | 4443 | int pbank, cbank; |
| 4445 | 4444 | UINT8 pmode; |
| r18064 | r18065 | |
| 4477 | 4476 | |
| 4478 | 4477 | *************************************************************/ |
| 4479 | 4478 | |
| 4480 | | WRITE8_MEMBER(nes_state::cne_decathl_w) |
| 4479 | WRITE8_MEMBER(nes_carts_state::cne_decathl_w) |
| 4481 | 4480 | { |
| 4482 | 4481 | LOG_MMC(("cne_decathl_w, offset: %04x, data: %02x\n", offset, data)); |
| 4483 | 4482 | |
| r18064 | r18065 | |
| 4511 | 4510 | |
| 4512 | 4511 | *************************************************************/ |
| 4513 | 4512 | |
| 4514 | | WRITE8_MEMBER(nes_state::cne_fsb_m_w) |
| 4513 | WRITE8_MEMBER(nes_carts_state::cne_fsb_m_w) |
| 4515 | 4514 | { |
| 4516 | 4515 | LOG_MMC(("cne_fsb_m_w, offset: %04x, data: %02x\n", offset, data)); |
| 4517 | 4516 | |
| r18064 | r18065 | |
| 4566 | 4565 | |
| 4567 | 4566 | *************************************************************/ |
| 4568 | 4567 | |
| 4569 | | WRITE8_MEMBER(nes_state::cne_shlz_l_w) |
| 4568 | WRITE8_MEMBER(nes_carts_state::cne_shlz_l_w) |
| 4570 | 4569 | { |
| 4571 | 4570 | LOG_MMC(("cne_shlz_l_w, offset: %04x, data: %02x\n", offset, data)); |
| 4572 | 4571 | |
| r18064 | r18065 | |
| 4586 | 4585 | |
| 4587 | 4586 | *************************************************************/ |
| 4588 | 4587 | |
| 4589 | | WRITE8_MEMBER(nes_state::caltron6in1_m_w) |
| 4588 | WRITE8_MEMBER(nes_carts_state::caltron6in1_m_w) |
| 4590 | 4589 | { |
| 4591 | 4590 | LOG_MMC(("caltron6in1_m_w, offset: %04x, data: %02x\n", offset, data)); |
| 4592 | 4591 | |
| r18064 | r18065 | |
| 4595 | 4594 | prg32(machine(), offset & 0x07); |
| 4596 | 4595 | } |
| 4597 | 4596 | |
| 4598 | | WRITE8_MEMBER(nes_state::caltron6in1_w) |
| 4597 | WRITE8_MEMBER(nes_carts_state::caltron6in1_w) |
| 4599 | 4598 | { |
| 4600 | 4599 | LOG_MMC(("caltron6in1_w, offset: %04x, data: %02x\n", offset, data)); |
| 4601 | 4600 | |
| r18064 | r18065 | |
| 4620 | 4619 | |
| 4621 | 4620 | *************************************************************/ |
| 4622 | 4621 | |
| 4623 | | WRITE8_MEMBER(nes_state::bf9093_w) |
| 4622 | WRITE8_MEMBER(nes_carts_state::bf9093_w) |
| 4624 | 4623 | { |
| 4625 | 4624 | LOG_MMC(("bf9093_w, offset: %04x, data: %02x\n", offset, data)); |
| 4626 | 4625 | |
| r18064 | r18065 | |
| 4665 | 4664 | prg16_cdef(machine, 0x03 | ((state->m_mmc_latch1 & 0x18) >> 1)); |
| 4666 | 4665 | } |
| 4667 | 4666 | |
| 4668 | | WRITE8_MEMBER(nes_state::bf9096_w) |
| 4667 | WRITE8_MEMBER(nes_carts_state::bf9096_w) |
| 4669 | 4668 | { |
| 4670 | 4669 | LOG_MMC(("bf9096_w, offset: %04x, data: %02x\n", offset, data)); |
| 4671 | 4670 | |
| r18064 | r18065 | |
| 4689 | 4688 | |
| 4690 | 4689 | *************************************************************/ |
| 4691 | 4690 | |
| 4692 | | WRITE8_MEMBER(nes_state::golden5_w) |
| 4691 | WRITE8_MEMBER(nes_carts_state::golden5_w) |
| 4693 | 4692 | { |
| 4694 | 4693 | LOG_MMC(("golden5_w, offset: %04x, data: %02x\n", offset, data)); |
| 4695 | 4694 | |
| r18064 | r18065 | |
| 4723 | 4722 | |
| 4724 | 4723 | *************************************************************/ |
| 4725 | 4724 | |
| 4726 | | WRITE8_MEMBER(nes_state::cony_l_w) |
| 4725 | WRITE8_MEMBER(nes_carts_state::cony_l_w) |
| 4727 | 4726 | { |
| 4728 | 4727 | LOG_MMC(("cony_l_w, offset: %04x, data: %02x\n", offset, data)); |
| 4729 | 4728 | |
| r18064 | r18065 | |
| 4731 | 4730 | m_mapper83_low_reg[offset & 0x03] = data; |
| 4732 | 4731 | } |
| 4733 | 4732 | |
| 4734 | | READ8_MEMBER(nes_state::cony_l_r) |
| 4733 | READ8_MEMBER(nes_carts_state::cony_l_r) |
| 4735 | 4734 | { |
| 4736 | 4735 | LOG_MMC(("cony_l_r, offset: %04x\n", offset)); |
| 4737 | 4736 | |
| r18064 | r18065 | |
| 4780 | 4779 | } |
| 4781 | 4780 | } |
| 4782 | 4781 | |
| 4783 | | WRITE8_MEMBER(nes_state::cony_w) |
| 4782 | WRITE8_MEMBER(nes_carts_state::cony_w) |
| 4784 | 4783 | { |
| 4785 | 4784 | LOG_MMC(("cony_w, offset: %04x, data: %02x\n", offset, data)); |
| 4786 | 4785 | |
| r18064 | r18065 | |
| 4861 | 4860 | |
| 4862 | 4861 | *************************************************************/ |
| 4863 | 4862 | |
| 4864 | | WRITE8_MEMBER(nes_state::yoko_l_w) |
| 4863 | WRITE8_MEMBER(nes_carts_state::yoko_l_w) |
| 4865 | 4864 | { |
| 4866 | 4865 | LOG_MMC(("cony_l_w, offset: %04x, data: %02x\n", offset, data)); |
| 4867 | 4866 | |
| r18064 | r18065 | |
| 4869 | 4868 | m_mapper83_low_reg[offset & 0x03] = data; |
| 4870 | 4869 | } |
| 4871 | 4870 | |
| 4872 | | READ8_MEMBER(nes_state::yoko_l_r) |
| 4871 | READ8_MEMBER(nes_carts_state::yoko_l_r) |
| 4873 | 4872 | { |
| 4874 | 4873 | LOG_MMC(("cony_l_r, offset: %04x\n", offset)); |
| 4875 | 4874 | |
| r18064 | r18065 | |
| 4912 | 4911 | chr2_6(machine, state->m_mapper83_reg[7], CHRROM); |
| 4913 | 4912 | } |
| 4914 | 4913 | |
| 4915 | | WRITE8_MEMBER(nes_state::yoko_w) |
| 4914 | WRITE8_MEMBER(nes_carts_state::yoko_w) |
| 4916 | 4915 | { |
| 4917 | 4916 | LOG_MMC(("yoko_w, offset: %04x, data: %02x\n", offset, data)); |
| 4918 | 4917 | |
| r18064 | r18065 | |
| 4963 | 4962 | |
| 4964 | 4963 | *************************************************************/ |
| 4965 | 4964 | |
| 4966 | | WRITE8_MEMBER(nes_state::dreamtech_l_w) |
| 4965 | WRITE8_MEMBER(nes_carts_state::dreamtech_l_w) |
| 4967 | 4966 | { |
| 4968 | 4967 | LOG_MMC(("dreamtech_l_w offset: %04x, data: %02x\n", offset, data)); |
| 4969 | 4968 | offset += 0x100; |
| r18064 | r18065 | |
| 4985 | 4984 | |
| 4986 | 4985 | *************************************************************/ |
| 4987 | 4986 | |
| 4988 | | WRITE8_MEMBER(nes_state::fukutake_l_w) |
| 4987 | WRITE8_MEMBER(nes_carts_state::fukutake_l_w) |
| 4989 | 4988 | { |
| 4990 | 4989 | LOG_MMC(("fukutake_l_w offset: %04x, data: %02x\n", offset, data)); |
| 4991 | 4990 | offset += 0x100; |
| r18064 | r18065 | |
| 5001 | 5000 | m_mapper_ram[offset - 0x400] = data; |
| 5002 | 5001 | } |
| 5003 | 5002 | |
| 5004 | | READ8_MEMBER(nes_state::fukutake_l_r) |
| 5003 | READ8_MEMBER(nes_carts_state::fukutake_l_r) |
| 5005 | 5004 | { |
| 5006 | 5005 | LOG_MMC(("fukutake_l_r offset: %04x\n", offset)); |
| 5007 | 5006 | offset += 0x100; |
| r18064 | r18065 | |
| 5047 | 5046 | } |
| 5048 | 5047 | } |
| 5049 | 5048 | |
| 5050 | | WRITE8_MEMBER(nes_state::futuremedia_w) |
| 5049 | WRITE8_MEMBER(nes_carts_state::futuremedia_w) |
| 5051 | 5050 | { |
| 5052 | 5051 | LOG_MMC(("futuremedia_w, offset: %04x, data: %02x\n", offset, data)); |
| 5053 | 5052 | |
| r18064 | r18065 | |
| 5109 | 5108 | |
| 5110 | 5109 | *************************************************************/ |
| 5111 | 5110 | |
| 5112 | | WRITE8_MEMBER(nes_state::gouder_sf4_l_w) |
| 5111 | WRITE8_MEMBER(nes_carts_state::gouder_sf4_l_w) |
| 5113 | 5112 | { |
| 5114 | 5113 | static const UINT8 conv_table[256] = |
| 5115 | 5114 | { |
| r18064 | r18065 | |
| 5141 | 5140 | prg32(machine(), ((data >> 3) & 0x02) | (data & 0x01)); |
| 5142 | 5141 | } |
| 5143 | 5142 | |
| 5144 | | READ8_MEMBER(nes_state::gouder_sf4_l_r) |
| 5143 | READ8_MEMBER(nes_carts_state::gouder_sf4_l_r) |
| 5145 | 5144 | { |
| 5146 | 5145 | LOG_MMC(("gouder_sf4_l_r, offset: %04x\n", offset)); |
| 5147 | 5146 | |
| r18064 | r18065 | |
| 5174 | 5173 | |
| 5175 | 5174 | *************************************************************/ |
| 5176 | 5175 | |
| 5177 | | WRITE8_MEMBER(nes_state::henggedianzi_w) |
| 5176 | WRITE8_MEMBER(nes_carts_state::henggedianzi_w) |
| 5178 | 5177 | { |
| 5179 | 5178 | LOG_MMC(("henggedianzi_w, offset: %04x, data: %02x\n", offset, data)); |
| 5180 | 5179 | |
| r18064 | r18065 | |
| 5197 | 5196 | |
| 5198 | 5197 | *************************************************************/ |
| 5199 | 5198 | |
| 5200 | | WRITE8_MEMBER(nes_state::heng_xjzb_l_w) |
| 5199 | WRITE8_MEMBER(nes_carts_state::heng_xjzb_l_w) |
| 5201 | 5200 | { |
| 5202 | 5201 | LOG_MMC(("heng_xjzb_l_w, offset: %04x, data: %02x\n", offset, data)); |
| 5203 | 5202 | offset += 0x4100; |
| r18064 | r18065 | |
| 5206 | 5205 | prg32(machine(), data >> 1); |
| 5207 | 5206 | } |
| 5208 | 5207 | |
| 5209 | | WRITE8_MEMBER(nes_state::heng_xjzb_w) |
| 5208 | WRITE8_MEMBER(nes_carts_state::heng_xjzb_w) |
| 5210 | 5209 | { |
| 5211 | 5210 | LOG_MMC(("heng_xjzb_w, offset: %04x, data: %02x\n", offset, data)); |
| 5212 | 5211 | |
| r18064 | r18065 | |
| 5229 | 5228 | |
| 5230 | 5229 | *************************************************************/ |
| 5231 | 5230 | |
| 5232 | | WRITE8_MEMBER(nes_state::hes6in1_l_w) |
| 5231 | WRITE8_MEMBER(nes_carts_state::hes6in1_l_w) |
| 5233 | 5232 | { |
| 5234 | 5233 | LOG_MMC(("hes6in1_l_w, offset: %04x, data: %02x\n", offset, data)); |
| 5235 | 5234 | |
| r18064 | r18065 | |
| 5241 | 5240 | } |
| 5242 | 5241 | } |
| 5243 | 5242 | |
| 5244 | | WRITE8_MEMBER(nes_state::hes_l_w) |
| 5243 | WRITE8_MEMBER(nes_carts_state::hes_l_w) |
| 5245 | 5244 | { |
| 5246 | 5245 | LOG_MMC(("hes_l_w, offset: %04x, data: %02x\n", offset, data)); |
| 5247 | 5246 | |
| r18064 | r18065 | |
| 5264 | 5263 | |
| 5265 | 5264 | *************************************************************/ |
| 5266 | 5265 | |
| 5267 | | WRITE8_MEMBER(nes_state::hosenkan_w) |
| 5266 | WRITE8_MEMBER(nes_carts_state::hosenkan_w) |
| 5268 | 5267 | { |
| 5269 | 5268 | LOG_MMC(("hosenkan_w, offset: %04x, data: %02x\n", offset, data)); |
| 5270 | 5269 | |
| r18064 | r18065 | |
| 5333 | 5332 | |
| 5334 | 5333 | *************************************************************/ |
| 5335 | 5334 | |
| 5336 | | WRITE8_MEMBER(nes_state::ks7058_w) |
| 5335 | WRITE8_MEMBER(nes_carts_state::ks7058_w) |
| 5337 | 5336 | { |
| 5338 | 5337 | LOG_MMC(("ks7058_w, offset: %04x, data: %02x\n", offset, data)); |
| 5339 | 5338 | |
| r18064 | r18065 | |
| 5360 | 5359 | |
| 5361 | 5360 | *************************************************************/ |
| 5362 | 5361 | |
| 5363 | | WRITE8_MEMBER(nes_state::ks7022_w) |
| 5362 | WRITE8_MEMBER(nes_carts_state::ks7022_w) |
| 5364 | 5363 | { |
| 5365 | 5364 | LOG_MMC(("ks7022_w, offset: %04x, data: %02x\n", offset, data)); |
| 5366 | 5365 | |
| r18064 | r18065 | |
| 5371 | 5370 | m_mmc_latch1 = data & 0x0f; |
| 5372 | 5371 | } |
| 5373 | 5372 | |
| 5374 | | READ8_MEMBER(nes_state::ks7022_r) |
| 5373 | READ8_MEMBER(nes_carts_state::ks7022_r) |
| 5375 | 5374 | { |
| 5376 | 5375 | LOG_MMC(("ks7022_r, offset: %04x\n", offset)); |
| 5377 | 5376 | |
| r18064 | r18065 | |
| 5424 | 5423 | } |
| 5425 | 5424 | } |
| 5426 | 5425 | |
| 5427 | | WRITE8_MEMBER(nes_state::ks7032_w) |
| 5426 | WRITE8_MEMBER(nes_carts_state::ks7032_w) |
| 5428 | 5427 | { |
| 5429 | 5428 | LOG_MMC(("ks7032_w, offset: %04x, data: %02x\n", offset, data)); |
| 5430 | 5429 | |
| r18064 | r18065 | |
| 5468 | 5467 | *************************************************************/ |
| 5469 | 5468 | |
| 5470 | 5469 | |
| 5471 | | WRITE8_MEMBER(nes_state::ks202_w) |
| 5470 | WRITE8_MEMBER(nes_carts_state::ks202_w) |
| 5472 | 5471 | { |
| 5473 | 5472 | LOG_MMC(("ks202_w, offset: %04x, data: %02x\n", offset, data)); |
| 5474 | 5473 | |
| r18064 | r18065 | |
| 5537 | 5536 | } |
| 5538 | 5537 | } |
| 5539 | 5538 | |
| 5540 | | WRITE8_MEMBER(nes_state::ks7017_l_w) |
| 5539 | WRITE8_MEMBER(nes_carts_state::ks7017_l_w) |
| 5541 | 5540 | { |
| 5542 | 5541 | LOG_MMC(("ks7022_w, offset: %04x, data: %02x\n", offset, data)); |
| 5543 | 5542 | |
| r18064 | r18065 | |
| 5550 | 5549 | prg16_89ab(machine(), m_mmc_latch1); |
| 5551 | 5550 | } |
| 5552 | 5551 | |
| 5553 | | WRITE8_MEMBER(nes_state::ks7017_extra_w) |
| 5552 | WRITE8_MEMBER(nes_carts_state::ks7017_extra_w) |
| 5554 | 5553 | { |
| 5555 | 5554 | LOG_MMC(("ks7017_extra_w, offset: %04x, data: %02x\n", offset, data)); |
| 5556 | 5555 | |
| r18064 | r18065 | |
| 5566 | 5565 | set_nt_mirroring(machine(), BIT(data, 3) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); |
| 5567 | 5566 | } |
| 5568 | 5567 | |
| 5569 | | READ8_MEMBER(nes_state::ks7017_extra_r) |
| 5568 | READ8_MEMBER(nes_carts_state::ks7017_extra_r) |
| 5570 | 5569 | { |
| 5571 | 5570 | LOG_MMC(("ks7017_extra_r, offset: %04x\n", offset)); |
| 5572 | 5571 | |
| r18064 | r18065 | |
| 5589 | 5588 | |
| 5590 | 5589 | *************************************************************/ |
| 5591 | 5590 | |
| 5592 | | WRITE8_MEMBER(nes_state::kay_pp_l_w) |
| 5591 | WRITE8_MEMBER(nes_carts_state::kay_pp_l_w) |
| 5593 | 5592 | { |
| 5594 | 5593 | LOG_MMC(("kay_pp_l_w, offset: %04x, data: %02x\n", offset, data)); |
| 5595 | 5594 | offset += 0x100; |
| r18064 | r18065 | |
| 5612 | 5611 | } |
| 5613 | 5612 | } |
| 5614 | 5613 | |
| 5615 | | READ8_MEMBER(nes_state::kay_pp_l_r) |
| 5614 | READ8_MEMBER(nes_carts_state::kay_pp_l_r) |
| 5616 | 5615 | { |
| 5617 | 5616 | LOG_MMC(("kay_pp_l_r, offset: %04x\n", offset)); |
| 5618 | 5617 | offset += 0x100; |
| r18064 | r18065 | |
| 5691 | 5690 | chr1_x(machine, start, bank, source); |
| 5692 | 5691 | } |
| 5693 | 5692 | |
| 5694 | | WRITE8_MEMBER(nes_state::kay_pp_w) |
| 5693 | WRITE8_MEMBER(nes_carts_state::kay_pp_w) |
| 5695 | 5694 | { |
| 5696 | 5695 | LOG_MMC(("kay_pp_w, offset: %04x, data: %02x\n", offset, data)); |
| 5697 | 5696 | |
| r18064 | r18065 | |
| 5748 | 5747 | prg8_x(machine, start, bank); |
| 5749 | 5748 | } |
| 5750 | 5749 | |
| 5751 | | WRITE8_MEMBER(nes_state::kasing_m_w) |
| 5750 | WRITE8_MEMBER(nes_carts_state::kasing_m_w) |
| 5752 | 5751 | { |
| 5753 | 5752 | LOG_MMC(("kasing_m_w, offset: %04x, data: %02x\n", offset, data)); |
| 5754 | 5753 | |
| r18064 | r18065 | |
| 5780 | 5779 | |
| 5781 | 5780 | *************************************************************/ |
| 5782 | 5781 | |
| 5783 | | WRITE8_MEMBER(nes_state::magics_md_w) |
| 5782 | WRITE8_MEMBER(nes_carts_state::magics_md_w) |
| 5784 | 5783 | { |
| 5785 | 5784 | LOG_MMC(("magics_md_w, offset: %04x, data: %02x\n", offset, data)); |
| 5786 | 5785 | |
| r18064 | r18065 | |
| 5821 | 5820 | |
| 5822 | 5821 | } |
| 5823 | 5822 | |
| 5824 | | WRITE8_MEMBER(nes_state::nanjing_l_w) |
| 5823 | WRITE8_MEMBER(nes_carts_state::nanjing_l_w) |
| 5825 | 5824 | { |
| 5826 | 5825 | LOG_MMC(("nanjing_l_w, offset: %04x, data: %02x\n", offset, data)); |
| 5827 | 5826 | |
| r18064 | r18065 | |
| 5862 | 5861 | prg32(machine(), (m_mmc_reg[0] & 0x0f) | ((m_mmc_reg[1] & 0x0f) << 4)); |
| 5863 | 5862 | } |
| 5864 | 5863 | |
| 5865 | | READ8_MEMBER(nes_state::nanjing_l_r) |
| 5864 | READ8_MEMBER(nes_carts_state::nanjing_l_r) |
| 5866 | 5865 | { |
| 5867 | 5866 | UINT8 value = 0; |
| 5868 | 5867 | LOG_MMC(("nanjing_l_r, offset: %04x\n", offset)); |
| r18064 | r18065 | |
| 5907 | 5906 | |
| 5908 | 5907 | *************************************************************/ |
| 5909 | 5908 | |
| 5910 | | WRITE8_MEMBER(nes_state::nitra_w) |
| 5909 | WRITE8_MEMBER(nes_carts_state::nitra_w) |
| 5911 | 5910 | { |
| 5912 | 5911 | LOG_MMC(("nitra_w, offset: %04x, data: %02x\n", offset, data)); |
| 5913 | 5912 | |
| r18064 | r18065 | |
| 5927 | 5926 | |
| 5928 | 5927 | *************************************************************/ |
| 5929 | 5928 | |
| 5930 | | WRITE8_MEMBER(nes_state::ntdec_asder_w) |
| 5929 | WRITE8_MEMBER(nes_carts_state::ntdec_asder_w) |
| 5931 | 5930 | { |
| 5932 | 5931 | LOG_MMC(("ntdec_asder_w, offset: %04x, data: %02x\n", offset, data)); |
| 5933 | 5932 | |
| r18064 | r18065 | |
| 5990 | 5989 | |
| 5991 | 5990 | *************************************************************/ |
| 5992 | 5991 | |
| 5993 | | WRITE8_MEMBER(nes_state::ntdec_fh_m_w) |
| 5992 | WRITE8_MEMBER(nes_carts_state::ntdec_fh_m_w) |
| 5994 | 5993 | { |
| 5995 | 5994 | LOG_MMC(("ntdec_fh_m_w, offset: %04x, data: %02x\n", offset, data)); |
| 5996 | 5995 | |
| r18064 | r18065 | |
| 6026 | 6025 | |
| 6027 | 6026 | *************************************************************/ |
| 6028 | 6027 | |
| 6029 | | WRITE8_MEMBER(nes_state::daou306_w) |
| 6028 | WRITE8_MEMBER(nes_carts_state::daou306_w) |
| 6030 | 6029 | { |
| 6031 | 6030 | LOG_MMC(("daou306_w, offset: %04x, data: %02x\n", offset, data)); |
| 6032 | 6031 | int reg = BIT(offset, 2) ? 8 : 0; |
| r18064 | r18065 | |
| 6100 | 6099 | |
| 6101 | 6100 | *************************************************************/ |
| 6102 | 6101 | |
| 6103 | | WRITE8_MEMBER(nes_state::gs2015_w) |
| 6102 | WRITE8_MEMBER(nes_carts_state::gs2015_w) |
| 6104 | 6103 | { |
| 6105 | 6104 | LOG_MMC(("gs2015_w, offset: %04x, data: %02x\n", offset, data)); |
| 6106 | 6105 | |
| r18064 | r18065 | |
| 6126 | 6125 | |
| 6127 | 6126 | *************************************************************/ |
| 6128 | 6127 | |
| 6129 | | WRITE8_MEMBER(nes_state::rcm_tf_w) |
| 6128 | WRITE8_MEMBER(nes_carts_state::rcm_tf_w) |
| 6130 | 6129 | { |
| 6131 | 6130 | LOG_MMC(("rcm_tf_w, offset: %04x, data: %02x\n", offset, data)); |
| 6132 | 6131 | |
| r18064 | r18065 | |
| 6159 | 6158 | |
| 6160 | 6159 | *************************************************************/ |
| 6161 | 6160 | |
| 6162 | | WRITE8_MEMBER(nes_state::rex_dbz_l_w) |
| 6161 | WRITE8_MEMBER(nes_carts_state::rex_dbz_l_w) |
| 6163 | 6162 | { |
| 6164 | 6163 | LOG_MMC(("rex_dbz_l_w, offset: %04x, data: %02x\n", offset, data)); |
| 6165 | 6164 | |
| r18064 | r18065 | |
| 6168 | 6167 | } |
| 6169 | 6168 | |
| 6170 | 6169 | /* we would need to use this read handler in 0x6000-0x7fff as well */ |
| 6171 | | READ8_MEMBER(nes_state::rex_dbz_l_r) |
| 6170 | READ8_MEMBER(nes_carts_state::rex_dbz_l_r) |
| 6172 | 6171 | { |
| 6173 | 6172 | LOG_MMC(("rex_dbz_l_r, offset: %04x\n", offset)); |
| 6174 | 6173 | return 0x01; |
| r18064 | r18065 | |
| 6250 | 6249 | chr1_x(machine, chr_page ^ 7, chr_base2[7] | (bank[7] & chr_mask), chr); |
| 6251 | 6250 | } |
| 6252 | 6251 | |
| 6253 | | WRITE8_MEMBER(nes_state::rex_sl1632_w) |
| 6252 | WRITE8_MEMBER(nes_carts_state::rex_sl1632_w) |
| 6254 | 6253 | { |
| 6255 | 6254 | UINT8 map14_helper1, map14_helper2, mmc_helper, cmd; |
| 6256 | 6255 | LOG_MMC(("rex_sl1632_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 6350 | 6349 | |
| 6351 | 6350 | *************************************************************/ |
| 6352 | 6351 | |
| 6353 | | WRITE8_MEMBER(nes_state::rumblestation_m_w) |
| 6352 | WRITE8_MEMBER(nes_carts_state::rumblestation_m_w) |
| 6354 | 6353 | { |
| 6355 | 6354 | LOG_MMC(("rumblestation_m_w, offset: %04x, data: %02x\n", offset, data)); |
| 6356 | 6355 | |
| r18064 | r18065 | |
| 6360 | 6359 | chr8(machine(), m_mmc_vrom_bank[0], CHRROM); |
| 6361 | 6360 | } |
| 6362 | 6361 | |
| 6363 | | WRITE8_MEMBER(nes_state::rumblestation_w) |
| 6362 | WRITE8_MEMBER(nes_carts_state::rumblestation_w) |
| 6364 | 6363 | { |
| 6365 | 6364 | LOG_MMC(("rumblestation_w, offset: %04x, data: %02x\n", offset, data)); |
| 6366 | 6365 | |
| r18064 | r18065 | |
| 6404 | 6403 | } |
| 6405 | 6404 | } |
| 6406 | 6405 | |
| 6407 | | WRITE8_MEMBER(nes_state::sachen_74x374_l_w) |
| 6406 | WRITE8_MEMBER(nes_carts_state::sachen_74x374_l_w) |
| 6408 | 6407 | { |
| 6409 | 6408 | LOG_MMC(("sachen_74x374_l_w, offset: %04x, data: %02x\n", offset, data)); |
| 6410 | 6409 | |
| r18064 | r18065 | |
| 6443 | 6442 | } |
| 6444 | 6443 | } |
| 6445 | 6444 | |
| 6446 | | READ8_MEMBER(nes_state::sachen_74x374_l_r) |
| 6445 | READ8_MEMBER(nes_carts_state::sachen_74x374_l_r) |
| 6447 | 6446 | { |
| 6448 | 6447 | LOG_MMC(("sachen_74x374_l_r, offset: %04x", offset)); |
| 6449 | 6448 | |
| r18064 | r18065 | |
| 6454 | 6453 | return 0; |
| 6455 | 6454 | } |
| 6456 | 6455 | |
| 6457 | | WRITE8_MEMBER(nes_state::sachen_74x374a_l_w) |
| 6456 | WRITE8_MEMBER(nes_carts_state::sachen_74x374a_l_w) |
| 6458 | 6457 | { |
| 6459 | 6458 | LOG_MMC(("sachen_74x374a_l_w, offset: %04x, data: %02x\n", offset, data)); |
| 6460 | 6459 | |
| r18064 | r18065 | |
| 6560 | 6559 | } |
| 6561 | 6560 | } |
| 6562 | 6561 | |
| 6563 | | WRITE8_MEMBER(nes_state::s8259_l_w) |
| 6562 | WRITE8_MEMBER(nes_carts_state::s8259_l_w) |
| 6564 | 6563 | { |
| 6565 | 6564 | LOG_MMC(("s8259_w, type: %d, offset: %04x, data: %02x\n", m_pcb_id, offset, data)); |
| 6566 | 6565 | |
| 6567 | 6566 | common_s8259_write_handler(space, offset, data, m_pcb_id); |
| 6568 | 6567 | } |
| 6569 | 6568 | |
| 6570 | | WRITE8_MEMBER(nes_state::s8259_m_w) |
| 6569 | WRITE8_MEMBER(nes_carts_state::s8259_m_w) |
| 6571 | 6570 | { |
| 6572 | 6571 | LOG_MMC(("s8259_w, type: %d, offset: %04x, data: %02x\n", m_pcb_id, offset, data)); |
| 6573 | 6572 | |
| r18064 | r18065 | |
| 6587 | 6586 | |
| 6588 | 6587 | *************************************************************/ |
| 6589 | 6588 | |
| 6590 | | WRITE8_MEMBER(nes_state::sa009_l_w) |
| 6589 | WRITE8_MEMBER(nes_carts_state::sa009_l_w) |
| 6591 | 6590 | { |
| 6592 | 6591 | LOG_MMC(("sa009_l_w, offset: %04x, data: %02x\n", offset, data)); |
| 6593 | 6592 | |
| r18064 | r18065 | |
| 6606 | 6605 | |
| 6607 | 6606 | *************************************************************/ |
| 6608 | 6607 | |
| 6609 | | WRITE8_MEMBER(nes_state::sa0036_w) |
| 6608 | WRITE8_MEMBER(nes_carts_state::sa0036_w) |
| 6610 | 6609 | { |
| 6611 | 6610 | LOG_MMC(("sa0036_w, offset: %04x, data: %02x\n", offset, data)); |
| 6612 | 6611 | |
| r18064 | r18065 | |
| 6625 | 6624 | |
| 6626 | 6625 | *************************************************************/ |
| 6627 | 6626 | |
| 6628 | | WRITE8_MEMBER(nes_state::sa0037_w) |
| 6627 | WRITE8_MEMBER(nes_carts_state::sa0037_w) |
| 6629 | 6628 | { |
| 6630 | 6629 | LOG_MMC(("sa0037_w, offset: %04x, data: %02x\n", offset, data)); |
| 6631 | 6630 | |
| r18064 | r18065 | |
| 6645 | 6644 | |
| 6646 | 6645 | *************************************************************/ |
| 6647 | 6646 | |
| 6648 | | WRITE8_MEMBER(nes_state::sa72007_l_w) |
| 6647 | WRITE8_MEMBER(nes_carts_state::sa72007_l_w) |
| 6649 | 6648 | { |
| 6650 | 6649 | LOG_MMC(("sa72007_l_w, offset: %04x, data: %02x\n", offset, data)); |
| 6651 | 6650 | |
| r18064 | r18065 | |
| 6666 | 6665 | |
| 6667 | 6666 | *************************************************************/ |
| 6668 | 6667 | |
| 6669 | | WRITE8_MEMBER(nes_state::sa72008_l_w) |
| 6668 | WRITE8_MEMBER(nes_carts_state::sa72008_l_w) |
| 6670 | 6669 | { |
| 6671 | 6670 | LOG_MMC(("sa72008_l_w, offset: %04x, data: %02x\n", offset, data)); |
| 6672 | 6671 | |
| r18064 | r18065 | |
| 6686 | 6685 | |
| 6687 | 6686 | *************************************************************/ |
| 6688 | 6687 | |
| 6689 | | READ8_MEMBER(nes_state::tca01_l_r) |
| 6688 | READ8_MEMBER(nes_carts_state::tca01_l_r) |
| 6690 | 6689 | { |
| 6691 | 6690 | LOG_MMC(("tca01_l_r, offset: %04x\n", offset)); |
| 6692 | 6691 | |
| r18064 | r18065 | |
| 6709 | 6708 | |
| 6710 | 6709 | *************************************************************/ |
| 6711 | 6710 | |
| 6712 | | WRITE8_MEMBER(nes_state::tcu01_l_w) |
| 6711 | WRITE8_MEMBER(nes_carts_state::tcu01_l_w) |
| 6713 | 6712 | { |
| 6714 | 6713 | LOG_MMC(("tcu01_l_w, offset: %04x, data: %02x\n", offset, data)); |
| 6715 | 6714 | |
| r18064 | r18065 | |
| 6720 | 6719 | } |
| 6721 | 6720 | } |
| 6722 | 6721 | |
| 6723 | | WRITE8_MEMBER(nes_state::tcu01_m_w) |
| 6722 | WRITE8_MEMBER(nes_carts_state::tcu01_m_w) |
| 6724 | 6723 | { |
| 6725 | 6724 | LOG_MMC(("tcu01_m_w, offset: %04x, data: %02x\n", offset, data)); |
| 6726 | 6725 | |
| 6727 | 6726 | tcu01_l_w(space, (offset + 0x100) & 0xfff, data, mem_mask); |
| 6728 | 6727 | } |
| 6729 | 6728 | |
| 6730 | | WRITE8_MEMBER(nes_state::tcu01_w) |
| 6729 | WRITE8_MEMBER(nes_carts_state::tcu01_w) |
| 6731 | 6730 | { |
| 6732 | 6731 | LOG_MMC(("tcu01_w, offset: %04x, data: %02x\n", offset, data)); |
| 6733 | 6732 | |
| r18064 | r18065 | |
| 6746 | 6745 | |
| 6747 | 6746 | *************************************************************/ |
| 6748 | 6747 | |
| 6749 | | WRITE8_MEMBER(nes_state::tcu02_l_w) |
| 6748 | WRITE8_MEMBER(nes_carts_state::tcu02_l_w) |
| 6750 | 6749 | { |
| 6751 | 6750 | LOG_MMC(("tcu02_l_w, offset: %04x, data: %02x\n", offset, data)); |
| 6752 | 6751 | |
| r18064 | r18065 | |
| 6757 | 6756 | } |
| 6758 | 6757 | } |
| 6759 | 6758 | |
| 6760 | | READ8_MEMBER(nes_state::tcu02_l_r) |
| 6759 | READ8_MEMBER(nes_carts_state::tcu02_l_r) |
| 6761 | 6760 | { |
| 6762 | 6761 | LOG_MMC(("tcu02_l_r, offset: %04x\n", offset)); |
| 6763 | 6762 | |
| r18064 | r18065 | |
| 6776 | 6775 | |
| 6777 | 6776 | *************************************************************/ |
| 6778 | 6777 | |
| 6779 | | WRITE8_MEMBER(nes_state::subor0_w) |
| 6778 | WRITE8_MEMBER(nes_carts_state::subor0_w) |
| 6780 | 6779 | { |
| 6781 | 6780 | UINT8 subor_helper1, subor_helper2; |
| 6782 | 6781 | LOG_MMC(("subor0_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 6814 | 6813 | |
| 6815 | 6814 | *************************************************************/ |
| 6816 | 6815 | |
| 6817 | | WRITE8_MEMBER(nes_state::subor1_w) |
| 6816 | WRITE8_MEMBER(nes_carts_state::subor1_w) |
| 6818 | 6817 | { |
| 6819 | 6818 | UINT8 subor_helper1, subor_helper2; |
| 6820 | 6819 | LOG_MMC(("subor1_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 6897 | 6896 | mmc3_set_prg(machine, state->m_mmc_prg_base, state->m_mmc_prg_mask); |
| 6898 | 6897 | } |
| 6899 | 6898 | |
| 6900 | | WRITE8_MEMBER(nes_state::sgame_boog_l_w) |
| 6899 | WRITE8_MEMBER(nes_carts_state::sgame_boog_l_w) |
| 6901 | 6900 | { |
| 6902 | 6901 | LOG_MMC(("sgame_boog_l_w, offset: %04x, data: %02x\n", offset, data)); |
| 6903 | 6902 | offset += 0x100; |
| r18064 | r18065 | |
| 6921 | 6920 | } |
| 6922 | 6921 | } |
| 6923 | 6922 | |
| 6924 | | WRITE8_MEMBER(nes_state::sgame_boog_m_w) |
| 6923 | WRITE8_MEMBER(nes_carts_state::sgame_boog_m_w) |
| 6925 | 6924 | { |
| 6926 | 6925 | LOG_MMC(("sgame_boog_m_w, offset: %04x, data: %02x\n", offset, data)); |
| 6927 | 6926 | |
| r18064 | r18065 | |
| 6944 | 6943 | } |
| 6945 | 6944 | } |
| 6946 | 6945 | |
| 6947 | | WRITE8_MEMBER(nes_state::sgame_boog_w) |
| 6946 | WRITE8_MEMBER(nes_carts_state::sgame_boog_w) |
| 6948 | 6947 | { |
| 6949 | 6948 | static const UINT8 conv_table[8] = {0,2,5,3,6,1,7,4}; |
| 6950 | 6949 | LOG_MMC(("sgame_boog_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 7022 | 7021 | |
| 7023 | 7022 | *************************************************************/ |
| 7024 | 7023 | |
| 7025 | | WRITE8_MEMBER(nes_state::sgame_lion_m_w) |
| 7024 | WRITE8_MEMBER(nes_carts_state::sgame_lion_m_w) |
| 7026 | 7025 | { |
| 7027 | 7026 | LOG_MMC(("sgame_lion_m_w, offset: %04x, data: %02x\n", offset, data)); |
| 7028 | 7027 | |
| r18064 | r18065 | |
| 7038 | 7037 | |
| 7039 | 7038 | } |
| 7040 | 7039 | |
| 7041 | | WRITE8_MEMBER(nes_state::sgame_lion_w) |
| 7040 | WRITE8_MEMBER(nes_carts_state::sgame_lion_w) |
| 7042 | 7041 | { |
| 7043 | 7042 | static const UINT8 conv_table[8] = {0, 3, 1, 5, 6, 7, 2, 4}; |
| 7044 | 7043 | LOG_MMC(("sgame_lion_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 7090 | 7089 | |
| 7091 | 7090 | *************************************************************/ |
| 7092 | 7091 | |
| 7093 | | WRITE8_MEMBER(nes_state::tengen_800008_w) |
| 7092 | WRITE8_MEMBER(nes_carts_state::tengen_800008_w) |
| 7094 | 7093 | { |
| 7095 | 7094 | LOG_MMC(("tengen_800008_w, offset: %04x, data: %02x\n", offset, data)); |
| 7096 | 7095 | |
| r18064 | r18065 | |
| 7204 | 7203 | chr1_x(machine, 7 ^ chr_page, state->m_mmc_vrom_bank[5], CHRROM); |
| 7205 | 7204 | } |
| 7206 | 7205 | |
| 7207 | | WRITE8_MEMBER(nes_state::tengen_800032_w) |
| 7206 | WRITE8_MEMBER(nes_carts_state::tengen_800032_w) |
| 7208 | 7207 | { |
| 7209 | 7208 | UINT8 map64_helper, cmd; |
| 7210 | 7209 | LOG_MMC(("tengen_800032_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 7300 | 7299 | set_nt_page(machine, 3, ROM, state->m_mmc_vrom_bank[nt_mode ? 5 : 1], 0); |
| 7301 | 7300 | } |
| 7302 | 7301 | |
| 7303 | | WRITE8_MEMBER(nes_state::tengen_800037_w) |
| 7302 | WRITE8_MEMBER(nes_carts_state::tengen_800037_w) |
| 7304 | 7303 | { |
| 7305 | 7304 | UINT8 map158_helper, cmd; |
| 7306 | 7305 | LOG_MMC(("tengen_800037_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 7375 | 7374 | |
| 7376 | 7375 | *************************************************************/ |
| 7377 | 7376 | |
| 7378 | | WRITE8_MEMBER(nes_state::txc_22211_l_w) |
| 7377 | WRITE8_MEMBER(nes_carts_state::txc_22211_l_w) |
| 7379 | 7378 | { |
| 7380 | 7379 | LOG_MMC(("txc_22211_l_w, offset: %04x, data: %02x\n", offset, data)); |
| 7381 | 7380 | |
| r18064 | r18065 | |
| 7383 | 7382 | m_txc_reg[offset & 0x03] = data; |
| 7384 | 7383 | } |
| 7385 | 7384 | |
| 7386 | | READ8_MEMBER(nes_state::txc_22211_l_r) |
| 7385 | READ8_MEMBER(nes_carts_state::txc_22211_l_r) |
| 7387 | 7386 | { |
| 7388 | 7387 | LOG_MMC(("txc_22211_l_r, offset: %04x\n", offset)); |
| 7389 | 7388 | |
| r18064 | r18065 | |
| 7393 | 7392 | return 0x00; |
| 7394 | 7393 | } |
| 7395 | 7394 | |
| 7396 | | WRITE8_MEMBER(nes_state::txc_22211_w) |
| 7395 | WRITE8_MEMBER(nes_carts_state::txc_22211_w) |
| 7397 | 7396 | { |
| 7398 | 7397 | LOG_MMC(("txc_22211_w, offset: %04x, data: %02x\n", offset, data)); |
| 7399 | 7398 | |
| r18064 | r18065 | |
| 7416 | 7415 | |
| 7417 | 7416 | *************************************************************/ |
| 7418 | 7417 | |
| 7419 | | WRITE8_MEMBER(nes_state::txc_22211b_w) |
| 7418 | WRITE8_MEMBER(nes_carts_state::txc_22211b_w) |
| 7420 | 7419 | { |
| 7421 | 7420 | LOG_MMC(("txc_22211b_w, offset: %04x, data: %02x\n", offset, data)); |
| 7422 | 7421 | |
| r18064 | r18065 | |
| 7439 | 7438 | |
| 7440 | 7439 | *************************************************************/ |
| 7441 | 7440 | |
| 7442 | | READ8_MEMBER(nes_state::txc_22211c_l_r) |
| 7441 | READ8_MEMBER(nes_carts_state::txc_22211c_l_r) |
| 7443 | 7442 | { |
| 7444 | 7443 | LOG_MMC(("txc_22211c_l_r, offset: %04x\n", offset)); |
| 7445 | 7444 | |
| r18064 | r18065 | |
| 7463 | 7462 | |
| 7464 | 7463 | *************************************************************/ |
| 7465 | 7464 | |
| 7466 | | WRITE8_MEMBER(nes_state::txc_tw_l_w) |
| 7465 | WRITE8_MEMBER(nes_carts_state::txc_tw_l_w) |
| 7467 | 7466 | { |
| 7468 | 7467 | LOG_MMC(("txctw_l_w, offset: %04x, data: %02x\n", offset, data)); |
| 7469 | 7468 | |
| 7470 | 7469 | prg32(machine(), (data >> 4) | data); |
| 7471 | 7470 | } |
| 7472 | 7471 | |
| 7473 | | WRITE8_MEMBER(nes_state::txc_tw_m_w) |
| 7472 | WRITE8_MEMBER(nes_carts_state::txc_tw_m_w) |
| 7474 | 7473 | { |
| 7475 | 7474 | LOG_MMC(("txctw_m_w, offset: %04x, data: %04x\n", offset, data)); |
| 7476 | 7475 | |
| r18064 | r18065 | |
| 7497 | 7496 | |
| 7498 | 7497 | *************************************************************/ |
| 7499 | 7498 | |
| 7500 | | WRITE8_MEMBER(nes_state::txc_strikewolf_w) |
| 7499 | WRITE8_MEMBER(nes_carts_state::txc_strikewolf_w) |
| 7501 | 7500 | { |
| 7502 | 7501 | LOG_MMC(("txc_strikewolf_w, offset: %04x, data: %02x\n", offset, data)); |
| 7503 | 7502 | |
| r18064 | r18065 | |
| 7524 | 7523 | |
| 7525 | 7524 | *************************************************************/ |
| 7526 | 7525 | |
| 7527 | | READ8_MEMBER(nes_state::txc_mxmdhtwo_l_r) |
| 7526 | READ8_MEMBER(nes_carts_state::txc_mxmdhtwo_l_r) |
| 7528 | 7527 | { |
| 7529 | 7528 | return 0x50; |
| 7530 | 7529 | } |
| 7531 | 7530 | |
| 7532 | | WRITE8_MEMBER(nes_state::txc_mxmdhtwo_w) |
| 7531 | WRITE8_MEMBER(nes_carts_state::txc_mxmdhtwo_w) |
| 7533 | 7532 | { |
| 7534 | 7533 | LOG_MMC(("txc_mxmdhtwo_w, offset: %04x, data: %02x\n", offset, data)); |
| 7535 | 7534 | |
| r18064 | r18065 | |
| 7588 | 7587 | chr1_x(machine, start, bank, chr_src); |
| 7589 | 7588 | } |
| 7590 | 7589 | |
| 7591 | | WRITE8_MEMBER(nes_state::waixing_a_w) |
| 7590 | WRITE8_MEMBER(nes_carts_state::waixing_a_w) |
| 7592 | 7591 | { |
| 7593 | 7592 | LOG_MMC(("waixing_a_w, offset: %04x, data: %02x\n", offset, data)); |
| 7594 | 7593 | |
| r18064 | r18065 | |
| 7710 | 7709 | |
| 7711 | 7710 | *************************************************************/ |
| 7712 | 7711 | |
| 7713 | | WRITE8_MEMBER(nes_state::waixing_f_w) |
| 7712 | WRITE8_MEMBER(nes_carts_state::waixing_f_w) |
| 7714 | 7713 | { |
| 7715 | 7714 | UINT8 cmd; |
| 7716 | 7715 | LOG_MMC(("waixing_f_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 7770 | 7769 | state->m_mmc3_chr_cb(machine, chr_page ^ 7, chr_base | (state->m_mmc_vrom_bank[5] & chr_mask), state->m_mmc_chr_source); |
| 7771 | 7770 | } |
| 7772 | 7771 | |
| 7773 | | WRITE8_MEMBER(nes_state::waixing_g_w) |
| 7772 | WRITE8_MEMBER(nes_carts_state::waixing_g_w) |
| 7774 | 7773 | { |
| 7775 | 7774 | UINT8 MMC3_helper, cmd; |
| 7776 | 7775 | LOG_MMC(("waixing_g_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 7840 | 7839 | chr1_x(machine, start, bank, source); |
| 7841 | 7840 | } |
| 7842 | 7841 | |
| 7843 | | WRITE8_MEMBER(nes_state::waixing_h_w) |
| 7842 | WRITE8_MEMBER(nes_carts_state::waixing_h_w) |
| 7844 | 7843 | { |
| 7845 | 7844 | UINT8 cmd; |
| 7846 | 7845 | LOG_MMC(("waixing_h_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 7885 | 7884 | |
| 7886 | 7885 | *************************************************************/ |
| 7887 | 7886 | |
| 7888 | | WRITE8_MEMBER(nes_state::waixing_sgz_w) |
| 7887 | WRITE8_MEMBER(nes_carts_state::waixing_sgz_w) |
| 7889 | 7888 | { |
| 7890 | 7889 | UINT8 mmc_helper, bank; |
| 7891 | 7890 | LOG_MMC(("waixing_sgz_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 7947 | 7946 | |
| 7948 | 7947 | *************************************************************/ |
| 7949 | 7948 | |
| 7950 | | WRITE8_MEMBER(nes_state::waixing_sgzlz_l_w) |
| 7949 | WRITE8_MEMBER(nes_carts_state::waixing_sgzlz_l_w) |
| 7951 | 7950 | { |
| 7952 | 7951 | LOG_MMC(("waixing_sgzlz_l_w, offset: %04x, data: %02x\n", offset, data)); |
| 7953 | 7952 | |
| r18064 | r18065 | |
| 7979 | 7978 | |
| 7980 | 7979 | *************************************************************/ |
| 7981 | 7980 | |
| 7982 | | WRITE8_MEMBER(nes_state::waixing_ffv_l_w) |
| 7981 | WRITE8_MEMBER(nes_carts_state::waixing_ffv_l_w) |
| 7983 | 7982 | { |
| 7984 | 7983 | UINT8 mmc_helper; |
| 7985 | 7984 | LOG_MMC(("waixing_ffv_l_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 8028 | 8027 | |
| 8029 | 8028 | *************************************************************/ |
| 8030 | 8029 | |
| 8031 | | WRITE8_MEMBER(nes_state::waixing_zs_w) |
| 8030 | WRITE8_MEMBER(nes_carts_state::waixing_zs_w) |
| 8032 | 8031 | { |
| 8033 | 8032 | LOG_MMC(("waixing_zs_w, offset: %04x, data: %02x\n", offset, data)); |
| 8034 | 8033 | |
| r18064 | r18065 | |
| 8058 | 8057 | |
| 8059 | 8058 | *************************************************************/ |
| 8060 | 8059 | |
| 8061 | | WRITE8_MEMBER(nes_state::waixing_dq8_w) |
| 8060 | WRITE8_MEMBER(nes_carts_state::waixing_dq8_w) |
| 8062 | 8061 | { |
| 8063 | 8062 | LOG_MMC(("waixing_dq8_w, offset: %04x, data: %02x\n", offset, data)); |
| 8064 | 8063 | |
| r18064 | r18065 | |
| 8078 | 8077 | |
| 8079 | 8078 | *************************************************************/ |
| 8080 | 8079 | |
| 8081 | | WRITE8_MEMBER(nes_state::waixing_ps2_w) |
| 8080 | WRITE8_MEMBER(nes_carts_state::waixing_ps2_w) |
| 8082 | 8081 | { |
| 8083 | 8082 | UINT8 map15_flip = (data & 0x80) >> 7; |
| 8084 | 8083 | UINT8 map15_helper = (data & 0x7f) << 1; |
| r18064 | r18065 | |
| 8155 | 8154 | chr1_x(machine, start, bank, source); |
| 8156 | 8155 | } |
| 8157 | 8156 | |
| 8158 | | WRITE8_MEMBER(nes_state::waixing_sec_l_w) |
| 8157 | WRITE8_MEMBER(nes_carts_state::waixing_sec_l_w) |
| 8159 | 8158 | { |
| 8160 | 8159 | LOG_MMC(("waixing_sec_l_w, offset: %04x, data: %02x\n", offset, data)); |
| 8161 | 8160 | |
| r18064 | r18065 | |
| 8191 | 8190 | chr4_4(machine, state->m_mmc_reg[1], state->m_mmc_reg[1] ? CHRRAM : CHRROM); |
| 8192 | 8191 | } |
| 8193 | 8192 | |
| 8194 | | READ8_MEMBER(nes_state::waixing_sh2_chr_r) |
| 8193 | READ8_MEMBER(nes_carts_state::waixing_sh2_chr_r) |
| 8195 | 8194 | { |
| 8196 | 8195 | int bank = offset >> 10; |
| 8197 | 8196 | UINT8 val = m_chr_map[bank].access[offset & 0x3ff]; // this would be usual return value |
| r18064 | r18065 | |
| 8241 | 8240 | chr1_x(machine, start, bank, source); |
| 8242 | 8241 | } |
| 8243 | 8242 | |
| 8244 | | WRITE8_MEMBER(nes_state::unl_8237_l_w) |
| 8243 | WRITE8_MEMBER(nes_carts_state::unl_8237_l_w) |
| 8245 | 8244 | { |
| 8246 | 8245 | LOG_MMC(("unl_8237_l_w offset: %04x, data: %02x\n", offset, data)); |
| 8247 | 8246 | offset += 0x100; |
| r18064 | r18065 | |
| 8270 | 8269 | } |
| 8271 | 8270 | } |
| 8272 | 8271 | |
| 8273 | | WRITE8_MEMBER(nes_state::unl_8237_w) |
| 8272 | WRITE8_MEMBER(nes_carts_state::unl_8237_w) |
| 8274 | 8273 | { |
| 8275 | 8274 | static const UINT8 conv_table[8] = {0, 2, 6, 1, 7, 3, 4, 5}; |
| 8276 | 8275 | LOG_MMC(("unl_8237_w offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 8326 | 8325 | prg8_ab(machine, state->m_mmc_prg_bank[1]); |
| 8327 | 8326 | } |
| 8328 | 8327 | |
| 8329 | | WRITE8_MEMBER(nes_state::unl_ax5705_w) |
| 8328 | WRITE8_MEMBER(nes_carts_state::unl_ax5705_w) |
| 8330 | 8329 | { |
| 8331 | 8330 | UINT8 bank; |
| 8332 | 8331 | LOG_MMC(("unl_ax5705_w offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 8391 | 8390 | |
| 8392 | 8391 | *************************************************************/ |
| 8393 | 8392 | |
| 8394 | | WRITE8_MEMBER(nes_state::unl_cc21_w) |
| 8393 | WRITE8_MEMBER(nes_carts_state::unl_cc21_w) |
| 8395 | 8394 | { |
| 8396 | 8395 | LOG_MMC(("unl_cc21_w offset: %04x, data: %02x\n", offset, data)); |
| 8397 | 8396 | |
| r18064 | r18065 | |
| 8416 | 8415 | return ((data >> 1) & 0x01) | ((data >> 4) & 0x02) | ((data << 2) & 0x04) | ((data >> 0) & 0xd8) | ((data << 3) & 0x20); |
| 8417 | 8416 | } |
| 8418 | 8417 | |
| 8419 | | WRITE8_MEMBER(nes_state::unl_kof97_w) |
| 8418 | WRITE8_MEMBER(nes_carts_state::unl_kof97_w) |
| 8420 | 8419 | { |
| 8421 | 8420 | LOG_MMC(("unl_kof97_w offset: %04x, data: %02x\n", offset, data)); |
| 8422 | 8421 | |
| r18064 | r18065 | |
| 8472 | 8471 | |
| 8473 | 8472 | *************************************************************/ |
| 8474 | 8473 | |
| 8475 | | WRITE8_MEMBER(nes_state::ks7057_w) |
| 8474 | WRITE8_MEMBER(nes_carts_state::ks7057_w) |
| 8476 | 8475 | { |
| 8477 | 8476 | LOG_MMC(("ks7057_w, offset: %04x, data: %02x\n", offset, data)); |
| 8478 | 8477 | offset = (BIT(offset, 0) << 1) | BIT(offset, 1) | (offset & ~0x03); |
| r18064 | r18065 | |
| 8489 | 8488 | |
| 8490 | 8489 | *************************************************************/ |
| 8491 | 8490 | |
| 8492 | | WRITE8_MEMBER(nes_state::unl_t230_w) |
| 8491 | WRITE8_MEMBER(nes_carts_state::unl_t230_w) |
| 8493 | 8492 | { |
| 8494 | 8493 | UINT8 bank; |
| 8495 | 8494 | LOG_MMC(("unl_t230_w offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 8597 | 8596 | chr1_x(machine, start, bank, source); |
| 8598 | 8597 | } |
| 8599 | 8598 | |
| 8600 | | WRITE8_MEMBER(nes_state::kof96_l_w) |
| 8599 | WRITE8_MEMBER(nes_carts_state::kof96_l_w) |
| 8601 | 8600 | { |
| 8602 | 8601 | UINT8 new_bank; |
| 8603 | 8602 | LOG_MMC(("kof96_l_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 8648 | 8647 | } |
| 8649 | 8648 | } |
| 8650 | 8649 | |
| 8651 | | READ8_MEMBER(nes_state::kof96_l_r) |
| 8650 | READ8_MEMBER(nes_carts_state::kof96_l_r) |
| 8652 | 8651 | { |
| 8653 | 8652 | LOG_MMC(("kof96_l_r, offset: %04x\n", offset)); |
| 8654 | 8653 | offset += 0x100; |
| r18064 | r18065 | |
| 8659 | 8658 | return 0; |
| 8660 | 8659 | } |
| 8661 | 8660 | |
| 8662 | | WRITE8_MEMBER(nes_state::kof96_w) |
| 8661 | WRITE8_MEMBER(nes_carts_state::kof96_w) |
| 8663 | 8662 | { |
| 8664 | 8663 | LOG_MMC(("kof96_w, offset: %04x, data: %02x\n", offset, data)); |
| 8665 | 8664 | |
| r18064 | r18065 | |
| 8709 | 8708 | |
| 8710 | 8709 | *************************************************************/ |
| 8711 | 8710 | |
| 8712 | | WRITE8_MEMBER(nes_state::mk2_m_w) |
| 8711 | WRITE8_MEMBER(nes_carts_state::mk2_m_w) |
| 8713 | 8712 | { |
| 8714 | 8713 | LOG_MMC(("mk2_m_w, offset: %04x, data: %02x\n", offset, data)); |
| 8715 | 8714 | |
| r18064 | r18065 | |
| 8764 | 8763 | prg16_cdef(machine, map221_helper2 | ((reg1 & 0x70) >> 1)); |
| 8765 | 8764 | } |
| 8766 | 8765 | |
| 8767 | | WRITE8_MEMBER(nes_state::n625092_w) |
| 8766 | WRITE8_MEMBER(nes_carts_state::n625092_w) |
| 8768 | 8767 | { |
| 8769 | 8768 | LOG_MMC(("n625092_w, offset: %04x, data: %02x\n", offset, data)); |
| 8770 | 8769 | |
| r18064 | r18065 | |
| 8821 | 8820 | } |
| 8822 | 8821 | } |
| 8823 | 8822 | |
| 8824 | | WRITE8_MEMBER(nes_state::sc127_w) |
| 8823 | WRITE8_MEMBER(nes_carts_state::sc127_w) |
| 8825 | 8824 | { |
| 8826 | 8825 | LOG_MMC(("sc127_w, offset: %04x, data: %02x\n", offset, data)); |
| 8827 | 8826 | |
| r18064 | r18065 | |
| 8876 | 8875 | |
| 8877 | 8876 | *************************************************************/ |
| 8878 | 8877 | |
| 8879 | | WRITE8_MEMBER(nes_state::smb2j_w) |
| 8878 | WRITE8_MEMBER(nes_carts_state::smb2j_w) |
| 8880 | 8879 | { |
| 8881 | 8880 | int bank = (((offset >> 8) & 0x03) * 0x20) + (offset & 0x1f); |
| 8882 | 8881 | |
| r18064 | r18065 | |
| 8963 | 8962 | } |
| 8964 | 8963 | } |
| 8965 | 8964 | |
| 8966 | | WRITE8_MEMBER(nes_state::smb2jb_l_w) |
| 8965 | WRITE8_MEMBER(nes_carts_state::smb2jb_l_w) |
| 8967 | 8966 | { |
| 8968 | 8967 | UINT8 prg; |
| 8969 | 8968 | LOG_MMC(("smb2jb_l_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 8982 | 8981 | } |
| 8983 | 8982 | |
| 8984 | 8983 | /* This goes to 0x4020-0x403f */ |
| 8985 | | WRITE8_MEMBER(nes_state::smb2jb_extra_w) |
| 8984 | WRITE8_MEMBER(nes_carts_state::smb2jb_extra_w) |
| 8986 | 8985 | { |
| 8987 | 8986 | UINT8 prg; |
| 8988 | 8987 | LOG_MMC(("smb2jb_extra_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 9011 | 9010 | chr2_6(machine, chr_base | (state->m_mmc_vrom_bank[2] & chr_mask), chr_source); |
| 9012 | 9011 | } |
| 9013 | 9012 | |
| 9014 | | WRITE8_MEMBER(nes_state::unl_sf3_w) |
| 9013 | WRITE8_MEMBER(nes_carts_state::unl_sf3_w) |
| 9015 | 9014 | { |
| 9016 | 9015 | UINT8 mmc_helper, cmd; |
| 9017 | 9016 | LOG_MMC(("unl_sf3_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 9068 | 9067 | |
| 9069 | 9068 | *************************************************************/ |
| 9070 | 9069 | |
| 9071 | | WRITE8_MEMBER(nes_state::unl_xzy_l_w) |
| 9070 | WRITE8_MEMBER(nes_carts_state::unl_xzy_l_w) |
| 9072 | 9071 | { |
| 9073 | 9072 | LOG_MMC(("unl_xzy_l_w, offset: %04x, data: %02x\n", offset, data)); |
| 9074 | 9073 | |
| r18064 | r18065 | |
| 9099 | 9098 | prg16_89ab(machine, state->m_mmc_latch1 >> 1); |
| 9100 | 9099 | } |
| 9101 | 9100 | |
| 9102 | | WRITE8_MEMBER(nes_state::unl_racmate_w) |
| 9101 | WRITE8_MEMBER(nes_carts_state::unl_racmate_w) |
| 9103 | 9102 | { |
| 9104 | 9103 | LOG_MMC(("unl_racmate_w offset: %04x, data: %02x\n", offset, data)); |
| 9105 | 9104 | |
| r18064 | r18065 | |
| 9123 | 9122 | |
| 9124 | 9123 | *************************************************************/ |
| 9125 | 9124 | |
| 9126 | | WRITE8_MEMBER(nes_state::unl_fs304_l_w) |
| 9125 | WRITE8_MEMBER(nes_carts_state::unl_fs304_l_w) |
| 9127 | 9126 | { |
| 9128 | 9127 | LOG_MMC(("unl_fs304_l_w, offset: %04x, data: %02x\n", offset, data)); |
| 9129 | 9128 | int bank; |
| r18064 | r18065 | |
| 9160 | 9159 | |
| 9161 | 9160 | *************************************************************/ |
| 9162 | 9161 | |
| 9163 | | WRITE8_MEMBER(nes_state::btl_smb11_w) |
| 9162 | WRITE8_MEMBER(nes_carts_state::btl_smb11_w) |
| 9164 | 9163 | { |
| 9165 | 9164 | LOG_MMC(("btl_smb11_w, offset: %04x, data: %02x\n", offset, data)); |
| 9166 | 9165 | |
| r18064 | r18065 | |
| 9180 | 9179 | *************************************************************/ |
| 9181 | 9180 | |
| 9182 | 9181 | // is the code fine for ai senshi nicol?!? |
| 9183 | | WRITE8_MEMBER(nes_state::btl_mariobaby_w) |
| 9182 | WRITE8_MEMBER(nes_carts_state::btl_mariobaby_w) |
| 9184 | 9183 | { |
| 9185 | 9184 | LOG_MMC(("btl_mariobaby_w, offset: %04x, data: %02x\n", offset, data)); |
| 9186 | 9185 | |
| r18064 | r18065 | |
| 9240 | 9239 | } |
| 9241 | 9240 | } |
| 9242 | 9241 | |
| 9243 | | WRITE8_MEMBER(nes_state::btl_smb2a_w) |
| 9242 | WRITE8_MEMBER(nes_carts_state::btl_smb2a_w) |
| 9244 | 9243 | { |
| 9245 | 9244 | LOG_MMC(("btl_smb2a_w, offset: %04x, data: %02x\n", offset, data)); |
| 9246 | 9245 | |
| r18064 | r18065 | |
| 9271 | 9270 | |
| 9272 | 9271 | *************************************************************/ |
| 9273 | 9272 | |
| 9274 | | WRITE8_MEMBER(nes_state::whirl2706_w) |
| 9273 | WRITE8_MEMBER(nes_carts_state::whirl2706_w) |
| 9275 | 9274 | { |
| 9276 | 9275 | LOG_MMC(("whirl2706_w, offset: %04x, data: %02x\n", offset, data)); |
| 9277 | 9276 | prg8_67(machine(), data); |
| r18064 | r18065 | |
| 9289 | 9288 | |
| 9290 | 9289 | *************************************************************/ |
| 9291 | 9290 | |
| 9292 | | WRITE8_MEMBER(nes_state::btl_tobi_l_w) |
| 9291 | WRITE8_MEMBER(nes_carts_state::btl_tobi_l_w) |
| 9293 | 9292 | { |
| 9294 | 9293 | LOG_MMC(("btl_tobi_l_w, offset: %04x, data: %02x\n", offset, data)); |
| 9295 | 9294 | offset += 0x100; |
| r18064 | r18065 | |
| 9326 | 9325 | } |
| 9327 | 9326 | } |
| 9328 | 9327 | |
| 9329 | | WRITE8_MEMBER(nes_state::btl_smb3_w) |
| 9328 | WRITE8_MEMBER(nes_carts_state::btl_smb3_w) |
| 9330 | 9329 | { |
| 9331 | 9330 | LOG_MMC(("btl_smb3_w, offset: %04x, data: %02x\n", offset, data)); |
| 9332 | 9331 | switch (offset & 0x0f) |
| r18064 | r18065 | |
| 9400 | 9399 | } |
| 9401 | 9400 | } |
| 9402 | 9401 | |
| 9403 | | WRITE8_MEMBER(nes_state::btl_dn_w) |
| 9402 | WRITE8_MEMBER(nes_carts_state::btl_dn_w) |
| 9404 | 9403 | { |
| 9405 | 9404 | UINT8 bank; |
| 9406 | 9405 | LOG_MMC(("btl_dn_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 9445 | 9444 | |
| 9446 | 9445 | *************************************************************/ |
| 9447 | 9446 | |
| 9448 | | WRITE8_MEMBER(nes_state::btl_pika_y2k_w) |
| 9447 | WRITE8_MEMBER(nes_carts_state::btl_pika_y2k_w) |
| 9449 | 9448 | { |
| 9450 | 9449 | LOG_MMC(("btl_pika_y2k_w, offset: %04x, data: %02x\n", offset, data)); |
| 9451 | 9450 | |
| r18064 | r18065 | |
| 9464 | 9463 | } |
| 9465 | 9464 | |
| 9466 | 9465 | // strange WRAM usage: it is protected at start, and gets unprotected after the first write to 0xa000 |
| 9467 | | WRITE8_MEMBER(nes_state::btl_pika_y2k_m_w) |
| 9466 | WRITE8_MEMBER(nes_carts_state::btl_pika_y2k_m_w) |
| 9468 | 9467 | { |
| 9469 | 9468 | LOG_MMC(("btl_pika_y2k_m_w, offset: %04x, data: %02x\n", offset, data)); |
| 9470 | 9469 | |
| 9471 | 9470 | m_wram[offset] = data; |
| 9472 | 9471 | } |
| 9473 | 9472 | |
| 9474 | | READ8_MEMBER(nes_state::btl_pika_y2k_m_r) |
| 9473 | READ8_MEMBER(nes_carts_state::btl_pika_y2k_m_r) |
| 9475 | 9474 | { |
| 9476 | 9475 | LOG_MMC(("btl_pika_y2k_m_r, offset: %04x\n", offset)); |
| 9477 | 9476 | |
| r18064 | r18065 | |
| 9581 | 9580 | } |
| 9582 | 9581 | } |
| 9583 | 9582 | |
| 9584 | | WRITE8_MEMBER(nes_state::fk23c_l_w) |
| 9583 | WRITE8_MEMBER(nes_carts_state::fk23c_l_w) |
| 9585 | 9584 | { |
| 9586 | 9585 | LOG_MMC(("fk23c_l_w, offset: %04x, data: %02x\n", offset, data)); |
| 9587 | 9586 | offset += 0x100; |
| r18064 | r18065 | |
| 9598 | 9597 | } |
| 9599 | 9598 | } |
| 9600 | 9599 | |
| 9601 | | WRITE8_MEMBER(nes_state::fk23c_w) |
| 9600 | WRITE8_MEMBER(nes_carts_state::fk23c_w) |
| 9602 | 9601 | { |
| 9603 | 9602 | LOG_MMC(("fk23c_w, offset: %04x, data: %02x\n", offset, data)); |
| 9604 | 9603 | |
| r18064 | r18065 | |
| 9669 | 9668 | prg16_cdef(machine, helper2); |
| 9670 | 9669 | } |
| 9671 | 9670 | |
| 9672 | | WRITE8_MEMBER(nes_state::bmc_64in1nr_l_w) |
| 9671 | WRITE8_MEMBER(nes_carts_state::bmc_64in1nr_l_w) |
| 9673 | 9672 | { |
| 9674 | 9673 | LOG_MMC(("bmc_64in1nr_l_w offset: %04x, data: %02x\n", offset, data)); |
| 9675 | 9674 | offset += 0x100; |
| r18064 | r18065 | |
| 9689 | 9688 | set_nt_mirroring(machine(), BIT(data, 5) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); |
| 9690 | 9689 | } |
| 9691 | 9690 | |
| 9692 | | WRITE8_MEMBER(nes_state::bmc_64in1nr_w) |
| 9691 | WRITE8_MEMBER(nes_carts_state::bmc_64in1nr_w) |
| 9693 | 9692 | { |
| 9694 | 9693 | LOG_MMC(("bmc_64in1nr_w offset: %04x, data: %02x\n", offset, data)); |
| 9695 | 9694 | |
| r18064 | r18065 | |
| 9706 | 9705 | |
| 9707 | 9706 | *************************************************************/ |
| 9708 | 9707 | |
| 9709 | | WRITE8_MEMBER(nes_state::bmc_190in1_w) |
| 9708 | WRITE8_MEMBER(nes_carts_state::bmc_190in1_w) |
| 9710 | 9709 | { |
| 9711 | 9710 | LOG_MMC(("bmc_190in1_w offset: %04x, data: %02x\n", offset, data)); |
| 9712 | 9711 | |
| r18064 | r18065 | |
| 9727 | 9726 | |
| 9728 | 9727 | *************************************************************/ |
| 9729 | 9728 | |
| 9730 | | WRITE8_MEMBER(nes_state::bmc_a65as_w) |
| 9729 | WRITE8_MEMBER(nes_carts_state::bmc_a65as_w) |
| 9731 | 9730 | { |
| 9732 | 9731 | UINT8 helper = (data & 0x30) >> 1; |
| 9733 | 9732 | LOG_MMC(("bmc_a65as_w offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 9757 | 9756 | |
| 9758 | 9757 | *************************************************************/ |
| 9759 | 9758 | |
| 9760 | | WRITE8_MEMBER(nes_state::bmc_gs2004_w) |
| 9759 | WRITE8_MEMBER(nes_carts_state::bmc_gs2004_w) |
| 9761 | 9760 | { |
| 9762 | 9761 | LOG_MMC(("bmc_gs2004_w offset: %04x, data: %02x\n", offset, data)); |
| 9763 | 9762 | |
| r18064 | r18065 | |
| 9775 | 9774 | |
| 9776 | 9775 | *************************************************************/ |
| 9777 | 9776 | |
| 9778 | | WRITE8_MEMBER(nes_state::bmc_gs2013_w) |
| 9777 | WRITE8_MEMBER(nes_carts_state::bmc_gs2013_w) |
| 9779 | 9778 | { |
| 9780 | 9779 | LOG_MMC(("bmc_gs2013_w offset: %04x, data: %02x\n", offset, data)); |
| 9781 | 9780 | |
| r18064 | r18065 | |
| 9815 | 9814 | chr1_x(machine, start, chr_base | bank, chr); |
| 9816 | 9815 | } |
| 9817 | 9816 | |
| 9818 | | WRITE8_MEMBER(nes_state::bmc_s24in1sc03_l_w) |
| 9817 | WRITE8_MEMBER(nes_carts_state::bmc_s24in1sc03_l_w) |
| 9819 | 9818 | { |
| 9820 | 9819 | LOG_MMC(("bmc_s24in1sc03_l_w offset: %04x, data: %02x\n", offset, data)); |
| 9821 | 9820 | offset += 0x100; |
| r18064 | r18065 | |
| 9850 | 9849 | |
| 9851 | 9850 | *************************************************************/ |
| 9852 | 9851 | |
| 9853 | | WRITE8_MEMBER(nes_state::bmc_t262_w) |
| 9852 | WRITE8_MEMBER(nes_carts_state::bmc_t262_w) |
| 9854 | 9853 | { |
| 9855 | 9854 | UINT8 mmc_helper; |
| 9856 | 9855 | LOG_MMC(("bmc_t262_w offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 9882 | 9881 | |
| 9883 | 9882 | *************************************************************/ |
| 9884 | 9883 | |
| 9885 | | WRITE8_MEMBER(nes_state::bmc_ws_m_w) |
| 9884 | WRITE8_MEMBER(nes_carts_state::bmc_ws_m_w) |
| 9886 | 9885 | { |
| 9887 | 9886 | UINT8 mmc_helper; |
| 9888 | 9887 | LOG_MMC(("bmc_ws_m_w offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 9928 | 9927 | *************************************************************/ |
| 9929 | 9928 | |
| 9930 | 9929 | // Are this correct or should they work the same? |
| 9931 | | WRITE8_MEMBER(nes_state::novel1_w) |
| 9930 | WRITE8_MEMBER(nes_carts_state::novel1_w) |
| 9932 | 9931 | { |
| 9933 | 9932 | LOG_MMC(("novel1_w, offset: %04x, data: %02x\n", offset, data)); |
| 9934 | 9933 | |
| r18064 | r18065 | |
| 9936 | 9935 | chr8(machine(), offset & 0x07, CHRROM); |
| 9937 | 9936 | } |
| 9938 | 9937 | |
| 9939 | | WRITE8_MEMBER(nes_state::novel2_w) |
| 9938 | WRITE8_MEMBER(nes_carts_state::novel2_w) |
| 9940 | 9939 | { |
| 9941 | 9940 | LOG_MMC(("novel2_w, offset: %04x, data: %02x\n", offset, data)); |
| 9942 | 9941 | |
| r18064 | r18065 | |
| 9957 | 9956 | |
| 9958 | 9957 | *************************************************************/ |
| 9959 | 9958 | |
| 9960 | | WRITE8_MEMBER(nes_state::bmc_gka_w) |
| 9959 | WRITE8_MEMBER(nes_carts_state::bmc_gka_w) |
| 9961 | 9960 | { |
| 9962 | 9961 | LOG_MMC(("bmc_gka_w, offset: %04x, data: %02x\n", offset, data)); |
| 9963 | 9962 | |
| r18064 | r18065 | |
| 9993 | 9992 | |
| 9994 | 9993 | *************************************************************/ |
| 9995 | 9994 | |
| 9996 | | WRITE8_MEMBER(nes_state::sng32_w) |
| 9995 | WRITE8_MEMBER(nes_carts_state::sng32_w) |
| 9997 | 9996 | { |
| 9998 | 9997 | LOG_MMC(("sng32_w, offset: %04x, data: %02x\n", offset, data)); |
| 9999 | 9998 | prg32(machine(), data); |
| r18064 | r18065 | |
| 10012 | 10011 | |
| 10013 | 10012 | *************************************************************/ |
| 10014 | 10013 | |
| 10015 | | WRITE8_MEMBER(nes_state::bmc_gkb_w) |
| 10014 | WRITE8_MEMBER(nes_carts_state::bmc_gkb_w) |
| 10016 | 10015 | { |
| 10017 | 10016 | UINT8 bank = (offset & 0x40) ? 0 : 1; |
| 10018 | 10017 | LOG_MMC(("bmc_gkb_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 10036 | 10035 | |
| 10037 | 10036 | *************************************************************/ |
| 10038 | 10037 | |
| 10039 | | WRITE8_MEMBER(nes_state::bmc_super700in1_w) |
| 10038 | WRITE8_MEMBER(nes_carts_state::bmc_super700in1_w) |
| 10040 | 10039 | { |
| 10041 | 10040 | LOG_MMC(("bmc_super700in1_w, offset :%04x, data: %02x\n", offset, data)); |
| 10042 | 10041 | |
| r18064 | r18065 | |
| 10068 | 10067 | |
| 10069 | 10068 | *************************************************************/ |
| 10070 | 10069 | |
| 10071 | | WRITE8_MEMBER(nes_state::bmc_36in1_w) |
| 10070 | WRITE8_MEMBER(nes_carts_state::bmc_36in1_w) |
| 10072 | 10071 | { |
| 10073 | 10072 | LOG_MMC(("bmc_36in1_w, offset: %04x, data: %02x\n", offset, data)); |
| 10074 | 10073 | |
| r18064 | r18065 | |
| 10092 | 10091 | |
| 10093 | 10092 | *************************************************************/ |
| 10094 | 10093 | |
| 10095 | | WRITE8_MEMBER(nes_state::bmc_21in1_w) |
| 10094 | WRITE8_MEMBER(nes_carts_state::bmc_21in1_w) |
| 10096 | 10095 | { |
| 10097 | 10096 | LOG_MMC(("bmc_21in1_w, offset: %04x, data: %02x\n", offset, data)); |
| 10098 | 10097 | |
| r18064 | r18065 | |
| 10113 | 10112 | |
| 10114 | 10113 | *************************************************************/ |
| 10115 | 10114 | |
| 10116 | | WRITE8_MEMBER(nes_state::bmc_150in1_w) |
| 10115 | WRITE8_MEMBER(nes_carts_state::bmc_150in1_w) |
| 10117 | 10116 | { |
| 10118 | 10117 | int bank = (offset >> 1) & 0x07; |
| 10119 | 10118 | |
| r18064 | r18065 | |
| 10139 | 10138 | |
| 10140 | 10139 | *************************************************************/ |
| 10141 | 10140 | |
| 10142 | | WRITE8_MEMBER(nes_state::bmc_35in1_w) |
| 10141 | WRITE8_MEMBER(nes_carts_state::bmc_35in1_w) |
| 10143 | 10142 | { |
| 10144 | 10143 | LOG_MMC(("bmc_35in1_w, offset: %04x, data: %02x\n", offset, data)); |
| 10145 | 10144 | |
| r18064 | r18065 | |
| 10161 | 10160 | |
| 10162 | 10161 | *************************************************************/ |
| 10163 | 10162 | |
| 10164 | | WRITE8_MEMBER(nes_state::bmc_64in1_w) |
| 10163 | WRITE8_MEMBER(nes_carts_state::bmc_64in1_w) |
| 10165 | 10164 | { |
| 10166 | 10165 | int bank = (offset >> 1) & (offset >> 2) & 0x01; |
| 10167 | 10166 | |
| r18064 | r18065 | |
| 10187 | 10186 | |
| 10188 | 10187 | *************************************************************/ |
| 10189 | 10188 | |
| 10190 | | WRITE8_MEMBER(nes_state::bmc_15in1_m_w) |
| 10189 | WRITE8_MEMBER(nes_carts_state::bmc_15in1_m_w) |
| 10191 | 10190 | { |
| 10192 | 10191 | LOG_MMC(("bmc_15in1_m_w, offset: %04x, data: %02x\n", offset, data)); |
| 10193 | 10192 | |
| r18064 | r18065 | |
| 10215 | 10214 | |
| 10216 | 10215 | *************************************************************/ |
| 10217 | 10216 | |
| 10218 | | WRITE8_MEMBER(nes_state::bmc_hik300_w) |
| 10217 | WRITE8_MEMBER(nes_carts_state::bmc_hik300_w) |
| 10219 | 10218 | { |
| 10220 | 10219 | LOG_MMC(("bmc_hik300_w, offset: %04x, data: %02x\n", offset, data)); |
| 10221 | 10220 | |
| r18064 | r18065 | |
| 10244 | 10243 | |
| 10245 | 10244 | *************************************************************/ |
| 10246 | 10245 | |
| 10247 | | WRITE8_MEMBER(nes_state::supergun20in1_w) |
| 10246 | WRITE8_MEMBER(nes_carts_state::supergun20in1_w) |
| 10248 | 10247 | { |
| 10249 | 10248 | LOG_MMC(("supergun20in1_w, offset: %04x, data: %02x\n", offset, data)); |
| 10250 | 10249 | |
| r18064 | r18065 | |
| 10266 | 10265 | |
| 10267 | 10266 | *************************************************************/ |
| 10268 | 10267 | |
| 10269 | | WRITE8_MEMBER(nes_state::bmc_72in1_w) |
| 10268 | WRITE8_MEMBER(nes_carts_state::bmc_72in1_w) |
| 10270 | 10269 | { |
| 10271 | 10270 | int hi_bank; |
| 10272 | 10271 | int size_16; |
| r18064 | r18065 | |
| 10307 | 10306 | *************************************************************/ |
| 10308 | 10307 | |
| 10309 | 10308 | // does this work for super42in1 as well?!? |
| 10310 | | WRITE8_MEMBER(nes_state::bmc_76in1_w) |
| 10309 | WRITE8_MEMBER(nes_carts_state::bmc_76in1_w) |
| 10311 | 10310 | { |
| 10312 | 10311 | int hi_bank; |
| 10313 | 10312 | int size_16; |
| r18064 | r18065 | |
| 10352 | 10351 | |
| 10353 | 10352 | *************************************************************/ |
| 10354 | 10353 | |
| 10355 | | WRITE8_MEMBER(nes_state::bmc_1200in1_w) |
| 10354 | WRITE8_MEMBER(nes_carts_state::bmc_1200in1_w) |
| 10356 | 10355 | { |
| 10357 | 10356 | int hi_bank; |
| 10358 | 10357 | int size_32; |
| r18064 | r18065 | |
| 10399 | 10398 | |
| 10400 | 10399 | *************************************************************/ |
| 10401 | 10400 | |
| 10402 | | WRITE8_MEMBER(nes_state::bmc_31in1_w) |
| 10401 | WRITE8_MEMBER(nes_carts_state::bmc_31in1_w) |
| 10403 | 10402 | { |
| 10404 | 10403 | LOG_MMC(("bmc_31in1_w, offset: %04x, data: %02x\n", offset, data)); |
| 10405 | 10404 | |
| r18064 | r18065 | |
| 10432 | 10431 | |
| 10433 | 10432 | *************************************************************/ |
| 10434 | 10433 | |
| 10435 | | WRITE8_MEMBER(nes_state::bmc_22g_w) |
| 10434 | WRITE8_MEMBER(nes_carts_state::bmc_22g_w) |
| 10436 | 10435 | { |
| 10437 | 10436 | LOG_MMC(("bmc_22g_w, offset: %04x, data: %02x\n", offset, data)); |
| 10438 | 10437 | |
| r18064 | r18065 | |
| 10469 | 10468 | |
| 10470 | 10469 | *************************************************************/ |
| 10471 | 10470 | |
| 10472 | | WRITE8_MEMBER(nes_state::bmc_20in1_w) |
| 10471 | WRITE8_MEMBER(nes_carts_state::bmc_20in1_w) |
| 10473 | 10472 | { |
| 10474 | 10473 | LOG_MMC(("bmc_20in1_w, offset: %04x, data: %02x\n", offset, data)); |
| 10475 | 10474 | |
| r18064 | r18065 | |
| 10492 | 10491 | |
| 10493 | 10492 | *************************************************************/ |
| 10494 | 10493 | |
| 10495 | | WRITE8_MEMBER(nes_state::bmc_110in1_w) |
| 10494 | WRITE8_MEMBER(nes_carts_state::bmc_110in1_w) |
| 10496 | 10495 | { |
| 10497 | 10496 | UINT8 map255_helper1 = (offset >> 12) ? 0 : 1; |
| 10498 | 10497 | UINT8 map255_helper2 = ((offset >> 8) & 0x40) | ((offset >> 6) & 0x3f); |
| r18064 | r18065 | |
| 10518 | 10517 | |
| 10519 | 10518 | *************************************************************/ |
| 10520 | 10519 | |
| 10521 | | WRITE8_MEMBER(nes_state::bmc_sbig7_w) |
| 10520 | WRITE8_MEMBER(nes_carts_state::bmc_sbig7_w) |
| 10522 | 10521 | { |
| 10523 | 10522 | UINT8 page; |
| 10524 | 10523 | LOG_MMC(("bmc_sbig7_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 10557 | 10556 | |
| 10558 | 10557 | *************************************************************/ |
| 10559 | 10558 | |
| 10560 | | WRITE8_MEMBER(nes_state::bmc_hik8_m_w) |
| 10559 | WRITE8_MEMBER(nes_carts_state::bmc_hik8_m_w) |
| 10561 | 10560 | { |
| 10562 | 10561 | LOG_MMC(("bmc_hik8_m_w, offset: %04x, data: %02x\n", offset, data)); |
| 10563 | 10562 | |
| r18064 | r18065 | |
| 10604 | 10603 | |
| 10605 | 10604 | *************************************************************/ |
| 10606 | 10605 | |
| 10607 | | WRITE8_MEMBER(nes_state::bmc_hik4in1_m_w) |
| 10606 | WRITE8_MEMBER(nes_carts_state::bmc_hik4in1_m_w) |
| 10608 | 10607 | { |
| 10609 | 10608 | LOG_MMC(("bmc_hik4in1_m_w, offset: %04x, data: %02x\n", offset, data)); |
| 10610 | 10609 | |
| r18064 | r18065 | |
| 10657 | 10656 | } |
| 10658 | 10657 | } |
| 10659 | 10658 | |
| 10660 | | WRITE8_MEMBER(nes_state::bmc_ball11_m_w) |
| 10659 | WRITE8_MEMBER(nes_carts_state::bmc_ball11_m_w) |
| 10661 | 10660 | { |
| 10662 | 10661 | |
| 10663 | 10662 | LOG_MMC(("bmc_ball11_m_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 10666 | 10665 | bmc_ball11_set_banks(machine()); |
| 10667 | 10666 | } |
| 10668 | 10667 | |
| 10669 | | WRITE8_MEMBER(nes_state::bmc_ball11_w) |
| 10668 | WRITE8_MEMBER(nes_carts_state::bmc_ball11_w) |
| 10670 | 10669 | { |
| 10671 | 10670 | |
| 10672 | 10671 | LOG_MMC(("bmc_ball11_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 10699 | 10698 | |
| 10700 | 10699 | *************************************************************/ |
| 10701 | 10700 | |
| 10702 | | WRITE8_MEMBER(nes_state::bmc_mario7in1_m_w) |
| 10701 | WRITE8_MEMBER(nes_carts_state::bmc_mario7in1_m_w) |
| 10703 | 10702 | { |
| 10704 | 10703 | UINT8 map52_helper1, map52_helper2; |
| 10705 | 10704 | LOG_MMC(("bmc_mario7in1_m_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 10741 | 10740 | |
| 10742 | 10741 | *************************************************************/ |
| 10743 | 10742 | |
| 10744 | | WRITE8_MEMBER(nes_state::bmc_gold7in1_m_w) |
| 10743 | WRITE8_MEMBER(nes_carts_state::bmc_gold7in1_m_w) |
| 10745 | 10744 | { |
| 10746 | 10745 | UINT8 map52_helper1, map52_helper2; |
| 10747 | 10746 | LOG_MMC(("bmc_gold7in1_m_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 10810 | 10809 | chr1_x(machine, chr_page ^ 7, chr_base | (state->m_mmc_vrom_bank[5] & chr_mask), chr); |
| 10811 | 10810 | } |
| 10812 | 10811 | |
| 10813 | | WRITE8_MEMBER(nes_state::bmc_gc6in1_l_w) |
| 10812 | WRITE8_MEMBER(nes_carts_state::bmc_gc6in1_l_w) |
| 10814 | 10813 | { |
| 10815 | 10814 | UINT8 bank; |
| 10816 | 10815 | LOG_MMC(("bmc_gc6in1_l_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 10839 | 10838 | } |
| 10840 | 10839 | } |
| 10841 | 10840 | |
| 10842 | | WRITE8_MEMBER(nes_state::bmc_gc6in1_w) |
| 10841 | WRITE8_MEMBER(nes_carts_state::bmc_gc6in1_w) |
| 10843 | 10842 | { |
| 10844 | 10843 | UINT8 mmc_helper, cmd; |
| 10845 | 10844 | static const UINT8 conv_table[8] = {0, 6, 3, 7, 5, 2, 4, 1}; |
| r18064 | r18065 | |
| 10956 | 10955 | |
| 10957 | 10956 | *************************************************************/ |
| 10958 | 10957 | |
| 10959 | | WRITE8_MEMBER(nes_state::bmc_family4646_m_w) |
| 10958 | WRITE8_MEMBER(nes_carts_state::bmc_family4646_m_w) |
| 10960 | 10959 | { |
| 10961 | 10960 | LOG_MMC(("bmc_family4646_m_w, offset: %04x, data: %02x\n", offset, data)); |
| 10962 | 10961 | |
| r18064 | r18065 | |
| 10977 | 10976 | |
| 10978 | 10977 | *************************************************************/ |
| 10979 | 10978 | |
| 10980 | | WRITE8_MEMBER(nes_state::bmc_vt5201_w) |
| 10979 | WRITE8_MEMBER(nes_carts_state::bmc_vt5201_w) |
| 10981 | 10980 | { |
| 10982 | 10981 | LOG_MMC(("bmc_vt5201_w, offset: %04x, data: %02x\n", offset, data)); |
| 10983 | 10982 | |
| r18064 | r18065 | |
| 10996 | 10995 | chr8(machine(), offset, CHRROM); |
| 10997 | 10996 | } |
| 10998 | 10997 | |
| 10999 | | READ8_MEMBER(nes_state::bmc_vt5201_r) |
| 10998 | READ8_MEMBER(nes_carts_state::bmc_vt5201_r) |
| 11000 | 10999 | { |
| 11001 | 11000 | LOG_MMC(("bmc_vt5201_r, offset: %04x\n", offset)); |
| 11002 | 11001 | // m_mmc_dipsetting = ioport("CARTDIPS")->read(); |
| r18064 | r18065 | |
| 11029 | 11028 | chr2_6(machine, state->m_mmc_vrom_bank[3], CHRROM); |
| 11030 | 11029 | } |
| 11031 | 11030 | |
| 11032 | | WRITE8_MEMBER(nes_state::bmc_bs5_w) |
| 11031 | WRITE8_MEMBER(nes_carts_state::bmc_bs5_w) |
| 11033 | 11032 | { |
| 11034 | 11033 | UINT8 bs5_helper = (offset & 0xc00) >> 10; |
| 11035 | 11034 | LOG_MMC(("bmc_bs5_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 11056 | 11055 | |
| 11057 | 11056 | *************************************************************/ |
| 11058 | 11057 | |
| 11059 | | WRITE8_MEMBER(nes_state::bmc_810544_w) |
| 11058 | WRITE8_MEMBER(nes_carts_state::bmc_810544_w) |
| 11060 | 11059 | { |
| 11061 | 11060 | UINT8 bank = (offset >> 7); |
| 11062 | 11061 | LOG_MMC(("bmc_810544_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 11080 | 11079 | |
| 11081 | 11080 | *************************************************************/ |
| 11082 | 11081 | |
| 11083 | | WRITE8_MEMBER(nes_state::bmc_ntd03_w) |
| 11082 | WRITE8_MEMBER(nes_carts_state::bmc_ntd03_w) |
| 11084 | 11083 | { |
| 11085 | 11084 | UINT8 pbank, cbank; |
| 11086 | 11085 | LOG_MMC(("bmc_ntd03_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 11129 | 11128 | // chr8(machine, 0, CHRROM); |
| 11130 | 11129 | } |
| 11131 | 11130 | |
| 11132 | | WRITE8_MEMBER(nes_state::bmc_gb63_w) |
| 11131 | WRITE8_MEMBER(nes_carts_state::bmc_gb63_w) |
| 11133 | 11132 | { |
| 11134 | 11133 | LOG_MMC(("bmc_gb63_w, offset: %04x, data: %02x\n", offset, data)); |
| 11135 | 11134 | |
| r18064 | r18065 | |
| 11138 | 11137 | |
| 11139 | 11138 | } |
| 11140 | 11139 | |
| 11141 | | READ8_MEMBER(nes_state::bmc_gb63_r) |
| 11140 | READ8_MEMBER(nes_carts_state::bmc_gb63_r) |
| 11142 | 11141 | { |
| 11143 | 11142 | LOG_MMC(("bmc_gb63_r, offset: %04x\n", offset)); |
| 11144 | 11143 | // m_mmc_dipsetting = ioport("CARTDIPS")->read(); |
| r18064 | r18065 | |
| 11155 | 11154 | |
| 11156 | 11155 | *************************************************************/ |
| 11157 | 11156 | |
| 11158 | | WRITE8_MEMBER(nes_state::edu2k_w) |
| 11157 | WRITE8_MEMBER(nes_carts_state::edu2k_w) |
| 11159 | 11158 | { |
| 11160 | 11159 | LOG_MMC(("edu2k_w, offset: %04x, data: %02x\n", offset, data)); |
| 11161 | 11160 | |
| r18064 | r18065 | |
| 11177 | 11176 | prg8_x(machine, start, bank); |
| 11178 | 11177 | } |
| 11179 | 11178 | |
| 11180 | | WRITE8_MEMBER(nes_state::h2288_l_w) |
| 11179 | WRITE8_MEMBER(nes_carts_state::h2288_l_w) |
| 11181 | 11180 | { |
| 11182 | 11181 | LOG_MMC(("h2288_l_w offset: %04x, data: %02x\n", offset, data)); |
| 11183 | 11182 | offset += 0x100; |
| r18064 | r18065 | |
| 11197 | 11196 | } |
| 11198 | 11197 | } |
| 11199 | 11198 | |
| 11200 | | READ8_MEMBER(nes_state::h2288_l_r) |
| 11199 | READ8_MEMBER(nes_carts_state::h2288_l_r) |
| 11201 | 11200 | { |
| 11202 | 11201 | LOG_MMC(("h2288_l_r offset: %04x\n", offset)); |
| 11203 | 11202 | offset += 0x100; |
| r18064 | r18065 | |
| 11214 | 11213 | return 0; |
| 11215 | 11214 | } |
| 11216 | 11215 | |
| 11217 | | WRITE8_MEMBER(nes_state::h2288_w) |
| 11216 | WRITE8_MEMBER(nes_carts_state::h2288_w) |
| 11218 | 11217 | { |
| 11219 | 11218 | static const UINT8 conv_table[8] = {0, 3, 1, 5, 6, 7, 2, 4}; |
| 11220 | 11219 | LOG_MMC(("h2288_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 11282 | 11281 | } |
| 11283 | 11282 | } |
| 11284 | 11283 | |
| 11285 | | WRITE8_MEMBER(nes_state::shjy3_w) |
| 11284 | WRITE8_MEMBER(nes_carts_state::shjy3_w) |
| 11286 | 11285 | { |
| 11287 | 11286 | UINT8 mmc_helper, shift; |
| 11288 | 11287 | LOG_MMC(("shjy3_w, offset: %04x, data: %02x\n", offset, data)); |
| r18064 | r18065 | |
| 11343 | 11342 | |
| 11344 | 11343 | *************************************************************/ |
| 11345 | 11344 | |
| 11346 | | WRITE8_MEMBER(nes_state::unl_6035052_extra_w) |
| 11345 | WRITE8_MEMBER(nes_carts_state::unl_6035052_extra_w) |
| 11347 | 11346 | { |
| 11348 | 11347 | LOG_MMC(("unl_6035052_extra_w, offset: %04x, data: %02x\n", offset, data)); |
| 11349 | 11348 | m_mmc_latch1 = data & 0x03; |
| r18064 | r18065 | |
| 11351 | 11350 | m_mmc_latch1 = 2; |
| 11352 | 11351 | } |
| 11353 | 11352 | |
| 11354 | | READ8_MEMBER(nes_state::unl_6035052_extra_r) |
| 11353 | READ8_MEMBER(nes_carts_state::unl_6035052_extra_r) |
| 11355 | 11354 | { |
| 11356 | 11355 | LOG_MMC(("unl_6035052_extra_r, offset: %04x\n", offset)); |
| 11357 | 11356 | return m_mmc_latch1; |
| r18064 | r18065 | |
| 11407 | 11406 | state->m_mmc_chr_mask = BIT(state->m_mmc_reg[0], 7) ? 0x7f : 0xff; |
| 11408 | 11407 | } |
| 11409 | 11408 | |
| 11410 | | WRITE8_MEMBER(nes_state::pjoy84_m_w) |
| 11409 | WRITE8_MEMBER(nes_carts_state::pjoy84_m_w) |
| 11411 | 11410 | { |
| 11412 | 11411 | LOG_MMC(("pjoy84_m_w offset: %04x, data: %02x\n", offset, data)); |
| 11413 | 11412 | |
| r18064 | r18065 | |
| 11486 | 11485 | chr8(machine, (state->m_mmc_reg[1] & 0x1f) >> 1, state->m_mmc_chr_source); |
| 11487 | 11486 | } |
| 11488 | 11487 | |
| 11489 | | WRITE8_MEMBER(nes_state::someri_mmc1_w) |
| 11488 | WRITE8_MEMBER(nes_carts_state::someri_mmc1_w) |
| 11490 | 11489 | { |
| 11491 | 11490 | |
| 11492 | 11491 | assert(m_mmc_cmd1 == 2); |
| r18064 | r18065 | |
| 11545 | 11544 | } |
| 11546 | 11545 | |
| 11547 | 11546 | // MMC3 Mode emulation |
| 11548 | | WRITE8_MEMBER(nes_state::someri_mmc3_w) |
| 11547 | WRITE8_MEMBER(nes_carts_state::someri_mmc3_w) |
| 11549 | 11548 | { |
| 11550 | 11549 | UINT8 mmc_helper, cmd; |
| 11551 | 11550 | |
| r18064 | r18065 | |
| 11592 | 11591 | } |
| 11593 | 11592 | |
| 11594 | 11593 | // VRC2 Mode emulation |
| 11595 | | WRITE8_MEMBER(nes_state::someri_vrc2_w) |
| 11594 | WRITE8_MEMBER(nes_carts_state::someri_vrc2_w) |
| 11596 | 11595 | { |
| 11597 | 11596 | UINT8 bank, shift; |
| 11598 | 11597 | |
| r18064 | r18065 | |
| 11628 | 11627 | } |
| 11629 | 11628 | } |
| 11630 | 11629 | |
| 11631 | | WRITE8_MEMBER(nes_state::someri_w) |
| 11630 | WRITE8_MEMBER(nes_carts_state::someri_w) |
| 11632 | 11631 | { |
| 11633 | 11632 | LOG_MMC(("someri_w mode %d, offset: %04x, data: %02x\n", m_mmc_cmd1, offset, data)); |
| 11634 | 11633 | |
| r18064 | r18065 | |
| 11664 | 11663 | } |
| 11665 | 11664 | } |
| 11666 | 11665 | |
| 11667 | | WRITE8_MEMBER(nes_state::someri_l_w) |
| 11666 | WRITE8_MEMBER(nes_carts_state::someri_l_w) |
| 11668 | 11667 | { |
| 11669 | 11668 | LOG_MMC(("someri_l_w, offset: %04x, data: %02x\n", offset, data)); |
| 11670 | 11669 | offset += 0x100; |
| r18064 | r18065 | |
| 11688 | 11687 | |
| 11689 | 11688 | *************************************************************/ |
| 11690 | 11689 | |
| 11691 | | WRITE8_MEMBER(nes_state::fujiya_m_w) |
| 11690 | WRITE8_MEMBER(nes_carts_state::fujiya_m_w) |
| 11692 | 11691 | { |
| 11693 | 11692 | LOG_MMC(("fujiya_m_w, offset: %04x, data: %02x\n", offset, data)); |
| 11694 | 11693 | offset += 0x6000; |
| r18064 | r18065 | |
| 11697 | 11696 | m_mmc_latch1 = (data & 0x40) << 1; |
| 11698 | 11697 | } |
| 11699 | 11698 | |
| 11700 | | READ8_MEMBER(nes_state::fujiya_m_r) |
| 11699 | READ8_MEMBER(nes_carts_state::fujiya_m_r) |
| 11701 | 11700 | { |
| 11702 | 11701 | LOG_MMC(("fujiya_m_r, offset: %04x\n", offset)); |
| 11703 | 11702 | offset += 0x6000; |
| r18064 | r18065 | |
| 11741 | 11740 | #define NES_WRITEONLY(a) \ |
| 11742 | 11741 | {write8_delegate(FUNC(a),(nes_state *)0), read8_delegate()} |
| 11743 | 11742 | |
| 11744 | | WRITE8_MEMBER(nes_state::dummy_l_w) |
| 11743 | #define NES_READWRITE(a, b) \ |
| 11744 | {write8_delegate(FUNC(a),(nes_state *)0), read8_delegate(FUNC(b),(nes_state *)0)} |
| 11745 | |
| 11746 | |
| 11747 | WRITE8_MEMBER(nes_carts_state::dummy_l_w) |
| 11745 | 11748 | { |
| 11746 | 11749 | logerror("write access, offset: %04x, data: %02x\n", offset + 0x4100, data); |
| 11747 | 11750 | } |
| 11748 | 11751 | |
| 11749 | | WRITE8_MEMBER(nes_state::dummy_m_w) |
| 11752 | WRITE8_MEMBER(nes_carts_state::dummy_m_w) |
| 11750 | 11753 | { |
| 11751 | 11754 | logerror("write access, offset: %04x, data: %02x\n", offset + 0x6000, data); |
| 11752 | 11755 | } |
| 11753 | 11756 | |
| 11754 | | WRITE8_MEMBER(nes_state::dummy_w) |
| 11757 | WRITE8_MEMBER(nes_carts_state::dummy_w) |
| 11755 | 11758 | { |
| 11756 | 11759 | logerror("write access, offset: %04x, data: %02x\n", offset + 0x8000, data); |
| 11757 | 11760 | } |
| 11758 | 11761 | |
| 11759 | | READ8_MEMBER(nes_state::dummy_l_r) |
| 11762 | READ8_MEMBER(nes_carts_state::dummy_l_r) |
| 11760 | 11763 | { |
| 11761 | 11764 | logerror("read access, offset: %04x\n", offset + 0x4100); |
| 11762 | 11765 | return 0x00; |
| 11763 | 11766 | } |
| 11764 | 11767 | |
| 11765 | | READ8_MEMBER(nes_state::dummy_m_r) |
| 11768 | READ8_MEMBER(nes_carts_state::dummy_m_r) |
| 11766 | 11769 | { |
| 11767 | 11770 | logerror("read access, offset: %04x\n", offset + 0x6000); |
| 11768 | 11771 | return 0x00; |
| 11769 | 11772 | } |
| 11770 | 11773 | |
| 11771 | | READ8_MEMBER(nes_state::dummy_r) |
| 11774 | READ8_MEMBER(nes_carts_state::dummy_r) |
| 11772 | 11775 | { |
| 11773 | 11776 | logerror("read access, offset: %04x\n", offset + 0x8000); |
| 11774 | 11777 | return 0x00; |
| r18064 | r18065 | |
| 11779 | 11782 | { STD_NROM, NES_NOACCESS, NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11780 | 11783 | { HVC_FAMBASIC, NES_NOACCESS, NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11781 | 11784 | { GG_NROM, NES_NOACCESS, NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11782 | | { STD_UXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::uxrom_w), NULL, NULL, NULL }, |
| 11783 | | { STD_UN1ROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::un1rom_w), NULL, NULL, NULL }, |
| 11784 | | { STD_CPROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::cprom_w), NULL, NULL, NULL }, |
| 11785 | | { STD_CNROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::cnrom_w), NULL, NULL, NULL }, |
| 11786 | | { BANDAI_PT554, NES_NOACCESS, NES_WRITEONLY(nes_state::bandai_pt554_m_w), NES_WRITEONLY(nes_state::cnrom_w), NULL, NULL, NULL }, |
| 11787 | | { STD_AXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::axrom_w), NULL, NULL, NULL }, |
| 11788 | | { STD_PXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::pxrom_w), mmc2_latch, NULL, NULL }, |
| 11789 | | { STD_FXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::fxrom_w), mmc2_latch, NULL, NULL }, |
| 11790 | | { STD_BXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bxrom_w), NULL, NULL, NULL }, |
| 11791 | | { STD_GXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::gxrom_w), NULL, NULL, NULL }, |
| 11792 | | { STD_MXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::gxrom_w), NULL, NULL, NULL }, |
| 11793 | | { STD_NXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::ntbrom_w), NULL, NULL, NULL }, |
| 11794 | | { SUNSOFT_DCS, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::ntbrom_w), NULL, NULL, NULL }, |
| 11795 | | { STD_JXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::jxrom_w), NULL, NULL, jxrom_irq }, |
| 11796 | | { STD_SXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::sxrom_w), NULL, NULL, NULL }, |
| 11797 | | { STD_SOROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::sxrom_w), NULL, NULL, NULL }, |
| 11798 | | { STD_SXROM_A, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::sxrom_w), NULL, NULL, NULL }, |
| 11799 | | { STD_SOROM_A, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::sxrom_w), NULL, NULL, NULL }, |
| 11800 | | { STD_TXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 11801 | | { STD_TVROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 11802 | | { STD_TKROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 11803 | | { STD_HKROM, NES_NOACCESS, {write8_delegate(FUNC(nes_state::hkrom_m_w),(nes_state *)0), read8_delegate(FUNC(nes_state::hkrom_m_r),(nes_state *)0)}, NES_WRITEONLY(nes_state::hkrom_w), NULL, NULL, mmc3_irq }, |
| 11804 | | { STD_TQROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::tqrom_w), NULL, NULL, mmc3_irq }, |
| 11805 | | { STD_TXSROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::txsrom_w), NULL, NULL, mmc3_irq }, |
| 11806 | | { STD_DXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::dxrom_w), NULL, NULL, NULL }, |
| 11807 | | { STD_DRROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::dxrom_w), NULL, NULL, NULL }, |
| 11808 | | { NAMCOT_34X3, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::dxrom_w), NULL, NULL, NULL }, |
| 11809 | | { NAMCOT_3425, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::namcot3425_w), NULL, NULL, NULL }, |
| 11810 | | { NAMCOT_3446, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::namcot3446_w), NULL, NULL, NULL }, |
| 11811 | | { NAMCOT_3453, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::namcot3453_w), NULL, NULL, NULL }, |
| 11812 | | { STD_EXROM, {write8_delegate(FUNC(nes_state::exrom_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::exrom_l_r),(nes_state *)0)}, NES_NOACCESS, NES_NOACCESS, NULL, NULL, mmc5_irq }, |
| 11813 | | { NES_QJ, NES_NOACCESS, NES_WRITEONLY(nes_state::qj_m_w), NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 11814 | | { PAL_ZZ, NES_NOACCESS, NES_WRITEONLY(nes_state::zz_m_w), NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 11815 | | { UXROM_CC, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::uxrom_cc_w), NULL, NULL, NULL }, |
| 11785 | { STD_UXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::uxrom_w), NULL, NULL, NULL }, |
| 11786 | { STD_UN1ROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::un1rom_w), NULL, NULL, NULL }, |
| 11787 | { STD_CPROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::cprom_w), NULL, NULL, NULL }, |
| 11788 | { STD_CNROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::cnrom_w), NULL, NULL, NULL }, |
| 11789 | { BANDAI_PT554, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bandai_pt554_m_w), NES_WRITEONLY(nes_carts_state::cnrom_w), NULL, NULL, NULL }, |
| 11790 | { STD_AXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::axrom_w), NULL, NULL, NULL }, |
| 11791 | { STD_PXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::pxrom_w), mmc2_latch, NULL, NULL }, |
| 11792 | { STD_FXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::fxrom_w), mmc2_latch, NULL, NULL }, |
| 11793 | { STD_BXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bxrom_w), NULL, NULL, NULL }, |
| 11794 | { STD_GXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::gxrom_w), NULL, NULL, NULL }, |
| 11795 | { STD_MXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::gxrom_w), NULL, NULL, NULL }, |
| 11796 | { STD_NXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::ntbrom_w), NULL, NULL, NULL }, |
| 11797 | { SUNSOFT_DCS, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::ntbrom_w), NULL, NULL, NULL }, |
| 11798 | { STD_JXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::jxrom_w), NULL, NULL, jxrom_irq }, |
| 11799 | { STD_SXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::sxrom_w), NULL, NULL, NULL }, |
| 11800 | { STD_SOROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::sxrom_w), NULL, NULL, NULL }, |
| 11801 | { STD_SXROM_A, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::sxrom_w), NULL, NULL, NULL }, |
| 11802 | { STD_SOROM_A, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::sxrom_w), NULL, NULL, NULL }, |
| 11803 | { STD_TXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 11804 | { STD_TVROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 11805 | { STD_TKROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 11806 | { STD_HKROM, NES_NOACCESS, NES_READWRITE(nes_carts_state::hkrom_m_w, nes_carts_state::hkrom_m_r), NES_WRITEONLY(nes_carts_state::hkrom_w), NULL, NULL, mmc3_irq }, |
| 11807 | { STD_TQROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::tqrom_w), NULL, NULL, mmc3_irq }, |
| 11808 | { STD_TXSROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::txsrom_w), NULL, NULL, mmc3_irq }, |
| 11809 | { STD_DXROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::dxrom_w), NULL, NULL, NULL }, |
| 11810 | { STD_DRROM, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::dxrom_w), NULL, NULL, NULL }, |
| 11811 | { NAMCOT_34X3, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::dxrom_w), NULL, NULL, NULL }, |
| 11812 | { NAMCOT_3425, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::namcot3425_w), NULL, NULL, NULL }, |
| 11813 | { NAMCOT_3446, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::namcot3446_w), NULL, NULL, NULL }, |
| 11814 | { NAMCOT_3453, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::namcot3453_w), NULL, NULL, NULL }, |
| 11815 | { STD_EXROM, NES_READWRITE(nes_carts_state::exrom_l_w, nes_carts_state::exrom_l_r), NES_NOACCESS, NES_NOACCESS, NULL, NULL, mmc5_irq }, |
| 11816 | { NES_QJ, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::qj_m_w), NES_WRITEONLY(nes_carts_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 11817 | { PAL_ZZ, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::zz_m_w), NES_WRITEONLY(nes_carts_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 11818 | { UXROM_CC, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::uxrom_cc_w), NULL, NULL, NULL }, |
| 11816 | 11819 | // |
| 11817 | | { DIS_74X139X74, NES_NOACCESS, NES_WRITEONLY(nes_state::dis_74x139x74_m_w), NES_NOACCESS, NULL, NULL, NULL }, |
| 11818 | | { DIS_74X377, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::dis_74x377_w), NULL, NULL, NULL }, |
| 11819 | | { DIS_74X161X161X32, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::dis_74x161x161x32_w), NULL, NULL, NULL }, |
| 11820 | | { DIS_74X161X138, NES_NOACCESS, NES_WRITEONLY(nes_state::dis_74x161x138_m_w), NES_NOACCESS, NULL, NULL, NULL }, |
| 11821 | | { BANDAI_LZ93, NES_NOACCESS, NES_WRITEONLY(nes_state::lz93d50_m_w), NES_WRITEONLY(nes_state::lz93d50_w), NULL, NULL, bandai_lz_irq }, |
| 11822 | | { BANDAI_LZ93EX, NES_NOACCESS, NES_WRITEONLY(nes_state::lz93d50_m_w), NES_WRITEONLY(nes_state::lz93d50_w), NULL, NULL, bandai_lz_irq }, |
| 11823 | | { BANDAI_FCG, NES_NOACCESS, NES_WRITEONLY(nes_state::lz93d50_m_w), NES_WRITEONLY(nes_state::lz93d50_w), NULL, NULL, bandai_lz_irq }, |
| 11824 | | { BANDAI_DATACH, NES_NOACCESS, NES_WRITEONLY(nes_state::lz93d50_m_w), NES_WRITEONLY(nes_state::lz93d50_w), NULL, NULL, bandai_lz_irq }, |
| 11825 | | { BANDAI_JUMP2, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::fjump2_w), NULL, NULL, bandai_lz_irq }, |
| 11826 | | { BANDAI_KARAOKE, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bandai_ks_w), NULL, NULL, NULL }, |
| 11827 | | { BANDAI_OEKAKIDS, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bandai_ok_w), NULL, NULL, NULL }, |
| 11828 | | { IREM_G101, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::g101_w), NULL, NULL, NULL }, |
| 11829 | | { IREM_LROG017, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::lrog017_w), NULL, NULL, NULL }, |
| 11830 | | { IREM_H3001, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::h3001_w), NULL, NULL, h3001_irq }, |
| 11831 | | { IREM_TAM_S1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::tam_s1_w), NULL, NULL, NULL }, |
| 11832 | | { IREM_HOLYDIV, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::irem_hd_w), NULL, NULL, NULL }, |
| 11833 | | { JALECO_SS88006, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::ss88006_w), NULL, NULL, ss88006_irq }, |
| 11834 | | { JALECO_JF11, NES_NOACCESS, NES_WRITEONLY(nes_state::jf11_m_w), NES_NOACCESS, NULL, NULL, NULL }, |
| 11835 | | { JALECO_JF13, NES_NOACCESS, NES_WRITEONLY(nes_state::jf13_m_w), NES_NOACCESS, NULL, NULL, NULL }, |
| 11836 | | { JALECO_JF16, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::jf16_w), NULL, NULL, NULL }, |
| 11837 | | { JALECO_JF17, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::jf17_w), NULL, NULL, NULL }, |
| 11838 | | { JALECO_JF19, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::jf19_w), NULL, NULL, NULL }, |
| 11839 | | { KONAMI_VRC1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::konami_vrc1_w), NULL, NULL, NULL }, |
| 11840 | | { KONAMI_VRC2, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::konami_vrc2_w), NULL, NULL, NULL }, |
| 11841 | | { KONAMI_VRC3, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::konami_vrc3_w), NULL, NULL, konami_irq }, |
| 11842 | | { KONAMI_VRC4, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::konami_vrc4_w), NULL, NULL, konami_irq }, |
| 11843 | | { KONAMI_VRC6, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::konami_vrc6_w), NULL, NULL, konami_irq }, |
| 11844 | | { KONAMI_VRC7, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::konami_vrc7_w), NULL, NULL, konami_irq }, |
| 11845 | | { NAMCOT_163, {write8_delegate(FUNC(nes_state::namcot163_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::namcot163_l_r),(nes_state *)0)}, NES_NOACCESS, NES_WRITEONLY(nes_state::namcot163_w), NULL, NULL, namcot_irq }, |
| 11846 | | { SUNSOFT_1, NES_NOACCESS, NES_WRITEONLY(nes_state::sunsoft1_m_w), NES_NOACCESS, NULL, NULL, NULL }, |
| 11847 | | { SUNSOFT_2, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::sunsoft2_w), NULL, NULL, NULL }, |
| 11848 | | { SUNSOFT_3, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::sunsoft3_w), NULL, NULL, sunsoft3_irq }, |
| 11849 | | { TAITO_TC0190FMC, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::tc0190fmc_w), NULL, NULL, NULL }, |
| 11850 | | { TAITO_TC0190FMCP, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::tc0190fmc_p16_w), NULL, NULL, mmc3_irq }, |
| 11851 | | { TAITO_X1_005, NES_NOACCESS, {write8_delegate(FUNC(nes_state::x1005_m_w),(nes_state *)0), read8_delegate(FUNC(nes_state::x1005_m_r),(nes_state *)0)}, NES_NOACCESS, NULL, NULL, NULL }, |
| 11852 | | { TAITO_X1_005_A, NES_NOACCESS, {write8_delegate(FUNC(nes_state::x1005a_m_w),(nes_state *)0), read8_delegate(FUNC(nes_state::x1005_m_r),(nes_state *)0)}, NES_NOACCESS, NULL, NULL, NULL }, |
| 11853 | | { TAITO_X1_017, NES_NOACCESS, {write8_delegate(FUNC(nes_state::x1017_m_w),(nes_state *)0), read8_delegate(FUNC(nes_state::x1017_m_r),(nes_state *)0)}, NES_NOACCESS, NULL, NULL, NULL }, |
| 11820 | { DIS_74X139X74, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::dis_74x139x74_m_w), NES_NOACCESS, NULL, NULL, NULL }, |
| 11821 | { DIS_74X377, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::dis_74x377_w), NULL, NULL, NULL }, |
| 11822 | { DIS_74X161X161X32, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::dis_74x161x161x32_w), NULL, NULL, NULL }, |
| 11823 | { DIS_74X161X138, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::dis_74x161x138_m_w), NES_NOACCESS, NULL, NULL, NULL }, |
| 11824 | { BANDAI_LZ93, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::lz93d50_m_w), NES_WRITEONLY(nes_carts_state::lz93d50_w), NULL, NULL, bandai_lz_irq }, |
| 11825 | { BANDAI_LZ93EX, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::lz93d50_m_w), NES_WRITEONLY(nes_carts_state::lz93d50_w), NULL, NULL, bandai_lz_irq }, |
| 11826 | { BANDAI_FCG, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::lz93d50_m_w), NES_WRITEONLY(nes_carts_state::lz93d50_w), NULL, NULL, bandai_lz_irq }, |
| 11827 | { BANDAI_DATACH, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::lz93d50_m_w), NES_WRITEONLY(nes_carts_state::lz93d50_w), NULL, NULL, bandai_lz_irq }, |
| 11828 | { BANDAI_JUMP2, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::fjump2_w), NULL, NULL, bandai_lz_irq }, |
| 11829 | { BANDAI_KARAOKE, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bandai_ks_w), NULL, NULL, NULL }, |
| 11830 | { BANDAI_OEKAKIDS, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bandai_ok_w), NULL, NULL, NULL }, |
| 11831 | { IREM_G101, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::g101_w), NULL, NULL, NULL }, |
| 11832 | { IREM_LROG017, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::lrog017_w), NULL, NULL, NULL }, |
| 11833 | { IREM_H3001, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::h3001_w), NULL, NULL, h3001_irq }, |
| 11834 | { IREM_TAM_S1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::tam_s1_w), NULL, NULL, NULL }, |
| 11835 | { IREM_HOLYDIV, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::irem_hd_w), NULL, NULL, NULL }, |
| 11836 | { JALECO_SS88006, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::ss88006_w), NULL, NULL, ss88006_irq }, |
| 11837 | { JALECO_JF11, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::jf11_m_w), NES_NOACCESS, NULL, NULL, NULL }, |
| 11838 | { JALECO_JF13, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::jf13_m_w), NES_NOACCESS, NULL, NULL, NULL }, |
| 11839 | { JALECO_JF16, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::jf16_w), NULL, NULL, NULL }, |
| 11840 | { JALECO_JF17, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::jf17_w), NULL, NULL, NULL }, |
| 11841 | { JALECO_JF19, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::jf19_w), NULL, NULL, NULL }, |
| 11842 | { KONAMI_VRC1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::konami_vrc1_w), NULL, NULL, NULL }, |
| 11843 | { KONAMI_VRC2, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::konami_vrc2_w), NULL, NULL, NULL }, |
| 11844 | { KONAMI_VRC3, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::konami_vrc3_w), NULL, NULL, konami_irq }, |
| 11845 | { KONAMI_VRC4, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::konami_vrc4_w), NULL, NULL, konami_irq }, |
| 11846 | { KONAMI_VRC6, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::konami_vrc6_w), NULL, NULL, konami_irq }, |
| 11847 | { KONAMI_VRC7, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::konami_vrc7_w), NULL, NULL, konami_irq }, |
| 11848 | { NAMCOT_163, NES_READWRITE(nes_carts_state::namcot163_l_w, nes_carts_state::namcot163_l_r), NES_NOACCESS, NES_WRITEONLY(nes_carts_state::namcot163_w), NULL, NULL, namcot_irq }, |
| 11849 | { SUNSOFT_1, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::sunsoft1_m_w), NES_NOACCESS, NULL, NULL, NULL }, |
| 11850 | { SUNSOFT_2, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::sunsoft2_w), NULL, NULL, NULL }, |
| 11851 | { SUNSOFT_3, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::sunsoft3_w), NULL, NULL, sunsoft3_irq }, |
| 11852 | { TAITO_TC0190FMC, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::tc0190fmc_w), NULL, NULL, NULL }, |
| 11853 | { TAITO_TC0190FMCP, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::tc0190fmc_p16_w), NULL, NULL, mmc3_irq }, |
| 11854 | { TAITO_X1_005, NES_NOACCESS, NES_READWRITE(nes_carts_state::x1005_m_w, nes_carts_state::x1005_m_r), NES_NOACCESS, NULL, NULL, NULL }, |
| 11855 | { TAITO_X1_005_A, NES_NOACCESS, NES_READWRITE(nes_carts_state::x1005a_m_w, nes_carts_state::x1005_m_r), NES_NOACCESS, NULL, NULL, NULL }, |
| 11856 | { TAITO_X1_017, NES_NOACCESS, NES_READWRITE(nes_carts_state::x1017_m_w, nes_carts_state::x1017_m_r), NES_NOACCESS, NULL, NULL, NULL }, |
| 11854 | 11857 | // |
| 11855 | | { AGCI_50282, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::agci_50282_w), NULL, NULL, NULL }, |
| 11856 | | { ACTENT_ACT52, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::ae_act52_w), NULL, NULL, NULL }, |
| 11857 | | { AVE_NINA01, NES_NOACCESS, NES_WRITEONLY(nes_state::nina01_m_w), NES_NOACCESS, NULL, NULL, NULL }, |
| 11858 | | { AVE_NINA06, NES_WRITEONLY(nes_state::nina06_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11859 | | { CNE_DECATHLON, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::cne_decathl_w), NULL, NULL, NULL }, |
| 11860 | | { CNE_FSB, NES_NOACCESS, NES_WRITEONLY(nes_state::cne_fsb_m_w), NES_NOACCESS, NULL, NULL, NULL }, |
| 11861 | | { CNE_SHLZ, NES_WRITEONLY(nes_state::cne_shlz_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11862 | | { CALTRON_6IN1, NES_NOACCESS, NES_WRITEONLY(nes_state::caltron6in1_m_w), NES_WRITEONLY(nes_state::caltron6in1_w), NULL, NULL, NULL }, |
| 11863 | | { CAMERICA_BF9093, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bf9093_w), NULL, NULL, NULL }, |
| 11864 | | { CAMERICA_BF9097, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bf9093_w), NULL, NULL, NULL }, |
| 11865 | | { CAMERICA_BF9096, NES_NOACCESS, NES_WRITEONLY(nes_state::bf9096_w), NES_WRITEONLY(nes_state::bf9096_w), NULL, NULL, NULL }, |
| 11866 | | { CAMERICA_GOLDENFIVE, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::golden5_w), NULL, NULL, NULL }, |
| 11867 | | { CONY_BOARD, {write8_delegate(FUNC(nes_state::cony_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::cony_l_r),(nes_state *)0)}, NES_NOACCESS, NES_WRITEONLY(nes_state::cony_w), NULL, NULL, sunsoft3_irq }, |
| 11868 | | { YOKO_BOARD, {write8_delegate(FUNC(nes_state::yoko_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::yoko_l_r),(nes_state *)0)}, NES_NOACCESS, NES_WRITEONLY(nes_state::yoko_w), NULL, NULL, sunsoft3_irq }, |
| 11869 | | { DREAMTECH_BOARD, NES_WRITEONLY(nes_state::dreamtech_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11870 | | { FUTUREMEDIA_BOARD, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::futuremedia_w), NULL, NULL, futuremedia_irq }, |
| 11871 | | { FUKUTAKE_BOARD, {write8_delegate(FUNC(nes_state::fukutake_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::fukutake_l_r),(nes_state *)0)}, NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11872 | | { GOUDER_37017, {write8_delegate(FUNC(nes_state::gouder_sf4_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::gouder_sf4_l_r),(nes_state *)0)}, NES_NOACCESS, NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 11873 | | { HENGEDIANZI_BOARD, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::henggedianzi_w), NULL, NULL, NULL }, |
| 11874 | | { HENGEDIANZI_XJZB, NES_WRITEONLY(nes_state::heng_xjzb_l_w), NES_NOACCESS, NES_WRITEONLY(nes_state::heng_xjzb_w), NULL, NULL, NULL }, |
| 11875 | | { HES6IN1_BOARD, NES_WRITEONLY(nes_state::hes6in1_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11876 | | { HES_BOARD, NES_WRITEONLY(nes_state::hes_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11877 | | { HOSENKAN_BOARD, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::hosenkan_w), NULL, NULL, mmc3_irq }, |
| 11878 | | { KAISER_KS7058, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::ks7058_w), NULL, NULL, NULL }, |
| 11879 | | { KAISER_KS7022, NES_NOACCESS, NES_NOACCESS, {write8_delegate(FUNC(nes_state::ks7022_w),(nes_state *)0), read8_delegate(FUNC(nes_state::ks7022_r),(nes_state *)0)}, NULL, NULL, NULL }, |
| 11880 | | { KAISER_KS7032, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::ks7032_w), NULL, NULL, ks7032_irq }, |
| 11881 | | { KAISER_KS202, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::ks202_w), NULL, NULL, ks7032_irq }, |
| 11882 | | { KAISER_KS7017, NES_WRITEONLY(nes_state::ks7017_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, mmc_fds_irq }, |
| 11883 | | { KAY_PANDAPRINCE, {write8_delegate(FUNC(nes_state::kay_pp_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::kay_pp_l_r),(nes_state *)0)}, NES_NOACCESS, NES_WRITEONLY(nes_state::kay_pp_w), NULL, NULL, mmc3_irq }, |
| 11884 | | { KASING_BOARD, NES_NOACCESS, NES_WRITEONLY(nes_state::kasing_m_w), NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 11885 | | { SACHEN_74LS374, {write8_delegate(FUNC(nes_state::sachen_74x374_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::sachen_74x374_l_r),(nes_state *)0)}, NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11886 | | { SACHEN_74LS374_A, NES_WRITEONLY(nes_state::sachen_74x374a_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11887 | | { SACHEN_8259A, NES_WRITEONLY(nes_state::s8259_l_w), NES_WRITEONLY(nes_state::s8259_m_w), NES_NOACCESS, NULL, NULL, NULL }, |
| 11888 | | { SACHEN_8259B, NES_WRITEONLY(nes_state::s8259_l_w), NES_WRITEONLY(nes_state::s8259_m_w), NES_NOACCESS, NULL, NULL, NULL }, |
| 11889 | | { SACHEN_8259C, NES_WRITEONLY(nes_state::s8259_l_w), NES_WRITEONLY(nes_state::s8259_m_w), NES_NOACCESS, NULL, NULL, NULL }, |
| 11890 | | { SACHEN_8259D, NES_WRITEONLY(nes_state::s8259_l_w), NES_WRITEONLY(nes_state::s8259_m_w), NES_NOACCESS, NULL, NULL, NULL }, |
| 11891 | | { SACHEN_SA009, NES_WRITEONLY(nes_state::sa009_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11892 | | { SACHEN_SA0036, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::sa0036_w), NULL, NULL, NULL }, |
| 11893 | | { SACHEN_SA0037, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::sa0037_w), NULL, NULL, NULL }, |
| 11894 | | { SACHEN_SA72007, NES_WRITEONLY(nes_state::sa72007_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11895 | | { SACHEN_SA72008, NES_WRITEONLY(nes_state::sa72008_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11896 | | { SACHEN_TCA01, NES_READONLY(nes_state::tca01_l_r), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11897 | | { SACHEN_TCU01, NES_WRITEONLY(nes_state::tcu01_l_w), NES_WRITEONLY(nes_state::tcu01_m_w), NES_WRITEONLY(nes_state::tcu01_w), NULL, NULL, NULL }, |
| 11898 | | { SACHEN_TCU02, {write8_delegate(FUNC(nes_state::tcu02_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::tcu02_l_r),(nes_state *)0)}, NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11899 | | { SUBOR_TYPE0, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::subor0_w), NULL, NULL, NULL }, |
| 11900 | | { SUBOR_TYPE1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::subor1_w), NULL, NULL, NULL }, |
| 11901 | | { MAGICSERIES_MD, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::magics_md_w), NULL, NULL, NULL }, |
| 11902 | | { NANJING_BOARD, {write8_delegate(FUNC(nes_state::nanjing_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::nanjing_l_r),(nes_state *)0)}, NES_NOACCESS, NES_NOACCESS, NULL, NULL, nanjing_irq }, |
| 11903 | | { NITRA_TDA, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::nitra_w), NULL, NULL, mmc3_irq }, |
| 11904 | | { NTDEC_ASDER, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::ntdec_asder_w), NULL, NULL, NULL }, |
| 11905 | | { NTDEC_FIGHTINGHERO, NES_NOACCESS, NES_WRITEONLY(nes_state::ntdec_fh_m_w), NES_NOACCESS, NULL, NULL, NULL }, |
| 11906 | | { OPENCORP_DAOU306, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::daou306_w), NULL, NULL, NULL }, |
| 11907 | | { RCM_GS2015, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::gs2015_w), NULL, NULL, NULL }, |
| 11908 | | { RCM_TETRISFAMILY, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::rcm_tf_w), NULL, NULL, NULL }, |
| 11909 | | { REXSOFT_DBZ5, {write8_delegate(FUNC(nes_state::rex_dbz_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::rex_dbz_l_r),(nes_state *)0)}, NES_READONLY(nes_state::rex_dbz_l_r), NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 11910 | | { REXSOFT_SL1632, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::rex_sl1632_w), NULL, NULL, mmc3_irq }, |
| 11911 | | { RUMBLESTATION_BOARD, NES_NOACCESS, NES_WRITEONLY(nes_state::rumblestation_m_w), NES_WRITEONLY(nes_state::rumblestation_w), NULL, NULL, NULL }, |
| 11912 | | { SOMERI_SL12, NES_WRITEONLY(nes_state::someri_l_w), NES_NOACCESS, NES_WRITEONLY(nes_state::someri_w), NULL, NULL, mmc3_irq }, |
| 11913 | | { SUPERGAME_BOOGERMAN, NES_WRITEONLY(nes_state::sgame_boog_l_w), NES_WRITEONLY(nes_state::sgame_boog_m_w), NES_WRITEONLY(nes_state::sgame_boog_w), NULL, NULL, mmc3_irq }, |
| 11914 | | { SUPERGAME_LIONKING, NES_NOACCESS, NES_WRITEONLY(nes_state::sgame_lion_m_w), NES_WRITEONLY(nes_state::sgame_lion_w), NULL, NULL, mmc3_irq }, |
| 11915 | | { TENGEN_800008, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::tengen_800008_w), NULL, NULL, NULL }, |
| 11916 | | { TENGEN_800032, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::tengen_800032_w), NULL, NULL, tengen_800032_irq }, |
| 11917 | | { TENGEN_800037, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::tengen_800037_w), NULL, NULL, tengen_800032_irq }, |
| 11918 | | { TXC_22211A, {write8_delegate(FUNC(nes_state::txc_22211_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::txc_22211_l_r),(nes_state *)0)}, NES_NOACCESS, NES_WRITEONLY(nes_state::txc_22211_w), NULL, NULL, NULL }, |
| 11919 | | { TXC_22211B, {write8_delegate(FUNC(nes_state::txc_22211_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::txc_22211_l_r),(nes_state *)0)}, NES_NOACCESS, NES_WRITEONLY(nes_state::txc_22211b_w), NULL, NULL, NULL }, |
| 11920 | | { TXC_22211C, {write8_delegate(FUNC(nes_state::txc_22211_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::txc_22211c_l_r),(nes_state *)0)}, NES_NOACCESS, NES_WRITEONLY(nes_state::txc_22211_w), NULL, NULL, NULL }, |
| 11921 | | { TXC_TW, NES_WRITEONLY(nes_state::txc_tw_l_w), NES_WRITEONLY(nes_state::txc_tw_m_w), NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 11922 | | { TXC_STRIKEWOLF, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::txc_strikewolf_w), NULL, NULL, NULL }, |
| 11923 | | { TXC_MXMDHTWO, NES_READONLY(nes_state::txc_mxmdhtwo_l_r), NES_NOACCESS, NES_WRITEONLY(nes_state::txc_mxmdhtwo_w), NULL, NULL, NULL }, |
| 11924 | | { WAIXING_TYPE_A, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::waixing_a_w), NULL, NULL, mmc3_irq }, |
| 11925 | | { WAIXING_TYPE_A_1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::waixing_a_w), NULL, NULL, mmc3_irq }, |
| 11926 | | { WAIXING_TYPE_B, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::waixing_a_w), NULL, NULL, mmc3_irq }, |
| 11927 | | { WAIXING_TYPE_C, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::waixing_a_w), NULL, NULL, mmc3_irq }, |
| 11928 | | { WAIXING_TYPE_D, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::waixing_a_w), NULL, NULL, mmc3_irq }, |
| 11929 | | { WAIXING_TYPE_E, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::waixing_a_w), NULL, NULL, mmc3_irq }, |
| 11930 | | { WAIXING_TYPE_F, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::waixing_f_w), NULL, NULL, mmc3_irq }, |
| 11931 | | { WAIXING_TYPE_G, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::waixing_g_w), NULL, NULL, mmc3_irq }, |
| 11932 | | { WAIXING_TYPE_H, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::waixing_h_w), NULL, NULL, mmc3_irq }, |
| 11933 | | { WAIXING_TYPE_I, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, // this is MMC3 + possibly additional WRAM added in 0x5000-0x5fff |
| 11934 | | { WAIXING_TYPE_J, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, // this is MMC3 + possibly additional WRAM added in 0x5000-0x5fff |
| 11935 | | { WAIXING_SGZ, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::waixing_sgz_w), NULL, NULL, konami_irq }, |
| 11936 | | { WAIXING_SGZLZ, NES_WRITEONLY(nes_state::waixing_sgzlz_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11937 | | { WAIXING_FFV, NES_WRITEONLY(nes_state::waixing_ffv_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11938 | | { WAIXING_ZS, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::waixing_zs_w), NULL, NULL, NULL }, |
| 11939 | | { WAIXING_DQ8, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::waixing_dq8_w), NULL, NULL, NULL }, |
| 11940 | | { WAIXING_SECURITY, NES_WRITEONLY(nes_state::waixing_sec_l_w), NES_NOACCESS, NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 11941 | | { WAIXING_SH2, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, // this is MMC3 + possibly additional WRAM added in 0x5000-0x5fff |
| 11942 | | { WAIXING_PS2, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::waixing_ps2_w), NULL, NULL, NULL }, |
| 11943 | | { UNL_8237, NES_WRITEONLY(nes_state::unl_8237_l_w), NES_NOACCESS, NES_WRITEONLY(nes_state::unl_8237_w), NULL, NULL, mmc3_irq }, |
| 11944 | | { UNL_AX5705, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::unl_ax5705_w), NULL, NULL, NULL }, |
| 11945 | | { UNL_CC21, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::unl_cc21_w), NULL, NULL, NULL }, |
| 11946 | | { UNL_KOF97, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::unl_kof97_w), NULL, NULL, mmc3_irq }, |
| 11947 | | { UNL_KS7057, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::ks7057_w), NULL, NULL, mmc3_irq }, |
| 11948 | | { UNL_T230, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::unl_t230_w), NULL, NULL, konami_irq }, |
| 11949 | | { UNL_KOF96, {write8_delegate(FUNC(nes_state::kof96_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::kof96_l_r),(nes_state *)0)}, NES_NOACCESS, NES_WRITEONLY(nes_state::kof96_w), NULL, NULL, mmc3_irq }, |
| 11950 | | { UNL_MK2, NES_NOACCESS, NES_WRITEONLY(nes_state::mk2_m_w), NES_NOACCESS, NULL, NULL, mmc3_irq }, |
| 11951 | | { UNL_N625092, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::n625092_w), NULL, NULL, NULL }, |
| 11952 | | { UNL_SC127, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::sc127_w), NULL, NULL, sc127_irq }, |
| 11953 | | { UNL_SMB2J, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::smb2j_w), NULL, NULL, NULL }, |
| 11954 | | { UNL_SUPERFIGHTER3, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::unl_sf3_w), NULL, NULL, mmc3_irq }, |
| 11955 | | { UNL_XZY, NES_WRITEONLY(nes_state::unl_xzy_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11956 | | { UNL_RACERMATE, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::unl_racmate_w), NULL, NULL, NULL }, |
| 11957 | | { UNL_STUDYNGAME, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::sng32_w), NULL, NULL, NULL }, |
| 11958 | | { UNL_603_5052, {write8_delegate(FUNC(nes_state::unl_6035052_extra_w),(nes_state *)0), read8_delegate(FUNC(nes_state::unl_6035052_extra_r),(nes_state *)0)}, {write8_delegate(FUNC(nes_state::unl_6035052_extra_w),(nes_state *)0), read8_delegate(FUNC(nes_state::unl_6035052_extra_r),(nes_state *)0)}, NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 11959 | | { UNL_EDU2K, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::edu2k_w), NULL, NULL, NULL }, |
| 11960 | | { UNL_SHJY3, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::shjy3_w), NULL, NULL, shjy3_irq }, |
| 11961 | | { UNL_H2288, {write8_delegate(FUNC(nes_state::h2288_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::h2288_l_r),(nes_state *)0)}, NES_NOACCESS, NES_WRITEONLY(nes_state::h2288_w), NULL, NULL, mmc3_irq }, |
| 11962 | | { UNL_FS304, NES_WRITEONLY(nes_state::unl_fs304_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11858 | { AGCI_50282, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::agci_50282_w), NULL, NULL, NULL }, |
| 11859 | { ACTENT_ACT52, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::ae_act52_w), NULL, NULL, NULL }, |
| 11860 | { AVE_NINA01, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::nina01_m_w), NES_NOACCESS, NULL, NULL, NULL }, |
| 11861 | { AVE_NINA06, NES_WRITEONLY(nes_carts_state::nina06_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11862 | { CNE_DECATHLON, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::cne_decathl_w), NULL, NULL, NULL }, |
| 11863 | { CNE_FSB, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::cne_fsb_m_w), NES_NOACCESS, NULL, NULL, NULL }, |
| 11864 | { CNE_SHLZ, NES_WRITEONLY(nes_carts_state::cne_shlz_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11865 | { CALTRON_6IN1, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::caltron6in1_m_w), NES_WRITEONLY(nes_carts_state::caltron6in1_w), NULL, NULL, NULL }, |
| 11866 | { CAMERICA_BF9093, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bf9093_w), NULL, NULL, NULL }, |
| 11867 | { CAMERICA_BF9097, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bf9093_w), NULL, NULL, NULL }, |
| 11868 | { CAMERICA_BF9096, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bf9096_w), NES_WRITEONLY(nes_carts_state::bf9096_w), NULL, NULL, NULL }, |
| 11869 | { CAMERICA_GOLDENFIVE, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::golden5_w), NULL, NULL, NULL }, |
| 11870 | { CONY_BOARD, NES_READWRITE(nes_carts_state::cony_l_w, nes_carts_state::cony_l_r), NES_NOACCESS, NES_WRITEONLY(nes_carts_state::cony_w), NULL, NULL, sunsoft3_irq }, |
| 11871 | { YOKO_BOARD, NES_READWRITE(nes_carts_state::yoko_l_w, nes_carts_state::yoko_l_r), NES_NOACCESS, NES_WRITEONLY(nes_carts_state::yoko_w), NULL, NULL, sunsoft3_irq }, |
| 11872 | { DREAMTECH_BOARD, NES_WRITEONLY(nes_carts_state::dreamtech_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11873 | { FUTUREMEDIA_BOARD, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::futuremedia_w), NULL, NULL, futuremedia_irq }, |
| 11874 | { FUKUTAKE_BOARD, NES_READWRITE(nes_carts_state::fukutake_l_w, nes_carts_state::fukutake_l_r), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11875 | { GOUDER_37017, NES_READWRITE(nes_carts_state::gouder_sf4_l_w, nes_carts_state::gouder_sf4_l_r), NES_NOACCESS, NES_WRITEONLY(nes_carts_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 11876 | { HENGEDIANZI_BOARD, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::henggedianzi_w), NULL, NULL, NULL }, |
| 11877 | { HENGEDIANZI_XJZB, NES_WRITEONLY(nes_carts_state::heng_xjzb_l_w), NES_NOACCESS, NES_WRITEONLY(nes_carts_state::heng_xjzb_w), NULL, NULL, NULL }, |
| 11878 | { HES6IN1_BOARD, NES_WRITEONLY(nes_carts_state::hes6in1_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11879 | { HES_BOARD, NES_WRITEONLY(nes_carts_state::hes_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11880 | { HOSENKAN_BOARD, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::hosenkan_w), NULL, NULL, mmc3_irq }, |
| 11881 | { KAISER_KS7058, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::ks7058_w), NULL, NULL, NULL }, |
| 11882 | { KAISER_KS7022, NES_NOACCESS, NES_NOACCESS, NES_READWRITE(nes_carts_state::ks7022_w, nes_carts_state::ks7022_r), NULL, NULL, NULL }, |
| 11883 | { KAISER_KS7032, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::ks7032_w), NULL, NULL, ks7032_irq }, |
| 11884 | { KAISER_KS202, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::ks202_w), NULL, NULL, ks7032_irq }, |
| 11885 | { KAISER_KS7017, NES_WRITEONLY(nes_carts_state::ks7017_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, mmc_fds_irq }, |
| 11886 | { KAY_PANDAPRINCE, NES_READWRITE(nes_carts_state::kay_pp_l_w, nes_carts_state::kay_pp_l_r), NES_NOACCESS, NES_WRITEONLY(nes_carts_state::kay_pp_w), NULL, NULL, mmc3_irq }, |
| 11887 | { KASING_BOARD, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::kasing_m_w), NES_WRITEONLY(nes_carts_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 11888 | { SACHEN_74LS374, NES_READWRITE(nes_carts_state::sachen_74x374_l_w, nes_carts_state::sachen_74x374_l_r), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11889 | { SACHEN_74LS374_A, NES_WRITEONLY(nes_carts_state::sachen_74x374a_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11890 | { SACHEN_8259A, NES_WRITEONLY(nes_carts_state::s8259_l_w), NES_WRITEONLY(nes_carts_state::s8259_m_w), NES_NOACCESS, NULL, NULL, NULL }, |
| 11891 | { SACHEN_8259B, NES_WRITEONLY(nes_carts_state::s8259_l_w), NES_WRITEONLY(nes_carts_state::s8259_m_w), NES_NOACCESS, NULL, NULL, NULL }, |
| 11892 | { SACHEN_8259C, NES_WRITEONLY(nes_carts_state::s8259_l_w), NES_WRITEONLY(nes_carts_state::s8259_m_w), NES_NOACCESS, NULL, NULL, NULL }, |
| 11893 | { SACHEN_8259D, NES_WRITEONLY(nes_carts_state::s8259_l_w), NES_WRITEONLY(nes_carts_state::s8259_m_w), NES_NOACCESS, NULL, NULL, NULL }, |
| 11894 | { SACHEN_SA009, NES_WRITEONLY(nes_carts_state::sa009_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11895 | { SACHEN_SA0036, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::sa0036_w), NULL, NULL, NULL }, |
| 11896 | { SACHEN_SA0037, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::sa0037_w), NULL, NULL, NULL }, |
| 11897 | { SACHEN_SA72007, NES_WRITEONLY(nes_carts_state::sa72007_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11898 | { SACHEN_SA72008, NES_WRITEONLY(nes_carts_state::sa72008_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11899 | { SACHEN_TCA01, NES_READONLY(nes_carts_state::tca01_l_r), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11900 | { SACHEN_TCU01, NES_WRITEONLY(nes_carts_state::tcu01_l_w), NES_WRITEONLY(nes_carts_state::tcu01_m_w), NES_WRITEONLY(nes_carts_state::tcu01_w), NULL, NULL, NULL }, |
| 11901 | { SACHEN_TCU02, NES_READWRITE(nes_carts_state::tcu02_l_w, nes_carts_state::tcu02_l_r), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11902 | { SUBOR_TYPE0, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::subor0_w), NULL, NULL, NULL }, |
| 11903 | { SUBOR_TYPE1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::subor1_w), NULL, NULL, NULL }, |
| 11904 | { MAGICSERIES_MD, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::magics_md_w), NULL, NULL, NULL }, |
| 11905 | { NANJING_BOARD, NES_READWRITE(nes_carts_state::nanjing_l_w, nes_carts_state::nanjing_l_r), NES_NOACCESS, NES_NOACCESS, NULL, NULL, nanjing_irq }, |
| 11906 | { NITRA_TDA, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::nitra_w), NULL, NULL, mmc3_irq }, |
| 11907 | { NTDEC_ASDER, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::ntdec_asder_w), NULL, NULL, NULL }, |
| 11908 | { NTDEC_FIGHTINGHERO, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::ntdec_fh_m_w), NES_NOACCESS, NULL, NULL, NULL }, |
| 11909 | { OPENCORP_DAOU306, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::daou306_w), NULL, NULL, NULL }, |
| 11910 | { RCM_GS2015, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::gs2015_w), NULL, NULL, NULL }, |
| 11911 | { RCM_TETRISFAMILY, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::rcm_tf_w), NULL, NULL, NULL }, |
| 11912 | { REXSOFT_DBZ5, NES_READWRITE(nes_carts_state::rex_dbz_l_w, nes_carts_state::rex_dbz_l_r), NES_READONLY(nes_carts_state::rex_dbz_l_r), NES_WRITEONLY(nes_carts_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 11913 | { REXSOFT_SL1632, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::rex_sl1632_w), NULL, NULL, mmc3_irq }, |
| 11914 | { RUMBLESTATION_BOARD, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::rumblestation_m_w), NES_WRITEONLY(nes_carts_state::rumblestation_w), NULL, NULL, NULL }, |
| 11915 | { SOMERI_SL12, NES_WRITEONLY(nes_carts_state::someri_l_w), NES_NOACCESS, NES_WRITEONLY(nes_carts_state::someri_w), NULL, NULL, mmc3_irq }, |
| 11916 | { SUPERGAME_BOOGERMAN, NES_WRITEONLY(nes_carts_state::sgame_boog_l_w), NES_WRITEONLY(nes_carts_state::sgame_boog_m_w), NES_WRITEONLY(nes_carts_state::sgame_boog_w), NULL, NULL, mmc3_irq }, |
| 11917 | { SUPERGAME_LIONKING, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::sgame_lion_m_w), NES_WRITEONLY(nes_carts_state::sgame_lion_w), NULL, NULL, mmc3_irq }, |
| 11918 | { TENGEN_800008, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::tengen_800008_w), NULL, NULL, NULL }, |
| 11919 | { TENGEN_800032, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::tengen_800032_w), NULL, NULL, tengen_800032_irq }, |
| 11920 | { TENGEN_800037, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::tengen_800037_w), NULL, NULL, tengen_800032_irq }, |
| 11921 | { TXC_22211A, NES_READWRITE(nes_carts_state::txc_22211_l_w, nes_carts_state::txc_22211_l_r), NES_NOACCESS, NES_WRITEONLY(nes_carts_state::txc_22211_w), NULL, NULL, NULL }, |
| 11922 | { TXC_22211B, NES_READWRITE(nes_carts_state::txc_22211_l_w, nes_carts_state::txc_22211_l_r), NES_NOACCESS, NES_WRITEONLY(nes_carts_state::txc_22211b_w), NULL, NULL, NULL }, |
| 11923 | { TXC_22211C, NES_READWRITE(nes_carts_state::txc_22211_l_w, nes_carts_state::txc_22211c_l_r), NES_NOACCESS, NES_WRITEONLY(nes_carts_state::txc_22211_w), NULL, NULL, NULL }, |
| 11924 | { TXC_TW, NES_WRITEONLY(nes_carts_state::txc_tw_l_w), NES_WRITEONLY(nes_carts_state::txc_tw_m_w), NES_WRITEONLY(nes_carts_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 11925 | { TXC_STRIKEWOLF, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::txc_strikewolf_w), NULL, NULL, NULL }, |
| 11926 | { TXC_MXMDHTWO, NES_READONLY(nes_carts_state::txc_mxmdhtwo_l_r), NES_NOACCESS, NES_WRITEONLY(nes_carts_state::txc_mxmdhtwo_w), NULL, NULL, NULL }, |
| 11927 | { WAIXING_TYPE_A, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::waixing_a_w), NULL, NULL, mmc3_irq }, |
| 11928 | { WAIXING_TYPE_A_1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::waixing_a_w), NULL, NULL, mmc3_irq }, |
| 11929 | { WAIXING_TYPE_B, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::waixing_a_w), NULL, NULL, mmc3_irq }, |
| 11930 | { WAIXING_TYPE_C, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::waixing_a_w), NULL, NULL, mmc3_irq }, |
| 11931 | { WAIXING_TYPE_D, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::waixing_a_w), NULL, NULL, mmc3_irq }, |
| 11932 | { WAIXING_TYPE_E, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::waixing_a_w), NULL, NULL, mmc3_irq }, |
| 11933 | { WAIXING_TYPE_F, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::waixing_f_w), NULL, NULL, mmc3_irq }, |
| 11934 | { WAIXING_TYPE_G, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::waixing_g_w), NULL, NULL, mmc3_irq }, |
| 11935 | { WAIXING_TYPE_H, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::waixing_h_w), NULL, NULL, mmc3_irq }, |
| 11936 | { WAIXING_TYPE_I, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::txrom_w), NULL, NULL, mmc3_irq }, // this is MMC3 + possibly additional WRAM added in 0x5000-0x5fff |
| 11937 | { WAIXING_TYPE_J, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::txrom_w), NULL, NULL, mmc3_irq }, // this is MMC3 + possibly additional WRAM added in 0x5000-0x5fff |
| 11938 | { WAIXING_SGZ, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::waixing_sgz_w), NULL, NULL, konami_irq }, |
| 11939 | { WAIXING_SGZLZ, NES_WRITEONLY(nes_carts_state::waixing_sgzlz_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11940 | { WAIXING_FFV, NES_WRITEONLY(nes_carts_state::waixing_ffv_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11941 | { WAIXING_ZS, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::waixing_zs_w), NULL, NULL, NULL }, |
| 11942 | { WAIXING_DQ8, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::waixing_dq8_w), NULL, NULL, NULL }, |
| 11943 | { WAIXING_SECURITY, NES_WRITEONLY(nes_carts_state::waixing_sec_l_w), NES_NOACCESS, NES_WRITEONLY(nes_carts_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 11944 | { WAIXING_SH2, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::txrom_w), NULL, NULL, mmc3_irq }, // this is MMC3 + possibly additional WRAM added in 0x5000-0x5fff |
| 11945 | { WAIXING_PS2, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::waixing_ps2_w), NULL, NULL, NULL }, |
| 11946 | { UNL_8237, NES_WRITEONLY(nes_carts_state::unl_8237_l_w), NES_NOACCESS, NES_WRITEONLY(nes_carts_state::unl_8237_w), NULL, NULL, mmc3_irq }, |
| 11947 | { UNL_AX5705, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::unl_ax5705_w), NULL, NULL, NULL }, |
| 11948 | { UNL_CC21, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::unl_cc21_w), NULL, NULL, NULL }, |
| 11949 | { UNL_KOF97, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::unl_kof97_w), NULL, NULL, mmc3_irq }, |
| 11950 | { UNL_KS7057, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::ks7057_w), NULL, NULL, mmc3_irq }, |
| 11951 | { UNL_T230, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::unl_t230_w), NULL, NULL, konami_irq }, |
| 11952 | { UNL_KOF96, NES_READWRITE(nes_carts_state::kof96_l_w, nes_carts_state::kof96_l_r), NES_NOACCESS, NES_WRITEONLY(nes_carts_state::kof96_w), NULL, NULL, mmc3_irq }, |
| 11953 | { UNL_MK2, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::mk2_m_w), NES_NOACCESS, NULL, NULL, mmc3_irq }, |
| 11954 | { UNL_N625092, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::n625092_w), NULL, NULL, NULL }, |
| 11955 | { UNL_SC127, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::sc127_w), NULL, NULL, sc127_irq }, |
| 11956 | { UNL_SMB2J, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::smb2j_w), NULL, NULL, NULL }, |
| 11957 | { UNL_SUPERFIGHTER3, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::unl_sf3_w), NULL, NULL, mmc3_irq }, |
| 11958 | { UNL_XZY, NES_WRITEONLY(nes_carts_state::unl_xzy_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11959 | { UNL_RACERMATE, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::unl_racmate_w), NULL, NULL, NULL }, |
| 11960 | { UNL_STUDYNGAME, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::sng32_w), NULL, NULL, NULL }, |
| 11961 | { UNL_603_5052, NES_READWRITE(nes_carts_state::unl_6035052_extra_w, nes_carts_state::unl_6035052_extra_r), NES_READWRITE(nes_carts_state::unl_6035052_extra_w, nes_carts_state::unl_6035052_extra_r), NES_WRITEONLY(nes_carts_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 11962 | { UNL_EDU2K, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::edu2k_w), NULL, NULL, NULL }, |
| 11963 | { UNL_SHJY3, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::shjy3_w), NULL, NULL, shjy3_irq }, |
| 11964 | { UNL_H2288, NES_READWRITE(nes_carts_state::h2288_l_w, nes_carts_state::h2288_l_r), NES_NOACCESS, NES_WRITEONLY(nes_carts_state::h2288_w), NULL, NULL, mmc3_irq }, |
| 11965 | { UNL_FS304, NES_WRITEONLY(nes_carts_state::unl_fs304_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11963 | 11966 | // |
| 11964 | | { BTL_AISENSHINICOL, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::btl_mariobaby_w), NULL, NULL, NULL }, |
| 11965 | | { BTL_DRAGONNINJA, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::btl_dn_w), NULL, NULL, btl_dn_irq }, |
| 11966 | | { BTL_MARIOBABY, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::btl_mariobaby_w), NULL, NULL, NULL }, |
| 11967 | | { BTL_SMB2A, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::btl_smb2a_w), NULL, NULL, btl_smb2a_irq }, |
| 11968 | | { BTL_SMB2B, NES_WRITEONLY(nes_state::smb2jb_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, smb2jb_irq }, |
| 11969 | | { BTL_SMB3, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::btl_smb3_w), NULL, NULL, btl_smb3_irq }, |
| 11970 | | { BTL_SUPERBROS11, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::btl_smb11_w), NULL, NULL, mmc3_irq }, |
| 11971 | | { BTL_TOBIDASE, NES_WRITEONLY(nes_state::btl_tobi_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11972 | | { BTL_PIKACHUY2K, NES_NOACCESS, {write8_delegate(FUNC(nes_state::btl_pika_y2k_m_w),(nes_state *)0), read8_delegate(FUNC(nes_state::btl_pika_y2k_m_r),(nes_state *)0)}, NES_WRITEONLY(nes_state::btl_pika_y2k_w), NULL, NULL, mmc3_irq }, |
| 11973 | | { WHIRLWIND_2706, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::whirl2706_w), NULL, NULL, NULL }, |
| 11967 | { BTL_AISENSHINICOL, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::btl_mariobaby_w), NULL, NULL, NULL }, |
| 11968 | { BTL_DRAGONNINJA, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::btl_dn_w), NULL, NULL, btl_dn_irq }, |
| 11969 | { BTL_MARIOBABY, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::btl_mariobaby_w), NULL, NULL, NULL }, |
| 11970 | { BTL_SMB2A, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::btl_smb2a_w), NULL, NULL, btl_smb2a_irq }, |
| 11971 | { BTL_SMB2B, NES_WRITEONLY(nes_carts_state::smb2jb_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, smb2jb_irq }, |
| 11972 | { BTL_SMB3, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::btl_smb3_w), NULL, NULL, btl_smb3_irq }, |
| 11973 | { BTL_SUPERBROS11, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::btl_smb11_w), NULL, NULL, mmc3_irq }, |
| 11974 | { BTL_TOBIDASE, NES_WRITEONLY(nes_carts_state::btl_tobi_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 11975 | { BTL_PIKACHUY2K, NES_NOACCESS, NES_READWRITE(nes_carts_state::btl_pika_y2k_m_w, nes_carts_state::btl_pika_y2k_m_r), NES_WRITEONLY(nes_carts_state::btl_pika_y2k_w), NULL, NULL, mmc3_irq }, |
| 11976 | { WHIRLWIND_2706, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::whirl2706_w), NULL, NULL, NULL }, |
| 11974 | 11977 | // |
| 11975 | | { BMC_190IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_190in1_w), NULL, NULL, NULL }, |
| 11976 | | { BMC_A65AS, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_a65as_w), NULL, NULL, NULL }, |
| 11977 | | { BMC_GS2004, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_gs2004_w), NULL, NULL, NULL }, |
| 11978 | | { BMC_GS2013, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_gs2013_w), NULL, NULL, NULL }, |
| 11979 | | { BMC_NOVELDIAMOND, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::novel1_w), NULL, NULL, NULL }, |
| 11980 | | { BMC_9999999IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::novel2_w), NULL, NULL, NULL }, |
| 11981 | | { BMC_T262, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_t262_w), NULL, NULL, NULL }, |
| 11982 | | { BMC_WS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_ws_m_w), NES_NOACCESS, NULL, NULL, NULL }, |
| 11983 | | { BMC_GKA, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_gka_w), NULL, NULL, NULL }, |
| 11984 | | { BMC_GKB, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_gkb_w), NULL, NULL, NULL }, |
| 11985 | | { BMC_SUPER_700IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_super700in1_w), NULL, NULL, NULL }, |
| 11986 | | { BMC_36IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_36in1_w), NULL, NULL, NULL }, |
| 11987 | | { BMC_21IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_21in1_w), NULL, NULL, NULL }, |
| 11988 | | { BMC_150IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_150in1_w), NULL, NULL, NULL }, |
| 11989 | | { BMC_35IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_35in1_w), NULL, NULL, NULL }, |
| 11990 | | { BMC_64IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_64in1_w), NULL, NULL, NULL }, |
| 11991 | | { BMC_SUPERHIK_300IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_hik300_w), NULL, NULL, NULL }, |
| 11992 | | { BMC_SUPERGUN_20IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::supergun20in1_w), NULL, NULL, NULL }, |
| 11993 | | { BMC_72IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_72in1_w), NULL, NULL, NULL }, |
| 11994 | | { BMC_76IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_76in1_w), NULL, NULL, NULL }, |
| 11995 | | { BMC_SUPER_42IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_76in1_w), NULL, NULL, NULL }, |
| 11996 | | { BMC_1200IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_1200in1_w), NULL, NULL, NULL }, |
| 11997 | | { BMC_31IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_31in1_w), NULL, NULL, NULL }, |
| 11998 | | { BMC_22GAMES, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_22g_w), NULL, NULL, NULL }, |
| 11999 | | { BMC_20IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_20in1_w), NULL, NULL, NULL }, |
| 12000 | | { BMC_110IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_110in1_w), NULL, NULL, NULL }, |
| 12001 | | { BMC_64IN1NR, NES_WRITEONLY(nes_state::bmc_64in1nr_l_w), NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_64in1nr_w), NULL, NULL, NULL }, |
| 12002 | | { BMC_S24IN1SC03, NES_WRITEONLY(nes_state::bmc_s24in1sc03_l_w), NES_NOACCESS, NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 12003 | | { BMC_HIK8IN1, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_hik8_m_w), NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 12004 | | { BMC_SUPERHIK_4IN1, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_hik4in1_m_w), NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 12005 | | { BMC_SUPERBIG_7IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_sbig7_w), NULL, NULL, mmc3_irq }, |
| 12006 | | { BMC_MARIOPARTY_7IN1, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_mario7in1_m_w), NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 12007 | | { BMC_GOLD_7IN1, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_gold7in1_m_w), NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 12008 | | { BMC_FAMILY_4646B, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_family4646_m_w), NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 12009 | | { BMC_15IN1, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_15in1_m_w), NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 12010 | | { BMC_BALLGAMES_11IN1, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_ball11_m_w), NES_WRITEONLY(nes_state::bmc_ball11_w), NULL, NULL, NULL }, |
| 12011 | | { BMC_GOLDENCARD_6IN1, NES_WRITEONLY(nes_state::bmc_gc6in1_l_w), NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_gc6in1_w), NULL, NULL, mmc3_irq }, |
| 12012 | | { BMC_VT5201, NES_NOACCESS, NES_NOACCESS, {write8_delegate(FUNC(nes_state::bmc_vt5201_w),(nes_state *)0), read8_delegate(FUNC(nes_state::bmc_vt5201_r),(nes_state *)0)}, NULL, NULL, NULL }, |
| 12013 | | { BMC_BENSHENG_BS5, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_bs5_w), NULL, NULL, NULL }, |
| 12014 | | { BMC_810544, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_810544_w), NULL, NULL, NULL }, |
| 12015 | | { BMC_NTD_03, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::bmc_ntd03_w), NULL, NULL, NULL }, |
| 12016 | | { BMC_G63IN1, NES_NOACCESS, NES_NOACCESS, {write8_delegate(FUNC(nes_state::bmc_gb63_w),(nes_state *)0), read8_delegate(FUNC(nes_state::bmc_gb63_r),(nes_state *)0)}, NULL, NULL, NULL }, |
| 12017 | | { BMC_FK23C, NES_WRITEONLY(nes_state::fk23c_l_w), NES_NOACCESS, NES_WRITEONLY(nes_state::fk23c_w), NULL, NULL, mmc3_irq }, |
| 12018 | | { BMC_FK23CA, NES_WRITEONLY(nes_state::fk23c_l_w), NES_NOACCESS, NES_WRITEONLY(nes_state::fk23c_w), NULL, NULL, mmc3_irq }, |
| 12019 | | { BMC_PJOY84, NES_NOACCESS, NES_WRITEONLY(nes_state::pjoy84_m_w), NES_WRITEONLY(nes_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 11978 | { BMC_190IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_190in1_w), NULL, NULL, NULL }, |
| 11979 | { BMC_A65AS, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_a65as_w), NULL, NULL, NULL }, |
| 11980 | { BMC_GS2004, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_gs2004_w), NULL, NULL, NULL }, |
| 11981 | { BMC_GS2013, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_gs2013_w), NULL, NULL, NULL }, |
| 11982 | { BMC_NOVELDIAMOND, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::novel1_w), NULL, NULL, NULL }, |
| 11983 | { BMC_9999999IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::novel2_w), NULL, NULL, NULL }, |
| 11984 | { BMC_T262, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_t262_w), NULL, NULL, NULL }, |
| 11985 | { BMC_WS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_ws_m_w), NES_NOACCESS, NULL, NULL, NULL }, |
| 11986 | { BMC_GKA, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_gka_w), NULL, NULL, NULL }, |
| 11987 | { BMC_GKB, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_gkb_w), NULL, NULL, NULL }, |
| 11988 | { BMC_SUPER_700IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_super700in1_w), NULL, NULL, NULL }, |
| 11989 | { BMC_36IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_36in1_w), NULL, NULL, NULL }, |
| 11990 | { BMC_21IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_21in1_w), NULL, NULL, NULL }, |
| 11991 | { BMC_150IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_150in1_w), NULL, NULL, NULL }, |
| 11992 | { BMC_35IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_35in1_w), NULL, NULL, NULL }, |
| 11993 | { BMC_64IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_64in1_w), NULL, NULL, NULL }, |
| 11994 | { BMC_SUPERHIK_300IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_hik300_w), NULL, NULL, NULL }, |
| 11995 | { BMC_SUPERGUN_20IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::supergun20in1_w), NULL, NULL, NULL }, |
| 11996 | { BMC_72IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_72in1_w), NULL, NULL, NULL }, |
| 11997 | { BMC_76IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_76in1_w), NULL, NULL, NULL }, |
| 11998 | { BMC_SUPER_42IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_76in1_w), NULL, NULL, NULL }, |
| 11999 | { BMC_1200IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_1200in1_w), NULL, NULL, NULL }, |
| 12000 | { BMC_31IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_31in1_w), NULL, NULL, NULL }, |
| 12001 | { BMC_22GAMES, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_22g_w), NULL, NULL, NULL }, |
| 12002 | { BMC_20IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_20in1_w), NULL, NULL, NULL }, |
| 12003 | { BMC_110IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_110in1_w), NULL, NULL, NULL }, |
| 12004 | { BMC_64IN1NR, NES_WRITEONLY(nes_carts_state::bmc_64in1nr_l_w), NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_64in1nr_w), NULL, NULL, NULL }, |
| 12005 | { BMC_S24IN1SC03, NES_WRITEONLY(nes_carts_state::bmc_s24in1sc03_l_w), NES_NOACCESS, NES_WRITEONLY(nes_carts_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 12006 | { BMC_HIK8IN1, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_hik8_m_w), NES_WRITEONLY(nes_carts_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 12007 | { BMC_SUPERHIK_4IN1, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_hik4in1_m_w), NES_WRITEONLY(nes_carts_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 12008 | { BMC_SUPERBIG_7IN1, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_sbig7_w), NULL, NULL, mmc3_irq }, |
| 12009 | { BMC_MARIOPARTY_7IN1, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_mario7in1_m_w), NES_WRITEONLY(nes_carts_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 12010 | { BMC_GOLD_7IN1, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_gold7in1_m_w), NES_WRITEONLY(nes_carts_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 12011 | { BMC_FAMILY_4646B, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_family4646_m_w), NES_WRITEONLY(nes_carts_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 12012 | { BMC_15IN1, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_15in1_m_w), NES_WRITEONLY(nes_carts_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 12013 | { BMC_BALLGAMES_11IN1, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_ball11_m_w), NES_WRITEONLY(nes_carts_state::bmc_ball11_w), NULL, NULL, NULL }, |
| 12014 | { BMC_GOLDENCARD_6IN1, NES_WRITEONLY(nes_carts_state::bmc_gc6in1_l_w), NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_gc6in1_w), NULL, NULL, mmc3_irq }, |
| 12015 | { BMC_VT5201, NES_NOACCESS, NES_NOACCESS, NES_READWRITE(nes_carts_state::bmc_vt5201_w, nes_carts_state::bmc_vt5201_r), NULL, NULL, NULL }, |
| 12016 | { BMC_BENSHENG_BS5, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_bs5_w), NULL, NULL, NULL }, |
| 12017 | { BMC_810544, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_810544_w), NULL, NULL, NULL }, |
| 12018 | { BMC_NTD_03, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::bmc_ntd03_w), NULL, NULL, NULL }, |
| 12019 | { BMC_G63IN1, NES_NOACCESS, NES_NOACCESS, NES_READWRITE(nes_carts_state::bmc_gb63_w, nes_carts_state::bmc_gb63_r), NULL, NULL, NULL }, |
| 12020 | { BMC_FK23C, NES_WRITEONLY(nes_carts_state::fk23c_l_w), NES_NOACCESS, NES_WRITEONLY(nes_carts_state::fk23c_w), NULL, NULL, mmc3_irq }, |
| 12021 | { BMC_FK23CA, NES_WRITEONLY(nes_carts_state::fk23c_l_w), NES_NOACCESS, NES_WRITEONLY(nes_carts_state::fk23c_w), NULL, NULL, mmc3_irq }, |
| 12022 | { BMC_PJOY84, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::pjoy84_m_w), NES_WRITEONLY(nes_carts_state::txrom_w), NULL, NULL, mmc3_irq }, |
| 12020 | 12023 | // |
| 12021 | | { FFE_MAPPER6, NES_WRITEONLY(nes_state::mapper6_l_w), NES_NOACCESS, NES_WRITEONLY(nes_state::mapper6_w), NULL, NULL, ffe_irq }, |
| 12022 | | { FFE_MAPPER8, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_state::mapper8_w), NULL, NULL, NULL }, |
| 12023 | | { FFE_MAPPER17, NES_WRITEONLY(nes_state::mapper17_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, ffe_irq }, |
| 12024 | { FFE_MAPPER6, NES_WRITEONLY(nes_carts_state::mapper6_l_w), NES_NOACCESS, NES_WRITEONLY(nes_carts_state::mapper6_w), NULL, NULL, ffe_irq }, |
| 12025 | { FFE_MAPPER8, NES_NOACCESS, NES_NOACCESS, NES_WRITEONLY(nes_carts_state::mapper8_w), NULL, NULL, NULL }, |
| 12026 | { FFE_MAPPER17, NES_WRITEONLY(nes_carts_state::mapper17_l_w), NES_NOACCESS, NES_NOACCESS, NULL, NULL, ffe_irq }, |
| 12024 | 12027 | // for debug and development |
| 12025 | | { UNKNOWN_BOARD, {write8_delegate(FUNC(nes_state::dummy_l_w),(nes_state *)0), read8_delegate(FUNC(nes_state::dummy_l_r),(nes_state *)0)}, {write8_delegate(FUNC(nes_state::dummy_m_w),(nes_state *)0), read8_delegate(FUNC(nes_state::dummy_m_r),(nes_state *)0)}, {write8_delegate(FUNC(nes_state::dummy_w),(nes_state *)0), read8_delegate(FUNC(nes_state::dummy_r),(nes_state *)0)}, NULL, NULL, NULL }, |
| 12028 | { UNKNOWN_BOARD, NES_READWRITE(nes_carts_state::dummy_l_w, nes_carts_state::dummy_l_r), NES_READWRITE(nes_carts_state::dummy_m_w, nes_carts_state::dummy_m_r), NES_READWRITE(nes_carts_state::dummy_w, nes_carts_state::dummy_r), NULL, NULL, NULL }, |
| 12026 | 12029 | // |
| 12027 | 12030 | { UNSUPPORTED_BOARD, NES_NOACCESS, NES_NOACCESS, NES_NOACCESS, NULL, NULL, NULL }, |
| 12028 | 12031 | // |
| r18064 | r18065 | |
| 12039 | 12042 | return NULL; |
| 12040 | 12043 | } |
| 12041 | 12044 | |
| 12042 | | void pcb_handlers_setup( running_machine &machine ) |
| 12045 | void nes_state::pcb_handlers_setup() |
| 12043 | 12046 | { |
| 12044 | | nes_state *state = machine.driver_data<nes_state>(); |
| 12045 | | const nes_pcb_intf *intf = nes_pcb_intf_lookup(state->m_pcb_id); |
| 12047 | const nes_pcb_intf *intf = nes_pcb_intf_lookup(m_pcb_id); |
| 12046 | 12048 | |
| 12047 | 12049 | if (intf == NULL) |
| 12048 | 12050 | fatalerror("Missing PCB interface\n"); |
| 12049 | 12051 | |
| 12050 | 12052 | if (intf) |
| 12051 | 12053 | { |
| 12052 | | state->m_mmc_write_low = intf->mmc_l.write; |
| 12053 | | if (!state->m_mmc_write_low.isnull()) state->m_mmc_write_low.late_bind(*state); |
| 12054 | | state->m_mmc_write_mid = intf->mmc_m.write; |
| 12055 | | if (!state->m_mmc_write_mid.isnull()) state->m_mmc_write_mid.late_bind(*state); |
| 12056 | | state->m_mmc_write = intf->mmc_h.write; |
| 12057 | | if (!state->m_mmc_write.isnull()) state->m_mmc_write.late_bind(*state); |
| 12058 | | state->m_mmc_read_low = intf->mmc_l.read; |
| 12059 | | if (!state->m_mmc_read_low.isnull()) state->m_mmc_read_low.late_bind(*state); |
| 12060 | | state->m_mmc_read_mid = intf->mmc_m.read; // in progress |
| 12061 | | if (!state->m_mmc_read_mid.isnull()) state->m_mmc_read_mid.late_bind(*state); |
| 12062 | | state->m_mmc_read = intf->mmc_h.read; // in progress |
| 12063 | | if (!state->m_mmc_read.isnull()) state->m_mmc_read.late_bind(*state); |
| 12064 | | state->m_ppu->set_latch(intf->mmc_ppu_latch); |
| 12054 | m_mmc_write_low = intf->mmc_l.write; |
| 12055 | if (!m_mmc_write_low.isnull()) m_mmc_write_low.late_bind(*this); |
| 12056 | m_mmc_write_mid = intf->mmc_m.write; |
| 12057 | if (!m_mmc_write_mid.isnull()) m_mmc_write_mid.late_bind(*this); |
| 12058 | m_mmc_write = intf->mmc_h.write; |
| 12059 | if (!m_mmc_write.isnull()) m_mmc_write.late_bind(*this); |
| 12060 | m_mmc_read_low = intf->mmc_l.read; |
| 12061 | if (!m_mmc_read_low.isnull()) m_mmc_read_low.late_bind(*this); |
| 12062 | m_mmc_read_mid = intf->mmc_m.read; // in progress |
| 12063 | if (!m_mmc_read_mid.isnull()) m_mmc_read_mid.late_bind(*this); |
| 12064 | m_mmc_read = intf->mmc_h.read; // in progress |
| 12065 | if (!m_mmc_read.isnull()) m_mmc_read.late_bind(*this); |
| 12066 | m_ppu->set_latch(intf->mmc_ppu_latch); |
| 12065 | 12067 | } |
| 12066 | 12068 | else |
| 12067 | 12069 | { |
| 12068 | | logerror("PCB %d is not yet supported, defaulting to no mapper.\n", state->m_pcb_id); |
| 12069 | | state->m_mmc_write_low = write8_delegate(); |
| 12070 | | state->m_mmc_write_mid = write8_delegate(); |
| 12071 | | state->m_mmc_write = write8_delegate(); |
| 12072 | | state->m_mmc_read_low = read8_delegate(); |
| 12073 | | state->m_mmc_read_mid = read8_delegate(); // in progress |
| 12074 | | state->m_mmc_read = read8_delegate(); // in progress |
| 12075 | | state->m_ppu->set_latch(NULL); |
| 12070 | logerror("PCB %d is not yet supported, defaulting to no mapper.\n", m_pcb_id); |
| 12071 | m_mmc_write_low = write8_delegate(); |
| 12072 | m_mmc_write_mid = write8_delegate(); |
| 12073 | m_mmc_write = write8_delegate(); |
| 12074 | m_mmc_read_low = read8_delegate(); |
| 12075 | m_mmc_read_mid = read8_delegate(); // in progress |
| 12076 | m_mmc_read = read8_delegate(); // in progress |
| 12077 | m_ppu->set_latch(NULL); |
| 12076 | 12078 | } |
| 12077 | 12079 | |
| 12078 | | state->m_mmc3_prg_cb = prg8_x; |
| 12079 | | state->m_mmc3_chr_cb = chr1_x; |
| 12080 | m_mmc3_prg_cb = prg8_x; |
| 12081 | m_mmc3_chr_cb = chr1_x; |
| 12080 | 12082 | |
| 12081 | | switch (state->m_pcb_id) |
| 12083 | switch (m_pcb_id) |
| 12082 | 12084 | { |
| 12083 | 12085 | case STD_TXSROM: |
| 12084 | | state->m_mmc3_chr_cb = txsrom_chr_cb; |
| 12086 | m_mmc3_chr_cb = txsrom_chr_cb; |
| 12085 | 12087 | break; |
| 12086 | 12088 | case GOUDER_37017: |
| 12087 | | state->m_mmc3_prg_cb = gouder_sf4_prg_cb; |
| 12089 | m_mmc3_prg_cb = gouder_sf4_prg_cb; |
| 12088 | 12090 | break; |
| 12089 | 12091 | case KASING_BOARD: |
| 12090 | | state->m_mmc3_prg_cb = kasing_prg_cb; |
| 12092 | m_mmc3_prg_cb = kasing_prg_cb; |
| 12091 | 12093 | break; |
| 12092 | 12094 | case REXSOFT_DBZ5: |
| 12093 | | state->m_mmc3_chr_cb = rex_dbz_chr_cb; |
| 12095 | m_mmc3_chr_cb = rex_dbz_chr_cb; |
| 12094 | 12096 | break; |
| 12095 | 12097 | case TXC_TW: |
| 12096 | | state->m_mmc3_prg_cb = txc_tw_prg_cb; |
| 12098 | m_mmc3_prg_cb = txc_tw_prg_cb; |
| 12097 | 12099 | break; |
| 12098 | 12100 | case WAIXING_TYPE_A: |
| 12099 | | state->m_mmc3_chr_cb = waixing_a_chr_cb; |
| 12101 | m_mmc3_chr_cb = waixing_a_chr_cb; |
| 12100 | 12102 | break; |
| 12101 | 12103 | case WAIXING_TYPE_A_1: |
| 12102 | | state->m_mmc3_chr_cb = waixing_a1_chr_cb; |
| 12104 | m_mmc3_chr_cb = waixing_a1_chr_cb; |
| 12103 | 12105 | break; |
| 12104 | 12106 | case WAIXING_TYPE_B: |
| 12105 | | state->m_mmc3_chr_cb = waixing_b_chr_cb; |
| 12107 | m_mmc3_chr_cb = waixing_b_chr_cb; |
| 12106 | 12108 | break; |
| 12107 | 12109 | case WAIXING_TYPE_C: |
| 12108 | | state->m_mmc3_chr_cb = waixing_c_chr_cb; |
| 12110 | m_mmc3_chr_cb = waixing_c_chr_cb; |
| 12109 | 12111 | break; |
| 12110 | 12112 | case WAIXING_TYPE_D: |
| 12111 | | state->m_mmc3_chr_cb = waixing_d_chr_cb; |
| 12113 | m_mmc3_chr_cb = waixing_d_chr_cb; |
| 12112 | 12114 | break; |
| 12113 | 12115 | case WAIXING_TYPE_E: |
| 12114 | | state->m_mmc3_chr_cb = waixing_e_chr_cb; |
| 12116 | m_mmc3_chr_cb = waixing_e_chr_cb; |
| 12115 | 12117 | break; |
| 12116 | 12118 | case WAIXING_TYPE_G: |
| 12117 | | state->m_mmc3_chr_cb = waixing_g_chr_cb; |
| 12119 | m_mmc3_chr_cb = waixing_g_chr_cb; |
| 12118 | 12120 | break; |
| 12119 | 12121 | case WAIXING_TYPE_H: |
| 12120 | | state->m_mmc3_chr_cb = waixing_h_chr_cb; |
| 12122 | m_mmc3_chr_cb = waixing_h_chr_cb; |
| 12121 | 12123 | break; |
| 12122 | 12124 | case WAIXING_SECURITY: |
| 12123 | | state->m_mmc3_prg_cb = waixing_sec_prg_cb; |
| 12124 | | state->m_mmc3_chr_cb = waixing_sec_chr_cb; |
| 12125 | m_mmc3_prg_cb = waixing_sec_prg_cb; |
| 12126 | m_mmc3_chr_cb = waixing_sec_chr_cb; |
| 12125 | 12127 | break; |
| 12126 | 12128 | case WAIXING_SH2: |
| 12127 | | state->m_mmc3_chr_cb = waixing_sh2_chr_cb; |
| 12129 | m_mmc3_chr_cb = waixing_sh2_chr_cb; |
| 12128 | 12130 | break; |
| 12129 | 12131 | case UNL_8237: |
| 12130 | | state->m_mmc3_prg_cb = unl_8237_prg_cb; |
| 12131 | | state->m_mmc3_chr_cb = unl_8237_chr_cb; |
| 12132 | m_mmc3_prg_cb = unl_8237_prg_cb; |
| 12133 | m_mmc3_chr_cb = unl_8237_chr_cb; |
| 12132 | 12134 | break; |
| 12133 | 12135 | case UNL_H2288: |
| 12134 | | state->m_mmc3_prg_cb = h2288_prg_cb; |
| 12136 | m_mmc3_prg_cb = h2288_prg_cb; |
| 12135 | 12137 | break; |
| 12136 | 12138 | case SUPERGAME_BOOGERMAN: |
| 12137 | | state->m_mmc3_prg_cb = sgame_boog_prg_cb; |
| 12138 | | state->m_mmc3_chr_cb = sgame_boog_chr_cb; |
| 12139 | m_mmc3_prg_cb = sgame_boog_prg_cb; |
| 12140 | m_mmc3_chr_cb = sgame_boog_chr_cb; |
| 12139 | 12141 | break; |
| 12140 | 12142 | case UNL_KOF96: |
| 12141 | | state->m_mmc3_prg_cb = kof96_prg_cb; |
| 12142 | | state->m_mmc3_chr_cb = kof96_chr_cb; |
| 12143 | m_mmc3_prg_cb = kof96_prg_cb; |
| 12144 | m_mmc3_chr_cb = kof96_chr_cb; |
| 12143 | 12145 | break; |
| 12144 | 12146 | case KAY_PANDAPRINCE: |
| 12145 | | state->m_mmc3_prg_cb = kay_pp_prg_cb; |
| 12146 | | state->m_mmc3_chr_cb = kay_pp_chr_cb; |
| 12147 | m_mmc3_prg_cb = kay_pp_prg_cb; |
| 12148 | m_mmc3_chr_cb = kay_pp_chr_cb; |
| 12147 | 12149 | break; |
| 12148 | 12150 | case BMC_FK23C: |
| 12149 | 12151 | case BMC_FK23CA: |
| 12150 | | state->m_mmc3_prg_cb = fk23c_prg_cb; |
| 12151 | | state->m_mmc3_chr_cb = fk23c_chr_cb; |
| 12152 | m_mmc3_prg_cb = fk23c_prg_cb; |
| 12153 | m_mmc3_chr_cb = fk23c_chr_cb; |
| 12152 | 12154 | break; |
| 12153 | 12155 | case BMC_S24IN1SC03: |
| 12154 | | state->m_mmc3_prg_cb = bmc_s24in1sc03_prg_cb; |
| 12155 | | state->m_mmc3_chr_cb = bmc_s24in1sc03_chr_cb; |
| 12156 | m_mmc3_prg_cb = bmc_s24in1sc03_prg_cb; |
| 12157 | m_mmc3_chr_cb = bmc_s24in1sc03_chr_cb; |
| 12156 | 12158 | break; |
| 12157 | 12159 | case BMC_PJOY84: |
| 12158 | | state->m_mmc3_prg_cb = pjoy84_prg_cb; |
| 12159 | | state->m_mmc3_chr_cb = pjoy84_chr_cb; |
| 12160 | m_mmc3_prg_cb = pjoy84_prg_cb; |
| 12161 | m_mmc3_chr_cb = pjoy84_chr_cb; |
| 12160 | 12162 | break; |
| 12161 | 12163 | } |
| 12162 | 12164 | } |
| r18064 | r18065 | |
| 12188 | 12190 | } |
| 12189 | 12191 | |
| 12190 | 12192 | // WIP code |
| 12191 | | static int pcb_initialize( running_machine &machine, int idx ) |
| 12193 | int nes_state::pcb_initialize( int idx ) |
| 12192 | 12194 | { |
| 12193 | | nes_state *state = machine.driver_data<nes_state>(); |
| 12194 | 12195 | int err = 0, i; |
| 12195 | 12196 | |
| 12196 | 12197 | /* basic PRG config */ |
| 12197 | | prg32(machine, 0); |
| 12198 | prg32(machine(), 0); |
| 12198 | 12199 | |
| 12199 | 12200 | /* some boards will not use this, but directly CHRROM (resp. CHRRAM) if the board only has VROM (resp. VRAM) */ |
| 12200 | | state->m_mmc_chr_source = state->m_chr_chunks ? CHRROM : CHRRAM; |
| 12201 | | chr8(machine, 0, state->m_mmc_chr_source); |
| 12201 | m_mmc_chr_source = m_chr_chunks ? CHRROM : CHRRAM; |
| 12202 | chr8(machine(), 0, m_mmc_chr_source); |
| 12202 | 12203 | |
| 12203 | 12204 | /* Here, we init a few helpers: 4 prg banks and 16 chr banks - some mappers use them */ |
| 12204 | 12205 | for (i = 0; i < 4; i++) |
| 12205 | | state->m_mmc_prg_bank[i] = 0; |
| 12206 | m_mmc_prg_bank[i] = 0; |
| 12206 | 12207 | for (i = 0; i < 16; i++) |
| 12207 | | state->m_mmc_vrom_bank[i] = 0; |
| 12208 | m_mmc_vrom_bank[i] = 0; |
| 12208 | 12209 | for (i = 0; i < 16; i++) |
| 12209 | | state->m_mmc_extra_bank[i] = 0; |
| 12210 | m_mmc_extra_bank[i] = 0; |
| 12210 | 12211 | |
| 12211 | | state->m_mmc_latch1 = 0; |
| 12212 | | state->m_mmc_latch2 = 0; |
| 12212 | m_mmc_latch1 = 0; |
| 12213 | m_mmc_latch2 = 0; |
| 12213 | 12214 | |
| 12214 | 12215 | /* Finally, we init IRQ-related quantities. */ |
| 12215 | | state->m_IRQ_enable = state->m_IRQ_enable_latch = 0; |
| 12216 | | state->m_IRQ_count = state->m_IRQ_count_latch = 0; |
| 12217 | | state->m_IRQ_toggle = 0; |
| 12216 | m_IRQ_enable = m_IRQ_enable_latch = 0; |
| 12217 | m_IRQ_count = m_IRQ_count_latch = 0; |
| 12218 | m_IRQ_toggle = 0; |
| 12218 | 12219 | |
| 12219 | 12220 | switch (idx) |
| 12220 | 12221 | { |
| r18064 | r18065 | |
| 12316 | 12317 | case KAISER_KS7017: |
| 12317 | 12318 | case KAISER_KS7032: |
| 12318 | 12319 | case KAISER_KS202: |
| 12319 | | prg16_89ab(machine, 0); |
| 12320 | | prg16_cdef(machine, state->m_prg_chunks - 1); |
| 12320 | prg16_89ab(machine(), 0); |
| 12321 | prg16_cdef(machine(), m_prg_chunks - 1); |
| 12321 | 12322 | break; |
| 12322 | 12323 | |
| 12323 | 12324 | case STD_CPROM: // mapper 13 |
| 12324 | | chr4_0(machine, 0, CHRRAM); |
| 12325 | | chr4_4(machine, 0, CHRRAM); |
| 12325 | chr4_0(machine(), 0, CHRRAM); |
| 12326 | chr4_4(machine(), 0, CHRRAM); |
| 12326 | 12327 | break; |
| 12327 | 12328 | case STD_AXROM: // mapper 7 |
| 12328 | | set_nt_mirroring(machine, PPU_MIRROR_LOW); |
| 12329 | set_nt_mirroring(machine(), PPU_MIRROR_LOW); |
| 12329 | 12330 | break; |
| 12330 | 12331 | case STD_SXROM: // mapper 1, 155 |
| 12331 | 12332 | case STD_SOROM: |
| 12332 | 12333 | case STD_SXROM_A: |
| 12333 | 12334 | case STD_SOROM_A: |
| 12334 | | state->m_mmc1_latch = 0; |
| 12335 | | state->m_mmc1_count = 0; |
| 12336 | | state->m_mmc_reg[0] = 0x0f; |
| 12337 | | state->m_mmc_reg[1] = state->m_mmc_reg[2] = state->m_mmc_reg[3] = 0; |
| 12338 | | state->m_mmc1_reg_write_enable = 1; |
| 12339 | | set_nt_mirroring(machine, PPU_MIRROR_HORZ); |
| 12340 | | mmc1_set_chr(machine); |
| 12341 | | mmc1_set_prg(machine); |
| 12342 | | if (state->m_battery || state->m_wram) |
| 12343 | | wram_bank(machine, 0, (idx == STD_SOROM) ? NES_WRAM : NES_BATTERY); |
| 12335 | m_mmc1_latch = 0; |
| 12336 | m_mmc1_count = 0; |
| 12337 | m_mmc_reg[0] = 0x0f; |
| 12338 | m_mmc_reg[1] = m_mmc_reg[2] = m_mmc_reg[3] = 0; |
| 12339 | m_mmc1_reg_write_enable = 1; |
| 12340 | set_nt_mirroring(machine(), PPU_MIRROR_HORZ); |
| 12341 | mmc1_set_chr(machine()); |
| 12342 | mmc1_set_prg(machine()); |
| 12343 | if (m_battery || m_wram) |
| 12344 | wram_bank(machine(), 0, (idx == STD_SOROM) ? NES_WRAM : NES_BATTERY); |
| 12344 | 12345 | break; |
| 12345 | 12346 | case STD_PXROM: // mapper 9 |
| 12346 | | state->m_mmc_reg[0] = state->m_mmc_reg[2] = 0; |
| 12347 | | state->m_mmc_reg[1] = state->m_mmc_reg[3] = 0; |
| 12348 | | state->m_mmc_latch1 = state->m_mmc_latch2 = 0xfe; |
| 12349 | | prg8_89(machine, 0); |
| 12350 | | prg8_ab(machine, (state->m_prg_chunks << 1) - 3); |
| 12351 | | prg8_cd(machine, (state->m_prg_chunks << 1) - 2); |
| 12352 | | prg8_ef(machine, (state->m_prg_chunks << 1) - 1); |
| 12347 | m_mmc_reg[0] = m_mmc_reg[2] = 0; |
| 12348 | m_mmc_reg[1] = m_mmc_reg[3] = 0; |
| 12349 | m_mmc_latch1 = m_mmc_latch2 = 0xfe; |
| 12350 | prg8_89(machine(), 0); |
| 12351 | prg8_ab(machine(), (m_prg_chunks << 1) - 3); |
| 12352 | prg8_cd(machine(), (m_prg_chunks << 1) - 2); |
| 12353 | prg8_ef(machine(), (m_prg_chunks << 1) - 1); |
| 12353 | 12354 | break; |
| 12354 | 12355 | case STD_FXROM: // mapper 10 |
| 12355 | | state->m_mmc_reg[0] = state->m_mmc_reg[2] = 0; |
| 12356 | | state->m_mmc_reg[1] = state->m_mmc_reg[3] = 0; |
| 12357 | | state->m_mmc_latch1 = state->m_mmc_latch2 = 0xfe; |
| 12358 | | prg16_89ab(machine, 0); |
| 12359 | | prg16_cdef(machine, state->m_prg_chunks - 1); |
| 12356 | m_mmc_reg[0] = m_mmc_reg[2] = 0; |
| 12357 | m_mmc_reg[1] = m_mmc_reg[3] = 0; |
| 12358 | m_mmc_latch1 = m_mmc_latch2 = 0xfe; |
| 12359 | prg16_89ab(machine(), 0); |
| 12360 | prg16_cdef(machine(), m_prg_chunks - 1); |
| 12360 | 12361 | break; |
| 12361 | 12362 | case STD_TXROM: // mapper 4 |
| 12362 | 12363 | case STD_TVROM: |
| r18064 | r18065 | |
| 12378 | 12379 | case UNL_KOF97: |
| 12379 | 12380 | case UNL_603_5052: |
| 12380 | 12381 | case NITRA_TDA: // mapper 250 |
| 12381 | | if (state->m_four_screen_vram) // only TXROM and DXROM have 4-screen mirroring |
| 12382 | if (m_four_screen_vram) // only TXROM and DXROM have 4-screen mirroring |
| 12382 | 12383 | { |
| 12383 | | set_nt_page(machine, 0, CART_NTRAM, 0, 1); |
| 12384 | | set_nt_page(machine, 1, CART_NTRAM, 1, 1); |
| 12385 | | set_nt_page(machine, 2, CART_NTRAM, 2, 1); |
| 12386 | | set_nt_page(machine, 3, CART_NTRAM, 3, 1); |
| 12384 | set_nt_page(machine(), 0, CART_NTRAM, 0, 1); |
| 12385 | set_nt_page(machine(), 1, CART_NTRAM, 1, 1); |
| 12386 | set_nt_page(machine(), 2, CART_NTRAM, 2, 1); |
| 12387 | set_nt_page(machine(), 3, CART_NTRAM, 3, 1); |
| 12387 | 12388 | } |
| 12388 | | mmc3_common_initialize(machine, 0xff, 0xff, 0); |
| 12389 | mmc3_common_initialize(machine(), 0xff, 0xff, 0); |
| 12389 | 12390 | break; |
| 12390 | 12391 | case STD_HKROM: // MMC6 (basically the same as TxROM, but alt IRQ behaviour) |
| 12391 | | mmc3_common_initialize(machine, 0xff, 0xff, 1); |
| 12392 | | state->m_mmc6_reg = 0xf0; |
| 12393 | | state->m_mmc_latch2 = 0; // this is used differently here compared to MMC3 |
| 12392 | mmc3_common_initialize(machine(), 0xff, 0xff, 1); |
| 12393 | m_mmc6_reg = 0xf0; |
| 12394 | m_mmc_latch2 = 0; // this is used differently here compared to MMC3 |
| 12394 | 12395 | break; |
| 12395 | 12396 | case PAL_ZZ: // mapper 37 |
| 12396 | | mmc3_common_initialize(machine, 0x07, 0x7f, 0); |
| 12397 | mmc3_common_initialize(machine(), 0x07, 0x7f, 0); |
| 12397 | 12398 | break; |
| 12398 | 12399 | case NES_QJ: // mapper 47 |
| 12399 | | mmc3_common_initialize(machine, 0x0f, 0x7f, 0); |
| 12400 | mmc3_common_initialize(machine(), 0x0f, 0x7f, 0); |
| 12400 | 12401 | break; |
| 12401 | 12402 | case STD_EXROM: // mapper 5 |
| 12402 | | state->m_MMC5_rom_bank_mode = 3; |
| 12403 | | state->m_MMC5_vrom_bank_mode = 0; |
| 12404 | | state->m_MMC5_vram_protect = 0; |
| 12405 | | state->m_mmc5_high_chr = 0; |
| 12406 | | state->m_mmc5_vram_control = 0; |
| 12407 | | state->m_mmc5_split_scr = 0; |
| 12408 | | memset(state->m_MMC5_vrom_bank, 0, ARRAY_LENGTH(state->m_MMC5_vrom_bank)); |
| 12409 | | state->m_mmc5_prg_mode = 3; |
| 12410 | | state->m_mmc5_last_chr_a = 1; |
| 12411 | | state->m_mmc5_prg_regs[0] = 0xfc; |
| 12412 | | state->m_mmc5_prg_regs[1] = 0xfd; |
| 12413 | | state->m_mmc5_prg_regs[2] = 0xfe; |
| 12414 | | state->m_mmc5_prg_regs[3] = 0xff; |
| 12415 | | memset(state->m_mmc5_vrom_regA, ~0, ARRAY_LENGTH(state->m_mmc5_vrom_regA)); |
| 12416 | | memset(state->m_mmc5_vrom_regB, ~0, ARRAY_LENGTH(state->m_mmc5_vrom_regB)); |
| 12417 | | prg16_89ab(machine, state->m_prg_chunks - 2); |
| 12418 | | prg16_cdef(machine, state->m_prg_chunks - 1); |
| 12403 | m_MMC5_rom_bank_mode = 3; |
| 12404 | m_MMC5_vrom_bank_mode = 0; |
| 12405 | m_MMC5_vram_protect = 0; |
| 12406 | m_mmc5_high_chr = 0; |
| 12407 | m_mmc5_vram_control = 0; |
| 12408 | m_mmc5_split_scr = 0; |
| 12409 | memset(m_MMC5_vrom_bank, 0, ARRAY_LENGTH(m_MMC5_vrom_bank)); |
| 12410 | m_mmc5_prg_mode = 3; |
| 12411 | m_mmc5_last_chr_a = 1; |
| 12412 | m_mmc5_prg_regs[0] = 0xfc; |
| 12413 | m_mmc5_prg_regs[1] = 0xfd; |
| 12414 | m_mmc5_prg_regs[2] = 0xfe; |
| 12415 | m_mmc5_prg_regs[3] = 0xff; |
| 12416 | memset(m_mmc5_vrom_regA, ~0, ARRAY_LENGTH(m_mmc5_vrom_regA)); |
| 12417 | memset(m_mmc5_vrom_regB, ~0, ARRAY_LENGTH(m_mmc5_vrom_regB)); |
| 12418 | prg16_89ab(machine(), m_prg_chunks - 2); |
| 12419 | prg16_cdef(machine(), m_prg_chunks - 1); |
| 12419 | 12420 | break; |
| 12420 | 12421 | case STD_NXROM: // mapper 68 |
| 12421 | 12422 | case SUNSOFT_DCS: // mapper 68 |
| 12422 | | state->m_mmc_reg[0] = 0; |
| 12423 | | prg16_89ab(machine, 0); |
| 12424 | | prg16_cdef(machine, state->m_prg_chunks - 1); |
| 12423 | m_mmc_reg[0] = 0; |
| 12424 | prg16_89ab(machine(), 0); |
| 12425 | prg16_cdef(machine(), m_prg_chunks - 1); |
| 12425 | 12426 | break; |
| 12426 | 12427 | case NAMCOT_34X3: // mapper 88 |
| 12427 | 12428 | case STD_DXROM: // mapper 206 |
| 12428 | 12429 | case STD_DRROM: |
| 12429 | | if (state->m_four_screen_vram) // only TXROM and DXROM have 4-screen mirroring |
| 12430 | if (m_four_screen_vram) // only TXROM and DXROM have 4-screen mirroring |
| 12430 | 12431 | { |
| 12431 | | set_nt_page(machine, 0, CART_NTRAM, 0, 1); |
| 12432 | | set_nt_page(machine, 1, CART_NTRAM, 1, 1); |
| 12433 | | set_nt_page(machine, 2, CART_NTRAM, 2, 1); |
| 12434 | | set_nt_page(machine, 3, CART_NTRAM, 3, 1); |
| 12432 | set_nt_page(machine(), 0, CART_NTRAM, 0, 1); |
| 12433 | set_nt_page(machine(), 1, CART_NTRAM, 1, 1); |
| 12434 | set_nt_page(machine(), 2, CART_NTRAM, 2, 1); |
| 12435 | set_nt_page(machine(), 3, CART_NTRAM, 3, 1); |
| 12435 | 12436 | } |
| 12436 | 12437 | case NAMCOT_3453: // mapper 154 |
| 12437 | | prg16_89ab(machine, state->m_prg_chunks - 2); |
| 12438 | | prg16_cdef(machine, state->m_prg_chunks - 1); |
| 12438 | prg16_89ab(machine(), m_prg_chunks - 2); |
| 12439 | prg16_cdef(machine(), m_prg_chunks - 1); |
| 12439 | 12440 | break; |
| 12440 | 12441 | case NAMCOT_3446: // mapper 76 |
| 12441 | | prg8_89(machine, 0); |
| 12442 | | prg8_ab(machine, 1); |
| 12443 | | prg16_cdef(machine, state->m_prg_chunks - 1); |
| 12444 | | chr2_0(machine, 0, CHRROM); |
| 12445 | | chr2_2(machine, 1, CHRROM); |
| 12446 | | chr2_4(machine, 2, CHRROM); |
| 12447 | | chr2_6(machine, 3, CHRROM); |
| 12442 | prg8_89(machine(), 0); |
| 12443 | prg8_ab(machine(), 1); |
| 12444 | prg16_cdef(machine(), m_prg_chunks - 1); |
| 12445 | chr2_0(machine(), 0, CHRROM); |
| 12446 | chr2_2(machine(), 1, CHRROM); |
| 12447 | chr2_4(machine(), 2, CHRROM); |
| 12448 | chr2_6(machine(), 3, CHRROM); |
| 12448 | 12449 | break; |
| 12449 | 12450 | case BANDAI_JUMP2: // mapper 153 |
| 12450 | 12451 | for (i = 0; i < 8; i++) |
| 12451 | | state->m_mmc_reg[i] = 0; |
| 12452 | | prg16_89ab(machine, 0); |
| 12453 | | prg16_cdef(machine, state->m_prg_chunks - 1); |
| 12454 | | fjump2_set_prg(machine); |
| 12452 | m_mmc_reg[i] = 0; |
| 12453 | prg16_89ab(machine(), 0); |
| 12454 | prg16_cdef(machine(), m_prg_chunks - 1); |
| 12455 | fjump2_set_prg(machine()); |
| 12455 | 12456 | break; |
| 12456 | 12457 | case BANDAI_KARAOKE: // mapper 188 |
| 12457 | | prg16_89ab(machine, 0); |
| 12458 | | prg16_cdef(machine, (state->m_prg_chunks - 1) ^ 0x08); |
| 12458 | prg16_89ab(machine(), 0); |
| 12459 | prg16_cdef(machine(), (m_prg_chunks - 1) ^ 0x08); |
| 12459 | 12460 | break; |
| 12460 | 12461 | case IREM_LROG017: // mapper 77 |
| 12461 | | chr2_2(machine, 0, CHRROM); |
| 12462 | | chr2_4(machine, 1, CHRROM); |
| 12463 | | chr2_6(machine, 2, CHRROM); |
| 12462 | chr2_2(machine(), 0, CHRROM); |
| 12463 | chr2_4(machine(), 1, CHRROM); |
| 12464 | chr2_6(machine(), 2, CHRROM); |
| 12464 | 12465 | break; |
| 12465 | 12466 | case IREM_TAM_S1: // mapper 97 |
| 12466 | | prg16_89ab(machine, state->m_prg_chunks - 1); |
| 12467 | | prg16_cdef(machine, 0); |
| 12467 | prg16_89ab(machine(), m_prg_chunks - 1); |
| 12468 | prg16_cdef(machine(), 0); |
| 12468 | 12469 | break; |
| 12469 | 12470 | case KONAMI_VRC7: // mapper 85 |
| 12470 | | prg8_89(machine, 0); |
| 12471 | | prg8_ab(machine, 0); |
| 12472 | | prg8_cd(machine, 0); |
| 12473 | | prg8_ef(machine, 0xff); |
| 12471 | prg8_89(machine(), 0); |
| 12472 | prg8_ab(machine(), 0); |
| 12473 | prg8_cd(machine(), 0); |
| 12474 | prg8_ef(machine(), 0xff); |
| 12474 | 12475 | break; |
| 12475 | 12476 | case NAMCOT_163: // mapper 19 |
| 12476 | | prg16_89ab(machine, 0); |
| 12477 | | prg16_cdef(machine, state->m_prg_chunks - 1); |
| 12478 | | set_nt_mirroring(machine, PPU_MIRROR_VERT); |
| 12477 | prg16_89ab(machine(), 0); |
| 12478 | prg16_cdef(machine(), m_prg_chunks - 1); |
| 12479 | set_nt_mirroring(machine(), PPU_MIRROR_VERT); |
| 12479 | 12480 | break; |
| 12480 | 12481 | case SUNSOFT_1: // mapper 184 |
| 12481 | 12482 | case SUNSOFT_2: // mapper 89 & 93 |
| 12482 | | prg16_89ab(machine, 0); |
| 12483 | | prg16_cdef(machine, state->m_prg_chunks - 1); |
| 12484 | | if (!state->m_hard_mirroring) |
| 12485 | | set_nt_mirroring(machine, PPU_MIRROR_LOW); |
| 12483 | prg16_89ab(machine(), 0); |
| 12484 | prg16_cdef(machine(), m_prg_chunks - 1); |
| 12485 | if (!m_hard_mirroring) |
| 12486 | set_nt_mirroring(machine(), PPU_MIRROR_LOW); |
| 12486 | 12487 | break; |
| 12487 | 12488 | |
| 12488 | 12489 | // mapper 14 |
| 12489 | 12490 | case REXSOFT_SL1632: |
| 12490 | | state->m_mmc_extra_bank[2] = 0xfe; |
| 12491 | | state->m_mmc_extra_bank[3] = 0xff; |
| 12492 | | state->m_mmc_extra_bank[0] = state->m_mmc_extra_bank[1] = state->m_mmc_extra_bank[4] = state->m_mmc_extra_bank[5] = state->m_mmc_extra_bank[6] = 0; |
| 12493 | | state->m_mmc_extra_bank[7] = state->m_mmc_extra_bank[8] = state->m_mmc_extra_bank[9] = state->m_mmc_extra_bank[0xa] = state->m_mmc_extra_bank[0xb] = 0; |
| 12494 | | state->m_mmc_reg[0] = state->m_mmc_reg[1] = 0; |
| 12495 | | mmc3_common_initialize(machine, 0xff, 0xff, 0); |
| 12491 | m_mmc_extra_bank[2] = 0xfe; |
| 12492 | m_mmc_extra_bank[3] = 0xff; |
| 12493 | m_mmc_extra_bank[0] = m_mmc_extra_bank[1] = m_mmc_extra_bank[4] = m_mmc_extra_bank[5] = m_mmc_extra_bank[6] = 0; |
| 12494 | m_mmc_extra_bank[7] = m_mmc_extra_bank[8] = m_mmc_extra_bank[9] = m_mmc_extra_bank[0xa] = m_mmc_extra_bank[0xb] = 0; |
| 12495 | m_mmc_reg[0] = m_mmc_reg[1] = 0; |
| 12496 | mmc3_common_initialize(machine(), 0xff, 0xff, 0); |
| 12496 | 12497 | break; |
| 12497 | 12498 | // mapper 15 |
| 12498 | 12499 | case WAIXING_PS2: |
| 12499 | | set_nt_mirroring(machine, PPU_MIRROR_VERT); |
| 12500 | set_nt_mirroring(machine(), PPU_MIRROR_VERT); |
| 12500 | 12501 | break; |
| 12501 | 12502 | |
| 12502 | 12503 | // mapper 35 |
| r18064 | r18065 | |
| 12504 | 12505 | // mapper 42 |
| 12505 | 12506 | case BTL_MARIOBABY: |
| 12506 | 12507 | case BTL_AISENSHINICOL: |
| 12507 | | prg32(machine, 0xff); |
| 12508 | prg32(machine(), 0xff); |
| 12508 | 12509 | break; |
| 12509 | 12510 | |
| 12510 | 12511 | // mapper 40 |
| 12511 | 12512 | case BTL_SMB2A: |
| 12512 | | prg8_67(machine, 0xfe); |
| 12513 | | prg8_89(machine, 0xfc); |
| 12514 | | prg8_ab(machine, 0xfd); |
| 12515 | | prg8_cd(machine, 0xfe); |
| 12516 | | prg8_ef(machine, 0xff); |
| 12513 | prg8_67(machine(), 0xfe); |
| 12514 | prg8_89(machine(), 0xfc); |
| 12515 | prg8_ab(machine(), 0xfd); |
| 12516 | prg8_cd(machine(), 0xfe); |
| 12517 | prg8_ef(machine(), 0xff); |
| 12517 | 12518 | break; |
| 12518 | 12519 | |
| 12519 | 12520 | // mapper 43 |
| 12520 | 12521 | case UNL_SMB2J: |
| 12521 | | if (state->m_battery) |
| 12522 | | memset(state->m_battery_ram, 0x2000, 0xff); |
| 12523 | | else if (state->m_prg_ram) |
| 12524 | | memset(state->m_wram, 0x2000, 0xff); |
| 12522 | if (m_battery) |
| 12523 | memset(m_battery_ram, 0x2000, 0xff); |
| 12524 | else if (m_prg_ram) |
| 12525 | memset(m_wram, 0x2000, 0xff); |
| 12525 | 12526 | break; |
| 12526 | 12527 | // mapper 44 |
| 12527 | 12528 | case BMC_SUPERBIG_7IN1: |
| 12528 | 12529 | // mapper 49 |
| 12529 | 12530 | case BMC_SUPERHIK_4IN1: |
| 12530 | | mmc3_common_initialize(machine, 0x0f, 0x7f, 0); |
| 12531 | mmc3_common_initialize(machine(), 0x0f, 0x7f, 0); |
| 12531 | 12532 | break; |
| 12532 | 12533 | // mapper 45 |
| 12533 | 12534 | case BMC_HIK8IN1: |
| 12534 | | state->m_mmc_reg[0] = state->m_mmc_reg[1] = state->m_mmc_reg[2] = state->m_mmc_reg[3] = 0; |
| 12535 | | mmc3_common_initialize(machine, 0x3f, 0xff, 0); |
| 12535 | m_mmc_reg[0] = m_mmc_reg[1] = m_mmc_reg[2] = m_mmc_reg[3] = 0; |
| 12536 | mmc3_common_initialize(machine(), 0x3f, 0xff, 0); |
| 12536 | 12537 | break; |
| 12537 | 12538 | |
| 12538 | 12539 | // mapper 50 |
| 12539 | 12540 | case BTL_SMB2B: |
| 12540 | | prg8_67(machine, 0x0f); |
| 12541 | | prg8_89(machine, 0x08); |
| 12542 | | prg8_ab(machine, 0x09); |
| 12543 | | prg8_cd(machine, 0); |
| 12544 | | prg8_ef(machine, 0x0b); |
| 12541 | prg8_67(machine(), 0x0f); |
| 12542 | prg8_89(machine(), 0x08); |
| 12543 | prg8_ab(machine(), 0x09); |
| 12544 | prg8_cd(machine(), 0); |
| 12545 | prg8_ef(machine(), 0x0b); |
| 12545 | 12546 | break; |
| 12546 | 12547 | // mapper 51 |
| 12547 | 12548 | case BMC_BALLGAMES_11IN1: |
| 12548 | | state->m_mmc_reg[0] = 0x01; |
| 12549 | | state->m_mmc_reg[1] = 0x00; |
| 12550 | | bmc_ball11_set_banks(machine); |
| 12549 | m_mmc_reg[0] = 0x01; |
| 12550 | m_mmc_reg[1] = 0x00; |
| 12551 | bmc_ball11_set_banks(machine()); |
| 12551 | 12552 | break; |
| 12552 | 12553 | // mapper 52 |
| 12553 | 12554 | case BMC_MARIOPARTY_7IN1: |
| 12554 | 12555 | case BMC_GOLD_7IN1: |
| 12555 | | state->m_map52_reg_written = 0; |
| 12556 | | mmc3_common_initialize(machine, 0x1f, 0xff, 0); |
| 12556 | m_map52_reg_written = 0; |
| 12557 | mmc3_common_initialize(machine(), 0x1f, 0xff, 0); |
| 12557 | 12558 | break; |
| 12558 | 12559 | // mapper 54 |
| 12559 | 12560 | case BMC_NOVELDIAMOND: |
| 12560 | | set_nt_mirroring(machine, PPU_MIRROR_VERT); |
| 12561 | set_nt_mirroring(machine(), PPU_MIRROR_VERT); |
| 12561 | 12562 | break; |
| 12562 | 12563 | // mapper 57 |
| 12563 | 12564 | case BMC_GKA: |
| 12564 | | prg16_89ab(machine, 0); |
| 12565 | | prg16_cdef(machine, 0); |
| 12565 | prg16_89ab(machine(), 0); |
| 12566 | prg16_cdef(machine(), 0); |
| 12566 | 12567 | break; |
| 12567 | 12568 | |
| 12568 | 12569 | // mapper 64 |
| 12569 | 12570 | case TENGEN_800032: |
| 12570 | 12571 | // mapper 158 |
| 12571 | 12572 | case TENGEN_800037: |
| 12572 | | prg16_89ab(machine, state->m_prg_chunks - 1); |
| 12573 | | prg16_cdef(machine, state->m_prg_chunks - 1); |
| 12573 | prg16_89ab(machine(), m_prg_chunks - 1); |
| 12574 | prg16_cdef(machine(), m_prg_chunks - 1); |
| 12574 | 12575 | break; |
| 12575 | 12576 | // mapper 71 |
| 12576 | 12577 | case CAMERICA_BF9097: |
| 12577 | | set_nt_mirroring(machine, PPU_MIRROR_HORZ); |
| 12578 | set_nt_mirroring(machine(), PPU_MIRROR_HORZ); |
| 12578 | 12579 | case CAMERICA_BF9093: |
| 12579 | | prg32(machine, 0xff); |
| 12580 | prg32(machine(), 0xff); |
| 12580 | 12581 | break; |
| 12581 | 12582 | |
| 12582 | 12583 | // mapper 79 (& 146) |
| 12583 | 12584 | case AVE_NINA06: |
| 12584 | | set_nt_mirroring(machine, PPU_MIRROR_HORZ); |
| 12585 | set_nt_mirroring(machine(), PPU_MIRROR_HORZ); |
| 12585 | 12586 | break; |
| 12586 | 12587 | |
| 12587 | 12588 | // mapper 83 |
| 12588 | 12589 | case CONY_BOARD: |
| 12589 | 12590 | case YOKO_BOARD: |
| 12590 | | state->m_mapper83_reg[9] = 0x0f; |
| 12591 | | prg8_cd(machine, 0x1e); |
| 12592 | | prg8_ef(machine, 0x1f); |
| 12591 | m_mapper83_reg[9] = 0x0f; |
| 12592 | prg8_cd(machine(), 0x1e); |
| 12593 | prg8_ef(machine(), 0x1f); |
| 12593 | 12594 | break; |
| 12594 | 12595 | |
| 12595 | 12596 | // mapper 91 |
| 12596 | 12597 | case UNL_MK2: |
| 12597 | | set_nt_mirroring(machine, PPU_MIRROR_VERT); |
| 12598 | | prg16_89ab(machine, state->m_prg_chunks - 1); |
| 12599 | | prg16_cdef(machine, state->m_prg_chunks - 1); |
| 12598 | set_nt_mirroring(machine(), PPU_MIRROR_VERT); |
| 12599 | prg16_89ab(machine(), m_prg_chunks - 1); |
| 12600 | prg16_cdef(machine(), m_prg_chunks - 1); |
| 12600 | 12601 | break; |
| 12601 | 12602 | |
| 12602 | 12603 | // mapper 104 |
| 12603 | 12604 | case CAMERICA_GOLDENFIVE: |
| 12604 | | prg16_89ab(machine, 0x00); |
| 12605 | | prg16_cdef(machine, 0x0f); |
| 12605 | prg16_89ab(machine(), 0x00); |
| 12606 | prg16_cdef(machine(), 0x0f); |
| 12606 | 12607 | break; |
| 12607 | 12608 | // mapper 106 |
| 12608 | 12609 | case BTL_SMB3: |
| 12609 | | prg8_89(machine, (state->m_prg_chunks << 1) - 1); |
| 12610 | | prg8_ab(machine, 0); |
| 12611 | | prg8_cd(machine, 0); |
| 12612 | | prg8_ef(machine, (state->m_prg_chunks << 1) - 1); |
| 12610 | prg8_89(machine(), (m_prg_chunks << 1) - 1); |
| 12611 | prg8_ab(machine(), 0); |
| 12612 | prg8_cd(machine(), 0); |
| 12613 | prg8_ef(machine(), (m_prg_chunks << 1) - 1); |
| 12613 | 12614 | break; |
| 12614 | 12615 | |
| 12615 | 12616 | // mapper 108 |
| 12616 | 12617 | case WHIRLWIND_2706: |
| 12617 | | prg32(machine, 0xff); |
| 12618 | prg32(machine(), 0xff); |
| 12618 | 12619 | break; |
| 12619 | 12620 | |
| 12620 | 12621 | // mapper 114 |
| 12621 | 12622 | case SUPERGAME_LIONKING: |
| 12622 | | state->m_map114_reg = state->m_map114_reg_enabled = 0; |
| 12623 | | mmc3_common_initialize(machine, 0xff, 0xff, 0); |
| 12623 | m_map114_reg = m_map114_reg_enabled = 0; |
| 12624 | mmc3_common_initialize(machine(), 0xff, 0xff, 0); |
| 12624 | 12625 | break; |
| 12625 | 12626 | // mapper 115 |
| 12626 | 12627 | case KASING_BOARD: |
| 12627 | | state->m_mmc_reg[0] = 0; |
| 12628 | | mmc3_common_initialize(machine, 0xff, 0xff, 0); |
| 12628 | m_mmc_reg[0] = 0; |
| 12629 | mmc3_common_initialize(machine(), 0xff, 0xff, 0); |
| 12629 | 12630 | break; |
| 12630 | 12631 | // mapper 116 |
| 12631 | 12632 | case SOMERI_SL12: |
| 12632 | | state->m_mmc_prg_base = state->m_mmc_chr_base = 0; |
| 12633 | | state->m_mmc_prg_mask = 0xff; |
| 12634 | | state->m_mmc_chr_mask = 0xff; |
| 12635 | | state->m_mmc_cmd1 = 2; // mode |
| 12636 | | state->m_mmc3_latch = 0; |
| 12637 | | state->m_mmc3_wram_protect = 0; |
| 12633 | m_mmc_prg_base = m_mmc_chr_base = 0; |
| 12634 | m_mmc_prg_mask = 0xff; |
| 12635 | m_mmc_chr_mask = 0xff; |
| 12636 | m_mmc_cmd1 = 2; // mode |
| 12637 | m_mmc3_latch = 0; |
| 12638 | m_mmc3_wram_protect = 0; |
| 12638 | 12639 | // MMC1 regs |
| 12639 | | state->m_mmc1_count = 0; |
| 12640 | | state->m_mmc_reg[0] = 0x0c; |
| 12641 | | state->m_mmc_reg[1] = 0x00; |
| 12642 | | state->m_mmc_reg[2] = 0x00; |
| 12643 | | state->m_mmc_reg[3] = 0x00; |
| 12640 | m_mmc1_count = 0; |
| 12641 | m_mmc_reg[0] = 0x0c; |
| 12642 | m_mmc_reg[1] = 0x00; |
| 12643 | m_mmc_reg[2] = 0x00; |
| 12644 | m_mmc_reg[3] = 0x00; |
| 12644 | 12645 | // MMC3 regs |
| 12645 | | state->m_mmc_prg_bank[0] = 0x3c; |
| 12646 | | state->m_mmc_prg_bank[1] = 0x3d; |
| 12647 | | state->m_mmc_prg_bank[2] = 0xfe; |
| 12648 | | state->m_mmc_prg_bank[3] = 0xff; |
| 12649 | | state->m_mmc_vrom_bank[0] = 0x00; |
| 12650 | | state->m_mmc_vrom_bank[1] = 0x01; |
| 12651 | | state->m_mmc_vrom_bank[2] = 0x04; |
| 12652 | | state->m_mmc_vrom_bank[3] = 0x05; |
| 12653 | | state->m_mmc_vrom_bank[4] = 0x06; |
| 12654 | | state->m_mmc_vrom_bank[5] = 0x07; |
| 12646 | m_mmc_prg_bank[0] = 0x3c; |
| 12647 | m_mmc_prg_bank[1] = 0x3d; |
| 12648 | m_mmc_prg_bank[2] = 0xfe; |
| 12649 | m_mmc_prg_bank[3] = 0xff; |
| 12650 | m_mmc_vrom_bank[0] = 0x00; |
| 12651 | m_mmc_vrom_bank[1] = 0x01; |
| 12652 | m_mmc_vrom_bank[2] = 0x04; |
| 12653 | m_mmc_vrom_bank[3] = 0x05; |
| 12654 | m_mmc_vrom_bank[4] = 0x06; |
| 12655 | m_mmc_vrom_bank[5] = 0x07; |
| 12655 | 12656 | // VRC2 regs |
| 12656 | | state->m_mmc_prg_bank[4] = 0x00; |
| 12657 | | state->m_mmc_prg_bank[5] = 0x01; |
| 12657 | m_mmc_prg_bank[4] = 0x00; |
| 12658 | m_mmc_prg_bank[5] = 0x01; |
| 12658 | 12659 | for (i = 0; i < 8; ++i) |
| 12659 | | state->m_mmc_vrom_bank[6 + i] = i; |
| 12660 | | someri_mode_update(machine); |
| 12660 | m_mmc_vrom_bank[6 + i] = i; |
| 12661 | someri_mode_update(machine()); |
| 12661 | 12662 | break; |
| 12662 | 12663 | |
| 12663 | 12664 | // mapper 120 |
| 12664 | 12665 | case BTL_TOBIDASE: |
| 12665 | | prg32(machine, 2); |
| 12666 | prg32(machine(), 2); |
| 12666 | 12667 | break; |
| 12667 | 12668 | |
| 12668 | 12669 | // mapper 121 |
| 12669 | 12670 | case KAY_PANDAPRINCE: |
| 12670 | | state->m_mmc_reg[5] = state->m_mmc_reg[6] = state->m_mmc_reg[7] = 0; |
| 12671 | | mmc3_common_initialize(machine, 0xff, 0xff, 0); |
| 12671 | m_mmc_reg[5] = m_mmc_reg[6] = m_mmc_reg[7] = 0; |
| 12672 | mmc3_common_initialize(machine(), 0xff, 0xff, 0); |
| 12672 | 12673 | break; |
| 12673 | 12674 | |
| 12674 | 12675 | // mapper 126 |
| 12675 | 12676 | case BMC_PJOY84: |
| 12676 | | mmc3_common_initialize(machine, 0xff, 0xff, 0); |
| 12677 | | state->m_mmc_reg[0] = state->m_mmc_reg[1] = state->m_mmc_reg[2] = state->m_mmc_reg[3] = 0; |
| 12678 | | pjoy84_set_base_mask(machine); |
| 12679 | | mmc3_set_chr(machine, state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); |
| 12680 | | mmc3_set_prg(machine, state->m_mmc_prg_base, state->m_mmc_prg_mask); |
| 12677 | mmc3_common_initialize(machine(), 0xff, 0xff, 0); |
| 12678 | m_mmc_reg[0] = m_mmc_reg[1] = m_mmc_reg[2] = m_mmc_reg[3] = 0; |
| 12679 | pjoy84_set_base_mask(machine()); |
| 12680 | mmc3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); |
| 12681 | mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); |
| 12681 | 12682 | break; |
| 12682 | 12683 | |
| 12683 | 12684 | // mapper 132 |
| r18064 | r18065 | |
| 12686 | 12687 | case TXC_22211B: |
| 12687 | 12688 | // mapper 173 |
| 12688 | 12689 | case TXC_22211C: |
| 12689 | | state->m_txc_reg[0] = state->m_txc_reg[1] = state->m_txc_reg[2] = state->m_txc_reg[3] = 0; |
| 12690 | m_txc_reg[0] = m_txc_reg[1] = m_txc_reg[2] = m_txc_reg[3] = 0; |
| 12690 | 12691 | break; |
| 12691 | 12692 | |
| 12692 | 12693 | // mapper 134 |
| 12693 | 12694 | case BMC_FAMILY_4646B: |
| 12694 | | mmc3_common_initialize(machine, 0x1f, 0xff, 0); |
| 12695 | mmc3_common_initialize(machine(), 0x1f, 0xff, 0); |
| 12695 | 12696 | break; |
| 12696 | 12697 | |
| 12697 | 12698 | // mapper 137 |
| 12698 | 12699 | case SACHEN_8259D: |
| 12699 | | chr8(machine, state->m_chr_chunks - 1, CHRROM); |
| 12700 | | set_nt_mirroring(machine, PPU_MIRROR_VERT); |
| 12700 | chr8(machine(), m_chr_chunks - 1, CHRROM); |
| 12701 | set_nt_mirroring(machine(), PPU_MIRROR_VERT); |
| 12701 | 12702 | break; |
| 12702 | 12703 | // mapper 138 |
| 12703 | 12704 | case SACHEN_8259B: |
| r18064 | r18065 | |
| 12707 | 12708 | case SACHEN_8259A: |
| 12708 | 12709 | // mapper 150 |
| 12709 | 12710 | case SACHEN_74LS374: |
| 12710 | | set_nt_mirroring(machine, PPU_MIRROR_VERT); |
| 12711 | set_nt_mirroring(machine(), PPU_MIRROR_VERT); |
| 12711 | 12712 | break; |
| 12712 | 12713 | // mapper 143 |
| 12713 | 12714 | case SACHEN_TCA01: |
| 12714 | | prg16_89ab(machine, 0); |
| 12715 | | prg16_cdef(machine, 1); |
| 12715 | prg16_89ab(machine(), 0); |
| 12716 | prg16_cdef(machine(), 1); |
| 12716 | 12717 | break; |
| 12717 | 12718 | |
| 12718 | 12719 | // mapper 156 |
| 12719 | 12720 | case OPENCORP_DAOU306: |
| 12720 | | prg16_89ab(machine, state->m_prg_chunks - 2); |
| 12721 | | prg16_cdef(machine, state->m_prg_chunks - 1); |
| 12722 | | set_nt_mirroring(machine, PPU_MIRROR_LOW); |
| 12721 | prg16_89ab(machine(), m_prg_chunks - 2); |
| 12722 | prg16_cdef(machine(), m_prg_chunks - 1); |
| 12723 | set_nt_mirroring(machine(), PPU_MIRROR_LOW); |
| 12723 | 12724 | break; |
| 12724 | 12725 | // mapper 163 |
| 12725 | 12726 | case NANJING_BOARD: |
| 12726 | | state->m_mmc_count = 0xff; |
| 12727 | | state->m_mmc_reg[0] = 0xff; |
| 12728 | | state->m_mmc_reg[1] = 0; |
| 12729 | | prg16_89ab(machine, state->m_prg_chunks - 2); |
| 12730 | | prg16_cdef(machine, state->m_prg_chunks - 1); |
| 12727 | m_mmc_count = 0xff; |
| 12728 | m_mmc_reg[0] = 0xff; |
| 12729 | m_mmc_reg[1] = 0; |
| 12730 | prg16_89ab(machine(), m_prg_chunks - 2); |
| 12731 | prg16_cdef(machine(), m_prg_chunks - 1); |
| 12731 | 12732 | break; |
| 12732 | 12733 | // mapper 164 |
| 12733 | 12734 | case WAIXING_FFV: |
| 12734 | | prg16_89ab(machine, 0); |
| 12735 | | prg16_cdef(machine, 0x1f); |
| 12735 | prg16_89ab(machine(), 0); |
| 12736 | prg16_cdef(machine(), 0x1f); |
| 12736 | 12737 | break; |
| 12737 | 12738 | // mapper 166 |
| 12738 | 12739 | case SUBOR_TYPE1: |
| 12739 | | state->m_subor_reg[0] = state->m_subor_reg[1] = state->m_subor_reg[2] = state->m_subor_reg[3] = 0; |
| 12740 | | prg16_89ab(machine, 0); |
| 12741 | | prg16_cdef(machine, 0x07); |
| 12740 | m_subor_reg[0] = m_subor_reg[1] = m_subor_reg[2] = m_subor_reg[3] = 0; |
| 12741 | prg16_89ab(machine(), 0); |
| 12742 | prg16_cdef(machine(), 0x07); |
| 12742 | 12743 | break; |
| 12743 | 12744 | // mapper 167 |
| 12744 | 12745 | case SUBOR_TYPE0: |
| 12745 | | state->m_subor_reg[0] = state->m_subor_reg[1] = state->m_subor_reg[2] = state->m_subor_reg[3] = 0; |
| 12746 | | prg16_89ab(machine, 0); |
| 12747 | | prg16_cdef(machine, 0x20); |
| 12746 | m_subor_reg[0] = m_subor_reg[1] = m_subor_reg[2] = m_subor_reg[3] = 0; |
| 12747 | prg16_89ab(machine(), 0); |
| 12748 | prg16_cdef(machine(), 0x20); |
| 12748 | 12749 | break; |
| 12749 | 12750 | |
| 12750 | 12751 | // mapper 176 |
| 12751 | 12752 | case UNL_XZY: |
| 12752 | 12753 | // mapper 182 |
| 12753 | 12754 | case HOSENKAN_BOARD: |
| 12754 | | prg32(machine, (state->m_prg_chunks - 1) >> 1); |
| 12755 | prg32(machine(), (m_prg_chunks - 1) >> 1); |
| 12755 | 12756 | break; |
| 12756 | 12757 | |
| 12757 | 12758 | case FUKUTAKE_BOARD: // mapper 186 |
| 12758 | | prg16_89ab(machine, 0); |
| 12759 | | prg16_cdef(machine, 0); |
| 12759 | prg16_89ab(machine(), 0); |
| 12760 | prg16_cdef(machine(), 0); |
| 12760 | 12761 | break; |
| 12761 | 12762 | |
| 12762 | 12763 | // mapper 187 |
| 12763 | 12764 | case UNL_KOF96: |
| 12764 | | state->m_mmc_reg[0] = state->m_mmc_reg[1] = state->m_mmc_reg[2] = state->m_mmc_reg[3] = 0; |
| 12765 | | mmc3_common_initialize(machine, 0xff, 0xff, 0); |
| 12765 | m_mmc_reg[0] = m_mmc_reg[1] = m_mmc_reg[2] = m_mmc_reg[3] = 0; |
| 12766 | mmc3_common_initialize(machine(), 0xff, 0xff, 0); |
| 12766 | 12767 | break; |
| 12767 | 12768 | // mapper 189 |
| 12768 | 12769 | case TXC_TW: |
| 12769 | | state->m_mmc_latch1 = 0; |
| 12770 | | state->m_mmc_latch2 = 0x80; |
| 12771 | | state->m_mmc_chr_base = 0; |
| 12772 | | state->m_mmc_chr_mask = 0xff; |
| 12773 | | mmc3_set_chr(machine, state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); |
| 12770 | m_mmc_latch1 = 0; |
| 12771 | m_mmc_latch2 = 0x80; |
| 12772 | m_mmc_chr_base = 0; |
| 12773 | m_mmc_chr_mask = 0xff; |
| 12774 | mmc3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); |
| 12774 | 12775 | break; |
| 12775 | 12776 | // mapper 193 |
| 12776 | 12777 | case NTDEC_FIGHTINGHERO: |
| 12777 | | prg32(machine, (state->m_prg_chunks - 1) >> 1); |
| 12778 | | set_nt_mirroring(machine, PPU_MIRROR_VERT); |
| 12778 | prg32(machine(), (m_prg_chunks - 1) >> 1); |
| 12779 | set_nt_mirroring(machine(), PPU_MIRROR_VERT); |
| 12779 | 12780 | break; |
| 12780 | 12781 | // mapper 197 |
| 12781 | 12782 | case UNL_SUPERFIGHTER3: |
| 12782 | | mmc3_common_initialize(machine, 0xff, 0xff, 0); |
| 12783 | | unl_sf3_set_chr(machine, state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); |
| 12783 | mmc3_common_initialize(machine(), 0xff, 0xff, 0); |
| 12784 | unl_sf3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); |
| 12784 | 12785 | break; |
| 12785 | 12786 | // mapper 198 |
| 12786 | 12787 | case WAIXING_TYPE_F: |
| 12787 | | mmc3_common_initialize(machine, 0xff, 0xff, 0); |
| 12788 | | state->m_mmc_prg_bank[0] = 0x00; |
| 12789 | | state->m_mmc_prg_bank[1] = 0x01; |
| 12790 | | state->m_mmc_prg_bank[2] = 0x4e; |
| 12791 | | state->m_mmc_prg_bank[3] = 0x4f; |
| 12792 | | mmc3_set_prg(machine, state->m_mmc_prg_base, state->m_mmc_prg_mask); |
| 12788 | mmc3_common_initialize(machine(), 0xff, 0xff, 0); |
| 12789 | m_mmc_prg_bank[0] = 0x00; |
| 12790 | m_mmc_prg_bank[1] = 0x01; |
| 12791 | m_mmc_prg_bank[2] = 0x4e; |
| 12792 | m_mmc_prg_bank[3] = 0x4f; |
| 12793 | mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); |
| 12793 | 12794 | break; |
| 12794 | 12795 | // mapper 199 |
| 12795 | 12796 | case WAIXING_TYPE_G: |
| 12796 | | mmc3_common_initialize(machine, 0xff, 0xff, 0); |
| 12797 | | state->m_mmc_prg_bank[0] = 0x00; |
| 12798 | | state->m_mmc_prg_bank[1] = 0x01; |
| 12799 | | state->m_mmc_prg_bank[2] = 0x3e; |
| 12800 | | state->m_mmc_prg_bank[3] = 0x3f; |
| 12801 | | mmc3_set_prg(machine, state->m_mmc_prg_base, state->m_mmc_prg_mask); |
| 12802 | | state->m_mmc_vrom_bank[0] = 0x00; |
| 12803 | | state->m_mmc_vrom_bank[1] = 0x02; |
| 12804 | | state->m_mmc_vrom_bank[2] = 0x04; |
| 12805 | | state->m_mmc_vrom_bank[3] = 0x05; |
| 12806 | | state->m_mmc_vrom_bank[4] = 0x06; |
| 12807 | | state->m_mmc_vrom_bank[5] = 0x07; |
| 12808 | | state->m_mmc_vrom_bank[6] = 0x01; |
| 12809 | | state->m_mmc_vrom_bank[7] = 0x03; |
| 12810 | | waixing_g_set_chr(machine, state->m_mmc_chr_base, state->m_mmc_chr_mask); |
| 12797 | mmc3_common_initialize(machine(), 0xff, 0xff, 0); |
| 12798 | m_mmc_prg_bank[0] = 0x00; |
| 12799 | m_mmc_prg_bank[1] = 0x01; |
| 12800 | m_mmc_prg_bank[2] = 0x3e; |
| 12801 | m_mmc_prg_bank[3] = 0x3f; |
| 12802 | mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); |
| 12803 | m_mmc_vrom_bank[0] = 0x00; |
| 12804 | m_mmc_vrom_bank[1] = 0x02; |
| 12805 | m_mmc_vrom_bank[2] = 0x04; |
| 12806 | m_mmc_vrom_bank[3] = 0x05; |
| 12807 | m_mmc_vrom_bank[4] = 0x06; |
| 12808 | m_mmc_vrom_bank[5] = 0x07; |
| 12809 | m_mmc_vrom_bank[6] = 0x01; |
| 12810 | m_mmc_vrom_bank[7] = 0x03; |
| 12811 | waixing_g_set_chr(machine(), m_mmc_chr_base, m_mmc_chr_mask); |
| 12811 | 12812 | break; |
| 12812 | 12813 | |
| 12813 | 12814 | // mapper 200 |
| 12814 | 12815 | case BMC_36IN1: |
| 12815 | | prg16_89ab(machine, state->m_prg_chunks - 1); |
| 12816 | | prg16_cdef(machine, state->m_prg_chunks - 1); |
| 12816 | prg16_89ab(machine(), m_prg_chunks - 1); |
| 12817 | prg16_cdef(machine(), m_prg_chunks - 1); |
| 12817 | 12818 | break; |
| 12818 | 12819 | |
| 12819 | 12820 | // mapper 202 |
| r18064 | r18065 | |
| 12824 | 12825 | case BMC_64IN1: |
| 12825 | 12826 | // mapper 214 |
| 12826 | 12827 | case BMC_SUPERGUN_20IN1: |
| 12827 | | prg16_89ab(machine, 0); |
| 12828 | | prg16_cdef(machine, 0); |
| 12828 | prg16_89ab(machine(), 0); |
| 12829 | prg16_cdef(machine(), 0); |
| 12829 | 12830 | break; |
| 12830 | 12831 | // mapper 205 |
| 12831 | 12832 | case BMC_15IN1: |
| 12832 | | mmc3_common_initialize(machine, 0x1f, 0xff, 0); |
| 12833 | | state->m_mmc_prg_base = 0x10; // this board has a diff prg_base |
| 12834 | | mmc3_set_prg(machine, state->m_mmc_prg_base, state->m_mmc_prg_mask); |
| 12833 | mmc3_common_initialize(machine(), 0x1f, 0xff, 0); |
| 12834 | m_mmc_prg_base = 0x10; // this board has a diff prg_base |
| 12835 | mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); |
| 12835 | 12836 | break; |
| 12836 | 12837 | |
| 12837 | 12838 | // mapper 208 |
| 12838 | 12839 | case GOUDER_37017: |
| 12839 | | state->m_mmc_reg[0] = state->m_mmc_reg[1] = state->m_mmc_reg[2] = state->m_mmc_reg[3] = state->m_mmc_reg[4] = 0; |
| 12840 | | mmc3_common_initialize(machine, 0xff, 0xff, 0); |
| 12840 | m_mmc_reg[0] = m_mmc_reg[1] = m_mmc_reg[2] = m_mmc_reg[3] = m_mmc_reg[4] = 0; |
| 12841 | mmc3_common_initialize(machine(), 0xff, 0xff, 0); |
| 12841 | 12842 | break; |
| 12842 | 12843 | // mapper 212 |
| 12843 | 12844 | case BMC_SUPERHIK_300IN1: |
| 12844 | | chr8(machine, 0xff, CHRROM); |
| 12845 | | prg32(machine, 0xff); |
| 12845 | chr8(machine(), 0xff, CHRROM); |
| 12846 | prg32(machine(), 0xff); |
| 12846 | 12847 | break; |
| 12847 | 12848 | |
| 12848 | 12849 | // mapper 215 |
| 12849 | 12850 | case SUPERGAME_BOOGERMAN: |
| 12850 | | state->m_mmc_reg[0] = 0x00; |
| 12851 | | state->m_mmc_reg[1] = 0xff; |
| 12852 | | state->m_mmc_reg[2] = 0x04; |
| 12853 | | state->m_mmc_reg[3] = 0; |
| 12854 | | mmc3_common_initialize(machine, 0x1f, 0xff, 0); |
| 12855 | | sgame_boog_set_prg(machine); |
| 12856 | | mmc3_set_chr(machine, state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask); |
| 12851 | m_mmc_reg[0] = 0x00; |
| 12852 | m_mmc_reg[1] = 0xff; |
| 12853 | m_mmc_reg[2] = 0x04; |
| 12854 | m_mmc_reg[3] = 0; |
| 12855 | mmc3_common_initialize(machine(), 0x1f, 0xff, 0); |
| 12856 | sgame_boog_set_prg(machine()); |
| 12857 | mmc3_set_chr(machine(), m_mmc_chr_source, m_mmc_chr_base, m_mmc_chr_mask); |
| 12857 | 12858 | break; |
| 12858 | 12859 | |
| 12859 | 12860 | // mapper 217 |
| 12860 | 12861 | case BMC_GOLDENCARD_6IN1: |
| 12861 | | mmc3_common_initialize(machine, 0xff, 0xff, 0); |
| 12862 | | state->m_mmc_reg[0] = 0x00; |
| 12863 | | state->m_mmc_reg[1] = 0xff; |
| 12864 | | state->m_mmc_reg[2] = 0x03; |
| 12865 | | state->m_mmc_reg[3] = 0; |
| 12866 | | bmc_gc6in1_set_prg(machine, state->m_mmc_prg_base, state->m_mmc_prg_mask); |
| 12867 | | bmc_gc6in1_set_chr(machine, state->m_mmc_chr_source); |
| 12862 | mmc3_common_initialize(machine(), 0xff, 0xff, 0); |
| 12863 | m_mmc_reg[0] = 0x00; |
| 12864 | m_mmc_reg[1] = 0xff; |
| 12865 | m_mmc_reg[2] = 0x03; |
| 12866 | m_mmc_reg[3] = 0; |
| 12867 | bmc_gc6in1_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); |
| 12868 | bmc_gc6in1_set_chr(machine(), m_mmc_chr_source); |
| 12868 | 12869 | break; |
| 12869 | 12870 | // mapper 221 |
| 12870 | 12871 | case UNL_N625092: |
| 12871 | | prg16_89ab(machine, 0); |
| 12872 | | prg16_cdef(machine, 0); |
| 12872 | prg16_89ab(machine(), 0); |
| 12873 | prg16_cdef(machine(), 0); |
| 12873 | 12874 | break; |
| 12874 | 12875 | |
| 12875 | 12876 | // mapper 223? |
| 12876 | 12877 | case WAIXING_TYPE_I: |
| 12877 | | mmc3_common_initialize(machine, 0xff, 0xff, 0); |
| 12878 | | state->m_mmc3_wram_protect = 0; |
| 12878 | mmc3_common_initialize(machine(), 0xff, 0xff, 0); |
| 12879 | m_mmc3_wram_protect = 0; |
| 12879 | 12880 | break; |
| 12880 | 12881 | |
| 12881 | 12882 | // mapper 224? |
| 12882 | 12883 | case WAIXING_TYPE_J: |
| 12883 | | mmc3_common_initialize(machine, 0xff, 0xff, 0); |
| 12884 | | state->m_mmc_prg_bank[0] = 0x01; |
| 12885 | | state->m_mmc_prg_bank[1] = 0x02; |
| 12886 | | state->m_mmc_prg_bank[2] = 0x7e; |
| 12887 | | state->m_mmc_prg_bank[3] = 0x7f; |
| 12888 | | mmc3_set_prg(machine, state->m_mmc_prg_base, state->m_mmc_prg_mask); |
| 12884 | mmc3_common_initialize(machine(), 0xff, 0xff, 0); |
| 12885 | m_mmc_prg_bank[0] = 0x01; |
| 12886 | m_mmc_prg_bank[1] = 0x02; |
| 12887 | m_mmc_prg_bank[2] = 0x7e; |
| 12888 | m_mmc_prg_bank[3] = 0x7f; |
| 12889 | mmc3_set_prg(machine(), m_mmc_prg_base, m_mmc_prg_mask); |
| 12889 | 12890 | break; |
| 12890 | 12891 | |
| 12891 | 12892 | // mapper 227 |
| 12892 | 12893 | case BMC_1200IN1: |
| 12893 | | prg16_89ab(machine, 0); |
| 12894 | | prg16_cdef(machine, 0); |
| 12894 | prg16_89ab(machine(), 0); |
| 12895 | prg16_cdef(machine(), 0); |
| 12895 | 12896 | break; |
| 12896 | 12897 | |
| 12897 | 12898 | // mapper 229 |
| 12898 | 12899 | case BMC_31IN1: |
| 12899 | | prg16_89ab(machine, 0); |
| 12900 | | prg16_cdef(machine, 1); |
| 12901 | | set_nt_mirroring(machine, PPU_MIRROR_VERT); |
| 12900 | prg16_89ab(machine(), 0); |
| 12901 | prg16_cdef(machine(), 1); |
| 12902 | set_nt_mirroring(machine(), PPU_MIRROR_VERT); |
| 12902 | 12903 | break; |
| 12903 | 12904 | // mapper 230 |
| 12904 | 12905 | case BMC_22GAMES: |
| 12905 | | prg16_89ab(machine, 0); |
| 12906 | | prg16_cdef(machine, 7); |
| 12906 | prg16_89ab(machine(), 0); |
| 12907 | prg16_cdef(machine(), 7); |
| 12907 | 12908 | break; |
| 12908 | 12909 | // mapper 231 |
| 12909 | 12910 | case BMC_20IN1: |
| 12910 | | prg16_89ab(machine, 0); |
| 12911 | | prg16_cdef(machine, state->m_prg_chunks - 1); |
| 12912 | | set_nt_mirroring(machine, PPU_MIRROR_VERT); |
| 12911 | prg16_89ab(machine(), 0); |
| 12912 | prg16_cdef(machine(), m_prg_chunks - 1); |
| 12913 | set_nt_mirroring(machine(), PPU_MIRROR_VERT); |
| 12913 | 12914 | break; |
| 12914 | 12915 | // mapper 232 |
| 12915 | 12916 | case CAMERICA_BF9096: |
| 12916 | | state->m_mmc_latch1 = 0x18; |
| 12917 | | state->m_mmc_latch2 = 0x00; |
| 12918 | | bf9096_set_prg(machine); |
| 12917 | m_mmc_latch1 = 0x18; |
| 12918 | m_mmc_latch2 = 0x00; |
| 12919 | bf9096_set_prg(machine()); |
| 12919 | 12920 | break; |
| 12920 | 12921 | |
| 12921 | 12922 | // mapper 243 |
| 12922 | 12923 | case SACHEN_74LS374_A: |
| 12923 | | state->m_mmc_vrom_bank[0] = 3; |
| 12924 | | chr8(machine, 3, CHRROM); |
| 12925 | | set_nt_mirroring(machine, PPU_MIRROR_VERT); |
| 12924 | m_mmc_vrom_bank[0] = 3; |
| 12925 | chr8(machine(), 3, CHRROM); |
| 12926 | set_nt_mirroring(machine(), PPU_MIRROR_VERT); |
| 12926 | 12927 | break; |
| 12927 | 12928 | |
| 12928 | 12929 | // mapper 246 |
| 12929 | 12930 | case CNE_FSB: |
| 12930 | | prg32(machine, 0xff); |
| 12931 | prg32(machine(), 0xff); |
| 12931 | 12932 | break; |
| 12932 | 12933 | // mapper 249 |
| 12933 | 12934 | case WAIXING_SECURITY: |
| 12934 | | state->m_mmc_reg[0] = 0; |
| 12935 | | mmc3_common_initialize(machine, 0xff, 0xff, 0); |
| 12935 | m_mmc_reg[0] = 0; |
| 12936 | mmc3_common_initialize(machine(), 0xff, 0xff, 0); |
| 12936 | 12937 | break; |
| 12937 | 12938 | |
| 12938 | 12939 | // mapper 254 |
| 12939 | 12940 | case BTL_PIKACHUY2K: |
| 12940 | | state->m_mmc_reg[0] = 0xff; |
| 12941 | | mmc3_common_initialize(machine, 0xff, 0xff, 0); |
| 12941 | m_mmc_reg[0] = 0xff; |
| 12942 | mmc3_common_initialize(machine(), 0xff, 0xff, 0); |
| 12942 | 12943 | break; |
| 12943 | 12944 | |
| 12944 | 12945 | // mapper 255 |
| 12945 | 12946 | case BMC_110IN1: |
| 12946 | | prg16_89ab(machine, 0); |
| 12947 | | prg16_cdef(machine, 1); |
| 12948 | | set_nt_mirroring(machine, PPU_MIRROR_VERT); |
| 12947 | prg16_89ab(machine(), 0); |
| 12948 | prg16_cdef(machine(), 1); |
| 12949 | set_nt_mirroring(machine(), PPU_MIRROR_VERT); |
| 12949 | 12950 | break; |
| 12950 | 12951 | |
| 12951 | 12952 | // UNIF only |
| 12952 | 12953 | case BMC_64IN1NR: |
| 12953 | | state->m_mmc_reg[0] = 0x80; |
| 12954 | | state->m_mmc_reg[1] = 0x43; |
| 12955 | | state->m_mmc_reg[2] = state->m_mmc_reg[3] = 0; |
| 12956 | | bmc_64in1nr_set_prg(machine); |
| 12957 | | set_nt_mirroring(machine, PPU_MIRROR_VERT); |
| 12954 | m_mmc_reg[0] = 0x80; |
| 12955 | m_mmc_reg[1] = 0x43; |
| 12956 | m_mmc_reg[2] = m_mmc_reg[3] = 0; |
| 12957 | bmc_64in1nr_set_prg(machine()); |
| 12958 | set_nt_mirroring(machine(), PPU_MIRROR_VERT); |
| 12958 | 12959 | break; |
| 12959 | 12960 | case BMC_190IN1: |
| 12960 | | prg16_89ab(machine, 0); |
| 12961 | | prg16_cdef(machine, 0); |
| 12961 | prg16_89ab(machine(), 0); |
| 12962 | prg16_cdef(machine(), 0); |
| 12962 | 12963 | break; |
| 12963 | 12964 | case BMC_A65AS: |
| 12964 | | prg16_89ab(machine, 0); |
| 12965 | | prg16_cdef(machine, 7); |
| 12966 | | set_nt_mirroring(machine, PPU_MIRROR_VERT); |
| 12965 | prg16_89ab(machine(), 0); |
| 12966 | prg16_cdef(machine(), 7); |
| 12967 | set_nt_mirroring(machine(), PPU_MIRROR_VERT); |
| 12967 | 12968 | break; |
| 12968 | 12969 | case BMC_GS2004: |
| 12969 | 12970 | case BMC_GS2013: |
| 12970 | | prg32(machine, 0xff); |
| 12971 | prg32(machine(), 0xff); |
| 12971 | 12972 | break; |
| 12972 | 12973 | case BMC_S24IN1SC03: |
| 12973 | | state->m_mmc_reg[0] = 0x24; |
| 12974 | | state->m_mmc_reg[1] = 0x9f; |
| 12975 | | state->m_mmc_reg[2] = 0; |
| 12976 | | mmc3_common_initialize(machine, 0xff, 0xff, 0); |
| 12974 | m_mmc_reg[0] = 0x24; |
| 12975 | m_mmc_reg[1] = 0x9f; |
| 12976 | m_mmc_reg[2] = 0; |
| 12977 | mmc3_common_initialize(machine(), 0xff, 0xff, 0); |
| 12977 | 12978 | break; |
| 12978 | 12979 | case BMC_T262: |
| 12979 | | state->m_mmc_latch1 = 0; |
| 12980 | | state->m_mmc_latch2 = 0; |
| 12981 | | prg16_89ab(machine, 0); |
| 12982 | | prg16_cdef(machine, 7); |
| 12980 | m_mmc_latch1 = 0; |
| 12981 | m_mmc_latch2 = 0; |
| 12982 | prg16_89ab(machine(), 0); |
| 12983 | prg16_cdef(machine(), 7); |
| 12983 | 12984 | break; |
| 12984 | 12985 | case DREAMTECH_BOARD: |
| 12985 | | prg16_89ab(machine, 0); |
| 12986 | | prg16_cdef(machine, 8); |
| 12986 | prg16_89ab(machine(), 0); |
| 12987 | prg16_cdef(machine(), 8); |
| 12987 | 12988 | break; |
| 12988 | 12989 | case UNL_8237: |
| 12989 | | state->m_mmc_reg[0] = state->m_mmc_reg[1] = state->m_mmc_reg[2] = 0; |
| 12990 | | mmc3_common_initialize(machine, 0xff, 0xff, 0); |
| 12990 | m_mmc_reg[0] = m_mmc_reg[1] = m_mmc_reg[2] = 0; |
| 12991 | mmc3_common_initialize(machine(), 0xff, 0xff, 0); |
| 12991 | 12992 | break; |
| 12992 | 12993 | case UNL_AX5705: |
| 12993 | | state->m_mmc_prg_bank[0] = 0; |
| 12994 | | state->m_mmc_prg_bank[1] = 1; |
| 12995 | | prg8_89(machine, state->m_mmc_prg_bank[0]); |
| 12996 | | prg8_ab(machine, state->m_mmc_prg_bank[1]); |
| 12997 | | prg8_cd(machine, 0xfe); |
| 12998 | | prg8_ef(machine, 0xff); |
| 12994 | m_mmc_prg_bank[0] = 0; |
| 12995 | m_mmc_prg_bank[1] = 1; |
| 12996 | prg8_89(machine(), m_mmc_prg_bank[0]); |
| 12997 | prg8_ab(machine(), m_mmc_prg_bank[1]); |
| 12998 | prg8_cd(machine(), 0xfe); |
| 12999 | prg8_ef(machine(), 0xff); |
| 12999 | 13000 | break; |
| 13000 | 13001 | case UNL_RACERMATE: |
| 13001 | | chr4_0(machine, 0, state->m_mmc_chr_source); |
| 13002 | | chr4_4(machine, 0, state->m_mmc_chr_source); |
| 13003 | | prg16_89ab(machine, 0); |
| 13004 | | prg16_cdef(machine, state->m_prg_chunks - 1); |
| 13002 | chr4_0(machine(), 0, m_mmc_chr_source); |
| 13003 | chr4_4(machine(), 0, m_mmc_chr_source); |
| 13004 | prg16_89ab(machine(), 0); |
| 13005 | prg16_cdef(machine(), m_prg_chunks - 1); |
| 13005 | 13006 | break; |
| 13006 | 13007 | |
| 13007 | 13008 | case BMC_BENSHENG_BS5: |
| 13008 | | state->m_mmc_prg_bank[0] = 0xff; |
| 13009 | | state->m_mmc_prg_bank[1] = 0xff; |
| 13010 | | state->m_mmc_prg_bank[2] = 0xff; |
| 13011 | | state->m_mmc_prg_bank[3] = 0xff; |
| 13012 | | bmc_bs5_update_banks(machine); |
| 13009 | m_mmc_prg_bank[0] = 0xff; |
| 13010 | m_mmc_prg_bank[1] = 0xff; |
| 13011 | m_mmc_prg_bank[2] = 0xff; |
| 13012 | m_mmc_prg_bank[3] = 0xff; |
| 13013 | bmc_bs5_update_banks(machine()); |
| 13013 | 13014 | break; |
| 13014 | 13015 | |
| 13015 | 13016 | case BMC_810544: |
| 13016 | | prg16_89ab(machine, 0); |
| 13017 | | prg16_cdef(machine, 0); |
| 13018 | | set_nt_mirroring(machine, PPU_MIRROR_VERT); |
| 13017 | prg16_89ab(machine(), 0); |
| 13018 | prg16_cdef(machine(), 0); |
| 13019 | set_nt_mirroring(machine(), PPU_MIRROR_VERT); |
| 13019 | 13020 | break; |
| 13020 | 13021 | |
| 13021 | 13022 | case BMC_G63IN1: |
| 13022 | | bmc_gb63_update(machine); |
| 13023 | bmc_gb63_update(machine()); |
| 13023 | 13024 | break; |
| 13024 | 13025 | |
| 13025 | 13026 | case BMC_FK23C: |
| 13026 | | state->m_mmc_reg[0] = 4; |
| 13027 | | state->m_mmc_reg[1] = 0xff; |
| 13028 | | state->m_mmc_reg[2] = state->m_mmc_reg[3] = 0; |
| 13029 | | state->m_mmc_reg[4] = state->m_mmc_reg[5] = state->m_mmc_reg[6] = state->m_mmc_reg[7] = 0xff; |
| 13030 | | mmc3_common_initialize(machine, 0xff, 0xff, 0); |
| 13031 | | fk23c_set_prg(machine); |
| 13032 | | fk23c_set_chr(machine); |
| 13027 | m_mmc_reg[0] = 4; |
| 13028 | m_mmc_reg[1] = 0xff; |
| 13029 | m_mmc_reg[2] = m_mmc_reg[3] = 0; |
| 13030 | m_mmc_reg[4] = m_mmc_reg[5] = m_mmc_reg[6] = m_mmc_reg[7] = 0xff; |
| 13031 | mmc3_common_initialize(machine(), 0xff, 0xff, 0); |
| 13032 | fk23c_set_prg(machine()); |
| 13033 | fk23c_set_chr(machine()); |
| 13033 | 13034 | break; |
| 13034 | 13035 | |
| 13035 | 13036 | case BMC_FK23CA: |
| 13036 | | state->m_mmc_reg[0] = state->m_mmc_reg[1] = state->m_mmc_reg[2] = state->m_mmc_reg[3] = 0; |
| 13037 | | state->m_mmc_reg[4] = state->m_mmc_reg[5] = state->m_mmc_reg[6] = state->m_mmc_reg[7] = 0xff; |
| 13038 | | mmc3_common_initialize(machine, 0xff, 0xff, 0); |
| 13039 | | fk23c_set_prg(machine); |
| 13040 | | fk23c_set_chr(machine); |
| 13037 | m_mmc_reg[0] = m_mmc_reg[1] = m_mmc_reg[2] = m_mmc_reg[3] = 0; |
| 13038 | m_mmc_reg[4] = m_mmc_reg[5] = m_mmc_reg[6] = m_mmc_reg[7] = 0xff; |
| 13039 | mmc3_common_initialize(machine(), 0xff, 0xff, 0); |
| 13040 | fk23c_set_prg(machine()); |
| 13041 | fk23c_set_chr(machine()); |
| 13041 | 13042 | break; |
| 13042 | 13043 | |
| 13043 | 13044 | |
| 13044 | 13045 | case FFE_MAPPER6: |
| 13045 | | prg16_89ab(machine, 0); |
| 13046 | | prg16_cdef(machine, 7); |
| 13046 | prg16_89ab(machine(), 0); |
| 13047 | prg16_cdef(machine(), 7); |
| 13047 | 13048 | break; |
| 13048 | 13049 | case FFE_MAPPER8: |
| 13049 | | prg32(machine, 0); |
| 13050 | prg32(machine(), 0); |
| 13050 | 13051 | break; |
| 13051 | 13052 | case FFE_MAPPER17: |
| 13052 | | prg16_89ab(machine, 0); |
| 13053 | | prg16_cdef(machine, state->m_prg_chunks - 1); |
| 13053 | prg16_89ab(machine(), 0); |
| 13054 | prg16_cdef(machine(), m_prg_chunks - 1); |
| 13054 | 13055 | break; |
| 13055 | 13056 | |
| 13056 | 13057 | case UNSUPPORTED_BOARD: |
| r18064 | r18065 | |
| 13090 | 13091 | state->m_ppu->set_scanline_callback(intf ? intf->mmc_scanline : NULL); |
| 13091 | 13092 | state->m_ppu->set_hblank_callback(intf ? intf->mmc_hblank : NULL); |
| 13092 | 13093 | |
| 13093 | | err = pcb_initialize(machine, state->m_pcb_id); |
| 13094 | err = state->pcb_initialize(state->m_pcb_id); |
| 13094 | 13095 | |
| 13095 | 13096 | return err; |
| 13096 | 13097 | } |