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r17965 Monday 17th September, 2012 at 09:16:44 UTC by Aaron Giles
Memory handler cleanup 3. Add mem_mask parameter
to 8-bit handlers to match the others. To ease
pain, added DECLARE_READ/WRITE_HANDLER macros that
set up a default parameter. Also updated devcb so
that the handlers can be called with or without the
mem_mask. [Aaron Giles]
[src/emu]devcb.c devcb.h memconv.h memory.c memory.h
[src/emu/cpu/dsp56k]dsp56mem.h
[src/emu/cpu/g65816]g65816op.h
[src/emu/cpu/h6280]h6280.h
[src/emu/cpu/m6800]m6800.h
[src/emu/cpu/m68000]68307bus.h 68307ser.h 68307sim.h 68307tmu.h 68340dma.h 68340ser.h 68340sim.h 68340tmu.h
[src/emu/cpu/psx]sio.h
[src/emu/cpu/sh2]sh2.h
[src/emu/cpu/sh4]sh4.h sh4comn.h
[src/emu/cpu/tms34010]tms34010.h
[src/emu/cpu/tms7000]tms7000.c
[src/emu/cpu/tms9900]tms9900l.h
[src/emu/machine]8042kbdc.h latch8.c pc16552d.h s3c2400.c s3c2410.c tmp68301.h
[src/emu/sound]pokey.h spu.h
[src/emu/video]pc_cga.c pc_cga.h pc_vga.c pc_vga.h tms34061.h
[src/mame/audio]atarijsa.c cage.c cclimber.h dcs.c dcs.h irem.h seibu.h t5182.h timeplt.h trackfld.h
[src/mame/drivers]bfm_sc4h.c decocass.c dkong.c mario.c mpu4vid.c
[src/mame/includes]actfancr.h amiga.h archimds.h astrocde.h asuka.h atari.h atarig42.h atarigx2.h atarisy1.h atarisy2.h avalnche.h badlands.h cchip.h copsnrob.h cyberbal.h dc.h dec0.h dec8.h deco32.h decoprot.h fastfred.h galaga.h galivan.h galpani2.h galpanic.h gauntlet.h harddriv.h itech8.h klax.h ladybug.h matmania.h megadriv.h midzeus.h namcoic.h namcos1.h namcos2.h nb1413m3.h pacman.h pk8000.h psx.h scramble.h segamsys.h sei_crtc.h skullxbo.h snes.h snk6502.h stv.h targ.h toobin.h vicdual.h vindictr.h
[src/mame/machine]asic65.h atarigen.h cdi070.h decocass.c decocass.h konppc.h m68kfmly.h megacd.c megadriv.c midwayic.h namcos1.c nmk004.h pcecommn.h seicop.h smpc.h snes.c stvcd.h tait8741.c tait8741.h
[src/mame/video]atarimo.h avgdvg.h gtia.h gticlub.h konamiic.c konamiic.h konicdev.h mcd212.h segaic16.h vdc.h ygv608.h
[src/mess/drivers]b16.c bigbord2.c bullet.c dc.c dmv.c mikromik.c p8k.c qx10.c super6.c trs80m2.c vidbrain.c x1.c
[src/mess/includes]amstr_pc.h apple2.h bebox.h c16.h c64_legacy.h cgenie.h corvushd.h dgn_beta.h enterp.h europc.h fmtowns.h hec2hrp.h mbc55x.h pc1251.h pc1350.h pc1401.h pc1403.h pet.h ps2.h tandy1t.h thomson.h x68k.h
[src/mess/machine]990_dk.h 990_hd.h apple2gs.c c65.c concept.c dgn_beta.c lux21046.c lynx.c mboard.h nes_mmc.c nes_mmc.h nes_pcb.c partner.c pc_fdc.c pc_fdc.h pc_joy.h radio86.c sgi.h sst39vfx.h thomflop.c thomflop.h ti990.h
[src/mess/video]gf4500.h newport.c newport.h pc_aga.c pc_aga.h

trunk/src/mame/audio/atarijsa.c
r17964r17965
7373
7474static void update_all_volumes(running_machine &machine);
7575
76static READ8_HANDLER( jsa1_io_r );
77static WRITE8_HANDLER( jsa1_io_w );
78static READ8_HANDLER( jsa2_io_r );
79static WRITE8_HANDLER( jsa2_io_w );
80static READ8_HANDLER( jsa3_io_r );
81static WRITE8_HANDLER( jsa3_io_w );
76static DECLARE_READ8_HANDLER( jsa1_io_r );
77static DECLARE_WRITE8_HANDLER( jsa1_io_w );
78static DECLARE_READ8_HANDLER( jsa2_io_r );
79static DECLARE_WRITE8_HANDLER( jsa2_io_w );
80static DECLARE_READ8_HANDLER( jsa3_io_r );
81static DECLARE_WRITE8_HANDLER( jsa3_io_w );
8282
8383
8484/*************************************
trunk/src/mame/audio/cage.c
r17964r17965
147147static TIMER_DEVICE_CALLBACK( dma_timer_callback );
148148static TIMER_DEVICE_CALLBACK( cage_timer_callback );
149149static void update_timer(int which);
150static WRITE32_HANDLER( speedup_w );
150static DECLARE_WRITE32_HANDLER( speedup_w );
151151
152152
153153
trunk/src/mame/audio/seibu.h
r17964r17965
3838ADDRESS_MAP_EXTERN(seibu3_sound_map, 8);
3939ADDRESS_MAP_EXTERN(seibu3_adpcm_sound_map, 8);
4040
41READ16_HANDLER( seibu_main_word_r );
42READ8_HANDLER( seibu_main_v30_r );
43WRITE16_HANDLER( seibu_main_word_w );
44WRITE8_HANDLER( seibu_main_v30_w );
41DECLARE_READ16_HANDLER( seibu_main_word_r );
42DECLARE_READ8_HANDLER( seibu_main_v30_r );
43DECLARE_WRITE16_HANDLER( seibu_main_word_w );
44DECLARE_WRITE8_HANDLER( seibu_main_v30_w );
4545
46WRITE16_HANDLER( seibu_main_mustb_w );
46DECLARE_WRITE16_HANDLER( seibu_main_mustb_w );
4747
48WRITE8_HANDLER( seibu_irq_clear_w );
49WRITE8_HANDLER( seibu_rst10_ack_w );
50WRITE8_HANDLER( seibu_rst18_ack_w );
51WRITE8_HANDLER( seibu_bank_w );
52WRITE8_HANDLER( seibu_coin_w );
48DECLARE_WRITE8_HANDLER( seibu_irq_clear_w );
49DECLARE_WRITE8_HANDLER( seibu_rst10_ack_w );
50DECLARE_WRITE8_HANDLER( seibu_rst18_ack_w );
51DECLARE_WRITE8_HANDLER( seibu_bank_w );
52DECLARE_WRITE8_HANDLER( seibu_coin_w );
5353void seibu_ym3812_irqhandler(device_t *device, int linestate);
5454void seibu_ym2151_irqhandler(device_t *device, int linestate);
5555void seibu_ym2203_irqhandler(device_t *device, int linestate);
56READ8_HANDLER( seibu_soundlatch_r );
57READ8_HANDLER( seibu_main_data_pending_r );
58WRITE8_HANDLER( seibu_main_data_w );
56DECLARE_READ8_HANDLER( seibu_soundlatch_r );
57DECLARE_READ8_HANDLER( seibu_main_data_pending_r );
58DECLARE_WRITE8_HANDLER( seibu_main_data_w );
5959MACHINE_RESET( seibu_sound );
6060void seibu_sound_decrypt(running_machine &machine,const char *cpu,int length);
6161
trunk/src/mame/audio/dcs.c
r17964r17965
376376 *
377377 *************************************/
378378
379static READ16_HANDLER( dcs_dataram_r );
380static WRITE16_HANDLER( dcs_dataram_w );
381static WRITE16_HANDLER( dcs_data_bank_select_w );
379static DECLARE_READ16_HANDLER( dcs_dataram_r );
380static DECLARE_WRITE16_HANDLER( dcs_dataram_w );
381static DECLARE_WRITE16_HANDLER( dcs_data_bank_select_w );
382382
383383static void sdrc_reset(running_machine &machine);
384static READ16_HANDLER( sdrc_r );
385static WRITE16_HANDLER( sdrc_w );
384static DECLARE_READ16_HANDLER( sdrc_r );
385static DECLARE_WRITE16_HANDLER( sdrc_w );
386386
387387static void dsio_reset(running_machine &machine);
388static READ16_HANDLER( dsio_r );
389static WRITE16_HANDLER( dsio_w );
388static DECLARE_READ16_HANDLER( dsio_r );
389static DECLARE_WRITE16_HANDLER( dsio_w );
390390
391391static void denver_reset(running_machine &machine);
392static READ16_HANDLER( denver_r );
393static WRITE16_HANDLER( denver_w );
392static DECLARE_READ16_HANDLER( denver_r );
393static DECLARE_WRITE16_HANDLER( denver_w );
394394
395static READ16_HANDLER( adsp_control_r );
396static WRITE16_HANDLER( adsp_control_w );
395static DECLARE_READ16_HANDLER( adsp_control_r );
396static DECLARE_WRITE16_HANDLER( adsp_control_w );
397397
398static READ16_HANDLER( latch_status_r );
399static READ16_HANDLER( fifo_input_r );
400static READ16_HANDLER( input_latch_r );
401static WRITE16_HANDLER( input_latch_ack_w );
402static WRITE16_HANDLER( output_latch_w );
403static READ16_HANDLER( output_control_r );
404static WRITE16_HANDLER( output_control_w );
398static DECLARE_READ16_HANDLER( latch_status_r );
399static DECLARE_READ16_HANDLER( fifo_input_r );
400static DECLARE_READ16_HANDLER( input_latch_r );
401static DECLARE_WRITE16_HANDLER( input_latch_ack_w );
402static DECLARE_WRITE16_HANDLER( output_latch_w );
403static DECLARE_READ16_HANDLER( output_control_r );
404static DECLARE_WRITE16_HANDLER( output_control_w );
405405
406406static void timer_enable_callback(adsp21xx_device &device, int enable);
407407static TIMER_DEVICE_CALLBACK( internal_timer_callback );
r17964r17965
410410static void recompute_sample_rate(running_machine &machine);
411411static void sound_tx_callback(adsp21xx_device &device, int port, INT32 data);
412412
413static READ16_HANDLER( dcs_polling_r );
414static WRITE16_HANDLER( dcs_polling_w );
413static DECLARE_READ16_HANDLER( dcs_polling_r );
414static DECLARE_WRITE16_HANDLER( dcs_polling_w );
415415
416416static TIMER_DEVICE_CALLBACK( transfer_watchdog_callback );
417417static int preprocess_write(running_machine &machine, UINT16 data);
trunk/src/mame/audio/dcs.h
r17964r17965
44
55****************************************************************************/
66
7#ifndef __DCS_H__
8#define __DCS_H__
9
710MACHINE_CONFIG_EXTERN( dcs_audio_2k );
811MACHINE_CONFIG_EXTERN( dcs_audio_2k_uart );
912MACHINE_CONFIG_EXTERN( dcs_audio_8k );
r17964r17965
2932
3033void dcs_fifo_notify(running_machine &machine, int count, int max);
3134
32WRITE32_HANDLER( dsio_idma_addr_w );
33WRITE32_HANDLER( dsio_idma_data_w );
34READ32_HANDLER( dsio_idma_data_r );
35DECLARE_WRITE32_HANDLER( dsio_idma_addr_w );
36DECLARE_WRITE32_HANDLER( dsio_idma_data_w );
37DECLARE_READ32_HANDLER( dsio_idma_data_r );
38
39#endif
trunk/src/mame/audio/timeplt.h
r17964r17965
1WRITE8_HANDLER( timeplt_sh_irqtrigger_w );
1DECLARE_WRITE8_HANDLER( timeplt_sh_irqtrigger_w );
22
33MACHINE_CONFIG_EXTERN( timeplt_sound );
44MACHINE_CONFIG_EXTERN( locomotn_sound );
trunk/src/mame/audio/trackfld.h
r17964r17965
1WRITE8_HANDLER( konami_sh_irqtrigger_w );
2READ8_HANDLER( trackfld_sh_timer_r );
1DECLARE_WRITE8_HANDLER( konami_sh_irqtrigger_w );
2DECLARE_READ8_HANDLER( trackfld_sh_timer_r );
33DECLARE_READ8_DEVICE_HANDLER( trackfld_speech_r );
44DECLARE_WRITE8_DEVICE_HANDLER( trackfld_sound_w );
5READ8_HANDLER( hyperspt_sh_timer_r );
5DECLARE_READ8_HANDLER( hyperspt_sh_timer_r );
66DECLARE_WRITE8_DEVICE_HANDLER( hyperspt_sound_w );
7WRITE8_HANDLER( konami_SN76496_latch_w );
7DECLARE_WRITE8_HANDLER( konami_SN76496_latch_w );
88DECLARE_WRITE8_DEVICE_HANDLER( konami_SN76496_w );
99
1010class trackfld_audio_device : public device_t,
trunk/src/mame/audio/cclimber.h
r17964r17965
33
44extern const ay8910_interface cclimber_ay8910_interface;
55extern const samples_interface cclimber_samples_interface;
6WRITE8_HANDLER( cclimber_sample_trigger_w );
7WRITE8_HANDLER( cclimber_sample_rate_w );
8WRITE8_HANDLER( cclimber_sample_volume_w );
6DECLARE_WRITE8_HANDLER( cclimber_sample_trigger_w );
7DECLARE_WRITE8_HANDLER( cclimber_sample_rate_w );
8DECLARE_WRITE8_HANDLER( cclimber_sample_volume_w );
trunk/src/mame/audio/t5182.h
r17964r17965
1010ADDRESS_MAP_EXTERN( t5182_map, 8 );
1111ADDRESS_MAP_EXTERN( t5182_io, 8 );
1212
13WRITE8_HANDLER( t5182_sound_irq_w );
14READ8_HANDLER(t5182_sharedram_semaphore_snd_r);
15WRITE8_HANDLER(t5182_sharedram_semaphore_main_acquire_w);
16WRITE8_HANDLER(t5182_sharedram_semaphore_main_release_w);
13DECLARE_WRITE8_HANDLER( t5182_sound_irq_w );
14DECLARE_READ8_HANDLER(t5182_sharedram_semaphore_snd_r);
15DECLARE_WRITE8_HANDLER(t5182_sharedram_semaphore_main_acquire_w);
16DECLARE_WRITE8_HANDLER(t5182_sharedram_semaphore_main_release_w);
1717
18READ8_HANDLER( t5182_sharedram_r );
19WRITE8_HANDLER( t5182_sharedram_w );
18DECLARE_READ8_HANDLER( t5182_sharedram_r );
19DECLARE_WRITE8_HANDLER( t5182_sharedram_w );
2020
2121extern const ym2151_interface t5182_ym2151_interface;
trunk/src/mame/audio/irem.h
r17964r17965
1WRITE8_HANDLER( irem_sound_cmd_w );
1DECLARE_WRITE8_HANDLER( irem_sound_cmd_w );
22
33MACHINE_CONFIG_EXTERN( m52_sound_c_audio );
44MACHINE_CONFIG_EXTERN( m52_large_audio );
trunk/src/mame/machine/nmk004.h
r17964r17965
11void NMK004_init(running_machine &machine);
22void NMK004_irq(device_t *device, int irq);
3READ16_HANDLER( NMK004_r );
4WRITE16_HANDLER( NMK004_w );
3DECLARE_READ16_HANDLER( NMK004_r );
4DECLARE_WRITE16_HANDLER( NMK004_w );
trunk/src/mame/machine/asic65.h
r17964r17965
1111
1212void asic65_config(running_machine &machine, int asictype);
1313void asic65_reset(running_machine &machine, int state);
14WRITE16_HANDLER( asic65_data_w );
15READ16_HANDLER( asic65_r );
16READ16_HANDLER( asic65_io_r );
14DECLARE_WRITE16_HANDLER( asic65_data_w );
15DECLARE_READ16_HANDLER( asic65_r );
16DECLARE_READ16_HANDLER( asic65_io_r );
1717
1818MACHINE_CONFIG_EXTERN( asic65 );
trunk/src/mame/machine/m68kfmly.h
r17964r17965
66
77******************************************************************************/
88
9READ16_HANDLER( tmp68301_address_decoder_r );
10WRITE16_HANDLER( tmp68301_address_decoder_w );
11READ16_HANDLER( tmp68301_interrupt_controller_r );
12WRITE16_HANDLER( tmp68301_interrupt_controller_w );
13READ16_HANDLER( tmp68301_parallel_interface_r );
14WRITE16_HANDLER( tmp68301_parallel_interface_w );
15READ16_HANDLER( tmp68301_serial_interface_r );
16WRITE16_HANDLER( tmp68301_serial_interface_w );
17READ16_HANDLER( tmp68301_timer_r );
18WRITE16_HANDLER( tmp68301_timer_w );
9DECLARE_READ16_HANDLER( tmp68301_address_decoder_r );
10DECLARE_WRITE16_HANDLER( tmp68301_address_decoder_w );
11DECLARE_READ16_HANDLER( tmp68301_interrupt_controller_r );
12DECLARE_WRITE16_HANDLER( tmp68301_interrupt_controller_w );
13DECLARE_READ16_HANDLER( tmp68301_parallel_interface_r );
14DECLARE_WRITE16_HANDLER( tmp68301_parallel_interface_w );
15DECLARE_READ16_HANDLER( tmp68301_serial_interface_r );
16DECLARE_WRITE16_HANDLER( tmp68301_serial_interface_w );
17DECLARE_READ16_HANDLER( tmp68301_timer_r );
18DECLARE_WRITE16_HANDLER( tmp68301_timer_w );
trunk/src/mame/machine/stvcd.h
r17964r17965
1515TIMER_DEVICE_CALLBACK( stv_sector_cb );
1616TIMER_DEVICE_CALLBACK( stv_sh1_sim );
1717
18READ32_HANDLER( stvcd_r );
19WRITE32_HANDLER( stvcd_w );
18DECLARE_READ32_HANDLER( stvcd_r );
19DECLARE_WRITE32_HANDLER( stvcd_w );
2020
2121void stvcd_set_tray_open(running_machine &machine);
2222void stvcd_set_tray_close(running_machine &machine);
trunk/src/mame/machine/namcos1.c
r17964r17965
1515INLINE UINT8 bank_r(address_space &space, offs_t offset, int bank)
1616{
1717   namcos1_state *state = space.machine().driver_data<namcos1_state>();
18   return (*state->m_active_bank[bank].bank_handler_r )(space, offset + state->m_active_bank[bank].bank_offset);
18   return (*state->m_active_bank[bank].bank_handler_r )(space, offset + state->m_active_bank[bank].bank_offset, 0xff);
1919}
2020
2121static READ8_HANDLER( bank1_r )  { return bank_r(space, offset, 0); }
r17964r17965
3838INLINE void bank_w(address_space &space, offs_t offset, UINT8 data, int bank)
3939{
4040   namcos1_state *state = space.machine().driver_data<namcos1_state>();
41   (*state->m_active_bank[bank].bank_handler_w )(space, offset + state->m_active_bank[bank].bank_offset, data);
41   (*state->m_active_bank[bank].bank_handler_w )(space, offset + state->m_active_bank[bank].bank_offset, data, 0xff);
4242}
4343
4444static WRITE8_HANDLER( bank1_w )  { bank_w(space, offset, data, 0); }
r17964r17965
8484
8585
8686// used by faceoff and tankforce 4 player (input multiplex)
87static READ8_HANDLER( faceoff_inputs_r );
87static DECLARE_READ8_HANDLER( faceoff_inputs_r );
8888
8989static READ8_HANDLER( no_key_r )
9090{
trunk/src/mame/machine/megadriv.c
r17964r17965
9595}
9696
9797
98static READ16_HANDLER( megadriv_68k_check_z80_bus );
99static WRITE16_HANDLER(megadriv_68k_req_z80_bus);
98static DECLARE_READ16_HANDLER( megadriv_68k_check_z80_bus );
99static DECLARE_WRITE16_HANDLER(megadriv_68k_req_z80_bus);
100100
101static READ16_HANDLER( megadriv_68k_read_z80_ram );
102static WRITE16_HANDLER( megadriv_68k_write_z80_ram );
101static DECLARE_READ16_HANDLER( megadriv_68k_read_z80_ram );
102static DECLARE_WRITE16_HANDLER( megadriv_68k_write_z80_ram );
103103
104static WRITE16_HANDLER( megadriv_68k_req_z80_reset );
104static DECLARE_WRITE16_HANDLER( megadriv_68k_req_z80_reset );
105105
106106
107107
trunk/src/mame/machine/megacd.c
r17964r17965
13721372   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
13731373
13741374   if (ACCESSING_BITS_8_15)
1375      scd_a12002_memory_mode_w_8_15(space, 0, data>>8);
1375      scd_a12002_memory_mode_w_8_15(space, 0, data>>8, mem_mask>>8);
13761376
13771377   if (ACCESSING_BITS_0_7)
1378      scd_a12002_memory_mode_w_0_7(space, 0, data&0xff);
1378      scd_a12002_memory_mode_w_0_7(space, 0, data&0xff, mem_mask&0xff);
13791379}
13801380
13811381
r17964r17965
14681468   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
14691469
14701470   if (ACCESSING_BITS_8_15)
1471      segacd_sub_memory_mode_w_8_15(space, 0, data>>8);
1471      segacd_sub_memory_mode_w_8_15(space, 0, data>>8, mem_mask>>8);
14721472
14731473   if (ACCESSING_BITS_0_7)
1474      segacd_sub_memory_mode_w_0_7(space, 0, data&0xff);
1474      segacd_sub_memory_mode_w_0_7(space, 0, data&0xff, mem_mask&0xff);
14751475}
14761476
14771477
r17964r17965
23052305void segacd_init_main_cpu( running_machine& machine )
23062306{
23072307   address_space& space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
2308
2308   
23092309   segacd_font_bits = reinterpret_cast<UINT16 *>(machine.root_device().memshare(":segacd:segacd_font")->ptr());
23102310   segacd_backupram = reinterpret_cast<UINT16 *>(machine.root_device().memshare(":segacd:backupram")->ptr());
23112311   segacd_dataram = reinterpret_cast<UINT16 *>(machine.root_device().memshare(":segacd:dataram")->ptr());
23122312   segacd_dataram2 = reinterpret_cast<UINT16 *>(machine.root_device().memshare(":segacd:dataram2")->ptr());
23132313   segacd_4meg_prgram = reinterpret_cast<UINT16 *>(machine.root_device().memshare(":segacd:segacd_program")->ptr());
2314
2314   
23152315   segacd_4meg_prgbank = 0;
23162316
23172317
trunk/src/mame/machine/smpc.h
r17964r17965
1WRITE8_HANDLER( stv_SMPC_w );
2READ8_HANDLER( stv_SMPC_r );
3WRITE8_HANDLER( saturn_SMPC_w );
4READ8_HANDLER( saturn_SMPC_r );
1DECLARE_WRITE8_HANDLER( stv_SMPC_w );
2DECLARE_READ8_HANDLER( stv_SMPC_r );
3DECLARE_WRITE8_HANDLER( saturn_SMPC_w );
4DECLARE_READ8_HANDLER( saturn_SMPC_r );
trunk/src/mame/machine/decocass.c
r17964r17965
12421242   else
12431243   {
12441244      if (state->m_dongle_r)
1245         data = (*state->m_dongle_r)(space, offset);
1245         data = (*state->m_dongle_r)(space, offset, mem_mask);
12461246      else
12471247         data = 0xff;
12481248   }
r17964r17965
12541254   decocass_state *state = space.machine().driver_data<decocass_state>();
12551255   if (state->m_dongle_w)
12561256   {
1257      (*state->m_dongle_w)(space, offset, data);
1257      (*state->m_dongle_w)(space, offset, data, mem_mask);
12581258      return;
12591259   }
12601260
trunk/src/mame/machine/decocass.h
r17964r17965
184184
185185
186186
187WRITE8_HANDLER( decocass_coin_counter_w );
188WRITE8_HANDLER( decocass_sound_command_w );
189READ8_HANDLER( decocass_sound_data_r );
190READ8_HANDLER( decocass_sound_ack_r );
191WRITE8_HANDLER( decocass_sound_data_w );
192READ8_HANDLER( decocass_sound_command_r );
187DECLARE_WRITE8_HANDLER( decocass_coin_counter_w );
188DECLARE_WRITE8_HANDLER( decocass_sound_command_w );
189DECLARE_READ8_HANDLER( decocass_sound_data_r );
190DECLARE_READ8_HANDLER( decocass_sound_ack_r );
191DECLARE_WRITE8_HANDLER( decocass_sound_data_w );
192DECLARE_READ8_HANDLER( decocass_sound_command_r );
193193TIMER_DEVICE_CALLBACK( decocass_audio_nmi_gen );
194WRITE8_HANDLER( decocass_sound_nmi_enable_w );
195READ8_HANDLER( decocass_sound_nmi_enable_r );
196READ8_HANDLER( decocass_sound_data_ack_reset_r );
197WRITE8_HANDLER( decocass_sound_data_ack_reset_w );
198WRITE8_HANDLER( decocass_nmi_reset_w );
199WRITE8_HANDLER( decocass_quadrature_decoder_reset_w );
200WRITE8_HANDLER( decocass_adc_w );
201READ8_HANDLER( decocass_input_r );
194DECLARE_WRITE8_HANDLER( decocass_sound_nmi_enable_w );
195DECLARE_READ8_HANDLER( decocass_sound_nmi_enable_r );
196DECLARE_READ8_HANDLER( decocass_sound_data_ack_reset_r );
197DECLARE_WRITE8_HANDLER( decocass_sound_data_ack_reset_w );
198DECLARE_WRITE8_HANDLER( decocass_nmi_reset_w );
199DECLARE_WRITE8_HANDLER( decocass_quadrature_decoder_reset_w );
200DECLARE_WRITE8_HANDLER( decocass_adc_w );
201DECLARE_READ8_HANDLER( decocass_input_r );
202202
203WRITE8_HANDLER( decocass_reset_w );
203DECLARE_WRITE8_HANDLER( decocass_reset_w );
204204
205READ8_HANDLER( decocass_e5xx_r );
206WRITE8_HANDLER( decocass_e5xx_w );
207WRITE8_HANDLER( decocass_de0091_w );
208WRITE8_HANDLER( decocass_e900_w );
205DECLARE_READ8_HANDLER( decocass_e5xx_r );
206DECLARE_WRITE8_HANDLER( decocass_e5xx_w );
207DECLARE_WRITE8_HANDLER( decocass_de0091_w );
208DECLARE_WRITE8_HANDLER( decocass_e900_w );
209209
210210
211211
r17964r17965
243243
244244
245245
246WRITE8_HANDLER( i8041_p1_w );
247READ8_HANDLER( i8041_p1_r );
248WRITE8_HANDLER( i8041_p2_w );
249READ8_HANDLER( i8041_p2_r );
246DECLARE_WRITE8_HANDLER( i8041_p1_w );
247DECLARE_READ8_HANDLER( i8041_p1_r );
248DECLARE_WRITE8_HANDLER( i8041_p2_w );
249DECLARE_READ8_HANDLER( i8041_p2_r );
250250
251251void decocass_machine_state_save_init(running_machine &machine);
252252
253253
254254/*----------- defined in video/decocass.c -----------*/
255255
256WRITE8_HANDLER( decocass_paletteram_w );
257WRITE8_HANDLER( decocass_charram_w );
258WRITE8_HANDLER( decocass_fgvideoram_w );
259WRITE8_HANDLER( decocass_colorram_w );
260WRITE8_HANDLER( decocass_bgvideoram_w );
261WRITE8_HANDLER( decocass_tileram_w );
262WRITE8_HANDLER( decocass_objectram_w );
256DECLARE_WRITE8_HANDLER( decocass_paletteram_w );
257DECLARE_WRITE8_HANDLER( decocass_charram_w );
258DECLARE_WRITE8_HANDLER( decocass_fgvideoram_w );
259DECLARE_WRITE8_HANDLER( decocass_colorram_w );
260DECLARE_WRITE8_HANDLER( decocass_bgvideoram_w );
261DECLARE_WRITE8_HANDLER( decocass_tileram_w );
262DECLARE_WRITE8_HANDLER( decocass_objectram_w );
263263
264WRITE8_HANDLER( decocass_watchdog_count_w );
265WRITE8_HANDLER( decocass_watchdog_flip_w );
266WRITE8_HANDLER( decocass_color_missiles_w );
267WRITE8_HANDLER( decocass_mode_set_w );
268WRITE8_HANDLER( decocass_color_center_bot_w );
269WRITE8_HANDLER( decocass_back_h_shift_w );
270WRITE8_HANDLER( decocass_back_vl_shift_w );
271WRITE8_HANDLER( decocass_back_vr_shift_w );
272WRITE8_HANDLER( decocass_part_h_shift_w );
273WRITE8_HANDLER( decocass_part_v_shift_w );
274WRITE8_HANDLER( decocass_center_h_shift_space_w );
275WRITE8_HANDLER( decocass_center_v_shift_w );
264DECLARE_WRITE8_HANDLER( decocass_watchdog_count_w );
265DECLARE_WRITE8_HANDLER( decocass_watchdog_flip_w );
266DECLARE_WRITE8_HANDLER( decocass_color_missiles_w );
267DECLARE_WRITE8_HANDLER( decocass_mode_set_w );
268DECLARE_WRITE8_HANDLER( decocass_color_center_bot_w );
269DECLARE_WRITE8_HANDLER( decocass_back_h_shift_w );
270DECLARE_WRITE8_HANDLER( decocass_back_vl_shift_w );
271DECLARE_WRITE8_HANDLER( decocass_back_vr_shift_w );
272DECLARE_WRITE8_HANDLER( decocass_part_h_shift_w );
273DECLARE_WRITE8_HANDLER( decocass_part_v_shift_w );
274DECLARE_WRITE8_HANDLER( decocass_center_h_shift_space_w );
275DECLARE_WRITE8_HANDLER( decocass_center_v_shift_w );
276276
277277
278278SCREEN_UPDATE_IND16( decocass );
trunk/src/mame/machine/konppc.h
r17964r17965
1212int get_cgboard_id(void);
1313void set_cgboard_texture_bank(running_machine &machine, int board, const char *bank, UINT8 *rom);
1414
15READ32_HANDLER( cgboard_dsp_comm_r_ppc );
16WRITE32_HANDLER( cgboard_dsp_comm_w_ppc );
17READ32_HANDLER( cgboard_dsp_shared_r_ppc );
18WRITE32_HANDLER( cgboard_dsp_shared_w_ppc );
15DECLARE_READ32_HANDLER( cgboard_dsp_comm_r_ppc );
16DECLARE_WRITE32_HANDLER( cgboard_dsp_comm_w_ppc );
17DECLARE_READ32_HANDLER( cgboard_dsp_shared_r_ppc );
18DECLARE_WRITE32_HANDLER( cgboard_dsp_shared_w_ppc );
1919
20READ32_HANDLER( cgboard_0_comm_sharc_r );
21WRITE32_HANDLER( cgboard_0_comm_sharc_w );
22READ32_HANDLER( cgboard_0_shared_sharc_r );
23WRITE32_HANDLER( cgboard_0_shared_sharc_w );
24READ32_HANDLER( cgboard_1_comm_sharc_r );
25WRITE32_HANDLER( cgboard_1_comm_sharc_w );
26READ32_HANDLER( cgboard_1_shared_sharc_r );
27WRITE32_HANDLER( cgboard_1_shared_sharc_w );
20DECLARE_READ32_HANDLER( cgboard_0_comm_sharc_r );
21DECLARE_WRITE32_HANDLER( cgboard_0_comm_sharc_w );
22DECLARE_READ32_HANDLER( cgboard_0_shared_sharc_r );
23DECLARE_WRITE32_HANDLER( cgboard_0_shared_sharc_w );
24DECLARE_READ32_HANDLER( cgboard_1_comm_sharc_r );
25DECLARE_WRITE32_HANDLER( cgboard_1_comm_sharc_w );
26DECLARE_READ32_HANDLER( cgboard_1_shared_sharc_r );
27DECLARE_WRITE32_HANDLER( cgboard_1_shared_sharc_w );
2828
29READ32_HANDLER(K033906_0_r);
30WRITE32_HANDLER(K033906_0_w);
31READ32_HANDLER(K033906_1_r);
32WRITE32_HANDLER(K033906_1_w);
29DECLARE_READ32_HANDLER(K033906_0_r);
30DECLARE_WRITE32_HANDLER(K033906_0_w);
31DECLARE_READ32_HANDLER(K033906_1_r);
32DECLARE_WRITE32_HANDLER(K033906_1_w);
3333
3434DECLARE_WRITE32_DEVICE_HANDLER(nwk_fifo_0_w);
3535DECLARE_WRITE32_DEVICE_HANDLER(nwk_fifo_1_w);
trunk/src/mame/machine/midwayic.h
r17964r17965
3030void midway_ioasic_fifo_w(running_machine &machine, UINT16 data);
3131void midway_ioasic_fifo_reset_w(running_machine &machine, int state);
3232void midway_ioasic_fifo_full_w(running_machine &machine, UINT16 data);
33READ32_HANDLER( midway_ioasic_r );
34WRITE32_HANDLER( midway_ioasic_w );
35READ32_HANDLER( midway_ioasic_packed_r );
36WRITE32_HANDLER( midway_ioasic_packed_w );
33DECLARE_READ32_HANDLER( midway_ioasic_r );
34DECLARE_WRITE32_HANDLER( midway_ioasic_w );
35DECLARE_READ32_HANDLER( midway_ioasic_packed_r );
36DECLARE_WRITE32_HANDLER( midway_ioasic_packed_w );
3737
3838enum
3939{
trunk/src/mame/machine/tait8741.c
r17964r17965
177177               else
178178               { /* port select */
179179                  st->parallelselect = data & 0x07;
180                  taito8741_hostdata_w(st,st->portHandler ? st->portHandler(space,st->parallelselect) : st->portName ? space.machine().root_device().ioport(st->portName)->read() : 0);
180                  taito8741_hostdata_w(st,st->portHandler ? st->portHandler(space,st->parallelselect,0xff) : st->portName ? space.machine().root_device().ioport(st->portName)->read() : 0);
181181               }
182182            }
183183         }
r17964r17965
188188         case -1: /* no command data */
189189            break;
190190         case 0x00: /* read from parallel port */
191            taito8741_hostdata_w(st,st->portHandler ? st->portHandler(space,0) : st->portName ? space.machine().root_device().ioport(st->portName)->read() : 0 );
191            taito8741_hostdata_w(st,st->portHandler ? st->portHandler(space,0,0xff) : st->portName ? space.machine().root_device().ioport(st->portName)->read() : 0 );
192192            break;
193193         case 0x01: /* read receive buffer 0 */
194194         case 0x02: /* read receive buffer 1 */
r17964r17965
201201            taito8741_hostdata_w(st,st->rxd[data-1]);
202202            break;
203203         case 0x08:   /* latch received serial data */
204            st->txd[0] = st->portHandler ? st->portHandler(space,0) : st->portName ? space.machine().root_device().ioport(st->portName)->read() : 0;
204            st->txd[0] = st->portHandler ? st->portHandler(space,0,0xff) : st->portName ? space.machine().root_device().ioport(st->portName)->read() : 0;
205205            if( sst )
206206            {
207207               space.machine().scheduler().synchronize(FUNC(taito8741_serial_tx), num);
r17964r17965
295295   switch( st->mode )
296296   {
297297   case TAITO8741_PORT: /* parallel data */
298      taito8741_hostdata_w(st,st->portHandler ? st->portHandler(space, st->parallelselect) : st->portName ? space.machine().root_device().ioport(st->portName)->read() : 0);
298      taito8741_hostdata_w(st,st->portHandler ? st->portHandler(space, st->parallelselect, 0xff) : st->portName ? space.machine().root_device().ioport(st->portName)->read() : 0);
299299      break;
300300   }
301301   return ret;
trunk/src/mame/machine/tait8741.h
r17964r17965
2828void TAITO8741_reset(int num);
2929
3030/* write handler */
31WRITE8_HANDLER( TAITO8741_0_w );
32WRITE8_HANDLER( TAITO8741_1_w );
33WRITE8_HANDLER( TAITO8741_2_w );
34WRITE8_HANDLER( TAITO8741_3_w );
31DECLARE_WRITE8_HANDLER( TAITO8741_0_w );
32DECLARE_WRITE8_HANDLER( TAITO8741_1_w );
33DECLARE_WRITE8_HANDLER( TAITO8741_2_w );
34DECLARE_WRITE8_HANDLER( TAITO8741_3_w );
3535/* read handler */
36READ8_HANDLER( TAITO8741_0_r );
37READ8_HANDLER( TAITO8741_1_r );
38READ8_HANDLER( TAITO8741_2_r );
39READ8_HANDLER( TAITO8741_3_r );
36DECLARE_READ8_HANDLER( TAITO8741_0_r );
37DECLARE_READ8_HANDLER( TAITO8741_1_r );
38DECLARE_READ8_HANDLER( TAITO8741_2_r );
39DECLARE_READ8_HANDLER( TAITO8741_3_r );
4040
4141/****************************************************************************
4242  joshi Volleyball set.
4343****************************************************************************/
4444
4545void josvolly_8741_reset(void);
46WRITE8_HANDLER( josvolly_8741_0_w );
47WRITE8_HANDLER( josvolly_8741_1_w );
48READ8_HANDLER( josvolly_8741_0_r );
49READ8_HANDLER( josvolly_8741_1_r );
50WRITE8_HANDLER( josvolly_nmi_enable_w );
46DECLARE_WRITE8_HANDLER( josvolly_8741_0_w );
47DECLARE_WRITE8_HANDLER( josvolly_8741_1_w );
48DECLARE_READ8_HANDLER( josvolly_8741_0_r );
49DECLARE_READ8_HANDLER( josvolly_8741_1_r );
50DECLARE_WRITE8_HANDLER( josvolly_nmi_enable_w );
5151
5252#endif
5353
trunk/src/mame/machine/pcecommn.h
r17964r17965
1111
1212#define   PCE_MAIN_CLOCK      21477270
1313
14WRITE8_HANDLER ( pce_joystick_w );
15 READ8_HANDLER ( pce_joystick_r );
14DECLARE_WRITE8_HANDLER ( pce_joystick_w );
15 DECLARE_READ8_HANDLER ( pce_joystick_r );
1616
1717#define TG_16_JOY_SIG      0x00
1818#define PCE_JOY_SIG         0x40
trunk/src/mame/machine/snes.c
r17964r17965
3535static void snes_hdma_init(address_space &space);
3636static void snes_hdma(address_space &space);
3737
38static READ8_HANDLER(snes_io_dma_r);
39static WRITE8_HANDLER(snes_io_dma_w);
38static DECLARE_READ8_HANDLER(snes_io_dma_r);
39static DECLARE_WRITE8_HANDLER(snes_io_dma_w);
4040
4141struct snes_cart_info snes_cart;
4242
r17964r17965
604604   // APU is mirrored from 2140 to 217f
605605   if (offset >= APU00 && offset < WMDATA)
606606   {
607//      printf("816: %02x to APU @ %d (PC=%06x)\n", data, offset & 3,space->device().safe_pc());
607//      printf("816: %02x to APU @ %d (PC=%06x)\n", data, offset & 3,space.device().safe_pc());
608608      spc_port_in(state->m_spc700, space, offset & 0x3, data);
609609      space.machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(20));
610610      return;
r17964r17965
849849   else if (address < 0x6000)                              /* I/O */
850850   {
851851      if (state->m_cart[0].mode == SNES_MODE_BSX && address >= 0x5000)
852         value = bsx_read(space, offset);
852         value = bsx_read(space, offset, mem_mask);
853853      else
854854         value = snes_r_io(space, address);
855855   }
r17964r17965
863863            value = snes_open_bus_r(space, 0);
864864      }
865865      else if (state->m_has_addon_chip == HAS_OBC1)
866         value = obc1_read(space, offset);
866         value = obc1_read(space, offset, mem_mask);
867867      else if ((state->m_cart[0].mode == SNES_MODE_21) && (state->m_has_addon_chip == HAS_DSP1) && (offset < 0x100000))
868868         value = (address < 0x7000) ? dsp_get_dr() : dsp_get_sr();
869869      else if (state->m_has_addon_chip == HAS_CX4)
r17964r17965
903903   else if (address < 0x6000)                              /* I/O */
904904   {
905905      if (state->m_cart[0].mode == SNES_MODE_BSX && address >= 0x5000)
906         value = bsx_read(space, 0x300000 + offset);
906         value = bsx_read(space, 0x300000 + offset, mem_mask);
907907      else
908908         value = snes_r_io(space, address);
909909   }
r17964r17965
917917            value = snes_open_bus_r(space, 0);
918918      }
919919      else if (state->m_has_addon_chip == HAS_OBC1)
920         value = obc1_read (space, offset);
920         value = obc1_read (space, offset, mem_mask);
921921      else if (state->m_has_addon_chip == HAS_CX4)
922922         value = CX4_read(address - 0x6000);
923923      else if (state->m_has_addon_chip == HAS_SPC7110 || state->m_has_addon_chip == HAS_SPC7110_RTC)
r17964r17965
11841184   else if (address < 0x6000)                  /* I/O */
11851185   {
11861186      if (state->m_cart[0].mode == SNES_MODE_BSX && address >= 0x5000)
1187         bsx_write(space, offset, data);
1187         bsx_write(space, offset, data, mem_mask);
11881188      else
11891189         snes_w_io(space, address, data);
11901190   }
r17964r17965
11931193      if (state->m_has_addon_chip == HAS_SUPERFX)
11941194         snes_ram[0xf00000 + (offset & 0x1fff)] = data;   // here it should be 0xe00000 but there are mirroring issues
11951195      else if (state->m_has_addon_chip == HAS_OBC1)
1196         obc1_write(space, offset, data);
1196         obc1_write(space, offset, data, mem_mask);
11971197      else if ((state->m_cart[0].mode == SNES_MODE_21) && (state->m_has_addon_chip == HAS_DSP1) && (offset < 0x100000))
11981198         dsp_set_dr(data);
11991199      else if (state->m_has_addon_chip == HAS_CX4)
r17964r17965
12351235   else if (address < 0x6000)                  /* I/O */
12361236   {
12371237      if (state->m_cart[0].mode == SNES_MODE_BSX && address >= 0x5000)
1238         bsx_write(space, 0x300000 + offset, data);
1238         bsx_write(space, 0x300000 + offset, data, mem_mask);
12391239      else
12401240         snes_w_io(space, address, data);
12411241   }
r17964r17965
12441244      if (state->m_has_addon_chip == HAS_SUPERFX)
12451245         snes_ram[0xf00000 + (offset & 0x1fff)] = data;   // here it should be 0xe00000 but there are mirroring issues
12461246      else if (state->m_has_addon_chip == HAS_OBC1)
1247         obc1_write(space, offset, data);
1247         obc1_write(space, offset, data, mem_mask);
12481248      else if (state->m_has_addon_chip == HAS_CX4)
12491249         CX4_write(space.machine(), address - 0x6000, data);
12501250      else if (state->m_has_addon_chip == HAS_SPC7110 || state->m_has_addon_chip == HAS_SPC7110_RTC)
trunk/src/mame/machine/atarigen.h
r17964r17965
213213
214214void atarigen_scanline_int_set(screen_device &screen, int scanline);
215215INTERRUPT_GEN( atarigen_scanline_int_gen );
216WRITE16_HANDLER( atarigen_scanline_int_ack_w );
217WRITE32_HANDLER( atarigen_scanline_int_ack32_w );
216DECLARE_WRITE16_HANDLER( atarigen_scanline_int_ack_w );
217DECLARE_WRITE32_HANDLER( atarigen_scanline_int_ack32_w );
218218
219219INTERRUPT_GEN( atarigen_sound_int_gen );
220WRITE16_HANDLER( atarigen_sound_int_ack_w );
221WRITE32_HANDLER( atarigen_sound_int_ack32_w );
220DECLARE_WRITE16_HANDLER( atarigen_sound_int_ack_w );
221DECLARE_WRITE32_HANDLER( atarigen_sound_int_ack32_w );
222222
223223INTERRUPT_GEN( atarigen_video_int_gen );
224WRITE16_HANDLER( atarigen_video_int_ack_w );
225WRITE32_HANDLER( atarigen_video_int_ack32_w );
224DECLARE_WRITE16_HANDLER( atarigen_video_int_ack_w );
225DECLARE_WRITE32_HANDLER( atarigen_video_int_ack32_w );
226226
227227
228228/*---------------------------------------------------------------
r17964r17965
231231
232232void atarigen_eeprom_reset(atarigen_state *state);
233233
234WRITE16_HANDLER( atarigen_eeprom_enable_w );
235WRITE16_HANDLER( atarigen_eeprom_w );
236READ16_HANDLER( atarigen_eeprom_r );
237READ16_HANDLER( atarigen_eeprom_upper_r );
234DECLARE_WRITE16_HANDLER( atarigen_eeprom_enable_w );
235DECLARE_WRITE16_HANDLER( atarigen_eeprom_w );
236DECLARE_READ16_HANDLER( atarigen_eeprom_r );
237DECLARE_READ16_HANDLER( atarigen_eeprom_upper_r );
238238
239WRITE32_HANDLER( atarigen_eeprom_enable32_w );
240WRITE32_HANDLER( atarigen_eeprom32_w );
241READ32_HANDLER( atarigen_eeprom_upper32_r );
239DECLARE_WRITE32_HANDLER( atarigen_eeprom_enable32_w );
240DECLARE_WRITE32_HANDLER( atarigen_eeprom32_w );
241DECLARE_READ32_HANDLER( atarigen_eeprom_upper32_r );
242242
243243
244244/*---------------------------------------------------------------
r17964r17965
248248void atarigen_slapstic_init(device_t *device, offs_t base, offs_t mirror, int chipnum);
249249void atarigen_slapstic_reset(atarigen_state *state);
250250
251WRITE16_HANDLER( atarigen_slapstic_w );
252READ16_HANDLER( atarigen_slapstic_r );
251DECLARE_WRITE16_HANDLER( atarigen_slapstic_w );
252DECLARE_READ16_HANDLER( atarigen_slapstic_r );
253253
254254
255255/*---------------------------------------------------------------
r17964r17965
259259void atarigen_sound_io_reset(device_t *device);
260260
261261INTERRUPT_GEN( atarigen_6502_irq_gen );
262READ8_HANDLER( atarigen_6502_irq_ack_r );
263WRITE8_HANDLER( atarigen_6502_irq_ack_w );
262DECLARE_READ8_HANDLER( atarigen_6502_irq_ack_r );
263DECLARE_WRITE8_HANDLER( atarigen_6502_irq_ack_w );
264264
265265void atarigen_ym2151_irq_gen(device_t *device, int irq);
266266
267WRITE16_HANDLER( atarigen_sound_w );
268READ16_HANDLER( atarigen_sound_r );
269WRITE16_HANDLER( atarigen_sound_upper_w );
270READ16_HANDLER( atarigen_sound_upper_r );
267DECLARE_WRITE16_HANDLER( atarigen_sound_w );
268DECLARE_READ16_HANDLER( atarigen_sound_r );
269DECLARE_WRITE16_HANDLER( atarigen_sound_upper_w );
270DECLARE_READ16_HANDLER( atarigen_sound_upper_r );
271271
272WRITE32_HANDLER( atarigen_sound_upper32_w );
273READ32_HANDLER( atarigen_sound_upper32_r );
272DECLARE_WRITE32_HANDLER( atarigen_sound_upper32_w );
273DECLARE_READ32_HANDLER( atarigen_sound_upper32_r );
274274
275275void atarigen_sound_reset(running_machine &machine);
276WRITE16_HANDLER( atarigen_sound_reset_w );
277WRITE8_HANDLER( atarigen_6502_sound_w );
278READ8_HANDLER( atarigen_6502_sound_r );
276DECLARE_WRITE16_HANDLER( atarigen_sound_reset_w );
277DECLARE_WRITE8_HANDLER( atarigen_6502_sound_w );
278DECLARE_READ8_HANDLER( atarigen_6502_sound_r );
279279
280280
281281/*---------------------------------------------------------------
r17964r17965
309309    PLAYFIELD/ALPHA MAP HELPERS
310310---------------------------------------------------------------*/
311311
312WRITE16_HANDLER( atarigen_alpha_w );
313WRITE32_HANDLER( atarigen_alpha32_w );
314WRITE16_HANDLER( atarigen_alpha2_w );
312DECLARE_WRITE16_HANDLER( atarigen_alpha_w );
313DECLARE_WRITE32_HANDLER( atarigen_alpha32_w );
314DECLARE_WRITE16_HANDLER( atarigen_alpha2_w );
315315void atarigen_set_playfield_latch(atarigen_state *state, int data);
316316void atarigen_set_playfield2_latch(atarigen_state *state, int data);
317WRITE16_HANDLER( atarigen_playfield_w );
318WRITE32_HANDLER( atarigen_playfield32_w );
319WRITE16_HANDLER( atarigen_playfield_large_w );
320WRITE16_HANDLER( atarigen_playfield_upper_w );
321WRITE16_HANDLER( atarigen_playfield_dual_upper_w );
322WRITE16_HANDLER( atarigen_playfield_latched_lsb_w );
323WRITE16_HANDLER( atarigen_playfield_latched_msb_w );
324WRITE16_HANDLER( atarigen_playfield2_w );
325WRITE16_HANDLER( atarigen_playfield2_latched_msb_w );
317DECLARE_WRITE16_HANDLER( atarigen_playfield_w );
318DECLARE_WRITE32_HANDLER( atarigen_playfield32_w );
319DECLARE_WRITE16_HANDLER( atarigen_playfield_large_w );
320DECLARE_WRITE16_HANDLER( atarigen_playfield_upper_w );
321DECLARE_WRITE16_HANDLER( atarigen_playfield_dual_upper_w );
322DECLARE_WRITE16_HANDLER( atarigen_playfield_latched_lsb_w );
323DECLARE_WRITE16_HANDLER( atarigen_playfield_latched_msb_w );
324DECLARE_WRITE16_HANDLER( atarigen_playfield2_w );
325DECLARE_WRITE16_HANDLER( atarigen_playfield2_latched_msb_w );
326326
327327
328328/*---------------------------------------------------------------
r17964r17965
332332void atarigen_scanline_timer_reset(screen_device &screen, atarigen_scanline_func update_graphics, int frequency);
333333int atarigen_get_hblank(screen_device &screen);
334334void atarigen_halt_until_hblank_0(screen_device &screen);
335WRITE16_HANDLER( atarigen_666_paletteram_w );
336WRITE16_HANDLER( atarigen_expanded_666_paletteram_w );
337WRITE32_HANDLER( atarigen_666_paletteram32_w );
335DECLARE_WRITE16_HANDLER( atarigen_666_paletteram_w );
336DECLARE_WRITE16_HANDLER( atarigen_expanded_666_paletteram_w );
337DECLARE_WRITE32_HANDLER( atarigen_666_paletteram32_w );
338338
339339
340340/*---------------------------------------------------------------
trunk/src/mame/machine/seicop.h
r17964r17965
1READ16_HANDLER( copdxbl_0_r );
2WRITE16_HANDLER( copdxbl_0_w );
1DECLARE_READ16_HANDLER( copdxbl_0_r );
2DECLARE_WRITE16_HANDLER( copdxbl_0_w );
33
4READ16_HANDLER( heatbrl_mcu_r );
5WRITE16_HANDLER( heatbrl_mcu_w );
6READ16_HANDLER( cupsoc_mcu_r );
7WRITE16_HANDLER( cupsoc_mcu_w );
8READ16_HANDLER( cupsocs_mcu_r );
9WRITE16_HANDLER( cupsocs_mcu_w );
10READ16_HANDLER( godzilla_mcu_r );
11WRITE16_HANDLER( godzilla_mcu_w );
12READ16_HANDLER( denjinmk_mcu_r );
13WRITE16_HANDLER( denjinmk_mcu_w );
14READ16_HANDLER( grainbow_mcu_r );
15WRITE16_HANDLER( grainbow_mcu_w );
16READ16_HANDLER( legionna_mcu_r );
17WRITE16_HANDLER( legionna_mcu_w );
4DECLARE_READ16_HANDLER( heatbrl_mcu_r );
5DECLARE_WRITE16_HANDLER( heatbrl_mcu_w );
6DECLARE_READ16_HANDLER( cupsoc_mcu_r );
7DECLARE_WRITE16_HANDLER( cupsoc_mcu_w );
8DECLARE_READ16_HANDLER( cupsocs_mcu_r );
9DECLARE_WRITE16_HANDLER( cupsocs_mcu_w );
10DECLARE_READ16_HANDLER( godzilla_mcu_r );
11DECLARE_WRITE16_HANDLER( godzilla_mcu_w );
12DECLARE_READ16_HANDLER( denjinmk_mcu_r );
13DECLARE_WRITE16_HANDLER( denjinmk_mcu_w );
14DECLARE_READ16_HANDLER( grainbow_mcu_r );
15DECLARE_WRITE16_HANDLER( grainbow_mcu_w );
16DECLARE_READ16_HANDLER( legionna_mcu_r );
17DECLARE_WRITE16_HANDLER( legionna_mcu_w );
1818
19READ16_HANDLER( raiden2_mcu_r );
20WRITE16_HANDLER( raiden2_mcu_w );
19DECLARE_READ16_HANDLER( raiden2_mcu_r );
20DECLARE_WRITE16_HANDLER( raiden2_mcu_w );
trunk/src/mame/machine/cdi070.h
r17964r17965
234234TIMER_CALLBACK( scc68070_timer0_callback );
235235TIMER_CALLBACK( scc68070_rx_callback );
236236TIMER_CALLBACK( scc68070_tx_callback );
237READ16_HANDLER( scc68070_periphs_r );
238WRITE16_HANDLER( scc68070_periphs_w );
239//READ16_HANDLER( uart_loopback_enable );
237DECLARE_READ16_HANDLER( scc68070_periphs_r );
238DECLARE_WRITE16_HANDLER( scc68070_periphs_w );
239//DECLARE_READ16_HANDLER( uart_loopback_enable );
240240
241241void scc68070_init(running_machine &machine, scc68070_regs_t *scc68070);
242242void scc68070_uart_rx(running_machine &machine, scc68070_regs_t *scc68070, UINT8 data);
trunk/src/mame/video/mcd212.h
r17964r17965
185185};
186186
187187// Member functions
188READ16_HANDLER( mcd212_r );
189WRITE16_HANDLER( mcd212_w );
188DECLARE_READ16_HANDLER( mcd212_r );
189DECLARE_WRITE16_HANDLER( mcd212_w );
190190TIMER_CALLBACK( mcd212_perform_scan );
191191VIDEO_START( cdimono1 );
192192SCREEN_UPDATE_RGB32( cdimono1 );
trunk/src/mame/video/ygv608.h
r17964r17965
335335VIDEO_START( ygv608 );
336336SCREEN_UPDATE_IND16( ygv608 );
337337
338READ16_HANDLER( ygv608_r );
339WRITE16_HANDLER( ygv608_w );
338DECLARE_READ16_HANDLER( ygv608_r );
339DECLARE_WRITE16_HANDLER( ygv608_w );
340340
341341// to be removed
342READ16_HANDLER( ygv608_debug_trigger );
342DECLARE_READ16_HANDLER( ygv608_debug_trigger );
343343
344344#endif
trunk/src/mame/video/gticlub.h
r17964r17965
55void K001005_init(running_machine &machine);
66void K001005_preprocess_texture_data(UINT8 *rom, int length, int gticlub);
77
8READ32_HANDLER(K001005_r);
9WRITE32_HANDLER(K001005_w);
8DECLARE_READ32_HANDLER(K001005_r);
9DECLARE_WRITE32_HANDLER(K001005_w);
1010
1111void K001006_init(running_machine &machine);
12READ32_HANDLER(K001006_0_r);
13WRITE32_HANDLER(K001006_0_w);
14READ32_HANDLER(K001006_1_r);
15WRITE32_HANDLER(K001006_1_w);
12DECLARE_READ32_HANDLER(K001006_0_r);
13DECLARE_WRITE32_HANDLER(K001006_0_w);
14DECLARE_READ32_HANDLER(K001006_1_r);
15DECLARE_WRITE32_HANDLER(K001006_1_w);
1616
1717VIDEO_START( gticlub );
1818SCREEN_UPDATE_RGB32( gticlub );
trunk/src/mame/video/vdc.h
r17964r17965
33
44VIDEO_START( pce );
55SCREEN_UPDATE_IND16( pce );
6WRITE8_HANDLER ( vdc_0_w );
7WRITE8_HANDLER ( vdc_1_w );
8 READ8_HANDLER ( vdc_0_r );
9 READ8_HANDLER ( vdc_1_r );
6DECLARE_WRITE8_HANDLER ( vdc_0_w );
7DECLARE_WRITE8_HANDLER ( vdc_1_w );
8 DECLARE_READ8_HANDLER ( vdc_0_r );
9 DECLARE_READ8_HANDLER ( vdc_1_r );
1010PALETTE_INIT( vce );
11 READ8_HANDLER ( vce_r );
12WRITE8_HANDLER ( vce_w );
13WRITE8_HANDLER( vpc_w );
14 READ8_HANDLER( vpc_r );
15WRITE8_HANDLER( sgx_vdc_w );
16 READ8_HANDLER( sgx_vdc_r );
11 DECLARE_READ8_HANDLER ( vce_r );
12DECLARE_WRITE8_HANDLER ( vce_w );
13DECLARE_WRITE8_HANDLER( vpc_w );
14 DECLARE_READ8_HANDLER( vpc_r );
15DECLARE_WRITE8_HANDLER( sgx_vdc_w );
16 DECLARE_READ8_HANDLER( sgx_vdc_r );
1717TIMER_DEVICE_CALLBACK( pce_interrupt );
1818TIMER_DEVICE_CALLBACK( sgx_interrupt );
1919
trunk/src/mame/video/atarimo.h
r17964r17965
111111int atarimo_get_yscroll(int map);
112112
113113/* read/write handlers */
114READ16_HANDLER( atarimo_0_spriteram_r );
115READ16_HANDLER( atarimo_0_slipram_r );
114DECLARE_READ16_HANDLER( atarimo_0_spriteram_r );
115DECLARE_READ16_HANDLER( atarimo_0_slipram_r );
116116
117READ16_HANDLER( atarimo_1_spriteram_r );
118READ16_HANDLER( atarimo_1_slipram_r );
117DECLARE_READ16_HANDLER( atarimo_1_spriteram_r );
118DECLARE_READ16_HANDLER( atarimo_1_slipram_r );
119119
120WRITE16_HANDLER( atarimo_0_spriteram_w );
121WRITE16_HANDLER( atarimo_0_spriteram_expanded_w );
122WRITE16_HANDLER( atarimo_0_slipram_w );
120DECLARE_WRITE16_HANDLER( atarimo_0_spriteram_w );
121DECLARE_WRITE16_HANDLER( atarimo_0_spriteram_expanded_w );
122DECLARE_WRITE16_HANDLER( atarimo_0_slipram_w );
123123
124WRITE16_HANDLER( atarimo_1_spriteram_w );
125WRITE16_HANDLER( atarimo_1_slipram_w );
124DECLARE_WRITE16_HANDLER( atarimo_1_spriteram_w );
125DECLARE_WRITE16_HANDLER( atarimo_1_slipram_w );
126126
127127void atarimo_mark_high_palette(bitmap_ind16 &bitmap, UINT16 *pf, UINT16 *mo, int x, int y);
128128
trunk/src/mame/video/segaic16.h
r17964r17965
3636void segaic16_tilemap_set_rowscroll(running_machine &machine, int which, int enable);
3737void segaic16_tilemap_set_colscroll(running_machine &machine, int which, int enable);
3838
39WRITE16_HANDLER( segaic16_tileram_0_w );
40WRITE16_HANDLER( segaic16_textram_0_w );
39DECLARE_WRITE16_HANDLER( segaic16_tileram_0_w );
40DECLARE_WRITE16_HANDLER( segaic16_textram_0_w );
4141
4242/* road systems */
4343#define SEGAIC16_MAX_ROADS         1
r17964r17965
5252
5353void segaic16_road_init(running_machine &machine, int which, int type, int colorbase1, int colorbase2, int colorbase3, int xoffs);
5454void segaic16_road_draw(int which, bitmap_ind16 &bitmap, const rectangle &cliprect, int priority);
55READ16_HANDLER( segaic16_road_control_0_r );
56WRITE16_HANDLER( segaic16_road_control_0_w );
55DECLARE_READ16_HANDLER( segaic16_road_control_0_r );
56DECLARE_WRITE16_HANDLER( segaic16_road_control_0_w );
5757
5858/* rotation systems */
5959#define SEGAIC16_MAX_ROTATE         1
r17964r17965
6262
6363void segaic16_rotate_init(running_machine &machine, int which, int type, int colorbase);
6464void segaic16_rotate_draw(running_machine &machine, int which, bitmap_ind16 &bitmap, const rectangle &cliprect, bitmap_ind16 &srcbitmap);
65READ16_HANDLER( segaic16_rotate_control_0_r );
65DECLARE_READ16_HANDLER( segaic16_rotate_control_0_r );
6666
6767/*************************************
6868 *
trunk/src/mame/video/gtia.h
r17964r17965
134134extern gtia_struct gtia;
135135
136136void gtia_init(running_machine &machine, const gtia_interface *intf);
137READ8_HANDLER( atari_gtia_r );
138WRITE8_HANDLER( atari_gtia_w );
137DECLARE_READ8_HANDLER( atari_gtia_r );
138DECLARE_WRITE8_HANDLER( atari_gtia_w );
139139
140140ANTIC_RENDERER( gtia_mode_1_32 );
141141ANTIC_RENDERER( gtia_mode_1_40 );
trunk/src/mame/video/avgdvg.h
r17964r17965
22#define __AVGDVG__
33
44CUSTOM_INPUT( avgdvg_done_r );
5WRITE8_HANDLER( avgdvg_go_w );
6WRITE8_HANDLER( avgdvg_reset_w );
7WRITE16_HANDLER( avgdvg_go_word_w );
8WRITE16_HANDLER( avgdvg_reset_word_w );
5DECLARE_WRITE8_HANDLER( avgdvg_go_w );
6DECLARE_WRITE8_HANDLER( avgdvg_reset_w );
7DECLARE_WRITE16_HANDLER( avgdvg_go_word_w );
8DECLARE_WRITE16_HANDLER( avgdvg_reset_word_w );
99
1010/* Tempest and Quantum use this capability */
1111void avg_set_flip_x(int flip);
trunk/src/mame/video/konamiic.c
r17964r17965
14791479WRITE16_HANDLER( K053246_word_w )
14801480{
14811481   if (ACCESSING_BITS_8_15)
1482      K053246_w(space, offset<<1,(data >> 8) & 0xff);
1482      K053246_w(space, offset<<1,(data >> 8) & 0xff, (mem_mask >> 8) & 0xff);
14831483   if (ACCESSING_BITS_0_7)
1484      K053246_w(space, (offset<<1) + 1,data & 0xff);
1484      K053246_w(space, (offset<<1) + 1,data & 0xff, mem_mask & 0xff);
14851485}
14861486
14871487WRITE32_HANDLER( K053246_long_w )
r17964r17965
17101710
17111711READ16_HANDLER( K054000_lsb_r )
17121712{
1713   return K054000_r(space, offset);
1713   return K054000_r(space, offset, mem_mask & 0xff);
17141714}
17151715
17161716WRITE16_HANDLER( K054000_lsb_w )
17171717{
17181718   if (ACCESSING_BITS_0_7)
1719      K054000_w(space, offset, data & 0xff);
1719      K054000_w(space, offset, data & 0xff, mem_mask & 0xff);
17201720}
17211721
17221722
trunk/src/mame/video/konamiic.h
r17964r17965
55
66void K055673_vh_start(running_machine &machine, const char *gfx_memory_region, int alt_layout, int dx, int dy,
77      void (*callback)(running_machine &machine, int *code,int *color,int *priority));
8READ16_HANDLER( K055673_rom_word_r );
9READ16_HANDLER( K055673_GX6bpp_rom_word_r );
8DECLARE_READ16_HANDLER( K055673_rom_word_r );
9DECLARE_READ16_HANDLER( K055673_GX6bpp_rom_word_r );
1010
1111/*
1212Callback procedures for non-standard shadows:
r17964r17965
1818#define K053247_CUSTOMSHADOW   0x20000000
1919#define K053247_SHDSHIFT      20
2020
21READ16_HANDLER( K053247_word_r );
22WRITE16_HANDLER( K053247_word_w );
23READ32_HANDLER( K053247_long_r );
24WRITE32_HANDLER( K053247_long_w );
25WRITE16_HANDLER( K053247_reg_word_w ); // "OBJSET2" registers
26WRITE32_HANDLER( K053247_reg_long_w );
21DECLARE_READ16_HANDLER( K053247_word_r );
22DECLARE_WRITE16_HANDLER( K053247_word_w );
23DECLARE_READ32_HANDLER( K053247_long_r );
24DECLARE_WRITE32_HANDLER( K053247_long_w );
25DECLARE_WRITE16_HANDLER( K053247_reg_word_w ); // "OBJSET2" registers
26DECLARE_WRITE32_HANDLER( K053247_reg_long_w );
2727
2828int K053247_read_register(int regnum);
2929void K053247_set_SpriteOffset(int offsx, int offsy);
3030void K053247_export_config(UINT16 **ram, gfx_element **gfx, void (**callback)(running_machine &, int *, int *, int *), int *dx, int *dy);
3131
32WRITE16_HANDLER( K053246_word_w );
33WRITE32_HANDLER( K053246_long_w );
32DECLARE_WRITE16_HANDLER( K053246_word_w );
33DECLARE_WRITE32_HANDLER( K053246_long_w );
3434void K053246_set_OBJCHA_line(int state);
3535int K053246_is_IRQ_enabled(void);
3636int K053246_read_register(int regnum);
r17964r17965
4747  when some palette index changes. If ALL_TILEMAPS is too expensive, use
4848  K053251_set_tilemaps() to indicate which tilemap is associated with each index.
4949 */
50WRITE8_HANDLER( K053251_w );
51WRITE16_HANDLER( K053251_lsb_w );
52WRITE16_HANDLER( K053251_msb_w );
50DECLARE_WRITE8_HANDLER( K053251_w );
51DECLARE_WRITE16_HANDLER( K053251_lsb_w );
52DECLARE_WRITE16_HANDLER( K053251_msb_w );
5353enum { K053251_CI0=0,K053251_CI1,K053251_CI2,K053251_CI3,K053251_CI4 };
5454int K053251_get_priority(int ci);
5555int K053251_get_palette_index(int ci);
r17964r17965
5757void K053251_vh_start(running_machine &machine);
5858
5959
60WRITE16_HANDLER( K054000_lsb_w );
61READ16_HANDLER( K054000_lsb_r );
60DECLARE_WRITE16_HANDLER( K054000_lsb_w );
61DECLARE_READ16_HANDLER( K054000_lsb_r );
6262
6363
6464#define K056382_DRAW_FLAG_FORCE_XYSCROLL      0x00800000
r17964r17965
6767         int (*scrolld)[4][2],
6868         void (*callback)(running_machine &machine, int layer, int *code, int *color, int *flags),
6969         int djmain_hack);
70READ16_HANDLER( K056832_ram_word_r );
71WRITE16_HANDLER( K056832_ram_word_w );
72READ32_HANDLER( K056832_5bpp_rom_long_r );
73READ32_HANDLER( K056832_6bpp_rom_long_r );
74READ16_HANDLER( K056832_mw_rom_word_r );
75WRITE16_HANDLER( K056832_word_w ); // "VRAM" registers
76WRITE16_HANDLER( K056832_b_word_w );
70DECLARE_READ16_HANDLER( K056832_ram_word_r );
71DECLARE_WRITE16_HANDLER( K056832_ram_word_w );
72DECLARE_READ32_HANDLER( K056832_5bpp_rom_long_r );
73DECLARE_READ32_HANDLER( K056832_6bpp_rom_long_r );
74DECLARE_READ16_HANDLER( K056832_mw_rom_word_r );
75DECLARE_WRITE16_HANDLER( K056832_word_w ); // "VRAM" registers
76DECLARE_WRITE16_HANDLER( K056832_b_word_w );
7777void K056832_mark_plane_dirty(int num);
7878void K056832_MarkAllTilemapsDirty(void);
7979void K056832_tilemap_draw(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect, int num, UINT32 flags, UINT32 priority);
r17964r17965
8181void K056832_set_LayerOffset(int layer, int offsx, int offsy);
8282void K056832_set_UpdateMode(int mode);
8383
84READ32_HANDLER( K056832_ram_long_r );
85WRITE32_HANDLER( K056832_ram_long_w );
86WRITE32_HANDLER( K056832_long_w );
87WRITE32_HANDLER( K056832_b_long_w );
84DECLARE_READ32_HANDLER( K056832_ram_long_r );
85DECLARE_WRITE32_HANDLER( K056832_ram_long_w );
86DECLARE_WRITE32_HANDLER( K056832_long_w );
87DECLARE_WRITE32_HANDLER( K056832_b_long_w );
8888
8989/* bit depths for the 56832 */
9090#define K056832_BPP_4   0
r17964r17965
9797
9898void K055555_vh_start(running_machine &machine); // "PCU2"
9999void K055555_write_reg(UINT8 regnum, UINT8 regdat);
100WRITE16_HANDLER( K055555_word_w );
101WRITE32_HANDLER( K055555_long_w );
100DECLARE_WRITE16_HANDLER( K055555_word_w );
101DECLARE_WRITE32_HANDLER( K055555_long_w );
102102int K055555_read_register(int regnum);
103103int K055555_get_palette_index(int idx);
104104
r17964r17965
169169
170170/* K054338 mixer/alpha blender */
171171void K054338_vh_start(running_machine &machine);
172WRITE16_HANDLER( K054338_word_w ); // "CLCT" registers
173WRITE32_HANDLER( K054338_long_w );
172DECLARE_WRITE16_HANDLER( K054338_word_w ); // "CLCT" registers
173DECLARE_WRITE32_HANDLER( K054338_long_w );
174174int K054338_read_register(int reg);
175175void K054338_update_all_shadows(running_machine &machine, int rushingheroes_hack);         // called at the beginning of SCREEN_UPDATE()
176176void K054338_fill_solid_bg(bitmap_ind16 &bitmap);            // solid backcolor fill
r17964r17965
194194#define K338_CTL_CLIPSL      0x20
195195
196196// K053252 CRT and interrupt control unit
197WRITE16_HANDLER( K053252_word_w );
197DECLARE_WRITE16_HANDLER( K053252_word_w );
198198
trunk/src/mame/video/konicdev.h
r17964r17965
820820
821821#if 0 // to be moved in the specific drivers!
822822/* special handling for the chips sharing address space */
823READ8_HANDLER( k052109_051960_r );
824WRITE8_HANDLER( k052109_051960_w );
823DECLARE_READ8_HANDLER( k052109_051960_r );
824DECLARE_WRITE8_HANDLER( k052109_051960_w );
825825#endif
826826
827827
trunk/src/mame/includes/copsnrob.h
r17964r17965
4141
4242/*----------- defined in machine/copsnrob.c -----------*/
4343
44READ8_HANDLER( copsnrob_gun_position_r );
44DECLARE_READ8_HANDLER( copsnrob_gun_position_r );
4545
4646
4747/*----------- defined in video/copsnrob.c -----------*/
trunk/src/mame/includes/galpani2.h
r17964r17965
5959
6060SCREEN_UPDATE_IND16( galpani2 );
6161
62WRITE16_HANDLER( galpani2_palette_0_w );
63WRITE16_HANDLER( galpani2_palette_1_w );
62DECLARE_WRITE16_HANDLER( galpani2_palette_0_w );
63DECLARE_WRITE16_HANDLER( galpani2_palette_1_w );
6464
65WRITE16_HANDLER( galpani2_bg8_0_w );
66WRITE16_HANDLER( galpani2_bg8_1_w );
65DECLARE_WRITE16_HANDLER( galpani2_bg8_0_w );
66DECLARE_WRITE16_HANDLER( galpani2_bg8_1_w );
6767
68WRITE16_HANDLER( galpani2_bg15_w );
68DECLARE_WRITE16_HANDLER( galpani2_bg15_w );
trunk/src/mame/includes/megadriv.h
r17964r17965
6969
7070
7171/* These handlers are needed by megaplay.c */
72extern READ16_HANDLER( megadriv_68k_io_read );
73extern WRITE16_HANDLER( megadriv_68k_io_write );
72extern DECLARE_READ16_HANDLER( megadriv_68k_io_read );
73extern DECLARE_WRITE16_HANDLER( megadriv_68k_io_write );
7474
7575/* These handlers are needed by puckpkmn.c for his memory map */
7676extern DECLARE_READ8_DEVICE_HANDLER( megadriv_68k_YM2612_read);
r17964r17965
472472/*----------- defined in drivers/megadriv.c -----------*/
473473
474474/* These are needed to handle J-Cart inputs */
475extern WRITE16_HANDLER( jcart_ctrl_w );
476extern READ16_HANDLER( jcart_ctrl_r );
475extern DECLARE_WRITE16_HANDLER( jcart_ctrl_w );
476extern DECLARE_READ16_HANDLER( jcart_ctrl_r );
477477
478478/* machine/megavdp.c */
479479extern UINT16 (*vdp_get_word_from_68k_mem)(running_machine &machine, UINT32 source, address_space* space);
trunk/src/mame/includes/amiga.h
r17964r17965
447447
448448
449449
450READ16_HANDLER( amiga_cia_r );
451WRITE16_HANDLER( amiga_cia_w );
450DECLARE_READ16_HANDLER( amiga_cia_r );
451DECLARE_WRITE16_HANDLER( amiga_cia_w );
452452
453READ16_HANDLER( amiga_custom_r );
454WRITE16_HANDLER( amiga_custom_w );
453DECLARE_READ16_HANDLER( amiga_custom_r );
454DECLARE_WRITE16_HANDLER( amiga_custom_w );
455455
456456void amiga_serial_in_w(running_machine &machine, UINT16 data);
457457attotime amiga_get_serial_char_period(running_machine &machine);
458458
459459void amiga_add_autoconfig(running_machine &machine, const amiga_autoconfig_device *device);
460READ16_HANDLER( amiga_autoconfig_r );
461WRITE16_HANDLER( amiga_autoconfig_w );
460DECLARE_READ16_HANDLER( amiga_autoconfig_r );
461DECLARE_WRITE16_HANDLER( amiga_autoconfig_w );
462462
463463void amiga_cia_0_irq(device_t *device, int state);
464464void amiga_cia_1_irq(device_t *device, int state);
trunk/src/mame/includes/deco32.h
r17964r17965
152152SCREEN_UPDATE_RGB32( nslasher );
153153
154154
155WRITE32_HANDLER( deco32_pf1_data_w );
156WRITE32_HANDLER( deco32_pf2_data_w );
157WRITE32_HANDLER( deco32_pf3_data_w );
158WRITE32_HANDLER( deco32_pf4_data_w );
155DECLARE_WRITE32_HANDLER( deco32_pf1_data_w );
156DECLARE_WRITE32_HANDLER( deco32_pf2_data_w );
157DECLARE_WRITE32_HANDLER( deco32_pf3_data_w );
158DECLARE_WRITE32_HANDLER( deco32_pf4_data_w );
159159
160160
trunk/src/mame/includes/midzeus.h
r17964r17965
7070
7171SCREEN_UPDATE_RGB32( midzeus2 );
7272
73READ32_HANDLER( zeus2_r );
74WRITE32_HANDLER( zeus2_w );
73DECLARE_READ32_HANDLER( zeus2_r );
74DECLARE_WRITE32_HANDLER( zeus2_w );
7575
trunk/src/mame/includes/fastfred.h
r17964r17965
6868
6969
7070
71WRITE8_HANDLER( fastfred_videoram_w );
72WRITE8_HANDLER( fastfred_attributes_w );
73WRITE8_HANDLER( fastfred_charbank1_w );
74WRITE8_HANDLER( fastfred_charbank2_w );
75WRITE8_HANDLER( fastfred_colorbank1_w );
76WRITE8_HANDLER( fastfred_colorbank2_w );
77WRITE8_HANDLER( fastfred_flip_screen_x_w );
78WRITE8_HANDLER( fastfred_flip_screen_y_w );
71DECLARE_WRITE8_HANDLER( fastfred_videoram_w );
72DECLARE_WRITE8_HANDLER( fastfred_attributes_w );
73DECLARE_WRITE8_HANDLER( fastfred_charbank1_w );
74DECLARE_WRITE8_HANDLER( fastfred_charbank2_w );
75DECLARE_WRITE8_HANDLER( fastfred_colorbank1_w );
76DECLARE_WRITE8_HANDLER( fastfred_colorbank2_w );
77DECLARE_WRITE8_HANDLER( fastfred_flip_screen_x_w );
78DECLARE_WRITE8_HANDLER( fastfred_flip_screen_y_w );
7979SCREEN_UPDATE_IND16( fastfred );
8080
8181
8282SCREEN_UPDATE_IND16( imago );
83WRITE8_HANDLER( imago_fg_videoram_w );
84WRITE8_HANDLER( imago_charbank_w );
83DECLARE_WRITE8_HANDLER( imago_fg_videoram_w );
84DECLARE_WRITE8_HANDLER( imago_charbank_w );
trunk/src/mame/includes/galpanic.h
r17964r17965
3030/*----------- defined in video/galpanic.c -----------*/
3131
3232
33WRITE16_HANDLER( galpanic_bgvideoram_w );
34WRITE16_HANDLER( galpanic_paletteram_w );
33DECLARE_WRITE16_HANDLER( galpanic_bgvideoram_w );
34DECLARE_WRITE16_HANDLER( galpanic_paletteram_w );
3535
3636SCREEN_UPDATE_IND16( galpanic );
3737SCREEN_UPDATE_IND16( comad );
trunk/src/mame/includes/psx.h
r17964r17965
2525
2626// mame/machine/psx.c
2727extern void psx_driver_init( running_machine &machine );
28WRITE32_HANDLER( psx_com_delay_w );
29READ32_HANDLER( psx_com_delay_r );
28DECLARE_WRITE32_HANDLER( psx_com_delay_w );
29DECLARE_READ32_HANDLER( psx_com_delay_r );
3030extern void psx_irq_set( running_machine &, UINT32 );
3131extern void psx_sio_install_handler( running_machine &, int, psx_sio_handler );
3232extern void psx_sio_input( running_machine &, int, int, int );
3333
34READ32_HANDLER( psx_gpu_r );
35WRITE32_HANDLER( psx_gpu_w );
34DECLARE_READ32_HANDLER( psx_gpu_r );
35DECLARE_WRITE32_HANDLER( psx_gpu_w );
3636extern void psx_lightgun_set( running_machine &, int, int );
3737
3838// emu/video/psx.c
trunk/src/mame/includes/gauntlet.h
r17964r17965
3535
3636/*----------- defined in video/gauntlet.c -----------*/
3737
38WRITE16_HANDLER( gauntlet_xscroll_w );
39WRITE16_HANDLER( gauntlet_yscroll_w );
38DECLARE_WRITE16_HANDLER( gauntlet_xscroll_w );
39DECLARE_WRITE16_HANDLER( gauntlet_yscroll_w );
4040
4141
4242SCREEN_UPDATE_IND16( gauntlet );
trunk/src/mame/includes/actfancr.h
r17964r17965
3838
3939/*----------- defined in video/actfancr.c -----------*/
4040
41WRITE8_HANDLER( actfancr_pf1_data_w );
42READ8_HANDLER( actfancr_pf1_data_r );
43WRITE8_HANDLER( actfancr_pf1_control_w );
44WRITE8_HANDLER( actfancr_pf2_data_w );
45READ8_HANDLER( actfancr_pf2_data_r );
46WRITE8_HANDLER( actfancr_pf2_control_w );
41DECLARE_WRITE8_HANDLER( actfancr_pf1_data_w );
42DECLARE_READ8_HANDLER( actfancr_pf1_data_r );
43DECLARE_WRITE8_HANDLER( actfancr_pf1_control_w );
44DECLARE_WRITE8_HANDLER( actfancr_pf2_data_w );
45DECLARE_READ8_HANDLER( actfancr_pf2_data_r );
46DECLARE_WRITE8_HANDLER( actfancr_pf2_control_w );
4747
4848
4949SCREEN_UPDATE_IND16( actfancr );
trunk/src/mame/includes/avalnche.h
r17964r17965
3434DECLARE_WRITE8_DEVICE_HANDLER( avalnche_attract_enable_w );
3535DECLARE_WRITE8_DEVICE_HANDLER( avalnche_audio_w );
3636
37WRITE8_HANDLER( catch_audio_w );
37DECLARE_WRITE8_HANDLER( catch_audio_w );
trunk/src/mame/includes/itech8.h
r17964r17965
9999
100100/*----------- defined in machine/slikshot.c -----------*/
101101
102READ8_HANDLER( slikz80_port_r );
103WRITE8_HANDLER( slikz80_port_w );
102DECLARE_READ8_HANDLER( slikz80_port_r );
103DECLARE_WRITE8_HANDLER( slikz80_port_w );
104104
105READ8_HANDLER( slikshot_z80_r );
106READ8_HANDLER( slikshot_z80_control_r );
107WRITE8_HANDLER( slikshot_z80_control_w );
105DECLARE_READ8_HANDLER( slikshot_z80_r );
106DECLARE_READ8_HANDLER( slikshot_z80_control_r );
107DECLARE_WRITE8_HANDLER( slikshot_z80_control_w );
108108
109109
110110SCREEN_UPDATE_RGB32( slikshot );
trunk/src/mame/includes/dc.h
r17964r17965
100100
101101/*----------- defined in machine/dc.c -----------*/
102102
103READ64_HANDLER( pvr_ctrl_r );
104WRITE64_HANDLER( pvr_ctrl_w );
103DECLARE_READ64_HANDLER( pvr_ctrl_r );
104DECLARE_WRITE64_HANDLER( pvr_ctrl_w );
105105
106READ64_HANDLER( dc_sysctrl_r );
107WRITE64_HANDLER( dc_sysctrl_w );
108READ64_HANDLER( dc_gdrom_r );
109WRITE64_HANDLER( dc_gdrom_w );
110READ64_HANDLER( dc_g1_ctrl_r );
111WRITE64_HANDLER( dc_g1_ctrl_w );
112READ64_HANDLER( dc_g2_ctrl_r );
113WRITE64_HANDLER( dc_g2_ctrl_w );
114READ64_HANDLER( dc_modem_r );
115WRITE64_HANDLER( dc_modem_w );
116READ64_HANDLER( dc_rtc_r );
117WRITE64_HANDLER( dc_rtc_w );
106DECLARE_READ64_HANDLER( dc_sysctrl_r );
107DECLARE_WRITE64_HANDLER( dc_sysctrl_w );
108DECLARE_READ64_HANDLER( dc_gdrom_r );
109DECLARE_WRITE64_HANDLER( dc_gdrom_w );
110DECLARE_READ64_HANDLER( dc_g1_ctrl_r );
111DECLARE_WRITE64_HANDLER( dc_g1_ctrl_w );
112DECLARE_READ64_HANDLER( dc_g2_ctrl_r );
113DECLARE_WRITE64_HANDLER( dc_g2_ctrl_w );
114DECLARE_READ64_HANDLER( dc_modem_r );
115DECLARE_WRITE64_HANDLER( dc_modem_w );
116DECLARE_READ64_HANDLER( dc_rtc_r );
117DECLARE_WRITE64_HANDLER( dc_rtc_w );
118118DECLARE_READ64_DEVICE_HANDLER( dc_aica_reg_r );
119119DECLARE_WRITE64_DEVICE_HANDLER( dc_aica_reg_w );
120120
r17964r17965
296296extern UINT64 *pvr2_framebuffer_ram;
297297extern UINT64 *elan_ram;
298298
299READ64_HANDLER( pvr_ta_r );
300WRITE64_HANDLER( pvr_ta_w );
301READ64_HANDLER( pvr2_ta_r );
302WRITE64_HANDLER( pvr2_ta_w );
303READ64_HANDLER( pvrs_ta_r );
304WRITE64_HANDLER( pvrs_ta_w );
305READ32_HANDLER( elan_regs_r );
306WRITE32_HANDLER( elan_regs_w );
307WRITE64_HANDLER( ta_fifo_poly_w );
308WRITE64_HANDLER( ta_fifo_yuv_w );
299DECLARE_READ64_HANDLER( pvr_ta_r );
300DECLARE_WRITE64_HANDLER( pvr_ta_w );
301DECLARE_READ64_HANDLER( pvr2_ta_r );
302DECLARE_WRITE64_HANDLER( pvr2_ta_w );
303DECLARE_READ64_HANDLER( pvrs_ta_r );
304DECLARE_WRITE64_HANDLER( pvrs_ta_w );
305DECLARE_READ32_HANDLER( elan_regs_r );
306DECLARE_WRITE32_HANDLER( elan_regs_w );
307DECLARE_WRITE64_HANDLER( ta_fifo_poly_w );
308DECLARE_WRITE64_HANDLER( ta_fifo_yuv_w );
309309
310310SCREEN_UPDATE_RGB32(dc);
311311
trunk/src/mame/includes/scramble.h
r17964r17965
6666
6767
6868
69READ8_HANDLER( triplep_pip_r );
70READ8_HANDLER( triplep_pap_r );
69DECLARE_READ8_HANDLER( triplep_pip_r );
70DECLARE_READ8_HANDLER( triplep_pap_r );
7171
72READ8_HANDLER( hunchbks_mirror_r );
73WRITE8_HANDLER( hunchbks_mirror_w );
72DECLARE_READ8_HANDLER( hunchbks_mirror_r );
73DECLARE_WRITE8_HANDLER( hunchbks_mirror_w );
7474
7575DECLARE_READ8_DEVICE_HANDLER( scramble_protection_r );
7676DECLARE_WRITE8_DEVICE_HANDLER( scramble_protection_w );
trunk/src/mame/includes/targ.h
r17964r17965
77
88/*----------- defined in audio/targ.c -----------*/
99
10WRITE8_HANDLER( targ_audio_1_w );
11WRITE8_HANDLER( targ_audio_2_w );
12WRITE8_HANDLER( spectar_audio_2_w );
10DECLARE_WRITE8_HANDLER( targ_audio_1_w );
11DECLARE_WRITE8_HANDLER( targ_audio_2_w );
12DECLARE_WRITE8_HANDLER( spectar_audio_2_w );
1313
1414MACHINE_CONFIG_EXTERN( spectar_audio );
1515MACHINE_CONFIG_EXTERN( targ_audio );
trunk/src/mame/includes/skullxbo.h
r17964r17965
2525
2626/*----------- defined in video/skullxbo.c -----------*/
2727
28WRITE16_HANDLER( skullxbo_playfieldlatch_w );
29WRITE16_HANDLER( skullxbo_xscroll_w );
30WRITE16_HANDLER( skullxbo_yscroll_w );
31WRITE16_HANDLER( skullxbo_mobmsb_w );
28DECLARE_WRITE16_HANDLER( skullxbo_playfieldlatch_w );
29DECLARE_WRITE16_HANDLER( skullxbo_xscroll_w );
30DECLARE_WRITE16_HANDLER( skullxbo_yscroll_w );
31DECLARE_WRITE16_HANDLER( skullxbo_mobmsb_w );
3232
3333
3434SCREEN_UPDATE_IND16( skullxbo );
trunk/src/mame/includes/snes.h
r17964r17965
595595extern MACHINE_START( snes );
596596extern MACHINE_RESET( snes );
597597
598READ8_HANDLER( snes_open_bus_r );
598DECLARE_READ8_HANDLER( snes_open_bus_r );
599599
600extern READ8_HANDLER( snes_r_io );
601extern WRITE8_HANDLER( snes_w_io );
600extern DECLARE_READ8_HANDLER( snes_r_io );
601extern DECLARE_WRITE8_HANDLER( snes_w_io );
602602
603extern READ8_HANDLER( snes_r_bank1 );
604extern READ8_HANDLER( snes_r_bank2 );
605extern READ8_HANDLER( snes_r_bank3 );
606extern READ8_HANDLER( snes_r_bank4 );
607extern READ8_HANDLER( snes_r_bank5 );
608extern READ8_HANDLER( snes_r_bank6 );
609extern READ8_HANDLER( snes_r_bank7 );
610extern WRITE8_HANDLER( snes_w_bank1 );
611extern WRITE8_HANDLER( snes_w_bank2 );
612extern WRITE8_HANDLER( snes_w_bank4 );
613extern WRITE8_HANDLER( snes_w_bank5 );
614extern WRITE8_HANDLER( snes_w_bank6 );
615extern WRITE8_HANDLER( snes_w_bank7 );
603extern DECLARE_READ8_HANDLER( snes_r_bank1 );
604extern DECLARE_READ8_HANDLER( snes_r_bank2 );
605extern DECLARE_READ8_HANDLER( snes_r_bank3 );
606extern DECLARE_READ8_HANDLER( snes_r_bank4 );
607extern DECLARE_READ8_HANDLER( snes_r_bank5 );
608extern DECLARE_READ8_HANDLER( snes_r_bank6 );
609extern DECLARE_READ8_HANDLER( snes_r_bank7 );
610extern DECLARE_WRITE8_HANDLER( snes_w_bank1 );
611extern DECLARE_WRITE8_HANDLER( snes_w_bank2 );
612extern DECLARE_WRITE8_HANDLER( snes_w_bank4 );
613extern DECLARE_WRITE8_HANDLER( snes_w_bank5 );
614extern DECLARE_WRITE8_HANDLER( snes_w_bank6 );
615extern DECLARE_WRITE8_HANDLER( snes_w_bank7 );
616616
617extern READ8_HANDLER( superfx_r_bank1 );
618extern READ8_HANDLER( superfx_r_bank2 );
619extern READ8_HANDLER( superfx_r_bank3 );
620extern WRITE8_HANDLER( superfx_w_bank1 );
621extern WRITE8_HANDLER( superfx_w_bank2 );
622extern WRITE8_HANDLER( superfx_w_bank3 );
617extern DECLARE_READ8_HANDLER( superfx_r_bank1 );
618extern DECLARE_READ8_HANDLER( superfx_r_bank2 );
619extern DECLARE_READ8_HANDLER( superfx_r_bank3 );
620extern DECLARE_WRITE8_HANDLER( superfx_w_bank1 );
621extern DECLARE_WRITE8_HANDLER( superfx_w_bank2 );
622extern DECLARE_WRITE8_HANDLER( superfx_w_bank3 );
623623
624624WRITE_LINE_DEVICE_HANDLER( snes_extern_irq_w );
625625
r17964r17965
745745extern VIDEO_START( snes );
746746extern SCREEN_UPDATE_RGB32( snes );
747747
748extern READ8_HANDLER( snes_ppu_read );
749extern WRITE8_HANDLER( snes_ppu_write );
748extern DECLARE_READ8_HANDLER( snes_ppu_read );
749extern DECLARE_WRITE8_HANDLER( snes_ppu_write );
750750
751751#endif /* _SNES_H_ */
trunk/src/mame/includes/vicdual.h
r17964r17965
9696
9797MACHINE_CONFIG_EXTERN( frogs_audio );
9898MACHINE_CONFIG_EXTERN( headon_audio );
99WRITE8_HANDLER( frogs_audio_w );
100WRITE8_HANDLER( headon_audio_w );
101WRITE8_HANDLER( invho2_audio_w );
99DECLARE_WRITE8_HANDLER( frogs_audio_w );
100DECLARE_WRITE8_HANDLER( headon_audio_w );
101DECLARE_WRITE8_HANDLER( invho2_audio_w );
102102
103103
104104/*----------- defined in audio/depthch.c -----------*/
105105
106106MACHINE_CONFIG_EXTERN( depthch_audio );
107WRITE8_HANDLER( depthch_audio_w );
107DECLARE_WRITE8_HANDLER( depthch_audio_w );
108108
109109
110110/*----------- defined in audio/carnival.c -----------*/
111111
112112MACHINE_CONFIG_EXTERN( carnival_audio );
113WRITE8_HANDLER( carnival_audio_1_w );
114WRITE8_HANDLER( carnival_audio_2_w );
113DECLARE_WRITE8_HANDLER( carnival_audio_1_w );
114DECLARE_WRITE8_HANDLER( carnival_audio_2_w );
115115
116116
117117/*----------- defined in audio/invinco.c -----------*/
118118
119119MACHINE_CONFIG_EXTERN( invinco_audio );
120WRITE8_HANDLER( invinco_audio_w );
120DECLARE_WRITE8_HANDLER( invinco_audio_w );
121121
122122
123123/*----------- defined in audio/pulsar.c -----------*/
124124
125125MACHINE_CONFIG_EXTERN( pulsar_audio );
126WRITE8_HANDLER( pulsar_audio_1_w );
127WRITE8_HANDLER( pulsar_audio_2_w );
126DECLARE_WRITE8_HANDLER( pulsar_audio_1_w );
127DECLARE_WRITE8_HANDLER( pulsar_audio_2_w );
trunk/src/mame/includes/atarisy1.h
r17964r17965
7373TIMER_DEVICE_CALLBACK( atarisy1_int3off_callback );
7474TIMER_DEVICE_CALLBACK( atarisy1_reset_yscroll_callback );
7575
76READ16_HANDLER( atarisy1_int3state_r );
76DECLARE_READ16_HANDLER( atarisy1_int3state_r );
7777
78WRITE16_HANDLER( atarisy1_spriteram_w );
79WRITE16_HANDLER( atarisy1_bankselect_w );
80WRITE16_HANDLER( atarisy1_xscroll_w );
81WRITE16_HANDLER( atarisy1_yscroll_w );
82WRITE16_HANDLER( atarisy1_priority_w );
78DECLARE_WRITE16_HANDLER( atarisy1_spriteram_w );
79DECLARE_WRITE16_HANDLER( atarisy1_bankselect_w );
80DECLARE_WRITE16_HANDLER( atarisy1_xscroll_w );
81DECLARE_WRITE16_HANDLER( atarisy1_yscroll_w );
82DECLARE_WRITE16_HANDLER( atarisy1_priority_w );
8383
8484
8585SCREEN_UPDATE_IND16( atarisy1 );
trunk/src/mame/includes/dec0.h
r17964r17965
119119
120120/*----------- defined in machine/dec0.c -----------*/
121121
122READ16_HANDLER( slyspy_controls_r );
122DECLARE_READ16_HANDLER( slyspy_controls_r );
123123
124124
125125extern void dec0_i8751_write(running_machine &machine, int data);
trunk/src/mame/includes/atarig42.h
r17964r17965
6161SCREEN_VBLANK( atarig42 );
6262SCREEN_UPDATE_IND16( atarig42 );
6363
64WRITE16_HANDLER( atarig42_mo_control_w );
64DECLARE_WRITE16_HANDLER( atarig42_mo_control_w );
6565
6666void atarig42_scanline_update(screen_device &screen, int scanline);
6767
trunk/src/mame/includes/vindictr.h
r17964r17965
2727
2828/*----------- defined in video/vindictr.c -----------*/
2929
30WRITE16_HANDLER( vindictr_paletteram_w );
30DECLARE_WRITE16_HANDLER( vindictr_paletteram_w );
3131
3232
3333SCREEN_UPDATE_IND16( vindictr );
trunk/src/mame/includes/nb1413m3.h
r17964r17965
122122/*----------- defined in machine/nb1413m3.c -----------*/
123123
124124MACHINE_RESET( nb1413m3 );
125WRITE8_HANDLER( nb1413m3_nmi_clock_w );
125DECLARE_WRITE8_HANDLER( nb1413m3_nmi_clock_w );
126126INTERRUPT_GEN( nb1413m3_interrupt );
127READ8_HANDLER( nb1413m3_sndrom_r );
128WRITE8_HANDLER( nb1413m3_sndrombank1_w );
129WRITE8_HANDLER( nb1413m3_sndrombank2_w );
130READ8_HANDLER( nb1413m3_gfxrom_r );
131WRITE8_HANDLER( nb1413m3_gfxrombank_w );
132WRITE8_HANDLER( nb1413m3_gfxradr_l_w );
133WRITE8_HANDLER( nb1413m3_gfxradr_h_w );
134WRITE8_HANDLER( nb1413m3_inputportsel_w );
135READ8_HANDLER( nb1413m3_inputport0_r );
136READ8_HANDLER( nb1413m3_inputport1_r );
137READ8_HANDLER( nb1413m3_inputport2_r );
138READ8_HANDLER( nb1413m3_inputport3_r );
139READ8_HANDLER( nb1413m3_dipsw1_r );
140READ8_HANDLER( nb1413m3_dipsw2_r );
141READ8_HANDLER( nb1413m3_dipsw3_l_r );
142READ8_HANDLER( nb1413m3_dipsw3_h_r );
143WRITE8_HANDLER( nb1413m3_outcoin_w );
144WRITE8_HANDLER( nb1413m3_vcrctrl_w );
127DECLARE_READ8_HANDLER( nb1413m3_sndrom_r );
128DECLARE_WRITE8_HANDLER( nb1413m3_sndrombank1_w );
129DECLARE_WRITE8_HANDLER( nb1413m3_sndrombank2_w );
130DECLARE_READ8_HANDLER( nb1413m3_gfxrom_r );
131DECLARE_WRITE8_HANDLER( nb1413m3_gfxrombank_w );
132DECLARE_WRITE8_HANDLER( nb1413m3_gfxradr_l_w );
133DECLARE_WRITE8_HANDLER( nb1413m3_gfxradr_h_w );
134DECLARE_WRITE8_HANDLER( nb1413m3_inputportsel_w );
135DECLARE_READ8_HANDLER( nb1413m3_inputport0_r );
136DECLARE_READ8_HANDLER( nb1413m3_inputport1_r );
137DECLARE_READ8_HANDLER( nb1413m3_inputport2_r );
138DECLARE_READ8_HANDLER( nb1413m3_inputport3_r );
139DECLARE_READ8_HANDLER( nb1413m3_dipsw1_r );
140DECLARE_READ8_HANDLER( nb1413m3_dipsw2_r );
141DECLARE_READ8_HANDLER( nb1413m3_dipsw3_l_r );
142DECLARE_READ8_HANDLER( nb1413m3_dipsw3_h_r );
143DECLARE_WRITE8_HANDLER( nb1413m3_outcoin_w );
144DECLARE_WRITE8_HANDLER( nb1413m3_vcrctrl_w );
145145CUSTOM_INPUT( nb1413m3_busyflag_r );
146146CUSTOM_INPUT( nb1413m3_outcoin_flag_r );
147147
trunk/src/mame/includes/atarisy2.h
r17964r17965
8383
8484/*----------- defined in video/atarisy2.c -----------*/
8585
86READ16_HANDLER( atarisy2_slapstic_r );
87READ16_HANDLER( atarisy2_videoram_r );
86DECLARE_READ16_HANDLER( atarisy2_slapstic_r );
87DECLARE_READ16_HANDLER( atarisy2_videoram_r );
8888
89WRITE16_HANDLER( atarisy2_slapstic_w );
90WRITE16_HANDLER( atarisy2_yscroll_w );
91WRITE16_HANDLER( atarisy2_xscroll_w );
92WRITE16_HANDLER( atarisy2_videoram_w );
93WRITE16_HANDLER( atarisy2_paletteram_w );
89DECLARE_WRITE16_HANDLER( atarisy2_slapstic_w );
90DECLARE_WRITE16_HANDLER( atarisy2_yscroll_w );
91DECLARE_WRITE16_HANDLER( atarisy2_xscroll_w );
92DECLARE_WRITE16_HANDLER( atarisy2_videoram_w );
93DECLARE_WRITE16_HANDLER( atarisy2_paletteram_w );
9494
9595
9696SCREEN_UPDATE_IND16( atarisy2 );
trunk/src/mame/includes/stv.h
r17964r17965
243243void video_update_vdp1(running_machine &machine);
244244void stv_vdp2_dynamic_res_change(running_machine &machine);
245245
246READ16_HANDLER ( saturn_vdp1_regs_r );
247READ32_HANDLER ( saturn_vdp1_vram_r );
248READ32_HANDLER ( saturn_vdp1_framebuffer0_r );
246DECLARE_READ16_HANDLER ( saturn_vdp1_regs_r );
247DECLARE_READ32_HANDLER ( saturn_vdp1_vram_r );
248DECLARE_READ32_HANDLER ( saturn_vdp1_framebuffer0_r );
249249
250WRITE16_HANDLER ( saturn_vdp1_regs_w );
251WRITE32_HANDLER ( saturn_vdp1_vram_w );
252WRITE32_HANDLER ( saturn_vdp1_framebuffer0_w );
250DECLARE_WRITE16_HANDLER ( saturn_vdp1_regs_w );
251DECLARE_WRITE32_HANDLER ( saturn_vdp1_vram_w );
252DECLARE_WRITE32_HANDLER ( saturn_vdp1_framebuffer0_w );
253253
254254/*----------- defined in video/stvvdp2.c -----------*/
255255
256READ32_HANDLER ( saturn_vdp2_vram_r );
257READ32_HANDLER ( saturn_vdp2_cram_r );
258READ16_HANDLER ( saturn_vdp2_regs_r );
256DECLARE_READ32_HANDLER ( saturn_vdp2_vram_r );
257DECLARE_READ32_HANDLER ( saturn_vdp2_cram_r );
258DECLARE_READ16_HANDLER ( saturn_vdp2_regs_r );
259259
260WRITE32_HANDLER ( saturn_vdp2_vram_w );
261WRITE32_HANDLER ( saturn_vdp2_cram_w );
262WRITE16_HANDLER ( saturn_vdp2_regs_w );
260DECLARE_WRITE32_HANDLER ( saturn_vdp2_vram_w );
261DECLARE_WRITE32_HANDLER ( saturn_vdp2_cram_w );
262DECLARE_WRITE16_HANDLER ( saturn_vdp2_regs_w );
263263
264264
265265SCREEN_UPDATE_RGB32( stv_vdp2 );
trunk/src/mame/includes/sei_crtc.h
r17964r17965
22
33extern UINT16 seibucrtc_sc0bank;
44
5WRITE16_HANDLER( seibucrtc_sc0vram_w );
6WRITE16_HANDLER( seibucrtc_sc1vram_w );
7WRITE16_HANDLER( seibucrtc_sc2vram_w );
8WRITE16_HANDLER( seibucrtc_sc3vram_w );
9WRITE16_HANDLER( seibucrtc_vregs_w );
5DECLARE_WRITE16_HANDLER( seibucrtc_sc0vram_w );
6DECLARE_WRITE16_HANDLER( seibucrtc_sc1vram_w );
7DECLARE_WRITE16_HANDLER( seibucrtc_sc2vram_w );
8DECLARE_WRITE16_HANDLER( seibucrtc_sc3vram_w );
9DECLARE_WRITE16_HANDLER( seibucrtc_vregs_w );
1010void seibucrtc_sc0bank_w(UINT16 data);
1111VIDEO_START( seibu_crtc );
1212SCREEN_UPDATE_IND16( seibu_crtc );
trunk/src/mame/includes/namcos1.h
r17964r17965
111111
112112/*----------- defined in video/namcos1.c -----------*/
113113
114READ8_HANDLER( namcos1_videoram_r );
115WRITE8_HANDLER( namcos1_videoram_w );
116WRITE8_HANDLER( namcos1_paletteram_w );
117READ8_HANDLER( namcos1_spriteram_r );
118WRITE8_HANDLER( namcos1_spriteram_w );
114DECLARE_READ8_HANDLER( namcos1_videoram_r );
115DECLARE_WRITE8_HANDLER( namcos1_videoram_w );
116DECLARE_WRITE8_HANDLER( namcos1_paletteram_w );
117DECLARE_READ8_HANDLER( namcos1_spriteram_r );
118DECLARE_WRITE8_HANDLER( namcos1_spriteram_w );
119119
120120
121121SCREEN_UPDATE_IND16( namcos1 );
trunk/src/mame/includes/astrocde.h
r17964r17965
141141
142142extern const char *const wow_sample_names[];
143143
144READ8_HANDLER( wow_speech_r );
144DECLARE_READ8_HANDLER( wow_speech_r );
145145CUSTOM_INPUT( wow_speech_status_r );
146146
147147
r17964r17965
149149
150150extern const char *const gorf_sample_names[];
151151
152READ8_HANDLER( gorf_speech_r );
152DECLARE_READ8_HANDLER( gorf_speech_r );
153153CUSTOM_INPUT( gorf_speech_status_r );
trunk/src/mame/includes/galaga.h
r17964r17965
150150
151151/*----------- defined in video/bosco.c -----------*/
152152
153WRITE8_HANDLER( bosco_videoram_w );
154WRITE8_HANDLER( bosco_scrollx_w );
155WRITE8_HANDLER( bosco_scrolly_w );
156WRITE8_HANDLER( bosco_starclr_w );
153DECLARE_WRITE8_HANDLER( bosco_videoram_w );
154DECLARE_WRITE8_HANDLER( bosco_scrollx_w );
155DECLARE_WRITE8_HANDLER( bosco_scrolly_w );
156DECLARE_WRITE8_HANDLER( bosco_starclr_w );
157157
158158SCREEN_UPDATE_IND16( bosco );
159159
r17964r17965
182182
183183/*----------- defined in video/xevious.c -----------*/
184184
185WRITE8_HANDLER( xevious_fg_videoram_w );
186WRITE8_HANDLER( xevious_fg_colorram_w );
187WRITE8_HANDLER( xevious_bg_videoram_w );
188WRITE8_HANDLER( xevious_bg_colorram_w );
189WRITE8_HANDLER( xevious_vh_latch_w );
190WRITE8_HANDLER( xevious_bs_w );
191READ8_HANDLER( xevious_bb_r );
185DECLARE_WRITE8_HANDLER( xevious_fg_videoram_w );
186DECLARE_WRITE8_HANDLER( xevious_fg_colorram_w );
187DECLARE_WRITE8_HANDLER( xevious_bg_videoram_w );
188DECLARE_WRITE8_HANDLER( xevious_bg_colorram_w );
189DECLARE_WRITE8_HANDLER( xevious_vh_latch_w );
190DECLARE_WRITE8_HANDLER( xevious_bs_w );
191DECLARE_READ8_HANDLER( xevious_bb_r );
192192
193193
194194SCREEN_UPDATE_IND16( xevious );
r17964r17965
200200void battles_customio_init(running_machine &machine);
201201TIMER_DEVICE_CALLBACK( battles_nmi_generate );
202202
203READ8_HANDLER( battles_customio0_r );
204READ8_HANDLER( battles_customio_data0_r );
205READ8_HANDLER( battles_customio3_r );
206READ8_HANDLER( battles_customio_data3_r );
207READ8_HANDLER( battles_input_port_r );
203DECLARE_READ8_HANDLER( battles_customio0_r );
204DECLARE_READ8_HANDLER( battles_customio_data0_r );
205DECLARE_READ8_HANDLER( battles_customio3_r );
206DECLARE_READ8_HANDLER( battles_customio_data3_r );
207DECLARE_READ8_HANDLER( battles_input_port_r );
208208
209WRITE8_HANDLER( battles_customio0_w );
210WRITE8_HANDLER( battles_customio_data0_w );
211WRITE8_HANDLER( battles_customio3_w );
212WRITE8_HANDLER( battles_customio_data3_w );
213WRITE8_HANDLER( battles_CPU4_coin_w );
214WRITE8_HANDLER( battles_noise_sound_w );
209DECLARE_WRITE8_HANDLER( battles_customio0_w );
210DECLARE_WRITE8_HANDLER( battles_customio_data0_w );
211DECLARE_WRITE8_HANDLER( battles_customio3_w );
212DECLARE_WRITE8_HANDLER( battles_customio_data3_w );
213DECLARE_WRITE8_HANDLER( battles_CPU4_coin_w );
214DECLARE_WRITE8_HANDLER( battles_noise_sound_w );
215215
216216INTERRUPT_GEN( battles_interrupt_4 );
217217
218218/*----------- defined in video/digdug.c -----------*/
219219
220WRITE8_HANDLER( digdug_videoram_w );
221WRITE8_HANDLER( digdug_PORT_w );
220DECLARE_WRITE8_HANDLER( digdug_videoram_w );
221DECLARE_WRITE8_HANDLER( digdug_PORT_w );
222222
223223SCREEN_UPDATE_IND16( digdug );
224224
trunk/src/mame/includes/galivan.h
r17964r17965
6262
6363/*----------- defined in video/galivan.c -----------*/
6464
65WRITE8_HANDLER( ninjemak_scrollx_w );
66WRITE8_HANDLER( ninjemak_scrolly_w );
65DECLARE_WRITE8_HANDLER( ninjemak_scrollx_w );
66DECLARE_WRITE8_HANDLER( ninjemak_scrolly_w );
6767
6868
6969
trunk/src/mame/includes/namcos2.h
r17964r17965
297297
298298extern void (*namcos2_kickstart)(running_machine &machine, int internal);
299299
300READ16_HANDLER( namcos2_flap_prot_r );
300DECLARE_READ16_HANDLER( namcos2_flap_prot_r );
301301
302302/**************************************************************/
303303/*  EEPROM memory function handlers                           */
304304/**************************************************************/
305305#define NAMCOS2_68K_eeprom_W   namcos2_68k_eeprom_w
306306#define NAMCOS2_68K_eeprom_R   namcos2_68k_eeprom_r
307WRITE16_HANDLER( namcos2_68k_eeprom_w );
308READ16_HANDLER( namcos2_68k_eeprom_r );
307DECLARE_WRITE16_HANDLER( namcos2_68k_eeprom_w );
308DECLARE_READ16_HANDLER( namcos2_68k_eeprom_r );
309309
310310/**************************************************************/
311311/*  Shared data ROM memory handlerhandlers                    */
312312/**************************************************************/
313READ16_HANDLER( namcos2_68k_data_rom_r );
313DECLARE_READ16_HANDLER( namcos2_68k_data_rom_r );
314314
315315/**************************************************************/
316316/* Shared protection/random number generator                  */
317317/**************************************************************/
318READ16_HANDLER( namcos2_68k_key_r );
319WRITE16_HANDLER( namcos2_68k_key_w );
318DECLARE_READ16_HANDLER( namcos2_68k_key_r );
319DECLARE_WRITE16_HANDLER( namcos2_68k_key_w );
320320
321321/**************************************************************/
322322/* Non-shared memory custom IO device - IRQ/Inputs/Outputs   */
r17964r17965
331331#define NAMCOS2_C148_SERIRQ    6      /* 0x1cc000 */
332332#define NAMCOS2_C148_VBLANKIRQ   7      /* 0x1ce000 */
333333
334WRITE16_HANDLER( namcos2_68k_master_C148_w );
335READ16_HANDLER( namcos2_68k_master_C148_r );
334DECLARE_WRITE16_HANDLER( namcos2_68k_master_C148_w );
335DECLARE_READ16_HANDLER( namcos2_68k_master_C148_r );
336336INTERRUPT_GEN( namcos2_68k_master_vblank );
337337
338WRITE16_HANDLER( namcos2_68k_slave_C148_w );
339READ16_HANDLER( namcos2_68k_slave_C148_r );
338DECLARE_WRITE16_HANDLER( namcos2_68k_slave_C148_w );
339DECLARE_READ16_HANDLER( namcos2_68k_slave_C148_r );
340340INTERRUPT_GEN( namcos2_68k_slave_vblank );
341341
342WRITE16_HANDLER( namcos2_68k_gpu_C148_w );
343READ16_HANDLER( namcos2_68k_gpu_C148_r );
342DECLARE_WRITE16_HANDLER( namcos2_68k_gpu_C148_w );
343DECLARE_READ16_HANDLER( namcos2_68k_gpu_C148_r );
344344INTERRUPT_GEN( namcos2_68k_gpu_vblank );
345345
346346void namcos2_adjust_posirq_timer( running_machine &machine, int scanline );
r17964r17965
366366/* Sound CPU support handlers - 6809                          */
367367/**************************************************************/
368368
369WRITE8_HANDLER( namcos2_sound_bankselect_w );
369DECLARE_WRITE8_HANDLER( namcos2_sound_bankselect_w );
370370
371371/**************************************************************/
372372/* MCU Specific support handlers - HD63705                    */
373373/**************************************************************/
374374
375WRITE8_HANDLER( namcos2_mcu_analog_ctrl_w );
376READ8_HANDLER( namcos2_mcu_analog_ctrl_r );
375DECLARE_WRITE8_HANDLER( namcos2_mcu_analog_ctrl_w );
376DECLARE_READ8_HANDLER( namcos2_mcu_analog_ctrl_r );
377377
378WRITE8_HANDLER( namcos2_mcu_analog_port_w );
379READ8_HANDLER( namcos2_mcu_analog_port_r );
378DECLARE_WRITE8_HANDLER( namcos2_mcu_analog_port_w );
379DECLARE_READ8_HANDLER( namcos2_mcu_analog_port_r );
380380
381WRITE8_HANDLER( namcos2_mcu_port_d_w );
382READ8_HANDLER( namcos2_mcu_port_d_r );
381DECLARE_WRITE8_HANDLER( namcos2_mcu_port_d_w );
382DECLARE_READ8_HANDLER( namcos2_mcu_port_d_r );
383383
384READ8_HANDLER( namcos2_input_port_0_r );
385READ8_HANDLER( namcos2_input_port_10_r );
386READ8_HANDLER( namcos2_input_port_12_r );
384DECLARE_READ8_HANDLER( namcos2_input_port_0_r );
385DECLARE_READ8_HANDLER( namcos2_input_port_10_r );
386DECLARE_READ8_HANDLER( namcos2_input_port_12_r );
387387
trunk/src/mame/includes/snk6502.h
r17964r17965
7676extern const sn76477_interface vanguard_sn76477_intf_2;
7777extern const sn76477_interface fantasy_sn76477_intf;
7878
79extern WRITE8_HANDLER( sasuke_sound_w );
80extern WRITE8_HANDLER( satansat_sound_w );
81extern WRITE8_HANDLER( vanguard_sound_w );
82extern WRITE8_HANDLER( vanguard_speech_w );
83extern WRITE8_HANDLER( fantasy_sound_w );
84extern WRITE8_HANDLER( fantasy_speech_w );
79extern DECLARE_WRITE8_HANDLER( sasuke_sound_w );
80extern DECLARE_WRITE8_HANDLER( satansat_sound_w );
81extern DECLARE_WRITE8_HANDLER( vanguard_sound_w );
82extern DECLARE_WRITE8_HANDLER( vanguard_speech_w );
83extern DECLARE_WRITE8_HANDLER( fantasy_sound_w );
84extern DECLARE_WRITE8_HANDLER( fantasy_speech_w );
8585
8686class snk6502_sound_device : public device_t,
8787                                  public device_sound_interface
trunk/src/mame/includes/decoprot.h
r17964r17965
11/*----------- defined in machine/decoprot.c -----------*/
22
3READ16_HANDLER( deco16_60_prot_r );
4READ16_HANDLER( deco16_66_prot_r );
5READ16_HANDLER( deco16_104_prot_r );
6READ16_HANDLER( deco16_104_cninja_prot_r );
7READ16_HANDLER( deco16_104_rohga_prot_r );
8READ16_HANDLER( deco16_146_funkyjet_prot_r );
9READ16_HANDLER( deco16_146_nitroball_prot_r );
10READ16_HANDLER( deco16_104_pktgaldx_prot_r );
11READ32_HANDLER( deco16_146_fghthist_prot_r );
3DECLARE_READ16_HANDLER( deco16_60_prot_r );
4DECLARE_READ16_HANDLER( deco16_66_prot_r );
5DECLARE_READ16_HANDLER( deco16_104_prot_r );
6DECLARE_READ16_HANDLER( deco16_104_cninja_prot_r );
7DECLARE_READ16_HANDLER( deco16_104_rohga_prot_r );
8DECLARE_READ16_HANDLER( deco16_146_funkyjet_prot_r );
9DECLARE_READ16_HANDLER( deco16_146_nitroball_prot_r );
10DECLARE_READ16_HANDLER( deco16_104_pktgaldx_prot_r );
11DECLARE_READ32_HANDLER( deco16_146_fghthist_prot_r );
1212
13WRITE16_HANDLER( deco16_60_prot_w );
14WRITE16_HANDLER( deco16_66_prot_w );
15WRITE16_HANDLER( deco16_104_prot_w );
16WRITE16_HANDLER( deco16_104_cninja_prot_w );
17WRITE16_HANDLER( deco16_104_rohga_prot_w );
18WRITE16_HANDLER( deco16_146_funkyjet_prot_w );
19WRITE16_HANDLER( deco16_146_nitroball_prot_w );
20WRITE16_HANDLER( deco16_104_pktgaldx_prot_w );
21WRITE32_HANDLER( deco16_146_fghthist_prot_w );
13DECLARE_WRITE16_HANDLER( deco16_60_prot_w );
14DECLARE_WRITE16_HANDLER( deco16_66_prot_w );
15DECLARE_WRITE16_HANDLER( deco16_104_prot_w );
16DECLARE_WRITE16_HANDLER( deco16_104_cninja_prot_w );
17DECLARE_WRITE16_HANDLER( deco16_104_rohga_prot_w );
18DECLARE_WRITE16_HANDLER( deco16_146_funkyjet_prot_w );
19DECLARE_WRITE16_HANDLER( deco16_146_nitroball_prot_w );
20DECLARE_WRITE16_HANDLER( deco16_104_pktgaldx_prot_w );
21DECLARE_WRITE32_HANDLER( deco16_146_fghthist_prot_w );
2222
2323void decoprot_reset(running_machine &machine);
2424
25READ16_HANDLER( dietgo_104_prot_r );
26WRITE16_HANDLER( dietgo_104_prot_w );
25DECLARE_READ16_HANDLER( dietgo_104_prot_r );
26DECLARE_WRITE16_HANDLER( dietgo_104_prot_w );
trunk/src/mame/includes/segamsys.h
r17964r17965
1818extern SCREEN_VBLANK(megatech_bios);
1919extern SCREEN_VBLANK(megatech_md_sms);
2020
21extern READ8_HANDLER( sms_vcounter_r );
22extern READ8_HANDLER( sms_vdp_data_r );
23extern WRITE8_HANDLER( sms_vdp_data_w );
24extern READ8_HANDLER( sms_vdp_ctrl_r );
25extern WRITE8_HANDLER( sms_vdp_ctrl_w );
21extern DECLARE_READ8_HANDLER( sms_vcounter_r );
22extern DECLARE_READ8_HANDLER( sms_vdp_data_r );
23extern DECLARE_WRITE8_HANDLER( sms_vdp_data_w );
24extern DECLARE_READ8_HANDLER( sms_vdp_ctrl_r );
25extern DECLARE_WRITE8_HANDLER( sms_vdp_ctrl_w );
2626
2727extern void init_for_megadrive(running_machine &machine);
2828extern void segae_md_sms_stop_scanline_timer(void);
2929
3030
31extern READ8_HANDLER( md_sms_vdp_vcounter_r );
32extern READ8_HANDLER( md_sms_vdp_data_r );
33extern WRITE8_HANDLER( md_sms_vdp_data_w );
34extern READ8_HANDLER( md_sms_vdp_ctrl_r );
35extern WRITE8_HANDLER( md_sms_vdp_ctrl_w );
31extern DECLARE_READ8_HANDLER( md_sms_vdp_vcounter_r );
32extern DECLARE_READ8_HANDLER( md_sms_vdp_data_r );
33extern DECLARE_WRITE8_HANDLER( md_sms_vdp_data_w );
34extern DECLARE_READ8_HANDLER( md_sms_vdp_ctrl_r );
35extern DECLARE_WRITE8_HANDLER( md_sms_vdp_ctrl_w );
3636
3737extern VIDEO_START(sms);
3838extern SCREEN_VBLANK(sms);
39extern READ8_HANDLER( sms_vdp_2_data_r );
40extern WRITE8_HANDLER( sms_vdp_2_data_w );
41extern READ8_HANDLER( sms_vdp_2_ctrl_r );
42extern WRITE8_HANDLER( sms_vdp_2_ctrl_w );
39extern DECLARE_READ8_HANDLER( sms_vdp_2_data_r );
40extern DECLARE_WRITE8_HANDLER( sms_vdp_2_data_w );
41extern DECLARE_READ8_HANDLER( sms_vdp_2_ctrl_r );
42extern DECLARE_WRITE8_HANDLER( sms_vdp_2_ctrl_w );
4343extern SCREEN_VBLANK(systeme);
4444extern SCREEN_UPDATE_RGB32(systeme);
4545extern MACHINE_RESET(systeme);
r17964r17965
4949extern UINT8* vdp1_vram_bank0;
5050extern UINT8* vdp1_vram_bank1;
5151extern void segae_set_vram_banks(UINT8 data);
52READ8_HANDLER( sms_ioport_gg00_r );
52DECLARE_READ8_HANDLER( sms_ioport_gg00_r );
5353void init_extra_gg_ports(running_machine* machine, const char* tag);
54READ8_HANDLER (megatech_sms_ioport_dc_r);
55READ8_HANDLER (megatech_sms_ioport_dd_r);
56READ8_HANDLER( smsgg_backupram_r );
57WRITE8_HANDLER( smsgg_backupram_w );
54DECLARE_READ8_HANDLER (megatech_sms_ioport_dc_r);
55DECLARE_READ8_HANDLER (megatech_sms_ioport_dd_r);
56DECLARE_READ8_HANDLER( smsgg_backupram_r );
57DECLARE_WRITE8_HANDLER( smsgg_backupram_w );
5858extern void megatech_set_genz80_as_sms_standard_map(running_machine &machine, const char* tag, int mapper);
5959MACHINE_CONFIG_EXTERN(sms);
6060extern void init_sms(running_machine &machine);
trunk/src/mame/includes/harddriv.h
r17964r17965
227227
228228
229229INTERRUPT_GEN( hd68k_irq_gen );
230WRITE16_HANDLER( hd68k_irq_ack_w );
230DECLARE_WRITE16_HANDLER( hd68k_irq_ack_w );
231231void hdgsp_irq_gen(device_t *device, int state);
232232void hdmsp_irq_gen(device_t *device, int state);
233233
234READ16_HANDLER( hd68k_gsp_io_r );
235WRITE16_HANDLER( hd68k_gsp_io_w );
234DECLARE_READ16_HANDLER( hd68k_gsp_io_r );
235DECLARE_WRITE16_HANDLER( hd68k_gsp_io_w );
236236
237READ16_HANDLER( hd68k_msp_io_r );
238WRITE16_HANDLER( hd68k_msp_io_w );
237DECLARE_READ16_HANDLER( hd68k_msp_io_r );
238DECLARE_WRITE16_HANDLER( hd68k_msp_io_w );
239239
240READ16_HANDLER( hd68k_port0_r );
241READ16_HANDLER( hd68k_adc8_r );
242READ16_HANDLER( hd68k_adc12_r );
243READ16_HANDLER( hdc68k_port1_r );
244READ16_HANDLER( hda68k_port1_r );
245READ16_HANDLER( hdc68k_wheel_r );
246READ16_HANDLER( hd68k_sound_reset_r );
240DECLARE_READ16_HANDLER( hd68k_port0_r );
241DECLARE_READ16_HANDLER( hd68k_adc8_r );
242DECLARE_READ16_HANDLER( hd68k_adc12_r );
243DECLARE_READ16_HANDLER( hdc68k_port1_r );
244DECLARE_READ16_HANDLER( hda68k_port1_r );
245DECLARE_READ16_HANDLER( hdc68k_wheel_r );
246DECLARE_READ16_HANDLER( hd68k_sound_reset_r );
247247
248WRITE16_HANDLER( hd68k_adc_control_w );
249WRITE16_HANDLER( hd68k_wr0_write );
250WRITE16_HANDLER( hd68k_wr1_write );
251WRITE16_HANDLER( hd68k_wr2_write );
252WRITE16_HANDLER( hd68k_nwr_w );
253WRITE16_HANDLER( hdc68k_wheel_edge_reset_w );
248DECLARE_WRITE16_HANDLER( hd68k_adc_control_w );
249DECLARE_WRITE16_HANDLER( hd68k_wr0_write );
250DECLARE_WRITE16_HANDLER( hd68k_wr1_write );
251DECLARE_WRITE16_HANDLER( hd68k_wr2_write );
252DECLARE_WRITE16_HANDLER( hd68k_nwr_w );
253DECLARE_WRITE16_HANDLER( hdc68k_wheel_edge_reset_w );
254254
255READ16_HANDLER( hd68k_zram_r );
256WRITE16_HANDLER( hd68k_zram_w );
255DECLARE_READ16_HANDLER( hd68k_zram_r );
256DECLARE_WRITE16_HANDLER( hd68k_zram_w );
257257
258258void harddriv_duart_irq_handler(device_t *device, int state, UINT8 vector);
259259
260WRITE16_HANDLER( hdgsp_io_w );
260DECLARE_WRITE16_HANDLER( hdgsp_io_w );
261261
262WRITE16_HANDLER( hdgsp_protection_w );
262DECLARE_WRITE16_HANDLER( hdgsp_protection_w );
263263
264264
265265/* ADSP board */
266READ16_HANDLER( hd68k_adsp_program_r );
267WRITE16_HANDLER( hd68k_adsp_program_w );
266DECLARE_READ16_HANDLER( hd68k_adsp_program_r );
267DECLARE_WRITE16_HANDLER( hd68k_adsp_program_w );
268268
269READ16_HANDLER( hd68k_adsp_data_r );
270WRITE16_HANDLER( hd68k_adsp_data_w );
269DECLARE_READ16_HANDLER( hd68k_adsp_data_r );
270DECLARE_WRITE16_HANDLER( hd68k_adsp_data_w );
271271
272READ16_HANDLER( hd68k_adsp_buffer_r );
273WRITE16_HANDLER( hd68k_adsp_buffer_w );
272DECLARE_READ16_HANDLER( hd68k_adsp_buffer_r );
273DECLARE_WRITE16_HANDLER( hd68k_adsp_buffer_w );
274274
275WRITE16_HANDLER( hd68k_adsp_control_w );
276WRITE16_HANDLER( hd68k_adsp_irq_clear_w );
277READ16_HANDLER( hd68k_adsp_irq_state_r );
275DECLARE_WRITE16_HANDLER( hd68k_adsp_control_w );
276DECLARE_WRITE16_HANDLER( hd68k_adsp_irq_clear_w );
277DECLARE_READ16_HANDLER( hd68k_adsp_irq_state_r );
278278
279READ16_HANDLER( hdadsp_special_r );
280WRITE16_HANDLER( hdadsp_special_w );
279DECLARE_READ16_HANDLER( hdadsp_special_r );
280DECLARE_WRITE16_HANDLER( hdadsp_special_w );
281281
282282/* DS III board */
283WRITE16_HANDLER( hd68k_ds3_control_w );
284READ16_HANDLER( hd68k_ds3_girq_state_r );
285READ16_HANDLER( hd68k_ds3_sirq_state_r );
286READ16_HANDLER( hd68k_ds3_gdata_r );
287WRITE16_HANDLER( hd68k_ds3_gdata_w );
288READ16_HANDLER( hd68k_ds3_sdata_r );
289WRITE16_HANDLER( hd68k_ds3_sdata_w );
283DECLARE_WRITE16_HANDLER( hd68k_ds3_control_w );
284DECLARE_READ16_HANDLER( hd68k_ds3_girq_state_r );
285DECLARE_READ16_HANDLER( hd68k_ds3_sirq_state_r );
286DECLARE_READ16_HANDLER( hd68k_ds3_gdata_r );
287DECLARE_WRITE16_HANDLER( hd68k_ds3_gdata_w );
288DECLARE_READ16_HANDLER( hd68k_ds3_sdata_r );
289DECLARE_WRITE16_HANDLER( hd68k_ds3_sdata_w );
290290
291READ16_HANDLER( hdds3_special_r );
292WRITE16_HANDLER( hdds3_special_w );
293READ16_HANDLER( hdds3_control_r );
294WRITE16_HANDLER( hdds3_control_w );
291DECLARE_READ16_HANDLER( hdds3_special_r );
292DECLARE_WRITE16_HANDLER( hdds3_special_w );
293DECLARE_READ16_HANDLER( hdds3_control_r );
294DECLARE_WRITE16_HANDLER( hdds3_control_w );
295295
296READ16_HANDLER( hd68k_ds3_program_r );
297WRITE16_HANDLER( hd68k_ds3_program_w );
296DECLARE_READ16_HANDLER( hd68k_ds3_program_r );
297DECLARE_WRITE16_HANDLER( hd68k_ds3_program_w );
298298
299299/* DSK board */
300300void hddsk_update_pif(dsp32c_device &device, UINT32 pins);
301WRITE16_HANDLER( hd68k_dsk_control_w );
302READ16_HANDLER( hd68k_dsk_ram_r );
303WRITE16_HANDLER( hd68k_dsk_ram_w );
304READ16_HANDLER( hd68k_dsk_zram_r );
305WRITE16_HANDLER( hd68k_dsk_zram_w );
306READ16_HANDLER( hd68k_dsk_small_rom_r );
307READ16_HANDLER( hd68k_dsk_rom_r );
308WRITE16_HANDLER( hd68k_dsk_dsp32_w );
309READ16_HANDLER( hd68k_dsk_dsp32_r );
310WRITE32_HANDLER( rddsp32_sync0_w );
311WRITE32_HANDLER( rddsp32_sync1_w );
301DECLARE_WRITE16_HANDLER( hd68k_dsk_control_w );
302DECLARE_READ16_HANDLER( hd68k_dsk_ram_r );
303DECLARE_WRITE16_HANDLER( hd68k_dsk_ram_w );
304DECLARE_READ16_HANDLER( hd68k_dsk_zram_r );
305DECLARE_WRITE16_HANDLER( hd68k_dsk_zram_w );
306DECLARE_READ16_HANDLER( hd68k_dsk_small_rom_r );
307DECLARE_READ16_HANDLER( hd68k_dsk_rom_r );
308DECLARE_WRITE16_HANDLER( hd68k_dsk_dsp32_w );
309DECLARE_READ16_HANDLER( hd68k_dsk_dsp32_r );
310DECLARE_WRITE32_HANDLER( rddsp32_sync0_w );
311DECLARE_WRITE32_HANDLER( rddsp32_sync1_w );
312312
313313/* DSPCOM board */
314WRITE16_HANDLER( hddspcom_control_w );
314DECLARE_WRITE16_HANDLER( hddspcom_control_w );
315315
316WRITE16_HANDLER( rd68k_slapstic_w );
317READ16_HANDLER( rd68k_slapstic_r );
316DECLARE_WRITE16_HANDLER( rd68k_slapstic_w );
317DECLARE_READ16_HANDLER( rd68k_slapstic_r );
318318
319319/* Game-specific protection */
320WRITE16_HANDLER( st68k_sloop_w );
321READ16_HANDLER( st68k_sloop_r );
322READ16_HANDLER( st68k_sloop_alt_r );
323WRITE16_HANDLER( st68k_protosloop_w );
324READ16_HANDLER( st68k_protosloop_r );
320DECLARE_WRITE16_HANDLER( st68k_sloop_w );
321DECLARE_READ16_HANDLER( st68k_sloop_r );
322DECLARE_READ16_HANDLER( st68k_sloop_alt_r );
323DECLARE_WRITE16_HANDLER( st68k_protosloop_w );
324DECLARE_READ16_HANDLER( st68k_protosloop_r );
325325
326326/* GSP optimizations */
327READ16_HANDLER( hdgsp_speedup_r );
328WRITE16_HANDLER( hdgsp_speedup1_w );
329WRITE16_HANDLER( hdgsp_speedup2_w );
330READ16_HANDLER( rdgsp_speedup1_r );
331WRITE16_HANDLER( rdgsp_speedup1_w );
327DECLARE_READ16_HANDLER( hdgsp_speedup_r );
328DECLARE_WRITE16_HANDLER( hdgsp_speedup1_w );
329DECLARE_WRITE16_HANDLER( hdgsp_speedup2_w );
330DECLARE_READ16_HANDLER( rdgsp_speedup1_r );
331DECLARE_WRITE16_HANDLER( rdgsp_speedup1_w );
332332
333333/* MSP optimizations */
334READ16_HANDLER( hdmsp_speedup_r );
335WRITE16_HANDLER( hdmsp_speedup_w );
334DECLARE_READ16_HANDLER( hdmsp_speedup_r );
335DECLARE_WRITE16_HANDLER( hdmsp_speedup_w );
336336
337337/* ADSP optimizations */
338READ16_HANDLER( hdadsp_speedup_r );
339READ16_HANDLER( hdds3_speedup_r );
338DECLARE_READ16_HANDLER( hdadsp_speedup_r );
339DECLARE_READ16_HANDLER( hdds3_speedup_r );
340340
341341
342342/*----------- defined in audio/harddriv.c -----------*/
r17964r17965
359359void hdgsp_write_to_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg);
360360void hdgsp_read_from_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg);
361361
362READ16_HANDLER( hdgsp_control_lo_r );
363WRITE16_HANDLER( hdgsp_control_lo_w );
364READ16_HANDLER( hdgsp_control_hi_r );
365WRITE16_HANDLER( hdgsp_control_hi_w );
362DECLARE_READ16_HANDLER( hdgsp_control_lo_r );
363DECLARE_WRITE16_HANDLER( hdgsp_control_lo_w );
364DECLARE_READ16_HANDLER( hdgsp_control_hi_r );
365DECLARE_WRITE16_HANDLER( hdgsp_control_hi_w );
366366
367READ16_HANDLER( hdgsp_vram_2bpp_r );
368WRITE16_HANDLER( hdgsp_vram_1bpp_w );
369WRITE16_HANDLER( hdgsp_vram_2bpp_w );
367DECLARE_READ16_HANDLER( hdgsp_vram_2bpp_r );
368DECLARE_WRITE16_HANDLER( hdgsp_vram_1bpp_w );
369DECLARE_WRITE16_HANDLER( hdgsp_vram_2bpp_w );
370370
371READ16_HANDLER( hdgsp_paletteram_lo_r );
372WRITE16_HANDLER( hdgsp_paletteram_lo_w );
373READ16_HANDLER( hdgsp_paletteram_hi_r );
374WRITE16_HANDLER( hdgsp_paletteram_hi_w );
371DECLARE_READ16_HANDLER( hdgsp_paletteram_lo_r );
372DECLARE_WRITE16_HANDLER( hdgsp_paletteram_lo_w );
373DECLARE_READ16_HANDLER( hdgsp_paletteram_hi_r );
374DECLARE_WRITE16_HANDLER( hdgsp_paletteram_hi_w );
375375
376376void harddriv_scanline_driver(screen_device &screen, bitmap_ind16 &bitmap, int scanline, const tms34010_display_params *params);
377377void harddriv_scanline_multisync(screen_device &screen, bitmap_ind16 &bitmap, int scanline, const tms34010_display_params *params);
trunk/src/mame/includes/toobin.h
r17964r17965
3030
3131/*----------- defined in video/toobin.c -----------*/
3232
33WRITE16_HANDLER( toobin_paletteram_w );
34WRITE16_HANDLER( toobin_intensity_w );
35WRITE16_HANDLER( toobin_xscroll_w );
36WRITE16_HANDLER( toobin_yscroll_w );
37WRITE16_HANDLER( toobin_slip_w );
33DECLARE_WRITE16_HANDLER( toobin_paletteram_w );
34DECLARE_WRITE16_HANDLER( toobin_intensity_w );
35DECLARE_WRITE16_HANDLER( toobin_xscroll_w );
36DECLARE_WRITE16_HANDLER( toobin_yscroll_w );
37DECLARE_WRITE16_HANDLER( toobin_slip_w );
3838
3939
4040SCREEN_UPDATE_RGB32( toobin );
trunk/src/mame/includes/cyberbal.h
r17964r17965
6868
6969/*----------- defined in video/cyberbal.c -----------*/
7070
71READ16_HANDLER( cyberbal_paletteram_0_r );
72READ16_HANDLER( cyberbal_paletteram_1_r );
73WRITE16_HANDLER( cyberbal_paletteram_0_w );
74WRITE16_HANDLER( cyberbal_paletteram_1_w );
71DECLARE_READ16_HANDLER( cyberbal_paletteram_0_r );
72DECLARE_READ16_HANDLER( cyberbal_paletteram_1_r );
73DECLARE_WRITE16_HANDLER( cyberbal_paletteram_0_w );
74DECLARE_WRITE16_HANDLER( cyberbal_paletteram_1_w );
7575
7676
7777
trunk/src/mame/includes/atari.h
r17964r17965
535535
536536void antic_reset(void);
537537
538 READ8_HANDLER ( atari_antic_r );
539WRITE8_HANDLER ( atari_antic_w );
538 DECLARE_READ8_HANDLER ( atari_antic_r );
539DECLARE_WRITE8_HANDLER ( atari_antic_w );
540540
541541#define ANTIC_RENDERER(name) void name(address_space &space, VIDEO *video)
542542
trunk/src/mame/includes/badlands.h
r17964r17965
3535
3636/*----------- defined in video/badlands.c -----------*/
3737
38WRITE16_HANDLER( badlands_pf_bank_w );
38DECLARE_WRITE16_HANDLER( badlands_pf_bank_w );
3939
4040
4141SCREEN_UPDATE_IND16( badlands );
trunk/src/mame/includes/pk8000.h
r17964r17965
11/*----------- defined in video/pk8000.c -----------*/
22
3READ8_HANDLER(pk8000_video_color_r);
4WRITE8_HANDLER(pk8000_video_color_w);
5READ8_HANDLER(pk8000_text_start_r);
6WRITE8_HANDLER(pk8000_text_start_w);
7READ8_HANDLER(pk8000_chargen_start_r);
8WRITE8_HANDLER(pk8000_chargen_start_w);
9READ8_HANDLER(pk8000_video_start_r);
10WRITE8_HANDLER(pk8000_video_start_w);
11READ8_HANDLER(pk8000_color_start_r);
12WRITE8_HANDLER(pk8000_color_start_w);
13READ8_HANDLER(pk8000_color_r);
14WRITE8_HANDLER(pk8000_color_w);
3DECLARE_READ8_HANDLER(pk8000_video_color_r);
4DECLARE_WRITE8_HANDLER(pk8000_video_color_w);
5DECLARE_READ8_HANDLER(pk8000_text_start_r);
6DECLARE_WRITE8_HANDLER(pk8000_text_start_w);
7DECLARE_READ8_HANDLER(pk8000_chargen_start_r);
8DECLARE_WRITE8_HANDLER(pk8000_chargen_start_w);
9DECLARE_READ8_HANDLER(pk8000_video_start_r);
10DECLARE_WRITE8_HANDLER(pk8000_video_start_w);
11DECLARE_READ8_HANDLER(pk8000_color_start_r);
12DECLARE_WRITE8_HANDLER(pk8000_color_start_w);
13DECLARE_READ8_HANDLER(pk8000_color_r);
14DECLARE_WRITE8_HANDLER(pk8000_color_w);
1515
1616extern UINT8 pk8000_video_mode;
1717extern UINT8 pk8000_video_enable;
trunk/src/mame/includes/klax.h
r17964r17965
2121
2222/*----------- defined in video/klax.c -----------*/
2323
24WRITE16_HANDLER( klax_latch_w );
24DECLARE_WRITE16_HANDLER( klax_latch_w );
2525
2626
2727SCREEN_UPDATE_IND16( klax );
trunk/src/mame/includes/namcoic.h
r17964r17965
160160
161161void namco_tilemap_draw( bitmap_ind16 &bitmap, const rectangle &cliprect, int pri );
162162void namco_tilemap_invalidate( void );
163WRITE16_HANDLER( namco_tilemapvideoram16_w );
164READ16_HANDLER( namco_tilemapvideoram16_r );
165WRITE16_HANDLER( namco_tilemapcontrol16_w );
166READ16_HANDLER( namco_tilemapcontrol16_r );
163DECLARE_WRITE16_HANDLER( namco_tilemapvideoram16_w );
164DECLARE_READ16_HANDLER( namco_tilemapvideoram16_r );
165DECLARE_WRITE16_HANDLER( namco_tilemapcontrol16_w );
166DECLARE_READ16_HANDLER( namco_tilemapcontrol16_r );
167167
168READ32_HANDLER( namco_tilemapvideoram32_r );
169WRITE32_HANDLER( namco_tilemapvideoram32_w );
170READ32_HANDLER( namco_tilemapcontrol32_r );
171WRITE32_HANDLER( namco_tilemapcontrol32_w );
168DECLARE_READ32_HANDLER( namco_tilemapvideoram32_r );
169DECLARE_WRITE32_HANDLER( namco_tilemapvideoram32_w );
170DECLARE_READ32_HANDLER( namco_tilemapcontrol32_r );
171DECLARE_WRITE32_HANDLER( namco_tilemapcontrol32_w );
172172
173READ32_HANDLER( namco_tilemapvideoram32_le_r );
174WRITE32_HANDLER( namco_tilemapvideoram32_le_w );
175READ32_HANDLER( namco_tilemapcontrol32_le_r );
176WRITE32_HANDLER( namco_tilemapcontrol32_le_w );
173DECLARE_READ32_HANDLER( namco_tilemapvideoram32_le_r );
174DECLARE_WRITE32_HANDLER( namco_tilemapvideoram32_le_w );
175DECLARE_READ32_HANDLER( namco_tilemapcontrol32_le_r );
176DECLARE_WRITE32_HANDLER( namco_tilemapcontrol32_le_w );
177177
178178/***********************************************************************************/
179179
trunk/src/mame/includes/ladybug.h
r17964r17965
9393
9494/*----------- defined in video/redclash.c -----------*/
9595
96WRITE8_HANDLER( redclash_videoram_w );
97WRITE8_HANDLER( redclash_gfxbank_w );
98WRITE8_HANDLER( redclash_flipscreen_w );
96DECLARE_WRITE8_HANDLER( redclash_videoram_w );
97DECLARE_WRITE8_HANDLER( redclash_gfxbank_w );
98DECLARE_WRITE8_HANDLER( redclash_flipscreen_w );
9999
100WRITE8_HANDLER( redclash_star0_w );
101WRITE8_HANDLER( redclash_star1_w );
102WRITE8_HANDLER( redclash_star2_w );
103WRITE8_HANDLER( redclash_star_reset_w );
100DECLARE_WRITE8_HANDLER( redclash_star0_w );
101DECLARE_WRITE8_HANDLER( redclash_star1_w );
102DECLARE_WRITE8_HANDLER( redclash_star2_w );
103DECLARE_WRITE8_HANDLER( redclash_star_reset_w );
104104
105105
106106
trunk/src/mame/includes/atarigx2.h
r17964r17965
5555SCREEN_VBLANK( atarigx2 );
5656SCREEN_UPDATE_IND16( atarigx2 );
5757
58WRITE16_HANDLER( atarigx2_mo_control_w );
58DECLARE_WRITE16_HANDLER( atarigx2_mo_control_w );
5959
6060void atarigx2_scanline_update(screen_device &screen, int scanline);
trunk/src/mame/includes/matmania.h
r17964r17965
6363
6464/*----------- defined in machine/maniach.c -----------*/
6565
66READ8_HANDLER( maniach_68705_port_a_r );
67WRITE8_HANDLER( maniach_68705_port_a_w );
68READ8_HANDLER( maniach_68705_port_b_r );
69WRITE8_HANDLER( maniach_68705_port_b_w );
70READ8_HANDLER( maniach_68705_port_c_r );
71WRITE8_HANDLER( maniach_68705_port_c_w );
72WRITE8_HANDLER( maniach_68705_ddr_a_w );
73WRITE8_HANDLER( maniach_68705_ddr_b_w );
74WRITE8_HANDLER( maniach_68705_ddr_c_w );
75WRITE8_HANDLER( maniach_mcu_w );
76READ8_HANDLER( maniach_mcu_r );
77READ8_HANDLER( maniach_mcu_status_r );
66DECLARE_READ8_HANDLER( maniach_68705_port_a_r );
67DECLARE_WRITE8_HANDLER( maniach_68705_port_a_w );
68DECLARE_READ8_HANDLER( maniach_68705_port_b_r );
69DECLARE_WRITE8_HANDLER( maniach_68705_port_b_w );
70DECLARE_READ8_HANDLER( maniach_68705_port_c_r );
71DECLARE_WRITE8_HANDLER( maniach_68705_port_c_w );
72DECLARE_WRITE8_HANDLER( maniach_68705_ddr_a_w );
73DECLARE_WRITE8_HANDLER( maniach_68705_ddr_b_w );
74DECLARE_WRITE8_HANDLER( maniach_68705_ddr_c_w );
75DECLARE_WRITE8_HANDLER( maniach_mcu_w );
76DECLARE_READ8_HANDLER( maniach_mcu_r );
77DECLARE_READ8_HANDLER( maniach_mcu_status_r );
7878
7979
8080/*----------- defined in video/matmania.c -----------*/
trunk/src/mame/includes/archimds.h
r17964r17965
4747void archimedes_clear_irq_b(running_machine &machine, int mask);
4848void archimedes_clear_fiq(running_machine &machine, int mask);
4949
50extern READ32_HANDLER(aristmk5_drame_memc_logical_r);
51extern READ32_HANDLER(archimedes_memc_logical_r);
52extern WRITE32_HANDLER(archimedes_memc_logical_w);
53extern READ32_HANDLER(archimedes_memc_r);
54extern WRITE32_HANDLER(archimedes_memc_w);
55extern WRITE32_HANDLER(archimedes_memc_page_w);
56extern READ32_HANDLER(archimedes_ioc_r);
57extern WRITE32_HANDLER(archimedes_ioc_w);
58extern READ32_HANDLER(archimedes_vidc_r);
59extern WRITE32_HANDLER(archimedes_vidc_w);
50extern DECLARE_READ32_HANDLER(aristmk5_drame_memc_logical_r);
51extern DECLARE_READ32_HANDLER(archimedes_memc_logical_r);
52extern DECLARE_WRITE32_HANDLER(archimedes_memc_logical_w);
53extern DECLARE_READ32_HANDLER(archimedes_memc_r);
54extern DECLARE_WRITE32_HANDLER(archimedes_memc_w);
55extern DECLARE_WRITE32_HANDLER(archimedes_memc_page_w);
56extern DECLARE_READ32_HANDLER(archimedes_ioc_r);
57extern DECLARE_WRITE32_HANDLER(archimedes_ioc_w);
58extern DECLARE_READ32_HANDLER(archimedes_vidc_r);
59extern DECLARE_WRITE32_HANDLER(archimedes_vidc_w);
6060
6161extern UINT8 i2c_clk;
6262extern INT16 memc_pages[0x2000];   // the logical RAM area is 32 megs, and the smallest page size is 4k
trunk/src/mame/includes/pacman.h
r17964r17965
167167
168168
169169
170READ8_HANDLER( theglobp_decrypt_rom );
170DECLARE_READ8_HANDLER( theglobp_decrypt_rom );
171171
172172
173173/*----------- defined in machine/acitya.c -------------*/
174174
175175
176176
177READ8_HANDLER( acitya_decrypt_rom );
177DECLARE_READ8_HANDLER( acitya_decrypt_rom );
trunk/src/mame/includes/dec8.h
r17964r17965
144144
145145
146146
147WRITE8_HANDLER( dec8_bac06_0_w );
148WRITE8_HANDLER( dec8_bac06_1_w );
149WRITE8_HANDLER( dec8_pf1_data_w );
150READ8_HANDLER( dec8_pf1_data_r );
147DECLARE_WRITE8_HANDLER( dec8_bac06_0_w );
148DECLARE_WRITE8_HANDLER( dec8_bac06_1_w );
149DECLARE_WRITE8_HANDLER( dec8_pf1_data_w );
150DECLARE_READ8_HANDLER( dec8_pf1_data_r );
trunk/src/mame/includes/cchip.h
r17964r17965
11/*----------- defined in machine/cchip.c -----------*/
22
33MACHINE_RESET( cchip1 );
4READ16_HANDLER( cchip1_ctrl_r );
5READ16_HANDLER( cchip1_ram_r );
6WRITE16_HANDLER( cchip1_ctrl_w );
7WRITE16_HANDLER( cchip1_bank_w );
8WRITE16_HANDLER( cchip1_ram_w );
4DECLARE_READ16_HANDLER( cchip1_ctrl_r );
5DECLARE_READ16_HANDLER( cchip1_ram_r );
6DECLARE_WRITE16_HANDLER( cchip1_ctrl_w );
7DECLARE_WRITE16_HANDLER( cchip1_bank_w );
8DECLARE_WRITE16_HANDLER( cchip1_ram_w );
99
trunk/src/mame/includes/asuka.h
r17964r17965
5353
5454/*----------- defined in machine/bonzeadv.c -----------*/
5555
56READ16_HANDLER( bonzeadv_cchip_ctrl_r );
57READ16_HANDLER( bonzeadv_cchip_ram_r );
58WRITE16_HANDLER( bonzeadv_cchip_ctrl_w );
59WRITE16_HANDLER( bonzeadv_cchip_bank_w );
60WRITE16_HANDLER( bonzeadv_cchip_ram_w );
56DECLARE_READ16_HANDLER( bonzeadv_cchip_ctrl_r );
57DECLARE_READ16_HANDLER( bonzeadv_cchip_ram_r );
58DECLARE_WRITE16_HANDLER( bonzeadv_cchip_ctrl_w );
59DECLARE_WRITE16_HANDLER( bonzeadv_cchip_bank_w );
60DECLARE_WRITE16_HANDLER( bonzeadv_cchip_ram_w );
6161
6262
6363/*----------- defined in video/asuka.c -----------*/
trunk/src/mame/drivers/bfm_sc4h.c
r17964r17965
235235   return 0x0000;
236236}
237237
238static WRITE8_HANDLER( bfm_sc4_reel4_w );
238static DECLARE_WRITE8_HANDLER( bfm_sc4_reel4_w );
239239
240240WRITE8_MEMBER(sc4_state::mux_output_w)
241241{
r17964r17965
561561
562562      bfm_sc4_write_serial_vfd(space.machine(), (data & 0x4000)?1:0, (data & 0x1000)?1:0, !(data & 0x2000)?1:0);
563563
564      bfm_sc4_reel3_w(space, 0, (data&0x0f00)>>8);
564      bfm_sc4_reel3_w(space, 0, (data&0x0f00)>>8, 0xff);
565565   }
566566
567567}
trunk/src/mame/drivers/mpu4vid.c
r17964r17965
273273
274274
275275
276static READ16_HANDLER( characteriser16_r );
277static WRITE16_HANDLER( characteriser16_w );
276static DECLARE_READ16_HANDLER( characteriser16_r );
277static DECLARE_WRITE16_HANDLER( characteriser16_w );
278278
279static READ16_HANDLER( bwb_characteriser16_r );
280static WRITE16_HANDLER( bwb_characteriser16_w );
279static DECLARE_READ16_HANDLER( bwb_characteriser16_r );
280static DECLARE_WRITE16_HANDLER( bwb_characteriser16_w );
281281
282282/*************************************
283283 *
trunk/src/mame/drivers/dkong.c
r17964r17965
347347 *
348348 *************************************/
349349
350static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
351static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
350static UINT8 memory_read_byte(address_space &space, offs_t address, UINT8 mem_mask) { return space.read_byte(address); }
351static void memory_write_byte(address_space &space, offs_t address, UINT8 data, UINT8 mem_mask) { space.write_byte(address, data); }
352352
353353static Z80DMA_INTERFACE( dk3_dma )
354354{
trunk/src/mame/drivers/mario.c
r17964r17965
101101 *
102102 *************************************/
103103
104static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
105static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
104static UINT8 memory_read_byte(address_space &space, offs_t address, UINT8 mem_mask) { return space.read_byte(address); }
105static void memory_write_byte(address_space &space, offs_t address, UINT8 data, UINT8 mem_mask) { space.write_byte(address, data); }
106106
107107static Z80DMA_INTERFACE( mario_dma )
108108{
trunk/src/mame/drivers/decocass.c
r17964r17965
9797   decocass_objectram_w(space, offset, data);
9898}
9999
100static WRITE8_HANDLER( mirrorvideoram_w ) { offset = ((offset >> 5) & 0x1f) | ((offset & 0x1f) << 5); fgvideoram_w(space, offset, data); }
101static WRITE8_HANDLER( mirrorcolorram_w ) { offset = ((offset >> 5) & 0x1f) | ((offset & 0x1f) << 5); fgcolorram_w(space, offset, data); }
100static WRITE8_HANDLER( mirrorvideoram_w ) { offset = ((offset >> 5) & 0x1f) | ((offset & 0x1f) << 5); fgvideoram_w(space, offset, data, mem_mask); }
101static WRITE8_HANDLER( mirrorcolorram_w ) { offset = ((offset >> 5) & 0x1f) | ((offset & 0x1f) << 5); fgcolorram_w(space, offset, data, mem_mask); }
102102
103103static READ8_HANDLER( mirrorvideoram_r )
104104{
trunk/src/emu/cpu/m68000/68340sim.h
r17964r17965
4141
4242
4343
44READ16_HANDLER( m68340_internal_sim_r );
45WRITE16_HANDLER( m68340_internal_sim_w );
46READ32_HANDLER( m68340_internal_sim_cs_r );
47WRITE32_HANDLER( m68340_internal_sim_cs_w );
48READ8_HANDLER( m68340_internal_sim_ports_r );
49WRITE8_HANDLER( m68340_internal_sim_ports_w );
44DECLARE_READ16_HANDLER( m68340_internal_sim_r );
45DECLARE_WRITE16_HANDLER( m68340_internal_sim_w );
46DECLARE_READ32_HANDLER( m68340_internal_sim_cs_r );
47DECLARE_WRITE32_HANDLER( m68340_internal_sim_cs_w );
48DECLARE_READ8_HANDLER( m68340_internal_sim_ports_r );
49DECLARE_WRITE8_HANDLER( m68340_internal_sim_ports_w );
5050
5151
5252
trunk/src/emu/cpu/m68000/68340ser.h
r17964r17965
11
2READ32_HANDLER( m68340_internal_serial_r );
3WRITE32_HANDLER( m68340_internal_serial_w );
2DECLARE_READ32_HANDLER( m68340_internal_serial_r );
3DECLARE_WRITE32_HANDLER( m68340_internal_serial_w );
44
55class m68340_serial
66{
trunk/src/emu/cpu/m68000/68307sim.h
r17964r17965
11/* 68307 SIM module */
22
3READ16_HANDLER( m68307_internal_sim_r );
4WRITE16_HANDLER( m68307_internal_sim_w );
3DECLARE_READ16_HANDLER( m68307_internal_sim_r );
4DECLARE_WRITE16_HANDLER( m68307_internal_sim_w );
55
66/* ports */
77#define m68307SIM_PACNT (0x10)
trunk/src/emu/cpu/m68000/68307bus.h
r17964r17965
44#define m68307BUS_MBSR (0x07)
55#define m68307BUS_MBDR (0x09)
66
7READ8_HANDLER( m68307_internal_mbus_r );
8WRITE8_HANDLER( m68307_internal_mbus_w );
7DECLARE_READ8_HANDLER( m68307_internal_mbus_r );
8DECLARE_WRITE8_HANDLER( m68307_internal_mbus_w );
99
1010class m68307_mbus
1111{
trunk/src/emu/cpu/m68000/68307ser.h
r17964r17965
1818#define m68307SER_UOP0       (0x1f)
1919
2020
21READ8_HANDLER( m68307_internal_serial_r );
22WRITE8_HANDLER( m68307_internal_serial_w );
21DECLARE_READ8_HANDLER( m68307_internal_serial_r );
22DECLARE_WRITE8_HANDLER( m68307_internal_serial_w );
2323
2424class m68307_serial
2525{
trunk/src/emu/cpu/m68000/68340dma.h
r17964r17965
11
2READ32_HANDLER( m68340_internal_dma_r );
3WRITE32_HANDLER( m68340_internal_dma_w );
2DECLARE_READ32_HANDLER( m68340_internal_dma_r );
3DECLARE_WRITE32_HANDLER( m68340_internal_dma_w );
44
55class m68340_dma
66{
trunk/src/emu/cpu/m68000/68340tmu.h
r17964r17965
11
2READ32_HANDLER( m68340_internal_timer_r );
3WRITE32_HANDLER( m68340_internal_timer_w );
2DECLARE_READ32_HANDLER( m68340_internal_timer_r );
3DECLARE_WRITE32_HANDLER( m68340_internal_timer_w );
44
55class m68340_timer
66{
trunk/src/emu/cpu/m68000/68307tmu.h
r17964r17965
11
2READ16_HANDLER( m68307_internal_timer_r );
3WRITE16_HANDLER( m68307_internal_timer_w );
2DECLARE_READ16_HANDLER( m68307_internal_timer_r );
3DECLARE_WRITE16_HANDLER( m68307_internal_timer_w );
44
55#define m68307TIMER_TMR (0x0)
66#define m68307TIMER_TRR (0x1)
trunk/src/emu/cpu/tms34010/tms34010.h
r17964r17965
222222
223223
224224/* Reads & writes to the 34010 I/O registers; place at 0xc0000000 */
225WRITE16_HANDLER( tms34010_io_register_w );
226READ16_HANDLER( tms34010_io_register_r );
225DECLARE_WRITE16_HANDLER( tms34010_io_register_w );
226DECLARE_READ16_HANDLER( tms34010_io_register_r );
227227
228228/* Reads & writes to the 34020 I/O registers; place at 0xc0000000 */
229WRITE16_HANDLER( tms34020_io_register_w );
230READ16_HANDLER( tms34020_io_register_r );
229DECLARE_WRITE16_HANDLER( tms34020_io_register_w );
230DECLARE_READ16_HANDLER( tms34020_io_register_r );
231231
232232
233233/* Use this macro in the memory definitions to specify bit-based addresses */
trunk/src/emu/cpu/dsp56k/dsp56mem.h
r17964r17965
235235/* Port C Dtaa Register (PCD) */
236236void PCD_set(dsp56k_core* cpustate, UINT16 value);
237237
238READ16_HANDLER( peripheral_register_r );
239WRITE16_HANDLER( peripheral_register_w );
240READ16_HANDLER( program_r );
241WRITE16_HANDLER( program_w );
238DECLARE_READ16_HANDLER( peripheral_register_r );
239DECLARE_WRITE16_HANDLER( peripheral_register_w );
240DECLARE_READ16_HANDLER( program_r );
241DECLARE_WRITE16_HANDLER( program_w );
242242
243243} // namespace DSP56K
244244
trunk/src/emu/cpu/psx/sio.h
r17964r17965
8787   psx_sio port[2];
8888};
8989
90WRITE32_HANDLER( psx_sio_w );
91READ32_HANDLER( psx_sio_r );
90DECLARE_WRITE32_HANDLER( psx_sio_w );
91DECLARE_READ32_HANDLER( psx_sio_r );
9292
9393#endif
trunk/src/emu/cpu/sh2/sh2.h
r17964r17965
6767DECLARE_LEGACY_CPU_DEVICE(SH1, sh1);
6868DECLARE_LEGACY_CPU_DEVICE(SH2, sh2);
6969
70WRITE32_HANDLER( sh2_internal_w );
71READ32_HANDLER( sh2_internal_r );
70DECLARE_WRITE32_HANDLER( sh2_internal_w );
71DECLARE_READ32_HANDLER( sh2_internal_r );
7272
7373void sh2_set_ftcsr_read_callback(device_t *device, void (*callback)(UINT32));
7474void sh2_set_frt_input(device_t *device, int state);
trunk/src/emu/cpu/sh4/sh4comn.h
r17964r17965
320320UINT32 sh4_getsqremap(sh4_state *sh4, UINT32 address);
321321void sh4_handler_ipra_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask);
322322
323READ64_HANDLER( sh4_tlb_r );
324WRITE64_HANDLER( sh4_tlb_w );
323DECLARE_READ64_HANDLER( sh4_tlb_r );
324DECLARE_WRITE64_HANDLER( sh4_tlb_w );
325325
326326
327327INLINE void sh4_check_pending_irq(sh4_state *sh4, const char *message) // look for highest priority active exception and handle it
trunk/src/emu/cpu/sh4/sh4.h
r17964r17965
152152DECLARE_LEGACY_CPU_DEVICE(SH4LE, sh4);
153153DECLARE_LEGACY_CPU_DEVICE(SH4BE, sh4be);
154154
155WRITE32_HANDLER( sh4_internal_w );
156READ32_HANDLER( sh4_internal_r );
155DECLARE_WRITE32_HANDLER( sh4_internal_w );
156DECLARE_READ32_HANDLER( sh4_internal_r );
157157
158WRITE32_HANDLER( sh3_internal_w );
159READ32_HANDLER( sh3_internal_r );
158DECLARE_WRITE32_HANDLER( sh3_internal_w );
159DECLARE_READ32_HANDLER( sh3_internal_r );
160160
161WRITE32_HANDLER( sh3_internal_high_w );
162READ32_HANDLER( sh3_internal_high_r );
161DECLARE_WRITE32_HANDLER( sh3_internal_high_w );
162DECLARE_READ32_HANDLER( sh3_internal_high_r );
163163
164164
165165void sh4_set_frt_input(device_t *device, int state);
trunk/src/emu/cpu/g65816/g65816op.h
r17964r17965
8585INLINE uint g65816i_read_8_vector(g65816i_cpu_struct *cpustate, uint address)
8686{
8787   if (READ_VECTOR)
88      return READ_VECTOR(*cpustate->program, address);
88      return READ_VECTOR(*cpustate->program, address, 0xff);
8989   else
9090      return g65816i_read_8_normal(cpustate, address);
9191}
trunk/src/emu/cpu/tms7000/tms7000.c
r17964r17965
126126#define SETZ      pSR |= SR_Z
127127#define SETN      pSR |= SR_N
128128
129static READ8_HANDLER( tms7000_internal_r );
130static WRITE8_HANDLER( tms7000_internal_w );
131static READ8_HANDLER( tms70x0_pf_r );
132static WRITE8_HANDLER( tms70x0_pf_w );
129static DECLARE_READ8_HANDLER( tms7000_internal_r );
130static DECLARE_WRITE8_HANDLER( tms7000_internal_w );
131static DECLARE_READ8_HANDLER( tms70x0_pf_r );
132static DECLARE_WRITE8_HANDLER( tms70x0_pf_w );
133133
134134static ADDRESS_MAP_START(tms7000_mem, AS_PROGRAM, 8, legacy_cpu_device )
135135   AM_RANGE(0x0000, 0x007f)   AM_READWRITE_LEGACY(tms7000_internal_r, tms7000_internal_w)   /* tms7000 internal RAM */
trunk/src/emu/cpu/tms9900/tms9900l.h
r17964r17965
7171};
7272
7373/* accessor for the internal ROM */
74extern READ16_HANDLER(ti990_10_internal_r);
74extern DECLARE_READ16_HANDLER(ti990_10_internal_r);
7575
7676/* CRU accessor for the mapper registers (R12 base 0x1fa0) */
77extern READ8_HANDLER(ti990_10_mapper_cru_r);
78extern WRITE8_HANDLER(ti990_10_mapper_cru_w);
77extern DECLARE_READ8_HANDLER(ti990_10_mapper_cru_r);
78extern DECLARE_WRITE8_HANDLER(ti990_10_mapper_cru_w);
7979/* CRU accessor for the error interrupt register (R12 base 0x1fc0) */
80extern READ8_HANDLER(ti990_10_eir_cru_r);
81extern WRITE8_HANDLER(ti990_10_eir_cru_w);
80extern DECLARE_READ8_HANDLER(ti990_10_eir_cru_r);
81extern DECLARE_WRITE8_HANDLER(ti990_10_eir_cru_w);
8282
8383
8484
r17964r17965
162162};
163163
164164/* accessor for the first 252 bytes of internal RAM */
165extern READ8_HANDLER(tms9995_internal1_r);
166extern WRITE8_HANDLER(tms9995_internal1_w);
165extern DECLARE_READ8_HANDLER(tms9995_internal1_r);
166extern DECLARE_WRITE8_HANDLER(tms9995_internal1_w);
167167/* accessors for the last 4 bytes of internal RAM */
168extern READ8_HANDLER(tms9995_internal2_r);
169extern WRITE8_HANDLER(tms9995_internal2_w);
168extern DECLARE_READ8_HANDLER(tms9995_internal2_r);
169extern DECLARE_WRITE8_HANDLER(tms9995_internal2_w);
170170
171171
172172
trunk/src/emu/cpu/h6280/h6280.h
r17964r17965
7575
7676DECLARE_LEGACY_CPU_DEVICE(H6280, h6280);
7777
78READ8_HANDLER( h6280_irq_status_r );
79WRITE8_HANDLER( h6280_irq_status_w );
78DECLARE_READ8_HANDLER( h6280_irq_status_r );
79DECLARE_WRITE8_HANDLER( h6280_irq_status_w );
8080
81READ8_HANDLER( h6280_timer_r );
82WRITE8_HANDLER( h6280_timer_w );
81DECLARE_READ8_HANDLER( h6280_timer_r );
82DECLARE_WRITE8_HANDLER( h6280_timer_w );
8383
8484/* functions for use by the PSG and joypad port only! */
8585UINT8 h6280io_get_buffer(device_t*);
trunk/src/emu/cpu/m6800/m6800.h
r17964r17965
6363DECLARE_LEGACY_CPU_DEVICE(HD6303Y, hd6303y);
6464
6565
66READ8_HANDLER( m6801_io_r );
67WRITE8_HANDLER( m6801_io_w );
66DECLARE_READ8_HANDLER( m6801_io_r );
67DECLARE_WRITE8_HANDLER( m6801_io_w );
6868
6969CPU_DISASSEMBLE( m6800 );
7070CPU_DISASSEMBLE( m6801 );
trunk/src/emu/devcb.c
r17964r17965
393393         if (desc.readdevice != NULL)
394394         {
395395             m_helper.read8_device = desc.readdevice;
396            *static_cast<devcb_read8_delegate *>(this) = devcb_read8_delegate(&devcb_resolved_read8::from_read8, desc.name, this);
396            *static_cast<devcb_read8_delegate *>(this) = devcb_read8_delegate(&devcb_resolved_read8::from_read8device, desc.name, this);
397397         }
398398         else
399399         {
r17964r17965
404404
405405      case DEVCB_TYPE_LEGACY_SPACE:
406406         m_object.space = &devcb_resolver::resolve_space(desc.index, desc.tag, device);
407         *static_cast<devcb_read8_delegate *>(this) = devcb_read8_delegate(desc.readspace, desc.name, m_object.space);
407          m_helper.read8_space = desc.readspace;
408         *static_cast<devcb_read8_delegate *>(this) = devcb_read8_delegate(&devcb_resolved_read8::from_read8space, desc.name, this);
408409         break;
409410
410411      case DEVCB_TYPE_CONSTANT:
r17964r17965
420421//  value to an 8-bit value
421422//-------------------------------------------------
422423
423UINT8 devcb_resolved_read8::from_port(offs_t offset)
424UINT8 devcb_resolved_read8::from_port(offs_t offset, UINT8 mem_mask)
424425{
425426   return m_object.port->read();
426427}
427428
428429
429430//-------------------------------------------------
430//  from_read8 - helper to convert from a device
431//  from_read8space - helper to convert from a device
431432//  line read value to an 8-bit value
432433//-------------------------------------------------
433434
434UINT8 devcb_resolved_read8::from_read8(offs_t offset)
435UINT8 devcb_resolved_read8::from_read8space(offs_t offset, UINT8 mem_mask)
435436{
436437   return (*m_helper.read8_device)(m_object.device, m_object.device->machine().driver_data()->generic_space(), offset, 0xff);
437438}
438439
439440
440441//-------------------------------------------------
442//  from_read8device - helper to convert from a device
443//  line read value to an 8-bit value
444//-------------------------------------------------
445
446UINT8 devcb_resolved_read8::from_read8device(offs_t offset, UINT8 mem_mask)
447{
448   return (*m_helper.read8_device)(m_object.device, m_object.device->machine().driver_data()->generic_space(), offset, mem_mask);
449}
450
451
452//-------------------------------------------------
441453//  from_readline - helper to convert from a device
442454//  line read value to an 8-bit value
443455//-------------------------------------------------
444456
445UINT8 devcb_resolved_read8::from_readline(offs_t offset)
457UINT8 devcb_resolved_read8::from_readline(offs_t offset, UINT8 mem_mask)
446458{
447459   return (*m_helper.read_line)(m_object.device);
448460}
r17964r17965
453465//  constant value to an 8-bit value
454466//-------------------------------------------------
455467
456UINT8 devcb_resolved_read8::from_constant(offs_t offset)
468UINT8 devcb_resolved_read8::from_constant(offs_t offset, UINT8 mem_mask)
457469{
458470   return m_object.constant;
459471}
r17964r17965
500512         if (desc.writedevice != NULL)
501513         {
502514            m_helper.write8_device = desc.writedevice;
503            *static_cast<devcb_write8_delegate *>(this) = devcb_write8_delegate(&devcb_resolved_write8::to_write8, desc.name, this);
515            *static_cast<devcb_write8_delegate *>(this) = devcb_write8_delegate(&devcb_resolved_write8::to_write8device, desc.name, this);
504516         }
505517         else
506518         {
r17964r17965
511523
512524      case DEVCB_TYPE_LEGACY_SPACE:
513525         m_object.space = &devcb_resolver::resolve_space(desc.index, desc.tag, device);
514         *static_cast<devcb_write8_delegate *>(this) = devcb_write8_delegate(desc.writespace, desc.name, m_object.space);
526         m_helper.write8_space = desc.writespace;
527         *static_cast<devcb_write8_delegate *>(this) = devcb_write8_delegate(&devcb_resolved_write8::to_write8space, desc.name, this);
515528         break;
516529
517530      case DEVCB_TYPE_INPUT_LINE:
r17964r17965
527540//  to_null - helper to handle a NULL write
528541//-------------------------------------------------
529542
530void devcb_resolved_write8::to_null(offs_t offset, UINT8 data)
543void devcb_resolved_write8::to_null(offs_t offset, UINT8 data, UINT8 mem_mask)
531544{
532545}
533546
r17964r17965
537550//  value from a line value
538551//-------------------------------------------------
539552
540void devcb_resolved_write8::to_port(offs_t offset, UINT8 data)
553void devcb_resolved_write8::to_port(offs_t offset, UINT8 data, UINT8 mem_mask)
541554{
542   m_object.port->write(data, 0xff);
555   m_object.port->write(data, mem_mask);
543556}
544557
545558
546559//-------------------------------------------------
547//  to_write8 - helper to convert to an 8-bit
560//  to_write8space - helper to convert to an 8-bit
548561//  memory read value from a line value
549562//-------------------------------------------------
550563
551void devcb_resolved_write8::to_write8(offs_t offset, UINT8 data)
564void devcb_resolved_write8::to_write8space(offs_t offset, UINT8 data, UINT8 mem_mask)
552565{
553   (*m_helper.write8_device)(m_object.device, m_object.device->machine().driver_data()->generic_space(), offset, data, 0xff);
566   (*m_helper.write8_space)(*m_object.space, offset, data, mem_mask);
554567}
555568
556569
557570//-------------------------------------------------
571//  to_write8device - helper to convert to an 8-bit
572//  memory read value from a line value
573//-------------------------------------------------
574
575void devcb_resolved_write8::to_write8device(offs_t offset, UINT8 data, UINT8 mem_mask)
576{
577   (*m_helper.write8_device)(m_object.device, m_object.device->machine().driver_data()->generic_space(), offset, data, mem_mask);
578}
579
580
581//-------------------------------------------------
558582//  to_write8 - helper to convert to an 8-bit
559583//  memory read value from a line value
560584//-------------------------------------------------
561585
562void devcb_resolved_write8::to_writeline(offs_t offset, UINT8 data)
586void devcb_resolved_write8::to_writeline(offs_t offset, UINT8 data, UINT8 mem_mask)
563587{
564588   (*m_helper.write_line)(m_object.device, (data & 1) ? ASSERT_LINE : CLEAR_LINE);
565589}
r17964r17965
570594//  value from a line value
571595//-------------------------------------------------
572596
573void devcb_resolved_write8::to_input(offs_t offset, UINT8 data)
597void devcb_resolved_write8::to_input(offs_t offset, UINT8 data, UINT8 mem_mask)
574598{
575599   m_object.execute->set_input_line(m_helper.input_line, (data & 1) ? ASSERT_LINE : CLEAR_LINE);
576600}
trunk/src/emu/video/tms34061.h
r17964r17965
6666void tms34061_w(address_space &space, int col, int row, int func, UINT8 data);
6767
6868/* latch settings */
69READ8_HANDLER( tms34061_latch_r );
70WRITE8_HANDLER( tms34061_latch_w );
69DECLARE_READ8_HANDLER( tms34061_latch_r );
70DECLARE_WRITE8_HANDLER( tms34061_latch_w );
7171
7272/* video update handling */
7373void tms34061_get_display_state(struct tms34061_display *state);
trunk/src/emu/video/pc_cga.c
r17964r17965
168168#define CGA_CHIPSET_PARADISE    0x80    /* Paradise (used in PC1640) */
169169
170170
171static READ8_HANDLER( pc_cga8_r );
172static WRITE8_HANDLER( pc_cga8_w );
171static DECLARE_READ8_HANDLER( pc_cga8_r );
172static DECLARE_WRITE8_HANDLER( pc_cga8_w );
173173static MC6845_UPDATE_ROW( cga_update_row );
174174static WRITE_LINE_DEVICE_HANDLER( cga_hsync_changed );
175175static WRITE_LINE_DEVICE_HANDLER( cga_vsync_changed );
trunk/src/emu/video/pc_cga.h
r17964r17965
2020
2121
2222/* Used in machine/pc.c */
23READ16_HANDLER( pc1512_16le_r );
24WRITE16_HANDLER( pc1512_16le_w );
25WRITE16_HANDLER( pc1512_videoram16le_w );
23DECLARE_READ16_HANDLER( pc1512_16le_r );
24DECLARE_WRITE16_HANDLER( pc1512_16le_w );
25DECLARE_WRITE16_HANDLER( pc1512_videoram16le_w );
2626
2727MACHINE_CONFIG_EXTERN( pcvideo_poisk2 );
2828
trunk/src/emu/video/pc_vga.c
r17964r17965
15331533{
15341534   UINT8 data = 0xff;
15351535   if (CRTC_PORT_ADDR==0x3b0)
1536      data=vga_crtc_r(space, offset);
1536      data=vga_crtc_r(space, offset, mem_mask);
15371537   return data;
15381538}
15391539
r17964r17965
16071607         switch ((vga.miscellaneous_output>>2)&3)
16081608         {
16091609            case 3:
1610               if (vga.read_dipswitch && vga.read_dipswitch(space, 0) & 0x01)
1610               if (vga.read_dipswitch && vga.read_dipswitch(space, 0, mem_mask) & 0x01)
16111611                  data |= 0x10;
16121612               break;
16131613            case 2:
1614               if (vga.read_dipswitch && vga.read_dipswitch(space, 0) & 0x02)
1614               if (vga.read_dipswitch && vga.read_dipswitch(space, 0, mem_mask) & 0x02)
16151615                  data |= 0x10;
16161616               break;
16171617            case 1:
1618               if (vga.read_dipswitch && vga.read_dipswitch(space, 0) & 0x04)
1618               if (vga.read_dipswitch && vga.read_dipswitch(space, 0, mem_mask) & 0x04)
16191619                  data |= 0x10;
16201620               break;
16211621            case 0:
1622               if (vga.read_dipswitch && vga.read_dipswitch(space, 0) & 0x08)
1622               if (vga.read_dipswitch && vga.read_dipswitch(space, 0, mem_mask) & 0x08)
16231623                  data |= 0x10;
16241624               break;
16251625         }
r17964r17965
16971697{
16981698   UINT8 data = 0xff;
16991699   if (CRTC_PORT_ADDR == 0x3d0)
1700      data = vga_crtc_r(space, offset);
1700      data = vga_crtc_r(space, offset, mem_mask);
17011701   if(offset == 8)
17021702   {
17031703      logerror("VGA: 0x3d8 read at %08x\n",space.device().safe_pc());
r17964r17965
17131713      logerror("vga_port_03b0_w(): port=0x%04x data=0x%02x\n", offset + 0x3b0, data);
17141714
17151715   if (CRTC_PORT_ADDR == 0x3b0)
1716      vga_crtc_w(space, offset, data);
1716      vga_crtc_w(space, offset, data, mem_mask);
17171717}
17181718
17191719static void attribute_reg_write(UINT8 index, UINT8 data)
r17964r17965
18761876      logerror("vga_port_03d0_w(): port=0x%04x data=0x%02x\n", offset + 0x3d0, data);
18771877
18781878   if (CRTC_PORT_ADDR == 0x3d0)
1879      vga_crtc_w(space, offset, data);
1879      vga_crtc_w(space, offset, data, mem_mask);
18801880}
18811881
18821882void pc_vga_reset(running_machine &machine)
trunk/src/emu/video/pc_vga.h
r17964r17965
3535void pc_video_start(running_machine &machine);
3636void s3_video_start(running_machine &machine);
3737
38READ8_HANDLER(vga_port_03b0_r);
39READ8_HANDLER(vga_port_03c0_r);
40READ8_HANDLER(vga_port_03d0_r);
41READ8_HANDLER(vga_mem_r);
42WRITE8_HANDLER(vga_port_03b0_w);
43WRITE8_HANDLER(vga_port_03c0_w);
44WRITE8_HANDLER(vga_port_03d0_w);
45WRITE8_HANDLER(vga_mem_w);
38DECLARE_READ8_HANDLER(vga_port_03b0_r);
39DECLARE_READ8_HANDLER(vga_port_03c0_r);
40DECLARE_READ8_HANDLER(vga_port_03d0_r);
41DECLARE_READ8_HANDLER(vga_mem_r);
42DECLARE_WRITE8_HANDLER(vga_port_03b0_w);
43DECLARE_WRITE8_HANDLER(vga_port_03c0_w);
44DECLARE_WRITE8_HANDLER(vga_port_03d0_w);
45DECLARE_WRITE8_HANDLER(vga_mem_w);
4646
4747/* per-device implementations */
48READ8_HANDLER(tseng_et4k_03b0_r);
49WRITE8_HANDLER(tseng_et4k_03b0_w);
50READ8_HANDLER(tseng_et4k_03c0_r);
51WRITE8_HANDLER(tseng_et4k_03c0_w);
52READ8_HANDLER(tseng_et4k_03d0_r);
53WRITE8_HANDLER(tseng_et4k_03d0_w);
54READ8_HANDLER(tseng_mem_r);
55WRITE8_HANDLER(tseng_mem_w);
48DECLARE_READ8_HANDLER(tseng_et4k_03b0_r);
49DECLARE_WRITE8_HANDLER(tseng_et4k_03b0_w);
50DECLARE_READ8_HANDLER(tseng_et4k_03c0_r);
51DECLARE_WRITE8_HANDLER(tseng_et4k_03c0_w);
52DECLARE_READ8_HANDLER(tseng_et4k_03d0_r);
53DECLARE_WRITE8_HANDLER(tseng_et4k_03d0_w);
54DECLARE_READ8_HANDLER(tseng_mem_r);
55DECLARE_WRITE8_HANDLER(tseng_mem_w);
5656
57READ8_HANDLER(trident_03c0_r);
58WRITE8_HANDLER(trident_03c0_w);
59READ8_HANDLER(trident_03d0_r);
60WRITE8_HANDLER(trident_03d0_w);
61READ8_HANDLER(trident_mem_r);
62WRITE8_HANDLER(trident_mem_w);
57DECLARE_READ8_HANDLER(trident_03c0_r);
58DECLARE_WRITE8_HANDLER(trident_03c0_w);
59DECLARE_READ8_HANDLER(trident_03d0_r);
60DECLARE_WRITE8_HANDLER(trident_03d0_w);
61DECLARE_READ8_HANDLER(trident_mem_r);
62DECLARE_WRITE8_HANDLER(trident_mem_w);
6363
64READ8_HANDLER(s3_port_03b0_r);
65WRITE8_HANDLER(s3_port_03b0_w);
66READ8_HANDLER(s3_port_03c0_r);
67WRITE8_HANDLER(s3_port_03c0_w);
68READ8_HANDLER(s3_port_03d0_r);
69WRITE8_HANDLER(s3_port_03d0_w);
70READ16_HANDLER(s3_gpstatus_r);
71WRITE16_HANDLER(s3_cmd_w);
72READ16_HANDLER(ibm8514_ssv_r);
73WRITE16_HANDLER(ibm8514_ssv_w);
74READ16_HANDLER(s3_8ae8_r);
75WRITE16_HANDLER(s3_8ae8_w);
76READ16_HANDLER(s3_8ee8_r);
77WRITE16_HANDLER(s3_8ee8_w);
78READ16_HANDLER(s3_currentx_r);
79WRITE16_HANDLER(s3_currentx_w);
80READ16_HANDLER(s3_currenty_r);
81WRITE16_HANDLER(s3_currenty_w);
82READ16_HANDLER(s3_line_error_r);
83WRITE16_HANDLER(s3_line_error_w);
84READ16_HANDLER(s3_width_r);
85WRITE16_HANDLER(s3_width_w);
86READ16_HANDLER(s3_multifunc_r);
87WRITE16_HANDLER(s3_multifunc_w);
88READ16_HANDLER(s3_fgcolour_r);
89WRITE16_HANDLER(s3_fgcolour_w);
90READ16_HANDLER(s3_bgcolour_r);
91WRITE16_HANDLER(s3_bgcolour_w);
92READ16_HANDLER(s3_backmix_r);
93WRITE16_HANDLER(s3_backmix_w);
94READ16_HANDLER(s3_foremix_r);
95WRITE16_HANDLER(s3_foremix_w);
96READ16_HANDLER(s3_pixel_xfer_r);
97WRITE16_HANDLER(s3_pixel_xfer_w);
98READ8_HANDLER(s3_mem_r);
99WRITE8_HANDLER(s3_mem_w);
64DECLARE_READ8_HANDLER(s3_port_03b0_r);
65DECLARE_WRITE8_HANDLER(s3_port_03b0_w);
66DECLARE_READ8_HANDLER(s3_port_03c0_r);
67DECLARE_WRITE8_HANDLER(s3_port_03c0_w);
68DECLARE_READ8_HANDLER(s3_port_03d0_r);
69DECLARE_WRITE8_HANDLER(s3_port_03d0_w);
70DECLARE_READ16_HANDLER(s3_gpstatus_r);
71DECLARE_WRITE16_HANDLER(s3_cmd_w);
72DECLARE_READ16_HANDLER(ibm8514_ssv_r);
73DECLARE_WRITE16_HANDLER(ibm8514_ssv_w);
74DECLARE_READ16_HANDLER(s3_8ae8_r);
75DECLARE_WRITE16_HANDLER(s3_8ae8_w);
76DECLARE_READ16_HANDLER(s3_8ee8_r);
77DECLARE_WRITE16_HANDLER(s3_8ee8_w);
78DECLARE_READ16_HANDLER(s3_currentx_r);
79DECLARE_WRITE16_HANDLER(s3_currentx_w);
80DECLARE_READ16_HANDLER(s3_currenty_r);
81DECLARE_WRITE16_HANDLER(s3_currenty_w);
82DECLARE_READ16_HANDLER(s3_line_error_r);
83DECLARE_WRITE16_HANDLER(s3_line_error_w);
84DECLARE_READ16_HANDLER(s3_width_r);
85DECLARE_WRITE16_HANDLER(s3_width_w);
86DECLARE_READ16_HANDLER(s3_multifunc_r);
87DECLARE_WRITE16_HANDLER(s3_multifunc_w);
88DECLARE_READ16_HANDLER(s3_fgcolour_r);
89DECLARE_WRITE16_HANDLER(s3_fgcolour_w);
90DECLARE_READ16_HANDLER(s3_bgcolour_r);
91DECLARE_WRITE16_HANDLER(s3_bgcolour_w);
92DECLARE_READ16_HANDLER(s3_backmix_r);
93DECLARE_WRITE16_HANDLER(s3_backmix_w);
94DECLARE_READ16_HANDLER(s3_foremix_r);
95DECLARE_WRITE16_HANDLER(s3_foremix_w);
96DECLARE_READ16_HANDLER(s3_pixel_xfer_r);
97DECLARE_WRITE16_HANDLER(s3_pixel_xfer_w);
98DECLARE_READ8_HANDLER(s3_mem_r);
99DECLARE_WRITE8_HANDLER(s3_mem_w);
100100
101READ8_HANDLER( ati_port_03c0_r );
101DECLARE_READ8_HANDLER( ati_port_03c0_r );
102102DECLARE_READ8_DEVICE_HANDLER(ati_port_ext_r);
103103DECLARE_WRITE8_DEVICE_HANDLER(ati_port_ext_w);
104READ16_HANDLER(ibm8514_gpstatus_r);
105WRITE16_HANDLER(ibm8514_cmd_w);
106READ16_HANDLER(mach8_ext_fifo_r);
107WRITE16_HANDLER(mach8_linedraw_index_w);
108READ16_HANDLER(mach8_bresenham_count_r);
109WRITE16_HANDLER(mach8_bresenham_count_w);
110READ16_HANDLER(mach8_scratch0_r);
111WRITE16_HANDLER(mach8_scratch0_w);
112READ16_HANDLER(mach8_scratch1_r);
113WRITE16_HANDLER(mach8_scratch1_w);
114READ16_HANDLER(mach8_config1_r);
115READ16_HANDLER(mach8_config2_r);
116READ16_HANDLER(mach8_status_r);
117READ16_HANDLER(mach8_substatus_r);
118WRITE16_HANDLER(mach8_subcontrol_w);
119READ16_HANDLER(mach8_subcontrol_r);
120READ16_HANDLER(mach8_htotal_r);
121WRITE16_HANDLER(mach8_htotal_w);
122READ16_HANDLER(mach8_vtotal_r);
123WRITE16_HANDLER(mach8_vtotal_w);
124READ16_HANDLER(mach8_vdisp_r);
125WRITE16_HANDLER(mach8_vdisp_w);
126READ16_HANDLER(mach8_vsync_r);
127WRITE16_HANDLER(mach8_vsync_w);
128WRITE16_HANDLER(mach8_linedraw_w);
129READ16_HANDLER(mach8_ec0_r);
130WRITE16_HANDLER(mach8_ec0_w);
131READ16_HANDLER(mach8_ec1_r);
132WRITE16_HANDLER(mach8_ec1_w);
133READ16_HANDLER(mach8_ec2_r);
134WRITE16_HANDLER(mach8_ec2_w);
135READ16_HANDLER(mach8_ec3_r);
136WRITE16_HANDLER(mach8_ec3_w);
137READ8_HANDLER(ati_mem_r);
138WRITE8_HANDLER(ati_mem_w);
104DECLARE_READ16_HANDLER(ibm8514_gpstatus_r);
105DECLARE_WRITE16_HANDLER(ibm8514_cmd_w);
106DECLARE_READ16_HANDLER(mach8_ext_fifo_r);
107DECLARE_WRITE16_HANDLER(mach8_linedraw_index_w);
108DECLARE_READ16_HANDLER(mach8_bresenham_count_r);
109DECLARE_WRITE16_HANDLER(mach8_bresenham_count_w);
110DECLARE_READ16_HANDLER(mach8_scratch0_r);
111DECLARE_WRITE16_HANDLER(mach8_scratch0_w);
112DECLARE_READ16_HANDLER(mach8_scratch1_r);
113DECLARE_WRITE16_HANDLER(mach8_scratch1_w);
114DECLARE_READ16_HANDLER(mach8_config1_r);
115DECLARE_READ16_HANDLER(mach8_config2_r);
116DECLARE_READ16_HANDLER(mach8_status_r);
117DECLARE_READ16_HANDLER(mach8_substatus_r);
118DECLARE_WRITE16_HANDLER(mach8_subcontrol_w);
119DECLARE_READ16_HANDLER(mach8_subcontrol_r);
120DECLARE_READ16_HANDLER(mach8_htotal_r);
121DECLARE_WRITE16_HANDLER(mach8_htotal_w);
122DECLARE_READ16_HANDLER(mach8_vtotal_r);
123DECLARE_WRITE16_HANDLER(mach8_vtotal_w);
124DECLARE_READ16_HANDLER(mach8_vdisp_r);
125DECLARE_WRITE16_HANDLER(mach8_vdisp_w);
126DECLARE_READ16_HANDLER(mach8_vsync_r);
127DECLARE_WRITE16_HANDLER(mach8_vsync_w);
128DECLARE_WRITE16_HANDLER(mach8_linedraw_w);
129DECLARE_READ16_HANDLER(mach8_ec0_r);
130DECLARE_WRITE16_HANDLER(mach8_ec0_w);
131DECLARE_READ16_HANDLER(mach8_ec1_r);
132DECLARE_WRITE16_HANDLER(mach8_ec1_w);
133DECLARE_READ16_HANDLER(mach8_ec2_r);
134DECLARE_WRITE16_HANDLER(mach8_ec2_w);
135DECLARE_READ16_HANDLER(mach8_ec3_r);
136DECLARE_WRITE16_HANDLER(mach8_ec3_w);
137DECLARE_READ8_HANDLER(ati_mem_r);
138DECLARE_WRITE8_HANDLER(ati_mem_w);
139139
140140
141141/*
trunk/src/emu/devcb.h
r17964r17965
353353// ======================> devcb_resolved_read8
354354
355355// base delegate type for a read8
356typedef delegate<UINT8 (offs_t)> devcb_read8_delegate;
356typedef delegate<UINT8 (offs_t, UINT8)> devcb_read8_delegate;
357357
358358// class which wraps resolving a devcb_read8 into a delegate
359359class devcb_resolved_read8 : public devcb_read8_delegate
r17964r17965
371371   // override parent class' notion of NULL
372372   bool isnull() const { return m_helper.null_indicator == &s_null; }
373373
374   // provide default for mem_mask
375   UINT8 operator()(offs_t offset, UINT8 mem_mask = 0xff) const { return devcb_read8_delegate::operator()(offset, mem_mask); }
376
374377private:
375378   // internal helpers
376   UINT8 from_port(offs_t offset);
377   UINT8 from_read8(offs_t offset);
378   UINT8 from_readline(offs_t offset);
379   UINT8 from_constant(offs_t offset);
379   UINT8 from_port(offs_t offset, UINT8 mem_mask);
380   UINT8 from_read8space(offs_t offset, UINT8 mem_mask);
381   UINT8 from_read8device(offs_t offset, UINT8 mem_mask);
382   UINT8 from_readline(offs_t offset, UINT8 mem_mask);
383   UINT8 from_constant(offs_t offset, UINT8 mem_mask);
380384
381385   // internal state
382386   devcb_resolved_objects         m_object;
r17964r17965
403407// ======================> devcb_resolved_write8
404408
405409// base delegate type for a write8
406typedef delegate<void (offs_t, UINT8)> devcb_write8_delegate;
410typedef delegate<void (offs_t, UINT8, UINT8)> devcb_write8_delegate;
407411
408412// class which wraps resolving a devcb_write8 into a delegate
409413class devcb_resolved_write8 : public devcb_write8_delegate
r17964r17965
421425   // override parent class' notion of NULL
422426   bool isnull() const { return m_helper.null_indicator == &s_null; }
423427
428   // provide default for mem_mask
429   void operator()(offs_t offset, UINT8 data, UINT8 mem_mask = 0xff) const { devcb_write8_delegate::operator()(offset, data, mem_mask); }
430
424431private:
425432   // internal helpers
426   void to_null(offs_t offset, UINT8 data);
427   void to_port(offs_t offset, UINT8 data);
428   void to_write8(offs_t offset, UINT8 data);
429   void to_writeline(offs_t offset, UINT8 data);
430   void to_input(offs_t offset, UINT8 data);
433   void to_null(offs_t offset, UINT8 data, UINT8 mem_mask);
434   void to_port(offs_t offset, UINT8 data, UINT8 mem_mask);
435   void to_write8space(offs_t offset, UINT8 data, UINT8 mem_mask);
436   void to_write8device(offs_t offset, UINT8 data, UINT8 mem_mask);
437   void to_writeline(offs_t offset, UINT8 data, UINT8 mem_mask);
438   void to_input(offs_t offset, UINT8 data, UINT8 mem_mask);
431439
432440   // internal state
433441   devcb_resolved_objects         m_object;
r17964r17965
472480   // override parent class' notion of NULL
473481   bool isnull() const { return m_helper.null_indicator == &s_null; }
474482
483   // provide default for mem_mask
484   UINT16 operator()(offs_t offset, UINT16 mem_mask = 0xffff) const { return devcb_read16_delegate::operator()(offset, mem_mask); }
485
475486private:
476487   // internal helpers
477488   UINT16 from_port(offs_t offset, UINT16 mask);
r17964r17965
522533   // override parent class' notion of NULL
523534   bool isnull() const { return m_helper.null_indicator == &s_null; }
524535
536   // provide default for mem_mask
537   void operator()(offs_t offset, UINT16 data, UINT16 mem_mask = 0xffff) const { devcb_write16_delegate::operator()(offset, data, mem_mask); }
538
525539private:
526540   // internal helpers
527541   void to_null(offs_t offset, UINT16 data, UINT16 mask);
trunk/src/emu/sound/spu.h
r17964r17965
248248extern const device_type SPU;
249249
250250// MAME old-style interface
251READ16_HANDLER( spu_r );
252WRITE16_HANDLER( spu_w );
251DECLARE_READ16_HANDLER( spu_r );
252DECLARE_WRITE16_HANDLER( spu_w );
253253
254254#endif
trunk/src/emu/sound/pokey.h
r17964r17965
347347
348348
349349/* fix me: eventually this should be a single device with pokey subdevices */
350READ8_HANDLER( quad_pokeyn_r );
351WRITE8_HANDLER( quad_pokeyn_w );
350DECLARE_READ8_HANDLER( quad_pokeyn_r );
351DECLARE_WRITE8_HANDLER( quad_pokeyn_w );
352352
353353
354354#endif   /* __POKEY_H__ */
trunk/src/emu/memconv.h
r17964r17965
8989{
9090   UINT16 result = 0;
9191   if (ACCESSING_BITS_8_15)
92      result |= ((UINT16)(*handler)(space, offset * 2 + 0)) << 8;
92      result |= ((UINT16)(*handler)(space, offset * 2 + 0, mem_mask >> 8)) << 8;
9393   if (ACCESSING_BITS_0_7)
94      result |= ((UINT16)(*handler)(space, offset * 2 + 1)) << 0;
94      result |= ((UINT16)(*handler)(space, offset * 2 + 1, mem_mask >> 0)) << 0;
9595   return result;
9696}
9797
r17964r17965
9999INLINE void write16be_with_write8_handler(write8_space_func handler, address_space &space, offs_t offset, UINT16 data, UINT16 mem_mask)
100100{
101101   if (ACCESSING_BITS_8_15)
102      (*handler)(space, offset * 2 + 0, data >> 8);
102      (*handler)(space, offset * 2 + 0, data >> 8, mem_mask >> 8);
103103   if (ACCESSING_BITS_0_7)
104      (*handler)(space, offset * 2 + 1, data >> 0);
104      (*handler)(space, offset * 2 + 1, data >> 0, mem_mask >> 0);
105105}
106106
107107
r17964r17965
115115{
116116   UINT16 result = 0;
117117   if (ACCESSING_BITS_0_7)
118      result |= ((UINT16) (*handler)(space, offset * 2 + 0)) << 0;
118      result |= ((UINT16) (*handler)(space, offset * 2 + 0, mem_mask >> 0)) << 0;
119119   if (ACCESSING_BITS_8_15)
120      result |= ((UINT16) (*handler)(space, offset * 2 + 1)) << 8;
120      result |= ((UINT16) (*handler)(space, offset * 2 + 1, mem_mask >> 8)) << 8;
121121   return result;
122122}
123123
r17964r17965
125125INLINE void write16le_with_write8_handler(write8_space_func handler, address_space &space, offs_t offset, UINT16 data, UINT16 mem_mask)
126126{
127127   if (ACCESSING_BITS_0_7)
128      (*handler)(space, offset * 2 + 0, data >> 0);
128      (*handler)(space, offset * 2 + 0, data >> 0, mem_mask >> 0);
129129   if (ACCESSING_BITS_8_15)
130      (*handler)(space, offset * 2 + 1, data >> 8);
130      (*handler)(space, offset * 2 + 1, data >> 8, mem_mask >> 8);
131131}
132132
133133
trunk/src/emu/memory.c
r17964r17965
49844984         offs_t aoffset = offset * si.m_multiplier + si.m_offset;
49854985         UINT8 val;
49864986         if (m_sub_is_legacy[index])
4987            val = m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset);
4987            val = m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset, submask);
49884988         else
49894989            val = m_subread[index].r8(space, aoffset, submask);
49904990         result |= val << si.m_shift;
r17964r17965
50155015            switch (si.m_size)
50165016            {
50175017            case 8:
5018               val = m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset);
5018               val = m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset, submask);
50195019               break;
50205020            case 16:
50215021               val = m_sublegacy_info[index].handler.space16(*m_sublegacy_info[index].object.space, aoffset, submask);
r17964r17965
50625062            switch (si.m_size)
50635063            {
50645064            case 8:
5065               val = m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset);
5065               val = m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset, submask);
50665066               break;
50675067            case 16:
50685068               val = m_sublegacy_info[index].handler.space16(*m_sublegacy_info[index].object.space, aoffset, submask);
r17964r17965
51015101
51025102UINT8 handler_entry_read::read_stub_legacy(address_space &space, offs_t offset, UINT8 mask)
51035103{
5104   return m_legacy_info.handler.space8(*m_legacy_info.object.space, offset);
5104   return m_legacy_info.handler.space8(*m_legacy_info.object.space, offset, mask);
51055105}
51065106
51075107UINT16 handler_entry_read::read_stub_legacy(address_space &space, offs_t offset, UINT16 mask)
r17964r17965
54385438         offs_t aoffset = offset * si.m_multiplier + si.m_offset;
54395439         UINT8 adata = data >> si.m_shift;
54405440         if (m_sub_is_legacy[index])
5441            m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset, adata);
5441            m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset, adata, submask);
54425442         else
54435443            m_subwrite[index].w8(space, aoffset, adata, submask);
54445444      }
r17964r17965
54665466            switch (si.m_size)
54675467            {
54685468            case 8:
5469               m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset, adata);
5469               m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset, adata, submask);
54705470               break;
54715471            case 16:
54725472               m_sublegacy_info[index].handler.space16(*m_sublegacy_info[index].object.space, aoffset, adata, submask);
r17964r17965
55105510            switch (si.m_size)
55115511            {
55125512            case 8:
5513               m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset, adata);
5513               m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset, adata, submask);
55145514               break;
55155515            case 16:
55165516               m_sublegacy_info[index].handler.space16(*m_sublegacy_info[index].object.space, aoffset, adata, submask);
r17964r17965
55475547
55485548void handler_entry_write::write_stub_legacy(address_space &space, offs_t offset, UINT8 data, UINT8 mask)
55495549{
5550   m_legacy_info.handler.space8(*m_legacy_info.object.space, offset, data);
5550   m_legacy_info.handler.space8(*m_legacy_info.object.space, offset, data, mask);
55515551}
55525552
55535553void handler_entry_write::write_stub_legacy(address_space &space, offs_t offset, UINT16 data, UINT16 mask)
trunk/src/emu/memory.h
r17964r17965
112112
113113
114114// legacy space read/write handlers
115typedef UINT8   (*read8_space_func)  (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset);
116typedef void   (*write8_space_func) (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data);
115typedef UINT8   (*read8_space_func)  (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask);
116typedef void   (*write8_space_func) (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data, ATTR_UNUSED UINT8 mem_mask);
117117typedef UINT16   (*read16_space_func) (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask);
118118typedef void   (*write16_space_func)(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask);
119119typedef UINT32   (*read32_space_func) (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask);
r17964r17965
876876
877877
878878// space read/write handler function macros
879#define READ8_HANDLER(name)          UINT8  name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset)
880#define WRITE8_HANDLER(name)         void   name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data)
879#define READ8_HANDLER(name)          UINT8  name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask)
880#define WRITE8_HANDLER(name)         void   name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data, ATTR_UNUSED UINT8 mem_mask)
881881#define READ16_HANDLER(name)         UINT16 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask)
882882#define WRITE16_HANDLER(name)         void   name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask)
883883#define READ32_HANDLER(name)         UINT32 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask)
r17964r17965
885885#define READ64_HANDLER(name)         UINT64 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask)
886886#define WRITE64_HANDLER(name)         void   name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask)
887887
888#define DECLARE_READ8_HANDLER(name)          UINT8  name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask = 0xff)
889#define DECLARE_WRITE8_HANDLER(name)         void   name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data, ATTR_UNUSED UINT8 mem_mask = 0xff)
890#define DECLARE_READ16_HANDLER(name)         UINT16 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask = 0xffff)
891#define DECLARE_WRITE16_HANDLER(name)         void   name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask = 0xffff)
892#define DECLARE_READ32_HANDLER(name)         UINT32 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask = 0xffffffff)
893#define DECLARE_WRITE32_HANDLER(name)         void   name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask = 0xffffffff)
894#define DECLARE_READ64_HANDLER(name)         UINT64 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask = U64(0xffffffffffffffff))
895#define DECLARE_WRITE64_HANDLER(name)         void   name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask = U64(0xffffffffffffffff))
888896
897
889898// device read/write handler function macros
890899#define READ8_DEVICE_HANDLER(name)      UINT8  name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask)
891900#define WRITE8_DEVICE_HANDLER(name)    void   name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data, ATTR_UNUSED UINT8 mem_mask)
trunk/src/emu/machine/pc16552d.h
r17964r17965
44void pc16552d_init(running_machine &machine, int chip, int frequency, void (* irq_handler)(running_machine &machine, int channel, int value), void (* tx_callback)(running_machine &machine, int channel, int count, UINT8* data));
55void pc16552d_rx_data(running_machine &machine, int chip, int channel, UINT8 data);
66
7READ8_HANDLER(pc16552d_0_r);
8WRITE8_HANDLER(pc16552d_0_w);
9READ8_HANDLER(pc16552d_1_r);
10WRITE8_HANDLER(pc16552d_1_w);
7DECLARE_READ8_HANDLER(pc16552d_0_r);
8DECLARE_WRITE8_HANDLER(pc16552d_0_w);
9DECLARE_READ8_HANDLER(pc16552d_1_r);
10DECLARE_WRITE8_HANDLER(pc16552d_1_w);
1111
1212#endif
trunk/src/emu/machine/latch8.c
r17964r17965
8888         if (latch8->intf->devread[i].read_handler != NULL)
8989         {
9090            res &= ~( 1 << i);
91            res |= ((latch8->intf->devread[i].read_handler(space, 0) >> latch8->intf->devread[i].from_bit) & 0x01) << i;
91            res |= ((latch8->intf->devread[i].read_handler(space, 0, 0xff) >> latch8->intf->devread[i].from_bit) & 0x01) << i;
9292         }
9393      }
9494   }
trunk/src/emu/machine/8042kbdc.h
r17964r17965
3434
3535void kbdc8042_init(running_machine &machine, const struct kbdc8042_interface *intf);
3636
37READ8_HANDLER(kbdc8042_8_r);
38WRITE8_HANDLER(kbdc8042_8_w);
39READ64_HANDLER(kbdc8042_64be_r);
40WRITE64_HANDLER(kbdc8042_64be_w);
37DECLARE_READ8_HANDLER(kbdc8042_8_r);
38DECLARE_WRITE8_HANDLER(kbdc8042_8_w);
39DECLARE_READ64_HANDLER(kbdc8042_64be_r);
40DECLARE_WRITE64_HANDLER(kbdc8042_64be_w);
4141
4242#endif /* KBDC8042_H */
4343
trunk/src/emu/machine/s3c2400.c
r17964r17965
6262   space.install_legacy_readwrite_handler( *device, 0x15800000, 0x15800007, FUNC(s3c24xx_adc_r), FUNC(s3c24xx_adc_w));
6363   space.install_legacy_readwrite_handler( *device, 0x15900000, 0x15900017, FUNC(s3c24xx_spi_0_r), FUNC(s3c24xx_spi_0_w));
6464   space.install_legacy_readwrite_handler( *device, 0x15a00000, 0x15a0003f, FUNC(s3c24xx_mmc_r), FUNC(s3c24xx_mmc_w));
65
65   
6666   s3c24xx_video_start( device, device->machine());
6767}
6868
trunk/src/emu/machine/tmp68301.h
r17964r17965
66MACHINE_RESET( tmp68301 );
77
88// Hardware Registers
9READ16_HANDLER( tmp68301_regs_r );
10WRITE16_HANDLER( tmp68301_regs_w );
9DECLARE_READ16_HANDLER( tmp68301_regs_r );
10DECLARE_WRITE16_HANDLER( tmp68301_regs_w );
1111
1212// Interrupts
1313void tmp68301_external_interrupt_0(running_machine &machine);
trunk/src/emu/machine/s3c2410.c
r17964r17965
6565   space.install_legacy_readwrite_handler( *device, 0x59000000, 0x59000017, FUNC(s3c24xx_spi_0_r), FUNC(s3c24xx_spi_0_w));
6666   space.install_legacy_readwrite_handler( *device, 0x59000020, 0x59000037, FUNC(s3c24xx_spi_1_r), FUNC(s3c24xx_spi_1_w));
6767   space.install_legacy_readwrite_handler( *device, 0x5a000000, 0x5a000043, FUNC(s3c24xx_sdi_r), FUNC(s3c24xx_sdi_w));
68
68   
6969   s3c24xx_video_start( device, device->machine());
7070}
7171
trunk/src/mess/machine/dgn_beta.c
r17964r17965
7373
7474
7575// Ram banking handlers.
76static WRITE8_HANDLER( dgnbeta_ram_b0_w );
77static WRITE8_HANDLER( dgnbeta_ram_b1_w );
78static WRITE8_HANDLER( dgnbeta_ram_b2_w );
79static WRITE8_HANDLER( dgnbeta_ram_b3_w );
80static WRITE8_HANDLER( dgnbeta_ram_b4_w );
81static WRITE8_HANDLER( dgnbeta_ram_b5_w );
82static WRITE8_HANDLER( dgnbeta_ram_b6_w );
83static WRITE8_HANDLER( dgnbeta_ram_b7_w );
84static WRITE8_HANDLER( dgnbeta_ram_b8_w );
85static WRITE8_HANDLER( dgnbeta_ram_b9_w );
86static WRITE8_HANDLER( dgnbeta_ram_bA_w );
87static WRITE8_HANDLER( dgnbeta_ram_bB_w );
88static WRITE8_HANDLER( dgnbeta_ram_bC_w );
89static WRITE8_HANDLER( dgnbeta_ram_bD_w );
90static WRITE8_HANDLER( dgnbeta_ram_bE_w );
91static WRITE8_HANDLER( dgnbeta_ram_bF_w );
92static WRITE8_HANDLER( dgnbeta_ram_bG_w );
76static DECLARE_WRITE8_HANDLER( dgnbeta_ram_b0_w );
77static DECLARE_WRITE8_HANDLER( dgnbeta_ram_b1_w );
78static DECLARE_WRITE8_HANDLER( dgnbeta_ram_b2_w );
79static DECLARE_WRITE8_HANDLER( dgnbeta_ram_b3_w );
80static DECLARE_WRITE8_HANDLER( dgnbeta_ram_b4_w );
81static DECLARE_WRITE8_HANDLER( dgnbeta_ram_b5_w );
82static DECLARE_WRITE8_HANDLER( dgnbeta_ram_b6_w );
83static DECLARE_WRITE8_HANDLER( dgnbeta_ram_b7_w );
84static DECLARE_WRITE8_HANDLER( dgnbeta_ram_b8_w );
85static DECLARE_WRITE8_HANDLER( dgnbeta_ram_b9_w );
86static DECLARE_WRITE8_HANDLER( dgnbeta_ram_bA_w );
87static DECLARE_WRITE8_HANDLER( dgnbeta_ram_bB_w );
88static DECLARE_WRITE8_HANDLER( dgnbeta_ram_bC_w );
89static DECLARE_WRITE8_HANDLER( dgnbeta_ram_bD_w );
90static DECLARE_WRITE8_HANDLER( dgnbeta_ram_bE_w );
91static DECLARE_WRITE8_HANDLER( dgnbeta_ram_bF_w );
92static DECLARE_WRITE8_HANDLER( dgnbeta_ram_bG_w );
9393
9494
9595#define VERBOSE 0
trunk/src/mess/machine/sst39vfx.h
r17964r17965
8484
8585// read/write handler
8686#if 0
87READ8_HANDLER( sst39vfx_r );
88WRITE8_HANDLER( sst39vfx_w );
87DECLARE_READ8_HANDLER( sst39vfx_r );
88DECLARE_WRITE8_HANDLER( sst39vfx_w );
8989#endif
9090
9191// load/save
trunk/src/mess/machine/apple2gs.c
r17964r17965
10131013      case 0x3D:   /* C03D - SOUNDDATA */
10141014      case 0x3E:   /* C03E - SOUNDADRL */
10151015      case 0x3F:   /* C03F - SOUNDADRH */
1016         result = gssnd_r(space, offset & 0x03);
1016         result = gssnd_r(space, offset & 0x03, mem_mask);
10171017         break;
10181018
10191019      case 0x41:   /* C041 - INTEN */
r17964r17965
11741174      case 0x3D:   /* C03D - SOUNDDATA */
11751175      case 0x3E:   /* C03E - SOUNDADRL */
11761176      case 0x3F:   /* C03F - SOUNDADRH */
1177         gssnd_w(space, offset & 0x03, data);
1177         gssnd_w(space, offset & 0x03, data, mem_mask);
11781178         break;
11791179
11801180      case 0x41:   /* C041 - INTEN */
r17964r17965
17631763   state->m_slowmem[offset] = data;
17641764}
17651765
1766static WRITE8_HANDLER( apple2gs_E004xx_w ) { apple2gs_Exxxxx_w(space, offset + 0x00400, data); }
1767static WRITE8_HANDLER( apple2gs_E02xxx_w ) { apple2gs_Exxxxx_w(space, offset + 0x02000, data); }
1768static WRITE8_HANDLER( apple2gs_E104xx_w ) { apple2gs_Exxxxx_w(space, offset + 0x10400, data); }
1769static WRITE8_HANDLER( apple2gs_E12xxx_w ) { apple2gs_Exxxxx_w(space, offset + 0x12000, data); }
1766static WRITE8_HANDLER( apple2gs_E004xx_w ) { apple2gs_Exxxxx_w(space, offset + 0x00400, data, mem_mask); }
1767static WRITE8_HANDLER( apple2gs_E02xxx_w ) { apple2gs_Exxxxx_w(space, offset + 0x02000, data, mem_mask); }
1768static WRITE8_HANDLER( apple2gs_E104xx_w ) { apple2gs_Exxxxx_w(space, offset + 0x10400, data, mem_mask); }
1769static WRITE8_HANDLER( apple2gs_E12xxx_w ) { apple2gs_Exxxxx_w(space, offset + 0x12000, data, mem_mask); }
17701770
17711771static WRITE8_HANDLER( apple2gs_slowmem_w )
17721772{
trunk/src/mess/machine/lux21046.c
r17964r17965
223223   m_maincpu->set_input_line(INPUT_LINE_IRQ0, m_fdc_irq | m_dma_irq);
224224}
225225
226static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
227static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
226static UINT8 memory_read_byte(address_space &space, offs_t address, UINT8 mem_mask) { return space.read_byte(address); }
227static void memory_write_byte(address_space &space, offs_t address, UINT8 data, UINT8 mem_mask) { space.write_byte(address, data); }
228228
229229static Z80DMA_INTERFACE( dma_intf )
230230{
trunk/src/mess/machine/nes_mmc.c
r17964r17965
137137#define LOG_FDS(x) do { if (VERBOSE) logerror x; } while (0)
138138
139139static void ffe_irq( device_t *device, int scanline, int vblank, int blanked );
140static WRITE8_HANDLER( mapper6_l_w );
141static WRITE8_HANDLER( mapper6_w );
142static WRITE8_HANDLER( mapper8_w );
143static WRITE8_HANDLER( mapper17_l_w );
140static DECLARE_WRITE8_HANDLER( mapper6_l_w );
141static DECLARE_WRITE8_HANDLER( mapper6_w );
142static DECLARE_WRITE8_HANDLER( mapper8_w );
143static DECLARE_WRITE8_HANDLER( mapper17_l_w );
144144
145145/*************************************************************
146146
r17964r17965
222222   nes_state *state = space.machine().driver_data<nes_state>();
223223
224224   if (state->m_mmc_write_low)
225      (*state->m_mmc_write_low)(space, offset, data);
225      (*state->m_mmc_write_low)(space, offset, data, mem_mask);
226226   else
227227      logerror("Unimplemented LOW mapper write, offset: %04x, data: %02x\n", offset + 0x4100, data);
228228}
r17964r17965
232232   nes_state *state = space.machine().driver_data<nes_state>();
233233
234234   if (state->m_mmc_read_low)
235      return (*state->m_mmc_read_low)(space, offset);
235      return (*state->m_mmc_read_low)(space, offset, mem_mask);
236236   else
237237      logerror("Unimplemented LOW mapper read, offset: %04x\n", offset + 0x4100);
238238
trunk/src/mess/machine/nes_mmc.h
r17964r17965
117117int nes_pcb_reset(running_machine &machine);
118118
119119
120WRITE8_HANDLER( nes_low_mapper_w );
121READ8_HANDLER( nes_low_mapper_r );
122WRITE8_HANDLER( nes_chr_w );
123READ8_HANDLER( nes_chr_r );
124WRITE8_HANDLER( nes_nt_w );
125READ8_HANDLER( nes_nt_r );
120DECLARE_WRITE8_HANDLER( nes_low_mapper_w );
121DECLARE_READ8_HANDLER( nes_low_mapper_r );
122DECLARE_WRITE8_HANDLER( nes_chr_w );
123DECLARE_READ8_HANDLER( nes_chr_r );
124DECLARE_WRITE8_HANDLER( nes_nt_w );
125DECLARE_READ8_HANDLER( nes_nt_r );
126126
127WRITE8_HANDLER( smb2jb_extra_w );
128WRITE8_HANDLER( ks7017_extra_w );
129READ8_HANDLER( ks7017_extra_r );
130WRITE8_HANDLER( unl_6035052_extra_w );
131READ8_HANDLER( unl_6035052_extra_r );
132READ8_HANDLER( waixing_sh2_chr_r );
127DECLARE_WRITE8_HANDLER( smb2jb_extra_w );
128DECLARE_WRITE8_HANDLER( ks7017_extra_w );
129DECLARE_READ8_HANDLER( ks7017_extra_r );
130DECLARE_WRITE8_HANDLER( unl_6035052_extra_w );
131DECLARE_READ8_HANDLER( unl_6035052_extra_r );
132DECLARE_READ8_HANDLER( waixing_sh2_chr_r );
133133
134134//TEMPORARY PPU STUFF
135135
trunk/src/mess/machine/pc_joy.h
r17964r17965
1111
1212#include "emu.h"
1313
14READ8_HANDLER ( pc_JOY_r );
15WRITE8_HANDLER ( pc_JOY_w );
14DECLARE_READ8_HANDLER ( pc_JOY_r );
15DECLARE_WRITE8_HANDLER ( pc_JOY_w );
1616
1717INPUT_PORTS_EXTERN( pc_joystick_none );
1818INPUT_PORTS_EXTERN( pc_joystick );
trunk/src/mess/machine/partner.c
r17964r17965
366366   i8257_hlda_w(device, state);
367367}
368368
369static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
370static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
369static UINT8 memory_read_byte(address_space &space, offs_t address, UINT8 mem_mask) { return space.read_byte(address); }
370static void memory_write_byte(address_space &space, offs_t address, UINT8 data, UINT8 mem_mask) { space.write_byte(address, data); }
371371
372372I8257_INTERFACE( partner_dma )
373373{
trunk/src/mess/machine/pc_fdc.c
r17964r17965
531531      case 1:   /* n/a */
532532         break;
533533      case 2:
534         pc_fdc_dor_w(space, 0, data);
534         pc_fdc_dor_w(space, 0, data, mem_mask);
535535         break;
536536      case 3:
537537         /* tape drive select? */
r17964r17965
568568   switch(offset)
569569   {
570570      case 2:
571         pcjr_fdc_dor_w( space, 0, data );
571         pcjr_fdc_dor_w( space, 0, data, mem_mask );
572572         break;
573573      case 4:
574574      case 7:
trunk/src/mess/machine/pc_fdc.h
r17964r17965
4343int   pc_fdc_dack_r(running_machine &machine, address_space &space);
4444void pc_fdc_dack_w(running_machine &machine, address_space &space, int data);
4545
46READ8_HANDLER(pc_fdc_r);
47WRITE8_HANDLER(pc_fdc_w);
48WRITE8_HANDLER ( pcjr_fdc_w );
46DECLARE_READ8_HANDLER(pc_fdc_r);
47DECLARE_WRITE8_HANDLER(pc_fdc_w);
48DECLARE_WRITE8_HANDLER ( pcjr_fdc_w );
4949
5050#endif /* PC_FDC_H */
5151
trunk/src/mess/machine/sgi.h
r17964r17965
1111
1212void sgi_mc_init(running_machine &machine);
1313
14READ32_HANDLER(sgi_mc_r);
15WRITE32_HANDLER(sgi_mc_w);
14DECLARE_READ32_HANDLER(sgi_mc_r);
15DECLARE_WRITE32_HANDLER(sgi_mc_w);
1616
1717
1818#endif /* _SGIMC_H */
trunk/src/mess/machine/c65.c
r17964r17965
217217/* processor has only 1 mega address space !? */
218218/* and system 8 megabyte */
219219/* dma controller and bankswitch hardware ?*/
220static DECLARE_READ8_HANDLER( c65_read_mem );
220221static READ8_HANDLER( c65_read_mem )
221222{
222223   c65_state *state = space.machine().driver_data<c65_state>();
r17964r17965
228229   return result;
229230}
230231
232static DECLARE_WRITE8_HANDLER( c65_write_mem );
231233static WRITE8_HANDLER( c65_write_mem )
232234{
233235   c65_state *state = space.machine().driver_data<c65_state>();
r17964r17965
659661         c65_fdc_w(space.machine(), offset&0x1f,data);
660662      else
661663      {
662         c65_ram_expansion_w(space, offset&0x1f, data);
664         c65_ram_expansion_w(space, offset&0x1f, data, mem_mask);
663665         /*ram expansion crtl optional */
664666      }
665667      break;
r17964r17965
723725         return c65_fdc_r(space.machine(), offset&0x1f);
724726      else
725727      {
726         return c65_ram_expansion_r(space, offset&0x1f);
728         return c65_ram_expansion_r(space, offset&0x1f, mem_mask);
727729         /*return; ram expansion crtl optional */
728730      }
729731      break;
trunk/src/mess/machine/990_hd.h
r17964r17965
1010
1111void ti990_hdc_init(running_machine &machine, void (*interrupt_callback)(running_machine &machine, int state));
1212
13READ16_HANDLER(ti990_hdc_r);
14WRITE16_HANDLER(ti990_hdc_w);
13DECLARE_READ16_HANDLER(ti990_hdc_r);
14DECLARE_WRITE16_HANDLER(ti990_hdc_w);
1515
1616MACHINE_CONFIG_EXTERN( ti990_hdc );
1717
trunk/src/mess/machine/radio86.c
r17964r17965
140140   i8257_hlda_w(device, state);
141141}
142142
143static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
144static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
143static UINT8 memory_read_byte(address_space &space, offs_t address, UINT8 mem_mask) { return space.read_byte(address); }
144static void memory_write_byte(address_space &space, offs_t address, UINT8 data, UINT8 mem_mask) { space.write_byte(address, data); }
145145
146146I8257_INTERFACE( radio86_dma )
147147{
trunk/src/mess/machine/ti990.h
r17964r17965
1414
1515void ti990_hold_load(running_machine &machine);
1616
17 READ8_HANDLER ( ti990_panel_read );
18WRITE8_HANDLER ( ti990_panel_write );
17 DECLARE_READ8_HANDLER ( ti990_panel_read );
18DECLARE_WRITE8_HANDLER ( ti990_panel_write );
1919
2020void ti990_line_interrupt(running_machine &machine);
2121void ti990_ckon_ckof_callback(device_t *device, int state);
trunk/src/mess/machine/thomflop.c
r17964r17965
18241824   {
18251825
18261826   case 1:
1827      return to7_5p14sd_r( space, offset );
1827      return to7_5p14sd_r( space, offset, mem_mask );
18281828
18291829   case 2:
1830      return to7_5p14_r( space, offset );
1830      return to7_5p14_r( space, offset, mem_mask );
18311831
18321832   case 3:
18331833      return thmfc_floppy_r( space, offset );
18341834
18351835   case 4:
1836      return to7_qdd_r( space, offset );
1836      return to7_qdd_r( space, offset, mem_mask );
18371837
18381838   case 5:
1839      return to7_network_r( space, offset );
1839      return to7_network_r( space, offset, mem_mask );
18401840   }
18411841
18421842   return 0;
r17964r17965
18501850   {
18511851
18521852   case 1:
1853      to7_5p14sd_w( space, offset, data );
1853      to7_5p14sd_w( space, offset, data, mem_mask );
18541854      return;
18551855
18561856   case 2:
1857      to7_5p14_w( space, offset, data );
1857      to7_5p14_w( space, offset, data, mem_mask );
18581858      break;
18591859
18601860   case 3:
r17964r17965
18691869      break;
18701870
18711871   case 4:
1872      to7_qdd_w( space, offset, data );
1872      to7_qdd_w( space, offset, data, mem_mask );
18731873      break;
18741874
18751875   case 5:
1876      to7_network_w( space, offset, data );
1876      to7_network_w( space, offset, data, mem_mask );
18771877      break;
18781878   }
18791879}
r17964r17965
19181918   if ( THOM_FLOPPY_EXT )
19191919      return to7_floppy_r( space, offset );
19201920   else
1921      return  to7_5p14_r( space, offset );
1921      return  to7_5p14_r( space, offset, mem_mask );
19221922}
19231923
19241924WRITE8_HANDLER ( to9_floppy_w )
r17964r17965
19261926   if ( THOM_FLOPPY_EXT )
19271927      to7_floppy_w( space, offset, data );
19281928   else
1929      to7_5p14_w( space, offset, data );
1929      to7_5p14_w( space, offset, data, mem_mask );
19301930}
19311931
19321932WRITE_LINE_DEVICE_HANDLER(thomson_index_callback)
trunk/src/mess/machine/thomflop.h
r17964r17965
3333/* external controllers */
3434extern void to7_floppy_init  ( running_machine &machine, void* base );
3535extern void to7_floppy_reset ( running_machine &machine );
36extern READ8_HANDLER  ( to7_floppy_r );
37extern WRITE8_HANDLER ( to7_floppy_w );
36extern DECLARE_READ8_HANDLER  ( to7_floppy_r );
37extern DECLARE_WRITE8_HANDLER ( to7_floppy_w );
3838
3939/* TO9 internal (WD2793) & external controllers */
4040extern void to9_floppy_init  ( running_machine &machine, void* int_base, void* ext_base );
4141extern void to9_floppy_reset ( running_machine &machine );
42extern READ8_HANDLER  ( to9_floppy_r );
43extern WRITE8_HANDLER ( to9_floppy_w );
42extern DECLARE_READ8_HANDLER  ( to9_floppy_r );
43extern DECLARE_WRITE8_HANDLER ( to9_floppy_w );
4444
4545/* TO8 internal (THMFC1) controller */
4646extern void thmfc_floppy_init  ( running_machine &machine );
4747extern void thmfc_floppy_reset ( running_machine &machine );
48extern READ8_HANDLER  ( thmfc_floppy_r );
49extern WRITE8_HANDLER ( thmfc_floppy_w );
48extern DECLARE_READ8_HANDLER  ( thmfc_floppy_r );
49extern DECLARE_WRITE8_HANDLER ( thmfc_floppy_w );
5050
5151extern WRITE_LINE_DEVICE_HANDLER(thomson_index_callback);
5252
trunk/src/mess/machine/990_dk.h
r17964r17965
55
66void fd800_machine_init(running_machine &machine, void (*interrupt_callback)(running_machine &machine, int state));
77
8extern  READ8_HANDLER(fd800_cru_r);
9extern WRITE8_HANDLER(fd800_cru_w);
8extern  DECLARE_READ8_HANDLER(fd800_cru_r);
9extern DECLARE_WRITE8_HANDLER(fd800_cru_w);
1010
trunk/src/mess/machine/nes_pcb.c
r17964r17965
12091209         prg16_89ab(space.machine(), data);
12101210         break;
12111211      default:
1212         pxrom_w(space, offset, data);
1212         pxrom_w(space, offset, data, mem_mask);
12131213         break;
12141214   }
12151215}
r17964r17965
14511451         break;
14521452
14531453      default:
1454         txrom_w(space, offset, data);
1454         txrom_w(space, offset, data, mem_mask);
14551455         break;
14561456   }
14571457}
r17964r17965
15041504         break;
15051505
15061506      default:
1507         txrom_w(space, offset, data);
1507         txrom_w(space, offset, data, mem_mask);
15081508         break;
15091509   }
15101510}
r17964r17965
15821582         break;
15831583
15841584      default:
1585         txrom_w(space, offset, data);
1585         txrom_w(space, offset, data, mem_mask);
15861586         break;
15871587   }
15881588}
r17964r17965
26182618   if (!(offset & 1))
26192619      set_nt_mirroring(space.machine(), BIT(data, 6) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW);
26202620
2621   dxrom_w(space, offset, data);
2621   dxrom_w(space, offset, data, mem_mask);
26222622}
26232623
26242624/*************************************************************
r17964r17965
28842884   LOG_MMC(("lz93d50_m_w, offset: %04x, data: %02x\n", offset, data));
28852885
28862886   if (!state->m_battery && !state->m_wram)
2887      lz93d50_w(space, offset & 0x0f, data);
2887      lz93d50_w(space, offset & 0x0f, data, mem_mask);
28882888   else if (state->m_battery)
28892889      state->m_battery_ram[offset] = data;
28902890   else
r17964r17965
29212921         fjump2_set_prg(space.machine());
29222922         break;
29232923      default:
2924         lz93d50_m_w(space, offset & 0x0f, data);
2924         lz93d50_m_w(space, offset & 0x0f, data, mem_mask);
29252925         break;
29262926   }
29272927}
r17964r17965
41674167      case 0x2001:
41684168      case 0x2002:
41694169      case 0x2003:
4170         tc0190fmc_w(space, offset, data);
4170         tc0190fmc_w(space, offset, data, mem_mask);
41714171         break;
41724172      case 0x4000:
41734173         state->m_IRQ_count_latch = (0x100 - data) & 0xff;
r17964r17965
42904290         break;
42914291   }
42924292
4293   x1005_m_w(space, offset, data);
4293   x1005_m_w(space, offset, data, mem_mask);
42944294}
42954295
42964296/*************************************************************
r17964r17965
57695769   switch (offset & 0x6003)
57705770   {
57715771      case 0x0000:
5772         txrom_w(space, offset, data);
5772         txrom_w(space, offset, data, mem_mask);
57735773         mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
57745774         break;
57755775
r17964r17965
57785778                        | (BIT(data, 3) << 2) | (BIT(data, 4) << 1) | BIT(data, 5);
57795779         if (!state->m_mmc_reg[7])
57805780            kay_pp_update_regs(space.machine());
5781         txrom_w(space, offset, data);
5781         txrom_w(space, offset, data, mem_mask);
57825782         mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
57835783         break;
57845784
57855785      case 0x0003:
57865786         state->m_mmc_reg[5] = data;
57875787         kay_pp_update_regs(space.machine());
5788         txrom_w(space, 0x0000, data);
5788         txrom_w(space, 0x0000, data, mem_mask);
57895789         mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
57905790         break;
57915791
57925792      default:
5793         txrom_w(space, offset, data);
5793         txrom_w(space, offset, data, mem_mask);
57945794         break;
57955795   }
57965796}
r17964r17965
59855985{
59865986   LOG_MMC(("nitra_w, offset: %04x, data: %02x\n", offset, data));
59875987
5988   txrom_w(space, (offset & 0x6000) | ((offset & 0x400) >> 10), offset & 0xff);
5988   txrom_w(space, (offset & 0x6000) | ((offset & 0x400) >> 10), offset & 0xff, mem_mask);
59895989}
59905990
59915991/*************************************************************
r17964r17965
63876387            break;
63886388
63896389         default:
6390            txrom_w(space, offset, data);
6390            txrom_w(space, offset, data, mem_mask);
63916391            break;
63926392      }
63936393   }
r17964r17965
68116811{
68126812   LOG_MMC(("tcu01_m_w, offset: %04x, data: %02x\n", offset, data));
68136813
6814   tcu01_l_w(space, (offset + 0x100) & 0xfff, data);
6814   tcu01_l_w(space, (offset + 0x100) & 0xfff, data, mem_mask);
68156815}
68166816
68176817static WRITE8_HANDLER( tcu01_w )
68186818{
68196819   LOG_MMC(("tcu01_w, offset: %04x, data: %02x\n", offset, data));
68206820
6821   tcu01_l_w(space, (offset + 0x100) & 0xfff, data);
6821   tcu01_l_w(space, (offset + 0x100) & 0xfff, data, mem_mask);
68226822}
68236823
68246824/*************************************************************
r17964r17965
70477047   {
70487048      case 0x0000:
70497049         if (!state->m_mmc_reg[2])
7050            txrom_w(space, 0x0000, data);
7050            txrom_w(space, 0x0000, data, mem_mask);
70517051         break;
70527052
70537053      case 0x0001:
70547054         if (!state->m_mmc_reg[2])
7055            txrom_w(space, 0x0001, data);
7055            txrom_w(space, 0x0001, data, mem_mask);
70567056         else if (state->m_mmc_reg[3] && ((state->m_mmc_reg[0] & 0x80) == 0 || (state->m_mmc_latch1 & 0x07) < 6))   // if we use the prg16 banks and cmd=6,7 DON'T enter!
70577057         {
70587058            state->m_mmc_reg[3] = 0;
7059            txrom_w(space, 0x0001, data);
7059            txrom_w(space, 0x0001, data, mem_mask);
70607060         }
70617061         break;
70627062
70637063      case 0x2000:
70647064         if (!state->m_mmc_reg[2])
7065            txrom_w(space, 0x2000, data);
7065            txrom_w(space, 0x2000, data, mem_mask);
70667066         else
70677067         {
70687068            data = (data & 0xc0) | conv_table[data & 0x07];
70697069            state->m_mmc_reg[3] = 1;
7070            txrom_w(space, 0x0000, data);
7070            txrom_w(space, 0x0000, data, mem_mask);
70717071            break;
70727072         }
70737073         break;
70747074
70757075      case 0x4000:
70767076         if (!state->m_mmc_reg[2])
7077            txrom_w(space, 0x4000, data);
7077            txrom_w(space, 0x4000, data, mem_mask);
70787078         else
70797079            set_nt_mirroring(space.machine(), ((data >> 7) | data) & 0x01 ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
70807080         break;
70817081
70827082      case 0x4001:
70837083         if (!state->m_mmc_reg[2])
7084            txrom_w(space, 0x4001, data);
7084            txrom_w(space, 0x4001, data, mem_mask);
70857085         else
7086            txrom_w(space, 0x6001, data);
7086            txrom_w(space, 0x6001, data, mem_mask);
70877087         break;
70887088
70897089      case 0x6001:
70907090         if (!state->m_mmc_reg[2])
7091            txrom_w(space, 0x6001, data);
7091            txrom_w(space, 0x6001, data, mem_mask);
70927092         else
70937093         {
7094            txrom_w(space, 0x4000, data);
7095            txrom_w(space, 0x4001, data);
7094            txrom_w(space, 0x4000, data, mem_mask);
7095            txrom_w(space, 0x4001, data, mem_mask);
70967096         }
70977097         break;
70987098
70997099      default:
7100         txrom_w(space, offset, data);
7100         txrom_w(space, offset, data, mem_mask);
71017101         break;
71027102   }
71037103}
r17964r17965
71497149         case 0x2000:
71507150            state->m_map114_reg_enabled = 1;
71517151            data = (data & 0xc0) | conv_table[data & 0x07];
7152            txrom_w(space, 0x0000, data);
7152            txrom_w(space, 0x0000, data, mem_mask);
71537153            break;
71547154         case 0x4000:
71557155            if (state->m_map114_reg_enabled && (state->m_map114_reg & 0x80) == 0)
71567156            {
71577157               state->m_map114_reg_enabled = 0;
7158               txrom_w(space, 0x0001, data);
7158               txrom_w(space, 0x0001, data, mem_mask);
71597159            }
71607160            break;
71617161      }
r17964r17965
71657165      switch (offset & 0x03)
71667166      {
71677167         case 0x02:
7168            txrom_w(space, 0x6000, data);
7168            txrom_w(space, 0x6000, data, mem_mask);
71697169            break;
71707170         case 0x03:
7171            txrom_w(space, 0x6001, data);
7172            txrom_w(space, 0x4000, data);
7173            txrom_w(space, 0x4001, data);
7171            txrom_w(space, 0x6001, data, mem_mask);
7172            txrom_w(space, 0x4000, data, mem_mask);
7173            txrom_w(space, 0x4001, data, mem_mask);
71747174            break;
71757175      }
71767176   }
r17964r17965
74527452         break;
74537453
74547454      default:
7455         tengen_800032_w(space, offset, data);
7455         tengen_800032_w(space, offset, data, mem_mask);
74567456         break;
74577457   }
74587458}
r17964r17965
75777577{
75787578   LOG_MMC(("txctw_m_w, offset: %04x, data: %04x\n", offset, data));
75797579
7580   txc_tw_l_w(space, offset & 0xff, data);   // offset does not really count for this mapper
7580   txc_tw_l_w(space, offset & 0xff, data, mem_mask);   // offset does not really count for this mapper
75817581}
75827582
75837583/* writes to 0x8000-0xffff are like MMC3 but no PRG bankswitch (beacuse it is handled by low writes) */
r17964r17965
77057705         break;
77067706
77077707      default:
7708         txrom_w(space, offset, data);
7708         txrom_w(space, offset, data, mem_mask);
77097709         break;
77107710   }
77117711}
r17964r17965
78297829            mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
78307830         }
78317831         else
7832            waixing_a_w(space, offset, data);
7832            waixing_a_w(space, offset, data, mem_mask);
78337833         break;
78347834
78357835      default:
7836         waixing_a_w(space, offset, data);
7836         waixing_a_w(space, offset, data, mem_mask);
78377837         break;
78387838   }
78397839}
r17964r17965
79197919         break;
79207920
79217921      default:
7922         waixing_a_w(space, offset, data);
7922         waixing_a_w(space, offset, data, mem_mask);
79237923         break;
79247924   }
79257925}
r17964r17965
79617961            state->m_mmc_prg_base = (data << 5) & 0x40;
79627962            state->m_mmc_prg_mask = 0x3f;
79637963            mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
7964            txrom_w(space, offset, data);
7964            txrom_w(space, offset, data, mem_mask);
79657965         default:
7966            txrom_w(space, offset, data);
7966            txrom_w(space, offset, data, mem_mask);
79677967            break;
79687968         }
79697969         break;
r17964r17965
79727972         break;
79737973
79747974      default:
7975         txrom_w(space, offset, data);
7975         txrom_w(space, offset, data, mem_mask);
79767976         break;
79777977   }
79787978}
r17964r17965
83998399      case 0x3000:
84008400         state->m_mmc_reg[2] = 1;
84018401         data = (data & 0xc0) | conv_table[data & 0x07];
8402         txrom_w(space, 0x0000, data);
8402         txrom_w(space, 0x0000, data, mem_mask);
84038403         break;
84048404
84058405      case 0x4000:
r17964r17965
84078407         if (state->m_mmc_reg[2])
84088408         {
84098409            state->m_mmc_reg[2] = 0;
8410            txrom_w(space, 0x0001, data);
8410            txrom_w(space, 0x0001, data, mem_mask);
84118411         }
84128412         break;
84138413
r17964r17965
84158415         break;
84168416
84178417      case 0x7000:
8418         txrom_w(space, 0x6001, data);
8419         txrom_w(space, 0x4000, data);
8420         txrom_w(space, 0x4001, data);
8418         txrom_w(space, 0x6001, data, mem_mask);
8419         txrom_w(space, 0x4000, data, mem_mask);
8420         txrom_w(space, 0x4001, data, mem_mask);
84218421         break;
84228422   }
84238423}
r17964r17965
85388538   if (offset == 0x1000)
85398539   {
85408540      data = unl_kof97_unscramble(data);
8541      txrom_w(space, 0x0001, data);
8541      txrom_w(space, 0x0001, data, mem_mask);
85428542   }
85438543   else if (offset == 0x2000)
85448544   {
85458545      data = unl_kof97_unscramble(data);
8546      txrom_w(space, 0x0000, data);
8546      txrom_w(space, 0x0000, data, mem_mask);
85478547   }
85488548   else if (offset == 0x5000)
85498549   {
85508550      data = unl_kof97_unscramble(data);
8551      txrom_w(space, 0x4001, data);
8551      txrom_w(space, 0x4001, data, mem_mask);
85528552   }
85538553   else if (offset == 0x7000)
85548554   {
85558555      data = unl_kof97_unscramble(data);
8556      txrom_w(space, 0x6001, data);
8556      txrom_w(space, 0x6001, data, mem_mask);
85578557   }
85588558   else      /* Other addresses behaves like MMC3, up to unscrambling data */
85598559   {
r17964r17965
85688568         case 0x2000:   /* are these ever called?!? */
85698569         case 0x2001:
85708570            data = unl_kof97_unscramble(data);
8571            txrom_w(space, offset, data);
8571            txrom_w(space, offset, data, mem_mask);
85728572            break;
85738573      }
85748574   }
r17964r17965
85908590{
85918591   LOG_MMC(("ks7057_w, offset: %04x, data: %02x\n", offset, data));
85928592   offset = (BIT(offset, 0) << 1) | BIT(offset, 1) | (offset & ~0x03);
8593   txrom_w(space, offset, data);
8593   txrom_w(space, offset, data, mem_mask);
85948594}
85958595
85968596/*************************************************************
r17964r17965
87858785   {
87868786      case 0x0000:
87878787         state->m_mmc_reg[2] = 1;
8788         txrom_w(space, 0x0000, data);
8788         txrom_w(space, 0x0000, data, mem_mask);
87898789         break;
87908790
87918791      case 0x0001:
87928792         if (state->m_mmc_reg[2])
8793            txrom_w(space, 0x0001, data);
8793            txrom_w(space, 0x0001, data, mem_mask);
87948794         break;
87958795
87968796      case 0x0002:
r17964r17965
88068806         break;
88078807
88088808      default:
8809         txrom_w(space, offset, data);
8809         txrom_w(space, offset, data, mem_mask);
88108810         break;
88118811   }
88128812}
r17964r17965
91729172         break;
91739173
91749174      default:
9175         txrom_w(space, offset, data);
9175         txrom_w(space, offset, data, mem_mask);
91769176         break;
91779177   }
91789178}
r17964r17965
92909290{
92919291   LOG_MMC(("btl_smb11_w, offset: %04x, data: %02x\n", offset, data));
92929292
9293   txrom_w(space, (offset & 0x6000) | ((offset & 0x04) >> 2), data);
9293   txrom_w(space, (offset & 0x6000) | ((offset & 0x04) >> 2), data, mem_mask);
92949294}
92959295
92969296/*************************************************************
r17964r17965
95899589      case 0x2000:
95909590         state->m_mmc_reg[0] = 0;
95919591      default:
9592         txrom_w(space, offset, data);
9592         txrom_w(space, offset, data, mem_mask);
95939593         break;
95949594   }
95959595}
r17964r17965
97599759               fk23c_set_chr(space.machine());
97609760            }
97619761            else
9762               txrom_w(space, offset, data);
9762               txrom_w(space, offset, data, mem_mask);
97639763            break;
97649764
97659765         case 0x2000:
r17964r17965
97679767            break;
97689768
97699769         default:
9770            txrom_w(space, offset, data);
9770            txrom_w(space, offset, data, mem_mask);
97719771            break;
97729772      }
97739773   }
r17964r17965
1068410684         break;
1068510685
1068610686      default:
10687         txrom_w(space, offset, data);
10687         txrom_w(space, offset, data, mem_mask);
1068810688         break;
1068910689   }
1069010690}
r17964r17965
1103311033            break;
1103411034
1103511035         default:
11036            txrom_w(space, offset, data);
11036            txrom_w(space, offset, data, mem_mask);
1103711037            break;
1103811038      }
1103911039   }
r17964r17965
1104211042      switch (offset & 0x6001)
1104311043      {
1104411044         case 0x0000:
11045            txrom_w(space, 0x4000, data);
11045            txrom_w(space, 0x4000, data, mem_mask);
1104611046            break;
1104711047
1104811048         case 0x0001:
r17964r17965
1108811088            break;
1108911089
1109011090         default:
11091            txrom_w(space, offset, data);
11091            txrom_w(space, offset, data, mem_mask);
1109211092            break;
1109311093      }
1109411094   }
r17964r17965
1138211382   switch (offset & 0x6001)
1138311383   {
1138411384      case 0x0000:
11385         txrom_w(space, 0x0000, (data & 0xc0) | conv_table[data & 0x07]);
11385         txrom_w(space, 0x0000, (data & 0xc0) | conv_table[data & 0x07], mem_mask);
1138611386         break;
1138711387
1138811388      default:
11389         txrom_w(space, offset, data);
11389         txrom_w(space, offset, data, mem_mask);
1139011390         break;
1139111391   }
1139211392}
r17964r17965
1180211802
1180311803   switch (state->m_mmc_cmd1)
1180411804   {
11805      case 0x00: someri_vrc2_w(space, offset, data); break;
11806      case 0x01: someri_mmc3_w(space, offset, data); break;
11807      case 0x02: someri_mmc1_w(space, offset, data); break;
11805      case 0x00: someri_vrc2_w(space, offset, data, mem_mask); break;
11806      case 0x01: someri_mmc3_w(space, offset, data, mem_mask); break;
11807      case 0x02: someri_mmc1_w(space, offset, data, mem_mask); break;
1180811808   }
1180911809}
1181011810
trunk/src/mess/machine/concept.c
r17964r17965
276276         {
277277            int slot = ((offset >> 4) & 7) - 1;
278278            if (m_expansion_slots[slot].reg_read)
279               return m_expansion_slots[slot].reg_read(space, offset & 0xf);
279               return m_expansion_slots[slot].reg_read(space, offset & 0xf, mem_mask);
280280         }
281281         break;
282282
r17964r17965
299299         int slot = ((offset >> 8) & 7) - 1;
300300         LOG(("concept_io_r: Slot ROM memory accessed for slot %d at address 0x03%4.4x\n", slot, offset << 1));
301301         if (m_expansion_slots[slot].rom_read)
302            return m_expansion_slots[slot].rom_read(space, offset & 0xff);
302            return m_expansion_slots[slot].rom_read(space, offset & 0xff, mem_mask);
303303      }
304304      break;
305305
r17964r17965
418418            LOG(("concept_io_w: Slot I/O register written for slot %d at address 0x03%4.4x, data: 0x%4.4x\n",
419419               slot, offset << 1, data));
420420            if (m_expansion_slots[slot].reg_write)
421               m_expansion_slots[slot].reg_write(space, offset & 0xf, data);
421               m_expansion_slots[slot].reg_write(space, offset & 0xf, data, mem_mask);
422422         }
423423         break;
424424
r17964r17965
441441         int slot = ((offset >> 8) & 7) - 1;
442442         LOG(("concept_io_w: Slot ROM memory written to for slot %d at address 0x03%4.4x, data: 0x%4.4x\n", slot, offset << 1, data));
443443         if (m_expansion_slots[slot].rom_write)
444            m_expansion_slots[slot].rom_write(space, offset & 0xff, data);
444            m_expansion_slots[slot].rom_write(space, offset & 0xff, data, mem_mask);
445445      }
446446      break;
447447
r17964r17965
548548};
549549
550550
551static  READ8_HANDLER(concept_fdc_reg_r);
552static WRITE8_HANDLER(concept_fdc_reg_w);
553static  READ8_HANDLER(concept_fdc_rom_r);
551static  DECLARE_READ8_HANDLER(concept_fdc_reg_r);
552static DECLARE_WRITE8_HANDLER(concept_fdc_reg_w);
553static  DECLARE_READ8_HANDLER(concept_fdc_rom_r);
554554
555555static void concept_fdc_init(running_machine &machine, int slot)
556556{
r17964r17965
670670 *  Concept Hard Disk Controller (hdc)
671671 */
672672
673static  READ8_HANDLER(concept_hdc_reg_r);
674static WRITE8_HANDLER(concept_hdc_reg_w);
675static  READ8_HANDLER(concept_hdc_rom_r);
673static  DECLARE_READ8_HANDLER(concept_hdc_reg_r);
674static DECLARE_WRITE8_HANDLER(concept_hdc_reg_w);
675static  DECLARE_READ8_HANDLER(concept_hdc_rom_r);
676676
677677/*
678678 *  Hook up the Register and ROM R/W routines into the Slot I/O Space
trunk/src/mess/machine/mboard.h
r17964r17965
5252    FUNCTION PROTOTYPES
5353***************************************************************************/
5454
55READ8_HANDLER( mboard_read_board_8 );
56WRITE8_HANDLER( mboard_write_board_8 );
57WRITE8_HANDLER( mboard_write_LED_8 );
55DECLARE_READ8_HANDLER( mboard_read_board_8 );
56DECLARE_WRITE8_HANDLER( mboard_write_board_8 );
57DECLARE_WRITE8_HANDLER( mboard_write_LED_8 );
5858
59READ16_HANDLER( mboard_read_board_16 );
60WRITE16_HANDLER( mboard_write_board_16 );
61WRITE16_HANDLER( mboard_write_LED_16 );
59DECLARE_READ16_HANDLER( mboard_read_board_16 );
60DECLARE_WRITE16_HANDLER( mboard_write_board_16 );
61DECLARE_WRITE16_HANDLER( mboard_write_LED_16 );
6262
63READ32_HANDLER( mboard_read_board_32 );
64WRITE32_HANDLER( mboard_write_board_32 );
65WRITE32_HANDLER( mboard_write_LED_32 );
63DECLARE_READ32_HANDLER( mboard_read_board_32 );
64DECLARE_WRITE32_HANDLER( mboard_write_board_32 );
65DECLARE_WRITE32_HANDLER( mboard_write_LED_32 );
6666
6767TIMER_DEVICE_CALLBACK( mboard_update_artwork );
6868
trunk/src/mess/machine/lynx.c
r17964r17965
17691769
17701770   case 0x8c:
17711771   case 0x8d:
1772      value = lynx_uart_r(space, offset);
1772      value = lynx_uart_r(space, offset, mem_mask);
17731773      break;
17741774
17751775   default:
trunk/src/mess/includes/corvushd.h
r17964r17965
174174// Prototypes
175175//
176176UINT8 corvus_hdc_init( running_machine &machine );
177READ8_HANDLER ( corvus_hdc_status_r );
178READ8_HANDLER ( corvus_hdc_data_r );
179WRITE8_HANDLER ( corvus_hdc_data_w );
177DECLARE_READ8_HANDLER ( corvus_hdc_status_r );
178DECLARE_READ8_HANDLER ( corvus_hdc_data_r );
179DECLARE_WRITE8_HANDLER ( corvus_hdc_data_w );
180180
181181
182182#endif /* CORVUSHD_H_ */
trunk/src/mess/includes/dgn_beta.h
r17964r17965
156156
157157
158158// Page IO at FE00
159READ8_HANDLER( dgn_beta_page_r );
160WRITE8_HANDLER( dgn_beta_page_w );
159DECLARE_READ8_HANDLER( dgn_beta_page_r );
160DECLARE_WRITE8_HANDLER( dgn_beta_page_w );
161161
162162/*  WD2797 FDC */
163READ8_HANDLER(dgnbeta_wd2797_r);
164WRITE8_HANDLER(dgnbeta_wd2797_w);
163DECLARE_READ8_HANDLER(dgnbeta_wd2797_r);
164DECLARE_WRITE8_HANDLER(dgnbeta_wd2797_w);
165165
166166void dgn_beta_frame_interrupt (running_machine &machine, int data);
167167
r17964r17965
172172void dgnbeta_vid_set_gctrl(running_machine &machine, int data);
173173
174174/* 74HC670 4x4bit colour ram */
175WRITE8_HANDLER(dgnbeta_colour_ram_w);
175DECLARE_WRITE8_HANDLER(dgnbeta_colour_ram_w);
176176
177177extern const mc6845_interface dgnbeta_crtc6845_interface;
178178
trunk/src/mess/includes/ps2.h
r17964r17965
1010
1111/*----------- defined in machine/ps2.c -----------*/
1212
13 READ8_HANDLER(ps2_pos_r);
14WRITE8_HANDLER(ps2_pos_w);
13 DECLARE_READ8_HANDLER(ps2_pos_r);
14DECLARE_WRITE8_HANDLER(ps2_pos_w);
1515
1616
1717#endif /* PS2_H_ */
trunk/src/mess/includes/pc1401.h
r17964r17965
4444
4545/*----------- defined in video/pc1401.c -----------*/
4646
47READ8_HANDLER(pc1401_lcd_read);
48WRITE8_HANDLER(pc1401_lcd_write);
47DECLARE_READ8_HANDLER(pc1401_lcd_read);
48DECLARE_WRITE8_HANDLER(pc1401_lcd_write);
4949SCREEN_UPDATE_IND16( pc1401 );
5050
5151
trunk/src/mess/includes/pc1350.h
r17964r17965
4242
4343/*----------- defined in video/pc1350.c -----------*/
4444
45READ8_HANDLER(pc1350_lcd_read);
46WRITE8_HANDLER(pc1350_lcd_write);
45DECLARE_READ8_HANDLER(pc1350_lcd_read);
46DECLARE_WRITE8_HANDLER(pc1350_lcd_write);
4747SCREEN_UPDATE_IND16( pc1350 );
4848
4949int pc1350_keyboard_line_r(running_machine &machine);
trunk/src/mess/includes/thomson.h
r17964r17965
6767
6868/* cartridge bank-switching */
6969extern DEVICE_IMAGE_LOAD( to7_cartridge );
70extern WRITE8_HANDLER ( to7_cartridge_w );
71extern READ8_HANDLER  ( to7_cartridge_r );
70extern DECLARE_WRITE8_HANDLER ( to7_cartridge_w );
71extern DECLARE_READ8_HANDLER  ( to7_cartridge_r );
7272
7373/* dispatch MODEM or speech synthesis extension */
74extern READ8_HANDLER ( to7_modem_mea8000_r );
75extern WRITE8_HANDLER ( to7_modem_mea8000_w );
74extern DECLARE_READ8_HANDLER ( to7_modem_mea8000_r );
75extern DECLARE_WRITE8_HANDLER ( to7_modem_mea8000_w );
7676
7777/* MIDI extension (actually an 6850 ACIA) */
78extern READ8_HANDLER  ( to7_midi_r );
79extern WRITE8_HANDLER ( to7_midi_w );
78extern DECLARE_READ8_HANDLER  ( to7_midi_r );
79extern DECLARE_WRITE8_HANDLER ( to7_midi_w );
8080
8181extern MACHINE_START ( to7 );
8282extern MACHINE_RESET ( to7 );
r17964r17965
9898/***************************** TO7/70 ******************************/
9999
100100/* gate-array */
101extern READ8_HANDLER  ( to770_gatearray_r );
102extern WRITE8_HANDLER ( to770_gatearray_w );
101extern DECLARE_READ8_HANDLER  ( to770_gatearray_r );
102extern DECLARE_WRITE8_HANDLER ( to770_gatearray_w );
103103
104104extern MACHINE_START ( to770 );
105105extern MACHINE_RESET ( to770 );
r17964r17965
109109/***************************** MO5 ******************************/
110110
111111/* gate-array */
112extern READ8_HANDLER  ( mo5_gatearray_r );
113extern WRITE8_HANDLER ( mo5_gatearray_w );
112extern DECLARE_READ8_HANDLER  ( mo5_gatearray_r );
113extern DECLARE_WRITE8_HANDLER ( mo5_gatearray_w );
114114
115115/* cartridge / extended RAM bank-switching */
116116extern DEVICE_IMAGE_LOAD( mo5_cartridge );
117extern WRITE8_HANDLER ( mo5_ext_w );
118extern WRITE8_HANDLER ( mo5_cartridge_w );
119extern READ8_HANDLER  ( mo5_cartridge_r );
117extern DECLARE_WRITE8_HANDLER ( mo5_ext_w );
118extern DECLARE_WRITE8_HANDLER ( mo5_cartridge_w );
119extern DECLARE_READ8_HANDLER  ( mo5_cartridge_r );
120120
121121extern MACHINE_START ( mo5 );
122122extern MACHINE_RESET ( mo5 );
r17964r17965
125125/***************************** TO9 ******************************/
126126
127127/* IEEE extension */
128extern WRITE8_HANDLER ( to9_ieee_w );
129extern READ8_HANDLER  ( to9_ieee_r );
128extern DECLARE_WRITE8_HANDLER ( to9_ieee_w );
129extern DECLARE_READ8_HANDLER  ( to9_ieee_r );
130130
131131/* ROM bank-switching */
132extern WRITE8_HANDLER ( to9_cartridge_w );
133extern READ8_HANDLER  ( to9_cartridge_r );
132extern DECLARE_WRITE8_HANDLER ( to9_cartridge_w );
133extern DECLARE_READ8_HANDLER  ( to9_cartridge_r );
134134
135135/* system gate-array */
136extern READ8_HANDLER  ( to9_gatearray_r );
137extern WRITE8_HANDLER ( to9_gatearray_w );
136extern DECLARE_READ8_HANDLER  ( to9_gatearray_r );
137extern DECLARE_WRITE8_HANDLER ( to9_gatearray_w );
138138
139139/* video gate-array */
140extern READ8_HANDLER  ( to9_vreg_r );
141extern WRITE8_HANDLER ( to9_vreg_w );
140extern DECLARE_READ8_HANDLER  ( to9_vreg_r );
141extern DECLARE_WRITE8_HANDLER ( to9_vreg_w );
142142
143143/* keyboard */
144extern READ8_HANDLER  ( to9_kbd_r );
145extern WRITE8_HANDLER ( to9_kbd_w );
144extern DECLARE_READ8_HANDLER  ( to9_kbd_r );
145extern DECLARE_WRITE8_HANDLER ( to9_kbd_w );
146146
147147extern MACHINE_START ( to9 );
148148extern MACHINE_RESET ( to9 );
r17964r17965
162162extern UINT8 to8_data_vpage;
163163extern UINT8 to8_cart_vpage;
164164
165extern WRITE8_HANDLER ( to8_cartridge_w );
166extern READ8_HANDLER  ( to8_cartridge_r );
165extern DECLARE_WRITE8_HANDLER ( to8_cartridge_w );
166extern DECLARE_READ8_HANDLER  ( to8_cartridge_r );
167167
168168/* system gate-array */
169extern READ8_HANDLER  ( to8_gatearray_r );
170extern WRITE8_HANDLER ( to8_gatearray_w );
169extern DECLARE_READ8_HANDLER  ( to8_gatearray_r );
170extern DECLARE_WRITE8_HANDLER ( to8_gatearray_w );
171171
172172/* video gate-array */
173extern READ8_HANDLER  ( to8_vreg_r );
174extern WRITE8_HANDLER ( to8_vreg_w );
173extern DECLARE_READ8_HANDLER  ( to8_vreg_r );
174extern DECLARE_WRITE8_HANDLER ( to8_vreg_w );
175175
176176/* floppy */
177extern READ8_HANDLER  ( to8_floppy_r );
178extern WRITE8_HANDLER ( to8_floppy_w );
177extern DECLARE_READ8_HANDLER  ( to8_floppy_r );
178extern DECLARE_WRITE8_HANDLER ( to8_floppy_w );
179179
180180extern MACHINE_START ( to8 );
181181extern MACHINE_RESET ( to8 );
r17964r17965
193193
194194/***************************** MO6 ******************************/
195195
196extern READ8_HANDLER  ( mo6_cartridge_r );
197extern WRITE8_HANDLER ( mo6_cartridge_w );
198extern WRITE8_HANDLER ( mo6_ext_w );
196extern DECLARE_READ8_HANDLER  ( mo6_cartridge_r );
197extern DECLARE_WRITE8_HANDLER ( mo6_cartridge_w );
198extern DECLARE_WRITE8_HANDLER ( mo6_ext_w );
199199
200200/* system gate-array */
201extern READ8_HANDLER  ( mo6_gatearray_r );
202extern WRITE8_HANDLER ( mo6_gatearray_w );
201extern DECLARE_READ8_HANDLER  ( mo6_gatearray_r );
202extern DECLARE_WRITE8_HANDLER ( mo6_gatearray_w );
203203
204204/* video gate-array */
205extern READ8_HANDLER  ( mo6_vreg_r );
206extern WRITE8_HANDLER ( mo6_vreg_w );
205extern DECLARE_READ8_HANDLER  ( mo6_vreg_r );
206extern DECLARE_WRITE8_HANDLER ( mo6_vreg_w );
207207
208208extern MACHINE_START ( mo6 );
209209extern MACHINE_RESET ( mo6 );
r17964r17965
212212/***************************** MO5 NR ******************************/
213213
214214/* network */
215extern READ8_HANDLER  ( mo5nr_net_r );
216extern WRITE8_HANDLER ( mo5nr_net_w );
215extern DECLARE_READ8_HANDLER  ( mo5nr_net_r );
216extern DECLARE_WRITE8_HANDLER ( mo5nr_net_w );
217217
218218/* printer */
219extern READ8_HANDLER  ( mo5nr_prn_r );
220extern WRITE8_HANDLER ( mo5nr_prn_w );
219extern DECLARE_READ8_HANDLER  ( mo5nr_prn_r );
220extern DECLARE_WRITE8_HANDLER ( mo5nr_prn_w );
221221
222222extern MACHINE_START ( mo5nr );
223223extern MACHINE_RESET ( mo5nr );
r17964r17965
343343
344344/***************************** TO7 / T9000 *************************/
345345
346extern WRITE8_HANDLER ( to7_vram_w );
346extern DECLARE_WRITE8_HANDLER ( to7_vram_w );
347347
348348
349349/***************************** TO7/70 ******************************/
350350
351extern WRITE8_HANDLER ( to770_vram_w );
351extern DECLARE_WRITE8_HANDLER ( to770_vram_w );
352352
353353
354354/***************************** TO8 ******************************/
355355
356356/* write to video memory through system space (always page 1) */
357WRITE8_HANDLER ( to8_sys_lo_w );
358WRITE8_HANDLER ( to8_sys_hi_w );
357DECLARE_WRITE8_HANDLER ( to8_sys_lo_w );
358DECLARE_WRITE8_HANDLER ( to8_sys_hi_w );
359359
360360/* write to video memory through data space */
361WRITE8_HANDLER ( to8_data_lo_w );
362WRITE8_HANDLER ( to8_data_hi_w );
361DECLARE_WRITE8_HANDLER ( to8_data_lo_w );
362DECLARE_WRITE8_HANDLER ( to8_data_hi_w );
363363
364364/* write to video memory page through cartridge addresses space */
365WRITE8_HANDLER ( to8_vcart_w );
365DECLARE_WRITE8_HANDLER ( to8_vcart_w );
366366
367367
368368
trunk/src/mess/includes/cgenie.h
r17964r17965
8181extern const wd17xx_interface cgenie_wd17xx_interface;
8282
8383
84READ8_HANDLER ( cgenie_psg_port_a_r );
85READ8_HANDLER ( cgenie_psg_port_b_r );
86WRITE8_HANDLER ( cgenie_psg_port_a_w );
87WRITE8_HANDLER ( cgenie_psg_port_b_w );
84DECLARE_READ8_HANDLER ( cgenie_psg_port_a_r );
85DECLARE_READ8_HANDLER ( cgenie_psg_port_b_r );
86DECLARE_WRITE8_HANDLER ( cgenie_psg_port_a_w );
87DECLARE_WRITE8_HANDLER ( cgenie_psg_port_b_w );
8888
8989
9090
9191
92READ8_HANDLER ( cgenie_colorram_r );
93READ8_HANDLER ( cgenie_fontram_r );
92DECLARE_READ8_HANDLER ( cgenie_colorram_r );
93DECLARE_READ8_HANDLER ( cgenie_fontram_r );
9494
95WRITE8_HANDLER ( cgenie_colorram_w );
96WRITE8_HANDLER ( cgenie_fontram_w );
95DECLARE_WRITE8_HANDLER ( cgenie_colorram_w );
96DECLARE_WRITE8_HANDLER ( cgenie_fontram_w );
9797
98WRITE8_HANDLER ( cgenie_port_ff_w );
99 READ8_HANDLER ( cgenie_port_ff_r );
98DECLARE_WRITE8_HANDLER ( cgenie_port_ff_w );
99 DECLARE_READ8_HANDLER ( cgenie_port_ff_r );
100100int cgenie_port_xx_r(int offset);
101101
102102INTERRUPT_GEN( cgenie_timer_interrupt );
103103INTERRUPT_GEN( cgenie_frame_interrupt );
104104
105 READ8_HANDLER ( cgenie_status_r );
106 READ8_HANDLER ( cgenie_track_r );
107 READ8_HANDLER ( cgenie_sector_r );
108 READ8_HANDLER ( cgenie_data_r );
105 DECLARE_READ8_HANDLER ( cgenie_status_r );
106 DECLARE_READ8_HANDLER ( cgenie_track_r );
107 DECLARE_READ8_HANDLER ( cgenie_sector_r );
108 DECLARE_READ8_HANDLER ( cgenie_data_r );
109109
110WRITE8_HANDLER ( cgenie_command_w );
111WRITE8_HANDLER ( cgenie_track_w );
112WRITE8_HANDLER ( cgenie_sector_w );
113WRITE8_HANDLER ( cgenie_data_w );
110DECLARE_WRITE8_HANDLER ( cgenie_command_w );
111DECLARE_WRITE8_HANDLER ( cgenie_track_w );
112DECLARE_WRITE8_HANDLER ( cgenie_sector_w );
113DECLARE_WRITE8_HANDLER ( cgenie_data_w );
114114
115 READ8_HANDLER ( cgenie_irq_status_r );
115 DECLARE_READ8_HANDLER ( cgenie_irq_status_r );
116116
117WRITE8_HANDLER ( cgenie_motor_w );
117DECLARE_WRITE8_HANDLER ( cgenie_motor_w );
118118
119 READ8_HANDLER ( cgenie_keyboard_r );
119 DECLARE_READ8_HANDLER ( cgenie_keyboard_r );
120120int cgenie_videoram_r(running_machine &machine,int offset);
121WRITE8_HANDLER ( cgenie_videoram_w );
121DECLARE_WRITE8_HANDLER ( cgenie_videoram_w );
122122
123123
124124/*----------- defined in video/cgenie.c -----------*/
r17964r17965
126126
127127SCREEN_UPDATE_IND16( cgenie );
128128
129READ8_HANDLER ( cgenie_index_r );
130READ8_HANDLER ( cgenie_register_r );
129DECLARE_READ8_HANDLER ( cgenie_index_r );
130DECLARE_READ8_HANDLER ( cgenie_register_r );
131131
132WRITE8_HANDLER ( cgenie_index_w );
133WRITE8_HANDLER ( cgenie_register_w );
132DECLARE_WRITE8_HANDLER ( cgenie_index_w );
133DECLARE_WRITE8_HANDLER ( cgenie_register_w );
134134
135135int cgenie_get_register(running_machine &machine, int indx);
136136void cgenie_mode_select(running_machine &machine, int graphics);
trunk/src/mess/includes/x68k.h
r17964r17965
286286TIMER_CALLBACK(x68k_hsync);
287287
288288
289READ16_HANDLER( x68k_spritereg_r );
290WRITE16_HANDLER( x68k_spritereg_w );
291READ16_HANDLER( x68k_spriteram_r );
292WRITE16_HANDLER( x68k_spriteram_w );
293WRITE16_HANDLER( x68k_crtc_w );
294READ16_HANDLER( x68k_crtc_r );
295WRITE16_HANDLER( x68k_gvram_w );
296READ16_HANDLER( x68k_gvram_r );
297WRITE16_HANDLER( x68k_tvram_w );
298READ16_HANDLER( x68k_tvram_r );
299WRITE32_HANDLER( x68k_gvram32_w );
300READ32_HANDLER( x68k_gvram32_r );
301WRITE32_HANDLER( x68k_tvram32_w );
302READ32_HANDLER( x68k_tvram32_r );
289DECLARE_READ16_HANDLER( x68k_spritereg_r );
290DECLARE_WRITE16_HANDLER( x68k_spritereg_w );
291DECLARE_READ16_HANDLER( x68k_spriteram_r );
292DECLARE_WRITE16_HANDLER( x68k_spriteram_w );
293DECLARE_WRITE16_HANDLER( x68k_crtc_w );
294DECLARE_READ16_HANDLER( x68k_crtc_r );
295DECLARE_WRITE16_HANDLER( x68k_gvram_w );
296DECLARE_READ16_HANDLER( x68k_gvram_r );
297DECLARE_WRITE16_HANDLER( x68k_tvram_w );
298DECLARE_READ16_HANDLER( x68k_tvram_r );
299DECLARE_WRITE32_HANDLER( x68k_gvram32_w );
300DECLARE_READ32_HANDLER( x68k_gvram32_r );
301DECLARE_WRITE32_HANDLER( x68k_tvram32_w );
302DECLARE_READ32_HANDLER( x68k_tvram32_r );
303303SCREEN_UPDATE_IND16( x68000 );
304304
305305
trunk/src/mess/includes/pet.h
r17964r17965
7777extern const pia6821_interface pet_pia1;
7878
7979
80WRITE8_HANDLER(cbm8096_w);
81extern READ8_HANDLER(superpet_r);
82extern WRITE8_HANDLER(superpet_w);
80DECLARE_WRITE8_HANDLER(cbm8096_w);
81extern DECLARE_READ8_HANDLER(superpet_r);
82extern DECLARE_WRITE8_HANDLER(superpet_w);
8383
8484
8585INTERRUPT_GEN( pet_frame_interrupt );
trunk/src/mess/includes/c16.h
r17964r17965
5555extern DECLARE_READ8_DEVICE_HANDLER(c16_m7501_port_read);
5656extern DECLARE_WRITE8_DEVICE_HANDLER(c16_m7501_port_write);
5757
58extern WRITE8_HANDLER(c16_6551_port_w);
59extern READ8_HANDLER(c16_6551_port_r);
58extern DECLARE_WRITE8_HANDLER(c16_6551_port_w);
59extern DECLARE_READ8_HANDLER(c16_6551_port_r);
6060
61extern READ8_HANDLER(c16_fd1x_r);
62extern WRITE8_HANDLER(plus4_6529_port_w);
63extern READ8_HANDLER(plus4_6529_port_r);
61extern DECLARE_READ8_HANDLER(c16_fd1x_r);
62extern DECLARE_WRITE8_HANDLER(plus4_6529_port_w);
63extern DECLARE_READ8_HANDLER(plus4_6529_port_r);
6464
65extern WRITE8_HANDLER(c16_6529_port_w);
66extern READ8_HANDLER(c16_6529_port_r);
65extern DECLARE_WRITE8_HANDLER(c16_6529_port_w);
66extern DECLARE_READ8_HANDLER(c16_6529_port_r);
6767
68extern WRITE8_HANDLER(c16_select_roms);
69extern WRITE8_HANDLER(c16_switch_to_rom);
70extern WRITE8_HANDLER(c16_switch_to_ram);
68extern DECLARE_WRITE8_HANDLER(c16_select_roms);
69extern DECLARE_WRITE8_HANDLER(c16_switch_to_rom);
70extern DECLARE_WRITE8_HANDLER(c16_switch_to_ram);
7171
7272/* ted reads (passed to the device interface) */
7373extern UINT8 c16_read_keyboard(running_machine &machine, int databus);
trunk/src/mess/includes/europc.h
r17964r17965
134134
135135/*----------- defined in machine/europc.c -----------*/
136136
137WRITE8_HANDLER( europc_pio_w );
138 READ8_HANDLER( europc_pio_r );
137DECLARE_WRITE8_HANDLER( europc_pio_w );
138 DECLARE_READ8_HANDLER( europc_pio_r );
139139
140extern WRITE8_HANDLER ( europc_jim_w );
141extern  READ8_HANDLER ( europc_jim_r );
142extern  READ8_HANDLER ( europc_jim2_r );
140extern DECLARE_WRITE8_HANDLER ( europc_jim_w );
141extern  DECLARE_READ8_HANDLER ( europc_jim_r );
142extern  DECLARE_READ8_HANDLER ( europc_jim2_r );
143143
144extern  READ8_HANDLER( europc_rtc_r );
145extern WRITE8_HANDLER( europc_rtc_w );
144extern  DECLARE_READ8_HANDLER( europc_rtc_r );
145extern DECLARE_WRITE8_HANDLER( europc_rtc_w );
146146extern NVRAM_HANDLER( europc_rtc );
147147
148148void europc_rtc_set_time(running_machine &machine);
trunk/src/mess/includes/enterp.h
r17964r17965
4040
4141SCREEN_UPDATE_IND16( epnick );
4242
43WRITE8_HANDLER( epnick_reg_w );
43DECLARE_WRITE8_HANDLER( epnick_reg_w );
4444
4545
4646#endif /* __ENTERP_H__ */
trunk/src/mess/includes/mbc55x.h
r17964r17965
203203#define RAM_BANK_COUNT   15
204204
205205
206READ8_HANDLER(ppi8255_r);
207WRITE8_HANDLER(ppi8255_w);
206DECLARE_READ8_HANDLER(ppi8255_r);
207DECLARE_WRITE8_HANDLER(ppi8255_w);
208208
209209/* Floppy drive interface */
210210
r17964r17965
217217
218218extern const mc6845_interface mb55x_mc6845_intf;
219219
220READ16_HANDLER (mbc55x_video_io_r);
221WRITE16_HANDLER (mbc55x_video_io_w);
220DECLARE_READ16_HANDLER (mbc55x_video_io_r);
221DECLARE_WRITE16_HANDLER (mbc55x_video_io_w);
222222
223223
224224SCREEN_VBLANK( mbc55x );
trunk/src/mess/includes/pc1403.h
r17964r17965
4444
4545MACHINE_START( pc1403 );
4646
47READ8_HANDLER(pc1403_asic_read);
48WRITE8_HANDLER(pc1403_asic_write);
47DECLARE_READ8_HANDLER(pc1403_asic_read);
48DECLARE_WRITE8_HANDLER(pc1403_asic_write);
4949
5050
5151/*----------- defined in video/pc1403.c -----------*/
r17964r17965
5353VIDEO_START( pc1403 );
5454SCREEN_UPDATE_IND16( pc1403 );
5555
56READ8_HANDLER(pc1403_lcd_read);
57WRITE8_HANDLER(pc1403_lcd_write);
56DECLARE_READ8_HANDLER(pc1403_lcd_read);
57DECLARE_WRITE8_HANDLER(pc1403_lcd_write);
5858
5959
6060#endif /* PC1403_H_ */
trunk/src/mess/includes/c64_legacy.h
r17964r17965
100100extern DECLARE_READ8_DEVICE_HANDLER(c64_m6510_port_read);
101101extern DECLARE_WRITE8_DEVICE_HANDLER(c64_m6510_port_write);
102102
103READ8_HANDLER ( c64_colorram_read );
104WRITE8_HANDLER ( c64_colorram_write );
103DECLARE_READ8_HANDLER ( c64_colorram_read );
104DECLARE_WRITE8_HANDLER ( c64_colorram_write );
105105
106106MACHINE_START( c64 );
107107MACHINE_RESET( c64 );
r17964r17965
109109TIMER_CALLBACK( c64_tape_timer );
110110
111111/* private area */
112WRITE8_HANDLER(c64_roml_w);
112DECLARE_WRITE8_HANDLER(c64_roml_w);
113113
114READ8_HANDLER(c64_ioarea_r);
115WRITE8_HANDLER(c64_ioarea_w);
114DECLARE_READ8_HANDLER(c64_ioarea_r);
115DECLARE_WRITE8_HANDLER(c64_ioarea_w);
116116
117WRITE8_HANDLER ( c64_write_io );
118READ8_HANDLER ( c64_read_io );
117DECLARE_WRITE8_HANDLER ( c64_write_io );
118DECLARE_READ8_HANDLER ( c64_read_io );
119119int c64_paddle_read (device_t *device, address_space &space, int which);
120120
121121extern const mos6526_interface c64_ntsc_cia0, c64_pal_cia0;
trunk/src/mess/includes/hec2hrp.h
r17964r17965
141141/*----------- defined in machine/hec2hrp.c -----------*/
142142
143143/* Protoype of memory Handler*/
144WRITE8_HANDLER( hector_switch_bank_rom_w );
144DECLARE_WRITE8_HANDLER( hector_switch_bank_rom_w );
145145
146146void hector_init( running_machine &machine);
147147void hector_reset(running_machine &machine, int hr, int with_D2);
148148void hector_disc2_reset( running_machine &machine);
149149
150150/* Prototype of I/O Handler*/
151READ8_HANDLER( hector_mx_io_port_r );
151DECLARE_READ8_HANDLER( hector_mx_io_port_r );
152152/*----------- defined in video/hec2video.c -----------*/
153153
154154void hector_80c(running_machine &machine, bitmap_ind16 &bitmap, UINT8 *page, int ymax, int yram) ;
r17964r17965
163163
164164// disc2 handling
165165WRITE_LINE_DEVICE_HANDLER( hector_disk2_fdc_interrupt );
166READ8_HANDLER(  hector_disc2_io00_port_r);
167WRITE8_HANDLER( hector_disc2_io00_port_w);
168READ8_HANDLER(  hector_disc2_io20_port_r);
169WRITE8_HANDLER( hector_disc2_io20_port_w);
170READ8_HANDLER(  hector_disc2_io30_port_r);
171WRITE8_HANDLER( hector_disc2_io30_port_w);
172READ8_HANDLER(  hector_disc2_io40_port_r);
173WRITE8_HANDLER( hector_disc2_io40_port_w);
174READ8_HANDLER(  hector_disc2_io50_port_r);
175WRITE8_HANDLER( hector_disc2_io50_port_w);
176READ8_HANDLER(  hector_disc2_io61_port_r);
177WRITE8_HANDLER( hector_disc2_io61_port_w);
178READ8_HANDLER(  hector_disc2_io70_port_r);
179WRITE8_HANDLER( hector_disc2_io70_port_w);
166DECLARE_READ8_HANDLER(  hector_disc2_io00_port_r);
167DECLARE_WRITE8_HANDLER( hector_disc2_io00_port_w);
168DECLARE_READ8_HANDLER(  hector_disc2_io20_port_r);
169DECLARE_WRITE8_HANDLER( hector_disc2_io20_port_w);
170DECLARE_READ8_HANDLER(  hector_disc2_io30_port_r);
171DECLARE_WRITE8_HANDLER( hector_disc2_io30_port_w);
172DECLARE_READ8_HANDLER(  hector_disc2_io40_port_r);
173DECLARE_WRITE8_HANDLER( hector_disc2_io40_port_w);
174DECLARE_READ8_HANDLER(  hector_disc2_io50_port_r);
175DECLARE_WRITE8_HANDLER( hector_disc2_io50_port_w);
176DECLARE_READ8_HANDLER(  hector_disc2_io61_port_r);
177DECLARE_WRITE8_HANDLER( hector_disc2_io61_port_w);
178DECLARE_READ8_HANDLER(  hector_disc2_io70_port_r);
179DECLARE_WRITE8_HANDLER( hector_disc2_io70_port_w);
180180
181181void hector_disc2_init( running_machine &machine);
182182void hector_minidisc_init( running_machine &machine);
trunk/src/mess/includes/fmtowns.h
r17964r17965
2121
2222#define IRQ_LOG 0  // set to 1 to log IRQ line activity
2323
24READ8_HANDLER( towns_gfx_high_r );
25WRITE8_HANDLER( towns_gfx_high_w );
26READ8_HANDLER( towns_gfx_r );
27WRITE8_HANDLER( towns_gfx_w );
28READ8_HANDLER( towns_video_cff80_r );
29WRITE8_HANDLER( towns_video_cff80_w );
30READ8_HANDLER( towns_video_cff80_mem_r );
31WRITE8_HANDLER( towns_video_cff80_mem_w );
32READ8_HANDLER(towns_video_440_r);
33WRITE8_HANDLER(towns_video_440_w);
34READ8_HANDLER(towns_video_5c8_r);
35WRITE8_HANDLER(towns_video_5c8_w);
36READ8_HANDLER(towns_video_fd90_r);
37WRITE8_HANDLER(towns_video_fd90_w);
38READ8_HANDLER(towns_video_ff81_r);
39WRITE8_HANDLER(towns_video_ff81_w);
40READ32_HANDLER(towns_video_unknown_r);
41READ8_HANDLER(towns_spriteram_low_r);
42WRITE8_HANDLER(towns_spriteram_low_w);
43READ8_HANDLER(towns_spriteram_r);
44WRITE8_HANDLER(towns_spriteram_w);
24DECLARE_READ8_HANDLER( towns_gfx_high_r );
25DECLARE_WRITE8_HANDLER( towns_gfx_high_w );
26DECLARE_READ8_HANDLER( towns_gfx_r );
27DECLARE_WRITE8_HANDLER( towns_gfx_w );
28DECLARE_READ8_HANDLER( towns_video_cff80_r );
29DECLARE_WRITE8_HANDLER( towns_video_cff80_w );
30DECLARE_READ8_HANDLER( towns_video_cff80_mem_r );
31DECLARE_WRITE8_HANDLER( towns_video_cff80_mem_w );
32DECLARE_READ8_HANDLER(towns_video_440_r);
33DECLARE_WRITE8_HANDLER(towns_video_440_w);
34DECLARE_READ8_HANDLER(towns_video_5c8_r);
35DECLARE_WRITE8_HANDLER(towns_video_5c8_w);
36DECLARE_READ8_HANDLER(towns_video_fd90_r);
37DECLARE_WRITE8_HANDLER(towns_video_fd90_w);
38DECLARE_READ8_HANDLER(towns_video_ff81_r);
39DECLARE_WRITE8_HANDLER(towns_video_ff81_w);
40DECLARE_READ32_HANDLER(towns_video_unknown_r);
41DECLARE_READ8_HANDLER(towns_spriteram_low_r);
42DECLARE_WRITE8_HANDLER(towns_spriteram_low_w);
43DECLARE_READ8_HANDLER(towns_spriteram_r);
44DECLARE_WRITE8_HANDLER(towns_spriteram_w);
4545
4646struct towns_cdrom_controller
4747{
trunk/src/mess/includes/bebox.h
r17964r17965
5959
6060
6161
62READ64_HANDLER( bebox_cpu0_imask_r );
63READ64_HANDLER( bebox_cpu1_imask_r );
64READ64_HANDLER( bebox_interrupt_sources_r );
65READ64_HANDLER( bebox_crossproc_interrupts_r );
66READ8_HANDLER( bebox_800001F0_r );
67READ64_HANDLER( bebox_800003F0_r );
68READ64_HANDLER( bebox_interrupt_ack_r );
69READ8_HANDLER( bebox_page_r );
70READ8_HANDLER( bebox_80000480_r );
71READ8_HANDLER( bebox_flash_r );
62DECLARE_READ64_HANDLER( bebox_cpu0_imask_r );
63DECLARE_READ64_HANDLER( bebox_cpu1_imask_r );
64DECLARE_READ64_HANDLER( bebox_interrupt_sources_r );
65DECLARE_READ64_HANDLER( bebox_crossproc_interrupts_r );
66DECLARE_READ8_HANDLER( bebox_800001F0_r );
67DECLARE_READ64_HANDLER( bebox_800003F0_r );
68DECLARE_READ64_HANDLER( bebox_interrupt_ack_r );
69DECLARE_READ8_HANDLER( bebox_page_r );
70DECLARE_READ8_HANDLER( bebox_80000480_r );
71DECLARE_READ8_HANDLER( bebox_flash_r );
7272
73WRITE64_HANDLER( bebox_cpu0_imask_w );
74WRITE64_HANDLER( bebox_cpu1_imask_w );
75WRITE64_HANDLER( bebox_crossproc_interrupts_w );
76WRITE64_HANDLER( bebox_processor_resets_w );
77WRITE8_HANDLER( bebox_800001F0_w );
78WRITE64_HANDLER( bebox_800003F0_w );
79WRITE8_HANDLER( bebox_page_w );
80WRITE8_HANDLER( bebox_80000480_w );
81WRITE8_HANDLER( bebox_flash_w );
73DECLARE_WRITE64_HANDLER( bebox_cpu0_imask_w );
74DECLARE_WRITE64_HANDLER( bebox_cpu1_imask_w );
75DECLARE_WRITE64_HANDLER( bebox_crossproc_interrupts_w );
76DECLARE_WRITE64_HANDLER( bebox_processor_resets_w );
77DECLARE_WRITE8_HANDLER( bebox_800001F0_w );
78DECLARE_WRITE64_HANDLER( bebox_800003F0_w );
79DECLARE_WRITE8_HANDLER( bebox_page_w );
80DECLARE_WRITE8_HANDLER( bebox_80000480_w );
81DECLARE_WRITE8_HANDLER( bebox_flash_w );
8282
8383void bebox_ide_interrupt(device_t *device, int state);
8484void bebox_set_irq_bit(running_machine &machine, unsigned int interrupt_bit, int val);
trunk/src/mess/includes/apple2.h
r17964r17965
264264
265265
266266UINT8 apple2_getfloatingbusvalue(running_machine &machine);
267READ8_HANDLER( apple2_c0xx_r );
268WRITE8_HANDLER( apple2_c0xx_w );
269READ8_HANDLER( apple2_c080_r );
270WRITE8_HANDLER( apple2_c080_w );
267DECLARE_READ8_HANDLER( apple2_c0xx_r );
268DECLARE_WRITE8_HANDLER( apple2_c0xx_w );
269DECLARE_READ8_HANDLER( apple2_c080_r );
270DECLARE_WRITE8_HANDLER( apple2_c080_w );
271271
272272TIMER_DEVICE_CALLBACK( apple2_interrupt );
273273
trunk/src/mess/includes/tandy1t.h
r17964r17965
1010
1111/*----------- defined in machine/tandy1t.c -----------*/
1212
13extern WRITE8_HANDLER ( pc_t1t_p37x_w );
14extern  READ8_HANDLER ( pc_t1t_p37x_r );
13extern DECLARE_WRITE8_HANDLER ( pc_t1t_p37x_w );
14extern  DECLARE_READ8_HANDLER ( pc_t1t_p37x_r );
1515
16extern WRITE8_HANDLER ( tandy1000_pio_w );
17extern  READ8_HANDLER(tandy1000_pio_r);
16extern DECLARE_WRITE8_HANDLER ( tandy1000_pio_w );
17extern  DECLARE_READ8_HANDLER(tandy1000_pio_r);
1818
1919extern NVRAM_HANDLER( tandy1000 );
2020
21READ8_HANDLER( tandy1000_bank_r );
22WRITE8_HANDLER( tandy1000_bank_w );
21DECLARE_READ8_HANDLER( tandy1000_bank_r );
22DECLARE_WRITE8_HANDLER( tandy1000_bank_w );
2323
2424INPUT_PORTS_EXTERN( t1000_keyboard );
2525
trunk/src/mess/includes/amstr_pc.h
r17964r17965
1414
1515/*----------- defined in machine/amstr_pc.c -----------*/
1616
17READ8_HANDLER( pc1640_port60_r );
18WRITE8_HANDLER( pc1640_port60_w );
17DECLARE_READ8_HANDLER( pc1640_port60_r );
18DECLARE_WRITE8_HANDLER( pc1640_port60_w );
1919
20READ8_HANDLER( pc1640_mouse_x_r );
21READ8_HANDLER( pc1640_mouse_y_r );
22WRITE8_HANDLER( pc1640_mouse_x_w );
23WRITE8_HANDLER( pc1640_mouse_y_w );
20DECLARE_READ8_HANDLER( pc1640_mouse_x_r );
21DECLARE_READ8_HANDLER( pc1640_mouse_y_r );
22DECLARE_WRITE8_HANDLER( pc1640_mouse_x_w );
23DECLARE_WRITE8_HANDLER( pc1640_mouse_y_w );
2424
25READ8_HANDLER( pc200_port378_r );
26READ8_HANDLER( pc200_port278_r );
27READ8_HANDLER( pc1640_port378_r );
28READ8_HANDLER( pc1640_port3d0_r );
29READ8_HANDLER( pc1640_port4278_r );
30READ8_HANDLER( pc1640_port278_r );
25DECLARE_READ8_HANDLER( pc200_port378_r );
26DECLARE_READ8_HANDLER( pc200_port278_r );
27DECLARE_READ8_HANDLER( pc1640_port378_r );
28DECLARE_READ8_HANDLER( pc1640_port3d0_r );
29DECLARE_READ8_HANDLER( pc1640_port4278_r );
30DECLARE_READ8_HANDLER( pc1640_port278_r );
3131
3232INPUT_PORTS_EXTERN( amstrad_keyboard );
3333
trunk/src/mess/includes/pc1251.h
r17964r17965
4545
4646/*----------- defined in video/pc1251.c -----------*/
4747
48READ8_HANDLER(pc1251_lcd_read);
49WRITE8_HANDLER(pc1251_lcd_write);
48DECLARE_READ8_HANDLER(pc1251_lcd_read);
49DECLARE_WRITE8_HANDLER(pc1251_lcd_write);
5050SCREEN_UPDATE_IND16( pc1251 );
5151
5252
trunk/src/mess/video/newport.c
r17964r17965
4242   }
4343}
4444
45static READ32_HANDLER( newport_cmap0_r );
46static WRITE32_HANDLER( newport_cmap0_w );
47static READ32_HANDLER( newport_cmap1_r );
48static READ32_HANDLER( newport_xmap0_r );
49static WRITE32_HANDLER( newport_xmap0_w );
50static READ32_HANDLER( newport_xmap1_r );
51static WRITE32_HANDLER( newport_xmap1_w );
52static READ32_HANDLER( newport_vc2_r );
53static WRITE32_HANDLER( newport_vc2_w );
45static DECLARE_READ32_HANDLER( newport_cmap0_r );
46static DECLARE_WRITE32_HANDLER( newport_cmap0_w );
47static DECLARE_READ32_HANDLER( newport_cmap1_r );
48static DECLARE_READ32_HANDLER( newport_xmap0_r );
49static DECLARE_WRITE32_HANDLER( newport_xmap0_w );
50static DECLARE_READ32_HANDLER( newport_xmap1_r );
51static DECLARE_WRITE32_HANDLER( newport_xmap1_w );
52static DECLARE_READ32_HANDLER( newport_vc2_r );
53static DECLARE_WRITE32_HANDLER( newport_vc2_w );
5454
5555struct VC2_t
5656{
trunk/src/mess/video/newport.h
r17964r17965
99extern VIDEO_START( newport );
1010extern SCREEN_UPDATE_RGB32( newport );
1111
12READ32_HANDLER( newport_rex3_r );
13WRITE32_HANDLER( newport_rex3_w );
12DECLARE_READ32_HANDLER( newport_rex3_r );
13DECLARE_WRITE32_HANDLER( newport_rex3_w );
1414
1515#endif
trunk/src/mess/video/gf4500.h
r17964r17965
99#ifndef __GF4500_H__
1010#define __GF4500_H__
1111
12READ32_HANDLER( gf4500_r );
13WRITE32_HANDLER( gf4500_w );
12DECLARE_READ32_HANDLER( gf4500_r );
13DECLARE_WRITE32_HANDLER( gf4500_w );
1414
1515VIDEO_START( gf4500 );
1616SCREEN_UPDATE_RGB32( gf4500 );
trunk/src/mess/video/pc_aga.c
r17964r17965
814814// but now cga and mda are splitted in mess
815815WRITE8_HANDLER( pc200_cga_w )
816816{
817   pc_aga_cga_w(space, offset,data);
817   pc_aga_cga_w(space, offset,data,mem_mask);
818818   switch(offset) {
819819   case 4:
820820      pc200.portd |= 0x20;
r17964r17965
872872      break;
873873
874874   default:
875      result = pc_aga_cga_r(space, offset);
875      result = pc_aga_cga_r(space, offset, mem_mask);
876876      break;
877877   }
878878   return result;
trunk/src/mess/video/pc_aga.h
r17964r17965
2828enum AGA_MODE  { AGA_OFF, AGA_COLOR, AGA_MONO };
2929void pc_aga_set_mode(running_machine &machine, AGA_MODE mode);
3030
31READ8_HANDLER( pc_aga_videoram_r );
32WRITE8_HANDLER( pc_aga_videoram_w );
31DECLARE_READ8_HANDLER( pc_aga_videoram_r );
32DECLARE_WRITE8_HANDLER( pc_aga_videoram_w );
3333
34READ8_HANDLER( pc200_videoram_r );
35WRITE8_HANDLER( pc200_videoram_w );
36READ16_HANDLER( pc200_videoram16le_r );
37WRITE16_HANDLER( pc200_videoram16le_w );
34DECLARE_READ8_HANDLER( pc200_videoram_r );
35DECLARE_WRITE8_HANDLER( pc200_videoram_w );
36DECLARE_READ16_HANDLER( pc200_videoram16le_r );
37DECLARE_WRITE16_HANDLER( pc200_videoram16le_w );
3838
39READ8_HANDLER( pc200_cga_r );
40WRITE8_HANDLER( pc200_cga_w );
41READ16_HANDLER( pc200_cga16le_r );
42WRITE16_HANDLER( pc200_cga16le_w );
39DECLARE_READ8_HANDLER( pc200_cga_r );
40DECLARE_WRITE8_HANDLER( pc200_cga_w );
41DECLARE_READ16_HANDLER( pc200_cga16le_r );
42DECLARE_WRITE16_HANDLER( pc200_cga16le_w );
4343
trunk/src/mess/drivers/x1.c
r17964r17965
19161916   NULL      /* update address callback */
19171917};
19181918
1919static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
1920static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
1919static UINT8 memory_read_byte(address_space &space, offs_t address, UINT8 mem_mask) { return space.read_byte(address); }
1920static void memory_write_byte(address_space &space, offs_t address, UINT8 data, UINT8 mem_mask) { space.write_byte(address, data); }
19211921
19221922static Z80DMA_INTERFACE( x1_dma )
19231923{
trunk/src/mess/drivers/mikromik.c
r17964r17965
537537   }
538538}
539539
540static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
541static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
540static UINT8 memory_read_byte(address_space &space, offs_t address, UINT8 mem_mask) { return space.read_byte(address); }
541static void memory_write_byte(address_space &space, offs_t address, UINT8 data, UINT8 mem_mask) { space.write_byte(address, data); }
542542
543543static I8237_INTERFACE( dmac_intf )
544544{
trunk/src/mess/drivers/qx10.c
r17964r17965
377377    Channel 2: GDC
378378    Channel 3: Option slots
379379*/
380static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
381static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
380static UINT8 memory_read_byte(address_space &space, offs_t address, UINT8 mem_mask) { return space.read_byte(address); }
381static void memory_write_byte(address_space &space, offs_t address, UINT8 data, UINT8 mem_mask) { space.write_byte(address, data); }
382382
383383static I8237_INTERFACE( qx10_dma8237_1_interface )
384384{
trunk/src/mess/drivers/bigbord2.c
r17964r17965
207207/* Z80 DMA */
208208
209209
210static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
211static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
210static UINT8 memory_read_byte(address_space &space, offs_t address, UINT8 mem_mask) { return space.read_byte(address); }
211static void memory_write_byte(address_space &space, offs_t address, UINT8 data, UINT8 mem_mask) { space.write_byte(address, data); }
212212
213213static Z80DMA_INTERFACE( dma_intf )
214214{
trunk/src/mess/drivers/bullet.c
r17964r17965
798798   }
799799}
800800
801static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
802static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
801static UINT8 memory_read_byte(address_space &space, offs_t address, UINT8 mem_mask) { return space.read_byte(address); }
802static void memory_write_byte(address_space &space, offs_t address, UINT8 data, UINT8 mem_mask) { space.write_byte(address, data); }
803803
804804static Z80DMA_INTERFACE( dma_intf )
805805{
trunk/src/mess/drivers/vidbrain.c
r17964r17965
449449   }
450450}
451451
452static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
452static UINT8 memory_read_byte(address_space &space, offs_t address, UINT8 mem_mask) { return space.read_byte(address); }
453453
454454static UV201_INTERFACE( uv_intf )
455455{
trunk/src/mess/drivers/trs80m2.c
r17964r17965
694694//  Z80DMA_INTERFACE( dma_intf )
695695//-------------------------------------------------
696696
697static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
698static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
697static UINT8 memory_read_byte(address_space &space, offs_t address, UINT8 mem_mask) { return space.read_byte(address); }
698static void memory_write_byte(address_space &space, offs_t address, UINT8 data, UINT8 mem_mask) { space.write_byte(address, data); }
699699
700700static Z80DMA_INTERFACE( dma_intf )
701701{
trunk/src/mess/drivers/p8k.c
r17964r17965
219219   p8k_daisy_interrupt(device, state);
220220}
221221
222static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
223static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
222static UINT8 memory_read_byte(address_space &space, offs_t address, UINT8 mem_mask) { return space.read_byte(address); }
223static void memory_write_byte(address_space &space, offs_t address, UINT8 data, UINT8 mem_mask) { space.write_byte(address, data); }
224224
225225static Z80DMA_INTERFACE( p8k_dma_intf )
226226{
trunk/src/mess/drivers/dc.c
r17964r17965
3535// things from mess/machine/dc.c
3636void dreamcast_atapi_init(running_machine &machine);
3737void dreamcast_atapi_reset(running_machine &machine);
38extern READ64_HANDLER( dc_mess_gdrom_r );
39extern WRITE64_HANDLER( dc_mess_gdrom_w );
40extern READ64_HANDLER( dc_mess_g1_ctrl_r );
41extern WRITE64_HANDLER( dc_mess_g1_ctrl_w );
38extern DECLARE_READ64_HANDLER( dc_mess_gdrom_r );
39extern DECLARE_WRITE64_HANDLER( dc_mess_gdrom_w );
40extern DECLARE_READ64_HANDLER( dc_mess_g1_ctrl_r );
41extern DECLARE_WRITE64_HANDLER( dc_mess_g1_ctrl_w );
4242
4343static READ64_HANDLER( dcus_idle_skip_r )
4444{
trunk/src/mess/drivers/super6.c
r17964r17965
396396//  Z80DMA_INTERFACE( dma_intf )
397397//-------------------------------------------------
398398
399static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
400static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
399static UINT8 memory_read_byte(address_space &space, offs_t address, UINT8 mem_mask) { return space.read_byte(address); }
400static void memory_write_byte(address_space &space, offs_t address, UINT8 data, UINT8 mem_mask) { space.write_byte(address, data); }
401401
402402static Z80DMA_INTERFACE( dma_intf )
403403{
trunk/src/mess/drivers/dmv.c
r17964r17965
277277   i8237_hlda_w(m_dmac, state);
278278}
279279
280static UINT8 memory_read_byte(address_space &space, offs_t address)          { return space.read_byte(address); }
281static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
280static UINT8 memory_read_byte(address_space &space, offs_t address, UINT8 mem_mask)          { return space.read_byte(address); }
281static void memory_write_byte(address_space &space, offs_t address, UINT8 data, UINT8 mem_mask) { space.write_byte(address, data); }
282282
283283static I8237_INTERFACE( dmv_dma8237_config )
284284{
trunk/src/mess/drivers/b16.c
r17964r17965
262262   NULL      /* update address callback */
263263};
264264
265static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
266static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
265static UINT8 memory_read_byte(address_space &space, offs_t address, UINT8 mem_mask) { return space.read_byte(address); }
266static void memory_write_byte(address_space &space, offs_t address, UINT8 data, UINT8 mem_mask) { space.write_byte(address, data); }
267267
268268static I8237_INTERFACE( b16_dma8237_interface )
269269{

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