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r17964 Monday 17th September, 2012 at 08:22:16 UTC by Aaron Giles
Memory handler normalization, part 2. Change legacy
read/write handlers to take an address_space & instead
of an address_space *. Also update pretty much all other
functions to take a reference where appropriate.
[Aaron Giles]
[src/emu]devcb.c memconv.h memory.c memory.h
[src/emu/cpu/dsp56k]dsp56mem.c
[src/emu/cpu/g65816]g65816.c g65816op.h
[src/emu/cpu/h6280]h6280.c
[src/emu/cpu/h83002]h8_16.c h8_8.c
[src/emu/cpu/lh5801]5801tbl.c
[src/emu/cpu/m37710]m37710.c
[src/emu/cpu/m6502]m4510.c m6502.c m6509.c mincce02.h
[src/emu/cpu/m6800]m6800.c
[src/emu/cpu/m68000]68307bus.c 68307ser.c 68307sim.c 68307sim.h 68307tmu.c 68340dma.c 68340ser.c 68340sim.c 68340tmu.c m68000.h m68kcpu.c
[src/emu/cpu/mips]r3000.c
[src/emu/cpu/powerpc]ppc.c ppc403.c ppc_mem.c ppccom.c
[src/emu/cpu/se3208]se3208.c
[src/emu/cpu/sh2]sh2comn.c sh2drc.c
[src/emu/cpu/sh4]sh3comn.c sh4comn.c
[src/emu/cpu/tlcs90]tlcs90.c
[src/emu/cpu/tlcs900]tlcs900.c
[src/emu/cpu/tms32051]tms32051.c
[src/emu/cpu/tms34010]34010gfx.c tms34010.c tms34010.h
[src/emu/cpu/tms7000]tms7000.c
[src/emu/cpu/tms9900]99xxcore.h
[src/emu/debug]debugcmd.c debugcpu.c debugcpu.h dvdisasm.c dvmemory.c
[src/emu/machine]53c810.c 8042kbdc.c amigafdc.c k056230.c latch8.c pc16552d.c s3c2400.c s3c2410.c s3c2440.c s3c24xx.c tmp68301.c v3021.c
[src/emu/sound]awacs.c awacs.h nile.c pokey.c spu.c vrender0.c
[src/emu/video]hd63484.c pc_cga.c pc_vga.c pc_vga.h tms34061.c tms34061.h
[src/mame/audio]8080bw.c amiga.c atarijsa.c cage.c cage.h carnival.c cclimber.c dcs.c depthch.c gorf.c invinco.c irem.c mario.c namco52.c namco54.c pulsar.c seibu.c snes_snd.c snk6502.c t5182.c taito_en.c taitosnd.c targ.c timeplt.c trackfld.c turbo.c vicdual.c wow.c
[src/mame/drivers]39in1.c aleck64.c appoooh.c aristmk5.c armedf.c astrocde.c astrocorp.c atarigt.c atarisy2.c atarisy4.c atetris.c atvtrack.c badlands.c balsente.c beathead.c berzerk.c bfcobra.c bfm_sc2.c bfm_sc4h.c btime.c bzone.c cabal.c calchase.c calorie.c cave.c cham24.c chihiro.c chinagat.c cmmb.c combatsc.c commando.c coolpool.c coolridr.c cps2.c cps3.c crystal.c cshooter.c csplayh5.c darkmist.c ddenlovr.c dec0.c dec8.c decocass.c discoboy.c dkong.c eolith.c eolith16.c eolithsp.c exidy.c exterm.c famibox.c fcrash.c firebeat.c flstory.c foodf.c freekick.c funworld.c gaelco.c galaga.c galaxian.c galivan.c galpanic.c gamtor.c gauntlet.c gladiatr.c gsword.c guab.c hng64.c homedata.c hshavoc.c hyprduel.c jack.c jalmah.c jpmsys5.c kaneko16.c kchamp.c kickgoal.c klax.c konamigx.c konamim2.c kyugo.c ladybug.c liberate.c macrossp.c magictg.c magtouch.c mainevt.c mappy.c mario.c mediagx.c megadrvb.c megaplay.c megatech.c metalmx.c metro.c midqslvr.c midvunit.c missile.c mitchell.c model2.c model3.c mouser.c mpu3.c mpu4hw.c mpu4vid.c mquake.c multigam.c mystwarr.c namcona1.c namcos11.c namcos12.c namcos21.c namcos23.c naomi.c nbmj9195.c neodrvr.c neogeo.c ninjakd2.c niyanpai.c nmk16.c nyny.c ojankohs.c omegrace.c opwolf.c pacman.c pangofun.c panicr.c pastelg.c pcat_dyn.c pcat_nit.c pcktgal.c pengo.c photoply.c pipedrm.c playch10.c plygonet.c pntnpuzl.c polepos.c powerbal.c progolf.c pturn.c queen.c quizpun2.c r2dx_v33.c raiden2.c rallyx.c redclash.c renegade.c safarir.c saturn.c savquest.c seattle.c segac2.c segag80r.c segag80v.c segas16a.c segas16b.c segas24.c segas32.c segaxbd.c seibuspi.c seicross.c seta.c sf.c shootout.c sigmab52.c skimaxx.c sothello.c spacefb.c srumbler.c ssfindo.c starwars.c su2000.c subsino2.c suna16.c suna8.c superqix.c supertnk.c suprgolf.c system1.c system16.c taito_l.c taitojc.c taitopjc.c taitowlf.c tasman.c tcl.c tiamc1.c tickee.c tigeroad.c tmnt.c toki.c trackfld.c trvquest.c vamphalf.c vcombat.c vega.c vegaeo.c vegas.c vendetta.c vicdual.c viper.c voyager.c vsnes.c williams.c wiz.c xtheball.c xtom3d.c zaxxon.c
[src/mame/includes]artmagic.h atari.h atarigt.h btoads.h eolithsp.h exterm.h gaelcrpt.h harddriv.h hyprduel.h jpmimpct.h metro.h midtunit.h midyunit.h model3.h nb1414m4.h nbmj9195.h neogeo.h ojankohs.h pastelg.h segaorun.h segas16b.h segas18.h slapstic.h williams.h
[src/mame/machine]acitya.c amiga.c archimds.c asic65.c asteroid.c atari.c atarigen.c bagman.c balsente.c bonzeadv.c cchip.c cclimber.c cd32.c cdi070.c cps2crpt.c cx4fn.c cx4oam.c dc.c deco102.c decocass.c decoprot.c fddebug.c gaelcrpt.c galaxold.c harddriv.c kabuki.c kaneko_calc3.c konami1.c konppc.c m68kfmly.c maniach.c mc8123.c mcr68.c md_cart.c megacd.c megadriv.c megasvp.c megavdp.c mhavoc.c micro3d.c midwayic.c midwayic.h midwunit.c midxunit.c model1.c namco50.c namco53.c namcoio.c namcos1.c namcos2.c naomi.c nb1413m3.c nb1414m4.c neoboot.c neoprot.c nmk004.c pcecommn.c pcshare.c pgmprot.c pgmprot1.c pgmprot2.c pgmprot3.c pgmprot4.c pgmprot5.c pgmprot6.c psx.c scramble.c scudsp.c scudsp.h segacrp2.c segacrpt.c segamsys.c segas32.c seicop.c slapstic.c slikshot.c smpc.c snes.c snes7110.c snesbsx.c snescx4.c snesrtc.c snessdd1.c stfight.c stvcd.c stvprot.c tait8741.c taitoio.c taitosj.c theglobp.c twincobr.c williams.c wrally.c xevious.c
[src/mame/video]amiga.c antic.c artmagic.c astrocde.c atari.c atarig1.c atarig42.c atarigx2.c atarisy1.c atarisy2.c avgdvg.c badlands.c baraduke.c bfm_adr2.c bfm_dm01.c blstroid.c bosco.c btoads.c capbowl.c cave.c cischeat.c combatsc.c cyberbal.c dc.c decocass.c digdug.c dogfgt.c exterm.c fastfred.c fuukifg2.c fuukifg3.c galpani2.c galpanic.c gauntlet.c gtia.c gtia.h gticlub.c harddriv.c hng64.c homedata.c hyhoo.c itech8.c jpmimpct.c konamiic.c konicdev.c leland.c lordgun.c mcd212.c megasys1.c midtunit.c midyunit.c midzeus2.c model3.c namcos1.c namcos2.c namcos22.c namcos86.c nbmj8688.c nbmj9195.c neogeo.c ojankohs.c pastelg.c popeye.c ppu2c0x.c ppu2c0x.h redclash.c segaic16.c segas32.c simpsons.c skullxbo.c skydiver.c snes.c stvvdp1.c stvvdp2.c taito_b.c taitoic.c toaplan1.c toobin.c vdc.c vindictr.c vrender0.c williams.c xevious.c ygv608.c
[src/mess/drivers]a2600.c a5105.c amiga.c apexc.c apollo.c aquarius.c astrocde.c atm.c avigo.c b16.c basic52.c bebox.c bigbord2.c bullet.c c128.c c64.c cd2650.c d6800.c dc.c dmv.c enterp.c esq5505.c fk1.c fm7.c fmtowns.c gba.c gp32.c homelab.c indiana.c instruct.c ip22.c itt3030.c lynx.c mc10.c megadriv.c mikromik.c mmodular.c nanos.c nc.c nes.c next.c ng_aes.c p8k.c palm.c pc6001.c pc88va.c pc9801.c pce220.c pcw.c pcw16.c pentagon.c pipbug.c psion.c psx.c px4.c qx10.c samcoupe.c sc2.c scorpion.c spc1000.c spec128.c specpls3.c spectrum.c super6.c timex.c trs80m2.c tvc.c vc4000.c vidbrain.c vii.c vt520.c vtech1.c x07.c x1.c x1twin.c x68k.c
[src/mess/formats]ace_ace.c cbm_snqk.c m65_snqk.c spec_snqk.c z80bin.c
[src/mess/includes]samcoupe.h
[src/mess/machine]990_hd.c a7800.c aim65.c amigacd.c amigacrt.c amstr_pc.c amstrad.c apollo.c apple1.c apple2.c apple2gs.c apple3.c at.c ataricrt.c b2m.c bebox.c c64.c c65.c cgenie.c comx_clm.c concept.c corvushd.c cpc_ssa1.c dccons.c dgn_beta.c europc.c galaxy.c gb.c hd63450.c hec2hrp.c hecdisk2.c hp48.c intv.c iq151_staper.c isa.c kaypro.c kc.c lisa.c llc.c lux21046.c lviv.c lynx.c mac.c mbc55x.c mbee.c mboard.c microtan.c mpc105.c msx_slot.c mz700.c nes.c nes_ines.c nes_mmc.c nes_pcb.c northbridge.c nubus.c oric.c orion.c osborne1.c partner.c pc.c pc1350.c pc1403.c pc_fdc.c pc_joy.c pc_joy.h pecom.c pet.c pk8020.c pmd85.c pokemini.c poly88.c pp01.c primo.c radio86.c rmnimbus.c s3c44b0.c samcoupe.c sgi.c sms.c snescart.c sorcerer.c special.c tandy1t.c tf20.c thomflop.c thomson.c ti85.c trs80.c upd71071.c vector06.c vtech2.c wswan.c x68k_neptunex.c x68k_scsiext.c z80ne.c zx.c
[src/mess/video]a7800.c ac1.c apple3.c bbc.c cgenie.c cirrus.c dai.c dgn_beta.c epnick.c galaxy.c gb.c gf4500.c hp48.c intv.c iq151_grafik.c irisha.c isa_cga.c isa_svga_cirrus.c isa_svga_s3.c isa_svga_tseng.c isa_vga.c isa_vga_ati.c kramermc.c newport.c nubus_cb264.c oric.c pc1251.c pc1350.c pc1401.c pc1403.c pc_aga.c pc_t1t.c stic.c ti85.c x68k.c

trunk/src/mame/audio/turbo.c
r17963r17964
112112#else
113113
114114   if (((data ^ state->m_last_sound_a) & 0x1e) && (state->m_last_sound_a & 0x1e) != 0x1e)
115      space->machine().scheduler().timer_set(attotime::from_hz(20000), FUNC(update_sound_a), data);
115      space.machine().scheduler().timer_set(attotime::from_hz(20000), FUNC(update_sound_a), data);
116116   else
117117      update_sound_a(data);
118118
trunk/src/mame/audio/gorf.c
r17963r17964
114114{
115115   UINT8 data = offset >> 8;
116116#if USE_FAKE_VOTRAX
117   astrocde_state *state = space->machine().driver_data<astrocde_state>();
118   samples_device *samples = space->machine().device<samples_device>("samples");
117   astrocde_state *state = space.machine().driver_data<astrocde_state>();
118   samples_device *samples = space.machine().device<samples_device>("samples");
119119   int Phoneme, Intonation;
120120   int i = 0;
121121   offset &= 0xff;
r17963r17964
172172      }
173173   }
174174#else
175   votrax_sc01_device *votrax = space->machine().device<votrax_sc01_device>("votrax");
176   votrax->inflection_w(*space, 0, data >> 6);
177   votrax->write(*space, 0, data);
175   votrax_sc01_device *votrax = space.machine().device<votrax_sc01_device>("votrax");
176   votrax->inflection_w(space, 0, data >> 6);
177   votrax->write(space, 0, data);
178178#endif
179179
180180   /* Note : We should really also use volume in this as well as frequency */
trunk/src/mame/audio/atarijsa.c
r17963r17964
203203
204204static READ8_HANDLER( jsa1_io_r )
205205{
206   atarigen_state *atarigen = space->machine().driver_data<atarigen_state>();
206   atarigen_state *atarigen = space.machine().driver_data<atarigen_state>();
207207   int result = 0xff;
208208
209209   switch (offset & 0x206)
r17963r17964
227227                0x02 = coin 2
228228                0x01 = coin 1
229229            */
230         result = space->machine().root_device().ioport("JSAI")->read();
231         if (!(space->machine().root_device().ioport(test_port)->read() & test_mask)) result ^= 0x80;
230         result = space.machine().root_device().ioport("JSAI")->read();
231         if (!(space.machine().root_device().ioport(test_port)->read() & test_mask)) result ^= 0x80;
232232         if (atarigen->m_cpu_to_sound_ready) result ^= 0x40;
233233         if (atarigen->m_sound_to_cpu_ready) result ^= 0x20;
234234         if ((tms5220 != NULL) && (tms5220_readyq_r(tms5220) == 0))
r17963r17964
269269
270270      case 0x200:      /* /VOICE */
271271         if (tms5220 != NULL)
272            tms5220_data_w(tms5220, *space, 0, data);
272            tms5220_data_w(tms5220, space, 0, data);
273273         break;
274274
275275      case 0x202:      /* /WRP */
r17963r17964
298298         }
299299
300300         /* reset the YM2151 if needed */
301         if ((data&1) == 0) space->machine().device("ymsnd")->reset();
301         if ((data&1) == 0) space.machine().device("ymsnd")->reset();
302302
303303         /* coin counters */
304         coin_counter_w(space->machine(), 1, (data >> 5) & 1);
305         coin_counter_w(space->machine(), 0, (data >> 4) & 1);
304         coin_counter_w(space.machine(), 1, (data >> 5) & 1);
305         coin_counter_w(space.machine(), 0, (data >> 4) & 1);
306306
307307         /* update the bank */
308308         memcpy(bank_base, &bank_source_data[0x1000 * ((data >> 6) & 3)], 0x1000);
r17963r17964
318318         tms5220_volume = ((data >> 6) & 3) * 100 / 3;
319319         pokey_volume = ((data >> 4) & 3) * 100 / 3;
320320         ym2151_volume = ((data >> 1) & 7) * 100 / 7;
321         update_all_volumes(space->machine());
321         update_all_volumes(space.machine());
322322         break;
323323   }
324324}
r17963r17964
333333
334334static READ8_HANDLER( jsa2_io_r )
335335{
336   atarigen_state *atarigen = space->machine().driver_data<atarigen_state>();
336   atarigen_state *atarigen = space.machine().driver_data<atarigen_state>();
337337   int result = 0xff;
338338
339339   switch (offset & 0x206)
340340   {
341341      case 0x000:      /* /RDV */
342342         if (oki6295 != NULL)
343            result = oki6295->read(*space, offset);
343            result = oki6295->read(space, offset);
344344         else
345345            logerror("atarijsa: Unknown read at %04X\n", offset & 0x206);
346346         break;
r17963r17964
360360                0x02 = coin 2
361361                0x01 = coin 1
362362            */
363         result = space->machine().root_device().ioport("JSAII")->read();
364         if (!(space->machine().root_device().ioport(test_port)->read() & test_mask)) result ^= 0x80;
363         result = space.machine().root_device().ioport("JSAII")->read();
364         if (!(space.machine().root_device().ioport(test_port)->read() & test_mask)) result ^= 0x80;
365365         if (atarigen->m_cpu_to_sound_ready) result ^= 0x40;
366366         if (atarigen->m_sound_to_cpu_ready) result ^= 0x20;
367367         break;
r17963r17964
398398
399399      case 0x200:      /* /WRV */
400400         if (oki6295 != NULL)
401            oki6295->write(*space, offset, data);
401            oki6295->write(space, offset, data);
402402         else
403403            logerror("atarijsa: Unknown write (%02X) at %04X\n", data & 0xff, offset & 0x206);
404404         break;
r17963r17964
419419            */
420420
421421         /* reset the YM2151 if needed */
422         if ((data&1) == 0) space->machine().device("ymsnd")->reset();
422         if ((data&1) == 0) space.machine().device("ymsnd")->reset();
423423
424424         /* update the bank */
425425         memcpy(bank_base, &bank_source_data[0x1000 * ((data >> 6) & 3)], 0x1000);
426426
427427         /* coin counters */
428         coin_counter_w(space->machine(), 1, (data >> 5) & 1);
429         coin_counter_w(space->machine(), 0, (data >> 4) & 1);
428         coin_counter_w(space.machine(), 1, (data >> 5) & 1);
429         coin_counter_w(space.machine(), 0, (data >> 4) & 1);
430430
431431         /* update the OKI frequency */
432432         if (oki6295 != NULL)
r17963r17964
443443            */
444444         ym2151_volume = ((data >> 1) & 7) * 100 / 7;
445445         oki6295_volume = 50 + (data & 1) * 50;
446         update_all_volumes(space->machine());
446         update_all_volumes(space.machine());
447447         break;
448448   }
449449}
r17963r17964
458458
459459static READ8_HANDLER( jsa3_io_r )
460460{
461   atarigen_state *atarigen = space->machine().driver_data<atarigen_state>();
461   atarigen_state *atarigen = space.machine().driver_data<atarigen_state>();
462462   int result = 0xff;
463463
464464   switch (offset & 0x206)
465465   {
466466      case 0x000:      /* /RDV */
467467         if (oki6295 != NULL)
468            result = oki6295->read(*space, offset);
468            result = oki6295->read(space, offset);
469469         break;
470470
471471      case 0x002:      /* /RDP */
r17963r17964
483483                0x02 = coin L (active high)
484484                0x01 = coin R (active high)
485485            */
486         result = space->machine().root_device().ioport("JSAIII")->read();
487         if (!(space->machine().root_device().ioport(test_port)->read() & test_mask)) result ^= 0x90;
486         result = space.machine().root_device().ioport("JSAIII")->read();
487         if (!(space.machine().root_device().ioport(test_port)->read() & test_mask)) result ^= 0x90;
488488         if (atarigen->m_cpu_to_sound_ready) result ^= 0x40;
489489         if (atarigen->m_sound_to_cpu_ready) result ^= 0x20;
490490         break;
r17963r17964
511511   {
512512      case 0x000:      /* /RDV */
513513         overall_volume = data * 100 / 127;
514         update_all_volumes(space->machine());
514         update_all_volumes(space.machine());
515515         break;
516516
517517      case 0x002:      /* /RDP */
r17963r17964
525525
526526      case 0x200:      /* /WRV */
527527         if (oki6295 != NULL)
528            oki6295->write(*space, offset, data);
528            oki6295->write(space, offset, data);
529529         break;
530530
531531      case 0x202:      /* /WRP */
r17963r17964
544544            */
545545
546546         /* reset the YM2151 if needed */
547         if ((data&1) == 0) space->machine().device("ymsnd")->reset();
547         if ((data&1) == 0) space.machine().device("ymsnd")->reset();
548548
549549         /* update the OKI bank */
550550         if (oki6295 != NULL)
551            space->machine().root_device().membank("bank12")->set_entry((space->machine().root_device().membank("bank12")->entry() & 2) | ((data >> 1) & 1));
551            space.machine().root_device().membank("bank12")->set_entry((space.machine().root_device().membank("bank12")->entry() & 2) | ((data >> 1) & 1));
552552
553553         /* update the bank */
554554         memcpy(bank_base, &bank_source_data[0x1000 * ((data >> 6) & 3)], 0x1000);
555555
556556         /* coin counters */
557         coin_counter_w(space->machine(), 1, (data >> 5) & 1);
558         coin_counter_w(space->machine(), 0, (data >> 4) & 1);
557         coin_counter_w(space.machine(), 1, (data >> 5) & 1);
558         coin_counter_w(space.machine(), 0, (data >> 4) & 1);
559559
560560         /* update the OKI frequency */
561561         if (oki6295 != NULL) oki6295->set_pin7(data & 8);
r17963r17964
572572
573573         /* update the OKI bank */
574574         if (oki6295 != NULL)
575            space->machine().root_device().membank("bank12")->set_entry((space->machine().root_device().membank("bank12")->entry() & 1) | ((data >> 3) & 2));
575            space.machine().root_device().membank("bank12")->set_entry((space.machine().root_device().membank("bank12")->entry() & 1) | ((data >> 3) & 2));
576576
577577         /* update the volumes */
578578         ym2151_volume = ((data >> 1) & 7) * 100 / 7;
579579         oki6295_volume = 50 + (data & 1) * 50;
580         update_all_volumes(space->machine());
580         update_all_volumes(space.machine());
581581         break;
582582   }
583583}
r17963r17964
592592
593593static READ8_HANDLER( jsa3s_io_r )
594594{
595   atarigen_state *atarigen = space->machine().driver_data<atarigen_state>();
595   atarigen_state *atarigen = space.machine().driver_data<atarigen_state>();
596596   int result = 0xff;
597597
598598   switch (offset & 0x206)
599599   {
600600      case 0x000:      /* /RDV */
601601         if (oki6295_l != NULL)
602            result = ((offset & 1) ? oki6295_r : oki6295_l)->read(*space, offset);
602            result = ((offset & 1) ? oki6295_r : oki6295_l)->read(space, offset);
603603         break;
604604
605605      case 0x002:      /* /RDP */
r17963r17964
617617                0x02 = coin L (active high)
618618                0x01 = coin R (active high)
619619            */
620         result = space->machine().root_device().ioport("JSAIII")->read();
621         if (!(space->machine().root_device().ioport(test_port)->read() & test_mask)) result ^= 0x90;
620         result = space.machine().root_device().ioport("JSAIII")->read();
621         if (!(space.machine().root_device().ioport(test_port)->read() & test_mask)) result ^= 0x90;
622622         if (atarigen->m_cpu_to_sound_ready) result ^= 0x40;
623623         if (atarigen->m_sound_to_cpu_ready) result ^= 0x20;
624624         break;
r17963r17964
645645   {
646646      case 0x000:      /* /RDV */
647647         overall_volume = data * 100 / 127;
648         update_all_volumes(space->machine());
648         update_all_volumes(space.machine());
649649         break;
650650
651651      case 0x002:      /* /RDP */
r17963r17964
659659
660660      case 0x200:      /* /WRV */
661661         if (oki6295_l != NULL)
662            ((offset & 1) ? oki6295_r : oki6295_l)->write(*space, 0, data);
662            ((offset & 1) ? oki6295_r : oki6295_l)->write(space, 0, data);
663663         break;
664664
665665      case 0x202:      /* /WRP */
r17963r17964
678678            */
679679
680680         /* reset the YM2151 if needed */
681         if ((data&1) == 0) space->machine().device("ymsnd")->reset();
681         if ((data&1) == 0) space.machine().device("ymsnd")->reset();
682682
683683         /* update the OKI bank */
684         space->machine().root_device().membank("bank12")->set_entry((space->machine().root_device().membank("bank12")->entry() & 2) | ((data >> 1) & 1));
684         space.machine().root_device().membank("bank12")->set_entry((space.machine().root_device().membank("bank12")->entry() & 2) | ((data >> 1) & 1));
685685
686686         /* update the bank */
687687         memcpy(bank_base, &bank_source_data[0x1000 * ((data >> 6) & 3)], 0x1000);
688688
689689         /* coin counters */
690         coin_counter_w(space->machine(), 1, (data >> 5) & 1);
691         coin_counter_w(space->machine(), 0, (data >> 4) & 1);
690         coin_counter_w(space.machine(), 1, (data >> 5) & 1);
691         coin_counter_w(space.machine(), 0, (data >> 4) & 1);
692692
693693         /* update the OKI frequency */
694694         oki6295_l->set_pin7(data & 8);
r17963r17964
705705            */
706706
707707         /* update the OKI bank */
708         space->machine().root_device().membank("bank12")->set_entry((space->machine().root_device().membank("bank12")->entry() & 1) | ((data >> 3) & 2));
709         space->machine().root_device().membank("bank14")->set_entry(data >> 6);
708         space.machine().root_device().membank("bank12")->set_entry((space.machine().root_device().membank("bank12")->entry() & 1) | ((data >> 3) & 2));
709         space.machine().root_device().membank("bank14")->set_entry(data >> 6);
710710
711711         /* update the volumes */
712712         ym2151_volume = ((data >> 1) & 7) * 100 / 7;
713713         oki6295_volume = 50 + (data & 1) * 50;
714         update_all_volumes(space->machine());
714         update_all_volumes(space.machine());
715715         break;
716716   }
717717}
trunk/src/mame/audio/cage.c
r17963r17964
204204}
205205
206206
207void cage_reset_w(address_space *space, int state)
207void cage_reset_w(address_space &space, int state)
208208{
209209   cage_t *sndstate = &cage;
210210   if (state)
211      cage_control_w(space->machine(), 0);
211      cage_control_w(space.machine(), 0);
212212   sndstate->cpu->set_input_line(INPUT_LINE_RESET, state ? ASSERT_LINE : CLEAR_LINE);
213213}
214214
r17963r17964
246246}
247247
248248
249static void update_dma_state(address_space *space)
249static void update_dma_state(address_space &space)
250250{
251251   cage_t *state = &cage;
252252   UINT32 *tms32031_io_regs = state->tms32031_io_regs;
r17963r17964
272272      inc = (tms32031_io_regs[DMA_GLOBAL_CTL] >> 4) & 1;
273273      for (i = 0; i < tms32031_io_regs[DMA_TRANSFER_COUNT]; i++)
274274      {
275         sound_data[i % STACK_SOUND_BUFSIZE] = space->read_dword(addr * 4);
275         sound_data[i % STACK_SOUND_BUFSIZE] = space.read_dword(addr * 4);
276276         addr += inc;
277277         if (i % STACK_SOUND_BUFSIZE == STACK_SOUND_BUFSIZE - 1)
278278            dmadac_transfer(&state->dmadac[0], DAC_BUFFER_CHANNELS, 1, DAC_BUFFER_CHANNELS, STACK_SOUND_BUFSIZE / DAC_BUFFER_CHANNELS, sound_data);
r17963r17964
410410   }
411411
412412   if (LOG_32031_IOPORTS)
413      logerror("CAGE:%06X:%s read -> %08X\n", space->device().safe_pc(), register_names[offset & 0x7f], result);
413      logerror("CAGE:%06X:%s read -> %08X\n", space.device().safe_pc(), register_names[offset & 0x7f], result);
414414   return result;
415415}
416416
r17963r17964
423423   COMBINE_DATA(&tms32031_io_regs[offset]);
424424
425425   if (LOG_32031_IOPORTS)
426      logerror("CAGE:%06X:%s write = %08X\n", space->device().safe_pc(), register_names[offset & 0x7f], tms32031_io_regs[offset]);
426      logerror("CAGE:%06X:%s write = %08X\n", space.device().safe_pc(), register_names[offset & 0x7f], tms32031_io_regs[offset]);
427427
428428   switch (offset)
429429   {
r17963r17964
462462      case SPORT_GLOBAL_CTL:
463463      case SPORT_TIMER_CTL:
464464      case SPORT_TIMER_PERIOD:
465         update_serial(space->machine());
465         update_serial(space.machine());
466466         break;
467467   }
468468}
r17963r17964
506506{
507507   cage_t *state = &cage;
508508   if (LOG_COMM)
509      logerror("%06X:CAGE read command = %04X\n", space->device().safe_pc(), state->from_main);
509      logerror("%06X:CAGE read command = %04X\n", space.device().safe_pc(), state->from_main);
510510   state->cpu_to_cage_ready = 0;
511   update_control_lines(space->machine());
511   update_control_lines(space.machine());
512512   state->cpu->set_input_line(TMS3203X_IRQ0, CLEAR_LINE);
513513   return state->from_main;
514514}
r17963r17964
519519   if (LOG_COMM)
520520   {
521521      cage_t *state = &cage;
522      logerror("%06X:CAGE ack command = %04X\n", space->device().safe_pc(), state->from_main);
522      logerror("%06X:CAGE ack command = %04X\n", space.device().safe_pc(), state->from_main);
523523   }
524524}
525525
r17963r17964
528528{
529529   cage_t *state = &cage;
530530   if (LOG_COMM)
531      logerror("%06X:Data from CAGE = %04X\n", space->device().safe_pc(), data);
532   driver_device *drvstate = space->machine().driver_data<driver_device>();
533   drvstate->soundlatch_word_w(*space, 0, data, mem_mask);
531      logerror("%06X:Data from CAGE = %04X\n", space.device().safe_pc(), data);
532   driver_device *drvstate = space.machine().driver_data<driver_device>();
533   drvstate->soundlatch_word_w(space, 0, data, mem_mask);
534534   state->cage_to_cpu_ready = 1;
535   update_control_lines(space->machine());
535   update_control_lines(space.machine());
536536}
537537
538538
r17963r17964
548548}
549549
550550
551UINT16 cage_main_r(address_space *space)
551UINT16 cage_main_r(address_space &space)
552552{
553553   cage_t *state = &cage;
554   driver_device *drvstate = space->machine().driver_data<driver_device>();
554   driver_device *drvstate = space.machine().driver_data<driver_device>();
555555   if (LOG_COMM)
556      logerror("%s:main read data = %04X\n", space->machine().describe_context(), drvstate->soundlatch_word_r(*space, 0, 0));
556      logerror("%s:main read data = %04X\n", space.machine().describe_context(), drvstate->soundlatch_word_r(space, 0, 0));
557557   state->cage_to_cpu_ready = 0;
558   update_control_lines(space->machine());
559   return drvstate->soundlatch_word_r(*space, 0, 0xffff);
558   update_control_lines(space.machine());
559   return drvstate->soundlatch_word_r(space, 0, 0xffff);
560560}
561561
562562
r17963r17964
570570}
571571
572572
573void cage_main_w(address_space *space, UINT16 data)
573void cage_main_w(address_space &space, UINT16 data)
574574{
575575   if (LOG_COMM)
576      logerror("%s:Command to CAGE = %04X\n", space->machine().describe_context(), data);
577   space->machine().scheduler().synchronize(FUNC(cage_deferred_w), data);
576      logerror("%s:Command to CAGE = %04X\n", space.machine().describe_context(), data);
577   space.machine().scheduler().synchronize(FUNC(cage_deferred_w), data);
578578}
579579
580580
r17963r17964
637637{
638638   cage_t *state = &cage;
639639
640   space->device().execute().eat_cycles(100);
640   space.device().execute().eat_cycles(100);
641641   COMBINE_DATA(&state->speedup_ram[offset]);
642642}
643643
trunk/src/mame/audio/namco52.c
r17963r17964
7878
7979static READ8_HANDLER( namco_52xx_K_r )
8080{
81   namco_52xx_state *state = get_safe_token(space->device().owner());
81   namco_52xx_state *state = get_safe_token(space.device().owner());
8282   return state->m_latched_cmd & 0x0f;
8383}
8484
8585static READ8_HANDLER( namco_52xx_SI_r )
8686{
87   namco_52xx_state *state = get_safe_token(space->device().owner());
87   namco_52xx_state *state = get_safe_token(space.device().owner());
8888   return state->m_si(0) ? 1 : 0;
8989}
9090
9191static READ8_HANDLER( namco_52xx_R0_r )
9292{
93   namco_52xx_state *state = get_safe_token(space->device().owner());
93   namco_52xx_state *state = get_safe_token(space.device().owner());
9494   return state->m_romread(state->m_address) & 0x0f;
9595}
9696
9797static READ8_HANDLER( namco_52xx_R1_r )
9898{
99   namco_52xx_state *state = get_safe_token(space->device().owner());
99   namco_52xx_state *state = get_safe_token(space.device().owner());
100100   return state->m_romread(state->m_address) >> 4;
101101}
102102
103103
104104static WRITE8_HANDLER( namco_52xx_P_w )
105105{
106   namco_52xx_state *state = get_safe_token(space->device().owner());
107   discrete_sound_w(state->m_discrete, *space, NAMCO_52XX_P_DATA(state->m_basenode), data & 0x0f);
106   namco_52xx_state *state = get_safe_token(space.device().owner());
107   discrete_sound_w(state->m_discrete, space, NAMCO_52XX_P_DATA(state->m_basenode), data & 0x0f);
108108}
109109
110110static WRITE8_HANDLER( namco_52xx_R2_w )
111111{
112   namco_52xx_state *state = get_safe_token(space->device().owner());
112   namco_52xx_state *state = get_safe_token(space.device().owner());
113113   state->m_address = (state->m_address & 0xfff0) | ((data & 0xf) << 0);
114114}
115115
116116static WRITE8_HANDLER( namco_52xx_R3_w )
117117{
118   namco_52xx_state *state = get_safe_token(space->device().owner());
118   namco_52xx_state *state = get_safe_token(space.device().owner());
119119   state->m_address = (state->m_address & 0xff0f) | ((data & 0xf) << 4);
120120}
121121
122122static WRITE8_HANDLER( namco_52xx_O_w )
123123{
124   namco_52xx_state *state = get_safe_token(space->device().owner());
124   namco_52xx_state *state = get_safe_token(space.device().owner());
125125   if (data & 0x10)
126126      state->m_address = (state->m_address & 0x0fff) | ((data & 0xf) << 12);
127127   else
trunk/src/mame/audio/cage.h
r17963r17964
1212
1313void cage_init(running_machine &machine, offs_t speedup);
1414void cage_set_irq_handler(void (*irqhandler)(running_machine &, int));
15void cage_reset_w(address_space *space, int state);
15void cage_reset_w(address_space &space, int state);
1616
17UINT16 cage_main_r(address_space *space);
18void cage_main_w(address_space *space, UINT16 data);
17UINT16 cage_main_r(address_space &space);
18void cage_main_w(address_space &space, UINT16 data);
1919
2020UINT16 cage_control_r(running_machine &machine);
2121void cage_control_w(running_machine &machine, UINT16 data);
trunk/src/mame/audio/depthch.c
r17963r17964
5555WRITE8_HANDLER( depthch_audio_w )
5656{
5757   static int port1State = 0;
58   samples_device *samples = space->machine().device<samples_device>("samples");
58   samples_device *samples = space.machine().device<samples_device>("samples");
5959   int bitsChanged;
6060   int bitsGoneHigh;
6161   int bitsGoneLow;
trunk/src/mame/audio/taitosnd.c
r17963r17964
109109         break;
110110
111111      case 0x04:      // port status
112         //logerror("taitosnd: Master issued control value %02x (PC = %08x) \n",data, space->device().safe_pc() );
112         //logerror("taitosnd: Master issued control value %02x (PC = %08x) \n",data, space.device().safe_pc() );
113113         /* this does a hi-lo transition to reset the sound cpu */
114114         if (data)
115115            tc0140syt->slavecpu->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
r17963r17964
240240         break;
241241
242242      case 0x01:      // mode #1
243         //logerror("taitosnd: Slave cpu receives 0/1 : %01x%01x PC=%4x\n", tc0140syt->slavedata[1] , tc0140syt->slavedata[0],space->device().safe_pc());
243         //logerror("taitosnd: Slave cpu receives 0/1 : %01x%01x PC=%4x\n", tc0140syt->slavedata[1] , tc0140syt->slavedata[0],space.device().safe_pc());
244244         tc0140syt->status &= ~TC0140SYT_PORT01_FULL;
245245         res = tc0140syt->slavedata[tc0140syt->submode ++];
246246         break;
trunk/src/mame/audio/carnival.c
r17963r17964
127127WRITE8_HANDLER( carnival_audio_1_w )
128128{
129129   static int port1State = 0;
130   samples_device *samples = space->machine().device<samples_device>("samples");
130   samples_device *samples = space.machine().device<samples_device>("samples");
131131   int bitsChanged;
132132   int bitsGoneHigh;
133133   int bitsGoneLow;
r17963r17964
206206
207207WRITE8_HANDLER( carnival_audio_2_w )
208208{
209   samples_device *samples = space->machine().device<samples_device>("samples");
209   samples_device *samples = space.machine().device<samples_device>("samples");
210210   int bitsChanged;
211211   int bitsGoneHigh;
212212   int bitsGoneLow;
r17963r17964
236236
237237   if ( bitsGoneHigh & OUT_PORT_2_MUSIC_RESET )
238238      /* reset output is no longer asserted active low */
239      space->machine().device("audiocpu")->execute().set_input_line(INPUT_LINE_RESET, PULSE_LINE );
239      space.machine().device("audiocpu")->execute().set_input_line(INPUT_LINE_RESET, PULSE_LINE );
240240}
241241
242242
trunk/src/mame/audio/taito_en.c
r17963r17964
6464
6565static WRITE16_HANDLER( en_es5505_bank_w )
6666{
67   UINT32 max_banks_this_game = (space->machine().root_device().memregion("ensoniq.0")->bytes()/0x200000)-1;
67   UINT32 max_banks_this_game = (space.machine().root_device().memregion("ensoniq.0")->bytes()/0x200000)-1;
6868
6969#if 0
7070{
r17963r17964
7676
7777   /* mask out unused bits */
7878   data &= max_banks_this_game;
79   es5505_voice_bank_w(space->machine().device("ensoniq"),offset,data<<20);
79   es5505_voice_bank_w(space.machine().device("ensoniq"),offset,data<<20);
8080}
8181
8282static WRITE16_HANDLER( en_volume_w )
8383{
8484   if (ACCESSING_BITS_8_15)
85      mb87078_data_w(space->machine().device("mb87078"), data >> 8, offset ^ 1);
85      mb87078_data_w(space.machine().device("mb87078"), data >> 8, offset ^ 1);
8686}
8787
8888
r17963r17964
9494
9595static READ16_HANDLER( es5510_dsp_r )
9696{
97//  logerror("%06x: DSP read offset %04x (data is %04x)\n",space->device().safe_pc(),offset,es5510_dsp_ram[offset]);
97//  logerror("%06x: DSP read offset %04x (data is %04x)\n",space.device().safe_pc(),offset,es5510_dsp_ram[offset]);
9898//  if (es_tmp) return es5510_dsp_ram[offset];
9999/*
100100    switch (offset) {
r17963r17964
106106*/
107107//  offset<<=1;
108108
109//if (offset<7 && es5510_dsp_ram[0]!=0xff) return space->machine().rand()%0xffff;
109//if (offset<7 && es5510_dsp_ram[0]!=0xff) return space.machine().rand()%0xffff;
110110
111111   switch(offset)
112112   {
r17963r17964
125125
126126static WRITE16_HANDLER( es5510_dsp_w )
127127{
128   UINT8 *snd_mem = (UINT8 *)space->machine().root_device().memregion("ensoniq.0")->base();
128   UINT8 *snd_mem = (UINT8 *)space.machine().root_device().memregion("ensoniq.0")->base();
129129
130130//  if (offset>4 && offset!=0x80  && offset!=0xa0  && offset!=0xc0  && offset!=0xe0)
131//      logerror("%06x: DSP write offset %04x %04x\n",space->device().safe_pc(),offset,data);
131//      logerror("%06x: DSP write offset %04x %04x\n",space.device().safe_pc(),offset,data);
132132
133133   COMBINE_DATA(&es5510_dsp_ram[offset]);
134134
trunk/src/mame/audio/seibu.c
r17963r17964
104104
105105void seibu_sound_decrypt(running_machine &machine,const char *cpu,int length)
106106{
107   address_space *space = machine.device(cpu)->memory().space(AS_PROGRAM);
107   address_space &space = *machine.device(cpu)->memory().space(AS_PROGRAM);
108108   UINT8 *decrypt = auto_alloc_array(machine, UINT8, length);
109109   UINT8 *rom = machine.root_device().memregion(cpu)->base();
110110   int i;
111111
112   space->set_decrypted_region(0x0000, (length < 0x10000) ? (length - 1) : 0x1fff, decrypt);
112   space.set_decrypted_region(0x0000, (length < 0x10000) ? (length - 1) : 0x1fff, decrypt);
113113
114114   for (i = 0;i < length;i++)
115115   {
r17963r17964
296296WRITE8_HANDLER( seibu_irq_clear_w )
297297{
298298   /* Denjin Makai and SD Gundam doesn't like this, it's tied to the rst18 ack ONLY so it could be related to it. */
299   //update_irq_lines(space->machine(), VECTOR_INIT);
299   //update_irq_lines(space.machine(), VECTOR_INIT);
300300}
301301
302302WRITE8_HANDLER( seibu_rst10_ack_w )
r17963r17964
306306
307307WRITE8_HANDLER( seibu_rst18_ack_w )
308308{
309   update_irq_lines(space->machine(), RST18_CLEAR);
309   update_irq_lines(space.machine(), RST18_CLEAR);
310310}
311311
312312void seibu_ym3812_irqhandler(device_t *device, int linestate)
r17963r17964
349349
350350WRITE8_HANDLER( seibu_bank_w )
351351{
352   space->machine().root_device().membank("bank1")->set_entry(data & 1);
352   space.machine().root_device().membank("bank1")->set_entry(data & 1);
353353}
354354
355355WRITE8_HANDLER( seibu_coin_w )
356356{
357   coin_counter_w(space->machine(), 0,data & 1);
358   coin_counter_w(space->machine(), 1,data & 2);
357   coin_counter_w(space.machine(), 0,data & 1);
358   coin_counter_w(space.machine(), 1,data & 2);
359359}
360360
361361READ8_HANDLER( seibu_soundlatch_r )
r17963r17964
382382
383383READ16_HANDLER( seibu_main_word_r )
384384{
385   //logerror("%06x: seibu_main_word_r(%x)\n",space->device().safe_pc(),offset);
385   //logerror("%06x: seibu_main_word_r(%x)\n",space.device().safe_pc(),offset);
386386   switch (offset)
387387   {
388388      case 2:
r17963r17964
391391      case 5:
392392         return main2sub_pending ? 1 : 0;
393393      default:
394         //logerror("%06x: seibu_main_word_r(%x)\n",space->device().safe_pc(),offset);
394         //logerror("%06x: seibu_main_word_r(%x)\n",space.device().safe_pc(),offset);
395395         return 0xffff;
396396   }
397397}
398398
399399WRITE16_HANDLER( seibu_main_word_w )
400400{
401   //printf("%06x: seibu_main_word_w(%x,%02x)\n",space->device().safe_pc(),offset,data);
401   //printf("%06x: seibu_main_word_w(%x,%02x)\n",space.device().safe_pc(),offset,data);
402402   if (ACCESSING_BITS_0_7)
403403   {
404404      switch (offset)
r17963r17964
408408            main2sub[offset] = data;
409409            break;
410410         case 4:
411            update_irq_lines(space->machine(), RST18_ASSERT);
411            update_irq_lines(space.machine(), RST18_ASSERT);
412412            break;
413413         case 2: //Sengoku Mahjong writes here
414414         case 6:
r17963r17964
417417            main2sub_pending = 1;
418418            break;
419419         default:
420            //logerror("%06x: seibu_main_word_w(%x,%02x)\n",space->device().safe_pc(),offset,data);
420            //logerror("%06x: seibu_main_word_w(%x,%02x)\n",space.device().safe_pc(),offset,data);
421421            break;
422422      }
423423   }
r17963r17964
440440
441441//  logerror("seibu_main_mustb_w: %x -> %x %x\n", data, main2sub[0], main2sub[1]);
442442
443   update_irq_lines(space->machine(), RST18_ASSERT);
443   update_irq_lines(space.machine(), RST18_ASSERT);
444444}
445445
446446/***************************************************************************/
trunk/src/mame/audio/dcs.c
r17963r17964
10811081static WRITE16_HANDLER( dcs_data_bank_select_w )
10821082{
10831083   dcs.sounddata_bank = data & 0x7ff;
1084   space->machine().root_device().membank("databank")->set_entry(dcs.sounddata_bank % dcs.sounddata_banks);
1084   space.machine().root_device().membank("databank")->set_entry(dcs.sounddata_bank % dcs.sounddata_banks);
10851085
10861086   /* bit 11 = sound board led */
10871087#if 0
1088   set_led_status(space->machine(), 2, data & 0x800);
1088   set_led_status(space.machine(), 2, data & 0x800);
10891089#endif
10901090}
10911091
r17963r17964
12531253      case 0:
12541254         sdrc.reg[0] = data;
12551255         if (diff & 0x1833)
1256            sdrc_remap_memory(space->machine());
1256            sdrc_remap_memory(space.machine());
12571257         if (diff & 0x0380)
1258            sdrc_update_bank_pointers(space->machine());
1258            sdrc_update_bank_pointers(space.machine());
12591259         break;
12601260
12611261      /* offset 1 controls RAM mapping */
r17963r17964
12631263         sdrc.reg[1] = data;
12641264         //dmadac_enable(&dcs.dmadac[0], dcs.channels, SDRC_MUTE);
12651265         if (diff & 0x0003)
1266            sdrc_remap_memory(space->machine());
1266            sdrc_remap_memory(space.machine());
12671267         break;
12681268
12691269      /* offset 2 controls paging */
12701270      case 2:
12711271         sdrc.reg[2] = data;
12721272         if (diff & 0x1fff)
1273            sdrc_update_bank_pointers(space->machine());
1273            sdrc_update_bank_pointers(space.machine());
12741274         break;
12751275
12761276      /* offset 3 controls security */
r17963r17964
13521352         dmadac_enable(&dcs.dmadac[0], dcs.channels, DSIO_MUTE);
13531353
13541354         /* bit 0 resets the FIFO */
1355         midway_ioasic_fifo_reset_w(space->machine(), DSIO_EMPTY_FIFO ^ 1);
1355         midway_ioasic_fifo_reset_w(space.machine(), DSIO_EMPTY_FIFO ^ 1);
13561356         break;
13571357
13581358      /* offset 2 controls RAM pages */
13591359      case 2:
13601360         dsio.reg[2] = data;
1361         space->machine().root_device().membank("databank")->set_entry(DSIO_DM_PG % dcs.sounddata_banks);
1361         space.machine().root_device().membank("databank")->set_entry(DSIO_DM_PG % dcs.sounddata_banks);
13621362         break;
13631363   }
13641364}
r17963r17964
14131413            {
14141414               char buffer[10];
14151415               sprintf(buffer, "dac%d", chan + 1);
1416               dcs.dmadac[chan] = space->machine().device<dmadac_sound_device>(buffer);
1416               dcs.dmadac[chan] = space.machine().device<dmadac_sound_device>(buffer);
14171417            }
14181418            dmadac_enable(&dcs.dmadac[0], dcs.channels, enable);
14191419            if (dcs.channels < 6)
14201420               dmadac_enable(&dcs.dmadac[dcs.channels], 6 - dcs.channels, FALSE);
1421            recompute_sample_rate(space->machine());
1421            recompute_sample_rate(space.machine());
14221422         }
14231423         break;
14241424
14251425      /* offset 2 controls RAM pages */
14261426      case 2:
14271427         dsio.reg[2] = data;
1428         space->machine().root_device().membank("databank")->set_entry(DENV_DM_PG % dcs.sounddata_bank);
1428         space.machine().root_device().membank("databank")->set_entry(DENV_DM_PG % dcs.sounddata_bank);
14291429         break;
14301430
14311431      /* offset 3 controls FIFO reset */
14321432      case 3:
1433         midway_ioasic_fifo_reset_w(space->machine(), 1);
1433         midway_ioasic_fifo_reset_w(space.machine(), 1);
14341434         break;
14351435   }
14361436}
r17963r17964
14471447{
14481448   dsio_state &dsio = dcs.dsio;
14491449   if (LOG_DCS_TRANSFERS)
1450      logerror("%08X:IDMA_addr = %04X\n", space->device().safe_pc(), data);
1450      logerror("%08X:IDMA_addr = %04X\n", space.device().safe_pc(), data);
14511451   downcast<adsp2181_device *>(dcs.cpu)->idma_addr_w(data);
14521452   if (data == 0)
14531453      dsio.start_on_next_write = 2;
r17963r17964
14571457WRITE32_HANDLER( dsio_idma_data_w )
14581458{
14591459   dsio_state &dsio = dcs.dsio;
1460   UINT32 pc = space->device().safe_pc();
1460   UINT32 pc = space.device().safe_pc();
14611461   if (ACCESSING_BITS_0_15)
14621462   {
14631463      if (LOG_DCS_TRANSFERS)
r17963r17964
14831483   UINT32 result;
14841484   result = downcast<adsp2181_device *>(dcs.cpu)->idma_data_r();
14851485   if (LOG_DCS_TRANSFERS)
1486      logerror("%08X:IDMA_data_r(%04X) = %04X\n", space->device().safe_pc(), downcast<adsp2181_device *>(dcs.cpu)->idma_addr_r(), result);
1486      logerror("%08X:IDMA_data_r(%04X) = %04X\n", space.device().safe_pc(), downcast<adsp2181_device *>(dcs.cpu)->idma_addr_r(), result);
14871487   return result;
14881488}
14891489
r17963r17964
16071607static WRITE16_HANDLER( input_latch_ack_w )
16081608{
16091609   if (!dcs.last_input_empty && dcs.input_empty_cb)
1610      (*dcs.input_empty_cb)(space->machine(), dcs.last_input_empty = 1);
1610      (*dcs.input_empty_cb)(space.machine(), dcs.last_input_empty = 1);
16111611   SET_INPUT_EMPTY();
16121612   dcs.cpu->set_input_line(ADSP2105_IRQ2, CLEAR_LINE);
16131613}
r17963r17964
16181618   if (dcs.auto_ack)
16191619      input_latch_ack_w(space,0,0,0xffff);
16201620   if (LOG_DCS_IO)
1621      logerror("%08X:input_latch_r(%04X)\n", space->device().safe_pc(), dcs.input_data);
1621      logerror("%08X:input_latch_r(%04X)\n", space.device().safe_pc(), dcs.input_data);
16221622   return dcs.input_data;
16231623}
16241624
r17963r17964
16401640static WRITE16_HANDLER( output_latch_w )
16411641{
16421642   if (LOG_DCS_IO)
1643      logerror("%08X:output_latch_w(%04X) (empty=%d)\n", space->device().safe_pc(), data, IS_OUTPUT_EMPTY());
1644   space->machine().scheduler().synchronize(FUNC(latch_delayed_w), data);
1643      logerror("%08X:output_latch_w(%04X) (empty=%d)\n", space.device().safe_pc(), data, IS_OUTPUT_EMPTY());
1644   space.machine().scheduler().synchronize(FUNC(latch_delayed_w), data);
16451645}
16461646
16471647
r17963r17964
16941694static WRITE16_HANDLER( output_control_w )
16951695{
16961696   if (LOG_DCS_IO)
1697      logerror("%04X:output_control = %04X\n", space->device().safe_pc(), data);
1698   space->machine().scheduler().synchronize(FUNC(output_control_delayed_w), data);
1697      logerror("%04X:output_control = %04X\n", space.device().safe_pc(), data);
1698   space.machine().scheduler().synchronize(FUNC(output_control_delayed_w), data);
16991699}
17001700
17011701
r17963r17964
18581858         break;
18591859
18601860      case TIMER_COUNT_REG:
1861         update_timer_count(space->machine());
1861         update_timer_count(space.machine());
18621862         result = dcs.control_regs[offset];
18631863         break;
18641864
r17963r17964
18801880         /* bit 9 forces a reset */
18811881         if (data & 0x0200)
18821882         {
1883            logerror("%04X:Rebooting DCS due to SYSCONTROL write\n", space->device().safe_pc());
1883            logerror("%04X:Rebooting DCS due to SYSCONTROL write\n", space.device().safe_pc());
18841884            dcs.cpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
1885            dcs_boot(space->machine());
1885            dcs_boot(space.machine());
18861886            dcs.control_regs[SYSCONTROL_REG] = 0;
18871887         }
18881888
r17963r17964
19141914         data = (data & 0xff) + 1;
19151915         if (data != dcs.timer_scale)
19161916         {
1917            update_timer_count(space->machine());
1917            update_timer_count(space.machine());
19181918            dcs.timer_scale = data;
1919            reset_timer(space->machine());
1919            reset_timer(space.machine());
19201920         }
19211921         break;
19221922
19231923      case TIMER_COUNT_REG:
19241924         dcs.timer_start_count = data;
1925         reset_timer(space->machine());
1925         reset_timer(space.machine());
19261926         break;
19271927
19281928      case TIMER_PERIOD_REG:
19291929         if (data != dcs.timer_period)
19301930         {
1931            update_timer_count(space->machine());
1931            update_timer_count(space.machine());
19321932            dcs.timer_period = data;
1933            reset_timer(space->machine());
1933            reset_timer(space.machine());
19341934         }
19351935         break;
19361936
r17963r17964
20762076static READ16_HANDLER( dcs_polling_r )
20772077{
20782078   if (dcs.polling_count++ > 5)
2079      space->device().execute().eat_cycles(10000);
2079      space.device().execute().eat_cycles(10000);
20802080   return *dcs.polling_base;
20812081}
20822082
r17963r17964
21372137      machine.scheduler().timer_set(attotime::from_usec(1), FUNC(s1_ack_callback2), param);
21382138      return;
21392139   }
2140   output_latch_w(dcs.cpu->space(AS_PROGRAM), 0, 0x000a, 0xffff);
2140   output_latch_w(*dcs.cpu->space(AS_PROGRAM), 0, 0x000a, 0xffff);
21412141}
21422142
21432143
r17963r17964
21492149      machine.scheduler().timer_set(attotime::from_usec(1), FUNC(s1_ack_callback1), param);
21502150      return;
21512151   }
2152   output_latch_w(dcs.cpu->space(AS_PROGRAM), 0, param, 0xffff);
2152   output_latch_w(*dcs.cpu->space(AS_PROGRAM), 0, param, 0xffff);
21532153
21542154   /* chain to the next word we need to write back */
21552155   machine.scheduler().timer_set(attotime::from_usec(1), FUNC(s1_ack_callback2));
r17963r17964
22812281
22822282static TIMER_CALLBACK( s2_ack_callback )
22832283{
2284   address_space *space = dcs.cpu->space(AS_PROGRAM);
2284   address_space &space = *dcs.cpu->space(AS_PROGRAM);
22852285
22862286   /* if the output is full, stall for a usec */
22872287   if (IS_OUTPUT_FULL())
trunk/src/mame/audio/8080bw.c
r17963r17964
897897
898898static void schaser_reinit_555_time_remain(_8080bw_state *state)
899899{
900   address_space *space = state->m_maincpu->space(AS_PROGRAM);
900   address_space &space = *state->m_maincpu->space(AS_PROGRAM);
901901   state->m_schaser_effect_555_time_remain = attotime::from_double(state->m_schaser_effect_555_time_remain_savable);
902   state->schaser_sh_port_2_w(*space, 0, state->m_port_2_last_extra);
902   state->schaser_sh_port_2_w(space, 0, state->m_port_2_last_extra);
903903}
904904
905905
r17963r17964
918918
919919MACHINE_RESET_MEMBER(_8080bw_state,schaser_sh)
920920{
921   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
921   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
922922
923923   m_schaser_effect_555_is_low = 0;
924924   m_schaser_effect_555_timer->adjust(attotime::never);
925   schaser_sh_port_1_w(*space, 0, 0);
926   schaser_sh_port_2_w(*space, 0, 0);
925   schaser_sh_port_1_w(space, 0, 0);
926   schaser_sh_port_2_w(space, 0, 0);
927927   m_schaser_effect_555_time_remain = attotime::zero;
928928   m_schaser_effect_555_time_remain_savable = m_schaser_effect_555_time_remain.as_double();
929929}
trunk/src/mame/audio/targ.c
r17963r17964
6161
6262WRITE8_HANDLER( targ_audio_1_w )
6363{
64   samples_device *samples = space->machine().device<samples_device>("samples");
64   samples_device *samples = space.machine().device<samples_device>("samples");
6565
6666   /* CPU music */
6767   if ((data & 0x01) != (port_1_last & 0x01))
68      space->machine().device<dac_device>("dac")->write_unsigned8((data & 0x01) * 0xff);
68      space.machine().device<dac_device>("dac")->write_unsigned8((data & 0x01) * 0xff);
6969
7070   /* shot */
7171   if (FALLING_EDGE(0x02) && !samples->playing(0))  samples->start(0,1);
r17963r17964
114114{
115115   if ((data & 0x01) && !(port_2_last & 0x01))
116116   {
117      samples_device *samples = space->machine().device<samples_device>("samples");
118      UINT8 *prom = space->machine().root_device().memregion("targ")->base();
117      samples_device *samples = space.machine().device<samples_device>("samples");
118      UINT8 *prom = space.machine().root_device().memregion("targ")->base();
119119
120120      tone_pointer = (tone_pointer + 1) & 0x0f;
121121
r17963r17964
128128
129129WRITE8_HANDLER( spectar_audio_2_w )
130130{
131   samples_device *samples = space->machine().device<samples_device>("samples");
131   samples_device *samples = space.machine().device<samples_device>("samples");
132132   adjust_sample(samples, data);
133133}
134134
trunk/src/mame/audio/invinco.c
r17963r17964
6565WRITE8_HANDLER( invinco_audio_w )
6666{
6767   static int port2State = 0;
68   samples_device *samples = space->machine().device<samples_device>("samples");
68   samples_device *samples = space.machine().device<samples_device>("samples");
6969   int bitsChanged;
7070   //int bitsGoneHigh;
7171   int bitsGoneLow;
r17963r17964
108108   }
109109
110110#if 0
111   logerror("Went LO: %02X  %04X\n", bitsGoneLow, space->device().safe_pc());
111   logerror("Went LO: %02X  %04X\n", bitsGoneLow, space.device().safe_pc());
112112#endif
113113}
trunk/src/mame/audio/pulsar.c
r17963r17964
8787
8888WRITE8_HANDLER( pulsar_audio_1_w )
8989{
90   samples_device *samples = space->machine().device<samples_device>("samples");
90   samples_device *samples = space.machine().device<samples_device>("samples");
9191   int bitsChanged;
9292   //int bitsGoneHigh;
9393   int bitsGoneLow;
r17963r17964
138138
139139WRITE8_HANDLER( pulsar_audio_2_w )
140140{
141   samples_device *samples = space->machine().device<samples_device>("samples");
141   samples_device *samples = space.machine().device<samples_device>("samples");
142142   static int port2State = 0;
143143   int bitsChanged;
144144   int bitsGoneHigh;
trunk/src/mame/audio/wow.c
r17963r17964
105105{
106106   UINT8 data = offset >> 8;
107107#if USE_FAKE_VOTRAX
108   astrocde_state *state = space->machine().driver_data<astrocde_state>();
109   samples_device *samples = space->machine().device<samples_device>("samples");
108   astrocde_state *state = space.machine().driver_data<astrocde_state>();
109   samples_device *samples = space.machine().device<samples_device>("samples");
110110   int Phoneme/*, Intonation*/;
111111   int i = 0;
112112   offset &= 0xff;
r17963r17964
166166      }
167167   }
168168#else
169   votrax_sc01_device *votrax = space->machine().device<votrax_sc01_device>("votrax");
170   votrax->inflection_w(*space, 0, data >> 6);
171   votrax->write(*space, 0, data);
169   votrax_sc01_device *votrax = space.machine().device<votrax_sc01_device>("votrax");
170   votrax->inflection_w(space, 0, data >> 6);
171   votrax->write(space, 0, data);
172172#endif
173173
174174   /* Note : We should really also use volume in this as well as frequency */
trunk/src/mame/audio/timeplt.c
r17963r17964
144144
145145WRITE8_HANDLER( timeplt_sh_irqtrigger_w )
146146{
147   device_t *audio = space->machine().device("timeplt_audio");
147   device_t *audio = space.machine().device("timeplt_audio");
148148   timeplt_audio_state *state = get_safe_token(audio);
149149
150150   if (state->m_last_irq_state == 0 && data)
trunk/src/mame/audio/amiga.c
r17963r17964
7676
7777static TIMER_CALLBACK( signal_irq )
7878{
79   amiga_custom_w(machine.device("maincpu")->memory().space(AS_PROGRAM), REG_INTREQ, 0x8000 | (0x80 << param), 0xffff);
79   amiga_custom_w(*machine.device("maincpu")->memory().space(AS_PROGRAM), REG_INTREQ, 0x8000 | (0x80 << param), 0xffff);
8080}
8181
8282
trunk/src/mame/audio/trackfld.c
r17963r17964
7171
7272READ8_HANDLER( trackfld_sh_timer_r )
7373{
74   UINT32 clock = space->machine().device<cpu_device>("audiocpu")->total_cycles() / TIMER_RATE;
74   UINT32 clock = space.machine().device<cpu_device>("audiocpu")->total_cycles() / TIMER_RATE;
7575
7676   return clock & 0xF;
7777}
r17963r17964
104104
105105READ8_HANDLER( hyperspt_sh_timer_r )
106106{
107   device_t *audio = space->machine().device("trackfld_audio");
107   device_t *audio = space.machine().device("trackfld_audio");
108108   trackfld_audio_state *state = get_safe_token(audio);
109109   UINT32 clock = state->m_audiocpu->total_cycles() / TIMER_RATE;
110110
r17963r17964
142142
143143WRITE8_HANDLER( konami_sh_irqtrigger_w )
144144{
145   device_t *audio = space->machine().device("trackfld_audio");
145   device_t *audio = space.machine().device("trackfld_audio");
146146   trackfld_audio_state *state = get_safe_token(audio);
147147   if (state->m_last_irq == 0 && data)
148148   {
trunk/src/mame/audio/namco54.c
r17963r17964
7777
7878static READ8_HANDLER( namco_54xx_K_r )
7979{
80   namco_54xx_state *state = get_safe_token(space->device().owner());
80   namco_54xx_state *state = get_safe_token(space.device().owner());
8181   return state->m_latched_cmd >> 4;
8282}
8383
8484static READ8_HANDLER( namco_54xx_R0_r )
8585{
86   namco_54xx_state *state = get_safe_token(space->device().owner());
86   namco_54xx_state *state = get_safe_token(space.device().owner());
8787   return state->m_latched_cmd & 0x0f;
8888}
8989
9090
9191static WRITE8_HANDLER( namco_54xx_O_w )
9292{
93   namco_54xx_state *state = get_safe_token(space->device().owner());
93   namco_54xx_state *state = get_safe_token(space.device().owner());
9494   UINT8 out = (data & 0x0f);
9595   if (data & 0x10)
96      discrete_sound_w(state->m_discrete, *space, NAMCO_54XX_1_DATA(state->m_basenode), out);
96      discrete_sound_w(state->m_discrete, space, NAMCO_54XX_1_DATA(state->m_basenode), out);
9797   else
98      discrete_sound_w(state->m_discrete, *space, NAMCO_54XX_0_DATA(state->m_basenode), out);
98      discrete_sound_w(state->m_discrete, space, NAMCO_54XX_0_DATA(state->m_basenode), out);
9999}
100100
101101static WRITE8_HANDLER( namco_54xx_R1_w )
102102{
103   namco_54xx_state *state = get_safe_token(space->device().owner());
103   namco_54xx_state *state = get_safe_token(space.device().owner());
104104   UINT8 out = (data & 0x0f);
105105
106   discrete_sound_w(state->m_discrete, *space, NAMCO_54XX_2_DATA(state->m_basenode), out);
106   discrete_sound_w(state->m_discrete, space, NAMCO_54XX_2_DATA(state->m_basenode), out);
107107}
108108
109109
trunk/src/mame/audio/snk6502.c
r17963r17964
676676
677677WRITE8_HANDLER( sasuke_sound_w )
678678{
679   device_t *device = space->machine().device("snk6502");
679   device_t *device = space.machine().device("snk6502");
680680   snk6502_sound_state *state = get_safe_token(device);
681681   samples_device *samples = state->m_samples;
682682   TONE *tone_channels = state->m_tone_channels;
r17963r17964
746746
747747WRITE8_HANDLER( satansat_sound_w )
748748{
749   device_t *device = space->machine().device("snk6502");
749   device_t *device = space.machine().device("snk6502");
750750   snk6502_sound_state *state = get_safe_token(device);
751751   samples_device *samples = state->m_samples;
752752   TONE *tone_channels = state->m_tone_channels;
r17963r17964
813813
814814WRITE8_HANDLER( vanguard_sound_w )
815815{
816   device_t *device = space->machine().device("snk6502");
816   device_t *device = space.machine().device("snk6502");
817817   snk6502_sound_state *state = get_safe_token(device);
818818   samples_device *samples = state->m_samples;
819819   TONE *tone_channels = state->m_tone_channels;
r17963r17964
863863      }
864864
865865      /* SHOT B */
866      sn76477_enable_w(space->machine().device("sn76477.2"), (data & 0x40) ? 0 : 1);
866      sn76477_enable_w(space.machine().device("sn76477.2"), (data & 0x40) ? 0 : 1);
867867
868868      state->m_LastPort1 = data;
869869      break;
r17963r17964
914914
915915WRITE8_HANDLER( fantasy_sound_w )
916916{
917   device_t *device = space->machine().device("snk6502");
917   device_t *device = space.machine().device("snk6502");
918918   snk6502_sound_state *state = get_safe_token(device);
919919   TONE *tone_channels = state->m_tone_channels;
920920
r17963r17964
957957      }
958958
959959      /* BOMB */
960      discrete_sound_w(space->machine().device("discrete"), *space, FANTASY_BOMB_EN, data & 0x80);
960      discrete_sound_w(space.machine().device("discrete"), space, FANTASY_BOMB_EN, data & 0x80);
961961
962962      state->m_LastPort1 = data;
963963      break;
r17963r17964
10211021      /* select tune in ROM based on sound command byte */
10221022      tone_channels[2].base = 0x1000 + ((data & 0x70) << 4);
10231023      tone_channels[2].mask = 0xff;
1024      snk6502_state *state = space->machine().driver_data<snk6502_state>();
1025      state->snk6502_flipscreen_w(*space, 0, data);
1024      snk6502_state *state = space.machine().driver_data<snk6502_state>();
1025      state->snk6502_flipscreen_w(space, 0, data);
10261026      break;
10271027   }
10281028}
r17963r17964
12201220      0x054ce
12211221   };
12221222
1223   snk6502_speech_w(space->machine(), data, vanguard_table, 2);
1223   snk6502_speech_w(space.machine(), data, vanguard_table, 2);
12241224}
12251225
12261226WRITE8_HANDLER( fantasy_speech_w )
r17963r17964
12451245      0
12461246   };
12471247
1248   snk6502_speech_w(space->machine(), data, fantasy_table, 0);
1248   snk6502_speech_w(space.machine(), data, fantasy_table, 0);
12491249}
12501250
12511251
trunk/src/mame/audio/cclimber.c
r17963r17964
7474   if (data == 0)
7575      return;
7676
77   cclimber_play_sample(space->machine(), 32 * sample_num,sample_freq,sample_volume);
77   cclimber_play_sample(space.machine(), 32 * sample_num,sample_freq,sample_volume);
7878}
7979
8080
trunk/src/mame/audio/t5182.c
r17963r17964
219219
220220WRITE8_HANDLER( t5182_sound_irq_w )
221221{
222   space->machine().scheduler().synchronize(FUNC(setirq_callback), CPU_ASSERT);
222   space.machine().scheduler().synchronize(FUNC(setirq_callback), CPU_ASSERT);
223223}
224224
225225static WRITE8_HANDLER( t5182_ym2151_irq_ack_w )
226226{
227   space->machine().scheduler().synchronize(FUNC(setirq_callback), YM2151_ACK);
227   space.machine().scheduler().synchronize(FUNC(setirq_callback), YM2151_ACK);
228228}
229229
230230static WRITE8_HANDLER( t5182_cpu_irq_ack_w )
231231{
232   space->machine().scheduler().synchronize(FUNC(setirq_callback), CPU_CLEAR);
232   space.machine().scheduler().synchronize(FUNC(setirq_callback), CPU_CLEAR);
233233}
234234
235235static void t5182_ym2151_irq_handler(device_t *device, int irq)
trunk/src/mame/audio/vicdual.c
r17963r17964
144144
145145WRITE8_HANDLER( frogs_audio_w )
146146{
147   samples_device *samples = space->machine().device<samples_device>("samples");
148   device_t *discrete = space->machine().device("discrete");
147   samples_device *samples = space.machine().device<samples_device>("samples");
148   device_t *discrete = space.machine().device("discrete");
149149   static int last_croak = 0;
150150   static int last_buzzz = 0;
151151   int new_croak = data & 0x08;
152152   int new_buzzz = data & 0x10;
153153
154//  discrete_sound_w(discrete, *space, FROGS_HOP_EN, data & 0x01);
155//  discrete_sound_w(discrete, *space, FROGS_JUMP_EN, data & 0x02);
156   discrete_sound_w(discrete, *space, FROGS_TONGUE_EN, data & 0x04);
157//  discrete_sound_w(discrete, *space, FROGS_CAPTURE_EN, data & 0x08);
158//  discrete_sound_w(discrete, *space, FROGS_FLY_EN, data & 0x10);
159//  discrete_sound_w(discrete, *space, FROGS_SPLASH_EN, data & 0x80);
154//  discrete_sound_w(discrete, space, FROGS_HOP_EN, data & 0x01);
155//  discrete_sound_w(discrete, space, FROGS_JUMP_EN, data & 0x02);
156   discrete_sound_w(discrete, space, FROGS_TONGUE_EN, data & 0x04);
157//  discrete_sound_w(discrete, space, FROGS_CAPTURE_EN, data & 0x08);
158//  discrete_sound_w(discrete, space, FROGS_FLY_EN, data & 0x10);
159//  discrete_sound_w(discrete, space, FROGS_SPLASH_EN, data & 0x80);
160160
161161   if (data & 0x01)
162162      samples->start(3, 3);   // Hop
r17963r17964
461461
462462WRITE8_HANDLER( headon_audio_w )
463463{
464   device_t *discrete = space->machine().device("discrete");
464   device_t *discrete = space.machine().device("discrete");
465465   if (discrete == NULL)
466466      return;
467   discrete_sound_w(discrete, *space, HEADON_HISPEED_PC_EN, data & 0x01);
468   discrete_sound_w(discrete, *space, HEADON_SCREECH1_EN, data & 0x02);
469   discrete_sound_w(discrete, *space, HEADON_CRASH_EN, data & 0x04);
470   discrete_sound_w(discrete, *space, HEADON_HISPEED_CC_EN, data & 0x08);
471   discrete_sound_w(discrete, *space, HEADON_SCREECH2_EN, data & 0x10);
472   discrete_sound_w(discrete, *space, HEADON_BONUS_EN, data & 0x20);
473   discrete_sound_w(discrete, *space, HEADON_CAR_ON_EN, data & 0x40);
467   discrete_sound_w(discrete, space, HEADON_HISPEED_PC_EN, data & 0x01);
468   discrete_sound_w(discrete, space, HEADON_SCREECH1_EN, data & 0x02);
469   discrete_sound_w(discrete, space, HEADON_CRASH_EN, data & 0x04);
470   discrete_sound_w(discrete, space, HEADON_HISPEED_CC_EN, data & 0x08);
471   discrete_sound_w(discrete, space, HEADON_SCREECH2_EN, data & 0x10);
472   discrete_sound_w(discrete, space, HEADON_BONUS_EN, data & 0x20);
473   discrete_sound_w(discrete, space, HEADON_CAR_ON_EN, data & 0x40);
474474
475475}
476476
477477WRITE8_HANDLER( invho2_audio_w )
478478{
479   device_t *discrete = space->machine().device("discrete");
479   device_t *discrete = space.machine().device("discrete");
480480   if (discrete == NULL)
481481      return;
482   discrete_sound_w(discrete, *space, HEADON_HISPEED_PC_EN, data & 0x10);
483   discrete_sound_w(discrete, *space, HEADON_SCREECH1_EN, data & 0x08);
484   discrete_sound_w(discrete, *space, HEADON_CRASH_EN, data & 0x80);
485   discrete_sound_w(discrete, *space, HEADON_HISPEED_CC_EN, data & 0x40);
486   discrete_sound_w(discrete, *space, HEADON_SCREECH2_EN, data & 0x04);
487   discrete_sound_w(discrete, *space, HEADON_BONUS_EN, data & 0x02);
488   discrete_sound_w(discrete, *space, HEADON_CAR_ON_EN, data & 0x20);
482   discrete_sound_w(discrete, space, HEADON_HISPEED_PC_EN, data & 0x10);
483   discrete_sound_w(discrete, space, HEADON_SCREECH1_EN, data & 0x08);
484   discrete_sound_w(discrete, space, HEADON_CRASH_EN, data & 0x80);
485   discrete_sound_w(discrete, space, HEADON_HISPEED_CC_EN, data & 0x40);
486   discrete_sound_w(discrete, space, HEADON_SCREECH2_EN, data & 0x04);
487   discrete_sound_w(discrete, space, HEADON_BONUS_EN, data & 0x02);
488   discrete_sound_w(discrete, space, HEADON_CAR_ON_EN, data & 0x20);
489489
490490}
491491
trunk/src/mame/audio/irem.c
r17963r17964
6363
6464WRITE8_HANDLER( irem_sound_cmd_w )
6565{
66   driver_device *drvstate = space->machine().driver_data<driver_device>();
66   driver_device *drvstate = space.machine().driver_data<driver_device>();
6767   if ((data & 0x80) == 0)
68      drvstate->soundlatch_byte_w(*space, 0, data & 0x7f);
68      drvstate->soundlatch_byte_w(space, 0, data & 0x7f);
6969   else
70      space->machine().device("iremsound")->execute().set_input_line(0, ASSERT_LINE);
70      space.machine().device("iremsound")->execute().set_input_line(0, ASSERT_LINE);
7171}
7272
7373
r17963r17964
181181
182182static WRITE8_HANDLER( sound_irq_ack_w )
183183{
184   space->machine().device("iremsound")->execute().set_input_line(0, CLEAR_LINE);
184   space.machine().device("iremsound")->execute().set_input_line(0, CLEAR_LINE);
185185}
186186
187187
trunk/src/mame/audio/snes_snd.c
r17963r17964
11251125      case 0x5:      /* Port 1 */
11261126      case 0x6:      /* Port 2 */
11271127      case 0x7:      /* Port 3 */
1128         // mame_printf_debug("SPC: rd %02x @ %d, PC=%x\n", spc700->port_in[offset - 4], offset - 4, space->device().safe_pc());
1128         // mame_printf_debug("SPC: rd %02x @ %d, PC=%x\n", spc700->port_in[offset - 4], offset - 4, space.device().safe_pc());
11291129         return spc700->port_in[offset - 4];
11301130      case 0x8: //normal RAM, can be read even if the ram disabled flag ($f0 bit 1) is active
11311131      case 0x9:
r17963r17964
11941194      case 0x5:      /* Port 1 */
11951195      case 0x6:      /* Port 2 */
11961196      case 0x7:      /* Port 3 */
1197         // mame_printf_debug("SPC: %02x to APU @ %d (PC=%x)\n", data, offset & 3, space->device().safe_pc());
1197         // mame_printf_debug("SPC: %02x to APU @ %d (PC=%x)\n", data, offset & 3, space.device().safe_pc());
11981198         spc700->port_out[offset - 4] = data;
11991199         device->machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(20));
12001200         break;
trunk/src/mame/audio/mario.c
r17963r17964
437437static SOUND_RESET( mario )
438438{
439439   mario_state   *state = machine.driver_data<mario_state>();
440   address_space *space = machine.device("audiocpu")->memory().space(AS_PROGRAM);
440   address_space &space = *machine.device("audiocpu")->memory().space(AS_PROGRAM);
441441
442442#if USE_8039
443443    set_ea(machine, 1);
444444#endif
445445
446446    /* FIXME: convert to latch8 */
447   state->soundlatch_clear_byte_w(*space, 0, 0);
448   state->soundlatch2_clear_byte_w(*space, 0, 0);
449   state->soundlatch3_clear_byte_w(*space, 0, 0);
450   state->soundlatch4_clear_byte_w(*space, 0, 0);
451   state->I8035_P1_W(*space, 0x00); /* Input port */
452   I8035_P2_W(*space, 0xff); /* Port is in high impedance state after reset */
447   state->soundlatch_clear_byte_w(space, 0, 0);
448   state->soundlatch2_clear_byte_w(space, 0, 0);
449   state->soundlatch3_clear_byte_w(space, 0, 0);
450   state->soundlatch4_clear_byte_w(space, 0, 0);
451   state->I8035_P1_W(space, 0x00); /* Input port */
452   I8035_P2_W(space, 0xff); /* Port is in high impedance state after reset */
453453
454454   state->m_last = 0;
455455}
trunk/src/mame/machine/scudsp.c
r17963r17964
275275   }
276276}
277277
278static UINT32 dsp_compute_condition( address_space *space, UINT32 condition )
278static UINT32 dsp_compute_condition( address_space &space, UINT32 condition )
279279{
280   saturn_state *state = space->machine().driver_data<saturn_state>();
280   saturn_state *state = space.machine().driver_data<saturn_state>();
281281   UINT32 result = 0;
282282
283283   switch( condition & 0xf )
r17963r17964
333333   return 0;
334334}
335335
336UINT32 dsp_prg_ctrl_r(address_space *space)
336UINT32 dsp_prg_ctrl_r(address_space &space)
337337{
338   saturn_state *state = space->machine().driver_data<saturn_state>();
338   saturn_state *state = space.machine().driver_data<saturn_state>();
339339
340340   return (state->m_scu_regs[0x80/4] & 0x06ff8000) | (dsp_reg.pc & 0xff);
341341}
342342
343void dsp_prg_ctrl_w(address_space *space, UINT32 data)
343void dsp_prg_ctrl_w(address_space &space, UINT32 data)
344344{
345   saturn_state *state = space->machine().driver_data<saturn_state>();
345   saturn_state *state = space.machine().driver_data<saturn_state>();
346346
347347   if(LEF) dsp_reg.pc = (data & 0xff);
348348   if(EXF) dsp_execute_program(space);
r17963r17964
394394   return data;
395395}
396396
397static void dsp_operation(address_space *space)
397static void dsp_operation(address_space &space)
398398{
399   saturn_state *state = space->machine().driver_data<saturn_state>();
399   saturn_state *state = space.machine().driver_data<saturn_state>();
400400   INT64 i1,i2;
401401   INT32 i3;
402402   int update_ct[4] = {0,0,0,0};
r17963r17964
597597
598598}
599599
600static void dsp_move_immediate( address_space *space )
600static void dsp_move_immediate( address_space &space )
601601{
602602   UINT32 value;
603603
r17963r17964
619619}
620620
621621
622static void dsp_dma( address_space *space )
622static void dsp_dma( address_space &space )
623623{
624   saturn_state *state = space->machine().driver_data<saturn_state>();
624   saturn_state *state = space.machine().driver_data<saturn_state>();
625625
626626   UINT8 hold = (opcode &  0x4000) >> 14;
627627   UINT32 add = (opcode & 0x38000) >> 15;
r17963r17964
681681
682682         if ( source >= 0x06000000 && source <= 0x060fffff )
683683         {
684            data = space->read_dword(source );
684            data = space.read_dword(source );
685685         }
686686         else
687687         {
688            data = (space->read_word(source)<<16) | space->read_word(source+2);
688            data = (space.read_word(source)<<16) | space.read_word(source+2);
689689            //popmessage( "Bad DSP DMA mem read = %08X", source );
690690#if DEBUG_DSP
691691            //fprintf( log_file, "/*Bad DSP DMA mem read = %08X*/\n", source );
r17963r17964
718718#endif
719719      for ( counter = 0; counter < transfer_cnt; counter++ )
720720      {
721         space->write_dword(dest, dsp_get_mem_source_dma( dsp_mem, counter ) );
721         space.write_dword(dest, dsp_get_mem_source_dma( dsp_mem, counter ) );
722722         dest += add;
723723      }
724724
r17963r17964
732732   T0F_0;
733733}
734734
735static void dsp_jump( address_space *space )
735static void dsp_jump( address_space &space )
736736{
737737   if ( opcode & 0x3f80000 )
738738   {
r17963r17964
761761   EF_1;
762762}
763763
764static void dsp_end( address_space *dmaspace )
764static void dsp_end( address_space &dmaspace )
765765{
766   saturn_state *state = dmaspace->machine().driver_data<saturn_state>();
766   saturn_state *state = dmaspace.machine().driver_data<saturn_state>();
767767
768768   if(opcode & 0x08000000)
769769   {
770770      /*ENDI*/
771      dmaspace->machine().scheduler().timer_set(attotime::from_usec(300), FUNC(dsp_ended));
771      dmaspace.machine().scheduler().timer_set(attotime::from_usec(300), FUNC(dsp_ended));
772772   }
773773
774774   EXF_0; /* END / ENDI */
r17963r17964
827827}
828828#endif
829829
830void dsp_execute_program(address_space *dmaspace)
830void dsp_execute_program(address_space &dmaspace)
831831{
832832   UINT32 cycles_run = 0;
833833   UINT8 cont = 1;
trunk/src/mame/machine/xevious.c
r17963r17964
6363
6464READ8_HANDLER( battles_customio0_r )
6565{
66   logerror("CPU0 %04x: custom I/O Read = %02x\n",space->device().safe_pc(),battles_customio_command);
66   logerror("CPU0 %04x: custom I/O Read = %02x\n",space.device().safe_pc(),battles_customio_command);
6767   return battles_customio_command;
6868}
6969
r17963r17964
7171{
7272   int   return_data;
7373
74   if( space->device().safe_pc() == 0xAE ){
74   if( space.device().safe_pc() == 0xAE ){
7575      /* CPU4 0xAA - 0xB9 : waiting for MB8851 ? */
7676      return_data =   ( (battles_customio_command & 0x10) << 3)
7777                  | 0x00
r17963r17964
8181                  | 0x60
8282                  | (battles_customio_prev_command & 0x0f);
8383   }
84   logerror("CPU3 %04x: custom I/O Read = %02x\n",space->device().safe_pc(),return_data);
84   logerror("CPU3 %04x: custom I/O Read = %02x\n",space.device().safe_pc(),return_data);
8585
8686   return return_data;
8787}
r17963r17964
8989
9090WRITE8_HANDLER( battles_customio0_w )
9191{
92   timer_device *timer = space->machine().device<timer_device>("battles_nmi");
92   timer_device *timer = space.machine().device<timer_device>("battles_nmi");
9393
94   logerror("CPU0 %04x: custom I/O Write = %02x\n",space->device().safe_pc(),data);
94   logerror("CPU0 %04x: custom I/O Write = %02x\n",space.device().safe_pc(),data);
9595
9696   battles_customio_command = data;
9797   battles_customio_command_count = 0;
r17963r17964
108108
109109WRITE8_HANDLER( battles_customio3_w )
110110{
111   logerror("CPU3 %04x: custom I/O Write = %02x\n",space->device().safe_pc(),data);
111   logerror("CPU3 %04x: custom I/O Write = %02x\n",space.device().safe_pc(),data);
112112
113113   battles_customio_command = data;
114114}
r17963r17964
117117
118118READ8_HANDLER( battles_customio_data0_r )
119119{
120   logerror("CPU0 %04x: custom I/O parameter %02x Read = %02x\n",space->device().safe_pc(),offset,battles_customio_data);
120   logerror("CPU0 %04x: custom I/O parameter %02x Read = %02x\n",space.device().safe_pc(),offset,battles_customio_data);
121121
122122   return battles_customio_data;
123123}
124124
125125READ8_HANDLER( battles_customio_data3_r )
126126{
127   logerror("CPU3 %04x: custom I/O parameter %02x Read = %02x\n",space->device().safe_pc(),offset,battles_customio_data);
127   logerror("CPU3 %04x: custom I/O parameter %02x Read = %02x\n",space.device().safe_pc(),offset,battles_customio_data);
128128   return battles_customio_data;
129129}
130130
131131
132132WRITE8_HANDLER( battles_customio_data0_w )
133133{
134   logerror("CPU0 %04x: custom I/O parameter %02x Write = %02x\n",space->device().safe_pc(),offset,data);
134   logerror("CPU0 %04x: custom I/O parameter %02x Write = %02x\n",space.device().safe_pc(),offset,data);
135135   battles_customio_data = data;
136136}
137137
138138WRITE8_HANDLER( battles_customio_data3_w )
139139{
140   logerror("CPU3 %04x: custom I/O parameter %02x Write = %02x\n",space->device().safe_pc(),offset,data);
140   logerror("CPU3 %04x: custom I/O parameter %02x Write = %02x\n",space.device().safe_pc(),offset,data);
141141   battles_customio_data = data;
142142}
143143
144144
145145WRITE8_HANDLER( battles_CPU4_coin_w )
146146{
147   set_led_status(space->machine(), 0,data & 0x02);   // Start 1
148   set_led_status(space->machine(), 1,data & 0x01);   // Start 2
147   set_led_status(space.machine(), 0,data & 0x02);   // Start 1
148   set_led_status(space.machine(), 1,data & 0x01);   // Start 2
149149
150   coin_counter_w(space->machine(), 0,data & 0x20);
151   coin_counter_w(space->machine(), 1,data & 0x10);
152   coin_lockout_global_w(space->machine(), ~data & 0x04);
150   coin_counter_w(space.machine(), 0,data & 0x20);
151   coin_counter_w(space.machine(), 1,data & 0x10);
152   coin_lockout_global_w(space.machine(), ~data & 0x04);
153153}
154154
155155
156156WRITE8_HANDLER( battles_noise_sound_w )
157157{
158   logerror("CPU3 %04x: 50%02x Write = %02x\n",space->device().safe_pc(),offset,data);
158   logerror("CPU3 %04x: 50%02x Write = %02x\n",space.device().safe_pc(),offset,data);
159159   if( (battles_sound_played == 0) && (data == 0xFF) ){
160      samples_device *samples = space->machine().device<samples_device>("samples");
160      samples_device *samples = space.machine().device<samples_device>("samples");
161161      if( customio[0] == 0x40 ){
162162         samples->start(0, 0);
163163      }
r17963r17964
174174   switch ( offset )
175175   {
176176      default:
177      case 0: return ~BITSWAP8(space->machine().root_device().ioport("IN0H")->read(),7,6,5,4,2,3,1,0);
178      case 1: return ~space->machine().root_device().ioport("IN1L")->read();
179      case 2: return ~space->machine().root_device().ioport("IN1H")->read();
180      case 3: return ~space->machine().root_device().ioport("IN0L")->read();
177      case 0: return ~BITSWAP8(space.machine().root_device().ioport("IN0H")->read(),7,6,5,4,2,3,1,0);
178      case 1: return ~space.machine().root_device().ioport("IN1L")->read();
179      case 2: return ~space.machine().root_device().ioport("IN1H")->read();
180      case 3: return ~space.machine().root_device().ioport("IN0L")->read();
181181   }
182182}
183183
trunk/src/mame/machine/segacrp2.c
r17963r17964
6060   };
6161
6262
63   address_space *space = machine.device(cputag)->memory().space(AS_PROGRAM);
63   address_space &space = *machine.device(cputag)->memory().space(AS_PROGRAM);
6464   UINT8 *rom = machine.root_device().memregion(cputag)->base();
6565   UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x8000);
6666
67   space->set_decrypted_region(0x0000, 0x7fff, decrypted);
67   space.set_decrypted_region(0x0000, 0x7fff, decrypted);
6868
6969
7070   for (A = 0x0000;A < 0x8000;A++)
trunk/src/mame/machine/scudsp.h
r17963r17964
11/*SCU DSP stuff*/
22
3void dsp_prg_ctrl_w(address_space *space, UINT32 data);
3void dsp_prg_ctrl_w(address_space &space, UINT32 data);
44void dsp_prg_data(UINT32 data);
55void dsp_ram_addr_ctrl(UINT32 data);
66void dsp_ram_addr_w(UINT32 data);
7UINT32 dsp_prg_ctrl_r(address_space *space);
7UINT32 dsp_prg_ctrl_r(address_space &space);
88UINT32 dsp_ram_addr_r(void);
9void dsp_execute_program(address_space *dmaspace);
9void dsp_execute_program(address_space &dmaspace);
1010
trunk/src/mame/machine/taitoio.c
r17963r17964
112112         return tc0220ioc->read_7(0);
113113
114114      default:
115//logerror("PC %06x: warning - read TC0220IOC address %02x\n",space->device().safe_pc(),offset);
115//logerror("PC %06x: warning - read TC0220IOC address %02x\n",space.device().safe_pc(),offset);
116116         return 0xff;
117117   }
118118}
r17963r17964
137137         coin_counter_w(device->machine(), 1, data & 0x08);
138138
139139//if (data & 0xf0)
140//logerror("PC %06x: warning - write %02x to TC0220IOC address %02x\n",space->device().safe_pc(),data,offset);
140//logerror("PC %06x: warning - write %02x to TC0220IOC address %02x\n",space.device().safe_pc(),data,offset);
141141
142142         break;
143143
144144      default:
145//logerror("PC %06x: warning - write %02x to TC0220IOC address %02x\n",space->device().safe_pc(),data,offset);
145//logerror("PC %06x: warning - write %02x to TC0220IOC address %02x\n",space.device().safe_pc(),data,offset);
146146         break;
147147   }
148148}
r17963r17964
268268         return tc0510nio->read_7(0);
269269
270270      default:
271//logerror("PC %06x: warning - read TC0510NIO address %02x\n",space->device().safe_pc(),offset);
271//logerror("PC %06x: warning - read TC0510NIO address %02x\n",space.device().safe_pc(),offset);
272272         return 0xff;
273273   }
274274}
r17963r17964
293293         break;
294294
295295      default:
296//logerror("PC %06x: warning - write %02x to TC0510NIO address %02x\n",space->device().safe_pc(),data,offset);
296//logerror("PC %06x: warning - write %02x to TC0510NIO address %02x\n",space.device().safe_pc(),data,offset);
297297         break;
298298   }
299299}
r17963r17964
310310   else
311311   {
312312      /* driftout writes the coin counters here - bug? */
313//logerror("CPU #0 PC %06x: warning - write to MSB of TC0510NIO address %02x\n",space->device().safe_pc(),offset);
313//logerror("CPU #0 PC %06x: warning - write to MSB of TC0510NIO address %02x\n",space.device().safe_pc(),offset);
314314      tc0510nio_w(device, space, offset, (data >> 8) & 0xff);
315315   }
316316}
r17963r17964
418418         return tc0640fio->read_7(0);
419419
420420      default:
421//logerror("PC %06x: warning - read TC0640FIO address %02x\n",space->device().safe_pc(),offset);
421//logerror("PC %06x: warning - read TC0640FIO address %02x\n",space.device().safe_pc(),offset);
422422         return 0xff;
423423   }
424424}
r17963r17964
443443         break;
444444
445445      default:
446//logerror("PC %06x: warning - write %02x to TC0640FIO address %02x\n",space->device().safe_pc(),data,offset);
446//logerror("PC %06x: warning - write %02x to TC0640FIO address %02x\n",space.device().safe_pc(),data,offset);
447447         break;
448448   }
449449}
r17963r17964
460460   else
461461   {
462462      tc0640fio_w(device, space, offset, (data >> 8) & 0xff);
463//logerror("CPU #0 PC %06x: warning - write to MSB of TC0640FIO address %02x\n",space->device().safe_pc(),offset);
463//logerror("CPU #0 PC %06x: warning - write to MSB of TC0640FIO address %02x\n",space.device().safe_pc(),offset);
464464   }
465465}
466466
r17963r17964
476476   else
477477   {
478478      tc0640fio_w(device, space, offset, data & 0xff);
479//logerror("CPU #0 PC %06x: warning - write to LSB of TC0640FIO address %02x\n",space->device().safe_pc(),offset);
479//logerror("CPU #0 PC %06x: warning - write to LSB of TC0640FIO address %02x\n",space.device().safe_pc(),offset);
480480   }
481481}
482482
trunk/src/mame/machine/nmk004.c
r17963r17964
10671067{
10681068   if (ACCESSING_BITS_0_7)
10691069   {
1070//logerror("%06x: NMK004_w %02x\n",space->device().safe_pc(),data);
1070//logerror("%06x: NMK004_w %02x\n",space.device().safe_pc(),data);
10711071      NMK004_state.from_main = data & 0xff;
10721072   }
10731073}
r17963r17964
10771077//static int last;
10781078   int res = NMK004_state.to_main;
10791079
1080//if (res != last) logerror("%06x: NMK004_r %02x\n",space->device().safe_pc(),res);
1080//if (res != last) logerror("%06x: NMK004_r %02x\n",space.device().safe_pc(),res);
10811081//last = res;
10821082
10831083   return res;
trunk/src/mame/machine/snes7110.c
r17963r17964
769769}
770770
771771static void spc7110_mmio_write(running_machine &machine, UINT32 addr, UINT8 data);
772static UINT8 spc7110_mmio_read(address_space *space, UINT32 addr);
772static UINT8 spc7110_mmio_read(address_space &space, UINT32 addr);
773773static void spc7110_update_time(running_machine &machine, UINT8 offset);
774774
775775enum RTC_State
r17963r17964
10681068   }
10691069}
10701070
1071static UINT8 spc7110_mmio_read(address_space *space, UINT32 addr)
1071static UINT8 spc7110_mmio_read(address_space &space, UINT32 addr)
10721072{
1073   running_machine &machine = space->machine();
1073   running_machine &machine = space.machine();
10741074   UINT8 *ROM = machine.root_device().memregion("cart")->base();
10751075
10761076   addr &= 0xffff;
r17963r17964
16411641   }
16421642}
16431643
1644static UINT8 spc7110_bank7_read(address_space *space, UINT32 offset)
1644static UINT8 spc7110_bank7_read(address_space &space, UINT32 offset)
16451645{
1646   UINT8 *ROM = space->machine().root_device().memregion("cart")->base();
1646   UINT8 *ROM = space.machine().root_device().memregion("cart")->base();
16471647   UINT32 addr = offset & 0x0fffff;
16481648
16491649   switch (offset & 0xf00000)
trunk/src/mame/machine/stvprot.c
r17963r17964
114114
115115static READ32_HANDLER( twcup98_prot_r )
116116{
117   UINT32 *ROM = (UINT32 *)space->machine().root_device().memregion("abus")->base();
117   UINT32 *ROM = (UINT32 *)space.machine().root_device().memregion("abus")->base();
118118
119119   if(a_bus[0] & 0x00010000)//protection calculation is activated
120120   {
121121      if(offset == 3)
122122      {
123         logerror("A-Bus control protection read at %06x with data = %08x\n",space->device().safe_pc(),a_bus[3]);
123         logerror("A-Bus control protection read at %06x with data = %08x\n",space.device().safe_pc(),a_bus[3]);
124124         #ifdef MAME_DEBUG
125         popmessage("Prot read at %06x with data = %08x",space->device().safe_pc(),a_bus[3]);
125         popmessage("Prot read at %06x with data = %08x",space.device().safe_pc(),a_bus[3]);
126126         #endif
127127         switch(a_bus[3])
128128         {
r17963r17964
141141static WRITE32_HANDLER ( twcup98_prot_w )
142142{
143143   COMBINE_DATA(&a_bus[offset]);
144   logerror("A-Bus control protection write at %06x: [%02x] <- %08x\n",space->device().safe_pc(),offset,data);
144   logerror("A-Bus control protection write at %06x: [%02x] <- %08x\n",space.device().safe_pc(),offset,data);
145145   if(offset == 3)
146146   {
147147      logerror("MAIN : %08x  DATA : %08x\n",a_bus[3],a_bus[2]);
r17963r17964
173173
174174static READ32_HANDLER( sss_prot_r )
175175{
176   UINT32 *ROM = (UINT32 *)space->machine().root_device().memregion("abus")->base();
176   UINT32 *ROM = (UINT32 *)space.machine().root_device().memregion("abus")->base();
177177
178178   if(a_bus[0] & 0x00010000)//protection calculation is activated
179179   {
180180      if(offset == 3)
181181      {
182         logerror("A-Bus control protection read at %06x with data = %08x\n",space->device().safe_pc(),a_bus[3]);
182         logerror("A-Bus control protection read at %06x with data = %08x\n",space.device().safe_pc(),a_bus[3]);
183183         #ifdef MAME_DEBUG
184         popmessage("Prot read at %06x with data = %08x",space->device().safe_pc(),a_bus[3]);
184         popmessage("Prot read at %06x with data = %08x",space.device().safe_pc(),a_bus[3]);
185185         #endif
186186         switch(a_bus[3])
187187         {
r17963r17964
208208static WRITE32_HANDLER ( sss_prot_w )
209209{
210210   COMBINE_DATA(&a_bus[offset]);
211   logerror("A-Bus control protection write at %06x: [%02x] <- %08x\n",space->device().safe_pc(),offset,data);
211   logerror("A-Bus control protection write at %06x: [%02x] <- %08x\n",space.device().safe_pc(),offset,data);
212212   if(offset == 3)
213213   {
214214      //logerror("MAIN : %08x  DATA : %08x\n",a_bus[3],a_bus[2]);
r17963r17964
238238
239239static READ32_HANDLER( rsgun_prot_r )
240240{
241   UINT32 *ROM = (UINT32 *)space->machine().root_device().memregion("abus")->base();
241   UINT32 *ROM = (UINT32 *)space.machine().root_device().memregion("abus")->base();
242242
243243   if(a_bus[0] & 0x00010000)//protection calculation is activated
244244   {
245245      if(offset == 3)
246246      {
247         logerror("A-Bus control protection read at %06x with data = %08x\n",space->device().safe_pc(),a_bus[3]);
247         logerror("A-Bus control protection read at %06x with data = %08x\n",space.device().safe_pc(),a_bus[3]);
248248         #ifdef MAME_DEBUG
249         popmessage("Prot read at %06x with data = %08x",space->device().safe_pc(),a_bus[3]);
249         popmessage("Prot read at %06x with data = %08x",space.device().safe_pc(),a_bus[3]);
250250         #endif
251251         switch(a_bus[3])
252252         {
r17963r17964
278278static WRITE32_HANDLER ( rsgun_prot_w )
279279{
280280   COMBINE_DATA(&a_bus[offset]);
281   logerror("A-Bus control protection write at %06x: [%02x] <- %08x\n",space->device().safe_pc(),offset,data);
281   logerror("A-Bus control protection write at %06x: [%02x] <- %08x\n",space.device().safe_pc(),offset,data);
282282   if(offset == 3)
283283   {
284284      //logerror("MAIN : %08x  DATA : %08x\n",a_bus[3],a_bus[2]);
r17963r17964
313313
314314static READ32_HANDLER( elandore_prot_r )
315315{
316   UINT32 *ROM = (UINT32 *)space->machine().root_device().memregion("abus")->base();
316   UINT32 *ROM = (UINT32 *)space.machine().root_device().memregion("abus")->base();
317317
318318   if(a_bus[0] & 0x00010000)//protection calculation is activated
319319   {
320320      if(offset == 3)
321321      {
322         logerror("A-Bus control protection read at %06x with data = %08x\n",space->device().safe_pc(),a_bus[3]);
322         logerror("A-Bus control protection read at %06x with data = %08x\n",space.device().safe_pc(),a_bus[3]);
323323         #ifdef MAME_DEBUG
324         popmessage("Prot read at %06x with data = %08x",space->device().safe_pc(),a_bus[3]);
324         popmessage("Prot read at %06x with data = %08x",space.device().safe_pc(),a_bus[3]);
325325         #endif
326326         switch(a_bus[3])
327327         {
r17963r17964
349349static WRITE32_HANDLER ( elandore_prot_w )
350350{
351351   COMBINE_DATA(&a_bus[offset]);
352   logerror("A-Bus control protection write at %06x: [%02x] <- %08x\n",space->device().safe_pc(),offset,data);
352   logerror("A-Bus control protection write at %06x: [%02x] <- %08x\n",space.device().safe_pc(),offset,data);
353353   if(offset == 3)
354354   {
355355      /* a bus value 2 seed is used too here. */
r17963r17964
420420
421421static READ32_HANDLER( ffreveng_prot_r )
422422{
423   UINT32 *ROM = (UINT32 *)space->machine().root_device().memregion("abus")->base();
423   UINT32 *ROM = (UINT32 *)space.machine().root_device().memregion("abus")->base();
424424
425425   if(a_bus[0] & 0x00010000)//protection calculation is activated
426426   {
427427      if(offset == 3)
428428      {
429         logerror("A-Bus control protection read at %06x with data = %08x\n",space->device().safe_pc(),a_bus[3]);
429         logerror("A-Bus control protection read at %06x with data = %08x\n",space.device().safe_pc(),a_bus[3]);
430430         #ifdef MAME_DEBUG
431         popmessage("Prot read at %06x with data = %08x",space->device().safe_pc(),a_bus[3]);
431         popmessage("Prot read at %06x with data = %08x",space.device().safe_pc(),a_bus[3]);
432432         #endif
433433         switch(a_bus[3])
434434         {
r17963r17964
455455static WRITE32_HANDLER ( ffreveng_prot_w )
456456{
457457   COMBINE_DATA(&a_bus[offset]);
458   logerror("A-Bus control protection write at %06x: [%02x] <- %08x\n",space->device().safe_pc(),offset,data);
458   logerror("A-Bus control protection write at %06x: [%02x] <- %08x\n",space.device().safe_pc(),offset,data);
459459   if(offset == 3)
460460   {
461461      //logerror("MAIN : %08x  DATA : %08x\n",a_bus[3],a_bus[2]);
r17963r17964
485485   if ( offset == 3 && ctrl_index != -1 )
486486   {
487487      UINT32 data = 0;
488      UINT32 *prot_data = (UINT32 *)space->machine().root_device().memregion("user2")->base();
488      UINT32 *prot_data = (UINT32 *)space.machine().root_device().memregion("user2")->base();
489489
490490      data = prot_data[ctrl_index++];
491491
492      if ( ctrl_index >= space->machine().root_device().memregion("user2")->bytes()/4 )
492      if ( ctrl_index >= space.machine().root_device().memregion("user2")->bytes()/4 )
493493      {
494494         ctrl_index = -1;
495495      }
r17963r17964
533533{
534534   // the offsets written to the protection device definitely only refer to 2 of the roms
535535   //  it's a fair assumption to say that only those 2 are connected to the protection device
536   UINT8 *ROM = (UINT8 *)space->machine().root_device().memregion("abus")->base()+0x1000000;
536   UINT8 *ROM = (UINT8 *)space.machine().root_device().memregion("abus")->base()+0x1000000;
537537
538538   if (offset==2)
539539   {
r17963r17964
554554   }
555555   else
556556   {
557      logerror("%06x Decathlete prot R offset %04x mask %08x regs %08x, %08x, %08x, %08x\n",space->device().safe_pc(), offset, mem_mask, decathlt_protregs[0], decathlt_protregs[1], decathlt_protregs[2], decathlt_protregs[3]);
557      logerror("%06x Decathlete prot R offset %04x mask %08x regs %08x, %08x, %08x, %08x\n",space.device().safe_pc(), offset, mem_mask, decathlt_protregs[0], decathlt_protregs[1], decathlt_protregs[2], decathlt_protregs[3]);
558558   }
559559
560560   return decathlt_protregs[offset];
trunk/src/mame/machine/asic65.c
r17963r17964
138138
139139void asic65_reset(running_machine &machine, int state)
140140{
141   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
141   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
142142
143143   /* rom-based means reset and clear states */
144144   if (asic65.cpu != NULL)
r17963r17964
191191   /* rom-based use a deferred write mechanism */
192192   if (asic65.type == ASIC65_ROMBASED)
193193   {
194      space->machine().scheduler().synchronize(FUNC(m68k_asic65_deferred_w), data | (offset << 16));
195      space->machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(20));
194      space.machine().scheduler().synchronize(FUNC(m68k_asic65_deferred_w), data | (offset << 16));
195      space.machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(20));
196196      return;
197197   }
198198
r17963r17964
211211   else
212212   {
213213      int command = (data < MAX_COMMANDS) ? command_map[asic65.type][data] : OP_UNKNOWN;
214      if (asic65.log) fprintf(asic65.log, "\n(%06X)%c%04X:", space->device().safe_pcbase(), (command == OP_UNKNOWN) ? '*' : ' ', data);
214      if (asic65.log) fprintf(asic65.log, "\n(%06X)%c%04X:", space.device().safe_pcbase(), (command == OP_UNKNOWN) ? '*' : ' ', data);
215215
216216      /* set the command number and reset the parameter/result indices */
217217      asic65.command = data;
r17963r17964
230230   if (asic65.type == ASIC65_ROMBASED)
231231   {
232232      asic65._68full = 0;
233      space->machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(5));
233      space.machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(5));
234234      return asic65._68data;
235235   }
236236
r17963r17964
448448      /* bit 14 = 68FULL */
449449      /* bit 13 = XFLG */
450450      /* bit 12 = controlled by jumper */
451      space->machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(5));
451      space.machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(5));
452452      return (asic65.tfull << 15) | (asic65._68full << 14) | (asic65.xflg << 13) | 0x0000;
453453   }
454454   else
r17963r17964
501501static READ16_HANDLER( asci65_get_bio )
502502{
503503   if (!asic65.tfull)
504      space->device().execute().spin_until_interrupt();
504      space.device().execute().spin_until_interrupt();
505505   return asic65.tfull ? CLEAR_LINE : ASSERT_LINE;
506506}
507507
trunk/src/mame/machine/naomi.c
r17963r17964
2727
2828static READ64_HANDLER( naomi_biose_idle_skip_r )
2929{
30   if (space->device().safe_pc()==0xc04173c)
31      space->device().execute().spin_until_time(attotime::from_usec(500));
32      //space->device().execute().spin_until_interrupt();
30   if (space.device().safe_pc()==0xc04173c)
31      space.device().execute().spin_until_time(attotime::from_usec(500));
32      //space.device().execute().spin_until_interrupt();
3333//  else
34//      printf("%08x\n", space->device().safe_pc());
34//      printf("%08x\n", space.device().safe_pc());
3535
36   return space->machine().driver_data<dc_state>()->dc_ram[0x2ad238/8];
36   return space.machine().driver_data<dc_state>()->dc_ram[0x2ad238/8];
3737}
3838
3939static READ64_HANDLER( naomi_biosh_idle_skip_r )
4040{
41   if (space->device().safe_pc()==0xc045ffc)
42      space->device().execute().spin_until_time(attotime::from_usec(500));
41   if (space.device().safe_pc()==0xc045ffc)
42      space.device().execute().spin_until_time(attotime::from_usec(500));
4343
44//   printf("%08x\n", space->device().safe_pc());
44//   printf("%08x\n", space.device().safe_pc());
4545
46   return space->machine().driver_data<dc_state>()->dc_ram[0x2b0600/8];
46   return space.machine().driver_data<dc_state>()->dc_ram[0x2b0600/8];
4747}
4848
4949static READ64_HANDLER( naomi2_biose_idle_skip_r )
5050{
51   if (space->device().safe_pc()==0xc04637c)
52      space->device().execute().spin_until_time(attotime::from_usec(500));
53      //space->device().execute().spin_until_interrupt();
51   if (space.device().safe_pc()==0xc04637c)
52      space.device().execute().spin_until_time(attotime::from_usec(500));
53      //space.device().execute().spin_until_interrupt();
5454//  else
55//      printf("%08x\n", space->device().safe_pc());
55//      printf("%08x\n", space.device().safe_pc());
5656
57   return space->machine().driver_data<dc_state>()->dc_ram[0x2b0600/8];
57   return space.machine().driver_data<dc_state>()->dc_ram[0x2b0600/8];
5858}
5959
6060static UINT8 asciihex_to_dec(UINT8 in)
r17963r17964
242242
243243static READ64_HANDLER( naomigd_ggxxsla_idle_skip_r )
244244{
245   if (space->device().safe_pc()==0x0c0c9adc)
246      space->device().execute().spin_until_time(attotime::from_usec(500));
245   if (space.device().safe_pc()==0x0c0c9adc)
246      space.device().execute().spin_until_time(attotime::from_usec(500));
247247
248   return space->machine().driver_data<dc_state>()->dc_ram[0x1aae18/8];
248   return space.machine().driver_data<dc_state>()->dc_ram[0x1aae18/8];
249249}
250250
251251DRIVER_INIT_MEMBER(dc_state,ggxxsla)
r17963r17964
256256
257257static READ64_HANDLER( naomigd_ggxx_idle_skip_r )
258258{
259   if (space->device().safe_pc()==0xc0b5c3c) // or 0xc0bab0c
260      space->device().execute().spin_until_time(attotime::from_usec(500));
259   if (space.device().safe_pc()==0xc0b5c3c) // or 0xc0bab0c
260      space.device().execute().spin_until_time(attotime::from_usec(500));
261261
262   return space->machine().driver_data<dc_state>()->dc_ram[0x1837b8/8];
262   return space.machine().driver_data<dc_state>()->dc_ram[0x1837b8/8];
263263}
264264
265265
r17963r17964
271271
272272static READ64_HANDLER( naomigd_ggxxrl_idle_skip_r )
273273{
274   if (space->device().safe_pc()==0xc0b84bc) // or 0xc0bab0c
275      space->device().execute().spin_until_time(attotime::from_usec(500));
274   if (space.device().safe_pc()==0xc0b84bc) // or 0xc0bab0c
275      space.device().execute().spin_until_time(attotime::from_usec(500));
276276
277   //printf("%08x\n", space->device().safe_pc());
277   //printf("%08x\n", space.device().safe_pc());
278278
279   return space->machine().driver_data<dc_state>()->dc_ram[0x18d6c8/8];
279   return space.machine().driver_data<dc_state>()->dc_ram[0x18d6c8/8];
280280}
281281
282282DRIVER_INIT_MEMBER(dc_state,ggxxrl)
r17963r17964
288288/* at least speeds up the annoying copyright screens ;-) */
289289static READ64_HANDLER( naomigd_sfz3ugd_idle_skip_r )
290290{
291   if (space->device().safe_pc()==0xc36a2dc)
292      space->device().execute().spin_until_time(attotime::from_usec(500));
291   if (space.device().safe_pc()==0xc36a2dc)
292      space.device().execute().spin_until_time(attotime::from_usec(500));
293293
294   return space->machine().driver_data<dc_state>()->dc_ram[0x5dc900/8];
294   return space.machine().driver_data<dc_state>()->dc_ram[0x5dc900/8];
295295}
296296
297297DRIVER_INIT_MEMBER(dc_state,sfz3ugd)
r17963r17964
333333
334334static READ64_HANDLER( hotd2_idle_skip_r )
335335{
336   if (space->device().safe_pc()==0xc0cfcbc)
337      space->device().execute().spin_until_time(attotime::from_usec(500));
338      //space->device().execute().spin_until_interrupt();
336   if (space.device().safe_pc()==0xc0cfcbc)
337      space.device().execute().spin_until_time(attotime::from_usec(500));
338      //space.device().execute().spin_until_interrupt();
339339//  else
340//  printf("%08x\n", space->device().safe_pc());
340//  printf("%08x\n", space.device().safe_pc());
341341
342   return space->machine().driver_data<dc_state>()->dc_ram[0xa25fb8/8];
342   return space.machine().driver_data<dc_state>()->dc_ram[0xa25fb8/8];
343343}
344344
345345DRIVER_INIT_MEMBER(dc_state,hotd2)
trunk/src/mame/machine/asteroid.c
r17963r17964
134134void asteroid_state::machine_reset()
135135{
136136   asteroid_bank_switch_w(*machine().device("maincpu")->memory().space(AS_PROGRAM), 0, 0);
137   avgdvg_reset_w(machine().device("maincpu")->memory().space(AS_PROGRAM), 0, 0);
137   avgdvg_reset_w(*machine().device("maincpu")->memory().space(AS_PROGRAM), 0, 0);
138138}
trunk/src/mame/machine/m68kfmly.c
r17963r17964
148148
149149READ16_HANDLER( tmp68301_address_decoder_r )
150150{
151   LOG(("PC %08X: TMP68301_address_decoder_r (%08X)\n", space->device().safe_pc(), (0xfffc00 + (offset * 2))));
151   LOG(("PC %08X: TMP68301_address_decoder_r (%08X)\n", space.device().safe_pc(), (0xfffc00 + (offset * 2))));
152152
153153   return tmp68301_address_decoder[offset];
154154}
155155
156156WRITE16_HANDLER( tmp68301_address_decoder_w )
157157{
158   LOG(("PC %08X: TMP68301_address_decoder_w (%08X = %04X)\n", space->device().safe_pc(), (0xfffc00 + (offset * 2)), data));
158   LOG(("PC %08X: TMP68301_address_decoder_w (%08X = %04X)\n", space.device().safe_pc(), (0xfffc00 + (offset * 2)), data));
159159
160160   tmp68301_address_decoder[offset] = data;
161161}
162162
163163READ16_HANDLER( tmp68301_interrupt_controller_r )
164164{
165   LOG(("PC %08X: TMP68301_interrupt_controller_r (%08X)\n", space->device().safe_pc(), (0xfffc80 + (offset * 2))));
165   LOG(("PC %08X: TMP68301_interrupt_controller_r (%08X)\n", space.device().safe_pc(), (0xfffc80 + (offset * 2))));
166166
167167   return tmp68301_interrupt_controller[offset];
168168}
169169
170170WRITE16_HANDLER( tmp68301_interrupt_controller_w )
171171{
172   LOG(("PC %08X: TMP68301_interrupt_controller_w (%08X = %04X)\n", space->device().safe_pc(), (0xfffc80 + (offset * 2)), data));
172   LOG(("PC %08X: TMP68301_interrupt_controller_w (%08X = %04X)\n", space.device().safe_pc(), (0xfffc80 + (offset * 2)), data));
173173
174174   tmp68301_interrupt_controller[offset] = data;
175175}
176176
177177READ16_HANDLER( tmp68301_parallel_interface_r )
178178{
179   LOG(("PC %08X: TMP68301_parallel_interface_r (%08X)\n", space->device().safe_pc(), (0xfffd00 + (offset * 2))));
179   LOG(("PC %08X: TMP68301_parallel_interface_r (%08X)\n", space.device().safe_pc(), (0xfffd00 + (offset * 2))));
180180
181181   return tmp68301_parallel_interface[offset];
182182}
183183
184184WRITE16_HANDLER( tmp68301_parallel_interface_w )
185185{
186   LOG(("PC %08X: TMP68301_parallel_interface_w (%08X = %04X)\n", space->device().safe_pc(), (0xfffd00 + (offset * 2)), data));
186   LOG(("PC %08X: TMP68301_parallel_interface_w (%08X = %04X)\n", space.device().safe_pc(), (0xfffd00 + (offset * 2)), data));
187187
188188   tmp68301_parallel_interface[offset] = data;
189189}
190190
191191READ16_HANDLER( tmp68301_serial_interface_r )
192192{
193   LOG(("PC %08X: TMP68301_serial_interface_r (%08X)\n", space->device().safe_pc(), (0xfffd80 + (offset * 2))));
193   LOG(("PC %08X: TMP68301_serial_interface_r (%08X)\n", space.device().safe_pc(), (0xfffd80 + (offset * 2))));
194194
195195   return tmp68301_serial_interface[offset];
196196}
197197
198198WRITE16_HANDLER( tmp68301_serial_interface_w )
199199{
200   LOG(("PC %08X: TMP68301_serial_interface_w (%08X = %04X)\n", space->device().safe_pc(), (0xfffd80 + (offset * 2)), data));
200   LOG(("PC %08X: TMP68301_serial_interface_w (%08X = %04X)\n", space.device().safe_pc(), (0xfffd80 + (offset * 2)), data));
201201
202202   tmp68301_serial_interface[offset] = data;
203203}
204204
205205READ16_HANDLER( tmp68301_timer_r )
206206{
207   LOG(("PC %08X: TMP68301_timer_r (%08X)\n", space->device().safe_pc(), (0xfffe00 + (offset * 2))));
207   LOG(("PC %08X: TMP68301_timer_r (%08X)\n", space.device().safe_pc(), (0xfffe00 + (offset * 2))));
208208
209209   return tmp68301_timer[offset];
210210}
211211
212212WRITE16_HANDLER( tmp68301_timer_w )
213213{
214   LOG(("PC %08X: TMP68301_timer_w (%08X = %04X)\n", space->device().safe_pc(), (0xfffe00 + (offset * 2)), data));
214   LOG(("PC %08X: TMP68301_timer_w (%08X = %04X)\n", space.device().safe_pc(), (0xfffe00 + (offset * 2)), data));
215215
216216   tmp68301_timer[offset] = data;
217217}
trunk/src/mame/machine/mhavoc.c
r17963r17964
8282
8383void mhavoc_state::machine_reset()
8484{
85   address_space *space = machine().device("alpha")->memory().space(AS_PROGRAM);
85   address_space &space = *machine().device("alpha")->memory().space(AS_PROGRAM);
8686   m_has_gamma_cpu = (machine().device("gamma") != NULL);
8787
8888   membank("bank1")->configure_entry(0, m_zram0);
r17963r17964
9090   membank("bank2")->configure_entries(0, 4, memregion("alpha")->base() + 0x10000, 0x2000);
9191
9292   /* reset RAM/ROM banks to 0 */
93   mhavoc_ram_banksel_w(*space, 0, 0);
94   mhavoc_rom_banksel_w(*space, 0, 0);
93   mhavoc_ram_banksel_w(space, 0, 0);
94   mhavoc_rom_banksel_w(space, 0, 0);
9595
9696   /* reset alpha comm status */
9797   m_alpha_data = 0;
trunk/src/mame/machine/twincobr.c
r17963r17964
260260}
261261
262262
263static void toaplan0_coin_dsp_w(address_space *space, int offset, int data)
263static void toaplan0_coin_dsp_w(address_space &space, int offset, int data)
264264{
265   twincobr_state *state = space->machine().driver_data<twincobr_state>();
265   twincobr_state *state = space.machine().driver_data<twincobr_state>();
266266   if (data > 1)
267      LOG(("%s:Writing %08x to %08x.\n",space->machine().describe_context(),data,toaplan_port_type[state->m_toaplan_main_cpu] - offset));
267      LOG(("%s:Writing %08x to %08x.\n",space.machine().describe_context(),data,toaplan_port_type[state->m_toaplan_main_cpu] - offset));
268268   switch (data) {
269      case 0x08: coin_counter_w(space->machine(), 0,0); break;
270      case 0x09: coin_counter_w(space->machine(), 0,1); break;
271      case 0x0a: coin_counter_w(space->machine(), 1,0); break;
272      case 0x0b: coin_counter_w(space->machine(), 1,1); break;
273      case 0x0c: coin_lockout_w(space->machine(), 0,1); break;
274      case 0x0d: coin_lockout_w(space->machine(), 0,0); break;
275      case 0x0e: coin_lockout_w(space->machine(), 1,1); break;
276      case 0x0f: coin_lockout_w(space->machine(), 1,0); break;
269      case 0x08: coin_counter_w(space.machine(), 0,0); break;
270      case 0x09: coin_counter_w(space.machine(), 0,1); break;
271      case 0x0a: coin_counter_w(space.machine(), 1,0); break;
272      case 0x0b: coin_counter_w(space.machine(), 1,1); break;
273      case 0x0c: coin_lockout_w(space.machine(), 0,1); break;
274      case 0x0d: coin_lockout_w(space.machine(), 0,0); break;
275      case 0x0e: coin_lockout_w(space.machine(), 1,1); break;
276      case 0x0f: coin_lockout_w(space.machine(), 1,0); break;
277277      /****** The following apply to Flying Shark/Wardner only ******/
278278      case 0x00:   /* This means assert the INT line to the DSP */
279279               LOG(("Turning DSP on and main CPU off\n"));
280               space->machine().device("dsp")->execute().set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
281               space->machine().device("dsp")->execute().set_input_line(0, ASSERT_LINE); /* TMS32010 INT */
282               space->machine().device("maincpu")->execute().set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
280               space.machine().device("dsp")->execute().set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
281               space.machine().device("dsp")->execute().set_input_line(0, ASSERT_LINE); /* TMS32010 INT */
282               space.machine().device("maincpu")->execute().set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
283283               break;
284284      case 0x01:   /* This means inhibit the INT line to the DSP */
285285               LOG(("Turning DSP off\n"));
286               space->machine().device("dsp")->execute().set_input_line(0, CLEAR_LINE); /* TMS32010 INT */
287               space->machine().device("dsp")->execute().set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
286               space.machine().device("dsp")->execute().set_input_line(0, CLEAR_LINE); /* TMS32010 INT */
287               space.machine().device("dsp")->execute().set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
288288               break;
289289   }
290290}
r17963r17964
294294{
295295   if (ACCESSING_BITS_0_7)
296296   {
297      toaplan0_coin_dsp_w(&space, offset, data & 0xff);
297      toaplan0_coin_dsp_w(space, offset, data & 0xff);
298298   }
299299}
300300
301301WRITE8_MEMBER(twincobr_state::twincobr_coin_w)
302302{
303   toaplan0_coin_dsp_w(&space, offset, data);
303   toaplan0_coin_dsp_w(space, offset, data);
304304}
305305
306306WRITE8_MEMBER(twincobr_state::wardner_coin_dsp_w)
307307{
308   toaplan0_coin_dsp_w(&space, offset, data);
308   toaplan0_coin_dsp_w(space, offset, data);
309309}
310310
311311
trunk/src/mame/machine/megasvp.c
r17963r17964
5656   if (d & 0x000f) { *dst &= ~0x000f; *dst |= d & 0x000f; }
5757}
5858
59static UINT32 pm_io(address_space *space, int reg, int write, UINT32 d)
59static UINT32 pm_io(address_space &space, int reg, int write, UINT32 d)
6060{
61   mdsvp_state *state = space->machine().driver_data<mdsvp_state>();
61   mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
6262   if (state->m_emu_status & SSP_PMC_SET)
6363   {
6464      state->m_pmac_read[write ? reg + 6 : reg] = state->m_pmc.d;
r17963r17964
7171      state->m_emu_status &= ~SSP_PMC_HAVE_ADDR;
7272   }
7373
74   if (reg == 4 || (space->device().state().state_int(SSP_ST) & 0x60))
74   if (reg == 4 || (space.device().state().state_int(SSP_ST) & 0x60))
7575   {
7676      #define CADDR ((((mode<<16)&0x7f0000)|addr)<<1)
7777      UINT16 *dram = (UINT16 *)state->m_dram;
r17963r17964
112112         int addr = state->m_pmac_read[reg]&0xffff;
113113         if      ((mode & 0xfff0) == 0x0800) // ROM, inc 1, verified to be correct
114114         {
115            UINT16 *ROM = (UINT16 *) space->machine().root_device().memregion("maincpu")->base();
115            UINT16 *ROM = (UINT16 *) space.machine().root_device().memregion("maincpu")->base();
116116            state->m_pmac_read[reg] += 1;
117117            d = ROM[addr|((mode&0xf)<<16)];
118118         }
r17963r17964
141141
142142static READ16_HANDLER( read_PM0 )
143143{
144   mdsvp_state *state = space->machine().driver_data<mdsvp_state>();
144   mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
145145   UINT32 d = pm_io(space, 0, 0, 0);
146146   if (d != (UINT32)-1) return d;
147147   d = state->m_XST2;
r17963r17964
151151
152152static WRITE16_HANDLER( write_PM0 )
153153{
154   mdsvp_state *state = space->machine().driver_data<mdsvp_state>();
154   mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
155155   UINT32 r = pm_io(space, 0, 1, data);
156156   if (r != (UINT32)-1) return;
157157   state->m_XST2 = data; // ?
r17963r17964
189189
190190static READ16_HANDLER( read_XST )
191191{
192   mdsvp_state *state = space->machine().driver_data<mdsvp_state>();
192   mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
193193   UINT32 d = pm_io(space, 3, 0, 0);
194194   if (d != (UINT32)-1) return d;
195195
r17963r17964
198198
199199static WRITE16_HANDLER( write_XST )
200200{
201   mdsvp_state *state = space->machine().driver_data<mdsvp_state>();
201   mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
202202   UINT32 r = pm_io(space, 3, 1, data);
203203   if (r != (UINT32)-1) return;
204204
r17963r17964
218218
219219static READ16_HANDLER( read_PMC )
220220{
221   mdsvp_state *state = space->machine().driver_data<mdsvp_state>();
221   mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
222222   if (state->m_emu_status & SSP_PMC_HAVE_ADDR) {
223223      state->m_emu_status |= SSP_PMC_SET;
224224      state->m_emu_status &= ~SSP_PMC_HAVE_ADDR;
r17963r17964
231231
232232static WRITE16_HANDLER( write_PMC )
233233{
234   mdsvp_state *state = space->machine().driver_data<mdsvp_state>();
234   mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
235235   if (state->m_emu_status & SSP_PMC_HAVE_ADDR) {
236236      state->m_emu_status |= SSP_PMC_SET;
237237      state->m_emu_status &= ~SSP_PMC_HAVE_ADDR;
r17963r17964
244244
245245static READ16_HANDLER( read_AL )
246246{
247   mdsvp_state *state = space->machine().driver_data<mdsvp_state>();
247   mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
248248   state->m_emu_status &= ~(SSP_PMC_SET|SSP_PMC_HAVE_ADDR);
249249   return 0;
250250}
r17963r17964
257257
258258static READ16_HANDLER( svp_68k_io_r )
259259{
260   mdsvp_state *state = space->machine().driver_data<mdsvp_state>();
260   mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
261261   UINT32 d;
262262   switch (offset)
263263   {
r17963r17964
273273
274274static WRITE16_HANDLER( svp_68k_io_w )
275275{
276   mdsvp_state *state = space->machine().driver_data<mdsvp_state>();
276   mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
277277   switch (offset)
278278   {
279279      // 0xa15000, 0xa15002
r17963r17964
288288static READ16_HANDLER( svp_68k_cell1_r )
289289{
290290   // this is rewritten 68k test code
291   mdsvp_state *state = space->machine().driver_data<mdsvp_state>();
291   mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
292292   UINT32 a1 = offset;
293293   a1 = (a1 & 0x7001) | ((a1 & 0x3e) << 6) | ((a1 & 0xfc0) >> 5);
294294   return ((UINT16 *)state->m_dram)[a1];
r17963r17964
297297static READ16_HANDLER( svp_68k_cell2_r )
298298{
299299   // this is rewritten 68k test code
300   mdsvp_state *state = space->machine().driver_data<mdsvp_state>();
300   mdsvp_state *state = space.machine().driver_data<mdsvp_state>();
301301   UINT32 a1 = offset;
302302   a1 = (a1 & 0x7801) | ((a1 & 0x1e) << 6) | ((a1 & 0x7e0) >> 4);
303303   return ((UINT16 *)state->m_dram)[a1];
r17963r17964
333333
334334static READ16_HANDLER( svp_speedup_r )
335335{
336    space->device().execute().spin_until_time(attotime::from_usec(100));
336    space.device().execute().spin_until_time(attotime::from_usec(100));
337337   return 0x0425;
338338}
339339
trunk/src/mame/machine/neoboot.c
r17963r17964
139139
140140static UINT16 kof10thExtraRAMB[0x01000];
141141
142static void kof10thBankswitch(address_space *space, UINT16 nBank)
142static void kof10thBankswitch(address_space &space, UINT16 nBank)
143143{
144144   UINT32 bank = 0x100000 + ((nBank & 7) << 20);
145145   if (bank >= 0x700000)
r17963r17964
155155static WRITE16_HANDLER( kof10th_custom_w )
156156{
157157   if (!kof10thExtraRAMB[0xFFE]) { // Write to RAM bank A
158      UINT16 *prom = (UINT16*)space->machine().root_device().memregion( "maincpu" )->base();
158      UINT16 *prom = (UINT16*)space.machine().root_device().memregion( "maincpu" )->base();
159159      COMBINE_DATA(&prom[(0xE0000/2) + (offset & 0xFFFF)]);
160160   } else { // Write S data on-the-fly
161      UINT8 *srom = space->machine().root_device().memregion( "fixed" )->base();
161      UINT8 *srom = space.machine().root_device().memregion( "fixed" )->base();
162162      srom[offset] = BITSWAP8(data,7,6,0,4,3,2,1,5);
163163   }
164164}
r17963r17964
169169      if (offset == 0x5FFF8) { // Standard bankswitch
170170         kof10thBankswitch(space, data);
171171      } else if (offset == 0x5FFFC && kof10thExtraRAMB[0xFFC] != data) { // Special bankswitch
172         UINT8 *src = space->machine().root_device().memregion( "maincpu" )->base();
172         UINT8 *src = space.machine().root_device().memregion( "maincpu" )->base();
173173         memcpy (src + 0x10000,  src + ((data & 1) ? 0x810000 : 0x710000), 0xcffff);
174174      }
175175      COMBINE_DATA(&kof10thExtraRAMB[offset & 0xFFF]);
r17963r17964
702702
703703static READ16_HANDLER( mslug5_prot_r )
704704{
705   logerror("PC %06x: access protected\n",space->device().safe_pc());
705   logerror("PC %06x: access protected\n",space.device().safe_pc());
706706   return 0xa0;
707707}
708708
709709static WRITE16_HANDLER ( ms5plus_bankswitch_w )
710710{
711711   int bankaddress;
712   logerror("offset: %06x PC %06x: set banking %04x\n",offset,space->device().safe_pc(),data);
712   logerror("offset: %06x PC %06x: set banking %04x\n",offset,space.device().safe_pc(),data);
713713   if ((offset == 0)&&(data == 0xa0))
714714   {
715715      bankaddress=0xa0;
716716      neogeo_set_main_cpu_bank_address(space, bankaddress);
717      logerror("offset: %06x PC %06x: set banking %04x\n\n",offset,space->device().safe_pc(),bankaddress);
717      logerror("offset: %06x PC %06x: set banking %04x\n\n",offset,space.device().safe_pc(),bankaddress);
718718   }
719719   else if(offset == 2)
720720   {
r17963r17964
722722      //data=data&7;
723723      bankaddress=data*0x100000;
724724      neogeo_set_main_cpu_bank_address(space, bankaddress);
725      logerror("offset: %06x PC %06x: set banking %04x\n\n",offset,space->device().safe_pc(),bankaddress);
725      logerror("offset: %06x PC %06x: set banking %04x\n\n",offset,space.device().safe_pc(),bankaddress);
726726   }
727727}
728728
r17963r17964
924924      UINT8* cr = (UINT8 *)kof2003_tbl;
925925      UINT32 address = (cr[BYTE_XOR_LE(0x1ff3)]<<16)|(cr[BYTE_XOR_LE(0x1ff2)]<<8)|cr[BYTE_XOR_LE(0x1ff1)];
926926      UINT8 prt = cr[BYTE_XOR_LE(0x1ff2)];
927      UINT8* mem = (UINT8 *)space->machine().root_device().memregion("maincpu")->base();
927      UINT8* mem = (UINT8 *)space.machine().root_device().memregion("maincpu")->base();
928928
929929      cr[BYTE_XOR_LE(0x1ff0)] =  0xa0;
930930      cr[BYTE_XOR_LE(0x1ff1)] &= 0xfe;
r17963r17964
942942      UINT8* cr = (UINT8 *)kof2003_tbl;
943943      UINT32 address = (cr[BYTE_XOR_LE(0x1ff3)]<<16)|(cr[BYTE_XOR_LE(0x1ff2)]<<8)|cr[BYTE_XOR_LE(0x1ff0)];
944944      UINT8 prt = cr[BYTE_XOR_LE(0x1ff2)];
945      UINT8* mem = (UINT8 *)space->machine().root_device().memregion("maincpu")->base();
945      UINT8* mem = (UINT8 *)space.machine().root_device().memregion("maincpu")->base();
946946
947947      cr[BYTE_XOR_LE(0x1ff0)] &= 0xfe;
948948      cr[BYTE_XOR_LE(0x1ff3)] &= 0x7f;
trunk/src/mame/machine/stvcd.c
r17963r17964
19351935      case 0x90022:
19361936      case 0x90024:
19371937      case 0x90026:
1938         cd_writeWord(space->machine(), offset, data>>16);
1938         cd_writeWord(space.machine(), offset, data>>16);
19391939         break;
19401940
19411941      default:
trunk/src/mame/machine/snesbsx.c
r17963r17964
4848static void bsx_update_memory_map(void)
4949{
5050   bsx_state.ram_source = BIT(bsx_state.cart_regs[0x01], 7) ? SNES_BSX_PRAM : SNES_BSX_FLASH;
51//  UINT8 *RAM = (bsx_state.cart_regs[0x01] & 0x80) == 0x00 ? space->machine().root_device().memregion("flash")->base() : bsx_state.pram;
51//  UINT8 *RAM = (bsx_state.cart_regs[0x01] & 0x80) == 0x00 ? space.machine().root_device().memregion("flash")->base() : bsx_state.pram;
5252
5353   logerror("BSX: updated memory map, current RAM: %d", bsx_state.ram_source);
5454   if (!BIT(bsx_state.cart_regs[0x02], 7))
r17963r17964
149149#ifdef UNUSED_FUNCTION
150150static READ8_HANDLER( bsx_flash_read )
151151{
152   UINT8 *FLASH = space->machine().root_device().memregion("flash")->base();
152   UINT8 *FLASH = space.machine().root_device().memregion("flash")->base();
153153
154154   if (offset == 0x0002)
155155   {
trunk/src/mame/machine/namcoio.c
r17963r17964
461461   namcoio_state *namcoio = get_safe_token(device);
462462   offset &= 0x3f;
463463
464//  LOG(("%04x: I/O read: mode %d, offset %d = %02x\n", space->device().safe_pc(), offset / 16, namcoio_ram[(offset & 0x30) + 8], offset & 0x0f, namcoio_ram[offset]&0x0f));
464//  LOG(("%04x: I/O read: mode %d, offset %d = %02x\n", space.device().safe_pc(), offset / 16, namcoio_ram[(offset & 0x30) + 8], offset & 0x0f, namcoio_ram[offset]&0x0f));
465465
466466   return 0xf0 | namcoio->ram[offset];
467467}
r17963r17964
472472   offset &= 0x3f;
473473   data &= 0x0f;   // RAM is 4-bit wide
474474
475//  LOG(("%04x: I/O write %d: offset %d = %02x\n", space->device().safe_pc(), offset / 16, offset & 0x0f, data));
475//  LOG(("%04x: I/O write %d: offset %d = %02x\n", space.device().safe_pc(), offset / 16, offset & 0x0f, data));
476476
477477   namcoio->ram[offset] = data;
478478}
trunk/src/mame/machine/konami1.c
r17963r17964
4242
4343UINT8 *konami1_decode(running_machine &machine, const char *cpu)
4444{
45   address_space *space = machine.device(cpu)->memory().space(AS_PROGRAM);
45   address_space &space = *machine.device(cpu)->memory().space(AS_PROGRAM);
4646   const UINT8 *rom = machine.root_device().memregion(cpu)->base();
4747   int size = machine.root_device().memregion(cpu)->bytes();
4848   int A;
4949
5050   UINT8 *decrypted = auto_alloc_array(machine, UINT8, size);
51   space->set_decrypted_region(0x0000, 0xffff, decrypted);
51   space.set_decrypted_region(0x0000, 0xffff, decrypted);
5252
5353   for (A = 0;A < size;A++)
5454   {
trunk/src/mame/machine/namcos1.c
r17963r17964
1212
1313/* hardware elements of 1Mbytes physical memory space */
1414
15INLINE UINT8 bank_r(address_space *space, offs_t offset, int bank)
15INLINE UINT8 bank_r(address_space &space, offs_t offset, int bank)
1616{
17   namcos1_state *state = space->machine().driver_data<namcos1_state>();
17   namcos1_state *state = space.machine().driver_data<namcos1_state>();
1818   return (*state->m_active_bank[bank].bank_handler_r )(space, offset + state->m_active_bank[bank].bank_offset);
1919}
2020
r17963r17964
3535static READ8_HANDLER( bank15_r ) { return bank_r(space, offset, 14); }
3636static READ8_HANDLER( bank16_r ) { return bank_r(space, offset, 15); }
3737
38INLINE void bank_w(address_space *space, offs_t offset, UINT8 data, int bank)
38INLINE void bank_w(address_space &space, offs_t offset, UINT8 data, int bank)
3939{
40   namcos1_state *state = space->machine().driver_data<namcos1_state>();
40   namcos1_state *state = space.machine().driver_data<namcos1_state>();
4141   (*state->m_active_bank[bank].bank_handler_w )(space, offset + state->m_active_bank[bank].bank_offset, data);
4242}
4343
r17963r17964
8888
8989static READ8_HANDLER( no_key_r )
9090{
91   popmessage("CPU %s PC %08x: keychip read %04x\n", space->device().tag(), space->device().safe_pc(), offset);
91   popmessage("CPU %s PC %08x: keychip read %04x\n", space.device().tag(), space.device().safe_pc(), offset);
9292   return 0;
9393}
9494
9595static WRITE8_HANDLER( no_key_w )
9696{
97   popmessage("CPU %s PC %08x: keychip write %04x=%02x\n", space->device().tag(), space->device().safe_pc(), offset, data);
97   popmessage("CPU %s PC %08x: keychip write %04x=%02x\n", space.device().tag(), space.device().safe_pc(), offset, data);
9898}
9999
100100
r17963r17964
199199*/
200200static READ8_HANDLER( key_type1_r )
201201{
202   namcos1_state *state = space->machine().driver_data<namcos1_state>();
203//  logerror("CPU %s PC %04x: keychip read %04x\n", space->device().tag(), space->device().safe_pc(), offset);
202   namcos1_state *state = space.machine().driver_data<namcos1_state>();
203//  logerror("CPU %s PC %04x: keychip read %04x\n", space.device().tag(), space.device().safe_pc(), offset);
204204
205205   if (offset < 3)
206206   {
r17963r17964
231231
232232static WRITE8_HANDLER( key_type1_w )
233233{
234   namcos1_state *state = space->machine().driver_data<namcos1_state>();
235//  logerror("CPU %s PC %04x: keychip write %04x=%02x\n", space->device().tag(), space->device().safe_pc(), offset, data);
234   namcos1_state *state = space.machine().driver_data<namcos1_state>();
235//  logerror("CPU %s PC %04x: keychip write %04x=%02x\n", space.device().tag(), space.device().safe_pc(), offset, data);
236236
237237   if (offset < 4)
238238      state->m_key[offset] = data;
r17963r17964
384384
385385static READ8_HANDLER( key_type2_r )
386386{
387   namcos1_state *state = space->machine().driver_data<namcos1_state>();
388//  logerror("CPU %s PC %04x: keychip read %04x\n", space->device().tag(), space->device().safe_pc(), offset);
387   namcos1_state *state = space.machine().driver_data<namcos1_state>();
388//  logerror("CPU %s PC %04x: keychip read %04x\n", space.device().tag(), space.device().safe_pc(), offset);
389389
390390   state->m_key_numerator_high_word = 0;
391391
r17963r17964
404404
405405static WRITE8_HANDLER( key_type2_w )
406406{
407   namcos1_state *state = space->machine().driver_data<namcos1_state>();
408//  logerror("CPU %s PC %04x: keychip write %04x=%02x\n", space->device().tag(), space->device().safe_pc(), offset, data);
407   namcos1_state *state = space.machine().driver_data<namcos1_state>();
408//  logerror("CPU %s PC %04x: keychip write %04x=%02x\n", space.device().tag(), space.device().safe_pc(), offset, data);
409409
410410   if (offset < 5)
411411   {
r17963r17964
512512
513513static READ8_HANDLER( key_type3_r )
514514{
515   namcos1_state *state = space->machine().driver_data<namcos1_state>();
515   namcos1_state *state = space.machine().driver_data<namcos1_state>();
516516   int op;
517517
518//  logerror("CPU %s PC %04x: keychip read %04x\n", space->device().tag(), space->device().safe_pc(), offset);
518//  logerror("CPU %s PC %04x: keychip read %04x\n", space.device().tag(), space.device().safe_pc(), offset);
519519
520520   /* I need to handle blastoff's read from 0858. The game previously writes to 0858,
521521       using it as temporary storage, so maybe it expects to act as RAM, however
r17963r17964
526526   op = (offset & 0x70) >> 4;
527527
528528   if (op == state->m_key_reg)      return state->m_key_id;
529   if (op == state->m_key_rng)      return space->machine().rand();
529   if (op == state->m_key_rng)      return space.machine().rand();
530530   if (op == state->m_key_swap4)   return (state->m_key[state->m_key_swap4_arg] << 4) | (state->m_key[state->m_key_swap4_arg] >> 4);
531531   if (op == state->m_key_bottom4)   return (offset << 4) | (state->m_key[state->m_key_swap4_arg] & 0x0f);
532532   if (op == state->m_key_top4)      return (offset << 4) | (state->m_key[state->m_key_swap4_arg] >> 4);
533533
534   popmessage("CPU %s PC %08x: keychip read %04x", space->device().tag(), space->device().safe_pc(), offset);
534   popmessage("CPU %s PC %08x: keychip read %04x", space.device().tag(), space.device().safe_pc(), offset);
535535
536536   return 0;
537537}
538538
539539static WRITE8_HANDLER( key_type3_w )
540540{
541   namcos1_state *state = space->machine().driver_data<namcos1_state>();
542//  logerror("CPU %s PC %04x: keychip write %04x=%02x\n", space->device().tag(), space->device().safe_pc(), offset, data);
541   namcos1_state *state = space.machine().driver_data<namcos1_state>();
542//  logerror("CPU %s PC %04x: keychip write %04x=%02x\n", space.device().tag(), space.device().safe_pc(), offset, data);
543543
544544   state->m_key[(offset & 0x70) >> 4] = data;
545545}
r17963r17964
605605
606606static READ8_HANDLER( soundram_r )
607607{
608   namcos1_state *state = space->machine().driver_data<namcos1_state>();
608   namcos1_state *state = space.machine().driver_data<namcos1_state>();
609609   if (offset < 0x1000)
610610   {
611611      offset &= 0x3ff;
612612
613613      /* CUS 30 */
614      return namcos1_cus30_r(space->machine().device("namco"),*space,offset);
614      return namcos1_cus30_r(space.machine().device("namco"),space,offset);
615615   }
616616   else
617617   {
r17963r17964
624624
625625static WRITE8_HANDLER( soundram_w )
626626{
627   namcos1_state *state = space->machine().driver_data<namcos1_state>();
627   namcos1_state *state = space.machine().driver_data<namcos1_state>();
628628   if (offset < 0x1000)
629629   {
630630      offset &= 0x3ff;
631631
632632      /* CUS 30 */
633      namcos1_cus30_w(space->machine().device("namco"),*space,offset,data);
633      namcos1_cus30_w(space.machine().device("namco"),space,offset,data);
634634   }
635635   else
636636   {
r17963r17964
646646
647647static WRITE8_HANDLER( rom_w )
648648{
649   logerror("CPU %s PC %04x: warning - write %02x to rom address %04x\n", space->device().tag(), space->device().safe_pc(), data, offset);
649   logerror("CPU %s PC %04x: warning - write %02x to rom address %04x\n", space.device().tag(), space.device().safe_pc(), data, offset);
650650}
651651
652652/* error handlers */
653653static READ8_HANDLER( unknown_r )
654654{
655   logerror("CPU %s PC %04x: warning - read from unknown chip\n", space->device().tag(), space->device().safe_pc() );
656//  popmessage("CPU %s PC %04x: read from unknown chip", space->device().tag(), space->device().safe_pc() );
655   logerror("CPU %s PC %04x: warning - read from unknown chip\n", space.device().tag(), space.device().safe_pc() );
656//  popmessage("CPU %s PC %04x: read from unknown chip", space.device().tag(), space.device().safe_pc() );
657657   return 0;
658658}
659659
660660static WRITE8_HANDLER( unknown_w )
661661{
662   logerror("CPU %s PC %04x: warning - wrote to unknown chip\n", space->device().tag(), space->device().safe_pc() );
663//  popmessage("CPU %s PC %04x: wrote to unknown chip", space->device().tag(), space->device().safe_pc() );
662   logerror("CPU %s PC %04x: warning - wrote to unknown chip\n", space.device().tag(), space.device().safe_pc() );
663//  popmessage("CPU %s PC %04x: wrote to unknown chip", space.device().tag(), space.device().safe_pc() );
664664}
665665
666666/* Main bankswitching routine */
r17963r17964
672672      "bank9", "bank10", "bank11", "bank12", "bank13", "bank14", "bank15", "bank16"
673673   };
674674   static const char *const cputags[] = { "maincpu", "sub" };
675   address_space *space = machine.device(cputags[(banknum >> 3) & 1])->memory().space(AS_PROGRAM);
675   address_space &space = *machine.device(cputags[(banknum >> 3) & 1])->memory().space(AS_PROGRAM);
676676   int bankstart = (banknum & 7) * 0x2000;
677677
678678   /* for BANK handlers , memory direct and OP-code base */
r17963r17964
683683   if (!handler->bank_handler_r)
684684   {
685685      if (state->m_active_bank[banknum].bank_handler_r)
686         space->install_read_bank(bankstart, bankstart + 0x1fff, banktags[banknum]);
686         space.install_read_bank(bankstart, bankstart + 0x1fff, banktags[banknum]);
687687   }
688688   else
689689   {
690690      if (!state->m_active_bank[banknum].bank_handler_r)
691         space->install_legacy_read_handler(bankstart, bankstart + 0x1fff, io_bank_handler_r[banknum].func, io_bank_handler_r[banknum].name);
691         space.install_legacy_read_handler(bankstart, bankstart + 0x1fff, io_bank_handler_r[banknum].func, io_bank_handler_r[banknum].name);
692692   }
693693
694694   /* write handlers (except for the 0xe000-0xffff range) */
r17963r17964
697697      if (!handler->bank_handler_w)
698698      {
699699         if (state->m_active_bank[banknum].bank_handler_w)
700            space->install_write_bank(bankstart, bankstart + 0x1fff, banktags[banknum]);
700            space.install_write_bank(bankstart, bankstart + 0x1fff, banktags[banknum]);
701701      }
702702      else
703703      {
704704         if (!state->m_active_bank[banknum].bank_handler_r)
705            space->install_legacy_write_handler(bankstart, bankstart + 0x1fff, io_bank_handler_w[banknum].func, io_bank_handler_w[banknum].name);
705            space.install_legacy_write_handler(bankstart, bankstart + 0x1fff, io_bank_handler_w[banknum].func, io_bank_handler_w[banknum].name);
706706      }
707707   }
708708
r17963r17964
12811281      int ret;
12821282
12831283      if (!qnum)
1284         ret = (space->machine().root_device().ioport("CONTROL0")->read()&0x90) | qstrobe | (space->machine().root_device().ioport("PADDLE0")->read()&0x0f);
1284         ret = (space.machine().root_device().ioport("CONTROL0")->read()&0x90) | qstrobe | (space.machine().root_device().ioport("PADDLE0")->read()&0x0f);
12851285      else
1286         ret = (space->machine().root_device().ioport("CONTROL0")->read()&0x90) | qstrobe | (space->machine().root_device().ioport("PADDLE1")->read()&0x0f);
1286         ret = (space.machine().root_device().ioport("CONTROL0")->read()&0x90) | qstrobe | (space.machine().root_device().ioport("PADDLE1")->read()&0x0f);
12871287
12881288      qstrobe ^= 0x40;
12891289
r17963r17964
12941294      int ret;
12951295
12961296      if (!qnum)
1297         ret = (space->machine().root_device().ioport("CONTROL1")->read()&0x90) | qnum | (space->machine().root_device().ioport("PADDLE0")->read()>>4);
1297         ret = (space.machine().root_device().ioport("CONTROL1")->read()&0x90) | qnum | (space.machine().root_device().ioport("PADDLE0")->read()>>4);
12981298      else
1299         ret = (space->machine().root_device().ioport("CONTROL1")->read()&0x90) | qnum | (space->machine().root_device().ioport("PADDLE1")->read()>>4);
1299         ret = (space.machine().root_device().ioport("CONTROL1")->read()&0x90) | qnum | (space.machine().root_device().ioport("PADDLE1")->read()>>4);
13001300
13011301      if (!qstrobe) qnum ^= 0x20;
13021302
r17963r17964
13261326   {
13271327      int inp = input_count;
13281328
1329      if (inp == 4) res = space->machine().root_device().ioport("CONTROL0")->read();
1329      if (inp == 4) res = space.machine().root_device().ioport("CONTROL0")->read();
13301330      else
13311331      {
13321332         char portname[40];
r17963r17964
13351335         static int counter[4];
13361336
13371337         sprintf(portname,"IN%d",inp);   /* IN0-IN3 */
1338         res = space->machine().root_device().ioport(portname)->read();
1338         res = space.machine().root_device().ioport(portname)->read();
13391339         if (res & 0x80)
13401340         {
13411341            if (counter[inp] >= 0)
r17963r17964
13591359            counter[inp] = -1;
13601360#else
13611361         sprintf(portname,"IN%d",inp);   /* IN0-IN3 */
1362         res = space->machine().root_device().ioport(portname)->read();
1362         res = space.machine().root_device().ioport(portname)->read();
13631363         if (res & 1) res = 0x7f;      /* weak */
13641364         else if (res & 2) res = 0x48;   /* medium */
13651365         else if (res & 4) res = 0x40;   /* strong */
r17963r17964
13701370   }
13711371   else
13721372   {
1373      res = space->machine().root_device().ioport("CONTROL1")->read() & 0x8f;
1373      res = space.machine().root_device().ioport("CONTROL1")->read() & 0x8f;
13741374
13751375      /* the strobe cannot happen too often, otherwise the MCU will waste too
13761376           much time reading the inputs and won't have enough cycles to play two
r17963r17964
14121412
14131413   if (offset == 0)
14141414   {
1415      res = (space->machine().root_device().ioport("CONTROL0")->read() & 0x80) | stored_input[0];
1415      res = (space.machine().root_device().ioport("CONTROL0")->read() & 0x80) | stored_input[0];
14161416
14171417      return res;
14181418   }
14191419   else
14201420   {
1421      res = space->machine().root_device().ioport("CONTROL1")->read() & 0x80;
1421      res = space.machine().root_device().ioport("CONTROL1")->read() & 0x80;
14221422
14231423      /* the strobe cannot happen too often, otherwise the MCU will waste too
14241424           much time reading the inputs and won't have enough cycles to play two
r17963r17964
14331433         switch (input_count)
14341434         {
14351435            case 0:
1436               stored_input[0] = space->machine().root_device().ioport("IN0")->read() & 0x1f;
1437               stored_input[1] = (space->machine().root_device().ioport("IN3")->read() & 0x07) << 3;
1436               stored_input[0] = space.machine().root_device().ioport("IN0")->read() & 0x1f;
1437               stored_input[1] = (space.machine().root_device().ioport("IN3")->read() & 0x07) << 3;
14381438               break;
14391439
14401440            case 3:
1441               stored_input[0] = space->machine().root_device().ioport("IN2")->read() & 0x1f;
1441               stored_input[0] = space.machine().root_device().ioport("IN2")->read() & 0x1f;
14421442               break;
14431443
14441444            case 4:
1445               stored_input[0] = space->machine().root_device().ioport("IN1")->read() & 0x1f;
1446               stored_input[1] = space->machine().root_device().ioport("IN3")->read() & 0x18;
1445               stored_input[0] = space.machine().root_device().ioport("IN1")->read() & 0x1f;
1446               stored_input[1] = space.machine().root_device().ioport("IN3")->read() & 0x18;
14471447               break;
14481448
14491449            default:
trunk/src/mame/machine/pgmprot1.c
r17963r17964
5858
5959static READ32_HANDLER( pgm_arm7_type1_protlatch_r )
6060{
61   pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
61   pgm_arm_type1_state *state = space.machine().driver_data<pgm_arm_type1_state>();
6262
63   space->machine().scheduler().synchronize(); // force resync
63   space.machine().scheduler().synchronize(); // force resync
6464
6565   return (state->m_pgm_arm_type1_highlatch_68k_w << 16) | (state->m_pgm_arm_type1_lowlatch_68k_w);
6666}
6767
6868static WRITE32_HANDLER( pgm_arm7_type1_protlatch_w )
6969{
70   pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
70   pgm_arm_type1_state *state = space.machine().driver_data<pgm_arm_type1_state>();
7171
72   space->machine().scheduler().synchronize(); // force resync
72   space.machine().scheduler().synchronize(); // force resync
7373
7474   if (ACCESSING_BITS_16_31)
7575   {
r17963r17964
8585
8686static READ16_HANDLER( pgm_arm7_type1_68k_protlatch_r )
8787{
88   pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
88   pgm_arm_type1_state *state = space.machine().driver_data<pgm_arm_type1_state>();
8989
90   space->machine().scheduler().synchronize(); // force resync
90   space.machine().scheduler().synchronize(); // force resync
9191
9292   switch (offset)
9393   {
r17963r17964
9999
100100static WRITE16_HANDLER( pgm_arm7_type1_68k_protlatch_w )
101101{
102   pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
102   pgm_arm_type1_state *state = space.machine().driver_data<pgm_arm_type1_state>();
103103
104   space->machine().scheduler().synchronize(); // force resync
104   space.machine().scheduler().synchronize(); // force resync
105105
106106   switch (offset)
107107   {
r17963r17964
117117
118118static READ16_HANDLER( pgm_arm7_type1_ram_r )
119119{
120   pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
120   pgm_arm_type1_state *state = space.machine().driver_data<pgm_arm_type1_state>();
121121   UINT16 *share16 = reinterpret_cast<UINT16 *>(state->m_arm7_shareram.target());
122122
123123   if (PGMARM7LOGERROR)
124      logerror("M68K: ARM7 Shared RAM Read: %04x = %04x (%08x) (%06x)\n", BYTE_XOR_LE(offset), share16[BYTE_XOR_LE(offset)], mem_mask, space->device().safe_pc());
124      logerror("M68K: ARM7 Shared RAM Read: %04x = %04x (%08x) (%06x)\n", BYTE_XOR_LE(offset), share16[BYTE_XOR_LE(offset)], mem_mask, space.device().safe_pc());
125125   return share16[BYTE_XOR_LE(offset << 1)];
126126}
127127
128128static WRITE16_HANDLER( pgm_arm7_type1_ram_w )
129129{
130   pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
130   pgm_arm_type1_state *state = space.machine().driver_data<pgm_arm_type1_state>();
131131   UINT16 *share16 = reinterpret_cast<UINT16 *>(state->m_arm7_shareram.target());
132132
133133   if (PGMARM7LOGERROR)
134      logerror("M68K: ARM7 Shared RAM Write: %04x = %04x (%04x) (%06x)\n", BYTE_XOR_LE(offset), data, mem_mask, space->device().safe_pc());
134      logerror("M68K: ARM7 Shared RAM Write: %04x = %04x (%04x) (%06x)\n", BYTE_XOR_LE(offset), data, mem_mask, space.device().safe_pc());
135135   COMBINE_DATA(&share16[BYTE_XOR_LE(offset << 1)]);
136136}
137137
r17963r17964
140140
141141static READ32_HANDLER( pgm_arm7_type1_unk_r )
142142{
143   pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
143   pgm_arm_type1_state *state = space.machine().driver_data<pgm_arm_type1_state>();
144144   return state->m_pgm_arm_type1_counter++;
145145}
146146
r17963r17964
151151
152152static READ32_HANDLER( pgm_arm7_type1_shareram_r )
153153{
154   pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
154   pgm_arm_type1_state *state = space.machine().driver_data<pgm_arm_type1_state>();
155155
156156   if (PGMARM7LOGERROR)
157      logerror("ARM7: ARM7 Shared RAM Read: %04x = %08x (%08x) (%06x)\n", offset << 2, state->m_arm7_shareram[offset], mem_mask, space->device().safe_pc());
157      logerror("ARM7: ARM7 Shared RAM Read: %04x = %08x (%08x) (%06x)\n", offset << 2, state->m_arm7_shareram[offset], mem_mask, space.device().safe_pc());
158158   return state->m_arm7_shareram[offset];
159159}
160160
161161static WRITE32_HANDLER( pgm_arm7_type1_shareram_w )
162162{
163   pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
163   pgm_arm_type1_state *state = space.machine().driver_data<pgm_arm_type1_state>();
164164
165165   if (PGMARM7LOGERROR)
166      logerror("ARM7: ARM7 Shared RAM Write: %04x = %08x (%08x) (%06x)\n", offset << 2, data, mem_mask, space->device().safe_pc());
166      logerror("ARM7: ARM7 Shared RAM Write: %04x = %08x (%08x) (%06x)\n", offset << 2, data, mem_mask, space.device().safe_pc());
167167   COMBINE_DATA(&state->m_arm7_shareram[offset]);
168168}
169169
r17963r17964
271271
272272static READ16_HANDLER( kovsh_fake_region_r )
273273{
274   pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
274   pgm_arm_type1_state *state = space.machine().driver_data<pgm_arm_type1_state>();
275275   int regionhack = state->ioport("RegionHack")->read();
276276   if (regionhack != 0xff) return regionhack;
277277
r17963r17964
301301/* Fake remapping of ASIC commands to the ones used by KOVSH due to the lack of the real ARM rom for this set */
302302WRITE16_HANDLER( kovshp_asic27a_write_word )
303303{
304   pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
304   pgm_arm_type1_state *state = space.machine().driver_data<pgm_arm_type1_state>();
305305
306306   switch (offset)
307307   {
r17963r17964
519519
520520static READ16_HANDLER( pgm_arm7_type1_sim_r )
521521{
522   pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
522   pgm_arm_type1_state *state = space.machine().driver_data<pgm_arm_type1_state>();
523523
524524   if (offset == 0)
525525   {
r17963r17964
561561         break;
562562
563563      case 0x67: // set high bits
564   //      printf("%06x command %02x | %04x\n", space->device().safe_pc(), state->m_ddp3lastcommand, state->m_value0);
564   //      printf("%06x command %02x | %04x\n", space.device().safe_pc(), state->m_ddp3lastcommand, state->m_value0);
565565         state->m_valueresponse = 0x880000;
566566         state->m_curslots = (state->m_value0 & 0xff00)>>8;
567567         state->m_slots[state->m_curslots] = (state->m_value0 & 0x00ff) << 16;
568568         break;
569569
570570      case 0xe5: // set low bits for operation?
571      //  printf("%06x command %02x | %04x\n", space->device().safe_pc(), state->m_ddp3lastcommand, state->m_value0);
571      //  printf("%06x command %02x | %04x\n", space.device().safe_pc(), state->m_ddp3lastcommand, state->m_value0);
572572         state->m_valueresponse = 0x880000;
573573         state->m_slots[state->m_curslots] |= (state->m_value0 & 0xffff);
574574         break;
575575
576576
577577      case 0x8e: // read back result of operations
578   //      printf("%06x command %02x | %04x\n", space->device().safe_pc(), state->m_ddp3lastcommand, state->m_value0);
578   //      printf("%06x command %02x | %04x\n", space.device().safe_pc(), state->m_ddp3lastcommand, state->m_value0);
579579         state->m_valueresponse = state->m_slots[state->m_value0&0xff];
580580         break;
581581
r17963r17964
13491349
13501350static WRITE16_HANDLER( pgm_arm7_type1_sim_w )
13511351{
1352   pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
1353   int pc = space->device().safe_pc();
1352   pgm_arm_type1_state *state = space.machine().driver_data<pgm_arm_type1_state>();
1353   int pc = space.device().safe_pc();
13541354
13551355   if (offset == 0)
13561356   {
r17963r17964
13871387static READ16_HANDLER( pgm_arm7_type1_sim_protram_r )
13881388{
13891389   if (offset == 4)
1390      return space->machine().root_device().ioport("Region")->read();
1390      return space.machine().root_device().ioport("Region")->read();
13911391
13921392   return 0x0000;
13931393}
13941394
13951395static READ16_HANDLER( pstars_arm7_type1_sim_protram_r )
13961396{
1397   pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
1397   pgm_arm_type1_state *state = space.machine().driver_data<pgm_arm_type1_state>();
13981398
13991399   if (offset == 4)      //region
14001400      return state->ioport("Region")->read();
trunk/src/mame/machine/balsente.c
r17963r17964
137137
138138void balsente_state::machine_reset()
139139{
140   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
140   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
141141   int numbanks;
142142
143143   /* reset counters; counter 2's gate is tied high */
r17963r17964
163163   m_grudge_steering_result = 0;
164164
165165   /* reset the 6850 chips */
166   balsente_m6850_w(*space, 0, 3);
167   balsente_m6850_sound_w(*space, 0, 3);
166   balsente_m6850_w(space, 0, 3);
167   balsente_m6850_sound_w(space, 0, 3);
168168
169169   /* reset the noise generator */
170170   memset(m_noise_position, 0, sizeof(m_noise_position));
trunk/src/mame/machine/megadriv.c
r17963r17964
8484
8585static WRITE16_HANDLER( megadriv_68k_z80_bank_write )
8686{
87   //logerror("%06x: 68k writing bit to bank register %01x\n", space->device().safe_pc(),data&0x01);
87   //logerror("%06x: 68k writing bit to bank register %01x\n", space.device().safe_pc(),data&0x01);
8888   megadriv_z80_bank_w(data&0x01);
8989}
9090
9191static WRITE8_HANDLER(megadriv_z80_z80_bank_w)
9292{
93   //logerror("%04x: z80 writing bit to bank register %01x\n", space->device().safe_pc(),data&0x01);
93   //logerror("%04x: z80 writing bit to bank register %01x\n", space.device().safe_pc(),data&0x01);
9494   megadriv_z80_bank_w(data&0x01);
9595}
9696
r17963r17964
413413          D0 : Bit 0 of version number
414414      */
415415
416   //return (space->machine().rand()&0x0f0f)|0xf0f0;//0x0000;
416   //return (space.machine().rand()&0x0f0f)|0xf0f0;//0x0000;
417417   switch (offset)
418418   {
419419      case 0:
420         logerror("%06x read version register\n", space->device().safe_pc());
420         logerror("%06x read version register\n", space.device().safe_pc());
421421         retdata = megadrive_region_export<<7 | // Export
422422                   megadrive_region_pal<<6 | // NTSC
423423                   (sega_cd_connected?0x00:0x20) | // 0x20 = no sega cd
r17963r17964
434434      case 0x2:
435435      case 0x3:
436436//          retdata = megadrive_io_read_data_port(offset-1);
437         retdata = megadrive_io_read_data_port_ptr(space->machine(), offset-1);
437         retdata = megadrive_io_read_data_port_ptr(space.machine(), offset-1);
438438         break;
439439
440440      case 0x4:
r17963r17964
532532      case 0x2:
533533      case 0x3:
534534//          megadrive_io_write_data_port(offset-1,data);
535         megadrive_io_write_data_port_ptr(space->machine(), offset-1,data);
535         megadrive_io_write_data_port_ptr(space.machine(), offset-1,data);
536536         break;
537537
538538      case 0x4:
539539      case 0x5:
540540      case 0x6:
541         megadrive_io_write_ctrl_port(space->machine(),offset-4,data);
541         megadrive_io_write_ctrl_port(space.machine(),offset-4,data);
542542         break;
543543
544544      /* Serial I/O Registers */
545545
546      case 0x7: megadrive_io_write_tx_port(space->machine(),0,data); break;
547      case 0x8: megadrive_io_write_rx_port(space->machine(),0,data); break;
548      case 0x9: megadrive_io_write_sctrl_port(space->machine(),0,data); break;
546      case 0x7: megadrive_io_write_tx_port(space.machine(),0,data); break;
547      case 0x8: megadrive_io_write_rx_port(space.machine(),0,data); break;
548      case 0x9: megadrive_io_write_sctrl_port(space.machine(),0,data); break;
549549
550      case 0xa: megadrive_io_write_tx_port(space->machine(),1,data); break;
551      case 0xb: megadrive_io_write_rx_port(space->machine(),1,data); break;
552      case 0xc: megadrive_io_write_sctrl_port(space->machine(),1,data); break;
550      case 0xa: megadrive_io_write_tx_port(space.machine(),1,data); break;
551      case 0xb: megadrive_io_write_rx_port(space.machine(),1,data); break;
552      case 0xc: megadrive_io_write_sctrl_port(space.machine(),1,data); break;
553553
554      case 0xd: megadrive_io_write_tx_port(space->machine(),2,data); break;
555      case 0xe: megadrive_io_write_rx_port(space->machine(),2,data); break;
556      case 0xf: megadrive_io_write_sctrl_port(space->machine(),2,data); break;
554      case 0xd: megadrive_io_write_tx_port(space.machine(),2,data); break;
555      case 0xe: megadrive_io_write_rx_port(space.machine(),2,data); break;
556      case 0xf: megadrive_io_write_sctrl_port(space.machine(),2,data); break;
557557   }
558558}
559559
r17963r17964
601601   }
602602   else
603603   {
604      logerror("%06x: 68000 attempting to access Z80 (read) address space without bus\n", space->device().safe_pc());
605      return space->machine().rand();
604      logerror("%06x: 68000 attempting to access Z80 (read) address space without bus\n", space.device().safe_pc());
605      return space.machine().rand();
606606   }
607607}
608608
r17963r17964
628628   }
629629   else
630630   {
631      logerror("%06x: 68000 attempting to access Z80 (write) address space without bus\n", space->device().safe_pc());
631      logerror("%06x: 68000 attempting to access Z80 (write) address space without bus\n", space.device().safe_pc());
632632   }
633633}
634634
r17963r17964
644644       the value is never zero.  Time Killers is the most fussy, and doesn't like the
645645       read_next_instruction function from system16, so I just return a random value
646646       in the unused bits */
647   UINT16 nextvalue = space->machine().rand();//read_next_instruction(space)&0xff00;
647   UINT16 nextvalue = space.machine().rand();//read_next_instruction(space)&0xff00;
648648
649649
650650   /* Check if the 68k has the z80 bus */
r17963r17964
653653      if (genz80.z80_has_bus || genz80.z80_is_reset) retvalue = nextvalue | 0x0100;
654654      else retvalue = (nextvalue & 0xfeff);
655655
656      //logerror("%06x: 68000 check z80 Bus (byte MSB access) returning %04x mask %04x\n", space->device().safe_pc(),retvalue, mem_mask);
656      //logerror("%06x: 68000 check z80 Bus (byte MSB access) returning %04x mask %04x\n", space.device().safe_pc(),retvalue, mem_mask);
657657      return retvalue;
658658
659659   }
660660   else if (!ACCESSING_BITS_8_15) // is this valid?
661661   {
662      //logerror("%06x: 68000 check z80 Bus (byte LSB access) %04x\n", space->device().safe_pc(),mem_mask);
662      //logerror("%06x: 68000 check z80 Bus (byte LSB access) %04x\n", space.device().safe_pc(),mem_mask);
663663      if (genz80.z80_has_bus || genz80.z80_is_reset) retvalue = 0x0001;
664664      else retvalue = 0x0000;
665665
r17963r17964
667667   }
668668   else
669669   {
670      //logerror("%06x: 68000 check z80 Bus (word access) %04x\n", space->device().safe_pc(),mem_mask);
670      //logerror("%06x: 68000 check z80 Bus (word access) %04x\n", space.device().safe_pc(),mem_mask);
671671      if (genz80.z80_has_bus || genz80.z80_is_reset) retvalue = nextvalue | 0x0100;
672672      else retvalue = (nextvalue & 0xfeff);
673673
674   //  mame_printf_debug("%06x: 68000 check z80 Bus (word access) %04x %04x\n", space->device().safe_pc(),mem_mask, retvalue);
674   //  mame_printf_debug("%06x: 68000 check z80 Bus (word access) %04x %04x\n", space.device().safe_pc(),mem_mask, retvalue);
675675      return retvalue;
676676   }
677677}
r17963r17964
708708   {
709709      if (data & 0x0100)
710710      {
711         //logerror("%06x: 68000 request z80 Bus (byte MSB access) %04x %04x\n", space->device().safe_pc(),data,mem_mask);
711         //logerror("%06x: 68000 request z80 Bus (byte MSB access) %04x %04x\n", space.device().safe_pc(),data,mem_mask);
712712         genz80.z80_has_bus = 0;
713713      }
714714      else
715715      {
716         //logerror("%06x: 68000 return z80 Bus (byte MSB access) %04x %04x\n", space->device().safe_pc(),data,mem_mask);
716         //logerror("%06x: 68000 return z80 Bus (byte MSB access) %04x %04x\n", space.device().safe_pc(),data,mem_mask);
717717         genz80.z80_has_bus = 1;
718718      }
719719   }
r17963r17964
721721   {
722722      if (data & 0x0001)
723723      {
724         //logerror("%06x: 68000 request z80 Bus (byte LSB access) %04x %04x\n", space->device().safe_pc(),data,mem_mask);
724         //logerror("%06x: 68000 request z80 Bus (byte LSB access) %04x %04x\n", space.device().safe_pc(),data,mem_mask);
725725         genz80.z80_has_bus = 0;
726726      }
727727      else
728728      {
729         //logerror("%06x: 68000 return z80 Bus (byte LSB access) %04x %04x\n", space->device().safe_pc(),data,mem_mask);
729         //logerror("%06x: 68000 return z80 Bus (byte LSB access) %04x %04x\n", space.device().safe_pc(),data,mem_mask);
730730         genz80.z80_has_bus = 1;
731731      }
732732   }
r17963r17964
734734   {
735735      if (data & 0x0100)
736736      {
737         //logerror("%06x: 68000 request z80 Bus (word access) %04x %04x\n", space->device().safe_pc(),data,mem_mask);
737         //logerror("%06x: 68000 request z80 Bus (word access) %04x %04x\n", space.device().safe_pc(),data,mem_mask);
738738         genz80.z80_has_bus = 0;
739739      }
740740      else
741741      {
742         //logerror("%06x: 68000 return z80 Bus (byte LSB access) %04x %04x\n", space->device().safe_pc(),data,mem_mask);
742         //logerror("%06x: 68000 return z80 Bus (byte LSB access) %04x %04x\n", space.device().safe_pc(),data,mem_mask);
743743         genz80.z80_has_bus = 1;
744744      }
745745   }
746746
747747   /* If the z80 is running, sync the z80 execution state */
748748   if ( ! genz80.z80_is_reset )
749      space->machine().scheduler().timer_set( attotime::zero, FUNC(megadriv_z80_run_state ));
749      space.machine().scheduler().timer_set( attotime::zero, FUNC(megadriv_z80_run_state ));
750750}
751751
752752static WRITE16_HANDLER ( megadriv_68k_req_z80_reset )
r17963r17964
755755   {
756756      if (data & 0x0100)
757757      {
758         //logerror("%06x: 68000 clear z80 reset (byte MSB access) %04x %04x\n", space->device().safe_pc(),data,mem_mask);
758         //logerror("%06x: 68000 clear z80 reset (byte MSB access) %04x %04x\n", space.device().safe_pc(),data,mem_mask);
759759         genz80.z80_is_reset = 0;
760760      }
761761      else
762762      {
763         //logerror("%06x: 68000 start z80 reset (byte MSB access) %04x %04x\n", space->device().safe_pc(),data,mem_mask);
763         //logerror("%06x: 68000 start z80 reset (byte MSB access) %04x %04x\n", space.device().safe_pc(),data,mem_mask);
764764         genz80.z80_is_reset = 1;
765765      }
766766   }
r17963r17964
768768   {
769769      if (data & 0x0001)
770770      {
771         //logerror("%06x: 68000 clear z80 reset (byte LSB access) %04x %04x\n", space->device().safe_pc(),data,mem_mask);
771         //logerror("%06x: 68000 clear z80 reset (byte LSB access) %04x %04x\n", space.device().safe_pc(),data,mem_mask);
772772         genz80.z80_is_reset = 0;
773773      }
774774      else
775775      {
776         //logerror("%06x: 68000 start z80 reset (byte LSB access) %04x %04x\n", space->device().safe_pc(),data,mem_mask);
776         //logerror("%06x: 68000 start z80 reset (byte LSB access) %04x %04x\n", space.device().safe_pc(),data,mem_mask);
777777         genz80.z80_is_reset = 1;
778778      }
779779   }
r17963r17964
781781   {
782782      if (data & 0x0100)
783783      {
784         //logerror("%06x: 68000 clear z80 reset (word access) %04x %04x\n", space->device().safe_pc(),data,mem_mask);
784         //logerror("%06x: 68000 clear z80 reset (word access) %04x %04x\n", space.device().safe_pc(),data,mem_mask);
785785         genz80.z80_is_reset = 0;
786786      }
787787      else
788788      {
789         //logerror("%06x: 68000 start z80 reset (byte LSB access) %04x %04x\n", space->device().safe_pc(),data,mem_mask);
789         //logerror("%06x: 68000 start z80 reset (byte LSB access) %04x %04x\n", space.device().safe_pc(),data,mem_mask);
790790         genz80.z80_is_reset = 1;
791791      }
792792   }
793   space->machine().scheduler().timer_set( attotime::zero, FUNC(megadriv_z80_run_state ));
793   space.machine().scheduler().timer_set( attotime::zero, FUNC(megadriv_z80_run_state ));
794794}
795795
796796
r17963r17964
800800//   z80 area of the 68k if games misbehave
801801static READ8_HANDLER( z80_read_68k_banked_data )
802802{
803   address_space *space68k = space->machine().device<legacy_cpu_device>("maincpu")->space();
803   address_space *space68k = space.machine().device<legacy_cpu_device>("maincpu")->space();
804804   UINT8 ret = space68k->read_byte(genz80.z80_bank_addr+offset);
805805   return ret;
806806}
807807
808808static WRITE8_HANDLER( z80_write_68k_banked_data )
809809{
810   address_space *space68k = space->machine().device<legacy_cpu_device>("maincpu")->space();
810   address_space *space68k = space.machine().device<legacy_cpu_device>("maincpu")->space();
811811   space68k->write_byte(genz80.z80_bank_addr+offset,data);
812812}
813813
r17963r17964
820820      case 0x13:
821821      case 0x15:
822822      case 0x17:
823         sn76496_w(space->machine().device("snsnd"), *space, 0, data);
823         sn76496_w(space.machine().device("snsnd"), space, 0, data);
824824         break;
825825
826826      default:
r17963r17964
834834static READ8_HANDLER( megadriv_z80_vdp_read )
835835{
836836   mame_printf_debug("megadriv_z80_vdp_read %02x\n",offset);
837   return space->machine().rand();
837   return space.machine().rand();
838838}
839839
840840static READ8_HANDLER( megadriv_z80_unmapped_read )
trunk/src/mame/machine/taitosj.c
r17963r17964
3636
3737void taitosj_state::machine_reset()
3838{
39   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
39   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
4040   /* set the default ROM bank (many games only have one bank and */
4141   /* never write to the bank selector register) */
42   taitosj_bankswitch_w(*space, 0, 0);
42   taitosj_bankswitch_w(space, 0, 0);
4343
4444
4545   m_zaccept = 1;
trunk/src/mame/machine/mc8123.c
r17963r17964
377377
378378void mc8123_decrypt_rom(running_machine &machine, const char *cpu, const char *keyrgn, const char *bankname, int numbanks)
379379{
380   address_space *space = machine.device(cpu)->memory().space(AS_PROGRAM);
380   address_space &space = *machine.device(cpu)->memory().space(AS_PROGRAM);
381381   int fixed_length = numbanks == 1 ? 0xc000 : 0x8000;
382382   UINT8 *decrypted1 = auto_alloc_array(machine, UINT8, fixed_length);
383383   UINT8 *decrypted2 = numbanks > 1 ? auto_alloc_array(machine, UINT8, 0x4000 * numbanks) : 0;
r17963r17964
385385   UINT8 *key = machine.root_device().memregion(keyrgn)->base();
386386   int A, bank;
387387
388   space->set_decrypted_region(0x0000, fixed_length-1, decrypted1);
388   space.set_decrypted_region(0x0000, fixed_length-1, decrypted1);
389389
390390   for (A = 0x0000;A < fixed_length;A++)
391391   {
trunk/src/mame/machine/amiga.c
r17963r17964
261261static void amiga_m68k_reset(device_t *device)
262262{
263263   amiga_state *state = device->machine().driver_data<amiga_state>();
264   address_space *space = device->memory().space(AS_PROGRAM);
264   address_space &space = *device->memory().space(AS_PROGRAM);
265265
266   logerror("Executed RESET at PC=%06x\n", space->device().safe_pc());
266   logerror("Executed RESET at PC=%06x\n", space.device().safe_pc());
267267
268268   /* Initialize the various chips */
269269   device->machine().device("cia_0")->reset();
r17963r17964
274274   /* set the overlay bit */
275275   if ( IS_AGA(state->m_intf) )
276276   {
277      space->write_byte( 0xbfa001, 1 );
277      space.write_byte( 0xbfa001, 1 );
278278   }
279279   else
280280   {
r17963r17964
318318   if (scanline == 0)
319319   {
320320      /* signal VBLANK IRQ */
321      amiga_custom_w(machine.device("maincpu")->memory().space(AS_PROGRAM), REG_INTREQ, 0x8000 | INTENA_VERTB, 0xffff);
321      amiga_custom_w(*machine.device("maincpu")->memory().space(AS_PROGRAM), REG_INTREQ, 0x8000 | INTENA_VERTB, 0xffff);
322322
323323      /* clock the first CIA TOD */
324324      mos6526_tod_w(cia_0, 1);
r17963r17964
939939   CUSTOM_REG(REG_DMACON) &= ~0x4000;
940940
941941   /* signal an interrupt */
942   amiga_custom_w(machine.device("maincpu")->memory().space(AS_PROGRAM), REG_INTREQ, 0x8000 | INTENA_BLIT, 0xffff);
942   amiga_custom_w(*machine.device("maincpu")->memory().space(AS_PROGRAM), REG_INTREQ, 0x8000 | INTENA_BLIT, 0xffff);
943943
944944   /* reset the blitter timer */
945945   state->m_blitter_timer->reset( );
r17963r17964
953953 *
954954 *************************************/
955955
956static void blitter_setup(address_space *space)
956static void blitter_setup(address_space &space)
957957{
958   amiga_state *state = space->machine().driver_data<amiga_state>();
958   amiga_state *state = space.machine().driver_data<amiga_state>();
959959   int ticks, width, height, blittime;
960960
961961   /* is there another blitting in progress? */
962962   if (CUSTOM_REG(REG_DMACON) & 0x4000)
963963   {
964      logerror("%s - This program is playing tricks with the blitter\n", space->machine().describe_context() );
964      logerror("%s - This program is playing tricks with the blitter\n", space.machine().describe_context() );
965965      return;
966966   }
967967
r17963r17964
994994   if ( CUSTOM_REG(REG_DMACON) & 0x0400 )
995995   {
996996      /* simulate the 68k not running while the blit is going */
997      space->device().execute().adjust_icount(-(blittime/2) );
997      space.device().execute().adjust_icount(-(blittime/2) );
998998
999999      blittime = BLITTER_NASTY_DELAY;
10001000   }
r17963r17964
10071007   CUSTOM_REG(REG_DMACON) |= 0x4000;
10081008
10091009   /* set a timer */
1010   state->m_blitter_timer->adjust( downcast<cpu_device *>(&space->device())->cycles_to_attotime( blittime ));
1010   state->m_blitter_timer->adjust( downcast<cpu_device *>(&space.device())->cycles_to_attotime( blittime ));
10111011}
10121012
10131013
r17963r17964
10271027   /* offsets 0000-07ff reference CIA B, and are accessed via the MSB */
10281028   if ((offset & 0x0800) == 0)
10291029   {
1030      cia = space->machine().device("cia_1");
1030      cia = space.machine().device("cia_1");
10311031      shift = 8;
10321032   }
10331033
10341034   /* offsets 0800-0fff reference CIA A, and are accessed via the LSB */
10351035   else
10361036   {
1037      cia = space->machine().device("cia_0");
1037      cia = space.machine().device("cia_0");
10381038      shift = 0;
10391039   }
10401040
10411041   /* handle the reads */
1042   data = mos6526_r(cia, *space, offset >> 7);
1042   data = mos6526_r(cia, space, offset >> 7);
10431043
10441044   if (LOG_CIA)
1045      logerror("%06x:cia_%c_read(%03x) = %04x & %04x\n", space->device().safe_pc(), 'A' + ((~offset & 0x0800) >> 11), offset * 2, data << shift, mem_mask);
1045      logerror("%06x:cia_%c_read(%03x) = %04x & %04x\n", space.device().safe_pc(), 'A' + ((~offset & 0x0800) >> 11), offset * 2, data << shift, mem_mask);
10461046
10471047   return data << shift;
10481048}
r17963r17964
10601060   device_t *cia;
10611061
10621062   if (LOG_CIA)
1063      logerror("%06x:cia_%c_write(%03x) = %04x & %04x\n", space->device().safe_pc(), 'A' + ((~offset & 0x0800) >> 11), offset * 2, data, mem_mask);
1063      logerror("%06x:cia_%c_write(%03x) = %04x & %04x\n", space.device().safe_pc(), 'A' + ((~offset & 0x0800) >> 11), offset * 2, data, mem_mask);
10641064
10651065   /* offsets 0000-07ff reference CIA B, and are accessed via the MSB */
10661066   if ((offset & 0x0800) == 0)
10671067   {
10681068      if (!ACCESSING_BITS_8_15)
10691069         return;
1070      cia = space->machine().device("cia_1");
1070      cia = space.machine().device("cia_1");
10711071      data >>= 8;
10721072   }
10731073
r17963r17964
10761076   {
10771077      if (!ACCESSING_BITS_0_7)
10781078         return;
1079      cia = space->machine().device("cia_0");
1079      cia = space.machine().device("cia_0");
10801080      data &= 0xff;
10811081   }
10821082
10831083   /* handle the writes */
1084   mos6526_w(cia, *space, offset >> 7, (UINT8) data);
1084   mos6526_w(cia, space, offset >> 7, (UINT8) data);
10851085}
10861086
10871087
r17963r17964
10941094
10951095void amiga_cia_0_irq(device_t *device, int state)
10961096{
1097   amiga_custom_w(device->machine().device("maincpu")->memory().space(AS_PROGRAM), REG_INTREQ, (state ? 0x8000 : 0x0000) | INTENA_PORTS, 0xffff);
1097   amiga_custom_w(*device->machine().device("maincpu")->memory().space(AS_PROGRAM), REG_INTREQ, (state ? 0x8000 : 0x0000) | INTENA_PORTS, 0xffff);
10981098}
10991099
11001100
11011101void amiga_cia_1_irq(device_t *device, int state)
11021102{
1103   amiga_custom_w(device->machine().device("maincpu")->memory().space(AS_PROGRAM), REG_INTREQ, (state ? 0x8000 : 0x0000) | INTENA_EXTER, 0xffff);
1103   amiga_custom_w(*device->machine().device("maincpu")->memory().space(AS_PROGRAM), REG_INTREQ, (state ? 0x8000 : 0x0000) | INTENA_EXTER, 0xffff);
11041104}
11051105
11061106
r17963r17964
11521152
11531153READ16_HANDLER( amiga_custom_r )
11541154{
1155   amiga_state *state = space->machine().driver_data<amiga_state>();
1155   amiga_state *state = space.machine().driver_data<amiga_state>();
11561156   UINT16 temp;
11571157
11581158   switch (offset & 0xff)
r17963r17964
11651165
11661166      case REG_VPOSR:
11671167         CUSTOM_REG(REG_VPOSR) &= 0xff00;
1168         CUSTOM_REG(REG_VPOSR) |= amiga_gethvpos(*space->machine().primary_screen) >> 16;
1168         CUSTOM_REG(REG_VPOSR) |= amiga_gethvpos(*space.machine().primary_screen) >> 16;
11691169         return CUSTOM_REG(REG_VPOSR);
11701170
11711171      case REG_VHPOSR:
1172         return amiga_gethvpos(*space->machine().primary_screen) & 0xffff;
1172         return amiga_gethvpos(*space.machine().primary_screen) & 0xffff;
11731173
11741174      case REG_SERDATR:
11751175         CUSTOM_REG(REG_SERDATR) &= ~0x4000;
r17963r17964
11781178
11791179      case REG_JOY0DAT:
11801180         if (state->m_intf->joy0dat_r != NULL)
1181            return (*state->m_intf->joy0dat_r)(space->machine());
1181            return (*state->m_intf->joy0dat_r)(space.machine());
11821182         return state->ioport("JOY0DAT")->read_safe(0xffff);
11831183
11841184      case REG_JOY1DAT:
11851185         if (state->m_intf->joy1dat_r != NULL)
1186            return (*state->m_intf->joy1dat_r)(space->machine());
1186            return (*state->m_intf->joy1dat_r)(space.machine());
11871187         return state->ioport("JOY1DAT")->read_safe(0xffff);
11881188
11891189      case REG_POTGOR:
r17963r17964
11961196         return state->ioport("POT1DAT")->read_safe(0x0000);
11971197
11981198      case REG_DSKBYTR:
1199         return space->machine().device<amiga_fdc>("fdc")->dskbytr_r();
1199         return space.machine().device<amiga_fdc>("fdc")->dskbytr_r();
12001200
12011201      case REG_INTENAR:
12021202         return CUSTOM_REG(REG_INTENA);
r17963r17964
12051205         return CUSTOM_REG(REG_INTREQ);
12061206
12071207      case REG_COPJMP1:
1208         amiga_copper_setpc(space->machine(), CUSTOM_REG_LONG(REG_COP1LCH));
1208         amiga_copper_setpc(space.machine(), CUSTOM_REG_LONG(REG_COP1LCH));
12091209         break;
12101210
12111211      case REG_COPJMP2:
1212         amiga_copper_setpc(space->machine(), CUSTOM_REG_LONG(REG_COP2LCH));
1212         amiga_copper_setpc(space.machine(), CUSTOM_REG_LONG(REG_COP2LCH));
12131213         break;
12141214
12151215      case REG_CLXDAT:
r17963r17964
12211221         return CUSTOM_REG(REG_DENISEID);
12221222
12231223      case REG_DSKPTH:
1224         return space->machine().device<amiga_fdc>("fdc")->dskpth_r();
1224         return space.machine().device<amiga_fdc>("fdc")->dskpth_r();
12251225
12261226      case REG_DSKPTL:
1227         return space->machine().device<amiga_fdc>("fdc")->dskptl_r();
1227         return space.machine().device<amiga_fdc>("fdc")->dskptl_r();
12281228   }
12291229
12301230   if (LOG_CUSTOM)
1231      logerror("%06X:read from custom %s\n", space->device().safe_pc(), amiga_custom_names[offset & 0xff]);
1231      logerror("%06X:read from custom %s\n", space.device().safe_pc(), amiga_custom_names[offset & 0xff]);
12321232
12331233   return 0xffff;
12341234}
r17963r17964
12491249   CUSTOM_REG(REG_SERDATR) |= 0x3000;
12501250
12511251   /* signal an interrupt */
1252   amiga_custom_w(machine.device("maincpu")->memory().space(AS_PROGRAM), REG_INTREQ, 0x8000 | INTENA_TBE, 0xffff);
1252   amiga_custom_w(*machine.device("maincpu")->memory().space(AS_PROGRAM), REG_INTREQ, 0x8000 | INTENA_TBE, 0xffff);
12531253}
12541254
12551255
12561256WRITE16_HANDLER( amiga_custom_w )
12571257{
1258   amiga_state *state = space->machine().driver_data<amiga_state>();
1258   amiga_state *state = space.machine().driver_data<amiga_state>();
12591259   device_t *cia_0;
12601260   device_t *cia_1;
12611261   UINT16 temp;
12621262   offset &= 0xff;
12631263
12641264   if (LOG_CUSTOM)
1265      logerror("%06X:write to custom %s = %04X\n", space->device().safe_pc(), amiga_custom_names[offset & 0xff], data);
1265      logerror("%06X:write to custom %s = %04X\n", space.device().safe_pc(), amiga_custom_names[offset & 0xff], data);
12661266
12671267   switch (offset)
12681268   {
r17963r17964
12741274         break;
12751275
12761276      case REG_DSKSYNC:
1277         space->machine().device<amiga_fdc>("fdc")->dsksync_w(data);
1277         space.machine().device<amiga_fdc>("fdc")->dsksync_w(data);
12781278         break;
12791279
12801280      case REG_DSKPTH:
1281         space->machine().device<amiga_fdc>("fdc")->dskpth_w(data);
1281         space.machine().device<amiga_fdc>("fdc")->dskpth_w(data);
12821282         break;
12831283
12841284      case REG_DSKPTL:
1285         space->machine().device<amiga_fdc>("fdc")->dskptl_w(data);
1285         space.machine().device<amiga_fdc>("fdc")->dskptl_w(data);
12861286         break;
12871287
12881288      case REG_DSKLEN:
1289         space->machine().device<amiga_fdc>("fdc")->dsklen_w(data);
1289         space.machine().device<amiga_fdc>("fdc")->dsklen_w(data);
12901290         break;
12911291
12921292      case REG_POTGO:
12931293         if (state->m_intf->potgo_w != NULL)
1294            (*state->m_intf->potgo_w)(space->machine(), data);
1294            (*state->m_intf->potgo_w)(space.machine(), data);
12951295         break;
12961296
12971297      case REG_SERDAT:
12981298         if (state->m_intf->serdat_w != NULL)
1299            (*state->m_intf->serdat_w)(space->machine(), data);
1299            (*state->m_intf->serdat_w)(space.machine(), data);
13001300         CUSTOM_REG(REG_SERDATR) &= ~0x3000;
1301         space->machine().scheduler().timer_set(amiga_get_serial_char_period(space->machine()), FUNC(finish_serial_write));
1301         space.machine().scheduler().timer_set(amiga_get_serial_char_period(space.machine()), FUNC(finish_serial_write));
13021302         break;
13031303
13041304      case REG_BLTSIZE:
r17963r17964
13421342
13431343      case REG_SPR0PTL:   case REG_SPR1PTL:   case REG_SPR2PTL:   case REG_SPR3PTL:
13441344      case REG_SPR4PTL:   case REG_SPR5PTL:   case REG_SPR6PTL:   case REG_SPR7PTL:
1345         amiga_sprite_dma_reset(space->machine(), (offset - REG_SPR0PTL) / 2);
1345         amiga_sprite_dma_reset(space.machine(), (offset - REG_SPR0PTL) / 2);
13461346         break;
13471347
13481348      case REG_SPR0CTL:   case REG_SPR1CTL:   case REG_SPR2CTL:   case REG_SPR3CTL:
13491349      case REG_SPR4CTL:   case REG_SPR5CTL:   case REG_SPR6CTL:   case REG_SPR7CTL:
13501350         /* disable comparitor on writes here */
1351         amiga_sprite_enable_comparitor(space->machine(), (offset - REG_SPR0CTL) / 4, FALSE);
1351         amiga_sprite_enable_comparitor(space.machine(), (offset - REG_SPR0CTL) / 4, FALSE);
13521352         break;
13531353
13541354      case REG_SPR0DATA:   case REG_SPR1DATA:   case REG_SPR2DATA:   case REG_SPR3DATA:
13551355      case REG_SPR4DATA:   case REG_SPR5DATA:   case REG_SPR6DATA:   case REG_SPR7DATA:
13561356         /* enable comparitor on writes here */
1357         amiga_sprite_enable_comparitor(space->machine(), (offset - REG_SPR0DATA) / 4, TRUE);
1357         amiga_sprite_enable_comparitor(space.machine(), (offset - REG_SPR0DATA) / 4, TRUE);
13581358         break;
13591359
13601360      case REG_COP1LCH:   case REG_COP2LCH:
r17963r17964
13621362         break;
13631363
13641364      case REG_COPJMP1:
1365         amiga_copper_setpc(space->machine(), CUSTOM_REG_LONG(REG_COP1LCH));
1365         amiga_copper_setpc(space.machine(), CUSTOM_REG_LONG(REG_COP1LCH));
13661366         break;
13671367
13681368      case REG_COPJMP2:
1369         amiga_copper_setpc(space->machine(), CUSTOM_REG_LONG(REG_COP2LCH));
1369         amiga_copper_setpc(space.machine(), CUSTOM_REG_LONG(REG_COP2LCH));
13701370         break;
13711371
13721372      case REG_DDFSTRT:
r17963r17964
13891389         /* bits BBUSY (14) and BZERO (13) are read-only */
13901390         data &= 0x9fff;
13911391         data = (data & 0x8000) ? (CUSTOM_REG(offset) | (data & 0x7fff)) : (CUSTOM_REG(offset) & ~(data & 0x7fff));
1392         space->machine().device<amiga_fdc>("fdc")->dmacon_set(data);
1392         space.machine().device<amiga_fdc>("fdc")->dmacon_set(data);
13931393
13941394         /* if 'blitter-nasty' has been turned on and we have a blit pending, reschedule it */
13951395         if ( ( data & 0x400 ) && ( CUSTOM_REG(REG_DMACON) & 0x4000 ) )
1396            state->m_blitter_timer->adjust( downcast<cpu_device *>(&space->device())->cycles_to_attotime( BLITTER_NASTY_DELAY ));
1396            state->m_blitter_timer->adjust( downcast<cpu_device *>(&space.device())->cycles_to_attotime( BLITTER_NASTY_DELAY ));
13971397
13981398         break;
13991399
r17963r17964
14041404         CUSTOM_REG(offset) = data;
14051405
14061406         if ( temp & 0x8000  ) /* if we're enabling irq's, delay a bit */
1407            state->m_irq_timer->adjust( downcast<cpu_device *>(&space->device())->cycles_to_attotime( AMIGA_IRQ_DELAY_CYCLES ));
1407            state->m_irq_timer->adjust( downcast<cpu_device *>(&space.device())->cycles_to_attotime( AMIGA_IRQ_DELAY_CYCLES ));
14081408         else /* if we're disabling irq's, process right away */
1409            update_irqs(space->machine());
1409            update_irqs(space.machine());
14101410         break;
14111411
14121412      case REG_INTREQ:
r17963r17964
14161416            CUSTOM_REG(REG_SERDATR) &= ~0x8000;
14171417
14181418         data = (data & 0x8000) ? (CUSTOM_REG(offset) | (data & 0x7fff)) : (CUSTOM_REG(offset) & ~(data & 0x7fff));
1419         cia_0 = space->machine().device("cia_0");
1420         cia_1 = space->machine().device("cia_1");
1419         cia_0 = space.machine().device("cia_0");
1420         cia_1 = space.machine().device("cia_1");
14211421         if ( mos6526_irq_r( cia_0 ) ) data |= INTENA_PORTS;
14221422         if ( mos6526_irq_r( cia_1 ) ) data |= INTENA_EXTER;
14231423         CUSTOM_REG(offset) = data;
14241424
14251425         if ( temp & 0x8000  ) /* if we're generating irq's, delay a bit */
1426            state->m_irq_timer->adjust( space->machine().device<cpu_device>("maincpu")->cycles_to_attotime( AMIGA_IRQ_DELAY_CYCLES ));
1426            state->m_irq_timer->adjust( space.machine().device<cpu_device>("maincpu")->cycles_to_attotime( AMIGA_IRQ_DELAY_CYCLES ));
14271427         else /* if we're clearing irq's, process right away */
1428            update_irqs(space->machine());
1428            update_irqs(space.machine());
14291429         break;
14301430
14311431      case REG_ADKCON:
14321432         amiga_audio_update(state->m_sound_device);
14331433         data = (data & 0x8000) ? (CUSTOM_REG(offset) | (data & 0x7fff)) : (CUSTOM_REG(offset) & ~(data & 0x7fff));
1434         space->machine().device<amiga_fdc>("fdc")->adkcon_set(data);
1434         space.machine().device<amiga_fdc>("fdc")->adkcon_set(data);
14351435         break;
14361436
14371437      case REG_AUD0LCL:   case REG_AUD0LCH:   case REG_AUD0LEN:   case REG_AUD0PER:   case REG_AUD0VOL:
r17963r17964
14691469      case REG_COLOR28:   case REG_COLOR29:   case REG_COLOR30:   case REG_COLOR31:
14701470         if (IS_AGA(state->m_intf))
14711471         {
1472            amiga_aga_palette_write(space->machine(), offset - REG_COLOR00, data);
1472            amiga_aga_palette_write(space.machine(), offset - REG_COLOR00, data);
14731473         }
14741474         else
14751475         {
r17963r17964
14801480      case REG_DIWSTRT:
14811481      case REG_DIWSTOP:
14821482         if (IS_AGA(state->m_intf))
1483            amiga_aga_diwhigh_written(space->machine(), 0);
1483            amiga_aga_diwhigh_written(space.machine(), 0);
14841484         break;
14851485      case REG_DIWHIGH:
14861486         if (IS_AGA(state->m_intf))
1487            amiga_aga_diwhigh_written(space->machine(), 1);
1487            amiga_aga_diwhigh_written(space.machine(), 1);
14881488         break;
14891489
14901490      default:
r17963r17964
15091509void amiga_serial_in_w(running_machine &machine, UINT16 data)
15101510{
15111511   amiga_state *state = machine.driver_data<amiga_state>();
1512   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1512   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
15131513   int mask = (CUSTOM_REG(REG_SERPER) & 0x8000) ? 0x1ff : 0xff;
15141514
15151515   /* copy the data to the low 8 bits of SERDATR and set RBF */
r17963r17964
16001600
16011601READ16_HANDLER( amiga_autoconfig_r )
16021602{
1603   amiga_state *state = space->machine().driver_data<amiga_state>();
1603   amiga_state *state = space.machine().driver_data<amiga_state>();
16041604   autoconfig_device *cur_autoconfig = state->m_cur_autoconfig;
16051605   UINT8 byte;
16061606   int i;
r17963r17964
17161716      case 0x40/4:
17171717         byte = 0x00;
17181718         if (cur_autoconfig->device.int_control_r)
1719            byte = (*cur_autoconfig->device.int_control_r)(space->machine());
1719            byte = (*cur_autoconfig->device.int_control_r)(space.machine());
17201720         break;
17211721
17221722      default:
r17963r17964
17391739
17401740WRITE16_HANDLER( amiga_autoconfig_w )
17411741{
1742   amiga_state *state = space->machine().driver_data<amiga_state>();
1742   amiga_state *state = space.machine().driver_data<amiga_state>();
17431743   autoconfig_device *cur_autoconfig = state->m_cur_autoconfig;
17441744   int move_to_next = FALSE;
17451745
r17963r17964
17771777   {
17781778      logerror("Install to %06X\n", cur_autoconfig->base);
17791779      if (cur_autoconfig->base && cur_autoconfig->device.install)
1780         (*cur_autoconfig->device.install)(space->machine(), cur_autoconfig->base);
1780         (*cur_autoconfig->device.install)(space.machine(), cur_autoconfig->base);
17811781      state->m_cur_autoconfig = cur_autoconfig->next;
17821782   }
17831783}
trunk/src/mame/machine/neoprot.c
r17963r17964
2424
2525static READ16_HANDLER( fatfury2_protection_16_r )
2626{
27   neogeo_state *state = space->machine().driver_data<neogeo_state>();
27   neogeo_state *state = space.machine().driver_data<neogeo_state>();
2828   UINT16 res = state->m_fatfury2_prot_data >> 24;
2929
3030   switch (offset)
r17963r17964
4242         return ((res & 0xf0) >> 4) | ((res & 0x0f) << 4);
4343
4444      default:
45         logerror("unknown protection read at pc %06x, offset %08x\n", space->device().safe_pc(), offset << 1);
45         logerror("unknown protection read at pc %06x, offset %08x\n", space.device().safe_pc(), offset << 1);
4646         return 0;
4747   }
4848}
r17963r17964
5050
5151static WRITE16_HANDLER( fatfury2_protection_16_w )
5252{
53   neogeo_state *state = space->machine().driver_data<neogeo_state>();
53   neogeo_state *state = space.machine().driver_data<neogeo_state>();
5454
5555   switch (offset)
5656   {
r17963r17964
8989         break;
9090
9191      default:
92         logerror("unknown protection write at pc %06x, offset %08x, data %02x\n", space->device().safe_pc(), offset, data);
92         logerror("unknown protection write at pc %06x, offset %08x, data %02x\n", space.device().safe_pc(), offset, data);
9393         break;
9494   }
9595}
r17963r17964
119119static WRITE16_HANDLER ( kof98_prot_w )
120120{
121121   /* info from razoola */
122   UINT16* mem16 = (UINT16*)space->machine().root_device().memregion("maincpu")->base();
122   UINT16* mem16 = (UINT16*)space.machine().root_device().memregion("maincpu")->base();
123123
124124   switch (data)
125125   {
126126   case 0x0090:
127      logerror ("%06x kof98 - protection 0x0090 old %04x %04x\n", space->device().safe_pc(), mem16[0x100/2], mem16[0x102/2]);
127      logerror ("%06x kof98 - protection 0x0090 old %04x %04x\n", space.device().safe_pc(), mem16[0x100/2], mem16[0x102/2]);
128128      mem16[0x100/2] = 0x00c2;
129129      mem16[0x102/2] = 0x00fd;
130130      break;
131131
132132   case 0x00f0:
133      logerror ("%06x kof98 - protection 0x00f0 old %04x %04x\n", space->device().safe_pc(), mem16[0x100/2], mem16[0x102/2]);
133      logerror ("%06x kof98 - protection 0x00f0 old %04x %04x\n", space.device().safe_pc(), mem16[0x100/2], mem16[0x102/2]);
134134      mem16[0x100/2] = 0x4e45;
135135      mem16[0x102/2] = 0x4f2d;
136136      break;
137137
138138   default: // 00aa is written, but not needed?
139      logerror ("%06x kof98 - unknown protection write %04x\n", space->device().safe_pc(), data);
139      logerror ("%06x kof98 - unknown protection write %04x\n", space.device().safe_pc(), data);
140140      break;
141141   }
142142}
r17963r17964
375375
376376static READ16_HANDLER( sma_random_r )
377377{
378   neogeo_state *state = space->machine().driver_data<neogeo_state>();
378   neogeo_state *state = space.machine().driver_data<neogeo_state>();
379379   UINT16 old = state->m_neogeo_rng;
380380
381381   UINT16 newbit = ((state->m_neogeo_rng >> 2) ^
r17963r17964
500500}
501501
502502
503static void pvc_write_bankswitch( address_space *space )
503static void pvc_write_bankswitch( address_space &space )
504504{
505   neogeo_state *state = space->machine().driver_data<neogeo_state>();
505   neogeo_state *state = space.machine().driver_data<neogeo_state>();
506506   UINT32 bankaddress;
507507
508508   bankaddress = ((state->m_pvc_cartridge_ram[0xff8] >> 8)|(state->m_pvc_cartridge_ram[0xff9] << 8));
r17963r17964
515515
516516static READ16_HANDLER( pvc_prot_r )
517517{
518   neogeo_state *state = space->machine().driver_data<neogeo_state>();
518   neogeo_state *state = space.machine().driver_data<neogeo_state>();
519519   return state->m_pvc_cartridge_ram[offset];
520520}
521521
522522
523523static WRITE16_HANDLER( pvc_prot_w )
524524{
525   neogeo_state *state = space->machine().driver_data<neogeo_state>();
525   neogeo_state *state = space.machine().driver_data<neogeo_state>();
526526
527527   COMBINE_DATA(&state->m_pvc_cartridge_ram[offset] );
528528   if (offset == 0xff0)
529      pvc_prot1(space->machine());
529      pvc_prot1(space.machine());
530530   else if(offset >= 0xff4 && offset <= 0xff5)
531      pvc_prot2(space->machine());
531      pvc_prot2(space.machine());
532532   else if(offset >= 0xff8)
533533      pvc_write_bankswitch(space);
534534}
trunk/src/mame/machine/midwunit.c
r17963r17964
360360
361361READ16_MEMBER(midwunit_state::midwunit_security_r)
362362{
363   return midway_serial_pic_r(&space);
363   return midway_serial_pic_r(space);
364364}
365365
366366
367367WRITE16_MEMBER(midwunit_state::midwunit_security_w)
368368{
369369   if (offset == 0 && ACCESSING_BITS_0_7)
370      midway_serial_pic_w(&space, data);
370      midway_serial_pic_w(space, data);
371371}
372372
373373
trunk/src/mame/machine/namco50.c
r17963r17964
170170
171171static READ8_HANDLER( namco_50xx_K_r )
172172{
173   namco_50xx_state *state = get_safe_token(space->device().owner());
173   namco_50xx_state *state = get_safe_token(space.device().owner());
174174   return state->m_latched_cmd >> 4;
175175}
176176
177177static READ8_HANDLER( namco_50xx_R0_r )
178178{
179   namco_50xx_state *state = get_safe_token(space->device().owner());
179   namco_50xx_state *state = get_safe_token(space.device().owner());
180180   return state->m_latched_cmd & 0x0f;
181181}
182182
183183static READ8_HANDLER( namco_50xx_R2_r )
184184{
185   namco_50xx_state *state = get_safe_token(space->device().owner());
185   namco_50xx_state *state = get_safe_token(space.device().owner());
186186   return state->m_latched_rw & 1;
187187}
188188
r17963r17964
190190
191191static WRITE8_HANDLER( namco_50xx_O_w )
192192{
193   namco_50xx_state *state = get_safe_token(space->device().owner());
193   namco_50xx_state *state = get_safe_token(space.device().owner());
194194   UINT8 out = (data & 0x0f);
195195   if (data & 0x10)
196196      state->m_portO = (state->m_portO & 0x0f) | (out << 4);
trunk/src/mame/machine/namcos2.c
r17963r17964
113113
114114MACHINE_RESET_MEMBER(namcos2_shared_state,namcos2)
115115{
116   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
116   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
117117   mFinalLapProtCount = 0;
118118   namcos2_mcu_analog_ctrl = 0;
119119   namcos2_mcu_analog_data = 0xaa;
r17963r17964
154154/* 68000 Shared memory area - Data ROM area                  */
155155/*************************************************************/
156156READ16_HANDLER( namcos2_68k_data_rom_r ){
157   UINT16 *ROM = (UINT16 *)space->machine().root_device().memregion("user1")->base();
157   UINT16 *ROM = (UINT16 *)space.machine().root_device().memregion("user1")->base();
158158   return ROM[offset];
159159}
160160
r17963r17964
229229
230230READ16_HANDLER( namcos2_68k_key_r )
231231{
232   switch (space->machine().driver_data<namcos2_shared_state>()->m_gametype)
232   switch (space.machine().driver_data<namcos2_shared_state>()->m_gametype)
233233   {
234234   case NAMCOS2_ORDYNE:
235235      switch(offset)
r17963r17964
340340      {
341341   //  case 3: return 0x142;
342342      case 4: return 0x142;
343   //  case 3: popmessage("blah %08x",space->device().safe_pc());
344      default: return space->machine().rand();
343   //  case 3: popmessage("blah %08x",space.device().safe_pc());
344      default: return space.machine().rand();
345345      }
346346      break;
347347
r17963r17964
398398
399399
400400
401   return space->machine().rand()&0xffff;
401   return space.machine().rand()&0xffff;
402402}
403403
404404WRITE16_HANDLER( namcos2_68k_key_w )
405405{
406   int gametype = space->machine().driver_data<namcos2_shared_state>()->m_gametype;
406   int gametype = space.machine().driver_data<namcos2_shared_state>()->m_gametype;
407407   if( gametype == NAMCOS2_MARVEL_LAND && offset == 5 )
408408   {
409409      if (data == 0x615E) sendval = 1;
r17963r17964
464464}
465465
466466static UINT16
467ReadWriteC148( address_space *space, offs_t offset, UINT16 data, int bWrite )
467ReadWriteC148( address_space &space, offs_t offset, UINT16 data, int bWrite )
468468{
469469   offs_t addr = ((offset * 2) + 0x1c0000) & 0x1fe000;
470470   device_t *altcpu = NULL;
r17963r17964
472472   UINT16 *pC148RegAlt = NULL;
473473   UINT16 result = 0;
474474
475   if (&space->device() == space->machine().device("maincpu"))
475   if (&space.device() == space.machine().device("maincpu"))
476476   {
477477      pC148Reg = namcos2_68k_master_C148;
478      altcpu = space->machine().device("slave");
478      altcpu = space.machine().device("slave");
479479      pC148RegAlt = namcos2_68k_slave_C148;
480480   }
481   else if (&space->device() == space->machine().device("slave"))
481   else if (&space.device() == space.machine().device("slave"))
482482   {
483483      pC148Reg = namcos2_68k_slave_C148;
484      altcpu = space->machine().device("maincpu");
484      altcpu = space.machine().device("maincpu");
485485      pC148RegAlt = namcos2_68k_master_C148;
486486   }
487   else if (&space->device() == space->machine().device("gpu"))
487   else if (&space.device() == space.machine().device("gpu"))
488488   {
489489      pC148Reg = namcos2_68k_gpu_C148;
490      altcpu = space->machine().device("maincpu");
490      altcpu = space.machine().device("maincpu");
491491      pC148RegAlt = namcos2_68k_master_C148;
492492   }
493493
r17963r17964
498498      // If writing an IRQ priority register, clear any pending IRQs.
499499      // Dirt Fox and Winning Run require this behaviour
500500      if (reg < 8)
501         space->device().execute().set_input_line(pC148Reg[reg], CLEAR_LINE);
501         space.device().execute().set_input_line(pC148Reg[reg], CLEAR_LINE);
502502
503503      pC148Reg[reg] = data & 0x0007;
504504   }
r17963r17964
541541   /* IRQ ack */
542542   case 0x1d6000: /* NAMCOS2_C148_CPUIRQ */
543543      // if( bWrite ) mame_printf_debug( "cpu(%d) RAM[0x%06x] = 0x%x\n", cpu, addr, data );
544      space->device().execute().set_input_line(pC148Reg[NAMCOS2_C148_CPUIRQ], CLEAR_LINE);
544      space.device().execute().set_input_line(pC148Reg[NAMCOS2_C148_CPUIRQ], CLEAR_LINE);
545545      break;
546546
547547   case 0x1d8000: /* NAMCOS2_C148_EXIRQ */
548548      // if( bWrite ) mame_printf_debug( "cpu(%d) RAM[0x%06x] = 0x%x\n", cpu, addr, data );
549      space->device().execute().set_input_line(pC148Reg[NAMCOS2_C148_EXIRQ], CLEAR_LINE);
549      space.device().execute().set_input_line(pC148Reg[NAMCOS2_C148_EXIRQ], CLEAR_LINE);
550550      break;
551551
552552   case 0x1da000: /* NAMCOS2_C148_POSIRQ */
553553      // if( bWrite ) mame_printf_debug( "cpu(%d) RAM[0x%06x] = 0x%x\n", cpu, addr, data );
554      space->device().execute().set_input_line(pC148Reg[NAMCOS2_C148_POSIRQ], CLEAR_LINE);
554      space.device().execute().set_input_line(pC148Reg[NAMCOS2_C148_POSIRQ], CLEAR_LINE);
555555      break;
556556
557557   case 0x1dc000: /* NAMCOS2_C148_SERIRQ */
558558      // if( bWrite ) mame_printf_debug( "cpu(%d) RAM[0x%06x] = 0x%x\n", cpu, addr, data );
559      space->device().execute().set_input_line(pC148Reg[NAMCOS2_C148_SERIRQ], CLEAR_LINE);
559      space.device().execute().set_input_line(pC148Reg[NAMCOS2_C148_SERIRQ], CLEAR_LINE);
560560      break;
561561
562562   case 0x1de000: /* NAMCOS2_C148_VBLANKIRQ */
563      space->device().execute().set_input_line(pC148Reg[NAMCOS2_C148_VBLANKIRQ], CLEAR_LINE);
563      space.device().execute().set_input_line(pC148Reg[NAMCOS2_C148_VBLANKIRQ], CLEAR_LINE);
564564      break;
565565
566566
r17963r17964
569569      break;
570570
571571   case 0x1e2000: /* Sound CPU Reset control */
572      if (&space->device() == space->machine().device("maincpu")) /* ? */
572      if (&space.device() == space.machine().device("maincpu")) /* ? */
573573      {
574574         if (data & 0x01)
575575         {
576576            /* Resume execution */
577            space->machine().device("audiocpu")->execute().set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
578            space->device().execute().yield();
577            space.machine().device("audiocpu")->execute().set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
578            space.device().execute().yield();
579579         }
580580         else
581581         {
582582            /* Suspend execution */
583            space->machine().device("audiocpu")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
583            space.machine().device("audiocpu")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
584584         }
585585         if (namcos2_kickstart != NULL)
586586         {
587587            //printf( "dspkick=0x%x\n", data );
588588            if (data & 0x04)
589589            {
590               (*namcos2_kickstart)(space->machine(), 1);
590               (*namcos2_kickstart)(space.machine(), 1);
591591            }
592592         }
593593      }
594594      break;
595595
596596   case 0x1e4000: /* Alt 68000 & IO CPU Reset */
597      if (&space->device() == space->machine().device("maincpu")) /* ? */
597      if (&space.device() == space.machine().device("maincpu")) /* ? */
598598      {
599599         if (data & 0x01)
600600         { /* Resume execution */
601            ResetAllSubCPUs(space->machine(), CLEAR_LINE);
601            ResetAllSubCPUs(space.machine(), CLEAR_LINE);
602602            /* Give the new CPU an immediate slice of the action */
603            space->device().execute().yield();
603            space.device().execute().yield();
604604         }
605605         else
606606         { /* Suspend execution */
607            ResetAllSubCPUs(space->machine(), ASSERT_LINE);
607            ResetAllSubCPUs(space.machine(), ASSERT_LINE);
608608         }
609609      }
610610      break;
r17963r17964
711711
712712WRITE8_HANDLER( namcos2_sound_bankselect_w )
713713{
714   UINT8 *RAM=space->machine().root_device().memregion("audiocpu")->base();
715   UINT32 max = (space->machine().root_device().memregion("audiocpu")->bytes() - 0x10000) / 0x4000;
714   UINT8 *RAM=space.machine().root_device().memregion("audiocpu")->base();
715   UINT32 max = (space.machine().root_device().memregion("audiocpu")->bytes() - 0x10000) / 0x4000;
716716   int bank = ( data >> 4 ) % max;   /* 991104.CAB */
717   space->machine().root_device().membank(BANKED_SOUND_ROM)->set_base(&RAM[ 0x10000 + ( 0x4000 * bank ) ] );
717   space.machine().root_device().membank(BANKED_SOUND_ROM)->set_base(&RAM[ 0x10000 + ( 0x4000 * bank ) ] );
718718}
719719
720720/**************************************************************/
r17963r17964
738738      switch((data>>2) & 0x07)
739739      {
740740      case 0:
741         namcos2_mcu_analog_data=space->machine().root_device().ioport("AN0")->read();
741         namcos2_mcu_analog_data=space.machine().root_device().ioport("AN0")->read();
742742         break;
743743      case 1:
744         namcos2_mcu_analog_data=space->machine().root_device().ioport("AN1")->read();
744         namcos2_mcu_analog_data=space.machine().root_device().ioport("AN1")->read();
745745         break;
746746      case 2:
747         namcos2_mcu_analog_data=space->machine().root_device().ioport("AN2")->read();
747         namcos2_mcu_analog_data=space.machine().root_device().ioport("AN2")->read();
748748         break;
749749      case 3:
750         namcos2_mcu_analog_data=space->machine().root_device().ioport("AN3")->read();
750         namcos2_mcu_analog_data=space.machine().root_device().ioport("AN3")->read();
751751         break;
752752      case 4:
753         namcos2_mcu_analog_data=space->machine().root_device().ioport("AN4")->read();
753         namcos2_mcu_analog_data=space.machine().root_device().ioport("AN4")->read();
754754         break;
755755      case 5:
756         namcos2_mcu_analog_data=space->machine().root_device().ioport("AN5")->read();
756         namcos2_mcu_analog_data=space.machine().root_device().ioport("AN5")->read();
757757         break;
758758      case 6:
759         namcos2_mcu_analog_data=space->machine().root_device().ioport("AN6")->read();
759         namcos2_mcu_analog_data=space.machine().root_device().ioport("AN6")->read();
760760         break;
761761      case 7:
762         namcos2_mcu_analog_data=space->machine().root_device().ioport("AN7")->read();
762         namcos2_mcu_analog_data=space.machine().root_device().ioport("AN7")->read();
763763         break;
764764      default:
765765         output_set_value("anunk",data);
r17963r17964
776776      /* If the interrupt enable bit is set trigger an A/D IRQ */
777777      if(data & 0x20)
778778      {
779         generic_pulse_irq_line(space->machine().device("mcu"), HD63705_INT_ADCONV, 1);
779         generic_pulse_irq_line(space.machine().device("mcu"), HD63705_INT_ADCONV, 1);
780780      }
781781   }
782782}
r17963r17964
817817   int data = 0;
818818
819819   /* Read/convert the bits one at a time */
820   if(space->machine().root_device().ioport("AN0")->read() > threshold) data |= 0x01;
821   if(space->machine().root_device().ioport("AN1")->read() > threshold) data |= 0x02;
822   if(space->machine().root_device().ioport("AN2")->read() > threshold) data |= 0x04;
823   if(space->machine().root_device().ioport("AN3")->read() > threshold) data |= 0x08;
824   if(space->machine().root_device().ioport("AN4")->read() > threshold) data |= 0x10;
825   if(space->machine().root_device().ioport("AN5")->read() > threshold) data |= 0x20;
826   if(space->machine().root_device().ioport("AN6")->read() > threshold) data |= 0x40;
827   if(space->machine().root_device().ioport("AN7")->read() > threshold) data |= 0x80;
820   if(space.machine().root_device().ioport("AN0")->read() > threshold) data |= 0x01;
821   if(space.machine().root_device().ioport("AN1")->read() > threshold) data |= 0x02;
822   if(space.machine().root_device().ioport("AN2")->read() > threshold) data |= 0x04;
823   if(space.machine().root_device().ioport("AN3")->read() > threshold) data |= 0x08;
824   if(space.machine().root_device().ioport("AN4")->read() > threshold) data |= 0x10;
825   if(space.machine().root_device().ioport("AN5")->read() > threshold) data |= 0x20;
826   if(space.machine().root_device().ioport("AN6")->read() > threshold) data |= 0x40;
827   if(space.machine().root_device().ioport("AN7")->read() > threshold) data |= 0x80;
828828
829829   /* Return the result */
830830   return data;
r17963r17964
832832
833833READ8_HANDLER( namcos2_input_port_0_r )
834834{
835   int data = space->machine().root_device().ioport("MCUB")->read();
835   int data = space.machine().root_device().ioport("MCUB")->read();
836836   return data;
837837}
838838
839839READ8_HANDLER( namcos2_input_port_10_r )
840840{
841   int data = space->machine().root_device().ioport("MCUH")->read();
841   int data = space.machine().root_device().ioport("MCUH")->read();
842842   return data;
843843}
844844
845845READ8_HANDLER( namcos2_input_port_12_r )
846846{
847   int data = space->machine().root_device().ioport("MCUDI0")->read();
847   int data = space.machine().root_device().ioport("MCUDI0")->read();
848848   return data;
849849}
trunk/src/mame/machine/pgmprot2.c
r17963r17964
3535
3636static READ32_HANDLER( arm7_latch_arm_r )
3737{
38   pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
38   pgm_arm_type2_state *state = space.machine().driver_data<pgm_arm_type2_state>();
3939
4040   state->m_prot->set_input_line(ARM7_FIRQ_LINE, CLEAR_LINE ); // guess
4141
4242   if (PGMARM7LOGERROR)
43      logerror("ARM7: Latch read: %08x (%08x) (%06x)\n", state->m_kov2_latchdata_68k_w, mem_mask, space->device().safe_pc());
43      logerror("ARM7: Latch read: %08x (%08x) (%06x)\n", state->m_kov2_latchdata_68k_w, mem_mask, space.device().safe_pc());
4444   return state->m_kov2_latchdata_68k_w;
4545}
4646
4747static WRITE32_HANDLER( arm7_latch_arm_w )
4848{
49   pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
49   pgm_arm_type2_state *state = space.machine().driver_data<pgm_arm_type2_state>();
5050
5151   if (PGMARM7LOGERROR)
52      logerror("ARM7: Latch write: %08x (%08x) (%06x)\n", data, mem_mask, space->device().safe_pc());
52      logerror("ARM7: Latch write: %08x (%08x) (%06x)\n", data, mem_mask, space.device().safe_pc());
5353
5454   COMBINE_DATA(&state->m_kov2_latchdata_arm_w);
5555}
5656
5757static READ32_HANDLER( arm7_shareram_r )
5858{
59   pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
59   pgm_arm_type2_state *state = space.machine().driver_data<pgm_arm_type2_state>();
6060
6161   if (PGMARM7LOGERROR)
62      logerror("ARM7: ARM7 Shared RAM Read: %04x = %08x (%08x) (%06x)\n", offset << 2, state->m_arm7_shareram[offset], mem_mask, space->device().safe_pc());
62      logerror("ARM7: ARM7 Shared RAM Read: %04x = %08x (%08x) (%06x)\n", offset << 2, state->m_arm7_shareram[offset], mem_mask, space.device().safe_pc());
6363   return state->m_arm7_shareram[offset];
6464}
6565
6666static WRITE32_HANDLER( arm7_shareram_w )
6767{
68   pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
68   pgm_arm_type2_state *state = space.machine().driver_data<pgm_arm_type2_state>();
6969
7070   if (PGMARM7LOGERROR)
71      logerror("ARM7: ARM7 Shared RAM Write: %04x = %08x (%08x) (%06x)\n", offset << 2, data, mem_mask, space->device().safe_pc());
71      logerror("ARM7: ARM7 Shared RAM Write: %04x = %08x (%08x) (%06x)\n", offset << 2, data, mem_mask, space.device().safe_pc());
7272   COMBINE_DATA(&state->m_arm7_shareram[offset]);
7373}
7474
7575static READ16_HANDLER( arm7_latch_68k_r )
7676{
77   pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
77   pgm_arm_type2_state *state = space.machine().driver_data<pgm_arm_type2_state>();
7878
7979   if (PGMARM7LOGERROR)
80      logerror("M68K: Latch read: %04x (%04x) (%06x)\n", state->m_kov2_latchdata_arm_w & 0x0000ffff, mem_mask, space->device().safe_pc());
80      logerror("M68K: Latch read: %04x (%04x) (%06x)\n", state->m_kov2_latchdata_arm_w & 0x0000ffff, mem_mask, space.device().safe_pc());
8181   return state->m_kov2_latchdata_arm_w;
8282}
8383
8484static WRITE16_HANDLER( arm7_latch_68k_w )
8585{
86   pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
86   pgm_arm_type2_state *state = space.machine().driver_data<pgm_arm_type2_state>();
8787
8888   if (PGMARM7LOGERROR)
89      logerror("M68K: Latch write: %04x (%04x) (%06x)\n", data & 0x0000ffff, mem_mask, space->device().safe_pc());
89      logerror("M68K: Latch write: %04x (%04x) (%06x)\n", data & 0x0000ffff, mem_mask, space.device().safe_pc());
9090   COMBINE_DATA(&state->m_kov2_latchdata_68k_w);
9191
9292   state->m_prot->set_input_line(ARM7_FIRQ_LINE, ASSERT_LINE ); // guess
r17963r17964
9494
9595static READ16_HANDLER( arm7_ram_r )
9696{
97   pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
97   pgm_arm_type2_state *state = space.machine().driver_data<pgm_arm_type2_state>();
9898   UINT16 *share16 = reinterpret_cast<UINT16 *>(state->m_arm7_shareram.target());
9999
100100   if (PGMARM7LOGERROR)
101      logerror("M68K: ARM7 Shared RAM Read: %04x = %04x (%08x) (%06x)\n", BYTE_XOR_LE(offset), share16[BYTE_XOR_LE(offset)], mem_mask, space->device().safe_pc());
101      logerror("M68K: ARM7 Shared RAM Read: %04x = %04x (%08x) (%06x)\n", BYTE_XOR_LE(offset), share16[BYTE_XOR_LE(offset)], mem_mask, space.device().safe_pc());
102102   return share16[BYTE_XOR_LE(offset)];
103103}
104104
105105static WRITE16_HANDLER( arm7_ram_w )
106106{
107   pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
107   pgm_arm_type2_state *state = space.machine().driver_data<pgm_arm_type2_state>();
108108   UINT16 *share16 = reinterpret_cast<UINT16 *>(state->m_arm7_shareram.target());
109109
110110   if (PGMARM7LOGERROR)
111      logerror("M68K: ARM7 Shared RAM Write: %04x = %04x (%04x) (%06x)\n", BYTE_XOR_LE(offset), data, mem_mask, space->device().safe_pc());
111      logerror("M68K: ARM7 Shared RAM Write: %04x = %04x (%04x) (%06x)\n", BYTE_XOR_LE(offset), data, mem_mask, space.device().safe_pc());
112112   COMBINE_DATA(&share16[BYTE_XOR_LE(offset)]);
113113}
114114
r17963r17964
174174
175175static WRITE32_HANDLER( kov2_arm_region_w )
176176{
177   pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
178   int pc = space->device().safe_pc();
177   pgm_arm_type2_state *state = space.machine().driver_data<pgm_arm_type2_state>();
178   int pc = space.device().safe_pc();
179179   int regionhack = state->ioport("RegionHack")->read();
180180   if (pc==0x190 && regionhack != 0xff) data = (data & 0xffff0000) | (regionhack << 0);
181181   COMBINE_DATA(&state->m_arm7_shareram[0x138/4]);
r17963r17964
227227
228228static WRITE32_HANDLER( martmast_arm_region_w )
229229{
230   pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
231   int pc = space->device().safe_pc();
230   pgm_arm_type2_state *state = space.machine().driver_data<pgm_arm_type2_state>();
231   int pc = space.device().safe_pc();
232232   int regionhack = state->ioport("RegionHack")->read();
233233   if (pc==0x170 && regionhack != 0xff) data = (data & 0xffff0000) | (regionhack << 0);
234234   COMBINE_DATA(&state->m_arm7_shareram[0x138/4]);
r17963r17964
248248
249249static WRITE32_HANDLER( ddp2_arm_region_w )
250250{
251   pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
252   int pc = space->device().safe_pc();
251   pgm_arm_type2_state *state = space.machine().driver_data<pgm_arm_type2_state>();
252   int pc = space.device().safe_pc();
253253   int regionhack = state->ioport("RegionHack")->read();
254254   if (pc==0x0174 && regionhack != 0xff) data = (data & 0x0000ffff) | (regionhack << 16);
255255   COMBINE_DATA(&state->m_arm7_shareram[0x0]);
r17963r17964
257257
258258static READ32_HANDLER( ddp2_speedup_r )
259259{
260   pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
261   int pc = space->device().safe_pc();
260   pgm_arm_type2_state *state = space.machine().driver_data<pgm_arm_type2_state>();
261   int pc = space.device().safe_pc();
262262   UINT32 data = state->m_arm_ram[0x300c/4];
263263
264264   if (pc==0x080109b4)
265265   {
266266      /* if we've hit the loop where this is read and both values are 0 then the only way out is an interrupt */
267      int r4 = (space->device().state().state_int(ARM7_R4));
267      int r4 = (space.device().state().state_int(ARM7_R4));
268268      r4 += 0xe;
269269
270270      if (r4==0x18002f9e)
271271      {
272272         UINT32 data2 =  state->m_arm_ram[0x2F9C/4]&0xffff0000;
273         if ((data==0x00000000) && (data2==0x00000000)) space->device().execute().spin_until_interrupt();
273         if ((data==0x00000000) && (data2==0x00000000)) space.device().execute().spin_until_interrupt();
274274      }
275275   }
276276
r17963r17964
279279
280280static READ16_HANDLER( ddp2_main_speedup_r )
281281{
282   pgm_state *state = space->machine().driver_data<pgm_state>();
282   pgm_state *state = space.machine().driver_data<pgm_state>();
283283   UINT16 data = state->m_mainram[0x0ee54/2];
284   int pc = space->device().safe_pc();
284   int pc = space.device().safe_pc();
285285
286   if (pc == 0x149dce) space->device().execute().spin_until_interrupt();
287   if (pc == 0x149cfe) space->device().execute().spin_until_interrupt();
286   if (pc == 0x149dce) space.device().execute().spin_until_interrupt();
287   if (pc == 0x149cfe) space.device().execute().spin_until_interrupt();
288288
289289   return data;
290290
trunk/src/mame/machine/nb1414m4.c
r17963r17964
2929#include "emu.h"
3030#include "includes/nb1414m4.h"
3131
32static void nichibutsu_1414m4_dma(address_space *space,UINT16 src,UINT16 dst,UINT16 size, UINT8 condition,UINT8 *vram)
32static void nichibutsu_1414m4_dma(address_space &space,UINT16 src,UINT16 dst,UINT16 size, UINT8 condition,UINT8 *vram)
3333{
34   UINT8 * data = (UINT8 *)space->machine().root_device().memregion("blit_data")->base();
34   UINT8 * data = (UINT8 *)space.machine().root_device().memregion("blit_data")->base();
3535   int i;
3636
3737   for(i=0;i<size;i++)
r17963r17964
4545   }
4646}
4747
48static void nichibutsu_1414m4_fill(address_space *space,UINT16 dst,UINT8 tile,UINT8 pal,UINT8 *vram)
48static void nichibutsu_1414m4_fill(address_space &space,UINT16 dst,UINT8 tile,UINT8 pal,UINT8 *vram)
4949{
5050   int i;
5151
r17963r17964
5959   }
6060}
6161
62static void insert_coin_msg(address_space *space,UINT8 *vram)
62static void insert_coin_msg(address_space &space,UINT8 *vram)
6363{
64   UINT8 * data = (UINT8 *)space->machine().root_device().memregion("blit_data")->base();
64   UINT8 * data = (UINT8 *)space.machine().root_device().memregion("blit_data")->base();
6565   int credit_count = (vram[0xf] & 0xff);
66   UINT8 fl_cond = space->machine().primary_screen->frame_number() & 0x10; /* for insert coin "flickering" */
66   UINT8 fl_cond = space.machine().primary_screen->frame_number() & 0x10; /* for insert coin "flickering" */
6767   UINT16 dst;
6868
6969   if(credit_count == 0)
r17963r17964
8080   }
8181}
8282
83static void credit_msg(address_space *space,UINT8 *vram)
83static void credit_msg(address_space &space,UINT8 *vram)
8484{
85   UINT8 * data = (UINT8 *)space->machine().root_device().memregion("blit_data")->base();
85   UINT8 * data = (UINT8 *)space.machine().root_device().memregion("blit_data")->base();
8686   int credit_count = (vram[0xf] & 0xff);
87   UINT8 fl_cond = space->machine().primary_screen->frame_number() & 0x10; /* for insert coin "flickering" */
87   UINT8 fl_cond = space.machine().primary_screen->frame_number() & 0x10; /* for insert coin "flickering" */
8888   UINT16 dst;
8989
9090   dst = ((data[0x023]<<8)|(data[0x024]&0xff)) & 0x3fff;
r17963r17964
107107   }
108108}
109109
110static void   kozure_score_msg(address_space *space,UINT16 dst,UINT8 src_base,UINT8 *vram)
110static void   kozure_score_msg(address_space &space,UINT16 dst,UINT8 src_base,UINT8 *vram)
111111{
112112   int i;
113113   UINT8 first_digit;
114114   UINT8 res;
115   UINT8 * data = (UINT8 *)space->machine().root_device().memregion("blit_data")->base();
115   UINT8 * data = (UINT8 *)space.machine().root_device().memregion("blit_data")->base();
116116
117117   first_digit = 0;
118118
r17963r17964
138138
139139}
140140
141static void nichibutsu_1414m4_0200(address_space *space, UINT16 mcu_cmd,UINT8 *vram)
141static void nichibutsu_1414m4_0200(address_space &space, UINT16 mcu_cmd,UINT8 *vram)
142142{
143   UINT8 * data = (UINT8 *)space->machine().root_device().memregion("blit_data")->base();
143   UINT8 * data = (UINT8 *)space.machine().root_device().memregion("blit_data")->base();
144144   UINT16 dst;
145145
146146   dst = (data[0x330+((mcu_cmd & 0xf)*2)]<<8)|(data[0x331+((mcu_cmd & 0xf)*2)]&0xff);
r17963r17964
183183[0x10] coinage B
184184[0x11] sound test num
185185*/
186static void nichibutsu_1414m4_0600(address_space *space, UINT8 is2p,UINT8 *vram)
186static void nichibutsu_1414m4_0600(address_space &space, UINT8 is2p,UINT8 *vram)
187187{
188   UINT8 * data = (UINT8 *)space->machine().root_device().memregion("blit_data")->base();
188   UINT8 * data = (UINT8 *)space.machine().root_device().memregion("blit_data")->base();
189189   UINT16 dst;
190190   int i;
191191
r17963r17964
239239      nichibutsu_1414m4_dma(space,0x310 + (((vram[0x06] >> (7-i)) & 1) * 6),dst + (i * 0x20),0x3,1,vram);
240240}
241241
242static void nichibutsu_1414m4_0e00(address_space *space,UINT16 mcu_cmd,UINT8 *vram)
242static void nichibutsu_1414m4_0e00(address_space &space,UINT16 mcu_cmd,UINT8 *vram)
243243{
244   UINT8 * data = (UINT8 *)space->machine().root_device().memregion("blit_data")->base();
244   UINT8 * data = (UINT8 *)space.machine().root_device().memregion("blit_data")->base();
245245   UINT16 dst;
246246
247247   dst = ((data[0xdf]<<8)|(data[0xe0]&0xff)) & 0x3fff;
r17963r17964
271271   }
272272}
273273
274void nb_1414m4_exec(address_space *space,UINT16 mcu_cmd,UINT8 *vram,UINT16 &scrollx,UINT16 &scrolly,tilemap_t *tilemap)
274void nb_1414m4_exec(address_space &space,UINT16 mcu_cmd,UINT8 *vram,UINT16 &scrollx,UINT16 &scrolly,tilemap_t *tilemap)
275275{
276276   /* latch fg scroll values */
277277   scrollx = (vram[0x0d] & 0xff) | ((vram[0x0e] & 0xff) << 8);
trunk/src/mame/machine/decoprot.c
r17963r17964
111111
112112WRITE16_HANDLER( deco16_104_prot_w ) /* Wizard Fire */
113113{
114   driver_device *state = space->machine().driver_data<driver_device>();
114   driver_device *state = space.machine().driver_data<driver_device>();
115115   if (offset == (0x150 / 2))
116116   {
117      state->soundlatch_byte_w(*space, 0, data & 0xff);
118      space->machine().device("audiocpu")->execute().set_input_line(0, HOLD_LINE);
117      state->soundlatch_byte_w(space, 0, data & 0xff);
118      space.machine().device("audiocpu")->execute().set_input_line(0, HOLD_LINE);
119119      return;
120120   }
121121
r17963r17964
124124      && offset != (0x370 >> 1) && offset != (0x3c0 >> 1) && offset != (0x430 >> 1) && offset != (0x460 >> 1)
125125      && offset != (0x5a0 >> 1) && offset != (0x5b0 >> 1) && offset != (0x6e0 >> 1) && offset != (0x7d0 >> 1)
126126      )
127      logerror("CONTROL PC %06x: warning - write protection memory address %04x %04x\n", space->device().safe_pc(), offset << 1, data);
127      logerror("CONTROL PC %06x: warning - write protection memory address %04x %04x\n", space.device().safe_pc(), offset << 1, data);
128128
129129   COMBINE_DATA(&deco16_prot_ram[offset]);
130130}
r17963r17964
133133{
134134   switch (offset<<1) {
135135      case 0x110: /* Player input */
136         return space->machine().root_device().ioport("IN0")->read();
136         return space.machine().root_device().ioport("IN0")->read();
137137
138138      case 0x36c: /* Coins */
139139      case 0x334: /* Probably also, c6, 2c0, 2e0, 4b2, 46a, 4da, rohga is 44c */
140         return space->machine().root_device().ioport("IN1")->read();
140         return space.machine().root_device().ioport("IN1")->read();
141141      case 0x0dc:
142         return space->machine().root_device().ioport("IN1")->read()<<4;
142         return space.machine().root_device().ioport("IN1")->read()<<4;
143143
144144      case 0x494: /* Dips */
145         return space->machine().root_device().ioport("DSW1_2")->read();
145         return space.machine().root_device().ioport("DSW1_2")->read();
146146
147147      case 0x244:
148148         return deco16_prot_ram[0];
r17963r17964
223223         return ((deco16_prot_ram[0x460/2]&0x0007)<<13) | ((deco16_prot_ram[0x460/2]&0x0008)<<9);
224224   }
225225
226   logerror("Deco Protection PC %06x: warning - read unmapped memory address %04x\n",space->device().safe_pc(),offset<<1);
226   logerror("Deco Protection PC %06x: warning - read unmapped memory address %04x\n",space.device().safe_pc(),offset<<1);
227227   return 0;
228228}
229229
r17963r17964
231231
232232WRITE16_HANDLER( deco16_60_prot_w ) /* Edward Randy */
233233{
234   driver_device *state = space->machine().driver_data<driver_device>();
234   driver_device *state = space.machine().driver_data<driver_device>();
235235   if (offset == (0x64 / 2))
236236   {
237      state->soundlatch_byte_w(*space, 0, data & 0xff);
238      space->machine().device("audiocpu")->execute().set_input_line(0, HOLD_LINE);
237      state->soundlatch_byte_w(space, 0, data & 0xff);
238      space.machine().device("audiocpu")->execute().set_input_line(0, HOLD_LINE);
239239   }
240240
241241   COMBINE_DATA(&deco16_prot_ram[offset]);
r17963r17964
252252   && offset!=0x40/2 && offset!=0x54/2 && offset!=0x56/2 && offset!=0x58/2 && offset!=0x6a/2 && offset!=0x2c/2
253253   && offset!=0 && offset!=0x34 && offset!=0x8a && offset!=0x8e && offset!=0x92 && offset!=0x96
254254   )
255logerror("Protection PC %06x: warning - write %04x to %04x\n",space->device().safe_pc(),data,offset<<1);
255logerror("Protection PC %06x: warning - write %04x to %04x\n",space.device().safe_pc(),data,offset<<1);
256256
257257}
258258
r17963r17964
367367
368368      /* Player 1 & 2 controls, read in IRQ then written *back* to protection device */
369369      case 0x50: /* written to 9e byte */
370         return space->machine().root_device().ioport("IN0")->read();
370         return space.machine().root_device().ioport("IN0")->read();
371371      case 0x6f8: /* written to 76 byte */
372         return (space->machine().root_device().ioport("IN0")->read()>>8)|(space->machine().root_device().ioport("IN0")->read()<<8); /* byte swap IN0 */
372         return (space.machine().root_device().ioport("IN0")->read()>>8)|(space.machine().root_device().ioport("IN0")->read()<<8); /* byte swap IN0 */
373373
374374      case 0x5c: /* After coin insert, high 0x8000 bit set starts game */
375375         return deco16_prot_ram[0x3b];
r17963r17964
379379         return ((deco16_prot_ram[0x9e/2]&0xff00)>>8) | ((deco16_prot_ram[0x9e/2]&0x00ff)<<8);
380380
381381      case 0xac: /* Dip switches */
382         return space->machine().root_device().ioport("DSW")->read();
382         return space.machine().root_device().ioport("DSW")->read();
383383      case 0xc2:
384         return space->machine().root_device().ioport("DSW")->read() ^ deco16_prot_ram[0x2c/2];
384         return space.machine().root_device().ioport("DSW")->read() ^ deco16_prot_ram[0x2c/2];
385385
386386      case 0x5d4: /* The state of the dips last frame */
387387         return deco16_prot_ram[0x34/2];
r17963r17964
393393         return (((deco16_prot_ram[0]&0xfff0)>>0) | ((deco16_prot_ram[0]&0x000c)>>2) | ((deco16_prot_ram[0]&0x0003)<<2)) & (~deco16_prot_ram[0x36/2]);
394394
395395      case 0x76a: /* Coins */
396         return space->machine().root_device().ioport("IN1")->read();
396         return space.machine().root_device().ioport("IN1")->read();
397397
398398      case 0x284: /* Bit shifting with inverted mask register */
399399         return (((deco16_prot_ram[0x40/2]&0xfff0)>>0) | ((deco16_prot_ram[0x40/2]&0x0007)<<1) | ((deco16_prot_ram[0x40/2]&0x0008)>>3)) & (~deco16_prot_ram[0x36/2]);
r17963r17964
407407         return (((deco16_prot_ram[0x6a/2]&0x00f0)<<4) | ((deco16_prot_ram[0x6a/2]&0x0f00)<<4) | ((deco16_prot_ram[0x6a/2]&0x0007)<<5) | ((deco16_prot_ram[0x6a/2]&0x0008)<<1)) & (~deco16_prot_ram[0x36/2]);
408408
409409      case 0x7d6: /* XOR IN0 */
410         return space->machine().root_device().ioport("IN0")->read() ^ deco16_prot_ram[0x2c/2];
410         return space.machine().root_device().ioport("IN0")->read() ^ deco16_prot_ram[0x2c/2];
411411      case 0x4b4:
412412         return ((deco16_prot_ram[0x32/2]&0x00f0)<<8) | ((deco16_prot_ram[0x32/2]&0x000e)<<7) | ((deco16_prot_ram[0x32/2]&0x0001)<<11);
413413   }
414414
415   logerror("Protection PC %06x: warning - read unmapped memory address %04x\n",space->device().safe_pc(),offset*2);
415   logerror("Protection PC %06x: warning - read unmapped memory address %04x\n",space.device().safe_pc(),offset*2);
416416   return 0;
417417}
418418
r17963r17964
422422
423423WRITE16_HANDLER( deco16_66_prot_w ) /* Mutant Fighter */
424424{
425   driver_device *state = space->machine().driver_data<driver_device>();
425   driver_device *state = space.machine().driver_data<driver_device>();
426426   if (offset == (0x64 / 2))
427427   {
428      state->soundlatch_byte_w(*space, 0, data & 0xff);
429      space->machine().device("audiocpu")->execute().set_input_line(0, HOLD_LINE);
428      state->soundlatch_byte_w(space, 0, data & 0xff);
429      space.machine().device("audiocpu")->execute().set_input_line(0, HOLD_LINE);
430430      return;
431431   }
432432
r17963r17964
458458      && offset!=0xb6 && offset!=0xfa && offset!=0xe4 && offset!=0x3a && offset!=0x1e
459459      && offset!=0x38 && offset!=0x92 && offset!=0xa2 && offset!=0x308 && offset!=0x40e
460460   )
461   logerror("Protection PC %06x: warning - write %04x to %04x\n",space->device().safe_pc(),data,offset);
461   logerror("Protection PC %06x: warning - write %04x to %04x\n",space.device().safe_pc(),data,offset);
462462}
463463
464464READ16_HANDLER( deco16_66_prot_r ) /* Mutant Fighter */
r17963r17964
470470
471471   switch (offset*2) {
472472      case 0xac: /* Dip switches */
473         return space->machine().root_device().ioport("DSW")->read();
473         return space.machine().root_device().ioport("DSW")->read();
474474      case 0xc2: /* Dip switches */
475         return space->machine().root_device().ioport("DSW")->read() ^ deco16_prot_ram[0x2c/2];
475         return space.machine().root_device().ioport("DSW")->read() ^ deco16_prot_ram[0x2c/2];
476476      case 0x46: /* Coins */
477         return space->machine().root_device().ioport("IN1")->read() ^ deco16_prot_ram[0x2c/2];
477         return space.machine().root_device().ioport("IN1")->read() ^ deco16_prot_ram[0x2c/2];
478478      case 0x50: /* Player 1 & 2 input ports */
479         return space->machine().root_device().ioport("IN0")->read();
479         return space.machine().root_device().ioport("IN0")->read();
480480      case 0x63c: /* Player 1 & 2 input ports */
481         return space->machine().root_device().ioport("IN0")->read() ^ deco16_prot_ram[0x2c/2];
481         return space.machine().root_device().ioport("IN0")->read() ^ deco16_prot_ram[0x2c/2];
482482
483483      case 0x5f4:
484484         return deco16_prot_ram[0x18/2];
r17963r17964
556556         {
557557            int ret=mutantf_port_0e_hack;
558558            mutantf_port_0e_hack=0x800;
559            //logerror("Protection PC %06x: warning - read unknown memory address %04x\n",space->device().safe_pc(),offset<<1);
559            //logerror("Protection PC %06x: warning - read unknown memory address %04x\n",space.device().safe_pc(),offset<<1);
560560            return ret;
561561         }
562562
r17963r17964
564564         {
565565            int ret=mutantf_port_6a_hack;
566566            mutantf_port_6a_hack=0x2866;
567            //logerror("Protection PC %06x: warning - read unknown memory address %04x\n",space->device().safe_pc(),offset<<1);
567            //logerror("Protection PC %06x: warning - read unknown memory address %04x\n",space.device().safe_pc(),offset<<1);
568568            return ret;
569569         }
570570
r17963r17964
572572         {
573573            int ret=mutantf_port_e8_hack;
574574            mutantf_port_e8_hack=0x2401;
575            //logerror("Protection PC %06x: warning - read unknown memory address %04x\n",space->device().safe_pc(),offset<<1);
575            //logerror("Protection PC %06x: warning - read unknown memory address %04x\n",space.device().safe_pc(),offset<<1);
576576            return ret;
577577         }
578578
579579      case 0xaa: /* ??? */
580         //logerror("Protection PC %06x: warning - read unknown memory address %04x\n",space->device().safe_pc(),offset<<1);
580         //logerror("Protection PC %06x: warning - read unknown memory address %04x\n",space.device().safe_pc(),offset<<1);
581581         return 0xc080;
582582
583583      case 0x42: /* Strange, but consistent */
584         //logerror("Protection PC %06x: warning - read unknown memory address %04x\n",space->device().safe_pc(),offset<<1);
584         //logerror("Protection PC %06x: warning - read unknown memory address %04x\n",space.device().safe_pc(),offset<<1);
585585         return deco16_prot_ram[0x2c/2]^0x5302;
586586
587587      case 0x48: /* Correct for test data, but I wonder if the 0x1800 is from an address, not a constant */
588         //logerror("Protection PC %06x: warning - read unmapped memory address %04x\n",space->device().safe_pc(),offset<<1);
588         //logerror("Protection PC %06x: warning - read unmapped memory address %04x\n",space.device().safe_pc(),offset<<1);
589589         return (0x1800) & (~deco16_prot_ram[0x36/2]);
590590
591591      case 0x52:
r17963r17964
602602   popmessage("Deco66:  Read unmapped port %04x\n",offset*2);
603603#endif
604604
605   logerror("Protection PC %06x: warning - read unmapped memory address %04x\n",space->device().safe_pc(),offset<<1);
605   logerror("Protection PC %06x: warning - read unmapped memory address %04x\n",space.device().safe_pc(),offset<<1);
606606   return 0;
607607}
608608
r17963r17964
610610
611611WRITE16_HANDLER( deco16_104_cninja_prot_w )
612612{
613   driver_device *state = space->machine().driver_data<driver_device>();
613   driver_device *state = space.machine().driver_data<driver_device>();
614614   if (offset == (0xa8 / 2))
615615   {
616      state->soundlatch_byte_w(*space, 0, data & 0xff);
617      space->machine().device("audiocpu")->execute().set_input_line(0, HOLD_LINE);
616      state->soundlatch_byte_w(space, 0, data & 0xff);
617      space.machine().device("audiocpu")->execute().set_input_line(0, HOLD_LINE);
618618      return;
619619   }
620620
r17963r17964
655655         return deco16_prot_ram[15];
656656
657657      case 0x36: /* Dip switches */
658         return space->machine().root_device().ioport("DSW")->read();
658         return space.machine().root_device().ioport("DSW")->read();
659659
660660      case 0x1c8: /* Coins */
661         return space->machine().root_device().ioport("IN1")->read();
661         return space.machine().root_device().ioport("IN1")->read();
662662
663663      case 0x22c: /* Player 1 & 2 input ports */
664         return space->machine().root_device().ioport("IN0")->read();
664         return space.machine().root_device().ioport("IN0")->read();
665665   }
666666
667   logerror("Protection PC %06x: warning - read unmapped memory address %04x\n",space->device().safe_pc(),offset);
667   logerror("Protection PC %06x: warning - read unmapped memory address %04x\n",space.device().safe_pc(),offset);
668668   return 0;
669669}
670670
r17963r17964
672672
673673WRITE16_HANDLER( deco16_146_funkyjet_prot_w )
674674{
675   driver_device *state = space->machine().driver_data<driver_device>();
675   driver_device *state = space.machine().driver_data<driver_device>();
676676   COMBINE_DATA(&deco16_prot_ram[offset]);
677677
678678   if (offset == (0x10a >> 1))
679679   {
680      state->soundlatch_byte_w(*space, 0, data & 0xff);
681      space->machine().device("audiocpu")->execute().set_input_line(0, HOLD_LINE);
680      state->soundlatch_byte_w(space, 0, data & 0xff);
681      space.machine().device("audiocpu")->execute().set_input_line(0, HOLD_LINE);
682682      return;
683683   }
684684}
r17963r17964
753753         return ((deco16_prot_ram[0x78e>>1]>>4)&0xff00) | (deco16_prot_ram[0x78e>>1]&0x000f) | ((deco16_prot_ram[0x78e>>1]<<8)&0xf000);
754754
755755      case 0x00c >> 1: /* Player 1 & Player 2 joysticks & fire buttons */
756         return space->machine().root_device().ioport("INPUTS")->read();
756         return space.machine().root_device().ioport("INPUTS")->read();
757757      case 0x778 >> 1: /* Credits */
758         return space->machine().root_device().ioport("SYSTEM")->read();
758         return space.machine().root_device().ioport("SYSTEM")->read();
759759      case 0x382 >> 1: /* DIPS */
760         return space->machine().root_device().ioport("DSW")->read();
760         return space.machine().root_device().ioport("DSW")->read();
761761   }
762762
763   if (space->device().safe_pc()!=0xc0ea)
764      logerror("CPU #0 PC %06x: warning - read unmapped control address %06x (ctrl %04x)\n", space->device().safe_pc(), offset<<1, space->machine().root_device().ioport("INPUTS")->read());
763   if (space.device().safe_pc()!=0xc0ea)
764      logerror("CPU #0 PC %06x: warning - read unmapped control address %06x (ctrl %04x)\n", space.device().safe_pc(), offset<<1, space.machine().root_device().ioport("INPUTS")->read());
765765
766766   return 0;
767767}
r17963r17964
794794      COMBINE_DATA(&decoprot_buffer_ram[offset]);
795795   else
796796      COMBINE_DATA(&deco16_prot_ram[offset]);
797   driver_device *state = space->machine().driver_data<driver_device>();
797   driver_device *state = space.machine().driver_data<driver_device>();
798798   if (offset == (0xa8 / 2))
799799   {
800      state->soundlatch_byte_w(*space, 0, data & 0xff);
801      space->machine().device("audiocpu")->execute().set_input_line(0, HOLD_LINE);
800      state->soundlatch_byte_w(space, 0, data & 0xff);
801      space.machine().device("audiocpu")->execute().set_input_line(0, HOLD_LINE);
802802      return;
803803   }
804804
r17963r17964
810810
811811   offset=offset*2;
812812
813   //logerror("CONTROL PC %06x: warning - write protection memory address %04x %04x\n",space->device().safe_pc(),offset,data);
813   //logerror("CONTROL PC %06x: warning - write protection memory address %04x %04x\n",space.device().safe_pc(),offset,data);
814814   if (offset==0xee || offset==0x42 || offset==0xa8)
815815      return;
816816
817//  logerror("CONTROL PC %06x: warning - write protection memory address %04x %04x\n",space->device().safe_pc(),offset,data);
817//  logerror("CONTROL PC %06x: warning - write protection memory address %04x %04x\n",space.device().safe_pc(),offset,data);
818818
819819#if 1
820820// 66 7c 7e 28 58 4a 9e
r17963r17964
831831      return;
832832
833833//  if (offset==0x3c)
834//      logerror("CONTROL PC %06x: warning - write protection memory address %04x %04x\n",space->device().safe_pc(),offset,data);
834//      logerror("CONTROL PC %06x: warning - write protection memory address %04x %04x\n",space.device().safe_pc(),offset,data);
835835// Actually read:
836836//  22 24 26 2c 2e 30 32 3c 40 44 46 48 60 62 66 6a 6e 76 7e 80 82 84 86 88 8a 8c 90 94 96 98 9a 9c a0 c0 c4 c6 c8 cc ce d6 dc de
837837
r17963r17964
859859      return;
860860#endif
861861
862   logerror("CONTROL PC %06x: warning - write unmapped protection memory address %04x %04x\n",space->device().safe_pc(),offset,data);
862   logerror("CONTROL PC %06x: warning - write unmapped protection memory address %04x %04x\n",space.device().safe_pc(),offset,data);
863863}
864864
865865READ16_HANDLER( deco16_104_rohga_prot_r )
r17963r17964
867867   const UINT16* prot_ram=decoprot_buffer_ram_selected ? decoprot_buffer_ram : deco16_prot_ram;
868868
869869//  if (offset!=0x88/2 && offset!=0x44c/2 && offset!=0x36c/2 && offset!=0x292/2)
870//      logerror("Protection PC %06x: warning - read prot address %04x\n",space->device().safe_pc(),offset<<1);
870//      logerror("Protection PC %06x: warning - read prot address %04x\n",space.device().safe_pc(),offset<<1);
871871
872872   switch (offset) {
873873      case 0x88/2: /* Player 1 & 2 input ports */
874         return space->machine().root_device().ioport("IN0")->read();
874         return space.machine().root_device().ioport("IN0")->read();
875875      case 0x36c/2:
876         return space->machine().root_device().ioport("IN1")->read();
876         return space.machine().root_device().ioport("IN1")->read();
877877      case 0x44c/2:
878         return ((space->machine().root_device().ioport("IN1")->read() & 0x7)<<13)|((space->machine().root_device().ioport("IN1")->read() & 0x8)<<9);
878         return ((space.machine().root_device().ioport("IN1")->read() & 0x7)<<13)|((space.machine().root_device().ioport("IN1")->read() & 0x8)<<9);
879879      case 0x292/2: /* Dips */
880         return space->machine().root_device().ioport("DSW1_2")->read();
880         return space.machine().root_device().ioport("DSW1_2")->read();
881881
882882      case 0x44/2:
883883         return ((((DECO_PORT(0x2c)&0x000f)<<12)) ^ deco16_xor) & (~deco16_mask);
r17963r17964
12121212         return DECO_PORT(0x58);
12131213   }
12141214
1215   logerror("Protection PC %06x: warning - read unmapped protection address %04x\n",space->device().safe_pc(),offset<<1);
1215   logerror("Protection PC %06x: warning - read unmapped protection address %04x\n",space.device().safe_pc(),offset<<1);
12161216
12171217   return 0;
12181218}
r17963r17964
12211221
12221222static WRITE16_HANDLER( deco16_146_core_prot_w )
12231223{
1224   driver_device *state = space->machine().driver_data<driver_device>();
1224   driver_device *state = space.machine().driver_data<driver_device>();
12251225   const int writeport=offset;
12261226   const int sndport=0x260;
12271227   const int xorport=0x340;
12281228   const int maskport=0x6c0;
12291229   if (writeport == sndport)
12301230   {
1231      state->soundlatch_byte_w(*space, 0, data & 0xff);
1232      space->machine().device("audiocpu")->execute().set_input_line(0, HOLD_LINE);
1231      state->soundlatch_byte_w(space, 0, data & 0xff);
1232      space.machine().device("audiocpu")->execute().set_input_line(0, HOLD_LINE);
12331233      return;
12341234   }
12351235
r17963r17964
12441244      COMBINE_DATA(&decoprot_buffer_ram[offset>>1]);
12451245
12461246//  if (offset!=0x5e0 && offset!=0x340 && offset!=0 && offset!=0x3d0 && offset!=0x280)
1247//      logerror("%08x:  Write protection port %04x, data %04x (%08x)\n", space->device().safe_pc(), offset, data, mem_mask);
1247//      logerror("%08x:  Write protection port %04x, data %04x (%08x)\n", space.device().safe_pc(), offset, data, mem_mask);
12481248}
12491249
12501250static READ16_HANDLER( deco16_146_core_prot_r )
r17963r17964
12561256   switch (offset)
12571257   {
12581258   case 0x582: /* Player 1 & Player 2 */
1259      return space->machine().root_device().ioport("IN0")->read();
1259      return space.machine().root_device().ioport("IN0")->read();
12601260   case 0x04c: /* Coins/VBL */
1261      return space->machine().root_device().ioport("IN1")->read();
1261      return space.machine().root_device().ioport("IN1")->read();
12621262   case 0x672: /* Dip switches */
1263      return space->machine().root_device().ioport("DSW1_2")->read();
1263      return space.machine().root_device().ioport("DSW1_2")->read();
12641264
12651265   case 0x13a:
12661266      return ((DECO_PORT(0x190)&0x00f0)<<8) | ((DECO_PORT(0x190)&0x0003)<<10) | ((DECO_PORT(0x190)&0x000c)<<6);
r17963r17964
13181318
13191319   /*********************************************************************************/
13201320
1321//  case 0x582: return space->machine().root_device().ioport("IN0")->read(); /* IN0 */
1322//  case 0x672: return space->machine().root_device().ioport("IN1")->read(); /* IN1 */
1323//  case 0x04c: return space->machine().device<eeprom_device>("eeprom")->read_bit();
1321//  case 0x582: return space.machine().root_device().ioport("IN0")->read(); /* IN0 */
1322//  case 0x672: return space.machine().root_device().ioport("IN1")->read(); /* IN1 */
1323//  case 0x04c: return space.machine().device<eeprom_device>("eeprom")->read_bit();
13241324
13251325   case 0x468:
13261326      val=DECO_PORT(0x570);
r17963r17964
16421642      return val & (~deco16_mask);
16431643   }
16441644
1645   //logerror("Protection PC %06x: warning - read fully unmapped protection address %04x\n", space->device().safe_pc(), offset);
1645   //logerror("Protection PC %06x: warning - read fully unmapped protection address %04x\n", space.device().safe_pc(), offset);
16461646
16471647   return 0;
16481648}
r17963r17964
16671667   /* Special case inputs, because this is the only game with an eprom */
16681668   switch (addr)
16691669   {
1670   case 0x582: return (space->machine().root_device().ioport("IN0")->read()<<16) | 0xffff; /* IN0 */
1671   case 0x672: return (space->machine().root_device().ioport("IN1")->read()<<16) | 0xffff; /* IN1 */
1672   case 0x04c: return (space->machine().device<eeprom_device>("eeprom")->read_bit()<<16) | 0xffff;
1670   case 0x582: return (space.machine().root_device().ioport("IN0")->read()<<16) | 0xffff; /* IN0 */
1671   case 0x672: return (space.machine().root_device().ioport("IN1")->read()<<16) | 0xffff; /* IN1 */
1672   case 0x04c: return (space.machine().device<eeprom_device>("eeprom")->read_bit()<<16) | 0xffff;
16731673   }
16741674
16751675   /* Handle 'one shots' - writing data to an address, then immediately reading it back */
r17963r17964
16941694      && addr!=0x1ae && addr!=0x1d6 && addr!=0x4f8 && addr!=0x614 // cnofirmed
16951695      && addr!=0x5ae && addr!=0x50a && addr!=0x476 && addr!=0x328 && addr!=0x3e && addr!=0x558 // dbl check these later
16961696      && addr!=0x444 && addr!=0x46a // confirmed
1697      && space->device().safe_pc()!=0x16448 // hmm
1697      && space.device().safe_pc()!=0x16448 // hmm
16981698      && addr!=0x67a
16991699      && addr!=0x6c2 && addr!=0xac && addr!=0x416 && addr!=0x2c2 // confirmed
17001700      && addr!=0x3d8
r17963r17964
17171717      && addr!=0x440 && addr!=0x460
17181718      )
17191719   {
1720      logerror("Protection PC %06x: warning - read unmapped protection address %04x (ret %04x)\n", space->device().safe_pc(), addr, val);
1720      logerror("Protection PC %06x: warning - read unmapped protection address %04x (ret %04x)\n", space.device().safe_pc(), addr, val);
17211721      popmessage("Read protection port %04x", addr);
17221722   }
1723   //  logerror("Protection PC %06x: warning - read unmapped protection address %04x (ret %04x)\n", space->device().safe_pc(), addr, val);
1723   //  logerror("Protection PC %06x: warning - read unmapped protection address %04x (ret %04x)\n", space.device().safe_pc(), addr, val);
17241724
17251725   return (val<<16)|0xffff;
17261726}
r17963r17964
17431743{
17441744   switch (offset * 2)
17451745   {
1746   case 0x298: return space->machine().root_device().ioport("IN0")->read();
1747   case 0x342: return space->machine().root_device().ioport("IN1")->read();
1748   case 0x506: return space->machine().root_device().ioport("DSW")->read();
1746   case 0x298: return space.machine().root_device().ioport("IN0")->read();
1747   case 0x342: return space.machine().root_device().ioport("IN1")->read();
1748   case 0x506: return space.machine().root_device().ioport("DSW")->read();
17491749   }
17501750
1751   logerror("Protection PC %06x: warning - read unmapped memory address %04x\n", space->device().safe_pc(), offset<<1);
1751   logerror("Protection PC %06x: warning - read unmapped memory address %04x\n", space.device().safe_pc(), offset<<1);
17521752
17531753   return 0;
17541754}
17551755
17561756WRITE16_HANDLER( dietgo_104_prot_w )
17571757{
1758   driver_device *state = space->machine().driver_data<driver_device>();
1758   driver_device *state = space.machine().driver_data<driver_device>();
17591759   if (offset == (0x380 / 2))
17601760   {
1761      state->soundlatch_byte_w(*space, 0, data & 0xff);
1762      space->machine().device("audiocpu")->execute().set_input_line(0, HOLD_LINE);
1761      state->soundlatch_byte_w(space, 0, data & 0xff);
1762      space.machine().device("audiocpu")->execute().set_input_line(0, HOLD_LINE);
17631763      return;
17641764   }
1765   logerror("Protection PC %06x: warning - write unmapped memory address %04x %04x\n", space->device().safe_pc(), offset << 1, data);
1765   logerror("Protection PC %06x: warning - write unmapped memory address %04x %04x\n", space.device().safe_pc(), offset << 1, data);
17661766}
17671767
17681768/**********************************************************************************/
r17963r17964
17721772   const UINT16* prot_ram=deco16_prot_ram;
17731773   switch (offset * 2)
17741774   {
1775   case 0x5b2: return space->machine().root_device().ioport("SYSTEM")->read();
1776   case 0x44c: return space->machine().root_device().ioport("DSW")->read();
1777   case 0x042: return space->machine().root_device().ioport("INPUTS")->read();
1775   case 0x5b2: return space.machine().root_device().ioport("SYSTEM")->read();
1776   case 0x44c: return space.machine().root_device().ioport("DSW")->read();
1777   case 0x042: return space.machine().root_device().ioport("INPUTS")->read();
17781778
17791779   case 0x510: return DECO_PORT(0);
17801780   case 0x51a: return DECO_PORT(2);
17811781   }
17821782
1783   logerror("Protection PC %06x: warning - read unmapped memory address %04x\n", space->device().safe_pc(), offset<<1);
1783   logerror("Protection PC %06x: warning - read unmapped memory address %04x\n", space.device().safe_pc(), offset<<1);
17841784
17851785   return 0;
17861786}
r17963r17964
17881788WRITE16_HANDLER( deco16_104_pktgaldx_prot_w )
17891789{
17901790   COMBINE_DATA(&deco16_prot_ram[offset]);
1791//  logerror("Protection PC %06x: warning - write unmapped memory address %04x %04x\n",space->device().safe_pc(),offset<<1,data);
1791//  logerror("Protection PC %06x: warning - write unmapped memory address %04x %04x\n",space.device().safe_pc(),offset<<1,data);
17921792}
17931793
17941794/**********************************************************************************/
trunk/src/mame/machine/cclimber.c
r17963r17964
66
77static void cclimber_decode(running_machine &machine, const UINT8 convtable[8][16])
88{
9   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
9   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
1010   UINT8 *rom = machine.root_device().memregion("maincpu")->base();
1111   UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x10000);
1212   int A;
1313
14   space->set_decrypted_region(0x0000, 0xffff, decrypt);
14   space.set_decrypted_region(0x0000, 0xffff, decrypt);
1515
1616   for (A = 0x0000;A < 0x10000;A++)
1717   {
trunk/src/mame/machine/segamsys.c
r17963r17964
485485   return retdata;
486486}
487487
488static void vdp_data_w(address_space *space, UINT8 data, struct sms_vdp* chip)
488static void vdp_data_w(address_space &space, UINT8 data, struct sms_vdp* chip)
489489{
490490   /* data writes clear the pending flag */
491491   chip->cmd_pend = 0;
r17963r17964
522522               g = (palword & 0x00f0)>>4;
523523               b = (palword & 0x0f00)>>8;
524524               rgb_t rgb = MAKE_RGB(pal4bit(r), pal4bit(g), pal4bit(b));
525               //palette_set_color(space->machine(),(chip->addr_reg&0x3e)/2, rgb);
525               //palette_set_color(space.machine(),(chip->addr_reg&0x3e)/2, rgb);
526526               chip->cram_mamecolours[(chip->addr_reg&0x3e)/2]=rgb;
527527            }
528528         }
r17963r17964
538538            g = (data & 0x0c)>>2;
539539            b = (data & 0x30)>>4;
540540            rgb_t rgb = MAKE_RGB(pal2bit(r), pal2bit(g), pal2bit(b));
541            //palette_set_color(space->machine(),chip->addr_reg&0x1f, rgb);
541            //palette_set_color(space.machine(),chip->addr_reg&0x1f, rgb);
542542            chip->cram_mamecolours[chip->addr_reg&0x1f]=rgb;
543543         }
544544
r17963r17964
551551
552552}
553553
554static UINT8 vdp_ctrl_r(address_space *space, struct sms_vdp *chip)
554static UINT8 vdp_ctrl_r(address_space &space, struct sms_vdp *chip)
555555{
556556   UINT8 retvalue;
557557
r17963r17964
565565   chip->sprite_collision = 0;
566566   chip->sprite_overflow = 0;
567567
568   (chip->set_irq)(space->machine(), 0); // clear IRQ;
568   (chip->set_irq)(space.machine(), 0); // clear IRQ;
569569
570570
571571   return retvalue;
r17963r17964
615615//  printf("VDP: setting register %01x to %02x\n",reg, chip->cmd_part1);
616616}
617617
618static void vdp_ctrl_w(address_space *space, UINT8 data, struct sms_vdp *chip)
618static void vdp_ctrl_w(address_space &space, UINT8 data, struct sms_vdp *chip)
619619{
620620   if (chip->cmd_pend)
621621   { /* Part 2 of a command word write */
r17963r17964
636636            break;
637637
638638         case 0x2: /* REG setting */
639            vdp_set_register(space->machine(), chip);
639            vdp_set_register(space.machine(), chip);
640640            chip->writemode = 0;
641641            break;
642642
r17963r17964
14791479
14801480READ8_HANDLER( sms_ioport_gg00_r )
14811481{
1482   return ioport_gg00_r(space->machine());
1482   return ioport_gg00_r(space.machine());
14831483}
14841484
14851485
r17963r17964
15641564/* the SMS inputs should be more complex, like the megadrive ones */
15651565READ8_HANDLER (megatech_sms_ioport_dc_r)
15661566{
1567   running_machine &machine = space->machine();
1567   running_machine &machine = space.machine();
15681568   /* 2009-05 FP: would it be worth to give separate inputs to SMS? SMS has only 2 keys A,B (which are B,C on megadrive) */
15691569   /* bit 4: TL-A; bit 5: TR-A */
15701570   return (machine.root_device().ioport("PAD1")->read() & 0x3f) | ((machine.root_device().ioport("PAD2")->read() & 0x03) << 6);
r17963r17964
15721572
15731573READ8_HANDLER (megatech_sms_ioport_dd_r)
15741574{
1575   running_machine &machine = space->machine();
1575   running_machine &machine = space.machine();
15761576   /* 2009-05 FP: would it be worth to give separate inputs to SMS? SMS has only 2 keys A,B (which are B,C on megadrive) */
15771577   /* bit 2: TL-B; bit 3: TR-B; bit 4: RESET; bit 5: unused; bit 6: TH-A; bit 7: TH-B*/
15781578   return ((machine.root_device().ioport("PAD2")->read() & 0x3c) >> 2) | 0x10;
r17963r17964
16021602         logerror("bank w %02x %02x\n", offset, data);
16031603         if ((data & 0x08) && smsgg_backupram)
16041604         {
1605            space->install_legacy_readwrite_handler(0x8000, 0x9fff, FUNC(smsgg_backupram_r), FUNC(smsgg_backupram_w));
1605            space.install_legacy_readwrite_handler(0x8000, 0x9fff, FUNC(smsgg_backupram_r), FUNC(smsgg_backupram_w));
16061606         }
16071607         else
16081608         {
1609            space->install_rom(0x0000, 0xbfff, sms_rom);
1610            space->unmap_write(0x0000, 0xbfff);
1609            space.install_rom(0x0000, 0xbfff, sms_rom);
1610            space.unmap_write(0x0000, 0xbfff);
16111611         }
16121612
16131613         //printf("bank ram??\n");
16141614         break;
16151615      case 1:
1616         memcpy(sms_rom+0x0000, space->machine().root_device().memregion("maincpu")->base()+bank*0x4000, 0x4000);
1616         memcpy(sms_rom+0x0000, space.machine().root_device().memregion("maincpu")->base()+bank*0x4000, 0x4000);
16171617         break;
16181618      case 2:
1619         memcpy(sms_rom+0x4000, space->machine().root_device().memregion("maincpu")->base()+bank*0x4000, 0x4000);
1619         memcpy(sms_rom+0x4000, space.machine().root_device().memregion("maincpu")->base()+bank*0x4000, 0x4000);
16201620         break;
16211621      case 3:
1622         memcpy(sms_rom+0x8000, space->machine().root_device().memregion("maincpu")->base()+bank*0x4000, 0x4000);
1622         memcpy(sms_rom+0x8000, space.machine().root_device().memregion("maincpu")->base()+bank*0x4000, 0x4000);
16231623         break;
16241624
16251625   }
r17963r17964
16281628static WRITE8_HANDLER( codemasters_rom_bank_0000_w )
16291629{
16301630   int bank = data&0x1f;
1631   memcpy(sms_rom+0x0000, space->machine().root_device().memregion("maincpu")->base()+bank*0x4000, 0x4000);
1631   memcpy(sms_rom+0x0000, space.machine().root_device().memregion("maincpu")->base()+bank*0x4000, 0x4000);
16321632}
16331633
16341634static WRITE8_HANDLER( codemasters_rom_bank_4000_w )
16351635{
16361636   int bank = data&0x1f;
1637   memcpy(sms_rom+0x4000, space->machine().root_device().memregion("maincpu")->base()+bank*0x4000, 0x4000);
1637   memcpy(sms_rom+0x4000, space.machine().root_device().memregion("maincpu")->base()+bank*0x4000, 0x4000);
16381638}
16391639
16401640static WRITE8_HANDLER( codemasters_rom_bank_8000_w )
16411641{
16421642   int bank = data&0x1f;
1643   memcpy(sms_rom+0x8000, space->machine().root_device().memregion("maincpu")->base()+bank*0x4000, 0x4000);
1643   memcpy(sms_rom+0x8000, space.machine().root_device().memregion("maincpu")->base()+bank*0x4000, 0x4000);
16441644}
16451645
16461646
trunk/src/mame/machine/maniach.c
r17963r17964
2121
2222READ8_HANDLER( maniach_68705_port_a_r )
2323{
24   matmania_state *state = space->machine().driver_data<matmania_state>();
24   matmania_state *state = space.machine().driver_data<matmania_state>();
2525
26   //logerror("%04x: 68705 port A read %02x\n", space->device().safe_pc(), state->m_port_a_in);
26   //logerror("%04x: 68705 port A read %02x\n", space.device().safe_pc(), state->m_port_a_in);
2727   return (state->m_port_a_out & state->m_ddr_a) | (state->m_port_a_in & ~state->m_ddr_a);
2828}
2929
3030WRITE8_HANDLER( maniach_68705_port_a_w )
3131{
32   matmania_state *state = space->machine().driver_data<matmania_state>();
32   matmania_state *state = space.machine().driver_data<matmania_state>();
3333
34   //logerror("%04x: 68705 port A write %02x\n", space->device().safe_pc(), data);
34   //logerror("%04x: 68705 port A write %02x\n", space.device().safe_pc(), data);
3535   state->m_port_a_out = data;
3636}
3737
3838WRITE8_HANDLER( maniach_68705_ddr_a_w )
3939{
40   matmania_state *state = space->machine().driver_data<matmania_state>();
40   matmania_state *state = space.machine().driver_data<matmania_state>();
4141   state->m_ddr_a = data;
4242}
4343
r17963r17964
5454
5555READ8_HANDLER( maniach_68705_port_b_r )
5656{
57   matmania_state *state = space->machine().driver_data<matmania_state>();
57   matmania_state *state = space.machine().driver_data<matmania_state>();
5858   return (state->m_port_b_out & state->m_ddr_b) | (state->m_port_b_in & ~state->m_ddr_b);
5959}
6060
6161WRITE8_HANDLER( maniach_68705_port_b_w )
6262{
63   matmania_state *state = space->machine().driver_data<matmania_state>();
63   matmania_state *state = space.machine().driver_data<matmania_state>();
6464
65   //logerror("%04x: 68705 port B write %02x\n", space->device().safe_pc(), data);
65   //logerror("%04x: 68705 port B write %02x\n", space.device().safe_pc(), data);
6666
6767   if (BIT(state->m_ddr_b, 1) && BIT(~data, 1) && BIT(state->m_port_b_out, 1))
6868   {
r17963r17964
8282
8383WRITE8_HANDLER( maniach_68705_ddr_b_w )
8484{
85   matmania_state *state = space->machine().driver_data<matmania_state>();
85   matmania_state *state = space.machine().driver_data<matmania_state>();
8686   state->m_ddr_b = data;
8787}
8888
8989
9090READ8_HANDLER( maniach_68705_port_c_r )
9191{
92   matmania_state *state = space->machine().driver_data<matmania_state>();
92   matmania_state *state = space.machine().driver_data<matmania_state>();
9393
9494   state->m_port_c_in = 0;
9595
r17963r17964
106106
107107WRITE8_HANDLER( maniach_68705_port_c_w )
108108{
109   matmania_state *state = space->machine().driver_data<matmania_state>();
109   matmania_state *state = space.machine().driver_data<matmania_state>();
110110
111   //logerror("%04x: 68705 port C write %02x\n", space->device().safe_pc(), data);
111   //logerror("%04x: 68705 port C write %02x\n", space.device().safe_pc(), data);
112112   state->m_port_c_out = data;
113113}
114114
115115WRITE8_HANDLER( maniach_68705_ddr_c_w )
116116{
117   matmania_state *state = space->machine().driver_data<matmania_state>();
117   matmania_state *state = space.machine().driver_data<matmania_state>();
118118   state->m_ddr_c = data;
119119}
120120
121121
122122WRITE8_HANDLER( maniach_mcu_w )
123123{
124   matmania_state *state = space->machine().driver_data<matmania_state>();
124   matmania_state *state = space.machine().driver_data<matmania_state>();
125125
126   //logerror("%04x: 3040_w %02x\n", space->device().safe_pc(), data);
126   //logerror("%04x: 3040_w %02x\n", space.device().safe_pc(), data);
127127   state->m_from_main = data;
128128   state->m_main_sent = 1;
129129}
130130
131131READ8_HANDLER( maniach_mcu_r )
132132{
133   matmania_state *state = space->machine().driver_data<matmania_state>();
133   matmania_state *state = space.machine().driver_data<matmania_state>();
134134
135   //logerror("%04x: 3040_r %02x\n", space->device().safe_pc(), state->m_from_mcu);
135   //logerror("%04x: 3040_r %02x\n", space.device().safe_pc(), state->m_from_mcu);
136136   state->m_mcu_sent = 0;
137137   return state->m_from_mcu;
138138}
139139
140140READ8_HANDLER( maniach_mcu_status_r )
141141{
142   matmania_state *state = space->machine().driver_data<matmania_state>();
142   matmania_state *state = space.machine().driver_data<matmania_state>();
143143   int res = 0;
144144
145145   /* bit 0 = when 0, mcu has sent data to the main cpu */
146146   /* bit 1 = when 1, mcu is ready to receive data from main cpu */
147   //logerror("%04x: 3041_r\n", space->device().safe_pc());
147   //logerror("%04x: 3041_r\n", space.device().safe_pc());
148148   if (!state->m_mcu_sent)
149149      res |= 0x01;
150150   if (!state->m_main_sent)
trunk/src/mame/machine/harddriv.c
r17963r17964
123123
124124WRITE16_HANDLER( hd68k_irq_ack_w )
125125{
126   harddriv_state *state = space->machine().driver_data<harddriv_state>();
126   harddriv_state *state = space.machine().driver_data<harddriv_state>();
127127   state->m_irq_state = 0;
128   atarigen_update_interrupts(space->machine());
128   atarigen_update_interrupts(space.machine());
129129}
130130
131131
r17963r17964
154154
155155READ16_HANDLER( hd68k_gsp_io_r )
156156{
157   harddriv_state *state = space->machine().driver_data<harddriv_state>();
157   harddriv_state *state = space.machine().driver_data<harddriv_state>();
158158   UINT16 result;
159159   offset = (offset / 2) ^ 1;
160160   state->m_hd34010_host_access = TRUE;
r17963r17964
166166
167167WRITE16_HANDLER( hd68k_gsp_io_w )
168168{
169   harddriv_state *state = space->machine().driver_data<harddriv_state>();
169   harddriv_state *state = space.machine().driver_data<harddriv_state>();
170170   offset = (offset / 2) ^ 1;
171171   state->m_hd34010_host_access = TRUE;
172172   tms34010_host_w(state->m_gsp, offset, data);
r17963r17964
183183
184184READ16_HANDLER( hd68k_msp_io_r )
185185{
186   harddriv_state *state = space->machine().driver_data<harddriv_state>();
186   harddriv_state *state = space.machine().driver_data<harddriv_state>();
187187   UINT16 result;
188188   offset = (offset / 2) ^ 1;
189189   state->m_hd34010_host_access = TRUE;
r17963r17964
195195
196196WRITE16_HANDLER( hd68k_msp_io_w )
197197{
198   harddriv_state *state = space->machine().driver_data<harddriv_state>();
198   harddriv_state *state = space.machine().driver_data<harddriv_state>();
199199   offset = (offset / 2) ^ 1;
200200   if (state->m_msp != NULL)
201201   {
r17963r17964
230230            .....
231231        0x8000 = SW1 #1
232232    */
233   int temp = (space->machine().root_device().ioport("SW1")->read() << 8) | space->machine().root_device().ioport("IN0")->read();
234   if (atarigen_get_hblank(*space->machine().primary_screen)) temp ^= 0x0002;
233   int temp = (space.machine().root_device().ioport("SW1")->read() << 8) | space.machine().root_device().ioport("IN0")->read();
234   if (atarigen_get_hblank(*space.machine().primary_screen)) temp ^= 0x0002;
235235   temp ^= 0x0018;      /* both EOCs always high for now */
236236   return temp;
237237}
r17963r17964
239239
240240READ16_HANDLER( hdc68k_port1_r )
241241{
242   harddriv_state *state = space->machine().driver_data<harddriv_state>();
242   harddriv_state *state = space.machine().driver_data<harddriv_state>();
243243   UINT16 result = state->ioport("a80000")->read();
244244   UINT16 diff = result ^ state->m_hdc68k_last_port1;
245245
r17963r17964
268268
269269READ16_HANDLER( hda68k_port1_r )
270270{
271   harddriv_state *state = space->machine().driver_data<harddriv_state>();
271   harddriv_state *state = space.machine().driver_data<harddriv_state>();
272272   UINT16 result = state->ioport("a80000")->read();
273273
274274   /* merge in the wheel edge latch bit */
r17963r17964
281281
282282READ16_HANDLER( hdc68k_wheel_r )
283283{
284   harddriv_state *state = space->machine().driver_data<harddriv_state>();
284   harddriv_state *state = space.machine().driver_data<harddriv_state>();
285285
286286   /* grab the new wheel value and upconvert to 12 bits */
287287   UINT16 new_wheel = state->ioport("12BADC0")->read() << 4;
288288
289289   /* hack to display the wheel position */
290   if (space->machine().input().code_pressed(KEYCODE_LSHIFT))
290   if (space.machine().input().code_pressed(KEYCODE_LSHIFT))
291291      popmessage("%04X", new_wheel);
292292
293293   /* if we crossed the center line, latch the edge bit */
r17963r17964
302302
303303READ16_HANDLER( hd68k_adc8_r )
304304{
305   harddriv_state *state = space->machine().driver_data<harddriv_state>();
305   harddriv_state *state = space.machine().driver_data<harddriv_state>();
306306   return state->m_adc8_data;
307307}
308308
309309
310310READ16_HANDLER( hd68k_adc12_r )
311311{
312   harddriv_state *state = space->machine().driver_data<harddriv_state>();
312   harddriv_state *state = space.machine().driver_data<harddriv_state>();
313313   return state->m_adc12_byte ? ((state->m_adc12_data >> 8) & 0x0f) : (state->m_adc12_data & 0xff);
314314}
315315
316316
317317READ16_HANDLER( hd68k_sound_reset_r )
318318{
319   harddriv_state *state = space->machine().driver_data<harddriv_state>();
319   harddriv_state *state = space.machine().driver_data<harddriv_state>();
320320   if (state->m_jsacpu != NULL)
321321      atarijsa_reset();
322322   return ~0;
r17963r17964
334334{
335335   static const char *const adc8names[] = { "8BADC0", "8BADC1", "8BADC2", "8BADC3", "8BADC4", "8BADC5", "8BADC6", "8BADC7" };
336336   static const char *const adc12names[] = { "12BADC0", "12BADC1", "12BADC2", "12BADC3" };
337   harddriv_state *state = space->machine().driver_data<harddriv_state>();
337   harddriv_state *state = space.machine().driver_data<harddriv_state>();
338338
339339   COMBINE_DATA(&state->m_adc_control);
340340
r17963r17964
349349   if (state->m_adc_control & 0x40)
350350   {
351351      state->m_adc12_select = (state->m_adc_control >> 4) & 0x03;
352      state->m_adc12_data = space->machine().root_device().ioport(adc12names[state->m_adc12_select])->read() << 4;
352      state->m_adc12_data = space.machine().root_device().ioport(adc12names[state->m_adc12_select])->read() << 4;
353353   }
354354
355355   /* bit 7 selects which byte of the 12 bit data to read */
r17963r17964
376376
377377      case 6:   /* CC1 */
378378      case 7:   /* CC2 */
379         coin_counter_w(space->machine(), offset - 6, data);
379         coin_counter_w(space.machine(), offset - 6, data);
380380         break;
381381   }
382382}
r17963r17964
400400
401401WRITE16_HANDLER( hd68k_nwr_w )
402402{
403   harddriv_state *state = space->machine().driver_data<harddriv_state>();
403   harddriv_state *state = space.machine().driver_data<harddriv_state>();
404404
405405   /* bit 3 selects the value; data is ignored */
406406   data = (offset >> 3) & 1;
r17963r17964
411411   {
412412      case 0:   /* CR2 */
413413      case 1:   /* CR1 */
414         set_led_status(space->machine(), offset, data);
414         set_led_status(space.machine(), offset, data);
415415         break;
416416      case 2:   /* LC1 */
417417         break;
r17963r17964
440440WRITE16_HANDLER( hdc68k_wheel_edge_reset_w )
441441{
442442   /* reset the edge latch */
443   harddriv_state *state = space->machine().driver_data<harddriv_state>();
443   harddriv_state *state = space.machine().driver_data<harddriv_state>();
444444   state->m_hdc68k_wheel_edge = 0;
445445}
446446
r17963r17964
454454
455455READ16_HANDLER( hd68k_zram_r )
456456{
457   harddriv_state *state = space->machine().driver_data<harddriv_state>();
457   harddriv_state *state = space.machine().driver_data<harddriv_state>();
458458   return state->m_eeprom[offset];
459459}
460460
461461
462462WRITE16_HANDLER( hd68k_zram_w )
463463{
464   harddriv_state *state = space->machine().driver_data<harddriv_state>();
464   harddriv_state *state = space.machine().driver_data<harddriv_state>();
465465   if (state->m_m68k_zp1 == 0 && state->m_m68k_zp2 == 1)
466466      COMBINE_DATA(&state->m_eeprom[offset]);
467467}
r17963r17964
490490
491491WRITE16_HANDLER( hdgsp_io_w )
492492{
493   harddriv_state *state = space->machine().driver_data<harddriv_state>();
493   harddriv_state *state = space.machine().driver_data<harddriv_state>();
494494
495495   /* detect an enabling of the shift register and force yielding */
496496   if (offset == REG_DPYCTL)
r17963r17964
500500      {
501501         state->m_last_gsp_shiftreg = new_shiftreg;
502502         if (new_shiftreg)
503            space->device().execute().yield();
503            space.device().execute().yield();
504504      }
505505   }
506506
507507   /* detect changes to HEBLNK and HSBLNK and force an update before they change */
508508   if ((offset == REG_HEBLNK || offset == REG_HSBLNK) && data != tms34010_io_register_r(space, offset, 0xffff))
509      space->machine().primary_screen->update_partial(space->machine().primary_screen->vpos() - 1);
509      space.machine().primary_screen->update_partial(space.machine().primary_screen->vpos() - 1);
510510
511511   tms34010_io_register_w(space, offset, data, mem_mask);
512512}
r17963r17964
521521
522522WRITE16_HANDLER( hdgsp_protection_w )
523523{
524   harddriv_state *state = space->machine().driver_data<harddriv_state>();
524   harddriv_state *state = space.machine().driver_data<harddriv_state>();
525525
526526   /* this memory address is incremented whenever a protection check fails */
527527   /* after it reaches a certain value, the GSP will randomly trash a */
r17963r17964
543543
544544READ16_HANDLER( hd68k_adsp_program_r )
545545{
546   harddriv_state *state = space->machine().driver_data<harddriv_state>();
546   harddriv_state *state = space.machine().driver_data<harddriv_state>();
547547   UINT32 word = state->m_adsp_pgm_memory[offset/2];
548548   return (!(offset & 1)) ? (word >> 16) : (word & 0xffff);
549549}
r17963r17964
551551
552552WRITE16_HANDLER( hd68k_adsp_program_w )
553553{
554   harddriv_state *state = space->machine().driver_data<harddriv_state>();
554   harddriv_state *state = space.machine().driver_data<harddriv_state>();
555555   UINT32 *base = &state->m_adsp_pgm_memory[offset/2];
556556   UINT32 oldword = *base;
557557   UINT16 temp;
r17963r17964
581581
582582READ16_HANDLER( hd68k_adsp_data_r )
583583{
584   harddriv_state *state = space->machine().driver_data<harddriv_state>();
584   harddriv_state *state = space.machine().driver_data<harddriv_state>();
585585   return state->m_adsp_data_memory[offset];
586586}
587587
588588
589589WRITE16_HANDLER( hd68k_adsp_data_w )
590590{
591   harddriv_state *state = space->machine().driver_data<harddriv_state>();
591   harddriv_state *state = space.machine().driver_data<harddriv_state>();
592592
593593   COMBINE_DATA(&state->m_adsp_data_memory[offset]);
594594
595595   /* any write to $1FFF is taken to be a trigger; synchronize the CPUs */
596596   if (offset == 0x1fff)
597597   {
598      logerror("%06X:ADSP sync address written (%04X)\n", space->device().safe_pcbase(), data);
599      space->machine().scheduler().synchronize();
598      logerror("%06X:ADSP sync address written (%04X)\n", space.device().safe_pcbase(), data);
599      space.machine().scheduler().synchronize();
600600      state->m_adsp->signal_interrupt_trigger();
601601   }
602602   else
603      logerror("%06X:ADSP W@%04X (%04X)\n", space->device().safe_pcbase(), offset, data);
603      logerror("%06X:ADSP W@%04X (%04X)\n", space.device().safe_pcbase(), offset, data);
604604}
605605
606606
r17963r17964
613613
614614READ16_HANDLER( hd68k_adsp_buffer_r )
615615{
616   harddriv_state *state = space->machine().driver_data<harddriv_state>();
616   harddriv_state *state = space.machine().driver_data<harddriv_state>();
617617/*  logerror("hd68k_adsp_buffer_r(%04X)\n", offset);*/
618618   return state->m_som_memory[state->m_m68k_adsp_buffer_bank * 0x2000 + offset];
619619}
r17963r17964
621621
622622WRITE16_HANDLER( hd68k_adsp_buffer_w )
623623{
624   harddriv_state *state = space->machine().driver_data<harddriv_state>();
624   harddriv_state *state = space.machine().driver_data<harddriv_state>();
625625   COMBINE_DATA(&state->m_som_memory[state->m_m68k_adsp_buffer_bank * 0x2000 + offset]);
626626}
627627
r17963r17964
687687
688688WRITE16_HANDLER( hd68k_adsp_control_w )
689689{
690   harddriv_state *state = space->machine().driver_data<harddriv_state>();
690   harddriv_state *state = space.machine().driver_data<harddriv_state>();
691691
692692   /* bit 3 selects the value; data is ignored */
693693   int val = (offset >> 3) & 1;
r17963r17964
703703
704704      case 3:
705705         logerror("ADSP bank = %d (deferred)\n", val);
706         space->machine().scheduler().synchronize(FUNC(deferred_adsp_bank_switch), val);
706         space.machine().scheduler().synchronize(FUNC(deferred_adsp_bank_switch), val);
707707         break;
708708
709709      case 5:
r17963r17964
719719            /* a yield in this case is not enough */
720720            /* we would need to increase the interleaving otherwise */
721721            /* note that this only affects the test mode */
722            space->device().execute().spin();
722            space.device().execute().spin();
723723         }
724724         break;
725725
r17963r17964
736736            /* a yield in this case is not enough */
737737            /* we would need to increase the interleaving otherwise */
738738            /* note that this only affects the test mode */
739            space->device().execute().spin();
739            space.device().execute().spin();
740740         }
741741         break;
742742
743743      case 7:
744744         logerror("ADSP reset = %d\n", val);
745745         state->m_adsp->set_input_line(INPUT_LINE_RESET, val ? CLEAR_LINE : ASSERT_LINE);
746         space->device().execute().yield();
746         space.device().execute().yield();
747747         break;
748748
749749      default:
r17963r17964
755755
756756WRITE16_HANDLER( hd68k_adsp_irq_clear_w )
757757{
758   harddriv_state *state = space->machine().driver_data<harddriv_state>();
759   logerror("%06X:68k clears ADSP interrupt\n", space->device().safe_pcbase());
758   harddriv_state *state = space.machine().driver_data<harddriv_state>();
759   logerror("%06X:68k clears ADSP interrupt\n", space.device().safe_pcbase());
760760   state->m_adsp_irq_state = 0;
761   atarigen_update_interrupts(space->machine());
761   atarigen_update_interrupts(space.machine());
762762}
763763
764764
765765READ16_HANDLER( hd68k_adsp_irq_state_r )
766766{
767   harddriv_state *state = space->machine().driver_data<harddriv_state>();
767   harddriv_state *state = space.machine().driver_data<harddriv_state>();
768768   int result = 0xfffd;
769769   if (state->m_adsp_xflag) result ^= 2;
770770   if (state->m_adsp_irq_state) result ^= 1;
771   logerror("%06X:68k reads ADSP interrupt state = %04x\n", space->device().safe_pcbase(), result);
771   logerror("%06X:68k reads ADSP interrupt state = %04x\n", space.device().safe_pcbase(), result);
772772   return result;
773773}
774774
r17963r17964
782782
783783READ16_HANDLER( hdadsp_special_r )
784784{
785   harddriv_state *state = space->machine().driver_data<harddriv_state>();
785   harddriv_state *state = space.machine().driver_data<harddriv_state>();
786786   switch (offset & 7)
787787   {
788788      case 0:   /* /SIMBUF */
r17963r17964
801801         break;
802802
803803      default:
804         logerror("%04X:hdadsp_special_r(%04X)\n", space->device().safe_pcbase(), offset);
804         logerror("%04X:hdadsp_special_r(%04X)\n", space.device().safe_pcbase(), offset);
805805         break;
806806   }
807807   return 0;
r17963r17964
810810
811811WRITE16_HANDLER( hdadsp_special_w )
812812{
813   harddriv_state *state = space->machine().driver_data<harddriv_state>();
813   harddriv_state *state = space.machine().driver_data<harddriv_state>();
814814   switch (offset & 7)
815815   {
816816      case 1:   /* /SIMCLK */
r17963r17964
830830         break;
831831
832832      case 6:   /* /GINT */
833         logerror("%04X:ADSP signals interrupt\n", space->device().safe_pcbase());
833         logerror("%04X:ADSP signals interrupt\n", space.device().safe_pcbase());
834834         state->m_adsp_irq_state = 1;
835         atarigen_update_interrupts(space->machine());
835         atarigen_update_interrupts(space.machine());
836836         break;
837837
838838      case 7:   /* /MP */
r17963r17964
840840         break;
841841
842842      default:
843         logerror("%04X:hdadsp_special_w(%04X)=%04X\n", space->device().safe_pcbase(), offset, data);
843         logerror("%04X:hdadsp_special_w(%04X)=%04X\n", space.device().safe_pcbase(), offset, data);
844844         break;
845845   }
846846}
r17963r17964
870870
871871WRITE16_HANDLER( hd68k_ds3_control_w )
872872{
873   harddriv_state *state = space->machine().driver_data<harddriv_state>();
873   harddriv_state *state = space.machine().driver_data<harddriv_state>();
874874   int val = (offset >> 3) & 1;
875875
876876   switch (offset & 7)
r17963r17964
895895            /* a yield in this case is not enough */
896896            /* we would need to increase the interleaving otherwise */
897897            /* note that this only affects the test mode */
898            space->device().execute().spin();
898            space.device().execute().spin();
899899         }
900900         break;
901901
r17963r17964
911911            update_ds3_irq(state);
912912         }
913913         state->m_ds3_reset = val;
914         space->device().execute().yield();
914         space.device().execute().yield();
915915         logerror("DS III reset = %d\n", val);
916916         break;
917917
r17963r17964
935935
936936READ16_HANDLER( hd68k_ds3_girq_state_r )
937937{
938   harddriv_state *state = space->machine().driver_data<harddriv_state>();
938   harddriv_state *state = space.machine().driver_data<harddriv_state>();
939939   int result = 0x0fff;
940940   if (state->m_ds3_g68flag) result ^= 0x8000;
941941   if (state->m_ds3_gflag) result ^= 0x4000;
r17963r17964
947947
948948READ16_HANDLER( hd68k_ds3_gdata_r )
949949{
950   harddriv_state *state = space->machine().driver_data<harddriv_state>();
951   offs_t pc = space->device().safe_pc();
950   harddriv_state *state = space.machine().driver_data<harddriv_state>();
951   offs_t pc = space.device().safe_pc();
952952
953953   state->m_ds3_gflag = 0;
954954   update_ds3_irq(state);
955955
956   logerror("%06X:hd68k_ds3_gdata_r(%04X)\n", space->device().safe_pcbase(), state->m_ds3_gdata);
956   logerror("%06X:hd68k_ds3_gdata_r(%04X)\n", space.device().safe_pcbase(), state->m_ds3_gdata);
957957
958958   /* attempt to optimize the transfer if conditions are right */
959   if (&space->device() == state->m_maincpu && pc == state->m_ds3_transfer_pc &&
959   if (&space.device() == state->m_maincpu && pc == state->m_ds3_transfer_pc &&
960960      !(!state->m_ds3_g68flag && state->m_ds3_g68irqs) && !(state->m_ds3_gflag && state->m_ds3_gfirqs))
961961   {
962962      UINT32 destaddr = state->m_maincpu->state_int(M68K_A1);
r17963r17964
970970
971971      while (count68k > 0 && state->m_adsp_data_memory[0x16e6] > 0)
972972      {
973         space->write_word(destaddr, state->m_ds3_gdata);
973         space.write_word(destaddr, state->m_ds3_gdata);
974974         {
975975            state->m_adsp_data_memory[0x16e6]--;
976976            state->m_ds3_gdata = state->m_adsp_pgm_memory[i6] >> 8;
r17963r17964
986986   /* if we just cleared the IRQ, we are going to do some VERY timing critical reads */
987987   /* it is important that all the CPUs be in sync before we continue, so spin a little */
988988   /* while to let everyone else catch up */
989   space->device().execute().spin_until_trigger(DS3_TRIGGER);
990   space->machine().scheduler().trigger(DS3_TRIGGER, attotime::from_usec(5));
989   space.device().execute().spin_until_trigger(DS3_TRIGGER);
990   space.machine().scheduler().trigger(DS3_TRIGGER, attotime::from_usec(5));
991991
992992   return state->m_ds3_gdata;
993993}
r17963r17964
995995
996996WRITE16_HANDLER( hd68k_ds3_gdata_w )
997997{
998   harddriv_state *state = space->machine().driver_data<harddriv_state>();
998   harddriv_state *state = space.machine().driver_data<harddriv_state>();
999999
1000   logerror("%06X:hd68k_ds3_gdata_w(%04X)\n", space->device().safe_pcbase(), state->m_ds3_gdata);
1000   logerror("%06X:hd68k_ds3_gdata_w(%04X)\n", space.device().safe_pcbase(), state->m_ds3_gdata);
10011001
10021002   COMBINE_DATA(&state->m_ds3_g68data);
10031003   state->m_ds3_g68flag = 1;
r17963r17964
10391039
10401040READ16_HANDLER( hdds3_special_r )
10411041{
1042   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1042   harddriv_state *state = space.machine().driver_data<harddriv_state>();
10431043   int result;
10441044
10451045   switch (offset & 7)
r17963r17964
10691069
10701070WRITE16_HANDLER( hdds3_special_w )
10711071{
1072   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1072   harddriv_state *state = space.machine().driver_data<harddriv_state>();
10731073
10741074   /* IMPORTANT! these data values also write through to the underlying RAM */
10751075   state->m_adsp_data_memory[offset] = data;
r17963r17964
10771077   switch (offset & 7)
10781078   {
10791079      case 0:
1080         logerror("%04X:ADSP sets gdata to %04X\n", space->device().safe_pcbase(), data);
1080         logerror("%04X:ADSP sets gdata to %04X\n", space.device().safe_pcbase(), data);
10811081         state->m_ds3_gdata = data;
10821082         state->m_ds3_gflag = 1;
10831083         update_ds3_irq(state);
10841084
10851085         /* once we've written data, trigger the main CPU to wake up again */
1086         space->machine().scheduler().trigger(DS3_TRIGGER);
1086         space.machine().scheduler().trigger(DS3_TRIGGER);
10871087         break;
10881088
10891089      case 1:
1090         logerror("%04X:ADSP sets interrupt = %d\n", space->device().safe_pcbase(), (data >> 1) & 1);
1090         logerror("%04X:ADSP sets interrupt = %d\n", space.device().safe_pcbase(), (data >> 1) & 1);
10911091         state->m_adsp_irq_state = (data >> 1) & 1;
1092         hd68k_update_interrupts(space->machine());
1092         hd68k_update_interrupts(space.machine());
10931093         break;
10941094
10951095      case 2:
r17963r17964
11361136
11371137READ16_HANDLER( hd68k_ds3_program_r )
11381138{
1139   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1139   harddriv_state *state = space.machine().driver_data<harddriv_state>();
11401140   UINT32 *base = &state->m_adsp_pgm_memory[offset & 0x1fff];
11411141   UINT32 word = *base;
11421142   return (!(offset & 0x2000)) ? (word >> 8) : (word & 0xff);
r17963r17964
11451145
11461146WRITE16_HANDLER( hd68k_ds3_program_w )
11471147{
1148   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1148   harddriv_state *state = space.machine().driver_data<harddriv_state>();
11491149   UINT32 *base = &state->m_adsp_pgm_memory[offset & 0x1fff];
11501150   UINT32 oldword = *base;
11511151   UINT16 temp;
r17963r17964
11951195
11961196WRITE16_HANDLER( hd68k_dsk_control_w )
11971197{
1198   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1198   harddriv_state *state = space.machine().driver_data<harddriv_state>();
11991199   int val = (offset >> 3) & 1;
12001200   switch (offset & 7)
12011201   {
r17963r17964
12141214         break;
12151215
12161216      case 4:   /* ASIC65 reset */
1217         asic65_reset(space->machine(), !val);
1217         asic65_reset(space.machine(), !val);
12181218         break;
12191219
12201220      case 7:   /* LED */
r17963r17964
12361236
12371237READ16_HANDLER( hd68k_dsk_ram_r )
12381238{
1239   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1239   harddriv_state *state = space.machine().driver_data<harddriv_state>();
12401240   return state->m_dsk_ram[offset];
12411241}
12421242
12431243
12441244WRITE16_HANDLER( hd68k_dsk_ram_w )
12451245{
1246   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1246   harddriv_state *state = space.machine().driver_data<harddriv_state>();
12471247   COMBINE_DATA(&state->m_dsk_ram[offset]);
12481248}
12491249
12501250
12511251READ16_HANDLER( hd68k_dsk_zram_r )
12521252{
1253   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1253   harddriv_state *state = space.machine().driver_data<harddriv_state>();
12541254   return state->m_dsk_zram[offset];
12551255}
12561256
12571257
12581258WRITE16_HANDLER( hd68k_dsk_zram_w )
12591259{
1260   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1260   harddriv_state *state = space.machine().driver_data<harddriv_state>();
12611261   COMBINE_DATA(&state->m_dsk_zram[offset]);
12621262}
12631263
12641264
12651265READ16_HANDLER( hd68k_dsk_small_rom_r )
12661266{
1267   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1267   harddriv_state *state = space.machine().driver_data<harddriv_state>();
12681268   return state->m_dsk_rom[offset & 0x1ffff];
12691269}
12701270
12711271
12721272READ16_HANDLER( hd68k_dsk_rom_r )
12731273{
1274   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1274   harddriv_state *state = space.machine().driver_data<harddriv_state>();
12751275   return state->m_dsk_rom[offset];
12761276}
12771277
r17963r17964
12851285
12861286WRITE16_HANDLER( hd68k_dsk_dsp32_w )
12871287{
1288   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1288   harddriv_state *state = space.machine().driver_data<harddriv_state>();
12891289   state->m_dsk_pio_access = TRUE;
12901290   state->m_dsp32->pio_w(offset, data);
12911291   state->m_dsk_pio_access = FALSE;
r17963r17964
12941294
12951295READ16_HANDLER( hd68k_dsk_dsp32_r )
12961296{
1297   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1297   harddriv_state *state = space.machine().driver_data<harddriv_state>();
12981298   UINT16 result;
12991299   state->m_dsk_pio_access = TRUE;
13001300   result = state->m_dsp32->pio_r(offset);
r17963r17964
13181318
13191319WRITE32_HANDLER( rddsp32_sync0_w )
13201320{
1321   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1321   harddriv_state *state = space.machine().driver_data<harddriv_state>();
13221322   if (state->m_dsk_pio_access)
13231323   {
13241324      UINT32 *dptr = &state->m_rddsp32_sync[0][offset];
r17963r17964
13261326      COMBINE_DATA(&newdata);
13271327      state->m_dataptr[state->m_next_msp_sync % MAX_MSP_SYNC] = dptr;
13281328      state->m_dataval[state->m_next_msp_sync % MAX_MSP_SYNC] = newdata;
1329      space->machine().scheduler().synchronize(FUNC(rddsp32_sync_cb), state->m_next_msp_sync++ % MAX_MSP_SYNC);
1329      space.machine().scheduler().synchronize(FUNC(rddsp32_sync_cb), state->m_next_msp_sync++ % MAX_MSP_SYNC);
13301330   }
13311331   else
13321332      COMBINE_DATA(&state->m_rddsp32_sync[0][offset]);
r17963r17964
13351335
13361336WRITE32_HANDLER( rddsp32_sync1_w )
13371337{
1338   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1338   harddriv_state *state = space.machine().driver_data<harddriv_state>();
13391339   if (state->m_dsk_pio_access)
13401340   {
13411341      UINT32 *dptr = &state->m_rddsp32_sync[1][offset];
r17963r17964
13431343      COMBINE_DATA(&newdata);
13441344      state->m_dataptr[state->m_next_msp_sync % MAX_MSP_SYNC] = dptr;
13451345      state->m_dataval[state->m_next_msp_sync % MAX_MSP_SYNC] = newdata;
1346      space->machine().scheduler().synchronize(FUNC(rddsp32_sync_cb), state->m_next_msp_sync++ % MAX_MSP_SYNC);
1346      space.machine().scheduler().synchronize(FUNC(rddsp32_sync_cb), state->m_next_msp_sync++ % MAX_MSP_SYNC);
13471347   }
13481348   else
13491349      COMBINE_DATA(&state->m_rddsp32_sync[1][offset]);
r17963r17964
13681368   switch (offset & 7)
13691369   {
13701370      case 2:   /* ASIC65 reset */
1371         asic65_reset(space->machine(), !val);
1371         asic65_reset(space.machine(), !val);
13721372         break;
13731373
13741374      default:
r17963r17964
13981398
13991399READ16_HANDLER( rd68k_slapstic_r )
14001400{
1401   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1401   harddriv_state *state = space.machine().driver_data<harddriv_state>();
14021402   int bank = slapstic_tweak(space, offset & 0x3fff) * 0x4000;
14031403   return state->m_m68k_slapstic_base[bank + (offset & 0x3fff)];
14041404}
r17963r17964
14401440
14411441WRITE16_HANDLER( st68k_sloop_w )
14421442{
1443   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1443   harddriv_state *state = space.machine().driver_data<harddriv_state>();
14441444   st68k_sloop_tweak(state, offset & 0x3fff);
14451445}
14461446
14471447
14481448READ16_HANDLER( st68k_sloop_r )
14491449{
1450   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1450   harddriv_state *state = space.machine().driver_data<harddriv_state>();
14511451   int bank = st68k_sloop_tweak(state, offset) * 0x4000;
14521452   return state->m_m68k_slapstic_base[bank + (offset & 0x3fff)];
14531453}
r17963r17964
14551455
14561456READ16_HANDLER( st68k_sloop_alt_r )
14571457{
1458   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1458   harddriv_state *state = space.machine().driver_data<harddriv_state>();
14591459   if (state->m_st68k_last_alt_sloop_offset == 0x00fe)
14601460   {
14611461      switch (offset*2)
r17963r17964
15081508
15091509WRITE16_HANDLER( st68k_protosloop_w )
15101510{
1511   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1511   harddriv_state *state = space.machine().driver_data<harddriv_state>();
15121512   st68k_protosloop_tweak(state, offset & 0x3fff);
15131513}
15141514
15151515
15161516READ16_HANDLER( st68k_protosloop_r )
15171517{
1518   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1518   harddriv_state *state = space.machine().driver_data<harddriv_state>();
15191519   int bank = st68k_protosloop_tweak(state, offset) * 0x4000;
15201520   return state->m_m68k_slapstic_base[bank + (offset & 0x3fff)];
15211521}
r17963r17964
15381538
15391539READ16_HANDLER( hdgsp_speedup_r )
15401540{
1541   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1541   harddriv_state *state = space.machine().driver_data<harddriv_state>();
15421542   int result = state->m_gsp_speedup_addr[0][offset];
15431543
15441544   /* if both this address and the other important address are not $ffff */
15451545   /* then we can spin until something gets written */
15461546   if (result != 0xffff && state->m_gsp_speedup_addr[1][0] != 0xffff &&
1547      &space->device() == state->m_gsp && space->device().safe_pc() == state->m_gsp_speedup_pc)
1547      &space.device() == state->m_gsp && space.device().safe_pc() == state->m_gsp_speedup_pc)
15481548   {
15491549      state->m_gsp_speedup_count[0]++;
1550      space->device().execute().spin_until_interrupt();
1550      space.device().execute().spin_until_interrupt();
15511551   }
15521552
15531553   return result;
r17963r17964
15561556
15571557WRITE16_HANDLER( hdgsp_speedup1_w )
15581558{
1559   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1559   harddriv_state *state = space.machine().driver_data<harddriv_state>();
15601560
15611561   COMBINE_DATA(&state->m_gsp_speedup_addr[0][offset]);
15621562
r17963r17964
15681568
15691569WRITE16_HANDLER( hdgsp_speedup2_w )
15701570{
1571   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1571   harddriv_state *state = space.machine().driver_data<harddriv_state>();
15721572
15731573   COMBINE_DATA(&state->m_gsp_speedup_addr[1][offset]);
15741574
r17963r17964
15891589
15901590READ16_HANDLER( rdgsp_speedup1_r )
15911591{
1592   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1592   harddriv_state *state = space.machine().driver_data<harddriv_state>();
15931593   int result = state->m_gsp_speedup_addr[0][offset];
15941594
15951595   /* if this address is equal to $f000, spin until something gets written */
1596   if (&space->device() == state->m_gsp && space->device().safe_pc() == state->m_gsp_speedup_pc &&
1597      (result & 0xff) < space->device().state().state_int(TMS34010_A1))
1596   if (&space.device() == state->m_gsp && space.device().safe_pc() == state->m_gsp_speedup_pc &&
1597      (result & 0xff) < space.device().state().state_int(TMS34010_A1))
15981598   {
15991599      state->m_gsp_speedup_count[0]++;
1600      space->device().execute().spin_until_interrupt();
1600      space.device().execute().spin_until_interrupt();
16011601   }
16021602
16031603   return result;
r17963r17964
16061606
16071607WRITE16_HANDLER( rdgsp_speedup1_w )
16081608{
1609   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1609   harddriv_state *state = space.machine().driver_data<harddriv_state>();
16101610   COMBINE_DATA(&state->m_gsp_speedup_addr[0][offset]);
1611   if (&space->device() != state->m_gsp)
1611   if (&space.device() != state->m_gsp)
16121612      state->m_gsp->signal_interrupt_trigger();
16131613}
16141614
r17963r17964
16271627
16281628READ16_HANDLER( hdmsp_speedup_r )
16291629{
1630   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1630   harddriv_state *state = space.machine().driver_data<harddriv_state>();
16311631   int data = state->m_msp_speedup_addr[offset];
16321632
1633   if (data == 0 && &space->device() == state->m_msp && space->device().safe_pc() == state->m_msp_speedup_pc)
1633   if (data == 0 && &space.device() == state->m_msp && space.device().safe_pc() == state->m_msp_speedup_pc)
16341634   {
16351635      state->m_msp_speedup_count[0]++;
1636      space->device().execute().spin_until_interrupt();
1636      space.device().execute().spin_until_interrupt();
16371637   }
16381638
16391639   return data;
r17963r17964
16421642
16431643WRITE16_HANDLER( hdmsp_speedup_w )
16441644{
1645   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1645   harddriv_state *state = space.machine().driver_data<harddriv_state>();
16461646   COMBINE_DATA(&state->m_msp_speedup_addr[offset]);
16471647   if (offset == 0 && state->m_msp_speedup_addr[offset] != 0)
16481648      state->m_msp->signal_interrupt_trigger();
r17963r17964
16621662
16631663READ16_HANDLER( hdadsp_speedup_r )
16641664{
1665   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1665   harddriv_state *state = space.machine().driver_data<harddriv_state>();
16661666   int data = state->m_adsp_data_memory[0x1fff];
16671667
1668   if (data == 0xffff && &space->device() == state->m_adsp && space->device().safe_pc() <= 0x3b)
1668   if (data == 0xffff && &space.device() == state->m_adsp && space.device().safe_pc() <= 0x3b)
16691669   {
16701670      state->m_adsp_speedup_count[0]++;
1671      space->device().execute().spin_until_interrupt();
1671      space.device().execute().spin_until_interrupt();
16721672   }
16731673
16741674   return data;
r17963r17964
16771677
16781678READ16_HANDLER( hdds3_speedup_r )
16791679{
1680   harddriv_state *state = space->machine().driver_data<harddriv_state>();
1680   harddriv_state *state = space.machine().driver_data<harddriv_state>();
16811681   int data = *state->m_ds3_speedup_addr;
16821682
1683   if (data != 0 && &space->device() == state->m_adsp && space->device().safe_pc() == state->m_ds3_speedup_pc)
1683   if (data != 0 && &space.device() == state->m_adsp && space.device().safe_pc() == state->m_ds3_speedup_pc)
16841684   {
16851685      state->m_adsp_speedup_count[2]++;
1686      space->device().execute().spin_until_interrupt();
1686      space.device().execute().spin_until_interrupt();
16871687   }
16881688
16891689   return data;
trunk/src/mame/machine/segacrpt.c
r17963r17964
217217{
218218   int A;
219219
220   address_space *space = machine.device(cputag)->memory().space(AS_PROGRAM);
220   address_space &space = *machine.device(cputag)->memory().space(AS_PROGRAM);
221221   int length = machine.root_device().memregion(cputag)->bytes();
222222   int cryptlen = MIN(length, 0x8000);
223223   UINT8 *rom = machine.root_device().memregion(cputag)->base();
224224   UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0xc000);
225225
226   space->set_decrypted_region(0x0000, cryptlen - 1, decrypted);
226   space.set_decrypted_region(0x0000, cryptlen - 1, decrypted);
227227
228228   for (A = 0x0000;A < cryptlen;A++)
229229   {
r17963r17964
439439
440440   int A;
441441
442   address_space *space = machine.device(cputag)->memory().space(AS_PROGRAM);
442   address_space &space = *machine.device(cputag)->memory().space(AS_PROGRAM);
443443   UINT8 *rom = machine.root_device().memregion(regiontag)->base();
444444   int bankstart;
445445   decrypted = auto_alloc_array(machine, UINT8, 0x6000*3);
r17963r17964
473473
474474   machine.root_device().membank("bank1")->configure_entries(0,3, machine.root_device().memregion(regiontag)->base(),0x6000);
475475   machine.root_device().membank("bank1")->configure_decrypted_entries(0,3,decrypted,0x6000);
476   space->set_decrypted_region(0x0000, 0x5fff, decrypted);
477   space->machine().root_device().membank("bank1")->set_entry(0);
476   space.set_decrypted_region(0x0000, 0x5fff, decrypted);
477   space.machine().root_device().membank("bank1")->set_entry(0);
478478}
479479
480480
r17963r17964
797797
798798   int A;
799799
800   address_space *space = machine.device(cputag)->memory().space(AS_PROGRAM);
800   address_space &space = *machine.device(cputag)->memory().space(AS_PROGRAM);
801801   UINT8 *rom = machine.root_device().memregion(cputag)->base();
802802   decrypted = auto_alloc_array(machine, UINT8, 0x9000);
803803
r17963r17964
832832
833833   machine.root_device().membank("bank1")->configure_entries(0,8, machine.root_device().memregion(cputag)->base()+0x7000,0x0400);
834834   machine.root_device().membank("bank1")->configure_decrypted_entries(0,8,decrypted+0x7000,0x0400);
835   space->set_decrypted_region(0x0000, 0x6bff, decrypted);
835   space.set_decrypted_region(0x0000, 0x6bff, decrypted);
836836   machine.root_device().membank("bank1")->set_entry(0);
837837}
838838
trunk/src/mame/machine/psx.c
r17963r17964
3535
3636WRITE32_HANDLER( psx_com_delay_w )
3737{
38   psx_state *p_psx = space->machine().driver_data<psx_state>();
38   psx_state *p_psx = space.machine().driver_data<psx_state>();
3939
4040   COMBINE_DATA( &p_psx->n_com_delay );
4141   verboselog( p_psx, 1, "psx_com_delay_w( %08x %08x )\n", data, mem_mask );
r17963r17964
4343
4444READ32_HANDLER( psx_com_delay_r )
4545{
46   psx_state *p_psx = space->machine().driver_data<psx_state>();
46   psx_state *p_psx = space.machine().driver_data<psx_state>();
4747
4848   verboselog( p_psx, 1, "psx_com_delay_r( %08x )\n", mem_mask );
4949   return p_psx->n_com_delay;
r17963r17964
7272
7373READ32_HANDLER( psx_gpu_r )
7474{
75   psxgpu_device *gpu = downcast<psxgpu_device *>( space->machine().device("gpu") );
76   return gpu->read( *space, offset, mem_mask );
75   psxgpu_device *gpu = downcast<psxgpu_device *>( space.machine().device("gpu") );
76   return gpu->read( space, offset, mem_mask );
7777}
7878
7979WRITE32_HANDLER( psx_gpu_w )
8080{
81   psxgpu_device *gpu = downcast<psxgpu_device *>( space->machine().device("gpu") );
82   gpu->write( *space, offset, data, mem_mask );
81   psxgpu_device *gpu = downcast<psxgpu_device *>( space.machine().device("gpu") );
82   gpu->write( space, offset, data, mem_mask );
8383}
8484
8585void psx_lightgun_set( running_machine &machine, int n_x, int n_y )
trunk/src/mame/machine/megacd.c
r17963r17964
886886
887887void CDC_Do_DMA(running_machine& machine, int rate)
888888{
889   address_space* space = machine.device(":segacd:segacd_68k")->memory().space(AS_PROGRAM);
889   address_space& space = *machine.device(":segacd:segacd_68k")->memory().space(AS_PROGRAM);
890890
891891   UINT32 dstoffset, length;
892892   UINT8 *dest;
r17963r17964
949949
950950      if (PCM_DMA)
951951      {
952         space->write_byte(0xff2000+(((dstoffset*2)+1)&0x1fff),data >> 8);
953         space->write_byte(0xff2000+(((dstoffset*2)+3)&0x1fff),data & 0xff);
952         space.write_byte(0xff2000+(((dstoffset*2)+1)&0x1fff),data >> 8);
953         space.write_byte(0xff2000+(((dstoffset*2)+3)&0x1fff),data & 0xff);
954954      //  printf("PCM_DMA writing %04x %04x\n",0xff2000+(dstoffset*2), data);
955955      }
956956      else
r17963r17964
967967                  dest[dstoffset+1] = data >>8;
968968                  dest[dstoffset+0] = data&0xff;
969969
970                  segacd_mark_tiles_dirty(space->machine(), dstoffset/2);
970                  segacd_mark_tiles_dirty(space.machine(), dstoffset/2);
971971               }
972972               else
973973               {
r17963r17964
975975
976976                  if (!(scd_rammode & 1))
977977                  {
978                     segacd_1meg_mode_word_write(space->machine(),(dstoffset+0x20000)/2, data, 0xffff, 0);
978                     segacd_1meg_mode_word_write(space.machine(),(dstoffset+0x20000)/2, data, 0xffff, 0);
979979                  }
980980                  else
981981                  {
982                     segacd_1meg_mode_word_write(space->machine(),(dstoffset+0x00000)/2, data, 0xffff, 0);
982                     segacd_1meg_mode_word_write(space.machine(),(dstoffset+0x00000)/2, data, 0xffff, 0);
983983                  }
984984               }
985985
r17963r17964
12331233
12341234static WRITE16_HANDLER( scd_a12000_halt_reset_w )
12351235{
1236   if (SEGACD_FORCE_SYNCS) space->machine().scheduler().synchronize();
1236   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
12371237
12381238   UINT16 old_halt = a12000_halt_reset_reg;
12391239
r17963r17964
12441244      // reset line
12451245      if (a12000_halt_reset_reg&0x0001)
12461246      {
1247         space->machine().device(":segacd:segacd_68k")->execute().set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
1247         space.machine().device(":segacd:segacd_68k")->execute().set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
12481248         if (!(old_halt&0x0001)) printf("clear reset slave\n");
12491249      }
12501250      else
12511251      {
1252         space->machine().device(":segacd:segacd_68k")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
1252         space.machine().device(":segacd:segacd_68k")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
12531253         if ((old_halt&0x0001)) printf("assert reset slave\n");
12541254      }
12551255
12561256      // request BUS
12571257      if (a12000_halt_reset_reg&0x0002)
12581258      {
1259         space->machine().device(":segacd:segacd_68k")->execute().set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
1259         space.machine().device(":segacd:segacd_68k")->execute().set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
12601260         if (!(old_halt&0x0002)) printf("halt slave\n");
12611261      }
12621262      else
12631263      {
1264         space->machine().device(":segacd:segacd_68k")->execute().set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
1264         space.machine().device(":segacd:segacd_68k")->execute().set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
12651265         if ((old_halt&0x0002)) printf("resume slave\n");
12661266      }
12671267   }
r17963r17964
12701270   {
12711271      if (a12000_halt_reset_reg&0x0100)
12721272      {
1273         running_machine& machine = space->machine();
1273         running_machine& machine = space.machine();
12741274         CHECK_SCD_LV2_INTERRUPT
12751275      }
12761276
r17963r17964
12861286
12871287static READ16_HANDLER( scd_a12000_halt_reset_r )
12881288{
1289   if (SEGACD_FORCE_SYNCS) space->machine().scheduler().synchronize();
1289   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
12901290
12911291   return a12000_halt_reset_reg;
12921292}
r17963r17964
13051305
13061306static READ16_HANDLER( scd_a12002_memory_mode_r )
13071307{
1308   if (SEGACD_FORCE_SYNCS) space->machine().scheduler().synchronize();
1308   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
13091309
13101310   int temp = scd_rammode;
13111311   int temp2 = 0;
r17963r17964
13431343
13441344static WRITE8_HANDLER( scd_a12002_memory_mode_w_0_7 )
13451345{
1346   if (SEGACD_FORCE_SYNCS) space->machine().scheduler().synchronize();
1346   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
13471347
13481348
13491349   //printf("scd_a12002_memory_mode_w_0_7 %04x\n",data);
r17963r17964
13691369
13701370static WRITE16_HANDLER( scd_a12002_memory_mode_w )
13711371{
1372   if (SEGACD_FORCE_SYNCS) space->machine().scheduler().synchronize();
1372   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
13731373
13741374   if (ACCESSING_BITS_8_15)
13751375      scd_a12002_memory_mode_w_8_15(space, 0, data>>8);
r17963r17964
13831383
13841384static READ16_HANDLER( segacd_sub_memory_mode_r )
13851385{
1386   if (SEGACD_FORCE_SYNCS) space->machine().scheduler().synchronize();
1386   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
13871387
13881388   int temp = scd_rammode;
13891389   int temp2 = 0;
r17963r17964
14051405
14061406WRITE8_HANDLER( segacd_sub_memory_mode_w_0_7 )
14071407{
1408   if (SEGACD_FORCE_SYNCS) space->machine().scheduler().synchronize();
1408   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
14091409
14101410
14111411   segacd_memory_priority_mode = (data&0x0018)>>3;
r17963r17964
14651465static WRITE16_HANDLER( segacd_sub_memory_mode_w )
14661466{
14671467   //printf("segacd_sub_memory_mode_w %04x %04x\n", data, mem_mask);
1468   if (SEGACD_FORCE_SYNCS) space->machine().scheduler().synchronize();
1468   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
14691469
14701470   if (ACCESSING_BITS_8_15)
14711471      segacd_sub_memory_mode_w_8_15(space, 0, data>>8);
r17963r17964
14881488
14891489static READ16_HANDLER( segacd_comms_flags_r )
14901490{
1491   if (SEGACD_FORCE_SYNCS) space->machine().scheduler().synchronize();
1491   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
14921492   return segacd_comms_flags;
14931493}
14941494
14951495static WRITE16_HANDLER( segacd_comms_flags_subcpu_w )
14961496{
1497   if (SEGACD_FORCE_SYNCS) space->machine().scheduler().synchronize();
1497   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
14981498
14991499   if (ACCESSING_BITS_8_15) // Dragon's Lair
15001500   {
r17963r17964
15101510
15111511static WRITE16_HANDLER( segacd_comms_flags_maincpu_w )
15121512{
1513   if (SEGACD_FORCE_SYNCS) space->machine().scheduler().synchronize();
1513   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
15141514
15151515   if (ACCESSING_BITS_8_15)
15161516   {
r17963r17964
15611561
15621562static READ16_HANDLER( segacd_comms_main_part1_r )
15631563{
1564   if (SEGACD_FORCE_SYNCS) space->machine().scheduler().synchronize();
1564   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
15651565   return segacd_comms_part1[offset];
15661566}
15671567
15681568static WRITE16_HANDLER( segacd_comms_main_part1_w )
15691569{
1570   if (SEGACD_FORCE_SYNCS) space->machine().scheduler().synchronize();
1570   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
15711571   COMBINE_DATA(&segacd_comms_part1[offset]);
15721572}
15731573
15741574static READ16_HANDLER( segacd_comms_main_part2_r )
15751575{
1576   if (SEGACD_FORCE_SYNCS) space->machine().scheduler().synchronize();
1576   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
15771577   return segacd_comms_part2[offset];
15781578}
15791579
r17963r17964
15851585
15861586static READ16_HANDLER( segacd_comms_sub_part1_r )
15871587{
1588   if (SEGACD_FORCE_SYNCS) space->machine().scheduler().synchronize();
1588   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
15891589   return segacd_comms_part1[offset];
15901590}
15911591
r17963r17964
15961596
15971597static READ16_HANDLER( segacd_comms_sub_part2_r )
15981598{
1599   if (SEGACD_FORCE_SYNCS) space->machine().scheduler().synchronize();
1599   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
16001600   return segacd_comms_part2[offset];
16011601}
16021602
16031603static WRITE16_HANDLER( segacd_comms_sub_part2_w )
16041604{
1605   if (SEGACD_FORCE_SYNCS) space->machine().scheduler().synchronize();
1605   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
16061606   COMBINE_DATA(&segacd_comms_part2[offset]);
16071607}
16081608
r17963r17964
17201720      if (!(scd_rammode&1))
17211721      {
17221722         COMBINE_DATA(&segacd_dataram[offset]);
1723         segacd_mark_tiles_dirty(space->machine(), offset);
1723         segacd_mark_tiles_dirty(space.machine(), offset);
17241724      }
17251725      else
17261726      {
r17963r17964
17381738         // ret bit set by sub cpu determines which half of WorkRAM we have access to?
17391739         if (scd_rammode&1)
17401740         {
1741            segacd_1meg_mode_word_write(space->machine(), offset+0x20000/2, data, mem_mask, 0);
1741            segacd_1meg_mode_word_write(space.machine(), offset+0x20000/2, data, mem_mask, 0);
17421742         }
17431743         else
17441744         {
1745            segacd_1meg_mode_word_write(space->machine(), offset+0x00000/2, data, mem_mask, 0);
1745            segacd_1meg_mode_word_write(space.machine(), offset+0x00000/2, data, mem_mask, 0);
17461746         }
17471747      }
17481748      else
r17963r17964
17711771
17721772static READ16_HANDLER( scd_a12006_hint_register_r )
17731773{
1774   if (SEGACD_FORCE_SYNCS) space->machine().scheduler().synchronize();
1774   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
17751775   return segacd_hint_register;
17761776}
17771777
17781778static WRITE16_HANDLER( scd_a12006_hint_register_w )
17791779{
1780   if (SEGACD_FORCE_SYNCS) space->machine().scheduler().synchronize();
1780   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
17811781   COMBINE_DATA(&segacd_hint_register);
17821782}
17831783
r17963r17964
22752275
22762276READ16_HANDLER( cdc_data_sub_r )
22772277{
2278   return CDC_Host_r(space->machine(), READ_SUB);
2278   return CDC_Host_r(space.machine(), READ_SUB);
22792279}
22802280
22812281READ16_HANDLER( cdc_data_main_r )
22822282{
2283   return CDC_Host_r(space->machine(), READ_MAIN);
2283   return CDC_Host_r(space.machine(), READ_MAIN);
22842284}
22852285
22862286
r17963r17964
23042304/* main CPU map set up in INIT */
23052305void segacd_init_main_cpu( running_machine& machine )
23062306{
2307   address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
2307   address_space& space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
23082308
23092309   segacd_font_bits = reinterpret_cast<UINT16 *>(machine.root_device().memshare(":segacd:segacd_font")->ptr());
23102310   segacd_backupram = reinterpret_cast<UINT16 *>(machine.root_device().memshare(":segacd:backupram")->ptr());
r17963r17964
23152315   segacd_4meg_prgbank = 0;
23162316
23172317
2318   space->unmap_readwrite        (0x020000,0x3fffff);
2318   space.unmap_readwrite        (0x020000,0x3fffff);
23192319
2320//  space->install_read_bank(0x0020000, 0x003ffff, "scd_4m_prgbank");
2321//  space->machine().root_device().membank("scd_4m_prgbank")->set_base(segacd_4meg_prgram + segacd_4meg_prgbank * 0x20000 );
2322   space->install_legacy_read_handler (0x0020000, 0x003ffff, FUNC(scd_4m_prgbank_ram_r) );
2323   space->install_legacy_write_handler (0x0020000, 0x003ffff, FUNC(scd_4m_prgbank_ram_w) );
2320//  space.install_read_bank(0x0020000, 0x003ffff, "scd_4m_prgbank");
2321//  space.machine().root_device().membank("scd_4m_prgbank")->set_base(segacd_4meg_prgram + segacd_4meg_prgbank * 0x20000 );
2322   space.install_legacy_read_handler (0x0020000, 0x003ffff, FUNC(scd_4m_prgbank_ram_r) );
2323   space.install_legacy_write_handler (0x0020000, 0x003ffff, FUNC(scd_4m_prgbank_ram_w) );
23242324   segacd_wordram_mapped = 1;
23252325
23262326
2327   space->machine().device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x200000, 0x23ffff, FUNC(segacd_main_dataram_part1_r), FUNC(segacd_main_dataram_part1_w)); // RAM shared with sub
2327   space.machine().device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x200000, 0x23ffff, FUNC(segacd_main_dataram_part1_r), FUNC(segacd_main_dataram_part1_w)); // RAM shared with sub
23282328
2329   space->machine().device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0xa12000, 0xa12001, FUNC(scd_a12000_halt_reset_r), FUNC(scd_a12000_halt_reset_w)); // sub-cpu control
2330   space->machine().device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0xa12002, 0xa12003, FUNC(scd_a12002_memory_mode_r), FUNC(scd_a12002_memory_mode_w)); // memory mode / write protect
2331   //space->machine().device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0xa12004, 0xa12005, FUNC(segacd_cdc_mode_address_r), FUNC(segacd_cdc_mode_address_w));
2332   space->machine().device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0xa12006, 0xa12007, FUNC(scd_a12006_hint_register_r), FUNC(scd_a12006_hint_register_w)); // where HINT points on main CPU
2333   //space->machine().device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler     (0xa12008, 0xa12009, FUNC(cdc_data_main_r));
2329   space.machine().device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0xa12000, 0xa12001, FUNC(scd_a12000_halt_reset_r), FUNC(scd_a12000_halt_reset_w)); // sub-cpu control
2330   space.machine().device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0xa12002, 0xa12003, FUNC(scd_a12002_memory_mode_r), FUNC(scd_a12002_memory_mode_w)); // memory mode / write protect
2331   //space.machine().device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0xa12004, 0xa12005, FUNC(segacd_cdc_mode_address_r), FUNC(segacd_cdc_mode_address_w));
2332   space.machine().device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0xa12006, 0xa12007, FUNC(scd_a12006_hint_register_r), FUNC(scd_a12006_hint_register_w)); // where HINT points on main CPU
2333   //space.machine().device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler     (0xa12008, 0xa12009, FUNC(cdc_data_main_r));
23342334
23352335
2336   space->machine().device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0xa1200c, 0xa1200d, FUNC(segacd_stopwatch_timer_r), FUNC(segacd_stopwatch_timer_w)); // starblad
2336   space.machine().device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0xa1200c, 0xa1200d, FUNC(segacd_stopwatch_timer_r), FUNC(segacd_stopwatch_timer_w)); // starblad
23372337
2338   space->machine().device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0xa1200e, 0xa1200f, FUNC(segacd_comms_flags_r), FUNC(segacd_comms_flags_maincpu_w)); // communication flags block
2338   space.machine().device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0xa1200e, 0xa1200f, FUNC(segacd_comms_flags_r), FUNC(segacd_comms_flags_maincpu_w)); // communication flags block
23392339
2340   space->machine().device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0xa12010, 0xa1201f, FUNC(segacd_comms_main_part1_r), FUNC(segacd_comms_main_part1_w));
2341   space->machine().device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0xa12020, 0xa1202f, FUNC(segacd_comms_main_part2_r), FUNC(segacd_comms_main_part2_w));
2340   space.machine().device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0xa12010, 0xa1201f, FUNC(segacd_comms_main_part1_r), FUNC(segacd_comms_main_part1_w));
2341   space.machine().device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0xa12020, 0xa1202f, FUNC(segacd_comms_main_part2_r), FUNC(segacd_comms_main_part2_w));
23422342
23432343
23442344
23452345   machine.device(":segacd:segacd_68k")->execute().set_irq_acknowledge_callback(segacd_sub_int_callback);
23462346
2347   space->install_legacy_read_handler (0x0000070, 0x0000073, FUNC(scd_hint_vector_r) );
2347   space.install_legacy_read_handler (0x0000070, 0x0000073, FUNC(scd_hint_vector_r) );
23482348
23492349   segacd_gfx_conversion_timer = machine.scheduler().timer_alloc(FUNC(segacd_gfx_conversion_timer_callback));
23502350   segacd_gfx_conversion_timer->adjust(attotime::never);
r17963r17964
25512551      if (scd_rammode&1)
25522552      {
25532553         COMBINE_DATA(&segacd_dataram[offset]);
2554         segacd_mark_tiles_dirty(space->machine(), offset);
2554         segacd_mark_tiles_dirty(space.machine(), offset);
25552555      }
25562556      else
25572557      {
r17963r17964
25782578
25792579      if (scd_rammode&1)
25802580      {
2581         segacd_1meg_mode_word_write(space->machine(), offset/2+0x00000/2, data , mem_mask, 1);
2581         segacd_1meg_mode_word_write(space.machine(), offset/2+0x00000/2, data , mem_mask, 1);
25822582      }
25832583      else
25842584      {
2585         segacd_1meg_mode_word_write(space->machine(), offset/2+0x20000/2, data, mem_mask, 1);
2585         segacd_1meg_mode_word_write(space.machine(), offset/2+0x20000/2, data, mem_mask, 1);
25862586      }
25872587
25882588   //  printf("Unspported: segacd_sub_dataram_part1_w in mode 1 (Word RAM Expander - 1 Byte Per Pixel) %04x\n", data);
r17963r17964
26262626      // ret bit set by sub cpu determines which half of WorkRAM we have access to?
26272627      if (scd_rammode&1)
26282628      {
2629         segacd_1meg_mode_word_write(space->machine(),offset+0x00000/2, data, mem_mask, 0);
2629         segacd_1meg_mode_word_write(space.machine(),offset+0x00000/2, data, mem_mask, 0);
26302630      }
26312631      else
26322632      {
2633         segacd_1meg_mode_word_write(space->machine(),offset+0x20000/2, data, mem_mask, 0);
2633         segacd_1meg_mode_word_write(space.machine(),offset+0x20000/2, data, mem_mask, 0);
26342634      }
26352635
26362636   }
r17963r17964
26402640
26412641static READ16_HANDLER( segacd_irq_mask_r )
26422642{
2643   if (SEGACD_FORCE_SYNCS) space->machine().scheduler().synchronize();
2643   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
26442644   return segacd_irq_mask;
26452645}
26462646
r17963r17964
26492649   if (ACCESSING_BITS_0_7)
26502650   {
26512651      UINT16 control = CDD_CONTROL;
2652      if (SEGACD_FORCE_SYNCS) space->machine().scheduler().synchronize();
2652      if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
26532653   //  printf("segacd_irq_mask_w %04x %04x (CDD control is %04x)\n",data, mem_mask, control);
26542654
26552655      if (data & 0x10)
r17963r17964
26592659            if (!(segacd_irq_mask & 0x10))
26602660            {
26612661               segacd_irq_mask = data & 0x7e;
2662               CDD_Process(space->machine(), 0);
2662               CDD_Process(space.machine(), 0);
26632663               return;
26642664            }
26652665         }
r17963r17964
26772677
26782678static READ16_HANDLER( segacd_cdd_ctrl_r )
26792679{
2680   if (SEGACD_FORCE_SYNCS) space->machine().scheduler().synchronize();
2680   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
26812681   return CDD_CONTROL;
26822682}
26832683
r17963r17964
26872687   if (ACCESSING_BITS_0_7)
26882688   {
26892689      UINT16 control = CDD_CONTROL;
2690      if (SEGACD_FORCE_SYNCS) space->machine().scheduler().synchronize();
2690      if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
26912691
26922692      //printf("segacd_cdd_ctrl_w %04x %04x (control %04x irq %04x\n", data, mem_mask, control, segacd_irq_mask);
26932693
r17963r17964
26992699         {
27002700            if (segacd_irq_mask&0x10)
27012701            {
2702               CDD_Process(space->machine(), 1);
2702               CDD_Process(space.machine(), 1);
27032703            }
27042704         }
27052705      }
r17963r17964
27252725
27262726   if(offset == 9)
27272727   {
2728      CDD_Import(space->machine());
2728      CDD_Import(space.machine());
27292729   }
27302730}
27312731
r17963r17964
28582858            //int i;
28592859            UINT8 pix = 0x0;
28602860
2861            pix = read_pixel_from_stampmap(space->machine(), srcbitmap, xbase>>(3+8), ybase>>(3+8));
2861            pix = read_pixel_from_stampmap(space.machine(), srcbitmap, xbase>>(3+8), ybase>>(3+8));
28622862
28632863            xbase += deltax;
28642864            ybase += deltay;
r17963r17964
28782878
28792879            offset+=countx & 0x7;
28802880
2881            write_pixel( space->machine(), pix, offset );
2881            write_pixel( space.machine(), pix, offset );
28822882
2883            segacd_mark_tiles_dirty(space->machine(), (offset>>3));
2884            segacd_mark_tiles_dirty(space->machine(), (offset>>3)+1);
2883            segacd_mark_tiles_dirty(space.machine(), (offset>>3));
2884            segacd_mark_tiles_dirty(space.machine(), (offset>>3)+1);
28852885
28862886         }
28872887
r17963r17964
30323032
30333033   //printf("%f\n",cdfader_vol);
30343034
3035   cdda_set_volume(space->machine().device(":segacd:cdda"), cdfader_vol);
3035   cdda_set_volume(space.machine().device(":segacd:cdda"), cdfader_vol);
30363036}
30373037
30383038READ16_HANDLER( segacd_backupram_r )
30393039{
3040   if(ACCESSING_BITS_8_15 && !(space->debugger_access()))
3040   if(ACCESSING_BITS_8_15 && !(space.debugger_access()))
30413041      printf("Warning: read to backupram even bytes! [%04x]\n",offset);
30423042
30433043   return segacd_backupram[offset] & 0xff;
r17963r17964
30483048   if(ACCESSING_BITS_0_7)
30493049      segacd_backupram[offset] = data;
30503050
3051   if(ACCESSING_BITS_8_15 && !(space->debugger_access()))
3051   if(ACCESSING_BITS_8_15 && !(space.debugger_access()))
30523052      printf("Warning: write to backupram even bytes! [%04x] %02x\n",offset,data);
30533053}
30543054
trunk/src/mame/machine/pgmprot.c
r17963r17964
5454
5555READ16_HANDLER( pgm_asic3_r )
5656{
57   pgm_asic3_state *state = space->machine().driver_data<pgm_asic3_state>();
57   pgm_asic3_state *state = space.machine().driver_data<pgm_asic3_state>();
5858   UINT8 res = 0;
5959   /* region is supplied by the protection device */
6060
r17963r17964
9898
9999WRITE16_HANDLER( pgm_asic3_w )
100100{
101   pgm_asic3_state *state = space->machine().driver_data<pgm_asic3_state>();
101   pgm_asic3_state *state = space.machine().driver_data<pgm_asic3_state>();
102102
103103   if(ACCESSING_BITS_0_7)
104104   {
r17963r17964
127127      {
128128         state->m_asic3_y = state->m_asic3_reg & 7;
129129         state->m_asic3_z = data;
130         asic3_compute_hold(space->machine());
130         asic3_compute_hold(space.machine());
131131      }
132132   }
133133}
134134
135135WRITE16_HANDLER( pgm_asic3_reg_w )
136136{
137   pgm_asic3_state *state = space->machine().driver_data<pgm_asic3_state>();
137   pgm_asic3_state *state = space.machine().driver_data<pgm_asic3_state>();
138138
139139   if(ACCESSING_BITS_0_7)
140140      state->m_asic3_reg = data & 0xff;
trunk/src/mame/machine/cx4oam.c
r17963r17964
4444   offset = (cx4.ram[0x626] & 3) * 2;
4545   srcptr = 0x220;
4646
47   address_space *space = machine.device<cpu_device>("maincpu")->space(AS_PROGRAM);
47   address_space &space = *machine.device<cpu_device>("maincpu")->space(AS_PROGRAM);
4848   for(i = cx4.ram[0x620]; i > 0 && sprcount > 0; i--, srcptr += 16)
4949   {
5050      UINT32 spraddr = CX4_readl(srcptr + 7);
r17963r17964
5454      sprname = cx4.ram[srcptr + 5];
5555      sprattr = cx4.ram[srcptr + 4] | cx4.ram[srcptr + 6];
5656
57      if(space->read_byte(spraddr))
57      if(space.read_byte(spraddr))
5858      {
5959         INT16 x, y;
6060         INT32 sprcnt;
61         for(sprcnt = space->read_byte(spraddr++); sprcnt > 0 && sprcount > 0; sprcnt--, spraddr += 4)
61         for(sprcnt = space.read_byte(spraddr++); sprcnt > 0 && sprcount > 0; sprcnt--, spraddr += 4)
6262         {
63            x = (INT8)space->read_byte(spraddr + 1);
63            x = (INT8)space.read_byte(spraddr + 1);
6464            if(sprattr & 0x40)
6565            {
66               x = -x - ((space->read_byte(spraddr) & 0x20) ? 16 : 8);
66               x = -x - ((space.read_byte(spraddr) & 0x20) ? 16 : 8);
6767            }
6868            x += sprx;
6969            if(x >= -16 && x <= 272)
7070            {
71               y = (INT8)space->read_byte(spraddr + 2);
71               y = (INT8)space.read_byte(spraddr + 2);
7272               if(sprattr & 0x80)
7373               {
74                  y = -y - ((space->read_byte(spraddr) & 0x20) ? 16 : 8);
74                  y = -y - ((space.read_byte(spraddr) & 0x20) ? 16 : 8);
7575               }
7676               y += spry;
7777               if(y >= -16 && y <= 224)
7878               {
7979                  cx4.ram[oamptr    ] = (UINT8)x;
8080                  cx4.ram[oamptr + 1] = (UINT8)y;
81                  cx4.ram[oamptr + 2] = sprname + space->read_byte(spraddr + 3);
82                  cx4.ram[oamptr + 3] = sprattr ^ (space->read_byte(spraddr) & 0xc0);
81                  cx4.ram[oamptr + 2] = sprname + space.read_byte(spraddr + 3);
82                  cx4.ram[oamptr + 3] = sprattr ^ (space.read_byte(spraddr) & 0xc0);
8383                  cx4.ram[oamptr2] &= ~(3 << offset);
8484                  if(x & 0x100)
8585                  {
8686                     cx4.ram[oamptr2] |= 1 << offset;
8787                  }
88                  if(space->read_byte(spraddr) & 0x20)
88                  if(space.read_byte(spraddr) & 0x20)
8989                  {
9090                     cx4.ram[oamptr2] |= 2 << offset;
9191                  }
trunk/src/mame/machine/mcr68.c
r17963r17964
289289WRITE_LINE_DEVICE_HANDLER( zwackery_ca2_w )
290290{
291291   mcr68_state *drvstate = device->machine().driver_data<mcr68_state>();
292   address_space *space = device->machine().device("maincpu")->memory().space(AS_PROGRAM);
293   drvstate->m_chip_squeak_deluxe->write(*space, 0, (state << 4) | drvstate->m_zwackery_sound_data);
292   address_space &space = *device->machine().device("maincpu")->memory().space(AS_PROGRAM);
293   drvstate->m_chip_squeak_deluxe->write(space, 0, (state << 4) | drvstate->m_zwackery_sound_data);
294294}
295295
296296
trunk/src/mame/machine/cps2crpt.c
r17963r17964
632632
633633static void cps2_decrypt(running_machine &machine, const UINT32 *master_key, UINT32 upper_limit)
634634{
635   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
635   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
636636   UINT16 *rom = (UINT16 *)machine.root_device().memregion("maincpu")->base();
637637   int length = machine.root_device().memregion("maincpu")->bytes();
638638   UINT16 *dec = auto_alloc_array(machine, UINT16, length/2);
r17963r17964
720720      }
721721   }
722722
723   space->set_decrypted_region(0x000000, length - 1, dec);
723   space.set_decrypted_region(0x000000, length - 1, dec);
724724   m68k_set_encrypted_opcode_range(machine.device("maincpu"), 0, length);
725725}
726726
trunk/src/mame/machine/pgmprot3.c
r17963r17964
4343static WRITE32_HANDLER( svg_arm7_ram_sel_w )
4444{
4545//  printf("svg_arm7_ram_sel_w %08x\n", data);
46   space->machine().scheduler().synchronize(); // force resync
46   space.machine().scheduler().synchronize(); // force resync
4747
48   pgm_arm_type3_state *state = space->machine().driver_data<pgm_arm_type3_state>();
48   pgm_arm_type3_state *state = space.machine().driver_data<pgm_arm_type3_state>();
4949   state->m_svg_ram_sel = data & 1;
5050}
5151
5252static READ32_HANDLER( svg_arm7_shareram_r )
5353{
54   pgm_arm_type3_state *state = space->machine().driver_data<pgm_arm_type3_state>();
54   pgm_arm_type3_state *state = space.machine().driver_data<pgm_arm_type3_state>();
5555   return state->m_svg_shareram[state->m_svg_ram_sel & 1][offset];
5656}
5757
5858static WRITE32_HANDLER( svg_arm7_shareram_w )
5959{
60   pgm_arm_type3_state *state = space->machine().driver_data<pgm_arm_type3_state>();
60   pgm_arm_type3_state *state = space.machine().driver_data<pgm_arm_type3_state>();
6161   COMBINE_DATA(&state->m_svg_shareram[state->m_svg_ram_sel & 1][offset]);
6262}
6363
6464static READ16_HANDLER( svg_m68k_ram_r )
6565{
66   pgm_arm_type3_state *state = space->machine().driver_data<pgm_arm_type3_state>();
66   pgm_arm_type3_state *state = space.machine().driver_data<pgm_arm_type3_state>();
6767   int ram_sel = (state->m_svg_ram_sel & 1) ^ 1;
6868   UINT16 *share16 = (UINT16 *)(state->m_svg_shareram[ram_sel & 1]);
6969
r17963r17964
7272
7373static WRITE16_HANDLER( svg_m68k_ram_w )
7474{
75   pgm_arm_type3_state *state = space->machine().driver_data<pgm_arm_type3_state>();
75   pgm_arm_type3_state *state = space.machine().driver_data<pgm_arm_type3_state>();
7676   int ram_sel = (state->m_svg_ram_sel & 1) ^ 1;
7777   UINT16 *share16 = (UINT16 *)(state->m_svg_shareram[ram_sel & 1]);
7878
r17963r17964
8686
8787static WRITE16_HANDLER( svg_68k_nmi_w )
8888{
89   pgm_arm_type3_state *state = space->machine().driver_data<pgm_arm_type3_state>();
89   pgm_arm_type3_state *state = space.machine().driver_data<pgm_arm_type3_state>();
9090   generic_pulse_irq_line(state->m_prot, ARM7_FIRQ_LINE, 1);
9191}
9292
9393static WRITE16_HANDLER( svg_latch_68k_w )
9494{
95   pgm_arm_type3_state *state = space->machine().driver_data<pgm_arm_type3_state>();
95   pgm_arm_type3_state *state = space.machine().driver_data<pgm_arm_type3_state>();
9696   if (PGMARM7LOGERROR)
97      logerror("M68K: Latch write: %04x (%04x) (%06x)\n", data & 0x0000ffff, mem_mask, space->device().safe_pc());
97      logerror("M68K: Latch write: %04x (%04x) (%06x)\n", data & 0x0000ffff, mem_mask, space.device().safe_pc());
9898   COMBINE_DATA(&state->m_svg_latchdata_68k_w);
9999}
100100
101101
102102static READ16_HANDLER( svg_latch_68k_r )
103103{
104   pgm_arm_type3_state *state = space->machine().driver_data<pgm_arm_type3_state>();
104   pgm_arm_type3_state *state = space.machine().driver_data<pgm_arm_type3_state>();
105105
106106   if (PGMARM7LOGERROR)
107      logerror("M68K: Latch read: %04x (%04x) (%06x)\n", state->m_svg_latchdata_arm_w & 0x0000ffff, mem_mask, space->device().safe_pc());
107      logerror("M68K: Latch read: %04x (%04x) (%06x)\n", state->m_svg_latchdata_arm_w & 0x0000ffff, mem_mask, space.device().safe_pc());
108108   return state->m_svg_latchdata_arm_w;
109109}
110110
r17963r17964
112112
113113static READ32_HANDLER( svg_latch_arm_r )
114114{
115   pgm_arm_type3_state *state = space->machine().driver_data<pgm_arm_type3_state>();
115   pgm_arm_type3_state *state = space.machine().driver_data<pgm_arm_type3_state>();
116116
117117   if (PGMARM7LOGERROR)
118      logerror("ARM7: Latch read: %08x (%08x) (%06x)\n", state->m_svg_latchdata_68k_w, mem_mask, space->device().safe_pc());
118      logerror("ARM7: Latch read: %08x (%08x) (%06x)\n", state->m_svg_latchdata_68k_w, mem_mask, space.device().safe_pc());
119119   return state->m_svg_latchdata_68k_w;
120120}
121121
122122static WRITE32_HANDLER( svg_latch_arm_w )
123123{
124   pgm_arm_type3_state *state = space->machine().driver_data<pgm_arm_type3_state>();
124   pgm_arm_type3_state *state = space.machine().driver_data<pgm_arm_type3_state>();
125125
126126   if (PGMARM7LOGERROR)
127      logerror("ARM7: Latch write: %08x (%08x) (%06x)\n", data, mem_mask, space->device().safe_pc());
127      logerror("ARM7: Latch write: %08x (%08x) (%06x)\n", data, mem_mask, space.device().safe_pc());
128128
129129   COMBINE_DATA(&state->m_svg_latchdata_arm_w);
130130}
r17963r17964
267267
268268static READ32_HANDLER( dmnfrnt_speedup_r )
269269{
270   pgm_arm_type3_state *state = space->machine().driver_data<pgm_arm_type3_state>();
271   int pc = space->device().safe_pc();
272   if (pc == 0x8000fea) space->device().execute().eat_cycles(500);
270   pgm_arm_type3_state *state = space.machine().driver_data<pgm_arm_type3_state>();
271   int pc = space.device().safe_pc();
272   if (pc == 0x8000fea) space.device().execute().eat_cycles(500);
273273//  else printf("dmn_speedup_r %08x\n", pc);
274274   return state->m_arm_ram[0x000444/4];
275275}
276276
277277static READ16_HANDLER( dmnfrnt_main_speedup_r )
278278{
279   pgm_state *state = space->machine().driver_data<pgm_state>();
279   pgm_state *state = space.machine().driver_data<pgm_state>();
280280   UINT16 data = state->m_mainram[0xa03c/2];
281   int pc = space->device().safe_pc();
282   if (pc == 0x10193a) space->device().execute().spin_until_interrupt();
283   else if (pc == 0x1019a4) space->device().execute().spin_until_interrupt();
281   int pc = space.device().safe_pc();
282   if (pc == 0x10193a) space.device().execute().spin_until_interrupt();
283   else if (pc == 0x1019a4) space.device().execute().spin_until_interrupt();
284284   return data;
285285}
286286
trunk/src/mame/machine/model1.c
r17963r17964
1111#define TGP_FUNCTION(name) void name(running_machine &machine)
1212
1313
14static UINT32 fifoout_pop(address_space *space)
14static UINT32 fifoout_pop(address_space &space)
1515{
16   model1_state *state = space->machine().driver_data<model1_state>();
16   model1_state *state = space.machine().driver_data<model1_state>();
1717   UINT32 v;
1818   if(state->m_fifoout_wpos == state->m_fifoout_rpos) {
19      fatalerror("TGP FIFOOUT underflow (%x)\n", space->device().safe_pc());
19      fatalerror("TGP FIFOOUT underflow (%x)\n", space.device().safe_pc());
2020   }
2121   v = state->m_fifoout_data[state->m_fifoout_rpos++];
2222   if(state->m_fifoout_rpos == FIFO_SIZE)
r17963r17964
5757   return v;
5858}
5959
60static void fifoin_push(address_space *space, UINT32 data)
60static void fifoin_push(address_space &space, UINT32 data)
6161{
62   model1_state *state = space->machine().driver_data<model1_state>();
63   //  logerror("TGP FIFOIN write %08x (%x)\n", data, space->device().safe_pc());
62   model1_state *state = space.machine().driver_data<model1_state>();
63   //  logerror("TGP FIFOIN write %08x (%x)\n", data, space.device().safe_pc());
6464   state->m_fifoin_data[state->m_fifoin_wpos++] = data;
6565   if(state->m_fifoin_wpos == FIFO_SIZE)
6666      state->m_fifoin_wpos = 0;
r17963r17964
6868      logerror("TGP FIFOIN overflow\n");
6969   state->m_fifoin_cbcount--;
7070   if(!state->m_fifoin_cbcount)
71      state->m_fifoin_cb(space->machine());
71      state->m_fifoin_cb(space.machine());
7272}
7373
7474static float fifoin_pop_f(model1_state *state)
r17963r17964
19381938READ16_MEMBER(model1_state::model1_tgp_copro_r)
19391939{
19401940   if(!offset) {
1941      m_copro_r = fifoout_pop(&space);
1941      m_copro_r = fifoout_pop(space);
19421942      return m_copro_r;
19431943   } else
19441944      return m_copro_r >> 16;
r17963r17964
19491949   if(offset) {
19501950      m_copro_w = (m_copro_w & 0x0000ffff) | (data << 16);
19511951      m_pushpc = space.device().safe_pc();
1952      fifoin_push(&space, m_copro_w);
1952      fifoin_push(space, m_copro_w);
19531953   } else
19541954      m_copro_w = (m_copro_w & 0xffff0000) | data;
19551955}
r17963r17964
20712071   return 1;
20722072}
20732073
2074static void copro_fifoin_push(address_space *space, UINT32 data)
2074static void copro_fifoin_push(address_space &space, UINT32 data)
20752075{
2076   model1_state *state = space->machine().driver_data<model1_state>();
2076   model1_state *state = space.machine().driver_data<model1_state>();
20772077   if (state->m_copro_fifoin_num == FIFO_SIZE)
20782078   {
2079      fatalerror("Copro FIFOIN overflow (at %08X)\n", space->device().safe_pc());
2079      fatalerror("Copro FIFOIN overflow (at %08X)\n", space.device().safe_pc());
20802080      return;
20812081   }
20822082
r17963r17964
20902090   state->m_copro_fifoin_num++;
20912091}
20922092
2093static UINT32 copro_fifoout_pop(address_space *space)
2093static UINT32 copro_fifoout_pop(address_space &space)
20942094{
2095   model1_state *state = space->machine().driver_data<model1_state>();
2095   model1_state *state = space.machine().driver_data<model1_state>();
20962096   UINT32 r;
20972097
20982098   if (state->m_copro_fifoout_num == 0)
20992099   {
21002100      // Reading from empty FIFO causes the v60 to enter wait state
2101      v60_stall(space->machine().device("maincpu"));
2101      v60_stall(space.machine().device("maincpu"));
21022102
2103      space->machine().scheduler().synchronize();
2103      space.machine().scheduler().synchronize();
21042104
21052105      return 0;
21062106   }
r17963r17964
22042204{
22052205   if (!offset)
22062206   {
2207      m_vr_r = copro_fifoout_pop(&space);
2207      m_vr_r = copro_fifoout_pop(space);
22082208      return m_vr_r;
22092209   }
22102210   else
r17963r17964
22162216   if (offset)
22172217   {
22182218      m_vr_w = (m_vr_w & 0x0000ffff) | (data << 16);
2219      copro_fifoin_push(&space, m_vr_w);
2219      copro_fifoin_push(space, m_vr_w);
22202220   }
22212221   else
22222222      m_vr_w = (m_vr_w & 0xffff0000) | data;
trunk/src/mame/machine/megavdp.c
r17963r17964
471471                            ((m_vdp_command_part2 & 0x0003) << 14);
472472}
473473
474UINT16 (*vdp_get_word_from_68k_mem)(running_machine &machine, UINT32 source, address_space* space68k);
474UINT16 (*vdp_get_word_from_68k_mem)(running_machine &machine, UINT32 source, address_space& space68k);
475475
476UINT16 vdp_get_word_from_68k_mem_default(running_machine &machine, UINT32 source, address_space* space68k)
476UINT16 vdp_get_word_from_68k_mem_default(running_machine &machine, UINT32 source, address_space * space68k)
477477{
478478   // should we limit the valid areas here?
479479   // how does this behave with the segacd etc?
r17963r17964
574574
575575   for (count = 0;count<(length>>1);count++)
576576   {
577      vdp_vram_write(vdp_get_word_from_68k_mem(machine, source, m_space68k));
577      vdp_vram_write(vdp_get_word_from_68k_mem(machine, source, *m_space68k));
578578      source+=2;
579579      if (source>0xffffff) source = 0xe00000;
580580   }
r17963r17964
600600   {
601601      //if (m_vdp_address>=0x80) return; // abandon
602602
603      write_cram_value(machine, (m_vdp_address&0x7e)>>1, vdp_get_word_from_68k_mem(machine, source, m_space68k));
603      write_cram_value(machine, (m_vdp_address&0x7e)>>1, vdp_get_word_from_68k_mem(machine, source, *m_space68k));
604604      source+=2;
605605
606606      if (source>0xffffff) source = 0xfe0000;
r17963r17964
628628   {
629629      if (m_vdp_address>=0x80) return; // abandon
630630
631      m_vsram[(m_vdp_address&0x7e)>>1] = vdp_get_word_from_68k_mem(machine, source, m_space68k);
631      m_vsram[(m_vdp_address&0x7e)>>1] = vdp_get_word_from_68k_mem(machine, source, *m_space68k);
632632      source+=2;
633633
634634      if (source>0xffffff) source = 0xfe0000;
r17963r17964
855855      case 0x14:
856856      case 0x16:
857857         if (ACCESSING_BITS_0_7) sn76496_w(space.machine().device(":snsnd"), space, 0, data & 0xff);
858         //if (ACCESSING_BITS_8_15) sn76496_w(space->machine().device("snsnd"), 0, (data >>8) & 0xff);
858         //if (ACCESSING_BITS_8_15) sn76496_w(space.machine().device("snsnd"), 0, (data >>8) & 0xff);
859859         break;
860860
861861      default:
r17963r17964
12651265      case 0x06:
12661266      //  if ((!ACCESSING_BITS_8_15) || (!ACCESSING_BITS_0_7)) mame_printf_debug("8-bit VDP read control port access, offset %04x mem_mask %04x\n",offset,mem_mask);
12671267         retvalue = megadriv_vdp_ctrl_port_r(space.machine());
1268      //  retvalue = space->machine().rand();
1269      //  mame_printf_debug("%06x: Read Control Port at scanline %d hpos %d (return %04x)\n",space->device().safe_pc(),genesis_get_scanline_counter(machine), get_hposition(space.machine()),retvalue);
1268      //  retvalue = space.machine().rand();
1269      //  mame_printf_debug("%06x: Read Control Port at scanline %d hpos %d (return %04x)\n",space.device().safe_pc(),genesis_get_scanline_counter(machine), get_hposition(space.machine()),retvalue);
12701270         break;
12711271
12721272      case 0x08:
r17963r17964
12751275      case 0x0e:
12761276      //  if ((!ACCESSING_BITS_8_15) || (!ACCESSING_BITS_0_7)) mame_printf_debug("8-bit VDP read HV counter port access, offset %04x mem_mask %04x\n",offset,mem_mask);
12771277         retvalue = megadriv_read_hv_counters(space.machine());
1278      //  retvalue = space->machine().rand();
1279      //  mame_printf_debug("%06x: Read HV counters at scanline %d hpos %d (return %04x)\n",space->device().safe_pc(),genesis_get_scanline_counter(machine), get_hposition(space.machine()),retvalue);
1278      //  retvalue = space.machine().rand();
1279      //  mame_printf_debug("%06x: Read HV counters at scanline %d hpos %d (return %04x)\n",space.device().safe_pc(),genesis_get_scanline_counter(machine), get_hposition(space.machine()),retvalue);
12801280         break;
12811281
12821282      case 0x10:
trunk/src/mame/machine/cd32.c
r17963r17964
399399   if ( state->m_cdrom_status[0] & state->m_cdrom_status[1] )
400400   {
401401      if (LOG_AKIKO_CD) logerror( "Akiko CD IRQ\n" );
402      amiga_custom_w(state->m_space, REG_INTREQ, 0x8000 | INTENA_PORTS, 0xffff);
402      amiga_custom_w(*state->m_space, REG_INTREQ, 0x8000 | INTENA_PORTS, 0xffff);
403403   }
404404}
405405
trunk/src/mame/machine/micro3d.c
r17963r17964
605605
606606DRIVER_INIT_MEMBER(micro3d_state,micro3d)
607607{
608   address_space *space = machine().device("drmath")->memory().space(AS_DATA);
608   address_space &space = *machine().device("drmath")->memory().space(AS_DATA);
609609
610610   i8051_set_serial_tx_callback(machine().device("audiocpu"), data_from_i8031);
611611   i8051_set_serial_rx_callback(machine().device("audiocpu"), data_to_i8031);
r17963r17964
614614
615615   /* The Am29000 program seems to rely on RAM from 0x00470000 onwards being
616616    non-zero on a reset, otherwise the 3D object data doesn't get uploaded! */
617   space->write_dword(0x00470000, 0xa5a5a5a5);
617   space.write_dword(0x00470000, 0xa5a5a5a5);
618618
619619   /* TODO? BOTSS crashes when starting the final stage because the 68000
620620    overwrites memory in use by the Am29000. Slowing down the 68000 slightly
r17963r17964
624624
625625DRIVER_INIT_MEMBER(micro3d_state,botss)
626626{
627   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
627   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
628628
629629   /* Required to pass the hardware version check */
630   space->install_read_handler(0x140000, 0x140001, read16_delegate(FUNC(micro3d_state::botss_140000_r),this));
631   space->install_read_handler(0x180000, 0x180001, read16_delegate(FUNC(micro3d_state::botss_180000_r),this));
630   space.install_read_handler(0x140000, 0x140001, read16_delegate(FUNC(micro3d_state::botss_140000_r),this));
631   space.install_read_handler(0x180000, 0x180001, read16_delegate(FUNC(micro3d_state::botss_180000_r),this));
632632
633633   DRIVER_INIT_CALL(micro3d);
634634}
trunk/src/mame/machine/md_cart.c
r17963r17964
189189 *************************************/
190190static WRITE16_HANDLER( genesis_ssf2_bank_w )
191191{
192   md_cons_state *state = space->machine().driver_data<md_cons_state>();
192   md_cons_state *state = space.machine().driver_data<md_cons_state>();
193193   UINT8 *ROM = state->memregion("maincpu")->base();
194194
195195   if ((state->m_md_cart.ssf2_lastoff != offset) || (state->m_md_cart.ssf2_lastdata != data))
r17963r17964
236236#ifdef UNUSED_FUNCTION
237237static WRITE16_HANDLER( l3alt_pdat_w )
238238{
239   md_cons_state *state = space->machine().driver_data<md_cons_state>();
239   md_cons_state *state = space.machine().driver_data<md_cons_state>();
240240   state->m_md_cart.l3alt_pdat = data;
241241}
242242
243243static WRITE16_HANDLER( l3alt_pcmd_w )
244244{
245   md_cons_state *state = space->machine().driver_data<md_cons_state>();
245   md_cons_state *state = space.machine().driver_data<md_cons_state>();
246246   state->m_md_cart.l3alt_pcmd = data;
247247}
248248#endif
249249
250250static READ16_HANDLER( l3alt_prot_r )
251251{
252   md_cons_state *state = space->machine().driver_data<md_cons_state>();
252   md_cons_state *state = space.machine().driver_data<md_cons_state>();
253253   int retdata = 0;
254254
255255   offset &= 0x07;
r17963r17964
296296
297297static WRITE16_HANDLER( l3alt_prot_w )
298298{
299   md_cons_state *state = space->machine().driver_data<md_cons_state>();
299   md_cons_state *state = space.machine().driver_data<md_cons_state>();
300300   offset &= 0x7;
301301
302302   switch (offset)
r17963r17964
321321   {
322322      case 0:
323323      {
324         UINT8 *ROM = space->machine().root_device().memregion("maincpu")->base();
324         UINT8 *ROM = space.machine().root_device().memregion("maincpu")->base();
325325         /* printf("%06x data %04x\n",activecpu_get_pc(), data); */
326326         memcpy(&ROM[0x000000], &ROM[VIRGIN_COPY_GEN + (data & 0xffff) * 0x8000], 0x8000);
327327      }
r17963r17964
341341 *************************************/
342342static WRITE16_HANDLER( realtec_402000_w )
343343{
344   md_cons_state *state = space->machine().driver_data<md_cons_state>();
344   md_cons_state *state = space.machine().driver_data<md_cons_state>();
345345   state->m_md_cart.realtec_bank_addr = 0;
346346   state->m_md_cart.realtec_bank_size = (data >> 8) & 0x1f;
347347}
348348
349349static WRITE16_HANDLER( realtec_400000_w )
350350{
351   md_cons_state *state = space->machine().driver_data<md_cons_state>();
351   md_cons_state *state = space.machine().driver_data<md_cons_state>();
352352   int bankdata = (data >> 9) & 0x7;
353353
354354   UINT8 *ROM = state->memregion("maincpu")->base();
r17963r17964
362362
363363static WRITE16_HANDLER( realtec_404000_w )
364364{
365   md_cons_state *state = space->machine().driver_data<md_cons_state>();
365   md_cons_state *state = space.machine().driver_data<md_cons_state>();
366366   int bankdata = (data >> 8) & 0x3;
367367   UINT8 *ROM = state->memregion("maincpu")->base();
368368
r17963r17964
381381 *************************************/
382382static WRITE16_HANDLER( chifi3_bank_w )
383383{
384   UINT8 *ROM = space->machine().root_device().memregion("maincpu")->base();
384   UINT8 *ROM = space.machine().root_device().memregion("maincpu")->base();
385385
386386   if (data == 0xf100) // *hit player
387387   {
r17963r17964
417417   }
418418   else
419419   {
420      logerror("%06x chifi3, bankw? %04x %04x\n", space->device().safe_pc(), offset, data);
420      logerror("%06x chifi3, bankw? %04x %04x\n", space.device().safe_pc(), offset, data);
421421   }
422422
423423}
r17963r17964
434434    04cefa chifi3, prot_r? 65262
435435    */
436436
437   if (space->device().safe_pc() == 0x01782) // makes 'VS' screen appear
437   if (space.device().safe_pc() == 0x01782) // makes 'VS' screen appear
438438   {
439      retdat = space->device().state().state_int(M68K_D3) & 0xff;
439      retdat = space.device().state().state_int(M68K_D3) & 0xff;
440440      retdat <<= 8;
441441      return retdat;
442442   }
443   else if (space->device().safe_pc() == 0x1c24) // background gfx etc.
443   else if (space.device().safe_pc() == 0x1c24) // background gfx etc.
444444   {
445      retdat = space->device().state().state_int(M68K_D3) & 0xff;
445      retdat = space.device().state().state_int(M68K_D3) & 0xff;
446446      retdat <<= 8;
447447      return retdat;
448448   }
449   else if (space->device().safe_pc() == 0x10c4a) // unknown
449   else if (space.device().safe_pc() == 0x10c4a) // unknown
450450   {
451      return space->machine().rand();
451      return space.machine().rand();
452452   }
453   else if (space->device().safe_pc() == 0x10c50) // unknown
453   else if (space.device().safe_pc() == 0x10c50) // unknown
454454   {
455      return space->machine().rand();
455      return space.machine().rand();
456456   }
457   else if (space->device().safe_pc() == 0x10c52) // relates to the game speed..
457   else if (space.device().safe_pc() == 0x10c52) // relates to the game speed..
458458   {
459      retdat = space->device().state().state_int(M68K_D4) & 0xff;
459      retdat = space.device().state().state_int(M68K_D4) & 0xff;
460460      retdat <<= 8;
461461      return retdat;
462462   }
463   else if (space->device().safe_pc() == 0x061ae)
463   else if (space.device().safe_pc() == 0x061ae)
464464   {
465      retdat = space->device().state().state_int(M68K_D3) & 0xff;
465      retdat = space.device().state().state_int(M68K_D3) & 0xff;
466466      retdat <<= 8;
467467      return retdat;
468468   }
469   else if (space->device().safe_pc() == 0x061b0)
469   else if (space.device().safe_pc() == 0x061b0)
470470   {
471      retdat = space->device().state().state_int(M68K_D3) & 0xff;
471      retdat = space.device().state().state_int(M68K_D3) & 0xff;
472472      retdat <<= 8;
473473      return retdat;
474474   }
475475   else
476476   {
477      logerror("%06x chifi3, prot_r? %04x\n", space->device().safe_pc(), offset);
477      logerror("%06x chifi3, prot_r? %04x\n", space.device().safe_pc(), offset);
478478   }
479479
480480   return 0;
r17963r17964
485485 *************************************/
486486static WRITE16_HANDLER( s19in1_bank )
487487{
488   UINT8 *ROM = space->machine().root_device().memregion("maincpu")->base();
488   UINT8 *ROM = space.machine().root_device().memregion("maincpu")->base();
489489   memcpy(ROM + 0x000000, ROM + 0x400000 + ((offset << 1) * 0x10000), 0x80000);
490490}
491491
r17963r17964
494494 *************************************/
495495static WRITE16_HANDLER( kaiju_bank_w )
496496{
497   UINT8 *ROM = space->machine().root_device().memregion("maincpu")->base();
497   UINT8 *ROM = space.machine().root_device().memregion("maincpu")->base();
498498   memcpy(ROM + 0x000000, ROM + 0x400000 + (data & 0x7f) * 0x8000, 0x8000);
499499}
500500
r17963r17964
503503 *************************************/
504504static READ16_HANDLER( soulb_400006_r )
505505{
506//  printf("%06x soulb_400006_r\n",space->device().safe_pc());
506//  printf("%06x soulb_400006_r\n",space.device().safe_pc());
507507   return 0xf000;
508508}
509509
510510static READ16_HANDLER( soulb_400002_r )
511511{
512//  printf("%06x soulb_400002_r\n",space->device().safe_pc());
512//  printf("%06x soulb_400002_r\n",space.device().safe_pc());
513513   return 0x9800;
514514}
515515
516516static READ16_HANDLER( soulb_400004_r )
517517{
518518//  return 0x9800;
519//  printf("%06x soulb_400004_r\n",space->device().safe_pc());
519//  printf("%06x soulb_400004_r\n",space.device().safe_pc());
520520//
521521   return 0xc900;
522522//aa
r17963r17964
601601static READ16_HANDLER( radica_bank_select )
602602{
603603   int bank = offset & 0x3f;
604   UINT8 *ROM = space->machine().root_device().memregion("maincpu")->base();
604   UINT8 *ROM = space.machine().root_device().memregion("maincpu")->base();
605605   memcpy(ROM, ROM + 0x400000 + (bank * 0x10000), 0x400000);
606606   return 0;
607607}
r17963r17964
624624 *************************************/
625625static READ16_HANDLER( squirrel_king_extra_r )
626626{
627   md_cons_state *state = space->machine().driver_data<md_cons_state>();
627   md_cons_state *state = space.machine().driver_data<md_cons_state>();
628628   return state->m_md_cart.squirrel_king_extra;
629629}
630630
631631static WRITE16_HANDLER( squirrel_king_extra_w )
632632{
633   md_cons_state *state = space->machine().driver_data<md_cons_state>();
633   md_cons_state *state = space.machine().driver_data<md_cons_state>();
634634   state->m_md_cart.squirrel_king_extra = data;
635635}
636636
r17963r17964
639639 *************************************/
640640static READ16_HANDLER( lion2_prot1_r )
641641{
642   md_cons_state *state = space->machine().driver_data<md_cons_state>();
642   md_cons_state *state = space.machine().driver_data<md_cons_state>();
643643   return state->m_md_cart.lion2_prot1_data;
644644}
645645
646646static READ16_HANDLER( lion2_prot2_r )
647647{
648   md_cons_state *state = space->machine().driver_data<md_cons_state>();
648   md_cons_state *state = space.machine().driver_data<md_cons_state>();
649649   return state->m_md_cart.lion2_prot2_data;
650650}
651651
652652static WRITE16_HANDLER ( lion2_prot1_w )
653653{
654   md_cons_state *state = space->machine().driver_data<md_cons_state>();
654   md_cons_state *state = space.machine().driver_data<md_cons_state>();
655655   state->m_md_cart.lion2_prot1_data = data;
656656}
657657
658658static WRITE16_HANDLER ( lion2_prot2_w )
659659{
660   md_cons_state *state = space->machine().driver_data<md_cons_state>();
660   md_cons_state *state = space.machine().driver_data<md_cons_state>();
661661   state->m_md_cart.lion2_prot2_data = data;
662662}
663663
r17963r17964
741741     cpu #0 (PC=001771A2): unmapped program memory word read from 006BD294 & 00FF
742742     */
743743
744   if (space->device().safe_pc()==0x1771a2) return 0x50;
744   if (space.device().safe_pc()==0x1771a2) return 0x50;
745745   else
746746   {
747747      x++;
748      logerror("%06x topfig_6BD294_r %04x\n",space->device().safe_pc(), x);
748      logerror("%06x topfig_6BD294_r %04x\n",space.device().safe_pc(), x);
749749      return x;
750750   }
751751}
r17963r17964
754754{
755755   static int x = -1;
756756
757   if (space->device().safe_pc()==0x4C94E)
757   if (space.device().safe_pc()==0x4C94E)
758758   {
759      return space->machine().device("maincpu")->state().state_int((M68K_D0)) & 0xff;
759      return space.machine().device("maincpu")->state().state_int((M68K_D0)) & 0xff;
760760   }
761761   else
762762   {
763763      x++;
764      logerror("%06x topfig_6F5344_r %04x\n",space->device().safe_pc(), x);
764      logerror("%06x topfig_6F5344_r %04x\n",space.device().safe_pc(), x);
765765      return x;
766766   }
767767}
768768
769769static WRITE16_HANDLER( topfig_bank_w )
770770{
771   UINT8 *ROM = space->machine().root_device().memregion("maincpu")->base();
771   UINT8 *ROM = space.machine().root_device().memregion("maincpu")->base();
772772   if (data == 0x002a)
773773   {
774774      memcpy(ROM + 0x060000, ROM + 0x570000, 0x8000); // == 0x2e*0x8000?!
775      //  printf("%06x offset %06x, data %04x\n",space->device().safe_pc(), offset, data);
775      //  printf("%06x offset %06x, data %04x\n",space.device().safe_pc(), offset, data);
776776
777777   }
778778   else if (data==0x0035) // characters ingame
r17963r17964
788788      memcpy(ROM + 0x060000, ROM + 0x460000, 0x8000);
789789      memcpy(ROM + 0x020000, ROM + 0x420000, 0x8000);
790790      memcpy(ROM + 0x058000, ROM + 0x458000, 0x8000);
791      //  printf("%06x offset %06x, data %04x\n",space->device().safe_pc(), offset, data);
791      //  printf("%06x offset %06x, data %04x\n",space.device().safe_pc(), offset, data);
792792   }
793793   else
794794   {
795      logerror("%06x offset %06x, data %04x\n", space->device().safe_pc(), offset, data);
795      logerror("%06x offset %06x, data %04x\n", space.device().safe_pc(), offset, data);
796796   }
797797
798798}
r17963r17964
815815 *************************************/
816816static WRITE16_HANDLER( mc_12in1_bank_w )
817817{
818   UINT8 *ROM = space->machine().root_device().memregion("maincpu")->base();
818   UINT8 *ROM = space.machine().root_device().memregion("maincpu")->base();
819819   logerror("offset %06x", offset << 17);
820820   memcpy(ROM + 0x000000, ROM + VIRGIN_COPY_GEN + ((offset & 0x3f) << 17), 0x100000);
821821}
r17963r17964
836836
837837static WRITE16_HANDLER( psolar_bank_w )
838838{
839   UINT8 *ROM = space->machine().root_device().memregion("maincpu")->base();
839   UINT8 *ROM = space.machine().root_device().memregion("maincpu")->base();
840840   logerror("switch bank %02x, page %02x\n",offset, data);
841841   memcpy(&ROM[0x280000 + (0x80000 * offset)], &ROM[VIRGIN_COPY_GEN + (0x80000 * (data&0x0f))], 0x80000);
842842}
r17963r17964
879879 *************************************/
880880static READ16_HANDLER( genesis_sram_read )
881881{
882   md_cons_state *state = space->machine().driver_data<md_cons_state>();
882   md_cons_state *state = space.machine().driver_data<md_cons_state>();
883883   UINT8 *ROM;
884884   int rom_offset;
885885
r17963r17964
896896
897897static WRITE16_HANDLER( genesis_sram_write )
898898{
899   md_cons_state *state = space->machine().driver_data<md_cons_state>();
899   md_cons_state *state = space.machine().driver_data<md_cons_state>();
900900   if (state->m_md_cart.sram_active)
901901   {
902902      if (!state->m_md_cart.sram_readonly)
r17963r17964
923923
924924static WRITE16_HANDLER( genesis_sram_toggle )
925925{
926   md_cons_state *state = space->machine().driver_data<md_cons_state>();
926   md_cons_state *state = space.machine().driver_data<md_cons_state>();
927927
928928   /* unsure if this is actually supposed to toggle or just switch on?
929929    Yet to encounter game that utilizes */
r17963r17964
931931   state->m_md_cart.sram_readonly = (data & 2) ? 1 : 0;
932932
933933   if (state->m_md_cart.sram_active && !state->m_md_cart.sram_handlers_installed)
934      install_sram_rw_handlers(space->machine(), TRUE);
934      install_sram_rw_handlers(space.machine(), TRUE);
935935}
936936
937937static READ16_HANDLER( sega_6658a_reg_r )
938938{
939   md_cons_state *state = space->machine().driver_data<md_cons_state>();
939   md_cons_state *state = space.machine().driver_data<md_cons_state>();
940940   return state->m_md_cart.sram_active;
941941}
942942
943943static WRITE16_HANDLER( sega_6658a_reg_w )
944944{
945   md_cons_state *state = space->machine().driver_data<md_cons_state>();
945   md_cons_state *state = space.machine().driver_data<md_cons_state>();
946946   if (data == 1)
947947      state->m_md_cart.sram_active = 1;
948948   if (data == 0)
r17963r17964
957957
958958static READ16_HANDLER( nba_jam_eeprom_r )
959959{
960   md_cons_state *state = space->machine().driver_data<md_cons_state>();
961//  state->m_md_cart.i2c_mem = (i2cmem_sda_read(space->machine().device("i2cmem")) & 1);
960   md_cons_state *state = space.machine().driver_data<md_cons_state>();
961//  state->m_md_cart.i2c_mem = (i2cmem_sda_read(space.machine().device("i2cmem")) & 1);
962962   return state->m_md_cart.i2c_mem & 1;
963963}
964964
965965static WRITE16_HANDLER( nba_jam_eeprom_w )
966966{
967   md_cons_state *state = space->machine().driver_data<md_cons_state>();
967   md_cons_state *state = space.machine().driver_data<md_cons_state>();
968968   state->m_md_cart.i2c_clk = (data & 0x0002) >> 1;
969969   state->m_md_cart.i2c_mem = (data & 0x0001);
970970
971//  i2cmem_sda_write(space->machine().device("i2cmem"), state->m_md_cart.i2c_clk);
972//  i2cmem_scl_write(space->machine().device("i2cmem"), state->m_md_cart.i2c_mem);
971//  i2cmem_sda_write(space.machine().device("i2cmem"), state->m_md_cart.i2c_clk);
972//  i2cmem_scl_write(space.machine().device("i2cmem"), state->m_md_cart.i2c_mem);
973973}
974974
975975static READ16_HANDLER( nba_jam_te_eeprom_r )
976976{
977   md_cons_state *state = space->machine().driver_data<md_cons_state>();
978//  state->m_md_cart.i2c_mem = (i2cmem_sda_read(space->machine().device("i2cmem")) & 1);
977   md_cons_state *state = space.machine().driver_data<md_cons_state>();
978//  state->m_md_cart.i2c_mem = (i2cmem_sda_read(space.machine().device("i2cmem")) & 1);
979979   return (state->m_md_cart.i2c_mem & 1);
980980}
981981
982982static WRITE16_HANDLER( nba_jam_te_eeprom_w )
983983{
984   md_cons_state *state = space->machine().driver_data<md_cons_state>();
984   md_cons_state *state = space.machine().driver_data<md_cons_state>();
985985   state->m_md_cart.i2c_clk = ((data & 0x0100) >> 8);
986986   state->m_md_cart.i2c_mem = data & 0x0001;
987987
988//  i2cmem_sda_write(space->machine().device("i2cmem"), state->m_md_cart.i2c_clk);
989//  i2cmem_scl_write(space->machine().device("i2cmem"), state->m_md_cart.i2c_mem);
988//  i2cmem_sda_write(space.machine().device("i2cmem"), state->m_md_cart.i2c_clk);
989//  i2cmem_scl_write(space.machine().device("i2cmem"), state->m_md_cart.i2c_mem);
990990}
991991
992992static READ16_HANDLER( ea_nhlpa_eeprom_r )
993993{
994   md_cons_state *state = space->machine().driver_data<md_cons_state>();
995//  state->m_md_cart.i2c_mem = (i2cmem_sda_read(space->machine().device("i2cmem")) & 1);
994   md_cons_state *state = space.machine().driver_data<md_cons_state>();
995//  state->m_md_cart.i2c_mem = (i2cmem_sda_read(space.machine().device("i2cmem")) & 1);
996996   return (state->m_md_cart.i2c_mem & 1) << 7;
997997}
998998
999999static WRITE16_HANDLER( ea_nhlpa_eeprom_w )
10001000{
1001   md_cons_state *state = space->machine().driver_data<md_cons_state>();
1001   md_cons_state *state = space.machine().driver_data<md_cons_state>();
10021002   state->m_md_cart.i2c_clk = ((data & 0x0040) >> 6);
10031003   state->m_md_cart.i2c_mem = ((data & 0x0080) >> 7);
10041004
1005//  i2cmem_sda_write(space->machine().device("i2cmem"), state->m_md_cart.i2c_clk);
1006//  i2cmem_scl_write(space->machine().device("i2cmem"), state->m_md_cart.i2c_mem);
1005//  i2cmem_sda_write(space.machine().device("i2cmem"), state->m_md_cart.i2c_clk);
1006//  i2cmem_scl_write(space.machine().device("i2cmem"), state->m_md_cart.i2c_mem);
10071007}
10081008
10091009/* TODO: identical as NBA Jam, used as kludge */
10101010static READ16_HANDLER( wboy_v_eeprom_r )
10111011{
1012   md_cons_state *state = space->machine().driver_data<md_cons_state>();
1013//  state->m_md_cart.i2c_mem = (i2cmem_sda_read(space->machine().device("i2cmem")) & 1);
1012   md_cons_state *state = space.machine().driver_data<md_cons_state>();
1013//  state->m_md_cart.i2c_mem = (i2cmem_sda_read(space.machine().device("i2cmem")) & 1);
10141014   return ~state->m_md_cart.i2c_mem & 1;
10151015}
10161016
10171017static WRITE16_HANDLER( wboy_v_eeprom_w )
10181018{
1019   md_cons_state *state = space->machine().driver_data<md_cons_state>();
1019   md_cons_state *state = space.machine().driver_data<md_cons_state>();
10201020   state->m_md_cart.i2c_clk = (data & 0x0002) >> 1;
10211021   state->m_md_cart.i2c_mem = (data & 0x0001);
10221022
1023//  i2cmem_sda_write(space->machine().device("i2cmem"), state->m_md_cart.i2c_clk);
1024//  i2cmem_scl_write(space->machine().device("i2cmem"), state->m_md_cart.i2c_mem);
1023//  i2cmem_sda_write(space.machine().device("i2cmem"), state->m_md_cart.i2c_clk);
1024//  i2cmem_scl_write(space.machine().device("i2cmem"), state->m_md_cart.i2c_mem);
10251025}
10261026
10271027static READ16_HANDLER( codemasters_eeprom_r )
10281028{
1029   md_cons_state *state = space->machine().driver_data<md_cons_state>();
1030//  state->m_md_cart.i2c_mem = (i2cmem_sda_read(space->machine().device("i2cmem")) & 1);
1029   md_cons_state *state = space.machine().driver_data<md_cons_state>();
1030//  state->m_md_cart.i2c_mem = (i2cmem_sda_read(space.machine().device("i2cmem")) & 1);
10311031   return (state->m_md_cart.i2c_mem & 1) << 7;
10321032}
10331033
10341034static WRITE16_HANDLER( codemasters_eeprom_w )
10351035{
1036   md_cons_state *state = space->machine().driver_data<md_cons_state>();
1036   md_cons_state *state = space.machine().driver_data<md_cons_state>();
10371037   state->m_md_cart.i2c_clk = (data & 0x0200) >> 9;
10381038   state->m_md_cart.i2c_mem = (data & 0x0100) >> 8;
10391039
1040//  i2cmem_sda_write(space->machine().device("i2cmem"), state->m_md_cart.i2c_clk);
1041//  i2cmem_scl_write(space->machine().device("i2cmem"), state->m_md_cart.i2c_mem);
1040//  i2cmem_sda_write(space.machine().device("i2cmem"), state->m_md_cart.i2c_clk);
1041//  i2cmem_scl_write(space.machine().device("i2cmem"), state->m_md_cart.i2c_mem);
10421042}
10431043
10441044/* ST M95320 32Kbit serial EEPROM implementation */
trunk/src/mame/machine/kaneko_calc3.c
r17963r17964
12431243int kaneko_calc3_device::calc3_decompress_table(running_machine& machine, int tabnum, UINT8* dstram, int dstoffset)
12441244{
12451245   calc3_t &calc3 = m_calc3;
1246   address_space *space = machine.device(":maincpu")->memory().space(AS_PROGRAM);
1246   address_space &space = *machine.device(":maincpu")->memory().space(AS_PROGRAM);
12471247   UINT8* datarom = memregion(":calc3_rom")->base();
12481248
12491249   UINT8 numregions;
r17963r17964
13441344               //printf("save to eeprom\n");
13451345
13461346               {
1347                  address_space *eeprom_space = space->machine().device<eeprom_device>(":eeprom")->space();
1347                  address_space *eeprom_space = space.machine().device<eeprom_device>(":eeprom")->space();
13481348
13491349                  for (i=0;i<0x80;i++)
13501350                  {
1351                     eeprom_space->write_byte(i, space->read_byte(calc3.eeprom_addr+0x200000+i));
1351                     eeprom_space->write_byte(i, space.read_byte(calc3.eeprom_addr+0x200000+i));
13521352                  }
13531353
13541354               }
r17963r17964
14461446
14471447               if(local_counter>1)
14481448               {
1449                  if (space)
1450                  {
1451                     space->write_byte(dstoffset+i, dat);
1452                  }
1449                  space.write_byte(dstoffset+i, dat);
14531450
14541451                  // debug, used to output tables at the start
14551452                  if (dstram)
r17963r17964
15201517
15211518               if(local_counter>1)
15221519               {
1523                  if (space)
1524                  {
1525                     space->write_byte(dstoffset+i, dat);
1526                  }
1520                  space.write_byte(dstoffset+i, dat);
15271521
15281522                  // debug, used to output tables at the start
15291523                  if (dstram)
r17963r17964
16391633   calc3_t &calc3 = m_calc3;
16401634   UINT16 mcu_command;
16411635   int i;
1642   address_space *space = machine.device(":maincpu")->memory().space(AS_PROGRAM);
1636   address_space &space = *machine.device(":maincpu")->memory().space(AS_PROGRAM);
16431637
16441638   if ( calc3.mcu_status != (1|2|4|8) )   return;
16451639
1646   if (calc3.dsw_addr) space->write_byte(calc3.dsw_addr+0x200000, ( ~ioport(":DSW1")->read())&0xff); // // DSW // dsw actually updates in realtime - mcu reads+writes it every frame
1640   if (calc3.dsw_addr) space.write_byte(calc3.dsw_addr+0x200000, ( ~ioport(":DSW1")->read())&0xff); // // DSW // dsw actually updates in realtime - mcu reads+writes it every frame
16471641
16481642
16491643   //calc3.mcu_status = 0;
r17963r17964
16841678         printf("Calc 3 Init Command - %04x ROM Checksum Address\n",  calc3.checksumaddress);
16851679         printf("Calc 3 Init Command - %08x Data Write Address\n",  calc3.writeaddress);
16861680#endif
1687   //      space->write_byte(calc3.dsw_addr+0x200000, ( ~ioport("DSW1")->read())&0xff); // // DSW // dsw actually updates in realtime - mcu reads+writes it every frame
1681   //      space.write_byte(calc3.dsw_addr+0x200000, ( ~ioport("DSW1")->read())&0xff); // // DSW // dsw actually updates in realtime - mcu reads+writes it every frame
16881682
16891683         m_calc3_mcuram[calc3.checksumaddress / 2] = calc3.mcu_crc;            // MCU Rom Checksum!
16901684
r17963r17964
16951689         }
16961690#endif
16971691         {
1698            address_space *eeprom_space = space->machine().device<eeprom_device>(":eeprom")->space();
1692            address_space *eeprom_space = space.machine().device<eeprom_device>(":eeprom")->space();
16991693
17001694            for (i=0;i<0x80;i++)
17011695            {
1702               space->write_byte(calc3.eeprom_addr+0x200000+i, eeprom_space->read_byte(i));
1696               space.write_byte(calc3.eeprom_addr+0x200000+i, eeprom_space->read_byte(i));
17031697            }
17041698
17051699         }
r17963r17964
17381732                  printf("writing back address %08x to %08x %08x\n", calc3.writeaddress_current, commandaddr,write);
17391733#endif
17401734
1741                  space->write_byte(write+0x200000, calc3.data_header[0]);
1742                  space->write_byte(write+0x200001, calc3.data_header[1]);
1735                  space.write_byte(write+0x200000, calc3.data_header[0]);
1736                  space.write_byte(write+0x200001, calc3.data_header[1]);
17431737
17441738                  write=commandaddr+(char)commandunk;
1745                  space->write_word(write+0x200000, (calc3.writeaddress_current>>16)&0xffff);
1746                  space->write_word(write+0x200002,  (calc3.writeaddress_current&0xffff));
1739                  space.write_word(write+0x200000, (calc3.writeaddress_current>>16)&0xffff);
1740                  space.write_word(write+0x200002,  (calc3.writeaddress_current&0xffff));
17471741
17481742                  calc3.writeaddress_current += ((length+3)&(~1));
17491743               }
trunk/src/mame/machine/snessdd1.c
r17963r17964
581581   snes_sdd1.buffer.ready = 0;
582582}
583583
584static UINT8 sdd1_mmio_read(address_space *space, UINT32 addr)
584static UINT8 sdd1_mmio_read(address_space &space, UINT32 addr)
585585{
586586   addr &= 0xffff;
587587
r17963r17964
605605   return snes_open_bus_r(space, 0);
606606}
607607
608static void sdd1_mmio_write(address_space *space, UINT32 addr, UINT8 data)
608static void sdd1_mmio_write(address_space &space, UINT32 addr, UINT8 data)
609609{
610610   addr &= 0xffff;
611611
trunk/src/mame/machine/atari.c
r17963r17964
275275}
276276
277277
278static UINT8 console_read(address_space *space)
278static UINT8 console_read(address_space &space)
279279{
280   return space->machine().root_device().ioport("console")->read();
280   return space.machine().root_device().ioport("console")->read();
281281}
282282
283283
284static void console_write(address_space *space, UINT8 data)
284static void console_write(address_space &space, UINT8 data)
285285{
286   dac_device *dac = space->machine().device<dac_device>("dac");
286   dac_device *dac = space.machine().device<dac_device>("dac");
287287   if (data & 0x08)
288288      dac->write_unsigned8((UINT8)-120);
289289   else
trunk/src/mame/machine/smpc.c
r17963r17964
627627 *
628628 *******************************************/
629629
630static void smpc_comreg_exec(address_space *space, UINT8 data, UINT8 is_stv)
630static void smpc_comreg_exec(address_space &space, UINT8 data, UINT8 is_stv)
631631{
632   saturn_state *state = space->machine().driver_data<saturn_state>();
632   saturn_state *state = space.machine().driver_data<saturn_state>();
633633
634634   switch (data)
635635   {
636636      case 0x00:
637637         if(LOG_SMPC) printf ("SMPC: Master ON\n");
638         smpc_master_on(space->machine());
638         smpc_master_on(space.machine());
639639         break;
640640      //case 0x01: Master OFF?
641641      case 0x02:
642642      case 0x03:
643643         if(LOG_SMPC) printf ("SMPC: Slave %s\n",(data & 1) ? "off" : "on");
644         space->machine().scheduler().timer_set(attotime::from_usec(100), FUNC(smpc_slave_enable),data & 1);
644         space.machine().scheduler().timer_set(attotime::from_usec(100), FUNC(smpc_slave_enable),data & 1);
645645         break;
646646      case 0x06:
647647      case 0x07:
648648         if(LOG_SMPC) printf ("SMPC: Sound %s\n",(data & 1) ? "off" : "on");
649649
650650         if(!is_stv)
651            space->machine().scheduler().timer_set(attotime::from_usec(100), FUNC(smpc_sound_enable),data & 1);
651            space.machine().scheduler().timer_set(attotime::from_usec(100), FUNC(smpc_sound_enable),data & 1);
652652         break;
653653      /*CD (SH-1) ON/OFF */
654654      //case 0x08:
655655      //case 0x09:
656656      case 0x0d:
657657         if(LOG_SMPC) printf ("SMPC: System Reset\n");
658         smpc_system_reset(space->machine());
658         smpc_system_reset(space.machine());
659659         break;
660660      case 0x0e:
661661      case 0x0f:
662         if(LOG_SMPC) printf ("SMPC: Change Clock to %s (%d %d)\n",data & 1 ? "320" : "352",space->machine().primary_screen->hpos(),space->machine().primary_screen->vpos());
662         if(LOG_SMPC) printf ("SMPC: Change Clock to %s (%d %d)\n",data & 1 ? "320" : "352",space.machine().primary_screen->hpos(),space.machine().primary_screen->vpos());
663663
664664         /* on ST-V timing of this is pretty fussy, you get 2 credits at start-up otherwise
665665               sokyugurentai threshold is 74 lines
666666               shanhigw threshold is 90 lines
667667               I assume that it needs ~100 lines, so 6666,(6) usecs. Obviously needs HW tests ... */
668668
669         space->machine().scheduler().timer_set(attotime::from_usec(6666), FUNC(smpc_change_clock),data & 1);
669         space.machine().scheduler().timer_set(attotime::from_usec(6666), FUNC(smpc_change_clock),data & 1);
670670         break;
671671      /*"Interrupt Back"*/
672672      case 0x10:
673673         if(0)
674674         {
675            saturn_state *state = space->machine().driver_data<saturn_state>();
676            printf ("SMPC: Status Acquire %02x %02x %02x %d\n",state->m_smpc.IREG[0],state->m_smpc.IREG[1],state->m_smpc.IREG[2],space->machine().primary_screen->vpos());
675            saturn_state *state = space.machine().driver_data<saturn_state>();
676            printf ("SMPC: Status Acquire %02x %02x %02x %d\n",state->m_smpc.IREG[0],state->m_smpc.IREG[1],state->m_smpc.IREG[2],space.machine().primary_screen->vpos());
677677         }
678678
679679         if(is_stv)
680            space->machine().scheduler().timer_set(attotime::from_usec(700), FUNC(stv_smpc_intback),0); //TODO: variable time
680            space.machine().scheduler().timer_set(attotime::from_usec(700), FUNC(stv_smpc_intback),0); //TODO: variable time
681681         else
682682         {
683683            int timing;
r17963r17964
692692
693693            /* TODO: check if IREG[2] is setted to 0xf0 */
694694
695            if(LOG_PAD_CMD) printf("INTBACK %02x %02x %d %d\n",state->m_smpc.IREG[0],state->m_smpc.IREG[1],space->machine().primary_screen->vpos(),(int)space->machine().primary_screen->frame_number());
696            space->machine().scheduler().timer_set(attotime::from_usec(timing), FUNC(saturn_smpc_intback),0); //TODO: is variable time correct?
695            if(LOG_PAD_CMD) printf("INTBACK %02x %02x %d %d\n",state->m_smpc.IREG[0],state->m_smpc.IREG[1],space.machine().primary_screen->vpos(),(int)space.machine().primary_screen->frame_number());
696            space.machine().scheduler().timer_set(attotime::from_usec(timing), FUNC(saturn_smpc_intback),0); //TODO: is variable time correct?
697697         }
698698         break;
699699      /* RTC write*/
700700      case 0x16:
701701         if(LOG_SMPC) printf("SMPC: RTC write\n");
702         smpc_rtc_write(space->machine());
702         smpc_rtc_write(space.machine());
703703         break;
704704      /* SMPC memory setting*/
705705      case 0x17:
706706         if(LOG_SMPC) printf ("SMPC: memory setting\n");
707         smpc_memory_setting(space->machine());
707         smpc_memory_setting(space.machine());
708708         break;
709709      case 0x18:
710710         if(LOG_SMPC) printf ("SMPC: NMI request\n");
711         smpc_nmi_req(space->machine());
711         smpc_nmi_req(space.machine());
712712         break;
713713      case 0x19:
714714      case 0x1a:
715715         if(LOG_SMPC) printf ("SMPC: NMI %sable\n",data & 1 ? "Dis" : "En");
716         smpc_nmi_set(space->machine(),data & 1);
716         smpc_nmi_set(space.machine(),data & 1);
717717         break;
718718      default:
719         printf ("cpu '%s' (PC=%08X) SMPC: undocumented Command %02x\n", space->device().tag(), space->device().safe_pc(), data);
719         printf ("cpu '%s' (PC=%08X) SMPC: undocumented Command %02x\n", space.device().tag(), space.device().safe_pc(), data);
720720   }
721721}
722722
r17963r17964
728728
729729READ8_HANDLER( stv_SMPC_r )
730730{
731   saturn_state *state = space->machine().driver_data<saturn_state>();
731   saturn_state *state = space.machine().driver_data<saturn_state>();
732732   int return_data = 0;
733733
734734   if(!(offset & 1))
r17963r17964
747747      return_data = state->ioport("DSW1")->read();
748748
749749   if (offset == 0x77)//PDR2 read
750      return_data = (0xfe | space->machine().device<eeprom_device>("eeprom")->read_bit());
750      return_data = (0xfe | space.machine().device<eeprom_device>("eeprom")->read_bit());
751751
752752   return return_data;
753753}
754754
755755WRITE8_HANDLER( stv_SMPC_w )
756756{
757   saturn_state *state = space->machine().driver_data<saturn_state>();
757   saturn_state *state = space.machine().driver_data<saturn_state>();
758758
759759   if (!(offset & 1)) // avoid writing to even bytes
760760      return;
r17963r17964
789789        ---- -x-- EEPROM CS line
790790        ---- --xx A-Bus bank bits
791791        */
792      eeprom_device *eeprom = space->machine().device<eeprom_device>("eeprom");
792      eeprom_device *eeprom = space.machine().device<eeprom_device>("eeprom");
793793      eeprom->set_clock_line((data & 0x08) ? ASSERT_LINE : CLEAR_LINE);
794794      eeprom->write_bit(data & 0x10);
795795      eeprom->set_cs_line((data & 0x04) ? CLEAR_LINE : ASSERT_LINE);
796796      state->m_stv_multi_bank = data & 3;
797797
798      stv_select_game(space->machine(), state->m_stv_multi_bank);
798      stv_select_game(space.machine(), state->m_stv_multi_bank);
799799
800800      state->m_smpc.PDR1 = (data & 0x60);
801801   }
r17963r17964
809809      //popmessage("PDR2 = %02x",state->m_smpc_ram[0x77]);
810810
811811      if(LOG_SMPC) printf("SMPC: M68k %s\n",(data & 0x10) ? "off" : "on");
812      //space->machine().scheduler().timer_set(attotime::from_usec(100), FUNC(smpc_sound_enable),(state->m_smpc_ram[0x77] & 0x10) >> 4);
812      //space.machine().scheduler().timer_set(attotime::from_usec(100), FUNC(smpc_sound_enable),(state->m_smpc_ram[0x77] & 0x10) >> 4);
813813      state->m_audiocpu->set_input_line(INPUT_LINE_RESET, (data & 0x10) ? ASSERT_LINE : CLEAR_LINE);
814814      state->m_en_68k = ((data & 0x10) >> 4) ^ 1;
815815
r17963r17964
843843
844844READ8_HANDLER( saturn_SMPC_r )
845845{
846   saturn_state *state = space->machine().driver_data<saturn_state>();
846   saturn_state *state = space.machine().driver_data<saturn_state>();
847847   UINT8 return_data = 0;
848848
849849   if (!(offset & 1)) // avoid reading to even bytes (TODO: is it 0s or 1s?)
r17963r17964
866866         const int shift_bit[4] = { 4, 12, 8, 0 };
867867         const char *const padnames[] = { "JOY1", "JOY2" };
868868
869         if(space->machine().root_device().ioport("INPUT_TYPE")->read() && !(space->debugger_access()))
869         if(space.machine().root_device().ioport("INPUT_TYPE")->read() && !(space.debugger_access()))
870870         {
871871            popmessage("Warning: read with SH-2 direct mode with a non-pad device");
872872            return 0;
r17963r17964
879879
880880         if (LOG_SMPC) logerror("SMPC: SH-2 direct mode, returning data for phase %d\n", hshake);
881881
882         return_data = 0x80 | 0x10 | ((space->machine().root_device().ioport(padnames[offset == 0x77])->read()>>shift_bit[hshake]) & 0xf);
882         return_data = 0x80 | 0x10 | ((space.machine().root_device().ioport(padnames[offset == 0x77])->read()>>shift_bit[hshake]) & 0xf);
883883      }
884884   }
885885
886   if (LOG_SMPC) logerror ("cpu %s (PC=%08X) SMPC: Read from Byte Offset %02x (%d) Returns %02x\n", space->device().tag(), space->device().safe_pc(), offset, offset>>1, return_data);
886   if (LOG_SMPC) logerror ("cpu %s (PC=%08X) SMPC: Read from Byte Offset %02x (%d) Returns %02x\n", space.device().tag(), space.device().safe_pc(), offset, offset>>1, return_data);
887887
888888
889889   return return_data;
r17963r17964
891891
892892WRITE8_HANDLER( saturn_SMPC_w )
893893{
894   saturn_state *state = space->machine().driver_data<saturn_state>();
894   saturn_state *state = space.machine().driver_data<saturn_state>();
895895
896896   if (LOG_SMPC) logerror ("8-bit SMPC Write to Offset %02x (reg %d) with Data %02x\n", offset, offset>>1, data);
897897
r17963r17964
914914         else if(data & 0x80)
915915         {
916916            if(LOG_PAD_CMD) printf("SMPC: CONTINUE request\n");
917            space->machine().scheduler().timer_set(attotime::from_usec(700), FUNC(intback_peripheral),0); /* TODO: is timing correct? */
917            space.machine().scheduler().timer_set(attotime::from_usec(700), FUNC(intback_peripheral),0); /* TODO: is timing correct? */
918918            state->m_smpc.OREG[31] = 0x10;
919919            state->m_smpc.SF = 0x01; //TODO: set hand-shake flag?
920920         }
trunk/src/mame/machine/segas32.c
r17963r17964
207207
208208void darkedge_fd1149_vblank(device_t *device)
209209{
210   address_space *space = device->memory().space(AS_PROGRAM);
210   address_space &space = *device->memory().space(AS_PROGRAM);
211211
212   space->write_word(0x20f072, 0);
213   space->write_word(0x20f082, 0);
212   space.write_word(0x20f072, 0);
213   space.write_word(0x20f082, 0);
214214
215   if( space->read_byte(0x20a12c) != 0 )
215   if( space.read_byte(0x20a12c) != 0 )
216216   {
217      space->write_byte(0x20a12c, space->read_byte(0x20a12c)-1 );
217      space.write_byte(0x20a12c, space.read_byte(0x20a12c)-1 );
218218
219      if( space->read_byte(0x20a12c) == 0 )
220         space->write_byte(0x20a12e, 1);
219      if( space.read_byte(0x20a12c) == 0 )
220         space.write_byte(0x20a12e, 1);
221221   }
222222}
223223
r17963r17964
243243
244244void f1lap_fd1149_vblank(device_t *device)
245245{
246   address_space *space = device->memory().space(AS_PROGRAM);
246   address_space &space = *device->memory().space(AS_PROGRAM);
247247
248   space->write_byte(0x20F7C6, 0);
248   space.write_byte(0x20F7C6, 0);
249249
250250   // needed to start a game
251   UINT8 val = space->read_byte(0x20EE81);
252   if (val == 0xff)  space->write_byte(0x20EE81,0);
251   UINT8 val = space.read_byte(0x20EE81);
252   if (val == 0xff)  space.write_byte(0x20EE81,0);
253253
254254}
255255
trunk/src/mame/machine/acitya.c
r17963r17964
152152
153153READ8_HANDLER( acitya_decrypt_rom )
154154{
155   pacman_state *state = space->machine().driver_data<pacman_state>();
155   pacman_state *state = space.machine().driver_data<pacman_state>();
156156   if (offset & 0x01)
157157   {
158158      state->m_counter = (state->m_counter - 1) & 0x0F;
trunk/src/mame/machine/pgmprot4.c
r17963r17964
111111
112112      for (x = 0; x < size; x++)
113113      {
114         //UINT16 *RAMDUMP = (UINT16*)space->machine().root_device().memregion("user2")->base();
114         //UINT16 *RAMDUMP = (UINT16*)space.machine().root_device().memregion("user2")->base();
115115         //UINT16 dat = RAMDUMP[dst + x];
116116
117117         UINT16 dat2 = PROTROM[src + x];
r17963r17964
279279{
280280//  mame_printf_debug("killbrd prot r\n");
281281//  return 0;
282   pgm_022_025_state *state = space->machine().driver_data<pgm_022_025_state>();
282   pgm_022_025_state *state = space.machine().driver_data<pgm_022_025_state>();
283283   offset &= 0xf;
284284
285285   if (offset == 0)
286286      state->m_kb_cmd = data;
287287   else //offset==2
288288   {
289      logerror("%06X: ASIC25 W CMD %X  VAL %X\n", space->device().safe_pc(), state->m_kb_cmd, data);
289      logerror("%06X: ASIC25 W CMD %X  VAL %X\n", space.device().safe_pc(), state->m_kb_cmd, data);
290290      if (state->m_kb_cmd == 0)
291291         state->m_kb_reg = data;
292292      else if (state->m_kb_cmd == 2)
293293      {
294294         if (data == 1)   //Execute cmd
295295         {
296            IGS022_handle_command(space->machine());
296            IGS022_handle_command(space.machine());
297297            state->m_kb_reg++;
298298         }
299299      }
r17963r17964
307307static READ16_HANDLER( killbld_igs025_prot_r )
308308{
309309//  mame_printf_debug("killbld prot w\n");
310   pgm_022_025_state *state = space->machine().driver_data<pgm_022_025_state>();
310   pgm_022_025_state *state = space.machine().driver_data<pgm_022_025_state>();
311311   UINT16 res ;
312312
313313   offset &= 0xf;
r17963r17964
334334         }
335335         else
336336         {
337            UINT32 protvalue = 0x89911400 | space->machine().root_device().ioport("Region")->read();
337            UINT32 protvalue = 0x89911400 | space.machine().root_device().ioport("Region")->read();
338338            ret = (protvalue >> (8 * (state->m_kb_ptr - 1))) & 0xff;
339339         }
340340
r17963r17964
342342
343343      }
344344   }
345   logerror("%06X: ASIC25 R CMD %X  VAL %X\n", space->device().safe_pc(), state->m_kb_cmd, res);
345   logerror("%06X: ASIC25 R CMD %X  VAL %X\n", space.device().safe_pc(), state->m_kb_cmd, res);
346346   return res;
347347}
348348
r17963r17964
451451static UINT8 dw3_swap;
452452static WRITE16_HANDLER( drgw3_igs025_prot_w )
453453{
454   pgm_022_025_state *state = space->machine().driver_data<pgm_022_025_state>();
454   pgm_022_025_state *state = space.machine().driver_data<pgm_022_025_state>();
455455
456456   offset&=0xf;
457457
r17963r17964
459459      state->m_kb_cmd=data;
460460   else //offset==2
461461   {
462      printf("%06X: ASIC25 W CMD %X  VAL %X\n",space->device().safe_pc(),state->m_kb_cmd,data);
462      printf("%06X: ASIC25 W CMD %X  VAL %X\n",space.device().safe_pc(),state->m_kb_cmd,data);
463463      if(state->m_kb_cmd==0)
464464         reg=data;
465465      else if(state->m_kb_cmd==3)   //??????????
r17963r17964
478478static READ16_HANDLER( drgw3_igs025_prot_r )
479479{
480480//  mame_printf_debug("killbld prot w\n");
481   pgm_022_025_state *state = space->machine().driver_data<pgm_022_025_state>();
481   pgm_022_025_state *state = space.machine().driver_data<pgm_022_025_state>();
482482
483483   UINT16 res ;
484484
r17963r17964
510510      else if(state->m_kb_cmd==5)
511511      {
512512         UINT32 protvalue;
513         protvalue = 0x60000|space->machine().root_device().ioport("Region")->read();
513         protvalue = 0x60000|space.machine().root_device().ioport("Region")->read();
514514         res=(protvalue>>(8*(ptr-1)))&0xff;
515515
516516
517517      }
518518   }
519   logerror("%06X: ASIC25 R CMD %X  VAL %X\n",space->device().safe_pc(),state->m_kb_cmd,res);
519   logerror("%06X: ASIC25 R CMD %X  VAL %X\n",space.device().safe_pc(),state->m_kb_cmd,res);
520520   return res;
521521}
522522
trunk/src/mame/machine/cx4fn.c
r17963r17964
101101   UINT8 Color;
102102   INT32 i;
103103
104   address_space *space = machine.device<cpu_device>("maincpu")->space(AS_PROGRAM);
104   address_space &space = *machine.device<cpu_device>("maincpu")->space(AS_PROGRAM);
105105   for(i = cx4.ram[0x0295]; i > 0; i--, line += 5)
106106   {
107      if(space->read_byte(line) == 0xff &&
108         space->read_byte(line + 1) == 0xff)
107      if(space.read_byte(line) == 0xff &&
108         space.read_byte(line + 1) == 0xff)
109109      {
110110         INT32 tmp = line - 5;
111         while(space->read_byte(tmp + 2) == 0xff &&
112              space->read_byte(tmp + 3) == 0xff &&
111         while(space.read_byte(tmp + 2) == 0xff &&
112              space.read_byte(tmp + 3) == 0xff &&
113113              (tmp + 2) >= 0)
114114         {
115115            tmp -= 5;
116116         }
117117         point1 = (CX4_read(0x1f82) << 16) |
118                (space->read_byte(tmp + 2) << 8) |
119                 space->read_byte(tmp + 3);
118                (space.read_byte(tmp + 2) << 8) |
119                 space.read_byte(tmp + 3);
120120      }
121121      else
122122      {
123123         point1 = (CX4_read(0x1f82) << 16) |
124                (space->read_byte(line) << 8) |
125                 space->read_byte(line + 1);
124                (space.read_byte(line) << 8) |
125                 space.read_byte(line + 1);
126126      }
127127      point2 = (CX4_read(0x1f82) << 16) |
128             (space->read_byte(line + 2) << 8) |
129              space->read_byte(line + 3);
128             (space.read_byte(line + 2) << 8) |
129              space.read_byte(line + 3);
130130
131      X1=(space->read_byte(point1 + 0) << 8) |
132         space->read_byte(point1 + 1);
133      Y1=(space->read_byte(point1 + 2) << 8) |
134         space->read_byte(point1 + 3);
135      Z1=(space->read_byte(point1 + 4) << 8) |
136         space->read_byte(point1 + 5);
137      X2=(space->read_byte(point2 + 0) << 8) |
138         space->read_byte(point2 + 1);
139      Y2=(space->read_byte(point2 + 2) << 8) |
140         space->read_byte(point2 + 3);
141      Z2=(space->read_byte(point2 + 4) << 8) |
142         space->read_byte(point2 + 5);
143      Color = space->read_byte(line + 4);
131      X1=(space.read_byte(point1 + 0) << 8) |
132         space.read_byte(point1 + 1);
133      Y1=(space.read_byte(point1 + 2) << 8) |
134         space.read_byte(point1 + 3);
135      Z1=(space.read_byte(point1 + 4) << 8) |
136         space.read_byte(point1 + 5);
137      X2=(space.read_byte(point2 + 0) << 8) |
138         space.read_byte(point2 + 1);
139      Y2=(space.read_byte(point2 + 2) << 8) |
140         space.read_byte(point2 + 3);
141      Z2=(space.read_byte(point2 + 4) << 8) |
142         space.read_byte(point2 + 5);
143      Color = space.read_byte(line + 4);
144144      CX4_C4DrawLine(X1, Y1, Z1, X2, Y2, Z2, Color);
145145   }
146146}
trunk/src/mame/machine/decocass.c
r17963r17964
5959
6060WRITE8_HANDLER( decocass_sound_command_w )
6161{
62   decocass_state *state = space->machine().driver_data<decocass_state>();
63   LOG(2,("CPU %s sound command -> $%02x\n", space->device().tag(), data));
64   state->soundlatch_byte_w(*space, 0, data);
62   decocass_state *state = space.machine().driver_data<decocass_state>();
63   LOG(2,("CPU %s sound command -> $%02x\n", space.device().tag(), data));
64   state->soundlatch_byte_w(space, 0, data);
6565   state->m_sound_ack |= 0x80;
6666   /* remove snd cpu data ack bit. i don't see it in the schems, but... */
6767   state->m_sound_ack &= ~0x40;
r17963r17964
7070
7171READ8_HANDLER( decocass_sound_data_r )
7272{
73   decocass_state *state = space->machine().driver_data<decocass_state>();
74   UINT8 data = state->soundlatch2_byte_r(*space, 0);
75   LOG(2,("CPU %s sound data    <- $%02x\n", space->device().tag(), data));
73   decocass_state *state = space.machine().driver_data<decocass_state>();
74   UINT8 data = state->soundlatch2_byte_r(space, 0);
75   LOG(2,("CPU %s sound data    <- $%02x\n", space.device().tag(), data));
7676   return data;
7777}
7878
7979READ8_HANDLER( decocass_sound_ack_r )
8080{
81   decocass_state *state = space->machine().driver_data<decocass_state>();
81   decocass_state *state = space.machine().driver_data<decocass_state>();
8282   UINT8 data = state->m_sound_ack;   /* D6+D7 */
83   LOG(4,("CPU %s sound ack     <- $%02x\n", space->device().tag(), data));
83   LOG(4,("CPU %s sound ack     <- $%02x\n", space.device().tag(), data));
8484   return data;
8585}
8686
8787WRITE8_HANDLER( decocass_sound_data_w )
8888{
89   decocass_state *state = space->machine().driver_data<decocass_state>();
90   LOG(2,("CPU %s sound data    -> $%02x\n", space->device().tag(), data));
91   state->soundlatch2_byte_w(*space, 0, data);
89   decocass_state *state = space.machine().driver_data<decocass_state>();
90   LOG(2,("CPU %s sound data    -> $%02x\n", space.device().tag(), data));
91   state->soundlatch2_byte_w(space, 0, data);
9292   state->m_sound_ack |= 0x40;
9393}
9494
9595READ8_HANDLER( decocass_sound_command_r )
9696{
97   decocass_state *state = space->machine().driver_data<decocass_state>();
98   UINT8 data = state->soundlatch_byte_r(*space, 0);
99   LOG(4,("CPU %s sound command <- $%02x\n", space->device().tag(), data));
97   decocass_state *state = space.machine().driver_data<decocass_state>();
98   UINT8 data = state->soundlatch_byte_r(space, 0);
99   LOG(4,("CPU %s sound command <- $%02x\n", space.device().tag(), data));
100100   state->m_audiocpu->set_input_line(M6502_IRQ_LINE, CLEAR_LINE);
101101   state->m_sound_ack &= ~0x80;
102102   return data;
r17963r17964
112112
113113WRITE8_HANDLER( decocass_sound_nmi_enable_w )
114114{
115   decocass_state *state = space->machine().driver_data<decocass_state>();
115   decocass_state *state = space.machine().driver_data<decocass_state>();
116116   state->m_audio_nmi_enabled = 1;
117117   state->m_audiocpu->set_input_line(INPUT_LINE_NMI, (state->m_audio_nmi_enabled && state->m_audio_nmi_state) ? ASSERT_LINE : CLEAR_LINE);
118118}
119119
120120READ8_HANDLER( decocass_sound_nmi_enable_r )
121121{
122   decocass_state *state = space->machine().driver_data<decocass_state>();
122   decocass_state *state = space.machine().driver_data<decocass_state>();
123123   state->m_audio_nmi_enabled = 1;
124124   state->m_audiocpu->set_input_line(INPUT_LINE_NMI, (state->m_audio_nmi_enabled && state->m_audio_nmi_state) ? ASSERT_LINE : CLEAR_LINE);
125125   return 0xff;
r17963r17964
127127
128128READ8_HANDLER( decocass_sound_data_ack_reset_r )
129129{
130   decocass_state *state = space->machine().driver_data<decocass_state>();
130   decocass_state *state = space.machine().driver_data<decocass_state>();
131131   UINT8 data = 0xff;
132   LOG(2,("CPU %s sound ack rst <- $%02x\n", space->device().tag(), data));
132   LOG(2,("CPU %s sound ack rst <- $%02x\n", space.device().tag(), data));
133133   state->m_sound_ack &= ~0x40;
134134   return data;
135135}
136136
137137WRITE8_HANDLER( decocass_sound_data_ack_reset_w )
138138{
139   decocass_state *state = space->machine().driver_data<decocass_state>();
140   LOG(2,("CPU %s sound ack rst -> $%02x\n", space->device().tag(), data));
139   decocass_state *state = space.machine().driver_data<decocass_state>();
140   LOG(2,("CPU %s sound ack rst -> $%02x\n", space.device().tag(), data));
141141   state->m_sound_ack &= ~0x40;
142142}
143143
144144WRITE8_HANDLER( decocass_nmi_reset_w )
145145{
146   decocass_state *state = space->machine().driver_data<decocass_state>();
146   decocass_state *state = space.machine().driver_data<decocass_state>();
147147   state->m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE );
148148}
149149
150150WRITE8_HANDLER( decocass_quadrature_decoder_reset_w )
151151{
152   decocass_state *state = space->machine().driver_data<decocass_state>();
152   decocass_state *state = space.machine().driver_data<decocass_state>();
153153
154154   /* just latch the analog controls here */
155155   state->m_quadrature_decoder[0] = state->ioport("AN0")->read();
r17963r17964
174174 */
175175READ8_HANDLER( decocass_input_r )
176176{
177   decocass_state *state = space->machine().driver_data<decocass_state>();
177   decocass_state *state = space.machine().driver_data<decocass_state>();
178178   UINT8 data = 0xff;
179179   static const char *const portnames[] = { "IN0", "IN1", "IN2" };
180180
181181   switch (offset & 7)
182182   {
183183   case 0: case 1: case 2:
184      data = space->machine().root_device().ioport(portnames[offset & 7])->read();
184      data = space.machine().root_device().ioport(portnames[offset & 7])->read();
185185      break;
186186   case 3: case 4: case 5: case 6:
187187      data = state->m_quadrature_decoder[(offset & 7) - 3];
r17963r17964
209209
210210WRITE8_HANDLER( decocass_reset_w )
211211{
212   decocass_state *state = space->machine().driver_data<decocass_state>();
213   LOG(1,("%10s 6502-PC: %04x decocass_reset_w(%02x): $%02x\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
212   decocass_state *state = space.machine().driver_data<decocass_state>();
213   LOG(1,("%10s 6502-PC: %04x decocass_reset_w(%02x): $%02x\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
214214   state->m_decocass_reset = data;
215215
216216   /* CPU #1 active high reset */
r17963r17964
277277
278278static READ8_HANDLER( decocass_type1_latch_26_pass_3_inv_2_r )
279279{
280   decocass_state *state = space->machine().driver_data<decocass_state>();
280   decocass_state *state = space.machine().driver_data<decocass_state>();
281281   UINT8 data;
282282
283283   if (1 == (offset & 1))
r17963r17964
289289
290290      data = (BIT(data, 0) << 0) | (BIT(data, 1) << 1) | 0x7c;
291291      LOG(4,("%10s 6502-PC: %04x decocass_type1_latch_26_pass_3_inv_2_r(%02x): $%02x <- (%s %s)\n",
292         space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data,
292         space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data,
293293         (data & 1) ? "OBF" : "-",
294294         (data & 2) ? "IBF" : "-"));
295295   }
r17963r17964
297297   {
298298      offs_t promaddr;
299299      UINT8 save;
300      UINT8 *prom = space->machine().root_device().memregion("dongle")->base();
300      UINT8 *prom = space.machine().root_device().memregion("dongle")->base();
301301
302302      if (state->m_firsttime)
303303      {
r17963r17964
337337         (((prom[promaddr] >> 4) & 1)            << MAP7(state->m_type1_outmap));
338338
339339      LOG(3,("%10s 6502-PC: %04x decocass_type1_latch_26_pass_3_inv_2_r(%02x): $%02x\n",
340         space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
340         space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
341341
342342      state->m_latch1 = save;      /* latch the data for the next A0 == 0 read */
343343   }
r17963r17964
357357
358358static READ8_HANDLER( decocass_type1_pass_136_r )
359359{
360   decocass_state *state = space->machine().driver_data<decocass_state>();
360   decocass_state *state = space.machine().driver_data<decocass_state>();
361361   UINT8 data;
362362
363363   if (1 == (offset & 1))
r17963r17964
369369
370370      data = (BIT(data, 0) << 0) | (BIT(data, 1) << 1) | 0x7c;
371371      LOG(4,("%10s 6502-PC: %04x decocass_type1_pass_136_r(%02x): $%02x <- (%s %s)\n",
372         space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data,
372         space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data,
373373         (data & 1) ? "OBF" : "-",
374374         (data & 2) ? "IBF" : "-"));
375375   }
r17963r17964
377377   {
378378      offs_t promaddr;
379379      UINT8 save;
380      UINT8 *prom = space->machine().root_device().memregion("dongle")->base();
380      UINT8 *prom = space.machine().root_device().memregion("dongle")->base();
381381
382382      if (state->m_firsttime)
383383      {
r17963r17964
417417         (((prom[promaddr] >> 4) & 1)            << MAP7(state->m_type1_outmap));
418418
419419      LOG(3,("%10s 6502-PC: %04x decocass_type1_pass_136_r(%02x): $%02x\n",
420         space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
420         space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
421421
422422      state->m_latch1 = save;      /* latch the data for the next A0 == 0 read */
423423   }
r17963r17964
437437
438438static READ8_HANDLER( decocass_type1_latch_27_pass_3_inv_2_r )
439439{
440   decocass_state *state = space->machine().driver_data<decocass_state>();
440   decocass_state *state = space.machine().driver_data<decocass_state>();
441441   UINT8 data;
442442
443443   if (1 == (offset & 1))
r17963r17964
449449
450450      data = (BIT(data, 0) << 0) | (BIT(data, 1) << 1) | 0x7c;
451451      LOG(4,("%10s 6502-PC: %04x decocass_type1_latch_27_pass_3_inv_2_r(%02x): $%02x <- (%s %s)\n",
452         space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data,
452         space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data,
453453         (data & 1) ? "OBF" : "-",
454454         (data & 2) ? "IBF" : "-"));
455455   }
r17963r17964
457457   {
458458      offs_t promaddr;
459459      UINT8 save;
460      UINT8 *prom = space->machine().root_device().memregion("dongle")->base();
460      UINT8 *prom = space.machine().root_device().memregion("dongle")->base();
461461
462462      if (state->m_firsttime)
463463      {
r17963r17964
497497         (((state->m_latch1 >> MAP7(state->m_type1_inmap)) & 1)      << MAP7(state->m_type1_outmap));
498498
499499      LOG(3,("%10s 6502-PC: %04x decocass_type1_latch_27_pass_3_inv_2_r(%02x): $%02x\n",
500         space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
500         space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
501501
502502      state->m_latch1 = save;      /* latch the data for the next A0 == 0 read */
503503   }
r17963r17964
517517
518518static READ8_HANDLER( decocass_type1_latch_26_pass_5_inv_2_r )
519519{
520   decocass_state *state = space->machine().driver_data<decocass_state>();
520   decocass_state *state = space.machine().driver_data<decocass_state>();
521521   UINT8 data;
522522
523523   if (1 == (offset & 1))
r17963r17964
529529
530530      data = (BIT(data, 0) << 0) | (BIT(data, 1) << 1) | 0x7c;
531531      LOG(4,("%10s 6502-PC: %04x decocass_type1_latch_26_pass_5_inv_2_r(%02x): $%02x <- (%s %s)\n",
532         space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data,
532         space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data,
533533         (data & 1) ? "OBF" : "-",
534534         (data & 2) ? "IBF" : "-"));
535535   }
r17963r17964
537537   {
538538      offs_t promaddr;
539539      UINT8 save;
540      UINT8 *prom = space->machine().root_device().memregion("dongle")->base();
540      UINT8 *prom = space.machine().root_device().memregion("dongle")->base();
541541
542542      if (state->m_firsttime)
543543      {
r17963r17964
577577         (((prom[promaddr] >> 4) & 1)            << MAP7(state->m_type1_outmap));
578578
579579      LOG(3,("%10s 6502-PC: %04x decocass_type1_latch_26_pass_5_inv_2_r(%02x): $%02x\n",
580         space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
580         space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
581581
582582      state->m_latch1 = save;      /* latch the data for the next A0 == 0 read */
583583   }
r17963r17964
599599
600600static READ8_HANDLER( decocass_type1_latch_16_pass_3_inv_1_r )
601601{
602   decocass_state *state = space->machine().driver_data<decocass_state>();
602   decocass_state *state = space.machine().driver_data<decocass_state>();
603603   UINT8 data;
604604
605605   if (1 == (offset & 1))
r17963r17964
611611
612612      data = (BIT(data, 0) << 0) | (BIT(data, 1) << 1) | 0x7c;
613613      LOG(4,("%10s 6502-PC: %04x decocass_type1_latch_16_pass_3_inv_1_r(%02x): $%02x <- (%s %s)\n",
614         space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data,
614         space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data,
615615         (data & 1) ? "OBF" : "-",
616616         (data & 2) ? "IBF" : "-"));
617617   }
r17963r17964
619619   {
620620      offs_t promaddr;
621621      UINT8 save;
622      UINT8 *prom = space->machine().root_device().memregion("dongle")->base();
622      UINT8 *prom = space.machine().root_device().memregion("dongle")->base();
623623
624624      if (state->m_firsttime)
625625      {
r17963r17964
659659         (((prom[promaddr] >> 4) & 1)            << MAP7(state->m_type1_outmap));
660660
661661      LOG(3,("%10s 6502-PC: %04x decocass_type1_latch_16_pass_3_inv_1_r(%02x): $%02x\n",
662         space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
662         space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
663663
664664      state->m_latch1 = save;      /* latch the data for the next A0 == 0 read */
665665   }
r17963r17964
680680 ***************************************************************************/
681681static READ8_HANDLER( decocass_type2_r )
682682{
683   decocass_state *state = space->machine().driver_data<decocass_state>();
683   decocass_state *state = space.machine().driver_data<decocass_state>();
684684   UINT8 data;
685685
686686   if (1 == state->m_type2_xx_latch)
r17963r17964
689689      {
690690         UINT8 *prom = state->memregion("dongle")->base();
691691         data = prom[256 * state->m_type2_d2_latch + state->m_type2_promaddr];
692         LOG(3,("%10s 6502-PC: %04x decocass_type2_r(%02x): $%02x <- prom[%03x]\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, 256 * state->m_type2_d2_latch + state->m_type2_promaddr));
692         LOG(3,("%10s 6502-PC: %04x decocass_type2_r(%02x): $%02x <- prom[%03x]\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data, 256 * state->m_type2_d2_latch + state->m_type2_promaddr));
693693      }
694694      else
695695      {
r17963r17964
703703      else
704704         data = offset & 0xff;
705705
706      LOG(3,("%10s 6502-PC: %04x decocass_type2_r(%02x): $%02x <- 8041-%s\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, offset & 1 ? "STATUS" : "DATA"));
706      LOG(3,("%10s 6502-PC: %04x decocass_type2_r(%02x): $%02x <- 8041-%s\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data, offset & 1 ? "STATUS" : "DATA"));
707707   }
708708   return data;
709709}
710710
711711static WRITE8_HANDLER( decocass_type2_w )
712712{
713   decocass_state *state = space->machine().driver_data<decocass_state>();
713   decocass_state *state = space.machine().driver_data<decocass_state>();
714714   if (1 == state->m_type2_xx_latch)
715715   {
716716      if (1 == (offset & 1))
717717      {
718         LOG(4,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> set PROM+D2 latch", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
718         LOG(4,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> set PROM+D2 latch", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
719719      }
720720      else
721721      {
722722         state->m_type2_promaddr = data;
723         LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> set PROM addr $%02x\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, state->m_type2_promaddr));
723         LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> set PROM addr $%02x\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data, state->m_type2_promaddr));
724724         return;
725725      }
726726   }
727727   else
728728   {
729      LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s ", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041 DATA"));
729      LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s ", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041 DATA"));
730730   }
731731   if (1 == (offset & 1))
732732   {
r17963r17964
740740   upi41_master_w(state->m_mcu, offset & 1, data);
741741
742742#ifdef MAME_DEBUG
743   decocass_fno(space->machine(), offset, data);
743   decocass_fno(space.machine(), offset, data);
744744#endif
745745}
746746
r17963r17964
764764 ***************************************************************************/
765765static READ8_HANDLER( decocass_type3_r )
766766{
767   decocass_state *state = space->machine().driver_data<decocass_state>();
767   decocass_state *state = space.machine().driver_data<decocass_state>();
768768   UINT8 data, save;
769769
770770   if (1 == (offset & 1))
r17963r17964
773773      {
774774         UINT8 *prom = state->memregion("dongle")->base();
775775         data = prom[state->m_type3_ctrs];
776         LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- prom[$%03x]\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, state->m_type3_ctrs));
776         LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- prom[$%03x]\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data, state->m_type3_ctrs));
777777         if (++state->m_type3_ctrs == 4096)
778778            state->m_type3_ctrs = 0;
779779      }
r17963r17964
782782         if (0 == (offset & E5XX_MASK))
783783         {
784784            data = upi41_master_r(state->m_mcu, 1);
785            LOG(4,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- 8041 STATUS\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
785            LOG(4,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- 8041 STATUS\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
786786         }
787787         else
788788         {
789789            data = 0xff;   /* open data bus? */
790            LOG(4,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- open bus\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
790            LOG(4,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- open bus\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
791791         }
792792      }
793793   }
r17963r17964
796796      if (1 == state->m_type3_pal_19)
797797      {
798798         save = data = 0xff;    /* open data bus? */
799         LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- open bus", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
799         LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- open bus", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
800800      }
801801      else
802802      {
r17963r17964
938938                  (BIT(save, 7) << 7);
939939            }
940940            state->m_type3_d0_latch = save & 1;
941            LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x '%c' <- 8041-DATA\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, (data >= 32) ? data : '.'));
941            LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x '%c' <- 8041-DATA\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data, (data >= 32) ? data : '.'));
942942         }
943943         else
944944         {
r17963r17964
952952               (BIT(save, 5) << 5) |
953953               (BIT(save, 6) << 7) |
954954               (BIT(save, 7) << 6);
955            LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, (data >= 32) ? data : '.'));
955            LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data, (data >= 32) ? data : '.'));
956956            state->m_type3_d0_latch = save & 1;
957957         }
958958      }
r17963r17964
963963
964964static WRITE8_HANDLER( decocass_type3_w )
965965{
966   decocass_state *state = space->machine().driver_data<decocass_state>();
966   decocass_state *state = space.machine().driver_data<decocass_state>();
967967   if (1 == (offset & 1))
968968   {
969969      if (1 == state->m_type3_pal_19)
970970      {
971971         state->m_type3_ctrs = data << 4;
972         LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, "LDCTRS"));
972         LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data, "LDCTRS"));
973973         return;
974974      }
975975      else
r17963r17964
981981      if (1 == state->m_type3_pal_19)
982982      {
983983         /* write nowhere?? */
984         LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, "nowhere?"));
984         LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data, "nowhere?"));
985985         return;
986986      }
987987   }
988   LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
988   LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
989989   upi41_master_w(state->m_mcu, offset, data);
990990}
991991
r17963r17964
10041004
10051005static READ8_HANDLER( decocass_type4_r )
10061006{
1007   decocass_state *state = space->machine().driver_data<decocass_state>();
1007   decocass_state *state = space.machine().driver_data<decocass_state>();
10081008   UINT8 data;
10091009
10101010   if (1 == (offset & 1))
r17963r17964
10121012      if (0 == (offset & E5XX_MASK))
10131013      {
10141014         data = upi41_master_r(state->m_mcu, 1);
1015         LOG(4,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x <- 8041 STATUS\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
1015         LOG(4,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x <- 8041 STATUS\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
10161016      }
10171017      else
10181018      {
10191019         data = 0xff;   /* open data bus? */
1020         LOG(4,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x <- open bus\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
1020         LOG(4,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x <- open bus\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
10211021      }
10221022   }
10231023   else
10241024   {
10251025      if (state->m_type4_latch)
10261026      {
1027         UINT8 *prom = space->machine().root_device().memregion("dongle")->base();
1027         UINT8 *prom = space.machine().root_device().memregion("dongle")->base();
10281028
10291029         data = prom[state->m_type4_ctrs];
1030         LOG(3,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x '%c' <- PROM[%04x]\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, (data >= 32) ? data : '.', state->m_type4_ctrs));
1030         LOG(3,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x '%c' <- PROM[%04x]\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data, (data >= 32) ? data : '.', state->m_type4_ctrs));
10311031         state->m_type4_ctrs = (state->m_type4_ctrs + 1) & 0x7fff;
10321032      }
10331033      else
r17963r17964
10351035         if (0 == (offset & E5XX_MASK))
10361036         {
10371037            data = upi41_master_r(state->m_mcu, 0);
1038            LOG(3,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, (data >= 32) ? data : '.'));
1038            LOG(3,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data, (data >= 32) ? data : '.'));
10391039         }
10401040         else
10411041         {
10421042            data = 0xff;   /* open data bus? */
1043            LOG(4,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x <- open bus\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
1043            LOG(4,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x <- open bus\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
10441044         }
10451045      }
10461046   }
r17963r17964
10501050
10511051static WRITE8_HANDLER( decocass_type4_w )
10521052{
1053   decocass_state *state = space->machine().driver_data<decocass_state>();
1053   decocass_state *state = space.machine().driver_data<decocass_state>();
10541054   if (1 == (offset & 1))
10551055   {
10561056      if (1 == state->m_type4_latch)
10571057      {
10581058         state->m_type4_ctrs = (state->m_type4_ctrs & 0x00ff) | ((data & 0x7f) << 8);
1059         LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> CTRS MSB (%04x)\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, state->m_type4_ctrs));
1059         LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> CTRS MSB (%04x)\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data, state->m_type4_ctrs));
10601060         return;
10611061      }
10621062      else
r17963r17964
10701070      if (state->m_type4_latch)
10711071      {
10721072         state->m_type4_ctrs = (state->m_type4_ctrs & 0xff00) | data;
1073         LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> CTRS LSB (%04x)\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, state->m_type4_ctrs));
1073         LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> CTRS LSB (%04x)\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data, state->m_type4_ctrs));
10741074         return;
10751075      }
10761076   }
1077   LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
1077   LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
10781078   upi41_master_w(state->m_mcu, offset, data);
10791079}
10801080
r17963r17964
10891089
10901090static READ8_HANDLER( decocass_type5_r )
10911091{
1092   decocass_state *state = space->machine().driver_data<decocass_state>();
1092   decocass_state *state = space.machine().driver_data<decocass_state>();
10931093   UINT8 data;
10941094
10951095   if (1 == (offset & 1))
r17963r17964
10971097      if (0 == (offset & E5XX_MASK))
10981098      {
10991099         data = upi41_master_r(state->m_mcu, 1);
1100         LOG(4,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x <- 8041 STATUS\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
1100         LOG(4,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x <- 8041 STATUS\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
11011101      }
11021102      else
11031103      {
11041104         data = 0xff;   /* open data bus? */
1105         LOG(4,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x <- open bus\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
1105         LOG(4,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x <- open bus\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
11061106      }
11071107   }
11081108   else
r17963r17964
11101110      if (state->m_type5_latch)
11111111      {
11121112         data = 0x55;   /* Only a fixed value? It looks like this is all we need to do */
1113         LOG(3,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x '%c' <- fixed value???\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, (data >= 32) ? data : '.'));
1113         LOG(3,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x '%c' <- fixed value???\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data, (data >= 32) ? data : '.'));
11141114      }
11151115      else
11161116      {
11171117         if (0 == (offset & E5XX_MASK))
11181118         {
11191119            data = upi41_master_r(state->m_mcu, 0);
1120            LOG(3,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, (data >= 32) ? data : '.'));
1120            LOG(3,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data, (data >= 32) ? data : '.'));
11211121         }
11221122         else
11231123         {
11241124            data = 0xff;   /* open data bus? */
1125            LOG(4,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x <- open bus\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
1125            LOG(4,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x <- open bus\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
11261126         }
11271127      }
11281128   }
r17963r17964
11321132
11331133static WRITE8_HANDLER( decocass_type5_w )
11341134{
1135   decocass_state *state = space->machine().driver_data<decocass_state>();
1135   decocass_state *state = space.machine().driver_data<decocass_state>();
11361136   if (1 == (offset & 1))
11371137   {
11381138      if (1 == state->m_type5_latch)
11391139      {
1140         LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, "latch #2??"));
1140         LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data, "latch #2??"));
11411141         return;
11421142      }
11431143      else
r17963r17964
11491149      if (state->m_type5_latch)
11501150      {
11511151         /* write nowhere?? */
1152         LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, "nowhere?"));
1152         LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data, "nowhere?"));
11531153         return;
11541154      }
11551155   }
1156   LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
1156   LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
11571157   upi41_master_w(state->m_mcu, offset, data);
11581158}
11591159
r17963r17964
11671167
11681168static READ8_HANDLER( decocass_nodong_r )
11691169{
1170   decocass_state *state = space->machine().driver_data<decocass_state>();
1170   decocass_state *state = space.machine().driver_data<decocass_state>();
11711171   UINT8 data;
11721172
11731173   if (1 == (offset & 1))
r17963r17964
11751175      if (0 == (offset & E5XX_MASK))
11761176      {
11771177         data = upi41_master_r(state->m_mcu, 1);
1178         LOG(4,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x <- 8041 STATUS\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
1178         LOG(4,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x <- 8041 STATUS\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
11791179      }
11801180      else
11811181      {
11821182         data = 0xff;   /* open data bus? */
1183         LOG(4,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x <- open bus\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
1183         LOG(4,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x <- open bus\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
11841184      }
11851185   }
11861186   else
r17963r17964
11881188      if (0 == (offset & E5XX_MASK))
11891189      {
11901190         data = upi41_master_r(state->m_mcu, 0);
1191         LOG(3,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, (data >= 32) ? data : '.'));
1191         LOG(3,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data, (data >= 32) ? data : '.'));
11921192      }
11931193      else
11941194      {
11951195         data = 0xff;   /* open data bus? */
1196         LOG(4,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x <- open bus\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
1196         LOG(4,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x <- open bus\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
11971197      }
11981198   }
11991199
r17963r17964
12081208
12091209READ8_HANDLER( decocass_e5xx_r )
12101210{
1211   decocass_state *state = space->machine().driver_data<decocass_state>();
1211   decocass_state *state = space.machine().driver_data<decocass_state>();
12121212   UINT8 data;
12131213
12141214   /* E5x2-E5x3 and mirrors */
r17963r17964
12271227         (!tape_is_present(state->m_cassette) << 7);   /* D7 = cassette present */
12281228
12291229      LOG(4,("%10s 6502-PC: %04x decocass_e5xx_r(%02x): $%02x <- STATUS (%s%s%s%s%s%s%s%s)\n",
1230         space->machine().time().as_string(6),
1231         space->device().safe_pcbase(),
1230         space.machine().time().as_string(6),
1231         space.device().safe_pcbase(),
12321232         offset, data,
12331233         data & 0x01 ? "" : "REQ/",
12341234         data & 0x02 ? "" : " FNO/",
r17963r17964
12511251
12521252WRITE8_HANDLER( decocass_e5xx_w )
12531253{
1254   decocass_state *state = space->machine().driver_data<decocass_state>();
1254   decocass_state *state = space.machine().driver_data<decocass_state>();
12551255   if (state->m_dongle_w)
12561256   {
12571257      (*state->m_dongle_w)(space, offset, data);
r17963r17964
12601260
12611261   if (0 == (offset & E5XX_MASK))
12621262   {
1263      LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
1263      LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
12641264      upi41_master_w(state->m_mcu, offset & 1, data);
12651265#ifdef MAME_DEBUG
1266      decocass_fno(space->machine(), offset, data);
1266      decocass_fno(space.machine(), offset, data);
12671267#endif
12681268   }
12691269   else
12701270   {
1271      LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> dongle\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
1271      LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> dongle\n", space.machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
12721272   }
12731273}
12741274
r17963r17964
12861286
12871287WRITE8_HANDLER( decocass_e900_w )
12881288{
1289   decocass_state *state = space->machine().driver_data<decocass_state>();
1289   decocass_state *state = space.machine().driver_data<decocass_state>();
12901290   state->m_de0091_enable = data & 1;
12911291   state->membank("bank1")->set_entry(data & 1);
12921292   /* Perhaps the second row of ROMs is enabled by another bit.
r17963r17964
12981298
12991299WRITE8_HANDLER( decocass_de0091_w )
13001300{
1301   decocass_state *state = space->machine().driver_data<decocass_state>();
1301   decocass_state *state = space.machine().driver_data<decocass_state>();
13021302   /* don't allow writes to the ROMs */
13031303   if (!state->m_de0091_enable)
13041304      decocass_charram_w(space, offset, data);
r17963r17964
17191719
17201720WRITE8_HANDLER( i8041_p1_w )
17211721{
1722   decocass_state *state = space->machine().driver_data<decocass_state>();
1722   decocass_state *state = space.machine().driver_data<decocass_state>();
17231723   if (data != state->m_i8041_p1_write_latch)
17241724   {
17251725      LOG(4,("%10s 8041-PC: %03x i8041_p1_w: $%02x (%s%s%s%s%s%s%s%s)\n",
1726         space->machine().time().as_string(6),
1727         space->device().safe_pcbase(),
1726         space.machine().time().as_string(6),
1727         space.device().safe_pcbase(),
17281728         data,
17291729         data & 0x01 ? "" : "DATA-WRT",
17301730         data & 0x02 ? "" : " DATA-CLK",
r17963r17964
17541754
17551755READ8_HANDLER( i8041_p1_r )
17561756{
1757   decocass_state *state = space->machine().driver_data<decocass_state>();
1757   decocass_state *state = space.machine().driver_data<decocass_state>();
17581758   UINT8 data = state->m_i8041_p1;
17591759
17601760   if (data != state->m_i8041_p1_read_latch)
17611761   {
17621762      LOG(4,("%10s 8041-PC: %03x i8041_p1_r: $%02x (%s%s%s%s%s%s%s%s)\n",
1763         space->machine().time().as_string(6),
1764         space->device().safe_pcbase(),
1763         space.machine().time().as_string(6),
1764         space.device().safe_pcbase(),
17651765         data,
17661766         data & 0x01 ? "" : "DATA-WRT",
17671767         data & 0x02 ? "" : " DATA-CLK",
r17963r17964
17781778
17791779WRITE8_HANDLER( i8041_p2_w )
17801780{
1781   decocass_state *state = space->machine().driver_data<decocass_state>();
1781   decocass_state *state = space.machine().driver_data<decocass_state>();
17821782   if (data != state->m_i8041_p2_write_latch)
17831783   {
17841784      LOG(4,("%10s 8041-PC: %03x i8041_p2_w: $%02x (%s%s%s%s%s%s%s%s)\n",
1785         space->machine().time().as_string(6),
1786         space->device().safe_pcbase(),
1785         space.machine().time().as_string(6),
1786         space.device().safe_pcbase(),
17871787         data,
17881788         data & 0x01 ? "" : "FNO/",
17891789         data & 0x02 ? "" : " EOT/",
r17963r17964
18001800
18011801READ8_HANDLER( i8041_p2_r )
18021802{
1803   decocass_state *state = space->machine().driver_data<decocass_state>();
1803   decocass_state *state = space.machine().driver_data<decocass_state>();
18041804   UINT8 data;
18051805
18061806   data = (state->m_i8041_p2 & ~0xe0) | tape_get_status_bits(state->m_cassette);
r17963r17964
18081808   if (data != state->m_i8041_p2_read_latch)
18091809   {
18101810      LOG(4,("%10s 8041-PC: %03x i8041_p2_r: $%02x (%s%s%s%s%s%s%s%s)\n",
1811         space->machine().time().as_string(6),
1812         space->device().safe_pcbase(),
1811         space.machine().time().as_string(6),
1812         space.device().safe_pcbase(),
18131813         data,
18141814         data & 0x01 ? "" : "FNO/",
18151815         data & 0x02 ? "" : " EOT/",
trunk/src/mame/machine/konppc.c
r17963r17964
129129{
130130   if (cgboard_id < MAX_CG_BOARDS)
131131   {
132//      mame_printf_debug("dsp_cmd_r: (board %d) %08X, %08X at %08X\n", cgboard_id, offset, mem_mask, space->device().safe_pc());
132//      mame_printf_debug("dsp_cmd_r: (board %d) %08X, %08X at %08X\n", cgboard_id, offset, mem_mask, space.device().safe_pc());
133133      return dsp_comm_sharc[cgboard_id][offset] | (dsp_state[cgboard_id] << 16);
134134   }
135135   else
r17963r17964
142142{
143143   const char *dsptag = (cgboard_id == 0) ? "dsp" : "dsp2";
144144   const char *pcitag = (cgboard_id == 0) ? "k033906_1" : "k033906_2";
145   device_t *dsp = space->machine().device(dsptag);
146   device_t *k033906 = space->machine().device(pcitag);
147//  mame_printf_debug("dsp_cmd_w: (board %d) %08X, %08X, %08X at %08X\n", cgboard_id, data, offset, mem_mask, space->device().safe_pc());
145   device_t *dsp = space.machine().device(dsptag);
146   device_t *k033906 = space.machine().device(pcitag);
147//  mame_printf_debug("dsp_cmd_w: (board %d) %08X, %08X, %08X at %08X\n", cgboard_id, data, offset, mem_mask, space.device().safe_pc());
148148
149149   if (cgboard_id < MAX_CG_BOARDS)
150150   {
r17963r17964
198198{
199199   if (cgboard_id < MAX_CG_BOARDS)
200200   {
201      space->machine().scheduler().trigger(10000);      // Remove the timeout (a part of the GTI Club FIFO test workaround)
201      space.machine().scheduler().trigger(10000);      // Remove the timeout (a part of the GTI Club FIFO test workaround)
202202      COMBINE_DATA(dsp_shared_ram[cgboard_id] + (offset + (dsp_shared_ram_bank[cgboard_id] * DSP_BANK_SIZE_WORD)));
203203   }
204204}
r17963r17964
212212   return dsp_comm_ppc[board][offset];
213213}
214214
215static void dsp_comm_sharc_w(address_space *space, int board, int offset, UINT32 data)
215static void dsp_comm_sharc_w(address_space &space, int board, int offset, UINT32 data)
216216{
217217   if (offset >= 2)
218218   {
r17963r17964
225225      case CGBOARD_TYPE_GTICLUB:
226226      {
227227         //machine.device("dsp")->execute().set_input_line(SHARC_INPUT_FLAG0, ASSERT_LINE);
228         sharc_set_flag_input(space->machine().device("dsp"), 0, ASSERT_LINE);
228         sharc_set_flag_input(space.machine().device("dsp"), 0, ASSERT_LINE);
229229
230230         if (offset == 1)
231231         {
232232            if (data & 0x03)
233               space->machine().device("dsp")->execute().set_input_line(INPUT_LINE_IRQ2, ASSERT_LINE);
233               space.machine().device("dsp")->execute().set_input_line(INPUT_LINE_IRQ2, ASSERT_LINE);
234234         }
235235         break;
236236      }
r17963r17964
239239      case CGBOARD_TYPE_HANGPLT:
240240      {
241241         const char *dsptag = (board == 0) ? "dsp" : "dsp2";
242         device_t *device = space->machine().device(dsptag);
242         device_t *device = space.machine().device(dsptag);
243243
244244         if (offset == 1)
245245         {
r17963r17964
254254            {
255255               int offset = (data & 0x08) ? 1 : 0;
256256
257               space->machine().root_device().membank(texture_bank[board])->set_entry(offset);
257               space.machine().root_device().membank(texture_bank[board])->set_entry(offset);
258258            }
259259         }
260260         break;
r17963r17964
268268            {
269269               int offset = (data & 0x08) ? 1 : 0;
270270
271               space->machine().root_device().membank(texture_bank[board])->set_entry(offset);
271               space.machine().root_device().membank(texture_bank[board])->set_entry(offset);
272272            }
273273         }
274274         break;
275275      }
276276   }
277277
278//  printf("%s:cgboard_dsp_comm_w_sharc: %08X, %08X, %08X\n", space->machine().describe_context(), data, offset, mem_mask);
278//  printf("%s:cgboard_dsp_comm_w_sharc: %08X, %08X, %08X\n", space.machine().describe_context(), data, offset, mem_mask);
279279
280280   dsp_comm_sharc[board][offset] = data;
281281}
r17963r17964
351351
352352/*****************************************************************************/
353353
354static UINT32 nwk_fifo_r(address_space *space, int board)
354static UINT32 nwk_fifo_r(address_space &space, int board)
355355{
356356   const char *dsptag = (board == 0) ? "dsp" : "dsp2";
357   device_t *device = space->machine().device(dsptag);
357   device_t *device = space.machine().device(dsptag);
358358   UINT32 data;
359359
360360   if (nwk_fifo_read_ptr[board] < nwk_fifo_half_full_r)
r17963r17964
409409
410410READ32_HANDLER( K033906_0_r )
411411{
412   device_t *k033906_1 = space->machine().device("k033906_1");
412   device_t *k033906_1 = space.machine().device("k033906_1");
413413   if (nwk_device_sel[0] & 0x01)
414414      return nwk_fifo_r(space, 0);
415415   else
416      return k033906_r(k033906_1, *space, offset, mem_mask);
416      return k033906_r(k033906_1, space, offset, mem_mask);
417417}
418418
419419WRITE32_HANDLER( K033906_0_w )
420420{
421   device_t *k033906_1 = space->machine().device("k033906_1");
422   k033906_w(k033906_1, *space, offset, data, mem_mask);
421   device_t *k033906_1 = space.machine().device("k033906_1");
422   k033906_w(k033906_1, space, offset, data, mem_mask);
423423}
424424
425425READ32_HANDLER( K033906_1_r )
426426{
427   device_t *k033906_2 = space->machine().device("k033906_2");
427   device_t *k033906_2 = space.machine().device("k033906_2");
428428   if (nwk_device_sel[1] & 0x01)
429429      return nwk_fifo_r(space, 1);
430430   else
431      return k033906_r(k033906_2, *space, offset, mem_mask);
431      return k033906_r(k033906_2, space, offset, mem_mask);
432432}
433433
434434WRITE32_HANDLER(K033906_1_w)
435435{
436   device_t *k033906_2 = space->machine().device("k033906_2");
437   k033906_w(k033906_2, *space, offset, data, mem_mask);
436   device_t *k033906_2 = space.machine().device("k033906_2");
437   k033906_w(k033906_2, space, offset, data, mem_mask);
438438}
439439
440440/*****************************************************************************/
trunk/src/mame/machine/kabuki.c
r17963r17964
161161
162162static void mitchell_decode(running_machine &machine, int swap_key1,int swap_key2,int addr_key,int xor_key)
163163{
164   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
164   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
165165   UINT8 *rom = machine.root_device().memregion("maincpu")->base();
166166   UINT8 *decrypt = auto_alloc_array(machine, UINT8, machine.root_device().memregion("maincpu")->bytes());
167167   int numbanks = (machine.root_device().memregion("maincpu")->bytes() - 0x10000) / 0x4000;
168168   int i;
169169
170   space->set_decrypted_region(0x0000, 0x7fff, decrypt);
170   space.set_decrypted_region(0x0000, 0x7fff, decrypt);
171171   kabuki_decode(rom,decrypt,rom,0x0000,0x8000, swap_key1,swap_key2,addr_key,xor_key);
172172
173173   rom += 0x10000;
r17963r17964
202202
203203static void cps1_decode(running_machine &machine,int swap_key1,int swap_key2,int addr_key,int xor_key)
204204{
205   address_space *space = machine.device("audiocpu")->memory().space(AS_PROGRAM);
205   address_space &space = *machine.device("audiocpu")->memory().space(AS_PROGRAM);
206206   UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x8000);
207207   UINT8 *rom = machine.root_device().memregion("audiocpu")->base();
208208
209   space->set_decrypted_region(0x0000, 0x7fff, decrypt);
209   space.set_decrypted_region(0x0000, 0x7fff, decrypt);
210210   kabuki_decode(rom,decrypt,rom,0x0000,0x8000, swap_key1,swap_key2,addr_key,xor_key);
211211}
212212
trunk/src/mame/machine/midwayic.c
r17963r17964
205205}
206206
207207
208UINT8 midway_serial_pic_r(address_space *space)
208UINT8 midway_serial_pic_r(address_space &space)
209209{
210   logerror("%s:security R = %04X\n", space->machine().describe_context(), serial.buffer);
210   logerror("%s:security R = %04X\n", space.machine().describe_context(), serial.buffer);
211211   serial.status = 1;
212212   return serial.buffer;
213213}
214214
215215
216void midway_serial_pic_w(address_space *space, UINT8 data)
216void midway_serial_pic_w(address_space &space, UINT8 data)
217217{
218   logerror("%s:security W = %04X\n", space->machine().describe_context(), data);
218   logerror("%s:security W = %04X\n", space.machine().describe_context(), data);
219219
220220   /* status seems to reflect the clock bit */
221221   serial.status = (data >> 4) & 1;
r17963r17964
292292}
293293
294294
295UINT8 midway_serial_pic2_status_r(address_space *space)
295UINT8 midway_serial_pic2_status_r(address_space &space)
296296{
297297   UINT8 result = 0;
298298
299299   /* if we're still holding the data ready bit high, do it */
300300   if (pic.latch & 0xf00)
301301   {
302      if (space->machine().time() > pic.latch_expire_time)
302      if (space.machine().time() > pic.latch_expire_time)
303303         pic.latch &= 0xff;
304304      else
305305         pic.latch -= 0x100;
306306      result = 1;
307307   }
308308
309   logerror("%s:PIC status %d\n", space->machine().describe_context(), result);
309   logerror("%s:PIC status %d\n", space.machine().describe_context(), result);
310310   return result;
311311}
312312
313313
314UINT8 midway_serial_pic2_r(address_space *space)
314UINT8 midway_serial_pic2_r(address_space &space)
315315{
316316   UINT8 result = 0;
317317
318318   /* PIC data register */
319   logerror("%s:PIC data read (index=%d total=%d latch=%03X) =", space->machine().describe_context(), pic.index, pic.total, pic.latch);
319   logerror("%s:PIC data read (index=%d total=%d latch=%03X) =", space.machine().describe_context(), pic.index, pic.total, pic.latch);
320320
321321   /* return the current result */
322322   if (pic.latch & 0xf00)
r17963r17964
331331}
332332
333333
334void midway_serial_pic2_w(address_space *space, UINT8 data)
334void midway_serial_pic2_w(address_space &space, UINT8 data)
335335{
336   running_machine &machine = space->machine();
336   running_machine &machine = space.machine();
337337   static FILE *nvramlog;
338338   if (LOG_NVRAM && !nvramlog)
339339      nvramlog = fopen("nvram.log", "w");
r17963r17964
862862   switch (offset)
863863   {
864864      case IOASIC_PORT0:
865         result = space->machine().root_device().ioport("DIPS")->read();
865         result = space.machine().root_device().ioport("DIPS")->read();
866866         /* bit 0 seems to be a ready flag before shuffling happens */
867867         if (!ioasic.shuffle_active)
868868         {
r17963r17964
874874         break;
875875
876876      case IOASIC_PORT1:
877         result = space->machine().root_device().ioport("SYSTEM")->read();
877         result = space.machine().root_device().ioport("SYSTEM")->read();
878878         break;
879879
880880      case IOASIC_PORT2:
881         result = space->machine().root_device().ioport("IN1")->read();
881         result = space.machine().root_device().ioport("IN1")->read();
882882         break;
883883
884884      case IOASIC_PORT3:
885         result = space->machine().root_device().ioport("IN2")->read();
885         result = space.machine().root_device().ioport("IN2")->read();
886886         break;
887887
888888      case IOASIC_UARTIN:
r17963r17964
894894         result = 0;
895895         if (ioasic.has_dcs)
896896         {
897            result |= ((dcs_control_r(space->machine()) >> 4) ^ 0x40) & 0x00c0;
898            result |= ioasic_fifo_status_r(&space->device()) & 0x0038;
899            result |= dcs_data2_r(space->machine()) & 0xff00;
897            result |= ((dcs_control_r(space.machine()) >> 4) ^ 0x40) & 0x00c0;
898            result |= ioasic_fifo_status_r(&space.device()) & 0x0038;
899            result |= dcs_data2_r(space.machine()) & 0xff00;
900900         }
901901         else if (ioasic.has_cage)
902902         {
903            result |= (cage_control_r(space->machine()) << 6) ^ 0x80;
903            result |= (cage_control_r(space.machine()) << 6) ^ 0x80;
904904         }
905905         else
906906            result |= 0x48;
r17963r17964
910910         result = 0;
911911         if (ioasic.has_dcs)
912912         {
913            result = dcs_data_r(space->machine());
913            result = dcs_data_r(space.machine());
914914            if (ioasic.auto_ack)
915               dcs_ack_w(space->machine());
915               dcs_ack_w(space.machine());
916916         }
917917         else if (ioasic.has_cage)
918918            result = cage_main_r(space);
r17963r17964
932932   }
933933
934934   if (LOG_IOASIC && offset != IOASIC_SOUNDSTAT && offset != IOASIC_SOUNDIN)
935      logerror("%06X:ioasic_r(%d) = %08X\n", space->device().safe_pc(), offset, result);
935      logerror("%06X:ioasic_r(%d) = %08X\n", space.device().safe_pc(), offset, result);
936936
937937   return result;
938938}
r17963r17964
957957   newreg = ioasic.reg[offset];
958958
959959   if (LOG_IOASIC && offset != IOASIC_SOUNDOUT)
960      logerror("%06X:ioasic_w(%d) = %08X\n", space->device().safe_pc(), offset, data);
960      logerror("%06X:ioasic_w(%d) = %08X\n", space.device().safe_pc(), offset, data);
961961
962962   switch (offset)
963963   {
r17963r17964
984984         {
985985            /* we're in loopback mode -- copy to the input */
986986            ioasic.reg[IOASIC_UARTIN] = (newreg & 0x00ff) | 0x1000;
987            update_ioasic_irq(space->machine());
987            update_ioasic_irq(space.machine());
988988         }
989989         else if (PRINTF_DEBUG)
990990            mame_printf_debug("%c", data & 0xff);
r17963r17964
994994         /* sound reset? */
995995         if (ioasic.has_dcs)
996996         {
997            dcs_reset_w(space->machine(), ~newreg & 1);
997            dcs_reset_w(space.machine(), ~newreg & 1);
998998         }
999999         else if (ioasic.has_cage)
10001000         {
10011001            if ((oldreg ^ newreg) & 1)
10021002            {
1003               cage_control_w(space->machine(), 0);
1003               cage_control_w(space.machine(), 0);
10041004               if (!(~newreg & 1))
1005                  cage_control_w(space->machine(), 3);
1005                  cage_control_w(space.machine(), 3);
10061006            }
10071007         }
10081008
10091009         /* FIFO reset? */
1010         midway_ioasic_fifo_reset_w(space->machine(), ~newreg & 4);
1010         midway_ioasic_fifo_reset_w(space.machine(), ~newreg & 4);
10111011         break;
10121012
10131013      case IOASIC_SOUNDOUT:
10141014         if (ioasic.has_dcs)
1015            dcs_data_w(space->machine(), newreg);
1015            dcs_data_w(space.machine(), newreg);
10161016         else if (ioasic.has_cage)
10171017            cage_main_w(space, newreg);
10181018         break;
10191019
10201020      case IOASIC_SOUNDIN:
1021         dcs_ack_w(space->machine());
1021         dcs_ack_w(space.machine());
10221022         /* acknowledge data read */
10231023         break;
10241024
r17963r17964
10401040         /* bit 14 = LED? */
10411041         if ((oldreg ^ newreg) & 0x3ff6)
10421042            logerror("IOASIC int control = %04X\n", data);
1043         update_ioasic_irq(space->machine());
1043         update_ioasic_irq(space.machine());
10441044         break;
10451045
10461046      default:
trunk/src/mame/machine/bonzeadv.c
r17963r17964
376376
377377WRITE16_HANDLER( bonzeadv_cchip_bank_w )
378378{
379   asuka_state *state = space->machine().driver_data<asuka_state>();
379   asuka_state *state = space.machine().driver_data<asuka_state>();
380380   state->m_current_bank = data & 7;
381381}
382382
383383WRITE16_HANDLER( bonzeadv_cchip_ram_w )
384384{
385   asuka_state *state = space->machine().driver_data<asuka_state>();
385   asuka_state *state = space.machine().driver_data<asuka_state>();
386386
387//  if (space->device().safe_pc()!=0xa028)
388//  logerror("%08x:  write %04x %04x cchip\n", space->device().safe_pc(), offset, data);
387//  if (space.device().safe_pc()!=0xa028)
388//  logerror("%08x:  write %04x %04x cchip\n", space.device().safe_pc(), offset, data);
389389
390390   if (state->m_current_bank == 0)
391391   {
r17963r17964
393393      {
394394         state->m_cc_port = data;
395395
396         coin_lockout_w(space->machine(), 1, data & 0x80);
397         coin_lockout_w(space->machine(), 0, data & 0x40);
398         coin_counter_w(space->machine(), 1, data & 0x20);
399         coin_counter_w(space->machine(), 0, data & 0x10);
396         coin_lockout_w(space.machine(), 1, data & 0x80);
397         coin_lockout_w(space.machine(), 0, data & 0x40);
398         coin_counter_w(space.machine(), 1, data & 0x20);
399         coin_counter_w(space.machine(), 0, data & 0x10);
400400      }
401401
402402      if (offset == 0x0e && data != 0x00)
403403      {
404         WriteRestartPos(space->machine(), state->m_current_round);
404         WriteRestartPos(space.machine(), state->m_current_round);
405405      }
406406
407407      if (offset == 0x0f && data != 0x00)
408408      {
409         WriteLevelData(space->machine());
409         WriteLevelData(space.machine());
410410      }
411411
412412      if (offset == 0x10)
r17963r17964
438438
439439READ16_HANDLER( bonzeadv_cchip_ram_r )
440440{
441   asuka_state *state = space->machine().driver_data<asuka_state>();
441   asuka_state *state = space.machine().driver_data<asuka_state>();
442442
443//  logerror("%08x:  read %04x cchip\n", space->device().safe_pc(), offset);
443//  logerror("%08x:  read %04x cchip\n", space.device().safe_pc(), offset);
444444
445445   if (state->m_current_bank == 0)
446446   {
trunk/src/mame/machine/midwayic.h
r17963r17964
99void midway_serial_pic_init(running_machine &machine, int upper);
1010void midway_serial_pic_reset_w(int state);
1111UINT8 midway_serial_pic_status_r(void);
12UINT8 midway_serial_pic_r(address_space *space);
13void midway_serial_pic_w(address_space *space, UINT8 data);
12UINT8 midway_serial_pic_r(address_space &space);
13void midway_serial_pic_w(address_space &space, UINT8 data);
1414
1515
1616/* 2nd generation Midway serial/NVRAM/RTC PIC */
1717void midway_serial_pic2_init(running_machine &machine, int upper, int yearoffs);
1818void midway_serial_pic2_set_default_nvram(const UINT8 *nvram);
19UINT8 midway_serial_pic2_status_r(address_space *space);
20UINT8 midway_serial_pic2_r(address_space *space);
21void midway_serial_pic2_w(address_space *space, UINT8 data);
19UINT8 midway_serial_pic2_status_r(address_space &space);
20UINT8 midway_serial_pic2_r(address_space &space);
21void midway_serial_pic2_w(address_space &space, UINT8 data);
2222NVRAM_HANDLER( midway_serial_pic2 );
2323
2424
trunk/src/mame/machine/dc.c
r17963r17964
128128   dc_update_interrupt_status(machine);
129129}
130130
131static void wave_dma_execute(address_space *space)
131static void wave_dma_execute(address_space &space)
132132{
133   dc_state *state = space->machine().driver_data<dc_state>();
133   dc_state *state = space.machine().driver_data<dc_state>();
134134
135135   UINT32 src,dst,size;
136136   dst = state->m_wave_dma.aica_addr;
r17963r17964
144144   {
145145      for(;size<state->m_wave_dma.size;size+=4)
146146      {
147         space->write_dword(dst,space->read_dword(src));
147         space.write_dword(dst,space.read_dword(src));
148148         src+=4;
149149         dst+=4;
150150      }
r17963r17964
153153   {
154154      for(;size<state->m_wave_dma.size;size+=4)
155155      {
156         space->write_dword(src,space->read_dword(dst));
156         space.write_dword(src,space.read_dword(dst));
157157         src+=4;
158158         dst+=4;
159159      }
r17963r17964
166166   state->m_wave_dma.flag = (state->m_wave_dma.indirect & 1) ? 1 : 0;
167167   /* Note: if you trigger an instant DMA IRQ trigger, sfz3upper doesn't play any bgm. */
168168   /* TODO: timing of this */
169   space->machine().scheduler().timer_set(attotime::from_usec(300), FUNC(aica_dma_irq));
169   space.machine().scheduler().timer_set(attotime::from_usec(300), FUNC(aica_dma_irq));
170170}
171171
172static void pvr_dma_execute(address_space *space)
172static void pvr_dma_execute(address_space &space)
173173{
174   dc_state *state = space->machine().driver_data<dc_state>();
174   dc_state *state = space.machine().driver_data<dc_state>();
175175
176176   UINT32 src,dst,size;
177177   dst = state->m_pvr_dma.pvr_addr;
r17963r17964
190190   {
191191      for(;size<state->m_pvr_dma.size;size+=4)
192192      {
193         space->write_dword(dst,space->read_dword(src));
193         space.write_dword(dst,space.read_dword(src));
194194         src+=4;
195195         dst+=4;
196196      }
r17963r17964
199199   {
200200      for(;size<state->m_pvr_dma.size;size+=4)
201201      {
202         space->write_dword(src,space->read_dword(dst));
202         space.write_dword(src,space.read_dword(dst));
203203         src+=4;
204204         dst+=4;
205205      }
206206   }
207207   /* Note: do not update the params, since this DMA type doesn't support it. */
208208   /* TODO: timing of this */
209   space->machine().scheduler().timer_set(attotime::from_usec(250), FUNC(pvr_dma_irq));
209   space.machine().scheduler().timer_set(attotime::from_usec(250), FUNC(pvr_dma_irq));
210210}
211211
212212// register decode helpers
r17963r17964
321321   {
322322      if((state->dc_sysctrl_regs[SB_G2DTNRM] & state->dc_sysctrl_regs[SB_ISTNRM]) || (state->dc_sysctrl_regs[SB_G2DTEXT] & state->dc_sysctrl_regs[SB_ISTEXT]))
323323      {
324         address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
324         address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
325325
326326         printf("Wave DMA HW trigger\n");
327327         wave_dma_execute(space);
r17963r17964
333333   {
334334      if((state->dc_sysctrl_regs[SB_PDTNRM] & state->dc_sysctrl_regs[SB_ISTNRM]) || (state->dc_sysctrl_regs[SB_PDTEXT] & state->dc_sysctrl_regs[SB_ISTEXT]))
335335      {
336         address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
336         address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
337337
338338         printf("PVR-DMA HW trigger\n");
339339         pvr_dma_execute(space);
r17963r17964
343343
344344READ64_HANDLER( dc_sysctrl_r )
345345{
346   dc_state *state = space->machine().driver_data<dc_state>();
346   dc_state *state = space.machine().driver_data<dc_state>();
347347
348348   int reg;
349349   UINT64 shift;
350350
351   reg = decode_reg32_64(space->machine(), offset, mem_mask, &shift);
351   reg = decode_reg32_64(space.machine(), offset, mem_mask, &shift);
352352
353353   #if DEBUG_SYSCTRL
354354   if ((reg != 0x40) && (reg != 0x41) && (reg != 0x42) && (reg != 0x23) && (reg > 2))   // filter out IRQ status reads
355355   {
356      mame_printf_verbose("SYSCTRL: [%08x] read %x @ %x (reg %x: %s), mask %" I64FMT "x (PC=%x)\n", 0x5f6800+reg*4, state->dc_sysctrl_regs[reg], offset, reg, sysctrl_names[reg], mem_mask, space->device().safe_pc());
356      mame_printf_verbose("SYSCTRL: [%08x] read %x @ %x (reg %x: %s), mask %" I64FMT "x (PC=%x)\n", 0x5f6800+reg*4, state->dc_sysctrl_regs[reg], offset, reg, sysctrl_names[reg], mem_mask, space.device().safe_pc());
357357   }
358358   #endif
359359
r17963r17964
362362
363363WRITE64_HANDLER( dc_sysctrl_w )
364364{
365   dc_state *state = space->machine().driver_data<dc_state>();
365   dc_state *state = space.machine().driver_data<dc_state>();
366366
367367   int reg;
368368   UINT64 shift;
r17963r17964
370370   UINT32 address;
371371   struct sh4_ddt_dma ddtdata;
372372
373   reg = decode_reg32_64(space->machine(), offset, mem_mask, &shift);
373   reg = decode_reg32_64(space.machine(), offset, mem_mask, &shift);
374374   dat = (UINT32)(data >> shift);
375375   old = state->dc_sysctrl_regs[reg];
376376   state->dc_sysctrl_regs[reg] = dat; // 5f6800+off*4=dat
r17963r17964
393393            ddtdata.direction=0;
394394            ddtdata.channel=2;
395395            ddtdata.mode=25; //011001
396            sh4_dma_ddt(space->machine().device("maincpu"),&ddtdata);
396            sh4_dma_ddt(space.machine().device("maincpu"),&ddtdata);
397397            #if DEBUG_SYSCTRL
398398            if ((address >= 0x11000000) && (address <= 0x11FFFFFF))
399399               if (state->dc_sysctrl_regs[SB_LMMODE0])
r17963r17964
419419               state->dc_sysctrl_regs[SB_C2DSTAT]=address+ddtdata.length;
420420
421421            /* 200 usecs breaks sfz3upper */
422            space->machine().scheduler().timer_set(attotime::from_usec(50), FUNC(ch2_dma_irq));
422            space.machine().scheduler().timer_set(attotime::from_usec(50), FUNC(ch2_dma_irq));
423423            /* simulate YUV FIFO processing here */
424424            if((address & 0x1800000) == 0x0800000)
425               space->machine().scheduler().timer_set(attotime::from_usec(500), FUNC(yuv_fifo_irq));
425               space.machine().scheduler().timer_set(attotime::from_usec(500), FUNC(yuv_fifo_irq));
426426         }
427427         break;
428428
429429      case SB_ISTNRM:
430430         state->dc_sysctrl_regs[SB_ISTNRM] = old & ~(dat | 0xC0000000); // bits 31,30 ro
431         dc_update_interrupt_status(space->machine());
431         dc_update_interrupt_status(space.machine());
432432         break;
433433
434434      case SB_ISTEXT:
435435         state->dc_sysctrl_regs[SB_ISTEXT] = old;
436         dc_update_interrupt_status(space->machine());
436         dc_update_interrupt_status(space.machine());
437437         break;
438438
439439      case SB_ISTERR:
440440         state->dc_sysctrl_regs[SB_ISTERR] = old & ~dat;
441         dc_update_interrupt_status(space->machine());
441         dc_update_interrupt_status(space.machine());
442442         break;
443443      case SB_SDST:
444444         if(dat & 1)
r17963r17964
448448
449449            state->dc_sysctrl_regs[SB_SDST] = 0;
450450            state->dc_sysctrl_regs[SB_ISTNRM] |= IST_DMA_SORT;
451            dc_update_interrupt_status(space->machine());
451            dc_update_interrupt_status(space.machine());
452452         }
453453         break;
454454   }
r17963r17964
463463
464464READ64_HANDLER( dc_gdrom_r )
465465{
466//  dc_state *state = space->machine().driver_data<dc_state>();
466//  dc_state *state = space.machine().driver_data<dc_state>();
467467
468468   UINT32 off;
469469
r17963r17964
486486
487487WRITE64_HANDLER( dc_gdrom_w )
488488{
489//  dc_state *state = space->machine().driver_data<dc_state>();
489//  dc_state *state = space.machine().driver_data<dc_state>();
490490   UINT32 dat,off;
491491
492492   if ((int)~mem_mask & 1)
r17963r17964
505505
506506READ64_HANDLER( dc_g2_ctrl_r )
507507{
508   dc_state *state = space->machine().driver_data<dc_state>();
508   dc_state *state = space.machine().driver_data<dc_state>();
509509   int reg;
510510   UINT64 shift;
511511
512   reg = decode_reg32_64(space->machine(), offset, mem_mask, &shift);
512   reg = decode_reg32_64(space.machine(), offset, mem_mask, &shift);
513513   mame_printf_verbose("G2CTRL:  Unmapped read %08x\n", 0x5f7800+reg*4);
514514   return (UINT64)state->g2bus_regs[reg] << shift;
515515}
516516
517517WRITE64_HANDLER( dc_g2_ctrl_w )
518518{
519   dc_state *state = space->machine().driver_data<dc_state>();
519   dc_state *state = space.machine().driver_data<dc_state>();
520520   int reg;
521521   UINT64 shift;
522522   UINT32 dat;
523523   UINT8 old;
524524
525   reg = decode_reg32_64(space->machine(), offset, mem_mask, &shift);
525   reg = decode_reg32_64(space.machine(), offset, mem_mask, &shift);
526526   dat = (UINT32)(data >> shift);
527527
528528   state->g2bus_regs[reg] = dat; // 5f7800+reg*4=dat
r17963r17964
608608
609609READ64_HANDLER( pvr_ctrl_r )
610610{
611   dc_state *state = space->machine().driver_data<dc_state>();
611   dc_state *state = space.machine().driver_data<dc_state>();
612612   int reg;
613613   UINT64 shift;
614614
615615   reg = decode_reg_64(offset, mem_mask, &shift);
616616
617617   #if DEBUG_PVRCTRL
618   mame_printf_verbose("PVRCTRL: [%08x] read %x @ %x (reg %x), mask %" I64FMT "x (PC=%x)\n", 0x5f7c00+reg*4, state->pvrctrl_regs[reg], offset, reg, mem_mask, space->device().safe_pc());
618   mame_printf_verbose("PVRCTRL: [%08x] read %x @ %x (reg %x), mask %" I64FMT "x (PC=%x)\n", 0x5f7c00+reg*4, state->pvrctrl_regs[reg], offset, reg, mem_mask, space.device().safe_pc());
619619   #endif
620620
621621   return (UINT64)state->pvrctrl_regs[reg] << shift;
r17963r17964
623623
624624WRITE64_HANDLER( pvr_ctrl_w )
625625{
626   dc_state *state = space->machine().driver_data<dc_state>();
626   dc_state *state = space.machine().driver_data<dc_state>();
627627   int reg;
628628   UINT64 shift;
629629   UINT32 dat;
r17963r17964
664664
665665READ64_HANDLER( dc_modem_r )
666666{
667//  dc_state *state = space->machine().driver_data<dc_state>();
667//  dc_state *state = space.machine().driver_data<dc_state>();
668668   int reg;
669669   UINT64 shift;
670670
671   reg = decode_reg32_64(space->machine(), offset, mem_mask, &shift);
671   reg = decode_reg32_64(space.machine(), offset, mem_mask, &shift);
672672
673673   // from ElSemi: this makes Atomiswave do it's "verbose boot" with a Sammy logo and diagnostics instead of just running the cart.
674674   // our PVR emulation is apparently not good enough for that to work yet though.
r17963r17964
683683
684684WRITE64_HANDLER( dc_modem_w )
685685{
686//  dc_state *state = space->machine().driver_data<dc_state>();
686//  dc_state *state = space.machine().driver_data<dc_state>();
687687   int reg;
688688   UINT64 shift;
689689   UINT32 dat;
690690
691   reg = decode_reg32_64(space->machine(), offset, mem_mask, &shift);
691   reg = decode_reg32_64(space.machine(), offset, mem_mask, &shift);
692692   dat = (UINT32)(data >> shift);
693693   mame_printf_verbose("MODEM: [%08x=%x] write %" I64FMT "x to %x, mask %" I64FMT "x\n", 0x600000+reg*4, dat, data, offset, mem_mask);
694694}
695695
696696READ64_HANDLER( dc_rtc_r )
697697{
698   dc_state *state = space->machine().driver_data<dc_state>();
698   dc_state *state = space.machine().driver_data<dc_state>();
699699   int reg;
700700   UINT64 shift;
701701
702   reg = decode_reg3216_64(space->machine(), offset, mem_mask, &shift);
702   reg = decode_reg3216_64(space.machine(), offset, mem_mask, &shift);
703703   mame_printf_verbose("RTC:  Unmapped read %08x\n", 0x710000+reg*4);
704704
705705   return (UINT64)state->dc_rtcregister[reg] << shift;
r17963r17964
707707
708708WRITE64_HANDLER( dc_rtc_w )
709709{
710   dc_state *state = space->machine().driver_data<dc_state>();
710   dc_state *state = space.machine().driver_data<dc_state>();
711711   int reg;
712712   UINT64 shift;
713713   UINT32 old,dat;
714714
715   reg = decode_reg3216_64(space->machine(), offset, mem_mask, &shift);
715   reg = decode_reg3216_64(space.machine(), offset, mem_mask, &shift);
716716   dat = (UINT32)(data >> shift);
717717   old = state->dc_rtcregister[reg];
718718   state->dc_rtcregister[reg] = dat & 0xFFFF; // 5f6c00+off*4=dat
trunk/src/mame/machine/scramble.c
r17963r17964
8787
8888READ8_HANDLER( triplep_pip_r )
8989{
90   logerror("PC %04x: triplep read port 2\n",space->device().safe_pc());
91   if (space->device().safe_pc() == 0x015a) return 0xff;
92   else if (space->device().safe_pc() == 0x0886) return 0x05;
90   logerror("PC %04x: triplep read port 2\n",space.device().safe_pc());
91   if (space.device().safe_pc() == 0x015a) return 0xff;
92   else if (space.device().safe_pc() == 0x0886) return 0x05;
9393   else return 0;
9494}
9595
9696READ8_HANDLER( triplep_pap_r )
9797{
98   logerror("PC %04x: triplep read port 3\n",space->device().safe_pc());
99   if (space->device().safe_pc() == 0x015d) return 0x04;
98   logerror("PC %04x: triplep read port 3\n",space.device().safe_pc());
99   if (space.device().safe_pc() == 0x015d) return 0x04;
100100   else return 0;
101101}
102102
r17963r17964
115115
116116static READ8_HANDLER( cavelon_banksw_r )
117117{
118   scramble_state *state = space->machine().driver_data<scramble_state>();
119   cavelon_banksw(space->machine());
118   scramble_state *state = space.machine().driver_data<scramble_state>();
119   cavelon_banksw(space.machine());
120120
121121   if ((offset >= 0x0100) && (offset <= 0x0103))
122      return state->m_ppi8255_0->read(*space, offset - 0x0100);
122      return state->m_ppi8255_0->read(space, offset - 0x0100);
123123   else if ((offset >= 0x0200) && (offset <= 0x0203))
124      return state->m_ppi8255_1->read(*space, offset - 0x0200);
124      return state->m_ppi8255_1->read(space, offset - 0x0200);
125125
126126   return 0xff;
127127}
128128
129129static WRITE8_HANDLER( cavelon_banksw_w )
130130{
131   scramble_state *state = space->machine().driver_data<scramble_state>();
132   cavelon_banksw(space->machine());
131   scramble_state *state = space.machine().driver_data<scramble_state>();
132   cavelon_banksw(space.machine());
133133
134134   if ((offset >= 0x0100) && (offset <= 0x0103))
135      state->m_ppi8255_0->write(*space, offset - 0x0100, data);
135      state->m_ppi8255_0->write(space, offset - 0x0100, data);
136136   else if ((offset >= 0x0200) && (offset <= 0x0203))
137      state->m_ppi8255_1->write(*space, offset - 0x0200, data);
137      state->m_ppi8255_1->write(space, offset - 0x0200, data);
138138}
139139
140140
141141READ8_HANDLER( hunchbks_mirror_r )
142142{
143   return space->read_byte(0x1000+offset);
143   return space.read_byte(0x1000+offset);
144144}
145145
146146WRITE8_HANDLER( hunchbks_mirror_w )
147147{
148   space->write_byte(0x1000+offset,data);
148   space.write_byte(0x1000+offset,data);
149149}
150150
151151
trunk/src/mame/machine/fddebug.c
r17963r17964
312312static void execute_fdclist(running_machine &machine, int ref, int params, const char **param);
313313static void execute_fdcsearch(running_machine &machine, int ref, int params, const char **param);
314314
315static fd1094_possibility *try_all_possibilities(address_space *space, int basepc, int offset, int length, UINT8 *instrbuffer, UINT8 *keybuffer, fd1094_possibility *possdata);
315static fd1094_possibility *try_all_possibilities(address_space &space, int basepc, int offset, int length, UINT8 *instrbuffer, UINT8 *keybuffer, fd1094_possibility *possdata);
316316static void tag_possibility(running_machine &machine, fd1094_possibility *possdata, UINT8 status);
317317
318318static void perform_constrained_search(running_machine &machine);
r17963r17964
322322static UINT32 reconstruct_base_seed(int keybaseaddr, UINT32 startseed);
323323
324324static void build_optable(running_machine &machine);
325static int validate_ea(address_space *space, UINT32 pc, UINT8 modereg, const UINT8 *parambase, UINT32 flags);
326static int validate_opcode(address_space *space, UINT32 pc, const UINT8 *opdata, int maxwords);
325static int validate_ea(address_space &space, UINT32 pc, UINT8 modereg, const UINT8 *parambase, UINT32 flags);
326static int validate_opcode(address_space &space, UINT32 pc, const UINT8 *opdata, int maxwords);
327327
328328
329329
r17963r17964
464464    0=no, 1=yes, 2=unlikely
465465-----------------------------------------------*/
466466
467INLINE int pc_is_valid(address_space *space, UINT32 pc, UINT32 flags)
467INLINE int pc_is_valid(address_space &space, UINT32 pc, UINT32 flags)
468468{
469469   /* if we're odd or out of range, fail */
470470   if ((pc & 1) == 1)
471471      return 0;
472472   if (pc & 0xff000000)
473473      return 0;
474   if (space->direct().read_decrypted_ptr(pc) == NULL)
474   if (space.direct().read_decrypted_ptr(pc) == NULL)
475475      return 0;
476476   return 1;
477477}
r17963r17964
482482    valid? 0=no, 1=yes, 2=unlikely
483483-----------------------------------------------*/
484484
485INLINE int addr_is_valid(address_space *space, UINT32 addr, UINT32 flags)
485INLINE int addr_is_valid(address_space &space, UINT32 addr, UINT32 flags)
486486{
487487   /* if this a JMP, the address is a PC */
488488   if (flags & OF_JMP)
r17963r17964
495495      return 0;
496496
497497   /* if we're invalid, fail */
498   if (strcmp(const_cast<address_space *>(space)->get_handler_string(ROW_READ, addr), "segaic16_memory_mapper_lsb_r") == 0)
498   if (strcmp(const_cast<address_space &>(space)->get_handler_string(ROW_READ, addr), "segaic16_memory_mapper_lsb_r") == 0)
499499      return 2;
500500
501501   return 1;
r17963r17964
747747   }
748748
749749   /* try all possible decodings at the current pc */
750   posscount = try_all_possibilities(device.memory().space(AS_PROGRAM), curpc, 0, 0, instrbuffer, keybuffer, posslist) - posslist;
750   posscount = try_all_possibilities(*device.memory().space(AS_PROGRAM), curpc, 0, 0, instrbuffer, keybuffer, posslist) - posslist;
751751   if (keydirty)
752752      fd1094_regenerate_key(device.machine());
753753
r17963r17964
10751075
10761076static void execute_fdsearch(running_machine &machine, int ref, int params, const char **param)
10771077{
1078   address_space *space = debug_cpu_get_visible_cpu(machine)->memory().space(AS_PROGRAM);
1079   int pc = space->device().safe_pc();
1078   address_space &space = *debug_cpu_get_visible_cpu(machine)->memory().space(AS_PROGRAM);
1079   int pc = space.device().safe_pc();
10801080   int length, first = TRUE;
10811081   UINT8 instrdata[2];
10821082   UINT16 decoded;
r17963r17964
11141114         }
11151115
11161116         /* set this as our current PC and run the instruction hook */
1117         space->device().state().set_pc(pc);
1118         if (instruction_hook(space->device(), pc))
1117         space.device().state().set_pc(pc);
1118         if (instruction_hook(space.device(), pc))
11191119            break;
11201120      }
11211121      keystatus[pc/2] |= SEARCH_MASK;
r17963r17964
12011201
12021202static void execute_fddasm(running_machine &machine, int ref, int params, const char **param)
12031203{
1204   address_space *space = debug_cpu_get_visible_cpu(machine)->memory().space(AS_PROGRAM);
1204   address_space &space = *debug_cpu_get_visible_cpu(machine)->memory().space(AS_PROGRAM);
12051205   int origstate = fd1094_set_state(keyregion, -1);
12061206   const char *filename;
12071207   int skipped = FALSE;
r17963r17964
14061406    length
14071407-----------------------------------------------*/
14081408
1409static fd1094_possibility *try_all_possibilities(address_space *space, int basepc, int offset, int length, UINT8 *instrbuffer, UINT8 *keybuffer, fd1094_possibility *possdata)
1409static fd1094_possibility *try_all_possibilities(address_space &space, int basepc, int offset, int length, UINT8 *instrbuffer, UINT8 *keybuffer, fd1094_possibility *possdata)
14101410{
14111411   UINT8 keymask, keystat;
14121412   UINT16 possvalue[4];
r17963r17964
22492249    valid or not, and return the length
22502250-----------------------------------------------*/
22512251
2252static int validate_ea(address_space *space, UINT32 pc, UINT8 modereg, const UINT8 *parambase, UINT32 flags)
2252static int validate_ea(address_space &space, UINT32 pc, UINT8 modereg, const UINT8 *parambase, UINT32 flags)
22532253{
22542254   UINT32 addr;
22552255   int valid;
r17963r17964
23192319    the length specified
23202320-----------------------------------------------*/
23212321
2322static int validate_opcode(address_space *space, UINT32 pc, const UINT8 *opdata, int maxwords)
2322static int validate_opcode(address_space &space, UINT32 pc, const UINT8 *opdata, int maxwords)
23232323{
23242324   UINT32 immvalue = 0;
23252325   int iffy = FALSE;
trunk/src/mame/machine/midxunit.c
r17963r17964
334334
335335READ16_MEMBER(midxunit_state::midxunit_security_r)
336336{
337   return midway_serial_pic_r(&space);
337   return midway_serial_pic_r(space);
338338}
339339
340340WRITE16_MEMBER(midxunit_state::midxunit_security_w)
r17963r17964
347347WRITE16_MEMBER(midxunit_state::midxunit_security_clock_w)
348348{
349349   if (offset == 0 && ACCESSING_BITS_0_7)
350      midway_serial_pic_w(&space, ((~data & 2) << 3) | m_security_bits);
350      midway_serial_pic_w(space, ((~data & 2) << 3) | m_security_bits);
351351}
352352
353353
trunk/src/mame/machine/namco53.c
r17963r17964
8282
8383static READ8_HANDLER( namco_53xx_K_r )
8484{
85   namco_53xx_state *state = get_safe_token(space->device().owner());
85   namco_53xx_state *state = get_safe_token(space.device().owner());
8686   return state->m_k(0);
8787}
8888
8989static READ8_HANDLER( namco_53xx_Rx_r )
9090{
91   namco_53xx_state *state = get_safe_token(space->device().owner());
91   namco_53xx_state *state = get_safe_token(space.device().owner());
9292   return state->m_in[offset](0);
9393}
9494
9595static WRITE8_HANDLER( namco_53xx_O_w )
9696{
97   namco_53xx_state *state = get_safe_token(space->device().owner());
97   namco_53xx_state *state = get_safe_token(space.device().owner());
9898   UINT8 out = (data & 0x0f);
9999   if (data & 0x10)
100100      state->m_portO = (state->m_portO & 0x0f) | (out << 4);
r17963r17964
104104
105105static WRITE8_HANDLER( namco_53xx_P_w )
106106{
107   namco_53xx_state *state = get_safe_token(space->device().owner());
107   namco_53xx_state *state = get_safe_token(space.device().owner());
108108   state->m_p(0, data);
109109}
110110
trunk/src/mame/machine/stfight.c
r17963r17964
3838
3939DRIVER_INIT_MEMBER(stfight_state,empcity)
4040{
41   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
41   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
4242   UINT8 *rom = memregion("maincpu")->base();
4343   int A;
4444
4545   m_decrypt = auto_alloc_array(machine(), UINT8, 0x8000);
46   space->set_decrypted_region(0x0000, 0x7fff, m_decrypt);
46   space.set_decrypted_region(0x0000, 0x7fff, m_decrypt);
4747
4848   for (A = 0;A < 0x8000;A++)
4949   {
r17963r17964
8282
8383void stfight_state::machine_reset()
8484{
85   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
85   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
8686   m_adpcm_data_offs = m_adpcm_data_end = 0;
8787   m_toggle = 0;
8888   m_fm_data = 0;
r17963r17964
9393   m_coin_mech_query = 0;
9494
9595    // initialise rom bank
96    stfight_bank_w(*space, 0, 0 );
96    stfight_bank_w(space, 0, 0 );
9797}
9898
9999// It's entirely possible that this bank is never switched out
trunk/src/mame/machine/pgmprot5.c
r17963r17964
3232// if(dw2reg<0x20) //NOT SURE!!
3333   {
3434      //The value at 0x80EECE is computed in the routine at 0x107c18
35      pgm_state *state = space->machine().driver_data<pgm_state>();
35      pgm_state *state = space.machine().driver_data<pgm_state>();
3636      UINT16 d = state->m_mainram[0xEECE/2];
3737      UINT16 d2 = 0;
3838      d = (d >> 8) | (d << 8);
trunk/src/mame/machine/snesrtc.c
r17963r17964
109109   return (sum + 1) % 7; // 1900-01-01 was a Monday
110110}
111111
112static UINT8 srtc_read( address_space *space, UINT16 addr )
112static UINT8 srtc_read( address_space &space, UINT16 addr )
113113{
114114   addr &= 0xffff;
115115
r17963r17964
122122
123123      if (rtc_state.index < 0)
124124      {
125         srtc_update_time(space->machine());
125         srtc_update_time(space.machine());
126126         rtc_state.index++;
127127         return 0x0f;
128128      }
trunk/src/mame/machine/tait8741.c
r17963r17964
122122}
123123
124124/* 8741 update */
125static void taito8741_update(address_space *space, int num)
125static void taito8741_update(address_space &space, int num)
126126{
127127   I8741 *st,*sst;
128128   int next = num;
r17963r17964
177177               else
178178               { /* port select */
179179                  st->parallelselect = data & 0x07;
180                  taito8741_hostdata_w(st,st->portHandler ? st->portHandler(space,st->parallelselect) : st->portName ? space->machine().root_device().ioport(st->portName)->read() : 0);
180                  taito8741_hostdata_w(st,st->portHandler ? st->portHandler(space,st->parallelselect) : st->portName ? space.machine().root_device().ioport(st->portName)->read() : 0);
181181               }
182182            }
183183         }
r17963r17964
188188         case -1: /* no command data */
189189            break;
190190         case 0x00: /* read from parallel port */
191            taito8741_hostdata_w(st,st->portHandler ? st->portHandler(space,0) : st->portName ? space->machine().root_device().ioport(st->portName)->read() : 0 );
191            taito8741_hostdata_w(st,st->portHandler ? st->portHandler(space,0) : st->portName ? space.machine().root_device().ioport(st->portName)->read() : 0 );
192192            break;
193193         case 0x01: /* read receive buffer 0 */
194194         case 0x02: /* read receive buffer 1 */
r17963r17964
201201            taito8741_hostdata_w(st,st->rxd[data-1]);
202202            break;
203203         case 0x08:   /* latch received serial data */
204            st->txd[0] = st->portHandler ? st->portHandler(space,0) : st->portName ? space->machine().root_device().ioport(st->portName)->read() : 0;
204            st->txd[0] = st->portHandler ? st->portHandler(space,0) : st->portName ? space.machine().root_device().ioport(st->portName)->read() : 0;
205205            if( sst )
206206            {
207               space->machine().scheduler().synchronize(FUNC(taito8741_serial_tx), num);
207               space.machine().scheduler().synchronize(FUNC(taito8741_serial_tx), num);
208208               st->serial_out = 0;
209209               st->status |= 0x04;
210210               st->phase = CMD_08;
r17963r17964
273273}
274274
275275/* read status port */
276static int I8741_status_r(address_space *space, int num)
276static int I8741_status_r(address_space &space, int num)
277277{
278278   I8741 *st = &taito8741[num];
279279   taito8741_update(space, num);
280   LOG(("%s:8741-%d ST Read %02x\n",space->machine().describe_context(),num,st->status));
280   LOG(("%s:8741-%d ST Read %02x\n",space.machine().describe_context(),num,st->status));
281281   return st->status;
282282}
283283
284284/* read data port */
285static int I8741_data_r(address_space *space, int num)
285static int I8741_data_r(address_space &space, int num)
286286{
287287   I8741 *st = &taito8741[num];
288288   int ret = st->toData;
289289   st->status &= 0xfe;
290   LOG(("%s:8741-%d DATA Read %02x\n",space->machine().describe_context(),num,ret));
290   LOG(("%s:8741-%d DATA Read %02x\n",space.machine().describe_context(),num,ret));
291291
292292   /* update chip */
293293   taito8741_update(space, num);
r17963r17964
295295   switch( st->mode )
296296   {
297297   case TAITO8741_PORT: /* parallel data */
298      taito8741_hostdata_w(st,st->portHandler ? st->portHandler(space, st->parallelselect) : st->portName ? space->machine().root_device().ioport(st->portName)->read() : 0);
298      taito8741_hostdata_w(st,st->portHandler ? st->portHandler(space, st->parallelselect) : st->portName ? space.machine().root_device().ioport(st->portName)->read() : 0);
299299      break;
300300   }
301301   return ret;
302302}
303303
304304/* Write data port */
305static void I8741_data_w(address_space *space, int num, int data)
305static void I8741_data_w(address_space &space, int num, int data)
306306{
307307   I8741 *st = &taito8741[num];
308   LOG(("%s:8741-%d DATA Write %02x\n",space->machine().describe_context(),num,data));
308   LOG(("%s:8741-%d DATA Write %02x\n",space.machine().describe_context(),num,data));
309309   st->fromData = data;
310310   st->status |= 0x02;
311311   /* update chip */
r17963r17964
313313}
314314
315315/* Write command port */
316static void I8741_command_w(address_space *space, int num, int data)
316static void I8741_command_w(address_space &space, int num, int data)
317317{
318318   I8741 *st = &taito8741[num];
319   LOG(("%s:8741-%d CMD Write %02x\n",space->machine().describe_context(),num,data));
319   LOG(("%s:8741-%d CMD Write %02x\n",space.machine().describe_context(),num,data));
320320   st->fromCmd = data;
321321   st->status |= 0x04;
322322   /* update chip */
r17963r17964
444444   }
445445}
446446
447static void josvolly_8741_w(address_space *space, int num, int offset, int data)
447static void josvolly_8741_w(address_space &space, int num, int offset, int data)
448448{
449449   JV8741 *mcu = &i8741[num];
450450
451451   if(offset==1)
452452   {
453      LOG(("%s:8741[%d] CW %02X\n", space->machine().describe_context(), num, data));
453      LOG(("%s:8741[%d] CW %02X\n", space.machine().describe_context(), num, data));
454454
455455      /* read pointer */
456456      mcu->cmd = data;
r17963r17964
472472         break;
473473      case 2:
474474#if 1
475         mcu->rxd = space->machine().root_device().ioport("DSW2")->read();
475         mcu->rxd = space.machine().root_device().ioport("DSW2")->read();
476476         mcu->sts |= 0x01; /* RD ready */
477477#endif
478478         break;
r17963r17964
488488   else
489489   {
490490      /* data */
491      LOG(("%s:8741[%d] DW %02X\n", space->machine().describe_context(), num, data));
491      LOG(("%s:8741[%d] DW %02X\n", space.machine().describe_context(), num, data));
492492
493493      mcu->txd = data ^ 0x40; /* parity reverce ? */
494494      mcu->sts |= 0x02;     /* TXD busy         */
r17963r17964
498498      {
499499         if(josvolly_nmi_enable)
500500         {
501            space->machine().device("audiocpu")->execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE);
501            space.machine().device("audiocpu")->execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE);
502502            josvolly_nmi_enable = 0;
503503         }
504504      }
505505#endif
506506   }
507   josvolly_8741_do(space->machine(), num);
507   josvolly_8741_do(space.machine(), num);
508508}
509509
510static INT8 josvolly_8741_r(address_space *space,int num,int offset)
510static INT8 josvolly_8741_r(address_space &space,int num,int offset)
511511{
512512   JV8741 *mcu = &i8741[num];
513513   int ret;
r17963r17964
515515   if(offset==1)
516516   {
517517      if(mcu->rst)
518         mcu->rxd = space->machine().root_device().ioport(mcu->initReadPort)->read(); /* port in */
518         mcu->rxd = space.machine().root_device().ioport(mcu->initReadPort)->read(); /* port in */
519519      ret = mcu->sts;
520      LOG(("%s:8741[%d]       SR %02X\n",space->machine().describe_context(),num,ret));
520      LOG(("%s:8741[%d]       SR %02X\n",space.machine().describe_context(),num,ret));
521521   }
522522   else
523523   {
524524      /* clear status port */
525525      mcu->sts &= ~0x01; /* RD ready */
526526      ret = mcu->rxd;
527      LOG(("%s:8741[%d]       DR %02X\n",space->machine().describe_context(),num,ret));
527      LOG(("%s:8741[%d]       DR %02X\n",space.machine().describe_context(),num,ret));
528528      mcu->rst = 0;
529529   }
530530   return ret;
trunk/src/mame/machine/snescx4.c
r17963r17964
108108   count = (cx4.reg[0x43]) | (cx4.reg[0x44] << 8);
109109   dest  = (cx4.reg[0x45]) | (cx4.reg[0x46] << 8);
110110
111   address_space *space = machine.device<cpu_device>("maincpu")->space(AS_PROGRAM);
111   address_space &space = *machine.device<cpu_device>("maincpu")->space(AS_PROGRAM);
112112   for(i=0;i<count;i++)
113113   {
114      CX4_write(machine, dest++, space->read_byte(src++));
114      CX4_write(machine, dest++, space.read_byte(src++));
115115   }
116116}
117117
trunk/src/mame/machine/deco102.c
r17963r17964
5050void deco102_decrypt_cpu(running_machine &machine, const char *cputag, int address_xor, int data_select_xor, int opcode_select_xor)
5151{
5252   int i;
53   address_space *space = machine.device(cputag)->memory().space(AS_PROGRAM);
53   address_space &space = *machine.device(cputag)->memory().space(AS_PROGRAM);
5454   UINT16 *rom = (UINT16 *)machine.root_device().memregion(cputag)->base();
5555   int size = machine.root_device().memregion(cputag)->bytes();
5656   UINT16 *opcodes = auto_alloc_array(machine, UINT16, size / 2);
r17963r17964
5858
5959   memcpy(buf, rom, size);
6060
61   space->set_decrypted_region(0, size - 1, opcodes);
61   space.set_decrypted_region(0, size - 1, opcodes);
6262   m68k_set_encrypted_opcode_range(machine.device(cputag), 0, size);
6363
6464   for (i = 0; i < size / 2; i++)
trunk/src/mame/machine/pcecommn.c
r17963r17964
2727/* todo: how many input ports does the PCE have? */
2828WRITE8_HANDLER ( pce_joystick_w )
2929{
30   h6280io_set_buffer(&space->device(), data);
30   h6280io_set_buffer(&space.device(), data);
3131    /* bump counter on a low-to-high transition of bit 1 */
3232    if((!joystick_data_select) && (data & JOY_CLOCK))
3333    {
r17963r17964
5151
5252   if ( pce_joystick_readinputport_callback != NULL )
5353   {
54      data = pce_joystick_readinputport_callback(space->machine());
54      data = pce_joystick_readinputport_callback(space.machine());
5555   }
5656   else
5757   {
58      data = space->machine().root_device().ioport("JOY")->read();
58      data = space.machine().root_device().ioport("JOY")->read();
5959   }
6060   if(joystick_data_select) data >>= 4;
6161   ret = (data & 0x0F) | pce.io_port_options;
trunk/src/mame/machine/theglobp.c
r17963r17964
206206
207207READ8_HANDLER( theglobp_decrypt_rom )
208208{
209   pacman_state *state = space->machine().driver_data<pacman_state>();
209   pacman_state *state = space.machine().driver_data<pacman_state>();
210210   if (offset & 0x01)
211211   {
212212      state->m_counter = (state->m_counter - 1) & 0x0F;
trunk/src/mame/machine/snes.c
r17963r17964
3131/* -- Globals -- */
3232UINT8  *snes_ram = NULL;      /* 65816 ram */
3333
34static void snes_dma(address_space *space, UINT8 channels);
35static void snes_hdma_init(address_space *space);
36static void snes_hdma(address_space *space);
34static void snes_dma(address_space &space, UINT8 channels);
35static void snes_hdma_init(address_space &space);
36static void snes_hdma(address_space &space);
3737
3838static READ8_HANDLER(snes_io_dma_r);
3939static WRITE8_HANDLER(snes_io_dma_w);
r17963r17964
135135{
136136   snes_state *state = machine.driver_data<snes_state>();
137137   // make sure we're in the 65816's context since we're messing with the OAM and stuff
138   address_space *space = state->m_maincpu->space(AS_PROGRAM);
138   address_space &space = *state->m_maincpu->space(AS_PROGRAM);
139139
140140   if (!(snes_ppu.screen_disabled)) //Reset OAM address, byuu says it happens at H=10
141141   {
142      space->write_byte(OAMADDL, snes_ppu.oam.saved_address_low); /* Reset oam address */
143      space->write_byte(OAMADDH, snes_ppu.oam.saved_address_high);
142      space.write_byte(OAMADDL, snes_ppu.oam.saved_address_low); /* Reset oam address */
143      space.write_byte(OAMADDH, snes_ppu.oam.saved_address_high);
144144      snes_ppu.oam.first_sprite = snes_ppu.oam.priority_rotation ? (snes_ppu.oam.address >> 1) & 127 : 0;
145145   }
146146}
r17963r17964
148148static TIMER_CALLBACK( snes_reset_hdma )
149149{
150150   snes_state *state = machine.driver_data<snes_state>();
151   address_space *cpu0space = state->m_maincpu->space(AS_PROGRAM);
151   address_space &cpu0space = *state->m_maincpu->space(AS_PROGRAM);
152152   snes_hdma_init(cpu0space);
153153}
154154
r17963r17964
233233   // hdma reset happens at scanline 0, H=~6
234234   if (snes_ppu.beam.current_vert == 0)
235235   {
236      address_space *cpu0space = state->m_maincpu->space(AS_PROGRAM);
236      address_space &cpu0space = *state->m_maincpu->space(AS_PROGRAM);
237237      snes_hdma_init(cpu0space);
238238   }
239239
r17963r17964
257257static TIMER_CALLBACK( snes_hblank_tick )
258258{
259259   snes_state *state = machine.driver_data<snes_state>();
260   address_space *cpu0space = state->m_maincpu->space(AS_PROGRAM);
260   address_space &cpu0space = *state->m_maincpu->space(AS_PROGRAM);
261261   int nextscan;
262262
263263   snes_ppu.beam.current_vert = machine.primary_screen->vpos();
r17963r17964
308308      return 0xff;
309309
310310   recurse = 1;
311   result = space->read_byte(space->device().safe_pc() - 1); //LAST opcode that's fetched on the bus
311   result = space.read_byte(space.device().safe_pc() - 1); //LAST opcode that's fetched on the bus
312312   recurse = 0;
313313   return result;
314314}
r17963r17964
316316/* read & write to DMA addresses are defined separately, to be called by snessdd1 handlers */
317317static READ8_HANDLER( snes_io_dma_r )
318318{
319   snes_state *state = space->machine().driver_data<snes_state>();
319   snes_state *state = space.machine().driver_data<snes_state>();
320320
321321   switch (offset)
322322   {
r17963r17964
364364
365365static WRITE8_HANDLER( snes_io_dma_w )
366366{
367   snes_state *state = space->machine().driver_data<snes_state>();
367   snes_state *state = space.machine().driver_data<snes_state>();
368368
369369   switch (offset)
370370   {
r17963r17964
430430 */
431431READ8_HANDLER( snes_r_io )
432432{
433   snes_state *state = space->machine().driver_data<snes_state>();
433   snes_state *state = space.machine().driver_data<snes_state>();
434434   UINT8 value = 0;
435435
436436   // PPU accesses are from 2100 to 213f
r17963r17964
442442   // APU is mirrored from 2140 to 217f
443443   if (offset >= APU00 && offset < WMDATA)
444444   {
445      return spc_port_out(state->m_spc700, *space, offset & 0x3);
445      return spc_port_out(state->m_spc700, space, offset & 0x3);
446446   }
447447
448448   if (state->m_has_addon_chip == HAS_SUPERFX && state->m_superfx != NULL)
r17963r17964
488488   switch (offset)
489489   {
490490      case WMDATA:   /* Data to read from WRAM */
491         value = space->read_byte(0x7e0000 + state->m_wram_address++);
491         value = space.read_byte(0x7e0000 + state->m_wram_address++);
492492         state->m_wram_address &= 0x1ffff;
493493         return value;
494494      case OLDJOY1:   /* Data for old NES controllers (JOYSER1) */
495495         if (snes_ram[offset] & 0x1)
496496            return 0 | (snes_open_bus_r(space, 0) & 0xfc); //correct?
497497
498         value = state->m_oldjoy1_read(space->machine());
498         value = state->m_oldjoy1_read(space.machine());
499499
500500         return (value & 0x03) | (snes_open_bus_r(space, 0) & 0xfc); //correct?
501501      case OLDJOY2:   /* Data for old NES controllers (JOYSER2) */
502502         if (snes_ram[OLDJOY1] & 0x1)
503503            return 0 | 0x1c | (snes_open_bus_r(space, 0) & 0xe0); //correct?
504504
505         value = state->m_oldjoy2_read(space->machine());
505         value = state->m_oldjoy2_read(space.machine());
506506
507507         return value | 0x1c | (snes_open_bus_r(space, 0) & 0xe0); //correct?
508508      case RDNMI:         /* NMI flag by v-blank and version number */
r17963r17964
516516         return value;
517517      case HVBJOY:      /* H/V blank and joypad controller enable */
518518         // electronics test says hcounter 272 is start of hblank, which is beampos 363
519//          if (space->machine().primary_screen->hpos() >= 363) snes_ram[offset] |= 0x40;
519//          if (space.machine().primary_screen->hpos() >= 363) snes_ram[offset] |= 0x40;
520520//              else snes_ram[offset] &= ~0x40;
521521         return (snes_ram[offset] & 0xc1) | (snes_open_bus_r(space, 0) & 0x3e);
522522      case RDIO:         /* Programmable I/O port - echos back what's written to WRIO */
r17963r17964
565565      case 0x4100:      /* NSS Dip-Switches */
566566         {
567567            if (state->m_is_nss)
568               return space->machine().root_device().ioport("DSW")->read();
568               return space.machine().root_device().ioport("DSW")->read();
569569
570570            return snes_open_bus_r(space, 0);
571571         }
572572//      case 0x4101: //PC: a104 - a10e - a12a   //only nss_actr (DSW actually reads in word units ...)
573573
574574      default:
575//          mame_printf_debug("snes_r: offset = %x pc = %x\n",offset,space->device().safe_pc());
575//          mame_printf_debug("snes_r: offset = %x pc = %x\n",offset,space.device().safe_pc());
576576// Added break; after commenting above line.  If uncommenting, drop the break;
577577                        break;
578578   }
r17963r17964
592592 */
593593WRITE8_HANDLER( snes_w_io )
594594{
595   snes_state *state = space->machine().driver_data<snes_state>();
595   snes_state *state = space.machine().driver_data<snes_state>();
596596
597597   // PPU accesses are from 2100 to 213f
598598   if (offset >= INIDISP && offset < APU00)
r17963r17964
605605   if (offset >= APU00 && offset < WMDATA)
606606   {
607607//      printf("816: %02x to APU @ %d (PC=%06x)\n", data, offset & 3,space->device().safe_pc());
608      spc_port_in(state->m_spc700, *space, offset & 0x3, data);
609      space->machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(20));
608      spc_port_in(state->m_spc700, space, offset & 0x3, data);
609      space.machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(20));
610610      return;
611611   }
612612
r17963r17964
622622   {
623623      if (offset == 0x2800 || offset == 0x2801)
624624      {
625         srtc_write(space->machine(), offset, data);
625         srtc_write(space.machine(), offset, data);
626626         return;
627627      }
628628   }
r17963r17964
644644      UINT16 limit = (state->m_has_addon_chip == HAS_SPC7110_RTC) ? 0x4842 : 0x483f;
645645      if (offset >= 0x4800 && offset <= limit)
646646      {
647         spc7110_mmio_write(space->machine(), (UINT32)offset, data);
647         spc7110_mmio_write(space.machine(), (UINT32)offset, data);
648648         return;
649649      }
650650   }
r17963r17964
659659   switch (offset)
660660   {
661661      case WMDATA:   /* Data to write to WRAM */
662         space->write_byte(0x7e0000 + state->m_wram_address++, data );
662         space.write_byte(0x7e0000 + state->m_wram_address++, data );
663663         state->m_wram_address &= 0x1ffff;
664664         return;
665665      case WMADDL:   /* Address to read/write to wram (low) */
r17963r17964
698698         if (!(snes_ram[WRIO] & 0x80) && (data & 0x80))
699699         {
700700            // external latch
701            snes_latch_counters(space->machine());
701            snes_latch_counters(space.machine());
702702         }
703703         break;
704704      case HTIMEL:   /* H-Count timer settings (low)  */
r17963r17964
723723         break;
724724      case HDMAEN:   /* HDMA channel designation */
725725         if (data) //if a HDMA is enabled, data is inited at the next scanline
726            space->machine().scheduler().timer_set(space->machine().primary_screen->time_until_pos(snes_ppu.beam.current_vert + 1), FUNC(snes_reset_hdma));
726            space.machine().scheduler().timer_set(space.machine().primary_screen->time_until_pos(snes_ppu.beam.current_vert + 1), FUNC(snes_reset_hdma));
727727         break;
728728      case TIMEUP:   // IRQ Flag is cleared on both read and write
729729         state->m_maincpu->set_input_line(G65816_LINE_IRQ, CLEAR_LINE );
r17963r17964
840840/* 0x000000 - 0x2fffff */
841841READ8_HANDLER( snes_r_bank1 )
842842{
843   snes_state *state = space->machine().driver_data<snes_state>();
843   snes_state *state = space.machine().driver_data<snes_state>();
844844   UINT8 value = 0xff;
845845   UINT16 address = offset & 0xffff;
846846
847847   if (address < 0x2000)                                 /* Mirror of Low RAM */
848      value = space->read_byte(0x7e0000 + address);
848      value = space.read_byte(0x7e0000 + address);
849849   else if (address < 0x6000)                              /* I/O */
850850   {
851851      if (state->m_cart[0].mode == SNES_MODE_BSX && address >= 0x5000)
r17963r17964
875875      }
876876      else
877877      {
878         logerror("(PC=%06x) snes_r_bank1: Unmapped external chip read: %04x\n",space->device().safe_pc(),address);
878         logerror("(PC=%06x) snes_r_bank1: Unmapped external chip read: %04x\n",space.device().safe_pc(),address);
879879         value = snes_open_bus_r(space, 0);                        /* Reserved */
880880      }
881881   }
r17963r17964
894894/* 0x300000 - 0x3fffff */
895895READ8_HANDLER( snes_r_bank2 )
896896{
897   snes_state *state = space->machine().driver_data<snes_state>();
897   snes_state *state = space.machine().driver_data<snes_state>();
898898   UINT8 value = 0xff;
899899   UINT16 address = offset & 0xffff;
900900
901901   if (address < 0x2000)                                 /* Mirror of Low RAM */
902      value = space->read_byte(0x7e0000 + address);
902      value = space.read_byte(0x7e0000 + address);
903903   else if (address < 0x6000)                              /* I/O */
904904   {
905905      if (state->m_cart[0].mode == SNES_MODE_BSX && address >= 0x5000)
r17963r17964
934934      }
935935      else
936936      {
937         logerror( "(PC=%06x) snes_r_bank2: Unmapped external chip read: %04x\n",space->device().safe_pc(),address );
937         logerror( "(PC=%06x) snes_r_bank2: Unmapped external chip read: %04x\n",space.device().safe_pc(),address );
938938         value = snes_open_bus_r(space, 0);
939939      }
940940   }
r17963r17964
956956/* 0x400000 - 0x5fffff */
957957READ8_HANDLER( snes_r_bank3 )
958958{
959   snes_state *state = space->machine().driver_data<snes_state>();
959   snes_state *state = space.machine().driver_data<snes_state>();
960960   UINT8 value = 0xff;
961961   UINT16 address = offset & 0xffff;
962962
r17963r17964
994994/* 0x600000 - 0x6fffff */
995995READ8_HANDLER( snes_r_bank4 )
996996{
997   snes_state *state = space->machine().driver_data<snes_state>();
997   snes_state *state = space.machine().driver_data<snes_state>();
998998   UINT8 value = 0xff;
999999   UINT16 address = offset & 0xffff;
10001000
r17963r17964
10251025         value = (address >= 0x4000) ? dsp_get_sr() : dsp_get_dr();
10261026      else
10271027      {
1028         logerror("(PC=%06x) snes_r_bank4: Unmapped external chip read: %04x\n",space->device().safe_pc(),address);
1028         logerror("(PC=%06x) snes_r_bank4: Unmapped external chip read: %04x\n",space.device().safe_pc(),address);
10291029         value = snes_open_bus_r(space, 0);                     /* Reserved */
10301030      }
10311031   }
r17963r17964
10381038/* 0x700000 - 0x7dffff */
10391039READ8_HANDLER( snes_r_bank5 )
10401040{
1041   snes_state *state = space->machine().driver_data<snes_state>();
1041   snes_state *state = space.machine().driver_data<snes_state>();
10421042   UINT8 value;
10431043   UINT16 address = offset & 0xffff;
10441044
r17963r17964
10581058      }
10591059      else
10601060      {
1061         logerror("(PC=%06x) snes_r_bank5: Unmapped external chip read: %04x\n",space->device().safe_pc(),address);
1061         logerror("(PC=%06x) snes_r_bank5: Unmapped external chip read: %04x\n",space.device().safe_pc(),address);
10621062         value = snes_open_bus_r(space, 0);                        /* Reserved */
10631063      }
10641064   }
r17963r17964
10711071/* 0x800000 - 0xbfffff */
10721072READ8_HANDLER( snes_r_bank6 )
10731073{
1074   snes_state *state = space->machine().driver_data<snes_state>();
1074   snes_state *state = space.machine().driver_data<snes_state>();
10751075   UINT8 value = 0;
10761076   UINT16 address = offset & 0xffff;
10771077
10781078   if (state->m_has_addon_chip == HAS_SUPERFX)
1079      value = space->read_byte(offset);
1079      value = space.read_byte(offset);
10801080   else if (address < 0x8000)
10811081   {
10821082      if (state->m_cart[0].mode != SNES_MODE_25)
1083         value = space->read_byte(offset);
1083         value = space.read_byte(offset);
10841084      else if ((state->m_has_addon_chip == HAS_CX4) && (address >= 0x6000))
10851085         value = CX4_read(address - 0x6000);
10861086      else                     /* Mode 25 has SRAM not mirrored from lower banks */
10871087      {
10881088         if (address < 0x6000)
1089            value = space->read_byte(offset);
1089            value = space.read_byte(offset);
10901090         else if ((offset >= 0x300000) && (state->m_cart[0].sram > 0))
10911091         {
10921092            int mask = (state->m_cart[0].sram - 1) | 0xff0000; /* Limit SRAM size to what's actually present */
r17963r17964
10941094         }
10951095         else                  /* Area 0x6000-0x8000 with offset < 0x300000 is reserved */
10961096         {
1097            logerror("(PC=%06x) snes_r_bank6: Unmapped external chip read: %04x\n",space->device().safe_pc(),address);
1097            logerror("(PC=%06x) snes_r_bank6: Unmapped external chip read: %04x\n",space.device().safe_pc(),address);
10981098            value = snes_open_bus_r(space, 0);
10991099         }
11001100      }
r17963r17964
11161116/* 0xc00000 - 0xffffff */
11171117READ8_HANDLER( snes_r_bank7 )
11181118{
1119   snes_state *state = space->machine().driver_data<snes_state>();
1119   snes_state *state = space.machine().driver_data<snes_state>();
11201120   UINT8 value = 0;
11211121   UINT16 address = offset & 0xffff;
11221122
r17963r17964
11471147   else if ((state->m_has_addon_chip == HAS_SPC7110 || state->m_has_addon_chip == HAS_SPC7110_RTC) && offset >= 0x100000)
11481148      value = spc7110_bank7_read(space, offset);
11491149   else if (state->m_has_addon_chip == HAS_SDD1)
1150      value = sdd1_read(space->machine(), offset);
1150      value = sdd1_read(space.machine(), offset);
11511151   else if (state->m_has_addon_chip == HAS_ST010 || state->m_has_addon_chip == HAS_ST011)
11521152   {
11531153      if (offset >= 0x280000 && offset < 0x300000 && address < 0x1000)
r17963r17964
11621162   else if ((state->m_cart[0].mode & 5) && !(state->m_has_addon_chip == HAS_SUPERFX))      /* Mode 20 & 22 */
11631163   {
11641164      if (address < 0x8000)
1165         value = space->read_byte(0x400000 + offset);
1165         value = space.read_byte(0x400000 + offset);
11661166      else
11671167         value = snes_ram[0xc00000 + offset];
11681168   }
r17963r17964
11761176/* 0x000000 - 0x2fffff */
11771177WRITE8_HANDLER( snes_w_bank1 )
11781178{
1179   snes_state *state = space->machine().driver_data<snes_state>();
1179   snes_state *state = space.machine().driver_data<snes_state>();
11801180   UINT16 address = offset & 0xffff;
11811181
11821182   if (address < 0x2000)                     /* Mirror of Low RAM */
1183      space->write_byte(0x7e0000 + address, data);
1183      space.write_byte(0x7e0000 + address, data);
11841184   else if (address < 0x6000)                  /* I/O */
11851185   {
11861186      if (state->m_cart[0].mode == SNES_MODE_BSX && address >= 0x5000)
r17963r17964
11971197      else if ((state->m_cart[0].mode == SNES_MODE_21) && (state->m_has_addon_chip == HAS_DSP1) && (offset < 0x100000))
11981198         dsp_set_dr(data);
11991199      else if (state->m_has_addon_chip == HAS_CX4)
1200         CX4_write(space->machine(), address - 0x6000, data);
1200         CX4_write(space.machine(), address - 0x6000, data);
12011201      else if (state->m_has_addon_chip == HAS_SPC7110 || state->m_has_addon_chip == HAS_SPC7110_RTC)
12021202      {
12031203         if (offset < 0x10000)
r17963r17964
12211221      else
12221222         dsp_set_sr(data);
12231223   else
1224      logerror( "(PC=%06x) Attempt to write to ROM address: %X\n",space->device().safe_pc(),offset );
1224      logerror( "(PC=%06x) Attempt to write to ROM address: %X\n",space.device().safe_pc(),offset );
12251225}
12261226
12271227/* 0x300000 - 0x3fffff */
12281228WRITE8_HANDLER( snes_w_bank2 )
12291229{
1230   snes_state *state = space->machine().driver_data<snes_state>();
1230   snes_state *state = space.machine().driver_data<snes_state>();
12311231   UINT16 address = offset & 0xffff;
12321232
12331233   if (address < 0x2000)                     /* Mirror of Low RAM */
1234      space->write_byte(0x7e0000 + address, data);
1234      space.write_byte(0x7e0000 + address, data);
12351235   else if (address < 0x6000)                  /* I/O */
12361236   {
12371237      if (state->m_cart[0].mode == SNES_MODE_BSX && address >= 0x5000)
r17963r17964
12461246      else if (state->m_has_addon_chip == HAS_OBC1)
12471247         obc1_write(space, offset, data);
12481248      else if (state->m_has_addon_chip == HAS_CX4)
1249         CX4_write(space->machine(), address - 0x6000, data);
1249         CX4_write(space.machine(), address - 0x6000, data);
12501250      else if (state->m_has_addon_chip == HAS_SPC7110 || state->m_has_addon_chip == HAS_SPC7110_RTC)
12511251      {
12521252         if (offset < 0x10000)
r17963r17964
12781278      else
12791279         dsp_set_sr(data);
12801280   else
1281      logerror("(PC=%06x) Attempt to write to ROM address: %X\n",space->device().safe_pc(),offset + 0x300000);
1281      logerror("(PC=%06x) Attempt to write to ROM address: %X\n",space.device().safe_pc(),offset + 0x300000);
12821282}
12831283
12841284/* 0x600000 - 0x6fffff */
12851285WRITE8_HANDLER( snes_w_bank4 )
12861286{
1287   snes_state *state = space->machine().driver_data<snes_state>();
1287   snes_state *state = space.machine().driver_data<snes_state>();
12881288   UINT16 address = offset & 0xffff;
12891289
12901290   if (state->m_has_addon_chip == HAS_SUPERFX)
r17963r17964
13071307   else if (state->m_cart[0].mode & 5)               /* Mode 20 & 22 */
13081308   {
13091309      if (address >= 0x8000)
1310         logerror("(PC=%06x) Attempt to write to ROM address: %X\n",space->device().safe_pc(),offset + 0x600000);
1310         logerror("(PC=%06x) Attempt to write to ROM address: %X\n",space.device().safe_pc(),offset + 0x600000);
13111311      else if (state->m_has_addon_chip == HAS_DSP1)
13121312         dsp_set_dr(data);
13131313      else
13141314         logerror("snes_w_bank4: Attempt to write to reserved address: %X = %02x\n", offset + 0x600000, data);
13151315   }
13161316   else if (state->m_cart[0].mode & 0x0a)
1317      logerror("(PC=%06x) Attempt to write to ROM address: %X\n",space->device().safe_pc(),offset + 0x600000);
1317      logerror("(PC=%06x) Attempt to write to ROM address: %X\n",space.device().safe_pc(),offset + 0x600000);
13181318}
13191319
13201320/* 0x700000 - 0x7dffff */
13211321WRITE8_HANDLER( snes_w_bank5 )
13221322{
1323   snes_state *state = space->machine().driver_data<snes_state>();
1323   snes_state *state = space.machine().driver_data<snes_state>();
13241324   UINT16 address = offset & 0xffff;
13251325
13261326   if (state->m_has_addon_chip == HAS_SUPERFX)
r17963r17964
13361336         logerror("snes_w_bank5: Attempt to write to reserved address: %X = %02x\n", offset + 0x700000, data);
13371337   }
13381338   else if (state->m_cart[0].mode & 0x0a)
1339      logerror("(PC=%06x) Attempt to write to ROM address: %X\n",space->device().safe_pc(),offset + 0x700000);
1339      logerror("(PC=%06x) Attempt to write to ROM address: %X\n",space.device().safe_pc(),offset + 0x700000);
13401340}
13411341
13421342
13431343/* 0x800000 - 0xbfffff */
13441344WRITE8_HANDLER( snes_w_bank6 )
13451345{
1346   snes_state *state = space->machine().driver_data<snes_state>();
1346   snes_state *state = space.machine().driver_data<snes_state>();
13471347   UINT16 address = offset & 0xffff;
13481348
13491349   if (state->m_has_addon_chip == HAS_SUPERFX)
1350      space->write_byte(offset, data);
1350      space.write_byte(offset, data);
13511351   else if (address < 0x8000)
13521352   {
13531353      if ((state->m_has_addon_chip == HAS_CX4) && (address >= 0x6000))
1354         CX4_write(space->machine(), address - 0x6000, data);
1354         CX4_write(space.machine(), address - 0x6000, data);
13551355      else if (state->m_cart[0].mode != SNES_MODE_25)
1356         space->write_byte(offset, data);
1356         space.write_byte(offset, data);
13571357      else   /* Mode 25 has SRAM not mirrored from lower banks */
13581358      {
13591359         if (address < 0x6000)
1360            space->write_byte(offset, data);
1360            space.write_byte(offset, data);
13611361         else if ((offset >= 0x300000) && (state->m_cart[0].sram > 0))
13621362         {
13631363            int mask = (state->m_cart[0].sram - 1) | 0xff0000; /* Limit SRAM size to what's actually present */
r17963r17964
13871387      else
13881388         dsp_set_sr(data);
13891389   else
1390      logerror("(PC=%06x) Attempt to write to ROM address: %X\n",space->device().safe_pc(),offset + 0x800000);
1390      logerror("(PC=%06x) Attempt to write to ROM address: %X\n",space.device().safe_pc(),offset + 0x800000);
13911391}
13921392
13931393
13941394/* 0xc00000 - 0xffffff */
13951395WRITE8_HANDLER( snes_w_bank7 )
13961396{
1397   snes_state *state = space->machine().driver_data<snes_state>();
1397   snes_state *state = space.machine().driver_data<snes_state>();
13981398   UINT16 address = offset & 0xffff;
13991399
14001400   if (state->m_has_addon_chip == HAS_SUPERFX)
r17963r17964
14051405         snes_ram[0xe00000 + offset] = data;      // SFX RAM
14061406      }
14071407      else
1408         logerror("(PC=%06x) Attempt to write to ROM address: %X\n",space->device().safe_pc(),offset + 0xc00000);
1408         logerror("(PC=%06x) Attempt to write to ROM address: %X\n",space.device().safe_pc(),offset + 0xc00000);
14091409   }
14101410   else if (state->m_has_addon_chip == HAS_ST010 || state->m_has_addon_chip == HAS_ST011)
14111411   {
r17963r17964
14341434            snes_w_bank4(space, offset - 0x200000, data);
14351435      }
14361436      else
1437         logerror("(PC=%06x) snes_w_bank7: Attempt to write to ROM address: %X = %02x\n",space->device().safe_pc(),offset + 0xc00000, data);
1437         logerror("(PC=%06x) snes_w_bank7: Attempt to write to ROM address: %X = %02x\n",space.device().safe_pc(),offset + 0xc00000, data);
14381438   }
14391439   else if (state->m_cart[0].mode & 0x0a)
1440      logerror("(PC=%06x) Attempt to write to ROM address: %X\n",space->device().safe_pc(),offset + 0xc00000);
1440      logerror("(PC=%06x) Attempt to write to ROM address: %X\n",space.device().safe_pc(),offset + 0xc00000);
14411441}
14421442
14431443
r17963r17964
18161816/* for mame we use an init, maybe we will need more for the different games */
18171817DRIVER_INIT_MEMBER(snes_state,snes)
18181818{
1819   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
1819   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
18201820   UINT16 total_blocks, read_blocks;
18211821   UINT8 *rom;
18221822
r17963r17964
18811881
18821882DRIVER_INIT_MEMBER(snes_state,snes_hirom)
18831883{
1884   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
1884   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
18851885   UINT16 total_blocks, read_blocks;
18861886   UINT8  *rom;
18871887
r17963r17964
19551955   return 1;
19561956}
19571957
1958INLINE UINT8 snes_abus_read( address_space *space, UINT32 abus )
1958INLINE UINT8 snes_abus_read( address_space &space, UINT32 abus )
19591959{
19601960   if (!dma_abus_valid(abus))
19611961      return 0;
19621962
1963   return space->read_byte(abus);
1963   return space.read_byte(abus);
19641964}
19651965
1966INLINE void snes_dma_transfer( address_space *space, UINT8 dma, UINT32 abus, UINT16 bbus )
1966INLINE void snes_dma_transfer( address_space &space, UINT8 dma, UINT32 abus, UINT16 bbus )
19671967{
1968   snes_state *state = space->machine().driver_data<snes_state>();
1968   snes_state *state = space.machine().driver_data<snes_state>();
19691969
19701970   if (state->m_dma_channel[dma].dmap & 0x80)   /* PPU->CPU */
19711971   {
r17963r17964
19731973      {
19741974         //illegal WRAM->WRAM transfer (bus conflict)
19751975         //no read occurs; write does occur
1976         space->write_byte(abus, 0x00);
1976         space.write_byte(abus, 0x00);
19771977         return;
19781978      }
19791979      else
r17963r17964
19811981         if (!dma_abus_valid(abus))
19821982            return;
19831983
1984         space->write_byte(abus, space->read_byte(bbus));
1984         space.write_byte(abus, space.read_byte(bbus));
19851985         return;
19861986      }
19871987   }
r17963r17964
19961996      }
19971997      else
19981998      {
1999         space->write_byte(bbus, snes_abus_read(space, abus));
1999         space.write_byte(bbus, snes_abus_read(space, abus));
20002000         return;
20012001      }
20022002   }
r17963r17964
20312031   return 1;
20322032}
20332033
2034static void snes_hdma_update( address_space *space, int dma )
2034static void snes_hdma_update( address_space &space, int dma )
20352035{
2036   snes_state *state = space->machine().driver_data<snes_state>();
2037   UINT32 abus = snes_get_hdma_addr(space->machine(), dma);
2036   snes_state *state = space.machine().driver_data<snes_state>();
2037   UINT32 abus = snes_get_hdma_addr(space.machine(), dma);
20382038
20392039   state->m_dma_channel[dma].hdma_line_counter = snes_abus_read(space, abus);
20402040
r17963r17964
20442044        one byte for Address, and use the $00 for the low byte. So Address ends up incremented one less than
20452045        otherwise expected */
20462046
2047      abus = snes_get_hdma_addr(space->machine(), dma);
2047      abus = snes_get_hdma_addr(space.machine(), dma);
20482048      state->m_dma_channel[dma].trans_size = snes_abus_read(space, abus) << 8;
20492049
2050      if (state->m_dma_channel[dma].hdma_line_counter || !is_last_active_channel(space->machine(), dma))
2050      if (state->m_dma_channel[dma].hdma_line_counter || !is_last_active_channel(space.machine(), dma))
20512051      {
20522052         // we enter here if we have more transfers to be done or if there are other active channels after this one
2053         abus = snes_get_hdma_addr(space->machine(), dma);
2053         abus = snes_get_hdma_addr(space.machine(), dma);
20542054         state->m_dma_channel[dma].trans_size >>= 8;
20552055         state->m_dma_channel[dma].trans_size |= snes_abus_read(space, abus) << 8;
20562056      }
r17963r17964
20622062   state->m_dma_channel[dma].do_transfer = 1;
20632063}
20642064
2065static void snes_hdma_init( address_space *space )
2065static void snes_hdma_init( address_space &space )
20662066{
2067   snes_state *state = space->machine().driver_data<snes_state>();
2067   snes_state *state = space.machine().driver_data<snes_state>();
20682068   int i;
20692069
20702070   state->m_hdmaen = snes_ram[HDMAEN];
r17963r17964
20782078   }
20792079}
20802080
2081static void snes_hdma( address_space *space )
2081static void snes_hdma( address_space &space )
20822082{
2083   snes_state *state = space->machine().driver_data<snes_state>();
2083   snes_state *state = space.machine().driver_data<snes_state>();
20842084   UINT16 bbus;
20852085   UINT32 abus;
20862086   int i;
r17963r17964
21622162   }
21632163}
21642164
2165static void snes_dma( address_space *space, UINT8 channels )
2165static void snes_dma( address_space &space, UINT8 channels )
21662166{
2167   snes_state *state = space->machine().driver_data<snes_state>();
2167   snes_state *state = space.machine().driver_data<snes_state>();
21682168   int i;
21692169   INT8 increment;
21702170   UINT16 bbus;
trunk/src/mame/machine/pcshare.c
r17963r17964
166166   offs_t page_offset = (((offs_t) dma_offset[0][dma_channel]) << 16)
167167      & 0xFF0000;
168168
169   return space->read_byte(page_offset + offset);
169   return space.read_byte(page_offset + offset);
170170}
171171
172172
r17963r17964
175175   offs_t page_offset = (((offs_t) dma_offset[0][dma_channel]) << 16)
176176      & 0xFF0000;
177177
178   space->write_byte(page_offset + offset, data);
178   space.write_byte(page_offset + offset, data);
179179}
180180
181181static READ8_HANDLER(dma_page_select_r)
trunk/src/mame/machine/atarigen.c
r17963r17964
236236
237237WRITE16_HANDLER( atarigen_scanline_int_ack_w )
238238{
239   atarigen_state *state = space->machine().driver_data<atarigen_state>();
239   atarigen_state *state = space.machine().driver_data<atarigen_state>();
240240   state->m_scanline_int_state = 0;
241   (*state->m_update_int_callback)(space->machine());
241   (*state->m_update_int_callback)(space.machine());
242242}
243243
244244WRITE32_HANDLER( atarigen_scanline_int_ack32_w )
245245{
246   atarigen_state *state = space->machine().driver_data<atarigen_state>();
246   atarigen_state *state = space.machine().driver_data<atarigen_state>();
247247   state->m_scanline_int_state = 0;
248   (*state->m_update_int_callback)(space->machine());
248   (*state->m_update_int_callback)(space.machine());
249249}
250250
251251
r17963r17964
269269
270270WRITE16_HANDLER( atarigen_sound_int_ack_w )
271271{
272   atarigen_state *state = space->machine().driver_data<atarigen_state>();
272   atarigen_state *state = space.machine().driver_data<atarigen_state>();
273273   state->m_sound_int_state = 0;
274   (*state->m_update_int_callback)(space->machine());
274   (*state->m_update_int_callback)(space.machine());
275275}
276276
277277WRITE32_HANDLER( atarigen_sound_int_ack32_w )
278278{
279   atarigen_state *state = space->machine().driver_data<atarigen_state>();
279   atarigen_state *state = space.machine().driver_data<atarigen_state>();
280280   state->m_sound_int_state = 0;
281   (*state->m_update_int_callback)(space->machine());
281   (*state->m_update_int_callback)(space.machine());
282282}
283283
284284
r17963r17964
302302
303303WRITE16_HANDLER( atarigen_video_int_ack_w )
304304{
305   atarigen_state *state = space->machine().driver_data<atarigen_state>();
305   atarigen_state *state = space.machine().driver_data<atarigen_state>();
306306   state->m_video_int_state = 0;
307   (*state->m_update_int_callback)(space->machine());
307   (*state->m_update_int_callback)(space.machine());
308308}
309309
310310WRITE32_HANDLER( atarigen_video_int_ack32_w )
311311{
312   atarigen_state *state = space->machine().driver_data<atarigen_state>();
312   atarigen_state *state = space.machine().driver_data<atarigen_state>();
313313   state->m_video_int_state = 0;
314   (*state->m_update_int_callback)(space->machine());
314   (*state->m_update_int_callback)(space.machine());
315315}
316316
317317
r17963r17964
358358
359359WRITE16_HANDLER( atarigen_eeprom_enable_w )
360360{
361   atarigen_state *state = space->machine().driver_data<atarigen_state>();
361   atarigen_state *state = space.machine().driver_data<atarigen_state>();
362362   state->m_eeprom_unlocked = 1;
363363}
364364
365365WRITE32_HANDLER( atarigen_eeprom_enable32_w )
366366{
367   atarigen_state *state = space->machine().driver_data<atarigen_state>();
367   atarigen_state *state = space.machine().driver_data<atarigen_state>();
368368   state->m_eeprom_unlocked = 1;
369369}
370370
r17963r17964
378378
379379WRITE16_HANDLER( atarigen_eeprom_w )
380380{
381   atarigen_state *state = space->machine().driver_data<atarigen_state>();
381   atarigen_state *state = space.machine().driver_data<atarigen_state>();
382382
383383   if (!state->m_eeprom_unlocked)
384384      return;
r17963r17964
389389
390390WRITE32_HANDLER( atarigen_eeprom32_w )
391391{
392   atarigen_state *state = space->machine().driver_data<atarigen_state>();
392   atarigen_state *state = space.machine().driver_data<atarigen_state>();
393393
394394   if (!state->m_eeprom_unlocked)
395395      return;
r17963r17964
409409
410410READ16_HANDLER( atarigen_eeprom_r )
411411{
412   atarigen_state *state = space->machine().driver_data<atarigen_state>();
412   atarigen_state *state = space.machine().driver_data<atarigen_state>();
413413   return state->m_eeprom[offset] | 0xff00;
414414}
415415
416416READ16_HANDLER( atarigen_eeprom_upper_r )
417417{
418   atarigen_state *state = space->machine().driver_data<atarigen_state>();
418   atarigen_state *state = space.machine().driver_data<atarigen_state>();
419419   return state->m_eeprom[offset] | 0x00ff;
420420}
421421
422422READ32_HANDLER( atarigen_eeprom_upper32_r )
423423{
424   atarigen_state *state = space->machine().driver_data<atarigen_state>();
424   atarigen_state *state = space.machine().driver_data<atarigen_state>();
425425   return (state->m_eeprom[offset * 2] << 16) | state->m_eeprom[offset * 2 + 1] | 0x00ff00ff;
426426}
427427
r17963r17964
468468      {
469469         m_slapstic_last_pc = pc;
470470         m_slapstic_last_address = address;
471         atarigen_slapstic_r(&direct.space(), (address >> 1) & 0x3fff, 0xffff);
471         atarigen_slapstic_r(direct.space(), (address >> 1) & 0x3fff, 0xffff);
472472      }
473473      return ~0;
474474   }
r17963r17964
511511      state->m_slapstic_base = base;
512512      state->m_slapstic_mirror = mirror;
513513
514      address_space *space = downcast<cpu_device *>(device)->space(AS_PROGRAM);
515      space->set_direct_update_handler(direct_update_delegate(FUNC(atarigen_state::atarigen_slapstic_setdirect), state));
514      address_space &space = *downcast<cpu_device *>(device)->space(AS_PROGRAM);
515      space.set_direct_update_handler(direct_update_delegate(FUNC(atarigen_state::atarigen_slapstic_setdirect), state));
516516   }
517517}
518518
r17963r17964
540540
541541WRITE16_HANDLER( atarigen_slapstic_w )
542542{
543   atarigen_state *state = space->machine().driver_data<atarigen_state>();
543   atarigen_state *state = space.machine().driver_data<atarigen_state>();
544544   update_bank(state, slapstic_tweak(space, offset));
545545}
546546
r17963r17964
553553READ16_HANDLER( atarigen_slapstic_r )
554554{
555555   /* fetch the result from the current bank first */
556   atarigen_state *state = space->machine().driver_data<atarigen_state>();
556   atarigen_state *state = space.machine().driver_data<atarigen_state>();
557557   int result = state->m_slapstic[offset & 0xfff];
558558
559559   /* then determine the new one */
r17963r17964
607607
608608READ8_HANDLER( atarigen_6502_irq_ack_r )
609609{
610   atarigen_state *state = space->machine().driver_data<atarigen_state>();
610   atarigen_state *state = space.machine().driver_data<atarigen_state>();
611611   state->m_timed_int = 0;
612   update_6502_irq(space->machine());
612   update_6502_irq(space.machine());
613613   return 0;
614614}
615615
616616WRITE8_HANDLER( atarigen_6502_irq_ack_w )
617617{
618   atarigen_state *state = space->machine().driver_data<atarigen_state>();
618   atarigen_state *state = space.machine().driver_data<atarigen_state>();
619619   state->m_timed_int = 0;
620   update_6502_irq(space->machine());
620   update_6502_irq(space.machine());
621621}
622622
623623
r17963r17964
641641
642642WRITE16_HANDLER( atarigen_sound_reset_w )
643643{
644   space->machine().scheduler().synchronize(FUNC(delayed_sound_reset));
644   space.machine().scheduler().synchronize(FUNC(delayed_sound_reset));
645645}
646646
647647
r17963r17964
666666WRITE16_HANDLER( atarigen_sound_w )
667667{
668668   if (ACCESSING_BITS_0_7)
669      space->machine().scheduler().synchronize(FUNC(delayed_sound_w), data & 0xff);
669      space.machine().scheduler().synchronize(FUNC(delayed_sound_w), data & 0xff);
670670}
671671
672672WRITE16_HANDLER( atarigen_sound_upper_w )
673673{
674674   if (ACCESSING_BITS_8_15)
675      space->machine().scheduler().synchronize(FUNC(delayed_sound_w), (data >> 8) & 0xff);
675      space.machine().scheduler().synchronize(FUNC(delayed_sound_w), (data >> 8) & 0xff);
676676}
677677
678678WRITE32_HANDLER( atarigen_sound_upper32_w )
679679{
680680   if (ACCESSING_BITS_24_31)
681      space->machine().scheduler().synchronize(FUNC(delayed_sound_w), (data >> 24) & 0xff);
681      space.machine().scheduler().synchronize(FUNC(delayed_sound_w), (data >> 24) & 0xff);
682682}
683683
684684
r17963r17964
691691
692692READ16_HANDLER( atarigen_sound_r )
693693{
694   atarigen_state *state = space->machine().driver_data<atarigen_state>();
694   atarigen_state *state = space.machine().driver_data<atarigen_state>();
695695   state->m_sound_to_cpu_ready = 0;
696696   atarigen_sound_int_ack_w(space, 0, 0, 0xffff);
697697   return state->m_sound_to_cpu | 0xff00;
r17963r17964
699699
700700READ16_HANDLER( atarigen_sound_upper_r )
701701{
702   atarigen_state *state = space->machine().driver_data<atarigen_state>();
702   atarigen_state *state = space.machine().driver_data<atarigen_state>();
703703   state->m_sound_to_cpu_ready = 0;
704704   atarigen_sound_int_ack_w(space, 0, 0, 0xffff);
705705   return (state->m_sound_to_cpu << 8) | 0x00ff;
r17963r17964
707707
708708READ32_HANDLER( atarigen_sound_upper32_r )
709709{
710   atarigen_state *state = space->machine().driver_data<atarigen_state>();
710   atarigen_state *state = space.machine().driver_data<atarigen_state>();
711711   state->m_sound_to_cpu_ready = 0;
712712   atarigen_sound_int_ack32_w(space, 0, 0, 0xffff);
713713   return (state->m_sound_to_cpu << 24) | 0x00ffffff;
r17963r17964
721721
722722WRITE8_HANDLER( atarigen_6502_sound_w )
723723{
724   space->machine().scheduler().synchronize(FUNC(delayed_6502_sound_w), data);
724   space.machine().scheduler().synchronize(FUNC(delayed_6502_sound_w), data);
725725}
726726
727727
r17963r17964
732732
733733READ8_HANDLER( atarigen_6502_sound_r )
734734{
735   atarigen_state *state = space->machine().driver_data<atarigen_state>();
735   atarigen_state *state = space.machine().driver_data<atarigen_state>();
736736   state->m_cpu_to_sound_ready = 0;
737737   state->m_sound_cpu->execute().set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
738738   return state->m_cpu_to_sound;
r17963r17964
764764static TIMER_CALLBACK( delayed_sound_reset )
765765{
766766   atarigen_state *state = machine.driver_data<atarigen_state>();
767   address_space *space = state->m_sound_cpu->memory().space(AS_PROGRAM);
767   address_space &space = *state->m_sound_cpu->memory().space(AS_PROGRAM);
768768
769769   /* unhalt and reset the sound CPU */
770770   if (param == 0)
r17963r17964
11251125      /* scanline IRQ ack here */
11261126      case 0x1e:
11271127         /* hack: this should be a device */
1128         atarigen_scanline_int_ack_w(screen.machine().device("maincpu")->memory().space(AS_PROGRAM), 0, 0, 0xffff);
1128         atarigen_scanline_int_ack_w(*screen.machine().device("maincpu")->memory().space(AS_PROGRAM), 0, 0, 0xffff);
11291129         break;
11301130
11311131      /* log anything else */
r17963r17964
11771177
11781178WRITE16_HANDLER( atarigen_alpha_w )
11791179{
1180   atarigen_state *state = space->machine().driver_data<atarigen_state>();
1180   atarigen_state *state = space.machine().driver_data<atarigen_state>();
11811181   COMBINE_DATA(&state->m_alpha[offset]);
11821182   state->m_alpha_tilemap->mark_tile_dirty(offset);
11831183}
11841184
11851185WRITE32_HANDLER( atarigen_alpha32_w )
11861186{
1187   atarigen_state *state = space->machine().driver_data<atarigen_state>();
1187   atarigen_state *state = space.machine().driver_data<atarigen_state>();
11881188   COMBINE_DATA(&state->m_alpha32[offset]);
11891189   if (ACCESSING_BITS_16_31)
11901190      state->m_alpha_tilemap->mark_tile_dirty(offset * 2);
r17963r17964
11941194
11951195WRITE16_HANDLER( atarigen_alpha2_w )
11961196{
1197   atarigen_state *state = space->machine().driver_data<atarigen_state>();
1197   atarigen_state *state = space.machine().driver_data<atarigen_state>();
11981198   COMBINE_DATA(&state->m_alpha2[offset]);
11991199   state->m_alpha2_tilemap->mark_tile_dirty(offset);
12001200}
r17963r17964
12241224
12251225WRITE16_HANDLER( atarigen_playfield_w )
12261226{
1227   atarigen_state *state = space->machine().driver_data<atarigen_state>();
1227   atarigen_state *state = space.machine().driver_data<atarigen_state>();
12281228   COMBINE_DATA(&state->m_playfield[offset]);
12291229   state->m_playfield_tilemap->mark_tile_dirty(offset);
12301230}
12311231
12321232WRITE32_HANDLER( atarigen_playfield32_w )
12331233{
1234   atarigen_state *state = space->machine().driver_data<atarigen_state>();
1234   atarigen_state *state = space.machine().driver_data<atarigen_state>();
12351235   COMBINE_DATA(&state->m_playfield32[offset]);
12361236   if (ACCESSING_BITS_16_31)
12371237      state->m_playfield_tilemap->mark_tile_dirty(offset * 2);
r17963r17964
12411241
12421242WRITE16_HANDLER( atarigen_playfield2_w )
12431243{
1244   atarigen_state *state = space->machine().driver_data<atarigen_state>();
1244   atarigen_state *state = space.machine().driver_data<atarigen_state>();
12451245   COMBINE_DATA(&state->m_playfield2[offset]);
12461246   state->m_playfield2_tilemap->mark_tile_dirty(offset);
12471247}
r17963r17964
12551255
12561256WRITE16_HANDLER( atarigen_playfield_large_w )
12571257{
1258   atarigen_state *state = space->machine().driver_data<atarigen_state>();
1258   atarigen_state *state = space.machine().driver_data<atarigen_state>();
12591259   COMBINE_DATA(&state->m_playfield[offset]);
12601260   state->m_playfield_tilemap->mark_tile_dirty(offset / 2);
12611261}
r17963r17964
12691269
12701270WRITE16_HANDLER( atarigen_playfield_upper_w )
12711271{
1272   atarigen_state *state = space->machine().driver_data<atarigen_state>();
1272   atarigen_state *state = space.machine().driver_data<atarigen_state>();
12731273   COMBINE_DATA(&state->m_playfield_upper[offset]);
12741274   state->m_playfield_tilemap->mark_tile_dirty(offset);
12751275}
r17963r17964
12831283
12841284WRITE16_HANDLER( atarigen_playfield_dual_upper_w )
12851285{
1286   atarigen_state *state = space->machine().driver_data<atarigen_state>();
1286   atarigen_state *state = space.machine().driver_data<atarigen_state>();
12871287   COMBINE_DATA(&state->m_playfield_upper[offset]);
12881288   state->m_playfield_tilemap->mark_tile_dirty(offset);
12891289   state->m_playfield2_tilemap->mark_tile_dirty(offset);
r17963r17964
12991299
13001300WRITE16_HANDLER( atarigen_playfield_latched_lsb_w )
13011301{
1302   atarigen_state *state = space->machine().driver_data<atarigen_state>();
1302   atarigen_state *state = space.machine().driver_data<atarigen_state>();
13031303
13041304   COMBINE_DATA(&state->m_playfield[offset]);
13051305   state->m_playfield_tilemap->mark_tile_dirty(offset);
r17963r17964
13181318
13191319WRITE16_HANDLER( atarigen_playfield_latched_msb_w )
13201320{
1321   atarigen_state *state = space->machine().driver_data<atarigen_state>();
1321   atarigen_state *state = space.machine().driver_data<atarigen_state>();
13221322
13231323   COMBINE_DATA(&state->m_playfield[offset]);
13241324   state->m_playfield_tilemap->mark_tile_dirty(offset);
r17963r17964
13371337
13381338WRITE16_HANDLER( atarigen_playfield2_latched_msb_w )
13391339{
1340   atarigen_state *state = space->machine().driver_data<atarigen_state>();
1340   atarigen_state *state = space.machine().driver_data<atarigen_state>();
13411341
13421342   COMBINE_DATA(&state->m_playfield2[offset]);
13431343   state->m_playfield2_tilemap->mark_tile_dirty(offset);
r17963r17964
13951395
13961396WRITE16_HANDLER( atarigen_666_paletteram_w )
13971397{
1398   atarigen_state *state = space->machine().driver_data<atarigen_state>();
1398   atarigen_state *state = space.machine().driver_data<atarigen_state>();
13991399   int newword, r, g, b;
14001400
14011401   COMBINE_DATA(&state->m_generic_paletteram_16[offset]);
r17963r17964
14051405   g = ((newword >> 4) & 0x3e) | ((newword >> 15) & 1);
14061406   b = ((newword << 1) & 0x3e) | ((newword >> 15) & 1);
14071407
1408   palette_set_color_rgb(space->machine(), offset, pal6bit(r), pal6bit(g), pal6bit(b));
1408   palette_set_color_rgb(space.machine(), offset, pal6bit(r), pal6bit(g), pal6bit(b));
14091409}
14101410
14111411
r17963r17964
14161416
14171417WRITE16_HANDLER( atarigen_expanded_666_paletteram_w )
14181418{
1419   atarigen_state *state = space->machine().driver_data<atarigen_state>();
1419   atarigen_state *state = space.machine().driver_data<atarigen_state>();
14201420   COMBINE_DATA(&state->m_generic_paletteram_16[offset]);
14211421
14221422   if (ACCESSING_BITS_8_15)
r17963r17964
14301430      g = ((newword >> 4) & 0x3e) | ((newword >> 15) & 1);
14311431      b = ((newword << 1) & 0x3e) | ((newword >> 15) & 1);
14321432
1433      palette_set_color_rgb(space->machine(), palentry & 0x1ff, pal6bit(r), pal6bit(g), pal6bit(b));
1433      palette_set_color_rgb(space.machine(), palentry & 0x1ff, pal6bit(r), pal6bit(g), pal6bit(b));
14341434   }
14351435}
14361436
r17963r17964
14411441
14421442WRITE32_HANDLER( atarigen_666_paletteram32_w )
14431443{
1444   atarigen_state *state = space->machine().driver_data<atarigen_state>();
1444   atarigen_state *state = space.machine().driver_data<atarigen_state>();
14451445   int newword, r, g, b;
14461446
14471447   COMBINE_DATA(&state->m_generic_paletteram_32[offset]);
r17963r17964
14541454      g = ((newword >> 4) & 0x3e) | ((newword >> 15) & 1);
14551455      b = ((newword << 1) & 0x3e) | ((newword >> 15) & 1);
14561456
1457      palette_set_color_rgb(space->machine(), offset * 2, pal6bit(r), pal6bit(g), pal6bit(b));
1457      palette_set_color_rgb(space.machine(), offset * 2, pal6bit(r), pal6bit(g), pal6bit(b));
14581458   }
14591459
14601460   if (ACCESSING_BITS_0_15)
r17963r17964
14651465      g = ((newword >> 4) & 0x3e) | ((newword >> 15) & 1);
14661466      b = ((newword << 1) & 0x3e) | ((newword >> 15) & 1);
14671467
1468      palette_set_color_rgb(space->machine(), offset * 2 + 1, pal6bit(r), pal6bit(g), pal6bit(b));
1468      palette_set_color_rgb(space.machine(), offset * 2 + 1, pal6bit(r), pal6bit(g), pal6bit(b));
14691469   }
14701470}
14711471
trunk/src/mame/machine/pgmprot6.c
r17963r17964
106106
107107static READ16_HANDLER( olds_r )
108108{
109   pgm_028_025_state *state = space->machine().driver_data<pgm_028_025_state>();
109   pgm_028_025_state *state = space.machine().driver_data<pgm_028_025_state>();
110110   UINT16 res = 0;
111111
112112   if (offset == 1)
r17963r17964
124124
125125      }
126126   }
127   logerror("%06X: ASIC25 R CMD %X  VAL %X\n", space->device().safe_pc(), state->m_kb_cmd, res);
127   logerror("%06X: ASIC25 R CMD %X  VAL %X\n", space.device().safe_pc(), state->m_kb_cmd, res);
128128   return res;
129129}
130130
131131static WRITE16_HANDLER( olds_w )
132132{
133   pgm_028_025_state *state = space->machine().driver_data<pgm_028_025_state>();
133   pgm_028_025_state *state = space.machine().driver_data<pgm_028_025_state>();
134134   if (offset == 0)
135135      state->m_kb_cmd = data;
136136   else //offset==2
137137   {
138      logerror("%06X: ASIC25 W CMD %X  VAL %X\n",space->device().safe_pc(), state->m_kb_cmd, data);
138      logerror("%06X: ASIC25 W CMD %X  VAL %X\n",space.device().safe_pc(), state->m_kb_cmd, data);
139139      if (state->m_kb_cmd == 0)
140140         state->m_kb_reg = data;
141141      else if(state->m_kb_cmd == 2)   //a bitswap=
r17963r17964
165165                  UINT16 val0 = state->m_sharedprotram[0x3050 / 2];   //CMD_FORMAT
166166                  {
167167                     if ((cmd0 & 0xff) == 0x2)
168                        olds_write_reg(space->machine(), val0, olds_read_reg(space->machine(), val0) + 0x10000);
168                        olds_write_reg(space.machine(), val0, olds_read_reg(space.machine(), val0) + 0x10000);
169169                  }
170170                  break;
171171               }
r17963r17964
184184
185185static READ16_HANDLER( olds_prot_swap_r )
186186{
187   pgm_state *state = space->machine().driver_data<pgm_state>();
188   if (space->device().safe_pc() < 0x100000)      //bios
187   pgm_state *state = space.machine().driver_data<pgm_state>();
188   if (space.device().safe_pc() < 0x100000)      //bios
189189      return state->m_mainram[0x178f4 / 2];
190190   else                  //game
191191      return state->m_mainram[0x178d8 / 2];
trunk/src/mame/machine/archimds.c
r17963r17964
115115/* TODO: what type of DMA this is, burst or cycle steal? Docs doesn't explain it (4 usec is the DRAM refresh). */
116116static TIMER_CALLBACK( vidc_video_tick )
117117{
118   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
118   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
119119   static UINT8 *vram = machine.root_device().memregion("vram")->base();
120120   UINT32 size;
121121
122122   size = vidc_vidend-vidc_vidstart+0x10;
123123
124124   for(vidc_vidcur = 0;vidc_vidcur < size;vidc_vidcur++)
125      vram[vidc_vidcur] = (space->read_byte(vidc_vidstart+vidc_vidcur));
125      vram[vidc_vidcur] = (space.read_byte(vidc_vidstart+vidc_vidcur));
126126
127127   if(video_dma_on)
128      vid_timer->adjust(space->machine().primary_screen->time_until_pos(vidc_regs[0xb4]));
128      vid_timer->adjust(space.machine().primary_screen->time_until_pos(vidc_regs[0xb4]));
129129   else
130130      vid_timer->adjust(attotime::never);
131131}
r17963r17964
133133/* audio DMA */
134134static TIMER_CALLBACK( vidc_audio_tick )
135135{
136   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
136   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
137137   UINT8 ulaw_comp;
138138   INT16 res;
139139   UINT8 ch;
r17963r17964
176176
177177   for(ch=0;ch<8;ch++)
178178   {
179      UINT8 ulaw_temp = (space->read_byte(vidc_sndstart+vidc_sndcur + ch)) ^ 0xff;
179      UINT8 ulaw_temp = (space.read_byte(vidc_sndstart+vidc_sndcur + ch)) ^ 0xff;
180180
181181      ulaw_comp = (ulaw_temp>>1) | ((ulaw_temp&1)<<7);
182182
183183      res = mulawTable[ulaw_comp];
184184
185      space->machine().device<dac_device>(dac_port[ch & 7])->write_signed16(res^0x8000);
185      space.machine().device<dac_device>(dac_port[ch & 7])->write_signed16(res^0x8000);
186186   }
187187
188188   vidc_sndcur+=8;
r17963r17964
196196      {
197197         snd_timer->adjust(attotime::never);
198198         for(ch=0;ch<8;ch++)
199            space->machine().device<dac_device>(dac_port[ch & 7])->write_signed16(0x8000);
199            space.machine().device<dac_device>(dac_port[ch & 7])->write_signed16(0x8000);
200200      }
201201   }
202202}
r17963r17964
289289   {
290290      UINT32 *rom;
291291
292      rom = (UINT32 *)space->machine().root_device().memregion("maincpu")->base();
292      rom = (UINT32 *)space.machine().root_device().memregion("maincpu")->base();
293293
294294      return rom[offset & 0x1fffff];
295295   }
r17963r17964
355355   {
356356      UINT32 *rom;
357357
358      rom = (UINT32 *)space->machine().root_device().memregion("maincpu")->base();
358      rom = (UINT32 *)space.machine().root_device().memregion("maincpu")->base();
359359
360360      return rom[offset & 0x1fffff];
361361   }
r17963r17964
423423void archimedes_driver_init(running_machine &machine)
424424{
425425   archimedes_memc_physmem = reinterpret_cast<UINT32 *>(machine.root_device().memshare("physicalram")->ptr());
426//  address_space *space = machine.device<arm_device>("maincpu")->space(AS_PROGRAM);
427//  space->set_direct_update_handler(direct_update_delegate(FUNC(a310_setopbase), &machine));
426//  address_space &space = *machine.device<arm_device>("maincpu")->space(AS_PROGRAM);
427//  space.set_direct_update_handler(direct_update_delegate(FUNC(a310_setopbase), &machine));
428428}
429429
430430static const char *const ioc_regnames[] =
r17963r17964
474474static READ32_HANDLER( ioc_ctrl_r )
475475{
476476   if(IOC_LOG)
477   logerror("IOC: R %s = %02x (PC=%x) %02x\n", ioc_regnames[offset&0x1f], ioc_regs[offset&0x1f], space->device() .safe_pc( ),offset & 0x1f);
477   logerror("IOC: R %s = %02x (PC=%x) %02x\n", ioc_regnames[offset&0x1f], ioc_regs[offset&0x1f], space.device() .safe_pc( ),offset & 0x1f);
478478
479479   switch (offset & 0x1f)
480480   {
r17963r17964
484484         static UINT8 flyback; //internal name for vblank here
485485         int vert_pos;
486486
487         vert_pos = space->machine().primary_screen->vpos();
487         vert_pos = space.machine().primary_screen->vpos();
488488         flyback = (vert_pos <= vidc_regs[VIDC_VDSR] || vert_pos >= vidc_regs[VIDC_VDER]) ? 0x80 : 0x00;
489489
490         i2c_data = (i2cmem_sda_read(space->machine().device("i2cmem")) & 1);
490         i2c_data = (i2cmem_sda_read(space.machine().device("i2cmem")) & 1);
491491
492492         return (flyback) | (ioc_regs[CONTROL] & 0x7c) | (i2c_clk<<1) | i2c_data;
493493      }
494494
495495      case KART:   // keyboard read
496         archimedes_request_irq_b(space->machine(), ARCHIMEDES_IRQB_KBD_XMIT_EMPTY);
496         archimedes_request_irq_b(space.machine(), ARCHIMEDES_IRQB_KBD_XMIT_EMPTY);
497497         break;
498498
499499      case IRQ_STATUS_A:
r17963r17964
536536      case T3_LATCH_HI: return (ioc_timerout[3]>>8)&0xff;
537537      default:
538538         if(!IOC_LOG)
539            logerror("IOC: R %s = %02x (PC=%x) %02x\n", ioc_regnames[offset&0x1f], ioc_regs[offset&0x1f], space->device() .safe_pc( ),offset & 0x1f);
539            logerror("IOC: R %s = %02x (PC=%x) %02x\n", ioc_regnames[offset&0x1f], ioc_regs[offset&0x1f], space.device() .safe_pc( ),offset & 0x1f);
540540         break;
541541   }
542542
r17963r17964
547547static WRITE32_HANDLER( ioc_ctrl_w )
548548{
549549   if(IOC_LOG)
550   logerror("IOC: W %02x @ reg %s (PC=%x)\n", data&0xff, ioc_regnames[offset&0x1f], space->device() .safe_pc( ));
550   logerror("IOC: W %02x @ reg %s (PC=%x)\n", data&0xff, ioc_regnames[offset&0x1f], space.device() .safe_pc( ));
551551
552552   switch (offset&0x1f)
553553   {
554554      case CONTROL:   // I2C bus control
555555         //logerror("IOC I2C: CLK %d DAT %d\n", (data>>1)&1, data&1);
556         i2cmem_sda_write(space->machine().device("i2cmem"), data & 0x01);
557         i2cmem_scl_write(space->machine().device("i2cmem"), (data & 0x02) >> 1);
556         i2cmem_sda_write(space.machine().device("i2cmem"), data & 0x01);
557         i2cmem_scl_write(space.machine().device("i2cmem"), (data & 0x02) >> 1);
558558         i2c_clk = (data & 2) >> 1;
559559         break;
560560
r17963r17964
571571         ioc_regs[IRQ_MASK_A] = data & 0xff;
572572
573573         if(data & 0x80) //force an IRQ
574            archimedes_request_irq_a(space->machine(),ARCHIMEDES_IRQA_FORCE);
574            archimedes_request_irq_a(space.machine(),ARCHIMEDES_IRQA_FORCE);
575575
576576         if(data & 0x08) //set up the VBLANK timer
577            vbl_timer->adjust(space->machine().primary_screen->time_until_pos(vidc_regs[0xb4]));
577            vbl_timer->adjust(space.machine().primary_screen->time_until_pos(vidc_regs[0xb4]));
578578
579579         break;
580580
r17963r17964
582582         ioc_regs[FIQ_MASK] = data & 0xff;
583583
584584         if(data & 0x80) //force a FIRQ
585            archimedes_request_fiq(space->machine(),ARCHIMEDES_FIQ_FORCE);
585            archimedes_request_fiq(space.machine(),ARCHIMEDES_FIQ_FORCE);
586586
587587         break;
588588
r17963r17964
593593         //if (ioc_regs[IRQ_STATUS_A] == 0)
594594         {
595595            //printf("IRQ clear A\n");
596            space->machine().device("maincpu")->execute().set_input_line(ARM_IRQ_LINE, CLEAR_LINE);
596            space.machine().device("maincpu")->execute().set_input_line(ARM_IRQ_LINE, CLEAR_LINE);
597597         }
598598         break;
599599
r17963r17964
655655
656656      default:
657657         if(!IOC_LOG)
658            logerror("IOC: W %02x @ reg %s (PC=%x)\n", data&0xff, ioc_regnames[offset&0x1f], space->device() .safe_pc( ));
658            logerror("IOC: W %02x @ reg %s (PC=%x)\n", data&0xff, ioc_regnames[offset&0x1f], space.device() .safe_pc( ));
659659
660660         ioc_regs[offset&0x1f] = data & 0xff;
661661         break;
r17963r17964
665665READ32_HANDLER(archimedes_ioc_r)
666666{
667667   UINT32 ioc_addr;
668   device_t *fdc = (device_t *)space->machine().device("wd1772");
668   device_t *fdc = (device_t *)space.machine().device("wd1772");
669669
670670   ioc_addr = offset*4;
671671
r17963r17964
684684            case 1:
685685               if (fdc) {
686686                  logerror("17XX: R @ addr %x mask %08x\n", offset*4, mem_mask);
687                  return wd17xx_data_r(fdc, *space, offset&0xf);
687                  return wd17xx_data_r(fdc, space, offset&0xf);
688688               } else {
689689                  logerror("Read from FDC device?\n");
690690                  return 0;
r17963r17964
721721WRITE32_HANDLER(archimedes_ioc_w)
722722{
723723   UINT32 ioc_addr;
724   device_t *fdc = (device_t *)space->machine().device("wd1772");
724   device_t *fdc = (device_t *)space.machine().device("wd1772");
725725
726726   ioc_addr = offset*4;
727727
r17963r17964
740740            case 1:
741741                  if (fdc) {
742742                     logerror("17XX: %x to addr %x mask %08x\n", data, offset*4, mem_mask);
743                     wd17xx_data_w(fdc, *space, offset&0xf, data&0xff);
743                     wd17xx_data_w(fdc, space, offset&0xf, data&0xff);
744744                  } else {
745745                     logerror("Write to FDC device?\n");
746746                  }
r17963r17964
779779   }
780780
781781
782   logerror("(PC=%08x) I/O: W %x @ %x (mask %08x)\n", space->device().safe_pc(), data, (offset*4)+0x3000000, mem_mask);
782   logerror("(PC=%08x) I/O: W %x @ %x (mask %08x)\n", space.device().safe_pc(), data, (offset*4)+0x3000000, mem_mask);
783783}
784784
785785READ32_HANDLER(archimedes_vidc_r)
r17963r17964
866866      r = (val & 0x000f) >> 0;
867867
868868      if(reg == 0x40 && val & 0xfff)
869         logerror("WARNING: border color write here (PC=%08x)!\n",space->device().safe_pc());
869         logerror("WARNING: border color write here (PC=%08x)!\n",space.device().safe_pc());
870870
871      palette_set_color_rgb(space->machine(), reg >> 2, pal4bit(r), pal4bit(g), pal4bit(b) );
871      palette_set_color_rgb(space.machine(), reg >> 2, pal4bit(r), pal4bit(g), pal4bit(b) );
872872
873873      /* handle 8bpp colors here */
874874      if(reg <= 0x3c)
r17963r17964
881881            g = ((val & 0x030) >> 4) | ((i & 0x20) >> 3) | ((i & 0x40) >> 3);
882882            r = ((val & 0x007) >> 0) | ((i & 0x10) >> 1);
883883
884            palette_set_color_rgb(space->machine(), (reg >> 2) + 0x100 + i, pal4bit(r), pal4bit(g), pal4bit(b) );
884            palette_set_color_rgb(space.machine(), (reg >> 2) + 0x100 + i, pal4bit(r), pal4bit(g), pal4bit(b) );
885885         }
886886      }
887887
r17963r17964
921921      logerror("VIDC: %s = %d\n", vrnames[(reg-0x80)/4], vidc_regs[reg]);
922922      //#endif
923923
924      vidc_dynamic_res_change(space->machine());
924      vidc_dynamic_res_change(space.machine());
925925   }
926926   else if(reg == 0xe0)
927927   {
928928      vidc_bpp_mode = ((val & 0x0c) >> 2);
929929      vidc_interlace = ((val & 0x40) >> 6);
930930      vidc_pixel_clk = (val & 0x03);
931      vidc_dynamic_res_change(space->machine());
931      vidc_dynamic_res_change(space.machine());
932932   }
933933   else
934934   {
r17963r17964
977977
978978         case 6:
979979            vidc_sndcur = 0;
980            archimedes_request_irq_b(space->machine(), ARCHIMEDES_IRQB_SOUND_EMPTY);
980            archimedes_request_irq_b(space.machine(), ARCHIMEDES_IRQB_SOUND_EMPTY);
981981            break;
982982
983983         case 7:   /* Control */
984984            memc_pagesize = ((data>>2) & 3);
985985
986            logerror("(PC = %08x) MEMC: %x to Control (page size %d, %s, %s)\n", space->device().safe_pc(), data & 0x1ffc, page_sizes[memc_pagesize], ((data>>10)&1) ? "Video DMA on" : "Video DMA off", ((data>>11)&1) ? "Sound DMA on" : "Sound DMA off");
986            logerror("(PC = %08x) MEMC: %x to Control (page size %d, %s, %s)\n", space.device().safe_pc(), data & 0x1ffc, page_sizes[memc_pagesize], ((data>>10)&1) ? "Video DMA on" : "Video DMA off", ((data>>11)&1) ? "Sound DMA on" : "Sound DMA off");
987987
988988            video_dma_on = ((data>>10)&1);
989989            audio_dma_on = ((data>>11)&1);
r17963r17964
991991            if ((data>>10)&1)
992992            {
993993               vidc_vidcur = 0;
994               vid_timer->adjust(space->machine().primary_screen->time_until_pos(vidc_regs[0xb4]));
994               vid_timer->adjust(space.machine().primary_screen->time_until_pos(vidc_regs[0xb4]));
995995            }
996996
997997            if ((data>>11)&1)
r17963r17964
10881088   // now go ahead and set the mapping in the page table
10891089   memc_pages[log] = phys + (memc*0x80);
10901090
1091//  printf("PC=%08x = MEMC_PAGE(%d): W %08x: log %x to phys %x, MEMC %d, perms %d\n", space->device().safe_pc(),memc_pagesize, data, log, phys, memc, perms);
1091//  printf("PC=%08x = MEMC_PAGE(%d): W %08x: log %x to phys %x, MEMC %d, perms %d\n", space.device().safe_pc(),memc_pagesize, data, log, phys, memc, perms);
10921092}
10931093
trunk/src/mame/machine/galaxold.c
r17963r17964
319319DRIVER_INIT_MEMBER(galaxold_state,moonqsr)
320320{
321321   offs_t i;
322   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
322   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
323323   UINT8 *rom = machine().root_device().memregion("maincpu")->base();
324324   UINT8 *decrypt = auto_alloc_array(machine(), UINT8, 0x8000);
325325
326   space->set_decrypted_region(0x0000, 0x7fff, decrypt);
326   space.set_decrypted_region(0x0000, 0x7fff, decrypt);
327327
328328   for (i = 0;i < 0x8000;i++)
329329      decrypt[i] = decode_mooncrst(rom[i],i);
r17963r17964
397397
398398DRIVER_INIT_MEMBER(galaxold_state,4in1)
399399{
400   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
400   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
401401   offs_t i, len = memregion("maincpu")->bytes();
402402   UINT8 *RAM = memregion("maincpu")->base();
403403
r17963r17964
408408   /* games are banked at 0x0000 - 0x3fff */
409409   membank("bank1")->configure_entries(0, 4, &RAM[0x10000], 0x4000);
410410
411   _4in1_bank_w(*space, 0, 0); /* set the initial CPU bank */
411   _4in1_bank_w(space, 0, 0); /* set the initial CPU bank */
412412
413413   state_save_register_global(machine(), m__4in1_bank);
414414}
trunk/src/mame/machine/slikshot.c
r17963r17964
411411
412412READ8_HANDLER( slikz80_port_r )
413413{
414   itech8_state *state = space->machine().driver_data<itech8_state>();
414   itech8_state *state = space.machine().driver_data<itech8_state>();
415415   int result = 0;
416416
417417   /* if we have nothing, return 0x03 */
r17963r17964
442442
443443WRITE8_HANDLER( slikz80_port_w )
444444{
445   itech8_state *state = space->machine().driver_data<itech8_state>();
445   itech8_state *state = space.machine().driver_data<itech8_state>();
446446   state->m_z80_port_val = data;
447447   state->m_z80_clear_to_send = 0;
448448}
r17963r17964
457457
458458READ8_HANDLER( slikshot_z80_r )
459459{
460   itech8_state *state = space->machine().driver_data<itech8_state>();
460   itech8_state *state = space.machine().driver_data<itech8_state>();
461461   /* allow the Z80 to send us stuff now */
462462   state->m_z80_clear_to_send = 1;
463463   return state->m_z80_port_val;
r17963r17964
473473
474474READ8_HANDLER( slikshot_z80_control_r )
475475{
476   itech8_state *state = space->machine().driver_data<itech8_state>();
476   itech8_state *state = space.machine().driver_data<itech8_state>();
477477   return state->m_z80_ctrl;
478478}
479479
r17963r17964
513513
514514WRITE8_HANDLER( slikshot_z80_control_w )
515515{
516   space->machine().scheduler().synchronize(FUNC(delayed_z80_control_w), data);
516   space.machine().scheduler().synchronize(FUNC(delayed_z80_control_w), data);
517517}
518518
519519
trunk/src/mame/machine/gaelcrpt.c
r17963r17964
120120
121121
122122
123UINT16 gaelco_decrypt(address_space *space, int offset, int data, int param1, int param2)
123UINT16 gaelco_decrypt(address_space &space, int offset, int data, int param1, int param2)
124124{
125125   static int lastpc, lastoffset, lastencword, lastdecword;
126126
127   int thispc = space->device().safe_pc();
127   int thispc = space.device().safe_pc();
128128//  int savedata = data;
129129
130130   /* check if 2nd half of 32 bit */
r17963r17964
146146
147147      lastdecword = data;
148148
149//      logerror("%s : data1 = %4x > %4x @ %8x\n",space->machine().describe_context(),savedata,data,lastoffset);
149//      logerror("%s : data1 = %4x > %4x @ %8x\n",space.machine().describe_context(),savedata,data,lastoffset);
150150   }
151151   return data;
152152}
trunk/src/mame/machine/williams.c
r17963r17964
456456static void williams2_postload(running_machine &machine)
457457{
458458   williams_state *state = machine.driver_data<williams_state>();
459   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
460   state->williams2_bank_select_w(*space, 0, state->m_vram_bank);
459   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
460   state->williams2_bank_select_w(space, 0, state->m_vram_bank);
461461}
462462
463463
r17963r17964
475475
476476MACHINE_RESET_MEMBER(williams_state,williams2)
477477{
478   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
478   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
479479
480480   /* make sure our banking is reset */
481   williams2_bank_select_w(*space, 0, 0);
481   williams2_bank_select_w(space, 0, 0);
482482
483483   /* set a timer to go off every 16 scanlines, to toggle the VA11 line and update the screen */
484484   timer_device *scan_timer = machine().device<timer_device>("scan_timer");
r17963r17964
759759static void defender_postload(running_machine &machine)
760760{
761761   williams_state *state = machine.driver_data<williams_state>();
762   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
763   state->defender_bank_select_w(*space, 0, state->m_vram_bank);
762   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
763   state->defender_bank_select_w(space, 0, state->m_vram_bank);
764764}
765765
766766
r17963r17964
777777
778778MACHINE_RESET_MEMBER(williams_state,defender)
779779{
780   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
780   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
781781
782782   MACHINE_RESET_CALL_MEMBER(williams_common);
783783
784   defender_bank_select_w(*space, 0, 0);
784   defender_bank_select_w(space, 0, 0);
785785}
786786
787787
r17963r17964
800800   {
801801      /* page 0 is I/O &space */
802802      case 0:
803         defender_install_io_space(&space);
803         defender_install_io_space(space);
804804         break;
805805
806806      /* pages 1-9 map to ROM banks */
trunk/src/mame/machine/cchip.c
r17963r17964
8383   {
8484      cc_port = data;
8585
86      coin_lockout_w(space->machine(), 1, data & 0x08);
87      coin_lockout_w(space->machine(), 0, data & 0x04);
88      coin_counter_w(space->machine(), 1, data & 0x02);
89      coin_counter_w(space->machine(), 0, data & 0x01);
86      coin_lockout_w(space.machine(), 1, data & 0x08);
87      coin_lockout_w(space.machine(), 0, data & 0x04);
88      coin_counter_w(space.machine(), 1, data & 0x02);
89      coin_counter_w(space.machine(), 0, data & 0x01);
9090   }
9191   else
9292   {
93logerror("cchip1_w pc: %06x bank %02x offset %04x: %02x\n",space->device().safe_pc(),current_bank,offset,data);
93logerror("cchip1_w pc: %06x bank %02x offset %04x: %02x\n",space.device().safe_pc(),current_bank,offset,data);
9494   }
9595}
9696
r17963r17964
117117   {
118118      switch (offset)
119119      {
120      case 0x00: return space->machine().root_device().ioport("IN0")->read();    /* Player 1 controls + START1 */
121      case 0x01: return space->machine().root_device().ioport("IN1")->read();    /* Player 2 controls + START2 */
122      case 0x02: return space->machine().root_device().ioport("IN2")->read();    /* COINn + SERVICE1 + TILT */
120      case 0x00: return space.machine().root_device().ioport("IN0")->read();    /* Player 1 controls + START1 */
121      case 0x01: return space.machine().root_device().ioport("IN1")->read();    /* Player 2 controls + START2 */
122      case 0x02: return space.machine().root_device().ioport("IN2")->read();    /* COINn + SERVICE1 + TILT */
123123      case 0x03: return cc_port;
124124      }
125125   }
trunk/src/mame/machine/nb1413m3.c
r17963r17964
209209   int rombank;
210210
211211   /* get top 8 bits of the I/O port address */
212   offset = (offset << 8) | (space->device().state().state_int(Z80_BC) >> 8);
212   offset = (offset << 8) | (space.device().state().state_int(Z80_BC) >> 8);
213213
214214   switch (nb1413m3_type)
215215   {
r17963r17964
296296   popmessage("Sound ROM %02X:%05X [B1:%02X B2:%02X]", rombank, offset, nb1413m3_sndrombank1, nb1413m3_sndrombank2);
297297#endif
298298
299   if (offset < space->machine().root_device().memregion(nb1413m3_sndromrgntag)->bytes())
300      return space->machine().root_device().memregion(nb1413m3_sndromrgntag)->base()[offset];
299   if (offset < space.machine().root_device().memregion(nb1413m3_sndromrgntag)->bytes())
300      return space.machine().root_device().memregion(nb1413m3_sndromrgntag)->base()[offset];
301301   else
302302   {
303303      popmessage("read past sound ROM length (%05x[%02X])",offset, rombank);
r17963r17964
320320
321321READ8_HANDLER( nb1413m3_gfxrom_r )
322322{
323   UINT8 *GFXROM = space->machine().root_device().memregion("gfx1")->base();
323   UINT8 *GFXROM = space.machine().root_device().memregion("gfx1")->base();
324324
325325   return GFXROM[(0x20000 * (nb1413m3_gfxrombank | ((nb1413m3_sndrombank1 & 0x02) << 3))) + ((0x0200 * nb1413m3_gfxradr_h) + (0x0002 * nb1413m3_gfxradr_l)) + (offset & 0x01)];
326326}
r17963r17964
363363
364364READ8_HANDLER( nb1413m3_inputport0_r )
365365{
366   return ((space->machine().root_device().ioport("SYSTEM")->read() & 0xfd) | ((nb1413m3_outcoin_flag & 0x01) << 1));
366   return ((space.machine().root_device().ioport("SYSTEM")->read() & 0xfd) | ((nb1413m3_outcoin_flag & 0x01) << 1));
367367}
368368
369369READ8_HANDLER( nb1413m3_inputport1_r )
370370{
371   device_t &root = space->machine().root_device();
371   device_t &root = space.machine().root_device();
372372   switch (nb1413m3_type)
373373   {
374374      case NB1413M3_HYHOO:
r17963r17964
420420
421421READ8_HANDLER( nb1413m3_inputport2_r )
422422{
423   device_t &root = space->machine().root_device();
423   device_t &root = space.machine().root_device();
424424   switch (nb1413m3_type)
425425   {
426426      case NB1413M3_HYHOO:
r17963r17964
495495
496496READ8_HANDLER( nb1413m3_dipsw1_r )
497497{
498   device_t &root = space->machine().root_device();
498   device_t &root = space.machine().root_device();
499499   switch (nb1413m3_type)
500500   {
501501      case NB1413M3_KANATUEN:
r17963r17964
533533                 ((root.ioport("DSWA")->read() & 0x01) << 4) | ((root.ioport("DSWA")->read() & 0x04) << 3) |
534534                 ((root.ioport("DSWA")->read() & 0x10) << 2) | ((root.ioport("DSWA")->read() & 0x40) << 1));
535535      default:
536         return space->machine().root_device().ioport("DSWA")->read();
536         return space.machine().root_device().ioport("DSWA")->read();
537537   }
538538}
539539
540540READ8_HANDLER( nb1413m3_dipsw2_r )
541541{
542   device_t &root = space->machine().root_device();
542   device_t &root = space.machine().root_device();
543543   switch (nb1413m3_type)
544544   {
545545      case NB1413M3_KANATUEN:
r17963r17964
577577                 ((root.ioport("DSWA")->read() & 0x02) << 3) | ((root.ioport("DSWA")->read() & 0x08) << 2) |
578578                 ((root.ioport("DSWA")->read() & 0x20) << 1) | ((root.ioport("DSWA")->read() & 0x80) << 0));
579579      default:
580         return space->machine().root_device().ioport("DSWB")->read();
580         return space.machine().root_device().ioport("DSWB")->read();
581581   }
582582}
583583
584584READ8_HANDLER( nb1413m3_dipsw3_l_r )
585585{
586   return ((space->machine().root_device().ioport("DSWC")->read() & 0xf0) >> 4);
586   return ((space.machine().root_device().ioport("DSWC")->read() & 0xf0) >> 4);
587587}
588588
589589READ8_HANDLER( nb1413m3_dipsw3_h_r )
590590{
591   return ((space->machine().root_device().ioport("DSWC")->read() & 0x0f) >> 0);
591   return ((space.machine().root_device().ioport("DSWC")->read() & 0x0f) >> 0);
592592}
593593
594594WRITE8_HANDLER( nb1413m3_outcoin_w )
r17963r17964
629629         break;
630630   }
631631
632   set_led_status(space->machine(), 2, nb1413m3_outcoin_flag);      // out coin
632   set_led_status(space.machine(), 2, nb1413m3_outcoin_flag);      // out coin
633633}
634634
635635WRITE8_HANDLER( nb1413m3_vcrctrl_w )
r17963r17964
637637   if (data & 0x08)
638638   {
639639      popmessage(" ** VCR CONTROL ** ");
640      set_led_status(space->machine(), 2, 1);
640      set_led_status(space.machine(), 2, 1);
641641   }
642642   else
643643   {
644      set_led_status(space->machine(), 2, 0);
644      set_led_status(space.machine(), 2, 0);
645645   }
646646}
647647
trunk/src/mame/machine/wrally.c
r17963r17964
2020
2121WRITE16_MEMBER(wrally_state::wrally_vram_w)
2222{
23   data = gaelco_decrypt(&space, offset, data, 0x1f, 0x522a);
23   data = gaelco_decrypt(space, offset, data, 0x1f, 0x522a);
2424   COMBINE_DATA(&m_videoram[offset]);
2525
2626   m_pant[(offset & 0x1fff) >> 12]->mark_tile_dirty(((offset << 1) & 0x1fff) >> 2);
trunk/src/mame/machine/seicop.c
r17963r17964
16071607
16081608static WRITE16_HANDLER( seibu_common_video_regs_w )
16091609{
1610   legionna_state *state = space->machine().driver_data<legionna_state>();
1610   legionna_state *state = space.machine().driver_data<legionna_state>();
16111611   COMBINE_DATA(&seibu_vregs[offset]);
16121612
16131613   switch(offset)
r17963r17964
17491749
17501750READ16_HANDLER( copdxbl_0_r )
17511751{
1752   get_ram(space->machine());
1752   get_ram(space.machine());
17531753   UINT16 retvalue = cop_mcu_ram[offset];
17541754
17551755   switch(offset)
17561756   {
17571757      default:
17581758      {
1759         logerror("%06x: COPX unhandled read returning %04x from offset %04x\n", space->device().safe_pc(), retvalue, offset*2);
1759         logerror("%06x: COPX unhandled read returning %04x from offset %04x\n", space.device().safe_pc(), retvalue, offset*2);
17601760         return retvalue;
17611761      }
17621762
r17963r17964
17651765      //case (0x5b4/2):
17661766      //  return cop_mcu_ram[offset];
17671767
1768      case (0x700/2): return space->machine().root_device().ioport("DSW1")->read();
1769      case (0x704/2):   return space->machine().root_device().ioport("PLAYERS12")->read();
1770      case (0x708/2):   return space->machine().root_device().ioport("PLAYERS34")->read();
1771      case (0x70c/2):   return space->machine().root_device().ioport("SYSTEM")->read();
1772      case (0x71c/2): return space->machine().root_device().ioport("DSW2")->read();
1768      case (0x700/2): return space.machine().root_device().ioport("DSW1")->read();
1769      case (0x704/2):   return space.machine().root_device().ioport("PLAYERS12")->read();
1770      case (0x708/2):   return space.machine().root_device().ioport("PLAYERS34")->read();
1771      case (0x70c/2):   return space.machine().root_device().ioport("SYSTEM")->read();
1772      case (0x71c/2): return space.machine().root_device().ioport("DSW2")->read();
17731773   }
17741774}
17751775
17761776WRITE16_HANDLER( copdxbl_0_w )
17771777{
1778   legionna_state *state = space->machine().driver_data<legionna_state>();
1779   get_ram(space->machine());
1778   legionna_state *state = space.machine().driver_data<legionna_state>();
1779   get_ram(space.machine());
17801780   COMBINE_DATA(&cop_mcu_ram[offset]);
17811781
17821782   switch(offset)
17831783   {
17841784      default:
17851785      {
1786         logerror("%06x: COPX unhandled write data %04x at offset %04x\n", space->device().safe_pc(), data, offset*2);
1786         logerror("%06x: COPX unhandled write data %04x at offset %04x\n", space.device().safe_pc(), data, offset*2);
17871787         break;
17881788      }
17891789
r17963r17964
17991799
18001800      case (0x740/2):
18011801      {
1802         state->soundlatch_byte_w(*space, 0, data & 0xff);
1803         space->machine().device("audiocpu")->execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE );
1802         state->soundlatch_byte_w(space, 0, data & 0xff);
1803         space.machine().device("audiocpu")->execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE );
18041804         break;
18051805      }
18061806   }
r17963r17964
19081908static READ16_HANDLER( generic_cop_r )
19091909{
19101910   UINT16 retvalue;
1911   get_ram(space->machine());
1911   get_ram(space.machine());
19121912   retvalue = cop_mcu_ram[offset];
19131913
19141914
r17963r17964
19521952      case 0x1a2/2:
19531953      case 0x1a4/2:
19541954      case 0x1a6/2:
1955         return space->machine().firstcpu->total_cycles() % (cop_rng_max_value+1);
1955         return space.machine().firstcpu->total_cycles() % (cop_rng_max_value+1);
19561956
19571957      case 0x1b0/2:
19581958         return cop_status;
r17963r17964
19641964         return cop_angle;
19651965
19661966      default:
1967         seibu_cop_log("%06x: COPX unhandled read returning %04x from offset %04x\n", space->device().safe_pc(), retvalue, offset*2);
1967         seibu_cop_log("%06x: COPX unhandled read returning %04x from offset %04x\n", space.device().safe_pc(), retvalue, offset*2);
19681968         return retvalue;
19691969   }
19701970}
r17963r17964
19781978static WRITE16_HANDLER( generic_cop_w )
19791979{
19801980   UINT32 temp32;
1981   get_ram(space->machine());
1981   get_ram(space.machine());
19821982
19831983   switch (offset)
19841984   {
19851985      default:
1986         seibu_cop_log("%06x: COPX unhandled write data %04x at offset %04x\n", space->device().safe_pc(), data, offset*2);
1986         seibu_cop_log("%06x: COPX unhandled write data %04x at offset %04x\n", space.device().safe_pc(), data, offset*2);
19871987         break;
19881988
19891989      /* Sprite DMA */
r17963r17964
20512051         break;
20522052
20532053      /* Command tables for 0x500 / 0x502 commands */
2054      case (0x032/2): { copd2_set_tabledata(space->machine(), data); break; }
2055      case (0x034/2): { copd2_set_tableoffset(space->machine(), data); break; }
2054      case (0x032/2): { copd2_set_tabledata(space.machine(), data); break; }
2055      case (0x034/2): { copd2_set_tableoffset(space.machine(), data); break; }
20562056      case (0x038/2):   { cop_438 = data; break; }
20572057      case (0x03a/2):   { cop_43a = data; break; }
20582058      case (0x03c/2): { cop_43c = data; break; }
r17963r17964
20902090      case (0x078/2): /* DMA source address */
20912091      {
20922092         cop_dma_src[cop_dma_trigger] = data; // << 6 to get actual address
2093         //seibu_cop_log("%06x: COPX set layer clear address to %04x (actual %08x)\n", space->device().safe_pc(), data, data<<6);
2093         //seibu_cop_log("%06x: COPX set layer clear address to %04x (actual %08x)\n", space.device().safe_pc(), data, data<<6);
20942094         break;
20952095      }
20962096
20972097      case (0x07a/2): /* DMA length */
20982098      {
20992099         cop_dma_size[cop_dma_trigger] = data;
2100         //seibu_cop_log("%06x: COPX set layer clear length to %04x (actual %08x)\n", space->device().safe_pc(), data, data<<5);
2100         //seibu_cop_log("%06x: COPX set layer clear length to %04x (actual %08x)\n", space.device().safe_pc(), data, data<<5);
21012101         break;
21022102      }
21032103
21042104      case (0x07c/2): /* DMA destination */
21052105      {
21062106         cop_dma_dst[cop_dma_trigger] = data;
2107         //seibu_cop_log("%06x: COPX set layer clear value to %04x (actual %08x)\n", space->device().safe_pc(), data, data<<6);
2107         //seibu_cop_log("%06x: COPX set layer clear value to %04x (actual %08x)\n", space.device().safe_pc(), data, data<<6);
21082108         break;
21092109      }
21102110
21112111      case (0x07e/2): /* DMA parameter */
21122112      {
21132113         cop_dma_trigger = data;
2114         //seibu_cop_log("%06x: COPX set layer clear trigger? to %04x\n", space->device().safe_pc(), data);
2114         //seibu_cop_log("%06x: COPX set layer clear trigger? to %04x\n", space.device().safe_pc(), data);
21152115         if (data>=0x1ff)
21162116         {
21172117            seibu_cop_log("invalid DMA trigger!, >0x1ff\n");
r17963r17964
21612161         int command;
21622162
21632163         #if LOG_CMDS
2164         seibu_cop_log("%06x: COPX execute table macro command %04x %04x | regs %08x %08x %08x %08x %08x\n", space->device().safe_pc(), data, cop_mcu_ram[offset], cop_register[0], cop_register[1], cop_register[2], cop_register[3], cop_register[4]);
2164         seibu_cop_log("%06x: COPX execute table macro command %04x %04x | regs %08x %08x %08x %08x %08x\n", space.device().safe_pc(), data, cop_mcu_ram[offset], cop_register[0], cop_register[1], cop_register[2], cop_register[3], cop_register[4]);
21652165         #endif
21662166
21672167         command = -1;
r17963r17964
22302230
22312231            /* TODO: 0x1c operation? */
22322232
2233            space->write_dword(cop_register[0] + 0x04 + offs, space->read_dword(cop_register[0] + 0x04 + offs) + space->read_dword(cop_register[0] + 0x10 + offs));
2233            space.write_dword(cop_register[0] + 0x04 + offs, space.read_dword(cop_register[0] + 0x04 + offs) + space.read_dword(cop_register[0] + 0x10 + offs));
22342234            return;
22352235         }
22362236
r17963r17964
22452245            /* add 0x10 + offs */
22462246            /* write 0x10 + offs */
22472247
2248            space->write_dword(cop_register[0] + 0x10 + offs, space->read_dword(cop_register[0] + 0x10 + offs) + space->read_dword(cop_register[0] + 0x28 + offs));
2248            space.write_dword(cop_register[0] + 0x10 + offs, space.read_dword(cop_register[0] + 0x10 + offs) + space.read_dword(cop_register[0] + 0x28 + offs));
22492249            return;
22502250         }
22512251
r17963r17964
22632263            */
22642264         if(COP_CMD(0xb9a,0xb88,0x888,0x000,0x000,0x000,0x000,0x000,7,0xfdfb))
22652265         {
2266            int raw_angle = (space->read_word(cop_register[0]+(0x34^2)) & 0xff);
2266            int raw_angle = (space.read_word(cop_register[0]+(0x34^2)) & 0xff);
22672267            double angle = raw_angle * M_PI / 128;
2268            double amp = (65536 >> 5)*(space->read_word(cop_register[0]+(0x36^2)) & 0xff);
2268            double amp = (65536 >> 5)*(space.read_word(cop_register[0]+(0x36^2)) & 0xff);
22692269            int res;
22702270
22712271            /* TODO: up direction, why? */
r17963r17964
22742274
22752275            res = int(amp*sin(angle)) << cop_scale;
22762276
2277            space->write_dword(cop_register[0] + 0x10, res);
2277            space.write_dword(cop_register[0] + 0x10, res);
22782278            return;
22792279         }
22802280
r17963r17964
22922292            */
22932293         if(COP_CMD(0xb9a,0xb8a,0x88a,0x000,0x000,0x000,0x000,0x000,7,0xfdfb))
22942294         {
2295            int raw_angle = (space->read_word(cop_register[0]+(0x34^2)) & 0xff);
2295            int raw_angle = (space.read_word(cop_register[0]+(0x34^2)) & 0xff);
22962296            double angle = raw_angle * M_PI / 128;
2297            double amp = (65536 >> 5)*(space->read_word(cop_register[0]+(0x36^2)) & 0xff);
2297            double amp = (65536 >> 5)*(space.read_word(cop_register[0]+(0x36^2)) & 0xff);
22982298            int res;
22992299
23002300            /* TODO: left direction, why? */
r17963r17964
23032303
23042304            res = int(amp*cos(angle)) << cop_scale;
23052305
2306            space->write_dword(cop_register[0] + 20, res);
2306            space.write_dword(cop_register[0] + 20, res);
23072307            return;
23082308         }
23092309
23102310         /* 0x130e / 0x138e */
23112311         if(COP_CMD(0x984,0xaa4,0xd82,0xaa2,0x39b,0xb9a,0xb9a,0xa9a,5,0xbf7f))
23122312         {
2313            int dy = space->read_dword(cop_register[1]+4) - space->read_dword(cop_register[0]+4);
2314            int dx = space->read_dword(cop_register[1]+8) - space->read_dword(cop_register[0]+8);
2313            int dy = space.read_dword(cop_register[1]+4) - space.read_dword(cop_register[0]+4);
2314            int dx = space.read_dword(cop_register[1]+8) - space.read_dword(cop_register[0]+8);
23152315
23162316            cop_status = 7;
23172317            if(!dx) {
r17963r17964
23262326            //printf("%d %d %f %04x\n",dx,dy,atan(double(dy)/double(dx)) * 128 / M_PI,cop_angle);
23272327
23282328            if(cop_mcu_ram[offset] & 0x80)
2329               space->write_word(cop_register[0]+(0x34^2), cop_angle);
2329               space.write_word(cop_register[0]+(0x34^2), cop_angle);
23302330            return;
23312331         }
23322332
r17963r17964
23342334         //(heatbrl)  | 5 | bf7f | 138e | 984 aa4 d82 aa2 39b b9a b9a b9a
23352335         if(COP_CMD(0x984,0xaa4,0xd82,0xaa2,0x39b,0xb9a,0xb9a,0xb9a,5,0xbf7f))
23362336         {
2337            int dy = space->read_dword(cop_register[1]+4) - space->read_dword(cop_register[0]+4);
2338            int dx = space->read_dword(cop_register[1]+8) - space->read_dword(cop_register[0]+8);
2337            int dy = space.read_dword(cop_register[1]+4) - space.read_dword(cop_register[0]+4);
2338            int dx = space.read_dword(cop_register[1]+8) - space.read_dword(cop_register[0]+8);
23392339
23402340            cop_status = 7;
23412341            if(!dx) {
r17963r17964
23512351            r1 = dx;
23522352
23532353            if(cop_mcu_ram[offset] & 0x80)
2354               space->write_word(cop_register[0]+(0x34^2), cop_angle);
2354               space.write_word(cop_register[0]+(0x34^2), cop_angle);
23552355            return;
23562356         }
23572357
r17963r17964
23732373            cop_dist = sqrt((double)(dx*dx+dy*dy));
23742374
23752375            if(cop_mcu_ram[offset] & 0x80)
2376               space->write_word(cop_register[0]+(0x38^2), cop_dist);
2376               space.write_word(cop_register[0]+(0x38^2), cop_dist);
23772377            return;
23782378         }
23792379
r17963r17964
23912391            /* TODO: this is WRONG! */
23922392         if(COP_CMD(0xf9a,0xb9a,0xb9c,0xb9c,0xb9c,0x29c,0x000,0x000,5,0xfcdd))
23932393         {
2394            int div = space->read_word(cop_register[0]+(0x36^2));
2394            int div = space.read_word(cop_register[0]+(0x36^2));
23952395            int res;
23962396
23972397            if(!div)
r17963r17964
24002400               div = 1;
24012401            }
24022402
2403            res = space->read_word(cop_register[0]+(0x38^2)) / div;
2403            res = space.read_word(cop_register[0]+(0x38^2)) / div;
24042404            res <<= cop_scale + 2; /* TODO: check this */
24052405
2406            space->write_word(cop_register[0]+(0x38^2), res);
2406            space.write_word(cop_register[0]+(0x38^2), res);
24072407            return;
24082408         }
24092409
24102410         /*
24112411                collision detection:
24122412
2413                int dy_0 = space->read_dword(cop_register[0]+4);
2414                int dx_0 = space->read_dword(cop_register[0]+8);
2415                int dy_1 = space->read_dword(cop_register[1]+4);
2416                int dx_1 = space->read_dword(cop_register[1]+8);
2417                int hitbox_param1 = space->read_dword(cop_register[2]);
2418                int hitbox_param2 = space->read_dword(cop_register[3]);
2413                int dy_0 = space.read_dword(cop_register[0]+4);
2414                int dx_0 = space.read_dword(cop_register[0]+8);
2415                int dy_1 = space.read_dword(cop_register[1]+4);
2416                int dx_1 = space.read_dword(cop_register[1]+8);
2417                int hitbox_param1 = space.read_dword(cop_register[2]);
2418                int hitbox_param2 = space.read_dword(cop_register[3]);
24192419
24202420                TODO: we are ignoring the u1 / u2 params for now
24212421            */
24222422
24232423         if(COP_CMD(0xb80,0xb82,0xb84,0xb86,0x000,0x000,0x000,0x000,u1,u2))
24242424         {
2425            cop_collision_info[0].y = (space->read_dword(cop_register[0]+4));
2426            cop_collision_info[0].x = (space->read_dword(cop_register[0]+8));
2425            cop_collision_info[0].y = (space.read_dword(cop_register[0]+4));
2426            cop_collision_info[0].x = (space.read_dword(cop_register[0]+8));
24272427            return;
24282428         }
24292429
24302430         //(heatbrl)  | 9 | ffff | b080 | b40 bc0 bc2
24312431         if(COP_CMD(0xb40,0xbc0,0xbc2,0x000,0x000,0x000,0x000,0x000,u1,u2))
24322432         {
2433            cop_collision_info[0].hitbox = space->read_word(cop_register[2]);
2434            cop_collision_info[0].hitbox_y = space->read_word((cop_register[2]&0xffff0000)|(cop_collision_info[0].hitbox));
2435            cop_collision_info[0].hitbox_x = space->read_word(((cop_register[2]&0xffff0000)|(cop_collision_info[0].hitbox))+2);
2433            cop_collision_info[0].hitbox = space.read_word(cop_register[2]);
2434            cop_collision_info[0].hitbox_y = space.read_word((cop_register[2]&0xffff0000)|(cop_collision_info[0].hitbox));
2435            cop_collision_info[0].hitbox_x = space.read_word(((cop_register[2]&0xffff0000)|(cop_collision_info[0].hitbox))+2);
24362436
24372437            /* do the math */
24382438            cop_take_hit_box_params(0);
2439            cop_hit_status = cop_calculate_collsion_detection(space->machine());
2439            cop_hit_status = cop_calculate_collsion_detection(space.machine());
24402440
24412441            return;
24422442         }
24432443
24442444         if(COP_CMD(0xba0,0xba2,0xba4,0xba6,0x000,0x000,0x000,0x000,u1,u2))
24452445         {
2446            cop_collision_info[1].y = (space->read_dword(cop_register[1]+4));
2447            cop_collision_info[1].x = (space->read_dword(cop_register[1]+8));
2446            cop_collision_info[1].y = (space.read_dword(cop_register[1]+4));
2447            cop_collision_info[1].x = (space.read_dword(cop_register[1]+8));
24482448            return;
24492449         }
24502450
24512451         //(heatbrl)  | 6 | ffff | b880 | b60 be0 be2
24522452         if(COP_CMD(0xb60,0xbe0,0xbe2,0x000,0x000,0x000,0x000,0x000,u1,u2))
24532453         {
2454            cop_collision_info[1].hitbox = space->read_word(cop_register[3]);
2455            cop_collision_info[1].hitbox_y = space->read_word((cop_register[3]&0xffff0000)|(cop_collision_info[1].hitbox));
2456            cop_collision_info[1].hitbox_x = space->read_word(((cop_register[3]&0xffff0000)|(cop_collision_info[1].hitbox))+2);
2454            cop_collision_info[1].hitbox = space.read_word(cop_register[3]);
2455            cop_collision_info[1].hitbox_y = space.read_word((cop_register[3]&0xffff0000)|(cop_collision_info[1].hitbox));
2456            cop_collision_info[1].hitbox_x = space.read_word(((cop_register[3]&0xffff0000)|(cop_collision_info[1].hitbox))+2);
24572457
24582458            /* do the math */
24592459            cop_take_hit_box_params(1);
2460            cop_hit_status = cop_calculate_collsion_detection(space->machine());
2460            cop_hit_status = cop_calculate_collsion_detection(space.machine());
24612461            return;
24622462         }
24632463
r17963r17964
24702470            offs = (offset & 3) * 4;
24712471
24722472            /* TODO: I really suspect that following two are actually taken from the 0xa180 macro command then internally loaded */
2473            abs_x = space->read_word(cop_register[0] + 8) - cop_sprite_dma_abs_x;
2474            abs_y = space->read_word(cop_register[0] + 4) - cop_sprite_dma_abs_y;
2475            rel_xy = space->read_word(cop_sprite_dma_src + 4 + offs);
2473            abs_x = space.read_word(cop_register[0] + 8) - cop_sprite_dma_abs_x;
2474            abs_y = space.read_word(cop_register[0] + 4) - cop_sprite_dma_abs_y;
2475            rel_xy = space.read_word(cop_sprite_dma_src + 4 + offs);
24762476
24772477            //if(rel_xy & 0x0706)
24782478            //  printf("sprite rel_xy = %04x\n",rel_xy);
24792479
24802480            if(rel_xy & 1)
2481               space->write_word(cop_register[4] + offs + 4,0xc0 + abs_x - (rel_xy & 0xf8));
2481               space.write_word(cop_register[4] + offs + 4,0xc0 + abs_x - (rel_xy & 0xf8));
24822482            else
2483               space->write_word(cop_register[4] + offs + 4,(((rel_xy & 0x78) + (abs_x) - ((rel_xy & 0x80) ? 0x80 : 0))));
2483               space.write_word(cop_register[4] + offs + 4,(((rel_xy & 0x78) + (abs_x) - ((rel_xy & 0x80) ? 0x80 : 0))));
24842484
2485            space->write_word(cop_register[4] + offs + 6,(((rel_xy & 0x7800) >> 8) + (abs_y) - ((rel_xy & 0x8000) ? 0x80 : 0)));
2485            space.write_word(cop_register[4] + offs + 6,(((rel_xy & 0x7800) >> 8) + (abs_y) - ((rel_xy & 0x8000) ? 0x80 : 0)));
24862486            return;
24872487         }
24882488
r17963r17964
24932493
24942494            offs = (offset & 3) * 4;
24952495
2496            space->write_word(cop_register[4] + offs + 0,space->read_word(cop_sprite_dma_src + offs) + (cop_sprite_dma_param & 0x3f));
2497            //space->write_word(cop_register[4] + offs + 2,space->read_word(cop_sprite_dma_src+2 + offs));
2496            space.write_word(cop_register[4] + offs + 0,space.read_word(cop_sprite_dma_src + offs) + (cop_sprite_dma_param & 0x3f));
2497            //space.write_word(cop_register[4] + offs + 2,space.read_word(cop_sprite_dma_src+2 + offs));
24982498            return;
24992499         }
25002500
r17963r17964
25182518
25192519            offs = (offset & 3) * 4;
25202520
2521            div = space->read_word(cop_register[4] + offs) + 1;
2522//              offs_val = space->read_word(cop_register[3] + offs);
2521            div = space.read_word(cop_register[4] + offs) + 1;
2522//              offs_val = space.read_word(cop_register[3] + offs);
25232523            //420 / 180 = 500 : 400 = 30 / 50 = 98 / 18
25242524
25252525            if(div == 0) { div = 1; }
25262526
2527            space->write_word((cop_register[6] + offs + 4), ((space->read_word(cop_register[5] + offs + 4)) / div));
2527            space.write_word((cop_register[6] + offs + 4), ((space.read_word(cop_register[5] + offs + 4)) / div));
25282528            return;
25292529         }
25302530
r17963r17964
25392539            /* 0 [1] */
25402540            /* 0xc [1] */
25412541
2542            cur_angle = space->read_byte(cop_register[1] + (0xc ^ 3));
2543            space->write_byte(cop_register[1] + (0^3),space->read_byte(cop_register[1] + (0^3)) & 0xfb); //correct?
2542            cur_angle = space.read_byte(cop_register[1] + (0xc ^ 3));
2543            space.write_byte(cop_register[1] + (0^3),space.read_byte(cop_register[1] + (0^3)) & 0xfb); //correct?
25442544
25452545            if(cur_angle >= cop_angle_compare)
25462546            {
r17963r17964
25482548               if(cur_angle <= cop_angle_compare)
25492549               {
25502550                  cur_angle = cop_angle_compare;
2551                  space->write_byte(cop_register[1] + (0^3),space->read_byte(cop_register[1] + (0^3)) | 2);
2551                  space.write_byte(cop_register[1] + (0^3),space.read_byte(cop_register[1] + (0^3)) | 2);
25522552               }
25532553            }
25542554            else if(cur_angle <= cop_angle_compare)
r17963r17964
25572557               if(cur_angle >= cop_angle_compare)
25582558               {
25592559                  cur_angle = cop_angle_compare;
2560                  space->write_byte(cop_register[1] + (0^3),space->read_byte(cop_register[1] + (0^3)) | 2);
2560                  space.write_byte(cop_register[1] + (0^3),space.read_byte(cop_register[1] + (0^3)) | 2);
25612561               }
25622562            }
25632563
2564            space->write_byte(cop_register[1] + (0xc ^ 3),cur_angle);
2564            space.write_byte(cop_register[1] + (0xc ^ 3),cur_angle);
25652565            return;
25662566         }
25672567
r17963r17964
25722572         {
25732573            INT8 cur_angle;
25742574
2575            cur_angle = space->read_byte(cop_register[0] + (0x34 ^ 3));
2576            //space->write_byte(cop_register[0] + (0^3),space->read_byte(cop_register[0] + (0^3)) & 0xfb); //correct?
2575            cur_angle = space.read_byte(cop_register[0] + (0x34 ^ 3));
2576            //space.write_byte(cop_register[0] + (0^3),space.read_byte(cop_register[0] + (0^3)) & 0xfb); //correct?
25772577
25782578            if(cur_angle >= cop_angle_compare)
25792579            {
r17963r17964
25822582               if(cur_angle <= cop_angle_compare)
25832583               {
25842584                  cur_angle = cop_angle_compare;
2585                  //space->write_byte(cop_register[0] + (0^3),space->read_byte(cop_register[0] + (0^3)) | 2);
2585                  //space.write_byte(cop_register[0] + (0^3),space.read_byte(cop_register[0] + (0^3)) | 2);
25862586               }
25872587            }
25882588            else if(cur_angle <= cop_angle_compare)
r17963r17964
25922592               if(cur_angle >= cop_angle_compare)
25932593               {
25942594                  cur_angle = cop_angle_compare;
2595                  //space->write_byte(cop_register[0] + (0^3),space->read_byte(cop_register[0] + (0^3)) | 2);
2595                  //space.write_byte(cop_register[0] + (0^3),space.read_byte(cop_register[0] + (0^3)) | 2);
25962596               }
25972597            }
25982598
2599            space->write_byte(cop_register[0] + (0x34 ^ 3),cur_angle);
2599            space.write_byte(cop_register[0] + (0x34 ^ 3),cur_angle);
26002600            return;
26012601         }
26022602
r17963r17964
26072607      /* DMA go register */
26082608      case (0x2fc/2):
26092609      {
2610         //seibu_cop_log("%06x: COPX execute current layer clear??? %04x\n", space->device().safe_pc(), data);
2610         //seibu_cop_log("%06x: COPX execute current layer clear??? %04x\n", space.device().safe_pc(), data);
26112611
26122612         if (cop_dma_trigger >= 0x80 && cop_dma_trigger <= 0x87)
26132613         {
r17963r17964
26422642
26432643               if(pal_brightness_mode == 5)
26442644               {
2645                  bt = ((space->read_word(src + (cop_dma_fade_table * 0x400))) & 0x7c00) >> 5;
2645                  bt = ((space.read_word(src + (cop_dma_fade_table * 0x400))) & 0x7c00) >> 5;
26462646                  bt = fade_table(bt|(pal_brightness_val ^ 0));
2647                  b = ((space->read_word(src)) & 0x7c00) >> 5;
2647                  b = ((space.read_word(src)) & 0x7c00) >> 5;
26482648                  b = fade_table(b|(pal_brightness_val ^ 0x1f));
26492649                  pal_val = ((b + bt) & 0x1f) << 10;
2650                  gt = ((space->read_word(src + (cop_dma_fade_table * 0x400))) & 0x03e0);
2650                  gt = ((space.read_word(src + (cop_dma_fade_table * 0x400))) & 0x03e0);
26512651                  gt = fade_table(gt|(pal_brightness_val ^ 0));
2652                  g = ((space->read_word(src)) & 0x03e0);
2652                  g = ((space.read_word(src)) & 0x03e0);
26532653                  g = fade_table(g|(pal_brightness_val ^ 0x1f));
26542654                  pal_val |= ((g + gt) & 0x1f) << 5;
2655                  rt = ((space->read_word(src + (cop_dma_fade_table * 0x400))) & 0x001f) << 5;
2655                  rt = ((space.read_word(src + (cop_dma_fade_table * 0x400))) & 0x001f) << 5;
26562656                  rt = fade_table(rt|(pal_brightness_val ^ 0));
2657                  r = ((space->read_word(src)) & 0x001f) << 5;
2657                  r = ((space.read_word(src)) & 0x001f) << 5;
26582658                  r = fade_table(r|(pal_brightness_val ^ 0x1f));
26592659                  pal_val |= ((r + rt) & 0x1f);
26602660               }
26612661               else if(pal_brightness_mode == 4) //Denjin Makai
26622662               {
2663                  bt =(space->read_word(src + (cop_dma_fade_table * 0x400)) & 0x7c00) >> 10;
2664                  b = (space->read_word(src) & 0x7c00) >> 10;
2665                  gt =(space->read_word(src + (cop_dma_fade_table * 0x400)) & 0x03e0) >> 5;
2666                  g = (space->read_word(src) & 0x03e0) >> 5;
2667                  rt =(space->read_word(src + (cop_dma_fade_table * 0x400)) & 0x001f) >> 0;
2668                  r = (space->read_word(src) & 0x001f) >> 0;
2663                  bt =(space.read_word(src + (cop_dma_fade_table * 0x400)) & 0x7c00) >> 10;
2664                  b = (space.read_word(src) & 0x7c00) >> 10;
2665                  gt =(space.read_word(src + (cop_dma_fade_table * 0x400)) & 0x03e0) >> 5;
2666                  g = (space.read_word(src) & 0x03e0) >> 5;
2667                  rt =(space.read_word(src + (cop_dma_fade_table * 0x400)) & 0x001f) >> 0;
2668                  r = (space.read_word(src) & 0x001f) >> 0;
26692669
26702670                  if(pal_brightness_val == 0x10)
26712671                     pal_val = bt << 10 | gt << 5 | rt << 0;
r17963r17964
26872687               else
26882688               {
26892689                  printf("Warning: palette DMA used with mode %02x!\n",pal_brightness_mode);
2690                  pal_val = space->read_word(src);
2690                  pal_val = space.read_word(src);
26912691               }
26922692
2693               space->write_word(dst, pal_val);
2693               space.write_word(dst, pal_val);
26942694               src+=2;
26952695               dst+=2;
26962696            }
r17963r17964
27092709
27102710            for(i = 0;i < size;i++)
27112711            {
2712               space->write_word(dst, space->read_word(src));
2712               space.write_word(dst, space.read_word(src));
27132713               src+=2;
27142714               dst+=2;
27152715            }
r17963r17964
27322732
27332733            for (i=address;i<address+length;i+=4)
27342734            {
2735               space->write_dword(i, fill_val);
2735               space.write_dword(i, fill_val);
27362736            }
27372737
27382738            return;
r17963r17964
27522752
27532753            for (i=address;i<address+length;i+=4)
27542754            {
2755               space->write_dword(i, fill_val);
2755               space.write_dword(i, fill_val);
27562756            }
27572757
27582758            return;
r17963r17964
27902790            {
27912791               for(j=i-2;j<sort_size;j+=2)
27922792               {
2793                  addri = cop_sort_ram_addr+space->read_word(cop_sort_lookup+i);
2794                  addrj = cop_sort_ram_addr+space->read_word(cop_sort_lookup+j);
2793                  addri = cop_sort_ram_addr+space.read_word(cop_sort_lookup+i);
2794                  addrj = cop_sort_ram_addr+space.read_word(cop_sort_lookup+j);
27952795
2796                  vali = space->read_word(addri);
2797                  valj = space->read_word(addrj);
2796                  vali = space.read_word(addri);
2797                  valj = space.read_word(addrj);
27982798
27992799                  //printf("%08x %08x %04x %04x\n",addri,addrj,vali,valj);
28002800
r17963r17964
28092809                  {
28102810                     UINT16 xch_val;
28112811
2812                     xch_val = space->read_word(cop_sort_lookup+i);
2813                     space->write_word(cop_sort_lookup+i,space->read_word(cop_sort_lookup+j));
2814                     space->write_word(cop_sort_lookup+j,xch_val);
2812                     xch_val = space.read_word(cop_sort_lookup+i);
2813                     space.write_word(cop_sort_lookup+i,space.read_word(cop_sort_lookup+j));
2814                     space.write_word(cop_sort_lookup+j,xch_val);
28152815                  }
28162816               }
28172817            }
r17963r17964
28362836   {
28372837      static const char *const portnames[] = { "DSW1", "PLAYERS12", "PLAYERS34", "SYSTEM" };
28382838
2839      return space->machine().root_device().ioport(portnames[(offset >> 1) & 3])->read();
2839      return space.machine().root_device().ioport(portnames[(offset >> 1) & 3])->read();
28402840   }
28412841
28422842   return generic_cop_r(space, offset, mem_mask);
r17963r17964
28442844
28452845WRITE16_HANDLER( heatbrl_mcu_w )
28462846{
2847   get_ram(space->machine());
2847   get_ram(space.machine());
28482848   COMBINE_DATA(&cop_mcu_ram[offset]);
28492849
28502850   /* external pin register, used for banking */
28512851   if(offset == 0x070/2)
28522852   {
2853      heatbrl_setgfxbank(space->machine(), cop_mcu_ram[offset]);
2853      heatbrl_setgfxbank(space.machine(), cop_mcu_ram[offset]);
28542854      return;
28552855   }
28562856
r17963r17964
28872887   {
28882888      static const char *const portnames[] = { "DSW1", "PLAYERS12", "PLAYERS34", "SYSTEM" };
28892889
2890      return space->machine().root_device().ioport(portnames[(offset >> 1) & 3])->read();
2890      return space.machine().root_device().ioport(portnames[(offset >> 1) & 3])->read();
28912891   }
28922892
28932893   if(offset == 0x35c/2)
28942894   {
2895      return space->machine().root_device().ioport("DSW2")->read();
2895      return space.machine().root_device().ioport("DSW2")->read();
28962896   }
28972897
28982898   return generic_cop_r(space, offset, mem_mask);
r17963r17964
29002900
29012901WRITE16_HANDLER( cupsoc_mcu_w )
29022902{
2903   get_ram(space->machine());
2903   get_ram(space.machine());
29042904   COMBINE_DATA(&cop_mcu_ram[offset]);
29052905
29062906   if(offset == 0x280/2) //irq ack / sprite buffering?
r17963r17964
29302930   {
29312931      static const char *const portnames[] = { "DSW1", "PLAYERS12", "PLAYERS34", "SYSTEM" };
29322932
2933      return space->machine().root_device().ioport(portnames[(offset >> 1) & 3])->read();
2933      return space.machine().root_device().ioport(portnames[(offset >> 1) & 3])->read();
29342934   }
29352935
29362936   if(offset == 0x31c/2)
29372937   {
2938      return space->machine().root_device().ioport("DSW2")->read();
2938      return space.machine().root_device().ioport("DSW2")->read();
29392939   }
29402940
29412941   return generic_cop_r(space, offset, mem_mask);
r17963r17964
29432943
29442944WRITE16_HANDLER( cupsocs_mcu_w )
29452945{
2946   get_ram(space->machine());
2946   get_ram(space.machine());
29472947   COMBINE_DATA(&cop_mcu_ram[offset]);
29482948
29492949   if(offset == 0x280/2) //irq ack / sprite buffering?
r17963r17964
29832983   {
29842984      static const char *const portnames[] = { "DSW1", "PLAYERS12", "PLAYERS34", "SYSTEM" };
29852985
2986      return space->machine().root_device().ioport(portnames[(offset >> 1) & 3])->read();
2986      return space.machine().root_device().ioport(portnames[(offset >> 1) & 3])->read();
29872987   }
29882988
29892989   return generic_cop_r(space, offset, mem_mask);
r17963r17964
29912991
29922992WRITE16_HANDLER( godzilla_mcu_w )
29932993{
2994   get_ram(space->machine());
2994   get_ram(space.machine());
29952995   COMBINE_DATA(&cop_mcu_ram[offset]);
29962996
29972997   if(offset == 0x070/2)
29982998   {
2999      denjinmk_setgfxbank(space->machine(), cop_mcu_ram[offset]);
2999      denjinmk_setgfxbank(space.machine(), cop_mcu_ram[offset]);
30003000      return;
30013001   }
30023002
r17963r17964
30313031   {
30323032      static const char *const portnames[] = { "DSW1", "PLAYERS12", "PLAYERS34", "SYSTEM" };
30333033
3034      return space->machine().root_device().ioport(portnames[(offset >> 1) & 3])->read();
3034      return space.machine().root_device().ioport(portnames[(offset >> 1) & 3])->read();
30353035   }
30363036
30373037   if(offset == 0x35c/2)
30383038   {
3039      return space->machine().root_device().ioport("DSW2")->read();
3039      return space.machine().root_device().ioport("DSW2")->read();
30403040   }
30413041
30423042   return generic_cop_r(space, offset, mem_mask);
r17963r17964
30443044
30453045WRITE16_HANDLER( denjinmk_mcu_w )
30463046{
3047   get_ram(space->machine());
3047   get_ram(space.machine());
30483048   COMBINE_DATA(&cop_mcu_ram[offset]);
30493049
30503050   if(offset == 0x280/2) //irq ack / sprite buffering?
r17963r17964
30523052
30533053   if(offset == 0x070/2)
30543054   {
3055      denjinmk_setgfxbank(space->machine(), cop_mcu_ram[offset]);
3055      denjinmk_setgfxbank(space.machine(), cop_mcu_ram[offset]);
30563056      return;
30573057   }
30583058
r17963r17964
30843084   {
30853085      static const char *const portnames[] = { "DSW1", "PLAYERS12", "PLAYERS34", "SYSTEM" };
30863086
3087      return space->machine().root_device().ioport(portnames[(offset >> 1) & 3])->read();
3087      return space.machine().root_device().ioport(portnames[(offset >> 1) & 3])->read();
30883088   }
30893089
30903090   if(offset == 0x35c/2)
30913091   {
3092      return space->machine().root_device().ioport("DSW2")->read();
3092      return space.machine().root_device().ioport("DSW2")->read();
30933093   }
30943094
30953095   return generic_cop_r(space, offset, mem_mask);
r17963r17964
30983098
30993099WRITE16_HANDLER( grainbow_mcu_w )
31003100{
3101   get_ram(space->machine());
3101   get_ram(space.machine());
31023102   COMBINE_DATA(&cop_mcu_ram[offset]);
31033103
31043104   if(offset == 0x280/2) //irq ack / sprite buffering?
r17963r17964
31333133   {
31343134      static const char *const portnames[] = { "DSW1", "PLAYERS12", "UNK", "SYSTEM" };
31353135
3136      return space->machine().root_device().ioport(portnames[(offset >> 1) & 3])->read();
3136      return space.machine().root_device().ioport(portnames[(offset >> 1) & 3])->read();
31373137   }
31383138
31393139   return generic_cop_r(space, offset, mem_mask);
r17963r17964
31413141
31423142WRITE16_HANDLER( legionna_mcu_w )
31433143{
3144   get_ram(space->machine());
3144   get_ram(space.machine());
31453145   COMBINE_DATA(&cop_mcu_ram[offset]);
31463146
31473147   if(offset == 0x070/2) //external pin: puts bit 13 high, delay, reads 0x748, writes bit 13 low
trunk/src/mame/machine/slapstic.c
r17963r17964
864864 *
865865 *************************************/
866866
867static int alt2_kludge(address_space *space, offs_t offset)
867static int alt2_kludge(address_space &space, offs_t offset)
868868{
869869   /* Of the 3 alternate addresses, only the middle one needs to actually hit
870870       in the slapstic region; the first and third ones can be anywhere in the
r17963r17964
876876   if (access_68k)
877877   {
878878      /* first verify that the prefetched PC matches the first alternate */
879      if (MATCHES_MASK_VALUE(space->device().safe_pc() >> 1, slapstic.alt1))
879      if (MATCHES_MASK_VALUE(space.device().safe_pc() >> 1, slapstic.alt1))
880880      {
881881         /* now look for a move.w (An),(An) or cmpm.w (An)+,(An)+ */
882         UINT16 opcode = space->direct().read_decrypted_word(space->device().safe_pcbase() & 0xffffff);
882         UINT16 opcode = space.direct().read_decrypted_word(space.device().safe_pcbase() & 0xffffff);
883883         if ((opcode & 0xf1f8) == 0x3090 || (opcode & 0xf1f8) == 0xb148)
884884         {
885885            /* fetch the value of the register for the second operand, and see */
886886            /* if it matches the third alternate */
887            UINT32 regval = space->device().state().state_int(M68K_A0 + ((opcode >> 9) & 7)) >> 1;
887            UINT32 regval = space.device().state().state_int(M68K_A0 + ((opcode >> 9) & 7)) >> 1;
888888            if (MATCHES_MASK_VALUE(regval, slapstic.alt3))
889889            {
890890               alt_bank = (regval >> slapstic.altshift) & 3;
r17963r17964
911911 *
912912 *************************************/
913913
914int slapstic_tweak(address_space *space, offs_t offset)
914int slapstic_tweak(address_space &space, offs_t offset)
915915{
916916   /* reset is universal */
917917   if (offset == 0x0000)
r17963r17964
11211121
11221122   /* log this access */
11231123   if (LOG_SLAPSTIC)
1124      slapstic_log(space->machine(), offset);
1124      slapstic_log(space.machine(), offset);
11251125
11261126   /* return the active bank */
11271127   return current_bank;
trunk/src/mame/machine/bagman.c
r17963r17964
210210
211211MACHINE_RESET_MEMBER(bagman_state,bagman)
212212{
213   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
214   bagman_pal16r6_w(*space, 0, 1);   /*pin 2*/
215   bagman_pal16r6_w(*space, 1, 1);   /*pin 3*/
216   bagman_pal16r6_w(*space, 2, 1);   /*pin 4*/
217   bagman_pal16r6_w(*space, 3, 1);   /*pin 5*/
218   bagman_pal16r6_w(*space, 4, 1);   /*pin 6*/
219   bagman_pal16r6_w(*space, 5, 1);   /*pin 7*/
220   bagman_pal16r6_w(*space, 6, 1);   /*pin 8*/
221   bagman_pal16r6_w(*space, 7, 1);   /*pin 9*/
213   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
214   bagman_pal16r6_w(space, 0, 1);   /*pin 2*/
215   bagman_pal16r6_w(space, 1, 1);   /*pin 3*/
216   bagman_pal16r6_w(space, 2, 1);   /*pin 4*/
217   bagman_pal16r6_w(space, 3, 1);   /*pin 5*/
218   bagman_pal16r6_w(space, 4, 1);   /*pin 6*/
219   bagman_pal16r6_w(space, 5, 1);   /*pin 7*/
220   bagman_pal16r6_w(space, 6, 1);   /*pin 8*/
221   bagman_pal16r6_w(space, 7, 1);   /*pin 9*/
222222   update_pal();
223223}
224224
trunk/src/mame/machine/cdi070.c
r17963r17964
415415
416416READ16_HANDLER( scc68070_periphs_r )
417417{
418    cdi_state *state = space->machine().driver_data<cdi_state>();
418    cdi_state *state = space.machine().driver_data<cdi_state>();
419419    scc68070_regs_t *scc68070 = &state->m_scc68070_regs;
420420
421421    switch(offset)
r17963r17964
428428        case 0x2000/2:
429429            if(ACCESSING_BITS_0_7)
430430            {
431                verboselog(space->machine(), 2, "scc68070_periphs_w: I2C Data Register: %04x & %04x\n", scc68070->i2c.data_register, mem_mask);
431                verboselog(space.machine(), 2, "scc68070_periphs_w: I2C Data Register: %04x & %04x\n", scc68070->i2c.data_register, mem_mask);
432432            }
433433            return scc68070->i2c.data_register;
434434        case 0x2002/2:
435435            if(ACCESSING_BITS_0_7)
436436            {
437                verboselog(space->machine(), 2, "scc68070_periphs_w: I2C Address Register: %04x & %04x\n", scc68070->i2c.address_register, mem_mask);
437                verboselog(space.machine(), 2, "scc68070_periphs_w: I2C Address Register: %04x & %04x\n", scc68070->i2c.address_register, mem_mask);
438438            }
439439            return scc68070->i2c.address_register;
440440        case 0x2004/2:
441441            if(ACCESSING_BITS_0_7)
442442            {
443                verboselog(space->machine(), 2, "scc68070_periphs_w: I2C Status Register: %04x & %04x\n", scc68070->i2c.status_register, mem_mask);
443                verboselog(space.machine(), 2, "scc68070_periphs_w: I2C Status Register: %04x & %04x\n", scc68070->i2c.status_register, mem_mask);
444444            }
445445            return scc68070->i2c.status_register;
446446        case 0x2006/2:
447447            if(ACCESSING_BITS_0_7)
448448            {
449                verboselog(space->machine(), 2, "scc68070_periphs_w: I2C Control Register: %04x & %04x\n", scc68070->i2c.control_register, mem_mask);
449                verboselog(space.machine(), 2, "scc68070_periphs_w: I2C Control Register: %04x & %04x\n", scc68070->i2c.control_register, mem_mask);
450450            }
451451            return scc68070->i2c.control_register;
452452        case 0x2008/2:
453453            if(ACCESSING_BITS_0_7)
454454            {
455                verboselog(space->machine(), 2, "scc68070_periphs_w: I2C Clock Control Register: %04x & %04x\n", scc68070->i2c.clock_control_register, mem_mask);
455                verboselog(space.machine(), 2, "scc68070_periphs_w: I2C Clock Control Register: %04x & %04x\n", scc68070->i2c.clock_control_register, mem_mask);
456456            }
457457            return scc68070->i2c.clock_control_register;
458458
r17963r17964
460460        case 0x2010/2:
461461            if(ACCESSING_BITS_0_7)
462462            {
463                verboselog(space->machine(), 2, "scc68070_periphs_r: UART Mode Register: %04x & %04x\n", scc68070->uart.mode_register, mem_mask);
463                verboselog(space.machine(), 2, "scc68070_periphs_r: UART Mode Register: %04x & %04x\n", scc68070->uart.mode_register, mem_mask);
464464            }
465465            else
466466            {
467               verboselog(space->machine(), 0, "scc68070_periphs_r: Unknown address: %04x & %04x\n", offset * 2, mem_mask);
467               verboselog(space.machine(), 0, "scc68070_periphs_r: Unknown address: %04x & %04x\n", offset * 2, mem_mask);
468468         }
469469            return scc68070->uart.mode_register | 0x20;
470470        case 0x2012/2:
471471           scc68070->uart.status_register |= (1 << 1);
472472            if(ACCESSING_BITS_0_7)
473473            {
474                verboselog(space->machine(), 2, "scc68070_periphs_r: UART Status Register: %04x & %04x\n", scc68070->uart.status_register, mem_mask);
474                verboselog(space.machine(), 2, "scc68070_periphs_r: UART Status Register: %04x & %04x\n", scc68070->uart.status_register, mem_mask);
475475            }
476476            else
477477            {
478               verboselog(space->machine(), 0, "scc68070_periphs_r: Unknown address: %04x & %04x\n", offset * 2, mem_mask);
478               verboselog(space.machine(), 0, "scc68070_periphs_r: Unknown address: %04x & %04x\n", offset * 2, mem_mask);
479479         }
480480
481481         if((scc68070->picr2 >> 4) & 7)
482482         {
483            space->machine().device("maincpu")->execute().set_input_line(M68K_IRQ_1 + (((scc68070->picr2 >> 4) & 7) - 1), ASSERT_LINE);
483            space.machine().device("maincpu")->execute().set_input_line(M68K_IRQ_1 + (((scc68070->picr2 >> 4) & 7) - 1), ASSERT_LINE);
484484         }
485485
486486         if(scc68070->picr2 & 7)
487487         {
488            space->machine().device("maincpu")->execute().set_input_line(M68K_IRQ_1 + ((scc68070->picr2 & 7) - 1), ASSERT_LINE);
488            space.machine().device("maincpu")->execute().set_input_line(M68K_IRQ_1 + ((scc68070->picr2 & 7) - 1), ASSERT_LINE);
489489         }
490490
491491            return scc68070->uart.status_register;
r17963r17964
493493        case 0x2014/2:
494494            if(ACCESSING_BITS_0_7)
495495            {
496                verboselog(space->machine(), 2, "scc68070_periphs_r: UART Clock Select: %04x & %04x\n", scc68070->uart.clock_select, mem_mask);
496                verboselog(space.machine(), 2, "scc68070_periphs_r: UART Clock Select: %04x & %04x\n", scc68070->uart.clock_select, mem_mask);
497497            }
498498            else
499499            {
500               verboselog(space->machine(), 0, "scc68070_periphs_r: Unknown address: %04x & %04x\n", offset * 2, mem_mask);
500               verboselog(space.machine(), 0, "scc68070_periphs_r: Unknown address: %04x & %04x\n", offset * 2, mem_mask);
501501         }
502502            return scc68070->uart.clock_select | 0x08;
503503        case 0x2016/2:
504504            if(ACCESSING_BITS_0_7)
505505            {
506                verboselog(space->machine(), 2, "scc68070_periphs_r: UART Command Register: %02x & %04x\n", scc68070->uart.command_register, mem_mask);
506                verboselog(space.machine(), 2, "scc68070_periphs_r: UART Command Register: %02x & %04x\n", scc68070->uart.command_register, mem_mask);
507507            }
508508            else
509509            {
510               verboselog(space->machine(), 0, "scc68070_periphs_r: Unknown address: %04x & %04x\n", offset * 2, mem_mask);
510               verboselog(space.machine(), 0, "scc68070_periphs_r: Unknown address: %04x & %04x\n", offset * 2, mem_mask);
511511         }
512512            return scc68070->uart.command_register | 0x80;
513513        case 0x2018/2:
514514            if(ACCESSING_BITS_0_7)
515515            {
516                verboselog(space->machine(), 2, "scc68070_periphs_r: UART Transmit Holding Register: %02x & %04x\n", scc68070->uart.transmit_holding_register, mem_mask);
516                verboselog(space.machine(), 2, "scc68070_periphs_r: UART Transmit Holding Register: %02x & %04x\n", scc68070->uart.transmit_holding_register, mem_mask);
517517            }
518518            else
519519            {
520               verboselog(space->machine(), 0, "scc68070_periphs_r: Unknown address: %04x & %04x\n", offset * 2, mem_mask);
520               verboselog(space.machine(), 0, "scc68070_periphs_r: Unknown address: %04x & %04x\n", offset * 2, mem_mask);
521521         }
522522            return scc68070->uart.transmit_holding_register;
523523        case 0x201a/2:
524524            if(ACCESSING_BITS_0_7)
525525            {
526                verboselog(space->machine(), 2, "scc68070_periphs_r: UART Receive Holding Register: %02x & %04x\n", scc68070->uart.receive_holding_register, mem_mask);
526                verboselog(space.machine(), 2, "scc68070_periphs_r: UART Receive Holding Register: %02x & %04x\n", scc68070->uart.receive_holding_register, mem_mask);
527527            }
528528            else
529529            {
530               verboselog(space->machine(), 0, "scc68070_periphs_r: Unknown address: %04x & %04x\n", offset * 2, mem_mask);
530               verboselog(space.machine(), 0, "scc68070_periphs_r: Unknown address: %04x & %04x\n", offset * 2, mem_mask);
531531         }
532532         if((scc68070->picr2 >> 4) & 7)
533533         {
534            space->machine().device("maincpu")->execute().set_input_line(M68K_IRQ_1 + (((scc68070->picr2 >> 4) & 7) - 1), CLEAR_LINE);
534            space.machine().device("maincpu")->execute().set_input_line(M68K_IRQ_1 + (((scc68070->picr2 >> 4) & 7) - 1), CLEAR_LINE);
535535         }
536536
537537         scc68070->uart.receive_holding_register = scc68070->uart.receive_buffer[0];
r17963r17964
550550        case 0x2020/2:
551551            if(ACCESSING_BITS_0_7)
552552            {
553                verboselog(space->machine(), 2, "scc68070_periphs_r: Timer Control Register: %02x & %04x\n", scc68070->timers.timer_control_register, mem_mask);
553                verboselog(space.machine(), 2, "scc68070_periphs_r: Timer Control Register: %02x & %04x\n", scc68070->timers.timer_control_register, mem_mask);
554554            }
555555            if(ACCESSING_BITS_8_15)
556556            {
557                verboselog(space->machine(), 12, "scc68070_periphs_r: Timer Status Register: %02x & %04x\n", scc68070->timers.timer_status_register, mem_mask);
557                verboselog(space.machine(), 12, "scc68070_periphs_r: Timer Status Register: %02x & %04x\n", scc68070->timers.timer_status_register, mem_mask);
558558            }
559559            return (scc68070->timers.timer_status_register << 8) | scc68070->timers.timer_control_register;
560560        case 0x2022/2:
561            verboselog(space->machine(), 2, "scc68070_periphs_r: Timer Reload Register: %04x & %04x\n", scc68070->timers.reload_register, mem_mask);
561            verboselog(space.machine(), 2, "scc68070_periphs_r: Timer Reload Register: %04x & %04x\n", scc68070->timers.reload_register, mem_mask);
562562            return scc68070->timers.reload_register;
563563        case 0x2024/2:
564            verboselog(space->machine(), 2, "scc68070_periphs_r: Timer 0: %04x & %04x\n", scc68070->timers.timer0, mem_mask);
564            verboselog(space.machine(), 2, "scc68070_periphs_r: Timer 0: %04x & %04x\n", scc68070->timers.timer0, mem_mask);
565565            return scc68070->timers.timer0;
566566        case 0x2026/2:
567            verboselog(space->machine(), 2, "scc68070_periphs_r: Timer 1: %04x & %04x\n", scc68070->timers.timer1, mem_mask);
567            verboselog(space.machine(), 2, "scc68070_periphs_r: Timer 1: %04x & %04x\n", scc68070->timers.timer1, mem_mask);
568568            return scc68070->timers.timer1;
569569        case 0x2028/2:
570            verboselog(space->machine(), 2, "scc68070_periphs_r: Timer 2: %04x & %04x\n", scc68070->timers.timer2, mem_mask);
570            verboselog(space.machine(), 2, "scc68070_periphs_r: Timer 2: %04x & %04x\n", scc68070->timers.timer2, mem_mask);
571571            return scc68070->timers.timer2;
572572
573573        // PICR1: 80002045
574574        case 0x2044/2:
575575            if(ACCESSING_BITS_0_7)
576576            {
577                verboselog(space->machine(), 2, "scc68070_periphs_r: Peripheral Interrupt Control Register 1: %02x & %04x\n", scc68070->picr1, mem_mask);
577                verboselog(space.machine(), 2, "scc68070_periphs_r: Peripheral Interrupt Control Register 1: %02x & %04x\n", scc68070->picr1, mem_mask);
578578            }
579579            return scc68070->picr1;
580580
r17963r17964
582582        case 0x2046/2:
583583            if(ACCESSING_BITS_0_7)
584584            {
585                verboselog(space->machine(), 2, "scc68070_periphs_r: Peripheral Interrupt Control Register 2: %02x & %04x\n", scc68070->picr2, mem_mask);
585                verboselog(space.machine(), 2, "scc68070_periphs_r: Peripheral Interrupt Control Register 2: %02x & %04x\n", scc68070->picr2, mem_mask);
586586            }
587587            return scc68070->picr2 & 0x77;
588588
r17963r17964
591591        case 0x4040/2:
592592            if(ACCESSING_BITS_0_7)
593593            {
594                verboselog(space->machine(), 2, "scc68070_periphs_r: DMA(%d) Error Register: %04x & %04x\n", (offset - 0x2000) / 32, scc68070->dma.channel[(offset - 0x2000) / 32].channel_error, mem_mask);
594                verboselog(space.machine(), 2, "scc68070_periphs_r: DMA(%d) Error Register: %04x & %04x\n", (offset - 0x2000) / 32, scc68070->dma.channel[(offset - 0x2000) / 32].channel_error, mem_mask);
595595            }
596596            if(ACCESSING_BITS_8_15)
597597            {
598                verboselog(space->machine(), 2, "scc68070_periphs_r: DMA(%d) Status Register: %04x & %04x\n", (offset - 0x2000) / 32, scc68070->dma.channel[(offset - 0x2000) / 32].channel_status, mem_mask);
598                verboselog(space.machine(), 2, "scc68070_periphs_r: DMA(%d) Status Register: %04x & %04x\n", (offset - 0x2000) / 32, scc68070->dma.channel[(offset - 0x2000) / 32].channel_status, mem_mask);
599599            }
600600            return (scc68070->dma.channel[(offset - 0x2000) / 32].channel_status << 8) | scc68070->dma.channel[(offset - 0x2000) / 32].channel_error;
601601        case 0x4004/2:
602602        case 0x4044/2:
603603            if(ACCESSING_BITS_0_7)
604604            {
605                verboselog(space->machine(), 2, "scc68070_periphs_r: DMA(%d) Operation Control Register: %02x & %04x\n", (offset - 0x2000) / 32, scc68070->dma.channel[(offset - 0x2000) / 32].operation_control, mem_mask);
605                verboselog(space.machine(), 2, "scc68070_periphs_r: DMA(%d) Operation Control Register: %02x & %04x\n", (offset - 0x2000) / 32, scc68070->dma.channel[(offset - 0x2000) / 32].operation_control, mem_mask);
606606            }
607607            if(ACCESSING_BITS_8_15)
608608            {
609                verboselog(space->machine(), 2, "scc68070_periphs_r: DMA(%d) Device Control Register: %02x & %04x\n", (offset - 0x2000) / 32, scc68070->dma.channel[(offset - 0x2000) / 32].device_control, mem_mask);
609                verboselog(space.machine(), 2, "scc68070_periphs_r: DMA(%d) Device Control Register: %02x & %04x\n", (offset - 0x2000) / 32, scc68070->dma.channel[(offset - 0x2000) / 32].device_control, mem_mask);
610610            }
611611            return (scc68070->dma.channel[(offset - 0x2000) / 32].device_control << 8) | scc68070->dma.channel[(offset - 0x2000) / 32].operation_control;
612612        case 0x4006/2:
613613        case 0x4046/2:
614614            if(ACCESSING_BITS_0_7)
615615            {
616                verboselog(space->machine(), 2, "scc68070_periphs_r: DMA(%d) Channel Control Register: %02x & %04x\n", (offset - 0x2000) / 32, scc68070->dma.channel[(offset - 0x2000) / 32].channel_control, mem_mask);
616                verboselog(space.machine(), 2, "scc68070_periphs_r: DMA(%d) Channel Control Register: %02x & %04x\n", (offset - 0x2000) / 32, scc68070->dma.channel[(offset - 0x2000) / 32].channel_control, mem_mask);
617617            }
618618            if(ACCESSING_BITS_8_15)
619619            {
620                verboselog(space->machine(), 2, "scc68070_periphs_r: DMA(%d) Sequence Control Register: %02x & %04x\n", (offset - 0x2000) / 32, scc68070->dma.channel[(offset - 0x2000) / 32].sequence_control, mem_mask);
620                verboselog(space.machine(), 2, "scc68070_periphs_r: DMA(%d) Sequence Control Register: %02x & %04x\n", (offset - 0x2000) / 32, scc68070->dma.channel[(offset - 0x2000) / 32].sequence_control, mem_mask);
621621            }
622622            return (scc68070->dma.channel[(offset - 0x2000) / 32].sequence_control << 8) | scc68070->dma.channel[(offset - 0x2000) / 32].channel_control;
623623        case 0x400a/2:
624            verboselog(space->machine(), 2, "scc68070_periphs_r: DMA(%d) Memory Transfer Counter: %04x & %04x\n", (offset - 0x2000) / 32, scc68070->dma.channel[(offset - 0x2000) / 32].transfer_counter, mem_mask);
624            verboselog(space.machine(), 2, "scc68070_periphs_r: DMA(%d) Memory Transfer Counter: %04x & %04x\n", (offset - 0x2000) / 32, scc68070->dma.channel[(offset - 0x2000) / 32].transfer_counter, mem_mask);
625625            return scc68070->dma.channel[(offset - 0x2000) / 32].transfer_counter;
626626        case 0x400c/2:
627627        case 0x404c/2:
628            verboselog(space->machine(), 2, "scc68070_periphs_r: DMA(%d) Memory Address Counter (High Word): %04x & %04x\n", (offset - 0x2000) / 32, (scc68070->dma.channel[(offset - 0x2000) / 32].memory_address_counter >> 16), mem_mask);
628            verboselog(space.machine(), 2, "scc68070_periphs_r: DMA(%d) Memory Address Counter (High Word): %04x & %04x\n", (offset - 0x2000) / 32, (scc68070->dma.channel[(offset - 0x2000) / 32].memory_address_counter >> 16), mem_mask);
629629            return (scc68070->dma.channel[(offset - 0x2000) / 32].memory_address_counter >> 16);
630630        case 0x400e/2:
631631        case 0x404e/2:
632            verboselog(space->machine(), 2, "scc68070_periphs_r: DMA(%d) Memory Address Counter (Low Word): %04x & %04x\n", (offset - 0x2000) / 32, scc68070->dma.channel[(offset - 0x2000) / 32].memory_address_counter, mem_mask);
632            verboselog(space.machine(), 2, "scc68070_periphs_r: DMA(%d) Memory Address Counter (Low Word): %04x & %04x\n", (offset - 0x2000) / 32, scc68070->dma.channel[(offset - 0x2000) / 32].memory_address_counter, mem_mask);
633633            return scc68070->dma.channel[(offset - 0x2000) / 32].memory_address_counter;
634634        case 0x4014/2:
635635        case 0x4054/2:
636            verboselog(space->machine(), 2, "scc68070_periphs_r: DMA(%d) Device Address Counter (High Word): %04x & %04x\n", (offset - 0x2000) / 32, (scc68070->dma.channel[(offset - 0x2000) / 32].device_address_counter >> 16), mem_mask);
636            verboselog(space.machine(), 2, "scc68070_periphs_r: DMA(%d) Device Address Counter (High Word): %04x & %04x\n", (offset - 0x2000) / 32, (scc68070->dma.channel[(offset - 0x2000) / 32].device_address_counter >> 16), mem_mask);
637637            return (scc68070->dma.channel[(offset - 0x2000) / 32].device_address_counter >> 16);
638638        case 0x4016/2:
639639        case 0x4056/2:
640            verboselog(space->machine(), 2, "scc68070_periphs_r: DMA(%d) Device Address Counter (Low Word): %04x & %04x\n", (offset - 0x2000) / 32, scc68070->dma.channel[(offset - 0x2000) / 32].device_address_counter, mem_mask);
640            verboselog(space.machine(), 2, "scc68070_periphs_r: DMA(%d) Device Address Counter (Low Word): %04x & %04x\n", (offset - 0x2000) / 32, scc68070->dma.channel[(offset - 0x2000) / 32].device_address_counter, mem_mask);
641641            return scc68070->dma.channel[(offset - 0x2000) / 32].device_address_counter;
642642
643643        // MMU: 80008000 to 8000807f
644644        case 0x8000/2:  // Status / Control register
645645            if(ACCESSING_BITS_0_7)
646646            {   // Control
647                verboselog(space->machine(), 2, "scc68070_periphs_r: MMU Control: %02x & %04x\n", scc68070->mmu.control, mem_mask);
647                verboselog(space.machine(), 2, "scc68070_periphs_r: MMU Control: %02x & %04x\n", scc68070->mmu.control, mem_mask);
648648                return scc68070->mmu.control;
649649            }   // Status
650650            else
651651            {
652                verboselog(space->machine(), 2, "scc68070_periphs_r: MMU Status: %02x & %04x\n", scc68070->mmu.status, mem_mask);
652                verboselog(space.machine(), 2, "scc68070_periphs_r: MMU Status: %02x & %04x\n", scc68070->mmu.status, mem_mask);
653653                return scc68070->mmu.status;
654654            }
655655            break;
r17963r17964
661661        case 0x8068/2:
662662        case 0x8070/2:
663663        case 0x8078/2:  // Attributes (SD0-7)
664            verboselog(space->machine(), 2, "scc68070_periphs_r: MMU descriptor %d attributes: %04x & %04x\n", (offset - 0x4020) / 4, scc68070->mmu.desc[(offset - 0x4020) / 4].attr, mem_mask);
664            verboselog(space.machine(), 2, "scc68070_periphs_r: MMU descriptor %d attributes: %04x & %04x\n", (offset - 0x4020) / 4, scc68070->mmu.desc[(offset - 0x4020) / 4].attr, mem_mask);
665665            return scc68070->mmu.desc[(offset - 0x4020) / 4].attr;
666666        case 0x8042/2:
667667        case 0x804a/2:
r17963r17964
671671        case 0x806a/2:
672672        case 0x8072/2:
673673        case 0x807a/2:  // Segment Length (SD0-7)
674            verboselog(space->machine(), 2, "scc68070_periphs_r: MMU descriptor %d length: %04x & %04x\n", (offset - 0x4020) / 4, scc68070->mmu.desc[(offset - 0x4020) / 4].length, mem_mask);
674            verboselog(space.machine(), 2, "scc68070_periphs_r: MMU descriptor %d length: %04x & %04x\n", (offset - 0x4020) / 4, scc68070->mmu.desc[(offset - 0x4020) / 4].length, mem_mask);
675675            return scc68070->mmu.desc[(offset - 0x4020) / 4].length;
676676        case 0x8044/2:
677677        case 0x804c/2:
r17963r17964
683683        case 0x807c/2:  // Segment Number (SD0-7, A0=1 only)
684684            if(ACCESSING_BITS_0_7)
685685            {
686                verboselog(space->machine(), 2, "scc68070_periphs_r: MMU descriptor %d segment: %02x & %04x\n", (offset - 0x4020) / 4, scc68070->mmu.desc[(offset - 0x4020) / 4].segment, mem_mask);
686                verboselog(space.machine(), 2, "scc68070_periphs_r: MMU descriptor %d segment: %02x & %04x\n", (offset - 0x4020) / 4, scc68070->mmu.desc[(offset - 0x4020) / 4].segment, mem_mask);
687687                return scc68070->mmu.desc[(offset - 0x4020) / 4].segment;
688688            }
689689            break;
r17963r17964
695695        case 0x806e/2:
696696        case 0x8076/2:
697697        case 0x807e/2:  // Base Address (SD0-7)
698            verboselog(space->machine(), 2, "scc68070_periphs_r: MMU descriptor %d base: %04x & %04x\n", (offset - 0x4020) / 4, scc68070->mmu.desc[(offset - 0x4020) / 4].base, mem_mask);
698            verboselog(space.machine(), 2, "scc68070_periphs_r: MMU descriptor %d base: %04x & %04x\n", (offset - 0x4020) / 4, scc68070->mmu.desc[(offset - 0x4020) / 4].base, mem_mask);
699699            return scc68070->mmu.desc[(offset - 0x4020) / 4].base;
700700        default:
701            verboselog(space->machine(), 0, "scc68070_periphs_r: Unknown address: %04x & %04x\n", offset * 2, mem_mask);
701            verboselog(space.machine(), 0, "scc68070_periphs_r: Unknown address: %04x & %04x\n", offset * 2, mem_mask);
702702            break;
703703    }
704704
r17963r17964
707707
708708WRITE16_HANDLER( scc68070_periphs_w )
709709{
710    cdi_state *state = space->machine().driver_data<cdi_state>();
710    cdi_state *state = space.machine().driver_data<cdi_state>();
711711    scc68070_regs_t *scc68070 = &state->m_scc68070_regs;
712712
713713    switch(offset)
714714    {
715715        // Interrupts: 80001001
716716        case 0x1000/2: // LIR priority level
717            verboselog(space->machine(), 2, "scc68070_periphs_w: LIR: %04x & %04x\n", data, mem_mask);
717            verboselog(space.machine(), 2, "scc68070_periphs_w: LIR: %04x & %04x\n", data, mem_mask);
718718            COMBINE_DATA(&scc68070->lir);
719719            break;
720720
r17963r17964
722722        case 0x2000/2:
723723            if(ACCESSING_BITS_0_7)
724724            {
725                verboselog(space->machine(), 2, "scc68070_periphs_w: I2C Data Register: %04x & %04x\n", data, mem_mask);
725                verboselog(space.machine(), 2, "scc68070_periphs_w: I2C Data Register: %04x & %04x\n", data, mem_mask);
726726                scc68070->i2c.data_register = data & 0x00ff;
727727            }
728728            break;
729729        case 0x2002/2:
730730            if(ACCESSING_BITS_0_7)
731731            {
732                verboselog(space->machine(), 2, "scc68070_periphs_w: I2C Address Register: %04x & %04x\n", data, mem_mask);
732                verboselog(space.machine(), 2, "scc68070_periphs_w: I2C Address Register: %04x & %04x\n", data, mem_mask);
733733                scc68070->i2c.address_register = data & 0x00ff;
734734            }
735735            break;
736736        case 0x2004/2:
737737            if(ACCESSING_BITS_0_7)
738738            {
739                verboselog(space->machine(), 2, "scc68070_periphs_w: I2C Status Register: %04x & %04x\n", data, mem_mask);
739                verboselog(space.machine(), 2, "scc68070_periphs_w: I2C Status Register: %04x & %04x\n", data, mem_mask);
740740                scc68070->i2c.status_register = data & 0x00ff;
741741            }
742742            break;
743743        case 0x2006/2:
744744            if(ACCESSING_BITS_0_7)
745745            {
746                verboselog(space->machine(), 2, "scc68070_periphs_w: I2C Control Register: %04x & %04x\n", data, mem_mask);
746                verboselog(space.machine(), 2, "scc68070_periphs_w: I2C Control Register: %04x & %04x\n", data, mem_mask);
747747                scc68070->i2c.control_register = data & 0x00ff;
748748            }
749749            break;
750750        case 0x2008/2:
751751            if(ACCESSING_BITS_0_7)
752752            {
753                verboselog(space->machine(), 2, "scc68070_periphs_w: I2C Clock Control Register: %04x & %04x\n", data, mem_mask);
753                verboselog(space.machine(), 2, "scc68070_periphs_w: I2C Clock Control Register: %04x & %04x\n", data, mem_mask);
754754                scc68070->i2c.clock_control_register = data & 0x00ff;
755755            }
756756            break;
r17963r17964
759759        case 0x2010/2:
760760            if(ACCESSING_BITS_0_7)
761761            {
762                verboselog(space->machine(), 2, "scc68070_periphs_w: UART Mode Register: %04x & %04x\n", data, mem_mask);
762                verboselog(space.machine(), 2, "scc68070_periphs_w: UART Mode Register: %04x & %04x\n", data, mem_mask);
763763                scc68070->uart.mode_register = data & 0x00ff;
764764            }
765765            else
766766            {
767               verboselog(space->machine(), 0, "scc68070_periphs_w: Unknown address: %04x = %04x & %04x\n", offset * 2, data, mem_mask);
767               verboselog(space.machine(), 0, "scc68070_periphs_w: Unknown address: %04x = %04x & %04x\n", offset * 2, data, mem_mask);
768768         }
769769            break;
770770        case 0x2012/2:
771771            if(ACCESSING_BITS_0_7)
772772            {
773                verboselog(space->machine(), 2, "scc68070_periphs_w: UART Status Register: %04x & %04x\n", data, mem_mask);
773                verboselog(space.machine(), 2, "scc68070_periphs_w: UART Status Register: %04x & %04x\n", data, mem_mask);
774774                scc68070->uart.status_register = data & 0x00ff;
775775            }
776776            else
777777            {
778               verboselog(space->machine(), 0, "scc68070_periphs_w: Unknown address: %04x = %04x & %04x\n", offset * 2, data, mem_mask);
778               verboselog(space.machine(), 0, "scc68070_periphs_w: Unknown address: %04x = %04x & %04x\n", offset * 2, data, mem_mask);
779779         }
780780            break;
781781        case 0x2014/2:
782782            if(ACCESSING_BITS_0_7)
783783            {
784                verboselog(space->machine(), 2, "scc68070_periphs_w: UART Clock Select: %04x & %04x\n", data, mem_mask);
784                verboselog(space.machine(), 2, "scc68070_periphs_w: UART Clock Select: %04x & %04x\n", data, mem_mask);
785785                scc68070->uart.clock_select = data & 0x00ff;
786786            }
787787            else
788788            {
789               verboselog(space->machine(), 0, "scc68070_periphs_w: Unknown address: %04x = %04x & %04x\n", offset * 2, data, mem_mask);
789               verboselog(space.machine(), 0, "scc68070_periphs_w: Unknown address: %04x = %04x & %04x\n", offset * 2, data, mem_mask);
790790         }
791791            break;
792792        case 0x2016/2:
793793            if(ACCESSING_BITS_0_7)
794794            {
795                verboselog(space->machine(), 2, "scc68070_periphs_w: UART Command Register: %04x & %04x\n", data, mem_mask);
795                verboselog(space.machine(), 2, "scc68070_periphs_w: UART Command Register: %04x & %04x\n", data, mem_mask);
796796                scc68070->uart.command_register = data & 0x00ff;
797            scc68070_uart_rx_check(space->machine(), scc68070);
798            scc68070_uart_tx_check(space->machine(), scc68070);
797            scc68070_uart_rx_check(space.machine(), scc68070);
798            scc68070_uart_tx_check(space.machine(), scc68070);
799799            }
800800            else
801801            {
802               verboselog(space->machine(), 0, "scc68070_periphs_w: Unknown address: %04x = %04x & %04x\n", offset * 2, data, mem_mask);
802               verboselog(space.machine(), 0, "scc68070_periphs_w: Unknown address: %04x = %04x & %04x\n", offset * 2, data, mem_mask);
803803         }
804804            break;
805805        case 0x2018/2:
806806            if(ACCESSING_BITS_0_7)
807807            {
808                verboselog(space->machine(), 2, "scc68070_periphs_w: UART Transmit Holding Register: %04x & %04x: %c\n", data, mem_mask, (data >= 0x20 && data < 0x7f) ? (data & 0x00ff) : ' ');
809            scc68070_uart_tx(space->machine(), scc68070, data & 0x00ff);
808                verboselog(space.machine(), 2, "scc68070_periphs_w: UART Transmit Holding Register: %04x & %04x: %c\n", data, mem_mask, (data >= 0x20 && data < 0x7f) ? (data & 0x00ff) : ' ');
809            scc68070_uart_tx(space.machine(), scc68070, data & 0x00ff);
810810                scc68070->uart.transmit_holding_register = data & 0x00ff;
811811            }
812812            else
813813            {
814               verboselog(space->machine(), 0, "scc68070_periphs_w: Unknown address: %04x = %04x & %04x\n", offset * 2, data, mem_mask);
814               verboselog(space.machine(), 0, "scc68070_periphs_w: Unknown address: %04x = %04x & %04x\n", offset * 2, data, mem_mask);
815815         }
816816            break;
817817        case 0x201a/2:
818818            if(ACCESSING_BITS_0_7)
819819            {
820                verboselog(space->machine(), 2, "scc68070_periphs_w: UART Receive Holding Register: %04x & %04x\n", data, mem_mask);
820                verboselog(space.machine(), 2, "scc68070_periphs_w: UART Receive Holding Register: %04x & %04x\n", data, mem_mask);
821821                scc68070->uart.receive_holding_register = data & 0x00ff;
822822            }
823823            else
824824            {
825               verboselog(space->machine(), 0, "scc68070_periphs_w: Unknown address: %04x = %04x & %04x\n", offset * 2, data, mem_mask);
825               verboselog(space.machine(), 0, "scc68070_periphs_w: Unknown address: %04x = %04x & %04x\n", offset * 2, data, mem_mask);
826826         }
827827            break;
828828
r17963r17964
830830        case 0x2020/2:
831831            if(ACCESSING_BITS_0_7)
832832            {
833                verboselog(space->machine(), 2, "scc68070_periphs_w: Timer Control Register: %04x & %04x\n", data, mem_mask);
833                verboselog(space.machine(), 2, "scc68070_periphs_w: Timer Control Register: %04x & %04x\n", data, mem_mask);
834834                scc68070->timers.timer_control_register = data & 0x00ff;
835835            }
836836            if(ACCESSING_BITS_8_15)
837837            {
838                verboselog(space->machine(), 12, "scc68070_periphs_w: Timer Status Register: %04x & %04x\n", data, mem_mask);
838                verboselog(space.machine(), 12, "scc68070_periphs_w: Timer Status Register: %04x & %04x\n", data, mem_mask);
839839                scc68070->timers.timer_status_register &= ~(data >> 8);
840840                if(!scc68070->timers.timer_status_register)
841841                {
842842                    UINT8 interrupt = scc68070->picr1 & 7;
843                    space->machine().device("maincpu")->execute().set_input_line(M68K_IRQ_1 + (interrupt - 1), CLEAR_LINE);
843                    space.machine().device("maincpu")->execute().set_input_line(M68K_IRQ_1 + (interrupt - 1), CLEAR_LINE);
844844                }
845845            }
846846            break;
847847        case 0x2022/2:
848            verboselog(space->machine(), 2, "scc68070_periphs_w: Timer Reload Register: %04x & %04x\n", data, mem_mask);
848            verboselog(space.machine(), 2, "scc68070_periphs_w: Timer Reload Register: %04x & %04x\n", data, mem_mask);
849849            COMBINE_DATA(&scc68070->timers.reload_register);
850850            break;
851851        case 0x2024/2:
852            verboselog(space->machine(), 2, "scc68070_periphs_w: Timer 0: %04x & %04x\n", data, mem_mask);
852            verboselog(space.machine(), 2, "scc68070_periphs_w: Timer 0: %04x & %04x\n", data, mem_mask);
853853            COMBINE_DATA(&scc68070->timers.timer0);
854854            scc68070_set_timer_callback(&state->m_scc68070_regs, 0);
855855            break;
856856        case 0x2026/2:
857            verboselog(space->machine(), 2, "scc68070_periphs_w: Timer 1: %04x & %04x\n", data, mem_mask);
857            verboselog(space.machine(), 2, "scc68070_periphs_w: Timer 1: %04x & %04x\n", data, mem_mask);
858858            COMBINE_DATA(&scc68070->timers.timer1);
859859            break;
860860        case 0x2028/2:
861            verboselog(space->machine(), 2, "scc68070_periphs_w: Timer 2: %04x & %04x\n", data, mem_mask);
861            verboselog(space.machine(), 2, "scc68070_periphs_w: Timer 2: %04x & %04x\n", data, mem_mask);
862862            COMBINE_DATA(&scc68070->timers.timer2);
863863            break;
864864
r17963r17964
866866        case 0x2044/2:
867867            if(ACCESSING_BITS_0_7)
868868            {
869                verboselog(space->machine(), 2, "scc68070_periphs_w: Peripheral Interrupt Control Register 1: %04x & %04x\n", data, mem_mask);
869                verboselog(space.machine(), 2, "scc68070_periphs_w: Peripheral Interrupt Control Register 1: %04x & %04x\n", data, mem_mask);
870870                scc68070->picr1 = data & 0x00ff;
871871            }
872872            break;
r17963r17964
875875        case 0x2046/2:
876876            if(ACCESSING_BITS_0_7)
877877            {
878                verboselog(space->machine(), 2, "scc68070_periphs_w: Peripheral Interrupt Control Register 2: %04x & %04x\n", data, mem_mask);
878                verboselog(space.machine(), 2, "scc68070_periphs_w: Peripheral Interrupt Control Register 2: %04x & %04x\n", data, mem_mask);
879879                scc68070->picr2 = data & 0x00ff;
880880            }
881881            break;
r17963r17964
885885        case 0x4040/2:
886886            if(ACCESSING_BITS_0_7)
887887            {
888                verboselog(space->machine(), 2, "scc68070_periphs_w: DMA(%d) Error (invalid): %04x & %04x\n", (offset - 0x2000) / 32, data, mem_mask);
888                verboselog(space.machine(), 2, "scc68070_periphs_w: DMA(%d) Error (invalid): %04x & %04x\n", (offset - 0x2000) / 32, data, mem_mask);
889889            }
890890            if(ACCESSING_BITS_8_15)
891891            {
892                verboselog(space->machine(), 2, "scc68070_periphs_w: DMA(%d) Status: %04x & %04x\n", (offset - 0x2000) / 32, data, mem_mask);
892                verboselog(space.machine(), 2, "scc68070_periphs_w: DMA(%d) Status: %04x & %04x\n", (offset - 0x2000) / 32, data, mem_mask);
893893                scc68070->dma.channel[(offset - 0x2000) / 32].channel_status &= ~(data & 0xb0);
894894            }
895895            break;
r17963r17964
897897        case 0x4044/2:
898898            if(ACCESSING_BITS_0_7)
899899            {
900                verboselog(space->machine(), 2, "scc68070_periphs_w: DMA(%d) Operation Control Register: %04x & %04x\n", (offset - 0x2000) / 32, data, mem_mask);
900                verboselog(space.machine(), 2, "scc68070_periphs_w: DMA(%d) Operation Control Register: %04x & %04x\n", (offset - 0x2000) / 32, data, mem_mask);
901901                scc68070->dma.channel[(offset - 0x2000) / 32].operation_control = data & 0x00ff;
902902            }
903903            if(ACCESSING_BITS_8_15)
904904            {
905                verboselog(space->machine(), 2, "scc68070_periphs_w: DMA(%d) Device Control Register: %04x & %04x\n", (offset - 0x2000) / 32, data, mem_mask);
905                verboselog(space.machine(), 2, "scc68070_periphs_w: DMA(%d) Device Control Register: %04x & %04x\n", (offset - 0x2000) / 32, data, mem_mask);
906906                scc68070->dma.channel[(offset - 0x2000) / 32].device_control = data >> 8;
907907            }
908908            break;
r17963r17964
910910        case 0x4046/2:
911911            if(ACCESSING_BITS_0_7)
912912            {
913                verboselog(space->machine(), 2, "scc68070_periphs_w: DMA(%d) Channel Control Register: %04x & %04x\n", (offset - 0x2000) / 32, data, mem_mask);
913                verboselog(space.machine(), 2, "scc68070_periphs_w: DMA(%d) Channel Control Register: %04x & %04x\n", (offset - 0x2000) / 32, data, mem_mask);
914914                scc68070->dma.channel[(offset - 0x2000) / 32].channel_control = data & 0x007f;
915915                if(data & CCR_SO)
916916                {
r17963r17964
919919            }
920920            if(ACCESSING_BITS_8_15)
921921            {
922                verboselog(space->machine(), 2, "scc68070_periphs_w: DMA(%d) Sequence Control Register: %04x & %04x\n", (offset - 0x2000) / 32, data, mem_mask);
922                verboselog(space.machine(), 2, "scc68070_periphs_w: DMA(%d) Sequence Control Register: %04x & %04x\n", (offset - 0x2000) / 32, data, mem_mask);
923923                scc68070->dma.channel[(offset - 0x2000) / 32].sequence_control = data >> 8;
924924            }
925925            break;
926926        case 0x400a/2:
927            verboselog(space->machine(), 2, "scc68070_periphs_w: DMA(%d) Memory Transfer Counter: %04x & %04x\n", (offset - 0x2000) / 32, data, mem_mask);
927            verboselog(space.machine(), 2, "scc68070_periphs_w: DMA(%d) Memory Transfer Counter: %04x & %04x\n", (offset - 0x2000) / 32, data, mem_mask);
928928            COMBINE_DATA(&scc68070->dma.channel[(offset - 0x2000) / 32].transfer_counter);
929929            break;
930930        case 0x400c/2:
931931        case 0x404c/2:
932            verboselog(space->machine(), 2, "scc68070_periphs_w: DMA(%d) Memory Address Counter (High Word): %04x & %04x\n", (offset - 0x2000) / 32, data, mem_mask);
932            verboselog(space.machine(), 2, "scc68070_periphs_w: DMA(%d) Memory Address Counter (High Word): %04x & %04x\n", (offset - 0x2000) / 32, data, mem_mask);
933933            scc68070->dma.channel[(offset - 0x2000) / 32].memory_address_counter &= ~(mem_mask << 16);
934934            scc68070->dma.channel[(offset - 0x2000) / 32].memory_address_counter |= data << 16;
935935            break;
936936        case 0x400e/2:
937937        case 0x404e/2:
938            verboselog(space->machine(), 2, "scc68070_periphs_w: DMA(%d) Memory Address Counter (Low Word): %04x & %04x\n", (offset - 0x2000) / 32, data, mem_mask);
938            verboselog(space.machine(), 2, "scc68070_periphs_w: DMA(%d) Memory Address Counter (Low Word): %04x & %04x\n", (offset - 0x2000) / 32, data, mem_mask);
939939            scc68070->dma.channel[(offset - 0x2000) / 32].memory_address_counter &= ~mem_mask;
940940            scc68070->dma.channel[(offset - 0x2000) / 32].memory_address_counter |= data;
941941            break;
942942        case 0x4014/2:
943943        case 0x4054/2:
944            verboselog(space->machine(), 2, "scc68070_periphs_w: DMA(%d) Device Address Counter (High Word): %04x & %04x\n", (offset - 0x2000) / 32, data, mem_mask);
944            verboselog(space.machine(), 2, "scc68070_periphs_w: DMA(%d) Device Address Counter (High Word): %04x & %04x\n", (offset - 0x2000) / 32, data, mem_mask);
945945            scc68070->dma.channel[(offset - 0x2000) / 32].device_address_counter &= ~(mem_mask << 16);
946946            scc68070->dma.channel[(offset - 0x2000) / 32].device_address_counter |= data << 16;
947947            break;
948948        case 0x4016/2:
949949        case 0x4056/2:
950            verboselog(space->machine(), 2, "scc68070_periphs_w: DMA(%d) Device Address Counter (Low Word): %04x & %04x\n", (offset - 0x2000) / 32, data, mem_mask);
950            verboselog(space.machine(), 2, "scc68070_periphs_w: DMA(%d) Device Address Counter (Low Word): %04x & %04x\n", (offset - 0x2000) / 32, data, mem_mask);
951951            scc68070->dma.channel[(offset - 0x2000) / 32].device_address_counter &= ~mem_mask;
952952            scc68070->dma.channel[(offset - 0x2000) / 32].device_address_counter |= data;
953953            break;
r17963r17964
956956        case 0x8000/2:  // Status / Control register
957957            if(ACCESSING_BITS_0_7)
958958            {   // Control
959                verboselog(space->machine(), 2, "scc68070_periphs_w: MMU Control: %04x & %04x\n", data, mem_mask);
959                verboselog(space.machine(), 2, "scc68070_periphs_w: MMU Control: %04x & %04x\n", data, mem_mask);
960960                scc68070->mmu.control = data & 0x00ff;
961961            }   // Status
962962            else
963963            {
964                verboselog(space->machine(), 0, "scc68070_periphs_w: MMU Status (invalid): %04x & %04x\n", data, mem_mask);
964                verboselog(space.machine(), 0, "scc68070_periphs_w: MMU Status (invalid): %04x & %04x\n", data, mem_mask);
965965            }
966966            break;
967967        case 0x8040/2:
r17963r17964
972972        case 0x8068/2:
973973        case 0x8070/2:
974974        case 0x8078/2:  // Attributes (SD0-7)
975            verboselog(space->machine(), 2, "scc68070_periphs_w: MMU descriptor %d attributes: %04x & %04x\n", (offset - 0x4020) / 4, data, mem_mask);
975            verboselog(space.machine(), 2, "scc68070_periphs_w: MMU descriptor %d attributes: %04x & %04x\n", (offset - 0x4020) / 4, data, mem_mask);
976976            COMBINE_DATA(&scc68070->mmu.desc[(offset - 0x4020) / 4].attr);
977977            break;
978978        case 0x8042/2:
r17963r17964
983983        case 0x806a/2:
984984        case 0x8072/2:
985985        case 0x807a/2:  // Segment Length (SD0-7)
986            verboselog(space->machine(), 2, "scc68070_periphs_w: MMU descriptor %d length: %04x & %04x\n", (offset - 0x4020) / 4, data, mem_mask);
986            verboselog(space.machine(), 2, "scc68070_periphs_w: MMU descriptor %d length: %04x & %04x\n", (offset - 0x4020) / 4, data, mem_mask);
987987            COMBINE_DATA(&scc68070->mmu.desc[(offset - 0x4020) / 4].length);
988988            break;
989989        case 0x8044/2:
r17963r17964
996996        case 0x807c/2:  // Segment Number (SD0-7, A0=1 only)
997997            if(ACCESSING_BITS_0_7)
998998            {
999                verboselog(space->machine(), 2, "scc68070_periphs_w: MMU descriptor %d segment: %04x & %04x\n", (offset - 0x4020) / 4, data, mem_mask);
999                verboselog(space.machine(), 2, "scc68070_periphs_w: MMU descriptor %d segment: %04x & %04x\n", (offset - 0x4020) / 4, data, mem_mask);
10001000                scc68070->mmu.desc[(offset - 0x4020) / 4].segment = data & 0x00ff;
10011001            }
10021002            break;
r17963r17964
10081008        case 0x806e/2:
10091009        case 0x8076/2:
10101010        case 0x807e/2:  // Base Address (SD0-7)
1011            verboselog(space->machine(), 2, "scc68070_periphs_w: MMU descriptor %d base: %04x & %04x\n", (offset - 0x4020) / 4, data, mem_mask);
1011            verboselog(space.machine(), 2, "scc68070_periphs_w: MMU descriptor %d base: %04x & %04x\n", (offset - 0x4020) / 4, data, mem_mask);
10121012            COMBINE_DATA(&scc68070->mmu.desc[(offset - 0x4020) / 4].base);
10131013            break;
10141014        default:
1015            verboselog(space->machine(), 0, "scc68070_periphs_w: Unknown address: %04x = %04x & %04x\n", offset * 2, data, mem_mask);
1015            verboselog(space.machine(), 0, "scc68070_periphs_w: Unknown address: %04x = %04x & %04x\n", offset * 2, data, mem_mask);
10161016            break;
10171017    }
10181018}
trunk/src/mame/includes/midyunit.h
r17963r17964
129129
130130
131131
132void midyunit_to_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg);
133void midyunit_from_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg);
132void midyunit_to_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg);
133void midyunit_from_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg);
134134
135135
136136
trunk/src/mame/includes/nbmj9195.h
r17963r17964
122122
123123
124124
125void nbmj9195_clutsel_w(address_space *space, int data);
126void nbmj9195_gfxflag2_w(address_space *space, int data);
125void nbmj9195_clutsel_w(address_space &space, int data);
126void nbmj9195_gfxflag2_w(address_space &space, int data);
trunk/src/mame/includes/artmagic.h
r17963r17964
5656
5757
5858
59void artmagic_to_shiftreg(address_space *space, offs_t address, UINT16 *data);
60void artmagic_from_shiftreg(address_space *space, offs_t address, UINT16 *data);
59void artmagic_to_shiftreg(address_space &space, offs_t address, UINT16 *data);
60void artmagic_from_shiftreg(address_space &space, offs_t address, UINT16 *data);
6161
6262
6363void artmagic_scanline(screen_device &screen, bitmap_rgb32 &bitmap, int scanline, const tms34010_display_params *params);
trunk/src/mame/includes/exterm.h
r17963r17964
4343
4444void exterm_scanline_update(screen_device &screen, bitmap_ind16 &bitmap, int scanline, const tms34010_display_params *params);
4545
46void exterm_to_shiftreg_master(address_space *space, UINT32 address, UINT16* shiftreg);
47void exterm_from_shiftreg_master(address_space *space, UINT32 address, UINT16* shiftreg);
48void exterm_to_shiftreg_slave(address_space *space, UINT32 address, UINT16* shiftreg);
49void exterm_from_shiftreg_slave(address_space *space, UINT32 address, UINT16* shiftreg);
46void exterm_to_shiftreg_master(address_space &space, UINT32 address, UINT16* shiftreg);
47void exterm_from_shiftreg_master(address_space &space, UINT32 address, UINT16* shiftreg);
48void exterm_to_shiftreg_slave(address_space &space, UINT32 address, UINT16* shiftreg);
49void exterm_from_shiftreg_slave(address_space &space, UINT32 address, UINT16* shiftreg);
trunk/src/mame/includes/midtunit.h
r17963r17964
8787
8888
8989
90void midtunit_to_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg);
91void midtunit_from_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg);
90void midtunit_to_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg);
91void midtunit_from_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg);
9292
9393
9494
trunk/src/mame/includes/segaorun.h
r17963r17964
101101
102102   // wrappers for legacy functions (to be removed)
103103   template<read16_space_func _Legacy>
104   READ16_MEMBER( legacy_wrapper_r ) { return _Legacy(&space, offset, mem_mask); }
104   READ16_MEMBER( legacy_wrapper_r ) { return _Legacy(space, offset, mem_mask); }
105105   template<write16_space_func _Legacy>
106   WRITE16_MEMBER( legacy_wrapper ) { _Legacy(&space, offset, data, mem_mask); }
106   WRITE16_MEMBER( legacy_wrapper ) { _Legacy(space, offset, data, mem_mask); }
107107
108108protected:
109109   // timer IDs
trunk/src/mame/includes/hyprduel.h
r17963r17964
7777   DECLARE_WRITE16_MEMBER(hyprduel_window_w);
7878   DECLARE_WRITE16_MEMBER(hyprduel_scrollreg_w);
7979   DECLARE_WRITE16_MEMBER(hyprduel_scrollreg_init_w);
80   void blt_write( address_space *space, const int tmap, const offs_t offs, const UINT16 data, const UINT16 mask );
80   void blt_write( address_space &space, const int tmap, const offs_t offs, const UINT16 data, const UINT16 mask );
8181   DECLARE_DRIVER_INIT(magerror);
8282   DECLARE_DRIVER_INIT(hyprduel);
8383   TILE_GET_INFO_MEMBER(get_tile_info_0_8bit);
trunk/src/mame/includes/jpmimpct.h
r17963r17964
114114/*----------- defined in video/jpmimpct.c -----------*/
115115
116116
117void jpmimpct_to_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg);
118void jpmimpct_from_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg);
117void jpmimpct_to_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg);
118void jpmimpct_from_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg);
119119void jpmimpct_scanline_update(screen_device &screen, bitmap_rgb32 &bitmap, int scanline, const tms34010_display_params *params);
120120
121121
trunk/src/mame/includes/model3.h
r17963r17964
220220SCREEN_UPDATE_IND16(model3);
221221
222222void real3d_display_list_end(running_machine &machine);
223void real3d_display_list1_dma(address_space *space, UINT32 src, UINT32 dst, int length, int byteswap);
224void real3d_display_list2_dma(address_space *space, UINT32 src, UINT32 dst, int length, int byteswap);
225void real3d_vrom_texture_dma(address_space *space, UINT32 src, UINT32 dst, int length, int byteswap);
226void real3d_texture_fifo_dma(address_space *space, UINT32 src, int length, int byteswap);
227void real3d_polygon_ram_dma(address_space *space, UINT32 src, UINT32 dst, int length, int byteswap);
223void real3d_display_list1_dma(address_space &space, UINT32 src, UINT32 dst, int length, int byteswap);
224void real3d_display_list2_dma(address_space &space, UINT32 src, UINT32 dst, int length, int byteswap);
225void real3d_vrom_texture_dma(address_space &space, UINT32 src, UINT32 dst, int length, int byteswap);
226void real3d_texture_fifo_dma(address_space &space, UINT32 src, int length, int byteswap);
227void real3d_polygon_ram_dma(address_space &space, UINT32 src, UINT32 dst, int length, int byteswap);
trunk/src/mame/includes/pastelg.h
r17963r17964
4444
4545
4646
47int pastelg_blitter_src_addr_r(address_space *space);
47int pastelg_blitter_src_addr_r(address_space &space);
trunk/src/mame/includes/btoads.h
r17963r17964
5757   DECLARE_READ16_MEMBER( vram_fg_display_r );
5858   DECLARE_READ16_MEMBER( vram_fg_draw_r );
5959   void render_sprite_row(UINT16 *sprite_source, UINT32 address);
60   void to_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg);
61   static void static_to_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg) { space->machine().driver_data<btoads_state>()->to_shiftreg(space, address, shiftreg); }
62   void from_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg);
63   static void static_from_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg) { space->machine().driver_data<btoads_state>()->from_shiftreg(space, address, shiftreg); }
60   void to_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg);
61   static void static_to_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg) { space.machine().driver_data<btoads_state>()->to_shiftreg(space, address, shiftreg); }
62   void from_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg);
63   static void static_from_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg) { space.machine().driver_data<btoads_state>()->from_shiftreg(space, address, shiftreg); }
6464   void scanline_update(screen_device &screen, bitmap_rgb32 &bitmap, int scanline, const tms34010_display_params *params);
6565   static void static_scanline_update(screen_device &screen, bitmap_rgb32 &bitmap, int scanline, const tms34010_display_params *params) { screen.machine().driver_data<btoads_state>()->scanline_update(screen, bitmap, scanline, params); }
6666
trunk/src/mame/includes/gaelcrpt.h
r17963r17964
11/*----------- defined in machine/gaelcrpt.c -----------*/
22
3UINT16 gaelco_decrypt(address_space *space, int offset, int data, int param1, int param2);
3UINT16 gaelco_decrypt(address_space &space, int offset, int data, int param1, int param2);
trunk/src/mame/includes/metro.h
r17963r17964
132132   DECLARE_WRITE16_MEMBER(metro_vram_1_w);
133133   DECLARE_WRITE16_MEMBER(metro_vram_2_w);
134134   DECLARE_WRITE16_MEMBER(metro_window_w);
135   void blt_write( address_space *space, const int tmap, const offs_t offs, const UINT16 data, const UINT16 mask );
135   void blt_write( address_space &space, const int tmap, const offs_t offs, const UINT16 data, const UINT16 mask );
136136   DECLARE_CUSTOM_INPUT_MEMBER(custom_soundstatus_r);
137137   DECLARE_WRITE16_MEMBER(gakusai_oki_bank_hi_w);
138138   DECLARE_WRITE16_MEMBER(gakusai_oki_bank_lo_w);
trunk/src/mame/includes/slapstic.h
r17963r17964
1515void slapstic_reset(void);
1616
1717int slapstic_bank(void);
18int slapstic_tweak(address_space *space, offs_t offset);
18int slapstic_tweak(address_space &space, offs_t offset);
trunk/src/mame/includes/ojankohs.h
r17963r17964
8585SCREEN_UPDATE_IND16( ojankohs );
8686SCREEN_UPDATE_IND16( ojankoc );
8787
88void ojankoc_flipscreen(address_space *space, int data);
88void ojankoc_flipscreen(address_space &space, int data);
8989
trunk/src/mame/includes/nb1414m4.h
r17963r17964
1void nb_1414m4_exec(address_space *space,UINT16 mcu_cmd,UINT8 *vram,UINT16 &scrollx,UINT16 &scrolly,tilemap_t *tilemap);
1void nb_1414m4_exec(address_space &space,UINT16 mcu_cmd,UINT8 *vram,UINT16 &scrollx,UINT16 &scrolly,tilemap_t *tilemap);
trunk/src/mame/includes/harddriv.h
r17963r17964
356356/*----------- defined in video/harddriv.c -----------*/
357357
358358
359void hdgsp_write_to_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg);
360void hdgsp_read_from_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg);
359void hdgsp_write_to_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg);
360void hdgsp_read_from_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg);
361361
362362READ16_HANDLER( hdgsp_control_lo_r );
363363WRITE16_HANDLER( hdgsp_control_lo_w );
trunk/src/mame/includes/atari.h
r17963r17964
213213    UINT16  data[HWIDTH];       /* graphics data buffer (text through chargen) */
214214};
215215
216typedef void (*atari_renderer_func)(address_space *space, VIDEO *video);
216typedef void (*atari_renderer_func)(address_space &space, VIDEO *video);
217217
218218struct ANTIC {
219219   atari_renderer_func   renderer;   /* current renderer */
r17963r17964
263263   bitmap_ind16 *bitmap;
264264};
265265
266#define RDANTIC(space)      space->read_byte(antic.dpage+antic.doffs)
267#define RDVIDEO(space,o)   space->read_byte(antic.vpage+((antic.voffs+(o))&VOFFS))
268#define RDCHGEN(space,o)   space->read_byte(antic.chbase+(o))
269#define RDPMGFXS(space,o)   space->read_byte(antic.pmbase_s+(o)+(antic.scanline>>1))
270#define RDPMGFXD(space,o)   space->read_byte(antic.pmbase_d+(o)+antic.scanline)
266#define RDANTIC(space)      space.read_byte(antic.dpage+antic.doffs)
267#define RDVIDEO(space,o)   space.read_byte(antic.vpage+((antic.voffs+(o))&VOFFS))
268#define RDCHGEN(space,o)   space.read_byte(antic.chbase+(o))
269#define RDPMGFXS(space,o)   space.read_byte(antic.pmbase_s+(o)+(antic.scanline>>1))
270#define RDPMGFXD(space,o)   space.read_byte(antic.pmbase_d+(o)+antic.scanline)
271271
272272#define PREPARE()                                    \
273273   UINT32 *dst = (UINT32 *)&antic.cclock[PMOFFSET]
r17963r17964
538538 READ8_HANDLER ( atari_antic_r );
539539WRITE8_HANDLER ( atari_antic_w );
540540
541#define ANTIC_RENDERER(name) void name(address_space *space, VIDEO *video)
541#define ANTIC_RENDERER(name) void name(address_space &space, VIDEO *video)
542542
543543ANTIC_RENDERER( antic_mode_0_xx );
544544ANTIC_RENDERER( antic_mode_2_32 );
trunk/src/mame/includes/eolithsp.h
r17963r17964
11/*----------- defined in drivers/eolithsp.c -----------*/
22
3void eolith_speedup_read(address_space *space);
3void eolith_speedup_read(address_space &space);
44void init_eolith_speedup(running_machine &machine);
55TIMER_DEVICE_CALLBACK( eolith_speedup );
66
trunk/src/mame/includes/neogeo.h
r17963r17964
213213/*----------- defined in drivers/neogeo.c -----------*/
214214
215215void neogeo_set_display_position_interrupt_control(running_machine &machine, UINT16 data);
216void neogeo_set_display_counter_msb(address_space *space, UINT16 data);
217void neogeo_set_display_counter_lsb(address_space *space, UINT16 data);
216void neogeo_set_display_counter_msb(address_space &space, UINT16 data);
217void neogeo_set_display_counter_lsb(address_space &space, UINT16 data);
218218void neogeo_acknowledge_interrupt(running_machine &machine, UINT16 data);
219void neogeo_set_main_cpu_bank_address(address_space *space, UINT32 bank_address);
219void neogeo_set_main_cpu_bank_address(address_space &space, UINT32 bank_address);
220220DEVICE_IMAGE_LOAD( neo_cartridge );
221221
222222
trunk/src/mame/includes/segas16b.h
r17963r17964
141141
142142   // wrappers for legacy functions (to be removed)
143143   template<write16_space_func _Legacy>
144   WRITE16_MEMBER( legacy_wrapper ) { _Legacy(&space, offset, data, mem_mask); }
144   WRITE16_MEMBER( legacy_wrapper ) { _Legacy(space, offset, data, mem_mask); }
145145
146146protected:
147147   // internal types
trunk/src/mame/includes/williams.h
r17963r17964
123123
124124/*----------- defined in drivers/williams.c -----------*/
125125
126void defender_install_io_space(address_space *space);
126void defender_install_io_space(address_space &space);
127127
128128
129129/*----------- defined in machine/williams.c -----------*/
trunk/src/mame/includes/atarigt.h
r17963r17964
3838
3939   required_shared_ptr<UINT32> m_mo_command;
4040
41   void         (*m_protection_w)(address_space *space, offs_t offset, UINT16 data);
42   void         (*m_protection_r)(address_space *space, offs_t offset, UINT16 *data);
41   void         (*m_protection_w)(address_space &space, offs_t offset, UINT16 data);
42   void         (*m_protection_r)(address_space &space, offs_t offset, UINT16 *data);
4343
4444   UINT8         m_ignore_writes;
4545   offs_t         m_protaddr[ADDRSEQ_COUNT];
trunk/src/mame/includes/segas18.h
r17963r17964
113113
114114   // wrappers for legacy functions (to be removed)
115115   template<read16_space_func _Legacy>
116   READ16_MEMBER( legacy_wrapper_r ) { return _Legacy(&space, offset, mem_mask); }
116   READ16_MEMBER( legacy_wrapper_r ) { return _Legacy(space, offset, mem_mask); }
117117   template<write16_space_func _Legacy>
118   WRITE16_MEMBER( legacy_wrapper ) { _Legacy(&space, offset, data, mem_mask); }
118   WRITE16_MEMBER( legacy_wrapper ) { _Legacy(space, offset, data, mem_mask); }
119119
120120protected:
121121   // timer IDs
trunk/src/mame/video/antic.c
r17963r17964
9090      data = antic.r.antic09;
9191      break;
9292   case 10: /* WSYNC read */
93      space->machine().device("maincpu")->execute().spin_until_trigger(TRIGGER_HSYNC);
93      space.machine().device("maincpu")->execute().spin_until_trigger(TRIGGER_HSYNC);
9494      antic.w.wsync = 1;
9595      data = antic.r.antic0a;
9696      break;
r17963r17964
200200      break;
201201   case 10: /* WSYNC write */
202202      LOG(("ANTIC 0A write WSYNC  $%02X\n", data));
203      space->machine().device("maincpu")->execute().spin_until_trigger(TRIGGER_HSYNC);
203      space.machine().device("maincpu")->execute().spin_until_trigger(TRIGGER_HSYNC);
204204      antic.w.wsync = 1;
205205      break;
206206   case 11:
trunk/src/mame/video/xevious.c
r17963r17964
240240
241241WRITE8_HANDLER( xevious_fg_videoram_w )
242242{
243   xevious_state *state =  space->machine().driver_data<xevious_state>();
243   xevious_state *state =  space.machine().driver_data<xevious_state>();
244244
245245   state->m_xevious_fg_videoram[offset] = data;
246246   state->m_fg_tilemap->mark_tile_dirty(offset);
r17963r17964
248248
249249WRITE8_HANDLER( xevious_fg_colorram_w )
250250{
251   xevious_state *state =  space->machine().driver_data<xevious_state>();
251   xevious_state *state =  space.machine().driver_data<xevious_state>();
252252
253253   state->m_xevious_fg_colorram[offset] = data;
254254   state->m_fg_tilemap->mark_tile_dirty(offset);
r17963r17964
256256
257257WRITE8_HANDLER( xevious_bg_videoram_w )
258258{
259   xevious_state *state =  space->machine().driver_data<xevious_state>();
259   xevious_state *state =  space.machine().driver_data<xevious_state>();
260260
261261   state->m_xevious_bg_videoram[offset] = data;
262262   state->m_bg_tilemap->mark_tile_dirty(offset);
r17963r17964
264264
265265WRITE8_HANDLER( xevious_bg_colorram_w )
266266{
267   xevious_state *state =  space->machine().driver_data<xevious_state>();
267   xevious_state *state =  space.machine().driver_data<xevious_state>();
268268
269269   state->m_xevious_bg_colorram[offset] = data;
270270   state->m_bg_tilemap->mark_tile_dirty(offset);
r17963r17964
272272
273273WRITE8_HANDLER( xevious_vh_latch_w )
274274{
275   xevious_state *state =  space->machine().driver_data<xevious_state>();
275   xevious_state *state =  space.machine().driver_data<xevious_state>();
276276
277277   int reg;
278278   int scroll = data + ((offset&0x01)<<8);   /* A0 -> D8 */
r17963r17964
306306/* emulation for schematic 9B */
307307WRITE8_HANDLER( xevious_bs_w )
308308{
309   xevious_state *state =  space->machine().driver_data<xevious_state>();
309   xevious_state *state =  space.machine().driver_data<xevious_state>();
310310
311311   state->m_xevious_bs[offset & 1] = data;
312312}
313313
314314READ8_HANDLER( xevious_bb_r )
315315{
316   xevious_state *state =  space->machine().driver_data<xevious_state>();
316   xevious_state *state =  space.machine().driver_data<xevious_state>();
317317
318318   UINT8 *rom2a = state->memregion("gfx4")->base();
319319   UINT8 *rom2b = rom2a+0x1000;
trunk/src/mame/video/mcd212.c
r17963r17964
13531353
13541354READ16_HANDLER( mcd212_r )
13551355{
1356    cdi_state *state = space->machine().driver_data<cdi_state>();
1356    cdi_state *state = space.machine().driver_data<cdi_state>();
13571357    mcd212_regs_t *mcd212 = &state->m_mcd212_regs;
13581358    UINT8 channel = 1 - (offset / 8);
13591359
r17963r17964
13631363        case 0x10/2:
13641364            if(ACCESSING_BITS_0_7)
13651365            {
1366                verboselog(space->machine(), 12, "mcd212_r: Status Register %d: %02x & %04x\n", channel + 1, mcd212->channel[1 - (offset / 8)].csrr, mem_mask);
1366                verboselog(space.machine(), 12, "mcd212_r: Status Register %d: %02x & %04x\n", channel + 1, mcd212->channel[1 - (offset / 8)].csrr, mem_mask);
13671367                if(channel == 0)
13681368                {
13691369                    return mcd212->channel[0].csrr;
r17963r17964
13761376                    mcd212->channel[1].csrr &= ~(MCD212_CSR2R_IT1 | MCD212_CSR2R_IT2);
13771377                    if(interrupt1)
13781378                    {
1379                        space->machine().device("maincpu")->execute().set_input_line(M68K_IRQ_1 + (interrupt1 - 1), CLEAR_LINE);
1379                        space.machine().device("maincpu")->execute().set_input_line(M68K_IRQ_1 + (interrupt1 - 1), CLEAR_LINE);
13801380                    }
13811381                    //if(interrupt2)
13821382                    //{
1383                    //  space->machine().device("maincpu")->execute().set_input_line(M68K_IRQ_1 + (interrupt2 - 1), CLEAR_LINE);
1383                    //  space.machine().device("maincpu")->execute().set_input_line(M68K_IRQ_1 + (interrupt2 - 1), CLEAR_LINE);
13841384                    //}
13851385                    return old_csr;
13861386                }
13871387            }
13881388            else
13891389            {
1390                verboselog(space->machine(), 2, "mcd212_r: Unknown Register %d: %04x\n", channel + 1, mem_mask);
1390                verboselog(space.machine(), 2, "mcd212_r: Unknown Register %d: %04x\n", channel + 1, mem_mask);
13911391            }
13921392            break;
13931393        case 0x02/2:
13941394        case 0x12/2:
1395            verboselog(space->machine(), 2, "mcd212_r: Display Command Register %d: %04x & %04x\n", (1 - (offset / 8)) + 1, mcd212->channel[1 - (offset / 8)].dcr, mem_mask);
1395            verboselog(space.machine(), 2, "mcd212_r: Display Command Register %d: %04x & %04x\n", (1 - (offset / 8)) + 1, mcd212->channel[1 - (offset / 8)].dcr, mem_mask);
13961396            return mcd212->channel[1 - (offset / 8)].dcr;
13971397        case 0x04/2:
13981398        case 0x14/2:
1399            verboselog(space->machine(), 2, "mcd212_r: Video Start Register %d: %04x & %04x\n", (1 - (offset / 8)) + 1, mcd212->channel[1 - (offset / 8)].vsr, mem_mask);
1399            verboselog(space.machine(), 2, "mcd212_r: Video Start Register %d: %04x & %04x\n", (1 - (offset / 8)) + 1, mcd212->channel[1 - (offset / 8)].vsr, mem_mask);
14001400            return mcd212->channel[1 - (offset / 8)].vsr;
14011401        case 0x08/2:
14021402        case 0x18/2:
1403            verboselog(space->machine(), 2, "mcd212_r: Display Decoder Register %d: %04x & %04x\n", (1 - (offset / 8)) + 1, mcd212->channel[1 - (offset / 8)].ddr, mem_mask);
1403            verboselog(space.machine(), 2, "mcd212_r: Display Decoder Register %d: %04x & %04x\n", (1 - (offset / 8)) + 1, mcd212->channel[1 - (offset / 8)].ddr, mem_mask);
14041404            return mcd212->channel[1 - (offset / 8)].ddr;
14051405        case 0x0a/2:
14061406        case 0x1a/2:
1407            verboselog(space->machine(), 2, "mcd212_r: DCA Pointer Register %d: %04x & %04x\n", (1 - (offset / 8)) + 1, mcd212->channel[1 - (offset / 8)].dcp, mem_mask);
1407            verboselog(space.machine(), 2, "mcd212_r: DCA Pointer Register %d: %04x & %04x\n", (1 - (offset / 8)) + 1, mcd212->channel[1 - (offset / 8)].dcp, mem_mask);
14081408            return mcd212->channel[1 - (offset / 8)].dcp;
14091409        default:
1410            verboselog(space->machine(), 2, "mcd212_r: Unknown Register %d & %04x\n", (1 - (offset / 8)) + 1, mem_mask);
1410            verboselog(space.machine(), 2, "mcd212_r: Unknown Register %d & %04x\n", (1 - (offset / 8)) + 1, mem_mask);
14111411            break;
14121412    }
14131413
r17963r17964
14161416
14171417WRITE16_HANDLER( mcd212_w )
14181418{
1419    cdi_state *state = space->machine().driver_data<cdi_state>();
1419    cdi_state *state = space.machine().driver_data<cdi_state>();
14201420    mcd212_regs_t *mcd212 = &state->m_mcd212_regs;
14211421
14221422    switch(offset)
14231423    {
14241424        case 0x00/2:
14251425        case 0x10/2:
1426            verboselog(space->machine(), 2, "mcd212_w: Status Register %d: %04x & %04x\n", (1 - (offset / 8)) + 1, data, mem_mask);
1426            verboselog(space.machine(), 2, "mcd212_w: Status Register %d: %04x & %04x\n", (1 - (offset / 8)) + 1, data, mem_mask);
14271427            COMBINE_DATA(&mcd212->channel[1 - (offset / 8)].csrw);
1428            mcd212_update_visible_area(space->machine());
1428            mcd212_update_visible_area(space.machine());
14291429            break;
14301430        case 0x02/2:
14311431        case 0x12/2:
1432            verboselog(space->machine(), 2, "mcd212_w: Display Command Register %d: %04x & %04x\n", (1 - (offset / 8)) + 1, data, mem_mask);
1432            verboselog(space.machine(), 2, "mcd212_w: Display Command Register %d: %04x & %04x\n", (1 - (offset / 8)) + 1, data, mem_mask);
14331433            COMBINE_DATA(&mcd212->channel[1 - (offset / 8)].dcr);
1434            mcd212_update_visible_area(space->machine());
1434            mcd212_update_visible_area(space.machine());
14351435            break;
14361436        case 0x04/2:
14371437        case 0x14/2:
1438            verboselog(space->machine(), 2, "mcd212_w: Video Start Register %d: %04x & %04x\n", (1 - (offset / 8)) + 1, data, mem_mask);
1438            verboselog(space.machine(), 2, "mcd212_w: Video Start Register %d: %04x & %04x\n", (1 - (offset / 8)) + 1, data, mem_mask);
14391439            COMBINE_DATA(&mcd212->channel[1 - (offset / 8)].vsr);
14401440            break;
14411441        case 0x08/2:
14421442        case 0x18/2:
1443            verboselog(space->machine(), 2, "mcd212_w: Display Decoder Register %d: %04x & %04x\n", (1 - (offset / 8)) + 1, data, mem_mask);
1443            verboselog(space.machine(), 2, "mcd212_w: Display Decoder Register %d: %04x & %04x\n", (1 - (offset / 8)) + 1, data, mem_mask);
14441444            COMBINE_DATA(&mcd212->channel[1 - (offset / 8)].ddr);
14451445            break;
14461446        case 0x0a/2:
14471447        case 0x1a/2:
1448            verboselog(space->machine(), 2, "mcd212_w: DCA Pointer Register %d: %04x & %04x\n", (1 - (offset / 8)) + 1, data, mem_mask);
1448            verboselog(space.machine(), 2, "mcd212_w: DCA Pointer Register %d: %04x & %04x\n", (1 - (offset / 8)) + 1, data, mem_mask);
14491449            COMBINE_DATA(&mcd212->channel[1 - (offset / 8)].dcp);
14501450            break;
14511451        default:
1452            verboselog(space->machine(), 2, "mcd212_w: Unknown Register %d: %04x & %04x\n", (1 - (offset / 8)) + 1, data, mem_mask);
1452            verboselog(space.machine(), 2, "mcd212_w: Unknown Register %d: %04x & %04x\n", (1 - (offset / 8)) + 1, data, mem_mask);
14531453            break;
14541454    }
14551455}
trunk/src/mame/video/midyunit.c
r17963r17964
171171 *
172172 *************************************/
173173
174void midyunit_to_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
174void midyunit_to_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg)
175175{
176   midyunit_state *state = space->machine().driver_data<midyunit_state>();
176   midyunit_state *state = space.machine().driver_data<midyunit_state>();
177177   memcpy(shiftreg, &state->m_local_videoram[address >> 3], 2 * 512 * sizeof(UINT16));
178178}
179179
180180
181void midyunit_from_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
181void midyunit_from_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg)
182182{
183   midyunit_state *state = space->machine().driver_data<midyunit_state>();
183   midyunit_state *state = space.machine().driver_data<midyunit_state>();
184184   memcpy(&state->m_local_videoram[address >> 3], shiftreg, 2 * 512 * sizeof(UINT16));
185185}
186186
trunk/src/mame/video/ygv608.c
r17963r17964
12111211         if (++p3_state == 3)
12121212         {
12131213            p3_state = 0;
1214            palette_set_color_rgb(space->machine(),ygv608.regs.s.cc,
1214            palette_set_color_rgb(space.machine(),ygv608.regs.s.cc,
12151215                pal6bit(ygv608.colour_palette[ygv608.regs.s.cc][0]),
12161216                pal6bit(ygv608.colour_palette[ygv608.regs.s.cc][1]),
12171217                pal6bit(ygv608.colour_palette[ygv608.regs.s.cc][2]) );
r17963r17964
12281228#endif
12291229         SetPreShortcuts (regNum, data);
12301230         ygv608.regs.b[regNum] = data;
1231         SetPostShortcuts (space->machine(), regNum);
1231         SetPostShortcuts (space.machine(), regNum);
12321232         if (ygv608.ports.s.p5 & p5_rwai)
12331233         {
12341234            regNum ++;
r17963r17964
12551255      case 0x07: /* P#7 - system control port */
12561256         ygv608.ports.b[7] = data;
12571257         if (ygv608.ports.b[7] & 0x3e)
1258            HandleRomTransfers(space->machine());
1258            HandleRomTransfers(space.machine());
12591259         if (ygv608.ports.b[7] & 0x01)
1260            HandleYGV608Reset(space->machine());
1260            HandleYGV608Reset(space.machine());
12611261         break;
12621262
12631263      default:
trunk/src/mame/video/stvvdp1.c
r17963r17964
166166
167167READ16_HANDLER( saturn_vdp1_regs_r )
168168{
169   saturn_state *state = space->machine().driver_data<saturn_state>();
169   saturn_state *state = space.machine().driver_data<saturn_state>();
170170
171   //logerror ("cpu %s (PC=%08X) VDP1: Read from Registers, Offset %04x\n", space->device().tag(), space->device().safe_pc(), offset);
171   //logerror ("cpu %s (PC=%08X) VDP1: Read from Registers, Offset %04x\n", space.device().tag(), space.device().safe_pc(), offset);
172172
173173   switch(offset)
174174   {
r17963r17964
194194
195195         return modr;
196196      default:
197         printf ("cpu %s (PC=%08X) VDP1: Read from Registers, Offset %04x\n", space->device().tag(), space->device().safe_pc(), offset*2);
197         printf ("cpu %s (PC=%08X) VDP1: Read from Registers, Offset %04x\n", space.device().tag(), space.device().safe_pc(), offset*2);
198198         break;
199199   }
200200
r17963r17964
288288
289289WRITE16_HANDLER( saturn_vdp1_regs_w )
290290{
291   saturn_state *state = space->machine().driver_data<saturn_state>();
291   saturn_state *state = space.machine().driver_data<saturn_state>();
292292   COMBINE_DATA(&state->m_vdp1_regs[offset]);
293293
294294   switch(offset)
295295   {
296296      case 0x00/2:
297         stv_set_framebuffer_config(space->machine());
297         stv_set_framebuffer_config(space.machine());
298298         if ( VDP1_LOG ) logerror( "VDP1: Access to register TVMR = %1X\n", STV_VDP1_TVMR );
299299
300300         break;
301301      case 0x02/2:
302         stv_set_framebuffer_config(space->machine());
302         stv_set_framebuffer_config(space.machine());
303303         if ( VDP1_LOG ) logerror( "VDP1: Access to register FBCR = %1X\n", STV_VDP1_FBCR );
304304         state->m_vdp1.fbcr_accessed = 1;
305305         break;
306306      case 0x04/2:
307307         if ( VDP1_LOG ) logerror( "VDP1: Access to register PTMR = %1X\n", STV_VDP1_PTM );
308308         if ( STV_VDP1_PTMR == 1 )
309            stv_vdp1_process_list( space->machine() );
309            stv_vdp1_process_list( space.machine() );
310310
311311         break;
312312      case 0x06/2:
r17963r17964
332332
333333READ32_HANDLER ( saturn_vdp1_vram_r )
334334{
335   saturn_state *state = space->machine().driver_data<saturn_state>();
335   saturn_state *state = space.machine().driver_data<saturn_state>();
336336   return state->m_vdp1_vram[offset];
337337}
338338
339339
340340WRITE32_HANDLER ( saturn_vdp1_vram_w )
341341{
342   saturn_state *state = space->machine().driver_data<saturn_state>();
342   saturn_state *state = space.machine().driver_data<saturn_state>();
343343   UINT8 *vdp1 = state->m_vdp1.gfx_decode;
344344
345345   COMBINE_DATA (&state->m_vdp1_vram[offset]);
346346
347347//  if (((offset * 4) > 0xdf) && ((offset * 4) < 0x140))
348348//  {
349//      logerror("cpu %s (PC=%08X): VRAM dword write to %08X = %08X & %08X\n", space->device().tag(), space->device().safe_pc(), offset*4, data, mem_mask);
349//      logerror("cpu %s (PC=%08X): VRAM dword write to %08X = %08X & %08X\n", space.device().tag(), space.device().safe_pc(), offset*4, data, mem_mask);
350350//  }
351351
352352   data = state->m_vdp1_vram[offset];
r17963r17964
359359
360360WRITE32_HANDLER ( saturn_vdp1_framebuffer0_w )
361361{
362   saturn_state *state = space->machine().driver_data<saturn_state>();
362   saturn_state *state = space.machine().driver_data<saturn_state>();
363363   //popmessage ("STV VDP1 Framebuffer 0 WRITE offset %08x data %08x",offset, data);
364364   if ( STV_VDP1_TVM & 1 )
365365   {
r17963r17964
402402
403403READ32_HANDLER ( saturn_vdp1_framebuffer0_r )
404404{
405   saturn_state *state = space->machine().driver_data<saturn_state>();
405   saturn_state *state = space.machine().driver_data<saturn_state>();
406406   UINT32 result = 0;
407407   //popmessage ("STV VDP1 Framebuffer 0 READ offset %08x",offset);
408408   if ( STV_VDP1_TVM & 1 )
trunk/src/mame/video/nbmj9195.c
r17963r17964
6868
6969
7070******************************************************************************/
71static int nbmj9195_blitter_r(address_space *space, int offset, int vram)
71static int nbmj9195_blitter_r(address_space &space, int offset, int vram)
7272{
73   nbmj9195_state *state = space->machine().driver_data<nbmj9195_state>();
73   nbmj9195_state *state = space.machine().driver_data<nbmj9195_state>();
7474   int ret;
7575   UINT8 *GFXROM = state->memregion("gfx1")->base();
7676
r17963r17964
8484   return ret;
8585}
8686
87static void nbmj9195_blitter_w(address_space *space, int offset, int data, int vram)
87static void nbmj9195_blitter_w(address_space &space, int offset, int data, int vram)
8888{
89   nbmj9195_state *state = space->machine().driver_data<nbmj9195_state>();
89   nbmj9195_state *state = space.machine().driver_data<nbmj9195_state>();
9090   int new_line;
9191
9292   switch (offset)
r17963r17964
9999            //  if (data & 0x20) popmessage("Unknown GFX Flag!! (0x20)");
100100               state->m_flipscreen[vram] = (data & 0x40) ? 0 : 1;
101101               state->m_dispflag[vram] = (data & 0x80) ? 1 : 0;
102               nbmj9195_vramflip(space->machine(), vram);
102               nbmj9195_vramflip(space.machine(), vram);
103103               break;
104104      case 0x01:   state->m_scrollx[vram] = (state->m_scrollx[vram] & 0x0100) | data; break;
105105      case 0x02:   state->m_scrollx[vram] = (state->m_scrollx[vram] & 0x00ff) | ((data << 8) & 0x0100);
106               new_line = space->machine().primary_screen->vpos();
106               new_line = space.machine().primary_screen->vpos();
107107               if (state->m_flipscreen[vram])
108108               {
109109                  for ( ; state->m_scanline[vram] < new_line; state->m_scanline[vram]++)
r17963r17964
126126      case 0x0b:   state->m_blitter_destx[vram] = (state->m_blitter_destx[vram]  & 0x00ff) | (data << 8); break;
127127      case 0x0c:   state->m_blitter_desty[vram] = (state->m_blitter_desty[vram]  & 0xff00) | data; break;
128128      case 0x0d:   state->m_blitter_desty[vram] = (state->m_blitter_desty[vram]  & 0x00ff) | (data << 8);
129               nbmj9195_gfxdraw(space->machine(), vram);
129               nbmj9195_gfxdraw(space.machine(), vram);
130130               break;
131131      default:   break;
132132   }
133133}
134134
135void nbmj9195_clutsel_w(address_space *space, int data)
135void nbmj9195_clutsel_w(address_space &space, int data)
136136{
137   nbmj9195_state *state = space->machine().driver_data<nbmj9195_state>();
137   nbmj9195_state *state = space.machine().driver_data<nbmj9195_state>();
138138   state->m_clutsel = data;
139139}
140140
141static void nbmj9195_clut_w(address_space *space, int offset, int data, int vram)
141static void nbmj9195_clut_w(address_space &space, int offset, int data, int vram)
142142{
143   nbmj9195_state *state = space->machine().driver_data<nbmj9195_state>();
143   nbmj9195_state *state = space.machine().driver_data<nbmj9195_state>();
144144   state->m_clut[vram][((state->m_clutsel & 0xff) * 0x10) + (offset & 0x0f)] = data;
145145}
146146
147void nbmj9195_gfxflag2_w(address_space *space, int data)
147void nbmj9195_gfxflag2_w(address_space &space, int data)
148148{
149   nbmj9195_state *state = space->machine().driver_data<nbmj9195_state>();
149   nbmj9195_state *state = space.machine().driver_data<nbmj9195_state>();
150150   state->m_gfxflag2 = data;
151151}
152152
r17963r17964
371371
372372
373373******************************************************************************/
374WRITE8_MEMBER(nbmj9195_state::nbmj9195_blitter_0_w){ nbmj9195_blitter_w(&space, offset, data, 0); }
375WRITE8_MEMBER(nbmj9195_state::nbmj9195_blitter_1_w){ nbmj9195_blitter_w(&space, offset, data, 1); }
374WRITE8_MEMBER(nbmj9195_state::nbmj9195_blitter_0_w){ nbmj9195_blitter_w(space, offset, data, 0); }
375WRITE8_MEMBER(nbmj9195_state::nbmj9195_blitter_1_w){ nbmj9195_blitter_w(space, offset, data, 1); }
376376
377READ8_MEMBER(nbmj9195_state::nbmj9195_blitter_0_r){ return nbmj9195_blitter_r(&space, offset, 0); }
378READ8_MEMBER(nbmj9195_state::nbmj9195_blitter_1_r){ return nbmj9195_blitter_r(&space, offset, 1); }
377READ8_MEMBER(nbmj9195_state::nbmj9195_blitter_0_r){ return nbmj9195_blitter_r(space, offset, 0); }
378READ8_MEMBER(nbmj9195_state::nbmj9195_blitter_1_r){ return nbmj9195_blitter_r(space, offset, 1); }
379379
380WRITE8_MEMBER(nbmj9195_state::nbmj9195_clut_0_w){ nbmj9195_clut_w(&space, offset, data, 0); }
381WRITE8_MEMBER(nbmj9195_state::nbmj9195_clut_1_w){ nbmj9195_clut_w(&space, offset, data, 1); }
380WRITE8_MEMBER(nbmj9195_state::nbmj9195_clut_0_w){ nbmj9195_clut_w(space, offset, data, 0); }
381WRITE8_MEMBER(nbmj9195_state::nbmj9195_clut_1_w){ nbmj9195_clut_w(space, offset, data, 1); }
382382
383383/******************************************************************************
384384
trunk/src/mame/video/artmagic.c
r17963r17964
5757 *
5858 *************************************/
5959
60void artmagic_to_shiftreg(address_space *space, offs_t address, UINT16 *data)
60void artmagic_to_shiftreg(address_space &space, offs_t address, UINT16 *data)
6161{
62   artmagic_state *state = space->machine().driver_data<artmagic_state>();
62   artmagic_state *state = space.machine().driver_data<artmagic_state>();
6363   UINT16 *vram = address_to_vram(state, &address);
6464   if (vram)
6565      memcpy(data, &vram[address], TOBYTE(0x2000));
6666}
6767
6868
69void artmagic_from_shiftreg(address_space *space, offs_t address, UINT16 *data)
69void artmagic_from_shiftreg(address_space &space, offs_t address, UINT16 *data)
7070{
71   artmagic_state *state = space->machine().driver_data<artmagic_state>();
71   artmagic_state *state = space.machine().driver_data<artmagic_state>();
7272   UINT16 *vram = address_to_vram(state, &address);
7373   if (vram)
7474      memcpy(&vram[address], data, TOBYTE(0x2000));
trunk/src/mame/video/galpani2.c
r17963r17964
2525
2626
2727#ifdef UNUSED_DEFINITION
28INLINE UINT16 galpani2_bg8_regs_r(address_space *space, offs_t offset, int n)
28INLINE UINT16 galpani2_bg8_regs_r(address_space &space, offs_t offset, int n)
2929{
30   galpani2_state *state = space->machine().driver_data<galpani2_state>();
30   galpani2_state *state = space.machine().driver_data<galpani2_state>();
3131   switch (offset * 2)
3232   {
33      case 0x16:   return space->machine().rand() & 1;
33      case 0x16:   return space.machine().rand() & 1;
3434      default:
35         logerror("CPU #0 PC %06X : Warning, bg8 #%d screen reg %04X read\n",space->cpu->safe_pc(),_n_,offset*2);
35         logerror("CPU #0 PC %06X : Warning, bg8 #%d screen reg %04X read\n",space.cpu->safe_pc(),_n_,offset*2);
3636   }
3737   return state->m_bg8_regs[_n_][offset];
3838}
r17963r17964
4444    c04         0003 flip, 0300 flip?
4545    c1c/e       01ff scroll, 3000 ?
4646*/
47INLINE void galpani2_bg8_regs_w(address_space *space, offs_t offset, UINT16 data, UINT16 mem_mask, int _n_)
47INLINE void galpani2_bg8_regs_w(address_space &space, offs_t offset, UINT16 data, UINT16 mem_mask, int _n_)
4848{
49   galpani2_state *state = space->machine().driver_data<galpani2_state>();
49   galpani2_state *state = space.machine().driver_data<galpani2_state>();
5050   COMBINE_DATA(&state->m_bg8_regs[_n_][offset]);
5151}
5252
r17963r17964
5757WRITE16_HANDLER( galpani2_bg8_regs_1_w ) { galpani2_bg8_regs_w(space, offset, data, mem_mask, 1); }
5858#endif
5959
60INLINE void galpani2_bg8_w(address_space *space, offs_t offset, UINT16 data, UINT16 mem_mask, int _n_)
60INLINE void galpani2_bg8_w(address_space &space, offs_t offset, UINT16 data, UINT16 mem_mask, int _n_)
6161{
62   galpani2_state *state = space->machine().driver_data<galpani2_state>();
62   galpani2_state *state = space.machine().driver_data<galpani2_state>();
6363   int x,y,pen;
6464   UINT16 newword = COMBINE_DATA(&state->m_bg8[_n_][offset]);
6565   pen   =   newword & 0xff;
r17963r17964
7171WRITE16_HANDLER( galpani2_bg8_0_w ) { galpani2_bg8_w(space, offset, data, mem_mask, 0); }
7272WRITE16_HANDLER( galpani2_bg8_1_w ) { galpani2_bg8_w(space, offset, data, mem_mask, 1); }
7373
74INLINE void galpani2_palette_w(address_space *space, offs_t offset, UINT16 data, UINT16 mem_mask, int _n_)
74INLINE void galpani2_palette_w(address_space &space, offs_t offset, UINT16 data, UINT16 mem_mask, int _n_)
7575{
76   galpani2_state *state = space->machine().driver_data<galpani2_state>();
76   galpani2_state *state = space.machine().driver_data<galpani2_state>();
7777   UINT16 newword = COMBINE_DATA(&state->m_palette[_n_][offset]);
78   palette_set_color_rgb( space->machine(), offset + 0x4000 + _n_ * 0x100, pal5bit(newword >> 5), pal5bit(newword >> 10), pal5bit(newword >> 0) );
78   palette_set_color_rgb( space.machine(), offset + 0x4000 + _n_ * 0x100, pal5bit(newword >> 5), pal5bit(newword >> 10), pal5bit(newword >> 0) );
7979}
8080
8181WRITE16_HANDLER( galpani2_palette_0_w ) { galpani2_palette_w(space, offset, data, mem_mask, 0); }
r17963r17964
9393/* 8 horizontal pages of 256x256 pixels? */
9494WRITE16_HANDLER( galpani2_bg15_w )
9595{
96   galpani2_state *state = space->machine().driver_data<galpani2_state>();
96   galpani2_state *state = space.machine().driver_data<galpani2_state>();
9797   UINT16 newword = COMBINE_DATA(&state->m_bg15[offset]);
9898
9999   int x = (offset % 256) + (offset / (256*256)) * 256 ;
trunk/src/mame/video/exterm.c
r17963r17964
3232 *
3333 *************************************/
3434
35void exterm_to_shiftreg_master(address_space *space, UINT32 address, UINT16 *shiftreg)
35void exterm_to_shiftreg_master(address_space &space, UINT32 address, UINT16 *shiftreg)
3636{
37   exterm_state *state = space->machine().driver_data<exterm_state>();
37   exterm_state *state = space.machine().driver_data<exterm_state>();
3838   memcpy(shiftreg, &state->m_master_videoram[TOWORD(address)], 256 * sizeof(UINT16));
3939}
4040
4141
42void exterm_from_shiftreg_master(address_space *space, UINT32 address, UINT16 *shiftreg)
42void exterm_from_shiftreg_master(address_space &space, UINT32 address, UINT16 *shiftreg)
4343{
44   exterm_state *state = space->machine().driver_data<exterm_state>();
44   exterm_state *state = space.machine().driver_data<exterm_state>();
4545   memcpy(&state->m_master_videoram[TOWORD(address)], shiftreg, 256 * sizeof(UINT16));
4646}
4747
4848
49void exterm_to_shiftreg_slave(address_space *space, UINT32 address, UINT16 *shiftreg)
49void exterm_to_shiftreg_slave(address_space &space, UINT32 address, UINT16 *shiftreg)
5050{
51   exterm_state *state = space->machine().driver_data<exterm_state>();
51   exterm_state *state = space.machine().driver_data<exterm_state>();
5252   memcpy(shiftreg, &state->m_slave_videoram[TOWORD(address)], 256 * 2 * sizeof(UINT8));
5353}
5454
5555
56void exterm_from_shiftreg_slave(address_space *space, UINT32 address, UINT16 *shiftreg)
56void exterm_from_shiftreg_slave(address_space &space, UINT32 address, UINT16 *shiftreg)
5757{
58   exterm_state *state = space->machine().driver_data<exterm_state>();
58   exterm_state *state = space.machine().driver_data<exterm_state>();
5959   memcpy(&state->m_slave_videoram[TOWORD(address)], shiftreg, 256 * 2 * sizeof(UINT8));
6060}
6161
trunk/src/mame/video/midtunit.c
r17963r17964
223223 *
224224 *************************************/
225225
226void midtunit_to_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
226void midtunit_to_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg)
227227{
228228   memcpy(shiftreg, &local_videoram[address >> 3], 2 * 512 * sizeof(UINT16));
229229}
230230
231231
232void midtunit_from_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
232void midtunit_from_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg)
233233{
234234   memcpy(&local_videoram[address >> 3], shiftreg, 2 * 512 * sizeof(UINT16));
235235}
trunk/src/mame/video/stvvdp2.c
r17963r17964
53615361
53625362WRITE32_HANDLER ( saturn_vdp2_vram_w )
53635363{
5364   saturn_state *state = space->machine().driver_data<saturn_state>();
5364   saturn_state *state = space.machine().driver_data<saturn_state>();
53655365   UINT8* gfxdata = state->m_vdp2.gfx_decode;
53665366
53675367   COMBINE_DATA(&state->m_vdp2_vram[offset]);
r17963r17964
53735373   gfxdata[offset*4+2] = (data & 0x0000ff00) >> 8;
53745374   gfxdata[offset*4+3] = (data & 0x000000ff) >> 0;
53755375
5376   space->machine().gfx[0]->mark_dirty(offset/8);
5377   space->machine().gfx[1]->mark_dirty(offset/8);
5378   space->machine().gfx[2]->mark_dirty(offset/8);
5379   space->machine().gfx[3]->mark_dirty(offset/8);
5376   space.machine().gfx[0]->mark_dirty(offset/8);
5377   space.machine().gfx[1]->mark_dirty(offset/8);
5378   space.machine().gfx[2]->mark_dirty(offset/8);
5379   space.machine().gfx[3]->mark_dirty(offset/8);
53805380
53815381   /* 8-bit tiles overlap, so this affects the previous one as well */
53825382   if (offset/8 != 0)
53835383   {
5384      space->machine().gfx[2]->mark_dirty(offset/8 - 1);
5385      space->machine().gfx[3]->mark_dirty(offset/8 - 1);
5384      space.machine().gfx[2]->mark_dirty(offset/8 - 1);
5385      space.machine().gfx[3]->mark_dirty(offset/8 - 1);
53865386   }
53875387
53885388   if ( stv_rbg_cache_data.watch_vdp2_vram_writes )
r17963r17964
54185418
54195419READ16_HANDLER ( saturn_vdp2_regs_r )
54205420{
5421   saturn_state *state = space->machine().driver_data<saturn_state>();
5421   saturn_state *state = space.machine().driver_data<saturn_state>();
54225422
54235423   switch(offset)
54245424   {
r17963r17964
54285428         if(!STV_VDP2_EXLTEN)
54295429         {
54305430            /* TODO: handle various h/v settings. */
5431            if(!space->debugger_access())
5431            if(!space.debugger_access())
54325432            {
5433               state->m_vdp2.h_count = space->machine().primary_screen->hpos() & 0x3ff;
5434               state->m_vdp2.v_count = space->machine().primary_screen->vpos() & (STV_VDP2_LSMD == 3 ? 0x7ff : 0x3ff);
5433               state->m_vdp2.h_count = space.machine().primary_screen->hpos() & 0x3ff;
5434               state->m_vdp2.v_count = space.machine().primary_screen->vpos() & (STV_VDP2_LSMD == 3 ? 0x7ff : 0x3ff);
54355435               /* latch flag */
54365436               state->m_vdp2.exltfg |= 1;
54375437            }
r17963r17964
54455445                               /*VBLANK              HBLANK            ODD               PAL    */
54465446         state->m_vdp2_regs[offset] = (state->m_vdp2.exltfg<<9) |
54475447                               (state->m_vdp2.exsyfg<<8) |
5448                               (get_vblank(space->machine()) << 3) |
5449                               (get_hblank(space->machine()) << 2) |
5450                               (get_odd_bit(space->machine()) << 1) |
5448                               (get_vblank(space.machine()) << 3) |
5449                               (get_hblank(space.machine()) << 2) |
5450                               (get_odd_bit(space.machine()) << 1) |
54515451                               (state->m_vdp2.pal << 0);
54525452
54535453         /* vblank bit is always 1 if DISP bit is disabled */
r17963r17964
54555455            state->m_vdp2_regs[offset] |= 1 << 3;
54565456
54575457         /* HV latches clears if this register is read */
5458         if(!space->debugger_access())
5458         if(!space.debugger_access())
54595459         {
54605460            state->m_vdp2.exltfg &= ~1;
54615461            state->m_vdp2.exsyfg &= ~1;
r17963r17964
54675467         state->m_vdp2_regs[offset] = (STV_VDP2_VRAMSZ << 15) |
54685468                               ((0 << 0) & 0xf); // VDP2 version
54695469
5470         if(!space->debugger_access())
5470         if(!space.debugger_access())
54715471            printf("Warning: VDP2 version read\n");
54725472         break;
54735473      }
r17963r17964
54875487      }
54885488
54895489      default:
5490         //if(!space->debugger_access())
5490         //if(!space.debugger_access())
54915491         //  printf("VDP2: read from register %08x %08x\n",offset*4,mem_mask);
54925492         break;
54935493   }
r17963r17964
54975497
54985498READ32_HANDLER ( saturn_vdp2_cram_r )
54995499{
5500   saturn_state *state = space->machine().driver_data<saturn_state>();
5500   saturn_state *state = space.machine().driver_data<saturn_state>();
55015501
55025502   offset &= (0xfff) >> (2);
55035503
r17963r17964
55075507
55085508READ32_HANDLER ( saturn_vdp2_vram_r )
55095509{
5510   saturn_state *state = space->machine().driver_data<saturn_state>();
5510   saturn_state *state = space.machine().driver_data<saturn_state>();
55115511
55125512   return state->m_vdp2_vram[offset];
55135513}
55145514
55155515WRITE32_HANDLER ( saturn_vdp2_cram_w )
55165516{
5517   saturn_state *state = space->machine().driver_data<saturn_state>();
5517   saturn_state *state = space.machine().driver_data<saturn_state>();
55185518   int r,g,b;
55195519   UINT8 cmode0;
55205520
r17963r17964
55345534         b = ((state->m_vdp2_cram[offset] & 0x00ff0000) >> 16);
55355535         g = ((state->m_vdp2_cram[offset] & 0x0000ff00) >> 8);
55365536         r = ((state->m_vdp2_cram[offset] & 0x000000ff) >> 0);
5537         palette_set_color(space->machine(),offset,MAKE_RGB(r,g,b));
5538         palette_set_color(space->machine(),offset^0x400,MAKE_RGB(r,g,b));
5537         palette_set_color(space.machine(),offset,MAKE_RGB(r,g,b));
5538         palette_set_color(space.machine(),offset^0x400,MAKE_RGB(r,g,b));
55395539      }
55405540      break;
55415541      /*Mode 0*/
r17963r17964
55475547         b = ((state->m_vdp2_cram[offset] & 0x00007c00) >> 10);
55485548         g = ((state->m_vdp2_cram[offset] & 0x000003e0) >> 5);
55495549         r = ((state->m_vdp2_cram[offset] & 0x0000001f) >> 0);
5550         palette_set_color_rgb(space->machine(),(offset*2)+1,pal5bit(r),pal5bit(g),pal5bit(b));
5550         palette_set_color_rgb(space.machine(),(offset*2)+1,pal5bit(r),pal5bit(g),pal5bit(b));
55515551         if(cmode0)
5552            palette_set_color_rgb(space->machine(),((offset*2)+1)^0x400,pal5bit(r),pal5bit(g),pal5bit(b));
5552            palette_set_color_rgb(space.machine(),((offset*2)+1)^0x400,pal5bit(r),pal5bit(g),pal5bit(b));
55535553
55545554         b = ((state->m_vdp2_cram[offset] & 0x7c000000) >> 26);
55555555         g = ((state->m_vdp2_cram[offset] & 0x03e00000) >> 21);
55565556         r = ((state->m_vdp2_cram[offset] & 0x001f0000) >> 16);
5557         palette_set_color_rgb(space->machine(),offset*2,pal5bit(r),pal5bit(g),pal5bit(b));
5557         palette_set_color_rgb(space.machine(),offset*2,pal5bit(r),pal5bit(g),pal5bit(b));
55585558         if(cmode0)
5559            palette_set_color_rgb(space->machine(),(offset*2)^0x400,pal5bit(r),pal5bit(g),pal5bit(b));
5559            palette_set_color_rgb(space.machine(),(offset*2)^0x400,pal5bit(r),pal5bit(g),pal5bit(b));
55605560      }
55615561      break;
55625562   }
r17963r17964
56235623
56245624WRITE16_HANDLER ( saturn_vdp2_regs_w )
56255625{
5626   saturn_state *state = space->machine().driver_data<saturn_state>();
5626   saturn_state *state = space.machine().driver_data<saturn_state>();
56275627   COMBINE_DATA(&state->m_vdp2_regs[offset]);
56285628
56295629   if(state->m_vdp2.old_crmd != STV_VDP2_CRMD)
56305630   {
56315631      state->m_vdp2.old_crmd = STV_VDP2_CRMD;
5632      refresh_palette_data(space->machine());
5632      refresh_palette_data(space.machine());
56335633   }
56345634   if(state->m_vdp2.old_tvmd != STV_VDP2_TVMD)
56355635   {
56365636      state->m_vdp2.old_tvmd = STV_VDP2_TVMD;
5637      stv_vdp2_dynamic_res_change(space->machine());
5637      stv_vdp2_dynamic_res_change(space.machine());
56385638   }
56395639
56405640   if(STV_VDP2_VRAMSZ)
56415641      printf("VDP2 sets up 8 Mbit VRAM!\n");
56425642
56435643   #if NEW_VIDEO_CODE
5644   saturn_vdp2_assign_variables(space->machine(),offset,state->m_vdp2_regs[offset]);
5644   saturn_vdp2_assign_variables(space.machine(),offset,state->m_vdp2_regs[offset]);
56455645   #endif
56465646}
56475647
trunk/src/mame/video/amiga.c
r17963r17964
206206   {
207207      if (LOG_COPPER)
208208         logerror("%02X.%02X: Write to %s = %04x\n", state->m_last_scanline, xpos / 2, amiga_custom_names[state->m_copper_pending_offset & 0xff], state->m_copper_pending_data);
209      amiga_custom_w(machine.device("maincpu")->memory().space(AS_PROGRAM), state->m_copper_pending_offset, state->m_copper_pending_data, 0xffff);
209      amiga_custom_w(*machine.device("maincpu")->memory().space(AS_PROGRAM), state->m_copper_pending_offset, state->m_copper_pending_data, 0xffff);
210210      state->m_copper_pending_offset = 0;
211211   }
212212
r17963r17964
262262         {
263263            if (LOG_COPPER)
264264               logerror("%02X.%02X: Write to %s = %04x\n", state->m_last_scanline, xpos / 2, amiga_custom_names[word0 & 0xff], word1);
265            amiga_custom_w(machine.device("maincpu")->memory().space(AS_PROGRAM), word0, word1, 0xffff);
265            amiga_custom_w(*machine.device("maincpu")->memory().space(AS_PROGRAM), word0, word1, 0xffff);
266266         }
267267         else   // additional 2 cycles needed for non-Agnus registers
268268         {
trunk/src/mame/video/fastfred.c
r17963r17964
115115
116116WRITE8_HANDLER( fastfred_videoram_w )
117117{
118   fastfred_state *state = space->machine().driver_data<fastfred_state>();
118   fastfred_state *state = space.machine().driver_data<fastfred_state>();
119119   state->m_videoram[offset] = data;
120120   state->m_bg_tilemap->mark_tile_dirty(offset);
121121}
r17963r17964
123123
124124WRITE8_HANDLER( fastfred_attributes_w )
125125{
126   fastfred_state *state = space->machine().driver_data<fastfred_state>();
126   fastfred_state *state = space.machine().driver_data<fastfred_state>();
127127   if (state->m_attributesram[offset] != data)
128128   {
129129      if (offset & 0x01)
r17963r17964
147147
148148WRITE8_HANDLER( fastfred_charbank1_w )
149149{
150   fastfred_state *state = space->machine().driver_data<fastfred_state>();
150   fastfred_state *state = space.machine().driver_data<fastfred_state>();
151151   UINT16 new_data = (state->m_charbank & 0x0200) | ((data & 0x01) << 8);
152152
153153   if (new_data != state->m_charbank)
r17963r17964
160160
161161WRITE8_HANDLER( fastfred_charbank2_w )
162162{
163   fastfred_state *state = space->machine().driver_data<fastfred_state>();
163   fastfred_state *state = space.machine().driver_data<fastfred_state>();
164164   UINT16 new_data = (state->m_charbank & 0x0100) | ((data & 0x01) << 9);
165165
166166   if (new_data != state->m_charbank)
r17963r17964
174174
175175WRITE8_HANDLER( fastfred_colorbank1_w )
176176{
177   fastfred_state *state = space->machine().driver_data<fastfred_state>();
177   fastfred_state *state = space.machine().driver_data<fastfred_state>();
178178   UINT8 new_data = (state->m_colorbank & 0x10) | ((data & 0x01) << 3);
179179
180180   if (new_data != state->m_colorbank)
r17963r17964
187187
188188WRITE8_HANDLER( fastfred_colorbank2_w )
189189{
190   fastfred_state *state = space->machine().driver_data<fastfred_state>();
190   fastfred_state *state = space.machine().driver_data<fastfred_state>();
191191   UINT8 new_data = (state->m_colorbank & 0x08) | ((data & 0x01) << 4);
192192
193193   if (new_data != state->m_colorbank)
r17963r17964
202202
203203WRITE8_HANDLER( fastfred_flip_screen_x_w )
204204{
205   fastfred_state *state = space->machine().driver_data<fastfred_state>();
205   fastfred_state *state = space.machine().driver_data<fastfred_state>();
206206   if (state->flip_screen_x() != (data & 0x01))
207207   {
208208      state->flip_screen_x_set(data & 0x01);
r17963r17964
213213
214214WRITE8_HANDLER( fastfred_flip_screen_y_w )
215215{
216   fastfred_state *state = space->machine().driver_data<fastfred_state>();
216   fastfred_state *state = space.machine().driver_data<fastfred_state>();
217217   if (state->flip_screen_y() != (data & 0x01))
218218   {
219219      state->flip_screen_y_set(data & 0x01);
r17963r17964
329329
330330WRITE8_HANDLER( imago_fg_videoram_w )
331331{
332   fastfred_state *state = space->machine().driver_data<fastfred_state>();
332   fastfred_state *state = space.machine().driver_data<fastfred_state>();
333333   state->m_imago_fg_videoram[offset] = data;
334334   state->m_fg_tilemap->mark_tile_dirty(offset);
335335}
336336
337337WRITE8_HANDLER( imago_charbank_w )
338338{
339   fastfred_state *state = space->machine().driver_data<fastfred_state>();
339   fastfred_state *state = space.machine().driver_data<fastfred_state>();
340340   if( state->m_charbank != data )
341341   {
342342      state->m_charbank = data;
trunk/src/mame/video/galpanic.c
r17963r17964
2424
2525WRITE16_HANDLER( galpanic_bgvideoram_w )
2626{
27   galpanic_state *state = space->machine().driver_data<galpanic_state>();
27   galpanic_state *state = space.machine().driver_data<galpanic_state>();
2828   int sx,sy;
2929
3030
r17963r17964
3838
3939WRITE16_HANDLER( galpanic_paletteram_w )
4040{
41   galpanic_state *state = space->machine().driver_data<galpanic_state>();
41   galpanic_state *state = space.machine().driver_data<galpanic_state>();
4242   data = COMBINE_DATA(&state->m_generic_paletteram_16[offset]);
4343   /* bit 0 seems to be a transparency flag for the front bitmap */
44   palette_set_color_rgb(space->machine(),offset,pal5bit(data >> 6),pal5bit(data >> 11),pal5bit(data >> 1));
44   palette_set_color_rgb(space.machine(),offset,pal5bit(data >> 6),pal5bit(data >> 11),pal5bit(data >> 1));
4545}
4646
4747
trunk/src/mame/video/gticlub.c
r17963r17964
168168
169169READ32_HANDLER(K001006_0_r)
170170{
171   return K001006_r(space->machine(), 0, offset, mem_mask);
171   return K001006_r(space.machine(), 0, offset, mem_mask);
172172}
173173
174174WRITE32_HANDLER(K001006_0_w)
r17963r17964
178178
179179READ32_HANDLER(K001006_1_r)
180180{
181   return K001006_r(space->machine(), 1, offset, mem_mask);
181   return K001006_r(space.machine(), 1, offset, mem_mask);
182182}
183183
184184WRITE32_HANDLER(K001006_1_w)
r17963r17964
357357         {
358358            if (K001005_fifo_read_ptr < 0x3ff)
359359            {
360               //space->machine().device("dsp")->execute().set_input_line(SHARC_INPUT_FLAG1, CLEAR_LINE);
361               sharc_set_flag_input(space->machine().device("dsp"), 1, CLEAR_LINE);
360               //space.machine().device("dsp")->execute().set_input_line(SHARC_INPUT_FLAG1, CLEAR_LINE);
361               sharc_set_flag_input(space.machine().device("dsp"), 1, CLEAR_LINE);
362362            }
363363            else
364364            {
365               //space->machine().device("dsp")->execute().set_input_line(SHARC_INPUT_FLAG1, ASSERT_LINE);
366               sharc_set_flag_input(space->machine().device("dsp"), 1, ASSERT_LINE);
365               //space.machine().device("dsp")->execute().set_input_line(SHARC_INPUT_FLAG1, ASSERT_LINE);
366               sharc_set_flag_input(space.machine().device("dsp"), 1, ASSERT_LINE);
367367            }
368368         }
369369         else
370370         {
371            //space->machine().device("dsp")->execute().set_input_line(SHARC_INPUT_FLAG1, ASSERT_LINE);
372            sharc_set_flag_input(space->machine().device("dsp"), 1, ASSERT_LINE);
371            //space.machine().device("dsp")->execute().set_input_line(SHARC_INPUT_FLAG1, ASSERT_LINE);
372            sharc_set_flag_input(space.machine().device("dsp"), 1, ASSERT_LINE);
373373         }
374374
375375         K001005_fifo_read_ptr++;
r17963r17964
394394         }
395395
396396      default:
397         mame_printf_debug("K001005_r: %08X, %08X at %08X\n", offset, mem_mask, space->device().safe_pc());
397         mame_printf_debug("K001005_r: %08X, %08X at %08X\n", offset, mem_mask, space.device().safe_pc());
398398         break;
399399   }
400400   return 0;
r17963r17964
410410         {
411411            if (K001005_fifo_write_ptr < 0x400)
412412            {
413               //space->machine().device("dsp")->execute().set_input_line(SHARC_INPUT_FLAG1, ASSERT_LINE);
414               sharc_set_flag_input(space->machine().device("dsp"), 1, ASSERT_LINE);
413               //space.machine().device("dsp")->execute().set_input_line(SHARC_INPUT_FLAG1, ASSERT_LINE);
414               sharc_set_flag_input(space.machine().device("dsp"), 1, ASSERT_LINE);
415415            }
416416            else
417417            {
418               //space->machine().device("dsp")->execute().set_input_line(SHARC_INPUT_FLAG1, CLEAR_LINE);
419               sharc_set_flag_input(space->machine().device("dsp"), 1, CLEAR_LINE);
418               //space.machine().device("dsp")->execute().set_input_line(SHARC_INPUT_FLAG1, CLEAR_LINE);
419               sharc_set_flag_input(space.machine().device("dsp"), 1, CLEAR_LINE);
420420            }
421421         }
422422         else
423423         {
424            //space->machine().device("dsp")->execute().set_input_line(SHARC_INPUT_FLAG1, ASSERT_LINE);
425            sharc_set_flag_input(space->machine().device("dsp"), 1, ASSERT_LINE);
424            //space.machine().device("dsp")->execute().set_input_line(SHARC_INPUT_FLAG1, ASSERT_LINE);
425            sharc_set_flag_input(space.machine().device("dsp"), 1, ASSERT_LINE);
426426         }
427427
428       //  mame_printf_debug("K001005 FIFO write: %08X at %08X\n", data, space->device().safe_pc());
428       //  mame_printf_debug("K001005 FIFO write: %08X at %08X\n", data, space.device().safe_pc());
429429         K001005_fifo[K001005_fifo_write_ptr] = data;
430430         K001005_fifo_write_ptr++;
431431         K001005_fifo_write_ptr &= 0x7ff;
r17963r17964
433433         // process the current vertex data if a sync command is being sent (usually means the global registers are being changed)
434434         if (data == 0x80000000)
435435         {
436            render_polygons(space->machine());
436            render_polygons(space.machine());
437437            K001005_3d_fifo_ptr = 0;
438438         }
439439
r17963r17964
450450#endif
451451
452452         // !!! HACK to get past the FIFO B test (GTI Club & Thunder Hurricane) !!!
453         if (space->device().safe_pc() == 0x201ee)
453         if (space.device().safe_pc() == 0x201ee)
454454         {
455455            // This is used to make the SHARC timeout
456            space->device().execute().spin_until_trigger(10000);
456            space.device().execute().spin_until_trigger(10000);
457457         }
458458         // !!! HACK to get past the FIFO B test (Winding Heat & Midnight Run) !!!
459         if (space->device().safe_pc() == 0x201e6)
459         if (space.device().safe_pc() == 0x201e6)
460460         {
461461            // This is used to make the SHARC timeout
462            space->device().execute().spin_until_trigger(10000);
462            space.device().execute().spin_until_trigger(10000);
463463         }
464464
465465         break;
r17963r17964
514514
515515         if (data == 2 && K001005_3d_fifo_ptr > 0)
516516         {
517            render_polygons(space->machine());
517            render_polygons(space.machine());
518518            poly_wait(poly, "render_polygons");
519519
520520#if LOG_POLY_FIFO
r17963r17964
524524#endif
525525
526526            K001005_3d_fifo_ptr = 0;
527            K001005_swap_buffers(space->machine());
527            K001005_swap_buffers(space.machine());
528528         }
529529         break;
530530
r17963r17964
549549         break;
550550
551551      default:
552         //mame_printf_debug("K001005_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, space->device().safe_pc());
552         //mame_printf_debug("K001005_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, space.device().safe_pc());
553553         break;
554554   }
555555
trunk/src/mame/video/vdc.c
r17963r17964
622622   return (temp);
623623}
624624
625WRITE8_HANDLER( vdc_0_w ) {   vdc_w( space->machine(), 0, offset, data ); }
626WRITE8_HANDLER( vdc_1_w ) {   vdc_w( space->machine(), 1, offset, data ); }
627READ8_HANDLER( vdc_0_r ) {   return vdc_r( space->machine(), 0, offset ); }
628READ8_HANDLER( vdc_1_r ) {   return vdc_r( space->machine(), 1, offset ); }
625WRITE8_HANDLER( vdc_0_w ) {   vdc_w( space.machine(), 0, offset, data ); }
626WRITE8_HANDLER( vdc_1_w ) {   vdc_w( space.machine(), 1, offset, data ); }
627READ8_HANDLER( vdc_0_r ) {   return vdc_r( space.machine(), 0, offset ); }
628READ8_HANDLER( vdc_1_r ) {   return vdc_r( space.machine(), 1, offset ); }
629629
630630PALETTE_INIT( vce )
631631{
r17963r17964
11851185
11861186static void vpc_init( running_machine &machine )
11871187{
1188   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1188   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
11891189   vpc_w( space, 0, 0x11 );
11901190   vpc_w( space, 1, 0x11 );
11911191   vpc.window1.w = 0;
trunk/src/mame/video/gauntlet.c
r17963r17964
118118
119119WRITE16_HANDLER( gauntlet_xscroll_w )
120120{
121   gauntlet_state *state = space->machine().driver_data<gauntlet_state>();
121   gauntlet_state *state = space.machine().driver_data<gauntlet_state>();
122122   UINT16 oldxscroll = *state->m_xscroll;
123123   COMBINE_DATA(state->m_xscroll);
124124
125125   /* if something changed, force a partial update */
126126   if (*state->m_xscroll != oldxscroll)
127127   {
128      space->machine().primary_screen->update_partial(space->machine().primary_screen->vpos());
128      space.machine().primary_screen->update_partial(space.machine().primary_screen->vpos());
129129
130130      /* adjust the scrolls */
131131      state->m_playfield_tilemap->set_scrollx(0, *state->m_xscroll);
r17963r17964
143143
144144WRITE16_HANDLER( gauntlet_yscroll_w )
145145{
146   gauntlet_state *state = space->machine().driver_data<gauntlet_state>();
146   gauntlet_state *state = space.machine().driver_data<gauntlet_state>();
147147   UINT16 oldyscroll = *state->m_yscroll;
148148   COMBINE_DATA(state->m_yscroll);
149149
150150   /* if something changed, force a partial update */
151151   if (*state->m_yscroll != oldyscroll)
152152   {
153      space->machine().primary_screen->update_partial(space->machine().primary_screen->vpos());
153      space.machine().primary_screen->update_partial(space.machine().primary_screen->vpos());
154154
155155      /* if the bank changed, mark all tiles dirty */
156156      if (state->m_playfield_tile_bank != (*state->m_yscroll & 3))
trunk/src/mame/video/simpsons.c
r17963r17964
9393void simpsons_video_banking( running_machine &machine, int bank )
9494{
9595   simpsons_state *state = machine.driver_data<simpsons_state>();
96   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
96   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
9797
9898   if (bank & 1)
9999   {
100      space->install_read_bank(0x0000, 0x0fff, "bank5");
101      space->install_write_handler(0x0000, 0x0fff, write8_delegate(FUNC(simpsons_state::paletteram_xBBBBBGGGGGRRRRR_byte_be_w), state));
100      space.install_read_bank(0x0000, 0x0fff, "bank5");
101      space.install_write_handler(0x0000, 0x0fff, write8_delegate(FUNC(simpsons_state::paletteram_xBBBBBGGGGGRRRRR_byte_be_w), state));
102102      state->membank("bank5")->set_base(state->m_generic_paletteram_8);
103103   }
104104   else
105      space->install_legacy_readwrite_handler(*state->m_k052109, 0x0000, 0x0fff, FUNC(k052109_r), FUNC(k052109_w));
105      space.install_legacy_readwrite_handler(*state->m_k052109, 0x0000, 0x0fff, FUNC(k052109_r), FUNC(k052109_w));
106106
107107   if (bank & 2)
108      space->install_readwrite_handler(0x2000, 0x3fff, read8_delegate(FUNC(simpsons_state::simpsons_k053247_r),state), write8_delegate(FUNC(simpsons_state::simpsons_k053247_w),state));
108      space.install_readwrite_handler(0x2000, 0x3fff, read8_delegate(FUNC(simpsons_state::simpsons_k053247_r),state), write8_delegate(FUNC(simpsons_state::simpsons_k053247_w),state));
109109   else
110      space->install_readwrite_handler(0x2000, 0x3fff, read8_delegate(FUNC(simpsons_state::simpsons_k052109_r),state), write8_delegate(FUNC(simpsons_state::simpsons_k052109_w),state));
110      space.install_readwrite_handler(0x2000, 0x3fff, read8_delegate(FUNC(simpsons_state::simpsons_k052109_r),state), write8_delegate(FUNC(simpsons_state::simpsons_k052109_w),state));
111111}
112112
113113
trunk/src/mame/video/taito_b.c
r17963r17964
2727{
2828   int i;
2929   taitob_state *state = machine.driver_data<taitob_state>();
30   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
30   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
3131
3232   for (i = 0; i < 0x40000; i++)
33      state->hitice_pixelram_w(*space, i, 0, 0xffff);
33      state->hitice_pixelram_w(space, i, 0, 0xffff);
3434}
3535
3636WRITE16_MEMBER(taitob_state::realpunc_video_ctrl_w)
trunk/src/mame/video/taitoic.c
r17963r17964
48394839         return tc0110pcr->ram[tc0110pcr->addr];
48404840
48414841      default:
4842//logerror("PC %06x: warning - read TC0110PCR address %02x\n",space->device().safe_pc(),offset);
4842//logerror("PC %06x: warning - read TC0110PCR address %02x\n",space.device().safe_pc(),offset);
48434843         return 0xff;
48444844   }
48454845}
r17963r17964
48634863         break;
48644864
48654865      default:
4866//logerror("PC %06x: warning - write %04x to TC0110PCR address %02x\n",space->device().safe_pc(),data,offset);
4866//logerror("PC %06x: warning - write %04x to TC0110PCR address %02x\n",space.device().safe_pc(),data,offset);
48674867         break;
48684868   }
48694869}
r17963r17964
48864886         break;
48874887
48884888      default:
4889//logerror("PC %06x: warning - write %04x to TC0110PCR address %02x\n",space->device().safe_pc(),data,offset);
4889//logerror("PC %06x: warning - write %04x to TC0110PCR address %02x\n",space.device().safe_pc(),data,offset);
48904890         break;
48914891   }
48924892}
r17963r17964
49114911         break;
49124912
49134913      default:
4914//logerror("PC %06x: warning - write %04x to TC0110PCR offset %02x\n",space->device().safe_pc(),data,offset);
4914//logerror("PC %06x: warning - write %04x to TC0110PCR offset %02x\n",space.device().safe_pc(),data,offset);
49154915         break;
49164916   }
49174917}
r17963r17964
49364936         break;
49374937
49384938      default:
4939//logerror("PC %06x: warning - write %04x to TC0110PCR address %02x\n",space->device().safe_pc(),data,offset);
4939//logerror("PC %06x: warning - write %04x to TC0110PCR address %02x\n",space.device().safe_pc(),data,offset);
49404940         break;
49414941   }
49424942}
trunk/src/mame/video/namcos86.c
r17963r17964
187187   }
188188}
189189
190static void scroll_w(address_space *space, int offset, int data, int layer)
190static void scroll_w(address_space &space, int offset, int data, int layer)
191191{
192   namcos86_state *state = space->machine().driver_data<namcos86_state>();
192   namcos86_state *state = space.machine().driver_data<namcos86_state>();
193193   switch (offset)
194194   {
195195      case 0:
r17963r17964
206206
207207WRITE8_MEMBER(namcos86_state::rthunder_scroll0_w)
208208{
209   scroll_w(&space,offset,data,0);
209   scroll_w(space,offset,data,0);
210210}
211211WRITE8_MEMBER(namcos86_state::rthunder_scroll1_w)
212212{
213   scroll_w(&space,offset,data,1);
213   scroll_w(space,offset,data,1);
214214}
215215WRITE8_MEMBER(namcos86_state::rthunder_scroll2_w)
216216{
217   scroll_w(&space,offset,data,2);
217   scroll_w(space,offset,data,2);
218218}
219219WRITE8_MEMBER(namcos86_state::rthunder_scroll3_w)
220220{
221   scroll_w(&space,offset,data,3);
221   scroll_w(space,offset,data,3);
222222}
223223
224224WRITE8_MEMBER(namcos86_state::rthunder_backcolor_w)
trunk/src/mame/video/itech8.c
r17963r17964
280280 *
281281 *************************************/
282282
283static void perform_blit(address_space *space)
283static void perform_blit(address_space &space)
284284{
285   itech8_state *state = space->machine().driver_data<itech8_state>();
285   itech8_state *state = space.machine().driver_data<itech8_state>();
286286   struct tms34061_display &tms_state = state->m_tms_state;
287287   UINT8 *blitter_data = state->m_blitter_data;
288288   offs_t addr = state->m_tms_state.regs[TMS34061_XYADDRESS] | ((tms_state.regs[TMS34061_XYOFFSET] & 0x300) << 8);
r17963r17964
303303   /* debugging */
304304   if (FULL_LOGGING)
305305      logerror("Blit: scan=%d  src=%06x @ (%05x) for %dx%d ... flags=%02x\n",
306            space->machine().primary_screen->vpos(),
306            space.machine().primary_screen->vpos(),
307307            (state->m_grom_bank << 16) | (BLITTER_ADDRHI << 8) | BLITTER_ADDRLO,
308308            tms_state.regs[TMS34061_XYADDRESS] | ((tms_state.regs[TMS34061_XYOFFSET] & 0x300) << 8),
309309            BLITTER_WIDTH, BLITTER_HEIGHT, BLITTER_FLAGS);
r17963r17964
498498      }
499499
500500      /* perform the blit */
501      perform_blit(&space);
501      perform_blit(space);
502502      m_blit_in_progress = 1;
503503
504504      /* set a timer to go off when we're done */
r17963r17964
528528      col ^= 2;
529529
530530   /* Row address (RA0-RA8) is not dependent on the offset */
531   tms34061_w(&space, col, 0xff, func, data);
531   tms34061_w(space, col, 0xff, func, data);
532532}
533533
534534
r17963r17964
543543      col ^= 2;
544544
545545   /* Row address (RA0-RA8) is not dependent on the offset */
546   return tms34061_r(&space, col, 0xff, func);
546   return tms34061_r(space, col, 0xff, func);
547547}
548548
549549
trunk/src/mame/video/leland.c
r17963r17964
131131 *
132132 *************************************/
133133
134static void leland_video_addr_w(address_space *space, int offset, int data, int num)
134static void leland_video_addr_w(address_space &space, int offset, int data, int num)
135135{
136   leland_state *drvstate = space->machine().driver_data<leland_state>();
136   leland_state *drvstate = space.machine().driver_data<leland_state>();
137137   struct vram_state_data *state = drvstate->m_vram_state + num;
138138
139139   if (!offset)
r17963r17964
150150 *
151151 *************************************/
152152
153static int leland_vram_port_r(address_space *space, int offset, int num)
153static int leland_vram_port_r(address_space &space, int offset, int num)
154154{
155   leland_state *drvstate = space->machine().driver_data<leland_state>();
155   leland_state *drvstate = space.machine().driver_data<leland_state>();
156156   struct vram_state_data *state = drvstate->m_vram_state + num;
157157   int addr = state->m_addr;
158158   int inc = (offset >> 2) & 2;
r17963r17964
178178
179179      default:
180180         logerror("%s: Warning: Unknown video port %02x read (address=%04x)\n",
181                  space->machine().describe_context(), offset, addr);
181                  space.machine().describe_context(), offset, addr);
182182         ret = 0;
183183         break;
184184   }
185185   state->m_addr = addr;
186186
187187   if (LOG_COMM && addr >= 0xf000)
188      logerror("%s:%s comm read %04X = %02X\n", space->machine().describe_context(), num ? "slave" : "master", addr, ret);
188      logerror("%s:%s comm read %04X = %02X\n", space.machine().describe_context(), num ? "slave" : "master", addr, ret);
189189
190190   return ret;
191191}
r17963r17964
198198 *
199199 *************************************/
200200
201static void leland_vram_port_w(address_space *space, int offset, int data, int num)
201static void leland_vram_port_w(address_space &space, int offset, int data, int num)
202202{
203   leland_state *drvstate = space->machine().driver_data<leland_state>();
203   leland_state *drvstate = space.machine().driver_data<leland_state>();
204204   UINT8 *video_ram = drvstate->m_video_ram;
205205   struct vram_state_data *state = drvstate->m_vram_state + num;
206206   int addr = state->m_addr;
r17963r17964
209209
210210   /* don't fully understand why this is needed.  Isn't the
211211       video RAM just one big RAM? */
212   int scanline = space->machine().primary_screen->vpos();
212   int scanline = space.machine().primary_screen->vpos();
213213   if (scanline > 0)
214      space->machine().primary_screen->update_partial(scanline - 1);
214      space.machine().primary_screen->update_partial(scanline - 1);
215215
216216   if (LOG_COMM && addr >= 0xf000)
217      logerror("%s:%s comm write %04X = %02X\n", space->machine().describe_context(), num ? "slave" : "master", addr, data);
217      logerror("%s:%s comm write %04X = %02X\n", space.machine().describe_context(), num ? "slave" : "master", addr, data);
218218
219219   /* based on the low 3 bits of the offset, update the destination */
220220   switch (offset & 7)
r17963r17964
266266
267267      default:
268268         logerror("%s:Warning: Unknown video port write (address=%04x value=%02x)\n",
269                  space->machine().describe_context(), offset, addr);
269                  space.machine().describe_context(), offset, addr);
270270         break;
271271   }
272272
r17963r17964
284284
285285WRITE8_MEMBER(leland_state::leland_master_video_addr_w)
286286{
287   leland_video_addr_w(&space, offset, data, 0);
287   leland_video_addr_w(space, offset, data, 0);
288288}
289289
290290
291291static TIMER_CALLBACK( leland_delayed_mvram_w )
292292{
293   address_space *space = machine.device("master")->memory().space(AS_PROGRAM);
293   address_space &space = *machine.device("master")->memory().space(AS_PROGRAM);
294294
295295   int num = (param >> 16) & 1;
296296   int offset = (param >> 8) & 0xff;
r17963r17964
307307
308308READ8_MEMBER(leland_state::leland_mvram_port_r)
309309{
310   return leland_vram_port_r(&space, offset, 0);
310   return leland_vram_port_r(space, offset, 0);
311311}
312312
313313
r17963r17964
320320
321321WRITE8_MEMBER(leland_state::leland_slave_video_addr_w)
322322{
323   leland_video_addr_w(&space, offset, data, 1);
323   leland_video_addr_w(space, offset, data, 1);
324324}
325325
326326
327327WRITE8_MEMBER(leland_state::leland_svram_port_w)
328328{
329   leland_vram_port_w(&space, offset, data, 1);
329   leland_vram_port_w(space, offset, data, 1);
330330}
331331
332332
333333READ8_MEMBER(leland_state::leland_svram_port_r)
334334{
335   return leland_vram_port_r(&space, offset, 1);
335   return leland_vram_port_r(space, offset, 1);
336336}
337337
338338
r17963r17964
353353WRITE8_MEMBER(leland_state::ataxx_svram_port_w)
354354{
355355   offset = ((offset >> 1) & 0x07) | ((offset << 3) & 0x08) | (offset & 0x10);
356   leland_vram_port_w(&space, offset, data, 1);
356   leland_vram_port_w(space, offset, data, 1);
357357}
358358
359359
r17963r17964
367367READ8_MEMBER(leland_state::ataxx_mvram_port_r)
368368{
369369   offset = ((offset >> 1) & 0x07) | ((offset << 3) & 0x08) | (offset & 0x10);
370   return leland_vram_port_r(&space, offset, 0);
370   return leland_vram_port_r(space, offset, 0);
371371}
372372
373373
374374READ8_MEMBER(leland_state::ataxx_svram_port_r)
375375{
376376   offset = ((offset >> 1) & 0x07) | ((offset << 3) & 0x08) | (offset & 0x10);
377   return leland_vram_port_r(&space, offset, 1);
377   return leland_vram_port_r(space, offset, 1);
378378}
379379
380380
trunk/src/mame/video/popeye.c
r17963r17964
277277{
278278   popeye_state *state = machine.driver_data<popeye_state>();
279279   int offs;
280   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
280   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
281281
282282   if (state->m_lastflip != state->flip_screen())
283283   {
284284      for (offs = 0;offs < popeye_bitmapram_size;offs++)
285         state->popeye_bitmap_w(*space,offs,state->m_bitmapram[offs]);
285         state->popeye_bitmap_w(space,offs,state->m_bitmapram[offs]);
286286
287287      state->m_lastflip = state->flip_screen();
288288   }
trunk/src/mame/video/lordgun.c
r17963r17964
7575TILE_GET_INFO_MEMBER(lordgun_state::get_tile_info_2){ get_tile_info(machine(), tileinfo, tile_index, 2); }
7676TILE_GET_INFO_MEMBER(lordgun_state::get_tile_info_3){ get_tile_info(machine(), tileinfo, tile_index, 3); }
7777
78INLINE void lordgun_vram_w(address_space *space, offs_t offset, UINT16 data, UINT16 mem_mask, int _N_)
78INLINE void lordgun_vram_w(address_space &space, offs_t offset, UINT16 data, UINT16 mem_mask, int _N_)
7979{
80   lordgun_state *state = space->machine().driver_data<lordgun_state>();
80   lordgun_state *state = space.machine().driver_data<lordgun_state>();
8181   COMBINE_DATA(&state->m_vram[_N_][offset]);
8282   state->m_tilemap[_N_]->mark_tile_dirty(offset/2);
8383}
8484
85WRITE16_MEMBER(lordgun_state::lordgun_vram_0_w){ lordgun_vram_w(&space, offset, data, mem_mask, 0); }
86WRITE16_MEMBER(lordgun_state::lordgun_vram_1_w){ lordgun_vram_w(&space, offset, data, mem_mask, 1); }
87WRITE16_MEMBER(lordgun_state::lordgun_vram_2_w){ lordgun_vram_w(&space, offset, data, mem_mask, 2); }
88WRITE16_MEMBER(lordgun_state::lordgun_vram_3_w){ lordgun_vram_w(&space, offset, data, mem_mask, 3); }
85WRITE16_MEMBER(lordgun_state::lordgun_vram_0_w){ lordgun_vram_w(space, offset, data, mem_mask, 0); }
86WRITE16_MEMBER(lordgun_state::lordgun_vram_1_w){ lordgun_vram_w(space, offset, data, mem_mask, 1); }
87WRITE16_MEMBER(lordgun_state::lordgun_vram_2_w){ lordgun_vram_w(space, offset, data, mem_mask, 2); }
88WRITE16_MEMBER(lordgun_state::lordgun_vram_3_w){ lordgun_vram_w(space, offset, data, mem_mask, 3); }
8989
9090/***************************************************************************
9191
trunk/src/mame/video/toaplan1.c
r17963r17964
286286static void rallybik_flipscreen(running_machine &machine)
287287{
288288   toaplan1_state *state = machine.driver_data<toaplan1_state>();
289   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
289   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
290290
291   state->rallybik_bcu_flipscreen_w(*space, 0, state->m_bcu_flipscreen, 0xffff);
291   state->rallybik_bcu_flipscreen_w(space, 0, state->m_bcu_flipscreen, 0xffff);
292292}
293293
294294static void toaplan1_flipscreen(running_machine &machine)
295295{
296296   toaplan1_state *state = machine.driver_data<toaplan1_state>();
297   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
297   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
298298
299   state->toaplan1_bcu_flipscreen_w(*space, 0, state->m_bcu_flipscreen, 0xffff);
299   state->toaplan1_bcu_flipscreen_w(space, 0, state->m_bcu_flipscreen, 0xffff);
300300}
301301
302302static void register_common(running_machine &machine)
trunk/src/mame/video/jpmimpct.c
r17963r17964
8686 *
8787 *************************************/
8888
89void jpmimpct_to_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
89void jpmimpct_to_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg)
9090{
91   jpmimpct_state *state = space->machine().driver_data<jpmimpct_state>();
91   jpmimpct_state *state = space.machine().driver_data<jpmimpct_state>();
9292   memcpy(shiftreg, &state->m_vram[TOWORD(address)], 512 * sizeof(UINT16));
9393}
9494
95void jpmimpct_from_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
95void jpmimpct_from_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg)
9696{
97   jpmimpct_state *state = space->machine().driver_data<jpmimpct_state>();
97   jpmimpct_state *state = space.machine().driver_data<jpmimpct_state>();
9898   memcpy(&state->m_vram[TOWORD(address)], shiftreg, 512 * sizeof(UINT16));
9999}
100100
trunk/src/mame/video/dc.c
r17963r17964
129129static UINT32 dilated1[15][1024];
130130static int dilatechose[64];
131131static float wbuffer[480][640];
132static void pvr_accumulationbuffer_to_framebuffer(address_space *space, int x,int y);
132static void pvr_accumulationbuffer_to_framebuffer(address_space &space, int x,int y);
133133
134134// the real accumulation buffer is a 32x32x8bpp buffer into which tiles get rendered before they get copied to the framebuffer
135135//  our implementation is not currently tile based, and thus the accumulation buffer is screen sized
r17963r17964
981981
982982READ64_HANDLER( pvr_ta_r )
983983{
984   dc_state *state = space->machine().driver_data<dc_state>();
984   dc_state *state = space.machine().driver_data<dc_state>();
985985   int reg;
986986   UINT64 shift;
987987
r17963r17964
993993      {
994994         UINT8 fieldnum,vsync,hsync,blank;
995995
996         fieldnum = (space->machine().primary_screen->frame_number() & 1) ? 1 : 0;
996         fieldnum = (space.machine().primary_screen->frame_number() & 1) ? 1 : 0;
997997
998         vsync = space->machine().primary_screen->vblank() ? 1 : 0;
998         vsync = space.machine().primary_screen->vblank() ? 1 : 0;
999999         if(spg_vsync_pol) { vsync^=1; }
10001000
1001         hsync = space->machine().primary_screen->hblank() ? 1 : 0;
1001         hsync = space.machine().primary_screen->hblank() ? 1 : 0;
10021002         if(spg_hsync_pol) { hsync^=1; }
10031003
10041004         /* FIXME: following is just a wild guess */
1005         blank = (space->machine().primary_screen->vblank() | space->machine().primary_screen->hblank()) ? 0 : 1;
1005         blank = (space.machine().primary_screen->vblank() | space.machine().primary_screen->hblank()) ? 0 : 1;
10061006         if(spg_blank_pol) { blank^=1; }
10071007
1008         state->pvrta_regs[reg] = (vsync << 13) | (hsync << 12) | (blank << 11) | (fieldnum << 10) | (space->machine().primary_screen->vpos() & 0x3ff);
1008         state->pvrta_regs[reg] = (vsync << 13) | (hsync << 12) | (blank << 11) | (fieldnum << 10) | (space.machine().primary_screen->vpos() & 0x3ff);
10091009         break;
10101010      }
10111011   case SPG_TRIGGER_POS:
r17963r17964
10171017
10181018   #if DEBUG_PVRTA_REGS
10191019   if (reg != 0x43)
1020      mame_printf_verbose("PVRTA: [%08x] read %x @ %x (reg %x), mask %" I64FMT "x (PC=%x)\n", 0x5f8000+reg*4, state->pvrta_regs[reg], offset, reg, mem_mask, space->device().safe_pc());
1020      mame_printf_verbose("PVRTA: [%08x] read %x @ %x (reg %x), mask %" I64FMT "x (PC=%x)\n", 0x5f8000+reg*4, state->pvrta_regs[reg], offset, reg, mem_mask, space.device().safe_pc());
10211021   #endif
10221022   return (UINT64)state->pvrta_regs[reg] << shift;
10231023}
10241024
10251025WRITE64_HANDLER( pvr_ta_w )
10261026{
1027   dc_state *state = space->machine().driver_data<dc_state>();
1027   dc_state *state = space.machine().driver_data<dc_state>();
10281028   int reg;
10291029   UINT64 shift;
10301030   UINT32 dat;
r17963r17964
10991099
11001100            // we've got a request to draw, so, draw to the accumulation buffer!
11011101            // this should really be done for each tile!
1102            render_to_accumulation_buffer(space->machine(),*fake_accumulationbuffer_bitmap,clip);
1102            render_to_accumulation_buffer(space.machine(),*fake_accumulationbuffer_bitmap,clip);
11031103
11041104            state->endofrender_timer_isp->adjust(attotime::from_usec(4000) ); // hack, make sure render takes some amount of time
11051105
r17963r17964
11181118            {
11191119               UINT32 st[6];
11201120
1121               st[0]=space->read_dword((0x05000000+offsetra));
1122               st[1]=space->read_dword((0x05000004+offsetra)); // Opaque List Pointer
1123               st[2]=space->read_dword((0x05000008+offsetra)); // Opaque Modifier Volume List Pointer
1124               st[3]=space->read_dword((0x0500000c+offsetra)); // Translucent List Pointer
1125               st[4]=space->read_dword((0x05000010+offsetra)); // Translucent Modifier Volume List Pointer
1121               st[0]=space.read_dword((0x05000000+offsetra));
1122               st[1]=space.read_dword((0x05000004+offsetra)); // Opaque List Pointer
1123               st[2]=space.read_dword((0x05000008+offsetra)); // Opaque Modifier Volume List Pointer
1124               st[3]=space.read_dword((0x0500000c+offsetra)); // Translucent List Pointer
1125               st[4]=space.read_dword((0x05000010+offsetra)); // Translucent Modifier Volume List Pointer
11261126
11271127               if (sizera == 6)
11281128               {
1129                  st[5] = space->read_dword((0x05000014+offsetra)); // Punch Through List Pointer
1129                  st[5] = space.read_dword((0x05000014+offsetra)); // Punch Through List Pointer
11301130                  offsetra+=0x18;
11311131               }
11321132               else
r17963r17964
12411241
12421242      // hack, this interrupt is generated after transfering a set amount of data
12431243      //state->dc_sysctrl_regs[SB_ISTNRM] |= IST_EOXFER_YUV;
1244      //dc_update_interrupt_status(space->machine());
1244      //dc_update_interrupt_status(space.machine());
12451245
12461246      break;
12471247   case TA_YUV_TEX_CTRL:
r17963r17964
12531253      state->vbin_timer->adjust(attotime::never);
12541254      state->vbout_timer->adjust(attotime::never);
12551255
1256      state->vbin_timer->adjust(space->machine().primary_screen->time_until_pos(spg_vblank_in_irq_line_num));
1257      state->vbout_timer->adjust(space->machine().primary_screen->time_until_pos(spg_vblank_out_irq_line_num));
1256      state->vbin_timer->adjust(space.machine().primary_screen->time_until_pos(spg_vblank_in_irq_line_num));
1257      state->vbout_timer->adjust(space.machine().primary_screen->time_until_pos(spg_vblank_out_irq_line_num));
12581258      break;
12591259   /* TODO: timer adjust for SPG_HBLANK_INT too */
12601260   case TA_LIST_CONT:
r17963r17964
12731273   case VO_STARTX:
12741274   case VO_STARTY:
12751275      {
1276         rectangle visarea = space->machine().primary_screen->visible_area();
1276         rectangle visarea = space.machine().primary_screen->visible_area();
12771277         /* FIXME: right visible area calculations aren't known yet*/
12781278         visarea.min_x = 0;
12791279         visarea.max_x = ((spg_hbstart - spg_hbend - vo_horz_start_pos) <= 0x180 ? 320 : 640) - 1;
r17963r17964
12811281         visarea.max_y = ((spg_vbstart - spg_vbend - vo_vert_start_pos_f1) <= 0x100 ? 240 : 480) - 1;
12821282
12831283
1284         space->machine().primary_screen->configure(spg_hbstart, spg_vbstart, visarea, space->machine().primary_screen->frame_period().attoseconds );
1284         space.machine().primary_screen->configure(spg_hbstart, spg_vbstart, visarea, space.machine().primary_screen->frame_period().attoseconds );
12851285      }
12861286      break;
12871287   }
r17963r17964
16281628
16291629WRITE64_HANDLER( ta_fifo_poly_w )
16301630{
1631   dc_state *state = space->machine().driver_data<dc_state>();
1631   dc_state *state = space.machine().driver_data<dc_state>();
16321632
16331633   if (mem_mask == U64(0xffffffffffffffff))   // 64 bit
16341634   {
r17963r17964
16481648
16491649   // if the command is complete, process it
16501650   if (state_ta.tafifo_pos == 0)
1651      process_ta_fifo(space->machine());
1651      process_ta_fifo(space.machine());
16521652
16531653}
16541654
16551655WRITE64_HANDLER( ta_fifo_yuv_w )
16561656{
1657   //dc_state *state = space->machine().driver_data<dc_state>();
1657   //dc_state *state = space.machine().driver_data<dc_state>();
16581658
16591659//  int reg;
16601660//  UINT64 shift;
r17963r17964
19751975static void render_to_accumulation_buffer(running_machine &machine,bitmap_rgb32 &bitmap,const rectangle &cliprect)
19761976{
19771977   dc_state *state = machine.driver_data<dc_state>();
1978   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1978   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
19791979   int cs,rs,ns;
19801980   UINT32 c;
19811981#if 0
r17963r17964
19921992
19931993   rs=state_ta.renderselect;
19941994   c=state->pvrta_regs[ISP_BACKGND_T];
1995   c=space->read_dword(0x05000000+((c&0xfffff8)>>1)+(3+3)*4);
1995   c=space.read_dword(0x05000000+((c&0xfffff8)>>1)+(3+3)*4);
19961996   bitmap.fill(c, cliprect);
19971997
19981998
r17963r17964
20452045
20462046*/
20472047
2048static void pvr_accumulationbuffer_to_framebuffer(address_space *space, int x,int y)
2048static void pvr_accumulationbuffer_to_framebuffer(address_space &space, int x,int y)
20492049{
2050   dc_state *state = space->machine().driver_data<dc_state>();
2050   dc_state *state = space.machine().driver_data<dc_state>();
20512051
20522052   // the accumulation buffer is always 8888
20532053   //
r17963r17964
20832083                               ((((data & 0x0000f800) >> 11)) << 5)  |
20842084                           ((((data & 0x00f80000) >> 19)) << 10);
20852085
2086               space->write_word(realwriteoffs+xcnt*2, newdat);
2086               space.write_word(realwriteoffs+xcnt*2, newdat);
20872087            }
20882088         }
20892089      }
r17963r17964
21072107                               ((((data & 0x0000fc00) >> 10)) << 5)  |
21082108                           ((((data & 0x00f80000) >> 19)) << 11);
21092109
2110               space->write_word(realwriteoffs+xcnt*2, newdat);
2110               space.write_word(realwriteoffs+xcnt*2, newdat);
21112111            }
21122112         }
21132113      }
r17963r17964
21352135                           ((((data & 0x00f80000) >> 19)) << 10);
21362136               // alpha?
21372137
2138               space->write_word(realwriteoffs+xcnt*2, newdat);
2138               space.write_word(realwriteoffs+xcnt*2, newdat);
21392139            }
21402140         }
21412141      }
r17963r17964
21592159                               ((((data & 0x0000fc00) >> 10)) << 5)  |
21602160                           ((((data & 0x00f80000) >> 19)) << 11);
21612161
2162               space->write_word(realwriteoffs+xcnt*2, newdat);
2162               space.write_word(realwriteoffs+xcnt*2, newdat);
21632163            }
21642164         }
21652165      }
r17963r17964
21862186                               ((((data & 0x0000fc00) >> 10)) << 5)  |
21872187                           ((((data & 0x00f80000) >> 19)) << 11);
21882188
2189               space->write_word(realwriteoffs+xcnt*2, newdat);
2189               space.write_word(realwriteoffs+xcnt*2, newdat);
21902190            }
21912191         }
21922192      }
r17963r17964
27412741      case 0x78/4: // IRQ MASK
27422742         return 0;
27432743      default:
2744         printf("%08x %08x\n",space->device().safe_pc(),offset*4);
2744         printf("%08x %08x\n",space.device().safe_pc(),offset*4);
27452745         break;
27462746   }
27472747
r17963r17964
27532753   switch(offset)
27542754   {
27552755      default:
2756         printf("%08x %08x %08x W\n",space->device().safe_pc(),offset*4,data);
2756         printf("%08x %08x %08x W\n",space.device().safe_pc(),offset*4,data);
27572757         break;
27582758   }
27592759}
trunk/src/mame/video/segaic16.c
r17963r17964
12641264{
12651265   /* certain ranges need immediate updates */
12661266   if (offset >= 0xe80/2)
1267      space->machine().primary_screen->update_partial(space->machine().primary_screen->vpos());
1267      space.machine().primary_screen->update_partial(space.machine().primary_screen->vpos());
12681268
12691269   COMBINE_DATA(&segaic16_textram_0[offset]);
12701270   bg_tilemap[0].textmap->mark_tile_dirty(offset);
trunk/src/mame/video/midzeus2.c
r17963r17964
419419READ32_HANDLER( zeus2_r )
420420{
421421   int logit = (offset != 0x00 && offset != 0x01 && offset != 0x54 && offset != 0x48 && offset != 0x49 && offset != 0x58 && offset != 0x59 && offset != 0x5a);
422   midzeus_state *state = space->machine().driver_data<midzeus_state>();
422   midzeus_state *state = space.machine().driver_data<midzeus_state>();
423423   UINT32 result = state->m_zeusbase[offset];
424424
425425#if TRACK_REG_USAGE
r17963r17964
427427#endif
428428
429429   if (logit)
430      logerror("%06X:zeus2_r(%02X)\n", space->device().safe_pc(), offset);
430      logerror("%06X:zeus2_r(%02X)\n", space.device().safe_pc(), offset);
431431
432432   switch (offset)
433433   {
r17963r17964
440440         /* bits $00080000 is tested in a loop until 0 */
441441         /* bit  $00000004 is tested for toggling; probably VBLANK */
442442         result = 0x00;
443         if (space->machine().primary_screen->vblank())
443         if (space.machine().primary_screen->vblank())
444444            result |= 0x04;
445445         break;
446446
r17963r17964
451451
452452      case 0x54:
453453         /* both upper 16 bits and lower 16 bits seem to be used as vertical counters */
454         result = (space->machine().primary_screen->vpos() << 16) | space->machine().primary_screen->vpos();
454         result = (space.machine().primary_screen->vpos() << 16) | space.machine().primary_screen->vpos();
455455         break;
456456   }
457457
r17963r17964
473473             offset != 0x40 && offset != 0x41 && offset != 0x48 && offset != 0x49 && offset != 0x4e &&
474474             offset != 0x50 && offset != 0x51 && offset != 0x57 && offset != 0x58 && offset != 0x59 && offset != 0x5a && offset != 0x5e);
475475   if (logit)
476      logerror("%06X:zeus2_w", space->device().safe_pc());
477   zeus_register32_w(space->machine(), offset, data, logit);
476      logerror("%06X:zeus2_w", space.device().safe_pc());
477   zeus_register32_w(space.machine(), offset, data, logit);
478478}
479479
480480
trunk/src/mame/video/model3.c
r17963r17964
772772   //state->m_real3d_display_list = 1;
773773}
774774
775void real3d_display_list1_dma(address_space *space, UINT32 src, UINT32 dst, int length, int byteswap)
775void real3d_display_list1_dma(address_space &space, UINT32 src, UINT32 dst, int length, int byteswap)
776776{
777   model3_state *state = space->machine().driver_data<model3_state>();
777   model3_state *state = space.machine().driver_data<model3_state>();
778778   int i;
779779   int d = (dst & 0xffffff) / 4;
780780   for(i=0; i < length; i+=4) {
781781      UINT32 w;
782782      if (byteswap) {
783         w = BYTE_REVERSE32(space->read_dword(src));
783         w = BYTE_REVERSE32(space.read_dword(src));
784784      } else {
785         w = space->read_dword(src);
785         w = space.read_dword(src);
786786      }
787787      state->m_display_list_ram[d++] = w;
788788      src += 4;
789789   }
790790}
791791
792void real3d_display_list2_dma(address_space *space, UINT32 src, UINT32 dst, int length, int byteswap)
792void real3d_display_list2_dma(address_space &space, UINT32 src, UINT32 dst, int length, int byteswap)
793793{
794   model3_state *state = space->machine().driver_data<model3_state>();
794   model3_state *state = space.machine().driver_data<model3_state>();
795795   int i;
796796   int d = (dst & 0xffffff) / 4;
797797   for(i=0; i < length; i+=4) {
798798      UINT32 w;
799799      if (byteswap) {
800         w = BYTE_REVERSE32(space->read_dword(src));
800         w = BYTE_REVERSE32(space.read_dword(src));
801801      } else {
802         w = space->read_dword(src);
802         w = space.read_dword(src);
803803      }
804804      state->m_culling_ram[d++] = w;
805805      src += 4;
806806   }
807807}
808808
809void real3d_vrom_texture_dma(address_space *space, UINT32 src, UINT32 dst, int length, int byteswap)
809void real3d_vrom_texture_dma(address_space &space, UINT32 src, UINT32 dst, int length, int byteswap)
810810{
811   model3_state *state = space->machine().driver_data<model3_state>();
811   model3_state *state = space.machine().driver_data<model3_state>();
812812   if((dst & 0xff) == 0) {
813813
814814      UINT32 address, header;
815815
816816      if (byteswap) {
817         address = BYTE_REVERSE32(space->read_dword((src+0)));
818         header = BYTE_REVERSE32(space->read_dword((src+4)));
817         address = BYTE_REVERSE32(space.read_dword((src+0)));
818         header = BYTE_REVERSE32(space.read_dword((src+4)));
819819      } else {
820         address = space->read_dword((src+0));
821         header = space->read_dword((src+4));
820         address = space.read_dword((src+0));
821         header = space.read_dword((src+4));
822822      }
823      real3d_upload_texture(space->machine(), header, (UINT32*)&state->m_vrom[address]);
823      real3d_upload_texture(space.machine(), header, (UINT32*)&state->m_vrom[address]);
824824   }
825825}
826826
827void real3d_texture_fifo_dma(address_space *space, UINT32 src, int length, int byteswap)
827void real3d_texture_fifo_dma(address_space &space, UINT32 src, int length, int byteswap)
828828{
829   model3_state *state = space->machine().driver_data<model3_state>();
829   model3_state *state = space.machine().driver_data<model3_state>();
830830   int i;
831831   for(i=0; i < length; i+=4) {
832832      UINT32 w;
833833      if (byteswap) {
834         w = BYTE_REVERSE32(space->read_dword(src));
834         w = BYTE_REVERSE32(space.read_dword(src));
835835      } else {
836         w = space->read_dword(src);
836         w = space.read_dword(src);
837837      }
838838      state->m_texture_fifo[state->m_texture_fifo_pos] = w;
839839      state->m_texture_fifo_pos++;
r17963r17964
841841   }
842842}
843843
844void real3d_polygon_ram_dma(address_space *space, UINT32 src, UINT32 dst, int length, int byteswap)
844void real3d_polygon_ram_dma(address_space &space, UINT32 src, UINT32 dst, int length, int byteswap)
845845{
846   model3_state *state = space->machine().driver_data<model3_state>();
846   model3_state *state = space.machine().driver_data<model3_state>();
847847   int i;
848848   int d = (dst & 0xffffff) / 4;
849849   for(i=0; i < length; i+=4) {
850850      UINT32 w;
851851      if (byteswap) {
852         w = BYTE_REVERSE32(space->read_dword(src));
852         w = BYTE_REVERSE32(space.read_dword(src));
853853      } else {
854         w = space->read_dword(src);
854         w = space.read_dword(src);
855855      }
856856      state->m_polygon_ram[d++] = w;
857857      src += 4;
trunk/src/mame/video/capbowl.c
r17963r17964
6363      col ^= 2;
6464
6565   /* Row address (RA0-RA8) is not dependent on the offset */
66   tms34061_w(&space, col, *m_rowaddress, func, data);
66   tms34061_w(space, col, *m_rowaddress, func, data);
6767}
6868
6969
r17963r17964
7878      col ^= 2;
7979
8080   /* Row address (RA0-RA8) is not dependent on the offset */
81   return tms34061_r(&space, col, *m_rowaddress, func);
81   return tms34061_r(space, col, *m_rowaddress, func);
8282}
8383
8484
trunk/src/mame/video/skullxbo.c
r17963r17964
103103
104104WRITE16_HANDLER( skullxbo_xscroll_w )
105105{
106   skullxbo_state *state = space->machine().driver_data<skullxbo_state>();
106   skullxbo_state *state = space.machine().driver_data<skullxbo_state>();
107107
108108   /* combine data */
109109   UINT16 oldscroll = *state->m_xscroll;
r17963r17964
112112
113113   /* if something changed, force an update */
114114   if (oldscroll != newscroll)
115      space->machine().primary_screen->update_partial(space->machine().primary_screen->vpos());
115      space.machine().primary_screen->update_partial(space.machine().primary_screen->vpos());
116116
117117   /* adjust the actual scrolls */
118118   state->m_playfield_tilemap->set_scrollx(0, 2 * (newscroll >> 7));
r17963r17964
125125
126126WRITE16_HANDLER( skullxbo_yscroll_w )
127127{
128   skullxbo_state *state = space->machine().driver_data<skullxbo_state>();
128   skullxbo_state *state = space.machine().driver_data<skullxbo_state>();
129129
130130   /* combine data */
131   int scanline = space->machine().primary_screen->vpos();
131   int scanline = space.machine().primary_screen->vpos();
132132   UINT16 oldscroll = *state->m_yscroll;
133133   UINT16 newscroll = oldscroll;
134134   UINT16 effscroll;
r17963r17964
136136
137137   /* if something changed, force an update */
138138   if (oldscroll != newscroll)
139      space->machine().primary_screen->update_partial(scanline);
139      space.machine().primary_screen->update_partial(scanline);
140140
141141   /* adjust the effective scroll for the current scanline */
142   if (scanline > space->machine().primary_screen->visible_area().max_y)
142   if (scanline > space.machine().primary_screen->visible_area().max_y)
143143      scanline = 0;
144144   effscroll = (newscroll >> 7) - scanline;
145145
r17963r17964
161161
162162WRITE16_HANDLER( skullxbo_mobmsb_w )
163163{
164   space->machine().primary_screen->update_partial(space->machine().primary_screen->vpos());
164   space.machine().primary_screen->update_partial(space.machine().primary_screen->vpos());
165165   atarimo_set_bank(0, (offset >> 9) & 1);
166166}
167167
r17963r17964
175175
176176WRITE16_HANDLER( skullxbo_playfieldlatch_w )
177177{
178   skullxbo_state *state = space->machine().driver_data<skullxbo_state>();
178   skullxbo_state *state = space.machine().driver_data<skullxbo_state>();
179179   atarigen_set_playfield_latch(state, data);
180180}
181181
trunk/src/mame/video/snes.c
r17963r17964
19291929         if (h <= 4)
19301930            m_snes_vram[offset] = data;
19311931         else if (h == 6)
1932            m_snes_vram[offset] = snes_open_bus_r(&space, 0);
1932            m_snes_vram[offset] = snes_open_bus_r(space, 0);
19331933         else
19341934         {
19351935            //printf("%d %d VRAM write, CHECK!\n",h,v);
r17963r17964
20472047#if 0
20482048   if (!snes_ppu.screen_disabled)
20492049   {
2050      UINT16 v = space->machine().primary_screen->vpos();
2051      UINT16 h = space->machine().primary_screen->hpos();
2050      UINT16 v = space.machine().primary_screen->vpos();
2051      UINT16 h = space.machine().primary_screen->hpos();
20522052
20532053      if (v < snes_ppu.beam.last_visible_line && h >= 128 && h < 1096)
20542054         offset = 0x1ff;
r17963r17964
20752075   // writes to the cgram address
20762076   if (!snes_ppu.screen_disabled)
20772077   {
2078      UINT16 v = space->machine().primary_screen->vpos();
2079      UINT16 h = space->machine().primary_screen->hpos();
2078      UINT16 v = space.machine().primary_screen->vpos();
2079      UINT16 h = space.machine().primary_screen->hpos();
20802080
20812081      if (v < snes_ppu.beam.last_visible_line && h >= 128 && h < 1096)
20822082         offset = 0x1ff;
r17963r17964
20932093
20942094READ8_HANDLER( snes_ppu_read )
20952095{
2096   snes_state *state = space->machine().driver_data<snes_state>();
2096   snes_state *state = space.machine().driver_data<snes_state>();
20972097   UINT8 value;
20982098
20992099   switch (offset)
r17963r17964
21402140            return snes_ppu.ppu1_open_bus;
21412141         }
21422142      case SLHV:      /* Software latch for H/V counter */
2143         snes_latch_counters(space->machine());
2143         snes_latch_counters(space.machine());
21442144         return snes_open_bus_r(space, 0);      /* Return value is meaningless */
21452145      case ROAMDATA:   /* Read data from OAM (DR) */
2146         snes_ppu.ppu1_open_bus = state->snes_oam_read(*space, snes_ppu.oam.address);
2146         snes_ppu.ppu1_open_bus = state->snes_oam_read(space, snes_ppu.oam.address);
21472147         snes_ram[OAMDATA] = (snes_ram[OAMDATA] + 1) % 2;
21482148         if (!snes_ram[OAMDATA])
21492149         {
r17963r17964
21542154         return snes_ppu.ppu1_open_bus;
21552155      case RVMDATAL:   /* Read data from VRAM (low) */
21562156         {
2157            UINT32 addr = snes_get_vram_address(space->machine());
2157            UINT32 addr = snes_get_vram_address(space.machine());
21582158            snes_ppu.ppu1_open_bus = state->m_vram_read_buffer & 0xff;
21592159
21602160            if (!state->m_vram_fgr_high)
21612161            {
2162               state->m_vram_read_buffer = state->snes_vram_read(*space, addr);
2163               state->m_vram_read_buffer |= (state->snes_vram_read(*space, addr + 1) << 8);
2162               state->m_vram_read_buffer = state->snes_vram_read(space, addr);
2163               state->m_vram_read_buffer |= (state->snes_vram_read(space, addr + 1) << 8);
21642164
21652165               state->m_vmadd = (state->m_vmadd + state->m_vram_fgr_increment) & 0xffff;
21662166            }
r17963r17964
21692169         }
21702170      case RVMDATAH:   /* Read data from VRAM (high) */
21712171         {
2172            UINT32 addr = snes_get_vram_address(space->machine());
2172            UINT32 addr = snes_get_vram_address(space.machine());
21732173            snes_ppu.ppu1_open_bus = (state->m_vram_read_buffer >> 8) & 0xff;
21742174
21752175            if (state->m_vram_fgr_high)
21762176            {
2177               state->m_vram_read_buffer = state->snes_vram_read(*space, addr);
2178               state->m_vram_read_buffer |= (state->snes_vram_read(*space, addr + 1) << 8);
2177               state->m_vram_read_buffer = state->snes_vram_read(space, addr);
2178               state->m_vram_read_buffer |= (state->snes_vram_read(space, addr + 1) << 8);
21792179
21802180               state->m_vmadd = (state->m_vmadd + state->m_vram_fgr_increment) & 0xffff;
21812181            }
r17963r17964
21842184         }
21852185      case RCGDATA:   /* Read data from CGRAM */
21862186         if (!(state->m_cgram_address & 0x01))
2187            snes_ppu.ppu2_open_bus = state->snes_cgram_read(*space, state->m_cgram_address);
2187            snes_ppu.ppu2_open_bus = state->snes_cgram_read(space, state->m_cgram_address);
21882188         else
21892189         {
21902190            snes_ppu.ppu2_open_bus &= 0x80;
2191            snes_ppu.ppu2_open_bus |= state->snes_cgram_read(*space, state->m_cgram_address) & 0x7f;
2191            snes_ppu.ppu2_open_bus |= state->snes_cgram_read(space, state->m_cgram_address) & 0x7f;
21922192         }
21932193
21942194         state->m_cgram_address = (state->m_cgram_address + 1) % (SNES_CGRAM_SIZE - 2);
r17963r17964
22422242
22432243WRITE8_HANDLER( snes_ppu_write )
22442244{
2245   snes_state *state = space->machine().driver_data<snes_state>();
2245   snes_state *state = space.machine().driver_data<snes_state>();
22462246
22472247   switch (offset)
22482248   {
22492249      case INIDISP:   /* Initial settings for screen */
22502250         if ((snes_ppu.screen_disabled & 0x80) && (!(data & 0x80))) //a 1->0 force blank transition causes a reset OAM address
22512251         {
2252            space->write_byte(OAMADDL, snes_ppu.oam.saved_address_low);
2253            space->write_byte(OAMADDH, snes_ppu.oam.saved_address_high);
2252            space.write_byte(OAMADDL, snes_ppu.oam.saved_address_low);
2253            space.write_byte(OAMADDH, snes_ppu.oam.saved_address_high);
22542254            snes_ppu.oam.first_sprite = snes_ppu.oam.priority_rotation ? (snes_ppu.oam.address >> 1) & 127 : 0;
22552255         }
22562256         snes_ppu.screen_disabled = data & 0x80;
r17963r17964
22762276         break;
22772277      case OAMDATA:   /* Data for OAM write (DW) */
22782278         if (snes_ppu.oam.address >= 0x100)
2279            state->snes_oam_write(*space, snes_ppu.oam.address, data);
2279            state->snes_oam_write(space, snes_ppu.oam.address, data);
22802280         else
22812281         {
22822282            if (!snes_ram[OAMDATA])
r17963r17964
22862286               // in this case, we not only write data to the upper byte of the word,
22872287               // but also snes_ppu.oam.write_latch to the lower byte (recall that
22882288               // snes_ram[OAMDATA] is used to select high/low byte)
2289               state->snes_oam_write(*space, snes_ppu.oam.address, data);
2289               state->snes_oam_write(space, snes_ppu.oam.address, data);
22902290               snes_ram[OAMDATA] = 0;
2291               state->snes_oam_write(*space, snes_ppu.oam.address, snes_ppu.oam.write_latch);
2291               state->snes_oam_write(space, snes_ppu.oam.address, snes_ppu.oam.write_latch);
22922292               snes_ram[OAMDATA] = 1;
22932293            }
22942294         }
r17963r17964
23022302         return;
23032303      case BGMODE:   /* BG mode and character size settings */
23042304         snes_ppu.mode = data & 0x07;
2305         snes_dynamic_res_change(space->machine());
2305         snes_dynamic_res_change(space.machine());
23062306         snes_ppu.bg3_priority_bit = BIT(data, 3);
23072307         snes_ppu.layer[SNES_BG1].tile_size = BIT(data, 4);
23082308         snes_ppu.layer[SNES_BG2].tile_size = BIT(data, 5);
r17963r17964
24042404         {
24052405            UINT32 addr;
24062406            state->m_vmadd = (state->m_vmadd & 0xff00) | (data << 0);
2407            addr = snes_get_vram_address(space->machine());
2408            state->m_vram_read_buffer = state->snes_vram_read(*space, addr);
2409            state->m_vram_read_buffer |= (state->snes_vram_read(*space, addr + 1) << 8);
2407            addr = snes_get_vram_address(space.machine());
2408            state->m_vram_read_buffer = state->snes_vram_read(space, addr);
2409            state->m_vram_read_buffer |= (state->snes_vram_read(space, addr + 1) << 8);
24102410         }
24112411         break;
24122412      case VMADDH:   /* Address for VRAM read/write (high) */
24132413         {
24142414            UINT32 addr;
24152415            state->m_vmadd = (state->m_vmadd & 0x00ff) | (data << 8);
2416            addr = snes_get_vram_address(space->machine());
2417            state->m_vram_read_buffer = state->snes_vram_read(*space, addr);
2418            state->m_vram_read_buffer |= (state->snes_vram_read(*space, addr + 1) << 8);
2416            addr = snes_get_vram_address(space.machine());
2417            state->m_vram_read_buffer = state->snes_vram_read(space, addr);
2418            state->m_vram_read_buffer |= (state->snes_vram_read(space, addr + 1) << 8);
24192419         }
24202420         break;
24212421      case VMDATAL:   /* 2118: Data for VRAM write (low) */
24222422         {
2423            UINT32 addr = snes_get_vram_address(space->machine());
2424            state->snes_vram_write(*space, addr, data);
2423            UINT32 addr = snes_get_vram_address(space.machine());
2424            state->snes_vram_write(space, addr, data);
24252425
24262426            if (!state->m_vram_fgr_high)
24272427               state->m_vmadd = (state->m_vmadd + state->m_vram_fgr_increment) & 0xffff;
r17963r17964
24292429         return;
24302430      case VMDATAH:   /* 2119: Data for VRAM write (high) */
24312431         {
2432            UINT32 addr = snes_get_vram_address(space->machine());
2433            state->snes_vram_write(*space, addr + 1, data);
2432            UINT32 addr = snes_get_vram_address(space.machine());
2433            state->snes_vram_write(space, addr + 1, data);
24342434
24352435            if (state->m_vram_fgr_high)
24362436               state->m_vmadd = (state->m_vmadd + state->m_vram_fgr_increment) & 0xffff;
r17963r17964
24712471         state->m_cgram_address = data << 1;
24722472         break;
24732473      case CGDATA:   /* Data for colour RAM */
2474         state->snes_cgram_write(*space, state->m_cgram_address, data);
2474         state->snes_cgram_write(space, state->m_cgram_address, data);
24752475         state->m_cgram_address = (state->m_cgram_address + 1) % (SNES_CGRAM_SIZE - 2);
24762476         break;
24772477      case W12SEL:   /* Window mask settings for BG1-2 */
r17963r17964
26332633         snes_ppu.beam.last_visible_line = (data & 0x04) ? 240 : 225;
26342634         snes_ppu.pseudo_hires = BIT(data, 3);
26352635         snes_ppu.mode7.extbg = BIT(data, 6);
2636         snes_dynamic_res_change(space->machine());
2636         snes_dynamic_res_change(space.machine());
26372637#ifdef SNES_DBG_REG_W
26382638         if ((data & 0x8) != (snes_ram[SETINI] & 0x8))
26392639            mame_printf_debug( "Pseudo 512 mode: %s\n", (data & 0x8) ? "on" : "off" );
trunk/src/mame/video/pastelg.c
r17963r17964
5757
5858
5959******************************************************************************/
60int pastelg_blitter_src_addr_r(address_space *space)
60int pastelg_blitter_src_addr_r(address_space &space)
6161{
62   pastelg_state *state = space->machine().driver_data<pastelg_state>();
62   pastelg_state *state = space.machine().driver_data<pastelg_state>();
6363   return state->m_blitter_src_addr;
6464}
6565
r17963r17964
111111   int gfxlen = memregion("gfx1")->bytes();
112112   m_gfxrom = ((data & 0xc0) >> 6);
113113   m_palbank = ((data & 0x10) >> 4);
114   nb1413m3_sndrombank1_w(&space, 0, data);
114   nb1413m3_sndrombank1_w(space, 0, data);
115115
116116   if ((m_gfxrom << 16) > (gfxlen - 1))
117117   {
trunk/src/mame/video/bosco.c
r17963r17964
155155
156156WRITE8_HANDLER( bosco_videoram_w )
157157{
158   bosco_state *state =  space->machine().driver_data<bosco_state>();
158   bosco_state *state =  space.machine().driver_data<bosco_state>();
159159
160160   state->m_videoram[offset] = data;
161161   if (offset & 0x400)
r17963r17964
166166
167167WRITE8_HANDLER( bosco_scrollx_w )
168168{
169   bosco_state *state =  space->machine().driver_data<bosco_state>();
169   bosco_state *state =  space.machine().driver_data<bosco_state>();
170170
171171   state->m_bg_tilemap->set_scrollx(0,data);
172172}
173173
174174WRITE8_HANDLER( bosco_scrolly_w )
175175{
176   bosco_state *state =  space->machine().driver_data<bosco_state>();
176   bosco_state *state =  space.machine().driver_data<bosco_state>();
177177   state->m_bg_tilemap->set_scrolly(0,data);
178178}
179179
trunk/src/mame/video/btoads.c
r17963r17964
257257 *
258258 *************************************/
259259
260void btoads_state::to_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
260void btoads_state::to_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg)
261261{
262262   address &= ~0x40000000;
263263
r17963r17964
284284}
285285
286286
287void btoads_state::from_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
287void btoads_state::from_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg)
288288{
289289   address &= ~0x40000000;
290290
trunk/src/mame/video/cischeat.c
r17963r17964
129129#define TILES_PER_PAGE_Y (0x20)
130130#define TILES_PER_PAGE (TILES_PER_PAGE_X * TILES_PER_PAGE_Y)
131131
132INLINE void scrollram_w(address_space *space, offs_t offset, UINT16 data, UINT16 mem_mask, int which)
132INLINE void scrollram_w(address_space &space, offs_t offset, UINT16 data, UINT16 mem_mask, int which)
133133{
134   cischeat_state *state = space->machine().driver_data<cischeat_state>();
134   cischeat_state *state = space.machine().driver_data<cischeat_state>();
135135   COMBINE_DATA(&state->m_scrollram[which][offset]);
136136   if (offset < 0x40000/2 && state->m_tmap[which])
137137   {
r17963r17964
149149   }
150150}
151151
152WRITE16_MEMBER(cischeat_state::cischeat_scrollram_0_w){ scrollram_w(&space, offset, data, mem_mask, 0); }
153WRITE16_MEMBER(cischeat_state::cischeat_scrollram_1_w){ scrollram_w(&space, offset, data, mem_mask, 1); }
154WRITE16_MEMBER(cischeat_state::cischeat_scrollram_2_w){ scrollram_w(&space, offset, data, mem_mask, 2); }
152WRITE16_MEMBER(cischeat_state::cischeat_scrollram_0_w){ scrollram_w(space, offset, data, mem_mask, 0); }
153WRITE16_MEMBER(cischeat_state::cischeat_scrollram_1_w){ scrollram_w(space, offset, data, mem_mask, 1); }
154WRITE16_MEMBER(cischeat_state::cischeat_scrollram_2_w){ scrollram_w(space, offset, data, mem_mask, 2); }
155155
156156TILEMAP_MAPPER_MEMBER(cischeat_state::cischeat_scan_8x8)
157157{
r17963r17964
14231423   if (msk != 0) state->m_active_layers &= msk;
14241424#if 1
14251425   {
1426      address_space *space = screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
1426      address_space &space = *screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
14271427
14281428      popmessage("Cmd: %04X Pos:%04X Lim:%04X Inp:%04X",
14291429                     state->m_scudhamm_motor_command,
1430                     state->scudhamm_motor_pos_r(*space,0,0xffff),
1431                     state->scudhamm_motor_status_r(*space,0,0xffff),
1432                     state->scudhamm_analog_r(*space,0,0xffff) );
1430                     state->scudhamm_motor_pos_r(space,0,0xffff),
1431                     state->scudhamm_motor_status_r(space,0,0xffff),
1432                     state->scudhamm_analog_r(space,0,0xffff) );
14331433   }
14341434#endif
14351435
trunk/src/mame/video/namcos22.c
r17963r17964
4747#define ALLOW_MEMDUMP   0
4848
4949#if ALLOW_MEMDUMP
50static void Dump( address_space *space, FILE *f, unsigned addr1, unsigned addr2, const char *name )
50static void Dump( address_space &space, FILE *f, unsigned addr1, unsigned addr2, const char *name )
5151{
5252   unsigned addr;
5353   fprintf( f, "%s:\n", name );
r17963r17964
5858      int i;
5959      for( i=0; i<16; i++ )
6060      {
61         data[i] = space->read_byte(addr+i );
61         data[i] = space.read_byte(addr+i );
6262         if( data[i] )
6363         {
6464            bHasNonZero = 1;
r17963r17964
28142814      FILE *f = fopen( "dump.txt", "wb" );
28152815      if( f )
28162816      {
2817         address_space *space = state->m_maincpu->space(AS_PROGRAM);
2817         address_space &space = *state->m_maincpu->space(AS_PROGRAM);
28182818
28192819         if (1) // czram
28202820         {
r17963r17964
28792879      FILE *f = fopen( "dump.txt", "wb" );
28802880      if( f )
28812881      {
2882         address_space *space = state->m_maincpu->space(AS_PROGRAM);
2882         address_space &space = *state->m_maincpu->space(AS_PROGRAM);
28832883
28842884         //Dump(space, f,0x90000000, 0x90000003, "led?" );
28852885         Dump(space, f,0x90010000, 0x90017fff, "cz_ram");
trunk/src/mame/video/redclash.c
r17963r17964
102102
103103WRITE8_HANDLER( redclash_videoram_w )
104104{
105   ladybug_state *state = space->machine().driver_data<ladybug_state>();
105   ladybug_state *state = space.machine().driver_data<ladybug_state>();
106106
107107   state->m_videoram[offset] = data;
108108   state->m_fg_tilemap->mark_tile_dirty(offset);
r17963r17964
110110
111111WRITE8_HANDLER( redclash_gfxbank_w )
112112{
113   ladybug_state *state = space->machine().driver_data<ladybug_state>();
113   ladybug_state *state = space.machine().driver_data<ladybug_state>();
114114
115115   if (state->m_gfxbank != (data & 0x01))
116116   {
117117      state->m_gfxbank = data & 0x01;
118      space->machine().tilemap().mark_all_dirty();
118      space.machine().tilemap().mark_all_dirty();
119119   }
120120}
121121
122122WRITE8_HANDLER( redclash_flipscreen_w )
123123{
124   ladybug_state *state = space->machine().driver_data<ladybug_state>();
124   ladybug_state *state = space.machine().driver_data<ladybug_state>();
125125   state->flip_screen_set(data & 0x01);
126126}
127127
r17963r17964
141141*/
142142WRITE8_HANDLER( redclash_star0_w )
143143{
144   ladybug_state *state = space->machine().driver_data<ladybug_state>();
144   ladybug_state *state = space.machine().driver_data<ladybug_state>();
145145
146146   state->m_star_speed = (state->m_star_speed & ~1) | ((data & 1) << 0);
147   redclash_set_stars_speed(space->machine(), state->m_star_speed);
147   redclash_set_stars_speed(space.machine(), state->m_star_speed);
148148}
149149
150150WRITE8_HANDLER( redclash_star1_w )
151151{
152   ladybug_state *state = space->machine().driver_data<ladybug_state>();
152   ladybug_state *state = space.machine().driver_data<ladybug_state>();
153153
154154   state->m_star_speed = (state->m_star_speed & ~2) | ((data & 1) << 1);
155   redclash_set_stars_speed(space->machine(), state->m_star_speed);
155   redclash_set_stars_speed(space.machine(), state->m_star_speed);
156156}
157157
158158WRITE8_HANDLER( redclash_star2_w )
159159{
160   ladybug_state *state = space->machine().driver_data<ladybug_state>();
160   ladybug_state *state = space.machine().driver_data<ladybug_state>();
161161
162162   state->m_star_speed = (state->m_star_speed & ~4) | ((data & 1) << 2);
163   redclash_set_stars_speed(space->machine(), state->m_star_speed);
163   redclash_set_stars_speed(space.machine(), state->m_star_speed);
164164}
165165
166166WRITE8_HANDLER( redclash_star_reset_w )
167167{
168   redclash_set_stars_enable(space->machine(), 1);
168   redclash_set_stars_enable(space.machine(), 1);
169169}
170170
171171TILE_GET_INFO_MEMBER(ladybug_state::get_fg_tile_info)
trunk/src/mame/video/atarisy1.c
r17963r17964
211211
212212WRITE16_HANDLER( atarisy1_bankselect_w )
213213{
214   atarisy1_state *state = space->machine().driver_data<atarisy1_state>();
214   atarisy1_state *state = space.machine().driver_data<atarisy1_state>();
215215   UINT16 oldselect = *state->m_bankselect;
216216   UINT16 newselect = oldselect, diff;
217   int scanline = space->machine().primary_screen->vpos();
217   int scanline = space.machine().primary_screen->vpos();
218218
219219   /* update memory */
220220   COMBINE_DATA(&newselect);
r17963r17964
223223   /* sound CPU reset */
224224   if (diff & 0x0080)
225225   {
226      space->machine().device("audiocpu")->execute().set_input_line(INPUT_LINE_RESET, (newselect & 0x0080) ? CLEAR_LINE : ASSERT_LINE);
227      if (!(newselect & 0x0080)) atarigen_sound_reset(space->machine());
226      space.machine().device("audiocpu")->execute().set_input_line(INPUT_LINE_RESET, (newselect & 0x0080) ? CLEAR_LINE : ASSERT_LINE);
227      if (!(newselect & 0x0080)) atarigen_sound_reset(space.machine());
228228   }
229229
230230   /* if MO or playfield banks change, force a partial update */
231231   if (diff & 0x003c)
232      space->machine().primary_screen->update_partial(scanline);
232      space.machine().primary_screen->update_partial(scanline);
233233
234234   /* motion object bank select */
235235   atarimo_set_bank(0, (newselect >> 3) & 7);
236   update_timers(space->machine(), scanline);
236   update_timers(space.machine(), scanline);
237237
238238   /* playfield bank select */
239239   if (diff & 0x0004)
r17963r17964
256256
257257WRITE16_HANDLER( atarisy1_priority_w )
258258{
259   atarisy1_state *state = space->machine().driver_data<atarisy1_state>();
259   atarisy1_state *state = space.machine().driver_data<atarisy1_state>();
260260   UINT16 oldpens = state->m_playfield_priority_pens;
261261   UINT16 newpens = oldpens;
262262
263263   /* force a partial update in case this changes mid-screen */
264264   COMBINE_DATA(&newpens);
265265   if (oldpens != newpens)
266      space->machine().primary_screen->update_partial(space->machine().primary_screen->vpos());
266      space.machine().primary_screen->update_partial(space.machine().primary_screen->vpos());
267267   state->m_playfield_priority_pens = newpens;
268268}
269269
r17963r17964
277277
278278WRITE16_HANDLER( atarisy1_xscroll_w )
279279{
280   atarisy1_state *state = space->machine().driver_data<atarisy1_state>();
280   atarisy1_state *state = space.machine().driver_data<atarisy1_state>();
281281   UINT16 oldscroll = *state->m_xscroll;
282282   UINT16 newscroll = oldscroll;
283283
284284   /* force a partial update in case this changes mid-screen */
285285   COMBINE_DATA(&newscroll);
286286   if (oldscroll != newscroll)
287      space->machine().primary_screen->update_partial(space->machine().primary_screen->vpos());
287      space.machine().primary_screen->update_partial(space.machine().primary_screen->vpos());
288288
289289   /* set the new scroll value */
290290   state->m_playfield_tilemap->set_scrollx(0, newscroll);
r17963r17964
310310
311311WRITE16_HANDLER( atarisy1_yscroll_w )
312312{
313   atarisy1_state *state = space->machine().driver_data<atarisy1_state>();
313   atarisy1_state *state = space.machine().driver_data<atarisy1_state>();
314314   UINT16 oldscroll = *state->m_yscroll;
315315   UINT16 newscroll = oldscroll;
316   int scanline = space->machine().primary_screen->vpos();
316   int scanline = space.machine().primary_screen->vpos();
317317   int adjusted_scroll;
318318
319319   /* force a partial update in case this changes mid-screen */
320320   COMBINE_DATA(&newscroll);
321   space->machine().primary_screen->update_partial(scanline);
321   space.machine().primary_screen->update_partial(scanline);
322322
323323   /* because this latches a new value into the scroll base,
324324       we need to adjust for the scanline */
325325   adjusted_scroll = newscroll;
326   if (scanline <= space->machine().primary_screen->visible_area().max_y)
326   if (scanline <= space.machine().primary_screen->visible_area().max_y)
327327      adjusted_scroll -= (scanline + 1);
328328   state->m_playfield_tilemap->set_scrolly(0, adjusted_scroll);
329329
330330   /* but since we've adjusted it, we must reset it to the normal value
331331       once we hit scanline 0 again */
332   state->m_yscroll_reset_timer->adjust(space->machine().primary_screen->time_until_pos(0), newscroll);
332   state->m_yscroll_reset_timer->adjust(space.machine().primary_screen->time_until_pos(0), newscroll);
333333
334334   /* update the data */
335335   *state->m_yscroll = newscroll;
r17963r17964
359359      {
360360         /* if the timer is in the active bank, update the display list */
361361         atarimo_0_spriteram_w(space, offset, data, 0xffff);
362         update_timers(space->machine(), space->machine().primary_screen->vpos());
362         update_timers(space.machine(), space.machine().primary_screen->vpos());
363363      }
364364
365365      /* if we're about to modify data in the active sprite bank, make sure the video is up-to-date */
r17963r17964
367367      /* renders the next scanline's sprites to the line buffers, but Road Runner still glitches */
368368      /* without the extra +1 */
369369      else
370         space->machine().primary_screen->update_partial(space->machine().primary_screen->vpos() + 2);
370         space.machine().primary_screen->update_partial(space.machine().primary_screen->vpos() + 2);
371371   }
372372
373373   /* let the MO handler do the basic work */
r17963r17964
384384
385385TIMER_DEVICE_CALLBACK( atarisy1_int3off_callback )
386386{
387   address_space *space = timer.machine().device("maincpu")->memory().space(AS_PROGRAM);
387   address_space &space = *timer.machine().device("maincpu")->memory().space(AS_PROGRAM);
388388
389389   /* clear the state */
390390   atarigen_scanline_int_ack_w(space, 0, 0, 0xffff);
r17963r17964
417417
418418READ16_HANDLER( atarisy1_int3state_r )
419419{
420   atarigen_state *atarigen = space->machine().driver_data<atarigen_state>();
420   atarigen_state *atarigen = space.machine().driver_data<atarigen_state>();
421421   return atarigen->m_scanline_int_state ? 0x0080 : 0x0000;
422422}
423423
r17963r17964
432432static void update_timers(running_machine &machine, int scanline)
433433{
434434   atarisy1_state *state = machine.driver_data<atarisy1_state>();
435   address_space *space = NULL;
435   address_space &space = state->generic_space();
436436   UINT16 mem_mask = 0xffff;
437437   int offset = atarimo_get_bank(0) * 64 * 4;
438438   int link = 0, best = scanline, found = 0;
trunk/src/mame/video/atarig42.c
r17963r17964
9999
100100WRITE16_HANDLER( atarig42_mo_control_w )
101101{
102   atarig42_state *state = space->machine().driver_data<atarig42_state>();
102   atarig42_state *state = space.machine().driver_data<atarig42_state>();
103103
104   logerror("MOCONT = %d (scan = %d)\n", data, space->machine().primary_screen->vpos());
104   logerror("MOCONT = %d (scan = %d)\n", data, space.machine().primary_screen->vpos());
105105
106106   /* set the control value */
107107   COMBINE_DATA(&state->m_current_control);
trunk/src/mame/video/vindictr.c
r17963r17964
112112   int c;
113113
114114   /* first blend the data */
115   vindictr_state *state = space->machine().driver_data<vindictr_state>();
115   vindictr_state *state = space.machine().driver_data<vindictr_state>();
116116   COMBINE_DATA(&state->m_generic_paletteram_16[offset]);
117117   data = state->m_generic_paletteram_16[offset];
118118
r17963r17964
124124      int g = ((data >> 4) & 15) * i;
125125      int b = ((data >> 0) & 15) * i;
126126
127      palette_set_color(space->machine(),offset + c*2048,MAKE_RGB(r,g,b));
127      palette_set_color(space.machine(),offset + c*2048,MAKE_RGB(r,g,b));
128128   }
129129}
130130
trunk/src/mame/video/gtia.c
r17963r17964
157157static void gtia_reset(running_machine &machine)
158158{
159159   int i;
160   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
160   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
161161
162162   /* reset the GTIA read/write/helper registers */
163163   for (i = 0; i < 32; i++)
trunk/src/mame/video/gtia.h
r17963r17964
1515
1616struct gtia_interface
1717{
18   UINT8 (*console_read)(address_space *space);
19   void (*console_write)(address_space *space, UINT8 data);
18   UINT8 (*console_read)(address_space &space);
19   void (*console_write)(address_space &space, UINT8 data);
2020};
2121
2222
trunk/src/mame/video/atarisy2.c
r17963r17964
126126
127127WRITE16_HANDLER( atarisy2_xscroll_w )
128128{
129   atarisy2_state *state = space->machine().driver_data<atarisy2_state>();
129   atarisy2_state *state = space.machine().driver_data<atarisy2_state>();
130130   UINT16 oldscroll = *state->m_xscroll;
131131   UINT16 newscroll = oldscroll;
132132   COMBINE_DATA(&newscroll);
133133
134134   /* if anything has changed, force a partial update */
135135   if (newscroll != oldscroll)
136      space->machine().primary_screen->update_partial(space->machine().primary_screen->vpos());
136      space.machine().primary_screen->update_partial(space.machine().primary_screen->vpos());
137137
138138   /* update the playfield scrolling - hscroll is clocked on the following scanline */
139139   state->m_playfield_tilemap->set_scrollx(0, newscroll >> 6);
r17963r17964
159159
160160WRITE16_HANDLER( atarisy2_yscroll_w )
161161{
162   atarisy2_state *state = space->machine().driver_data<atarisy2_state>();
162   atarisy2_state *state = space.machine().driver_data<atarisy2_state>();
163163   UINT16 oldscroll = *state->m_yscroll;
164164   UINT16 newscroll = oldscroll;
165165   COMBINE_DATA(&newscroll);
166166
167167   /* if anything has changed, force a partial update */
168168   if (newscroll != oldscroll)
169      space->machine().primary_screen->update_partial(space->machine().primary_screen->vpos());
169      space.machine().primary_screen->update_partial(space.machine().primary_screen->vpos());
170170
171171   /* if bit 4 is zero, the scroll value is clocked in right away */
172172   if (!(newscroll & 0x10))
173      state->m_playfield_tilemap->set_scrolly(0, (newscroll >> 6) - space->machine().primary_screen->vpos());
173      state->m_playfield_tilemap->set_scrolly(0, (newscroll >> 6) - space.machine().primary_screen->vpos());
174174   else
175      state->m_yscroll_reset_timer->adjust(space->machine().primary_screen->time_until_pos(0), newscroll >> 6);
175      state->m_yscroll_reset_timer->adjust(space.machine().primary_screen->time_until_pos(0), newscroll >> 6);
176176
177177   /* update the playfield banking */
178178   if (state->m_playfield_tile_bank[1] != (newscroll & 0x0f) * 0x400)
r17963r17964
210210
211211   int newword, inten, red, green, blue;
212212
213   atarisy2_state *state = space->machine().driver_data<atarisy2_state>();
213   atarisy2_state *state = space.machine().driver_data<atarisy2_state>();
214214   COMBINE_DATA(&state->m_generic_paletteram_16[offset]);
215215   newword = state->m_generic_paletteram_16[offset];
216216
r17963r17964
218218   red = (color_table[(newword >> 12) & 15] * inten) >> 4;
219219   green = (color_table[(newword >> 8) & 15] * inten) >> 4;
220220   blue = (color_table[(newword >> 4) & 15] * inten) >> 4;
221   palette_set_color(space->machine(), offset, MAKE_RGB(red, green, blue));
221   palette_set_color(space.machine(), offset, MAKE_RGB(red, green, blue));
222222}
223223
224224
r17963r17964
231231
232232READ16_HANDLER( atarisy2_slapstic_r )
233233{
234   atarisy2_state *state = space->machine().driver_data<atarisy2_state>();
234   atarisy2_state *state = space.machine().driver_data<atarisy2_state>();
235235   int result = state->m_slapstic_base[offset];
236236   slapstic_tweak(space, offset);
237237
r17963r17964
243243
244244WRITE16_HANDLER( atarisy2_slapstic_w )
245245{
246   atarisy2_state *state = space->machine().driver_data<atarisy2_state>();
246   atarisy2_state *state = space.machine().driver_data<atarisy2_state>();
247247
248248   slapstic_tweak(space, offset);
249249
r17963r17964
261261
262262READ16_HANDLER( atarisy2_videoram_r )
263263{
264   atarisy2_state *state = space->machine().driver_data<atarisy2_state>();
264   atarisy2_state *state = space.machine().driver_data<atarisy2_state>();
265265   int offs = offset | state->m_videobank;
266266   if (offs >= 0xc00 && offs < 0x1000)
267267   {
r17963r17964
274274
275275WRITE16_HANDLER( atarisy2_videoram_w )
276276{
277   atarisy2_state *state = space->machine().driver_data<atarisy2_state>();
277   atarisy2_state *state = space.machine().driver_data<atarisy2_state>();
278278   int offs = offset | state->m_videobank;
279279
280280   /* alpharam? */
r17963r17964
289289   {
290290      /* force an update if the link of object 0 is about to change */
291291      if (offs == 0x0c03)
292         space->machine().primary_screen->update_partial(space->machine().primary_screen->vpos());
292         space.machine().primary_screen->update_partial(space.machine().primary_screen->vpos());
293293      atarimo_0_spriteram_w(space, offs - 0x0c00, data, mem_mask);
294294   }
295295
trunk/src/mame/video/skydiver.c
r17963r17964
1111
1212void skydiver_state::machine_reset()
1313{
14   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
14   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
1515
1616   /* reset all latches */
17   skydiver_start_lamp_1_w(*space, 0, 0);
18   skydiver_start_lamp_2_w(*space, 0, 0);
19   skydiver_lamp_s_w(*space, 0, 0);
20   skydiver_lamp_k_w(*space, 0, 0);
21   skydiver_lamp_y_w(*space, 0, 0);
22   skydiver_lamp_d_w(*space, 0, 0);
17   skydiver_start_lamp_1_w(space, 0, 0);
18   skydiver_start_lamp_2_w(space, 0, 0);
19   skydiver_lamp_s_w(space, 0, 0);
20   skydiver_lamp_k_w(space, 0, 0);
21   skydiver_lamp_y_w(space, 0, 0);
22   skydiver_lamp_d_w(space, 0, 0);
2323   output_set_value("lampi", 0);
2424   output_set_value("lampv", 0);
2525   output_set_value("lampe", 0);
2626   output_set_value("lampr", 0);
27   skydiver_width_w(*space, 0, 0);
28   skydiver_coin_lockout_w(*space, 0, 0);
27   skydiver_width_w(space, 0, 0);
28   skydiver_coin_lockout_w(space, 0, 0);
2929}
3030
3131
trunk/src/mame/video/ojankohs.c
r17963r17964
184184
185185******************************************************************************/
186186
187void ojankoc_flipscreen( address_space *space, int data )
187void ojankoc_flipscreen( address_space &space, int data )
188188{
189   ojankohs_state *state = space->machine().driver_data<ojankohs_state>();
189   ojankohs_state *state = space.machine().driver_data<ojankohs_state>();
190190   int x, y;
191191   UINT8 color1, color2;
192192
r17963r17964
201201      {
202202         color1 = state->m_videoram[0x0000 + ((y * 256) + x)];
203203         color2 = state->m_videoram[0x3fff - ((y * 256) + x)];
204         state->ojankoc_videoram_w(*space, 0x0000 + ((y * 256) + x), color2);
205         state->ojankoc_videoram_w(*space, 0x3fff - ((y * 256) + x), color1);
204         state->ojankoc_videoram_w(space, 0x0000 + ((y * 256) + x), color2);
205         state->ojankoc_videoram_w(space, 0x3fff - ((y * 256) + x), color1);
206206
207207         color1 = state->m_videoram[0x4000 + ((y * 256) + x)];
208208         color2 = state->m_videoram[0x7fff - ((y * 256) + x)];
209         state->ojankoc_videoram_w(*space, 0x4000 + ((y * 256) + x), color2);
210         state->ojankoc_videoram_w(*space, 0x7fff - ((y * 256) + x), color1);
209         state->ojankoc_videoram_w(space, 0x4000 + ((y * 256) + x), color2);
210         state->ojankoc_videoram_w(space, 0x7fff - ((y * 256) + x), color1);
211211      }
212212   }
213213
r17963r17964
309309
310310   if (state->m_screen_refresh)
311311   {
312      address_space *space = screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
312      address_space &space = *screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
313313
314314      /* redraw bitmap */
315315      for (offs = 0; offs < 0x8000; offs++)
316316      {
317         state->ojankoc_videoram_w(*space, offs, state->m_videoram[offs]);
317         state->ojankoc_videoram_w(space, offs, state->m_videoram[offs]);
318318      }
319319      state->m_screen_refresh = 0;
320320   }
trunk/src/mame/video/bfm_adr2.c
r17963r17964
280280      r = ((data & 0x18)>>3) *  85;  // 00011000b = 0x18
281281      g = ((data & 0x06)>>1) *  85;  // 00000110b = 0x06
282282      b = ((data & 0x01)   ) * 255;
283      palette_set_color(space->machine(), pal, MAKE_RGB(r,g,b));
283      palette_set_color(space.machine(), pal, MAKE_RGB(r,g,b));
284284   }
285285
286286   if ( adder2_screen_page_reg & SL_ACCESS )
r17963r17964
314314
315315static WRITE8_HANDLER( adder2_rom_page_w )
316316{
317   space->machine().root_device().membank("bank2")->set_entry(data&0x03);
317   space.machine().root_device().membank("bank2")->set_entry(data&0x03);
318318}
319319
320320///////////////////////////////////////////////////////////////////////////
trunk/src/mame/video/namcos1.c
r17963r17964
171171
172172READ8_HANDLER( namcos1_videoram_r )
173173{
174   namcos1_state *state = space->machine().driver_data<namcos1_state>();
174   namcos1_state *state = space.machine().driver_data<namcos1_state>();
175175   return state->m_videoram[offset];
176176}
177177
178178WRITE8_HANDLER( namcos1_videoram_w )
179179{
180   namcos1_state *state = space->machine().driver_data<namcos1_state>();
180   namcos1_state *state = space.machine().driver_data<namcos1_state>();
181181   state->m_videoram[offset] = data;
182182   if (offset < 0x7000)
183183   {   /* background 0-3 */
r17963r17964
197197
198198WRITE8_HANDLER( namcos1_paletteram_w )
199199{
200   namcos1_state *state = space->machine().driver_data<namcos1_state>();
200   namcos1_state *state = space.machine().driver_data<namcos1_state>();
201201   if (state->m_paletteram[offset] == data)
202202      return;
203203
r17963r17964
212212      r = state->m_paletteram[offset];
213213      g = state->m_paletteram[offset + 0x0800];
214214      b = state->m_paletteram[offset + 0x1000];
215      palette_set_color(space->machine(),color,MAKE_RGB(r,g,b));
215      palette_set_color(space.machine(),color,MAKE_RGB(r,g,b));
216216   }
217217   else
218218   {
r17963r17964
235235
236236READ8_HANDLER( namcos1_spriteram_r )
237237{
238   namcos1_state *state = space->machine().driver_data<namcos1_state>();
238   namcos1_state *state = space.machine().driver_data<namcos1_state>();
239239   /* 0000-07ff work ram */
240240   /* 0800-0fff sprite ram */
241241   if (offset < 0x1000)
r17963r17964
247247
248248WRITE8_HANDLER( namcos1_spriteram_w )
249249{
250   namcos1_state *state = space->machine().driver_data<namcos1_state>();
250   namcos1_state *state = space.machine().driver_data<namcos1_state>();
251251   /* 0000-07ff work ram */
252252   /* 0800-0fff sprite ram */
253253   if (offset < 0x1000)
trunk/src/mame/video/astrocde.c
r17963r17964
740740}
741741
742742
743static void execute_blit(address_space *space)
743static void execute_blit(address_space &space)
744744{
745   astrocde_state *state = space->machine().driver_data<astrocde_state>();
745   astrocde_state *state = space.machine().driver_data<astrocde_state>();
746746   /*
747747        state->m_pattern_source = counter set U7/U16/U25/U34
748748        state->m_pattern_dest = counter set U9/U18/U30/U39
r17963r17964
795795         if (curwidth == 0 && (state->m_pattern_mode & 0x08) != 0)
796796            busdata = 0;
797797         else
798            busdata = space->read_byte(busaddr);
798            busdata = space.read_byte(busaddr);
799799
800800         /* increment the appropriate address */
801801         if ((state->m_pattern_mode & 0x01) == 0)
r17963r17964
807807
808808         /* address is selected between source/dest based on mode.d0 */
809809         busaddr = ((state->m_pattern_mode & 0x01) != 0) ? state->m_pattern_source : state->m_pattern_dest;
810         space->write_byte(busaddr, busdata);
810         space.write_byte(busaddr, busdata);
811811
812812         /* increment the appropriate address */
813813         if ((state->m_pattern_mode & 0x01) == 0)
r17963r17964
833833   } while (state->m_pattern_height-- != 0);
834834
835835   /* count cycles we ran the bus */
836   space->device().execute().adjust_icount(-cycles);
836   space.device().execute().adjust_icount(-cycles);
837837}
838838
839839
r17963r17964
868868
869869      case 6:      /* height of blit and initiator */
870870         m_pattern_height = data;
871         execute_blit(space.device().memory().space(AS_PROGRAM));
871         execute_blit(*space.device().memory().space(AS_PROGRAM));
872872         break;
873873   }
874874}
trunk/src/mame/video/nbmj8688.c
r17963r17964
594594
595595******************************************************************************/
596596
597static void nbmj8688_HD61830B_instr_w(address_space *space,int offset,int data,int chip)
597static void nbmj8688_HD61830B_instr_w(address_space &space,int offset,int data,int chip)
598598{
599   nbmj8688_state *state = space->machine().driver_data<nbmj8688_state>();
599   nbmj8688_state *state = space.machine().driver_data<nbmj8688_state>();
600600   state->m_HD61830B_instr[chip] = data;
601601}
602602
603static void nbmj8688_HD61830B_data_w(address_space *space,int offset,int data,int chip)
603static void nbmj8688_HD61830B_data_w(address_space &space,int offset,int data,int chip)
604604{
605   nbmj8688_state *state = space->machine().driver_data<nbmj8688_state>();
605   nbmj8688_state *state = space.machine().driver_data<nbmj8688_state>();
606606   switch (state->m_HD61830B_instr[chip])
607607   {
608608      case 0x0a:   // set cursor address (low order)
r17963r17964
622622
623623WRITE8_MEMBER(nbmj8688_state::nbmj8688_HD61830B_0_instr_w)
624624{
625   nbmj8688_HD61830B_instr_w(&space,offset,data,0);
625   nbmj8688_HD61830B_instr_w(space,offset,data,0);
626626}
627627
628628WRITE8_MEMBER(nbmj8688_state::nbmj8688_HD61830B_1_instr_w)
629629{
630   nbmj8688_HD61830B_instr_w(&space,offset,data,1);
630   nbmj8688_HD61830B_instr_w(space,offset,data,1);
631631}
632632
633633WRITE8_MEMBER(nbmj8688_state::nbmj8688_HD61830B_both_instr_w)
634634{
635   nbmj8688_HD61830B_instr_w(&space,offset,data,0);
636   nbmj8688_HD61830B_instr_w(&space,offset,data,1);
635   nbmj8688_HD61830B_instr_w(space,offset,data,0);
636   nbmj8688_HD61830B_instr_w(space,offset,data,1);
637637}
638638
639639WRITE8_MEMBER(nbmj8688_state::nbmj8688_HD61830B_0_data_w)
640640{
641   nbmj8688_HD61830B_data_w(&space,offset,data,0);
641   nbmj8688_HD61830B_data_w(space,offset,data,0);
642642}
643643
644644WRITE8_MEMBER(nbmj8688_state::nbmj8688_HD61830B_1_data_w)
645645{
646   nbmj8688_HD61830B_data_w(&space,offset,data,1);
646   nbmj8688_HD61830B_data_w(space,offset,data,1);
647647}
648648
649649WRITE8_MEMBER(nbmj8688_state::nbmj8688_HD61830B_both_data_w)
650650{
651   nbmj8688_HD61830B_data_w(&space,offset,data,0);
652   nbmj8688_HD61830B_data_w(&space,offset,data,1);
651   nbmj8688_HD61830B_data_w(space,offset,data,0);
652   nbmj8688_HD61830B_data_w(space,offset,data,1);
653653}
654654
655655
trunk/src/mame/video/dogfgt.c
r17963r17964
216216
217217   if (state->m_lastflip != state->flip_screen() || state->m_lastpixcolor != state->m_pixcolor)
218218   {
219      address_space *space = screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
219      address_space &space = *screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
220220
221221      state->m_lastflip = state->flip_screen();
222222      state->m_lastpixcolor = state->m_pixcolor;
223223
224224      for (offs = 0; offs < BITMAPRAM_SIZE; offs++)
225         state->internal_bitmapram_w(*space, offs, state->m_bitmapram[offs]);
225         state->internal_bitmapram_w(space, offs, state->m_bitmapram[offs]);
226226   }
227227
228228
trunk/src/mame/video/avgdvg.c
r17963r17964
12581258         */
12591259      vector_clear_list();
12601260   }
1261   vg_flush(space->machine());
1261   vg_flush(space.machine());
12621262
12631263   vg_set_halt(0);
12641264   vg_run_timer->adjust(attotime::zero);
r17963r17964
12891289
12901290MACHINE_RESET( avgdvg )
12911291{
1292   avgdvg_reset_w (machine.device("maincpu")->memory().space(AS_PROGRAM),0,0);
1292   avgdvg_reset_w (*machine.device("maincpu")->memory().space(AS_PROGRAM),0,0);
12931293}
12941294
12951295
trunk/src/mame/video/namcos2.c
r17963r17964
288288{
289289   COMBINE_DATA(&m_rozram[offset]);
290290   m_tilemap_roz->mark_tile_dirty(offset);
291//      if( space->machine().input().code_pressed(KEYCODE_Q) )
291//      if( space.machine().input().code_pressed(KEYCODE_Q) )
292292//      {
293//          debugger_break(space->machine());
293//          debugger_break(space.machine());
294294//      }
295295}
296296
trunk/src/mame/video/blstroid.c
r17963r17964
8989
9090static TIMER_CALLBACK( irq_off )
9191{
92   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
92   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
9393
9494   /* clear the interrupt */
9595   atarigen_scanline_int_ack_w(space, 0, 0, 0xffff);
trunk/src/mame/video/konamiic.c
r17963r17964
14001400// in this window, +0 = 32 bits from one set of ROMs, and +8 = 32 bits from another set
14011401READ16_HANDLER( K055673_rom_word_r )   // 5bpp
14021402{
1403   UINT8 *ROM8 = (UINT8 *)space->machine().root_device().memregion(K053247_memory_region)->base();
1404   UINT16 *ROM = (UINT16 *)space->machine().root_device().memregion(K053247_memory_region)->base();
1405   int size4 = (space->machine().root_device().memregion(K053247_memory_region)->bytes()/(1024*1024))/5;
1403   UINT8 *ROM8 = (UINT8 *)space.machine().root_device().memregion(K053247_memory_region)->base();
1404   UINT16 *ROM = (UINT16 *)space.machine().root_device().memregion(K053247_memory_region)->base();
1405   int size4 = (space.machine().root_device().memregion(K053247_memory_region)->bytes()/(1024*1024))/5;
14061406   int romofs;
14071407
14081408   size4 *= 4*1024*1024;   // get offset to 5th bit
r17963r17964
14381438
14391439READ16_HANDLER( K055673_GX6bpp_rom_word_r )
14401440{
1441   UINT16 *ROM = (UINT16 *)space->machine().root_device().memregion(K053247_memory_region)->base();
1441   UINT16 *ROM = (UINT16 *)space.machine().root_device().memregion(K053247_memory_region)->base();
14421442   int romofs;
14431443
14441444   romofs = K053246_regs[6]<<16 | K053246_regs[7]<<8 | K053246_regs[4];
r17963r17964
14631463      case 7:
14641464         return ROM[romofs+2];
14651465      default:
1466         LOG(("55673_rom_word_r: Unknown read offset %x (PC=%x)\n", offset, space->device().safe_pc()));
1466         LOG(("55673_rom_word_r: Unknown read offset %x (PC=%x)\n", offset, space.device().safe_pc()));
14671467         break;
14681468   }
14691469
r17963r17964
16661666
16671667static WRITE8_HANDLER( K054000_w )
16681668{
1669//logerror("%04x: write %02x to 054000 address %02x\n",space->device().safe_pc(),data,offset);
1669//logerror("%04x: write %02x to 054000 address %02x\n",space.device().safe_pc(),data,offset);
16701670
16711671   K054000_ram[offset] = data;
16721672}
r17963r17964
16761676   int Acx,Acy,Aax,Aay;
16771677   int Bcx,Bcy,Bax,Bay;
16781678
1679//logerror("%04x: read 054000 address %02x\n",space->device().safe_pc(),offset);
1679//logerror("%04x: read 054000 address %02x\n",space.device().safe_pc(),offset);
16801680
16811681   if (offset != 0x18) return 0;
16821682
r17963r17964
22492249{
22502250   if (mem_mask == 0xff000000)
22512251   {
2252      return K056832_rom_read_b(space->machine(), offset*4, 4, 5, 0)<<24;
2252      return K056832_rom_read_b(space.machine(), offset*4, 4, 5, 0)<<24;
22532253   }
22542254   else if (mem_mask == 0x00ff0000)
22552255   {
2256      return K056832_rom_read_b(space->machine(), offset*4+1, 4, 5, 0)<<16;
2256      return K056832_rom_read_b(space.machine(), offset*4+1, 4, 5, 0)<<16;
22572257   }
22582258   else if (mem_mask == 0x0000ff00)
22592259   {
2260      return K056832_rom_read_b(space->machine(), offset*4+2, 4, 5, 0)<<8;
2260      return K056832_rom_read_b(space.machine(), offset*4+2, 4, 5, 0)<<8;
22612261   }
22622262   else if (mem_mask == 0x000000ff)
22632263   {
2264      return K056832_rom_read_b(space->machine(), offset*4+3, 4, 5, 1);
2264      return K056832_rom_read_b(space.machine(), offset*4+3, 4, 5, 1);
22652265   }
22662266   else
22672267   {
2268      LOG(("Non-byte read of tilemap ROM, PC=%x (mask=%x)\n", space->device().safe_pc(), mem_mask));
2268      LOG(("Non-byte read of tilemap ROM, PC=%x (mask=%x)\n", space.device().safe_pc(), mem_mask));
22692269   }
22702270   return 0;
22712271}
r17963r17964
22742274{
22752275   if (mem_mask == 0xff000000)
22762276   {
2277      return K056832_rom_read_b(space->machine(), offset*4, 4, 6, 0)<<24;
2277      return K056832_rom_read_b(space.machine(), offset*4, 4, 6, 0)<<24;
22782278   }
22792279   else if (mem_mask == 0x00ff0000)
22802280   {
2281      return K056832_rom_read_b(space->machine(), offset*4+1, 4, 6, 0)<<16;
2281      return K056832_rom_read_b(space.machine(), offset*4+1, 4, 6, 0)<<16;
22822282   }
22832283   else if (mem_mask == 0x0000ff00)
22842284   {
2285      return K056832_rom_read_b(space->machine(), offset*4+2, 4, 6, 0)<<8;
2285      return K056832_rom_read_b(space.machine(), offset*4+2, 4, 6, 0)<<8;
22862286   }
22872287   else if (mem_mask == 0x000000ff)
22882288   {
2289      return K056832_rom_read_b(space->machine(), offset*4+3, 4, 6, 0);
2289      return K056832_rom_read_b(space.machine(), offset*4+3, 4, 6, 0);
22902290   }
22912291   else
22922292   {
2293      LOG(("Non-byte read of tilemap ROM, PC=%x (mask=%x)\n", space->device().safe_pc(), mem_mask));
2293      LOG(("Non-byte read of tilemap ROM, PC=%x (mask=%x)\n", space.device().safe_pc(), mem_mask));
22942294   }
22952295   return 0;
22962296}
r17963r17964
23052305
23062306   if (!K056832_rombase)
23072307   {
2308      K056832_rombase = space->machine().root_device().memregion(K056832_memory_region)->base();
2308      K056832_rombase = space.machine().root_device().memregion(K056832_memory_region)->base();
23092309   }
23102310
23112311   if (K056832_regsb[2] & 0x8)
trunk/src/mame/video/harddriv.c
r17963r17964
9595 *
9696 *************************************/
9797
98void hdgsp_write_to_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
98void hdgsp_write_to_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg)
9999{
100   harddriv_state *state = space->machine().driver_data<harddriv_state>();
100   harddriv_state *state = space.machine().driver_data<harddriv_state>();
101101
102102   /* access to the 1bpp/2bpp area */
103103   if (address >= 0x02000000 && address <= 0x020fffff)
r17963r17964
123123}
124124
125125
126void hdgsp_read_from_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
126void hdgsp_read_from_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg)
127127{
128   harddriv_state *state = space->machine().driver_data<harddriv_state>();
128   harddriv_state *state = space.machine().driver_data<harddriv_state>();
129129
130130   if (!state->m_shiftreg_enable)
131131      return;
r17963r17964
178178
179179READ16_HANDLER( hdgsp_control_lo_r )
180180{
181   harddriv_state *state = space->machine().driver_data<harddriv_state>();
181   harddriv_state *state = space.machine().driver_data<harddriv_state>();
182182   return state->m_gsp_control_lo[offset];
183183}
184184
185185
186186WRITE16_HANDLER( hdgsp_control_lo_w )
187187{
188   harddriv_state *state = space->machine().driver_data<harddriv_state>();
188   harddriv_state *state = space.machine().driver_data<harddriv_state>();
189189   int oldword = state->m_gsp_control_lo[offset];
190190   int newword;
191191
r17963r17964
206206
207207READ16_HANDLER( hdgsp_control_hi_r )
208208{
209   harddriv_state *state = space->machine().driver_data<harddriv_state>();
209   harddriv_state *state = space.machine().driver_data<harddriv_state>();
210210   return state->m_gsp_control_hi[offset];
211211}
212212
213213
214214WRITE16_HANDLER( hdgsp_control_hi_w )
215215{
216   harddriv_state *state = space->machine().driver_data<harddriv_state>();
216   harddriv_state *state = space.machine().driver_data<harddriv_state>();
217217   int val = (offset >> 3) & 1;
218218
219219   int oldword = state->m_gsp_control_hi[offset];
r17963r17964
230230
231231      case 0x01:
232232         data = data & (15 >> state->m_gsp_multisync);
233         space->machine().primary_screen->update_partial(space->machine().primary_screen->vpos() - 1);
233         space.machine().primary_screen->update_partial(space.machine().primary_screen->vpos() - 1);
234234         state->m_gfx_finescroll = data;
235235         break;
236236
237237      case 0x02:
238         update_palette_bank(space->machine(), (state->m_gfx_palettebank & ~1) | val);
238         update_palette_bank(space.machine(), (state->m_gfx_palettebank & ~1) | val);
239239         break;
240240
241241      case 0x03:
242         update_palette_bank(space->machine(), (state->m_gfx_palettebank & ~2) | (val << 1));
242         update_palette_bank(space.machine(), (state->m_gfx_palettebank & ~2) | (val << 1));
243243         break;
244244
245245      case 0x04:
246         if (space->machine().total_colors() >= 256 * 8)
247            update_palette_bank(space->machine(), (state->m_gfx_palettebank & ~4) | (val << 2));
246         if (space.machine().total_colors() >= 256 * 8)
247            update_palette_bank(space.machine(), (state->m_gfx_palettebank & ~4) | (val << 2));
248248         break;
249249
250250      case 0x07:
r17963r17964
274274
275275WRITE16_HANDLER( hdgsp_vram_1bpp_w )
276276{
277   harddriv_state *state = space->machine().driver_data<harddriv_state>();
277   harddriv_state *state = space.machine().driver_data<harddriv_state>();
278278   UINT32 *dest = (UINT32 *)&state->m_gsp_vram[offset * 16];
279279   UINT32 *mask = &state->m_mask_table[data * 4];
280280   UINT32 color = state->m_gsp_control_lo[0] & 0xff;
r17963r17964
303303
304304WRITE16_HANDLER( hdgsp_vram_2bpp_w )
305305{
306   harddriv_state *state = space->machine().driver_data<harddriv_state>();
306   harddriv_state *state = space.machine().driver_data<harddriv_state>();
307307   UINT32 *dest = (UINT32 *)&state->m_gsp_vram[offset * 8];
308308   UINT32 *mask = &state->m_mask_table[data * 2];
309309   UINT32 color = state->m_gsp_control_lo[0];
r17963r17964
340340
341341READ16_HANDLER( hdgsp_paletteram_lo_r )
342342{
343   harddriv_state *state = space->machine().driver_data<harddriv_state>();
343   harddriv_state *state = space.machine().driver_data<harddriv_state>();
344344
345345   /* note that the palette is only accessed via the first 256 entries */
346346   /* others are selected via the palette bank */
r17963r17964
352352
353353WRITE16_HANDLER( hdgsp_paletteram_lo_w )
354354{
355   harddriv_state *state = space->machine().driver_data<harddriv_state>();
355   harddriv_state *state = space.machine().driver_data<harddriv_state>();
356356
357357   /* note that the palette is only accessed via the first 256 entries */
358358   /* others are selected via the palette bank */
359359   offset = state->m_gfx_palettebank * 0x100 + (offset & 0xff);
360360
361361   COMBINE_DATA(&state->m_gsp_paletteram_lo[offset]);
362   gsp_palette_change(space->machine(), offset);
362   gsp_palette_change(space.machine(), offset);
363363}
364364
365365
r17963r17964
372372
373373READ16_HANDLER( hdgsp_paletteram_hi_r )
374374{
375   harddriv_state *state = space->machine().driver_data<harddriv_state>();
375   harddriv_state *state = space.machine().driver_data<harddriv_state>();
376376
377377   /* note that the palette is only accessed via the first 256 entries */
378378   /* others are selected via the palette bank */
r17963r17964
384384
385385WRITE16_HANDLER( hdgsp_paletteram_hi_w )
386386{
387   harddriv_state *state = space->machine().driver_data<harddriv_state>();
387   harddriv_state *state = space.machine().driver_data<harddriv_state>();
388388
389389   /* note that the palette is only accessed via the first 256 entries */
390390   /* others are selected via the palette bank */
391391   offset = state->m_gfx_palettebank * 0x100 + (offset & 0xff);
392392
393393   COMBINE_DATA(&state->m_gsp_paletteram_hi[offset]);
394   gsp_palette_change(space->machine(), offset);
394   gsp_palette_change(space.machine(), offset);
395395}
396396
397397
trunk/src/mame/video/vrender0.c
r17963r17964
396396   TILENAME(16,1,2),
397397};
398398
399#define Packet(i) space->read_word(PacketPtr + 2 * i)
399#define Packet(i) space.read_word(PacketPtr + 2 * i)
400400
401401//Returns TRUE if the operation was a flip (sync or async)
402402int vrender0_ProcessPacket(device_t *device, UINT32 PacketPtr, UINT16 *Dest, UINT8 *TEXTURE)
403403{
404404   vr0video_state *vr0 = get_safe_token(device);
405   address_space *space = vr0->cpu->memory().space(AS_PROGRAM);
405   address_space &space = *vr0->cpu->memory().space(AS_PROGRAM);
406406   UINT32 Dx = Packet(1) & 0x3ff;
407407   UINT32 Dy = Packet(2) & 0x1ff;
408408   UINT32 Endx = Packet(3) & 0x3ff;
trunk/src/mame/video/atarig1.c
r17963r17964
7878
7979WRITE16_HANDLER( atarig1_mo_control_w )
8080{
81   atarig1_state *state = space->machine().driver_data<atarig1_state>();
81   atarig1_state *state = space.machine().driver_data<atarig1_state>();
8282
83   logerror("MOCONT = %d (scan = %d)\n", data, space->machine().primary_screen->vpos());
83   logerror("MOCONT = %d (scan = %d)\n", data, space.machine().primary_screen->vpos());
8484
8585   /* set the control value */
8686   COMBINE_DATA(&state->m_current_control);
trunk/src/mame/video/toobin.c
r17963r17964
109109
110110WRITE16_HANDLER( toobin_paletteram_w )
111111{
112   toobin_state *state = space->machine().driver_data<toobin_state>();
112   toobin_state *state = space.machine().driver_data<toobin_state>();
113113   int newword;
114114
115115   COMBINE_DATA(&state->m_generic_paletteram_16[offset]);
r17963r17964
124124      if (green) green += 38;
125125      if (blue) blue += 38;
126126
127      palette_set_color(space->machine(), offset & 0x3ff, MAKE_RGB(red, green, blue));
127      palette_set_color(space.machine(), offset & 0x3ff, MAKE_RGB(red, green, blue));
128128      if (!(newword & 0x8000))
129         palette_set_pen_contrast(space->machine(), offset & 0x3ff, state->m_brightness);
129         palette_set_pen_contrast(space.machine(), offset & 0x3ff, state->m_brightness);
130130      else
131         palette_set_pen_contrast(space->machine(), offset & 0x3ff, 1.0);
131         palette_set_pen_contrast(space.machine(), offset & 0x3ff, 1.0);
132132   }
133133}
134134
135135
136136WRITE16_HANDLER( toobin_intensity_w )
137137{
138   toobin_state *state = space->machine().driver_data<toobin_state>();
138   toobin_state *state = space.machine().driver_data<toobin_state>();
139139   int i;
140140
141141   if (ACCESSING_BITS_0_7)
r17963r17964
144144
145145      for (i = 0; i < 0x400; i++)
146146         if (!(state->m_generic_paletteram_16[i] & 0x8000))
147            palette_set_pen_contrast(space->machine(), i, state->m_brightness);
147            palette_set_pen_contrast(space.machine(), i, state->m_brightness);
148148   }
149149}
150150
r17963r17964
158158
159159WRITE16_HANDLER( toobin_xscroll_w )
160160{
161   toobin_state *state = space->machine().driver_data<toobin_state>();
161   toobin_state *state = space.machine().driver_data<toobin_state>();
162162   UINT16 oldscroll = *state->m_xscroll;
163163   UINT16 newscroll = oldscroll;
164164   COMBINE_DATA(&newscroll);
165165
166166   /* if anything has changed, force a partial update */
167167   if (newscroll != oldscroll)
168      space->machine().primary_screen->update_partial(space->machine().primary_screen->vpos());
168      space.machine().primary_screen->update_partial(space.machine().primary_screen->vpos());
169169
170170   /* update the playfield scrolling - hscroll is clocked on the following scanline */
171171   state->m_playfield_tilemap->set_scrollx(0, newscroll >> 6);
r17963r17964
178178
179179WRITE16_HANDLER( toobin_yscroll_w )
180180{
181   toobin_state *state = space->machine().driver_data<toobin_state>();
181   toobin_state *state = space.machine().driver_data<toobin_state>();
182182   UINT16 oldscroll = *state->m_yscroll;
183183   UINT16 newscroll = oldscroll;
184184   COMBINE_DATA(&newscroll);
185185
186186   /* if anything has changed, force a partial update */
187187   if (newscroll != oldscroll)
188      space->machine().primary_screen->update_partial(space->machine().primary_screen->vpos());
188      space.machine().primary_screen->update_partial(space.machine().primary_screen->vpos());
189189
190190   /* if bit 4 is zero, the scroll value is clocked in right away */
191191   state->m_playfield_tilemap->set_scrolly(0, newscroll >> 6);
r17963r17964
211211
212212   /* if the SLIP is changing, force a partial update first */
213213   if (oldslip != newslip)
214      space->machine().primary_screen->update_partial(space->machine().primary_screen->vpos());
214      space.machine().primary_screen->update_partial(space.machine().primary_screen->vpos());
215215
216216   /* update the data */
217217   atarimo_0_slipram_w(space, offset, data, mem_mask);
trunk/src/mame/video/digdug.c
r17963r17964
165165
166166WRITE8_HANDLER( digdug_videoram_w )
167167{
168   digdug_state *state =  space->machine().driver_data<digdug_state>();
168   digdug_state *state =  space.machine().driver_data<digdug_state>();
169169
170170   state->m_videoram[offset] = data;
171171   state->m_fg_tilemap->mark_tile_dirty(offset & 0x3ff);
r17963r17964
173173
174174WRITE8_HANDLER( digdug_PORT_w )
175175{
176   digdug_state *state =  space->machine().driver_data<digdug_state>();
176   digdug_state *state =  space.machine().driver_data<digdug_state>();
177177
178178   switch (offset)
179179   {
trunk/src/mame/video/cyberbal.c
r17963r17964
223223
224224WRITE16_HANDLER( cyberbal_paletteram_0_w )
225225{
226   cyberbal_state *state = space->machine().driver_data<cyberbal_state>();
226   cyberbal_state *state = space.machine().driver_data<cyberbal_state>();
227227   COMBINE_DATA(&state->m_paletteram_0[offset]);
228   set_palette_entry(space->machine(), offset, state->m_paletteram_0[offset]);
228   set_palette_entry(space.machine(), offset, state->m_paletteram_0[offset]);
229229}
230230
231231READ16_HANDLER( cyberbal_paletteram_0_r )
232232{
233   cyberbal_state *state = space->machine().driver_data<cyberbal_state>();
233   cyberbal_state *state = space.machine().driver_data<cyberbal_state>();
234234   return state->m_paletteram_0[offset];
235235}
236236
237237
238238WRITE16_HANDLER( cyberbal_paletteram_1_w )
239239{
240   cyberbal_state *state = space->machine().driver_data<cyberbal_state>();
240   cyberbal_state *state = space.machine().driver_data<cyberbal_state>();
241241   COMBINE_DATA(&state->m_paletteram_1[offset]);
242   set_palette_entry(space->machine(), offset + 0x800, state->m_paletteram_1[offset]);
242   set_palette_entry(space.machine(), offset + 0x800, state->m_paletteram_1[offset]);
243243}
244244
245245READ16_HANDLER( cyberbal_paletteram_1_r )
246246{
247   cyberbal_state *state = space->machine().driver_data<cyberbal_state>();
247   cyberbal_state *state = space.machine().driver_data<cyberbal_state>();
248248   return state->m_paletteram_1[offset];
249249}
250250
trunk/src/mame/video/atari.c
r17963r17964
11741174 *****************************************************************************/
11751175static TIMER_CALLBACK( antic_scanline_render )
11761176{
1177   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1177   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
11781178
11791179   VIDEO *video = antic.video[antic.scanline];
11801180   LOG(("           @cycle #%3d render mode $%X lines to go #%d\n", cycle(machine), (antic.cmd & 0x0f), antic.modelines));
r17963r17964
12441244     **************************************************************/
12451245    if( new_cmd & ANTIC_LMS )
12461246    {
1247       address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1247       address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
12481248      int addr = RDANTIC(space);
12491249        antic.doffs = (antic.doffs + 1) & DOFFS;
12501250        addr += 256 * RDANTIC(space);
r17963r17964
12691269 *****************************************************************************/
12701270static void antic_scanline_dma(running_machine &machine, int param)
12711271{
1272   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1272   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
12731273   LOG(("           @cycle #%3d DMA fetch\n", cycle(machine)));
12741274   if (antic.scanline == VBL_END)
12751275      antic.r.nmist &= ~VBL_NMI;
trunk/src/mame/video/segas32.c
r17963r17964
370370}
371371
372372
373INLINE UINT16 common_paletteram_r(address_space *space, int which, offs_t offset)
373INLINE UINT16 common_paletteram_r(address_space &space, int which, offs_t offset)
374374{
375   segas32_state *state = space->machine().driver_data<segas32_state>();
375   segas32_state *state = space.machine().driver_data<segas32_state>();
376376   int convert;
377377
378378   /* the lower half of palette RAM is formatted xBBBBBGGGGGRRRRR */
r17963r17964
389389}
390390
391391
392static void common_paletteram_w(address_space *space, int which, offs_t offset, UINT16 data, UINT16 mem_mask)
392static void common_paletteram_w(address_space &space, int which, offs_t offset, UINT16 data, UINT16 mem_mask)
393393{
394   segas32_state *state = space->machine().driver_data<segas32_state>();
394   segas32_state *state = space.machine().driver_data<segas32_state>();
395395   UINT16 value;
396396   int convert;
397397
r17963r17964
408408   COMBINE_DATA(&value);
409409   if (convert) value = xBGRBBBBGGGGRRRR_to_xBBBBBGGGGGRRRRR(value);
410410   state->m_system32_paletteram[which][offset] = value;
411   update_color(space->machine(), 0x4000*which + offset, value);
411   update_color(space.machine(), 0x4000*which + offset, value);
412412
413413   /* if blending is enabled, writes go to both halves of palette RAM */
414414   if (state->m_mixer_control[which][0x4e/2] & 0x0880)
r17963r17964
421421      COMBINE_DATA(&value);
422422      if (convert) value = xBGRBBBBGGGGRRRR_to_xBBBBBGGGGGRRRRR(value);
423423      state->m_system32_paletteram[which][offset] = value;
424      update_color(space->machine(), 0x4000*which + offset, value);
424      update_color(space.machine(), 0x4000*which + offset, value);
425425   }
426426}
427427
r17963r17964
435435
436436READ16_MEMBER(segas32_state::system32_paletteram_r)
437437{
438   return common_paletteram_r(&space, 0, offset);
438   return common_paletteram_r(space, 0, offset);
439439}
440440
441441
442442WRITE16_MEMBER(segas32_state::system32_paletteram_w)
443443{
444   common_paletteram_w(&space, 0, offset, data, mem_mask);
444   common_paletteram_w(space, 0, offset, data, mem_mask);
445445}
446446
447447
448448READ32_MEMBER(segas32_state::multi32_paletteram_0_r)
449449{
450   return common_paletteram_r(&space, 0, offset*2+0) |
451         (common_paletteram_r(&space, 0, offset*2+1) << 16);
450   return common_paletteram_r(space, 0, offset*2+0) |
451         (common_paletteram_r(space, 0, offset*2+1) << 16);
452452}
453453
454454
455455WRITE32_MEMBER(segas32_state::multi32_paletteram_0_w)
456456{
457457   if (ACCESSING_BITS_0_15)
458      common_paletteram_w(&space, 0, offset*2+0, data, mem_mask);
458      common_paletteram_w(space, 0, offset*2+0, data, mem_mask);
459459   if (ACCESSING_BITS_16_31)
460      common_paletteram_w(&space, 0, offset*2+1, data >> 16, mem_mask >> 16);
460      common_paletteram_w(space, 0, offset*2+1, data >> 16, mem_mask >> 16);
461461}
462462
463463
464464READ32_MEMBER(segas32_state::multi32_paletteram_1_r)
465465{
466   return common_paletteram_r(&space, 1, offset*2+0) |
467         (common_paletteram_r(&space, 1, offset*2+1) << 16);
466   return common_paletteram_r(space, 1, offset*2+0) |
467         (common_paletteram_r(space, 1, offset*2+1) << 16);
468468}
469469
470470
471471WRITE32_MEMBER(segas32_state::multi32_paletteram_1_w)
472472{
473473   if (ACCESSING_BITS_0_15)
474      common_paletteram_w(&space, 1, offset*2+0, data, mem_mask);
474      common_paletteram_w(space, 1, offset*2+0, data, mem_mask);
475475   if (ACCESSING_BITS_16_31)
476      common_paletteram_w(&space, 1, offset*2+1, data >> 16, mem_mask >> 16);
476      common_paletteram_w(space, 1, offset*2+1, data >> 16, mem_mask >> 16);
477477}
478478
479479
trunk/src/mame/video/badlands.c
r17963r17964
9191
9292WRITE16_HANDLER( badlands_pf_bank_w )
9393{
94   badlands_state *state = space->machine().driver_data<badlands_state>();
94   badlands_state *state = space.machine().driver_data<badlands_state>();
9595   if (ACCESSING_BITS_0_7)
9696      if (state->m_playfield_tile_bank != (data & 1))
9797      {
98         space->machine().primary_screen->update_partial(space->machine().primary_screen->vpos());
98         space.machine().primary_screen->update_partial(space.machine().primary_screen->vpos());
9999         state->m_playfield_tile_bank = data & 1;
100100         state->m_playfield_tilemap->mark_all_dirty();
101101      }
trunk/src/mame/video/decocass.c
r17963r17964
177177     * (ME/ input on 1st paletteram, inverter -> ME/ on 2nd)
178178     */
179179   offset = (offset & 31) ^ 16;
180   colortable_palette_set_color(space->machine().colortable, offset, MAKE_RGB(pal3bit(~data >> 0), pal3bit(~data >> 3), pal2bit(~data >> 6)));
180   colortable_palette_set_color(space.machine().colortable, offset, MAKE_RGB(pal3bit(~data >> 0), pal3bit(~data >> 3), pal2bit(~data >> 6)));
181181}
182182
183183WRITE8_HANDLER( decocass_charram_w )
184184{
185   decocass_state *state = space->machine().driver_data<decocass_state>();
185   decocass_state *state = space.machine().driver_data<decocass_state>();
186186   state->m_charram[offset] = data;
187187   /* dirty sprite */
188   space->machine().gfx[1]->mark_dirty((offset >> 5) & 255);
188   space.machine().gfx[1]->mark_dirty((offset >> 5) & 255);
189189   /* dirty char */
190   space->machine().gfx[0]->mark_dirty((offset >> 3) & 1023);
190   space.machine().gfx[0]->mark_dirty((offset >> 3) & 1023);
191191}
192192
193193
194194WRITE8_HANDLER( decocass_fgvideoram_w )
195195{
196   decocass_state *state = space->machine().driver_data<decocass_state>();
196   decocass_state *state = space.machine().driver_data<decocass_state>();
197197   state->m_fgvideoram[offset] = data;
198198   state->m_fg_tilemap->mark_tile_dirty(offset);
199199}
200200
201201WRITE8_HANDLER( decocass_colorram_w )
202202{
203   decocass_state *state = space->machine().driver_data<decocass_state>();
203   decocass_state *state = space.machine().driver_data<decocass_state>();
204204   state->m_colorram[offset] = data;
205205   state->m_fg_tilemap->mark_tile_dirty(offset);
206206}
r17963r17964
216216
217217WRITE8_HANDLER( decocass_tileram_w )
218218{
219   decocass_state *state = space->machine().driver_data<decocass_state>();
219   decocass_state *state = space.machine().driver_data<decocass_state>();
220220   state->m_tileram[offset] = data;
221221   /* dirty tile (64 bytes per tile) */
222   space->machine().gfx[2]->mark_dirty((offset / 64) & 15);
222   space.machine().gfx[2]->mark_dirty((offset / 64) & 15);
223223   /* first 1KB of tile RAM is shared with tilemap RAM */
224224   if (offset < state->m_bgvideoram_size)
225      mark_bg_tile_dirty(space->machine(), offset);
225      mark_bg_tile_dirty(space.machine(), offset);
226226}
227227
228228WRITE8_HANDLER( decocass_objectram_w )
229229{
230   decocass_state *state = space->machine().driver_data<decocass_state>();
230   decocass_state *state = space.machine().driver_data<decocass_state>();
231231   state->m_objectram[offset] = data;
232232   /* dirty the object */
233   space->machine().gfx[3]->mark_dirty(0);
234   space->machine().gfx[3]->mark_dirty(1);
233   space.machine().gfx[3]->mark_dirty(0);
234   space.machine().gfx[3]->mark_dirty(1);
235235}
236236
237237WRITE8_HANDLER( decocass_bgvideoram_w )
238238{
239   decocass_state *state = space->machine().driver_data<decocass_state>();
239   decocass_state *state = space.machine().driver_data<decocass_state>();
240240   state->m_bgvideoram[offset] = data;
241   mark_bg_tile_dirty(space->machine(), offset);
241   mark_bg_tile_dirty(space.machine(), offset);
242242}
243243
244244/* The watchdog is a 4bit counter counting down every frame */
245245WRITE8_HANDLER( decocass_watchdog_count_w )
246246{
247   decocass_state *state = space->machine().driver_data<decocass_state>();
247   decocass_state *state = space.machine().driver_data<decocass_state>();
248248   LOG(1,("decocass_watchdog_count_w: $%02x\n", data));
249249   state->m_watchdog_count = data & 0x0f;
250250}
251251
252252WRITE8_HANDLER( decocass_watchdog_flip_w )
253253{
254   decocass_state *state = space->machine().driver_data<decocass_state>();
254   decocass_state *state = space.machine().driver_data<decocass_state>();
255255   LOG(1,("decocass_watchdog_flip_w: $%02x\n", data));
256256   state->m_watchdog_flip = data;
257257}
258258
259259WRITE8_HANDLER( decocass_color_missiles_w )
260260{
261   decocass_state *state = space->machine().driver_data<decocass_state>();
261   decocass_state *state = space.machine().driver_data<decocass_state>();
262262   LOG(1,("decocass_color_missiles_w: $%02x\n", data));
263263   /* only bits D0-D2 and D4-D6 are connected to
264264     * the color RAM demux:
r17963r17964
280280 */
281281WRITE8_HANDLER( decocass_mode_set_w )
282282{
283   decocass_state *state = space->machine().driver_data<decocass_state>();
283   decocass_state *state = space.machine().driver_data<decocass_state>();
284284   if (data == state->m_mode_set)
285285      return;
286286   LOG(1,("decocass_mode_set_w: $%02x (%s%s%s%s%s%s%s%s)\n", data,
r17963r17964
298298
299299WRITE8_HANDLER( decocass_color_center_bot_w )
300300{
301   decocass_state *state = space->machine().driver_data<decocass_state>();
301   decocass_state *state = space.machine().driver_data<decocass_state>();
302302   if (data == state->m_color_center_bot)
303303      return;
304304   LOG(1,("decocass_color_center_bot_w: $%02x (color:%d, center_bot:%d)\n", data, data & 3, data >> 4));
r17963r17964
325325
326326WRITE8_HANDLER( decocass_back_h_shift_w )
327327{
328   decocass_state *state = space->machine().driver_data<decocass_state>();
328   decocass_state *state = space.machine().driver_data<decocass_state>();
329329   if (data == state->m_back_h_shift)
330330      return;
331331   LOG(1,("decocass_back_h_shift_w: $%02x\n", data));
r17963r17964
334334
335335WRITE8_HANDLER( decocass_back_vl_shift_w )
336336{
337   decocass_state *state = space->machine().driver_data<decocass_state>();
337   decocass_state *state = space.machine().driver_data<decocass_state>();
338338   if (data == state->m_back_vl_shift)
339339      return;
340340   LOG(1,("decocass_back_vl_shift_w: $%02x\n", data));
r17963r17964
343343
344344WRITE8_HANDLER( decocass_back_vr_shift_w )
345345{
346   decocass_state *state = space->machine().driver_data<decocass_state>();
346   decocass_state *state = space.machine().driver_data<decocass_state>();
347347   if (data == state->m_back_vr_shift)
348348      return;
349349   LOG(1,("decocass_back_vr_shift_w: $%02x\n", data));
r17963r17964
352352
353353WRITE8_HANDLER( decocass_part_h_shift_w )
354354{
355   decocass_state *state = space->machine().driver_data<decocass_state>();
355   decocass_state *state = space.machine().driver_data<decocass_state>();
356356   if (data == state->m_part_v_shift )
357357      return;
358358   LOG(1,("decocass_part_h_shift_w: $%02x\n", data));
r17963r17964
361361
362362WRITE8_HANDLER( decocass_part_v_shift_w )
363363{
364   decocass_state *state = space->machine().driver_data<decocass_state>();
364   decocass_state *state = space.machine().driver_data<decocass_state>();
365365   if (data == state->m_part_v_shift )
366366      return;
367367   LOG(1,("decocass_part_v_shift_w: $%02x\n", data));
r17963r17964
370370
371371WRITE8_HANDLER( decocass_center_h_shift_space_w )
372372{
373   decocass_state *state = space->machine().driver_data<decocass_state>();
373   decocass_state *state = space.machine().driver_data<decocass_state>();
374374   if (data == state->m_center_h_shift_space)
375375      return;
376376   LOG(1,("decocass_center_h_shift_space_w: $%02x\n", data));
r17963r17964
379379
380380WRITE8_HANDLER( decocass_center_v_shift_w )
381381{
382   decocass_state *state = space->machine().driver_data<decocass_state>();
382   decocass_state *state = space.machine().driver_data<decocass_state>();
383383   LOG(1,("decocass_center_v_shift_w: $%02x\n", data));
384384   state->m_center_v_shift = data;
385385}
trunk/src/mame/video/bfm_dm01.c
r17963r17964
119119      if ( data & 8 )     dm01.busy = 0;
120120      else           dm01.busy = 1;
121121
122      dm01.intf->busy_func(space->machine(),dm01.busy);
122      dm01.intf->busy_func(space.machine(),dm01.busy);
123123   }
124124}
125125
r17963r17964
209209
210210static WRITE8_HANDLER( unknown_w )
211211{
212   space->machine().device("matrix")->execute().set_input_line(INPUT_LINE_NMI, CLEAR_LINE ); //?
212   space.machine().device("matrix")->execute().set_input_line(INPUT_LINE_NMI, CLEAR_LINE ); //?
213213}
214214
215215///////////////////////////////////////////////////////////////////////////
trunk/src/mame/video/konicdev.c
r17963r17964
22952295         else if (offset >= 0x3a00 && offset < 0x3c00)
22962296         {   /* B x scroll */   }
22972297//          else
2298//logerror("%04x: read from unknown 052109 address %04x\n",space->device().safe_pc(),offset);
2298//logerror("%04x: read from unknown 052109 address %04x\n",space.device().safe_pc(),offset);
22992299      }
23002300
23012301      return k052109->ram[offset];
r17963r17964
23192319      addr = (code << 5) + (offset & 0x1f);
23202320      addr &= device->machine().root_device().memregion(k052109->memory_region)->bytes() - 1;
23212321
2322//      logerror("%04x: off = %04x sub = %02x (bnk = %x) adr = %06x\n", space->device().safe_pc(), offset, k052109->romsubbank, bank, addr);
2322//      logerror("%04x: off = %04x sub = %02x (bnk = %x) adr = %06x\n", space.device().safe_pc(), offset, k052109->romsubbank, bank, addr);
23232323
23242324      return device->machine().root_device().memregion(k052109->memory_region)->base()[addr];
23252325   }
r17963r17964
23502350         if (k052109->scrollctrl != data)
23512351         {
23522352//popmessage("scrollcontrol = %02x", data);
2353//logerror("%04x: rowscrollcontrol = %02x\n", space->device().safe_pc(), data);
2353//logerror("%04x: rowscrollcontrol = %02x\n", space.device().safe_pc(), data);
23542354            k052109->scrollctrl = data;
23552355         }
23562356      }
23572357      else if (offset == 0x1d00)
23582358      {
2359//logerror("%04x: 052109 register 1d00 = %02x\n", space->device().safe_pc(), data);
2359//logerror("%04x: 052109 register 1d00 = %02x\n", space.device().safe_pc(), data);
23602360         /* bit 2 = irq enable */
23612361         /* the custom chip can also generate NMI and FIRQ, for use with a 6809 */
23622362         k052109->irq_enabled = data & 0x04;
r17963r17964
23892389      }
23902390      else if (offset == 0x1e00 || offset == 0x3e00) // Surprise Attack uses offset 0x3e00
23912391      {
2392//logerror("%04x: 052109 register 1e00 = %02x\n",space->device().safe_pc(),data);
2392//logerror("%04x: 052109 register 1e00 = %02x\n",space.device().safe_pc(),data);
23932393         k052109->romsubbank = data;
23942394      }
23952395      else if (offset == 0x1e80)
23962396      {
2397//if ((data & 0xfe)) logerror("%04x: 052109 register 1e80 = %02x\n",space->device().safe_pc(),data);
2397//if ((data & 0xfe)) logerror("%04x: 052109 register 1e80 = %02x\n",space.device().safe_pc(),data);
23982398         k052109->tilemap[0]->set_flip((data & 1) ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
23992399         k052109->tilemap[1]->set_flip((data & 1) ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
24002400         k052109->tilemap[2]->set_flip((data & 1) ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
r17963r17964
24492449         k052109->charrombank_2[3] = (data >> 4) & 0x0f;
24502450      }
24512451//      else
2452//          logerror("%04x: write %02x to unknown 052109 address %04x\n",space->device().safe_pc(),data,offset);
2452//          logerror("%04x: write %02x to unknown 052109 address %04x\n",space.device().safe_pc(),data,offset);
24532453   }
24542454}
24552455
r17963r17964
45384538      case 7:
45394539         return ROM[romofs + 2];
45404540      default:
4541//          LOG(("55673_rom_word_r: Unknown read offset %x (PC=%x)\n", offset, space->device().safe_pc()));
4541//          LOG(("55673_rom_word_r: Unknown read offset %x (PC=%x)\n", offset, space.device().safe_pc()));
45424542         break;
45434543   }
45444544
r17963r17964
45554555      addr = (k053246->kx46_regs[6] << 17) | (k053246->kx46_regs[7] << 9) | (k053246->kx46_regs[4] << 1) | ((offset & 1) ^ 1);
45564556      addr &= device->machine().root_device().memregion(k053246->memory_region)->bytes() - 1;
45574557//      if (VERBOSE)
4558//          popmessage("%04x: offset %02x addr %06x", space->device().safe_pc(), offset, addr);
4558//          popmessage("%04x: offset %02x addr %06x", space.device().safe_pc(), offset, addr);
45594559      return device->machine().root_device().memregion(k053246->memory_region)->base()[addr];
45604560   }
45614561   else
45624562   {
4563//      LOG(("%04x: read from unknown 053246 address %x\n", space->device().safe_pc(), offset));
4563//      LOG(("%04x: read from unknown 053246 address %x\n", space.device().safe_pc(), offset));
45644564      return 0;
45654565   }
45664566}
r17963r17964
61676167{
61686168   k054000_state *k054000 = k054000_get_safe_token(device);
61696169
6170   //logerror("%04x: write %02x to 054000 address %02x\n",space->device().safe_pc(),data,offset);
6170   //logerror("%04x: write %02x to 054000 address %02x\n",space.device().safe_pc(),data,offset);
61716171   k054000->regs[offset] = data;
61726172}
61736173
r17963r17964
61776177   int Acx, Acy, Aax, Aay;
61786178   int Bcx, Bcy, Bax, Bay;
61796179
6180   //logerror("%04x: read 054000 address %02x\n", space->device().safe_pc(), offset);
6180   //logerror("%04x: read 054000 address %02x\n", space.device().safe_pc(), offset);
61816181
61826182   if (offset != 0x18)
61836183      return 0;
r17963r17964
63136313WRITE8_DEVICE_HANDLER( k051733_w )
63146314{
63156315   k051733_state *k051733= k051733_get_safe_token(device);
6316   //logerror("%04x: write %02x to 051733 address %02x\n", space->device().safe_pc(), data, offset);
6316   //logerror("%04x: write %02x to 051733 address %02x\n", space.device().safe_pc(), data, offset);
63176317
63186318   k051733->ram[offset] = data;
63196319}
r17963r17964
68436843      return k056832_rom_read_b(device, offset * 2 + 1, 4, 5, 0)<<16;
68446844   else
68456845   {
6846      //LOG(("Non-byte read of tilemap ROM, PC=%x (mask=%x)\n", space->device().safe_pc(), mem_mask));
6846      //LOG(("Non-byte read of tilemap ROM, PC=%x (mask=%x)\n", space.device().safe_pc(), mem_mask));
68476847   }
68486848   return 0;
68496849}
r17963r17964
68606860      return k056832_rom_read_b(device, offset * 4 + 3, 4, 5, 1);
68616861   else
68626862   {
6863      //LOG(("Non-byte read of tilemap ROM, PC=%x (mask=%x)\n", space->device().safe_pc(), mem_mask));
6863      //LOG(("Non-byte read of tilemap ROM, PC=%x (mask=%x)\n", space.device().safe_pc(), mem_mask));
68646864   }
68656865   return 0;
68666866}
r17963r17964
68776877      return k056832_rom_read_b(device, offset * 4 + 3, 4, 6, 0);
68786878   else
68796879   {
6880      //LOG(("Non-byte read of tilemap ROM, PC=%x (mask=%x)\n", space->device().safe_pc(), mem_mask));
6880      //LOG(("Non-byte read of tilemap ROM, PC=%x (mask=%x)\n", space.device().safe_pc(), mem_mask));
68816881   }
68826882   return 0;
68836883}
r17963r17964
93689368         }
93699369
93709370      default:
9371         //mame_printf_debug("k001005->r: %08X, %08X at %08X\n", offset, mem_mask, space->device().safe_pc());
9371         //mame_printf_debug("k001005->r: %08X, %08X at %08X\n", offset, mem_mask, space.device().safe_pc());
93729372         break;
93739373   }
93749374   return 0;
r17963r17964
94019401            sharc_set_flag_input(k001005->dsp, 1, ASSERT_LINE);
94029402         }
94039403
9404       //  mame_printf_debug("K001005 FIFO write: %08X at %08X\n", data, space->device().safe_pc());
9404       //  mame_printf_debug("K001005 FIFO write: %08X at %08X\n", data, space.device().safe_pc());
94059405         k001005->fifo[k001005->fifo_write_ptr] = data;
94069406         k001005->fifo_write_ptr++;
94079407         k001005->fifo_write_ptr &= 0x7ff;
r17963r17964
94659465         break;
94669466
94679467      default:
9468         //mame_printf_debug("k001005->w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, space->device().safe_pc());
9468         //mame_printf_debug("k001005->w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, space.device().safe_pc());
94699469         break;
94709470   }
94719471
r17963r17964
1047810478
1047910479   if (offset != 0x08 && offset != 0x09 && offset != 0x0a /*&& offset != 0x17 && offset != 0x18*/)
1048010480   {
10481      //printf("K001604_reg_w (%d), %02X, %08X, %08X at %08X\n", chip, offset, data, mem_mask, space->device().safe_pc());
10481      //printf("K001604_reg_w (%d), %02X, %08X, %08X at %08X\n", chip, offset, data, mem_mask, space.device().safe_pc());
1048210482   }
1048310483}
1048410484
trunk/src/mame/video/neogeo.c
r17963r17964
829829      case 0x01: set_videoram_data(machine(), data); break;
830830      case 0x02: set_videoram_modulo(machine(), data); break;
831831      case 0x03: set_video_control(machine(), data); break;
832      case 0x04: neogeo_set_display_counter_msb(&space, data); break;
833      case 0x05: neogeo_set_display_counter_lsb(&space, data); break;
832      case 0x04: neogeo_set_display_counter_msb(space, data); break;
833      case 0x05: neogeo_set_display_counter_lsb(space, data); break;
834834      case 0x06: neogeo_acknowledge_interrupt(machine(), data); break;
835835      case 0x07: break; /* unknown, see get_video_control */
836836      }
trunk/src/mame/video/combatsc.c
r17963r17964
508508
509509static void bootleg_draw_sprites( running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect, const UINT8 *source, int circuit )
510510{
511   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
511   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
512512   gfx_element *gfx = machine.gfx[circuit + 2];
513513
514   int limit = circuit ? (space->read_byte(0xc2) * 256 + space->read_byte(0xc3)) : (space->read_byte(0xc0) * 256 + space->read_byte(0xc1));
514   int limit = circuit ? (space.read_byte(0xc2) * 256 + space.read_byte(0xc3)) : (space.read_byte(0xc0) * 256 + space.read_byte(0xc1));
515515   const UINT8 *finish;
516516
517517   source += 0x1000;
trunk/src/mame/video/ppu2c0x.c
r17963r17964
12711271 *
12721272 *************************************/
12731273
1274void ppu2c0x_device::spriteram_dma( address_space *space, const UINT8 page )
1274void ppu2c0x_device::spriteram_dma( address_space &space, const UINT8 page )
12751275{
12761276   int i;
12771277   int address = page << 8;
12781278
12791279   for (i = 0; i < SPRITERAM_SIZE; i++)
12801280   {
1281      UINT8 spriteData = space->read_byte(address + i);
1282      space->write_byte(0x2004, spriteData);
1281      UINT8 spriteData = space.read_byte(address + i);
1282      space.write_byte(0x2004, spriteData);
12831283   }
12841284
12851285   // should last 513 CPU cycles.
1286   space->device().execute().adjust_icount(-513);
1286   space.device().execute().adjust_icount(-513);
12871287}
12881288
12891289/*************************************
trunk/src/mame/video/ppu2c0x.h
r17963r17964
168168   void render_scanline();
169169   void update_scanline();
170170
171   void spriteram_dma(address_space *space, const UINT8 page );
171   void spriteram_dma(address_space &space, const UINT8 page );
172172   void render( bitmap_ind16 &bitmap, int flipx, int flipy, int sx, int sy );
173173   int get_pixel( int x, int y );
174174
trunk/src/mame/video/homedata.c
r17963r17964
3232
3333***************************************************************************/
3434
35static void mrokumei_handleblit( address_space *space, int rom_base )
35static void mrokumei_handleblit( address_space &space, int rom_base )
3636{
37   homedata_state *state = space->machine().driver_data<homedata_state>();
37   homedata_state *state = space.machine().driver_data<homedata_state>();
3838   int i;
3939   int dest_param;
4040   int source_addr;
r17963r17964
9999         } /* i!=0 */
100100
101101         if (data)   /* 00 is a nop */
102            state->mrokumei_videoram_w(*space, base_addr + dest_addr, data);
102            state->mrokumei_videoram_w(space, base_addr + dest_addr, data);
103103
104104         if (state->m_vreg[1] & 0x80)   /* flip screen */
105105         {
r17963r17964
119119   state->m_maincpu->set_input_line(M6809_FIRQ_LINE, HOLD_LINE);
120120}
121121
122static void reikaids_handleblit( address_space *space, int rom_base )
122static void reikaids_handleblit( address_space &space, int rom_base )
123123{
124   homedata_state *state = space->machine().driver_data<homedata_state>();
124   homedata_state *state = space.machine().driver_data<homedata_state>();
125125   int i;
126126   UINT16 dest_param;
127127   int flipx;
r17963r17964
202202                  addr ^= 0x007c;
203203               }
204204
205               state->reikaids_videoram_w(*space, addr, dat);
205               state->reikaids_videoram_w(space, addr, dat);
206206            }
207207         }
208208
r17963r17964
217217   state->m_maincpu->set_input_line(M6809_FIRQ_LINE, HOLD_LINE);
218218}
219219
220static void pteacher_handleblit( address_space *space, int rom_base )
220static void pteacher_handleblit( address_space &space, int rom_base )
221221{
222   homedata_state *state = space->machine().driver_data<homedata_state>();
222   homedata_state *state = space.machine().driver_data<homedata_state>();
223223   int i;
224224   int dest_param;
225225   int source_addr;
r17963r17964
289289            if ((addr & 0x2080) == 0)
290290            {
291291               addr = ((addr & 0xc000) >> 2) | ((addr & 0x1f00) >> 1) | (addr & 0x7f);
292               state->mrokumei_videoram_w(*space, addr, data);
292               state->mrokumei_videoram_w(space, addr, data);
293293            }
294294         }
295295
r17963r17964
777777WRITE8_MEMBER(homedata_state::mrokumei_blitter_start_w)
778778{
779779   if (data & 0x80)
780      mrokumei_handleblit(&space, ((m_blitter_bank & 0x04) >> 2) * 0x10000);
780      mrokumei_handleblit(space, ((m_blitter_bank & 0x04) >> 2) * 0x10000);
781781
782782   /* bit 0 = bank switch; used by hourouki to access the
783783       optional service mode ROM (not available in current dump) */
r17963r17964
785785
786786WRITE8_MEMBER(homedata_state::reikaids_blitter_start_w)
787787{
788   reikaids_handleblit(&space, (m_blitter_bank & 3) * 0x10000);
788   reikaids_handleblit(space, (m_blitter_bank & 3) * 0x10000);
789789}
790790
791791WRITE8_MEMBER(homedata_state::pteacher_blitter_start_w)
792792{
793   pteacher_handleblit(&space, (m_blitter_bank >> 5) * 0x10000 & (machine().root_device().memregion("user1")->bytes() - 1));
793   pteacher_handleblit(space, (m_blitter_bank >> 5) * 0x10000 & (machine().root_device().memregion("user1")->bytes() - 1));
794794}
795795
796796
trunk/src/mame/video/hng64.c
r17963r17964
14471447   // but it could be useful
14481448   if ( screen.machine().input().code_pressed_once(KEYCODE_L) )
14491449   {
1450      address_space *space = screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
1451      space->write_byte(0x2f27c8, 0x2);
1450      address_space &space = *screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
1451      space.write_byte(0x2f27c8, 0x2);
14521452   }
14531453#endif
14541454
trunk/src/mame/video/hyhoo.c
r17963r17964
1919   switch (offset)
2020   {
2121      case 0x00:   m_blitter_src_addr = (m_blitter_src_addr & 0xff00) | data;
22               nb1413m3_gfxradr_l_w(&space, 0, data); break;
22               nb1413m3_gfxradr_l_w(space, 0, data); break;
2323      case 0x01:   m_blitter_src_addr = (m_blitter_src_addr & 0x00ff) | (data << 8);
24               nb1413m3_gfxradr_h_w(&space, 0, data); break;
24               nb1413m3_gfxradr_h_w(space, 0, data); break;
2525      case 0x02:   m_blitter_destx = data; break;
2626      case 0x03:   m_blitter_desty = data; break;
2727      case 0x04:   m_blitter_sizex = data; break;
r17963r17964
4444   int gfxlen = memregion("gfx1")->bytes();
4545   m_gfxrom = (((data & 0xc0) >> 4) + (data & 0x03));
4646   m_highcolorflag = data;
47   nb1413m3_gfxrombank_w(&space, 0, data);
47   nb1413m3_gfxrombank_w(space, 0, data);
4848
4949   if ((0x20000 * m_gfxrom) > (gfxlen - 1))
5050   {
trunk/src/mame/video/atarigx2.c
r17963r17964
9999
100100WRITE16_HANDLER( atarigx2_mo_control_w )
101101{
102   atarigx2_state *state = space->machine().driver_data<atarigx2_state>();
102   atarigx2_state *state = space.machine().driver_data<atarigx2_state>();
103103
104   logerror("MOCONT = %d (scan = %d)\n", data, space->machine().primary_screen->vpos());
104   logerror("MOCONT = %d (scan = %d)\n", data, space.machine().primary_screen->vpos());
105105
106106   /* set the control value */
107107   COMBINE_DATA(&state->m_current_control);
trunk/src/mame/video/fuukifg2.c
r17963r17964
5757TILE_GET_INFO_MEMBER(fuuki16_state::get_tile_info_2){ get_tile_info(machine(), tileinfo, tile_index, 2); }
5858TILE_GET_INFO_MEMBER(fuuki16_state::get_tile_info_3){ get_tile_info(machine(), tileinfo, tile_index, 3); }
5959
60INLINE void fuuki16_vram_w(address_space *space, offs_t offset, UINT16 data, UINT16 mem_mask, int _N_)
60INLINE void fuuki16_vram_w(address_space &space, offs_t offset, UINT16 data, UINT16 mem_mask, int _N_)
6161{
62   fuuki16_state *state = space->machine().driver_data<fuuki16_state>();
62   fuuki16_state *state = space.machine().driver_data<fuuki16_state>();
6363   COMBINE_DATA(&state->m_vram[_N_][offset]);
6464   state->m_tilemap[_N_]->mark_tile_dirty(offset / 2);
6565}
6666
67WRITE16_MEMBER(fuuki16_state::fuuki16_vram_0_w){ fuuki16_vram_w(&space, offset, data, mem_mask, 0); }
68WRITE16_MEMBER(fuuki16_state::fuuki16_vram_1_w){ fuuki16_vram_w(&space, offset, data, mem_mask, 1); }
69WRITE16_MEMBER(fuuki16_state::fuuki16_vram_2_w){ fuuki16_vram_w(&space, offset, data, mem_mask, 2); }
70WRITE16_MEMBER(fuuki16_state::fuuki16_vram_3_w){ fuuki16_vram_w(&space, offset, data, mem_mask, 3); }
67WRITE16_MEMBER(fuuki16_state::fuuki16_vram_0_w){ fuuki16_vram_w(space, offset, data, mem_mask, 0); }
68WRITE16_MEMBER(fuuki16_state::fuuki16_vram_1_w){ fuuki16_vram_w(space, offset, data, mem_mask, 1); }
69WRITE16_MEMBER(fuuki16_state::fuuki16_vram_2_w){ fuuki16_vram_w(space, offset, data, mem_mask, 2); }
70WRITE16_MEMBER(fuuki16_state::fuuki16_vram_3_w){ fuuki16_vram_w(space, offset, data, mem_mask, 3); }
7171
7272
7373/***************************************************************************
trunk/src/mame/video/baraduke.c
r17963r17964
158158}
159159
160160
161static void scroll_w(address_space *space, int layer, int offset, int data)
161static void scroll_w(address_space &space, int layer, int offset, int data)
162162{
163   baraduke_state *state = space->machine().driver_data<baraduke_state>();
163   baraduke_state *state = space.machine().driver_data<baraduke_state>();
164164   switch (offset)
165165   {
166166      case 0:   /* high scroll x */
r17963r17964
177177
178178WRITE8_MEMBER(baraduke_state::baraduke_scroll0_w)
179179{
180   scroll_w(&space, 0, offset, data);
180   scroll_w(space, 0, offset, data);
181181}
182182WRITE8_MEMBER(baraduke_state::baraduke_scroll1_w)
183183{
184   scroll_w(&space, 1, offset, data);
184   scroll_w(space, 1, offset, data);
185185}
186186
187187
trunk/src/mame/video/megasys1.c
r17963r17964
290290#define TILES_PER_PAGE_Y (0x20)
291291#define TILES_PER_PAGE (TILES_PER_PAGE_X * TILES_PER_PAGE_Y)
292292
293INLINE void scrollram_w(address_space *space, offs_t offset, UINT16 data, UINT16 mem_mask, int which)
293INLINE void scrollram_w(address_space &space, offs_t offset, UINT16 data, UINT16 mem_mask, int which)
294294{
295   megasys1_state *state = space->machine().driver_data<megasys1_state>();
295   megasys1_state *state = space.machine().driver_data<megasys1_state>();
296296   COMBINE_DATA(&state->m_scrollram[which][offset]);
297297   if (offset < 0x40000/2 && state->m_tmap[which])
298298   {
r17963r17964
310310   }
311311}
312312
313WRITE16_MEMBER(megasys1_state::megasys1_scrollram_0_w){ scrollram_w(&space, offset, data, mem_mask, 0); }
314WRITE16_MEMBER(megasys1_state::megasys1_scrollram_1_w){ scrollram_w(&space, offset, data, mem_mask, 1); }
315WRITE16_MEMBER(megasys1_state::megasys1_scrollram_2_w){ scrollram_w(&space, offset, data, mem_mask, 2); }
313WRITE16_MEMBER(megasys1_state::megasys1_scrollram_0_w){ scrollram_w(space, offset, data, mem_mask, 0); }
314WRITE16_MEMBER(megasys1_state::megasys1_scrollram_1_w){ scrollram_w(space, offset, data, mem_mask, 1); }
315WRITE16_MEMBER(megasys1_state::megasys1_scrollram_2_w){ scrollram_w(space, offset, data, mem_mask, 2); }
316316
317317
318318
trunk/src/mame/video/cave.c
r17963r17964
295295}
296296
297297
298INLINE void vram_w( address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask, int GFX )
298INLINE void vram_w( address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask, int GFX )
299299{
300   cave_state *state = space->machine().driver_data<cave_state>();
300   cave_state *state = space.machine().driver_data<cave_state>();
301301   UINT16 *VRAM = state->m_vram[GFX];
302302   tilemap_t *TILEMAP = state->m_tilemap[GFX];
303303
r17963r17964
323323    and 408000-407fff both go to the 8x8 tilemap ram. Use this function
324324    in this cases. Note that the get_tile_info function looks in the
325325    4000-7fff range for tiles, so we have to write the data there. */
326INLINE void vram_8x8_w( address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask, int GFX )
326INLINE void vram_8x8_w( address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask, int GFX )
327327{
328   cave_state *state = space->machine().driver_data<cave_state>();
328   cave_state *state = space.machine().driver_data<cave_state>();
329329   UINT16 *VRAM = state->m_vram[GFX];
330330   tilemap_t *TILEMAP = state->m_tilemap[GFX];
331331
r17963r17964
344344TILE_GET_INFO_MEMBER(cave_state::get_tile_info_2){ get_tile_info(machine(), tileinfo, tile_index, 2); }
345345TILE_GET_INFO_MEMBER(cave_state::get_tile_info_3){ get_tile_info(machine(), tileinfo, tile_index, 3); }
346346
347WRITE16_MEMBER(cave_state::cave_vram_0_w){ vram_w(&space, offset, data, mem_mask, 0); }
348WRITE16_MEMBER(cave_state::cave_vram_1_w){ vram_w(&space, offset, data, mem_mask, 1); }
349WRITE16_MEMBER(cave_state::cave_vram_2_w){ vram_w(&space, offset, data, mem_mask, 2); }
350WRITE16_MEMBER(cave_state::cave_vram_3_w){ vram_w(&space, offset, data, mem_mask, 3); }
347WRITE16_MEMBER(cave_state::cave_vram_0_w){ vram_w(space, offset, data, mem_mask, 0); }
348WRITE16_MEMBER(cave_state::cave_vram_1_w){ vram_w(space, offset, data, mem_mask, 1); }
349WRITE16_MEMBER(cave_state::cave_vram_2_w){ vram_w(space, offset, data, mem_mask, 2); }
350WRITE16_MEMBER(cave_state::cave_vram_3_w){ vram_w(space, offset, data, mem_mask, 3); }
351351
352WRITE16_MEMBER(cave_state::cave_vram_0_8x8_w){ vram_8x8_w(&space, offset, data, mem_mask, 0); }
353WRITE16_MEMBER(cave_state::cave_vram_1_8x8_w){ vram_8x8_w(&space, offset, data, mem_mask, 1); }
354WRITE16_MEMBER(cave_state::cave_vram_2_8x8_w){ vram_8x8_w(&space, offset, data, mem_mask, 2); }
355WRITE16_MEMBER(cave_state::cave_vram_3_8x8_w){ vram_8x8_w(&space, offset, data, mem_mask, 3); }
352WRITE16_MEMBER(cave_state::cave_vram_0_8x8_w){ vram_8x8_w(space, offset, data, mem_mask, 0); }
353WRITE16_MEMBER(cave_state::cave_vram_1_8x8_w){ vram_8x8_w(space, offset, data, mem_mask, 1); }
354WRITE16_MEMBER(cave_state::cave_vram_2_8x8_w){ vram_8x8_w(space, offset, data, mem_mask, 2); }
355WRITE16_MEMBER(cave_state::cave_vram_3_8x8_w){ vram_8x8_w(space, offset, data, mem_mask, 3); }
356356
357357
358358/***************************************************************************
trunk/src/mame/video/williams.c
r17963r17964
106106static void blitter_init(running_machine &machine, int blitter_config, const UINT8 *remap_prom);
107107static void create_palette_lookup(running_machine &machine);
108108
109static int blitter_core(address_space *space, int sstart, int dstart, int w, int h, int data);
109static int blitter_core(address_space &space, int sstart, int dstart, int w, int h, int data);
110110
111111
112112
r17963r17964
531531   if (h == 255) h = 256;
532532
533533   /* do the actual blit */
534   accesses = blitter_core(&space, sstart, dstart, w, h, data);
534   accesses = blitter_core(space, sstart, dstart, w, h, data);
535535
536536   /* based on the number of memory accesses needed to do the blit, compute how long the blit will take */
537537   /* this is just a guess */
r17963r17964
562562 *
563563 *************************************/
564564
565INLINE void blit_pixel(address_space *space, int offset, int srcdata, int data, int mask, int solid)
565INLINE void blit_pixel(address_space &space, int offset, int srcdata, int data, int mask, int solid)
566566{
567   williams_state *state = space->machine().driver_data<williams_state>();
567   williams_state *state = space.machine().driver_data<williams_state>();
568568   /* always read from video RAM regardless of the bank setting */
569   int pix = (offset < 0xc000) ? state->m_videoram[offset] : space->read_byte(offset);
569   int pix = (offset < 0xc000) ? state->m_videoram[offset] : space.read_byte(offset);
570570
571571   /* handle transparency */
572572   if (data & 0x08)
r17963r17964
586586   /* note that we have to allow blits to non-video RAM (e.g. tileram) because those */
587587   /* are not blocked by the window enable */
588588   if (!state->m_blitter_window_enable || offset < state->m_blitter_clip_address || offset >= 0xc000)
589      space->write_byte(offset, pix);
589      space.write_byte(offset, pix);
590590}
591591
592592
593static int blitter_core(address_space *space, int sstart, int dstart, int w, int h, int data)
593static int blitter_core(address_space &space, int sstart, int dstart, int w, int h, int data)
594594{
595   williams_state *state = space->machine().driver_data<williams_state>();
595   williams_state *state = space.machine().driver_data<williams_state>();
596596   int source, sxadv, syadv;
597597   int dest, dxadv, dyadv;
598598   int i, j, solid;
r17963r17964
627627         /* loop over the width */
628628         for (j = w; j > 0; j--)
629629         {
630            blit_pixel(space, dest, state->m_blitter_remap[space->read_byte(source)], data, keepmask, solid);
630            blit_pixel(space, dest, state->m_blitter_remap[space.read_byte(source)], data, keepmask, solid);
631631            accesses += 2;
632632
633633            /* advance */
r17963r17964
661661         dest = dstart & 0xffff;
662662
663663         /* left edge case */
664         pixdata = state->m_blitter_remap[space->read_byte(source)];
664         pixdata = state->m_blitter_remap[space.read_byte(source)];
665665         blit_pixel(space, dest, (pixdata >> 4) & 0x0f, data, keepmask | 0xf0, solid);
666666         accesses += 2;
667667
r17963r17964
671671         /* loop over the width */
672672         for (j = w - 1; j > 0; j--)
673673         {
674            pixdata = (pixdata << 8) | state->m_blitter_remap[space->read_byte(source)];
674            pixdata = (pixdata << 8) | state->m_blitter_remap[space.read_byte(source)];
675675            blit_pixel(space, dest, (pixdata >> 4) & 0xff, data, keepmask, solid);
676676            accesses += 2;
677677
trunk/src/mame/video/fuukifg3.c
r17963r17964
7070TILE_GET_INFO_MEMBER(fuuki32_state::get_tile_info_2){ get_tile_info4bpp(machine(), tileinfo, tile_index, 2); }
7171TILE_GET_INFO_MEMBER(fuuki32_state::get_tile_info_3){ get_tile_info4bpp(machine(), tileinfo, tile_index, 3); }
7272
73INLINE void fuuki32_vram_w(address_space *space, offs_t offset, UINT32 data, UINT32 mem_mask, int _N_)
73INLINE void fuuki32_vram_w(address_space &space, offs_t offset, UINT32 data, UINT32 mem_mask, int _N_)
7474{
75   fuuki32_state *state = space->machine().driver_data<fuuki32_state>();
75   fuuki32_state *state = space.machine().driver_data<fuuki32_state>();
7676   COMBINE_DATA(&state->m_vram[_N_][offset]);
7777   state->m_tilemap[_N_]->mark_tile_dirty(offset);
7878}
7979
80WRITE32_MEMBER(fuuki32_state::fuuki32_vram_0_w){ fuuki32_vram_w(&space, offset, data, mem_mask, 0); }
81WRITE32_MEMBER(fuuki32_state::fuuki32_vram_1_w){ fuuki32_vram_w(&space, offset, data, mem_mask, 1); }
82WRITE32_MEMBER(fuuki32_state::fuuki32_vram_2_w){ fuuki32_vram_w(&space, offset, data, mem_mask, 2); }
83WRITE32_MEMBER(fuuki32_state::fuuki32_vram_3_w){ fuuki32_vram_w(&space, offset, data, mem_mask, 3); }
80WRITE32_MEMBER(fuuki32_state::fuuki32_vram_0_w){ fuuki32_vram_w(space, offset, data, mem_mask, 0); }
81WRITE32_MEMBER(fuuki32_state::fuuki32_vram_1_w){ fuuki32_vram_w(space, offset, data, mem_mask, 1); }
82WRITE32_MEMBER(fuuki32_state::fuuki32_vram_2_w){ fuuki32_vram_w(space, offset, data, mem_mask, 2); }
83WRITE32_MEMBER(fuuki32_state::fuuki32_vram_3_w){ fuuki32_vram_w(space, offset, data, mem_mask, 3); }
8484
8585
8686/***************************************************************************
trunk/src/mame/drivers/bfcobra.c
r17963r17964
457457    The Flare One blitter is a simpler design with slightly different parameters
458458    and will require hardware tests to figure everything out correctly.
459459*/
460static void RunBlit(address_space *space)
460static void RunBlit(address_space &space)
461461{
462#define BLITPRG_READ(x)      blitter.x = *(blitter_get_addr(space->machine(), blitter.program.addr++))
462#define BLITPRG_READ(x)      blitter.x = *(blitter_get_addr(space.machine(), blitter.program.addr++))
463463
464   bfcobra_state *state = space->machine().driver_data<bfcobra_state>();
464   bfcobra_state *state = space.machine().driver_data<bfcobra_state>();
465465   struct blitter_t &blitter = state->m_blitter;
466466   int cycles_used = 0;
467467
r17963r17964
571571                  blitter.source.addr0 -=blitter.step;
572572               }
573573
574               *blitter_get_addr(space->machine(), blitter.dest.addr) = blitter.pattern;
574               *blitter_get_addr(space.machine(), blitter.dest.addr) = blitter.pattern;
575575               cycles_used++;
576576
577577            } while (--innercnt);
r17963r17964
585585
586586            if (LOOPTYPE == 3 && innercnt == blitter.innercnt)
587587            {
588               srcdata = *(blitter_get_addr(space->machine(), blitter.source.addr & 0xfffff));
588               srcdata = *(blitter_get_addr(space.machine(), blitter.source.addr & 0xfffff));
589589               blitter.source.loword++;
590590               cycles_used++;
591591            }
r17963r17964
595595            {
596596               if (LOOPTYPE == 0 || LOOPTYPE == 1)
597597               {
598                  srcdata = *(blitter_get_addr(space->machine(), blitter.source.addr & 0xfffff));
598                  srcdata = *(blitter_get_addr(space.machine(), blitter.source.addr & 0xfffff));
599599                  cycles_used++;
600600
601601                  if (blitter.modectl & MODE_SSIGN)
r17963r17964
610610            /* Read destination pixel? */
611611            if (LOOPTYPE == 0)
612612            {
613               dstdata = *blitter_get_addr(space->machine(), blitter.dest.addr & 0xfffff);
613               dstdata = *blitter_get_addr(space.machine(), blitter.dest.addr & 0xfffff);
614614               cycles_used++;
615615            }
616616
r17963r17964
679679                            The existing destination pixel is used as a lookup
680680                            into the table and the colours is replaced.
681681                        */
682                  UINT8 dest = *blitter_get_addr(space->machine(), blitter.dest.addr);
683                  UINT8 newcol = *(blitter_get_addr(space->machine(), (blitter.source.addr + dest) & 0xfffff));
682                  UINT8 dest = *blitter_get_addr(space.machine(), blitter.dest.addr);
683                  UINT8 newcol = *(blitter_get_addr(space.machine(), (blitter.source.addr + dest) & 0xfffff));
684684
685                  *blitter_get_addr(space->machine(), blitter.dest.addr) = newcol;
685                  *blitter_get_addr(space.machine(), blitter.dest.addr) = newcol;
686686                  cycles_used += 3;
687687               }
688688               else
r17963r17964
701701                  if (blitter.compfunc & CMPFUNC_LOG0)
702702                     final_result |= ~result & ~dstdata;
703703
704                  *blitter_get_addr(space->machine(), blitter.dest.addr) = final_result;
704                  *blitter_get_addr(space.machine(), blitter.dest.addr) = final_result;
705705                  cycles_used++;
706706               }
707707            }
r17963r17964
741741   } while (blitter.command  & CMD_RUN);
742742
743743   /* Burn Z80 cycles while blitter is in operation */
744   space->device().execute().spin_until_time(attotime::from_nsec( (1000000000 / Z80_XTAL)*cycles_used * 2 ) );
744   space.device().execute().spin_until_time(attotime::from_nsec( (1000000000 / Z80_XTAL)*cycles_used * 2 ) );
745745}
746746
747747
r17963r17964
10081008         m_blitter.command = data;
10091009
10101010         if (data & CMD_RUN)
1011            RunBlit(&space);
1011            RunBlit(space);
10121012         else
10131013            mame_printf_debug("Blitter stopped by IO.\n");
10141014
trunk/src/mame/drivers/mitchell.c
r17963r17964
21042104
21052105static void bootleg_decode( running_machine &machine )
21062106{
2107   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
2108   space->set_decrypted_region(0x0000, 0x7fff, machine.root_device().memregion("maincpu")->base() + 0x50000);
2107   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
2108   space.set_decrypted_region(0x0000, 0x7fff, machine.root_device().memregion("maincpu")->base() + 0x50000);
21092109   machine.root_device().membank("bank1")->configure_decrypted_entries(0, 16, machine.root_device().memregion("maincpu")->base() + 0x60000, 0x4000);
21102110}
21112111
trunk/src/mame/drivers/segaxbd.c
r17963r17964
619619   logerror("%06X:rascot_excs_r(%04X)\n", m_maincpu->pc(), offset*2);
620620
621621   // probably receives commands from the server here
622   //return space->machine().rand() & 0xff;
622   //return space.machine().rand() & 0xff;
623623
624624   return 0xff;
625625}
trunk/src/mame/drivers/nbmj9195.c
r17963r17964
5252   soundlatch_clear_byte_w(space, 0, 0);
5353}
5454
55static void nbmj9195_outcoin_flag_w(address_space *space, int data)
55static void nbmj9195_outcoin_flag_w(address_space &space, int data)
5656{
57   nbmj9195_state *state = space->machine().driver_data<nbmj9195_state>();
57   nbmj9195_state *state = space.machine().driver_data<nbmj9195_state>();
5858   // bit0: coin in counter
5959   // bit1: coin out counter
6060   // bit2: hopper
r17963r17964
7575   return (((state->ioport("DSWA")->read() & 0xff) | ((state->ioport("DSWB")->read() & 0xff) << 8)) >> state->m_dipswbitsel) & 0x01;
7676}
7777
78static void nbmj9195_dipswbitsel_w(address_space *space, int data)
78static void nbmj9195_dipswbitsel_w(address_space &space, int data)
7979{
80   nbmj9195_state *state = space->machine().driver_data<nbmj9195_state>();
80   nbmj9195_state *state = space.machine().driver_data<nbmj9195_state>();
8181   switch (data & 0xc0)
8282   {
8383      case 0x00:
r17963r17964
9595   }
9696}
9797
98static void mscoutm_inputportsel_w(address_space *space, int data)
98static void mscoutm_inputportsel_w(address_space &space, int data)
9999{
100   nbmj9195_state *state = space->machine().driver_data<nbmj9195_state>();
100   nbmj9195_state *state = space.machine().driver_data<nbmj9195_state>();
101101   state->m_mscoutm_inputport = (data ^ 0xff);
102102}
103103
r17963r17964
316316      switch (offset)
317317      {
318318         case 0:         /* PA_0 */
319            mscoutm_inputportsel_w(&space, data);   // NB22090
319            mscoutm_inputportsel_w(space, data);   // NB22090
320320            break;
321321         case 1:         /* PB_0 */
322322            break;
323323         case 2:         /* PC_0 */
324324            break;
325325         case 3:         /* PD_0 */
326            nbmj9195_clutsel_w(&space, data);
326            nbmj9195_clutsel_w(space, data);
327327            break;
328328         case 4:         /* PE_0 */
329            nbmj9195_gfxflag2_w(&space, data);      // NB22090
329            nbmj9195_gfxflag2_w(space, data);      // NB22090
330330            break;
331331
332332         case 5:         /* PA_1 */
r17963r17964
358358         case 1:         /* PB_0 */
359359            break;
360360         case 2:         /* PC_0 */
361            nbmj9195_dipswbitsel_w(&space, data);
361            nbmj9195_dipswbitsel_w(space, data);
362362            break;
363363         case 3:         /* PD_0 */
364            nbmj9195_clutsel_w(&space, data);
364            nbmj9195_clutsel_w(space, data);
365365            break;
366366         case 4:         /* PE_0 */
367            nbmj9195_outcoin_flag_w(&space, data);
367            nbmj9195_outcoin_flag_w(space, data);
368368            break;
369369
370370         case 5:         /* PA_1 */
r17963r17964
636636
637637void nbmj9195_state::machine_reset()
638638{
639   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
639   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
640640   int i;
641641
642642   // initialize TMPZ84C011 PIO
643643   for (i = 0; i < (5 * 2); i++)
644644   {
645645      m_pio_dir[i] = m_pio_latch[i] = 0;
646      tmpz84c011_pio_w(*space, i, 0);
646      tmpz84c011_pio_w(space, i, 0);
647647   }
648648}
649649
650650DRIVER_INIT_MEMBER(nbmj9195_state,nbmj9195)
651651{
652   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
652   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
653653   UINT8 *ROM = memregion("audiocpu")->base();
654654
655655   // sound program patch
656656   ROM[0x0213] = 0x00;         // DI -> NOP
657657
658658   // initialize sound rom bank
659   nbmj9195_soundbank_w(*space, 0, 0);
659   nbmj9195_soundbank_w(space, 0, 0);
660660   logerror("DRIVER_INIT( nbmj9195 )\n");
661661}
662662
trunk/src/mame/drivers/csplayh5.c
r17963r17964
585585
586586void csplayh5_state::machine_reset()
587587{
588   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
588   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
589589   int i;
590590
591591   // initialize TMPZ84C011 PIO
592592   for (i = 0; i < 5; i++)
593593   {
594594      m_pio_dir[i] = m_pio_latch[i] = 0;
595      tmpz84c011_pio_w(*space, i, 0);
595      tmpz84c011_pio_w(space, i, 0);
596596   }
597597}
598598
trunk/src/mame/drivers/pipedrm.c
r17963r17964
175175
176176static WRITE8_HANDLER( pipedrm_bankswitch_w )
177177{
178   fromance_state *state = space->machine().driver_data<fromance_state>();
178   fromance_state *state = space.machine().driver_data<fromance_state>();
179179   /*
180180        Bit layout:
181181
r17963r17964
191191   state->membank("bank1")->set_entry(data & 0x7);
192192
193193   /* map to the fromance gfx register */
194   state->fromance_gfxreg_w(*space, offset, ((data >> 6) & 0x01) |    /* flipscreen */
194   state->fromance_gfxreg_w(space, offset, ((data >> 6) & 0x01) |    /* flipscreen */
195195                       ((~data >> 2) & 0x02));   /* videoram select */
196196}
197197
198198
199199static WRITE8_HANDLER( sound_bankswitch_w )
200200{
201   space->machine().root_device().membank("bank2")->set_entry(data & 0x01);
201   space.machine().root_device().membank("bank2")->set_entry(data & 0x01);
202202}
203203
204204
r17963r17964
225225
226226static WRITE8_HANDLER( sound_command_w )
227227{
228   space->machine().scheduler().synchronize(FUNC(delayed_command_w), data | 0x100);
228   space.machine().scheduler().synchronize(FUNC(delayed_command_w), data | 0x100);
229229}
230230
231231
232232static WRITE8_HANDLER( sound_command_nonmi_w )
233233{
234   space->machine().scheduler().synchronize(FUNC(delayed_command_w), data);
234   space.machine().scheduler().synchronize(FUNC(delayed_command_w), data);
235235}
236236
237237
238238static WRITE8_HANDLER( pending_command_clear_w )
239239{
240   fromance_state *state = space->machine().driver_data<fromance_state>();
240   fromance_state *state = space.machine().driver_data<fromance_state>();
241241   state->m_pending_command = 0;
242242   state->m_subcpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
243243}
r17963r17964
245245
246246static READ8_HANDLER( pending_command_r )
247247{
248   fromance_state *state = space->machine().driver_data<fromance_state>();
248   fromance_state *state = space.machine().driver_data<fromance_state>();
249249   return state->m_pending_command;
250250}
251251
252252
253253static READ8_HANDLER( sound_command_r )
254254{
255   fromance_state *state = space->machine().driver_data<fromance_state>();
255   fromance_state *state = space.machine().driver_data<fromance_state>();
256256   return state->m_sound_command;
257257}
258258
trunk/src/mame/drivers/discoboy.c
r17963r17964
206206{
207207   UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
208208   data &= 0x2f;
209   space->machine().root_device().membank("bank1")->set_base(&ROM[0x6000 + (data * 0x1000)] );
209   space.machine().root_device().membank("bank1")->set_base(&ROM[0x6000 + (data * 0x1000)] );
210210}
211211#endif
212212
trunk/src/mame/drivers/mediagx.c
r17963r17964
12591259
12601260#if SPEEDUP_HACKS
12611261
1262INLINE UINT32 generic_speedup(address_space *space, int idx)
1262INLINE UINT32 generic_speedup(address_space &space, int idx)
12631263{
1264   mediagx_state *state = space->machine().driver_data<mediagx_state>();
1264   mediagx_state *state = space.machine().driver_data<mediagx_state>();
12651265
1266   if (space->device().safe_pc() == state->m_speedup_table[idx].pc)
1266   if (space.device().safe_pc() == state->m_speedup_table[idx].pc)
12671267   {
12681268      state->m_speedup_hits[idx]++;
1269      space->device().execute().spin_until_interrupt();
1269      space.device().execute().spin_until_interrupt();
12701270   }
12711271   return state->m_main_ram[state->m_speedup_table[idx].offset/4];
12721272}
trunk/src/mame/drivers/skimaxx.c
r17963r17964
165165 *************************************/
166166
167167// TODO: Might not be used
168static void skimaxx_to_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
168static void skimaxx_to_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg)
169169{
170   skimaxx_state *state = space->machine().driver_data<skimaxx_state>();
170   skimaxx_state *state = space.machine().driver_data<skimaxx_state>();
171171   memcpy(shiftreg, &state->m_fg_buffer[TOWORD(address)], 512 * sizeof(UINT16));
172172}
173173
174static void skimaxx_from_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
174static void skimaxx_from_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg)
175175{
176   skimaxx_state *state = space->machine().driver_data<skimaxx_state>();
176   skimaxx_state *state = space.machine().driver_data<skimaxx_state>();
177177   memcpy(&state->m_fg_buffer[TOWORD(address)], shiftreg, 512 * sizeof(UINT16));
178178}
179179
trunk/src/mame/drivers/megadrvb.c
r17963r17964
273273      - aladmdb_w : 1b2d18 - data = aa00 (only once on reset)
274274      - aladmdb_w : 1b2d42 - data = 0000 (only once on reset)
275275    */
276   logerror("aladmdb_w : %06x - data = %04x\n",space->device().safe_pc(),data);
276   logerror("aladmdb_w : %06x - data = %04x\n",space.device().safe_pc(),data);
277277}
278278
279279static READ16_HANDLER( aladmdb_r )
280280{
281   md_boot_state *state = space->machine().driver_data<md_boot_state>();
282   if (space->device().safe_pc()==0x1b2a56)
281   md_boot_state *state = space.machine().driver_data<md_boot_state>();
282   if (space.device().safe_pc()==0x1b2a56)
283283   {
284284      state->m_aladmdb_mcu_port = state->ioport("MCU")->read();
285285
r17963r17964
288288      else
289289         return (0x100); //MCU status, needed if you fall into a pitfall
290290   }
291   if (space->device().safe_pc()==0x1b2a72) return 0x0000;
292   if (space->device().safe_pc()==0x1b2d24) return (space->machine().root_device().ioport("MCU")->read() & 0x00f0) | 0x1200;    // difficulty
293   if (space->device().safe_pc()==0x1b2d4e) return 0x0000;
291   if (space.device().safe_pc()==0x1b2a72) return 0x0000;
292   if (space.device().safe_pc()==0x1b2d24) return (space.machine().root_device().ioport("MCU")->read() & 0x00f0) | 0x1200;    // difficulty
293   if (space.device().safe_pc()==0x1b2d4e) return 0x0000;
294294
295   logerror("aladbl_r : %06x\n",space->device().safe_pc());
295   logerror("aladbl_r : %06x\n",space.device().safe_pc());
296296
297297   return 0x0000;
298298}
r17963r17964
300300static READ16_HANDLER( mk3mdb_dsw_r )
301301{
302302   static const char *const dswname[3] = { "DSWA", "DSWB", "DSWC" };
303   return space->machine().root_device().ioport(dswname[offset])->read();
303   return space.machine().root_device().ioport(dswname[offset])->read();
304304}
305305
306306static READ16_HANDLER( ssf2mdb_dsw_r )
307307{
308308   static const char *const dswname[3] = { "DSWA", "DSWB", "DSWC" };
309   return space->machine().root_device().ioport(dswname[offset])->read();
309   return space.machine().root_device().ioport(dswname[offset])->read();
310310}
311311
312312static READ16_HANDLER( srmdb_dsw_r )
313313{
314314   static const char *const dswname[3] = { "DSWA", "DSWB", "DSWC" };
315   return space->machine().root_device().ioport(dswname[offset])->read();
315   return space.machine().root_device().ioport(dswname[offset])->read();
316316}
317317
318318static READ16_HANDLER( topshoot_200051_r )
trunk/src/mame/drivers/balsente.c
r17963r17964
21632163DRIVER_INIT_MEMBER(balsente_state,toggle)    { expand_roms(machine(), EXPAND_ALL);  config_shooter_adc(machine(), FALSE, 0 /* noanalog */); }
21642164DRIVER_INIT_MEMBER(balsente_state,nametune)
21652165{
2166   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
2167   space->install_write_handler(0x9f00, 0x9f00, write8_delegate(FUNC(balsente_state::balsente_rombank2_select_w),this));
2166   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
2167   space.install_write_handler(0x9f00, 0x9f00, write8_delegate(FUNC(balsente_state::balsente_rombank2_select_w),this));
21682168   expand_roms(machine(), EXPAND_NONE | SWAP_HALVES); config_shooter_adc(machine(), FALSE, 0 /* noanalog */);
21692169}
21702170DRIVER_INIT_MEMBER(balsente_state,nstocker)
21712171{
2172   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
2173   space->install_write_handler(0x9f00, 0x9f00, write8_delegate(FUNC(balsente_state::balsente_rombank2_select_w),this));
2172   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
2173   space.install_write_handler(0x9f00, 0x9f00, write8_delegate(FUNC(balsente_state::balsente_rombank2_select_w),this));
21742174   expand_roms(machine(), EXPAND_NONE | SWAP_HALVES); config_shooter_adc(machine(), TRUE, 1);
21752175}
21762176DRIVER_INIT_MEMBER(balsente_state,sfootbal)
21772177{
2178   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
2179   space->install_write_handler(0x9f00, 0x9f00, write8_delegate(FUNC(balsente_state::balsente_rombank2_select_w),this));
2178   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
2179   space.install_write_handler(0x9f00, 0x9f00, write8_delegate(FUNC(balsente_state::balsente_rombank2_select_w),this));
21802180   expand_roms(machine(), EXPAND_ALL  | SWAP_HALVES); config_shooter_adc(machine(), FALSE, 0);
21812181}
21822182DRIVER_INIT_MEMBER(balsente_state,spiker)
21832183{
2184   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
2185   space->install_readwrite_handler(0x9f80, 0x9f8f, read8_delegate(FUNC(balsente_state::spiker_expand_r),this), write8_delegate(FUNC(balsente_state::spiker_expand_w),this));
2186   space->install_write_handler(0x9f00, 0x9f00, write8_delegate(FUNC(balsente_state::balsente_rombank2_select_w),this));
2184   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
2185   space.install_readwrite_handler(0x9f80, 0x9f8f, read8_delegate(FUNC(balsente_state::spiker_expand_r),this), write8_delegate(FUNC(balsente_state::spiker_expand_w),this));
2186   space.install_write_handler(0x9f00, 0x9f00, write8_delegate(FUNC(balsente_state::balsente_rombank2_select_w),this));
21872187   expand_roms(machine(), EXPAND_ALL  | SWAP_HALVES); config_shooter_adc(machine(), FALSE, 1);
21882188}
21892189DRIVER_INIT_MEMBER(balsente_state,stompin)
21902190{
2191   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
2192   space->install_write_handler(0x9f00, 0x9f00, write8_delegate(FUNC(balsente_state::balsente_rombank2_select_w),this));
2191   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
2192   space.install_write_handler(0x9f00, 0x9f00, write8_delegate(FUNC(balsente_state::balsente_rombank2_select_w),this));
21932193   expand_roms(machine(), 0x0c | SWAP_HALVES); config_shooter_adc(machine(), FALSE, 32);
21942194}
21952195DRIVER_INIT_MEMBER(balsente_state,rescraid)  { expand_roms(machine(), EXPAND_NONE); config_shooter_adc(machine(), FALSE, 0 /* noanalog */); }
21962196DRIVER_INIT_MEMBER(balsente_state,grudge)
21972197{
2198   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
2199   space->install_read_handler(0x9400, 0x9400, read8_delegate(FUNC(balsente_state::grudge_steering_r),this));
2198   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
2199   space.install_read_handler(0x9400, 0x9400, read8_delegate(FUNC(balsente_state::grudge_steering_r),this));
22002200   expand_roms(machine(), EXPAND_NONE); config_shooter_adc(machine(), FALSE, 0);
22012201}
22022202DRIVER_INIT_MEMBER(balsente_state,shrike)
22032203{
2204   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
2205   space->install_readwrite_handler(0x9e00, 0x9fff, read8_delegate(FUNC(balsente_state::shrike_shared_6809_r),this), write8_delegate(FUNC(balsente_state::shrike_shared_6809_w),this));
2206   space->install_write_handler(0x9e01, 0x9e01, write8_delegate(FUNC(balsente_state::shrike_sprite_select_w),this));
2204   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
2205   space.install_readwrite_handler(0x9e00, 0x9fff, read8_delegate(FUNC(balsente_state::shrike_shared_6809_r),this), write8_delegate(FUNC(balsente_state::shrike_shared_6809_w),this));
2206   space.install_write_handler(0x9e01, 0x9e01, write8_delegate(FUNC(balsente_state::shrike_sprite_select_w),this));
22072207   machine().device("68k")->memory().space(AS_PROGRAM)->install_readwrite_handler(0x10000, 0x1001f, read16_delegate(FUNC(balsente_state::shrike_io_68k_r),this), write16_delegate(FUNC(balsente_state::shrike_io_68k_w),this));
22082208
22092209   expand_roms(machine(), EXPAND_ALL);  config_shooter_adc(machine(), FALSE, 32);
trunk/src/mame/drivers/zaxxon.c
r17963r17964
15231523   };
15241524
15251525   int A;
1526   address_space *space = machine.device(cputag)->memory().space(AS_PROGRAM);
1526   address_space &space = *machine.device(cputag)->memory().space(AS_PROGRAM);
15271527   UINT8 *rom = machine.root_device().memregion(cputag)->base();
15281528   int size = machine.root_device().memregion(cputag)->bytes();
15291529   UINT8 *decrypt = auto_alloc_array(machine, UINT8, size);
15301530
1531   space->set_decrypted_region(0x0000, size - 1, decrypt);
1531   space.set_decrypted_region(0x0000, size - 1, decrypt);
15321532
15331533   for (A = 0x0000; A < size; A++)
15341534   {
trunk/src/mame/drivers/xtheball.c
r17963r17964
8989 *
9090 *************************************/
9191
92static void xtheball_to_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
92static void xtheball_to_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg)
9393{
94   xtheball_state *state = space->machine().driver_data<xtheball_state>();
94   xtheball_state *state = space.machine().driver_data<xtheball_state>();
9595   if (address >= 0x01000000 && address <= 0x010fffff)
9696      memcpy(shiftreg, &state->m_vram_bg[TOWORD(address & 0xff000)], TOBYTE(0x1000));
9797   else if (address >= 0x02000000 && address <= 0x020fffff)
9898      memcpy(shiftreg, &state->m_vram_fg[TOWORD(address & 0xff000)], TOBYTE(0x1000));
9999   else
100      logerror("%s:xtheball_to_shiftreg(%08X)\n", space->machine().describe_context(), address);
100      logerror("%s:xtheball_to_shiftreg(%08X)\n", space.machine().describe_context(), address);
101101}
102102
103103
104static void xtheball_from_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
104static void xtheball_from_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg)
105105{
106   xtheball_state *state = space->machine().driver_data<xtheball_state>();
106   xtheball_state *state = space.machine().driver_data<xtheball_state>();
107107   if (address >= 0x01000000 && address <= 0x010fffff)
108108      memcpy(&state->m_vram_bg[TOWORD(address & 0xff000)], shiftreg, TOBYTE(0x1000));
109109   else if (address >= 0x02000000 && address <= 0x020fffff)
110110      memcpy(&state->m_vram_fg[TOWORD(address & 0xff000)], shiftreg, TOBYTE(0x1000));
111111   else
112      logerror("%s:xtheball_from_shiftreg(%08X)\n", space->machine().describe_context(), address);
112      logerror("%s:xtheball_from_shiftreg(%08X)\n", space.machine().describe_context(), address);
113113}
114114
115115
trunk/src/mame/drivers/atvtrack.c
r17963r17964
339339
340340void atvtrack_state::machine_reset()
341341{
342   address_space *as;
343
344342   // Probably just after reset the cpu executes some bootsrtap routine from a memory inside the fpga.
345343   // The routine initializes the cpu, copies the boot program from the flash memories into the cpu sdram
346344   // and finally executes it.
347345   // Here there is the setup of the cpu, the boot program is copied in machine_start
348   as = machine().device("maincpu")->memory().space(AS_PROGRAM);
346   address_space &as = *machine().device("maincpu")->memory().space(AS_PROGRAM);
349347   // set cpu PC register to 0x0c7f0000
350348   machine().device("maincpu")->state().set_pc(0x0c7f0000);
351349   // set BCR2 to 1
trunk/src/mame/drivers/foodf.c
r17963r17964
164164   m_nvram->store(data & 0x02);
165165
166166   if (!(data & 0x04))
167      atarigen_scanline_int_ack_w(&space,0,0,0xffff);
167      atarigen_scanline_int_ack_w(space,0,0,0xffff);
168168   if (!(data & 0x08))
169      atarigen_video_int_ack_w(&space,0,0,0xffff);
169      atarigen_video_int_ack_w(space,0,0,0xffff);
170170
171171   output_set_led_value(0, (data >> 4) & 1);
172172   output_set_led_value(1, (data >> 5) & 1);
trunk/src/mame/drivers/ddenlovr.c
r17963r17964
688688#endif
689689}
690690
691static void blitter_w( address_space *space, int blitter, offs_t offset, UINT8 data, int irq_vector )
691static void blitter_w( address_space &space, int blitter, offs_t offset, UINT8 data, int irq_vector )
692692{
693   dynax_state *state = space->machine().driver_data<dynax_state>();
693   dynax_state *state = space.machine().driver_data<dynax_state>();
694694   int hi_bits;
695695
696696g_profiler.start(PROFILER_VIDEO);
r17963r17964
720720         break;
721721
722722      case 0x03:
723         ddenlovr_blit_flip_w(space->machine(), data);
723         ddenlovr_blit_flip_w(space.machine(), data);
724724         break;
725725
726726      case 0x04:
r17963r17964
789789
790790      case 0x24:
791791
792         log_blit(space->machine(), data);
792         log_blit(space.machine(), data);
793793
794794         switch (data)
795795         {
796            case 0x04:   blit_fill_xy(space->machine(), 0, 0);
796            case 0x04:   blit_fill_xy(space.machine(), 0, 0);
797797                     break;
798            case 0x14:   blit_fill_xy(space->machine(), state->m_ddenlovr_blit_x, state->m_ddenlovr_blit_y);
798            case 0x14:   blit_fill_xy(space.machine(), state->m_ddenlovr_blit_x, state->m_ddenlovr_blit_y);
799799                     break;
800800
801            case 0x10:   state->m_ddenlovr_blit_address = blit_draw(space->machine(), state->m_ddenlovr_blit_address, state->m_ddenlovr_blit_x);
801            case 0x10:   state->m_ddenlovr_blit_address = blit_draw(space.machine(), state->m_ddenlovr_blit_address, state->m_ddenlovr_blit_x);
802802                     break;
803803
804            case 0x13:   blit_horiz_line(space->machine());
804            case 0x13:   blit_horiz_line(space.machine());
805805                     break;
806            case 0x1b:   blit_vert_line(space->machine());
806            case 0x1b:   blit_vert_line(space.machine());
807807                     break;
808808
809            case 0x1c:   blit_rect_xywh(space->machine());
809            case 0x1c:   blit_rect_xywh(space.machine());
810810                     break;
811811
812812            // These two are issued one after the other (43 then 8c)
813813            // 8c is issued immediately after 43 has finished, without
814814            // changing any argument
815815            case 0x43:   break;
816            case 0x8c:   blit_rect_yh(space->machine());
816            case 0x8c:   blit_rect_yh(space.machine());
817817                     break;
818818
819819            default:
820820                     ;
821821            #ifdef MAME_DEBUG
822822               popmessage("unknown blitter command %02x", data);
823               logerror("%06x: unknown blitter command %02x\n", space->device().safe_pc(), data);
823               logerror("%06x: unknown blitter command %02x\n", space.device().safe_pc(), data);
824824            #endif
825825         }
826826
827827         if (irq_vector)
828828            /* quizchq */
829            space->device().execute().set_input_line_and_vector(0, HOLD_LINE, irq_vector);
829            space.device().execute().set_input_line_and_vector(0, HOLD_LINE, irq_vector);
830830         else
831831         {
832832            /* ddenlovr */
833833            if (state->m_ddenlovr_blitter_irq_enable)
834834            {
835835               state->m_ddenlovr_blitter_irq_flag = 1;
836               space->device().execute().set_input_line(1, HOLD_LINE);
836               space.device().execute().set_input_line(1, HOLD_LINE);
837837            }
838838         }
839839         break;
840840
841841      default:
842         logerror("%06x: Blitter %d reg %02x = %02x\n", space->device().safe_pc(), blitter, state->m_ddenlovr_blit_regs[blitter], data);
842         logerror("%06x: Blitter %d reg %02x = %02x\n", space.device().safe_pc(), blitter, state->m_ddenlovr_blit_regs[blitter], data);
843843         break;
844844      }
845845   }
r17963r17964
12051205
12061206WRITE8_MEMBER(dynax_state::rongrong_blitter_w)
12071207{
1208   blitter_w(&space, 0, offset, data, 0xf8);
1208   blitter_w(space, 0, offset, data, 0xf8);
12091209}
12101210
12111211WRITE16_MEMBER(dynax_state::ddenlovr_blitter_w)
12121212{
12131213   if (ACCESSING_BITS_0_7)
1214      blitter_w(&space, 0, offset, data & 0xff, 0);
1214      blitter_w(space, 0, offset, data & 0xff, 0);
12151215}
12161216
12171217
r17963r17964
20802080
20812081WRITE8_MEMBER(dynax_state::mmpanic_blitter_w)
20822082{
2083   blitter_w(&space, 0, offset, data, 0xdf);   // RST 18
2083   blitter_w(space, 0, offset, data, 0xdf);   // RST 18
20842084}
20852085WRITE8_MEMBER(dynax_state::mmpanic_blitter2_w)
20862086{
2087   blitter_w(&space, 1, offset, data, 0xdf);   // RST 18
2087   blitter_w(space, 1, offset, data, 0xdf);   // RST 18
20882088}
20892089
20902090static void mmpanic_update_leds(running_machine &machine)
r17963r17964
27502750
27512751WRITE8_MEMBER(dynax_state::mjmyster_blitter_w)
27522752{
2753   blitter_w(&space, 0, offset, data, 0xfc);
2753   blitter_w(space, 0, offset, data, 0xfc);
27542754}
27552755
27562756static ADDRESS_MAP_START( mjmyster_portmap, AS_IO, 8, dynax_state )
r17963r17964
29222922            break;
29232923      }
29242924   }
2925   blitter_w(&space, 0, offset, data, 0xfc);
2925   blitter_w(space, 0, offset, data, 0xfc);
29262926}
29272927
29282928static ADDRESS_MAP_START( hginga_portmap, AS_IO, 8, dynax_state )
r17963r17964
29562956                             Hanafuda Hana Gokou
29572957***************************************************************************/
29582958
2959static UINT8 hgokou_player_r( address_space *space, int player )
2959static UINT8 hgokou_player_r( address_space &space, int player )
29602960{
2961   dynax_state *state = space->machine().driver_data<dynax_state>();
2962   UINT8 hopper_bit = ((state->m_hopper && !(space->machine().primary_screen->frame_number() % 10)) ? 0 : (1 << 6));
2961   dynax_state *state = space.machine().driver_data<dynax_state>();
2962   UINT8 hopper_bit = ((state->m_hopper && !(space.machine().primary_screen->frame_number() % 10)) ? 0 : (1 << 6));
29632963
29642964   if (!BIT(state->m_input_sel, 0))   return state->ioport(player ? "KEY5" : "KEY0")->read() | hopper_bit;
29652965   if (!BIT(state->m_input_sel, 1))   return state->ioport(player ? "KEY6" : "KEY1")->read() | hopper_bit;
r17963r17964
29802980   switch (m_dsw_sel)
29812981   {
29822982      case 0x20:   return ioport("SYSTEM")->read();
2983      case 0x21:   return hgokou_player_r(&space, 1);
2984      case 0x22:   return hgokou_player_r(&space, 0);
2983      case 0x21:   return hgokou_player_r(space, 1);
2984      case 0x22:   return hgokou_player_r(space, 0);
29852985      case 0x23:   return m_coins;
29862986   }
29872987   logerror("%06x: warning, unknown bits read, dsw_sel = %02x\n", space.device().safe_pc(), m_dsw_sel);
r17963r17964
30773077            m_input_sel = 0xfe;
30783078         return 0;   // discarded
30793079      case 0xa1:
3080         ret = hgokou_player_r(&space, 1);
3080         ret = hgokou_player_r(space, 1);
30813081         m_input_sel <<= 1;      // auto-increment input_sel
30823082         m_input_sel |= 1;
30833083         return ret;
30843084      case 0xa2:
3085         ret = hgokou_player_r(&space, 0);
3085         ret = hgokou_player_r(space, 0);
30863086         m_input_sel <<= 1;      // auto-increment input_sel
30873087         m_input_sel |= 1;
30883088         return ret;
r17963r17964
33893389
33903390WRITE8_MEMBER(dynax_state::mjflove_blitter_w)
33913391{
3392   blitter_w(&space, 0, offset, data, 0);
3392   blitter_w(space, 0, offset, data, 0);
33933393}
33943394
33953395WRITE8_MEMBER(dynax_state::mjflove_coincounter_w)
trunk/src/mame/drivers/chinagat.c
r17963r17964
135135
136136static WRITE8_HANDLER( chinagat_interrupt_w )
137137{
138   ddragon_state *state = space->machine().driver_data<ddragon_state>();
138   ddragon_state *state = space.machine().driver_data<ddragon_state>();
139139
140140   switch (offset)
141141   {
142142      case 0: /* 3e00 - SND irq */
143         state->soundlatch_byte_w(*space, 0, data);
143         state->soundlatch_byte_w(space, 0, data);
144144         state->m_snd_cpu->execute().set_input_line(state->m_sound_irq, (state->m_sound_irq == INPUT_LINE_NMI) ? PULSE_LINE : HOLD_LINE );
145145         break;
146146
r17963r17964
170170    ---- -x--   Flip screen
171171    --x- ----   Enable video ???
172172    ****************************/
173   ddragon_state *state = space->machine().driver_data<ddragon_state>();
173   ddragon_state *state = space.machine().driver_data<ddragon_state>();
174174
175175   state->m_scrolly_hi = ((data & 0x02) >> 1);
176176   state->m_scrollx_hi = data & 0x01;
r17963r17964
180180
181181static WRITE8_HANDLER( chinagat_bankswitch_w )
182182{
183   space->machine().root_device().membank("bank1")->set_entry(data & 0x07);   // shall we check (data & 7) < 6 (# of banks)?
183   space.machine().root_device().membank("bank1")->set_entry(data & 0x07);   // shall we check (data & 7) < 6 (# of banks)?
184184}
185185
186186static WRITE8_HANDLER( chinagat_sub_bankswitch_w )
187187{
188   space->machine().root_device().membank("bank4")->set_entry(data & 0x07);   // shall we check (data & 7) < 6 (# of banks)?
188   space.machine().root_device().membank("bank4")->set_entry(data & 0x07);   // shall we check (data & 7) < 6 (# of banks)?
189189}
190190
191191static READ8_HANDLER( saiyugoub1_mcu_command_r )
192192{
193   ddragon_state *state = space->machine().driver_data<ddragon_state>();
193   ddragon_state *state = space.machine().driver_data<ddragon_state>();
194194#if 0
195195   if (state->m_mcu_command == 0x78)
196196   {
197      space->machine().device<cpu_device>("mcu")->suspend(SUSPEND_REASON_HALT, 1);   /* Suspend (speed up) */
197      space.machine().device<cpu_device>("mcu")->suspend(SUSPEND_REASON_HALT, 1);   /* Suspend (speed up) */
198198   }
199199#endif
200200   return state->m_mcu_command;
r17963r17964
202202
203203static WRITE8_HANDLER( saiyugoub1_mcu_command_w )
204204{
205   ddragon_state *state = space->machine().driver_data<ddragon_state>();
205   ddragon_state *state = space.machine().driver_data<ddragon_state>();
206206   state->m_mcu_command = data;
207207#if 0
208208   if (data != 0x78)
209209   {
210      space->machine().device<cpu_device>("mcu")->resume(SUSPEND_REASON_HALT);   /* Wake up */
210      space.machine().device<cpu_device>("mcu")->resume(SUSPEND_REASON_HALT);   /* Wake up */
211211   }
212212#endif
213213}
214214
215215static WRITE8_HANDLER( saiyugoub1_adpcm_rom_addr_w )
216216{
217   ddragon_state *state = space->machine().driver_data<ddragon_state>();
217   ddragon_state *state = space.machine().driver_data<ddragon_state>();
218218   /* i8748 Port 1 write */
219219   state->m_i8748_P1 = data;
220220}
r17963r17964
290290
291291static READ8_HANDLER( saiyugoub1_m5205_irq_r )
292292{
293   ddragon_state *state = space->machine().driver_data<ddragon_state>();
293   ddragon_state *state = space.machine().driver_data<ddragon_state>();
294294   if (state->m_adpcm_sound_irq)
295295   {
296296      state->m_adpcm_sound_irq = 0;
trunk/src/mame/drivers/kaneko16.c
r17963r17964
335335   {
336336      okim6295_device *oki = downcast<okim6295_device *>(device);
337337      oki->set_bank_base(0x40000 * (data & 0xf) );
338//      logerror("CPU #0 PC %06X : OKI0  bank %08X\n",space->device().safe_pc(),data);
338//      logerror("CPU #0 PC %06X : OKI0  bank %08X\n",space.device().safe_pc(),data);
339339   }
340340}
341341
r17963r17964
346346   {
347347      okim6295_device *oki = downcast<okim6295_device *>(device);
348348      oki->set_bank_base(0x40000 * data );
349//      logerror("CPU #0 PC %06X : OKI1  bank %08X\n",space->device().safe_pc(),data);
349//      logerror("CPU #0 PC %06X : OKI1  bank %08X\n",space.device().safe_pc(),data);
350350   }
351351}
352352
r17963r17964
476476   {
477477      okim6295_device *oki = downcast<okim6295_device *>(device);
478478      oki->set_bank_base( 0x40000 * (data & 0xF) );
479//      logerror("CPU #0 PC %06X : OKI0 bank %08X\n",space->device().safe_pc(),data);
479//      logerror("CPU #0 PC %06X : OKI0 bank %08X\n",space.device().safe_pc(),data);
480480   }
481481}
482482
r17963r17964
487487   {
488488      okim6295_device *oki = downcast<okim6295_device *>(device);
489489      oki->set_bank_base( 0x40000 * (data & 0x1) );
490//      logerror("CPU #0 PC %06X : OKI1 bank %08X\n",space->device().safe_pc(),data);
490//      logerror("CPU #0 PC %06X : OKI1 bank %08X\n",space.device().safe_pc(),data);
491491   }
492492}
493493
trunk/src/mame/drivers/gauntlet.c
r17963r17964
145145
146146static void scanline_update(screen_device &screen, int scanline)
147147{
148   address_space *space = screen.machine().device("audiocpu")->memory().space(AS_PROGRAM);
148   address_space &space = *screen.machine().device("audiocpu")->memory().space(AS_PROGRAM);
149149
150150   /* sound IRQ is on 32V */
151151   if (scanline & 32)
trunk/src/mame/drivers/viper.c
r17963r17964
11321132/*
11331133READ64_MEMBER(viper_state::epic_64be_r)
11341134{
1135    return read64be_with_32le_handler(epic_r, &space, offset, mem_mask);
1135    return read64be_with_32le_handler(epic_r, space, offset, mem_mask);
11361136}
11371137WRITE64_MEMBER(viper_state::epic_64be_w)
11381138{
1139    write64be_with_32le_handler(epic_w, &space, offset, data, mem_mask);
1139    write64be_with_32le_handler(epic_w, space, offset, data, mem_mask);
11401140}
11411141*/
11421142
trunk/src/mame/drivers/suna8.c
r17963r17964
8181/* Non encrypted bootleg */
8282DRIVER_INIT_MEMBER(suna8_state,hardhedb)
8383{
84   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
85   space->set_decrypted_region(0x0000, 0x7fff, machine().root_device().memregion("maincpu")->base() + 0x48000);
84   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
85   space.set_decrypted_region(0x0000, 0x7fff, machine().root_device().memregion("maincpu")->base() + 0x48000);
8686   machine().root_device().membank("bank1")->configure_entries(0, 16, machine().root_device().memregion("maincpu")->base() + 0x10000, 0x4000);
8787}
8888
r17963r17964
9292
9393static UINT8 *brickzn_decrypt(running_machine &machine)
9494{
95   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
95   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
9696   UINT8   *RAM   =   machine.root_device().memregion("maincpu")->base();
9797   size_t   size   =   machine.root_device().memregion("maincpu")->bytes();
9898   UINT8   *decrypt = auto_alloc_array(machine, UINT8, size);
9999   int i;
100100
101   space->set_decrypted_region(0x0000, 0x7fff, decrypt);
101   space.set_decrypted_region(0x0000, 0x7fff, decrypt);
102102
103103   /* Opcodes and data */
104104   for (i = 0; i < 0x50000; i++)
r17963r17964
222222
223223DRIVER_INIT_MEMBER(suna8_state,hardhea2)
224224{
225   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
225   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
226226   UINT8   *RAM   =   machine().root_device().memregion("maincpu")->base();
227227   size_t   size   =   machine().root_device().memregion("maincpu")->bytes();
228228   UINT8   *decrypt =   auto_alloc_array(machine(), UINT8, size);
229229   UINT8 x;
230230   int i;
231231
232   space->set_decrypted_region(0x0000, 0x7fff, decrypt);
232   space.set_decrypted_region(0x0000, 0x7fff, decrypt);
233233
234234   /* Address lines scrambling */
235235   memcpy(decrypt, RAM, size);
r17963r17964
309309
310310DRIVER_INIT_MEMBER(suna8_state,starfigh)
311311{
312   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
312   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
313313   UINT8   *RAM   =   machine().root_device().memregion("maincpu")->base();
314314   size_t   size   =   machine().root_device().memregion("maincpu")->bytes();
315315   UINT8   *decrypt =   auto_alloc_array(machine(), UINT8, size);
316316   UINT8 x;
317317   int i;
318318
319   space->set_decrypted_region(0x0000, 0x7fff, decrypt);
319   space.set_decrypted_region(0x0000, 0x7fff, decrypt);
320320
321321   /* Address lines scrambling */
322322   memcpy(decrypt, RAM, size);
r17963r17964
377377
378378DRIVER_INIT_MEMBER(suna8_state,sparkman)
379379{
380   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
380   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
381381   UINT8   *RAM   =   machine().root_device().memregion("maincpu")->base();
382382   size_t   size   =   machine().root_device().memregion("maincpu")->bytes();
383383   UINT8   *decrypt =   auto_alloc_array(machine(), UINT8, size);
384384   UINT8 x;
385385   int i;
386386
387   space->set_decrypted_region(0x0000, 0x7fff, decrypt);
387   space.set_decrypted_region(0x0000, 0x7fff, decrypt);
388388
389389   /* Address lines scrambling */
390390   memcpy(decrypt, RAM, size);
r17963r17964
18321832
18331833MACHINE_RESET_MEMBER(suna8_state,hardhea2)
18341834{
1835   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
1836   hardhea2_rambank_0_w(*space,0,0);
1835   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
1836   hardhea2_rambank_0_w(space,0,0);
18371837}
18381838
18391839static MACHINE_CONFIG_DERIVED( hardhea2, brickzn )
trunk/src/mame/drivers/btime.c
r17963r17964
199199}
200200
201201
202static void btime_decrypt( address_space *space )
202static void btime_decrypt( address_space &space )
203203{
204   btime_state *state = space->machine().driver_data<btime_state>();
204   btime_state *state = space.machine().driver_data<btime_state>();
205205   UINT8 *src, *src1;
206206   int addr, addr1;
207207
r17963r17964
211211   /* xxxx xxx1 xxxx x1xx are encrypted. */
212212
213213   /* get the address of the next opcode */
214   addr = space->device().safe_pc();
214   addr = space.device().safe_pc();
215215
216216   /* however if the previous instruction was JSR (which caused a write to */
217217   /* the stack), fetch the address of the next instruction. */
218   addr1 = space->device().safe_pcbase();
218   addr1 = space.device().safe_pcbase();
219219   src1 = (addr1 < 0x9000) ? state->m_rambase : state->memregion("maincpu")->base();
220220   if (decrypted[addr1] == 0x20)   /* JSR $xxxx */
221221      addr = src1[addr1 + 1] + 256 * src1[addr1 + 2];
r17963r17964
280280
281281   m_rambase[offset] = data;
282282
283   btime_decrypt(&space);
283   btime_decrypt(space);
284284}
285285
286286WRITE8_MEMBER(btime_state::tisland_w)
r17963r17964
299299
300300   m_rambase[offset] = data;
301301
302   btime_decrypt(&space);
302   btime_decrypt(space);
303303}
304304
305305WRITE8_MEMBER(btime_state::zoar_w)
r17963r17964
317317
318318   m_rambase[offset] = data;
319319
320   btime_decrypt(&space);
320   btime_decrypt(space);
321321}
322322
323323WRITE8_MEMBER(btime_state::disco_w)
r17963r17964
331331
332332   m_rambase[offset] = data;
333333
334   btime_decrypt(&space);
334   btime_decrypt(space);
335335}
336336
337337
r17963r17964
20382038
20392039static void decrypt_C10707_cpu(running_machine &machine, const char *cputag)
20402040{
2041   address_space *space = machine.device(cputag)->memory().space(AS_PROGRAM);
2041   address_space &space = *machine.device(cputag)->memory().space(AS_PROGRAM);
20422042   UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x10000);
20432043   UINT8 *rom = machine.root_device().memregion(cputag)->base();
20442044   offs_t addr;
20452045
2046   space->set_decrypted_region(0x0000, 0xffff, decrypt);
2046   space.set_decrypted_region(0x0000, 0xffff, decrypt);
20472047
20482048   /* Swap bits 5 & 6 for opcodes */
20492049   for (addr = 0; addr < 0x10000; addr++)
20502050      decrypt[addr] = swap_bits_5_6(rom[addr]);
20512051
2052   if (&space->device() == machine.device("maincpu"))
2052   if (&space.device() == machine.device("maincpu"))
20532053      decrypted = decrypt;
20542054}
20552055
r17963r17964
20682068
20692069static void init_rom1(running_machine &machine)
20702070{
2071   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
2071   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
20722072   UINT8 *rom = machine.root_device().memregion("maincpu")->base();
20732073
20742074   decrypted = auto_alloc_array(machine, UINT8, 0x10000);
2075   space->set_decrypted_region(0x0000, 0xffff, decrypted);
2075   space.set_decrypted_region(0x0000, 0xffff, decrypted);
20762076
20772077   /* For now, just copy the RAM array over to ROM. Decryption will happen */
20782078   /* at run time, since the CPU applies the decryption only if the previous */
trunk/src/mame/drivers/fcrash.c
r17963r17964
4242
4343static WRITE16_HANDLER( fcrash_soundlatch_w )
4444{
45   cps_state *state = space->machine().driver_data<cps_state>();
45   cps_state *state = space.machine().driver_data<cps_state>();
4646
4747   if (ACCESSING_BITS_0_7)
4848   {
49      state->soundlatch_byte_w(*space, 0, data & 0xff);
49      state->soundlatch_byte_w(space, 0, data & 0xff);
5050      state->m_audiocpu->set_input_line(0, HOLD_LINE);
5151   }
5252}
5353
5454static WRITE8_HANDLER( fcrash_snd_bankswitch_w )
5555{
56   cps_state *state = space->machine().driver_data<cps_state>();
56   cps_state *state = space.machine().driver_data<cps_state>();
5757
5858   state->m_msm_1->set_output_gain(0, (data & 0x08) ? 0.0 : 1.0);
5959   state->m_msm_2->set_output_gain(0, (data & 0x10) ? 0.0 : 1.0);
r17963r17964
8484
8585static WRITE8_HANDLER( fcrash_msm5205_0_data_w )
8686{
87   cps_state *state = space->machine().driver_data<cps_state>();
87   cps_state *state = space.machine().driver_data<cps_state>();
8888   state->m_sample_buffer1 = data;
8989}
9090
9191static WRITE8_HANDLER( fcrash_msm5205_1_data_w )
9292{
93   cps_state *state = space->machine().driver_data<cps_state>();
93   cps_state *state = space.machine().driver_data<cps_state>();
9494   state->m_sample_buffer2 = data;
9595}
9696
trunk/src/mame/drivers/model2.c
r17963r17964
176176
177177
178178#define COPRO_FIFOOUT_SIZE   32000
179static UINT32 copro_fifoout_pop(address_space *space)
179static UINT32 copro_fifoout_pop(address_space &space)
180180{
181   model2_state *state = space->machine().driver_data<model2_state>();
181   model2_state *state = space.machine().driver_data<model2_state>();
182182   UINT32 r;
183183
184184   if (state->m_copro_fifoout_num == 0)
185185   {
186186      /* Reading from empty FIFO causes the i960 to enter wait state */
187      i960_stall(&space->device());
187      i960_stall(&space.device());
188188
189189      /* spin the main cpu and let the TGP catch up */
190      space->device().execute().spin_until_time(attotime::from_usec(100));
190      space.device().execute().spin_until_time(attotime::from_usec(100));
191191
192192      return 0;
193193   }
r17963r17964
208208   {
209209      if (state->m_copro_fifoout_num == COPRO_FIFOOUT_SIZE)
210210      {
211         sharc_set_flag_input(space->machine().device("dsp"), 1, ASSERT_LINE);
211         sharc_set_flag_input(space.machine().device("dsp"), 1, ASSERT_LINE);
212212      }
213213      else
214214      {
215         sharc_set_flag_input(space->machine().device("dsp"), 1, CLEAR_LINE);
215         sharc_set_flag_input(space.machine().device("dsp"), 1, CLEAR_LINE);
216216      }
217217   }
218218
r17963r17964
639639READ32_MEMBER(model2_state::copro_fifo_r)
640640{
641641   //logerror("copro_fifo_r: %08X, %08X\n", offset, mem_mask);
642   return copro_fifoout_pop(&space);
642   return copro_fifoout_pop(space);
643643}
644644
645645WRITE32_MEMBER(model2_state::copro_fifo_w)
r17963r17964
963963}
964964
965965
966static int snd_68k_ready_r(address_space *space)
966static int snd_68k_ready_r(address_space &space)
967967{
968   int sr = space->machine().device("audiocpu")->state().state_int(M68K_SR);
968   int sr = space.machine().device("audiocpu")->state().state_int(M68K_SR);
969969
970970   if ((sr & 0x0700) > 0x0100)
971971   {
972      space->device().execute().spin_until_time(attotime::from_usec(40));
972      space.device().execute().spin_until_time(attotime::from_usec(40));
973973      return 0;   // not ready yet, interrupts disabled
974974   }
975975
976976   return 0xff;
977977}
978978
979static void snd_latch_to_68k_w(address_space *space, int data)
979static void snd_latch_to_68k_w(address_space &space, int data)
980980{
981   model2_state *state = space->machine().driver_data<model2_state>();
981   model2_state *state = space.machine().driver_data<model2_state>();
982982   if (!snd_68k_ready_r(space))
983983   {
984      space->device().execute().spin_until_time(attotime::from_usec(40));
984      space.device().execute().spin_until_time(attotime::from_usec(40));
985985   }
986986
987987   state->m_to_68k = data;
988988
989   space->machine().device("audiocpu")->execute().set_input_line(2, HOLD_LINE);
989   space.machine().device("audiocpu")->execute().set_input_line(2, HOLD_LINE);
990990
991991   // give the 68k time to notice
992   space->device().execute().spin_until_time(attotime::from_usec(40));
992   space.device().execute().spin_until_time(attotime::from_usec(40));
993993}
994994
995995READ32_MEMBER(model2_state::model2_serial_r)
r17963r17964
10061006{
10071007   if (mem_mask == 0x0000ffff)
10081008   {
1009      snd_latch_to_68k_w(&space, data&0xff);
1009      snd_latch_to_68k_w(space, data&0xff);
10101010   }
10111011}
10121012
trunk/src/mame/drivers/cps2.c
r17963r17964
692692
693693static WRITE16_HANDLER( cps2_eeprom_port_w )
694694{
695   cps_state *state = space->machine().driver_data<cps_state>();
695   cps_state *state = space.machine().driver_data<cps_state>();
696696
697697   if (ACCESSING_BITS_8_15)
698698   {
r17963r17964
724724      if (state->m_audiocpu != NULL)
725725         state->m_audiocpu->set_input_line(INPUT_LINE_RESET, (data & 0x0008) ? CLEAR_LINE : ASSERT_LINE);
726726
727      coin_counter_w(space->machine(), 0, data & 0x0001);
728      if ((strncmp(space->machine().system().name, "pzloop2", 8) == 0) ||
729          (strncmp(space->machine().system().name, "pzloop2j", 8) == 0) ||
730          (strncmp(space->machine().system().name, "pzloop2jr1", 8) == 0))
727      coin_counter_w(space.machine(), 0, data & 0x0001);
728      if ((strncmp(space.machine().system().name, "pzloop2", 8) == 0) ||
729          (strncmp(space.machine().system().name, "pzloop2j", 8) == 0) ||
730          (strncmp(space.machine().system().name, "pzloop2jr1", 8) == 0))
731731      {
732732         // Puzz Loop 2 uses coin counter 2 input to switch between stick and paddle controls
733733         state->m_readpaddle = data & 0x0002;
734734      }
735735      else
736736      {
737         coin_counter_w(space->machine(), 1, data & 0x0002);
737         coin_counter_w(space.machine(), 1, data & 0x0002);
738738      }
739739
740      if (strncmp(space->machine().system().name, "mmatrix", 7) == 0)      // Mars Matrix seems to require the coin lockout bit to be reversed
740      if (strncmp(space.machine().system().name, "mmatrix", 7) == 0)      // Mars Matrix seems to require the coin lockout bit to be reversed
741741      {
742         coin_lockout_w(space->machine(), 0, data & 0x0010);
743         coin_lockout_w(space->machine(), 1, data & 0x0020);
744         coin_lockout_w(space->machine(), 2, data & 0x0040);
745         coin_lockout_w(space->machine(), 3, data & 0x0080);
742         coin_lockout_w(space.machine(), 0, data & 0x0010);
743         coin_lockout_w(space.machine(), 1, data & 0x0020);
744         coin_lockout_w(space.machine(), 2, data & 0x0040);
745         coin_lockout_w(space.machine(), 3, data & 0x0080);
746746      }
747747      else
748748      {
749         coin_lockout_w(space->machine(), 0, ~data & 0x0010);
750         coin_lockout_w(space->machine(), 1, ~data & 0x0020);
751         coin_lockout_w(space->machine(), 2, ~data & 0x0040);
752         coin_lockout_w(space->machine(), 3, ~data & 0x0080);
749         coin_lockout_w(space.machine(), 0, ~data & 0x0010);
750         coin_lockout_w(space.machine(), 1, ~data & 0x0020);
751         coin_lockout_w(space.machine(), 2, ~data & 0x0040);
752         coin_lockout_w(space.machine(), 3, ~data & 0x0080);
753753      }
754754
755755      /*
756        set_led_status(space->machine(), 0, data & 0x01);
757        set_led_status(space->machine(), 1, data & 0x10);
758        set_led_status(space->machine(), 2, data & 0x20);
756        set_led_status(space.machine(), 0, data & 0x01);
757        set_led_status(space.machine(), 1, data & 0x10);
758        set_led_status(space.machine(), 2, data & 0x20);
759759        */
760760    }
761761}
r17963r17964
769769
770770static READ16_HANDLER( cps2_qsound_volume_r )
771771{
772   cps_state *state = space->machine().driver_data<cps_state>();
772   cps_state *state = space.machine().driver_data<cps_state>();
773773
774774   /* Extra adapter memory (0x660000-0x663fff) available when bit 14 = 0 */
775775   /* Network adapter (ssf2tb) present when bit 15 = 0 */
r17963r17964
795795
796796static READ16_HANDLER( joy_or_paddle_r )
797797{
798   cps_state *state = space->machine().driver_data<cps_state>();
798   cps_state *state = space.machine().driver_data<cps_state>();
799799
800800   if (state->m_readpaddle != 0)
801801      return (state->ioport("IN0")->read());
r17963r17964
81478147
81488148static READ16_HANDLER( gigaman2_dummyqsound_r )
81498149{
8150   cps_state *state = space->machine().driver_data<cps_state>();
8150   cps_state *state = space.machine().driver_data<cps_state>();
81518151   return state->m_gigaman2_dummyqsound_ram[offset];
81528152};
81538153
81548154static WRITE16_HANDLER( gigaman2_dummyqsound_w )
81558155{
8156   cps_state *state = space->machine().driver_data<cps_state>();
8156   cps_state *state = space.machine().driver_data<cps_state>();
81578157   state->m_gigaman2_dummyqsound_ram[offset] = data;
81588158};
81598159
r17963r17964
81768176
81778177DRIVER_INIT_MEMBER(cps_state,gigaman2)
81788178{
8179   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
8179   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
81808180   UINT16 *rom = (UINT16 *)memregion("maincpu")->base();
81818181   int length = memregion("maincpu")->bytes();
81828182
r17963r17964
81888188   save_pointer(NAME(m_gigaman2_dummyqsound_ram), 0x20000 / 2);
81898189
81908190   machine().device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x618000, 0x619fff, FUNC(gigaman2_dummyqsound_r), FUNC(gigaman2_dummyqsound_w)); // no qsound..
8191   space->set_decrypted_region(0x000000, (length) - 1, &rom[length/4]);
8191   space.set_decrypted_region(0x000000, (length) - 1, &rom[length/4]);
81928192   m68k_set_encrypted_opcode_range(machine().device("maincpu"), 0, length);
81938193}
81948194
trunk/src/mame/drivers/namcos12.c
r17963r17964
13861386
13871387MACHINE_RESET_MEMBER(namcos12_state,namcos12)
13881388{
1389   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
1390   bankoffset_w(*space,0,0,0xffffffff);
1389   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
1390   bankoffset_w(space,0,0,0xffffffff);
13911391
1392   space->install_write_handler(0x1f801000, 0x1f801003, write32_delegate(FUNC(namcos12_state::s12_dma_bias_w),this));
1392   space.install_write_handler(0x1f801000, 0x1f801003, write32_delegate(FUNC(namcos12_state::s12_dma_bias_w),this));
13931393
13941394   m_has_tektagt_dma = 0;
13951395
r17963r17964
14021402      strcmp( machine().system().name, "tektagtja" ) == 0 )
14031403   {
14041404      m_has_tektagt_dma = 1;
1405      space->install_readwrite_handler(0x1fb00000, 0x1fb00003, read32_delegate(FUNC(namcos12_state::tektagt_protection_1_r),this), write32_delegate(FUNC(namcos12_state::tektagt_protection_1_w),this));
1406      space->install_readwrite_handler(0x1fb80000, 0x1fb80003, read32_delegate(FUNC(namcos12_state::tektagt_protection_2_r),this), write32_delegate(FUNC(namcos12_state::tektagt_protection_2_w),this));
1407      space->install_read_handler(0x1f700000, 0x1f700003, read32_delegate(FUNC(namcos12_state::tektagt_protection_3_r),this));
1405      space.install_readwrite_handler(0x1fb00000, 0x1fb00003, read32_delegate(FUNC(namcos12_state::tektagt_protection_1_r),this), write32_delegate(FUNC(namcos12_state::tektagt_protection_1_w),this));
1406      space.install_readwrite_handler(0x1fb80000, 0x1fb80003, read32_delegate(FUNC(namcos12_state::tektagt_protection_2_r),this), write32_delegate(FUNC(namcos12_state::tektagt_protection_2_w),this));
1407      space.install_read_handler(0x1f700000, 0x1f700003, read32_delegate(FUNC(namcos12_state::tektagt_protection_3_r),this));
14081408   }
14091409
14101410   if( strcmp( machine().system().name, "tektagt" ) == 0 ||
r17963r17964
14301430      strcmp( machine().system().name, "ghlpanic" ) == 0 )
14311431   {
14321432      /* this is based on guesswork, it might not even be keycus. */
1433      space->install_read_bank (0x1fc20280, 0x1fc2028b, "bank2" );
1434      space->install_write_handler(0x1f008000, 0x1f008003, write32_delegate(FUNC(namcos12_state::kcon_w),this));
1435      space->install_write_handler(0x1f018000, 0x1f018003, write32_delegate(FUNC(namcos12_state::kcoff_w),this));
1433      space.install_read_bank (0x1fc20280, 0x1fc2028b, "bank2" );
1434      space.install_write_handler(0x1f008000, 0x1f008003, write32_delegate(FUNC(namcos12_state::kcon_w),this));
1435      space.install_write_handler(0x1f018000, 0x1f018003, write32_delegate(FUNC(namcos12_state::kcoff_w),this));
14361436
14371437      memset( m_kcram, 0, sizeof( m_kcram ) );
14381438      membank( "bank2" )->set_base( m_kcram );
trunk/src/mame/drivers/sigmab52.c
r17963r17964
283283
284284   else
285285   {
286      return 0x7b; //fake status read (instead HD63484_status_r(&space, 0, 0xff); )
286      return 0x7b; //fake status read (instead HD63484_status_r(space, 0, 0xff); )
287287   }
288288}
289289
trunk/src/mame/drivers/namcos21.c
r17963r17964
524524}
525525
526526static UINT16
527ReadWordFromSlaveInput( address_space *space )
527ReadWordFromSlaveInput( address_space &space )
528528{
529   namcos21_state *state = space->machine().driver_data<namcos21_state>();
529   namcos21_state *state = space.machine().driver_data<namcos21_state>();
530530   UINT16 data = 0;
531531   if( state->m_mpDspState->slaveBytesAvailable>0 )
532532   {
r17963r17964
537537      {
538538         state->m_mpDspState->slaveBytesAdvertised--;
539539      }
540      if (ENABLE_LOGGING) logerror( "%s:-%04x(0x%04x)\n", space->machine().describe_context(), data, state->m_mpDspState->slaveBytesAvailable );
540      if (ENABLE_LOGGING) logerror( "%s:-%04x(0x%04x)\n", space.machine().describe_context(), data, state->m_mpDspState->slaveBytesAvailable );
541541   }
542542   return data;
543543} /* ReadWordFromSlaveInput */
r17963r17964
853853
854854READ16_MEMBER(namcos21_state::slave_port0_r)
855855{
856   return ReadWordFromSlaveInput(&space);
856   return ReadWordFromSlaveInput(space);
857857} /* slave_port0_r */
858858
859859WRITE16_MEMBER(namcos21_state::slave_port0_w)
trunk/src/mame/drivers/beathead.c
r17963r17964
303303
304304READ32_MEMBER( beathead_state::sound_data_r )
305305{
306   return atarigen_sound_r(&space, offset, 0xffff);
306   return atarigen_sound_r(space, offset, 0xffff);
307307}
308308
309309
310310WRITE32_MEMBER( beathead_state::sound_data_w )
311311{
312312   if (ACCESSING_BITS_0_7)
313      atarigen_sound_w(&space, offset, data, mem_mask);
313      atarigen_sound_w(space, offset, data, mem_mask);
314314}
315315
316316
trunk/src/mame/drivers/suprgolf.c
r17963r17964
270270
271271   //popmessage("%08x %02x",((data & 0x3f) * 0x4000),data);
272272
273//  mame_printf_debug("ROM_BANK 0x8000 - %X @%X\n",data,space->device().safe_pcbase());
273//  mame_printf_debug("ROM_BANK 0x8000 - %X @%X\n",data,space.device().safe_pcbase());
274274   membank("bank2")->set_base(region_base + (data&0x3f ) * 0x4000);
275275
276276   m_msm_nmi_mask = data & 0x40;
trunk/src/mame/drivers/su2000.c
r17963r17964
260260
261261void su2000_state::machine_start()
262262{
263   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
263   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
264264
265265   m_pit8254 = machine().device("pit8254");
266266   m_pic8259_1 = machine().device("pic8259_1");
r17963r17964
276276
277277   /* HMA */
278278   offs_t ram_limit = 0x100000 + PC_RAM_SIZE - 0x0a0000;
279   space->install_read_bank(0x100000, ram_limit - 1, "hma_bank");
280   space->install_write_bank(0x100000, ram_limit - 1, "hma_bank");
279   space.install_read_bank(0x100000, ram_limit - 1, "hma_bank");
280   space.install_write_bank(0x100000, ram_limit - 1, "hma_bank");
281281   membank("hma_bank")->set_base(m_pc_ram + 0xa0000);
282282
283283   machine().device("maincpu")->execute().set_irq_acknowledge_callback(pc_irq_callback);
r17963r17964
287287   kbdc8042_init(machine(), &at8042);
288288
289289   pc_vga_init(machine(), vga_setting, NULL);
290   pc_vga_io_init(machine(), machine().device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, machine().device("maincpu")->memory().space(AS_IO), 0x0000);
290   pc_vga_io_init(machine(), *machine().device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, *machine().device("maincpu")->memory().space(AS_IO), 0x0000);
291291}
292292
293293void su2000_state::machine_reset()
trunk/src/mame/drivers/gaelco.c
r17963r17964
7575{
7676
7777   // mame_printf_debug("gaelco_vram_encrypted_w!!\n");
78   data = gaelco_decrypt(&space, offset, data, 0x0f, 0x4228);
78   data = gaelco_decrypt(space, offset, data, 0x0f, 0x4228);
7979   COMBINE_DATA(&m_videoram[offset]);
8080
8181   m_tilemap[offset >> 11]->mark_tile_dirty(((offset << 1) & 0x0fff) >> 2);
r17963r17964
8686{
8787
8888   // mame_printf_debug("gaelco_encrypted_w!!\n");
89   data = gaelco_decrypt(&space, offset, data, 0x0f, 0x4228);
89   data = gaelco_decrypt(space, offset, data, 0x0f, 0x4228);
9090   COMBINE_DATA(&m_screen[offset]);
9191}
9292
r17963r17964
9696{
9797
9898   // mame_printf_debug("gaelco_vram_encrypted_w!!\n");
99   data = gaelco_decrypt(&space, offset, data, 0x0e, 0x4228);
99   data = gaelco_decrypt(space, offset, data, 0x0e, 0x4228);
100100   COMBINE_DATA(&m_videoram[offset]);
101101
102102   m_tilemap[offset >> 11]->mark_tile_dirty(((offset << 1) & 0x0fff) >> 2);
r17963r17964
106106{
107107
108108   // mame_printf_debug("gaelco_encrypted_w!!\n");
109   data = gaelco_decrypt(&space, offset, data, 0x0e, 0x4228);
109   data = gaelco_decrypt(space, offset, data, 0x0e, 0x4228);
110110   COMBINE_DATA(&m_screen[offset]);
111111}
112112
trunk/src/mame/drivers/voyager.c
r17963r17964
801801   m_bios_ram = auto_alloc_array(machine(), UINT32, 0x20000/4);
802802
803803   pc_vga_init(machine(), vga_setting, NULL);
804   pc_svga_trident_io_init(machine(), machine().device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, machine().device("maincpu")->memory().space(AS_IO), 0x0000);
804   pc_svga_trident_io_init(machine(), *machine().device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, *machine().device("maincpu")->memory().space(AS_IO), 0x0000);
805805   init_pc_common(machine(), PCCOMMON_KEYBOARD_AT, voyager_set_keyb_int);
806806
807807   intel82439tx_init(machine());
trunk/src/mame/drivers/cmmb.c
r17963r17964
143143
144144/*
145145    {
146        UINT8 *ROM = space->machine().root_device().memregion("maincpu")->base();
146        UINT8 *ROM = space.machine().root_device().memregion("maincpu")->base();
147147        UINT32 bankaddress;
148148
149149        bankaddress = 0x10000 + (0x10000 * (data & 0x03));
150        space->machine().root_device().membank("bank1")->set_base(&ROM[bankaddress]);
150        space.machine().root_device().membank("bank1")->set_base(&ROM[bankaddress]);
151151    }
152152*/
153153
trunk/src/mame/drivers/freekick.c
r17963r17964
11251125
11261126DRIVER_INIT_MEMBER(freekick_state,gigasb)
11271127{
1128   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
1129   space->set_decrypted_region(0x0000, 0xbfff, machine().root_device().memregion("maincpu")->base() + 0x10000);
1128   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
1129   space.set_decrypted_region(0x0000, 0xbfff, machine().root_device().memregion("maincpu")->base() + 0x10000);
11301130}
11311131
11321132
trunk/src/mame/drivers/redclash.c
r17963r17964
2727
2828static WRITE8_HANDLER( irqack_w )
2929{
30   ladybug_state *state = space->machine().driver_data<ladybug_state>();
30   ladybug_state *state = space.machine().driver_data<ladybug_state>();
3131   state->m_maincpu->set_input_line(0, CLEAR_LINE);
3232}
3333
trunk/src/mame/drivers/vicdual.c
r17963r17964
243243WRITE8_MEMBER(vicdual_state::depthch_io_w)
244244{
245245   if (offset & 0x01)  assert_coin_status(machine());
246   if (offset & 0x04)  depthch_audio_w(&space, 0, data);
246   if (offset & 0x04)  depthch_audio_w(space, 0, data);
247247}
248248
249249
r17963r17964
409409WRITE8_MEMBER(vicdual_state::frogs_io_w)
410410{
411411   if (offset & 0x01)  assert_coin_status(machine());
412   if (offset & 0x02)  frogs_audio_w(&space, 0, data);
412   if (offset & 0x02)  frogs_audio_w(space, 0, data);
413413}
414414
415415
r17963r17964
529529WRITE8_MEMBER(vicdual_state::headon_io_w)
530530{
531531   if (offset & 0x01)  assert_coin_status(machine());
532   if (offset & 0x02)  headon_audio_w(&space, 0, data);
532   if (offset & 0x02)  headon_audio_w(space, 0, data);
533533   if (offset & 0x04) { /* vicdual_palette_bank_w(0, data)  */ }    /* not written to */
534534}
535535
r17963r17964
730730WRITE8_MEMBER(vicdual_state::headon2_io_w)
731731{
732732   if (offset & 0x01)  assert_coin_status(machine());
733   if (offset & 0x02)  headon_audio_w(&space, 0, data);
733   if (offset & 0x02)  headon_audio_w(space, 0, data);
734734   if (offset & 0x04)  vicdual_palette_bank_w(space, 0, data);
735735    if (offset & 0x08) { /* schematics show this as going into a shifer circuit, but never written to */ }
736736    if (offset & 0x10) { /* schematics show this as going to an edge connector, but never written to */ }
r17963r17964
943943
944944WRITE8_MEMBER(vicdual_state::invho2_io_w)
945945{
946   if (offset & 0x01)  invho2_audio_w(&space, 0, data);
947   if (offset & 0x02)  invinco_audio_w(&space, 0, data);
946   if (offset & 0x01)  invho2_audio_w(space, 0, data);
947   if (offset & 0x02)  invinco_audio_w(space, 0, data);
948948   if (offset & 0x08)  assert_coin_status(machine());
949949   if (offset & 0x40)  vicdual_palette_bank_w(space, 0, data);
950950}
r17963r17964
952952
953953WRITE8_MEMBER(vicdual_state::invds_io_w)
954954{
955   if (offset & 0x01)  invinco_audio_w(&space, 0, data);
955   if (offset & 0x01)  invinco_audio_w(space, 0, data);
956956   if (offset & 0x02) { /* deepscan_audio_w(0, data) */ }
957957   if (offset & 0x08)  assert_coin_status(machine());
958958   if (offset & 0x40)  vicdual_palette_bank_w(space, 0, data);
r17963r17964
961961
962962WRITE8_MEMBER(vicdual_state::sspacaho_io_w)
963963{
964   if (offset & 0x01)  invho2_audio_w(&space, 0, data);
965   if (offset & 0x02) { /* s&spaceatt_audio_w(&space, 0, data) */ }
964   if (offset & 0x01)  invho2_audio_w(space, 0, data);
965   if (offset & 0x02) { /* s&spaceatt_audio_w(space, 0, data) */ }
966966   if (offset & 0x08)  assert_coin_status(machine());
967967   if (offset & 0x40)  vicdual_palette_bank_w(space, 0, data);
968968}
r17963r17964
970970
971971WRITE8_MEMBER(vicdual_state::tranqgun_io_w)
972972{
973   if (offset & 0x01) { /* tranqgun_audio_w(&space, 0, data) */ }
973   if (offset & 0x01) { /* tranqgun_audio_w(space, 0, data) */ }
974974   if (offset & 0x02)  vicdual_palette_bank_w(space, 0, data);
975975   if (offset & 0x08)  assert_coin_status(machine());
976976}
r17963r17964
978978
979979WRITE8_MEMBER(vicdual_state::spacetrk_io_w)
980980{
981   if (offset & 0x01) { /* &spacetrk_audio_w(&space, 0, data) */ }
982   if (offset & 0x02) { /* &spacetrk_audio_w(&space, 0, data) */ }
981   if (offset & 0x01) { /* &spacetrk_audio_w(space, 0, data) */ }
982   if (offset & 0x02) { /* &spacetrk_audio_w(space, 0, data) */ }
983983   if (offset & 0x08)  assert_coin_status(machine());
984984   if (offset & 0x40)  vicdual_palette_bank_w(space, 0, data);
985985}
r17963r17964
987987
988988WRITE8_MEMBER(vicdual_state::carnival_io_w)
989989{
990   if (offset & 0x01)  carnival_audio_1_w(&space, 0, data);
991   if (offset & 0x02)  carnival_audio_2_w(&space, 0, data);
990   if (offset & 0x01)  carnival_audio_1_w(space, 0, data);
991   if (offset & 0x02)  carnival_audio_2_w(space, 0, data);
992992   if (offset & 0x08)  assert_coin_status(machine());
993993   if (offset & 0x40)  vicdual_palette_bank_w(space, 0, data);
994994}
r17963r17964
996996
997997WRITE8_MEMBER(vicdual_state::brdrline_io_w)
998998{
999   if (offset & 0x01) { /* brdrline_audio_w(&space, 0, data) */ }
999   if (offset & 0x01) { /* brdrline_audio_w(space, 0, data) */ }
10001000   if (offset & 0x02)  vicdual_palette_bank_w(space, 0, data);
10011001   if (offset & 0x08)  assert_coin_status(machine());
10021002}
r17963r17964
10041004
10051005WRITE8_MEMBER(vicdual_state::pulsar_io_w)
10061006{
1007   if (offset & 0x01)  pulsar_audio_1_w(&space, 0, data);
1008   if (offset & 0x02)  pulsar_audio_2_w(&space, 0, data);
1007   if (offset & 0x01)  pulsar_audio_1_w(space, 0, data);
1008   if (offset & 0x02)  pulsar_audio_2_w(space, 0, data);
10091009   if (offset & 0x08)  assert_coin_status(machine());
10101010   if (offset & 0x40)  vicdual_palette_bank_w(space, 0, data);
10111011}
r17963r17964
22732273WRITE8_MEMBER(vicdual_state::invinco_io_w)
22742274{
22752275   if (offset & 0x01)  assert_coin_status(machine());
2276   if (offset & 0x02)  invinco_audio_w(&space, 0, data);
2276   if (offset & 0x02)  invinco_audio_w(space, 0, data);
22772277   if (offset & 0x04)  vicdual_palette_bank_w(space, 0, data);
22782278}
22792279
trunk/src/mame/drivers/metro.c
r17963r17964
133133static void update_irq_state( running_machine &machine )
134134{
135135   metro_state *state = machine.driver_data<metro_state>();
136   address_space *space = state->m_maincpu->space(AS_PROGRAM);
136   address_space &space = *state->m_maincpu->space(AS_PROGRAM);
137137
138138   /*  Get the pending IRQs (only the enabled ones, e.g. where irq_enable is *0*)  */
139   UINT16 irq = state->metro_irq_cause_r(*space, 0, 0xffff) & ~*state->m_irq_enable;
139   UINT16 irq = state->metro_irq_cause_r(space, 0, 0xffff) & ~*state->m_irq_enable;
140140
141141   if (state->m_irq_line == -1)   /* mouja, gakusai, gakusai2, dokyusei, dokyusp */
142142   {
r17963r17964
266266static int metro_io_callback( device_t *device, int ioline, int state )
267267{
268268   metro_state *driver_state = device->machine().driver_data<metro_state>();
269   address_space *space = driver_state->m_maincpu->space(AS_PROGRAM);
269   address_space &space = *driver_state->m_maincpu->space(AS_PROGRAM);
270270   UINT8 data = 0;
271271
272272   switch (ioline)
273273   {
274274      case UPD7810_RXD:   /* read the RxD line */
275         data = driver_state->soundlatch_byte_r(*space, 0);
275         data = driver_state->soundlatch_byte_r(space, 0);
276276         state = data & 1;
277         driver_state->soundlatch_byte_w(*space, 0, data >> 1);
277         driver_state->soundlatch_byte_w(space, 0, data >> 1);
278278         break;
279279      default:
280280         logerror("upd7810 ioline %d not handled\n", ioline);
r17963r17964
580580   return ROM[offs];
581581}
582582
583void metro_state::blt_write( address_space *space, const int tmap, const offs_t offs, const UINT16 data, const UINT16 mask )
583void metro_state::blt_write( address_space &space, const int tmap, const offs_t offs, const UINT16 data, const UINT16 mask )
584584{
585585   switch(tmap)
586586   {
587      case 1:   metro_vram_0_w(*space, offs, data, mask);   break;
588      case 2:   metro_vram_1_w(*space, offs, data, mask);   break;
589      case 3:   metro_vram_2_w(*space, offs, data, mask);   break;
587      case 1:   metro_vram_0_w(space, offs, data, mask);   break;
588      case 2:   metro_vram_1_w(space, offs, data, mask);   break;
589      case 3:   metro_vram_2_w(space, offs, data, mask);   break;
590590   }
591//  logerror("%s : Blitter %X] %04X <- %04X & %04X\n", space->machine().describe_context(), tmap, offs, data, mask);
591//  logerror("%s : Blitter %X] %04X <- %04X & %04X\n", space.machine().describe_context(), tmap, offs, data, mask);
592592}
593593
594594
r17963r17964
655655               src_offs++;
656656
657657               dst_offs &= 0xffff;
658               blt_write(&space, tmap, dst_offs, b2, mask);
658               blt_write(space, tmap, dst_offs, b2, mask);
659659               dst_offs = ((dst_offs + 1) & (0x100 - 1)) | (dst_offs & (~(0x100 - 1)));
660660            }
661661            break;
r17963r17964
669669            while (count--)
670670            {
671671               dst_offs &= 0xffff;
672               blt_write(&space, tmap, dst_offs, b2 << shift, mask);
672               blt_write(space, tmap, dst_offs, b2 << shift, mask);
673673               dst_offs = ((dst_offs + 1) & (0x100 - 1)) | (dst_offs & (~(0x100 - 1)));
674674               b2++;
675675            }
r17963r17964
684684            while (count--)
685685            {
686686               dst_offs &= 0xffff;
687               blt_write(&space, tmap, dst_offs, b2, mask);
687               blt_write(space, tmap, dst_offs, b2, mask);
688688               dst_offs = ((dst_offs + 1) & (0x100 - 1)) | (dst_offs & (~(0x100 - 1)));
689689            }
690690            break;
r17963r17964
59455945
59465946DRIVER_INIT_MEMBER(metro_state,metro)
59475947{
5948   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
5948   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
59495949
59505950   metro_common(machine());
59515951
59525952   m_porta = 0x00;
59535953   m_portb = 0x00;
59545954   m_busy_sndcpu = 0;
5955   metro_sound_rombank_w(*space, 0, 0x00);
5955   metro_sound_rombank_w(space, 0, 0x00);
59565956}
59575957
59585958DRIVER_INIT_MEMBER(metro_state,karatour)
r17963r17964
59725972
59735973DRIVER_INIT_MEMBER(metro_state,daitorid)
59745974{
5975   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
5975   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
59765976
59775977   metro_common(machine());
59785978
59795979   m_porta = 0x00;
59805980   m_portb = 0x00;
59815981   m_busy_sndcpu = 0;
5982   daitorid_sound_rombank_w(*space, 0, 0x00);
5982   daitorid_sound_rombank_w(space, 0, 0x00);
59835983}
59845984
59855985
trunk/src/mame/drivers/hshavoc.c
r17963r17964
218218*/
219219
220220   {
221      address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
222      space->nop_write(0x200000, 0x201fff);
221      address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
222      space.nop_write(0x200000, 0x201fff);
223223   }
224224
225225   DRIVER_INIT_CALL(megadriv);
trunk/src/mame/drivers/eolith.c
r17963r17964
125125        bit 8 = ???
126126        bit 9 = ???
127127    */
128   eolith_speedup_read(&space);
128   eolith_speedup_read(space);
129129
130130   return (ioport("IN0")->read() & ~0x300) | (machine().rand() & 0x300);
131131}
trunk/src/mame/drivers/chihiro.c
r17963r17964
619619*/
620620
621621/* jamtable disassembler */
622static void jamtable_disasm(running_machine &machine, address_space *space,UINT32 address,UINT32 size) // 0xff000080 == fff00080
622static void jamtable_disasm(running_machine &machine, address_space &space,UINT32 address,UINT32 size) // 0xff000080 == fff00080
623623{
624624   offs_t base,addr;
625625   UINT32 opcode,op1,op2;
r17963r17964
636636   while (1)
637637   {
638638      base=addr;
639      opcode=space->read_byte(addr);
639      opcode=space.read_byte(addr);
640640      addr++;
641      op1=space->read_dword_unaligned(addr);
641      op1=space.read_dword_unaligned(addr);
642642      addr+=4;
643      op2=space->read_dword_unaligned(addr);
643      op2=space.read_dword_unaligned(addr);
644644      addr+=4;
645645      if (opcode == 0xe1)
646646      {
r17963r17964
717717
718718static void jamtable_disasm_command(running_machine &machine, int ref, int params, const char **param)
719719{
720   address_space *space=machine.firstcpu->space();
720   address_space &space=*machine.firstcpu->space();
721721   UINT64   addr,size;
722722
723723   if (params < 2)
r17963r17964
731731
732732static void dump_string_command(running_machine &machine, int ref, int params, const char **param)
733733{
734   address_space *space=machine.firstcpu->space();
734   address_space &space=*machine.firstcpu->space();
735735   UINT64   addr;
736736   offs_t address;
737737   UINT32 length,maximumlength;
r17963r17964
747747      debug_console_printf(machine,"Address is unmapped.\n");
748748      return;
749749   }
750   length=space->read_word_unaligned(address);
751   maximumlength=space->read_word_unaligned(address+2);
752   buffer=space->read_dword_unaligned(address+4);
750   length=space.read_word_unaligned(address);
751   maximumlength=space.read_word_unaligned(address+2);
752   buffer=space.read_dword_unaligned(address+4);
753753   debug_console_printf(machine,"Length %d word\n",length);
754754   debug_console_printf(machine,"MaximumLength %d word\n",maximumlength);
755755   debug_console_printf(machine,"Buffer %08X byte* ",buffer);
r17963r17964
762762      length=256;
763763   for (int a=0;a < length;a++)
764764   {
765      UINT8 c=space->read_byte(buffer+a);
765      UINT8 c=space.read_byte(buffer+a);
766766      debug_console_printf(machine,"%c",c);
767767   }
768768   debug_console_printf(machine,"\n");
r17963r17964
770770
771771static void dump_process_command(running_machine &machine, int ref, int params, const char **param)
772772{
773   address_space *space=machine.firstcpu->space();
773   address_space &space=*machine.firstcpu->space();
774774   UINT64 addr;
775775   offs_t address;
776776
r17963r17964
784784      debug_console_printf(machine,"Address is unmapped.\n");
785785      return;
786786   }
787   debug_console_printf(machine,"ReadyListHead {%08X,%08X} _LIST_ENTRY\n",space->read_dword_unaligned(address),space->read_dword_unaligned(address+4));
788   debug_console_printf(machine,"ThreadListHead {%08X,%08X} _LIST_ENTRY\n",space->read_dword_unaligned(address+8),space->read_dword_unaligned(address+12));
789   debug_console_printf(machine,"StackCount %d dword\n",space->read_dword_unaligned(address+16));
790   debug_console_printf(machine,"ThreadQuantum %d dword\n",space->read_dword_unaligned(address+20));
791   debug_console_printf(machine,"BasePriority %d byte\n",space->read_byte(address+24));
792   debug_console_printf(machine,"DisableBoost %d byte\n",space->read_byte(address+25));
793   debug_console_printf(machine,"DisableQuantum %d byte\n",space->read_byte(address+26));
794   debug_console_printf(machine,"_padding %d byte\n",space->read_byte(address+27));
787   debug_console_printf(machine,"ReadyListHead {%08X,%08X} _LIST_ENTRY\n",space.read_dword_unaligned(address),space.read_dword_unaligned(address+4));
788   debug_console_printf(machine,"ThreadListHead {%08X,%08X} _LIST_ENTRY\n",space.read_dword_unaligned(address+8),space.read_dword_unaligned(address+12));
789   debug_console_printf(machine,"StackCount %d dword\n",space.read_dword_unaligned(address+16));
790   debug_console_printf(machine,"ThreadQuantum %d dword\n",space.read_dword_unaligned(address+20));
791   debug_console_printf(machine,"BasePriority %d byte\n",space.read_byte(address+24));
792   debug_console_printf(machine,"DisableBoost %d byte\n",space.read_byte(address+25));
793   debug_console_printf(machine,"DisableQuantum %d byte\n",space.read_byte(address+26));
794   debug_console_printf(machine,"_padding %d byte\n",space.read_byte(address+27));
795795}
796796
797797static void dump_list_command(running_machine &machine, int ref, int params, const char **param)
798798{
799   address_space *space=machine.firstcpu->space();
799   address_space &space=*machine.firstcpu->space();
800800   UINT64 addr,offs,start,old;
801801   offs_t address,offset;
802802
r17963r17964
830830      else
831831         debug_console_printf(machine,"%08X\n",(UINT32)addr);
832832      old=addr;
833      addr=space->read_dword_unaligned(address);
833      addr=space.read_dword_unaligned(address);
834834      if (addr == start)
835835         break;
836836      if (addr == old)
trunk/src/mame/drivers/namcos23.c
r17963r17964
21282128   render.count[render.cur]++;
21292129}
21302130
2131static void p3d_dma(address_space *space, UINT32 adr, UINT32 size)
2131static void p3d_dma(address_space &space, UINT32 adr, UINT32 size)
21322132{
2133   namcos23_state *state = space->machine().driver_data<namcos23_state>();
2133   namcos23_state *state = space.machine().driver_data<namcos23_state>();
21342134   UINT16 buffer[256];
21352135   adr &= 0x1fffffff;
21362136   int pos = 0;
21372137   while(pos < size) {
2138      UINT16 h = space->read_word(adr+pos);
2138      UINT16 h = space.read_word(adr+pos);
21392139
21402140      pos += 2;
21412141
r17963r17964
21552155      }
21562156
21572157      for(int i=0; i < psize; i++) {
2158         buffer[i] = space->read_word(adr+pos);
2158         buffer[i] = space.read_word(adr+pos);
21592159         pos += 2;
21602160      }
21612161
r17963r17964
21992199   case 0x8: COMBINE_DATA(&m_p3d_size); return;
22002200   case 0x9:
22012201      if(data & 1)
2202         p3d_dma(&space, m_p3d_address, m_p3d_size);
2202         p3d_dma(space, m_p3d_address, m_p3d_size);
22032203      return;
22042204   case 0x17:
22052205      machine().device("maincpu")->execute().set_input_line(MIPS3_IRQ1, CLEAR_LINE);
trunk/src/mame/drivers/commando.c
r17963r17964
511511
512512DRIVER_INIT_MEMBER(commando_state,commando)
513513{
514   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
514   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
515515   UINT8 *rom = machine().root_device().memregion("maincpu")->base();
516516   UINT8 *decrypt = auto_alloc_array(machine(), UINT8, 0xc000);
517517   int A;
518518
519   space->set_decrypted_region(0x0000, 0xbfff, decrypt);
519   space.set_decrypted_region(0x0000, 0xbfff, decrypt);
520520
521521   // the first opcode is *not* encrypted
522522   decrypt[0] = rom[0];
r17963r17964
531531
532532DRIVER_INIT_MEMBER(commando_state,spaceinv)
533533{
534   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
534   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
535535   UINT8 *rom = machine().root_device().memregion("maincpu")->base();
536536   UINT8 *decrypt = auto_alloc_array(machine(), UINT8, 0xc000);
537537   int A;
538538
539   space->set_decrypted_region(0x0000, 0xbfff, decrypt);
539   space.set_decrypted_region(0x0000, 0xbfff, decrypt);
540540
541541   // the first opcode *is* encrypted
542542   for (A = 0; A < 0xc000; A++)
trunk/src/mame/drivers/atarisy2.c
r17963r17964
341341
342342static void bankselect_postload(running_machine &machine)
343343{
344   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
344   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
345345   atarisy2_state *state = machine.driver_data<atarisy2_state>();
346346
347   state->bankselect_w(*space, 0, state->m_bankselect[0], 0xffff);
348   state->bankselect_w(*space, 1, state->m_bankselect[1], 0xffff);
347   state->bankselect_w(space, 0, state->m_bankselect[0], 0xffff);
348   state->bankselect_w(space, 1, state->m_bankselect[1], 0xffff);
349349}
350350
351351
r17963r17964
725725   atarigen_update_interrupts(machine());
726726
727727   /* handle it normally otherwise */
728   return atarigen_sound_r(&space,offset,0xffff);
728   return atarigen_sound_r(space,offset,0xffff);
729729}
730730
731731
r17963r17964
737737   atarigen_update_interrupts(machine());
738738
739739   /* handle it normally otherwise */
740   atarigen_6502_sound_w(&space, offset, data);
740   atarigen_6502_sound_w(space, offset, data);
741741}
742742
743743
r17963r17964
749749   atarigen_update_interrupts(machine());
750750
751751   /* handle it normally otherwise */
752   return atarigen_6502_sound_r(&space, offset);
752   return atarigen_6502_sound_r(space, offset);
753753}
754754
755755
trunk/src/mame/drivers/ninjakd2.c
r17963r17964
14691469
14701470DRIVER_INIT_MEMBER(ninjakd2_state,bootleg)
14711471{
1472   address_space *space = machine().device("soundcpu")->memory().space(AS_PROGRAM);
1473   space->set_decrypted_region(0x0000, 0x7fff, machine().root_device().memregion("soundcpu")->base() + 0x10000);
1472   address_space &space = *machine().device("soundcpu")->memory().space(AS_PROGRAM);
1473   space.set_decrypted_region(0x0000, 0x7fff, machine().root_device().memregion("soundcpu")->base() + 0x10000);
14741474
14751475   gfx_unscramble(machine());
14761476}
trunk/src/mame/drivers/spacefb.c
r17963r17964
180180
181181void spacefb_state::machine_reset()
182182{
183   address_space *space = machine().device("maincpu")->memory().space(AS_IO);
183   address_space &space = *machine().device("maincpu")->memory().space(AS_IO);
184184   /* the 3 output ports are cleared on reset */
185   spacefb_port_0_w(*space, 0, 0);
186   spacefb_port_1_w(*space, 0, 0);
187   spacefb_port_2_w(*space, 0, 0);
185   spacefb_port_0_w(space, 0, 0);
186   spacefb_port_1_w(space, 0, 0);
187   spacefb_port_2_w(space, 0, 0);
188188
189189   start_interrupt_timer(machine());
190190}
trunk/src/mame/drivers/liberate.c
r17963r17964
13461346
13471347static void sound_cpu_decrypt(running_machine &machine)
13481348{
1349   address_space *space = machine.device("audiocpu")->memory().space(AS_PROGRAM);
1349   address_space &space = *machine.device("audiocpu")->memory().space(AS_PROGRAM);
13501350   UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x4000);
13511351   UINT8 *rom = machine.root_device().memregion("audiocpu")->base();
13521352   int i;
r17963r17964
13551355   for (i = 0xc000; i < 0x10000; i++)
13561356      decrypted[i - 0xc000] = ((rom[i] & 0x20) << 1) | ((rom[i] & 0x40) >> 1) | (rom[i] & 0x9f);
13571357
1358   space->set_decrypted_region(0xc000, 0xffff, decrypted);
1358   space.set_decrypted_region(0xc000, 0xffff, decrypted);
13591359}
13601360
13611361DRIVER_INIT_MEMBER(liberate_state,prosport)
r17963r17964
13801380DRIVER_INIT_MEMBER(liberate_state,liberate)
13811381{
13821382   int A;
1383   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
1383   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
13841384   UINT8 *decrypted = auto_alloc_array(machine(), UINT8, 0x10000);
13851385   UINT8 *ROM = machine().root_device().memregion("maincpu")->base();
13861386
1387   space->set_decrypted_region(0x0000, 0xffff, decrypted);
1387   space.set_decrypted_region(0x0000, 0xffff, decrypted);
13881388
13891389   /* Swap bits for opcodes only, not data */
13901390   for (A = 0; A < 0x10000; A++) {
trunk/src/mame/drivers/seta.c
r17963r17964
31773177
31783178MACHINE_RESET_MEMBER(seta_state,calibr50)
31793179{
3180   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
3181   sub_bankswitch_w(*space, 0, 0);
3180   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
3181   sub_bankswitch_w(space, 0, 0);
31823182}
31833183
31843184WRITE8_MEMBER(seta_state::calibr50_soundlatch2_w)
trunk/src/mame/drivers/naomi.c
r17963r17964
14161416
14171417static READ64_HANDLER( naomi_arm_r )
14181418{
1419   dc_state *state = space->machine().driver_data<dc_state>();
1419   dc_state *state = space.machine().driver_data<dc_state>();
14201420
14211421   return *(reinterpret_cast<UINT64 *>(state->dc_sound_ram.target())+offset);
14221422}
14231423
14241424static WRITE64_HANDLER( naomi_arm_w )
14251425{
1426   dc_state *state = space->machine().driver_data<dc_state>();
1426   dc_state *state = space.machine().driver_data<dc_state>();
14271427
14281428   COMBINE_DATA(reinterpret_cast<UINT64 *>(state->dc_sound_ram.target()) + offset);
14291429}
r17963r17964
15171517 // SB_LMMODE0
15181518 static WRITE64_HANDLER( ta_texture_directpath0_w )
15191519 {
1520   dc_state *state = space->machine().driver_data<dc_state>();
1520   dc_state *state = space.machine().driver_data<dc_state>();
15211521
15221522   int mode = state->pvrctrl_regs[SB_LMMODE0]&1;
15231523   if (mode&1)
r17963r17964
15341534 // SB_LMMODE1
15351535 static WRITE64_HANDLER( ta_texture_directpath1_w )
15361536 {
1537   dc_state *state = space->machine().driver_data<dc_state>();
1537   dc_state *state = space.machine().driver_data<dc_state>();
15381538
15391539   int mode = state->pvrctrl_regs[SB_LMMODE1]&1;
15401540   if (mode&1)
r17963r17964
17241724   int reg;
17251725   UINT64 shift;
17261726
1727   reg = decode_reg32_64(space->machine(), offset, mem_mask, &shift);
1727   reg = decode_reg32_64(space.machine(), offset, mem_mask, &shift);
17281728
17291729   if (reg == 0x280/4)
17301730   {
1731      UINT32 coins = space->machine().root_device().ioport("COINS")->read();
1731      UINT32 coins = space.machine().root_device().ioport("COINS")->read();
17321732
17331733      if (coins & 0x01)
17341734      {
r17963r17964
17521752   UINT64 shift;
17531753   UINT32 dat;
17541754
1755   reg = decode_reg32_64(space->machine(), offset, mem_mask, &shift);
1755   reg = decode_reg32_64(space.machine(), offset, mem_mask, &shift);
17561756   dat = (UINT32)(data >> shift);
17571757   mame_printf_verbose("MODEM: [%08x=%x] write %" I64FMT "x to %x, mask %" I64FMT "x\n", 0x600000+reg*4, dat, data, offset, mem_mask);
17581758}
trunk/src/mame/drivers/queen.c
r17963r17964
656656
657657   kbdc8042_init(machine(), &at8042);
658658   pc_vga_init(machine(), ::vga_setting, NULL);
659   pc_vga_io_init(machine(), machine().device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, machine().device("maincpu")->memory().space(AS_IO), 0x0000);
659   pc_vga_io_init(machine(), *machine().device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, *machine().device("maincpu")->memory().space(AS_IO), 0x0000);
660660}
661661
662662void queen_state::machine_reset()
trunk/src/mame/drivers/megatech.c
r17963r17964
209209/* MEGATECH specific */
210210static READ8_HANDLER( megatech_cart_select_r )
211211{
212   mtech_state *state = space->machine().driver_data<mtech_state>();
212   mtech_state *state = space.machine().driver_data<mtech_state>();
213213   return state->m_mt_cart_select_reg;
214214}
215215
r17963r17964
292292      but it stores something in (banked?) ram
293293      because it always seems to show the
294294      same instructions ... */
295   mtech_state *state = space->machine().driver_data<mtech_state>();
295   mtech_state *state = space.machine().driver_data<mtech_state>();
296296   state->m_mt_cart_select_reg = data;
297297
298   megatech_select_game(space->machine(), state->m_mt_cart_select_reg);
298   megatech_select_game(space.machine(), state->m_mt_cart_select_reg);
299299}
300300
301301
302302static READ8_HANDLER( bios_ctrl_r )
303303{
304   mtech_state *state = space->machine().driver_data<mtech_state>();
304   mtech_state *state = space.machine().driver_data<mtech_state>();
305305
306306   if (offset == 0)
307307      return 0;
r17963r17964
313313
314314static WRITE8_HANDLER( bios_ctrl_w )
315315{
316   mtech_state *state = space->machine().driver_data<mtech_state>();
316   mtech_state *state = space.machine().driver_data<mtech_state>();
317317
318318   if (offset == 1)
319319   {
r17963r17964
333333
334334static READ8_HANDLER( megatech_z80_read_68k_banked_data )
335335{
336   mtech_state *state = space->machine().driver_data<mtech_state>();
337   address_space *space68k = space->machine().device<legacy_cpu_device>("maincpu")->space();
336   mtech_state *state = space.machine().driver_data<mtech_state>();
337   address_space *space68k = space.machine().device<legacy_cpu_device>("maincpu")->space();
338338   UINT8 ret = space68k->read_byte(state->m_mt_bank_addr + offset);
339339   return ret;
340340}
341341
342342static WRITE8_HANDLER( megatech_z80_write_68k_banked_data )
343343{
344   mtech_state *state = space->machine().driver_data<mtech_state>();
345   address_space *space68k = space->machine().device<legacy_cpu_device>("maincpu")->space();
344   mtech_state *state = space.machine().driver_data<mtech_state>();
345   address_space *space68k = space.machine().device<legacy_cpu_device>("maincpu")->space();
346346   space68k->write_byte(state->m_mt_bank_addr + offset,data);
347347}
348348
r17963r17964
354354
355355static WRITE8_HANDLER( mt_z80_bank_w )
356356{
357   megatech_z80_bank_w(space->machine(), data & 1);
357   megatech_z80_bank_w(space.machine(), data & 1);
358358}
359359
360360static READ8_HANDLER( megatech_banked_ram_r )
361361{
362   mtech_state *state = space->machine().driver_data<mtech_state>();
362   mtech_state *state = space.machine().driver_data<mtech_state>();
363363   return state->m_megatech_banked_ram[offset + 0x1000 * (state->m_mt_cart_select_reg & 0x07)];
364364}
365365
366366static WRITE8_HANDLER( megatech_banked_ram_w )
367367{
368   mtech_state *state = space->machine().driver_data<mtech_state>();
368   mtech_state *state = space.machine().driver_data<mtech_state>();
369369   state->m_megatech_banked_ram[offset + 0x1000 * (state->m_mt_cart_select_reg & 0x07)] = data;
370370}
371371
r17963r17964
391391
392392static WRITE8_HANDLER( megatech_bios_port_ctrl_w )
393393{
394   mtech_state *state = space->machine().driver_data<mtech_state>();
394   mtech_state *state = space.machine().driver_data<mtech_state>();
395395   state->m_bios_port_ctrl = data;
396396}
397397
398398static READ8_HANDLER( megatech_bios_joypad_r )
399399{
400   mtech_state *state = space->machine().driver_data<mtech_state>();
401   return megatech_bios_port_cc_dc_r(space->machine(), offset, state->m_bios_port_ctrl);
400   mtech_state *state = space.machine().driver_data<mtech_state>();
401   return megatech_bios_port_cc_dc_r(space.machine(), offset, state->m_bios_port_ctrl);
402402}
403403
404404static WRITE8_HANDLER (megatech_bios_port_7f_w)
trunk/src/mame/drivers/vamphalf.c
r17963r17964
22072207   ROM_COPY( "user2", 0x0e0000, 0x1e0000, 0x020000)
22082208ROM_END
22092209
2210static int irq_active(address_space *space)
2210static int irq_active(address_space &space)
22112211{
2212   UINT32 FCR = space->device().state().state_int(27);
2212   UINT32 FCR = space.device().state().state_int(27);
22132213   if( !(FCR&(1<<29)) ) // int 2 (irq 4)
22142214      return 1;
22152215   else
r17963r17964
22202220{
22212221   if(space.device().safe_pc() == 0x82de)
22222222   {
2223      if(irq_active(&space))
2223      if(irq_active(space))
22242224         space.device().execute().spin_until_interrupt();
22252225      else
22262226         space.device().execute().eat_cycles(50);
r17963r17964
22332233{
22342234   if(space.device().safe_pc() == 0x82de)
22352235   {
2236      if(irq_active(&space))
2236      if(irq_active(space))
22372237         space.device().execute().spin_until_interrupt();
22382238      else
22392239         space.device().execute().eat_cycles(50);
r17963r17964
22462246{
22472247   if(space.device().safe_pc() == 0xecc8)
22482248   {
2249      if(irq_active(&space))
2249      if(irq_active(space))
22502250         space.device().execute().spin_until_interrupt();
22512251      else
22522252         space.device().execute().eat_cycles(50);
r17963r17964
22592259{
22602260   if(space.device().safe_pc() == 0x75f7a)
22612261   {
2262      if(irq_active(&space))
2262      if(irq_active(space))
22632263         space.device().execute().spin_until_interrupt();
22642264      else
22652265         space.device().execute().eat_cycles(50);
r17963r17964
22722272{
22732273   if(space.device().safe_pc() == 0xaf18a )
22742274   {
2275      if(irq_active(&space))
2275      if(irq_active(space))
22762276         space.device().execute().spin_until_interrupt();
22772277      else
22782278         space.device().execute().eat_cycles(50);
r17963r17964
22852285{
22862286   if(space.device().safe_pc() == 0xaefac )
22872287   {
2288      if(irq_active(&space))
2288      if(irq_active(space))
22892289         space.device().execute().spin_until_interrupt();
22902290      else
22912291         space.device().execute().eat_cycles(50);
r17963r17964
22982298{
22992299   if(space.device().safe_pc() == 0xae6c0 )
23002300   {
2301      if(irq_active(&space))
2301      if(irq_active(space))
23022302         space.device().execute().spin_until_interrupt();
23032303      else
23042304         space.device().execute().eat_cycles(50);
r17963r17964
23112311{
23122312   if(space.device().safe_pc() == 0xae6d2 )
23132313   {
2314      if(irq_active(&space))
2314      if(irq_active(space))
23152315         space.device().execute().spin_until_interrupt();
23162316      else
23172317         space.device().execute().eat_cycles(50);
r17963r17964
23262326
23272327   if(pc == 0x10758)
23282328   {
2329      if(irq_active(&space))
2329      if(irq_active(space))
23302330         space.device().execute().spin_until_interrupt();
23312331      else
23322332         space.device().execute().eat_cycles(50);
r17963r17964
23412341
23422342   if(pc == 0x10758)
23432343   {
2344      if(irq_active(&space))
2344      if(irq_active(space))
23452345         space.device().execute().spin_until_interrupt();
23462346      else
23472347         space.device().execute().eat_cycles(50);
r17963r17964
23562356{
23572357   if(space.device().safe_pc() == 0x1c212)
23582358   {
2359      if(irq_active(&space))
2359      if(irq_active(space))
23602360         space.device().execute().spin_until_interrupt();
23612361      else
23622362         space.device().execute().eat_cycles(50);
r17963r17964
23702370   UINT32 pc = space.device().safe_pc();
23712371   if(pc == 0x469de || pc == 0x46a36)
23722372   {
2373//      if(irq_active(&space))
2373//      if(irq_active(space))
23742374//          space.device().execute().spin_until_interrupt();
23752375//      else
23762376         space.device().execute().eat_cycles(50);
r17963r17964
23842384{
23852385   if(space.device().safe_pc() == 0xaa622)
23862386   {
2387      if(irq_active(&space))
2387      if(irq_active(space))
23882388         space.device().execute().spin_until_interrupt();
23892389      else
23902390         space.device().execute().eat_cycles(50);
r17963r17964
24122412{
24132413   if(space.device().safe_pc() == 0x983c)
24142414   {
2415      if(irq_active(&space))
2415      if(irq_active(space))
24162416         space.device().execute().spin_until_interrupt();
24172417      else
24182418         space.device().execute().eat_cycles(50);
r17963r17964
24252425{
24262426   if(space.device().safe_pc() == 0x1710)
24272427   {
2428      if(irq_active(&space))
2428      if(irq_active(space))
24292429         space.device().execute().spin_until_interrupt();
24302430      else
24312431         space.device().execute().eat_cycles(50);
r17963r17964
24602460{
24612461   if(space.device().safe_pc() == 0x13198)
24622462   {
2463      if(irq_active(&space))
2463      if(irq_active(space))
24642464         space.device().execute().spin_until_interrupt();
24652465   }
24662466
trunk/src/mame/drivers/vegaeo.c
r17963r17964
127127
128128READ32_MEMBER(vegaeo_state::vegaeo_custom_read)
129129{
130   eolith_speedup_read(&space);
130   eolith_speedup_read(space);
131131   return ioport("SYSTEM")->read();
132132}
133133
trunk/src/mame/drivers/rallyx.c
r17963r17964
273273   switch (offset)
274274   {
275275      case 0x00:   /* SOUNDON */
276         timeplt_sh_irqtrigger_w(&space,0,bit);
276         timeplt_sh_irqtrigger_w(space,0,bit);
277277         break;
278278
279279      case 0x01:   /* INTST */
trunk/src/mame/drivers/mainevt.c
r17963r17964
126126   device_t *device = machine().device("k007232");
127127   int bank_A, bank_B;
128128
129//logerror("CPU #1 PC: %04x bank switch = %02x\n",space->device().safe_pc(),data);
129//logerror("CPU #1 PC: %04x bank switch = %02x\n",space.device().safe_pc(),data);
130130
131131   /* bits 0-3 select the 007232 banks */
132132   bank_A = (data & 0x3);
trunk/src/mame/drivers/toki.c
r17963r17964
860860
861861   /* Decrypt data for z80 program */
862862   {
863      address_space *space = machine().device("audiocpu")->memory().space(AS_PROGRAM);
863      address_space &space = *machine().device("audiocpu")->memory().space(AS_PROGRAM);
864864      UINT8 *decrypt = auto_alloc_array(machine(), UINT8, 0x20000);
865865      UINT8 *rom = machine().root_device().memregion("audiocpu")->base();
866866      int i;
867867
868868      memcpy(decrypt,rom,0x20000);
869869
870      space->set_decrypted_region(0x0000, 0x1fff, decrypt);
870      space.set_decrypted_region(0x0000, 0x1fff, decrypt);
871871
872872      for (i = 0;i < 0x2000;i++)
873873      {
trunk/src/mame/drivers/renegade.c
r17963r17964
316316
317317DRIVER_INIT_MEMBER(renegade_state,kuniokunb)
318318{
319   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
319   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
320320
321321   /* Remove the MCU handlers */
322   space->unmap_readwrite(0x3804, 0x3804);
323   space->unmap_read(0x3805, 0x3805);
322   space.unmap_readwrite(0x3804, 0x3804);
323   space.unmap_read(0x3805, 0x3805);
324324}
325325
326326
trunk/src/mame/drivers/vsnes.c
r17963r17964
153153{
154154   int source = ( data & 7 );
155155   ppu2c0x_device *ppu = machine().device<ppu2c0x_device>("ppu1");
156   ppu->spriteram_dma( &space, source );
156   ppu->spriteram_dma( space, source );
157157}
158158
159159WRITE8_MEMBER(vsnes_state::sprite_dma_1_w)
160160{
161161   int source = ( data & 7 );
162162   ppu2c0x_device *ppu = machine().device<ppu2c0x_device>("ppu2");
163   ppu->spriteram_dma( &space, source );
163   ppu->spriteram_dma( space, source );
164164}
165165
166166WRITE8_MEMBER(vsnes_state::vsnes_coin_counter_w)
trunk/src/mame/drivers/atarisy4.c
r17963r17964
804804      return in;
805805}
806806
807void load_ldafile(address_space *space, const UINT8 *file)
807void load_ldafile(address_space &space, const UINT8 *file)
808808{
809809#define READ_CHAR()      file[i++]
810810   int i = 0;
r17963r17964
847847      {
848848         UINT8 data = READ_CHAR();
849849         sum += data;
850         space->write_byte(addr++, data);
850         space.write_byte(addr++, data);
851851      } while (--len);
852852
853853      sum += READ_CHAR();
r17963r17964
858858}
859859
860860/* Load memory space with data from a Tektronix-Extended HEX file */
861void load_hexfile(address_space *space, const UINT8 *file)
861void load_hexfile(address_space &space, const UINT8 *file)
862862{
863863#define READ_HEX_CHAR()      hex_to_ascii(file[i++])
864864
r17963r17964
942942         sum += data & 0xf;
943943
944944         if (record == 6)
945            space->write_byte(addr++, data);
945            space.write_byte(addr++, data);
946946
947947         len -= 2;
948948      }
r17963r17964
963963
964964DRIVER_INIT_MEMBER(atarisy4_state,laststar)
965965{
966   address_space *main = machine().device("maincpu")->memory().space(AS_PROGRAM);
966   address_space &main = *machine().device("maincpu")->memory().space(AS_PROGRAM);
967967
968968   /* Allocate 16kB of shared RAM */
969969   m_shared_ram[0] = auto_alloc_array_clear(machine(), UINT16, 0x2000);
r17963r17964
975975   /* Set up the DSP */
976976   membank("dsp0_bank0")->set_base(m_shared_ram[0]);
977977   membank("dsp0_bank1")->set_base(&m_shared_ram[0][0x800]);
978   load_ldafile(machine().device("dsp0")->memory().space(AS_PROGRAM), memregion("dsp")->base());
978   load_ldafile(*machine().device("dsp0")->memory().space(AS_PROGRAM), memregion("dsp")->base());
979979}
980980
981981DRIVER_INIT_MEMBER(atarisy4_state,airrace)
r17963r17964
985985   m_shared_ram[1] = auto_alloc_array_clear(machine(), UINT16, 0x4000);
986986
987987   /* Populate RAM with data from the HEX files */
988   load_hexfile(machine().device("maincpu")->memory().space(AS_PROGRAM), memregion("code")->base());
988   load_hexfile(*machine().device("maincpu")->memory().space(AS_PROGRAM), memregion("code")->base());
989989
990990   /* Set up the first DSP */
991991   membank("dsp0_bank0")->set_base(m_shared_ram[0]);
992992   membank("dsp0_bank1")->set_base(&m_shared_ram[0][0x800]);
993   load_ldafile(machine().device("dsp0")->memory().space(AS_PROGRAM), memregion("dsp")->base());
993   load_ldafile(*machine().device("dsp0")->memory().space(AS_PROGRAM), memregion("dsp")->base());
994994
995995   /* Set up the second DSP */
996996   membank("dsp1_bank0")->set_base(m_shared_ram[1]);
997997   membank("dsp1_bank1")->set_base(&m_shared_ram[1][0x800]);
998   load_ldafile(machine().device("dsp1")->memory().space(AS_PROGRAM), memregion("dsp")->base());
998   load_ldafile(*machine().device("dsp1")->memory().space(AS_PROGRAM), memregion("dsp")->base());
999999}
10001000
10011001void atarisy4_state::machine_reset()
trunk/src/mame/drivers/missile.c
r17963r17964
517517   m_flipscreen = 0;
518518
519519   /* set up an opcode base handler since we use mapped handlers for RAM */
520   address_space *space = m_maincpu->space(AS_PROGRAM);
521   space->set_direct_update_handler(direct_update_delegate(FUNC(missile_state::missile_direct_handler), this));
520   address_space &space = *m_maincpu->space(AS_PROGRAM);
521   space.set_direct_update_handler(direct_update_delegate(FUNC(missile_state::missile_direct_handler), this));
522522
523523   /* create a timer to speed/slow the CPU */
524524   m_cpu_timer = machine().scheduler().timer_alloc(FUNC(adjust_cpu_speed));
r17963r17964
552552 *
553553 *************************************/
554554
555INLINE int get_madsel(address_space *space)
555INLINE int get_madsel(address_space &space)
556556{
557   missile_state *state = space->machine().driver_data<missile_state>();
558   UINT16 pc = space->device().safe_pcbase();
557   missile_state *state = space.machine().driver_data<missile_state>();
558   UINT16 pc = space.device().safe_pcbase();
559559
560560   /* if we're at a different instruction than last time, reset our delay counter */
561561   if (pc != state->m_madsel_lastpc)
r17963r17964
564564   /* MADSEL signal disables standard address decoding and routes
565565        writes to video RAM; it is enabled if the IRQ signal is clear
566566        and the low 5 bits of the fetched opcode are 0x01 */
567   if (!state->m_irq_state && (space->direct().read_decrypted_byte(pc) & 0x1f) == 0x01)
567   if (!state->m_irq_state && (space.direct().read_decrypted_byte(pc) & 0x1f) == 0x01)
568568   {
569569      /* the MADSEL signal goes high 5 cycles after the opcode is identified;
570570            this effectively skips the indirect memory read. Since this is difficult
r17963r17964
590590}
591591
592592
593static void write_vram(address_space *space, offs_t address, UINT8 data)
593static void write_vram(address_space &space, offs_t address, UINT8 data)
594594{
595   missile_state *state = space->machine().driver_data<missile_state>();
595   missile_state *state = space.machine().driver_data<missile_state>();
596596   UINT8 *videoram = state->m_videoram;
597597   static const UINT8 data_lookup[4] = { 0x00, 0x0f, 0xf0, 0xff };
598598   offs_t vramaddr;
r17963r17964
617617      videoram[vramaddr] = (videoram[vramaddr] & vrammask) | (vramdata & ~vrammask);
618618
619619      /* account for the extra clock cycle */
620      space->device().execute().adjust_icount(-1);
620      space.device().execute().adjust_icount(-1);
621621   }
622622}
623623
624624
625static UINT8 read_vram(address_space *space, offs_t address)
625static UINT8 read_vram(address_space &space, offs_t address)
626626{
627   missile_state *state = space->machine().driver_data<missile_state>();
627   missile_state *state = space.machine().driver_data<missile_state>();
628628   UINT8 *videoram = state->m_videoram;
629629   offs_t vramaddr;
630630   UINT8 vramdata;
r17963r17964
653653         result &= ~0x20;
654654
655655      /* account for the extra clock cycle */
656      space->device().execute().adjust_icount(-1);
656      space.device().execute().adjust_icount(-1);
657657   }
658658   return result;
659659}
r17963r17964
714714   UINT8 *videoram = m_videoram;
715715
716716   /* if we're in MADSEL mode, write to video RAM */
717   if (get_madsel(&space))
717   if (get_madsel(space))
718718   {
719      write_vram(&space, offset, data);
719      write_vram(space, offset, data);
720720      return;
721721   }
722722
r17963r17964
776776   UINT8 result = 0xff;
777777
778778   /* if we're in MADSEL mode, read from video RAM */
779   if (get_madsel(&space))
780      return read_vram(&space, offset);
779   if (get_madsel(space))
780      return read_vram(space, offset);
781781
782782   /* otherwise, strip A15 and handle manually */
783783   offset &= 0x7fff;
trunk/src/mame/drivers/jack.c
r17963r17964
12901290static void treahunt_decode( running_machine &machine )
12911291{
12921292   int A;
1293   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1293   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
12941294   UINT8 *rom = machine.root_device().memregion("maincpu")->base();
12951295   UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x4000);
12961296   int data;
12971297
1298   space->set_decrypted_region(0x0000, 0x3fff, decrypt);
1298   space.set_decrypted_region(0x0000, 0x3fff, decrypt);
12991299
13001300   /* Thanks to Mike Balfour for helping out with the decryption */
13011301   for (A = 0; A < 0x4000; A++)
trunk/src/mame/drivers/galivan.c
r17963r17964
9292WRITE8_MEMBER(galivan_state::blit_trigger_w)
9393{
9494
95   nb_1414m4_exec(&space,(m_videoram[0] << 8) | (m_videoram[1] & 0xff),m_videoram,m_scrollx,m_scrolly,m_tx_tilemap);
95   nb_1414m4_exec(space,(m_videoram[0] << 8) | (m_videoram[1] & 0xff),m_videoram,m_scrollx,m_scrolly,m_tx_tilemap);
9696}
9797
9898static ADDRESS_MAP_START( ninjemak_io_map, AS_IO, 8, galivan_state )
trunk/src/mame/drivers/subsino2.c
r17963r17964
210210}
211211
212212
213INLINE void ss9601_videoram_w(layer_t *l, vram_t vram, address_space *space, offs_t offset, UINT8 data)
213INLINE void ss9601_videoram_w(layer_t *l, vram_t vram, address_space &space, offs_t offset, UINT8 data)
214214{
215215   l->videorams[vram][offset] = data;
216216
r17963r17964
239239// Layer 0
240240WRITE8_MEMBER(subsino2_state::ss9601_videoram_0_hi_w)
241241{
242   ss9601_videoram_w(&m_layers[0], VRAM_HI, &space, offset, data);
242   ss9601_videoram_w(&m_layers[0], VRAM_HI, space, offset, data);
243243}
244244
245245WRITE8_MEMBER(subsino2_state::ss9601_videoram_0_lo_w)
246246{
247   ss9601_videoram_w(&m_layers[0], VRAM_LO, &space, offset, data);
247   ss9601_videoram_w(&m_layers[0], VRAM_LO, space, offset, data);
248248}
249249
250250WRITE8_MEMBER(subsino2_state::ss9601_videoram_0_hi_lo_w)
251251{
252   ss9601_videoram_w(&m_layers[0], VRAM_HI, &space, offset, data);
253   ss9601_videoram_w(&m_layers[0], VRAM_LO, &space, offset, m_ss9601_byte_lo);
252   ss9601_videoram_w(&m_layers[0], VRAM_HI, space, offset, data);
253   ss9601_videoram_w(&m_layers[0], VRAM_LO, space, offset, m_ss9601_byte_lo);
254254}
255255
256256WRITE8_MEMBER(subsino2_state::ss9601_videoram_0_hi_lo2_w)
257257{
258   ss9601_videoram_w(&m_layers[0], VRAM_HI, &space, offset, data);
259   ss9601_videoram_w(&m_layers[0], VRAM_LO, &space, offset, m_ss9601_byte_lo2);
258   ss9601_videoram_w(&m_layers[0], VRAM_HI, space, offset, data);
259   ss9601_videoram_w(&m_layers[0], VRAM_LO, space, offset, m_ss9601_byte_lo2);
260260}
261261
262262READ8_MEMBER(subsino2_state::ss9601_videoram_0_hi_r)
r17963r17964
272272// Layer 1
273273WRITE8_MEMBER(subsino2_state::ss9601_videoram_1_hi_w)
274274{
275   ss9601_videoram_w(&m_layers[1], VRAM_HI, &space, offset, data);
275   ss9601_videoram_w(&m_layers[1], VRAM_HI, space, offset, data);
276276}
277277
278278WRITE8_MEMBER(subsino2_state::ss9601_videoram_1_lo_w)
279279{
280   ss9601_videoram_w(&m_layers[1], VRAM_LO, &space, offset, data);
280   ss9601_videoram_w(&m_layers[1], VRAM_LO, space, offset, data);
281281}
282282
283283WRITE8_MEMBER(subsino2_state::ss9601_videoram_1_hi_lo_w)
284284{
285   ss9601_videoram_w(&m_layers[1], VRAM_HI, &space, offset, data);
286   ss9601_videoram_w(&m_layers[1], VRAM_LO, &space, offset, m_ss9601_byte_lo);
285   ss9601_videoram_w(&m_layers[1], VRAM_HI, space, offset, data);
286   ss9601_videoram_w(&m_layers[1], VRAM_LO, space, offset, m_ss9601_byte_lo);
287287}
288288
289289WRITE8_MEMBER(subsino2_state::ss9601_videoram_1_hi_lo2_w)
290290{
291   ss9601_videoram_w(&m_layers[1], VRAM_HI, &space, offset, data);
292   ss9601_videoram_w(&m_layers[1], VRAM_LO, &space, offset, m_ss9601_byte_lo2);
291   ss9601_videoram_w(&m_layers[1], VRAM_HI, space, offset, data);
292   ss9601_videoram_w(&m_layers[1], VRAM_LO, space, offset, m_ss9601_byte_lo2);
293293}
294294
295295READ8_MEMBER(subsino2_state::ss9601_videoram_1_hi_r)
r17963r17964
10841084   vram_t vram = (m_ss9601_byte_lo & 0x08) ? VRAM_HI : VRAM_LO;
10851085   switch (m_ss9601_byte_lo & (~0x08))
10861086   {
1087      case 0x00:   ss9601_videoram_w(&m_layers[1], vram, &space, offset,        data);
1088               ss9601_videoram_w(&m_layers[1], vram, &space, offset+0x1000, data);   break;
1087      case 0x00:   ss9601_videoram_w(&m_layers[1], vram, space, offset,        data);
1088               ss9601_videoram_w(&m_layers[1], vram, space, offset+0x1000, data);   break;
10891089
1090      case 0x04:   ss9601_videoram_w(&m_layers[0], vram, &space, offset,        data);
1091               ss9601_videoram_w(&m_layers[0], vram, &space, offset+0x1000, data);   break;
1090      case 0x04:   ss9601_videoram_w(&m_layers[0], vram, space, offset,        data);
1091               ss9601_videoram_w(&m_layers[0], vram, space, offset+0x1000, data);   break;
10921092
10931093      case 0x06:   m_ss9601_reelrams[vram][offset] = data;   break;
10941094   }
trunk/src/mame/drivers/megaplay.c
r17963r17964
376376
377377static READ8_HANDLER( megaplay_bios_banksel_r )
378378{
379   mplay_state *state = space->machine().driver_data<mplay_state>();
379   mplay_state *state = space.machine().driver_data<mplay_state>();
380380   return state->m_bios_bank;
381381}
382382
r17963r17964
387387    It should be possible to multiplex different game ROMs at
388388    0x000000-0x3fffff based on these bits.
389389*/
390   mplay_state *state = space->machine().driver_data<mplay_state>();
390   mplay_state *state = space.machine().driver_data<mplay_state>();
391391   state->m_bios_bank = data;
392392   state->m_bios_mode = MP_ROM;
393393//  logerror("BIOS: ROM bank %i selected [0x%02x]\n",bios_bank >> 6, data);
r17963r17964
395395
396396static READ8_HANDLER( megaplay_bios_gamesel_r )
397397{
398   mplay_state *state = space->machine().driver_data<mplay_state>();
398   mplay_state *state = space.machine().driver_data<mplay_state>();
399399   return state->m_bios_6403;
400400}
401401
402402static WRITE8_HANDLER( megaplay_bios_gamesel_w )
403403{
404   mplay_state *state = space->machine().driver_data<mplay_state>();
404   mplay_state *state = space.machine().driver_data<mplay_state>();
405405   state->m_bios_6403 = data;
406406
407407//  logerror("BIOS: 0x6403 write: 0x%02x\n",data);
r17963r17964
426426
427427static READ8_HANDLER( bank_r )
428428{
429   mplay_state *state = space->machine().driver_data<mplay_state>();
429   mplay_state *state = space.machine().driver_data<mplay_state>();
430430   UINT8* bank = state->memregion("mtbios")->base();
431431   UINT32 fulladdress = state->m_mp_bios_bank_addr + offset;
432432
r17963r17964
450450      }
451451      else
452452      {
453         return space->machine().root_device().memregion("maincpu")->base()[fulladdress ^ 1];
453         return space.machine().root_device().memregion("maincpu")->base()[fulladdress ^ 1];
454454      }
455455   }
456456   else if (fulladdress >= 0xa10000 && fulladdress <= 0xa1001f) // IO Acess
r17963r17964
467467
468468static WRITE8_HANDLER( bank_w )
469469{
470   mplay_state *state = space->machine().driver_data<mplay_state>();
470   mplay_state *state = space.machine().driver_data<mplay_state>();
471471   UINT32 fulladdress = state->m_mp_bios_bank_addr + offset;
472472
473473   if ((fulladdress >= 0x000000) && (fulladdress <= 0x3fffff)) // ROM / Megaplay Custom Addresses
r17963r17964
516516
517517static WRITE8_HANDLER( megaplay_bios_width_w )
518518{
519   mplay_state *state = space->machine().driver_data<mplay_state>();
519   mplay_state *state = space.machine().driver_data<mplay_state>();
520520   state->m_bios_width = data;
521521   megadrive_io_data_regs[2] = (megadrive_io_data_regs[2] & 0x07) | ((data & 0xf8));
522522//  logerror("BIOS: 0x6204 - Width write: %02x\n", data);
r17963r17964
524524
525525static READ8_HANDLER( megaplay_bios_6404_r )
526526{
527   mplay_state *state = space->machine().driver_data<mplay_state>();
527   mplay_state *state = space.machine().driver_data<mplay_state>();
528528//  logerror("BIOS: 0x6404 read: returned 0x%02x\n",bios_6404 | (bios_6403 & 0x10) >> 4);
529529   return (state->m_bios_6404 & 0xfe) | ((state->m_bios_6403 & 0x10) >> 4);
530530//  return state->m_bios_6404 | (state->m_bios_6403 & 0x10) >> 4;
r17963r17964
532532
533533static WRITE8_HANDLER( megaplay_bios_6404_w )
534534{
535   mplay_state *state = space->machine().driver_data<mplay_state>();
535   mplay_state *state = space.machine().driver_data<mplay_state>();
536536   if(((state->m_bios_6404 & 0x0c) == 0x00) && ((data & 0x0c) == 0x0c))
537      space->machine().device("maincpu")->execute().set_input_line(INPUT_LINE_RESET, PULSE_LINE);
537      space.machine().device("maincpu")->execute().set_input_line(INPUT_LINE_RESET, PULSE_LINE);
538538   state->m_bios_6404 = data;
539539
540540//  logerror("BIOS: 0x6404 write: 0x%02x\n", data);
r17963r17964
548548    function to make the BIOS check all 4 slots (3 and 4 will be "not used")
549549        return (state->m_bios_6600 & 0xfe) | (state->m_bios_bank & 0x01);
550550*/
551   mplay_state *state = space->machine().driver_data<mplay_state>();
551   mplay_state *state = space.machine().driver_data<mplay_state>();
552552   return state->m_bios_6600;// & 0xfe;
553553}
554554
555555static WRITE8_HANDLER( megaplay_bios_6600_w )
556556{
557   mplay_state *state = space->machine().driver_data<mplay_state>();
557   mplay_state *state = space.machine().driver_data<mplay_state>();
558558   state->m_bios_6600 = data;
559559//  logerror("BIOS: 0x6600 write: 0x%02x\n",data);
560560}
561561
562562static WRITE8_HANDLER( megaplay_game_w )
563563{
564   mplay_state *state = space->machine().driver_data<mplay_state>();
564   mplay_state *state = space.machine().driver_data<mplay_state>();
565565   if (state->m_readpos == 1)
566566      state->m_game_banksel = 0;
567567   state->m_game_banksel |= (1 << (state->m_readpos - 1)) * (data & 0x01);
r17963r17964
573573      state->m_bios_mode = MP_GAME;
574574      state->m_readpos = 1;
575575//      popmessage("Game bank selected: 0x%03x", state->m_game_banksel);
576      logerror("BIOS [0x%04x]: 68K address space bank selected: 0x%03x\n", space->device().safe_pcbase(), state->m_game_banksel);
576      logerror("BIOS [0x%04x]: 68K address space bank selected: 0x%03x\n", space.device().safe_pcbase(), state->m_game_banksel);
577577   }
578578
579579   state->m_mp_bios_bank_addr = ((state->m_mp_bios_bank_addr >> 1) | (data << 23)) & 0xff8000;
r17963r17964
847847
848848static READ16_HANDLER( megadriv_68k_read_z80_extra_ram )
849849{
850   mplay_state *state = space->machine().driver_data<mplay_state>();
850   mplay_state *state = space.machine().driver_data<mplay_state>();
851851   return state->m_ic36_ram[(offset << 1) ^ 1] | (state->m_ic36_ram[(offset << 1)] << 8);
852852}
853853
854854static WRITE16_HANDLER( megadriv_68k_write_z80_extra_ram )
855855{
856   mplay_state *state = space->machine().driver_data<mplay_state>();
856   mplay_state *state = space.machine().driver_data<mplay_state>();
857857   if (!ACCESSING_BITS_0_7) // byte (MSB) access
858858   {
859859      state->m_ic36_ram[(offset << 1)] = (data & 0xff00) >> 8;
trunk/src/mame/drivers/sothello.c
r17963r17964
206206
207207/* sub 6809 */
208208
209static void unlock_shared_ram(address_space *space)
209static void unlock_shared_ram(address_space &space)
210210{
211   sothello_state *state = space->machine().driver_data<sothello_state>();
212    if(!space->machine().device<cpu_device>("sub")->suspended(SUSPEND_REASON_HALT))
211   sothello_state *state = space.machine().driver_data<sothello_state>();
212    if(!space.machine().device<cpu_device>("sub")->suspended(SUSPEND_REASON_HALT))
213213    {
214214        state->m_subcpu_status|=1;
215215    }
216216    else
217217    {
218        logerror("Sub cpu active! @%x\n",space->device().safe_pc());
218        logerror("Sub cpu active! @%x\n",space.device().safe_pc());
219219    }
220220}
221221
222222WRITE8_MEMBER(sothello_state::subcpu_status_w)
223223{
224    unlock_shared_ram(&space);
224    unlock_shared_ram(space);
225225}
226226
227227READ8_MEMBER(sothello_state::subcpu_status_r)
228228{
229    unlock_shared_ram(&space);
229    unlock_shared_ram(space);
230230    return 0;
231231}
232232
trunk/src/mame/drivers/kchamp.c
r17963r17964
713713
714714static UINT8 *decrypt_code(running_machine &machine)
715715{
716   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
716   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
717717   UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x10000);
718718   UINT8 *rom = machine.root_device().memregion("maincpu")->base();
719719   int A;
720720
721   space->set_decrypted_region(0x0000, 0xffff, decrypted);
721   space.set_decrypted_region(0x0000, 0xffff, decrypted);
722722
723723   for (A = 0; A < 0x10000; A++)
724724      decrypted[A] = (rom[A] & 0x55) | ((rom[A] & 0x88) >> 2) | ((rom[A] & 0x22) << 2);
trunk/src/mame/drivers/r2dx_v33.c
r17963r17964
231231   {
232232      static UINT32 src_addr = 0x100000;
233233      static int frame;
234      address_space *space = screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
234      address_space &space = *screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
235235
236236      //if(screen.machine().input().code_pressed_once(KEYCODE_A))
237237      //  src_addr+=0x800;
r17963r17964
247247      if(frame == 5)
248248      {
249249         int i,data;
250         static UINT8 *rom = space->machine().root_device().memregion("mainprg")->base();
250         static UINT8 *rom = space.machine().root_device().memregion("mainprg")->base();
251251
252252         for(i=0;i<0x800;i+=2)
253253         {
254254            data = rom[src_addr+i+0];
255            space->write_byte(i+0xd000+0, data);
255            space.write_byte(i+0xd000+0, data);
256256            data = rom[src_addr+i+1];
257            space->write_byte(i+0xd000+1, data);
257            space.write_byte(i+0xd000+1, data);
258258         }
259259
260260         popmessage("%08x 1",src_addr);
r17963r17964
440440{
441441   switch(offset+0x780)
442442   {
443      case (0x788/2):   return seibu_main_word_r(&space,2,0xffff);
444      case (0x78c/2):   return seibu_main_word_r(&space,3,0xffff);
445      case (0x794/2): return seibu_main_word_r(&space,5,0xffff);
443      case (0x788/2):   return seibu_main_word_r(space,2,0xffff);
444      case (0x78c/2):   return seibu_main_word_r(space,3,0xffff);
445      case (0x794/2): return seibu_main_word_r(space,5,0xffff);
446446   }
447447
448448   return 0xffff;
r17963r17964
453453{
454454   switch(offset+0x780)
455455   {
456      case (0x780/2): { seibu_main_word_w(&space,0,data,0x00ff); break; }
457      case (0x784/2): { seibu_main_word_w(&space,1,data,0x00ff); break; }
458      //case (0x790/2): { seibu_main_word_w(&space,4,data,0x00ff); break; }
459      case (0x794/2): { seibu_main_word_w(&space,4,data,0x00ff); break; }
460      case (0x798/2): { seibu_main_word_w(&space,6,data,0x00ff); break; }
456      case (0x780/2): { seibu_main_word_w(space,0,data,0x00ff); break; }
457      case (0x784/2): { seibu_main_word_w(space,1,data,0x00ff); break; }
458      //case (0x790/2): { seibu_main_word_w(space,4,data,0x00ff); break; }
459      case (0x794/2): { seibu_main_word_w(space,4,data,0x00ff); break; }
460      case (0x798/2): { seibu_main_word_w(space,6,data,0x00ff); break; }
461461   }
462462}
463463
trunk/src/mame/drivers/superqix.c
r17963r17964
172172
173173READ8_MEMBER(superqix_state::in4_mcu_r)
174174{
175//  logerror("%04x: in4_mcu_r\n",space->device().safe_pc());
175//  logerror("%04x: in4_mcu_r\n",space.device().safe_pc());
176176   return ioport("P2")->read() | (m_from_mcu_pending << 6) | (m_from_z80_pending << 7);
177177}
178178
179179READ8_MEMBER(superqix_state::sqix_from_mcu_r)
180180{
181//  logerror("%04x: read mcu answer (%02x)\n",space->device().safe_pc(),m_from_mcu);
181//  logerror("%04x: read mcu answer (%02x)\n",space.device().safe_pc(),m_from_mcu);
182182   return m_from_mcu;
183183}
184184
r17963r17964
198198
199199WRITE8_MEMBER(superqix_state::sqix_z80_mcu_w)
200200{
201//  logerror("%04x: sqix_z80_mcu_w %02x\n",space->device().safe_pc(),data);
201//  logerror("%04x: sqix_z80_mcu_w %02x\n",space.device().safe_pc(),data);
202202   m_portb = data;
203203}
204204
r17963r17964
473473
474474READ8_MEMBER(superqix_state::hotsmash_ay_port_a_r)
475475{
476//  logerror("%04x: ay_port_a_r and mcu_pending is %d\n",space->device().safe_pc(),m_from_mcu_pending);
476//  logerror("%04x: ay_port_a_r and mcu_pending is %d\n",space.device().safe_pc(),m_from_mcu_pending);
477477   return ioport("SYSTEM")->read() | 0x40 | ((m_from_mcu_pending^1) << 7);
478478}
479479
r17963r17964
515515
516516READ8_MEMBER(superqix_state::pbillian_ay_port_a_r)
517517{
518//  logerror("%04x: ay_port_a_r\n",space->device().safe_pc());
518//  logerror("%04x: ay_port_a_r\n",space.device().safe_pc());
519519   /* bits 76------  MCU status bits */
520520   return (machine().rand() & 0xc0) | machine().root_device().ioport("BUTTONS")->read();
521521}
trunk/src/mame/drivers/vega.c
r17963r17964
297297      {
298298         /* AY 3-8910 */
299299         ay8910_data_w(m_ay8910, space, 0, offset);
300         return 0xff;//mame_rand(space->machine);
300         return 0xff;//mame_rand(space.machine);
301301
302302      }
303303      break;
trunk/src/mame/drivers/bfm_sc4h.c
r17963r17964
344344                     break;
345345
346346                  case 0x1330:
347                     bfm_sc4_reel4_w(&space,0,data&0xf);
347                     bfm_sc4_reel4_w(space,0,data&0xf);
348348                     //m_meterstatus = (m_meterstatus&0x3f) | ((data & 0x30) << 2);
349349                     sec.write_data_line(~data&0x10);
350350                     break;
r17963r17964
504504}
505505
506506
507void bfm_sc4_68307_porta_w(address_space *space, bool dedicated, UINT8 data, UINT8 line_mask)
507void bfm_sc4_68307_porta_w(address_space &space, bool dedicated, UINT8 data, UINT8 line_mask)
508508{
509   sc4_state *state = space->machine().driver_data<sc4_state>();
509   sc4_state *state = space.machine().driver_data<sc4_state>();
510510
511511   state->m_reel12_latch = data;
512512
r17963r17964
524524
525525static WRITE8_HANDLER( bfm_sc4_reel3_w )
526526{
527   sc4_state *state = space->machine().driver_data<sc4_state>();
527   sc4_state *state = space.machine().driver_data<sc4_state>();
528528
529529   state->m_reel3_latch = data;
530530
r17963r17964
538538
539539static WRITE8_HANDLER( bfm_sc4_reel4_w )
540540{
541   sc4_state *state = space->machine().driver_data<sc4_state>();
541   sc4_state *state = space.machine().driver_data<sc4_state>();
542542
543543   state->m_reel4_latch = data;
544544
r17963r17964
550550   awp_draw_reel(3);
551551}
552552
553void bfm_sc4_68307_portb_w(address_space *space, bool dedicated, UINT16 data, UINT16 line_mask)
553void bfm_sc4_68307_portb_w(address_space &space, bool dedicated, UINT16 data, UINT16 line_mask)
554554{
555555//  if (dedicated == false)
556556   {
557      int pc = space->device().safe_pc();
558      //m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
557      int pc = space.device().safe_pc();
558      //m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
559559      // serial output to the VFD at least..
560560      logerror("%08x bfm_sc4_68307_portb_w %04x %04x\n", pc, data, line_mask);
561561
562      bfm_sc4_write_serial_vfd(space->machine(), (data & 0x4000)?1:0, (data & 0x1000)?1:0, !(data & 0x2000)?1:0);
562      bfm_sc4_write_serial_vfd(space.machine(), (data & 0x4000)?1:0, (data & 0x1000)?1:0, !(data & 0x2000)?1:0);
563563
564564      bfm_sc4_reel3_w(space, 0, (data&0x0f00)>>8);
565565   }
566566
567567}
568UINT8 bfm_sc4_68307_porta_r(address_space *space, bool dedicated, UINT8 line_mask)
568UINT8 bfm_sc4_68307_porta_r(address_space &space, bool dedicated, UINT8 line_mask)
569569{
570   int pc = space->device().safe_pc();
570   int pc = space.device().safe_pc();
571571   logerror("%08x bfm_sc4_68307_porta_r\n", pc);
572   return space->machine().rand();
572   return space.machine().rand();
573573}
574574
575UINT16 bfm_sc4_68307_portb_r(address_space *space, bool dedicated, UINT16 line_mask)
575UINT16 bfm_sc4_68307_portb_r(address_space &space, bool dedicated, UINT16 line_mask)
576576{
577577   if (dedicated==false)
578578   {
trunk/src/mame/drivers/tigeroad.c
r17963r17964
79790x0003, 0x0080, 0x0006, 0x0060, 0x0000, 0x00e0, 0x000a, 0x00c0, 0x0003, 0x0080, 0x0006, 0x0060, 0x0000, 0x00e0, 0x000a, 0x00c0,
80800x0003, 0x0080, 0x0006, 0x0060, 0x0000, 0x00e0, 0x000a, 0x00c0, 0x0003, 0x0080, 0x0006, 0x0060, 0x0000, 0x00e0, 0x000a, 0x00c0 };
8181
82static void f1dream_protection_w(address_space *space)
82static void f1dream_protection_w(address_space &space)
8383{
84   tigeroad_state *state = space->machine().driver_data<tigeroad_state>();
84   tigeroad_state *state = space.machine().driver_data<tigeroad_state>();
8585   int indx;
8686   int value = 255;
87   int prevpc = space->device().safe_pcbase();
87   int prevpc = space.device().safe_pcbase();
8888
8989   if (prevpc == 0x244c)
9090   {
r17963r17964
139139   else if ((prevpc == 0x27f8) || (prevpc == 0x511a) || (prevpc == 0x5142) || (prevpc == 0x516a))
140140   {
141141      /* The main CPU stuffs the byte for the soundlatch into 0xfffffd.*/
142      state->soundlatch_byte_w(*space,2,state->m_ram16[0x3ffc/2]);
142      state->soundlatch_byte_w(space,2,state->m_ram16[0x3ffc/2]);
143143   }
144144}
145145
146146WRITE16_MEMBER(tigeroad_state::f1dream_control_w)
147147{
148148   logerror("protection write, PC: %04x  FFE1 Value:%01x\n",space.device().safe_pc(), m_ram16[0x3fe0/2]);
149   f1dream_protection_w(&space);
149   f1dream_protection_w(space);
150150}
151151
152152WRITE16_MEMBER(tigeroad_state::tigeroad_soundcmd_w)
trunk/src/mame/drivers/segas32.c
r17963r17964
446446}
447447
448448
449static void int_control_w(address_space *space, int offset, UINT8 data)
449static void int_control_w(address_space &space, int offset, UINT8 data)
450450{
451   segas32_state *state = space->machine().driver_data<segas32_state>();
451   segas32_state *state = space.machine().driver_data<segas32_state>();
452452   int duration;
453453
454//  logerror("%06X:int_control_w(%X) = %02X\n", space->device().safe_pc(), offset, data);
454//  logerror("%06X:int_control_w(%X) = %02X\n", space.device().safe_pc(), offset, data);
455455   switch (offset)
456456   {
457457      case 0:
r17963r17964
468468
469469      case 6:         /* mask */
470470         state->m_v60_irq_control[offset] = data;
471         update_irq_state(space->machine());
471         update_irq_state(space.machine());
472472         break;
473473
474474      case 7:         /* acknowledge */
475475         state->m_v60_irq_control[offset] &= data;
476         update_irq_state(space->machine());
476         update_irq_state(space.machine());
477477         break;
478478
479479      case 8:
r17963r17964
502502      case 13:
503503      case 14:
504504      case 15:      /* signal IRQ to sound CPU */
505         signal_sound_irq(space->machine(), SOUND_IRQ_V60);
505         signal_sound_irq(space.machine(), SOUND_IRQ_V60);
506506         break;
507507   }
508508}
r17963r17964
529529WRITE16_MEMBER(segas32_state::interrupt_control_16_w)
530530{
531531   if (ACCESSING_BITS_0_7)
532      int_control_w(&space, offset*2+0, data);
532      int_control_w(space, offset*2+0, data);
533533   if (ACCESSING_BITS_8_15)
534      int_control_w(&space, offset*2+1, data >> 8);
534      int_control_w(space, offset*2+1, data >> 8);
535535}
536536
537537
r17963r17964
552552WRITE32_MEMBER(segas32_state::interrupt_control_32_w)
553553{
554554   if (ACCESSING_BITS_0_7)
555      int_control_w(&space, offset*4+0, data);
555      int_control_w(space, offset*4+0, data);
556556   if (ACCESSING_BITS_8_15)
557      int_control_w(&space, offset*4+1, data >> 8);
557      int_control_w(space, offset*4+1, data >> 8);
558558   if (ACCESSING_BITS_16_23)
559      int_control_w(&space, offset*4+2, data >> 16);
559      int_control_w(space, offset*4+2, data >> 16);
560560   if (ACCESSING_BITS_24_31)
561      int_control_w(&space, offset*4+3, data >> 24);
561      int_control_w(space, offset*4+3, data >> 24);
562562}
563563
564564
r17963r17964
587587 *
588588 *************************************/
589589
590static UINT16 common_io_chip_r(address_space *space, int which, offs_t offset, UINT16 mem_mask)
590static UINT16 common_io_chip_r(address_space &space, int which, offs_t offset, UINT16 mem_mask)
591591{
592   segas32_state *state = space->machine().driver_data<segas32_state>();
592   segas32_state *state = space.machine().driver_data<segas32_state>();
593593   static const char *const portnames[2][8] =
594594         {
595595            { "P1_A", "P2_A", "PORTC_A", "PORTD_A", "SERVICE12_A", "SERVICE34_A", "PORTG_A", "PORTH_A" },
r17963r17964
639639}
640640
641641
642static void common_io_chip_w(address_space *space, int which, offs_t offset, UINT16 data, UINT16 mem_mask)
642static void common_io_chip_w(address_space &space, int which, offs_t offset, UINT16 data, UINT16 mem_mask)
643643{
644   segas32_state *state = space->machine().driver_data<segas32_state>();
644   segas32_state *state = space.machine().driver_data<segas32_state>();
645645//  UINT8 old;
646646
647647   /* only LSB matters */
r17963r17964
673673
674674         if (which == 0)
675675         {
676            eeprom_device *eeprom = space->machine().device<eeprom_device>("eeprom");
676            eeprom_device *eeprom = space.machine().device<eeprom_device>("eeprom");
677677            eeprom->write_bit(data & 0x80);
678678            eeprom->set_cs_line((data & 0x20) ? CLEAR_LINE : ASSERT_LINE);
679679            eeprom->set_clock_line((data & 0x40) ? ASSERT_LINE : CLEAR_LINE);
680680         }
681/*            coin_lockout_w(space->machine(), 1 + 2*which, data & 0x08);
682            coin_lockout_w(space->machine(), 0 + 2*which, data & 0x04);*/
683         coin_counter_w(space->machine(), 1 + 2*which, data & 0x02);
684         coin_counter_w(space->machine(), 0 + 2*which, data & 0x01);
681/*            coin_lockout_w(space.machine(), 1 + 2*which, data & 0x08);
682            coin_lockout_w(space.machine(), 0 + 2*which, data & 0x04);*/
683         coin_counter_w(space.machine(), 1 + 2*which, data & 0x02);
684         coin_counter_w(space.machine(), 0 + 2*which, data & 0x01);
685685         break;
686686
687687      /* tile banking */
r17963r17964
691691         else
692692         {
693693            /* multi-32 EEPROM access */
694            eeprom_device *eeprom = space->machine().device<eeprom_device>("eeprom");
694            eeprom_device *eeprom = space.machine().device<eeprom_device>("eeprom");
695695            eeprom->write_bit(data & 0x80);
696696            eeprom->set_cs_line((data & 0x20) ? CLEAR_LINE : ASSERT_LINE);
697697            eeprom->set_clock_line((data & 0x40) ? ASSERT_LINE : CLEAR_LINE);
r17963r17964
702702      case 0x1c/2:
703703         state->m_system32_displayenable[which] = (data & 0x02);
704704         if (which == 0)
705            space->machine().device("soundcpu")->execute().set_input_line(INPUT_LINE_RESET, (data & 0x04) ? CLEAR_LINE : ASSERT_LINE);
705            space.machine().device("soundcpu")->execute().set_input_line(INPUT_LINE_RESET, (data & 0x04) ? CLEAR_LINE : ASSERT_LINE);
706706         break;
707707   }
708708}
r17963r17964
710710
711711READ16_MEMBER(segas32_state::io_chip_r)
712712{
713   return common_io_chip_r(&space, 0, offset, mem_mask);
713   return common_io_chip_r(space, 0, offset, mem_mask);
714714}
715715
716716
717717WRITE16_MEMBER(segas32_state::io_chip_w)
718718{
719   common_io_chip_w(&space, 0, offset, data, mem_mask);
719   common_io_chip_w(space, 0, offset, data, mem_mask);
720720}
721721
722722
723723READ32_MEMBER(segas32_state::io_chip_0_r)
724724{
725   return common_io_chip_r(&space, 0, offset*2+0, mem_mask) |
726         (common_io_chip_r(&space, 0, offset*2+1, mem_mask >> 16) << 16);
725   return common_io_chip_r(space, 0, offset*2+0, mem_mask) |
726         (common_io_chip_r(space, 0, offset*2+1, mem_mask >> 16) << 16);
727727}
728728
729729
730730WRITE32_MEMBER(segas32_state::io_chip_0_w)
731731{
732732   if (ACCESSING_BITS_0_15)
733      common_io_chip_w(&space, 0, offset*2+0, data, mem_mask);
733      common_io_chip_w(space, 0, offset*2+0, data, mem_mask);
734734   if (ACCESSING_BITS_16_31)
735      common_io_chip_w(&space, 0, offset*2+1, data >> 16, mem_mask >> 16);
735      common_io_chip_w(space, 0, offset*2+1, data >> 16, mem_mask >> 16);
736736}
737737
738738
739739READ32_MEMBER(segas32_state::io_chip_1_r)
740740{
741   return common_io_chip_r(&space, 1, offset*2+0, mem_mask) |
742         (common_io_chip_r(&space, 1, offset*2+1, mem_mask >> 16) << 16);
741   return common_io_chip_r(space, 1, offset*2+0, mem_mask) |
742         (common_io_chip_r(space, 1, offset*2+1, mem_mask >> 16) << 16);
743743}
744744
745745
746746WRITE32_MEMBER(segas32_state::io_chip_1_w)
747747{
748748   if (ACCESSING_BITS_0_15)
749      common_io_chip_w(&space, 1, offset*2+0, data, mem_mask);
749      common_io_chip_w(space, 1, offset*2+0, data, mem_mask);
750750   if (ACCESSING_BITS_16_31)
751      common_io_chip_w(&space, 1, offset*2+1, data >> 16, mem_mask >> 16);
751      common_io_chip_w(space, 1, offset*2+1, data >> 16, mem_mask >> 16);
752752}
753753
754754
trunk/src/mame/drivers/badlands.c
r17963r17964
187187
188188static void scanline_update(screen_device &screen, int scanline)
189189{
190   address_space *space = screen.machine().device("audiocpu")->memory().space(AS_PROGRAM);
190   address_space &space = *screen.machine().device("audiocpu")->memory().space(AS_PROGRAM);
191191
192192   /* sound IRQ is on 32V */
193193   if (scanline & 32)
r17963r17964
290290         break;
291291
292292      case 0x002:      /* /RDP */
293         result = atarigen_6502_sound_r(&space, offset);
293         result = atarigen_6502_sound_r(space, offset);
294294         break;
295295
296296      case 0x004:      /* /RDIO */
r17963r17964
312312         break;
313313
314314      case 0x006:      /* /IRQACK */
315         atarigen_6502_irq_ack_r(&space, 0);
315         atarigen_6502_irq_ack_r(space, 0);
316316         break;
317317
318318      case 0x200:      /* /VOICE */
r17963r17964
339339         break;
340340
341341      case 0x006:      /* /IRQACK */
342         atarigen_6502_irq_ack_r(&space, 0);
342         atarigen_6502_irq_ack_r(space, 0);
343343         break;
344344
345345      case 0x200:      /* n/c */
r17963r17964
347347         break;
348348
349349      case 0x202:      /* /WRP */
350         atarigen_6502_sound_w(&space, offset, data);
350         atarigen_6502_sound_w(space, offset, data);
351351         break;
352352
353353      case 0x204:      /* WRIO */
trunk/src/mame/drivers/supertnk.c
r17963r17964
287287
288288void supertnk_state::machine_reset()
289289{
290   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
291   supertnk_bankswitch_0_w(*space, 0, 0);
292   supertnk_bankswitch_1_w(*space, 0, 0);
290   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
291   supertnk_bankswitch_0_w(space, 0, 0);
292   supertnk_bankswitch_1_w(space, 0, 0);
293293
294   supertnk_bitplane_select_0_w(*space, 0, 0);
295   supertnk_bitplane_select_1_w(*space, 0, 0);
294   supertnk_bitplane_select_0_w(space, 0, 0);
295   supertnk_bitplane_select_1_w(space, 0, 0);
296296}
297297
298298
trunk/src/mame/drivers/neodrvr.c
r17963r17964
98349834
98359835static READ16_HANDLER( sbp_lowerrom_r )
98369836{
9837   UINT16* rom = (UINT16*)space->machine().root_device().memregion("maincpu")->base();
9837   UINT16* rom = (UINT16*)space.machine().root_device().memregion("maincpu")->base();
98389838   UINT16 origdata = rom[(offset+(0x200/2))];
98399839   UINT16 data =  BITSWAP16(origdata, 11,10,9,8,15,14,13,12,3,2,1,0,7,6,5,4);
98409840   int realoffset = 0x200+(offset*2);
trunk/src/mame/drivers/eolithsp.c
r17963r17964
1818static int eolith_vblank = 0;
1919static int eolith_scanline = 0;
2020
21void eolith_speedup_read(address_space *space)
21void eolith_speedup_read(address_space &space)
2222{
2323   /* for debug */
24  //if ((space->device().safe_pc()!=eolith_speedup_address) && (eolith_vblank!=1) )
25  //    printf("%s:eolith speedup_read data %02x\n",space->machine().describe_context(), eolith_vblank);
24  //if ((space.device().safe_pc()!=eolith_speedup_address) && (eolith_vblank!=1) )
25  //    printf("%s:eolith speedup_read data %02x\n",space.machine().describe_context(), eolith_vblank);
2626
2727   if (eolith_vblank==0 && eolith_scanline < eolith_speedup_resume_scanline)
2828   {
29      int pc = space->device().safe_pc();
29      int pc = space.device().safe_pc();
3030
3131      if ((pc==eolith_speedup_address) || (pc==eolith_speedup_address2))
3232      {
33         space->device().execute().spin_until_trigger(1000);
33         space.device().execute().spin_until_trigger(1000);
3434      }
3535   }
3636}
trunk/src/mame/drivers/segas16a.c
r17963r17964
767767   m_maincpu->set_input_line(4, HOLD_LINE);
768768
769769   // X scroll values
770   address_space *space = m_maincpu->space(AS_PROGRAM);
770   address_space &space = *m_maincpu->space(AS_PROGRAM);
771771   segaic16_textram_0_w(space, 0xff8/2, m_workram[0x0d14/2], 0xffff);
772772   segaic16_textram_0_w(space, 0xffa/2, m_workram[0x0d18/2], 0xffff);
773773
trunk/src/mame/drivers/neogeo.c
r17963r17964
217217}
218218
219219
220void neogeo_set_display_counter_msb( address_space *space, UINT16 data )
220void neogeo_set_display_counter_msb( address_space &space, UINT16 data )
221221{
222   neogeo_state *state = space->machine().driver_data<neogeo_state>();
222   neogeo_state *state = space.machine().driver_data<neogeo_state>();
223223
224224   state->m_display_counter = (state->m_display_counter & 0x0000ffff) | ((UINT32)data << 16);
225225
226   if (LOG_VIDEO_SYSTEM) logerror("PC %06x: set_display_counter %08x\n", space->device().safe_pc(), state->m_display_counter);
226   if (LOG_VIDEO_SYSTEM) logerror("PC %06x: set_display_counter %08x\n", space.device().safe_pc(), state->m_display_counter);
227227}
228228
229229
230void neogeo_set_display_counter_lsb( address_space *space, UINT16 data )
230void neogeo_set_display_counter_lsb( address_space &space, UINT16 data )
231231{
232   neogeo_state *state = space->machine().driver_data<neogeo_state>();
232   neogeo_state *state = space.machine().driver_data<neogeo_state>();
233233
234234   state->m_display_counter = (state->m_display_counter & 0xffff0000) | data;
235235
236   if (LOG_VIDEO_SYSTEM) logerror("PC %06x: set_display_counter %08x\n", space->device().safe_pc(), state->m_display_counter);
236   if (LOG_VIDEO_SYSTEM) logerror("PC %06x: set_display_counter %08x\n", space.device().safe_pc(), state->m_display_counter);
237237
238238   if (state->m_display_position_interrupt_control & IRQ2CTRL_LOAD_RELATIVE)
239239   {
240240      if (LOG_VIDEO_SYSTEM) logerror("AUTOLOAD_RELATIVE ");
241      adjust_display_position_interrupt_timer(space->machine());
241      adjust_display_position_interrupt_timer(space.machine());
242242   }
243243}
244244
r17963r17964
649649}
650650
651651
652void neogeo_set_main_cpu_bank_address( address_space *space, UINT32 bank_address )
652void neogeo_set_main_cpu_bank_address( address_space &space, UINT32 bank_address )
653653{
654   neogeo_state *state = space->machine().driver_data<neogeo_state>();
654   neogeo_state *state = space.machine().driver_data<neogeo_state>();
655655
656   if (LOG_MAIN_CPU_BANKING) logerror("MAIN CPU PC %06x: neogeo_set_main_cpu_bank_address %06x\n", space->device().safe_pc(), bank_address);
656   if (LOG_MAIN_CPU_BANKING) logerror("MAIN CPU PC %06x: neogeo_set_main_cpu_bank_address %06x\n", space.device().safe_pc(), bank_address);
657657
658658   state->m_main_cpu_bank_address = bank_address;
659659
660   _set_main_cpu_bank_address(space->machine());
660   _set_main_cpu_bank_address(space.machine());
661661}
662662
663663
r17963r17964
678678         bank_address = 0x100000;
679679      }
680680
681      neogeo_set_main_cpu_bank_address(&space, bank_address);
681      neogeo_set_main_cpu_bank_address(space, bank_address);
682682   }
683683}
684684
685685
686686static void main_cpu_banking_init( running_machine &machine )
687687{
688   address_space *mainspace = machine.device("maincpu")->memory().space(AS_PROGRAM);
688   address_space &mainspace = *machine.device("maincpu")->memory().space(AS_PROGRAM);
689689
690690   /* create vector banks */
691691   machine.root_device().membank(NEOGEO_BANK_VECTORS)->configure_entry(0, machine.root_device().memregion("mainbios")->base());
r17963r17964
716716}
717717
718718
719static void audio_cpu_bank_select( address_space *space, int region, UINT8 bank )
719static void audio_cpu_bank_select( address_space &space, int region, UINT8 bank )
720720{
721   neogeo_state *state = space->machine().driver_data<neogeo_state>();
721   neogeo_state *state = space.machine().driver_data<neogeo_state>();
722722
723   if (LOG_AUDIO_CPU_BANKING) logerror("Audio CPU PC %03x: audio_cpu_bank_select: Region: %d   Bank: %02x\n", space->device().safe_pc(), region, bank);
723   if (LOG_AUDIO_CPU_BANKING) logerror("Audio CPU PC %03x: audio_cpu_bank_select: Region: %d   Bank: %02x\n", space.device().safe_pc(), region, bank);
724724
725725   state->m_audio_cpu_banks[region] = bank;
726726
727   set_audio_cpu_banking(space->machine());
727   set_audio_cpu_banking(space.machine());
728728}
729729
730730
731731READ8_MEMBER(neogeo_state::audio_cpu_bank_select_f000_f7ff_r)
732732{
733   audio_cpu_bank_select(&space, 0, offset >> 8);
733   audio_cpu_bank_select(space, 0, offset >> 8);
734734
735735   return 0;
736736}
r17963r17964
738738
739739READ8_MEMBER(neogeo_state::audio_cpu_bank_select_e000_efff_r)
740740{
741   audio_cpu_bank_select(&space, 1, offset >> 8);
741   audio_cpu_bank_select(space, 1, offset >> 8);
742742
743743   return 0;
744744}
r17963r17964
746746
747747READ8_MEMBER(neogeo_state::audio_cpu_bank_select_c000_dfff_r)
748748{
749   audio_cpu_bank_select(&space, 2, offset >> 8);
749   audio_cpu_bank_select(space, 2, offset >> 8);
750750
751751   return 0;
752752}
r17963r17964
754754
755755READ8_MEMBER(neogeo_state::audio_cpu_bank_select_8000_bfff_r)
756756{
757   audio_cpu_bank_select(&space, 3, offset >> 8);
757   audio_cpu_bank_select(space, 3, offset >> 8);
758758
759759   return 0;
760760}
761761
762762
763static void _set_audio_cpu_rom_source( address_space *space )
763static void _set_audio_cpu_rom_source( address_space &space )
764764{
765   neogeo_state *state = space->machine().driver_data<neogeo_state>();
765   neogeo_state *state = space.machine().driver_data<neogeo_state>();
766766
767767/*  if (!state->memregion("audiobios")->base())   */
768768      state->m_audio_cpu_rom_source = 1;
r17963r17964
774774   {
775775      state->m_audio_cpu_rom_source_last = state->m_audio_cpu_rom_source;
776776
777      space->machine().device("audiocpu")->execute().set_input_line(INPUT_LINE_RESET, PULSE_LINE);
777      space.machine().device("audiocpu")->execute().set_input_line(INPUT_LINE_RESET, PULSE_LINE);
778778
779      if (LOG_AUDIO_CPU_BANKING) logerror("Audio CPU PC %03x: selectign %s ROM\n", space->device().safe_pc(), state->m_audio_cpu_rom_source ? "CARTRIDGE" : "BIOS");
779      if (LOG_AUDIO_CPU_BANKING) logerror("Audio CPU PC %03x: selectign %s ROM\n", space.device().safe_pc(), state->m_audio_cpu_rom_source ? "CARTRIDGE" : "BIOS");
780780   }
781781}
782782
783783
784static void set_audio_cpu_rom_source( address_space *space, UINT8 data )
784static void set_audio_cpu_rom_source( address_space &space, UINT8 data )
785785{
786   neogeo_state *state = space->machine().driver_data<neogeo_state>();
786   neogeo_state *state = space.machine().driver_data<neogeo_state>();
787787   state->m_audio_cpu_rom_source = data;
788788
789789   _set_audio_cpu_rom_source(space);
r17963r17964
826826   set_audio_cpu_banking(machine);
827827
828828   state->m_audio_cpu_rom_source_last = 0;
829   set_audio_cpu_rom_source(machine.device("maincpu")->memory().space(AS_PROGRAM), 0);
829   set_audio_cpu_rom_source(*machine.device("maincpu")->memory().space(AS_PROGRAM), 0);
830830}
831831
832832
r17963r17964
848848      default:
849849      case 0x00: neogeo_set_screen_dark(machine(), bit); break;
850850      case 0x01: set_main_cpu_vector_table_source(machine(), bit);
851               set_audio_cpu_rom_source(&space, bit); /* this is a guess */
851               set_audio_cpu_rom_source(space, bit); /* this is a guess */
852852               break;
853853      case 0x05: neogeo_set_fixed_layer_source(machine(), bit); break;
854854      case 0x06: set_save_ram_unlock(machine(), bit); break;
r17963r17964
982982   _set_main_cpu_bank_address(machine);
983983   _set_main_cpu_vector_table_source(machine);
984984   set_audio_cpu_banking(machine);
985   _set_audio_cpu_rom_source(machine.device("maincpu")->memory().space(AS_PROGRAM));
985   _set_audio_cpu_rom_source(*machine.device("maincpu")->memory().space(AS_PROGRAM));
986986   set_outputs(machine);
987987}
988988
r17963r17964
10501050void neogeo_state::machine_reset()
10511051{
10521052   offs_t offs;
1053   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
1053   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
10541054
10551055   /* reset system control registers */
10561056   for (offs = 0; offs < 8; offs++)
1057      system_control_w(*space, offs, 0, 0x00ff);
1057      system_control_w(space, offs, 0, 0x00ff);
10581058
10591059   machine().device("maincpu")->reset();
10601060
trunk/src/mame/drivers/ladybug.c
r17963r17964
10681068   /* decode the opcodes */
10691069
10701070   offs_t i;
1071   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
1071   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
10721072   UINT8 *decrypted = auto_alloc_array(machine(), UINT8, 0x6000);
10731073   UINT8 *rom = machine().root_device().memregion("maincpu")->base();
10741074   UINT8 *table = machine().root_device().memregion("user1")->base();
10751075
1076   space->set_decrypted_region(0x0000, 0x5fff, decrypted);
1076   space.set_decrypted_region(0x0000, 0x5fff, decrypted);
10771077
10781078   for (i = 0; i < 0x6000; i++)
10791079      decrypted[i] = table[rom[i]];
trunk/src/mame/drivers/taito_l.c
r17963r17964
433433   return m_cur_rambank[offset];
434434}
435435
436static void bank_w(address_space *space, offs_t offset, UINT8 data, int banknum )
436static void bank_w(address_space &space, offs_t offset, UINT8 data, int banknum )
437437{
438   taitol_state *state = space->machine().driver_data<taitol_state>();
438   taitol_state *state = space.machine().driver_data<taitol_state>();
439439
440440   if (state->m_current_base[banknum][offset] != data)
441441   {
442442      state->m_current_base[banknum][offset] = data;
443443      if (state->m_current_notifier[banknum])
444         state->m_current_notifier[banknum](space->machine(), offset);
444         state->m_current_notifier[banknum](space.machine(), offset);
445445   }
446446}
447447
448448WRITE8_MEMBER(taitol_state::bank0_w)
449449{
450   bank_w(&space, offset, data, 0);
450   bank_w(space, offset, data, 0);
451451}
452452
453453WRITE8_MEMBER(taitol_state::bank1_w)
454454{
455   bank_w(&space, offset, data, 1);
455   bank_w(space, offset, data, 1);
456456}
457457
458458WRITE8_MEMBER(taitol_state::bank2_w)
459459{
460   bank_w(&space, offset, data, 2);
460   bank_w(space, offset, data, 2);
461461}
462462
463463WRITE8_MEMBER(taitol_state::bank3_w)
464464{
465   bank_w(&space, offset, data, 3);
465   bank_w(space, offset, data, 3);
466466}
467467
468468WRITE8_MEMBER(taitol_state::control2_w)
r17963r17964
17771777      m_cur_bank = data & 0x03;
17781778      bankaddress = m_cur_bank * 0x4000;
17791779      membank("bank7")->set_base(&RAM[bankaddress]);
1780      //logerror ("YM2203 bank change val=%02x  pc=%04x\n", m_cur_bank, space->device().safe_pc() );
1780      //logerror ("YM2203 bank change val=%02x  pc=%04x\n", m_cur_bank, space.device().safe_pc() );
17811781   }
17821782}
17831783
trunk/src/mame/drivers/eolith16.c
r17963r17964
6161
6262READ16_MEMBER(eolith16_state::eolith16_custom_r)
6363{
64   eolith_speedup_read(&space);
64   eolith_speedup_read(space);
6565   return ioport("SPECIAL")->read();
6666}
6767
trunk/src/mame/drivers/tickee.c
r17963r17964
250250}
251251
252252
253static void rapidfir_to_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
253static void rapidfir_to_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg)
254254{
255   tickee_state *state = space->machine().driver_data<tickee_state>();
255   tickee_state *state = space.machine().driver_data<tickee_state>();
256256   if (address < 0x800000)
257257      memcpy(shiftreg, &state->m_vram[TOWORD(address)], TOBYTE(0x2000));
258258}
259259
260260
261static void rapidfir_from_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
261static void rapidfir_from_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg)
262262{
263   tickee_state *state = space->machine().driver_data<tickee_state>();
263   tickee_state *state = space.machine().driver_data<tickee_state>();
264264   if (address < 0x800000)
265265      memcpy(&state->m_vram[TOWORD(address)], shiftreg, TOBYTE(0x2000));
266266}
trunk/src/mame/drivers/multigam.c
r17963r17964
236236{
237237   int source = (data & 7);
238238   ppu2c0x_device *ppu = machine().device<ppu2c0x_device>("ppu");
239   ppu->spriteram_dma(&space, source);
239   ppu->spriteram_dma(space, source);
240240}
241241
242242READ8_MEMBER(multigam_state::psg_4015_r)
r17963r17964
11381138
11391139MACHINE_RESET_MEMBER(multigam_state,multigm3)
11401140{
1141   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
1141   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
11421142   /* reset the ppu */
1143   multigm3_switch_prg_rom(*space, 0, 0x01 );
1143   multigm3_switch_prg_rom(space, 0, 0x01 );
11441144};
11451145
11461146void multigam_state::machine_start()
r17963r17964
13601360
13611361DRIVER_INIT_MEMBER(multigam_state,multigam)
13621362{
1363   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
1364   multigam_switch_prg_rom(*space, 0x0, 0x01);
1363   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
1364   multigam_switch_prg_rom(space, 0x0, 0x01);
13651365}
13661366
13671367static void multigm3_decrypt(UINT8* mem, int memsize, const UINT8* decode_nibble)
r17963r17964
13751375
13761376DRIVER_INIT_MEMBER(multigam_state,multigm3)
13771377{
1378   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
1378   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
13791379
13801380   const UINT8 decode[16]  = { 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 0x02, 0x01, 0x00, 0x0f, 0x0e, 0x0d, 0x0c, 0x0b, 0x0a };
13811381
r17963r17964
13841384
13851385   m_multigmc_mmc3_6000_ram = auto_alloc_array(machine(), UINT8, 0x2000);
13861386
1387   multigam_switch_prg_rom(*space, 0x0, 0x01);
1387   multigam_switch_prg_rom(space, 0x0, 0x01);
13881388}
13891389
13901390DRIVER_INIT_MEMBER(multigam_state,multigmt)
13911391{
1392   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
1392   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
13931393
13941394   UINT8* buf = auto_alloc_array(machine(), UINT8, 0x80000);
13951395   UINT8 *rom;
r17963r17964
14251425   }
14261426
14271427   auto_free(machine(), buf);
1428   multigam_switch_prg_rom(*space, 0x0, 0x01);
1428   multigam_switch_prg_rom(space, 0x0, 0x01);
14291429};
14301430
14311431GAME( 1992, multigam, 0,        multigam, multigam, multigam_state, multigam, ROT0, "<unknown>", "Multi Game (set 1)", 0 )
trunk/src/mame/drivers/vcombat.c
r17963r17964
446446   UINT8 *ROM = memregion("maincpu")->base();
447447
448448   /* The two i860s execute out of RAM */
449   address_space *space = machine().device<i860_device>("vid_0")->space(AS_PROGRAM);
450   space->set_direct_update_handler(direct_update_delegate(FUNC(vcombat_state::vcombat_vid_0_direct_handler), this));
449   address_space &v0space = *machine().device<i860_device>("vid_0")->space(AS_PROGRAM);
450   v0space.set_direct_update_handler(direct_update_delegate(FUNC(vcombat_state::vcombat_vid_0_direct_handler), this));
451451
452   space = machine().device<i860_device>("vid_1")->space(AS_PROGRAM);
453   space->set_direct_update_handler(direct_update_delegate(FUNC(vcombat_state::vcombat_vid_1_direct_handler), this));
452   address_space &v1space = *machine().device<i860_device>("vid_1")->space(AS_PROGRAM);
453   v1space.set_direct_update_handler(direct_update_delegate(FUNC(vcombat_state::vcombat_vid_1_direct_handler), this));
454454
455455   /* Allocate the 68000 framebuffers */
456456   m_m68k_framebuffer[0] = auto_alloc_array(machine(), UINT16, 0x8000);
r17963r17964
493493   m_i860_framebuffer[1][1] = NULL;
494494
495495   /* The i860 executes out of RAM */
496   address_space *space = machine().device<i860_device>("vid_0")->space(AS_PROGRAM);
497   space->set_direct_update_handler(direct_update_delegate(FUNC(vcombat_state::vcombat_vid_0_direct_handler), this));
496   address_space &space = *machine().device<i860_device>("vid_0")->space(AS_PROGRAM);
497   space.set_direct_update_handler(direct_update_delegate(FUNC(vcombat_state::vcombat_vid_0_direct_handler), this));
498498}
499499
500500
trunk/src/mame/drivers/39in1.c
r17963r17964
9797
9898
9999
100static void pxa255_lcd_load_dma_descriptor(address_space* space, UINT32 address, int channel);
100static void pxa255_lcd_load_dma_descriptor(address_space & space, UINT32 address, int channel);
101101static void pxa255_lcd_irq_check(running_machine& machine);
102102static void pxa255_lcd_dma_kickoff(running_machine& machine, int channel);
103103static void pxa255_lcd_check_load_next_branch(running_machine& machine, int channel);
r17963r17964
278278
279279   // Load the next descriptor
280280
281   address_space *space = machine.device<pxa255_device>("maincpu")->space(AS_PROGRAM);
282   dma_regs->dsadr[channel] = space->read_dword(dma_regs->ddadr[channel] + 0x4);
283   dma_regs->dtadr[channel] = space->read_dword(dma_regs->ddadr[channel] + 0x8);
284   dma_regs->dcmd[channel]  = space->read_dword(dma_regs->ddadr[channel] + 0xc);
285   dma_regs->ddadr[channel] = space->read_dword(dma_regs->ddadr[channel]);
281   address_space &space = *machine.device<pxa255_device>("maincpu")->space(AS_PROGRAM);
282   dma_regs->dsadr[channel] = space.read_dword(dma_regs->ddadr[channel] + 0x4);
283   dma_regs->dtadr[channel] = space.read_dword(dma_regs->ddadr[channel] + 0x8);
284   dma_regs->dcmd[channel]  = space.read_dword(dma_regs->ddadr[channel] + 0xc);
285   dma_regs->ddadr[channel] = space.read_dword(dma_regs->ddadr[channel]);
286286
287287   // Start our end-of-transfer timer
288288   switch(channel)
r17963r17964
318318   UINT16 temp16;
319319   UINT32 temp32;
320320
321   address_space *space = machine.device<pxa255_device>("maincpu")->space(AS_PROGRAM);
321   address_space &space = *machine.device<pxa255_device>("maincpu")->space(AS_PROGRAM);
322322   switch(param)
323323   {
324324      case 3:
325325         for(index = 0; index < count; index += 4)
326326         {
327            state->m_words[index >> 2] = space->read_dword(sadr);
327            state->m_words[index >> 2] = space.read_dword(sadr);
328328            state->m_samples[(index >> 1) + 0] = (INT16)(state->m_words[index >> 2] >> 16);
329329            state->m_samples[(index >> 1) + 1] = (INT16)(state->m_words[index >> 2] & 0xffff);
330330            sadr += 4;
r17963r17964
337337            switch(dma_regs->dcmd[param] & PXA255_DCMD_SIZE)
338338            {
339339               case PXA255_DCMD_SIZE_8:
340                  temp8 = space->read_byte(sadr);
341                  space->write_byte(tadr, temp8);
340                  temp8 = space.read_byte(sadr);
341                  space.write_byte(tadr, temp8);
342342                  index++;
343343                  break;
344344               case PXA255_DCMD_SIZE_16:
345                  temp16 = space->read_word(sadr);
346                  space->write_word(tadr, temp16);
345                  temp16 = space.read_word(sadr);
346                  space.write_word(tadr, temp16);
347347                  index += 2;
348348                  break;
349349               case PXA255_DCMD_SIZE_32:
350                  temp32 = space->read_dword(sadr);
351                  space->write_dword(tadr, temp32);
350                  temp32 = space.read_dword(sadr);
351                  space.write_dword(tadr, temp32);
352352                  index += 4;
353353                  break;
354354               default:
r17963r17964
10581058
10591059*/
10601060
1061static void pxa255_lcd_load_dma_descriptor(address_space* space, UINT32 address, int channel)
1061static void pxa255_lcd_load_dma_descriptor(address_space & space, UINT32 address, int channel)
10621062{
1063   _39in1_state *state = space->machine().driver_data<_39in1_state>();
1063   _39in1_state *state = space.machine().driver_data<_39in1_state>();
10641064   PXA255_LCD_Regs *lcd_regs = &state->m_lcd_regs;
10651065
1066   lcd_regs->dma[channel].fdadr = space->read_dword(address);
1067   lcd_regs->dma[channel].fsadr = space->read_dword(address + 0x04);
1068   lcd_regs->dma[channel].fidr  = space->read_dword(address + 0x08);
1069   lcd_regs->dma[channel].ldcmd = space->read_dword(address + 0x0c);
1070   verboselog( space->machine(), 4, "pxa255_lcd_load_dma_descriptor, address = %08x, channel = %d\n", address, channel);
1071   verboselog( space->machine(), 4, "    DMA Frame Descriptor: %08x\n", lcd_regs->dma[channel].fdadr );
1072   verboselog( space->machine(), 4, "    DMA Frame Source Address: %08x\n", lcd_regs->dma[channel].fsadr );
1073   verboselog( space->machine(), 4, "    DMA Frame ID: %08x\n", lcd_regs->dma[channel].fidr );
1074   verboselog( space->machine(), 4, "    DMA Command: %08x\n", lcd_regs->dma[channel].ldcmd );
1066   lcd_regs->dma[channel].fdadr = space.read_dword(address);
1067   lcd_regs->dma[channel].fsadr = space.read_dword(address + 0x04);
1068   lcd_regs->dma[channel].fidr  = space.read_dword(address + 0x08);
1069   lcd_regs->dma[channel].ldcmd = space.read_dword(address + 0x0c);
1070   verboselog( space.machine(), 4, "pxa255_lcd_load_dma_descriptor, address = %08x, channel = %d\n", address, channel);
1071   verboselog( space.machine(), 4, "    DMA Frame Descriptor: %08x\n", lcd_regs->dma[channel].fdadr );
1072   verboselog( space.machine(), 4, "    DMA Frame Source Address: %08x\n", lcd_regs->dma[channel].fsadr );
1073   verboselog( space.machine(), 4, "    DMA Frame ID: %08x\n", lcd_regs->dma[channel].fidr );
1074   verboselog( space.machine(), 4, "    DMA Command: %08x\n", lcd_regs->dma[channel].ldcmd );
10751075}
10761076
10771077static void pxa255_lcd_irq_check(running_machine& machine)
r17963r17964
11111111
11121112      if(lcd_regs->dma[channel].ldcmd & PXA255_LDCMD_PAL)
11131113      {
1114         address_space *space = machine.device<pxa255_device>("maincpu")->space(AS_PROGRAM);
1114         address_space &space = *machine.device<pxa255_device>("maincpu")->space(AS_PROGRAM);
11151115         int length = lcd_regs->dma[channel].ldcmd & 0x000fffff;
11161116         int index = 0;
11171117         for(index = 0; index < length; index += 2)
11181118         {
1119            UINT16 color = space->read_word((lcd_regs->dma[channel].fsadr &~ 1) + index);
1119            UINT16 color = space.read_word((lcd_regs->dma[channel].fsadr &~ 1) + index);
11201120            state->m_pxa255_lcd_palette[index >> 1] = (((((color >> 11) & 0x1f) << 3) | (color >> 13)) << 16) | (((((color >> 5) & 0x3f) << 2) | ((color >> 9) & 0x3)) << 8) | (((color & 0x1f) << 3) | ((color >> 2) & 0x7));
11211121            palette_set_color_rgb(machine, index >> 1, (((color >> 11) & 0x1f) << 3) | (color >> 13), (((color >> 5) & 0x3f) << 2) | ((color >> 9) & 0x3), ((color & 0x1f) << 3) | ((color >> 2) & 0x7));
11221122         }
11231123      }
11241124      else
11251125      {
1126         address_space *space = machine.device<pxa255_device>("maincpu")->space(AS_PROGRAM);
1126         address_space &space = *machine.device<pxa255_device>("maincpu")->space(AS_PROGRAM);
11271127         int length = lcd_regs->dma[channel].ldcmd & 0x000fffff;
11281128         int index = 0;
11291129         for(index = 0; index < length; index++)
11301130         {
1131            state->m_pxa255_lcd_framebuffer[index] = space->read_byte(lcd_regs->dma[channel].fsadr + index);
1131            state->m_pxa255_lcd_framebuffer[index] = space.read_byte(lcd_regs->dma[channel].fsadr + index);
11321132         }
11331133      }
11341134   }
r17963r17964
11431143   {
11441144      verboselog( machine, 4, "pxa255_lcd_check_load_next_branch: Taking branch\n" );
11451145      lcd_regs->fbr[channel] &= ~1;
1146      address_space *space = machine.device<pxa255_device>("maincpu")->space(AS_PROGRAM);
1147      //lcd_regs->fbr[channel] = (space->read_dword(lcd_regs->fbr[channel] & 0xfffffff0) & 0xfffffff0) | (lcd_regs->fbr[channel] & 0x00000003);
1146      address_space &space = *machine.device<pxa255_device>("maincpu")->space(AS_PROGRAM);
1147      //lcd_regs->fbr[channel] = (space.read_dword(lcd_regs->fbr[channel] & 0xfffffff0) & 0xfffffff0) | (lcd_regs->fbr[channel] & 0x00000003);
11481148      //printf( "%08x\n", lcd_regs->fbr[channel] );
11491149      pxa255_lcd_load_dma_descriptor(space, lcd_regs->fbr[channel] & 0xfffffff0, 0);
1150      lcd_regs->fbr[channel] = (space->read_dword(lcd_regs->fbr[channel] & 0xfffffff0) & 0xfffffff0) | (lcd_regs->fbr[channel] & 0x00000003);
1150      lcd_regs->fbr[channel] = (space.read_dword(lcd_regs->fbr[channel] & 0xfffffff0) & 0xfffffff0) | (lcd_regs->fbr[channel] & 0x00000003);
11511151      pxa255_lcd_dma_kickoff(machine, 0);
11521152      if(lcd_regs->fbr[channel] & 2)
11531153      {
r17963r17964
13081308         verboselog( machine(), 4, "pxa255_lcd_w: LCD DMA Frame Descriptor Address Register 0: %08x & %08x\n", data, mem_mask );
13091309         if(!lcd_regs->dma[0].eof->enabled())
13101310         {
1311            pxa255_lcd_load_dma_descriptor(&space, data & 0xfffffff0, 0);
1311            pxa255_lcd_load_dma_descriptor(space, data & 0xfffffff0, 0);
13121312         }
13131313         else
13141314         {
r17963r17964
13291329         verboselog( machine(), 4, "pxa255_lcd_w: LCD DMA Frame Descriptor Address Register 1: %08x & %08x\n", data, mem_mask );
13301330         if(!lcd_regs->dma[1].eof->enabled())
13311331         {
1332            pxa255_lcd_load_dma_descriptor(&space, data & 0xfffffff0, 1);
1332            pxa255_lcd_load_dma_descriptor(space, data & 0xfffffff0, 1);
13331333         }
13341334         else
13351335         {
r17963r17964
14641464   m_dmadac[1] = machine().device<dmadac_sound_device>("dac2");
14651465   m_eeprom = machine().device<eeprom_device>("eeprom");
14661466
1467   address_space *space = machine().device<pxa255_device>("maincpu")->space(AS_PROGRAM);
1468   space->install_read_handler (0xa0151648, 0xa015164b, read32_delegate(FUNC(_39in1_state::prot_cheater_r), this));
1467   address_space &space = *machine().device<pxa255_device>("maincpu")->space(AS_PROGRAM);
1468   space.install_read_handler (0xa0151648, 0xa015164b, read32_delegate(FUNC(_39in1_state::prot_cheater_r), this));
14691469}
14701470
14711471static ADDRESS_MAP_START( 39in1_map, AS_PROGRAM, 32, _39in1_state )
trunk/src/mame/drivers/guab.c
r17963r17964
157157      col = offset <<= 1;
158158
159159   if (ACCESSING_BITS_8_15)
160      tms34061_w(&space, col, row, func, data >> 8);
160      tms34061_w(space, col, row, func, data >> 8);
161161
162162   if (ACCESSING_BITS_0_7)
163      tms34061_w(&space, col | 1, row, func, data & 0xff);
163      tms34061_w(space, col | 1, row, func, data & 0xff);
164164}
165165
166166
r17963r17964
177177      col = offset <<= 1;
178178
179179   if (ACCESSING_BITS_8_15)
180      data |= tms34061_r(&space, col, row, func) << 8;
180      data |= tms34061_r(space, col, row, func) << 8;
181181
182182   if (ACCESSING_BITS_0_7)
183      data |= tms34061_r(&space, col | 1, row, func);
183      data |= tms34061_r(space, col | 1, row, func);
184184
185185   return data;
186186}
r17963r17964
607607   if (newval == 0)
608608   {
609609      UINT32 credit;
610      address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
610      address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
611611
612612      /* Get the current credit value and add the new coin value */
613      credit = space->read_dword(0x8002c) + (UINT32)(FPTR)param;
614      space->write_dword(0x8002c, credit);
613      credit = space.read_dword(0x8002c) + (UINT32)(FPTR)param;
614      space.write_dword(0x8002c, credit);
615615   }
616616}
617617
trunk/src/mame/drivers/mpu4vid.c
r17963r17964
525525
526526static READ16_HANDLER( mpu4_vid_vidram_r )
527527{
528   mpu4vid_state *state = space->machine().driver_data<mpu4vid_state>();
528   mpu4vid_state *state = space.machine().driver_data<mpu4vid_state>();
529529   return state->m_vid_vidram[offset];
530530}
531531
532532
533533static WRITE16_HANDLER( mpu4_vid_vidram_w )
534534{
535   mpu4vid_state *state = space->machine().driver_data<mpu4vid_state>();
535   mpu4vid_state *state = space.machine().driver_data<mpu4vid_state>();
536536   COMBINE_DATA(&state->m_vid_vidram[offset]);
537537   offset <<= 1;
538   space->machine().gfx[state->m_gfx_index+0]->mark_dirty(offset/0x20);
539   space->machine().gfx[state->m_gfx_index+1]->mark_dirty(offset/0x20);
540   space->machine().gfx[state->m_gfx_index+2]->mark_dirty(offset/0x20);
541   space->machine().gfx[state->m_gfx_index+3]->mark_dirty(offset/0x20);
538   space.machine().gfx[state->m_gfx_index+0]->mark_dirty(offset/0x20);
539   space.machine().gfx[state->m_gfx_index+1]->mark_dirty(offset/0x20);
540   space.machine().gfx[state->m_gfx_index+2]->mark_dirty(offset/0x20);
541   space.machine().gfx[state->m_gfx_index+3]->mark_dirty(offset/0x20);
542542}
543543
544544
r17963r17964
581581
582582static WRITE16_HANDLER( ef9369_w )
583583{
584   mpu4vid_state *state = space->machine().driver_data<mpu4vid_state>();
584   mpu4vid_state *state = space.machine().driver_data<mpu4vid_state>();
585585   struct ef9369_t &pal = state->m_pal;
586586   data &= 0x00ff;
587587
r17963r17964
611611         col = pal.clut[entry] & 0xfff;
612612
613613         /* Update the MAME palette */
614         palette_set_color_rgb(space->machine(), entry, pal4bit(col >> 8), pal4bit(col >> 4), pal4bit(col >> 0));
614         palette_set_color_rgb(space.machine(), entry, pal4bit(col >> 8), pal4bit(col >> 4), pal4bit(col >> 0));
615615      }
616616
617617         /* Address register auto-increment */
r17963r17964
623623
624624static READ16_HANDLER( ef9369_r )
625625{
626   mpu4vid_state *state = space->machine().driver_data<mpu4vid_state>();
626   mpu4vid_state *state = space.machine().driver_data<mpu4vid_state>();
627627   struct ef9369_t &pal = state->m_pal;
628628   if ((offset & 1) == 0)
629629   {
r17963r17964
660660
661661WRITE16_HANDLER( bt471_w )
662662{
663   mpu4vid_state *state = space->machine().driver_data<mpu4vid_state>();
663   mpu4vid_state *state = space.machine().driver_data<mpu4vid_state>();
664664   struct bt471_t &bt471 = state->m_bt471;
665665   UINT8 val = data & 0xff;
666666      {
r17963r17964
684684
685685         if (++*addr_cnt == 3)
686686         {
687            palette_set_color(space->machine(), bt471.address, MAKE_RGB(color[0], color[1], color[2]));
687            palette_set_color(space.machine(), bt471.address, MAKE_RGB(color[0], color[1], color[2]));
688688            *addr_cnt = 0;
689689
690690            /* Address register increments */
r17963r17964
15971597
15981598static WRITE16_HANDLER( characteriser16_w )
15991599{
1600   mpu4_state *state = space->machine().driver_data<mpu4_state>();
1600   mpu4_state *state = space.machine().driver_data<mpu4_state>();
16011601   int x;
16021602   int call=data;
1603   LOG_CHR_FULL(("%04x Characteriser write offset %02X data %02X", space->device().safe_pcbase(),offset,data));
1603   LOG_CHR_FULL(("%04x Characteriser write offset %02X data %02X", space.device().safe_pcbase(),offset,data));
16041604
16051605   if (!state->m_current_chr_table)
16061606   {
1607      logerror("No Characteriser Table @ %04x\n", space->device().safe_pcbase());
1607      logerror("No Characteriser Table @ %04x\n", space.device().safe_pcbase());
16081608      return;
16091609   }
16101610
r17963r17964
16291629
16301630static READ16_HANDLER( characteriser16_r )
16311631{
1632   mpu4_state *state = space->machine().driver_data<mpu4_state>();
1633   LOG_CHR_FULL(("%04x Characteriser read offset %02X,data %02X", space->device().safe_pcbase(),offset,state->m_current_chr_table[state->m_prot_col].response));
1632   mpu4_state *state = space.machine().driver_data<mpu4_state>();
1633   LOG_CHR_FULL(("%04x Characteriser read offset %02X,data %02X", space.device().safe_pcbase(),offset,state->m_current_chr_table[state->m_prot_col].response));
16341634   LOG_CHR(("Characteriser read offset %02X \n",offset));
16351635   LOG_CHR(("Characteriser read data %02X \n",state->m_current_chr_table[state->m_prot_col].response));
16361636
16371637   if (!state->m_current_chr_table)
16381638   {
1639      logerror("No Characteriser Table @ %04x\n", space->device().safe_pcbase());
1639      logerror("No Characteriser Table @ %04x\n", space.device().safe_pcbase());
16401640      return 0x00;
16411641   }
16421642
16431643
16441644   /* hack for 'invalid questions' error on time machine.. I guess it wants them to decode properly for startup check? */
1645   if (space->device().safe_pcbase()==0x283a)
1645   if (space.device().safe_pcbase()==0x283a)
16461646   {
16471647      return 0x00;
16481648   }
r17963r17964
16691669
16701670static WRITE16_HANDLER( bwb_characteriser16_w )
16711671{
1672   mpu4_state *state = space->machine().driver_data<mpu4_state>();
1672   mpu4_state *state = space.machine().driver_data<mpu4_state>();
16731673   int x;
16741674   int call=data &0xff;
1675   LOG_CHR_FULL(("%04x Characteriser write offset %02X data %02X \n", space->device().safe_pcbase(),offset,data));
1675   LOG_CHR_FULL(("%04x Characteriser write offset %02X data %02X \n", space.device().safe_pcbase(),offset,data));
16761676   if (!state->m_current_chr_table)
16771677   {
1678      logerror("No Characteriser Table @ %04x\n", space->device().safe_pcbase());
1678      logerror("No Characteriser Table @ %04x\n", space.device().safe_pcbase());
16791679      return;
16801680   }
16811681
r17963r17964
16951695         state->m_init_col =0;
16961696      }
16971697   }
1698   state->m_chr_value = space->machine().rand();
1698   state->m_chr_value = space.machine().rand();
16991699   for (x = 0; x < 4; x++)
17001700   {
17011701      if   (state->m_current_chr_table[(x)].call == call)
r17963r17964
17131713
17141714static READ16_HANDLER( bwb_characteriser16_r )
17151715{
1716   mpu4_state *state = space->machine().driver_data<mpu4_state>();
1716   mpu4_state *state = space.machine().driver_data<mpu4_state>();
17171717
17181718   LOG_CHR(("Characteriser read offset %02X \n",offset));
17191719
trunk/src/mame/drivers/cham24.c
r17963r17964
142142{
143143   int source = (data & 7);
144144   ppu2c0x_device *ppu = machine().device<ppu2c0x_device>("ppu");
145   ppu->spriteram_dma(&space, source);
145   ppu->spriteram_dma(space, source);
146146}
147147
148148READ8_MEMBER(cham24_state::psg_4015_r)
trunk/src/mame/drivers/starwars.c
r17963r17964
4848   /* ESB-specific */
4949   if (m_is_esb)
5050   {
51      address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
51      address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
5252
5353      /* reset the slapstic */
5454      slapstic_reset();
r17963r17964
5656      memcpy(m_slapstic_base, &m_slapstic_source[m_slapstic_current_bank * 0x2000], 0x2000);
5757
5858      /* reset all the banks */
59      starwars_out_w(*space, 4, 0);
59      starwars_out_w(space, 4, 0);
6060   }
6161
6262   /* reset the matrix processor */
r17963r17964
8484 *
8585 *************************************/
8686
87static void esb_slapstic_tweak(address_space *space, offs_t offset)
87static void esb_slapstic_tweak(address_space &space, offs_t offset)
8888{
89   starwars_state *state = space->machine().driver_data<starwars_state>();
89   starwars_state *state = space.machine().driver_data<starwars_state>();
9090   int new_bank = slapstic_tweak(space, offset);
9191
9292   /* update for the new bank */
r17963r17964
101101READ8_MEMBER(starwars_state::esb_slapstic_r)
102102{
103103   int result = m_slapstic_base[offset];
104   esb_slapstic_tweak(&space, offset);
104   esb_slapstic_tweak(space, offset);
105105   return result;
106106}
107107
108108
109109WRITE8_MEMBER(starwars_state::esb_slapstic_w)
110110{
111   esb_slapstic_tweak(&space, offset);
111   esb_slapstic_tweak(space, offset);
112112}
113113
114114
r17963r17964
135135      {
136136         m_slapstic_last_pc = pc;
137137         m_slapstic_last_address = address;
138         esb_slapstic_tweak(&direct.space(), address & 0x1fff);
138         esb_slapstic_tweak(direct.space(), address & 0x1fff);
139139      }
140140      return ~0;
141141   }
r17963r17964
514514   m_slapstic_base = &rom[0x08000];
515515
516516   /* install an opcode base handler */
517   address_space *space = machine().device<m6809_device>("maincpu")->space(AS_PROGRAM);
518   space->set_direct_update_handler(direct_update_delegate(FUNC(starwars_state::esb_setdirect), this));
517   address_space &space = *machine().device<m6809_device>("maincpu")->space(AS_PROGRAM);
518   space.set_direct_update_handler(direct_update_delegate(FUNC(starwars_state::esb_setdirect), this));
519519
520520   /* install read/write handlers for it */
521521   machine().device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0x8000, 0x9fff, read8_delegate(FUNC(starwars_state::esb_slapstic_r),this), write8_delegate(FUNC(starwars_state::esb_slapstic_w),this));
trunk/src/mame/drivers/savquest.c
r17963r17964
529529
530530   kbdc8042_init(machine(), &at8042);
531531   pc_vga_init(machine(), vga_setting, NULL);
532   pc_vga_io_init(machine(), machine().device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, machine().device("maincpu")->memory().space(AS_IO), 0x0000);
532   pc_vga_io_init(machine(), *machine().device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, *machine().device("maincpu")->memory().space(AS_IO), 0x0000);
533533}
534534
535535void savquest_state::machine_reset()
trunk/src/mame/drivers/astrocorp.c
r17963r17964
192192   {
193193      okim6295_device *oki = downcast<okim6295_device *>(device);
194194      oki->set_bank_base(0x40000 * ((data >> 8) & 1));
195//      logerror("CPU #0 PC %06X: OKI bank %08X\n", space->device().safe_pc(), data);
195//      logerror("CPU #0 PC %06X: OKI bank %08X\n", space.device().safe_pc(), data);
196196   }
197197}
198198
r17963r17964
203203   {
204204      okim6295_device *oki = downcast<okim6295_device *>(device);
205205      oki->set_bank_base(0x40000 * (data & 1));
206//      logerror("CPU #0 PC %06X: OKI bank %08X\n", space->device().safe_pc(), data);
206//      logerror("CPU #0 PC %06X: OKI bank %08X\n", space.device().safe_pc(), data);
207207   }
208208}
209209
trunk/src/mame/drivers/coolridr.c
r17963r17964
593593
594594
595595/* FIXME: this seems to do a hell lot of stuff, it's not ST-V SCU but still somewhat complex :/ */
596static void sysh1_dma_transfer( address_space *space, UINT16 dma_index )
596static void sysh1_dma_transfer( address_space &space, UINT16 dma_index )
597597{
598   coolridr_state *state = space->machine().driver_data<coolridr_state>();
598   coolridr_state *state = space.machine().driver_data<coolridr_state>();
599599   UINT32 src,dst,size,type,s_i;
600600   UINT8 end_dma_mark;
601601
r17963r17964
644644         //size/=2;
645645         if((src & 0xff00000) == 0x3e00000)
646646            return; //FIXME: kludge to avoid palette corruption
647         //debugger_break(space->machine());
647         //debugger_break(space.machine());
648648      }
649649
650650      if(type == 0xc || type == 0xd || type == 0xe)
651651      {
652652         for(s_i=0;s_i<size;s_i+=4)
653653         {
654            space->write_dword(dst,space->read_dword(src));
654            space.write_dword(dst,space.read_dword(src));
655655            dst+=4;
656656            src+=4;
657657         }
r17963r17964
676676   if(offset*4 == 0x000)
677677   {
678678      if((m_framebuffer_vram[offset] & 0xff00000) == 0xfe00000)
679         sysh1_dma_transfer(&space, m_framebuffer_vram[offset] & 0xffff);
679         sysh1_dma_transfer(space, m_framebuffer_vram[offset] & 0xffff);
680680   }
681681}
682682
trunk/src/mame/drivers/mpu4hw.c
r17963r17964
23032303}
23042304
23052305
2306void mpu4_install_mod4yam_space(address_space *space)
2306void mpu4_install_mod4yam_space(address_space &space)
23072307{
2308   mpu4_state *state = space->machine().driver_data<mpu4_state>();
2309   space->install_read_handler(0x0880, 0x0882, read8_delegate(FUNC(mpu4_state::mpu4_ym2413_r),state));
2310   space->install_write_handler(0x0880, 0x0881, write8_delegate(FUNC(mpu4_state::mpu4_ym2413_w),state));
2308   mpu4_state *state = space.machine().driver_data<mpu4_state>();
2309   space.install_read_handler(0x0880, 0x0882, read8_delegate(FUNC(mpu4_state::mpu4_ym2413_r),state));
2310   space.install_write_handler(0x0880, 0x0881, write8_delegate(FUNC(mpu4_state::mpu4_ym2413_w),state));
23112311}
23122312
2313void mpu4_install_mod4oki_space(address_space *space)
2313void mpu4_install_mod4oki_space(address_space &space)
23142314{
2315   mpu4_state *state = space->machine().driver_data<mpu4_state>();
2316   pia6821_device *pia_ic4ss = space->machine().device<pia6821_device>("pia_ic4ss");
2317   ptm6840_device *ptm_ic3ss = space->machine().device<ptm6840_device>("ptm_ic3ss");
2315   mpu4_state *state = space.machine().driver_data<mpu4_state>();
2316   pia6821_device *pia_ic4ss = space.machine().device<pia6821_device>("pia_ic4ss");
2317   ptm6840_device *ptm_ic3ss = space.machine().device<ptm6840_device>("ptm_ic3ss");
23182318
2319   space->install_readwrite_handler(0x0880, 0x0883, 0, 0, read8_delegate(FUNC(pia6821_device::read), pia_ic4ss), write8_delegate(FUNC(pia6821_device::write), pia_ic4ss));
2320   space->install_read_handler(0x08c0, 0x08c7, 0, 0, read8_delegate(FUNC(ptm6840_device::read), ptm_ic3ss));
2321   space->install_write_handler(0x08c0, 0x08c7, 0, 0, write8_delegate(FUNC(mpu4_state::ic3ss_w),state));
2319   space.install_readwrite_handler(0x0880, 0x0883, 0, 0, read8_delegate(FUNC(pia6821_device::read), pia_ic4ss), write8_delegate(FUNC(pia6821_device::write), pia_ic4ss));
2320   space.install_read_handler(0x08c0, 0x08c7, 0, 0, read8_delegate(FUNC(ptm6840_device::read), ptm_ic3ss));
2321   space.install_write_handler(0x08c0, 0x08c7, 0, 0, write8_delegate(FUNC(mpu4_state::ic3ss_w),state));
23222322}
23232323
2324void mpu4_install_mod4bwb_space(address_space *space)
2324void mpu4_install_mod4bwb_space(address_space &space)
23252325{
2326   mpu4_state *state = space->machine().driver_data<mpu4_state>();
2327   space->install_readwrite_handler(0x0810, 0x0810, 0, 0, read8_delegate(FUNC(mpu4_state::bwb_characteriser_r),state),write8_delegate(FUNC(mpu4_state::bwb_characteriser_w),state));
2326   mpu4_state *state = space.machine().driver_data<mpu4_state>();
2327   space.install_readwrite_handler(0x0810, 0x0810, 0, 0, read8_delegate(FUNC(mpu4_state::bwb_characteriser_r),state),write8_delegate(FUNC(mpu4_state::bwb_characteriser_w),state));
23282328   mpu4_install_mod4oki_space(space);
23292329}
23302330
r17963r17964
23592359
23602360MACHINE_START_MEMBER(mpu4_state,mpu4yam)
23612361{
2362   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
2362   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
23632363   mpu4_config_common(machine());
23642364
23652365   m_link7a_connected=0;
r17963r17964
23692369
23702370MACHINE_START_MEMBER(mpu4_state,mpu4oki)
23712371{
2372   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
2372   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
23732373   mpu4_config_common(machine());
23742374
23752375   m_link7a_connected=0;
r17963r17964
23792379
23802380MACHINE_START_MEMBER(mpu4_state,mpu4bwb)
23812381{
2382   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
2382   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
23832383   mpu4_config_common(machine());
23842384
23852385   m_link7a_connected=0;
r17963r17964
25882588
25892589DRIVER_INIT_MEMBER(mpu4_state,m4default_big)
25902590{
2591   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
2591   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
25922592   DRIVER_INIT_CALL(m4default);
25932593
25942594   int size = machine().root_device().memregion( "maincpu" )->bytes();
r17963r17964
25992599   else
26002600   {
26012601      m_bwb_bank=1;
2602      space->install_write_handler(0x0858, 0x0858, 0, 0, write8_delegate(FUNC(mpu4_state::bankswitch_w),this));
2603      space->install_write_handler(0x0878, 0x0878, 0, 0, write8_delegate(FUNC(mpu4_state::bankset_w),this));
2602      space.install_write_handler(0x0858, 0x0858, 0, 0, write8_delegate(FUNC(mpu4_state::bankswitch_w),this));
2603      space.install_write_handler(0x0878, 0x0878, 0, 0, write8_delegate(FUNC(mpu4_state::bankset_w),this));
26042604   }
26052605}
26062606
r17963r17964
26202620
26212621DRIVER_INIT_MEMBER(mpu4_state,m_frkstn)
26222622{
2623   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
2623   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
26242624   DRIVER_INIT_CALL(m4default_big);
2625   space->install_read_handler(0x0880, 0x0880, 0, 0, read8_delegate(FUNC(mpu4_state::crystal_sound_r),this));
2626   space->install_write_handler(0x0881, 0x0881, 0, 0, write8_delegate(FUNC(mpu4_state::crystal_sound_w),this));
2625   space.install_read_handler(0x0880, 0x0880, 0, 0, read8_delegate(FUNC(mpu4_state::crystal_sound_r),this));
2626   space.install_write_handler(0x0881, 0x0881, 0, 0, write8_delegate(FUNC(mpu4_state::crystal_sound_w),this));
26272627}
26282628
26292629// thanks to Project Amber for descramble information
trunk/src/mame/drivers/gamtor.c
r17963r17964
12541254DRIVER_INIT_MEMBER(gaminator_state,gaminator)
12551255{
12561256   pc_vga_init(machine(), vga_setting, NULL);
1257   pc_vga_gamtor_io_init(machine(), machine().device("maincpu")->memory().space(AS_PROGRAM), 0x44000000, machine().device("maincpu")->memory().space(AS_PROGRAM), 0x40000000);
1257   pc_vga_gamtor_io_init(machine(), *machine().device("maincpu")->memory().space(AS_PROGRAM), 0x44000000, *machine().device("maincpu")->memory().space(AS_PROGRAM), 0x40000000);
12581258}
12591259
12601260
trunk/src/mame/drivers/photoply.c
r17963r17964
378378DRIVER_INIT_MEMBER(photoply_state,photoply)
379379{
380380   pc_vga_init(machine(), vga_setting, NULL);
381   pc_vga_io_init(machine(), machine().device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, machine().device("maincpu")->memory().space(AS_IO), 0x0000);
381   pc_vga_io_init(machine(), *machine().device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, *machine().device("maincpu")->memory().space(AS_IO), 0x0000);
382382}
383383
384384GAME( 199?, photoply,  0,   photoply, photoply, photoply_state, photoply, ROT0, "Funworld", "Photo Play 2000 (v2.01)", GAME_NOT_WORKING|GAME_NO_SOUND )
trunk/src/mame/drivers/crystal.c
r17963r17964
195195static void IntReq( running_machine &machine, int num )
196196{
197197   crystal_state *state = machine.driver_data<crystal_state>();
198   address_space *space = state->m_maincpu->space(AS_PROGRAM);
199   UINT32 IntEn = space->read_dword(0x01800c08);
200   UINT32 IntPend = space->read_dword(0x01800c0c);
198   address_space &space = *state->m_maincpu->space(AS_PROGRAM);
199   UINT32 IntEn = space.read_dword(0x01800c08);
200   UINT32 IntPend = space.read_dword(0x01800c0c);
201201   if (IntEn & (1 << num))
202202   {
203203      IntPend |= (1 << num);
204      space->write_dword(0x01800c0c, IntPend);
204      space.write_dword(0x01800c0c, IntPend);
205205      state->m_maincpu->set_input_line(SE3208_INT, ASSERT_LINE);
206206   }
207207#ifdef IDLE_LOOP_SPEEDUP
r17963r17964
273273static IRQ_CALLBACK( icallback )
274274{
275275   crystal_state *state = device->machine().driver_data<crystal_state>();
276   address_space *space = device->memory().space(AS_PROGRAM);
277   UINT32 IntPend = space->read_dword(0x01800c0c);
276   address_space &space = *device->memory().space(AS_PROGRAM);
277   UINT32 IntPend = space.read_dword(0x01800c0c);
278278   int i;
279279
280280   for (i = 0; i < 32; ++i)
r17963r17964
309309   IntReq(machine, num[which]);
310310}
311311
312INLINE void Timer_w( address_space *space, int which, UINT32 data, UINT32 mem_mask )
312INLINE void Timer_w( address_space &space, int which, UINT32 data, UINT32 mem_mask )
313313{
314   crystal_state *state = space->machine().driver_data<crystal_state>();
314   crystal_state *state = space.machine().driver_data<crystal_state>();
315315
316316   if (((data ^ state->m_Timerctrl[which]) & 1) && (data & 1))   //Timer activate
317317   {
318318      int PD = (data >> 8) & 0xff;
319      int TCV = space->read_dword(0x01801404 + which * 8);
319      int TCV = space.read_dword(0x01801404 + which * 8);
320320      attotime period = attotime::from_hz(43000000) * ((PD + 1) * (TCV + 1));
321321
322322      if (state->m_Timerctrl[which] & 2)
r17963r17964
329329
330330WRITE32_MEMBER(crystal_state::Timer0_w)
331331{
332   Timer_w(&space, 0, data, mem_mask);
332   Timer_w(space, 0, data, mem_mask);
333333}
334334
335335READ32_MEMBER(crystal_state::Timer0_r)
r17963r17964
339339
340340WRITE32_MEMBER(crystal_state::Timer1_w)
341341{
342   Timer_w(&space, 1, data, mem_mask);
342   Timer_w(space, 1, data, mem_mask);
343343}
344344
345345READ32_MEMBER(crystal_state::Timer1_r)
r17963r17964
349349
350350WRITE32_MEMBER(crystal_state::Timer2_w)
351351{
352   Timer_w(&space, 2, data, mem_mask);
352   Timer_w(space, 2, data, mem_mask);
353353}
354354
355355READ32_MEMBER(crystal_state::Timer2_r)
r17963r17964
359359
360360WRITE32_MEMBER(crystal_state::Timer3_w)
361361{
362   Timer_w(&space, 3, data, mem_mask);
362   Timer_w(space, 3, data, mem_mask);
363363}
364364
365365READ32_MEMBER(crystal_state::Timer3_r)
r17963r17964
418418   COMBINE_DATA(&m_PIO);
419419}
420420
421INLINE void DMA_w( address_space *space, int which, UINT32 data, UINT32 mem_mask )
421INLINE void DMA_w( address_space &space, int which, UINT32 data, UINT32 mem_mask )
422422{
423   crystal_state *state = space->machine().driver_data<crystal_state>();
423   crystal_state *state = space.machine().driver_data<crystal_state>();
424424
425425   if (((data ^ state->m_DMActrl[which]) & (1 << 10)) && (data & (1 << 10)))   //DMAOn
426426   {
427427      UINT32 CTR = data;
428      UINT32 SRC = space->read_dword(0x01800804 + which * 0x10);
429      UINT32 DST = space->read_dword(0x01800808 + which * 0x10);
430      UINT32 CNT = space->read_dword(0x0180080C + which * 0x10);
428      UINT32 SRC = space.read_dword(0x01800804 + which * 0x10);
429      UINT32 DST = space.read_dword(0x01800808 + which * 0x10);
430      UINT32 CNT = space.read_dword(0x0180080C + which * 0x10);
431431      int i;
432432
433433      if (CTR & 0x2)   //32 bits
434434      {
435435         for (i = 0; i < CNT; ++i)
436436         {
437            UINT32 v = space->read_dword(SRC + i * 4);
438            space->write_dword(DST + i * 4, v);
437            UINT32 v = space.read_dword(SRC + i * 4);
438            space.write_dword(DST + i * 4, v);
439439         }
440440      }
441441      else if (CTR & 0x1)   //16 bits
442442      {
443443         for (i = 0; i < CNT; ++i)
444444         {
445            UINT16 v = space->read_word(SRC + i * 2);
446            space->write_word(DST + i * 2, v);
445            UINT16 v = space.read_word(SRC + i * 2);
446            space.write_word(DST + i * 2, v);
447447         }
448448      }
449449      else   //8 bits
450450      {
451451         for (i = 0; i < CNT; ++i)
452452         {
453            UINT8 v = space->read_byte(SRC + i);
454            space->write_byte(DST + i, v);
453            UINT8 v = space.read_byte(SRC + i);
454            space.write_byte(DST + i, v);
455455         }
456456      }
457457      data &= ~(1 << 10);
458      space->write_dword(0x0180080C + which * 0x10, 0);
459      IntReq(space->machine(), 7 + which);
458      space.write_dword(0x0180080C + which * 0x10, 0);
459      IntReq(space.machine(), 7 + which);
460460   }
461461   COMBINE_DATA(&state->m_DMActrl[which]);
462462}
r17963r17964
468468
469469WRITE32_MEMBER(crystal_state::DMA0_w)
470470{
471   DMA_w(&space, 0, data, mem_mask);
471   DMA_w(space, 0, data, mem_mask);
472472}
473473
474474READ32_MEMBER(crystal_state::DMA1_r)
r17963r17964
478478
479479WRITE32_MEMBER(crystal_state::DMA1_w)
480480{
481   DMA_w(&space, 1, data, mem_mask);
481   DMA_w(space, 1, data, mem_mask);
482482}
483483
484484
r17963r17964
636636   PatchReset(machine());
637637}
638638
639static UINT16 GetVidReg( address_space *space, UINT16 reg )
639static UINT16 GetVidReg( address_space &space, UINT16 reg )
640640{
641   return space->read_word(0x03000000 + reg);
641   return space.read_word(0x03000000 + reg);
642642}
643643
644static void SetVidReg( address_space *space, UINT16 reg, UINT16 val )
644static void SetVidReg( address_space &space, UINT16 reg, UINT16 val )
645645{
646   space->write_word(0x03000000 + reg, val);
646   space.write_word(0x03000000 + reg, val);
647647}
648648
649649
650650static SCREEN_UPDATE_IND16( crystal )
651651{
652652   crystal_state *state = screen.machine().driver_data<crystal_state>();
653   address_space *space = screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
653   address_space &space = *screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
654654   int DoFlip;
655655
656656   UINT32 B0 = 0x0;
r17963r17964
716716   if (vblank_on)
717717   {
718718      crystal_state *state = screen.machine().driver_data<crystal_state>();
719      address_space *space = screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
719      address_space &space = *screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
720720      UINT16 head, tail;
721721      int DoFlip = 0;
722722
r17963r17964
724724      tail = GetVidReg(space, 0x80);
725725      while ((head & 0x7ff) != (tail & 0x7ff))
726726      {
727         UINT16 Packet0 = space->read_word(0x03800000 + head * 64);
727         UINT16 Packet0 = space.read_word(0x03800000 + head * 64);
728728         if (Packet0 & 0x81)
729729            DoFlip = 1;
730730         head++;
trunk/src/mame/drivers/famibox.c
r17963r17964
174174{
175175   ppu2c0x_device *ppu = machine().device<ppu2c0x_device>("ppu");
176176   int source = (data & 7);
177   ppu->spriteram_dma(&space, source);
177   ppu->spriteram_dma(space, source);
178178}
179179
180180READ8_MEMBER(famibox_state::psg_4015_r)
trunk/src/mame/drivers/cshooter.c
r17963r17964
287287
288288READ8_MEMBER(cshooter_state::seibu_sound_comms_r)
289289{
290   return seibu_main_word_r(&space,offset,0x00ff);
290   return seibu_main_word_r(space,offset,0x00ff);
291291}
292292
293293WRITE8_MEMBER(cshooter_state::seibu_sound_comms_w)
294294{
295   seibu_main_word_w(&space,offset,data,0x00ff);
295   seibu_main_word_w(space,offset,data,0x00ff);
296296}
297297
298298static ADDRESS_MAP_START( airraid_map, AS_PROGRAM, 8, cshooter_state )
r17963r17964
676676
677677DRIVER_INIT_MEMBER(cshooter_state,cshootere)
678678{
679   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
679   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
680680   int A;
681681   UINT8 *rom = machine().root_device().memregion("maincpu")->base();
682682   UINT8 *decrypt = auto_alloc_array(machine(), UINT8, 0x8000);
683683
684   space->set_decrypted_region(0x0000, 0x7fff, decrypt);
684   space.set_decrypted_region(0x0000, 0x7fff, decrypt);
685685
686686   for (A = 0x0000;A < 0x8000;A++)
687687   {
trunk/src/mame/drivers/bzone.c
r17963r17964
876876
877877DRIVER_INIT_MEMBER(bzone_state,bradley)
878878{
879   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
880   space->install_ram(0x400, 0x7ff);
881   space->install_read_port(0x1808, 0x1808, "1808");
882   space->install_read_port(0x1809, 0x1809, "1809");
883   space->install_read_handler(0x180a, 0x180a, read8_delegate(FUNC(bzone_state::analog_data_r),this));
884   space->install_write_handler(0x1848, 0x1850, write8_delegate(FUNC(bzone_state::analog_select_w),this));
879   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
880   space.install_ram(0x400, 0x7ff);
881   space.install_read_port(0x1808, 0x1808, "1808");
882   space.install_read_port(0x1809, 0x1809, "1809");
883   space.install_read_handler(0x180a, 0x180a, read8_delegate(FUNC(bzone_state::analog_data_r),this));
884   space.install_write_handler(0x1848, 0x1850, write8_delegate(FUNC(bzone_state::analog_select_w),this));
885885}
886886
887887
trunk/src/mame/drivers/midqslvr.c
r17963r17964
253253
254254static UINT8 piix4_config_r(device_t *busdevice, device_t *device, int function, int reg)
255255{
256   address_space *space = busdevice->machine().firstcpu->space( AS_PROGRAM );
256   address_space &space = *busdevice->machine().firstcpu->space( AS_PROGRAM );
257257   midqslvr_state *state = busdevice->machine().driver_data<midqslvr_state>();
258258
259259   function &= 3;
r17963r17964
275275      return (((class_code_val[function]) >> (reg & 3)*8) & 0xff);
276276   }
277277
278   printf("%08x PIIX4: read %d, %02X\n", space->device().safe_pc(), function, reg);
278   printf("%08x PIIX4: read %d, %02X\n", space.device().safe_pc(), function, reg);
279279
280280   return state->m_piix4_config_reg[function][reg];
281281}
r17963r17964
672672
673673   kbdc8042_init(machine(), &at8042);
674674   pc_vga_init(machine(), vga_setting, NULL);
675   pc_vga_io_init(machine(), machine().device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, machine().device("maincpu")->memory().space(AS_IO), 0x0000);
675   pc_vga_io_init(machine(), *machine().device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, *machine().device("maincpu")->memory().space(AS_IO), 0x0000);
676676}
677677
678678void midqslvr_state::machine_reset()
trunk/src/mame/drivers/exterm.c
r17963r17964
9595 *
9696 *************************************/
9797
98static UINT16 exterm_trackball_port_r(address_space *space, int which, UINT16 mem_mask)
98static UINT16 exterm_trackball_port_r(address_space &space, int which, UINT16 mem_mask)
9999{
100   exterm_state *state = space->machine().driver_data<exterm_state>();
100   exterm_state *state = space.machine().driver_data<exterm_state>();
101101   UINT16 port;
102102
103103   /* Read the fake input port */
r17963r17964
125125
126126READ16_MEMBER(exterm_state::exterm_input_port_0_r)
127127{
128   return exterm_trackball_port_r(&space, 0, mem_mask);
128   return exterm_trackball_port_r(space, 0, mem_mask);
129129}
130130
131131
132132READ16_MEMBER(exterm_state::exterm_input_port_1_r)
133133{
134   return exterm_trackball_port_r(&space, 1, mem_mask);
134   return exterm_trackball_port_r(space, 1, mem_mask);
135135}
136136
137137
trunk/src/mame/drivers/seibuspi.c
r17963r17964
741741
742742/********************************************************************/
743743
744static UINT8 z80_fifoout_pop(address_space *space)
744static UINT8 z80_fifoout_pop(address_space &space)
745745{
746   seibuspi_state *state = space->machine().driver_data<seibuspi_state>();
746   seibuspi_state *state = space.machine().driver_data<seibuspi_state>();
747747   UINT8 r;
748748   if (state->m_fifoout_wpos == state->m_fifoout_rpos)
749749   {
750      logerror("Sound FIFOOUT underflow at %08X\n", space->device().safe_pc());
750      logerror("Sound FIFOOUT underflow at %08X\n", space.device().safe_pc());
751751   }
752752   r = state->m_fifoout_data[state->m_fifoout_rpos++];
753753   if(state->m_fifoout_rpos == FIFO_SIZE)
r17963r17964
763763   return r;
764764}
765765
766static void z80_fifoout_push(address_space *space, UINT8 data)
766static void z80_fifoout_push(address_space &space, UINT8 data)
767767{
768   seibuspi_state *state = space->machine().driver_data<seibuspi_state>();
768   seibuspi_state *state = space.machine().driver_data<seibuspi_state>();
769769   state->m_fifoout_data[state->m_fifoout_wpos++] = data;
770770   if (state->m_fifoout_wpos == FIFO_SIZE)
771771   {
r17963r17964
773773   }
774774   if(state->m_fifoout_wpos == state->m_fifoout_rpos)
775775   {
776      fatalerror("Sound FIFOOUT overflow at %08X\n", space->device().safe_pc());
776      fatalerror("Sound FIFOOUT overflow at %08X\n", space.device().safe_pc());
777777   }
778778
779779   state->m_fifoout_read_request = 1;
780780}
781781
782static UINT8 z80_fifoin_pop(address_space *space)
782static UINT8 z80_fifoin_pop(address_space &space)
783783{
784   seibuspi_state *state = space->machine().driver_data<seibuspi_state>();
784   seibuspi_state *state = space.machine().driver_data<seibuspi_state>();
785785   UINT8 r;
786786   if (state->m_fifoin_wpos == state->m_fifoin_rpos)
787787   {
788      fatalerror("Sound FIFOIN underflow at %08X\n", space->device().safe_pc());
788      fatalerror("Sound FIFOIN underflow at %08X\n", space.device().safe_pc());
789789   }
790790   r = state->m_fifoin_data[state->m_fifoin_rpos++];
791791   if(state->m_fifoin_rpos == FIFO_SIZE)
r17963r17964
801801   return r;
802802}
803803
804static void z80_fifoin_push(address_space *space, UINT8 data)
804static void z80_fifoin_push(address_space &space, UINT8 data)
805805{
806   seibuspi_state *state = space->machine().driver_data<seibuspi_state>();
806   seibuspi_state *state = space.machine().driver_data<seibuspi_state>();
807807   state->m_fifoin_data[state->m_fifoin_wpos++] = data;
808808   if(state->m_fifoin_wpos == FIFO_SIZE)
809809   {
r17963r17964
811811   }
812812   if(state->m_fifoin_wpos == state->m_fifoin_rpos)
813813   {
814      fatalerror("Sound FIFOIN overflow at %08X\n", space->device().safe_pc());
814      fatalerror("Sound FIFOIN overflow at %08X\n", space.device().safe_pc());
815815   }
816816
817817   state->m_fifoin_read_request = 1;
r17963r17964
835835
836836READ32_MEMBER(seibuspi_state::sound_fifo_r)
837837{
838   UINT8 r = z80_fifoout_pop(&space);
838   UINT8 r = z80_fifoout_pop(space);
839839
840840   return r;
841841}
r17963r17964
843843WRITE32_MEMBER(seibuspi_state::sound_fifo_w)
844844{
845845   if( ACCESSING_BITS_0_7 ) {
846      z80_fifoin_push(&space, data & 0xff);
846      z80_fifoin_push(space, data & 0xff);
847847   }
848848}
849849
r17963r17964
955955
956956READ8_MEMBER(seibuspi_state::z80_soundfifo_r)
957957{
958   UINT8 r = z80_fifoin_pop(&space);
958   UINT8 r = z80_fifoin_pop(space);
959959
960960   return r;
961961}
962962
963963WRITE8_MEMBER(seibuspi_state::z80_soundfifo_w)
964964{
965   z80_fifoout_push(&space, data);
965   z80_fifoout_push(space, data);
966966}
967967
968968READ8_MEMBER(seibuspi_state::z80_soundfifo_status_r)
trunk/src/mame/drivers/coolpool.c
r17963r17964
109109 *
110110 *************************************/
111111
112static void coolpool_to_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
112static void coolpool_to_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg)
113113{
114   coolpool_state *state = space->machine().driver_data<coolpool_state>();
114   coolpool_state *state = space.machine().driver_data<coolpool_state>();
115115
116116   memcpy(shiftreg, &state->m_vram_base[TOWORD(address) & ~TOWORD(0xfff)], TOBYTE(0x1000));
117117}
118118
119119
120static void coolpool_from_shiftreg(address_space *space, UINT32 address, UINT16 *shiftreg)
120static void coolpool_from_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg)
121121{
122   coolpool_state *state = space->machine().driver_data<coolpool_state>();
122   coolpool_state *state = space.machine().driver_data<coolpool_state>();
123123
124124   memcpy(&state->m_vram_base[TOWORD(address) & ~TOWORD(0xfff)], shiftreg, TOBYTE(0x1000));
125125}
r17963r17964
308308   return data;
309309}
310310
311static int amerdart_trackball_direction(address_space *space, int num, int data)
311static int amerdart_trackball_direction(address_space &space, int num, int data)
312312{
313   coolpool_state *state = space->machine().driver_data<coolpool_state>();
313   coolpool_state *state = space.machine().driver_data<coolpool_state>();
314314
315315   UINT16 result_x = (data & 0x0c) >> 2;
316316   UINT16 result_y = (data & 0x03) >> 0;
r17963r17964
415415   m_dy[2] = (INT8)(m_newy[2] - m_oldy[2]);
416416
417417   /* Determine Trackball 1 direction state */
418   m_result = (m_result & 0xf0ff) | (amerdart_trackball_direction(&space, 1, ((m_result >>  8) & 0xf)) <<  8);
418   m_result = (m_result & 0xf0ff) | (amerdart_trackball_direction(space, 1, ((m_result >>  8) & 0xf)) <<  8);
419419
420420   /* Determine Trackball 2 direction state */
421   m_result = (m_result & 0x0fff) | (amerdart_trackball_direction(&space, 2, ((m_result >> 12) & 0xf)) << 12);
421   m_result = (m_result & 0x0fff) | (amerdart_trackball_direction(space, 2, ((m_result >> 12) & 0xf)) << 12);
422422
423423
424424//  logerror("%08X:read port 6 (X=%02X Y=%02X oldX=%02X oldY=%02X oldRes=%04X Res=%04X)\n", space.device().safe_pc(), m_newx, m_newy, m_oldx, m_oldy, m_lastresult, m_result);
trunk/src/mame/drivers/system1.c
r17963r17964
47044704
47054705DRIVER_INIT_MEMBER(system1_state,nob)
47064706{
4707   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
4707   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
47084708   address_space *iospace = machine().device("maincpu")->memory().space(AS_IO);
47094709
47104710   DRIVER_INIT_CALL(bank44);
r17963r17964
47124712   /* hack to fix incorrect JMP at start, which should obviously be to $0080 */
47134713   /* patching the ROM causes errors in the self-test */
47144714   /* in real-life, it could be some behavior dependent upon M1 */
4715   space->install_read_handler(0x0001, 0x0001, read8_delegate(FUNC(system1_state::nob_start_r),this));
4715   space.install_read_handler(0x0001, 0x0001, read8_delegate(FUNC(system1_state::nob_start_r),this));
47164716
47174717   /* install MCU communications */
47184718   iospace->install_readwrite_handler(0x18, 0x18, 0x00, 0x00, read8_delegate(FUNC(system1_state::nob_maincpu_latch_r),this), write8_delegate(FUNC(system1_state::nob_maincpu_latch_w),this));
r17963r17964
47524752
47534753DRIVER_INIT_MEMBER(system1_state,bootleg)
47544754{
4755   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
4756   space->set_decrypted_region(0x0000, 0x7fff, machine().root_device().memregion("maincpu")->base() + 0x10000);
4755   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
4756   space.set_decrypted_region(0x0000, 0x7fff, machine().root_device().memregion("maincpu")->base() + 0x10000);
47574757   DRIVER_INIT_CALL(bank00);
47584758}
47594759
47604760
47614761DRIVER_INIT_MEMBER(system1_state,bootsys2)
47624762{
4763   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
4764   space->set_decrypted_region(0x0000, 0x7fff, machine().root_device().memregion("maincpu")->base() + 0x20000);
4763   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
4764   space.set_decrypted_region(0x0000, 0x7fff, machine().root_device().memregion("maincpu")->base() + 0x20000);
47654765   machine().root_device().membank("bank1")->configure_decrypted_entries(0, 4, machine().root_device().memregion("maincpu")->base() + 0x30000, 0x4000);
47664766   DRIVER_INIT_CALL(bank0c);
47674767}
trunk/src/mame/drivers/niyanpai.c
r17963r17964
245245
246246void niyanpai_state::machine_reset()
247247{
248   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
248   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
249249   int i;
250250
251251   // initialize TMPZ84C011 PIO
252252   for (i = 0; i < 5; i++)
253253   {
254254      m_pio_dir[i] = m_pio_latch[i] = 0;
255      tmpz84c011_pio_w(*space, i, 0);
255      tmpz84c011_pio_w(space, i, 0);
256256   }
257257}
258258
r17963r17964
308308
309309CUSTOM_INPUT_MEMBER(niyanpai_state::musobana_outcoin_flag_r)
310310{
311   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
311   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
312312   // tmp68301_parallel_interface[0x05]
313313   //  bit 0   coin counter
314314   //  bit 2   motor on
trunk/src/mame/drivers/bfm_sc2.c
r17963r17964
36943694MACHINE_START_MEMBER(bfm_sc2_state,sc2dmd)
36953695{
36963696
3697   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
3698   space->install_write_handler(0x2800, 0x2800, 0, 0, write8_delegate(FUNC(bfm_sc2_state::vfd1_dmd_w),this));
3699   space->install_write_handler(0x2900, 0x2900, 0, 0, write8_delegate(FUNC(bfm_sc2_state::dmd_reset_w),this));
3697   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
3698   space.install_write_handler(0x2800, 0x2800, 0, 0, write8_delegate(FUNC(bfm_sc2_state::vfd1_dmd_w),this));
3699   space.install_write_handler(0x2900, 0x2900, 0, 0, write8_delegate(FUNC(bfm_sc2_state::dmd_reset_w),this));
37003700}
37013701
37023702/* machine driver for scorpion2 board */
trunk/src/mame/drivers/shootout.c
r17963r17964
404404
405405DRIVER_INIT_MEMBER(shootout_state,shootout)
406406{
407   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
407   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
408408   int length = machine().root_device().memregion("maincpu")->bytes();
409409   UINT8 *decrypt = auto_alloc_array(machine(), UINT8, length - 0x8000);
410410   UINT8 *rom = machine().root_device().memregion("maincpu")->base();
411411   int A;
412412
413   space->set_decrypted_region(0x8000, 0xffff, decrypt);
413   space.set_decrypted_region(0x8000, 0xffff, decrypt);
414414
415415   for (A = 0x8000;A < length;A++)
416416      decrypt[A-0x8000] = (rom[A] & 0x9f) | ((rom[A] & 0x40) >> 1) | ((rom[A] & 0x20) << 1);
trunk/src/mame/drivers/calchase.c
r17963r17964
977977   m_bios_ram = auto_alloc_array(machine(), UINT32, 0x20000/4);
978978
979979   pc_vga_init(machine(), vga_setting, NULL);
980   pc_svga_trident_io_init(machine(), machine().device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, machine().device("maincpu")->memory().space(AS_IO), 0x0000);
980   pc_svga_trident_io_init(machine(), *machine().device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, *machine().device("maincpu")->memory().space(AS_IO), 0x0000);
981981   init_pc_common(machine(), PCCOMMON_KEYBOARD_AT, calchase_set_keyb_int);
982982
983983   intel82439tx_init(machine());
trunk/src/mame/drivers/mouser.c
r17963r17964
289289   /* Decode the opcodes */
290290
291291   offs_t i;
292   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
292   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
293293   UINT8 *rom = machine().root_device().memregion("maincpu")->base();
294294   UINT8 *decrypted = auto_alloc_array(machine(), UINT8, 0x6000);
295295   UINT8 *table = machine().root_device().memregion("user1")->base();
296296
297   space->set_decrypted_region(0x0000, 0x5fff, decrypted);
297   space.set_decrypted_region(0x0000, 0x5fff, decrypted);
298298
299299   for (i = 0; i < 0x6000; i++)
300300   {
trunk/src/mame/drivers/mpu3.c
r17963r17964
933933
934934DRIVER_INIT_MEMBER(mpu3_state,m3hprvpr)
935935{
936   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
936   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
937937
938938   m_disp_func=METER_PORT;
939939   m_current_chr_table = hprvpr_data;
940   space->install_readwrite_handler(0xc000, 0xc000 , read8_delegate(FUNC(mpu3_state::characteriser_r), this),write8_delegate(FUNC(mpu3_state::characteriser_w), this));
940   space.install_readwrite_handler(0xc000, 0xc000 , read8_delegate(FUNC(mpu3_state::characteriser_r), this),write8_delegate(FUNC(mpu3_state::characteriser_w), this));
941941
942942}
943943
trunk/src/mame/drivers/aleck64.c
r17963r17964
188188         break;
189189
190190      default:
191         logerror("Unknown aleck_dips_w(0x%08x, 0x%08x, %08x) @ 0x%08x PC=%08x\n", offset, data, mem_mask, 0xc0800000 + offset*4, space->device().safe_pc());
191         logerror("Unknown aleck_dips_w(0x%08x, 0x%08x, %08x) @ 0x%08x PC=%08x\n", offset, data, mem_mask, 0xc0800000 + offset*4, space.device().safe_pc());
192192   }
193193}
194194
r17963r17964
199199   switch( offset )
200200   {
201201      case 0:
202         return (space->machine().root_device().ioport("IN0")->read());   /* mtetrisc has regular inputs here */
202         return (space.machine().root_device().ioport("IN0")->read());   /* mtetrisc has regular inputs here */
203203      case 1:
204         return (space->machine().root_device().ioport("IN1")->read());
204         return (space.machine().root_device().ioport("IN1")->read());
205205      case 2:
206206      {
207         UINT32 val = space->machine().root_device().ioport("INMJ")->read();
207         UINT32 val = space.machine().root_device().ioport("INMJ")->read();
208208
209209         switch( dip_read_offset >> 8 & 0xff )
210210         {
r17963r17964
227227      }
228228      default:
229229      {
230         logerror("Unknown aleck_dips_r(0x%08x, 0x%08x) @ 0x%08x PC=%08x\n", offset, 0xc0800000 + offset*4, mem_mask, space->device().safe_pc());
230         logerror("Unknown aleck_dips_r(0x%08x, 0x%08x) @ 0x%08x PC=%08x\n", offset, 0xc0800000 + offset*4, mem_mask, space.device().safe_pc());
231231         return 0;
232232      }
233233   }
trunk/src/mame/drivers/trackfld.c
r17963r17964
14471447
14481448DRIVER_INIT_MEMBER(trackfld_state,atlantol)
14491449{
1450   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
1450   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
14511451   UINT8 *rom = machine().root_device().memregion("maincpu")->base();
14521452   UINT8 *decrypt;
14531453   int A;
r17963r17964
14591459   for (A = 0; A < 0x6000; A++)
14601460      decrypt[A] = rom[A];
14611461
1462   space->set_decrypted_region(0x0000, 0xffff, decrypt);
1462   space.set_decrypted_region(0x0000, 0xffff, decrypt);
14631463
1464   space->install_write_handler(0x0800, 0x0800, write8_delegate(FUNC(trackfld_state::atlantol_gfxbank_w),this));
1465   space->nop_write(0x1000, 0x1000);
1464   space.install_write_handler(0x0800, 0x0800, write8_delegate(FUNC(trackfld_state::atlantol_gfxbank_w),this));
1465   space.nop_write(0x1000, 0x1000);
14661466
14671467   /* unmapped areas read as ROM */
1468   space->install_read_bank(0x0000, 0x11ff, "bank10");
1469   space->install_read_bank(0x1380, 0x17ff, "bank11");
1470   space->install_read_bank(0x2000, 0x27ff, "bank12");
1471   space->install_read_bank(0x4000, 0x5fff, "bank13");
1468   space.install_read_bank(0x0000, 0x11ff, "bank10");
1469   space.install_read_bank(0x1380, 0x17ff, "bank11");
1470   space.install_read_bank(0x2000, 0x27ff, "bank12");
1471   space.install_read_bank(0x4000, 0x5fff, "bank13");
14721472   membank("bank10")->set_base(&rom[0x0000]);
14731473   membank("bank11")->set_base(&rom[0x1380]);
14741474   membank("bank12")->set_base(&rom[0x2000]);
trunk/src/mame/drivers/vegas.c
r17963r17964
608608
609609static WRITE32_HANDLER( cmos_unlock_w )
610610{
611   vegas_state *state = space->machine().driver_data<vegas_state>();
611   vegas_state *state = space.machine().driver_data<vegas_state>();
612612   state->m_cmos_unlocked = 1;
613613}
614614
615615
616616static WRITE32_HANDLER( timekeeper_w )
617617{
618   vegas_state *state = space->machine().driver_data<vegas_state>();
618   vegas_state *state = space.machine().driver_data<vegas_state>();
619619   if (state->m_cmos_unlocked)
620620   {
621621      if ((mem_mask & 0x000000ff) != 0)
r17963r17964
631631      state->m_cmos_unlocked = 0;
632632   }
633633   else
634      logerror("%08X:timekeeper_w(%04X,%08X & %08X) without CMOS unlocked\n", space->device().safe_pc(), offset, data, mem_mask);
634      logerror("%08X:timekeeper_w(%04X,%08X & %08X) without CMOS unlocked\n", space.device().safe_pc(), offset, data, mem_mask);
635635}
636636
637637
638638static READ32_HANDLER( timekeeper_r )
639639{
640   vegas_state *state = space->machine().driver_data<vegas_state>();
640   vegas_state *state = space.machine().driver_data<vegas_state>();
641641   UINT32 result = 0xffffffff;
642642   if ((mem_mask & 0x000000ff) != 0)
643643      result = (result & ~0x000000ff) | (state->m_timekeeper->read(offset * 4 + 0) << 0);
r17963r17964
662662
663663static READ32_HANDLER( pci_bridge_r )
664664{
665   vegas_state *state = space->machine().driver_data<vegas_state>();
665   vegas_state *state = space.machine().driver_data<vegas_state>();
666666   UINT32 result = state->m_pci_bridge_regs[offset];
667667
668668   switch (offset)
r17963r17964
677677   }
678678
679679   if (LOG_PCI)
680      logerror("%06X:PCI bridge read: reg %d = %08X\n", space->device().safe_pc(), offset, result);
680      logerror("%06X:PCI bridge read: reg %d = %08X\n", space.device().safe_pc(), offset, result);
681681   return result;
682682}
683683
684684
685685static WRITE32_HANDLER( pci_bridge_w )
686686{
687   vegas_state *state = space->machine().driver_data<vegas_state>();
687   vegas_state *state = space.machine().driver_data<vegas_state>();
688688   state->m_pci_bridge_regs[offset] = data;
689689   if (LOG_PCI)
690      logerror("%06X:PCI bridge write: reg %d = %08X\n", space->device().safe_pc(), offset, data);
690      logerror("%06X:PCI bridge write: reg %d = %08X\n", space.device().safe_pc(), offset, data);
691691}
692692
693693
r17963r17964
700700
701701static READ32_HANDLER( pci_ide_r )
702702{
703   vegas_state *state = space->machine().driver_data<vegas_state>();
703   vegas_state *state = space.machine().driver_data<vegas_state>();
704704   UINT32 result = state->m_pci_ide_regs[offset];
705705
706706   switch (offset)
r17963r17964
717717   }
718718
719719   if (LOG_PCI)
720      logerror("%06X:PCI IDE read: reg %d = %08X\n", space->device().safe_pc(), offset, result);
720      logerror("%06X:PCI IDE read: reg %d = %08X\n", space.device().safe_pc(), offset, result);
721721   return result;
722722}
723723
724724
725725static WRITE32_HANDLER( pci_ide_w )
726726{
727   vegas_state *state = space->machine().driver_data<vegas_state>();
727   vegas_state *state = space.machine().driver_data<vegas_state>();
728728   state->m_pci_ide_regs[offset] = data;
729729
730730   switch (offset)
731731   {
732732      case 0x04:      /* address register */
733733         state->m_pci_ide_regs[offset] &= 0xfffffff0;
734         remap_dynamic_addresses(space->machine());
734         remap_dynamic_addresses(space.machine());
735735         break;
736736
737737      case 0x05:      /* address register */
738738         state->m_pci_ide_regs[offset] &= 0xfffffffc;
739         remap_dynamic_addresses(space->machine());
739         remap_dynamic_addresses(space.machine());
740740         break;
741741
742742      case 0x08:      /* address register */
743743         state->m_pci_ide_regs[offset] &= 0xfffffff0;
744         remap_dynamic_addresses(space->machine());
744         remap_dynamic_addresses(space.machine());
745745         break;
746746
747747      case 0x14:      /* interrupt pending */
748748         if (data & 4)
749            ide_interrupt(space->machine().device("ide"), 0);
749            ide_interrupt(space.machine().device("ide"), 0);
750750         break;
751751   }
752752   if (LOG_PCI)
753      logerror("%06X:PCI IDE write: reg %d = %08X\n", space->device().safe_pc(), offset, data);
753      logerror("%06X:PCI IDE write: reg %d = %08X\n", space.device().safe_pc(), offset, data);
754754}
755755
756756
r17963r17964
763763
764764static READ32_HANDLER( pci_3dfx_r )
765765{
766   vegas_state *state = space->machine().driver_data<vegas_state>();
766   vegas_state *state = space.machine().driver_data<vegas_state>();
767767   int voodoo_type = voodoo_get_type(state->m_voodoo);
768768   UINT32 result = state->m_pci_3dfx_regs[offset];
769769
r17963r17964
790790   }
791791
792792   if (LOG_PCI)
793      logerror("%06X:PCI 3dfx read: reg %d = %08X\n", space->device().safe_pc(), offset, result);
793      logerror("%06X:PCI 3dfx read: reg %d = %08X\n", space.device().safe_pc(), offset, result);
794794   return result;
795795}
796796
797797
798798static WRITE32_HANDLER( pci_3dfx_w )
799799{
800   vegas_state *state = space->machine().driver_data<vegas_state>();
800   vegas_state *state = space.machine().driver_data<vegas_state>();
801801   int voodoo_type = voodoo_get_type(state->m_voodoo);
802802
803803   state->m_pci_3dfx_regs[offset] = data;
r17963r17964
809809            state->m_pci_3dfx_regs[offset] &= 0xff000000;
810810         else
811811            state->m_pci_3dfx_regs[offset] &= 0xfe000000;
812         remap_dynamic_addresses(space->machine());
812         remap_dynamic_addresses(space.machine());
813813         break;
814814
815815      case 0x05:      /* address register */
816816         if (voodoo_type >= TYPE_VOODOO_BANSHEE)
817817         {
818818            state->m_pci_3dfx_regs[offset] &= 0xfe000000;
819            remap_dynamic_addresses(space->machine());
819            remap_dynamic_addresses(space.machine());
820820         }
821821         break;
822822
r17963r17964
824824         if (voodoo_type >= TYPE_VOODOO_BANSHEE)
825825         {
826826            state->m_pci_3dfx_regs[offset] &= 0xffffff00;
827            remap_dynamic_addresses(space->machine());
827            remap_dynamic_addresses(space.machine());
828828         }
829829         break;
830830
r17963r17964
832832         if (voodoo_type >= TYPE_VOODOO_BANSHEE)
833833         {
834834            state->m_pci_3dfx_regs[offset] &= 0xffff0000;
835            remap_dynamic_addresses(space->machine());
835            remap_dynamic_addresses(space.machine());
836836         }
837837         break;
838838
r17963r17964
842842
843843   }
844844   if (LOG_PCI)
845      logerror("%06X:PCI 3dfx write: reg %d = %08X\n", space->device().safe_pc(), offset, data);
845      logerror("%06X:PCI 3dfx write: reg %d = %08X\n", space.device().safe_pc(), offset, data);
846846}
847847
848848
r17963r17964
953953
954954static READ32_HANDLER( nile_r )
955955{
956   vegas_state *state = space->machine().driver_data<vegas_state>();
956   vegas_state *state = space.machine().driver_data<vegas_state>();
957957   UINT32 result = state->m_nile_regs[offset];
958958   int logit = 1, which;
959959
r17963r17964
961961   {
962962      case NREG_CPUSTAT+0:   /* CPU status */
963963      case NREG_CPUSTAT+1:   /* CPU status */
964         if (LOG_NILE) logerror("%08X:NILE READ: CPU status(%03X) = %08X\n", space->device().safe_pc(), offset*4, result);
964         if (LOG_NILE) logerror("%08X:NILE READ: CPU status(%03X) = %08X\n", space.device().safe_pc(), offset*4, result);
965965         logit = 0;
966966         break;
967967
968968      case NREG_INTCTRL+0:   /* Interrupt control */
969969      case NREG_INTCTRL+1:   /* Interrupt control */
970         if (LOG_NILE) logerror("%08X:NILE READ: interrupt control(%03X) = %08X\n", space->device().safe_pc(), offset*4, result);
970         if (LOG_NILE) logerror("%08X:NILE READ: interrupt control(%03X) = %08X\n", space.device().safe_pc(), offset*4, result);
971971         logit = 0;
972972         break;
973973
974974      case NREG_INTSTAT0+0:   /* Interrupt status 0 */
975975      case NREG_INTSTAT0+1:   /* Interrupt status 0 */
976         if (LOG_NILE) logerror("%08X:NILE READ: interrupt status 0(%03X) = %08X\n", space->device().safe_pc(), offset*4, result);
976         if (LOG_NILE) logerror("%08X:NILE READ: interrupt status 0(%03X) = %08X\n", space.device().safe_pc(), offset*4, result);
977977         logit = 0;
978978         break;
979979
980980      case NREG_INTSTAT1+0:   /* Interrupt status 1 */
981981      case NREG_INTSTAT1+1:   /* Interrupt status 1 */
982         if (LOG_NILE) logerror("%08X:NILE READ: interrupt status 1/enable(%03X) = %08X\n", space->device().safe_pc(), offset*4, result);
982         if (LOG_NILE) logerror("%08X:NILE READ: interrupt status 1/enable(%03X) = %08X\n", space.device().safe_pc(), offset*4, result);
983983         logit = 0;
984984         break;
985985
986986      case NREG_INTCLR+0:      /* Interrupt clear */
987987      case NREG_INTCLR+1:      /* Interrupt clear */
988         if (LOG_NILE) logerror("%08X:NILE READ: interrupt clear(%03X) = %08X\n", space->device().safe_pc(), offset*4, result);
988         if (LOG_NILE) logerror("%08X:NILE READ: interrupt clear(%03X) = %08X\n", space.device().safe_pc(), offset*4, result);
989989         logit = 0;
990990         break;
991991
992992      case NREG_INTPPES+0:   /* PCI Interrupt control */
993993      case NREG_INTPPES+1:   /* PCI Interrupt control */
994         if (LOG_NILE) logerror("%08X:NILE READ: PCI interrupt control(%03X) = %08X\n", space->device().safe_pc(), offset*4, result);
994         if (LOG_NILE) logerror("%08X:NILE READ: PCI interrupt control(%03X) = %08X\n", space.device().safe_pc(), offset*4, result);
995995         logit = 0;
996996         break;
997997
r17963r17964
10181018            result = state->m_nile_regs[offset + 1] = state->m_timer[which]->remaining().as_double() * (double)SYSTEM_CLOCK;
10191019         }
10201020
1021         if (LOG_TIMERS) logerror("%08X:NILE READ: timer %d counter(%03X) = %08X\n", space->device().safe_pc(), which, offset*4, result);
1021         if (LOG_TIMERS) logerror("%08X:NILE READ: timer %d counter(%03X) = %08X\n", space.device().safe_pc(), which, offset*4, result);
10221022         logit = 0;
10231023         break;
10241024
r17963r17964
10591059   }
10601060
10611061   if (LOG_NILE && logit)
1062      logerror("%06X:nile read from offset %03X = %08X\n", space->device().safe_pc(), offset*4, result);
1062      logerror("%06X:nile read from offset %03X = %08X\n", space.device().safe_pc(), offset*4, result);
10631063   return result;
10641064}
10651065
10661066
10671067static WRITE32_HANDLER( nile_w )
10681068{
1069   vegas_state *state = space->machine().driver_data<vegas_state>();
1069   vegas_state *state = space.machine().driver_data<vegas_state>();
10701070   UINT32 olddata = state->m_nile_regs[offset];
10711071   int logit = 1, which;
10721072
r17963r17964
10761076   {
10771077      case NREG_CPUSTAT+0:   /* CPU status */
10781078      case NREG_CPUSTAT+1:   /* CPU status */
1079         if (LOG_NILE) logerror("%08X:NILE WRITE: CPU status(%03X) = %08X & %08X\n", space->device().safe_pc(), offset*4, data, mem_mask);
1079         if (LOG_NILE) logerror("%08X:NILE WRITE: CPU status(%03X) = %08X & %08X\n", space.device().safe_pc(), offset*4, data, mem_mask);
10801080         logit = 0;
10811081         break;
10821082
10831083      case NREG_INTCTRL+0:   /* Interrupt control */
10841084      case NREG_INTCTRL+1:   /* Interrupt control */
1085         if (LOG_NILE) logerror("%08X:NILE WRITE: interrupt control(%03X) = %08X & %08X\n", space->device().safe_pc(), offset*4, data, mem_mask);
1085         if (LOG_NILE) logerror("%08X:NILE WRITE: interrupt control(%03X) = %08X & %08X\n", space.device().safe_pc(), offset*4, data, mem_mask);
10861086         logit = 0;
1087         update_nile_irqs(space->machine());
1087         update_nile_irqs(space.machine());
10881088         break;
10891089
10901090      case NREG_INTSTAT0+0:   /* Interrupt status 0 */
10911091      case NREG_INTSTAT0+1:   /* Interrupt status 0 */
1092         if (LOG_NILE) logerror("%08X:NILE WRITE: interrupt status 0(%03X) = %08X & %08X\n", space->device().safe_pc(), offset*4, data, mem_mask);
1092         if (LOG_NILE) logerror("%08X:NILE WRITE: interrupt status 0(%03X) = %08X & %08X\n", space.device().safe_pc(), offset*4, data, mem_mask);
10931093         logit = 0;
1094         update_nile_irqs(space->machine());
1094         update_nile_irqs(space.machine());
10951095         break;
10961096
10971097      case NREG_INTSTAT1+0:   /* Interrupt status 1 */
10981098      case NREG_INTSTAT1+1:   /* Interrupt status 1 */
1099         if (LOG_NILE) logerror("%08X:NILE WRITE: interrupt status 1/enable(%03X) = %08X & %08X\n", space->device().safe_pc(), offset*4, data, mem_mask);
1099         if (LOG_NILE) logerror("%08X:NILE WRITE: interrupt status 1/enable(%03X) = %08X & %08X\n", space.device().safe_pc(), offset*4, data, mem_mask);
11001100         logit = 0;
1101         update_nile_irqs(space->machine());
1101         update_nile_irqs(space.machine());
11021102         break;
11031103
11041104      case NREG_INTCLR+0:      /* Interrupt clear */
11051105      case NREG_INTCLR+1:      /* Interrupt clear */
1106         if (LOG_NILE) logerror("%08X:NILE WRITE: interrupt clear(%03X) = %08X & %08X\n", space->device().safe_pc(), offset*4, data, mem_mask);
1106         if (LOG_NILE) logerror("%08X:NILE WRITE: interrupt clear(%03X) = %08X & %08X\n", space.device().safe_pc(), offset*4, data, mem_mask);
11071107         logit = 0;
11081108         state->m_nile_irq_state &= ~(state->m_nile_regs[offset] & ~0xf00);
1109         update_nile_irqs(space->machine());
1109         update_nile_irqs(space.machine());
11101110         break;
11111111
11121112      case NREG_INTPPES+0:   /* PCI Interrupt control */
11131113      case NREG_INTPPES+1:   /* PCI Interrupt control */
1114         if (LOG_NILE) logerror("%08X:NILE WRITE: PCI interrupt control(%03X) = %08X & %08X\n", space->device().safe_pc(), offset*4, data, mem_mask);
1114         if (LOG_NILE) logerror("%08X:NILE WRITE: PCI interrupt control(%03X) = %08X & %08X\n", space.device().safe_pc(), offset*4, data, mem_mask);
11151115         logit = 0;
11161116         break;
11171117
r17963r17964
11271127
11281128      case NREG_PCIINIT1+0:   /* PCI master */
11291129         if (((olddata & 0xe) == 0xa) != ((state->m_nile_regs[offset] & 0xe) == 0xa))
1130            remap_dynamic_addresses(space->machine());
1130            remap_dynamic_addresses(space.machine());
11311131         logit = 0;
11321132         break;
11331133
r17963r17964
11361136      case NREG_T2CTRL+1:      /* general purpose timer control (control bits) */
11371137      case NREG_T3CTRL+1:      /* watchdog timer control (control bits) */
11381138         which = (offset - NREG_T0CTRL) / 4;
1139         if (LOG_NILE) logerror("%08X:NILE WRITE: timer %d control(%03X) = %08X & %08X\n", space->device().safe_pc(), which, offset*4, data, mem_mask);
1139         if (LOG_NILE) logerror("%08X:NILE WRITE: timer %d control(%03X) = %08X & %08X\n", space.device().safe_pc(), which, offset*4, data, mem_mask);
11401140         logit = 0;
11411141
11421142         /* timer just enabled? */
r17963r17964
11651165      case NREG_T2CNTR:      /* general purpose timer control (counter) */
11661166      case NREG_T3CNTR:      /* watchdog timer control (counter) */
11671167         which = (offset - NREG_T0CTRL) / 4;
1168         if (LOG_TIMERS) logerror("%08X:NILE WRITE: timer %d counter(%03X) = %08X & %08X\n", space->device().safe_pc(), which, offset*4, data, mem_mask);
1168         if (LOG_TIMERS) logerror("%08X:NILE WRITE: timer %d counter(%03X) = %08X & %08X\n", space.device().safe_pc(), which, offset*4, data, mem_mask);
11691169         logit = 0;
11701170
11711171         if (state->m_nile_regs[offset - 1] & 1)
r17963r17964
11811181         logit = 0;
11821182         break;
11831183      case NREG_UARTIER:      /* serial interrupt enable */
1184         update_nile_irqs(space->machine());
1184         update_nile_irqs(space.machine());
11851185         break;
11861186
11871187      case NREG_VID:
r17963r17964
12151215      case NREG_DCS8:
12161216      case NREG_PCIW0:
12171217      case NREG_PCIW1:
1218         remap_dynamic_addresses(space->machine());
1218         remap_dynamic_addresses(space.machine());
12191219         break;
12201220   }
12211221
12221222   if (LOG_NILE && logit)
1223      logerror("%06X:nile write to offset %03X = %08X & %08X\n", space->device().safe_pc(), offset*4, data, mem_mask);
1223      logerror("%06X:nile write to offset %03X = %08X & %08X\n", space.device().safe_pc(), offset*4, data, mem_mask);
12241224}
12251225
12261226
r17963r17964
13031303
13041304static READ32_HANDLER( sio_irq_clear_r )
13051305{
1306   vegas_state *state = space->machine().driver_data<vegas_state>();
1306   vegas_state *state = space.machine().driver_data<vegas_state>();
13071307   return state->m_sio_irq_clear;
13081308}
13091309
13101310
13111311static WRITE32_HANDLER( sio_irq_clear_w )
13121312{
1313   vegas_state *state = space->machine().driver_data<vegas_state>();
1313   vegas_state *state = space.machine().driver_data<vegas_state>();
13141314   if (ACCESSING_BITS_0_7)
13151315   {
13161316      state->m_sio_irq_clear = data;
r17963r17964
13181318      /* bit 0x01 seems to be used to reset the IOASIC */
13191319      if (!(data & 0x01))
13201320      {
1321         midway_ioasic_reset(space->machine());
1322         dcs_reset_w(space->machine(), data & 0x01);
1321         midway_ioasic_reset(space.machine());
1322         dcs_reset_w(space.machine(), data & 0x01);
13231323      }
13241324
13251325      /* they toggle bit 0x08 low to reset the VBLANK */
13261326      if (!(data & 0x08))
13271327      {
13281328         state->m_sio_irq_state &= ~0x20;
1329         update_sio_irqs(space->machine());
1329         update_sio_irqs(space.machine());
13301330      }
13311331   }
13321332}
r17963r17964
13341334
13351335static READ32_HANDLER( sio_irq_enable_r )
13361336{
1337   vegas_state *state = space->machine().driver_data<vegas_state>();
1337   vegas_state *state = space.machine().driver_data<vegas_state>();
13381338   return state->m_sio_irq_enable;
13391339}
13401340
13411341
13421342static WRITE32_HANDLER( sio_irq_enable_w )
13431343{
1344   vegas_state *state = space->machine().driver_data<vegas_state>();
1344   vegas_state *state = space.machine().driver_data<vegas_state>();
13451345   if (ACCESSING_BITS_0_7)
13461346   {
13471347      state->m_sio_irq_enable = data;
1348      update_sio_irqs(space->machine());
1348      update_sio_irqs(space.machine());
13491349   }
13501350}
13511351
13521352
13531353static READ32_HANDLER( sio_irq_cause_r )
13541354{
1355   vegas_state *state = space->machine().driver_data<vegas_state>();
1355   vegas_state *state = space.machine().driver_data<vegas_state>();
13561356   return state->m_sio_irq_state & state->m_sio_irq_enable;
13571357}
13581358
13591359
13601360static READ32_HANDLER( sio_irq_status_r )
13611361{
1362   vegas_state *state = space->machine().driver_data<vegas_state>();
1362   vegas_state *state = space.machine().driver_data<vegas_state>();
13631363   return state->m_sio_irq_state;
13641364}
13651365
13661366
13671367static WRITE32_HANDLER( sio_led_w )
13681368{
1369   vegas_state *state = space->machine().driver_data<vegas_state>();
1369   vegas_state *state = space.machine().driver_data<vegas_state>();
13701370   if (ACCESSING_BITS_0_7)
13711371      state->m_sio_led_state = data;
13721372}
r17963r17964
13741374
13751375static READ32_HANDLER( sio_led_r )
13761376{
1377   vegas_state *state = space->machine().driver_data<vegas_state>();
1377   vegas_state *state = space.machine().driver_data<vegas_state>();
13781378   return state->m_sio_led_state;
13791379}
13801380
r17963r17964
13881388
13891389static WRITE32_HANDLER( sio_w )
13901390{
1391   vegas_state *state = space->machine().driver_data<vegas_state>();
1391   vegas_state *state = space.machine().driver_data<vegas_state>();
13921392   if (ACCESSING_BITS_0_7) offset += 0;
13931393   if (ACCESSING_BITS_8_15) offset += 1;
13941394   if (ACCESSING_BITS_16_23) offset += 2;
13951395   if (ACCESSING_BITS_24_31) offset += 3;
13961396   if (LOG_SIO && offset != 0)
1397      logerror("%08X:sio write to offset %X = %02X\n", space->device().safe_pc(), offset, data >> (offset*8));
1397      logerror("%08X:sio write to offset %X = %02X\n", space.device().safe_pc(), offset, data >> (offset*8));
13981398   if (offset < 4)
13991399      state->m_sio_data[offset] = data >> (offset*8);
14001400   if (offset == 1)
r17963r17964
14041404
14051405static READ32_HANDLER( sio_r )
14061406{
1407   vegas_state *state = space->machine().driver_data<vegas_state>();
1407   vegas_state *state = space.machine().driver_data<vegas_state>();
14081408   UINT32 result = 0;
14091409   if (ACCESSING_BITS_0_7) offset += 0;
14101410   if (ACCESSING_BITS_8_15) offset += 1;
r17963r17964
14131413   if (offset < 4)
14141414      result = state->m_sio_data[0] | (state->m_sio_data[1] << 8) | (state->m_sio_data[2] << 16) | (state->m_sio_data[3] << 24);
14151415   if (LOG_SIO && offset != 2)
1416      logerror("%08X:sio read from offset %X = %02X\n", space->device().safe_pc(), offset, result >> (offset*8));
1416      logerror("%08X:sio read from offset %X = %02X\n", space.device().safe_pc(), offset, result >> (offset*8));
14171417   return result;
14181418}
14191419
r17963r17964
14271427
14281428static READ32_HANDLER( analog_port_r )
14291429{
1430   vegas_state *state = space->machine().driver_data<vegas_state>();
1430   vegas_state *state = space.machine().driver_data<vegas_state>();
14311431   return state->m_pending_analog_read;
14321432}
14331433
14341434
14351435static WRITE32_HANDLER( analog_port_w )
14361436{
1437   vegas_state *state = space->machine().driver_data<vegas_state>();
1437   vegas_state *state = space.machine().driver_data<vegas_state>();
14381438   static const char *const portnames[] = { "AN0", "AN1", "AN2", "AN3", "AN4", "AN5", "AN6", "AN7" };
14391439
14401440   if (data < 8 || data > 15)
1441      logerror("%08X:Unexpected analog port select = %08X\n", space->device().safe_pc(), data);
1441      logerror("%08X:Unexpected analog port select = %08X\n", space.device().safe_pc(), data);
14421442   state->m_pending_analog_read = state->ioport(portnames[data & 7])->read_safe(0);
14431443}
14441444
r17963r17964
14521452
14531453static WRITE32_HANDLER( vegas_watchdog_w )
14541454{
1455   space->device().execute().eat_cycles(100);
1455   space.device().execute().eat_cycles(100);
14561456}
14571457
14581458
14591459static WRITE32_HANDLER( asic_fifo_w )
14601460{
1461   midway_ioasic_fifo_w(space->machine(), data);
1461   midway_ioasic_fifo_w(space.machine(), data);
14621462}
14631463
14641464
r17963r17964
15081508
15091509static WRITE32_HANDLER( dcs3_fifo_full_w )
15101510{
1511   midway_ioasic_fifo_full_w(space->machine(), data);
1511   midway_ioasic_fifo_full_w(space.machine(), data);
15121512}
15131513
15141514
r17963r17964
16811681
16821682   /* now remap everything */
16831683   if (LOG_DYNAMIC) logerror("remap_dynamic_addresses:\n");
1684   address_space *space = const_cast<address_space *>(machine.device<cpu_device>("maincpu")->space(AS_PROGRAM));
1685   assert(space != NULL);
1684   address_space &space = *machine.device<cpu_device>("maincpu")->space(AS_PROGRAM);
16861685   for (addr = 0; addr < state->m_dynamic_count; addr++)
16871686   {
16881687      if (LOG_DYNAMIC) logerror("  installing: %08X-%08X %s,%s\n", dynamic[addr].start, dynamic[addr].end, dynamic[addr].rdname, dynamic[addr].wrname);
16891688
16901689      if (dynamic[addr].mread == NOP_HANDLER)
1691         machine.device("maincpu")->memory().space(AS_PROGRAM)->nop_read(dynamic[addr].start, dynamic[addr].end);
1690         space.nop_read(dynamic[addr].start, dynamic[addr].end);
16921691      else if (dynamic[addr].mread != NULL)
1693         space->install_legacy_read_handler(dynamic[addr].start, dynamic[addr].end, 0, 0, dynamic[addr].mread, dynamic[addr].rdname);
1692         space.install_legacy_read_handler(dynamic[addr].start, dynamic[addr].end, 0, 0, dynamic[addr].mread, dynamic[addr].rdname);
16941693      if (dynamic[addr].mwrite != NULL)
1695         space->install_legacy_write_handler(dynamic[addr].start, dynamic[addr].end, 0, 0, dynamic[addr].mwrite, dynamic[addr].wrname);
1694         space.install_legacy_write_handler(dynamic[addr].start, dynamic[addr].end, 0, 0, dynamic[addr].mwrite, dynamic[addr].wrname);
16961695
16971696      if (dynamic[addr].dread != NULL || dynamic[addr].dwrite != NULL)
1698         space->install_legacy_readwrite_handler(*dynamic[addr].device, dynamic[addr].start, dynamic[addr].end, 0, 0, dynamic[addr].dread, dynamic[addr].rdname, dynamic[addr].dwrite, dynamic[addr].wrname);
1697         space.install_legacy_readwrite_handler(*dynamic[addr].device, dynamic[addr].start, dynamic[addr].end, 0, 0, dynamic[addr].dread, dynamic[addr].rdname, dynamic[addr].dwrite, dynamic[addr].wrname);
16991698   }
17001699
17011700   if (LOG_DYNAMIC)
trunk/src/mame/drivers/magictg.c
r17963r17964
334334#if defined(USE_TWO_3DFX)
335335static UINT32 voodoo_1_pci_r(device_t *busdevice, device_t *device, int function, int reg, UINT32 mem_mask)
336336{
337   magictg_state* state = space->machine().driver_data<magictg_state>();
337   magictg_state* state = space.machine().driver_data<magictg_state>();
338338   UINT32 val = 0;
339339
340340   switch (reg)
r17963r17964
356356
357357static void voodoo_1_pci_w(device_t *busdevice, device_t *device, int function, int reg, UINT32 data, UINT32 mem_mask)
358358{
359   magictg_state* state = space->machine().driver_data<magictg_state>();
359   magictg_state* state = space.machine().driver_data<magictg_state>();
360360
361361   switch (reg)
362362   {
r17963r17964
473473   else
474474   {
475475      /* Post office */
476      res = 0;//mame_rand(space->machine);//m_zr36120.as_regs[0x48/4];
476      res = 0;//mame_rand(space.machine);//m_zr36120.as_regs[0x48/4];
477477   }
478478   mame_printf_debug("PINKEYE_R[%x]\n", offset);
479479   return res;
trunk/src/mame/drivers/galpanic.c
r17963r17964
207207   for(i = 0; i < 8; i++)
208208   {
209209      // or offset + i * 0x2000 ?
210      galpanic_bgvideoram_w(&space, offset * 8 + i, data, mem_mask);
210      galpanic_bgvideoram_w(space, offset * 8 + i, data, mem_mask);
211211   }
212212}
213213
trunk/src/mame/drivers/xtom3d.c
r17963r17964
664664
665665   kbdc8042_init(machine(), &at8042);
666666   pc_vga_init(machine(), vga_setting, NULL);
667   pc_vga_io_init(machine(), machine().device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, machine().device("maincpu")->memory().space(AS_IO), 0x0000);
667   pc_vga_io_init(machine(), *machine().device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, *machine().device("maincpu")->memory().space(AS_IO), 0x0000);
668668}
669669
670670void xtom3d_state::machine_reset()
trunk/src/mame/drivers/namcona1.c
r17963r17964
495495{
496496   namcona1_state *state = machine.driver_data<namcona1_state>();
497497   UINT16 data;
498   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
498   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
499499
500500   if( source>=0x400000 && source<0xc00000 )
501501   {
r17963r17964
516516   }
517517   if( dest>=0xf00000 && dest<0xf02000 )
518518   {
519      state->namcona1_paletteram_w(*space, (dest-0xf00000)/2, data, 0xffff );
519      state->namcona1_paletteram_w(space, (dest-0xf00000)/2, data, 0xffff );
520520   }
521521   else if( dest>=0xf40000 && dest<0xf80000 )
522522   {
523      state->namcona1_gfxram_w(*space, (dest-0xf40000)/2, data, 0xffff );
523      state->namcona1_gfxram_w(space, (dest-0xf40000)/2, data, 0xffff );
524524   }
525525   else if( dest>=0xff0000 && dest<0xffc000 )
526526   {
527      state->namcona1_videoram_w(*space, (dest-0xff0000)/2, data, 0xffff );
527      state->namcona1_videoram_w(space, (dest-0xff0000)/2, data, 0xffff );
528528   }
529529   else if( dest>=0xfff000 && dest<0x1000000 )
530530   {
trunk/src/mame/drivers/armedf.c
r17963r17964
317317{
318318
319319   if(data & 0x4000 && ((m_vreg & 0x4000) == 0)) //0 -> 1 transition
320      nb_1414m4_exec(&space,(m_text_videoram[0] << 8) | (m_text_videoram[1] & 0xff),m_text_videoram,m_fg_scrollx,m_fg_scrolly,m_tx_tilemap);
320      nb_1414m4_exec(space,(m_text_videoram[0] << 8) | (m_text_videoram[1] & 0xff),m_text_videoram,m_fg_scrollx,m_fg_scrolly,m_tx_tilemap);
321321
322322
323323   COMBINE_DATA(&m_vreg);
trunk/src/mame/drivers/pcat_dyn.c
r17963r17964
197197DRIVER_INIT_MEMBER(pcat_dyn_state,pcat_dyn)
198198{
199199   pc_vga_init(machine(), vga_setting, NULL);
200   pc_vga_io_init(machine(), machine().device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, machine().device("maincpu")->memory().space(AS_IO), 0x0000);
200   pc_vga_io_init(machine(), *machine().device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, *machine().device("maincpu")->memory().space(AS_IO), 0x0000);
201201}
202202
203203GAME( 1995, toursol,  0,       pcat_dyn, pcat_dyn, pcat_dyn_state, pcat_dyn, ROT0, "Dynamo", "Tournament Solitaire (V1.06, 08/03/95)", GAME_NOT_WORKING|GAME_NO_SOUND )
trunk/src/mame/drivers/dkong.c
r17963r17964
347347 *
348348 *************************************/
349349
350static UINT8 memory_read_byte(address_space *space, offs_t address) { return space->read_byte(address); }
351static void memory_write_byte(address_space *space, offs_t address, UINT8 data) { space->write_byte(address, data); }
350static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
351static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
352352
353353static Z80DMA_INTERFACE( dk3_dma )
354354{
r17963r17964
31393139DRIVER_INIT_MEMBER(dkong_state,dkongx)
31403140{
31413141   UINT8 *decrypted;
3142   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
3142   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
31433143
31443144   decrypted = auto_alloc_array(machine(), UINT8, 0x10000);
31453145
31463146   machine().device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x0000, 0x5fff, "bank1" );
31473147    machine().device("maincpu")->memory().space(AS_PROGRAM)->install_read_bank(0x8000, 0xffff, "bank2" );
31483148
3149   space->install_write_handler(0xe000, 0xe000, write8_delegate(FUNC(dkong_state::braze_a15_w),this));
3149   space.install_write_handler(0xe000, 0xe000, write8_delegate(FUNC(dkong_state::braze_a15_w),this));
31503150
3151   space->install_read_handler(0xc800, 0xc800, read8_delegate(FUNC(dkong_state::braze_eeprom_r),this));
3152   space->install_write_handler(0xc800, 0xc800, write8_delegate(FUNC(dkong_state::braze_eeprom_w),this));
3151   space.install_read_handler(0xc800, 0xc800, read8_delegate(FUNC(dkong_state::braze_eeprom_r),this));
3152   space.install_write_handler(0xc800, 0xc800, write8_delegate(FUNC(dkong_state::braze_eeprom_w),this));
31533153
31543154   braze_decrypt_rom(machine(), decrypted);
31553155
trunk/src/mame/drivers/appoooh.c
r17963r17964
613613
614614DRIVER_INIT_MEMBER(appoooh_state,robowresb)
615615{
616   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
617   space->set_decrypted_region(0x0000, 0x7fff, machine().root_device().memregion("maincpu")->base() + 0x1c000);
616   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
617   space.set_decrypted_region(0x0000, 0x7fff, machine().root_device().memregion("maincpu")->base() + 0x1c000);
618618}
619619
620620
trunk/src/mame/drivers/seicross.c
r17963r17964
9090WRITE8_MEMBER(seicross_state::friskyt_portB_w)
9191{
9292
93   //logerror("PC %04x: 8910 port B = %02x\n", space->device().safe_pc(), data);
93   //logerror("PC %04x: 8910 port B = %02x\n", space.device().safe_pc(), data);
9494   /* bit 0 is IRQ enable */
9595   m_irq_mask = data & 1;
9696
trunk/src/mame/drivers/system16.c
r17963r17964
32943294   int i;
32953295   UINT8 *ROM = memregion("maincpu")->base();
32963296   UINT8 *KEY = memregion("decryption")->base();
3297   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
3297   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
32983298   UINT8 data[0x1000];
32993299
33003300   // the decryption key is in a rom (part of an MSDOS executable...)
r17963r17964
33133313      m_decrypted_region[i] = ROM[i] ^ data[(i & 0xfff) ^ 1];
33143314   }
33153315
3316   space->set_decrypted_region(0x00000, 0xbffff, m_decrypted_region);
3316   space.set_decrypted_region(0x00000, 0xbffff, m_decrypted_region);
33173317
33183318   DRIVER_INIT_CALL(common);
33193319
trunk/src/mame/drivers/nyny.c
r17963r17964
466466{
467467   /* not sure what this does */
468468
469   /*logerror("%x PORT A write %x at  Y=%x X=%x\n", space->device().safe_pc(), data, space->machine().primary_screen->vpos(), space->machine().primary_screen->hpos());*/
469   /*logerror("%x PORT A write %x at  Y=%x X=%x\n", space.device().safe_pc(), data, space.machine().primary_screen->vpos(), space.machine().primary_screen->hpos());*/
470470}
471471
472472
trunk/src/mame/drivers/pengo.c
r17963r17964
692692      { 0x88,0x0a,0x82,0x00,0xa0,0x22,0xaa,0x28 },   /* ...1...1...0.... */
693693      { 0x88,0x0a,0x82,0x00,0xa0,0x22,0xaa,0x28 }      /* ...1...1...1.... */
694694   };
695   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
695   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
696696   UINT8 *decrypt = auto_alloc_array(machine(), UINT8, 0x8000);
697697   UINT8 *rom = machine().root_device().memregion("maincpu")->base();
698698   int A;
699699
700   space->set_decrypted_region(0x0000, 0x7fff, decrypt);
700   space.set_decrypted_region(0x0000, 0x7fff, decrypt);
701701
702702   for (A = 0x0000;A < 0x8000;A++)
703703   {
trunk/src/mame/drivers/polepos.c
r17963r17964
463463
464464MACHINE_RESET_MEMBER(polepos_state,polepos)
465465{
466   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
466   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
467467   int i;
468468
469469   /* Reset all latches */
470470   for (i = 0; i < 8; i++)
471      polepos_latch_w(*space, i, 0);
471      polepos_latch_w(space, i, 0);
472472
473473   /* set the interrupt vectors (this shouldn't be needed) */
474474   machine().device("sub")->execute().set_input_line_vector(0, Z8000_NVI);
trunk/src/mame/drivers/wiz.c
r17963r17964
10591059      { 5,3,7, 0x80 },
10601060      { 5,7,3, 0x28 }
10611061   };
1062   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
1062   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
10631063   UINT8 *rom = machine().root_device().memregion("maincpu")->base();
10641064   int size = machine().root_device().memregion("maincpu")->bytes();
10651065   UINT8 *decrypt = auto_alloc_array(machine(), UINT8, size);
10661066   int A;
10671067   const UINT8 *tbl;
10681068
1069   space->set_decrypted_region(0x0000, 0xffff, decrypt);
1069   space.set_decrypted_region(0x0000, 0xffff, decrypt);
10701070
10711071   for (A = 0x0000;A < 0x10000;A++)
10721072   {
trunk/src/mame/drivers/calorie.c
r17963r17964
554554
555555DRIVER_INIT_MEMBER(calorie_state,calorieb)
556556{
557   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
558   space->set_decrypted_region(0x0000, 0x7fff, machine().root_device().memregion("maincpu")->base() + 0x10000);
557   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
558   space.set_decrypted_region(0x0000, 0x7fff, machine().root_device().memregion("maincpu")->base() + 0x10000);
559559}
560560
561561
trunk/src/mame/drivers/namcos11.c
r17963r17964
628628   return data;
629629}
630630
631INLINE void bankswitch_rom8( address_space *space, const char *bank, int n_data )
631INLINE void bankswitch_rom8( address_space &space, const char *bank, int n_data )
632632{
633   space->machine().root_device().membank( bank )->set_entry( ( ( n_data & 0xc0 ) >> 4 ) + ( n_data & 0x03 ) );
633   space.machine().root_device().membank( bank )->set_entry( ( ( n_data & 0xc0 ) >> 4 ) + ( n_data & 0x03 ) );
634634}
635635
636636static const char * const bankname[] = { "bank1", "bank2", "bank3", "bank4", "bank5", "bank6", "bank7", "bank8" };
r17963r17964
641641
642642   if( ACCESSING_BITS_0_15 )
643643   {
644      bankswitch_rom8( &space, bankname[offset * 2], data & 0xffff );
644      bankswitch_rom8( space, bankname[offset * 2], data & 0xffff );
645645   }
646646   if( ACCESSING_BITS_16_31 )
647647   {
648      bankswitch_rom8( &space, bankname[offset * 2 + 1], data >> 16 );
648      bankswitch_rom8( space, bankname[offset * 2 + 1], data >> 16 );
649649   }
650650}
651651
r17963r17964
664664   }
665665}
666666
667INLINE void bankswitch_rom64( address_space *space, const char *bank, int n_data )
667INLINE void bankswitch_rom64( address_space &space, const char *bank, int n_data )
668668{
669   namcos11_state *state = space->machine().driver_data<namcos11_state>();
669   namcos11_state *state = space.machine().driver_data<namcos11_state>();
670670
671671   /* todo: verify behaviour */
672672   state->membank( bank )->set_entry( ( ( ( ( n_data & 0xc0 ) >> 3 ) + ( n_data & 0x07 ) ) ^ state->m_n_bankoffset ) );
r17963r17964
678678
679679   if( ACCESSING_BITS_0_15 )
680680   {
681      bankswitch_rom64( &space, bankname[offset * 2], data & 0xffff );
681      bankswitch_rom64( space, bankname[offset * 2], data & 0xffff );
682682   }
683683   if( ACCESSING_BITS_16_31 )
684684   {
685      bankswitch_rom64( &space, bankname[offset * 2 + 1], data >> 16 );
685      bankswitch_rom64( space, bankname[offset * 2 + 1], data >> 16 );
686686   }
687687}
688688
trunk/src/mame/drivers/kickgoal.c
r17963r17964
155155   okim6295_device *oki = downcast<okim6295_device *>(device);
156156   if (ACCESSING_BITS_0_7)
157157   {
158      logerror("PC:%06x Writing %04x to Sound CPU\n",space->device().safe_pcbase(),data);
158      logerror("PC:%06x Writing %04x to Sound CPU\n",space.device().safe_pcbase(),data);
159159      if (data >= 0x40) {
160160         if (data == 0xfe) {
161161            oki->write(0,0x40);   /* Stop playing the melody */
trunk/src/mame/drivers/galaxian.c
r17963r17964
10661066
10671067INPUT_CHANGED_MEMBER(galaxian_state::gmgalax_game_changed)
10681068{
1069   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
1069   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
10701070
10711071   /* new value is the selected game */
10721072   m_gmgalax_selected_game = newval;
10731073
10741074   /* select the bank and graphics bank based on it */
10751075   membank("bank1")->set_entry(m_gmgalax_selected_game);
1076   galaxian_gfxbank_w(*space, 0, m_gmgalax_selected_game);
1076   galaxian_gfxbank_w(space, 0, m_gmgalax_selected_game);
10771077
10781078   /* reset the stars */
1079   galaxian_stars_enable_w(*space, 0, 0);
1079   galaxian_stars_enable_w(space, 0, 0);
10801080
10811081   /* reset the CPU */
10821082   machine().device("maincpu")->execute().set_input_line(INPUT_LINE_RESET, PULSE_LINE);
r17963r17964
27422742
27432743static void unmap_galaxian_sound(running_machine &machine, offs_t base)
27442744{
2745   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
2745   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
27462746
2747   space->unmap_write(base + 0x0004, base + 0x0007, 0, 0x07f8);
2748   space->unmap_write(base + 0x0800, base + 0x0807, 0, 0x07f8);
2749   space->unmap_write(base + 0x1800, base + 0x1800, 0, 0x07ff);
2747   space.unmap_write(base + 0x0004, base + 0x0007, 0, 0x07f8);
2748   space.unmap_write(base + 0x0800, base + 0x0807, 0, 0x07f8);
2749   space.unmap_write(base + 0x1800, base + 0x1800, 0, 0x07ff);
27502750}
27512751
27522752
r17963r17964
27652765
27662766DRIVER_INIT_MEMBER(galaxian_state,nolock)
27672767{
2768   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
2768   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
27692769
27702770   /* same as galaxian... */
27712771   DRIVER_INIT_CALL(galaxian);
27722772
27732773   /* ...but coin lockout disabled/disconnected */
2774   space->unmap_write(0x6002, 0x6002, 0, 0x7f8);
2774   space.unmap_write(0x6002, 0x6002, 0, 0x7f8);
27752775}
27762776
27772777
27782778DRIVER_INIT_MEMBER(galaxian_state,azurian)
27792779{
2780   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
2780   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
27812781
27822782   /* yellow bullets instead of white ones */
27832783   common_init(machine(), scramble_draw_bullet, galaxian_draw_background, NULL, NULL);
27842784
27852785   /* coin lockout disabled */
2786   space->unmap_write(0x6002, 0x6002, 0, 0x7f8);
2786   space.unmap_write(0x6002, 0x6002, 0, 0x7f8);
27872787}
27882788
27892789
27902790DRIVER_INIT_MEMBER(galaxian_state,gmgalax)
27912791{
2792   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
2792   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
27932793
27942794   /* video extensions */
27952795   common_init(machine(), galaxian_draw_bullet, galaxian_draw_background, gmgalax_extend_tile_info, gmgalax_extend_sprite_info);
27962796
27972797   /* ROM is banked */
2798   space->install_read_bank(0x0000, 0x3fff, "bank1");
2798   space.install_read_bank(0x0000, 0x3fff, "bank1");
27992799   membank("bank1")->configure_entries(0, 2, memregion("maincpu")->base() + 0x10000, 0x4000);
28002800
28012801   /* callback when the game select is toggled */
r17963r17964
28062806
28072807DRIVER_INIT_MEMBER(galaxian_state,pisces)
28082808{
2809   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
2809   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
28102810
28112811   /* video extensions */
28122812   common_init(machine(), galaxian_draw_bullet, galaxian_draw_background, pisces_extend_tile_info, pisces_extend_sprite_info);
28132813
28142814   /* coin lockout replaced by graphics bank */
2815   space->install_write_handler(0x6002, 0x6002, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::galaxian_gfxbank_w),this));
2815   space.install_write_handler(0x6002, 0x6002, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::galaxian_gfxbank_w),this));
28162816}
28172817
28182818
28192819DRIVER_INIT_MEMBER(galaxian_state,batman2)
28202820{
2821   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
2821   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
28222822
28232823   /* video extensions */
28242824   common_init(machine(), galaxian_draw_bullet, galaxian_draw_background, batman2_extend_tile_info, upper_extend_sprite_info);
28252825
28262826   /* coin lockout replaced by graphics bank */
2827   space->install_write_handler(0x6002, 0x6002, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::galaxian_gfxbank_w),this));
2827   space.install_write_handler(0x6002, 0x6002, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::galaxian_gfxbank_w),this));
28282828}
28292829
28302830
28312831DRIVER_INIT_MEMBER(galaxian_state,frogg)
28322832{
2833   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
2833   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
28342834
28352835   /* same as galaxian... */
28362836   common_init(machine(), galaxian_draw_bullet, frogger_draw_background, frogger_extend_tile_info, frogger_extend_sprite_info);
28372837
28382838   /* ...but needs a full 2k of RAM */
2839   space->install_ram(0x4000, 0x47ff);
2839   space.install_ram(0x4000, 0x47ff);
28402840}
28412841
28422842
r17963r17964
28662866
28672867DRIVER_INIT_MEMBER(galaxian_state,mooncrgx)
28682868{
2869   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
2869   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
28702870
28712871   /* video extensions */
28722872   common_init(machine(), galaxian_draw_bullet, galaxian_draw_background, mooncrst_extend_tile_info, mooncrst_extend_sprite_info);
28732873
28742874   /* LEDs and coin lockout replaced by graphics banking */
2875   space->install_write_handler(0x6000, 0x6002, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::galaxian_gfxbank_w),this));
2875   space.install_write_handler(0x6000, 0x6002, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::galaxian_gfxbank_w),this));
28762876}
28772877
28782878
28792879DRIVER_INIT_MEMBER(galaxian_state,moonqsr)
28802880{
2881   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
2881   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
28822882   UINT8 *decrypt = auto_alloc_array(machine(), UINT8, 0x8000);
28832883
28842884   /* video extensions */
r17963r17964
28862886
28872887   /* decrypt program code */
28882888   decode_mooncrst(machine(), 0x8000, decrypt);
2889   space->set_decrypted_region(0x0000, 0x7fff, decrypt);
2889   space.set_decrypted_region(0x0000, 0x7fff, decrypt);
28902890}
28912891
28922892WRITE8_MEMBER(galaxian_state::artic_gfxbank_w)
r17963r17964
28962896
28972897DRIVER_INIT_MEMBER(galaxian_state,pacmanbl)
28982898{
2899   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
2899   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
29002900
29012901   /* same as galaxian... */
29022902   DRIVER_INIT_CALL(galaxian);
29032903
29042904   /* ...but coin lockout disabled/disconnected */
2905   space->install_write_handler(0x6002, 0x6002, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::artic_gfxbank_w),this));
2905   space.install_write_handler(0x6002, 0x6002, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::artic_gfxbank_w),this));
29062906}
29072907
29082908READ8_MEMBER(galaxian_state::tenspot_dsw_read)
r17963r17964
29562956
29572957DRIVER_INIT_MEMBER(galaxian_state,tenspot)
29582958{
2959   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
2959   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
29602960
29612961   /* these are needed for batman part 2 to work properly, this banking is probably a property of the artic board,
29622962       which tenspot appears to have copied */
r17963r17964
29652965   //common_init(machine(), galaxian_draw_bullet, galaxian_draw_background, batman2_extend_tile_info, upper_extend_sprite_info);
29662966
29672967   /* coin lockout replaced by graphics bank */
2968   //space->install_legacy_write_handler(0x6002, 0x6002, 0, 0x7f8, FUNC(galaxian_gfxbank_w));
2968   //space.install_legacy_write_handler(0x6002, 0x6002, 0, 0x7f8, FUNC(galaxian_gfxbank_w));
29692969
29702970
29712971   DRIVER_INIT_CALL(galaxian);
29722972
2973   space->install_write_handler(0x6002, 0x6002, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::artic_gfxbank_w),this));
2973   space.install_write_handler(0x6002, 0x6002, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::artic_gfxbank_w),this));
29742974
29752975   m_tenspot_current_game = 0;
29762976
29772977   tenspot_set_game_bank(machine(), m_tenspot_current_game, 0);
29782978
2979   space->install_read_handler(0x7000, 0x7000, read8_delegate(FUNC(galaxian_state::tenspot_dsw_read),this));
2979   space.install_read_handler(0x7000, 0x7000, read8_delegate(FUNC(galaxian_state::tenspot_dsw_read),this));
29802980}
29812981
29822982
r17963r17964
29932993
29942994DRIVER_INIT_MEMBER(galaxian_state,zigzag)
29952995{
2996   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
2996   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
29972997
29982998   /* video extensions */
29992999   common_init(machine(), NULL, galaxian_draw_background, NULL, NULL);
r17963r17964
30033003   m_numspritegens = 2;
30043004
30053005   /* make ROMs 2 & 3 swappable */
3006   space->install_read_bank(0x2000, 0x2fff, "bank1");
3007   space->install_read_bank(0x3000, 0x3fff, "bank2");
3006   space.install_read_bank(0x2000, 0x2fff, "bank1");
3007   space.install_read_bank(0x3000, 0x3fff, "bank2");
30083008   membank("bank1")->configure_entries(0, 2, memregion("maincpu")->base() + 0x2000, 0x1000);
30093009   membank("bank2")->configure_entries(0, 2, memregion("maincpu")->base() + 0x2000, 0x1000);
30103010
30113011   /* also re-install the fixed ROM area as a bank in order to inform the memory system that
30123012       the fixed area only extends to 0x1fff */
3013   space->install_read_bank(0x0000, 0x1fff, "bank3");
3013   space.install_read_bank(0x0000, 0x1fff, "bank3");
30143014   membank("bank3")->set_base(memregion("maincpu")->base() + 0x0000);
30153015
30163016   /* handler for doing the swaps */
3017   space->install_write_handler(0x7002, 0x7002, 0, 0x07f8, write8_delegate(FUNC(galaxian_state::zigzag_bankswap_w),this));
3018   zigzag_bankswap_w(*space, 0, 0);
3017   space.install_write_handler(0x7002, 0x7002, 0, 0x07f8, write8_delegate(FUNC(galaxian_state::zigzag_bankswap_w),this));
3018   zigzag_bankswap_w(space, 0, 0);
30193019
30203020   /* coin lockout disabled */
3021   space->unmap_write(0x6002, 0x6002, 0, 0x7f8);
3021   space.unmap_write(0x6002, 0x6002, 0, 0x7f8);
30223022
30233023   /* remove the galaxian sound hardware */
30243024   unmap_galaxian_sound(machine(), 0x6000);
30253025
30263026   /* install our AY-8910 handler */
3027   space->install_write_handler(0x4800, 0x4fff, write8_delegate(FUNC(galaxian_state::zigzag_ay8910_w),this));
3027   space.install_write_handler(0x4800, 0x4fff, write8_delegate(FUNC(galaxian_state::zigzag_ay8910_w),this));
30283028}
30293029
30303030
r17963r17964
30373037
30383038DRIVER_INIT_MEMBER(galaxian_state,checkman)
30393039{
3040   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
3040   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
30413041   address_space *iospace = machine().device("maincpu")->memory().space(AS_IO);
30423042
30433043   /* video extensions */
30443044   common_init(machine(), galaxian_draw_bullet, galaxian_draw_background, mooncrst_extend_tile_info, mooncrst_extend_sprite_info);
30453045
30463046   /* move the interrupt enable from $b000 to $b001 */
3047   space->unmap_write(0xb000, 0xb000, 0, 0x7f8);
3048   space->install_write_handler(0xb001, 0xb001, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::irq_enable_w),this));
3047   space.unmap_write(0xb000, 0xb000, 0, 0x7f8);
3048   space.install_write_handler(0xb001, 0xb001, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::irq_enable_w),this));
30493049
30503050   /* attach the sound command handler */
30513051   iospace->install_write_handler(0x00, 0x00, 0, 0xffff, write8_delegate(FUNC(galaxian_state::checkman_sound_command_w),this));
r17963r17964
30573057
30583058DRIVER_INIT_MEMBER(galaxian_state,checkmaj)
30593059{
3060   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
3060   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
30613061
30623062   /* video extensions */
30633063   common_init(machine(), galaxian_draw_bullet, galaxian_draw_background, NULL, NULL);
30643064
30653065   /* attach the sound command handler */
3066   space->install_write_handler(0x7800, 0x7800, 0, 0x7ff, write8_delegate(FUNC(galaxian_state::checkman_sound_command_w),this));
3066   space.install_write_handler(0x7800, 0x7800, 0, 0x7ff, write8_delegate(FUNC(galaxian_state::checkman_sound_command_w),this));
30673067
30683068   /* for the title screen */
3069   space->install_read_handler(0x3800, 0x3800, read8_delegate(FUNC(galaxian_state::checkmaj_protection_r),this));
3069   space.install_read_handler(0x3800, 0x3800, read8_delegate(FUNC(galaxian_state::checkmaj_protection_r),this));
30703070}
30713071
30723072
30733073DRIVER_INIT_MEMBER(galaxian_state,dingo)
30743074{
3075   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
3075   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
30763076
30773077   /* video extensions */
30783078   common_init(machine(), galaxian_draw_bullet, galaxian_draw_background, NULL, NULL);
30793079
30803080   /* attach the sound command handler */
3081   space->install_write_handler(0x7800, 0x7800, 0, 0x7ff, write8_delegate(FUNC(galaxian_state::checkman_sound_command_w),this));
3081   space.install_write_handler(0x7800, 0x7800, 0, 0x7ff, write8_delegate(FUNC(galaxian_state::checkman_sound_command_w),this));
30823082
3083   space->install_read_handler(0x3000, 0x3000, read8_delegate(FUNC(galaxian_state::dingo_3000_r),this));
3084   space->install_read_handler(0x3035, 0x3035, read8_delegate(FUNC(galaxian_state::dingo_3035_r),this));
3083   space.install_read_handler(0x3000, 0x3000, read8_delegate(FUNC(galaxian_state::dingo_3000_r),this));
3084   space.install_read_handler(0x3035, 0x3035, read8_delegate(FUNC(galaxian_state::dingo_3035_r),this));
30853085}
30863086
30873087
30883088DRIVER_INIT_MEMBER(galaxian_state,dingoe)
30893089{
3090   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
3090   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
30913091   address_space *iospace = machine().device("maincpu")->memory().space(AS_IO);
30923092
30933093   /* video extensions */
30943094   common_init(machine(), galaxian_draw_bullet, galaxian_draw_background, mooncrst_extend_tile_info, mooncrst_extend_sprite_info);
30953095
30963096   /* move the interrupt enable from $b000 to $b001 */
3097   space->unmap_write(0xb000, 0xb000, 0, 0x7f8);
3098   space->install_write_handler(0xb001, 0xb001, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::irq_enable_w),this));
3097   space.unmap_write(0xb000, 0xb000, 0, 0x7f8);
3098   space.install_write_handler(0xb001, 0xb001, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::irq_enable_w),this));
30993099
31003100   /* attach the sound command handler */
31013101   iospace->install_write_handler(0x00, 0x00, 0, 0xffff, write8_delegate(FUNC(galaxian_state::checkman_sound_command_w),this));
31023102
3103   space->install_read_handler(0x3001, 0x3001, read8_delegate(FUNC(galaxian_state::dingoe_3001_r),this));   /* Protection check */
3103   space.install_read_handler(0x3001, 0x3001, read8_delegate(FUNC(galaxian_state::dingoe_3001_r),this));   /* Protection check */
31043104
31053105   /* decrypt program code */
31063106   decode_dingoe(machine());
r17963r17964
31093109
31103110DRIVER_INIT_MEMBER(galaxian_state,skybase)
31113111{
3112   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
3112   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
31133113
31143114   /* video extensions */
31153115   common_init(machine(), galaxian_draw_bullet, galaxian_draw_background, pisces_extend_tile_info, pisces_extend_sprite_info);
31163116
31173117   /* coin lockout replaced by graphics bank */
3118   space->install_write_handler(0xa002, 0xa002, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::galaxian_gfxbank_w),this));
3118   space.install_write_handler(0xa002, 0xa002, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::galaxian_gfxbank_w),this));
31193119
31203120   /* needs a full 2k of RAM */
3121   space->install_ram(0x8000, 0x87ff);
3121   space.install_ram(0x8000, 0x87ff);
31223122
31233123   /* extend ROM */
3124   space->install_rom(0x0000, 0x5fff, memregion("maincpu")->base());
3124   space.install_rom(0x0000, 0x5fff, memregion("maincpu")->base());
31253125}
31263126
31273127
31283128DRIVER_INIT_MEMBER(galaxian_state,kong)
31293129{
3130   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
3130   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
31313131
31323132   /* video extensions */
31333133   common_init(machine(), galaxian_draw_bullet, galaxian_draw_background, NULL, upper_extend_sprite_info);
31343134
31353135   /* needs a full 2k of RAM */
3136   space->install_ram(0x8000, 0x87ff);
3136   space.install_ram(0x8000, 0x87ff);
31373137
31383138   /* extend ROM */
3139   space->install_rom(0x0000, 0x7fff, machine().root_device().memregion("maincpu")->base());
3139   space.install_rom(0x0000, 0x7fff, machine().root_device().memregion("maincpu")->base());
31403140}
31413141
31423142
31433143static void mshuttle_decode(running_machine &machine, const UINT8 convtable[8][16])
31443144{
3145   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
3145   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
31463146   UINT8 *rom = machine.root_device().memregion("maincpu")->base();
31473147   UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x10000);
31483148   int A;
31493149
3150   space->set_decrypted_region(0x0000, 0xffff, decrypt);
3150   space.set_decrypted_region(0x0000, 0xffff, decrypt);
31513151
31523152   for (A = 0x0000;A < 0x10000;A++)
31533153   {
r17963r17964
32543254
32553255DRIVER_INIT_MEMBER(galaxian_state,kingball)
32563256{
3257   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
3257   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
32583258
32593259   /* video extensions */
32603260   common_init(machine(), galaxian_draw_bullet, galaxian_draw_background, NULL, NULL);
32613261
32623262   /* disable the stars */
3263   space->unmap_write(0xb004, 0xb004, 0, 0x07f8);
3263   space.unmap_write(0xb004, 0xb004, 0, 0x07f8);
32643264
3265   space->install_write_handler(0xb000, 0xb000, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::kingball_sound1_w),this));
3266   space->install_write_handler(0xb001, 0xb001, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::irq_enable_w),this));
3267   space->install_write_handler(0xb002, 0xb002, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::kingball_sound2_w),this));
3268   space->install_write_handler(0xb003, 0xb003, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::kingball_speech_dip_w),this));
3265   space.install_write_handler(0xb000, 0xb000, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::kingball_sound1_w),this));
3266   space.install_write_handler(0xb001, 0xb001, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::irq_enable_w),this));
3267   space.install_write_handler(0xb002, 0xb002, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::kingball_sound2_w),this));
3268   space.install_write_handler(0xb003, 0xb003, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::kingball_speech_dip_w),this));
32693269
32703270   state_save_register_global(machine(), m_kingball_speech_dip);
32713271   state_save_register_global(machine(), m_kingball_sound);
r17963r17964
32743274
32753275DRIVER_INIT_MEMBER(galaxian_state,scorpnmc)
32763276{
3277   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
3277   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
32783278
32793279   /* video extensions */
32803280   common_init(machine(), galaxian_draw_bullet, galaxian_draw_background, batman2_extend_tile_info, upper_extend_sprite_info);
32813281
32823282   /* move the interrupt enable from $b000 to $b001 */
3283   space->unmap_write(0xb000, 0xb000, 0, 0x7f8);
3284   space->install_write_handler(0xb001, 0xb001, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::irq_enable_w),this));
3283   space.unmap_write(0xb000, 0xb000, 0, 0x7f8);
3284   space.install_write_handler(0xb001, 0xb001, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::irq_enable_w),this));
32853285
32863286   /* extra ROM */
3287   space->install_rom(0x5000, 0x67ff, memregion("maincpu")->base() + 0x5000);
3287   space.install_rom(0x5000, 0x67ff, memregion("maincpu")->base() + 0x5000);
32883288
32893289   /* install RAM at $4000-$4800 */
3290   space->install_ram(0x4000, 0x47ff);
3290   space.install_ram(0x4000, 0x47ff);
32913291
32923292   /* doesn't appear to use original RAM */
3293   space->unmap_readwrite(0x8000, 0x87ff);
3293   space.unmap_readwrite(0x8000, 0x87ff);
32943294}
32953295
32963296DRIVER_INIT_MEMBER(galaxian_state,thepitm)
32973297{
3298   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
3298   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
32993299
33003300   /* video extensions */
33013301   common_init(machine(), galaxian_draw_bullet, galaxian_draw_background, mooncrst_extend_tile_info, mooncrst_extend_sprite_info);
33023302
33033303   /* move the interrupt enable from $b000 to $b001 */
3304   space->unmap_write(0xb000, 0xb000, 0, 0x7f8);
3305   space->install_write_handler(0xb001, 0xb001, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::irq_enable_w),this));
3304   space.unmap_write(0xb000, 0xb000, 0, 0x7f8);
3305   space.install_write_handler(0xb001, 0xb001, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::irq_enable_w),this));
33063306
33073307   /* disable the stars */
3308   space->unmap_write(0xb004, 0xb004, 0, 0x07f8);
3308   space.unmap_write(0xb004, 0xb004, 0, 0x07f8);
33093309
33103310   /* extend ROM */
3311   space->install_rom(0x0000, 0x47ff, memregion("maincpu")->base());
3311   space.install_rom(0x0000, 0x47ff, memregion("maincpu")->base());
33123312}
33133313
33143314/*************************************
r17963r17964
33193319
33203320DRIVER_INIT_MEMBER(galaxian_state,theend)
33213321{
3322   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
3322   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
33233323
33243324   /* video extensions */
33253325   common_init(machine(), theend_draw_bullet, galaxian_draw_background, NULL, NULL);
33263326
33273327   /* coin counter on the upper bit of port C */
3328   space->unmap_write(0x6802, 0x6802, 0, 0x7f8);
3328   space.unmap_write(0x6802, 0x6802, 0, 0x7f8);
33293329}
33303330
33313331
r17963r17964
33383338
33393339DRIVER_INIT_MEMBER(galaxian_state,explorer)
33403340{
3341   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
3341   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
33423342
33433343   /* video extensions */
33443344   common_init(machine(), scramble_draw_bullet, scramble_draw_background, NULL, NULL);
33453345
33463346   /* watchdog works for writes as well? (or is it just disabled?) */
3347   space->install_write_handler(0x7000, 0x7000, 0, 0x7ff, write8_delegate(FUNC(galaxian_state::watchdog_reset_w),this));
3347   space.install_write_handler(0x7000, 0x7000, 0, 0x7ff, write8_delegate(FUNC(galaxian_state::watchdog_reset_w),this));
33483348
33493349   /* I/O appears to be direct, not via PPIs */
3350   space->unmap_readwrite(0x8000, 0xffff);
3351   space->install_read_port(0x8000, 0x8000, 0, 0xffc, "IN0");
3352   space->install_read_port(0x8001, 0x8001, 0, 0xffc, "IN1");
3353   space->install_read_port(0x8002, 0x8002, 0, 0xffc, "IN2");
3354   space->install_read_port(0x8003, 0x8003, 0, 0xffc, "IN3");
3355   space->install_write_handler(0x8000, 0x8000, 0, 0xfff, write8_delegate(FUNC(galaxian_state::soundlatch_byte_w),this));
3356   space->install_write_handler(0x9000, 0x9000, 0, 0xfff, write8_delegate(FUNC(galaxian_state::explorer_sound_control_w),this));
3350   space.unmap_readwrite(0x8000, 0xffff);
3351   space.install_read_port(0x8000, 0x8000, 0, 0xffc, "IN0");
3352   space.install_read_port(0x8001, 0x8001, 0, 0xffc, "IN1");
3353   space.install_read_port(0x8002, 0x8002, 0, 0xffc, "IN2");
3354   space.install_read_port(0x8003, 0x8003, 0, 0xffc, "IN3");
3355   space.install_write_handler(0x8000, 0x8000, 0, 0xfff, write8_delegate(FUNC(galaxian_state::soundlatch_byte_w),this));
3356   space.install_write_handler(0x9000, 0x9000, 0, 0xfff, write8_delegate(FUNC(galaxian_state::explorer_sound_control_w),this));
33573357}
33583358
33593359
r17963r17964
33713371
33723372DRIVER_INIT_MEMBER(galaxian_state,atlantis)
33733373{
3374   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
3374   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
33753375
33763376   /* video extensions */
33773377   common_init(machine(), scramble_draw_bullet, scramble_draw_background, NULL, NULL);
33783378
33793379   /* watchdog is at $7800? (or is it just disabled?) */
3380   space->unmap_read(0x7000, 0x7000, 0, 0x7ff);
3381   space->install_read_handler(0x7800, 0x7800, 0, 0x7ff, read8_delegate(FUNC(galaxian_state::watchdog_reset_r),this));
3380   space.unmap_read(0x7000, 0x7000, 0, 0x7ff);
3381   space.install_read_handler(0x7800, 0x7800, 0, 0x7ff, read8_delegate(FUNC(galaxian_state::watchdog_reset_r),this));
33823382}
33833383
33843384
r17963r17964
34133413
34143414DRIVER_INIT_MEMBER(galaxian_state,froggrmc)
34153415{
3416   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
3416   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
34173417
34183418   /* video extensions */
34193419   common_init(machine(), NULL, frogger_draw_background, frogger_extend_tile_info, frogger_extend_sprite_info);
34203420
3421   space->install_write_handler(0xa800, 0xa800, 0, 0x7ff, write8_delegate(FUNC(galaxian_state::soundlatch_byte_w),this));
3422   space->install_write_handler(0xb001, 0xb001, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::froggrmc_sound_control_w),this));
3421   space.install_write_handler(0xa800, 0xa800, 0, 0x7ff, write8_delegate(FUNC(galaxian_state::soundlatch_byte_w),this));
3422   space.install_write_handler(0xb001, 0xb001, 0, 0x7f8, write8_delegate(FUNC(galaxian_state::froggrmc_sound_control_w),this));
34233423
34243424   /* actually needs 2k of RAM */
3425   space->install_ram(0x8000, 0x87ff);
3425   space.install_ram(0x8000, 0x87ff);
34263426
34273427   /* decrypt */
34283428   decode_frogger_sound(machine());
r17963r17964
34583458
34593459DRIVER_INIT_MEMBER(galaxian_state,scorpion)
34603460{
3461   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
3461   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
34623462
34633463   common_init(machine(), scramble_draw_bullet, scramble_draw_background, batman2_extend_tile_info, upper_extend_sprite_info);
34643464
r17963r17964
34663466   machine().device("audiocpu")->memory().space(AS_IO)->install_readwrite_handler(0x00, 0xff, read8_delegate(FUNC(galaxian_state::scorpion_ay8910_r),this), write8_delegate(FUNC(galaxian_state::scorpion_ay8910_w),this));
34673467
34683468   /* extra ROM */
3469   space->install_read_bank(0x5800, 0x67ff, "bank1");
3469   space.install_read_bank(0x5800, 0x67ff, "bank1");
34703470   membank("bank1")->set_base(memregion("maincpu")->base() + 0x5800);
34713471
34723472   /* no background related */
3473//  space->nop_write(0x6803, 0x6803);
3473//  space.nop_write(0x6803, 0x6803);
34743474
34753475   machine().device("audiocpu")->memory().space(AS_PROGRAM)->install_read_handler(0x3000, 0x3000, read8_delegate(FUNC(galaxian_state::scorpion_digitalker_intr_r),this));
34763476/*
trunk/src/mame/drivers/hyprduel.c
r17963r17964
268268   return ROM[offs];
269269}
270270
271void hyprduel_state::blt_write( address_space *space, const int tmap, const offs_t offs, const UINT16 data, const UINT16 mask )
271void hyprduel_state::blt_write( address_space &space, const int tmap, const offs_t offs, const UINT16 data, const UINT16 mask )
272272{
273273   switch( tmap )
274274   {
275      case 1:   hyprduel_vram_0_w(*space, offs,data,mask);   break;
276      case 2:   hyprduel_vram_1_w(*space, offs, data, mask);   break;
277      case 3:   hyprduel_vram_2_w(*space, offs, data, mask);   break;
275      case 1:   hyprduel_vram_0_w(space, offs,data,mask);   break;
276      case 2:   hyprduel_vram_1_w(space, offs, data, mask);   break;
277      case 3:   hyprduel_vram_2_w(space, offs, data, mask);   break;
278278   }
279//  logerror("%s : Blitter %X] %04X <- %04X & %04X\n", space->machine().describe_context(), tmap, offs, data, mask);
279//  logerror("%s : Blitter %X] %04X <- %04X & %04X\n", space.machine().describe_context(), tmap, offs, data, mask);
280280}
281281
282282
r17963r17964
344344                  src_offs++;
345345
346346                  dst_offs &= 0xffff;
347                  blt_write(&space, tmap, dst_offs, b2, mask);
347                  blt_write(space, tmap, dst_offs, b2, mask);
348348                  dst_offs = ((dst_offs + 1) & (0x100 - 1)) | (dst_offs & (~(0x100 - 1)));
349349               }
350350               break;
r17963r17964
360360               while (count--)
361361               {
362362                  dst_offs &= 0xffff;
363                  blt_write(&space, tmap, dst_offs, b2 << shift, mask);
363                  blt_write(space, tmap, dst_offs, b2 << shift, mask);
364364                  dst_offs = ((dst_offs + 1) & (0x100 - 1)) | (dst_offs & (~(0x100 - 1)));
365365                  b2++;
366366               }
r17963r17964
377377               while (count--)
378378               {
379379                  dst_offs &= 0xffff;
380                  blt_write(&space, tmap, dst_offs, b2, mask);
380                  blt_write(space, tmap, dst_offs, b2, mask);
381381                  dst_offs = ((dst_offs + 1) & (0x100 - 1)) | (dst_offs & (~(0x100 - 1)));
382382               }
383383               break;
trunk/src/mame/drivers/flstory.c
r17963r17964
119119
120120CUSTOM_INPUT_MEMBER(flstory_state::victnine_mcu_status_bit01_r)
121121{
122   address_space *space = m_maincpu->space(AS_PROGRAM);
122   address_space &space = *m_maincpu->space(AS_PROGRAM);
123123
124   return (victnine_mcu_status_r(*space, 0) & 3);
124   return (victnine_mcu_status_r(space, 0) & 3);
125125}
126126
127127static ADDRESS_MAP_START( victnine_map, AS_PROGRAM, 8, flstory_state )
trunk/src/mame/drivers/atetris.c
r17963r17964
139139READ8_MEMBER(atetris_state::atetris_slapstic_r)
140140{
141141   int result = m_slapstic_base[0x2000 + offset];
142   int new_bank = slapstic_tweak(&space, offset) & 1;
142   int new_bank = slapstic_tweak(space, offset) & 1;
143143
144144   /* update for the new bank */
145145   if (new_bank != m_current_bank)
trunk/src/mame/drivers/kyugo.c
r17963r17964
510510
511511void kyugo_state::machine_reset()
512512{
513   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
513   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
514514   // must start with interrupts and sub CPU disabled
515515   m_nmi_mask = 0;
516   kyugo_sub_cpu_control_w(*space, 0, 0);
516   kyugo_sub_cpu_control_w(space, 0, 0);
517517
518518   m_scroll_x_lo = 0;
519519   m_scroll_x_hi = 0;
trunk/src/mame/drivers/pcat_nit.c
r17963r17964
427427   machine().device<nvram_device>("nvram")->set_base(m_banked_nvram, 0x2000);
428428
429429   pc_vga_init(machine(), vga_setting, NULL);
430   pc_vga_io_init(machine(), machine().device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, machine().device("maincpu")->memory().space(AS_IO), 0x0000);
430   pc_vga_io_init(machine(), *machine().device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, *machine().device("maincpu")->memory().space(AS_IO), 0x0000);
431431}
432432
433433GAME( 1993, bonanza,    0,         pcat_nit,  pcat_nit, pcat_nit_state, pcat_nit, ROT0, "New Image Technologies",  "Bonanza (Revision 3)", GAME_NOT_WORKING|GAME_NO_SOUND )
trunk/src/mame/drivers/tiamc1.c
r17963r17964
120120
121121void tiamc1_state::machine_reset()
122122{
123   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
124   tiamc1_bankswitch_w(*space, 0, 0);
123   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
124   tiamc1_bankswitch_w(space, 0, 0);
125125}
126126
127127WRITE8_MEMBER(tiamc1_state::tiamc1_control_w)
trunk/src/mame/drivers/segag80r.c
r17963r17964
166166 *
167167 *************************************/
168168
169static offs_t decrypt_offset(address_space *space, offs_t offset)
169static offs_t decrypt_offset(address_space &space, offs_t offset)
170170{
171   segag80r_state *state = space->machine().driver_data<segag80r_state>();
171   segag80r_state *state = space.machine().driver_data<segag80r_state>();
172172
173173   /* ignore anything but accesses via opcode $32 (LD $(XXYY),A) */
174   offs_t pc = space->device().safe_pcbase();
175   if ((UINT16)pc == 0xffff || space->read_byte(pc) != 0x32)
174   offs_t pc = space.device().safe_pcbase();
175   if ((UINT16)pc == 0xffff || space.read_byte(pc) != 0x32)
176176      return offset;
177177
178178   /* fetch the low byte of the address and munge it */
179   return (offset & 0xff00) | (*state->m_decrypt)(pc, space->read_byte(pc + 1));
179   return (offset & 0xff00) | (*state->m_decrypt)(pc, space.read_byte(pc + 1));
180180}
181181
182182WRITE8_MEMBER(segag80r_state::mainram_w)
183183{
184   m_mainram[decrypt_offset(&space, offset)] = data;
184   m_mainram[decrypt_offset(space, offset)] = data;
185185}
186186
187WRITE8_MEMBER(segag80r_state::vidram_w){ segag80r_videoram_w(space, decrypt_offset(&space, offset), data); }
188WRITE8_MEMBER(segag80r_state::monsterb_vidram_w){ monsterb_videoram_w(space, decrypt_offset(&space, offset), data); }
189WRITE8_MEMBER(segag80r_state::pignewt_vidram_w){ pignewt_videoram_w(space, decrypt_offset(&space, offset), data); }
190WRITE8_MEMBER(segag80r_state::sindbadm_vidram_w){ sindbadm_videoram_w(space, decrypt_offset(&space, offset), data); }
191WRITE8_MEMBER(segag80r_state::usb_ram_w){ device_t *device = machine().device("usbsnd"); sega_usb_ram_w(device, space, decrypt_offset(machine().device("maincpu")->memory().space(AS_PROGRAM), offset), data); }
187WRITE8_MEMBER(segag80r_state::vidram_w){ segag80r_videoram_w(space, decrypt_offset(space, offset), data); }
188WRITE8_MEMBER(segag80r_state::monsterb_vidram_w){ monsterb_videoram_w(space, decrypt_offset(space, offset), data); }
189WRITE8_MEMBER(segag80r_state::pignewt_vidram_w){ pignewt_videoram_w(space, decrypt_offset(space, offset), data); }
190WRITE8_MEMBER(segag80r_state::sindbadm_vidram_w){ sindbadm_videoram_w(space, decrypt_offset(space, offset), data); }
191WRITE8_MEMBER(segag80r_state::usb_ram_w){ device_t *device = machine().device("usbsnd"); sega_usb_ram_w(device, space, decrypt_offset(*machine().device("maincpu")->memory().space(AS_PROGRAM), offset), data); }
192192
193193
194194
trunk/src/mame/drivers/tmnt.c
r17963r17964
773773   return 0;
774774}
775775
776static void tmnt2_put_word( address_space *space, UINT32 addr, UINT16 data )
776static void tmnt2_put_word( address_space &space, UINT32 addr, UINT16 data )
777777{
778   tmnt_state *state = space->machine().driver_data<tmnt_state>();
778   tmnt_state *state = space.machine().driver_data<tmnt_state>();
779779
780780   UINT32 offs;
781781   if (addr >= 0x180000 / 2 && addr <= 0x183fff / 2)
r17963r17964
785785      if (!(offs & 0x0031))
786786      {
787787         offs = ((offs & 0x000e) >> 1) | ((offs & 0x1fc0) >> 3);
788         k053245_word_w(state->m_k053245, *space, offs, data, 0xffff);
788         k053245_word_w(state->m_k053245, space, offs, data, 0xffff);
789789      }
790790   }
791791   else if (addr >= 0x104000 / 2 && addr <= 0x107fff / 2)
r17963r17964
905905   xoffs += xmod;
906906   yoffs += ymod;
907907
908   tmnt2_put_word(&space, dst_addr +  0, attr1);
909   tmnt2_put_word(&space, dst_addr +  2, code);
910   tmnt2_put_word(&space, dst_addr +  4, (UINT32)yoffs);
911   tmnt2_put_word(&space, dst_addr +  6, (UINT32)xoffs);
912   tmnt2_put_word(&space, dst_addr + 12, attr2 | color);
908   tmnt2_put_word(space, dst_addr +  0, attr1);
909   tmnt2_put_word(space, dst_addr +  2, code);
910   tmnt2_put_word(space, dst_addr +  4, (UINT32)yoffs);
911   tmnt2_put_word(space, dst_addr +  6, (UINT32)xoffs);
912   tmnt2_put_word(space, dst_addr + 12, attr2 | color);
913913}
914914#else // for reference; do not remove
915915WRITE16_MEMBER(tmnt_state::tmnt2_1c0800_w)
trunk/src/mame/drivers/tasman.c
r17963r17964
137137
138138static READ32_HANDLER( test_r )
139139{
140   return -1;//space->machine().rand();
140   return -1;//space.machine().rand();
141141}
142142
143143/*
144144 static READ32_HANDLER( rng_r )
145145{
146    return space->machine().rand();
146    return space.machine().rand();
147147}
148148*/
149149
trunk/src/mame/drivers/raiden2.c
r17963r17964
11591159
11601160READ16_MEMBER(raiden2_state::raiden2_sound_comms_r)
11611161{
1162   return seibu_main_word_r(&space,(offset >> 1) & 7,0xffff);
1162   return seibu_main_word_r(space,(offset >> 1) & 7,0xffff);
11631163}
11641164
11651165WRITE16_MEMBER(raiden2_state::raiden2_sound_comms_w)
11661166{
1167   seibu_main_word_w(&space,(offset >> 1) & 7,data,0x00ff);
1167   seibu_main_word_w(space,(offset >> 1) & 7,data,0x00ff);
11681168}
11691169
11701170WRITE16_MEMBER(raiden2_state::raiden2_bank_w)
trunk/src/mame/drivers/taitojc.c
r17963r17964
569569
570570
571571
572static UINT8 mcu_comm_reg_r(address_space *space, int reg)
572static UINT8 mcu_comm_reg_r(address_space &space, int reg)
573573{
574   taitojc_state *state = space->machine().driver_data<taitojc_state>();
574   taitojc_state *state = space.machine().driver_data<taitojc_state>();
575575   UINT8 r = 0;
576576
577577   switch (reg)
r17963r17964
588588      }
589589      default:
590590      {
591         //mame_printf_debug("hc11_reg_r: %02X at %08X\n", reg, space->device().safe_pc());
591         //mame_printf_debug("hc11_reg_r: %02X at %08X\n", reg, space.device().safe_pc());
592592         break;
593593      }
594594   }
r17963r17964
596596   return r;
597597}
598598
599static void mcu_comm_reg_w(address_space *space, int reg, UINT8 data)
599static void mcu_comm_reg_w(address_space &space, int reg, UINT8 data)
600600{
601   taitojc_state *state = space->machine().driver_data<taitojc_state>();
601   taitojc_state *state = space.machine().driver_data<taitojc_state>();
602602
603603   switch (reg)
604604   {
r17963r17964
615615      }
616616      default:
617617      {
618         //mame_printf_debug("hc11_reg_w: %02X, %02X at %08X\n", reg, data, space->device().safe_pc());
618         //mame_printf_debug("hc11_reg_w: %02X, %02X at %08X\n", reg, data, space.device().safe_pc());
619619         break;
620620      }
621621   }
r17963r17964
628628
629629   if (ACCESSING_BITS_24_31)
630630   {
631      r |= mcu_comm_reg_r(&space, reg + 0) << 24;
631      r |= mcu_comm_reg_r(space, reg + 0) << 24;
632632   }
633633   if (ACCESSING_BITS_16_23)
634634   {
635      r |= mcu_comm_reg_r(&space, reg + 1) << 16;
635      r |= mcu_comm_reg_r(space, reg + 1) << 16;
636636   }
637637   if (ACCESSING_BITS_8_15)
638638   {
639      r |= mcu_comm_reg_r(&space, reg + 2) << 8;
639      r |= mcu_comm_reg_r(space, reg + 2) << 8;
640640   }
641641   if (ACCESSING_BITS_0_7)
642642   {
643      r |= mcu_comm_reg_r(&space, reg + 3) << 0;
643      r |= mcu_comm_reg_r(space, reg + 3) << 0;
644644   }
645645
646646   return r;
r17963r17964
652652
653653   if (ACCESSING_BITS_24_31)
654654   {
655      mcu_comm_reg_w(&space, reg + 0, (data >> 24) & 0xff);
655      mcu_comm_reg_w(space, reg + 0, (data >> 24) & 0xff);
656656   }
657657   if (ACCESSING_BITS_16_23)
658658   {
659      mcu_comm_reg_w(&space, reg + 1, (data >> 16) & 0xff);
659      mcu_comm_reg_w(space, reg + 1, (data >> 16) & 0xff);
660660   }
661661   if (ACCESSING_BITS_8_15)
662662   {
663      mcu_comm_reg_w(&space, reg + 2, (data >> 8) & 0xff);
663      mcu_comm_reg_w(space, reg + 2, (data >> 8) & 0xff);
664664   }
665665   if (ACCESSING_BITS_0_7)
666666   {
667      mcu_comm_reg_w(&space, reg + 3, (data >> 0) & 0xff);
667      mcu_comm_reg_w(space, reg + 3, (data >> 0) & 0xff);
668668   }
669669}
670670
trunk/src/mame/drivers/berzerk.c
r17963r17964
582582
583583static SOUND_RESET(berzerk)
584584{
585   address_space *space = machine.device("maincpu")->memory().space(AS_IO);
585   address_space &space = *machine.device("maincpu")->memory().space(AS_IO);
586586   berzerk_state *state = machine.driver_data<berzerk_state>();
587587   /* clears the flip-flop controlling the volume and freq on the speech chip */
588   state->berzerk_audio_w(*space, 4, 0x40);
588   state->berzerk_audio_w(space, 4, 0x40);
589589}
590590
591591
trunk/src/mame/drivers/magtouch.c
r17963r17964
249249DRIVER_INIT_MEMBER(magtouch_state,magtouch)
250250{
251251   pc_vga_init(machine(), vga_setting, NULL);
252   pc_vga_io_init(machine(), machine().device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, machine().device("maincpu")->memory().space(AS_IO), 0x0000);
252   pc_vga_io_init(machine(), *machine().device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, *machine().device("maincpu")->memory().space(AS_IO), 0x0000);
253253}
254254
255255GAME( 1995, magtouch,   0,         magtouch,  magtouch, magtouch_state, magtouch, ROT0, "Micro Manufacturing",     "Magical Touch", GAME_NOT_WORKING | GAME_NO_SOUND )
trunk/src/mame/drivers/model3.c
r17963r17964
10591059
10601060static UINT32 scsi_fetch(running_machine &machine, UINT32 dsp)
10611061{
1062   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1062   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
10631063   UINT32 result;
1064   result = space->read_dword(dsp);
1064   result = space.read_dword(dsp);
10651065   return FLIPENDIAN_INT32(result);
10661066}
10671067
r17963r17964
11591159
11601160static void real3d_dma_callback(running_machine &machine, UINT32 src, UINT32 dst, int length, int byteswap)
11611161{
1162   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1162   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
11631163   switch(dst >> 24)
11641164   {
11651165      case 0x88:      /* Display List End Trigger */
trunk/src/mame/drivers/cps3.c
r17963r17964
14561456
14571457
14581458
1459static UINT32 cps3_flashmain_r(address_space *space, int which, UINT32 offset, UINT32 mem_mask)
1459static UINT32 cps3_flashmain_r(address_space &space, int which, UINT32 offset, UINT32 mem_mask)
14601460{
1461   cps3_state *state = space->machine().driver_data<cps3_state>();
1461   cps3_state *state = space.machine().driver_data<cps3_state>();
14621462   UINT32 result = 0;
14631463
14641464   if (state->m_simm[which][0] == NULL || state->m_simm[which][1] == NULL || state->m_simm[which][2] == NULL || state->m_simm[which][3] == NULL)
r17963r17964
14941494
14951495READ32_MEMBER(cps3_state::cps3_flash1_r)
14961496{
1497   UINT32 retvalue = cps3_flashmain_r(&space, 0, offset,mem_mask);
1497   UINT32 retvalue = cps3_flashmain_r(space, 0, offset,mem_mask);
14981498
14991499   if (m_altEncryption) return retvalue;
15001500
r17963r17964
15041504
15051505READ32_MEMBER(cps3_state::cps3_flash2_r)
15061506{
1507   UINT32 retvalue = cps3_flashmain_r(&space, 1, offset,mem_mask);
1507   UINT32 retvalue = cps3_flashmain_r(space, 1, offset,mem_mask);
15081508
15091509   if (m_altEncryption) return retvalue;
15101510
trunk/src/mame/drivers/pastelg.c
r17963r17964
4747{
4848   UINT8 *ROM = memregion("voice")->base();
4949
50   return ROM[pastelg_blitter_src_addr_r(&space) & 0x7fff];
50   return ROM[pastelg_blitter_src_addr_r(space) & 0x7fff];
5151}
5252
5353static ADDRESS_MAP_START( pastelg_map, AS_PROGRAM, 8, pastelg_state )
trunk/src/mame/drivers/seattle.c
r17963r17964
506506static void update_vblank_irq(running_machine &machine);
507507static void galileo_reset(running_machine &machine);
508508static TIMER_CALLBACK( galileo_timer_callback );
509static void galileo_perform_dma(address_space *space, int which);
509static void galileo_perform_dma(address_space &space, int which);
510510static void voodoo_stall(device_t *device, int stall);
511511static void widget_reset(running_machine &machine);
512512static void update_widget_irq(running_machine &machine);
r17963r17964
798798 *
799799 *************************************/
800800
801static UINT32 pci_bridge_r(address_space *space, UINT8 reg, UINT8 type)
801static UINT32 pci_bridge_r(address_space &space, UINT8 reg, UINT8 type)
802802{
803   seattle_state *state = space->machine().driver_data<seattle_state>();
803   seattle_state *state = space.machine().driver_data<seattle_state>();
804804   UINT32 result = state->m_galileo.pci_bridge_regs[reg];
805805
806806   switch (reg)
r17963r17964
815815   }
816816
817817   if (LOG_PCI)
818      logerror("%08X:PCI bridge read: reg %d type %d = %08X\n", space->device().safe_pc(), reg, type, result);
818      logerror("%08X:PCI bridge read: reg %d type %d = %08X\n", space.device().safe_pc(), reg, type, result);
819819   return result;
820820}
821821
822822
823static void pci_bridge_w(address_space *space, UINT8 reg, UINT8 type, UINT32 data)
823static void pci_bridge_w(address_space &space, UINT8 reg, UINT8 type, UINT32 data)
824824{
825   seattle_state *state = space->machine().driver_data<seattle_state>();
825   seattle_state *state = space.machine().driver_data<seattle_state>();
826826   state->m_galileo.pci_bridge_regs[reg] = data;
827827   if (LOG_PCI)
828      logerror("%08X:PCI bridge write: reg %d type %d = %08X\n", space->device().safe_pc(), reg, type, data);
828      logerror("%08X:PCI bridge write: reg %d type %d = %08X\n", space.device().safe_pc(), reg, type, data);
829829}
830830
831831
r17963r17964
836836 *
837837 *************************************/
838838
839static UINT32 pci_3dfx_r(address_space *space, UINT8 reg, UINT8 type)
839static UINT32 pci_3dfx_r(address_space &space, UINT8 reg, UINT8 type)
840840{
841   seattle_state *state = space->machine().driver_data<seattle_state>();
841   seattle_state *state = space.machine().driver_data<seattle_state>();
842842   UINT32 result = state->m_galileo.pci_3dfx_regs[reg];
843843
844844   switch (reg)
r17963r17964
853853   }
854854
855855   if (LOG_PCI)
856      logerror("%08X:PCI 3dfx read: reg %d type %d = %08X\n", space->device().safe_pc(), reg, type, result);
856      logerror("%08X:PCI 3dfx read: reg %d type %d = %08X\n", space.device().safe_pc(), reg, type, result);
857857   return result;
858858}
859859
860860
861static void pci_3dfx_w(address_space *space, UINT8 reg, UINT8 type, UINT32 data)
861static void pci_3dfx_w(address_space &space, UINT8 reg, UINT8 type, UINT32 data)
862862{
863   seattle_state *state = space->machine().driver_data<seattle_state>();
863   seattle_state *state = space.machine().driver_data<seattle_state>();
864864   state->m_galileo.pci_3dfx_regs[reg] = data;
865865
866866   switch (reg)
r17963r17964
876876         break;
877877   }
878878   if (LOG_PCI)
879      logerror("%08X:PCI 3dfx write: reg %d type %d = %08X\n", space->device().safe_pc(), reg, type, data);
879      logerror("%08X:PCI 3dfx write: reg %d type %d = %08X\n", space.device().safe_pc(), reg, type, data);
880880}
881881
882882
r17963r17964
887887 *
888888 *************************************/
889889
890static UINT32 pci_ide_r(address_space *space, UINT8 reg, UINT8 type)
890static UINT32 pci_ide_r(address_space &space, UINT8 reg, UINT8 type)
891891{
892   seattle_state *state = space->machine().driver_data<seattle_state>();
892   seattle_state *state = space.machine().driver_data<seattle_state>();
893893   UINT32 result = state->m_galileo.pci_ide_regs[reg];
894894
895895   switch (reg)
r17963r17964
904904   }
905905
906906   if (LOG_PCI)
907      logerror("%08X:PCI IDE read: reg %d type %d = %08X\n", space->device().safe_pc(), reg, type, result);
907      logerror("%08X:PCI IDE read: reg %d type %d = %08X\n", space.device().safe_pc(), reg, type, result);
908908   return result;
909909}
910910
911911
912static void pci_ide_w(address_space *space, UINT8 reg, UINT8 type, UINT32 data)
912static void pci_ide_w(address_space &space, UINT8 reg, UINT8 type, UINT32 data)
913913{
914   seattle_state *state = space->machine().driver_data<seattle_state>();
914   seattle_state *state = space.machine().driver_data<seattle_state>();
915915   state->m_galileo.pci_ide_regs[reg] = data;
916916   if (LOG_PCI)
917      logerror("%08X:PCI bridge write: reg %d type %d = %08X\n", space->device().safe_pc(), reg, type, data);
917      logerror("%08X:PCI bridge write: reg %d type %d = %08X\n", space.device().safe_pc(), reg, type, data);
918918}
919919
920920
r17963r17964
973973 *
974974 *************************************/
975975
976static int galileo_dma_fetch_next(address_space *space, int which)
976static int galileo_dma_fetch_next(address_space &space, int which)
977977{
978   seattle_state *state = space->machine().driver_data<seattle_state>();
978   seattle_state *state = space.machine().driver_data<seattle_state>();
979979   galileo_data &galileo = state->m_galileo;
980980   offs_t address = 0;
981981   UINT32 data;
r17963r17964
990990      if (galileo.reg[GREG_DMA0_CONTROL + which] & 0x400)
991991      {
992992         galileo.reg[GREG_INT_STATE] |= 1 << (GINT_DMA0COMP_SHIFT + which);
993         update_galileo_irqs(space->machine());
993         update_galileo_irqs(space.machine());
994994      }
995995      galileo.reg[GREG_DMA0_CONTROL + which] &= ~0x5000;
996996      return 0;
997997   }
998998
999999   /* fetch the byte count */
1000   data = space->read_dword(address); address += 4;
1000   data = space.read_dword(address); address += 4;
10011001   galileo.reg[GREG_DMA0_COUNT + which] = data;
10021002
10031003   /* fetch the source address */
1004   data = space->read_dword(address); address += 4;
1004   data = space.read_dword(address); address += 4;
10051005   galileo.reg[GREG_DMA0_SOURCE + which] = data;
10061006
10071007   /* fetch the dest address */
1008   data = space->read_dword(address); address += 4;
1008   data = space.read_dword(address); address += 4;
10091009   galileo.reg[GREG_DMA0_DEST + which] = data;
10101010
10111011   /* fetch the next record address */
1012   data = space->read_dword(address); address += 4;
1012   data = space.read_dword(address); address += 4;
10131013   galileo.reg[GREG_DMA0_NEXT + which] = data;
10141014   return 1;
10151015}
10161016
10171017
1018static void galileo_perform_dma(address_space *space, int which)
1018static void galileo_perform_dma(address_space &space, int which)
10191019{
1020   seattle_state *state = space->machine().driver_data<seattle_state>();
1020   seattle_state *state = space.machine().driver_data<seattle_state>();
10211021   galileo_data &galileo = state->m_galileo;
10221022   do
10231023   {
r17963r17964
10681068            }
10691069
10701070            /* write the data and advance */
1071            voodoo_w(state->m_voodoo, *space, (dstaddr & 0xffffff) / 4, space->read_dword(srcaddr), 0xffffffff);
1071            voodoo_w(state->m_voodoo, space, (dstaddr & 0xffffff) / 4, space.read_dword(srcaddr), 0xffffffff);
10721072            srcaddr += srcinc;
10731073            dstaddr += dstinc;
10741074            bytesleft -= 4;
r17963r17964
10801080      {
10811081         while (bytesleft > 0)
10821082         {
1083            space->write_byte(dstaddr, space->read_byte(srcaddr));
1083            space.write_byte(dstaddr, space.read_byte(srcaddr));
10841084            srcaddr += srcinc;
10851085            dstaddr += dstinc;
10861086            bytesleft--;
r17963r17964
11011101      if (!(galileo.reg[GREG_DMA0_CONTROL + which] & 0x400))
11021102      {
11031103         galileo.reg[GREG_INT_STATE] |= 1 << (GINT_DMA0COMP_SHIFT + which);
1104         update_galileo_irqs(space->machine());
1104         update_galileo_irqs(space.machine());
11051105      }
11061106   } while (galileo_dma_fetch_next(space, which));
11071107
r17963r17964
11691169
11701170         /* unit 0 is the PCI bridge */
11711171         if (unit == 0 && func == 0)
1172            result = pci_bridge_r(&space, reg, type);
1172            result = pci_bridge_r(space, reg, type);
11731173
11741174         /* unit 8 is the 3dfx card */
11751175         else if (unit == 8 && func == 0)
1176            result = pci_3dfx_r(&space, reg, type);
1176            result = pci_3dfx_r(space, reg, type);
11771177
11781178         /* unit 9 is the IDE controller */
11791179         else if (unit == 9 && func == 0)
1180            result = pci_ide_r(&space, reg, type);
1180            result = pci_ide_r(space, reg, type);
11811181
11821182         /* anything else, just log */
11831183         else
r17963r17964
12301230
12311231         /* fetch next record */
12321232         if (data & 0x2000)
1233            galileo_dma_fetch_next(&space, which);
1233            galileo_dma_fetch_next(space, which);
12341234         galileo.reg[offset] &= ~0x2000;
12351235
12361236         /* if enabling, start the DMA */
12371237         if (!(oldata & 0x1000) && (data & 0x1000))
1238            galileo_perform_dma(&space, which);
1238            galileo_perform_dma(space, which);
12391239         break;
12401240      }
12411241
r17963r17964
13081308
13091309         /* unit 0 is the PCI bridge */
13101310         if (unit == 0 && func == 0)
1311            pci_bridge_w(&space, reg, type, data);
1311            pci_bridge_w(space, reg, type, data);
13121312
13131313         /* unit 8 is the 3dfx card */
13141314         else if (unit == 8 && func == 0)
1315            pci_3dfx_w(&space, reg, type, data);
1315            pci_3dfx_w(space, reg, type, data);
13161316
13171317         /* unit 9 is the IDE controller */
13181318         else if (unit == 9 && func == 0)
1319            pci_ide_w(&space, reg, type, data);
1319            pci_ide_w(space, reg, type, data);
13201320
13211321         /* anything else, just log */
13221322         else
r17963r17964
14031403      for (which = 0; which < 4; which++)
14041404         if (state->m_galileo.dma_stalled_on_voodoo[which])
14051405         {
1406            address_space *space = device->machine().device("maincpu")->memory().space(AS_PROGRAM);
1406            address_space &space = *device->machine().device("maincpu")->memory().space(AS_PROGRAM);
14071407            if (LOG_DMA) logerror("Resuming DMA%d on voodoo\n", which);
14081408
14091409            /* mark this DMA as no longer stalled */
trunk/src/mame/drivers/tcl.c
r17963r17964
189189{
190190   /* only the first part is decrypted (and verified)*/
191191
192   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
192   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
193193   UINT8 *dest = machine().root_device().memregion("maincpu")->base();
194194   int len = machine().root_device().memregion("maincpu")->bytes();
195195   UINT8 *src = auto_alloc_array(machine(), UINT8, len);
r17963r17964
215215   }
216216   auto_free(machine(), src);
217217
218   space->set_decrypted_region(0x0000, 0x7fff, dest+0x10000);
218   space.set_decrypted_region(0x0000, 0x7fff, dest+0x10000);
219219}
220220
221221GAME( 1995, tcl,  0,       tcl,  tcl, tcl_state,  tcl, ROT0, "Uniwang", "Taiwan Chess Legend", GAME_NOT_WORKING )
trunk/src/mame/drivers/pturn.c
r17963r17964
479479
480480void pturn_state::machine_reset()
481481{
482   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
483   soundlatch_clear_byte_w(*space,0,0);
482   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
483   soundlatch_clear_byte_w(space,0,0);
484484}
485485
486486static MACHINE_CONFIG_START( pturn, pturn_state )
trunk/src/mame/drivers/dec0.c
r17963r17964
422422void slyspy_set_protection_map(running_machine& machine, int type)
423423{
424424   dec0_state *state = machine.driver_data<dec0_state>();
425   address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
425   address_space& space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
426426
427427   deco_bac06_device *tilegen1 = (deco_bac06_device*)state->m_tilegen1;
428428   deco_bac06_device *tilegen2 = (deco_bac06_device*)state->m_tilegen2;
429429
430   space->install_write_handler( 0x240000, 0x24ffff, write16_delegate(FUNC(dec0_state::unmapped_w),state));
430   space.install_write_handler( 0x240000, 0x24ffff, write16_delegate(FUNC(dec0_state::unmapped_w),state));
431431
432   space->install_write_handler( 0x24a000, 0x24a001, write16_delegate(FUNC(dec0_state::slyspy_state_w),state));
433   space->install_read_handler( 0x244000, 0x244001, read16_delegate(FUNC(dec0_state::slyspy_state_r),state));
432   space.install_write_handler( 0x24a000, 0x24a001, write16_delegate(FUNC(dec0_state::slyspy_state_w),state));
433   space.install_read_handler( 0x244000, 0x244001, read16_delegate(FUNC(dec0_state::slyspy_state_r),state));
434434
435435   switch (type)
436436   {
437437
438438      case 0:
439         space->install_legacy_write_handler( *tilegen2, 0x240000, 0x240007, FUNC(deco_bac06_pf_control_0_w));
440         space->install_legacy_write_handler( *tilegen2, 0x240010, 0x240017, FUNC(deco_bac06_pf_control_1_w));
439         space.install_legacy_write_handler( *tilegen2, 0x240000, 0x240007, FUNC(deco_bac06_pf_control_0_w));
440         space.install_legacy_write_handler( *tilegen2, 0x240010, 0x240017, FUNC(deco_bac06_pf_control_1_w));
441441
442         space->install_legacy_write_handler( *tilegen2, 0x242000, 0x24207f, FUNC(deco_bac06_pf_colscroll_w));
443         space->install_legacy_write_handler( *tilegen2, 0x242400, 0x2427ff, FUNC(deco_bac06_pf_rowscroll_w));
442         space.install_legacy_write_handler( *tilegen2, 0x242000, 0x24207f, FUNC(deco_bac06_pf_colscroll_w));
443         space.install_legacy_write_handler( *tilegen2, 0x242400, 0x2427ff, FUNC(deco_bac06_pf_rowscroll_w));
444444
445         space->install_legacy_write_handler( *tilegen2, 0x246000, 0x247fff, FUNC(deco_bac06_pf_data_w));
445         space.install_legacy_write_handler( *tilegen2, 0x246000, 0x247fff, FUNC(deco_bac06_pf_data_w));
446446
447         space->install_legacy_write_handler( *tilegen1, 0x248000, 0x280007, FUNC(deco_bac06_pf_control_0_w));
448         space->install_legacy_write_handler( *tilegen1, 0x248010, 0x280017, FUNC(deco_bac06_pf_control_1_w));
447         space.install_legacy_write_handler( *tilegen1, 0x248000, 0x280007, FUNC(deco_bac06_pf_control_0_w));
448         space.install_legacy_write_handler( *tilegen1, 0x248010, 0x280017, FUNC(deco_bac06_pf_control_1_w));
449449
450         space->install_legacy_write_handler( *tilegen1, 0x24c000, 0x24c07f, FUNC(deco_bac06_pf_colscroll_w));
451         space->install_legacy_write_handler( *tilegen1, 0x24c400, 0x24c7ff, FUNC(deco_bac06_pf_rowscroll_w));
450         space.install_legacy_write_handler( *tilegen1, 0x24c000, 0x24c07f, FUNC(deco_bac06_pf_colscroll_w));
451         space.install_legacy_write_handler( *tilegen1, 0x24c400, 0x24c7ff, FUNC(deco_bac06_pf_rowscroll_w));
452452
453         space->install_legacy_write_handler( *tilegen1, 0x24e000, 0x24ffff, FUNC(deco_bac06_pf_data_w));
453         space.install_legacy_write_handler( *tilegen1, 0x24e000, 0x24ffff, FUNC(deco_bac06_pf_data_w));
454454
455455         break;
456456
r17963r17964
458458         // 0x240000 - 0x241fff not mapped
459459         // 0x242000 - 0x243fff not mapped
460460         // 0x246000 - 0x247fff not mapped
461         space->install_legacy_write_handler( *tilegen1, 0x248000, 0x249fff, FUNC(deco_bac06_pf_data_w));
462         space->install_legacy_write_handler( *tilegen2, 0x24c000, 0x24dfff, FUNC(deco_bac06_pf_data_w));
461         space.install_legacy_write_handler( *tilegen1, 0x248000, 0x249fff, FUNC(deco_bac06_pf_data_w));
462         space.install_legacy_write_handler( *tilegen2, 0x24c000, 0x24dfff, FUNC(deco_bac06_pf_data_w));
463463         // 0x24e000 - 0x24ffff not mapped
464464         break;
465465
466466      case 2:
467         space->install_legacy_write_handler( *tilegen2, 0x240000, 0x241fff, FUNC(deco_bac06_pf_data_w));
468         space->install_legacy_write_handler( *tilegen1, 0x242000, 0x243fff, FUNC(deco_bac06_pf_data_w));
467         space.install_legacy_write_handler( *tilegen2, 0x240000, 0x241fff, FUNC(deco_bac06_pf_data_w));
468         space.install_legacy_write_handler( *tilegen1, 0x242000, 0x243fff, FUNC(deco_bac06_pf_data_w));
469469         // 0x242000 - 0x243fff not mapped
470470         // 0x246000 - 0x247fff not mapped
471471         // 0x248000 - 0x249fff not mapped
472472         // 0x24c000 - 0x24dfff not mapped
473         space->install_legacy_write_handler( *tilegen1, 0x24e000, 0x24ffff, FUNC(deco_bac06_pf_data_w));
473         space.install_legacy_write_handler( *tilegen1, 0x24e000, 0x24ffff, FUNC(deco_bac06_pf_data_w));
474474         break;
475475
476476      case 3:
477         space->install_legacy_write_handler( *tilegen1, 0x240000, 0x241fff, FUNC(deco_bac06_pf_data_w));
477         space.install_legacy_write_handler( *tilegen1, 0x240000, 0x241fff, FUNC(deco_bac06_pf_data_w));
478478         // 0x242000 - 0x243fff not mapped
479479         // 0x246000 - 0x247fff not mapped
480         space->install_legacy_write_handler( *tilegen2, 0x248000, 0x249fff, FUNC(deco_bac06_pf_data_w));
480         space.install_legacy_write_handler( *tilegen2, 0x248000, 0x249fff, FUNC(deco_bac06_pf_data_w));
481481         // 0x24c000 - 0x24dfff not mapped
482482         // 0x24e000 - 0x24ffff not mapped
483483         break;
trunk/src/mame/drivers/midvunit.c
r17963r17964
362362
363363READ32_MEMBER(midvunit_state::offroadc_serial_status_r)
364364{
365   int status = midway_serial_pic2_status_r(&space);
365   int status = midway_serial_pic2_status_r(space);
366366   return (ioport("991030")->read()  & 0x7fff7fff) | (status << 31) | (status << 15);
367367}
368368
369369
370370READ32_MEMBER(midvunit_state::offroadc_serial_data_r)
371371{
372   return midway_serial_pic2_r(&space) << 16;
372   return midway_serial_pic2_r(space) << 16;
373373}
374374
375375
376376WRITE32_MEMBER(midvunit_state::offroadc_serial_data_w)
377377{
378   midway_serial_pic2_w(&space, data >> 16);
378   midway_serial_pic2_w(space, data >> 16);
379379}
380380
381381
trunk/src/mame/drivers/opwolf.c
r17963r17964
499499      msm5205_reset_w(device, 0);
500500   }
501501
502//  logerror("CPU #1     b00%i-data=%2x   pc=%4x\n",offset,data,space->device().safe_pc() );
502//  logerror("CPU #1     b00%i-data=%2x   pc=%4x\n",offset,data,space.device().safe_pc() );
503503}
504504
505505
r17963r17964
522522      msm5205_reset_w(device, 0);
523523   }
524524
525//  logerror("CPU #1     c00%i-data=%2x   pc=%4x\n",offset,data,space->device().safe_pc() );
525//  logerror("CPU #1     c00%i-data=%2x   pc=%4x\n",offset,data,space.device().safe_pc() );
526526}
527527
528528
trunk/src/mame/drivers/pangofun.c
r17963r17964
244244DRIVER_INIT_MEMBER(pangofun_state,pangofun)
245245{
246246   pc_vga_init(machine(), vga_setting, NULL);
247   pc_vga_io_init(machine(), machine().device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, machine().device("maincpu")->memory().space(AS_IO), 0x0000);
247   pc_vga_io_init(machine(), *machine().device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, *machine().device("maincpu")->memory().space(AS_IO), 0x0000);
248248}
249249
250250GAME( 1995, pangofun,  0,   pangofun, pangofun, pangofun_state, pangofun, ROT0, "InfoCube", "Pango Fun (Italy)", GAME_NOT_WORKING|GAME_NO_SOUND )
trunk/src/mame/drivers/suna16.c
r17963r17964
361361
362362MACHINE_RESET_MEMBER(suna16_state,uballoon)
363363{
364   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
365   uballoon_pcm_1_bankswitch_w(*space, 0, 0);
364   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
365   uballoon_pcm_1_bankswitch_w(space, 0, 0);
366366}
367367
368368
trunk/src/mame/drivers/taitopjc.c
r17963r17964
130130
131131static UINT32 video_address;
132132
133static UINT32 videochip_r(address_space *space, offs_t address)
133static UINT32 videochip_r(address_space &space, offs_t address)
134134{
135135   UINT32 r = 0;
136136
r17963r17964
142142   return r;
143143}
144144
145static void videochip_w(address_space *space, offs_t address, UINT32 data)
145static void videochip_w(address_space &space, offs_t address, UINT32 data)
146146{
147147   if (address >= 0x20000000 && address < 0x20008000)
148148   {
149149      //UINT32 r = (data >> 16) & 0xff;
150150      //UINT32 g = (data >> 8) & 0xff;
151151      //UINT32 b = (data >> 0) & 0xff;
152      //palette_set_color_rgb(space->machine, address & 0x7fff, r, g, b);
152      //palette_set_color_rgb(space.machine, address & 0x7fff, r, g, b);
153153   }
154154   else if (address >= 0x1003d000 && address < 0x1003f000)
155155   {
r17963r17964
177177   {
178178      if (ACCESSING_BITS_32_63)
179179      {
180         r |= (UINT64)(videochip_r(&space, video_address)) << 32;
180         r |= (UINT64)(videochip_r(space, video_address)) << 32;
181181      }
182182   }
183183
r17963r17964
191191      if (ACCESSING_BITS_32_63)
192192      {
193193         //printf("Address %08X = %08X\n", video_address, (UINT32)(data >> 32));
194         videochip_w(&space, video_address, (UINT32)(data >> 32));
194         videochip_w(space, video_address, (UINT32)(data >> 32));
195195      }
196196   }
197197   if (offset == 1)
trunk/src/mame/drivers/firebeat.c
r17963r17964
707707
708708static READ32_HANDLER(gcu0_r)
709709{
710   return GCU_r(space->machine(), 0, offset, mem_mask);
710   return GCU_r(space.machine(), 0, offset, mem_mask);
711711}
712712
713713static WRITE32_HANDLER(gcu0_w)
714714{
715   GCU_w(space->machine(), 0, offset, data, mem_mask);
715   GCU_w(space.machine(), 0, offset, data, mem_mask);
716716}
717717
718718static READ32_HANDLER(gcu1_r)
719719{
720   return GCU_r(space->machine(), 1, offset, mem_mask);
720   return GCU_r(space.machine(), 1, offset, mem_mask);
721721}
722722
723723static WRITE32_HANDLER(gcu1_w)
724724{
725   GCU_w(space->machine(), 1, offset, data, mem_mask);
725   GCU_w(space.machine(), 1, offset, data, mem_mask);
726726}
727727
728728/*****************************************************************************/
r17963r17964
733733
734734   if (ACCESSING_BITS_24_31)
735735   {
736      r |= (space->machine().root_device().ioport("IN0")->read() & 0xff) << 24;
736      r |= (space.machine().root_device().ioport("IN0")->read() & 0xff) << 24;
737737   }
738738   if (ACCESSING_BITS_8_15)
739739   {
740      r |= (space->machine().root_device().ioport("IN1")->read() & 0xff) << 8;
740      r |= (space.machine().root_device().ioport("IN1")->read() & 0xff) << 8;
741741   }
742742   if (ACCESSING_BITS_0_7)
743743   {
744      r |= (space->machine().root_device().ioport("IN2")->read() & 0xff);
744      r |= (space.machine().root_device().ioport("IN2")->read() & 0xff);
745745   }
746746
747747   return r;
r17963r17964
751751{
752752   if (offset == 0)
753753   {
754      return space->machine().root_device().ioport("SENSOR1")->read() | 0x01000100;
754      return space.machine().root_device().ioport("SENSOR1")->read() | 0x01000100;
755755   }
756756   else
757757   {
758      return space->machine().root_device().ioport("SENSOR2")->read() | 0x01000100;
758      return space.machine().root_device().ioport("SENSOR2")->read() | 0x01000100;
759759   }
760760}
761761
762762static READ32_HANDLER(flashram_r)
763763{
764   firebeat_state *state = space->machine().driver_data<firebeat_state>();
764   firebeat_state *state = space.machine().driver_data<firebeat_state>();
765765   UINT32 r = 0;
766766   if (ACCESSING_BITS_24_31)
767767   {
r17963r17964
784784
785785static WRITE32_HANDLER(flashram_w)
786786{
787   firebeat_state *state = space->machine().driver_data<firebeat_state>();
787   firebeat_state *state = space.machine().driver_data<firebeat_state>();
788788   if (ACCESSING_BITS_24_31)
789789   {
790790      state->m_flash[0]->write((offset*4)+0, (data >> 24) & 0xff);
r17963r17964
805805
806806static READ32_HANDLER(soundflash_r)
807807{
808   firebeat_state *state = space->machine().driver_data<firebeat_state>();
808   firebeat_state *state = space.machine().driver_data<firebeat_state>();
809809   UINT32 r = 0;
810810   fujitsu_29f016a_device *chip;
811811   if (offset >= 0 && offset < 0x200000/4)
r17963r17964
840840
841841static WRITE32_HANDLER(soundflash_w)
842842{
843   firebeat_state *state = space->machine().driver_data<firebeat_state>();
843   firebeat_state *state = space.machine().driver_data<firebeat_state>();
844844   fujitsu_29f016a_device *chip;
845845   if (offset >= 0 && offset < 0x200000/4)
846846   {
r17963r17964
12201220//  printf("atapi_command_r: %08X, %08X\n", offset, mem_mask);
12211221   if (ACCESSING_BITS_16_31)
12221222   {
1223      r = atapi_command_reg_r(space->machine(), offset*2);
1223      r = atapi_command_reg_r(space.machine(), offset*2);
12241224      return ATAPI_ENDIAN(r) << 16;
12251225   }
12261226   else
12271227   {
1228      r = atapi_command_reg_r(space->machine(), (offset*2) + 1);
1228      r = atapi_command_reg_r(space.machine(), (offset*2) + 1);
12291229      return ATAPI_ENDIAN(r) << 0;
12301230   }
12311231}
r17963r17964
12361236
12371237   if (ACCESSING_BITS_16_31)
12381238   {
1239      atapi_command_reg_w(space->machine(), offset*2, ATAPI_ENDIAN((data >> 16) & 0xffff));
1239      atapi_command_reg_w(space.machine(), offset*2, ATAPI_ENDIAN((data >> 16) & 0xffff));
12401240   }
12411241   else
12421242   {
1243      atapi_command_reg_w(space->machine(), (offset*2) + 1, ATAPI_ENDIAN((data >> 0) & 0xffff));
1243      atapi_command_reg_w(space.machine(), (offset*2) + 1, ATAPI_ENDIAN((data >> 0) & 0xffff));
12441244   }
12451245}
12461246
r17963r17964
12521252
12531253   if (ACCESSING_BITS_16_31)
12541254   {
1255      r = atapi_control_reg_r(space->machine(), offset*2);
1255      r = atapi_control_reg_r(space.machine(), offset*2);
12561256      return ATAPI_ENDIAN(r) << 16;
12571257   }
12581258   else
12591259   {
1260      r = atapi_control_reg_r(space->machine(), (offset*2) + 1);
1260      r = atapi_control_reg_r(space.machine(), (offset*2) + 1);
12611261      return ATAPI_ENDIAN(r) << 0;
12621262   }
12631263}
r17963r17964
12661266{
12671267   if (ACCESSING_BITS_16_31)
12681268   {
1269      atapi_control_reg_w(space->machine(), offset*2, ATAPI_ENDIAN(data >> 16) & 0xff);
1269      atapi_control_reg_w(space.machine(), offset*2, ATAPI_ENDIAN(data >> 16) & 0xff);
12701270   }
12711271   else
12721272   {
1273      atapi_control_reg_w(space->machine(), (offset*2) + 1, ATAPI_ENDIAN(data >> 0) & 0xff);
1273      atapi_control_reg_w(space.machine(), (offset*2) + 1, ATAPI_ENDIAN(data >> 0) & 0xff);
12741274   }
12751275}
12761276
r17963r17964
13351335
13361336static READ32_HANDLER( cabinet_r )
13371337{
1338   firebeat_state *state = space->machine().driver_data<firebeat_state>();
1338   firebeat_state *state = space.machine().driver_data<firebeat_state>();
13391339   UINT32 r = 0;
13401340
13411341//  printf("cabinet_r: %08X, %08X\n", offset, mem_mask);
r17963r17964
13611361{
13621362   if (offset == 0)      // Keyboard Wheel (P1)
13631363   {
1364      return space->machine().root_device().ioport("WHEEL_P1")->read() << 24;
1364      return space.machine().root_device().ioport("WHEEL_P1")->read() << 24;
13651365   }
13661366   else if (offset == 2)   // Keyboard Wheel (P2)
13671367   {
1368      return space->machine().root_device().ioport("WHEEL_P2")->read() << 24;
1368      return space.machine().root_device().ioport("WHEEL_P2")->read() << 24;
13691369   }
13701370
13711371   return 0;
r17963r17964
15001500
15011501static READ32_HANDLER( extend_board_irq_r)
15021502{
1503   firebeat_state *state = space->machine().driver_data<firebeat_state>();
1503   firebeat_state *state = space.machine().driver_data<firebeat_state>();
15041504   UINT32 r = 0;
15051505
15061506   if (ACCESSING_BITS_24_31)
r17963r17964
15131513
15141514static WRITE32_HANDLER( extend_board_irq_w )
15151515{
1516   firebeat_state *state = space->machine().driver_data<firebeat_state>();
1516   firebeat_state *state = space.machine().driver_data<firebeat_state>();
15171517//  printf("extend_board_irq_w: %08X, %08X, %08X\n", data, offset, mem_mask);
15181518
15191519   if (ACCESSING_BITS_24_31)
r17963r17964
16671667
16681668static READ32_HANDLER(ppc_spu_share_r)
16691669{
1670   firebeat_state *state = space->machine().driver_data<firebeat_state>();
1670   firebeat_state *state = space.machine().driver_data<firebeat_state>();
16711671   UINT32 r = 0;
16721672
16731673   if (ACCESSING_BITS_24_31)
r17963r17964
16921692
16931693static WRITE32_HANDLER(ppc_spu_share_w)
16941694{
1695   firebeat_state *state = space->machine().driver_data<firebeat_state>();
1695   firebeat_state *state = space.machine().driver_data<firebeat_state>();
16961696   if (ACCESSING_BITS_24_31)
16971697   {
16981698      state->m_spu_shared_ram[(offset * 4) + 0] = (data >> 24) & 0xff;
r17963r17964
17141714#ifdef UNUSED_FUNCTION
17151715static READ16_HANDLER(m68k_spu_share_r)
17161716{
1717   firebeat_state *state = space->machine().driver_data<firebeat_state>();
1717   firebeat_state *state = space.machine().driver_data<firebeat_state>();
17181718   return state->m_spu_shared_ram[offset] << 8;
17191719}
17201720
17211721static WRITE16_HANDLER(m68k_spu_share_w)
17221722{
1723   firebeat_state *state = space->machine().driver_data<firebeat_state>();
1723   firebeat_state *state = space.machine().driver_data<firebeat_state>();
17241724   state->m_spu_shared_ram[offset] = (data >> 8) & 0xff;
17251725}
17261726#endif
trunk/src/mame/drivers/ojankohs.c
r17963r17964
9999
100100   m_adpcm_reset = BIT(data, 4);
101101   msm5205_reset_w(m_msm, !BIT(data, 4));
102   ojankoc_flipscreen(&space, data);
102   ojankoc_flipscreen(space, data);
103103}
104104
105105WRITE8_MEMBER(ojankohs_state::ojankohs_portselect_w)
trunk/src/mame/drivers/trvquest.c
r17963r17964
4343
4444static READ8_HANDLER( trvquest_question_r )
4545{
46   gameplan_state *state = space->machine().driver_data<gameplan_state>();
46   gameplan_state *state = space.machine().driver_data<gameplan_state>();
4747
4848   return state->memregion("questions")->base()[*state->m_trvquest_question * 0x2000 + offset];
4949}
trunk/src/mame/drivers/plygonet.c
r17963r17964
738738   memset(m_dsp56k_bank04_ram, 0, sizeof(m_dsp56k_bank04_ram));
739739
740740   /* The dsp56k occasionally executes out of mapped memory */
741   address_space *space = machine().device<dsp56k_device>("dsp")->space(AS_PROGRAM);
742   m_dsp56k_update_handler = space->set_direct_update_handler(direct_update_delegate(FUNC(polygonet_state::plygonet_dsp56k_direct_handler), this));
741   address_space &space = *machine().device<dsp56k_device>("dsp")->space(AS_PROGRAM);
742   m_dsp56k_update_handler = space.set_direct_update_handler(direct_update_delegate(FUNC(polygonet_state::plygonet_dsp56k_direct_handler), this));
743743
744744    /* save states */
745745   save_item(NAME(m_dsp56k_bank00_ram));
trunk/src/mame/drivers/progolf.c
r17963r17964
502502DRIVER_INIT_MEMBER(progolf_state,progolf)
503503{
504504   int A;
505   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
505   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
506506   UINT8 *rom = machine().root_device().memregion("maincpu")->base();
507507   UINT8* decrypted = auto_alloc_array(machine(), UINT8, 0x10000);
508508
509   space->set_decrypted_region(0x0000,0xffff, decrypted);
509   space.set_decrypted_region(0x0000,0xffff, decrypted);
510510
511511   /* Swap bits 5 & 6 for opcodes */
512512   for (A = 0xb000 ; A < 0x10000 ; A++)
r17963r17964
516516DRIVER_INIT_MEMBER(progolf_state,progolfa)
517517{
518518   int A;
519   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
519   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
520520   UINT8 *rom = machine().root_device().memregion("maincpu")->base();
521521   UINT8* decrypted = auto_alloc_array(machine(), UINT8, 0x10000);
522522
523   space->set_decrypted_region(0x0000,0xffff, decrypted);
523   space.set_decrypted_region(0x0000,0xffff, decrypted);
524524
525525   /* data is likely to not be encrypted, just the opcodes are. */
526526   for (A = 0x0000 ; A < 0x10000 ; A++)
trunk/src/mame/drivers/powerbal.c
r17963r17964
4747
4848static WRITE16_HANDLER( magicstk_bgvideoram_w )
4949{
50   playmark_state *state = space->machine().driver_data<playmark_state>();
50   playmark_state *state = space.machine().driver_data<playmark_state>();
5151
5252   COMBINE_DATA(&state->m_videoram1[offset]);
5353   state->m_bg_tilemap->mark_tile_dirty(offset);
r17963r17964
5555
5656static WRITE16_HANDLER( tile_banking_w )
5757{
58   playmark_state *state = space->machine().driver_data<playmark_state>();
58   playmark_state *state = space.machine().driver_data<playmark_state>();
5959
6060   if (((data >> 12) & 0x0f) != state->m_tilebank)
6161   {
trunk/src/mame/drivers/segag80v.c
r17963r17964
184184 *
185185 *************************************/
186186
187static offs_t decrypt_offset(address_space *space, offs_t offset)
187static offs_t decrypt_offset(address_space &space, offs_t offset)
188188{
189   segag80v_state *state = space->machine().driver_data<segag80v_state>();
189   segag80v_state *state = space.machine().driver_data<segag80v_state>();
190190
191191   /* ignore anything but accesses via opcode $32 (LD $(XXYY),A) */
192   offs_t pc = space->device().safe_pcbase();
193   if ((UINT16)pc == 0xffff || space->read_byte(pc) != 0x32)
192   offs_t pc = space.device().safe_pcbase();
193   if ((UINT16)pc == 0xffff || space.read_byte(pc) != 0x32)
194194      return offset;
195195
196196   /* fetch the low byte of the address and munge it */
197   return (offset & 0xff00) | (*state->m_decrypt)(pc, space->read_byte(pc + 1));
197   return (offset & 0xff00) | (*state->m_decrypt)(pc, space.read_byte(pc + 1));
198198}
199199
200200WRITE8_MEMBER(segag80v_state::mainram_w)
201201{
202   m_mainram[decrypt_offset(&space, offset)] = data;
202   m_mainram[decrypt_offset(space, offset)] = data;
203203}
204204
205WRITE8_MEMBER(segag80v_state::usb_ram_w){ sega_usb_ram_w(m_usb, space, decrypt_offset(machine().device("maincpu")->memory().space(AS_PROGRAM), offset), data); }
205WRITE8_MEMBER(segag80v_state::usb_ram_w){ sega_usb_ram_w(m_usb, space, decrypt_offset(*machine().device("maincpu")->memory().space(AS_PROGRAM), offset), data); }
206206WRITE8_MEMBER(segag80v_state::vectorram_w)
207207{
208   m_vectorram[decrypt_offset(&space, offset)] = data;
208   m_vectorram[decrypt_offset(space, offset)] = data;
209209}
210210
211211
trunk/src/mame/drivers/astrocde.c
r17963r17964
455455static void profbank_banksw_restore(running_machine &machine)
456456{
457457   astrocde_state *state = machine.driver_data<astrocde_state>();
458   address_space *space = machine.device("maincpu")->memory().space(AS_IO);
458   address_space &space = *machine.device("maincpu")->memory().space(AS_IO);
459459
460   state->profpac_banksw_w(*space, 0, state->m_profpac_bank);
460   state->profpac_banksw_w(space, 0, state->m_profpac_bank);
461461}
462462
463463
trunk/src/mame/drivers/panicr.c
r17963r17964
311311READ8_MEMBER(panicr_state::t5182shared_r)
312312{
313313   if ((offset & 1) == 0)
314      return t5182_sharedram_r(&space, offset/2);
314      return t5182_sharedram_r(space, offset/2);
315315   else
316316      return 0;
317317}
r17963r17964
319319WRITE8_MEMBER(panicr_state::t5182shared_w)
320320{
321321   if ((offset & 1) == 0)
322      t5182_sharedram_w(&space, offset/2, data);
322      t5182_sharedram_w(space, offset/2, data);
323323}
324324
325325
trunk/src/mame/drivers/galaga.c
r17963r17964
889889static void bosco_latch_reset(running_machine &machine)
890890{
891891   galaga_state *state = machine.driver_data<galaga_state>();
892   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
892   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
893893   int i;
894894
895895   /* Reset all latches */
896896   for (i = 0;i < 8;i++)
897      state->bosco_latch_w(*space,i,0);
897      state->bosco_latch_w(space,i,0);
898898}
899899
900900MACHINE_RESET_MEMBER(galaga_state,galaga)
trunk/src/mame/drivers/jalmah.c
r17963r17964
730730static void daireika_palette_dma(running_machine &machine, UINT16 val)
731731{
732732   //jalmah_state *state = machine.driver_data<jalmah_state>();
733   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
733   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
734734   UINT32 index_1, index_2, src_addr, tmp_addr;
735735   /*a0=301c0+jm_shared_ram[0x540/2] & 0xf00 */
736736   /*a1=88000*/
r17963r17964
739739   for(index_1 = 0; index_1 < 0x200; index_1 += 0x20)
740740   {
741741      tmp_addr = src_addr;
742      src_addr = space->read_dword(src_addr);
742      src_addr = space.read_dword(src_addr);
743743
744744      for(index_2 = 0; index_2 < 0x20; index_2 += 2)
745         space->write_word(0x88000 + index_2 + index_1, space->read_word(src_addr + index_2));
745         space.write_word(0x88000 + index_2 + index_1, space.read_word(src_addr + index_2));
746746
747747      src_addr = tmp_addr + 4;
748748   }
trunk/src/mame/drivers/srumbler.c
r17963r17964
4545
4646void srumbler_state::machine_start()
4747{
48   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
48   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
4949   /* initialize banked ROM pointers */
50   srumbler_bankswitch_w(*space,0,0);
50   srumbler_bankswitch_w(space,0,0);
5151}
5252
5353static TIMER_DEVICE_CALLBACK( srumbler_interrupt )
trunk/src/mame/drivers/funworld.c
r17963r17964
45354535******************************************************/
45364536{
45374537   UINT8 *ROM = machine().root_device().memregion("maincpu")->base();
4538   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
4538   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
45394539
45404540   int x;
45414541
r17963r17964
45534553      ROM[x+0x10000] = code;
45544554   }
45554555
4556   space->set_decrypted_region(0x8000, 0xffff, machine().root_device().memregion("maincpu")->base() + 0x18000);
4556   space.set_decrypted_region(0x8000, 0xffff, machine().root_device().memregion("maincpu")->base() + 0x18000);
45574557}
45584558
45594559DRIVER_INIT_MEMBER(funworld_state,royalcdc)
r17963r17964
45684568******************************************************/
45694569
45704570   UINT8 *ROM = machine().root_device().memregion("maincpu")->base();
4571   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
4571   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
45724572
45734573   int x;
45744574
r17963r17964
46064606      ROM[x+0x10000] = code;
46074607   }
46084608
4609   space->set_decrypted_region(0x6000, 0xffff, machine().root_device().memregion("maincpu")->base() + 0x16000);
4609   space.set_decrypted_region(0x6000, 0xffff, machine().root_device().memregion("maincpu")->base() + 0x16000);
46104610}
46114611
46124612
trunk/src/mame/drivers/gsword.c
r17963r17964
191191   switch (offset)
192192   {
193193   case 0x01: /* start button , coins */
194      return space->machine().root_device().ioport("IN0")->read();
194      return space.machine().root_device().ioport("IN0")->read();
195195   case 0x02: /* Player 1 Controller */
196      return space->machine().root_device().ioport("IN1")->read();
196      return space.machine().root_device().ioport("IN1")->read();
197197   case 0x04: /* Player 2 Controller */
198      return space->machine().root_device().ioport("IN3")->read();
198      return space.machine().root_device().ioport("IN3")->read();
199199//  default:
200//      logerror("8741-2 unknown read %d PC=%04x\n",offset,space->device().safe_pc());
200//      logerror("8741-2 unknown read %d PC=%04x\n",offset,space.device().safe_pc());
201201   }
202202   /* unknown */
203203   return 0;
r17963r17964
208208   switch (offset)
209209   {
210210   case 0x01: /* start button  */
211      return space->machine().root_device().ioport("IN2")->read();
211      return space.machine().root_device().ioport("IN2")->read();
212212   case 0x02: /* Player 1 Controller? */
213      return space->machine().root_device().ioport("IN1")->read();
213      return space.machine().root_device().ioport("IN1")->read();
214214   case 0x04: /* Player 2 Controller? */
215      return space->machine().root_device().ioport("IN3")->read();
215      return space.machine().root_device().ioport("IN3")->read();
216216   }
217217   /* unknown */
218//  logerror("8741-3 unknown read %d PC=%04x\n",offset,space->device().safe_pc());
218//  logerror("8741-3 unknown read %d PC=%04x\n",offset,space.device().safe_pc());
219219   return 0;
220220}
221221
trunk/src/mame/drivers/mario.c
r17963r17964
101101 *
102102 *************************************/
103103
104static UINT8 memory_read_byte(address_space *space, offs_t address) { return space->read_byte(address); }
105static void memory_write_byte(address_space *space, offs_t address, UINT8 data) { space->write_byte(address, data); }
104static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
105static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
106106
107107static Z80DMA_INTERFACE( mario_dma )
108108{
trunk/src/mame/drivers/taitowlf.c
r17963r17964
709709   kbdc8042_init(machine(), &at8042);
710710   #if ENABLE_VGA
711711   pc_vga_init(machine(), vga_setting, NULL);
712   pc_vga_io_init(machine(), machine().device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, machine().device("maincpu")->memory().space(AS_IO), 0x0000);
712   pc_vga_io_init(machine(), *machine().device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, *machine().device("maincpu")->memory().space(AS_IO), 0x0000);
713713   #endif
714714}
715715
trunk/src/mame/drivers/playch10.c
r17963r17964
332332{
333333   int source = ( data & 7 );
334334   ppu2c0x_device *ppu = machine().device<ppu2c0x_device>("ppu");
335   ppu->spriteram_dma(&space, source);
335   ppu->spriteram_dma(space, source);
336336}
337337
338338/* Only used in single monitor bios */
trunk/src/mame/drivers/mappy.c
r17963r17964
717717
718718MACHINE_RESET_MEMBER(mappy_state,superpac)
719719{
720   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
720   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
721721   int i;
722722
723723   /* Reset all latches */
724724   for (i = 0; i < 0x10; i += 2)
725      superpac_latch_w(*space,i,0);
725      superpac_latch_w(space,i,0);
726726}
727727
728728MACHINE_RESET_MEMBER(mappy_state,phozon)
729729{
730   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
730   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
731731   int i;
732732
733733   /* Reset all latches */
734734   for (i = 0; i < 0x10; i += 2)
735      phozon_latch_w(*space, i, 0);
735      phozon_latch_w(space, i, 0);
736736}
737737
738738MACHINE_RESET_MEMBER(mappy_state,mappy)
739739{
740   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
740   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
741741   int i;
742742
743743   /* Reset all latches */
744744   for (i = 0; i < 0x10; i += 2)
745      mappy_latch_w(*space, i, 0);
745      mappy_latch_w(space, i, 0);
746746}
747747
748748/* different games need different interrupt generators & timers because they use different Namco I/O devices */
trunk/src/mame/drivers/safarir.c
r17963r17964
154154TILE_GET_INFO_MEMBER(safarir_state::get_bg_tile_info)
155155{
156156   int color;
157   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
158   UINT8 code = ram_r(*space,tile_index | 0x400);
157   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
158   UINT8 code = ram_r(space,tile_index | 0x400);
159159
160160   if (code & 0x80)
161161      color = 6;   /* yellow */
r17963r17964
176176TILE_GET_INFO_MEMBER(safarir_state::get_fg_tile_info)
177177{
178178   int color, flags;
179   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
180   UINT8 code = ram_r(*space,tile_index);
179   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
180   UINT8 code = ram_r(space,tile_index);
181181
182182   if (code & 0x80)
183183      color = 7;   /* white */
trunk/src/mame/drivers/pntnpuzl.c
r17963r17964
385385//  rom[0x2696/2] = 0x4e71;
386386//  rom[0x26a0/2] = 0x4e71;
387387   pc_vga_init(machine(), vga_setting, NULL);
388   pc_vga_io_init(machine(), machine().device("maincpu")->memory().space(AS_PROGRAM), 0x3a0000, machine().device("maincpu")->memory().space(AS_PROGRAM), 0x3c0000);
388   pc_vga_io_init(machine(), *machine().device("maincpu")->memory().space(AS_PROGRAM), 0x3a0000, *machine().device("maincpu")->memory().space(AS_PROGRAM), 0x3c0000);
389389
390390}
391391
trunk/src/mame/drivers/aristmk5.c
r17963r17964
209209      return (m_flyback) | (ioc_regs[CONTROL] & 0x7c) | (1<<1) | 1;
210210   }
211211
212   return archimedes_ioc_r(&space,offset,mem_mask);
212   return archimedes_ioc_r(space,offset,mem_mask);
213213}
214214
215215WRITE32_MEMBER(aristmk5_state::mk5_ioc_w)
r17963r17964
228228         return;
229229      }
230230      else
231         archimedes_ioc_w(&space,offset,data,mem_mask);
231         archimedes_ioc_w(space,offset,data,mem_mask);
232232   }
233233}
234234
trunk/src/mame/drivers/metalmx.c
r17963r17964
352352   if (ACCESSING_BITS_0_15)
353353      result |= cage_control_r(machine());
354354   if (ACCESSING_BITS_16_31)
355      result |= cage_main_r(&space) << 16;
355      result |= cage_main_r(space) << 16;
356356   return result;
357357}
358358
r17963r17964
361361   if (ACCESSING_BITS_0_15)
362362      cage_control_w(machine(), data);
363363   if (ACCESSING_BITS_16_31)
364      cage_main_w(&space, data >> 16);
364      cage_main_w(space, data >> 16);
365365}
366366
367367static void cage_irq_callback(running_machine &machine, int reason)
trunk/src/mame/drivers/omegrace.c
r17963r17964
246246
247247void omegrace_state::machine_reset()
248248{
249   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
249   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
250250   /* Omega Race expects the vector processor to be ready. */
251251   avgdvg_reset_w(space, 0, 0);
252252}
r17963r17964
261261
262262READ8_MEMBER(omegrace_state::omegrace_vg_go_r)
263263{
264   avgdvg_go_w(&space,0,0);
264   avgdvg_go_w(space,0,0);
265265   return 0;
266266}
267267
trunk/src/mame/drivers/decocass.c
r17963r17964
5757
5858static WRITE8_HANDLER( ram_w )
5959{
60   decocass_state *state = space->machine().driver_data<decocass_state>();
60   decocass_state *state = space.machine().driver_data<decocass_state>();
6161   state->m_decrypted[0x0000 + offset] = swap_bits_5_6(data);
6262   state->m_rambase[0x0000 + offset] = data;
6363}
6464
6565static WRITE8_HANDLER( charram_w )
6666{
67   decocass_state *state = space->machine().driver_data<decocass_state>();
67   decocass_state *state = space.machine().driver_data<decocass_state>();
6868   state->m_decrypted[0x6000 + offset] = swap_bits_5_6(data);
6969   decocass_charram_w(space, offset, data);
7070}
7171
7272static WRITE8_HANDLER( fgvideoram_w )
7373{
74   decocass_state *state = space->machine().driver_data<decocass_state>();
74   decocass_state *state = space.machine().driver_data<decocass_state>();
7575   state->m_decrypted[0xc000 + offset] = swap_bits_5_6(data);
7676   decocass_fgvideoram_w(space, offset, data);
7777}
7878
7979static WRITE8_HANDLER( fgcolorram_w )
8080{
81   decocass_state *state = space->machine().driver_data<decocass_state>();
81   decocass_state *state = space.machine().driver_data<decocass_state>();
8282   state->m_decrypted[0xc400 + offset] = swap_bits_5_6(data);
8383   decocass_colorram_w(space, offset, data);
8484}
8585
8686static WRITE8_HANDLER( tileram_w )
8787{
88   decocass_state *state = space->machine().driver_data<decocass_state>();
88   decocass_state *state = space.machine().driver_data<decocass_state>();
8989   state->m_decrypted[0xd000 + offset] = swap_bits_5_6(data);
9090   decocass_tileram_w(space, offset, data);
9191}
9292
9393static WRITE8_HANDLER( objectram_w )
9494{
95   decocass_state *state = space->machine().driver_data<decocass_state>();
95   decocass_state *state = space.machine().driver_data<decocass_state>();
9696   state->m_decrypted[0xd800 + offset] = swap_bits_5_6(data);
9797   decocass_objectram_w(space, offset, data);
9898}
r17963r17964
102102
103103static READ8_HANDLER( mirrorvideoram_r )
104104{
105   decocass_state *state = space->machine().driver_data<decocass_state>();
105   decocass_state *state = space.machine().driver_data<decocass_state>();
106106   offset = ((offset >> 5) & 0x1f) | ((offset & 0x1f) << 5);
107107   return state->m_fgvideoram[offset];
108108}
109109
110110static READ8_HANDLER( mirrorcolorram_r )
111111{
112   decocass_state *state = space->machine().driver_data<decocass_state>();
112   decocass_state *state = space.machine().driver_data<decocass_state>();
113113   offset = ((offset >> 5) & 0x1f) | ((offset & 0x1f) << 5);
114114   return state->m_colorram[offset];
115115}
r17963r17964
16001600
16011601DRIVER_INIT_MEMBER(decocass_state,decocass)
16021602{
1603   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
1603   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
16041604   UINT8 *rom = memregion("maincpu")->base();
16051605   int A;
16061606
16071607   /* allocate memory and mark all RAM regions with their decrypted pointers */
16081608   m_decrypted = auto_alloc_array(machine(), UINT8, 0x10000);
1609   space->set_decrypted_region(0x0000, 0xc7ff, &m_decrypted[0x0000]);
1610   space->set_decrypted_region(0xd000, 0xdbff, &m_decrypted[0xd000]);
1611   space->set_decrypted_region(0xf000, 0xffff, &m_decrypted[0xf000]);
1609   space.set_decrypted_region(0x0000, 0xc7ff, &m_decrypted[0x0000]);
1610   space.set_decrypted_region(0xd000, 0xdbff, &m_decrypted[0xd000]);
1611   space.set_decrypted_region(0xf000, 0xffff, &m_decrypted[0xf000]);
16121612
16131613   /* Swap bits 5 & 6 for opcodes */
16141614   for (A = 0xf000; A < 0x10000; A++)
r17963r17964
16541654
16551655static READ8_HANDLER( cdsteljn_input_r )
16561656{
1657   decocass_state *state = space->machine().driver_data<decocass_state>();
1657   decocass_state *state = space.machine().driver_data<decocass_state>();
16581658   UINT8 res;
16591659   static const char *const portnames[2][4] = {
16601660      {"P1_MP0", "P1_MP1", "P1_MP2", "P1_MP3"},
r17963r17964
16631663   if(offset & 6)
16641664      return decocass_input_r(space,offset);
16651665
1666   res = space->machine().root_device().ioport(portnames[offset & 1][state->m_mux_data])->read();
1666   res = space.machine().root_device().ioport(portnames[offset & 1][state->m_mux_data])->read();
16671667
16681668   return res;
16691669}
16701670
16711671static WRITE8_HANDLER( cdsteljn_mux_w )
16721672{
1673   decocass_state *state = space->machine().driver_data<decocass_state>();
1673   decocass_state *state = space.machine().driver_data<decocass_state>();
16741674
16751675   state->m_mux_data = (data & 0xc) >> 2;
16761676   /* bit 0 and 1 are p1/p2 lamps */
trunk/src/mame/drivers/mystwarr.c
r17963r17964
207207
208208WRITE16_MEMBER(mystwarr_state::irq_ack_w)
209209{
210   K056832_b_word_w(&space, offset, data, mem_mask);
210   K056832_b_word_w(space, offset, data, mem_mask);
211211
212212   if (offset == 3 && ACCESSING_BITS_0_7)
213213   {
r17963r17964
227227   else
228228   {
229229      offset = (offset & 0x0007) | ((offset & 0x7f80) >> 4);
230      return K053247_word_r(&space,offset,mem_mask);
230      return K053247_word_r(space,offset,mem_mask);
231231   }
232232}
233233
r17963r17964
242242   {
243243      offset = (offset & 0x0007) | ((offset & 0x7f80) >> 4);
244244
245      K053247_word_w(&space,offset,data,mem_mask);
245      K053247_word_w(space,offset,data,mem_mask);
246246   }
247247}
248248
r17963r17964
377377   else
378378   {
379379      offset = (offset & 0x0007) | ((offset & 0x1fe0) >> 2);
380      return K053247_word_r(&space,offset,mem_mask);
380      return K053247_word_r(space,offset,mem_mask);
381381   }
382382}
383383
r17963r17964
391391   {
392392      offset = (offset & 0x0007) | ((offset & 0x1fe0) >> 2);
393393
394      K053247_word_w(&space,offset,data,mem_mask);
394      K053247_word_w(space,offset,data,mem_mask);
395395   }
396396}
397397
trunk/src/mame/drivers/klax.c
r17963r17964
4848
4949WRITE16_MEMBER(klax_state::interrupt_ack_w)
5050{
51   atarigen_scanline_int_ack_w(&space, offset, data, mem_mask);
52   atarigen_video_int_ack_w(&space, offset, data, mem_mask);
51   atarigen_scanline_int_ack_w(space, offset, data, mem_mask);
52   atarigen_video_int_ack_w(space, offset, data, mem_mask);
5353}
5454
5555
trunk/src/mame/drivers/ssfindo.c
r17963r17964
350350      state->m_PS7500timer1->adjust( attotime::never);
351351}
352352
353typedef void (*ssfindo_speedup_func)(address_space *space);
353typedef void (*ssfindo_speedup_func)(address_space &space);
354354ssfindo_speedup_func ssfindo_speedup;
355355
356static void ssfindo_speedups(address_space* space)
356static void ssfindo_speedups(address_space& space)
357357{
358   if (space->device().safe_pc()==0x2d6c8) // ssfindo
359      space->device().execute().spin_until_time(attotime::from_usec(20));
360   else if (space->device().safe_pc()==0x2d6bc) // ssfindo
361      space->device().execute().spin_until_time(attotime::from_usec(20));
358   if (space.device().safe_pc()==0x2d6c8) // ssfindo
359      space.device().execute().spin_until_time(attotime::from_usec(20));
360   else if (space.device().safe_pc()==0x2d6bc) // ssfindo
361      space.device().execute().spin_until_time(attotime::from_usec(20));
362362}
363363
364static void ppcar_speedups(address_space* space)
364static void ppcar_speedups(address_space& space)
365365{
366   if (space->device().safe_pc()==0x000bc8) // ppcar
367      space->device().execute().spin_until_time(attotime::from_usec(20));
368   else if (space->device().safe_pc()==0x000bbc) // ppcar
369      space->device().execute().spin_until_time(attotime::from_usec(20));
366   if (space.device().safe_pc()==0x000bc8) // ppcar
367      space.device().execute().spin_until_time(attotime::from_usec(20));
368   else if (space.device().safe_pc()==0x000bbc) // ppcar
369      space.device().execute().spin_until_time(attotime::from_usec(20));
370370}
371371
372372
r17963r17964
394394         return (m_PS7500_IO[IRQSTA] & m_PS7500_IO[IRQMSKA]) | 0x80;
395395
396396      case IOCR: //TODO: nINT1, OD[n] p.81
397         if (ssfindo_speedup) ssfindo_speedup(&space);
397         if (ssfindo_speedup) ssfindo_speedup(space);
398398
399399         if( m_iocr_hack)
400400         {
trunk/src/mame/drivers/segas24.c
r17963r17964
10311031
10321032READ16_MEMBER ( segas24_state::sys16_io_r )
10331033{
1034   //  logerror("IO read %02x (%s:%x)\n", offset, space->device().tag(), space->device().safe_pc());
1034   //  logerror("IO read %02x (%s:%x)\n", offset, space.device().tag(), space.device().safe_pc());
10351035   if(offset < 8)
10361036      return (this->*io_r)(offset);
10371037   else if (offset < 0x20) {
trunk/src/mame/drivers/konamigx.c
r17963r17964
179179   UINT32 adr;
180180} sprites[0x100];
181181
182static void generate_sprites(address_space *space, UINT32 src, UINT32 spr, int count)
182static void generate_sprites(address_space &space, UINT32 src, UINT32 spr, int count)
183183{
184184   int i;
185185   int scount;
r17963r17964
190190   for(i=0; i<count; i++) {
191191      UINT32 adr = src + 0x100*i;
192192      int pri;
193      if(!space->read_word(adr+2))
193      if(!space.read_word(adr+2))
194194         continue;
195      pri = space->read_word(adr+28);
195      pri = space.read_word(adr+28);
196196
197197      if(pri < 256) {
198198         sprites[ecount].pri = pri;
r17963r17964
205205   for(i=0; i<ecount; i++) {
206206      UINT32 adr = sprites[i].adr;
207207      if(adr) {
208         UINT32 set =(space->read_word(adr) << 16)|space->read_word(adr+2);
209         UINT16 glob_x = space->read_word(adr+4);
210         UINT16 glob_y = space->read_word(adr+8);
211         UINT16 flip_x = space->read_word(adr+12) ? 0x1000 : 0x0000;
212         UINT16 flip_y = space->read_word(adr+14) ? 0x2000 : 0x0000;
208         UINT32 set =(space.read_word(adr) << 16)|space.read_word(adr+2);
209         UINT16 glob_x = space.read_word(adr+4);
210         UINT16 glob_y = space.read_word(adr+8);
211         UINT16 flip_x = space.read_word(adr+12) ? 0x1000 : 0x0000;
212         UINT16 flip_y = space.read_word(adr+14) ? 0x2000 : 0x0000;
213213         UINT16 glob_f = flip_x | (flip_y ^ 0x2000);
214         UINT16 zoom_x = space->read_word(adr+20);
215         UINT16 zoom_y = space->read_word(adr+22);
214         UINT16 zoom_x = space.read_word(adr+20);
215         UINT16 zoom_y = space.read_word(adr+22);
216216         UINT16 color_val    = 0x0000;
217217         UINT16 color_mask   = 0xffff;
218218         UINT16 color_set    = 0x0000;
219219         UINT16 color_rotate = 0x0000;
220220         UINT16 v;
221221
222         v = space->read_word(adr+24);
222         v = space.read_word(adr+24);
223223         if(v & 0x8000) {
224224            color_mask = 0xf3ff;
225225            color_val |= (v & 3) << 10;
226226         }
227227
228         v = space->read_word(adr+26);
228         v = space.read_word(adr+26);
229229         if(v & 0x8000) {
230230            color_mask &= 0xfcff;
231231            color_val  |= (v & 3) << 8;
232232         }
233233
234         v = space->read_word(adr+18);
234         v = space.read_word(adr+18);
235235         if(v & 0x8000) {
236236            color_mask &= 0xff1f;
237237            color_val  |= v & 0xe0;
238238         }
239239
240         v = space->read_word(adr+16);
240         v = space.read_word(adr+16);
241241         if(v & 0x8000)
242242            color_set = v & 0x1f;
243243         if(v & 0x4000)
r17963r17964
250250
251251         if(set >= 0x200000 && set < 0xd00000)
252252         {
253            UINT16 count2 = space->read_word(set);
253            UINT16 count2 = space.read_word(set);
254254            set += 2;
255255            while(count2) {
256               UINT16 idx  = space->read_word(set);
257               UINT16 flip = space->read_word(set+2);
258               UINT16 col  = space->read_word(set+4);
259               short y = space->read_word(set+6);
260               short x = space->read_word(set+8);
256               UINT16 idx  = space.read_word(set);
257               UINT16 flip = space.read_word(set+2);
258               UINT16 col  = space.read_word(set+4);
259               short y = space.read_word(set+6);
260               short x = space.read_word(set+8);
261261
262262               if(idx == 0xffff) {
263263                  set = (flip<<16) | col;
r17963r17964
292292               if(color_rotate)
293293                  col = (col & 0xffe0) | ((col + color_rotate) & 0x1f);
294294
295               space->write_word(spr   , (flip ^ glob_f) | sprites[i].pri);
296               space->write_word(spr+ 2, idx);
297               space->write_word(spr+ 4, y);
298               space->write_word(spr+ 6, x);
299               space->write_word(spr+ 8, zoom_y);
300               space->write_word(spr+10, zoom_x);
301               space->write_word(spr+12, col);
295               space.write_word(spr   , (flip ^ glob_f) | sprites[i].pri);
296               space.write_word(spr+ 2, idx);
297               space.write_word(spr+ 4, y);
298               space.write_word(spr+ 6, x);
299               space.write_word(spr+ 8, zoom_y);
300               space.write_word(spr+10, zoom_x);
301               space.write_word(spr+12, col);
302302               spr += 16;
303303               scount++;
304304               if(scount == 256)
r17963r17964
311311      }
312312   }
313313   while(scount < 256) {
314      space->write_word(spr, scount);
314      space.write_word(spr, scount);
315315      scount++;
316316      spr += 16;
317317   }
318318}
319319
320static void tkmmpzdm_esc(address_space *space, UINT32 p1, UINT32 p2, UINT32 p3, UINT32 p4)
320static void tkmmpzdm_esc(address_space &space, UINT32 p1, UINT32 p2, UINT32 p3, UINT32 p4)
321321{
322   konamigx_esc_alert(space->machine().driver_data<konamigx_state>()->m_workram, 0x0142, 0x100, 0);
322   konamigx_esc_alert(space.machine().driver_data<konamigx_state>()->m_workram, 0x0142, 0x100, 0);
323323}
324324
325static void dragoonj_esc(address_space *space, UINT32 p1, UINT32 p2, UINT32 p3, UINT32 p4)
325static void dragoonj_esc(address_space &space, UINT32 p1, UINT32 p2, UINT32 p3, UINT32 p4)
326326{
327   konamigx_esc_alert(space->machine().driver_data<konamigx_state>()->m_workram, 0x5c00, 0x100, 0);
327   konamigx_esc_alert(space.machine().driver_data<konamigx_state>()->m_workram, 0x5c00, 0x100, 0);
328328}
329329
330static void sal2_esc(address_space *space, UINT32 p1, UINT32 p2, UINT32 p3, UINT32 p4)
330static void sal2_esc(address_space &space, UINT32 p1, UINT32 p2, UINT32 p3, UINT32 p4)
331331{
332   konamigx_esc_alert(space->machine().driver_data<konamigx_state>()->m_workram, 0x1c8c, 0x172, 1);
332   konamigx_esc_alert(space.machine().driver_data<konamigx_state>()->m_workram, 0x1c8c, 0x172, 1);
333333}
334334
335static void sexyparo_esc(address_space *space, UINT32 p1, UINT32 p2, UINT32 p3, UINT32 p4)
335static void sexyparo_esc(address_space &space, UINT32 p1, UINT32 p2, UINT32 p3, UINT32 p4)
336336{
337337   // The d20000 should probably be p3
338338   generate_sprites(space, 0xc00604, 0xd20000, 0xfc);
339339}
340340
341static void tbyahhoo_esc(address_space *space, UINT32 p1, UINT32 p2, UINT32 p3, UINT32 p4)
341static void tbyahhoo_esc(address_space &space, UINT32 p1, UINT32 p2, UINT32 p3, UINT32 p4)
342342{
343343   generate_sprites(space, 0xc00000, 0xd20000, 0x100);
344344}
345345
346static void daiskiss_esc(address_space *space, UINT32 p1, UINT32 p2, UINT32 p3, UINT32 p4)
346static void daiskiss_esc(address_space &space, UINT32 p1, UINT32 p2, UINT32 p3, UINT32 p4)
347347{
348348   generate_sprites(space, 0xc00000, 0xd20000, 0x100);
349349}
350350
351351static UINT8 esc_program[4096];
352static void (*esc_cb)(address_space *space, UINT32 p1, UINT32 p2, UINT32 p3, UINT32 p4);
352static void (*esc_cb)(address_space &space, UINT32 p1, UINT32 p2, UINT32 p3, UINT32 p4);
353353
354354WRITE32_MEMBER(konamigx_state::esc_w)
355355{
r17963r17964
404404            UINT32 p2 = (space.read_word(params+4)<<16) | space.read_word(params+6);
405405            UINT32 p3 = (space.read_word(params+8)<<16) | space.read_word(params+10);
406406            UINT32 p4 = (space.read_word(params+12)<<16) | space.read_word(params+14);
407            esc_cb(&space, p1, p2, p3, p4);
407            esc_cb(space, p1, p2, p3, p4);
408408         }
409409         break;
410410      default:
r17963r17964
531531  waitskip.data = DATA;      \
532532  waitskip.mask = MASK;      \
533533  resume_trigger= 1000;      \
534  space->install_legacy_read_handler \
534  space.install_legacy_read_handler \
535535  ((BASE+START)&~3, (BASE+END)|3, FUNC(waitskip_r));}
536536
537537static int suspension_active, resume_trigger;
r17963r17964
909909
910910READ32_MEMBER(konamigx_state::gx5bppspr_r)
911911{
912   return (K055673_rom_word_r(&space, offset*2+1, 0xffff) | K055673_rom_word_r(&space, offset*2, 0xffff)<<16);
912   return (K055673_rom_word_r(space, offset*2+1, 0xffff) | K055673_rom_word_r(space, offset*2, 0xffff)<<16);
913913}
914914
915915READ32_MEMBER(konamigx_state::gx6bppspr_r)
916916{
917   return (K055673_GX6bpp_rom_word_r(&space, offset*2+1, 0xffff) | K055673_GX6bpp_rom_word_r(&space, offset*2, 0xffff)<<16);
917   return (K055673_GX6bpp_rom_word_r(space, offset*2+1, 0xffff) | K055673_GX6bpp_rom_word_r(space, offset*2, 0xffff)<<16);
918918}
919919
920920READ32_MEMBER(konamigx_state::type1_roz_r1)
trunk/src/mame/drivers/combatsc.c
r17963r17964
707707
708708void combatsc_state::machine_reset()
709709{
710   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
710   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
711711   int i;
712712
713713   memset(m_io_ram,  0x00, 0x4000);
r17963r17964
726726      m_sign[i] = 0;
727727   }
728728
729   combatsc_bankselect_w(*space, 0, 0);
729   combatsc_bankselect_w(space, 0, 0);
730730}
731731
732732/* combat school (original) */
trunk/src/mame/drivers/quizpun2.c
r17963r17964
200200   prot.addr = 0;
201201}
202202
203static void log_protection( address_space *space, const char *warning )
203static void log_protection( address_space &space, const char *warning )
204204{
205   quizpun2_state *state = space->machine().driver_data<quizpun2_state>();
205   quizpun2_state *state = space.machine().driver_data<quizpun2_state>();
206206   struct prot_t &prot = state->m_prot;
207   logerror("%04x: protection - %s (state %x, wait %x, param %02x, cmd %02x, addr %02x)\n", space->device().safe_pc(), warning,
207   logerror("%04x: protection - %s (state %x, wait %x, param %02x, cmd %02x, addr %02x)\n", space.device().safe_pc(), warning,
208208      prot.state,
209209      prot.wait_param,
210210      prot.param,
r17963r17964
242242               break;
243243
244244            default:
245               log_protection(&space, "unknown address");
245               log_protection(space, "unknown address");
246246               ret = 0x2e59 >> ((prot.addr & 1) ? 0 : 8);   // return the address of: XOR A, RET
247247         }
248248         break;
r17963r17964
255255      }
256256
257257      default:
258         log_protection(&space, "unknown read");
258         log_protection(space, "unknown read");
259259         ret = 0x00;
260260   }
261261
262262#if VERBOSE_PROTECTION_LOG
263   log_protection(&space, "info READ");
263   log_protection(space, "info READ");
264264#endif
265265
266266   prot.addr++;
r17963r17964
305305                  prot.addr = 0;
306306               }
307307               else
308                  log_protection(&space, "unknown command");
308                  log_protection(space, "unknown command");
309309            }
310310            else if (prot.cmd >= 0x00 && prot.cmd <= 0x0f )
311311            {
r17963r17964
320320            else
321321            {
322322               prot.state = STATE_IDLE;
323               log_protection(&space, "unknown command");
323               log_protection(space, "unknown command");
324324            }
325325         }
326326         else
r17963r17964
332332   }
333333
334334#if VERBOSE_PROTECTION_LOG
335   log_protection(&space, "info WRITE");
335   log_protection(space, "info WRITE");
336336#endif
337337}
338338
trunk/src/mame/drivers/segac2.c
r17963r17964
201201/* handle reads from the paletteram */
202202static READ16_HANDLER( palette_r )
203203{
204   segac2_state *state = space->machine().driver_data<segac2_state>();
204   segac2_state *state = space.machine().driver_data<segac2_state>();
205205   offset &= 0x1ff;
206206   if (state->m_segac2_alt_palette_mode)
207207      offset = ((offset << 1) & 0x100) | ((offset << 2) & 0x80) | ((~offset >> 2) & 0x40) | ((offset >> 1) & 0x20) | (offset & 0x1f);
r17963r17964
212212/* handle writes to the paletteram */
213213static WRITE16_HANDLER( palette_w )
214214{
215   segac2_state *state = space->machine().driver_data<segac2_state>();
215   segac2_state *state = space.machine().driver_data<segac2_state>();
216216   int r, g, b, newword;
217217   int tmpr, tmpg, tmpb;
218218
r17963r17964
232232   b = ((newword >> 7) & 0x1e) | ((newword >> 14) & 0x01);
233233
234234   /* set the color */
235   palette_set_color_rgb(space->machine(), offset, pal5bit(r), pal5bit(g), pal5bit(b));
235   palette_set_color_rgb(space.machine(), offset, pal5bit(r), pal5bit(g), pal5bit(b));
236236
237237//  megadrive_vdp_palette_lookup[offset] = (b) | (g << 5) | (r << 10);
238238//  megadrive_vdp_palette_lookup_sprite[offset] = (b) | (g << 5) | (r << 10);
r17963r17964
240240   tmpr = r >> 1;
241241   tmpg = g >> 1;
242242   tmpb = b >> 1;
243   palette_set_color_rgb(space->machine(), offset + 0x800, pal5bit(tmpr), pal5bit(tmpg), pal5bit(tmpb));
243   palette_set_color_rgb(space.machine(), offset + 0x800, pal5bit(tmpr), pal5bit(tmpg), pal5bit(tmpb));
244244
245245   // how is it calculated on c2?
246246   tmpr = tmpr | 0x10;
247247   tmpg = tmpg | 0x10;
248248   tmpb = tmpb | 0x10;
249   palette_set_color_rgb(space->machine(), offset + 0x1000, pal5bit(tmpr), pal5bit(tmpg), pal5bit(tmpb));
249   palette_set_color_rgb(space.machine(), offset + 0x1000, pal5bit(tmpr), pal5bit(tmpg), pal5bit(tmpb));
250250}
251251
252252
r17963r17964
319319
320320static READ16_HANDLER( io_chip_r )
321321{
322   segac2_state *state = space->machine().driver_data<segac2_state>();
322   segac2_state *state = space.machine().driver_data<segac2_state>();
323323   static const char *const portnames[] = { "P1", "P2", "PORTC", "PORTD", "SERVICE", "COINAGE", "DSW", "PORTH" };
324324   offset &= 0x1f/2;
325325
r17963r17964
340340
341341         /* otherwise, return an input port */
342342         if (offset == 0x04/2 && state->m_sound_banks)
343            return (space->machine().root_device().ioport(portnames[offset])->read() & 0xbf) | (upd7759_busy_r(space->machine().device("upd")) << 6);
344         return space->machine().root_device().ioport(portnames[offset])->read();
343            return (space.machine().root_device().ioport(portnames[offset])->read() & 0xbf) | (upd7759_busy_r(space.machine().device("upd")) << 6);
344         return space.machine().root_device().ioport(portnames[offset])->read();
345345
346346      /* 'SEGA' protection */
347347      case 0x10/2:
r17963r17964
369369
370370static WRITE16_HANDLER( io_chip_w )
371371{
372   segac2_state *state = space->machine().driver_data<segac2_state>();
372   segac2_state *state = space.machine().driver_data<segac2_state>();
373373   UINT8 newbank;
374374//  UINT8 old;
375375
r17963r17964
401401             D1 : To CN1 pin J. (Coin meter 2)
402402             D0 : To CN1 pin 8. (Coin meter 1)
403403            */
404/*          coin_lockout_w(space->machine(), 1, data & 0x08);
405            coin_lockout_w(space->machine(), 0, data & 0x04); */
406         coin_counter_w(space->machine(), 1, data & 0x02);
407         coin_counter_w(space->machine(), 0, data & 0x01);
404/*          coin_lockout_w(space.machine(), 1, data & 0x08);
405            coin_lockout_w(space.machine(), 0, data & 0x04); */
406         coin_counter_w(space.machine(), 1, data & 0x02);
407         coin_counter_w(space.machine(), 0, data & 0x01);
408408         break;
409409
410410      /* banking */
r17963r17964
422422         newbank = data & 3;
423423         if (newbank != state->m_palbank)
424424         {
425            //space->machine().primary_screen->update_partial(space->machine().primary_screen->vpos() + 1);
425            //space.machine().primary_screen->update_partial(space.machine().primary_screen->vpos() + 1);
426426            state->m_palbank = newbank;
427            recompute_palette_tables(space->machine());
427            recompute_palette_tables(space.machine());
428428         }
429429         if (state->m_sound_banks > 1)
430430         {
431            device_t *upd = space->machine().device("upd");
431            device_t *upd = space.machine().device("upd");
432432            newbank = (data >> 2) & (state->m_sound_banks - 1);
433433            upd7759_set_bank_base(upd, newbank * 0x20000);
434434         }
r17963r17964
438438      case 0x1c/2:
439439         if (state->m_sound_banks > 1)
440440         {
441            device_t *upd = space->machine().device("upd");
441            device_t *upd = space.machine().device("upd");
442442            upd7759_reset_w(upd, (data >> 1) & 1);
443443         }
444444         break;
r17963r17964
458458
459459static WRITE16_HANDLER( control_w )
460460{
461   segac2_state *state = space->machine().driver_data<segac2_state>();
461   segac2_state *state = space.machine().driver_data<segac2_state>();
462462   /* skip if not LSB */
463463   if (!ACCESSING_BITS_0_7)
464464      return;
465465   data &= 0x0f;
466466
467467   /* bit 0 controls display enable */
468   //segac2_enable_display(space->machine(), ~data & 1);
468   //segac2_enable_display(space.machine(), ~data & 1);
469469   state->m_segac2_enable_display = ~data & 1;
470470
471471   /* bit 1 resets the protection */
r17963r17964
474474
475475   /* bit 2 controls palette shuffling; only ribbit and twinsqua use this feature */
476476   state->m_segac2_alt_palette_mode = ((~data & 4) >> 2);
477   recompute_palette_tables(space->machine());
477   recompute_palette_tables(space.machine());
478478}
479479
480480
r17963r17964
494494/* protection chip reads */
495495static READ16_HANDLER( prot_r )
496496{
497   segac2_state *state = space->machine().driver_data<segac2_state>();
498   if (LOG_PROTECTION) logerror("%06X:protection r=%02X\n", space->device().safe_pcbase(), state->m_prot_func ? state->m_prot_read_buf : 0xff);
497   segac2_state *state = space.machine().driver_data<segac2_state>();
498   if (LOG_PROTECTION) logerror("%06X:protection r=%02X\n", space.device().safe_pcbase(), state->m_prot_func ? state->m_prot_read_buf : 0xff);
499499   return state->m_prot_read_buf | 0xf0;
500500}
501501
r17963r17964
503503/* protection chip writes */
504504static WRITE16_HANDLER( prot_w )
505505{
506   segac2_state *state = space->machine().driver_data<segac2_state>();
506   segac2_state *state = space.machine().driver_data<segac2_state>();
507507   int new_sp_palbase = (data >> 2) & 3;
508508   int new_bg_palbase = data & 3;
509509   int table_index;
r17963r17964
521521   /* determine the value to return, should a read occur */
522522   if (state->m_prot_func)
523523      state->m_prot_read_buf = state->m_prot_func(table_index);
524   if (LOG_PROTECTION) logerror("%06X:protection w=%02X, new result=%02X\n", space->device().safe_pcbase(), data & 0x0f, state->m_prot_read_buf);
524   if (LOG_PROTECTION) logerror("%06X:protection w=%02X, new result=%02X\n", space.device().safe_pcbase(), data & 0x0f, state->m_prot_read_buf);
525525
526526   /* if the palette changed, force an update */
527527   if (new_sp_palbase != state->m_sp_palbase || new_bg_palbase != state->m_bg_palbase)
528528   {
529      //space->machine().primary_screen->update_partial(space->machine().primary_screen->vpos() + 1);
529      //space.machine().primary_screen->update_partial(space.machine().primary_screen->vpos() + 1);
530530      state->m_sp_palbase = new_sp_palbase;
531531      state->m_bg_palbase = new_bg_palbase;
532      recompute_palette_tables(space->machine());
533      if (LOG_PALETTE) logerror("Set palbank: %d/%d (scan=%d)\n", state->m_bg_palbase, state->m_sp_palbase, space->machine().primary_screen->vpos());
532      recompute_palette_tables(space.machine());
533      if (LOG_PALETTE) logerror("Set palbank: %d/%d (scan=%d)\n", state->m_bg_palbase, state->m_sp_palbase, space.machine().primary_screen->vpos());
534534   }
535535}
536536
r17963r17964
565565            break;
566566
567567         case 0x10:   /* coin counter */
568//              coin_counter_w(space->machine(), 0,1);
569//              coin_counter_w(space->machine(), 0,0);
568//              coin_counter_w(space.machine(), 0,1);
569//              coin_counter_w(space.machine(), 0,0);
570570            break;
571571
572572         case 0x12:   /* set coinage info -- followed by two 4-bit values */
r17963r17964
596596
597597static READ16_HANDLER( printer_r )
598598{
599   segac2_state *state = space->machine().driver_data<segac2_state>();
599   segac2_state *state = space.machine().driver_data<segac2_state>();
600600   return state->m_cam_data;
601601}
602602
603603static WRITE16_HANDLER( print_club_camera_w )
604604{
605   segac2_state *state = space->machine().driver_data<segac2_state>();
605   segac2_state *state = space.machine().driver_data<segac2_state>();
606606   state->m_cam_data = data;
607607}
608608
trunk/src/mame/drivers/homedata.c
r17963r17964
12121212
12131213MACHINE_RESET_MEMBER(homedata_state,pteacher)
12141214{
1215   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
1215   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
12161216
12171217   /* on reset, ports are set as input (high impedance), therefore 0xff output */
1218   pteacher_upd7807_portc_w(*space, 0, 0xff);
1218   pteacher_upd7807_portc_w(space, 0, 0xff);
12191219
12201220   MACHINE_RESET_CALL_MEMBER(homedata);
12211221
r17963r17964
12281228
12291229MACHINE_RESET_MEMBER(homedata_state,reikaids)
12301230{
1231   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
1231   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
12321232
12331233   /* on reset, ports are set as input (high impedance), therefore 0xff output */
1234   reikaids_upd7807_portc_w(*space, 0, 0xff);
1234   reikaids_upd7807_portc_w(space, 0, 0xff);
12351235
12361236   MACHINE_RESET_CALL_MEMBER(homedata);
12371237
trunk/src/mame/drivers/exidy.c
r17963r17964
14931493
14941494DRIVER_INIT_MEMBER(exidy_state,fax)
14951495{
1496   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
1496   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
14971497
14981498   exidy_video_config(machine(), 0x04, 0x04, TRUE);
14991499
15001500   /* reset the ROM bank */
1501   fax_bank_select_w(*space,0,0);
1501   fax_bank_select_w(space,0,0);
15021502}
15031503
15041504
trunk/src/mame/drivers/pcktgal.c
r17963r17964
411411DRIVER_INIT_MEMBER(pcktgal_state,deco222)
412412{
413413   int A;
414   address_space *space = machine().device("audiocpu")->memory().space(AS_PROGRAM);
414   address_space &space = *machine().device("audiocpu")->memory().space(AS_PROGRAM);
415415   UINT8 *decrypted = auto_alloc_array(machine(), UINT8, 0x10000);
416416   UINT8 *rom = machine().root_device().memregion("audiocpu")->base();
417417
418   space->set_decrypted_region(0x8000, 0xffff, decrypted);
418   space.set_decrypted_region(0x8000, 0xffff, decrypted);
419419
420420   /* bits 5 and 6 of the opcodes are swapped */
421421   for (A = 0x8000;A < 0x18000;A++)
trunk/src/mame/drivers/hng64.c
r17963r17964
563563}
564564
565565/* preliminary dma code, dma is used to copy program code -> ram */
566static void hng64_do_dma(address_space *space)
566static void hng64_do_dma(address_space &space)
567567{
568   hng64_state *state = space->machine().driver_data<hng64_state>();
568   hng64_state *state = space.machine().driver_data<hng64_state>();
569569
570570   //printf("Performing DMA Start %08x Len %08x Dst %08x\n", state->m_dma_start, state->m_dma_len, state->m_dma_dst);
571571
r17963r17964
573573   {
574574      UINT32 dat;
575575
576      dat = space->read_dword(state->m_dma_start);
577      space->write_dword(state->m_dma_dst, dat);
576      dat = space.read_dword(state->m_dma_start);
577      space.write_dword(state->m_dma_dst, dat);
578578      state->m_dma_start += 4;
579579      state->m_dma_dst += 4;
580580      state->m_dma_len--;
r17963r17964
621621      case 0x1214: m_dma_dst = m_sysregs[offset]; break;
622622      case 0x1224:
623623         m_dma_len = m_sysregs[offset];
624         hng64_do_dma(&space);
624         hng64_do_dma(space);
625625         break;
626626      //default:
627627      //  printf("HNG64 writing to SYSTEM Registers 0x%08x == 0x%08x. (PC=%08x)\n", offset*4, m_sysregs[offset], space.device().safe_pc());
r17963r17964
18061806
18071807   KL5C80_virtual_mem_sync(this);
18081808
1809   address_space *space = machine().device<z80_device>("comm")->space(AS_PROGRAM);
1810   space->set_direct_update_handler(direct_update_delegate(FUNC(hng64_state::KL5C80_direct_handler), this));
1809   address_space &space = *machine().device<z80_device>("comm")->space(AS_PROGRAM);
1810   space.set_direct_update_handler(direct_update_delegate(FUNC(hng64_state::KL5C80_direct_handler), this));
18111811
18121812   machine().device("comm")->execute().set_input_line(INPUT_LINE_RESET, PULSE_LINE);     // reset the CPU and let 'er rip
18131813//  machine().device("comm")->execute().set_input_line(INPUT_LINE_HALT, ASSERT_LINE);     // hold on there pardner...
trunk/src/mame/drivers/macrossp.c
r17963r17964
579579
580580static void irqhandler(device_t *device, int irq)
581581{
582   // macrossp_state *state = space->machine().driver_data<macrossp_state>();
582   // macrossp_state *state = space.machine().driver_data<macrossp_state>();
583583   logerror("ES5506 irq %d\n", irq);
584584
585585   /* IRQ lines 1 & 4 on the sound 68000 are definitely triggered by the ES5506,
trunk/src/mame/drivers/gladiatr.c
r17963r17964
202202
203203static READ8_HANDLER( gladiator_dsw1_r )
204204{
205   int orig = space->machine().root_device().ioport("DSW1")->read()^0xff;
205   int orig = space.machine().root_device().ioport("DSW1")->read()^0xff;
206206
207207   return BITSWAP8(orig, 0,1,2,3,4,5,6,7);
208208}
209209
210210static READ8_HANDLER( gladiator_dsw2_r )
211211{
212   int orig = space->machine().root_device().ioport("DSW2")->read()^0xff;
212   int orig = space.machine().root_device().ioport("DSW2")->read()^0xff;
213213
214214   return BITSWAP8(orig, 2,3,4,5,6,7,1,0);
215215}
r17963r17964
218218{
219219   int coins = 0;
220220
221   if( space->machine().root_device().ioport("COINS")->read() & 0xc0 ) coins = 0x80;
221   if( space.machine().root_device().ioport("COINS")->read() & 0xc0 ) coins = 0x80;
222222   switch(offset)
223223   {
224224   case 0x01: /* start button , coins */
225      return space->machine().root_device().ioport("IN0")->read() | coins;
225      return space.machine().root_device().ioport("IN0")->read() | coins;
226226   case 0x02: /* Player 1 Controller , coins */
227      return space->machine().root_device().ioport("IN1")->read() | coins;
227      return space.machine().root_device().ioport("IN1")->read() | coins;
228228   case 0x04: /* Player 2 Controller , coins */
229      return space->machine().root_device().ioport("IN2")->read() | coins;
229      return space.machine().root_device().ioport("IN2")->read() | coins;
230230   }
231231   /* unknown */
232232   return 0;
r17963r17964
237237   switch(offset)
238238   {
239239   case 0x01: /* button 3 */
240      return space->machine().root_device().ioport("IN3")->read();
240      return space.machine().root_device().ioport("IN3")->read();
241241   }
242242   /* unknown */
243243   return 0;
trunk/src/mame/drivers/cabal.c
r17963r17964
102102
103103WRITE16_MEMBER(cabal_state::cabal_sound_irq_trigger_word_w)
104104{
105   seibu_main_word_w(&space,4,data,mem_mask);
105   seibu_main_word_w(space,4,data,mem_mask);
106106
107107   /* spin for a while to let the Z80 read the command, otherwise coins "stick" */
108108   space.device().execute().spin_until_time(attotime::from_usec(50));
r17963r17964
848848
849849static void seibu_sound_bootleg(running_machine &machine,const char *cpu,int length)
850850{
851   address_space *space = machine.device(cpu)->memory().space(AS_PROGRAM);
851   address_space &space = *machine.device(cpu)->memory().space(AS_PROGRAM);
852852   UINT8 *decrypt = auto_alloc_array(machine, UINT8, length);
853853   UINT8 *rom = machine.root_device().memregion(cpu)->base();
854854
855   space->set_decrypted_region(0x0000, (length < 0x10000) ? (length - 1) : 0x1fff, decrypt);
855   space.set_decrypted_region(0x0000, (length < 0x10000) ? (length - 1) : 0x1fff, decrypt);
856856
857857   memcpy(decrypt, rom+length, length);
858858
trunk/src/mame/drivers/vendetta.c
r17963r17964
164164static void vendetta_video_banking( running_machine &machine, int select )
165165{
166166   vendetta_state *state = machine.driver_data<vendetta_state>();
167   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
167   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
168168
169169   if (select & 1)
170170   {
171      space->install_read_bank(state->m_video_banking_base + 0x2000, state->m_video_banking_base + 0x2fff, "bank4" );
172      space->install_write_handler(state->m_video_banking_base + 0x2000, state->m_video_banking_base + 0x2fff, write8_delegate(FUNC(vendetta_state::paletteram_xBBBBBGGGGGRRRRR_byte_be_w), state) );
173      space->install_legacy_readwrite_handler(*state->m_k053246, state->m_video_banking_base + 0x0000, state->m_video_banking_base + 0x0fff, FUNC(k053247_r), FUNC(k053247_w) );
171      space.install_read_bank(state->m_video_banking_base + 0x2000, state->m_video_banking_base + 0x2fff, "bank4" );
172      space.install_write_handler(state->m_video_banking_base + 0x2000, state->m_video_banking_base + 0x2fff, write8_delegate(FUNC(vendetta_state::paletteram_xBBBBBGGGGGRRRRR_byte_be_w), state) );
173      space.install_legacy_readwrite_handler(*state->m_k053246, state->m_video_banking_base + 0x0000, state->m_video_banking_base + 0x0fff, FUNC(k053247_r), FUNC(k053247_w) );
174174      state->membank("bank4")->set_base(state->m_generic_paletteram_8);
175175   }
176176   else
177177   {
178      space->install_readwrite_handler(state->m_video_banking_base + 0x2000, state->m_video_banking_base + 0x2fff, read8_delegate(FUNC(vendetta_state::vendetta_K052109_r),state), write8_delegate(FUNC(vendetta_state::vendetta_K052109_w),state) );
179      space->install_legacy_readwrite_handler(*state->m_k052109, state->m_video_banking_base + 0x0000, state->m_video_banking_base + 0x0fff, FUNC(k052109_r), FUNC(k052109_w) );
178      space.install_readwrite_handler(state->m_video_banking_base + 0x2000, state->m_video_banking_base + 0x2fff, read8_delegate(FUNC(vendetta_state::vendetta_K052109_r),state), write8_delegate(FUNC(vendetta_state::vendetta_K052109_w),state) );
179      space.install_legacy_readwrite_handler(*state->m_k052109, state->m_video_banking_base + 0x0000, state->m_video_banking_base + 0x0fff, FUNC(k052109_r), FUNC(k052109_w) );
180180   }
181181}
182182
trunk/src/mame/drivers/segas16b.c
r17963r17964
13691369   m_maincpu->set_input_line(4, HOLD_LINE);
13701370
13711371   // set tile banks
1372   address_space *space = m_maincpu->space(AS_PROGRAM);
1373   rom_5704_bank_w(*space, 1, m_workram[0x3094/2] & 0x00ff, 0x00ff);
1372   address_space &space = *m_maincpu->space(AS_PROGRAM);
1373   rom_5704_bank_w(space, 1, m_workram[0x3094/2] & 0x00ff, 0x00ff);
13741374
13751375   // process any new sound data
13761376   UINT16 temp = m_workram[soundoffs];
13771377   if ((temp & 0xff00) != 0x0000)
13781378   {
1379      m_mapper->write(*space, 0x03, temp >> 8);
1379      m_mapper->write(space, 0x03, temp >> 8);
13801380      m_workram[soundoffs] = temp & 0x00ff;
13811381   }
13821382
r17963r17964
14141414   UINT16 temp = m_workram[0x0bd0/2];
14151415   if ((temp & 0xff00) != 0x0000)
14161416   {
1417      address_space *space = m_maincpu->space(AS_PROGRAM);
1418      m_mapper->write(*space, 0x03, temp >> 8);
1417      address_space &space = *m_maincpu->space(AS_PROGRAM);
1418      m_mapper->write(space, 0x03, temp >> 8);
14191419      m_workram[0x0bd0/2] = temp & 0x00ff;
14201420   }
14211421}
r17963r17964
14441444   UINT16 temp = m_workram[0x2cfc/2];
14451445   if ((temp & 0xff00) != 0x0000)
14461446   {
1447      address_space *space = m_maincpu->space(AS_PROGRAM);
1448      m_mapper->write(*space, 0x03, temp >> 8);
1447      address_space &space = *m_maincpu->space(AS_PROGRAM);
1448      m_mapper->write(space, 0x03, temp >> 8);
14491449      m_workram[0x2cfc/2] = temp & 0x00ff;
14501450   }
14511451
r17963r17964
14711471   temp = m_workram[0x01d0/2];
14721472   if ((temp & 0xff00) != 0x0000)
14731473   {
1474      address_space *space = m_maincpu->space(AS_PROGRAM);
1475      m_mapper->write(*space, 0x03, temp);
1474      address_space &space = *m_maincpu->space(AS_PROGRAM);
1475      m_mapper->write(space, 0x03, temp);
14761476      m_workram[0x01d0/2] = temp & 0x00ff;
14771477   }
14781478
r17963r17964
14971497   UINT16 temp = m_workram[0x0008/2];
14981498   if ((temp & 0x00ff) != 0x0000)
14991499   {
1500      address_space *space = m_maincpu->space(AS_PROGRAM);
1501      m_mapper->write(*space, 0x03, temp >> 8);
1500      address_space &space = *m_maincpu->space(AS_PROGRAM);
1501      m_mapper->write(space, 0x03, temp >> 8);
15021502      m_workram[0x0008/2] = temp & 0xff00;
15031503   }
15041504}
r17963r17964
16201620               // bit 4 is GONG
16211621         //      if (data & 0x10) popmessage("GONG");
16221622               // are the following really lamps?
1623         //      set_led_status(space->machine(), 1,data & 0x20);
1624         //      set_led_status(space->machine(), 2,data & 0x40);
1625         //      set_led_status(space->machine(), 3,data & 0x80);
1623         //      set_led_status(space.machine(), 1,data & 0x20);
1624         //      set_led_status(space.machine(), 2,data & 0x40);
1625         //      set_led_status(space.machine(), 3,data & 0x80);
16261626               break;
16271627         }
16281628         break;
trunk/src/mame/drivers/saturn.c
r17963r17964
122122}
123123
124124static void scu_do_transfer(running_machine &machine,UINT8 event);
125static void scu_dma_direct(address_space *space, UINT8 dma_ch);   /*DMA level 0 direct transfer function*/
126static void scu_dma_indirect(address_space *space, UINT8 dma_ch); /*DMA level 0 indirect transfer function*/
125static void scu_dma_direct(address_space &space, UINT8 dma_ch);   /*DMA level 0 direct transfer function*/
126static void scu_dma_indirect(address_space &space, UINT8 dma_ch); /*DMA level 0 indirect transfer function*/
127127
128128/**************************************************************************************/
129129
r17963r17964
239239static void scu_do_transfer(running_machine &machine,UINT8 event)
240240{
241241   saturn_state *state = machine.driver_data<saturn_state>();
242   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
242   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
243243   int i;
244244
245245   for(i=0;i<3;i++)
r17963r17964
282282
283283static READ32_HANDLER( saturn_scu_r )
284284{
285   saturn_state *state = space->machine().driver_data<saturn_state>();
285   saturn_state *state = space.machine().driver_data<saturn_state>();
286286   UINT32 res;
287287
288288   /*TODO: write only registers must return 0 or open bus */
r17963r17964
290290   {
291291      case 0x5c/4:
292292      //  Super Major League and Shin Megami Tensei - Akuma Zensho reads from there (undocumented), DMA status mirror?
293         if(LOG_SCU) logerror("(PC=%08x) DMA status reg read\n",space->device().safe_pc());
293         if(LOG_SCU) logerror("(PC=%08x) DMA status reg read\n",space.device().safe_pc());
294294         res = state->m_scu_regs[0x7c/4];
295295         break;
296296      case 0x7c/4:
297         if(LOG_SCU) logerror("(PC=%08x) DMA status reg read\n",space->device().safe_pc());
297         if(LOG_SCU) logerror("(PC=%08x) DMA status reg read\n",space.device().safe_pc());
298298         res = state->m_scu_regs[offset];
299299         break;
300300      case 0x80/4:
r17963r17964
305305           res = dsp_ram_addr_r();
306306           break;
307307        case 0xa0/4:
308          if(LOG_SCU) logerror("(PC=%08x) IRQ mask reg read %08x MASK=%08x\n",space->device().safe_pc(),mem_mask,state->m_scu_regs[0xa0/4]);
308          if(LOG_SCU) logerror("(PC=%08x) IRQ mask reg read %08x MASK=%08x\n",space.device().safe_pc(),mem_mask,state->m_scu_regs[0xa0/4]);
309309          res = state->m_scu.ism;
310310          break;
311311       case 0xa4/4:
312          if(LOG_SCU) logerror("(PC=%08x) IRQ status reg read %08x MASK=%08x\n",space->device().safe_pc(),mem_mask,state->m_scu_regs[0xa0/4]);
312          if(LOG_SCU) logerror("(PC=%08x) IRQ status reg read %08x MASK=%08x\n",space.device().safe_pc(),mem_mask,state->m_scu_regs[0xa0/4]);
313313         res = state->m_scu.ist;
314314         break;
315315      case 0xc8/4:
316         logerror("(PC=%08x) SCU version reg read\n",space->device().safe_pc());
316         logerror("(PC=%08x) SCU version reg read\n",space.device().safe_pc());
317317         res = 0x00000004;/*SCU Version 4, OK? */
318318         break;
319319      default:
320          if(LOG_SCU) logerror("(PC=%08x) SCU reg read at %d = %08x\n",space->device().safe_pc(),offset,state->m_scu_regs[offset]);
320          if(LOG_SCU) logerror("(PC=%08x) SCU reg read at %d = %08x\n",space.device().safe_pc(),offset,state->m_scu_regs[offset]);
321321          res = state->m_scu_regs[offset];
322322         break;
323323   }
r17963r17964
329329
330330static WRITE32_HANDLER( saturn_scu_w )
331331{
332   saturn_state *state = space->machine().driver_data<saturn_state>();
332   saturn_state *state = space.machine().driver_data<saturn_state>();
333333
334334   COMBINE_DATA(&state->m_scu_regs[offset]);
335335
r17963r17964
390390      case 0x98/4: /*if(LOG_SCU) logerror("timer 1 mode data = %08x\n",state->m_scu_regs[38]);*/ break;
391391      case 0xa0/4: /* IRQ mask */
392392         state->m_scu.ism = state->m_scu_regs[0xa0/4];
393         scu_test_pending_irq(space->machine());
393         scu_test_pending_irq(space.machine());
394394         break;
395395      case 0xa4/4: /* IRQ control */
396         if(LOG_SCU) logerror("PC=%08x IRQ status reg set:%08x %08x\n",space->device().safe_pc(),state->m_scu_regs[41],mem_mask);
396         if(LOG_SCU) logerror("PC=%08x IRQ status reg set:%08x %08x\n",space.device().safe_pc(),state->m_scu_regs[41],mem_mask);
397397         state->m_scu.ist &= state->m_scu_regs[offset];
398398         break;
399399      case 0xa8/4: if(LOG_SCU) logerror("A-Bus IRQ ACK %08x\n",state->m_scu_regs[42]); break;
r17963r17964
441441   DnMV_0(2);
442442}
443443
444static void scu_single_transfer(address_space *space, UINT32 src, UINT32 dst,UINT8 *src_shift)
444static void scu_single_transfer(address_space &space, UINT32 src, UINT32 dst,UINT8 *src_shift)
445445{
446446   UINT32 src_data;
447447
448448   if(src & 1)
449449   {
450450      /* Road Blaster does a work ram h to color ram with offsetted source address, do some data rotation */
451      src_data = ((space->read_dword(src & 0x07fffffc) & 0x00ffffff)<<8);
452      src_data |= ((space->read_dword((src & 0x07fffffc)+4) & 0xff000000) >> 24);
451      src_data = ((space.read_dword(src & 0x07fffffc) & 0x00ffffff)<<8);
452      src_data |= ((space.read_dword((src & 0x07fffffc)+4) & 0xff000000) >> 24);
453453      src_data >>= (*src_shift)*16;
454454   }
455455   else
456      src_data = space->read_dword(src & 0x07fffffc) >> (*src_shift)*16;
456      src_data = space.read_dword(src & 0x07fffffc) >> (*src_shift)*16;
457457
458   space->write_word(dst,src_data);
458   space.write_word(dst,src_data);
459459
460460   *src_shift ^= 1;
461461}
462462
463static void scu_dma_direct(address_space *space, UINT8 dma_ch)
463static void scu_dma_direct(address_space &space, UINT8 dma_ch)
464464{
465   saturn_state *state = space->machine().driver_data<saturn_state>();
465   saturn_state *state = space.machine().driver_data<saturn_state>();
466466   UINT32 tmp_src,tmp_dst,tmp_size;
467467   UINT8 cd_transfer_flag;
468468
r17963r17964
501501
502502      for (i = 0; i < state->m_scu.size[dma_ch];i+=state->m_scu.dst_add[dma_ch])
503503      {
504         space->write_dword(state->m_scu.dst[dma_ch],space->read_dword(state->m_scu.src[dma_ch]));
504         space.write_dword(state->m_scu.dst[dma_ch],space.read_dword(state->m_scu.src[dma_ch]));
505505         if(state->m_scu.dst_add[dma_ch] == 8)
506            space->write_dword(state->m_scu.dst[dma_ch]+4,space->read_dword(state->m_scu.src[dma_ch]));
506            space.write_dword(state->m_scu.dst[dma_ch]+4,space.read_dword(state->m_scu.src[dma_ch]));
507507
508508         state->m_scu.src[dma_ch]+=state->m_scu.src_add[dma_ch];
509509         state->m_scu.dst[dma_ch]+=state->m_scu.dst_add[dma_ch];
r17963r17964
536536      /*TODO: this is completely wrong HW-wise ...  */
537537      switch(dma_ch)
538538      {
539         case 0: space->machine().scheduler().timer_set(attotime::from_usec(300), FUNC(dma_lv0_ended)); break;
540         case 1: space->machine().scheduler().timer_set(attotime::from_usec(300), FUNC(dma_lv1_ended)); break;
541         case 2: space->machine().scheduler().timer_set(attotime::from_usec(300), FUNC(dma_lv2_ended)); break;
539         case 0: space.machine().scheduler().timer_set(attotime::from_usec(300), FUNC(dma_lv0_ended)); break;
540         case 1: space.machine().scheduler().timer_set(attotime::from_usec(300), FUNC(dma_lv1_ended)); break;
541         case 2: space.machine().scheduler().timer_set(attotime::from_usec(300), FUNC(dma_lv2_ended)); break;
542542      }
543543   }
544544}
545545
546static void scu_dma_indirect(address_space *space,UINT8 dma_ch)
546static void scu_dma_indirect(address_space &space,UINT8 dma_ch)
547547{
548   saturn_state *state = space->machine().driver_data<saturn_state>();
548   saturn_state *state = space.machine().driver_data<saturn_state>();
549549
550550   /*Helper to get out of the cycle*/
551551   UINT8 job_done = 0;
r17963r17964
561561   do{
562562      tmp_src = state->m_scu.index[dma_ch];
563563
564      indirect_size = space->read_dword(state->m_scu.index[dma_ch]);
565      indirect_src  = space->read_dword(state->m_scu.index[dma_ch]+8);
566      indirect_dst  = space->read_dword(state->m_scu.index[dma_ch]+4);
564      indirect_size = space.read_dword(state->m_scu.index[dma_ch]);
565      indirect_src  = space.read_dword(state->m_scu.index[dma_ch]+8);
566      indirect_dst  = space.read_dword(state->m_scu.index[dma_ch]+4);
567567
568568      /*Indirect Mode end factor*/
569569      if(indirect_src & 0x80000000)
r17963r17964
599599         }
600600      }
601601
602      //if(DRUP(0))   space->write_dword(tmp_src+8,state->m_scu.src[0]|job_done ? 0x80000000 : 0);
603      //if(DWUP(0)) space->write_dword(tmp_src+4,state->m_scu.dst[0]);
602      //if(DRUP(0))   space.write_dword(tmp_src+8,state->m_scu.src[0]|job_done ? 0x80000000 : 0);
603      //if(DWUP(0)) space.write_dword(tmp_src+4,state->m_scu.dst[0]);
604604
605605      state->m_scu.index[dma_ch] = tmp_src+0xc;
606606
r17963r17964
610610      /*TODO: this is completely wrong HW-wise ...  */
611611      switch(dma_ch)
612612      {
613         case 0: space->machine().scheduler().timer_set(attotime::from_usec(300), FUNC(dma_lv0_ended)); break;
614         case 1: space->machine().scheduler().timer_set(attotime::from_usec(300), FUNC(dma_lv1_ended)); break;
615         case 2: space->machine().scheduler().timer_set(attotime::from_usec(300), FUNC(dma_lv2_ended)); break;
613         case 0: space.machine().scheduler().timer_set(attotime::from_usec(300), FUNC(dma_lv0_ended)); break;
614         case 1: space.machine().scheduler().timer_set(attotime::from_usec(300), FUNC(dma_lv1_ended)); break;
615         case 2: space.machine().scheduler().timer_set(attotime::from_usec(300), FUNC(dma_lv2_ended)); break;
616616      }
617617   }
618618}
r17963r17964
622622
623623static WRITE16_HANDLER( saturn_soundram_w )
624624{
625   saturn_state *state = space->machine().driver_data<saturn_state>();
625   saturn_state *state = space.machine().driver_data<saturn_state>();
626626
627   //space->machine().scheduler().synchronize(); // force resync
627   //space.machine().scheduler().synchronize(); // force resync
628628
629629   COMBINE_DATA(&state->m_sound_ram[offset]);
630630}
631631
632632static READ16_HANDLER( saturn_soundram_r )
633633{
634   saturn_state *state = space->machine().driver_data<saturn_state>();
634   saturn_state *state = space.machine().driver_data<saturn_state>();
635635
636   //space->machine().scheduler().synchronize(); // force resync
636   //space.machine().scheduler().synchronize(); // force resync
637637
638638   return state->m_sound_ram[offset];
639639}
r17963r17964
641641/* communication,SLAVE CPU acquires data from the MASTER CPU and triggers an irq.  */
642642static WRITE32_HANDLER( minit_w )
643643{
644   saturn_state *state = space->machine().driver_data<saturn_state>();
644   saturn_state *state = space.machine().driver_data<saturn_state>();
645645
646   //logerror("cpu %s (PC=%08X) MINIT write = %08x\n", space->device().tag(), space->device().safe_pc(),data);
647   space->machine().scheduler().boost_interleave(state->m_minit_boost_timeslice, attotime::from_usec(state->m_minit_boost));
648   space->machine().scheduler().trigger(1000);
646   //logerror("cpu %s (PC=%08X) MINIT write = %08x\n", space.device().tag(), space.device().safe_pc(),data);
647   space.machine().scheduler().boost_interleave(state->m_minit_boost_timeslice, attotime::from_usec(state->m_minit_boost));
648   space.machine().scheduler().trigger(1000);
649649   sh2_set_frt_input(state->m_slave, PULSE_LINE);
650650}
651651
652652static WRITE32_HANDLER( sinit_w )
653653{
654   saturn_state *state = space->machine().driver_data<saturn_state>();
654   saturn_state *state = space.machine().driver_data<saturn_state>();
655655
656   //logerror("cpu %s (PC=%08X) SINIT write = %08x\n", space->device().tag(), space->device().safe_pc(),data);
657   space->machine().scheduler().boost_interleave(state->m_sinit_boost_timeslice, attotime::from_usec(state->m_sinit_boost));
656   //logerror("cpu %s (PC=%08X) SINIT write = %08x\n", space.device().tag(), space.device().safe_pc(),data);
657   space.machine().scheduler().boost_interleave(state->m_sinit_boost_timeslice, attotime::from_usec(state->m_sinit_boost));
658658   sh2_set_frt_input(state->m_maincpu, PULSE_LINE);
659659}
660660
661661static READ8_HANDLER(saturn_backupram_r)
662662{
663   saturn_state *state = space->machine().driver_data<saturn_state>();
663   saturn_state *state = space.machine().driver_data<saturn_state>();
664664
665665   if(!(offset & 1))
666666      return 0; // yes, it makes sure the "holes" are there.
r17963r17964
670670
671671static WRITE8_HANDLER(saturn_backupram_w)
672672{
673   saturn_state *state = space->machine().driver_data<saturn_state>();
673   saturn_state *state = space.machine().driver_data<saturn_state>();
674674
675675   if(!(offset & 1))
676676      return;
r17963r17964
743743
744744static READ8_HANDLER( saturn_cart_type_r )
745745{
746   saturn_state *state = space->machine().driver_data<saturn_state>();
746   saturn_state *state = space.machine().driver_data<saturn_state>();
747747   const int cart_ram_header[7] = { 0xff, 0x21, 0x22, 0x23, 0x24, 0x5a, 0x5c };
748748
749749   return cart_ram_header[state->m_cart_type];
r17963r17964
19811981
19821982static READ32_HANDLER( saturn_cart_dram0_r )
19831983{
1984   saturn_state *state = space->machine().driver_data<saturn_state>();
1984   saturn_state *state = space.machine().driver_data<saturn_state>();
19851985
19861986   return state->m_cart_dram[offset];
19871987}
19881988
19891989static WRITE32_HANDLER( saturn_cart_dram0_w )
19901990{
1991   saturn_state *state = space->machine().driver_data<saturn_state>();
1991   saturn_state *state = space.machine().driver_data<saturn_state>();
19921992
19931993   COMBINE_DATA(&state->m_cart_dram[offset]);
19941994}
19951995
19961996static READ32_HANDLER( saturn_cart_dram1_r )
19971997{
1998   saturn_state *state = space->machine().driver_data<saturn_state>();
1998   saturn_state *state = space.machine().driver_data<saturn_state>();
19991999
20002000   return state->m_cart_dram[offset+0x200000/4];
20012001}
20022002
20032003static WRITE32_HANDLER( saturn_cart_dram1_w )
20042004{
2005   saturn_state *state = space->machine().driver_data<saturn_state>();
2005   saturn_state *state = space.machine().driver_data<saturn_state>();
20062006
20072007   COMBINE_DATA(&state->m_cart_dram[offset+0x200000/4]);
20082008}
20092009
20102010static READ32_HANDLER( saturn_cs1_r )
20112011{
2012   saturn_state *state = space->machine().driver_data<saturn_state>();
2012   saturn_state *state = space.machine().driver_data<saturn_state>();
20132013   UINT32 res;
20142014
20152015   res = 0;
r17963r17964
20232023
20242024static WRITE32_HANDLER( saturn_cs1_w )
20252025{
2026   saturn_state *state = space->machine().driver_data<saturn_state>();
2026   saturn_state *state = space.machine().driver_data<saturn_state>();
20272027
20282028   if(ACCESSING_BITS_16_23)
20292029      state->m_cart_backupram[offset*2+0] = (data & 0x00ff0000) >> 16;
trunk/src/mame/drivers/jpmsys5.c
r17963r17964
161161   }
162162
163163   if (ACCESSING_BITS_8_15)
164      tms34061_w(&space, col, row, func, data >> 8);
164      tms34061_w(space, col, row, func, data >> 8);
165165
166166   if (ACCESSING_BITS_0_7)
167      tms34061_w(&space, col | 1, row, func, data & 0xff);
167      tms34061_w(space, col | 1, row, func, data & 0xff);
168168}
169169
170170READ16_MEMBER(jpmsys5_state::sys5_tms34061_r)
r17963r17964
185185   }
186186
187187   if (ACCESSING_BITS_8_15)
188      data |= tms34061_r(&space, col, row, func) << 8;
188      data |= tms34061_r(space, col, row, func) << 8;
189189
190190   if (ACCESSING_BITS_0_7)
191      data |= tms34061_r(&space, col | 1, row, func);
191      data |= tms34061_r(space, col | 1, row, func);
192192
193193   return data;
194194}
trunk/src/mame/drivers/pacman.c
r17963r17964
57445744static void maketrax_rom_decode(running_machine &machine)
57455745{
57465746   pacman_state *state = machine.driver_data<pacman_state>();
5747   address_space *space = state->m_maincpu->space(AS_PROGRAM);
5747   address_space &space = *state->m_maincpu->space(AS_PROGRAM);
57485748   UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x4000);
57495749   UINT8 *rom = machine.root_device().memregion("maincpu")->base();
57505750
57515751   /* patch protection using a copy of the opcodes so ROM checksum */
57525752   /* tests will not fail */
5753   space->set_decrypted_region(0x0000, 0x3fff, decrypted);
5753   space.set_decrypted_region(0x0000, 0x3fff, decrypted);
57545754
57555755   memcpy(decrypted,rom,0x4000);
57565756
r17963r17964
57775777static void korosuke_rom_decode(running_machine &machine)
57785778{
57795779   pacman_state *state = machine.driver_data<pacman_state>();
5780   address_space *space = state->m_maincpu->space(AS_PROGRAM);
5780   address_space &space = *state->m_maincpu->space(AS_PROGRAM);
57815781   UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x4000);
57825782   UINT8 *rom = machine.root_device().memregion("maincpu")->base();
57835783
57845784   /* patch protection using a copy of the opcodes so ROM checksum */
57855785   /* tests will not fail */
5786   space->set_decrypted_region(0x0000, 0x3fff, decrypted);
5786   space.set_decrypted_region(0x0000, 0x3fff, decrypted);
57875787
57885788   memcpy(decrypted,rom,0x4000);
57895789
trunk/src/mame/drivers/sf.c
r17963r17964
5353/* The protection of the Japanese (and alt US) version */
5454/* I'd love to see someone dump the 68705 / i8751 roms */
5555
56static void write_dword( address_space *space, offs_t offset, UINT32 data )
56static void write_dword( address_space &space, offs_t offset, UINT32 data )
5757{
58   space->write_word(offset, data >> 16);
59   space->write_word(offset + 2, data);
58   space.write_word(offset, data >> 16);
59   space.write_word(offset + 2, data);
6060}
6161
6262WRITE16_MEMBER(sf_state::protection_w)
r17963r17964
8181
8282         base = 0x1b6e8 + 0x300e * map;
8383
84         write_dword(&space, 0xffc01c, 0x16bfc + 0x270 * map);
85         write_dword(&space, 0xffc020, base + 0x80);
86         write_dword(&space, 0xffc024, base);
87         write_dword(&space, 0xffc028, base + 0x86);
88         write_dword(&space, 0xffc02c, base + 0x8e);
89         write_dword(&space, 0xffc030, base + 0x20e);
90         write_dword(&space, 0xffc034, base + 0x30e);
91         write_dword(&space, 0xffc038, base + 0x38e);
92         write_dword(&space, 0xffc03c, base + 0x40e);
93         write_dword(&space, 0xffc040, base + 0x80e);
94         write_dword(&space, 0xffc044, base + 0xc0e);
95         write_dword(&space, 0xffc048, base + 0x180e);
96         write_dword(&space, 0xffc04c, base + 0x240e);
97         write_dword(&space, 0xffc050, 0x19548 + 0x60 * map);
98         write_dword(&space, 0xffc054, 0x19578 + 0x60 * map);
84         write_dword(space, 0xffc01c, 0x16bfc + 0x270 * map);
85         write_dword(space, 0xffc020, base + 0x80);
86         write_dword(space, 0xffc024, base);
87         write_dword(space, 0xffc028, base + 0x86);
88         write_dword(space, 0xffc02c, base + 0x8e);
89         write_dword(space, 0xffc030, base + 0x20e);
90         write_dword(space, 0xffc034, base + 0x30e);
91         write_dword(space, 0xffc038, base + 0x38e);
92         write_dword(space, 0xffc03c, base + 0x40e);
93         write_dword(space, 0xffc040, base + 0x80e);
94         write_dword(space, 0xffc044, base + 0xc0e);
95         write_dword(space, 0xffc048, base + 0x180e);
96         write_dword(space, 0xffc04c, base + 0x240e);
97         write_dword(space, 0xffc050, 0x19548 + 0x60 * map);
98         write_dword(space, 0xffc054, 0x19578 + 0x60 * map);
9999         break;
100100      }
101101   case 2:
trunk/src/mame/drivers/konamim2.c
r17963r17964
818818   }
819819}
820820
821static void cde_dma_transfer(address_space *space, int channel, int next)
821static void cde_dma_transfer(address_space &space, int channel, int next)
822822{
823   konamim2_state *state = space->machine().driver_data<konamim2_state>();
823   konamim2_state *state = space.machine().driver_data<konamim2_state>();
824824   UINT32 address;
825825   //int length;
826826   int i;
r17963r17964
838838
839839   for (i=0; i < state->m_cde_dma[channel].next_length; i++)
840840   {
841      space->write_byte(address, 0xff);      // TODO: do the real transfer...
841      space.write_byte(address, 0xff);      // TODO: do the real transfer...
842842      address++;
843843   }
844844}
r17963r17964
976976         {
977977            m_cde_dma[0].dma_done = 1;
978978
979            cde_dma_transfer(&space, 0, 0);
979            cde_dma_transfer(space, 0, 0);
980980         }
981981         if (d & 0x40)
982982         {
983983            m_cde_dma[0].dma_done = 1;
984984
985            cde_dma_transfer(&space, 0, 1);
985            cde_dma_transfer(space, 0, 1);
986986         }
987987         break;
988988      }
trunk/src/mame/drivers/cave.c
r17963r17964
809809   return ~8 + ((eeprom->read_bit() & 1) ? 8 : 0);
810810}
811811
812INLINE void vctrl_w(address_space *space, offs_t offset, UINT16 data, UINT16 mem_mask, int GFX)
812INLINE void vctrl_w(address_space &space, offs_t offset, UINT16 data, UINT16 mem_mask, int GFX)
813813{
814   cave_state *state = space->machine().driver_data<cave_state>();
814   cave_state *state = space.machine().driver_data<cave_state>();
815815   UINT16 *VCTRL = state->m_vctrl[GFX];
816816   if (offset == 4 / 2)
817817   {
r17963r17964
826826   }
827827   COMBINE_DATA(&VCTRL[offset]);
828828}
829WRITE16_MEMBER(cave_state::pwrinst2_vctrl_0_w){ vctrl_w(&space, offset, data, mem_mask, 0); }
830WRITE16_MEMBER(cave_state::pwrinst2_vctrl_1_w){ vctrl_w(&space, offset, data, mem_mask, 1); }
831WRITE16_MEMBER(cave_state::pwrinst2_vctrl_2_w){ vctrl_w(&space, offset, data, mem_mask, 2); }
832WRITE16_MEMBER(cave_state::pwrinst2_vctrl_3_w){ vctrl_w(&space, offset, data, mem_mask, 3); }
829WRITE16_MEMBER(cave_state::pwrinst2_vctrl_0_w){ vctrl_w(space, offset, data, mem_mask, 0); }
830WRITE16_MEMBER(cave_state::pwrinst2_vctrl_1_w){ vctrl_w(space, offset, data, mem_mask, 1); }
831WRITE16_MEMBER(cave_state::pwrinst2_vctrl_2_w){ vctrl_w(space, offset, data, mem_mask, 2); }
832WRITE16_MEMBER(cave_state::pwrinst2_vctrl_3_w){ vctrl_w(space, offset, data, mem_mask, 3); }
833833
834834static ADDRESS_MAP_START( pwrinst2_map, AS_PROGRAM, 16, cave_state )
835835   AM_RANGE(0x000000, 0x1fffff) AM_ROM                                                      // ROM
trunk/src/mame/drivers/williams.c
r17963r17964
519519ADDRESS_MAP_END
520520
521521
522void defender_install_io_space(address_space *space)
522void defender_install_io_space(address_space &space)
523523{
524   williams_state *state = space->machine().driver_data<williams_state>();
525   pia6821_device *pia_0 = space->machine().device<pia6821_device>("pia_0");
526   pia6821_device *pia_1 = space->machine().device<pia6821_device>("pia_1");
524   williams_state *state = space.machine().driver_data<williams_state>();
525   pia6821_device *pia_0 = space.machine().device<pia6821_device>("pia_0");
526   pia6821_device *pia_1 = space.machine().device<pia6821_device>("pia_1");
527527
528528   /* this routine dynamically installs the memory mapped above from c000-cfff */
529   space->install_write_bank    (0xc000, 0xc00f, 0, 0x03e0, "bank4");
530   space->install_write_handler    (0xc010, 0xc01f, 0, 0x03e0, write8_delegate(FUNC(williams_state::defender_video_control_w),state));
531   space->install_write_handler    (0xc3ff, 0xc3ff, write8_delegate(FUNC(williams_state::williams_watchdog_reset_w),state));
532   space->install_read_bank(0xc400, 0xc4ff, 0, 0x0300, "bank3");
533   space->install_write_handler(0xc400, 0xc4ff, 0, 0x0300, write8_delegate(FUNC(williams_state::williams_cmos_w),state));
534   space->install_read_handler     (0xc800, 0xcbff, 0, 0x03e0, read8_delegate(FUNC(williams_state::williams_video_counter_r),state));
535   space->install_readwrite_handler(0xcc00, 0xcc03, 0, 0x03e0, read8_delegate(FUNC(pia6821_device::read), pia_1), write8_delegate(FUNC(pia6821_device::write), pia_1));
536   space->install_readwrite_handler(0xcc04, 0xcc07, 0, 0x03e0, read8_delegate(FUNC(pia6821_device::read), pia_0), write8_delegate(FUNC(pia6821_device::write), pia_0));
537   state->membank("bank3")->set_base(space->machine().driver_data<williams_state>()->m_nvram);
538   state->membank("bank4")->set_base(space->machine().driver_data<williams_state>()->m_generic_paletteram_8);
529   space.install_write_bank    (0xc000, 0xc00f, 0, 0x03e0, "bank4");
530   space.install_write_handler    (0xc010, 0xc01f, 0, 0x03e0, write8_delegate(FUNC(williams_state::defender_video_control_w),state));
531   space.install_write_handler    (0xc3ff, 0xc3ff, write8_delegate(FUNC(williams_state::williams_watchdog_reset_w),state));
532   space.install_read_bank(0xc400, 0xc4ff, 0, 0x0300, "bank3");
533   space.install_write_handler(0xc400, 0xc4ff, 0, 0x0300, write8_delegate(FUNC(williams_state::williams_cmos_w),state));
534   space.install_read_handler     (0xc800, 0xcbff, 0, 0x03e0, read8_delegate(FUNC(williams_state::williams_video_counter_r),state));
535   space.install_readwrite_handler(0xcc00, 0xcc03, 0, 0x03e0, read8_delegate(FUNC(pia6821_device::read), pia_1), write8_delegate(FUNC(pia6821_device::write), pia_1));
536   space.install_readwrite_handler(0xcc04, 0xcc07, 0, 0x03e0, read8_delegate(FUNC(pia6821_device::read), pia_0), write8_delegate(FUNC(pia6821_device::write), pia_0));
537   state->membank("bank3")->set_base(space.machine().driver_data<williams_state>()->m_nvram);
538   state->membank("bank4")->set_base(space.machine().driver_data<williams_state>()->m_generic_paletteram_8);
539539}
540540
541541
trunk/src/mame/drivers/dec8.c
r17963r17964
7272   // rising edge
7373   if (vblank_on)
7474   {
75      address_space *space = screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
76      state->dec8_mxc06_karn_buffer_spriteram_w(*space, 0, 0);
75      address_space &space = *screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
76      state->dec8_mxc06_karn_buffer_spriteram_w(space, 0, 0);
7777   }
7878}
7979
r17963r17964
35273527/* Ghostbusters, Darwin, Oscar use a "Deco 222" custom 6502 for sound. */
35283528DRIVER_INIT_MEMBER(dec8_state,deco222)
35293529{
3530   address_space *space = machine().device("audiocpu")->memory().space(AS_PROGRAM);
3530   address_space &space = *machine().device("audiocpu")->memory().space(AS_PROGRAM);
35313531   int A;
35323532   UINT8 *decrypt;
35333533   UINT8 *rom;
r17963r17964
35363536   rom = memregion("audiocpu")->base();
35373537   decrypt = auto_alloc_array(machine(), UINT8, 0x8000);
35383538
3539   space->set_decrypted_region(0x8000, 0xffff, decrypt);
3539   space.set_decrypted_region(0x8000, 0xffff, decrypt);
35403540
35413541   for (A = 0x8000; A < 0x10000; A++)
35423542      decrypt[A - 0x8000] = (rom[A] & 0x9f) | ((rom[A] & 0x20) << 1) | ((rom[A] & 0x40) >> 1);
trunk/src/mame/drivers/atarigt.c
r17963r17964
8080
8181static void cage_irq_callback(running_machine &machine, int reason)
8282{
83   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
83   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
8484
8585   if (reason)
8686      atarigen_sound_int_gen(machine.device("maincpu"));
r17963r17964
201201
202202   if (ACCESSING_BITS_16_23)
203203   {
204      //cage_reset_w(&space, data & 0x00100000);
204      //cage_reset_w(space, data & 0x00100000);
205205      coin_counter_w(machine(), 0, data & 0x00080000);
206206      coin_counter_w(machine(), 1, data & 0x00010000);
207207   }
r17963r17964
236236   if (ACCESSING_BITS_0_15)
237237      result |= cage_control_r(machine());
238238   if (ACCESSING_BITS_16_31)
239      result |= cage_main_r(&space) << 16;
239      result |= cage_main_r(space) << 16;
240240   return result;
241241}
242242
r17963r17964
246246   if (ACCESSING_BITS_0_15)
247247      cage_control_w(machine(), data);
248248   if (ACCESSING_BITS_16_31)
249      cage_main_w(&space, data >> 16);
249      cage_main_w(space, data >> 16);
250250}
251251
252252
r17963r17964
271271}
272272
273273
274static void tmek_protection_w(address_space *space, offs_t offset, UINT16 data)
274static void tmek_protection_w(address_space &space, offs_t offset, UINT16 data)
275275{
276   atarigt_state *state = space->machine().driver_data<atarigt_state>();
276   atarigt_state *state = space.machine().driver_data<atarigt_state>();
277277/*
278278    T-Mek init:
279279        ($387C0) = $0001
r17963r17964
282282        Read ($38488)
283283*/
284284
285   if (LOG_PROTECTION) logerror("%06X:Protection W@%06X = %04X\n", space->device().safe_pcbase(), offset, data);
285   if (LOG_PROTECTION) logerror("%06X:Protection W@%06X = %04X\n", space.device().safe_pcbase(), offset, data);
286286
287287   /* track accesses */
288288   tmek_update_mode(state, offset);
r17963r17964
295295   }
296296}
297297
298static void tmek_protection_r(address_space *space, offs_t offset, UINT16 *data)
298static void tmek_protection_r(address_space &space, offs_t offset, UINT16 *data)
299299{
300   atarigt_state *state = space->machine().driver_data<atarigt_state>();
301   if (LOG_PROTECTION) logerror("%06X:Protection R@%06X\n", space->device().safe_pcbase(), offset);
300   atarigt_state *state = space.machine().driver_data<atarigt_state>();
301   if (LOG_PROTECTION) logerror("%06X:Protection R@%06X\n", space.device().safe_pcbase(), offset);
302302
303303   /* track accesses */
304304   tmek_update_mode(state, offset);
r17963r17964
362362
363363
364364
365static void primrage_protection_w(address_space *space, offs_t offset, UINT16 data)
365static void primrage_protection_w(address_space &space, offs_t offset, UINT16 data)
366366{
367   atarigt_state *state = space->machine().driver_data<atarigt_state>();
367   atarigt_state *state = space.machine().driver_data<atarigt_state>();
368368   if (LOG_PROTECTION)
369369   {
370   UINT32 pc = space->device().safe_pcbase();
370   UINT32 pc = space.device().safe_pcbase();
371371   switch (pc)
372372   {
373373      /* protection code from 20f90 - 21000 */
r17963r17964
400400
401401      /* catch anything else */
402402      default:
403         logerror("%06X:Unknown protection W@%06X = %04X\n", space->device().safe_pcbase(), offset, data);
403         logerror("%06X:Unknown protection W@%06X = %04X\n", space.device().safe_pcbase(), offset, data);
404404         break;
405405   }
406406   }
r17963r17964
433433
434434
435435
436static void primrage_protection_r(address_space *space, offs_t offset, UINT16 *data)
436static void primrage_protection_r(address_space &space, offs_t offset, UINT16 *data)
437437{
438   atarigt_state *state = space->machine().driver_data<atarigt_state>();
438   atarigt_state *state = space.machine().driver_data<atarigt_state>();
439439   /* track accesses */
440440   primage_update_mode(state, offset);
441441
442442if (LOG_PROTECTION)
443443{
444   UINT32 pc = space->device().safe_pcbase();
444   UINT32 pc = space.device().safe_pcbase();
445445   UINT32 p1, p2, a6;
446446   switch (pc)
447447   {
r17963r17964
461461      case 0x275bc:
462462         break;
463463      case 0x275cc:
464         a6 = space->device().state().state_int(M68K_A6);
465         p1 = (space->read_word(a6+8) << 16) | space->read_word(a6+10);
466         p2 = (space->read_word(a6+12) << 16) | space->read_word(a6+14);
464         a6 = space.device().state().state_int(M68K_A6);
465         p1 = (space.read_word(a6+8) << 16) | space.read_word(a6+10);
466         p2 = (space.read_word(a6+12) << 16) | space.read_word(a6+14);
467467         logerror("Known Protection @ 275BC(%08X, %08X): R@%06X ", p1, p2, offset);
468468         break;
469469      case 0x275d2:
r17963r17964
479479
480480      /* protection code from 3d8dc - 3d95a */
481481      case 0x3d8f4:
482         a6 = space->device().state().state_int(M68K_A6);
483         p1 = (space->read_word(a6+12) << 16) | space->read_word(a6+14);
482         a6 = space.device().state().state_int(M68K_A6);
483         p1 = (space.read_word(a6+12) << 16) | space.read_word(a6+14);
484484         logerror("Known Protection @ 3D8F4(%08X): R@%06X ", p1, offset);
485485         break;
486486      case 0x3d8fa:
r17963r17964
490490
491491      /* protection code from 437fa - 43860 */
492492      case 0x43814:
493         a6 = space->device().state().state_int(M68K_A6);
494         p1 = space->read_dword(a6+14) & 0xffffff;
493         a6 = space.device().state().state_int(M68K_A6);
494         p1 = space.read_dword(a6+14) & 0xffffff;
495495         logerror("Known Protection @ 43814(%08X): R@%06X ", p1, offset);
496496         break;
497497      case 0x4381c:
r17963r17964
504504
505505      /* catch anything else */
506506      default:
507         logerror("%06X:Unknown protection R@%06X\n", space->device().safe_pcbase(), offset);
507         logerror("%06X:Unknown protection R@%06X\n", space.device().safe_pcbase(), offset);
508508         break;
509509   }
510510}
r17963r17964
557557   if (ACCESSING_BITS_16_31)
558558   {
559559      result = atarigt_colorram_r(address);
560      (*m_protection_r)(&space, address, &result);
560      (*m_protection_r)(space, address, &result);
561561      result32 |= result << 16;
562562   }
563563   if (ACCESSING_BITS_0_15)
564564   {
565565      result = atarigt_colorram_r(address + 2);
566      (*m_protection_r)(&space, address + 2, &result);
566      (*m_protection_r)(space, address + 2, &result);
567567      result32 |= result;
568568   }
569569
r17963r17964
579579   {
580580      if (!m_ignore_writes)
581581         atarigt_colorram_w(address, data >> 16, mem_mask >> 16);
582      (*m_protection_w)(&space, address, data >> 16);
582      (*m_protection_w)(space, address, data >> 16);
583583   }
584584   if (ACCESSING_BITS_0_15)
585585   {
586586      if (!m_ignore_writes)
587587         atarigt_colorram_w(address + 2, data, mem_mask);
588      (*m_protection_w)(&space, address + 2, data);
588      (*m_protection_w)(space, address + 2, data);
589589   }
590590}
591591
r17963r17964
12571257   if (pc == 0x25834 || pc == 0x25860)
12581258      logerror("%06X:PFW@%06X = %08X & %08X (src=%06X)\n", space.device().safe_pc(), 0xd72000 + offset*4, data, mem_mask, (UINT32)space.device().state().state_int(M68K_A3) - 2);
12591259
1260   atarigen_playfield32_w(&space, offset, data, mem_mask);
1260   atarigen_playfield32_w(space, offset, data, mem_mask);
12611261}
12621262
12631263DRIVER_INIT_MEMBER(atarigt_state,tmek)
trunk/src/mame/drivers/darkmist.c
r17963r17964
400400
401401DRIVER_INIT_MEMBER(darkmist_state,darkmist)
402402{
403   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
403   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
404404   int i, len;
405405   UINT8 *ROM = machine().root_device().memregion("maincpu")->base();
406406   UINT8 *buffer = auto_alloc_array(machine(), UINT8, 0x10000);
r17963r17964
436436      decrypt[i] = p;
437437   }
438438
439   space->set_decrypted_region(0x0000, 0x7fff, decrypt);
440   space->machine().root_device().membank("bank1")->set_base(&ROM[0x010000]);
439   space.set_decrypted_region(0x0000, 0x7fff, decrypt);
440   space.machine().root_device().membank("bank1")->set_base(&ROM[0x010000]);
441441
442442   /* adr line swaps */
443443   ROM = machine().root_device().memregion("user1")->base();
trunk/src/mame/drivers/mquake.c
r17963r17964
8787
8888static READ8_HANDLER( es5503_sample_r )
8989{
90   UINT8 *rom = space->machine().root_device().memregion("es5503")->base();
91   es5503_device *es5503 = space->machine().device<es5503_device>("es5503");
90   UINT8 *rom = space.machine().root_device().memregion("es5503")->base();
91   es5503_device *es5503 = space.machine().device<es5503_device>("es5503");
9292
9393   return rom[offset + (es5503->get_channel_strobe() * 0x10000)];
9494}
r17963r17964
100100static WRITE16_HANDLER( output_w )
101101{
102102   if (ACCESSING_BITS_0_7)
103      logerror("%06x:output_w(%x) = %02x\n", space->device().safe_pc(), offset, data);
103      logerror("%06x:output_w(%x) = %02x\n", space.device().safe_pc(), offset, data);
104104}
105105
106106
107107static READ16_HANDLER( coin_chip_r )
108108{
109109   if (offset == 1)
110      return space->machine().root_device().ioport("COINCHIP")->read();
111   logerror("%06x:coin_chip_r(%02x) & %04x\n", space->device().safe_pc(), offset, mem_mask);
110      return space.machine().root_device().ioport("COINCHIP")->read();
111   logerror("%06x:coin_chip_r(%02x) & %04x\n", space.device().safe_pc(), offset, mem_mask);
112112   return 0xffff;
113113}
114114
115115static WRITE16_HANDLER( coin_chip_w )
116116{
117   logerror("%06x:coin_chip_w(%02x) = %04x & %04x\n", space->device().safe_pc(), offset, data, mem_mask);
117   logerror("%06x:coin_chip_w(%02x) = %04x & %04x\n", space.device().safe_pc(), offset, data, mem_mask);
118118}
119119
120120// inputs at 282000, 282002 (full word)
trunk/src/mame/drivers/nmk16.c
r17963r17964
47084708   if (data & (~3))
47094709      logerror("%s: invalid oki bank %02x\n", machine().describe_context(), data);
47104710
4711//  logerror("%04x: oki bank %02x\n", space->device().safe_pc(), data);
4711//  logerror("%04x: oki bank %02x\n", space.device().safe_pc(), data);
47124712}
47134713
47144714static ADDRESS_MAP_START( twinactn_sound_cpu, AS_PROGRAM, 8, nmk16_state )
trunk/src/emu/debug/debugcpu.c
r17963r17964
115115
116116/* expression handlers */
117117static UINT64 expression_read_memory(void *param, const char *name, expression_space space, UINT32 address, int size);
118static UINT64 expression_read_program_direct(address_space *space, int opcode, offs_t address, int size);
118static UINT64 expression_read_program_direct(address_space &space, int opcode, offs_t address, int size);
119119static UINT64 expression_read_memory_region(running_machine &machine, const char *rgntag, offs_t address, int size);
120120static void expression_write_memory(void *param, const char *name, expression_space space, UINT32 address, int size, UINT64 data);
121static void expression_write_program_direct(address_space *space, int opcode, offs_t address, int size, UINT64 data);
121static void expression_write_program_direct(address_space &space, int opcode, offs_t address, int size, UINT64 data);
122122static void expression_write_memory_region(running_machine &machine, const char *rgntag, offs_t address, int size, UINT64 data);
123123static expression_error::error_code expression_validate(void *param, const char *name, expression_space space);
124124
r17963r17964
448448    address
449449-------------------------------------------------*/
450450
451int debug_cpu_translate(address_space *space, int intention, offs_t *address)
451int debug_cpu_translate(address_space &space, int intention, offs_t *address)
452452{
453453   device_memory_interface *memory;
454   if (space->device().interface(memory))
455      return memory->translate(space->spacenum(), intention, *address);
454   if (space.device().interface(memory))
455      return memory->translate(space.spacenum(), intention, *address);
456456   return true;
457457}
458458
r17963r17964
466466    the specified memory space
467467-------------------------------------------------*/
468468
469UINT8 debug_read_byte(address_space *_space, offs_t address, int apply_translation)
469UINT8 debug_read_byte(address_space &space, offs_t address, int apply_translation)
470470{
471   address_space *space = const_cast<address_space *>(_space);
472   debugcpu_private *global = space->machine().debugcpu_data;
471   debugcpu_private *global = space.machine().debugcpu_data;
473472   UINT64 custom;
474473   UINT8 result;
475474
476475   /* mask against the logical byte mask */
477   address &= space->logbytemask();
476   address &= space.logbytemask();
478477
479478   /* all accesses from this point on are for the debugger */
480   space->set_debugger_access(global->debugger_access = true);
479   space.set_debugger_access(global->debugger_access = true);
481480
482481   /* translate if necessary; if not mapped, return 0xff */
483482   if (apply_translation && !debug_cpu_translate(space, TRANSLATE_READ_DEBUG, &address))
484483      result = 0xff;
485484
486485   /* if there is a custom read handler, and it returns true, use that value */
487   else if (space->device().memory().read(space->spacenum(), address, 1, custom))
486   else if (space.device().memory().read(space.spacenum(), address, 1, custom))
488487      result = custom;
489488
490489   /* otherwise, call the byte reading function for the translated address */
491490   else
492      result = space->read_byte(address);
491      result = space.read_byte(address);
493492
494493   /* no longer accessing via the debugger */
495   space->set_debugger_access(global->debugger_access = false);
494   space.set_debugger_access(global->debugger_access = false);
496495   return result;
497496}
498497
r17963r17964
502501    specified memory space
503502-------------------------------------------------*/
504503
505UINT16 debug_read_word(address_space *_space, offs_t address, int apply_translation)
504UINT16 debug_read_word(address_space &space, offs_t address, int apply_translation)
506505{
507   address_space *space = const_cast<address_space *>(_space);
508   debugcpu_private *global = space->machine().debugcpu_data;
506   debugcpu_private *global = space.machine().debugcpu_data;
509507   UINT16 result;
510508
511509   /* mask against the logical byte mask */
512   address &= space->logbytemask();
510   address &= space.logbytemask();
513511
514512   /* if this is misaligned read, or if there are no word readers, just read two bytes */
515513   if ((address & 1) != 0)
r17963r17964
518516      UINT8 byte1 = debug_read_byte(space, address + 1, apply_translation);
519517
520518      /* based on the endianness, the result is assembled differently */
521      if (space->endianness() == ENDIANNESS_LITTLE)
519      if (space.endianness() == ENDIANNESS_LITTLE)
522520         result = byte0 | (byte1 << 8);
523521      else
524522         result = byte1 | (byte0 << 8);
r17963r17964
530528      UINT64 custom;
531529
532530      /* all accesses from this point on are for the debugger */
533      space->set_debugger_access(global->debugger_access = true);
531      space.set_debugger_access(global->debugger_access = true);
534532
535533      /* translate if necessary; if not mapped, return 0xffff */
536534      if (apply_translation && !debug_cpu_translate(space, TRANSLATE_READ_DEBUG, &address))
537535         result = 0xffff;
538536
539537      /* if there is a custom read handler, and it returns true, use that value */
540      else if (space->device().memory().read(space->spacenum(), address, 2, custom))
538      else if (space.device().memory().read(space.spacenum(), address, 2, custom))
541539         result = custom;
542540
543541      /* otherwise, call the byte reading function for the translated address */
544542      else
545         result = space->read_word(address);
543         result = space.read_word(address);
546544
547545      /* no longer accessing via the debugger */
548      space->set_debugger_access(global->debugger_access = false);
546      space.set_debugger_access(global->debugger_access = false);
549547   }
550548
551549   return result;
r17963r17964
557555    specified memory space
558556-------------------------------------------------*/
559557
560UINT32 debug_read_dword(address_space *_space, offs_t address, int apply_translation)
558UINT32 debug_read_dword(address_space &space, offs_t address, int apply_translation)
561559{
562   address_space *space = const_cast<address_space *>(_space);
563   debugcpu_private *global = space->machine().debugcpu_data;
560   debugcpu_private *global = space.machine().debugcpu_data;
564561   UINT32 result;
565562
566563   /* mask against the logical byte mask */
567   address &= space->logbytemask();
564   address &= space.logbytemask();
568565
569566   /* if this is misaligned read, or if there are no dword readers, just read two words */
570567   if ((address & 3) != 0)
r17963r17964
573570      UINT16 word1 = debug_read_word(space, address + 2, apply_translation);
574571
575572      /* based on the endianness, the result is assembled differently */
576      if (space->endianness() == ENDIANNESS_LITTLE)
573      if (space.endianness() == ENDIANNESS_LITTLE)
577574         result = word0 | (word1 << 16);
578575      else
579576         result = word1 | (word0 << 16);
r17963r17964
585582      UINT64 custom;
586583
587584      /* all accesses from this point on are for the debugger */
588      space->set_debugger_access(global->debugger_access = true);
585      space.set_debugger_access(global->debugger_access = true);
589586
590587      /* translate if necessary; if not mapped, return 0xffffffff */
591588      if (apply_translation && !debug_cpu_translate(space, TRANSLATE_READ_DEBUG, &address))
592589         result = 0xffffffff;
593590
594591      /* if there is a custom read handler, and it returns true, use that value */
595      else if (space->device().memory().read(space->spacenum(), address, 4, custom))
592      else if (space.device().memory().read(space.spacenum(), address, 4, custom))
596593         result = custom;
597594
598595      /* otherwise, call the byte reading function for the translated address */
599596      else
600         result = space->read_dword(address);
597         result = space.read_dword(address);
601598
602599      /* no longer accessing via the debugger */
603      space->set_debugger_access(global->debugger_access = false);
600      space.set_debugger_access(global->debugger_access = false);
604601   }
605602
606603   return result;
r17963r17964
612609    specified memory space
613610-------------------------------------------------*/
614611
615UINT64 debug_read_qword(address_space *_space, offs_t address, int apply_translation)
612UINT64 debug_read_qword(address_space &space, offs_t address, int apply_translation)
616613{
617   address_space *space = const_cast<address_space *>(_space);
618   debugcpu_private *global = space->machine().debugcpu_data;
614   debugcpu_private *global = space.machine().debugcpu_data;
619615   UINT64 result;
620616
621617   /* mask against the logical byte mask */
622   address &= space->logbytemask();
618   address &= space.logbytemask();
623619
624620   /* if this is misaligned read, or if there are no qword readers, just read two dwords */
625621   if ((address & 7) != 0)
r17963r17964
628624      UINT32 dword1 = debug_read_dword(space, address + 4, apply_translation);
629625
630626      /* based on the endianness, the result is assembled differently */
631      if (space->endianness() == ENDIANNESS_LITTLE)
627      if (space.endianness() == ENDIANNESS_LITTLE)
632628         result = dword0 | ((UINT64)dword1 << 32);
633629      else
634630         result = dword1 | ((UINT64)dword0 << 32);
r17963r17964
640636      UINT64 custom;
641637
642638      /* all accesses from this point on are for the debugger */
643      space->set_debugger_access(global->debugger_access = true);
639      space.set_debugger_access(global->debugger_access = true);
644640
645641      /* translate if necessary; if not mapped, return 0xffffffffffffffff */
646642      if (apply_translation && !debug_cpu_translate(space, TRANSLATE_READ_DEBUG, &address))
647643         result = ~(UINT64)0;
648644
649645      /* if there is a custom read handler, and it returns true, use that value */
650      else if (space->device().memory().read(space->spacenum(), address, 8, custom))
646      else if (space.device().memory().read(space.spacenum(), address, 8, custom))
651647         result = custom;
652648
653649      /* otherwise, call the byte reading function for the translated address */
654650      else
655         result = space->read_qword(address);
651         result = space.read_qword(address);
656652
657653      /* no longer accessing via the debugger */
658      space->set_debugger_access(global->debugger_access = false);
654      space.set_debugger_access(global->debugger_access = false);
659655   }
660656
661657   return result;
r17963r17964
667663    from the specified memory space
668664-------------------------------------------------*/
669665
670UINT64 debug_read_memory(address_space *space, offs_t address, int size, int apply_translation)
666UINT64 debug_read_memory(address_space &space, offs_t address, int size, int apply_translation)
671667{
672668   UINT64 result = ~(UINT64)0 >> (64 - 8*size);
673669   switch (size)
r17963r17964
686682    specified memory space
687683-------------------------------------------------*/
688684
689void debug_write_byte(address_space *_space, offs_t address, UINT8 data, int apply_translation)
685void debug_write_byte(address_space &space, offs_t address, UINT8 data, int apply_translation)
690686{
691   address_space *space = const_cast<address_space *>(_space);
692   debugcpu_private *global = space->machine().debugcpu_data;
687   debugcpu_private *global = space.machine().debugcpu_data;
693688
694689   /* mask against the logical byte mask */
695   address &= space->logbytemask();
690   address &= space.logbytemask();
696691
697692   /* all accesses from this point on are for the debugger */
698   space->set_debugger_access(global->debugger_access = true);
693   space.set_debugger_access(global->debugger_access = true);
699694
700695   /* translate if necessary; if not mapped, we're done */
701696   if (apply_translation && !debug_cpu_translate(space, TRANSLATE_WRITE_DEBUG, &address))
702697      ;
703698
704699   /* if there is a custom write handler, and it returns true, use that */
705   else if (space->device().memory().write(space->spacenum(), address, 1, data))
700   else if (space.device().memory().write(space.spacenum(), address, 1, data))
706701      ;
707702
708703   /* otherwise, call the byte reading function for the translated address */
709704   else
710      space->write_byte(address, data);
705      space.write_byte(address, data);
711706
712707   /* no longer accessing via the debugger */
713   space->set_debugger_access(global->debugger_access = false);
708   space.set_debugger_access(global->debugger_access = false);
714709   global->memory_modified = true;
715710}
716711
r17963r17964
720715    specified memory space
721716-------------------------------------------------*/
722717
723void debug_write_word(address_space *_space, offs_t address, UINT16 data, int apply_translation)
718void debug_write_word(address_space &space, offs_t address, UINT16 data, int apply_translation)
724719{
725   address_space *space = const_cast<address_space *>(_space);
726   debugcpu_private *global = space->machine().debugcpu_data;
720   debugcpu_private *global = space.machine().debugcpu_data;
727721
728722   /* mask against the logical byte mask */
729   address &= space->logbytemask();
723   address &= space.logbytemask();
730724
731725   /* if this is a misaligned write, or if there are no word writers, just read two bytes */
732726   if ((address & 1) != 0)
733727   {
734      if (space->endianness() == ENDIANNESS_LITTLE)
728      if (space.endianness() == ENDIANNESS_LITTLE)
735729      {
736730         debug_write_byte(space, address + 0, data >> 0, apply_translation);
737731         debug_write_byte(space, address + 1, data >> 8, apply_translation);
r17963r17964
747741   else
748742   {
749743      /* all accesses from this point on are for the debugger */
750      space->set_debugger_access(global->debugger_access = true);
744      space.set_debugger_access(global->debugger_access = true);
751745
752746      /* translate if necessary; if not mapped, we're done */
753747      if (apply_translation && !debug_cpu_translate(space, TRANSLATE_WRITE_DEBUG, &address))
754748         ;
755749
756750      /* if there is a custom write handler, and it returns true, use that */
757      else if (space->device().memory().write(space->spacenum(), address, 2, data))
751      else if (space.device().memory().write(space.spacenum(), address, 2, data))
758752         ;
759753
760754      /* otherwise, call the byte reading function for the translated address */
761755      else
762         space->write_word(address, data);
756         space.write_word(address, data);
763757
764758      /* no longer accessing via the debugger */
765      space->set_debugger_access(global->debugger_access = false);
759      space.set_debugger_access(global->debugger_access = false);
766760      global->memory_modified = true;
767761   }
768762}
r17963r17964
773767    specified memory space
774768-------------------------------------------------*/
775769
776void debug_write_dword(address_space *_space, offs_t address, UINT32 data, int apply_translation)
770void debug_write_dword(address_space &space, offs_t address, UINT32 data, int apply_translation)
777771{
778   address_space *space = const_cast<address_space *>(_space);
779   debugcpu_private *global = space->machine().debugcpu_data;
772   debugcpu_private *global = space.machine().debugcpu_data;
780773
781774   /* mask against the logical byte mask */
782   address &= space->logbytemask();
775   address &= space.logbytemask();
783776
784777   /* if this is a misaligned write, or if there are no dword writers, just read two words */
785778   if ((address & 3) != 0)
786779   {
787      if (space->endianness() == ENDIANNESS_LITTLE)
780      if (space.endianness() == ENDIANNESS_LITTLE)
788781      {
789782         debug_write_word(space, address + 0, data >> 0, apply_translation);
790783         debug_write_word(space, address + 2, data >> 16, apply_translation);
r17963r17964
800793   else
801794   {
802795      /* all accesses from this point on are for the debugger */
803      space->set_debugger_access(global->debugger_access = true);
796      space.set_debugger_access(global->debugger_access = true);
804797
805798      /* translate if necessary; if not mapped, we're done */
806799      if (apply_translation && !debug_cpu_translate(space, TRANSLATE_WRITE_DEBUG, &address))
807800         ;
808801
809802      /* if there is a custom write handler, and it returns true, use that */
810      else if (space->device().memory().write(space->spacenum(), address, 4, data))
803      else if (space.device().memory().write(space.spacenum(), address, 4, data))
811804         ;
812805
813806      /* otherwise, call the byte reading function for the translated address */
814807      else
815         space->write_dword(address, data);
808         space.write_dword(address, data);
816809
817810      /* no longer accessing via the debugger */
818      space->set_debugger_access(global->debugger_access = false);
811      space.set_debugger_access(global->debugger_access = false);
819812      global->memory_modified = true;
820813   }
821814}
r17963r17964
826819    specified memory space
827820-------------------------------------------------*/
828821
829void debug_write_qword(address_space *_space, offs_t address, UINT64 data, int apply_translation)
822void debug_write_qword(address_space &space, offs_t address, UINT64 data, int apply_translation)
830823{
831   address_space *space = const_cast<address_space *>(_space);
832   debugcpu_private *global = space->machine().debugcpu_data;
824   debugcpu_private *global = space.machine().debugcpu_data;
833825
834826   /* mask against the logical byte mask */
835   address &= space->logbytemask();
827   address &= space.logbytemask();
836828
837829   /* if this is a misaligned write, or if there are no qword writers, just read two dwords */
838830   if ((address & 7) != 0)
839831   {
840      if (space->endianness() == ENDIANNESS_LITTLE)
832      if (space.endianness() == ENDIANNESS_LITTLE)
841833      {
842834         debug_write_dword(space, address + 0, data >> 0, apply_translation);
843835         debug_write_dword(space, address + 4, data >> 32, apply_translation);
r17963r17964
853845   else
854846   {
855847      /* all accesses from this point on are for the debugger */
856      space->set_debugger_access(global->debugger_access = true);
848      space.set_debugger_access(global->debugger_access = true);
857849
858850      /* translate if necessary; if not mapped, we're done */
859851      if (apply_translation && !debug_cpu_translate(space, TRANSLATE_WRITE_DEBUG, &address))
860852         ;
861853
862854      /* if there is a custom write handler, and it returns true, use that */
863      else if (space->device().memory().write(space->spacenum(), address, 8, data))
855      else if (space.device().memory().write(space.spacenum(), address, 8, data))
864856         ;
865857
866858      /* otherwise, call the byte reading function for the translated address */
867859      else
868         space->write_qword(address, data);
860         space.write_qword(address, data);
869861
870862      /* no longer accessing via the debugger */
871      space->set_debugger_access(global->debugger_access = false);
863      space.set_debugger_access(global->debugger_access = false);
872864      global->memory_modified = true;
873865   }
874866}
r17963r17964
879871    to the specified memory space
880872-------------------------------------------------*/
881873
882void debug_write_memory(address_space *space, offs_t address, UINT64 data, int size, int apply_translation)
874void debug_write_memory(address_space &space, offs_t address, UINT64 data, int size, int apply_translation)
883875{
884876   switch (size)
885877   {
r17963r17964
896888    the given offset from opcode space
897889-------------------------------------------------*/
898890
899UINT64 debug_read_opcode(address_space *_space, offs_t address, int size, int arg)
891UINT64 debug_read_opcode(address_space &space, offs_t address, int size, int arg)
900892{
901   address_space *space = const_cast<address_space *>(_space);
902893   UINT64 result = ~(UINT64)0 & (~(UINT64)0 >> (64 - 8*size)), result2;
903   debugcpu_private *global = space->machine().debugcpu_data;
894   debugcpu_private *global = space.machine().debugcpu_data;
904895
905896   /* keep in logical range */
906   address &= space->logbytemask();
897   address &= space.logbytemask();
907898
908899   /* return early if we got the result directly */
909   space->set_debugger_access(global->debugger_access = true);
900   space.set_debugger_access(global->debugger_access = true);
910901   device_memory_interface *memory;
911   if (space->device().interface(memory) && memory->readop(address, size, result2))
902   if (space.device().interface(memory) && memory->readop(address, size, result2))
912903   {
913      space->set_debugger_access(global->debugger_access = false);
904      space.set_debugger_access(global->debugger_access = false);
914905      return result2;
915906   }
916907
917908   /* if we're bigger than the address bus, break into smaller pieces */
918   if (size > space->data_width() / 8)
909   if (size > space.data_width() / 8)
919910   {
920911      int halfsize = size / 2;
921912      UINT64 r0 = debug_read_opcode(space, address + 0, halfsize, arg);
922913      UINT64 r1 = debug_read_opcode(space, address + halfsize, halfsize, arg);
923914
924      if (space->endianness() == ENDIANNESS_LITTLE)
915      if (space.endianness() == ENDIANNESS_LITTLE)
925916         return r0 | (r1 << (8 * halfsize));
926917      else
927918         return r1 | (r0 << (8 * halfsize));
r17963r17964
932923      return result;
933924
934925   /* keep in physical range */
935   address &= space->bytemask();
926   address &= space.bytemask();
936927   offs_t addrxor = 0;
937   switch (space->data_width() / 8 * 10 + size)
928   switch (space.data_width() / 8 * 10 + size)
938929   {
939930      /* dump opcodes in bytes from a byte-sized bus */
940931      case 11:
r17963r17964
942933
943934      /* dump opcodes in bytes from a word-sized bus */
944935      case 21:
945         addrxor = (space->endianness() == ENDIANNESS_LITTLE) ? BYTE_XOR_LE(0) : BYTE_XOR_BE(0);
936         addrxor = (space.endianness() == ENDIANNESS_LITTLE) ? BYTE_XOR_LE(0) : BYTE_XOR_BE(0);
946937         break;
947938
948939      /* dump opcodes in words from a word-sized bus */
r17963r17964
951942
952943      /* dump opcodes in bytes from a dword-sized bus */
953944      case 41:
954         addrxor = (space->endianness() == ENDIANNESS_LITTLE) ? BYTE4_XOR_LE(0) : BYTE4_XOR_BE(0);
945         addrxor = (space.endianness() == ENDIANNESS_LITTLE) ? BYTE4_XOR_LE(0) : BYTE4_XOR_BE(0);
955946         break;
956947
957948      /* dump opcodes in words from a dword-sized bus */
958949      case 42:
959         addrxor = (space->endianness() == ENDIANNESS_LITTLE) ? WORD_XOR_LE(0) : WORD_XOR_BE(0);
950         addrxor = (space.endianness() == ENDIANNESS_LITTLE) ? WORD_XOR_LE(0) : WORD_XOR_BE(0);
960951         break;
961952
962953      /* dump opcodes in dwords from a dword-sized bus */
r17963r17964
965956
966957      /* dump opcodes in bytes from a qword-sized bus */
967958      case 81:
968         addrxor = (space->endianness() == ENDIANNESS_LITTLE) ? BYTE8_XOR_LE(0) : BYTE8_XOR_BE(0);
959         addrxor = (space.endianness() == ENDIANNESS_LITTLE) ? BYTE8_XOR_LE(0) : BYTE8_XOR_BE(0);
969960         break;
970961
971962      /* dump opcodes in words from a qword-sized bus */
972963      case 82:
973         addrxor = (space->endianness() == ENDIANNESS_LITTLE) ? WORD2_XOR_LE(0) : WORD2_XOR_BE(0);
964         addrxor = (space.endianness() == ENDIANNESS_LITTLE) ? WORD2_XOR_LE(0) : WORD2_XOR_BE(0);
974965         break;
975966
976967      /* dump opcodes in dwords from a qword-sized bus */
977968      case 84:
978         addrxor = (space->endianness() == ENDIANNESS_LITTLE) ? DWORD_XOR_LE(0) : DWORD_XOR_BE(0);
969         addrxor = (space.endianness() == ENDIANNESS_LITTLE) ? DWORD_XOR_LE(0) : DWORD_XOR_BE(0);
979970         break;
980971
981972      /* dump opcodes in qwords from a qword-sized bus */
r17963r17964
983974         break;
984975
985976      default:
986         fatalerror("debug_read_opcode: unknown type = %d\n", space->data_width() / 8 * 10 + size);
977         fatalerror("debug_read_opcode: unknown type = %d\n", space.data_width() / 8 * 10 + size);
987978         break;
988979   }
989980
990981   /* turn on debugger access */
991982   if (!global->debugger_access)
992      space->set_debugger_access(global->debugger_access = true);
983      space.set_debugger_access(global->debugger_access = true);
993984
994985   /* switch off the size and handle unaligned accesses */
995986   switch (size)
996987   {
997988      case 1:
998         result = (arg) ? space->direct().read_raw_byte(address, addrxor) : space->direct().read_decrypted_byte(address, addrxor);
989         result = (arg) ? space.direct().read_raw_byte(address, addrxor) : space.direct().read_decrypted_byte(address, addrxor);
999990         break;
1000991
1001992      case 2:
1002         result = (arg) ? space->direct().read_raw_word(address & ~1, addrxor) : space->direct().read_decrypted_word(address & ~1, addrxor);
993         result = (arg) ? space.direct().read_raw_word(address & ~1, addrxor) : space.direct().read_decrypted_word(address & ~1, addrxor);
1003994         if ((address & 1) != 0)
1004995         {
1005            result2 = (arg) ? space->direct().read_raw_word((address & ~1) + 2, addrxor) : space->direct().read_decrypted_word((address & ~1) + 2, addrxor);
1006            if (space->endianness() == ENDIANNESS_LITTLE)
996            result2 = (arg) ? space.direct().read_raw_word((address & ~1) + 2, addrxor) : space.direct().read_decrypted_word((address & ~1) + 2, addrxor);
997            if (space.endianness() == ENDIANNESS_LITTLE)
1007998               result = (result >> (8 * (address & 1))) | (result2 << (16 - 8 * (address & 1)));
1008999            else
10091000               result = (result << (8 * (address & 1))) | (result2 >> (16 - 8 * (address & 1)));
r17963r17964
10121003         break;
10131004
10141005      case 4:
1015         result = (arg) ? space->direct().read_raw_dword(address & ~3, addrxor) : space->direct().read_decrypted_dword(address & ~3, addrxor);
1006         result = (arg) ? space.direct().read_raw_dword(address & ~3, addrxor) : space.direct().read_decrypted_dword(address & ~3, addrxor);
10161007         if ((address & 3) != 0)
10171008         {
1018            result2 = (arg) ? space->direct().read_raw_dword((address & ~3) + 4, addrxor) : space->direct().read_decrypted_dword((address & ~3) + 4, addrxor);
1019            if (space->endianness() == ENDIANNESS_LITTLE)
1009            result2 = (arg) ? space.direct().read_raw_dword((address & ~3) + 4, addrxor) : space.direct().read_decrypted_dword((address & ~3) + 4, addrxor);
1010            if (space.endianness() == ENDIANNESS_LITTLE)
10201011               result = (result >> (8 * (address & 3))) | (result2 << (32 - 8 * (address & 3)));
10211012            else
10221013               result = (result << (8 * (address & 3))) | (result2 >> (32 - 8 * (address & 3)));
r17963r17964
10251016         break;
10261017
10271018      case 8:
1028         result = (arg) ? space->direct().read_raw_qword(address & ~7, addrxor) : space->direct().read_decrypted_qword(address & ~7, addrxor);
1019         result = (arg) ? space.direct().read_raw_qword(address & ~7, addrxor) : space.direct().read_decrypted_qword(address & ~7, addrxor);
10291020         if ((address & 7) != 0)
10301021         {
1031            result2 = (arg) ? space->direct().read_raw_qword((address & ~7) + 8, addrxor) : space->direct().read_decrypted_qword((address & ~7) + 8, addrxor);
1032            if (space->endianness() == ENDIANNESS_LITTLE)
1022            result2 = (arg) ? space.direct().read_raw_qword((address & ~7) + 8, addrxor) : space.direct().read_decrypted_qword((address & ~7) + 8, addrxor);
1023            if (space.endianness() == ENDIANNESS_LITTLE)
10331024               result = (result >> (8 * (address & 7))) | (result2 << (64 - 8 * (address & 7)));
10341025            else
10351026               result = (result << (8 * (address & 7))) | (result2 >> (64 - 8 * (address & 7)));
r17963r17964
10381029   }
10391030
10401031   /* no longer accessing via the debugger */
1041   space->set_debugger_access(global->debugger_access = false);
1032   space.set_debugger_access(global->debugger_access = false);
10421033   return result;
10431034}
10441035
r17963r17964
11781169            device = debug_cpu_get_visible_cpu(machine);
11791170         space = device->memory().space(AS_PROGRAM + (spacenum - EXPSPACE_PROGRAM_LOGICAL));
11801171         if (space != NULL)
1181            result = debug_read_memory(space, space->address_to_byte(address), size, true);
1172            result = debug_read_memory(*space, space->address_to_byte(address), size, true);
11821173         break;
11831174
11841175      case EXPSPACE_PROGRAM_PHYSICAL:
r17963r17964
11911182            device = debug_cpu_get_visible_cpu(machine);
11921183         space = device->memory().space(AS_PROGRAM + (spacenum - EXPSPACE_PROGRAM_PHYSICAL));
11931184         if (space != NULL)
1194            result = debug_read_memory(space, space->address_to_byte(address), size, false);
1185            result = debug_read_memory(*space, space->address_to_byte(address), size, false);
11951186         break;
11961187
11971188      case EXPSPACE_OPCODE:
r17963r17964
12001191            device = expression_get_device(machine, name);
12011192         if (device == NULL)
12021193            device = debug_cpu_get_visible_cpu(machine);
1203         result = expression_read_program_direct(device->memory().space(AS_PROGRAM), (spacenum == EXPSPACE_OPCODE), address, size);
1194         result = expression_read_program_direct(*device->memory().space(AS_PROGRAM), (spacenum == EXPSPACE_OPCODE), address, size);
12041195         break;
12051196
12061197      case EXPSPACE_REGION:
r17963r17964
12211212    directly from an opcode or RAM pointer
12221213-------------------------------------------------*/
12231214
1224static UINT64 expression_read_program_direct(address_space *_space, int opcode, offs_t address, int size)
1215static UINT64 expression_read_program_direct(address_space &space, int opcode, offs_t address, int size)
12251216{
1226   address_space *space = const_cast<address_space *>(_space);
12271217   UINT64 result = ~(UINT64)0 >> (64 - 8*size);
1218   UINT8 *base;
12281219
1229   if (space != NULL)
1220   /* adjust the address into a byte address, but not if being called recursively */
1221   if ((opcode & 2) == 0)
1222      address = space.address_to_byte(address);
1223
1224   /* call ourself recursively until we are byte-sized */
1225   if (size > 1)
12301226   {
1231      UINT8 *base;
1227      int halfsize = size / 2;
1228      UINT64 r0, r1;
12321229
1233      /* adjust the address into a byte address, but not if being called recursively */
1234      if ((opcode & 2) == 0)
1235         address = space->address_to_byte(address);
1230      /* read each half, from lower address to upper address */
1231      r0 = expression_read_program_direct(space, opcode | 2, address + 0, halfsize);
1232      r1 = expression_read_program_direct(space, opcode | 2, address + halfsize, halfsize);
12361233
1237      /* call ourself recursively until we are byte-sized */
1238      if (size > 1)
1239      {
1240         int halfsize = size / 2;
1241         UINT64 r0, r1;
1234      /* assemble based on the target endianness */
1235      if (space.endianness() == ENDIANNESS_LITTLE)
1236         result = r0 | (r1 << (8 * halfsize));
1237      else
1238         result = r1 | (r0 << (8 * halfsize));
1239   }
12421240
1243         /* read each half, from lower address to upper address */
1244         r0 = expression_read_program_direct(space, opcode | 2, address + 0, halfsize);
1245         r1 = expression_read_program_direct(space, opcode | 2, address + halfsize, halfsize);
1241   /* handle the byte-sized final requests */
1242   else
1243   {
1244      /* lowmask specified which address bits are within the databus width */
1245      offs_t lowmask = space.data_width() / 8 - 1;
12461246
1247         /* assemble based on the target endianness */
1248         if (space->endianness() == ENDIANNESS_LITTLE)
1249            result = r0 | (r1 << (8 * halfsize));
1250         else
1251            result = r1 | (r0 << (8 * halfsize));
1252      }
1253
1254      /* handle the byte-sized final requests */
1247      /* get the base of memory, aligned to the address minus the lowbits */
1248      if (opcode & 1)
1249         base = (UINT8 *)space.direct().read_decrypted_ptr(address & ~lowmask);
12551250      else
1256      {
1257         /* lowmask specified which address bits are within the databus width */
1258         offs_t lowmask = space->data_width() / 8 - 1;
1251         base = (UINT8 *)space.get_read_ptr(address & ~lowmask);
12591252
1260         /* get the base of memory, aligned to the address minus the lowbits */
1261         if (opcode & 1)
1262            base = (UINT8 *)space->direct().read_decrypted_ptr(address & ~lowmask);
1253      /* if we have a valid base, return the appropriate byte */
1254      if (base != NULL)
1255      {
1256         if (space.endianness() == ENDIANNESS_LITTLE)
1257            result = base[BYTE8_XOR_LE(address) & lowmask];
12631258         else
1264            base = (UINT8 *)space->get_read_ptr(address & ~lowmask);
1265
1266         /* if we have a valid base, return the appropriate byte */
1267         if (base != NULL)
1268         {
1269            if (space->endianness() == ENDIANNESS_LITTLE)
1270               result = base[BYTE8_XOR_LE(address) & lowmask];
1271            else
1272               result = base[BYTE8_XOR_BE(address) & lowmask];
1273         }
1259            result = base[BYTE8_XOR_BE(address) & lowmask];
12741260      }
12751261   }
12761262   return result;
r17963r17964
13491335            device = debug_cpu_get_visible_cpu(machine);
13501336         space = device->memory().space(AS_PROGRAM + (spacenum - EXPSPACE_PROGRAM_LOGICAL));
13511337         if (space != NULL)
1352            debug_write_memory(space, space->address_to_byte(address), data, size, true);
1338            debug_write_memory(*space, space->address_to_byte(address), data, size, true);
13531339         break;
13541340
13551341      case EXPSPACE_PROGRAM_PHYSICAL:
r17963r17964
13621348            device = debug_cpu_get_visible_cpu(machine);
13631349         space = device->memory().space(AS_PROGRAM + (spacenum - EXPSPACE_PROGRAM_PHYSICAL));
13641350         if (space != NULL)
1365            debug_write_memory(space, space->address_to_byte(address), data, size, false);
1351            debug_write_memory(*space, space->address_to_byte(address), data, size, false);
13661352         break;
13671353
13681354      case EXPSPACE_OPCODE:
r17963r17964
13711357            device = expression_get_device(machine, name);
13721358         if (device == NULL)
13731359            device = debug_cpu_get_visible_cpu(machine);
1374         expression_write_program_direct(device->memory().space(AS_PROGRAM), (spacenum == EXPSPACE_OPCODE), address, size, data);
1360         expression_write_program_direct(*device->memory().space(AS_PROGRAM), (spacenum == EXPSPACE_OPCODE), address, size, data);
13751361         break;
13761362
13771363      case EXPSPACE_REGION:
r17963r17964
13911377    directly to an opcode or RAM pointer
13921378-------------------------------------------------*/
13931379
1394static void expression_write_program_direct(address_space *_space, int opcode, offs_t address, int size, UINT64 data)
1380static void expression_write_program_direct(address_space &space, int opcode, offs_t address, int size, UINT64 data)
13951381{
1396   address_space *space = const_cast<address_space *>(_space);
1397   if (space != NULL)
1398   {
1399      debugcpu_private *global = space->machine().debugcpu_data;
1400      UINT8 *base;
1382   debugcpu_private *global = space.machine().debugcpu_data;
1383   UINT8 *base;
14011384
1402      /* adjust the address into a byte address, but not if being called recursively */
1403      if ((opcode & 2) == 0)
1404         address = space->address_to_byte(address);
1385   /* adjust the address into a byte address, but not if being called recursively */
1386   if ((opcode & 2) == 0)
1387      address = space.address_to_byte(address);
14051388
1406      /* call ourself recursively until we are byte-sized */
1407      if (size > 1)
1389   /* call ourself recursively until we are byte-sized */
1390   if (size > 1)
1391   {
1392      int halfsize = size / 2;
1393      UINT64 r0, r1, halfmask;
1394
1395      /* break apart based on the target endianness */
1396      halfmask = ~(UINT64)0 >> (64 - 8 * halfsize);
1397      if (space.endianness() == ENDIANNESS_LITTLE)
14081398      {
1409         int halfsize = size / 2;
1410         UINT64 r0, r1, halfmask;
1399         r0 = data & halfmask;
1400         r1 = (data >> (8 * halfsize)) & halfmask;
1401      }
1402      else
1403      {
1404         r0 = (data >> (8 * halfsize)) & halfmask;
1405         r1 = data & halfmask;
1406      }
14111407
1412         /* break apart based on the target endianness */
1413         halfmask = ~(UINT64)0 >> (64 - 8 * halfsize);
1414         if (space->endianness() == ENDIANNESS_LITTLE)
1415         {
1416            r0 = data & halfmask;
1417            r1 = (data >> (8 * halfsize)) & halfmask;
1418         }
1419         else
1420         {
1421            r0 = (data >> (8 * halfsize)) & halfmask;
1422            r1 = data & halfmask;
1423         }
1408      /* write each half, from lower address to upper address */
1409      expression_write_program_direct(space, opcode | 2, address + 0, halfsize, r0);
1410      expression_write_program_direct(space, opcode | 2, address + halfsize, halfsize, r1);
1411   }
14241412
1425         /* write each half, from lower address to upper address */
1426         expression_write_program_direct(space, opcode | 2, address + 0, halfsize, r0);
1427         expression_write_program_direct(space, opcode | 2, address + halfsize, halfsize, r1);
1428      }
1413   /* handle the byte-sized final case */
1414   else
1415   {
1416      /* lowmask specified which address bits are within the databus width */
1417      offs_t lowmask = space.data_width() / 8 - 1;
14291418
1430      /* handle the byte-sized final case */
1419      /* get the base of memory, aligned to the address minus the lowbits */
1420      if (opcode & 1)
1421         base = (UINT8 *)space.direct().read_decrypted_ptr(address & ~lowmask);
14311422      else
1432      {
1433         /* lowmask specified which address bits are within the databus width */
1434         offs_t lowmask = space->data_width() / 8 - 1;
1423         base = (UINT8 *)space.get_read_ptr(address & ~lowmask);
14351424
1436         /* get the base of memory, aligned to the address minus the lowbits */
1437         if (opcode & 1)
1438            base = (UINT8 *)space->direct().read_decrypted_ptr(address & ~lowmask);
1425      /* if we have a valid base, write the appropriate byte */
1426      if (base != NULL)
1427      {
1428         if (space.endianness() == ENDIANNESS_LITTLE)
1429            base[BYTE8_XOR_LE(address) & lowmask] = data;
14391430         else
1440            base = (UINT8 *)space->get_read_ptr(address & ~lowmask);
1441
1442         /* if we have a valid base, write the appropriate byte */
1443         if (base != NULL)
1444         {
1445            if (space->endianness() == ENDIANNESS_LITTLE)
1446               base[BYTE8_XOR_LE(address) & lowmask] = data;
1447            else
1448               base[BYTE8_XOR_BE(address) & lowmask] = data;
1449            global->memory_modified = true;
1450         }
1431            base[BYTE8_XOR_BE(address) & lowmask] = data;
1432         global->memory_modified = true;
14511433      }
14521434   }
14531435}
r17963r17964
20572039#ifdef MAME_DEBUG
20582040if (m_memory != NULL && m_disasm != NULL)
20592041{
2060   address_space *space = m_memory->space(AS_PROGRAM);
2061   int bytes = space->address_to_byte(result & DASMFLAG_LENGTHMASK);
2042   address_space &space = *m_memory->space(AS_PROGRAM);
2043   int bytes = space.address_to_byte(result & DASMFLAG_LENGTHMASK);
20622044   assert(bytes >= m_disasm->min_opcode_bytes());
20632045   assert(bytes <= m_disasm->max_opcode_bytes());
20642046   (void) bytes; // appease compiler
r17963r17964
26842666      return 0;
26852667
26862668   // no program interface, just fail
2687   address_space *space = m_memory->space(AS_PROGRAM);
2688   if (space == NULL)
2689      return 0;
2669   address_space &space = *m_memory->space(AS_PROGRAM);
26902670
26912671   // zero out the buffers
26922672   UINT8 opbuf[64], argbuf[64];
r17963r17964
27032683
27042684   // disassemble and then convert to bytes
27052685   char buff[256];
2706   int numbytes = disassemble(buff, address & space->logaddrmask(), opbuf, argbuf) & DASMFLAG_LENGTHMASK;
2707   numbytes = space->address_to_byte(numbytes);
2686   int numbytes = disassemble(buff, address & space.logaddrmask(), opbuf, argbuf) & DASMFLAG_LENGTHMASK;
2687   numbytes = space.address_to_byte(numbytes);
27082688
27092689   // return a CRC of the resulting bytes
27102690   return crc32(0, argbuf, numbytes);
r17963r17964
30363016   assert(m_memory != NULL && m_disasm != NULL);
30373017
30383018   // determine the adjusted PC
3039   address_space *space = m_memory->space(AS_PROGRAM);
3040   offs_t pcbyte = space->address_to_byte(pc) & space->bytemask();
3019   address_space &space = *m_memory->space(AS_PROGRAM);
3020   offs_t pcbyte = space.address_to_byte(pc) & space.bytemask();
30413021
30423022   // fetch the bytes up to the maximum
30433023   UINT8 opbuf[64], argbuf[64];
r17963r17964
31003080
31013081UINT64 device_debug::get_logunmap(symbol_table &table, void *ref)
31023082{
3103   address_space *space = reinterpret_cast<address_space *>(table.globalref());
3104   return space->log_unmap();
3083   address_space &space = *reinterpret_cast<address_space *>(table.globalref());
3084   return space.log_unmap();
31053085}
31063086
31073087
r17963r17964
31123092
31133093void device_debug::set_logunmap(symbol_table &table, void *ref, UINT64 value)
31143094{
3115   address_space *space = reinterpret_cast<address_space *>(table.globalref());
3116   space->set_log_unmap(value ? true : false);
3095   address_space &space = *reinterpret_cast<address_space *>(table.globalref());
3096   space.set_log_unmap(value ? true : false);
31173097}
31183098
31193099
trunk/src/emu/debug/dvmemory.c
r17963r17964
627627      {
628628         switch (size)
629629         {
630            case 1:   data = debug_read_byte(source.m_space, offs, !m_no_translation); break;
631            case 2:   data = debug_read_word(source.m_space, offs, !m_no_translation); break;
632            case 4:   data = debug_read_dword(source.m_space, offs, !m_no_translation); break;
633            case 8:   data = debug_read_qword(source.m_space, offs, !m_no_translation); break;
630            case 1:   data = debug_read_byte(*source.m_space, offs, !m_no_translation); break;
631            case 2:   data = debug_read_word(*source.m_space, offs, !m_no_translation); break;
632            case 4:   data = debug_read_dword(*source.m_space, offs, !m_no_translation); break;
633            case 8:   data = debug_read_qword(*source.m_space, offs, !m_no_translation); break;
634634         }
635635      }
636636      return ismapped;
r17963r17964
674674   {
675675      switch (size)
676676      {
677         case 1:   debug_write_byte(source.m_space, offs, data, !m_no_translation); break;
678         case 2:   debug_write_word(source.m_space, offs, data, !m_no_translation); break;
679         case 4:   debug_write_dword(source.m_space, offs, data, !m_no_translation); break;
680         case 8:   debug_write_qword(source.m_space, offs, data, !m_no_translation); break;
677         case 1:   debug_write_byte(*source.m_space, offs, data, !m_no_translation); break;
678         case 2:   debug_write_word(*source.m_space, offs, data, !m_no_translation); break;
679         case 4:   debug_write_dword(*source.m_space, offs, data, !m_no_translation); break;
680         case 8:   debug_write_qword(*source.m_space, offs, data, !m_no_translation); break;
681681      }
682682      return;
683683   }
trunk/src/emu/debug/debugcpu.h
r17963r17964
422422/* ----- debugger memory accessors ----- */
423423
424424/* return the physical address corresponding to the given logical address */
425int debug_cpu_translate(address_space *space, int intention, offs_t *address);
425int debug_cpu_translate(address_space &space, int intention, offs_t *address);
426426
427427/* return a byte from the the specified memory space */
428UINT8 debug_read_byte(address_space *space, offs_t address, int apply_translation);
428UINT8 debug_read_byte(address_space &space, offs_t address, int apply_translation);
429429
430430/* return a word from the the specified memory space */
431UINT16 debug_read_word(address_space *space, offs_t address, int apply_translation);
431UINT16 debug_read_word(address_space &space, offs_t address, int apply_translation);
432432
433433/* return a dword from the the specified memory space */
434UINT32 debug_read_dword(address_space *space, offs_t address, int apply_translation);
434UINT32 debug_read_dword(address_space &space, offs_t address, int apply_translation);
435435
436436/* return a qword from the the specified memory space */
437UINT64 debug_read_qword(address_space *space, offs_t address, int apply_translation);
437UINT64 debug_read_qword(address_space &space, offs_t address, int apply_translation);
438438
439439/* return 1,2,4 or 8 bytes from the specified memory space */
440UINT64 debug_read_memory(address_space *space, offs_t address, int size, int apply_translation);
440UINT64 debug_read_memory(address_space &space, offs_t address, int size, int apply_translation);
441441
442442/* write a byte to the specified memory space */
443void debug_write_byte(address_space *space, offs_t address, UINT8 data, int apply_translation);
443void debug_write_byte(address_space &space, offs_t address, UINT8 data, int apply_translation);
444444
445445/* write a word to the specified memory space */
446void debug_write_word(address_space *space, offs_t address, UINT16 data, int apply_translation);
446void debug_write_word(address_space &space, offs_t address, UINT16 data, int apply_translation);
447447
448448/* write a dword to the specified memory space */
449void debug_write_dword(address_space *space, offs_t address, UINT32 data, int apply_translation);
449void debug_write_dword(address_space &space, offs_t address, UINT32 data, int apply_translation);
450450
451451/* write a qword to the specified memory space */
452void debug_write_qword(address_space *space, offs_t address, UINT64 data, int apply_translation);
452void debug_write_qword(address_space &space, offs_t address, UINT64 data, int apply_translation);
453453
454454/* write 1,2,4 or 8 bytes to the specified memory space */
455void debug_write_memory(address_space *space, offs_t address, UINT64 data, int size, int apply_translation);
455void debug_write_memory(address_space &space, offs_t address, UINT64 data, int size, int apply_translation);
456456
457457/* read 1,2,4 or 8 bytes at the given offset from opcode space */
458UINT64 debug_read_opcode(address_space *space, offs_t offset, int size, int arg);
458UINT64 debug_read_opcode(address_space &space, offs_t offset, int size, int arg);
459459
460460
461461#endif
trunk/src/emu/debug/dvdisasm.c
r17963r17964
263263      while (curpcbyte < fillpcbyte)
264264      {
265265         fillpcbyte--;
266         opbuf[1000 + fillpcbyte - targetpcbyte] = debug_read_opcode(source.m_space, fillpcbyte, 1, FALSE);
267         argbuf[1000 + fillpcbyte - targetpcbyte] = debug_read_opcode(source.m_space, fillpcbyte, 1, TRUE);
266         opbuf[1000 + fillpcbyte - targetpcbyte] = debug_read_opcode(*source.m_space, fillpcbyte, 1, FALSE);
267         argbuf[1000 + fillpcbyte - targetpcbyte] = debug_read_opcode(*source.m_space, fillpcbyte, 1, TRUE);
268268      }
269269
270270      // loop until we get past the target instruction
r17963r17964
278278
279279         // get the disassembly, but only if mapped
280280         instlen = 1;
281         if (debug_cpu_translate(source.m_space, TRANSLATE_FETCH, &physpcbyte))
281         if (debug_cpu_translate(*source.m_space, TRANSLATE_FETCH, &physpcbyte))
282282         {
283283            char dasmbuffer[100];
284284            instlen = source.m_device.debug()->disassemble(dasmbuffer, scanpc, &opbuf[1000 + scanpcbyte - targetpcbyte], &argbuf[1000 + scanpcbyte - targetpcbyte]) & DASMFLAG_LENGTHMASK;
r17963r17964
322322   // output the first value
323323   int offset = 0;
324324   if (maxchars >= char_num * minbytes)
325      offset = sprintf(string, "%s", core_i64_format(debug_read_opcode(source.m_space, pcbyte, minbytes, FALSE), minbytes * char_num, source.is_octal()));
325      offset = sprintf(string, "%s", core_i64_format(debug_read_opcode(*source.m_space, pcbyte, minbytes, FALSE), minbytes * char_num, source.is_octal()));
326326
327327   // output subsequent values
328328   int byte;
329329   for (byte = minbytes; byte < numbytes && offset + 1 + char_num * minbytes < maxchars; byte += minbytes)
330      offset += sprintf(&string[offset], " %s", core_i64_format(debug_read_opcode(source.m_space, pcbyte + byte, minbytes, encrypted), minbytes * char_num, source.is_octal()));
330      offset += sprintf(&string[offset], " %s", core_i64_format(debug_read_opcode(*source.m_space, pcbyte + byte, minbytes, encrypted), minbytes * char_num, source.is_octal()));
331331
332332   // if we ran out of room, indicate more
333333   string[maxchars - 1] = 0;
r17963r17964
407407      char buffer[100];
408408      int numbytes = 0;
409409      offs_t physpcbyte = pcbyte;
410      if (debug_cpu_translate(source.m_space, TRANSLATE_FETCH_DEBUG, &physpcbyte))
410      if (debug_cpu_translate(*source.m_space, TRANSLATE_FETCH_DEBUG, &physpcbyte))
411411      {
412412         UINT8 opbuf[64], argbuf[64];
413413
414414         // fetch the bytes up to the maximum
415415         for (numbytes = 0; numbytes < maxbytes; numbytes++)
416416         {
417            opbuf[numbytes] = debug_read_opcode(source.m_space, pcbyte + numbytes, 1, FALSE);
418            argbuf[numbytes] = debug_read_opcode(source.m_space, pcbyte + numbytes, 1, TRUE);
417            opbuf[numbytes] = debug_read_opcode(*source.m_space, pcbyte + numbytes, 1, FALSE);
418            argbuf[numbytes] = debug_read_opcode(*source.m_space, pcbyte + numbytes, 1, TRUE);
419419         }
420420
421421         // disassemble the result
trunk/src/emu/debug/debugcmd.c
r17963r17964
159159    given address is valid for cheating
160160-------------------------------------------------*/
161161
162INLINE int cheat_address_is_valid(address_space *space, offs_t address)
162INLINE int cheat_address_is_valid(address_space &space, offs_t address)
163163{
164   return debug_cpu_translate(space, TRANSLATE_READ, &address) && (space->get_write_ptr(address) != NULL);
164   return debug_cpu_translate(space, TRANSLATE_READ, &address) && (space.get_write_ptr(address) != NULL);
165165}
166166
167167
r17963r17964
208208    and swapping if necessary
209209-------------------------------------------------*/
210210
211INLINE UINT64 cheat_read_extended(const cheat_system *cheatsys, address_space *space, offs_t address)
211INLINE UINT64 cheat_read_extended(const cheat_system *cheatsys, address_space &space, offs_t address)
212212{
213213   return cheat_sign_extend(cheatsys, cheat_byte_swap(cheatsys, debug_read_memory(space, address, cheatsys->width, TRUE)));
214214}
r17963r17964
557557    address space
558558-------------------------------------------------*/
559559
560int debug_command_parameter_cpu_space(running_machine &machine, const char *param, int spacenum, address_space **result)
560int debug_command_parameter_cpu_space(running_machine &machine, const char *param, int spacenum, address_space *&result)
561561{
562562   device_t *cpu;
563563
r17963r17964
566566      return FALSE;
567567
568568   /* fetch the space pointer */
569   *result = cpu->memory().space(spacenum);
570   if (*result == NULL)
569   result = cpu->memory().space(spacenum);
570   if (result == NULL)
571571   {
572572      debug_console_printf(machine, "No matching memory space found for CPU '%s'\n", cpu->tag());
573573      return FALSE;
r17963r17964
13211321   int wpnum;
13221322
13231323   /* CPU is implicit */
1324   if (!debug_command_parameter_cpu_space(machine, NULL, ref, &space))
1324   if (!debug_command_parameter_cpu_space(machine, NULL, ref, space))
13251325      return;
13261326
13271327   /* param 1 is the address */
r17963r17964
15361536      return;
15371537   if (!debug_command_parameter_number(machine, param[2], &length))
15381538      return;
1539   if (!debug_command_parameter_cpu_space(machine, (params > 3) ? param[3] : NULL, ref, &space))
1539   if (!debug_command_parameter_cpu_space(machine, (params > 3) ? param[3] : NULL, ref, space))
15401540      return;
15411541
15421542   /* determine the addresses to write */
r17963r17964
15541554   /* now write the data out */
15551555   for (i = offset; i <= endoffset; i++)
15561556   {
1557      UINT8 byte = debug_read_byte(space, i, TRUE);
1557      UINT8 byte = debug_read_byte(*space, i, TRUE);
15581558      fwrite(&byte, 1, 1, f);
15591559   }
15601560
r17963r17964
15801580      return;
15811581   if (!debug_command_parameter_number(machine, param[2], &length))
15821582      return;
1583   if (!debug_command_parameter_cpu_space(machine, (params > 3) ? param[3] : NULL, ref, &space))
1583   if (!debug_command_parameter_cpu_space(machine, (params > 3) ? param[3] : NULL, ref, space))
15841584      return;
15851585
15861586   /* determine the addresses to read */
r17963r17964
16031603      /* check if end of file has been reached and stop loading if it has */
16041604      if (feof(f))
16051605         break;
1606      debug_write_byte(space, i, byte, TRUE);
1606      debug_write_byte(*space, i, byte, TRUE);
16071607   }
16081608   /* close the file */
16091609   fclose(f);
r17963r17964
16341634      return;
16351635   if (!debug_command_parameter_number(machine, param[4], &ascii))
16361636      return;
1637   if (!debug_command_parameter_cpu_space(machine, (params > 5) ? param[5] : NULL, ref, &space))
1637   if (!debug_command_parameter_cpu_space(machine, (params > 5) ? param[5] : NULL, ref, space))
16381638      return;
16391639
16401640   /* further validation */
r17963r17964
16731673         if (i + j <= endoffset)
16741674         {
16751675            offs_t curaddr = i + j;
1676            if (debug_cpu_translate(space, TRANSLATE_READ_DEBUG, &curaddr))
1676            if (debug_cpu_translate(*space, TRANSLATE_READ_DEBUG, &curaddr))
16771677            {
1678               UINT64 value = debug_read_memory(space, i + j, width, TRUE);
1678               UINT64 value = debug_read_memory(*space, i + j, width, TRUE);
16791679               outdex += sprintf(&output[outdex], " %s", core_i64_hex_format(value, width * 2));
16801680            }
16811681            else
r17963r17964
16921692         for (j = 0; j < 16 && (i + j) <= endoffset; j++)
16931693         {
16941694            offs_t curaddr = i + j;
1695            if (debug_cpu_translate(space, TRANSLATE_READ_DEBUG, &curaddr))
1695            if (debug_cpu_translate(*space, TRANSLATE_READ_DEBUG, &curaddr))
16961696            {
1697               UINT8 byte = debug_read_byte(space, i + j, TRUE);
1697               UINT8 byte = debug_read_byte(*space, i + j, TRUE);
16981698               outdex += sprintf(&output[outdex], "%c", (byte >= 32 && byte < 127) ? byte : '.');
16991699            }
17001700            else
r17963r17964
17301730   memset(cheat_region, 0, sizeof(cheat_region));
17311731
17321732   /* validate parameters */
1733   if (!debug_command_parameter_cpu_space(machine, (params > 3) ? param[3] : NULL, AS_PROGRAM, &space))
1733   if (!debug_command_parameter_cpu_space(machine, (params > 3) ? param[3] : NULL, AS_PROGRAM, space))
17341734      return;
17351735
17361736   if (ref == 0)
r17963r17964
18151815   for (i = 0; i <= region_count; i++)
18161816      if (!cheat_region[i].disabled)
18171817         for (curaddr = cheat_region[i].offset; curaddr <= cheat_region[i].endoffset; curaddr += cheat.width)
1818            if (cheat_address_is_valid(space, curaddr))
1818            if (cheat_address_is_valid(*space, curaddr))
18191819               real_length++;
18201820
18211821   if (real_length == 0)
r17963r17964
18441844         return;
18451845      }
18461846
1847      if (!debug_command_parameter_cpu_space(machine, &cheat.cpu, AS_PROGRAM, &space))
1847      if (!debug_command_parameter_cpu_space(machine, &cheat.cpu, AS_PROGRAM, space))
18481848         return;
18491849
18501850      cheat_map *newmap = auto_alloc_array(machine, cheat_map, cheat.length + real_length);
r17963r17964
18611861   for (i = 0; i < region_count; i++)
18621862      if (!cheat_region[i].disabled)
18631863         for (curaddr = cheat_region[i].offset; curaddr <= cheat_region[i].endoffset; curaddr += cheat.width)
1864            if (cheat_address_is_valid(space, curaddr))
1864            if (cheat_address_is_valid(*space, curaddr))
18651865            {
1866               cheat.cheatmap[active_cheat].previous_value = cheat_read_extended(&cheat, space, curaddr);
1866               cheat.cheatmap[active_cheat].previous_value = cheat_read_extended(&cheat, *space, curaddr);
18671867               cheat.cheatmap[active_cheat].first_value = cheat.cheatmap[active_cheat].previous_value;
18681868               cheat.cheatmap[active_cheat].offset = curaddr;
18691869               cheat.cheatmap[active_cheat].state = 1;
r17963r17964
19111911      return;
19121912   }
19131913
1914   if (!debug_command_parameter_cpu_space(machine, &cheat.cpu, AS_PROGRAM, &space))
1914   if (!debug_command_parameter_cpu_space(machine, &cheat.cpu, AS_PROGRAM, space))
19151915      return;
19161916
19171917   if (params > 1 && !debug_command_parameter_number(machine, param[1], &comp_value))
r17963r17964
19511951   for (cheatindex = 0; cheatindex < cheat.length; cheatindex += 1)
19521952      if (cheat.cheatmap[cheatindex].state == 1)
19531953      {
1954         UINT64 cheat_value = cheat_read_extended(&cheat, space, cheat.cheatmap[cheatindex].offset);
1954         UINT64 cheat_value = cheat_read_extended(&cheat, *space, cheat.cheatmap[cheatindex].offset);
19551955         UINT64 comp_byte = (ref == 0) ? cheat.cheatmap[cheatindex].previous_value : cheat.cheatmap[cheatindex].first_value;
19561956         UINT8 disable_byte = FALSE;
19571957
r17963r17964
20662066   UINT64 sizemask;
20672067   FILE *f = NULL;
20682068
2069   if (!debug_command_parameter_cpu_space(machine, &cheat.cpu, AS_PROGRAM, &space))
2069   if (!debug_command_parameter_cpu_space(machine, &cheat.cpu, AS_PROGRAM, space))
20702070      return;
20712071
20722072   if (!debug_command_parameter_cpu(machine, &cheat.cpu, &cpu))
r17963r17964
20972097   {
20982098      if (cheat.cheatmap[cheatindex].state == 1)
20992099      {
2100         UINT64 value = cheat_byte_swap(&cheat, cheat_read_extended(&cheat, space, cheat.cheatmap[cheatindex].offset)) & sizemask;
2100         UINT64 value = cheat_byte_swap(&cheat, cheat_read_extended(&cheat, *space, cheat.cheatmap[cheatindex].offset)) & sizemask;
21012101         offs_t address = space->byte_to_address(cheat.cheatmap[cheatindex].offset);
21022102
21032103         if (params > 0)
r17963r17964
21672167      return;
21682168   if (!debug_command_parameter_number(machine, param[1], &length))
21692169      return;
2170   if (!debug_command_parameter_cpu_space(machine, NULL, ref, &space))
2170   if (!debug_command_parameter_cpu_space(machine, NULL, ref, space))
21712171      return;
21722172
21732173   /* further validation */
r17963r17964
22232223      {
22242224         switch (data_size[j])
22252225         {
2226            case 1:   match = ((UINT8)debug_read_byte(space, i + suboffset, TRUE) == (UINT8)data_to_find[j]);   break;
2227            case 2:   match = ((UINT16)debug_read_word(space, i + suboffset, TRUE) == (UINT16)data_to_find[j]);   break;
2228            case 4:   match = ((UINT32)debug_read_dword(space, i + suboffset, TRUE) == (UINT32)data_to_find[j]);   break;
2229            case 8:   match = ((UINT64)debug_read_qword(space, i + suboffset, TRUE) == (UINT64)data_to_find[j]);   break;
2226            case 1:   match = ((UINT8)debug_read_byte(*space, i + suboffset, TRUE) == (UINT8)data_to_find[j]);   break;
2227            case 2:   match = ((UINT16)debug_read_word(*space, i + suboffset, TRUE) == (UINT16)data_to_find[j]);   break;
2228            case 4:   match = ((UINT32)debug_read_dword(*space, i + suboffset, TRUE) == (UINT32)data_to_find[j]);   break;
2229            case 8:   match = ((UINT64)debug_read_qword(*space, i + suboffset, TRUE) == (UINT64)data_to_find[j]);   break;
22302230            default:   /* all other cases are wildcards */      break;
22312231         }
22322232         suboffset += data_size[j] & 0x0f;
r17963r17964
22652265      return;
22662266   if (!debug_command_parameter_number(machine, param[3], &bytes))
22672267      return;
2268   if (!debug_command_parameter_cpu_space(machine, (params > 4) ? param[4] : NULL, AS_PROGRAM, &space))
2268   if (!debug_command_parameter_cpu_space(machine, (params > 4) ? param[4] : NULL, AS_PROGRAM, space))
22692269      return;
22702270
22712271   /* determine the width of the bytes */
r17963r17964
23022302
23032303      /* make sure we can translate the address */
23042304      tempaddr = pcbyte;
2305      if (debug_cpu_translate(space, TRANSLATE_FETCH_DEBUG, &tempaddr))
2305      if (debug_cpu_translate(*space, TRANSLATE_FETCH_DEBUG, &tempaddr))
23062306      {
23072307         UINT8 opbuf[64], argbuf[64];
23082308
23092309         /* fetch the bytes up to the maximum */
23102310         for (numbytes = 0; numbytes < maxbytes; numbytes++)
23112311         {
2312            opbuf[numbytes] = debug_read_opcode(space, pcbyte + numbytes, 1, FALSE);
2313            argbuf[numbytes] = debug_read_opcode(space, pcbyte + numbytes, 1, TRUE);
2312            opbuf[numbytes] = debug_read_opcode(*space, pcbyte + numbytes, 1, FALSE);
2313            argbuf[numbytes] = debug_read_opcode(*space, pcbyte + numbytes, 1, TRUE);
23142314         }
23152315
23162316         /* disassemble the result */
r17963r17964
23232323         int startdex = outdex;
23242324         numbytes = space->address_to_byte(numbytes);
23252325         for (j = 0; j < numbytes; j += minbytes)
2326            outdex += sprintf(&output[outdex], "%s ", core_i64_hex_format(debug_read_opcode(space, pcbyte + j, minbytes, FALSE), minbytes * 2));
2326            outdex += sprintf(&output[outdex], "%s ", core_i64_hex_format(debug_read_opcode(*space, pcbyte + j, minbytes, FALSE), minbytes * 2));
23272327         if (outdex - startdex < byteswidth)
23282328            outdex += sprintf(&output[outdex], "%*s", byteswidth - (outdex - startdex), "");
23292329         outdex += sprintf(&output[outdex], "  ");
r17963r17964
24492449{
24502450   /* validate parameters */
24512451   address_space *space;
2452   if (!debug_command_parameter_cpu_space(machine, (params > 0) ? param[0] : NULL, AS_PROGRAM, &space))
2452   if (!debug_command_parameter_cpu_space(machine, (params > 0) ? param[0] : NULL, AS_PROGRAM, space))
24532453      return;
24542454
24552455   UINT64 count = device_debug::HISTORY_SIZE;
r17963r17964
24732473      UINT8 opbuf[64], argbuf[64];
24742474      for (int numbytes = 0; numbytes < maxbytes; numbytes++)
24752475      {
2476         opbuf[numbytes] = debug_read_opcode(space, pcbyte + numbytes, 1, false);
2477         argbuf[numbytes] = debug_read_opcode(space, pcbyte + numbytes, 1, true);
2476         opbuf[numbytes] = debug_read_opcode(*space, pcbyte + numbytes, 1, false);
2477         argbuf[numbytes] = debug_read_opcode(*space, pcbyte + numbytes, 1, true);
24782478      }
24792479
24802480      char buffer[200];
r17963r17964
25572557      return;
25582558
25592559   /* CPU is implicit */
2560   if (!debug_command_parameter_cpu_space(machine, NULL, ref, &space))
2560   if (!debug_command_parameter_cpu_space(machine, NULL, ref, space))
25612561      return;
25622562
25632563   /* do the translation first */
r17963r17964
25652565   {
25662566      static const char *const intnames[] = { "Read", "Write", "Fetch" };
25672567      taddress = space->address_to_byte(address) & space->bytemask();
2568      if (debug_cpu_translate(space, intention, &taddress))
2568      if (debug_cpu_translate(*space, intention, &taddress))
25692569      {
2570         const char *mapname = const_cast<address_space *>(space)->get_handler_string((intention == TRANSLATE_WRITE_DEBUG) ? ROW_WRITE : ROW_READ, taddress);
2570         const char *mapname = space->get_handler_string((intention == TRANSLATE_WRITE_DEBUG) ? ROW_WRITE : ROW_READ, taddress);
25712571         debug_console_printf(machine, "%7s: %s logical == %s physical -> %s\n", intnames[intention & 3], core_i64_hex_format(address, space->logaddrchars()), core_i64_hex_format(space->byte_to_address(taddress), space->addrchars()), mapname);
25722572      }
25732573      else
trunk/src/emu/cpu/lh5801/5801tbl.c
r17963r17964
3535   cpustate->a=lh5801_add_generic(cpustate,cpustate->a,data,cpustate->t&C);
3636}
3737
38INLINE void lh5801_add_mem(lh5801_state *cpustate, address_space *space, int addr, UINT8 data)
38INLINE void lh5801_add_mem(lh5801_state *cpustate, address_space &space, int addr, UINT8 data)
3939{
40   int v=lh5801_add_generic(cpustate, space->read_byte(addr),data,0);
41   space->write_byte(addr,v);
40   int v=lh5801_add_generic(cpustate, space.read_byte(addr),data,0);
41   space.write_byte(addr,v);
4242}
4343
4444INLINE void lh5801_adr(lh5801_state *cpustate, PAIR *reg)
r17963r17964
9595   if (!cpustate->a) cpustate->t|=Z;
9696}
9797
98INLINE void lh5801_and_mem(lh5801_state *cpustate, address_space *space, int addr, UINT8 data)
98INLINE void lh5801_and_mem(lh5801_state *cpustate, address_space &space, int addr, UINT8 data)
9999{
100   data&=space->read_byte(addr);
100   data&=space.read_byte(addr);
101101   cpustate->t&=~Z;
102102   if (!data) cpustate->t|=Z;
103   space->write_byte(addr,data);
103   space.write_byte(addr,data);
104104}
105105
106106INLINE void lh5801_bit(lh5801_state *cpustate, UINT8 a, UINT8 b)
r17963r17964
123123   if (!cpustate->a) cpustate->t|=Z;
124124}
125125
126INLINE void lh5801_ora_mem(lh5801_state *cpustate, address_space *space, int addr, UINT8 data)
126INLINE void lh5801_ora_mem(lh5801_state *cpustate, address_space &space, int addr, UINT8 data)
127127{
128   data|=space->read_byte(addr);
128   data|=space.read_byte(addr);
129129   cpustate->t&=~Z;
130130   if (!data) cpustate->t|=Z;
131   space->write_byte(addr,data);
131   space.write_byte(addr,data);
132132}
133133
134134INLINE void lh5801_lda(lh5801_state *cpustate, UINT8 data)
r17963r17964
270270   // flags?
271271}
272272
273INLINE void lh5801_drl(lh5801_state *cpustate, address_space *space, int adr)
273INLINE void lh5801_drl(lh5801_state *cpustate, address_space &space, int adr)
274274{
275   UINT16 t=cpustate->a|(space->read_byte(adr)<<8);
275   UINT16 t=cpustate->a|(space.read_byte(adr)<<8);
276276
277277   cpustate->a=t>>8;
278   space->write_byte(adr,t>>4);
278   space.write_byte(adr,t>>4);
279279}
280280
281INLINE void lh5801_drr(lh5801_state *cpustate, address_space *space, int adr)
281INLINE void lh5801_drr(lh5801_state *cpustate, address_space &space, int adr)
282282{
283   UINT16 t=space->read_byte(adr)|(cpustate->a<<8);
283   UINT16 t=space.read_byte(adr)|(cpustate->a<<8);
284284
285285   cpustate->a=t;
286   space->write_byte(adr,t>>4);
286   space.write_byte(adr,t>>4);
287287}
288288
289289INLINE void lh5801_rol(lh5801_state *cpustate)
r17963r17964
398398   case 0x40: lh5801_inc(cpustate,&XH);cpustate->icount-=9;break;
399399   case 0x42: lh5801_dec(cpustate,&XH);cpustate->icount-=9;break;
400400   case 0x48: X=S;cpustate->icount-=11;break;
401   case 0x49: lh5801_and_mem(cpustate, cpustate->io, X, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
401   case 0x49: lh5801_and_mem(cpustate, *cpustate->io, X, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
402402   case 0x4a: X=X;cpustate->icount-=11;break; //!!!
403   case 0x4b: lh5801_ora_mem(cpustate, cpustate->io, X, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
403   case 0x4b: lh5801_ora_mem(cpustate, *cpustate->io, X, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
404404   case 0x4c: cpustate->bf=0;/*off !*/ cpustate->icount-=8;break;
405405   case 0x4d: lh5801_bit(cpustate,cpustate->io->read_byte(X), cpustate->direct->read_decrypted_byte(P++));cpustate->icount-=14;break;
406406   case 0x4e: S=X;cpustate->icount-=11;break;
407   case 0x4f: lh5801_add_mem(cpustate, cpustate->io, X, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
407   case 0x4f: lh5801_add_mem(cpustate, *cpustate->io, X, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
408408   case 0x50: lh5801_inc(cpustate,&YH);cpustate->icount-=9;break;
409409   case 0x52: lh5801_dec(cpustate,&YH);cpustate->icount-=9;break;
410410   case 0x58: X=P;cpustate->icount-=11;break;
411   case 0x59: lh5801_and_mem(cpustate, cpustate->io, Y, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
411   case 0x59: lh5801_and_mem(cpustate, *cpustate->io, Y, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
412412   case 0x5a: Y=X;cpustate->icount-=11;break;
413   case 0x5b: lh5801_ora_mem(cpustate, cpustate->io, Y, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
413   case 0x5b: lh5801_ora_mem(cpustate, *cpustate->io, Y, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
414414   case 0x5d: lh5801_bit(cpustate,cpustate->io->read_byte(Y), cpustate->direct->read_decrypted_byte(P++));cpustate->icount-=14;break;
415415   case 0x5e: lh5801_jmp(cpustate,X);cpustate->icount-=11;break; // P=X
416   case 0x5f: lh5801_add_mem(cpustate, cpustate->io, Y, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
416   case 0x5f: lh5801_add_mem(cpustate, *cpustate->io, Y, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
417417   case 0x60: lh5801_inc(cpustate,&UH);cpustate->icount-=9;break;
418418   case 0x62: lh5801_dec(cpustate,&UH);cpustate->icount-=9;break;
419   case 0x69: lh5801_and_mem(cpustate, cpustate->io, U, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
419   case 0x69: lh5801_and_mem(cpustate, *cpustate->io, U, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
420420   case 0x6a: U=X;cpustate->icount-=11;break;
421   case 0x6b: lh5801_ora_mem(cpustate, cpustate->io, U, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
421   case 0x6b: lh5801_ora_mem(cpustate, *cpustate->io, U, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
422422   case 0x6d: lh5801_bit(cpustate,cpustate->io->read_byte(X), cpustate->direct->read_decrypted_byte(P++));cpustate->icount-=14;break;
423   case 0x6f: lh5801_add_mem(cpustate, cpustate->io, U, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
423   case 0x6f: lh5801_add_mem(cpustate, *cpustate->io, U, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=17;break;
424424   case 0x81: cpustate->t|=IE; /*sie !*/cpustate->icount-=8;break;
425425   case 0x88: lh5801_push_word(cpustate,X); cpustate->icount-=14;break;
426426   case 0x8a: lh5801_pop(cpustate); cpustate->icount-=12; break;
r17963r17964
449449   case 0xca: lh5801_adr(cpustate,&cpustate->x);cpustate->icount-=11;break;
450450   case 0xcc: /*atp sends a to data bus*/cpustate->icount-=9;break;
451451   case 0xce: lh5801_am(cpustate,cpustate->a); cpustate->icount-=9; break;
452   case 0xd3: lh5801_drr(cpustate, cpustate->io, X); cpustate->icount-=16; break;
453   case 0xd7: lh5801_drl(cpustate, cpustate->io, X); cpustate->icount-=16; break;
452   case 0xd3: lh5801_drr(cpustate, *cpustate->io, X); cpustate->icount-=16; break;
453   case 0xd7: lh5801_drl(cpustate, *cpustate->io, X); cpustate->icount-=16; break;
454454   case 0xda: lh5801_adr(cpustate,&cpustate->y);cpustate->icount-=11;break;
455455   case 0xde: lh5801_am(cpustate,cpustate->a|0x100); cpustate->icount-=9; break;
456456   case 0xea: lh5801_adr(cpustate,&cpustate->u);cpustate->icount-=11;break;
457457   case 0xe9:
458458      adr=lh5801_readop_word(cpustate);
459      lh5801_and_mem(cpustate, cpustate->io, adr, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=23;
459      lh5801_and_mem(cpustate, *cpustate->io, adr, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=23;
460460      break;
461461   case 0xeb:
462462      adr=lh5801_readop_word(cpustate);
463      lh5801_ora_mem(cpustate, cpustate->io, adr, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=23;
463      lh5801_ora_mem(cpustate, *cpustate->io, adr, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=23;
464464      break;
465465   case 0xec: cpustate->t=cpustate->a; cpustate->icount-=9;break;
466466   case 0xed:
r17963r17964
469469      cpustate->icount-=20;break;
470470   case 0xef:
471471      adr=lh5801_readop_word(cpustate);
472      lh5801_add_mem(cpustate, cpustate->io, adr, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=23;
472      lh5801_add_mem(cpustate, *cpustate->io, adr, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=23;
473473      break;
474474
475475   default:
r17963r17964
542542   case 0x46: X--;cpustate->icount-=5;break;
543543   case 0x47: lh5801_lde(cpustate,&cpustate->x);cpustate->icount-=6;break;
544544   case 0x48: XH=cpustate->direct->read_decrypted_byte(P++);cpustate->icount-=6;break;
545   case 0x49: lh5801_and_mem(cpustate, cpustate->program, X, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
545   case 0x49: lh5801_and_mem(cpustate, *cpustate->program, X, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
546546   case 0x4a: XL=cpustate->direct->read_decrypted_byte(P++);cpustate->icount-=6;break;
547   case 0x4b: lh5801_ora_mem(cpustate, cpustate->program, X, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
547   case 0x4b: lh5801_ora_mem(cpustate, *cpustate->program, X, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
548548   case 0x4c: lh5801_cpa(cpustate,XH, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=7;break;
549549   case 0x4d: lh5801_bit(cpustate,cpustate->program->read_byte(X), cpustate->direct->read_decrypted_byte(P++));cpustate->icount-=10;break;
550550   case 0x4e: lh5801_cpa(cpustate,XL, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=7;break;
551   case 0x4f: lh5801_add_mem(cpustate, cpustate->program, X, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
551   case 0x4f: lh5801_add_mem(cpustate, *cpustate->program, X, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
552552   case 0x50: lh5801_inc(cpustate,&YL);cpustate->icount-=5;break;
553553   case 0x51: lh5801_sin(cpustate,&cpustate->y); cpustate->icount-=6;break;
554554   case 0x52: lh5801_dec(cpustate,&YL);cpustate->icount-=5;break;
r17963r17964
558558   case 0x56: Y--;cpustate->icount-=5;break;
559559   case 0x57: lh5801_lde(cpustate,&cpustate->y);cpustate->icount-=6;break;
560560   case 0x58: YH=cpustate->direct->read_decrypted_byte(P++);cpustate->icount-=6;break;
561   case 0x59: lh5801_and_mem(cpustate, cpustate->program, Y, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
561   case 0x59: lh5801_and_mem(cpustate, *cpustate->program, Y, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
562562   case 0x5a: YL=cpustate->direct->read_decrypted_byte(P++);cpustate->icount-=6;break;
563   case 0x5b: lh5801_ora_mem(cpustate, cpustate->program, Y, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
563   case 0x5b: lh5801_ora_mem(cpustate, *cpustate->program, Y, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
564564   case 0x5c: lh5801_cpa(cpustate,YH, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=7;break;
565565   case 0x5d: lh5801_bit(cpustate,cpustate->program->read_byte(Y), cpustate->direct->read_decrypted_byte(P++));cpustate->icount-=10;break;
566566   case 0x5e: lh5801_cpa(cpustate,YL, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=7;break;
567   case 0x5f: lh5801_add_mem(cpustate, cpustate->program, Y, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
567   case 0x5f: lh5801_add_mem(cpustate, *cpustate->program, Y, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
568568   case 0x60: lh5801_inc(cpustate,&UL);cpustate->icount-=5;break;
569569   case 0x61: lh5801_sin(cpustate,&cpustate->u); cpustate->icount-=6;break;
570570   case 0x62: lh5801_dec(cpustate,&UL);cpustate->icount-=5;break;
r17963r17964
574574   case 0x66: U--;cpustate->icount-=5;break;
575575   case 0x67: lh5801_lde(cpustate,&cpustate->u);cpustate->icount-=6;break;
576576   case 0x68: UH=cpustate->direct->read_decrypted_byte(P++);cpustate->icount-=6;break;
577   case 0x69: lh5801_and_mem(cpustate, cpustate->program, U, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
577   case 0x69: lh5801_and_mem(cpustate, *cpustate->program, U, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
578578   case 0x6a: UL=cpustate->direct->read_decrypted_byte(P++);cpustate->icount-=6;break;
579   case 0x6b: lh5801_ora_mem(cpustate, cpustate->program, U, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
579   case 0x6b: lh5801_ora_mem(cpustate, *cpustate->program, U, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
580580   case 0x6c: lh5801_cpa(cpustate,UH, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=7;break;
581581   case 0x6d: lh5801_bit(cpustate,cpustate->program->read_byte(U), cpustate->direct->read_decrypted_byte(P++));cpustate->icount-=10;break;
582582   case 0x6e: lh5801_cpa(cpustate,UL, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=7;break;
583   case 0x6f: lh5801_add_mem(cpustate, cpustate->program, U, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
583   case 0x6f: lh5801_add_mem(cpustate, *cpustate->program, U, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=13;break;
584584   case 0x80: lh5801_sbc(cpustate,XH); cpustate->icount-=6;break;
585585   case 0x81: lh5801_branch_plus(cpustate,!(cpustate->t&C)); cpustate->icount-=8; break;
586586   case 0x82: lh5801_adc(cpustate,XH); cpustate->icount-=6;break;
r17963r17964
648648   case 0xcd: lh5801_vector(cpustate,1, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=7;break;
649649   case 0xcf: lh5801_vector(cpustate,cpustate->t&V, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=8;break;
650650   case 0xd1: lh5801_ror(cpustate); cpustate->icount-=6; break;
651   case 0xd3: lh5801_drr(cpustate, cpustate->program, X); cpustate->icount-=12; break;
651   case 0xd3: lh5801_drr(cpustate, *cpustate->program, X); cpustate->icount-=12; break;
652652   case 0xd5: lh5801_shr(cpustate); cpustate->icount-=6; break;
653   case 0xd7: lh5801_drl(cpustate, cpustate->program, X); cpustate->icount-=12; break;
653   case 0xd7: lh5801_drl(cpustate, *cpustate->program, X); cpustate->icount-=12; break;
654654   case 0xd9: lh5801_shl(cpustate); cpustate->icount-=6; break;
655655   case 0xdb: lh5801_rol(cpustate); cpustate->icount-=6; break;
656656   case 0xdd: lh5801_inc(cpustate,&cpustate->a);cpustate->icount-=5;break;
r17963r17964
658658   case 0xe1: cpustate->pu=1;/*spu!*/ cpustate->icount-=4; break;
659659   case 0xe3: cpustate->pu=0;/*rpu!*/ cpustate->icount-=4; break;
660660   case 0xe9:
661      adr=lh5801_readop_word(cpustate);lh5801_and_mem(cpustate, cpustate->program, adr, cpustate->direct->read_decrypted_byte(P++));
661      adr=lh5801_readop_word(cpustate);lh5801_and_mem(cpustate, *cpustate->program, adr, cpustate->direct->read_decrypted_byte(P++));
662662      cpustate->icount-=19;break;
663663   case 0xeb:
664      adr=lh5801_readop_word(cpustate);lh5801_ora_mem(cpustate, cpustate->program, adr, cpustate->direct->read_decrypted_byte(P++));
664      adr=lh5801_readop_word(cpustate);lh5801_ora_mem(cpustate, *cpustate->program, adr, cpustate->direct->read_decrypted_byte(P++));
665665      cpustate->icount-=19;break;
666666   case 0xed:
667667      adr=lh5801_readop_word(cpustate);lh5801_bit(cpustate,cpustate->program->read_byte(adr), cpustate->direct->read_decrypted_byte(P++));
668668      cpustate->icount-=16;break;
669669   case 0xef:
670670      adr=lh5801_readop_word(cpustate);
671      lh5801_add_mem(cpustate, cpustate->program, adr, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=19;
671      lh5801_add_mem(cpustate, *cpustate->program, adr, cpustate->direct->read_decrypted_byte(P++)); cpustate->icount-=19;
672672      break;
673673   case 0xf1: lh5801_aex(cpustate); cpustate->icount-=6; break;
674674   case 0xf5: cpustate->program->write_byte(Y++, cpustate->program->read_byte(X++)); cpustate->icount-=7; break; //tin
trunk/src/emu/cpu/h83002/h8_16.c
r17963r17964
536536
537537static READ16_HANDLER( h8_itu_r )
538538{
539   h83xx_state *h8 = get_safe_token(&space->device());
539   h83xx_state *h8 = get_safe_token(&space.device());
540540
541541   if (mem_mask == 0xffff)
542542   {
r17963r17964
557557
558558static WRITE16_HANDLER( h8_itu_w )
559559{
560   h83xx_state *h8 = get_safe_token(&space->device());
560   h83xx_state *h8 = get_safe_token(&space.device());
561561
562562   if (mem_mask == 0xffff)
563563   {
r17963r17964
577577
578578static READ16_HANDLER( h8_3007_itu_r )
579579{
580   h83xx_state *h8 = get_safe_token(&space->device());
580   h83xx_state *h8 = get_safe_token(&space.device());
581581
582582   if (mem_mask == 0xffff)
583583   {
r17963r17964
597597}
598598static WRITE16_HANDLER( h8_3007_itu_w )
599599{
600   h83xx_state *h8 = get_safe_token(&space->device());
600   h83xx_state *h8 = get_safe_token(&space.device());
601601
602602   if (mem_mask == 0xffff)
603603   {
r17963r17964
617617
618618static READ16_HANDLER( h8_3007_itu1_r )
619619{
620   h83xx_state *h8 = get_safe_token(&space->device());
620   h83xx_state *h8 = get_safe_token(&space.device());
621621
622622   if (mem_mask == 0xffff)
623623   {
r17963r17964
637637}
638638static WRITE16_HANDLER( h8_3007_itu1_w )
639639{
640   h83xx_state *h8 = get_safe_token(&space->device());
640   h83xx_state *h8 = get_safe_token(&space.device());
641641
642642   if (mem_mask == 0xffff)
643643   {
r17963r17964
657657
658658static WRITE16_HANDLER( h8s2241_per_regs_w )
659659{
660   h83xx_state *h8 = get_safe_token(&space->device());
660   h83xx_state *h8 = get_safe_token(&space.device());
661661   if (mem_mask == 0xffff)
662662   {
663663      h8s2241_per_regs_write_16(h8, (offset << 1), data);
r17963r17964
674674
675675static WRITE16_HANDLER( h8s2246_per_regs_w )
676676{
677   h83xx_state *h8 = get_safe_token(&space->device());
677   h83xx_state *h8 = get_safe_token(&space.device());
678678   if (mem_mask == 0xffff)
679679   {
680680      h8s2246_per_regs_write_16(h8, (offset << 1), data);
r17963r17964
691691
692692static WRITE16_HANDLER( h8s2323_per_regs_w )
693693{
694   h83xx_state *h8 = get_safe_token(&space->device());
694   h83xx_state *h8 = get_safe_token(&space.device());
695695   if (mem_mask == 0xffff)
696696   {
697697      h8s2323_per_regs_write_16(h8, (offset << 1), data);
r17963r17964
708708
709709static WRITE16_HANDLER( h8s2394_per_regs_w )
710710{
711   h83xx_state *h8 = get_safe_token(&space->device());
711   h83xx_state *h8 = get_safe_token(&space.device());
712712   if (mem_mask == 0xffff)
713713   {
714714      h8s2394_per_regs_write_16(h8, (offset << 1), data);
r17963r17964
725725
726726static READ16_HANDLER( h8s2241_per_regs_r )
727727{
728   h83xx_state *h8 = get_safe_token(&space->device());
728   h83xx_state *h8 = get_safe_token(&space.device());
729729   if (mem_mask == 0xffff)
730730   {
731731      return h8s2241_per_regs_read_16(h8, (offset << 1));
r17963r17964
743743
744744static READ16_HANDLER( h8s2246_per_regs_r )
745745{
746   h83xx_state *h8 = get_safe_token(&space->device());
746   h83xx_state *h8 = get_safe_token(&space.device());
747747   if (mem_mask == 0xffff)
748748   {
749749      return h8s2246_per_regs_read_16(h8, (offset << 1));
r17963r17964
761761
762762static READ16_HANDLER( h8s2323_per_regs_r )
763763{
764   h83xx_state *h8 = get_safe_token(&space->device());
764   h83xx_state *h8 = get_safe_token(&space.device());
765765   if (mem_mask == 0xffff)
766766   {
767767      return h8s2323_per_regs_read_16(h8, (offset << 1));
r17963r17964
779779
780780static READ16_HANDLER( h8s2394_per_regs_r )
781781{
782   h83xx_state *h8 = get_safe_token(&space->device());
782   h83xx_state *h8 = get_safe_token(&space.device());
783783   if (mem_mask == 0xffff)
784784   {
785785      return h8s2394_per_regs_read_16(h8, (offset << 1));
trunk/src/emu/cpu/h83002/h8_8.c
r17963r17964
515515   UINT8 reg;
516516   UINT64 frc;
517517   static const UINT64 divider[4] = { 2, 8, 32, 1 };
518   h83xx_state *h8 = get_safe_token(&space->device());
518   h83xx_state *h8 = get_safe_token(&space.device());
519519
520520   reg = (offset + 0x88) & 0xff;
521521
r17963r17964
603603static WRITE8_HANDLER( h8330_itu_w )
604604{
605605   UINT8 reg;
606   h83xx_state *h8 = get_safe_token(&space->device());
606   h83xx_state *h8 = get_safe_token(&space.device());
607607
608608   reg = (offset + 0x88) & 0xff;
609609
trunk/src/emu/cpu/m68000/68340ser.c
r17963r17964
66
77READ32_HANDLER( m68340_internal_serial_r )
88{
9   m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
9   m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
1010   m68340_serial* serial = m68k->m68340SERIAL;
1111   assert(serial != NULL);
1212
1313   if (serial)
1414   {
15      int pc = space->device().safe_pc();
15      int pc = space.device().safe_pc();
1616      logerror("%08x m68340_internal_serial_r %08x, (%08x)\n", pc, offset*4,mem_mask);
1717   }
1818
r17963r17964
2121
2222WRITE32_HANDLER( m68340_internal_serial_w )
2323{
24   m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
24   m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
2525   m68340_serial* serial = m68k->m68340SERIAL;
2626   assert(serial != NULL);
2727
2828   if (serial)
2929   {
30      int pc = space->device().safe_pc();
30      int pc = space.device().safe_pc();
3131      logerror("%08x m68340_internal_serial_w %08x, %08x (%08x)\n", pc, offset*4,data,mem_mask);
3232   }
3333
trunk/src/emu/cpu/m68000/m68000.h
r17963r17964
101101typedef void (*m68k_rte_func)(device_t *device);
102102typedef int (*m68k_tas_func)(device_t *device);
103103
104typedef UINT8 (*m68307_porta_read_callback)(address_space *space, bool dedicated, UINT8 line_mask);
105typedef void (*m68307_porta_write_callback)(address_space *space, bool dedicated, UINT8 data, UINT8 line_mask);
106typedef UINT16 (*m68307_portb_read_callback)(address_space *space, bool dedicated, UINT16 line_mask);
107typedef void (*m68307_portb_write_callback)(address_space *space, bool dedicated, UINT16 data, UINT16 line_mask);
104typedef UINT8 (*m68307_porta_read_callback)(address_space &space, bool dedicated, UINT8 line_mask);
105typedef void (*m68307_porta_write_callback)(address_space &space, bool dedicated, UINT8 data, UINT8 line_mask);
106typedef UINT16 (*m68307_portb_read_callback)(address_space &space, bool dedicated, UINT16 line_mask);
107typedef void (*m68307_portb_write_callback)(address_space &space, bool dedicated, UINT16 data, UINT16 line_mask);
108108
109109
110110
trunk/src/emu/cpu/m68000/68307sim.c
r17963r17964
66
77READ16_HANDLER( m68307_internal_sim_r )
88{
9   m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
9   m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
1010   m68307_sim* sim = m68k->m68307SIM;
1111   assert(sim != NULL);
1212
13   int pc = space->device().safe_pc();
13   int pc = space.device().safe_pc();
1414
1515   if (sim)
1616   {
r17963r17964
4343
4444WRITE16_HANDLER( m68307_internal_sim_w )
4545{
46   m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
46   m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
4747   m68307_sim* sim = m68k->m68307SIM;
4848   assert(sim != NULL);
4949
50   int pc = space->device().safe_pc();
50   int pc = space.device().safe_pc();
5151
5252   if (sim)
5353   {
r17963r17964
150150}
151151
152152
153UINT16 m68307_sim::read_padat(address_space *space, UINT16 mem_mask)
153UINT16 m68307_sim::read_padat(address_space &space, UINT16 mem_mask)
154154{
155   int pc = space->device().safe_pc();
156   m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
155   int pc = space.device().safe_pc();
156   m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
157157
158158   if (m68k->m_m68307_porta_r)
159159   {
r17963r17964
177177}
178178
179179
180void m68307_sim::write_padat(address_space *space, UINT16 data, UINT16 mem_mask)
180void m68307_sim::write_padat(address_space &space, UINT16 data, UINT16 mem_mask)
181181{
182   int pc = space->device().safe_pc();
183   m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
182   int pc = space.device().safe_pc();
183   m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
184184   COMBINE_DATA(&m_padat);
185185
186186   if (m68k->m_m68307_porta_w)
r17963r17964
203203   COMBINE_DATA(&m_pbddr);
204204}
205205
206UINT16 m68307_sim::read_pbdat(address_space *space, UINT16 mem_mask)
206UINT16 m68307_sim::read_pbdat(address_space &space, UINT16 mem_mask)
207207{
208   int pc = space->device().safe_pc();
209   m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
208   int pc = space.device().safe_pc();
209   m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
210210
211211   if (m68k->m_m68307_portb_r)
212212   {
r17963r17964
230230}
231231
232232
233void m68307_sim::write_pbdat(address_space *space, UINT16 data, UINT16 mem_mask)
233void m68307_sim::write_pbdat(address_space &space, UINT16 data, UINT16 mem_mask)
234234{
235   int pc = space->device().safe_pc();
236   m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
235   int pc = space.device().safe_pc();
236   m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
237237   COMBINE_DATA(&m_pbdat);
238238
239239   if (m68k->m_m68307_portb_w)
trunk/src/emu/cpu/m68000/68307bus.c
r17963r17964
77
88READ8_HANDLER( m68307_internal_mbus_r )
99{
10   m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
10   m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
1111   m68307_mbus* mbus = m68k->m68307MBUS;
1212   assert(mbus != NULL);
1313   UINT8 retval;
1414
1515   if (mbus)
1616   {
17      int pc = space->device().safe_pc();
17      int pc = space.device().safe_pc();
1818
1919
2020      switch (offset)
2121      {
2222         case m68307BUS_MADR:
2323            logerror("%08x m68307_internal_mbus_r %08x (MADR - M-Bus Address Register)\n", pc, offset);
24            return space->machine().rand();
24            return space.machine().rand();
2525
2626         case m68307BUS_MFDR:
2727            logerror("%08x m68307_internal_mbus_r %08x (MFDR - M-Bus Frequency Divider Register)\n", pc, offset);
28            return space->machine().rand();
28            return space.machine().rand();
2929
3030         case m68307BUS_MBCR:
3131            logerror("%08x m68307_internal_mbus_r %08x (MFCR - M-Bus Control Register)\n", pc, offset);
32            return mbus->m_MFCR;//space->machine().rand();
32            return mbus->m_MFCR;//space.machine().rand();
3333
3434         case m68307BUS_MBSR:
3535            logerror("%08x m68307_internal_mbus_r %08x (MBSR - M-Bus Status Register)\n", pc, offset);
r17963r17964
4242         case m68307BUS_MBDR:
4343            logerror("%08x m68307_internal_mbus_r %08x (MBDR - M-Bus Data I/O Register)\n", pc, offset);
4444            mbus->m_intpend = true;
45            return 0xff;//space->machine().rand();
45            return 0xff;//space.machine().rand();
4646
4747         default:
4848            logerror("%08x m68307_internal_mbus_r %08x (UNKNOWN / ILLEGAL)\n", pc, offset);
r17963r17964
5555
5656WRITE8_HANDLER( m68307_internal_mbus_w )
5757{
58   m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
58   m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
5959   m68307_mbus* mbus = m68k->m68307MBUS;
6060   assert(mbus != NULL);
6161
6262   if (mbus)
6363   {
64      int pc = space->device().safe_pc();
64      int pc = space.device().safe_pc();
6565
6666      switch (offset)
6767      {
trunk/src/emu/cpu/m68000/68307ser.c
r17963r17964
1515
1616READ8_HANDLER( m68307_internal_serial_r )
1717{
18   m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
18   m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
1919   m68307_serial* serial = m68k->m68307SERIAL;
2020   assert(serial != NULL);
2121
r17963r17964
2929      else
3030      {
3131
32         int pc = space->device().safe_pc();
32         int pc = space.device().safe_pc();
3333
3434         switch (offset)
3535         {
3636            case m68307SER_UMR1_UMR2:
3737               logerror("%08x m68307_internal_serial_r %08x (UMR1, UMR2 - UART Mode Register)\n", pc, offset);
38               return space->machine().rand();
38               return space.machine().rand();
3939
4040            case m68307SER_USR_UCSR:
4141               logerror("%08x m68307_internal_serial_r %08x (USR, UCSR - UART Status/Clock Select Register)\n", pc, offset);
42               return space->machine().rand();
42               return space.machine().rand();
4343
4444            case m68307SER_UCR:
4545               logerror("%08x m68307_internal_serial_r %08x (UCR - UART Command Register)\n", pc, offset);
46               return space->machine().rand();
46               return space.machine().rand();
4747
4848            case m68307SER_URB_UTB:
4949               logerror("%08x m68307_internal_serial_r %08x (URB, UTB - UART Recieve/Transmit Buffer)\n", pc, offset);
50               return 0xff;//space->machine().rand();
50               return 0xff;//space.machine().rand();
5151
5252            case m68307SER_UIPCR_UACR:
5353               logerror("%08x m68307_internal_serial_r %08x (UIPCR, UACR - UART Input Port Change Register / UART Control Register)\n", pc, offset);
54               return 0xff;//space->machine().rand();
54               return 0xff;//space.machine().rand();
5555
5656            case m68307SER_UISR_UIMR:
5757               logerror("%08x m68307_internal_serial_r %08x (UISR, UIMR - UART Interrupt Status Register / UART Interrupt Mask Register)\n", pc, offset);
58               return space->machine().rand() & 0x87;
58               return space.machine().rand() & 0x87;
5959
6060            case m68307SER_UBG1:
6161               logerror("%08x m68307_internal_serial_r %08x (UBG1 - UART Baud Rate Gen. Precaler MSB)\n", pc, offset);
62               return space->machine().rand() & 0x87;
62               return space.machine().rand() & 0x87;
6363
6464            case m68307SER_UBG2:
6565               logerror("%08x m68307_internal_serial_r %08x (UBG1 - UART Baud Rate Gen. Precaler LSB)\n", pc, offset);
66               return space->machine().rand() & 0x87;
66               return space.machine().rand() & 0x87;
6767
6868            case m68307SER_UIVR:
6969               logerror("%08x m68307_internal_serial_r %08x (UIVR - UART Interrupt Vector Register)\n", pc, offset);
70               return space->machine().rand() & 0x87;
70               return space.machine().rand() & 0x87;
7171
7272            case m68307SER_UIP:
7373               logerror("%08x m68307_internal_serial_r %08x (UIP - UART Register Input Port)\n", pc, offset);
74               return space->machine().rand() & 0x87;
74               return space.machine().rand() & 0x87;
7575
7676            case m68307SER_UOP1:
7777               logerror("%08x m68307_internal_serial_r %08x (UOP1 - UART Output Port Bit Set Cmd)\n", pc, offset);
78               return space->machine().rand() & 0x87;
78               return space.machine().rand() & 0x87;
7979
8080            case m68307SER_UOP0:
8181               logerror("%08x m68307_internal_serial_r %08x (UOP0 - UART Output Port Bit Reset Cmd)\n", pc, offset);
82               return space->machine().rand() & 0x87;
82               return space.machine().rand() & 0x87;
8383
8484            default:
8585               logerror("%08x m68307_internal_serial_r %08x (UNKNOWN / ILLEGAL)\n", pc, offset);
r17963r17964
9393
9494WRITE8_HANDLER( m68307_internal_serial_w )
9595{
96   m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
96   m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
9797   m68307_serial* serial = m68k->m68307SERIAL;
9898   assert(serial != NULL);
9999
100   int pc = space->device().safe_pc();
100   int pc = space.device().safe_pc();
101101
102102   if (serial)
103103   {
trunk/src/emu/cpu/m68000/68307sim.h
r17963r17964
5151
5252   void write_pacnt(UINT16 data, UINT16 mem_mask);
5353   void write_paddr(UINT16 data, UINT16 mem_mask);
54   UINT16 read_padat(address_space *space, UINT16 mem_mask);
55   void write_padat(address_space *space, UINT16 data, UINT16 mem_mask);
54   UINT16 read_padat(address_space &space, UINT16 mem_mask);
55   void write_padat(address_space &space, UINT16 data, UINT16 mem_mask);
5656
5757   void write_pbcnt(UINT16 data, UINT16 mem_mask);
5858   void write_pbddr(UINT16 data, UINT16 mem_mask);
59   UINT16 read_pbdat(address_space *space, UINT16 mem_mask);
60   void write_pbdat(address_space *space, UINT16 data, UINT16 mem_mask);
59   UINT16 read_pbdat(address_space &space, UINT16 mem_mask);
60   void write_pbdat(address_space &space, UINT16 data, UINT16 mem_mask);
6161
6262
6363
trunk/src/emu/cpu/m68000/68340dma.c
r17963r17964
66
77READ32_HANDLER( m68340_internal_dma_r )
88{
9   m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
9   m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
1010   m68340_dma* dma = m68k->m68340DMA;
1111   assert(dma != NULL);
1212
1313   if (dma)
1414   {
15      int pc = space->device().safe_pc();
15      int pc = space.device().safe_pc();
1616      logerror("%08x m68340_internal_dma_r %08x, (%08x)\n", pc, offset*4,mem_mask);
1717   }
1818
r17963r17964
2121
2222WRITE32_HANDLER( m68340_internal_dma_w )
2323{
24   m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
24   m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
2525   m68340_dma* dma = m68k->m68340DMA;
2626   assert(dma != NULL);
2727
2828   if (dma)
2929   {
30      int pc = space->device().safe_pc();
30      int pc = space.device().safe_pc();
3131      logerror("%08x m68340_internal_dma_w %08x, %08x (%08x)\n", pc, offset*4,data,mem_mask);
3232   }
3333}
trunk/src/emu/cpu/m68000/68340tmu.c
r17963r17964
77
88READ32_HANDLER( m68340_internal_timer_r )
99{
10   m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
10   m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
1111   m68340_timer* timer = m68k->m68340TIMER;
1212   assert(timer != NULL);
1313
1414   if (timer)
1515   {
16      int pc = space->device().safe_pc();
16      int pc = space.device().safe_pc();
1717      logerror("%08x m68340_internal_timer_r %08x, (%08x)\n", pc, offset*4,mem_mask);
1818   }
1919
r17963r17964
2222
2323WRITE32_HANDLER( m68340_internal_timer_w )
2424{
25   m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
25   m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
2626   m68340_timer* timer = m68k->m68340TIMER;
2727   assert(timer != NULL);
2828
2929   if (timer)
3030   {
31      int pc = space->device().safe_pc();
31      int pc = space.device().safe_pc();
3232      logerror("%08x m68340_internal_timer_w %08x, %08x (%08x)\n", pc, offset*4,data,mem_mask);
3333   }
3434}
trunk/src/emu/cpu/m68000/68307tmu.c
r17963r17964
66
77READ16_HANDLER( m68307_internal_timer_r )
88{
9   m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
9   m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
1010   m68307_timer* timer = m68k->m68307TIMER;
1111   assert(timer != NULL);
1212
1313   if (timer)
1414   {
15      int pc = space->device().safe_pc();
15      int pc = space.device().safe_pc();
1616      int which = offset & 0x8;
1717
1818      switch (offset&0x7)
r17963r17964
3434
3535WRITE16_HANDLER( m68307_internal_timer_w )
3636{
37   m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
37   m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
3838   m68307_timer* timer = m68k->m68307TIMER;
3939   assert(timer != NULL);
4040
4141   if (timer)
4242   {
43      int pc = space->device().safe_pc();
43      int pc = space.device().safe_pc();
4444      int which = offset & 0x8;
4545
4646      switch (offset&0x7)
trunk/src/emu/cpu/m68000/m68kcpu.c
r17963r17964
20752075
20762076static READ16_HANDLER( m68307_internal_base_r )
20772077{
2078   m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
2078   m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
20792079
2080   int pc = space->device().safe_pc();
2080   int pc = space.device().safe_pc();
20812081   logerror("%08x m68307_internal_base_r %08x, (%04x)\n", pc, offset*2,mem_mask);
20822082
20832083   switch (offset<<1)
r17963r17964
20942094
20952095static WRITE16_HANDLER( m68307_internal_base_w )
20962096{
2097   m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
2097   m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
20982098
2099   int pc = space->device().safe_pc();
2099   int pc = space.device().safe_pc();
21002100   logerror("%08x m68307_internal_base_w %08x, %04x (%04x)\n", pc, offset*2,data,mem_mask);
21012101   int base = 0;
21022102   //int mask = 0;
r17963r17964
27632763
27642764static READ32_HANDLER( m68340_internal_base_r )
27652765{
2766   m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
2767   int pc = space->device().safe_pc();
2766   m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
2767   int pc = space.device().safe_pc();
27682768   logerror("%08x m68340_internal_base_r %08x, (%08x)\n", pc, offset*4,mem_mask);
27692769   return m68k->m68340_base;
27702770}
27712771
27722772static WRITE32_HANDLER( m68340_internal_base_w )
27732773{
2774   m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
2774   m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
27752775
2776   int pc = space->device().safe_pc();
2776   int pc = space.device().safe_pc();
27772777   logerror("%08x m68340_internal_base_w %08x, %08x (%08x)\n", pc, offset*4,data,mem_mask);
27782778
27792779   // other conditions?
trunk/src/emu/cpu/m68000/68340sim.c
r17963r17964
66
77READ16_HANDLER( m68340_internal_sim_r )
88{
9   m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
9   m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
1010   m68340_sim* sim = m68k->m68340SIM;
1111   assert(sim != NULL);
1212
1313   if (sim)
1414   {
15      int pc = space->device().safe_pc();
15      int pc = space.device().safe_pc();
1616
1717      switch (offset<<1)
1818      {
1919         case m68340SIM_MCR:
2020            logerror("%08x m68340_internal_sim_r %04x, (%04x) (MCR - Module Configuration Register)\n", pc, offset*2,mem_mask);
21            return space->machine().rand();
21            return space.machine().rand();
2222
2323         case m68340SIM_SYNCR:
2424            logerror("%08x m68340_internal_sim_r %04x, (%04x) (SYNCR - Clock Synthesizer Register)\n", pc, offset*2,mem_mask);
25            return space->machine().rand();
25            return space.machine().rand();
2626
2727         case m68340SIM_AVR_RSR:
2828            logerror("%08x m68340_internal_sim_r %04x, (%04x) (AVR, RSR - Auto Vector Register, Reset Status Register)\n", pc, offset*2,mem_mask);
29            return space->machine().rand();
29            return space.machine().rand();
3030
3131         case m68340SIM_SWIV_SYPCR:
3232            logerror("%08x m68340_internal_sim_r %04x, (%04x) (SWIV_SYPCR - Software Interrupt Vector, System Protection Control Register)\n", pc, offset*2,mem_mask);
33            return space->machine().rand();
33            return space.machine().rand();
3434
3535         case m68340SIM_PICR:
3636            logerror("%08x m68340_internal_sim_r %04x, (%04x) (PICR - Periodic Interrupt Control Register)\n", pc, offset*2,mem_mask);
37            return space->machine().rand();
37            return space.machine().rand();
3838
3939         case m68340SIM_PITR:
4040            logerror("%08x m68340_internal_sim_r %04x, (%04x) (PITR - Periodic Interrupt Timer Register)\n", pc, offset*2,mem_mask);
41            return space->machine().rand();
41            return space.machine().rand();
4242
4343         case m68340SIM_SWSR:
4444            logerror("%08x m68340_internal_sim_r %04x, (%04x) (SWSR - Software Service)\n", pc, offset*2,mem_mask);
45            return space->machine().rand();
45            return space.machine().rand();
4646
4747         default:
4848            logerror("%08x m68340_internal_sim_r %04x, (%04x)\n", pc, offset*2,mem_mask);
r17963r17964
5757READ8_HANDLER( m68340_internal_sim_ports_r )
5858{
5959   offset += 0x10;
60   m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
60   m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
6161   m68340_sim* sim = m68k->m68340SIM;
6262   assert(sim != NULL);
6363
6464   if (sim)
6565   {
66      int pc = space->device().safe_pc();
66      int pc = space.device().safe_pc();
6767
6868      switch (offset)
6969      {
7070         case m68340SIM_PORTA:
7171            logerror("%08x m68340_internal_sim_r %04x (PORTA - Port A Data)\n", pc, offset);
72            return space->machine().rand();
72            return space.machine().rand();
7373
7474         case m68340SIM_DDRA:
7575            logerror("%08x m68340_internal_sim_r %04x (DDRA - Port A Data Direction)\n", pc, offset);
76            return space->machine().rand();
76            return space.machine().rand();
7777
7878         case m68340SIM_PPRA1:
7979            logerror("%08x m68340_internal_sim_r %04x (PPRA1 - Port A Pin Assignment 1)\n", pc, offset);
80            return space->machine().rand();
80            return space.machine().rand();
8181
8282         case m68340SIM_PPRA2:
8383            logerror("%08x m68340_internal_sim_r %04x (PPRA2 - Port A Pin Assignment 2)\n", pc, offset);
84            return space->machine().rand();
84            return space.machine().rand();
8585
8686         case m68340SIM_PORTB:
8787            logerror("%08x m68340_internal_sim_r %04x (PORTB - Port B Data 0)\n", pc, offset);
88            return space->machine().rand();
88            return space.machine().rand();
8989
9090         case m68340SIM_PORTB1:
9191            logerror("%08x m68340_internal_sim_r %04x (PORTB1 - Port B Data 1)\n", pc, offset);
92            return space->machine().rand();
92            return space.machine().rand();
9393
9494         case m68340SIM_DDRB:
9595            logerror("%08x m68340_internal_sim_r %04x (DDR - Port B Data Direction)\n", pc, offset);
96            return space->machine().rand();
96            return space.machine().rand();
9797
9898         case m68340SIM_PPARB:
9999            logerror("%08x m68340_internal_sim_r %04x (PPARB - Port B Pin Assignment)\n", pc, offset);
100            return space->machine().rand();
100            return space.machine().rand();
101101
102102         default:
103103            logerror("%08x m68340_internal_sim_r %04x (ILLEGAL?)\n", pc, offset);
104            return space->machine().rand();
104            return space.machine().rand();
105105
106106      }
107107   }
r17963r17964
113113{
114114   offset += m68340SIM_AM_CS0>>2;
115115
116   m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
116   m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
117117   m68340_sim* sim = m68k->m68340SIM;
118118   assert(sim != NULL);
119119
120120   if (sim)
121121   {
122      int pc = space->device().safe_pc();
122      int pc = space.device().safe_pc();
123123
124124      switch (offset<<2)
125125      {
r17963r17964
143143
144144WRITE16_HANDLER( m68340_internal_sim_w )
145145{
146   m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
146   m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
147147   m68340_sim* sim = m68k->m68340SIM;
148148   assert(sim != NULL);
149149
150150   if (sim)
151151   {
152      int pc = space->device().safe_pc();
152      int pc = space.device().safe_pc();
153153
154154      switch (offset<<1)
155155      {
r17963r17964
193193WRITE8_HANDLER( m68340_internal_sim_ports_w )
194194{
195195   offset += 0x10;
196   m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
196   m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
197197   m68340_sim* sim = m68k->m68340SIM;
198198   assert(sim != NULL);
199199
200200   if (sim)
201201   {
202      int pc = space->device().safe_pc();
202      int pc = space.device().safe_pc();
203203
204204      switch (offset)
205205      {
r17963r17964
246246WRITE32_HANDLER( m68340_internal_sim_cs_w )
247247{
248248   offset += m68340SIM_AM_CS0>>2;
249   m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
249   m68ki_cpu_core *m68k = m68k_get_safe_token(&space.device());
250250   m68340_sim* sim = m68k->m68340SIM;
251251   assert(sim != NULL);
252252
253253   if (sim)
254254   {
255      int pc = space->device().safe_pc();
255      int pc = space.device().safe_pc();
256256
257257      switch (offset<<2)
258258      {
trunk/src/emu/cpu/tms34010/tms34010.h
r17963r17964
197197   void   (*scanline_callback_ind16)(screen_device &screen, bitmap_ind16 &bitmap, int scanline, const tms34010_display_params *params);
198198   void   (*scanline_callback_rgb32)(screen_device &screen, bitmap_rgb32 &bitmap, int scanline, const tms34010_display_params *params);
199199   void   (*output_int)(device_t *device, int state);         /* output interrupt callback */
200   void   (*to_shiftreg)(address_space *space, offs_t, UINT16 *);   /* shift register write */
201   void   (*from_shiftreg)(address_space *space, offs_t, UINT16 *);   /* shift register read */
200   void   (*to_shiftreg)(address_space &space, offs_t, UINT16 *);   /* shift register write */
201   void   (*from_shiftreg)(address_space &space, offs_t, UINT16 *);   /* shift register read */
202202};
203203
204204
trunk/src/emu/cpu/tms34010/tms34010.c
r17963r17964
316316static UINT32 read_pixel_shiftreg(tms34010_state *tms, offs_t offset)
317317{
318318   if (tms->config->to_shiftreg)
319      tms->config->to_shiftreg(tms->program, offset, &tms->shiftreg[0]);
319      tms->config->to_shiftreg(*tms->program, offset, &tms->shiftreg[0]);
320320   else
321321      fatalerror("To ShiftReg function not set. PC = %08X\n", tms->pc);
322322   return tms->shiftreg[0];
r17963r17964
460460static void write_pixel_shiftreg(tms34010_state *tms, offs_t offset, UINT32 data)
461461{
462462   if (tms->config->from_shiftreg)
463      tms->config->from_shiftreg(tms->program, offset, &tms->shiftreg[0]);
463      tms->config->from_shiftreg(*tms->program, offset, &tms->shiftreg[0]);
464464   else
465465      fatalerror("From ShiftReg function not set. PC = %08X\n", tms->pc);
466466}
r17963r17964
699699   /* the first time we are run */
700700   tms->reset_deferred = tms->config->halt_on_reset;
701701   if (tms->config->halt_on_reset)
702      tms34010_io_register_w(device->space(AS_PROGRAM), REG_HSTCTLH, 0x8000, 0xffff);
702      tms34010_io_register_w(*device->space(AS_PROGRAM), REG_HSTCTLH, 0x8000, 0xffff);
703703}
704704
705705
r17963r17964
11931193
11941194WRITE16_HANDLER( tms34010_io_register_w )
11951195{
1196   tms34010_state *tms = get_safe_token(&space->device());
1196   tms34010_state *tms = get_safe_token(&space.device());
11971197   int oldreg, newreg;
11981198
11991199   /* Set register */
r17963r17964
12221222         break;
12231223
12241224      case REG_PMASK:
1225         if (data) logerror("Plane masking not supported. PC=%08X\n", space->device().safe_pc());
1225         if (data) logerror("Plane masking not supported. PC=%08X\n", space.device().safe_pc());
12261226         break;
12271227
12281228      case REG_DPYCTL:
r17963r17964
12621262         if (!(oldreg & 0x0080) && (newreg & 0x0080))
12631263         {
12641264            if (tms->config->output_int)
1265               (*tms->config->output_int)(&space->device(), 1);
1265               (*tms->config->output_int)(&space.device(), 1);
12661266         }
12671267         else if ((oldreg & 0x0080) && !(newreg & 0x0080))
12681268         {
12691269            if (tms->config->output_int)
1270               (*tms->config->output_int)(&space->device(), 0);
1270               (*tms->config->output_int)(&space.device(), 0);
12711271         }
12721272
12731273         /* input interrupt? (should really be state-based, but the functions don't exist!) */
r17963r17964
13361336
13371337WRITE16_HANDLER( tms34020_io_register_w )
13381338{
1339   tms34010_state *tms = get_safe_token(&space->device());
1339   tms34010_state *tms = get_safe_token(&space.device());
13401340   int oldreg, newreg;
13411341
13421342   /* Set register */
r17963r17964
13731373
13741374      case REG020_PMASKL:
13751375      case REG020_PMASKH:
1376         if (data) logerror("Plane masking not supported. PC=%08X\n", space->device().safe_pc());
1376         if (data) logerror("Plane masking not supported. PC=%08X\n", space.device().safe_pc());
13771377         break;
13781378
13791379      case REG020_DPYCTL:
r17963r17964
14131413         if (!(oldreg & 0x0080) && (newreg & 0x0080))
14141414         {
14151415            if (tms->config->output_int)
1416               (*tms->config->output_int)(&space->device(), 1);
1416               (*tms->config->output_int)(&space.device(), 1);
14171417         }
14181418         else if ((oldreg & 0x0080) && !(newreg & 0x0080))
14191419         {
14201420            if (tms->config->output_int)
1421               (*tms->config->output_int)(&space->device(), 0);
1421               (*tms->config->output_int)(&space.device(), 0);
14221422         }
14231423
14241424         /* input interrupt? (should really be state-based, but the functions don't exist!) */
r17963r17964
14991499
15001500READ16_HANDLER( tms34010_io_register_r )
15011501{
1502   tms34010_state *tms = get_safe_token(&space->device());
1502   tms34010_state *tms = get_safe_token(&space.device());
15031503   int result, total;
15041504
15051505//  if (LOG_CONTROL_REGS)
r17963r17964
15421542
15431543READ16_HANDLER( tms34020_io_register_r )
15441544{
1545   tms34010_state *tms = get_safe_token(&space->device());
1545   tms34010_state *tms = get_safe_token(&space.device());
15461546   int result, total;
15471547
15481548//  if (LOG_CONTROL_REGS)
r17963r17964
15951595
15961596void tms34010_host_w(device_t *cpu, int reg, int data)
15971597{
1598   address_space *space;
15991598   tms34010_state *tms = get_safe_token(cpu);
16001599   unsigned int addr;
16011600
r17963r17964
16291628
16301629      /* control register */
16311630      case TMS34010_HOST_CONTROL:
1631      {
16321632         tms->external_host_access = TRUE;
1633         space = tms->device->space(AS_PROGRAM);
1633         address_space &space = *tms->device->space(AS_PROGRAM);
16341634         tms34010_io_register_w(space, REG_HSTCTLH, data & 0xff00, 0xffff);
16351635         tms34010_io_register_w(space, REG_HSTCTLL, data & 0x00ff, 0xffff);
16361636         tms->external_host_access = FALSE;
16371637         break;
1638      }
16381639
16391640      /* error case */
16401641      default:
trunk/src/emu/cpu/tms34010/34010gfx.c
r17963r17964
201201
202202
203203/* Shift register handling */
204static void memory_w(address_space *space, offs_t offset,UINT16 data)
204static void memory_w(address_space &space, offs_t offset,UINT16 data)
205205{
206   space->write_word(offset, data);
206   space.write_word(offset, data);
207207}
208208
209static UINT16 memory_r(address_space *space, offs_t offset)
209static UINT16 memory_r(address_space &space, offs_t offset)
210210{
211   return space->read_word(offset);
211   return space.read_word(offset);
212212}
213213
214static void shiftreg_w(address_space *space, offs_t offset,UINT16 data)
214static void shiftreg_w(address_space &space, offs_t offset,UINT16 data)
215215{
216   tms34010_state *tms = get_safe_token(&space->device());
216   tms34010_state *tms = get_safe_token(&space.device());
217217   if (tms->config->from_shiftreg)
218218      (*tms->config->from_shiftreg)(space, (UINT32)(offset << 3) & ~15, &tms->shiftreg[0]);
219219   else
220220      logerror("From ShiftReg function not set. PC = %08X\n", tms->pc);
221221}
222222
223static UINT16 shiftreg_r(address_space *space, offs_t offset)
223static UINT16 shiftreg_r(address_space &space, offs_t offset)
224224{
225   tms34010_state *tms = get_safe_token(&space->device());
225   tms34010_state *tms = get_safe_token(&space.device());
226226   if (tms->config->to_shiftreg)
227227      (*tms->config->to_shiftreg)(space, (UINT32)(offset << 3) & ~15, &tms->shiftreg[0]);
228228   else
r17963r17964
230230   return tms->shiftreg[0];
231231}
232232
233static UINT16 dummy_shiftreg_r(address_space *space, offs_t offset)
233static UINT16 dummy_shiftreg_r(address_space &space, offs_t offset)
234234{
235   tms34010_state *tms = get_safe_token(&space->device());
235   tms34010_state *tms = get_safe_token(&space.device());
236236   return tms->shiftreg[0];
237237}
238238
r17963r17964
10381038   if (!P_FLAG(tms))
10391039   {
10401040      int dx, dy, x, y, /*words,*/ yreverse;
1041      void (*word_write)(address_space *space,offs_t address,UINT16 data);
1042      UINT16 (*word_read)(address_space *space,offs_t address);
1041      void (*word_write)(address_space &space,offs_t address,UINT16 data);
1042      UINT16 (*word_read)(address_space &space,offs_t address);
10431043      UINT32 readwrites = 0;
10441044      UINT32 saddr, daddr;
10451045      XY dstxy = { 0 };
r17963r17964
11131113         UINT32 srcword, dstword = 0;
11141114
11151115         /* fetch the initial source word */
1116         srcword = (*word_read)(tms->program, srcwordaddr++ << 1);
1116         srcword = (*word_read)(*tms->program, srcwordaddr++ << 1);
11171117         readwrites++;
11181118
11191119         /* fetch the initial dest word */
11201120         if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY || (daddr & 0x0f) != 0)
11211121         {
1122            dstword = (*word_read)(tms->program, dstwordaddr << 1);
1122            dstword = (*word_read)(*tms->program, dstwordaddr << 1);
11231123            readwrites++;
11241124         }
11251125
r17963r17964
11321132            /* fetch more words if necessary */
11331133            if (srcbit + BITS_PER_PIXEL > 16)
11341134            {
1135               srcword |= (*word_read)(tms->program, srcwordaddr++ << 1) << 16;
1135               srcword |= (*word_read)(*tms->program, srcwordaddr++ << 1) << 16;
11361136               readwrites++;
11371137            }
11381138
r17963r17964
11491149            if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY)
11501150               if (dstbit + BITS_PER_PIXEL > 16)
11511151               {
1152                  dstword |= (*word_read)(tms->program, (dstwordaddr + 1) << 1) << 16;
1152                  dstword |= (*word_read)(*tms->program, (dstwordaddr + 1) << 1) << 16;
11531153                  readwrites++;
11541154               }
11551155
r17963r17964
11641164            dstbit += BITS_PER_PIXEL;
11651165            if (dstbit > 16)
11661166            {
1167               (*word_write)(tms->program, dstwordaddr++ << 1, dstword);
1167               (*word_write)(*tms->program, dstwordaddr++ << 1, dstword);
11681168               readwrites++;
11691169               dstbit -= 16;
11701170               dstword >>= 16;
r17963r17964
11771177            /* if we're right-partial, read and mask the remaining bits */
11781178            if (dstbit != 16)
11791179            {
1180               UINT16 origdst = (*word_read)(tms->program, dstwordaddr << 1);
1180               UINT16 origdst = (*word_read)(*tms->program, dstwordaddr << 1);
11811181               UINT16 mask = 0xffff << dstbit;
11821182               dstword = (dstword & ~mask) | (origdst & mask);
11831183               readwrites++;
11841184            }
11851185
1186            (*word_write)(tms->program, dstwordaddr++ << 1, dstword);
1186            (*word_write)(*tms->program, dstwordaddr++ << 1, dstword);
11871187            readwrites++;
11881188         }
11891189
r17963r17964
12151215         dwordaddr = daddr >> 4;
12161216
12171217         /* fetch the initial source word */
1218         srcword = (*word_read)(tms->program, swordaddr++ << 1);
1218         srcword = (*word_read)(*tms->program, swordaddr++ << 1);
12191219         srcmask = PIXEL_MASK << (saddr & 15);
12201220
12211221         /* handle the left partial word */
12221222         if (left_partials != 0)
12231223         {
12241224            /* fetch the destination word */
1225            dstword = (*word_read)(tms->program, dwordaddr << 1);
1225            dstword = (*word_read)(*tms->program, dwordaddr << 1);
12261226            dstmask = PIXEL_MASK << (daddr & 15);
12271227
12281228            /* loop over partials */
r17963r17964
12311231               /* fetch another word if necessary */
12321232               if (srcmask == 0)
12331233               {
1234                  srcword = (*word_read)(tms->program, swordaddr++ << 1);
1234                  srcword = (*word_read)(*tms->program, swordaddr++ << 1);
12351235                  srcmask = PIXEL_MASK;
12361236               }
12371237
r17963r17964
12531253            }
12541254
12551255            /* write the result */
1256            (*word_write)(tms->program, dwordaddr++ << 1, dstword);
1256            (*word_write)(*tms->program, dwordaddr++ << 1, dstword);
12571257         }
12581258
12591259         /* loop over full words */
r17963r17964
12611261         {
12621262            /* fetch the destination word (if necessary) */
12631263            if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY)
1264               dstword = (*word_read)(tms->program, dwordaddr << 1);
1264               dstword = (*word_read)(*tms->program, dwordaddr << 1);
12651265            else
12661266               dstword = 0;
12671267            dstmask = PIXEL_MASK;
r17963r17964
12721272               /* fetch another word if necessary */
12731273               if (srcmask == 0)
12741274               {
1275                  srcword = (*word_read)(tms->program, swordaddr++ << 1);
1275                  srcword = (*word_read)(*tms->program, swordaddr++ << 1);
12761276                  srcmask = PIXEL_MASK;
12771277               }
12781278
r17963r17964
12941294            }
12951295
12961296            /* write the result */
1297            (*word_write)(tms->program, dwordaddr++ << 1, dstword);
1297            (*word_write)(*tms->program, dwordaddr++ << 1, dstword);
12981298         }
12991299
13001300         /* handle the right partial word */
13011301         if (right_partials != 0)
13021302         {
13031303            /* fetch the destination word */
1304            dstword = (*word_read)(tms->program, dwordaddr << 1);
1304            dstword = (*word_read)(*tms->program, dwordaddr << 1);
13051305            dstmask = PIXEL_MASK;
13061306
13071307            /* loop over partials */
r17963r17964
13111311               if (srcmask == 0)
13121312               {
13131313      LOGGFX(("  right fetch @ %08x\n", swordaddr));
1314                  srcword = (*word_read)(tms->program, swordaddr++ << 1);
1314                  srcword = (*word_read)(*tms->program, swordaddr++ << 1);
13151315                  srcmask = PIXEL_MASK;
13161316               }
13171317
r17963r17964
13331333            }
13341334
13351335            /* write the result */
1336            (*word_write)(tms->program, dwordaddr++ << 1, dstword);
1336            (*word_write)(*tms->program, dwordaddr++ << 1, dstword);
13371337         }
13381338#endif
13391339
r17963r17964
13851385   if (!P_FLAG(tms))
13861386   {
13871387      int dx, dy, x, y, words, yreverse;
1388      void (*word_write)(address_space *space,offs_t address,UINT16 data);
1389      UINT16 (*word_read)(address_space *space,offs_t address);
1388      void (*word_write)(address_space &space,offs_t address,UINT16 data);
1389      UINT16 (*word_read)(address_space &space,offs_t address);
13901390      UINT32 saddr, daddr;
13911391      XY dstxy = { 0 };
13921392
r17963r17964
14841484         dwordaddr = (daddr + 15) >> 4;
14851485
14861486         /* fetch the initial source word */
1487         srcword = (*word_read)(tms->program, --swordaddr << 1);
1487         srcword = (*word_read)(*tms->program, --swordaddr << 1);
14881488         srcmask = PIXEL_MASK << ((saddr - BITS_PER_PIXEL) & 15);
14891489
14901490         /* handle the right partial word */
14911491         if (right_partials != 0)
14921492         {
14931493            /* fetch the destination word */
1494            dstword = (*word_read)(tms->program, --dwordaddr << 1);
1494            dstword = (*word_read)(*tms->program, --dwordaddr << 1);
14951495            dstmask = PIXEL_MASK << ((daddr - BITS_PER_PIXEL) & 15);
14961496
14971497            /* loop over partials */
r17963r17964
15001500               /* fetch source pixel if necessary */
15011501               if (srcmask == 0)
15021502               {
1503                  srcword = (*word_read)(tms->program, --swordaddr << 1);
1503                  srcword = (*word_read)(*tms->program, --swordaddr << 1);
15041504                  srcmask = PIXEL_MASK << (16 - BITS_PER_PIXEL);
15051505               }
15061506
r17963r17964
15221522            }
15231523
15241524            /* write the result */
1525            (*word_write)(tms->program, dwordaddr << 1, dstword);
1525            (*word_write)(*tms->program, dwordaddr << 1, dstword);
15261526         }
15271527
15281528         /* loop over full words */
r17963r17964
15311531            /* fetch the destination word (if necessary) */
15321532            dwordaddr--;
15331533            if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY)
1534               dstword = (*word_read)(tms->program, dwordaddr << 1);
1534               dstword = (*word_read)(*tms->program, dwordaddr << 1);
15351535            else
15361536               dstword = 0;
15371537            dstmask = PIXEL_MASK << (16 - BITS_PER_PIXEL);
r17963r17964
15421542               /* fetch source pixel if necessary */
15431543               if (srcmask == 0)
15441544               {
1545                  srcword = (*word_read)(tms->program, --swordaddr << 1);
1545                  srcword = (*word_read)(*tms->program, --swordaddr << 1);
15461546                  srcmask = PIXEL_MASK << (16 - BITS_PER_PIXEL);
15471547               }
15481548
r17963r17964
15641564            }
15651565
15661566            /* write the result */
1567            (*word_write)(tms->program, dwordaddr << 1, dstword);
1567            (*word_write)(*tms->program, dwordaddr << 1, dstword);
15681568         }
15691569
15701570         /* handle the left partial word */
15711571         if (left_partials != 0)
15721572         {
15731573            /* fetch the destination word */
1574            dstword = (*word_read)(tms->program, --dwordaddr << 1);
1574            dstword = (*word_read)(*tms->program, --dwordaddr << 1);
15751575            dstmask = PIXEL_MASK << (16 - BITS_PER_PIXEL);
15761576
15771577            /* loop over partials */
r17963r17964
15801580               /* fetch the source pixel if necessary */
15811581               if (srcmask == 0)
15821582               {
1583                  srcword = (*word_read)(tms->program, --swordaddr << 1);
1583                  srcword = (*word_read)(*tms->program, --swordaddr << 1);
15841584                  srcmask = PIXEL_MASK << (16 - BITS_PER_PIXEL);
15851585               }
15861586
r17963r17964
16021602            }
16031603
16041604            /* write the result */
1605            (*word_write)(tms->program, dwordaddr << 1, dstword);
1605            (*word_write)(*tms->program, dwordaddr << 1, dstword);
16061606         }
16071607
16081608         /* update for next row */
r17963r17964
16501650   if (!P_FLAG(tms))
16511651   {
16521652      int dx, dy, x, y, words, left_partials, right_partials, full_words;
1653      void (*word_write)(address_space *space,offs_t address,UINT16 data);
1654      UINT16 (*word_read)(address_space *space,offs_t address);
1653      void (*word_write)(address_space &space,offs_t address,UINT16 data);
1654      UINT16 (*word_read)(address_space &space,offs_t address);
16551655      UINT32 saddr, daddr;
16561656      XY dstxy = { 0 };
16571657
r17963r17964
17271727         dwordaddr = daddr >> 4;
17281728
17291729         /* fetch the initial source word */
1730         srcword = (*word_read)(tms->program, swordaddr++ << 1);
1730         srcword = (*word_read)(*tms->program, swordaddr++ << 1);
17311731         srcmask = 1 << (saddr & 15);
17321732
17331733         /* handle the left partial word */
17341734         if (left_partials != 0)
17351735         {
17361736            /* fetch the destination word */
1737            dstword = (*word_read)(tms->program, dwordaddr << 1);
1737            dstword = (*word_read)(*tms->program, dwordaddr << 1);
17381738            dstmask = PIXEL_MASK << (daddr & 15);
17391739
17401740            /* loop over partials */
r17963r17964
17511751               srcmask <<= 1;
17521752               if (srcmask == 0)
17531753               {
1754                  srcword = (*word_read)(tms->program, swordaddr++ << 1);
1754                  srcword = (*word_read)(*tms->program, swordaddr++ << 1);
17551755                  srcmask = 0x0001;
17561756               }
17571757
r17963r17964
17601760            }
17611761
17621762            /* write the result */
1763            (*word_write)(tms->program, dwordaddr++ << 1, dstword);
1763            (*word_write)(*tms->program, dwordaddr++ << 1, dstword);
17641764         }
17651765
17661766         /* loop over full words */
r17963r17964
17681768         {
17691769            /* fetch the destination word (if necessary) */
17701770            if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY)
1771               dstword = (*word_read)(tms->program, dwordaddr << 1);
1771               dstword = (*word_read)(*tms->program, dwordaddr << 1);
17721772            else
17731773               dstword = 0;
17741774            dstmask = PIXEL_MASK;
r17963r17964
17871787               srcmask <<= 1;
17881788               if (srcmask == 0)
17891789               {
1790                  srcword = (*word_read)(tms->program, swordaddr++ << 1);
1790                  srcword = (*word_read)(*tms->program, swordaddr++ << 1);
17911791                  srcmask = 0x0001;
17921792               }
17931793
r17963r17964
17961796            }
17971797
17981798            /* write the result */
1799            (*word_write)(tms->program, dwordaddr++ << 1, dstword);
1799            (*word_write)(*tms->program, dwordaddr++ << 1, dstword);
18001800         }
18011801
18021802         /* handle the right partial word */
18031803         if (right_partials != 0)
18041804         {
18051805            /* fetch the destination word */
1806            dstword = (*word_read)(tms->program, dwordaddr << 1);
1806            dstword = (*word_read)(*tms->program, dwordaddr << 1);
18071807            dstmask = PIXEL_MASK;
18081808
18091809            /* loop over partials */
r17963r17964
18201820               srcmask <<= 1;
18211821               if (srcmask == 0)
18221822               {
1823                  srcword = (*word_read)(tms->program, swordaddr++ << 1);
1823                  srcword = (*word_read)(*tms->program, swordaddr++ << 1);
18241824                  srcmask = 0x0001;
18251825               }
18261826
r17963r17964
18291829            }
18301830
18311831            /* write the result */
1832            (*word_write)(tms->program, dwordaddr++ << 1, dstword);
1832            (*word_write)(*tms->program, dwordaddr++ << 1, dstword);
18331833         }
18341834
18351835         /* update for next row */
r17963r17964
18641864   if (!P_FLAG(tms))
18651865   {
18661866      int dx, dy, x, y, words, left_partials, right_partials, full_words;
1867      void (*word_write)(address_space *space,offs_t address,UINT16 data);
1868      UINT16 (*word_read)(address_space *space,offs_t address);
1867      void (*word_write)(address_space &space,offs_t address,UINT16 data);
1868      UINT16 (*word_read)(address_space &space,offs_t address);
18691869      UINT32 daddr;
18701870      XY dstxy = { 0 };
18711871
r17963r17964
19431943         if (left_partials != 0)
19441944         {
19451945            /* fetch the destination word */
1946            dstword = (*word_read)(tms->program, dwordaddr << 1);
1946            dstword = (*word_read)(*tms->program, dwordaddr << 1);
19471947            dstmask = PIXEL_MASK << (daddr & 15);
19481948
19491949            /* loop over partials */
r17963r17964
19601960            }
19611961
19621962            /* write the result */
1963            (*word_write)(tms->program, dwordaddr++ << 1, dstword);
1963            (*word_write)(*tms->program, dwordaddr++ << 1, dstword);
19641964         }
19651965
19661966         /* loop over full words */
r17963r17964
19681968         {
19691969            /* fetch the destination word (if necessary) */
19701970            if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY)
1971               dstword = (*word_read)(tms->program, dwordaddr << 1);
1971               dstword = (*word_read)(*tms->program, dwordaddr << 1);
19721972            else
19731973               dstword = 0;
19741974            dstmask = PIXEL_MASK;
r17963r17964
19871987            }
19881988
19891989            /* write the result */
1990            (*word_write)(tms->program, dwordaddr++ << 1, dstword);
1990            (*word_write)(*tms->program, dwordaddr++ << 1, dstword);
19911991         }
19921992
19931993         /* handle the right partial word */
19941994         if (right_partials != 0)
19951995         {
19961996            /* fetch the destination word */
1997            dstword = (*word_read)(tms->program, dwordaddr << 1);
1997            dstword = (*word_read)(*tms->program, dwordaddr << 1);
19981998            dstmask = PIXEL_MASK;
19991999
20002000            /* loop over partials */
r17963r17964
20112011            }
20122012
20132013            /* write the result */
2014            (*word_write)(tms->program, dwordaddr++ << 1, dstword);
2014            (*word_write)(*tms->program, dwordaddr++ << 1, dstword);
20152015         }
20162016
20172017         /* update for next row */
trunk/src/emu/cpu/m37710/m37710.c
r17963r17964
599599
600600static READ16_HANDLER( m37710_internal_word_r )
601601{
602   m37710i_cpu_struct *cpustate = get_safe_token(&space->device());
602   m37710i_cpu_struct *cpustate = get_safe_token(&space.device());
603603   UINT16 ret = 0;
604604
605605   if (mem_mask & 0x00ff)
r17963r17964
612612
613613static WRITE16_HANDLER( m37710_internal_word_w )
614614{
615   m37710i_cpu_struct *cpustate = get_safe_token(&space->device());
615   m37710i_cpu_struct *cpustate = get_safe_token(&space.device());
616616
617617   if (mem_mask & 0x00ff)
618618      m37710_internal_w(cpustate, offset*2, data & 0xff);
trunk/src/emu/cpu/dsp56k/dsp56mem.c
r17963r17964
485485
486486READ16_HANDLER( program_r )
487487{
488   dsp56k_core* cpustate = get_safe_token(&space->device());
488   dsp56k_core* cpustate = get_safe_token(&space.device());
489489   return cpustate->program_ram[offset];
490490}
491491
492492WRITE16_HANDLER( program_w )
493493{
494   dsp56k_core* cpustate = get_safe_token(&space->device());
494   dsp56k_core* cpustate = get_safe_token(&space.device());
495495   cpustate->program_ram[offset] = data;
496496}
497497
498498/* Work */
499499READ16_HANDLER( peripheral_register_r )
500500{
501   dsp56k_core* cpustate = get_safe_token(&space->device());
501   dsp56k_core* cpustate = get_safe_token(&space.device());
502502   // (printf) logerror("Peripheral read 0x%04x\n", O2A(offset));
503503
504504   switch (O2A(offset))
r17963r17964
633633
634634WRITE16_HANDLER( peripheral_register_w )
635635{
636   dsp56k_core* cpustate = get_safe_token(&space->device());
636   dsp56k_core* cpustate = get_safe_token(&space.device());
637637
638638   // Its primary behavior is RAM
639639   // COMBINE_DATA(&cpustate->peripheral_ram[offset]);
trunk/src/emu/cpu/tlcs90/tlcs90.c
r17963r17964
22832283
22842284static READ8_HANDLER( t90_internal_registers_r )
22852285{
2286   t90_Regs *cpustate = get_safe_token(&space->device());
2286   t90_Regs *cpustate = get_safe_token(&space.device());
22872287
22882288   #define RIO      cpustate->io->read_byte( T90_IOBASE+offset )
22892289
r17963r17964
24982498{
24992499   #define WIO      cpustate->io->write_byte( T90_IOBASE+offset, data )
25002500
2501   t90_Regs *cpustate = get_safe_token(&space->device());
2501   t90_Regs *cpustate = get_safe_token(&space.device());
25022502   UINT8 out_mask;
25032503   UINT8 old = cpustate->internal_registers[offset];
25042504   switch ( T90_IOBASE + offset )
trunk/src/emu/cpu/se3208/se3208.c
r17963r17964
6565   return (se3208_state_t *)downcast<legacy_cpu_device *>(device)->token();
6666}
6767
68INLINE UINT32 read_dword_unaligned(address_space *space, UINT32 address)
68INLINE UINT32 read_dword_unaligned(address_space &space, UINT32 address)
6969{
7070   if (address & 3)
71      return space->read_byte(address) | space->read_byte(address+1)<<8 | space->read_byte(address+2)<<16 | space->read_byte(address+3)<<24;
71      return space.read_byte(address) | space.read_byte(address+1)<<8 | space.read_byte(address+2)<<16 | space.read_byte(address+3)<<24;
7272   else
73      return space->read_dword(address);
73      return space.read_dword(address);
7474}
7575
76INLINE UINT16 read_word_unaligned(address_space *space, UINT32 address)
76INLINE UINT16 read_word_unaligned(address_space &space, UINT32 address)
7777{
7878   if (address & 1)
79      return space->read_byte(address) | space->read_byte(address+1)<<8;
79      return space.read_byte(address) | space.read_byte(address+1)<<8;
8080   else
81      return space->read_word(address);
81      return space.read_word(address);
8282}
8383
84INLINE void write_dword_unaligned(address_space *space, UINT32 address, UINT32 data)
84INLINE void write_dword_unaligned(address_space &space, UINT32 address, UINT32 data)
8585{
8686   if (address & 3)
8787   {
88      space->write_byte(address, data & 0xff);
89      space->write_byte(address+1, (data>>8)&0xff);
90      space->write_byte(address+2, (data>>16)&0xff);
91      space->write_byte(address+3, (data>>24)&0xff);
88      space.write_byte(address, data & 0xff);
89      space.write_byte(address+1, (data>>8)&0xff);
90      space.write_byte(address+2, (data>>16)&0xff);
91      space.write_byte(address+3, (data>>24)&0xff);
9292   }
9393   else
9494   {
95      space->write_dword(address, data);
95      space.write_dword(address, data);
9696   }
9797}
9898
99INLINE void write_word_unaligned(address_space *space, UINT32 address, UINT16 data)
99INLINE void write_word_unaligned(address_space &space, UINT32 address, UINT16 data)
100100{
101101   if (address & 1)
102102   {
103      space->write_byte(address, data & 0xff);
104      space->write_byte(address+1, (data>>8)&0xff);
103      space.write_byte(address, data & 0xff);
104      space.write_byte(address+1, (data>>8)&0xff);
105105   }
106106   else
107107   {
108      space->write_word(address, data);
108      space.write_word(address, data);
109109   }
110110}
111111
r17963r17964
117117
118118INLINE UINT16 SE3208_Read16(se3208_state_t *se3208_state, UINT32 addr)
119119{
120   return read_word_unaligned(se3208_state->program,addr);
120   return read_word_unaligned(*se3208_state->program,addr);
121121}
122122
123123INLINE UINT32 SE3208_Read32(se3208_state_t *se3208_state, UINT32 addr)
124124{
125   return read_dword_unaligned(se3208_state->program,addr);
125   return read_dword_unaligned(*se3208_state->program,addr);
126126}
127127
128128INLINE void SE3208_Write8(se3208_state_t *se3208_state, UINT32 addr,UINT8 val)
r17963r17964
132132
133133INLINE void SE3208_Write16(se3208_state_t *se3208_state, UINT32 addr,UINT16 val)
134134{
135   write_word_unaligned(se3208_state->program,addr,val);
135   write_word_unaligned(*se3208_state->program,addr,val);
136136}
137137
138138INLINE void SE3208_Write32(se3208_state_t *se3208_state, UINT32 addr,UINT32 val)
139139{
140   write_dword_unaligned(se3208_state->program,addr,val);
140   write_dword_unaligned(*se3208_state->program,addr,val);
141141}
142142
143143
trunk/src/emu/cpu/tlcs900/tlcs900.c
r17963r17964
983983
984984static READ8_HANDLER( tlcs900_internal_r )
985985{
986   tlcs900_state *cpustate = get_safe_token( &space->device() );
986   tlcs900_state *cpustate = get_safe_token( &space.device() );
987987
988988   return cpustate->reg[ offset ];
989989}
r17963r17964
991991
992992static WRITE8_HANDLER( tlcs900_internal_w )
993993{
994   tlcs900_state *cpustate = get_safe_token( &space->device() );
994   tlcs900_state *cpustate = get_safe_token( &space.device() );
995995
996996   switch ( offset )
997997   {
r17963r17964
17671767
17681768static READ8_HANDLER( tmp95c063_internal_r )
17691769{
1770   tlcs900_state *cpustate = get_safe_token( &space->device() );
1770   tlcs900_state *cpustate = get_safe_token( &space.device() );
17711771
17721772   if (!cpustate->port_read.isnull())
17731773   {
r17963r17964
17941794
17951795static WRITE8_HANDLER( tmp95c063_internal_w )
17961796{
1797   tlcs900_state *cpustate = get_safe_token( &space->device() );
1797   tlcs900_state *cpustate = get_safe_token( &space.device() );
17981798
17991799   switch ( offset )
18001800   {
trunk/src/emu/cpu/m6502/mincce02.h
r17963r17964
4747
4848#define PPC   cpustate->ppc.d
4949
50#define RDMEM_ID(a)      cpustate->rdmem_id(cpustate->space, a)
51#define WRMEM_ID(a,d)   cpustate->wrmem_id(cpustate->space, a, d)
50#define RDMEM_ID(a)      cpustate->rdmem_id(*cpustate->space, a)
51#define WRMEM_ID(a,d)   cpustate->wrmem_id(*cpustate->space, a, d)
5252
5353#define IRQ_STATE   cpustate->irq_state
5454#define AFTER_CLI   cpustate->after_cli
trunk/src/emu/cpu/m6502/m4510.c
r17963r17964
346346static READ8_HANDLER( m4510_read_0000 )
347347{
348348   UINT8 result = 0x00;
349   m4510_Regs *cpustate = get_safe_token(&space->device());
349   m4510_Regs *cpustate = get_safe_token(&space.device());
350350
351351   switch(offset)
352352   {
r17963r17964
363363
364364static WRITE8_HANDLER( m4510_write_0000 )
365365{
366   m4510_Regs *cpustate = get_safe_token(&space->device());
366   m4510_Regs *cpustate = get_safe_token(&space.device());
367367
368368   switch(offset)
369369   {
r17963r17964
375375         break;
376376   }
377377
378   cpustate->out_port_func(0, m4510_get_port(downcast<legacy_cpu_device *>(&space->device())));
378   cpustate->out_port_func(0, m4510_get_port(downcast<legacy_cpu_device *>(&space.device())));
379379}
380380
381381static ADDRESS_MAP_START(m4510_mem, AS_PROGRAM, 8, legacy_cpu_device)
trunk/src/emu/cpu/m6502/m6502.c
r17963r17964
374374
375375static READ8_HANDLER( m6510_read_0000 )
376376{
377   m6502_Regs *cpustate = get_safe_token(&space->device());
377   m6502_Regs *cpustate = get_safe_token(&space.device());
378378   UINT8 result = 0x00;
379379
380380   switch(offset)
r17963r17964
400400
401401static WRITE8_HANDLER( m6510_write_0000 )
402402{
403   m6502_Regs *cpustate = get_safe_token(&space->device());
403   m6502_Regs *cpustate = get_safe_token(&space.device());
404404
405405   switch(offset)
406406   {
trunk/src/emu/cpu/m6502/m6509.c
r17963r17964
102102
103103static READ8_HANDLER( m6509_read_00000 )
104104{
105   m6509_Regs *cpustate = get_safe_token(&space->device());
105   m6509_Regs *cpustate = get_safe_token(&space.device());
106106
107107   return cpustate->pc_bank.b.h2;
108108}
109109
110110static READ8_HANDLER( m6509_read_00001 )
111111{
112   m6509_Regs *cpustate = get_safe_token(&space->device());
112   m6509_Regs *cpustate = get_safe_token(&space.device());
113113
114114   return cpustate->ind_bank.b.h2;
115115}
116116
117117static WRITE8_HANDLER( m6509_write_00000 )
118118{
119   m6509_Regs *cpustate = get_safe_token(&space->device());
119   m6509_Regs *cpustate = get_safe_token(&space.device());
120120
121121   cpustate->pc_bank.b.h2=data&0xf;
122122   cpustate->pc.w.h=cpustate->pc_bank.w.h;
r17963r17964
124124
125125static WRITE8_HANDLER( m6509_write_00001 )
126126{
127   m6509_Regs *cpustate = get_safe_token(&space->device());
127   m6509_Regs *cpustate = get_safe_token(&space.device());
128128
129129   cpustate->ind_bank.b.h2=data&0xf;
130130}
trunk/src/emu/cpu/powerpc/ppc403.c
r17963r17964
906906
907907/*********************************************************************************/
908908
909static UINT8 ppc403_read8(address_space *space, UINT32 a)
909static UINT8 ppc403_read8(address_space &space, UINT32 a)
910910{
911911   if(a >= 0x40000000 && a <= 0x4000000f)      /* Serial Port */
912912      return ppc403_spu_r(a);
913   return space->read_byte(a);
913   return space.read_byte(a);
914914}
915915
916916#define ppc403_read16   memory_read_word_32be
917917#define ppc403_read32   memory_read_dword_32be
918918
919static void ppc403_write8(address_space *space, UINT32 a, UINT8 d)
919static void ppc403_write8(address_space &space, UINT32 a, UINT8 d)
920920{
921921   if( a >= 0x40000000 && a <= 0x4000000f )      /* Serial Port */
922922   {
923923      ppc403_spu_w(a, d);
924924      return;
925925   }
926   space->write_byte(a, d);
926   space.write_byte(a, d);
927927}
928928
929929#define ppc403_write16   memory_write_word_32be
930930#define ppc403_write32   memory_write_dword_32be
931931
932static UINT16 ppc403_read16_unaligned(address_space *space, UINT32 a)
932static UINT16 ppc403_read16_unaligned(address_space &space, UINT32 a)
933933{
934934   fatalerror("ppc: Unaligned read16 %08X at %08X\n", a, ppc.pc);
935935   return 0;
936936}
937937
938static UINT32 ppc403_read32_unaligned(address_space *space, UINT32 a)
938static UINT32 ppc403_read32_unaligned(address_space &space, UINT32 a)
939939{
940940   fatalerror("ppc: Unaligned read32 %08X at %08X\n", a, ppc.pc);
941941   return 0;
942942}
943943
944static void ppc403_write16_unaligned(address_space *space, UINT32 a, UINT16 d)
944static void ppc403_write16_unaligned(address_space &space, UINT32 a, UINT16 d)
945945{
946946   fatalerror("ppc: Unaligned write16 %08X, %04X at %08X\n", a, d, ppc.pc);
947947}
948948
949static void ppc403_write32_unaligned(address_space *space, UINT32 a, UINT32 d)
949static void ppc403_write32_unaligned(address_space &space, UINT32 a, UINT32 d)
950950{
951951   fatalerror("ppc: Unaligned write32 %08X, %08X at %08X\n", a, d, ppc.pc);
952952}
trunk/src/emu/cpu/powerpc/ppc_mem.c
r17963r17964
6666
6767/***********************************************************************/
6868
69static UINT16 ppc_read16_unaligned(address_space *space, UINT32 a)
69static UINT16 ppc_read16_unaligned(address_space &space, UINT32 a)
7070{
7171   return ((UINT16)ppc.read8(space, a+0) << 8) | ((UINT16)ppc.read8(space, a+1) << 0);
7272}
7373
74static UINT32 ppc_read32_unaligned(address_space *space, UINT32 a)
74static UINT32 ppc_read32_unaligned(address_space &space, UINT32 a)
7575{
7676   return ((UINT32)ppc.read8(space, a+0) << 24) | ((UINT32)ppc.read8(space, a+1) << 16) |
7777               ((UINT32)ppc.read8(space, a+2) << 8) | ((UINT32)ppc.read8(space, a+3) << 0);
7878}
7979
80static UINT64 ppc_read64_unaligned(address_space *space, UINT32 a)
80static UINT64 ppc_read64_unaligned(address_space &space, UINT32 a)
8181{
8282   return ((UINT64)READ32(space, a+0) << 32) | (UINT64)(READ32(space, a+4));
8383}
8484
85static void ppc_write16_unaligned(address_space *space, UINT32 a, UINT16 d)
85static void ppc_write16_unaligned(address_space &space, UINT32 a, UINT16 d)
8686{
8787   ppc.write8(space, a+0, (UINT8)(d >> 8));
8888   ppc.write8(space, a+1, (UINT8)(d));
8989}
9090
91static void ppc_write32_unaligned(address_space *space, UINT32 a, UINT32 d)
91static void ppc_write32_unaligned(address_space &space, UINT32 a, UINT32 d)
9292{
9393   ppc.write8(space, a+0, (UINT8)(d >> 24));
9494   ppc.write8(space, a+1, (UINT8)(d >> 16));
r17963r17964
9696   ppc.write8(space, a+3, (UINT8)(d >> 0));
9797}
9898
99static void ppc_write64_unaligned(address_space *space, UINT32 a, UINT64 d)
99static void ppc_write64_unaligned(address_space &space, UINT32 a, UINT64 d)
100100{
101101   ppc.write32(space, a+0, (UINT32)(d >> 32));
102102   ppc.write32(space, a+4, (UINT32)(d));
r17963r17964
289289   return success;
290290}
291291
292static UINT8 ppc_read8_translated(address_space *space, offs_t address)
292static UINT8 ppc_read8_translated(address_space &space, offs_t address)
293293{
294294   ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_READ);
295   return space->read_byte(address);
295   return space.read_byte(address);
296296}
297297
298static UINT16 ppc_read16_translated(address_space *space, offs_t address)
298static UINT16 ppc_read16_translated(address_space &space, offs_t address)
299299{
300300   ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_READ);
301   return space->read_word(address);
301   return space.read_word(address);
302302}
303303
304static UINT32 ppc_read32_translated(address_space *space, offs_t address)
304static UINT32 ppc_read32_translated(address_space &space, offs_t address)
305305{
306306   ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_READ);
307   return space->read_dword(address);
307   return space.read_dword(address);
308308}
309309
310static UINT64 ppc_read64_translated(address_space *space, offs_t address)
310static UINT64 ppc_read64_translated(address_space &space, offs_t address)
311311{
312312   ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_READ);
313   return space->read_qword(address);
313   return space.read_qword(address);
314314}
315315
316static void ppc_write8_translated(address_space *space, offs_t address, UINT8 data)
316static void ppc_write8_translated(address_space &space, offs_t address, UINT8 data)
317317{
318318   ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_WRITE);
319   space->write_byte(address, data);
319   space.write_byte(address, data);
320320}
321321
322static void ppc_write16_translated(address_space *space, offs_t address, UINT16 data)
322static void ppc_write16_translated(address_space &space, offs_t address, UINT16 data)
323323{
324324   ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_WRITE);
325   space->write_word(address, data);
325   space.write_word(address, data);
326326}
327327
328static void ppc_write32_translated(address_space *space, offs_t address, UINT32 data)
328static void ppc_write32_translated(address_space &space, offs_t address, UINT32 data)
329329{
330330   ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_WRITE);
331   space->write_dword(address, data);
331   space.write_dword(address, data);
332332}
333333
334static void ppc_write64_translated(address_space *space, offs_t address, UINT64 data)
334static void ppc_write64_translated(address_space &space, offs_t address, UINT64 data)
335335{
336336   ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_WRITE);
337   space->write_qword(address, data);
337   space.write_qword(address, data);
338338}
339339
340340#ifndef PPC_DRC
341static UINT32 ppc_readop_translated(address_space *space, offs_t address)
341static UINT32 ppc_readop_translated(address_space &space, offs_t address)
342342{
343343   ppc_translate_address(&address, PPC_TRANSLATE_CODE | PPC_TRANSLATE_READ);
344   return space->read_dword(address);
344   return space.read_dword(address);
345345}
346346#endif
347347
trunk/src/emu/cpu/powerpc/ppccom.c
r17963r17964
23372337
23382338static READ8_HANDLER( ppc4xx_spu_r )
23392339{
2340   powerpc_state *ppc = *(powerpc_state **)downcast<legacy_cpu_device *>(&space->device())->token();
2340   powerpc_state *ppc = *(powerpc_state **)downcast<legacy_cpu_device *>(&space.device())->token();
23412341   UINT8 result = 0xff;
23422342
23432343   switch (offset)
r17963r17964
23642364
23652365static WRITE8_HANDLER( ppc4xx_spu_w )
23662366{
2367   powerpc_state *ppc = *(powerpc_state **)downcast<legacy_cpu_device *>(&space->device())->token();
2367   powerpc_state *ppc = *(powerpc_state **)downcast<legacy_cpu_device *>(&space.device())->token();
23682368   UINT8 oldstate, newstate;
23692369
23702370   if (PRINTF_SPU)
trunk/src/emu/cpu/powerpc/ppc.c
r17963r17964
330330
331331   /* PowerPC function pointers for memory accesses/exceptions */
332332   jmp_buf exception_jmpbuf;
333   UINT8 (*read8)(address_space *space, offs_t address);
334   UINT16 (*read16)(address_space *space, offs_t address);
335   UINT32 (*read32)(address_space *space, offs_t address);
336   UINT64 (*read64)(address_space *space, offs_t address);
337   void (*write8)(address_space *space, offs_t address, UINT8 data);
338   void (*write16)(address_space *space, offs_t address, UINT16 data);
339   void (*write32)(address_space *space, offs_t address, UINT32 data);
340   void (*write64)(address_space *space, offs_t address, UINT64 data);
341   UINT16 (*read16_unaligned)(address_space *space, offs_t address);
342   UINT32 (*read32_unaligned)(address_space *space, offs_t address);
343   UINT64 (*read64_unaligned)(address_space *space, offs_t address);
344   void (*write16_unaligned)(address_space *space, offs_t address, UINT16 data);
345   void (*write32_unaligned)(address_space *space, offs_t address, UINT32 data);
346   void (*write64_unaligned)(address_space *space, offs_t address, UINT64 data);
333   UINT8 (*read8)(address_space &space, offs_t address);
334   UINT16 (*read16)(address_space &space, offs_t address);
335   UINT32 (*read32)(address_space &space, offs_t address);
336   UINT64 (*read64)(address_space &space, offs_t address);
337   void (*write8)(address_space &space, offs_t address, UINT8 data);
338   void (*write16)(address_space &space, offs_t address, UINT16 data);
339   void (*write32)(address_space &space, offs_t address, UINT32 data);
340   void (*write64)(address_space &space, offs_t address, UINT64 data);
341   UINT16 (*read16_unaligned)(address_space &space, offs_t address);
342   UINT32 (*read32_unaligned)(address_space &space, offs_t address);
343   UINT64 (*read64_unaligned)(address_space &space, offs_t address);
344   void (*write16_unaligned)(address_space &space, offs_t address, UINT16 data);
345   void (*write32_unaligned)(address_space &space, offs_t address, UINT32 data);
346   void (*write64_unaligned)(address_space &space, offs_t address, UINT64 data);
347347
348348   void (* optable19[1024])(UINT32);
349349   void (* optable31[1024])(UINT32);
r17963r17964
786786   return 0;
787787}
788788
789static UINT8 ppc_read8_translated(address_space *space, offs_t address);
790static UINT16 ppc_read16_translated(address_space *space, offs_t address);
791static UINT32 ppc_read32_translated(address_space *space, offs_t address);
792static UINT64 ppc_read64_translated(address_space *space, offs_t address);
793static void ppc_write8_translated(address_space *space, offs_t address, UINT8 data);
794static void ppc_write16_translated(address_space *space, offs_t address, UINT16 data);
795static void ppc_write32_translated(address_space *space, offs_t address, UINT32 data);
796static void ppc_write64_translated(address_space *space, offs_t address, UINT64 data);
789static UINT8 ppc_read8_translated(address_space &space, offs_t address);
790static UINT16 ppc_read16_translated(address_space &space, offs_t address);
791static UINT32 ppc_read32_translated(address_space &space, offs_t address);
792static UINT64 ppc_read64_translated(address_space &space, offs_t address);
793static void ppc_write8_translated(address_space &space, offs_t address, UINT8 data);
794static void ppc_write16_translated(address_space &space, offs_t address, UINT16 data);
795static void ppc_write32_translated(address_space &space, offs_t address, UINT32 data);
796static void ppc_write64_translated(address_space &space, offs_t address, UINT64 data);
797797
798798INLINE void ppc_set_msr(UINT32 value)
799799{
trunk/src/emu/cpu/sh2/sh2drc.c
r17963r17964
149149INLINE UINT16 RW(sh2_state *sh2, offs_t A)
150150{
151151   if (A >= 0xe0000000)
152      return sh2_internal_r(sh2->internal, (A & 0x1fc)>>2, 0xffff << (((~A) & 2)*8)) >> (((~A) & 2)*8);
152      return sh2_internal_r(*sh2->internal, (A & 0x1fc)>>2, 0xffff << (((~A) & 2)*8)) >> (((~A) & 2)*8);
153153
154154   if (A >= 0xc0000000)
155155      return sh2->program->read_word(A);
r17963r17964
160160INLINE UINT32 RL(sh2_state *sh2, offs_t A)
161161{
162162   if (A >= 0xe0000000)
163      return sh2_internal_r(sh2->internal, (A & 0x1fc)>>2, 0xffffffff);
163      return sh2_internal_r(*sh2->internal, (A & 0x1fc)>>2, 0xffffffff);
164164
165165   if (A >= 0xc0000000)
166166      return sh2->program->read_dword(A);
trunk/src/emu/cpu/sh2/sh2comn.c
r17963r17964
2727INLINE UINT32 RL(sh2_state *sh2, offs_t A)
2828{
2929   if (A >= 0xe0000000)
30      return sh2_internal_r(sh2->internal, (A & 0x1fc)>>2, 0xffffffff);
30      return sh2_internal_r(*sh2->internal, (A & 0x1fc)>>2, 0xffffffff);
3131
3232   if (A >= 0xc0000000)
3333      return sh2->program->read_dword(A);
r17963r17964
4242{
4343   if (A >= 0xe0000000)
4444   {
45      sh2_internal_w(sh2->internal, (A & 0x1fc)>>2, V, 0xffffffff);
45      sh2_internal_w(*sh2->internal, (A & 0x1fc)>>2, V, 0xffffffff);
4646      return;
4747   }
4848
r17963r17964
508508
509509WRITE32_HANDLER( sh2_internal_w )
510510{
511   sh2_state *sh2 = GET_SH2(&space->device());
511   sh2_state *sh2 = GET_SH2(&space.device());
512512   UINT32 old;
513513
514514#ifdef USE_SH2DRC
r17963r17964
522522   //      logerror("sh2_internal_w:  Write %08x (%x), %08x @ %08x\n", 0xfffffe00+offset*4, offset, data, mem_mask);
523523
524524//    if(offset != 0x20)
525//        printf("sh2_internal_w:  Write %08x (%x), %08x @ %08x (PC %x)\n", 0xfffffe00+offset*4, offset, data, mem_mask, space->device().safe_pc());
525//        printf("sh2_internal_w:  Write %08x (%x), %08x @ %08x (PC %x)\n", 0xfffffe00+offset*4, offset, data, mem_mask, space.device().safe_pc());
526526
527527   switch( offset )
528528   {
r17963r17964
688688
689689READ32_HANDLER( sh2_internal_r )
690690{
691   sh2_state *sh2 = GET_SH2(&space->device());
691   sh2_state *sh2 = GET_SH2(&space.device());
692692
693693#ifdef USE_SH2DRC
694694   offset &= 0x7f;
trunk/src/emu/cpu/tms32051/tms32051.c
r17963r17964
413413
414414static READ16_HANDLER( cpuregs_r )
415415{
416   tms32051_state *cpustate = get_safe_token(&space->device());
416   tms32051_state *cpustate = get_safe_token(&space.device());
417417
418418   switch (offset)
419419   {
r17963r17964
458458
459459      case 0x28:   return 0;   // PDWSR
460460      default:
461      if(!space->debugger_access())
461      if(!space.debugger_access())
462462         fatalerror("32051: cpuregs_r: unimplemented memory-mapped register %02X at %04X\n", offset, cpustate->pc-1);
463463   }
464464
r17963r17964
467467
468468static WRITE16_HANDLER( cpuregs_w )
469469{
470   tms32051_state *cpustate = get_safe_token(&space->device());
470   tms32051_state *cpustate = get_safe_token(&space.device());
471471
472472   switch (offset)
473473   {
r17963r17964
536536
537537      case 0x28:   break;      // PDWSR
538538      default:
539      if(!space->debugger_access())
539      if(!space.debugger_access())
540540         fatalerror("32051: cpuregs_w: unimplemented memory-mapped register %02X, data %04X at %04X\n", offset, data, cpustate->pc-1);
541541   }
542542}
trunk/src/emu/cpu/sh4/sh3comn.c
r17963r17964
1212
1313WRITE32_HANDLER( sh3_internal_high_w )
1414{
15   sh4_state *sh4 = get_safe_token(&space->device());
15   sh4_state *sh4 = get_safe_token(&space.device());
1616   COMBINE_DATA(&sh4->m_sh3internal_upper[offset]);
1717
1818   switch (offset)
r17963r17964
7575
7676READ32_HANDLER( sh3_internal_high_r )
7777{
78   sh4_state *sh4 = get_safe_token(&space->device());
78   sh4_state *sh4 = get_safe_token(&space.device());
7979
8080   UINT32 ret = 0;
8181
r17963r17964
140140
141141READ32_HANDLER( sh3_internal_r )
142142{
143   sh4_state *sh4 = get_safe_token(&space->device());
143   sh4_state *sh4 = get_safe_token(&space.device());
144144
145145   if (offset<0x1000)
146146   {
r17963r17964
385385
386386WRITE32_HANDLER( sh3_internal_w )
387387{
388   sh4_state *sh4 = get_safe_token(&space->device());
388   sh4_state *sh4 = get_safe_token(&space.device());
389389
390390
391391
trunk/src/emu/cpu/sh4/sh4comn.c
r17963r17964
669669
670670WRITE32_HANDLER( sh4_internal_w )
671671{
672   sh4_state *sh4 = get_safe_token(&space->device());
672   sh4_state *sh4 = get_safe_token(&space.device());
673673   int a;
674674   UINT32 addr = (offset << 2) + 0xfe000000;
675675   offset = ((addr & 0xfc) >> 2) | ((addr & 0x1fe0000) >> 11);
r17963r17964
897897
898898READ32_HANDLER( sh4_internal_r )
899899{
900   sh4_state *sh4 = get_safe_token(&space->device());
900   sh4_state *sh4 = get_safe_token(&space.device());
901901
902902   if (sh4->cpu_type != CPU_TYPE_SH4)
903903      fatalerror("sh4_internal_r uses sh4->m[] with SH3\n");
r17963r17964
12471247
12481248READ64_HANDLER( sh4_tlb_r )
12491249{
1250   sh4_state *sh4 = get_safe_token(&space->device());
1250   sh4_state *sh4 = get_safe_token(&space.device());
12511251
12521252   int offs = offset*8;
12531253
r17963r17964
12651265
12661266WRITE64_HANDLER( sh4_tlb_w )
12671267{
1268   sh4_state *sh4 = get_safe_token(&space->device());
1268   sh4_state *sh4 = get_safe_token(&space.device());
12691269
12701270   int offs = offset*8;
12711271
trunk/src/emu/cpu/g65816/g65816.c
r17963r17964
585585
586586static WRITE8_HANDLER( wrmpya_w )
587587{
588   g65816i_cpu_struct *cpustate = get_safe_token(&space->device());
588   g65816i_cpu_struct *cpustate = get_safe_token(&space.device());
589589
590590   cpustate->wrmpya = data;
591591}
592592
593593static WRITE8_HANDLER( wrmpyb_w )
594594{
595   g65816i_cpu_struct *cpustate = get_safe_token(&space->device());
595   g65816i_cpu_struct *cpustate = get_safe_token(&space.device());
596596
597597   cpustate->wrmpyb = data;
598598   cpustate->rdmpy = cpustate->wrmpya * cpustate->wrmpyb;
r17963r17964
601601
602602static WRITE8_HANDLER( wrdivl_w )
603603{
604   g65816i_cpu_struct *cpustate = get_safe_token(&space->device());
604   g65816i_cpu_struct *cpustate = get_safe_token(&space.device());
605605
606606   cpustate->wrdiv = (data) | (cpustate->wrdiv & 0xff00);
607607}
608608
609609static WRITE8_HANDLER( wrdivh_w )
610610{
611   g65816i_cpu_struct *cpustate = get_safe_token(&space->device());
611   g65816i_cpu_struct *cpustate = get_safe_token(&space.device());
612612
613613   cpustate->wrdiv = (data << 8) | (cpustate->wrdiv & 0xff);
614614}
615615
616616static WRITE8_HANDLER( wrdvdd_w )
617617{
618   g65816i_cpu_struct *cpustate = get_safe_token(&space->device());
618   g65816i_cpu_struct *cpustate = get_safe_token(&space.device());
619619   UINT16 quotient, remainder;
620620
621621   cpustate->dvdd = data;
r17963r17964
629629
630630static WRITE8_HANDLER( memsel_w )
631631{
632   g65816i_cpu_struct *cpustate = get_safe_token(&space->device());
632   g65816i_cpu_struct *cpustate = get_safe_token(&space.device());
633633   cpustate->fastROM = data & 1;
634634}
635635
636636static READ8_HANDLER( rddivl_r )
637637{
638   g65816i_cpu_struct *cpustate = get_safe_token(&space->device());
638   g65816i_cpu_struct *cpustate = get_safe_token(&space.device());
639639   return cpustate->rddiv & 0xff;
640640}
641641
642642static READ8_HANDLER( rddivh_r )
643643{
644   g65816i_cpu_struct *cpustate = get_safe_token(&space->device());
644   g65816i_cpu_struct *cpustate = get_safe_token(&space.device());
645645   return cpustate->rddiv >> 8;
646646}
647647
648648static READ8_HANDLER( rdmpyl_r )
649649{
650   g65816i_cpu_struct *cpustate = get_safe_token(&space->device());
650   g65816i_cpu_struct *cpustate = get_safe_token(&space.device());
651651   return cpustate->rdmpy & 0xff;
652652}
653653
654654static READ8_HANDLER( rdmpyh_r )
655655{
656   g65816i_cpu_struct *cpustate = get_safe_token(&space->device());
656   g65816i_cpu_struct *cpustate = get_safe_token(&space.device());
657657   return cpustate->rdmpy >> 8;
658658}
659659
trunk/src/emu/cpu/g65816/g65816op.h
r17963r17964
8585INLINE uint g65816i_read_8_vector(g65816i_cpu_struct *cpustate, uint address)
8686{
8787   if (READ_VECTOR)
88      return READ_VECTOR(cpustate->program, address);
88      return READ_VECTOR(*cpustate->program, address);
8989   else
9090      return g65816i_read_8_normal(cpustate, address);
9191}
trunk/src/emu/cpu/mips/r3000.c
r17963r17964
9898#define SETPC(R,x)      do { (R)->nextpc = (x); } while (0)
9999#define SETPCL(R,x,l)   do { (R)->nextpc = (x); (R)->r[l] = (R)->pc + 4; } while (0)
100100
101#define RBYTE(R,x)      (*(R)->cur.read_byte)((R)->program, x)
102#define RWORD(R,x)      (*(R)->cur.read_word)((R)->program, x)
103#define RLONG(R,x)      (*(R)->cur.read_dword)((R)->program, x)
101#define RBYTE(R,x)      (*(R)->cur.read_byte)(*(R)->program, x)
102#define RWORD(R,x)      (*(R)->cur.read_word)(*(R)->program, x)
103#define RLONG(R,x)      (*(R)->cur.read_dword)(*(R)->program, x)
104104
105#define WBYTE(R,x,v)   (*(R)->cur.write_byte)((R)->program, x, v)
106#define WWORD(R,x,v)   (*(R)->cur.write_word)((R)->program, x, v)
107#define WLONG(R,x,v)   (*(R)->cur.write_dword)((R)->program, x, v)
105#define WBYTE(R,x,v)   (*(R)->cur.write_byte)(*(R)->program, x, v)
106#define WWORD(R,x,v)   (*(R)->cur.write_word)(*(R)->program, x, v)
107#define WLONG(R,x,v)   (*(R)->cur.write_dword)(*(R)->program, x, v)
108108
109109#define SR            cpr[0][COP0_Status]
110110#define CAUSE         cpr[0][COP0_Cause]
r17963r17964
187187static void swl_le(r3000_state *r3000, UINT32 op);
188188static void swr_le(r3000_state *r3000, UINT32 op);
189189
190static UINT8 readcache_be(address_space *space, offs_t offset);
191static UINT16 readcache_be_word(address_space *space, offs_t offset);
192static UINT32 readcache_be_dword(address_space *space, offs_t offset);
193static void writecache_be(address_space *space, offs_t offset, UINT8 data);
194static void writecache_be_word(address_space *space, offs_t offset, UINT16 data);
195static void writecache_be_dword(address_space *space, offs_t offset, UINT32 data);
190static UINT8 readcache_be(address_space &space, offs_t offset);
191static UINT16 readcache_be_word(address_space &space, offs_t offset);
192static UINT32 readcache_be_dword(address_space &space, offs_t offset);
193static void writecache_be(address_space &space, offs_t offset, UINT8 data);
194static void writecache_be_word(address_space &space, offs_t offset, UINT16 data);
195static void writecache_be_dword(address_space &space, offs_t offset, UINT32 data);
196196
197static UINT8 readcache_le(address_space *space, offs_t offset);
198static UINT16 readcache_le_word(address_space *space, offs_t offset);
199static UINT32 readcache_le_dword(address_space *space, offs_t offset);
200static void writecache_le(address_space *space, offs_t offset, UINT8 data);
201static void writecache_le_word(address_space *space, offs_t offset, UINT16 data);
202static void writecache_le_dword(address_space *space, offs_t offset, UINT32 data);
197static UINT8 readcache_le(address_space &space, offs_t offset);
198static UINT16 readcache_le_word(address_space &space, offs_t offset);
199static UINT32 readcache_le_dword(address_space &space, offs_t offset);
200static void writecache_le(address_space &space, offs_t offset, UINT8 data);
201static void writecache_le_word(address_space &space, offs_t offset, UINT16 data);
202static void writecache_le_dword(address_space &space, offs_t offset, UINT32 data);
203203
204204
205205
r17963r17964
892892    CACHE I/O
893893***************************************************************************/
894894
895static UINT8 readcache_be(address_space *space, offs_t offset)
895static UINT8 readcache_be(address_space &space, offs_t offset)
896896{
897   r3000_state *r3000 = get_safe_token(&space->device());
897   r3000_state *r3000 = get_safe_token(&space.device());
898898   offset &= 0x1fffffff;
899899   return (offset * 4 < r3000->cache_size) ? r3000->cache[BYTE4_XOR_BE(offset)] : 0xff;
900900}
901901
902static UINT16 readcache_be_word(address_space *space, offs_t offset)
902static UINT16 readcache_be_word(address_space &space, offs_t offset)
903903{
904   r3000_state *r3000 = get_safe_token(&space->device());
904   r3000_state *r3000 = get_safe_token(&space.device());
905905   offset &= 0x1fffffff;
906906   return (offset * 4 < r3000->cache_size) ? *(UINT16 *)&r3000->cache[WORD_XOR_BE(offset)] : 0xffff;
907907}
908908
909static UINT32 readcache_be_dword(address_space *space, offs_t offset)
909static UINT32 readcache_be_dword(address_space &space, offs_t offset)
910910{
911   r3000_state *r3000 = get_safe_token(&space->device());
911   r3000_state *r3000 = get_safe_token(&space.device());
912912   offset &= 0x1fffffff;
913913   return (offset * 4 < r3000->cache_size) ? *(UINT32 *)&r3000->cache[offset] : 0xffffffff;
914914}
915915
916static void writecache_be(address_space *space, offs_t offset, UINT8 data)
916static void writecache_be(address_space &space, offs_t offset, UINT8 data)
917917{
918   r3000_state *r3000 = get_safe_token(&space->device());
918   r3000_state *r3000 = get_safe_token(&space.device());
919919   offset &= 0x1fffffff;
920920   if (offset * 4 < r3000->cache_size) r3000->cache[BYTE4_XOR_BE(offset)] = data;
921921}
922922
923static void writecache_be_word(address_space *space, offs_t offset, UINT16 data)
923static void writecache_be_word(address_space &space, offs_t offset, UINT16 data)
924924{
925   r3000_state *r3000 = get_safe_token(&space->device());
925   r3000_state *r3000 = get_safe_token(&space.device());
926926   offset &= 0x1fffffff;
927927   if (offset * 4 < r3000->cache_size) *(UINT16 *)&r3000->cache[WORD_XOR_BE(offset)] = data;
928928}
929929
930static void writecache_be_dword(address_space *space, offs_t offset, UINT32 data)
930static void writecache_be_dword(address_space &space, offs_t offset, UINT32 data)
931931{
932   r3000_state *r3000 = get_safe_token(&space->device());
932   r3000_state *r3000 = get_safe_token(&space.device());
933933   offset &= 0x1fffffff;
934934   if (offset * 4 < r3000->cache_size) *(UINT32 *)&r3000->cache[offset] = data;
935935}
936936
937static UINT8 readcache_le(address_space *space, offs_t offset)
937static UINT8 readcache_le(address_space &space, offs_t offset)
938938{
939   r3000_state *r3000 = get_safe_token(&space->device());
939   r3000_state *r3000 = get_safe_token(&space.device());
940940   offset &= 0x1fffffff;
941941   return (offset * 4 < r3000->cache_size) ? r3000->cache[BYTE4_XOR_LE(offset)] : 0xff;
942942}
943943
944static UINT16 readcache_le_word(address_space *space, offs_t offset)
944static UINT16 readcache_le_word(address_space &space, offs_t offset)
945945{
946   r3000_state *r3000 = get_safe_token(&space->device());
946   r3000_state *r3000 = get_safe_token(&space.device());
947947   offset &= 0x1fffffff;
948948   return (offset * 4 < r3000->cache_size) ? *(UINT16 *)&r3000->cache[WORD_XOR_LE(offset)] : 0xffff;
949949}
950950
951static UINT32 readcache_le_dword(address_space *space, offs_t offset)
951static UINT32 readcache_le_dword(address_space &space, offs_t offset)
952952{
953   r3000_state *r3000 = get_safe_token(&space->device());
953   r3000_state *r3000 = get_safe_token(&space.device());
954954   offset &= 0x1fffffff;
955955   return (offset * 4 < r3000->cache_size) ? *(UINT32 *)&r3000->cache[offset] : 0xffffffff;
956956}
957957
958static void writecache_le(address_space *space, offs_t offset, UINT8 data)
958static void writecache_le(address_space &space, offs_t offset, UINT8 data)
959959{
960   r3000_state *r3000 = get_safe_token(&space->device());
960   r3000_state *r3000 = get_safe_token(&space.device());
961961   offset &= 0x1fffffff;
962962   if (offset * 4 < r3000->cache_size) r3000->cache[BYTE4_XOR_LE(offset)] = data;
963963}
964964
965static void writecache_le_word(address_space *space, offs_t offset, UINT16 data)
965static void writecache_le_word(address_space &space, offs_t offset, UINT16 data)
966966{
967   r3000_state *r3000 = get_safe_token(&space->device());
967   r3000_state *r3000 = get_safe_token(&space.device());
968968   offset &= 0x1fffffff;
969969   if (offset * 4 < r3000->cache_size) *(UINT16 *)&r3000->cache[WORD_XOR_LE(offset)] = data;
970970}
971971
972static void writecache_le_dword(address_space *space, offs_t offset, UINT32 data)
972static void writecache_le_dword(address_space &space, offs_t offset, UINT32 data)
973973{
974   r3000_state *r3000 = get_safe_token(&space->device());
974   r3000_state *r3000 = get_safe_token(&space.device());
975975   offset &= 0x1fffffff;
976976   if (offset * 4 < r3000->cache_size) *(UINT32 *)&r3000->cache[offset] = data;
977977}
trunk/src/emu/cpu/tms7000/tms7000.c
r17963r17964
557557
558558static WRITE8_HANDLER( tms70x0_pf_w )   /* Perpherial file write */
559559{
560   tms7000_state *cpustate = get_safe_token(&space->device());
560   tms7000_state *cpustate = get_safe_token(&space.device());
561561   UINT8   temp1, temp2, temp3;
562562
563563   switch( offset )
r17963r17964
626626
627627static READ8_HANDLER( tms70x0_pf_r )   /* Perpherial file read */
628628{
629   tms7000_state *cpustate = get_safe_token(&space->device());
629   tms7000_state *cpustate = get_safe_token(&space.device());
630630   UINT8 result;
631631   UINT8   temp1, temp2, temp3;
632632
r17963r17964
719719}
720720
721721static WRITE8_HANDLER( tms7000_internal_w ) {
722   tms7000_state *cpustate = get_safe_token(&space->device());
722   tms7000_state *cpustate = get_safe_token(&space.device());
723723   cpustate->rf[ offset ] = data;
724724}
725725
726726static READ8_HANDLER( tms7000_internal_r ) {
727   tms7000_state *cpustate = get_safe_token(&space->device());
727   tms7000_state *cpustate = get_safe_token(&space.device());
728728   return cpustate->rf[ offset ];
729729}
730730
trunk/src/emu/cpu/tms9900/99xxcore.h
r17963r17964
529529READ16_HANDLER(ti990_10_internal_r)
530530{
531531   //return cpustate->ROM[offset];
532   return space->read_word(0x1ffc00+offset);
532   return space.read_word(0x1ffc00+offset);
533533}
534534
535535#endif
r17963r17964
541541*/
542542READ8_HANDLER(tms9995_internal1_r)
543543{
544   tms99xx_state *cpustate = get_safe_token(&space->device());
544   tms99xx_state *cpustate = get_safe_token(&space.device());
545545   return cpustate->RAM[offset];
546546}
547547
548548WRITE8_HANDLER(tms9995_internal1_w)
549549{
550   tms99xx_state *cpustate = get_safe_token(&space->device());
550   tms99xx_state *cpustate = get_safe_token(&space.device());
551551   cpustate->RAM[offset]=data;
552552}
553553
r17963r17964
556556*/
557557READ8_HANDLER(tms9995_internal2_r)
558558{
559   tms99xx_state *cpustate = get_safe_token(&space->device());
559   tms99xx_state *cpustate = get_safe_token(&space.device());
560560   return cpustate->RAM[offset+0xfc];
561561}
562562
563563WRITE8_HANDLER(tms9995_internal2_w)
564564{
565   tms99xx_state *cpustate = get_safe_token(&space->device());
565   tms99xx_state *cpustate = get_safe_token(&space.device());
566566   cpustate->RAM[offset+0xfc]=data;
567567}
568568
r17963r17964
10761076#if (TMS99XX_MODEL == TI990_10_ID)
10771077   READ8_HANDLER(ti990_10_mapper_cru_r)
10781078   {
1079      tms99xx_state *cpustate = get_safe_token(&space->device());
1079      tms99xx_state *cpustate = get_safe_token(&space.device());
10801080      int reply = 0;
10811081
10821082      switch(cpustate->mapper_cru_read_register)
r17963r17964
11151115
11161116   WRITE8_HANDLER(ti990_10_mapper_cru_w)
11171117   {
1118      tms99xx_state *cpustate = get_safe_token(&space->device());
1118      tms99xx_state *cpustate = get_safe_token(&space.device());
11191119      switch (offset)
11201120      {
11211121      case 0:
r17963r17964
11571157
11581158   READ8_HANDLER(ti990_10_eir_cru_r)
11591159   {
1160      tms99xx_state *cpustate = get_safe_token(&space->device());
1160      tms99xx_state *cpustate = get_safe_token(&space.device());
11611161      return (offset == 1) ? (cpustate->error_interrupt_register & 0xff) : 0;
11621162   }
11631163
11641164   WRITE8_HANDLER(ti990_10_eir_cru_w)
11651165   {
1166      tms99xx_state *cpustate = get_safe_token(&space->device());
1166      tms99xx_state *cpustate = get_safe_token(&space.device());
11671167      if (offset < 4)   /* does not work for EIR_MAPERR */
11681168      {
11691169         cpustate->error_interrupt_register &= ~ (1 << offset);
trunk/src/emu/cpu/h6280/h6280.c
r17963r17964
288288READ8_HANDLER( h6280_irq_status_r )
289289{
290290   int status;
291   h6280_Regs *cpustate = get_safe_token(&space->device());
291   h6280_Regs *cpustate = get_safe_token(&space.device());
292292
293293   switch (offset&3)
294294   {
r17963r17964
307307
308308WRITE8_HANDLER( h6280_irq_status_w )
309309{
310   h6280_Regs *cpustate = get_safe_token(&space->device());
310   h6280_Regs *cpustate = get_safe_token(&space.device());
311311   cpustate->io_buffer=data;
312312   switch (offset&3)
313313   {
r17963r17964
326326READ8_HANDLER( h6280_timer_r )
327327{
328328   /* only returns countdown */
329   h6280_Regs *cpustate = get_safe_token(&space->device());
329   h6280_Regs *cpustate = get_safe_token(&space.device());
330330   return ((cpustate->timer_value >> 10)&0x7F)|(cpustate->io_buffer&0x80);
331331}
332332
333333WRITE8_HANDLER( h6280_timer_w )
334334{
335   h6280_Regs *cpustate = get_safe_token(&space->device());
335   h6280_Regs *cpustate = get_safe_token(&space.device());
336336   cpustate->io_buffer=data;
337337   switch (offset & 1) {
338338      case 0: /* Counter preload */
trunk/src/emu/cpu/m6800/m6800.c
r17963r17964
13961396
13971397READ8_HANDLER( m6801_io_r )
13981398{
1399   m6800_state *cpustate = get_safe_token(&space->device());
1399   m6800_state *cpustate = get_safe_token(&space.device());
14001400
14011401   UINT8 data = 0;
14021402
r17963r17964
14271427      break;
14281428
14291429   case IO_P3DDR:
1430      logerror("M6801 '%s' Port 3 DDR is a write-only register\n", space->device().tag());
1430      logerror("M6801 '%s' Port 3 DDR is a write-only register\n", space.device().tag());
14311431      break;
14321432
14331433   case IO_P4DDR:
r17963r17964
14351435      break;
14361436
14371437   case IO_P3DATA:
1438      if (!space->debugger_access())
1438      if (!space.debugger_access())
14391439      {
14401440         if (cpustate->p3csr_is3_flag_read)
14411441         {
1442            //logerror("M6801 '%s' Cleared IS3\n", space->device().tag());
1442            //logerror("M6801 '%s' Cleared IS3\n", space.device().tag());
14431443            cpustate->p3csr &= ~M6801_P3CSR_IS3_FLAG;
14441444            cpustate->p3csr_is3_flag_read = 0;
14451445         }
r17963r17964
14561456         data = (cpustate->io->read_byte(M6801_PORT3) & (cpustate->port3_ddr ^ 0xff))
14571457            | (cpustate->port3_data & cpustate->port3_ddr);
14581458
1459      if (!space->debugger_access())
1459      if (!space.debugger_access())
14601460      {
14611461         cpustate->port3_latched = 0;
14621462
r17963r17964
14811481      break;
14821482
14831483   case IO_CH:
1484      if(!(cpustate->pending_tcsr&TCSR_TOF) && !space->debugger_access())
1484      if(!(cpustate->pending_tcsr&TCSR_TOF) && !space.debugger_access())
14851485      {
14861486         cpustate->tcsr &= ~TCSR_TOF;
14871487         MODIFIED_tcsr;
r17963r17964
14941494      break;
14951495
14961496   case IO_OCRH:
1497      if(!(cpustate->pending_tcsr&TCSR_OCF) && !space->debugger_access())
1497      if(!(cpustate->pending_tcsr&TCSR_OCF) && !space.debugger_access())
14981498      {
14991499         cpustate->tcsr &= ~TCSR_OCF;
15001500         MODIFIED_tcsr;
r17963r17964
15031503      break;
15041504
15051505   case IO_OCRL:
1506      if(!(cpustate->pending_tcsr&TCSR_OCF) && !space->debugger_access())
1506      if(!(cpustate->pending_tcsr&TCSR_OCF) && !space.debugger_access())
15071507      {
15081508         cpustate->tcsr &= ~TCSR_OCF;
15091509         MODIFIED_tcsr;
r17963r17964
15121512      break;
15131513
15141514   case IO_ICRH:
1515      if(!(cpustate->pending_tcsr&TCSR_ICF) && !space->debugger_access())
1515      if(!(cpustate->pending_tcsr&TCSR_ICF) && !space.debugger_access())
15161516      {
15171517         cpustate->tcsr &= ~TCSR_ICF;
15181518         MODIFIED_tcsr;
r17963r17964
15251525      break;
15261526
15271527   case IO_P3CSR:
1528      if ((cpustate->p3csr & M6801_P3CSR_IS3_FLAG) && !space->debugger_access())
1528      if ((cpustate->p3csr & M6801_P3CSR_IS3_FLAG) && !space.debugger_access())
15291529      {
15301530         cpustate->p3csr_is3_flag_read = 1;
15311531      }
r17963r17964
15381538      break;
15391539
15401540   case IO_TRCSR:
1541      if (!space->debugger_access())
1541      if (!space.debugger_access())
15421542      {
15431543         if (cpustate->trcsr & M6800_TRCSR_TDRE)
15441544         {
r17963r17964
15601560      break;
15611561
15621562   case IO_RDR:
1563      if (!space->debugger_access())
1563      if (!space.debugger_access())
15641564      {
15651565         if (cpustate->trcsr_read_orfe)
15661566         {
1567            //logerror("M6801 '%s' Cleared ORFE\n", space->device().tag());
1567            //logerror("M6801 '%s' Cleared ORFE\n", space.device().tag());
15681568            cpustate->trcsr_read_orfe = 0;
15691569            cpustate->trcsr &= ~M6800_TRCSR_ORFE;
15701570         }
15711571
15721572         if (cpustate->trcsr_read_rdrf)
15731573         {
1574            //logerror("M6801 '%s' Cleared RDRF\n", space->device().tag());
1574            //logerror("M6801 '%s' Cleared RDRF\n", space.device().tag());
15751575            cpustate->trcsr_read_rdrf = 0;
15761576            cpustate->trcsr &= ~M6800_TRCSR_RDRF;
15771577         }
r17963r17964
16001600   case IO_ICR2H:
16011601   case IO_ICR2L:
16021602   default:
1603      logerror("M6801 '%s' PC %04x: warning - read from reserved internal register %02x\n",space->device().tag(),space->device().safe_pc(),offset);
1603      logerror("M6801 '%s' PC %04x: warning - read from reserved internal register %02x\n",space.device().tag(),space.device().safe_pc(),offset);
16041604   }
16051605
16061606   return data;
r17963r17964
16081608
16091609WRITE8_HANDLER( m6801_io_w )
16101610{
1611   m6800_state *cpustate = get_safe_token(&space->device());
1611   m6800_state *cpustate = get_safe_token(&space.device());
16121612
16131613   switch (offset)
16141614   {
16151615   case IO_P1DDR:
1616      //logerror("M6801 '%s' Port 1 Data Direction Register: %02x\n", space->device().tag(), data);
1616      //logerror("M6801 '%s' Port 1 Data Direction Register: %02x\n", space.device().tag(), data);
16171617
16181618      if (cpustate->port1_ddr != data)
16191619      {
r17963r17964
16261626      break;
16271627
16281628   case IO_P2DDR:
1629      //logerror("M6801 '%s' Port 2 Data Direction Register: %02x\n", space->device().tag(), data);
1629      //logerror("M6801 '%s' Port 2 Data Direction Register: %02x\n", space.device().tag(), data);
16301630
16311631      if (cpustate->port2_ddr != data)
16321632      {
r17963r17964
16341634         write_port2(cpustate);
16351635
16361636         if (cpustate->port2_ddr & 2)
1637            logerror("CPU '%s' PC %04x: warning - port 2 bit 1 set as output (OLVL) - not supported\n",space->device().tag(),space->device().safe_pc());
1637            logerror("CPU '%s' PC %04x: warning - port 2 bit 1 set as output (OLVL) - not supported\n",space.device().tag(),space.device().safe_pc());
16381638      }
16391639      break;
16401640
16411641   case IO_P1DATA:
1642      //logerror("M6801 '%s' Port 1 Data Register: %02x\n", space->device().tag(), data);
1642      //logerror("M6801 '%s' Port 1 Data Register: %02x\n", space.device().tag(), data);
16431643
16441644      cpustate->port1_data = data;
16451645      if(cpustate->port1_ddr == 0xff)
r17963r17964
16491649      break;
16501650
16511651   case IO_P2DATA:
1652      //logerror("M6801 '%s' Port 2 Data Register: %02x\n", space->device().tag(), data);
1652      //logerror("M6801 '%s' Port 2 Data Register: %02x\n", space.device().tag(), data);
16531653
16541654      cpustate->port2_data = data;
16551655      cpustate->port2_written = 1;
r17963r17964
16571657      break;
16581658
16591659   case IO_P3DDR:
1660      //logerror("M6801 '%s' Port 3 Data Direction Register: %02x\n", space->device().tag(), data);
1660      //logerror("M6801 '%s' Port 3 Data Direction Register: %02x\n", space.device().tag(), data);
16611661
16621662      if (cpustate->port3_ddr != data)
16631663      {
r17963r17964
16701670      break;
16711671
16721672   case IO_P4DDR:
1673      //logerror("M6801 '%s' Port 4 Data Direction Register: %02x\n", space->device().tag(), data);
1673      //logerror("M6801 '%s' Port 4 Data Direction Register: %02x\n", space.device().tag(), data);
16741674
16751675      if (cpustate->port4_ddr != data)
16761676      {
r17963r17964
16831683      break;
16841684
16851685   case IO_P3DATA:
1686      //logerror("M6801 '%s' Port 3 Data Register: %02x\n", space->device().tag(), data);
1686      //logerror("M6801 '%s' Port 3 Data Register: %02x\n", space.device().tag(), data);
16871687
16881688      if (cpustate->p3csr_is3_flag_read)
16891689      {
1690         //logerror("M6801 '%s' Cleared IS3\n", space->device().tag());
1690         //logerror("M6801 '%s' Cleared IS3\n", space.device().tag());
16911691         cpustate->p3csr &= ~M6801_P3CSR_IS3_FLAG;
16921692         cpustate->p3csr_is3_flag_read = 0;
16931693      }
r17963r17964
17101710      break;
17111711
17121712   case IO_P4DATA:
1713      //logerror("M6801 '%s' Port 4 Data Register: %02x\n", space->device().tag(), data);
1713      //logerror("M6801 '%s' Port 4 Data Register: %02x\n", space.device().tag(), data);
17141714
17151715      cpustate->port4_data = data;
17161716      if(cpustate->port4_ddr == 0xff)
r17963r17964
17201720      break;
17211721
17221722   case IO_TCSR:
1723      //logerror("M6801 '%s' Timer Control and Status Register: %02x\n", space->device().tag(), data);
1723      //logerror("M6801 '%s' Timer Control and Status Register: %02x\n", space.device().tag(), data);
17241724
17251725      cpustate->tcsr = data;
17261726      cpustate->pending_tcsr &= cpustate->tcsr;
r17963r17964
17301730      break;
17311731
17321732   case IO_CH:
1733      //logerror("M6801 '%s' Counter High Register: %02x\n", space->device().tag(), data);
1733      //logerror("M6801 '%s' Counter High Register: %02x\n", space.device().tag(), data);
17341734
17351735      cpustate->latch09 = data & 0xff;   /* 6301 only */
17361736      CT  = 0xfff8;
r17963r17964
17391739      break;
17401740
17411741   case IO_CL:   /* 6301 only */
1742      //logerror("M6801 '%s' Counter Low Register: %02x\n", space->device().tag(), data);
1742      //logerror("M6801 '%s' Counter Low Register: %02x\n", space.device().tag(), data);
17431743
17441744      CT = (cpustate->latch09 << 8) | (data & 0xff);
17451745      TOH = CTH;
r17963r17964
17471747      break;
17481748
17491749   case IO_OCRH:
1750      //logerror("M6801 '%s' Output Compare High Register: %02x\n", space->device().tag(), data);
1750      //logerror("M6801 '%s' Output Compare High Register: %02x\n", space.device().tag(), data);
17511751
17521752      if( cpustate->output_compare.b.h != data)
17531753      {
r17963r17964
17571757      break;
17581758
17591759   case IO_OCRL:
1760      //logerror("M6801 '%s' Output Compare Low Register: %02x\n", space->device().tag(), data);
1760      //logerror("M6801 '%s' Output Compare Low Register: %02x\n", space.device().tag(), data);
17611761
17621762      if( cpustate->output_compare.b.l != data)
17631763      {
r17963r17964
17691769   case IO_ICRH:
17701770   case IO_ICRL:
17711771   case IO_RDR:
1772      //logerror("CPU '%s' PC %04x: warning - write %02x to read only internal register %02x\n",space->device().tag(),space->device().safe_pc(),data,offset);
1772      //logerror("CPU '%s' PC %04x: warning - write %02x to read only internal register %02x\n",space.device().tag(),space.device().safe_pc(),data,offset);
17731773      break;
17741774
17751775   case IO_P3CSR:
1776      //logerror("M6801 '%s' Port 3 Control and Status Register: %02x\n", space->device().tag(), data);
1776      //logerror("M6801 '%s' Port 3 Control and Status Register: %02x\n", space.device().tag(), data);
17771777
17781778      cpustate->p3csr = data;
17791779      break;
17801780
17811781   case IO_RMCR:
1782      //logerror("M6801 '%s' Rate and Mode Control Register: %02x\n", space->device().tag(), data);
1782      //logerror("M6801 '%s' Rate and Mode Control Register: %02x\n", space.device().tag(), data);
17831783
17841784      set_rmcr(cpustate, data);
17851785      break;
17861786
17871787   case IO_TRCSR:
1788      //logerror("M6801 '%s' Transmit/Receive Control and Status Register: %02x\n", space->device().tag(), data);
1788      //logerror("M6801 '%s' Transmit/Receive Control and Status Register: %02x\n", space.device().tag(), data);
17891789
17901790      if ((data & M6800_TRCSR_TE) && !(cpustate->trcsr & M6800_TRCSR_TE))
17911791      {
r17963r17964
18031803      break;
18041804
18051805   case IO_TDR:
1806      //logerror("M6800 '%s' Transmit Data Register: %02x\n", space->device().tag(), data);
1806      //logerror("M6800 '%s' Transmit Data Register: %02x\n", space.device().tag(), data);
18071807
18081808      if (cpustate->trcsr_read_tdre)
18091809      {
r17963r17964
18141814      break;
18151815
18161816   case IO_RCR:
1817      //logerror("M6801 '%s' RAM Control Register: %02x\n", space->device().tag(), data);
1817      //logerror("M6801 '%s' RAM Control Register: %02x\n", space.device().tag(), data);
18181818
18191819      cpustate->ram_ctrl = data;
18201820      break;
r17963r17964
18311831   case IO_ICR2H:
18321832   case IO_ICR2L:
18331833   default:
1834      logerror("M6801 '%s' PC %04x: warning - write %02x to reserved internal register %02x\n",space->device().tag(),space->device().safe_pc(),data,offset);
1834      logerror("M6801 '%s' PC %04x: warning - write %02x to reserved internal register %02x\n",space.device().tag(),space.device().safe_pc(),data,offset);
18351835      break;
18361836   }
18371837}
trunk/src/emu/devcb.c
r17963r17964
6666   static ioport_port *resolve_port(const char *tag, device_t &current);
6767   static device_t *resolve_device(int index, const char *tag, device_t &current);
6868   static device_execute_interface *resolve_execute_interface(const char *tag, device_t &current);
69   static address_space *resolve_space(int index, const char *tag, device_t &current);
69   static address_space &resolve_space(int index, const char *tag, device_t &current);
7070};
7171
7272
r17963r17964
131131//  given a device tag and a space index
132132//-------------------------------------------------
133133
134address_space *devcb_resolver::resolve_space(int index, const char *tag, device_t &current)
134address_space &devcb_resolver::resolve_space(int index, const char *tag, device_t &current)
135135{
136136   // find our target device
137137   device_t *targetdev = current.siblingdevice(tag);
r17963r17964
148148   if (result == NULL)
149149      throw emu_fatalerror("Unable to find device '%s' space %d (requested by %s '%s')", tag, index, current.name(), current.tag());
150150
151   return result;
151   return *result;
152152}
153153
154154
r17963r17964
201201         break;
202202
203203      case DEVCB_TYPE_LEGACY_SPACE:
204         m_object.space = devcb_resolver::resolve_space(desc.index, desc.tag, device);
204         m_object.space = &devcb_resolver::resolve_space(desc.index, desc.tag, device);
205205         m_helper.read8_space = desc.readspace;
206206         *static_cast<devcb_read_line_delegate *>(this) = devcb_read_line_delegate(&devcb_resolved_read_line::from_read8, desc.name, this);
207207         break;
r17963r17964
295295         break;
296296
297297      case DEVCB_TYPE_LEGACY_SPACE:
298         m_object.space = devcb_resolver::resolve_space(desc.index, desc.tag, device);
298         m_object.space = &devcb_resolver::resolve_space(desc.index, desc.tag, device);
299299         m_helper.write8_space = desc.writespace;
300300         *static_cast<devcb_write_line_delegate *>(this) = devcb_write_line_delegate(&devcb_resolved_write_line::to_write8, desc.name, this);
301301         break;
r17963r17964
403403         break;
404404
405405      case DEVCB_TYPE_LEGACY_SPACE:
406         m_object.space = devcb_resolver::resolve_space(desc.index, desc.tag, device);
406         m_object.space = &devcb_resolver::resolve_space(desc.index, desc.tag, device);
407407         *static_cast<devcb_read8_delegate *>(this) = devcb_read8_delegate(desc.readspace, desc.name, m_object.space);
408408         break;
409409
r17963r17964
510510         break;
511511
512512      case DEVCB_TYPE_LEGACY_SPACE:
513         m_object.space = devcb_resolver::resolve_space(desc.index, desc.tag, device);
513         m_object.space = &devcb_resolver::resolve_space(desc.index, desc.tag, device);
514514         *static_cast<devcb_write8_delegate *>(this) = devcb_write8_delegate(desc.writespace, desc.name, m_object.space);
515515         break;
516516
r17963r17964
628628         break;
629629
630630      case DEVCB_TYPE_LEGACY_SPACE:
631         m_object.space = devcb_resolver::resolve_space(desc.index, desc.tag, device);
631         m_object.space = &devcb_resolver::resolve_space(desc.index, desc.tag, device);
632632         *static_cast<devcb_read16_delegate *>(this) = devcb_read16_delegate(desc.readspace, desc.name, m_object.space);
633633         break;
634634
r17963r17964
735735         break;
736736
737737      case DEVCB_TYPE_LEGACY_SPACE:
738         m_object.space = devcb_resolver::resolve_space(desc.index, desc.tag, device);
738         m_object.space = &devcb_resolver::resolve_space(desc.index, desc.tag, device);
739739         *static_cast<devcb_write16_delegate *>(this) = devcb_write16_delegate(desc.writespace, desc.name, m_object.space);
740740         break;
741741
trunk/src/emu/video/tms34061.c
r17963r17964
164164 *
165165 *************************************/
166166
167static void register_w(address_space *space, offs_t offset, UINT8 data)
167static void register_w(address_space &space, offs_t offset, UINT8 data)
168168{
169169   int scanline;
170170   int regnum = offset >> 2;
r17963r17964
184184   }
185185
186186   /* log it */
187   if (VERBOSE) logerror("%s:tms34061 %s = %04x\n", space->machine().describe_context(), regnames[regnum], tms34061.regs[regnum]);
187   if (VERBOSE) logerror("%s:tms34061 %s = %04x\n", space.machine().describe_context(), regnames[regnum], tms34061.regs[regnum]);
188188
189189   /* update the state of things */
190190   switch (regnum)
r17963r17964
235235 *
236236 *************************************/
237237
238static UINT8 register_r(address_space *space, offs_t offset)
238static UINT8 register_r(address_space &space, offs_t offset)
239239{
240240   int regnum = offset >> 2;
241241   UINT16 result;
r17963r17964
262262   }
263263
264264   /* log it */
265   if (VERBOSE) logerror("%s:tms34061 %s read = %04X\n", space->machine().describe_context(), regnames[regnum], result);
265   if (VERBOSE) logerror("%s:tms34061 %s read = %04X\n", space.machine().describe_context(), regnames[regnum], result);
266266   return (offset & 0x02) ? (result >> 8) : result;
267267}
268268
r17963r17964
357357}
358358
359359
360static void xypixel_w(address_space *space, int offset, UINT8 data)
360static void xypixel_w(address_space &space, int offset, UINT8 data)
361361{
362362   /* determine the offset, then adjust it */
363363   offs_t pixeloffs = tms34061.regs[TMS34061_XYADDRESS];
r17963r17964
369369
370370   /* mask to the VRAM size */
371371   pixeloffs &= tms34061.vrammask;
372   if (VERBOSE) logerror("%s:tms34061 xy (%04x) = %02x/%02x\n", space->machine().describe_context(), pixeloffs, data, tms34061.latchdata);
372   if (VERBOSE) logerror("%s:tms34061 xy (%04x) = %02x/%02x\n", space.machine().describe_context(), pixeloffs, data, tms34061.latchdata);
373373
374374   /* set the pixel data */
375375   tms34061.vram[pixeloffs] = data;
r17963r17964
377377}
378378
379379
380static UINT8 xypixel_r(address_space *space, int offset)
380static UINT8 xypixel_r(address_space &space, int offset)
381381{
382382   /* determine the offset, then adjust it */
383383   offs_t pixeloffs = tms34061.regs[TMS34061_XYADDRESS];
r17963r17964
402402 *
403403 *************************************/
404404
405void tms34061_w(address_space *space, int col, int row, int func, UINT8 data)
405void tms34061_w(address_space &space, int col, int row, int func, UINT8 data)
406406{
407407   offs_t offs;
408408
r17963r17964
425425         offs = ((row << tms34061.intf.rowshift) | col) & tms34061.vrammask;
426426         if (tms34061.regs[TMS34061_CONTROL2] & 0x0040)
427427            offs |= (tms34061.regs[TMS34061_CONTROL2] & 3) << 16;
428         if (VERBOSE) logerror("%s:tms34061 direct (%04x) = %02x/%02x\n", space->machine().describe_context(), offs, data, tms34061.latchdata);
428         if (VERBOSE) logerror("%s:tms34061 direct (%04x) = %02x/%02x\n", space.machine().describe_context(), offs, data, tms34061.latchdata);
429429         if (tms34061.vram[offs] != data || tms34061.latchram[offs] != tms34061.latchdata)
430430         {
431431            tms34061.vram[offs] = data;
r17963r17964
439439         if (tms34061.regs[TMS34061_CONTROL2] & 0x0040)
440440            offs |= (tms34061.regs[TMS34061_CONTROL2] & 3) << 16;
441441         offs &= tms34061.vrammask;
442         if (VERBOSE) logerror("%s:tms34061 shiftreg write (%04x)\n", space->machine().describe_context(), offs);
442         if (VERBOSE) logerror("%s:tms34061 shiftreg write (%04x)\n", space.machine().describe_context(), offs);
443443
444444         memcpy(&tms34061.vram[offs], tms34061.shiftreg, (size_t)1 << tms34061.intf.rowshift);
445445         memset(&tms34061.latchram[offs], tms34061.latchdata, (size_t)1 << tms34061.intf.rowshift);
r17963r17964
451451         if (tms34061.regs[TMS34061_CONTROL2] & 0x0040)
452452            offs |= (tms34061.regs[TMS34061_CONTROL2] & 3) << 16;
453453         offs &= tms34061.vrammask;
454         if (VERBOSE) logerror("%s:tms34061 shiftreg read (%04x)\n", space->machine().describe_context(), offs);
454         if (VERBOSE) logerror("%s:tms34061 shiftreg read (%04x)\n", space.machine().describe_context(), offs);
455455
456456         tms34061.shiftreg = &tms34061.vram[offs];
457457         break;
458458
459459      /* log anything else */
460460      default:
461         logerror("%s:Unsupported TMS34061 function %d\n", space->machine().describe_context(), func);
461         logerror("%s:Unsupported TMS34061 function %d\n", space.machine().describe_context(), func);
462462         break;
463463   }
464464}
465465
466466
467UINT8 tms34061_r(address_space *space, int col, int row, int func)
467UINT8 tms34061_r(address_space &space, int col, int row, int func)
468468{
469469   int result = 0;
470470   offs_t offs;
r17963r17964
512512
513513      /* log anything else */
514514      default:
515         logerror("%s:Unsupported TMS34061 function %d\n", space->machine().describe_context(),
515         logerror("%s:Unsupported TMS34061 function %d\n", space.machine().describe_context(),
516516               func);
517517         break;
518518   }
trunk/src/emu/video/hd63484.c
r17963r17964
14671467
14681468READ16_DEVICE_HANDLER( hd63484_status_r )
14691469{
1470//  if (space->device().safe_pc() != 0xfced6 && space->device().safe_pc() != 0xfe1d6)
1471//      logerror("%05x: HD63484 status read\n",space->device().safe_pc());
1470//  if (space.device().safe_pc() != 0xfced6 && space.device().safe_pc() != 0xfe1d6)
1471//      logerror("%05x: HD63484 status read\n",space.device().safe_pc());
14721472
14731473   return 0xff22 | (device->machine().rand() & 0x0004);   /* write FIFO ready + command end    +  (read FIFO ready or read FIFO not ready) */
14741474}
r17963r17964
14951495      hd63484->regno += 2;   /* autoincrement */
14961496
14971497#if LOG_COMMANDS
1498//  logerror("PC %05x: HD63484 register %02x write %04x\n", space->device().safe_pc(), hd63484->regno, hd63484->reg[hd63484->regno/2]);
1498//  logerror("PC %05x: HD63484 register %02x write %04x\n", space.device().safe_pc(), hd63484->regno, hd63484->reg[hd63484->regno/2]);
14991499#endif
15001500
15011501   if (hd63484->regno == 0)   /* FIFO */
r17963r17964
15121512   else if (hd63484->regno == 0)
15131513   {
15141514#if LOG_COMMANDS
1515//      logerror("%05x: HD63484 read FIFO\n", space->device().safe_pc());
1515//      logerror("%05x: HD63484 read FIFO\n", space.device().safe_pc());
15161516#endif
15171517      res = hd63484->readfifo;
15181518   }
15191519   else
15201520   {
15211521#if LOG_COMMANDS
1522//      logerror("%05x: HD63484 read register %02x\n", space->device().safe_pc(), hd63484->regno);
1522//      logerror("%05x: HD63484 read register %02x\n", space.device().safe_pc(), hd63484->regno);
15231523#endif
15241524      res = 0;
15251525   }
trunk/src/emu/video/tms34061.h
r17963r17964
6262void tms34061_start(running_machine &machine, const struct tms34061_interface *interface);
6363
6464/* reads/writes to the 34061 */
65UINT8 tms34061_r(address_space *space, int col, int row, int func);
66void tms34061_w(address_space *space, int col, int row, int func, UINT8 data);
65UINT8 tms34061_r(address_space &space, int col, int row, int func);
66void tms34061_w(address_space &space, int col, int row, int func, UINT8 data);
6767
6868/* latch settings */
6969READ8_HANDLER( tms34061_latch_r );
trunk/src/emu/video/pc_cga.c
r17963r17964
329329static VIDEO_START( pc_cga )
330330{
331331   int buswidth;
332   address_space *space = machine.firstcpu->space(AS_PROGRAM);
332   address_space &space = *machine.firstcpu->space(AS_PROGRAM);
333333   address_space *spaceio = machine.firstcpu->space(AS_IO);
334334
335   space->install_readwrite_bank(0xb8000, 0xbbfff, 0, 0x04000, "bank11" );
335   space.install_readwrite_bank(0xb8000, 0xbbfff, 0, 0x04000, "bank11" );
336336   buswidth = machine.firstcpu->space_config(AS_PROGRAM)->m_databus_width;
337337   UINT64 mask = 0;
338338   switch(buswidth)
r17963r17964
370370static VIDEO_START( pc_cga32k )
371371{
372372   int buswidth;
373   address_space *space = machine.firstcpu->space(AS_PROGRAM);
373   address_space &space = *machine.firstcpu->space(AS_PROGRAM);
374374   address_space *spaceio = machine.firstcpu->space(AS_IO);
375375
376376
377   space->install_readwrite_bank(0xb8000, 0xbffff, "bank11" );
377   space.install_readwrite_bank(0xb8000, 0xbffff, "bank11" );
378378   buswidth = machine.firstcpu->space_config(AS_PROGRAM)->m_databus_width;
379379   UINT64 mask = 0;
380380   switch(buswidth)
r17963r17964
11361136
11371137static WRITE8_HANDLER ( char_ram_w )
11381138{
1139   UINT8 *gfx = space->machine().root_device().memregion("gfx1")->base();
1139   UINT8 *gfx = space.machine().root_device().memregion("gfx1")->base();
11401140   offset ^= BIT(offset, 12);
11411141   logerror("write char ram %04x %02x\n",offset,data);
11421142   gfx[offset + 0x0000] = data;
r17963r17964
11471147
11481148static READ8_HANDLER ( char_ram_r )
11491149{
1150   UINT8 *gfx = space->machine().root_device().memregion("gfx1")->base();
1150   UINT8 *gfx = space.machine().root_device().memregion("gfx1")->base();
11511151   offset ^= BIT(offset, 12);
11521152   return gfx[offset];
11531153}
11541154
11551155static READ8_HANDLER( pc_cga8_r )
11561156{
1157   mc6845_device *mc6845 = space->machine().device<mc6845_device>(CGA_MC6845_NAME);
1157   mc6845_device *mc6845 = space.machine().device<mc6845_device>(CGA_MC6845_NAME);
11581158   int data = 0xff;
11591159   switch( offset )
11601160   {
r17963r17964
11621162         /* return last written mc6845 address value here? */
11631163         break;
11641164      case 1: case 3: case 5: case 7:
1165         data = mc6845->register_r( *space, offset );
1165         data = mc6845->register_r( space, offset );
11661166         break;
11671167      case 10:
11681168         data = cga.vsync | ( ( data & 0x40 ) >> 4 ) | cga.hsync;
r17963r17964
11821182
11831183   switch(offset) {
11841184   case 0: case 2: case 4: case 6:
1185      mc6845 = space->machine().device<mc6845_device>(CGA_MC6845_NAME);
1186      mc6845->address_w( *space, offset, data );
1185      mc6845 = space.machine().device<mc6845_device>(CGA_MC6845_NAME);
1186      mc6845->address_w( space, offset, data );
11871187      break;
11881188   case 1: case 3: case 5: case 7:
1189      mc6845 = space->machine().device<mc6845_device>(CGA_MC6845_NAME);
1190      mc6845->register_w( *space, offset, data );
1189      mc6845 = space.machine().device<mc6845_device>(CGA_MC6845_NAME);
1190      mc6845->register_w( space, offset, data );
11911191      break;
11921192   case 8:
1193      pc_cga_mode_control_w(space->machine(), data);
1193      pc_cga_mode_control_w(space.machine(), data);
11941194      break;
11951195   case 9:
1196      pc_cga_color_select_w(space->machine(), data);
1196      pc_cga_color_select_w(space.machine(), data);
11971197      break;
11981198   case 0x0d:
1199      pc_cga_plantronics_w(space->machine(), data);
1199      pc_cga_plantronics_w(space.machine(), data);
12001200      break;
12011201   case 0x0f:
12021202      // Not sure if some all CGA cards have ability to upload char definition
12031203      // The original CGA card had a char rom
1204      UINT8 buswidth = space->machine().firstcpu->space_config(AS_PROGRAM)->m_databus_width;
1205      address_space *space_prg = space->machine().firstcpu->space(AS_PROGRAM);
1204      UINT8 buswidth = space.machine().firstcpu->space_config(AS_PROGRAM)->m_databus_width;
1205      address_space *space_prg = space.machine().firstcpu->space(AS_PROGRAM);
12061206      cga.p3df = data;
12071207      if (data & 1) {
12081208         UINT64 mask = 0;
r17963r17964
14851485static WRITE8_HANDLER ( pc1512_w )
14861486{
14871487   UINT8 *videoram = cga.videoram;
1488   mc6845_device *mc6845 = space->machine().device<mc6845_device>(CGA_MC6845_NAME);
1488   mc6845_device *mc6845 = space.machine().device<mc6845_device>(CGA_MC6845_NAME);
14891489
14901490   switch (offset)
14911491   {
14921492   case 0: case 2: case 4: case 6:
14931493      data &= 0x1F;
1494      mc6845->address_w( *space, offset, data );
1494      mc6845->address_w( space, offset, data );
14951495      pc1512.mc6845_address = data;
14961496      break;
14971497
14981498   case 1: case 3: case 5: case 7:
14991499      if ( ! pc1512.mc6845_locked_register[pc1512.mc6845_address] )
15001500      {
1501         mc6845->register_w( *space, offset, data );
1501         mc6845->register_w( space, offset, data );
15021502         if ( mc6845_writeonce_register[pc1512.mc6845_address] )
15031503         {
15041504            pc1512.mc6845_locked_register[pc1512.mc6845_address] = 1;
r17963r17964
15141514      }
15151515      else
15161516      {
1517         space->machine().root_device().membank("bank1")->set_base(videoram + videoram_offset[0]);
1517         space.machine().root_device().membank("bank1")->set_base(videoram + videoram_offset[0]);
15181518      }
15191519      cga.mode_control = data;
15201520      switch( cga.mode_control & 0x3F )
r17963r17964
15721572      pc1512.read = data;
15731573      if ( ( cga.mode_control & 0x12 ) == 0x12 )
15741574      {
1575         space->machine().root_device().membank("bank1")->set_base(videoram + videoram_offset[data & 3]);
1575         space.machine().root_device().membank("bank1")->set_base(videoram + videoram_offset[data & 3]);
15761576      }
15771577      break;
15781578
r17963r17964
16351635   cga.videoram_size = 0x10000;
16361636   cga.videoram = auto_alloc_array(machine, UINT8, 0x10000 );
16371637
1638   address_space *space = machine.firstcpu->space( AS_PROGRAM );
1638   address_space &space = *machine.firstcpu->space( AS_PROGRAM );
16391639   address_space *io_space = machine.firstcpu->space( AS_IO );
16401640
1641   space->install_read_bank( 0xb8000, 0xbbfff, 0, 0x0C000, "bank1" );
1641   space.install_read_bank( 0xb8000, 0xbbfff, 0, 0x0C000, "bank1" );
16421642   machine.root_device().membank("bank1")->set_base(cga.videoram + videoram_offset[0]);
1643   space->install_legacy_write_handler( 0xb8000, 0xbbfff, 0, 0x0C000, FUNC(pc1512_videoram_w), 0xffff);
1643   space.install_legacy_write_handler( 0xb8000, 0xbbfff, 0, 0x0C000, FUNC(pc1512_videoram_w), 0xffff);
16441644
16451645   io_space->install_legacy_readwrite_handler( 0x3d0, 0x3df, FUNC(pc1512_r), FUNC(pc1512_w), 0xffff);
16461646
trunk/src/emu/video/pc_vga.c
r17963r17964
14621462      vga.attribute.state = 0;
14631463      data = 0;
14641464
1465      hsync = space->machine().primary_screen->hblank() & 1;
1466      vsync = vga_vblank(space->machine()); //space->machine().primary_screen->vblank() & 1;
1465      hsync = space.machine().primary_screen->hblank() & 1;
1466      vsync = vga_vblank(space.machine()); //space.machine().primary_screen->vblank() & 1;
14671467
14681468      data |= (hsync | vsync) & 1; // DD - display disable register
14691469      data |= (vsync & 1) << 3; // VRetrace register
r17963r17964
15131513               data);
15141514         }
15151515
1516         crtc_reg_write(space->machine(),vga.crtc.index,data);
1517         //space->machine().primary_screen->update_partial(space->machine().primary_screen->vpos());
1516         crtc_reg_write(space.machine(),vga.crtc.index,data);
1517         //space.machine().primary_screen->update_partial(space.machine().primary_screen->vpos());
15181518         #if 0
15191519         if((vga.crtc.index & 0xfe) != 0x0e)
1520            printf("%02x %02x %d\n",vga.crtc.index,data,space->machine().primary_screen->vpos());
1520            printf("%02x %02x %d\n",vga.crtc.index,data,space.machine().primary_screen->vpos());
15211521         #endif
15221522         break;
15231523
r17963r17964
16871687         break;
16881688
16891689      case 0xf:
1690         data = gc_reg_read(space->machine(),vga.gc.index);
1690         data = gc_reg_read(space.machine(),vga.gc.index);
16911691         break;
16921692   }
16931693   return data;
r17963r17964
17001700      data = vga_crtc_r(space, offset);
17011701   if(offset == 8)
17021702   {
1703      logerror("VGA: 0x3d8 read at %08x\n",space->device().safe_pc());
1703      logerror("VGA: 0x3d8 read at %08x\n",space.device().safe_pc());
17041704      data = 0; // TODO: PC-200 reads back CGA register here, everything else returns open bus OR CGA emulation of register 0x3d8
17051705   }
17061706
r17963r17964
18011801      break;
18021802   case 2:
18031803      vga.miscellaneous_output=data;
1804      recompute_params(space->machine());
1804      recompute_params(space.machine());
18051805      break;
18061806   case 3:
18071807      vga.oak.reg = data;
r17963r17964
18221822         vga.sequencer.data[vga.sequencer.index] = data;
18231823      }
18241824
1825      seq_reg_write(space->machine(),vga.sequencer.index,data);
1826      recompute_params(space->machine());
1825      seq_reg_write(space.machine(),vga.sequencer.index,data);
1826      recompute_params(space.machine());
18271827      break;
18281828   case 6:
18291829      vga.dac.mask=data;
r17963r17964
18631863      vga.gc.index=data;
18641864      break;
18651865   case 0xf:
1866      gc_reg_write(space->machine(),vga.gc.index,data);
1866      gc_reg_write(space.machine(),vga.gc.index,data);
18671867      break;
18681868   }
18691869}
r17963r17964
19201920   if(vga.sequencer.data[4] & 4)
19211921   {
19221922      int data;
1923      if (!space->debugger_access())
1923      if (!space.debugger_access())
19241924      {
19251925         vga.gc.latch[0]=vga.memory[(offset)];
19261926         vga.gc.latch[1]=vga.memory[(offset)+0x10000];
r17963r17964
20432043
20442044}
20452045
2046void pc_vga_io_init(running_machine &machine, address_space *mem_space, offs_t mem_offset, address_space *io_space, offs_t port_offset)
2046void pc_vga_io_init(running_machine &machine, address_space &mem_space, offs_t mem_offset, address_space &io_space, offs_t port_offset)
20472047{
20482048   int buswidth;
20492049   UINT64 mask = 0;
r17963r17964
20712071         fatalerror("VGA: Bus width %d not supported\n", buswidth);
20722072         break;
20732073   }
2074   io_space->install_legacy_readwrite_handler(port_offset + 0x3b0, port_offset + 0x3bf, FUNC(vga_port_03b0_r), FUNC(vga_port_03b0_w), mask);
2075   io_space->install_legacy_readwrite_handler(port_offset + 0x3c0, port_offset + 0x3cf, FUNC(vga_port_03c0_r), FUNC(vga_port_03c0_w), mask);
2076   io_space->install_legacy_readwrite_handler(port_offset + 0x3d0, port_offset + 0x3df, FUNC(vga_port_03d0_r), FUNC(vga_port_03d0_w), mask);
2074   io_space.install_legacy_readwrite_handler(port_offset + 0x3b0, port_offset + 0x3bf, FUNC(vga_port_03b0_r), FUNC(vga_port_03b0_w), mask);
2075   io_space.install_legacy_readwrite_handler(port_offset + 0x3c0, port_offset + 0x3cf, FUNC(vga_port_03c0_r), FUNC(vga_port_03c0_w), mask);
2076   io_space.install_legacy_readwrite_handler(port_offset + 0x3d0, port_offset + 0x3df, FUNC(vga_port_03d0_r), FUNC(vga_port_03d0_w), mask);
20772077
2078   mem_space->install_legacy_readwrite_handler(mem_offset + 0x00000, mem_offset + 0x1ffff, FUNC(vga_mem_r), FUNC(vga_mem_w), mask);
2078   mem_space.install_legacy_readwrite_handler(mem_offset + 0x00000, mem_offset + 0x1ffff, FUNC(vga_mem_r), FUNC(vga_mem_w), mask);
20792079}
20802080
20812081VIDEO_START( vga )
r17963r17964
23132313      switch(offset)
23142314      {
23152315         case 5:
2316            res = tseng_crtc_reg_read(space->machine(),vga.crtc.index);
2316            res = tseng_crtc_reg_read(space.machine(),vga.crtc.index);
23172317            break;
23182318         case 8:
23192319            res = et4k.reg_3d8;
r17963r17964
23352335      {
23362336         case 5:
23372337            vga.crtc.data[vga.crtc.index] = data;
2338            tseng_crtc_reg_write(space->machine(),vga.crtc.index,data);
2338            tseng_crtc_reg_write(space.machine(),vga.crtc.index,data);
23392339            break;
23402340         case 8:
23412341            et4k.reg_3d8 = data;
r17963r17964
23492349            break;
23502350      }
23512351   }
2352   tseng_define_video_mode(space->machine());
2352   tseng_define_video_mode(space.machine());
23532353}
23542354
23552355
r17963r17964
23602360   switch(offset)
23612361   {
23622362      case 0x05:
2363         res = tseng_seq_reg_read(space->machine(),vga.sequencer.index);
2363         res = tseng_seq_reg_read(space.machine(),vga.sequencer.index);
23642364         break;
23652365      case 0x0d:
23662366         res = svga.bank_w & 0xf;
r17963r17964
23922392   switch(offset)
23932393   {
23942394      case 0x05:
2395         tseng_seq_reg_write(space->machine(),vga.sequencer.index,data);
2395         tseng_seq_reg_write(space.machine(),vga.sequencer.index,data);
23962396         break;
23972397      case 0x0d:
23982398         svga.bank_w = data & 0xf;
r17963r17964
24082408         vga_port_03c0_w(space,offset,data);
24092409         break;
24102410   }
2411   tseng_define_video_mode(space->machine());
2411   tseng_define_video_mode(space.machine());
24122412}
24132413
24142414READ8_HANDLER(tseng_et4k_03d0_r)
r17963r17964
24202420      switch(offset)
24212421      {
24222422         case 5:
2423            res = tseng_crtc_reg_read(space->machine(),vga.crtc.index);
2423            res = tseng_crtc_reg_read(space.machine(),vga.crtc.index);
24242424            break;
24252425         case 8:
24262426            res = et4k.reg_3d8;
r17963r17964
24422442      {
24432443         case 5:
24442444            vga.crtc.data[vga.crtc.index] = data;
2445            tseng_crtc_reg_write(space->machine(),vga.crtc.index,data);
2445            tseng_crtc_reg_write(space.machine(),vga.crtc.index,data);
24462446            //if((vga.crtc.index & 0xfe) != 0x0e)
2447            //  printf("%02x %02x %d\n",vga.crtc.index,data,space->machine().primary_screen->vpos());
2447            //  printf("%02x %02x %d\n",vga.crtc.index,data,space.machine().primary_screen->vpos());
24482448            break;
24492449         case 8:
24502450            et4k.reg_3d8 = data;
r17963r17964
24582458            break;
24592459      }
24602460   }
2461   tseng_define_video_mode(space->machine());
2461   tseng_define_video_mode(space.machine());
24622462}
24632463
24642464READ8_HANDLER( tseng_mem_r )
r17963r17964
24892489
24902490******************************************/
24912491
2492void pc_svga_trident_io_init(running_machine &machine, address_space *mem_space, offs_t mem_offset, address_space *io_space, offs_t port_offset)
2492void pc_svga_trident_io_init(running_machine &machine, address_space &mem_space, offs_t mem_offset, address_space &io_space, offs_t port_offset)
24932493{
24942494   int buswidth;
24952495   UINT64 mask = 0;
r17963r17964
25172517         fatalerror("VGA: Bus width %d not supported\n", buswidth);
25182518         break;
25192519   }
2520   io_space->install_legacy_readwrite_handler(port_offset + 0x3b0, port_offset + 0x3bf, FUNC(vga_port_03b0_r), FUNC(vga_port_03b0_w), mask);
2521   io_space->install_legacy_readwrite_handler(port_offset + 0x3c0, port_offset + 0x3cf, FUNC(trident_03c0_r), FUNC(trident_03c0_w), mask);
2522   io_space->install_legacy_readwrite_handler(port_offset + 0x3d0, port_offset + 0x3df, FUNC(trident_03d0_r), FUNC(trident_03d0_w), mask);
2520   io_space.install_legacy_readwrite_handler(port_offset + 0x3b0, port_offset + 0x3bf, FUNC(vga_port_03b0_r), FUNC(vga_port_03b0_w), mask);
2521   io_space.install_legacy_readwrite_handler(port_offset + 0x3c0, port_offset + 0x3cf, FUNC(trident_03c0_r), FUNC(trident_03c0_w), mask);
2522   io_space.install_legacy_readwrite_handler(port_offset + 0x3d0, port_offset + 0x3df, FUNC(trident_03d0_r), FUNC(trident_03d0_w), mask);
25232523
2524   mem_space->install_legacy_readwrite_handler(mem_offset + 0x00000, mem_offset + 0x1ffff, FUNC(trident_mem_r), FUNC(trident_mem_w), mask);
2524   mem_space.install_legacy_readwrite_handler(mem_offset + 0x00000, mem_offset + 0x1ffff, FUNC(trident_mem_r), FUNC(trident_mem_w), mask);
25252525
25262526   // D3h = TGUI9660XGi
25272527   svga.id = 0xd3; // TODO: hardcoded for California Chase
r17963r17964
25822582   switch(offset)
25832583   {
25842584      case 0x05:
2585         res = trident_seq_reg_read(space->machine(),vga.sequencer.index);
2585         res = trident_seq_reg_read(space.machine(),vga.sequencer.index);
25862586         break;
25872587      default:
25882588         res = vga_port_03c0_r(space,offset);
r17963r17964
25972597   switch(offset)
25982598   {
25992599      case 0x05:
2600         trident_seq_reg_write(space->machine(),vga.sequencer.index,data);
2600         trident_seq_reg_write(space.machine(),vga.sequencer.index,data);
26012601         break;
26022602      default:
26032603         vga_port_03c0_w(space,offset,data);
r17963r17964
30143014      switch(offset)
30153015      {
30163016         case 5:
3017            res = s3_crtc_reg_read(space->machine(),vga.crtc.index);
3017            res = s3_crtc_reg_read(space.machine(),vga.crtc.index);
30183018            break;
30193019         default:
30203020            res = vga_port_03b0_r(space,offset);
r17963r17964
30333033      {
30343034         case 5:
30353035            vga.crtc.data[vga.crtc.index] = data;
3036            s3_crtc_reg_write(space->machine(),vga.crtc.index,data);
3036            s3_crtc_reg_write(space.machine(),vga.crtc.index,data);
30373037            break;
30383038         default:
30393039            vga_port_03b0_w(space,offset,data);
r17963r17964
30753075      switch(offset)
30763076      {
30773077         case 5:
3078            res = s3_crtc_reg_read(space->machine(),vga.crtc.index);
3078            res = s3_crtc_reg_read(space.machine(),vga.crtc.index);
30793079            break;
30803080         default:
30813081            res = vga_port_03d0_r(space,offset);
r17963r17964
30943094      {
30953095         case 5:
30963096            vga.crtc.data[vga.crtc.index] = data;
3097            s3_crtc_reg_write(space->machine(),vga.crtc.index,data);
3097            s3_crtc_reg_write(space.machine(),vga.crtc.index,data);
30983098            break;
30993099         default:
31003100            vga_port_03d0_w(space,offset,data);
r17963r17964
48354835   }
48364836}
48374837
4838void pc_vga_gamtor_io_init(running_machine &machine, address_space *mem_space, offs_t mem_offset, address_space *io_space, offs_t port_offset)
4838void pc_vga_gamtor_io_init(running_machine &machine, address_space &mem_space, offs_t mem_offset, address_space &io_space, offs_t port_offset)
48394839{
48404840   int buswidth;
48414841   UINT64 mask = 0;
r17963r17964
48634863         fatalerror("VGA: Bus width %d not supported\n", buswidth);
48644864         break;
48654865   }
4866   io_space->install_legacy_readwrite_handler(port_offset + 0x3b0, port_offset + 0x3bf, FUNC(vga_port_gamtor_03b0_r), FUNC(vga_port_gamtor_03b0_w), mask);
4867   io_space->install_legacy_readwrite_handler(port_offset + 0x3c0, port_offset + 0x3cf, FUNC(vga_port_gamtor_03c0_r), FUNC(vga_port_gamtor_03c0_w), mask);
4868   io_space->install_legacy_readwrite_handler(port_offset + 0x3d0, port_offset + 0x3df, FUNC(vga_port_gamtor_03d0_r), FUNC(vga_port_gamtor_03d0_w), mask);
4866   io_space.install_legacy_readwrite_handler(port_offset + 0x3b0, port_offset + 0x3bf, FUNC(vga_port_gamtor_03b0_r), FUNC(vga_port_gamtor_03b0_w), mask);
4867   io_space.install_legacy_readwrite_handler(port_offset + 0x3c0, port_offset + 0x3cf, FUNC(vga_port_gamtor_03c0_r), FUNC(vga_port_gamtor_03c0_w), mask);
4868   io_space.install_legacy_readwrite_handler(port_offset + 0x3d0, port_offset + 0x3df, FUNC(vga_port_gamtor_03d0_r), FUNC(vga_port_gamtor_03d0_w), mask);
48694869
4870   mem_space->install_legacy_readwrite_handler(mem_offset + 0x00000, mem_offset + 0x1ffff, FUNC(vga_gamtor_mem_r), FUNC(vga_gamtor_mem_w), mask);
4870   mem_space.install_legacy_readwrite_handler(mem_offset + 0x00000, mem_offset + 0x1ffff, FUNC(vga_gamtor_mem_r), FUNC(vga_gamtor_mem_w), mask);
48714871}
48724872
48734873static void ati_define_video_mode(running_machine &machine)
r17963r17964
50795079 */
50805080READ16_HANDLER(mach8_status_r)
50815081{
5082   return vga_vblank(space->machine()) << 1;
5082   return vga_vblank(space.machine()) << 1;
50835083}
50845084
50855085WRITE16_HANDLER(mach8_htotal_w)
r17963r17964
51125112READ16_HANDLER(mach8_substatus_r)
51135113{
51145114   // TODO:
5115   if(vga_vblank(space->machine()) != 0)  // not correct, but will do for now
5115   if(vga_vblank(space.machine()) != 0)  // not correct, but will do for now
51165116      ibm8514.substatus |= 0x01;
51175117   return ibm8514.substatus;
51185118}
trunk/src/emu/video/pc_vga.h
r17963r17964
2626};
2727
2828void pc_vga_init(running_machine &machine, read8_space_func read_dipswitch, const struct pc_svga_interface *svga_intf);
29void pc_vga_io_init(running_machine &machine, address_space *mem_space, offs_t mem_offset, address_space *io_space, offs_t port_offset);
30void pc_vga_gamtor_io_init(running_machine &machine, address_space *mem_space, offs_t mem_offset, address_space *io_space, offs_t port_offset);
31void pc_svga_trident_io_init(running_machine &machine, address_space *mem_space, offs_t mem_offset, address_space *io_space, offs_t port_offset);
29void pc_vga_io_init(running_machine &machine, address_space &mem_space, offs_t mem_offset, address_space &io_space, offs_t port_offset);
30void pc_vga_gamtor_io_init(running_machine &machine, address_space &mem_space, offs_t mem_offset, address_space &io_space, offs_t port_offset);
31void pc_svga_trident_io_init(running_machine &machine, address_space &mem_space, offs_t mem_offset, address_space &io_space, offs_t port_offset);
3232void pc_vga_reset(running_machine &machine);
3333void *pc_vga_memory(void);
3434size_t pc_vga_memory_size(void);
trunk/src/emu/sound/spu.c
r17963r17964
31063106
31073107READ16_HANDLER( spu_r )
31083108{
3109   spu_device *spu = space->machine().device<spu_device>("spu");
3109   spu_device *spu = space.machine().device<spu_device>("spu");
31103110
31113111   if (spu == NULL )
31123112   {
r17963r17964
31183118
31193119WRITE16_HANDLER( spu_w )
31203120{
3121   spu_device *spu = space->machine().device<spu_device>("spu");
3121   spu_device *spu = space.machine().device<spu_device>("spu");
31223122
31233123   if (spu == NULL)
31243124   {
trunk/src/emu/sound/pokey.c
r17963r17964
12961296   int pokey_num = (offset >> 3) & ~0x04;
12971297   int control = (offset & 0x20) >> 2;
12981298   int pokey_reg = (offset % 8) | control;
1299   pokey_device *pokey = space->machine().device<pokey_device>(devname[pokey_num]);
1299   pokey_device *pokey = space.machine().device<pokey_device>(devname[pokey_num]);
13001300
13011301   return pokey->read(pokey_reg);
13021302}
r17963r17964
13071307    int pokey_num = (offset >> 3) & ~0x04;
13081308    int control = (offset & 0x20) >> 2;
13091309    int pokey_reg = (offset % 8) | control;
1310   pokey_device *pokey = space->machine().device<pokey_device>(devname[pokey_num]);
1310   pokey_device *pokey = space.machine().device<pokey_device>(devname[pokey_num]);
13111311
13121312    pokey->write(pokey_reg, data);
13131313}
trunk/src/emu/sound/vrender0.c
r17963r17964
8383#define ENVVOL(chan)   (VR0->SOUNDREGS[(0x20/4)*chan+0x04/4]&0xffffff)
8484
8585/*
86#define GETSOUNDREG16(Chan,Offs) space->read_word(VR0->Intf.reg_base+0x20*Chan+Offs)
87#define GETSOUNDREG32(Chan,Offs) space->read_dword(VR0->Intf.reg_base+0x20*Chan+Offs)
86#define GETSOUNDREG16(Chan,Offs) space.read_word(VR0->Intf.reg_base+0x20*Chan+Offs)
87#define GETSOUNDREG32(Chan,Offs) space.read_dword(VR0->Intf.reg_base+0x20*Chan+Offs)
8888
8989#define CURSADDR(chan)  GETSOUNDREG32(chan,0x00)
9090#define DSADDR(chan)    GETSOUNDREG16(chan,0x08)
trunk/src/emu/sound/awacs.c
r17963r17964
166166    m_regs[offset] = data;
167167}
168168
169void awacs_device::set_dma_base(address_space *space, int offset0, int offset1)
169void awacs_device::set_dma_base(address_space &space, int offset0, int offset1)
170170{
171    m_dma_space = space;
171    m_dma_space = &space;
172172    m_dma_offset_0 = offset0;
173173    m_dma_offset_1 = offset1;
174174}
trunk/src/emu/sound/awacs.h
r17963r17964
4343   DECLARE_READ8_MEMBER(read);
4444   DECLARE_WRITE8_MEMBER(write);
4545
46    void set_dma_base(address_space *space, int offset0, int offset1);
46    void set_dma_base(address_space &space, int offset0, int offset1);
4747
4848   sound_stream *m_stream;
4949
trunk/src/emu/sound/nile.c
r17963r17964
7777
7878   COMBINE_DATA(&info->ctrl);
7979
80//  printf("CTRL: %04x -> %04x (PC=%x)\n", ctrl, info->ctrl, space->device().safe_pc());
80//  printf("CTRL: %04x -> %04x (PC=%x)\n", ctrl, info->ctrl, space.device().safe_pc());
8181
8282   ctrl^=info->ctrl;
8383}
r17963r17964
132132      info->vpos[v] = info->frac[v] = info->lponce[v] = 0;
133133   }
134134
135   //printf("v%02d: %04x to reg %02d (PC=%x)\n", v, info->sound_regs[offset], r, space->device().safe_pc());
135   //printf("v%02d: %04x to reg %02d (PC=%x)\n", v, info->sound_regs[offset], r, space.device().safe_pc());
136136}
137137
138138static STREAM_UPDATE( nile_update )
trunk/src/emu/memconv.h
r17963r17964
8585 *
8686 *************************************/
8787
88INLINE UINT16 read16be_with_read8_handler(read8_space_func handler, address_space *space, offs_t offset, UINT16 mem_mask)
88INLINE UINT16 read16be_with_read8_handler(read8_space_func handler, address_space &space, offs_t offset, UINT16 mem_mask)
8989{
9090   UINT16 result = 0;
9191   if (ACCESSING_BITS_8_15)
r17963r17964
9696}
9797
9898
99INLINE void write16be_with_write8_handler(write8_space_func handler, address_space *space, offs_t offset, UINT16 data, UINT16 mem_mask)
99INLINE void write16be_with_write8_handler(write8_space_func handler, address_space &space, offs_t offset, UINT16 data, UINT16 mem_mask)
100100{
101101   if (ACCESSING_BITS_8_15)
102102      (*handler)(space, offset * 2 + 0, data >> 8);
r17963r17964
111111 *
112112 *************************************/
113113
114INLINE UINT16 read16le_with_read8_handler(read8_space_func handler, address_space *space, offs_t offset, UINT16 mem_mask)
114INLINE UINT16 read16le_with_read8_handler(read8_space_func handler, address_space &space, offs_t offset, UINT16 mem_mask)
115115{
116116   UINT16 result = 0;
117117   if (ACCESSING_BITS_0_7)
r17963r17964
122122}
123123
124124
125INLINE void write16le_with_write8_handler(write8_space_func handler, address_space *space, offs_t offset, UINT16 data, UINT16 mem_mask)
125INLINE void write16le_with_write8_handler(write8_space_func handler, address_space &space, offs_t offset, UINT16 data, UINT16 mem_mask)
126126{
127127   if (ACCESSING_BITS_0_7)
128128      (*handler)(space, offset * 2 + 0, data >> 0);
r17963r17964
137137 *
138138 *************************************/
139139
140INLINE UINT32 read32be_with_read8_handler(read8_space_func handler, address_space *space, offs_t offset, UINT32 mem_mask)
140INLINE UINT32 read32be_with_read8_handler(read8_space_func handler, address_space &space, offs_t offset, UINT32 mem_mask)
141141{
142142   UINT32 result = 0;
143143   if (ACCESSING_BITS_16_31)
r17963r17964
148148}
149149
150150
151INLINE void write32be_with_write8_handler(write8_space_func handler, address_space *space, offs_t offset, UINT32 data, UINT32 mem_mask)
151INLINE void write32be_with_write8_handler(write8_space_func handler, address_space &space, offs_t offset, UINT32 data, UINT32 mem_mask)
152152{
153153   if (ACCESSING_BITS_16_31)
154154      write16be_with_write8_handler(handler, space, offset * 2 + 0, data >> 16, mem_mask >> 16);
r17963r17964
163163 *
164164 *************************************/
165165
166INLINE UINT32 read32le_with_read8_handler(read8_space_func handler, address_space *space, offs_t offset, UINT32 mem_mask)
166INLINE UINT32 read32le_with_read8_handler(read8_space_func handler, address_space &space, offs_t offset, UINT32 mem_mask)
167167{
168168   UINT32 result = 0;
169169   if (ACCESSING_BITS_0_15)
r17963r17964
174174}
175175
176176
177INLINE void write32le_with_write8_handler(write8_space_func handler, address_space *space, offs_t offset, UINT32 data, UINT32 mem_mask)
177INLINE void write32le_with_write8_handler(write8_space_func handler, address_space &space, offs_t offset, UINT32 data, UINT32 mem_mask)
178178{
179179   if (ACCESSING_BITS_0_15)
180180      write16le_with_write8_handler(handler, space, offset * 2 + 0, data, mem_mask);
r17963r17964
189189 *
190190 *************************************/
191191
192INLINE UINT32 read32be_with_16be_handler(read16_space_func handler, address_space *space, offs_t offset, UINT32 mem_mask)
192INLINE UINT32 read32be_with_16be_handler(read16_space_func handler, address_space &space, offs_t offset, UINT32 mem_mask)
193193{
194194   UINT32 result = 0;
195195   if (ACCESSING_BITS_16_31)
r17963r17964
200200}
201201
202202
203INLINE void write32be_with_16be_handler(write16_space_func handler, address_space *space, offs_t offset, UINT32 data, UINT32 mem_mask)
203INLINE void write32be_with_16be_handler(write16_space_func handler, address_space &space, offs_t offset, UINT32 data, UINT32 mem_mask)
204204{
205205   if (ACCESSING_BITS_16_31)
206206      (*handler)(space, offset * 2 + 0, data >> 16, mem_mask >> 16);
r17963r17964
215215 *
216216 *************************************/
217217
218INLINE UINT32 read32le_with_16le_handler(read16_space_func handler, address_space *space, offs_t offset, UINT32 mem_mask)
218INLINE UINT32 read32le_with_16le_handler(read16_space_func handler, address_space &space, offs_t offset, UINT32 mem_mask)
219219{
220220   UINT32 result = 0;
221221   if (ACCESSING_BITS_0_15)
r17963r17964
226226}
227227
228228
229INLINE void write32le_with_16le_handler(write16_space_func handler, address_space *space, offs_t offset, UINT32 data, UINT32 mem_mask)
229INLINE void write32le_with_16le_handler(write16_space_func handler, address_space &space, offs_t offset, UINT32 data, UINT32 mem_mask)
230230{
231231   if (ACCESSING_BITS_0_15)
232232      (*handler)(space, offset * 2 + 0, data, mem_mask);
r17963r17964
241241 *
242242 *************************************/
243243
244INLINE UINT32 read32be_with_16le_handler(read16_space_func handler, address_space *space, offs_t offset, UINT32 mem_mask)
244INLINE UINT32 read32be_with_16le_handler(read16_space_func handler, address_space &space, offs_t offset, UINT32 mem_mask)
245245{
246246   UINT32 result = 0;
247247   mem_mask = FLIPENDIAN_INT32(mem_mask);
r17963r17964
250250}
251251
252252
253INLINE void write32be_with_16le_handler(write16_space_func handler, address_space *space, offs_t offset, UINT32 data, UINT32 mem_mask)
253INLINE void write32be_with_16le_handler(write16_space_func handler, address_space &space, offs_t offset, UINT32 data, UINT32 mem_mask)
254254{
255255   data = FLIPENDIAN_INT32(data);
256256   mem_mask = FLIPENDIAN_INT32(mem_mask);
r17963r17964
264264 *
265265 *************************************/
266266
267INLINE UINT32 read32le_with_16be_handler(read16_space_func handler, address_space *space, offs_t offset, UINT32 mem_mask)
267INLINE UINT32 read32le_with_16be_handler(read16_space_func handler, address_space &space, offs_t offset, UINT32 mem_mask)
268268{
269269   UINT32 result = 0;
270270   mem_mask = FLIPENDIAN_INT32(mem_mask);
r17963r17964
273273}
274274
275275
276INLINE void write32le_with_16be_handler(write16_space_func handler, address_space *space, offs_t offset, UINT32 data, UINT32 mem_mask)
276INLINE void write32le_with_16be_handler(write16_space_func handler, address_space &space, offs_t offset, UINT32 data, UINT32 mem_mask)
277277{
278278   data = FLIPENDIAN_INT32(data);
279279   mem_mask = FLIPENDIAN_INT32(mem_mask);
r17963r17964
287287 *
288288 *************************************/
289289
290INLINE UINT64 read64be_with_read8_handler(read8_space_func handler, address_space *space, offs_t offset, UINT64 mem_mask)
290INLINE UINT64 read64be_with_read8_handler(read8_space_func handler, address_space &space, offs_t offset, UINT64 mem_mask)
291291{
292292   UINT64 result = 0;
293293   if (ACCESSING_BITS_32_63)
r17963r17964
298298}
299299
300300
301INLINE void write64be_with_write8_handler(write8_space_func handler, address_space *space, offs_t offset, UINT64 data, UINT64 mem_mask)
301INLINE void write64be_with_write8_handler(write8_space_func handler, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
302302{
303303   if (ACCESSING_BITS_32_63)
304304      write32be_with_write8_handler(handler, space, offset * 2 + 0, data >> 32, mem_mask >> 32);
r17963r17964
313313 *
314314 *************************************/
315315
316INLINE UINT64 read64le_with_read8_handler(read8_space_func handler, address_space *space, offs_t offset, UINT64 mem_mask)
316INLINE UINT64 read64le_with_read8_handler(read8_space_func handler, address_space &space, offs_t offset, UINT64 mem_mask)
317317{
318318   UINT64 result = 0;
319319   if (ACCESSING_BITS_0_31)
r17963r17964
324324}
325325
326326
327INLINE void write64le_with_write8_handler(write8_space_func handler, address_space *space, offs_t offset, UINT64 data, UINT64 mem_mask)
327INLINE void write64le_with_write8_handler(write8_space_func handler, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
328328{
329329   if (ACCESSING_BITS_0_31)
330330      write32le_with_write8_handler(handler, space, offset * 2 + 0, data >> 0, mem_mask >> 0);
r17963r17964
339339 *
340340 *************************************/
341341
342INLINE UINT32 read64be_with_16be_handler(read16_space_func handler, address_space *space, offs_t offset, UINT64 mem_mask)
342INLINE UINT32 read64be_with_16be_handler(read16_space_func handler, address_space &space, offs_t offset, UINT64 mem_mask)
343343{
344344   UINT64 result = 0;
345345   if (ACCESSING_BITS_32_63)
r17963r17964
350350}
351351
352352
353INLINE void write64be_with_16be_handler(write16_space_func handler, address_space *space, offs_t offset, UINT64 data, UINT64 mem_mask)
353INLINE void write64be_with_16be_handler(write16_space_func handler, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
354354{
355355   if (ACCESSING_BITS_32_63)
356356      write32be_with_16be_handler(handler, space, offset * 2 + 0, data >> 32, mem_mask >> 32);
r17963r17964
365365 *
366366 *************************************/
367367
368INLINE UINT32 read64le_with_16le_handler(read16_space_func handler, address_space *space, offs_t offset, UINT64 mem_mask)
368INLINE UINT32 read64le_with_16le_handler(read16_space_func handler, address_space &space, offs_t offset, UINT64 mem_mask)
369369{
370370   UINT64 result = 0;
371371   if (ACCESSING_BITS_0_31)
r17963r17964
376376}
377377
378378
379INLINE void write64le_with_16le_handler(write16_space_func handler, address_space *space, offs_t offset, UINT64 data, UINT64 mem_mask)
379INLINE void write64le_with_16le_handler(write16_space_func handler, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
380380{
381381   if (ACCESSING_BITS_0_31)
382382      write32le_with_16le_handler(handler, space, offset * 2 + 0, data >> 0, mem_mask >> 0);
r17963r17964
391391 *
392392 *************************************/
393393
394INLINE UINT32 read64be_with_16le_handler(read16_space_func handler, address_space *space, offs_t offset, UINT64 mem_mask)
394INLINE UINT32 read64be_with_16le_handler(read16_space_func handler, address_space &space, offs_t offset, UINT64 mem_mask)
395395{
396396   UINT64 result = 0;
397397   if (ACCESSING_BITS_32_63)
r17963r17964
402402}
403403
404404
405INLINE void write64be_with_16le_handler(write16_space_func handler, address_space *space, offs_t offset, UINT64 data, UINT64 mem_mask)
405INLINE void write64be_with_16le_handler(write16_space_func handler, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
406406{
407407   if (ACCESSING_BITS_32_63)
408408      write32be_with_16le_handler(handler, space, offset * 2 + 0, data >> 32, mem_mask >> 32);
r17963r17964
417417 *
418418 *************************************/
419419
420INLINE UINT32 read64le_with_16be_handler(read16_space_func handler, address_space *space, offs_t offset, UINT64 mem_mask)
420INLINE UINT32 read64le_with_16be_handler(read16_space_func handler, address_space &space, offs_t offset, UINT64 mem_mask)
421421{
422422   UINT64 result = 0;
423423   if (ACCESSING_BITS_0_31)
r17963r17964
428428}
429429
430430
431INLINE void write64le_with_16be_handler(write16_space_func handler, address_space *space, offs_t offset, UINT64 data, UINT64 mem_mask)
431INLINE void write64le_with_16be_handler(write16_space_func handler, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
432432{
433433   if (ACCESSING_BITS_0_31)
434434      write32le_with_16be_handler(handler, space, offset * 2 + 0, data >> 0, mem_mask >> 0);
r17963r17964
443443 *
444444 *************************************/
445445
446INLINE UINT64 read64be_with_32be_handler(read32_space_func handler, address_space *space, offs_t offset, UINT64 mem_mask)
446INLINE UINT64 read64be_with_32be_handler(read32_space_func handler, address_space &space, offs_t offset, UINT64 mem_mask)
447447{
448448   UINT64 result = 0;
449449   if (ACCESSING_BITS_32_63)
r17963r17964
454454}
455455
456456
457INLINE void write64be_with_32be_handler(write32_space_func handler, address_space *space, offs_t offset, UINT64 data, UINT64 mem_mask)
457INLINE void write64be_with_32be_handler(write32_space_func handler, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
458458{
459459   if (ACCESSING_BITS_32_63)
460460      (*handler)(space, offset * 2 + 0, data >> 32, mem_mask >> 32);
r17963r17964
469469 *
470470 *************************************/
471471
472INLINE UINT64 read64le_with_32le_handler(read32_space_func handler, address_space *space, offs_t offset, UINT64 mem_mask)
472INLINE UINT64 read64le_with_32le_handler(read32_space_func handler, address_space &space, offs_t offset, UINT64 mem_mask)
473473{
474474   UINT64 result = 0;
475475   if (ACCESSING_BITS_0_31)
r17963r17964
480480}
481481
482482
483INLINE void write64le_with_32le_handler(write32_space_func handler, address_space *space, offs_t offset, UINT64 data, UINT64 mem_mask)
483INLINE void write64le_with_32le_handler(write32_space_func handler, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
484484{
485485   if (ACCESSING_BITS_0_31)
486486      (*handler)(space, offset * 2 + 0, data >> 0, mem_mask >> 0);
r17963r17964
495495 *
496496 *************************************/
497497
498INLINE UINT64 read64be_with_32le_handler(read32_space_func handler, address_space *space, offs_t offset, UINT64 mem_mask)
498INLINE UINT64 read64be_with_32le_handler(read32_space_func handler, address_space &space, offs_t offset, UINT64 mem_mask)
499499{
500500   UINT64 result;
501501   mem_mask = FLIPENDIAN_INT64(mem_mask);
r17963r17964
504504}
505505
506506
507INLINE void write64be_with_32le_handler(write32_space_func handler, address_space *space, offs_t offset, UINT64 data, UINT64 mem_mask)
507INLINE void write64be_with_32le_handler(write32_space_func handler, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
508508{
509509   data = FLIPENDIAN_INT64(data);
510510   mem_mask = FLIPENDIAN_INT64(mem_mask);
r17963r17964
518518 *
519519 *************************************/
520520
521INLINE UINT64 read64le_with_32be_handler(read32_space_func handler, address_space *space, offs_t offset, UINT64 mem_mask)
521INLINE UINT64 read64le_with_32be_handler(read32_space_func handler, address_space &space, offs_t offset, UINT64 mem_mask)
522522{
523523   UINT64 result;
524524   mem_mask = FLIPENDIAN_INT64(mem_mask);
r17963r17964
527527}
528528
529529
530INLINE void write64le_with_32be_handler(write32_space_func handler, address_space *space, offs_t offset, UINT64 data, UINT64 mem_mask)
530INLINE void write64le_with_32be_handler(write32_space_func handler, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
531531{
532532   data = FLIPENDIAN_INT64(data);
533533   mem_mask = FLIPENDIAN_INT64(mem_mask);
trunk/src/emu/memory.c
r17963r17964
10221022   // generate accessor table
10231023   virtual void accessors(data_accessors &accessors) const
10241024   {
1025      accessors.read_byte = reinterpret_cast<UINT8 (*)(address_space *, offs_t)>(&read_byte_static);
1026      accessors.read_word = reinterpret_cast<UINT16 (*)(address_space *, offs_t)>(&read_word_static);
1027      accessors.read_word_masked = reinterpret_cast<UINT16 (*)(address_space *, offs_t, UINT16)>(&read_word_masked_static);
1028      accessors.read_dword = reinterpret_cast<UINT32 (*)(address_space *, offs_t)>(&read_dword_static);
1029      accessors.read_dword_masked = reinterpret_cast<UINT32 (*)(address_space *, offs_t, UINT32)>(&read_dword_masked_static);
1030      accessors.read_qword = reinterpret_cast<UINT64 (*)(address_space *, offs_t)>(&read_qword_static);
1031      accessors.read_qword_masked = reinterpret_cast<UINT64 (*)(address_space *, offs_t, UINT64)>(&read_qword_masked_static);
1032      accessors.write_byte = reinterpret_cast<void (*)(address_space *, offs_t, UINT8)>(&write_byte_static);
1033      accessors.write_word = reinterpret_cast<void (*)(address_space *, offs_t, UINT16)>(&write_word_static);
1034      accessors.write_word_masked = reinterpret_cast<void (*)(address_space *, offs_t, UINT16, UINT16)>(&write_word_masked_static);
1035      accessors.write_dword = reinterpret_cast<void (*)(address_space *, offs_t, UINT32)>(&write_dword_static);
1036      accessors.write_dword_masked = reinterpret_cast<void (*)(address_space *, offs_t, UINT32, UINT32)>(&write_dword_masked_static);
1037      accessors.write_qword = reinterpret_cast<void (*)(address_space *, offs_t, UINT64)>(&write_qword_static);
1038      accessors.write_qword_masked = reinterpret_cast<void (*)(address_space *, offs_t, UINT64, UINT64)>(&write_qword_masked_static);
1025      accessors.read_byte = reinterpret_cast<UINT8 (*)(address_space &, offs_t)>(&read_byte_static);
1026      accessors.read_word = reinterpret_cast<UINT16 (*)(address_space &, offs_t)>(&read_word_static);
1027      accessors.read_word_masked = reinterpret_cast<UINT16 (*)(address_space &, offs_t, UINT16)>(&read_word_masked_static);
1028      accessors.read_dword = reinterpret_cast<UINT32 (*)(address_space &, offs_t)>(&read_dword_static);
1029      accessors.read_dword_masked = reinterpret_cast<UINT32 (*)(address_space &, offs_t, UINT32)>(&read_dword_masked_static);
1030      accessors.read_qword = reinterpret_cast<UINT64 (*)(address_space &, offs_t)>(&read_qword_static);
1031      accessors.read_qword_masked = reinterpret_cast<UINT64 (*)(address_space &, offs_t, UINT64)>(&read_qword_masked_static);
1032      accessors.write_byte = reinterpret_cast<void (*)(address_space &, offs_t, UINT8)>(&write_byte_static);
1033      accessors.write_word = reinterpret_cast<void (*)(address_space &, offs_t, UINT16)>(&write_word_static);
1034      accessors.write_word_masked = reinterpret_cast<void (*)(address_space &, offs_t, UINT16, UINT16)>(&write_word_masked_static);
1035      accessors.write_dword = reinterpret_cast<void (*)(address_space &, offs_t, UINT32)>(&write_dword_static);
1036      accessors.write_dword_masked = reinterpret_cast<void (*)(address_space &, offs_t, UINT32, UINT32)>(&write_dword_masked_static);
1037      accessors.write_qword = reinterpret_cast<void (*)(address_space &, offs_t, UINT64)>(&write_qword_static);
1038      accessors.write_qword_masked = reinterpret_cast<void (*)(address_space &, offs_t, UINT64, UINT64)>(&write_qword_masked_static);
10391039   }
10401040
10411041   // return a pointer to the read bank, or NULL if none
r17963r17964
14411441   void write_qword_unaligned(offs_t address, UINT64 data, UINT64 mask) { write_direct<UINT64, false>(address, data, mask); }
14421442
14431443   // static access to these functions
1444   static UINT8 read_byte_static(this_type *space, offs_t address) { return (NATIVE_BITS == 8) ? space->read_native(address & ~NATIVE_MASK) : space->read_direct<UINT8, true>(address, 0xff); }
1445   static UINT16 read_word_static(this_type *space, offs_t address) { return (NATIVE_BITS == 16) ? space->read_native(address & ~NATIVE_MASK) : space->read_direct<UINT16, true>(address, 0xffff); }
1446   static UINT16 read_word_masked_static(this_type *space, offs_t address, UINT16 mask) { return space->read_direct<UINT16, true>(address, mask); }
1447   static UINT32 read_dword_static(this_type *space, offs_t address) { return (NATIVE_BITS == 32) ? space->read_native(address & ~NATIVE_MASK) : space->read_direct<UINT32, true>(address, 0xffffffff); }
1448   static UINT32 read_dword_masked_static(this_type *space, offs_t address, UINT32 mask) { return space->read_direct<UINT32, true>(address, mask); }
1449   static UINT64 read_qword_static(this_type *space, offs_t address) { return (NATIVE_BITS == 64) ? space->read_native(address & ~NATIVE_MASK) : space->read_direct<UINT64, true>(address, U64(0xffffffffffffffff)); }
1450   static UINT64 read_qword_masked_static(this_type *space, offs_t address, UINT64 mask) { return space->read_direct<UINT64, true>(address, mask); }
1451   static void write_byte_static(this_type *space, offs_t address, UINT8 data) { if (NATIVE_BITS == 8) space->write_native(address & ~NATIVE_MASK, data); else space->write_direct<UINT8, true>(address, data, 0xff); }
1452   static void write_word_static(this_type *space, offs_t address, UINT16 data) { if (NATIVE_BITS == 16) space->write_native(address & ~NATIVE_MASK, data); else space->write_direct<UINT16, true>(address, data, 0xffff); }
1453   static void write_word_masked_static(this_type *space, offs_t address, UINT16 data, UINT16 mask) { space->write_direct<UINT16, true>(address, data, mask); }
1454   static void write_dword_static(this_type *space, offs_t address, UINT32 data) { if (NATIVE_BITS == 32) space->write_native(address & ~NATIVE_MASK, data); else space->write_direct<UINT32, true>(address, data, 0xffffffff); }
1455   static void write_dword_masked_static(this_type *space, offs_t address, UINT32 data, UINT32 mask) { space->write_direct<UINT32, true>(address, data, mask); }
1456   static void write_qword_static(this_type *space, offs_t address, UINT64 data) { if (NATIVE_BITS == 64) space->write_native(address & ~NATIVE_MASK, data); else space->write_direct<UINT64, true>(address, data, U64(0xffffffffffffffff)); }
1457   static void write_qword_masked_static(this_type *space, offs_t address, UINT64 data, UINT64 mask) { space->write_direct<UINT64, true>(address, data, mask); }
1444   static UINT8 read_byte_static(this_type &space, offs_t address) { return (NATIVE_BITS == 8) ? space.read_native(address & ~NATIVE_MASK) : space.read_direct<UINT8, true>(address, 0xff); }
1445   static UINT16 read_word_static(this_type &space, offs_t address) { return (NATIVE_BITS == 16) ? space.read_native(address & ~NATIVE_MASK) : space.read_direct<UINT16, true>(address, 0xffff); }
1446   static UINT16 read_word_masked_static(this_type &space, offs_t address, UINT16 mask) { return space.read_direct<UINT16, true>(address, mask); }
1447   static UINT32 read_dword_static(this_type &space, offs_t address) { return (NATIVE_BITS == 32) ? space.read_native(address & ~NATIVE_MASK) : space.read_direct<UINT32, true>(address, 0xffffffff); }
1448   static UINT32 read_dword_masked_static(this_type &space, offs_t address, UINT32 mask) { return space.read_direct<UINT32, true>(address, mask); }
1449   static UINT64 read_qword_static(this_type &space, offs_t address) { return (NATIVE_BITS == 64) ? space.read_native(address & ~NATIVE_MASK) : space.read_direct<UINT64, true>(address, U64(0xffffffffffffffff)); }
1450   static UINT64 read_qword_masked_static(this_type &space, offs_t address, UINT64 mask) { return space.read_direct<UINT64, true>(address, mask); }
1451   static void write_byte_static(this_type &space, offs_t address, UINT8 data) { if (NATIVE_BITS == 8) space.write_native(address & ~NATIVE_MASK, data); else space.write_direct<UINT8, true>(address, data, 0xff); }
1452   static void write_word_static(this_type &space, offs_t address, UINT16 data) { if (NATIVE_BITS == 16) space.write_native(address & ~NATIVE_MASK, data); else space.write_direct<UINT16, true>(address, data, 0xffff); }
1453   static void write_word_masked_static(this_type &space, offs_t address, UINT16 data, UINT16 mask) { space.write_direct<UINT16, true>(address, data, mask); }
1454   static void write_dword_static(this_type &space, offs_t address, UINT32 data) { if (NATIVE_BITS == 32) space.write_native(address & ~NATIVE_MASK, data); else space.write_direct<UINT32, true>(address, data, 0xffffffff); }
1455   static void write_dword_masked_static(this_type &space, offs_t address, UINT32 data, UINT32 mask) { space.write_direct<UINT32, true>(address, data, mask); }
1456   static void write_qword_static(this_type &space, offs_t address, UINT64 data) { if (NATIVE_BITS == 64) space.write_native(address & ~NATIVE_MASK, data); else space.write_direct<UINT64, true>(address, data, U64(0xffffffffffffffff)); }
1457   static void write_qword_masked_static(this_type &space, offs_t address, UINT64 data, UINT64 mask) { space.write_direct<UINT64, true>(address, data, mask); }
14581458
14591459   address_table_read      m_read;            // memory read lookup table
14601460   address_table_write      m_write;         // memory write lookup table
r17963r17964
49844984         offs_t aoffset = offset * si.m_multiplier + si.m_offset;
49854985         UINT8 val;
49864986         if (m_sub_is_legacy[index])
4987            val = m_sublegacy_info[index].handler.space8(m_sublegacy_info[index].object.space, aoffset);
4987            val = m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset);
49884988         else
49894989            val = m_subread[index].r8(space, aoffset, submask);
49904990         result |= val << si.m_shift;
r17963r17964
50155015            switch (si.m_size)
50165016            {
50175017            case 8:
5018               val = m_sublegacy_info[index].handler.space8(m_sublegacy_info[index].object.space, aoffset);
5018               val = m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset);
50195019               break;
50205020            case 16:
5021               val = m_sublegacy_info[index].handler.space16(m_sublegacy_info[index].object.space, aoffset, submask);
5021               val = m_sublegacy_info[index].handler.space16(*m_sublegacy_info[index].object.space, aoffset, submask);
50225022               break;
50235023            }
50245024         }
r17963r17964
50625062            switch (si.m_size)
50635063            {
50645064            case 8:
5065               val = m_sublegacy_info[index].handler.space8(m_sublegacy_info[index].object.space, aoffset);
5065               val = m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset);
50665066               break;
50675067            case 16:
5068               val = m_sublegacy_info[index].handler.space16(m_sublegacy_info[index].object.space, aoffset, submask);
5068               val = m_sublegacy_info[index].handler.space16(*m_sublegacy_info[index].object.space, aoffset, submask);
50695069               break;
50705070            case 32:
5071               val = m_sublegacy_info[index].handler.space32(m_sublegacy_info[index].object.space, aoffset, submask);
5071               val = m_sublegacy_info[index].handler.space32(*m_sublegacy_info[index].object.space, aoffset, submask);
50725072               break;
50735073            }
50745074         }
r17963r17964
51015101
51025102UINT8 handler_entry_read::read_stub_legacy(address_space &space, offs_t offset, UINT8 mask)
51035103{
5104   return m_legacy_info.handler.space8(m_legacy_info.object.space, offset);
5104   return m_legacy_info.handler.space8(*m_legacy_info.object.space, offset);
51055105}
51065106
51075107UINT16 handler_entry_read::read_stub_legacy(address_space &space, offs_t offset, UINT16 mask)
51085108{
5109   return m_legacy_info.handler.space16(m_legacy_info.object.space, offset, mask);
5109   return m_legacy_info.handler.space16(*m_legacy_info.object.space, offset, mask);
51105110}
51115111
51125112UINT32 handler_entry_read::read_stub_legacy(address_space &space, offs_t offset, UINT32 mask)
51135113{
5114   return m_legacy_info.handler.space32(m_legacy_info.object.space, offset, mask);
5114   return m_legacy_info.handler.space32(*m_legacy_info.object.space, offset, mask);
51155115}
51165116
51175117UINT64 handler_entry_read::read_stub_legacy(address_space &space, offs_t offset, UINT64 mask)
51185118{
5119   return m_legacy_info.handler.space64(m_legacy_info.object.space, offset, mask);
5119   return m_legacy_info.handler.space64(*m_legacy_info.object.space, offset, mask);
51205120}
51215121
51225122
r17963r17964
54385438         offs_t aoffset = offset * si.m_multiplier + si.m_offset;
54395439         UINT8 adata = data >> si.m_shift;
54405440         if (m_sub_is_legacy[index])
5441            m_sublegacy_info[index].handler.space8(m_sublegacy_info[index].object.space, aoffset, adata);
5441            m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset, adata);
54425442         else
54435443            m_subwrite[index].w8(space, aoffset, adata, submask);
54445444      }
r17963r17964
54665466            switch (si.m_size)
54675467            {
54685468            case 8:
5469               m_sublegacy_info[index].handler.space8(m_sublegacy_info[index].object.space, aoffset, adata);
5469               m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset, adata);
54705470               break;
54715471            case 16:
5472               m_sublegacy_info[index].handler.space16(m_sublegacy_info[index].object.space, aoffset, adata, submask);
5472               m_sublegacy_info[index].handler.space16(*m_sublegacy_info[index].object.space, aoffset, adata, submask);
54735473               break;
54745474            }
54755475         }
r17963r17964
55105510            switch (si.m_size)
55115511            {
55125512            case 8:
5513               m_sublegacy_info[index].handler.space8(m_sublegacy_info[index].object.space, aoffset, adata);
5513               m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset, adata);
55145514               break;
55155515            case 16:
5516               m_sublegacy_info[index].handler.space16(m_sublegacy_info[index].object.space, aoffset, adata, submask);
5516               m_sublegacy_info[index].handler.space16(*m_sublegacy_info[index].object.space, aoffset, adata, submask);
55175517               break;
55185518            case 32:
5519               m_sublegacy_info[index].handler.space32(m_sublegacy_info[index].object.space, aoffset, adata, submask);
5519               m_sublegacy_info[index].handler.space32(*m_sublegacy_info[index].object.space, aoffset, adata, submask);
55205520               break;
55215521            }
55225522         }
r17963r17964
55475547
55485548void handler_entry_write::write_stub_legacy(address_space &space, offs_t offset, UINT8 data, UINT8 mask)
55495549{
5550   m_legacy_info.handler.space8(m_legacy_info.object.space, offset, data);
5550   m_legacy_info.handler.space8(*m_legacy_info.object.space, offset, data);
55515551}
55525552
55535553void handler_entry_write::write_stub_legacy(address_space &space, offs_t offset, UINT16 data, UINT16 mask)
55545554{
5555   m_legacy_info.handler.space16(m_legacy_info.object.space, offset, data, mask);
5555   m_legacy_info.handler.space16(*m_legacy_info.object.space, offset, data, mask);
55565556}
55575557
55585558void handler_entry_write::write_stub_legacy(address_space &space, offs_t offset, UINT32 data, UINT32 mask)
55595559{
5560   m_legacy_info.handler.space32(m_legacy_info.object.space, offset, data, mask);
5560   m_legacy_info.handler.space32(*m_legacy_info.object.space, offset, data, mask);
55615561}
55625562
55635563void handler_entry_write::write_stub_legacy(address_space &space, offs_t offset, UINT64 data, UINT64 mask)
55645564{
5565   m_legacy_info.handler.space64(m_legacy_info.object.space, offset, data, mask);
5565   m_legacy_info.handler.space64(*m_legacy_info.object.space, offset, data, mask);
55665566}
trunk/src/emu/memory.h
r17963r17964
112112
113113
114114// legacy space read/write handlers
115typedef UINT8   (*read8_space_func)  (ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset);
116typedef void   (*write8_space_func) (ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data);
117typedef UINT16   (*read16_space_func) (ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask);
118typedef void   (*write16_space_func)(ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask);
119typedef UINT32   (*read32_space_func) (ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask);
120typedef void   (*write32_space_func)(ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask);
121typedef UINT64   (*read64_space_func) (ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask);
122typedef void   (*write64_space_func)(ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask);
115typedef UINT8   (*read8_space_func)  (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset);
116typedef void   (*write8_space_func) (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data);
117typedef UINT16   (*read16_space_func) (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask);
118typedef void   (*write16_space_func)(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask);
119typedef UINT32   (*read32_space_func) (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask);
120typedef void   (*write32_space_func)(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask);
121typedef UINT64   (*read64_space_func) (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask);
122typedef void   (*write64_space_func)(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask);
123123
124124// legacy device read/write handlers
125125typedef UINT8   (*read8_device_func)  (ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask);
r17963r17964
135135// struct with function pointers for accessors; use is generally discouraged unless necessary
136136struct data_accessors
137137{
138   UINT8      (*read_byte)(address_space *space, offs_t byteaddress);
139   UINT16      (*read_word)(address_space *space, offs_t byteaddress);
140   UINT16      (*read_word_masked)(address_space *space, offs_t byteaddress, UINT16 mask);
141   UINT32      (*read_dword)(address_space *space, offs_t byteaddress);
142   UINT32      (*read_dword_masked)(address_space *space, offs_t byteaddress, UINT32 mask);
143   UINT64      (*read_qword)(address_space *space, offs_t byteaddress);
144   UINT64      (*read_qword_masked)(address_space *space, offs_t byteaddress, UINT64 mask);
138   UINT8      (*read_byte)(address_space &space, offs_t byteaddress);
139   UINT16      (*read_word)(address_space &space, offs_t byteaddress);
140   UINT16      (*read_word_masked)(address_space &space, offs_t byteaddress, UINT16 mask);
141   UINT32      (*read_dword)(address_space &space, offs_t byteaddress);
142   UINT32      (*read_dword_masked)(address_space &space, offs_t byteaddress, UINT32 mask);
143   UINT64      (*read_qword)(address_space &space, offs_t byteaddress);
144   UINT64      (*read_qword_masked)(address_space &space, offs_t byteaddress, UINT64 mask);
145145
146   void      (*write_byte)(address_space *space, offs_t byteaddress, UINT8 data);
147   void      (*write_word)(address_space *space, offs_t byteaddress, UINT16 data);
148   void      (*write_word_masked)(address_space *space, offs_t byteaddress, UINT16 data, UINT16 mask);
149   void      (*write_dword)(address_space *space, offs_t byteaddress, UINT32 data);
150   void      (*write_dword_masked)(address_space *space, offs_t byteaddress, UINT32 data, UINT32 mask);
151   void      (*write_qword)(address_space *space, offs_t byteaddress, UINT64 data);
152   void      (*write_qword_masked)(address_space *space, offs_t byteaddress, UINT64 data, UINT64 mask);
146   void      (*write_byte)(address_space &space, offs_t byteaddress, UINT8 data);
147   void      (*write_word)(address_space &space, offs_t byteaddress, UINT16 data);
148   void      (*write_word_masked)(address_space &space, offs_t byteaddress, UINT16 data, UINT16 mask);
149   void      (*write_dword)(address_space &space, offs_t byteaddress, UINT32 data);
150   void      (*write_dword_masked)(address_space &space, offs_t byteaddress, UINT32 data, UINT32 mask);
151   void      (*write_qword)(address_space &space, offs_t byteaddress, UINT64 data);
152   void      (*write_qword_masked)(address_space &space, offs_t byteaddress, UINT64 data, UINT64 mask);
153153};
154154
155155
r17963r17964
876876
877877
878878// space read/write handler function macros
879#define READ8_HANDLER(name)          UINT8  name(ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset)
880#define WRITE8_HANDLER(name)         void   name(ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data)
881#define READ16_HANDLER(name)         UINT16 name(ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask)
882#define WRITE16_HANDLER(name)         void   name(ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask)
883#define READ32_HANDLER(name)         UINT32 name(ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask)
884#define WRITE32_HANDLER(name)         void   name(ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask)
885#define READ64_HANDLER(name)         UINT64 name(ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask)
886#define WRITE64_HANDLER(name)         void   name(ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask)
879#define READ8_HANDLER(name)          UINT8  name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset)
880#define WRITE8_HANDLER(name)         void   name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data)
881#define READ16_HANDLER(name)         UINT16 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask)
882#define WRITE16_HANDLER(name)         void   name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask)
883#define READ32_HANDLER(name)         UINT32 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask)
884#define WRITE32_HANDLER(name)         void   name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask)
885#define READ64_HANDLER(name)         UINT64 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask)
886#define WRITE64_HANDLER(name)         void   name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask)
887887
888888
889889// device read/write handler function macros
trunk/src/emu/machine/pc16552d.c
r17963r17964
420420
421421READ8_HANDLER(pc16552d_0_r)
422422{
423   return duart_r(space->machine(), 0, offset);
423   return duart_r(space.machine(), 0, offset);
424424}
425425
426426WRITE8_HANDLER(pc16552d_0_w)
427427{
428   duart_w(space->machine(), 0, offset, data);
428   duart_w(space.machine(), 0, offset, data);
429429}
430430
431431READ8_HANDLER(pc16552d_1_r)
432432{
433   return duart_r(space->machine(), 1, offset);
433   return duart_r(space.machine(), 1, offset);
434434}
435435
436436WRITE8_HANDLER(pc16552d_1_w)
437437{
438   duart_w(space->machine(), 1, offset, data);
438   duart_w(space.machine(), 1, offset, data);
439439}
trunk/src/emu/machine/k056230.c
r17963r17964
8282      }
8383   }
8484
85//  mame_printf_debug("k056230_r: %d at %08X\n", offset, space->device().safe_pc());
85//  mame_printf_debug("k056230_r: %d at %08X\n", offset, space.device().safe_pc());
8686
8787   return 0;
8888}
r17963r17964
132132         break;
133133      }
134134   }
135//  mame_printf_debug("k056230_w: %d, %02X at %08X\n", offset, data, space->device().safe_pc());
135//  mame_printf_debug("k056230_w: %d, %02X at %08X\n", offset, data, space.device().safe_pc());
136136}
137137
138138READ32_DEVICE_HANDLER_TRAMPOLINE(k056230, lanc_ram_r)
139139{
140   //mame_printf_debug("LANC_RAM_r: %08X, %08X at %08X\n", offset, mem_mask, space->device().safe_pc());
140   //mame_printf_debug("LANC_RAM_r: %08X, %08X at %08X\n", offset, mem_mask, space.device().safe_pc());
141141   return m_ram[offset & 0x7ff];
142142}
143143
144144WRITE32_DEVICE_HANDLER_TRAMPOLINE(k056230, lanc_ram_w)
145145{
146   //mame_printf_debug("LANC_RAM_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, space->device().safe_pc());
146   //mame_printf_debug("LANC_RAM_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, space.device().safe_pc());
147147   COMBINE_DATA(m_ram + (offset & 0x7ff));
148148}
trunk/src/emu/machine/53c810.c
r17963r17964
393393
394394UINT8 lsi53c810_device::lsi53c810_reg_r( int offset )
395395{
396//  logerror("53c810: read reg %d:0x%x (PC=%x)\n", offset, offset, space->device().safe_pc());
396//   logerror("53c810: read reg %d:0x%x (PC=%x)\n", offset, offset, space.device().safe_pc());
397397   switch(offset)
398398   {
399399      case 0x00:      /* SCNTL0 */
r17963r17964
476476
477477void lsi53c810_device::lsi53c810_reg_w(int offset, UINT8 data)
478478{
479//  logerror("53c810: %02x to reg %d:0x%x (PC=%x)\n", data, offset, offset, space->device().safe_pc());
479//   logerror("53c810: %02x to reg %d:0x%x (PC=%x)\n", data, offset, offset, space.device().safe_pc());
480480   switch(offset)
481481   {
482482      case 0x00:      /* SCNTL0 */
trunk/src/emu/machine/amigafdc.c
r17963r17964
9696void amiga_fdc::dma_done()
9797{
9898   dma_state = DMA_IDLE;
99   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
99   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
100100   amiga_custom_w(space, REG_INTREQ, 0x8000 | INTENA_DSKBLK, 0xffff);
101101}
102102
r17963r17964
233233                  cur_live.bit_counter = 0;
234234            }
235235            dskbyt |= 0x1000;
236            address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
236            address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
237237            amiga_custom_w(space, REG_INTREQ, 0x8000 | INTENA_DSKSYN, 0xffff);
238238         } else
239239            dskbyt &= ~0x1000;
trunk/src/emu/machine/s3c2440.c
r17963r17964
3838
3939DEVICE_START( s3c2440 )
4040{
41   address_space *space = device->machine().device( "maincpu")->memory().space( AS_PROGRAM);
42   space->install_legacy_readwrite_handler( *device, 0x48000000, 0x4800003b, FUNC(s3c24xx_memcon_r), FUNC(s3c24xx_memcon_w));
43   space->install_legacy_readwrite_handler( *device, 0x49000000, 0x4900005b, FUNC(s3c24xx_usb_host_r), FUNC(s3c24xx_usb_host_w));
44   space->install_legacy_readwrite_handler( *device, 0x4a000000, 0x4a00001f, FUNC(s3c24xx_irq_r), FUNC(s3c24xx_irq_w));
45   space->install_legacy_readwrite_handler( *device, 0x4b000000, 0x4b000023, FUNC(s3c24xx_dma_0_r), FUNC(s3c24xx_dma_0_w));
46   space->install_legacy_readwrite_handler( *device, 0x4b000040, 0x4b000063, FUNC(s3c24xx_dma_1_r), FUNC(s3c24xx_dma_1_w));
47   space->install_legacy_readwrite_handler( *device, 0x4b000080, 0x4b0000a3, FUNC(s3c24xx_dma_2_r), FUNC(s3c24xx_dma_2_w));
48   space->install_legacy_readwrite_handler( *device, 0x4b0000c0, 0x4b0000e3, FUNC(s3c24xx_dma_3_r), FUNC(s3c24xx_dma_3_w));
49   space->install_legacy_readwrite_handler( *device, 0x4c000000, 0x4c00001b, FUNC(s3c24xx_clkpow_r), FUNC(s3c24xx_clkpow_w));
50   space->install_legacy_readwrite_handler( *device, 0x4d000000, 0x4d000063, FUNC(s3c2440_lcd_r), FUNC(s3c24xx_lcd_w));
51   space->install_legacy_readwrite_handler( *device, 0x4d000400, 0x4d0007ff, FUNC(s3c24xx_lcd_palette_r), FUNC(s3c24xx_lcd_palette_w));
52   space->install_legacy_readwrite_handler( *device, 0x4e000000, 0x4e00003f, FUNC(s3c24xx_nand_r), FUNC(s3c24xx_nand_w));
53   space->install_legacy_readwrite_handler( *device, 0x4f000000, 0x4f0000a3, FUNC(s3c24xx_cam_r), FUNC(s3c24xx_cam_w));
54   space->install_legacy_readwrite_handler( *device, 0x50000000, 0x5000002b, FUNC(s3c24xx_uart_0_r), FUNC(s3c24xx_uart_0_w));
55   space->install_legacy_readwrite_handler( *device, 0x50004000, 0x5000402b, FUNC(s3c24xx_uart_1_r), FUNC(s3c24xx_uart_1_w));
56   space->install_legacy_readwrite_handler( *device, 0x50008000, 0x5000802b, FUNC(s3c24xx_uart_2_r), FUNC(s3c24xx_uart_2_w));
57   space->install_legacy_readwrite_handler( *device, 0x51000000, 0x51000043, FUNC(s3c24xx_pwm_r), FUNC(s3c24xx_pwm_w));
58   space->install_legacy_readwrite_handler( *device, 0x52000140, 0x5200026f, FUNC(s3c24xx_usb_device_r), FUNC(s3c24xx_usb_device_w));
59   space->install_legacy_readwrite_handler( *device, 0x53000000, 0x5300000b, FUNC(s3c24xx_wdt_r), FUNC(s3c24xx_wdt_w));
60   space->install_legacy_readwrite_handler( *device, 0x54000000, 0x54000013, FUNC(s3c24xx_iic_r), FUNC(s3c24xx_iic_w));
61   space->install_legacy_readwrite_handler( *device, 0x55000000, 0x55000013, FUNC(s3c24xx_iis_r), FUNC(s3c24xx_iis_w));
62   space->install_legacy_readwrite_handler( *device, 0x56000000, 0x560000df, FUNC(s3c24xx_gpio_r), FUNC(s3c24xx_gpio_w));
63   space->install_legacy_readwrite_handler( *device, 0x57000040, 0x5700008b, FUNC(s3c24xx_rtc_r), FUNC(s3c24xx_rtc_w));
64   space->install_legacy_readwrite_handler( *device, 0x58000000, 0x58000017, FUNC(s3c24xx_adc_r), FUNC(s3c24xx_adc_w));
65   space->install_legacy_readwrite_handler( *device, 0x59000000, 0x59000017, FUNC(s3c24xx_spi_0_r), FUNC(s3c24xx_spi_0_w));
66   space->install_legacy_readwrite_handler( *device, 0x59000020, 0x59000037, FUNC(s3c24xx_spi_1_r), FUNC(s3c24xx_spi_1_w));
67   space->install_legacy_readwrite_handler( *device, 0x5a000000, 0x5a000043, FUNC(s3c24xx_sdi_r), FUNC(s3c24xx_sdi_w));
68   space->install_legacy_readwrite_handler( *device, 0x5b000000, 0x5b00001f, FUNC(s3c24xx_ac97_r), FUNC(s3c24xx_ac97_w));
41   address_space &space = *device->machine().device( "maincpu")->memory().space( AS_PROGRAM);
42   space.install_legacy_readwrite_handler( *device, 0x48000000, 0x4800003b, FUNC(s3c24xx_memcon_r), FUNC(s3c24xx_memcon_w));
43   space.install_legacy_readwrite_handler( *device, 0x49000000, 0x4900005b, FUNC(s3c24xx_usb_host_r), FUNC(s3c24xx_usb_host_w));
44   space.install_legacy_readwrite_handler( *device, 0x4a000000, 0x4a00001f, FUNC(s3c24xx_irq_r), FUNC(s3c24xx_irq_w));
45   space.install_legacy_readwrite_handler( *device, 0x4b000000, 0x4b000023, FUNC(s3c24xx_dma_0_r), FUNC(s3c24xx_dma_0_w));
46   space.install_legacy_readwrite_handler( *device, 0x4b000040, 0x4b000063, FUNC(s3c24xx_dma_1_r), FUNC(s3c24xx_dma_1_w));
47   space.install_legacy_readwrite_handler( *device, 0x4b000080, 0x4b0000a3, FUNC(s3c24xx_dma_2_r), FUNC(s3c24xx_dma_2_w));
48   space.install_legacy_readwrite_handler( *device, 0x4b0000c0, 0x4b0000e3, FUNC(s3c24xx_dma_3_r), FUNC(s3c24xx_dma_3_w));
49   space.install_legacy_readwrite_handler( *device, 0x4c000000, 0x4c00001b, FUNC(s3c24xx_clkpow_r), FUNC(s3c24xx_clkpow_w));
50   space.install_legacy_readwrite_handler( *device, 0x4d000000, 0x4d000063, FUNC(s3c2440_lcd_r), FUNC(s3c24xx_lcd_w));
51   space.install_legacy_readwrite_handler( *device, 0x4d000400, 0x4d0007ff, FUNC(s3c24xx_lcd_palette_r), FUNC(s3c24xx_lcd_palette_w));
52   space.install_legacy_readwrite_handler( *device, 0x4e000000, 0x4e00003f, FUNC(s3c24xx_nand_r), FUNC(s3c24xx_nand_w));
53   space.install_legacy_readwrite_handler( *device, 0x4f000000, 0x4f0000a3, FUNC(s3c24xx_cam_r), FUNC(s3c24xx_cam_w));
54   space.install_legacy_readwrite_handler( *device, 0x50000000, 0x5000002b, FUNC(s3c24xx_uart_0_r), FUNC(s3c24xx_uart_0_w));
55   space.install_legacy_readwrite_handler( *device, 0x50004000, 0x5000402b, FUNC(s3c24xx_uart_1_r), FUNC(s3c24xx_uart_1_w));
56   space.install_legacy_readwrite_handler( *device, 0x50008000, 0x5000802b, FUNC(s3c24xx_uart_2_r), FUNC(s3c24xx_uart_2_w));
57   space.install_legacy_readwrite_handler( *device, 0x51000000, 0x51000043, FUNC(s3c24xx_pwm_r), FUNC(s3c24xx_pwm_w));
58   space.install_legacy_readwrite_handler( *device, 0x52000140, 0x5200026f, FUNC(s3c24xx_usb_device_r), FUNC(s3c24xx_usb_device_w));
59   space.install_legacy_readwrite_handler( *device, 0x53000000, 0x5300000b, FUNC(s3c24xx_wdt_r), FUNC(s3c24xx_wdt_w));
60   space.install_legacy_readwrite_handler( *device, 0x54000000, 0x54000013, FUNC(s3c24xx_iic_r), FUNC(s3c24xx_iic_w));
61   space.install_legacy_readwrite_handler( *device, 0x55000000, 0x55000013, FUNC(s3c24xx_iis_r), FUNC(s3c24xx_iis_w));
62   space.install_legacy_readwrite_handler( *device, 0x56000000, 0x560000df, FUNC(s3c24xx_gpio_r), FUNC(s3c24xx_gpio_w));
63   space.install_legacy_readwrite_handler( *device, 0x57000040, 0x5700008b, FUNC(s3c24xx_rtc_r), FUNC(s3c24xx_rtc_w));
64   space.install_legacy_readwrite_handler( *device, 0x58000000, 0x58000017, FUNC(s3c24xx_adc_r), FUNC(s3c24xx_adc_w));
65   space.install_legacy_readwrite_handler( *device, 0x59000000, 0x59000017, FUNC(s3c24xx_spi_0_r), FUNC(s3c24xx_spi_0_w));
66   space.install_legacy_readwrite_handler( *device, 0x59000020, 0x59000037, FUNC(s3c24xx_spi_1_r), FUNC(s3c24xx_spi_1_w));
67   space.install_legacy_readwrite_handler( *device, 0x5a000000, 0x5a000043, FUNC(s3c24xx_sdi_r), FUNC(s3c24xx_sdi_w));
68   space.install_legacy_readwrite_handler( *device, 0x5b000000, 0x5b00001f, FUNC(s3c24xx_ac97_r), FUNC(s3c24xx_ac97_w));
6969   DEVICE_START_CALL(s3c24xx);
7070
7171   s3c24xx_video_start( device, device->machine());
trunk/src/emu/machine/s3c24xx.c
r17963r17964
301301static UINT32 s3c24xx_lcd_dma_read( device_t *device)
302302{
303303   s3c24xx_t *s3c24xx = get_token( device);
304   address_space* space = device->machine().device( "maincpu")->memory().space( AS_PROGRAM);
304   address_space& space = *device->machine().device( "maincpu")->memory().space( AS_PROGRAM);
305305   UINT8 *vram, data[4];
306   vram = (UINT8 *)space->get_read_ptr( s3c24xx->lcd.vramaddr_cur);
306   vram = (UINT8 *)space.get_read_ptr( s3c24xx->lcd.vramaddr_cur);
307307   for (int i = 0; i < 2; i++)
308308   {
309309      data[i*2+0] = *vram++;
r17963r17964
314314      {
315315         s3c24xx->lcd.vramaddr_cur += s3c24xx->lcd.offsize << 1;
316316         s3c24xx->lcd.pagewidth_cur = 0;
317         vram = (UINT8 *)space->get_read_ptr( s3c24xx->lcd.vramaddr_cur);
317         vram = (UINT8 *)space.get_read_ptr( s3c24xx->lcd.vramaddr_cur);
318318      }
319319   }
320320   if (s3c24xx->lcd.hwswp == 0)
r17963r17964
345345static UINT32 s3c24xx_lcd_dma_read( device_t *device)
346346{
347347   s3c24xx_t *s3c24xx = get_token( device);
348   address_space* space = device->machine().device( "maincpu")->memory().space( AS_PROGRAM);
348   address_space& space = *device->machine().device( "maincpu")->memory().space( AS_PROGRAM);
349349   UINT8 *vram, data[4];
350   vram = (UINT8 *)space->get_read_ptr( s3c24xx->lcd.vramaddr_cur);
350   vram = (UINT8 *)space.get_read_ptr( s3c24xx->lcd.vramaddr_cur);
351351   for (int i = 0; i < 2; i++)
352352   {
353353      if (s3c24xx->lcd.hwswp == 0)
r17963r17964
398398      {
399399         s3c24xx->lcd.vramaddr_cur += s3c24xx->lcd.offsize << 1;
400400         s3c24xx->lcd.pagewidth_cur = 0;
401         vram = (UINT8 *)space->get_read_ptr( s3c24xx->lcd.vramaddr_cur);
401         vram = (UINT8 *)space.get_read_ptr( s3c24xx->lcd.vramaddr_cur);
402402      }
403403      else
404404      {
r17963r17964
16111611   s3c24xx_t *s3c24xx = get_token( device);
16121612   s3c24xx_dma_regs_t *regs = &s3c24xx->dma[ch].regs;
16131613   UINT32 curr_tc, curr_src, curr_dst;
1614   address_space *space = device->machine().device( "maincpu")->memory().space( AS_PROGRAM);
1614   address_space &space = *device->machine().device( "maincpu")->memory().space( AS_PROGRAM);
16151615   int dsz, inc_src, inc_dst, servmode, tsz;
16161616   const UINT32 ch_int[] = { S3C24XX_INT_DMA0, S3C24XX_INT_DMA1, S3C24XX_INT_DMA2, S3C24XX_INT_DMA3};
16171617   verboselog( device->machine(), 5, "DMA %d trigger\n", ch);
r17963r17964
16361636      {
16371637         switch (dsz)
16381638         {
1639            case 0 : space->write_byte( curr_dst, space->read_byte( curr_src)); break;
1640            case 1 : space->write_word( curr_dst, space->read_word( curr_src)); break;
1641            case 2 : space->write_dword( curr_dst, space->read_dword( curr_src)); break;
1639            case 0 : space.write_byte( curr_dst, space.read_byte( curr_src)); break;
1640            case 1 : space.write_word( curr_dst, space.read_word( curr_src)); break;
1641            case 2 : space.write_dword( curr_dst, space.read_dword( curr_src)); break;
16421642         }
16431643         if (inc_src == 0) curr_src += (1 << dsz);
16441644         if (inc_dst == 0) curr_dst += (1 << dsz);
r17963r17964
37013701   int om1 = iface_core_pin_r( device, S3C24XX_CORE_PIN_OM1);
37023702   if ((om0 == 0) && (om1 == 0))
37033703   {
3704      address_space *space = device->machine().device( "maincpu")->memory().space( AS_PROGRAM);
3705      space->install_ram( 0x00000000, 0x00000fff, s3c24xx->steppingstone);
3706      space->install_ram( 0x40000000, 0x40000fff, s3c24xx->steppingstone);
3704      address_space &space = *device->machine().device( "maincpu")->memory().space( AS_PROGRAM);
3705      space.install_ram( 0x00000000, 0x00000fff, s3c24xx->steppingstone);
3706      space.install_ram( 0x40000000, 0x40000fff, s3c24xx->steppingstone);
37073707   }
37083708   #endif
37093709}
trunk/src/emu/machine/8042kbdc.c
r17963r17964
370370         /* at386 self test doesn't like this */
371371         at_8042_clear_keyboard_received();
372372      }
373      at_8042_check_keyboard(space->machine());
373      at_8042_check_keyboard(space.machine());
374374      break;
375375
376376   case 1:
r17963r17964
398398      break;
399399
400400   case 2:
401      if (kbdc8042.get_out2(space->machine()))
401      if (kbdc8042.get_out2(space.machine()))
402402         data |= 0x20;
403403      else
404404         data &= ~0x20;
405405      break;
406406
407407   case 4:
408      at_8042_check_keyboard(space->machine());
408      at_8042_check_keyboard(space.machine());
409409
410410      if (kbdc8042.keyboard.received || kbdc8042.mouse.received)
411411         data |= 1;
r17963r17964
451451         /* normal case */
452452         kbdc8042.data = data;
453453         kbdc8042.sending=1;
454         at_keyboard_write(space->machine(), data);
454         at_keyboard_write(space.machine(), data);
455455         break;
456456
457457      case 1:
r17963r17964
465465             *   | `----------- keyboard clock (output)
466466             *   `------------ keyboard data (output)
467467             */
468         at_8042_set_outport(space->machine(), data, 0);
468         at_8042_set_outport(space.machine(), data, 0);
469469         break;
470470
471471      case 2:
472472         /* preceded by writing 0xD2 to port 60h */
473473         kbdc8042.data = data;
474474         kbdc8042.sending=1;
475         at_keyboard_write(space->machine(), data);
475         at_keyboard_write(space.machine(), data);
476476         break;
477477
478478      case 3:
r17963r17964
496496   case 1:
497497      kbdc8042.speaker = data;
498498      if (kbdc8042.set_spkr)
499               kbdc8042.set_spkr(space->machine(), kbdc8042.speaker);
499               kbdc8042.set_spkr(space.machine(), kbdc8042.speaker);
500500
501501      break;
502502
r17963r17964
519519         kbdc8042.mouse.on = 1;
520520         break;
521521      case 0xa9:   /* test mouse */
522         at_8042_receive(space->machine(), PS2_MOUSE_ON ? 0x00 : 0xff);
522         at_8042_receive(space.machine(), PS2_MOUSE_ON ? 0x00 : 0xff);
523523         break;
524524      case 0xaa:   /* selftest */
525         at_8042_receive(space->machine(), 0x55);
525         at_8042_receive(space.machine(), 0x55);
526526         break;
527527      case 0xab:   /* test keyboard */
528         at_8042_receive(space->machine(), KEYBOARD_ON ? 0x00 : 0xff);
528         at_8042_receive(space.machine(), KEYBOARD_ON ? 0x00 : 0xff);
529529         break;
530530      case 0xad:   /* disable keyboard interface */
531531         kbdc8042.keyboard.on = 0;
r17963r17964
543543             *   | `----------- 1=primary display is MDA, 0=CGA
544544             *   `------------ 1=keyboard not inhibited; 0=inhibited
545545             */
546         at_8042_receive(space->machine(), kbdc8042.inport);
546         at_8042_receive(space.machine(), kbdc8042.inport);
547547         break;
548548      case 0xc1:   /* read input port 3..0 until write to 0x60 */
549549         kbdc8042.status_read_mode = 1;
r17963r17964
552552         kbdc8042.status_read_mode = 2;
553553         break;
554554      case 0xd0:   /* read output port */
555         at_8042_receive(space->machine(), kbdc8042.outport);
555         at_8042_receive(space.machine(), kbdc8042.outport);
556556         break;
557557      case 0xd1:
558558         /* write output port; next byte written to port 60h is placed on
r17963r17964
581581         break;
582582      case 0xe0:
583583         /* read test inputs; read T1/T0 test inputs into bit 1/0 */
584         at_8042_receive(space->machine(), 0x00);
584         at_8042_receive(space.machine(), 0x00);
585585         break;
586586
587587      case 0xf0:
r17963r17964
597597             * the bits low set in the command byte.  The only pulse that has
598598             * an effect currently is bit 0, which pulses the CPU's reset line
599599             */
600         space->machine().firstcpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
601         at_8042_set_outport(space->machine(), kbdc8042.outport | 0x02, 0);
600         space.machine().firstcpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
601         at_8042_set_outport(space.machine(), kbdc8042.outport | 0x02, 0);
602602         break;
603603      }
604604      kbdc8042.sending = 1;
trunk/src/emu/machine/latch8.c
r17963r17964
8181   if (latch8->has_read)
8282   {
8383      /*  temporary hack until all relevant systems are devices */
84      address_space *space = &device->machine().driver_data()->generic_space();
84      address_space &space = device->machine().driver_data()->generic_space();
8585      int i;
8686      for (i=0; i<8; i++)
8787      {
trunk/src/emu/machine/v3021.c
r17963r17964
176176            break;
177177
178178         case 0xf:  //Load Date
179            //space->machine().base_datetime(m_systime);
179            //space.machine().base_datetime(m_systime);
180180            break;
181181      }
182182   }
trunk/src/emu/machine/s3c2400.c
r17963r17964
3838
3939DEVICE_START( s3c2400 )
4040{
41   address_space *space = device->machine().device( "maincpu")->memory().space( AS_PROGRAM);
41   address_space &space = *device->machine().device( "maincpu")->memory().space( AS_PROGRAM);
4242   DEVICE_START_CALL(s3c24xx);
43   space->install_legacy_readwrite_handler( *device, 0x14000000, 0x1400003b, FUNC(s3c24xx_memcon_r), FUNC(s3c24xx_memcon_w));
44   space->install_legacy_readwrite_handler( *device, 0x14200000, 0x1420005b, FUNC(s3c24xx_usb_host_r), FUNC(s3c24xx_usb_host_w));
45   space->install_legacy_readwrite_handler( *device, 0x14400000, 0x14400017, FUNC(s3c24xx_irq_r), FUNC(s3c24xx_irq_w));
46   space->install_legacy_readwrite_handler( *device, 0x14600000, 0x1460001b, FUNC(s3c24xx_dma_0_r), FUNC(s3c24xx_dma_0_w));
47   space->install_legacy_readwrite_handler( *device, 0x14600020, 0x1460003b, FUNC(s3c24xx_dma_1_r), FUNC(s3c24xx_dma_1_w));
48   space->install_legacy_readwrite_handler( *device, 0x14600040, 0x1460005b, FUNC(s3c24xx_dma_2_r), FUNC(s3c24xx_dma_2_w));
49   space->install_legacy_readwrite_handler( *device, 0x14600060, 0x1460007b, FUNC(s3c24xx_dma_3_r), FUNC(s3c24xx_dma_3_w));
50   space->install_legacy_readwrite_handler( *device, 0x14800000, 0x14800017, FUNC(s3c24xx_clkpow_r), FUNC(s3c24xx_clkpow_w));
51   space->install_legacy_readwrite_handler( *device, 0x14a00000, 0x14a003ff, FUNC(s3c2400_lcd_r), FUNC(s3c24xx_lcd_w));
52   space->install_legacy_readwrite_handler( *device, 0x14a00400, 0x14a007ff, FUNC(s3c24xx_lcd_palette_r), FUNC(s3c24xx_lcd_palette_w));
53   space->install_legacy_readwrite_handler( *device, 0x15000000, 0x1500002b, FUNC(s3c24xx_uart_0_r), FUNC(s3c24xx_uart_0_w));
54   space->install_legacy_readwrite_handler( *device, 0x15004000, 0x1500402b, FUNC(s3c24xx_uart_1_r), FUNC(s3c24xx_uart_1_w));
55   space->install_legacy_readwrite_handler( *device, 0x15100000, 0x15100043, FUNC(s3c24xx_pwm_r), FUNC(s3c24xx_pwm_w));
56   space->install_legacy_readwrite_handler( *device, 0x15200140, 0x152001fb, FUNC(s3c24xx_usb_device_r), FUNC(s3c24xx_usb_device_w));
57   space->install_legacy_readwrite_handler( *device, 0x15300000, 0x1530000b, FUNC(s3c24xx_wdt_r), FUNC(s3c24xx_wdt_w));
58   space->install_legacy_readwrite_handler( *device, 0x15400000, 0x1540000f, FUNC(s3c24xx_iic_r), FUNC(s3c24xx_iic_w));
59   space->install_legacy_readwrite_handler( *device, 0x15508000, 0x15508013, FUNC(s3c24xx_iis_r), FUNC(s3c24xx_iis_w));
60   space->install_legacy_readwrite_handler( *device, 0x15600000, 0x1560005b, FUNC(s3c24xx_gpio_r), FUNC(s3c24xx_gpio_w));
61   space->install_legacy_readwrite_handler( *device, 0x15700040, 0x1570008b, FUNC(s3c24xx_rtc_r), FUNC(s3c24xx_rtc_w));
62   space->install_legacy_readwrite_handler( *device, 0x15800000, 0x15800007, FUNC(s3c24xx_adc_r), FUNC(s3c24xx_adc_w));
63   space->install_legacy_readwrite_handler( *device, 0x15900000, 0x15900017, FUNC(s3c24xx_spi_0_r), FUNC(s3c24xx_spi_0_w));
64   space->install_legacy_readwrite_handler( *device, 0x15a00000, 0x15a0003f, FUNC(s3c24xx_mmc_r), FUNC(s3c24xx_mmc_w));
43   space.install_legacy_readwrite_handler( *device, 0x14000000, 0x1400003b, FUNC(s3c24xx_memcon_r), FUNC(s3c24xx_memcon_w));
44   space.install_legacy_readwrite_handler( *device, 0x14200000, 0x1420005b, FUNC(s3c24xx_usb_host_r), FUNC(s3c24xx_usb_host_w));
45   space.install_legacy_readwrite_handler( *device, 0x14400000, 0x14400017, FUNC(s3c24xx_irq_r), FUNC(s3c24xx_irq_w));
46   space.install_legacy_readwrite_handler( *device, 0x14600000, 0x1460001b, FUNC(s3c24xx_dma_0_r), FUNC(s3c24xx_dma_0_w));
47   space.install_legacy_readwrite_handler( *device, 0x14600020, 0x1460003b, FUNC(s3c24xx_dma_1_r), FUNC(s3c24xx_dma_1_w));
48   space.install_legacy_readwrite_handler( *device, 0x14600040, 0x1460005b, FUNC(s3c24xx_dma_2_r), FUNC(s3c24xx_dma_2_w));
49   space.install_legacy_readwrite_handler( *device, 0x14600060, 0x1460007b, FUNC(s3c24xx_dma_3_r), FUNC(s3c24xx_dma_3_w));
50   space.install_legacy_readwrite_handler( *device, 0x14800000, 0x14800017, FUNC(s3c24xx_clkpow_r), FUNC(s3c24xx_clkpow_w));
51   space.install_legacy_readwrite_handler( *device, 0x14a00000, 0x14a003ff, FUNC(s3c2400_lcd_r), FUNC(s3c24xx_lcd_w));
52   space.install_legacy_readwrite_handler( *device, 0x14a00400, 0x14a007ff, FUNC(s3c24xx_lcd_palette_r), FUNC(s3c24xx_lcd_palette_w));
53   space.install_legacy_readwrite_handler( *device, 0x15000000, 0x1500002b, FUNC(s3c24xx_uart_0_r), FUNC(s3c24xx_uart_0_w));
54   space.install_legacy_readwrite_handler( *device, 0x15004000, 0x1500402b, FUNC(s3c24xx_uart_1_r), FUNC(s3c24xx_uart_1_w));
55   space.install_legacy_readwrite_handler( *device, 0x15100000, 0x15100043, FUNC(s3c24xx_pwm_r), FUNC(s3c24xx_pwm_w));
56   space.install_legacy_readwrite_handler( *device, 0x15200140, 0x152001fb, FUNC(s3c24xx_usb_device_r), FUNC(s3c24xx_usb_device_w));
57   space.install_legacy_readwrite_handler( *device, 0x15300000, 0x1530000b, FUNC(s3c24xx_wdt_r), FUNC(s3c24xx_wdt_w));
58   space.install_legacy_readwrite_handler( *device, 0x15400000, 0x1540000f, FUNC(s3c24xx_iic_r), FUNC(s3c24xx_iic_w));
59   space.install_legacy_readwrite_handler( *device, 0x15508000, 0x15508013, FUNC(s3c24xx_iis_r), FUNC(s3c24xx_iis_w));
60   space.install_legacy_readwrite_handler( *device, 0x15600000, 0x1560005b, FUNC(s3c24xx_gpio_r), FUNC(s3c24xx_gpio_w));
61   space.install_legacy_readwrite_handler( *device, 0x15700040, 0x1570008b, FUNC(s3c24xx_rtc_r), FUNC(s3c24xx_rtc_w));
62   space.install_legacy_readwrite_handler( *device, 0x15800000, 0x15800007, FUNC(s3c24xx_adc_r), FUNC(s3c24xx_adc_w));
63   space.install_legacy_readwrite_handler( *device, 0x15900000, 0x15900017, FUNC(s3c24xx_spi_0_r), FUNC(s3c24xx_spi_0_w));
64   space.install_legacy_readwrite_handler( *device, 0x15a00000, 0x15a0003f, FUNC(s3c24xx_mmc_r), FUNC(s3c24xx_mmc_w));
6565
6666   s3c24xx_video_start( device, device->machine());
6767}
trunk/src/emu/machine/tmp68301.c
r17963r17964
166166
167167   if (!ACCESSING_BITS_0_7)   return;
168168
169//  logerror("CPU #0 PC %06X: TMP68301 Reg %04X<-%04X & %04X\n",space->device().safe_pc(),offset*2,data,mem_mask^0xffff);
169//  logerror("CPU #0 PC %06X: TMP68301 Reg %04X<-%04X & %04X\n",space.device().safe_pc(),offset*2,data,mem_mask^0xffff);
170170
171171   switch( offset * 2 )
172172   {
r17963r17964
177177      {
178178         int i = ((offset*2) >> 5) & 3;
179179
180         tmp68301_update_timer( space->machine(), i );
180         tmp68301_update_timer( space.machine(), i );
181181      }
182182      break;
183183   }
trunk/src/emu/machine/s3c2410.c
r17963r17964
3838
3939DEVICE_START( s3c2410 )
4040{
41   address_space *space = device->machine().device( "maincpu")->memory().space( AS_PROGRAM);
41   address_space &space = *device->machine().device( "maincpu")->memory().space( AS_PROGRAM);
4242   DEVICE_START_CALL(s3c24xx);
43   space->install_legacy_readwrite_handler( *device, 0x48000000, 0x4800003b, FUNC(s3c24xx_memcon_r), FUNC(s3c24xx_memcon_w));
44   space->install_legacy_readwrite_handler( *device, 0x49000000, 0x4900005b, FUNC(s3c24xx_usb_host_r), FUNC(s3c24xx_usb_host_w));
45   space->install_legacy_readwrite_handler( *device, 0x4a000000, 0x4a00001f, FUNC(s3c24xx_irq_r), FUNC(s3c24xx_irq_w));
46   space->install_legacy_readwrite_handler( *device, 0x4b000000, 0x4b000023, FUNC(s3c24xx_dma_0_r), FUNC(s3c24xx_dma_0_w));
47   space->install_legacy_readwrite_handler( *device, 0x4b000040, 0x4b000063, FUNC(s3c24xx_dma_1_r), FUNC(s3c24xx_dma_1_w));
48   space->install_legacy_readwrite_handler( *device, 0x4b000080, 0x4b0000a3, FUNC(s3c24xx_dma_2_r), FUNC(s3c24xx_dma_2_w));
49   space->install_legacy_readwrite_handler( *device, 0x4b0000c0, 0x4b0000e3, FUNC(s3c24xx_dma_3_r), FUNC(s3c24xx_dma_3_w));
50   space->install_legacy_readwrite_handler( *device, 0x4c000000, 0x4c000017, FUNC(s3c24xx_clkpow_r), FUNC(s3c24xx_clkpow_w));
51   space->install_legacy_readwrite_handler( *device, 0x4d000000, 0x4d000063, FUNC(s3c2410_lcd_r), FUNC(s3c24xx_lcd_w));
52   space->install_legacy_readwrite_handler( *device, 0x4d000400, 0x4d0007ff, FUNC(s3c24xx_lcd_palette_r), FUNC(s3c24xx_lcd_palette_w));
53   space->install_legacy_readwrite_handler( *device, 0x4e000000, 0x4e000017, FUNC(s3c24xx_nand_r), FUNC(s3c24xx_nand_w));
54   space->install_legacy_readwrite_handler( *device, 0x50000000, 0x5000002b, FUNC(s3c24xx_uart_0_r), FUNC(s3c24xx_uart_0_w));
55   space->install_legacy_readwrite_handler( *device, 0x50004000, 0x5000402b, FUNC(s3c24xx_uart_1_r), FUNC(s3c24xx_uart_1_w));
56   space->install_legacy_readwrite_handler( *device, 0x50008000, 0x5000802b, FUNC(s3c24xx_uart_2_r), FUNC(s3c24xx_uart_2_w));
57   space->install_legacy_readwrite_handler( *device, 0x51000000, 0x51000043, FUNC(s3c24xx_pwm_r), FUNC(s3c24xx_pwm_w));
58   space->install_legacy_readwrite_handler( *device, 0x52000140, 0x5200026f, FUNC(s3c24xx_usb_device_r), FUNC(s3c24xx_usb_device_w));
59   space->install_legacy_readwrite_handler( *device, 0x53000000, 0x5300000b, FUNC(s3c24xx_wdt_r), FUNC(s3c24xx_wdt_w));
60   space->install_legacy_readwrite_handler( *device, 0x54000000, 0x5400000f, FUNC(s3c24xx_iic_r), FUNC(s3c24xx_iic_w));
61   space->install_legacy_readwrite_handler( *device, 0x55000000, 0x55000013, FUNC(s3c24xx_iis_r), FUNC(s3c24xx_iis_w));
62   space->install_legacy_readwrite_handler( *device, 0x56000000, 0x560000bf, FUNC(s3c24xx_gpio_r), FUNC(s3c24xx_gpio_w));
63   space->install_legacy_readwrite_handler( *device, 0x57000040, 0x5700008b, FUNC(s3c24xx_rtc_r), FUNC(s3c24xx_rtc_w));
64   space->install_legacy_readwrite_handler( *device, 0x58000000, 0x58000013, FUNC(s3c24xx_adc_r), FUNC(s3c24xx_adc_w));
65   space->install_legacy_readwrite_handler( *device, 0x59000000, 0x59000017, FUNC(s3c24xx_spi_0_r), FUNC(s3c24xx_spi_0_w));
66   space->install_legacy_readwrite_handler( *device, 0x59000020, 0x59000037, FUNC(s3c24xx_spi_1_r), FUNC(s3c24xx_spi_1_w));
67   space->install_legacy_readwrite_handler( *device, 0x5a000000, 0x5a000043, FUNC(s3c24xx_sdi_r), FUNC(s3c24xx_sdi_w));
43   space.install_legacy_readwrite_handler( *device, 0x48000000, 0x4800003b, FUNC(s3c24xx_memcon_r), FUNC(s3c24xx_memcon_w));
44   space.install_legacy_readwrite_handler( *device, 0x49000000, 0x4900005b, FUNC(s3c24xx_usb_host_r), FUNC(s3c24xx_usb_host_w));
45   space.install_legacy_readwrite_handler( *device, 0x4a000000, 0x4a00001f, FUNC(s3c24xx_irq_r), FUNC(s3c24xx_irq_w));
46   space.install_legacy_readwrite_handler( *device, 0x4b000000, 0x4b000023, FUNC(s3c24xx_dma_0_r), FUNC(s3c24xx_dma_0_w));
47   space.install_legacy_readwrite_handler( *device, 0x4b000040, 0x4b000063, FUNC(s3c24xx_dma_1_r), FUNC(s3c24xx_dma_1_w));
48   space.install_legacy_readwrite_handler( *device, 0x4b000080, 0x4b0000a3, FUNC(s3c24xx_dma_2_r), FUNC(s3c24xx_dma_2_w));
49   space.install_legacy_readwrite_handler( *device, 0x4b0000c0, 0x4b0000e3, FUNC(s3c24xx_dma_3_r), FUNC(s3c24xx_dma_3_w));
50   space.install_legacy_readwrite_handler( *device, 0x4c000000, 0x4c000017, FUNC(s3c24xx_clkpow_r), FUNC(s3c24xx_clkpow_w));
51   space.install_legacy_readwrite_handler( *device, 0x4d000000, 0x4d000063, FUNC(s3c2410_lcd_r), FUNC(s3c24xx_lcd_w));
52   space.install_legacy_readwrite_handler( *device, 0x4d000400, 0x4d0007ff, FUNC(s3c24xx_lcd_palette_r), FUNC(s3c24xx_lcd_palette_w));
53   space.install_legacy_readwrite_handler( *device, 0x4e000000, 0x4e000017, FUNC(s3c24xx_nand_r), FUNC(s3c24xx_nand_w));
54   space.install_legacy_readwrite_handler( *device, 0x50000000, 0x5000002b, FUNC(s3c24xx_uart_0_r), FUNC(s3c24xx_uart_0_w));
55   space.install_legacy_readwrite_handler( *device, 0x50004000, 0x5000402b, FUNC(s3c24xx_uart_1_r), FUNC(s3c24xx_uart_1_w));
56   space.install_legacy_readwrite_handler( *device, 0x50008000, 0x5000802b, FUNC(s3c24xx_uart_2_r), FUNC(s3c24xx_uart_2_w));
57   space.install_legacy_readwrite_handler( *device, 0x51000000, 0x51000043, FUNC(s3c24xx_pwm_r), FUNC(s3c24xx_pwm_w));
58   space.install_legacy_readwrite_handler( *device, 0x52000140, 0x5200026f, FUNC(s3c24xx_usb_device_r), FUNC(s3c24xx_usb_device_w));
59   space.install_legacy_readwrite_handler( *device, 0x53000000, 0x5300000b, FUNC(s3c24xx_wdt_r), FUNC(s3c24xx_wdt_w));
60   space.install_legacy_readwrite_handler( *device, 0x54000000, 0x5400000f, FUNC(s3c24xx_iic_r), FUNC(s3c24xx_iic_w));
61   space.install_legacy_readwrite_handler( *device, 0x55000000, 0x55000013, FUNC(s3c24xx_iis_r), FUNC(s3c24xx_iis_w));
62   space.install_legacy_readwrite_handler( *device, 0x56000000, 0x560000bf, FUNC(s3c24xx_gpio_r), FUNC(s3c24xx_gpio_w));
63   space.install_legacy_readwrite_handler( *device, 0x57000040, 0x5700008b, FUNC(s3c24xx_rtc_r), FUNC(s3c24xx_rtc_w));
64   space.install_legacy_readwrite_handler( *device, 0x58000000, 0x58000013, FUNC(s3c24xx_adc_r), FUNC(s3c24xx_adc_w));
65   space.install_legacy_readwrite_handler( *device, 0x59000000, 0x59000017, FUNC(s3c24xx_spi_0_r), FUNC(s3c24xx_spi_0_w));
66   space.install_legacy_readwrite_handler( *device, 0x59000020, 0x59000037, FUNC(s3c24xx_spi_1_r), FUNC(s3c24xx_spi_1_w));
67   space.install_legacy_readwrite_handler( *device, 0x5a000000, 0x5a000043, FUNC(s3c24xx_sdi_r), FUNC(s3c24xx_sdi_w));
6868
6969   s3c24xx_video_start( device, device->machine());
7070}
trunk/src/mess/machine/dgn_beta.c
r17963r17964
366366// Return the value of a page register
367367READ8_HANDLER( dgn_beta_page_r )
368368{
369   dgn_beta_state *state = space->machine().driver_data<dgn_beta_state>();
369   dgn_beta_state *state = space.machine().driver_data<dgn_beta_state>();
370370   return state->m_PageRegs[state->m_PIATaskReg][offset].value;
371371}
372372
r17963r17964
376376
377377WRITE8_HANDLER( dgn_beta_page_w )
378378{
379   dgn_beta_state *state = space->machine().driver_data<dgn_beta_state>();
379   dgn_beta_state *state = space.machine().driver_data<dgn_beta_state>();
380380   state->m_PageRegs[state->m_PIATaskReg][offset].value=data;
381381
382382   LOG_PAGE_WRITE(("PageRegWrite : task=$%X  offset=$%X value=$%X\n",state->m_PIATaskReg,offset,data));
383383
384384   if (state->m_EnableMapRegs)
385385   {
386      UpdateBanks(space->machine(), offset,offset);
386      UpdateBanks(space.machine(), offset,offset);
387387      if (offset==15)
388         UpdateBanks(space->machine(), offset+1,offset+1);
388         UpdateBanks(space.machine(), offset+1,offset+1);
389389   }
390390}
391391
r17963r17964
399399
400400static WRITE8_HANDLER( dgnbeta_ram_b0_w )
401401{
402   dgn_beta_bank_memory(space->machine(),offset,data,0);
402   dgn_beta_bank_memory(space.machine(),offset,data,0);
403403}
404404
405405static WRITE8_HANDLER( dgnbeta_ram_b1_w )
406406{
407   dgn_beta_bank_memory(space->machine(),offset,data,1);
407   dgn_beta_bank_memory(space.machine(),offset,data,1);
408408}
409409
410410static WRITE8_HANDLER( dgnbeta_ram_b2_w )
411411{
412   dgn_beta_bank_memory(space->machine(),offset,data,2);
412   dgn_beta_bank_memory(space.machine(),offset,data,2);
413413}
414414
415415static WRITE8_HANDLER( dgnbeta_ram_b3_w )
416416{
417   dgn_beta_bank_memory(space->machine(),offset,data,3);
417   dgn_beta_bank_memory(space.machine(),offset,data,3);
418418}
419419
420420static WRITE8_HANDLER( dgnbeta_ram_b4_w )
421421{
422   dgn_beta_bank_memory(space->machine(),offset,data,4);
422   dgn_beta_bank_memory(space.machine(),offset,data,4);
423423}
424424
425425static WRITE8_HANDLER( dgnbeta_ram_b5_w )
426426{
427   dgn_beta_bank_memory(space->machine(),offset,data,5);
427   dgn_beta_bank_memory(space.machine(),offset,data,5);
428428}
429429
430430static WRITE8_HANDLER( dgnbeta_ram_b6_w )
431431{
432   dgn_beta_bank_memory(space->machine(),offset,data,6);
432   dgn_beta_bank_memory(space.machine(),offset,data,6);
433433}
434434
435435static WRITE8_HANDLER( dgnbeta_ram_b7_w )
436436{
437   dgn_beta_bank_memory(space->machine(),offset,data,7);
437   dgn_beta_bank_memory(space.machine(),offset,data,7);
438438}
439439
440440static WRITE8_HANDLER( dgnbeta_ram_b8_w )
441441{
442   dgn_beta_bank_memory(space->machine(),offset,data,8);
442   dgn_beta_bank_memory(space.machine(),offset,data,8);
443443}
444444
445445static WRITE8_HANDLER( dgnbeta_ram_b9_w )
446446{
447   dgn_beta_bank_memory(space->machine(),offset,data,9);
447   dgn_beta_bank_memory(space.machine(),offset,data,9);
448448}
449449
450450static WRITE8_HANDLER( dgnbeta_ram_bA_w )
451451{
452   dgn_beta_bank_memory(space->machine(),offset,data,10);
452   dgn_beta_bank_memory(space.machine(),offset,data,10);
453453}
454454
455455static WRITE8_HANDLER( dgnbeta_ram_bB_w )
456456{
457   dgn_beta_bank_memory(space->machine(),offset,data,11);
457   dgn_beta_bank_memory(space.machine(),offset,data,11);
458458}
459459
460460static WRITE8_HANDLER( dgnbeta_ram_bC_w )
461461{
462   dgn_beta_bank_memory(space->machine(),offset,data,12);
462   dgn_beta_bank_memory(space.machine(),offset,data,12);
463463}
464464
465465static WRITE8_HANDLER( dgnbeta_ram_bD_w )
466466{
467   dgn_beta_bank_memory(space->machine(),offset,data,13);
467   dgn_beta_bank_memory(space.machine(),offset,data,13);
468468}
469469
470470static WRITE8_HANDLER( dgnbeta_ram_bE_w )
471471{
472   dgn_beta_bank_memory(space->machine(),offset,data,14);
472   dgn_beta_bank_memory(space.machine(),offset,data,14);
473473}
474474
475475static WRITE8_HANDLER( dgnbeta_ram_bF_w )
476476{
477   dgn_beta_bank_memory(space->machine(),offset,data,15);
477   dgn_beta_bank_memory(space.machine(),offset,data,15);
478478}
479479
480480static WRITE8_HANDLER( dgnbeta_ram_bG_w )
481481{
482   dgn_beta_bank_memory(space->machine(),offset,data,16);
482   dgn_beta_bank_memory(space.machine(),offset,data,16);
483483}
484484
485485/*
r17963r17964
934934READ8_HANDLER(dgnbeta_wd2797_r)
935935{
936936   int result = 0;
937   device_t *fdc = space->machine().device(FDC_TAG);
937   device_t *fdc = space.machine().device(FDC_TAG);
938938
939939   switch(offset & 0x03)
940940   {
941941      case 0:
942         result = wd17xx_status_r(fdc, *space, 0);
942         result = wd17xx_status_r(fdc, space, 0);
943943         LOG_DISK(("Disk status=%2.2X\n",result));
944944         break;
945945      case 1:
946         result = wd17xx_track_r(fdc, *space, 0);
946         result = wd17xx_track_r(fdc, space, 0);
947947         break;
948948      case 2:
949         result = wd17xx_sector_r(fdc, *space, 0);
949         result = wd17xx_sector_r(fdc, space, 0);
950950         break;
951951      case 3:
952         result = wd17xx_data_r(fdc, *space, 0);
952         result = wd17xx_data_r(fdc, space, 0);
953953         break;
954954      default:
955955         break;
r17963r17964
960960
961961WRITE8_HANDLER(dgnbeta_wd2797_w)
962962{
963   dgn_beta_state *state = space->machine().driver_data<dgn_beta_state>();
964   device_t *fdc = space->machine().device(FDC_TAG);
963   dgn_beta_state *state = space.machine().driver_data<dgn_beta_state>();
964   device_t *fdc = space.machine().device(FDC_TAG);
965965
966966    state->m_wd2797_written=1;
967967
r17963r17964
972972         /* But only for Type 3/4 commands */
973973         if(data & 0x80)
974974            wd17xx_set_side(fdc,(data & 0x02) ? 1 : 0);
975         wd17xx_command_w(fdc, *space, 0, data);
975         wd17xx_command_w(fdc, space, 0, data);
976976         break;
977977      case 1:
978         wd17xx_track_w(fdc, *space, 0, data);
978         wd17xx_track_w(fdc, space, 0, data);
979979         break;
980980      case 2:
981         wd17xx_sector_w(fdc, *space, 0, data);
981         wd17xx_sector_w(fdc, space, 0, data);
982982         break;
983983      case 3:
984         wd17xx_data_w(fdc, *space, 0, data);
984         wd17xx_data_w(fdc, space, 0, data);
985985         break;
986986   };
987987}
trunk/src/mess/machine/ataricrt.c
r17963r17964
172172{
173173   //  printf("written %x\n", data);
174174   int bank = data & 0x03;
175   space->machine().root_device().membank("8000")->set_base(space->machine().root_device().memregion("lslot")->base() + bank * 0x2000);
175   space.machine().root_device().membank("8000")->set_base(space.machine().root_device().memregion("lslot")->base() + bank * 0x2000);
176176}
177177
178178static WRITE8_HANDLER( w64_bank_w )
r17963r17964
180180//  printf("write to %x\n", offset);
181181
182182   if (offset < 8)
183      space->machine().root_device().membank("a000")->set_base(space->machine().root_device().memregion("lslot")->base() + offset * 0x2000);
183      space.machine().root_device().membank("a000")->set_base(space.machine().root_device().memregion("lslot")->base() + offset * 0x2000);
184184   else
185      space->machine().root_device().membank("a000")->set_base(space->machine().root_device().memregion("maincpu")->base());
185      space.machine().root_device().membank("a000")->set_base(space.machine().root_device().memregion("maincpu")->base());
186186   // FIXME: writes to 0x8-0xf should disable the cart
187187}
188188
r17963r17964
192192//  printf("write to %x\n", offset);
193193
194194   if (offset < 8)
195      space->machine().root_device().membank("a000")->set_base(space->machine().root_device().memregion("lslot")->base() + (7 - offset) * 0x2000);
195      space.machine().root_device().membank("a000")->set_base(space.machine().root_device().memregion("lslot")->base() + (7 - offset) * 0x2000);
196196   else
197      space->machine().root_device().membank("a000")->set_base(space->machine().root_device().memregion("maincpu")->base());
197      space.machine().root_device().membank("a000")->set_base(space.machine().root_device().memregion("maincpu")->base());
198198   // FIXME: writes to 0x8-0xf should disable the cart
199199}
200200
r17963r17964
202202{
203203//  printf("write to %x\n", 0x8000 + offset);
204204   if (offset >= 0xff6 && offset <= 0xff9)
205      space->machine().root_device().membank("8000")->set_base(space->machine().root_device().memregion("lslot")->base() + 0x0000 + (offset - 0xff6) * 0x1000);
205      space.machine().root_device().membank("8000")->set_base(space.machine().root_device().memregion("lslot")->base() + 0x0000 + (offset - 0xff6) * 0x1000);
206206}
207207
208208static WRITE8_HANDLER( bbsb_bankh_w )
209209{
210210//  printf("write to %x\n", 0x9000 + offset);
211211   if (offset >= 0xff6 && offset <= 0xff9)
212      space->machine().root_device().membank("9000")->set_base(space->machine().root_device().memregion("lslot")->base() + 0x4000 + (offset - 0xff6) * 0x1000);
212      space.machine().root_device().membank("9000")->set_base(space.machine().root_device().memregion("lslot")->base() + 0x4000 + (offset - 0xff6) * 0x1000);
213213}
214214
215215static WRITE8_HANDLER( oss_034m_w )
r17963r17964
218218   {
219219      case 0:
220220      case 1:
221         space->machine().root_device().membank("a000")->set_base(space->machine().root_device().memregion("lslot")->base());
222         space->machine().root_device().membank("b000")->set_base(space->machine().root_device().memregion("lslot")->base() + 0x3000);
221         space.machine().root_device().membank("a000")->set_base(space.machine().root_device().memregion("lslot")->base());
222         space.machine().root_device().membank("b000")->set_base(space.machine().root_device().memregion("lslot")->base() + 0x3000);
223223         break;
224224      case 2:
225225      case 6:
226226         // docs says this should put 0xff in the 0xa000 bank -> let's point to the end of the cart
227         space->machine().root_device().membank("a000")->set_base(space->machine().root_device().memregion("lslot")->base() + 0x4000);
228         space->machine().root_device().membank("b000")->set_base(space->machine().root_device().memregion("lslot")->base() + 0x3000);
227         space.machine().root_device().membank("a000")->set_base(space.machine().root_device().memregion("lslot")->base() + 0x4000);
228         space.machine().root_device().membank("b000")->set_base(space.machine().root_device().memregion("lslot")->base() + 0x3000);
229229         break;
230230      case 3:
231231      case 7:
232         space->machine().root_device().membank("a000")->set_base(space->machine().root_device().memregion("lslot")->base() + 0x1000);
233         space->machine().root_device().membank("b000")->set_base(space->machine().root_device().memregion("lslot")->base() + 0x3000);
232         space.machine().root_device().membank("a000")->set_base(space.machine().root_device().memregion("lslot")->base() + 0x1000);
233         space.machine().root_device().membank("b000")->set_base(space.machine().root_device().memregion("lslot")->base() + 0x3000);
234234         break;
235235      case 4:
236236      case 5:
237         space->machine().root_device().membank("a000")->set_base(space->machine().root_device().memregion("lslot")->base() + 0x2000);
238         space->machine().root_device().membank("b000")->set_base(space->machine().root_device().memregion("lslot")->base() + 0x3000);
237         space.machine().root_device().membank("a000")->set_base(space.machine().root_device().memregion("lslot")->base() + 0x2000);
238         space.machine().root_device().membank("b000")->set_base(space.machine().root_device().memregion("lslot")->base() + 0x3000);
239239         break;
240240      default:
241         space->machine().root_device().membank("a000")->set_base(space->machine().root_device().memregion("maincpu")->base() + 0xa000);
242         space->machine().root_device().membank("b000")->set_base(space->machine().root_device().memregion("maincpu")->base() + 0xb000);
241         space.machine().root_device().membank("a000")->set_base(space.machine().root_device().memregion("maincpu")->base() + 0xa000);
242         space.machine().root_device().membank("b000")->set_base(space.machine().root_device().memregion("maincpu")->base() + 0xb000);
243243         break;
244244   }
245245}
r17963r17964
249249   switch (offset & 0x09)
250250   {
251251      case 0:
252         space->machine().root_device().membank("a000")->set_base(space->machine().root_device().memregion("lslot")->base() + 0x1000);
253         space->machine().root_device().membank("b000")->set_base(space->machine().root_device().memregion("lslot")->base());
252         space.machine().root_device().membank("a000")->set_base(space.machine().root_device().memregion("lslot")->base() + 0x1000);
253         space.machine().root_device().membank("b000")->set_base(space.machine().root_device().memregion("lslot")->base());
254254         break;
255255      case 1:
256         space->machine().root_device().membank("a000")->set_base(space->machine().root_device().memregion("lslot")->base() + 0x3000);
257         space->machine().root_device().membank("b000")->set_base(space->machine().root_device().memregion("lslot")->base());
256         space.machine().root_device().membank("a000")->set_base(space.machine().root_device().memregion("lslot")->base() + 0x3000);
257         space.machine().root_device().membank("b000")->set_base(space.machine().root_device().memregion("lslot")->base());
258258         break;
259259      case 8:
260         space->machine().root_device().membank("a000")->set_base(space->machine().root_device().memregion("maincpu")->base() + 0xa000);
261         space->machine().root_device().membank("b000")->set_base(space->machine().root_device().memregion("maincpu")->base() + 0xb000);
260         space.machine().root_device().membank("a000")->set_base(space.machine().root_device().memregion("maincpu")->base() + 0xa000);
261         space.machine().root_device().membank("b000")->set_base(space.machine().root_device().memregion("maincpu")->base() + 0xb000);
262262         break;
263263      case 9:
264         space->machine().root_device().membank("a000")->set_base(space->machine().root_device().memregion("lslot")->base() + 0x2000);
265         space->machine().root_device().membank("b000")->set_base(space->machine().root_device().memregion("lslot")->base());
264         space.machine().root_device().membank("a000")->set_base(space.machine().root_device().memregion("lslot")->base() + 0x2000);
265         space.machine().root_device().membank("b000")->set_base(space.machine().root_device().memregion("lslot")->base());
266266         break;
267267   }
268268}
r17963r17964
284284static READ8_HANDLER( bbsb_bankl_r )
285285{
286286   // return data from the selected bank (0,1,2,3)
287   UINT8 *mem = space->machine().root_device().memregion("lslot")->base();
287   UINT8 *mem = space.machine().root_device().memregion("lslot")->base();
288288   return &mem[0x0000 + bbsb_bankl * 0x1000];
289289}
290290
291291static READ8_HANDLER( bbsb_bankh_r )
292292{
293293   // return data from the selected bank (4,5,6,7)
294   UINT8 *mem = space->machine().root_device().memregion("lslot")->base();
294   UINT8 *mem = space.machine().root_device().memregion("lslot")->base();
295295   return &mem[0x4000 + bbsb_bankh * 0x1000];
296296}
297297#endif
r17963r17964
658658
659659static WRITE8_HANDLER( xegs_bankswitch )
660660{
661   UINT8 *cart = space->machine().root_device().memregion("user1")->base();
661   UINT8 *cart = space.machine().root_device().memregion("user1")->base();
662662   data &= xegs_banks - 1;
663   space->machine().root_device().membank("bank0")->set_base(cart + data * 0x2000);
663   space.machine().root_device().membank("bank0")->set_base(cart + data * 0x2000);
664664}
665665
666666MACHINE_START( xegs )
667667{
668   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
669   UINT8 *cart = space->machine().root_device().memregion("user1")->base();
670   UINT8 *cpu  = space->machine().root_device().memregion("maincpu")->base();
668   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
669   UINT8 *cart = space.machine().root_device().memregion("user1")->base();
670   UINT8 *cpu  = space.machine().root_device().memregion("maincpu")->base();
671671
672672   atari_machine_start(machine);
673   space->install_legacy_write_handler(0xd500, 0xd5ff, FUNC(xegs_bankswitch));
673   space.install_legacy_write_handler(0xd500, 0xd5ff, FUNC(xegs_bankswitch));
674674
675675   if (xegs_cart)
676676   {
trunk/src/mess/machine/apple3.c
r17963r17964
327327   apple3_state *state = machine.driver_data<apple3_state>();
328328   UINT16 bank;
329329   UINT8 page;
330   address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
330   address_space& space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
331331
332332   if (LOG_MEMORY)
333333   {
r17963r17964
374374   /* install bank 8 (C000-CFFF) */
375375   if (state->m_via_0_a & 0x40)
376376   {
377      space->install_read_handler(0xC000, 0xC0FF, read8_delegate(FUNC(apple3_state::apple3_c0xx_r),state));
378      space->install_write_handler(0xC000, 0xC0FF, write8_delegate(FUNC(apple3_state::apple3_c0xx_w),state));
377      space.install_read_handler(0xC000, 0xC0FF, read8_delegate(FUNC(apple3_state::apple3_c0xx_r),state));
378      space.install_write_handler(0xC000, 0xC0FF, write8_delegate(FUNC(apple3_state::apple3_c0xx_w),state));
379379   }
380380   else
381381   {
382      space->install_read_bank(0xC000, 0xC0FF, "bank8");
382      space.install_read_bank(0xC000, 0xC0FF, "bank8");
383383      if (state->m_via_0_a & 0x08)
384         space->unmap_write(0xC000, 0xC0FF);
384         space.unmap_write(0xC000, 0xC0FF);
385385      else
386         space->install_write_bank(0xC000, 0xC0FF, "bank8");
386         space.install_write_bank(0xC000, 0xC0FF, "bank8");
387387      apple3_setbank(machine,"bank8", ~0, 0x4000);
388388   }
389389
390390   /* install bank 9 (C100-C4FF) */
391391   if (state->m_via_0_a & 0x40)
392392   {
393      space->nop_readwrite(0xC100, 0xC4FF);
393      space.nop_readwrite(0xC100, 0xC4FF);
394394   }
395395   else
396396   {
397      space->install_read_bank(0xC100, 0xC4FF, "bank9");
397      space.install_read_bank(0xC100, 0xC4FF, "bank9");
398398      if (state->m_via_0_a & 0x08)
399         space->unmap_write(0xC100, 0xC4FF);
399         space.unmap_write(0xC100, 0xC4FF);
400400      else
401         space->install_write_bank(0xC100, 0xC4FF, "bank9");
401         space.install_write_bank(0xC100, 0xC4FF, "bank9");
402402      apple3_setbank(machine,"bank9", ~0, 0x4100);
403403   }
404404
405405   /* install bank 10 (C500-C7FF) */
406   space->install_read_bank(0xC500, 0xC7FF, "bank10");
406   space.install_read_bank(0xC500, 0xC7FF, "bank10");
407407   if (state->m_via_0_a & 0x08)
408      space->unmap_write(0xC500, 0xC7FF);
408      space.unmap_write(0xC500, 0xC7FF);
409409   else
410      space->install_write_bank(0xC500, 0xC7FF, "bank10");
410      space.install_write_bank(0xC500, 0xC7FF, "bank10");
411411   apple3_setbank(machine,"bank10", ~0, 0x4500);
412412
413413   /* install bank 11 (C800-CFFF) */
414414   if (state->m_via_0_a & 0x40)
415415   {
416      space->nop_readwrite(0xC800, 0xCFFF);
416      space.nop_readwrite(0xC800, 0xCFFF);
417417   }
418418   else
419419   {
420      space->install_read_bank(0xC800, 0xCFFF, "bank11");
420      space.install_read_bank(0xC800, 0xCFFF, "bank11");
421421      if (state->m_via_0_a & 0x08)
422         space->unmap_write(0xC800, 0xCFFF);
422         space.unmap_write(0xC800, 0xCFFF);
423423      else
424         space->install_write_bank(0xC800, 0xCFFF, "bank11");
424         space.install_write_bank(0xC800, 0xCFFF, "bank11");
425425      apple3_setbank(machine,"bank11", ~0, 0x4800);
426426   }
427427
428428   /* install bank 6 (D000-EFFF) */
429   space->install_read_bank(0xD000, 0xEFFF, "bank6");
429   space.install_read_bank(0xD000, 0xEFFF, "bank6");
430430   if (state->m_via_0_a & 0x08)
431      space->unmap_write(0xD000, 0xEFFF);
431      space.unmap_write(0xD000, 0xEFFF);
432432   else
433      space->install_write_bank(0xD000, 0xEFFF, "bank6");
433      space.install_write_bank(0xD000, 0xEFFF, "bank6");
434434   apple3_setbank(machine,"bank6", ~0, 0x5000);
435435
436436   /* install bank 7 (F000-FFFF) */
437   space->install_read_bank(0xF000, 0xFFFF, "bank7");
437   space.install_read_bank(0xF000, 0xFFFF, "bank7");
438438   if (state->m_via_0_a & 0x09)
439      space->unmap_write(0xF000, 0xFFFF);
439      space.unmap_write(0xF000, 0xFFFF);
440440   else
441      space->install_write_bank(0xF000, 0xFFFF, "bank7");
441      space.install_write_bank(0xF000, 0xFFFF, "bank7");
442442   if (state->m_via_0_a & 0x01)
443443      state->membank("bank7")->set_base(machine.root_device().memregion("maincpu")->base());
444444   else
r17963r17964
446446
447447   /* reinstall VIA handlers */
448448   {
449      via6522_device *via_0 = space->machine().device<via6522_device>("via6522_0");
450      via6522_device *via_1 = space->machine().device<via6522_device>("via6522_1");
449      via6522_device *via_0 = space.machine().device<via6522_device>("via6522_0");
450      via6522_device *via_1 = space.machine().device<via6522_device>("via6522_1");
451451
452      space->install_readwrite_handler(0xFFD0, 0xFFDF, 0, 0, read8_delegate(FUNC(via6522_device::read),via_0), write8_delegate(FUNC(via6522_device::write),via_0));
453      space->install_readwrite_handler(0xFFE0, 0xFFEF, 0, 0, read8_delegate(FUNC(via6522_device::read),via_1), write8_delegate(FUNC(via6522_device::write),via_1));
452      space.install_readwrite_handler(0xFFD0, 0xFFDF, 0, 0, read8_delegate(FUNC(via6522_device::read),via_0), write8_delegate(FUNC(via6522_device::write),via_0));
453      space.install_readwrite_handler(0xFFE0, 0xFFEF, 0, 0, read8_delegate(FUNC(via6522_device::read),via_1), write8_delegate(FUNC(via6522_device::write),via_1));
454454   }
455455}
456456
trunk/src/mess/machine/mbee.c
r17963r17964
565565#if 0
566566   mbee_state *state = device->machine().driver_data<mbee_state>();
567567
568   //address_space *space = device->machine().device("maincpu")->memory().space(AS_PROGRAM);
568   //address_space &space = *device->machine().device("maincpu")->memory().space(AS_PROGRAM);
569569   /* The printer status connects to the pio ASTB pin, and the printer changing to not
570570        busy should signal an interrupt routine at B61C, (next line) but this doesn't work.
571571        The line below does what the interrupt should be doing. */
572572   /* But it would break any program loaded to that area of memory, such as CP/M programs */
573573
574574   //state->m_z80pio->strobe_a(centronics_busy_r(state->m_printer)); /* signal int when not busy (L->H) */
575   //space->write_byte(0x109, centronics_busy_r(state->m_printer));
575   //space.write_byte(0x109, centronics_busy_r(state->m_printer));
576576
577577
578578   /* once per frame, pulse the PIO B bit 7 - it is in the schematic as an option,
r17963r17964
754754{
755755   mbee_state *state = image.device().machine().driver_data<mbee_state>();
756756   device_t *cpu = image.device().machine().device("maincpu");
757   address_space *space = image.device().machine().device("maincpu")->memory().space(AS_PROGRAM);
757   address_space &space = *image.device().machine().device("maincpu")->memory().space(AS_PROGRAM);
758758   UINT16 i, j;
759759   UINT8 data, sw = image.device().machine().root_device().ioport("CONFIG")->read() & 1;   /* reading the dipswitch: 1 = autorun */
760760
r17963r17964
772772         }
773773
774774         if ((j < state->m_size) || (j > 0xefff))
775            space->write_byte(j, data);
775            space.write_byte(j, data);
776776         else
777777         {
778778            image.message("Not enough memory in this microbee");
r17963r17964
782782
783783      if (sw)
784784      {
785         space->write_word(0xa2,0x801e);   /* fix warm-start vector to get around some copy-protections */
785         space.write_word(0xa2,0x801e);   /* fix warm-start vector to get around some copy-protections */
786786         cpu->state().set_pc(0x801e);
787787      }
788788      else
789         space->write_word(0xa2,0x8517);
789         space.write_word(0xa2,0x8517);
790790   }
791791   else if (!mame_stricmp(image.filetype(), "com"))
792792   {
r17963r17964
802802         }
803803
804804         if ((j < state->m_size) || (j > 0xefff))
805            space->write_byte(j, data);
805            space.write_byte(j, data);
806806         else
807807         {
808808            image.message("Not enough memory in this microbee");
trunk/src/mess/machine/msx_slot.c
r17963r17964
353353   {
354354      if ((offset & 0xff) >= 0xe0)
355355      {
356         return k051649_test_r (space->machine().device("k051649"), *space, offset & 0xff);
356         return k051649_test_r (space.machine().device("k051649"), space, offset & 0xff);
357357      }
358358      return 0xff;
359359   }
360360   else
361361   {
362      return k051649_waveform_r (space->machine().device("k051649"), *space, offset & 0x7f);
362      return k051649_waveform_r (space.machine().device("k051649"), space, offset & 0x7f);
363363   }
364364}
365365
r17963r17964
12341234
12351235static READ8_HANDLER (msx_diskrom_page1_r)
12361236{
1237   msx_state *state = space->machine().driver_data<msx_state>();
1238   device_t *fdc = space->machine().device("wd179x");
1237   msx_state *state = space.machine().driver_data<msx_state>();
1238   device_t *fdc = space.machine().device("wd179x");
12391239   switch (offset)
12401240   {
1241   case 0: return wd17xx_status_r (fdc, *space, 0);
1242   case 1: return wd17xx_track_r (fdc, *space, 0);
1243   case 2: return wd17xx_sector_r (fdc, *space, 0);
1244   case 3: return wd17xx_data_r (fdc, *space, 0);
1241   case 0: return wd17xx_status_r (fdc, space, 0);
1242   case 1: return wd17xx_track_r (fdc, space, 0);
1243   case 2: return wd17xx_sector_r (fdc, space, 0);
1244   case 3: return wd17xx_data_r (fdc, space, 0);
12451245   case 7: return state->m_dsk_stat;
12461246   default:
12471247      return state->m_state[1]->m_mem[offset + 0x3ff8];
r17963r17964
12501250
12511251static READ8_HANDLER (msx_diskrom_page2_r)
12521252{
1253   msx_state *state = space->machine().driver_data<msx_state>();
1254   device_t *fdc = space->machine().device("wd179x");
1253   msx_state *state = space.machine().driver_data<msx_state>();
1254   device_t *fdc = space.machine().device("wd179x");
12551255   if (offset >= 0x7f8)
12561256   {
12571257      switch (offset)
12581258      {
12591259      case 0x7f8:
1260         return wd17xx_status_r (fdc, *space, 0);
1260         return wd17xx_status_r (fdc, space, 0);
12611261      case 0x7f9:
1262         return wd17xx_track_r (fdc, *space, 0);
1262         return wd17xx_track_r (fdc, space, 0);
12631263      case 0x7fa:
1264         return wd17xx_sector_r (fdc, *space, 0);
1264         return wd17xx_sector_r (fdc, space, 0);
12651265      case 0x7fb:
1266         return wd17xx_data_r (fdc, *space, 0);
1266         return wd17xx_data_r (fdc, space, 0);
12671267      case 0x7ff:
12681268         return state->m_dsk_stat;
12691269      default:
r17963r17964
13631363
13641364static READ8_HANDLER (msx_diskrom2_page1_r)
13651365{
1366   msx_state *state = space->machine().driver_data<msx_state>();
1367   device_t *fdc = space->machine().device("wd179x");
1366   msx_state *state = space.machine().driver_data<msx_state>();
1367   device_t *fdc = space.machine().device("wd179x");
13681368   switch (offset)
13691369   {
1370   case 0: return wd17xx_status_r(fdc, *space, 0);
1371   case 1: return wd17xx_track_r(fdc, *space, 0);
1372   case 2: return wd17xx_sector_r(fdc, *space, 0);
1373   case 3: return wd17xx_data_r(fdc, *space, 0);
1370   case 0: return wd17xx_status_r(fdc, space, 0);
1371   case 1: return wd17xx_track_r(fdc, space, 0);
1372   case 2: return wd17xx_sector_r(fdc, space, 0);
1373   case 3: return wd17xx_data_r(fdc, space, 0);
13741374   case 4: return state->m_dsk_stat;
13751375   default:
13761376      return state->m_state[1]->m_mem[offset + 0x3ff8];
r17963r17964
13791379
13801380static  READ8_HANDLER (msx_diskrom2_page2_r)
13811381{
1382   msx_state *state = space->machine().driver_data<msx_state>();
1383   device_t *fdc = space->machine().device("wd179x");
1382   msx_state *state = space.machine().driver_data<msx_state>();
1383   device_t *fdc = space.machine().device("wd179x");
13841384   if (offset >= 0x7b8)
13851385   {
13861386      switch (offset)
13871387      {
13881388      case 0x7b8:
1389         return wd17xx_status_r (fdc, *space, 0);
1389         return wd17xx_status_r (fdc, space, 0);
13901390      case 0x7b9:
1391         return wd17xx_track_r (fdc, *space, 0);
1391         return wd17xx_track_r (fdc, space, 0);
13921392      case 0x7ba:
1393         return wd17xx_sector_r (fdc, *space, 0);
1393         return wd17xx_sector_r (fdc, space, 0);
13941394      case 0x7bb:
1395         return wd17xx_data_r (fdc, *space, 0);
1395         return wd17xx_data_r (fdc, space, 0);
13961396      case 0x7bc:
13971397         return state->m_dsk_stat;
13981398      default:
r17963r17964
21842184
21852185static  READ8_HANDLER (soundcartridge_scc)
21862186{
2187   msx_state *state = space->machine().driver_data<msx_state>();
2187   msx_state *state = space.machine().driver_data<msx_state>();
21882188   int reg;
21892189
21902190
r17963r17964
21982198
21992199   if (reg < 0x80)
22002200   {
2201      return k051649_waveform_r (space->machine().device("k051649"), *space, reg);
2201      return k051649_waveform_r (space.machine().device("k051649"), space, reg);
22022202   }
22032203   else if (reg < 0xa0)
22042204   {
r17963r17964
22072207   else if (reg < 0xc0)
22082208   {
22092209      /* read wave 5 */
2210      return k051649_waveform_r (space->machine().device("k051649"), *space, 0x80 + (reg & 0x1f));
2210      return k051649_waveform_r (space.machine().device("k051649"), space, 0x80 + (reg & 0x1f));
22112211   }
22122212   else if (reg < 0xe0)
22132213   {
2214      return k051649_test_r (space->machine().device("k051649"), *space, reg);
2214      return k051649_test_r (space.machine().device("k051649"), space, reg);
22152215   }
22162216
22172217   return 0xff;
r17963r17964
22192219
22202220static  READ8_HANDLER (soundcartridge_sccp)
22212221{
2222   msx_state *state = space->machine().driver_data<msx_state>();
2222   msx_state *state = space.machine().driver_data<msx_state>();
22232223   int reg;
22242224
22252225   if (offset >= 0x7e0)
r17963r17964
22322232
22332233   if (reg < 0xa0)
22342234   {
2235      return k052539_waveform_r (space->machine().device("k051649"), *space, reg);
2235      return k052539_waveform_r (space.machine().device("k051649"), space, reg);
22362236   }
22372237   else if (reg >= 0xc0 && reg < 0xe0)
22382238   {
2239      return k051649_test_r (space->machine().device("k051649"), *space, reg);
2239      return k051649_test_r (space.machine().device("k051649"), space, reg);
22402240   }
22412241
22422242   return 0xff;
trunk/src/mess/machine/pc1350.c
r17963r17964
9999MACHINE_START( pc1350 )
100100{
101101   pc1350_state *state = machine.driver_data<pc1350_state>();
102   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
102   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
103103
104104   state->m_power = 1;
105105   machine.scheduler().timer_set(attotime::from_seconds(1), FUNC(pc1350_power_up));
106106
107   space->install_readwrite_bank(0x6000, 0x6fff, "bank1");
107   space.install_readwrite_bank(0x6000, 0x6fff, "bank1");
108108   state->membank("bank1")->set_base(&machine.device<ram_device>(RAM_TAG)->pointer()[0x0000]);
109109
110110   if (machine.device<ram_device>(RAM_TAG)->size() >= 0x3000)
111111   {
112      space->install_readwrite_bank(0x4000, 0x5fff, "bank2");
112      space.install_readwrite_bank(0x4000, 0x5fff, "bank2");
113113      state->membank("bank2")->set_base(&machine.device<ram_device>(RAM_TAG)->pointer()[0x1000]);
114114   }
115115   else
116116   {
117      space->nop_readwrite(0x4000, 0x5fff);
117      space.nop_readwrite(0x4000, 0x5fff);
118118   }
119119
120120   if (machine.device<ram_device>(RAM_TAG)->size() >= 0x5000)
121121   {
122      space->install_readwrite_bank(0x2000, 0x3fff, "bank3");
122      space.install_readwrite_bank(0x2000, 0x3fff, "bank3");
123123      state->membank("bank3")->set_base(&machine.device<ram_device>(RAM_TAG)->pointer()[0x3000]);
124124   }
125125   else
126126   {
127      space->nop_readwrite(0x2000, 0x3fff);
127      space.nop_readwrite(0x2000, 0x3fff);
128128   }
129129
130130   device_t *main_cpu = machine.device("maincpu");
trunk/src/mess/machine/pokemini.c
r17963r17964
395395   static const int timer_to_cycles_fast[8] = { 2, 8, 32, 64, 128, 256, 1024, 4096 };
396396   static const int timer_to_cycles_slow[8] = { 128, 256, 512, 1024, 2048, 4096, 8192, 16384 };
397397
398   //logerror( "%0X: Write to hardware address: %02X, %02X\n", space->device() .safe_pc( ), offset, data );
398   //logerror( "%0X: Write to hardware address: %02X, %02X\n", space.device() .safe_pc( ), offset, data );
399399
400400   switch( offset )
401401   {
r17963r17964
14161416static TIMER_CALLBACK( pokemini_prc_counter_callback )
14171417{
14181418   pokemini_state *state = machine.driver_data<pokemini_state>();
1419   address_space *space = machine.device( "maincpu")->memory().space( AS_PROGRAM );
1419   address_space &space = *machine.device( "maincpu")->memory().space( AS_PROGRAM );
14201420   state->m_prc.count++;
14211421
14221422   /* Check for overflow */
r17963r17964
14401440                  UINT8 tile = state->m_p_ram[ 0x360 + ( y * state->m_prc.map_size_x ) + x ];
14411441                  int i;
14421442                  for( i = 0; i < 8; i++ ) {
1443                     state->m_p_ram[ ( y * 96 ) + ( x * 8 ) + i ] = space->read_byte( state->m_prc.bg_tiles + ( tile * 8 ) + i );
1443                     state->m_p_ram[ ( y * 96 ) + ( x * 8 ) + i ] = space.read_byte( state->m_prc.bg_tiles + ( tile * 8 ) + i );
14441444                  }
14451445               }
14461446            }
r17963r17964
14711471                        int rel_x = ( spr_flag & 0x01 ) ? 15 - i : i;
14721472                        UINT32   s = spr_base + ( ( rel_x & 0x08 ) << 2 ) + ( rel_x & 0x07 );
14731473
1474                        mask = ~ ( space->read_byte( s ) | ( space->read_byte( s + 8 ) << 8 ) );
1475                        gfx = space->read_byte( s + 16 ) | ( space->read_byte( s + 24 ) << 8 );
1474                        mask = ~ ( space.read_byte( s ) | ( space.read_byte( s + 8 ) << 8 ) );
1475                        gfx = space.read_byte( s + 16 ) | ( space.read_byte( s + 24 ) << 8 );
14761476
14771477                        /* Are the colors inverted? */
14781478                        if ( spr_flag & 0x04 )
trunk/src/mess/machine/northbridge.c
r17963r17964
2424
2525void northbridge_device::device_start()
2626{
27   address_space* space = machine().device(":maincpu")->memory().space(AS_PROGRAM);
27   address_space& space = *machine().device(":maincpu")->memory().space(AS_PROGRAM);
2828
2929   machine().root_device().membank("bank10")->set_base(m_ram->pointer());
3030
3131   if (m_ram->size() > 0x0a0000)
3232   {
3333      offs_t ram_limit = 0x100000 + m_ram->size() - 0x0a0000;
34      space->install_read_bank(0x100000,  ram_limit - 1, "bank1");
35      space->install_write_bank(0x100000,  ram_limit - 1, "bank1");
34      space.install_read_bank(0x100000,  ram_limit - 1, "bank1");
35      space.install_write_bank(0x100000,  ram_limit - 1, "bank1");
3636      machine().root_device().membank("bank1")->set_base(m_ram->pointer() + 0xa0000);
3737   }
3838}
trunk/src/mess/machine/pmd85.c
r17963r17964
2828static void pmd851_update_memory(running_machine &machine)
2929{
3030   pmd85_state *state = machine.driver_data<pmd85_state>();
31   address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
31   address_space& space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
3232   UINT8 *ram = machine.device<ram_device>(RAM_TAG)->pointer();
3333
3434   if (state->m_startup_mem_map)
3535   {
3636      UINT8 *mem = state->memregion("maincpu")->base();
3737
38      space->unmap_write(0x0000, 0x0fff);
39      space->nop_write(0x1000, 0x1fff);
40      space->unmap_write(0x2000, 0x2fff);
41      space->nop_write(0x3000, 0x3fff);
38      space.unmap_write(0x0000, 0x0fff);
39      space.nop_write(0x1000, 0x1fff);
40      space.unmap_write(0x2000, 0x2fff);
41      space.nop_write(0x3000, 0x3fff);
4242
43      space->nop_read(0x1000, 0x1fff);
44      space->nop_read(0x3000, 0x3fff);
43      space.nop_read(0x1000, 0x1fff);
44      space.nop_read(0x3000, 0x3fff);
4545
4646      state->membank("bank1")->set_base(mem + 0x010000);
4747      state->membank("bank3")->set_base(mem + 0x010000);
r17963r17964
5353   }
5454   else
5555   {
56      space->install_write_bank(0x0000, 0x0fff, "bank1");
57      space->install_write_bank(0x1000, 0x1fff, "bank2");
58      space->install_write_bank(0x2000, 0x2fff, "bank3");
59      space->install_write_bank(0x3000, 0x3fff, "bank4");
60      space->install_write_bank(0x4000, 0x7fff, "bank5");
56      space.install_write_bank(0x0000, 0x0fff, "bank1");
57      space.install_write_bank(0x1000, 0x1fff, "bank2");
58      space.install_write_bank(0x2000, 0x2fff, "bank3");
59      space.install_write_bank(0x3000, 0x3fff, "bank4");
60      space.install_write_bank(0x4000, 0x7fff, "bank5");
6161
62      space->install_read_bank(0x1000, 0x1fff, "bank2");
63      space->install_read_bank(0x3000, 0x3fff, "bank4");
62      space.install_read_bank(0x1000, 0x1fff, "bank2");
63      space.install_read_bank(0x3000, 0x3fff, "bank4");
6464
6565      state->membank("bank1")->set_base(ram);
6666      state->membank("bank2")->set_base(ram + 0x1000);
r17963r17964
7373static void pmd852a_update_memory(running_machine &machine)
7474{
7575   pmd85_state *state = machine.driver_data<pmd85_state>();
76   address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
76   address_space& space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
7777   UINT8 *ram = machine.device<ram_device>(RAM_TAG)->pointer();
7878
7979   if (state->m_startup_mem_map)
8080   {
8181      UINT8 *mem = state->memregion("maincpu")->base();
8282
83      space->unmap_write(0x0000, 0x0fff);
84      space->unmap_write(0x2000, 0x2fff);
83      space.unmap_write(0x0000, 0x0fff);
84      space.unmap_write(0x2000, 0x2fff);
8585
8686      state->membank("bank1")->set_base(mem + 0x010000);
8787      state->membank("bank2")->set_base(ram + 0x9000);
r17963r17964
9797   }
9898   else
9999   {
100      space->install_write_bank(0x0000, 0x0fff, "bank1");
101      space->install_write_bank(0x2000, 0x2fff, "bank3");
100      space.install_write_bank(0x0000, 0x0fff, "bank1");
101      space.install_write_bank(0x2000, 0x2fff, "bank3");
102102
103103      state->membank("bank1")->set_base(ram);
104104      state->membank("bank2")->set_base(ram + 0x1000);
r17963r17964
149149static void alfa_update_memory(running_machine &machine)
150150{
151151   pmd85_state *state = machine.driver_data<pmd85_state>();
152   address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
152   address_space& space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
153153   UINT8 *ram = machine.device<ram_device>(RAM_TAG)->pointer();
154154
155155   if (state->m_startup_mem_map)
156156   {
157157      UINT8 *mem = state->memregion("maincpu")->base();
158158
159      space->unmap_write(0x0000, 0x0fff);
160      space->unmap_write(0x1000, 0x33ff);
161      space->nop_write(0x3400, 0x3fff);
159      space.unmap_write(0x0000, 0x0fff);
160      space.unmap_write(0x1000, 0x33ff);
161      space.nop_write(0x3400, 0x3fff);
162162
163163      state->membank("bank1")->set_base(mem + 0x010000);
164164      state->membank("bank2")->set_base(mem + 0x011000);
r17963r17964
169169   }
170170   else
171171   {
172      space->install_write_bank(0x0000, 0x0fff, "bank1");
173      space->install_write_bank(0x1000, 0x33ff, "bank2");
174      space->install_write_bank(0x3400, 0x3fff, "bank3");
172      space.install_write_bank(0x0000, 0x0fff, "bank1");
173      space.install_write_bank(0x1000, 0x33ff, "bank2");
174      space.install_write_bank(0x3400, 0x3fff, "bank3");
175175
176176      state->membank("bank1")->set_base(ram);
177177      state->membank("bank2")->set_base(ram + 0x1000);
r17963r17964
183183static void mato_update_memory(running_machine &machine)
184184{
185185   pmd85_state *state = machine.driver_data<pmd85_state>();
186   address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
186   address_space& space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
187187   UINT8 *ram = machine.device<ram_device>(RAM_TAG)->pointer();
188188
189189   if (state->m_startup_mem_map)
190190   {
191191      UINT8 *mem = state->memregion("maincpu")->base();
192192
193      space->unmap_write(0x0000, 0x3fff);
193      space.unmap_write(0x0000, 0x3fff);
194194
195195      state->membank("bank1")->set_base(mem + 0x010000);
196196      state->membank("bank2")->set_base(ram + 0xc000);
r17963r17964
199199   }
200200   else
201201   {
202      space->install_write_bank(0x0000, 0x3fff, "bank1");
202      space.install_write_bank(0x0000, 0x3fff, "bank1");
203203
204204      state->membank("bank1")->set_base(ram);
205205      state->membank("bank2")->set_base(ram + 0x4000);
r17963r17964
209209static void c2717_update_memory(running_machine &machine)
210210{
211211   pmd85_state *state = machine.driver_data<pmd85_state>();
212   address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
212   address_space& space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
213213   UINT8 *mem = state->memregion("maincpu")->base();
214214   UINT8 *ram = machine.device<ram_device>(RAM_TAG)->pointer();
215215
216216   if (state->m_startup_mem_map)
217217   {
218      space->unmap_write(0x0000, 0x3fff);
218      space.unmap_write(0x0000, 0x3fff);
219219
220220      state->membank("bank1")->set_base(mem + 0x010000);
221221      state->membank("bank2")->set_base(ram + 0x4000);
r17963r17964
224224   }
225225   else
226226   {
227      space->install_write_bank(0x0000, 0x3fff, "bank1");
227      space.install_write_bank(0x0000, 0x3fff, "bank1");
228228      state->membank("bank1")->set_base(ram);
229229      state->membank("bank2")->set_base(ram + 0x4000);
230230   }
trunk/src/mess/machine/upd71071.c
r17963r17964
123123   // single byte or word transfer
124124   device_t* device = (device_t*)ptr;
125125   upd71071_t* dmac = get_safe_token(device);
126   address_space* space = device->machine().device(dmac->intf->cputag)->memory().space(AS_PROGRAM);
126   address_space& space = *device->machine().device(dmac->intf->cputag)->memory().space(AS_PROGRAM);
127127   int channel = param;
128128   UINT16 data = 0;  // data to transfer
129129
r17963r17964
134134      case 0x04:  // I/O -> memory
135135         if(dmac->intf->dma_read[channel])
136136            data = dmac->intf->dma_read[channel](device->machine());
137         space->write_byte(dmac->reg.address_current[channel],data & 0xff);
137         space.write_byte(dmac->reg.address_current[channel],data & 0xff);
138138         if(dmac->reg.mode_control[channel] & 0x20)  // Address direction
139139            dmac->reg.address_current[channel]--;
140140         else
r17963r17964
152152            dmac->reg.count_current[channel]--;
153153         break;
154154      case 0x08:  // memory -> I/O
155         data = space->read_byte(dmac->reg.address_current[channel]);
155         data = space.read_byte(dmac->reg.address_current[channel]);
156156         if(dmac->intf->dma_read[channel])
157157            dmac->intf->dma_write[channel](device->machine(),data);
158158         if(dmac->reg.mode_control[channel] & 0x20)  // Address direction
trunk/src/mess/machine/at.c
r17963r17964
316316static void init_at_common(running_machine &machine)
317317{
318318   at_state *state = machine.driver_data<at_state>();
319   address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
319   address_space& space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
320320
321321   // The CS4031 chipset does this itself
322322   if (machine.device("cs4031") == NULL)
r17963r17964
327327      if (machine.device<ram_device>(RAM_TAG)->size() > 0x0a0000)
328328      {
329329         offs_t ram_limit = 0x100000 + machine.device<ram_device>(RAM_TAG)->size() - 0x0a0000;
330         space->install_read_bank(0x100000,  ram_limit - 1, "bank1");
331         space->install_write_bank(0x100000,  ram_limit - 1, "bank1");
330         space.install_read_bank(0x100000,  ram_limit - 1, "bank1");
331         space.install_write_bank(0x100000,  ram_limit - 1, "bank1");
332332         state->membank("bank1")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0xa0000);
333333      }
334334   }
trunk/src/mess/machine/orion.c
r17963r17964
268268   orion_state *state = machine.driver_data<orion_state>();
269269   UINT8 bank_select;
270270   UINT8 segment_select;
271   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
271   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
272272
273273   bank_select = (state->m_orionz80_dispatcher & 0x0c) >> 2;
274274   segment_select = state->m_orionz80_dispatcher & 0x03;
275275
276   space->install_write_bank(0x0000, 0x3fff, "bank1");
276   space.install_write_bank(0x0000, 0x3fff, "bank1");
277277   if ((state->m_orionz80_dispatcher & 0x80)==0)
278278   { // dispatcher on
279279      state->membank("bank1")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0x10000 * bank_select + segment_select * 0x4000 );
r17963r17964
287287
288288   if ((state->m_orionz80_dispatcher & 0x20) == 0)
289289   {
290      space->install_write_handler(0xf400, 0xf4ff, write8_delegate(FUNC(orion_state::orion128_system_w),state));
291      space->install_write_handler(0xf500, 0xf5ff, write8_delegate(FUNC(orion_state::orion128_romdisk_w),state));
292      space->install_write_handler(0xf700, 0xf7ff, write8_delegate(FUNC(orion_state::orionz80_floppy_rtc_w),state));
293      space->install_read_handler(0xf400, 0xf4ff, read8_delegate(FUNC(orion_state::orion128_system_r),state));
294      space->install_read_handler(0xf500, 0xf5ff, read8_delegate(FUNC(orion_state::orion128_romdisk_r),state));
295      space->install_read_handler(0xf700, 0xf7ff, read8_delegate(FUNC(orion_state::orionz80_floppy_rtc_r),state));
290      space.install_write_handler(0xf400, 0xf4ff, write8_delegate(FUNC(orion_state::orion128_system_w),state));
291      space.install_write_handler(0xf500, 0xf5ff, write8_delegate(FUNC(orion_state::orion128_romdisk_w),state));
292      space.install_write_handler(0xf700, 0xf7ff, write8_delegate(FUNC(orion_state::orionz80_floppy_rtc_w),state));
293      space.install_read_handler(0xf400, 0xf4ff, read8_delegate(FUNC(orion_state::orion128_system_r),state));
294      space.install_read_handler(0xf500, 0xf5ff, read8_delegate(FUNC(orion_state::orion128_romdisk_r),state));
295      space.install_read_handler(0xf700, 0xf7ff, read8_delegate(FUNC(orion_state::orionz80_floppy_rtc_r),state));
296296
297      space->install_write_handler(0xf800, 0xf8ff, write8_delegate(FUNC(orion_state::orion128_video_mode_w),state));
298      space->install_write_handler(0xf900, 0xf9ff, write8_delegate(FUNC(orion_state::orionz80_memory_page_w),state));
299      space->install_write_handler(0xfa00, 0xfaff, write8_delegate(FUNC(orion_state::orion128_video_page_w),state));
300      space->install_write_handler(0xfb00, 0xfbff, write8_delegate(FUNC(orion_state::orionz80_dispatcher_w),state));
301      space->unmap_write(0xfc00, 0xfeff);
302      space->install_write_handler(0xff00, 0xffff, write8_delegate(FUNC(orion_state::orionz80_sound_w),state));
297      space.install_write_handler(0xf800, 0xf8ff, write8_delegate(FUNC(orion_state::orion128_video_mode_w),state));
298      space.install_write_handler(0xf900, 0xf9ff, write8_delegate(FUNC(orion_state::orionz80_memory_page_w),state));
299      space.install_write_handler(0xfa00, 0xfaff, write8_delegate(FUNC(orion_state::orion128_video_page_w),state));
300      space.install_write_handler(0xfb00, 0xfbff, write8_delegate(FUNC(orion_state::orionz80_dispatcher_w),state));
301      space.unmap_write(0xfc00, 0xfeff);
302      space.install_write_handler(0xff00, 0xffff, write8_delegate(FUNC(orion_state::orionz80_sound_w),state));
303303
304304      state->membank("bank3")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0xf000);
305305      state->membank("bank5")->set_base(machine.root_device().memregion("maincpu")->base() + 0xf800);
r17963r17964
328328
329329MACHINE_RESET_MEMBER(orion_state,orionz80)
330330{
331   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
331   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
332332
333   space->unmap_write(0x0000, 0x3fff);
334   space->install_write_bank(0x4000, 0xefff, "bank2");
335   space->install_write_bank(0xf000, 0xf3ff, "bank3");
333   space.unmap_write(0x0000, 0x3fff);
334   space.install_write_bank(0x4000, 0xefff, "bank2");
335   space.install_write_bank(0xf000, 0xf3ff, "bank3");
336336
337   space->install_write_handler(0xf400, 0xf4ff, write8_delegate(FUNC(orion_state::orion128_system_w),this));
338   space->install_write_handler(0xf500, 0xf5ff, write8_delegate(FUNC(orion_state::orion128_romdisk_w),this));
339   space->install_write_handler(0xf700, 0xf7ff, write8_delegate(FUNC(orion_state::orionz80_floppy_rtc_w),this));
340   space->install_read_handler(0xf400, 0xf4ff, read8_delegate(FUNC(orion_state::orion128_system_r),this));
341   space->install_read_handler(0xf500, 0xf5ff, read8_delegate(FUNC(orion_state::orion128_romdisk_r),this));
342   space->install_read_handler(0xf700, 0xf7ff, read8_delegate(FUNC(orion_state::orionz80_floppy_rtc_r),this));
337   space.install_write_handler(0xf400, 0xf4ff, write8_delegate(FUNC(orion_state::orion128_system_w),this));
338   space.install_write_handler(0xf500, 0xf5ff, write8_delegate(FUNC(orion_state::orion128_romdisk_w),this));
339   space.install_write_handler(0xf700, 0xf7ff, write8_delegate(FUNC(orion_state::orionz80_floppy_rtc_w),this));
340   space.install_read_handler(0xf400, 0xf4ff, read8_delegate(FUNC(orion_state::orion128_system_r),this));
341   space.install_read_handler(0xf500, 0xf5ff, read8_delegate(FUNC(orion_state::orion128_romdisk_r),this));
342   space.install_read_handler(0xf700, 0xf7ff, read8_delegate(FUNC(orion_state::orionz80_floppy_rtc_r),this));
343343
344   space->install_write_handler(0xf800, 0xf8ff, write8_delegate(FUNC(orion_state::orion128_video_mode_w),this));
345   space->install_write_handler(0xf900, 0xf9ff, write8_delegate(FUNC(orion_state::orionz80_memory_page_w),this));
346   space->install_write_handler(0xfa00, 0xfaff, write8_delegate(FUNC(orion_state::orion128_video_page_w),this));
347   space->install_write_handler(0xfb00, 0xfbff, write8_delegate(FUNC(orion_state::orionz80_dispatcher_w),this));
348   space->unmap_write(0xfc00, 0xfeff);
349   space->install_write_handler(0xff00, 0xffff, write8_delegate(FUNC(orion_state::orionz80_sound_w),this));
344   space.install_write_handler(0xf800, 0xf8ff, write8_delegate(FUNC(orion_state::orion128_video_mode_w),this));
345   space.install_write_handler(0xf900, 0xf9ff, write8_delegate(FUNC(orion_state::orionz80_memory_page_w),this));
346   space.install_write_handler(0xfa00, 0xfaff, write8_delegate(FUNC(orion_state::orion128_video_page_w),this));
347   space.install_write_handler(0xfb00, 0xfbff, write8_delegate(FUNC(orion_state::orionz80_dispatcher_w),this));
348   space.unmap_write(0xfc00, 0xfeff);
349   space.install_write_handler(0xff00, 0xffff, write8_delegate(FUNC(orion_state::orionz80_sound_w),this));
350350
351351
352352   membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0xf800);
r17963r17964
413413static void orionpro_bank_switch(running_machine &machine)
414414{
415415   orion_state *state = machine.driver_data<orion_state>();
416   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
416   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
417417   int page = state->m_orionpro_page & 7; // we have only 8 pages
418418   int is128 = (state->m_orionpro_dispatcher & 0x80) ? 1 : 0;
419419   UINT8 *ram = machine.device<ram_device>(RAM_TAG)->pointer();
r17963r17964
422422   {
423423      page = state->m_orionpro_128_page & 7;
424424   }
425   space->install_write_bank(0x0000, 0x1fff, "bank1");
426   space->install_write_bank(0x2000, 0x3fff, "bank2");
427   space->install_write_bank(0x4000, 0x7fff, "bank3");
428   space->install_write_bank(0x8000, 0xbfff, "bank4");
429   space->install_write_bank(0xc000, 0xefff, "bank5");
430   space->install_write_bank(0xf000, 0xf3ff, "bank6");
431   space->install_write_bank(0xf400, 0xf7ff, "bank7");
432   space->install_write_bank(0xf800, 0xffff, "bank8");
425   space.install_write_bank(0x0000, 0x1fff, "bank1");
426   space.install_write_bank(0x2000, 0x3fff, "bank2");
427   space.install_write_bank(0x4000, 0x7fff, "bank3");
428   space.install_write_bank(0x8000, 0xbfff, "bank4");
429   space.install_write_bank(0xc000, 0xefff, "bank5");
430   space.install_write_bank(0xf000, 0xf3ff, "bank6");
431   space.install_write_bank(0xf400, 0xf7ff, "bank7");
432   space.install_write_bank(0xf800, 0xffff, "bank8");
433433
434434
435435   if ((state->m_orionpro_dispatcher & 0x01)==0x00)
r17963r17964
444444   }
445445   if ((state->m_orionpro_dispatcher & 0x10)==0x10)
446446   {   // ROM1 enabled
447      space->unmap_write(0x0000, 0x1fff);
447      space.unmap_write(0x0000, 0x1fff);
448448      state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base() + 0x20000);
449449   }
450450   if ((state->m_orionpro_dispatcher & 0x08)==0x08)
451451   {   // ROM2 enabled
452      space->unmap_write(0x2000, 0x3fff);
452      space.unmap_write(0x2000, 0x3fff);
453453      state->membank("bank2")->set_base(machine.root_device().memregion("maincpu")->base() + 0x22000 + (state->m_orionpro_rom2_segment & 7) * 0x2000);
454454   }
455455
r17963r17964
477477   {
478478      state->membank("bank6")->set_base(ram + 0x10000 * 0 + 0xf000);
479479
480      space->install_write_handler(0xf400, 0xf4ff, write8_delegate(FUNC(orion_state::orion128_system_w),state));
481      space->install_write_handler(0xf500, 0xf5ff, write8_delegate(FUNC(orion_state::orion128_romdisk_w),state));
482      space->unmap_write(0xf600, 0xf6ff);
483      space->install_write_handler(0xf700, 0xf7ff, write8_delegate(FUNC(orion_state::orion128_floppy_w),state));
484      space->install_read_handler(0xf400, 0xf4ff, read8_delegate(FUNC(orion_state::orion128_system_r),state));
485      space->install_read_handler(0xf500, 0xf5ff, read8_delegate(FUNC(orion_state::orion128_romdisk_r),state));
486      space->unmap_read(0xf600, 0xf6ff);
487      space->install_read_handler(0xf700, 0xf7ff, read8_delegate(FUNC(orion_state::orion128_floppy_r),state));
480      space.install_write_handler(0xf400, 0xf4ff, write8_delegate(FUNC(orion_state::orion128_system_w),state));
481      space.install_write_handler(0xf500, 0xf5ff, write8_delegate(FUNC(orion_state::orion128_romdisk_w),state));
482      space.unmap_write(0xf600, 0xf6ff);
483      space.install_write_handler(0xf700, 0xf7ff, write8_delegate(FUNC(orion_state::orion128_floppy_w),state));
484      space.install_read_handler(0xf400, 0xf4ff, read8_delegate(FUNC(orion_state::orion128_system_r),state));
485      space.install_read_handler(0xf500, 0xf5ff, read8_delegate(FUNC(orion_state::orion128_romdisk_r),state));
486      space.unmap_read(0xf600, 0xf6ff);
487      space.install_read_handler(0xf700, 0xf7ff, read8_delegate(FUNC(orion_state::orion128_floppy_r),state));
488488
489      space->install_write_handler(0xf800, 0xf8ff, write8_delegate(FUNC(orion_state::orion128_video_mode_w),state));
490      space->install_write_handler(0xf900, 0xf9ff, write8_delegate(FUNC(orion_state::orionpro_memory_page_w),state));
491      space->install_write_handler(0xfa00, 0xfaff, write8_delegate(FUNC(orion_state::orion128_video_page_w),state));
492      space->unmap_write(0xfb00, 0xfeff);
493      space->install_write_handler(0xff00, 0xffff, write8_delegate(FUNC(orion_state::orionz80_sound_w),state));
489      space.install_write_handler(0xf800, 0xf8ff, write8_delegate(FUNC(orion_state::orion128_video_mode_w),state));
490      space.install_write_handler(0xf900, 0xf9ff, write8_delegate(FUNC(orion_state::orionpro_memory_page_w),state));
491      space.install_write_handler(0xfa00, 0xfaff, write8_delegate(FUNC(orion_state::orion128_video_page_w),state));
492      space.unmap_write(0xfb00, 0xfeff);
493      space.install_write_handler(0xff00, 0xffff, write8_delegate(FUNC(orion_state::orionz80_sound_w),state));
494494
495495
496496      state->membank("bank8")->set_base(ram + 0x10000 * 0 + 0xf800);
trunk/src/mess/machine/cpc_ssa1.c
r17963r17964
187187void cpc_ssa1_device::device_start()
188188{
189189   device_t* cpu = machine().device("maincpu");
190   address_space* space = cpu->memory().space(AS_IO);
190   address_space& space = *cpu->memory().space(AS_IO);
191191   m_slot = dynamic_cast<cpc_expansion_slot_device *>(owner());
192192
193193   m_rom = memregion("sp0256")->base();
194194
195195//  m_sp0256_device = subdevice("sp0256");
196196
197   space->install_readwrite_handler(0xfaee,0xfaee,0,0,read8_delegate(FUNC(cpc_ssa1_device::ssa1_r),this),write8_delegate(FUNC(cpc_ssa1_device::ssa1_w),this));
198   space->install_readwrite_handler(0xfbee,0xfbee,0,0,read8_delegate(FUNC(cpc_ssa1_device::ssa1_r),this),write8_delegate(FUNC(cpc_ssa1_device::ssa1_w),this));
197   space.install_readwrite_handler(0xfaee,0xfaee,0,0,read8_delegate(FUNC(cpc_ssa1_device::ssa1_r),this),write8_delegate(FUNC(cpc_ssa1_device::ssa1_w),this));
198   space.install_readwrite_handler(0xfbee,0xfbee,0,0,read8_delegate(FUNC(cpc_ssa1_device::ssa1_r),this),write8_delegate(FUNC(cpc_ssa1_device::ssa1_w),this));
199199}
200200
201201void cpc_dkspeech_device::device_start()
202202{
203203   device_t* cpu = machine().device("maincpu");
204   address_space* space = cpu->memory().space(AS_IO);
204   address_space& space = *cpu->memory().space(AS_IO);
205205   m_slot = dynamic_cast<cpc_expansion_slot_device *>(owner());
206206
207207   m_rom = memregion("sp0256")->base();
208208
209209//  m_sp0256_device = subdevice("sp0256");
210210
211   space->install_readwrite_handler(0xfbfe,0xfbfe,0,0,read8_delegate(FUNC(cpc_dkspeech_device::dkspeech_r),this),write8_delegate(FUNC(cpc_dkspeech_device::dkspeech_w),this));
211   space.install_readwrite_handler(0xfbfe,0xfbfe,0,0,read8_delegate(FUNC(cpc_dkspeech_device::dkspeech_r),this),write8_delegate(FUNC(cpc_dkspeech_device::dkspeech_w),this));
212212}
213213
214214//-------------------------------------------------
trunk/src/mess/machine/a7800.c
r17963r17964
7272static void a7800_driver_init(running_machine &machine, int ispal, int lines)
7373{
7474   a7800_state *state = machine.driver_data<a7800_state>();
75   address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
75   address_space& space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
7676   state->m_ROM = state->memregion("maincpu")->base();
7777   state->m_ispal = ispal;
7878   state->m_lines = lines;
r17963r17964
8585   state->membank("bank7")->set_base(&state->m_ROM[0x2000]);      /* MAINRAM */
8686
8787   /* Brutal hack put in as a consequence of new memory system; fix this */
88   space->install_readwrite_bank(0x0480, 0x04FF,"bank10");
88   space.install_readwrite_bank(0x0480, 0x04FF,"bank10");
8989   state->membank("bank10")->set_base(state->m_ROM + 0x0480);
90   space->install_readwrite_bank(0x1800, 0x27FF, "bank11");
90   space.install_readwrite_bank(0x1800, 0x27FF, "bank11");
9191   state->membank("bank11")->set_base(state->m_ROM + 0x1800);
9292}
9393
r17963r17964
107107void a7800_state::machine_reset()
108108{
109109   UINT8 *memory;
110   address_space* space = machine().device("maincpu")->memory().space(AS_PROGRAM);
110   address_space& space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
111111
112112   m_ctrl_lock = 0;
113113   m_ctrl_reg = 0;
r17963r17964
124124   if (m_cart_type & 0x01)
125125   {
126126      pokey_device *pokey = machine().device<pokey_device>("pokey");
127      space->install_readwrite_handler(0x4000, 0x7FFF, read8_delegate(FUNC(pokey_device::read),pokey), write8_delegate(FUNC(pokey_device::write),pokey));
127      space.install_readwrite_handler(0x4000, 0x7FFF, read8_delegate(FUNC(pokey_device::read),pokey), write8_delegate(FUNC(pokey_device::write),pokey));
128128   }
129129}
130130
trunk/src/mess/machine/microtan.c
r17963r17964
515515{
516516    UINT8 *dst = memregion("gfx2")->base();
517517    int i;
518    address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
518    address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
519519
520520    for (i = 0; i < 256; i++)
521521    {
r17963r17964
556556    switch (read_dsw(machine()) & 3)
557557    {
558558        case 0:  // 1K only :)
559            space->nop_readwrite(0x0400, 0xbbff);
559            space.nop_readwrite(0x0400, 0xbbff);
560560            break;
561561        case 1:  // +7K TANEX
562            space->install_ram(0x0400, 0x1fff,NULL);
563            space->nop_readwrite(0x2000, 0xbbff);
562            space.install_ram(0x0400, 0x1fff,NULL);
563            space.nop_readwrite(0x2000, 0xbbff);
564564            break;
565565        default: // +7K TANEX + 40K TANRAM
566            space->install_ram(0x0400, 0xbbff, NULL);
566            space.install_ram(0x0400, 0xbbff, NULL);
567567            break;
568568    }
569569
trunk/src/mess/machine/hecdisk2.c
r17963r17964
165165/*****************************************************************************/
166166READ8_HANDLER( hector_disc2_io00_port_r)
167167{
168   hec2hrp_state *state = space->machine().driver_data<hec2hrp_state>();
168   hec2hrp_state *state = space.machine().driver_data<hec2hrp_state>();
169169   /* Switch Disc 2 to RAM to let full RAM acces */
170170   state->membank("bank3")->set_entry(DISCII_BANK_RAM);
171171   return 0;
172172}
173173WRITE8_HANDLER( hector_disc2_io00_port_w)
174174{
175   hec2hrp_state *state = space->machine().driver_data<hec2hrp_state>();
175   hec2hrp_state *state = space.machine().driver_data<hec2hrp_state>();
176176   /* Switch Disc 2 to RAM to let full RAM acces */
177177   state->membank("bank3")->set_entry(DISCII_BANK_RAM);
178178}
r17963r17964
187187}
188188READ8_HANDLER( hector_disc2_io30_port_r)
189189{
190   hec2hrp_state *state = space->machine().driver_data<hec2hrp_state>();
190   hec2hrp_state *state = space.machine().driver_data<hec2hrp_state>();
191191   return state->m_hector_disc2_data_r_ready;
192192}
193193WRITE8_HANDLER( hector_disc2_io30_port_w)
r17963r17964
197197
198198READ8_HANDLER( hector_disc2_io40_port_r)
199199{
200   hec2hrp_state *state = space->machine().driver_data<hec2hrp_state>();
200   hec2hrp_state *state = space.machine().driver_data<hec2hrp_state>();
201201   /* Read data send by Hector, by Disc2*/
202202   state->m_hector_disc2_data_r_ready = 0x00;   /* Clear memory info read ready*/
203203   return state->m_hector_disc2_data_read;      /* send the data !*/
r17963r17964
205205
206206WRITE8_HANDLER( hector_disc2_io40_port_w)   /* Write data send by Disc2, to Hector*/
207207{
208   hec2hrp_state *state = space->machine().driver_data<hec2hrp_state>();
208   hec2hrp_state *state = space.machine().driver_data<hec2hrp_state>();
209209   state->m_hector_disc2_data_write = data;      /* Memorization data*/
210210   state->m_hector_disc2_data_w_ready = 0x80;   /* Memorization data write ready in D7*/
211211}
212212
213213READ8_HANDLER( hector_disc2_io50_port_r)   /*Read memory info write ready*/
214214{
215   hec2hrp_state *state = space->machine().driver_data<hec2hrp_state>();
215   hec2hrp_state *state = space.machine().driver_data<hec2hrp_state>();
216216   return state->m_hector_disc2_data_w_ready;
217217}
218218
219219WRITE8_HANDLER( hector_disc2_io50_port_w) /* I/O Port to the stuff of Disc2*/
220220{
221   hec2hrp_state *state = space->machine().driver_data<hec2hrp_state>();
222   device_t *fdc = space->machine().device("upd765");
221   hec2hrp_state *state = space.machine().driver_data<hec2hrp_state>();
222   device_t *fdc = space.machine().device("upd765");
223223
224224   /* FDC Motor Control - Bit 0/1 defines the state of the FDD 0/1 motor */
225   floppy_mon_w(floppy_get_device(space->machine(), 0), BIT(data, 0));   // Moteur floppy A:
226   floppy_mon_w(floppy_get_device(space->machine(), 1), BIT(data, 1));   // Moteur floppy B:
227   floppy_drive_set_ready_state(floppy_get_device(space->machine(), 0), FLOPPY_DRIVE_READY,!BIT(data, 0));
228   floppy_drive_set_ready_state(floppy_get_device(space->machine(), 1), FLOPPY_DRIVE_READY,!BIT(data, 1));
225   floppy_mon_w(floppy_get_device(space.machine(), 0), BIT(data, 0));   // Moteur floppy A:
226   floppy_mon_w(floppy_get_device(space.machine(), 1), BIT(data, 1));   // Moteur floppy B:
227   floppy_drive_set_ready_state(floppy_get_device(space.machine(), 0), FLOPPY_DRIVE_READY,!BIT(data, 0));
228   floppy_drive_set_ready_state(floppy_get_device(space.machine(), 1), FLOPPY_DRIVE_READY,!BIT(data, 1));
229229
230230   /* Write bit TC uPD765 on D4 of port I/O 50 */
231231   upd765_tc_w(fdc, BIT(data, 4));  // Seems not used...
r17963r17964
236236
237237   /* if RNMI is OK, try to lauch an NMI*/
238238   if (state->m_hector_disc2_RNMI)
239      valid_interrupt(space->machine());
239      valid_interrupt(space.machine());
240240}
241241
242242//Here we must take the exchange with uPD against AM_DEVREADWRITE
r17963r17964
245245//  AM_RANGE(0x061,0x061) AM_DEVREADWRITE("upd765",upd765_data_r,upd765_data_w)
246246READ8_HANDLER( hector_disc2_io61_port_r)
247247{
248   hec2hrp_state *state = space->machine().driver_data<hec2hrp_state>();
248   hec2hrp_state *state = space.machine().driver_data<hec2hrp_state>();
249249   UINT8 data;
250   device_t *fdc = space->machine().device("upd765");
251   data = upd765_data_r(fdc,*space, 0); //Get the result
250   device_t *fdc = space.machine().device("upd765");
251   data = upd765_data_r(fdc,space, 0); //Get the result
252252
253253// if ST0 == 0x28 (drive A:) or 0x29 (drive B:) => add 0x40
254254// and correct the ST1 and ST2 (patch)
r17963r17964
280280}
281281WRITE8_HANDLER( hector_disc2_io61_port_w)
282282{
283   hec2hrp_state *state = space->machine().driver_data<hec2hrp_state>();
283   hec2hrp_state *state = space.machine().driver_data<hec2hrp_state>();
284284   /* Data useful to patch the RESULT in case of write command */
285285   state->m_hector_cmd[9]=state->m_hector_cmd[8];  //hector_cmd_8 = Cde number when state->m_hector_nb_cde = 9
286286   state->m_hector_cmd[8]=state->m_hector_cmd[7];  //hector_cmd_7 = Drive
r17963r17964
308308      state->m_print=0;
309309#endif
310310
311   device_t *fdc = space->machine().device("upd765");
312   upd765_data_w(fdc,*space, 0, data);
311   device_t *fdc = space.machine().device("upd765");
312   upd765_data_w(fdc,space, 0, data);
313313}
314314
315315//  AM_RANGE(0x070,0x07f) AM_DEVREADWRITE("upd765",upd765_dack_r,upd765_dack_w)
316316READ8_HANDLER( hector_disc2_io70_port_r) // Gestion du DMA
317317{
318318   UINT8 data;
319   device_t *fdc = space->machine().device("upd765");
320   data = upd765_dack_r(fdc,*space, 0);
319   device_t *fdc = space.machine().device("upd765");
320   data = upd765_dack_r(fdc,space, 0);
321321   return data;
322322}
323323WRITE8_HANDLER( hector_disc2_io70_port_w)
324324{
325   device_t *fdc = space->machine().device("upd765");
326   upd765_dack_w(fdc,*space, 0, data);
325   device_t *fdc = space.machine().device("upd765");
326   upd765_dack_w(fdc,space, 0, data);
327327}
trunk/src/mess/machine/poly88.c
r17963r17964
258258
259259SNAPSHOT_LOAD( poly88 )
260260{
261   address_space *space = image.device().machine().device("maincpu")->memory().space(AS_PROGRAM);
261   address_space &space = *image.device().machine().device("maincpu")->memory().space(AS_PROGRAM);
262262   UINT8* data= auto_alloc_array(image.device().machine(), UINT8, snapshot_size);
263263   UINT16 recordNum;
264264   UINT16 recordLen;
r17963r17964
290290      switch(recordType) {
291291         case 0 :
292292               /* 00 Absolute */
293               memcpy(space->get_read_ptr(address ), data + pos ,recordLen);
293               memcpy(space.get_read_ptr(address ), data + pos ,recordLen);
294294               break;
295295         case 1 :
296296               /* 01 Comment */
trunk/src/mess/machine/samcoupe.c
r17963r17964
2222    MEMORY BANKING
2323***************************************************************************/
2424
25static void samcoupe_update_bank(address_space *space, int bank_num, UINT8 *memory, int is_readonly)
25static void samcoupe_update_bank(address_space &space, int bank_num, UINT8 *memory, int is_readonly)
2626{
2727   char bank[10];
2828   sprintf(bank,"bank%d",bank_num);
29   samcoupe_state *state = space->machine().driver_data<samcoupe_state>();
29   samcoupe_state *state = space.machine().driver_data<samcoupe_state>();
3030   if (memory)
3131   {
3232      state->membank(bank)->set_base(memory);
33      space->install_read_bank (((bank_num-1) * 0x4000), ((bank_num-1) * 0x4000) + 0x3FFF, bank);
33      space.install_read_bank (((bank_num-1) * 0x4000), ((bank_num-1) * 0x4000) + 0x3FFF, bank);
3434      if (is_readonly) {
35         space->unmap_write(((bank_num-1) * 0x4000), ((bank_num-1) * 0x4000) + 0x3FFF);
35         space.unmap_write(((bank_num-1) * 0x4000), ((bank_num-1) * 0x4000) + 0x3FFF);
3636      } else {
37         space->install_write_bank(((bank_num-1) * 0x4000), ((bank_num-1) * 0x4000) + 0x3FFF, bank);
37         space.install_write_bank(((bank_num-1) * 0x4000), ((bank_num-1) * 0x4000) + 0x3FFF, bank);
3838      }
3939   } else {
40      space->nop_readwrite(((bank_num-1) * 0x4000), ((bank_num-1) * 0x4000) + 0x3FFF);
40      space.nop_readwrite(((bank_num-1) * 0x4000), ((bank_num-1) * 0x4000) + 0x3FFF);
4141   }
4242}
4343
4444
45static void samcoupe_install_ext_mem(address_space *space)
45static void samcoupe_install_ext_mem(address_space &space)
4646{
47   samcoupe_state *state = space->machine().driver_data<samcoupe_state>();
47   samcoupe_state *state = space.machine().driver_data<samcoupe_state>();
4848   UINT8 *mem;
4949
5050   /* bank 3 */
51   if (state->m_lext >> 6 < space->machine().device<ram_device>(RAM_TAG)->size() >> 20)
52      mem = &space->machine().device<ram_device>(RAM_TAG)->pointer()[(space->machine().device<ram_device>(RAM_TAG)->size() & 0xfffff) + (state->m_lext >> 6) * 0x100000 + (state->m_lext & 0x3f) * 0x4000];
51   if (state->m_lext >> 6 < space.machine().device<ram_device>(RAM_TAG)->size() >> 20)
52      mem = &space.machine().device<ram_device>(RAM_TAG)->pointer()[(space.machine().device<ram_device>(RAM_TAG)->size() & 0xfffff) + (state->m_lext >> 6) * 0x100000 + (state->m_lext & 0x3f) * 0x4000];
5353   else
5454      mem = NULL;
5555
5656   samcoupe_update_bank(space, 3, mem, FALSE);
5757
5858   /* bank 4 */
59   if (state->m_hext >> 6 < space->machine().device<ram_device>(RAM_TAG)->size() >> 20)
60      mem = &space->machine().device<ram_device>(RAM_TAG)->pointer()[(space->machine().device<ram_device>(RAM_TAG)->size() & 0xfffff) + (state->m_hext >> 6) * 0x100000 + (state->m_hext & 0x3f) * 0x4000];
59   if (state->m_hext >> 6 < space.machine().device<ram_device>(RAM_TAG)->size() >> 20)
60      mem = &space.machine().device<ram_device>(RAM_TAG)->pointer()[(space.machine().device<ram_device>(RAM_TAG)->size() & 0xfffff) + (state->m_hext >> 6) * 0x100000 + (state->m_hext & 0x3f) * 0x4000];
6161   else
6262      mem = NULL;
6363
r17963r17964
6565}
6666
6767
68void samcoupe_update_memory(address_space *space)
68void samcoupe_update_memory(address_space &space)
6969{
70   samcoupe_state *state = space->machine().driver_data<samcoupe_state>();
71   const int PAGE_MASK = ((space->machine().device<ram_device>(RAM_TAG)->size() & 0xfffff) / 0x4000) - 1;
70   samcoupe_state *state = space.machine().driver_data<samcoupe_state>();
71   const int PAGE_MASK = ((space.machine().device<ram_device>(RAM_TAG)->size() & 0xfffff) / 0x4000) - 1;
7272   UINT8 *rom = state->memregion("maincpu")->base();
7373   UINT8 *memory;
7474   int is_readonly;
r17963r17964
7777    if (state->m_lmpr & LMPR_RAM0)   /* Is ram paged in at bank 1 */
7878   {
7979      if ((state->m_lmpr & 0x1F) <= PAGE_MASK)
80         memory = &space->machine().device<ram_device>(RAM_TAG)->pointer()[(state->m_lmpr & PAGE_MASK) * 0x4000];
80         memory = &space.machine().device<ram_device>(RAM_TAG)->pointer()[(state->m_lmpr & PAGE_MASK) * 0x4000];
8181      else
8282         memory = NULL;   /* Attempt to page in non existant ram region */
8383      is_readonly = FALSE;
r17963r17964
9292
9393   /* BANK2 */
9494   if (((state->m_lmpr + 1) & 0x1f) <= PAGE_MASK)
95      memory = &space->machine().device<ram_device>(RAM_TAG)->pointer()[((state->m_lmpr + 1) & PAGE_MASK) * 0x4000];
95      memory = &space.machine().device<ram_device>(RAM_TAG)->pointer()[((state->m_lmpr + 1) & PAGE_MASK) * 0x4000];
9696   else
9797      memory = NULL;   /* Attempt to page in non existant ram region */
9898   samcoupe_update_bank(space, 2, memory, FALSE);
r17963r17964
106106   {
107107      /* BANK3 */
108108      if ((state->m_hmpr & 0x1F) <= PAGE_MASK )
109         memory = &space->machine().device<ram_device>(RAM_TAG)->pointer()[(state->m_hmpr & PAGE_MASK)*0x4000];
109         memory = &space.machine().device<ram_device>(RAM_TAG)->pointer()[(state->m_hmpr & PAGE_MASK)*0x4000];
110110      else
111111         memory = NULL;   /* Attempt to page in non existant ram region */
112112      samcoupe_update_bank(space, 3, memory, FALSE);
r17963r17964
121121      else
122122      {
123123         if (((state->m_hmpr + 1) & 0x1f) <= PAGE_MASK)
124            memory = &space->machine().device<ram_device>(RAM_TAG)->pointer()[((state->m_hmpr + 1) & PAGE_MASK) * 0x4000];
124            memory = &space.machine().device<ram_device>(RAM_TAG)->pointer()[((state->m_hmpr + 1) & PAGE_MASK) * 0x4000];
125125         else
126126            memory = NULL;   /* Attempt to page in non existant ram region */
127127         is_readonly = FALSE;
r17963r17964
131131
132132   /* video memory location */
133133   if (state->m_vmpr & 0x40)   /* if bit set in 2 bank screen mode */
134      state->m_videoram = &space->machine().device<ram_device>(RAM_TAG)->pointer()[((state->m_vmpr & 0x1e) & PAGE_MASK) * 0x4000];
134      state->m_videoram = &space.machine().device<ram_device>(RAM_TAG)->pointer()[((state->m_vmpr & 0x1e) & PAGE_MASK) * 0x4000];
135135   else
136      state->m_videoram = &space->machine().device<ram_device>(RAM_TAG)->pointer()[((state->m_vmpr & 0x1f) & PAGE_MASK) * 0x4000];
136      state->m_videoram = &space.machine().device<ram_device>(RAM_TAG)->pointer()[((state->m_vmpr & 0x1f) & PAGE_MASK) * 0x4000];
137137}
138138
139139
140140WRITE8_MEMBER(samcoupe_state::samcoupe_ext_mem_w)
141141{
142   address_space *space_program = machine().device("maincpu")->memory().space(AS_PROGRAM);
142   address_space &space_program = *machine().device("maincpu")->memory().space(AS_PROGRAM);
143143
144144   if (offset & 1)
145145      m_hext = data;
r17963r17964
160160
161161static READ8_DEVICE_HANDLER( samcoupe_rtc_r )
162162{
163   address_space *spaceio = device->machine().device("maincpu")->memory().space(AS_IO);
163   address_space &spaceio = *device->machine().device("maincpu")->memory().space(AS_IO);
164164   msm6242_device *rtc = dynamic_cast<msm6242_device*>(device);
165   return rtc->read(*spaceio,offset >> 12);
165   return rtc->read(spaceio,offset >> 12);
166166}
167167
168168
169169static WRITE8_DEVICE_HANDLER( samcoupe_rtc_w )
170170{
171   address_space *spaceio = device->machine().device("maincpu")->memory().space(AS_IO);
171   address_space &spaceio = *device->machine().device("maincpu")->memory().space(AS_IO);
172172   msm6242_device *rtc = dynamic_cast<msm6242_device*>(device);
173   rtc->write(*spaceio,offset >> 12, data);
173   rtc->write(spaceio,offset >> 12, data);
174174}
175175
176176
r17963r17964
244244
245245void samcoupe_state::machine_reset()
246246{
247   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
248   address_space *spaceio = machine().device("maincpu")->memory().space(AS_IO);
247   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
248   address_space &spaceio = *machine().device("maincpu")->memory().space(AS_IO);
249249
250250   /* initialize state */
251251   m_lmpr = 0x0f;      /* ROM0 paged in, ROM1 paged out RAM Banks */
r17963r17964
263263   {
264264      /* install RTC */
265265      device_t *rtc = machine().device("sambus_clock");
266      spaceio->install_legacy_readwrite_handler(*rtc, 0xef, 0xef, 0xffff, 0xff00, FUNC(samcoupe_rtc_r), FUNC(samcoupe_rtc_w));
266      spaceio.install_legacy_readwrite_handler(*rtc, 0xef, 0xef, 0xffff, 0xff00, FUNC(samcoupe_rtc_r), FUNC(samcoupe_rtc_w));
267267   }
268268   else
269269   {
270270      /* no RTC support */
271      spaceio->unmap_readwrite(0xef, 0xef, 0xffff, 0xff00);
271      spaceio.unmap_readwrite(0xef, 0xef, 0xffff, 0xff00);
272272   }
273273
274274   /* initialize memory */
trunk/src/mess/machine/trs80.c
r17963r17964
892892
893893MACHINE_RESET_MEMBER(trs80_state,lnw80)
894894{
895   address_space *space = m_maincpu->space(AS_PROGRAM);
895   address_space &space = *m_maincpu->space(AS_PROGRAM);
896896   m_cassette_data = 0;
897897   m_reg_load = 1;
898   lnw80_fe_w(*space, 0, 0);
898   lnw80_fe_w(space, 0, 0);
899899}
900900
trunk/src/mess/machine/primo.c
r17963r17964
4747static void primo_update_memory(running_machine &machine)
4848{
4949   primo_state *state = machine.driver_data<primo_state>();
50   address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
50   address_space& space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
5151   switch (state->m_port_FD & 0x03)
5252   {
5353      case 0x00:   /* Original ROM */
54         space->unmap_write(0x0000, 0x3fff);
54         space.unmap_write(0x0000, 0x3fff);
5555         state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base()+0x10000);
5656         break;
5757      case 0x01:   /* EPROM extension 1 */
58         space->unmap_write(0x0000, 0x3fff);
58         space.unmap_write(0x0000, 0x3fff);
5959         state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base()+0x14000);
6060         break;
6161      case 0x02:   /* RAM */
62         space->install_write_bank(0x0000, 0x3fff, "bank1");
62         space.install_write_bank(0x0000, 0x3fff, "bank1");
6363         state->membank("bank1")->set_base(machine.root_device().memregion("maincpu")->base());
6464         break;
6565      case 0x03:   /* EPROM extension 2 */
66         space->unmap_write(0x0000, 0x3fff);
66         space.unmap_write(0x0000, 0x3fff);
6767         state->membank("bank1")->set_base(state->memregion("maincpu")->base()+0x18000);
6868         break;
6969   }
trunk/src/mess/machine/x68k_neptunex.c
r17963r17964
4747   device_t* cpu = machine().device("maincpu");
4848   char mac[7];
4949   UINT32 num = rand();
50   address_space* space = cpu->memory().space(AS_PROGRAM);
50   address_space& space = *cpu->memory().space(AS_PROGRAM);
5151   m_slot = dynamic_cast<x68k_expansion_slot_device *>(owner());
5252   memset(m_prom, 0x57, 16);
5353   sprintf(mac+2, "\x1b%c%c%c", (num >> 16) & 0xff, (num >> 8) & 0xff, num & 0xff);
5454   mac[0] = 0; mac[1] = 0;  // avoid gcc warning
5555   memcpy(m_prom, mac, 6);
5656   m_dp8390->set_mac(mac);
57   space->install_readwrite_handler(0xece000,0xece3ff,read16_delegate(FUNC(x68k_neptune_device::x68k_neptune_port_r),this),write16_delegate(FUNC(x68k_neptune_device::x68k_neptune_port_w),this),0xffffffff);
57   space.install_readwrite_handler(0xece000,0xece3ff,read16_delegate(FUNC(x68k_neptune_device::x68k_neptune_port_r),this),write16_delegate(FUNC(x68k_neptune_device::x68k_neptune_port_w),this),0xffffffff);
5858}
5959
6060void x68k_neptune_device::device_reset() {
trunk/src/mess/machine/amstr_pc.c
r17963r17964
153153      pc1640.port61=data;
154154      if (data==0x30) pc1640.port62=(pc1640.port65&0x10)>>4;
155155      else if (data==0x34) pc1640.port62=pc1640.port65&0xf;
156      pit8253_gate2_w(space->machine().device("pit8253"), BIT(data, 0));
157      pc_speaker_set_spkrdata( space->machine(), data & 0x02 );
156      pit8253_gate2_w(space.machine().device("pit8253"), BIT(data, 0));
157      pc_speaker_set_spkrdata( space.machine(), data & 0x02 );
158158      pc_keyb_set_clock(data&0x40);
159159      break;
160160   case 4:
r17963r17964
191191
192192   case 2:
193193      data = pc1640.port62;
194      if (pit8253_get_output(space->machine().device("pit8253"), 2))
194      if (pit8253_get_output(space.machine().device("pit8253"), 2))
195195         data |= 0x20;
196196      break;
197197   }
r17963r17964
200200
201201READ8_HANDLER( pc200_port378_r )
202202{
203   device_t *lpt = space->machine().device("lpt_1");
204   UINT8 data = pc_lpt_r(lpt, *space, offset);
203   device_t *lpt = space.machine().device("lpt_1");
204   UINT8 data = pc_lpt_r(lpt, space, offset);
205205
206206   if (offset == 1)
207      data = (data & ~7) | (space->machine().root_device().ioport("DSW0")->read() & 7);
207      data = (data & ~7) | (space.machine().root_device().ioport("DSW0")->read() & 7);
208208   if (offset == 2)
209      data = (data & ~0xe0) | (space->machine().root_device().ioport("DSW0")->read() & 0xc0);
209      data = (data & ~0xe0) | (space.machine().root_device().ioport("DSW0")->read() & 0xc0);
210210
211211   return data;
212212}
213213
214214READ8_HANDLER( pc200_port278_r )
215215{
216   device_t *lpt = space->machine().device("lpt_2");
217   UINT8 data = pc_lpt_r(lpt, *space, offset);
216   device_t *lpt = space.machine().device("lpt_2");
217   UINT8 data = pc_lpt_r(lpt, space, offset);
218218
219219   if (offset == 1)
220      data = (data & ~7) | (space->machine().root_device().ioport("DSW0")->read() & 7);
220      data = (data & ~7) | (space.machine().root_device().ioport("DSW0")->read() & 7);
221221   if (offset == 2)
222      data = (data & ~0xe0) | (space->machine().root_device().ioport("DSW0")->read() & 0xc0);
222      data = (data & ~0xe0) | (space.machine().root_device().ioport("DSW0")->read() & 0xc0);
223223
224224   return data;
225225}
r17963r17964
227227
228228READ8_HANDLER( pc1640_port378_r )
229229{
230    device_t *lpt = space->machine().device("lpt_1");
231    UINT8 data = pc_lpt_r(lpt, *space, offset);
230    device_t *lpt = space.machine().device("lpt_1");
231    UINT8 data = pc_lpt_r(lpt, space, offset);
232232
233233   if (offset == 1)
234      data=(data & ~7) | (space->machine().root_device().ioport("DSW0")->read() & 7);
234      data=(data & ~7) | (space.machine().root_device().ioport("DSW0")->read() & 7);
235235   if (offset == 2)
236236   {
237237      switch (pc1640.dipstate)
238238      {
239239      case 0:
240         data = (data&~0xe0) | (space->machine().root_device().ioport("DSW0")->read() & 0xe0);
240         data = (data&~0xe0) | (space.machine().root_device().ioport("DSW0")->read() & 0xe0);
241241         break;
242242      case 1:
243         data = (data&~0xe0) | ((space->machine().root_device().ioport("DSW0")->read() & 0xe000)>>8);
243         data = (data&~0xe0) | ((space.machine().root_device().ioport("DSW0")->read() & 0xe000)>>8);
244244         break;
245245      case 2:
246         data = (data&~0xe0) | ((space->machine().root_device().ioport("DSW0")->read() & 0xe00)>>4);
246         data = (data&~0xe0) | ((space.machine().root_device().ioport("DSW0")->read() & 0xe00)>>4);
247247         break;
248248
249249      }
r17963r17964
254254READ8_HANDLER( pc1640_port3d0_r )
255255{
256256   if (offset==0xa) pc1640.dipstate=0;
257   return space->read_byte(0x3d0+offset);
257   return space.read_byte(0x3d0+offset);
258258}
259259
260260READ8_HANDLER( pc1640_port4278_r )
r17963r17964
273273
274274READ8_HANDLER( pc1640_mouse_x_r )
275275{
276   return pc1640.mouse.x - space->machine().root_device().ioport("pc_mouse_x")->read();
276   return pc1640.mouse.x - space.machine().root_device().ioport("pc_mouse_x")->read();
277277}
278278
279279READ8_HANDLER( pc1640_mouse_y_r )
280280{
281   return pc1640.mouse.y - space->machine().root_device().ioport("pc_mouse_y")->read();
281   return pc1640.mouse.y - space.machine().root_device().ioport("pc_mouse_y")->read();
282282}
283283
284284WRITE8_HANDLER( pc1640_mouse_x_w )
285285{
286   pc1640.mouse.x = data + space->machine().root_device().ioport("pc_mouse_x")->read();
286   pc1640.mouse.x = data + space.machine().root_device().ioport("pc_mouse_x")->read();
287287}
288288
289289WRITE8_HANDLER( pc1640_mouse_y_w )
290290{
291   pc1640.mouse.y = data + space->machine().root_device().ioport("pc_mouse_y")->read();
291   pc1640.mouse.y = data + space.machine().root_device().ioport("pc_mouse_y")->read();
292292}
293293
294294INPUT_PORTS_START( amstrad_keyboard )
trunk/src/mess/machine/wswan.c
r17963r17964
223223
224224void wswan_state::machine_reset()
225225{
226   address_space *space = machine().device( "maincpu")->memory().space( AS_PROGRAM );
226   address_space &space = *machine().device( "maincpu")->memory().space( AS_PROGRAM );
227227
228228   /* Intialize ports */
229229   memcpy( m_ws_portram, ws_portram_init, 256 );
r17963r17964
231231   /* Initialize VDP */
232232   memset( &m_vdp, 0, sizeof( m_vdp ) );
233233
234   m_vdp.vram = (UINT8*)space->get_read_ptr(0);
235   m_vdp.palette_vram = (UINT8*)space->get_read_ptr(( m_system_type == TYPE_WSC ) ? 0xFE00 : 0 );
234   m_vdp.vram = (UINT8*)space.get_read_ptr(0);
235   m_vdp.palette_vram = (UINT8*)space.get_read_ptr(( m_system_type == TYPE_WSC ) ? 0xFE00 : 0 );
236236   m_vdp.current_line = 145;  /* Randomly chosen, beginning of VBlank period to give cart some time to boot up */
237237   m_vdp.color_mode = 0;
238238   m_vdp.colors_16 = 0;
r17963r17964
14591459   /* Handle Sound DMA */
14601460   if ( ( state->m_sound_dma.enable & 0x88 ) == 0x80 )
14611461   {
1462      address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM );
1462      address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM );
14631463      /* TODO: Output sound DMA byte */
1464      state->wswan_port_w( *space, 0x89, space->read_byte(state->m_sound_dma.source ) );
1464      state->wswan_port_w( space, 0x89, space.read_byte(state->m_sound_dma.source ) );
14651465      state->m_sound_dma.size--;
14661466      state->m_sound_dma.source = ( state->m_sound_dma.source + 1 ) & 0x0FFFFF;
14671467      if ( state->m_sound_dma.size == 0 )
trunk/src/mess/machine/z80ne.c
r17963r17964
184184 */
185185DIRECT_UPDATE_MEMBER(z80ne_state::z80ne_reset_delay_count)
186186{
187   address_space *space = machine().device("z80ne")->memory().space(AS_PROGRAM);
187   address_space &space = *machine().device("z80ne")->memory().space(AS_PROGRAM);
188188   /*
189189     * TODO: when debugger is active, his memory access causes this callback
190190     *
191191     */
192   if(!space->debugger_access())
192   if(!space.debugger_access())
193193      m_reset_delay_counter--;
194194
195195   if (!m_reset_delay_counter)
r17963r17964
213213static void reset_lx382_banking(running_machine &machine)
214214{
215215   z80ne_state *state = machine.driver_data<z80ne_state>();
216   address_space *space = machine.device("z80ne")->memory().space(AS_PROGRAM);
216   address_space &space = *machine.device("z80ne")->memory().space(AS_PROGRAM);
217217
218218   /* switch to ROM bank at address 0x0000 */
219219    state->membank("bank1")->set_entry(1);
r17963r17964
221221
222222   /* after the first 3 bytes have been read from ROM, switch the RAM back in */
223223   state->m_reset_delay_counter = 2;
224   space->set_direct_update_handler(direct_update_delegate(FUNC(z80ne_state::z80ne_reset_delay_count), state));
224   space.set_direct_update_handler(direct_update_delegate(FUNC(z80ne_state::z80ne_reset_delay_count), state));
225225}
226226
227227static void reset_lx390_banking(running_machine &machine)
228228{
229229   z80ne_state *state = machine.driver_data<z80ne_state>();
230   address_space *space = machine.device("z80ne")->memory().space(AS_PROGRAM);
230   address_space &space = *machine.device("z80ne")->memory().space(AS_PROGRAM);
231231   state->m_reset_delay_counter = 0;
232232
233233   switch (machine.root_device().ioport("CONFIG")->read() & 0x07) {
r17963r17964
240240       state->membank("bank4")->set_entry(0);  /* RAM   at 0xF000 */
241241      /* after the first 3 bytes have been read from ROM, switch the RAM back in */
242242      state->m_reset_delay_counter = 2;
243      space->set_direct_update_handler(direct_update_delegate(FUNC(z80ne_state::z80ne_reset_delay_count), state));
243      space.set_direct_update_handler(direct_update_delegate(FUNC(z80ne_state::z80ne_reset_delay_count), state));
244244       break;
245245   case 0x02: /* EP548  16k BASIC */
246246      if (VERBOSE)
r17963r17964
288288MACHINE_RESET_MEMBER(z80ne_state,z80ne_base)
289289{
290290   int i;
291   address_space *space = machine().device("z80ne")->memory().space(AS_PROGRAM);
291   address_space &space = *machine().device("z80ne")->memory().space(AS_PROGRAM);
292292
293293   LOG(("In MACHINE_RESET z80ne_base\n"));
294294
r17963r17964
336336   ay31015_set_transmitter_clock( m_ay31015, m_cass_data.speed * 16.0);
337337
338338   m_nmi_delay_counter = 0;
339   lx385_ctrl_w(*space, 0, 0);
339   lx385_ctrl_w(space, 0, 0);
340340
341341}
342342
trunk/src/mess/machine/apple2gs.c
r17963r17964
801801
802802static READ8_HANDLER( gssnd_r )
803803{
804   apple2gs_state *state = space->machine().driver_data<apple2gs_state>();
804   apple2gs_state *state = space.machine().driver_data<apple2gs_state>();
805805   UINT8 ret = 0;
806806
807807   switch (offset)
r17963r17964
819819         }
820820         else
821821         {
822            state->m_sndglu_dummy_read = state->m_es5503->read(*space, state->m_sndglu_addr);
822            state->m_sndglu_dummy_read = state->m_es5503->read(space, state->m_sndglu_addr);
823823         }
824824
825825         if (state->m_sndglu_ctrl & 0x20)   // auto-increment
r17963r17964
842842
843843static WRITE8_HANDLER( gssnd_w )
844844{
845   apple2gs_state *state = space->machine().driver_data<apple2gs_state>();
845   apple2gs_state *state = space.machine().driver_data<apple2gs_state>();
846846   switch (offset)
847847   {
848848      case 0:   // control
r17963r17964
855855      case 1:   // data write
856856         if (state->m_sndglu_ctrl & 0x40)   // docram access
857857         {
858            UINT8 *docram = space->machine().root_device().memregion("es5503")->base();
858            UINT8 *docram = space.machine().root_device().memregion("es5503")->base();
859859            docram[state->m_sndglu_addr] = data;
860860         }
861861         else
862862         {
863            state->m_es5503->write(*space, state->m_sndglu_addr, data);
863            state->m_es5503->write(space, state->m_sndglu_addr, data);
864864         }
865865
866866         if (state->m_sndglu_ctrl & 0x20)   // auto-increment
r17963r17964
10131013      case 0x3D:   /* C03D - SOUNDDATA */
10141014      case 0x3E:   /* C03E - SOUNDADRL */
10151015      case 0x3F:   /* C03F - SOUNDADRH */
1016         result = gssnd_r(&space, offset & 0x03);
1016         result = gssnd_r(space, offset & 0x03);
10171017         break;
10181018
10191019      case 0x41:   /* C041 - INTEN */
r17963r17964
11741174      case 0x3D:   /* C03D - SOUNDDATA */
11751175      case 0x3E:   /* C03E - SOUNDADRL */
11761176      case 0x3F:   /* C03F - SOUNDADRH */
1177         gssnd_w(&space, offset & 0x03, data);
1177         gssnd_w(space, offset & 0x03, data);
11781178         break;
11791179
11801180      case 0x41:   /* C041 - INTEN */
r17963r17964
17471747
17481748
17491749
1750static READ8_HANDLER( apple2gs_00Cxxx_r ) { return apple2gs_xxCxxx_r(*space, space->machine(), offset | 0x00C000); }
1751static READ8_HANDLER( apple2gs_01Cxxx_r ) { return apple2gs_xxCxxx_r(*space, space->machine(), offset | 0x01C000); }
1752static READ8_HANDLER( apple2gs_E0Cxxx_r ) { return apple2gs_xxCxxx_r(*space, space->machine(), offset | 0xE0C000); }
1753static READ8_HANDLER( apple2gs_E1Cxxx_r ) { return apple2gs_xxCxxx_r(*space, space->machine(), offset | 0xE1C000); }
1750static READ8_HANDLER( apple2gs_00Cxxx_r ) { return apple2gs_xxCxxx_r(space, space.machine(), offset | 0x00C000); }
1751static READ8_HANDLER( apple2gs_01Cxxx_r ) { return apple2gs_xxCxxx_r(space, space.machine(), offset | 0x01C000); }
1752static READ8_HANDLER( apple2gs_E0Cxxx_r ) { return apple2gs_xxCxxx_r(space, space.machine(), offset | 0xE0C000); }
1753static READ8_HANDLER( apple2gs_E1Cxxx_r ) { return apple2gs_xxCxxx_r(space, space.machine(), offset | 0xE1C000); }
17541754
1755static WRITE8_HANDLER( apple2gs_00Cxxx_w ) { apple2gs_xxCxxx_w(*space, space->machine(), offset | 0x00C000, data); }
1756static WRITE8_HANDLER( apple2gs_01Cxxx_w ) { apple2gs_xxCxxx_w(*space, space->machine(), offset | 0x01C000, data); }
1757static WRITE8_HANDLER( apple2gs_E0Cxxx_w ) { apple2gs_xxCxxx_w(*space, space->machine(), offset | 0xE0C000, data); }
1758static WRITE8_HANDLER( apple2gs_E1Cxxx_w ) { apple2gs_xxCxxx_w(*space, space->machine(), offset | 0xE1C000, data); }
1755static WRITE8_HANDLER( apple2gs_00Cxxx_w ) { apple2gs_xxCxxx_w(space, space.machine(), offset | 0x00C000, data); }
1756static WRITE8_HANDLER( apple2gs_01Cxxx_w ) { apple2gs_xxCxxx_w(space, space.machine(), offset | 0x01C000, data); }
1757static WRITE8_HANDLER( apple2gs_E0Cxxx_w ) { apple2gs_xxCxxx_w(space, space.machine(), offset | 0xE0C000, data); }
1758static WRITE8_HANDLER( apple2gs_E1Cxxx_w ) { apple2gs_xxCxxx_w(space, space.machine(), offset | 0xE1C000, data); }
17591759
17601760static WRITE8_HANDLER( apple2gs_Exxxxx_w )
17611761{
1762   apple2gs_state *state = space->machine().driver_data<apple2gs_state>();
1762   apple2gs_state *state = space.machine().driver_data<apple2gs_state>();
17631763   state->m_slowmem[offset] = data;
17641764}
17651765
r17963r17964
17701770
17711771static WRITE8_HANDLER( apple2gs_slowmem_w )
17721772{
1773   apple2gs_state *state = space->machine().driver_data<apple2gs_state>();
1773   apple2gs_state *state = space.machine().driver_data<apple2gs_state>();
17741774   state->m_slowmem[offset] = data;
17751775
17761776   if ((offset >= 0x19e00) && (offset < 0x19fff))
17771777   {
17781778      int color = (offset - 0x19e00) >> 1;
17791779
1780      palette_set_color_rgb(space->machine(), color + 16,
1780      palette_set_color_rgb(space.machine(), color + 16,
17811781         ((state->m_slowmem[0x19E00 + (color * 2) + 1] >> 0) & 0x0F) * 17,
17821782         ((state->m_slowmem[0x19E00 + (color * 2) + 0] >> 4) & 0x0F) * 17,
17831783         ((state->m_slowmem[0x19E00 + (color * 2) + 0] >> 0) & 0x0F) * 17);
r17963r17964
17881788// which doesn't drive the bus results in reading back the bank number.
17891789static READ8_HANDLER(apple2gs_bank_echo_r)
17901790{
1791   apple2gs_state *state = space->machine().driver_data<apple2gs_state>();
1791   apple2gs_state *state = space.machine().driver_data<apple2gs_state>();
17921792
17931793   return state->m_echo_bank + (offset>>16);
17941794}
r17963r17964
17961796static void apple2gs_setup_memory(running_machine &machine)
17971797{
17981798   apple2gs_state *state = machine.driver_data<apple2gs_state>();
1799   address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1799   address_space& space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
18001800   offs_t begin, end;
18011801   apple2_memmap_config cfg;
18021802
r17963r17964
18121812      int ramsize = machine.device<ram_device>(RAM_TAG)->size();
18131813
18141814      // ROM 03 hardware: the quoted "1 MB" for a base machine doesn't include banks e0/e1, so map accordingly
1815      space->install_readwrite_bank(0x010000, ramsize - 1, "bank1");
1815      space.install_readwrite_bank(0x010000, ramsize - 1, "bank1");
18161816      state->membank("bank1")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0x010000);
18171817
1818      space->install_legacy_read_handler( ramsize, 0xdfffff, FUNC(apple2gs_bank_echo_r));
1818      space.install_legacy_read_handler( ramsize, 0xdfffff, FUNC(apple2gs_bank_echo_r));
18191819      state->m_echo_bank = (ramsize >> 16);
18201820   }
18211821   else
r17963r17964
18231823      int ramsize = machine.device<ram_device>(RAM_TAG)->size()-0x30000;
18241824
18251825      // ROM 00/01 hardware: the quoted "256K" for a base machine *does* include banks e0/e1.
1826      space->install_readwrite_bank(0x010000, ramsize - 1 + 0x10000, "bank1");
1826      space.install_readwrite_bank(0x010000, ramsize - 1 + 0x10000, "bank1");
18271827      state->membank("bank1")->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + 0x010000);
18281828
1829      space->install_legacy_read_handler( ramsize + 0x10000, 0xdfffff, FUNC(apple2gs_bank_echo_r));
1829      space.install_legacy_read_handler( ramsize + 0x10000, 0xdfffff, FUNC(apple2gs_bank_echo_r));
18301830      state->m_echo_bank = (ramsize+0x10000) >> 16;
18311831   }
18321832
18331833   /* install hi memory */
1834   space->install_read_bank(0xe00000, 0xe1ffff, "bank2");
1835   space->install_legacy_write_handler(0xe00000, 0xe1ffff, FUNC(apple2gs_slowmem_w));
1836   space->install_legacy_write_handler(0xe00400, 0xe007ff, FUNC(apple2gs_E004xx_w));
1837   space->install_legacy_write_handler(0xe02000, 0xe03fff, FUNC(apple2gs_E02xxx_w));
1838   space->install_legacy_write_handler(0xe10400, 0xe107ff, FUNC(apple2gs_E104xx_w));
1839   space->install_legacy_write_handler(0xe12000, 0xe13fff, FUNC(apple2gs_E12xxx_w));
1834   space.install_read_bank(0xe00000, 0xe1ffff, "bank2");
1835   space.install_legacy_write_handler(0xe00000, 0xe1ffff, FUNC(apple2gs_slowmem_w));
1836   space.install_legacy_write_handler(0xe00400, 0xe007ff, FUNC(apple2gs_E004xx_w));
1837   space.install_legacy_write_handler(0xe02000, 0xe03fff, FUNC(apple2gs_E02xxx_w));
1838   space.install_legacy_write_handler(0xe10400, 0xe107ff, FUNC(apple2gs_E104xx_w));
1839   space.install_legacy_write_handler(0xe12000, 0xe13fff, FUNC(apple2gs_E12xxx_w));
18401840   state->membank("bank2")->set_base(state->m_slowmem);
18411841
18421842   /* install alternate ROM bank */
18431843   begin = 0x1000000 - machine.root_device().memregion("maincpu")->bytes();
18441844   end = 0xffffff;
1845   space->install_read_bank(begin, end, "bank3");
1845   space.install_read_bank(begin, end, "bank3");
18461846   state->membank("bank3")->set_base(machine.root_device().memregion("maincpu")->base());
18471847
18481848   /* install new xxC000-xxCFFF handlers */
1849   space->install_legacy_read_handler(0x00c000, 0x00cfff, FUNC(apple2gs_00Cxxx_r));
1850   space->install_legacy_write_handler(0x00c000, 0x00cfff, FUNC(apple2gs_00Cxxx_w));
1851   space->install_legacy_read_handler(0x01c000, 0x01cfff, FUNC(apple2gs_01Cxxx_r));
1852   space->install_legacy_write_handler(0x01c000, 0x01cfff, FUNC(apple2gs_01Cxxx_w));
1853   space->install_legacy_read_handler(0xe0c000, 0xe0cfff, FUNC(apple2gs_E0Cxxx_r));
1854   space->install_legacy_write_handler(0xe0c000, 0xe0cfff, FUNC(apple2gs_E0Cxxx_w));
1855   space->install_legacy_read_handler(0xe1c000, 0xe1cfff, FUNC(apple2gs_E1Cxxx_r));
1856   space->install_legacy_write_handler(0xe1c000, 0xe1cfff, FUNC(apple2gs_E1Cxxx_w));
1857   space->set_direct_update_handler(direct_update_delegate(FUNC(apple2gs_state::apple2gs_opbase), state));
1849   space.install_legacy_read_handler(0x00c000, 0x00cfff, FUNC(apple2gs_00Cxxx_r));
1850   space.install_legacy_write_handler(0x00c000, 0x00cfff, FUNC(apple2gs_00Cxxx_w));
1851   space.install_legacy_read_handler(0x01c000, 0x01cfff, FUNC(apple2gs_01Cxxx_r));
1852   space.install_legacy_write_handler(0x01c000, 0x01cfff, FUNC(apple2gs_01Cxxx_w));
1853   space.install_legacy_read_handler(0xe0c000, 0xe0cfff, FUNC(apple2gs_E0Cxxx_r));
1854   space.install_legacy_write_handler(0xe0c000, 0xe0cfff, FUNC(apple2gs_E0Cxxx_w));
1855   space.install_legacy_read_handler(0xe1c000, 0xe1cfff, FUNC(apple2gs_E1Cxxx_r));
1856   space.install_legacy_write_handler(0xe1c000, 0xe1cfff, FUNC(apple2gs_E1Cxxx_w));
1857   space.set_direct_update_handler(direct_update_delegate(FUNC(apple2gs_state::apple2gs_opbase), state));
18581858
18591859
18601860   /* install aux memory writes (for shadowing) */
1861   space->install_write_handler(0x010400, 0x0107FF, write8_delegate(FUNC(apple2gs_state::apple2gs_aux0400_w), state));
1862   space->install_write_handler(0x012000, 0x013FFF, write8_delegate(FUNC(apple2gs_state::apple2gs_aux2000_w), state));
1863   space->install_write_handler(0x014000, 0x019FFF, write8_delegate(FUNC(apple2gs_state::apple2gs_aux4000_w), state));
1861   space.install_write_handler(0x010400, 0x0107FF, write8_delegate(FUNC(apple2gs_state::apple2gs_aux0400_w), state));
1862   space.install_write_handler(0x012000, 0x013FFF, write8_delegate(FUNC(apple2gs_state::apple2gs_aux2000_w), state));
1863   space.install_write_handler(0x014000, 0x019FFF, write8_delegate(FUNC(apple2gs_state::apple2gs_aux4000_w), state));
18641864
18651865   /* setup the Apple II memory system */
18661866   memset(&cfg, 0, sizeof(cfg));
r17963r17964
18791879
18801880static READ8_HANDLER( apple2gs_read_vector )
18811881{
1882   return space->read_byte(offset | 0xFF0000);
1882   return space.read_byte(offset | 0xFF0000);
18831883}
18841884
18851885MACHINE_RESET_MEMBER(apple2gs_state,apple2gs)
trunk/src/mess/machine/mpc105.c
r17963r17964
9494
9595   if (m_bank_base > 0)
9696   {
97      address_space *space = m_maincpu->space(AS_PROGRAM);
97      address_space &space = *m_maincpu->space(AS_PROGRAM);
9898
9999      /* first clear everything out */
100      space->nop_read(0x00000000, 0x3FFFFFFF);
101      space->nop_read(0x00000000, 0x3FFFFFFF);
100      space.nop_read(0x00000000, 0x3FFFFFFF);
101      space.nop_read(0x00000000, 0x3FFFFFFF);
102102   }
103103
104104   for (bank = 0; bank < MPC105_MEMORYBANK_COUNT; bank++)
trunk/src/mess/machine/iq151_staper.c
r17963r17964
9393
9494void iq151_staper_device::io_read(offs_t offset, UINT8 &data)
9595{
96   address_space* space = machine().device("maincpu")->memory().space(AS_IO);
96   address_space& space = *machine().device("maincpu")->memory().space(AS_IO);
9797
9898   if (offset >= 0xf8 && offset < 0xfc)
99      data = m_ppi->read(*space, offset & 0x03);
99      data = m_ppi->read(space, offset & 0x03);
100100}
101101
102102//-------------------------------------------------
r17963r17964
105105
106106void iq151_staper_device::io_write(offs_t offset, UINT8 data)
107107{
108   address_space* space = machine().device("maincpu")->memory().space(AS_IO);
108   address_space& space = *machine().device("maincpu")->memory().space(AS_IO);
109109
110110   if (offset >= 0xf8 && offset < 0xfc)
111      m_ppi->write(*space, offset & 0x03, data);
111      m_ppi->write(space, offset & 0x03, data);
112112}
113113
114114
trunk/src/mess/machine/nes.c
r17963r17964
3636static void init_nes_core( running_machine &machine )
3737{
3838   nes_state *state = machine.driver_data<nes_state>();
39   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
39   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
4040   static const char *const bank_names[] = { "bank1", "bank2", "bank3", "bank4" };
4141   int prg_banks = (state->m_prg_chunks == 1) ? (2 * 2) : (state->m_prg_chunks * 2);
4242   int i;
r17963r17964
4646   // other pointers got set in the loading routine
4747
4848   /* Brutal hack put in as a consequence of the new memory system; we really need to fix the NES code */
49   space->install_readwrite_bank(0x0000, 0x07ff, 0, 0x1800, "bank10");
49   space.install_readwrite_bank(0x0000, 0x07ff, 0, 0x1800, "bank10");
5050
5151   machine.device("ppu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0, 0x1fff, FUNC(nes_chr_r), FUNC(nes_chr_w));
5252   machine.device("ppu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x2000, 0x3eff, FUNC(nes_nt_r), FUNC(nes_nt_w));
r17963r17964
6868      if (state->m_fds_ram == NULL)
6969         state->m_fds_ram = auto_alloc_array(machine, UINT8, 0x8000);
7070
71      space->install_read_handler(0x4030, 0x403f, read8_delegate(FUNC(nes_state::nes_fds_r),state));
72      space->install_read_bank(0x6000, 0xdfff, "bank2");
73      space->install_read_bank(0xe000, 0xffff, "bank1");
71      space.install_read_handler(0x4030, 0x403f, read8_delegate(FUNC(nes_state::nes_fds_r),state));
72      space.install_read_bank(0x6000, 0xdfff, "bank2");
73      space.install_read_bank(0xe000, 0xffff, "bank1");
7474
75      space->install_write_handler(0x4020, 0x402f, write8_delegate(FUNC(nes_state::nes_fds_w),state));
76      space->install_write_bank(0x6000, 0xdfff, "bank2");
75      space.install_write_handler(0x4020, 0x402f, write8_delegate(FUNC(nes_state::nes_fds_w),state));
76      space.install_write_bank(0x6000, 0xdfff, "bank2");
7777
7878      state->membank("bank1")->set_base(&state->m_rom[0xe000]);
7979      state->membank("bank2")->set_base(state->m_fds_ram);
r17963r17964
8484   pcb_handlers_setup(machine);
8585
8686   /* Set up the memory handlers for the mapper */
87   space->install_read_bank(0x8000, 0x9fff, "bank1");
88   space->install_read_bank(0xa000, 0xbfff, "bank2");
89   space->install_read_bank(0xc000, 0xdfff, "bank3");
90   space->install_read_bank(0xe000, 0xffff, "bank4");
91   space->install_readwrite_bank(0x6000, 0x7fff, "bank5");
87   space.install_read_bank(0x8000, 0x9fff, "bank1");
88   space.install_read_bank(0xa000, 0xbfff, "bank2");
89   space.install_read_bank(0xc000, 0xdfff, "bank3");
90   space.install_read_bank(0xe000, 0xffff, "bank4");
91   space.install_readwrite_bank(0x6000, 0x7fff, "bank5");
9292
9393   /* configure banks 1-4 */
9494   for (i = 0; i < 4; i++)
r17963r17964
161161
162162   // there are still some quirk about writes to bank5... I hope to fix them soon. (mappers 34,45,52,246 have both mid_w and WRAM-->check)
163163   if (state->m_mmc_write_mid)
164      space->install_legacy_write_handler(0x6000, 0x7fff, state->m_mmc_write_mid,state->m_mmc_write_mid_name);
164      space.install_legacy_write_handler(0x6000, 0x7fff, state->m_mmc_write_mid,state->m_mmc_write_mid_name);
165165   if (state->m_mmc_write)
166      space->install_legacy_write_handler(0x8000, 0xffff, state->m_mmc_write, state->m_mmc_write_name);
166      space.install_legacy_write_handler(0x8000, 0xffff, state->m_mmc_write, state->m_mmc_write_name);
167167
168168   // In fact, we also allow single pcbs to overwrite the bank read handlers defined above,
169169   // because some pcbs (mainly pirate ones) require protection values to be read instead of
170170   // the expected ROM banks: these handlers, though, must take care of the ROM access as well
171171   if (state->m_mmc_read_mid)
172      space->install_legacy_read_handler(0x6000, 0x7fff, state->m_mmc_read_mid,state->m_mmc_read_mid_name);
172      space.install_legacy_read_handler(0x6000, 0x7fff, state->m_mmc_read_mid,state->m_mmc_read_mid_name);
173173   if (state->m_mmc_read)
174      space->install_legacy_read_handler(0x8000, 0xffff, state->m_mmc_read,state->m_mmc_read_name);
174      space.install_legacy_read_handler(0x8000, 0xffff, state->m_mmc_read,state->m_mmc_read_name);
175175
176176   // install additional handlers
177177   if (state->m_pcb_id == BTL_SMB2B || state->m_mapper == 50)
178178   {
179      space->install_legacy_write_handler(0x4020, 0x403f, FUNC(smb2jb_extra_w));
180      space->install_legacy_write_handler(0x40a0, 0x40bf, FUNC(smb2jb_extra_w));
179      space.install_legacy_write_handler(0x4020, 0x403f, FUNC(smb2jb_extra_w));
180      space.install_legacy_write_handler(0x40a0, 0x40bf, FUNC(smb2jb_extra_w));
181181   }
182182
183183   if (state->m_pcb_id == KAISER_KS7017)
184184   {
185      space->install_legacy_read_handler(0x4030, 0x4030, FUNC(ks7017_extra_r));
186      space->install_legacy_write_handler(0x4020, 0x40ff, FUNC(ks7017_extra_w));
185      space.install_legacy_read_handler(0x4030, 0x4030, FUNC(ks7017_extra_r));
186      space.install_legacy_write_handler(0x4020, 0x40ff, FUNC(ks7017_extra_w));
187187   }
188188
189189   if (state->m_pcb_id == UNL_603_5052)
190190   {
191      space->install_legacy_read_handler(0x4020, 0x40ff, FUNC(unl_6035052_extra_r));
192      space->install_legacy_write_handler(0x4020, 0x40ff, FUNC(unl_6035052_extra_w));
191      space.install_legacy_read_handler(0x4020, 0x40ff, FUNC(unl_6035052_extra_r));
192      space.install_legacy_write_handler(0x4020, 0x40ff, FUNC(unl_6035052_extra_w));
193193   }
194194
195195   if (state->m_pcb_id == WAIXING_SH2)
trunk/src/mess/machine/lux21046.c
r17963r17964
223223   m_maincpu->set_input_line(INPUT_LINE_IRQ0, m_fdc_irq | m_dma_irq);
224224}
225225
226static UINT8 memory_read_byte(address_space *space, offs_t address) { return space->read_byte(address); }
227static void memory_write_byte(address_space *space, offs_t address, UINT8 data) { space->write_byte(address, data); }
226static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
227static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
228228
229229static Z80DMA_INTERFACE( dma_intf )
230230{
trunk/src/mess/machine/nes_mmc.c
r17963r17964
167167
168168WRITE8_HANDLER( nes_chr_w )
169169{
170   nes_state *state = space->machine().driver_data<nes_state>();
170   nes_state *state = space.machine().driver_data<nes_state>();
171171   int bank = offset >> 10;
172172
173173   if (state->m_chr_map[bank].source == CHRRAM)
r17963r17964
178178
179179READ8_HANDLER( nes_chr_r )
180180{
181   nes_state *state = space->machine().driver_data<nes_state>();
181   nes_state *state = space.machine().driver_data<nes_state>();
182182   int bank = offset >> 10;
183183
184184   // a few CNROM boards contained copy protection schemes through
r17963r17964
193193
194194WRITE8_HANDLER( nes_nt_w )
195195{
196   nes_state *state = space->machine().driver_data<nes_state>();
196   nes_state *state = space.machine().driver_data<nes_state>();
197197   int page = ((offset & 0xc00) >> 10);
198198
199199   if (state->m_nt_page[page].writable == 0)
r17963r17964
204204
205205READ8_HANDLER( nes_nt_r )
206206{
207   nes_state *state = space->machine().driver_data<nes_state>();
207   nes_state *state = space.machine().driver_data<nes_state>();
208208   int page = ((offset & 0xc00) >> 10);
209209
210210   if (state->m_nt_page[page].source == MMC5FILL)
r17963r17964
219219
220220WRITE8_HANDLER( nes_low_mapper_w )
221221{
222   nes_state *state = space->machine().driver_data<nes_state>();
222   nes_state *state = space.machine().driver_data<nes_state>();
223223
224224   if (state->m_mmc_write_low)
225225      (*state->m_mmc_write_low)(space, offset, data);
r17963r17964
229229
230230READ8_HANDLER( nes_low_mapper_r )
231231{
232   nes_state *state = space->machine().driver_data<nes_state>();
232   nes_state *state = space.machine().driver_data<nes_state>();
233233
234234   if (state->m_mmc_read_low)
235235      return (*state->m_mmc_read_low)(space, offset);
trunk/src/mess/machine/pc_joy.c
r17963r17964
1717{
1818   UINT8 data = 0xf;
1919   int delta;
20   attotime new_time = space->machine().time();
21   ioport_port *joystick_port = space->machine().root_device().ioport("pc_joy");
20   attotime new_time = space.machine().time();
21   ioport_port *joystick_port = space.machine().root_device().ioport("pc_joy");
2222   delta = ((new_time - JOY_time) * 256 * 1000).seconds;
2323
2424   if (joystick_port != NULL)
r17963r17964
3232      //}
3333      //else
3434      {
35         if (space->machine().root_device().ioport("pc_joy_1")->read() < delta) data &= ~0x01;
36         if (space->machine().root_device().ioport("pc_joy_2")->read() < delta) data &= ~0x02;
37         if (space->machine().root_device().ioport("pc_joy_3")->read() < delta) data &= ~0x04;
38         if (space->machine().root_device().ioport("pc_joy_4")->read() < delta) data &= ~0x08;
35         if (space.machine().root_device().ioport("pc_joy_1")->read() < delta) data &= ~0x01;
36         if (space.machine().root_device().ioport("pc_joy_2")->read() < delta) data &= ~0x02;
37         if (space.machine().root_device().ioport("pc_joy_3")->read() < delta) data &= ~0x04;
38         if (space.machine().root_device().ioport("pc_joy_4")->read() < delta) data &= ~0x08;
3939      }
4040   }
4141   else
r17963r17964
5050
5151WRITE8_HANDLER ( pc_JOY_w )
5252{
53   JOY_time = space->machine().time();
53   JOY_time = space.machine().time();
5454}
5555
5656INPUT_PORTS_START( pc_joystick_none )
trunk/src/mess/machine/apollo.c
r17963r17964
826826 ***************************************************************************/
827827
828828static DEVICE_RESET( apollo_rtc ) {
829   address_space *space = device->machine().device(MAINCPU)->memory().space(AS_PROGRAM);
829   address_space &space = *device->machine().device(MAINCPU)->memory().space(AS_PROGRAM);
830830   apollo_state *state = device->machine().driver_data<apollo_state>();
831   UINT8 year = state->apollo_rtc_r(*space, 9);
831   UINT8 year = state->apollo_rtc_r(space, 9);
832832
833833   // change year according to configuration settings
834834   if (year < 20 && apollo_config(APOLLO_CONF_DATE_1990))
835835   {
836836      year+=80;
837      state->apollo_rtc_w(*space, 9, year);
837      state->apollo_rtc_w(space, 9, year);
838838   }
839839   else if (year >= 80 && !apollo_config(APOLLO_CONF_DATE_1990))
840840   {
841841      year -=80;
842      state->apollo_rtc_w(*space, 9, year);
842      state->apollo_rtc_w(space, 9, year);
843843   }
844844
845845   //SLOG1(("reset apollo_rtc year=%d", year));
r17963r17964
872872static TIMER_CALLBACK( apollo_rtc_timer )
873873{
874874   apollo_state *state = machine.driver_data<apollo_state>();
875   address_space *space = machine.device(MAINCPU)->memory().space(AS_PROGRAM);
875   address_space &space = *machine.device(MAINCPU)->memory().space(AS_PROGRAM);
876876
877877   // FIXME: reading register 0x0c will clear all interrupt flags
878   if ((state->apollo_rtc_r(*space, 0x0c) & 0x80))
878   if ((state->apollo_rtc_r(space, 0x0c) & 0x80))
879879   {
880880      //SLOG2(("apollo_rtc_timer - set_irq_line %d", APOLLO_IRQ_RTC));
881      apollo_pic_set_irq_line(&space->device(), APOLLO_IRQ_RTC, 1);
881      apollo_pic_set_irq_line(&space.device(), APOLLO_IRQ_RTC, 1);
882882   }
883883}
884884
r17963r17964
13431343
13441344WRITE8_MEMBER(apollo_state::apollo_fdc_w){
13451345   SLOG1(("writing FDC upd765 at offset %X = %02x", offset, data));
1346   pc_fdc_w(&space, offset, data);
1346   pc_fdc_w(space, offset, data);
13471347}
13481348
13491349READ8_MEMBER(apollo_state::apollo_fdc_r){
1350   UINT8 data = pc_fdc_r(&space, offset);
1350   UINT8 data = pc_fdc_r(space, offset);
13511351   SLOG1(("reading FDC upd765 at offset %X = %02x", offset, data));
13521352   return data;
13531353}
trunk/src/mess/machine/pc_joy.h
r17963r17964
2626   pc_joy_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
2727   virtual ioport_constructor device_input_ports() const;
2828
29   DECLARE_READ8_MEMBER(joy_port_r) { return pc_JOY_r(&space, offset); }
30   DECLARE_WRITE8_MEMBER(joy_port_w) { pc_JOY_w(&space, offset, data); }
29   DECLARE_READ8_MEMBER(joy_port_r) { return pc_JOY_r(space, offset); }
30   DECLARE_WRITE8_MEMBER(joy_port_w) { pc_JOY_w(space, offset, data); }
3131protected:
3232   virtual void device_start() {}
3333};
trunk/src/mess/machine/kaypro.c
r17963r17964
327327
328328MACHINE_RESET_MEMBER(kaypro_state,kaypro2x)
329329{
330   address_space *space = m_maincpu->space(AS_PROGRAM);
331   kaypro2x_system_port_w(*space, 0, 0x80);
330   address_space &space = *m_maincpu->space(AS_PROGRAM);
331   kaypro2x_system_port_w(space, 0, 0x80);
332332   MACHINE_RESET_CALL_MEMBER(kay_kbd);
333333}
334334
r17963r17964
346346QUICKLOAD_LOAD( kayproii )
347347{
348348   kaypro_state *state = image.device().machine().driver_data<kaypro_state>();
349   address_space *space = state->m_maincpu->space(AS_PROGRAM);
349   address_space &space = *state->m_maincpu->space(AS_PROGRAM);
350350   UINT8 *RAM = state->memregion("rambank")->base();
351351   UINT16 i;
352352   UINT8 data;
r17963r17964
359359      RAM[i+0x100] = data;
360360   }
361361
362   state->common_pio_system_w(*space, 0, state->m_system_port & 0x7f);   // switch TPA in
362   state->common_pio_system_w(space, 0, state->m_system_port & 0x7f);   // switch TPA in
363363   RAM[0x80]=0;                     // clear out command tail
364364   RAM[0x81]=0;
365365   state->m_maincpu->set_pc(0x100);            // start program
r17963r17964
369369QUICKLOAD_LOAD( kaypro2x )
370370{
371371   kaypro_state *state = image.device().machine().driver_data<kaypro_state>();
372   address_space *space = state->m_maincpu->space(AS_PROGRAM);
372   address_space &space = *state->m_maincpu->space(AS_PROGRAM);
373373   UINT8 *RAM = state->memregion("rambank")->base();
374374   UINT16 i;
375375   UINT8 data;
r17963r17964
381381      RAM[i+0x100] = data;
382382   }
383383
384   state->kaypro2x_system_port_w(*space, 0, state->m_system_port & 0x7f);
384   state->kaypro2x_system_port_w(space, 0, state->m_system_port & 0x7f);
385385   RAM[0x80]=0;
386386   RAM[0x81]=0;
387387   state->m_maincpu->set_pc(0x100);
trunk/src/mess/machine/s3c44b0.c
r17963r17964
20012001DEVICE_START( s3c44b0 )
20022002{
20032003   running_machine &machine = device->machine();
2004   address_space *space = machine.device( "maincpu")->memory().space( AS_PROGRAM);
2004   address_space &space = *machine.device( "maincpu")->memory().space( AS_PROGRAM);
20052005   s3c44b0_t *s3c44b0 = get_token( device);
20062006   s3c44b0->iface = (const s3c44b0_interface *)device->static_config();
2007   s3c44b0->space = space;
2007   s3c44b0->space = &space;
20082008   s3c44b0->cpu = downcast<cpu_device *>(device->machine().device( "maincpu"));
20092009   for (int i = 0; i < 6; i++) s3c44b0->pwm.timer[i] = machine.scheduler().timer_alloc(FUNC(s3c44b0_pwm_timer_exp), (void*)device);
20102010   for (int i = 0; i < 2; i++) s3c44b0->uart[i].timer = machine.scheduler().timer_alloc(FUNC(s3c44b0_uart_timer_exp), (void*)device);
r17963r17964
20162016   s3c44b0->adc.timer = machine.scheduler().timer_alloc(FUNC(s3c44b0_adc_timer_exp), (void*)device);
20172017   s3c44b0->iic.timer = machine.scheduler().timer_alloc(FUNC(s3c44b0_iic_timer_exp), (void*)device);
20182018   s3c44b0->iis.timer = machine.scheduler().timer_alloc(FUNC(s3c44b0_iis_timer_exp), (void*)device);
2019   space->install_legacy_readwrite_handler( *device, 0x01c00000, 0x01c0000b, 0, 0, FUNC(s3c44b0_cpuwrap_r), FUNC(s3c44b0_cpuwrap_w));
2020   space->install_legacy_readwrite_handler( *device, 0x01d00000, 0x01d0002b, 0, 0, FUNC(s3c44b0_uart_0_r), FUNC(s3c44b0_uart_0_w));
2021   space->install_legacy_readwrite_handler( *device, 0x01d04000, 0x01d0402b, 0, 0, FUNC(s3c44b0_uart_1_r), FUNC(s3c44b0_uart_1_w));
2022   space->install_legacy_readwrite_handler( *device, 0x01d14000, 0x01d14013, 0, 0, FUNC(s3c44b0_sio_r), FUNC(s3c44b0_sio_w));
2023   space->install_legacy_readwrite_handler( *device, 0x01d18000, 0x01d18013, 0, 0, FUNC(s3c44b0_iis_r), FUNC(s3c44b0_iis_w));
2024   space->install_legacy_readwrite_handler( *device, 0x01d20000, 0x01d20057, 0, 0, FUNC(s3c44b0_gpio_r), FUNC(s3c44b0_gpio_w));
2025   space->install_legacy_readwrite_handler( *device, 0x01d30000, 0x01d3000b, 0, 0, FUNC(s3c44b0_wdt_r), FUNC(s3c44b0_wdt_w));
2026   space->install_legacy_readwrite_handler( *device, 0x01d40000, 0x01d4000b, 0, 0, FUNC(s3c44b0_adc_r), FUNC(s3c44b0_adc_w));
2027   space->install_legacy_readwrite_handler( *device, 0x01d50000, 0x01d5004f, 0, 0, FUNC(s3c44b0_pwm_r), FUNC(s3c44b0_pwm_w));
2028   space->install_legacy_readwrite_handler( *device, 0x01d60000, 0x01d6000f, 0, 0, FUNC(s3c44b0_iic_r), FUNC(s3c44b0_iic_w));
2029   space->install_legacy_readwrite_handler( *device, 0x01d80000, 0x01d8000f, 0, 0, FUNC(s3c44b0_clkpow_r), FUNC(s3c44b0_clkpow_w));
2030   space->install_legacy_readwrite_handler( *device, 0x01e00000, 0x01e0003f, 0, 0, FUNC(s3c44b0_irq_r), FUNC(s3c44b0_irq_w));
2031   space->install_legacy_readwrite_handler( *device, 0x01e80000, 0x01e8001b, 0, 0, FUNC(s3c44b0_zdma_0_r), FUNC(s3c44b0_zdma_0_w));
2032   space->install_legacy_readwrite_handler( *device, 0x01e80020, 0x01e8003b, 0, 0, FUNC(s3c44b0_zdma_1_r), FUNC(s3c44b0_zdma_1_w));
2033   space->install_legacy_readwrite_handler( *device, 0x01f00000, 0x01f00047, 0, 0, FUNC(s3c44b0_lcd_r), FUNC(s3c44b0_lcd_w));
2034   space->install_legacy_readwrite_handler( *device, 0x01f80000, 0x01f8001b, 0, 0, FUNC(s3c44b0_bdma_0_r), FUNC(s3c44b0_bdma_0_w));
2035   space->install_legacy_readwrite_handler( *device, 0x01f80020, 0x01f8003b, 0, 0, FUNC(s3c44b0_bdma_1_r), FUNC(s3c44b0_bdma_1_w));
2019   space.install_legacy_readwrite_handler( *device, 0x01c00000, 0x01c0000b, 0, 0, FUNC(s3c44b0_cpuwrap_r), FUNC(s3c44b0_cpuwrap_w));
2020   space.install_legacy_readwrite_handler( *device, 0x01d00000, 0x01d0002b, 0, 0, FUNC(s3c44b0_uart_0_r), FUNC(s3c44b0_uart_0_w));
2021   space.install_legacy_readwrite_handler( *device, 0x01d04000, 0x01d0402b, 0, 0, FUNC(s3c44b0_uart_1_r), FUNC(s3c44b0_uart_1_w));
2022   space.install_legacy_readwrite_handler( *device, 0x01d14000, 0x01d14013, 0, 0, FUNC(s3c44b0_sio_r), FUNC(s3c44b0_sio_w));
2023   space.install_legacy_readwrite_handler( *device, 0x01d18000, 0x01d18013, 0, 0, FUNC(s3c44b0_iis_r), FUNC(s3c44b0_iis_w));
2024   space.install_legacy_readwrite_handler( *device, 0x01d20000, 0x01d20057, 0, 0, FUNC(s3c44b0_gpio_r), FUNC(s3c44b0_gpio_w));
2025   space.install_legacy_readwrite_handler( *device, 0x01d30000, 0x01d3000b, 0, 0, FUNC(s3c44b0_wdt_r), FUNC(s3c44b0_wdt_w));
2026   space.install_legacy_readwrite_handler( *device, 0x01d40000, 0x01d4000b, 0, 0, FUNC(s3c44b0_adc_r), FUNC(s3c44b0_adc_w));
2027   space.install_legacy_readwrite_handler( *device, 0x01d50000, 0x01d5004f, 0, 0, FUNC(s3c44b0_pwm_r), FUNC(s3c44b0_pwm_w));
2028   space.install_legacy_readwrite_handler( *device, 0x01d60000, 0x01d6000f, 0, 0, FUNC(s3c44b0_iic_r), FUNC(s3c44b0_iic_w));
2029   space.install_legacy_readwrite_handler( *device, 0x01d80000, 0x01d8000f, 0, 0, FUNC(s3c44b0_clkpow_r), FUNC(s3c44b0_clkpow_w));
2030   space.install_legacy_readwrite_handler( *device, 0x01e00000, 0x01e0003f, 0, 0, FUNC(s3c44b0_irq_r), FUNC(s3c44b0_irq_w));
2031   space.install_legacy_readwrite_handler( *device, 0x01e80000, 0x01e8001b, 0, 0, FUNC(s3c44b0_zdma_0_r), FUNC(s3c44b0_zdma_0_w));
2032   space.install_legacy_readwrite_handler( *device, 0x01e80020, 0x01e8003b, 0, 0, FUNC(s3c44b0_zdma_1_r), FUNC(s3c44b0_zdma_1_w));
2033   space.install_legacy_readwrite_handler( *device, 0x01f00000, 0x01f00047, 0, 0, FUNC(s3c44b0_lcd_r), FUNC(s3c44b0_lcd_w));
2034   space.install_legacy_readwrite_handler( *device, 0x01f80000, 0x01f8001b, 0, 0, FUNC(s3c44b0_bdma_0_r), FUNC(s3c44b0_bdma_0_w));
2035   space.install_legacy_readwrite_handler( *device, 0x01f80020, 0x01f8003b, 0, 0, FUNC(s3c44b0_bdma_1_r), FUNC(s3c44b0_bdma_1_w));
20362036}
20372037
20382038const device_type S3C44B0 = &device_creator<s3c44b0_device>;
trunk/src/mess/machine/nes_ines.c
r17963r17964
4747
4848static WRITE8_HANDLER( mapper6_l_w )
4949{
50   nes_state *state = space->machine().driver_data<nes_state>();
50   nes_state *state = space.machine().driver_data<nes_state>();
5151   LOG_MMC(("mapper6_l_w, offset: %04x, data: %02x\n", offset, data));
5252
5353   switch (offset)
5454   {
5555      case 0x1fe:
5656         state->m_mmc_latch1 = data & 0x80;
57         set_nt_mirroring(space->machine(), BIT(data, 4) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW);
57         set_nt_mirroring(space.machine(), BIT(data, 4) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW);
5858         break;
5959      case 0x1ff:
60         set_nt_mirroring(space->machine(), BIT(data, 4) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
60         set_nt_mirroring(space.machine(), BIT(data, 4) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
6161         break;
6262
6363      case 0x401:
r17963r17964
7575
7676static WRITE8_HANDLER( mapper6_w )
7777{
78   nes_state *state = space->machine().driver_data<nes_state>();
78   nes_state *state = space.machine().driver_data<nes_state>();
7979   LOG_MMC(("mapper6_w, offset: %04x, data: %02x\n", offset, data));
8080
8181   if (!state->m_mmc_latch1)   // when in "FFE mode" we are forced to use CHRRAM/EXRAM bank?
8282   {
83      prg16_89ab(space->machine(), data >> 2);
84      // chr8(space->machine(), data & 0x03, ???);
83      prg16_89ab(space.machine(), data >> 2);
84      // chr8(space.machine(), data & 0x03, ???);
8585      // due to lack of info on the exact behavior, we simply act as if mmc_latch1=1
8686      if (state->m_mmc_chr_source == CHRROM)
87         chr8(space->machine(), data & 0x03, CHRROM);
87         chr8(space.machine(), data & 0x03, CHRROM);
8888   }
8989   else if (state->m_mmc_chr_source == CHRROM)         // otherwise, we can use CHRROM (when present)
90      chr8(space->machine(), data, CHRROM);
90      chr8(space.machine(), data, CHRROM);
9191}
9292
9393/*************************************************************
r17963r17964
105105{
106106   LOG_MMC(("mapper8_w, offset: %04x, data: %02x\n", offset, data));
107107
108   chr8(space->machine(), data & 0x07, CHRROM);
109   prg16_89ab(space->machine(), data >> 3);
108   chr8(space.machine(), data & 0x07, CHRROM);
109   prg16_89ab(space.machine(), data >> 3);
110110}
111111
112112/*************************************************************
r17963r17964
123123
124124static WRITE8_HANDLER( mapper17_l_w )
125125{
126   nes_state *state = space->machine().driver_data<nes_state>();
126   nes_state *state = space.machine().driver_data<nes_state>();
127127   LOG_MMC(("mapper17_l_w, offset: %04x, data: %02x\n", offset, data));
128128
129129   switch (offset)
130130   {
131131      case 0x1fe:
132         set_nt_mirroring(space->machine(), BIT(data, 4) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW);
132         set_nt_mirroring(space.machine(), BIT(data, 4) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW);
133133         break;
134134      case 0x1ff:
135         set_nt_mirroring(space->machine(), BIT(data, 4) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
135         set_nt_mirroring(space.machine(), BIT(data, 4) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
136136         break;
137137
138138      case 0x401:
r17963r17964
147147         break;
148148
149149      case 0x404:
150         prg8_89(space->machine(), data);
150         prg8_89(space.machine(), data);
151151         break;
152152      case 0x405:
153         prg8_ab(space->machine(), data);
153         prg8_ab(space.machine(), data);
154154         break;
155155      case 0x406:
156         prg8_cd(space->machine(), data);
156         prg8_cd(space.machine(), data);
157157         break;
158158      case 0x407:
159         prg8_ef(space->machine(), data);
159         prg8_ef(space.machine(), data);
160160         break;
161161
162162      case 0x410:
r17963r17964
167167      case 0x415:
168168      case 0x416:
169169      case 0x417:
170         chr1_x(space->machine(), offset & 7, data, CHRROM);
170         chr1_x(space.machine(), offset & 7, data, CHRROM);
171171         break;
172172   }
173173}
trunk/src/mess/machine/partner.c
r17963r17964
125125static void partner_iomap_bank(running_machine &machine,UINT8 *rom)
126126{
127127   partner_state *state = machine.driver_data<partner_state>();
128   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
128   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
129129   switch(state->m_win_mem_page) {
130130      case 2 :
131131            // FDD
132            space->install_write_handler(0xdc00, 0xddff, write8_delegate(FUNC(partner_state::partner_floppy_w),state));
133            space->install_read_handler (0xdc00, 0xddff, read8_delegate(FUNC(partner_state::partner_floppy_r),state));
132            space.install_write_handler(0xdc00, 0xddff, write8_delegate(FUNC(partner_state::partner_floppy_w),state));
133            space.install_read_handler (0xdc00, 0xddff, read8_delegate(FUNC(partner_state::partner_floppy_r),state));
134134            break;
135135      case 4 :
136136            // Timer
r17963r17964
143143static void partner_bank_switch(running_machine &machine)
144144{
145145   partner_state *state = machine.driver_data<partner_state>();
146   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
146   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
147147   UINT8 *rom = state->memregion("maincpu")->base();
148148   UINT8 *ram = machine.device<ram_device>(RAM_TAG)->pointer();
149149
150   space->install_write_bank(0x0000, 0x07ff, "bank1");
151   space->install_write_bank(0x0800, 0x3fff, "bank2");
152   space->install_write_bank(0x4000, 0x5fff, "bank3");
153   space->install_write_bank(0x6000, 0x7fff, "bank4");
154   space->install_write_bank(0x8000, 0x9fff, "bank5");
155   space->install_write_bank(0xa000, 0xb7ff, "bank6");
156   space->install_write_bank(0xb800, 0xbfff, "bank7");
157   space->install_write_bank(0xc000, 0xc7ff, "bank8");
158   space->install_write_bank(0xc800, 0xcfff, "bank9");
159   space->install_write_bank(0xd000, 0xd7ff, "bank10");
160   space->unmap_write(0xdc00, 0xddff);
161   space->install_read_bank (0xdc00, 0xddff, "bank11");
162   space->unmap_write(0xe000, 0xe7ff);
163   space->unmap_write(0xe800, 0xffff);
150   space.install_write_bank(0x0000, 0x07ff, "bank1");
151   space.install_write_bank(0x0800, 0x3fff, "bank2");
152   space.install_write_bank(0x4000, 0x5fff, "bank3");
153   space.install_write_bank(0x6000, 0x7fff, "bank4");
154   space.install_write_bank(0x8000, 0x9fff, "bank5");
155   space.install_write_bank(0xa000, 0xb7ff, "bank6");
156   space.install_write_bank(0xb800, 0xbfff, "bank7");
157   space.install_write_bank(0xc000, 0xc7ff, "bank8");
158   space.install_write_bank(0xc800, 0xcfff, "bank9");
159   space.install_write_bank(0xd000, 0xd7ff, "bank10");
160   space.unmap_write(0xdc00, 0xddff);
161   space.install_read_bank (0xdc00, 0xddff, "bank11");
162   space.unmap_write(0xe000, 0xe7ff);
163   space.unmap_write(0xe800, 0xffff);
164164
165165   // BANK 1 (0x0000 - 0x07ff)
166166   if (state->m_mem_page==0) {
167      space->unmap_write(0x0000, 0x07ff);
167      space.unmap_write(0x0000, 0x07ff);
168168      state->membank("bank1")->set_base(rom + 0x10000);
169169   } else {
170170      if (state->m_mem_page==7) {
r17963r17964
187187   } else {
188188      if (state->m_mem_page==10) {
189189         //window 1
190         space->unmap_write(0x4000, 0x5fff);
190         space.unmap_write(0x4000, 0x5fff);
191191         partner_window_1(machine, 3, 0, rom);
192192      } else {
193193         state->membank("bank3")->set_base(ram + 0x4000);
r17963r17964
206206      case 5:
207207      case 10:
208208            //window 2
209            space->unmap_write(0x8000, 0x9fff);
209            space.unmap_write(0x8000, 0x9fff);
210210            partner_window_2(machine, 5, 0, rom);
211211            break;
212212      case 8:
213213      case 9:
214214            //window 1
215            space->unmap_write(0x8000, 0x9fff);
215            space.unmap_write(0x8000, 0x9fff);
216216            partner_window_1(machine, 5, 0, rom);
217217            break;
218218      case 7:
r17963r17964
228228      case 5:
229229      case 10:
230230            //window 2
231            space->unmap_write(0xa000, 0xb7ff);
231            space.unmap_write(0xa000, 0xb7ff);
232232            partner_window_2(machine, 6, 0, rom);
233233            break;
234234      case 6:
235235      case 8:
236236            //BASIC
237            space->unmap_write(0xa000, 0xb7ff);
237            space.unmap_write(0xa000, 0xb7ff);
238238            state->membank("bank6")->set_base(rom + 0x12000); // BASIC
239239            break;
240240      case 7:
r17963r17964
251251      case 5:
252252      case 10:
253253            //window 2
254            space->unmap_write(0xb800, 0xbfff);
254            space.unmap_write(0xb800, 0xbfff);
255255            partner_window_2(machine, 7, 0x1800, rom);
256256            break;
257257      case 6:
258258      case 8:
259259            //BASIC
260            space->unmap_write(0xb800, 0xbfff);
260            space.unmap_write(0xb800, 0xbfff);
261261            state->membank("bank7")->set_base(rom + 0x13800); // BASIC
262262            break;
263263      case 7:
r17963r17964
275275            break;
276276      case 8:
277277      case 10:
278            space->unmap_write(0xc000, 0xc7ff);
278            space.unmap_write(0xc000, 0xc7ff);
279279            state->membank("bank8")->set_base(rom + 0x10000);
280280            break;
281281      default:
r17963r17964
291291      case 8:
292292      case 9:
293293            // window 2
294            space->unmap_write(0xc800, 0xcfff);
294            space.unmap_write(0xc800, 0xcfff);
295295            partner_window_2(machine, 9, 0, rom);
296296            break;
297297      case 10:
298            space->unmap_write(0xc800, 0xcfff);
298            space.unmap_write(0xc800, 0xcfff);
299299            state->membank("bank9")->set_base(rom + 0x10800);
300300            break;
301301      default:
r17963r17964
311311      case 8:
312312      case 9:
313313            // window 2
314            space->unmap_write(0xd000, 0xd7ff);
314            space.unmap_write(0xd000, 0xd7ff);
315315            partner_window_2(machine, 10, 0x0800, rom);
316316            break;
317317      default:
r17963r17964
366366   i8257_hlda_w(device, state);
367367}
368368
369static UINT8 memory_read_byte(address_space *space, offs_t address) { return space->read_byte(address); }
370static void memory_write_byte(address_space *space, offs_t address, UINT8 data) { space->write_byte(address, data); }
369static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
370static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
371371
372372I8257_INTERFACE( partner_dma )
373373{
trunk/src/mess/machine/pc_fdc.c
r17963r17964
275275   int selected_drive;
276276   int floppy_count;
277277
278   floppy_count = floppy_get_count(space->machine());
278   floppy_count = floppy_get_count(space.machine());
279279
280280   if (floppy_count > (fdc->digital_output_register & 0x03))
281      floppy_drive_set_ready_state(floppy_get_device(space->machine(), fdc->digital_output_register & 0x03), 1, 0);
281      floppy_drive_set_ready_state(floppy_get_device(space.machine(), fdc->digital_output_register & 0x03), 1, 0);
282282
283283   fdc->digital_output_register = data;
284284
r17963r17964
286286
287287   /* set floppy drive motor state */
288288   if (floppy_count > 0)
289      floppy_mon_w(floppy_get_device(space->machine(), 0), !BIT(data, 4));
289      floppy_mon_w(floppy_get_device(space.machine(), 0), !BIT(data, 4));
290290   if (floppy_count > 1)
291      floppy_mon_w(floppy_get_device(space->machine(), 1), !BIT(data, 5));
291      floppy_mon_w(floppy_get_device(space.machine(), 1), !BIT(data, 5));
292292   if (floppy_count > 2)
293      floppy_mon_w(floppy_get_device(space->machine(), 2), !BIT(data, 6));
293      floppy_mon_w(floppy_get_device(space.machine(), 2), !BIT(data, 6));
294294   if (floppy_count > 3)
295      floppy_mon_w(floppy_get_device(space->machine(), 3), !BIT(data, 7));
295      floppy_mon_w(floppy_get_device(space.machine(), 3), !BIT(data, 7));
296296
297297   if ((data>>4) & (1<<selected_drive))
298298   {
299299      if (floppy_count > selected_drive)
300         floppy_drive_set_ready_state(floppy_get_device(space->machine(), selected_drive), 1, 0);
300         floppy_drive_set_ready_state(floppy_get_device(space.machine(), selected_drive), 1, 0);
301301   }
302302
303303   /* changing the DMA enable bit, will affect the terminal count state
304304    from reaching the fdc - if dma is enabled this will send it through
305305    otherwise it will be ignored */
306   pc_fdc_set_tc_state(space->machine(), fdc->tc_state);
306   pc_fdc_set_tc_state(space.machine(), fdc->tc_state);
307307
308308   /* changing the DMA enable bit, will affect the dma drq state
309309    from reaching us - if dma is enabled this will send it through
310310    otherwise it will be ignored */
311   pc_fdc_hw_dma_drq(pc_get_device(space->machine()), fdc->dma_state);
311   pc_fdc_hw_dma_drq(pc_get_device(space.machine()), fdc->dma_state);
312312
313313   /* changing the DMA enable bit, will affect the irq state
314314    from reaching us - if dma is enabled this will send it through
315315    otherwise it will be ignored */
316   pc_fdc_hw_interrupt(pc_get_device(space->machine()), fdc->int_state);
316   pc_fdc_hw_interrupt(pc_get_device(space.machine()), fdc->int_state);
317317
318318   /* reset? */
319319   if ((fdc->digital_output_register & PC_FDC_FLAGS_DOR_FDC_ENABLED)==0)
r17963r17964
336336        what is not yet clear is if this is a result of the drives ready state
337337        changing...
338338        */
339         upd765_ready_w(pc_get_device(space->machine()),1);
339         upd765_ready_w(pc_get_device(space.machine()),1);
340340
341341      /* set FDC at reset */
342      upd765_reset_w(pc_get_device(space->machine()), 1);
342      upd765_reset_w(pc_get_device(space.machine()), 1);
343343   }
344344   else
345345   {
346      pc_fdc_set_tc_state(space->machine(), 0);
346      pc_fdc_set_tc_state(space.machine(), 0);
347347
348348      /* release reset on fdc */
349      upd765_reset_w(pc_get_device(space->machine()), 0);
349      upd765_reset_w(pc_get_device(space.machine()), 0);
350350   }
351351}
352352
r17963r17964
381381{
382382   int floppy_count;
383383
384   floppy_count = floppy_get_count(space->machine());
384   floppy_count = floppy_get_count(space.machine());
385385
386386   /* set floppy drive motor state */
387387   if (floppy_count > 0)
388      floppy_mon_w(floppy_get_device(space->machine(), 0), BIT(data, 0) ? CLEAR_LINE : ASSERT_LINE);
388      floppy_mon_w(floppy_get_device(space.machine(), 0), BIT(data, 0) ? CLEAR_LINE : ASSERT_LINE);
389389
390390   if ( data & 0x01 )
391391   {
392392      if ( floppy_count )
393         floppy_drive_set_ready_state(floppy_get_device(space->machine(), 0), 1, 0);
393         floppy_drive_set_ready_state(floppy_get_device(space.machine(), 0), 1, 0);
394394   }
395395
396396   /* Is the watchdog timer disabled */
r17963r17964
399399      fdc->watchdog->adjust( attotime::never );
400400      if ( fdc->fdc_interface.pc_fdc_interrupt )
401401      {
402         fdc->fdc_interface.pc_fdc_interrupt(space->machine(), 0 );
402         fdc->fdc_interface.pc_fdc_interrupt(space.machine(), 0 );
403403      }
404404   } else {
405405      /* Check for 1->0 watchdog trigger */
r17963r17964
431431        what is not yet clear is if this is a result of the drives ready state
432432        changing...
433433        */
434         upd765_ready_w(pc_get_device(space->machine()),1);
434         upd765_ready_w(pc_get_device(space.machine()),1);
435435
436436      /* set FDC at reset */
437      upd765_reset_w(pc_get_device(space->machine()), 1);
437      upd765_reset_w(pc_get_device(space.machine()), 1);
438438   }
439439   else
440440   {
441      pc_fdc_set_tc_state(space->machine(), 0);
441      pc_fdc_set_tc_state(space.machine(), 0);
442442
443443      /* release reset on fdc */
444      upd765_reset_w(pc_get_device(space->machine()), 0);
444      upd765_reset_w(pc_get_device(space.machine()), 0);
445445   }
446446
447447   logerror("pcjr_fdc_dor_w: changing dor from %02x to %02x\n", fdc->digital_output_register, data);
r17963r17964
498498      case 3: /* tape drive select? */
499499         break;
500500      case 4:
501         data = upd765_status_r(pc_get_device(space->machine()), *space, 0);
501         data = upd765_status_r(pc_get_device(space.machine()), space, 0);
502502         break;
503503      case 5:
504         data = upd765_data_r(pc_get_device(space->machine()), *space, offset);
504         data = upd765_data_r(pc_get_device(space.machine()), space, offset);
505505         break;
506506      case 6: /* FDC reserved */
507507         break;
508508      case 7:
509         device_t *dev = floppy_get_device(space->machine(), fdc->digital_output_register & 0x03);
509         device_t *dev = floppy_get_device(space.machine(), fdc->digital_output_register & 0x03);
510510         data = fdc->digital_input_register;
511511         if(dev) data |= (!floppy_dskchg_r(dev)<<7);
512512         break;
513513    }
514514
515515   if (LOG_FDC)
516      logerror("pc_fdc_r(): pc=0x%08x offset=%d result=0x%02X\n", (unsigned) space->machine().firstcpu->pc(), offset, data);
516      logerror("pc_fdc_r(): pc=0x%08x offset=%d result=0x%02X\n", (unsigned) space.machine().firstcpu->pc(), offset, data);
517517   return data;
518518}
519519
r17963r17964
522522WRITE8_HANDLER ( pc_fdc_w )
523523{
524524   if (LOG_FDC)
525      logerror("pc_fdc_w(): pc=0x%08x offset=%d data=0x%02X\n", (unsigned) space->machine().firstcpu->pc(), offset, data);
525      logerror("pc_fdc_w(): pc=0x%08x offset=%d data=0x%02X\n", (unsigned) space.machine().firstcpu->pc(), offset, data);
526526
527   pc_fdc_check_data_rate(space->machine());  // check every time a command may start
527   pc_fdc_check_data_rate(space.machine());  // check every time a command may start
528528   switch(offset)
529529   {
530530      case 0:   /* n/a */
r17963r17964
537537         /* tape drive select? */
538538         break;
539539      case 4:
540         pc_fdc_data_rate_w(space->machine(), data);
540         pc_fdc_data_rate_w(space.machine(), data);
541541         break;
542542      case 5:
543         upd765_data_w(pc_get_device(space->machine()), *space, 0, data);
543         upd765_data_w(pc_get_device(space.machine()), space, 0, data);
544544         break;
545545      case 6:
546546         /* FDC reserved */
r17963r17964
555555             *      1 0      250 kbps
556556             *      1 1     1000 kbps
557557             */
558         pc_fdc_data_rate_w(space->machine(), data & 3);
558         pc_fdc_data_rate_w(space.machine(), data & 3);
559559         break;
560560   }
561561}
r17963r17964
563563WRITE8_HANDLER ( pcjr_fdc_w )
564564{
565565   if (LOG_FDC)
566      logerror("pcjr_fdc_w(): pc=0x%08x offset=%d data=0x%02X\n", (unsigned) space->machine().firstcpu->pc(), offset, data);
566      logerror("pcjr_fdc_w(): pc=0x%08x offset=%d data=0x%02X\n", (unsigned) space.machine().firstcpu->pc(), offset, data);
567567
568568   switch(offset)
569569   {
trunk/src/mess/machine/hec2hrp.c
r17963r17964
5555#endif
5656
5757static void Mise_A_Jour_Etat(running_machine &machine, int Adresse, int Value );
58static void Update_Sound(address_space *space, UINT8 data);
58static void Update_Sound(address_space &space, UINT8 data);
5959
6060static cassette_image_device *cassette_device_image(running_machine &machine);
6161
r17963r17964
115115
116116   /* FDC Motor Control - Bit 0/1 defines the state of the FDD 0/1 motor */
117117   floppy_mon_w(floppy_get_device(machine, 0), 0);   // Moteur floppy A:
118   //floppy_mon_w(floppy_get_device(space->machine(), 1), BIT(data, 7));   // Moteur floppy B:, not implanted on the real machine
118   //floppy_mon_w(floppy_get_device(space.machine(), 1), BIT(data, 7));   // Moteur floppy B:, not implanted on the real machine
119119
120120   //Set the drive ready !
121121   floppy_drive_set_ready_state(floppy_get_device(machine, 0), FLOPPY_DRIVE_READY, 0);// Disc 0 ready !
r17963r17964
307307WRITE8_MEMBER(hec2hrp_state::hector_sn_2000_w)
308308{
309309   Mise_A_Jour_Etat(machine(), 0x2000+ offset, data);
310   Update_Sound(&space, data);
310   Update_Sound(space, data);
311311}
312312WRITE8_MEMBER(hec2hrp_state::hector_sn_2800_w)
313313{
314314   Mise_A_Jour_Etat(machine(), 0x2800+ offset, data);
315   Update_Sound(&space, data);
315   Update_Sound(space, data);
316316}
317317READ8_MEMBER(hec2hrp_state::hector_cassette_r)
318318{
r17963r17964
364364   {
365365      /* Update sn76477 only when necessary!*/
366366      Mise_A_Jour_Etat( machine(), 0x3000, data & 7 );
367      Update_Sound(&space, data & 7);
367      Update_Sound(space, data & 7);
368368   }
369369   m_oldstate3000 = data & 7;
370370}
r17963r17964
790790   state->m_ValMixer = 0;
791791}
792792
793static void Update_Sound(address_space *space, UINT8 data)
793static void Update_Sound(address_space &space, UINT8 data)
794794{
795   hec2hrp_state *state = space->machine().driver_data<hec2hrp_state>();
795   hec2hrp_state *state = space.machine().driver_data<hec2hrp_state>();
796796   /* keep device*/
797   device_t *sn76477 = space->machine().device("sn76477");
797   device_t *sn76477 = space.machine().device("sn76477");
798798
799799   /* MIXER*/
800800   sn76477_mixer_a_w(sn76477, ((state->m_ValMixer & 0x04)==4) ? 1 : 0);
trunk/src/mess/machine/bebox.c
r17963r17964
142142
143143READ64_HANDLER( bebox_cpu0_imask_r )
144144{
145   bebox_state *state = space->machine().driver_data<bebox_state>();
145   bebox_state *state = space.machine().driver_data<bebox_state>();
146146   return ((UINT64) state->m_cpu_imask[0]) << 32;
147147}
148148
149149READ64_HANDLER( bebox_cpu1_imask_r )
150150{
151   bebox_state *state = space->machine().driver_data<bebox_state>();
151   bebox_state *state = space.machine().driver_data<bebox_state>();
152152   return ((UINT64) state->m_cpu_imask[1]) << 32;
153153}
154154
155155READ64_HANDLER( bebox_interrupt_sources_r )
156156{
157   bebox_state *state = space->machine().driver_data<bebox_state>();
157   bebox_state *state = space.machine().driver_data<bebox_state>();
158158   return ((UINT64) state->m_interrupts) << 32;
159159}
160160
161161WRITE64_HANDLER( bebox_cpu0_imask_w )
162162{
163   bebox_state *state = space->machine().driver_data<bebox_state>();
163   bebox_state *state = space.machine().driver_data<bebox_state>();
164164   UINT32 old_imask = state->m_cpu_imask[0];
165165
166166   bebox_mbreg32_w(&state->m_cpu_imask[0], data, mem_mask);
r17963r17964
170170      if (LOG_CPUIMASK)
171171      {
172172         logerror("BeBox CPU #0 pc=0x%08X imask=0x%08x\n",
173            (unsigned) space->device().safe_pc( ), state->m_cpu_imask[0]);
173            (unsigned) space.device().safe_pc( ), state->m_cpu_imask[0]);
174174      }
175      bebox_update_interrupts(space->machine());
175      bebox_update_interrupts(space.machine());
176176   }
177177}
178178
179179WRITE64_HANDLER( bebox_cpu1_imask_w )
180180{
181   bebox_state *state = space->machine().driver_data<bebox_state>();
181   bebox_state *state = space.machine().driver_data<bebox_state>();
182182   UINT32 old_imask = state->m_cpu_imask[1];
183183
184184   bebox_mbreg32_w(&state->m_cpu_imask[1], data, mem_mask);
r17963r17964
188188      if (LOG_CPUIMASK)
189189      {
190190         logerror("BeBox CPU #1 pc=0x%08X imask=0x%08x\n",
191            (unsigned) space->device() .safe_pc( ), state->m_cpu_imask[1]);
191            (unsigned) space.device() .safe_pc( ), state->m_cpu_imask[1]);
192192      }
193      bebox_update_interrupts(space->machine());
193      bebox_update_interrupts(space.machine());
194194   }
195195}
196196
197197READ64_HANDLER( bebox_crossproc_interrupts_r )
198198{
199   bebox_state *state = space->machine().driver_data<bebox_state>();
199   bebox_state *state = space.machine().driver_data<bebox_state>();
200200   UINT32 result;
201201   result = state->m_crossproc_interrupts;
202202
203203   /* return a different result depending on which CPU is accessing this handler */
204   if (space != space->machine().device("ppc1")->memory().space(AS_PROGRAM))
204   if (&space != space.machine().device("ppc1")->memory().space(AS_PROGRAM))
205205      result |= 0x02000000;
206206   else
207207      result &= ~0x02000000;
r17963r17964
211211
212212WRITE64_HANDLER( bebox_crossproc_interrupts_w )
213213{
214   bebox_state *state = space->machine().driver_data<bebox_state>();
214   bebox_state *state = space.machine().driver_data<bebox_state>();
215215   static const struct
216216   {
217217      UINT32 mask;
r17963r17964
249249                    */
250250         }
251251
252         space->machine().device(cputags[crossproc_map[i].cpunum])->execute().set_input_line(crossproc_map[i].inputline, line);
252         space.machine().device(cputags[crossproc_map[i].cpunum])->execute().set_input_line(crossproc_map[i].inputline, line);
253253      }
254254   }
255255}
r17963r17964
260260
261261   if (b & 0x20)
262262   {
263      space->machine().device("ppc2")->execute().set_input_line(INPUT_LINE_RESET, (b & 0x80) ? CLEAR_LINE : ASSERT_LINE);
263      space.machine().device("ppc2")->execute().set_input_line(INPUT_LINE_RESET, (b & 0x80) ? CLEAR_LINE : ASSERT_LINE);
264264   }
265265}
266266
r17963r17964
453453
454454READ64_HANDLER( bebox_interrupt_ack_r )
455455{
456   bebox_state *state = space->machine().driver_data<bebox_state>();
456   bebox_state *state = space.machine().driver_data<bebox_state>();
457457   int result;
458458   result = pic8259_acknowledge( state->m_devices.pic8259_master );
459   bebox_set_irq_bit(space->machine(), 5, 0);   /* HACK */
459   bebox_set_irq_bit(space.machine(), 5, 0);   /* HACK */
460460   return ((UINT64) result) << 56;
461461}
462462
r17963r17964
514514   return machine.device("ide");
515515}
516516
517READ8_HANDLER( bebox_800001F0_r ) { return ide_controller_r(ide_device(space->machine()), offset + 0x1F0, 1); }
518WRITE8_HANDLER( bebox_800001F0_w ) { ide_controller_w(ide_device(space->machine()), offset + 0x1F0, 1, data); }
517READ8_HANDLER( bebox_800001F0_r ) { return ide_controller_r(ide_device(space.machine()), offset + 0x1F0, 1); }
518WRITE8_HANDLER( bebox_800001F0_w ) { ide_controller_w(ide_device(space.machine()), offset + 0x1F0, 1, data); }
519519
520520READ64_HANDLER( bebox_800003F0_r )
521521{
r17963r17964
524524   if (((mem_mask >> 8) & 0xFF) == 0)
525525   {
526526      result &= ~(0xFF << 8);
527      result |= ide_controller_r(ide_device(space->machine()), 0x3F6, 1) << 8;
527      result |= ide_controller_r(ide_device(space.machine()), 0x3F6, 1) << 8;
528528   }
529529
530530   if (((mem_mask >> 0) & 0xFF) == 0)
531531   {
532532      result &= ~(0xFF << 0);
533      result |= ide_controller_r(ide_device(space->machine()), 0x3F7, 1) << 0;
533      result |= ide_controller_r(ide_device(space.machine()), 0x3F7, 1) << 0;
534534   }
535535   return result;
536536}
r17963r17964
541541   write64be_with_write8_handler(pc_fdc_w, space, offset, data, mem_mask | 0xFFFF);
542542
543543   if (((mem_mask >> 8) & 0xFF) == 0)
544      ide_controller_w(ide_device(space->machine()), 0x3F6, 1, (data >> 8) & 0xFF);
544      ide_controller_w(ide_device(space.machine()), 0x3F6, 1, (data >> 8) & 0xFF);
545545
546546   if (((mem_mask >> 0) & 0xFF) == 0)
547      ide_controller_w(ide_device(space->machine()), 0x3F7, 1, (data >> 0) & 0xFF);
547      ide_controller_w(ide_device(space.machine()), 0x3F7, 1, (data >> 0) & 0xFF);
548548}
549549
550550
r17963r17964
588588
589589READ8_HANDLER(bebox_page_r)
590590{
591   bebox_state *state = space->machine().driver_data<bebox_state>();
591   bebox_state *state = space.machine().driver_data<bebox_state>();
592592   UINT8 data = state->m_at_pages[offset % 0x10];
593593
594594   switch(offset % 8)
r17963r17964
612612
613613WRITE8_HANDLER(bebox_page_w)
614614{
615   bebox_state *state = space->machine().driver_data<bebox_state>();
615   bebox_state *state = space.machine().driver_data<bebox_state>();
616616   state->m_at_pages[offset % 0x10] = data;
617617
618618   switch(offset % 8)
r17963r17964
639639
640640WRITE8_HANDLER(bebox_80000480_w)
641641{
642   bebox_state *state = space->machine().driver_data<bebox_state>();
642   bebox_state *state = space.machine().driver_data<bebox_state>();
643643   switch(offset % 8)
644644   {
645645      case 1:
r17963r17964
679679
680680static READ8_HANDLER( bebox_dma_read_byte )
681681{
682   bebox_state *state = space->machine().driver_data<bebox_state>();
682   bebox_state *state = space.machine().driver_data<bebox_state>();
683683   offs_t page_offset = (((offs_t) state->m_dma_offset[0][state->m_dma_channel]) << 16)
684684      & 0x7FFF0000;
685   return space->read_byte(page_offset + offset);
685   return space.read_byte(page_offset + offset);
686686}
687687
688688
689689static WRITE8_HANDLER( bebox_dma_write_byte )
690690{
691   bebox_state *state = space->machine().driver_data<bebox_state>();
691   bebox_state *state = space.machine().driver_data<bebox_state>();
692692   offs_t page_offset = (((offs_t) state->m_dma_offset[0][state->m_dma_channel]) << 16)
693693      & 0x7FFF0000;
694   space->write_byte(page_offset + offset, data);
694   space.write_byte(page_offset + offset, data);
695695}
696696
697697
r17963r17964
789789
790790READ8_HANDLER( bebox_flash_r )
791791{
792   fujitsu_29f016a_device *flash = space->machine().device<fujitsu_29f016a_device>("flash");
792   fujitsu_29f016a_device *flash = space.machine().device<fujitsu_29f016a_device>("flash");
793793   offset = (offset & ~7) | (7 - (offset & 7));
794794   return flash->read(offset);
795795}
r17963r17964
797797
798798WRITE8_HANDLER( bebox_flash_w )
799799{
800   fujitsu_29f016a_device *flash = space->machine().device<fujitsu_29f016a_device>("flash");
800   fujitsu_29f016a_device *flash = space.machine().device<fujitsu_29f016a_device>("flash");
801801   offset = (offset & ~7) | (7 - (offset & 7));
802802   flash->write(offset, data);
803803}
r17963r17964
840840
841841static READ64_HANDLER( scsi53c810_r )
842842{
843   bebox_state *state = space->machine().driver_data<bebox_state>();
843   bebox_state *state = space.machine().driver_data<bebox_state>();
844844   int reg = offset*8;
845845   UINT64 r = 0;
846846   if (!(mem_mask & U64(0xff00000000000000))) {
r17963r17964
874874
875875static WRITE64_HANDLER( scsi53c810_w )
876876{
877   bebox_state *state = space->machine().driver_data<bebox_state>();
877   bebox_state *state = space.machine().driver_data<bebox_state>();
878878   int reg = offset*8;
879879   if (!(mem_mask & U64(0xff00000000000000))) {
880880      state->m_lsi53c810->lsi53c810_reg_w(reg+0, data >> 56);
r17963r17964
955955               /* brutal ugly hack; at some point the PCI code should be handling this stuff */
956956               if (state->m_scsi53c810_data[5] != 0xFFFFFFF0)
957957               {
958                  address_space *space = device->machine().device("ppc1")->memory().space(AS_PROGRAM);
958                  address_space &space = *device->machine().device("ppc1")->memory().space(AS_PROGRAM);
959959
960960                  addr = (state->m_scsi53c810_data[5] | 0xC0000000) & ~0xFF;
961                  space->install_legacy_read_handler(addr, addr + 0xFF, FUNC(scsi53c810_r));
962                  space->install_legacy_write_handler(addr, addr + 0xFF, FUNC(scsi53c810_w));
961                  space.install_legacy_read_handler(addr, addr + 0xFF, FUNC(scsi53c810_r));
962                  space.install_legacy_write_handler(addr, addr + 0xFF, FUNC(scsi53c810_w));
963963               }
964964            }
965965            break;
trunk/src/mess/machine/intv.c
r17963r17964
697697}
698698
699699/* hand 0 == left, 1 == right, 2 == ECS hand controller 1, 3 == ECS hand controller 2 */
700UINT8 intv_control_r(address_space *space, int hand)
700UINT8 intv_control_r(address_space &space, int hand)
701701{
702702   static const char* const keypad_name[] = { "KEYPAD1", "KEYPAD2", "KEYPAD3", "KEYPAD4" };
703703   static const UINT8 keypad_table[] =
r17963r17964
728728   UINT8 rv = 0xFF;
729729
730730   /* keypad */
731   x = space->machine().root_device().ioport(keypad_name[hand])->read();
731   x = space.machine().root_device().ioport(keypad_name[hand])->read();
732732   for (y = 0; y < 16; y++)
733733   {
734734      if (x & (1 << y))
r17963r17964
737737      }
738738   }
739739
740   switch ((space->machine().root_device().ioport("OPTIONS")->read() >> hand) & 1)
740   switch ((space.machine().root_device().ioport("OPTIONS")->read() >> hand) & 1)
741741   {
742742      case 0: /* disc == digital */
743743      default:
744744
745         x = space->machine().root_device().ioport(disc_name[hand])->read();
745         x = space.machine().root_device().ioport(disc_name[hand])->read();
746746         for (y = 0; y < 16; y++)
747747         {
748748            if (x & (1 << y))
r17963r17964
754754
755755      case 1: /* disc == _fake_ analog */
756756
757         x = space->machine().root_device().ioport(discx_name[hand])->read();
758         y = space->machine().root_device().ioport(discy_name[hand])->read();
757         x = space.machine().root_device().ioport(discx_name[hand])->read();
758         y = space.machine().root_device().ioport(discy_name[hand])->read();
759759         rv &= discyx_table[y / 32][x / 32];
760760   }
761761
r17963r17964
764764
765765READ8_MEMBER( intv_state::intv_left_control_r )
766766{
767   return intv_control_r(&space, 0);
767   return intv_control_r(space, 0);
768768}
769769
770770READ8_MEMBER( intv_state::intv_right_control_r )
771771{
772   return intv_control_r(&space, 1);
772   return intv_control_r(space, 1);
773773}
774774
775775READ8_MEMBER( intv_state::intv_ecs_porta_r )
776776{
777777   if (ioport("ECS_CNTRLSEL")->read() == 0)
778      return intv_control_r(&space, 2);
778      return intv_control_r(space, 2);
779779   else
780780      return 0xff; // not sure what to return here, maybe it should be last output?
781781}
r17963r17964
786786   {
787787      case 0x00: // hand controller
788788      {
789         return intv_control_r(&space, 3);
789         return intv_control_r(space, 3);
790790      }
791791      case 0x01: // synthesizer keyboard
792792      {
trunk/src/mess/machine/nubus.c
r17963r17964
233233{
234234//  printf("install_bank: %s @ %x->%x mask %x mirror %x\n", tag, start, end, mask, mirror);
235235   m_maincpu = machine().device<cpu_device>(m_cputag);
236   address_space *space = m_maincpu->space(AS_PROGRAM);
237   space->install_readwrite_bank(start, end, mask, mirror, tag );
236   address_space &space = *m_maincpu->space(AS_PROGRAM);
237   space.install_readwrite_bank(start, end, mask, mirror, tag );
238238   machine().root_device().membank(tag)->set_base(data);
239239}
240240
trunk/src/mess/machine/tf20.c
r17963r17964
7171/* a read from this location disables the rom */
7272static READ8_HANDLER( tf20_rom_disable )
7373{
74   tf20_state *tf20 = get_safe_token(space->device().owner());
75   address_space *prg = space->device().memory().space(AS_PROGRAM);
74   tf20_state *tf20 = get_safe_token(space.device().owner());
75   address_space *prg = space.device().memory().space(AS_PROGRAM);
7676
7777   /* switch in ram */
7878   prg->install_ram(0x0000, 0x7fff, tf20->ram->pointer());
r17963r17964
8282
8383static READ8_HANDLER( tf20_dip_r )
8484{
85   logerror("%s: tf20_dip_r\n", space->machine().describe_context());
85   logerror("%s: tf20_dip_r\n", space.machine().describe_context());
8686
87   return space->machine().root_device().ioport("tf20_dip")->read();
87   return space.machine().root_device().ioport("tf20_dip")->read();
8888}
8989
9090static TIMER_CALLBACK( tf20_upd765_tc_reset )
r17963r17964
105105
106106static WRITE8_HANDLER( tf20_fdc_control_w )
107107{
108   tf20_state *tf20 = get_safe_token(space->device().owner());
109   logerror("%s: tf20_fdc_control_w %02x\n", space->machine().describe_context(), data);
108   tf20_state *tf20 = get_safe_token(space.device().owner());
109   logerror("%s: tf20_fdc_control_w %02x\n", space.machine().describe_context(), data);
110110
111111   /* bit 0, motor on signal */
112112   floppy_mon_w(tf20->floppy_0, !BIT(data, 0));
trunk/src/mess/machine/snescart.c
r17963r17964
504504static int snes_find_addon_chip( running_machine &machine )
505505{
506506   snes_state *state = machine.driver_data<snes_state>();
507   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
507   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
508508   int supported_type = 1;
509509   int dsp_prg_offset = 0;
510510
r17963r17964
686686static void snes_cart_log_info( running_machine &machine, int total_blocks, int supported )
687687{
688688   snes_state *state = machine.driver_data<snes_state>();
689   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
689   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
690690   char title[21], rom_id[4], company_id[2];
691691   int i, company, has_ram = 0, has_sram = 0;
692692
r17963r17964
763763   int supported_type = 1;
764764   running_machine &machine = image.device().machine();
765765   snes_state *state = machine.driver_data<snes_state>();
766   address_space *space = machine.device( "maincpu")->memory().space( AS_PROGRAM );
766   address_space &space = *machine.device( "maincpu")->memory().space( AS_PROGRAM );
767767   int total_blocks, read_blocks, has_bsx_slot = 0, st_bios = 0;
768768   UINT32 offset, int_header_offs;
769769   UINT8 *ROM = state->memregion("cart")->base();
trunk/src/mess/machine/c64.c
r17963r17964
238238
239239WRITE8_HANDLER( c64_roml_w )
240240{
241   legacy_c64_state *state = space->machine().driver_data<legacy_c64_state>();
241   legacy_c64_state *state = space.machine().driver_data<legacy_c64_state>();
242242
243243   state->m_memory[offset + 0x8000] = data;
244244
r17963r17964
248248
249249WRITE8_HANDLER( c64_write_io )
250250{
251   legacy_c64_state *state = space->machine().driver_data<legacy_c64_state>();
252   device_t *cia_0 = space->machine().device("cia_0");
253   device_t *cia_1 = space->machine().device("cia_1");
254   sid6581_device *sid = space->machine().device<sid6581_device>("sid6581");
255   device_t *vic2 = space->machine().device("vic2");
251   legacy_c64_state *state = space.machine().driver_data<legacy_c64_state>();
252   device_t *cia_0 = space.machine().device("cia_0");
253   device_t *cia_1 = space.machine().device("cia_1");
254   sid6581_device *sid = space.machine().device<sid6581_device>("sid6581");
255   device_t *vic2 = space.machine().device("vic2");
256256
257257   state->m_io_mirror[offset] = data;
258258   if (offset < 0x400)
259      vic2_port_w(vic2, *space, offset & 0x3ff, data);
259      vic2_port_w(vic2, space, offset & 0x3ff, data);
260260   else if (offset < 0x800)
261      sid->write(*space, offset & 0x3ff, data);
261      sid->write(space, offset & 0x3ff, data);
262262   else if (offset < 0xc00)
263263      state->m_colorram[offset & 0x3ff] = data | 0xf0;
264264   else if (offset < 0xd00)
265      mos6526_w(cia_0, *space, offset, data);
265      mos6526_w(cia_0, space, offset, data);
266266   else if (offset < 0xe00)
267267   {
268268      if (state->m_cia1_on)
269         mos6526_w(cia_1, *space, offset, data);
269         mos6526_w(cia_1, space, offset, data);
270270      else
271         DBG_LOG(space->machine(), 1, "io write", ("%.3x %.2x\n", offset, data));
271         DBG_LOG(space.machine(), 1, "io write", ("%.3x %.2x\n", offset, data));
272272   }
273273   else if (offset < 0xf00)
274      DBG_LOG(space->machine(), 1, "io write", ("%.3x %.2x\n", offset, data));      /* i/o 1 */
274      DBG_LOG(space.machine(), 1, "io write", ("%.3x %.2x\n", offset, data));      /* i/o 1 */
275275   else
276      DBG_LOG(space->machine(), 1, "io write", ("%.3x %.2x\n", offset, data));      /* i/o 2 */
276      DBG_LOG(space.machine(), 1, "io write", ("%.3x %.2x\n", offset, data));      /* i/o 2 */
277277}
278278
279279WRITE8_HANDLER( c64_ioarea_w )
280280{
281   legacy_c64_state *state = space->machine().driver_data<legacy_c64_state>();
281   legacy_c64_state *state = space.machine().driver_data<legacy_c64_state>();
282282   if (state->m_io_enabled)
283283      c64_write_io(space, offset, data);
284284   else
r17963r17964
287287
288288READ8_HANDLER( c64_read_io )
289289{
290   legacy_c64_state *state = space->machine().driver_data<legacy_c64_state>();
291   device_t *cia_0 = space->machine().device("cia_0");
292   device_t *cia_1 = space->machine().device("cia_1");
293   sid6581_device *sid = space->machine().device<sid6581_device>("sid6581");
294   device_t *vic2 = space->machine().device("vic2");
290   legacy_c64_state *state = space.machine().driver_data<legacy_c64_state>();
291   device_t *cia_0 = space.machine().device("cia_0");
292   device_t *cia_1 = space.machine().device("cia_1");
293   sid6581_device *sid = space.machine().device<sid6581_device>("sid6581");
294   device_t *vic2 = space.machine().device("vic2");
295295
296296   if (offset < 0x400)
297      return vic2_port_r(vic2, *space, offset & 0x3ff);
297      return vic2_port_r(vic2, space, offset & 0x3ff);
298298
299299   else if (offset < 0x800)
300      return sid->read(*space, offset & 0x3ff);
300      return sid->read(space, offset & 0x3ff);
301301
302302   else if (offset < 0xc00)
303303      return state->m_colorram[offset & 0x3ff];
r17963r17964
305305   else if (offset < 0xd00)
306306      {
307307         if (offset & 1)
308            cia_set_port_mask_value(cia_0, 1, space->machine().root_device().ioport("CTRLSEL")->read() & 0x80 ? c64_keyline[9] : c64_keyline[8] );
308            cia_set_port_mask_value(cia_0, 1, space.machine().root_device().ioport("CTRLSEL")->read() & 0x80 ? c64_keyline[9] : c64_keyline[8] );
309309         else
310310            cia_set_port_mask_value(cia_0, 0, state->ioport("CTRLSEL")->read() & 0x80 ? c64_keyline[8] : c64_keyline[9] );
311311
312         return mos6526_r(cia_0, *space, offset);
312         return mos6526_r(cia_0, space, offset);
313313      }
314314
315315   else if (state->m_cia1_on && (offset < 0xe00))
316      return mos6526_r(cia_1, *space, offset);
316      return mos6526_r(cia_1, space, offset);
317317
318   DBG_LOG(space->machine(), 1, "io read", ("%.3x\n", offset));
318   DBG_LOG(space.machine(), 1, "io read", ("%.3x\n", offset));
319319
320320   return 0xff;
321321}
322322
323323READ8_HANDLER( c64_ioarea_r )
324324{
325   legacy_c64_state *state = space->machine().driver_data<legacy_c64_state>();
325   legacy_c64_state *state = space.machine().driver_data<legacy_c64_state>();
326326   return state->m_io_enabled ? c64_read_io(space, offset) : state->m_io_ram_r_ptr[offset];
327327}
328328
r17963r17964
727727
728728READ8_HANDLER( c64_colorram_read )
729729{
730   legacy_c64_state *state = space->machine().driver_data<legacy_c64_state>();
730   legacy_c64_state *state = space.machine().driver_data<legacy_c64_state>();
731731   return state->m_colorram[offset & 0x3ff];
732732}
733733
734734WRITE8_HANDLER( c64_colorram_write )
735735{
736   legacy_c64_state *state = space->machine().driver_data<legacy_c64_state>();
736   legacy_c64_state *state = space.machine().driver_data<legacy_c64_state>();
737737   state->m_colorram[offset & 0x3ff] = data | 0xf0;
738738}
739739
r17963r17964
13771377
13781378   int bank = ((data >> 3) & 0x0e) | BIT(data, 7);
13791379
1380   map_cartridge_roml(space->machine(), bank * 0x2000);
1380   map_cartridge_roml(space.machine(), bank * 0x2000);
13811381}
13821382
13831383static void load_hugo_cartridge(device_image_interface &image)
r17963r17964
14071407
14081408static WRITE8_HANDLER( easy_calc_result_bank_w )
14091409{
1410   map_cartridge_romh(space->machine(), 0x2000 + (!offset * 0x2000));
1410   map_cartridge_romh(space.machine(), 0x2000 + (!offset * 0x2000));
14111411}
14121412
14131413static void load_easy_calc_result_cartridge(device_image_interface &image)
r17963r17964
14541454
14551455    */
14561456
1457   legacy_c64_state *state = space->machine().driver_data<legacy_c64_state>();
1457   legacy_c64_state *state = space.machine().driver_data<legacy_c64_state>();
14581458   UINT8 *cart = state->memregion("user1")->base();
14591459
14601460   if (data == 0xff)
r17963r17964
14861486      {
14871487         state->m_roml = state->m_c64_roml;
14881488
1489         map_cartridge_roml(space->machine(), address);
1490         map_cartridge_romh(space->machine(), address + 0x2000);
1489         map_cartridge_roml(space.machine(), address);
1490         map_cartridge_romh(space.machine(), address + 0x2000);
14911491      }
14921492   }
14931493
1494   c64_bankswitch(space->machine(), 0);
1494   c64_bankswitch(space.machine(), 0);
14951495}
14961496
14971497static void load_pagefox_cartridge(device_image_interface &image)
r17963r17964
15061506
15071507static WRITE8_HANDLER( multiscreen_bank_w )
15081508{
1509   legacy_c64_state *state = space->machine().driver_data<legacy_c64_state>();
1509   legacy_c64_state *state = space.machine().driver_data<legacy_c64_state>();
15101510   UINT8 *cart = state->memregion("user1")->base();
15111511   int bank = data & 0x0f;
15121512   offs_t address = bank * 0x4000;
r17963r17964
15171517      state->m_roml = cart + address;
15181518      state->m_roml_writable = 1;
15191519
1520      map_cartridge_romh(space->machine(), 0x2000);
1520      map_cartridge_romh(space.machine(), 0x2000);
15211521   }
15221522   else
15231523   {
r17963r17964
15251525      state->m_roml = state->m_c64_roml;
15261526      state->m_roml_writable = 0;
15271527
1528      map_cartridge_roml(space->machine(), address);
1529      map_cartridge_romh(space->machine(), address + 0x2000);
1528      map_cartridge_roml(space.machine(), address);
1529      map_cartridge_romh(space.machine(), address + 0x2000);
15301530   }
15311531
1532   c64_bankswitch(space->machine(), 0);
1532   c64_bankswitch(space.machine(), 0);
15331533}
15341534
15351535static void load_multiscreen_cartridge(device_image_interface &image)
r17963r17964
15451545
15461546static WRITE8_HANDLER( simons_basic_bank_w )
15471547{
1548   set_game_line(space->machine(), !BIT(data, 0));
1548   set_game_line(space.machine(), !BIT(data, 0));
15491549}
15501550
15511551static void load_simons_basic_cartridge(device_image_interface &image)
r17963r17964
15611561
15621562static READ8_HANDLER( super_explode_r )
15631563{
1564   legacy_c64_state *state = space->machine().driver_data<legacy_c64_state>();
1564   legacy_c64_state *state = space.machine().driver_data<legacy_c64_state>();
15651565
15661566   return state->m_roml[0x1f00 | offset];
15671567}
15681568
15691569static WRITE8_HANDLER( super_explode_bank_w )
15701570{
1571   map_cartridge_roml(space->machine(), BIT(data, 7) * 0x2000);
1571   map_cartridge_roml(space.machine(), BIT(data, 7) * 0x2000);
15721572}
15731573
15741574static void load_super_explode_cartridge(device_image_interface &image)
r17963r17964
15771577
15781578   map_cartridge_roml(image.device().machine(), 0x0000);
15791579
1580   address_space *space = image.device().machine().firstcpu->space(AS_PROGRAM);
1581   space->install_legacy_read_handler(0xdf00, 0xdfff, FUNC(super_explode_r));
1580   address_space &space = *image.device().machine().firstcpu->space(AS_PROGRAM);
1581   space.install_legacy_read_handler(0xdf00, 0xdfff, FUNC(super_explode_r));
15821582
15831583   install_io2_handler(super_explode_bank_w);
15841584}
r17963r17964
17001700
17011701static WRITE8_HANDLER( fc3_bank_w )
17021702{
1703   legacy_c64_state *state = space->machine().driver_data<legacy_c64_state>();
1703   legacy_c64_state *state = space.machine().driver_data<legacy_c64_state>();
17041704   // Type # 3
17051705   // working:
17061706   // not working:
r17963r17964
17301730
17311731static WRITE8_HANDLER( ocean1_bank_w )
17321732{
1733   legacy_c64_state *state = space->machine().driver_data<legacy_c64_state>();
1733   legacy_c64_state *state = space.machine().driver_data<legacy_c64_state>();
17341734   // Type # 5
17351735   // working: Double Dragon, Ghostbusters, Terminator 2
17361736   // not working: Pang, Robocop 2, Toki
r17963r17964
17651765
17661766static WRITE8_HANDLER( funplay_bank_w )
17671767{
1768   legacy_c64_state *state = space->machine().driver_data<legacy_c64_state>();
1768   legacy_c64_state *state = space.machine().driver_data<legacy_c64_state>();
17691769   // Type # 7
17701770   // working:
17711771   // not working:
r17963r17964
17951795
17961796static WRITE8_HANDLER( supergames_bank_w )
17971797{
1798   legacy_c64_state *state = space->machine().driver_data<legacy_c64_state>();
1798   legacy_c64_state *state = space.machine().driver_data<legacy_c64_state>();
17991799   // Type # 8
18001800   // working:
18011801   // not working:
r17963r17964
18341834
18351835static WRITE8_HANDLER( c64gs_bank_w )
18361836{
1837   legacy_c64_state *state = space->machine().driver_data<legacy_c64_state>();
1837   legacy_c64_state *state = space.machine().driver_data<legacy_c64_state>();
18381838   // Type # 15
18391839   // working:
18401840   // not working: The Last Ninja Remix
r17963r17964
18581858
18591859static READ8_HANDLER( dinamic_bank_r )
18601860{
1861   legacy_c64_state *state = space->machine().driver_data<legacy_c64_state>();
1861   legacy_c64_state *state = space.machine().driver_data<legacy_c64_state>();
18621862   // Type # 17
18631863   // working: Satan
18641864   // not working:
r17963r17964
18831883
18841884static READ8_HANDLER( zaxxon_bank_r )
18851885{
1886   legacy_c64_state *state = space->machine().driver_data<legacy_c64_state>();
1886   legacy_c64_state *state = space.machine().driver_data<legacy_c64_state>();
18871887   // Type # 18
18881888   // working:
18891889   // not working:
r17963r17964
19061906
19071907static WRITE8_HANDLER( domark_bank_w )
19081908{
1909   legacy_c64_state *state = space->machine().driver_data<legacy_c64_state>();
1909   legacy_c64_state *state = space.machine().driver_data<legacy_c64_state>();
19101910   // Type # 19
19111911   // working:
19121912   // not working:
r17963r17964
19291929
19301930static WRITE8_HANDLER( comal80_bank_w )
19311931{
1932   legacy_c64_state *state = space->machine().driver_data<legacy_c64_state>();
1932   legacy_c64_state *state = space.machine().driver_data<legacy_c64_state>();
19331933   // Type # 21
19341934   // working: Comal 80
19351935   // not working:
r17963r17964
19591959static void setup_c64_custom_mappers(running_machine &machine)
19601960{
19611961   legacy_c64_state *state = machine.driver_data<legacy_c64_state>();
1962   address_space *space = machine.device( "maincpu")->memory().space( AS_PROGRAM );
1962   address_space &space = *machine.device( "maincpu")->memory().space( AS_PROGRAM );
19631963
19641964   switch (state->m_cart.mapper)
19651965   {
r17963r17964
19681968      case KCS_PC:      /* Type #  2 not working */
19691969         break;
19701970      case FINAL_CART_III:    /* Type #  3 not working - 4 16k banks, loaded at 0x8000, banks chosen by writing to 0xdfff */
1971         space->install_legacy_write_handler( 0xdfff, 0xdfff, FUNC(fc3_bank_w) );
1971         space.install_legacy_write_handler( 0xdfff, 0xdfff, FUNC(fc3_bank_w) );
19721972         break;
19731973      case SIMONS_BASIC:   /* Type #  4 not working */
19741974         break;
19751975      case OCEAN_1:           /* Type #  5 - up to 64 8k banks, loaded at 0x8000 or 0xa000, banks chosen by writing to 0xde00 */
1976         space->install_legacy_write_handler( 0xde00, 0xde00, FUNC(ocean1_bank_w) );
1976         space.install_legacy_write_handler( 0xde00, 0xde00, FUNC(ocean1_bank_w) );
19771977         break;
19781978      case EXPERT:      /* Type #  6 not working */
19791979         break;
19801980      case FUN_PLAY:          /* Type #  7 - 16 8k banks, loaded at 0x8000, banks chosen by writing to 0xde00 */
1981         space->install_legacy_write_handler( 0xde00, 0xde00, FUNC(funplay_bank_w) );
1981         space.install_legacy_write_handler( 0xde00, 0xde00, FUNC(funplay_bank_w) );
19821982         break;
19831983      case SUPER_GAMES:      /* Type #  8 not working */
1984         space->install_legacy_write_handler( 0xdf00, 0xdf00, FUNC(supergames_bank_w) );
1984         space.install_legacy_write_handler( 0xdf00, 0xdf00, FUNC(supergames_bank_w) );
19851985         break;
19861986      case ATOMIC_POWER:   /* Type #  9 not working */
19871987         break;
r17963r17964
19961996      case MAGIC_FORMEL:   /* Type # 14 not working */
19971997         break;
19981998      case C64GS:             /* Type # 15 - up to 64 8k banks, loaded at 0x8000, banks chosen by writing to 0xde00 + bank */
1999         space->install_legacy_write_handler( 0xde00, 0xdeff, FUNC(c64gs_bank_w) );
1999         space.install_legacy_write_handler( 0xde00, 0xdeff, FUNC(c64gs_bank_w) );
20002000         break;
20012001      case DINAMIC:           /* Type # 17 - 16 8k banks, loaded at 0x8000, banks chosen by reading to 0xde00 + bank */
2002         space->install_legacy_read_handler( 0xde00, 0xdeff, FUNC(dinamic_bank_r) );
2002         space.install_legacy_read_handler( 0xde00, 0xdeff, FUNC(dinamic_bank_r) );
20032003         break;
20042004      case ZAXXON:      /* Type # 18 */
2005         space->install_legacy_read_handler( 0x8000, 0x9fff, FUNC(zaxxon_bank_r) );
2005         space.install_legacy_read_handler( 0x8000, 0x9fff, FUNC(zaxxon_bank_r) );
20062006         break;
20072007      case DOMARK:      /* Type # 19 */
2008         space->install_legacy_write_handler( 0xde00, 0xde00, FUNC(domark_bank_w) );
2008         space.install_legacy_write_handler( 0xde00, 0xde00, FUNC(domark_bank_w) );
20092009         break;
20102010      case SUPER_SNAP_5:   /* Type # 20 not working */
20112011         break;
20122012      case COMAL_80:          /* Type # 21 - 4 16k banks, loaded at 0x8000, banks chosen by writing to 0xde00 */
2013         space->install_legacy_write_handler( 0xde00, 0xde00, FUNC(comal80_bank_w) );
2013         space.install_legacy_write_handler( 0xde00, 0xde00, FUNC(comal80_bank_w) );
20142014         break;
20152015      case GENERIC_CRT:       /* Type #  0 - single bank, no bankswitch, loaded at start with correct size and place */
20162016      default:
trunk/src/mess/machine/hd63450.c
r17963r17964
237237
238238static void dma_transfer_start(device_t* device, int channel, int dir)
239239{
240   address_space *space = device->machine().firstcpu->space(AS_PROGRAM);
240   address_space &space = *device->machine().firstcpu->space(AS_PROGRAM);
241241   hd63450_t* dmac = get_safe_token(device);
242242   dmac->in_progress[channel] = 1;
243243   dmac->reg[channel].csr &= ~0xe0;
r17963r17964
245245   dmac->reg[channel].csr &= ~0x30;  // Reset Error and Normal termination bits
246246   if((dmac->reg[channel].ocr & 0x0c) != 0x00)  // Array chain or Link array chain
247247   {
248      dmac->reg[channel].mar = space->read_word(dmac->reg[channel].bar) << 16;
249      dmac->reg[channel].mar |= space->read_word(dmac->reg[channel].bar+2);
250      dmac->reg[channel].mtc = space->read_word(dmac->reg[channel].bar+4);
248      dmac->reg[channel].mar = space.read_word(dmac->reg[channel].bar) << 16;
249      dmac->reg[channel].mar |= space.read_word(dmac->reg[channel].bar+2);
250      dmac->reg[channel].mtc = space.read_word(dmac->reg[channel].bar+4);
251251      if(dmac->reg[channel].btc > 0)
252252         dmac->reg[channel].btc--;
253253   }
r17963r17964
314314
315315void hd63450_single_transfer(device_t* device, int x)
316316{
317   address_space *space = device->machine().firstcpu->space(AS_PROGRAM);
317   address_space &space = *device->machine().firstcpu->space(AS_PROGRAM);
318318   int data;
319319   int datasize = 1;
320320   hd63450_t* dmac = get_safe_token(device);
r17963r17964
328328               data = dmac->intf->dma_read[x](device->machine(),dmac->reg[x].mar);
329329               if(data == -1)
330330                  return;  // not ready to receive data
331               space->write_byte(dmac->reg[x].mar,data);
331               space.write_byte(dmac->reg[x].mar,data);
332332               datasize = 1;
333333            }
334334            else
r17963r17964
336336               switch(dmac->reg[x].ocr & 0x30)  // operation size
337337               {
338338               case 0x00:  // 8 bit
339                  data = space->read_byte(dmac->reg[x].dar);  // read from device address
340                  space->write_byte(dmac->reg[x].mar, data);  // write to memory address
339                  data = space.read_byte(dmac->reg[x].dar);  // read from device address
340                  space.write_byte(dmac->reg[x].mar, data);  // write to memory address
341341                  datasize = 1;
342342                  break;
343343               case 0x10:  // 16 bit
344                  data = space->read_word(dmac->reg[x].dar);  // read from device address
345                  space->write_word(dmac->reg[x].mar, data);  // write to memory address
344                  data = space.read_word(dmac->reg[x].dar);  // read from device address
345                  space.write_word(dmac->reg[x].mar, data);  // write to memory address
346346                  datasize = 2;
347347                  break;
348348               case 0x20:  // 32 bit
349                  data = space->read_word(dmac->reg[x].dar) << 16;  // read from device address
350                  data |= space->read_word(dmac->reg[x].dar+2);
351                  space->write_word(dmac->reg[x].mar, (data & 0xffff0000) >> 16);  // write to memory address
352                  space->write_word(dmac->reg[x].mar+2, data & 0x0000ffff);
349                  data = space.read_word(dmac->reg[x].dar) << 16;  // read from device address
350                  data |= space.read_word(dmac->reg[x].dar+2);
351                  space.write_word(dmac->reg[x].mar, (data & 0xffff0000) >> 16);  // write to memory address
352                  space.write_word(dmac->reg[x].mar+2, data & 0x0000ffff);
353353                  datasize = 4;
354354                  break;
355355               case 0x30:  // 8 bit packed (?)
356                  data = space->read_byte(dmac->reg[x].dar);  // read from device address
357                  space->write_byte(dmac->reg[x].mar, data);  // write to memory address
356                  data = space.read_byte(dmac->reg[x].dar);  // read from device address
357                  space.write_byte(dmac->reg[x].mar, data);  // write to memory address
358358                  datasize = 1;
359359                  break;
360360               }
r17963r17964
365365         {
366366            if(dmac->intf->dma_write[x])
367367            {
368               data = space->read_byte(dmac->reg[x].mar);
368               data = space.read_byte(dmac->reg[x].mar);
369369               dmac->intf->dma_write[x](device->machine(), dmac->reg[x].mar,data);
370370               datasize = 1;
371371            }
r17963r17964
374374               switch(dmac->reg[x].ocr & 0x30)  // operation size
375375               {
376376               case 0x00:  // 8 bit
377                  data = space->read_byte(dmac->reg[x].mar);  // read from memory address
378                  space->write_byte(dmac->reg[x].dar, data);  // write to device address
377                  data = space.read_byte(dmac->reg[x].mar);  // read from memory address
378                  space.write_byte(dmac->reg[x].dar, data);  // write to device address
379379                  datasize = 1;
380380                  break;
381381               case 0x10:  // 16 bit
382                  data = space->read_word(dmac->reg[x].mar);  // read from memory address
383                  space->write_word(dmac->reg[x].dar, data);  // write to device address
382                  data = space.read_word(dmac->reg[x].mar);  // read from memory address
383                  space.write_word(dmac->reg[x].dar, data);  // write to device address
384384                  datasize = 2;
385385                  break;
386386               case 0x20:  // 32 bit
387                  data = space->read_word(dmac->reg[x].mar) << 16;  // read from memory address
388                  data |= space->read_word(dmac->reg[x].mar+2);  // read from memory address
389                  space->write_word(dmac->reg[x].dar, (data & 0xffff0000) >> 16);  // write to device address
390                  space->write_word(dmac->reg[x].dar+2, data & 0x0000ffff);  // write to device address
387                  data = space.read_word(dmac->reg[x].mar) << 16;  // read from memory address
388                  data |= space.read_word(dmac->reg[x].mar+2);  // read from memory address
389                  space.write_word(dmac->reg[x].dar, (data & 0xffff0000) >> 16);  // write to device address
390                  space.write_word(dmac->reg[x].dar+2, data & 0x0000ffff);  // write to device address
391391                  datasize = 4;
392392                  break;
393393               case 0x30:  // 8 bit packed (?)
394                  data = space->read_byte(dmac->reg[x].mar);  // read from memory address
395                  space->write_byte(dmac->reg[x].dar, data);  // write to device address
394                  data = space.read_byte(dmac->reg[x].mar);  // read from memory address
395                  space.write_byte(dmac->reg[x].dar, data);  // write to device address
396396                  datasize = 1;
397397                  break;
398398               }
r17963r17964
424424            {
425425               dmac->reg[x].btc--;
426426               dmac->reg[x].bar+=6;
427               dmac->reg[x].mar = space->read_word(dmac->reg[x].bar) << 16;
428               dmac->reg[x].mar |= space->read_word(dmac->reg[x].bar+2);
429               dmac->reg[x].mtc = space->read_word(dmac->reg[x].bar+4);
427               dmac->reg[x].mar = space.read_word(dmac->reg[x].bar) << 16;
428               dmac->reg[x].mar |= space.read_word(dmac->reg[x].bar+2);
429               dmac->reg[x].mtc = space.read_word(dmac->reg[x].bar+4);
430430               return;
431431            }
432432            dmac->timer[x]->adjust(attotime::zero);
trunk/src/mess/machine/pc.c
r17963r17964
14051405   mess_init_pc_common(machine(), 0, NULL, pc_set_irq_line);
14061406}
14071407
1408static READ8_HANDLER( input_port_0_r ) { return space->machine().root_device().ioport("IN0")->read(); }
1408static READ8_HANDLER( input_port_0_r ) { return space.machine().root_device().ioport("IN0")->read(); }
14091409
14101410DRIVER_INIT_MEMBER(pc_state,pc1640)
14111411{
r17963r17964
14221422   mess_init_pc_common(machine(), PCCOMMON_KEYBOARD_PC, pc_set_keyb_int, pc_set_irq_line);
14231423
14241424   pc_vga_init(machine(), ::input_port_0_r, NULL);
1425   pc_vga_io_init(machine(), machine().device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, machine().device("maincpu")->memory().space(AS_IO), 0x0000);
1425   pc_vga_io_init(machine(), *machine().device("maincpu")->memory().space(AS_PROGRAM), 0xa0000, *machine().device("maincpu")->memory().space(AS_IO), 0x0000);
14261426}
14271427
14281428static IRQ_CALLBACK(pc_irq_callback)
trunk/src/mess/machine/pecom.c
r17963r17964
2727void pecom_state::machine_reset()
2828{
2929   UINT8 *rom = machine().root_device().memregion(CDP1802_TAG)->base();
30   address_space *space = machine().device(CDP1802_TAG)->memory().space(AS_PROGRAM);
30   address_space &space = *machine().device(CDP1802_TAG)->memory().space(AS_PROGRAM);
3131
3232
33   space->unmap_write(0x0000, 0x3fff);
34   space->install_write_bank(0x4000, 0x7fff, "bank2");
35   space->unmap_write(0xf000, 0xf7ff);
36   space->unmap_write(0xf800, 0xffff);
37   space->install_read_bank (0xf000, 0xf7ff, "bank3");
38   space->install_read_bank (0xf800, 0xffff, "bank4");
33   space.unmap_write(0x0000, 0x3fff);
34   space.install_write_bank(0x4000, 0x7fff, "bank2");
35   space.unmap_write(0xf000, 0xf7ff);
36   space.unmap_write(0xf800, 0xffff);
37   space.install_read_bank (0xf000, 0xf7ff, "bank3");
38   space.install_read_bank (0xf800, 0xffff, "bank4");
3939   membank("bank1")->set_base(rom + 0x8000);
4040   membank("bank2")->set_base(machine().device<ram_device>(RAM_TAG)->pointer() + 0x4000);
4141   membank("bank3")->set_base(rom + 0xf000);
trunk/src/mess/machine/dccons.c
r17963r17964
147147
148148static READ32_HANDLER( atapi_r )
149149{
150   running_machine &machine = space->machine();
150   running_machine &machine = space.machine();
151151   int reg, data;
152152
153153   if (mem_mask == 0x0000ffff)   // word-wide command read
r17963r17964
261261      }
262262      #endif
263263
264      mame_printf_debug("ATAPI: read reg %d = %x (PC=%x)\n", reg, data, space->device().safe_pc());
264      mame_printf_debug("ATAPI: read reg %d = %x (PC=%x)\n", reg, data, space.device().safe_pc());
265265   }
266266
267267//  printf( "atapi_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
r17963r17964
270270
271271static WRITE32_HANDLER( atapi_w )
272272{
273   running_machine &machine = space->machine();
273   running_machine &machine = space.machine();
274274   int reg;
275275
276276//  printf( "atapi_w( %08x, %08x, %08x )\n", offset, mem_mask, data );
r17963r17964
369369
370370               case 0x45: // PLAY
371371                  atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_BSY;
372                  atapi_timer->adjust( downcast<cpu_device *>(&space->device())->cycles_to_attotime(ATAPI_CYCLES_PER_SECTOR ) );
372                  atapi_timer->adjust( downcast<cpu_device *>(&space.device())->cycles_to_attotime(ATAPI_CYCLES_PER_SECTOR ) );
373373                  break;
374374            }
375375
r17963r17964
420420      }
421421#endif
422422      atapi_regs[reg] = data;
423//      mame_printf_debug("ATAPI: reg %d = %x (offset %x mask %x PC=%x)\n", reg, data, offset, mem_mask, space->device().safe_pc());
423//      mame_printf_debug("ATAPI: reg %d = %x (offset %x mask %x PC=%x)\n", reg, data, offset, mem_mask, space.device().safe_pc());
424424
425425      if (reg == ATAPI_REG_CMDSTATUS)
426426      {
427         printf("ATAPI command %x issued! (PC=%x)\n", data, space->device().safe_pc());
427         printf("ATAPI command %x issued! (PC=%x)\n", data, space.device().safe_pc());
428428
429429         switch (data)
430430         {
r17963r17964
491491               atapi_regs[ATAPI_REG_COUNTLOW] = 0;
492492               atapi_regs[ATAPI_REG_COUNTHIGH] = 2;
493493
494               gdrom_raise_irq(space->machine());
494               gdrom_raise_irq(space.machine());
495495               break;
496496
497497            case 0xef:   // SET FEATURES
r17963r17964
512512               atapi_data_ptr = 0;
513513               atapi_data_len = 0;
514514
515               gdrom_raise_irq(space->machine());
515               gdrom_raise_irq(space.machine());
516516               break;
517517
518518            default:
r17963r17964
603603      off=offset << 1;
604604   }
605605
606//  printf("gdrom_r: @ %x (off %x), mask %llx (PC %x)\n", offset, off, mem_mask, space->device().safe_pc());
606//  printf("gdrom_r: @ %x (off %x), mask %llx (PC %x)\n", offset, off, mem_mask, space.device().safe_pc());
607607
608608   if (offset == 3)
609609   {
r17963r17964
632632      off=offset << 1;
633633   }
634634
635//  printf("GDROM: [%08x=%x]write %llx to %x, mask %llx (PC %x)\n", 0x5f7000+off*4, dat, data, offset, mem_mask, space->device().safe_pc());
635//  printf("GDROM: [%08x=%x]write %llx to %x, mask %llx (PC %x)\n", 0x5f7000+off*4, dat, data, offset, mem_mask, space.device().safe_pc());
636636
637637   if (off >= 0x20)
638638   {
r17963r17964
667667
668668READ64_HANDLER( dc_mess_g1_ctrl_r )
669669{
670   dc_state *state = space->machine().driver_data<dc_state>();
670   dc_state *state = space.machine().driver_data<dc_state>();
671671   int reg;
672672   UINT64 shift;
673673
674   reg = decode_reg32_64(space->machine(), offset, mem_mask, &shift);
674   reg = decode_reg32_64(space.machine(), offset, mem_mask, &shift);
675675   mame_printf_verbose("G1CTRL:  Unmapped read %08x\n", 0x5f7400+reg*4);
676676   return (UINT64)state->g1bus_regs[reg] << shift;
677677}
678678
679679WRITE64_HANDLER( dc_mess_g1_ctrl_w )
680680{
681   dc_state *state = space->machine().driver_data<dc_state>();
681   dc_state *state = space.machine().driver_data<dc_state>();
682682   int reg;
683683   UINT64 shift;
684684   UINT32 dat; //, old
685685
686   reg = decode_reg32_64(space->machine(), offset, mem_mask, &shift);
686   reg = decode_reg32_64(space.machine(), offset, mem_mask, &shift);
687687   dat = (UINT32)(data >> shift);
688688//  old = state->g1bus_regs[reg];
689689
r17963r17964
701701         }
702702
703703         atapi_xferbase = state->g1bus_regs[SB_GDSTAR];
704         atapi_timer->adjust(space->machine().device<cpu_device>("maincpu")->cycles_to_attotime((ATAPI_CYCLES_PER_SECTOR * (atapi_xferlen/2048))));
704         atapi_timer->adjust(space.machine().device<cpu_device>("maincpu")->cycles_to_attotime((ATAPI_CYCLES_PER_SECTOR * (atapi_xferlen/2048))));
705705      }
706706      break;
707707   }
trunk/src/mess/machine/sgi.c
r17963r17964
7878   {
7979   case 0x0000:
8080   case 0x0004:
81      //verboselog( space->machine(), 3, "CPU Control 0 Read: %08x (%08x)\n", pMC->nCPUControl0, mem_mask );
81      //verboselog( space.machine(), 3, "CPU Control 0 Read: %08x (%08x)\n", pMC->nCPUControl0, mem_mask );
8282      return pMC->nCPUControl0;
8383   case 0x0008:
8484   case 0x000c:
85      //verboselog( space->machine(), 2, "CPU Control 1 Read: %08x (%08x)\n", pMC->nCPUControl1, mem_mask );
85      //verboselog( space.machine(), 2, "CPU Control 1 Read: %08x (%08x)\n", pMC->nCPUControl1, mem_mask );
8686      return pMC->nCPUControl1;
8787   case 0x0010:
8888   case 0x0014:
89      //verboselog( space->machine(), 2, "Watchdog Timer Read: %08x (%08x)\n", pMC->nWatchdog, mem_mask );
89      //verboselog( space.machine(), 2, "Watchdog Timer Read: %08x (%08x)\n", pMC->nWatchdog, mem_mask );
9090      return pMC->nWatchdog;
9191   case 0x0018:
9292   case 0x001c:
93      //verboselog( space->machine(), 2, "System ID Read: %08x (%08x)\n", pMC->nSysID, mem_mask );
93      //verboselog( space.machine(), 2, "System ID Read: %08x (%08x)\n", pMC->nSysID, mem_mask );
9494      return pMC->nSysID;
9595   case 0x0028:
9696   case 0x002c:
97      //verboselog( space->machine(), 2, "RPSS Divider Read: %08x (%08x)\n", pMC->nRPSSDiv, mem_mask );
97      //verboselog( space.machine(), 2, "RPSS Divider Read: %08x (%08x)\n", pMC->nRPSSDiv, mem_mask );
9898      return pMC->nRPSSDiv;
9999   case 0x0030:
100100   case 0x0034:
101      //verboselog( space->machine(), 2, "R4000 EEPROM Read\n" );
101      //verboselog( space.machine(), 2, "R4000 EEPROM Read\n" );
102102      return 0;
103103   case 0x0040:
104104   case 0x0044:
105      //verboselog( space->machine(), 2, "Refresh Count Preload Read: %08x (%08x)\n", pMC->nRefCntPreload, mem_mask );
105      //verboselog( space.machine(), 2, "Refresh Count Preload Read: %08x (%08x)\n", pMC->nRefCntPreload, mem_mask );
106106      return pMC->nRefCntPreload;
107107   case 0x0048:
108108   case 0x004c:
109      //verboselog( space->machine(), 2, "Refresh Count Read: %08x (%08x)\n", pMC->nRefCnt, mem_mask );
109      //verboselog( space.machine(), 2, "Refresh Count Read: %08x (%08x)\n", pMC->nRefCnt, mem_mask );
110110      return pMC->nRefCnt;
111111   case 0x0080:
112112   case 0x0084:
113      //verboselog( space->machine(), 2, "GIO64 Arbitration Param Read: %08x (%08x)\n", pMC->nGIO64ArbParam, mem_mask );
113      //verboselog( space.machine(), 2, "GIO64 Arbitration Param Read: %08x (%08x)\n", pMC->nGIO64ArbParam, mem_mask );
114114      return pMC->nGIO64ArbParam;
115115   case 0x0088:
116116   case 0x008c:
117      //verboselog( space->machine(), 2, "Arbiter CPU Time Read: %08x (%08x)\n", pMC->nArbCPUTime, mem_mask );
117      //verboselog( space.machine(), 2, "Arbiter CPU Time Read: %08x (%08x)\n", pMC->nArbCPUTime, mem_mask );
118118      return pMC->nArbCPUTime;
119119   case 0x0098:
120120   case 0x009c:
121      //verboselog( space->machine(), 2, "Arbiter Long Burst Time Read: %08x (%08x)\n", pMC->nArbBurstTime, mem_mask );
121      //verboselog( space.machine(), 2, "Arbiter Long Burst Time Read: %08x (%08x)\n", pMC->nArbBurstTime, mem_mask );
122122      return pMC->nArbBurstTime;
123123   case 0x00c0:
124124   case 0x00c4:
125      //verboselog( space->machine(), 3, "Memory Configuration Register 0 Read: %08x (%08x)\n", pMC->nMemCfg0, mem_mask );
125      //verboselog( space.machine(), 3, "Memory Configuration Register 0 Read: %08x (%08x)\n", pMC->nMemCfg0, mem_mask );
126126      return pMC->nMemCfg0;
127127   case 0x00c8:
128128   case 0x00cc:
129      //verboselog( space->machine(), 3, "Memory Configuration Register 1 Read: %08x (%08x)\n", pMC->nMemCfg1, mem_mask );
129      //verboselog( space.machine(), 3, "Memory Configuration Register 1 Read: %08x (%08x)\n", pMC->nMemCfg1, mem_mask );
130130      return pMC->nMemCfg1;
131131   case 0x00d0:
132132   case 0x00d4:
133      //verboselog( space->machine(), 2, "CPU Memory Access Config Params Read: %08x (%08x)\n", pMC->nCPUMemAccCfg, mem_mask );
133      //verboselog( space.machine(), 2, "CPU Memory Access Config Params Read: %08x (%08x)\n", pMC->nCPUMemAccCfg, mem_mask );
134134      return pMC->nCPUMemAccCfg;
135135   case 0x00d8:
136136   case 0x00dc:
137      //verboselog( space->machine(), 2, "GIO Memory Access Config Params Read: %08x (%08x)\n", pMC->nGIOMemAccCfg, mem_mask );
137      //verboselog( space.machine(), 2, "GIO Memory Access Config Params Read: %08x (%08x)\n", pMC->nGIOMemAccCfg, mem_mask );
138138      return pMC->nGIOMemAccCfg;
139139   case 0x00e0:
140140   case 0x00e4:
141      //verboselog( space->machine(), 2, "CPU Error Address Read: %08x (%08x)\n", pMC->nCPUErrorAddr, mem_mask );
141      //verboselog( space.machine(), 2, "CPU Error Address Read: %08x (%08x)\n", pMC->nCPUErrorAddr, mem_mask );
142142      return pMC->nCPUErrorAddr;
143143   case 0x00e8:
144144   case 0x00ec:
145      //verboselog( space->machine(), 2, "CPU Error Status Read: %08x (%08x)\n", pMC->nCPUErrorStatus, mem_mask );
145      //verboselog( space.machine(), 2, "CPU Error Status Read: %08x (%08x)\n", pMC->nCPUErrorStatus, mem_mask );
146146      return pMC->nCPUErrorStatus;
147147   case 0x00f0:
148148   case 0x00f4:
149      //verboselog( space->machine(), 2, "GIO Error Address Read: %08x (%08x)\n", pMC->nGIOErrorAddr, mem_mask );
149      //verboselog( space.machine(), 2, "GIO Error Address Read: %08x (%08x)\n", pMC->nGIOErrorAddr, mem_mask );
150150      return pMC->nGIOErrorAddr;
151151   case 0x00f8:
152152   case 0x00fc:
153      //verboselog( space->machine(), 2, "GIO Error Status Read: %08x (%08x)\n", pMC->nGIOErrorStatus, mem_mask );
153      //verboselog( space.machine(), 2, "GIO Error Status Read: %08x (%08x)\n", pMC->nGIOErrorStatus, mem_mask );
154154      return pMC->nGIOErrorStatus;
155155   case 0x0100:
156156   case 0x0104:
157      //verboselog( space->machine(), 2, "System Semaphore Read: %08x (%08x)\n", pMC->nSysSemaphore, mem_mask );
157      //verboselog( space.machine(), 2, "System Semaphore Read: %08x (%08x)\n", pMC->nSysSemaphore, mem_mask );
158158      return pMC->nSysSemaphore;
159159   case 0x0108:
160160   case 0x010c:
161      //verboselog( space->machine(), 2, "GIO Lock Read: %08x (%08x)\n", pMC->nGIOLock, mem_mask );
161      //verboselog( space.machine(), 2, "GIO Lock Read: %08x (%08x)\n", pMC->nGIOLock, mem_mask );
162162      return pMC->nGIOLock;
163163   case 0x0110:
164164   case 0x0114:
165      //verboselog( space->machine(), 2, "EISA Lock Read: %08x (%08x)\n", pMC->nEISALock, mem_mask );
165      //verboselog( space.machine(), 2, "EISA Lock Read: %08x (%08x)\n", pMC->nEISALock, mem_mask );
166166      return pMC->nEISALock;
167167   case 0x0150:
168168   case 0x0154:
169      //verboselog( space->machine(), 2, "GIO64 Translation Address Mask Read: %08x (%08x)\n", pMC->nGIO64TransMask, mem_mask );
169      //verboselog( space.machine(), 2, "GIO64 Translation Address Mask Read: %08x (%08x)\n", pMC->nGIO64TransMask, mem_mask );
170170      return pMC->nGIO64TransMask;
171171   case 0x0158:
172172   case 0x015c:
173      //verboselog( space->machine(), 2, "GIO64 Translation Address Substitution Bits Read: %08x (%08x)\n", pMC->nGIO64Subst, mem_mask );
173      //verboselog( space.machine(), 2, "GIO64 Translation Address Substitution Bits Read: %08x (%08x)\n", pMC->nGIO64Subst, mem_mask );
174174      return pMC->nGIO64Subst;
175175   case 0x0160:
176176   case 0x0164:
177      //verboselog( space->machine(), 2, "DMA Interrupt Cause: %08x (%08x)\n", pMC->nDMAIntrCause, mem_mask );
177      //verboselog( space.machine(), 2, "DMA Interrupt Cause: %08x (%08x)\n", pMC->nDMAIntrCause, mem_mask );
178178      return pMC->nDMAIntrCause;
179179   case 0x0168:
180180   case 0x016c:
181      //verboselog( space->machine(), 2, "DMA Control Read: %08x (%08x)\n", pMC->nDMAControl, mem_mask );
181      //verboselog( space.machine(), 2, "DMA Control Read: %08x (%08x)\n", pMC->nDMAControl, mem_mask );
182182      return pMC->nDMAControl;
183183   case 0x0180:
184184   case 0x0184:
185      //verboselog( space->machine(), 2, "DMA TLB Entry 0 High Read: %08x (%08x)\n", pMC->nDMATLBEntry0Hi, mem_mask );
185      //verboselog( space.machine(), 2, "DMA TLB Entry 0 High Read: %08x (%08x)\n", pMC->nDMATLBEntry0Hi, mem_mask );
186186      return pMC->nDMATLBEntry0Hi;
187187   case 0x0188:
188188   case 0x018c:
189      //verboselog( space->machine(), 2, "DMA TLB Entry 0 Low Read: %08x (%08x)\n", pMC->nDMATLBEntry0Lo, mem_mask );
189      //verboselog( space.machine(), 2, "DMA TLB Entry 0 Low Read: %08x (%08x)\n", pMC->nDMATLBEntry0Lo, mem_mask );
190190      return pMC->nDMATLBEntry0Lo;
191191   case 0x0190:
192192   case 0x0194:
193      //verboselog( space->machine(), 2, "DMA TLB Entry 1 High Read: %08x (%08x)\n", pMC->nDMATLBEntry1Hi, mem_mask );
193      //verboselog( space.machine(), 2, "DMA TLB Entry 1 High Read: %08x (%08x)\n", pMC->nDMATLBEntry1Hi, mem_mask );
194194      return pMC->nDMATLBEntry1Hi;
195195   case 0x0198:
196196   case 0x019c:
197      //verboselog( space->machine(), 2, "DMA TLB Entry 1 Low Read: %08x (%08x)\n", pMC->nDMATLBEntry1Lo, mem_mask );
197      //verboselog( space.machine(), 2, "DMA TLB Entry 1 Low Read: %08x (%08x)\n", pMC->nDMATLBEntry1Lo, mem_mask );
198198      return pMC->nDMATLBEntry1Lo;
199199   case 0x01a0:
200200   case 0x01a4:
201      //verboselog( space->machine(), 2, "DMA TLB Entry 2 High Read: %08x (%08x)\n", pMC->nDMATLBEntry2Hi, mem_mask );
201      //verboselog( space.machine(), 2, "DMA TLB Entry 2 High Read: %08x (%08x)\n", pMC->nDMATLBEntry2Hi, mem_mask );
202202      return pMC->nDMATLBEntry2Hi;
203203   case 0x01a8:
204204   case 0x01ac:
205      //verboselog( space->machine(), 2, "DMA TLB Entry 2 Low Read: %08x (%08x)\n", pMC->nDMATLBEntry2Lo, mem_mask );
205      //verboselog( space.machine(), 2, "DMA TLB Entry 2 Low Read: %08x (%08x)\n", pMC->nDMATLBEntry2Lo, mem_mask );
206206      return pMC->nDMATLBEntry2Lo;
207207   case 0x01b0:
208208   case 0x01b4:
209      //verboselog( space->machine(), 2, "DMA TLB Entry 3 High Read: %08x (%08x)\n", pMC->nDMATLBEntry3Hi, mem_mask );
209      //verboselog( space.machine(), 2, "DMA TLB Entry 3 High Read: %08x (%08x)\n", pMC->nDMATLBEntry3Hi, mem_mask );
210210      return pMC->nDMATLBEntry3Hi;
211211   case 0x01b8:
212212   case 0x01bc:
213      //verboselog( space->machine(), 2, "DMA TLB Entry 3 Low Read: %08x (%08x)\n", pMC->nDMATLBEntry3Lo, mem_mask );
213      //verboselog( space.machine(), 2, "DMA TLB Entry 3 Low Read: %08x (%08x)\n", pMC->nDMATLBEntry3Lo, mem_mask );
214214      return pMC->nDMATLBEntry3Lo;
215215   case 0x1000:
216216   case 0x1004:
217      //verboselog( space->machine(), 2, "RPSS 100ns Counter Read: %08x (%08x)\n", pMC->nRPSSCounter, mem_mask );
217      //verboselog( space.machine(), 2, "RPSS 100ns Counter Read: %08x (%08x)\n", pMC->nRPSSCounter, mem_mask );
218218      return pMC->nRPSSCounter;
219219   case 0x2000:
220220   case 0x2004:
221221   case 0x2008:
222222   case 0x200c:
223      //verboselog( space->machine(), 0, "DMA Memory Address Read: %08x (%08x)\n", pMC->nDMAMemAddr, mem_mask );
223      //verboselog( space.machine(), 0, "DMA Memory Address Read: %08x (%08x)\n", pMC->nDMAMemAddr, mem_mask );
224224      return pMC->nDMAMemAddr;
225225   case 0x2010:
226226   case 0x2014:
227      //verboselog( space->machine(), 0, "DMA Line Count and Width Read: %08x (%08x)\n", pMC->nDMALineCntWidth, mem_mask );
227      //verboselog( space.machine(), 0, "DMA Line Count and Width Read: %08x (%08x)\n", pMC->nDMALineCntWidth, mem_mask );
228228      return pMC->nDMALineCntWidth;
229229   case 0x2018:
230230   case 0x201c:
231      //verboselog( space->machine(), 0, "DMA Line Zoom and Stride Read: %08x (%08x)\n", pMC->nDMALineZoomStride, mem_mask );
231      //verboselog( space.machine(), 0, "DMA Line Zoom and Stride Read: %08x (%08x)\n", pMC->nDMALineZoomStride, mem_mask );
232232      return pMC->nDMALineZoomStride;
233233   case 0x2020:
234234   case 0x2024:
235235   case 0x2028:
236236   case 0x202c:
237      //verboselog( space->machine(), 0, "DMA GIO64 Address Read: %08x (%08x)\n", pMC->nDMAGIO64Addr, mem_mask );
237      //verboselog( space.machine(), 0, "DMA GIO64 Address Read: %08x (%08x)\n", pMC->nDMAGIO64Addr, mem_mask );
238238      return pMC->nDMAGIO64Addr;
239239   case 0x2030:
240240   case 0x2034:
241      //verboselog( space->machine(), 0, "DMA Mode Write: %08x (%08x)\n", pMC->nDMAMode, mem_mask );
241      //verboselog( space.machine(), 0, "DMA Mode Write: %08x (%08x)\n", pMC->nDMAMode, mem_mask );
242242      return pMC->nDMAMode;
243243   case 0x2038:
244244   case 0x203c:
245      //verboselog( space->machine(), 0, "DMA Zoom Count Read: %08x (%08x)\n", pMC->nDMAZoomByteCnt, mem_mask );
245      //verboselog( space.machine(), 0, "DMA Zoom Count Read: %08x (%08x)\n", pMC->nDMAZoomByteCnt, mem_mask );
246246      return pMC->nDMAZoomByteCnt;
247247//  case 0x2040:
248248//  case 0x2044:
249//      //verboselog( space->machine(), 2, "DMA Start Write: %08x (%08x)\n", data, mem_mask );
249//      //verboselog( space.machine(), 2, "DMA Start Write: %08x (%08x)\n", data, mem_mask );
250250      // Start DMA
251251//      pMC->nDMARunning = 1;
252252//      break;
253253   case 0x2048:
254254   case 0x204c:
255      //verboselog( space->machine(), 0, "VDMA Running Read: %08x (%08x)\n", pMC->nDMARunning, mem_mask );
255      //verboselog( space.machine(), 0, "VDMA Running Read: %08x (%08x)\n", pMC->nDMARunning, mem_mask );
256256      if( pMC->nDMARunning == 1 )
257257      {
258258         pMC->nDMARunning = 0;
r17963r17964
263263         return 0;
264264      }
265265   }
266   //verboselog( space->machine(), 0, "Unmapped MC read: 0x%08x (%08x)\n", 0x1fa00000 + offset, mem_mask );
266   //verboselog( space.machine(), 0, "Unmapped MC read: 0x%08x (%08x)\n", 0x1fa00000 + offset, mem_mask );
267267   return 0;
268268}
269269
r17963r17964
274274   {
275275   case 0x0000:
276276   case 0x0004:
277      //verboselog( space->machine(), 2, "CPU Control 0 Write: %08x (%08x)\n", data, mem_mask );
277      //verboselog( space.machine(), 2, "CPU Control 0 Write: %08x (%08x)\n", data, mem_mask );
278278      pMC->nCPUControl0 = data;
279279      break;
280280   case 0x0008:
281281   case 0x000c:
282      //verboselog( space->machine(), 2, "CPU Control 1 Write: %08x (%08x)\n", data, mem_mask );
282      //verboselog( space.machine(), 2, "CPU Control 1 Write: %08x (%08x)\n", data, mem_mask );
283283      pMC->nCPUControl1 = data;
284284      break;
285285   case 0x0010:
286286   case 0x0014:
287      //verboselog( space->machine(), 2, "Watchdog Timer Clear" );
287      //verboselog( space.machine(), 2, "Watchdog Timer Clear" );
288288      pMC->nWatchdog = 0;
289289      break;
290290   case 0x0028:
291291   case 0x002c:
292      //verboselog( space->machine(), 2, "RPSS Divider Write: %08x (%08x)\n", data, mem_mask );
292      //verboselog( space.machine(), 2, "RPSS Divider Write: %08x (%08x)\n", data, mem_mask );
293293      pMC->nRPSSDiv = data;
294294      break;
295295   case 0x0030:
296296   case 0x0034:
297      //verboselog( space->machine(), 2, "R4000 EEPROM Write\n" );
297      //verboselog( space.machine(), 2, "R4000 EEPROM Write\n" );
298298      break;
299299   case 0x0040:
300300   case 0x0044:
301      //verboselog( space->machine(), 2, "Refresh Count Preload Write: %08x (%08x)\n", data, mem_mask );
301      //verboselog( space.machine(), 2, "Refresh Count Preload Write: %08x (%08x)\n", data, mem_mask );
302302      pMC->nRefCntPreload = data;
303303      break;
304304   case 0x0080:
305305   case 0x0084:
306      //verboselog( space->machine(), 2, "GIO64 Arbitration Param Write: %08x (%08x)\n", data, mem_mask );
306      //verboselog( space.machine(), 2, "GIO64 Arbitration Param Write: %08x (%08x)\n", data, mem_mask );
307307      pMC->nGIO64ArbParam = data;
308308      break;
309309   case 0x0088:
310310   case 0x008c:
311      //verboselog( space->machine(), 3, "Arbiter CPU Time Write: %08x (%08x)\n", data, mem_mask );
311      //verboselog( space.machine(), 3, "Arbiter CPU Time Write: %08x (%08x)\n", data, mem_mask );
312312      pMC->nArbCPUTime = data;
313313      break;
314314   case 0x0098:
315315   case 0x009c:
316      //verboselog( space->machine(), 3, "Arbiter Long Burst Time Write: %08x (%08x)\n", data, mem_mask );
316      //verboselog( space.machine(), 3, "Arbiter Long Burst Time Write: %08x (%08x)\n", data, mem_mask );
317317      pMC->nArbBurstTime = data;
318318      break;
319319   case 0x00c0:
320320   case 0x00c4:
321      //verboselog( space->machine(), 3, "Memory Configuration Register 0 Write: %08x (%08x)\n", data, mem_mask );
321      //verboselog( space.machine(), 3, "Memory Configuration Register 0 Write: %08x (%08x)\n", data, mem_mask );
322322      pMC->nMemCfg0 = data;
323323      break;
324324   case 0x00c8:
325325   case 0x00cc:
326      //verboselog( space->machine(), 3, "Memory Configuration Register 1 Write: %08x (%08x)\n", data, mem_mask );
326      //verboselog( space.machine(), 3, "Memory Configuration Register 1 Write: %08x (%08x)\n", data, mem_mask );
327327      pMC->nMemCfg1 = data;
328328      break;
329329   case 0x00d0:
330330   case 0x00d4:
331      //verboselog( space->machine(), 2, "CPU Memory Access Config Params Write: %08x (%08x)\n", data, mem_mask );
331      //verboselog( space.machine(), 2, "CPU Memory Access Config Params Write: %08x (%08x)\n", data, mem_mask );
332332      pMC->nCPUMemAccCfg = data;
333333      break;
334334   case 0x00d8:
335335   case 0x00dc:
336      //verboselog( space->machine(), 2, "GIO Memory Access Config Params Write: %08x (%08x)\n", data, mem_mask );
336      //verboselog( space.machine(), 2, "GIO Memory Access Config Params Write: %08x (%08x)\n", data, mem_mask );
337337      pMC->nGIOMemAccCfg = data;
338338      break;
339339   case 0x00e8:
340340   case 0x00ec:
341      //verboselog( space->machine(), 2, "CPU Error Status Clear\n" );
341      //verboselog( space.machine(), 2, "CPU Error Status Clear\n" );
342342      pMC->nCPUErrorStatus = 0;
343343      break;
344344   case 0x00f8:
345345   case 0x00fc:
346      //verboselog( space->machine(), 2, "GIO Error Status Clear\n" );
346      //verboselog( space.machine(), 2, "GIO Error Status Clear\n" );
347347      pMC->nGIOErrorStatus = 0;
348348      break;
349349   case 0x0100:
350350   case 0x0104:
351      //verboselog( space->machine(), 2, "System Semaphore Write: %08x (%08x)\n", data, mem_mask );
351      //verboselog( space.machine(), 2, "System Semaphore Write: %08x (%08x)\n", data, mem_mask );
352352      pMC->nSysSemaphore = data;
353353      break;
354354   case 0x0108:
355355   case 0x010c:
356      //verboselog( space->machine(), 2, "GIO Lock Write: %08x (%08x)\n", data, mem_mask );
356      //verboselog( space.machine(), 2, "GIO Lock Write: %08x (%08x)\n", data, mem_mask );
357357      pMC->nGIOLock = data;
358358      break;
359359   case 0x0110:
360360   case 0x0114:
361      //verboselog( space->machine(), 2, "EISA Lock Write: %08x (%08x)\n", data, mem_mask );
361      //verboselog( space.machine(), 2, "EISA Lock Write: %08x (%08x)\n", data, mem_mask );
362362      pMC->nEISALock = data;
363363      break;
364364   case 0x0150:
365365   case 0x0154:
366      //verboselog( space->machine(), 2, "GIO64 Translation Address Mask Write: %08x (%08x)\n", data, mem_mask );
366      //verboselog( space.machine(), 2, "GIO64 Translation Address Mask Write: %08x (%08x)\n", data, mem_mask );
367367      pMC->nGIO64TransMask = data;
368368      break;
369369   case 0x0158:
370370   case 0x015c:
371      //verboselog( space->machine(), 2, "GIO64 Translation Address Substitution Bits Write: %08x (%08x)\n", data, mem_mask );
371      //verboselog( space.machine(), 2, "GIO64 Translation Address Substitution Bits Write: %08x (%08x)\n", data, mem_mask );
372372      pMC->nGIO64Subst = data;
373373      break;
374374   case 0x0160:
375375   case 0x0164:
376      //verboselog( space->machine(), 0, "DMA Interrupt Cause Write: %08x (%08x)\n", data, mem_mask );
376      //verboselog( space.machine(), 0, "DMA Interrupt Cause Write: %08x (%08x)\n", data, mem_mask );
377377      pMC->nDMAIntrCause = data;
378378      break;
379379   case 0x0168:
380380   case 0x016c:
381      //verboselog( space->machine(), 0, "DMA Control Write: %08x (%08x)\n", data, mem_mask );
381      //verboselog( space.machine(), 0, "DMA Control Write: %08x (%08x)\n", data, mem_mask );
382382      pMC->nDMAControl = data;
383383      break;
384384   case 0x0180:
385385   case 0x0184:
386      //verboselog( space->machine(), 0, "DMA TLB Entry 0 High Write: %08x (%08x)\n", data, mem_mask );
386      //verboselog( space.machine(), 0, "DMA TLB Entry 0 High Write: %08x (%08x)\n", data, mem_mask );
387387      pMC->nDMATLBEntry0Hi = data;
388388      break;
389389   case 0x0188:
390390   case 0x018c:
391      //verboselog( space->machine(), 0, "DMA TLB Entry 0 Low Write: %08x (%08x)\n", data, mem_mask );
391      //verboselog( space.machine(), 0, "DMA TLB Entry 0 Low Write: %08x (%08x)\n", data, mem_mask );
392392      pMC->nDMATLBEntry0Lo = data;
393393      break;
394394   case 0x0190:
395395   case 0x0194:
396      //verboselog( space->machine(), 0, "DMA TLB Entry 1 High Write: %08x (%08x)\n", data, mem_mask );
396      //verboselog( space.machine(), 0, "DMA TLB Entry 1 High Write: %08x (%08x)\n", data, mem_mask );
397397      pMC->nDMATLBEntry1Hi = data;
398398      break;
399399   case 0x0198:
400400   case 0x019c:
401      //verboselog( space->machine(), 0, "DMA TLB Entry 1 Low Write: %08x (%08x)\n", data, mem_mask );
401      //verboselog( space.machine(), 0, "DMA TLB Entry 1 Low Write: %08x (%08x)\n", data, mem_mask );
402402      pMC->nDMATLBEntry1Lo = data;
403403      break;
404404   case 0x01a0:
405405   case 0x01a4:
406      //verboselog( space->machine(), 0, "DMA TLB Entry 2 High Write: %08x (%08x)\n", data, mem_mask );
406      //verboselog( space.machine(), 0, "DMA TLB Entry 2 High Write: %08x (%08x)\n", data, mem_mask );
407407      pMC->nDMATLBEntry2Hi = data;
408408      break;
409409   case 0x01a8:
410410   case 0x01ac:
411      //verboselog( space->machine(), 0, "DMA TLB Entry 2 Low Write: %08x (%08x)\n", data, mem_mask );
411      //verboselog( space.machine(), 0, "DMA TLB Entry 2 Low Write: %08x (%08x)\n", data, mem_mask );
412412      pMC->nDMATLBEntry2Lo = data;
413413      break;
414414   case 0x01b0:
415415   case 0x01b4:
416      //verboselog( space->machine(), 0, "DMA TLB Entry 3 High Write: %08x (%08x)\n", data, mem_mask );
416      //verboselog( space.machine(), 0, "DMA TLB Entry 3 High Write: %08x (%08x)\n", data, mem_mask );
417417      pMC->nDMATLBEntry3Hi = data;
418418      break;
419419   case 0x01b8:
420420   case 0x01bc:
421      //verboselog( space->machine(), 0, "DMA TLB Entry 3 Low Write: %08x (%08x)\n", data, mem_mask );
421      //verboselog( space.machine(), 0, "DMA TLB Entry 3 Low Write: %08x (%08x)\n", data, mem_mask );
422422      pMC->nDMATLBEntry3Lo = data;
423423      break;
424424   case 0x2000:
425425   case 0x2004:
426      //verboselog( space->machine(), 0, "DMA Memory Address Write: %08x (%08x)\n", data, mem_mask );
426      //verboselog( space.machine(), 0, "DMA Memory Address Write: %08x (%08x)\n", data, mem_mask );
427427      pMC->nDMAMemAddr = data;
428428      break;
429429   case 0x2008:
430430   case 0x200c:
431      //verboselog( space->machine(), 0, "DMA Memory Address + Default Params Write: %08x (%08x)\n", data, mem_mask );
431      //verboselog( space.machine(), 0, "DMA Memory Address + Default Params Write: %08x (%08x)\n", data, mem_mask );
432432      pMC->nDMAMemAddr = data;
433433      break;
434434   case 0x2010:
435435   case 0x2014:
436      //verboselog( space->machine(), 0, "DMA Line Count and Width Write: %08x (%08x)\n", data, mem_mask );
436      //verboselog( space.machine(), 0, "DMA Line Count and Width Write: %08x (%08x)\n", data, mem_mask );
437437      pMC->nDMALineCntWidth = data;
438438      break;
439439   case 0x2018:
440440   case 0x201c:
441      //verboselog( space->machine(), 0, "DMA Line Zoom and Stride Write: %08x (%08x)\n", data, mem_mask );
441      //verboselog( space.machine(), 0, "DMA Line Zoom and Stride Write: %08x (%08x)\n", data, mem_mask );
442442      pMC->nDMALineZoomStride = data;
443443      break;
444444   case 0x2020:
445445   case 0x2024:
446      //verboselog( space->machine(), 0, "DMA GIO64 Address Write: %08x (%08x)\n", data, mem_mask );
446      //verboselog( space.machine(), 0, "DMA GIO64 Address Write: %08x (%08x)\n", data, mem_mask );
447447      pMC->nDMAGIO64Addr = data;
448448      break;
449449   case 0x2028:
450450   case 0x202c:
451      //verboselog( space->machine(), 0, "DMA GIO64 Address Write + Start DMA: %08x (%08x)\n", data, mem_mask );
451      //verboselog( space.machine(), 0, "DMA GIO64 Address Write + Start DMA: %08x (%08x)\n", data, mem_mask );
452452      pMC->nDMAGIO64Addr = data;
453453      // Start DMA
454454      pMC->nDMARunning = 1;
455455      break;
456456   case 0x2030:
457457   case 0x2034:
458      //verboselog( space->machine(), 0, "DMA Mode Write: %08x (%08x)\n", data, mem_mask );
458      //verboselog( space.machine(), 0, "DMA Mode Write: %08x (%08x)\n", data, mem_mask );
459459      pMC->nDMAMode = data;
460460      break;
461461   case 0x2038:
462462   case 0x203c:
463      //verboselog( space->machine(), 0, "DMA Zoom Count + Byte Count Write: %08x (%08x)\n", data, mem_mask );
463      //verboselog( space.machine(), 0, "DMA Zoom Count + Byte Count Write: %08x (%08x)\n", data, mem_mask );
464464      pMC->nDMAZoomByteCnt = data;
465465      break;
466466   case 0x2040:
467467   case 0x2044:
468      //verboselog( space->machine(), 0, "DMA Start Write: %08x (%08x)\n", data, mem_mask );
468      //verboselog( space.machine(), 0, "DMA Start Write: %08x (%08x)\n", data, mem_mask );
469469      // Start DMA
470470      pMC->nDMARunning = 1;
471471      break;
472472   case 0x2070:
473473   case 0x2074:
474      //verboselog( space->machine(), 0, "DMA GIO64 Address Write + Default Params Write + Start DMA: %08x (%08x)\n", data, mem_mask );
474      //verboselog( space.machine(), 0, "DMA GIO64 Address Write + Default Params Write + Start DMA: %08x (%08x)\n", data, mem_mask );
475475      pMC->nDMAGIO64Addr = data;
476476      // Start DMA
477477      pMC->nDMARunning = 1;
478478      break;
479479   default:
480      //verboselog( space->machine(), 0, "Unmapped MC write: 0x%08x: %08x (%08x)\n", 0x1fa00000 + offset, data, mem_mask );
480      //verboselog( space.machine(), 0, "Unmapped MC write: 0x%08x: %08x (%08x)\n", 0x1fa00000 + offset, data, mem_mask );
481481      break;
482482   }
483483}
trunk/src/mess/machine/comx_clm.c
r17963r17964
251251
252252UINT8 comx_clm_device::comx_mrd_r(offs_t offset, int *extrom)
253253{
254   address_space *space = machine().firstcpu->space(AS_PROGRAM);
254   address_space &space = *machine().firstcpu->space(AS_PROGRAM);
255255
256256   UINT8 data = 0xff;
257257
r17963r17964
265265   }
266266   else if (offset == 0xd801)
267267   {
268      data = m_crtc->register_r(*space, 0);
268      data = m_crtc->register_r(space, 0);
269269   }
270270
271271   return data;
r17963r17964
278278
279279void comx_clm_device::comx_mwr_w(offs_t offset, UINT8 data)
280280{
281   address_space *space = machine().firstcpu->space(AS_PROGRAM);
281   address_space &space = *machine().firstcpu->space(AS_PROGRAM);
282282
283283   if (offset >= 0xd000 && offset < 0xd800)
284284   {
r17963r17964
286286   }
287287   else if (offset == 0xd800)
288288   {
289      m_crtc->address_w(*space, 0, data);
289      m_crtc->address_w(space, 0, data);
290290   }
291291   else if (offset == 0xd801)
292292   {
293      m_crtc->register_w(*space, 0, data);
293      m_crtc->register_w(space, 0, data);
294294   }
295295}
trunk/src/mess/machine/hp48.c
r17963r17964
368368
369369static WRITE8_HANDLER ( hp48_io_w )
370370{
371   hp48_state *state = space->machine().driver_data<hp48_state>();
371   hp48_state *state = space.machine().driver_data<hp48_state>();
372372   LOG(( "%05x %f hp48_io_w: off=%02x data=%x\n",
373         space->device().safe_pcbase(), space->machine().time().as_double(), offset, data ));
373         space.device().safe_pcbase(), space.machine().time().as_double(), offset, data ));
374374
375375   switch( offset )
376376   {
r17963r17964
413413
414414   /* cards */
415415   case 0x0e:
416      LOG(( "%05x: card control write %02x\n", space->device().safe_pcbase(), data ));
416      LOG(( "%05x: card control write %02x\n", space.device().safe_pcbase(), data ));
417417
418418      /* bit 0: software interrupt */
419419      if ( data & 1 )
420420      {
421421         LOG(( "%f hp48_io_w: software interrupt requested\n",
422               space->machine().time().as_double() ));
423         hp48_pulse_irq( space->machine(), SATURN_IRQ_LINE );
422               space.machine().time().as_double() ));
423         hp48_pulse_irq( space.machine(), SATURN_IRQ_LINE );
424424         data &= ~1;
425425      }
426426
r17963r17964
432432      break;
433433
434434   case 0x0f:
435      LOG(( "%05x: card info write %02x\n", space->device().safe_pcbase(), data ));
435      LOG(( "%05x: card info write %02x\n", space.device().safe_pcbase(), data ));
436436      state->m_io[0x0f] = data;
437437      break;
438438
r17963r17964
447447   case 0x17:
448448      /* second nibble of sent data */
449449      state->m_io[offset] = data;
450      hp48_rs232_send_byte(space->machine());
450      hp48_rs232_send_byte(space.machine());
451451      break;
452452
453453   /* XXX not implemented:
r17963r17964
483483
484484static READ8_HANDLER ( hp48_io_r )
485485{
486   hp48_state *state = space->machine().driver_data<hp48_state>();
486   hp48_state *state = space.machine().driver_data<hp48_state>();
487487   UINT8 data = 0;
488488
489489   switch( offset )
r17963r17964
517517   case 0x29:
518518   {
519519      int last_line = HP48_IO_8(0x28) & 0x3f; /* last line of main bitmap before menu */
520      int cur_line = space->machine().primary_screen->vpos();
520      int cur_line = space.machine().primary_screen->vpos();
521521      if ( last_line <= 1 ) last_line = 0x3f;
522522      data = ( cur_line >= 0 && cur_line <= last_line ) ? last_line - cur_line : 0;
523523      if ( offset == 0x29 )
r17963r17964
548548   {
549549      /* second nibble of received data */
550550
551      //device_image_interface *xmodem = dynamic_cast<device_image_interface *>(space->machine().device("rs232_x"));
552      //device_image_interface *kermit = dynamic_cast<device_image_interface *>(space->machine().device("rs232_k"));
551      //device_image_interface *xmodem = dynamic_cast<device_image_interface *>(space.machine().device("rs232_x"));
552      //device_image_interface *kermit = dynamic_cast<device_image_interface *>(space.machine().device("rs232_k"));
553553
554554      state->m_io[0x11] &= ~1;  /* clear byte received */
555555      data = state->m_io[offset];
r17963r17964
563563   /* cards */
564564   case 0x0e: /* detection */
565565      data = state->m_io[0x0e];
566      LOG(( "%05x: card control read %02x\n", space->device().safe_pcbase(), data ));
566      LOG(( "%05x: card control read %02x\n", space.device().safe_pcbase(), data ));
567567      break;
568568   case 0x0f: /* card info */
569569      data = 0;
r17963r17964
581581         if ( state->m_port_size[0] && state->m_port_write[0] ) data |= 4;
582582         if ( state->m_port_size[1] && state->m_port_write[1] ) data |= 8;
583583      }
584      LOG(( "%05x: card info read %02x\n", space->device().safe_pcbase(), data ));
584      LOG(( "%05x: card info read %02x\n", space.device().safe_pcbase(), data ));
585585      break;
586586
587587
r17963r17964
589589   }
590590
591591   LOG(( "%05x %f hp48_io_r: off=%02x data=%x\n",
592         space->device().safe_pcbase(), space->machine().time().as_double(), offset, data ));
592         space.device().safe_pcbase(), space.machine().time().as_double(), offset, data ));
593593   return data;
594594}
595595
r17963r17964
598598
599599static READ8_HANDLER ( hp48_bank_r )
600600{
601   hp48_state *state = space->machine().driver_data<hp48_state>();
601   hp48_state *state = space.machine().driver_data<hp48_state>();
602602   /* bit 0: ignored, bits 2-5: bank number, bit 6: enable */
603603   offset &= 0x7e;
604604   if ( state->m_bank_switch != offset )
605605   {
606      LOG(( "%05x %f hp48_bank_r: off=%03x\n", space->device().safe_pcbase(), space->machine().time().as_double(), offset ));
606      LOG(( "%05x %f hp48_bank_r: off=%03x\n", space.device().safe_pcbase(), space.machine().time().as_double(), offset ));
607607      state->m_bank_switch = offset;
608608      hp48_apply_modules(state);
609609   }
r17963r17964
709709{
710710   int i;
711711   int nce2_enable = 1;
712   address_space* space = state->machine().device("maincpu")->memory().space(AS_PROGRAM);
712   address_space& space = *state->machine().device("maincpu")->memory().space(AS_PROGRAM);
713713
714714   state->m_io_addr = 0x100000;
715715
r17963r17964
772772      }
773773
774774      if (state->m_modules[i].data)
775         space->install_read_bank( base, end, 0, mirror, bank );
775         space.install_read_bank( base, end, 0, mirror, bank );
776776      else
777777      {
778778         if (state->m_modules[i].read != NULL)
779            space->install_legacy_read_handler( base, end, 0, mirror, state->m_modules[i].read, state->m_modules[i].read_name);
779            space.install_legacy_read_handler( base, end, 0, mirror, state->m_modules[i].read, state->m_modules[i].read_name);
780780      }
781781
782782      if (state->m_modules[i].isnop)
783         space->nop_write(base, end, 0, mirror);
783         space.nop_write(base, end, 0, mirror);
784784      else
785785      {
786786         if (state->m_modules[i].data)
787            space->install_write_bank( base, end, 0, mirror, bank );
787            space.install_write_bank( base, end, 0, mirror, bank );
788788         else
789789         {
790790            if (state->m_modules[i].write != NULL)
791               space->install_legacy_write_handler( base, end, 0, mirror, state->m_modules[i].write, state->m_modules[i].write_name );
791               space.install_legacy_write_handler( base, end, 0, mirror, state->m_modules[i].write, state->m_modules[i].write_name );
792792         }
793793      }
794794
trunk/src/mess/machine/c65.c
r17963r17964
219219/* dma controller and bankswitch hardware ?*/
220220static READ8_HANDLER( c65_read_mem )
221221{
222   c65_state *state = space->machine().driver_data<c65_state>();
222   c65_state *state = space.machine().driver_data<c65_state>();
223223   UINT8 result;
224224   if (offset <= 0x0ffff)
225225      result = state->m_memory[offset];
226226   else
227      result = space->read_byte(offset);
227      result = space.read_byte(offset);
228228   return result;
229229}
230230
231231static WRITE8_HANDLER( c65_write_mem )
232232{
233   c65_state *state = space->machine().driver_data<c65_state>();
233   c65_state *state = space.machine().driver_data<c65_state>();
234234   if (offset <= 0x0ffff)
235235      state->m_memory[offset] = data;
236236   else
237      space->write_byte(offset, data);
237      space.write_byte(offset, data);
238238}
239239
240240/* dma chip at 0xd700
r17963r17964
268268   PAIR pair, src, dst, len;
269269   UINT8 cmd, fill;
270270   int i;
271   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
271   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
272272
273273   switch (offset & 3)
274274   {
r17963r17964
299299      case 0:
300300         if (src.d == 0x3ffff) state->m_dump_dma = 1;
301301         if (state->m_dump_dma)
302            DBG_LOG(space->machine(), 1,"dma copy job",
302            DBG_LOG(space.machine(), 1,"dma copy job",
303303                  ("len:%.4x src:%.6x dst:%.6x sub:%.2x modrm:%.2x\n",
304304                   len.w.l, src.d, dst.d, c65_read_mem(space, pair.d),
305305                   c65_read_mem(space, pair.d + 1) ) );
r17963r17964
333333         }
334334         break;
335335      case 3:
336         DBG_LOG(space->machine(), 3,"dma fill job",
336         DBG_LOG(space.machine(), 3,"dma fill job",
337337               ("len:%.4x value:%.2x dst:%.6x sub:%.2x modrm:%.2x\n",
338338                len.w.l, fill, dst.d, c65_read_mem(space, pair.d),
339339                c65_read_mem(space, pair.d + 1)));
r17963r17964
341341               c65_write_mem(space, dst.d++, fill);
342342            break;
343343      case 0x30:
344         DBG_LOG(space->machine(), 1,"dma copy down",
344         DBG_LOG(space.machine(), 1,"dma copy down",
345345               ("len:%.4x src:%.6x dst:%.6x sub:%.2x modrm:%.2x\n",
346346                len.w.l, src.d, dst.d, c65_read_mem(space, pair.d),
347347                c65_read_mem(space, pair.d + 1) ) );
r17963r17964
349349            c65_write_mem(space, dst.d--,c65_read_mem(space, src.d--));
350350         break;
351351      default:
352         DBG_LOG(space->machine(), 1,"dma job",
352         DBG_LOG(space.machine(), 1,"dma job",
353353               ("cmd:%.2x len:%.4x src:%.6x dst:%.6x sub:%.2x modrm:%.2x\n",
354354                cmd,len.w.l, src.d, dst.d, c65_read_mem(space, pair.d),
355355                c65_read_mem(space, pair.d + 1)));
356356      }
357357      break;
358358   default:
359      DBG_LOG(space->machine(), 1, "dma chip write", ("%.3x %.2x\n", offset, value));
359      DBG_LOG(space.machine(), 1, "dma chip write", ("%.3x %.2x\n", offset, value));
360360      break;
361361   }
362362}
r17963r17964
615615
616616static READ8_HANDLER( c65_ram_expansion_r )
617617{
618   c65_state *state = space->machine().driver_data<c65_state>();
618   c65_state *state = space.machine().driver_data<c65_state>();
619619   UINT8 data = 0xff;
620   if (space->machine().device<ram_device>(RAM_TAG)->size() > (128 * 1024))
620   if (space.machine().device<ram_device>(RAM_TAG)->size() > (128 * 1024))
621621      data = state->m_expansion_ram.reg;
622622   return data;
623623}
624624
625625static WRITE8_HANDLER( c65_ram_expansion_w )
626626{
627   c65_state *state = space->machine().driver_data<c65_state>();
627   c65_state *state = space.machine().driver_data<c65_state>();
628628   offs_t expansion_ram_begin;
629629   offs_t expansion_ram_end;
630630
631   if (space->machine().device<ram_device>(RAM_TAG)->size() > (128 * 1024))
631   if (space.machine().device<ram_device>(RAM_TAG)->size() > (128 * 1024))
632632   {
633633      state->m_expansion_ram.reg = data;
634634
635635      expansion_ram_begin = 0x80000;
636      expansion_ram_end = 0x80000 + (space->machine().device<ram_device>(RAM_TAG)->size() - 128*1024) - 1;
636      expansion_ram_end = 0x80000 + (space.machine().device<ram_device>(RAM_TAG)->size() - 128*1024) - 1;
637637
638638      if (data == 0x00) {
639         space->install_readwrite_bank(expansion_ram_begin, expansion_ram_end,"bank16");
640         state->membank("bank16")->set_base(space->machine().device<ram_device>(RAM_TAG)->pointer() + 128*1024);
639         space.install_readwrite_bank(expansion_ram_begin, expansion_ram_end,"bank16");
640         state->membank("bank16")->set_base(space.machine().device<ram_device>(RAM_TAG)->pointer() + 128*1024);
641641      } else {
642         space->nop_readwrite(expansion_ram_begin, expansion_ram_end);
642         space.nop_readwrite(expansion_ram_begin, expansion_ram_end);
643643      }
644644   }
645645}
646646
647647static WRITE8_HANDLER( c65_write_io )
648648{
649   sid6581_device *sid_0 = space->machine().device<sid6581_device>("sid_r");
650   sid6581_device *sid_1 = space->machine().device<sid6581_device>("sid_l");
651   device_t *vic3 = space->machine().device("vic3");
649   sid6581_device *sid_0 = space.machine().device<sid6581_device>("sid_r");
650   sid6581_device *sid_1 = space.machine().device<sid6581_device>("sid_l");
651   device_t *vic3 = space.machine().device("vic3");
652652
653653   switch (offset & 0xf00)
654654   {
655655   case 0x000:
656656      if (offset < 0x80)
657         vic3_port_w(vic3, *space, offset & 0x7f, data);
657         vic3_port_w(vic3, space, offset & 0x7f, data);
658658      else if (offset < 0xa0)
659         c65_fdc_w(space->machine(), offset&0x1f,data);
659         c65_fdc_w(space.machine(), offset&0x1f,data);
660660      else
661661      {
662662         c65_ram_expansion_w(space, offset&0x1f, data);
r17963r17964
666666   case 0x100:
667667   case 0x200:
668668   case 0x300:
669      vic3_palette_w(vic3, *space, offset - 0x100, data);
669      vic3_palette_w(vic3, space, offset - 0x100, data);
670670      break;
671671   case 0x400:
672672      if (offset<0x420) /* maybe 0x20 */
673         sid_0->write(*space, offset & 0x3f, data);
673         sid_0->write(space, offset & 0x3f, data);
674674      else if (offset<0x440)
675         sid_1->write(*space, offset & 0x3f, data);
675         sid_1->write(space, offset & 0x3f, data);
676676      else
677         DBG_LOG(space->machine(), 1, "io write", ("%.3x %.2x\n", offset, data));
677         DBG_LOG(space.machine(), 1, "io write", ("%.3x %.2x\n", offset, data));
678678      break;
679679   case 0x500:
680      DBG_LOG(space->machine(), 1, "io write", ("%.3x %.2x\n", offset, data));
680      DBG_LOG(space.machine(), 1, "io write", ("%.3x %.2x\n", offset, data));
681681      break;
682682   case 0x600:
683      c65_6511_port_w(space->machine(), offset&0xff,data);
683      c65_6511_port_w(space.machine(), offset&0xff,data);
684684      break;
685685   case 0x700:
686      c65_dma_port_w(space->machine(), offset&0xff, data);
686      c65_dma_port_w(space.machine(), offset&0xff, data);
687687      break;
688688   }
689689}
690690
691691static WRITE8_HANDLER( c65_write_io_dc00 )
692692{
693   device_t *cia_0 = space->machine().device("cia_0");
694   device_t *cia_1 = space->machine().device("cia_1");
693   device_t *cia_0 = space.machine().device("cia_0");
694   device_t *cia_1 = space.machine().device("cia_1");
695695
696696   switch (offset & 0xf00)
697697   {
698698   case 0x000:
699      mos6526_w(cia_0, *space, offset, data);
699      mos6526_w(cia_0, space, offset, data);
700700      break;
701701   case 0x100:
702      mos6526_w(cia_1, *space, offset, data);
702      mos6526_w(cia_1, space, offset, data);
703703      break;
704704   case 0x200:
705705   case 0x300:
706      DBG_LOG(space->machine(), 1, "io write", ("%.3x %.2x\n", offset+0xc00, data));
706      DBG_LOG(space.machine(), 1, "io write", ("%.3x %.2x\n", offset+0xc00, data));
707707      break;
708708   }
709709}
710710
711711static READ8_HANDLER( c65_read_io )
712712{
713   sid6581_device *sid_0 = space->machine().device<sid6581_device>("sid_r");
714   sid6581_device *sid_1 = space->machine().device<sid6581_device>("sid_l");
715   device_t *vic3 = space->machine().device("vic3");
713   sid6581_device *sid_0 = space.machine().device<sid6581_device>("sid_r");
714   sid6581_device *sid_1 = space.machine().device<sid6581_device>("sid_l");
715   device_t *vic3 = space.machine().device("vic3");
716716
717717   switch (offset & 0xf00)
718718   {
719719   case 0x000:
720720      if (offset < 0x80)
721         return vic3_port_r(vic3, *space, offset & 0x7f);
721         return vic3_port_r(vic3, space, offset & 0x7f);
722722      if (offset < 0xa0)
723         return c65_fdc_r(space->machine(), offset&0x1f);
723         return c65_fdc_r(space.machine(), offset&0x1f);
724724      else
725725      {
726726         return c65_ram_expansion_r(space, offset&0x1f);
r17963r17964
731731   case 0x200:
732732   case 0x300:
733733   /* read only !? */
734      DBG_LOG(space->machine(), 1, "io read", ("%.3x\n", offset));
734      DBG_LOG(space.machine(), 1, "io read", ("%.3x\n", offset));
735735      break;
736736   case 0x400:
737737      if (offset < 0x420)
738         return sid_0->read(*space, offset & 0x3f);
738         return sid_0->read(space, offset & 0x3f);
739739      if (offset < 0x440)
740         return sid_1->read(*space, offset & 0x3f);
741      DBG_LOG(space->machine(), 1, "io read", ("%.3x\n", offset));
740         return sid_1->read(space, offset & 0x3f);
741      DBG_LOG(space.machine(), 1, "io read", ("%.3x\n", offset));
742742      break;
743743   case 0x500:
744      DBG_LOG(space->machine(), 1, "io read", ("%.3x\n", offset));
744      DBG_LOG(space.machine(), 1, "io read", ("%.3x\n", offset));
745745      break;
746746   case 0x600:
747      return c65_6511_port_r(space->machine(), offset&0xff);
747      return c65_6511_port_r(space.machine(), offset&0xff);
748748   case 0x700:
749      return c65_dma_port_r(space->machine(), offset&0xff);
749      return c65_dma_port_r(space.machine(), offset&0xff);
750750   }
751751   return 0xff;
752752}
753753
754754static READ8_HANDLER( c65_read_io_dc00 )
755755{
756   device_t *cia_0 = space->machine().device("cia_0");
757   device_t *cia_1 = space->machine().device("cia_1");
756   device_t *cia_0 = space.machine().device("cia_0");
757   device_t *cia_1 = space.machine().device("cia_1");
758758
759759   switch (offset & 0x300)
760760   {
761761   case 0x000:
762      return mos6526_r(cia_0, *space, offset);
762      return mos6526_r(cia_0, space, offset);
763763   case 0x100:
764      return mos6526_r(cia_1, *space, offset);
764      return mos6526_r(cia_1, space, offset);
765765   case 0x200:
766766   case 0x300:
767      DBG_LOG(space->machine(), 1, "io read", ("%.3x\n", offset+0xc00));
767      DBG_LOG(space.machine(), 1, "io read", ("%.3x\n", offset+0xc00));
768768      break;
769769   }
770770   return 0xff;
trunk/src/mess/machine/gb.c
r17963r17964
154154static void gb_init(running_machine &machine)
155155{
156156   gb_state *state = machine.driver_data<gb_state>();
157   address_space *space = machine.device( "maincpu")->memory().space( AS_PROGRAM );
157   address_space &space = *machine.device( "maincpu")->memory().space( AS_PROGRAM );
158158
159159   /* Initialize the memory banks */
160160   state->m_MBC1Mode = 0;
r17963r17964
182182      case MBC_NONE:
183183         break;
184184      case MBC_MMM01:
185         space->install_write_handler( 0x0000, 0x1fff, write8_delegate(FUNC(gb_state::gb_rom_bank_mmm01_0000_w),state) );
186         space->install_write_handler( 0x2000, 0x3fff, write8_delegate(FUNC(gb_state::gb_rom_bank_mmm01_2000_w),state));
187         space->install_write_handler( 0x4000, 0x5fff, write8_delegate(FUNC(gb_state::gb_rom_bank_mmm01_4000_w),state));
188         space->install_write_handler( 0x6000, 0x7fff, write8_delegate(FUNC(gb_state::gb_rom_bank_mmm01_6000_w),state));
185         space.install_write_handler( 0x0000, 0x1fff, write8_delegate(FUNC(gb_state::gb_rom_bank_mmm01_0000_w),state) );
186         space.install_write_handler( 0x2000, 0x3fff, write8_delegate(FUNC(gb_state::gb_rom_bank_mmm01_2000_w),state));
187         space.install_write_handler( 0x4000, 0x5fff, write8_delegate(FUNC(gb_state::gb_rom_bank_mmm01_4000_w),state));
188         space.install_write_handler( 0x6000, 0x7fff, write8_delegate(FUNC(gb_state::gb_rom_bank_mmm01_6000_w),state));
189189         break;
190190      case MBC_MBC1:
191         space->install_write_handler( 0x0000, 0x1fff, write8_delegate(FUNC(gb_state::gb_ram_enable),state) );   /* We don't emulate RAM enable yet */
192         space->install_write_handler( 0x2000, 0x3fff, write8_delegate(FUNC(gb_state::gb_rom_bank_select_mbc1),state) );
193         space->install_write_handler( 0x4000, 0x5fff, write8_delegate(FUNC(gb_state::gb_ram_bank_select_mbc1),state) );
194         space->install_write_handler( 0x6000, 0x7fff, write8_delegate(FUNC(gb_state::gb_mem_mode_select_mbc1),state) );
191         space.install_write_handler( 0x0000, 0x1fff, write8_delegate(FUNC(gb_state::gb_ram_enable),state) );   /* We don't emulate RAM enable yet */
192         space.install_write_handler( 0x2000, 0x3fff, write8_delegate(FUNC(gb_state::gb_rom_bank_select_mbc1),state) );
193         space.install_write_handler( 0x4000, 0x5fff, write8_delegate(FUNC(gb_state::gb_ram_bank_select_mbc1),state) );
194         space.install_write_handler( 0x6000, 0x7fff, write8_delegate(FUNC(gb_state::gb_mem_mode_select_mbc1),state) );
195195         break;
196196      case MBC_MBC2:
197         space->install_write_handler( 0x2000, 0x3fff, write8_delegate(FUNC(gb_state::gb_rom_bank_select_mbc2),state) );
197         space.install_write_handler( 0x2000, 0x3fff, write8_delegate(FUNC(gb_state::gb_rom_bank_select_mbc2),state) );
198198         break;
199199      case MBC_MBC3:
200200      case MBC_HUC1:   /* Possibly wrong */
201201      case MBC_HUC3:   /* Possibly wrong */
202         space->install_write_handler( 0x0000, 0x1fff, write8_delegate(FUNC(gb_state::gb_ram_enable),state) );   /* We don't emulate RAM enable yet */
203         space->install_write_handler( 0x2000, 0x3fff, write8_delegate(FUNC(gb_state::gb_rom_bank_select_mbc3),state) );
204         space->install_write_handler( 0x4000, 0x5fff, write8_delegate(FUNC(gb_state::gb_ram_bank_select_mbc3),state) );
205         space->install_write_handler( 0x6000, 0x7fff, write8_delegate(FUNC(gb_state::gb_mem_mode_select_mbc3),state) );
202         space.install_write_handler( 0x0000, 0x1fff, write8_delegate(FUNC(gb_state::gb_ram_enable),state) );   /* We don't emulate RAM enable yet */
203         space.install_write_handler( 0x2000, 0x3fff, write8_delegate(FUNC(gb_state::gb_rom_bank_select_mbc3),state) );
204         space.install_write_handler( 0x4000, 0x5fff, write8_delegate(FUNC(gb_state::gb_ram_bank_select_mbc3),state) );
205         space.install_write_handler( 0x6000, 0x7fff, write8_delegate(FUNC(gb_state::gb_mem_mode_select_mbc3),state) );
206206         break;
207207      case MBC_MBC5:
208         space->install_write_handler( 0x0000, 0x1fff, write8_delegate(FUNC(gb_state::gb_ram_enable),state) );
209         space->install_write_handler( 0x2000, 0x3fff, write8_delegate(FUNC(gb_state::gb_rom_bank_select_mbc5),state) );
210         space->install_write_handler( 0x4000, 0x5fff, write8_delegate(FUNC(gb_state::gb_ram_bank_select_mbc5),state) );
208         space.install_write_handler( 0x0000, 0x1fff, write8_delegate(FUNC(gb_state::gb_ram_enable),state) );
209         space.install_write_handler( 0x2000, 0x3fff, write8_delegate(FUNC(gb_state::gb_rom_bank_select_mbc5),state) );
210         space.install_write_handler( 0x4000, 0x5fff, write8_delegate(FUNC(gb_state::gb_ram_bank_select_mbc5),state) );
211211         break;
212212      case MBC_MBC6:
213         space->install_write_handler( 0x0000, 0x1fff, write8_delegate(FUNC(gb_state::gb_ram_bank_select_mbc6),state) );
214         space->install_write_handler( 0x2000, 0x2fff, write8_delegate(FUNC(gb_state::gb_rom_bank_select_mbc6_1),state) );
215         space->install_write_handler( 0x3000, 0x3fff, write8_delegate(FUNC(gb_state::gb_rom_bank_select_mbc6_2),state) );
213         space.install_write_handler( 0x0000, 0x1fff, write8_delegate(FUNC(gb_state::gb_ram_bank_select_mbc6),state) );
214         space.install_write_handler( 0x2000, 0x2fff, write8_delegate(FUNC(gb_state::gb_rom_bank_select_mbc6_1),state) );
215         space.install_write_handler( 0x3000, 0x3fff, write8_delegate(FUNC(gb_state::gb_rom_bank_select_mbc6_2),state) );
216216         break;
217217      case MBC_MBC7:
218         space->install_write_handler( 0x0000, 0x1fff, write8_delegate(FUNC(gb_state::gb_ram_enable),state) );
219         space->install_write_handler( 0x2000, 0x2fff, write8_delegate(FUNC(gb_state::gb_rom_bank_select_mbc7),state) );
220         space->install_write_handler( 0x3000, 0x7fff, write8_delegate(FUNC(gb_state::gb_rom_bank_unknown_mbc7),state) );
218         space.install_write_handler( 0x0000, 0x1fff, write8_delegate(FUNC(gb_state::gb_ram_enable),state) );
219         space.install_write_handler( 0x2000, 0x2fff, write8_delegate(FUNC(gb_state::gb_rom_bank_select_mbc7),state) );
220         space.install_write_handler( 0x3000, 0x7fff, write8_delegate(FUNC(gb_state::gb_rom_bank_unknown_mbc7),state) );
221221         break;
222222      case MBC_TAMA5:
223         space->install_write_handler( 0xA000, 0xBFFF, write8_delegate(FUNC(gb_state::gb_ram_tama5),state) );
223         space.install_write_handler( 0xA000, 0xBFFF, write8_delegate(FUNC(gb_state::gb_ram_tama5),state) );
224224         break;
225225      case MBC_WISDOM:
226         space->install_write_handler( 0x0000, 0x3fff, write8_delegate(FUNC(gb_state::gb_rom_bank_select_wisdom),state) );
226         space.install_write_handler( 0x0000, 0x3fff, write8_delegate(FUNC(gb_state::gb_rom_bank_select_wisdom),state) );
227227         break;
228228      case MBC_MBC1_KOR:
229         space->install_write_handler( 0x0000, 0x1fff, write8_delegate(FUNC(gb_state::gb_ram_enable),state) ); /* We don't emulate RAM enable yet */
230         space->install_write_handler( 0x2000, 0x3fff, write8_delegate(FUNC(gb_state::gb_rom_bank_select_mbc1_kor),state) );
231         space->install_write_handler( 0x4000, 0x5fff, write8_delegate(FUNC(gb_state::gb_ram_bank_select_mbc1_kor),state) );
232         space->install_write_handler( 0x6000, 0x7fff, write8_delegate(FUNC(gb_state::gb_mem_mode_select_mbc1_kor),state) );
229         space.install_write_handler( 0x0000, 0x1fff, write8_delegate(FUNC(gb_state::gb_ram_enable),state) ); /* We don't emulate RAM enable yet */
230         space.install_write_handler( 0x2000, 0x3fff, write8_delegate(FUNC(gb_state::gb_rom_bank_select_mbc1_kor),state) );
231         space.install_write_handler( 0x4000, 0x5fff, write8_delegate(FUNC(gb_state::gb_ram_bank_select_mbc1_kor),state) );
232         space.install_write_handler( 0x6000, 0x7fff, write8_delegate(FUNC(gb_state::gb_mem_mode_select_mbc1_kor),state) );
233233         break;
234234
235235      case MBC_MEGADUCK:
236         space->install_write_handler( 0x0001, 0x0001, write8_delegate(FUNC(gb_state::megaduck_rom_bank_select_type1),state) );
237         space->install_write_handler( 0xB000, 0xB000, write8_delegate(FUNC(gb_state::megaduck_rom_bank_select_type2),state) );
236         space.install_write_handler( 0x0001, 0x0001, write8_delegate(FUNC(gb_state::megaduck_rom_bank_select_type1),state) );
237         space.install_write_handler( 0xB000, 0xB000, write8_delegate(FUNC(gb_state::megaduck_rom_bank_select_type2),state) );
238238         break;
239239   }
240240
241   gb_sound_w(space->machine().device("custom"), *space, 0x16, 0x00 );       /* Initialize sound hardware */
241   gb_sound_w(space.machine().device("custom"), space, 0x16, 0x00 );       /* Initialize sound hardware */
242242
243243   state->m_divcount = 0;
244244   state->m_triggering_irq = 0;
trunk/src/mess/machine/990_hd.c
r17963r17964
10251025         hdc.w[offset] = (hdc.w[offset] & ((~w_mask[offset]) | mem_mask)) | (data & w_mask[offset] & ~mem_mask);
10261026
10271027         if ((offset == 0) || (offset == 7))
1028            update_interrupt(space->machine());
1028            update_interrupt(space.machine());
10291029
10301030         if ((offset == 7) && (old_data & w7_idle) && ! (data & w7_idle))
10311031         {   /* idle has been cleared: start command execution */
1032            execute_command(space->machine());
1032            execute_command(space.machine());
10331033         }
10341034      }
10351035   }
trunk/src/mess/machine/radio86.c
r17963r17964
140140   i8257_hlda_w(device, state);
141141}
142142
143static UINT8 memory_read_byte(address_space *space, offs_t address) { return space->read_byte(address); }
144static void memory_write_byte(address_space *space, offs_t address, UINT8 data) { space->write_byte(address, data); }
143static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
144static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
145145
146146I8257_INTERFACE( radio86_dma )
147147{
trunk/src/mess/machine/b2m.c
r17963r17964
4444{
4545   UINT8 *rom;
4646   b2m_state *state =  machine.driver_data<b2m_state>();
47   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
47   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
4848   UINT8 *ram = machine.device<ram_device>(RAM_TAG)->pointer();
4949
50   space->install_write_bank(0x0000, 0x27ff, "bank1");
51   space->install_write_bank(0x2800, 0x2fff, "bank2");
52   space->install_write_bank(0x3000, 0x6fff, "bank3");
53   space->install_write_bank(0x7000, 0xdfff, "bank4");
54   space->install_write_bank(0xe000, 0xffff, "bank5");
50   space.install_write_bank(0x0000, 0x27ff, "bank1");
51   space.install_write_bank(0x2800, 0x2fff, "bank2");
52   space.install_write_bank(0x3000, 0x6fff, "bank3");
53   space.install_write_bank(0x7000, 0xdfff, "bank4");
54   space.install_write_bank(0xe000, 0xffff, "bank5");
5555
5656   rom = state->memregion("maincpu")->base();
5757   switch(bank) {
5858      case 0 :
5959      case 1 :
60                  space->unmap_write(0xe000, 0xffff);
60                  space.unmap_write(0xe000, 0xffff);
6161
6262                  state->membank("bank1")->set_base(ram);
6363                  state->membank("bank2")->set_base(ram + 0x2800);
r17963r17964
6767                  break;
6868#if 0
6969      case 1 :
70                  space->unmap_write(0x3000, 0x6fff);
71                  space->unmap_write(0xe000, 0xffff);
70                  space.unmap_write(0x3000, 0x6fff);
71                  space.unmap_write(0xe000, 0xffff);
7272
7373                  state->membank("bank1")->set_base(ram);
7474                  state->membank("bank2")->set_base(ram + 0x2800);
r17963r17964
7878                  break;
7979#endif
8080      case 2 :
81                  space->unmap_write(0x2800, 0x2fff);
82                  space->unmap_write(0xe000, 0xffff);
81                  space.unmap_write(0x2800, 0x2fff);
82                  space.unmap_write(0xe000, 0xffff);
8383
8484                  state->membank("bank1")->set_base(ram);
85                  space->install_read_handler(0x2800, 0x2fff, read8_delegate(FUNC(b2m_state::b2m_keyboard_r),state));
85                  space.install_read_handler(0x2800, 0x2fff, read8_delegate(FUNC(b2m_state::b2m_keyboard_r),state));
8686                  state->membank("bank3")->set_base(ram + 0x10000);
8787                  state->membank("bank4")->set_base(ram + 0x7000);
8888                  state->membank("bank5")->set_base(rom + 0x10000);
8989                  break;
9090      case 3 :
91                  space->unmap_write(0x2800, 0x2fff);
92                  space->unmap_write(0xe000, 0xffff);
91                  space.unmap_write(0x2800, 0x2fff);
92                  space.unmap_write(0xe000, 0xffff);
9393
9494                  state->membank("bank1")->set_base(ram);
95                  space->install_read_handler(0x2800, 0x2fff, read8_delegate(FUNC(b2m_state::b2m_keyboard_r),state));
95                  space.install_read_handler(0x2800, 0x2fff, read8_delegate(FUNC(b2m_state::b2m_keyboard_r),state));
9696                  state->membank("bank3")->set_base(ram + 0x14000);
9797                  state->membank("bank4")->set_base(ram + 0x7000);
9898                  state->membank("bank5")->set_base(rom + 0x10000);
9999                  break;
100100      case 4 :
101                  space->unmap_write(0x2800, 0x2fff);
102                  space->unmap_write(0xe000, 0xffff);
101                  space.unmap_write(0x2800, 0x2fff);
102                  space.unmap_write(0xe000, 0xffff);
103103
104104                  state->membank("bank1")->set_base(ram);
105                  space->install_read_handler(0x2800, 0x2fff, read8_delegate(FUNC(b2m_state::b2m_keyboard_r),state));
105                  space.install_read_handler(0x2800, 0x2fff, read8_delegate(FUNC(b2m_state::b2m_keyboard_r),state));
106106                  state->membank("bank3")->set_base(ram + 0x18000);
107107                  state->membank("bank4")->set_base(ram + 0x7000);
108108                  state->membank("bank5")->set_base(rom + 0x10000);
109109
110110                  break;
111111      case 5 :
112                  space->unmap_write(0x2800, 0x2fff);
113                  space->unmap_write(0xe000, 0xffff);
112                  space.unmap_write(0x2800, 0x2fff);
113                  space.unmap_write(0xe000, 0xffff);
114114
115115                  state->membank("bank1")->set_base(ram);
116                  space->install_read_handler(0x2800, 0x2fff, read8_delegate(FUNC(b2m_state::b2m_keyboard_r),state));
116                  space.install_read_handler(0x2800, 0x2fff, read8_delegate(FUNC(b2m_state::b2m_keyboard_r),state));
117117                  state->membank("bank3")->set_base(ram + 0x1c000);
118118                  state->membank("bank4")->set_base(ram + 0x7000);
119119                  state->membank("bank5")->set_base(rom + 0x10000);
r17963r17964
127127                  state->membank("bank5")->set_base(ram + 0xe000);
128128                  break;
129129      case 7 :
130                  space->unmap_write(0x0000, 0x27ff);
131                  space->unmap_write(0x2800, 0x2fff);
132                  space->unmap_write(0x3000, 0x6fff);
133                  space->unmap_write(0x7000, 0xdfff);
134                  space->unmap_write(0xe000, 0xffff);
130                  space.unmap_write(0x0000, 0x27ff);
131                  space.unmap_write(0x2800, 0x2fff);
132                  space.unmap_write(0x3000, 0x6fff);
133                  space.unmap_write(0x7000, 0xdfff);
134                  space.unmap_write(0xe000, 0xffff);
135135
136136                  state->membank("bank1")->set_base(rom + 0x10000);
137137                  state->membank("bank2")->set_base(rom + 0x10000);
trunk/src/mess/machine/aim65.c
r17963r17964
141141void aim65_state::machine_start()
142142{
143143   ram_device *ram = machine().device<ram_device>(RAM_TAG);
144   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
144   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
145145
146146   /* Init RAM */
147   space->install_ram(0x0000, ram->size() - 1, ram->pointer());
147   space.install_ram(0x0000, ram->size() - 1, ram->pointer());
148148
149149   m_pb_save = 0;
150150}
trunk/src/mess/machine/thomson.c
r17963r17964
447447
448448static void to7_update_cart_bank(running_machine &machine)
449449{
450   address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
450   address_space& space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
451451   int bank = 0;
452452   if ( thom_cart_nb_banks )
453453   {
454454      bank = thom_cart_bank % thom_cart_nb_banks;
455455      if ( bank != old_cart_bank && old_cart_bank < 0 )
456456                {
457                        space->install_legacy_read_handler(0x0000, 0x0003, FUNC(to7_cartridge_r) );
457                        space.install_legacy_read_handler(0x0000, 0x0003, FUNC(to7_cartridge_r) );
458458                }
459459   }
460460   if ( bank != old_cart_bank )
r17963r17964
481481      return;
482482
483483   thom_cart_bank = offset & 3;
484   to7_update_cart_bank(space->machine());
484   to7_update_cart_bank(space.machine());
485485}
486486
487487
r17963r17964
489489/* read signal to 0000-0003 generates a bank switch */
490490READ8_HANDLER ( to7_cartridge_r )
491491{
492   UINT8* pos = space->machine().root_device().memregion( "maincpu" )->base() + 0x10000;
492   UINT8* pos = space.machine().root_device().memregion( "maincpu" )->base() + 0x10000;
493493   UINT8 data = pos[offset + (thom_cart_bank % thom_cart_nb_banks) * 0x4000];
494   if ( !space->debugger_access() )
494   if ( !space.debugger_access() )
495495        {
496496      thom_cart_bank = offset & 3;
497      to7_update_cart_bank(space->machine());
497      to7_update_cart_bank(space.machine());
498498   }
499499   return data;
500500}
r17963r17964
939939
940940READ8_HANDLER ( to7_modem_mea8000_r )
941941{
942   if ( space->debugger_access() )
942   if ( space.debugger_access() )
943943        {
944944      return 0;
945945        }
946946
947   if ( space->machine().root_device().ioport("mconfig")->read() & 1 )
947   if ( space.machine().root_device().ioport("mconfig")->read() & 1 )
948948   {
949      device_t* device = space->machine().device("mea8000" );
950      return mea8000_r( device, *space, offset );
949      device_t* device = space.machine().device("mea8000" );
950      return mea8000_r( device, space, offset );
951951   }
952952   else
953953   {
954      acia6850_device* acia = space->machine().device<acia6850_device>("acia6850" );
954      acia6850_device* acia = space.machine().device<acia6850_device>("acia6850" );
955955      switch (offset) {
956      case 0: return acia->status_read(*space, offset );
957      case 1: return acia->data_read(*space, offset );
956      case 0: return acia->status_read(space, offset );
957      case 1: return acia->data_read(space, offset );
958958      default: return 0;
959959      }
960960   }
r17963r17964
964964
965965WRITE8_HANDLER ( to7_modem_mea8000_w )
966966{
967   if ( space->machine().root_device().ioport("mconfig")->read() & 1 )
967   if ( space.machine().root_device().ioport("mconfig")->read() & 1 )
968968   {
969      device_t* device = space->machine().device("mea8000" );
970      mea8000_w( device, *space, offset, data );
969      device_t* device = space.machine().device("mea8000" );
970      mea8000_w( device, space, offset, data );
971971   }
972972   else
973973   {
974      acia6850_device* acia = space->machine().device<acia6850_device>("acia6850" );
974      acia6850_device* acia = space.machine().device<acia6850_device>("acia6850" );
975975      switch (offset) {
976      case 0: acia->control_write( *space, offset, data );
977      case 1: acia->data_write( *space, offset, data );
976      case 0: acia->control_write( space, offset, data );
977      case 1: acia->data_write( space, offset, data );
978978      }
979979   }
980980}
r17963r17964
12831283      /* bit 6:     parity error (ignored) */
12841284      /* bit 7:     interrupt */
12851285      LOG_MIDI(( "$%04x %f to7_midi_r: status $%02X (rdrf=%i, tdre=%i, ovrn=%i, irq=%i)\n",
1286           space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(), to7_midi_status,
1286           space.machine().device("maincpu")->safe_pcbase(), space.machine().time().as_double(), to7_midi_status,
12871287           (to7_midi_status & ACIA_6850_RDRF) ? 1 : 0,
12881288           (to7_midi_status & ACIA_6850_TDRE) ? 1 : 0,
12891289           (to7_midi_status & ACIA_6850_OVRN) ? 1 : 0,
r17963r17964
12941294   case 1: /* get input data */
12951295   {
12961296                UINT8 data = chardev_in( to7_midi_chardev );
1297                if ( !space->debugger_access() )
1297                if ( !space.debugger_access() )
12981298                {
12991299                        to7_midi_status &= ~(ACIA_6850_irq | ACIA_6850_RDRF);
13001300                        if ( to7_midi_overrun )
r17963r17964
13031303                                to7_midi_status &= ~ACIA_6850_OVRN;
13041304                        to7_midi_overrun = 0;
13051305                        LOG_MIDI(( "$%04x %f to7_midi_r: read data $%02X\n",
1306                                   space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(), data ));
1307                        to7_midi_update_irq( space->machine() );
1306                                   space.machine().device("maincpu")->safe_pcbase(), space.machine().time().as_double(), data ));
1307                        to7_midi_update_irq( space.machine() );
13081308                }
13091309                return data;
13101310   }
r17963r17964
13121312
13131313   default:
13141314      logerror( "$%04x to7_midi_r: invalid offset %i\n",
1315           space->machine().device("maincpu")->safe_pcbase(),  offset );
1315           space.machine().device("maincpu")->safe_pcbase(),  offset );
13161316      return 0;
13171317   }
13181318}
r17963r17964
13311331      if ( (data & 3) == 3 )
13321332      {
13331333         /* reset */
1334         LOG_MIDI(( "$%04x %f to7_midi_w: reset (data=$%02X)\n", space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(), data ));
1334         LOG_MIDI(( "$%04x %f to7_midi_w: reset (data=$%02X)\n", space.machine().device("maincpu")->safe_pcbase(), space.machine().time().as_double(), data ));
13351335         to7_midi_overrun = 0;
13361336         to7_midi_status = 2;
13371337         to7_midi_intr = 0;
r17963r17964
13481348            static const int stop[8] = { 2,2,1,1,2,1,1,1 };
13491349            static const char parity[8] = { 'e','o','e','o','-','-','e','o' };
13501350            LOG_MIDI(( "$%04x %f to7_midi_w: set control to $%02X (bits=%i, stop=%i, parity=%c, intr in=%i out=%i)\n",
1351                 space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(),
1351                 space.machine().device("maincpu")->safe_pcbase(), space.machine().time().as_double(),
13521352                 data,
13531353                 bits[ (data >> 2) & 7 ],
13541354                 stop[ (data >> 2) & 7 ],
r17963r17964
13571357                 (to7_midi_intr & 3) ? 1 : 0));
13581358         }
13591359      }
1360      to7_midi_update_irq( space->machine() );
1360      to7_midi_update_irq( space.machine() );
13611361      break;
13621362
13631363
13641364   case 1: /* output data */
1365      LOG_MIDI(( "$%04x %f to7_midi_w: write data $%02X\n", space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(), data ));
1365      LOG_MIDI(( "$%04x %f to7_midi_w: write data $%02X\n", space.machine().device("maincpu")->safe_pcbase(), space.machine().time().as_double(), data ));
13661366      if ( data == 0x55 )
13671367         /* cable-detect: shortcut */
13681368         chardev_fake_in( to7_midi_chardev, 0x55 );
r17963r17964
13761376
13771377
13781378   default:
1379      logerror( "$%04x to7_midi_w: invalid offset %i (data=$%02X) \n", space->machine().device("maincpu")->safe_pcbase(), offset, data );
1379      logerror( "$%04x to7_midi_w: invalid offset %i (data=$%02X) \n", space.machine().device("maincpu")->safe_pcbase(), offset, data );
13801380   }
13811381}
13821382
r17963r17964
14871487
14881488MACHINE_START ( to7 )
14891489{
1490   address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1490   address_space& space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
14911491   UINT8* mem = machine.root_device().memregion("maincpu")->base();
14921492   UINT8* ram = machine.device<ram_device>(RAM_TAG)->pointer();
14931493
r17963r17964
15151515      /* install 16 KB or 16 KB + 8 KB memory extensions */
15161516      /* BASIC instruction to see free memory: ?FRE(0) */
15171517      int extram = machine.device<ram_device>(RAM_TAG)->size() - 24*1024;
1518      space->install_write_bank(0x8000, 0x8000 + extram - 1, THOM_RAM_BANK);
1519      space->install_read_bank(0x8000, 0x8000 + extram - 1, THOM_RAM_BANK );
1518      space.install_write_bank(0x8000, 0x8000 + extram - 1, THOM_RAM_BANK);
1519      space.install_read_bank(0x8000, 0x8000 + extram - 1, THOM_RAM_BANK );
15201520      machine.root_device().membank( THOM_RAM_BANK )->configure_entry( 0, ram + 0x6000);
15211521      machine.root_device().membank( THOM_RAM_BANK )->set_entry( 0 );
15221522   }
r17963r17964
15681568static void to770_update_ram_bank(running_machine &machine)
15691569{
15701570   pia6821_device *sys_pia = machine.device<pia6821_device>(THOM_PIA_SYS );
1571   address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1571   address_space& space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
15721572   UINT8 portb = sys_pia->port_b_z_mask();
15731573   int bank;
15741574
r17963r17964
16021602                {
16031603         /* RAM size is 48 KB only and unavailable bank
16041604             * requested */
1605         space->nop_readwrite(0xa000, 0xdfff);
1605         space.nop_readwrite(0xa000, 0xdfff);
16061606      }
16071607      old_ram_bank = bank;
16081608      LOG_BANK(( "to770_update_ram_bank: RAM bank change %i\n", bank ));
r17963r17964
16751675
16761676READ8_HANDLER ( to770_gatearray_r )
16771677{
1678   struct thom_vsignal v = thom_get_vsignal(space->machine());
1679   struct thom_vsignal l = thom_get_lightpen_vsignal( space->machine(), TO7_LIGHTPEN_DECAL, to7_lightpen_step - 1, 0 );
1678   struct thom_vsignal v = thom_get_vsignal(space.machine());
1679   struct thom_vsignal l = thom_get_lightpen_vsignal( space.machine(), TO7_LIGHTPEN_DECAL, to7_lightpen_step - 1, 0 );
16801680   int count, inil, init, lt3;
16811681   count = to7_lightpen ? l.count : v.count;
16821682   inil  = to7_lightpen ? l.inil  : v.inil;
r17963r17964
16901690   case 2: return (lt3 << 7) | (inil << 6);
16911691   case 3: return (init << 7);
16921692   default:
1693      logerror( "$%04x to770_gatearray_r: invalid offset %i\n", space->machine().device("maincpu")->safe_pcbase(), offset );
1693      logerror( "$%04x to770_gatearray_r: invalid offset %i\n", space.machine().device("maincpu")->safe_pcbase(), offset );
16941694      return 0;
16951695   }
16961696}
r17963r17964
19071907
19081908READ8_HANDLER ( mo5_gatearray_r )
19091909{
1910   struct thom_vsignal v = thom_get_vsignal(space->machine());
1911   struct thom_vsignal l = thom_get_lightpen_vsignal( space->machine(), MO5_LIGHTPEN_DECAL, to7_lightpen_step - 1, 0 );
1910   struct thom_vsignal v = thom_get_vsignal(space.machine());
1911   struct thom_vsignal l = thom_get_lightpen_vsignal( space.machine(), MO5_LIGHTPEN_DECAL, to7_lightpen_step - 1, 0 );
19121912   int count, inil, init, lt3;
19131913   count = to7_lightpen ? l.count : v.count;
19141914   inil  = to7_lightpen ? l.inil  : v.inil;
r17963r17964
19211921   case 2: return (lt3 << 7) | (inil << 6);
19221922   case 3: return (init << 7);
19231923   default:
1924      logerror( "$%04x mo5_gatearray_r: invalid offset %i\n",  space->machine().device("maincpu")->safe_pcbase(), offset );
1924      logerror( "$%04x mo5_gatearray_r: invalid offset %i\n",  space.machine().device("maincpu")->safe_pcbase(), offset );
19251925      return 0;
19261926   }
19271927}
r17963r17964
19921992
19931993static void mo5_update_cart_bank(running_machine &machine)
19941994{
1995   address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1995   address_space& space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
19961996   int rom_is_ram = mo5_reg_cart & 4;
19971997   int bank = 0;
19981998   int bank_is_read_only = 0;
r17963r17964
20062006                {
20072007         if ( old_cart_bank < 0 || old_cart_bank > 3 )
20082008                        {
2009            space->install_read_bank( 0xb000, 0xefff, THOM_CART_BANK);
2010            space->nop_write( 0xb000, 0xefff);
2009            space.install_read_bank( 0xb000, 0xefff, THOM_CART_BANK);
2010            space.nop_write( 0xb000, 0xefff);
20112011         }
20122012         LOG_BANK(( "mo5_update_cart_bank: CART is cartridge bank %i (A7CB style)\n", bank ));
20132013      }
r17963r17964
20222022                {
20232023                        if ( bank_is_read_only )
20242024                        {
2025                                space->install_read_bank( 0xb000, 0xefff, THOM_CART_BANK);
2026                                space->nop_write( 0xb000, 0xefff );
2025                                space.install_read_bank( 0xb000, 0xefff, THOM_CART_BANK);
2026                                space.nop_write( 0xb000, 0xefff );
20272027                        }
20282028                        else
20292029                        {
2030                                space->install_readwrite_bank( 0xb000, 0xefff, THOM_CART_BANK);
2030                                space.install_readwrite_bank( 0xb000, 0xefff, THOM_CART_BANK);
20312031                        }
20322032                        LOG_BANK(( "mo5_update_cart_bank: CART is nanonetwork RAM bank %i (%s)\n",
20332033                                   mo5_reg_cart & 3,
r17963r17964
20452045                        {
20462046            if ( old_cart_bank < 0 )
20472047                                {
2048               space->install_read_bank( 0xb000, 0xefff, THOM_CART_BANK);
2049               space->install_legacy_write_handler( 0xb000, 0xefff, FUNC(mo5_cartridge_w) );
2050               space->install_legacy_read_handler( 0xbffc, 0xbfff, FUNC(mo5_cartridge_r) );
2048               space.install_read_bank( 0xb000, 0xefff, THOM_CART_BANK);
2049               space.install_legacy_write_handler( 0xb000, 0xefff, FUNC(mo5_cartridge_w) );
2050               space.install_legacy_read_handler( 0xbffc, 0xbfff, FUNC(mo5_cartridge_r) );
20512051            }
20522052            LOG_BANK(( "mo5_update_cart_bank: CART is cartridge bank %i\n", bank ));
20532053         }
r17963r17964
20552055         /* internal ROM */
20562056         if ( old_cart_bank != 0 )
20572057                        {
2058            space->install_read_bank( 0xb000, 0xefff, THOM_CART_BANK);
2059            space->install_legacy_write_handler( 0xb000, 0xefff, FUNC(mo5_cartridge_w) );
2058            space.install_read_bank( 0xb000, 0xefff, THOM_CART_BANK);
2059            space.install_legacy_write_handler( 0xb000, 0xefff, FUNC(mo5_cartridge_w) );
20602060            LOG_BANK(( "mo5_update_cart_bank: CART is internal\n"));
20612061         }
20622062   }
r17963r17964
20832083      return;
20842084
20852085   thom_cart_bank = offset & 3;
2086   mo5_update_cart_bank(space->machine());
2086   mo5_update_cart_bank(space.machine());
20872087}
20882088
20892089
r17963r17964
20912091/* read signal to bffc-bfff generates a bank switch */
20922092READ8_HANDLER ( mo5_cartridge_r )
20932093{
2094   UINT8* pos = space->machine().root_device().memregion( "maincpu" )->base() + 0x10000;
2094   UINT8* pos = space.machine().root_device().memregion( "maincpu" )->base() + 0x10000;
20952095   UINT8 data = pos[offset + 0xbffc + (thom_cart_bank % thom_cart_nb_banks) * 0x4000];
2096   if ( !space->debugger_access() )
2096   if ( !space.debugger_access() )
20972097        {
20982098      thom_cart_bank = offset & 3;
2099      mo5_update_cart_bank(space->machine());
2099      mo5_update_cart_bank(space.machine());
21002100   }
21012101   return data;
21022102}
r17963r17964
21072107WRITE8_HANDLER ( mo5_ext_w )
21082108{
21092109   mo5_reg_cart = data;
2110   mo5_update_cart_bank(space->machine());
2110   mo5_update_cart_bank(space.machine());
21112111}
21122112
21132113
r17963r17964
22032203
22042204WRITE8_HANDLER ( to9_ieee_w )
22052205{
2206   logerror( "$%04x %f to9_ieee_w: unhandled write $%02X to register %i\n", space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(), data, offset );
2206   logerror( "$%04x %f to9_ieee_w: unhandled write $%02X to register %i\n", space.machine().device("maincpu")->safe_pcbase(), space.machine().time().as_double(), data, offset );
22072207}
22082208
22092209
22102210
22112211READ8_HANDLER  ( to9_ieee_r )
22122212{
2213   logerror( "$%04x %f to9_ieee_r: unhandled read from register %i\n", space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(), offset );
2213   logerror( "$%04x %f to9_ieee_r: unhandled read from register %i\n", space.machine().device("maincpu")->safe_pcbase(), space.machine().time().as_double(), offset );
22142214   return 0;
22152215}
22162216
r17963r17964
22262226
22272227READ8_HANDLER ( to9_gatearray_r )
22282228{
2229   struct thom_vsignal v = thom_get_vsignal(space->machine());
2230   struct thom_vsignal l = thom_get_lightpen_vsignal( space->machine(), TO9_LIGHTPEN_DECAL, to7_lightpen_step - 1, 0 );
2229   struct thom_vsignal v = thom_get_vsignal(space.machine());
2230   struct thom_vsignal l = thom_get_lightpen_vsignal( space.machine(), TO9_LIGHTPEN_DECAL, to7_lightpen_step - 1, 0 );
22312231   int count, inil, init, lt3;
22322232   count = to7_lightpen ? l.count : v.count;
22332233   inil  = to7_lightpen ? l.inil  : v.inil;
r17963r17964
22412241   case 2: return (lt3 << 7) | (inil << 6);
22422242   case 3: return (v.init << 7) | (init << 6); /* != TO7/70 */
22432243   default:
2244      logerror( "$%04x to9_gatearray_r: invalid offset %i\n", space->machine().device("maincpu")->safe_pcbase(), offset );
2244      logerror( "$%04x to9_gatearray_r: invalid offset %i\n", space.machine().device("maincpu")->safe_pcbase(), offset );
22452245      return 0;
22462246   }
22472247}
r17963r17964
23152315   case 0: /* palette data */
23162316   {
23172317      UINT8 c =  to9_palette_data[ to9_palette_idx ];
2318      if ( !space->debugger_access() )
2318      if ( !space.debugger_access() )
23192319                {
23202320         to9_palette_idx = ( to9_palette_idx + 1 ) & 31;
23212321                }
r17963r17964
23392339
23402340WRITE8_HANDLER ( to9_vreg_w )
23412341{
2342   LOG_VIDEO(( "$%04x %f to9_vreg_w: off=%i ($%04X) data=$%02X\n", space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(), offset, 0xe7da + offset, data ));
2342   LOG_VIDEO(( "$%04x %f to9_vreg_w: off=%i ($%04X) data=$%02X\n", space.machine().device("maincpu")->safe_pcbase(), space.machine().time().as_double(), offset, 0xe7da + offset, data ));
23432343
23442344   switch ( offset )
23452345   {
r17963r17964
23512351      idx = to9_palette_idx / 2;
23522352      color = to9_palette_data[ 2 * idx + 1 ];
23532353      color = to9_palette_data[ 2 * idx ] | (color << 8);
2354      thom_set_palette( space->machine(), idx ^ 8, color & 0x1fff );
2354      thom_set_palette( space.machine(), idx ^ 8, color & 0x1fff );
23552355
23562356      to9_palette_idx = ( to9_palette_idx + 1 ) & 31;
23572357   }
r17963r17964
23622362      break;
23632363
23642364   case 2: /* video mode */
2365      to9_set_video_mode( space->machine(), data, 0 );
2365      to9_set_video_mode( space.machine(), data, 0 );
23662366      break;
23672367
23682368   case 3: /* border color */
2369      thom_set_border_color( space->machine(), data & 15 );
2369      thom_set_border_color( space.machine(), data & 15 );
23702370      break;
23712371
23722372   default:
r17963r17964
23942394
23952395static void to9_update_cart_bank(running_machine &machine)
23962396{
2397   address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
2397   address_space& space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
23982398   int bank = 0;
23992399   int slot = ( mc6846_get_output_port(machine.device("mc6846")) >> 4 ) & 3; /* bits 4-5: ROM bank */
24002400
r17963r17964
24072407                {
24082408         if ( old_cart_bank < 4)
24092409                        {
2410            space->install_read_bank( 0x0000, 0x3fff, THOM_CART_BANK );
2410            space.install_read_bank( 0x0000, 0x3fff, THOM_CART_BANK );
24112411                        }
24122412         LOG_BANK(( "to9_update_cart_bank: CART is BASIC bank %i\n", to9_soft_bank ));
24132413      }
r17963r17964
24192419                {
24202420         if ( old_cart_bank < 4)
24212421                        {
2422            space->install_read_bank( 0x0000, 0x3fff, THOM_CART_BANK );
2422            space.install_read_bank( 0x0000, 0x3fff, THOM_CART_BANK );
24232423                        }
24242424         LOG_BANK(( "to9_update_cart_bank: CART is software 1 bank %i\n", to9_soft_bank ));
24252425      }
r17963r17964
24312431                {
24322432         if ( old_cart_bank < 4)
24332433                        {
2434            space->install_read_bank( 0x0000, 0x3fff, THOM_CART_BANK );
2434            space.install_read_bank( 0x0000, 0x3fff, THOM_CART_BANK );
24352435                        }
24362436         LOG_BANK(( "to9_update_cart_bank: CART is software 2 bank %i\n", to9_soft_bank ));
24372437      }
r17963r17964
24452445                        {
24462446            if ( old_cart_bank < 0 || old_cart_bank > 3 )
24472447                                {
2448               space->install_read_bank( 0x0000, 0x3fff, THOM_CART_BANK );
2449               space->install_legacy_write_handler( 0x0000, 0x3fff, FUNC(to9_cartridge_w) );
2450               space->install_legacy_read_handler( 0x0000, 0x0003, FUNC(to9_cartridge_r) );
2448               space.install_read_bank( 0x0000, 0x3fff, THOM_CART_BANK );
2449               space.install_legacy_write_handler( 0x0000, 0x3fff, FUNC(to9_cartridge_w) );
2450               space.install_legacy_read_handler( 0x0000, 0x0003, FUNC(to9_cartridge_r) );
24512451            }
24522452            LOG_BANK(( "to9_update_cart_bank: CART is cartridge bank %i\n",  thom_cart_bank ));
24532453         }
24542454      } else
24552455         if ( old_cart_bank != 0 )
24562456                        {
2457            space->nop_read( 0x0000, 0x3fff);
2457            space.nop_read( 0x0000, 0x3fff);
24582458            LOG_BANK(( "to9_update_cart_bank: CART is unmapped\n"));
24592459         }
24602460      break;
r17963r17964
24782478/* write signal to 0000-1fff generates a bank switch */
24792479WRITE8_HANDLER ( to9_cartridge_w )
24802480{
2481   int slot = ( mc6846_get_output_port(space->machine().device("mc6846")) >> 4 ) & 3; /* bits 4-5: ROM bank */
2481   int slot = ( mc6846_get_output_port(space.machine().device("mc6846")) >> 4 ) & 3; /* bits 4-5: ROM bank */
24822482
24832483   if ( offset >= 0x2000 )
24842484      return;
r17963r17964
24872487      thom_cart_bank = offset & 3;
24882488   else
24892489      to9_soft_bank = offset & 3;
2490   to9_update_cart_bank(space->machine());
2490   to9_update_cart_bank(space.machine());
24912491}
24922492
24932493
r17963r17964
24952495/* read signal to 0000-0003 generates a bank switch */
24962496READ8_HANDLER ( to9_cartridge_r )
24972497{
2498   UINT8* pos = space->machine().root_device().memregion( "maincpu" )->base() + 0x10000;
2498   UINT8* pos = space.machine().root_device().memregion( "maincpu" )->base() + 0x10000;
24992499   UINT8 data = pos[offset + (thom_cart_bank % thom_cart_nb_banks) * 0x4000];
2500   if ( !space->debugger_access() )
2500   if ( !space.debugger_access() )
25012501        {
25022502      thom_cart_bank = offset & 3;
2503      to9_update_cart_bank(space->machine());
2503      to9_update_cart_bank(space.machine());
25042504   }
25052505   return data;
25062506}
r17963r17964
25102510static void to9_update_ram_bank (running_machine &machine)
25112511{
25122512   pia6821_device *sys_pia = machine.device<pia6821_device>(THOM_PIA_SYS );
2513   address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
2513   address_space& space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
25142514   UINT8 port = mc6846_get_output_port(machine.device("mc6846"));
25152515   UINT8 portb = sys_pia->port_b_z_mask();
25162516   UINT8 disk = ((port >> 2) & 1) | ((port >> 5) & 2); /* bits 6,2: RAM bank */
r17963r17964
25452545                }
25462546      else
25472547                {
2548         space->nop_readwrite( 0xa000, 0xdfff);
2548         space.nop_readwrite( 0xa000, 0xdfff);
25492549                }
25502550      old_ram_bank = bank;
25512551      LOG_BANK(( "to9_update_ram_bank: bank %i selected (pia=$%02X disk=%i)\n", bank, portb & 0xf8, disk ));
r17963r17964
26682668      /* bit 7:     interrupt */
26692669
26702670      LOG_KBD(( "$%04x %f to9_kbd_r: status $%02X (rdrf=%i, tdre=%i, ovrn=%i, pe=%i, irq=%i)\n",
2671           space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(), to9_kbd_status,
2671           space.machine().device("maincpu")->safe_pcbase(), space.machine().time().as_double(), to9_kbd_status,
26722672           (to9_kbd_status & ACIA_6850_RDRF) ? 1 : 0,
26732673           (to9_kbd_status & ACIA_6850_TDRE) ? 1 : 0,
26742674           (to9_kbd_status & ACIA_6850_OVRN) ? 1 : 0,
r17963r17964
26772677      return to9_kbd_status;
26782678
26792679   case 1: /* get input data */
2680      if ( !space->debugger_access() )
2680      if ( !space.debugger_access() )
26812681      {
26822682         to9_kbd_status &= ~(ACIA_6850_irq | ACIA_6850_PE);
26832683         if ( to9_kbd_overrun )
r17963r17964
26852685         else
26862686            to9_kbd_status &= ~(ACIA_6850_OVRN | ACIA_6850_RDRF);
26872687         to9_kbd_overrun = 0;
2688         LOG_KBD(( "$%04x %f to9_kbd_r: read data $%02X\n", space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(), to9_kbd_in ));
2689         to9_kbd_update_irq(space->machine());
2688         LOG_KBD(( "$%04x %f to9_kbd_r: read data $%02X\n", space.machine().device("maincpu")->safe_pcbase(), space.machine().time().as_double(), to9_kbd_in ));
2689         to9_kbd_update_irq(space.machine());
26902690      }
26912691      return to9_kbd_in;
26922692
26932693   default:
2694      logerror( "$%04x to9_kbd_r: invalid offset %i\n", space->machine().device("maincpu")->safe_pcbase(),  offset );
2694      logerror( "$%04x to9_kbd_r: invalid offset %i\n", space.machine().device("maincpu")->safe_pcbase(),  offset );
26952695      return 0;
26962696   }
26972697}
r17963r17964
27132713         to9_kbd_overrun = 0;
27142714         to9_kbd_status = ACIA_6850_TDRE;
27152715         to9_kbd_intr = 0;
2716         LOG_KBD(( "$%04x %f to9_kbd_w: reset (data=$%02X)\n", space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(), data ));
2716         LOG_KBD(( "$%04x %f to9_kbd_w: reset (data=$%02X)\n", space.machine().device("maincpu")->safe_pcbase(), space.machine().time().as_double(), data ));
27172717      }
27182718      else
27192719      {
r17963r17964
27272727         to9_kbd_intr = data >> 5;
27282728
27292729         LOG_KBD(( "$%04x %f to9_kbd_w: set control to $%02X (parity=%i, intr in=%i out=%i)\n",
2730              space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(),
2730              space.machine().device("maincpu")->safe_pcbase(), space.machine().time().as_double(),
27312731              data, to9_kbd_parity, to9_kbd_intr >> 2,
27322732              (to9_kbd_intr & 3) ? 1 : 0 ));
27332733      }
2734      to9_kbd_update_irq(space->machine());
2734      to9_kbd_update_irq(space.machine());
27352735      break;
27362736
27372737   case 1: /* output data */
27382738      to9_kbd_status &= ~(ACIA_6850_irq | ACIA_6850_TDRE);
2739      to9_kbd_update_irq(space->machine());
2739      to9_kbd_update_irq(space.machine());
27402740      /* TODO: 1 ms delay here ? */
27412741      to9_kbd_status |= ACIA_6850_TDRE; /* data transmit ready again */
2742      to9_kbd_update_irq(space->machine());
2742      to9_kbd_update_irq(space.machine());
27432743
27442744      switch ( data )
27452745      {
r17963r17964
27582758      case 0xFE: to9_kbd_periph = 0; break;
27592759
27602760      default:
2761         logerror( "$%04x %f to9_kbd_w: unknown kbd command %02X\n", space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(), data );
2761         logerror( "$%04x %f to9_kbd_w: unknown kbd command %02X\n", space.machine().device("maincpu")->safe_pcbase(), space.machine().time().as_double(), data );
27622762      }
27632763
2764      thom_set_caps_led( space->machine(), !to9_kbd_caps );
2764      thom_set_caps_led( space.machine(), !to9_kbd_caps );
27652765
27662766      LOG(( "$%04x %f to9_kbd_w: kbd command %02X (caps=%i, pad=%i, periph=%i)\n",
2767            space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(), data,
2767            space.machine().device("maincpu")->safe_pcbase(), space.machine().time().as_double(), data,
27682768            to9_kbd_caps, to9_kbd_pad, to9_kbd_periph ));
27692769
27702770      break;
27712771
27722772   default:
2773      logerror( "$%04x to9_kbd_w: invalid offset %i (data=$%02X) \n", space->machine().device("maincpu")->safe_pcbase(), offset, data );
2773      logerror( "$%04x to9_kbd_w: invalid offset %i (data=$%02X) \n", space.machine().device("maincpu")->safe_pcbase(), offset, data );
27742774   }
27752775}
27762776
r17963r17964
35733573static void to8_update_ram_bank (running_machine &machine)
35743574{
35753575   pia6821_device *sys_pia = machine.device<pia6821_device>(THOM_PIA_SYS );
3576   address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
3576   address_space& space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
35773577   UINT8 bank = 0;
35783578
35793579   if ( to8_reg_sys1 & 0x10 )
r17963r17964
36173617                {
36183618         /* RAM size is 256 KB only and unavailable
36193619             * bank requested */
3620         space->nop_readwrite( 0xa000, 0xbfff);
3621         space->nop_readwrite( 0xc000, 0xdfff);
3620         space.nop_readwrite( 0xa000, 0xbfff);
3621         space.nop_readwrite( 0xc000, 0xdfff);
36223622      }
36233623      to8_data_vpage = bank;
36243624      old_ram_bank = bank;
r17963r17964
36373637
36383638static void to8_update_cart_bank (running_machine &machine)
36393639{
3640   address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
3640   address_space& space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
36413641   int bank = 0;
36423642   int bank_is_read_only = 0;
36433643
r17963r17964
36563656                                {
36573657               if (old_cart_bank < 8 || old_cart_bank > 11)
36583658                                        {
3659                  space->install_read_bank( 0x0000, 0x3fff, THOM_CART_BANK );
3659                  space.install_read_bank( 0x0000, 0x3fff, THOM_CART_BANK );
36603660                  if ( bank_is_read_only )
36613661                                                {
3662                     space->nop_write( 0x0000, 0x3fff);
3662                     space.nop_write( 0x0000, 0x3fff);
36633663                                                }
36643664                  else
36653665                                                {
3666                     space->install_legacy_write_handler( 0x0000, 0x3fff, FUNC(to8_vcart_w));
3666                     space.install_legacy_write_handler( 0x0000, 0x3fff, FUNC(to8_vcart_w));
36673667                                                }
36683668               }
36693669            }
r17963r17964
36733673                                        {
36743674                  if ( bank_is_read_only )
36753675                                                {
3676                     space->install_read_bank( 0x0000, 0x3fff, THOM_CART_BANK );
3677                     space->nop_write( 0x0000, 0x3fff);
3676                     space.install_read_bank( 0x0000, 0x3fff, THOM_CART_BANK );
3677                     space.nop_write( 0x0000, 0x3fff);
36783678                  }
36793679                                                else
36803680                                                {
3681                     space->install_readwrite_bank( 0x0000, 0x3fff,THOM_CART_BANK);
3681                     space.install_readwrite_bank( 0x0000, 0x3fff,THOM_CART_BANK);
36823682                                                }
36833683                                        }
36843684                                }
r17963r17964
36873687                        {
36883688            /* RAM size is 256 KB only and unavailable
36893689                 * bank requested */
3690            space->nop_readwrite( 0x0000, 0x3fff);
3690            space.nop_readwrite( 0x0000, 0x3fff);
36913691                        }
36923692         LOG_BANK(( "to8_update_cart_bank: CART is RAM bank %i (%s)\n",
36933693                                   to8_cart_vpage,
r17963r17964
36993699                        {
37003700                                if ( bank_is_read_only )
37013701                                {
3702                                        space->nop_write( 0x0000, 0x3fff);
3702                                        space.nop_write( 0x0000, 0x3fff);
37033703                                }
37043704                                else
37053705                                {
37063706                                        if (to8_cart_vpage < 4)
37073707                                        {
3708                                                space->install_legacy_write_handler( 0x0000, 0x3fff, FUNC(to8_vcart_w));
3708                                                space.install_legacy_write_handler( 0x0000, 0x3fff, FUNC(to8_vcart_w));
37093709                                        }
37103710                                        else
37113711                                        {
3712                                                space->install_readwrite_bank( 0x0000, 0x3fff, THOM_CART_BANK );
3712                                                space.install_readwrite_bank( 0x0000, 0x3fff, THOM_CART_BANK );
37133713                                        }
37143714                                }
37153715                                LOG_BANK(( "to8_update_cart_bank: update CART bank %i write status to %s\n",
r17963r17964
37293729                        {
37303730            if ( old_cart_bank < 4 || old_cart_bank > 7 )
37313731                                {
3732               space->install_read_bank( 0x0000, 0x3fff, THOM_CART_BANK );
3733               space->install_legacy_write_handler( 0x0000, 0x3fff, FUNC(to8_cartridge_w) );
3732               space.install_read_bank( 0x0000, 0x3fff, THOM_CART_BANK );
3733               space.install_legacy_write_handler( 0x0000, 0x3fff, FUNC(to8_cartridge_w) );
37343734            }
37353735            LOG_BANK(( "to8_update_cart_bank: CART is internal bank %i\n", to8_soft_bank ));
37363736         }
r17963r17964
37453745                                {
37463746               if ( old_cart_bank < 0 || old_cart_bank > 3 )
37473747                                        {
3748                  space->install_read_bank( 0x0000, 0x3fff, THOM_CART_BANK );
3749                  space->install_legacy_write_handler( 0x0000, 0x3fff, FUNC(to8_cartridge_w) );
3750                  space->install_legacy_read_handler( 0x0000, 0x0003, FUNC(to8_cartridge_r) );
3748                  space.install_read_bank( 0x0000, 0x3fff, THOM_CART_BANK );
3749                  space.install_legacy_write_handler( 0x0000, 0x3fff, FUNC(to8_cartridge_w) );
3750                  space.install_legacy_read_handler( 0x0000, 0x0003, FUNC(to8_cartridge_r) );
37513751               }
37523752               LOG_BANK(( "to8_update_cart_bank: CART is external cartridge bank %i\n", bank ));
37533753            }
r17963r17964
37563756                        {
37573757            if ( old_cart_bank != 0 )
37583758                                {
3759               space->nop_read( 0x0000, 0x3fff);
3759               space.nop_read( 0x0000, 0x3fff);
37603760               LOG_BANK(( "to8_update_cart_bank: CART is unmapped\n"));
37613761            }
37623762                        }
r17963r17964
37893789   else
37903790      thom_cart_bank = offset & 3;
37913791
3792   to8_update_cart_bank(space->machine());
3792   to8_update_cart_bank(space.machine());
37933793}
37943794
37953795
r17963r17964
37973797/* read signal to 0000-0003 generates a bank switch */
37983798READ8_HANDLER ( to8_cartridge_r )
37993799{
3800   UINT8* pos = space->machine().root_device().memregion( "maincpu" )->base() + 0x10000;
3800   UINT8* pos = space.machine().root_device().memregion( "maincpu" )->base() + 0x10000;
38013801   UINT8 data = pos[offset + (thom_cart_bank % thom_cart_nb_banks) * 0x4000];
3802   if ( !space->debugger_access() )
3802   if ( !space.debugger_access() )
38033803        {
38043804      thom_cart_bank = offset & 3;
3805      to8_update_cart_bank(space->machine());
3805      to8_update_cart_bank(space.machine());
38063806   }
38073807   return data;
38083808}
r17963r17964
38333833
38343834READ8_HANDLER ( to8_floppy_r )
38353835{
3836   if ( space->debugger_access() )
3836   if ( space.debugger_access() )
38373837      return 0;
38383838
38393839   if ( (to8_reg_sys1 & 0x80) && THOM_FLOPPY_EXT )
r17963r17964
38713871
38723872READ8_HANDLER ( to8_gatearray_r )
38733873{
3874   struct thom_vsignal v = thom_get_vsignal(space->machine());
3875   struct thom_vsignal l = thom_get_lightpen_vsignal( space->machine(), TO8_LIGHTPEN_DECAL, to7_lightpen_step - 1, 6 );
3874   struct thom_vsignal v = thom_get_vsignal(space.machine());
3875   struct thom_vsignal l = thom_get_lightpen_vsignal( space.machine(), TO8_LIGHTPEN_DECAL, to7_lightpen_step - 1, 6 );
38763876   int count, inil, init, lt3;
38773877   UINT8 res;
38783878   count = to7_lightpen ? l.count : v.count;
r17963r17964
38933893   case 1: /* ram register / lightpen register 2 */
38943894      if ( to7_lightpen )
38953895      {
3896         if ( !space->debugger_access() )
3896         if ( !space.debugger_access() )
38973897         {
3898            thom_firq_2( space->machine(), 0 );
3898            thom_firq_2( space.machine(), 0 );
38993899            to8_lightpen_intr = 0;
39003900         }
39013901         res = count & 0xff;
r17963r17964
39163916      break;
39173917
39183918   default:
3919      logerror( "$%04x to8_gatearray_r: invalid offset %i\n", space->machine().device("maincpu")->safe_pcbase(), offset );
3919      logerror( "$%04x to8_gatearray_r: invalid offset %i\n", space.machine().device("maincpu")->safe_pcbase(), offset );
39203920      res = 0;
39213921   }
39223922
39233923   LOG_VIDEO(( "$%04x %f to8_gatearray_r: off=%i ($%04X) res=$%02X lightpen=%i\n",
3924        space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(),
3924        space.machine().device("maincpu")->safe_pcbase(), space.machine().time().as_double(),
39253925        offset, 0xe7e4 + offset, res, to7_lightpen ));
39263926
39273927   return res;
r17963r17964
39323932WRITE8_HANDLER ( to8_gatearray_w )
39333933{
39343934   LOG_VIDEO(( "$%04x %f to8_gatearray_w: off=%i ($%04X) data=$%02X\n",
3935        space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(),
3935        space.machine().device("maincpu")->safe_pcbase(), space.machine().time().as_double(),
39363936        offset, 0xe7e4 + offset, data ));
39373937
39383938   switch ( offset )
r17963r17964
39463946      if ( to8_reg_sys1 & 0x10 )
39473947      {
39483948         to8_reg_ram = data;
3949         to8_update_ram_bank(space->machine());
3949         to8_update_ram_bank(space.machine());
39503950      }
39513951      break;
39523952
39533953   case 2: /* cartridge register */
39543954      to8_reg_cart = data;
3955      to8_update_cart_bank(space->machine());
3955      to8_update_cart_bank(space.machine());
39563956      break;
39573957
39583958   case 3: /* system register 1 */
39593959      to8_reg_sys1 = data;
3960      to8_update_floppy_bank(space->machine());
3961      to8_update_ram_bank(space->machine());
3962      to8_update_cart_bank(space->machine());
3960      to8_update_floppy_bank(space.machine());
3961      to8_update_ram_bank(space.machine());
3962      to8_update_cart_bank(space.machine());
39633963      break;
39643964
39653965   default:
39663966      logerror( "$%04x to8_gatearray_w: invalid offset %i (data=$%02X)\n",
3967           space->machine().device("maincpu")->safe_pcbase(), offset, data );
3967           space.machine().device("maincpu")->safe_pcbase(), offset, data );
39683968   }
39693969}
39703970
r17963r17964
39793979   /* 0xe7dc from external floppy drive aliases the video gate-array */
39803980   if ( ( offset == 3 ) && ( to8_reg_ram & 0x80 ) && ( to8_reg_sys1 & 0x80 ) )
39813981   {
3982      if ( space->debugger_access() )
3982      if ( space.debugger_access() )
39833983         return 0;
39843984
39853985      if ( THOM_FLOPPY_EXT )
r17963r17964
39943994   case 0: /* palette data */
39953995   {
39963996      UINT8 c =  to9_palette_data[ to9_palette_idx ];
3997      if ( !space->debugger_access() )
3997      if ( !space.debugger_access() )
39983998                {
39993999         to9_palette_idx = ( to9_palette_idx + 1 ) & 31;
40004000                }
r17963r17964
40194019WRITE8_HANDLER ( to8_vreg_w )
40204020{
40214021   LOG_VIDEO(( "$%04x %f to8_vreg_w: off=%i ($%04X) data=$%02X\n",
4022        space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(),
4022        space.machine().device("maincpu")->safe_pcbase(), space.machine().time().as_double(),
40234023        offset, 0xe7da + offset, data ));
40244024
40254025   switch ( offset )
r17963r17964
40324032      idx = to9_palette_idx / 2;
40334033      color = to9_palette_data[ 2 * idx + 1 ];
40344034      color = to9_palette_data[ 2 * idx ] | (color << 8);
4035      thom_set_palette( space->machine(), idx, color & 0x1fff );
4035      thom_set_palette( space.machine(), idx, color & 0x1fff );
40364036      to9_palette_idx = ( to9_palette_idx + 1 ) & 31;
40374037   }
40384038   break;
r17963r17964
40424042      break;
40434043
40444044   case 2: /* display register */
4045      to9_set_video_mode( space->machine(), data, 1 );
4045      to9_set_video_mode( space.machine(), data, 1 );
40464046      break;
40474047
40484048   case 3: /* system register 2 */
r17963r17964
40554055      else
40564056      {
40574057         to8_reg_sys2 = data;
4058         thom_set_video_page( space->machine(), data >> 6 );
4059         thom_set_border_color( space->machine(), data & 15 );
4058         thom_set_video_page( space.machine(), data >> 6 );
4059         thom_set_border_color( space.machine(), data & 15 );
40604060      }
40614061      break;
40624062
r17963r17964
44984498static void mo6_update_cart_bank (running_machine &machine)
44994499{
45004500   pia6821_device *sys_pia = machine.device<pia6821_device>(THOM_PIA_SYS );
4501   address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
4501   address_space& space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
45024502   int b = (sys_pia->a_output() >> 5) & 1;
45034503   int bank = 0;
45044504   int bank_is_read_only = 0;
45054505
4506   // space->install_read_bank( 0xb000, 0xefff, THOM_CART_BANK );
4506   // space.install_read_bank( 0xb000, 0xefff, THOM_CART_BANK );
45074507
45084508   if ( ( ( to8_reg_sys1 & 0x40 ) && ( to8_reg_cart & 0x20 ) ) || ( ! ( to8_reg_sys1 & 0x40 ) && ( mo5_reg_cart & 4 ) ) )
45094509   {
r17963r17964
45204520                                {
45214521               if (old_cart_bank < 8 || old_cart_bank > 11)
45224522                                        {
4523                  space->install_read_bank( 0xb000, 0xefff, THOM_CART_BANK );
4523                  space.install_read_bank( 0xb000, 0xefff, THOM_CART_BANK );
45244524                  if ( bank_is_read_only )
45254525                                                {
4526                     space->nop_write( 0xb000, 0xefff);
4526                     space.nop_write( 0xb000, 0xefff);
45274527                                                }
45284528                  else
45294529                                                {
4530                     space->install_legacy_write_handler( 0xb000, 0xefff, FUNC(to8_vcart_w));
4530                     space.install_legacy_write_handler( 0xb000, 0xefff, FUNC(to8_vcart_w));
45314531                                                }
45324532               }
45334533            }
r17963r17964
45384538                                        {
45394539                  if ( bank_is_read_only )
45404540                                                {
4541                     space->install_read_bank( 0xb000, 0xefff, THOM_CART_BANK );
4542                     space->nop_write( 0xb000, 0xefff);
4541                     space.install_read_bank( 0xb000, 0xefff, THOM_CART_BANK );
4542                     space.nop_write( 0xb000, 0xefff);
45434543                  }
45444544                                                else
45454545                                                {
4546                     space->install_readwrite_bank( 0xb000, 0xefff,THOM_CART_BANK);
4546                     space.install_readwrite_bank( 0xb000, 0xefff,THOM_CART_BANK);
45474547                                                }
45484548                                        }
45494549                                }
r17963r17964
45554555                        {
45564556            if ( bank_is_read_only )
45574557                                {
4558               space->nop_write( 0xb000, 0xefff);
4558               space.nop_write( 0xb000, 0xefff);
45594559                                }
45604560            else
45614561                                {
45624562               if (to8_cart_vpage < 4)
45634563                                        {
4564                  space->install_legacy_write_handler( 0xb000, 0xefff, FUNC(to8_vcart_w));
4564                  space.install_legacy_write_handler( 0xb000, 0xefff, FUNC(to8_vcart_w));
45654565                                        }
45664566               else
45674567                                        {
4568                  space->install_readwrite_bank( 0xb000, 0xefff, THOM_CART_BANK );
4568                  space.install_readwrite_bank( 0xb000, 0xefff, THOM_CART_BANK );
45694569                                        }
45704570                                }
45714571            LOG_BANK(( "mo6_update_cart_bank: update CART bank %i write status to %s\n",
r17963r17964
45824582                        {
45834583            if ( old_cart_bank < 0 || old_cart_bank > 3 )
45844584                                {
4585               space->install_read_bank( 0xb000, 0xefff, THOM_CART_BANK );
4586               space->nop_write( 0xb000, 0xefff);
4585               space.install_read_bank( 0xb000, 0xefff, THOM_CART_BANK );
4586               space.nop_write( 0xb000, 0xefff);
45874587            }
45884588            LOG_BANK(( "mo6_update_cart_bank: CART is external cartridge bank %i (A7CB style)\n", bank ));
45894589         }
r17963r17964
46004600                                {
46014601               if ( bank_is_read_only )
46024602                                        {
4603                  space->install_read_bank( 0xb000, 0xefff, THOM_CART_BANK);
4604                  space->nop_write( 0xb000, 0xefff);
4603                  space.install_read_bank( 0xb000, 0xefff, THOM_CART_BANK);
4604                  space.nop_write( 0xb000, 0xefff);
46054605               } else
46064606                                        {
4607                  space->install_readwrite_bank( 0xb000, 0xefff, THOM_CART_BANK);
4607                  space.install_readwrite_bank( 0xb000, 0xefff, THOM_CART_BANK);
46084608                                        }
46094609            }
46104610            LOG_BANK(( "mo6_update_cart_bank: CART is RAM bank %i (MO5 compat.) (%s)\n",
r17963r17964
46154615                        {
46164616            if ( bank_is_read_only )
46174617                                {
4618               space->install_read_bank( 0xb000, 0xefff, THOM_CART_BANK);
4619               space->nop_write( 0xb000, 0xefff);
4618               space.install_read_bank( 0xb000, 0xefff, THOM_CART_BANK);
4619               space.nop_write( 0xb000, 0xefff);
46204620            }
46214621                                else
46224622                                {
4623               space->install_readwrite_bank( 0xb000, 0xefff, THOM_CART_BANK);
4623               space.install_readwrite_bank( 0xb000, 0xefff, THOM_CART_BANK);
46244624                                }
46254625            LOG_BANK(( "mo5_update_cart_bank: update CART bank %i write status to %s\n",
46264626                                           to8_cart_vpage,
r17963r17964
46474647                        {
46484648            if ( old_cart_bank < 4 || old_cart_bank > 7 )
46494649                                {
4650               space->install_read_bank( 0xb000, 0xefff, THOM_CART_BANK);
4651               space->install_legacy_write_handler( 0xb000, 0xefff, FUNC(mo6_cartridge_w) );
4650               space.install_read_bank( 0xb000, 0xefff, THOM_CART_BANK);
4651               space.install_legacy_write_handler( 0xb000, 0xefff, FUNC(mo6_cartridge_w) );
46524652            }
46534653            LOG_BANK(( "mo6_update_cart_bank: CART is internal ROM bank %i\n", b ));
46544654         }
r17963r17964
46634663                                {
46644664               if ( old_cart_bank < 0 || old_cart_bank > 3 )
46654665                                        {
4666                  space->install_read_bank( 0xb000, 0xefff, THOM_CART_BANK );
4667                  space->install_legacy_write_handler( 0xb000, 0xefff, FUNC(mo6_cartridge_w) );
4668                  space->install_legacy_read_handler( 0xbffc, 0xbfff, FUNC(mo6_cartridge_r) );
4666                  space.install_read_bank( 0xb000, 0xefff, THOM_CART_BANK );
4667                  space.install_legacy_write_handler( 0xb000, 0xefff, FUNC(mo6_cartridge_w) );
4668                  space.install_legacy_read_handler( 0xbffc, 0xbfff, FUNC(mo6_cartridge_r) );
46694669               }
46704670               LOG_BANK(( "mo6_update_cart_bank: CART is external cartridge bank %i\n", bank ));
46714671            }
r17963r17964
46744674                        {
46754675            if ( old_cart_bank != 0 )
46764676                                {
4677               space->nop_read( 0xb000, 0xefff );
4677               space.nop_read( 0xb000, 0xefff );
46784678               LOG_BANK(( "mo6_update_cart_bank: CART is unmapped\n"));
46794679            }
46804680                        }
r17963r17964
47044704      return;
47054705
47064706   thom_cart_bank = offset & 3;
4707   mo6_update_cart_bank(space->machine());
4707   mo6_update_cart_bank(space.machine());
47084708}
47094709
47104710
r17963r17964
47124712/* read signal generates a bank switch */
47134713READ8_HANDLER ( mo6_cartridge_r )
47144714{
4715   UINT8* pos = space->machine().root_device().memregion( "maincpu" )->base() + 0x10000;
4715   UINT8* pos = space.machine().root_device().memregion( "maincpu" )->base() + 0x10000;
47164716   UINT8 data = pos[offset + 0xbffc + (thom_cart_bank % thom_cart_nb_banks) * 0x4000];
4717   if ( !space->debugger_access() )
4717   if ( !space.debugger_access() )
47184718        {
47194719      thom_cart_bank = offset & 3;
4720      mo6_update_cart_bank(space->machine());
4720      mo6_update_cart_bank(space.machine());
47214721   }
47224722   return data;
47234723}
r17963r17964
47284728{
47294729   /* MO5 network extension compatible */
47304730   mo5_reg_cart = data;
4731   mo6_update_cart_bank(space->machine());
4731   mo6_update_cart_bank(space.machine());
47324732}
47334733
47344734
r17963r17964
49304930
49314931READ8_HANDLER ( mo6_gatearray_r )
49324932{
4933   struct thom_vsignal v = thom_get_vsignal(space->machine());
4934   struct thom_vsignal l = thom_get_lightpen_vsignal( space->machine(), MO6_LIGHTPEN_DECAL, to7_lightpen_step - 1, 6 );
4933   struct thom_vsignal v = thom_get_vsignal(space.machine());
4934   struct thom_vsignal l = thom_get_lightpen_vsignal( space.machine(), MO6_LIGHTPEN_DECAL, to7_lightpen_step - 1, 6 );
49354935   int count, inil, init, lt3;
49364936   UINT8 res;
49374937   count = to7_lightpen ? l.count : v.count;
r17963r17964
49524952   case 1: /* ram register / lightpen register 2 */
49534953      if ( to7_lightpen )
49544954      {
4955         if ( !space->debugger_access() )
4955         if ( !space.debugger_access() )
49564956         {
4957            thom_firq_2( space->machine(), 0 );
4957            thom_firq_2( space.machine(), 0 );
49584958            to8_lightpen_intr = 0;
49594959         }
49604960         res =  count & 0xff;
r17963r17964
49754975      break;
49764976
49774977   default:
4978      logerror( "$%04x mo6_gatearray_r: invalid offset %i\n", space->machine().device("maincpu")->safe_pcbase(), offset );
4978      logerror( "$%04x mo6_gatearray_r: invalid offset %i\n", space.machine().device("maincpu")->safe_pcbase(), offset );
49794979      res = 0;
49804980   }
49814981
49824982   LOG_VIDEO(( "$%04x %f mo6_gatearray_r: off=%i ($%04X) res=$%02X lightpen=%i\n",
4983        space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(),
4983        space.machine().device("maincpu")->safe_pcbase(), space.machine().time().as_double(),
49844984        offset, 0xa7e4 + offset, res, to7_lightpen ));
49854985
49864986   return res;
r17963r17964
49914991WRITE8_HANDLER ( mo6_gatearray_w )
49924992{
49934993   LOG_VIDEO(( "$%04x %f mo6_gatearray_w: off=%i ($%04X) data=$%02X\n",
4994        space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(),
4994        space.machine().device("maincpu")->safe_pcbase(), space.machine().time().as_double(),
49954995        offset, 0xa7e4 + offset, data ));
49964996
49974997   switch ( offset )
r17963r17964
50055005      if ( to8_reg_sys1 & 0x10 )
50065006      {
50075007         to8_reg_ram = data;
5008         mo6_update_ram_bank(space->machine());
5008         mo6_update_ram_bank(space.machine());
50095009      }
50105010      break;
50115011
50125012   case 2: /* cartridge register */
50135013      to8_reg_cart = data;
5014      mo6_update_cart_bank(space->machine());
5014      mo6_update_cart_bank(space.machine());
50155015      break;
50165016
50175017   case 3: /* system register 1 */
50185018      to8_reg_sys1 = data;
5019      mo6_update_ram_bank(space->machine());
5020      mo6_update_cart_bank(space->machine());
5019      mo6_update_ram_bank(space.machine());
5020      mo6_update_cart_bank(space.machine());
50215021      break;
50225022
50235023   default:
5024      logerror( "$%04x mo6_gatearray_w: invalid offset %i (data=$%02X)\n", space->machine().device("maincpu")->safe_pcbase(), offset, data );
5024      logerror( "$%04x mo6_gatearray_w: invalid offset %i (data=$%02X)\n", space.machine().device("maincpu")->safe_pcbase(), offset, data );
50255025   }
50265026}
50275027
r17963r17964
50355035   /* 0xa7dc from external floppy drive aliases the video gate-array */
50365036   if ( ( offset == 3 ) && ( to8_reg_ram & 0x80 ) )
50375037        {
5038      if ( !space->debugger_access() )
5038      if ( !space.debugger_access() )
50395039         return to7_floppy_r( space, 0xc );
50405040        }
50415041
r17963r17964
50615061WRITE8_HANDLER ( mo6_vreg_w )
50625062{
50635063   LOG_VIDEO(( "$%04x %f mo6_vreg_w: off=%i ($%04X) data=$%02X\n",
5064        space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(),
5064        space.machine().device("maincpu")->safe_pcbase(), space.machine().time().as_double(),
50655065        offset, 0xa7da + offset, data ));
50665066
50675067   switch ( offset )
r17963r17964
50765076      if ( ( to8_reg_sys1 & 0x80 ) && ( to8_reg_ram & 0x80 ) )
50775077         to7_floppy_w( space, 0xc, data );
50785078      else
5079         to9_set_video_mode( space->machine(), data, 2 );
5079         to9_set_video_mode( space.machine(), data, 2 );
50805080      break;
50815081
50825082   case 3: /* system register 2 */
r17963r17964
50865086      else
50875087      {
50885088         to8_reg_sys2 = data;
5089         thom_set_video_page( space->machine(), data >> 6 );
5090         thom_set_border_color( space->machine(), data & 15 );
5091         mo6_update_cart_bank(space->machine());
5089         thom_set_video_page( space.machine(), data >> 6 );
5090         thom_set_border_color( space.machine(), data & 15 );
5091         mo6_update_cart_bank(space.machine());
50925092      }
50935093      break;
50945094
r17963r17964
52135213
52145214READ8_HANDLER ( mo5nr_net_r )
52155215{
5216   if ( space->debugger_access() )
5216   if ( space.debugger_access() )
52175217      return 0;
52185218
52195219   if ( to7_controller_type )
52205220      return to7_floppy_r ( space, offset );
52215221
5222   logerror( "$%04x %f mo5nr_net_r: read from reg %i\n", space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(), offset );
5222   logerror( "$%04x %f mo5nr_net_r: read from reg %i\n", space.machine().device("maincpu")->safe_pcbase(), space.machine().time().as_double(), offset );
52235223
52245224   return 0;
52255225}
r17963r17964
52325232      to7_floppy_w ( space, offset, data );
52335233   else
52345234      logerror( "$%04x %f mo5nr_net_w: write $%02X to reg %i\n",
5235           space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(), data, offset );
5235           space.machine().device("maincpu")->safe_pcbase(), space.machine().time().as_double(), data, offset );
52365236}
52375237
52385238
r17963r17964
52455245
52465246READ8_HANDLER( mo5nr_prn_r )
52475247{
5248   centronics_device *printer = space->machine().device<centronics_device>("centronics");
5248   centronics_device *printer = space.machine().device<centronics_device>("centronics");
52495249   UINT8 result = 0;
52505250
52515251   result |= !printer->busy_r() << 7;
r17963r17964
52565256
52575257WRITE8_HANDLER( mo5nr_prn_w )
52585258{
5259   centronics_device *printer = space->machine().device<centronics_device>("centronics");
5259   centronics_device *printer = space.machine().device<centronics_device>("centronics");
52605260
52615261   /* TODO: understand other bits */
52625262   printer->strobe_w(BIT(data, 3));
trunk/src/mess/machine/thomflop.c
r17963r17964
273273
274274static READ8_HANDLER ( to7_5p14_r )
275275{
276   device_t *fdc = space->machine().device("wd2793");
276   device_t *fdc = space.machine().device("wd2793");
277277
278278   if ( offset < 4 )
279      return wd17xx_r( fdc, *space, offset );
279      return wd17xx_r( fdc, space, offset );
280280   else if ( offset == 8 )
281281      return to7_5p14_select;
282282   else
283      logerror ( "%f $%04x to7_5p14_r: invalid read offset %i\n", space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), offset );
283      logerror ( "%f $%04x to7_5p14_r: invalid read offset %i\n", space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), offset );
284284   return 0;
285285}
286286
r17963r17964
288288
289289static WRITE8_HANDLER( to7_5p14_w )
290290{
291   device_t *fdc = space->machine().device("wd2793");
291   device_t *fdc = space.machine().device("wd2793");
292292   if ( offset < 4 )
293      wd17xx_w( fdc, *space, offset, data );
293      wd17xx_w( fdc, space, offset, data );
294294   else if ( offset == 8 )
295295   {
296296      /* drive select */
r17963r17964
304304      case 4: drive = 2; side = 0; break;
305305      case 5: drive = 3; side = 1; break;
306306      default:
307         logerror( "%f $%04x to7_5p14_w: invalid drive select pattern $%02X\n", space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data );
307         logerror( "%f $%04x to7_5p14_w: invalid drive select pattern $%02X\n", space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), data );
308308      }
309309
310310      wd17xx_dden_w(fdc, BIT(data, 7));
r17963r17964
313313
314314      if ( drive != -1 )
315315      {
316         thom_floppy_active( space->machine(), 0 );
316         thom_floppy_active( space.machine(), 0 );
317317         wd17xx_set_drive( fdc, drive );
318318         wd17xx_set_side( fdc, side );
319319         LOG(( "%f $%04x to7_5p14_w: $%02X set drive=%i side=%i density=%s\n",
320               space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(),
320               space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(),
321321               data, drive, side, (BIT(data, 7) ? "FM" : "MFM")));
322322      }
323323   }
324324   else
325325      logerror ( "%f $%04x to7_5p14_w: invalid write offset %i (data=$%02X)\n",
326            space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), offset, data );
326            space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), offset, data );
327327}
328328
329329
r17963r17964
362362static READ8_HANDLER ( to7_5p14sd_r )
363363{
364364   if ( offset < 8 )
365      return mc6843_r( space->machine().device("mc6843"), *space, offset );
365      return mc6843_r( space.machine().device("mc6843"), space, offset );
366366   else if ( offset >= 8 && offset <= 9 )
367367      return to7_5p14sd_select;
368368   else
369      logerror ( "%f $%04x to7_5p14sd_r: invalid read offset %i\n",  space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), offset );
369      logerror ( "%f $%04x to7_5p14sd_r: invalid read offset %i\n",  space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), offset );
370370   return 0;
371371}
372372
r17963r17964
375375static WRITE8_HANDLER( to7_5p14sd_w )
376376{
377377   if ( offset < 8 )
378      mc6843_w( space->machine().device("mc6843"), *space, offset, data );
378      mc6843_w( space.machine().device("mc6843"), space, offset, data );
379379   else if ( offset >= 8 && offset <= 9 )
380380   {
381381      /* drive select */
r17963r17964
406406
407407      if ( drive != -1 )
408408      {
409         thom_floppy_active( space->machine(), 0 );
410         mc6843_set_drive( space->machine().device("mc6843"), drive );
411         mc6843_set_side( space->machine().device("mc6843"), side );
409         thom_floppy_active( space.machine(), 0 );
410         mc6843_set_drive( space.machine().device("mc6843"), drive );
411         mc6843_set_side( space.machine().device("mc6843"), side );
412412         LOG(( "%f $%04x to7_5p14sd_w: $%02X set drive=%i side=%i\n",
413               space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data, drive, side ));
413               space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), data, drive, side ));
414414      }
415415   }
416416   else
417417      logerror ( "%f $%04x to7_5p14sd_w: invalid write offset %i (data=$%02X)\n",
418            space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), offset, data );
418            space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), offset, data );
419419}
420420
421421static void to7_5p14_index_pulse_callback( device_t *controller,device_t *image, int state )
r17963r17964
700700   {
701701
702702   case 0: /* MC6852 status */
703      to7_qdd_stat_update(space->machine());
703      to7_qdd_stat_update(space.machine());
704704      VLOG(( "%f $%04x to7_qdd_r: STAT=$%02X irq=%i pe=%i ovr=%i und=%i tr=%i rd=%i ncts=%i\n",
705             space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), to7qdd->status,
705             space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), to7qdd->status,
706706             to7qdd->status & QDD_S_IRQ  ? 1 : 0,
707707             to7qdd->status & QDD_S_PE   ? 1 : 0,
708708             to7qdd->status & QDD_S_OVR  ? 1 : 0,
r17963r17964
714714
715715   case 1: /* MC6852 data input => read byte from disk */
716716      to7qdd->status &= ~(QDD_S_RDA | QDD_S_PE | QDD_S_OVR);
717      to7_qdd_stat_update(space->machine());
718      return to7_qdd_read_byte(space->machine());
717      to7_qdd_stat_update(space.machine());
718      return to7_qdd_read_byte(space.machine());
719719
720720   case 8: /* floppy status */
721721   {
722722      UINT8 data = 0;
723      device_image_interface* img = dynamic_cast<device_image_interface *>(to7_qdd_image(space->machine()));
723      device_image_interface* img = dynamic_cast<device_image_interface *>(to7_qdd_image(space.machine()));
724724      if ( ! img->exists() )
725725         data |= 0x40; /* disk present */
726726      if ( to7qdd->index_pulse )
727727         data |= 0x80; /* disk start */
728      VLOG(( "%f $%04x to7_qdd_r: STATUS8 $%02X\n", space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data ));
728      VLOG(( "%f $%04x to7_qdd_r: STATUS8 $%02X\n", space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), data ));
729729      return data;
730730   }
731731
732732   default:
733      logerror ( "%f $%04x to7_qdd_r: invalid read offset %i\n", space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), offset );
733      logerror ( "%f $%04x to7_qdd_r: invalid read offset %i\n", space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), offset );
734734      return 0;
735735   }
736736}
r17963r17964
750750         to7qdd->status &= ~(QDD_S_TDRA | QDD_S_TUF);
751751
752752      to7qdd->ctrl1 = ( data & ~(QDD_C1_RRESET | QDD_C1_TRESET) ) |( data &  (QDD_C1_RRESET | QDD_C1_TRESET) & to7qdd->ctrl1 );
753      to7_qdd_stat_update(space->machine());
753      to7_qdd_stat_update(space.machine());
754754      VLOG(( "%f $%04x to7_qdd_w: CTRL1=$%02X reset=%c%c %s%sirq=%c%c\n",
755             space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data,
755             space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), data,
756756             data & QDD_C1_RRESET ? 'r' : '-', data & QDD_C1_TRESET ? 't' : '-',
757757             data & QDD_C1_STRIPSYNC ? "strip-sync " : "",
758758             data & QDD_C1_CLRSYNC ? "clear-sync " : "",
r17963r17964
774774         int bits, parity;
775775         bits   = bit[ (data >> 3) & 7 ];
776776         parity = par[ (data >> 3) & 7 ];
777         to7_qdd_stat_update(space->machine());
777         to7_qdd_stat_update(space.machine());
778778         VLOG(( "%f $%04x to7_qdd_w: CTRL2=$%02X bits=%i par=%s blen=%i under=%s%s\n",
779                space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data,
779                space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), data,
780780                bits, parname[ parity ], data & QDD_C2_BLEN ? 1 : 2,
781781                data & QDD_C2_TSYNC ? "sync" : "ff",
782782                data & QDD_C2_EIE ? "irq-err" : "" ));
r17963r17964
792792            to7qdd->status &= ~QDD_S_TUF;
793793         if ( data & QDD_C3_CLRCTS )
794794            to7qdd->status &= ~QDD_S_NCTS;
795         to7_qdd_stat_update(space->machine());
795         to7_qdd_stat_update(space.machine());
796796         VLOG(( "%f $%04x to7_qdd_w: CTRL3=$%02X %s%ssync-len=%i sync-mode=%s\n",
797                space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data,
797                space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), data,
798798                data & QDD_C3_CLRTUF ? "clr-tuf " : "",
799799                data & QDD_C3_CLRCTS ? "clr-cts " : "",
800800                data & QDD_C3_SYNCLEN ? 1 : 2,
r17963r17964
802802         break;
803803
804804      case 2: /* MC6852 sync code => write byte to disk */
805         to7_qdd_write_byte( space->machine(), data );
805         to7_qdd_write_byte( space.machine(), data );
806806         break;
807807
808808      case 3: /* MC6852 data out => does not seem to be used */
809         VLOG(( "%f $%04x to7_qdd_w: ignored WDATA=$%02X\n", space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data ));
809         VLOG(( "%f $%04x to7_qdd_w: ignored WDATA=$%02X\n", space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), data ));
810810         break;
811811
812812      }
r17963r17964
814814
815815   case 8: /* set drive */
816816      to7qdd->drive = data;
817      VLOG(( "%f $%04x to7_qdd_w: DRIVE=$%02X\n", space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data ));
817      VLOG(( "%f $%04x to7_qdd_w: DRIVE=$%02X\n", space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), data ));
818818      break;
819819
820820   case 12: /* motor pulse ? */
821      thom_floppy_active( space->machine(), 0 );
822      VLOG(( "%f $%04x to7_qdd_w: MOTOR=$%02X\n", space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data ));
821      thom_floppy_active( space.machine(), 0 );
822      VLOG(( "%f $%04x to7_qdd_w: MOTOR=$%02X\n", space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), data ));
823823      break;
824824
825825   default:
826      logerror ( "%f $%04x to7_qdd_w: invalid write offset %i (data=$%02X)\n", space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), offset, data );
826      logerror ( "%f $%04x to7_qdd_w: invalid write offset %i (data=$%02X)\n", space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), offset, data );
827827   }
828828}
829829
r17963r17964
12641264
12651265   case 0: /* STAT0 */
12661266      thmfc1->stat0 ^= THMFC1_STAT0_SYNCHRO | THMFC1_STAT0_BYTE_READY_POL;
1267      VLOG(( "%f $%04x thmfc_floppy_r: STAT0=$%02X\n", space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), thmfc1->stat0 ));
1267      VLOG(( "%f $%04x thmfc_floppy_r: STAT0=$%02X\n", space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), thmfc1->stat0 ));
12681268      return thmfc1->stat0;
12691269
12701270   case 1: /* STAT1 */
12711271   {
12721272      UINT8 data = 0;
1273      device_image_interface * img = dynamic_cast<device_image_interface *>(thmfc_floppy_image(space->machine()));
1273      device_image_interface * img = dynamic_cast<device_image_interface *>(thmfc_floppy_image(space.machine()));
12741274      int flags = floppy_drive_get_flag_state( &img->device(), -1 );
12751275      if ( thmfc_floppy_is_qdd(img) )
12761276      {
r17963r17964
12961296         data |= 0x10;
12971297      if (!floppy_wpt_r(&img->device()))
12981298         data |= 0x04;
1299      VLOG(( "%f $%04x thmfc_floppy_r: STAT1=$%02X\n", space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data ));
1299      VLOG(( "%f $%04x thmfc_floppy_r: STAT1=$%02X\n", space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), data ));
13001300      return data;
13011301   }
13021302
13031303   case 3: /* RDATA */
13041304
13051305      if ( thmfc1->op == THMFC1_OP_READ_SECT || thmfc1->op == THMFC1_OP_READ_ADDR )
1306         return thmfc_floppy_read_byte(space->machine());
1306         return thmfc_floppy_read_byte(space.machine());
13071307      else
1308         return thmfc_floppy_raw_read_byte(space->machine());
1308         return thmfc_floppy_raw_read_byte(space.machine());
13091309
13101310   case 6:
13111311      return 0;
r17963r17964
13141314   {
13151315      /* undocumented => emulate TO7 QDD controller ? */
13161316      UINT8 data = thmfc1->ipl << 7;
1317      VLOG(( "%f $%04x thmfc_floppy_r: STAT8=$%02X\n", space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data ));
1317      VLOG(( "%f $%04x thmfc_floppy_r: STAT8=$%02X\n", space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), data ));
13181318      return data;
13191319   }
13201320
13211321   default:
1322      logerror ( "%f $%04x thmfc_floppy_r: invalid read offset %i\n", space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), offset );
1322      logerror ( "%f $%04x thmfc_floppy_r: invalid read offset %i\n", space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), offset );
13231323      return 0;
13241324   }
13251325}
r17963r17964
13331333   case 0: /* CMD0 */
13341334   {
13351335      int wsync = (data >> 4) & 1;
1336      int qdd = thmfc_floppy_is_qdd(dynamic_cast<device_image_interface *>(thmfc_floppy_image(space->machine())));
1336      int qdd = thmfc_floppy_is_qdd(dynamic_cast<device_image_interface *>(thmfc_floppy_image(space.machine())));
13371337      chrn_id id;
13381338      thmfc1->formatting = (data >> 2) & 1;
13391339      LOG (( "%f $%04x thmfc_floppy_w: CMD0=$%02X dens=%s wsync=%i dsync=%i fmt=%i op=%i\n",
1340             space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data,
1340             space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), data,
13411341             (BIT(data, 5) ? "FM" : "MFM"),
13421342             wsync, (data >> 3) & 1,
13431343             thmfc1->formatting, data & 3 ));
r17963r17964
13561356      case THMFC1_OP_WRITE_SECT:
13571357         if ( qdd )
13581358            logerror( "thmfc_floppy_w: smart operation 1 not supported for QDD\n" );
1359         else if ( thmfc_floppy_find_sector( space->machine(), &id ) )
1359         else if ( thmfc_floppy_find_sector( space.machine(), &id ) )
13601360         {
13611361                                thmfc1->sector_id = id.data_id;
13621362            thmfc1->data_idx = 0;
r17963r17964
13711371      case THMFC1_OP_READ_ADDR:
13721372         if ( qdd )
13731373            logerror( "thmfc_floppy_w: smart operation 2 not supported for QDD\n" );
1374         else if ( thmfc_floppy_find_sector( space->machine(), &id ) )
1374         else if ( thmfc_floppy_find_sector( space.machine(), &id ) )
13751375         {
13761376            thmfc1->data_size =
13771377               thom_floppy_make_addr( id, thmfc1->data, thmfc1->sector_size );
r17963r17964
13871387      case THMFC1_OP_READ_SECT:
13881388         if ( qdd )
13891389            logerror( "thmfc_floppy_w: smart operation 3 not supported for QDD\n" );
1390         else if ( thmfc_floppy_find_sector( space->machine(), &id ) )
1390         else if ( thmfc_floppy_find_sector( space.machine(), &id ) )
13911391         {
13921392            thmfc1->data_size = thom_floppy_make_sector
1393               ( thmfc_floppy_image(space->machine()), id, thmfc1->data, thmfc1->sector_size );
1393               ( thmfc_floppy_image(space.machine()), id, thmfc1->data, thmfc1->sector_size );
13941394            assert( thmfc1->data_size < sizeof( thmfc1->data ) );
13951395            thmfc1->data_finish = thmfc1->sector_size + 4;
13961396            thmfc1->data_idx = 1;
r17963r17964
14041404      /* synchronize to word, if needed (QDD only) */
14051405      if ( wsync && qdd ) {
14061406         if ( ! thmfc1->data_raw_size )
1407            thmfc1->data_raw_size = thom_qdd_make_disk ( thmfc_floppy_image(space->machine()), thmfc1->data );
1407            thmfc1->data_raw_size = thom_qdd_make_disk ( thmfc_floppy_image(space.machine()), thmfc1->data );
14081408         while ( thmfc1->data_raw_idx < thmfc1->data_raw_size &&
14091409            thmfc1->data[ thmfc1->data_raw_idx ] != thmfc1->wsync )
14101410         {
r17963r17964
14231423      if ( thmfc1->sector_size > 256 )
14241424      {
14251425         logerror( "$%04x thmfc_floppy_w: sector size %i > 256 not handled\n",
1426              space->machine().device("maincpu")->safe_pcbase(), thmfc1->sector_size );
1426              space.machine().device("maincpu")->safe_pcbase(), thmfc1->sector_size );
14271427         thmfc1->sector_size = 256;
14281428      }
14291429
14301430      LOG (( "%f $%04x thmfc_floppy_w: CMD1=$%02X sect-size=%i comp=%i head=%i\n",
1431             space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data,
1431             space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), data,
14321432             thmfc1->sector_size, (data >> 1) & 7, thmfc1->side ));
14331433      break;
14341434
r17963r17964
14391439      int seek = 0, motor;
14401440      thmfc1->drive = data & 2;
14411441
1442      img = thmfc_floppy_image(space->machine());
1442      img = thmfc_floppy_image(space.machine());
14431443      if ( thmfc_floppy_is_qdd(dynamic_cast<device_image_interface *>(img)))
14441444      {
14451445         motor = !(data & 0x40);
r17963r17964
14511451            seek = (data & 0x20) ? 1 : -1;
14521452         motor =  (data >> 2) & 1;
14531453         thmfc1->drive |= 1 ^ ((data >> 6) & 1);
1454                        img = thmfc_floppy_image(space->machine());
1454                        img = thmfc_floppy_image(space.machine());
14551455      }
14561456
1457      thom_floppy_active( space->machine(), 0 );
1457      thom_floppy_active( space.machine(), 0 );
14581458
14591459      LOG (( "%f $%04x thmfc_floppy_w: CMD2=$%02X drv=%i step=%i motor=%i\n",
1460             space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data,
1460             space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), data,
14611461             thmfc1->drive, seek, motor ));
14621462
14631463      if ( seek )
r17963r17964
14781478
14791479   case 3: /* WDATA */
14801480      thmfc1->wsync = data;
1481      if ( thmfc_floppy_is_qdd(dynamic_cast<device_image_interface *>(thmfc_floppy_image(space->machine()))))
1482         thmfc_floppy_qdd_write_byte( space->machine(), data );
1481      if ( thmfc_floppy_is_qdd(dynamic_cast<device_image_interface *>(thmfc_floppy_image(space.machine()))))
1482         thmfc_floppy_qdd_write_byte( space.machine(), data );
14831483      else if ( thmfc1->op==THMFC1_OP_WRITE_SECT )
1484         thmfc_floppy_write_byte( space->machine(), data );
1484         thmfc_floppy_write_byte( space.machine(), data );
14851485      else if ( thmfc1->formatting )
1486         thmfc_floppy_format_byte( space->machine(), data );
1486         thmfc_floppy_format_byte( space.machine(), data );
14871487      else
14881488      {
14891489         /* TODO: implement other forms of raw track writing */
14901490         LOG (( "%f $%04x thmfc_floppy_w: ignored raw WDATA $%02X\n",
1491                space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data ));
1491                space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), data ));
14921492      }
14931493      break;
14941494
r17963r17964
14961496   case 4: /* WCLK (unemulated) */
14971497      /* clock configuration: FF for data, 0A for synchro */
14981498      LOG (( "%f $%04x thmfc_floppy_w: WCLK=$%02X (%s)\n",
1499             space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data,
1499             space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), data,
15001500             (data == 0xff) ? "data" : (data == 0x0A) ? "synchro" : "?" ));
15011501      break;
15021502
15031503   case 5: /* WSECT */
15041504      thmfc1->sector = data;
15051505      LOG (( "%f $%04x thmfc_floppy_w: WSECT=%i\n",
1506             space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data ));
1506             space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), data ));
15071507      break;
15081508
15091509   case 6: /* WTRCK */
15101510      thmfc1->track = data;
15111511      LOG (( "%f $%04x thmfc_floppy_w: WTRCK=%i (real=%i)\n",
1512             space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data,
1513             floppy_drive_get_current_track( thmfc_floppy_image(space->machine()) ) ));
1512             space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), data,
1513             floppy_drive_get_current_track( thmfc_floppy_image(space.machine()) ) ));
15141514      break;
15151515
15161516   case 7: /* WCELL */
15171517      /* precompensation (unemulated) */
15181518      LOG (( "%f $%04x thmfc_floppy_w: WCELL=$%02X\n",
1519             space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data ));
1519             space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), data ));
15201520      break;
15211521
15221522   default:
15231523      logerror ( "%f $%04x thmfc_floppy_w: invalid write offset %i (data=$%02X)\n",
1524            space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), offset, data );
1524            space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), offset, data );
15251525   }
15261526}
15271527
r17963r17964
17151715static READ8_HANDLER ( to7_network_r )
17161716{
17171717   if ( offset < 4 )
1718      return mc6854_r( space->machine().device("mc6854"), *space, offset );
1718      return mc6854_r( space.machine().device("mc6854"), space, offset );
17191719
17201720   if ( offset == 8 )
17211721   {
17221722      /* network ID of the computer */
1723      UINT8 id = space->machine().root_device().ioport("fconfig")->read() >> 3;
1724      VLOG(( "%f $%04x to7_network_r: read id $%02X\n", space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), id ));
1723      UINT8 id = space.machine().root_device().ioport("fconfig")->read() >> 3;
1724      VLOG(( "%f $%04x to7_network_r: read id $%02X\n", space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), id ));
17251725      return id;
17261726   }
17271727
1728   logerror( "%f $%04x to7_network_r: invalid read offset %i\n", space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), offset );
1728   logerror( "%f $%04x to7_network_r: invalid read offset %i\n", space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), offset );
17291729   return 0;
17301730}
17311731
r17963r17964
17341734static WRITE8_HANDLER ( to7_network_w )
17351735{
17361736   if ( offset < 4 )
1737      mc6854_w( space->machine().device("mc6854"), *space, offset, data );
1737      mc6854_w( space.machine().device("mc6854"), space, offset, data );
17381738   else
17391739   {
17401740      logerror( "%f $%04x to7_network_w: invalid write offset %i (data=$%02X)\n",
1741           space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), offset, data );
1741           space.machine().time().as_double(), space.machine().device("maincpu")->safe_pcbase(), offset, data );
17421742   }
17431743}
17441744
r17963r17964
18611861      if ( offset == 8 )
18621862      {
18631863         to7_floppy_bank = 3 + (data & 3);
1864         space->machine().root_device().membank( THOM_FLOP_BANK )->set_entry( to7_floppy_bank );
1864         space.machine().root_device().membank( THOM_FLOP_BANK )->set_entry( to7_floppy_bank );
18651865         VLOG (( "to7_floppy_w: set CD 90-351 ROM bank to %i\n", data & 3 ));
18661866      }
18671867      else
trunk/src/mess/machine/pet.c
r17963r17964
405405
406406static WRITE8_HANDLER( cbm8096_io_w )
407407{
408   via6522_device *via_0 = space->machine().device<via6522_device>("via6522_0");
409   pia6821_device *pia_0 = space->machine().device<pia6821_device>("pia_0");
410   pia6821_device *pia_1 = space->machine().device<pia6821_device>("pia_1");
411   mc6845_device *mc6845 = space->machine().device<mc6845_device>("crtc");
408   via6522_device *via_0 = space.machine().device<via6522_device>("via6522_0");
409   pia6821_device *pia_0 = space.machine().device<pia6821_device>("pia_0");
410   pia6821_device *pia_1 = space.machine().device<pia6821_device>("pia_1");
411   mc6845_device *mc6845 = space.machine().device<mc6845_device>("crtc");
412412
413413   if (offset < 0x10) ;
414   else if (offset < 0x14) pia_0->write(*space, offset & 3, data);
414   else if (offset < 0x14) pia_0->write(space, offset & 3, data);
415415   else if (offset < 0x20) ;
416   else if (offset < 0x24) pia_1->write(*space, offset & 3, data);
416   else if (offset < 0x24) pia_1->write(space, offset & 3, data);
417417   else if (offset < 0x40) ;
418   else if (offset < 0x50) via_0->write(*space, offset & 0xf, data);
418   else if (offset < 0x50) via_0->write(space, offset & 0xf, data);
419419   else if (offset < 0x80) ;
420   else if (offset == 0x80) mc6845->address_w(*space, 0, data);
421   else if (offset == 0x81) mc6845->register_w(*space, 0, data);
420   else if (offset == 0x80) mc6845->address_w(space, 0, data);
421   else if (offset == 0x81) mc6845->register_w(space, 0, data);
422422}
423423
424424static READ8_HANDLER( cbm8096_io_r )
425425{
426   via6522_device *via_0 = space->machine().device<via6522_device>("via6522_0");
427   pia6821_device *pia_0 = space->machine().device<pia6821_device>("pia_0");
428   pia6821_device *pia_1 = space->machine().device<pia6821_device>("pia_1");
429   mc6845_device *mc6845 = space->machine().device<mc6845_device>("crtc");
426   via6522_device *via_0 = space.machine().device<via6522_device>("via6522_0");
427   pia6821_device *pia_0 = space.machine().device<pia6821_device>("pia_0");
428   pia6821_device *pia_1 = space.machine().device<pia6821_device>("pia_1");
429   mc6845_device *mc6845 = space.machine().device<mc6845_device>("crtc");
430430
431431   int data = 0xff;
432432   if (offset < 0x10) ;
433   else if (offset < 0x14) data = pia_0->read(*space, offset & 3);
433   else if (offset < 0x14) data = pia_0->read(space, offset & 3);
434434   else if (offset < 0x20) ;
435   else if (offset < 0x24) data = pia_1->read(*space, offset & 3);
435   else if (offset < 0x24) data = pia_1->read(space, offset & 3);
436436   else if (offset < 0x40) ;
437   else if (offset < 0x50) data = via_0->read(*space, offset & 0xf);
437   else if (offset < 0x50) data = via_0->read(space, offset & 0xf);
438438   else if (offset < 0x80) ;
439   else if (offset == 0x81) data = mc6845->register_r(*space, 0);
439   else if (offset == 0x81) data = mc6845->register_r(space, 0);
440440   return data;
441441}
442442
443443static WRITE8_HANDLER( pet80_bank1_w )
444444{
445   pet_state *state = space->machine().driver_data<pet_state>();
445   pet_state *state = space.machine().driver_data<pet_state>();
446446   state->m_pet80_bank1_base[offset] = data;
447447}
448448
r17963r17964
459459*/
460460WRITE8_HANDLER( cbm8096_w )
461461{
462   pet_state *state = space->machine().driver_data<pet_state>();
462   pet_state *state = space.machine().driver_data<pet_state>();
463463   if (data & 0x80)
464464   {
465465      if (data & 0x40)
466466      {
467         space->install_legacy_read_handler(0xe800, 0xefff, FUNC(cbm8096_io_r));
468         space->install_legacy_write_handler(0xe800, 0xefff, FUNC(cbm8096_io_w));
467         space.install_legacy_read_handler(0xe800, 0xefff, FUNC(cbm8096_io_r));
468         space.install_legacy_write_handler(0xe800, 0xefff, FUNC(cbm8096_io_w));
469469      }
470470      else
471471      {
472         space->install_read_bank(0xe800, 0xefff, "bank7");
472         space.install_read_bank(0xe800, 0xefff, "bank7");
473473         if (!(data & 2))
474            space->install_write_bank(0xe800, 0xefff, "bank7");
474            space.install_write_bank(0xe800, 0xefff, "bank7");
475475         else
476            space->nop_write(0xe800, 0xefff);
476            space.nop_write(0xe800, 0xefff);
477477      }
478478
479479
480480      if ((data & 2) == 0) {
481         space->install_write_bank(0xc000, 0xe7ff, "bank6");
482         space->install_write_bank(0xf000, 0xffef, "bank8");
483         space->install_write_bank(0xfff1, 0xffff, "bank9");
481         space.install_write_bank(0xc000, 0xe7ff, "bank6");
482         space.install_write_bank(0xf000, 0xffef, "bank8");
483         space.install_write_bank(0xfff1, 0xffff, "bank9");
484484      } else {
485         space->nop_write(0xc000, 0xe7ff);
486         space->nop_write(0xf000, 0xffef);
487         space->nop_write(0xfff1, 0xffff);
485         space.nop_write(0xc000, 0xe7ff);
486         space.nop_write(0xf000, 0xffef);
487         space.nop_write(0xfff1, 0xffff);
488488      }
489489
490490      if (data & 0x20)
491491      {
492492         state->m_pet80_bank1_base = state->m_memory + 0x8000;
493493         state->membank("bank1")->set_base(state->m_pet80_bank1_base);
494         space->install_legacy_write_handler(0x8000, 0x8fff, FUNC(pet80_bank1_w));
494         space.install_legacy_write_handler(0x8000, 0x8fff, FUNC(pet80_bank1_w));
495495      }
496496      else
497497      {
498498         if (!(data & 1))
499            space->install_write_bank(0x8000, 0x8fff, "bank1");
499            space.install_write_bank(0x8000, 0x8fff, "bank1");
500500         else
501            space->nop_write(0x8000, 0x8fff);
501            space.nop_write(0x8000, 0x8fff);
502502      }
503503
504504      if ((data & 1) == 0 ){
505         space->install_write_bank(0x9000, 0x9fff, "bank2");
506         space->install_write_bank(0xa000, 0xafff, "bank3");
507         space->install_write_bank(0xb000, 0xbfff, "bank4");
505         space.install_write_bank(0x9000, 0x9fff, "bank2");
506         space.install_write_bank(0xa000, 0xafff, "bank3");
507         space.install_write_bank(0xb000, 0xbfff, "bank4");
508508      } else {
509         space->nop_write(0x9000, 0x9fff);
510         space->nop_write(0xa000, 0xafff);
511         space->nop_write(0xb000, 0xbfff);
509         space.nop_write(0x9000, 0x9fff);
510         space.nop_write(0xa000, 0xafff);
511         space.nop_write(0xb000, 0xbfff);
512512      }
513513
514514      if (data & 4)
r17963r17964
559559   {
560560      state->m_pet80_bank1_base = state->m_memory + 0x8000;
561561      state->membank("bank1")->set_base(state->m_pet80_bank1_base );
562      space->install_legacy_write_handler(0x8000, 0x8fff, FUNC(pet80_bank1_w));
562      space.install_legacy_write_handler(0x8000, 0x8fff, FUNC(pet80_bank1_w));
563563
564564      state->membank("bank2")->set_base(state->m_memory + 0x9000);
565      space->unmap_write(0x9000, 0x9fff);
565      space.unmap_write(0x9000, 0x9fff);
566566
567567      state->membank("bank3")->set_base(state->m_memory + 0xa000);
568      space->unmap_write(0xa000, 0xafff);
568      space.unmap_write(0xa000, 0xafff);
569569
570570      state->membank("bank4")->set_base(state->m_memory + 0xb000);
571      space->unmap_write(0xb000, 0xbfff);
571      space.unmap_write(0xb000, 0xbfff);
572572
573573      state->membank("bank6")->set_base(state->m_memory + 0xc000);
574      space->unmap_write(0xc000, 0xe7ff);
574      space.unmap_write(0xc000, 0xe7ff);
575575
576      space->install_legacy_read_handler(0xe800, 0xefff, FUNC(cbm8096_io_r));
577      space->install_legacy_write_handler(0xe800, 0xefff, FUNC(cbm8096_io_w));
576      space.install_legacy_read_handler(0xe800, 0xefff, FUNC(cbm8096_io_r));
577      space.install_legacy_write_handler(0xe800, 0xefff, FUNC(cbm8096_io_w));
578578
579579      state->membank("bank8")->set_base(state->m_memory + 0xf000);
580      space->unmap_write(0xf000, 0xffef);
580      space.unmap_write(0xf000, 0xffef);
581581
582582      state->membank("bank9")->set_base(state->m_memory + 0xfff1);
583      space->unmap_write(0xfff1, 0xffff);
583      space.unmap_write(0xfff1, 0xffff);
584584   }
585585}
586586
r17963r17964
591591
592592WRITE8_HANDLER( superpet_w )
593593{
594   pet_state *state = space->machine().driver_data<pet_state>();
594   pet_state *state = space.machine().driver_data<pet_state>();
595595   switch (offset)
596596   {
597597      case 0:
r17963r17964
749749      {
750750         machine().device("maincpu")->memory().space(AS_PROGRAM)->nop_write(0xfff0, 0xfff0);
751751      }
752      cbm8096_w(machine().device("maincpu")->memory().space(AS_PROGRAM), 0, 0);
752      cbm8096_w(*machine().device("maincpu")->memory().space(AS_PROGRAM), 0, 0);
753753   }
754754
755755//removed   cbm_drive_0_config (machine().root_device().ioport("CFG")->read() & 2 ? IEEE : 0, 8);
trunk/src/mess/machine/oric.c
r17963r17964
427427{
428428   oric_state *state = machine.driver_data<oric_state>();
429429   device_t *fdc = machine.device("fdc");
430   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
430   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
431431
432432   if (state->m_is_telestrat)
433433      return;
434434
435   space->install_read_handler(0x0300, 0x030f, read8_delegate(FUNC(oric_state::oric_IO_r),state));
436   space->install_legacy_read_handler(*fdc, 0x0310, 0x031f, FUNC(applefdc_r));
437   space->install_read_bank(0x0320, 0x03ff, "bank4");
435   space.install_read_handler(0x0300, 0x030f, read8_delegate(FUNC(oric_state::oric_IO_r),state));
436   space.install_legacy_read_handler(*fdc, 0x0310, 0x031f, FUNC(applefdc_r));
437   space.install_read_bank(0x0320, 0x03ff, "bank4");
438438
439   space->install_write_handler(0x0300, 0x030f, write8_delegate(FUNC(oric_state::oric_IO_w),state));
440   space->install_legacy_write_handler(*fdc, 0x0310, 0x031f, FUNC(applefdc_w));
439   space.install_write_handler(0x0300, 0x030f, write8_delegate(FUNC(oric_state::oric_IO_w),state));
440   space.install_legacy_write_handler(*fdc, 0x0310, 0x031f, FUNC(applefdc_w));
441441   state->membank("bank4")->set_base(   state->memregion("maincpu")->base() + 0x014000 + 0x020);
442442}
443443
r17963r17964
446446{
447447   oric_state *state = machine.driver_data<oric_state>();
448448   int i;
449   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
449   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
450450
451451   if (state->m_is_telestrat)
452452      return;
r17963r17964
455455      switch(i) {
456456      case 1:
457457         if (rd) {
458            space->install_read_bank(0xc000, 0xdfff, "bank1");
458            space.install_read_bank(0xc000, 0xdfff, "bank1");
459459         } else {
460            space->nop_read(0xc000, 0xdfff);
460            space.nop_read(0xc000, 0xdfff);
461461         }
462462         if (wr) {
463            space->install_write_bank(0xc000, 0xdfff, "bank5");
463            space.install_write_bank(0xc000, 0xdfff, "bank5");
464464         } else {
465            space->unmap_write(0xc000, 0xdfff);
465            space.unmap_write(0xc000, 0xdfff);
466466         }
467467         break;
468468      case 2:
469469         if (rd) {
470            space->install_read_bank(0xe000, 0xf7ff, "bank2");
470            space.install_read_bank(0xe000, 0xf7ff, "bank2");
471471         } else {
472            space->nop_read(0xe000, 0xf7ff);
472            space.nop_read(0xe000, 0xf7ff);
473473         }
474474         if (wr) {
475            space->install_write_bank(0xe000, 0xf7ff, "bank6");
475            space.install_write_bank(0xe000, 0xf7ff, "bank6");
476476         } else {
477            space->unmap_write(0xe000, 0xf7ff);
477            space.unmap_write(0xe000, 0xf7ff);
478478         }
479479         break;
480480      case 3:
481481         if (rd) {
482            space->install_read_bank(0xf800, 0xffff, "bank3");
482            space.install_read_bank(0xf800, 0xffff, "bank3");
483483         } else {
484            space->nop_read(0xf800, 0xffff);
484            space.nop_read(0xf800, 0xffff);
485485         }
486486         break;
487487      }
r17963r17964
551551{
552552   oric_state *state = machine.driver_data<oric_state>();
553553   device_t *fdc = machine.device("fdc");
554   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
554   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
555555
556   space->install_read_handler(0x0300, 0x030f, read8_delegate(FUNC(oric_state::oric_IO_r),state));
557   space->install_legacy_read_handler(*fdc, 0x0310, 0x031f, FUNC(applefdc_r));
558   space->install_read_bank(0x0320, 0x03ff, "bank4");
556   space.install_read_handler(0x0300, 0x030f, read8_delegate(FUNC(oric_state::oric_IO_r),state));
557   space.install_legacy_read_handler(*fdc, 0x0310, 0x031f, FUNC(applefdc_r));
558   space.install_read_bank(0x0320, 0x03ff, "bank4");
559559
560   space->install_write_handler(0x0300, 0x030f, write8_delegate(FUNC(oric_state::oric_IO_w),state));
561   space->install_legacy_write_handler(*fdc, 0x0310, 0x031f, FUNC(applefdc_w));
562   space->install_write_handler(0x0380, 0x0383, write8_delegate(FUNC(oric_state::apple2_v2_interface_w),state));
560   space.install_write_handler(0x0300, 0x030f, write8_delegate(FUNC(oric_state::oric_IO_w),state));
561   space.install_legacy_write_handler(*fdc, 0x0310, 0x031f, FUNC(applefdc_w));
562   space.install_write_handler(0x0380, 0x0383, write8_delegate(FUNC(oric_state::apple2_v2_interface_w),state));
563563
564   state->apple2_v2_interface_w(*space, 0, 0);
564   state->apple2_v2_interface_w(space, 0, 0);
565565}
566566
567567/********************/
r17963r17964
755755static void oric_install_jasmin_interface(running_machine &machine)
756756{
757757   oric_state *state = machine.driver_data<oric_state>();
758   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
758   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
759759   /* romdis */
760760   state->m_port_3fb_w = 1;
761761   oric_jasmin_set_mem_0x0c000(machine);
762762
763   space->install_read_handler(0x0300, 0x03ef, read8_delegate(FUNC(oric_state::oric_IO_r),state));
764   space->install_read_handler(0x03f0, 0x03ff, read8_delegate(FUNC(oric_state::oric_jasmin_r),state));
763   space.install_read_handler(0x0300, 0x03ef, read8_delegate(FUNC(oric_state::oric_IO_r),state));
764   space.install_read_handler(0x03f0, 0x03ff, read8_delegate(FUNC(oric_state::oric_jasmin_r),state));
765765
766   space->install_write_handler(0x0300, 0x03ef, write8_delegate(FUNC(oric_state::oric_IO_w),state));
767   space->install_write_handler(0x03f0, 0x03ff, write8_delegate(FUNC(oric_state::oric_jasmin_w),state));
766   space.install_write_handler(0x0300, 0x03ef, write8_delegate(FUNC(oric_state::oric_IO_w),state));
767   space.install_write_handler(0x03f0, 0x03ff, write8_delegate(FUNC(oric_state::oric_jasmin_w),state));
768768}
769769
770770/*********************************/
r17963r17964
978978static void oric_install_microdisc_interface(running_machine &machine)
979979{
980980   oric_state *state = machine.driver_data<oric_state>();
981   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
981   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
982982
983   space->install_read_handler(0x0300, 0x030f, read8_delegate(FUNC(oric_state::oric_IO_r),state));
984   space->install_read_handler(0x0310, 0x031f, read8_delegate(FUNC(oric_state::oric_microdisc_r),state));
985   space->install_read_handler(0x0320, 0x03ff, read8_delegate(FUNC(oric_state::oric_IO_r),state));
983   space.install_read_handler(0x0300, 0x030f, read8_delegate(FUNC(oric_state::oric_IO_r),state));
984   space.install_read_handler(0x0310, 0x031f, read8_delegate(FUNC(oric_state::oric_microdisc_r),state));
985   space.install_read_handler(0x0320, 0x03ff, read8_delegate(FUNC(oric_state::oric_IO_r),state));
986986
987   space->install_write_handler(0x0300, 0x030f, write8_delegate(FUNC(oric_state::oric_IO_w),state));
988   space->install_write_handler(0x0310, 0x031f, write8_delegate(FUNC(oric_state::oric_microdisc_w),state));
989   space->install_write_handler(0x0320, 0x03ff, write8_delegate(FUNC(oric_state::oric_IO_w),state));
987   space.install_write_handler(0x0300, 0x030f, write8_delegate(FUNC(oric_state::oric_IO_w),state));
988   space.install_write_handler(0x0310, 0x031f, write8_delegate(FUNC(oric_state::oric_microdisc_w),state));
989   space.install_write_handler(0x0320, 0x03ff, write8_delegate(FUNC(oric_state::oric_IO_w),state));
990990
991991   /* disable os rom, enable microdisc rom */
992992   /* 0x0c000-0x0dfff will be ram, 0x0e000-0x0ffff will be microdisc rom */
r17963r17964
10641064void oric_state::machine_reset()
10651065{
10661066   int disc_interface_id = machine().root_device().ioport("FLOPPY")->read() & 0x07;
1067   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
1067   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
10681068   if (m_is_telestrat)
10691069      return;
10701070
r17963r17964
10951095         }
10961096         else
10971097         {
1098            space->install_read_handler(0x0300, 0x03ff, read8_delegate(FUNC(oric_state::oric_IO_r),this));
1099            space->install_write_handler(0x0300, 0x03ff, write8_delegate(FUNC(oric_state::oric_IO_w),this));
1098            space.install_read_handler(0x0300, 0x03ff, read8_delegate(FUNC(oric_state::oric_IO_r),this));
1099            space.install_write_handler(0x0300, 0x03ff, write8_delegate(FUNC(oric_state::oric_IO_w),this));
11001100         }
11011101      }
11021102      break;
r17963r17964
12461246static void telestrat_refresh_mem(running_machine &machine)
12471247{
12481248   oric_state *state = machine.driver_data<oric_state>();
1249   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1249   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
12501250
12511251   telestrat_mem_block *mem_block = &state->m_telestrat_blocks[state->m_telestrat_bank_selection];
12521252
r17963r17964
12561256      {
12571257         state->membank("bank1")->set_base(mem_block->ptr);
12581258         state->membank("bank2")->set_base(mem_block->ptr);
1259         space->install_read_bank(0xc000, 0xffff, "bank1");
1260         space->install_write_bank(0xc000, 0xffff, "bank2");
1259         space.install_read_bank(0xc000, 0xffff, "bank1");
1260         space.install_write_bank(0xc000, 0xffff, "bank2");
12611261      }
12621262      break;
12631263
12641264      case TELESTRAT_MEM_BLOCK_ROM:
12651265      {
12661266         state->membank("bank1")->set_base(mem_block->ptr);
1267         space->install_read_bank(0xc000, 0xffff, "bank1");
1268         space->nop_write(0xc000, 0xffff);
1267         space.install_read_bank(0xc000, 0xffff, "bank1");
1268         space.nop_write(0xc000, 0xffff);
12691269      }
12701270      break;
12711271
12721272      default:
12731273      case TELESTRAT_MEM_BLOCK_UNDEFINED:
12741274      {
1275         space->nop_readwrite(0xc000, 0xffff);
1275         space.nop_readwrite(0xc000, 0xffff);
12761276      }
12771277      break;
12781278   }
trunk/src/mess/machine/europc.c
r17963r17964
114114      }
115115//      mode= data&0x10?AGA_COLOR:AGA_MONO;
116116//      mode= data&0x10?AGA_COLOR:AGA_OFF;
117      pc_aga_set_mode(space->machine(), europc_jim.mode);
117      pc_aga_set_mode(space.machine(), europc_jim.mode);
118118      if (data & 0x80) europc_jim.state = 0;
119119      break;
120120   case 4:
121121      switch(data & 0xc0)
122122      {
123      case 0x00: space->machine().device("maincpu")->set_clock_scale(1.0 / 2); break;
124      case 0x40: space->machine().device("maincpu")->set_clock_scale(3.0 / 4); break;
125      default: space->machine().device("maincpu")->set_clock_scale(1); break;
123      case 0x00: space.machine().device("maincpu")->set_clock_scale(1.0 / 2); break;
124      case 0x40: space.machine().device("maincpu")->set_clock_scale(3.0 / 4); break;
125      default: space.machine().device("maincpu")->set_clock_scale(1); break;
126126      }
127127      break;
128128   case 0xa:
r17963r17964
178178      europc_pio.port61=data;
179179//      if (data == 0x30) pc1640.port62 = (pc1640.port65 & 0x10) >> 4;
180180//      else if (data == 0x34) pc1640.port62 = pc1640.port65 & 0xf;
181      pit8253_gate2_w(space->machine().device("pit8253"), BIT(data, 0));
182      pc_speaker_set_spkrdata(space->machine(), BIT(data, 1));
181      pit8253_gate2_w(space.machine().device("pit8253"), BIT(data, 0));
182      pc_speaker_set_spkrdata(space.machine(), BIT(data, 1));
183183      pc_keyb_set_clock(BIT(data, 6));
184184      break;
185185   }
r17963r17964
201201      data = europc_pio.port61;
202202      break;
203203   case 2:
204      if (pit8253_get_output(space->machine().device("pit8253"), 2))
204      if (pit8253_get_output(space.machine().device("pit8253"), 2))
205205         data |= 0x20;
206206      break;
207207   }
trunk/src/mess/machine/vector06.c
r17963r17964
170170
171171void vector06_state::machine_reset()
172172{
173   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
173   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
174174
175175   machine().device("maincpu")->execute().set_irq_acknowledge_callback(vector06_irq_callback);
176   space->install_read_bank (0x0000, 0x7fff, "bank1");
177   space->install_write_bank(0x0000, 0x7fff, "bank2");
178   space->install_read_bank (0x8000, 0xffff, "bank3");
179   space->install_write_bank(0x8000, 0xffff, "bank4");
176   space.install_read_bank (0x0000, 0x7fff, "bank1");
177   space.install_write_bank(0x0000, 0x7fff, "bank2");
178   space.install_read_bank (0x8000, 0xffff, "bank3");
179   space.install_write_bank(0x8000, 0xffff, "bank4");
180180
181181   membank("bank1")->set_base(memregion("maincpu")->base() + 0x10000);
182182   membank("bank2")->set_base(machine().device<ram_device>(RAM_TAG)->pointer() + 0x0000);
trunk/src/mess/machine/sorcerer.c
r17963r17964
306306{
307307   device_t *cpu = image.device().machine().device("maincpu");
308308   UINT8 *RAM = image.device().machine().root_device().memregion(cpu->tag())->base();
309   address_space *space = cpu->memory().space(AS_PROGRAM);
309   address_space &space = *cpu->memory().space(AS_PROGRAM);
310310   UINT8 header[28];
311311   unsigned char s_byte;
312312
r17963r17964
325325   for (int i = 0; i < 0xc000; i++)
326326   {
327327      image.fread( &s_byte, 1);
328      space->write_byte(i, s_byte);
328      space.write_byte(i, s_byte);
329329   }
330330   image.fread( RAM+0xc000, 0x4000);
331331
r17963r17964
360360
361361   UINT16 endmem = 0xbfff;
362362
363   address_space *space = m_maincpu->space(AS_PROGRAM);
363   address_space &space = *m_maincpu->space(AS_PROGRAM);
364364   /* configure RAM */
365365   switch (m_ram->size())
366366   {
367367   case 8*1024:
368      space->unmap_readwrite(0x2000, endmem);
368      space.unmap_readwrite(0x2000, endmem);
369369      break;
370370
371371   case 16*1024:
372      space->unmap_readwrite(0x4000, endmem);
372      space.unmap_readwrite(0x4000, endmem);
373373      break;
374374
375375   case 32*1024:
376      space->unmap_readwrite(0x8000, endmem);
376      space.unmap_readwrite(0x8000, endmem);
377377      break;
378378   }
379379}
r17963r17964
387387
388388   UINT16 endmem = 0xbbff;
389389
390   address_space *space = m_maincpu->space(AS_PROGRAM);
390   address_space &space = *m_maincpu->space(AS_PROGRAM);
391391   /* configure RAM */
392392   switch (m_ram->size())
393393   {
394394   case 8*1024:
395      space->unmap_readwrite(0x2000, endmem);
395      space.unmap_readwrite(0x2000, endmem);
396396      break;
397397
398398   case 16*1024:
399      space->unmap_readwrite(0x4000, endmem);
399      space.unmap_readwrite(0x4000, endmem);
400400      break;
401401
402402   case 32*1024:
403      space->unmap_readwrite(0x8000, endmem);
403      space.unmap_readwrite(0x8000, endmem);
404404      break;
405405   }
406406}
407407
408408void sorcerer_state::machine_reset()
409409{
410   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
410   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
411411
412412   /* Initialize cassette interface */
413413   m_cass_data.output.length = 0;
r17963r17964
416416   m_cass_data.input.bit = 1;
417417
418418   m_fe = 0xff;
419   sorcerer_fe_w(*space, 0, 0, 0xff);
419   sorcerer_fe_w(space, 0, 0, 0xff);
420420
421421   membank("boot")->set_entry(1);
422422   machine().scheduler().timer_set(attotime::from_usec(10), FUNC(sorcerer_reset));
trunk/src/mess/machine/x68k_scsiext.c
r17963r17964
6868   device_t* cpu = machine().device("maincpu");
6969   UINT8* ROM;
7070   astring temp;
71   address_space* space = cpu->memory().space(AS_PROGRAM);
71   address_space& space = *cpu->memory().space(AS_PROGRAM);
7272   m_slot = dynamic_cast<x68k_expansion_slot_device *>(owner());
73   space->install_read_bank(0xea0020,0xea1fff,0,0,"scsi_ext");
74   space->unmap_write(0xea0020,0xea1fff,0,0);
73   space.install_read_bank(0xea0020,0xea1fff,0,0,"scsi_ext");
74   space.unmap_write(0xea0020,0xea1fff,0,0);
7575   ROM = machine().root_device().memregion(subtag(temp,"scsiexrom"))->base();
7676   machine().root_device().membank("scsi_ext")->set_base(ROM);
77   space->install_readwrite_handler(0xea0000,0xea001f,0,0,read8_delegate(FUNC(x68k_scsiext_device::register_r),this),write8_delegate(FUNC(x68k_scsiext_device::register_w),this),0x00ff00ff);
77   space.install_readwrite_handler(0xea0000,0xea001f,0,0,read8_delegate(FUNC(x68k_scsiext_device::register_r),this),write8_delegate(FUNC(x68k_scsiext_device::register_w),this),0x00ff00ff);
7878}
7979
8080void x68k_scsiext_device::device_reset()
trunk/src/mess/machine/amigacrt.c
r17963r17964
112112
113113static WRITE16_HANDLER( amiga_ar1_chipmem_w )
114114{
115   amiga_state *state = space->machine().driver_data<amiga_state>();
116   int pc = space->device().safe_pc();
115   amiga_state *state = space.machine().driver_data<amiga_state>();
116   int pc = space.device().safe_pc();
117117
118118   /* see if we're inside the AR1 rom */
119119   if ( ((pc >> 16) & 0xff ) != 0xf0 )
r17963r17964
124124      {
125125         /* trigger an NMI or spurious irq */
126126         amigacrt.ar1_spurious = (offset == 0x60/2) ? 0 : 1;
127         space->machine().scheduler().timer_set(space->machine().device<cpu_device>("maincpu")->cycles_to_attotime(28), FUNC(amiga_ar1_delayed_nmi));
127         space.machine().scheduler().timer_set(space.machine().device<cpu_device>("maincpu")->cycles_to_attotime(28), FUNC(amiga_ar1_delayed_nmi));
128128      }
129129   }
130130
r17963r17964
192192
193193static READ16_HANDLER( amiga_ar23_cia_r )
194194{
195   int pc = space->device().safe_pc();
195   int pc = space.device().safe_pc();
196196
197197   if ( ACCESSING_BITS_0_7 && offset == 2048 && pc >= 0x40 && pc < 0x120 )
198198   {
199      amiga_ar23_freeze(space->machine());
199      amiga_ar23_freeze(space.machine());
200200   }
201201
202202   return amiga_cia_r( space, offset, mem_mask );
r17963r17964
206206{
207207   if ( data & 2 )
208208   {
209      space->install_legacy_read_handler(0xbfd000, 0xbfefff, FUNC(amiga_ar23_cia_r));
209      space.install_legacy_read_handler(0xbfd000, 0xbfefff, FUNC(amiga_ar23_cia_r));
210210   }
211211   else
212212   {
213      space->install_legacy_read_handler(0xbfd000, 0xbfefff, FUNC(amiga_cia_r));
213      space.install_legacy_read_handler(0xbfd000, 0xbfefff, FUNC(amiga_cia_r));
214214   }
215215
216216   amigacrt.ar23_mode = (data&0x3);
r17963r17964
221221
222222static READ16_HANDLER( amiga_ar23_mode_r )
223223{
224   amiga_state *state = space->machine().driver_data<amiga_state>();
224   amiga_state *state = space.machine().driver_data<amiga_state>();
225225   UINT16 *mem = (UINT16 *)(*state->memregion( "user2" ));
226226
227227   if ( ACCESSING_BITS_0_7 )
r17963r17964
241241         }
242242
243243         /* overlay disabled, map RAM on 0x000000 */
244         space->install_write_bank(0x000000, state->m_chip_ram.bytes() - 1, 0, mirror_mask, "bank1");
244         space.install_write_bank(0x000000, state->m_chip_ram.bytes() - 1, 0, mirror_mask, "bank1");
245245      }
246246   }
247247
r17963r17964
250250
251251static WRITE16_HANDLER( amiga_ar23_chipmem_w )
252252{
253   amiga_state *state = space->machine().driver_data<amiga_state>();
253   amiga_state *state = space.machine().driver_data<amiga_state>();
254254   if ( offset == (0x08/2) )
255255   {
256256      if ( amigacrt.ar23_mode & 1 )
257         amiga_ar23_freeze(space->machine());
257         amiga_ar23_freeze(space.machine());
258258   }
259259
260260   (*state->m_chip_ram_w)(state,  offset * 2, data );
r17963r17964
299299#if 0
300300static WRITE16_HANDLER( amiga_ar23_custom_w )
301301{
302   int pc = space->device().safe_pc();
302   int pc = space.device().safe_pc();
303303
304304   /* see if we're inside the AR2 rom */
305305   if ( ((pc >> 16) & 0xfe ) != 0x40 )
r17963r17964
320320{
321321   UINT16 data = amiga_custom_r( offset, mem_mask );
322322
323   int pc = space->device().safe_pc();
323   int pc = space.device().safe_pc();
324324
325325   /* see if we're inside the AR2 rom */
326326   if ( ((pc >> 16) & 0xfe ) != 0x40 )
trunk/src/mess/machine/osborne1.c
r17963r17964
426426void osborne1_state::machine_reset()
427427{
428428   int drive;
429   address_space* space = machine().device("maincpu")->memory().space(AS_PROGRAM);
429   address_space& space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
430430   /* Initialize memory configuration */
431   osborne1_bankswitch_w( *space, 0x00, 0 );
431   osborne1_bankswitch_w( space, 0x00, 0 );
432432
433433   m_pia_0_irq_state = FALSE;
434434   m_pia_1_irq_state = FALSE;
r17963r17964
441441   for(drive=0;drive<2;drive++)
442442      floppy_install_load_proc(floppy_get_device(machine(), drive), osborne1_load_proc);
443443
444   space->set_direct_update_handler(direct_update_delegate(FUNC(osborne1_state::osborne1_opbase), this));
444   space.set_direct_update_handler(direct_update_delegate(FUNC(osborne1_state::osborne1_opbase), this));
445445}
446446
447447
r17963r17964
524524   osborne1_state *state = machine().driver_data<osborne1_state>();
525525   /* Enable ROM and I/O when IRQ is acknowledged */
526526   UINT8 old_bankswitch = state->m_bankswitch;
527   address_space* space = device().machine().device("maincpu")->memory().space(AS_PROGRAM);
527   address_space& space = *device().machine().device("maincpu")->memory().space(AS_PROGRAM);
528528
529   state->osborne1_bankswitch_w( *space, 0, 0 );
529   state->osborne1_bankswitch_w( space, 0, 0 );
530530   state->m_bankswitch = old_bankswitch;
531531   state->m_in_irq_handler = 1;
532532   return 0xF8;
trunk/src/mess/machine/amstrad.c
r17963r17964
11961196   }
11971197   else  // CPC+/GX4000
11981198   {
1199      //address_space *space = state->m_maincpu->space(AS_PROGRAM);
1199      //address_space &space = *state->m_maincpu->space(AS_PROGRAM);
12001200
12011201/*      if ( state->m_asic.enabled && ( state->m_asic.rmr2 & 0x18 ) == 0x18 )
12021202        {
1203            space->install_read_handler(0x4000, 0x5fff, read8_delegate(FUNC(amstrad_state::amstrad_plus_asic_4000_r),state));
1204            space->install_read_handler(0x6000, 0x7fff, read8_delegate(FUNC(amstrad_state::amstrad_plus_asic_6000_r),state));
1205            space->install_write_handler(0x4000, 0x5fff, write8_delegate(FUNC(amstrad_state::amstrad_plus_asic_4000_w),state));
1206            space->install_write_handler(0x6000, 0x7fff, write8_delegate(FUNC(amstrad_state::amstrad_plus_asic_6000_w),state));
1203            space.install_read_handler(0x4000, 0x5fff, read8_delegate(FUNC(amstrad_state::amstrad_plus_asic_4000_r),state));
1204            space.install_read_handler(0x6000, 0x7fff, read8_delegate(FUNC(amstrad_state::amstrad_plus_asic_6000_r),state));
1205            space.install_write_handler(0x4000, 0x5fff, write8_delegate(FUNC(amstrad_state::amstrad_plus_asic_4000_w),state));
1206            space.install_write_handler(0x6000, 0x7fff, write8_delegate(FUNC(amstrad_state::amstrad_plus_asic_6000_w),state));
12071207        }
12081208        else
12091209        {
1210            space->install_read_bank(0x4000, 0x5fff, "bank3");
1211            space->install_read_bank(0x6000, 0x7fff, "bank4");
1212            space->install_write_bank(0x4000, 0x5fff, "bank11");
1213            space->install_write_bank(0x6000, 0x7fff, "bank12");
1210            space.install_read_bank(0x4000, 0x5fff, "bank3");
1211            space.install_read_bank(0x6000, 0x7fff, "bank4");
1212            space.install_write_bank(0x4000, 0x5fff, "bank11");
1213            space.install_write_bank(0x6000, 0x7fff, "bank12");
12141214        }
12151215*/
12161216      if(state->m_AmstradCPC_RamBanks[0] != NULL)
trunk/src/mess/machine/sms.c
r17963r17964
2727#define LGUN_X_INTERVAL       4
2828
2929
30static void setup_rom(address_space *space);
30static void setup_rom(address_space &space);
3131
3232
3333static TIMER_CALLBACK( rapid_fire_callback )
r17963r17964
427427}
428428
429429
430static void sms_vdp_hcount_latch( address_space *space )
430static void sms_vdp_hcount_latch( address_space &space )
431431{
432   sms_state *state = space->machine().driver_data<sms_state>();
433   UINT8 value = sms_vdp_hcount(space->machine());
432   sms_state *state = space.machine().driver_data<sms_state>();
433   UINT8 value = sms_vdp_hcount(space.machine());
434434
435   state->m_vdp->hcount_latch_write(*space, 0, value);
435   state->m_vdp->hcount_latch_write(space, 0, value);
436436}
437437
438438
r17963r17964
556556}
557557
558558
559static void sms_get_inputs( address_space *space )
559static void sms_get_inputs( address_space &space )
560560{
561   sms_state *state = space->machine().driver_data<sms_state>();
561   sms_state *state = space.machine().driver_data<sms_state>();
562562   UINT8 data = 0x00;
563   UINT32 cpu_cycles = downcast<cpu_device *>(&space->device())->total_cycles();
564   running_machine &machine = space->machine();
563   UINT32 cpu_cycles = downcast<cpu_device *>(&space.device())->total_cycles();
564   running_machine &machine = space.machine();
565565
566566   state->m_input_port0 = 0xff;
567567   state->m_input_port1 = 0xff;
r17963r17964
722722      }
723723      else
724724      {
725         sms_get_inputs(&space);
725         sms_get_inputs(space);
726726         return m_input_port0;
727727      }
728728   }
r17963r17964
753753
754754   if (hcount_latch)
755755   {
756      sms_vdp_hcount_latch(&space);
756      sms_vdp_hcount_latch(space);
757757   }
758758
759759   m_ctrl_reg = data;
r17963r17964
808808   }
809809   else
810810   {
811      sms_get_inputs(&space);
811      sms_get_inputs(space);
812812      return m_input_port0;
813813   }
814814}
r17963r17964
820820   if (m_bios_port & IO_CHIP)
821821      return 0xff;
822822
823   sms_get_inputs(&space);
823   sms_get_inputs(space);
824824
825825   /* Reset Button */
826826   m_input_port1 = (m_input_port1 & 0xef) | (ioport("RESET")->read_safe(0x01) & 0x01) << 4;
r17963r17964
12281228
12291229   logerror("bios write %02x, pc: %04x\n", data, space.device().safe_pc());
12301230
1231   setup_rom(&space);
1231   setup_rom(space);
12321232}
12331233
12341234
r17963r17964
13631363}
13641364
13651365
1366static void setup_rom( address_space *space )
1366static void setup_rom( address_space &space )
13671367{
1368   sms_state *state = space->machine().driver_data<sms_state>();
1368   sms_state *state = space.machine().driver_data<sms_state>();
13691369
13701370   /* 1. set up bank pointers to point to nothing */
13711371   state->membank("bank1")->set_base(state->m_banking_none);
r17963r17964
19501950
19511951MACHINE_RESET_MEMBER(sms_state,sms)
19521952{
1953   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
1953   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
19541954
19551955   m_ctrl_reg = 0xff;
19561956   if (m_has_fm)
19571957      m_fm_detect = 0x01;
19581958
1959   m_mapper_ram = (UINT8*)space->get_write_ptr(0xdffc);
1959   m_mapper_ram = (UINT8*)space.get_write_ptr(0xdffc);
19601960
19611961   m_bios_port = 0;
19621962
19631963   if ( m_cartridge[m_current_cartridge].features & CF_CODEMASTERS_MAPPER )
19641964   {
19651965      /* Install special memory handlers */
1966      space->install_write_handler(0x0000, 0x0000, write8_delegate(FUNC(sms_state::sms_codemasters_page0_w),this));
1967      space->install_write_handler(0x4000, 0x4000, write8_delegate(FUNC(sms_state::sms_codemasters_page1_w),this));
1966      space.install_write_handler(0x0000, 0x0000, write8_delegate(FUNC(sms_state::sms_codemasters_page0_w),this));
1967      space.install_write_handler(0x4000, 0x4000, write8_delegate(FUNC(sms_state::sms_codemasters_page1_w),this));
19681968   }
19691969
19701970   if ( m_cartridge[m_current_cartridge].features & CF_KOREAN_ZEMINA_MAPPER )
19711971   {
1972      space->install_write_handler(0x0000, 0x0003, write8_delegate(FUNC(sms_state::sms_korean_zemina_banksw_w),this));
1972      space.install_write_handler(0x0000, 0x0003, write8_delegate(FUNC(sms_state::sms_korean_zemina_banksw_w),this));
19731973   }
19741974
19751975   if ( m_cartridge[m_current_cartridge].features & CF_JANGGUN_MAPPER )
19761976   {
1977      space->install_write_handler(0x4000, 0x4000, write8_delegate(FUNC(sms_state::sms_janggun_bank0_w),this));
1978      space->install_write_handler(0x6000, 0x6000, write8_delegate(FUNC(sms_state::sms_janggun_bank1_w),this));
1979      space->install_write_handler(0x8000, 0x8000, write8_delegate(FUNC(sms_state::sms_janggun_bank2_w),this));
1980      space->install_write_handler(0xA000, 0xA000,write8_delegate(FUNC(sms_state::sms_janggun_bank3_w),this));
1977      space.install_write_handler(0x4000, 0x4000, write8_delegate(FUNC(sms_state::sms_janggun_bank0_w),this));
1978      space.install_write_handler(0x6000, 0x6000, write8_delegate(FUNC(sms_state::sms_janggun_bank1_w),this));
1979      space.install_write_handler(0x8000, 0x8000, write8_delegate(FUNC(sms_state::sms_janggun_bank2_w),this));
1980      space.install_write_handler(0xA000, 0xA000,write8_delegate(FUNC(sms_state::sms_janggun_bank3_w),this));
19811981   }
19821982
19831983   if ( m_cartridge[m_current_cartridge].features & CF_4PAK_MAPPER )
19841984   {
1985      space->install_write_handler(0x3ffe, 0x3ffe, write8_delegate(FUNC(sms_state::sms_4pak_page0_w),this));
1986      space->install_write_handler(0x7fff, 0x7fff, write8_delegate(FUNC(sms_state::sms_4pak_page1_w),this));
1987      space->install_write_handler(0xbfff, 0xbfff, write8_delegate(FUNC(sms_state::sms_4pak_page2_w),this));
1985      space.install_write_handler(0x3ffe, 0x3ffe, write8_delegate(FUNC(sms_state::sms_4pak_page0_w),this));
1986      space.install_write_handler(0x7fff, 0x7fff, write8_delegate(FUNC(sms_state::sms_4pak_page1_w),this));
1987      space.install_write_handler(0xbfff, 0xbfff, write8_delegate(FUNC(sms_state::sms_4pak_page2_w),this));
19881988   }
19891989
19901990   if ( m_cartridge[m_current_cartridge].features & CF_TVDRAW )
19911991   {
1992      space->install_write_handler(0x6000, 0x6000, write8_delegate(FUNC(sms_state::sms_tvdraw_axis_w),this));
1993      space->install_read_handler(0x8000, 0x8000, read8_delegate(FUNC(sms_state::sms_tvdraw_status_r),this));
1994      space->install_read_handler(0xa000, 0xa000, read8_delegate(FUNC(sms_state::sms_tvdraw_data_r),this));
1995      space->nop_write(0xa000, 0xa000);
1992      space.install_write_handler(0x6000, 0x6000, write8_delegate(FUNC(sms_state::sms_tvdraw_axis_w),this));
1993      space.install_read_handler(0x8000, 0x8000, read8_delegate(FUNC(sms_state::sms_tvdraw_status_r),this));
1994      space.install_read_handler(0xa000, 0xa000, read8_delegate(FUNC(sms_state::sms_tvdraw_data_r),this));
1995      space.nop_write(0xa000, 0xa000);
19961996      m_cartridge[m_current_cartridge].m_tvdraw_data = 0;
19971997   }
19981998
19991999   if ( m_cartridge[m_current_cartridge].features & CF_93C46_EEPROM )
20002000   {
2001      space->install_write_handler(0x8000,0x8000, write8_delegate(FUNC(sms_state::sms_93c46_w),this));
2002      space->install_read_handler(0x8000,0x8000, read8_delegate(FUNC(sms_state::sms_93c46_r),this));
2001      space.install_write_handler(0x8000,0x8000, write8_delegate(FUNC(sms_state::sms_93c46_w),this));
2002      space.install_read_handler(0x8000,0x8000, read8_delegate(FUNC(sms_state::sms_93c46_r),this));
20032003   }
20042004
20052005   if (m_cartridge[m_current_cartridge].features & CF_GG_SMS_MODE)
r17963r17964
20612061
20622062   setup_cart_banks(machine());
20632063   membank("bank10")->set_base(m_banking_cart[3] + 0x2000);
2064   setup_rom(&space);
2064   setup_rom(space);
20652065}
20662066
20672067
trunk/src/mess/machine/nes_pcb.c
r17963r17964
718718{
719719   LOG_MMC(("uxrom_w, offset: %04x, data: %02x\n", offset, data));
720720
721   prg16_89ab(space->machine(), data);
721   prg16_89ab(space.machine(), data);
722722}
723723
724724/*************************************************************
r17963r17964
741741{
742742   LOG_MMC(("uxrom_cc_w, offset: %04x, data: %02x\n", offset, data));
743743
744   prg16_cdef(space->machine(), data);
744   prg16_cdef(space.machine(), data);
745745}
746746
747747/*************************************************************
r17963r17964
764764{
765765   LOG_MMC(("un1rom_w, offset: %04x, data: %02x\n", offset, data));
766766
767   prg16_89ab(space->machine(), data >> 2);
767   prg16_89ab(space.machine(), data >> 2);
768768}
769769
770770/*************************************************************
r17963r17964
793793
794794static WRITE8_HANDLER( cnrom_w )
795795{
796   nes_state *state = space->machine().driver_data<nes_state>();
796   nes_state *state = space.machine().driver_data<nes_state>();
797797   LOG_MMC(("cnrom_w, offset: %04x, data: %02x\n", offset, data));
798798
799799   if (state->m_ce_mask)
800800   {
801      chr8(space->machine(), data & ~state->m_ce_mask, CHRROM);
801      chr8(space.machine(), data & ~state->m_ce_mask, CHRROM);
802802
803803      if ((data & state->m_ce_mask) == state->m_ce_state)
804804         state->m_chr_open_bus = 0;
r17963r17964
806806         state->m_chr_open_bus = 1;
807807   }
808808   else
809      chr8(space->machine(), data, CHRROM);
809      chr8(space.machine(), data, CHRROM);
810810}
811811
812812/*************************************************************
r17963r17964
849849static WRITE8_HANDLER( cprom_w )
850850{
851851   LOG_MMC(("cprom_w, offset: %04x, data: %02x\n", offset, data));
852   chr4_4(space->machine(), data, CHRRAM);
852   chr4_4(space.machine(), data, CHRRAM);
853853}
854854
855855/*************************************************************
r17963r17964
872872{
873873   LOG_MMC(("axrom_w, offset: %04x, data: %02x\n", offset, data));
874874
875   set_nt_mirroring(space->machine(), BIT(data, 4) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW);
876   prg32(space->machine(), data);
875   set_nt_mirroring(space.machine(), BIT(data, 4) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW);
876   prg32(space.machine(), data);
877877}
878878
879879/*************************************************************
r17963r17964
894894   /* Deadly Towers is really a BxROM game - the demo screens look wrong using mapper 7. */
895895   LOG_MMC(("bxrom_w, offset: %04x, data: %02x\n", offset, data));
896896
897   prg32(space->machine(), data);
897   prg32(space.machine(), data);
898898}
899899
900900/*************************************************************
r17963r17964
913913{
914914   LOG_MMC(("gxrom_w, offset %04x, data: %02x\n", offset, data));
915915
916   prg32(space->machine(), (data & 0xf0) >> 4);
917   chr8(space->machine(), data & 0x0f, CHRROM);
916   prg32(space.machine(), (data & 0xf0) >> 4);
917   chr8(space.machine(), data & 0x0f, CHRROM);
918918}
919919
920920/*************************************************************
r17963r17964
933933}
934934
935935
936static void mmc1_set_wram( address_space *space, int board )
936static void mmc1_set_wram( address_space &space, int board )
937937{
938   running_machine &machine = space->machine();
938   running_machine &machine = space.machine();
939939   nes_state *state = machine.driver_data<nes_state>();
940940   UINT8 bank = BIT(state->m_mmc_reg[0], 4) ? BIT(state->m_mmc_reg[1], 4) : BIT(state->m_mmc_reg[1], 3);
941941
r17963r17964
943943   {
944944      case STD_SXROM:      // here also reads are disabled!
945945         if (!BIT(state->m_mmc_reg[3], 4))
946            space->install_readwrite_bank(0x6000, 0x7fff, "bank5");
946            space.install_readwrite_bank(0x6000, 0x7fff, "bank5");
947947         else
948948         {
949            space->unmap_readwrite(0x6000, 0x7fff);
949            space.unmap_readwrite(0x6000, 0x7fff);
950950            break;
951951         }
952952      case STD_SXROM_A:   // ignore WRAM enable bit
r17963r17964
957957         break;
958958      case STD_SOROM:      // there are 2 WRAM banks only and battery is bank 2 for the cart (hence, we invert bank, because we have battery first)
959959         if (!BIT(state->m_mmc_reg[3], 4))
960            space->install_readwrite_bank(0x6000, 0x7fff, "bank5");
960            space.install_readwrite_bank(0x6000, 0x7fff, "bank5");
961961         else
962962         {
963            space->unmap_readwrite(0x6000, 0x7fff);
963            space.unmap_readwrite(0x6000, 0x7fff);
964964            break;
965965         }
966966      case STD_SOROM_A:   // ignore WRAM enable bit
r17963r17964
10051005   }
10061006}
10071007
1008static void mmc1_set_prg_wram( address_space *space, int board )
1008static void mmc1_set_prg_wram( address_space &space, int board )
10091009{
1010   mmc1_set_prg(space->machine());
1010   mmc1_set_prg(space.machine());
10111011   mmc1_set_wram(space, board);
10121012}
10131013
r17963r17964
10251025      chr8(machine, (state->m_mmc_reg[1] & 0x1f) >> 1, state->m_mmc_chr_source);
10261026}
10271027
1028static void common_sxrom_write_handler( address_space *space, offs_t offset, UINT8 data, int board )
1028static void common_sxrom_write_handler( address_space &space, offs_t offset, UINT8 data, int board )
10291029{
1030   running_machine &machine = space->machine();
1030   running_machine &machine = space.machine();
10311031   nes_state *state = machine.driver_data<nes_state>();
10321032   /* Note that there is only one latch and shift counter, shared amongst the 4 regs */
10331033   /* Space Shuttle will not work if they have independent variables. */
r17963r17964
10441044   else
10451045   {
10461046      state->m_mmc1_reg_write_enable = 0;
1047      space->machine().scheduler().synchronize(FUNC(mmc1_resync_callback));
1047      space.machine().scheduler().synchronize(FUNC(mmc1_resync_callback));
10481048   }
10491049
10501050   if (data & 0x80)
r17963r17964
11031103
11041104static WRITE8_HANDLER( sxrom_w )
11051105{
1106   nes_state *state = space->machine().driver_data<nes_state>();
1106   nes_state *state = space.machine().driver_data<nes_state>();
11071107
11081108   LOG_MMC(("sxrom_w, offset: %04x, data: %02x\n", offset, data));
11091109   common_sxrom_write_handler(space, offset, data, state->m_pcb_id);
r17963r17964
11521152
11531153static WRITE8_HANDLER( pxrom_w )
11541154{
1155   nes_state *state = space->machine().driver_data<nes_state>();
1155   nes_state *state = space.machine().driver_data<nes_state>();
11561156   LOG_MMC(("pxrom_w, offset: %04x, data: %02x\n", offset, data));
11571157   switch (offset & 0x7000)
11581158   {
11591159      case 0x2000:
1160         prg8_89(space->machine(), data);
1160         prg8_89(space.machine(), data);
11611161         break;
11621162      case 0x3000:
11631163         state->m_mmc_reg[0] = data;
11641164         if (state->m_mmc_latch1 == 0xfd)
1165            chr4_0(space->machine(), state->m_mmc_reg[0], CHRROM);
1165            chr4_0(space.machine(), state->m_mmc_reg[0], CHRROM);
11661166         break;
11671167      case 0x4000:
11681168         state->m_mmc_reg[1] = data;
11691169         if (state->m_mmc_latch1 == 0xfe)
1170            chr4_0(space->machine(), state->m_mmc_reg[1], CHRROM);
1170            chr4_0(space.machine(), state->m_mmc_reg[1], CHRROM);
11711171         break;
11721172      case 0x5000:
11731173         state->m_mmc_reg[2] = data;
11741174         if (state->m_mmc_latch2 == 0xfd)
1175            chr4_4(space->machine(), state->m_mmc_reg[2], CHRROM);
1175            chr4_4(space.machine(), state->m_mmc_reg[2], CHRROM);
11761176         break;
11771177      case 0x6000:
11781178         state->m_mmc_reg[3] = data;
11791179         if (state->m_mmc_latch2 == 0xfe)
1180            chr4_4(space->machine(), state->m_mmc_reg[3], CHRROM);
1180            chr4_4(space.machine(), state->m_mmc_reg[3], CHRROM);
11811181         break;
11821182      case 0x7000:
1183         set_nt_mirroring(space->machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
1183         set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
11841184         break;
11851185      default:
11861186         LOG_MMC(("MMC2 uncaught w: %04x:%02x\n", offset, data));
r17963r17964
12061206   switch (offset & 0x7000)
12071207   {
12081208      case 0x2000:
1209         prg16_89ab(space->machine(), data);
1209         prg16_89ab(space.machine(), data);
12101210         break;
12111211      default:
12121212         pxrom_w(space, offset, data);
r17963r17964
12221222
12231223 *************************************************************/
12241224
1225static void mmc3_set_wram( address_space *space )
1225static void mmc3_set_wram( address_space &space )
12261226{
1227   running_machine &machine = space->machine();
1227   running_machine &machine = space.machine();
12281228   nes_state *state = machine.driver_data<nes_state>();
12291229
12301230   // skip this function if we are emulating a MMC3 clone with mid writes
r17963r17964
12321232      return;
12331233
12341234   if (BIT(state->m_mmc3_wram_protect, 7))
1235      space->install_readwrite_bank(0x6000, 0x7fff, "bank5");
1235      space.install_readwrite_bank(0x6000, 0x7fff, "bank5");
12361236   else
12371237   {
1238      space->unmap_readwrite(0x6000, 0x7fff);
1238      space.unmap_readwrite(0x6000, 0x7fff);
12391239      return;
12401240   }
12411241
12421242   if (!BIT(state->m_mmc3_wram_protect, 6))
1243      space->install_write_bank(0x6000, 0x7fff, "bank5");
1243      space.install_write_bank(0x6000, 0x7fff, "bank5");
12441244   else
12451245   {
1246      space->unmap_write(0x6000, 0x7fff);
1246      space.unmap_write(0x6000, 0x7fff);
12471247      return;
12481248   }
12491249}
r17963r17964
12991299
13001300static WRITE8_HANDLER( txrom_w )
13011301{
1302   nes_state *state = space->machine().driver_data<nes_state>();
1302   nes_state *state = space.machine().driver_data<nes_state>();
13031303   UINT8 mmc_helper, cmd;
13041304
13051305   LOG_MMC(("txrom_w, offset: %04x, data: %02x\n", offset, data));
r17963r17964
13121312
13131313         /* Has PRG Mode changed? */
13141314         if (mmc_helper & 0x40)
1315            mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
1315            mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
13161316
13171317         /* Has CHR Mode changed? */
13181318         if (mmc_helper & 0x80)
1319            mmc3_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
1319            mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
13201320         break;
13211321
13221322      case 0x0001:
r17963r17964
13261326         case 0: case 1:   // these do not need to be separated: we take care of them in set_chr!
13271327         case 2: case 3: case 4: case 5:
13281328            state->m_mmc_vrom_bank[cmd] = data;
1329            mmc3_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
1329            mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
13301330            break;
13311331         case 6:
13321332         case 7:
13331333            state->m_mmc_prg_bank[cmd - 6] = data;
1334            mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
1334            mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
13351335            break;
13361336         }
13371337         break;
13381338
13391339      case 0x2000:
1340         set_nt_mirroring(space->machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
1340         set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
13411341         break;
13421342
13431343      case 0x2001:
r17963r17964
13771377
13781378static WRITE8_HANDLER( hkrom_m_w )
13791379{
1380   nes_state *state = space->machine().driver_data<nes_state>();
1380   nes_state *state = space.machine().driver_data<nes_state>();
13811381   UINT8 write_hi, write_lo;
13821382   LOG_MMC(("hkrom_m_w, offset: %04x, data: %02x\n", offset, data));
13831383
r17963r17964
13971397
13981398static READ8_HANDLER( hkrom_m_r )
13991399{
1400   nes_state *state = space->machine().driver_data<nes_state>();
1400   nes_state *state = space.machine().driver_data<nes_state>();
14011401   LOG_MMC(("hkrom_m_r, offset: %04x\n", offset));
14021402
14031403   if (offset < 0x1000)
r17963r17964
14181418
14191419static WRITE8_HANDLER( hkrom_w )
14201420{
1421   nes_state *state = space->machine().driver_data<nes_state>();
1421   nes_state *state = space.machine().driver_data<nes_state>();
14221422   UINT8 mmc6_helper;
14231423   LOG_MMC(("hkrom_w, offset: %04x, data: %02x\n", offset, data));
14241424
r17963r17964
14331433
14341434         /* Has PRG Mode changed? */
14351435         if (BIT(mmc6_helper, 6))
1436            mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
1436            mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
14371437
14381438         /* Has CHR Mode changed? */
14391439         if (BIT(mmc6_helper, 7))
1440            mmc3_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
1440            mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
14411441         break;
14421442
14431443      case 0x2001:
r17963r17964
15461546
15471547static WRITE8_HANDLER( tqrom_w )
15481548{
1549   nes_state *state = space->machine().driver_data<nes_state>();
1549   nes_state *state = space.machine().driver_data<nes_state>();
15501550   UINT8 mmc_helper, cmd;
15511551   LOG_MMC(("tqrom_w, offset: %04x, data: %02x\n", offset, data));
15521552
r17963r17964
15581558
15591559         /* Has PRG Mode changed? */
15601560         if (mmc_helper & 0x40)
1561            mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
1561            mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
15621562
15631563         /* Has CHR Mode changed? */
15641564         if (mmc_helper & 0x80)
1565            tqrom_set_chr(space->machine());
1565            tqrom_set_chr(space.machine());
15661566         break;
15671567      case 0x0001: /* $8001 */
15681568         cmd = state->m_mmc3_latch & 0x07;
r17963r17964
15711571         case 0: case 1:   // these do not need to be separated: we take care of them in set_chr!
15721572         case 2: case 3: case 4: case 5:
15731573            state->m_mmc_vrom_bank[cmd] = data;
1574            tqrom_set_chr(space->machine());
1574            tqrom_set_chr(space.machine());
15751575            break;
15761576         case 6:
15771577         case 7:
15781578            state->m_mmc_prg_bank[cmd - 6] = data;
1579            mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
1579            mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
15801580            break;
15811581         }
15821582         break;
r17963r17964
15981598
15991599static WRITE8_HANDLER( zz_m_w )
16001600{
1601   nes_state *state = space->machine().driver_data<nes_state>();
1601   nes_state *state = space.machine().driver_data<nes_state>();
16021602   UINT8 mmc_helper = data & 0x07;
16031603   LOG_MMC(("zz_m_w, offset: %04x, data: %02x\n", offset, data));
16041604
r17963r17964
16061606   state->m_mmc_prg_mask = (mmc_helper << 1) | 0x07;
16071607   state->m_mmc_chr_base = BIT(mmc_helper, 2) << 7;
16081608   state->m_mmc_chr_mask = 0x7f;
1609   mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
1610   mmc3_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
1609   mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
1610   mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
16111611}
16121612
16131613/*************************************************************
r17963r17964
16211621
16221622static WRITE8_HANDLER( qj_m_w )
16231623{
1624   nes_state *state = space->machine().driver_data<nes_state>();
1624   nes_state *state = space.machine().driver_data<nes_state>();
16251625   LOG_MMC(("qj_m_w, offset: %04x, data: %02x\n", offset, data));
16261626
16271627   state->m_mmc_prg_base = BIT(data, 0) << 4;
16281628   state->m_mmc_prg_mask = 0x0f;
16291629   state->m_mmc_chr_base = BIT(data, 0) << 7;
16301630   state->m_mmc_chr_mask = 0x7f;
1631   mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
1632   mmc3_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
1631   mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
1632   mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
16331633}
16341634
16351635/*************************************************************
r17963r17964
18581858
18591859static READ8_HANDLER( exrom_l_r )
18601860{
1861   nes_state *state = space->machine().driver_data<nes_state>();
1861   nes_state *state = space.machine().driver_data<nes_state>();
18621862   int retVal;
18631863
18641864   /* $5c00 - $5fff: extended videoram attributes */
r17963r17964
18951895
18961896static WRITE8_HANDLER( exrom_l_w )
18971897{
1898   nes_state *state = space->machine().driver_data<nes_state>();
1898   nes_state *state = space.machine().driver_data<nes_state>();
18991899
19001900   //  LOG_MMC(("Mapper 5 write, offset: %04x, data: %02x\n", offset + 0x4100, data));
19011901   /* Send $5000-$5015 to the sound chip */
19021902   if ((offset >= 0xf00) && (offset <= 0xf15))
19031903   {
1904      nes_psg_w(state->m_sound, *space, offset & 0x1f, data);
1904      nes_psg_w(state->m_sound, space, offset & 0x1f, data);
19051905      return;
19061906   }
19071907
r17963r17964
19171917   {
19181918      case 0x1000: /* $5100 */
19191919         state->m_mmc5_prg_mode = data & 0x03;
1920         //          mmc5_update_prg(space->machine());
1920         //          mmc5_update_prg(space.machine());
19211921         LOG_MMC(("MMC5 rom bank mode: %02x\n", data));
19221922         break;
19231923
r17963r17964
19451945      case 0x1004: /* $5104 - Extra VRAM (EXRAM) control */
19461946         state->m_mmc5_vram_control = data & 0x03;
19471947         // update render
1948         mmc5_update_render_mode(space->machine());
1948         mmc5_update_render_mode(space.machine());
19491949         LOG_MMC(("MMC5 exram control: %02x\n", data));
19501950         break;
19511951
19521952      case 0x1005: /* $5105 */
1953         mmc5_ppu_mirror(space->machine(), 0, data & 0x03);
1954         mmc5_ppu_mirror(space->machine(), 1, (data & 0x0c) >> 2);
1955         mmc5_ppu_mirror(space->machine(), 2, (data & 0x30) >> 4);
1956         mmc5_ppu_mirror(space->machine(), 3, (data & 0xc0) >> 6);
1953         mmc5_ppu_mirror(space.machine(), 0, data & 0x03);
1954         mmc5_ppu_mirror(space.machine(), 1, (data & 0x0c) >> 2);
1955         mmc5_ppu_mirror(space.machine(), 2, (data & 0x30) >> 4);
1956         mmc5_ppu_mirror(space.machine(), 3, (data & 0xc0) >> 6);
19571957         // update render
1958         mmc5_update_render_mode(space->machine());
1958         mmc5_update_render_mode(space.machine());
19591959         break;
19601960
19611961         /* tile data for MMC5 flood-fill NT mode */
r17963r17964
19791979         LOG_MMC(("MMC5 mid RAM bank select: %02x\n", data & 0x07));
19801980         // FIXME: a few Koei games have both WRAM & BWRAM but here we don't support this (yet)
19811981         if (state->m_battery)
1982            wram_bank(space->machine(), data, NES_BATTERY);
1982            wram_bank(space.machine(), data, NES_BATTERY);
19831983         else
1984            wram_bank(space->machine(), data, NES_WRAM);
1984            wram_bank(space.machine(), data, NES_WRAM);
19851985         break;
19861986
19871987
r17963r17964
19901990      case 0x1016: /* $5116 */
19911991      case 0x1017: /* $5117 */
19921992         state->m_mmc5_prg_regs[offset & 3] = data;
1993         mmc5_update_prg(space->machine());
1993         mmc5_update_prg(space.machine());
19941994         break;
19951995
19961996#if 0
r17963r17964
20092009            state->m_mmc5_vrom_regA[offset & 0x07] = data;
20102010            state->m_mmc5_last_chr_a = 1;
20112011            if (state->m_ppu->get_current_scanline() == 240 || !state->m_ppu->is_sprite_8x16())
2012               mmc5_update_chr_a(space->machine());
2012               mmc5_update_chr_a(space.machine());
20132013         }
20142014         break;
20152015
r17963r17964
20222022         state->m_mmc5_vrom_regB[offset & 0x03] = data;
20232023         state->m_mmc5_last_chr_a = 0;
20242024         if (state->m_ppu->get_current_scanline() == 240 || !state->m_ppu->is_sprite_8x16())
2025            mmc5_update_chr_b(space->machine());
2025            mmc5_update_chr_b(space.machine());
20262026         break;
20272027
20282028      case 0x1030: /* $5130 */
r17963r17964
20442044            /* 1k switch */
20452045            state->m_MMC5_vrom_bank[0] = data | (state->m_mmc5_high_chr << 8);
20462046            //                  mapper5_sync_vrom(0);
2047            chr1_0(space->machine(), state->m_MMC5_vrom_bank[0], CHRROM);
2047            chr1_0(space.machine(), state->m_MMC5_vrom_bank[0], CHRROM);
20482048            //                  state->m_nes_vram_sprite[0] = state->m_MMC5_vrom_bank[0] * 64;
20492049            //                  vrom_next[0] = 4;
20502050            //                  vrom_page_a = 1;
r17963r17964
20582058      {
20592059         case 0x02:
20602060            /* 2k switch */
2061            chr2_0(space->machine(), data | (state->m_mmc5_high_chr << 8), CHRROM);
2061            chr2_0(space.machine(), data | (state->m_mmc5_high_chr << 8), CHRROM);
20622062            break;
20632063         case 0x03:
20642064            /* 1k switch */
20652065            state->m_MMC5_vrom_bank[1] = data | (state->m_mmc5_high_chr << 8);
20662066            //                  mapper5_sync_vrom(0);
2067            chr1_1(space->machine(), state->m_MMC5_vrom_bank[1], CHRROM);
2067            chr1_1(space.machine(), state->m_MMC5_vrom_bank[1], CHRROM);
20682068            //                  state->m_nes_vram_sprite[1] = state->m_MMC5_vrom_bank[0] * 64;
20692069            //                  vrom_next[1] = 5;
20702070            //                  vrom_page_a = 1;
r17963r17964
20802080            /* 1k switch */
20812081            state->m_MMC5_vrom_bank[2] = data | (state->m_mmc5_high_chr << 8);
20822082            //                  mapper5_sync_vrom(0);
2083            chr1_2(space->machine(), state->m_MMC5_vrom_bank[2], CHRROM);
2083            chr1_2(space.machine(), state->m_MMC5_vrom_bank[2], CHRROM);
20842084            //                  state->m_nes_vram_sprite[2] = state->m_MMC5_vrom_bank[0] * 64;
20852085            //                  vrom_next[2] = 6;
20862086            //                  vrom_page_a = 1;
r17963r17964
20932093         switch (state->m_mmc5_chr_mode)
20942094      {
20952095         case 0x01:
2096            chr4_0(space->machine(), data, CHRROM);
2096            chr4_0(space.machine(), data, CHRROM);
20972097            break;
20982098         case 0x02:
20992099            /* 2k switch */
2100            chr2_2(space->machine(), data | (state->m_mmc5_high_chr << 8), CHRROM);
2100            chr2_2(space.machine(), data | (state->m_mmc5_high_chr << 8), CHRROM);
21012101            break;
21022102         case 0x03:
21032103            /* 1k switch */
21042104            state->m_MMC5_vrom_bank[3] = data | (state->m_mmc5_high_chr << 8);
21052105            //                  mapper5_sync_vrom(0);
2106            chr1_3(space->machine(), state->m_MMC5_vrom_bank[3], CHRROM);
2106            chr1_3(space.machine(), state->m_MMC5_vrom_bank[3], CHRROM);
21072107            //                  state->m_nes_vram_sprite[3] = state->m_MMC5_vrom_bank[0] * 64;
21082108            //                  vrom_next[3] = 7;
21092109            //                  vrom_page_a = 1;
r17963r17964
21192119            /* 1k switch */
21202120            state->m_MMC5_vrom_bank[4] = data | (state->m_mmc5_high_chr << 8);
21212121            //                  mapper5_sync_vrom(0);
2122            chr1_4(space->machine(), state->m_MMC5_vrom_bank[4], CHRROM);
2122            chr1_4(space.machine(), state->m_MMC5_vrom_bank[4], CHRROM);
21232123            //                  state->m_nes_vram_sprite[4] = state->m_MMC5_vrom_bank[0] * 64;
21242124            //                  vrom_next[0] = 0;
21252125            //                  vrom_page_a = 0;
r17963r17964
21332133      {
21342134         case 0x02:
21352135            /* 2k switch */
2136            chr2_4(space->machine(), data | (state->m_mmc5_high_chr << 8), CHRROM);
2136            chr2_4(space.machine(), data | (state->m_mmc5_high_chr << 8), CHRROM);
21372137            break;
21382138         case 0x03:
21392139            /* 1k switch */
21402140            state->m_MMC5_vrom_bank[5] = data | (state->m_mmc5_high_chr << 8);
21412141            //                  mapper5_sync_vrom(0);
2142            chr1_5(space->machine(), state->m_MMC5_vrom_bank[5], CHRROM);
2142            chr1_5(space.machine(), state->m_MMC5_vrom_bank[5], CHRROM);
21432143            //                  state->m_nes_vram_sprite[5] = state->m_MMC5_vrom_bank[0] * 64;
21442144            //                  vrom_next[1] = 1;
21452145            //                  vrom_page_a = 0;
r17963r17964
21552155            /* 1k switch */
21562156            state->m_MMC5_vrom_bank[6] = data | (state->m_mmc5_high_chr << 8);
21572157            //                  mapper5_sync_vrom(0);
2158            chr1_6(space->machine(), state->m_MMC5_vrom_bank[6], CHRROM);
2158            chr1_6(space.machine(), state->m_MMC5_vrom_bank[6], CHRROM);
21592159            //                  state->m_nes_vram_sprite[6] = state->m_MMC5_vrom_bank[0] * 64;
21602160            //                  vrom_next[2] = 2;
21612161            //                  vrom_page_a = 0;
r17963r17964
21692169      {
21702170         case 0x00:
21712171            /* 8k switch */
2172            chr8(space->machine(), data, CHRROM);
2172            chr8(space.machine(), data, CHRROM);
21732173            break;
21742174         case 0x01:
21752175            /* 4k switch */
2176            chr4_4(space->machine(), data, CHRROM);
2176            chr4_4(space.machine(), data, CHRROM);
21772177            break;
21782178         case 0x02:
21792179            /* 2k switch */
2180            chr2_6(space->machine(), data | (state->m_mmc5_high_chr << 8), CHRROM);
2180            chr2_6(space.machine(), data | (state->m_mmc5_high_chr << 8), CHRROM);
21812181            break;
21822182         case 0x03:
21832183            /* 1k switch */
21842184            state->m_MMC5_vrom_bank[7] = data | (state->m_mmc5_high_chr << 8);
21852185            //                  mapper5_sync_vrom(0);
2186            chr1_7(space->machine(), state->m_MMC5_vrom_bank[7], CHRROM);
2186            chr1_7(space.machine(), state->m_MMC5_vrom_bank[7], CHRROM);
21872187            //                  state->m_nes_vram_sprite[7] = state->m_MMC5_vrom_bank[0] * 64;
21882188            //                  vrom_next[3] = 3;
21892189            //                  vrom_page_a = 0;
r17963r17964
22012201            //                  nes_vram[vrom_next[0]] = data * 64;
22022202            //                  nes_vram[0 + (vrom_page_a*4)] = data * 64;
22032203            //                  nes_vram[0] = data * 64;
2204            chr1_4(space->machine(), state->m_MMC5_vrom_bank[8], CHRROM);
2204            chr1_4(space.machine(), state->m_MMC5_vrom_bank[8], CHRROM);
22052205            //                  mapper5_sync_vrom(1);
22062206            if (!state->m_vrom_page_b)
22072207            {
r17963r17964
22172217      {
22182218         case 0x02:
22192219            /* 2k switch */
2220            chr2_0(space->machine(), data | (state->m_mmc5_high_chr << 8), CHRROM);
2221            chr2_4(space->machine(), data | (state->m_mmc5_high_chr << 8), CHRROM);
2220            chr2_0(space.machine(), data | (state->m_mmc5_high_chr << 8), CHRROM);
2221            chr2_4(space.machine(), data | (state->m_mmc5_high_chr << 8), CHRROM);
22222222            break;
22232223         case 0x03:
22242224            /* 1k switch */
r17963r17964
22262226            //                  nes_vram[vrom_next[1]] = data * 64;
22272227            //                  nes_vram[1 + (vrom_page_a*4)] = data * 64;
22282228            //                  nes_vram[1] = data * 64;
2229            chr1_5(space->machine(), state->m_MMC5_vrom_bank[9], CHRROM);
2229            chr1_5(space.machine(), state->m_MMC5_vrom_bank[9], CHRROM);
22302230            //                  mapper5_sync_vrom(1);
22312231            if (!state->m_vrom_page_b)
22322232            {
r17963r17964
22462246            //                  nes_vram[vrom_next[2]] = data * 64;
22472247            //                  nes_vram[2 + (vrom_page_a*4)] = data * 64;
22482248            //                  nes_vram[2] = data * 64;
2249            chr1_6(space->machine(), state->m_MMC5_vrom_bank[10], CHRROM);
2249            chr1_6(space.machine(), state->m_MMC5_vrom_bank[10], CHRROM);
22502250            //                  mapper5_sync_vrom(1);
22512251            if (!state->m_vrom_page_b)
22522252            {
r17963r17964
22632263         case 0x00:
22642264            /* 8k switch */
22652265            /* switches in first half of an 8K bank!) */
2266            chr4_0(space->machine(), data << 1, CHRROM);
2267            chr4_4(space->machine(), data << 1, CHRROM);
2266            chr4_0(space.machine(), data << 1, CHRROM);
2267            chr4_4(space.machine(), data << 1, CHRROM);
22682268            break;
22692269         case 0x01:
22702270            /* 4k switch */
2271            chr4_0(space->machine(), data, CHRROM);
2272            chr4_4(space->machine(), data, CHRROM);
2271            chr4_0(space.machine(), data, CHRROM);
2272            chr4_4(space.machine(), data, CHRROM);
22732273            break;
22742274         case 0x02:
22752275            /* 2k switch */
2276            chr2_2(space->machine(), data | (state->m_mmc5_high_chr << 8), CHRROM);
2277            chr2_6(space->machine(), data | (state->m_mmc5_high_chr << 8), CHRROM);
2276            chr2_2(space.machine(), data | (state->m_mmc5_high_chr << 8), CHRROM);
2277            chr2_6(space.machine(), data | (state->m_mmc5_high_chr << 8), CHRROM);
22782278            break;
22792279         case 0x03:
22802280            /* 1k switch */
r17963r17964
22822282            //                  nes_vram[vrom_next[3]] = data * 64;
22832283            //                  nes_vram[3 + (vrom_page_a*4)] = data * 64;
22842284            //                  nes_vram[3] = data * 64;
2285            chr1_7(space->machine(), state->m_MMC5_vrom_bank[11], CHRROM);
2285            chr1_7(space.machine(), state->m_MMC5_vrom_bank[11], CHRROM);
22862286            //                  mapper5_sync_vrom(1);
22872287            if (!state->m_vrom_page_b)
22882288            {
r17963r17964
23972397
23982398static WRITE8_HANDLER( ntbrom_w )
23992399{
2400   nes_state *state = space->machine().driver_data<nes_state>();
2400   nes_state *state = space.machine().driver_data<nes_state>();
24012401
24022402   LOG_MMC(("ntbrom_w, offset %04x, data: %02x\n", offset, data));
24032403
24042404   switch (offset & 0x7000)
24052405   {
24062406      case 0x0000:
2407         chr2_0(space->machine(), data, CHRROM);
2407         chr2_0(space.machine(), data, CHRROM);
24082408         break;
24092409      case 0x1000:
2410         chr2_2(space->machine(), data, CHRROM);
2410         chr2_2(space.machine(), data, CHRROM);
24112411         break;
24122412      case 0x2000:
2413         chr2_4(space->machine(), data, CHRROM);
2413         chr2_4(space.machine(), data, CHRROM);
24142414         break;
24152415      case 0x3000:
2416         chr2_6(space->machine(), data, CHRROM);
2416         chr2_6(space.machine(), data, CHRROM);
24172417         break;
24182418      case 0x4000:
24192419         state->m_mmc_latch1 = data & 0x7f;
2420         ntbrom_mirror(space->machine(), state->m_mmc_reg[0], state->m_mmc_latch1, state->m_mmc_latch2);
2420         ntbrom_mirror(space.machine(), state->m_mmc_reg[0], state->m_mmc_latch1, state->m_mmc_latch2);
24212421         break;
24222422      case 0x5000:
24232423         state->m_mmc_latch2 = data & 0x7f;
2424         ntbrom_mirror(space->machine(), state->m_mmc_reg[0], state->m_mmc_latch1, state->m_mmc_latch2);
2424         ntbrom_mirror(space.machine(), state->m_mmc_reg[0], state->m_mmc_latch1, state->m_mmc_latch2);
24252425         break;
24262426      case 0x6000:
24272427         state->m_mmc_reg[0] = data & 0x13;
2428         ntbrom_mirror(space->machine(), state->m_mmc_reg[0], state->m_mmc_latch1, state->m_mmc_latch2);
2428         ntbrom_mirror(space.machine(), state->m_mmc_reg[0], state->m_mmc_latch1, state->m_mmc_latch2);
24292429         break;
24302430      case 0x7000:
2431         prg16_89ab(space->machine(), data);
2431         prg16_89ab(space.machine(), data);
24322432         break;
24332433      default:
24342434         LOG_MMC(("ntbrom_w uncaught write, offset: %04x, data: %02x\n", offset, data));
r17963r17964
24762476
24772477static WRITE8_HANDLER( jxrom_w )
24782478{
2479   nes_state *state = space->machine().driver_data<nes_state>();
2479   nes_state *state = space.machine().driver_data<nes_state>();
24802480   LOG_MMC(("jxrom_w, offset %04x, data: %02x\n", offset, data));
24812481
24822482   switch (offset & 0x6000)
r17963r17964
24892489         switch (state->m_mmc_latch1)
24902490         {
24912491         case 0: case 1: case 2: case 3: case 4: case 5: case 6: case 7:
2492            chr1_x(space->machine(), state->m_mmc_latch1, data, CHRROM);
2492            chr1_x(space.machine(), state->m_mmc_latch1, data, CHRROM);
24932493            break;
24942494
24952495         case 8:
24962496            if (!(data & 0x40))
24972497            {
24982498               // is PRG ROM
2499               space->unmap_write(0x6000, 0x7fff);
2500               prg8_67(space->machine(), data & 0x3f);
2499               space.unmap_write(0x6000, 0x7fff);
2500               prg8_67(space.machine(), data & 0x3f);
25012501            }
25022502            else if (data & 0x80)
25032503            {
25042504               // is PRG RAM
2505               space->install_write_bank(0x6000, 0x7fff, "bank5");
2505               space.install_write_bank(0x6000, 0x7fff, "bank5");
25062506               state->m_prg_bank[4] = state->m_battery_bank5_start + (data & 0x3f);
25072507               state->membank("bank5")->set_entry(state->m_prg_bank[4]);
25082508            }
25092509            break;
25102510
25112511         case 9:
2512            prg8_89(space->machine(), data);
2512            prg8_89(space.machine(), data);
25132513            break;
25142514         case 0x0a:
2515            prg8_ab(space->machine(), data);
2515            prg8_ab(space.machine(), data);
25162516            break;
25172517         case 0x0b:
2518            prg8_cd(space->machine(), data);
2518            prg8_cd(space.machine(), data);
25192519            break;
25202520         case 0x0c:
25212521            switch (data & 0x03)
25222522            {
2523            case 0x00: set_nt_mirroring(space->machine(), PPU_MIRROR_VERT); break;
2524            case 0x01: set_nt_mirroring(space->machine(), PPU_MIRROR_HORZ); break;
2525            case 0x02: set_nt_mirroring(space->machine(), PPU_MIRROR_LOW); break;
2526            case 0x03: set_nt_mirroring(space->machine(), PPU_MIRROR_HIGH); break;
2523            case 0x00: set_nt_mirroring(space.machine(), PPU_MIRROR_VERT); break;
2524            case 0x01: set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); break;
2525            case 0x02: set_nt_mirroring(space.machine(), PPU_MIRROR_LOW); break;
2526            case 0x03: set_nt_mirroring(space.machine(), PPU_MIRROR_HIGH); break;
25272527            }
25282528            break;
25292529         case 0x0d:
r17963r17964
25692569
25702570static WRITE8_HANDLER( dxrom_w )
25712571{
2572   nes_state *state = space->machine().driver_data<nes_state>();
2572   nes_state *state = space.machine().driver_data<nes_state>();
25732573   LOG_MMC(("dxrom_w, offset: %04x, data: %02x\n", offset, data));
25742574
25752575    if (offset >= 0x2000)
r17963r17964
25802580      case 1:
25812581         switch (state->m_mmc_latch1 & 0x07)
25822582         {
2583         case 0: chr2_0(space->machine(), data >> 1, CHRROM); break;
2584         case 1: chr2_2(space->machine(), data >> 1, CHRROM); break;
2585         case 2: chr1_4(space->machine(), data | 0x40, CHRROM); break;
2586         case 3: chr1_5(space->machine(), data | 0x40, CHRROM); break;
2587         case 4: chr1_6(space->machine(), data | 0x40, CHRROM); break;
2588         case 5: chr1_7(space->machine(), data | 0x40, CHRROM); break;
2589         case 6: prg8_89(space->machine(), data); break;
2590         case 7: prg8_ab(space->machine(), data); break;
2583         case 0: chr2_0(space.machine(), data >> 1, CHRROM); break;
2584         case 1: chr2_2(space.machine(), data >> 1, CHRROM); break;
2585         case 2: chr1_4(space.machine(), data | 0x40, CHRROM); break;
2586         case 3: chr1_5(space.machine(), data | 0x40, CHRROM); break;
2587         case 4: chr1_6(space.machine(), data | 0x40, CHRROM); break;
2588         case 5: chr1_7(space.machine(), data | 0x40, CHRROM); break;
2589         case 6: prg8_89(space.machine(), data); break;
2590         case 7: prg8_ab(space.machine(), data); break;
25912591         }
25922592         break;
25932593      case 0:
r17963r17964
26162616
26172617   // additional mirroring control when writing to even addresses
26182618   if (!(offset & 1))
2619      set_nt_mirroring(space->machine(), BIT(data, 6) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW);
2619      set_nt_mirroring(space.machine(), BIT(data, 6) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW);
26202620
26212621   dxrom_w(space, offset, data);
26222622}
r17963r17964
26352635
26362636static WRITE8_HANDLER( namcot3446_w )
26372637{
2638   nes_state *state = space->machine().driver_data<nes_state>();
2638   nes_state *state = space.machine().driver_data<nes_state>();
26392639   LOG_MMC(("namcot3446_w, offset: %04x, data: %02x\n", offset, data));
26402640
26412641   // NEStopia does not have this!
26422642   if (offset >= 0x2000)
26432643   {
26442644      if (!(offset & 1))
2645         set_nt_mirroring(space->machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
2645         set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
26462646      return;
26472647   }
26482648
r17963r17964
26512651      case 1:
26522652         switch (state->m_mmc_latch1 & 0x07)
26532653         {
2654         case 2: chr2_0(space->machine(), data, CHRROM); break;
2655         case 3: chr2_2(space->machine(), data, CHRROM); break;
2656         case 4: chr2_4(space->machine(), data, CHRROM); break;
2657         case 5: chr2_6(space->machine(), data, CHRROM); break;
2658         case 6: BIT(state->m_mmc_latch1, 6) ? prg8_cd(space->machine(), data) : prg8_89(space->machine(), data); break;
2659         case 7: prg8_ab(space->machine(), data); break;
2654         case 2: chr2_0(space.machine(), data, CHRROM); break;
2655         case 3: chr2_2(space.machine(), data, CHRROM); break;
2656         case 4: chr2_4(space.machine(), data, CHRROM); break;
2657         case 5: chr2_6(space.machine(), data, CHRROM); break;
2658         case 6: BIT(state->m_mmc_latch1, 6) ? prg8_cd(space.machine(), data) : prg8_89(space.machine(), data); break;
2659         case 7: prg8_ab(space.machine(), data); break;
26602660         }
26612661         break;
26622662      case 0:
r17963r17964
26802680
26812681static WRITE8_HANDLER( namcot3425_w )
26822682{
2683   nes_state *state = space->machine().driver_data<nes_state>();
2683   nes_state *state = space.machine().driver_data<nes_state>();
26842684   UINT8 mode;
26852685   LOG_MMC(("namcot3425_w, offset: %04x, data: %02x\n", offset, data));
26862686   if (offset >= 0x2000)
r17963r17964
26922692         mode = state->m_mmc_latch1 & 0x07;
26932693         switch (mode)
26942694         {
2695         case 0: chr2_0(space->machine(), data >> 1, CHRROM); break;
2696         case 1: chr2_2(space->machine(), data >> 1, CHRROM); break;
2695         case 0: chr2_0(space.machine(), data >> 1, CHRROM); break;
2696         case 1: chr2_2(space.machine(), data >> 1, CHRROM); break;
26972697         case 2:
26982698         case 3:
26992699         case 4:
27002700         case 5:
2701            chr1_x(space->machine(), 2 + mode, data, CHRROM);
2701            chr1_x(space.machine(), 2 + mode, data, CHRROM);
27022702            state->m_mmc_reg[mode - 2] = BIT(data, 5);
27032703            if (!BIT(state->m_mmc_latch1, 7))
27042704            {
2705                  set_nt_page(space->machine(), 0, CIRAM, state->m_mmc_reg[0], 1);
2706                  set_nt_page(space->machine(), 1, CIRAM, state->m_mmc_reg[1], 1);
2707                  set_nt_page(space->machine(), 2, CIRAM, state->m_mmc_reg[2], 1);
2708                  set_nt_page(space->machine(), 3, CIRAM, state->m_mmc_reg[3], 1);
2705                  set_nt_page(space.machine(), 0, CIRAM, state->m_mmc_reg[0], 1);
2706                  set_nt_page(space.machine(), 1, CIRAM, state->m_mmc_reg[1], 1);
2707                  set_nt_page(space.machine(), 2, CIRAM, state->m_mmc_reg[2], 1);
2708                  set_nt_page(space.machine(), 3, CIRAM, state->m_mmc_reg[3], 1);
27092709            }
27102710            else
2711               set_nt_mirroring(space->machine(), PPU_MIRROR_HORZ);
2711               set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ);
27122712            break;
2713         case 6: prg8_89(space->machine(), data); break;
2714         case 7: prg8_ab(space->machine(), data); break;
2713         case 6: prg8_89(space.machine(), data); break;
2714         case 7: prg8_ab(space.machine(), data); break;
27152715         }
27162716         break;
27172717      case 0:
r17963r17964
27342734
27352735static WRITE8_HANDLER( dis_74x377_w )
27362736{
2737   nes_state *state = space->machine().driver_data<nes_state>();
2737   nes_state *state = space.machine().driver_data<nes_state>();
27382738   LOG_MMC(("dis_74x377_w, offset: %04x, data: %02x\n", offset, data));
27392739
2740   chr8(space->machine(), data >> 4, state->m_mmc_chr_source);
2741   prg32(space->machine(), data & 0x0f);
2740   chr8(space.machine(), data >> 4, state->m_mmc_chr_source);
2741   prg32(space.machine(), data & 0x0f);
27422742}
27432743
27442744/*************************************************************
r17963r17964
27532753{
27542754   LOG_MMC(("dis_74x139x74_m_w, offset: %04x, data: %02x\n", offset, data));
27552755
2756   chr8(space->machine(), ((data & 0x02) >> 1) | ((data & 0x01) << 1), CHRROM);
2756   chr8(space.machine(), ((data & 0x02) >> 1) | ((data & 0x01) << 1), CHRROM);
27572757}
27582758
27592759/*************************************************************
r17963r17964
27702770{
27712771   LOG_MMC(("dis_74x161x138_m_w, offset: %04x, data: %02x\n", offset, data));
27722772
2773   chr8(space->machine(), data >> 2, CHRROM);
2774   prg32(space->machine(), data);
2773   chr8(space.machine(), data >> 2, CHRROM);
2774   prg32(space.machine(), data);
27752775}
27762776
27772777/*************************************************************
r17963r17964
27882788
27892789static WRITE8_HANDLER( dis_74x161x161x32_w )
27902790{
2791   nes_state *state = space->machine().driver_data<nes_state>();
2791   nes_state *state = space.machine().driver_data<nes_state>();
27922792   LOG_MMC(("dis_74x161x161x32_w, offset: %04x, data: %02x\n", offset, data));
27932793
27942794   if (!state->m_hard_mirroring)   // there are two 'variants' depending on hardwired or mapper ctrl mirroring
2795      set_nt_mirroring(space->machine(), BIT(data, 7) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW);
2796   chr8(space->machine(), data, CHRROM);
2797   prg16_89ab(space->machine(), data >> 4);
2795      set_nt_mirroring(space.machine(), BIT(data, 7) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW);
2796   chr8(space.machine(), data, CHRROM);
2797   prg16_89ab(space.machine(), data >> 4);
27982798}
27992799
28002800/*************************************************************
r17963r17964
28422842
28432843static WRITE8_HANDLER( lz93d50_w )
28442844{
2845   nes_state *state = space->machine().driver_data<nes_state>();
2845   nes_state *state = space.machine().driver_data<nes_state>();
28462846   LOG_MMC(("lz93d50_w, offset: %04x, data: %02x\n", offset, data));
28472847
28482848   switch (offset & 0x000f)
28492849   {
28502850      case 0: case 1: case 2: case 3:
28512851      case 4: case 5: case 6: case 7:
2852         chr1_x(space->machine(), offset & 0x07, data, state->m_mmc_chr_source);
2852         chr1_x(space.machine(), offset & 0x07, data, state->m_mmc_chr_source);
28532853         break;
28542854      case 8:
2855         prg16_89ab(space->machine(), data);
2855         prg16_89ab(space.machine(), data);
28562856         break;
28572857      case 9:
28582858         switch (data & 0x03)
28592859         {
2860         case 0: set_nt_mirroring(space->machine(), PPU_MIRROR_VERT); break;
2861         case 1: set_nt_mirroring(space->machine(), PPU_MIRROR_HORZ); break;
2862         case 2: set_nt_mirroring(space->machine(), PPU_MIRROR_LOW); break;
2863         case 3: set_nt_mirroring(space->machine(), PPU_MIRROR_HIGH); break;
2860         case 0: set_nt_mirroring(space.machine(), PPU_MIRROR_VERT); break;
2861         case 1: set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); break;
2862         case 2: set_nt_mirroring(space.machine(), PPU_MIRROR_LOW); break;
2863         case 3: set_nt_mirroring(space.machine(), PPU_MIRROR_HIGH); break;
28642864         }
28652865         break;
28662866      case 0x0a:
r17963r17964
28802880
28812881static WRITE8_HANDLER( lz93d50_m_w )
28822882{
2883   nes_state *state = space->machine().driver_data<nes_state>();
2883   nes_state *state = space.machine().driver_data<nes_state>();
28842884   LOG_MMC(("lz93d50_m_w, offset: %04x, data: %02x\n", offset, data));
28852885
28862886   if (!state->m_battery && !state->m_wram)
r17963r17964
29062906
29072907static WRITE8_HANDLER( fjump2_w )
29082908{
2909   nes_state *state = space->machine().driver_data<nes_state>();
2909   nes_state *state = space.machine().driver_data<nes_state>();
29102910   LOG_MMC(("fjump2_w, offset: %04x, data: %02x\n", offset, data));
29112911
29122912   switch (offset & 0x000f)
r17963r17964
29142914      case 0: case 1: case 2: case 3:
29152915      case 4: case 5: case 6: case 7:
29162916         state->m_mmc_reg[offset & 0x000f] = data;
2917         fjump2_set_prg(space->machine());
2917         fjump2_set_prg(space.machine());
29182918         break;
29192919      case 8:
29202920         state->m_mmc_latch1 = (data & 0x0f);
2921         fjump2_set_prg(space->machine());
2921         fjump2_set_prg(space.machine());
29222922         break;
29232923      default:
29242924         lz93d50_m_w(space, offset & 0x0f, data);
r17963r17964
29422942{
29432943   LOG_MMC(("bandai_ks_w, offset: %04x, data: %02x\n", offset, data));
29442944
2945   prg16_89ab(space->machine(), data ^ 0x08);
2945   prg16_89ab(space.machine(), data ^ 0x08);
29462946}
29472947
29482948/*************************************************************
r17963r17964
29602960
29612961static WRITE8_HANDLER( bandai_ok_w )
29622962{
2963   nes_state *state = space->machine().driver_data<nes_state>();
2963   nes_state *state = space.machine().driver_data<nes_state>();
29642964   UINT8 mmc_helper;
29652965   LOG_MMC(("mapper96_w, offset: %04x, data: %02x\n", offset, data));
29662966
2967   prg32(space->machine(), data);
2967   prg32(space.machine(), data);
29682968
29692969   state->m_mmc_latch1 = data;
29702970   mmc_helper = (state->m_mmc_latch1 & 0x03) | (data & 0x04);
2971   chr4_0(space->machine(), mmc_helper, CHRRAM);
2972   chr4_4(space->machine(), 0x03 | (data & 0x04), CHRRAM);
2971   chr4_0(space.machine(), mmc_helper, CHRRAM);
2972   chr4_4(space.machine(), 0x03 | (data & 0x04), CHRRAM);
29732973}
29742974
29752975/*************************************************************
r17963r17964
29862986{
29872987   LOG_MMC(("lrog017_w, offset: %04x, data: %02x\n", offset, data));
29882988
2989   prg32(space->machine(), data);
2990   chr2_0(space->machine(), (data >> 4), CHRROM);
2989   prg32(space.machine(), data);
2990   chr2_0(space.machine(), (data >> 4), CHRROM);
29912991}
29922992
29932993/*************************************************************
r17963r17964
30023002{
30033003   LOG_MMC(("irem_hd_w, offset: %04x, data: %02x\n", offset, data));
30043004
3005   set_nt_mirroring(space->machine(), BIT(data, 3) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ);
3006   chr8(space->machine(), data >> 4, CHRROM);
3007   prg16_89ab(space->machine(), data);
3005   set_nt_mirroring(space.machine(), BIT(data, 3) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ);
3006   chr8(space.machine(), data >> 4, CHRROM);
3007   prg16_89ab(space.machine(), data);
30083008}
30093009
30103010/*************************************************************
r17963r17964
30253025
30263026   if (offset < 0x4000)
30273027   {
3028      set_nt_mirroring(space->machine(), BIT(data, 7) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ);
3029      prg16_cdef(space->machine(), data);
3028      set_nt_mirroring(space.machine(), BIT(data, 7) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ);
3029      prg16_cdef(space.machine(), data);
30303030   }
30313031}
30323032
r17963r17964
30423042
30433043static WRITE8_HANDLER( g101_w )
30443044{
3045   nes_state *state = space->machine().driver_data<nes_state>();
3045   nes_state *state = space.machine().driver_data<nes_state>();
30463046   LOG_MMC(("g101_w, offset: %04x, data: %02x\n", offset, data));
30473047
30483048   switch (offset & 0x7000)
30493049   {
30503050      case 0x0000:
30513051         // NEStopia here differs a little bit
3052         state->m_mmc_latch1 ? prg8_cd(space->machine(), data) : prg8_89(space->machine(), data);
3052         state->m_mmc_latch1 ? prg8_cd(space.machine(), data) : prg8_89(space.machine(), data);
30533053         break;
30543054      case 0x1000:
30553055         state->m_mmc_latch1 = BIT(data, 1);
30563056         if (!state->m_hard_mirroring)   // there are two 'variants' depending on hardwired or mapper ctrl mirroring
3057            set_nt_mirroring(space->machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
3057            set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
30583058         break;
30593059      case 0x2000:
3060         prg8_ab(space->machine(), data);
3060         prg8_ab(space.machine(), data);
30613061         break;
30623062      case 0x3000:
3063         chr1_x(space->machine(), offset & 0x07, data, CHRROM);
3063         chr1_x(space.machine(), offset & 0x07, data, CHRROM);
30643064         break;
30653065   }
30663066}
r17963r17964
30983098
30993099static WRITE8_HANDLER( h3001_w )
31003100{
3101   nes_state *state = space->machine().driver_data<nes_state>();
3101   nes_state *state = space.machine().driver_data<nes_state>();
31023102   LOG_MMC(("h3001_w, offset %04x, data: %02x\n", offset, data));
31033103
31043104   switch (offset & 0x7fff)
31053105   {
31063106      case 0x0000:
3107         prg8_89(space->machine(), data);
3107         prg8_89(space.machine(), data);
31083108         break;
31093109
31103110      case 0x1001:
3111         set_nt_mirroring(space->machine(), BIT(data, 7) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
3111         set_nt_mirroring(space.machine(), BIT(data, 7) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
31123112         break;
31133113
31143114      case 0x1003:
r17963r17964
31283128         break;
31293129
31303130      case 0x2000:
3131         prg8_ab(space->machine(), data);
3131         prg8_ab(space.machine(), data);
31323132         break;
31333133
31343134      case 0x3000: case 0x3001: case 0x3002: case 0x3003:
31353135      case 0x3004: case 0x3005: case 0x3006: case 0x3007:
3136         chr1_x(space->machine(), offset & 0x07, data, CHRROM);
3136         chr1_x(space.machine(), offset & 0x07, data, CHRROM);
31373137         break;
31383138
31393139      case 0x4000:
3140         prg8_cd(space->machine(), data);
3140         prg8_cd(space.machine(), data);
31413141         break;
31423142
31433143      default:
r17963r17964
32113211
32123212static WRITE8_HANDLER( ss88006_w )
32133213{
3214   nes_state *state = space->machine().driver_data<nes_state>();
3214   nes_state *state = space.machine().driver_data<nes_state>();
32153215   UINT8 bank;
32163216   LOG_MMC(("mapper18_w, offset: %04x, data: %02x\n", offset, data));
32173217
r17963r17964
32193219   {
32203220      case 0x0000:
32213221         state->m_mmc_prg_bank[0] = (state->m_mmc_prg_bank[0] & 0xf0) | (data & 0x0f);
3222         prg8_89(space->machine(), state->m_mmc_prg_bank[0]);
3222         prg8_89(space.machine(), state->m_mmc_prg_bank[0]);
32233223         break;
32243224      case 0x0001:
32253225         state->m_mmc_prg_bank[0] = (state->m_mmc_prg_bank[0] & 0x0f) | (data << 4);
3226         prg8_89(space->machine(), state->m_mmc_prg_bank[0]);
3226         prg8_89(space.machine(), state->m_mmc_prg_bank[0]);
32273227         break;
32283228      case 0x0002:
32293229         state->m_mmc_prg_bank[1] = (state->m_mmc_prg_bank[1] & 0xf0) | (data & 0x0f);
3230         prg8_ab(space->machine(), state->m_mmc_prg_bank[1]);
3230         prg8_ab(space.machine(), state->m_mmc_prg_bank[1]);
32313231         break;
32323232      case 0x0003:
32333233         state->m_mmc_prg_bank[1] = (state->m_mmc_prg_bank[1] & 0x0f) | (data << 4);
3234         prg8_ab(space->machine(), state->m_mmc_prg_bank[1]);
3234         prg8_ab(space.machine(), state->m_mmc_prg_bank[1]);
32353235         break;
32363236      case 0x1000:
32373237         state->m_mmc_prg_bank[2] = (state->m_mmc_prg_bank[2] & 0xf0) | (data & 0x0f);
3238         prg8_cd(space->machine(), state->m_mmc_prg_bank[2]);
3238         prg8_cd(space.machine(), state->m_mmc_prg_bank[2]);
32393239         break;
32403240      case 0x1001:
32413241         state->m_mmc_prg_bank[2] = (state->m_mmc_prg_bank[2] & 0x0f) | (data << 4);
3242         prg8_cd(space->machine(), state->m_mmc_prg_bank[2]);
3242         prg8_cd(space.machine(), state->m_mmc_prg_bank[2]);
32433243         break;
32443244
32453245         /* $9002, 3 (1002, 3) uncaught = Jaleco Baseball writes 0 */
r17963r17964
32553255         else
32563256            state->m_mmc_vrom_bank[bank] = (state->m_mmc_vrom_bank[bank] & 0xf0) | (data & 0x0f);
32573257
3258         chr1_x(space->machine(), bank, state->m_mmc_vrom_bank[bank], CHRROM);
3258         chr1_x(space.machine(), bank, state->m_mmc_vrom_bank[bank], CHRROM);
32593259         break;
32603260
32613261      case 0x6000:
r17963r17964
32823282      case 0x7002:
32833283         switch (data & 0x03)
32843284         {
3285         case 0: set_nt_mirroring(space->machine(), PPU_MIRROR_HORZ); break;
3286         case 1: set_nt_mirroring(space->machine(), PPU_MIRROR_VERT); break;
3287         case 2: set_nt_mirroring(space->machine(), PPU_MIRROR_LOW); break;
3288         case 3: set_nt_mirroring(space->machine(), PPU_MIRROR_HIGH); break;
3285         case 0: set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); break;
3286         case 1: set_nt_mirroring(space.machine(), PPU_MIRROR_VERT); break;
3287         case 2: set_nt_mirroring(space.machine(), PPU_MIRROR_LOW); break;
3288         case 3: set_nt_mirroring(space.machine(), PPU_MIRROR_HIGH); break;
32893289         }
32903290         break;
32913291
r17963r17964
33103310static WRITE8_HANDLER( jf11_m_w )
33113311{
33123312   LOG_MMC(("jf11_m_w, offset: %04x, data: %02x\n", offset, data));
3313   chr8(space->machine(), data, CHRROM);
3314   prg32(space->machine(), data >> 4);
3313   chr8(space.machine(), data, CHRROM);
3314   prg32(space.machine(), data >> 4);
33153315}
33163316
33173317/*************************************************************
r17963r17964
33343334
33353335   if (offset == 0)
33363336   {
3337      prg32(space->machine(), (data >> 4) & 0x03);
3338      chr8(space->machine(), ((data >> 4) & 0x04) | (data & 0x03), CHRROM);
3337      prg32(space.machine(), (data >> 4) & 0x03);
3338      chr8(space.machine(), ((data >> 4) & 0x04) | (data & 0x03), CHRROM);
33393339   }
33403340
33413341   if (offset == 0x1000)
r17963r17964
33613361{
33623362   LOG_MMC(("jf16_w, offset: %04x, data: %02x\n", offset, data));
33633363
3364   set_nt_mirroring(space->machine(), BIT(data, 3) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW);
3365   chr8(space->machine(), data >> 4, CHRROM);
3366   prg16_89ab(space->machine(), data);
3364   set_nt_mirroring(space.machine(), BIT(data, 3) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW);
3365   chr8(space.machine(), data >> 4, CHRROM);
3366   prg16_89ab(space.machine(), data);
33673367}
33683368
33693369/*************************************************************
r17963r17964
33863386   LOG_MMC(("jf17_w, offset: %04x, data: %02x\n", offset, data));
33873387
33883388   if (BIT(data, 7))
3389      prg16_89ab(space->machine(), data & 0x0f);
3389      prg16_89ab(space.machine(), data & 0x0f);
33903390   if (BIT(data, 6))
3391      chr8(space->machine(), data & 0x0f, CHRROM);
3391      chr8(space.machine(), data & 0x0f, CHRROM);
33923392   if (BIT(data, 5) && !BIT(data,4))
33933393      LOG_MMC(("Jaleco JF-17 sound write, data: %02x\n", data & 0x1f));
33943394}
r17963r17964
34123412   LOG_MMC(("jf19_w, offset: %04x, data: %02x\n", offset, data));
34133413
34143414   if (BIT(data, 7))
3415      prg16_cdef(space->machine(), data & 0x0f);
3415      prg16_cdef(space.machine(), data & 0x0f);
34163416   if (BIT(data, 6))
3417      chr8(space->machine(), data & 0x0f, CHRROM);
3417      chr8(space.machine(), data & 0x0f, CHRROM);
34183418   if (BIT(data, 5) && !BIT(data,4))
34193419      LOG_MMC(("Jaleco JF-19 sound write, data: %02x\n", data & 0x1f));
34203420}
r17963r17964
34333433
34343434static WRITE8_HANDLER( konami_vrc1_w )
34353435{
3436   nes_state *state = space->machine().driver_data<nes_state>();
3436   nes_state *state = space.machine().driver_data<nes_state>();
34373437   LOG_MMC(("konami_vrc1_w, offset: %04x, data: %02x\n", offset, data));
34383438
34393439   switch (offset & 0x7000)
34403440   {
34413441      case 0x0000:
3442         prg8_89(space->machine(), data);
3442         prg8_89(space.machine(), data);
34433443         break;
34443444      case 0x1000:
3445         set_nt_mirroring(space->machine(), (data & 0x01) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
3445         set_nt_mirroring(space.machine(), (data & 0x01) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
34463446         state->m_mmc_vrom_bank[0] = (state->m_mmc_vrom_bank[0] & 0x0f) | ((data & 0x02) << 3);
34473447         state->m_mmc_vrom_bank[1] = (state->m_mmc_vrom_bank[1] & 0x0f) | ((data & 0x04) << 2);
3448         chr4_0(space->machine(), state->m_mmc_vrom_bank[0], CHRROM);
3449         chr4_4(space->machine(), state->m_mmc_vrom_bank[1], CHRROM);
3448         chr4_0(space.machine(), state->m_mmc_vrom_bank[0], CHRROM);
3449         chr4_4(space.machine(), state->m_mmc_vrom_bank[1], CHRROM);
34503450         break;
34513451      case 0x2000:
3452         prg8_ab(space->machine(), data);
3452         prg8_ab(space.machine(), data);
34533453         break;
34543454      case 0x4000:
3455         prg8_cd(space->machine(), data);
3455         prg8_cd(space.machine(), data);
34563456         break;
34573457      case 0x6000:
34583458         state->m_mmc_vrom_bank[0] = (state->m_mmc_vrom_bank[0] & 0x10) | (data & 0x0f);
3459         chr4_0(space->machine(), state->m_mmc_vrom_bank[0], CHRROM);
3459         chr4_0(space.machine(), state->m_mmc_vrom_bank[0], CHRROM);
34603460         break;
34613461      case 0x7000:
34623462         state->m_mmc_vrom_bank[1] = (state->m_mmc_vrom_bank[1] & 0x10) | (data & 0x0f);
3463         chr4_4(space->machine(), state->m_mmc_vrom_bank[1], CHRROM);
3463         chr4_4(space.machine(), state->m_mmc_vrom_bank[1], CHRROM);
34643464         break;
34653465   }
34663466}
r17963r17964
34753475
34763476static WRITE8_HANDLER( konami_vrc2_w )
34773477{
3478   nes_state *state = space->machine().driver_data<nes_state>();
3478   nes_state *state = space.machine().driver_data<nes_state>();
34793479   UINT8 bank, shift, mask;
34803480   UINT32 shifted_offs = (offset & 0x7000)
34813481                  | ((offset << (9 - state->m_vrc_ls_prg_a)) & 0x200)
r17963r17964
34833483   LOG_MMC(("konami_vrc2_w, offset: %04x, data: %02x\n", offset, data));
34843484
34853485   if (offset < 0x1000)
3486      prg8_89(space->machine(), data);
3486      prg8_89(space.machine(), data);
34873487   else if (offset < 0x2000)
34883488   {
34893489      switch (data & 0x03)
34903490      {
3491         case 0x00: set_nt_mirroring(space->machine(), PPU_MIRROR_VERT); break;
3492         case 0x01: set_nt_mirroring(space->machine(), PPU_MIRROR_HORZ); break;
3493         case 0x02: set_nt_mirroring(space->machine(), PPU_MIRROR_LOW); break;
3494         case 0x03: set_nt_mirroring(space->machine(), PPU_MIRROR_HIGH); break;
3491         case 0x00: set_nt_mirroring(space.machine(), PPU_MIRROR_VERT); break;
3492         case 0x01: set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); break;
3493         case 0x02: set_nt_mirroring(space.machine(), PPU_MIRROR_LOW); break;
3494         case 0x03: set_nt_mirroring(space.machine(), PPU_MIRROR_HIGH); break;
34953495      }
34963496   }
34973497   else if (offset < 0x3000)
3498      prg8_ab(space->machine(), data);
3498      prg8_ab(space.machine(), data);
34993499   else if (offset < 0x7000)
35003500   {
35013501      bank = ((shifted_offs & 0x7000) - 0x3000) / 0x0800 + BIT(shifted_offs, 9);
r17963r17964
35033503      mask = (0xf0 >> shift);
35043504      state->m_mmc_vrom_bank[bank] = (state->m_mmc_vrom_bank[bank] & mask)
35053505                           | (((data >> state->m_vrc_ls_chr) & 0x0f) << shift);
3506      chr1_x(space->machine(), bank, state->m_mmc_vrom_bank[bank], CHRROM);
3506      chr1_x(space.machine(), bank, state->m_mmc_vrom_bank[bank], CHRROM);
35073507   }
35083508   else
35093509      logerror("konami_vrc2_w uncaught write, addr: %04x value: %02x\n", offset + 0x8000, data);
r17963r17964
35243524static WRITE8_HANDLER( konami_vrc3_w )
35253525{
35263526   LOG_MMC(("konami_vrc3_w, offset: %04x, data: %02x\n", offset, data));
3527   nes_state *state = space->machine().driver_data<nes_state>();
3527   nes_state *state = space.machine().driver_data<nes_state>();
35283528
35293529   switch (offset & 0x7000)
35303530   {
r17963r17964
35463546         state->m_IRQ_count |= (data & 0x0f) << 4;
35473547         break;
35483548      case 0x7000:
3549         prg16_89ab(space->machine(), data);
3549         prg16_89ab(space.machine(), data);
35503550         break;
35513551      default:
35523552         logerror("konami_vrc3_w uncaught write, offset %04x, data: %02x\n", offset, data);
r17963r17964
35913591
35923592static WRITE8_HANDLER( konami_vrc4_w )
35933593{
3594   nes_state *state = space->machine().driver_data<nes_state>();
3594   nes_state *state = space.machine().driver_data<nes_state>();
35953595   UINT8 bank, shift, mask;
35963596   UINT32 shifted_offs = (offset & 0x7000)
35973597                  | ((offset << (9 - state->m_vrc_ls_prg_a)) & 0x200)
r17963r17964
36013601   if (offset < 0x1000)
36023602   {
36033603      state->m_mmc_prg_bank[0] = data;
3604      vrc4_set_prg(space->machine());
3604      vrc4_set_prg(space.machine());
36053605   }
36063606   else if (offset >= 0x2000 && offset < 0x3000)
3607      prg8_ab(space->machine(), data);
3607      prg8_ab(space.machine(), data);
36083608   else
36093609   {
36103610      switch (shifted_offs & 0x7300)
r17963r17964
36133613         case 0x1100:
36143614            switch (data & 0x03)
36153615            {
3616            case 0x00: set_nt_mirroring(space->machine(), PPU_MIRROR_VERT); break;
3617            case 0x01: set_nt_mirroring(space->machine(), PPU_MIRROR_HORZ); break;
3618            case 0x02: set_nt_mirroring(space->machine(), PPU_MIRROR_LOW); break;
3619            case 0x03: set_nt_mirroring(space->machine(), PPU_MIRROR_HIGH); break;
3616            case 0x00: set_nt_mirroring(space.machine(), PPU_MIRROR_VERT); break;
3617            case 0x01: set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); break;
3618            case 0x02: set_nt_mirroring(space.machine(), PPU_MIRROR_LOW); break;
3619            case 0x03: set_nt_mirroring(space.machine(), PPU_MIRROR_HIGH); break;
36203620            }
36213621            break;
36223622         case 0x1200:
36233623         case 0x1300:
36243624            state->m_mmc_latch1 = data & 0x02;
3625            vrc4_set_prg(space->machine());
3625            vrc4_set_prg(space.machine());
36263626            break;
36273627         case 0x3000:
36283628         case 0x3100:
r17963r17964
36443644            shift = BIT(shifted_offs, 8) * 4;
36453645            mask = (0xf0 >> shift);
36463646            state->m_mmc_vrom_bank[bank] = (state->m_mmc_vrom_bank[bank] & mask) | ((data & 0x0f) << shift);
3647            chr1_x(space->machine(), bank, state->m_mmc_vrom_bank[bank], CHRROM);
3647            chr1_x(space.machine(), bank, state->m_mmc_vrom_bank[bank], CHRROM);
36483648            break;
36493649         case 0x7000:
36503650            state->m_IRQ_count_latch = (state->m_IRQ_count_latch & 0xf0) | (data & 0x0f);
r17963r17964
36803680
36813681static WRITE8_HANDLER( konami_vrc6_w )
36823682{
3683   nes_state *state = space->machine().driver_data<nes_state>();
3683   nes_state *state = space.machine().driver_data<nes_state>();
36843684   UINT8 bank;
36853685   UINT32 shifted_offs = (offset & 0x7000)
36863686                  | ((offset << (9 - state->m_vrc_ls_prg_a)) & 0x200)
r17963r17964
36883688   LOG_MMC(("konami_vrc6_w, offset: %04x, data: %02x\n", offset, data));
36893689
36903690   if (offset < 0x1000)
3691      prg16_89ab(space->machine(), data);
3691      prg16_89ab(space.machine(), data);
36923692   else if (offset >= 0x4000 && offset < 0x5000)
3693      prg8_cd(space->machine(), data);
3693      prg8_cd(space.machine(), data);
36943694   else
36953695   {
36963696      switch (shifted_offs & 0x7300)
r17963r17964
37093709         case 0x3300:
37103710            switch (data & 0x0c)
37113711            {
3712            case 0x00: set_nt_mirroring(space->machine(), PPU_MIRROR_VERT); break;
3713            case 0x04: set_nt_mirroring(space->machine(), PPU_MIRROR_HORZ); break;
3714            case 0x08: set_nt_mirroring(space->machine(), PPU_MIRROR_LOW); break;
3715            case 0x0c: set_nt_mirroring(space->machine(), PPU_MIRROR_HIGH); break;
3712            case 0x00: set_nt_mirroring(space.machine(), PPU_MIRROR_VERT); break;
3713            case 0x04: set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); break;
3714            case 0x08: set_nt_mirroring(space.machine(), PPU_MIRROR_LOW); break;
3715            case 0x0c: set_nt_mirroring(space.machine(), PPU_MIRROR_HIGH); break;
37163716            }
37173717            break;
37183718         case 0x5000:
r17963r17964
37243724         case 0x6200:
37253725         case 0x6300:
37263726            bank = ((shifted_offs & 0x7000) - 0x5000) / 0x0400 + ((shifted_offs & 0x0300) >> 8);
3727            chr1_x(space->machine(), bank, data, CHRROM);
3727            chr1_x(space.machine(), bank, data, CHRROM);
37283728            break;
37293729         case 0x7000:
37303730            state->m_IRQ_count_latch = data;
r17963r17964
37603760
37613761static WRITE8_HANDLER( konami_vrc7_w )
37623762{
3763   nes_state *state = space->machine().driver_data<nes_state>();
3763   nes_state *state = space.machine().driver_data<nes_state>();
37643764   UINT8 bank;
37653765   LOG_MMC(("konami_vrc7_w, offset: %04x, data: %02x\n", offset, data));
37663766
37673767   switch (offset & 0x7018)
37683768   {
37693769      case 0x0000:
3770         prg8_89(space->machine(), data);
3770         prg8_89(space.machine(), data);
37713771         break;
37723772      case 0x0008:
37733773      case 0x0010:
37743774      case 0x0018:
3775         prg8_ab(space->machine(), data);
3775         prg8_ab(space.machine(), data);
37763776         break;
37773777
37783778      case 0x1000:
3779         prg8_cd(space->machine(), data);
3779         prg8_cd(space.machine(), data);
37803780         break;
37813781
37823782         /* TODO: there are sound regs in here */
r17963r17964
37983798      case 0x5010:
37993799      case 0x5018:
38003800         bank = ((offset & 0x7000) - 0x2000) / 0x0800 + ((offset & 0x0018) ? 1 : 0);
3801         chr1_x(space->machine(), bank, data, state->m_mmc_chr_source);
3801         chr1_x(space.machine(), bank, data, state->m_mmc_chr_source);
38023802         break;
38033803
38043804      case 0x6000:
38053805         switch (data & 0x03)
38063806         {
3807         case 0x00: set_nt_mirroring(space->machine(), PPU_MIRROR_VERT); break;
3808         case 0x01: set_nt_mirroring(space->machine(), PPU_MIRROR_HORZ); break;
3809         case 0x02: set_nt_mirroring(space->machine(), PPU_MIRROR_LOW); break;
3810         case 0x03: set_nt_mirroring(space->machine(), PPU_MIRROR_HIGH); break;
3807         case 0x00: set_nt_mirroring(space.machine(), PPU_MIRROR_VERT); break;
3808         case 0x01: set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); break;
3809         case 0x02: set_nt_mirroring(space.machine(), PPU_MIRROR_LOW); break;
3810         case 0x03: set_nt_mirroring(space.machine(), PPU_MIRROR_HIGH); break;
38113811         }
38123812         break;
38133813      case 0x6008: case 0x6010: case 0x6018:
r17963r17964
38643864
38653865static WRITE8_HANDLER( namcot163_l_w )
38663866{
3867   nes_state *state = space->machine().driver_data<nes_state>();
3867   nes_state *state = space.machine().driver_data<nes_state>();
38683868   LOG_MMC(("namcot163_l_w, offset: %04x, data: %02x\n", offset, data));
38693869   offset += 0x100;
38703870
r17963r17964
38853885
38863886static READ8_HANDLER( namcot163_l_r )
38873887{
3888   nes_state *state = space->machine().driver_data<nes_state>();
3888   nes_state *state = space.machine().driver_data<nes_state>();
38893889   LOG_MMC(("namcot163_l_r, offset: %04x\n", offset));
38903890   offset += 0x100;
38913891
r17963r17964
39123912
39133913static WRITE8_HANDLER( namcot163_w )
39143914{
3915   nes_state *state = space->machine().driver_data<nes_state>();
3915   nes_state *state = space.machine().driver_data<nes_state>();
39163916   LOG_MMC(("namcot163_w, offset: %04x, data: %02x\n", offset, data));
39173917   switch (offset & 0x7800)
39183918   {
r17963r17964
39203920      case 0x1000: case 0x1800:
39213921      case 0x2000: case 0x2800:
39223922      case 0x3000: case 0x3800:
3923         chr1_x(space->machine(), offset / 0x800, data, CHRROM);
3923         chr1_x(space.machine(), offset / 0x800, data, CHRROM);
39243924         break;
39253925      case 0x4000:
3926         namcot163_set_mirror(space->machine(), 0, data);
3926         namcot163_set_mirror(space.machine(), 0, data);
39273927         break;
39283928      case 0x4800:
3929         namcot163_set_mirror(space->machine(), 1, data);
3929         namcot163_set_mirror(space.machine(), 1, data);
39303930         break;
39313931      case 0x5000:
3932         namcot163_set_mirror(space->machine(), 2, data);
3932         namcot163_set_mirror(space.machine(), 2, data);
39333933         break;
39343934      case 0x5800:
3935         namcot163_set_mirror(space->machine(), 3, data);
3935         namcot163_set_mirror(space.machine(), 3, data);
39363936         break;
39373937      case 0x6000:
3938         prg8_89(space->machine(), data & 0x3f);
3938         prg8_89(space.machine(), data & 0x3f);
39393939         break;
39403940      case 0x6800:
39413941         state->m_mmc_latch1 = data & 0xc0;      // this should enable High CHRRAM, but we still have to properly implement it!
3942         prg8_ab(space->machine(), data & 0x3f);
3942         prg8_ab(space.machine(), data & 0x3f);
39433943         break;
39443944      case 0x7000:
3945         prg8_cd(space->machine(), data & 0x3f);
3945         prg8_cd(space.machine(), data & 0x3f);
39463946         break;
39473947      case 0x7800:
39483948         LOG_MMC(("Namcot-163 sound address write, data: %02x\n", data));
r17963r17964
39643964
39653965static WRITE8_HANDLER( sunsoft1_m_w )
39663966{
3967   nes_state *state = space->machine().driver_data<nes_state>();
3967   nes_state *state = space.machine().driver_data<nes_state>();
39683968   LOG_MMC(("sunsoft1_m_w, offset: %04x, data: %02x\n", offset, data));
39693969
39703970   if (state->m_chr_chunks)
39713971   {
3972      chr4_0(space->machine(), data & 0x0f, CHRROM);
3973      chr4_4(space->machine(), data >> 4, CHRROM);
3972      chr4_0(space.machine(), data & 0x0f, CHRROM);
3973      chr4_4(space.machine(), data >> 4, CHRROM);
39743974   }
39753975   else
3976      prg16_89ab(space->machine(), data & 0x0f);
3976      prg16_89ab(space.machine(), data & 0x0f);
39773977}
39783978
39793979/*************************************************************
r17963r17964
39893989
39903990static WRITE8_HANDLER( sunsoft2_w )
39913991{
3992   nes_state *state = space->machine().driver_data<nes_state>();
3992   nes_state *state = space.machine().driver_data<nes_state>();
39933993   UINT8 sunsoft_helper = (data & 0x07) | ((data & 0x80) ? 0x08 : 0x00);
39943994   LOG_MMC(("sunsoft2_w, offset: %04x, data: %02x\n", offset, data));
39953995
39963996   if (!state->m_hard_mirroring)   // there are two 'variants' depending on hardwired or mapper ctrl mirroring
3997      set_nt_mirroring(space->machine(), BIT(data, 3) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW);
3997      set_nt_mirroring(space.machine(), BIT(data, 3) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW);
39983998   if (state->m_chr_chunks)
3999      chr8(space->machine(), sunsoft_helper, CHRROM);
3999      chr8(space.machine(), sunsoft_helper, CHRROM);
40004000
4001   prg16_89ab(space->machine(), data >> 4);
4001   prg16_89ab(space.machine(), data >> 4);
40024002}
40034003
40044004/*************************************************************
r17963r17964
40364036
40374037static WRITE8_HANDLER( sunsoft3_w )
40384038{
4039   nes_state *state = space->machine().driver_data<nes_state>();
4039   nes_state *state = space.machine().driver_data<nes_state>();
40404040   LOG_MMC(("sunsoft3_w, offset %04x, data: %02x\n", offset, data));
40414041
40424042   switch (offset & 0x7800)
40434043   {
40444044      case 0x0800:
4045         chr2_0(space->machine(), data, CHRROM);
4045         chr2_0(space.machine(), data, CHRROM);
40464046         break;
40474047      case 0x1800:
4048         chr2_2(space->machine(), data, CHRROM);
4048         chr2_2(space.machine(), data, CHRROM);
40494049         break;
40504050      case 0x2800:
4051         chr2_4(space->machine(), data, CHRROM);
4051         chr2_4(space.machine(), data, CHRROM);
40524052         break;
40534053      case 0x3800:
4054         chr2_6(space->machine(), data, CHRROM);
4054         chr2_6(space.machine(), data, CHRROM);
40554055         break;
40564056      case 0x4000:
40574057      case 0x4800:
r17963r17964
40684068      case 0x6800:
40694069         switch (data & 3)
40704070         {
4071         case 0x00: set_nt_mirroring(space->machine(), PPU_MIRROR_VERT); break;
4072         case 0x01: set_nt_mirroring(space->machine(), PPU_MIRROR_HORZ); break;
4073         case 0x02: set_nt_mirroring(space->machine(), PPU_MIRROR_LOW); break;
4074         case 0x03: set_nt_mirroring(space->machine(), PPU_MIRROR_HIGH); break;
4071         case 0x00: set_nt_mirroring(space.machine(), PPU_MIRROR_VERT); break;
4072         case 0x01: set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); break;
4073         case 0x02: set_nt_mirroring(space.machine(), PPU_MIRROR_LOW); break;
4074         case 0x03: set_nt_mirroring(space.machine(), PPU_MIRROR_HIGH); break;
40754075         }
40764076         break;
40774077      case 0x7800:
4078         prg16_89ab(space->machine(), data);
4078         prg16_89ab(space.machine(), data);
40794079         break;
40804080      default:
40814081         LOG_MMC(("sunsoft3_w uncaught write, offset: %04x, data: %02x\n", offset, data));
r17963r17964
41044104   switch (offset & 0x7003)
41054105   {
41064106      case 0x0000:
4107         set_nt_mirroring(space->machine(), BIT(data, 6) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
4108         prg8_89(space->machine(), data);
4107         set_nt_mirroring(space.machine(), BIT(data, 6) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
4108         prg8_89(space.machine(), data);
41094109         break;
41104110      case 0x0001:
4111         prg8_ab(space->machine(), data);
4111         prg8_ab(space.machine(), data);
41124112         break;
41134113      case 0x0002:
4114         chr2_0(space->machine(), data, CHRROM);
4114         chr2_0(space.machine(), data, CHRROM);
41154115         break;
41164116      case 0x0003:
4117         chr2_2(space->machine(), data, CHRROM);
4117         chr2_2(space.machine(), data, CHRROM);
41184118         break;
41194119      case 0x2000:
4120         chr1_4(space->machine(), data, CHRROM);
4120         chr1_4(space.machine(), data, CHRROM);
41214121         break;
41224122      case 0x2001:
4123         chr1_5(space->machine(), data, CHRROM);
4123         chr1_5(space.machine(), data, CHRROM);
41244124         break;
41254125      case 0x2002:
4126         chr1_6(space->machine(), data, CHRROM);
4126         chr1_6(space.machine(), data, CHRROM);
41274127         break;
41284128      case 0x2003:
4129         chr1_7(space->machine(), data, CHRROM);
4129         chr1_7(space.machine(), data, CHRROM);
41304130         break;
41314131   }
41324132}
r17963r17964
41524152
41534153static WRITE8_HANDLER( tc0190fmc_p16_w )
41544154{
4155   nes_state *state = space->machine().driver_data<nes_state>();
4155   nes_state *state = space.machine().driver_data<nes_state>();
41564156   LOG_MMC(("tc0190fmc_p16_w, offset: %04x, data: %02x\n", offset, data));
41574157
41584158   switch (offset & 0x7003)
41594159   {
41604160      case 0x0000:
4161         prg8_89(space->machine(), data);
4161         prg8_89(space.machine(), data);
41624162         break;
41634163      case 0x0001:
41644164      case 0x0002:
r17963r17964
41824182         state->m_IRQ_enable = 0;
41834183         break;
41844184      case 0x6000:
4185         set_nt_mirroring(space->machine(), BIT(data, 6) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
4185         set_nt_mirroring(space.machine(), BIT(data, 6) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
41864186         break;
41874187   }
41884188}
r17963r17964
42034203
42044204static WRITE8_HANDLER( x1005_m_w )
42054205{
4206   nes_state *state = space->machine().driver_data<nes_state>();
4206   nes_state *state = space.machine().driver_data<nes_state>();
42074207   LOG_MMC(("x1005_m_w, offset: %04x, data: %02x\n", offset, data));
42084208
42094209   switch (offset)
42104210   {
42114211      case 0x1ef0:
4212         chr2_0(space->machine(), (data & 0x7f) >> 1, CHRROM);
4212         chr2_0(space.machine(), (data & 0x7f) >> 1, CHRROM);
42134213         break;
42144214      case 0x1ef1:
4215         chr2_2(space->machine(), (data & 0x7f) >> 1, CHRROM);
4215         chr2_2(space.machine(), (data & 0x7f) >> 1, CHRROM);
42164216         break;
42174217      case 0x1ef2:
4218         chr1_4(space->machine(), data, CHRROM);
4218         chr1_4(space.machine(), data, CHRROM);
42194219         break;
42204220      case 0x1ef3:
4221         chr1_5(space->machine(), data, CHRROM);
4221         chr1_5(space.machine(), data, CHRROM);
42224222         break;
42234223      case 0x1ef4:
4224         chr1_6(space->machine(), data, CHRROM);
4224         chr1_6(space.machine(), data, CHRROM);
42254225         break;
42264226      case 0x1ef5:
4227         chr1_7(space->machine(), data, CHRROM);
4227         chr1_7(space.machine(), data, CHRROM);
42284228         break;
42294229      case 0x1ef6:
42304230      case 0x1ef7:
4231         set_nt_mirroring(space->machine(), BIT(data, 0) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ);
4231         set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ);
42324232         break;
42334233      case 0x1ef8:
42344234      case 0x1ef9:
r17963r17964
42364236         break;
42374237      case 0x1efa:
42384238      case 0x1efb:
4239         prg8_89(space->machine(), data);
4239         prg8_89(space.machine(), data);
42404240         break;
42414241      case 0x1efc:
42424242      case 0x1efd:
4243         prg8_ab(space->machine(), data);
4243         prg8_ab(space.machine(), data);
42444244         break;
42454245      case 0x1efe:
42464246      case 0x1eff:
4247         prg8_cd(space->machine(), data);
4247         prg8_cd(space.machine(), data);
42484248         break;
42494249      default:
42504250         logerror("mapper80_m_w uncaught addr: %04x, value: %02x\n", offset + 0x6000, data);
r17963r17964
42594259
42604260static READ8_HANDLER( x1005_m_r )
42614261{
4262   nes_state *state = space->machine().driver_data<nes_state>();
4262   nes_state *state = space.machine().driver_data<nes_state>();
42634263   LOG_MMC(("x1005a_m_r, offset: %04x\n", offset));
42644264
42654265   if (offset >= 0x1f00 && state->m_mapper_ram != NULL && state->m_mmc_latch1 == 0xa3)
r17963r17964
42814281   switch (offset)
42824282   {
42834283      case 0x1ef0:
4284         set_nt_page(space->machine(), 0, CIRAM, (data & 0x80) ? 1 : 0, 1);
4285         set_nt_page(space->machine(), 1, CIRAM, (data & 0x80) ? 1 : 0, 1);
4284         set_nt_page(space.machine(), 0, CIRAM, (data & 0x80) ? 1 : 0, 1);
4285         set_nt_page(space.machine(), 1, CIRAM, (data & 0x80) ? 1 : 0, 1);
42864286         break;
42874287      case 0x1ef1:
4288         set_nt_page(space->machine(), 2, CIRAM, (data & 0x80) ? 1 : 0, 1);
4289         set_nt_page(space->machine(), 3, CIRAM, (data & 0x80) ? 1 : 0, 1);
4288         set_nt_page(space.machine(), 2, CIRAM, (data & 0x80) ? 1 : 0, 1);
4289         set_nt_page(space.machine(), 3, CIRAM, (data & 0x80) ? 1 : 0, 1);
42904290         break;
42914291   }
42924292
r17963r17964
43304330
43314331static WRITE8_HANDLER( x1017_m_w )
43324332{
4333   nes_state *state = space->machine().driver_data<nes_state>();
4333   nes_state *state = space.machine().driver_data<nes_state>();
43344334   UINT8 reg = offset & 0x07;
43354335   LOG_MMC(("x1017_m_w, offset: %04x, data: %02x\n", offset, data));
43364336
r17963r17964
43414341         if (state->m_mmc_vrom_bank[reg] != data)
43424342         {
43434343            state->m_mmc_vrom_bank[reg] = data;
4344            x1017_set_chr(space->machine());
4344            x1017_set_chr(space.machine());
43454345         }
43464346         break;
43474347      case 0x1ef2:
r17963r17964
43514351         if (state->m_mmc_vrom_bank[reg] != data)
43524352         {
43534353            state->m_mmc_vrom_bank[reg] = data;
4354            x1017_set_chr(space->machine());
4354            x1017_set_chr(space.machine());
43554355         }
43564356         break;
43574357      case 0x1ef6:
4358         set_nt_mirroring(space->machine(), BIT(data, 0) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ);
4358         set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ);
43594359         state->m_mmc_latch1 = ((data & 0x02) << 1);
4360         x1017_set_chr(space->machine());
4360         x1017_set_chr(space.machine());
43614361         break;
43624362      case 0x1ef7:
43634363      case 0x1ef8:
r17963r17964
43654365         state->m_mmc_reg[(offset & 0x0f) - 7] = data;
43664366         break;
43674367      case 0x1efa:
4368         prg8_89(space->machine(), data >> 2);
4368         prg8_89(space.machine(), data >> 2);
43694369         break;
43704370      case 0x1efb:
4371         prg8_ab(space->machine(), data >> 2);
4371         prg8_ab(space.machine(), data >> 2);
43724372         break;
43734373      case 0x1efc:
4374         prg8_cd(space->machine(), data >> 2);
4374         prg8_cd(space.machine(), data >> 2);
43754375         break;
43764376      default:
43774377         logerror("x1017_m_w uncaught write, addr: %04x, value: %02x\n", offset + 0x6000, data);
r17963r17964
43814381
43824382static READ8_HANDLER( x1017_m_r )
43834383{
4384   nes_state *state = space->machine().driver_data<nes_state>();
4384   nes_state *state = space.machine().driver_data<nes_state>();
43854385   LOG_MMC(("x1017_m_r, offset: %04x\n", offset));
43864386
43874387   // 2+2+1 KB of Internal RAM can be independently enabled/disabled!
r17963r17964
44184418   LOG_MMC(("agci_50282_w, offset: %04x, data: %02x\n", offset, data));
44194419
44204420   offset += 0x8000;
4421   data |= (space->read_byte(offset) & 1);
4421   data |= (space.read_byte(offset) & 1);
44224422
4423   chr8(space->machine(), data >> 4, CHRROM);
4424   prg32(space->machine(), data);
4423   chr8(space.machine(), data >> 4, CHRROM);
4424   prg32(space.machine(), data);
44254425}
44264426
44274427/*************************************************************
r17963r17964
44394439   switch (offset)
44404440   {
44414441      case 0x1ffd:
4442         prg32(space->machine(), data);
4442         prg32(space.machine(), data);
44434443         break;
44444444      case 0x1ffe:
4445         chr4_0(space->machine(), data, CHRROM);
4445         chr4_0(space.machine(), data, CHRROM);
44464446         break;
44474447      case 0x1fff:
4448         chr4_4(space->machine(), data, CHRROM);
4448         chr4_4(space.machine(), data, CHRROM);
44494449         break;
44504450   }
44514451}
r17963r17964
44694469
44704470   if (!(offset & 0x0100))
44714471   {
4472      prg32(space->machine(), data >> 3);
4473      chr8(space->machine(), data, CHRROM);
4472      prg32(space.machine(), data >> 3);
4473      chr8(space.machine(), data, CHRROM);
44744474   }
44754475}
44764476
r17963r17964
44884488   UINT8 pmode;
44894489   LOG_MMC(("ae_act52_w, offset: %04x, data: %02x\n", offset, data));
44904490
4491   set_nt_mirroring(space->machine(), BIT(offset, 13) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
4491   set_nt_mirroring(space.machine(), BIT(offset, 13) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
44924492
44934493   cbank = (data & 0x03) | ((offset & 0x0f) << 2);
4494   chr8(space->machine(), cbank, CHRROM);
4494   chr8(space.machine(), cbank, CHRROM);
44954495
44964496   pmode = offset & 0x20;
44974497   pbank = (offset & 0x1fc0) >> 6;
44984498   if (pmode)
44994499   {
4500      prg16_89ab(space->machine(), pbank);
4501      prg16_cdef(space->machine(), pbank);
4500      prg16_89ab(space.machine(), pbank);
4501      prg16_cdef(space.machine(), pbank);
45024502   }
45034503   else
4504      prg32(space->machine(), pbank >> 1);
4504      prg32(space.machine(), pbank >> 1);
45054505}
45064506
45074507
r17963r17964
45284528      return;
45294529   if (offset < 0x00a5)
45304530   {
4531      prg32(space->machine(), (offset - 0x0065) & 0x03);
4531      prg32(space.machine(), (offset - 0x0065) & 0x03);
45324532      return;
45334533   }
45344534   if (offset < 0x00e5)
45354535   {
4536      chr8(space->machine(), (offset - 0x00a5) & 0x07, CHRROM);
4536      chr8(space.machine(), (offset - 0x00a5) & 0x07, CHRROM);
45374537   }
45384538}
45394539
r17963r17964
45564556
45574557static WRITE8_HANDLER( cne_fsb_m_w )
45584558{
4559   nes_state *state = space->machine().driver_data<nes_state>();
4559   nes_state *state = space.machine().driver_data<nes_state>();
45604560   LOG_MMC(("cne_fsb_m_w, offset: %04x, data: %02x\n", offset, data));
45614561
45624562   if (offset < 0x0800)
r17963r17964
45644564      switch (offset & 0x0007)
45654565      {
45664566         case 0x0000:
4567            prg8_89(space->machine(), data);
4567            prg8_89(space.machine(), data);
45684568            break;
45694569         case 0x0001:
4570            prg8_ab(space->machine(), data);
4570            prg8_ab(space.machine(), data);
45714571            break;
45724572         case 0x0002:
4573            prg8_cd(space->machine(), data);
4573            prg8_cd(space.machine(), data);
45744574            break;
45754575         case 0x0003:
4576            prg8_ef(space->machine(), data);
4576            prg8_ef(space.machine(), data);
45774577            break;
45784578         case 0x0004:
4579            chr2_0(space->machine(), data, CHRROM);
4579            chr2_0(space.machine(), data, CHRROM);
45804580            break;
45814581         case 0x0005:
4582            chr2_2(space->machine(), data, CHRROM);
4582            chr2_2(space.machine(), data, CHRROM);
45834583            break;
45844584         case 0x0006:
4585            chr2_4(space->machine(), data, CHRROM);
4585            chr2_4(space.machine(), data, CHRROM);
45864586            break;
45874587         case 0x0007:
4588            chr2_6(space->machine(), data, CHRROM);
4588            chr2_6(space.machine(), data, CHRROM);
45894589            break;
45904590      }
45914591   }
r17963r17964
46144614{
46154615   LOG_MMC(("cne_shlz_l_w, offset: %04x, data: %02x\n", offset, data));
46164616
4617   prg32(space->machine(), data >> 4);
4618   chr8(space->machine(), data & 0x0f, CHRROM);
4617   prg32(space.machine(), data >> 4);
4618   chr8(space.machine(), data & 0x0f, CHRROM);
46194619}
46204620
46214621/*************************************************************
r17963r17964
46324632
46334633static WRITE8_HANDLER( caltron6in1_m_w )
46344634{
4635   nes_state *state = space->machine().driver_data<nes_state>();
4635   nes_state *state = space.machine().driver_data<nes_state>();
46364636   LOG_MMC(("caltron6in1_m_w, offset: %04x, data: %02x\n", offset, data));
46374637
46384638   state->m_mmc_latch1 = offset & 0xff;
4639   set_nt_mirroring(space->machine(), BIT(data, 5) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
4640   prg32(space->machine(), offset & 0x07);
4639   set_nt_mirroring(space.machine(), BIT(data, 5) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
4640   prg32(space.machine(), offset & 0x07);
46414641}
46424642
46434643static WRITE8_HANDLER( caltron6in1_w )
46444644{
4645   nes_state *state = space->machine().driver_data<nes_state>();
4645   nes_state *state = space.machine().driver_data<nes_state>();
46464646   LOG_MMC(("caltron6in1_w, offset: %04x, data: %02x\n", offset, data));
46474647
46484648   if (state->m_mmc_latch1 & 0x04)
4649      chr8(space->machine(), ((state->m_mmc_latch1 & 0x18) >> 1) | (data & 0x03), CHRROM);
4649      chr8(space.machine(), ((state->m_mmc_latch1 & 0x18) >> 1) | (data & 0x03), CHRROM);
46504650}
46514651
46524652/*************************************************************
r17963r17964
46684668
46694669static WRITE8_HANDLER( bf9093_w )
46704670{
4671   nes_state *state = space->machine().driver_data<nes_state>();
4671   nes_state *state = space.machine().driver_data<nes_state>();
46724672   LOG_MMC(("bf9093_w, offset: %04x, data: %02x\n", offset, data));
46734673
46744674   switch (offset & 0x7000)
r17963r17964
46764676      case 0x0000:
46774677      case 0x1000:
46784678         if (!state->m_hard_mirroring)
4679            set_nt_mirroring(space->machine(), BIT(data, 4) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW);
4679            set_nt_mirroring(space.machine(), BIT(data, 4) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW);
46804680         break;
46814681      case 0x4000:
46824682      case 0x5000:
46834683      case 0x6000:
46844684      case 0x7000:
4685         prg16_89ab(space->machine(), data);
4685         prg16_89ab(space.machine(), data);
46864686         break;
46874687   }
46884688}
r17963r17964
47144714
47154715static WRITE8_HANDLER( bf9096_w )
47164716{
4717   nes_state *state = space->machine().driver_data<nes_state>();
4717   nes_state *state = space.machine().driver_data<nes_state>();
47184718   LOG_MMC(("bf9096_w, offset: %04x, data: %02x\n", offset, data));
47194719
47204720   if (offset < 0x2000)
r17963r17964
47224722   else
47234723      state->m_mmc_latch2 = data;
47244724
4725   bf9096_set_prg(space->machine());
4725   bf9096_set_prg(space.machine());
47264726}
47274727
47284728/*************************************************************
r17963r17964
47394739
47404740static WRITE8_HANDLER( golden5_w )
47414741{
4742   nes_state *state = space->machine().driver_data<nes_state>();
4742   nes_state *state = space.machine().driver_data<nes_state>();
47434743   LOG_MMC(("golden5_w, offset: %04x, data: %02x\n", offset, data));
47444744
47454745   if (offset < 0x4000)
r17963r17964
47474747      if (data & 0x08)
47484748      {
47494749         state->m_mmc_prg_bank[0] = ((data & 0x07) << 4) | (state->m_mmc_prg_bank[0] & 0x0f);
4750         prg16_89ab(space->machine(), state->m_mmc_prg_bank[0]);
4751         prg16_cdef(space->machine(), ((data & 0x07) << 4) | 0x0f);
4750         prg16_89ab(space.machine(), state->m_mmc_prg_bank[0]);
4751         prg16_cdef(space.machine(), ((data & 0x07) << 4) | 0x0f);
47524752      }
47534753
47544754   }
47554755   else
47564756   {
47574757      state->m_mmc_prg_bank[0] = (state->m_mmc_prg_bank[0] & 0x70) | (data & 0x0f);
4758      prg16_89ab(space->machine(), state->m_mmc_prg_bank[0]);
4758      prg16_89ab(space.machine(), state->m_mmc_prg_bank[0]);
47594759   }
47604760}
47614761
r17963r17964
47744774
47754775static WRITE8_HANDLER( cony_l_w )
47764776{
4777   nes_state *state = space->machine().driver_data<nes_state>();
4777   nes_state *state = space.machine().driver_data<nes_state>();
47784778   LOG_MMC(("cony_l_w, offset: %04x, data: %02x\n", offset, data));
47794779
47804780   if (offset >= 0x1000 && offset < 0x1103) // from 0x5100-0x51ff
r17963r17964
47834783
47844784static READ8_HANDLER( cony_l_r )
47854785{
4786   nes_state *state = space->machine().driver_data<nes_state>();
4786   nes_state *state = space.machine().driver_data<nes_state>();
47874787   LOG_MMC(("cony_l_r, offset: %04x\n", offset));
47884788
47894789   if (offset == 0x0f00)   // 0x5000
r17963r17964
48334833
48344834static WRITE8_HANDLER( cony_w )
48354835{
4836   nes_state *state = space->machine().driver_data<nes_state>();
4836   nes_state *state = space.machine().driver_data<nes_state>();
48374837   LOG_MMC(("cony_w, offset: %04x, data: %02x\n", offset, data));
48384838
48394839   switch (offset)
r17963r17964
48444844      case 0x30ff:
48454845      case 0x31ff:
48464846         state->m_mapper83_reg[8] = data;
4847         cony_set_prg(space->machine());
4848         cony_set_chr(space->machine());
4847         cony_set_prg(space.machine());
4848         cony_set_chr(space.machine());
48494849         break;
48504850      case 0x0100:
48514851         state->m_mmc_reg[0] = data & 0x80;
48524852         switch (data & 0x03)
48534853         {
48544854         case 0:
4855            set_nt_mirroring(space->machine(), PPU_MIRROR_VERT);
4855            set_nt_mirroring(space.machine(), PPU_MIRROR_VERT);
48564856            break;
48574857         case 1:
4858            set_nt_mirroring(space->machine(), PPU_MIRROR_HORZ);
4858            set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ);
48594859            break;
48604860         case 2:
4861            set_nt_mirroring(space->machine(), PPU_MIRROR_LOW);
4861            set_nt_mirroring(space.machine(), PPU_MIRROR_LOW);
48624862            break;
48634863         case 3:
4864            set_nt_mirroring(space->machine(), PPU_MIRROR_HIGH);
4864            set_nt_mirroring(space.machine(), PPU_MIRROR_HIGH);
48654865            break;
48664866         }
48674867         break;
r17963r17964
48734873         state->m_IRQ_count = (data << 8) | (state->m_IRQ_count & 0xff);
48744874         break;
48754875      case 0x0300:
4876         prg8_89(space->machine(), data);
4876         prg8_89(space.machine(), data);
48774877         break;
48784878      case 0x0301:
4879         prg8_ab(space->machine(), data);
4879         prg8_ab(space.machine(), data);
48804880         break;
48814881      case 0x0302:
4882         prg8_cd(space->machine(), data);
4882         prg8_cd(space.machine(), data);
48834883         break;
48844884      case 0x0312:
48854885      case 0x0313:
r17963r17964
48914891      case 0x0316:
48924892      case 0x0317:
48934893         state->m_mapper83_reg[offset - 0x0310] = data;
4894         cony_set_chr(space->machine());
4894         cony_set_chr(space.machine());
48954895         break;
48964896      case 0x0318:
48974897         state->m_mapper83_reg[9] = data;
4898         cony_set_prg(space->machine());
4898         cony_set_prg(space.machine());
48994899         break;
49004900   }
49014901}
r17963r17964
49154915
49164916static WRITE8_HANDLER( yoko_l_w )
49174917{
4918   nes_state *state = space->machine().driver_data<nes_state>();
4918   nes_state *state = space.machine().driver_data<nes_state>();
49194919   LOG_MMC(("cony_l_w, offset: %04x, data: %02x\n", offset, data));
49204920
49214921   if (offset >= 0x1300) // from 0x5400
r17963r17964
49244924
49254925static READ8_HANDLER( yoko_l_r )
49264926{
4927   nes_state *state = space->machine().driver_data<nes_state>();
4927   nes_state *state = space.machine().driver_data<nes_state>();
49284928   LOG_MMC(("cony_l_r, offset: %04x\n", offset));
49294929
49304930   if (offset >= 0x0f00 && offset < 0x1300)   // 0x5000
r17963r17964
49684968
49694969static WRITE8_HANDLER( yoko_w )
49704970{
4971   nes_state *state = space->machine().driver_data<nes_state>();
4971   nes_state *state = space.machine().driver_data<nes_state>();
49724972   LOG_MMC(("yoko_w, offset: %04x, data: %02x\n", offset, data));
49734973
49744974   switch (offset & 0x0c17)
49754975   {
49764976      case 0x0000:
49774977         state->m_mmc_reg[1] = data;
4978         yoko_set_prg(space->machine());
4978         yoko_set_prg(space.machine());
49794979         break;
49804980      case 0x400:
49814981         state->m_mmc_reg[0] = data;
49824982         if (data & 1)
4983            set_nt_mirroring(space->machine(), PPU_MIRROR_HORZ);
4983            set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ);
49844984         else
4985            set_nt_mirroring(space->machine(), PPU_MIRROR_VERT);
4986         yoko_set_prg(space->machine());
4985            set_nt_mirroring(space.machine(), PPU_MIRROR_VERT);
4986         yoko_set_prg(space.machine());
49874987         break;
49884988      case 0x0800:
49894989         state->m_IRQ_count = (state->m_IRQ_count & 0xff00) | data;
r17963r17964
49964996      case 0x0c01:
49974997      case 0x0c02:
49984998         state->m_mapper83_reg[offset & 3] = data;
4999         yoko_set_prg(space->machine());
4999         yoko_set_prg(space.machine());
50005000         break;
50015001      case 0x0c10:
50025002      case 0x0c11:
50035003      case 0x0c16:
50045004      case 0x0c17:
50055005         state->m_mapper83_reg[4 + (offset & 3)] = data;
5006         yoko_set_chr(space->machine());
5006         yoko_set_chr(space.machine());
50075007         break;
50085008   }
50095009}
r17963r17964
50245024   offset += 0x100;
50255025
50265026   if (offset == 0x1020)   /* 0x5020 */
5027      prg16_89ab(space->machine(), data);
5027      prg16_89ab(space.machine(), data);
50285028}
50295029
50305030/*************************************************************
r17963r17964
50425042
50435043static WRITE8_HANDLER( fukutake_l_w )
50445044{
5045   nes_state *state = space->machine().driver_data<nes_state>();
5045   nes_state *state = space.machine().driver_data<nes_state>();
50465046   LOG_MMC(("fukutake_l_w offset: %04x, data: %02x\n", offset, data));
50475047   offset += 0x100;
50485048
50495049   if (offset >= 0x200 && offset < 0x400)
50505050   {
50515051      if (offset & 1)
5052         prg16_89ab(space->machine(), data);
5052         prg16_89ab(space.machine(), data);
50535053      else
5054         wram_bank(space->machine(), data >> 6, NES_WRAM);
5054         wram_bank(space.machine(), data >> 6, NES_WRAM);
50555055   }
50565056   else if (offset >= 0x400 && offset < 0xf00)
50575057      state->m_mapper_ram[offset - 0x400] = data;
r17963r17964
50595059
50605060static READ8_HANDLER( fukutake_l_r )
50615061{
5062   nes_state *state = space->machine().driver_data<nes_state>();
5062   nes_state *state = space.machine().driver_data<nes_state>();
50635063   LOG_MMC(("fukutake_l_r offset: %04x\n", offset));
50645064   offset += 0x100;
50655065
r17963r17964
51065106
51075107static WRITE8_HANDLER( futuremedia_w )
51085108{
5109   nes_state *state = space->machine().driver_data<nes_state>();
5109   nes_state *state = space.machine().driver_data<nes_state>();
51105110   LOG_MMC(("futuremedia_w, offset: %04x, data: %02x\n", offset, data));
51115111
51125112   switch (offset)
51135113   {
51145114      case 0x0000:
5115         prg8_89(space->machine(), data);
5115         prg8_89(space.machine(), data);
51165116         break;
51175117      case 0x0001:
5118         prg8_ab(space->machine(), data);
5118         prg8_ab(space.machine(), data);
51195119         break;
51205120      case 0x0002:
5121         prg8_cd(space->machine(), data);
5121         prg8_cd(space.machine(), data);
51225122         break;
51235123      case 0x0003:
5124         prg8_ef(space->machine(), data);
5124         prg8_ef(space.machine(), data);
51255125         break;
51265126      case 0x2000:
51275127      case 0x2001:
r17963r17964
51315131      case 0x2005:
51325132      case 0x2006:
51335133      case 0x2007:
5134         chr1_x(space->machine(), offset & 0x07, data, CHRROM);
5134         chr1_x(space.machine(), offset & 0x07, data, CHRROM);
51355135         break;
51365136
51375137      case 0x5000:
5138         set_nt_mirroring(space->machine(), BIT(data, 0) ?  PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
5138         set_nt_mirroring(space.machine(), BIT(data, 0) ?  PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
51395139         break;
51405140
51415141      case 0x4001:
r17963r17964
51695169
51705170static WRITE8_HANDLER( gouder_sf4_l_w )
51715171{
5172   nes_state *state = space->machine().driver_data<nes_state>();
5172   nes_state *state = space.machine().driver_data<nes_state>();
51735173   static const UINT8 conv_table[256] =
51745174   {
51755175      0x59,0x59,0x59,0x59,0x59,0x59,0x59,0x59,0x59,0x49,0x19,0x09,0x59,0x49,0x19,0x09,
r17963r17964
51975197   else if (!(offset < 0xf00))
51985198      state->m_mmc_reg[4] = data;
51995199   else if (!(offset < 0x700))
5200      prg32(space->machine(), ((data >> 3) & 0x02) | (data & 0x01));
5200      prg32(space.machine(), ((data >> 3) & 0x02) | (data & 0x01));
52015201}
52025202
52035203static READ8_HANDLER( gouder_sf4_l_r )
52045204{
5205   nes_state *state = space->machine().driver_data<nes_state>();
5205   nes_state *state = space.machine().driver_data<nes_state>();
52065206   LOG_MMC(("gouder_sf4_l_r, offset: %04x\n", offset));
52075207
52085208   if (!(offset < 0x1700))
r17963r17964
52385238{
52395239   LOG_MMC(("henggedianzi_w, offset: %04x, data: %02x\n", offset, data));
52405240
5241   prg32(space->machine(), data);
5242   set_nt_mirroring(space->machine(), BIT(data, 5) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
5241   prg32(space.machine(), data);
5242   set_nt_mirroring(space.machine(), BIT(data, 5) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
52435243}
52445244
52455245/*************************************************************
r17963r17964
52635263   offset += 0x4100;
52645264
52655265   if (offset & 0x5000)
5266      prg32(space->machine(), data >> 1);
5266      prg32(space.machine(), data >> 1);
52675267}
52685268
52695269static WRITE8_HANDLER( heng_xjzb_w )
52705270{
52715271   LOG_MMC(("heng_xjzb_w, offset: %04x, data: %02x\n", offset, data));
52725272
5273   set_nt_mirroring(space->machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
5273   set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
52745274}
52755275
52765276/*************************************************************
r17963r17964
52955295
52965296   if (!(offset & 0x100))
52975297   {
5298      prg32(space->machine(), (data & 0x38) >> 3);
5299      chr8(space->machine(), (data & 0x07) | ((data & 0x40) >> 3), CHRROM);
5300      set_nt_mirroring(space->machine(), BIT(data, 7) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ);
5298      prg32(space.machine(), (data & 0x38) >> 3);
5299      chr8(space.machine(), (data & 0x07) | ((data & 0x40) >> 3), CHRROM);
5300      set_nt_mirroring(space.machine(), BIT(data, 7) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ);
53015301   }
53025302}
53035303
r17963r17964
53075307
53085308   if (!(offset & 0x100))
53095309   {
5310      prg32(space->machine(), (data & 0x38) >> 3);
5311      chr8(space->machine(), (data & 0x07) | ((data & 0x40) >> 3), CHRROM);
5310      prg32(space.machine(), (data & 0x38) >> 3);
5311      chr8(space.machine(), (data & 0x07) | ((data & 0x40) >> 3), CHRROM);
53125312   }
53135313}
53145314
r17963r17964
53265326
53275327static WRITE8_HANDLER( hosenkan_w )
53285328{
5329   nes_state *state = space->machine().driver_data<nes_state>();
5329   nes_state *state = space.machine().driver_data<nes_state>();
53305330   LOG_MMC(("hosenkan_w, offset: %04x, data: %02x\n", offset, data));
53315331
53325332   switch (offset & 0x7003)
53335333   {
53345334      case 0x0001:
5335         set_nt_mirroring(space->machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
5335         set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
53365336         break;
53375337      case 0x2000:
53385338         state->m_mmc_latch1 = data;
r17963r17964
53415341         switch (state->m_mmc_latch1)
53425342      {
53435343         case 0:
5344            chr2_0(space->machine(), data >> 1, CHRROM);
5344            chr2_0(space.machine(), data >> 1, CHRROM);
53455345            break;
53465346         case 1:
5347            chr1_5(space->machine(), data, CHRROM);
5347            chr1_5(space.machine(), data, CHRROM);
53485348            break;
53495349         case 2:
5350            chr2_2(space->machine(), data >> 1, CHRROM);
5350            chr2_2(space.machine(), data >> 1, CHRROM);
53515351            break;
53525352         case 3:
5353            chr1_7(space->machine(), data, CHRROM);
5353            chr1_7(space.machine(), data, CHRROM);
53545354            break;
53555355         case 4:
5356            prg8_89(space->machine(), data);
5356            prg8_89(space.machine(), data);
53575357            break;
53585358         case 5:
5359            prg8_ab(space->machine(), data);
5359            prg8_ab(space.machine(), data);
53605360            break;
53615361         case 6:
5362            chr1_4(space->machine(), data, CHRROM);
5362            chr1_4(space.machine(), data, CHRROM);
53635363            break;
53645364         case 7:
5365            chr1_6(space->machine(), data, CHRROM);
5365            chr1_6(space.machine(), data, CHRROM);
53665366            break;
53675367      }
53685368         break;
r17963r17964
54015401   switch (offset & 0x7080)
54025402   {
54035403      case 0x7000:
5404         chr4_0(space->machine(), data, CHRROM);
5404         chr4_0(space.machine(), data, CHRROM);
54055405         break;
54065406      case 0x7080:
5407         chr4_4(space->machine(), data, CHRROM);
5407         chr4_4(space.machine(), data, CHRROM);
54085408         break;
54095409   }
54105410}
r17963r17964
54235423
54245424static WRITE8_HANDLER( ks7022_w )
54255425{
5426   nes_state *state = space->machine().driver_data<nes_state>();
5426   nes_state *state = space.machine().driver_data<nes_state>();
54275427   LOG_MMC(("ks7022_w, offset: %04x, data: %02x\n", offset, data));
54285428
54295429   if (offset == 0)
5430      set_nt_mirroring(space->machine(), BIT(data, 2) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
5430      set_nt_mirroring(space.machine(), BIT(data, 2) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
54315431
54325432   if (offset == 0x2000)
54335433      state->m_mmc_latch1 = data & 0x0f;
r17963r17964
54355435
54365436static READ8_HANDLER( ks7022_r )
54375437{
5438   nes_state *state = space->machine().driver_data<nes_state>();
5438   nes_state *state = space.machine().driver_data<nes_state>();
54395439   LOG_MMC(("ks7022_r, offset: %04x\n", offset));
54405440
54415441   if (offset == 0x7ffc)
54425442   {
5443      chr8(space->machine(), state->m_mmc_latch1, CHRROM);
5444      prg16_89ab(space->machine(), state->m_mmc_latch1);
5445      prg16_cdef(space->machine(), state->m_mmc_latch1);
5443      chr8(space.machine(), state->m_mmc_latch1, CHRROM);
5444      prg16_89ab(space.machine(), state->m_mmc_latch1);
5445      prg16_cdef(space.machine(), state->m_mmc_latch1);
54465446   }
54475447
5448   return mmc_hi_access_rom(space->machine(), offset);
5448   return mmc_hi_access_rom(space.machine(), offset);
54495449}
54505450
54515451/*************************************************************
r17963r17964
54895489
54905490static WRITE8_HANDLER( ks7032_w )
54915491{
5492   nes_state *state = space->machine().driver_data<nes_state>();
5492   nes_state *state = space.machine().driver_data<nes_state>();
54935493   LOG_MMC(("ks7032_w, offset: %04x, data: %02x\n", offset, data));
54945494
54955495   switch (offset & 0x7000)
r17963r17964
55145514         break;
55155515      case 0x7000:
55165516         state->m_mmc_reg[state->m_mmc_latch1] = data;
5517         ks7032_prg_update(space->machine());
5517         ks7032_prg_update(space.machine());
55185518         break;
55195519   }
55205520}
r17963r17964
55345534
55355535static WRITE8_HANDLER( ks202_w )
55365536{
5537   nes_state *state = space->machine().driver_data<nes_state>();
5537   nes_state *state = space.machine().driver_data<nes_state>();
55385538   LOG_MMC(("ks202_w, offset: %04x, data: %02x\n", offset, data));
55395539
55405540   switch (offset & 0x7000)
r17963r17964
55595559         break;
55605560      case 0x7000:
55615561         state->m_mmc_reg[state->m_mmc_latch1] = data;
5562         ks7032_prg_update(space->machine());
5562         ks7032_prg_update(space.machine());
55635563         switch (offset & 0xc00)
55645564         {
55655565         case 0x800:
5566            set_nt_mirroring(space->machine(), BIT(data, 0) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ);
5566            set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ);
55675567            break;
55685568         case 0xc00:
5569            chr1_x(space->machine(), offset & 0x07, data, CHRROM);
5569            chr1_x(space.machine(), offset & 0x07, data, CHRROM);
55705570            break;
55715571         }
55725572         break;
r17963r17964
56045604
56055605static WRITE8_HANDLER( ks7017_l_w )
56065606{
5607   nes_state *state = space->machine().driver_data<nes_state>();
5607   nes_state *state = space.machine().driver_data<nes_state>();
56085608   LOG_MMC(("ks7022_w, offset: %04x, data: %02x\n", offset, data));
56095609
56105610   offset += 0x100;
r17963r17964
56135613      state->m_mmc_latch1 = ((offset >> 2) & 0x03) | ((offset >> 4) & 0x04);
56145614
56155615   if (offset >= 0x1000 && offset < 0x1100)
5616      prg16_89ab(space->machine(), state->m_mmc_latch1);
5616      prg16_89ab(space.machine(), state->m_mmc_latch1);
56175617}
56185618
56195619WRITE8_HANDLER( ks7017_extra_w )
56205620{
5621   nes_state *state = space->machine().driver_data<nes_state>();
5621   nes_state *state = space.machine().driver_data<nes_state>();
56225622   LOG_MMC(("ks7017_extra_w, offset: %04x, data: %02x\n", offset, data));
56235623
56245624   offset += 0x20;
r17963r17964
56305630      state->m_IRQ_count = (state->m_IRQ_count & 0x00ff) | (data << 8);
56315631
56325632   if (offset == 0x0025) /* 0x4025 */
5633      set_nt_mirroring(space->machine(), BIT(data, 3) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
5633      set_nt_mirroring(space.machine(), BIT(data, 3) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
56345634}
56355635
56365636READ8_HANDLER( ks7017_extra_r )
56375637{
5638   nes_state *state = space->machine().driver_data<nes_state>();
5638   nes_state *state = space.machine().driver_data<nes_state>();
56395639   LOG_MMC(("ks7017_extra_r, offset: %04x\n", offset));
56405640
56415641   state->m_IRQ_status &= ~0x01;
r17963r17964
56595659
56605660static WRITE8_HANDLER( kay_pp_l_w )
56615661{
5662   nes_state *state = space->machine().driver_data<nes_state>();
5662   nes_state *state = space.machine().driver_data<nes_state>();
56635663   LOG_MMC(("kay_pp_l_w, offset: %04x, data: %02x\n", offset, data));
56645664   offset += 0x100;
56655665
r17963r17964
56835683
56845684static READ8_HANDLER( kay_pp_l_r )
56855685{
5686   nes_state *state = space->machine().driver_data<nes_state>();
5686   nes_state *state = space.machine().driver_data<nes_state>();
56875687   LOG_MMC(("kay_pp_l_r, offset: %04x\n", offset));
56885688   offset += 0x100;
56895689
r17963r17964
57635763
57645764static WRITE8_HANDLER( kay_pp_w )
57655765{
5766   nes_state *state = space->machine().driver_data<nes_state>();
5766   nes_state *state = space.machine().driver_data<nes_state>();
57675767   LOG_MMC(("kay_pp_w, offset: %04x, data: %02x\n", offset, data));
57685768
57695769   switch (offset & 0x6003)
57705770   {
57715771      case 0x0000:
57725772         txrom_w(space, offset, data);
5773         mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
5773         mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
57745774         break;
57755775
57765776      case 0x0001:
57775777         state->m_mmc_reg[6] = (BIT(data, 0) << 5) | (BIT(data, 1) << 4) | (BIT(data, 2) << 3)
57785778                        | (BIT(data, 3) << 2) | (BIT(data, 4) << 1) | BIT(data, 5);
57795779         if (!state->m_mmc_reg[7])
5780            kay_pp_update_regs(space->machine());
5780            kay_pp_update_regs(space.machine());
57815781         txrom_w(space, offset, data);
5782         mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
5782         mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
57835783         break;
57845784
57855785      case 0x0003:
57865786         state->m_mmc_reg[5] = data;
5787         kay_pp_update_regs(space->machine());
5787         kay_pp_update_regs(space.machine());
57885788         txrom_w(space, 0x0000, data);
5789         mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
5789         mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
57905790         break;
57915791
57925792      default:
r17963r17964
58215821
58225822static WRITE8_HANDLER( kasing_m_w )
58235823{
5824   nes_state *state = space->machine().driver_data<nes_state>();
5824   nes_state *state = space.machine().driver_data<nes_state>();
58255825   LOG_MMC(("kasing_m_w, offset: %04x, data: %02x\n", offset, data));
58265826
58275827   switch (offset & 0x01)
58285828   {
58295829      case 0x00:
58305830         state->m_mmc_reg[0] = data;
5831         mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
5831         mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
58325832         break;
58335833      case 0x01:
58345834         state->m_mmc_chr_base = (data & 0x01) ? 0x100 : 0x000;
5835         mmc3_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
5835         mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
58365836         break;
58375837   }
58385838}
r17963r17964
58565856{
58575857   LOG_MMC(("magics_md_w, offset: %04x, data: %02x\n", offset, data));
58585858
5859   prg32(space->machine(), data >> 1);
5860   chr8(space->machine(), data, CHRROM);
5859   prg32(space.machine(), data >> 1);
5860   chr8(space.machine(), data, CHRROM);
58615861}
58625862
58635863/*************************************************************
r17963r17964
58955895
58965896static WRITE8_HANDLER( nanjing_l_w )
58975897{
5898   nes_state *state = space->machine().driver_data<nes_state>();
5898   nes_state *state = space.machine().driver_data<nes_state>();
58995899   LOG_MMC(("nanjing_l_w, offset: %04x, data: %02x\n", offset, data));
59005900
59015901   offset += 0x100;
r17963r17964
59065906   if (offset == 0x1100)   // 0x5100
59075907   {
59085908      if (data == 6)
5909         prg32(space->machine(), 3);
5909         prg32(space.machine(), 3);
59105910      return;
59115911   }
59125912
r17963r17964
59255925      case 0x200:
59265926         state->m_mmc_reg[BIT(offset, 9)] = data;
59275927         if (!BIT(state->m_mmc_reg[0], 7) && state->m_ppu->get_current_scanline() <= 127)
5928            chr8(space->machine(), 0, CHRRAM);
5928            chr8(space.machine(), 0, CHRRAM);
59295929         break;
59305930      case 0x300:
59315931         state->m_mmc_latch1 = data;
59325932         break;
59335933   }
59345934
5935   prg32(space->machine(), (state->m_mmc_reg[0] & 0x0f) | ((state->m_mmc_reg[1] & 0x0f) << 4));
5935   prg32(space.machine(), (state->m_mmc_reg[0] & 0x0f) | ((state->m_mmc_reg[1] & 0x0f) << 4));
59365936}
59375937
59385938static READ8_HANDLER( nanjing_l_r )
59395939{
5940   nes_state *state = space->machine().driver_data<nes_state>();
5940   nes_state *state = space.machine().driver_data<nes_state>();
59415941   UINT8 value = 0;
59425942   LOG_MMC(("nanjing_l_r, offset: %04x\n", offset));
59435943
r17963r17964
60036003
60046004static WRITE8_HANDLER( ntdec_asder_w )
60056005{
6006   nes_state *state = space->machine().driver_data<nes_state>();
6006   nes_state *state = space.machine().driver_data<nes_state>();
60076007   LOG_MMC(("ntdec_asder_w, offset: %04x, data: %02x\n", offset, data));
60086008
60096009   switch (offset)
r17963r17964
60156015         switch (state->m_mmc_latch1)
60166016      {
60176017         case 0:
6018            prg8_89(space->machine(), data);
6018            prg8_89(space.machine(), data);
60196019            break;
60206020         case 1:
6021            prg8_ab(space->machine(), data);
6021            prg8_ab(space.machine(), data);
60226022            break;
60236023         case 2:
60246024            data &= 0xfe;
6025            chr1_0(space->machine(), data, CHRROM);
6026            chr1_1(space->machine(), data + 1, CHRROM);
6025            chr1_0(space.machine(), data, CHRROM);
6026            chr1_1(space.machine(), data + 1, CHRROM);
60276027            break;
60286028         case 3:
60296029            data &= 0xfe;
6030            chr1_2(space->machine(), data, CHRROM);
6031            chr1_3(space->machine(), data + 1, CHRROM);
6030            chr1_2(space.machine(), data, CHRROM);
6031            chr1_3(space.machine(), data + 1, CHRROM);
60326032            break;
60336033         case 4:
6034            chr1_4(space->machine(), data, CHRROM);
6034            chr1_4(space.machine(), data, CHRROM);
60356035            break;
60366036         case 5:
6037            chr1_5(space->machine(), data, CHRROM);
6037            chr1_5(space.machine(), data, CHRROM);
60386038            break;
60396039         case 6:
6040            chr1_6(space->machine(), data, CHRROM);
6040            chr1_6(space.machine(), data, CHRROM);
60416041            break;
60426042         case 7:
6043            chr1_7(space->machine(), data, CHRROM);
6043            chr1_7(space.machine(), data, CHRROM);
60446044            break;
60456045      }
60466046         break;
60476047      case 0x6000:
6048         set_nt_mirroring(space->machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
6048         set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
60496049         break;
60506050   }
60516051}
r17963r17964
60726072   switch (offset & 0x03)
60736073   {
60746074      case 0:
6075         chr4_0(space->machine(), data >> 2, CHRROM);
6075         chr4_0(space.machine(), data >> 2, CHRROM);
60766076         break;
60776077      case 1:
6078         chr2_4(space->machine(), data >> 1, CHRROM);
6078         chr2_4(space.machine(), data >> 1, CHRROM);
60796079         break;
60806080      case 2:
6081         chr2_6(space->machine(), data >> 1 , CHRROM);
6081         chr2_6(space.machine(), data >> 1 , CHRROM);
60826082         break;
60836083      case 3:
6084         prg8_89(space->machine(), data);
6084         prg8_89(space.machine(), data);
60856085         break;
60866086   }
60876087}
r17963r17964
61036103
61046104static WRITE8_HANDLER( daou306_w )
61056105{
6106   nes_state *state = space->machine().driver_data<nes_state>();
6106   nes_state *state = space.machine().driver_data<nes_state>();
61076107   LOG_MMC(("daou306_w, offset: %04x, data: %02x\n", offset, data));
61086108   int reg = BIT(offset, 2) ? 8 : 0;
61096109
r17963r17964
61126112      case 0x4000:
61136113      case 0x4004:
61146114         state->m_mmc_reg[reg + 0] = data;
6115         chr1_0(space->machine(), state->m_mmc_reg[0] | (state->m_mmc_reg[8] << 8), CHRROM);
6115         chr1_0(space.machine(), state->m_mmc_reg[0] | (state->m_mmc_reg[8] << 8), CHRROM);
61166116         break;
61176117      case 0x4001:
61186118      case 0x4005:
61196119         state->m_mmc_reg[reg + 1] = data;
6120         chr1_1(space->machine(), state->m_mmc_reg[1] | (state->m_mmc_reg[9] << 8), CHRROM);
6120         chr1_1(space.machine(), state->m_mmc_reg[1] | (state->m_mmc_reg[9] << 8), CHRROM);
61216121         break;
61226122      case 0x4002:
61236123      case 0x4006:
61246124         state->m_mmc_reg[reg + 2] = data;
6125         chr1_2(space->machine(), state->m_mmc_reg[2] | (state->m_mmc_reg[10] << 8), CHRROM);
6125         chr1_2(space.machine(), state->m_mmc_reg[2] | (state->m_mmc_reg[10] << 8), CHRROM);
61266126         break;
61276127      case 0x4003:
61286128      case 0x4007:
61296129         state->m_mmc_reg[reg + 3] = data;
6130         chr1_3(space->machine(), state->m_mmc_reg[3] | (state->m_mmc_reg[11] << 8), CHRROM);
6130         chr1_3(space.machine(), state->m_mmc_reg[3] | (state->m_mmc_reg[11] << 8), CHRROM);
61316131         break;
61326132      case 0x4008:
61336133      case 0x400c:
61346134         state->m_mmc_reg[reg + 4] = data;
6135         chr1_4(space->machine(), state->m_mmc_reg[4] | (state->m_mmc_reg[12] << 8), CHRROM);
6135         chr1_4(space.machine(), state->m_mmc_reg[4] | (state->m_mmc_reg[12] << 8), CHRROM);
61366136         break;
61376137      case 0x4009:
61386138      case 0x400d:
61396139         state->m_mmc_reg[reg + 5] = data;
6140         chr1_5(space->machine(), state->m_mmc_reg[5] | (state->m_mmc_reg[13] << 8), CHRROM);
6140         chr1_5(space.machine(), state->m_mmc_reg[5] | (state->m_mmc_reg[13] << 8), CHRROM);
61416141         break;
61426142      case 0x400a:
61436143      case 0x400e:
61446144         state->m_mmc_reg[reg + 6] = data;
6145         chr1_6(space->machine(), state->m_mmc_reg[6] | (state->m_mmc_reg[14] << 8), CHRROM);
6145         chr1_6(space.machine(), state->m_mmc_reg[6] | (state->m_mmc_reg[14] << 8), CHRROM);
61466146         break;
61476147      case 0x400b:
61486148      case 0x400f:
61496149         state->m_mmc_reg[reg + 7] = data;
6150         chr1_7(space->machine(), state->m_mmc_reg[7] | (state->m_mmc_reg[15] << 8), CHRROM);
6150         chr1_7(space.machine(), state->m_mmc_reg[7] | (state->m_mmc_reg[15] << 8), CHRROM);
61516151         break;
61526152      case 0x4010:
6153         prg16_89ab(space->machine(), data);
6153         prg16_89ab(space.machine(), data);
61546154         break;
61556155      case 0x4014:
61566156         if (data & 1)
6157            set_nt_mirroring(space->machine(), PPU_MIRROR_HORZ);
6157            set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ);
61586158         else
6159            set_nt_mirroring(space->machine(), PPU_MIRROR_VERT);
6159            set_nt_mirroring(space.machine(), PPU_MIRROR_VERT);
61606160         break;
61616161   }
61626162}
r17963r17964
61786178
61796179static WRITE8_HANDLER( gs2015_w )
61806180{
6181   nes_state *state = space->machine().driver_data<nes_state>();
6181   nes_state *state = space.machine().driver_data<nes_state>();
61826182   LOG_MMC(("gs2015_w, offset: %04x, data: %02x\n", offset, data));
61836183
6184   prg32(space->machine(), offset);
6185   chr8(space->machine(), offset >> 1, state->m_mmc_chr_source);
6184   prg32(space.machine(), offset);
6185   chr8(space.machine(), offset >> 1, state->m_mmc_chr_source);
61866186}
61876187
61886188/*************************************************************
r17963r17964
62116211   {
62126212      case 0x00:
62136213      case 0x30:
6214         prg32(space->machine(), offset & 0x0f);
6214         prg32(space.machine(), offset & 0x0f);
62156215         break;
62166216      case 0x10:
62176217      case 0x20:
6218         prg16_89ab(space->machine(), ((offset & 0x0f) << 1) | ((offset & 0x20) >> 4));
6219         prg16_cdef(space->machine(), ((offset & 0x0f) << 1) | ((offset & 0x20) >> 4));
6218         prg16_89ab(space.machine(), ((offset & 0x0f) << 1) | ((offset & 0x20) >> 4));
6219         prg16_cdef(space.machine(), ((offset & 0x0f) << 1) | ((offset & 0x20) >> 4));
62206220         break;
62216221   }
6222   set_nt_mirroring(space->machine(), BIT(data, 7) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
6222   set_nt_mirroring(space.machine(), BIT(data, 7) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
62236223}
62246224
62256225/*************************************************************
r17963r17964
62386238
62396239static WRITE8_HANDLER( rex_dbz_l_w )
62406240{
6241   nes_state *state = space->machine().driver_data<nes_state>();
6241   nes_state *state = space.machine().driver_data<nes_state>();
62426242   LOG_MMC(("rex_dbz_l_w, offset: %04x, data: %02x\n", offset, data));
62436243
62446244   state->m_mmc_reg[0] = data;
6245   mmc3_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
6245   mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
62466246}
62476247
62486248/* we would need to use this read handler in 0x6000-0x7fff as well */
r17963r17964
63306330
63316331static WRITE8_HANDLER( rex_sl1632_w )
63326332{
6333   nes_state *state = space->machine().driver_data<nes_state>();
6333   nes_state *state = space.machine().driver_data<nes_state>();
63346334   UINT8 map14_helper1, map14_helper2, mmc_helper, cmd;
63356335   LOG_MMC(("rex_sl1632_w, offset: %04x, data: %02x\n", offset, data));
63366336
63376337   if (offset == 0x2131)
63386338   {
63396339      state->m_mmc_reg[0] = data;
6340      rex_sl1632_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
6341      rex_sl1632_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
6340      rex_sl1632_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
6341      rex_sl1632_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
63426342
63436343      if (!(state->m_mmc_reg[0] & 0x02))
6344         set_nt_mirroring(space->machine(), BIT(state->m_mmc_reg[1], 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
6344         set_nt_mirroring(space.machine(), BIT(state->m_mmc_reg[1], 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
63456345   }
63466346
63476347   if (state->m_mmc_reg[0] & 0x02)
r17963r17964
63546354
63556355            /* Has PRG Mode changed? */
63566356            if (mmc_helper & 0x40)
6357               rex_sl1632_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
6357               rex_sl1632_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
63586358
63596359            /* Has CHR Mode changed? */
63606360            if (mmc_helper & 0x80)
6361               rex_sl1632_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
6361               rex_sl1632_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
63626362            break;
63636363
63646364         case 0x0001:
r17963r17964
63686368            case 0: case 1:   // these have to be changed due to the different way rex_sl1632_set_chr works (it handles 1k banks)!
63696369               state->m_mmc_vrom_bank[2 * cmd] = data;
63706370               state->m_mmc_vrom_bank[2 * cmd + 1] = data;
6371               rex_sl1632_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
6371               rex_sl1632_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
63726372               break;
63736373            case 2: case 3: case 4: case 5:
63746374               state->m_mmc_vrom_bank[cmd + 2] = data;
6375               rex_sl1632_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
6375               rex_sl1632_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
63766376               break;
63776377            case 6:
63786378            case 7:
63796379               state->m_mmc_prg_bank[cmd - 6] = data;
6380               rex_sl1632_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
6380               rex_sl1632_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
63816381               break;
63826382            }
63836383            break;
63846384
63856385         case 0x2000:
6386            set_nt_mirroring(space->machine(), BIT(state->m_mmc_reg[1], 0) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ);
6386            set_nt_mirroring(space.machine(), BIT(state->m_mmc_reg[1], 0) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ);
63876387            break;
63886388
63896389         default:
r17963r17964
63976397      offset = ((offset & 0x02) | (offset >> 10)) >> 1;
63986398      map14_helper2 = ((offset + 2) & 0x07) + 4; // '+4' because first 4 state->m_mmc_extra_banks are for PRG!
63996399      state->m_mmc_extra_bank[map14_helper2] = (state->m_mmc_extra_bank[map14_helper2] & (0xf0 >> map14_helper1)) | ((data & 0x0f) << map14_helper1);
6400      rex_sl1632_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
6400      rex_sl1632_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
64016401   }
64026402   else
64036403   {
r17963r17964
64066406         case 0x0000:
64076407         case 0x2000:
64086408            state->m_mmc_extra_bank[offset >> 13] = data;
6409            rex_sl1632_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
6409            rex_sl1632_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
64106410            break;
64116411
64126412         case 0x1000:
64136413            state->m_mmc_reg[1] = data;
6414            set_nt_mirroring(space->machine(), BIT(state->m_mmc_reg[1], 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
6414            set_nt_mirroring(space.machine(), BIT(state->m_mmc_reg[1], 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
64156415            break;
64166416      }
64176417   }
r17963r17964
64316431
64326432static WRITE8_HANDLER( rumblestation_m_w )
64336433{
6434   nes_state *state = space->machine().driver_data<nes_state>();
6434   nes_state *state = space.machine().driver_data<nes_state>();
64356435   LOG_MMC(("rumblestation_m_w, offset: %04x, data: %02x\n", offset, data));
64366436
64376437   state->m_mmc_prg_bank[0] = (state->m_mmc_prg_bank[0] & 0x01) | ((data & 0x0f) << 1);
64386438   state->m_mmc_vrom_bank[0] = (state->m_mmc_vrom_bank[0] & 0x07) | ((data & 0xf0) >> 1);
6439   prg32(space->machine(), state->m_mmc_prg_bank[0]);
6440   chr8(space->machine(), state->m_mmc_vrom_bank[0], CHRROM);
6439   prg32(space.machine(), state->m_mmc_prg_bank[0]);
6440   chr8(space.machine(), state->m_mmc_vrom_bank[0], CHRROM);
64416441}
64426442
64436443static WRITE8_HANDLER( rumblestation_w )
64446444{
6445   nes_state *state = space->machine().driver_data<nes_state>();
6445   nes_state *state = space.machine().driver_data<nes_state>();
64466446   LOG_MMC(("rumblestation_w, offset: %04x, data: %02x\n", offset, data));
64476447
64486448   state->m_mmc_prg_bank[0] = (state->m_mmc_prg_bank[0] & ~0x01) | (data & 0x01);
64496449   state->m_mmc_vrom_bank[0] = (state->m_mmc_vrom_bank[0] & ~0x07) | ((data & 0x70) >> 4);
6450   prg32(space->machine(), state->m_mmc_prg_bank[0]);
6451   chr8(space->machine(), state->m_mmc_vrom_bank[0], CHRROM);
6450   prg32(space.machine(), state->m_mmc_prg_bank[0]);
6451   chr8(space.machine(), state->m_mmc_vrom_bank[0], CHRROM);
64526452}
64536453
64546454/*************************************************************
r17963r17964
64876487
64886488static WRITE8_HANDLER( sachen_74x374_l_w )
64896489{
6490   nes_state *state = space->machine().driver_data<nes_state>();
6490   nes_state *state = space.machine().driver_data<nes_state>();
64916491   LOG_MMC(("sachen_74x374_l_w, offset: %04x, data: %02x\n", offset, data));
64926492
64936493   /* write happens only if we are at 0x4100 + k * 0x200, but 0x4100 is offset = 0 */
r17963r17964
65016501         {
65026502            case 0x02:
65036503               state->m_mmc_vrom_bank[0] = (state->m_mmc_vrom_bank[0] & ~0x08) | ((data << 3) & 0x08);
6504               chr8(space->machine(), state->m_mmc_vrom_bank[0], CHRROM);
6505               prg32(space->machine(), data & 0x01);
6504               chr8(space.machine(), state->m_mmc_vrom_bank[0], CHRROM);
6505               prg32(space.machine(), data & 0x01);
65066506               break;
65076507            case 0x04:
65086508               state->m_mmc_vrom_bank[0] = (state->m_mmc_vrom_bank[0] & ~0x04) | ((data << 2) & 0x04);
6509               chr8(space->machine(), state->m_mmc_vrom_bank[0], CHRROM);
6509               chr8(space.machine(), state->m_mmc_vrom_bank[0], CHRROM);
65106510               break;
65116511            case 0x05:
6512               prg32(space->machine(), data & 0x07);
6512               prg32(space.machine(), data & 0x07);
65136513               break;
65146514            case 0x06:
65156515               state->m_mmc_vrom_bank[0] = (state->m_mmc_vrom_bank[0] & ~0x03) | ((data << 0) & 0x03);
6516               chr8(space->machine(), state->m_mmc_vrom_bank[0], CHRROM);
6516               chr8(space.machine(), state->m_mmc_vrom_bank[0], CHRROM);
65176517               break;
65186518            case 0x07:
6519               sachen_set_mirror(space->machine(), (data >> 1) & 0x03);
6519               sachen_set_mirror(space.machine(), (data >> 1) & 0x03);
65206520               break;
65216521            default:
65226522               break;
r17963r17964
65276527
65286528static READ8_HANDLER( sachen_74x374_l_r )
65296529{
6530   nes_state *state = space->machine().driver_data<nes_state>();
6530   nes_state *state = space.machine().driver_data<nes_state>();
65316531   LOG_MMC(("sachen_74x374_l_r, offset: %04x", offset));
65326532
65336533   /* read  happens only if we are at 0x4100 + k * 0x200, but 0x4100 is offset = 0 */
r17963r17964
65396539
65406540static WRITE8_HANDLER( sachen_74x374a_l_w )
65416541{
6542   nes_state *state = space->machine().driver_data<nes_state>();
6542   nes_state *state = space.machine().driver_data<nes_state>();
65436543   LOG_MMC(("sachen_74x374a_l_w, offset: %04x, data: %02x\n", offset, data));
65446544
65456545   /* write happens only if we are at 0x4100 + k * 0x200, but 0x4100 is offset = 0 */
r17963r17964
65526552         switch (state->m_mmc_latch1 & 0x07)
65536553         {
65546554            case 0x00:
6555               prg32(space->machine(), 0);
6556               chr8(space->machine(), 3, CHRROM);
6555               prg32(space.machine(), 0);
6556               chr8(space.machine(), 3, CHRROM);
65576557               break;
65586558            case 0x02:
65596559               state->m_mmc_vrom_bank[0] = (state->m_mmc_vrom_bank[0] & ~0x08) | ((data << 3) & 0x08);
6560               chr8(space->machine(), state->m_mmc_vrom_bank[0], CHRROM);
6560               chr8(space.machine(), state->m_mmc_vrom_bank[0], CHRROM);
65616561               break;
65626562            case 0x04:
65636563               state->m_mmc_vrom_bank[0] = (state->m_mmc_vrom_bank[0] & ~0x01) | ((data << 0) & 0x01);
6564               chr8(space->machine(), state->m_mmc_vrom_bank[0], CHRROM);
6564               chr8(space.machine(), state->m_mmc_vrom_bank[0], CHRROM);
65656565               break;
65666566            case 0x05:
6567               prg32(space->machine(), data & 0x01);
6567               prg32(space.machine(), data & 0x01);
65686568               break;
65696569            case 0x06:
65706570               state->m_mmc_vrom_bank[0] = (state->m_mmc_vrom_bank[0] & ~0x06) | ((data << 1) & 0x06);
6571               chr8(space->machine(), state->m_mmc_vrom_bank[0], CHRROM);
6571               chr8(space.machine(), state->m_mmc_vrom_bank[0], CHRROM);
65726572               break;
65736573            case 0x07:
6574               sachen_set_mirror(space->machine(), BIT(data, 0));
6574               sachen_set_mirror(space.machine(), BIT(data, 0));
65756575               break;
65766576            default:
65776577               break;
r17963r17964
65886588
65896589 *************************************************************/
65906590
6591static void common_s8259_write_handler( address_space *space, offs_t offset, UINT8 data, int board )
6591static void common_s8259_write_handler( address_space &space, offs_t offset, UINT8 data, int board )
65926592{
6593   nes_state *state = space->machine().driver_data<nes_state>();
6593   nes_state *state = space.machine().driver_data<nes_state>();
65946594   UINT8 bank_helper1, bank_helper2, shift, add1, add2, add3;
65956595
65966596   /* write happens only if we are at 0x4100 + k * 0x200, but 0x4100 is offset = 0 */
r17963r17964
66056605         switch (state->m_mmc_latch1)
66066606         {
66076607            case 0x05:
6608               prg32(space->machine(), data);
6608               prg32(space.machine(), data);
66096609               break;
66106610            case 0x07:
6611               sachen_set_mirror(space->machine(), BIT(data, 0) ? 0 : (data >> 1) & 0x03);
6611               sachen_set_mirror(space.machine(), BIT(data, 0) ? 0 : (data >> 1) & 0x03);
66126612               break;
66136613            default:
66146614               if (board == SACHEN_8259D)
66156615               {
66166616                  if (state->m_mmc_chr_source == CHRROM)
66176617                  {
6618                     chr1_0(space->machine(), (state->m_sachen_reg[0] & 0x07), CHRROM);
6619                     chr1_1(space->machine(), (state->m_sachen_reg[1] & 0x07) | (state->m_sachen_reg[4] << 4 & 0x10), CHRROM);
6620                     chr1_2(space->machine(), (state->m_sachen_reg[2] & 0x07) | (state->m_sachen_reg[4] << 3 & 0x10), CHRROM);
6621                     chr1_3(space->machine(), (state->m_sachen_reg[3] & 0x07) | (state->m_sachen_reg[4] << 2 & 0x10) | (state->m_sachen_reg[6] << 3 & 0x08), CHRROM);
6618                     chr1_0(space.machine(), (state->m_sachen_reg[0] & 0x07), CHRROM);
6619                     chr1_1(space.machine(), (state->m_sachen_reg[1] & 0x07) | (state->m_sachen_reg[4] << 4 & 0x10), CHRROM);
6620                     chr1_2(space.machine(), (state->m_sachen_reg[2] & 0x07) | (state->m_sachen_reg[4] << 3 & 0x10), CHRROM);
6621                     chr1_3(space.machine(), (state->m_sachen_reg[3] & 0x07) | (state->m_sachen_reg[4] << 2 & 0x10) | (state->m_sachen_reg[6] << 3 & 0x08), CHRROM);
66226622                  }
66236623               }
66246624               else
r17963r17964
66326632
66336633                  if (state->m_mmc_chr_source == CHRROM)
66346634                  {
6635                     chr2_0(space->machine(), ((state->m_sachen_reg[bank_helper1 ? 0 : 0] & 0x07) | bank_helper2) << shift, CHRROM);
6636                     chr2_2(space->machine(), ((state->m_sachen_reg[bank_helper1 ? 0 : 1] & 0x07) | bank_helper2) << shift | add1, CHRROM);
6637                     chr2_4(space->machine(), ((state->m_sachen_reg[bank_helper1 ? 0 : 2] & 0x07) | bank_helper2) << shift | add2, CHRROM);
6638                     chr2_6(space->machine(), ((state->m_sachen_reg[bank_helper1 ? 0 : 3] & 0x07) | bank_helper2) << shift | add3, CHRROM);
6635                     chr2_0(space.machine(), ((state->m_sachen_reg[bank_helper1 ? 0 : 0] & 0x07) | bank_helper2) << shift, CHRROM);
6636                     chr2_2(space.machine(), ((state->m_sachen_reg[bank_helper1 ? 0 : 1] & 0x07) | bank_helper2) << shift | add1, CHRROM);
6637                     chr2_4(space.machine(), ((state->m_sachen_reg[bank_helper1 ? 0 : 2] & 0x07) | bank_helper2) << shift | add2, CHRROM);
6638                     chr2_6(space.machine(), ((state->m_sachen_reg[bank_helper1 ? 0 : 3] & 0x07) | bank_helper2) << shift | add3, CHRROM);
66396639                  }
66406640               }
66416641               break;
r17963r17964
66466646
66476647static WRITE8_HANDLER( s8259_l_w )
66486648{
6649   nes_state *state = space->machine().driver_data<nes_state>();
6649   nes_state *state = space.machine().driver_data<nes_state>();
66506650   LOG_MMC(("s8259_w, type: %d, offset: %04x, data: %02x\n", state->m_pcb_id, offset, data));
66516651
66526652   common_s8259_write_handler(space, offset, data, state->m_pcb_id);
r17963r17964
66546654
66556655static WRITE8_HANDLER( s8259_m_w )
66566656{
6657   nes_state *state = space->machine().driver_data<nes_state>();
6657   nes_state *state = space.machine().driver_data<nes_state>();
66586658   LOG_MMC(("s8259_w, type: %d, offset: %04x, data: %02x\n", state->m_pcb_id, offset, data));
66596659
66606660   common_s8259_write_handler(space, (offset + 0x100) & 0xfff, data, state->m_pcb_id);
r17963r17964
66756675
66766676static WRITE8_HANDLER( sa009_l_w )
66776677{
6678   nes_state *state = space->machine().driver_data<nes_state>();
6678   nes_state *state = space.machine().driver_data<nes_state>();
66796679   LOG_MMC(("sa009_l_w, offset: %04x, data: %02x\n", offset, data));
66806680
6681   chr8(space->machine(), data, state->m_mmc_chr_source);
6681   chr8(space.machine(), data, state->m_mmc_chr_source);
66826682}
66836683
66846684/*************************************************************
r17963r17964
66976697{
66986698   LOG_MMC(("sa0036_w, offset: %04x, data: %02x\n", offset, data));
66996699
6700   chr8(space->machine(), data >> 7, CHRROM);
6700   chr8(space.machine(), data >> 7, CHRROM);
67016701}
67026702
67036703/*************************************************************
r17963r17964
67166716{
67176717   LOG_MMC(("sa0037_w, offset: %04x, data: %02x\n", offset, data));
67186718
6719   prg32(space->machine(), data >> 3);
6720   chr8(space->machine(), data, CHRROM);
6719   prg32(space.machine(), data >> 3);
6720   chr8(space.machine(), data, CHRROM);
67216721}
67226722
67236723/*************************************************************
r17963r17964
67386738
67396739   /* only if we are at 0x4100 + k * 0x200, but 0x4100 is offset = 0 */
67406740   if (!(offset & 0x100))
6741      chr8(space->machine(), data >> 7, CHRROM);
6741      chr8(space.machine(), data >> 7, CHRROM);
67426742}
67436743
67446744/*************************************************************
r17963r17964
67576757{
67586758   LOG_MMC(("sa72008_l_w, offset: %04x, data: %02x\n", offset, data));
67596759
6760   prg32(space->machine(), data >> 2);
6761   chr8(space->machine(), data, CHRROM);
6760   prg32(space.machine(), data >> 2);
6761   chr8(space.machine(), data, CHRROM);
67626762}
67636763
67646764/*************************************************************
r17963r17964
68026802
68036803   if ((offset & 0x103) == 0x002)
68046804   {
6805      prg32(space->machine(), ((data >> 6) & 0x02) | ((data >> 2) & 0x01));
6806      chr8(space->machine(), data >> 3, CHRROM);
6805      prg32(space.machine(), ((data >> 6) & 0x02) | ((data >> 2) & 0x01));
6806      chr8(space.machine(), data >> 3, CHRROM);
68076807   }
68086808}
68096809
r17963r17964
68356835
68366836static WRITE8_HANDLER( tcu02_l_w )
68376837{
6838   nes_state *state = space->machine().driver_data<nes_state>();
6838   nes_state *state = space.machine().driver_data<nes_state>();
68396839   LOG_MMC(("tcu02_l_w, offset: %04x, data: %02x\n", offset, data));
68406840
68416841   if ((offset & 0x103) == 0x002)
68426842   {
68436843      state->m_mmc_latch1 = (data & 0x30) | ((data + 3) & 0x0f);
6844      chr8(space->machine(), state->m_mmc_latch1, CHRROM);
6844      chr8(space.machine(), state->m_mmc_latch1, CHRROM);
68456845   }
68466846}
68476847
68486848static READ8_HANDLER( tcu02_l_r )
68496849{
6850   nes_state *state = space->machine().driver_data<nes_state>();
6850   nes_state *state = space.machine().driver_data<nes_state>();
68516851   LOG_MMC(("tcu02_l_r, offset: %04x\n", offset));
68526852
68536853   if ((offset & 0x103) == 0x000)
r17963r17964
68676867
68686868static WRITE8_HANDLER( subor0_w )
68696869{
6870   nes_state *state = space->machine().driver_data<nes_state>();
6870   nes_state *state = space.machine().driver_data<nes_state>();
68716871   UINT8 subor_helper1, subor_helper2;
68726872   LOG_MMC(("subor0_w, offset: %04x, data: %02x\n", offset, data));
68736873
r17963r17964
68926892      subor_helper2 = 0x20;
68936893   }
68946894
6895   prg16_89ab(space->machine(), subor_helper1);
6896   prg16_cdef(space->machine(), subor_helper2);
6895   prg16_89ab(space.machine(), subor_helper1);
6896   prg16_cdef(space.machine(), subor_helper2);
68976897}
68986898
68996899/*************************************************************
r17963r17964
69066906
69076907static WRITE8_HANDLER( subor1_w )
69086908{
6909   nes_state *state = space->machine().driver_data<nes_state>();
6909   nes_state *state = space.machine().driver_data<nes_state>();
69106910   UINT8 subor_helper1, subor_helper2;
69116911   LOG_MMC(("subor1_w, offset: %04x, data: %02x\n", offset, data));
69126912
r17963r17964
69316931      subor_helper2 = 0x07;
69326932   }
69336933
6934   prg16_89ab(space->machine(), subor_helper1);
6935   prg16_cdef(space->machine(), subor_helper2);
6934   prg16_89ab(space.machine(), subor_helper1);
6935   prg16_cdef(space.machine(), subor_helper2);
69366936}
69376937
69386938/*************************************************************
r17963r17964
69906990
69916991static WRITE8_HANDLER( sgame_boog_l_w )
69926992{
6993   nes_state *state = space->machine().driver_data<nes_state>();
6993   nes_state *state = space.machine().driver_data<nes_state>();
69946994   LOG_MMC(("sgame_boog_l_w, offset: %04x, data: %02x\n", offset, data));
69956995   offset += 0x100;
69966996
69976997   if (offset == 0x1000)
69986998   {
69996999      state->m_mmc_reg[0] = data;
7000      sgame_boog_set_prg(space->machine());
7000      sgame_boog_set_prg(space.machine());
70017001   }
70027002   else if (offset == 0x1001)
70037003   {
70047004      state->m_mmc_reg[1] = data;
7005      mmc3_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
7005      mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
70067006   }
70077007   else if (offset == 0x1007)
70087008   {
70097009      state->m_mmc3_latch = 0;
70107010      state->m_mmc_reg[2] = data;
7011      sgame_boog_set_prg(space->machine());
7012      mmc3_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
7011      sgame_boog_set_prg(space.machine());
7012      mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
70137013   }
70147014}
70157015
70167016static WRITE8_HANDLER( sgame_boog_m_w )
70177017{
7018   nes_state *state = space->machine().driver_data<nes_state>();
7018   nes_state *state = space.machine().driver_data<nes_state>();
70197019   LOG_MMC(("sgame_boog_m_w, offset: %04x, data: %02x\n", offset, data));
70207020
70217021   if (offset == 0x0000)
70227022   {
70237023      state->m_mmc_reg[0] = data;
7024      sgame_boog_set_prg(space->machine());
7024      sgame_boog_set_prg(space.machine());
70257025   }
70267026   else if (offset == 0x0001)
70277027   {
70287028      state->m_mmc_reg[1] = data;
7029      mmc3_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
7029      mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
70307030   }
70317031   else if (offset == 0x0007)
70327032   {
70337033      state->m_mmc3_latch = 0;
70347034      state->m_mmc_reg[2] = data;
7035      sgame_boog_set_prg(space->machine());
7036      mmc3_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
7035      sgame_boog_set_prg(space.machine());
7036      mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
70377037   }
70387038}
70397039
70407040static WRITE8_HANDLER( sgame_boog_w )
70417041{
7042   nes_state *state = space->machine().driver_data<nes_state>();
7042   nes_state *state = space.machine().driver_data<nes_state>();
70437043   static const UINT8 conv_table[8] = {0,2,5,3,6,1,7,4};
70447044   LOG_MMC(("sgame_boog_w, offset: %04x, data: %02x\n", offset, data));
70457045
r17963r17964
70767076         if (!state->m_mmc_reg[2])
70777077            txrom_w(space, 0x4000, data);
70787078         else
7079            set_nt_mirroring(space->machine(), ((data >> 7) | data) & 0x01 ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
7079            set_nt_mirroring(space.machine(), ((data >> 7) | data) & 0x01 ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
70807080         break;
70817081
70827082      case 0x4001:
r17963r17964
71187118
71197119static WRITE8_HANDLER( sgame_lion_m_w )
71207120{
7121   nes_state *state = space->machine().driver_data<nes_state>();
7121   nes_state *state = space.machine().driver_data<nes_state>();
71227122   LOG_MMC(("sgame_lion_m_w, offset: %04x, data: %02x\n", offset, data));
71237123
71247124   state->m_map114_reg = data;
71257125
71267126   if (state->m_map114_reg & 0x80)
71277127   {
7128      prg16_89ab(space->machine(), data & 0x1f);
7129      prg16_cdef(space->machine(), data & 0x1f);
7128      prg16_89ab(space.machine(), data & 0x1f);
7129      prg16_cdef(space.machine(), data & 0x1f);
71307130   }
71317131   else
7132      mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
7132      mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
71337133
71347134}
71357135
71367136static WRITE8_HANDLER( sgame_lion_w )
71377137{
7138   nes_state *state = space->machine().driver_data<nes_state>();
7138   nes_state *state = space.machine().driver_data<nes_state>();
71397139   static const UINT8 conv_table[8] = {0, 3, 1, 5, 6, 7, 2, 4};
71407140   LOG_MMC(("sgame_lion_w, offset: %04x, data: %02x\n", offset, data));
71417141
r17963r17964
71447144      switch (offset & 0x6000)
71457145      {
71467146         case 0x0000:
7147            set_nt_mirroring(space->machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
7147            set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
71487148            break;
71497149         case 0x2000:
71507150            state->m_map114_reg_enabled = 1;
r17963r17964
71907190{
71917191   LOG_MMC(("tengen_800008_w, offset: %04x, data: %02x\n", offset, data));
71927192
7193   prg32(space->machine(), data >> 3);
7194   chr8(space->machine(), data, CHRROM);
7193   prg32(space.machine(), data >> 3);
7194   chr8(space.machine(), data, CHRROM);
71957195}
71967196
71977197/*************************************************************
r17963r17964
73027302
73037303static WRITE8_HANDLER( tengen_800032_w )
73047304{
7305   nes_state *state = space->machine().driver_data<nes_state>();
7305   nes_state *state = space.machine().driver_data<nes_state>();
73067306   UINT8 map64_helper, cmd;
73077307   LOG_MMC(("tengen_800032_w, offset: %04x, data: %02x\n", offset, data));
73087308
r17963r17964
73147314
73157315         /* Has PRG Mode changed? */
73167316         if (map64_helper & 0x40)
7317            tengen_800032_set_prg(space->machine());
7317            tengen_800032_set_prg(space.machine());
73187318
73197319         /* Has CHR Mode changed? */
73207320         if (map64_helper & 0xa0)
7321            tengen_800032_set_chr(space->machine());
7321            tengen_800032_set_chr(space.machine());
73227322         break;
73237323
73247324      case 0x0001:
r17963r17964
73297329         case 2: case 3:
73307330         case 4: case 5:
73317331            state->m_mmc_vrom_bank[cmd] = data;
7332            tengen_800032_set_chr(space->machine());
7332            tengen_800032_set_chr(space.machine());
73337333            break;
73347334         case 6: case 7:
73357335            state->m_mmc_prg_bank[cmd - 6] = data;
7336            tengen_800032_set_prg(space->machine());
7336            tengen_800032_set_prg(space.machine());
73377337            break;
73387338         case 8: case 9:
73397339            state->m_mmc_vrom_bank[cmd - 2] = data;
7340            tengen_800032_set_chr(space->machine());
7340            tengen_800032_set_chr(space.machine());
73417341            break;
73427342         case 0x0f:
73437343            state->m_mmc_prg_bank[2] = data;
7344            tengen_800032_set_prg(space->machine());
7344            tengen_800032_set_prg(space.machine());
73457345            break;
73467346      }
73477347         break;
73487348
73497349      case 0x2000:
7350         set_nt_mirroring(space->machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
7350         set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
73517351         break;
73527352
73537353      case 0x4000:
r17963r17964
73997399
74007400static WRITE8_HANDLER( tengen_800037_w )
74017401{
7402   nes_state *state = space->machine().driver_data<nes_state>();
7402   nes_state *state = space.machine().driver_data<nes_state>();
74037403   UINT8 map158_helper, cmd;
74047404   LOG_MMC(("tengen_800037_w, offset: %04x, data: %02x\n", offset, data));
74057405
r17963r17964
74117411
74127412         /* Has PRG Mode changed? */
74137413         if (map158_helper & 0x40)
7414            tengen_800032_set_prg(space->machine());
7414            tengen_800032_set_prg(space.machine());
74157415
74167416         /* Has CHR Mode changed? */
74177417         if (map158_helper & 0xa0)
74187418         {
7419            tengen_800032_set_chr(space->machine());
7420            tengen_800037_set_mirror(space->machine());
7419            tengen_800032_set_chr(space.machine());
7420            tengen_800037_set_mirror(space.machine());
74217421         }
74227422         break;
74237423
r17963r17964
74297429         case 2: case 3:
74307430         case 4: case 5:
74317431            state->m_mmc_vrom_bank[cmd] = data;
7432            tengen_800032_set_chr(space->machine());
7433            tengen_800037_set_mirror(space->machine());
7432            tengen_800032_set_chr(space.machine());
7433            tengen_800037_set_mirror(space.machine());
74347434            break;
74357435         case 6: case 7:
74367436            state->m_mmc_prg_bank[cmd - 6] = data;
7437            tengen_800032_set_prg(space->machine());
7437            tengen_800032_set_prg(space.machine());
74387438            break;
74397439         case 8: case 9:
74407440            state->m_mmc_vrom_bank[cmd - 2] = data;
7441            tengen_800032_set_chr(space->machine());
7442            tengen_800037_set_mirror(space->machine());
7441            tengen_800032_set_chr(space.machine());
7442            tengen_800037_set_mirror(space.machine());
74437443            break;
74447444         case 0x0f:
74457445            state->m_mmc_prg_bank[2] = data;
7446            tengen_800032_set_prg(space->machine());
7446            tengen_800032_set_prg(space.machine());
74477447            break;
74487448      }
74497449         break;
r17963r17964
74757475
74767476static WRITE8_HANDLER( txc_22211_l_w )
74777477{
7478   nes_state *state = space->machine().driver_data<nes_state>();
7478   nes_state *state = space.machine().driver_data<nes_state>();
74797479   LOG_MMC(("txc_22211_l_w, offset: %04x, data: %02x\n", offset, data));
74807480
74817481   if (offset < 4)
r17963r17964
74847484
74857485static READ8_HANDLER( txc_22211_l_r )
74867486{
7487   nes_state *state = space->machine().driver_data<nes_state>();
7487   nes_state *state = space.machine().driver_data<nes_state>();
74887488   LOG_MMC(("txc_22211_l_r, offset: %04x\n", offset));
74897489
74907490   if (offset == 0x0000)
r17963r17964
74957495
74967496static WRITE8_HANDLER( txc_22211_w )
74977497{
7498   nes_state *state = space->machine().driver_data<nes_state>();
7498   nes_state *state = space.machine().driver_data<nes_state>();
74997499   LOG_MMC(("txc_22211_w, offset: %04x, data: %02x\n", offset, data));
75007500
7501   prg32(space->machine(), state->m_txc_reg[2] >> 2);
7502   chr8(space->machine(), state->m_txc_reg[2], CHRROM);
7501   prg32(space.machine(), state->m_txc_reg[2] >> 2);
7502   chr8(space.machine(), state->m_txc_reg[2], CHRROM);
75037503}
75047504
75057505/*************************************************************
r17963r17964
75197519
75207520static WRITE8_HANDLER( txc_22211b_w )
75217521{
7522   nes_state *state = space->machine().driver_data<nes_state>();
7522   nes_state *state = space.machine().driver_data<nes_state>();
75237523   LOG_MMC(("txc_22211b_w, offset: %04x, data: %02x\n", offset, data));
75247524
7525   prg32(space->machine(), state->m_txc_reg[2] >> 2);
7526   chr8(space->machine(), (((data ^ state->m_txc_reg[2]) >> 3) & 0x02) | (((data ^ state->m_txc_reg[2]) >> 5) & 0x01), CHRROM);
7525   prg32(space.machine(), state->m_txc_reg[2] >> 2);
7526   chr8(space.machine(), (((data ^ state->m_txc_reg[2]) >> 3) & 0x02) | (((data ^ state->m_txc_reg[2]) >> 5) & 0x01), CHRROM);
75277527}
75287528
75297529/*************************************************************
r17963r17964
75437543
75447544static READ8_HANDLER( txc_22211c_l_r )
75457545{
7546   nes_state *state = space->machine().driver_data<nes_state>();
7546   nes_state *state = space.machine().driver_data<nes_state>();
75477547   LOG_MMC(("txc_22211c_l_r, offset: %04x\n", offset));
75487548
75497549   if (offset == 0x0000)
r17963r17964
75707570{
75717571   LOG_MMC(("txctw_l_w, offset: %04x, data: %02x\n", offset, data));
75727572
7573   prg32(space->machine(), (data >> 4) | data);
7573   prg32(space.machine(), (data >> 4) | data);
75747574}
75757575
75767576static WRITE8_HANDLER( txc_tw_m_w )
r17963r17964
76067606
76077607   if ((offset >= 0x400) && (offset < 0x7fff))
76087608   {
7609      prg32(space->machine(), data >> 4);
7610      chr8(space->machine(), data & 0x0f, CHRROM);
7609      prg32(space.machine(), data >> 4);
7610      chr8(space.machine(), data & 0x0f, CHRROM);
76117611   }
76127612}
76137613
r17963r17964
76367636{
76377637   LOG_MMC(("txc_mxmdhtwo_w, offset: %04x, data: %02x\n", offset, data));
76387638
7639   prg32(space->machine(), data);
7639   prg32(space.machine(), data);
76407640}
76417641
76427642/*************************************************************
r17963r17964
76987698   switch (offset & 0x6001)
76997699   {
77007700      case 0x2000:
7701         waixing_set_mirror(space->machine(), data);   //maybe data & 0x03?
7701         waixing_set_mirror(space.machine(), data);   //maybe data & 0x03?
77027702         break;
77037703
77047704      case 0x2001:
r17963r17964
78157815
78167816static WRITE8_HANDLER( waixing_f_w )
78177817{
7818   nes_state *state = space->machine().driver_data<nes_state>();
7818   nes_state *state = space.machine().driver_data<nes_state>();
78197819   UINT8 cmd;
78207820   LOG_MMC(("waixing_f_w, offset: %04x, data: %02x\n", offset, data));
78217821
r17963r17964
78267826         if (cmd >= 6)
78277827         {
78287828            state->m_mmc_prg_bank[cmd - 6] = data & ((data > 0x3f) ? 0x4f : 0x3f);
7829            mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
7829            mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
78307830         }
78317831         else
78327832            waixing_a_w(space, offset, data);
r17963r17964
78767876
78777877static WRITE8_HANDLER( waixing_g_w )
78787878{
7879   nes_state *state = space->machine().driver_data<nes_state>();
7879   nes_state *state = space.machine().driver_data<nes_state>();
78807880   UINT8 MMC3_helper, cmd;
78817881   LOG_MMC(("waixing_g_w, offset: %04x, data: %02x\n", offset, data));
78827882
r17963r17964
78887888
78897889         /* Has PRG Mode changed? */
78907890         if (MMC3_helper & 0x40)
7891            mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
7891            mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
78927892
78937893         /* Has CHR Mode changed? */
78947894         if (MMC3_helper & 0x80)
7895            waixing_g_set_chr(space->machine(), state->m_mmc_chr_base, state->m_mmc_chr_mask);
7895            waixing_g_set_chr(space.machine(), state->m_mmc_chr_base, state->m_mmc_chr_mask);
78967896         break;
78977897
78987898      case 0x0001:
r17963r17964
79027902         case 0: case 1:   // these do not need to be separated: we take care of them in set_chr!
79037903         case 2: case 3: case 4: case 5:
79047904            state->m_mmc_vrom_bank[cmd] = data;
7905            waixing_g_set_chr(space->machine(), state->m_mmc_chr_base, state->m_mmc_chr_mask);
7905            waixing_g_set_chr(space.machine(), state->m_mmc_chr_base, state->m_mmc_chr_mask);
79067906            break;
79077907         case 6:
79087908         case 7:
79097909         case 8:
79107910         case 9:
79117911            state->m_mmc_prg_bank[cmd - 6] = data;
7912            mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
7912            mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
79137913            break;
79147914         case 0x0a: case 0x0b:
79157915            state->m_mmc_vrom_bank[cmd - 4] = data;
7916            waixing_g_set_chr(space->machine(), state->m_mmc_chr_base, state->m_mmc_chr_mask);
7916            waixing_g_set_chr(space.machine(), state->m_mmc_chr_base, state->m_mmc_chr_mask);
79177917            break;
79187918         }
79197919         break;
r17963r17964
79477947
79487948static WRITE8_HANDLER( waixing_h_w )
79497949{
7950   nes_state *state = space->machine().driver_data<nes_state>();
7950   nes_state *state = space.machine().driver_data<nes_state>();
79517951   UINT8 cmd;
79527952   LOG_MMC(("waixing_h_w, offset: %04x, data: %02x\n", offset, data));
79537953
r17963r17964
79607960         case 0:    // in this case we set prg_base in addition to state->m_mmc_vrom_bank!
79617961            state->m_mmc_prg_base = (data << 5) & 0x40;
79627962            state->m_mmc_prg_mask = 0x3f;
7963            mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
7963            mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
79647964            txrom_w(space, offset, data);
79657965         default:
79667966            txrom_w(space, offset, data);
r17963r17964
79937993
79947994static WRITE8_HANDLER( waixing_sgz_w )
79957995{
7996   nes_state *state = space->machine().driver_data<nes_state>();
7996   nes_state *state = space.machine().driver_data<nes_state>();
79977997   UINT8 mmc_helper, bank;
79987998   LOG_MMC(("waixing_sgz_w, offset: %04x, data: %02x\n", offset, data));
79997999
80008000   switch (offset & 0x7000)
80018001   {
80028002      case 0x0000:
8003         prg8_89(space->machine(), data);
8003         prg8_89(space.machine(), data);
80048004         break;
80058005      case 0x2000:
8006         prg8_ab(space->machine(), data);
8006         prg8_ab(space.machine(), data);
80078007         break;
80088008      case 0x3000:
80098009      case 0x4000:
r17963r17964
80158015            state->m_mmc_vrom_bank[bank] = (state->m_mmc_vrom_bank[bank] & 0x0f) | ((data & 0x0f) << 4);
80168016         else
80178017            state->m_mmc_vrom_bank[bank] = (state->m_mmc_vrom_bank[bank] & 0xf0) | (data & 0x0f);
8018         chr1_x(space->machine(), bank, state->m_mmc_vrom_bank[bank], CHRROM);
8018         chr1_x(space.machine(), bank, state->m_mmc_vrom_bank[bank], CHRROM);
80198019         break;
80208020      case 0x7000:
80218021         switch (offset & 0x0c)
r17963r17964
80568056
80578057static WRITE8_HANDLER( waixing_sgzlz_l_w )
80588058{
8059   nes_state *state = space->machine().driver_data<nes_state>();
8059   nes_state *state = space.machine().driver_data<nes_state>();
80608060   LOG_MMC(("waixing_sgzlz_l_w, offset: %04x, data: %02x\n", offset, data));
80618061
80628062   switch (offset)
80638063   {
80648064      case 0x700:
8065         set_nt_mirroring(space->machine(), data ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
8065         set_nt_mirroring(space.machine(), data ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
80668066         break;
80678067      case 0x701:
80688068         state->m_mmc_latch1 = (state->m_mmc_latch1 & 0x0c) | ((data >> 1) & 0x03);
8069         prg32(space->machine(), state->m_mmc_latch1);
8069         prg32(space.machine(), state->m_mmc_latch1);
80708070         break;
80718071      case 0x702:
80728072         state->m_mmc_latch1 = (state->m_mmc_latch1 & 0x03) | ((data << 2) & 0x0c);
r17963r17964
80898089
80908090static WRITE8_HANDLER( waixing_ffv_l_w )
80918091{
8092   nes_state *state = space->machine().driver_data<nes_state>();
8092   nes_state *state = space.machine().driver_data<nes_state>();
80938093   UINT8 mmc_helper;
80948094   LOG_MMC(("waixing_ffv_l_w, offset: %04x, data: %02x\n", offset, data));
80958095   offset += 0x100; /* the checks work better on addresses */
r17963r17964
81048104         case 0x20:
81058105         case 0x40:
81068106         case 0x60:
8107            prg16_89ab(space->machine(), mmc_helper | ((state->m_mmc_reg[0] >> 1) & 0x10) | (state->m_mmc_reg[0] & 0x0f));
8108            prg16_cdef(space->machine(), mmc_helper & 0x1f);
8107            prg16_89ab(space.machine(), mmc_helper | ((state->m_mmc_reg[0] >> 1) & 0x10) | (state->m_mmc_reg[0] & 0x0f));
8108            prg16_cdef(space.machine(), mmc_helper & 0x1f);
81098109            break;
81108110         case 0x50:
8111            prg32(space->machine(), (mmc_helper >> 1) | (state->m_mmc_reg[0] & 0x0f));
8111            prg32(space.machine(), (mmc_helper >> 1) | (state->m_mmc_reg[0] & 0x0f));
81128112            break;
81138113         case 0x70:
8114            prg16_89ab(space->machine(), mmc_helper | ((state->m_mmc_reg[0] << 1) & 0x10) | (state->m_mmc_reg[0] & 0x0f));
8115            prg16_cdef(space->machine(), mmc_helper & 0x1f);
8114            prg16_89ab(space.machine(), mmc_helper | ((state->m_mmc_reg[0] << 1) & 0x10) | (state->m_mmc_reg[0] & 0x0f));
8115            prg16_cdef(space.machine(), mmc_helper & 0x1f);
81168116            break;
81178117      }
81188118   }
r17963r17964
81418141{
81428142   LOG_MMC(("waixing_zs_w, offset: %04x, data: %02x\n", offset, data));
81438143
8144   prg32(space->machine(), offset >> 3);
8144   prg32(space.machine(), offset >> 3);
81458145
81468146   switch (data & 0x03)
81478147   {
8148      case 0: set_nt_mirroring(space->machine(), PPU_MIRROR_VERT); break;
8149      case 1: set_nt_mirroring(space->machine(), PPU_MIRROR_HORZ); break;
8150      case 2: set_nt_mirroring(space->machine(), PPU_MIRROR_LOW); break;
8151      case 3: set_nt_mirroring(space->machine(), PPU_MIRROR_HIGH); break;
8148      case 0: set_nt_mirroring(space.machine(), PPU_MIRROR_VERT); break;
8149      case 1: set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); break;
8150      case 2: set_nt_mirroring(space.machine(), PPU_MIRROR_LOW); break;
8151      case 3: set_nt_mirroring(space.machine(), PPU_MIRROR_HIGH); break;
81528152   }
81538153}
81548154
r17963r17964
81718171{
81728172   LOG_MMC(("waixing_dq8_w, offset: %04x, data: %02x\n", offset, data));
81738173
8174   prg32(space->machine(), offset >> 3);
8174   prg32(space.machine(), offset >> 3);
81758175}
81768176
81778177
r17963r17964
81948194
81958195   LOG_MMC(("waixing_ps2_w, offset: %04x, data: %02x\n", offset, data));
81968196
8197   set_nt_mirroring(space->machine(), BIT(data, 6) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
8197   set_nt_mirroring(space.machine(), BIT(data, 6) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
81988198
81998199   switch (offset & 0x0fff)
82008200   {
82018201      case 0x000:
8202         prg8_89(space->machine(), (map15_helper + 0) ^ map15_flip);
8203         prg8_ab(space->machine(), (map15_helper + 1) ^ map15_flip);
8204         prg8_cd(space->machine(), (map15_helper + 2) ^ map15_flip);
8205         prg8_ef(space->machine(), (map15_helper + 3) ^ map15_flip);
8202         prg8_89(space.machine(), (map15_helper + 0) ^ map15_flip);
8203         prg8_ab(space.machine(), (map15_helper + 1) ^ map15_flip);
8204         prg8_cd(space.machine(), (map15_helper + 2) ^ map15_flip);
8205         prg8_ef(space.machine(), (map15_helper + 3) ^ map15_flip);
82068206         break;
82078207      case 0x001:
82088208         map15_helper |= map15_flip;
8209         prg8_89(space->machine(), map15_helper);
8210         prg8_ab(space->machine(), map15_helper + 1);
8211         prg8_cd(space->machine(), map15_helper + 1);
8212         prg8_ef(space->machine(), map15_helper + 1);
8209         prg8_89(space.machine(), map15_helper);
8210         prg8_ab(space.machine(), map15_helper + 1);
8211         prg8_cd(space.machine(), map15_helper + 1);
8212         prg8_ef(space.machine(), map15_helper + 1);
82138213         break;
82148214      case 0x002:
82158215         map15_helper |= map15_flip;
8216         prg8_89(space->machine(), map15_helper);
8217         prg8_ab(space->machine(), map15_helper);
8218         prg8_cd(space->machine(), map15_helper);
8219         prg8_ef(space->machine(), map15_helper);
8216         prg8_89(space.machine(), map15_helper);
8217         prg8_ab(space.machine(), map15_helper);
8218         prg8_cd(space.machine(), map15_helper);
8219         prg8_ef(space.machine(), map15_helper);
82208220         break;
82218221      case 0x003:
82228222         map15_helper |= map15_flip;
8223         prg8_89(space->machine(), map15_helper);
8224         prg8_ab(space->machine(), map15_helper + 1);
8225         prg8_cd(space->machine(), map15_helper);
8226         prg8_ef(space->machine(), map15_helper + 1);
8223         prg8_89(space.machine(), map15_helper);
8224         prg8_ab(space.machine(), map15_helper + 1);
8225         prg8_cd(space.machine(), map15_helper);
8226         prg8_ef(space.machine(), map15_helper + 1);
82278227         break;
82288228   }
82298229}
r17963r17964
82668266
82678267static WRITE8_HANDLER( waixing_sec_l_w )
82688268{
8269   nes_state *state = space->machine().driver_data<nes_state>();
8269   nes_state *state = space.machine().driver_data<nes_state>();
82708270   LOG_MMC(("waixing_sec_l_w, offset: %04x, data: %02x\n", offset, data));
82718271
82728272   offset += 0x100;
r17963r17964
82748274   if (offset == 0x1000)
82758275   {
82768276      state->m_mmc_reg[0] = data & 0x02;
8277      mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
8278      mmc3_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
8277      mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
8278      mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
82798279   }
82808280}
82818281
r17963r17964
83038303
83048304READ8_HANDLER( waixing_sh2_chr_r )
83058305{
8306   nes_state *state = space->machine().driver_data<nes_state>();
8306   nes_state *state = space.machine().driver_data<nes_state>();
83078307   int bank = offset >> 10;
83088308   UINT8 val = state->m_chr_map[bank].access[offset & 0x3ff];   // this would be usual return value
83098309   int chr_helper;
r17963r17964
83178317
83188318   state->m_mmc_reg[offset >> 12] = chr_helper;
83198319   if (offset & 0x1000)
8320      chr4_4(space->machine(), state->m_mmc_reg[1], state->m_mmc_reg[1] ? CHRRAM : CHRROM);
8320      chr4_4(space.machine(), state->m_mmc_reg[1], state->m_mmc_reg[1] ? CHRRAM : CHRROM);
83218321   else
8322      chr4_0(space->machine(), state->m_mmc_reg[0], state->m_mmc_reg[0] ? CHRRAM : CHRROM);
8322      chr4_0(space.machine(), state->m_mmc_reg[0], state->m_mmc_reg[0] ? CHRRAM : CHRROM);
83238323
83248324   return val;
83258325}
r17963r17964
83548354
83558355static WRITE8_HANDLER( unl_8237_l_w )
83568356{
8357   nes_state *state = space->machine().driver_data<nes_state>();
8357   nes_state *state = space.machine().driver_data<nes_state>();
83588358   LOG_MMC(("unl_8237_l_w offset: %04x, data: %02x\n", offset, data));
83598359   offset += 0x100;
83608360
r17963r17964
83648364      if (state->m_mmc_reg[0] & 0x80)
83658365      {
83668366         if (state->m_mmc_reg[0] & 0x20)
8367            prg32(space->machine(), (state->m_mmc_reg[0] & 0x0f) >> 1);
8367            prg32(space.machine(), (state->m_mmc_reg[0] & 0x0f) >> 1);
83688368         else
83698369         {
8370            prg16_89ab(space->machine(), state->m_mmc_reg[0] & 0x1f);
8371            prg16_cdef(space->machine(), state->m_mmc_reg[0] & 0x1f);
8370            prg16_89ab(space.machine(), state->m_mmc_reg[0] & 0x1f);
8371            prg16_cdef(space.machine(), state->m_mmc_reg[0] & 0x1f);
83728372         }
83738373      }
83748374      else
8375         mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
8375         mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
83768376   }
83778377
83788378   if (offset == 0x1001)
83798379   {
83808380      state->m_mmc_reg[1] = data;
8381      mmc3_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
8381      mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
83828382   }
83838383}
83848384
83858385static WRITE8_HANDLER( unl_8237_w )
83868386{
8387   nes_state *state = space->machine().driver_data<nes_state>();
8387   nes_state *state = space.machine().driver_data<nes_state>();
83888388   static const UINT8 conv_table[8] = {0, 2, 6, 1, 7, 3, 4, 5};
83898389   LOG_MMC(("unl_8237_w offset: %04x, data: %02x\n", offset, data));
83908390
r17963r17964
83928392   {
83938393      case 0x0000:
83948394      case 0x1000:
8395         set_nt_mirroring(space->machine(), (data | (data >> 7)) & 0x01 ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
8395         set_nt_mirroring(space.machine(), (data | (data >> 7)) & 0x01 ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
83968396         break;
83978397
83988398      case 0x2000:
r17963r17964
84418441
84428442static WRITE8_HANDLER( unl_ax5705_w )
84438443{
8444   nes_state *state = space->machine().driver_data<nes_state>();
8444   nes_state *state = space.machine().driver_data<nes_state>();
84458445   UINT8 bank;
84468446   LOG_MMC(("unl_ax5705_w offset: %04x, data: %02x\n", offset, data));
84478447
r17963r17964
84498449   {
84508450      case 0x0000:
84518451         state->m_mmc_prg_bank[0] = (data & 0x05) | ((data & 0x08) >> 2) | ((data & 0x02) << 2);
8452         unl_ax5705_set_prg(space->machine());
8452         unl_ax5705_set_prg(space.machine());
84538453         break;
84548454      case 0x0008:
8455         set_nt_mirroring(space->machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
8455         set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
84568456         break;
84578457      case 0x2000:
84588458         state->m_mmc_prg_bank[1] = (data & 0x05) | ((data & 0x08) >> 2) | ((data & 0x02) << 2);
8459         unl_ax5705_set_prg(space->machine());
8459         unl_ax5705_set_prg(space.machine());
84608460         break;
84618461         /* CHR banks 0, 1, 4, 5 */
84628462      case 0x2008:
r17963r17964
84658465      case 0x400a:
84668466         bank = ((offset & 0x4000) ? 4 : 0) + ((offset & 0x0002) ? 1 : 0);
84678467         state->m_mmc_vrom_bank[bank] = (state->m_mmc_vrom_bank[bank] & 0xf0) | (data & 0x0f);
8468         chr1_x(space->machine(), bank, state->m_mmc_vrom_bank[bank], CHRROM);
8468         chr1_x(space.machine(), bank, state->m_mmc_vrom_bank[bank], CHRROM);
84698469         break;
84708470      case 0x2009:
84718471      case 0x200b:
r17963r17964
84738473      case 0x400b:
84748474         bank = ((offset & 0x4000) ? 4 : 0) + ((offset & 0x0002) ? 1 : 0);
84758475         state->m_mmc_vrom_bank[bank] = (state->m_mmc_vrom_bank[bank] & 0x0f) | ((data & 0x04) << 3) | ((data & 0x02) << 5) | ((data & 0x09) << 4);
8476         chr1_x(space->machine(), bank, state->m_mmc_vrom_bank[bank], CHRROM);
8476         chr1_x(space.machine(), bank, state->m_mmc_vrom_bank[bank], CHRROM);
84778477         break;
84788478         /* CHR banks 2, 3, 6, 7 */
84798479      case 0x4000:
r17963r17964
84828482      case 0x6002:
84838483         bank = 2 + ((offset & 0x2000) ? 4 : 0) + ((offset & 0x0002) ? 1 : 0);
84848484         state->m_mmc_vrom_bank[bank] = (state->m_mmc_vrom_bank[bank] & 0xf0) | (data & 0x0f);
8485         chr1_x(space->machine(), bank, state->m_mmc_vrom_bank[bank], CHRROM);
8485         chr1_x(space.machine(), bank, state->m_mmc_vrom_bank[bank], CHRROM);
84868486         break;
84878487      case 0x4001:
84888488      case 0x4003:
r17963r17964
84908490      case 0x6003:
84918491         bank = 2 + ((offset & 0x2000) ? 4 : 0) + ((offset & 0x0002) ? 1 : 0);
84928492         state->m_mmc_vrom_bank[bank] = (state->m_mmc_vrom_bank[bank] & 0x0f) | ((data & 0x04) << 3) | ((data & 0x02) << 5) | ((data & 0x09) << 4);
8493         chr1_x(space->machine(), bank, state->m_mmc_vrom_bank[bank], CHRROM);
8493         chr1_x(space.machine(), bank, state->m_mmc_vrom_bank[bank], CHRROM);
84948494         break;
84958495   }
84968496}
r17963r17964
85098509{
85108510   LOG_MMC(("unl_cc21_w offset: %04x, data: %02x\n", offset, data));
85118511
8512   set_nt_mirroring(space->machine(), BIT(data, 1) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW);
8513   chr8(space->machine(), (offset & 0x01), CHRROM);
8512   set_nt_mirroring(space.machine(), BIT(data, 1) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW);
8513   chr8(space.machine(), (offset & 0x01), CHRROM);
85148514}
85158515
85168516/*************************************************************
r17963r17964
86058605
86068606static WRITE8_HANDLER( unl_t230_w )
86078607{
8608   nes_state *state = space->machine().driver_data<nes_state>();
8608   nes_state *state = space.machine().driver_data<nes_state>();
86098609   UINT8 bank;
86108610   LOG_MMC(("unl_t230_w offset: %04x, data: %02x\n", offset, data));
86118611
r17963r17964
86148614      case 0x0000:
86158615         break;
86168616      case 0x2000:
8617         prg16_89ab(space->machine(), data);
8617         prg16_89ab(space.machine(), data);
86188618         break;
86198619
86208620      // the part below works like VRC-2. how was the original board wired up?
r17963r17964
86258625      case 0x100c:
86268626         switch (data & 0x03)
86278627         {
8628         case 0x00: set_nt_mirroring(space->machine(), PPU_MIRROR_VERT); break;
8629         case 0x01: set_nt_mirroring(space->machine(), PPU_MIRROR_HORZ); break;
8630         case 0x02: set_nt_mirroring(space->machine(), PPU_MIRROR_LOW); break;
8631         case 0x03: set_nt_mirroring(space->machine(), PPU_MIRROR_HIGH); break;
8628         case 0x00: set_nt_mirroring(space.machine(), PPU_MIRROR_VERT); break;
8629         case 0x01: set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); break;
8630         case 0x02: set_nt_mirroring(space.machine(), PPU_MIRROR_LOW); break;
8631         case 0x03: set_nt_mirroring(space.machine(), PPU_MIRROR_HIGH); break;
86328632         }
86338633         break;
86348634
r17963r17964
86548654         else
86558655            state->m_mmc_vrom_bank[bank] = (state->m_mmc_vrom_bank[bank] & 0xf0) | (data & 0x0f);
86568656
8657         chr1_x(space->machine(), bank, state->m_mmc_vrom_bank[bank], state->m_mmc_chr_source);
8657         chr1_x(space.machine(), bank, state->m_mmc_vrom_bank[bank], state->m_mmc_chr_source);
86588658         break;
86598659      case 0x7000:
86608660         state->m_IRQ_count_latch &= ~0x0f;
r17963r17964
87148714
87158715static WRITE8_HANDLER( kof96_l_w )
87168716{
8717   nes_state *state = space->machine().driver_data<nes_state>();
8717   nes_state *state = space.machine().driver_data<nes_state>();
87188718   UINT8 new_bank;
87198719   LOG_MMC(("kof96_l_w, offset: %04x, data: %02x\n", offset, data));
87208720   offset += 0x100;
r17963r17964
87288728         new_bank = (state->m_mmc_reg[0] & 0x1f);
87298729
87308730         if (state->m_mmc_reg[0] & 0x20)
8731            prg32(space->machine(), new_bank >> 2);
8731            prg32(space.machine(), new_bank >> 2);
87328732         else
87338733         {
8734            prg16_89ab(space->machine(), new_bank);
8735            prg16_cdef(space->machine(), new_bank);
8734            prg16_89ab(space.machine(), new_bank);
8735            prg16_cdef(space.machine(), new_bank);
87368736         }
87378737      }
87388738      else
8739         mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
8739         mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
87408740   }
87418741
87428742   if (offset >= 0x1000)
r17963r17964
87608760   if (!state->m_mmc_reg[3] && offset > 0x1000)
87618761   {
87628762      state->m_mmc_reg[3] = 1;
8763      space->write_byte(0x4017, 0x40);
8763      space.write_byte(0x4017, 0x40);
87648764   }
87658765}
87668766
87678767static READ8_HANDLER( kof96_l_r )
87688768{
8769   nes_state *state = space->machine().driver_data<nes_state>();
8769   nes_state *state = space.machine().driver_data<nes_state>();
87708770   LOG_MMC(("kof96_l_r, offset: %04x\n", offset));
87718771   offset += 0x100;
87728772
r17963r17964
87788778
87798779static WRITE8_HANDLER( kof96_w )
87808780{
8781   nes_state *state = space->machine().driver_data<nes_state>();
8781   nes_state *state = space.machine().driver_data<nes_state>();
87828782   LOG_MMC(("kof96_w, offset: %04x, data: %02x\n", offset, data));
87838783
87848784   switch (offset & 0x6003)
r17963r17964
88008800         state->m_mmc_reg[2] = 0;
88018801
88028802         if (data == 0x28)
8803            prg8_cd(space->machine(), 0x17);
8803            prg8_cd(space.machine(), 0x17);
88048804         else if (data == 0x2a)
8805            prg8_ab(space->machine(), 0x0f);
8805            prg8_ab(space.machine(), 0x0f);
88068806         break;
88078807
88088808      default:
r17963r17964
88298829
88308830static WRITE8_HANDLER( mk2_m_w )
88318831{
8832   nes_state *state = space->machine().driver_data<nes_state>();
8832   nes_state *state = space.machine().driver_data<nes_state>();
88338833   LOG_MMC(("mk2_m_w, offset: %04x, data: %02x\n", offset, data));
88348834
88358835   switch (offset & 0x1000)
r17963r17964
88378837      case 0x0000:
88388838         switch (offset & 0x03)
88398839         {
8840         case 0x00: chr2_0(space->machine(), data, CHRROM); break;
8841         case 0x01: chr2_2(space->machine(), data, CHRROM); break;
8842         case 0x02: chr2_4(space->machine(), data, CHRROM); break;
8843         case 0x03: chr2_6(space->machine(), data, CHRROM); break;
8840         case 0x00: chr2_0(space.machine(), data, CHRROM); break;
8841         case 0x01: chr2_2(space.machine(), data, CHRROM); break;
8842         case 0x02: chr2_4(space.machine(), data, CHRROM); break;
8843         case 0x03: chr2_6(space.machine(), data, CHRROM); break;
88448844         }
88458845         break;
88468846      case 0x1000:
88478847         switch (offset & 0x03)
88488848         {
8849         case 0x00: prg8_89(space->machine(), data); break;
8850         case 0x01: prg8_ab(space->machine(), data); break;
8849         case 0x00: prg8_89(space.machine(), data); break;
8850         case 0x01: prg8_ab(space.machine(), data); break;
88518851         case 0x02: state->m_IRQ_enable = 0; state->m_IRQ_count = 0; break;
88528852         case 0x03: state->m_IRQ_enable = 1; state->m_IRQ_count = 7; break;
88538853         }
r17963r17964
88858885
88868886static WRITE8_HANDLER( n625092_w )
88878887{
8888   nes_state *state = space->machine().driver_data<nes_state>();
8888   nes_state *state = space.machine().driver_data<nes_state>();
88898889   LOG_MMC(("n625092_w, offset: %04x, data: %02x\n", offset, data));
88908890
88918891   if (offset < 0x4000)
88928892   {
8893      set_nt_mirroring(space->machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
8893      set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
88948894      offset = (offset >> 1) & 0xff;
88958895
88968896      if (state->m_mmc_latch1 != offset)
88978897      {
88988898         state->m_mmc_latch1 = offset;
8899         n625092_set_prg(space->machine(), state->m_mmc_latch1, state->m_mmc_latch2);
8899         n625092_set_prg(space.machine(), state->m_mmc_latch1, state->m_mmc_latch2);
89008900      }
89018901   }
89028902   else
r17963r17964
89068906      if (state->m_mmc_latch2 != offset)
89078907      {
89088908         state->m_mmc_latch2 = offset;
8909         n625092_set_prg(space->machine(), state->m_mmc_latch1, state->m_mmc_latch2);
8909         n625092_set_prg(space.machine(), state->m_mmc_latch1, state->m_mmc_latch2);
89108910      }
89118911   }
89128912}
r17963r17964
89438943
89448944static WRITE8_HANDLER( sc127_w )
89458945{
8946   nes_state *state = space->machine().driver_data<nes_state>();
8946   nes_state *state = space.machine().driver_data<nes_state>();
89478947   LOG_MMC(("sc127_w, offset: %04x, data: %02x\n", offset, data));
89488948
89498949   switch (offset)
89508950   {
89518951      case 0x0000:
8952         prg8_89(space->machine(), data);
8952         prg8_89(space.machine(), data);
89538953         break;
89548954      case 0x0001:
8955         prg8_ab(space->machine(), data);
8955         prg8_ab(space.machine(), data);
89568956         break;
89578957      case 0x0002:
89588958         //      state->m_mmc_prg_bank[offset & 0x02] = data;
8959         prg8_cd(space->machine(), data);
8959         prg8_cd(space.machine(), data);
89608960         break;
89618961      case 0x1000:
89628962      case 0x1001:
r17963r17964
89678967      case 0x1006:
89688968      case 0x1007:
89698969         //      state->m_mmc_vrom_bank[offset & 0x07] = data;
8970         chr1_x(space->machine(), offset & 0x07, data, CHRROM);
8970         chr1_x(space.machine(), offset & 0x07, data, CHRROM);
89718971         break;
89728972      case 0x4002:
89738973         state->m_IRQ_enable = 0;
r17963r17964
89798979         state->m_IRQ_count = data;
89808980         break;
89818981      case 0x5001:
8982         set_nt_mirroring(space->machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
8982         set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
89838983         break;
89848984   }
89858985}
r17963r17964
89998999
90009000static WRITE8_HANDLER( smb2j_w )
90019001{
9002   nes_state *state = space->machine().driver_data<nes_state>();
9002   nes_state *state = space.machine().driver_data<nes_state>();
90039003   int bank = (((offset >> 8) & 0x03) * 0x20) + (offset & 0x1f);
90049004
90059005   LOG_MMC(("smb2j_w, offset: %04x, data: %02x\n", offset, data));
90069006
9007   set_nt_mirroring(space->machine(), (offset & 0x2000) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
9007   set_nt_mirroring(space.machine(), (offset & 0x2000) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
90089008
90099009   if (offset & 0x0800)
90109010   {
r17963r17964
90189018         else
90199019         {
90209020            LOG_MMC(("smb2j_w, selecting upper 16KB bank of #%02x\n", bank));
9021            prg16_cdef(space->machine(), 2 * bank + 1);
9021            prg16_cdef(space.machine(), 2 * bank + 1);
90229022         }
90239023      }
90249024      else
r17963r17964
90319031         else
90329032         {
90339033            LOG_MMC(("smb2j_w, selecting lower 16KB bank of #%02x\n", bank));
9034            prg16_89ab(space->machine(), 2 * bank);
9034            prg16_89ab(space.machine(), 2 * bank);
90359035         }
90369036      }
90379037   }
r17963r17964
90479047      else
90489048      {
90499049         LOG_MMC(("smb2j_w, selecting 32KB bank #%02x\n", bank));
9050         prg32(space->machine(), bank);
9050         prg32(space.machine(), bank);
90519051      }
90529052   }
90539053}
r17963r17964
90879087
90889088static WRITE8_HANDLER( smb2jb_l_w )
90899089{
9090   nes_state *state = space->machine().driver_data<nes_state>();
9090   nes_state *state = space.machine().driver_data<nes_state>();
90919091   UINT8 prg;
90929092   LOG_MMC(("smb2jb_l_w, offset: %04x, data: %02x\n", offset, data));
90939093   offset += 0x100;
r17963r17964
90969096   {
90979097      case 0x020:
90989098         prg = (data & 0x08) | ((data & 0x06) >> 1) | ((data & 0x01) << 2);
9099         prg8_cd(space->machine(), prg);
9099         prg8_cd(space.machine(), prg);
91009100         break;
91019101      case 0x120:
91029102         state->m_IRQ_enable = data & 0x01;
r17963r17964
91119111   LOG_MMC(("smb2jb_extra_w, offset: %04x, data: %02x\n", offset, data));
91129112
91139113   prg = (data & 0x08) | ((data & 0x06) >> 1) | ((data & 0x01) << 2);
9114   prg8_cd(space->machine(), prg);
9114   prg8_cd(space.machine(), prg);
91159115}
91169116
91179117/*************************************************************
r17963r17964
91369136
91379137static WRITE8_HANDLER( unl_sf3_w )
91389138{
9139   nes_state *state = space->machine().driver_data<nes_state>();
9139   nes_state *state = space.machine().driver_data<nes_state>();
91409140   UINT8 mmc_helper, cmd;
91419141   LOG_MMC(("unl_sf3_w, offset: %04x, data: %02x\n", offset, data));
91429142
r17963r17964
91489148
91499149         /* Has PRG Mode changed? */
91509150         if (mmc_helper & 0x40)
9151            mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
9151            mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
91529152
91539153         /* Has CHR Mode changed? */
91549154         if (mmc_helper & 0x80)
9155            unl_sf3_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
9155            unl_sf3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
91569156         break;
91579157
91589158      case 0x0001:
r17963r17964
91619161         {
91629162         case 0: case 2: case 4:
91639163            state->m_mmc_vrom_bank[cmd >> 1] = data;
9164            unl_sf3_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
9164            unl_sf3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
91659165            break;
91669166         case 6:
91679167         case 7:
91689168            state->m_mmc_prg_bank[cmd - 6] = data;
9169            mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
9169            mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
91709170            break;
91719171         }
91729172         break;
r17963r17964
91999199   switch (offset)
92009200   {
92019201      case 0x1ef1:   /* 0x5ff1 */
9202         prg32(space->machine(), data >> 1);
9202         prg32(space.machine(), data >> 1);
92039203         break;
92049204      case 0x1ef2:   /* 0x5ff2 */
9205         chr8(space->machine(), data, CHRROM);
9205         chr8(space.machine(), data, CHRROM);
92069206         break;
92079207   }
92089208}
r17963r17964
92259225
92269226static WRITE8_HANDLER( unl_racmate_w )
92279227{
9228   nes_state *state = space->machine().driver_data<nes_state>();
9228   nes_state *state = space.machine().driver_data<nes_state>();
92299229   LOG_MMC(("unl_racmate_w offset: %04x, data: %02x\n", offset, data));
92309230
92319231   if (offset == 0x3000)
92329232   {
92339233      state->m_mmc_latch1 = data;
9234      racmate_update_banks(space->machine());
9234      racmate_update_banks(space.machine());
92359235   }
92369236}
92379237
r17963r17964
92509250
92519251static WRITE8_HANDLER( unl_fs304_l_w )
92529252{
9253   nes_state *state = space->machine().driver_data<nes_state>();
9253   nes_state *state = space.machine().driver_data<nes_state>();
92549254   LOG_MMC(("unl_fs304_l_w, offset: %04x, data: %02x\n", offset, data));
92559255   int bank;
92569256   offset += 0x100;
r17963r17964
92599259   {
92609260      state->m_mmc_reg[(offset >> 8) & 3] = data;
92619261      bank = ((state->m_mmc_reg[2] & 0x0f) << 4) | BIT(state->m_mmc_reg[1], 1) | (state->m_mmc_reg[0] & 0x0e);
9262      prg32(space->machine(), bank);
9263      chr8(space->machine(), 0, CHRRAM);
9262      prg32(space.machine(), bank);
9263      chr8(space.machine(), 0, CHRRAM);
92649264   }
92659265}
92669266
r17963r17964
93089308// is the code fine for ai senshi nicol?!?
93099309static WRITE8_HANDLER( btl_mariobaby_w )
93109310{
9311   nes_state *state = space->machine().driver_data<nes_state>();
9311   nes_state *state = space.machine().driver_data<nes_state>();
93129312   LOG_MMC(("btl_mariobaby_w, offset: %04x, data: %02x\n", offset, data));
93139313
93149314   if (offset >= 0x7000)
r17963r17964
93169316      switch (offset & 0x03)
93179317      {
93189318         case 0x00:
9319            prg8_67(space->machine(), data);
9319            prg8_67(space.machine(), data);
93209320            break;
93219321         case 0x01:
9322            set_nt_mirroring(space->machine(), BIT(data, 3) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
9322            set_nt_mirroring(space.machine(), BIT(data, 3) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
93239323            break;
93249324         case 0x02:
93259325            /* Check if IRQ is being enabled */
r17963r17964
93699369
93709370static WRITE8_HANDLER( btl_smb2a_w )
93719371{
9372   nes_state *state = space->machine().driver_data<nes_state>();
9372   nes_state *state = space.machine().driver_data<nes_state>();
93739373   LOG_MMC(("btl_smb2a_w, offset: %04x, data: %02x\n", offset, data));
93749374
93759375   switch (offset & 0x6000)
r17963r17964
93829382         state->m_IRQ_enable = 1;
93839383         break;
93849384      case 0x6000:
9385         prg8_cd(space->machine(), data);
9385         prg8_cd(space.machine(), data);
93869386         break;
93879387   }
93889388}
r17963r17964
94029402static WRITE8_HANDLER( whirl2706_w )
94039403{
94049404   LOG_MMC(("whirl2706_w, offset: %04x, data: %02x\n", offset, data));
9405   prg8_67(space->machine(), data);
9405   prg8_67(space.machine(), data);
94069406}
94079407
94089408/*************************************************************
r17963r17964
94239423   offset += 0x100;
94249424
94259425   if ((offset & 0x43c0) == 0x41c0)
9426      prg8_67(space->machine(), data & 0x07);
9426      prg8_67(space.machine(), data & 0x07);
94279427}
94289428
94299429/*************************************************************
r17963r17964
94569456
94579457static WRITE8_HANDLER( btl_smb3_w )
94589458{
9459   nes_state *state = space->machine().driver_data<nes_state>();
9459   nes_state *state = space.machine().driver_data<nes_state>();
94609460   LOG_MMC(("btl_smb3_w, offset: %04x, data: %02x\n", offset, data));
94619461   switch (offset & 0x0f)
94629462   {
94639463      case 0x00:
94649464      case 0x02:
9465         chr1_x(space->machine(), offset & 0x07, data & 0xfe, CHRROM);
9465         chr1_x(space.machine(), offset & 0x07, data & 0xfe, CHRROM);
94669466         break;
94679467      case 0x01:
94689468      case 0x03:
9469         chr1_x(space->machine(), offset & 0x07, data | 0x01, CHRROM);
9469         chr1_x(space.machine(), offset & 0x07, data | 0x01, CHRROM);
94709470         break;
94719471      case 0x04: case 0x05:
94729472      case 0x06: case 0x07:
9473         chr1_x(space->machine(), offset & 0x07, data, CHRROM);
9473         chr1_x(space.machine(), offset & 0x07, data, CHRROM);
94749474         break;
94759475      case 0x08:
9476         prg8_89(space->machine(), data | 0x10);
9476         prg8_89(space.machine(), data | 0x10);
94779477         break;
94789478      case 0x09:
9479         prg8_ab(space->machine(), data);
9479         prg8_ab(space.machine(), data);
94809480         break;
94819481      case 0x0a:
9482         prg8_cd(space->machine(), data);
9482         prg8_cd(space.machine(), data);
94839483         break;
94849484      case 0x0b:
9485         prg8_ef(space->machine(), data | 0x10);
9485         prg8_ef(space.machine(), data | 0x10);
94869486         break;
94879487      case 0x0c:
9488         set_nt_mirroring(space->machine(), BIT(data, 0) ?  PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
9488         set_nt_mirroring(space.machine(), BIT(data, 0) ?  PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
94899489         break;
94909490      case 0x0d:
94919491         state->m_IRQ_count = 0;
r17963r17964
95319531
95329532static WRITE8_HANDLER( btl_dn_w )
95339533{
9534   nes_state *state = space->machine().driver_data<nes_state>();
9534   nes_state *state = space.machine().driver_data<nes_state>();
95359535   UINT8 bank;
95369536   LOG_MMC(("btl_dn_w, offset: %04x, data: %02x\n", offset, data));
95379537
95389538   switch (offset & 0x7003)
95399539   {
95409540      case 0x0000:
9541         prg8_89(space->machine(), data);
9541         prg8_89(space.machine(), data);
95429542         break;
95439543      case 0x1000:
9544         set_nt_mirroring(space->machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
9544         set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
95459545         break;
95469546      case 0x2000:
9547         prg8_ab(space->machine(), data);
9547         prg8_ab(space.machine(), data);
95489548         break;
95499549      case 0x3000:
95509550      case 0x3002:
r17963r17964
95559555      case 0x6000:
95569556      case 0x6002:
95579557         bank = ((offset & 0x7000) - 0x3000) / 0x0800 + ((offset & 0x0002) >> 3);
9558         chr1_x(space->machine(), bank, data, CHRROM);
9558         chr1_x(space.machine(), bank, data, CHRROM);
95599559         break;
95609560      case 0x7000:
95619561         state->m_IRQ_count = data;
r17963r17964
95779577
95789578static WRITE8_HANDLER( btl_pika_y2k_w )
95799579{
9580   nes_state *state = space->machine().driver_data<nes_state>();
9580   nes_state *state = space.machine().driver_data<nes_state>();
95819581   LOG_MMC(("btl_pika_y2k_w, offset: %04x, data: %02x\n", offset, data));
95829582
95839583   switch (offset & 0x6001)
r17963r17964
95979597// strange WRAM usage: it is protected at start, and gets unprotected after the first write to 0xa000
95989598static WRITE8_HANDLER( btl_pika_y2k_m_w )
95999599{
9600   nes_state *state = space->machine().driver_data<nes_state>();
9600   nes_state *state = space.machine().driver_data<nes_state>();
96019601   LOG_MMC(("btl_pika_y2k_m_w, offset: %04x, data: %02x\n", offset, data));
96029602
96039603   state->m_wram[offset] = data;
r17963r17964
96059605
96069606static READ8_HANDLER( btl_pika_y2k_m_r )
96079607{
9608   nes_state *state = space->machine().driver_data<nes_state>();
9608   nes_state *state = space.machine().driver_data<nes_state>();
96099609   LOG_MMC(("btl_pika_y2k_m_r, offset: %04x\n", offset));
96109610
96119611   return   state->m_wram[offset] ^ (state->m_mmc_latch2 & state->m_mmc_reg[0]);
r17963r17964
97169716
97179717static WRITE8_HANDLER( fk23c_l_w )
97189718{
9719   nes_state *state = space->machine().driver_data<nes_state>();
9719   nes_state *state = space.machine().driver_data<nes_state>();
97209720   LOG_MMC(("fk23c_l_w, offset: %04x, data: %02x\n", offset, data));
97219721   offset += 0x100;
97229722
r17963r17964
97269726      {
97279727         state->m_mmc_reg[offset & 0x03] = data;
97289728
9729         fk23c_set_prg(space->machine());
9730         fk23c_set_chr(space->machine());
9729         fk23c_set_prg(space.machine());
9730         fk23c_set_chr(space.machine());
97319731      }
97329732   }
97339733}
97349734
97359735static WRITE8_HANDLER( fk23c_w )
97369736{
9737   nes_state *state = space->machine().driver_data<nes_state>();
9737   nes_state *state = space.machine().driver_data<nes_state>();
97389738   LOG_MMC(("fk23c_w, offset: %04x, data: %02x\n", offset, data));
97399739
97409740   if (state->m_mmc_reg[0] & 0x40)
r17963r17964
97449744      else
97459745      {
97469746         state->m_mmc_cmd1 = data & 0x03;
9747         fk23c_set_chr(space->machine());
9747         fk23c_set_chr(space.machine());
97489748      }
97499749   }
97509750   else
r17963r17964
97559755            if ((state->m_mmc_reg[3] & 0x02) && (state->m_mmc3_latch & 0x08))
97569756            {
97579757               state->m_mmc_reg[4 | (state->m_mmc3_latch & 0x03)] = data;
9758               fk23c_set_prg(space->machine());
9759               fk23c_set_chr(space->machine());
9758               fk23c_set_prg(space.machine());
9759               fk23c_set_chr(space.machine());
97609760            }
97619761            else
97629762               txrom_w(space, offset, data);
97639763            break;
97649764
97659765         case 0x2000:
9766            set_nt_mirroring(space->machine(), data ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
9766            set_nt_mirroring(space.machine(), data ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
97679767            break;
97689768
97699769         default:
r17963r17964
98069806
98079807static WRITE8_HANDLER( bmc_64in1nr_l_w )
98089808{
9809   nes_state *state = space->machine().driver_data<nes_state>();
9809   nes_state *state = space.machine().driver_data<nes_state>();
98109810   LOG_MMC(("bmc_64in1nr_l_w offset: %04x, data: %02x\n", offset, data));
98119811   offset += 0x100;
98129812
r17963r17964
98179817      case 0x1002:
98189818      case 0x1003:
98199819         state->m_mmc_reg[offset & 0x03] = data;
9820         bmc_64in1nr_set_prg(space->machine());
9821         chr8(space->machine(), ((state->m_mmc_reg[0] >> 1) & 0x03) | (state->m_mmc_reg[2] << 2), CHRROM);
9820         bmc_64in1nr_set_prg(space.machine());
9821         chr8(space.machine(), ((state->m_mmc_reg[0] >> 1) & 0x03) | (state->m_mmc_reg[2] << 2), CHRROM);
98229822         break;
98239823   }
98249824   if (offset == 0x1000)   /* reg[0] also sets mirroring */
9825      set_nt_mirroring(space->machine(), BIT(data, 5) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
9825      set_nt_mirroring(space.machine(), BIT(data, 5) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
98269826}
98279827
98289828static WRITE8_HANDLER( bmc_64in1nr_w )
98299829{
9830   nes_state *state = space->machine().driver_data<nes_state>();
9830   nes_state *state = space.machine().driver_data<nes_state>();
98319831   LOG_MMC(("bmc_64in1nr_w offset: %04x, data: %02x\n", offset, data));
98329832
98339833   state->m_mmc_reg[3] = data;   // reg[3] is currently unused?!?
r17963r17964
98479847{
98489848   LOG_MMC(("bmc_190in1_w offset: %04x, data: %02x\n", offset, data));
98499849
9850   set_nt_mirroring(space->machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
9850   set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
98519851   offset >>= 2;
9852   prg16_89ab(space->machine(), offset);
9853   prg16_cdef(space->machine(), offset);
9854   chr8(space->machine(), offset, CHRROM);
9852   prg16_89ab(space.machine(), offset);
9853   prg16_cdef(space.machine(), offset);
9854   chr8(space.machine(), offset, CHRROM);
98559855}
98569856
98579857/*************************************************************
r17963r17964
98709870   LOG_MMC(("bmc_a65as_w offset: %04x, data: %02x\n", offset, data));
98719871
98729872   if (data & 0x80)
9873      set_nt_mirroring(space->machine(), BIT(data, 5) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW);
9873      set_nt_mirroring(space.machine(), BIT(data, 5) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW);
98749874   else
9875      set_nt_mirroring(space->machine(), BIT(data, 3) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
9875      set_nt_mirroring(space.machine(), BIT(data, 3) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
98769876
98779877   if (data & 0x40)
9878      prg32(space->machine(), data >> 1);
9878      prg32(space.machine(), data >> 1);
98799879   else
98809880   {
9881      prg16_89ab(space->machine(), helper | (data & 0x07));
9882      prg16_cdef(space->machine(), helper | 0x07);
9881      prg16_89ab(space.machine(), helper | (data & 0x07));
9882      prg16_cdef(space.machine(), helper | 0x07);
98839883   }
98849884}
98859885
r17963r17964
98989898{
98999899   LOG_MMC(("bmc_gs2004_w offset: %04x, data: %02x\n", offset, data));
99009900
9901   prg32(space->machine(), data);
9901   prg32(space.machine(), data);
99029902}
99039903
99049904/*************************************************************
r17963r17964
99179917   LOG_MMC(("bmc_gs2013_w offset: %04x, data: %02x\n", offset, data));
99189918
99199919   if (data & 0x08)
9920      prg32(space->machine(), data & 0x09);
9920      prg32(space.machine(), data & 0x09);
99219921   else
9922      prg32(space->machine(), data & 0x07);
9922      prg32(space.machine(), data & 0x07);
99239923}
99249924
99259925/*************************************************************
r17963r17964
99549954
99559955static WRITE8_HANDLER( bmc_s24in1sc03_l_w )
99569956{
9957   nes_state *state = space->machine().driver_data<nes_state>();
9957   nes_state *state = space.machine().driver_data<nes_state>();
99589958   LOG_MMC(("bmc_s24in1sc03_l_w offset: %04x, data: %02x\n", offset, data));
99599959   offset += 0x100;
99609960
99619961   if (offset == 0x1ff0)
99629962   {
99639963      state->m_mmc_reg[0] = data;
9964      mmc3_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
9965      mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
9964      mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
9965      mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
99669966   }
99679967
99689968   if (offset == 0x1ff1)
99699969   {
99709970      state->m_mmc_reg[1] = data;
9971      mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
9971      mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
99729972   }
99739973
99749974   if (offset == 0x1ff2)
99759975   {
99769976      state->m_mmc_reg[2] = data;
9977      mmc3_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
9977      mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
99789978   }
99799979}
99809980
r17963r17964
99909990
99919991static WRITE8_HANDLER( bmc_t262_w )
99929992{
9993   nes_state *state = space->machine().driver_data<nes_state>();
9993   nes_state *state = space.machine().driver_data<nes_state>();
99949994   UINT8 mmc_helper;
99959995   LOG_MMC(("bmc_t262_w offset: %04x, data: %02x\n", offset, data));
99969996
99979997   if (state->m_mmc_latch2 || offset == 0)
99989998   {
99999999      state->m_mmc_latch1 = (state->m_mmc_latch1 & 0x38) | (data & 0x07);
10000      prg16_89ab(space->machine(), state->m_mmc_latch1);
10000      prg16_89ab(space.machine(), state->m_mmc_latch1);
1000110001   }
1000210002   else
1000310003   {
1000410004      state->m_mmc_latch2 = 1;
10005      set_nt_mirroring(space->machine(), BIT(data, 1) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
10005      set_nt_mirroring(space.machine(), BIT(data, 1) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
1000610006      mmc_helper = ((offset >> 3) & 0x20) | ((offset >> 2) & 0x18);
1000710007      state->m_mmc_latch1 = mmc_helper | (state->m_mmc_latch1 & 0x07);
10008      prg16_89ab(space->machine(), state->m_mmc_latch1);
10009      prg16_cdef(space->machine(), mmc_helper | 0x07);
10008      prg16_89ab(space.machine(), state->m_mmc_latch1);
10009      prg16_cdef(space.machine(), mmc_helper | 0x07);
1001010010   }
1001110011}
1001210012
r17963r17964
1002310023
1002410024static WRITE8_HANDLER( bmc_ws_m_w )
1002510025{
10026   nes_state *state = space->machine().driver_data<nes_state>();
10026   nes_state *state = space.machine().driver_data<nes_state>();
1002710027   UINT8 mmc_helper;
1002810028   LOG_MMC(("bmc_ws_m_w offset: %04x, data: %02x\n", offset, data));
1002910029
r17963r17964
1003510035            if (!state->m_mmc_latch1)
1003610036            {
1003710037               state->m_mmc_latch1 = data & 0x20;
10038               set_nt_mirroring(space->machine(), BIT(data, 4) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
10038               set_nt_mirroring(space.machine(), BIT(data, 4) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
1003910039               mmc_helper = (~data & 0x08) >> 3;
10040               prg16_89ab(space->machine(), data & ~mmc_helper);
10041               prg16_cdef(space->machine(), data |  mmc_helper);
10040               prg16_89ab(space.machine(), data & ~mmc_helper);
10041               prg16_cdef(space.machine(), data |  mmc_helper);
1004210042            }
1004310043            break;
1004410044         case 1:
1004510045            if (!state->m_mmc_latch1)
1004610046            {
10047               chr8(space->machine(), data, CHRROM);
10047               chr8(space.machine(), data, CHRROM);
1004810048            }
1004910049            break;
1005010050      }
r17963r17964
1007210072{
1007310073   LOG_MMC(("novel1_w, offset: %04x, data: %02x\n", offset, data));
1007410074
10075   prg32(space->machine(), offset & 0x03);
10076   chr8(space->machine(), offset & 0x07, CHRROM);
10075   prg32(space.machine(), offset & 0x03);
10076   chr8(space.machine(), offset & 0x07, CHRROM);
1007710077}
1007810078
1007910079static WRITE8_HANDLER( novel2_w )
1008010080{
1008110081   LOG_MMC(("novel2_w, offset: %04x, data: %02x\n", offset, data));
1008210082
10083   prg32(space->machine(), offset >> 1);
10084   chr8(space->machine(), offset >> 3, CHRROM);
10083   prg32(space.machine(), offset >> 1);
10084   chr8(space.machine(), offset >> 3, CHRROM);
1008510085}
1008610086
1008710087/*************************************************************
r17963r17964
1009910099
1010010100static WRITE8_HANDLER( bmc_gka_w )
1010110101{
10102   nes_state *state = space->machine().driver_data<nes_state>();
10102   nes_state *state = space.machine().driver_data<nes_state>();
1010310103   LOG_MMC(("bmc_gka_w, offset: %04x, data: %02x\n", offset, data));
1010410104
1010510105   if (offset & 0x0800)
r17963r17964
1010810108      state->m_mmc_latch1 = data;
1010910109
1011010110   if (state->m_mmc_latch2 & 0x80)
10111      prg32(space->machine(), 2 | (state->m_mmc_latch2 >> 6));
10111      prg32(space.machine(), 2 | (state->m_mmc_latch2 >> 6));
1011210112   else
1011310113   {
10114      prg16_89ab(space->machine(), (state->m_mmc_latch2 >> 5) & 0x03);
10115      prg16_cdef(space->machine(), (state->m_mmc_latch2 >> 5) & 0x03);
10114      prg16_89ab(space.machine(), (state->m_mmc_latch2 >> 5) & 0x03);
10115      prg16_cdef(space.machine(), (state->m_mmc_latch2 >> 5) & 0x03);
1011610116   }
1011710117
10118   set_nt_mirroring(space->machine(), (state->m_mmc_latch2 & 0x08) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
10118   set_nt_mirroring(space.machine(), (state->m_mmc_latch2 & 0x08) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
1011910119
10120   chr8(space->machine(), (state->m_mmc_latch1 & 0x03) | (state->m_mmc_latch2 & 0x07) | ((state->m_mmc_latch2 & 0x10) >> 1), CHRROM);
10120   chr8(space.machine(), (state->m_mmc_latch1 & 0x03) | (state->m_mmc_latch2 & 0x07) | ((state->m_mmc_latch2 & 0x10) >> 1), CHRROM);
1012110121}
1012210122
1012310123
r17963r17964
1013710137static WRITE8_HANDLER( sng32_w )
1013810138{
1013910139   LOG_MMC(("sng32_w, offset: %04x, data: %02x\n", offset, data));
10140   prg32(space->machine(), data);
10140   prg32(space.machine(), data);
1014110141}
1014210142
1014310143/*************************************************************
r17963r17964
1015510155
1015610156static WRITE8_HANDLER( bmc_gkb_w )
1015710157{
10158   nes_state *state = space->machine().driver_data<nes_state>();
10158   nes_state *state = space.machine().driver_data<nes_state>();
1015910159   UINT8 bank = (offset & 0x40) ? 0 : 1;
1016010160   LOG_MMC(("bmc_gkb_w, offset: %04x, data: %02x\n", offset, data));
1016110161
10162   prg16_89ab(space->machine(), offset & ~bank);
10163   prg16_cdef(space->machine(), offset | bank);
10164   chr8(space->machine(), offset >> 3, state->m_mmc_chr_source);
10165   set_nt_mirroring(space->machine(), BIT(data, 7) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
10162   prg16_89ab(space.machine(), offset & ~bank);
10163   prg16_cdef(space.machine(), offset | bank);
10164   chr8(space.machine(), offset >> 3, state->m_mmc_chr_source);
10165   set_nt_mirroring(space.machine(), BIT(data, 7) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
1016610166}
1016710167
1016810168/*************************************************************
r17963r17964
1018210182{
1018310183   LOG_MMC(("bmc_super700in1_w, offset :%04x, data: %02x\n", offset, data));
1018410184
10185   chr8(space->machine(), ((offset & 0x1f) << 2) | (data & 0x03), CHRROM);
10185   chr8(space.machine(), ((offset & 0x1f) << 2) | (data & 0x03), CHRROM);
1018610186
1018710187   if (offset & 0x20)
1018810188   {
10189      prg16_89ab(space->machine(), (offset & 0x40) | ((offset >> 8) & 0x3f));
10190      prg16_cdef(space->machine(), (offset & 0x40) | ((offset >> 8) & 0x3f));
10189      prg16_89ab(space.machine(), (offset & 0x40) | ((offset >> 8) & 0x3f));
10190      prg16_cdef(space.machine(), (offset & 0x40) | ((offset >> 8) & 0x3f));
1019110191   }
1019210192   else
1019310193   {
10194      prg32(space->machine(), ((offset & 0x40) | ((offset >> 8) & 0x3f)) >> 1);
10194      prg32(space.machine(), ((offset & 0x40) | ((offset >> 8) & 0x3f)) >> 1);
1019510195   }
1019610196
10197   set_nt_mirroring(space->machine(), BIT(data, 7) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
10197   set_nt_mirroring(space.machine(), BIT(data, 7) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
1019810198}
1019910199
1020010200/*************************************************************
r17963r17964
1021410214{
1021510215   LOG_MMC(("bmc_36in1_w, offset: %04x, data: %02x\n", offset, data));
1021610216
10217   prg16_89ab(space->machine(), offset & 0x07);
10218   prg16_cdef(space->machine(), offset & 0x07);
10219   chr8(space->machine(), offset & 0x07, CHRROM);
10217   prg16_89ab(space.machine(), offset & 0x07);
10218   prg16_cdef(space.machine(), offset & 0x07);
10219   chr8(space.machine(), offset & 0x07, CHRROM);
1022010220
10221   set_nt_mirroring(space->machine(), BIT(data, 3) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
10221   set_nt_mirroring(space.machine(), BIT(data, 3) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
1022210222}
1022310223
1022410224/*************************************************************
r17963r17964
1023810238{
1023910239   LOG_MMC(("bmc_21in1_w, offset: %04x, data: %02x\n", offset, data));
1024010240
10241   prg32(space->machine(), offset & 0x03);
10242   chr8(space->machine(), offset & 0x03, CHRROM);
10241   prg32(space.machine(), offset & 0x03);
10242   chr8(space.machine(), offset & 0x03, CHRROM);
1024310243}
1024410244
1024510245/*************************************************************
r17963r17964
1026110261
1026210262   LOG_MMC(("bmc_150in1_w, offset: %04x, data: %02x\n", offset, data));
1026310263
10264   prg16_89ab(space->machine(), bank);
10265   prg16_cdef(space->machine(), bank + (((bank & 0x06) == 0x06) ? 1 : 0));
10266   chr8(space->machine(), bank, CHRROM);
10264   prg16_89ab(space.machine(), bank);
10265   prg16_cdef(space.machine(), bank + (((bank & 0x06) == 0x06) ? 1 : 0));
10266   chr8(space.machine(), bank, CHRROM);
1026710267
10268   set_nt_mirroring(space->machine(), BIT(data, 0) ? PPU_MIRROR_HORZ: PPU_MIRROR_VERT);
10268   set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ: PPU_MIRROR_VERT);
1026910269}
1027010270
1027110271/*************************************************************
r17963r17964
1028510285{
1028610286   LOG_MMC(("bmc_35in1_w, offset: %04x, data: %02x\n", offset, data));
1028710287
10288   prg16_89ab(space->machine(), (data >> 2) & 0x03);
10289   prg16_cdef(space->machine(), (data >> 2) & 0x03);
10290   chr8(space->machine(), data & 0x03, CHRROM);
10288   prg16_89ab(space.machine(), (data >> 2) & 0x03);
10289   prg16_cdef(space.machine(), (data >> 2) & 0x03);
10290   chr8(space.machine(), data & 0x03, CHRROM);
1029110291}
1029210292
1029310293/*************************************************************
r17963r17964
1030910309
1031010310   LOG_MMC(("bmc_64in1_w, offset: %04x, data: %02x\n", offset, data));
1031110311
10312   prg16_89ab(space->machine(), offset & ~bank);
10313   prg16_cdef(space->machine(), offset | bank);
10314   chr8(space->machine(), offset & ~bank, CHRROM);
10312   prg16_89ab(space.machine(), offset & ~bank);
10313   prg16_cdef(space.machine(), offset | bank);
10314   chr8(space.machine(), offset & ~bank, CHRROM);
1031510315
10316   set_nt_mirroring(space->machine(), BIT(data, 4) ? PPU_MIRROR_HORZ: PPU_MIRROR_VERT);
10316   set_nt_mirroring(space.machine(), BIT(data, 4) ? PPU_MIRROR_HORZ: PPU_MIRROR_VERT);
1031710317}
1031810318
1031910319/*************************************************************
r17963r17964
1033110331
1033210332static WRITE8_HANDLER( bmc_15in1_m_w )
1033310333{
10334   nes_state *state = space->machine().driver_data<nes_state>();
10334   nes_state *state = space.machine().driver_data<nes_state>();
1033510335   LOG_MMC(("bmc_15in1_m_w, offset: %04x, data: %02x\n", offset, data));
1033610336
1033710337   if (offset & 0x0800)
r17963r17964
1034010340      state->m_mmc_prg_mask = (data & 0x02) ? 0x0f : 0x1f;
1034110341      state->m_mmc_chr_base = (data & 0x03) << 7;
1034210342      state->m_mmc_chr_mask = (data & 0x02) ? 0x7f : 0xff;
10343      mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
10344      mmc3_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
10343      mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
10344      mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
1034510345   }
1034610346}
1034710347
r17963r17964
1036210362{
1036310363   LOG_MMC(("bmc_hik300_w, offset: %04x, data: %02x\n", offset, data));
1036410364
10365   set_nt_mirroring(space->machine(), BIT(data, 3) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
10366   chr8(space->machine(), offset, CHRROM);
10365   set_nt_mirroring(space.machine(), BIT(data, 3) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
10366   chr8(space.machine(), offset, CHRROM);
1036710367
1036810368   if (offset < 0x4000)
1036910369   {
10370      prg16_89ab(space->machine(), offset);
10371      prg16_cdef(space->machine(), offset);
10370      prg16_89ab(space.machine(), offset);
10371      prg16_cdef(space.machine(), offset);
1037210372   }
1037310373   else
10374      prg32(space->machine(), offset >> 1);
10374      prg32(space.machine(), offset >> 1);
1037510375}
1037610376
1037710377/*************************************************************
r17963r17964
1039110391{
1039210392   LOG_MMC(("supergun20in1_w, offset: %04x, data: %02x\n", offset, data));
1039310393
10394   prg16_89ab(space->machine(), offset >> 2);
10395   prg16_cdef(space->machine(), offset >> 2);
10396   chr8(space->machine(), offset, CHRROM);
10394   prg16_89ab(space.machine(), offset >> 2);
10395   prg16_cdef(space.machine(), offset >> 2);
10396   chr8(space.machine(), offset, CHRROM);
1039710397}
1039810398
1039910399/*************************************************************
r17963r17964
1041710417
1041810418   LOG_MMC(("bmc_72in1_w, offset: %04x, data: %02x\n", offset, data));
1041910419
10420   chr8(space->machine(), offset, CHRROM);
10421   set_nt_mirroring(space->machine(), (offset & 0x2000) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
10420   chr8(space.machine(), offset, CHRROM);
10421   set_nt_mirroring(space.machine(), (offset & 0x2000) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
1042210422
1042310423   hi_bank = offset & 0x40;
1042410424   size_16 = offset & 0x1000;
r17963r17964
1042910429      if (hi_bank)
1043010430         bank ++;
1043110431
10432      prg16_89ab(space->machine(), bank);
10433      prg16_cdef(space->machine(), bank);
10432      prg16_89ab(space.machine(), bank);
10433      prg16_cdef(space.machine(), bank);
1043410434   }
1043510435   else
10436      prg32(space->machine(), bank);
10436      prg32(space.machine(), bank);
1043710437}
1043810438
1043910439/*************************************************************
r17963r17964
1045210452// does this work for super42in1 as well?!?
1045310453static WRITE8_HANDLER( bmc_76in1_w )
1045410454{
10455   nes_state *state = space->machine().driver_data<nes_state>();
10455   nes_state *state = space.machine().driver_data<nes_state>();
1045610456   int hi_bank;
1045710457   int size_16;
1045810458   int bank;
r17963r17964
1046410464   else
1046510465      state->m_mmc_latch1 = data;
1046610466
10467   set_nt_mirroring(space->machine(), BIT(state->m_mmc_latch1, 6) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
10467   set_nt_mirroring(space.machine(), BIT(state->m_mmc_latch1, 6) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
1046810468
1046910469   hi_bank = state->m_mmc_latch1 & 0x01;
1047010470   size_16 = state->m_mmc_latch1 & 0x20;
r17963r17964
1047610476      if (hi_bank)
1047710477         bank ++;
1047810478
10479      prg16_89ab(space->machine(), bank);
10480      prg16_cdef(space->machine(), bank);
10479      prg16_89ab(space.machine(), bank);
10480      prg16_cdef(space.machine(), bank);
1048110481   }
1048210482   else
10483      prg32(space->machine(), bank);
10483      prg32(space.machine(), bank);
1048410484}
1048510485
1048610486/*************************************************************
r17963r17964
1051310513      if (hi_bank)
1051410514         bank ++;
1051510515
10516      prg16_89ab(space->machine(), bank);
10517      prg16_cdef(space->machine(), bank);
10516      prg16_89ab(space.machine(), bank);
10517      prg16_cdef(space.machine(), bank);
1051810518   }
1051910519   else
10520      prg32(space->machine(), bank);
10520      prg32(space.machine(), bank);
1052110521
1052210522   if (!(offset & 0x80))
1052310523   {
1052410524      if (offset & 0x200)
10525         prg16_cdef(space->machine(), ((bank << 1) & 0x38) + 7);
10525         prg16_cdef(space.machine(), ((bank << 1) & 0x38) + 7);
1052610526      else
10527         prg16_cdef(space->machine(), ((bank << 1) & 0x38));
10527         prg16_cdef(space.machine(), ((bank << 1) & 0x38));
1052810528   }
1052910529
10530   set_nt_mirroring(space->machine(), BIT(data, 1) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
10530   set_nt_mirroring(space.machine(), BIT(data, 1) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
1053110531}
1053210532
1053310533/*************************************************************
r17963r17964
1054710547{
1054810548   LOG_MMC(("bmc_31in1_w, offset: %04x, data: %02x\n", offset, data));
1054910549
10550   set_nt_mirroring(space->machine(), BIT(data, 5) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
10551   chr8(space->machine(), offset, CHRROM);
10550   set_nt_mirroring(space.machine(), BIT(data, 5) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
10551   chr8(space.machine(), offset, CHRROM);
1055210552
1055310553   if ((offset & 0x1e) == 0)
1055410554   {
10555      prg16_89ab(space->machine(), 0);
10556      prg16_89ab(space->machine(), 1);
10555      prg16_89ab(space.machine(), 0);
10556      prg16_89ab(space.machine(), 1);
1055710557   }
1055810558   else
1055910559   {
10560      prg16_89ab(space->machine(), offset & 0x1f);
10561      prg16_89ab(space->machine(), offset & 0x1f);
10560      prg16_89ab(space.machine(), offset & 0x1f);
10561      prg16_89ab(space.machine(), offset & 0x1f);
1056210562   }
1056310563}
1056410564
r17963r17964
1058210582
1058310583   if (1)   // this should flip at reset
1058410584   {
10585      prg16_89ab(space->machine(), data & 0x07);
10585      prg16_89ab(space.machine(), data & 0x07);
1058610586   }
1058710587   else
1058810588   {
1058910589      if (data & 0x20)
1059010590      {
10591         prg16_89ab(space->machine(), (data & 0x1f) + 8);
10592         prg16_cdef(space->machine(), (data & 0x1f) + 8);
10591         prg16_89ab(space.machine(), (data & 0x1f) + 8);
10592         prg16_cdef(space.machine(), (data & 0x1f) + 8);
1059310593      }
1059410594      else
1059510595      {
10596         prg16_89ab(space->machine(), (data & 0x1f) + 8);
10597         prg16_cdef(space->machine(), (data & 0x1f) + 9);
10596         prg16_89ab(space.machine(), (data & 0x1f) + 8);
10597         prg16_cdef(space.machine(), (data & 0x1f) + 9);
1059810598      }
10599      set_nt_mirroring(space->machine(), BIT(data, 6) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ);
10599      set_nt_mirroring(space.machine(), BIT(data, 6) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ);
1060010600   }
1060110601}
1060210602
r17963r17964
1061710617{
1061810618   LOG_MMC(("bmc_20in1_w, offset: %04x, data: %02x\n", offset, data));
1061910619
10620   set_nt_mirroring(space->machine(), BIT(data, 7) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
10620   set_nt_mirroring(space.machine(), BIT(data, 7) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
1062110621
10622   prg16_89ab(space->machine(), (offset & 0x1e));
10623   prg16_cdef(space->machine(), (offset & 0x1e) | ((offset & 0x20) ? 1 : 0));
10622   prg16_89ab(space.machine(), (offset & 0x1e));
10623   prg16_cdef(space.machine(), (offset & 0x1e) | ((offset & 0x20) ? 1 : 0));
1062410624}
1062510625
1062610626/*************************************************************
r17963r17964
1064310643
1064410644   LOG_MMC(("bmc_110in1_w, offset: %04x, data: %02x\n", offset, data));
1064510645
10646   set_nt_mirroring(space->machine(), (offset & 0x2000) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
10647   prg16_89ab(space->machine(), map255_helper1 & ~map255_helper2);
10648   prg16_cdef(space->machine(), map255_helper1 | map255_helper2);
10649   chr8(space->machine(), ((offset >> 8) & 0x40) | (offset & 0x3f), CHRROM);
10646   set_nt_mirroring(space.machine(), (offset & 0x2000) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
10647   prg16_89ab(space.machine(), map255_helper1 & ~map255_helper2);
10648   prg16_cdef(space.machine(), map255_helper1 | map255_helper2);
10649   chr8(space.machine(), ((offset >> 8) & 0x40) | (offset & 0x3f), CHRROM);
1065010650}
1065110651
1065210652/*************************************************************
r17963r17964
1066410664
1066510665static WRITE8_HANDLER( bmc_sbig7_w )
1066610666{
10667   nes_state *state = space->machine().driver_data<nes_state>();
10667   nes_state *state = space.machine().driver_data<nes_state>();
1066810668   UINT8 page;
1066910669   LOG_MMC(("bmc_sbig7_w, offset: %04x, data: %02x\n", offset, data));
1067010670
r17963r17964
1067910679         state->m_mmc_prg_mask = (page > 5) ? 0x1f : 0x0f;
1068010680         state->m_mmc_chr_base = page << 7;
1068110681         state->m_mmc_chr_mask = (page > 5) ? 0xff : 0x7f;
10682         mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
10683         mmc3_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
10682         mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
10683         mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
1068410684         break;
1068510685
1068610686      default:
r17963r17964
1070410704
1070510705static WRITE8_HANDLER( bmc_hik8_m_w )
1070610706{
10707   nes_state *state = space->machine().driver_data<nes_state>();
10707   nes_state *state = space.machine().driver_data<nes_state>();
1070810708   LOG_MMC(("bmc_hik8_m_w, offset: %04x, data: %02x\n", offset, data));
1070910709
1071010710   /* This bit is the "register lock". Once register are locked, writes go to WRAM
r17963r17964
1073110731         else
1073210732            state->m_mmc_chr_mask = 0xff;   // i.e. we use the vrom_bank with no masking
1073310733
10734         mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
10735         mmc3_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
10734         mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
10735         mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
1073610736      }
1073710737   }
1073810738}
r17963r17964
1075210752
1075310753static WRITE8_HANDLER( bmc_hik4in1_m_w )
1075410754{
10755   nes_state *state = space->machine().driver_data<nes_state>();
10755   nes_state *state = space.machine().driver_data<nes_state>();
1075610756   LOG_MMC(("bmc_hik4in1_m_w, offset: %04x, data: %02x\n", offset, data));
1075710757
1075810758   /* mid writes only work when WRAM is enabled. not sure if I should
r17963r17964
1076410764      {
1076510765         state->m_mmc_prg_base = (data & 0xc0) >> 2;
1076610766         state->m_mmc_prg_mask = 0x0f;
10767         mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
10767         mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
1076810768      }
1076910769      else
10770         prg32(space->machine(), (data & 0x30) >> 4);
10770         prg32(space.machine(), (data & 0x30) >> 4);
1077110771
1077210772      state->m_mmc_chr_base = (data & 0xc0) << 1;
1077310773      state->m_mmc_chr_mask = 0x7f;
10774      mmc3_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
10774      mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
1077510775   }
1077610776}
1077710777
r17963r17964
1080610806
1080710807static WRITE8_HANDLER( bmc_ball11_m_w )
1080810808{
10809   nes_state *state = space->machine().driver_data<nes_state>();
10809   nes_state *state = space.machine().driver_data<nes_state>();
1081010810
1081110811   LOG_MMC(("bmc_ball11_m_w, offset: %04x, data: %02x\n", offset, data));
1081210812
1081310813   state->m_mmc_reg[0] = ((data >> 1) & 0x01) | ((data >> 3) & 0x02);
10814   bmc_ball11_set_banks(space->machine());
10814   bmc_ball11_set_banks(space.machine());
1081510815}
1081610816
1081710817static WRITE8_HANDLER( bmc_ball11_w )
1081810818{
10819   nes_state *state = space->machine().driver_data<nes_state>();
10819   nes_state *state = space.machine().driver_data<nes_state>();
1082010820
1082110821   LOG_MMC(("bmc_ball11_w, offset: %04x, data: %02x\n", offset, data));
1082210822
r17963r17964
1082810828      case 0x2000:
1082910829      case 0x6000:
1083010830         state->m_mmc_reg[1] = data & 0x0f;
10831         bmc_ball11_set_banks(space->machine());
10831         bmc_ball11_set_banks(space.machine());
1083210832         break;
1083310833   }
1083410834}
r17963r17964
1085010850
1085110851static WRITE8_HANDLER( bmc_mario7in1_m_w )
1085210852{
10853   nes_state *state = space->machine().driver_data<nes_state>();
10853   nes_state *state = space.machine().driver_data<nes_state>();
1085410854   UINT8 map52_helper1, map52_helper2;
1085510855   LOG_MMC(("bmc_mario7in1_m_w, offset: %04x, data: %02x\n", offset, data));
1085610856
r17963r17964
1086610866      state->m_mmc_prg_mask = map52_helper1 ? 0x0f : 0x1f;
1086710867      state->m_mmc_chr_base = ((data & 0x20) << 4) | ((data & 0x04) << 6) | (map52_helper2 ? ((data & 0x10) << 3) : 0);
1086810868      state->m_mmc_chr_mask = map52_helper2 ? 0x7f : 0xff;
10869      mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
10870      mmc3_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
10869      mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
10870      mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
1087110871
1087210872      state->m_map52_reg_written = 1;
1087310873   }
r17963r17964
1089310893
1089410894static WRITE8_HANDLER( bmc_gold7in1_m_w )
1089510895{
10896   nes_state *state = space->machine().driver_data<nes_state>();
10896   nes_state *state = space.machine().driver_data<nes_state>();
1089710897   UINT8 map52_helper1, map52_helper2;
1089810898   LOG_MMC(("bmc_gold7in1_m_w, offset: %04x, data: %02x\n", offset, data));
1089910899
r17963r17964
1090610906      state->m_mmc_prg_mask = map52_helper1 ? 0x0f : 0x1f;
1090710907      state->m_mmc_chr_base = ((data & 0x20) << 3) | ((data & 0x04) << 7) | (map52_helper2 ? ((data & 0x10) << 3) : 0);
1090810908      state->m_mmc_chr_mask = map52_helper2 ? 0x7f : 0xff;
10909      mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
10910      mmc3_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
10909      mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
10910      mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
1091110911
1091210912      state->m_map52_reg_written = BIT(data, 7);   // mc_2hikg & mc_s3nt3 write here multiple time
1091310913   }
r17963r17964
1096310963
1096410964static WRITE8_HANDLER( bmc_gc6in1_l_w )
1096510965{
10966   nes_state *state = space->machine().driver_data<nes_state>();
10966   nes_state *state = space.machine().driver_data<nes_state>();
1096710967   UINT8 bank;
1096810968   LOG_MMC(("bmc_gc6in1_l_w, offset: %04x, data: %02x\n", offset, data));
1096910969   offset += 0x100;
r17963r17964
1097410974      if (data & 0x80)
1097510975      {
1097610976         bank = (data & 0x0f) | ((state->m_mmc_reg[1] & 0x03) << 4);
10977         prg16_89ab(space->machine(), bank);
10978         prg16_cdef(space->machine(), bank);
10977         prg16_89ab(space.machine(), bank);
10978         prg16_cdef(space.machine(), bank);
1097910979      }
1098010980      else
10981         bmc_gc6in1_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
10981         bmc_gc6in1_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
1098210982   }
1098310983   else if (offset == 0x1001)
1098410984   {
1098510985      state->m_mmc_reg[1] = data;
10986      bmc_gc6in1_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
10986      bmc_gc6in1_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
1098710987   }
1098810988   else if (offset == 0x1007)
1098910989   {
r17963r17964
1099310993
1099410994static WRITE8_HANDLER( bmc_gc6in1_w )
1099510995{
10996   nes_state *state = space->machine().driver_data<nes_state>();
10996   nes_state *state = space.machine().driver_data<nes_state>();
1099710997   UINT8 mmc_helper, cmd;
1099810998   static const UINT8 conv_table[8] = {0, 6, 3, 7, 5, 2, 4, 1};
1099910999   LOG_MMC(("bmc_gc6in1_w, offset: %04x, data: %02x\n", offset, data));
r17963r17964
1100811008
1100911009            /* Has PRG Mode changed? */
1101011010            if (mmc_helper & 0x40)
11011               bmc_gc6in1_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
11011               bmc_gc6in1_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
1101211012
1101311013            /* Has CHR Mode changed? */
1101411014            if (mmc_helper & 0x80)
11015               bmc_gc6in1_set_chr(space->machine(), state->m_mmc_chr_source);
11015               bmc_gc6in1_set_chr(space.machine(), state->m_mmc_chr_source);
1101611016            break;
1101711017
1101811018         case 0x0001:
r17963r17964
1102211022            case 0: case 1:   // these do not need to be separated: we take care of them in set_chr!
1102311023            case 2: case 3: case 4: case 5:
1102411024               state->m_mmc_vrom_bank[cmd] = data;
11025               bmc_gc6in1_set_chr(space->machine(), state->m_mmc_chr_source);
11025               bmc_gc6in1_set_chr(space.machine(), state->m_mmc_chr_source);
1102611026               break;
1102711027            case 6:
1102811028            case 7:
1102911029               state->m_mmc_prg_bank[cmd - 6] = data;
11030               bmc_gc6in1_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
11030               bmc_gc6in1_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
1103111031               break;
1103211032         }
1103311033            break;
r17963r17964
1105211052
1105311053            /* Has PRG Mode changed? */
1105411054            if (mmc_helper & 0x40)
11055               bmc_gc6in1_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
11055               bmc_gc6in1_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
1105611056
1105711057            /* Has CHR Mode changed? */
1105811058            if (mmc_helper & 0x80)
11059               bmc_gc6in1_set_chr(space->machine(), state->m_mmc_chr_source);
11059               bmc_gc6in1_set_chr(space.machine(), state->m_mmc_chr_source);
1106011060
1106111061            state->m_mmc_reg[3] = 1;
1106211062            break;
r17963r17964
1107111071                  case 0: case 1:   // these do not need to be separated: we take care of them in set_chr!
1107211072                  case 2: case 3: case 4: case 5:
1107311073                     state->m_mmc_vrom_bank[cmd] = data;
11074                     bmc_gc6in1_set_chr(space->machine(), state->m_mmc_chr_source);
11074                     bmc_gc6in1_set_chr(space.machine(), state->m_mmc_chr_source);
1107511075                     break;
1107611076                  case 6:
1107711077                  case 7:
1107811078                     state->m_mmc_prg_bank[cmd - 6] = data;
11079                     bmc_gc6in1_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
11079                     bmc_gc6in1_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
1108011080                     break;
1108111081               }
1108211082            }
r17963r17964
1108411084
1108511085
1108611086         case 0x2001:
11087            set_nt_mirroring(space->machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
11087            set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
1108811088            break;
1108911089
1109011090         default:
r17963r17964
1111111111
1111211112static WRITE8_HANDLER( bmc_family4646_m_w )
1111311113{
11114   nes_state *state = space->machine().driver_data<nes_state>();
11114   nes_state *state = space.machine().driver_data<nes_state>();
1111511115   LOG_MMC(("bmc_family4646_m_w, offset: %04x, data: %02x\n", offset, data));
1111611116
1111711117   if (offset == 0x01)
r17963r17964
1112011120      state->m_mmc_prg_mask = 0x1f;
1112111121      state->m_mmc_chr_base = (data & 0x20) << 3;
1112211122      state->m_mmc_chr_mask = 0xff;
11123      mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
11124      mmc3_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
11123      mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
11124      mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
1112511125   }
1112611126}
1112711127
r17963r17964
1113311133
1113411134static WRITE8_HANDLER( bmc_vt5201_w )
1113511135{
11136   nes_state *state = space->machine().driver_data<nes_state>();
11136   nes_state *state = space.machine().driver_data<nes_state>();
1113711137   LOG_MMC(("bmc_vt5201_w, offset: %04x, data: %02x\n", offset, data));
1113811138
1113911139   state->m_mmc_latch1 = BIT(offset, 8);
1114011140
1114111141   // not sure about this mirroring bit!!
1114211142   // without it TN 95 in 1 has glitches in Lunar Ball; with it TN 95 in 1 has glitches in Galaxian!
11143   set_nt_mirroring(space->machine(), BIT(data, 3) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
11143   set_nt_mirroring(space.machine(), BIT(data, 3) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
1114411144   if (BIT(offset, 7))
1114511145   {
11146      prg16_89ab(space->machine(), (offset >> 4) & 0x07);
11147      prg16_cdef(space->machine(), (offset >> 4) & 0x07);
11146      prg16_89ab(space.machine(), (offset >> 4) & 0x07);
11147      prg16_cdef(space.machine(), (offset >> 4) & 0x07);
1114811148   }
1114911149   else
11150      prg32(space->machine(), (offset >> 5) & 0x03);
11151   chr8(space->machine(), offset, CHRROM);
11150      prg32(space.machine(), (offset >> 5) & 0x03);
11151   chr8(space.machine(), offset, CHRROM);
1115211152}
1115311153
1115411154static READ8_HANDLER( bmc_vt5201_r )
1115511155{
11156   nes_state *state = space->machine().driver_data<nes_state>();
11156   nes_state *state = space.machine().driver_data<nes_state>();
1115711157   LOG_MMC(("bmc_vt5201_r, offset: %04x\n", offset));
1115811158   //  state->m_mmc_dipsetting = state->ioport("CARTDIPS")->read();
1115911159
1116011160   if (state->m_mmc_latch1)
1116111161      return state->m_mmc_dipsetting; // cart mode, depending on the Dip Switches (always zero atm, given we have no way to add cart-based DIPs)
1116211162   else
11163      return mmc_hi_access_rom(space->machine(), offset);
11163      return mmc_hi_access_rom(space.machine(), offset);
1116411164}
1116511165
1116611166/*************************************************************
r17963r17964
1118711187
1118811188static WRITE8_HANDLER( bmc_bs5_w )
1118911189{
11190   nes_state *state = space->machine().driver_data<nes_state>();
11190   nes_state *state = space.machine().driver_data<nes_state>();
1119111191   UINT8 bs5_helper = (offset & 0xc00) >> 10;
1119211192   LOG_MMC(("bmc_bs5_w, offset: %04x, data: %02x\n", offset, data));
1119311193//  state->m_mmc_dipsetting = state->ioport("CARTDIPS")->read();
r17963r17964
1120211202            state->m_mmc_prg_bank[bs5_helper] = offset & 0x0f;
1120311203         break;
1120411204   }
11205   bmc_bs5_update_banks(space->machine());
11205   bmc_bs5_update_banks(space.machine());
1120611206}
1120711207
1120811208/*************************************************************
r17963r17964
1122011220
1122111221   if (!BIT(offset, 6))
1122211222   {
11223      prg16_89ab(space->machine(), (bank << 1) | BIT(offset, 5));
11224      prg16_cdef(space->machine(), (bank << 1) | BIT(offset, 5));
11223      prg16_89ab(space.machine(), (bank << 1) | BIT(offset, 5));
11224      prg16_cdef(space.machine(), (bank << 1) | BIT(offset, 5));
1122511225   }
1122611226   else
11227      prg32(space->machine(), bank);
11227      prg32(space.machine(), bank);
1122811228
11229   set_nt_mirroring(space->machine(), BIT(offset, 4) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
11229   set_nt_mirroring(space.machine(), BIT(offset, 4) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
1123011230
11231   chr8(space->machine(), offset & 0x0f, CHRROM);
11231   chr8(space.machine(), offset & 0x0f, CHRROM);
1123211232}
1123311233
1123411234/*************************************************************
r17963r17964
1124711247
1124811248   if (BIT(offset, 7))
1124911249   {
11250      prg16_89ab(space->machine(), pbank | BIT(offset, 6));
11251      prg16_cdef(space->machine(), pbank | BIT(offset, 6));
11250      prg16_89ab(space.machine(), pbank | BIT(offset, 6));
11251      prg16_cdef(space.machine(), pbank | BIT(offset, 6));
1125211252   }
1125311253   else
11254      prg32(space->machine(), pbank >> 1);
11254      prg32(space.machine(), pbank >> 1);
1125511255
11256   set_nt_mirroring(space->machine(), BIT(offset, 10) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
11256   set_nt_mirroring(space.machine(), BIT(offset, 10) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
1125711257
11258   chr8(space->machine(), cbank, CHRROM);
11258   chr8(space.machine(), cbank, CHRROM);
1125911259}
1126011260
1126111261/*************************************************************
r17963r17964
1128811288
1128911289static WRITE8_HANDLER( bmc_gb63_w )
1129011290{
11291   nes_state *state = space->machine().driver_data<nes_state>();
11291   nes_state *state = space.machine().driver_data<nes_state>();
1129211292   LOG_MMC(("bmc_gb63_w, offset: %04x, data: %02x\n", offset, data));
1129311293
1129411294   state->m_mmc_reg[offset & 1] = data;
r17963r17964
1129811298
1129911299static READ8_HANDLER( bmc_gb63_r )
1130011300{
11301   nes_state *state = space->machine().driver_data<nes_state>();
11301   nes_state *state = space.machine().driver_data<nes_state>();
1130211302   LOG_MMC(("bmc_gb63_r, offset: %04x\n", offset));
1130311303   //  state->m_mmc_dipsetting = state->ioport("CARTDIPS")->read();
1130411304
1130511305   if (state->m_mmc_latch1 == 1)
1130611306      return 0xff;   // open bus
1130711307   else
11308      return mmc_hi_access_rom(space->machine(), offset);
11308      return mmc_hi_access_rom(space.machine(), offset);
1130911309}
1131011310
1131111311/*************************************************************
r17963r17964
1131811318{
1131911319   LOG_MMC(("edu2k_w, offset: %04x, data: %02x\n", offset, data));
1132011320
11321   prg32(space->machine(), data & 0x1f);
11322   wram_bank(space->machine(), (data & 0xc0) >> 6, NES_WRAM);
11321   prg32(space.machine(), data & 0x1f);
11322   wram_bank(space.machine(), (data & 0xc0) >> 6, NES_WRAM);
1132311323}
1132411324
1132511325/*************************************************************
r17963r17964
1133811338
1133911339static WRITE8_HANDLER( h2288_l_w )
1134011340{
11341   nes_state *state = space->machine().driver_data<nes_state>();
11341   nes_state *state = space.machine().driver_data<nes_state>();
1134211342   LOG_MMC(("h2288_l_w offset: %04x, data: %02x\n", offset, data));
1134311343   offset += 0x100;
1134411344
r17963r17964
1134911349      {
1135011350         UINT8 helper1 = (state->m_mmc_reg[0] & 0x05) | ((state->m_mmc_reg[0] >> 2) & 0x0a);
1135111351         UINT8 helper2 = BIT(state->m_mmc_reg[0], 1);
11352         prg16_89ab(space->machine(), helper1 & ~helper2);
11353         prg16_cdef(space->machine(), helper1 |  helper2);
11352         prg16_89ab(space.machine(), helper1 & ~helper2);
11353         prg16_cdef(space.machine(), helper1 |  helper2);
1135411354      }
1135511355      else
11356         mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
11356         mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
1135711357   }
1135811358}
1135911359
r17963r17964
1144411444
1144511445static WRITE8_HANDLER( shjy3_w )
1144611446{
11447   nes_state *state = space->machine().driver_data<nes_state>();
11447   nes_state *state = space.machine().driver_data<nes_state>();
1144811448   UINT8 mmc_helper, shift;
1144911449   LOG_MMC(("shjy3_w, offset: %04x, data: %02x\n", offset, data));
1145011450
r17963r17964
1147211472         case 0x1400:
1147311473            switch (data & 0x03)
1147411474            {
11475               case 0: set_nt_mirroring(space->machine(), PPU_MIRROR_VERT); break;
11476               case 1: set_nt_mirroring(space->machine(), PPU_MIRROR_HORZ); break;
11477               case 2: set_nt_mirroring(space->machine(), PPU_MIRROR_LOW); break;
11478               case 3: set_nt_mirroring(space->machine(), PPU_MIRROR_HIGH); break;
11475               case 0: set_nt_mirroring(space.machine(), PPU_MIRROR_VERT); break;
11476               case 1: set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); break;
11477               case 2: set_nt_mirroring(space.machine(), PPU_MIRROR_LOW); break;
11478               case 3: set_nt_mirroring(space.machine(), PPU_MIRROR_HIGH); break;
1147911479            }
1148011480            break;
1148111481         case 0x7000:
r17963r17964
1149111491            break;
1149211492      }
1149311493   }
11494   shjy3_update(space->machine());
11494   shjy3_update(space.machine());
1149511495}
1149611496
1149711497/*************************************************************
r17963r17964
1150611506
1150711507WRITE8_HANDLER( unl_6035052_extra_w )
1150811508{
11509   nes_state *state = space->machine().driver_data<nes_state>();
11509   nes_state *state = space.machine().driver_data<nes_state>();
1151011510   LOG_MMC(("unl_6035052_extra_w, offset: %04x, data: %02x\n", offset, data));
1151111511   state->m_mmc_latch1 = data & 0x03;
1151211512   if (state->m_mmc_latch1 == 1)
r17963r17964
1151511515
1151611516READ8_HANDLER( unl_6035052_extra_r )
1151711517{
11518   nes_state *state = space->machine().driver_data<nes_state>();
11518   nes_state *state = space.machine().driver_data<nes_state>();
1151911519   LOG_MMC(("unl_6035052_extra_r, offset: %04x\n", offset));
1152011520   return state->m_mmc_latch1;
1152111521}
r17963r17964
1157211572
1157311573static WRITE8_HANDLER( pjoy84_m_w )
1157411574{
11575   nes_state *state = space->machine().driver_data<nes_state>();
11575   nes_state *state = space.machine().driver_data<nes_state>();
1157611576   LOG_MMC(("pjoy84_m_w offset: %04x, data: %02x\n", offset, data));
1157711577
1157811578   switch (offset & 0x03)
r17963r17964
1158411584      case 0x01:
1158511585      case 0x02:
1158611586         state->m_mmc_reg[offset & 0x03] = data;
11587         pjoy84_set_base_mask(space->machine());
11587         pjoy84_set_base_mask(space.machine());
1158811588         if (state->m_mmc_reg[3] & 0x10)
11589            chr8(space->machine(), (state->m_mmc_chr_base >> 3) | (state->m_mmc_reg[2] & 0x0f), state->m_mmc_chr_source);
11589            chr8(space.machine(), (state->m_mmc_chr_base >> 3) | (state->m_mmc_reg[2] & 0x0f), state->m_mmc_chr_source);
1159011590         else
11591            mmc3_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
11592         mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
11591            mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
11592         mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
1159311593         break;
1159411594   }
1159511595}
r17963r17964
1165211652
1165311653static WRITE8_HANDLER( someri_mmc1_w )
1165411654{
11655   nes_state *state = space->machine().driver_data<nes_state>();
11655   nes_state *state = space.machine().driver_data<nes_state>();
1165611656
1165711657   assert(state->m_mmc_cmd1 == 2);
1165811658
r17963r17964
1166211662      state->m_mmc1_latch = 0;
1166311663
1166411664      state->m_mmc_reg[0] |= 0x0c;
11665      someri_mmc1_set_prg(space->machine());
11665      someri_mmc1_set_prg(space.machine());
1166611666      return;
1166711667   }
1166811668
r17963r17964
1168211682            state->m_mmc_reg[0] = state->m_mmc1_latch;
1168311683            switch (state->m_mmc_reg[0] & 0x03)
1168411684            {
11685            case 0: set_nt_mirroring(space->machine(), PPU_MIRROR_LOW); break;
11686            case 1: set_nt_mirroring(space->machine(), PPU_MIRROR_HIGH); break;
11687            case 2: set_nt_mirroring(space->machine(), PPU_MIRROR_VERT); break;
11688            case 3: set_nt_mirroring(space->machine(), PPU_MIRROR_HORZ); break;
11685            case 0: set_nt_mirroring(space.machine(), PPU_MIRROR_LOW); break;
11686            case 1: set_nt_mirroring(space.machine(), PPU_MIRROR_HIGH); break;
11687            case 2: set_nt_mirroring(space.machine(), PPU_MIRROR_VERT); break;
11688            case 3: set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); break;
1168911689            }
11690            someri_mmc1_set_chr(space->machine());
11691            someri_mmc1_set_prg(space->machine());
11690            someri_mmc1_set_chr(space.machine());
11691            someri_mmc1_set_prg(space.machine());
1169211692            break;
1169311693         case 0x2000:
1169411694            state->m_mmc_reg[1] = state->m_mmc1_latch;
11695            someri_mmc1_set_chr(space->machine());
11696            someri_mmc1_set_prg(space->machine());
11695            someri_mmc1_set_chr(space.machine());
11696            someri_mmc1_set_prg(space.machine());
1169711697            break;
1169811698         case 0x4000:
1169911699            state->m_mmc_reg[2] = state->m_mmc1_latch;
11700            someri_mmc1_set_chr(space->machine());
11700            someri_mmc1_set_chr(space.machine());
1170111701            break;
1170211702         case 0x6000:
1170311703            state->m_mmc_reg[3] = state->m_mmc1_latch;
11704            someri_mmc1_set_prg(space->machine());
11704            someri_mmc1_set_prg(space.machine());
1170511705            break;
1170611706      }
1170711707
r17963r17964
1171211712// MMC3 Mode emulation
1171311713static WRITE8_HANDLER( someri_mmc3_w )
1171411714{
11715   nes_state *state = space->machine().driver_data<nes_state>();
11715   nes_state *state = space.machine().driver_data<nes_state>();
1171611716   UINT8 mmc_helper, cmd;
1171711717
1171811718   assert(state->m_mmc_cmd1 == 1);
r17963r17964
1172311723         state->m_mmc3_latch = data;
1172411724
1172511725         if (mmc_helper & 0x40)
11726            mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
11726            mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
1172711727
1172811728         if (mmc_helper & 0x80)
11729            mmc3_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
11729            mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
1173011730         break;
1173111731
1173211732      case 0x0001:
r17963r17964
1173611736         case 0: case 1:
1173711737         case 2: case 3: case 4: case 5:
1173811738            state->m_mmc_vrom_bank[cmd] = data;
11739            mmc3_set_chr(space->machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
11739            mmc3_set_chr(space.machine(), state->m_mmc_chr_source, state->m_mmc_chr_base, state->m_mmc_chr_mask);
1174011740            break;
1174111741         case 6:
1174211742         case 7:
1174311743            state->m_mmc_prg_bank[cmd - 6] = data;
11744            mmc3_set_prg(space->machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
11744            mmc3_set_prg(space.machine(), state->m_mmc_prg_base, state->m_mmc_prg_mask);
1174511745            break;
1174611746         }
1174711747         break;
1174811748
1174911749      case 0x2000:
11750         set_nt_mirroring(space->machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
11750         set_nt_mirroring(space.machine(), BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
1175111751         break;
1175211752      case 0x2001: break;
1175311753      case 0x4000: state->m_IRQ_count_latch = data; break;
r17963r17964
1176011760// VRC2 Mode emulation
1176111761static WRITE8_HANDLER( someri_vrc2_w )
1176211762{
11763   nes_state *state = space->machine().driver_data<nes_state>();
11763   nes_state *state = space.machine().driver_data<nes_state>();
1176411764   UINT8 bank, shift;
1176511765
1176611766   assert(state->m_mmc_cmd1 == 0);
r17963r17964
1176811768   if (offset < 0x1000)
1176911769   {
1177011770      state->m_mmc_prg_bank[4] = data;
11771      prg8_89(space->machine(), state->m_mmc_prg_bank[4]);
11771      prg8_89(space.machine(), state->m_mmc_prg_bank[4]);
1177211772   }
1177311773   else if (offset < 0x2000)
1177411774   {
1177511775      switch (data & 0x03)
1177611776      {
11777         case 0x00: set_nt_mirroring(space->machine(), PPU_MIRROR_VERT); break;
11778         case 0x01: set_nt_mirroring(space->machine(), PPU_MIRROR_HORZ); break;
11779         case 0x02: set_nt_mirroring(space->machine(), PPU_MIRROR_LOW); break;
11780         case 0x03: set_nt_mirroring(space->machine(), PPU_MIRROR_HIGH); break;
11777         case 0x00: set_nt_mirroring(space.machine(), PPU_MIRROR_VERT); break;
11778         case 0x01: set_nt_mirroring(space.machine(), PPU_MIRROR_HORZ); break;
11779         case 0x02: set_nt_mirroring(space.machine(), PPU_MIRROR_LOW); break;
11780         case 0x03: set_nt_mirroring(space.machine(), PPU_MIRROR_HIGH); break;
1178111781      }
1178211782   }
1178311783   else if (offset < 0x3000)
1178411784   {
1178511785      state->m_mmc_prg_bank[5] = data;
11786      prg8_ab(space->machine(), state->m_mmc_prg_bank[5]);
11786      prg8_ab(space.machine(), state->m_mmc_prg_bank[5]);
1178711787   }
1178811788   else if (offset < 0x7000)
1178911789   {
r17963r17964
1179111791      shift = BIT(offset, 2) * 4;
1179211792      data = (data & 0x0f) << shift;
1179311793      state->m_mmc_vrom_bank[6 + bank] = data | state->m_mmc_chr_base;
11794      chr1_x(space->machine(), bank, state->m_mmc_vrom_bank[6 + bank], CHRROM);
11794      chr1_x(space.machine(), bank, state->m_mmc_vrom_bank[6 + bank], CHRROM);
1179511795   }
1179611796}
1179711797
1179811798static WRITE8_HANDLER( someri_w )
1179911799{
11800   nes_state *state = space->machine().driver_data<nes_state>();
11800   nes_state *state = space.machine().driver_data<nes_state>();
1180111801   LOG_MMC(("someri_w mode %d, offset: %04x, data: %02x\n", state->m_mmc_cmd1, offset, data));
1180211802
1180311803   switch (state->m_mmc_cmd1)
r17963r17964
1183411834
1183511835static WRITE8_HANDLER( someri_l_w )
1183611836{
11837   nes_state *state = space->machine().driver_data<nes_state>();
11837   nes_state *state = space.machine().driver_data<nes_state>();
1183811838   LOG_MMC(("someri_l_w, offset: %04x, data: %02x\n", offset, data));
1183911839   offset += 0x100;
1184011840
r17963r17964
1184411844      state->m_mmc_chr_base = ((state->m_mmc_cmd1 & 0x04) << 6);
1184511845      if (state->m_mmc_cmd1 != 1)
1184611846         state->m_IRQ_enable = 0;
11847      someri_mode_update(space->machine());
11847      someri_mode_update(space.machine());
1184811848   }
1184911849}
1185011850
r17963r17964
1185911859
1186011860static WRITE8_HANDLER( fujiya_m_w )
1186111861{
11862   nes_state *state = space->machine().driver_data<nes_state>();
11862   nes_state *state = space.machine().driver_data<nes_state>();
1186311863   LOG_MMC(("fujiya_m_w, offset: %04x, data: %02x\n", offset, data));
1186411864   offset += 0x6000;
1186511865
r17963r17964
1186911869
1187011870static READ8_HANDLER( fujiya_m_r )
1187111871{
11872   nes_state *state = space->machine().driver_data<nes_state>();
11872   nes_state *state = space.machine().driver_data<nes_state>();
1187311873   LOG_MMC(("fujiya_m_r, offset: %04x\n", offset));
1187411874   offset += 0x6000;
1187511875
trunk/src/mess/machine/llc.c
r17963r17964
152152
153153MACHINE_RESET_MEMBER(llc_state,llc2)
154154{
155   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
155   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
156156
157   space->unmap_write(0x0000, 0x3fff);
157   space.unmap_write(0x0000, 0x3fff);
158158   membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base());
159159
160   space->unmap_write(0x4000, 0x5fff);
160   space.unmap_write(0x4000, 0x5fff);
161161   membank("bank2")->set_base(machine().root_device().memregion("maincpu")->base() + 0x4000);
162162
163   space->unmap_write(0x6000, 0xbfff);
163   space.unmap_write(0x6000, 0xbfff);
164164   membank("bank3")->set_base(machine().root_device().memregion("maincpu")->base() + 0x6000);
165165
166   space->install_write_bank(0xc000, 0xffff, "bank4");
166   space.install_write_bank(0xc000, 0xffff, "bank4");
167167   membank("bank4")->set_base(machine().device<ram_device>(RAM_TAG)->pointer() + 0xc000);
168168
169169}
trunk/src/mess/machine/tandy1t.c
r17963r17964
165165
166166WRITE8_HANDLER ( pc_t1t_p37x_w )
167167{
168//  DBG_LOG(2,"T1T_p37x_w",("%.5x #%d $%02x\n", space->device().safe_pc( ),offset, data));
168//  DBG_LOG(2,"T1T_p37x_w",("%.5x #%d $%02x\n", space.device().safe_pc( ),offset, data));
169169   if (offset!=4)
170      logerror("T1T_p37x_w %.5x #%d $%02x\n", space->device().safe_pc( ),offset, data);
170      logerror("T1T_p37x_w %.5x #%d $%02x\n", space.device().safe_pc( ),offset, data);
171171   tandy.data[offset]=data;
172172   switch( offset )
173173   {
r17963r17964
180180 READ8_HANDLER ( pc_t1t_p37x_r )
181181{
182182   int data = tandy.data[offset];
183//  DBG_LOG(1,"T1T_p37x_r",("%.5x #%d $%02x\n", space->device().safe_pc( ), offset, data));
183//  DBG_LOG(1,"T1T_p37x_r",("%.5x #%d $%02x\n", space.device().safe_pc( ), offset, data));
184184    return data;
185185}
186186
r17963r17964
203203   {
204204   case 1:
205205      tandy_ppi.portb = data;
206      pit8253_gate2_w(space->machine().device("pit8253"), BIT(data, 0));
207      pc_speaker_set_spkrdata( space->machine(), data & 0x02 );
206      pit8253_gate2_w(space.machine().device("pit8253"), BIT(data, 0));
207      pc_speaker_set_spkrdata( space.machine(), data & 0x02 );
208208      pc_keyb_set_clock(data&0x40);
209209      if ( data & 0x80 )
210210      {
r17963r17964
214214   case 2:
215215      tandy_ppi.portc = data;
216216      if (data & 8)
217         space->machine().device("maincpu")->set_clock_scale(1);
217         space.machine().device("maincpu")->set_clock_scale(1);
218218      else
219         space->machine().device("maincpu")->set_clock_scale(4.77/8);
219         space.machine().device("maincpu")->set_clock_scale(4.77/8);
220220      break;
221221   }
222222}
r17963r17964
261261{
262262   UINT8 data = 0xFF;
263263
264   logerror( "%s: tandy1000_bank_r: offset = %x\n", space->machine().describe_context(), offset );
264   logerror( "%s: tandy1000_bank_r: offset = %x\n", space.machine().describe_context(), offset );
265265
266266   switch( offset )
267267   {
r17963r17964
276276
277277WRITE8_HANDLER( tandy1000_bank_w )
278278{
279   logerror( "%s: tandy1000_bank_w: offset = %x, data = %02x\n", space->machine().describe_context(), offset, data );
279   logerror( "%s: tandy1000_bank_w: offset = %x, data = %02x\n", space.machine().describe_context(), offset, data );
280280
281281   switch( offset )
282282   {
283283   case 0x00:   /* FFEA */
284284      tandy.bios_bank = data;
285      tandy1000_set_bios_bank(space->machine());
285      tandy1000_set_bios_bank(space.machine());
286286      break;
287287   }
288288}
trunk/src/mess/machine/ti85.c
r17963r17964
3838   }
3939}
4040
41inline void ti8x_update_bank(address_space *space, UINT8 bank, UINT8 *base, UINT8 page, bool is_ram)
41inline void ti8x_update_bank(address_space &space, UINT8 bank, UINT8 *base, UINT8 page, bool is_ram)
4242{
43   ti85_state *state = space->machine().driver_data<ti85_state>();
43   ti85_state *state = space.machine().driver_data<ti85_state>();
4444   static const char *const tag[] = {"bank1", "bank2", "bank3", "bank4"};
4545
4646   state->membank(tag[bank&3])->set_base(base + (0x4000 * page));
4747
4848   if (is_ram)
49      space->install_write_bank(bank * 0x4000, bank * 0x4000 + 0x3fff, tag[bank&3]);
49      space.install_write_bank(bank * 0x4000, bank * 0x4000 + 0x3fff, tag[bank&3]);
5050   else
51      space->nop_write(bank * 0x4000, bank * 0x4000 + 0x3fff);
51      space.nop_write(bank * 0x4000, bank * 0x4000 + 0x3fff);
5252}
5353
5454static void update_ti85_memory (running_machine &machine)
r17963r17964
6060static void update_ti83p_memory (running_machine &machine)
6161{
6262   ti85_state *state = machine.driver_data<ti85_state>();
63   address_space *space = state->m_maincpu->space(AS_PROGRAM);
63   address_space &space = *state->m_maincpu->space(AS_PROGRAM);
6464
6565   if (state->m_ti8x_memory_page_1 & 0x40)
6666   {
r17963r17964
8484static void update_ti86_memory (running_machine &machine)
8585{
8686   ti85_state *state = machine.driver_data<ti85_state>();
87   address_space *space = state->m_maincpu->space(AS_PROGRAM);
87   address_space &space = *state->m_maincpu->space(AS_PROGRAM);
8888
8989   if (state->m_ti8x_memory_page_1 & 0x40)
9090   {
r17963r17964
112112
113113void ti85_state::machine_start()
114114{
115   address_space *space = m_maincpu->space(AS_PROGRAM);
115   address_space &space = *m_maincpu->space(AS_PROGRAM);
116116   m_bios = memregion("bios")->base();
117117
118118   m_timer_interrupt_mask = 0;
r17963r17964
133133
134134   machine().scheduler().timer_pulse(attotime::from_hz(200), FUNC(ti85_timer_callback));
135135
136   space->unmap_write(0x0000, 0x3fff);
137   space->unmap_write(0x4000, 0x7fff);
136   space.unmap_write(0x0000, 0x3fff);
137   space.unmap_write(0x4000, 0x7fff);
138138   membank("bank1")->set_base(m_bios);
139139   membank("bank2")->set_base(m_bios + 0x04000);
140140}
r17963r17964
149149
150150MACHINE_START_MEMBER(ti85_state,ti83p)
151151{
152   address_space *space = m_maincpu->space(AS_PROGRAM);
152   address_space &space = *m_maincpu->space(AS_PROGRAM);
153153   m_bios = memregion("bios")->base();
154154
155155   m_timer_interrupt_mask = 0;
r17963r17964
171171   m_ti8x_ram = auto_alloc_array(machine(), UINT8, 32*1024);
172172   memset(m_ti8x_ram, 0, sizeof(UINT8)*32*1024);
173173
174   space->unmap_write(0x0000, 0x3fff);
175   space->unmap_write(0x4000, 0x7fff);
176   space->unmap_write(0x8000, 0xbfff);
174   space.unmap_write(0x0000, 0x3fff);
175   space.unmap_write(0x4000, 0x7fff);
176   space.unmap_write(0x8000, 0xbfff);
177177
178178   membank("bank1")->set_base(m_bios);
179179   membank("bank2")->set_base(m_bios);
r17963r17964
187187
188188MACHINE_START_MEMBER(ti85_state,ti86)
189189{
190   address_space *space = m_maincpu->space(AS_PROGRAM);
190   address_space &space = *m_maincpu->space(AS_PROGRAM);
191191   m_bios = memregion("bios")->base();
192192
193193   m_timer_interrupt_mask = 0;
r17963r17964
209209   m_ti8x_ram = auto_alloc_array(machine(), UINT8, 128*1024);
210210   memset(m_ti8x_ram, 0, sizeof(UINT8)*128*1024);
211211
212   space->unmap_write(0x0000, 0x3fff);
212   space.unmap_write(0x0000, 0x3fff);
213213
214214   membank("bank1")->set_base(m_bios);
215215   membank("bank2")->set_base(m_bios + 0x04000);
r17963r17964
608608static void ti85_setup_snapshot (running_machine &machine, UINT8 * data)
609609{
610610   ti85_state *state = machine.driver_data<ti85_state>();
611   address_space *space = state->m_maincpu->space(AS_PROGRAM);
611   address_space &space = *state->m_maincpu->space(AS_PROGRAM);
612612   int i;
613613   unsigned char lo,hi;
614614   unsigned char * hdw = data + 0x8000 + 0x94;
r17963r17964
617617
618618   /* Memory dump */
619619   for (i = 0; i < 0x8000; i++)
620      space->write_byte(i + 0x8000, data[i+0x94]);
620      space.write_byte(i + 0x8000, data[i+0x94]);
621621
622622   state->m_keypad_mask = hdw[0x00]&0x7f;
623623
trunk/src/mess/machine/galaxy.c
r17963r17964
155155
156156DRIVER_INIT_MEMBER(galaxy_state,galaxy)
157157{
158   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
159   space->install_readwrite_bank( 0x2800, 0x2800 + machine().device<ram_device>(RAM_TAG)->size() - 1, "bank1");
158   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
159   space.install_readwrite_bank( 0x2800, 0x2800 + machine().device<ram_device>(RAM_TAG)->size() - 1, "bank1");
160160   membank("bank1")->set_base(machine().device<ram_device>(RAM_TAG)->pointer());
161161
162162   if (machine().device<ram_device>(RAM_TAG)->size() < (6 + 48) * 1024)
163163   {
164      space->nop_readwrite( 0x2800 + machine().device<ram_device>(RAM_TAG)->size(), 0xffff);
164      space.nop_readwrite( 0x2800 + machine().device<ram_device>(RAM_TAG)->size(), 0xffff);
165165   }
166166}
167167
r17963r17964
171171
172172MACHINE_RESET_MEMBER(galaxy_state,galaxy)
173173{
174   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
174   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
175175
176176   /* ROM 2 enable/disable */
177177   if (machine().root_device().ioport("ROM2")->read()) {
178      space->install_read_bank(0x1000, 0x1fff, "bank10");
178      space.install_read_bank(0x1000, 0x1fff, "bank10");
179179   } else {
180      space->nop_read(0x1000, 0x1fff);
180      space.nop_read(0x1000, 0x1fff);
181181   }
182   space->nop_write(0x1000, 0x1fff);
182   space.nop_write(0x1000, 0x1fff);
183183
184184   if (machine().root_device().ioport("ROM2")->read())
185185      membank("bank10")->set_base(machine().root_device().memregion("maincpu")->base() + 0x1000);
r17963r17964
196196MACHINE_RESET_MEMBER(galaxy_state,galaxyp)
197197{
198198   UINT8 *ROM = machine().root_device().memregion("maincpu")->base();
199   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
199   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
200200
201201   machine().device("maincpu")->execute().set_irq_acknowledge_callback(galaxy_irq_callback);
202202
r17963r17964
205205   ROM[0x03fa] = 0x00;
206206   ROM[0x03fb] = 0xe0;
207207
208   space->install_read_bank(0xe000, 0xefff, "bank11");
209   space->nop_write(0xe000, 0xefff);
208   space.install_read_bank(0xe000, 0xefff, "bank11");
209   space.nop_write(0xe000, 0xefff);
210210   membank("bank11")->set_base(memregion("maincpu")->base() + 0xe000);
211211   m_interrupts_enabled = TRUE;
212212}
trunk/src/mess/machine/vtech2.c
r17963r17964
3131static void mwa_bank(running_machine &machine, int bank, int offs, int data);
3232
3333/* wrappers for bank #1 to #4 */
34static WRITE8_HANDLER ( mwa_bank1 ) { mwa_bank(space->machine(), 0,offset,data); }
35static WRITE8_HANDLER ( mwa_bank2 ) { mwa_bank(space->machine(), 1,offset,data); }
36static WRITE8_HANDLER ( mwa_bank3 ) { mwa_bank(space->machine(), 2,offset,data); }
37static WRITE8_HANDLER ( mwa_bank4 ) { mwa_bank(space->machine(), 3,offset,data); }
34static WRITE8_HANDLER ( mwa_bank1 ) { mwa_bank(space.machine(), 0,offset,data); }
35static WRITE8_HANDLER ( mwa_bank2 ) { mwa_bank(space.machine(), 1,offset,data); }
36static WRITE8_HANDLER ( mwa_bank3 ) { mwa_bank(space.machine(), 2,offset,data); }
37static WRITE8_HANDLER ( mwa_bank4 ) { mwa_bank(space.machine(), 3,offset,data); }
3838
3939/* read from banked memory (handle memory mapped i/o) */
4040static int mra_bank(running_machine &machine, int bank, int offs);
4141
4242/* wrappers for bank #1 to #4 */
43static READ8_HANDLER ( mra_bank1 ) { return mra_bank(space->machine(),0,offset); }
44static READ8_HANDLER ( mra_bank2 ) { return mra_bank(space->machine(),1,offset); }
45static READ8_HANDLER ( mra_bank3 ) { return mra_bank(space->machine(),2,offset); }
46static READ8_HANDLER ( mra_bank4 ) { return mra_bank(space->machine(),3,offset); }
43static READ8_HANDLER ( mra_bank1 ) { return mra_bank(space.machine(),0,offset); }
44static READ8_HANDLER ( mra_bank2 ) { return mra_bank(space.machine(),1,offset); }
45static READ8_HANDLER ( mra_bank3 ) { return mra_bank(space.machine(),2,offset); }
46static READ8_HANDLER ( mra_bank4 ) { return mra_bank(space.machine(),3,offset); }
4747
4848/* read banked memory (handle memory mapped i/o) */
4949static const struct { read8_space_func func; const char *name; }  mra_bank_soft[4] =
trunk/src/mess/machine/corvushd.c
r17963r17964
16221622      c->xmit_bytes = 0;      // We don't have anything more to say
16231623      c->recv_bytes = 0;      // No active commands
16241624
1625      space->machine().scheduler().timer_set((attotime::from_usec(INTERBYTE_DELAY)), FUNC(corvus_hdc_callback), CALLBACK_HTC_MODE);
1625      space.machine().scheduler().timer_set((attotime::from_usec(INTERBYTE_DELAY)), FUNC(corvus_hdc_callback), CALLBACK_HTC_MODE);
16261626
16271627//      c->status &= ~(CONTROLLER_DIRECTION | CONTROLLER_BUSY); // Put us in Idle, Host-to-Controller mode
16281628   } else {
16291629      //
16301630      // Not finished with this packet.  Insert an interbyte delay and then let the host continue
16311631      //
1632      space->machine().scheduler().timer_set((attotime::from_usec(INTERBYTE_DELAY)), FUNC(corvus_hdc_callback), CALLBACK_SAME_MODE);
1632      space.machine().scheduler().timer_set((attotime::from_usec(INTERBYTE_DELAY)), FUNC(corvus_hdc_callback), CALLBACK_SAME_MODE);
16331633   }
16341634
16351635   return result;
r17963r17964
16921692   // to the user with us Ready for more data and in Host-to-Controller mode.
16931693   //
16941694   if(c->offset == c->recv_bytes) {                  // We've received enough data to process
1695      corvus_process_command_packet(space->machine(), c->invalid_command_flag);
1695      corvus_process_command_packet(space.machine(), c->invalid_command_flag);
16961696   } else {
16971697      //
16981698      // Reset the four-second timer since we received some data
r17963r17964
17031703      // Make the controller busy for a few microseconds while the command is processed
17041704      //
17051705      c->status |= CONTROLLER_BUSY;
1706      space->machine().scheduler().timer_set((attotime::from_usec(INTERBYTE_DELAY)), FUNC(corvus_hdc_callback), CALLBACK_SAME_MODE);
1706      space.machine().scheduler().timer_set((attotime::from_usec(INTERBYTE_DELAY)), FUNC(corvus_hdc_callback), CALLBACK_SAME_MODE);
17071707   }
17081708}
trunk/src/mess/machine/zx.c
r17963r17964
1313#define   DEBUG_ZX81_PORTS   1
1414#define DEBUG_ZX81_VSYNC   1
1515
16#define LOG_ZX81_IOR(_comment) do { if (DEBUG_ZX81_PORTS) logerror("ZX81 IOR: %04x, Data: %02x, Scanline: %d (%s)\n", offset, data, space->machine().primary_screen->vpos(), _comment); } while (0)
17#define LOG_ZX81_IOW(_comment) do { if (DEBUG_ZX81_PORTS) logerror("ZX81 IOW: %04x, Data: %02x, Scanline: %d (%s)\n", offset, data, space->machine().primary_screen->vpos(), _comment); } while (0)
18#define LOG_ZX81_VSYNC do { if (DEBUG_ZX81_VSYNC) logerror("VSYNC starts in scanline: %d\n", space->machine().primary_screen->vpos()); } while (0)
16#define LOG_ZX81_IOR(_comment) do { if (DEBUG_ZX81_PORTS) logerror("ZX81 IOR: %04x, Data: %02x, Scanline: %d (%s)\n", offset, data, space.machine().primary_screen->vpos(), _comment); } while (0)
17#define LOG_ZX81_IOW(_comment) do { if (DEBUG_ZX81_PORTS) logerror("ZX81 IOW: %04x, Data: %02x, Scanline: %d (%s)\n", offset, data, space.machine().primary_screen->vpos(), _comment); } while (0)
18#define LOG_ZX81_VSYNC do { if (DEBUG_ZX81_VSYNC) logerror("VSYNC starts in scanline: %d\n", space.machine().primary_screen->vpos()); } while (0)
1919
2020
2121WRITE8_MEMBER(zx_state::zx_ram_w)
r17963r17964
4444
4545DRIVER_INIT_MEMBER(zx_state,zx)
4646{
47   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
47   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
4848
49   space->install_read_bank(0x4000, 0x4000 + machine().device<ram_device>(RAM_TAG)->size() - 1, "bank1");
50   space->install_write_handler(0x4000, 0x4000 + machine().device<ram_device>(RAM_TAG)->size() - 1, write8_delegate(FUNC(zx_state::zx_ram_w),this));
49   space.install_read_bank(0x4000, 0x4000 + machine().device<ram_device>(RAM_TAG)->size() - 1, "bank1");
50   space.install_write_handler(0x4000, 0x4000 + machine().device<ram_device>(RAM_TAG)->size() - 1, write8_delegate(FUNC(zx_state::zx_ram_w),this));
5151   membank("bank1")->set_base(memregion("maincpu")->base() + 0x4000);
5252}
5353
trunk/src/mess/machine/mac.c
r17963r17964
212212   offs_t memory_size, void *memory_data, int is_rom, const char *bank)
213213{
214214   mac_state *state = machine.driver_data<mac_state>();
215   address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
215   address_space& space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
216216   offs_t memory_mask;
217217
218218   memory_size = MIN(memory_size, (memory_end + 1 - memory_begin));
r17963r17964
220220
221221   if (!is_rom)
222222   {
223      space->install_readwrite_bank(memory_begin, memory_end, memory_mask, 0, bank);
223      space.install_readwrite_bank(memory_begin, memory_end, memory_mask, 0, bank);
224224   }
225225   else
226226   {
227      space->unmap_write(memory_begin, memory_end, memory_mask, 0);
228      space->install_read_bank(memory_begin, memory_end, memory_mask, 0, bank);
227      space.unmap_write(memory_begin, memory_end, memory_mask, 0);
228      space.install_read_bank(memory_begin, memory_end, memory_mask, 0, bank);
229229   }
230230
231231   state->membank(bank)->set_base(memory_data);
r17963r17964
410410   }
411411   else
412412   {
413      address_space* space = machine().device("maincpu")->memory().space(AS_PROGRAM);
413      address_space& space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
414414      UINT32 onboard_amt, simm_amt, simm_size;
415415      static const UINT32 simm_sizes[4] = { 0, 2*1024*1024, 4*1024*1024, 8*1024*1024 };
416416
417417      // force unmap of entire RAM region
418      space->unmap_write(0, 0x9fffff, 0x9fffff, 0);
418      space.unmap_write(0, 0x9fffff, 0x9fffff, 0);
419419
420420      // LC and Classic II have 2 MB built-in, all other V8-style machines have 4 MB
421421      // we reserve the first 2 or 4 MB of mess_ram for the onboard,
r17963r17964
501501      }
502502      else if ((m_model == MODEL_MAC_PORTABLE) || (m_model == MODEL_MAC_PB100) || (m_model == MODEL_MAC_IIVX) || (m_model == MODEL_MAC_IIFX))
503503      {
504         address_space* space = machine().device("maincpu")->memory().space(AS_PROGRAM);
505         space->unmap_write(0x000000, 0x9fffff, 0x9fffff, 0);
504         address_space& space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
505         space.unmap_write(0x000000, 0x9fffff, 0x9fffff, 0);
506506         mac_install_memory(machine(), 0x000000, memory_size-1, memory_size, memory_data, is_rom, "bank1");
507507      }
508508      else if ((m_model == MODEL_MAC_PB140) || (m_model == MODEL_MAC_PB160) || ((m_model >= MODEL_MAC_PBDUO_210) && (m_model <= MODEL_MAC_PBDUO_270c)))
509509      {
510         address_space* space = machine().device("maincpu")->memory().space(AS_PROGRAM);
511         space->unmap_write(0x000000, 0xffffff, 0xffffff, 0);
510         address_space& space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
511         space.unmap_write(0x000000, 0xffffff, 0xffffff, 0);
512512         mac_install_memory(machine(), 0x000000, memory_size-1, memory_size, memory_data, is_rom, "bank1");
513513      }
514514      else if ((m_model >= MODEL_MAC_II) && (m_model <= MODEL_MAC_SE30))
r17963r17964
10491049{
10501050   int reg = (offset>>3) & 0xf;
10511051
1052//  logerror("macplus_scsi_w: data %x offset %x mask %x (PC=%x)\n", data, offset, mem_mask, space->device().safe_pc());
1052//  logerror("macplus_scsi_w: data %x offset %x mask %x (PC=%x)\n", data, offset, mem_mask, space.device().safe_pc());
10531053
10541054   if ((reg == 0) && (offset == 0x100))
10551055   {
r17963r17964
18141814
18151815   if (m_model >= MODEL_MAC_POWERMAC_6100 && m_model <= MODEL_MAC_POWERMAC_8100)
18161816   {
1817      m_awacs->set_dma_base(m_maincpu->space(AS_PROGRAM), 0x10000, 0x12000);
1817      m_awacs->set_dma_base(*m_maincpu->space(AS_PROGRAM), 0x10000, 0x12000);
18181818   }
18191819
18201820   // start 60.15 Hz timer for most systems
trunk/src/mess/machine/amigacd.c
r17963r17964
8282      return;
8383
8484   /* otherwise, generate the IRQ */
85   amiga_custom_w(machine.device("maincpu")->memory().space(AS_PROGRAM), REG_INTREQ, 0x8000 | INTENA_PORTS, 0xffff);
85   amiga_custom_w(*machine.device("maincpu")->memory().space(AS_PROGRAM), REG_INTREQ, 0x8000 | INTENA_PORTS, 0xffff);
8686}
8787
8888static TIMER_CALLBACK(dmac_dma_proc)
r17963r17964
131131      case 0x20:
132132      {
133133         UINT8   v = dmac_data.istr;
134         LOG(( "DMAC: PC=%08x - ISTR Read(%04x)\n", space->device().safe_pc(), dmac_data.istr ));
134         LOG(( "DMAC: PC=%08x - ISTR Read(%04x)\n", space.device().safe_pc(), dmac_data.istr ));
135135
136136         dmac_data.istr &= ~0x0f;
137137         return v;
r17963r17964
140140
141141      case 0x21:
142142      {
143         LOG(( "DMAC: PC=%08x - CNTR Read(%04x)\n", space->device().safe_pc(), dmac_data.cntr ));
143         LOG(( "DMAC: PC=%08x - CNTR Read(%04x)\n", space.device().safe_pc(), dmac_data.cntr ));
144144         return dmac_data.cntr;
145145      }
146146      break;
147147
148148      case 0x40:   /* wtc hi */
149149      {
150         LOG(( "DMAC: PC=%08x - WTC HI Read\n", space->device().safe_pc() ));
150         LOG(( "DMAC: PC=%08x - WTC HI Read\n", space.device().safe_pc() ));
151151         return (dmac_data.wtc >> 16);
152152      }
153153      break;
154154
155155      case 0x41:   /* wtc lo */
156156      {
157         LOG(( "DMAC: PC=%08x - WTC LO Read\n", space->device().safe_pc() ));
157         LOG(( "DMAC: PC=%08x - WTC LO Read\n", space.device().safe_pc() ));
158158         return dmac_data.wtc;
159159      }
160160      break;
161161
162162      case 0x42:   /* acr hi */
163163      {
164         LOG(( "DMAC: PC=%08x - ACR HI Read\n", space->device().safe_pc() ));
164         LOG(( "DMAC: PC=%08x - ACR HI Read\n", space.device().safe_pc() ));
165165         return (dmac_data.acr >> 16);
166166      }
167167      break;
168168
169169      case 0x43:   /* acr lo */
170170      {
171         LOG(( "DMAC: PC=%08x - ACR LO Read\n", space->device().safe_pc() ));
171         LOG(( "DMAC: PC=%08x - ACR LO Read\n", space.device().safe_pc() ));
172172         return dmac_data.acr;
173173      }
174174      break;
r17963r17964
176176      case 0x48:   /* wd33c93 SCSI expansion */
177177      case 0x49:
178178      {
179         LOG(( "DMAC: PC=%08x - WD33C93 Read(%d)\n", space->device().safe_pc(), offset & 1 ));
179         LOG(( "DMAC: PC=%08x - WD33C93 Read(%d)\n", space.device().safe_pc(), offset & 1 ));
180180         return 0x00;   /* Not available without SCSI expansion */
181181      }
182182      break;
183183
184184      case 0x50:
185185      {
186         LOG(( "DMAC: PC=%08x - CDROM RESP Read\n", space->device().safe_pc() ));
187         return matsucd_response_r(space->machine());
186         LOG(( "DMAC: PC=%08x - CDROM RESP Read\n", space.device().safe_pc() ));
187         return matsucd_response_r(space.machine());
188188      }
189189      break;
190190
r17963r17964
192192      case 0x52:
193193      case 0x53:
194194      {
195         LOG(( "DMAC: PC=%08x - XT IO Read(%d)\n", space->device().safe_pc(), (offset & 3)-1 ));
195         LOG(( "DMAC: PC=%08x - XT IO Read(%d)\n", space.device().safe_pc(), (offset & 3)-1 ));
196196         return 0xff;
197197      }
198198      break;
r17963r17964
214214      case 0x66:
215215      case 0x67:
216216      {
217         device_t *tpi = space->machine().device("tpi6525");
218         LOG(( "DMAC: PC=%08x - TPI6525 Read(%d)\n", space->device().safe_pc(), (offset - 0x58) ));
219         return tpi6525_r(tpi, *space, offset - 0x58);
217         device_t *tpi = space.machine().device("tpi6525");
218         LOG(( "DMAC: PC=%08x - TPI6525 Read(%d)\n", space.device().safe_pc(), (offset - 0x58) ));
219         return tpi6525_r(tpi, space, offset - 0x58);
220220      }
221221      break;
222222
223223      case 0x70:   /* DMA start strobe */
224224      {
225         LOG(( "DMAC: PC=%08x - DMA Start Strobe\n", space->device().safe_pc() ));
225         LOG(( "DMAC: PC=%08x - DMA Start Strobe\n", space.device().safe_pc() ));
226226         dmac_data.dma_timer->adjust(attotime::from_msec( CD_SECTOR_TIME ));
227227      }
228228      break;
229229
230230      case 0x71:   /* DMA stop strobe */
231231      {
232         LOG(( "DMAC: PC=%08x - DMA Stop Strobe\n", space->device().safe_pc() ));
232         LOG(( "DMAC: PC=%08x - DMA Stop Strobe\n", space.device().safe_pc() ));
233233         dmac_data.dma_timer->reset(  );
234234      }
235235      break;
236236
237237      case 0x72:   /* Clear IRQ strobe */
238238      {
239         LOG(( "DMAC: PC=%08x - IRQ Clear Strobe\n", space->device().safe_pc() ));
239         LOG(( "DMAC: PC=%08x - IRQ Clear Strobe\n", space.device().safe_pc() ));
240240         dmac_data.istr &= ~ISTR_INT_P;
241241      }
242242      break;
243243
244244      case 0x74:   /* Flush strobe */
245245      {
246         LOG(( "DMAC: PC=%08x - Flush Strobe\n", space->device().safe_pc() ));
246         LOG(( "DMAC: PC=%08x - Flush Strobe\n", space.device().safe_pc() ));
247247         dmac_data.istr |= ISTR_FE_FLG;
248248      }
249249      break;
250250
251251      default:
252         logerror( "DMAC-READ: PC=%08x, offset = %02x\n", space->device().safe_pc(), offset );
252         logerror( "DMAC-READ: PC=%08x, offset = %02x\n", space.device().safe_pc(), offset );
253253      break;
254254   }
255255
r17963r17964
264264   {
265265      case 0x21:   /* control write */
266266      {
267         LOG(( "DMAC: PC=%08x - CNTR Write(%04x)\n", space->device().safe_pc(), data ));
267         LOG(( "DMAC: PC=%08x - CNTR Write(%04x)\n", space.device().safe_pc(), data ));
268268         dmac_data.cntr = data;
269         check_interrupts(space->machine());
269         check_interrupts(space.machine());
270270      }
271271      break;
272272
273273      case 0x40:   /* wtc hi */
274274      {
275         LOG(( "DMAC: PC=%08x - WTC HI Write - data = %04x\n", space->device().safe_pc(), data ));
275         LOG(( "DMAC: PC=%08x - WTC HI Write - data = %04x\n", space.device().safe_pc(), data ));
276276         dmac_data.wtc &= 0x0000ffff;
277277         dmac_data.wtc |= ((UINT32)data) << 16;
278278      }
r17963r17964
280280
281281      case 0x41:   /* wtc lo */
282282      {
283         LOG(( "DMAC: PC=%08x - WTC LO Write - data = %04x\n", space->device().safe_pc(), data ));
283         LOG(( "DMAC: PC=%08x - WTC LO Write - data = %04x\n", space.device().safe_pc(), data ));
284284         dmac_data.wtc &= 0xffff0000;
285285         dmac_data.wtc |= data;
286286      }
r17963r17964
288288
289289      case 0x42:   /* acr hi */
290290      {
291         LOG(( "DMAC: PC=%08x - ACR HI Write - data = %04x\n", space->device().safe_pc(), data ));
291         LOG(( "DMAC: PC=%08x - ACR HI Write - data = %04x\n", space.device().safe_pc(), data ));
292292         dmac_data.acr &= 0x0000ffff;
293293         dmac_data.acr |= ((UINT32)data) << 16;
294294      }
r17963r17964
296296
297297      case 0x43:   /* acr lo */
298298      {
299         LOG(( "DMAC: PC=%08x - ACR LO Write - data = %04x\n", space->device().safe_pc(), data ));
299         LOG(( "DMAC: PC=%08x - ACR LO Write - data = %04x\n", space.device().safe_pc(), data ));
300300         dmac_data.acr &= 0xffff0000;
301301         dmac_data.acr |= data;
302302      }
r17963r17964
304304
305305      case 0x47:   /* dawr */
306306      {
307         LOG(( "DMAC: PC=%08x - DAWR Write - data = %04x\n", space->device().safe_pc(), data ));
307         LOG(( "DMAC: PC=%08x - DAWR Write - data = %04x\n", space.device().safe_pc(), data ));
308308         dmac_data.dawr = data;
309309      }
310310      break;
r17963r17964
312312      case 0x48:   /* wd33c93 SCSI expansion */
313313      case 0x49:
314314      {
315         LOG(( "DMAC: PC=%08x - WD33C93 Write(%d) - data = %04x\n", space->device().safe_pc(), offset & 1, data ));
315         LOG(( "DMAC: PC=%08x - WD33C93 Write(%d) - data = %04x\n", space.device().safe_pc(), offset & 1, data ));
316316         /* Not available without SCSI expansion */
317317      }
318318      break;
319319
320320      case 0x50:
321321      {
322         LOG(( "DMAC: PC=%08x - CDROM CMD Write - data = %04x\n", space->device().safe_pc(), data ));
323         matsucd_command_w(space->machine(), data );
322         LOG(( "DMAC: PC=%08x - CDROM CMD Write - data = %04x\n", space.device().safe_pc(), data ));
323         matsucd_command_w(space.machine(), data );
324324      }
325325      break;
326326
r17963r17964
341341      case 0x66:
342342      case 0x67:
343343      {
344         device_t *tpi = space->machine().device("tpi6525");
345         LOG(( "DMAC: PC=%08x - TPI6525 Write(%d) - data = %04x\n", space->device().safe_pc(), (offset - 0x58), data ));
346         tpi6525_w(tpi, *space, offset - 0x58, data);
344         device_t *tpi = space.machine().device("tpi6525");
345         LOG(( "DMAC: PC=%08x - TPI6525 Write(%d) - data = %04x\n", space.device().safe_pc(), (offset - 0x58), data ));
346         tpi6525_w(tpi, space, offset - 0x58, data);
347347      }
348348      break;
349349
350350      case 0x70:   /* DMA start strobe */
351351      {
352         LOG(( "DMAC: PC=%08x - DMA Start Strobe\n", space->device().safe_pc() ));
352         LOG(( "DMAC: PC=%08x - DMA Start Strobe\n", space.device().safe_pc() ));
353353         dmac_data.dma_timer->adjust(attotime::from_msec( CD_SECTOR_TIME ));
354354      }
355355      break;
356356
357357      case 0x71:   /* DMA stop strobe */
358358      {
359         LOG(( "DMAC: PC=%08x - DMA Stop Strobe\n", space->device().safe_pc() ));
359         LOG(( "DMAC: PC=%08x - DMA Stop Strobe\n", space.device().safe_pc() ));
360360         dmac_data.dma_timer->reset(  );
361361      }
362362      break;
363363
364364      case 0x72:   /* Clear IRQ strobe */
365365      {
366         LOG(( "DMAC: PC=%08x - IRQ Clear Strobe\n", space->device().safe_pc() ));
366         LOG(( "DMAC: PC=%08x - IRQ Clear Strobe\n", space.device().safe_pc() ));
367367         dmac_data.istr &= ~ISTR_INT_P;
368368      }
369369      break;
370370
371371      case 0x74:   /* Flush Strobe */
372372      {
373         LOG(( "DMAC: PC=%08x - Flush Strobe\n", space->device().safe_pc() ));
373         LOG(( "DMAC: PC=%08x - Flush Strobe\n", space.device().safe_pc() ));
374374         dmac_data.istr |= ISTR_FE_FLG;
375375      }
376376      break;
377377
378378      default:
379         logerror( "DMAC-WRITE: PC=%08x, offset = %02x, data = %04x\n", space->device().safe_pc(), offset, data );
379         logerror( "DMAC-WRITE: PC=%08x, offset = %02x, data = %04x\n", space.device().safe_pc(), offset, data );
380380      break;
381381   }
382382}
r17963r17964
389389
390390static void   dmac_install(running_machine &machine, offs_t base)
391391{
392   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
393   space->install_legacy_read_handler(base, base + 0xFFFF, FUNC(amiga_dmac_r));
394   space->install_legacy_write_handler(base, base + 0xFFFF, FUNC(amiga_dmac_w));
392   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
393   space.install_legacy_read_handler(base, base + 0xFFFF, FUNC(amiga_dmac_r));
394   space.install_legacy_write_handler(base, base + 0xFFFF, FUNC(amiga_dmac_w));
395395}
396396
397397static void   dmac_uninstall(running_machine &machine, offs_t base)
398398{
399   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
400   space->unmap_readwrite(base, base + 0xFFFF);
399   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
400   space.unmap_readwrite(base, base + 0xFFFF);
401401}
402402
403403static const amiga_autoconfig_device dmac_device =
r17963r17964
457457
458458   if ( (CUSTOM_REG(REG_INTREQ) & INTENA_PORTS) == 0 )
459459   {
460      amiga_custom_w(machine.device("maincpu")->memory().space(AS_PROGRAM), REG_INTREQ, 0x8000 | INTENA_PORTS, 0xffff);
460      amiga_custom_w(*machine.device("maincpu")->memory().space(AS_PROGRAM), REG_INTREQ, 0x8000 | INTENA_PORTS, 0xffff);
461461   }
462462   else
463463   {
r17963r17964
474474   {
475475      if ( (CUSTOM_REG(REG_INTREQ) & INTENA_PORTS) == 0 )
476476      {
477         amiga_custom_w(device->machine().device("maincpu")->memory().space(AS_PROGRAM), REG_INTREQ, 0x8000 | INTENA_PORTS, 0xffff);
477         amiga_custom_w(*device->machine().device("maincpu")->memory().space(AS_PROGRAM), REG_INTREQ, 0x8000 | INTENA_PORTS, 0xffff);
478478      }
479479      else
480480      {
trunk/src/mess/machine/concept.c
r17963r17964
276276         {
277277            int slot = ((offset >> 4) & 7) - 1;
278278            if (m_expansion_slots[slot].reg_read)
279               return m_expansion_slots[slot].reg_read(&space, offset & 0xf);
279               return m_expansion_slots[slot].reg_read(space, offset & 0xf);
280280         }
281281         break;
282282
r17963r17964
299299         int slot = ((offset >> 8) & 7) - 1;
300300         LOG(("concept_io_r: Slot ROM memory accessed for slot %d at address 0x03%4.4x\n", slot, offset << 1));
301301         if (m_expansion_slots[slot].rom_read)
302            return m_expansion_slots[slot].rom_read(&space, offset & 0xff);
302            return m_expansion_slots[slot].rom_read(space, offset & 0xff);
303303      }
304304      break;
305305
r17963r17964
418418            LOG(("concept_io_w: Slot I/O register written for slot %d at address 0x03%4.4x, data: 0x%4.4x\n",
419419               slot, offset << 1, data));
420420            if (m_expansion_slots[slot].reg_write)
421               m_expansion_slots[slot].reg_write(&space, offset & 0xf, data);
421               m_expansion_slots[slot].reg_write(space, offset & 0xf, data);
422422         }
423423         break;
424424
r17963r17964
441441         int slot = ((offset >> 8) & 7) - 1;
442442         LOG(("concept_io_w: Slot ROM memory written to for slot %d at address 0x03%4.4x, data: 0x%4.4x\n", slot, offset << 1, data));
443443         if (m_expansion_slots[slot].rom_write)
444            m_expansion_slots[slot].rom_write(&space, offset & 0xff, data);
444            m_expansion_slots[slot].rom_write(space, offset & 0xff, data);
445445      }
446446      break;
447447
r17963r17964
589589
590590static  READ8_HANDLER(concept_fdc_reg_r)
591591{
592   concept_state *state = space->machine().driver_data<concept_state>();
593   device_t *fdc = space->machine().device("wd179x");
592   concept_state *state = space.machine().driver_data<concept_state>();
593   device_t *fdc = space.machine().device("wd179x");
594594   switch (offset)
595595   {
596596   case 0:
r17963r17964
599599
600600   case 8:
601601      /* FDC STATUS REG */
602      return wd17xx_status_r(fdc, *space, offset);
602      return wd17xx_status_r(fdc, space, offset);
603603
604604   case 9:
605605      /* FDC TRACK REG */
606      return wd17xx_track_r(fdc, *space, offset);
606      return wd17xx_track_r(fdc, space, offset);
607607
608608   case 10:
609609      /* FDC SECTOR REG */
610      return wd17xx_sector_r(fdc, *space, offset);
610      return wd17xx_sector_r(fdc, space, offset);
611611
612612   case 11:
613613      /* FDC DATA REG */
614      return wd17xx_data_r(fdc, *space, offset);
614      return wd17xx_data_r(fdc, space, offset);
615615   }
616616
617617   return 0;
r17963r17964
619619
620620static WRITE8_HANDLER(concept_fdc_reg_w)
621621{
622   concept_state *state = space->machine().driver_data<concept_state>();
622   concept_state *state = space.machine().driver_data<concept_state>();
623623   int current_drive;
624   device_t *fdc = space->machine().device("wd179x");
624   device_t *fdc = space.machine().device("wd179x");
625625   switch (offset)
626626   {
627627   case 0:
r17963r17964
635635      // floppy_drive_set_motor_state(floppy_get_device(machine,  current_drive), (data & LC_MOTOROF_mask) == 0 ? 1 : 0);
636636      /*flp_8in = (data & LC_FLP8IN_mask) != 0;*/
637637      wd17xx_dden_w(fdc, BIT(data, 7));
638      floppy_drive_set_ready_state(floppy_get_device(space->machine(), current_drive), 1, 0);
638      floppy_drive_set_ready_state(floppy_get_device(space.machine(), current_drive), 1, 0);
639639      break;
640640
641641   case 8:
642642      /* FDC COMMAMD REG */
643      wd17xx_command_w(fdc, *space, offset, data);
643      wd17xx_command_w(fdc, space, offset, data);
644644      break;
645645
646646   case 9:
647647      /* FDC TRACK REG */
648      wd17xx_track_w(fdc, *space, offset, data);
648      wd17xx_track_w(fdc, space, offset, data);
649649      break;
650650
651651   case 10:
652652      /* FDC SECTOR REG */
653      wd17xx_sector_w(fdc, *space, offset, data);
653      wd17xx_sector_w(fdc, space, offset, data);
654654      break;
655655
656656   case 11:
657657      /* FDC DATA REG */
658      wd17xx_data_w(fdc, *space, offset, data);
658      wd17xx_data_w(fdc, space, offset, data);
659659      break;
660660   }
661661}
trunk/src/mess/machine/mboard.c
r17963r17964
196196
197197WRITE8_HANDLER( mboard_write_board_8 )
198198{
199   write_board(space->machine(),data);
199   write_board(space.machine(),data);
200200   logerror("Write Board Port  Data = %02x\n",data);
201201}
202202
203203WRITE16_HANDLER( mboard_write_board_16 )
204204{
205   if (data & 0xff) write_board(space->machine(),data);
205   if (data & 0xff) write_board(space.machine(),data);
206206   logerror("write board 16 %08x\n",data);
207   write_board(space->machine(),data>>8);
207   write_board(space.machine(),data>>8);
208208}
209209
210210WRITE32_HANDLER( mboard_write_board_32 )
r17963r17964
212212//  data |= data << 24;
213213//printf("write board %08x %08x\n",offset,data);
214214   logerror("write board 32 o: %08x d: %08x\n",offset,data);
215   if (offset) write_board(space->machine(),data);
216   else write_board(space->machine(),data>>24);
215   if (offset) write_board(space.machine(),data);
216   else write_board(space.machine(),data>>24);
217217}
218218
219219WRITE8_HANDLER( mboard_write_LED_8 )
220220{
221221   write_LED(data);
222   space->device().execute().spin_until_time(attotime::from_usec(7));
222   space.device().execute().spin_until_time(attotime::from_usec(7));
223223}
224224
225225WRITE16_HANDLER( mboard_write_LED_16 )
226226{
227227    write_LED(data >> 8);
228    space->device().execute().spin_until_time(attotime::from_usec(9));
228    space.device().execute().spin_until_time(attotime::from_usec(9));
229229}
230230
231231WRITE32_HANDLER( mboard_write_LED_32 )
r17963r17964
235235   if (offset) write_LED(data);
236236   else write_LED(data >> 24);
237237   logerror("write LED   32 o: %08x d: %08x\n",offset,data);
238//  space->device().execute().spin_until_time(ATTOTIME_IN_USEC(20));
238//  space.device().execute().spin_until_time(ATTOTIME_IN_USEC(20));
239239}
240240
241241
trunk/src/mess/machine/mz700.c
r17963r17964
627627//  {
628628//      logerror("mz800_display_mode_w: switching mode to %s\n", (BIT(data, 3) ? "mz700" : "mz800"));
629629//      m_mz700_mode = BIT(data, 3);
630//      mz700_bank_4_w(machine().device("maincpu")->memory().&space(AS_PROGRAM), 0, 0);
630//      mz700_bank_4_w(*machine().device("maincpu")->memory().&space(AS_PROGRAM), 0, 0);
631631//  }
632632}
633633
trunk/src/mess/machine/lisa.c
r17963r17964
237237{
238238   lisa_state *state = machine.driver_data<lisa_state>();
239239   via6522_device *via_0 = machine.device<via6522_device>("via6522_0");
240   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
240   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
241241
242242   if ((! state->m_hold_COPS_data) && state->m_fifo_size && (! state->m_COPS_Ready))
243243   {
244244//        printf("COPsim: sending %02x to VIA\n", state->m_fifo_data[state->m_fifo_head]);
245245
246      via_0->write_porta(*space, 0, state->m_fifo_data[state->m_fifo_head]);   /* output data */
246      via_0->write_porta(space, 0, state->m_fifo_data[state->m_fifo_head]);   /* output data */
247247      if (state->m_fifo_head == state->m_mouse_data_offset)
248248         state->m_mouse_data_offset = -1;   /* we just phased out the mouse data in buffer */
249249      state->m_fifo_head = (state->m_fifo_head+1) & 0x7;
r17963r17964
427427   lisa_state *state = machine.driver_data<lisa_state>();
428428   int command;
429429   via6522_device *via_0 = machine.device<via6522_device>("via6522_0");
430   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
430   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
431431
432432   state->m_COPS_Ready = 0;
433433
r17963r17964
435435   COPS_send_data_if_possible(machine);
436436
437437   /* some pull-ups allow the COPS to read 1s when the VIA port is not set as output */
438   command = (state->m_COPS_command | (~ via_0->read(*space, VIA_DDRA))) & 0xff;
438   command = (state->m_COPS_command | (~ via_0->read(space, VIA_DDRA))) & 0xff;
439439
440440//    printf("Dropping Ready, command = %02x\n", command);
441441
trunk/src/mess/machine/lynx.c
r17963r17964
16551655
16561656static  READ8_HANDLER(lynx_uart_r)
16571657{
1658   lynx_state *state = space->machine().driver_data<lynx_state>();
1658   lynx_state *state = space.machine().driver_data<lynx_state>();
16591659   UINT8 value = 0x00;
16601660   switch (offset)
16611661   {
r17963r17964
17691769
17701770   case 0x8c:
17711771   case 0x8d:
1772      value = lynx_uart_r(&space, offset);
1772      value = lynx_uart_r(space, offset);
17731773      break;
17741774
17751775   default:
trunk/src/mess/machine/cgenie.c
r17963r17964
1919#include "machine/ram.h"
2020
2121#define AYWriteReg(chip,port,value) \
22   ay8910_address_w(ay8910, *space, 0,port);  \
23   ay8910_data_w(ay8910, *space, 0,value)
22   ay8910_address_w(ay8910, space, 0,port);  \
23   ay8910_data_w(ay8910, space, 0,value)
2424
2525#define TAPE_HEADER "Colour Genie - Virtual Tape File"
2626
r17963r17964
4747
4848void cgenie_state::machine_reset()
4949{
50   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
50   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
5151   device_t *ay8910 = machine().device("ay8910");
5252   UINT8 *ROM = memregion("maincpu")->base();
5353
r17963r17964
8484   {
8585      if ( machine().root_device().ioport("DSW0")->read() & 0x80 )
8686      {
87         space->install_read_bank(0xc000, 0xdfff, "bank10");
88         space->nop_write(0xc000, 0xdfff);
87         space.install_read_bank(0xc000, 0xdfff, "bank10");
88         space.nop_write(0xc000, 0xdfff);
8989         membank("bank10")->set_base(&ROM[0x0c000]);
9090         logerror("cgenie DOS enabled\n");
9191         memcpy(&ROM[0x0c000],&ROM[0x10000], 0x2000);
9292      }
9393      else
9494      {
95         space->nop_readwrite(0xc000, 0xdfff);
95         space.nop_readwrite(0xc000, 0xdfff);
9696         logerror("cgenie DOS disabled (no floppy image given)\n");
9797      }
9898   }
9999   else
100100   {
101      space->nop_readwrite(0xc000, 0xdfff);
101      space.nop_readwrite(0xc000, 0xdfff);
102102      logerror("cgenie DOS disabled\n");
103103      memset(&machine().root_device().memregion("maincpu")->base()[0x0c000], 0x00, 0x2000);
104104   }
r17963r17964
106106   /* copy EXT ROM, if enabled or wipe out that memory area */
107107   if( machine().root_device().ioport("DSW0")->read() & 0x20 )
108108   {
109      space->install_rom(0xe000, 0xefff, 0); // mess 0135u3 need to check
109      space.install_rom(0xe000, 0xefff, 0); // mess 0135u3 need to check
110110      logerror("cgenie EXT enabled\n");
111111      memcpy(&machine().root_device().memregion("maincpu")->base()[0x0e000],
112112            &machine().root_device().memregion("maincpu")->base()[0x12000], 0x1000);
113113   }
114114   else
115115   {
116      space->nop_readwrite(0xe000, 0xefff);
116      space.nop_readwrite(0xe000, 0xefff);
117117      logerror("cgenie EXT disabled\n");
118118      memset(&machine().root_device().memregion("maincpu")->base()[0x0e000], 0x00, 0x1000);
119119   }
r17963r17964
124124
125125void cgenie_state::machine_start()
126126{
127   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
127   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
128128   UINT8 *gfx = memregion("gfx2")->base();
129129   int i;
130130
r17963r17964
147147      memset(gfx + i * 8, i, 8);
148148
149149   /* set up RAM */
150   space->install_read_bank(0x4000, 0x4000 + machine().device<ram_device>(RAM_TAG)->size() - 1, "bank1");
151   space->install_legacy_write_handler(0x4000, 0x4000 + machine().device<ram_device>(RAM_TAG)->size() - 1, FUNC(cgenie_videoram_w));
150   space.install_read_bank(0x4000, 0x4000 + machine().device<ram_device>(RAM_TAG)->size() - 1, "bank1");
151   space.install_legacy_write_handler(0x4000, 0x4000 + machine().device<ram_device>(RAM_TAG)->size() - 1, FUNC(cgenie_videoram_w));
152152   m_videoram = machine().device<ram_device>(RAM_TAG)->pointer();
153153   membank("bank1")->set_base(machine().device<ram_device>(RAM_TAG)->pointer());
154154   machine().scheduler().timer_pulse(attotime::from_hz(11025), FUNC(handle_cassette_input));
r17963r17964
173173
174174WRITE8_HANDLER( cgenie_port_ff_w )
175175{
176   cgenie_state *state = space->machine().driver_data<cgenie_state>();
176   cgenie_state *state = space.machine().driver_data<cgenie_state>();
177177   int port_ff_changed = state->m_port_ff ^ data;
178178
179   space->machine().device<cassette_image_device>(CASSETTE_TAG)->output(data & 0x01 ? -1.0 : 1.0 );
179   space.machine().device<cassette_image_device>(CASSETTE_TAG)->output(data & 0x01 ? -1.0 : 1.0 );
180180
181181   /* background bits changed ? */
182182   if( port_ff_changed & FF_BGD )
r17963r17964
224224            b = 15;
225225         }
226226      }
227      palette_set_color_rgb(space->machine(), 0, r, g, b);
227      palette_set_color_rgb(space.machine(), 0, r, g, b);
228228   }
229229
230230   /* character mode changed ? */
r17963r17964
237237   /* graphics mode changed ? */
238238   if( port_ff_changed & FF_FGR )
239239   {
240      cgenie_mode_select(space->machine(), data & FF_FGR);
240      cgenie_mode_select(space.machine(), data & FF_FGR);
241241   }
242242
243243   state->m_port_ff = data;
r17963r17964
246246
247247READ8_HANDLER( cgenie_port_ff_r )
248248{
249   cgenie_state *state = space->machine().driver_data<cgenie_state>();
249   cgenie_state *state = space.machine().driver_data<cgenie_state>();
250250   UINT8   data = state->m_port_ff & ~0x01;
251251
252252   data |= state->m_cass_bit;
r17963r17964
268268
269269READ8_HANDLER( cgenie_psg_port_a_r )
270270{
271   cgenie_state *state = space->machine().driver_data<cgenie_state>();
271   cgenie_state *state = space.machine().driver_data<cgenie_state>();
272272   return state->m_psg_a_inp;
273273}
274274
275275READ8_HANDLER( cgenie_psg_port_b_r )
276276{
277   cgenie_state *state = space->machine().driver_data<cgenie_state>();
277   cgenie_state *state = space.machine().driver_data<cgenie_state>();
278278   if( state->m_psg_a_out < 0xd0 )
279279   {
280280      /* comparator value */
281281      state->m_psg_b_inp = 0x00;
282282
283      if( space->machine().root_device().ioport("JOY0")->read() > state->m_psg_a_out )
283      if( space.machine().root_device().ioport("JOY0")->read() > state->m_psg_a_out )
284284         state->m_psg_b_inp |= 0x80;
285285
286      if( space->machine().root_device().ioport("JOY1")->read() > state->m_psg_a_out )
286      if( space.machine().root_device().ioport("JOY1")->read() > state->m_psg_a_out )
287287         state->m_psg_b_inp |= 0x40;
288288
289      if( space->machine().root_device().ioport("JOY2")->read() > state->m_psg_a_out )
289      if( space.machine().root_device().ioport("JOY2")->read() > state->m_psg_a_out )
290290         state->m_psg_b_inp |= 0x20;
291291
292292      if( state->ioport("JOY3")->read() > state->m_psg_a_out )
r17963r17964
298298      state->m_psg_b_inp = 0xFF;
299299
300300      if( !(state->m_psg_a_out & 0x01) )
301         state->m_psg_b_inp &= ~space->machine().root_device().ioport("KP0")->read();
301         state->m_psg_b_inp &= ~space.machine().root_device().ioport("KP0")->read();
302302
303303      if( !(state->m_psg_a_out & 0x02) )
304         state->m_psg_b_inp &= ~space->machine().root_device().ioport("KP1")->read();
304         state->m_psg_b_inp &= ~space.machine().root_device().ioport("KP1")->read();
305305
306306      if( !(state->m_psg_a_out & 0x04) )
307         state->m_psg_b_inp &= ~space->machine().root_device().ioport("KP2")->read();
307         state->m_psg_b_inp &= ~space.machine().root_device().ioport("KP2")->read();
308308
309309      if( !(state->m_psg_a_out & 0x08) )
310         state->m_psg_b_inp &= ~space->machine().root_device().ioport("KP3")->read();
310         state->m_psg_b_inp &= ~space.machine().root_device().ioport("KP3")->read();
311311
312312      if( !(state->m_psg_a_out & 0x10) )
313         state->m_psg_b_inp &= ~space->machine().root_device().ioport("KP4")->read();
313         state->m_psg_b_inp &= ~space.machine().root_device().ioport("KP4")->read();
314314
315315      if( !(state->m_psg_a_out & 0x20) )
316         state->m_psg_b_inp &= ~space->machine().root_device().ioport("KP5")->read();
316         state->m_psg_b_inp &= ~space.machine().root_device().ioport("KP5")->read();
317317   }
318318   return state->m_psg_b_inp;
319319}
320320
321321WRITE8_HANDLER( cgenie_psg_port_a_w )
322322{
323   cgenie_state *state = space->machine().driver_data<cgenie_state>();
323   cgenie_state *state = space.machine().driver_data<cgenie_state>();
324324   state->m_psg_a_out = data;
325325}
326326
327327WRITE8_HANDLER( cgenie_psg_port_b_w )
328328{
329   cgenie_state *state = space->machine().driver_data<cgenie_state>();
329   cgenie_state *state = space.machine().driver_data<cgenie_state>();
330330   state->m_psg_b_out = data;
331331}
332332
333333 READ8_HANDLER( cgenie_status_r )
334334{
335   device_t *fdc = space->machine().device("wd179x");
335   device_t *fdc = space.machine().device("wd179x");
336336   /* If the floppy isn't emulated, return 0 */
337   if( (space->machine().root_device().ioport("DSW0")->read() & 0x80) == 0 )
337   if( (space.machine().root_device().ioport("DSW0")->read() & 0x80) == 0 )
338338      return 0;
339   return wd17xx_status_r(fdc, *space, offset);
339   return wd17xx_status_r(fdc, space, offset);
340340}
341341
342342 READ8_HANDLER( cgenie_track_r )
343343{
344   device_t *fdc = space->machine().device("wd179x");
344   device_t *fdc = space.machine().device("wd179x");
345345   /* If the floppy isn't emulated, return 0xff */
346   if( (space->machine().root_device().ioport("DSW0")->read() & 0x80) == 0 )
346   if( (space.machine().root_device().ioport("DSW0")->read() & 0x80) == 0 )
347347      return 0xff;
348   return wd17xx_track_r(fdc, *space, offset);
348   return wd17xx_track_r(fdc, space, offset);
349349}
350350
351351 READ8_HANDLER( cgenie_sector_r )
352352{
353   device_t *fdc = space->machine().device("wd179x");
353   device_t *fdc = space.machine().device("wd179x");
354354   /* If the floppy isn't emulated, return 0xff */
355   if( (space->machine().root_device().ioport("DSW0")->read() & 0x80) == 0 )
355   if( (space.machine().root_device().ioport("DSW0")->read() & 0x80) == 0 )
356356      return 0xff;
357   return wd17xx_sector_r(fdc, *space, offset);
357   return wd17xx_sector_r(fdc, space, offset);
358358}
359359
360360 READ8_HANDLER(cgenie_data_r )
361361{
362   device_t *fdc = space->machine().device("wd179x");
362   device_t *fdc = space.machine().device("wd179x");
363363   /* If the floppy isn't emulated, return 0xff */
364   if( (space->machine().root_device().ioport("DSW0")->read() & 0x80) == 0 )
364   if( (space.machine().root_device().ioport("DSW0")->read() & 0x80) == 0 )
365365      return 0xff;
366   return wd17xx_data_r(fdc, *space, offset);
366   return wd17xx_data_r(fdc, space, offset);
367367}
368368
369369WRITE8_HANDLER( cgenie_command_w )
370370{
371   device_t *fdc = space->machine().device("wd179x");
371   device_t *fdc = space.machine().device("wd179x");
372372   /* If the floppy isn't emulated, return immediately */
373   if( (space->machine().root_device().ioport("DSW0")->read() & 0x80) == 0 )
373   if( (space.machine().root_device().ioport("DSW0")->read() & 0x80) == 0 )
374374      return;
375   wd17xx_command_w(fdc, *space, offset, data);
375   wd17xx_command_w(fdc, space, offset, data);
376376}
377377
378378WRITE8_HANDLER( cgenie_track_w )
379379{
380   device_t *fdc = space->machine().device("wd179x");
380   device_t *fdc = space.machine().device("wd179x");
381381   /* If the floppy isn't emulated, ignore the write */
382   if( (space->machine().root_device().ioport("DSW0")->read() & 0x80) == 0 )
382   if( (space.machine().root_device().ioport("DSW0")->read() & 0x80) == 0 )
383383      return;
384   wd17xx_track_w(fdc, *space, offset, data);
384   wd17xx_track_w(fdc, space, offset, data);
385385}
386386
387387WRITE8_HANDLER( cgenie_sector_w )
388388{
389   device_t *fdc = space->machine().device("wd179x");
389   device_t *fdc = space.machine().device("wd179x");
390390   /* If the floppy isn't emulated, ignore the write */
391   if( (space->machine().root_device().ioport("DSW0")->read() & 0x80) == 0 )
391   if( (space.machine().root_device().ioport("DSW0")->read() & 0x80) == 0 )
392392      return;
393   wd17xx_sector_w(fdc, *space, offset, data);
393   wd17xx_sector_w(fdc, space, offset, data);
394394}
395395
396396WRITE8_HANDLER( cgenie_data_w )
397397{
398   device_t *fdc = space->machine().device("wd179x");
398   device_t *fdc = space.machine().device("wd179x");
399399   /* If the floppy isn't emulated, ignore the write */
400   if( (space->machine().root_device().ioport("DSW0")->read() & 0x80) == 0 )
400   if( (space.machine().root_device().ioport("DSW0")->read() & 0x80) == 0 )
401401      return;
402   wd17xx_data_w(fdc, *space, offset, data);
402   wd17xx_data_w(fdc, space, offset, data);
403403}
404404
405405 READ8_HANDLER( cgenie_irq_status_r )
406406{
407   cgenie_state *state = space->machine().driver_data<cgenie_state>();
407   cgenie_state *state = space.machine().driver_data<cgenie_state>();
408408int result = state->m_irq_status;
409409
410410   state->m_irq_status &= ~(IRQ_TIMER | IRQ_FDC);
r17963r17964
452452
453453WRITE8_HANDLER( cgenie_motor_w )
454454{
455   cgenie_state *state = space->machine().driver_data<cgenie_state>();
456   device_t *fdc = space->machine().device("wd179x");
455   cgenie_state *state = space.machine().driver_data<cgenie_state>();
456   device_t *fdc = space.machine().device("wd179x");
457457   UINT8 drive = 255;
458458
459459   logerror("cgenie motor_w $%02X\n", data);
r17963r17964
488488   int result = 0;
489489
490490   if( offset & 0x01 )
491      result |= space->machine().root_device().ioport("ROW0")->read();
491      result |= space.machine().root_device().ioport("ROW0")->read();
492492
493493   if( offset & 0x02 )
494      result |= space->machine().root_device().ioport("ROW1")->read();
494      result |= space.machine().root_device().ioport("ROW1")->read();
495495
496496   if( offset & 0x04 )
497      result |= space->machine().root_device().ioport("ROW2")->read();
497      result |= space.machine().root_device().ioport("ROW2")->read();
498498
499499   if( offset & 0x08 )
500      result |= space->machine().root_device().ioport("ROW3")->read();
500      result |= space.machine().root_device().ioport("ROW3")->read();
501501
502502   if( offset & 0x10 )
503      result |= space->machine().root_device().ioport("ROW4")->read();
503      result |= space.machine().root_device().ioport("ROW4")->read();
504504
505505   if( offset & 0x20 )
506      result |= space->machine().root_device().ioport("ROW5")->read();
506      result |= space.machine().root_device().ioport("ROW5")->read();
507507
508508   if( offset & 0x40 )
509      result |= space->machine().root_device().ioport("ROW6")->read();
509      result |= space.machine().root_device().ioport("ROW6")->read();
510510
511511   if( offset & 0x80 )
512      result |= space->machine().root_device().ioport("ROW7")->read();
512      result |= space.machine().root_device().ioport("ROW7")->read();
513513
514514   return result;
515515}
r17963r17964
527527
528528WRITE8_HANDLER( cgenie_videoram_w )
529529{
530   cgenie_state *state = space->machine().driver_data<cgenie_state>();
530   cgenie_state *state = space.machine().driver_data<cgenie_state>();
531531   UINT8 *videoram = state->m_videoram;
532532   /* write to video RAM */
533533   if( data == videoram[offset] )
r17963r17964
537537
538538 READ8_HANDLER( cgenie_colorram_r )
539539{
540   cgenie_state *state = space->machine().driver_data<cgenie_state>();
540   cgenie_state *state = space.machine().driver_data<cgenie_state>();
541541   return state->m_colorram[offset] | 0xf0;
542542}
543543
544544WRITE8_HANDLER( cgenie_colorram_w )
545545{
546   cgenie_state *state = space->machine().driver_data<cgenie_state>();
546   cgenie_state *state = space.machine().driver_data<cgenie_state>();
547547   /* only bits 0 to 3 */
548548   data &= 15;
549549   /* nothing changed ? */
r17963r17964
553553   /* set new value */
554554   state->m_colorram[offset] = data;
555555   /* make offset relative to video frame buffer offset */
556   offset = (offset + (cgenie_get_register(space->machine(), 12) << 8) + cgenie_get_register(space->machine(), 13)) & 0x3ff;
556   offset = (offset + (cgenie_get_register(space.machine(), 12) << 8) + cgenie_get_register(space.machine(), 13)) & 0x3ff;
557557}
558558
559559 READ8_HANDLER( cgenie_fontram_r )
560560{
561   cgenie_state *state = space->machine().driver_data<cgenie_state>();
561   cgenie_state *state = space.machine().driver_data<cgenie_state>();
562562   return state->m_fontram[offset];
563563}
564564
565565WRITE8_HANDLER( cgenie_fontram_w )
566566{
567   cgenie_state *state = space->machine().driver_data<cgenie_state>();
567   cgenie_state *state = space.machine().driver_data<cgenie_state>();
568568   UINT8 *dp;
569569
570570   if( data == state->m_fontram[offset] )
r17963r17964
574574   state->m_fontram[offset] = data;
575575
576576   /* convert eight pixels */
577   dp = const_cast<UINT8 *>(space->machine().gfx[0]->get_data(256 + offset/8) + (offset % 8) * space->machine().gfx[0]->width());
577   dp = const_cast<UINT8 *>(space.machine().gfx[0]->get_data(256 + offset/8) + (offset % 8) * space.machine().gfx[0]->width());
578578   dp[0] = (data & 0x80) ? 1 : 0;
579579   dp[1] = (data & 0x40) ? 1 : 0;
580580   dp[2] = (data & 0x20) ? 1 : 0;
r17963r17964
599599      state->m_tv_mode = state->ioport("DSW0")->read() & 0x10;
600600      /* force setting of background color */
601601      state->m_port_ff ^= FF_BGD0;
602      cgenie_port_ff_w(device->machine().device("maincpu")->memory().space(AS_PROGRAM), 0, state->m_port_ff ^ FF_BGD0);
602      cgenie_port_ff_w(*device->machine().device("maincpu")->memory().space(AS_PROGRAM), 0, state->m_port_ff ^ FF_BGD0);
603603   }
604604}
605605
trunk/src/mess/machine/isa.c
r17963r17964
327327
328328void isa8_device::install_bank(offs_t start, offs_t end, offs_t mask, offs_t mirror, const char *tag, UINT8 *data)
329329{
330   address_space *space = m_maincpu->space(AS_PROGRAM);
331   space->install_readwrite_bank(start, end, mask, mirror, tag );
330   address_space &space = *m_maincpu->space(AS_PROGRAM);
331   space.install_readwrite_bank(start, end, mask, mirror, tag );
332332   machine().root_device().membank(tag)->set_base(data);
333333}
334334
335335void isa8_device::unmap_bank(offs_t start, offs_t end, offs_t mask, offs_t mirror)
336336{
337   address_space *space = m_maincpu->space(AS_PROGRAM);
338   space->unmap_readwrite(start, end, mask, mirror);
337   address_space &space = *m_maincpu->space(AS_PROGRAM);
338   space.unmap_readwrite(start, end, mask, mirror);
339339}
340340
341341void isa8_device::install_rom(device_t *dev, offs_t start, offs_t end, offs_t mask, offs_t mirror, const char *tag, const char *region)
r17963r17964
346346      UINT8 *dest = machine().root_device().memregion("isa")->base() + start - 0xc0000;
347347      memcpy(dest,src, end - start + 1);
348348   } else {
349      address_space *space = m_maincpu->space(AS_PROGRAM);
350      space->install_read_bank(start, end, mask, mirror, tag);
351      space->unmap_write(start, end, mask, mirror);
349      address_space &space = *m_maincpu->space(AS_PROGRAM);
350      space.install_read_bank(start, end, mask, mirror, tag);
351      space.unmap_write(start, end, mask, mirror);
352352      machine().root_device().membank(tag)->set_base(machine().root_device().memregion(dev->subtag(tempstring, region))->base());
353353   }
354354}
355355
356356void isa8_device::unmap_rom(offs_t start, offs_t end, offs_t mask, offs_t mirror)
357357{
358   address_space *space = m_maincpu->space(AS_PROGRAM);
359   space->unmap_read(start, end, mask, mirror);
358   address_space &space = *m_maincpu->space(AS_PROGRAM);
359   space.unmap_read(start, end, mask, mirror);
360360}
361361
362362bool isa8_device::is_option_rom_space_available(offs_t start, int size)
363363{
364364   m_maincpu = machine().device<cpu_device>(m_cputag);
365   address_space *space = m_maincpu->space(AS_PROGRAM);
365   address_space &space = *m_maincpu->space(AS_PROGRAM);
366366   for(int i = 0; i < size; i += 4096) // 4KB granularity should be enough
367      if(space->get_read_ptr(start + i)) return false;
367      if(space.get_read_ptr(start + i)) return false;
368368   return true;
369369}
370370
trunk/src/mess/machine/lviv.c
r17963r17964
232232
233233void lviv_state::machine_reset()
234234{
235   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
235   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
236236   UINT8 *mem;
237237
238   space->set_direct_update_handler(direct_update_delegate(FUNC(lviv_state::lviv_directoverride), this));
238   space.set_direct_update_handler(direct_update_delegate(FUNC(lviv_state::lviv_directoverride), this));
239239
240240   m_video_ram = machine().device<ram_device>(RAM_TAG)->pointer() + 0xc000;
241241
242242   m_startup_mem_map = 1;
243243
244   space->unmap_write(0x0000, 0x3fff);
245   space->unmap_write(0x4000, 0x7fff);
246   space->unmap_write(0x8000, 0xbfff);
247   space->unmap_write(0xC000, 0xffff);
244   space.unmap_write(0x0000, 0x3fff);
245   space.unmap_write(0x4000, 0x7fff);
246   space.unmap_write(0x8000, 0xbfff);
247   space.unmap_write(0xC000, 0xffff);
248248
249249   mem = memregion("maincpu")->base();
250250   membank("bank1")->set_base(mem + 0x010000);
trunk/src/mess/machine/mbc55x.c
r17963r17964
339339static void set_ram_size(running_machine &machine)
340340{
341341   mbc55x_state   *state      = machine.driver_data<mbc55x_state>();
342   address_space   *space      = machine.device( MAINCPU_TAG)->memory().space( AS_PROGRAM );
342   address_space   &space      = *machine.device( MAINCPU_TAG)->memory().space( AS_PROGRAM );
343343   int          ramsize    = state->m_ram->size();
344344   int          nobanks      = ramsize / RAM_BANK_SIZE;
345345   char         bank[10];
r17963r17964
363363      if(bankno<nobanks)
364364      {
365365         state->membank(bank)->set_base(map_base);
366         space->install_readwrite_bank(bank_base, bank_base+(RAM_BANK_SIZE-1), bank);
366         space.install_readwrite_bank(bank_base, bank_base+(RAM_BANK_SIZE-1), bank);
367367         logerror("Mapping bank %d at %05X to RAM\n",bankno,bank_base);
368368      }
369369      else
370370      {
371         space->nop_readwrite(bank_base, bank_base+(RAM_BANK_SIZE-1));
371         space.nop_readwrite(bank_base, bank_base+(RAM_BANK_SIZE-1));
372372         logerror("Mapping bank %d at %05X to NOP\n",bankno,bank_base);
373373      }
374374   }
375375
376376   // Graphics red and blue plane memory mapping, green is in main memory
377377   state->membank(RED_PLANE_TAG)->set_base(&state->m_video_mem[RED_PLANE_OFFSET]);
378   space->install_readwrite_bank(RED_PLANE_MEMBASE, RED_PLANE_MEMBASE+(COLOUR_PLANE_SIZE-1), RED_PLANE_TAG);
378   space.install_readwrite_bank(RED_PLANE_MEMBASE, RED_PLANE_MEMBASE+(COLOUR_PLANE_SIZE-1), RED_PLANE_TAG);
379379   state->membank(BLUE_PLANE_TAG)->set_base(&state->m_video_mem[BLUE_PLANE_OFFSET]);
380   space->install_readwrite_bank(BLUE_PLANE_MEMBASE, BLUE_PLANE_MEMBASE+(COLOUR_PLANE_SIZE-1), BLUE_PLANE_TAG);
380   space.install_readwrite_bank(BLUE_PLANE_MEMBASE, BLUE_PLANE_MEMBASE+(COLOUR_PLANE_SIZE-1), BLUE_PLANE_TAG);
381381}
382382
383383DRIVER_INIT_MEMBER(mbc55x_state,mbc55x)
r17963r17964
434434static int instruction_hook(device_t &device, offs_t curpc)
435435{
436436   mbc55x_state   *state = device.machine().driver_data<mbc55x_state>();
437   address_space   *space = device.memory().space(AS_PROGRAM);
437   address_space   &space = *device.memory().space(AS_PROGRAM);
438438   UINT8         *addr_ptr;
439439
440   addr_ptr = (UINT8*)space->get_read_ptr(curpc);
440   addr_ptr = (UINT8*)space.get_read_ptr(curpc);
441441
442442   if ((addr_ptr !=NULL) && (addr_ptr[0]==0xCD))
443443   {
trunk/src/mess/machine/pc1403.c
r17963r17964
1919
2020WRITE8_HANDLER(pc1403_asic_write)
2121{
22   pc1403_state *state = space->machine().driver_data<pc1403_state>();
22   pc1403_state *state = space.machine().driver_data<pc1403_state>();
2323    state->m_asic[offset>>9]=data;
2424    switch( (offset>>9) ){
2525    case 0/*0x3800*/:
r17963r17964
3939
4040READ8_HANDLER(pc1403_asic_read)
4141{
42   pc1403_state *state = space->machine().driver_data<pc1403_state>();
42   pc1403_state *state = space.machine().driver_data<pc1403_state>();
4343    UINT8 data=state->m_asic[offset>>9];
4444    switch( (offset>>9) ){
4545    case 0: case 1: case 2:
trunk/src/mess/machine/apple1.c
r17963r17964
143143
144144DRIVER_INIT_MEMBER(apple1_state,apple1)
145145{
146   address_space* space = machine().device("maincpu")->memory().space(AS_PROGRAM);
146   address_space& space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
147147   /* Set up the handlers for MESS's dynamically-sized RAM. */
148   space->install_readwrite_bank(0x0000, machine().device<ram_device>(RAM_TAG)->size() - 1, "bank1");
148   space.install_readwrite_bank(0x0000, machine().device<ram_device>(RAM_TAG)->size() - 1, "bank1");
149149   membank("bank1")->set_base(machine().device<ram_device>(RAM_TAG)->pointer());
150150
151151   /* Poll the keyboard input ports periodically.  These include both
trunk/src/mess/machine/special.c
r17963r17964
136136
137137void special_state::specimx_set_bank(offs_t i, UINT8 data)
138138{
139   address_space *space = m_maincpu->space(AS_PROGRAM);
139   address_space &space = *m_maincpu->space(AS_PROGRAM);
140140   UINT8 *ram = m_ram->pointer();
141141
142   space->install_write_bank(0xc000, 0xffbf, "bank3");
143   space->install_write_bank(0xffc0, 0xffdf, "bank4");
142   space.install_write_bank(0xc000, 0xffbf, "bank3");
143   space.install_write_bank(0xffc0, 0xffdf, "bank4");
144144   membank("bank4")->set_base(ram + 0xffc0);
145145   switch(i)
146146   {
147147      case 0 :
148         space->install_write_bank(0x0000, 0x8fff, "bank1");
149         space->install_write_handler(0x9000, 0xbfff, write8_delegate(FUNC(special_state::video_memory_w), this));
148         space.install_write_bank(0x0000, 0x8fff, "bank1");
149         space.install_write_handler(0x9000, 0xbfff, write8_delegate(FUNC(special_state::video_memory_w), this));
150150
151151         membank("bank1")->set_base(ram);
152152         membank("bank2")->set_base(ram + 0x9000);
153153         membank("bank3")->set_base(ram + 0xc000);
154154         break;
155155      case 1 :
156         space->install_write_bank(0x0000, 0x8fff, "bank1");
157         space->install_write_bank(0x9000, 0xbfff, "bank2");
156         space.install_write_bank(0x0000, 0x8fff, "bank1");
157         space.install_write_bank(0x9000, 0xbfff, "bank2");
158158
159159         membank("bank1")->set_base(ram + 0x10000);
160160         membank("bank2")->set_base(ram + 0x19000);
161161         membank("bank3")->set_base(ram + 0x1c000);
162162         break;
163163      case 2 :
164         space->unmap_write(0x0000, 0x8fff);
165         space->unmap_write(0x9000, 0xbfff);
164         space.unmap_write(0x0000, 0x8fff);
165         space.unmap_write(0x9000, 0xbfff);
166166
167167         membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x10000);
168168         membank("bank2")->set_base(machine().root_device().memregion("maincpu")->base() + 0x19000);
r17963r17964
273273   UINT8 bank4 = (m_RR_register >> 6) & 3;
274274   UINT8 *mem = memregion("maincpu")->base();
275275   UINT8 *ram = m_ram->pointer();
276   address_space *space = m_maincpu->space(AS_PROGRAM);
276   address_space &space = *m_maincpu->space(AS_PROGRAM);
277277
278   space->install_write_bank(0x0000, 0x3fff, "bank1");
279   space->install_write_bank(0x4000, 0x8fff, "bank2");
280   space->install_write_bank(0x9000, 0xbfff, "bank3");
281   space->install_write_bank(0xc000, 0xefff, "bank4");
282   space->install_write_bank(0xf000, 0xf7ff, "bank5");
283   space->install_write_bank(0xf800, 0xffff, "bank6");
278   space.install_write_bank(0x0000, 0x3fff, "bank1");
279   space.install_write_bank(0x4000, 0x8fff, "bank2");
280   space.install_write_bank(0x9000, 0xbfff, "bank3");
281   space.install_write_bank(0xc000, 0xefff, "bank4");
282   space.install_write_bank(0xf000, 0xf7ff, "bank5");
283   space.install_write_bank(0xf800, 0xffff, "bank6");
284284
285285   switch(bank1)
286286   {
r17963r17964
290290         membank("bank1")->set_base(ram + 0x10000*(bank1-1));
291291         break;
292292      case   0:
293         space->unmap_write(0x0000, 0x3fff);
293         space.unmap_write(0x0000, 0x3fff);
294294         membank("bank1")->set_base(mem + 0x10000);
295295         break;
296296   }
r17963r17964
302302         membank("bank2")->set_base(ram + 0x10000*(bank2-1) + 0x4000);
303303         break;
304304      case   0:
305         space->unmap_write(0x4000, 0x8fff);
305         space.unmap_write(0x4000, 0x8fff);
306306         membank("bank2")->set_base(mem + 0x14000);
307307         break;
308308   }
r17963r17964
314314         membank("bank3")->set_base(ram + 0x10000*(bank3-1) + 0x9000);
315315         break;
316316      case   0:
317         space->unmap_write(0x9000, 0xbfff);
317         space.unmap_write(0x9000, 0xbfff);
318318         membank("bank3")->set_base(mem + 0x19000);
319319         break;
320320   }
r17963r17964
328328         membank("bank6")->set_base(ram + 0x10000*(bank4-1) + 0x0f800);
329329         break;
330330      case   0:
331         space->unmap_write(0xc000, 0xefff);
331         space.unmap_write(0xc000, 0xefff);
332332         membank("bank4")->set_base(mem + 0x1c000);
333         space->unmap_write(0xf000, 0xf7ff);
334         space->nop_read(0xf000, 0xf7ff);
335         space->install_readwrite_handler(0xf800, 0xf803, 0, 0x7fc, read8_delegate(FUNC(i8255_device::read), (i8255_device*)m_ppi), write8_delegate(FUNC(i8255_device::write), (i8255_device*)m_ppi));
333         space.unmap_write(0xf000, 0xf7ff);
334         space.nop_read(0xf000, 0xf7ff);
335         space.install_readwrite_handler(0xf800, 0xf803, 0, 0x7fc, read8_delegate(FUNC(i8255_device::read), (i8255_device*)m_ppi), write8_delegate(FUNC(i8255_device::write), (i8255_device*)m_ppi));
336336         break;
337337   }
338338}
trunk/src/mess/machine/rmnimbus.c
r17963r17964
13461346static int instruction_hook(device_t &device, offs_t curpc)
13471347{
13481348   rmnimbus_state   *state = device.machine().driver_data<rmnimbus_state>();
1349    address_space   *space = device.memory().space(AS_PROGRAM);
1349    address_space   &space = *device.memory().space(AS_PROGRAM);
13501350    UINT8           *addr_ptr;
13511351
1352    addr_ptr = (UINT8*)space->get_read_ptr(curpc);
1352    addr_ptr = (UINT8*)space.get_read_ptr(curpc);
13531353
13541354   if ((addr_ptr !=NULL) && (addr_ptr[0]==0xCD))
13551355   {
r17963r17964
17131713   }
17141714}
17151715
1716static void *get_dssi_ptr(address_space *space, UINT16   ds, UINT16 si)
1716static void *get_dssi_ptr(address_space &space, UINT16   ds, UINT16 si)
17171717{
17181718    int             addr;
17191719
17201720    addr=((ds<<4)+si);
17211721//    OUTPUT_SEGOFS("DS:SI",ds,si);
17221722
1723    return space->get_read_ptr(addr);
1723    return space.get_read_ptr(addr);
17241724}
17251725
17261726static void decode_dssi_generic(device_t *device,UINT16  ds, UINT16 si, UINT8 raw_flag)
17271727{
1728   address_space *space = device->machine().device(MAINCPU_TAG)->memory().space(AS_PROGRAM);
1728   address_space &space = *device->machine().device(MAINCPU_TAG)->memory().space(AS_PROGRAM);
17291729    UINT16  *params;
17301730   int      count;
17311731
r17963r17964
17431743
17441744static void decode_dssi_f_fill_area(device_t *device,UINT16  ds, UINT16 si, UINT8 raw_flag)
17451745{
1746    address_space *space = device->machine().device(MAINCPU_TAG)->memory().space(AS_PROGRAM);
1746    address_space &space = *device->machine().device(MAINCPU_TAG)->memory().space(AS_PROGRAM);
17471747
17481748    UINT16          *addr_ptr;
17491749    t_area_params   *area_params;
r17963r17964
17551755    if (!raw_flag)
17561756      OUTPUT_SEGOFS("SegBrush:OfsBrush",area_params->seg_brush,area_params->ofs_brush);
17571757
1758   brush=(t_nimbus_brush  *)space->get_read_ptr(LINEAR_ADDR(area_params->seg_brush,area_params->ofs_brush));
1758   brush=(t_nimbus_brush  *)space.get_read_ptr(LINEAR_ADDR(area_params->seg_brush,area_params->ofs_brush));
17591759
17601760    if(raw_flag)
17611761   {
r17963r17964
17761776      OUTPUT_SEGOFS("SegData:OfsData",area_params->seg_data,area_params->ofs_data);
17771777   }
17781778
1779    addr_ptr = (UINT16 *)space->get_read_ptr(LINEAR_ADDR(area_params->seg_data,area_params->ofs_data));
1779    addr_ptr = (UINT16 *)space.get_read_ptr(LINEAR_ADDR(area_params->seg_data,area_params->ofs_data));
17801780    for(cocount=0; cocount < area_params->count; cocount++)
17811781    {
17821782      if(raw_flag)
r17963r17964
17961796
17971797static void decode_dssi_f_plot_character_string(device_t *device,UINT16  ds, UINT16 si, UINT8 raw_flag)
17981798{
1799    address_space *space = device->machine().device(MAINCPU_TAG)->memory().space(AS_PROGRAM);
1799    address_space &space = *device->machine().device(MAINCPU_TAG)->memory().space(AS_PROGRAM);
18001800
18011801    UINT8                *char_ptr;
18021802    t_plot_string_params   *plot_string_params;
r17963r17964
18121812
18131813    logerror("x=%d, y=%d, length=%d\n",plot_string_params->x,plot_string_params->y,plot_string_params->length);
18141814
1815    char_ptr=(UINT8*)space->get_read_ptr(LINEAR_ADDR(plot_string_params->seg_data,plot_string_params->ofs_data));
1815    char_ptr=(UINT8*)space.get_read_ptr(LINEAR_ADDR(plot_string_params->seg_data,plot_string_params->ofs_data));
18161816
18171817    if (plot_string_params->length==0xFFFF)
18181818        logerror("%s",char_ptr);
r17963r17964
18251825
18261826static void decode_dssi_f_set_new_clt(device_t *device,UINT16  ds, UINT16 si, UINT8 raw_flag)
18271827{
1828    address_space *space = device->machine().device(MAINCPU_TAG)->memory().space(AS_PROGRAM);
1828    address_space &space = *device->machine().device(MAINCPU_TAG)->memory().space(AS_PROGRAM);
18291829    UINT16  *new_colours;
18301830    int     colour;
18311831    new_colours=(UINT16  *)get_dssi_ptr(space,ds,si);
r17963r17964
18421842
18431843static void decode_dssi_f_plonk_char(device_t *device,UINT16  ds, UINT16 si, UINT8 raw_flag)
18441844{
1845    address_space *space = device->machine().device(MAINCPU_TAG)->memory().space(AS_PROGRAM);
1845    address_space &space = *device->machine().device(MAINCPU_TAG)->memory().space(AS_PROGRAM);
18461846    UINT16  *params;
18471847    params=(UINT16  *)get_dssi_ptr(space,ds,si);
18481848
r17963r17964
18561856
18571857static void decode_dssi_f_rw_sectors(device_t *device,UINT16  ds, UINT16 si, UINT8 raw_flag)
18581858{
1859    address_space *space = device->machine().device(MAINCPU_TAG)->memory().space(AS_PROGRAM);
1859    address_space &space = *device->machine().device(MAINCPU_TAG)->memory().space(AS_PROGRAM);
18601860    UINT16  *params;
18611861    int     param_no;
18621862
r17963r17964
19921992static void nimbus_bank_memory(running_machine &machine)
19931993{
19941994   rmnimbus_state *state = machine.driver_data<rmnimbus_state>();
1995    address_space *space = machine.device( MAINCPU_TAG)->memory().space( AS_PROGRAM );
1995    address_space &space = *machine.device( MAINCPU_TAG)->memory().space( AS_PROGRAM );
19961996    int     ramsize = machine.device<ram_device>(RAM_TAG)->size();
19971997    int     ramblock = 0;
19981998    int     blockno;
r17963r17964
20492049            map_base=(ramsel==0x07) ? map_blocks[map_blockno] : &map_blocks[map_blockno][block_ofs*1024];
20502050
20512051            state->membank(bank)->set_base(map_base);
2052            space->install_readwrite_bank(memmap[blockno].start, memmap[blockno].end, bank);
2052            space.install_readwrite_bank(memmap[blockno].start, memmap[blockno].end, bank);
20532053            //if(LOG_RAM) logerror(", base=%X\n",(int)map_base);
20542054        }
20552055        else
20562056        {
2057            space->nop_readwrite(memmap[blockno].start, memmap[blockno].end);
2057            space.nop_readwrite(memmap[blockno].start, memmap[blockno].end);
20582058            if(LOG_RAM) logerror("NOP\n");
20592059        }
20602060    }
trunk/src/mess/machine/pp01.c
r17963r17964
8585{
8686   pp01_state *state = machine.driver_data<pp01_state>();
8787   UINT8 *mem = state->memregion("maincpu")->base();
88   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
88   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
8989   UINT16 startaddr = block*0x1000;
9090   UINT16 endaddr   = ((block+1)*0x1000)-1;
9191   UINT8  blocknum  = block + 1;
r17963r17964
9393   sprintf(bank,"bank%d",blocknum);
9494   if (data>=0xE0 && data<=0xEF) {
9595      // This is RAM
96      space->install_read_bank (startaddr, endaddr, bank);
96      space.install_read_bank (startaddr, endaddr, bank);
9797      switch(data) {
9898         case 0xe6 :
99               space->install_write_handler(startaddr, endaddr, write8_delegate(FUNC(pp01_state::pp01_video_r_1_w),state));
99               space.install_write_handler(startaddr, endaddr, write8_delegate(FUNC(pp01_state::pp01_video_r_1_w),state));
100100               break;
101101         case 0xe7 :
102               space->install_write_handler(startaddr, endaddr, write8_delegate(FUNC(pp01_state::pp01_video_r_2_w),state));
102               space.install_write_handler(startaddr, endaddr, write8_delegate(FUNC(pp01_state::pp01_video_r_2_w),state));
103103               break;
104104         case 0xea :
105               space->install_write_handler(startaddr, endaddr, write8_delegate(FUNC(pp01_state::pp01_video_g_1_w),state));
105               space.install_write_handler(startaddr, endaddr, write8_delegate(FUNC(pp01_state::pp01_video_g_1_w),state));
106106               break;
107107         case 0xeb :
108               space->install_write_handler(startaddr, endaddr, write8_delegate(FUNC(pp01_state::pp01_video_g_2_w),state));
108               space.install_write_handler(startaddr, endaddr, write8_delegate(FUNC(pp01_state::pp01_video_g_2_w),state));
109109               break;
110110         case 0xee :
111               space->install_write_handler(startaddr, endaddr, write8_delegate(FUNC(pp01_state::pp01_video_b_1_w),state));
111               space.install_write_handler(startaddr, endaddr, write8_delegate(FUNC(pp01_state::pp01_video_b_1_w),state));
112112               break;
113113         case 0xef :
114               space->install_write_handler(startaddr, endaddr, write8_delegate(FUNC(pp01_state::pp01_video_b_2_w),state));
114               space.install_write_handler(startaddr, endaddr, write8_delegate(FUNC(pp01_state::pp01_video_b_2_w),state));
115115               break;
116116
117117         default :
118               space->install_write_bank(startaddr, endaddr, bank);
118               space.install_write_bank(startaddr, endaddr, bank);
119119               break;
120120      }
121121
122122      state->membank(bank)->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + (data & 0x0F)* 0x1000);
123123   } else if (data>=0xF8) {
124      space->install_read_bank (startaddr, endaddr, bank);
125      space->unmap_write(startaddr, endaddr);
124      space.install_read_bank (startaddr, endaddr, bank);
125      space.unmap_write(startaddr, endaddr);
126126      state->membank(bank)->set_base(mem + ((data & 0x0F)-8)* 0x1000+0x10000);
127127   } else {
128128      logerror("%02x %02x\n",block,data);
129      space->unmap_readwrite (startaddr, endaddr);
129      space.unmap_readwrite (startaddr, endaddr);
130130   }
131131}
132132
trunk/src/mess/machine/apple2.c
r17963r17964
5959void apple2_update_memory(running_machine &machine)
6060{
6161   apple2_state *state = machine.driver_data<apple2_state>();
62   address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
62   address_space& space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
6363   int i, bank;
6464   char rbank[10], wbank[10];
6565   int full_update = 0;
r17963r17964
166166         /* install the actual handlers */
167167         if (begin <= end_r) {
168168            if (rh) {
169               space->install_read_handler(begin, end_r, *rh);
169               space.install_read_handler(begin, end_r, *rh);
170170            } else {
171               space->install_read_bank(begin, end_r, rbank);
171               space.install_read_bank(begin, end_r, rbank);
172172            }
173173         }
174174
175175         /* did we 'go past the end?' */
176176         if (end_r < state->m_mem_config.memmap[i].end)
177            space->nop_read(end_r + 1, state->m_mem_config.memmap[i].end);
177            space.nop_read(end_r + 1, state->m_mem_config.memmap[i].end);
178178
179179         /* set the memory bank */
180180         if (rbase)
r17963r17964
254254         /* install the actual handlers */
255255         if (begin <= end_w) {
256256            if (wh) {
257               space->install_write_handler(begin, end_w, *wh);
257               space.install_write_handler(begin, end_w, *wh);
258258            } else {
259259               if (wh_nop) {
260                  space->nop_write(begin, end_w);
260                  space.nop_write(begin, end_w);
261261               } else {
262                  space->install_write_bank(begin, end_w, wbank);
262                  space.install_write_bank(begin, end_w, wbank);
263263               }
264264            }
265265         }
266266
267267         /* did we 'go past the end?' */
268268         if (end_w < state->m_mem_config.memmap[i].end)
269            space->nop_write(end_w + 1, state->m_mem_config.memmap[i].end);
269            space.nop_write(end_w + 1, state->m_mem_config.memmap[i].end);
270270
271271         /* set the memory bank */
272272         if (wbase)
trunk/src/mess/machine/pk8020.c
r17963r17964
231231static void pk8020_set_bank(running_machine &machine,UINT8 data)
232232{
233233   pk8020_state *state = machine.driver_data<pk8020_state>();
234   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
234   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
235235   UINT8 *mem = state->memregion("maincpu")->base();
236236   UINT8 *ram = machine.device<ram_device>(RAM_TAG)->pointer();
237237
r17963r17964
239239      case 0x00 :
240240               {
241241                  // ROM
242                  space->install_read_bank (0x0000, 0x37ff, "bank1");
243                  space->install_write_bank(0x0000, 0x37ff, "bank2");
242                  space.install_read_bank (0x0000, 0x37ff, "bank1");
243                  space.install_write_bank(0x0000, 0x37ff, "bank2");
244244                  state->membank("bank1")->set_base(mem + 0x10000);
245245                  state->membank("bank2")->set_base(ram + 0x0000);
246246                  // Keyboard
247                  space->install_read_handler (0x3800, 0x39ff, read8_delegate(FUNC(pk8020_state::keyboard_r),state));
248                  space->install_write_bank(0x3800, 0x39ff, "bank3");
247                  space.install_read_handler (0x3800, 0x39ff, read8_delegate(FUNC(pk8020_state::keyboard_r),state));
248                  space.install_write_bank(0x3800, 0x39ff, "bank3");
249249                  state->membank("bank3")->set_base(ram + 0x3800);
250250                  // System reg
251                  space->install_read_handler (0x3a00, 0x3aff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
252                  space->install_write_handler(0x3a00, 0x3aff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
251                  space.install_read_handler (0x3a00, 0x3aff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
252                  space.install_write_handler(0x3a00, 0x3aff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
253253                  // Devices
254                  space->install_read_handler (0x3b00, 0x3bff, read8_delegate(FUNC(pk8020_state::devices_r),state));
255                  space->install_write_handler(0x3b00, 0x3bff, write8_delegate(FUNC(pk8020_state::devices_w),state));
254                  space.install_read_handler (0x3b00, 0x3bff, read8_delegate(FUNC(pk8020_state::devices_r),state));
255                  space.install_write_handler(0x3b00, 0x3bff, write8_delegate(FUNC(pk8020_state::devices_w),state));
256256                  // Text Video Memory
257                  space->install_read_handler (0x3c00, 0x3fff, read8_delegate(FUNC(pk8020_state::text_r),state));
258                  space->install_write_handler(0x3c00, 0x3fff, write8_delegate(FUNC(pk8020_state::text_w),state));
257                  space.install_read_handler (0x3c00, 0x3fff, read8_delegate(FUNC(pk8020_state::text_r),state));
258                  space.install_write_handler(0x3c00, 0x3fff, write8_delegate(FUNC(pk8020_state::text_w),state));
259259                  // RAM
260                  space->install_read_bank (0x4000, 0xffff, "bank4");
261                  space->install_write_bank(0x4000, 0xffff, "bank5");
260                  space.install_read_bank (0x4000, 0xffff, "bank4");
261                  space.install_write_bank(0x4000, 0xffff, "bank5");
262262                  state->membank("bank4")->set_base(ram + 0x4000);
263263                  state->membank("bank5")->set_base(ram + 0x4000);
264264               }
265265               break;
266266      case 0x01 : {
267267                  // ROM
268                  space->install_read_bank (0x0000, 0x1fff, "bank1");
269                  space->install_write_bank(0x0000, 0x1fff, "bank2");
268                  space.install_read_bank (0x0000, 0x1fff, "bank1");
269                  space.install_write_bank(0x0000, 0x1fff, "bank2");
270270                  state->membank("bank1")->set_base(mem + 0x10000);
271271                  state->membank("bank2")->set_base(ram + 0x0000);
272272                  // RAM
273                  space->install_read_bank (0x2000, 0xffff, "bank3");
274                  space->install_write_bank(0x2000, 0xffff, "bank4");
273                  space.install_read_bank (0x2000, 0xffff, "bank3");
274                  space.install_write_bank(0x2000, 0xffff, "bank4");
275275                  state->membank("bank3")->set_base(ram + 0x2000);
276276                  state->membank("bank4")->set_base(ram + 0x2000);
277277               }
278278               break;
279279      case 0x02 : {
280280                  // ROM
281                  space->install_read_bank (0x0000, 0x3fff, "bank1");
282                  space->install_write_bank(0x0000, 0x3fff, "bank2");
281                  space.install_read_bank (0x0000, 0x3fff, "bank1");
282                  space.install_write_bank(0x0000, 0x3fff, "bank2");
283283                  state->membank("bank1")->set_base(mem + 0x10000);
284284                  state->membank("bank2")->set_base(ram + 0x0000);
285285                  // RAM
286                  space->install_read_bank (0x4000, 0xffff, "bank3");
287                  space->install_write_bank(0x4000, 0xffff, "bank4");
286                  space.install_read_bank (0x4000, 0xffff, "bank3");
287                  space.install_write_bank(0x4000, 0xffff, "bank4");
288288                  state->membank("bank3")->set_base(ram + 0x4000);
289289                  state->membank("bank4")->set_base(ram + 0x4000);
290290               }
291291               break;
292292      case 0x03 : {
293293                  // RAM
294                  space->install_read_bank (0x0000, 0xffff, "bank1");
295                  space->install_write_bank(0x0000, 0xffff, "bank2");
294                  space.install_read_bank (0x0000, 0xffff, "bank1");
295                  space.install_write_bank(0x0000, 0xffff, "bank2");
296296                  state->membank("bank1")->set_base(ram);
297297                  state->membank("bank2")->set_base(ram);
298298               }
r17963r17964
301301      case 0x05 :
302302               {
303303                  // ROM
304                  space->install_read_bank (0x0000, 0x1fff, "bank1");
305                  space->install_write_bank(0x0000, 0x1fff, "bank2");
304                  space.install_read_bank (0x0000, 0x1fff, "bank1");
305                  space.install_write_bank(0x0000, 0x1fff, "bank2");
306306                  state->membank("bank1")->set_base(mem + 0x10000);
307307                  state->membank("bank2")->set_base(ram + 0x0000);
308308                  // RAM
309                  space->install_read_bank (0x2000, 0xf7ff, "bank3");
310                  space->install_write_bank(0x2000, 0xf7ff, "bank4");
309                  space.install_read_bank (0x2000, 0xf7ff, "bank3");
310                  space.install_write_bank(0x2000, 0xf7ff, "bank4");
311311                  state->membank("bank3")->set_base(ram + 0x2000);
312312                  state->membank("bank4")->set_base(ram + 0x2000);
313313                  // Keyboard
314                  space->install_read_handler (0xf800, 0xf9ff, read8_delegate(FUNC(pk8020_state::keyboard_r),state));
315                  space->install_write_bank(0xf800, 0xf9ff, "bank5");
314                  space.install_read_handler (0xf800, 0xf9ff, read8_delegate(FUNC(pk8020_state::keyboard_r),state));
315                  space.install_write_bank(0xf800, 0xf9ff, "bank5");
316316                  state->membank("bank5")->set_base(ram + 0xf800);
317317                  // System reg
318                  space->install_read_handler (0xfa00, 0xfaff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
319                  space->install_write_handler(0xfa00, 0xfaff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
318                  space.install_read_handler (0xfa00, 0xfaff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
319                  space.install_write_handler(0xfa00, 0xfaff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
320320                  // Devices
321                  space->install_read_handler (0xfb00, 0xfbff, read8_delegate(FUNC(pk8020_state::devices_r),state));
322                  space->install_write_handler(0xfb00, 0xfbff, write8_delegate(FUNC(pk8020_state::devices_w),state));
321                  space.install_read_handler (0xfb00, 0xfbff, read8_delegate(FUNC(pk8020_state::devices_r),state));
322                  space.install_write_handler(0xfb00, 0xfbff, write8_delegate(FUNC(pk8020_state::devices_w),state));
323323                  // Text Video Memory
324                  space->install_read_handler (0xfc00, 0xffff, read8_delegate(FUNC(pk8020_state::text_r),state));
325                  space->install_write_handler(0xfc00, 0xffff, write8_delegate(FUNC(pk8020_state::text_w),state));
324                  space.install_read_handler (0xfc00, 0xffff, read8_delegate(FUNC(pk8020_state::text_r),state));
325                  space.install_write_handler(0xfc00, 0xffff, write8_delegate(FUNC(pk8020_state::text_w),state));
326326               }
327327               break;
328328      case 0x06 :
329329               {
330330                  // ROM
331                  space->install_read_bank (0x0000, 0x3fff, "bank1");
332                  space->install_write_bank(0x0000, 0x3fff, "bank2");
331                  space.install_read_bank (0x0000, 0x3fff, "bank1");
332                  space.install_write_bank(0x0000, 0x3fff, "bank2");
333333                  state->membank("bank1")->set_base(mem + 0x10000);
334334                  state->membank("bank2")->set_base(ram + 0x0000);
335335                  // RAM
336                  space->install_read_bank (0x4000, 0xf7ff, "bank3");
337                  space->install_write_bank(0x4000, 0xf7ff, "bank4");
336                  space.install_read_bank (0x4000, 0xf7ff, "bank3");
337                  space.install_write_bank(0x4000, 0xf7ff, "bank4");
338338                  state->membank("bank3")->set_base(ram + 0x4000);
339339                  state->membank("bank4")->set_base(ram + 0x4000);
340340                  // Keyboard
341                  space->install_read_handler (0xf800, 0xf9ff, read8_delegate(FUNC(pk8020_state::keyboard_r),state));
342                  space->install_write_bank(0xf800, 0xf9ff, "bank5");
341                  space.install_read_handler (0xf800, 0xf9ff, read8_delegate(FUNC(pk8020_state::keyboard_r),state));
342                  space.install_write_bank(0xf800, 0xf9ff, "bank5");
343343                  state->membank("bank5")->set_base(ram + 0xf800);
344344                  // System reg
345                  space->install_read_handler (0xfa00, 0xfaff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
346                  space->install_write_handler(0xfa00, 0xfaff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
345                  space.install_read_handler (0xfa00, 0xfaff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
346                  space.install_write_handler(0xfa00, 0xfaff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
347347                  // Devices
348                  space->install_read_handler (0xfb00, 0xfbff, read8_delegate(FUNC(pk8020_state::devices_r),state));
349                  space->install_write_handler(0xfb00, 0xfbff, write8_delegate(FUNC(pk8020_state::devices_w),state));
348                  space.install_read_handler (0xfb00, 0xfbff, read8_delegate(FUNC(pk8020_state::devices_r),state));
349                  space.install_write_handler(0xfb00, 0xfbff, write8_delegate(FUNC(pk8020_state::devices_w),state));
350350                  // Text Video Memory
351                  space->install_read_handler (0xfc00, 0xffff, read8_delegate(FUNC(pk8020_state::text_r),state));
352                  space->install_write_handler(0xfc00, 0xffff, write8_delegate(FUNC(pk8020_state::text_w),state));
351                  space.install_read_handler (0xfc00, 0xffff, read8_delegate(FUNC(pk8020_state::text_r),state));
352                  space.install_write_handler(0xfc00, 0xffff, write8_delegate(FUNC(pk8020_state::text_w),state));
353353               }
354354               break;
355355      case 0x07 :
356356               {
357357                  // RAM
358                  space->install_read_bank (0x0000, 0xf7ff, "bank1");
359                  space->install_write_bank(0x0000, 0xf7ff, "bank2");
358                  space.install_read_bank (0x0000, 0xf7ff, "bank1");
359                  space.install_write_bank(0x0000, 0xf7ff, "bank2");
360360                  state->membank("bank1")->set_base(ram);
361361                  state->membank("bank2")->set_base(ram);
362362                  // Keyboard
363                  space->install_read_handler (0xf800, 0xf9ff, read8_delegate(FUNC(pk8020_state::keyboard_r),state));
364                  space->install_write_bank(0xf800, 0xf9ff, "bank3");
363                  space.install_read_handler (0xf800, 0xf9ff, read8_delegate(FUNC(pk8020_state::keyboard_r),state));
364                  space.install_write_bank(0xf800, 0xf9ff, "bank3");
365365                  state->membank("bank3")->set_base(ram + 0xf800);
366366                  // System reg
367                  space->install_read_handler (0xfa00, 0xfaff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
368                  space->install_write_handler(0xfa00, 0xfaff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
367                  space.install_read_handler (0xfa00, 0xfaff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
368                  space.install_write_handler(0xfa00, 0xfaff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
369369                  // Devices
370                  space->install_read_handler (0xfb00, 0xfbff, read8_delegate(FUNC(pk8020_state::devices_r),state));
371                  space->install_write_handler(0xfb00, 0xfbff, write8_delegate(FUNC(pk8020_state::devices_w),state));
370                  space.install_read_handler (0xfb00, 0xfbff, read8_delegate(FUNC(pk8020_state::devices_r),state));
371                  space.install_write_handler(0xfb00, 0xfbff, write8_delegate(FUNC(pk8020_state::devices_w),state));
372372                  // Text Video Memory
373                  space->install_read_handler (0xfc00, 0xffff, read8_delegate(FUNC(pk8020_state::text_r),state));
374                  space->install_write_handler(0xfc00, 0xffff, write8_delegate(FUNC(pk8020_state::text_w),state));
373                  space.install_read_handler (0xfc00, 0xffff, read8_delegate(FUNC(pk8020_state::text_r),state));
374                  space.install_write_handler(0xfc00, 0xffff, write8_delegate(FUNC(pk8020_state::text_w),state));
375375               }
376376               break;
377377      case 0x08 :
378378               {
379379                  // ROM
380                  space->install_read_bank (0x0000, 0x3fff, "bank1");
381                  space->install_write_bank(0x0000, 0x3fff, "bank2");
380                  space.install_read_bank (0x0000, 0x3fff, "bank1");
381                  space.install_write_bank(0x0000, 0x3fff, "bank2");
382382                  state->membank("bank1")->set_base(mem + 0x10000);
383383                  state->membank("bank2")->set_base(ram + 0x0000);
384384                  // Keyboard
385                  space->install_read_handler (0x3800, 0x39ff, read8_delegate(FUNC(pk8020_state::keyboard_r),state));
386                  space->install_write_bank(0x3800, 0x39ff, "bank3");
385                  space.install_read_handler (0x3800, 0x39ff, read8_delegate(FUNC(pk8020_state::keyboard_r),state));
386                  space.install_write_bank(0x3800, 0x39ff, "bank3");
387387                  state->membank("bank3")->set_base(ram + 0x3800);
388388                  // System reg
389                  space->install_read_handler (0x3a00, 0x3aff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
390                  space->install_write_handler(0x3a00, 0x3aff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
389                  space.install_read_handler (0x3a00, 0x3aff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
390                  space.install_write_handler(0x3a00, 0x3aff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
391391                  // Devices
392                  space->install_read_handler (0x3b00, 0x3bff, read8_delegate(FUNC(pk8020_state::devices_r),state));
393                  space->install_write_handler(0x3b00, 0x3bff, write8_delegate(FUNC(pk8020_state::devices_w),state));
392                  space.install_read_handler (0x3b00, 0x3bff, read8_delegate(FUNC(pk8020_state::devices_r),state));
393                  space.install_write_handler(0x3b00, 0x3bff, write8_delegate(FUNC(pk8020_state::devices_w),state));
394394                  // Text Video Memory
395                  space->install_read_handler (0x3c00, 0x3fff, read8_delegate(FUNC(pk8020_state::text_r),state));
396                  space->install_write_handler(0x3c00, 0x3fff, write8_delegate(FUNC(pk8020_state::text_w),state));
395                  space.install_read_handler (0x3c00, 0x3fff, read8_delegate(FUNC(pk8020_state::text_r),state));
396                  space.install_write_handler(0x3c00, 0x3fff, write8_delegate(FUNC(pk8020_state::text_w),state));
397397                  // RAM
398                  space->install_read_bank (0x4000, 0xbfff, "bank4");
399                  space->install_write_bank(0x4000, 0xbfff, "bank5");
398                  space.install_read_bank (0x4000, 0xbfff, "bank4");
399                  space.install_write_bank(0x4000, 0xbfff, "bank5");
400400                  state->membank("bank4")->set_base(ram + 0x4000);
401401                  state->membank("bank5")->set_base(ram + 0x4000);
402402                  // Video RAM
403                  space->install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
404                  space->install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
403                  space.install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
404                  space.install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
405405
406406               }
407407               break;
408408      case 0x09 :
409409               {
410410                  // ROM
411                  space->install_read_bank (0x0000, 0x1fff, "bank1");
412                  space->install_write_bank(0x0000, 0x1fff, "bank2");
411                  space.install_read_bank (0x0000, 0x1fff, "bank1");
412                  space.install_write_bank(0x0000, 0x1fff, "bank2");
413413                  state->membank("bank1")->set_base(mem + 0x10000);
414414                  state->membank("bank2")->set_base(ram + 0x0000);
415415                  // RAM
416                  space->install_read_bank (0x2000, 0xbfff, "bank3");
417                  space->install_write_bank(0x2000, 0xbfff, "bank4");
416                  space.install_read_bank (0x2000, 0xbfff, "bank3");
417                  space.install_write_bank(0x2000, 0xbfff, "bank4");
418418                  state->membank("bank3")->set_base(ram + 0x2000);
419419                  state->membank("bank4")->set_base(ram + 0x2000);
420420                  // Video RAM
421                  space->install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
422                  space->install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
421                  space.install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
422                  space.install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
423423               }
424424               break;
425425      case 0x0A :
426426               {
427427                  // ROM
428                  space->install_read_bank (0x0000, 0x3fff, "bank1");
429                  space->install_write_bank(0x0000, 0x3fff, "bank2");
428                  space.install_read_bank (0x0000, 0x3fff, "bank1");
429                  space.install_write_bank(0x0000, 0x3fff, "bank2");
430430                  state->membank("bank1")->set_base(mem + 0x10000);
431431                  state->membank("bank2")->set_base(ram + 0x0000);
432432                  // RAM
433                  space->install_read_bank (0x4000, 0xbfff, "bank3");
434                  space->install_write_bank(0x4000, 0xbfff, "bank4");
433                  space.install_read_bank (0x4000, 0xbfff, "bank3");
434                  space.install_write_bank(0x4000, 0xbfff, "bank4");
435435                  state->membank("bank3")->set_base(ram + 0x4000);
436436                  state->membank("bank4")->set_base(ram + 0x4000);
437437                  // Video RAM
438                  space->install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
439                  space->install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
438                  space.install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
439                  space.install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
440440               }
441441               break;
442442      case 0x0B :
443443               {
444444                  // RAM
445                  space->install_read_bank (0x0000, 0xbfff, "bank1");
446                  space->install_write_bank(0x0000, 0xbfff, "bank2");
445                  space.install_read_bank (0x0000, 0xbfff, "bank1");
446                  space.install_write_bank(0x0000, 0xbfff, "bank2");
447447                  state->membank("bank1")->set_base(ram + 0x0000);
448448                  state->membank("bank2")->set_base(ram + 0x0000);
449449                  // Video RAM
450                  space->install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
451                  space->install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
450                  space.install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
451                  space.install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
452452               }
453453               break;
454454      case 0x0C :
455455      case 0x0D :
456456               {
457457                  // ROM
458                  space->install_read_bank (0x0000, 0x1fff, "bank1");
459                  space->install_write_bank(0x0000, 0x1fff, "bank2");
458                  space.install_read_bank (0x0000, 0x1fff, "bank1");
459                  space.install_write_bank(0x0000, 0x1fff, "bank2");
460460                  state->membank("bank1")->set_base(mem + 0x10000);
461461                  state->membank("bank2")->set_base(ram + 0x0000);
462462                  // RAM
463                  space->install_read_bank (0x2000, 0x3fff, "bank3");
464                  space->install_write_bank(0x2000, 0x3fff, "bank4");
463                  space.install_read_bank (0x2000, 0x3fff, "bank3");
464                  space.install_write_bank(0x2000, 0x3fff, "bank4");
465465                  state->membank("bank3")->set_base(ram + 0x2000);
466466                  state->membank("bank4")->set_base(ram + 0x2000);
467467                  // Video RAM
468                  space->install_read_handler (0x4000, 0x7fff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
469                  space->install_write_handler(0x4000, 0x7fff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
468                  space.install_read_handler (0x4000, 0x7fff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
469                  space.install_write_handler(0x4000, 0x7fff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
470470                  // RAM
471                  space->install_read_bank (0x8000, 0xfdff, "bank5");
472                  space->install_write_bank(0x8000, 0xfdff, "bank6");
471                  space.install_read_bank (0x8000, 0xfdff, "bank5");
472                  space.install_write_bank(0x8000, 0xfdff, "bank6");
473473                  state->membank("bank5")->set_base(ram + 0x8000);
474474                  state->membank("bank6")->set_base(ram + 0x8000);
475475                  // Devices
476                  space->install_read_handler (0xfe00, 0xfeff, read8_delegate(FUNC(pk8020_state::devices_r),state));
477                  space->install_write_handler(0xfe00, 0xfeff, write8_delegate(FUNC(pk8020_state::devices_w),state));
476                  space.install_read_handler (0xfe00, 0xfeff, read8_delegate(FUNC(pk8020_state::devices_r),state));
477                  space.install_write_handler(0xfe00, 0xfeff, write8_delegate(FUNC(pk8020_state::devices_w),state));
478478                  // System reg
479                  space->install_read_handler (0xff00, 0xffff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
480                  space->install_write_handler(0xff00, 0xffff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
479                  space.install_read_handler (0xff00, 0xffff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
480                  space.install_write_handler(0xff00, 0xffff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
481481               }
482482               break;
483483      case 0x0E :
484484               {
485485                  // ROM
486                  space->install_read_bank (0x0000, 0x3fff, "bank1");
487                  space->install_write_bank(0x0000, 0x3fff, "bank2");
486                  space.install_read_bank (0x0000, 0x3fff, "bank1");
487                  space.install_write_bank(0x0000, 0x3fff, "bank2");
488488                  state->membank("bank1")->set_base(mem + 0x10000);
489489                  state->membank("bank2")->set_base(ram + 0x0000);
490490                  // Video RAM
491                  space->install_read_handler (0x4000, 0x7fff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
492                  space->install_write_handler(0x4000, 0x7fff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
491                  space.install_read_handler (0x4000, 0x7fff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
492                  space.install_write_handler(0x4000, 0x7fff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
493493                  // RAM
494                  space->install_read_bank (0x8000, 0xfdff, "bank5");
495                  space->install_write_bank(0x8000, 0xfdff, "bank6");
494                  space.install_read_bank (0x8000, 0xfdff, "bank5");
495                  space.install_write_bank(0x8000, 0xfdff, "bank6");
496496                  state->membank("bank5")->set_base(ram + 0x8000);
497497                  state->membank("bank6")->set_base(ram + 0x8000);
498498                  // Devices
499                  space->install_read_handler (0xfe00, 0xfeff, read8_delegate(FUNC(pk8020_state::devices_r),state));
500                  space->install_write_handler(0xfe00, 0xfeff, write8_delegate(FUNC(pk8020_state::devices_w),state));
499                  space.install_read_handler (0xfe00, 0xfeff, read8_delegate(FUNC(pk8020_state::devices_r),state));
500                  space.install_write_handler(0xfe00, 0xfeff, write8_delegate(FUNC(pk8020_state::devices_w),state));
501501                  // System reg
502                  space->install_read_handler (0xff00, 0xffff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
503                  space->install_write_handler(0xff00, 0xffff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
502                  space.install_read_handler (0xff00, 0xffff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
503                  space.install_write_handler(0xff00, 0xffff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
504504               }
505505               break;
506506      case 0x0F :
507507               {
508508                  // RAM
509                  space->install_read_bank (0x0000, 0x3fff, "bank1");
510                  space->install_write_bank(0x0000, 0x3fff, "bank2");
509                  space.install_read_bank (0x0000, 0x3fff, "bank1");
510                  space.install_write_bank(0x0000, 0x3fff, "bank2");
511511                  state->membank("bank1")->set_base(ram + 0x0000);
512512                  state->membank("bank2")->set_base(ram + 0x0000);
513513                  // Video RAM
514                  space->install_read_handler (0x4000, 0x7fff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
515                  space->install_write_handler(0x4000, 0x7fff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
514                  space.install_read_handler (0x4000, 0x7fff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
515                  space.install_write_handler(0x4000, 0x7fff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
516516                  // RAM
517                  space->install_read_bank (0x8000, 0xfdff, "bank3");
518                  space->install_write_bank(0x8000, 0xfdff, "bank4");
517                  space.install_read_bank (0x8000, 0xfdff, "bank3");
518                  space.install_write_bank(0x8000, 0xfdff, "bank4");
519519                  state->membank("bank3")->set_base(ram + 0x8000);
520520                  state->membank("bank4")->set_base(ram + 0x8000);
521521                  // Devices
522                  space->install_read_handler (0xfe00, 0xfeff, read8_delegate(FUNC(pk8020_state::devices_r),state));
523                  space->install_write_handler(0xfe00, 0xfeff, write8_delegate(FUNC(pk8020_state::devices_w),state));
522                  space.install_read_handler (0xfe00, 0xfeff, read8_delegate(FUNC(pk8020_state::devices_r),state));
523                  space.install_write_handler(0xfe00, 0xfeff, write8_delegate(FUNC(pk8020_state::devices_w),state));
524524                  // System reg
525                  space->install_read_handler (0xff00, 0xffff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
526                  space->install_write_handler(0xff00, 0xffff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
525                  space.install_read_handler (0xff00, 0xffff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
526                  space.install_write_handler(0xff00, 0xffff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
527527               }
528528               break;
529529      case 0x10 :
530530               {
531531                  // ROM
532                  space->install_read_bank (0x0000, 0x5fff, "bank1");
533                  space->install_write_bank(0x0000, 0x5fff, "bank2");
532                  space.install_read_bank (0x0000, 0x5fff, "bank1");
533                  space.install_write_bank(0x0000, 0x5fff, "bank2");
534534                  state->membank("bank1")->set_base(mem + 0x10000);
535535                  state->membank("bank2")->set_base(ram + 0x0000);
536536                  // RAM
537                  space->install_read_bank (0x6000, 0xf7ff, "bank3");
538                  space->install_write_bank(0x6000, 0xf7ff, "bank4");
537                  space.install_read_bank (0x6000, 0xf7ff, "bank3");
538                  space.install_write_bank(0x6000, 0xf7ff, "bank4");
539539                  state->membank("bank3")->set_base(ram + 0x6000);
540540                  state->membank("bank4")->set_base(ram + 0x6000);
541541                  // Keyboard
542                  space->install_read_handler (0xf800, 0xf9ff, read8_delegate(FUNC(pk8020_state::keyboard_r),state));
543                  space->install_write_bank(0xf800, 0xf9ff, "bank5");
542                  space.install_read_handler (0xf800, 0xf9ff, read8_delegate(FUNC(pk8020_state::keyboard_r),state));
543                  space.install_write_bank(0xf800, 0xf9ff, "bank5");
544544                  state->membank("bank5")->set_base(ram + 0xf800);
545545                  // System reg
546                  space->install_read_handler (0xfa00, 0xfaff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
547                  space->install_write_handler(0xfa00, 0xfaff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
546                  space.install_read_handler (0xfa00, 0xfaff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
547                  space.install_write_handler(0xfa00, 0xfaff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
548548                  // Devices
549                  space->install_read_handler (0xfb00, 0xfbff, read8_delegate(FUNC(pk8020_state::devices_r),state));
550                  space->install_write_handler(0xfb00, 0xfbff, write8_delegate(FUNC(pk8020_state::devices_w),state));
549                  space.install_read_handler (0xfb00, 0xfbff, read8_delegate(FUNC(pk8020_state::devices_r),state));
550                  space.install_write_handler(0xfb00, 0xfbff, write8_delegate(FUNC(pk8020_state::devices_w),state));
551551                  // Text Video Memory
552                  space->install_read_handler (0xfc00, 0xffff, read8_delegate(FUNC(pk8020_state::text_r),state));
553                  space->install_write_handler(0xfc00, 0xffff, write8_delegate(FUNC(pk8020_state::text_w),state));
552                  space.install_read_handler (0xfc00, 0xffff, read8_delegate(FUNC(pk8020_state::text_r),state));
553                  space.install_write_handler(0xfc00, 0xffff, write8_delegate(FUNC(pk8020_state::text_w),state));
554554               }
555555               break;
556556      case 0x11 :
557557               {
558558                  // ROM
559                  space->install_read_bank (0x0000, 0x1fff, "bank1");
560                  space->install_write_bank(0x0000, 0x1fff, "bank2");
559                  space.install_read_bank (0x0000, 0x1fff, "bank1");
560                  space.install_write_bank(0x0000, 0x1fff, "bank2");
561561                  state->membank("bank1")->set_base(mem + 0x10000);
562562                  state->membank("bank2")->set_base(ram + 0x0000);
563563                  // RAM
564                  space->install_read_bank (0x2000, 0xf7ff, "bank3");
565                  space->install_write_bank(0x2000, 0xf7ff, "bank4");
564                  space.install_read_bank (0x2000, 0xf7ff, "bank3");
565                  space.install_write_bank(0x2000, 0xf7ff, "bank4");
566566                  state->membank("bank3")->set_base(ram + 0x2000);
567567                  state->membank("bank4")->set_base(ram + 0x2000);
568568                  // Keyboard
569                  space->install_read_handler (0xf800, 0xf9ff, read8_delegate(FUNC(pk8020_state::keyboard_r),state));
570                  space->install_write_bank(0xf800, 0xf9ff, "bank5");
569                  space.install_read_handler (0xf800, 0xf9ff, read8_delegate(FUNC(pk8020_state::keyboard_r),state));
570                  space.install_write_bank(0xf800, 0xf9ff, "bank5");
571571                  state->membank("bank5")->set_base(ram + 0xf800);
572572                  // System reg
573                  space->install_read_handler (0xfa00, 0xfaff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
574                  space->install_write_handler(0xfa00, 0xfaff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
573                  space.install_read_handler (0xfa00, 0xfaff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
574                  space.install_write_handler(0xfa00, 0xfaff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
575575                  // Devices
576                  space->install_read_handler (0xfb00, 0xfbff, read8_delegate(FUNC(pk8020_state::devices_r),state));
577                  space->install_write_handler(0xfb00, 0xfbff, write8_delegate(FUNC(pk8020_state::devices_w),state));
576                  space.install_read_handler (0xfb00, 0xfbff, read8_delegate(FUNC(pk8020_state::devices_r),state));
577                  space.install_write_handler(0xfb00, 0xfbff, write8_delegate(FUNC(pk8020_state::devices_w),state));
578578                  // Text Video Memory
579                  space->install_read_handler (0xfc00, 0xffff, read8_delegate(FUNC(pk8020_state::text_r),state));
580                  space->install_write_handler(0xfc00, 0xffff, write8_delegate(FUNC(pk8020_state::text_w),state));
579                  space.install_read_handler (0xfc00, 0xffff, read8_delegate(FUNC(pk8020_state::text_r),state));
580                  space.install_write_handler(0xfc00, 0xffff, write8_delegate(FUNC(pk8020_state::text_w),state));
581581               }
582582               break;
583583      case 0x12 :
584584               {
585585                  // ROM
586                  space->install_read_bank (0x0000, 0x3fff, "bank1");
587                  space->install_write_bank(0x0000, 0x3fff, "bank2");
586                  space.install_read_bank (0x0000, 0x3fff, "bank1");
587                  space.install_write_bank(0x0000, 0x3fff, "bank2");
588588                  state->membank("bank1")->set_base(mem + 0x10000);
589589                  state->membank("bank2")->set_base(ram + 0x0000);
590590                  // RAM
591                  space->install_read_bank (0x4000, 0xf7ff, "bank3");
592                  space->install_write_bank(0x4000, 0xf7ff, "bank4");
591                  space.install_read_bank (0x4000, 0xf7ff, "bank3");
592                  space.install_write_bank(0x4000, 0xf7ff, "bank4");
593593                  state->membank("bank3")->set_base(ram + 0x4000);
594594                  state->membank("bank4")->set_base(ram + 0x4000);
595595                  // Keyboard
596                  space->install_read_handler (0xf800, 0xf9ff, read8_delegate(FUNC(pk8020_state::keyboard_r),state));
597                  space->install_write_bank(0xf800, 0xf9ff, "bank5");
596                  space.install_read_handler (0xf800, 0xf9ff, read8_delegate(FUNC(pk8020_state::keyboard_r),state));
597                  space.install_write_bank(0xf800, 0xf9ff, "bank5");
598598                  state->membank("bank5")->set_base(ram + 0xf800);
599599                  // System reg
600                  space->install_read_handler (0xfa00, 0xfaff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
601                  space->install_write_handler(0xfa00, 0xfaff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
600                  space.install_read_handler (0xfa00, 0xfaff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
601                  space.install_write_handler(0xfa00, 0xfaff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
602602                  // Devices
603                  space->install_read_handler (0xfb00, 0xfbff, read8_delegate(FUNC(pk8020_state::devices_r),state));
604                  space->install_write_handler(0xfb00, 0xfbff, write8_delegate(FUNC(pk8020_state::devices_w),state));
603                  space.install_read_handler (0xfb00, 0xfbff, read8_delegate(FUNC(pk8020_state::devices_r),state));
604                  space.install_write_handler(0xfb00, 0xfbff, write8_delegate(FUNC(pk8020_state::devices_w),state));
605605                  // Text Video Memory
606                  space->install_read_handler (0xfc00, 0xffff, read8_delegate(FUNC(pk8020_state::text_r),state));
607                  space->install_write_handler(0xfc00, 0xffff, write8_delegate(FUNC(pk8020_state::text_w),state));
606                  space.install_read_handler (0xfc00, 0xffff, read8_delegate(FUNC(pk8020_state::text_r),state));
607                  space.install_write_handler(0xfc00, 0xffff, write8_delegate(FUNC(pk8020_state::text_w),state));
608608               }
609609               break;
610610      case 0x13 :
611611               {
612612                  // RAM
613                  space->install_read_bank (0x0000, 0xf7ff, "bank1");
614                  space->install_write_bank(0x0000, 0xf7ff, "bank2");
613                  space.install_read_bank (0x0000, 0xf7ff, "bank1");
614                  space.install_write_bank(0x0000, 0xf7ff, "bank2");
615615                  state->membank("bank1")->set_base(ram + 0x0000);
616616                  state->membank("bank2")->set_base(ram + 0x0000);
617617                  // Keyboard
618                  space->install_read_handler (0xf800, 0xf9ff, read8_delegate(FUNC(pk8020_state::keyboard_r),state));
619                  space->install_write_bank(0xf800, 0xf9ff, "bank3");
618                  space.install_read_handler (0xf800, 0xf9ff, read8_delegate(FUNC(pk8020_state::keyboard_r),state));
619                  space.install_write_bank(0xf800, 0xf9ff, "bank3");
620620                  state->membank("bank3")->set_base(ram + 0xf800);
621621                  // System reg
622                  space->install_read_handler (0xfa00, 0xfaff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
623                  space->install_write_handler(0xfa00, 0xfaff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
622                  space.install_read_handler (0xfa00, 0xfaff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
623                  space.install_write_handler(0xfa00, 0xfaff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
624624                  // Devices
625                  space->install_read_handler (0xfb00, 0xfbff, read8_delegate(FUNC(pk8020_state::devices_r),state));
626                  space->install_write_handler(0xfb00, 0xfbff, write8_delegate(FUNC(pk8020_state::devices_w),state));
625                  space.install_read_handler (0xfb00, 0xfbff, read8_delegate(FUNC(pk8020_state::devices_r),state));
626                  space.install_write_handler(0xfb00, 0xfbff, write8_delegate(FUNC(pk8020_state::devices_w),state));
627627                  // Text Video Memory
628                  space->install_read_handler (0xfc00, 0xffff, read8_delegate(FUNC(pk8020_state::text_r),state));
629                  space->install_write_handler(0xfc00, 0xffff, write8_delegate(FUNC(pk8020_state::text_w),state));
628                  space.install_read_handler (0xfc00, 0xffff, read8_delegate(FUNC(pk8020_state::text_r),state));
629                  space.install_write_handler(0xfc00, 0xffff, write8_delegate(FUNC(pk8020_state::text_w),state));
630630               }
631631               break;
632632      case 0x14 :
633633               {
634634                  // ROM
635                  space->install_read_bank (0x0000, 0x5fff, "bank1");
636                  space->install_write_bank(0x0000, 0x5fff, "bank2");
635                  space.install_read_bank (0x0000, 0x5fff, "bank1");
636                  space.install_write_bank(0x0000, 0x5fff, "bank2");
637637                  state->membank("bank1")->set_base(mem + 0x10000);
638638                  state->membank("bank2")->set_base(ram + 0x0000);
639639                  // RAM
640                  space->install_read_bank (0x6000, 0xfdff, "bank3");
641                  space->install_write_bank(0x6000, 0xfdff, "bank4");
640                  space.install_read_bank (0x6000, 0xfdff, "bank3");
641                  space.install_write_bank(0x6000, 0xfdff, "bank4");
642642                  state->membank("bank3")->set_base(ram + 0x6000);
643643                  state->membank("bank4")->set_base(ram + 0x6000);
644644                  // Devices
645                  space->install_read_handler (0xfe00, 0xfeff, read8_delegate(FUNC(pk8020_state::devices_r),state));
646                  space->install_write_handler(0xfe00, 0xfeff, write8_delegate(FUNC(pk8020_state::devices_w),state));
645                  space.install_read_handler (0xfe00, 0xfeff, read8_delegate(FUNC(pk8020_state::devices_r),state));
646                  space.install_write_handler(0xfe00, 0xfeff, write8_delegate(FUNC(pk8020_state::devices_w),state));
647647                  // System reg
648                  space->install_read_handler (0xff00, 0xffff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
649                  space->install_write_handler(0xff00, 0xffff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
648                  space.install_read_handler (0xff00, 0xffff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
649                  space.install_write_handler(0xff00, 0xffff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
650650               }
651651               break;
652652      case 0x15 :
653653               {
654654                  // ROM
655                  space->install_read_bank (0x0000, 0x1fff, "bank1");
656                  space->install_write_bank(0x0000, 0x1fff, "bank2");
655                  space.install_read_bank (0x0000, 0x1fff, "bank1");
656                  space.install_write_bank(0x0000, 0x1fff, "bank2");
657657                  state->membank("bank1")->set_base(mem + 0x10000);
658658                  state->membank("bank2")->set_base(ram + 0x0000);
659659                  // RAM
660                  space->install_read_bank (0x2000, 0xfdff, "bank3");
661                  space->install_write_bank(0x2000, 0xfdff, "bank4");
660                  space.install_read_bank (0x2000, 0xfdff, "bank3");
661                  space.install_write_bank(0x2000, 0xfdff, "bank4");
662662                  state->membank("bank3")->set_base(ram + 0x2000);
663663                  state->membank("bank4")->set_base(ram + 0x2000);
664664                  // Devices
665                  space->install_read_handler (0xfe00, 0xfeff, read8_delegate(FUNC(pk8020_state::devices_r),state));
666                  space->install_write_handler(0xfe00, 0xfeff, write8_delegate(FUNC(pk8020_state::devices_w),state));
665                  space.install_read_handler (0xfe00, 0xfeff, read8_delegate(FUNC(pk8020_state::devices_r),state));
666                  space.install_write_handler(0xfe00, 0xfeff, write8_delegate(FUNC(pk8020_state::devices_w),state));
667667                  // System reg
668                  space->install_read_handler (0xff00, 0xffff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
669                  space->install_write_handler(0xff00, 0xffff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
668                  space.install_read_handler (0xff00, 0xffff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
669                  space.install_write_handler(0xff00, 0xffff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
670670               }
671671               break;
672672      case 0x16 :
673673               {
674674                  // ROM
675                  space->install_read_bank (0x0000, 0x3fff, "bank1");
676                  space->install_write_bank(0x0000, 0x3fff, "bank2");
675                  space.install_read_bank (0x0000, 0x3fff, "bank1");
676                  space.install_write_bank(0x0000, 0x3fff, "bank2");
677677                  state->membank("bank1")->set_base(mem + 0x10000);
678678                  state->membank("bank2")->set_base(ram + 0x0000);
679679                  // RAM
680                  space->install_read_bank (0x4000, 0xfdff, "bank3");
681                  space->install_write_bank(0x4000, 0xfdff, "bank4");
680                  space.install_read_bank (0x4000, 0xfdff, "bank3");
681                  space.install_write_bank(0x4000, 0xfdff, "bank4");
682682                  state->membank("bank3")->set_base(ram + 0x4000);
683683                  state->membank("bank4")->set_base(ram + 0x4000);
684684                  // Devices
685                  space->install_read_handler (0xfe00, 0xfeff, read8_delegate(FUNC(pk8020_state::devices_r),state));
686                  space->install_write_handler(0xfe00, 0xfeff, write8_delegate(FUNC(pk8020_state::devices_w),state));
685                  space.install_read_handler (0xfe00, 0xfeff, read8_delegate(FUNC(pk8020_state::devices_r),state));
686                  space.install_write_handler(0xfe00, 0xfeff, write8_delegate(FUNC(pk8020_state::devices_w),state));
687687                  // System reg
688                  space->install_read_handler (0xff00, 0xffff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
689                  space->install_write_handler(0xff00, 0xffff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
688                  space.install_read_handler (0xff00, 0xffff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
689                  space.install_write_handler(0xff00, 0xffff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
690690               }
691691               break;
692692      case 0x17 :
693693               {
694694                  // RAM
695                  space->install_read_bank (0x0000, 0xfdff, "bank1");
696                  space->install_write_bank(0x0000, 0xfdff, "bank2");
695                  space.install_read_bank (0x0000, 0xfdff, "bank1");
696                  space.install_write_bank(0x0000, 0xfdff, "bank2");
697697                  state->membank("bank1")->set_base(ram);
698698                  state->membank("bank2")->set_base(ram);
699699                  // Devices
700                  space->install_read_handler (0xfe00, 0xfeff, read8_delegate(FUNC(pk8020_state::devices_r),state));
701                  space->install_write_handler(0xfe00, 0xfeff, write8_delegate(FUNC(pk8020_state::devices_w),state));
700                  space.install_read_handler (0xfe00, 0xfeff, read8_delegate(FUNC(pk8020_state::devices_r),state));
701                  space.install_write_handler(0xfe00, 0xfeff, write8_delegate(FUNC(pk8020_state::devices_w),state));
702702                  // System reg
703                  space->install_read_handler (0xff00, 0xffff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
704                  space->install_write_handler(0xff00, 0xffff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
703                  space.install_read_handler (0xff00, 0xffff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
704                  space.install_write_handler(0xff00, 0xffff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
705705               }
706706               break;
707707      case 0x18 :
708708               {
709709                  // ROM
710                  space->install_read_bank (0x0000, 0x5fff, "bank1");
711                  space->install_write_bank(0x0000, 0x5fff, "bank2");
710                  space.install_read_bank (0x0000, 0x5fff, "bank1");
711                  space.install_write_bank(0x0000, 0x5fff, "bank2");
712712                  state->membank("bank1")->set_base(mem + 0x10000);
713713                  state->membank("bank2")->set_base(ram + 0x0000);
714714                  // RAM
715                  space->install_read_bank (0x6000, 0xbeff, "bank3");
716                  space->install_write_bank(0x6000, 0xbeff, "bank4");
715                  space.install_read_bank (0x6000, 0xbeff, "bank3");
716                  space.install_write_bank(0x6000, 0xbeff, "bank4");
717717                  state->membank("bank3")->set_base(ram + 0x6000);
718718                  state->membank("bank4")->set_base(ram + 0x6000);
719719                  // System reg
720                  space->install_read_handler (0xbf00, 0xbfff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
721                  space->install_write_handler(0xbf00, 0xbfff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
720                  space.install_read_handler (0xbf00, 0xbfff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
721                  space.install_write_handler(0xbf00, 0xbfff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
722722                  // Video RAM
723                  space->install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
724                  space->install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
723                  space.install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
724                  space.install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
725725               }
726726               break;
727727      case 0x19 :
728728               {
729729                  // ROM
730                  space->install_read_bank (0x0000, 0x1fff, "bank1");
731                  space->install_write_bank(0x0000, 0x1fff, "bank2");
730                  space.install_read_bank (0x0000, 0x1fff, "bank1");
731                  space.install_write_bank(0x0000, 0x1fff, "bank2");
732732                  state->membank("bank1")->set_base(mem + 0x10000);
733733                  state->membank("bank2")->set_base(ram + 0x0000);
734734                  // RAM
735                  space->install_read_bank (0x2000, 0xbeff, "bank3");
736                  space->install_write_bank(0x2000, 0xbeff, "bank4");
735                  space.install_read_bank (0x2000, 0xbeff, "bank3");
736                  space.install_write_bank(0x2000, 0xbeff, "bank4");
737737                  state->membank("bank3")->set_base(ram + 0x2000);
738738                  state->membank("bank4")->set_base(ram + 0x2000);
739739                  // System reg
740                  space->install_read_handler (0xbf00, 0xbfff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
741                  space->install_write_handler(0xbf00, 0xbfff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
740                  space.install_read_handler (0xbf00, 0xbfff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
741                  space.install_write_handler(0xbf00, 0xbfff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
742742                  // Video RAM
743                  space->install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
744                  space->install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
743                  space.install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
744                  space.install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
745745               }
746746               break;
747747      case 0x1A :
748748               {
749749                  // ROM
750                  space->install_read_bank (0x0000, 0x3fff, "bank1");
751                  space->install_write_bank(0x0000, 0x3fff, "bank2");
750                  space.install_read_bank (0x0000, 0x3fff, "bank1");
751                  space.install_write_bank(0x0000, 0x3fff, "bank2");
752752                  state->membank("bank1")->set_base(mem + 0x10000);
753753                  state->membank("bank2")->set_base(ram + 0x0000);
754754                  // RAM
755                  space->install_read_bank (0x4000, 0xbeff, "bank3");
756                  space->install_write_bank(0x4000, 0xbeff, "bank4");
755                  space.install_read_bank (0x4000, 0xbeff, "bank3");
756                  space.install_write_bank(0x4000, 0xbeff, "bank4");
757757                  state->membank("bank3")->set_base(ram + 0x4000);
758758                  state->membank("bank4")->set_base(ram + 0x4000);
759759                  // System reg
760                  space->install_read_handler (0xbf00, 0xbfff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
761                  space->install_write_handler(0xbf00, 0xbfff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
760                  space.install_read_handler (0xbf00, 0xbfff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
761                  space.install_write_handler(0xbf00, 0xbfff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
762762                  // Video RAM
763                  space->install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
764                  space->install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
763                  space.install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
764                  space.install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
765765               }
766766               break;
767767      case 0x1B :
768768               {
769769                  // RAM
770                  space->install_read_bank (0x0000, 0xbeff, "bank1");
771                  space->install_write_bank(0x0000, 0xbeff, "bank2");
770                  space.install_read_bank (0x0000, 0xbeff, "bank1");
771                  space.install_write_bank(0x0000, 0xbeff, "bank2");
772772                  state->membank("bank1")->set_base(ram);
773773                  state->membank("bank2")->set_base(ram);
774774                  // System reg
775                  space->install_read_handler (0xbf00, 0xbfff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
776                  space->install_write_handler(0xbf00, 0xbfff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
775                  space.install_read_handler (0xbf00, 0xbfff, read8_delegate(FUNC(pk8020_state::sysreg_r),state));
776                  space.install_write_handler(0xbf00, 0xbfff, write8_delegate(FUNC(pk8020_state::sysreg_w),state));
777777                  // Video RAM
778                  space->install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
779                  space->install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
778                  space.install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
779                  space.install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
780780               }
781781               break;
782782      case 0x1C :
783783               {
784784                  // ROM
785                  space->install_read_bank (0x0000, 0x5fff, "bank1");
786                  space->install_write_bank(0x0000, 0x5fff, "bank2");
785                  space.install_read_bank (0x0000, 0x5fff, "bank1");
786                  space.install_write_bank(0x0000, 0x5fff, "bank2");
787787                  state->membank("bank1")->set_base(mem + 0x10000);
788788                  state->membank("bank2")->set_base(ram + 0x0000);
789789                  // RAM
790                  space->install_read_bank (0x6000, 0xbfff, "bank3");
791                  space->install_write_bank(0x6000, 0xbfff, "bank4");
790                  space.install_read_bank (0x6000, 0xbfff, "bank3");
791                  space.install_write_bank(0x6000, 0xbfff, "bank4");
792792                  state->membank("bank3")->set_base(ram + 0x6000);
793793                  state->membank("bank4")->set_base(ram + 0x6000);
794794                  // Video RAM
795                  space->install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
796                  space->install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
795                  space.install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
796                  space.install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
797797               }
798798               break;
799799      case 0x1D :
800800               {
801801                  // ROM
802                  space->install_read_bank (0x0000, 0x1fff, "bank1");
803                  space->install_write_bank(0x0000, 0x1fff, "bank2");
802                  space.install_read_bank (0x0000, 0x1fff, "bank1");
803                  space.install_write_bank(0x0000, 0x1fff, "bank2");
804804                  state->membank("bank1")->set_base(mem + 0x10000);
805805                  state->membank("bank2")->set_base(ram + 0x0000);
806806                  // RAM
807                  space->install_read_bank (0x2000, 0xbfff, "bank3");
808                  space->install_write_bank(0x2000, 0xbfff, "bank4");
807                  space.install_read_bank (0x2000, 0xbfff, "bank3");
808                  space.install_write_bank(0x2000, 0xbfff, "bank4");
809809                  state->membank("bank3")->set_base(ram + 0x2000);
810810                  state->membank("bank4")->set_base(ram + 0x2000);
811811                  // Video RAM
812                  space->install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
813                  space->install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
812                  space.install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
813                  space.install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
814814               }
815815               break;
816816      case 0x1E :
817817               {
818818                  // ROM
819                  space->install_read_bank (0x0000, 0x3fff, "bank1");
820                  space->install_write_bank(0x0000, 0x3fff, "bank2");
819                  space.install_read_bank (0x0000, 0x3fff, "bank1");
820                  space.install_write_bank(0x0000, 0x3fff, "bank2");
821821                  state->membank("bank1")->set_base(mem + 0x10000);
822822                  state->membank("bank2")->set_base(ram + 0x0000);
823823                  // RAM
824                  space->install_read_bank (0x4000, 0xbfff, "bank3");
825                  space->install_write_bank(0x4000, 0xbfff, "bank4");
824                  space.install_read_bank (0x4000, 0xbfff, "bank3");
825                  space.install_write_bank(0x4000, 0xbfff, "bank4");
826826                  state->membank("bank3")->set_base(ram + 0x4000);
827827                  state->membank("bank4")->set_base(ram + 0x4000);
828828                  // Video RAM
829                  space->install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
830                  space->install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
829                  space.install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
830                  space.install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
831831               }
832832               break;
833833      case 0x1F :
834834               {
835835                  // RAM
836                  space->install_read_bank (0x0000, 0xbfff, "bank1");
837                  space->install_write_bank(0x0000, 0xbfff, "bank2");
836                  space.install_read_bank (0x0000, 0xbfff, "bank1");
837                  space.install_write_bank(0x0000, 0xbfff, "bank2");
838838                  state->membank("bank1")->set_base(ram);
839839                  state->membank("bank2")->set_base(ram);
840840                  // Video RAM
841                  space->install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
842                  space->install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
841                  space.install_read_handler (0xc000, 0xffff, read8_delegate(FUNC(pk8020_state::gzu_r),state));
842                  space.install_write_handler(0xc000, 0xffff, write8_delegate(FUNC(pk8020_state::gzu_w),state));
843843               }
844844               break;
845845
trunk/src/mess/machine/kc.c
r17963r17964
6161      datasize = image.length() - 128;
6262   }
6363
64   address_space *space = state->m_maincpu->space( AS_PROGRAM );
64   address_space &space = *state->m_maincpu->space( AS_PROGRAM );
6565
6666   for (i=0; i<datasize; i++)
67      space->write_byte((addr+i) & 0xffff, data[i+128]);
67      space.write_byte((addr+i) & 0xffff, data[i+128]);
6868
6969   if (execution_address != 0 && header->number_addresses >= 3 )
7070   {
r17963r17964
290290/* update status of memory area 0x0000-0x03fff */
291291void kc_state::update_0x00000()
292292{
293   address_space *space = m_maincpu->space( AS_PROGRAM );
293   address_space &space = *m_maincpu->space( AS_PROGRAM );
294294
295295   /* access ram? */
296296   if (m_pio_data[0] & (1<<1))
r17963r17964
298298      LOG(("ram0 enabled\n"));
299299
300300      /* yes; set address of bank */
301      space->install_read_bank(0x0000, 0x3fff, "bank1");
301      space.install_read_bank(0x0000, 0x3fff, "bank1");
302302      membank("bank1")->set_base(m_ram_base);
303303
304304      /* write protect ram? */
r17963r17964
308308         LOG(("ram0 write protected\n"));
309309
310310         /* ram is enabled and write protected */
311         space->unmap_write(0x0000, 0x3fff);
311         space.unmap_write(0x0000, 0x3fff);
312312      }
313313      else
314314      {
315315         LOG(("ram0 write enabled\n"));
316316
317317         /* ram is enabled and write enabled */
318         space->install_write_bank(0x0000, 0x3fff, "bank1");
318         space.install_write_bank(0x0000, 0x3fff, "bank1");
319319      }
320320   }
321321   else
322322   {
323323      LOG(("Module at 0x0000\n"));
324324
325      space->install_read_handler (0x0000, 0x3fff, 0, 0, read8_delegate(FUNC(kc_state::expansion_read), this), 0);
326      space->install_write_handler(0x0000, 0x3fff, 0, 0, write8_delegate(FUNC(kc_state::expansion_write), this), 0);
325      space.install_read_handler (0x0000, 0x3fff, 0, 0, read8_delegate(FUNC(kc_state::expansion_read), this), 0);
326      space.install_write_handler(0x0000, 0x3fff, 0, 0, write8_delegate(FUNC(kc_state::expansion_write), this), 0);
327327   }
328328}
329329
330330/* update status of memory area 0x4000-0x07fff */
331331void kc_state::update_0x04000()
332332{
333   address_space *space = m_maincpu->space( AS_PROGRAM );
333   address_space &space = *m_maincpu->space( AS_PROGRAM );
334334
335335   LOG(("Module at 0x4000\n"));
336336
337   space->install_read_handler (0x4000, 0x7fff, 0, 0, read8_delegate(FUNC(kc_state::expansion_4000_r), this), 0);
338   space->install_write_handler(0x4000, 0x7fff, 0, 0, write8_delegate(FUNC(kc_state::expansion_4000_w), this), 0);
337   space.install_read_handler (0x4000, 0x7fff, 0, 0, read8_delegate(FUNC(kc_state::expansion_4000_r), this), 0);
338   space.install_write_handler(0x4000, 0x7fff, 0, 0, write8_delegate(FUNC(kc_state::expansion_4000_w), this), 0);
339339
340340}
341341
r17963r17964
343343/* update memory address 0x0c000-0x0e000 */
344344void kc_state::update_0x0c000()
345345{
346   address_space *space = m_maincpu->space( AS_PROGRAM );
346   address_space &space = *m_maincpu->space( AS_PROGRAM );
347347
348348   if ((m_pio_data[0] & (1<<7)) && memregion("basic")->base() != NULL)
349349   {
r17963r17964
351351           LOG(("BASIC rom 0x0c000\n"));
352352
353353        membank("bank4")->set_base(memregion("basic")->base());
354      space->install_read_bank(0xc000, 0xdfff, "bank4");
355      space->unmap_write(0xc000, 0xdfff);
354      space.install_read_bank(0xc000, 0xdfff, "bank4");
355      space.unmap_write(0xc000, 0xdfff);
356356   }
357357   else
358358   {
359359      LOG(("Module at 0x0c000\n"));
360360
361      space->install_read_handler (0xc000, 0xdfff, 0, 0, read8_delegate(FUNC(kc_state::expansion_c000_r), this), 0);
362      space->install_write_handler(0xc000, 0xdfff, 0, 0, write8_delegate(FUNC(kc_state::expansion_c000_w), this), 0);
361      space.install_read_handler (0xc000, 0xdfff, 0, 0, read8_delegate(FUNC(kc_state::expansion_c000_r), this), 0);
362      space.install_write_handler(0xc000, 0xdfff, 0, 0, write8_delegate(FUNC(kc_state::expansion_c000_w), this), 0);
363363   }
364364}
365365
366366/* update memory address 0x0e000-0x0ffff */
367367void kc_state::update_0x0e000()
368368{
369   address_space *space = m_maincpu->space( AS_PROGRAM );
369   address_space &space = *m_maincpu->space( AS_PROGRAM );
370370
371371   if (m_pio_data[0] & (1<<0))
372372   {
r17963r17964
374374      LOG(("CAOS rom 0x0e000\n"));
375375      /* read will access the rom */
376376      membank("bank5")->set_base(memregion("caos")->base() + 0x2000);
377      space->install_read_bank(0xe000, 0xffff, "bank5");
378      space->unmap_write(0xe000, 0xffff);
377      space.install_read_bank(0xe000, 0xffff, "bank5");
378      space.unmap_write(0xe000, 0xffff);
379379   }
380380   else
381381   {
382382      LOG(("Module at 0x0e000\n"));
383383
384      space->install_read_handler (0xe000, 0xffff, 0, 0, read8_delegate(FUNC(kc_state::expansion_e000_r), this), 0);
385      space->install_write_handler(0xe000, 0xffff, 0, 0, write8_delegate(FUNC(kc_state::expansion_e000_w), this), 0);
384      space.install_read_handler (0xe000, 0xffff, 0, 0, read8_delegate(FUNC(kc_state::expansion_e000_r), this), 0);
385      space.install_write_handler(0xe000, 0xffff, 0, 0, write8_delegate(FUNC(kc_state::expansion_e000_w), this), 0);
386386   }
387387}
388388
r17963r17964
390390/* update status of memory area 0x08000-0x0ffff */
391391void kc_state::update_0x08000()
392392{
393   address_space *space = m_maincpu->space( AS_PROGRAM );
393   address_space &space = *m_maincpu->space( AS_PROGRAM );
394394
395395    if (m_pio_data[0] & (1<<2))
396396    {
r17963r17964
398398        LOG(("IRM enabled\n"));
399399
400400      membank("bank3")->set_base(m_video_ram);
401      space->install_readwrite_bank(0x8000, 0xbfff, "bank3");
401      space.install_readwrite_bank(0x8000, 0xbfff, "bank3");
402402    }
403403    else
404404    {
405405      LOG(("Module at 0x8000!\n"));
406406
407      space->install_read_handler(0x8000, 0xbfff, 0, 0, read8_delegate(FUNC(kc_state::expansion_8000_r), this), 0);
408      space->install_write_handler(0x8000, 0xbfff, 0, 0, write8_delegate(FUNC(kc_state::expansion_8000_w), this), 0);
407      space.install_read_handler(0x8000, 0xbfff, 0, 0, read8_delegate(FUNC(kc_state::expansion_8000_r), this), 0);
408      space.install_write_handler(0x8000, 0xbfff, 0, 0, write8_delegate(FUNC(kc_state::expansion_8000_w), this), 0);
409409    }
410410}
411411
r17963r17964
413413/* update status of memory area 0x4000-0x07fff */
414414void kc85_4_state::update_0x04000()
415415{
416   address_space *space = m_maincpu->space( AS_PROGRAM );
416   address_space &space = *m_maincpu->space( AS_PROGRAM );
417417
418418   /* access ram? */
419419   if (m_port_86_data & (1<<0))
r17963r17964
421421      LOG(("RAM4 enabled\n"));
422422
423423      /* yes */
424      space->install_read_bank(0x4000, 0x7fff, "bank2");
424      space.install_read_bank(0x4000, 0x7fff, "bank2");
425425      /* set address of bank */
426426      membank("bank2")->set_base(m_ram_base + 0x4000);
427427
r17963r17964
432432         LOG(("ram4 write protected\n"));
433433
434434         /* ram is enabled and write protected */
435         space->nop_write(0x4000, 0x7fff);
435         space.nop_write(0x4000, 0x7fff);
436436      }
437437      else
438438      {
439439         LOG(("ram4 write enabled\n"));
440440
441441         /* ram is enabled and write enabled */
442         space->install_write_bank(0x4000, 0x7fff, "bank2");
442         space.install_write_bank(0x4000, 0x7fff, "bank2");
443443      }
444444   }
445445   else
446446   {
447447      LOG(("Module at 0x4000\n"));
448448
449      space->install_read_handler (0x4000, 0x7fff, 0, 0, read8_delegate(FUNC(kc_state::expansion_4000_r), this), 0);
450      space->install_write_handler(0x4000, 0x7fff, 0, 0, write8_delegate(FUNC(kc_state::expansion_4000_w), this), 0);
449      space.install_read_handler (0x4000, 0x7fff, 0, 0, read8_delegate(FUNC(kc_state::expansion_4000_r), this), 0);
450      space.install_write_handler(0x4000, 0x7fff, 0, 0, write8_delegate(FUNC(kc_state::expansion_4000_w), this), 0);
451451   }
452452
453453}
r17963r17964
455455/* update memory address 0x0c000-0x0e000 */
456456void kc85_4_state::update_0x0c000()
457457{
458   address_space *space = m_maincpu->space( AS_PROGRAM );
458   address_space &space = *m_maincpu->space( AS_PROGRAM );
459459
460460   if (m_port_86_data & (1<<7))
461461   {
r17963r17964
463463      LOG(("CAOS rom 0x0c000\n"));
464464
465465      membank("bank4")->set_base(memregion("caos")->base());
466      space->install_read_bank(0xc000, 0xdfff, "bank4");
467      space->unmap_write(0xc000, 0xdfff);
466      space.install_read_bank(0xc000, 0xdfff, "bank4");
467      space.unmap_write(0xc000, 0xdfff);
468468   }
469469   else
470470   {
r17963r17964
476476         int bank = memregion("basic")->bytes() == 0x8000 ? (m_port_86_data>>5) & 0x03 : 0;
477477
478478         membank("bank4")->set_base(memregion("basic")->base() + (bank << 13));
479         space->install_read_bank(0xc000, 0xdfff, "bank4");
480         space->unmap_write(0xc000, 0xdfff);
479         space.install_read_bank(0xc000, 0xdfff, "bank4");
480         space.unmap_write(0xc000, 0xdfff);
481481      }
482482      else
483483      {
484484         LOG(("Module at 0x0c000\n"));
485485
486         space->install_read_handler (0xc000, 0xdfff, 0, 0, read8_delegate(FUNC(kc_state::expansion_c000_r), this), 0);
487         space->install_write_handler(0xc000, 0xdfff, 0, 0, write8_delegate(FUNC(kc_state::expansion_c000_w), this), 0);
486         space.install_read_handler (0xc000, 0xdfff, 0, 0, read8_delegate(FUNC(kc_state::expansion_c000_r), this), 0);
487         space.install_write_handler(0xc000, 0xdfff, 0, 0, write8_delegate(FUNC(kc_state::expansion_c000_w), this), 0);
488488      }
489489   }
490490}
491491
492492void kc85_4_state::update_0x08000()
493493{
494   address_space *space = m_maincpu->space( AS_PROGRAM );
494   address_space &space = *m_maincpu->space( AS_PROGRAM );
495495
496496   if (m_pio_data[0] & (1<<2))
497497   {
r17963r17964
501501      UINT8* ram_page = m_video_ram + ((BIT(m_port_84_data, 2)<<15) | (BIT(m_port_84_data, 1)<<14));
502502
503503      membank("bank3")->set_base(ram_page);
504      space->install_readwrite_bank(0x8000, 0xa7ff, "bank3");
504      space.install_readwrite_bank(0x8000, 0xa7ff, "bank3");
505505
506506      membank("bank6")->set_base(m_video_ram + 0x2800);
507      space->install_readwrite_bank(0xa800, 0xbfff, "bank6");
507      space.install_readwrite_bank(0xa800, 0xbfff, "bank6");
508508   }
509509    else if (m_pio_data[1] & (1<<5))
510510    {
r17963r17964
530530
531531      membank("bank3")->set_base(mem_ptr);
532532      membank("bank6")->set_base(mem_ptr + 0x2800);
533      space->install_read_bank(0x8000, 0xa7ff, "bank3");
534      space->install_read_bank(0xa800, 0xbfff, "bank6");
533      space.install_read_bank(0x8000, 0xa7ff, "bank3");
534      space.install_read_bank(0xa800, 0xbfff, "bank6");
535535
536536      /* write protect RAM8 ? */
537537      if ((m_pio_data[1] & (1<<6)) == 0)
r17963r17964
539539         /* ram8 is enabled and write protected */
540540         LOG(("RAM8 write protected\n"));
541541
542         space->nop_write(0x8000, 0xa7ff);
543         space->nop_write(0xa800, 0xbfff);
542         space.nop_write(0x8000, 0xa7ff);
543         space.nop_write(0xa800, 0xbfff);
544544      }
545545      else
546546      {
547547         LOG(("RAM8 write enabled\n"));
548548
549549         /* ram8 is enabled and write enabled */
550         space->install_write_bank(0x8000, 0xa7ff, "bank3");
551         space->install_write_bank(0xa800, 0xbfff, "bank6");
550         space.install_write_bank(0x8000, 0xa7ff, "bank3");
551         space.install_write_bank(0xa800, 0xbfff, "bank6");
552552      }
553553    }
554554    else
555555    {
556556      LOG(("Module at 0x8000\n"));
557557
558      space->install_read_handler(0x8000, 0xbfff, 0, 0, read8_delegate(FUNC(kc_state::expansion_8000_r), this), 0);
559      space->install_write_handler(0x8000, 0xbfff, 0, 0, write8_delegate(FUNC(kc_state::expansion_8000_w), this), 0);
558      space.install_read_handler(0x8000, 0xbfff, 0, 0, read8_delegate(FUNC(kc_state::expansion_8000_r), this), 0);
559      space.install_write_handler(0x8000, 0xbfff, 0, 0, write8_delegate(FUNC(kc_state::expansion_8000_w), this), 0);
560560    }
561561}
562562
trunk/src/mess/includes/samcoupe.h
r17963r17964
9292
9393/*----------- defined in machine/samcoupe.c -----------*/
9494
95void samcoupe_update_memory(address_space *space);
95void samcoupe_update_memory(address_space &space);
9696UINT8 samcoupe_mouse_r(running_machine &machine);
9797
9898
trunk/src/mess/video/stic.c
r17963r17964
66
77READ16_MEMBER( intv_state::intv_stic_r )
88{
9//  intv_state *state = space->machine().driver_data<intv_state>();
9//  intv_state *state = space.machine().driver_data<intv_state>();
1010   //logerror("%x = stic_r(%x)\n",0,offset);
1111   if (m_bus_copy_mode || !m_stic_handshake)
1212   {
r17963r17964
7575
7676WRITE16_MEMBER( intv_state::intv_stic_w )
7777{
78   //intv_state *state = space->machine().driver_data<intv_state>();
78   //intv_state *state = space.machine().driver_data<intv_state>();
7979   intv_sprite_type *s;
8080
8181   //logerror("stic_w(%x) = %x\n",offset,data);
trunk/src/mess/video/dgn_beta.c
r17963r17964
298298/* Write handler for colour, pallate ram */
299299WRITE8_HANDLER(dgnbeta_colour_ram_w)
300300{
301   dgn_beta_state *state = space->machine().driver_data<dgn_beta_state>();
301   dgn_beta_state *state = space.machine().driver_data<dgn_beta_state>();
302302   state->m_ColourRAM[offset]=data&0x0f;         /* Colour ram 4 bit and write only to CPU */
303303}
trunk/src/mess/video/isa_vga_ati.c
r17963r17964
6161//-------------------------------------------------
6262//  device_start - device-specific startup
6363//-------------------------------------------------
64static READ8_HANDLER( input_port_0_r ) { return 0xff; } //return space->machine().root_device().ioport("IN0")->read(); }
64static READ8_HANDLER( input_port_0_r ) { return 0xff; } //return space.machine().root_device().ioport("IN0")->read(); }
6565
6666void isa16_vga_gfxultra_device::device_start()
6767{
trunk/src/mess/video/pc1401.c
r17963r17964
1919
2020 READ8_HANDLER(pc1401_lcd_read)
2121{
22   pc1401_state *state = space->machine().driver_data<pc1401_state>();
22   pc1401_state *state = space.machine().driver_data<pc1401_state>();
2323   offset&=0xff;
2424   return state->m_reg[offset];
2525}
2626
2727WRITE8_HANDLER(pc1401_lcd_write)
2828{
29   pc1401_state *state = space->machine().driver_data<pc1401_state>();
29   pc1401_state *state = space.machine().driver_data<pc1401_state>();
3030   offset&=0xff;
3131   state->m_reg[offset]=data;
3232}
trunk/src/mess/video/hp48.c
r17963r17964
123123   data >>= 1
124124
125125#define draw_quart               \
126   UINT8 data = space->read_byte( addr );   \
126   UINT8 data = space.read_byte( addr );   \
127127   draw_pixel; draw_pixel; draw_pixel; draw_pixel;
128128
129129
130130SCREEN_UPDATE_IND16 ( hp48 )
131131{
132132   hp48_state *state = screen.machine().driver_data<hp48_state>();
133   address_space *space = screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
133   address_space &space = *screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
134134   int x, y, xp, i, addr;
135135   int display       = HP48_IO_4(0) >> 3;           /* 1=on, 0=off */
136136   int left_margin   = HP48_IO_4(0) & 7;            /* 0..7 pixels for main bitmap */
trunk/src/mess/video/apple3.c
r17963r17964
4040void apple3_write_charmem(running_machine &machine)
4141{
4242   apple3_state *state = machine.driver_data<apple3_state>();
43   address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
43   address_space& space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
4444   static const UINT32 screen_hole_map[] =
4545   {
4646      0x478, 0x4f8, 0x578, 0x5f8, 0x678, 0x6f8, 0x778, 0x7f8
r17963r17964
5252   {
5353      for (j = 0; j < 4; j++)
5454      {
55         addr = 0x7f & space->read_byte(screen_hole_map[i] + 0x400 + j + 0);
56         val = space->read_byte(screen_hole_map[i] + j + 0);
55         addr = 0x7f & space.read_byte(screen_hole_map[i] + 0x400 + j + 0);
56         val = space.read_byte(screen_hole_map[i] + j + 0);
5757         state->m_char_mem[((addr * 8) + ((i & 3) * 2) + 0) & 0x3ff] = val;
5858
59         addr = 0x7f & space->read_byte(screen_hole_map[i] + 0x400 + j + 4);
60         val = space->read_byte(screen_hole_map[i] + j + 4);
59         addr = 0x7f & space.read_byte(screen_hole_map[i] + 0x400 + j + 4);
60         val = space.read_byte(screen_hole_map[i] + j + 4);
6161         state->m_char_mem[((addr * 8) + ((i & 3) * 2) + 1) & 0x3ff] = val;
6262      }
6363   }
trunk/src/mess/video/nubus_cb264.c
r17963r17964
247247         break;
248248
249249      default:
250//          printf("cb264_w: %x to reg %x (mask %x PC %x)\n", data, offset*4, mem_mask, space->device().safe_pc());
250//          printf("cb264_w: %x to reg %x (mask %x PC %x)\n", data, offset*4, mem_mask, space.device().safe_pc());
251251         break;
252252   }
253253}
trunk/src/mess/video/dai.c
r17963r17964
5858SCREEN_UPDATE_IND16( dai )
5959{
6060   dai_state *state = screen.machine().driver_data<dai_state>();
61   address_space *space = screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
61   address_space &space = *screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
6262   int i, j, k, l;
6363
6464   UINT8* char_rom = state->memregion("gfx1")->base();
r17963r17964
102102
103103   while (current_scan_line < dai_scan_lines)
104104   {
105      mode = space->read_byte(current_video_memory_address--);
106      colour = space->read_byte(current_video_memory_address--);
105      mode = space.read_byte(current_video_memory_address--);
106      colour = space.read_byte(current_video_memory_address--);
107107      line_repeat_count = mode & 0x0f;
108108      horizontal_resolution = (mode & 0x30) >> 4;
109109      display_mode = (mode & 0xc0) >> 6;
r17963r17964
123123            switch (unit_mode)
124124            {
125125            case 0:
126               current_data_1 = space->read_byte(current_video_memory_address--);
127               current_data_2 = space->read_byte(current_video_memory_address--);
126               current_data_1 = space.read_byte(current_video_memory_address--);
127               current_data_2 = space.read_byte(current_video_memory_address--);
128128
129129               for (i=0; i<11; i++)
130130               {
r17963r17964
143143            case 1:
144144               for (i=0; i<11; i++)
145145               {
146                  current_data_1 = space->read_byte(current_video_memory_address--);
147                  current_data_2 = space->read_byte(current_video_memory_address--);
146                  current_data_1 = space.read_byte(current_video_memory_address--);
147                  current_data_2 = space.read_byte(current_video_memory_address--);
148148                  for (j=0; j<=line_repeat_count; j++)
149149                  {
150150                     for (k=0; k<8; k++)
r17963r17964
163163            switch (unit_mode)
164164            {
165165            case 0:
166               current_data_1 = space->read_byte(current_video_memory_address--);
167               current_data_2 = space->read_byte(current_video_memory_address--);
166               current_data_1 = space.read_byte(current_video_memory_address--);
167               current_data_2 = space.read_byte(current_video_memory_address--);
168168               for (i=0; i<22; i++)
169169               {
170170                  for (j=0; j<=line_repeat_count; j++)
r17963r17964
182182            case 1:
183183               for (i=0; i<22; i++)
184184               {
185                  current_data_1 = space->read_byte(current_video_memory_address--);
186                  current_data_2 = space->read_byte(current_video_memory_address--);
185                  current_data_1 = space.read_byte(current_video_memory_address--);
186                  current_data_2 = space.read_byte(current_video_memory_address--);
187187                  for (j=0; j<=line_repeat_count; j++)
188188                  {
189189                     for (k=0; k<8; k++)
r17963r17964
202202            switch (unit_mode)
203203            {
204204            case 0:
205               current_data_1 = space->read_byte(current_video_memory_address--);
206               current_data_2 = space->read_byte(current_video_memory_address--);
205               current_data_1 = space.read_byte(current_video_memory_address--);
206               current_data_2 = space.read_byte(current_video_memory_address--);
207207               for (i=0; i<44; i++)
208208               {
209209                  for (j=0; j<=line_repeat_count; j++)
r17963r17964
220220            case 1:
221221               for (i=0; i<44; i++)
222222               {
223                  current_data_1 = space->read_byte(current_video_memory_address--);
224                  current_data_2 = space->read_byte(current_video_memory_address--);
223                  current_data_1 = space.read_byte(current_video_memory_address--);
224                  current_data_2 = space.read_byte(current_video_memory_address--);
225225                  for (j=0; j<=line_repeat_count; j++)
226226                  {
227227                     for (k=0; k<8; k++)
r17963r17964
240240            switch (unit_mode)
241241            {
242242            case 0:
243               current_data_1 = space->read_byte(current_video_memory_address--);
244               current_data_2 = space->read_byte(current_video_memory_address--);
243               current_data_1 = space.read_byte(current_video_memory_address--);
244               current_data_2 = space.read_byte(current_video_memory_address--);
245245               for (i=0; i<66; i++)
246246               {
247247                  for (j=0; j<=line_repeat_count; j++)
r17963r17964
258258            case 1:
259259               for (i=0; i<66; i++)
260260               {
261                  current_data_1 = space->read_byte(current_video_memory_address--);
262                  current_data_2 = space->read_byte(current_video_memory_address--);
261                  current_data_1 = space.read_byte(current_video_memory_address--);
262                  current_data_2 = space.read_byte(current_video_memory_address--);
263263                  for (j=0; j<=line_repeat_count; j++)
264264                  {
265265                     for (k=0; k<8; k++)
r17963r17964
284284            switch (unit_mode)
285285            {
286286            case 0:
287               current_data_1 = space->read_byte(current_video_memory_address);
288               current_data_2 = space->read_byte(current_video_memory_address-1);
287               current_data_1 = space.read_byte(current_video_memory_address);
288               current_data_2 = space.read_byte(current_video_memory_address-1);
289289               current_video_memory_address-=2;
290290               for (i=0; i<11; i++)
291291               {
r17963r17964
304304            case 1:
305305               for (i=0; i<11; i++)
306306               {
307                  current_data_1 = space->read_byte(current_video_memory_address);
308                  current_data_2 = space->read_byte(current_video_memory_address-1);
307                  current_data_1 = space.read_byte(current_video_memory_address);
308                  current_data_2 = space.read_byte(current_video_memory_address-1);
309309                  current_video_memory_address-=2;
310310                  for (j=0; j<=line_repeat_count; j++)
311311                  {
r17963r17964
325325            switch (unit_mode)
326326            {
327327            case 0:
328               current_data_1 = space->read_byte(current_video_memory_address);
329               current_data_2 = space->read_byte(current_video_memory_address-1);
328               current_data_1 = space.read_byte(current_video_memory_address);
329               current_data_2 = space.read_byte(current_video_memory_address-1);
330330               current_video_memory_address-=2;
331331               for (i=0; i<22; i++)
332332               {
r17963r17964
345345            case 1:
346346               for (i=0; i<22; i++)
347347               {
348                  current_data_1 = space->read_byte(current_video_memory_address);
349                  current_data_2 = space->read_byte(current_video_memory_address-1);
348                  current_data_1 = space.read_byte(current_video_memory_address);
349                  current_data_2 = space.read_byte(current_video_memory_address-1);
350350                  current_video_memory_address-=2;
351351                  for (j=0; j<=line_repeat_count; j++)
352352                  {
r17963r17964
366366            switch (unit_mode)
367367            {
368368            case 0:
369               current_data_1 = space->read_byte(current_video_memory_address);
370               current_data_2 = space->read_byte(current_video_memory_address-1);
369               current_data_1 = space.read_byte(current_video_memory_address);
370               current_data_2 = space.read_byte(current_video_memory_address-1);
371371               current_video_memory_address-=2;
372372               for (i=0; i<44; i++)
373373               {
r17963r17964
385385            case 1:
386386               for (i=0; i<44; i++)
387387               {
388                  current_data_1 = space->read_byte(current_video_memory_address);
389                  current_data_2 = space->read_byte(current_video_memory_address-1);
388                  current_data_1 = space.read_byte(current_video_memory_address);
389                  current_data_2 = space.read_byte(current_video_memory_address-1);
390390                  current_video_memory_address-=2;
391391                  for (j=0; j<=line_repeat_count; j++)
392392                  {
r17963r17964
405405            switch (unit_mode)
406406            {
407407            case 0:
408               current_data_1 = space->read_byte(current_video_memory_address);
409               current_data_2 = space->read_byte(current_video_memory_address-1);
408               current_data_1 = space.read_byte(current_video_memory_address);
409               current_data_2 = space.read_byte(current_video_memory_address-1);
410410               current_video_memory_address-=2;
411411               for (i=0; i<66; i++)
412412               {
r17963r17964
424424            case 1:
425425               for (i=0; i<66; i++)
426426               {
427                  current_data_1 = space->read_byte(current_video_memory_address);
428                  current_data_2 = space->read_byte(current_video_memory_address-1);
427                  current_data_1 = space.read_byte(current_video_memory_address);
428                  current_data_2 = space.read_byte(current_video_memory_address-1);
429429                  current_video_memory_address-=2;
430430                  for (j=0; j<=line_repeat_count; j++)
431431                  {
r17963r17964
450450            switch (unit_mode)
451451            {
452452            case 0:
453               current_data_1 = space->read_byte(current_video_memory_address--);
454               current_data_2 = space->read_byte(current_video_memory_address--);
453               current_data_1 = space.read_byte(current_video_memory_address--);
454               current_data_2 = space.read_byte(current_video_memory_address--);
455455
456456               for (i=0; i<11; i++)
457457               {
r17963r17964
470470            case 1:
471471               for (i=0; i<11; i++)
472472               {
473                  current_data_1 = space->read_byte(current_video_memory_address--);
474                  current_data_2 = space->read_byte(current_video_memory_address--);
473                  current_data_1 = space.read_byte(current_video_memory_address--);
474                  current_data_2 = space.read_byte(current_video_memory_address--);
475475                  for (j=0; j<=line_repeat_count; j++)
476476                  {
477477                     for (k=0; k<8; k++)
r17963r17964
490490            switch (unit_mode)
491491            {
492492            case 0:
493               current_data_1 = space->read_byte(current_video_memory_address--);
494               current_data_2 = space->read_byte(current_video_memory_address--);
493               current_data_1 = space.read_byte(current_video_memory_address--);
494               current_data_2 = space.read_byte(current_video_memory_address--);
495495               for (i=0; i<22; i++)
496496               {
497497                  for (j=0; j<=line_repeat_count; j++)
r17963r17964
509509            case 1:
510510               for (i=0; i<22; i++)
511511               {
512                  current_data_1 = space->read_byte(current_video_memory_address--);
513                  current_data_2 = space->read_byte(current_video_memory_address--);
512                  current_data_1 = space.read_byte(current_video_memory_address--);
513                  current_data_2 = space.read_byte(current_video_memory_address--);
514514                  for (j=0; j<=line_repeat_count; j++)
515515                  {
516516                     for (k=0; k<8; k++)
r17963r17964
529529            switch (unit_mode)
530530            {
531531            case 0:
532               current_data_1 = space->read_byte(current_video_memory_address--);
533               current_data_2 = space->read_byte(current_video_memory_address--);
532               current_data_1 = space.read_byte(current_video_memory_address--);
533               current_data_2 = space.read_byte(current_video_memory_address--);
534534               for (i=0; i<44; i++)
535535               {
536536                  for (j=0; j<=line_repeat_count; j++)
r17963r17964
547547            case 1:
548548               for (i=0; i<44; i++)
549549               {
550                  current_data_1 = space->read_byte(current_video_memory_address--);
551                  current_data_2 = space->read_byte(current_video_memory_address--);
550                  current_data_1 = space.read_byte(current_video_memory_address--);
551                  current_data_2 = space.read_byte(current_video_memory_address--);
552552                  for (j=0; j<=line_repeat_count; j++)
553553                  {
554554                     for (k=0; k<8; k++)
r17963r17964
567567            switch (unit_mode)
568568            {
569569            case 0:
570               current_data_1 = space->read_byte(current_video_memory_address--);
571               current_data_2 = space->read_byte(current_video_memory_address--);
570               current_data_1 = space.read_byte(current_video_memory_address--);
571               current_data_2 = space.read_byte(current_video_memory_address--);
572572               for (i=0; i<66; i++)
573573               {
574574                  for (j=0; j<=line_repeat_count; j++)
r17963r17964
585585            case 1:
586586               for (i=0; i<66; i++)
587587               {
588                  current_data_1 = space->read_byte(current_video_memory_address--);
589                  current_data_2 = space->read_byte(current_video_memory_address--);
588                  current_data_1 = space.read_byte(current_video_memory_address--);
589                  current_data_2 = space.read_byte(current_video_memory_address--);
590590                  for (j=0; j<=line_repeat_count; j++)
591591                  {
592592                     for (k=0; k<8; k++)
r17963r17964
610610            switch (unit_mode)
611611            {
612612            case 0:
613               current_data_1 = space->read_byte(current_video_memory_address--);
614               current_data_2 = space->read_byte(current_video_memory_address--);
613               current_data_1 = space.read_byte(current_video_memory_address--);
614               current_data_2 = space.read_byte(current_video_memory_address--);
615615               for (i=0; i<11; i++)
616616               {
617617                  for (j=0; j<=line_repeat_count; j++)
r17963r17964
629629            case 1:
630630               for (i=0; i<11; i++)
631631               {
632                  current_data_1 = space->read_byte(current_video_memory_address--);
633                  current_data_2 = space->read_byte(current_video_memory_address--);
632                  current_data_1 = space.read_byte(current_video_memory_address--);
633                  current_data_2 = space.read_byte(current_video_memory_address--);
634634                  for (j=0; j<=line_repeat_count; j++)
635635                  {
636636                     for (k=0; k<8; k++)
r17963r17964
649649            switch (unit_mode)
650650            {
651651            case 0:
652               current_data_1 = space->read_byte(current_video_memory_address--);
653               current_data_2 = space->read_byte(current_video_memory_address--);
652               current_data_1 = space.read_byte(current_video_memory_address--);
653               current_data_2 = space.read_byte(current_video_memory_address--);
654654               for (i=0; i<22; i++)
655655               {
656656                  for (j=0; j<=line_repeat_count; j++)
r17963r17964
668668            case 1:
669669               for (i=0; i<22; i++)
670670               {
671                  current_data_1 = space->read_byte(current_video_memory_address--);
672                  current_data_2 = space->read_byte(current_video_memory_address--);
671                  current_data_1 = space.read_byte(current_video_memory_address--);
672                  current_data_2 = space.read_byte(current_video_memory_address--);
673673                  for (j=0; j<=line_repeat_count; j++)
674674                  {
675675                     for (k=0; k<8; k++)
r17963r17964
688688            switch (unit_mode)
689689            {
690690            case 0:
691               current_data_1 = space->read_byte(current_video_memory_address--);
692               current_data_2 = space->read_byte(current_video_memory_address--);
691               current_data_1 = space.read_byte(current_video_memory_address--);
692               current_data_2 = space.read_byte(current_video_memory_address--);
693693               for (i=0; i<44; i++)
694694               {
695695                  for (j=0; j<=line_repeat_count; j++)
r17963r17964
706706            case 1:
707707               for (i=0; i<44; i++)
708708               {
709                  current_data_1 = space->read_byte(current_video_memory_address--);
710                  current_data_2 = space->read_byte(current_video_memory_address--);
709                  current_data_1 = space.read_byte(current_video_memory_address--);
710                  current_data_2 = space.read_byte(current_video_memory_address--);
711711                  for (j=0; j<=line_repeat_count; j++)
712712                  {
713713                     for (k=0; k<8; k++)
r17963r17964
725725            switch (unit_mode)
726726            {
727727            case 0:
728               current_data_1 = space->read_byte(current_video_memory_address--);
729               current_data_2 = space->read_byte(current_video_memory_address--);
728               current_data_1 = space.read_byte(current_video_memory_address--);
729               current_data_2 = space.read_byte(current_video_memory_address--);
730730               for (i=0; i<66; i++)
731731               {
732732                  for (j=0; j<=line_repeat_count; j++)
r17963r17964
743743            case 1:
744744               for (i=0; i<66; i++)
745745               {
746                  current_data_1 = space->read_byte(current_video_memory_address--);
747                  current_data_2 = space->read_byte(current_video_memory_address--);
746                  current_data_1 = space.read_byte(current_video_memory_address--);
747                  current_data_2 = space.read_byte(current_video_memory_address--);
748748                  for (j=0; j<=line_repeat_count; j++)
749749                  {
750750                     for (k=0; k<8; k++)
trunk/src/mess/video/ac1.c
r17963r17964
2929SCREEN_UPDATE_IND16( ac1 )
3030{
3131   int x,y;
32   address_space *space = screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
32   address_space &space = *screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
3333
3434   for(y = 0; y < 16; y++ )
3535   {
3636      for(x = 0; x < 64; x++ )
3737      {
38         int code = space->read_byte(AC1_VIDEO_MEMORY + x + y*64);
38         int code = space.read_byte(AC1_VIDEO_MEMORY + x + y*64);
3939         drawgfx_opaque(bitmap, cliprect, screen.machine().gfx[0],  code , 0, 0,0, 63*6-x*6,15*8-y*8);
4040      }
4141   }
r17963r17964
4545SCREEN_UPDATE_IND16( ac1_32 )
4646{
4747   int x,y;
48   address_space *space = screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
48   address_space &space = *screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
4949
5050   for(y = 0; y < 32; y++ )
5151   {
5252      for(x = 0; x < 64; x++ )
5353      {
54         int code = space->read_byte(AC1_VIDEO_MEMORY + x + y*64);
54         int code = space.read_byte(AC1_VIDEO_MEMORY + x + y*64);
5555         drawgfx_opaque(bitmap, cliprect, screen.machine().gfx[0],  code , 0, 0,0, 63*6-x*6,31*8-y*8);
5656      }
5757   }
trunk/src/mess/video/cirrus.c
r17963r17964
163163void cirrus_device::device_start()
164164{
165165   pc_vga_init(machine(), NULL, &cirrus_svga_interface);
166   pc_vga_io_init(machine(), machine().device("ppc1")->memory().space(AS_PROGRAM), 0xC00A0000, machine().device("ppc1")->memory().space(AS_PROGRAM), 0x80000000);
166   pc_vga_io_init(machine(), *machine().device("ppc1")->memory().space(AS_PROGRAM), 0xC00A0000, *machine().device("ppc1")->memory().space(AS_PROGRAM), 0x80000000);
167167}
168168
169169//-------------------------------------------------
trunk/src/mess/video/pc1350.c
r17963r17964
9797
9898 READ8_HANDLER(pc1350_lcd_read)
9999{
100   pc1350_state *state = space->machine().driver_data<pc1350_state>();
100   pc1350_state *state = space.machine().driver_data<pc1350_state>();
101101   int data;
102102   data = state->m_reg[offset&0xfff];
103103   logerror("pc1350 read %.3x %.2x\n",offset,data);
r17963r17964
106106
107107WRITE8_HANDLER(pc1350_lcd_write)
108108{
109   pc1350_state *state = space->machine().driver_data<pc1350_state>();
109   pc1350_state *state = space.machine().driver_data<pc1350_state>();
110110   logerror("pc1350 write %.3x %.2x\n",offset,data);
111111   state->m_reg[offset&0xfff] = data;
112112}
trunk/src/mess/video/isa_svga_cirrus.c
r17963r17964
5858//-------------------------------------------------
5959//  device_start - device-specific startup
6060//-------------------------------------------------
61static READ8_HANDLER( input_port_0_r ) { return 0xff; } //return space->machine().root_device().ioport("IN0")->read(); }
61static READ8_HANDLER( input_port_0_r ) { return 0xff; } //return space.machine().root_device().ioport("IN0")->read(); }
6262
6363void isa8_svga_cirrus_device::device_start()
6464{
trunk/src/mess/video/isa_cga.c
r17963r17964
20132013   m_isa->install_device(0x3d0, 0x3df, 0, 0, read8_delegate( FUNC(isa8_cga_pc1512_device::io_read), this ), write8_delegate( FUNC(isa8_cga_pc1512_device::io_write), this ) );
20142014   m_isa->install_bank(0xb8000, 0xbbfff, 0, 0, "bank1", m_vram);
20152015
2016    address_space *space = machine().firstcpu->space( AS_PROGRAM );
2016    address_space &space = *machine().firstcpu->space( AS_PROGRAM );
20172017
2018    space->install_write_handler( 0xb8000, 0xbbfff, 0, 0x0C000, write8_delegate( FUNC(isa8_cga_pc1512_device::vram_w), this ) );
2018    space.install_write_handler( 0xb8000, 0xbbfff, 0, 0x0C000, write8_delegate( FUNC(isa8_cga_pc1512_device::vram_w), this ) );
20192019}
20202020
20212021void isa8_cga_pc1512_device::device_reset()
trunk/src/mess/video/gb.c
r17963r17964
12221222   gb_state *state = machine.driver_data<gb_state>();
12231223   int   i;
12241224   int vram_size = 0x2000;
1225   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1225   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
12261226   emu_timer *old_timer = state->m_lcd.lcd_timer;
12271227
12281228   memset( &state->m_lcd, 0, sizeof(state->m_lcd) );
r17963r17964
12911291      machine.scheduler().timer_set(machine.device<cpu_device>("maincpu")->cycles_to_attotime(1), FUNC(gb_video_init_vbl));
12921292
12931293      /* Initialize some video registers */
1294      state->gb_video_w( *space, 0x0, 0x91 );    /* LCDCONT */
1295      state->gb_video_w( *space, 0x7, 0xFC );    /* BGRDPAL */
1296      state->gb_video_w( *space, 0x8, 0xFC );    /* SPR0PAL */
1297      state->gb_video_w( *space, 0x9, 0xFC );    /* SPR1PAL */
1294      state->gb_video_w( space, 0x0, 0x91 );    /* LCDCONT */
1295      state->gb_video_w( space, 0x7, 0xFC );    /* BGRDPAL */
1296      state->gb_video_w( space, 0x8, 0xFC );    /* SPR0PAL */
1297      state->gb_video_w( space, 0x9, 0xFC );    /* SPR1PAL */
12981298
12991299      CURLINE = state->m_lcd.current_line = 0;
13001300      LCDSTAT = ( LCDSTAT & 0xF8 ) | 0x05;
r17963r17964
13321332{
13331333   gb_state *state = machine.driver_data<gb_state>();
13341334   UINT16 src, dst;
1335   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1335   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
13361336
13371337   src = ((UINT16)HDMA1 << 8) | (HDMA2 & 0xF0);
13381338   dst = ((UINT16)(HDMA3 & 0x1F) << 8) | (HDMA4 & 0xF0);
13391339   dst |= 0x8000;
13401340   while( length > 0 )
13411341   {
1342      space->write_byte( dst++, space->read_byte( src++ ) );
1342      space.write_byte( dst++, space.read_byte( src++ ) );
13431343      length--;
13441344   }
13451345   HDMA1 = src >> 8;
trunk/src/mess/video/newport.c
r17963r17964
233233
234234static WRITE32_HANDLER( newport_cmap0_w )
235235{
236   //running_machine &machine = space->machine();
236   //running_machine &machine = space.machine();
237237
238238   switch( pNVID->REX3.nDCBRegSelect )
239239   {
r17963r17964
253253
254254static READ32_HANDLER( newport_cmap0_r )
255255{
256   //running_machine &machine = space->machine();
256   //running_machine &machine = space.machine();
257257
258258   switch( pNVID->REX3.nDCBRegSelect )
259259   {
r17963r17964
271271
272272static READ32_HANDLER( newport_cmap1_r )
273273{
274   //running_machine &machine = space->machine();
274   //running_machine &machine = space.machine();
275275
276276   switch( pNVID->REX3.nDCBRegSelect )
277277   {
r17963r17964
290290static READ32_HANDLER( newport_xmap0_r )
291291{
292292   UINT8 nModeIdx;
293   //running_machine &machine = space->machine();
293   //running_machine &machine = space.machine();
294294
295295   switch( pNVID->REX3.nDCBRegSelect )
296296   {
r17963r17964
339339static WRITE32_HANDLER( newport_xmap0_w )
340340{
341341   UINT8 n8BitVal = data & 0x000000ff;
342   //running_machine &machine = space->machine();
342   //running_machine &machine = space.machine();
343343
344344   switch( pNVID->REX3.nDCBRegSelect )
345345   {
r17963r17964
378378static READ32_HANDLER( newport_xmap1_r )
379379{
380380   UINT8 nModeIdx;
381   //running_machine &machine = space->machine();
381   //running_machine &machine = space.machine();
382382
383383   switch( pNVID->REX3.nDCBRegSelect )
384384   {
r17963r17964
427427static WRITE32_HANDLER( newport_xmap1_w )
428428{
429429   UINT8 n8BitVal = data & 0x000000ff;
430   //running_machine &machine = space->machine();
430   //running_machine &machine = space.machine();
431431
432432   switch( pNVID->REX3.nDCBRegSelect )
433433   {
r17963r17964
466466static READ32_HANDLER( newport_vc2_r )
467467{
468468   UINT16 ret16;
469   //running_machine &machine = space->machine();
469   //running_machine &machine = space.machine();
470470
471471   switch( pNVID->REX3.nDCBRegSelect )
472472   {
r17963r17964
491491
492492static WRITE32_HANDLER( newport_vc2_w )
493493{
494   //running_machine &machine = space->machine();
494   //running_machine &machine = space.machine();
495495
496496   switch( pNVID->REX3.nXFerWidth )
497497   {
r17963r17964
608608READ32_HANDLER( newport_rex3_r )
609609{
610610//  UINT32 nTemp;
611   //running_machine &machine = space->machine();
611   //running_machine &machine = space.machine();
612612
613613//  if( offset >= ( 0x0800 / 4 ) )
614614//  {
r17963r17964
984984WRITE32_HANDLER( newport_rex3_w )
985985{
986986   UINT32 nTemp=0;
987   running_machine &machine = space->machine();
987   running_machine &machine = space.machine();
988988
989989   if( offset & 0x00000200 )
990990   {
trunk/src/mess/video/epnick.c
r17963r17964
968968
969969WRITE8_HANDLER( epnick_reg_w )
970970{
971   ep_state *state = space->machine().driver_data<ep_state>();
971   ep_state *state = space.machine().driver_data<ep_state>();
972972   NICK_STATE *nick = state->nick;
973973   //mame_printf_info("Nick write %02x %02x\r\n",offset, data);
974974
trunk/src/mess/video/cgenie.c
r17963r17964
5858***************************************************************************/
5959WRITE8_HANDLER ( cgenie_register_w )
6060{
61   cgenie_state *state = space->machine().driver_data<cgenie_state>();
61   cgenie_state *state = space.machine().driver_data<cgenie_state>();
6262   //int addr;
6363
6464   switch (state->m_crt.idx)
r17963r17964
160160***************************************************************************/
161161WRITE8_HANDLER ( cgenie_index_w )
162162{
163   cgenie_state *state = space->machine().driver_data<cgenie_state>();
163   cgenie_state *state = space.machine().driver_data<cgenie_state>();
164164   state->m_crt.idx = data & 15;
165165}
166166
r17963r17964
169169***************************************************************************/
170170 READ8_HANDLER ( cgenie_register_r )
171171{
172   cgenie_state *state = space->machine().driver_data<cgenie_state>();
173   return cgenie_get_register(space->machine(), state->m_crt.idx);
172   cgenie_state *state = space.machine().driver_data<cgenie_state>();
173   return cgenie_get_register(space.machine(), state->m_crt.idx);
174174}
175175
176176/***************************************************************************
r17963r17964
222222***************************************************************************/
223223 READ8_HANDLER ( cgenie_index_r )
224224{
225   cgenie_state *state = space->machine().driver_data<cgenie_state>();
225   cgenie_state *state = space.machine().driver_data<cgenie_state>();
226226   return state->m_crt.idx;
227227}
228228
trunk/src/mess/video/isa_svga_tseng.c
r17963r17964
5757//-------------------------------------------------
5858//  device_start - device-specific startup
5959//-------------------------------------------------
60static READ8_HANDLER( input_port_0_r ) { return 0xff; } //return space->machine().root_device().ioport("IN0")->read(); }
60static READ8_HANDLER( input_port_0_r ) { return 0xff; } //return space.machine().root_device().ioport("IN0")->read(); }
6161
6262void isa8_svga_et4k_device::device_start()
6363{
trunk/src/mess/video/x68k.c
r17963r17964
377377 */
378378WRITE16_HANDLER( x68k_crtc_w )
379379{
380   x68k_state *state = space->machine().driver_data<x68k_state>();
380   x68k_state *state = space.machine().driver_data<x68k_state>();
381381   COMBINE_DATA(state->m_crtc.reg+offset);
382382   switch(offset)
383383   {
r17963r17964
390390   case 6:
391391   case 7:
392392   case 8:
393      x68k_crtc_refresh_mode(space->machine());
393      x68k_crtc_refresh_mode(space.machine());
394394      break;
395395   case 9:  // CRTC raster IRQ (GPIP6)
396396      {
397397         attotime irq_time;
398         irq_time = space->machine().primary_screen->time_until_pos((data) / state->m_crtc.vmultiple,2);
398         irq_time = space.machine().primary_screen->time_until_pos((data) / state->m_crtc.vmultiple,2);
399399
400400         if(irq_time.as_double() > 0)
401401            state->m_raster_irq->adjust(irq_time, (data) / state->m_crtc.vmultiple);
r17963r17964
442442            if(data & 0x0400)
443443                state->m_crtc.interlace = 1;
444444        }*/
445      x68k_crtc_refresh_mode(space->machine());
445      x68k_crtc_refresh_mode(space.machine());
446446      break;
447447   case 576:  // operation register
448448      state->m_crtc.operation = data;
449449      if(data & 0x08)  // text screen raster copy
450450      {
451451         x68k_crtc_text_copy(state, (state->m_crtc.reg[22] & 0xff00) >> 8,(state->m_crtc.reg[22] & 0x00ff));
452         space->machine().scheduler().timer_set(attotime::from_msec(1), FUNC(x68k_crtc_operation_end), 0x02);  // time taken to do operation is a complete guess.
452         space.machine().scheduler().timer_set(attotime::from_msec(1), FUNC(x68k_crtc_operation_end), 0x02);  // time taken to do operation is a complete guess.
453453      }
454454      if(data & 0x02)  // high-speed graphic screen clear
455455      {
r17963r17964
457457            memset(state->m_gvram32,0,0x40000);
458458         else
459459            memset(state->m_gvram16,0,0x40000);
460         space->machine().scheduler().timer_set(attotime::from_msec(10), FUNC(x68k_crtc_operation_end), 0x02);  // time taken to do operation is a complete guess.
460         space.machine().scheduler().timer_set(attotime::from_msec(10), FUNC(x68k_crtc_operation_end), 0x02);  // time taken to do operation is a complete guess.
461461      }
462462      break;
463463   }
464//  logerror("CRTC: [%08x] Wrote %04x to CRTC register %i\n",space->machine().device("maincpu")->safe_pc(),data,offset);
464//  logerror("CRTC: [%08x] Wrote %04x to CRTC register %i\n",space.machine().device("maincpu")->safe_pc(),data,offset);
465465}
466466
467467READ16_HANDLER( x68k_crtc_r )
468468{
469   x68k_state *state = space->machine().driver_data<x68k_state>();
469   x68k_state *state = space.machine().driver_data<x68k_state>();
470470#if 0
471471   switch(offset)
472472   {
r17963r17964
478478
479479   if(offset < 24)
480480   {
481//      logerror("CRTC: [%08x] Read %04x from CRTC register %i\n",space->machine().device("maincpu")->safe_pc(),state->m_crtc.reg[offset],offset);
481//      logerror("CRTC: [%08x] Read %04x from CRTC register %i\n",space.machine().device("maincpu")->safe_pc(),state->m_crtc.reg[offset],offset);
482482      switch(offset)
483483      {
484484      case 9:
r17963r17964
507507
508508WRITE16_HANDLER( x68k_gvram_w )
509509{
510   x68k_state *state = space->machine().driver_data<x68k_state>();
510   x68k_state *state = space.machine().driver_data<x68k_state>();
511511   UINT16* gvram;
512512//  int xloc,yloc,pageoffset;
513513   /*
r17963r17964
580580
581581WRITE16_HANDLER( x68k_tvram_w )
582582{
583   x68k_state *state = space->machine().driver_data<x68k_state>();
583   x68k_state *state = space.machine().driver_data<x68k_state>();
584584   UINT16* tvram;
585585   UINT16 text_mask;
586586
r17963r17964
617617
618618READ16_HANDLER( x68k_gvram_r )
619619{
620   x68k_state *state = space->machine().driver_data<x68k_state>();
620   x68k_state *state = space.machine().driver_data<x68k_state>();
621621   const UINT16* gvram;
622622   UINT16 ret = 0;
623623
r17963r17964
665665
666666READ16_HANDLER( x68k_tvram_r )
667667{
668   x68k_state *state = space->machine().driver_data<x68k_state>();
668   x68k_state *state = space.machine().driver_data<x68k_state>();
669669   const UINT16* tvram;
670670
671671   if(state->m_is_32bit)
r17963r17964
726726
727727WRITE16_HANDLER( x68k_spritereg_w )
728728{
729   x68k_state *state = space->machine().driver_data<x68k_state>();
729   x68k_state *state = space.machine().driver_data<x68k_state>();
730730   COMBINE_DATA(state->m_spritereg+offset);
731731   switch(offset)
732732   {
r17963r17964
775775
776776READ16_HANDLER( x68k_spritereg_r )
777777{
778   x68k_state *state = space->machine().driver_data<x68k_state>();
778   x68k_state *state = space.machine().driver_data<x68k_state>();
779779   if(offset >= 0x400 && offset < 0x404)
780780      return state->m_spritereg[offset] & 0x3ff;
781781   return state->m_spritereg[offset];
r17963r17964
783783
784784WRITE16_HANDLER( x68k_spriteram_w )
785785{
786   x68k_state *state = space->machine().driver_data<x68k_state>();
786   x68k_state *state = space.machine().driver_data<x68k_state>();
787787   COMBINE_DATA(state->m_spriteram+offset);
788788   state->m_video.tile8_dirty[offset / 16] = 1;
789789   state->m_video.tile16_dirty[offset / 64] = 1;
r17963r17964
808808
809809READ16_HANDLER( x68k_spriteram_r )
810810{
811   x68k_state *state = space->machine().driver_data<x68k_state>();
811   x68k_state *state = space.machine().driver_data<x68k_state>();
812812   return state->m_spriteram[offset];
813813}
814814
trunk/src/mess/video/kramermc.c
r17963r17964
3030SCREEN_UPDATE_IND16( kramermc )
3131{
3232   int x,y;
33   address_space *space = screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
33   address_space &space = *screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
3434
3535   for(y = 0; y < 16; y++ )
3636   {
3737      for(x = 0; x < 64; x++ )
3838      {
39         int code = space->read_byte(KRAMERMC_VIDEO_MEMORY + x + y*64);
39         int code = space.read_byte(KRAMERMC_VIDEO_MEMORY + x + y*64);
4040         drawgfx_opaque(bitmap, cliprect, screen.machine().gfx[0],  code , 0, 0,0, x*8,y*8);
4141      }
4242   }
trunk/src/mess/video/oric.c
r17963r17964
6868   oric_state *state = machine.driver_data<oric_state>();
6969   /* attribute */
7070   UINT8 attribute = c & 0x03f;
71   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
71   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
7272
7373   switch ((attribute>>3) & 0x03)
7474   {
r17963r17964
115115            if (state->m_ram)
116116               state->m_vh_state.char_base = state->m_ram + (offs_t)0x09800;
117117            else
118               state->m_vh_state.char_base = (UINT8 *)space->get_read_ptr(0x09800);
118               state->m_vh_state.char_base = (UINT8 *)space.get_read_ptr(0x09800);
119119         }
120120         else
121121         {
r17963r17964
124124            if (state->m_ram)
125125               state->m_vh_state.char_base = state->m_ram + (offs_t)0x0b400;
126126            else
127               state->m_vh_state.char_base = (UINT8 *)space->get_read_ptr(0x0b400);
127               state->m_vh_state.char_base = (UINT8 *)space.get_read_ptr(0x0b400);
128128         }
129129         /* changing the mode also changes the position of the standard charset and alternative charset */
130130         oric_refresh_charset(state);
trunk/src/mess/video/gf4500.c
r17963r17964
9494   }
9595   if ((offset < (GF4500_FRAMEBUF_OFFSET / 4)) || (offset >= ((GF4500_FRAMEBUF_OFFSET + (321 * 240 * 2)) / 4)))
9696   {
97      verboselog( space->machine(), 9, "(GFO) %08X -> %08X\n", 0x34000000 + (offset << 2), data);
97      verboselog( space.machine(), 9, "(GFO) %08X -> %08X\n", 0x34000000 + (offset << 2), data);
9898   }
9999   return data;
100100}
r17963r17964
104104   COMBINE_DATA(&gf4500.data[offset]);
105105   if ((offset < (GF4500_FRAMEBUF_OFFSET / 4)) || (offset >= ((GF4500_FRAMEBUF_OFFSET + (321 * 240 * 2)) / 4)))
106106   {
107      verboselog( space->machine(), 9, "(GFO) %08X <- %08X\n", 0x34000000 + (offset << 2), data);
107      verboselog( space.machine(), 9, "(GFO) %08X <- %08X\n", 0x34000000 + (offset << 2), data);
108108   }
109109   switch (offset)
110110   {
trunk/src/mess/video/pc1403.c
r17963r17964
5252
5353READ8_HANDLER(pc1403_lcd_read)
5454{
55   pc1403_state *state = space->machine().driver_data<pc1403_state>();
55   pc1403_state *state = space.machine().driver_data<pc1403_state>();
5656   return state->m_reg[offset];
5757}
5858
5959WRITE8_HANDLER(pc1403_lcd_write)
6060{
61   pc1403_state *state = space->machine().driver_data<pc1403_state>();
61   pc1403_state *state = space.machine().driver_data<pc1403_state>();
6262   state->m_reg[offset]=data;
6363}
6464
trunk/src/mess/video/irisha.c
r17963r17964
2020   UINT8 code1; //, code2;
2121   UINT8 col;
2222   int y, x, b;
23   address_space *space = screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
23   address_space &space = *screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
2424
2525   // draw image
2626   for (y = 0; y < 200; y++)
2727   {
2828      for (x = 0; x < 40; x++)
2929      {
30         code1 = space->read_byte(0xe000 + x + y * 40);
31//          code2 = space->read_byte(0xc000 + x + y * 40);
30         code1 = space.read_byte(0xe000 + x + y * 40);
31//          code2 = space.read_byte(0xc000 + x + y * 40);
3232         for (b = 0; b < 8; b++)
3333         {
3434            col = ((code1 >> b) & 0x01);
trunk/src/mess/video/pc_t1t.c
r17963r17964
771771   switch( offset )
772772   {
773773      case 0: case 2: case 4: case 6:
774         mc6845 = space->machine().device<mc6845_device>(T1000_MC6845_NAME);
775         mc6845->address_w( *space, offset, data );
774         mc6845 = space.machine().device<mc6845_device>(T1000_MC6845_NAME);
775         mc6845->address_w( space, offset, data );
776776         break;
777777      case 1: case 3: case 5: case 7:
778         mc6845 = space->machine().device<mc6845_device>(T1000_MC6845_NAME);
779         mc6845->register_w( *space, offset, data );
778         mc6845 = space.machine().device<mc6845_device>(T1000_MC6845_NAME);
779         mc6845->register_w( space, offset, data );
780780         break;
781781      case 8:
782782         pc_t1t_mode_control_w(data);
r17963r17964
798798         pc_t1t_vga_data_w(data);
799799         break;
800800      case 15:
801         pc_t1t_bank_w(space->machine(), data);
801         pc_t1t_bank_w(space.machine(), data);
802802         break;
803803    }
804804}
r17963r17964
811811   switch( offset )
812812   {
813813      case 0: case 4:
814         mc6845 = space->machine().device<mc6845_device>(T1000_MC6845_NAME);
815         mc6845->address_w( *space, offset, data );
814         mc6845 = space.machine().device<mc6845_device>(T1000_MC6845_NAME);
815         mc6845->address_w( space, offset, data );
816816         break;
817817      case 1: case 5:
818         mc6845 = space->machine().device<mc6845_device>(T1000_MC6845_NAME);
819         mc6845->register_w( *space, offset, data );
818         mc6845 = space.machine().device<mc6845_device>(T1000_MC6845_NAME);
819         mc6845->register_w( space, offset, data );
820820         break;
821821      case 10:
822822         if ( pcjr.address_data_ff & 0x01 )
823823         {
824            pc_pcjr_vga_data_w( space->machine(), data );
824            pc_pcjr_vga_data_w( space.machine(), data );
825825         }
826826         else
827827         {
r17963r17964
835835      case 12:
836836         break;
837837      case 15:
838         pc_pcjr_bank_w(space->machine(), data);
838         pc_pcjr_bank_w(space.machine(), data);
839839         break;
840840
841841      default:
r17963r17964
856856         break;
857857
858858      case 1: case 3: case 5: case 7:
859         mc6845 = space->machine().device<mc6845_device>(T1000_MC6845_NAME);
860         data = mc6845->register_r( *space, offset );
859         mc6845 = space.machine().device<mc6845_device>(T1000_MC6845_NAME);
860         data = mc6845->register_r( space, offset );
861861         break;
862862
863863      case 8:
r17963r17964
922922static VIDEO_START( pc_t1t )
923923{
924924   int buswidth;
925   address_space *space = machine.firstcpu->space(AS_PROGRAM);
925   address_space &space = *machine.firstcpu->space(AS_PROGRAM);
926926   address_space *spaceio = machine.firstcpu->space(AS_IO);
927927
928928   pcjr.chr_gen = machine.root_device().memregion("gfx1")->base();
r17963r17964
934934   switch(buswidth)
935935   {
936936      case 8:
937         space->install_legacy_readwrite_handler(0xb8000, 0xbffff, FUNC(pc_t1t_videoram_r), FUNC(pc_t1t_videoram_w) );
937         space.install_legacy_readwrite_handler(0xb8000, 0xbffff, FUNC(pc_t1t_videoram_r), FUNC(pc_t1t_videoram_w) );
938938         spaceio->install_legacy_readwrite_handler(0x3d0, 0x3df, FUNC(pc_T1T_r),FUNC(pc_T1T_w) );
939939         break;
940940
941941      case 16:
942         space->install_legacy_readwrite_handler(0xb8000, 0xbffff, FUNC(pc_t1t_videoram_r), FUNC(pc_t1t_videoram_w), 0xffff );
942         space.install_legacy_readwrite_handler(0xb8000, 0xbffff, FUNC(pc_t1t_videoram_r), FUNC(pc_t1t_videoram_w), 0xffff );
943943         spaceio->install_legacy_readwrite_handler(0x3d0, 0x3df, FUNC(pc_T1T_r),FUNC(pc_T1T_w), 0xffff );
944944         break;
945945
trunk/src/mess/video/a7800.c
r17963r17964
2828
2929#define TRIGGER_HSYNC   64717
3030
31#define READ_MEM(x) space->read_byte(x)
31#define READ_MEM(x) space.read_byte(x)
3232
3333/********** Maria ***********/
3434
r17963r17964
8686static void maria_draw_scanline(running_machine &machine)
8787{
8888   a7800_state *state = machine.driver_data<a7800_state>();
89   address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
89   address_space& space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
9090   unsigned int graph_adr,data_addr;
9191   int width,hpos,pal,mode,ind;
9292   unsigned int dl;
r17963r17964
321321   a7800_state *state = timer.machine().driver_data<a7800_state>();
322322   int frame_scanline;
323323   UINT8 *ROM = timer.machine().root_device().memregion("maincpu")->base();
324   address_space* space = timer.machine().device("maincpu")->memory().space(AS_PROGRAM);
324   address_space& space = *timer.machine().device("maincpu")->memory().space(AS_PROGRAM);
325325
326326   state->m_maria_scanline++;
327327
trunk/src/mess/video/pc_aga.c
r17963r17964
1212#include "video/cgapal.h"
1313
1414
15#define CGA_MONITOR      (space->machine().root_device().ioport("VIDEO")->read() & 0x1C)
15#define CGA_MONITOR      (space.machine().root_device().ioport("VIDEO")->read() & 0x1C)
1616#define CGA_MONITOR_RGB         0x00   /* Colour RGB */
1717#define CGA_MONITOR_MONO      0x04   /* Greyscale RGB */
1818#define CGA_MONITOR_COMPOSITE   0x08   /* Colour composite */
r17963r17964
496496   UINT8 data = 0xFF;
497497
498498   if ( aga.mode == AGA_MONO ) {
499      mc6845_device *mc6845 = space->machine().device<mc6845_device>(AGA_MC6845_NAME);
499      mc6845_device *mc6845 = space.machine().device<mc6845_device>(AGA_MC6845_NAME);
500500      switch( offset )
501501      {
502502      case 0: case 2: case 4: case 6:
503503         /* return last written mc6845 address value here? */
504504         break;
505505      case 1: case 3: case 5: case 7:
506         data = mc6845->register_r(*space, offset);
506         data = mc6845->register_r(space, offset);
507507         break;
508508      case 10:
509         data = (space->machine().root_device().ioport("IN0")->read() & 0x80 ) | 0x08 | aga.mda_status;
509         data = (space.machine().root_device().ioport("IN0")->read() & 0x80 ) | 0x08 | aga.mda_status;
510510         aga.mda_status ^= 0x01;
511511         break;
512512      /* 12, 13, 14  are the LPT1 ports */
r17963r17964
518518static WRITE8_HANDLER ( pc_aga_mda_w )
519519{
520520   if ( aga.mode == AGA_MONO ) {
521      mc6845_device *mc6845 = space->machine().device<mc6845_device>(AGA_MC6845_NAME);
521      mc6845_device *mc6845 = space.machine().device<mc6845_device>(AGA_MC6845_NAME);
522522      switch( offset )
523523      {
524524         case 0: case 2: case 4: case 6:
525            mc6845->address_w( *space, offset, data );
525            mc6845->address_w( space, offset, data );
526526            break;
527527         case 1: case 3: case 5: case 7:
528            mc6845->register_w( *space, offset, data );
528            mc6845->register_w( space, offset, data );
529529            break;
530530         case 8:
531531            aga.mda_mode_control = data;
r17963r17964
551551   UINT8 data = 0xFF;
552552
553553   if ( aga.mode == AGA_COLOR ) {
554      mc6845_device *mc6845 = space->machine().device<mc6845_device>(AGA_MC6845_NAME);
554      mc6845_device *mc6845 = space.machine().device<mc6845_device>(AGA_MC6845_NAME);
555555      switch( offset ) {
556556      case 0: case 2: case 4: case 6:
557557         /* return last written mc6845 address value here? */
558558         break;
559559      case 1: case 3: case 5: case 7:
560         data = mc6845->register_r( *space, offset);
560         data = mc6845->register_r( space, offset);
561561         break;
562562      case 10:
563563         data = aga.vsync | ( ( data & 0x40 ) >> 4 ) | aga.hsync;
r17963r17964
597597static WRITE8_HANDLER ( pc_aga_cga_w )
598598{
599599   if ( aga.mode == AGA_COLOR ) {
600      mc6845_device *mc6845 = space->machine().device<mc6845_device>(AGA_MC6845_NAME);
600      mc6845_device *mc6845 = space.machine().device<mc6845_device>(AGA_MC6845_NAME);
601601
602602      switch(offset) {
603603      case 0: case 2: case 4: case 6:
604         mc6845->address_w( *space, offset, data );
604         mc6845->address_w( space, offset, data );
605605         break;
606606      case 1: case 3: case 5: case 7:
607         mc6845->register_w( *space, offset, data );
607         mc6845->register_w( space, offset, data );
608608         break;
609609      case 8:
610610         aga.cga_mode_control = data;
r17963r17964
689689
690690VIDEO_START( pc_aga )
691691{
692   address_space *space = machine.firstcpu->space(AS_PROGRAM);
692   address_space &space = *machine.firstcpu->space(AS_PROGRAM);
693693   address_space *spaceio = machine.firstcpu->space(AS_IO);
694694   int buswidth = machine.firstcpu->space_config(AS_PROGRAM)->m_databus_width;
695695   switch(buswidth)
696696   {
697697      case 8:
698         space->install_legacy_readwrite_handler(0xb0000, 0xbffff, FUNC(pc200_videoram_r), FUNC(pc200_videoram_w) );
698         space.install_legacy_readwrite_handler(0xb0000, 0xbffff, FUNC(pc200_videoram_r), FUNC(pc200_videoram_w) );
699699         spaceio->install_legacy_readwrite_handler(0x3b0, 0x3bf, FUNC(pc_aga_mda_r), FUNC(pc_aga_mda_w) );
700700         spaceio->install_legacy_readwrite_handler(0x3d0, 0x3df, FUNC(pc_aga_cga_r), FUNC(pc_aga_cga_w) );
701701         break;
702702
703703      case 16:
704         space->install_legacy_readwrite_handler(0xb0000, 0xbffff, FUNC(pc200_videoram_r), FUNC(pc200_videoram_w), 0xffff );
704         space.install_legacy_readwrite_handler(0xb0000, 0xbffff, FUNC(pc200_videoram_r), FUNC(pc200_videoram_w), 0xffff );
705705         spaceio->install_legacy_readwrite_handler(0x3b0, 0x3bf, FUNC(pc_aga_mda_r), FUNC(pc_aga_mda_w), 0xffff );
706706         spaceio->install_legacy_readwrite_handler(0x3d0, 0x3df, FUNC(pc_aga_cga_r), FUNC(pc_aga_cga_w), 0xffff );
707707         break;
r17963r17964
720720
721721VIDEO_START( pc200 )
722722{
723   address_space *space = machine.firstcpu->space(AS_PROGRAM);
723   address_space &space = *machine.firstcpu->space(AS_PROGRAM);
724724   address_space *spaceio = machine.firstcpu->space(AS_IO);
725725   int buswidth = machine.firstcpu->space_config(AS_PROGRAM)->m_databus_width;
726726   switch(buswidth)
727727   {
728728      case 8:
729         space->install_legacy_readwrite_handler(0xb0000, 0xbffff, FUNC(pc_aga_videoram_r), FUNC(pc_aga_videoram_w) );
729         space.install_legacy_readwrite_handler(0xb0000, 0xbffff, FUNC(pc_aga_videoram_r), FUNC(pc_aga_videoram_w) );
730730         spaceio->install_legacy_readwrite_handler(0x3b0, 0x3bf, FUNC(pc_aga_mda_r), FUNC(pc_aga_mda_w) );
731731         spaceio->install_legacy_readwrite_handler(0x3d0, 0x3df, FUNC(pc200_cga_r),  FUNC(pc200_cga_w) );
732732         break;
733733
734734      case 16:
735         space->install_legacy_readwrite_handler(0xb0000, 0xbffff, FUNC(pc_aga_videoram_r), FUNC(pc_aga_videoram_w), 0xffff );
735         space.install_legacy_readwrite_handler(0xb0000, 0xbffff, FUNC(pc_aga_videoram_r), FUNC(pc_aga_videoram_w), 0xffff );
736736         spaceio->install_legacy_readwrite_handler(0x3b0, 0x3bf, FUNC(pc_aga_mda_r), FUNC(pc_aga_mda_w), 0xffff );
737737         spaceio->install_legacy_readwrite_handler(0x3d0, 0x3df, FUNC(pc200_cga_r),  FUNC(pc200_cga_w), 0xffff );
738738         break;
r17963r17964
836836      if ((pc200.porte & 7) != (data & 7))
837837      {
838838         if (data & 4)
839            pc_aga_set_mode(space->machine(), AGA_OFF);
839            pc_aga_set_mode(space.machine(), AGA_OFF);
840840         else if (data & 2)
841            pc_aga_set_mode(space->machine(), AGA_MONO);
841            pc_aga_set_mode(space.machine(), AGA_MONO);
842842         else
843            pc_aga_set_mode(space->machine(), AGA_COLOR);
843            pc_aga_set_mode(space.machine(), AGA_COLOR);
844844      }
845845      pc200.porte = data;
846846      break;
r17963r17964
868868   case 0xe:
869869      // 0x20 low cga
870870      // 0x10 low special
871      result = space->machine().root_device().ioport("DSW0")->read() & 0x38;
871      result = space.machine().root_device().ioport("DSW0")->read() & 0x38;
872872      break;
873873
874874   default:
trunk/src/mess/video/intv.c
r17963r17964
729729
730730 READ8_MEMBER( intv_state::intvkbd_tms9927_r )
731731{
732   //intv_state *state = space->machine().driver_data<intv_state>();
732   //intv_state *state = space.machine().driver_data<intv_state>();
733733   UINT8 rv;
734734   switch (offset)
735735   {
r17963r17964
752752
753753WRITE8_MEMBER( intv_state::intvkbd_tms9927_w )
754754{
755   //intv_state *state = space->machine().driver_data<intv_state>();
755   //intv_state *state = space.machine().driver_data<intv_state>();
756756   switch (offset)
757757   {
758758      case 3:
trunk/src/mess/video/isa_vga.c
r17963r17964
5757//-------------------------------------------------
5858//  device_start - device-specific startup
5959//-------------------------------------------------
60static READ8_HANDLER( input_port_0_r ) { return 0xff; } //return space->machine().root_device().ioport("IN0")->read(); }
60static READ8_HANDLER( input_port_0_r ) { return 0xff; } //return space.machine().root_device().ioport("IN0")->read(); }
6161
6262void isa8_vga_device::device_start()
6363{
trunk/src/mess/video/iq151_grafik.c
r17963r17964
130130{
131131   if (offset >= 0xd0 && offset < 0xd4)
132132   {
133      address_space* space = machine().device("maincpu")->memory().space(AS_IO);
134      data = m_ppi8255->read(*space, offset & 3);
133      address_space& space = *machine().device("maincpu")->memory().space(AS_IO);
134      data = m_ppi8255->read(space, offset & 3);
135135   }
136136   else if (offset == 0xd4)
137137   {
r17963r17964
150150{
151151   if (offset >= 0xd0 && offset < 0xd4)
152152   {
153      address_space* space = machine().device("maincpu")->memory().space(AS_IO);
154      m_ppi8255->write(*space, offset & 3, data);
153      address_space& space = *machine().device("maincpu")->memory().space(AS_IO);
154      m_ppi8255->write(space, offset & 3, data);
155155   }
156156   else if (offset == 0xd4)
157157   {
trunk/src/mess/video/ti85.c
r17963r17964
150150SCREEN_UPDATE_IND16( ti85 )
151151{
152152   ti85_state *state = screen.machine().driver_data<ti85_state>();
153   address_space *space = state->m_maincpu->space(AS_PROGRAM);
153   address_space &space = *state->m_maincpu->space(AS_PROGRAM);
154154   int x,y,b;
155155   int brightnes;
156156   int lcdmem;
r17963r17964
170170
171171        for (y=0; y<state->m_ti_screen_y_size; y++)
172172      for (x=0; x<state->m_ti_screen_x_size; x++)
173         *(state->m_frames+(state->m_ti_number_of_frames-1)*state->m_ti_video_memory_size+y*state->m_ti_screen_x_size+x) = space->read_byte(lcdmem+y*state->m_ti_screen_x_size+x);
173         *(state->m_frames+(state->m_ti_number_of_frames-1)*state->m_ti_video_memory_size+y*state->m_ti_screen_x_size+x) = space.read_byte(lcdmem+y*state->m_ti_screen_x_size+x);
174174
175175       for (y=0; y<state->m_ti_screen_y_size; y++)
176176      for (x=0; x<state->m_ti_screen_x_size; x++)
trunk/src/mess/video/isa_svga_s3.c
r17963r17964
5858//-------------------------------------------------
5959//  device_start - device-specific startup
6060//-------------------------------------------------
61static READ8_HANDLER( input_port_0_r ) { return 0xff; } //return space->machine().root_device().ioport("IN0")->read(); }
61static READ8_HANDLER( input_port_0_r ) { return 0xff; } //return space.machine().root_device().ioport("IN0")->read(); }
6262
6363void isa16_svga_s3_device::device_start()
6464{
trunk/src/mess/video/pc1251.c
r17963r17964
9797
9898 READ8_HANDLER(pc1251_lcd_read)
9999{
100   pc1251_state *state = space->machine().driver_data<pc1251_state>();
100   pc1251_state *state = space.machine().driver_data<pc1251_state>();
101101   int data;
102102   data = state->m_reg[offset&0xff];
103103   logerror("pc1251 read %.3x %.2x\n",offset,data);
r17963r17964
106106
107107WRITE8_HANDLER(pc1251_lcd_write)
108108{
109   pc1251_state *state = space->machine().driver_data<pc1251_state>();
109   pc1251_state *state = space.machine().driver_data<pc1251_state>();
110110   logerror("pc1251 write %.3x %.2x\n",offset,data);
111111   state->m_reg[offset&0xff] = data;
112112}
trunk/src/mess/video/galaxy.c
r17963r17964
1616static TIMER_CALLBACK( gal_video )
1717{
1818   galaxy_state *state = machine.driver_data<galaxy_state>();
19   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
19   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
2020   int y, x;
2121   if (state->m_interrupts_enabled == TRUE)
2222   {
r17963r17964
3939            }
4040            else
4141            {
42               state->m_code = space->read_byte(addr) & 0xbf;
42               state->m_code = space.read_byte(addr) & 0xbf;
4343               state->m_code += (state->m_code & 0x80) >> 1;
4444               state->m_code = gfx[(state->m_code & 0x7f) +(dat << 7 )] ^ 0xff;
4545               state->m_first = 0;
r17963r17964
6868            }
6969            else
7070            {
71               state->m_code = space->read_byte(addr) ^ 0xff;
71               state->m_code = space.read_byte(addr) ^ 0xff;
7272               state->m_first = 0;
7373            }
7474            y = state->m_gal_cnt / 48 - 2;
r17963r17964
8181            }
8282            if ((x / 8 >= 11) && (x / 8 < 44))
8383            {
84               state->m_code = space->read_byte(state->m_start_addr + y * 32 + (state->m_gal_cnt % 48) - 11) ^ 0xff;
84               state->m_code = space.read_byte(state->m_start_addr + y * 32 + (state->m_gal_cnt % 48) - 11) ^ 0xff;
8585            }
8686            else
8787            {
trunk/src/mess/video/bbc.c
r17963r17964
611611 READ8_HANDLER (bbc_6845_r)
612612{
613613
614    mc6845_device *mc6845 = space->machine().device<mc6845_device>("mc6845");
614    mc6845_device *mc6845 = space.machine().device<mc6845_device>("mc6845");
615615
616616    switch (offset&1)
617617    {
618        case 0: return mc6845->status_r(*space,0); break;
619        case 1: return mc6845->register_r(*space,0); break;
618        case 0: return mc6845->status_r(space,0); break;
619        case 1: return mc6845->register_r(space,0); break;
620620    }
621621    return 0;
622622
trunk/src/mess/formats/ace_ace.c
r17963r17964
2727{
2828   cpu_device *cpu = image.device().machine().firstcpu;
2929   UINT8 *RAM = image.device().machine().root_device().memregion(cpu->tag())->base();
30   address_space *space = cpu->space(AS_PROGRAM);
30   address_space &space = *cpu->space(AS_PROGRAM);
3131   unsigned char ace_repeat, ace_byte, loop;
3232   int done=0, ace_index=0x2000;
3333
r17963r17964
108108
109109   /* Copy data to the address space */
110110   for (ace_index = 0x2000; ace_index < 0x8000; ace_index++)
111      space->write_byte(ace_index, RAM[ace_index]);
111      space.write_byte(ace_index, RAM[ace_index]);
112112
113113   return IMAGE_INIT_PASS;
114114}
trunk/src/mess/formats/m65_snqk.c
r17963r17964
219219{
220220   microtan_state *state = machine.driver_data<microtan_state>();
221221    UINT8 *RAM = state->memregion("maincpu")->base();
222    address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
222    address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
223223    via6522_device *via_0 = machine.device<via6522_device>("via6522_0");
224224    via6522_device *via_1 = machine.device<via6522_device>("via6522_1");
225225    device_t *ay8910 = machine.device("ay8910.1");
r17963r17964
278278
279279        /* first set of VIA6522 registers */
280280        for (i = 0; i < 16; i++ )
281            via_0->write(*space, i, snapshot_buff[base++]);
281            via_0->write(space, i, snapshot_buff[base++]);
282282
283283        /* second set of VIA6522 registers */
284284        for (i = 0; i < 16; i++ )
285            via_1->write(*space, i, snapshot_buff[base++]);
285            via_1->write(space, i, snapshot_buff[base++]);
286286
287287        /* microtan IO bff0-bfff */
288288        for (i = 0; i < 16; i++ )
289289        {
290290            RAM[0xbff0+i] = snapshot_buff[base++];
291291            if (i < 4)
292                state->microtan_bffx_w(*space, i, RAM[0xbff0+i]);
292                state->microtan_bffx_w(space, i, RAM[0xbff0+i]);
293293        }
294294
295        state->microtan_sound_w(*space, 0, snapshot_buff[base++]);
295        state->microtan_sound_w(space, 0, snapshot_buff[base++]);
296296        state->m_chunky_graphics = snapshot_buff[base++];
297297
298298        /* first set of AY8910 registers */
trunk/src/mess/formats/z80bin.c
r17963r17964
122122      autorun = image.device().machine().root_device().ioport("CONFIG")->read_safe(0xFF) & 1;
123123
124124      device_t *cpu = image.device().machine().device("maincpu");
125      address_space *space = image.device().machine().device("maincpu")->memory().space(AS_PROGRAM);
125      address_space &space = *image.device().machine().device("maincpu")->memory().space(AS_PROGRAM);
126126
127      space->write_word(0xa6, execute_address);         /* fix the EXEC command */
127      space.write_word(0xa6, execute_address);         /* fix the EXEC command */
128128
129129      if (autorun)
130130      {
131         space->write_word(0xa2, execute_address);      /* fix warm-start vector to get around some copy-protections */
131         space.write_word(0xa2, execute_address);      /* fix warm-start vector to get around some copy-protections */
132132         cpu->state().set_pc(execute_address);
133133      }
134134      else
135135      {
136         space->write_word(0xa2, 0x8517);
136         space.write_word(0xa2, 0x8517);
137137      }
138138   }
139139
r17963r17964
158158      /* check to see if autorun is on (I hate how this works) */
159159      autorun = image.device().machine().root_device().ioport("CONFIG")->read_safe(0xFF) & 1;
160160
161      address_space *space = image.device().machine().device("maincpu")->memory().space(AS_PROGRAM);
161      address_space &space = *image.device().machine().device("maincpu")->memory().space(AS_PROGRAM);
162162
163      if ((execute_address >= 0xc000) && (execute_address <= 0xdfff) && (space->read_byte(0xdffa) != 0xc3))
163      if ((execute_address >= 0xc000) && (execute_address <= 0xdfff) && (space.read_byte(0xdffa) != 0xc3))
164164         return IMAGE_INIT_FAIL;      /* can't run a program if the cartridge isn't in */
165165
166166      /* Since Exidy Basic is by Microsoft, it needs some preprocessing before it can be run.
r17963r17964
182182         };
183183
184184         for (i = 0; i < ARRAY_LENGTH(data); i++)
185            space->write_byte(0xf01f + i, data[i]);
185            space.write_byte(0xf01f + i, data[i]);
186186
187187         if (!autorun)
188            space->write_word(0xf028,0xc3dd);
188            space.write_word(0xf028,0xc3dd);
189189
190190         /* tell BASIC where program ends */
191         space->write_byte(0x1b7, end_address & 0xff);
192         space->write_byte(0x1b8, (end_address >> 8) & 0xff);
191         space.write_byte(0x1b7, end_address & 0xff);
192         space.write_byte(0x1b8, (end_address >> 8) & 0xff);
193193
194194         if ((execute_address != 0xc858) && autorun)
195            space->write_word(0xf028, execute_address);
195            space.write_word(0xf028, execute_address);
196196
197197         image.device().machine().device("maincpu")->state().set_pc(0xf01f);
198198      }
trunk/src/mess/formats/spec_snqk.c
r17963r17964
320320    UINT16 start, size, data, status;
321321    spectrum_state *state = machine.driver_data<spectrum_state>();
322322    device_t *cpu = machine.device("maincpu");
323    address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
323    address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
324324
325325    if (snapsize == SP_NEW_SIZE_16K || snapsize == SP_NEW_SIZE_48K)
326326    {
r17963r17964
415415    /* Memory dump */
416416    logerror("Loading %04X bytes of RAM at %04X\n", size, start);
417417    for (i = 0; i < size; i++)
418        space->write_byte(start + i, snapdata[SP_OFFSET + SP_NEW_HDR + i]);
418        space.write_byte(start + i, snapdata[SP_OFFSET + SP_NEW_HDR + i]);
419419
420420    /* Set border color */
421421    data = snapdata[SP_OFFSET + 34] & 0x07;
r17963r17964
520520    UINT16 data, addr;
521521    spectrum_state *state = machine.driver_data<spectrum_state>();
522522    device_t *cpu = machine.device("maincpu");
523    address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
523    address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
524524
525525    if ((snapsize != SNA48_SIZE) && (state->m_port_7ffd_data == -1))
526526    {
r17963r17964
606606        /* Memory dump */
607607        logerror("Loading %04X bytes of RAM at %04X\n", 3*SPECTRUM_BANK, BASE_RAM);
608608        for (i = 0; i < 3*SPECTRUM_BANK; i++)
609          space->write_byte(BASE_RAM + i, snapdata[SNA48_HDR + i]);
609          space.write_byte(BASE_RAM + i, snapdata[SNA48_HDR + i]);
610610
611611        /* Get PC from stack */
612612        addr = cpu->state().state_int(Z80_SP);
r17963r17964
616616        else
617617          logerror("Fetching PC from the stack at SP:%04X\n", addr);
618618
619        data = (space->read_byte(addr + 1) << 8) | space->read_byte(addr + 0);
619        data = (space.read_byte(addr + 1) << 8) | space.read_byte(addr + 0);
620620        LOAD_REG(cpu, Z80_PC, data);
621621
622622#if 0
623        space->write_byte(addr + 0, 0); // It's been reported that zeroing these locations fixes the loading
624        space->write_byte(addr + 1, 0); // of a few images that were snapshot at a "wrong" instant
623        space.write_byte(addr + 0, 0); // It's been reported that zeroing these locations fixes the loading
624        space.write_byte(addr + 1, 0); // of a few images that were snapshot at a "wrong" instant
625625#endif
626626
627627        addr += 2;
r17963r17964
651651        logerror("Loading bank 2 from offset:0401B\n");
652652        logerror("Loading bank %d from offset:0801B\n", snapdata[SNA128_OFFSET + 2] & 0x07);
653653        for (i = 0; i < 3*SPECTRUM_BANK; i++)
654          space->write_byte(BASE_RAM + i, snapdata[SNA48_HDR + i]);
654          space.write_byte(BASE_RAM + i, snapdata[SNA48_HDR + i]);
655655
656656        bank_offset = SNA48_SIZE + SNA128_HDR;
657657        for (i = 0; i < 8; i++)
r17963r17964
663663                state->m_port_7ffd_data += i;
664664                spectrum_update_paging(machine);
665665                for (j = 0; j < SPECTRUM_BANK; j++)
666                    space->write_byte(j + 3*SPECTRUM_BANK, snapdata[bank_offset + j]);
666                    space.write_byte(j + 3*SPECTRUM_BANK, snapdata[bank_offset + j]);
667667                bank_offset += SPECTRUM_BANK;
668668            }
669669        }
r17963r17964
739739    UINT16 data;
740740    spectrum_state *state = machine.driver_data<spectrum_state>();
741741    device_t *cpu = machine.device("maincpu");
742    address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
742    address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
743743
744744    data = (snapdata[ACH_OFFSET +   0] << 8) | snapdata[ACH_OFFSET +   4];
745745    LOAD_REG(cpu, Z80_AF, data);
r17963r17964
804804    /* Memory dump */
805805    logerror("Loading %04X bytes of RAM at %04X\n", 3*SPECTRUM_BANK, BASE_RAM);
806806    for (i = 0; i < 3*SPECTRUM_BANK; i++)
807        space->write_byte(BASE_RAM + i, snapdata[ACH_HDR + SPECTRUM_BANK + i]);
807        space.write_byte(BASE_RAM + i, snapdata[ACH_HDR + SPECTRUM_BANK + i]);
808808
809809    /* Set border color */
810810    data = snapdata[ACH_OFFSET + 156] & 0x07;
r17963r17964
872872    UINT16 addr, data;
873873    spectrum_state *state = machine.driver_data<spectrum_state>();
874874    device_t *cpu = machine.device("maincpu");
875    address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
875    address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
876876
877877    data = snapdata[PRG_OFFSET +   0];
878878    if (data != 0x05)
r17963r17964
915915    /* Memory dump */
916916    logerror("Loading %04X bytes of RAM at %04X\n", 3*SPECTRUM_BANK, BASE_RAM);
917917    for (i = 0; i < 3*SPECTRUM_BANK; i++)
918        space->write_byte(BASE_RAM + i, snapdata[PRG_HDR + i]);
918        space.write_byte(BASE_RAM + i, snapdata[PRG_HDR + i]);
919919
920920    addr = (snapdata[PRG_OFFSET + 241] << 8) | snapdata[PRG_OFFSET + 240];
921921    if (addr < BASE_RAM || addr > 4*SPECTRUM_BANK - 6)
r17963r17964
923923    else
924924      logerror("Fetching registers IFF1/2, R, AF and PC from the stack at SP:%04X\n", addr);
925925
926    data = space->read_byte(addr + 0); // IFF1/2: (bit 2, 0=DI/1=EI)
926    data = space.read_byte(addr + 0); // IFF1/2: (bit 2, 0=DI/1=EI)
927927    LOAD_REG(cpu, Z80_IFF1, BIT(data, 2));
928928    LOAD_REG(cpu, Z80_IFF2, BIT(data, 2));
929929
r17963r17964
931931    machine.device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ0, intr);
932932    machine.device("maincpu")->execute().set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
933933
934    data = space->read_byte(addr + 1);
934    data = space.read_byte(addr + 1);
935935    LOAD_REG(cpu, Z80_R, data);
936936
937    data = (space->read_byte(addr + 3) << 8) | space->read_byte(addr + 2);
937    data = (space.read_byte(addr + 3) << 8) | space.read_byte(addr + 2);
938938    LOAD_REG(cpu, Z80_AF, data);
939939
940    data = (space->read_byte(addr + 5) << 8) | space->read_byte(addr + 4);
940    data = (space.read_byte(addr + 5) << 8) | space.read_byte(addr + 4);
941941    LOAD_REG(cpu, Z80_PC, data);
942942
943943#if 0
944    space->write_byte(addr + 0, 0); // It's been reported that zeroing these locations fixes the loading
945    space->write_byte(addr + 1, 0); // of a few images that were snapshot at a "wrong" instant
946    space->write_byte(addr + 2, 0);
947    space->write_byte(addr + 3, 0);
948    space->write_byte(addr + 4, 0);
949    space->write_byte(addr + 5, 0);
944    space.write_byte(addr + 0, 0); // It's been reported that zeroing these locations fixes the loading
945    space.write_byte(addr + 1, 0); // of a few images that were snapshot at a "wrong" instant
946    space.write_byte(addr + 2, 0);
947    space.write_byte(addr + 3, 0);
948    space.write_byte(addr + 4, 0);
949    space.write_byte(addr + 5, 0);
950950#endif
951951
952952    addr += 6;
r17963r17964
954954    cpu->state().set_state_int(Z80_SP, addr);
955955
956956    /* Set border color */
957    data = (space->read_byte(0x5c48) >> 3) & 0x07; // Get the current border color from BORDCR system variable.
957    data = (space.read_byte(0x5c48) >> 3) & 0x07; // Get the current border color from BORDCR system variable.
958958    state->m_port_fe_data = (state->m_port_fe_data & 0xf8) | data;
959959    spectrum_border_update(machine, data);
960960    logerror("Border color:%02X\n", data);
r17963r17964
10421042    UINT16 addr = 0, data;
10431043    spectrum_state *state = machine.driver_data<spectrum_state>();
10441044    device_t *cpu = machine.device("maincpu");
1045    address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1045    address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
10461046
10471047    data = (snapdata[PLUSD_OFFSET + 15] << 8) | snapdata[PLUSD_OFFSET + 14];
10481048    LOAD_REG(cpu, Z80_BC, data);
r17963r17964
10851085        /* Memory dump */
10861086        logerror("Loading %04X bytes of RAM at %04X\n", 3*SPECTRUM_BANK, BASE_RAM);
10871087        for (i = 0; i < 3*SPECTRUM_BANK; i++)
1088            space->write_byte(BASE_RAM + i, snapdata[PLUSD48_HDR + i]);
1088            space.write_byte(BASE_RAM + i, snapdata[PLUSD48_HDR + i]);
10891089    }
10901090    else
10911091    {
r17963r17964
11111111            };
11121112            logerror("Loading bank %d from offset:%05X\n", i, PLUSD128_HDR + i*SPECTRUM_BANK);
11131113            for (j = 0; j < SPECTRUM_BANK; j++)
1114                space->write_byte(j + addr, snapdata[j + PLUSD128_HDR + i*SPECTRUM_BANK]);
1114                space.write_byte(j + addr, snapdata[j + PLUSD128_HDR + i*SPECTRUM_BANK]);
11151115        }
11161116        state->m_port_7ffd_data = snapdata[PLUSD_OFFSET + 22];
11171117        logerror ("Port 7FFD:%02X\n", state->m_port_7ffd_data);
r17963r17964
11251125    else
11261126      logerror("Fetching registers IFF1/2, R, AF and PC from the stack at SP:%04X\n", addr);
11271127
1128    data = space->read_byte(addr + 0); // IFF1/2: (bit 2, 0=DI/1=EI)
1128    data = space.read_byte(addr + 0); // IFF1/2: (bit 2, 0=DI/1=EI)
11291129    LOAD_REG(cpu, Z80_IFF1, BIT(data, 2));
11301130    LOAD_REG(cpu, Z80_IFF2, BIT(data, 2));
11311131
r17963r17964
11331133    machine.device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ0, intr);
11341134    machine.device("maincpu")->execute().set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
11351135
1136    data = space->read_byte(addr + 1);
1136    data = space.read_byte(addr + 1);
11371137    LOAD_REG(cpu, Z80_R, data);
11381138
1139    data = (space->read_byte(addr + 3) << 8) | space->read_byte(addr + 2);
1139    data = (space.read_byte(addr + 3) << 8) | space.read_byte(addr + 2);
11401140    LOAD_REG(cpu, Z80_AF, data);
11411141
1142    data = (space->read_byte(addr + 5) << 8) | space->read_byte(addr + 4);
1142    data = (space.read_byte(addr + 5) << 8) | space.read_byte(addr + 4);
11431143    LOAD_REG(cpu, Z80_PC, data);
11441144
11451145#if 0
1146    space->write_byte(addr + 0, 0); // It's been reported that zeroing these locations fixes the loading
1147    space->write_byte(addr + 1, 0); // of a few images that were snapshot at a "wrong" instant
1148    space->write_byte(addr + 2, 0);
1149    space->write_byte(addr + 3, 0);
1150    space->write_byte(addr + 4, 0);
1151    space->write_byte(addr + 5, 0);
1146    space.write_byte(addr + 0, 0); // It's been reported that zeroing these locations fixes the loading
1147    space.write_byte(addr + 1, 0); // of a few images that were snapshot at a "wrong" instant
1148    space.write_byte(addr + 2, 0);
1149    space.write_byte(addr + 3, 0);
1150    space.write_byte(addr + 4, 0);
1151    space.write_byte(addr + 5, 0);
11521152#endif
11531153
11541154    addr += 6;
r17963r17964
11561156    cpu->state().set_state_int(Z80_SP, addr);
11571157
11581158    /* Set border color */
1159    data = (space->read_byte(0x5c48) >> 3) & 0x07; // Get the current border color from BORDCR system variable.
1159    data = (space.read_byte(0x5c48) >> 3) & 0x07; // Get the current border color from BORDCR system variable.
11601160    state->m_port_fe_data = (state->m_port_fe_data & 0xf8) | data;
11611161    spectrum_border_update(machine, data);
11621162    logerror("Border color:%02X\n", data);
r17963r17964
12101210    UINT16 data;
12111211    spectrum_state *state = machine.driver_data<spectrum_state>();
12121212    device_t *cpu = machine.device("maincpu");
1213    address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1213    address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
12141214
12151215    data = (snapdata[SEM_OFFSET +  1] << 8) | snapdata[SEM_OFFSET +  0];
12161216    LOAD_REG(cpu, Z80_AF, data);
r17963r17964
12731273    /* Memory dump */
12741274    logerror("Loading %04X bytes of RAM at %04X\n", 3*SPECTRUM_BANK, BASE_RAM);
12751275    for (i = 0; i < 3*SPECTRUM_BANK; i++)
1276        space->write_byte(BASE_RAM + i, snapdata[SEM_SIGNATURE + i]);
1276        space.write_byte(BASE_RAM + i, snapdata[SEM_SIGNATURE + i]);
12771277
12781278    /* Set border color */
1279    data = (space->read_byte(0x5c48) >> 3) & 0x07; // Get the current border color from BORDCR system variable.
1279    data = (space.read_byte(0x5c48) >> 3) & 0x07; // Get the current border color from BORDCR system variable.
12801280    state->m_port_fe_data = (state->m_port_fe_data & 0xf8) | data;
12811281    spectrum_border_update(machine, data);
12821282    logerror("Border color:%02X\n", data);
r17963r17964
13291329    UINT16 data;
13301330    spectrum_state *state = machine.driver_data<spectrum_state>();
13311331    device_t *cpu = machine.device("maincpu");
1332    address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1332    address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
13331333
13341334    data = (snapdata[SIT_OFFSET +  7] << 8) | snapdata[SIT_OFFSET +  6];
13351335    LOAD_REG(cpu, Z80_AF, data);
r17963r17964
13921392    logerror("Skipping the 16K ROM dump at offset:%04X\n", SIT_OFFSET + 28);
13931393    logerror("Loading %04X bytes of RAM at %04X\n", 3*SPECTRUM_BANK, BASE_RAM);
13941394    for (i = 0; i < 3*SPECTRUM_BANK; i++)
1395        space->write_byte(BASE_RAM + i, snapdata[SIT_HDR + SPECTRUM_BANK + i]);
1395        space.write_byte(BASE_RAM + i, snapdata[SIT_HDR + SPECTRUM_BANK + i]);
13961396
13971397    /* Set border color */
13981398    data = snapdata[SIT_OFFSET + 27] & 0x07;
r17963r17964
14591459    UINT16 data, mode;
14601460    spectrum_state *state = machine.driver_data<spectrum_state>();
14611461    device_t *cpu = machine.device("maincpu");
1462    address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1462    address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
14631463
14641464    logerror("Skipping last 132 bytes of the 16K ROM dump at offset:0000\n");
14651465
r17963r17964
15361536    /* Memory dump */
15371537    logerror("Loading %04X bytes of RAM at %04X\n", 3*SPECTRUM_BANK, BASE_RAM);
15381538    for (i = 0; i < 3*SPECTRUM_BANK; i++)
1539        space->write_byte(BASE_RAM + i, snapdata[132 + i]);
1539        space.write_byte(BASE_RAM + i, snapdata[132 + i]);
15401540
15411541    /* Set border color */
1542    data = (space->read_byte(0x5c48) >> 3) & 0x07; // Get the current border color from BORDCR system variable.
1542    data = (space.read_byte(0x5c48) >> 3) & 0x07; // Get the current border color from BORDCR system variable.
15431543    state->m_port_fe_data = (state->m_port_fe_data & 0xf8) | data;
15441544    spectrum_border_update(machine, data);
15451545    logerror("Border color:%02X\n", data);
r17963r17964
15911591    UINT16 data;
15921592    spectrum_state *state = machine.driver_data<spectrum_state>();
15931593    device_t *cpu = machine.device("maincpu");
1594    address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1594    address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
15951595
15961596    data = (snapdata[SNP_OFFSET +  1] << 8) | snapdata[SNP_OFFSET +  0];
15971597    LOAD_REG(cpu, Z80_AF, data);
r17963r17964
16541654    /* Memory dump */
16551655    logerror("Loading %04X bytes of RAM at %04X\n", 3*SPECTRUM_BANK, BASE_RAM);
16561656    for (i = 0; i < 3*SPECTRUM_BANK; i++)
1657        space->write_byte(BASE_RAM + i, snapdata[i]);
1657        space.write_byte(BASE_RAM + i, snapdata[i]);
16581658
16591659    /* Set border color */
16601660    data = snapdata[SNP_OFFSET +  2] & 0x07;
r17963r17964
17681768{
17691769    UINT8 counthi, countlo, compress, fill;
17701770    UINT16 block = 0, count, i, j, numbytes;
1771    address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1771    address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
17721772
17731773    i = SNX_HDR - 1;
17741774    numbytes = 0;
r17963r17964
17981798            fill = source[++i];
17991799            logerror("Dest:%04X  Filler:%02X\n", BASE_RAM + numbytes, fill);
18001800            for(j = 0; j < count; j++)
1801                space->write_byte(BASE_RAM + numbytes + j, fill);
1801                space.write_byte(BASE_RAM + numbytes + j, fill);
18021802            numbytes += count;
18031803        }
18041804        else
r17963r17964
18061806            logerror("Dest:%04X\n", BASE_RAM + numbytes);
18071807            j = 0;
18081808            while (j < count)
1809                space->write_byte(BASE_RAM + numbytes + j++, source[++i]);
1809                space.write_byte(BASE_RAM + numbytes + j++, source[++i]);
18101810            numbytes += count;
18111811        }
18121812    }
r17963r17964
18181818    UINT16 data, addr;
18191819    spectrum_state *state = machine.driver_data<spectrum_state>();
18201820    device_t *cpu = machine.device("maincpu");
1821    address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1821    address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
18221822
18231823    data = (snapdata[SNX_OFFSET +  4] << 8) | snapdata[SNX_OFFSET +  5];
18241824    if (data != 0x25)
r17963r17964
18931893    else
18941894      logerror("Fetching PC from the stack at SP:%04X\n", addr);
18951895
1896    LOAD_REG(cpu, Z80_PC, (space->read_byte(addr + 1) << 8) | space->read_byte(addr + 0));
1896    LOAD_REG(cpu, Z80_PC, (space.read_byte(addr + 1) << 8) | space.read_byte(addr + 0));
18971897
18981898#if 0
1899    space->write_byte(addr + 0, 0); // It's been reported that zeroing these locations fixes the loading
1900    space->write_byte(addr + 1, 0); // of a few images that were snapshot at a "wrong" instant
1899    space.write_byte(addr + 0, 0); // It's been reported that zeroing these locations fixes the loading
1900    space.write_byte(addr + 1, 0); // of a few images that were snapshot at a "wrong" instant
19011901#endif
19021902
19031903    addr += 2;
r17963r17964
19721972    UINT16 addr, data;
19731973    spectrum_state *state = machine.driver_data<spectrum_state>();
19741974    device_t *cpu = machine.device("maincpu");
1975    address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1975    address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
19761976
19771977    if (state->m_port_7ffd_data == -1)
19781978    {
r17963r17964
20632063        };
20642064        logerror("Loading bank %d from offset:%05X\n", banks[i], FRZ_HDR + i*SPECTRUM_BANK);
20652065        for (j = 0; j < SPECTRUM_BANK; j++)
2066            space->write_byte(j + addr, snapdata[j + FRZ_HDR + i*SPECTRUM_BANK]);
2066            space.write_byte(j + addr, snapdata[j + FRZ_HDR + i*SPECTRUM_BANK]);
20672067    }
20682068    state->m_port_7ffd_data = snapdata[FRZ_OFFSET +  1];
20692069    logerror ("Port 7FFD:%02X\n", state->m_port_7ffd_data);
r17963r17964
20712071    spectrum_update_paging(machine);
20722072
20732073    /* Set border color */
2074    data = (space->read_byte(0x5c48) >> 3) & 0x07; // Get the current border color from BORDCR system variable.
2074    data = (space.read_byte(0x5c48) >> 3) & 0x07; // Get the current border color from BORDCR system variable.
20752075    state->m_port_fe_data = (state->m_port_fe_data & 0xf8) | data;
20762076    spectrum_border_update(machine, data);
20772077    logerror("Border color:%02X\n", data);
r17963r17964
20832083{
20842084    UINT8 ch;
20852085    int i;
2086    address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
2086    address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
20872087
20882088    do
20892089    {
r17963r17964
21152115
21162116                for (i = 0; i < count; i++)
21172117                {
2118                    space->write_byte(dest, data);
2118                    space.write_byte(dest, data);
21192119                    dest++;
21202120                }
21212121            }
21222122            else
21232123            {
21242124                /* single 0x0ed */
2125                space->write_byte(dest, ch);
2125                space.write_byte(dest, ch);
21262126                dest++;
21272127                source++;
21282128                size--;
r17963r17964
21312131        else
21322132        {
21332133            /* not 0x0ed */
2134            space->write_byte(dest, ch);
2134            space.write_byte(dest, ch);
21352135            dest++;
21362136            source++;
21372137            size--;
r17963r17964
21942194    int i;
21952195    UINT8 lo, hi, data;
21962196    SPECTRUM_Z80_SNAPSHOT_TYPE z80_type;
2197    address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
2197    address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
21982198
21992199    z80_type = spectrum_identify_z80(snapdata, snapsize);
22002200
r17963r17964
23312331        {
23322332            logerror("Not compressed\n");   /* not compressed */
23332333            for (i = 0; i < 49152; i++)
2334                space->write_byte(i + 16384, snapdata[30 + i]);
2334                space.write_byte(i + 16384, snapdata[30 + i]);
23352335        }
23362336        else
23372337        {
r17963r17964
24122412
24132413                    /* not compressed */
24142414                    for (i = 0; i < 16384; i++)
2415                        space->write_byte(i + Dest, pSource[i]);
2415                        space.write_byte(i + Dest, pSource[i]);
24162416                }
24172417                else
24182418                {
r17963r17964
25202520void spectrum_setup_scr(running_machine &machine, UINT8 *quickdata, UINT32 quicksize)
25212521{
25222522    int i;
2523    address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
2523    address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
25242524
25252525    for (i = 0; i < quicksize; i++)
2526        space->write_byte(i + BASE_RAM, quickdata[i]);
2526        space.write_byte(i + BASE_RAM, quickdata[i]);
25272527
25282528    log_quickload(quicksize == SCR_SIZE ? "SCREEN$" : "SCREEN$ (Mono)", BASE_RAM, quicksize, 0, EXEC_NA);
25292529}
r17963r17964
25602560   UINT8 data;
25612561    UINT16 start, len;
25622562    spectrum_state *state = machine.driver_data<spectrum_state>();
2563    address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
2563    address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
25642564
25652565    start = (quickdata[RAW_OFFSET + 4] << 8) | quickdata[RAW_OFFSET + 3];
25662566    len   = (quickdata[RAW_OFFSET + 2] << 8) | quickdata[RAW_OFFSET + 1];
25672567
25682568    for (i = 0; i < len; i++)
2569        space->write_byte(i + start, quickdata[i + RAW_HDR]);
2569        space.write_byte(i + start, quickdata[i + RAW_HDR]);
25702570
25712571    /* Set border color */
2572    data = (space->read_byte(0x5c48) >> 3) & 0x07; // Get the current border color from BORDCR system variable.
2572    data = (space.read_byte(0x5c48) >> 3) & 0x07; // Get the current border color from BORDCR system variable.
25732573    state->m_port_fe_data = (state->m_port_fe_data & 0xf8) | data;
25742574    spectrum_border_update(machine, data);
25752575    logerror("Border color:%02X\n", data);
trunk/src/mess/formats/cbm_snqk.c
r17963r17964
3030   UINT32 bytesread;
3131   UINT16 address = 0;
3232   int i;
33   address_space *space = image.device().machine().firstcpu->space(AS_PROGRAM);
33   address_space &space = *image.device().machine().firstcpu->space(AS_PROGRAM);
3434
3535   if (!file_type)
3636      goto error;
r17963r17964
7979      goto error;
8080
8181   for (i = 0; i < snapshot_size; i++)
82      space->write_byte(address + i + offset, data[i]);
82      space.write_byte(address + i + offset, data[i]);
8383
8484   cbm_sethiaddress(image.device().machine(), address + snapshot_size);
8585   free(data);
r17963r17964
9393
9494static void cbm_quick_sethiaddress( running_machine &machine, UINT16 hiaddress )
9595{
96   address_space *space = machine.firstcpu->space(AS_PROGRAM);
96   address_space &space = *machine.firstcpu->space(AS_PROGRAM);
9797
98   space->write_byte(0x31, hiaddress & 0xff);
99   space->write_byte(0x2f, hiaddress & 0xff);
100   space->write_byte(0x2d, hiaddress & 0xff);
101   space->write_byte(0x32, hiaddress >> 8);
102   space->write_byte(0x30, hiaddress >> 8);
103   space->write_byte(0x2e, hiaddress >> 8);
98   space.write_byte(0x31, hiaddress & 0xff);
99   space.write_byte(0x2f, hiaddress & 0xff);
100   space.write_byte(0x2d, hiaddress & 0xff);
101   space.write_byte(0x32, hiaddress >> 8);
102   space.write_byte(0x30, hiaddress >> 8);
103   space.write_byte(0x2e, hiaddress >> 8);
104104}
105105
106106QUICKLOAD_LOAD( cbm_c16 )
r17963r17964
120120
121121static void cbm_pet_quick_sethiaddress( running_machine &machine, UINT16 hiaddress )
122122{
123   address_space *space = machine.firstcpu->space(AS_PROGRAM);
123   address_space &space = *machine.firstcpu->space(AS_PROGRAM);
124124
125   space->write_byte(0x2e, hiaddress & 0xff);
126   space->write_byte(0x2c, hiaddress & 0xff);
127   space->write_byte(0x2a, hiaddress & 0xff);
128   space->write_byte(0x2f, hiaddress >> 8);
129   space->write_byte(0x2d, hiaddress >> 8);
130   space->write_byte(0x2b, hiaddress >> 8);
125   space.write_byte(0x2e, hiaddress & 0xff);
126   space.write_byte(0x2c, hiaddress & 0xff);
127   space.write_byte(0x2a, hiaddress & 0xff);
128   space.write_byte(0x2f, hiaddress >> 8);
129   space.write_byte(0x2d, hiaddress >> 8);
130   space.write_byte(0x2b, hiaddress >> 8);
131131}
132132
133133QUICKLOAD_LOAD( cbm_pet )
r17963r17964
137137
138138static void cbm_pet1_quick_sethiaddress(running_machine &machine, UINT16 hiaddress)
139139{
140   address_space *space = machine.firstcpu->space(AS_PROGRAM);
140   address_space &space = *machine.firstcpu->space(AS_PROGRAM);
141141
142   space->write_byte(0x80, hiaddress & 0xff);
143   space->write_byte(0x7e, hiaddress & 0xff);
144   space->write_byte(0x7c, hiaddress & 0xff);
145   space->write_byte(0x81, hiaddress >> 8);
146   space->write_byte(0x7f, hiaddress >> 8);
147   space->write_byte(0x7d, hiaddress >> 8);
142   space.write_byte(0x80, hiaddress & 0xff);
143   space.write_byte(0x7e, hiaddress & 0xff);
144   space.write_byte(0x7c, hiaddress & 0xff);
145   space.write_byte(0x81, hiaddress >> 8);
146   space.write_byte(0x7f, hiaddress >> 8);
147   space.write_byte(0x7d, hiaddress >> 8);
148148}
149149
150150QUICKLOAD_LOAD( cbm_pet1 )
r17963r17964
154154
155155static void cbmb_quick_sethiaddress(running_machine &machine, UINT16 hiaddress)
156156{
157   address_space *space = machine.firstcpu->space(AS_PROGRAM);
157   address_space &space = *machine.firstcpu->space(AS_PROGRAM);
158158
159   space->write_byte(0xf0046, hiaddress & 0xff);
160   space->write_byte(0xf0047, hiaddress >> 8);
159   space.write_byte(0xf0046, hiaddress & 0xff);
160   space.write_byte(0xf0047, hiaddress >> 8);
161161}
162162
163163QUICKLOAD_LOAD( cbmb )
r17963r17964
172172
173173static void cbm_c65_quick_sethiaddress( running_machine &machine, UINT16 hiaddress )
174174{
175   address_space *space = machine.firstcpu->space(AS_PROGRAM);
175   address_space &space = *machine.firstcpu->space(AS_PROGRAM);
176176
177   space->write_byte(0x82, hiaddress & 0xff);
178   space->write_byte(0x83, hiaddress >> 8);
177   space.write_byte(0x82, hiaddress & 0xff);
178   space.write_byte(0x83, hiaddress >> 8);
179179}
180180
181181QUICKLOAD_LOAD( cbm_c65 )
trunk/src/mess/drivers/homelab.c
r17963r17964
646646
647647static QUICKLOAD_LOAD(homelab)
648648{
649   address_space *space = image.device().machine().device("maincpu")->memory().space(AS_PROGRAM);
649   address_space &space = *image.device().machine().device("maincpu")->memory().space(AS_PROGRAM);
650650   int i=0;
651651   UINT8 ch;
652652   UINT16 quick_addr;
r17963r17964
730730         image.message("%s: Unexpected EOF while writing byte to %04X", pgmname, (unsigned) j);
731731         return IMAGE_INIT_FAIL;
732732      }
733      space->write_byte(j, ch);
733      space.write_byte(j, ch);
734734   }
735735
736736   return IMAGE_INIT_PASS;
trunk/src/mess/drivers/vt520.c
r17963r17964
5252
5353void vt520_state::machine_reset()
5454{
55   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
55   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
5656   UINT8 *rom = memregion("maincpu")->base();
57   space->unmap_write(0x0000, 0xffff);
57   space.unmap_write(0x0000, 0xffff);
5858   membank("bank1")->set_base(rom + 0x70000);
5959}
6060
trunk/src/mess/drivers/pc9801.c
r17963r17964
26112611{
26122612   pc9801_state *state = device->machine().driver_data<pc9801_state>();
26132613   #if 0
2614   address_space *space = device->machine().device("maincpu")->memory().space(AS_PROGRAM);
2614   address_space &space = *device->machine().device("maincpu")->memory().space(AS_PROGRAM);
26152615   static UINT8 test;
26162616
26172617   if(device->machine().input().code_pressed_once(JOYCODE_BUTTON1))
r17963r17964
26202620   if(test)
26212621   {
26222622      popmessage("Go hack go");
2623      space->write_word(0x55e,space->machine().rand());
2623      space.write_word(0x55e,space.machine().rand());
26242624   }
26252625   #endif
26262626
trunk/src/mess/drivers/pc6001.c
r17963r17964
20682068static TIMER_DEVICE_CALLBACK(keyboard_callback)
20692069{
20702070   pc6001_state *state = timer.machine().driver_data<pc6001_state>();
2071   address_space *space = timer.machine().device("maincpu")->memory().space(AS_PROGRAM);
2071   address_space &space = *timer.machine().device("maincpu")->memory().space(AS_PROGRAM);
20722072   UINT32 key1 = timer.machine().root_device().ioport("key1")->read();
20732073   UINT32 key2 = timer.machine().root_device().ioport("key2")->read();
20742074   UINT32 key3 = timer.machine().root_device().ioport("key3")->read();
r17963r17964
20782078   {
20792079      if((key1 != state->m_old_key1) || (key2 != state->m_old_key2) || (key3 != state->m_old_key3))
20802080      {
2081         state->m_cur_keycode = check_keyboard_press(space->machine());
2081         state->m_cur_keycode = check_keyboard_press(space.machine());
20822082         if(IRQ_LOG) printf("KEY IRQ 0x02\n");
20832083         state->m_irq_vector = 0x02;
20842084         timer.machine().device("maincpu")->execute().set_input_line(0, ASSERT_LINE);
r17963r17964
20892089      #if 0
20902090      else /* joypad polling */
20912091      {
2092         state->m_cur_keycode = check_joy_press(space->machine());
2092         state->m_cur_keycode = check_joy_press(space.machine());
20932093         if(state->m_cur_keycode)
20942094         {
20952095            state->m_irq_vector = 0x16;
trunk/src/mess/drivers/pc88va.c
r17963r17964
650650
651651static void tsp_sprite_enable(running_machine &machine, UINT32 spr_offset, UINT8 sw_bit)
652652{
653   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
653   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
654654
655   space->write_word(spr_offset, space->read_word(spr_offset) & ~0x200);
656   space->write_word(spr_offset, space->read_word(spr_offset) | (sw_bit & 0x200));
655   space.write_word(spr_offset, space.read_word(spr_offset) & ~0x200);
656   space.write_word(spr_offset, space.read_word(spr_offset) | (sw_bit & 0x200));
657657}
658658
659659/* TODO: very preliminary, needs something showable first */
trunk/src/mess/drivers/pipbug.c
r17963r17964
9292
9393QUICKLOAD_LOAD( pipbug )
9494{
95   address_space *space = image.device().machine().device("maincpu")->memory().space(AS_PROGRAM);
95   address_space &space = *image.device().machine().device("maincpu")->memory().space(AS_PROGRAM);
9696   int i;
9797   int quick_addr = 0x0440;
9898   int exec_addr;
r17963r17964
149149
150150   for (i = quick_addr; i < quick_length; i++)
151151   {
152      space->write_byte(i, quick_data[i]);
152      space.write_byte(i, quick_data[i]);
153153   }
154154
155155   /* display a message about the loaded quickload */
trunk/src/mess/drivers/spc1000.c
r17963r17964
224224
225225void spc1000_state::machine_reset()
226226{
227   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
227   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
228228   UINT8 *mem = memregion("maincpu")->base();
229229   UINT8 *ram = machine().device<ram_device>(RAM_TAG)->pointer();
230230
231   space->install_read_bank(0x0000, 0x7fff, "bank1");
232   space->install_read_bank(0x8000, 0xffff, "bank3");
231   space.install_read_bank(0x0000, 0x7fff, "bank1");
232   space.install_read_bank(0x8000, 0xffff, "bank3");
233233
234   space->install_write_bank(0x0000, 0x7fff, "bank2");
235   space->install_write_bank(0x8000, 0xffff, "bank4");
234   space.install_write_bank(0x0000, 0x7fff, "bank2");
235   space.install_write_bank(0x8000, 0xffff, "bank4");
236236
237237   membank("bank1")->set_base(mem);
238238   membank("bank2")->set_base(ram);
trunk/src/mess/drivers/vii.c
r17963r17964
215215static void vii_blit(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect, UINT32 xoff, UINT32 yoff, UINT32 attr, UINT32 ctrl, UINT32 bitmap_addr, UINT16 tile)
216216{
217217   vii_state *state = machine.driver_data<vii_state>();
218   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
218   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
219219
220220   UINT32 h = 8 << ((attr & PAGE_TILE_HEIGHT_MASK) >> PAGE_TILE_HEIGHT_SHIFT);
221221   UINT32 w = 8 << ((attr & PAGE_TILE_WIDTH_MASK) >> PAGE_TILE_WIDTH_SHIFT);
r17963r17964
247247         bits <<= nc;
248248         if(nbits < nc)
249249         {
250            UINT16 b = space->read_word((m++ & 0x3fffff) << 1);
250            UINT16 b = space.read_word((m++ & 0x3fffff) << 1);
251251            b = (b << 8) | (b >> 8);
252252            bits |= b << (nc - nbits);
253253            nbits += 16;
r17963r17964
291291   UINT32 tilemap = regs[4];
292292   UINT32 palette_map = regs[5];
293293   UINT32 h, w, hn, wn;
294   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
294   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
295295
296296   if(!(ctrl & PAGE_ENABLE_MASK))
297297   {
r17963r17964
313313   {
314314      for(x0 = 0; x0 < wn; x0++)
315315      {
316         UINT16 tile = space->read_word((tilemap + x0 + wn * y0) << 1);
316         UINT16 tile = space.read_word((tilemap + x0 + wn * y0) << 1);
317317         UINT16 palette = 0;
318318         UINT32 xx, yy;
319319
r17963r17964
322322            continue;
323323         }
324324
325         palette = space->read_word((palette_map + (x0 + wn * y0) / 2) << 1);
325         palette = space.read_word((palette_map + (x0 + wn * y0) / 2) << 1);
326326         if(x0 & 1)
327327         {
328328            palette >>= 8;
r17963r17964
353353static void vii_blit_sprite(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect, int depth, UINT32 base_addr)
354354{
355355   vii_state *state = machine.driver_data<vii_state>();
356   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
356   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
357357   UINT16 tile, attr;
358358   INT16 x, y;
359359   UINT32 h, w;
360360   UINT32 bitmap_addr = 0x40 * state->m_video_regs[0x22];
361361
362   tile = space->read_word((base_addr + 0) << 1);
363   x = space->read_word((base_addr + 1) << 1);
364   y = space->read_word((base_addr + 2) << 1);
365   attr = space->read_word((base_addr + 3) << 1);
362   tile = space.read_word((base_addr + 0) << 1);
363   x = space.read_word((base_addr + 1) << 1);
364   y = space.read_word((base_addr + 2) << 1);
365   attr = space.read_word((base_addr + 3) << 1);
366366
367367   if(!tile)
368368   {
r17963r17964
404404
405405   for(n = 0; n < 256; n++)
406406   {
407      //if(space->read_word((0x2c00 + 4*n) << 1))
407      //if(space.read_word((0x2c00 + 4*n) << 1))
408408      {
409409         vii_blit_sprite(machine, bitmap, cliprect, depth, 0x2c00 + 4*n);
410410      }
trunk/src/mess/drivers/x1.c
r17963r17964
16311631   else if(offset >= 0x4000 && offset <= 0xffff)   { return m_gfx_bitmap_ram[offset-0x4000+(m_scrn_reg.gfx_bank*0xc000)]; }
16321632   else
16331633   {
1634      //logerror("(PC=%06x) Read i/o address %04x\n",space->device().safe_pc(),offset);
1634      //logerror("(PC=%06x) Read i/o address %04x\n",space.device().safe_pc(),offset);
16351635   }
16361636   return 0xff;
16371637}
r17963r17964
16741674   else if(offset >= 0x4000 && offset <= 0xffff)   { m_gfx_bitmap_ram[offset-0x4000+(m_scrn_reg.gfx_bank*0xc000)] = data; }
16751675   else
16761676   {
1677      //logerror("(PC=%06x) Write %02x at i/o address %04x\n",space->device().safe_pc(),data,offset);
1677      //logerror("(PC=%06x) Write %02x at i/o address %04x\n",space.device().safe_pc(),data,offset);
16781678   }
16791679}
16801680
r17963r17964
17211721   else if(offset >= 0x4000 && offset <= 0xffff)   { return m_gfx_bitmap_ram[offset-0x4000+(m_scrn_reg.gfx_bank*0xc000)]; }
17221722   else
17231723   {
1724      //logerror("(PC=%06x) Read i/o address %04x\n",space->device().safe_pc(),offset);
1724      //logerror("(PC=%06x) Read i/o address %04x\n",space.device().safe_pc(),offset);
17251725   }
17261726   return 0xff;
17271727}
r17963r17964
17771777   else if(offset >= 0x4000 && offset <= 0xffff)   { m_gfx_bitmap_ram[offset-0x4000+(m_scrn_reg.gfx_bank*0xc000)] = data; }
17781778   else
17791779   {
1780      //logerror("(PC=%06x) Write %02x at i/o address %04x\n",space->device().safe_pc(),data,offset);
1780      //logerror("(PC=%06x) Write %02x at i/o address %04x\n",space.device().safe_pc(),data,offset);
17811781   }
17821782}
17831783
r17963r17964
19161916   NULL      /* update address callback */
19171917};
19181918
1919static UINT8 memory_read_byte(address_space *space, offs_t address) { return space->read_byte(address); }
1920static void memory_write_byte(address_space *space, offs_t address, UINT8 data) { space->write_byte(address, data); }
1919static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
1920static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
19211921
19221922static Z80DMA_INTERFACE( x1_dma )
19231923{
r17963r17964
19381938
19391939static INPUT_CHANGED( ipl_reset )
19401940{
1941   //address_space *space = field.machine().device("x1_cpu")->memory().space(AS_PROGRAM);
1941   //address_space &space = *field.machine().device("x1_cpu")->memory().space(AS_PROGRAM);
19421942   x1_state *state = field.machine().driver_data<x1_state>();
19431943
19441944   state->m_x1_cpu->set_input_line(INPUT_LINE_RESET, newval ? CLEAR_LINE : ASSERT_LINE);
r17963r17964
24072407TIMER_DEVICE_CALLBACK(x1_keyboard_callback)
24082408{
24092409   x1_state *state = timer.machine().driver_data<x1_state>();
2410   address_space *space = timer.machine().device("x1_cpu")->memory().space(AS_PROGRAM);
2410   address_space &space = *timer.machine().device("x1_cpu")->memory().space(AS_PROGRAM);
24112411   UINT32 key1 = timer.machine().root_device().ioport("key1")->read();
24122412   UINT32 key2 = timer.machine().root_device().ioport("key2")->read();
24132413   UINT32 key3 = timer.machine().root_device().ioport("key3")->read();
r17963r17964
24222422      if((key1 != state->m_old_key1) || (key2 != state->m_old_key2) || (key3 != state->m_old_key3) || (key4 != state->m_old_key4) || (f_key != state->m_old_fkey))
24232423      {
24242424         // generate keyboard IRQ
2425         state->x1_sub_io_w(*space,0,0xe6);
2425         state->x1_sub_io_w(space,0,0xe6);
24262426         state->m_irq_vector = state->m_key_irq_vector;
24272427         state->m_key_irq_flag = 1;
24282428         timer.machine().device("x1_cpu")->execute().set_input_line(0,ASSERT_LINE);
trunk/src/mess/drivers/palm.c
r17963r17964
120120
121121void palm_state::machine_start()
122122{
123   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
124   space->install_read_bank (0x000000, machine().device<ram_device>(RAM_TAG)->size() - 1, machine().device<ram_device>(RAM_TAG)->size() - 1, 0, "bank1");
125   space->install_write_bank(0x000000, machine().device<ram_device>(RAM_TAG)->size() - 1, machine().device<ram_device>(RAM_TAG)->size() - 1, 0, "bank1");
123   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
124   space.install_read_bank (0x000000, machine().device<ram_device>(RAM_TAG)->size() - 1, machine().device<ram_device>(RAM_TAG)->size() - 1, 0, "bank1");
125   space.install_write_bank(0x000000, machine().device<ram_device>(RAM_TAG)->size() - 1, machine().device<ram_device>(RAM_TAG)->size() - 1, 0, "bank1");
126126   membank("bank1")->set_base(machine().device<ram_device>(RAM_TAG)->pointer());
127127
128128   save_item(NAME(m_port_f_latch));
trunk/src/mess/drivers/d6800.c
r17963r17964
319319
320320static QUICKLOAD_LOAD( d6800 )
321321{
322   address_space *space = image.device().machine().device("maincpu")->memory().space(AS_PROGRAM);
322   address_space &space = *image.device().machine().device("maincpu")->memory().space(AS_PROGRAM);
323323   int i;
324324   int quick_addr = 0x0200;
325325   int exec_addr = 0xc000;
r17963r17964
346346
347347   for (i = 0; i < quick_length; i++)
348348      if ((quick_addr + i) < 0x800)
349         space->write_byte(i + quick_addr, quick_data[i]);
349         space.write_byte(i + quick_addr, quick_data[i]);
350350
351351   /* display a message about the loaded quickload */
352352   image.message(" Quickload: size=%04X : start=%04X : end=%04X : exec=%04X",quick_length,quick_addr,quick_addr+quick_length,exec_addr);
trunk/src/mess/drivers/scorpion.c
r17963r17964
326326{
327327   UINT8 *messram = machine().device<ram_device>(RAM_TAG)->pointer();
328328   device_t *beta = machine().device(BETA_DISK_TAG);
329   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
329   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
330330
331331   m_ram_0000 = NULL;
332   space->install_read_bank(0x0000, 0x3fff, "bank1");
333   space->install_write_handler(0x0000, 0x3fff, write8_delegate(FUNC(scorpion_state::scorpion_0000_w),this));
332   space.install_read_bank(0x0000, 0x3fff, "bank1");
333   space.install_write_handler(0x0000, 0x3fff, write8_delegate(FUNC(scorpion_state::scorpion_0000_w),this));
334334
335335   betadisk_disable(beta);
336336   betadisk_clear_status(beta);
337   space->set_direct_update_handler(direct_update_delegate(FUNC(scorpion_state::scorpion_direct), this));
337   space.set_direct_update_handler(direct_update_delegate(FUNC(scorpion_state::scorpion_direct), this));
338338
339339   memset(messram,0,256*1024);
340340
trunk/src/mess/drivers/spectrum.c
r17963r17964
620620
621621DRIVER_INIT_MEMBER(spectrum_state,spectrum)
622622{
623   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
623   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
624624
625625   switch (machine().device<ram_device>(RAM_TAG)->size())
626626   {
627627       case 48*1024:
628      space->install_ram(0x8000, 0xffff, NULL); // Fall through
628      space.install_ram(0x8000, 0xffff, NULL); // Fall through
629629       case 16*1024:
630      space->install_ram(0x5b00, 0x7fff, NULL);
630      space.install_ram(0x5b00, 0x7fff, NULL);
631631   }
632632}
633633
634634MACHINE_RESET_MEMBER(spectrum_state,spectrum)
635635{
636   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
636   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
637637
638   space->set_direct_update_handler(direct_update_delegate(FUNC(spectrum_state::spectrum_direct), this));
638   space.set_direct_update_handler(direct_update_delegate(FUNC(spectrum_state::spectrum_direct), this));
639639
640640   m_port_7ffd_data = -1;
641641   m_port_1ffd_data = -1;
trunk/src/mess/drivers/astrocde.c
r17963r17964
1414#include "machine/ram.h"
1515
1616MACHINE_RESET( astrocde );
17void get_ram_expansion_settings(address_space *space, int &ram_expansion_installed, int &write_protect_on, int &expansion_ram_start, int &expansion_ram_end, int &shadow_ram_end);
17void get_ram_expansion_settings(address_space &space, int &ram_expansion_installed, int &write_protect_on, int &expansion_ram_start, int &expansion_ram_end, int &shadow_ram_end);
1818
1919/*************************************
2020 *
r17963r17964
9090static INPUT_CHANGED( set_write_protect )  // run when RAM expansion write protect switch is changed
9191{
9292   int ram_expansion_installed = 0, write_protect_on = 0, expansion_ram_start = 0, expansion_ram_end = 0, shadow_ram_end = 0;
93   address_space *space = field.machine().device("maincpu")->memory().space(AS_PROGRAM);
93   address_space &space = *field.machine().device("maincpu")->memory().space(AS_PROGRAM);
9494   UINT8 *expram = field.machine().device<ram_device>("ram_tag")->pointer();
9595
9696   get_ram_expansion_settings(space, ram_expansion_installed, write_protect_on, expansion_ram_start, expansion_ram_end, shadow_ram_end);  // passing by reference
r17963r17964
9999    {
100100        if (write_protect_on == 0)  // write protect off, so install memory normally
101101        {
102            space->install_ram(expansion_ram_start, expansion_ram_end, expram);
102            space.install_ram(expansion_ram_start, expansion_ram_end, expram);
103103            if (shadow_ram_end > expansion_ram_end)
104                space->install_ram(expansion_ram_end + 1, shadow_ram_end, expram);
104                space.install_ram(expansion_ram_end + 1, shadow_ram_end, expram);
105105        }
106106        else  // write protect on, so make memory read only
107107        {
108            space->nop_write(expansion_ram_start, expansion_ram_end);
108            space.nop_write(expansion_ram_start, expansion_ram_end);
109109        }
110110     }
111111}
r17963r17964
310310MACHINE_RESET( astrocde )
311311{
312312    int ram_expansion_installed = 0, write_protect_on = 0, expansion_ram_start = 0, expansion_ram_end = 0, shadow_ram_end = 0;
313    address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
313    address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
314314    UINT8 *expram = machine.device<ram_device>("ram_tag")->pointer();
315    space->unmap_readwrite(0x5000, 0xffff);  // unmap any previously installed expansion RAM
315    space.unmap_readwrite(0x5000, 0xffff);  // unmap any previously installed expansion RAM
316316
317317    get_ram_expansion_settings(space, ram_expansion_installed, write_protect_on, expansion_ram_start, expansion_ram_end, shadow_ram_end);  // passing by reference
318318
r17963r17964
320320    {
321321        if (write_protect_on == 0)  // write protect off, so install memory normally
322322        {
323            space->install_ram(expansion_ram_start, expansion_ram_end, expram);
323            space.install_ram(expansion_ram_start, expansion_ram_end, expram);
324324            if (shadow_ram_end > expansion_ram_end)
325                space->install_ram(expansion_ram_end + 1, shadow_ram_end, expram);
325                space.install_ram(expansion_ram_end + 1, shadow_ram_end, expram);
326326        }
327327        else  // write protect on, so make memory read only
328328        {
329            space->nop_write(expansion_ram_start, expansion_ram_end);
329            space.nop_write(expansion_ram_start, expansion_ram_end);
330330        }
331331     }
332332}
333333
334void get_ram_expansion_settings(address_space *space, int &ram_expansion_installed, int &write_protect_on, int &expansion_ram_start, int &expansion_ram_end, int &shadow_ram_end)
334void get_ram_expansion_settings(address_space &space, int &ram_expansion_installed, int &write_protect_on, int &expansion_ram_start, int &expansion_ram_end, int &shadow_ram_end)
335335{
336    if (space->machine().root_device().ioport("PROTECT")->read() == 0x01)
336    if (space.machine().root_device().ioport("PROTECT")->read() == 0x01)
337337        write_protect_on = 1;
338338    else
339339        write_protect_on = 0;
340340
341341    ram_expansion_installed = 1;
342342
343    switch(space->machine().root_device().ioport("CFG")->read())  // check RAM expansion configuration and set address ranges
343    switch(space.machine().root_device().ioport("CFG")->read())  // check RAM expansion configuration and set address ranges
344344    {
345345        case 0x00:  // No RAM Expansion
346346             ram_expansion_installed = 0;
trunk/src/mess/drivers/ip22.c
r17963r17964
270270      //verboselog(( machine, 2, "Serial 2 Command Transfer Read, 0x1fbd9838: %02x\n", 0x04 );
271271      return 0x00000004;
272272   case 0x40/4:
273      return kbdc8042_8_r(&space, 0);
273      return kbdc8042_8_r(space, 0);
274274   case 0x44/4:
275      return kbdc8042_8_r(&space, 4);
275      return kbdc8042_8_r(space, 4);
276276   case 0x58/4:
277277      return 0x20;   // chip rev 1, board rev 0, "Guinness" (Indy) => 0x01 for "Full House" (Indigo2)
278278   case 0x80/4:
r17963r17964
355355      }
356356      break;
357357   case 0x40/4:
358      kbdc8042_8_w(&space, 0, data);
358      kbdc8042_8_w(space, 0, data);
359359      break;
360360   case 0x44/4:
361      kbdc8042_8_w(&space, 4, data);
361      kbdc8042_8_w(space, 4, data);
362362      break;
363363   case 0x80/4:
364364   case 0x84/4:
r17963r17964
895895WRITE32_MEMBER(ip22_state::ip22_write_ram)
896896{
897897   // if banks 2 or 3 are enabled, do nothing, we don't support that much memory
898   if (sgi_mc_r(&space, 0xc8/4, 0xffffffff) & 0x10001000)
898   if (sgi_mc_r(space, 0xc8/4, 0xffffffff) & 0x10001000)
899899   {
900900      // a random perturbation so the memory test fails
901901      data ^= 0xffffffff;
902902   }
903903
904904   // if banks 0 or 1 have 2 membanks, also kill it, we only want 128 MB
905   if (sgi_mc_r(&space, 0xc0/4, 0xffffffff) & 0x40004000)
905   if (sgi_mc_r(space, 0xc0/4, 0xffffffff) & 0x40004000)
906906   {
907907      // a random perturbation so the memory test fails
908908      data ^= 0xffffffff;
r17963r17964
12391239   mips3drc_set_options(machine().device("maincpu"), MIPS3DRC_COMPATIBLE_OPTIONS | MIPS3DRC_CHECK_OVERFLOWS);
12401240}
12411241
1242static void dump_chain(address_space *space, UINT32 ch_base)
1242static void dump_chain(address_space &space, UINT32 ch_base)
12431243{
12441244
1245   printf("node: %08x %08x %08x (len = %x)\n", space->read_dword(ch_base), space->read_dword(ch_base+4), space->read_dword(ch_base+8), space->read_dword(ch_base+4) & 0x3fff);
1245   printf("node: %08x %08x %08x (len = %x)\n", space.read_dword(ch_base), space.read_dword(ch_base+4), space.read_dword(ch_base+8), space.read_dword(ch_base+4) & 0x3fff);
12461246
1247   if ((space->read_dword(ch_base+8) != 0) && !(space->read_dword(ch_base+4) & 0x80000000))
1247   if ((space.read_dword(ch_base+8) != 0) && !(space.read_dword(ch_base+4) & 0x80000000))
12481248   {
1249      dump_chain(space, space->read_dword(ch_base+8));
1249      dump_chain(space, space.read_dword(ch_base+8));
12501250   }
12511251}
12521252
r17963r17964
12601260static void scsi_irq(running_machine &machine, int state)
12611261{
12621262   ip22_state *drvstate = machine.driver_data<ip22_state>();
1263   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1263   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
12641264
12651265   if (state)
12661266   {
r17963r17964
12811281            words = drvstate->m_wd33c93->get_dma_count();
12821282            words /= 4;
12831283
1284            wptr = space->read_dword(drvstate->m_HPC3.nSCSI0Descriptor);
1284            wptr = space.read_dword(drvstate->m_HPC3.nSCSI0Descriptor);
12851285            drvstate->m_HPC3.nSCSI0Descriptor += words*4;
12861286            dptr = 0;
12871287
r17963r17964
12961296
12971297               while (words)
12981298               {
1299                  tmpword = space->read_dword(wptr);
1299                  tmpword = space.read_dword(wptr);
13001300
13011301                  if (drvstate->m_HPC3.nSCSI0DMACtrl & HPC3_DMACTRL_ENDIAN)
13021302                  {
r17963r17964
13321332
13331333                  while (twords)
13341334                  {
1335                     tmpword = space->read_dword(wptr);
1335                     tmpword = space.read_dword(wptr);
13361336
13371337                     if (drvstate->m_HPC3.nSCSI0DMACtrl & HPC3_DMACTRL_ENDIAN)
13381338                     {
r17963r17964
13641364            drvstate->m_wd33c93->clear_dma();
13651365#if 0
13661366            UINT32 dptr, tmpword;
1367            UINT32 bc = space->read_dword(drvstate->m_HPC3.nSCSI0Descriptor + 4);
1368            UINT32 rptr = space->read_dword(drvstate->m_HPC3.nSCSI0Descriptor);
1367            UINT32 bc = space.read_dword(drvstate->m_HPC3.nSCSI0Descriptor + 4);
1368            UINT32 rptr = space.read_dword(drvstate->m_HPC3.nSCSI0Descriptor);
13691369            int length = bc & 0x3fff;
13701370            int xie = (bc & 0x20000000) ? 1 : 0;
13711371            int eox = (bc & 0x80000000) ? 1 : 0;
r17963r17964
13801380               dptr = 0;
13811381               while (length > 0)
13821382               {
1383                  tmpword = space->read_dword(rptr);
1383                  tmpword = space.read_dword(rptr);
13841384                  if (drvstate->m_HPC3.nSCSI0DMACtrl & HPC3_DMACTRL_ENDIAN)
13851385                  {
13861386                     drvstate->m_dma_buffer[dptr+3] = (tmpword>>24)&0xff;
r17963r17964
14011401                  length -= 4;
14021402               }
14031403
1404               length = space->read_dword(drvstate->m_HPC3.nSCSI0Descriptor+4) & 0x3fff;
1404               length = space.read_dword(drvstate->m_HPC3.nSCSI0Descriptor+4) & 0x3fff;
14051405               drvstate->m_wd33c93->write_data(length, drvstate->m_dma_buffer);
14061406
14071407               // clear DMA on the controller too
r17963r17964
14231423            words = drvstate->m_wd33c93->get_dma_count();
14241424            words /= 4;
14251425
1426            wptr = space->read_dword(drvstate->m_HPC3.nSCSI0Descriptor);
1426            wptr = space.read_dword(drvstate->m_HPC3.nSCSI0Descriptor);
14271427            sptr = 0;
14281428
14291429//              mame_printf_info("DMA from device: %d words @ %x\n", words, wptr);
r17963r17964
14461446                     tmpword = drvstate->m_dma_buffer[sptr]<<24 | drvstate->m_dma_buffer[sptr+1]<<16 | drvstate->m_dma_buffer[sptr+2]<<8 | drvstate->m_dma_buffer[sptr+3];
14471447                  }
14481448
1449                  space->write_dword(wptr, tmpword);
1449                  space.write_dword(wptr, tmpword);
14501450                  wptr += 4;
14511451                  sptr += 4;
14521452                  words--;
r17963r17964
14701470                     {
14711471                        tmpword = drvstate->m_dma_buffer[sptr]<<24 | drvstate->m_dma_buffer[sptr+1]<<16 | drvstate->m_dma_buffer[sptr+2]<<8 | drvstate->m_dma_buffer[sptr+3];
14721472                     }
1473                     space->write_dword(wptr, tmpword);
1473                     space.write_dword(wptr, tmpword);
14741474
14751475                     wptr += 4;
14761476                     sptr += 4;
trunk/src/mess/drivers/c128.c
r17963r17964
969969READ8_MEMBER( c128_state::sid_potx_r )
970970{
971971   UINT8 cia1_pa = mos6526_pa_r(m_cia1, space, 0);
972
972   
973973   int sela = BIT(cia1_pa, 6);
974974   int selb = BIT(cia1_pa, 7);
975975
r17963r17964
984984READ8_MEMBER( c128_state::sid_poty_r )
985985{
986986   UINT8 cia1_pa = mos6526_pa_r(m_cia1, space, 0);
987
987   
988988   int sela = BIT(cia1_pa, 6);
989989   int selb = BIT(cia1_pa, 7);
990990
trunk/src/mess/drivers/mikromik.c
r17963r17964
537537   }
538538}
539539
540static UINT8 memory_read_byte(address_space *space, offs_t address) { return space->read_byte(address); }
541static void memory_write_byte(address_space *space, offs_t address, UINT8 data) { space->write_byte(address, data); }
540static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
541static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
542542
543543static I8237_INTERFACE( dmac_intf )
544544{
trunk/src/mess/drivers/spec128.c
r17963r17964
171171
172172static WRITE8_HANDLER(spectrum_128_port_7ffd_w)
173173{
174   spectrum_state *state = space->machine().driver_data<spectrum_state>();
174   spectrum_state *state = space.machine().driver_data<spectrum_state>();
175175
176176   /* D0-D2: RAM page located at 0x0c000-0x0ffff */
177177   /* D3 - Screen select (screen 0 in ram page 5, screen 1 in ram page 7 */
r17963r17964
186186   state->m_port_7ffd_data = data;
187187
188188   /* update memory */
189   spectrum_128_update_memory(space->machine());
189   spectrum_128_update_memory(space.machine());
190190}
191191
192192void spectrum_128_update_memory(running_machine &machine)
r17963r17964
228228
229229static  READ8_HANDLER ( spectrum_128_ula_r )
230230{
231   spectrum_state *state = space->machine().driver_data<spectrum_state>();
232   int vpos = space->machine().primary_screen->vpos();
231   spectrum_state *state = space.machine().driver_data<spectrum_state>();
232   int vpos = space.machine().primary_screen->vpos();
233233
234234   return vpos<193 ? state->m_screen_location[0x1800|(vpos&0xf8)<<2]:0xff;
235235}
trunk/src/mess/drivers/sc2.c
r17963r17964
4141
4242READ8_MEMBER( sc2_state::sc2_beep )
4343{
44   //if (!space->debugger_access())
44   //if (!space.debugger_access())
4545   {
4646      m_beep_state = ~m_beep_state;
4747
trunk/src/mess/drivers/a2600.c
r17963r17964
11421142static void modeFE_switch(running_machine &machine,UINT16 offset, UINT8 data)
11431143{
11441144   a2600_state *state = machine.driver_data<a2600_state>();
1145   address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM);
1145   address_space& space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
11461146   /* Retrieve last byte read by the cpu (for this mapping scheme this
11471147       should be the last byte that was on the data bus
11481148    */
11491149   state->m_FETimer = 1;
1150   state->m_FE_old_opbase_handler = space->set_direct_update_handler(direct_update_delegate(FUNC(a2600_state::modeFE_opbase_handler), state));
1150   state->m_FE_old_opbase_handler = space.set_direct_update_handler(direct_update_delegate(FUNC(a2600_state::modeFE_opbase_handler), state));
11511151}
11521152
11531153READ8_MEMBER(a2600_state::modeFE_switch_r)
r17963r17964
17321732
17331733void a2600_state::machine_reset()
17341734{
1735   address_space* space = machine().device("maincpu")->memory().space(AS_PROGRAM);
1735   address_space& space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
17361736   int chip = 0xFF;
17371737   static const unsigned char snowwhite[] = { 0x10, 0xd0, 0xff, 0xff }; // Snow White Proto
17381738
r17963r17964
19111911
19121912   if (m_banking_mode == modeDC)
19131913   {
1914      space->install_read_handler(0x1fec, 0x1fec, read8_delegate(FUNC(a2600_state::current_bank_r),this));
1914      space.install_read_handler(0x1fec, 0x1fec, read8_delegate(FUNC(a2600_state::current_bank_r),this));
19151915   }
19161916
19171917   /* set up bank switch registers */
r17963r17964
19191919   switch (m_banking_mode)
19201920   {
19211921   case modeF8:
1922      space->install_write_handler(0x1ff8, 0x1ff9, write8_delegate(FUNC(a2600_state::modeF8_switch_w),this));
1923      space->install_read_handler(0x1ff8, 0x1ff9, read8_delegate(FUNC(a2600_state::modeF8_switch_r),this));
1922      space.install_write_handler(0x1ff8, 0x1ff9, write8_delegate(FUNC(a2600_state::modeF8_switch_w),this));
1923      space.install_read_handler(0x1ff8, 0x1ff9, read8_delegate(FUNC(a2600_state::modeF8_switch_r),this));
19241924      break;
19251925
19261926   case modeFA:
1927      space->install_write_handler(0x1ff8, 0x1ffa, write8_delegate(FUNC(a2600_state::modeFA_switch_w),this));
1928      space->install_read_handler(0x1ff8, 0x1ffa, read8_delegate(FUNC(a2600_state::modeFA_switch_r),this));
1927      space.install_write_handler(0x1ff8, 0x1ffa, write8_delegate(FUNC(a2600_state::modeFA_switch_w),this));
1928      space.install_read_handler(0x1ff8, 0x1ffa, read8_delegate(FUNC(a2600_state::modeFA_switch_r),this));
19291929      break;
19301930
19311931   case modeF6:
1932      space->install_write_handler(0x1ff6, 0x1ff9, write8_delegate(FUNC(a2600_state::modeF6_switch_w),this));
1933      space->install_read_handler(0x1ff6, 0x1ff9, read8_delegate(FUNC(a2600_state::modeF6_switch_r),this));
1934      space->set_direct_update_handler(direct_update_delegate(FUNC(a2600_state::modeF6_opbase), this));
1932      space.install_write_handler(0x1ff6, 0x1ff9, write8_delegate(FUNC(a2600_state::modeF6_switch_w),this));
1933      space.install_read_handler(0x1ff6, 0x1ff9, read8_delegate(FUNC(a2600_state::modeF6_switch_r),this));
1934      space.set_direct_update_handler(direct_update_delegate(FUNC(a2600_state::modeF6_opbase), this));
19351935      break;
19361936
19371937   case modeF4:
1938      space->install_write_handler(0x1ff4, 0x1ffb, write8_delegate(FUNC(a2600_state::modeF4_switch_w),this));
1939      space->install_read_handler(0x1ff4, 0x1ffb, read8_delegate(FUNC(a2600_state::modeF4_switch_r),this));
1938      space.install_write_handler(0x1ff4, 0x1ffb, write8_delegate(FUNC(a2600_state::modeF4_switch_w),this));
1939      space.install_read_handler(0x1ff4, 0x1ffb, read8_delegate(FUNC(a2600_state::modeF4_switch_r),this));
19401940      break;
19411941
19421942   case modeE0:
1943      space->install_write_handler(0x1fe0, 0x1ff8, write8_delegate(FUNC(a2600_state::modeE0_switch_w),this));
1944      space->install_read_handler(0x1fe0, 0x1ff8, read8_delegate(FUNC(a2600_state::modeE0_switch_r),this));
1943      space.install_write_handler(0x1fe0, 0x1ff8, write8_delegate(FUNC(a2600_state::modeE0_switch_w),this));
1944      space.install_read_handler(0x1fe0, 0x1ff8, read8_delegate(FUNC(a2600_state::modeE0_switch_r),this));
19451945      break;
19461946
19471947   case mode3F:
1948      space->install_write_handler(0x00, 0x3f, write8_delegate(FUNC(a2600_state::mode3F_switch_w),this));
1948      space.install_write_handler(0x00, 0x3f, write8_delegate(FUNC(a2600_state::mode3F_switch_w),this));
19491949      break;
19501950
19511951   case modeUA:
1952      space->install_write_handler(0x200, 0x27f, write8_delegate(FUNC(a2600_state::modeUA_switch_w),this));
1953      space->install_read_handler(0x200, 0x27f, read8_delegate(FUNC(a2600_state::modeUA_switch_r),this));
1952      space.install_write_handler(0x200, 0x27f, write8_delegate(FUNC(a2600_state::modeUA_switch_w),this));
1953      space.install_read_handler(0x200, 0x27f, read8_delegate(FUNC(a2600_state::modeUA_switch_r),this));
19541954      break;
19551955
19561956   case modeE7:
1957      space->install_write_handler(0x1fe0, 0x1fe7, write8_delegate(FUNC(a2600_state::modeE7_switch_w),this));
1958      space->install_read_handler(0x1fe0, 0x1fe7, read8_delegate(FUNC(a2600_state::modeE7_switch_r),this));
1959      space->install_write_handler(0x1fe8, 0x1feb, write8_delegate(FUNC(a2600_state::modeE7_RAM_switch_w),this));
1960      space->install_read_handler(0x1fe8, 0x1feb, read8_delegate(FUNC(a2600_state::modeE7_RAM_switch_r),this));
1961      space->install_readwrite_bank(0x1800, 0x18ff, "bank9");
1957      space.install_write_handler(0x1fe0, 0x1fe7, write8_delegate(FUNC(a2600_state::modeE7_switch_w),this));
1958      space.install_read_handler(0x1fe0, 0x1fe7, read8_delegate(FUNC(a2600_state::modeE7_switch_r),this));
1959      space.install_write_handler(0x1fe8, 0x1feb, write8_delegate(FUNC(a2600_state::modeE7_RAM_switch_w),this));
1960      space.install_read_handler(0x1fe8, 0x1feb, read8_delegate(FUNC(a2600_state::modeE7_RAM_switch_r),this));
1961      space.install_readwrite_bank(0x1800, 0x18ff, "bank9");
19621962      membank("bank9")->set_base(m_extra_RAM->base() + 4 * 256 );
19631963      break;
19641964
19651965   case modeDC:
1966      space->install_write_handler(0x1ff0, 0x1ff0, write8_delegate(FUNC(a2600_state::modeDC_switch_w),this));
1967      space->install_read_handler(0x1ff0, 0x1ff0, read8_delegate(FUNC(a2600_state::modeDC_switch_r),this));
1966      space.install_write_handler(0x1ff0, 0x1ff0, write8_delegate(FUNC(a2600_state::modeDC_switch_w),this));
1967      space.install_read_handler(0x1ff0, 0x1ff0, read8_delegate(FUNC(a2600_state::modeDC_switch_r),this));
19681968      break;
19691969
19701970   case modeFE:
1971      space->install_write_handler(0x01fe, 0x01fe, write8_delegate(FUNC(a2600_state::modeFE_switch_w),this));
1972      space->install_read_handler(0x01fe, 0x01fe, read8_delegate(FUNC(a2600_state::modeFE_switch_r),this));
1971      space.install_write_handler(0x01fe, 0x01fe, write8_delegate(FUNC(a2600_state::modeFE_switch_w),this));
1972      space.install_read_handler(0x01fe, 0x01fe, read8_delegate(FUNC(a2600_state::modeFE_switch_r),this));
19731973      break;
19741974
19751975   case mode3E:
1976      space->install_write_handler(0x3e, 0x3e, write8_delegate(FUNC(a2600_state::mode3E_RAM_switch_w),this));
1977      space->install_write_handler(0x3f, 0x3f, write8_delegate(FUNC(a2600_state::mode3E_switch_w),this));
1978      space->install_write_handler(0x1400, 0x15ff, write8_delegate(FUNC(a2600_state::mode3E_RAM_w),this));
1976      space.install_write_handler(0x3e, 0x3e, write8_delegate(FUNC(a2600_state::mode3E_RAM_switch_w),this));
1977      space.install_write_handler(0x3f, 0x3f, write8_delegate(FUNC(a2600_state::mode3E_switch_w),this));
1978      space.install_write_handler(0x1400, 0x15ff, write8_delegate(FUNC(a2600_state::mode3E_RAM_w),this));
19791979      break;
19801980
19811981   case modeSS:
1982      space->install_read_handler(0x1000, 0x1fff, read8_delegate(FUNC(a2600_state::modeSS_r),this));
1982      space.install_read_handler(0x1000, 0x1fff, read8_delegate(FUNC(a2600_state::modeSS_r),this));
19831983      m_bank_base[1] = m_extra_RAM->base() + 2 * 0x800;
19841984      m_bank_base[2] = CART_MEMBER;
19851985      membank("bank1")->set_base(m_bank_base[1] );
19861986      membank("bank2")->set_base(m_bank_base[2] );
19871987      m_modeSS_write_enabled = 0;
19881988      m_modeSS_byte_started = 0;
1989      space->set_direct_update_handler(direct_update_delegate(FUNC(a2600_state::modeSS_opbase), this));
1989      space.set_direct_update_handler(direct_update_delegate(FUNC(a2600_state::modeSS_opbase), this));
19901990      /* The Supercharger has no motor control so just enable it */
19911991      machine().device<cassette_image_device>(CASSETTE_TAG)->change_state(CASSETTE_MOTOR_ENABLED, CASSETTE_MOTOR_DISABLED );
19921992      break;
19931993
19941994   case modeFV:
1995      space->install_write_handler(0x1fd0, 0x1fd0, write8_delegate(FUNC(a2600_state::modeFV_switch_w),this));
1996      space->install_read_handler(0x1fd0, 0x1fd0, read8_delegate(FUNC(a2600_state::modeFV_switch_r),this));
1995      space.install_write_handler(0x1fd0, 0x1fd0, write8_delegate(FUNC(a2600_state::modeFV_switch_w),this));
1996      space.install_read_handler(0x1fd0, 0x1fd0, read8_delegate(FUNC(a2600_state::modeFV_switch_r),this));
19971997      break;
19981998
19991999   case modeDPC:
2000      space->install_read_handler(0x1000, 0x103f, read8_delegate(FUNC(a2600_state::modeDPC_r),this));
2001      space->install_write_handler(0x1040, 0x107f, write8_delegate(FUNC(a2600_state::modeDPC_w),this));
2002      space->install_write_handler(0x1ff8, 0x1ff9, write8_delegate(FUNC(a2600_state::modeF8_switch_w),this));
2003      space->install_read_handler(0x1ff8, 0x1ff9, read8_delegate(FUNC(a2600_state::modeF8_switch_r),this));
2004      space->set_direct_update_handler(direct_update_delegate(FUNC(a2600_state::modeDPC_opbase_handler), this));
2000      space.install_read_handler(0x1000, 0x103f, read8_delegate(FUNC(a2600_state::modeDPC_r),this));
2001      space.install_write_handler(0x1040, 0x107f, write8_delegate(FUNC(a2600_state::modeDPC_w),this));
2002      space.install_write_handler(0x1ff8, 0x1ff9, write8_delegate(FUNC(a2600_state::modeF8_switch_w),this));
2003      space.install_read_handler(0x1ff8, 0x1ff9, read8_delegate(FUNC(a2600_state::modeF8_switch_r),this));
2004      space.set_direct_update_handler(direct_update_delegate(FUNC(a2600_state::modeDPC_opbase_handler), this));
20052005      {
20062006         int   data_fetcher;
20072007         for( data_fetcher = 0; data_fetcher < 8; data_fetcher++ )
r17963r17964
20202020      break;
20212021
20222022   case modeJVP:
2023      space->install_read_handler(0x0FA0, 0x0FC0, read8_delegate(FUNC(a2600_state::modeJVP_switch_r),this));
2024      space->install_write_handler(0x0FA0, 0x0FC0, write8_delegate(FUNC(a2600_state::modeJVP_switch_w),this));
2023      space.install_read_handler(0x0FA0, 0x0FC0, read8_delegate(FUNC(a2600_state::modeJVP_switch_r),this));
2024      space.install_write_handler(0x0FA0, 0x0FC0, write8_delegate(FUNC(a2600_state::modeJVP_switch_w),this));
20252025      break;
20262026   }
20272027
r17963r17964
20292029
20302030   if (m_banking_mode == modeFA)
20312031   {
2032      space->install_write_bank(0x1000, 0x10ff, "bank9");
2033      space->install_read_bank(0x1100, 0x11ff, "bank9");
2032      space.install_write_bank(0x1000, 0x10ff, "bank9");
2033      space.install_read_bank(0x1100, 0x11ff, "bank9");
20342034
20352035      membank("bank9")->set_base(m_extra_RAM->base());
20362036   }
20372037
20382038   if (m_banking_mode == modeCV)
20392039   {
2040      space->install_write_bank(0x1400, 0x17ff, "bank9");
2041      space->install_read_bank(0x1000, 0x13ff, "bank9");
2040      space.install_write_bank(0x1400, 0x17ff, "bank9");
2041      space.install_read_bank(0x1000, 0x13ff, "bank9");
20422042
20432043      membank("bank9")->set_base(m_extra_RAM->base());
20442044   }
20452045
20462046   if (chip)
20472047   {
2048      space->install_write_bank(0x1000, 0x107f, "bank9");
2049      space->install_read_bank(0x1080, 0x10ff, "bank9");
2048      space.install_write_bank(0x1000, 0x107f, "bank9");
2049      space.install_read_bank(0x1080, 0x10ff, "bank9");
20502050
20512051      membank("bank9")->set_base(m_extra_RAM->base());
20522052   }
trunk/src/mess/drivers/pcw.c
r17963r17964
234234static void pcw_update_read_memory_block(running_machine &machine, int block, int bank)
235235{
236236   pcw_state *state = machine.driver_data<pcw_state>();
237   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
237   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
238238   char block_name[10];
239239
240240   sprintf(block_name,"bank%d",block+1);
r17963r17964
243243   {
244244      /* when upper 16 bytes are accessed use keyboard read
245245           handler */
246      space->install_read_handler(
246      space.install_read_handler(
247247         block * 0x04000 + 0x3ff0, block * 0x04000 + 0x3fff, read8_delegate(FUNC(pcw_state::pcw_keyboard_data_r),state));
248248//      LOG(("MEM: read block %i -> bank %i\n",block,bank));
249249   }
250250   else
251251   {
252252      /* restore bank handler across entire block */
253      space->install_read_bank(block * 0x04000 + 0x0000, block * 0x04000 + 0x3fff,block_name);
253      space.install_read_bank(block * 0x04000 + 0x0000, block * 0x04000 + 0x3fff,block_name);
254254//      LOG(("MEM: read block %i -> bank %i\n",block,bank));
255255   }
256256   state->membank(block_name)->set_base(machine.device<ram_device>(RAM_TAG)->pointer() + ((bank * 0x4000) % machine.device<ram_device>(RAM_TAG)->size()));
trunk/src/mess/drivers/megadriv.c
r17963r17964
2727/* J-Cart controller port */
2828WRITE16_HANDLER( jcart_ctrl_w )
2929{
30   md_cons_state *state = space->machine().driver_data<md_cons_state>();
30   md_cons_state *state = space.machine().driver_data<md_cons_state>();
3131   state->m_jcart_io_data[0] = (data & 1) << 6;
3232   state->m_jcart_io_data[1] = (data & 1) << 6;
3333}
3434
3535READ16_HANDLER( jcart_ctrl_r )
3636{
37   md_cons_state *state = space->machine().driver_data<md_cons_state>();
37   md_cons_state *state = space.machine().driver_data<md_cons_state>();
3838   UINT16 retdata = 0;
3939   UINT8 joy[2];
4040
r17963r17964
709709
710710static READ16_HANDLER( pico_68k_io_read )
711711{
712   pico_state *state = space->machine().driver_data<pico_state>();
712   pico_state *state = space.machine().driver_data<pico_state>();
713713   UINT8 retdata = 0;
714714
715715   switch (offset)
r17963r17964
733733              0x2f8 - 0x3f3 (storyware)
734734           */
735735      case 2:
736         retdata = pico_read_penpos(space->machine(), PICO_PENX) >> 8;
736         retdata = pico_read_penpos(space.machine(), PICO_PENX) >> 8;
737737         break;
738738      case 3:
739         retdata = pico_read_penpos(space->machine(), PICO_PENX) & 0x00ff;
739         retdata = pico_read_penpos(space.machine(), PICO_PENX) & 0x00ff;
740740         break;
741741      case 4:
742         retdata = pico_read_penpos(space->machine(), PICO_PENY) >> 8;
742         retdata = pico_read_penpos(space.machine(), PICO_PENY) >> 8;
743743         break;
744744      case 5:
745         retdata = pico_read_penpos(space->machine(), PICO_PENY) & 0x00ff;
745         retdata = pico_read_penpos(space.machine(), PICO_PENY) & 0x00ff;
746746         break;
747747      case 6:
748748       /* Page register :
trunk/src/mess/drivers/amiga.c
r17963r17964
5858
5959static READ16_HANDLER( amiga_clock_r )
6060{
61   msm6242_device *rtc = space->machine().device<msm6242_device>("rtc");
62   return rtc->read(*space,offset / 2);
61   msm6242_device *rtc = space.machine().device<msm6242_device>("rtc");
62   return rtc->read(space,offset / 2);
6363}
6464
6565
6666static WRITE16_HANDLER( amiga_clock_w )
6767{
68   msm6242_device *rtc = space->machine().device<msm6242_device>("rtc");
69   rtc->write(*space,offset / 2, data);
68   msm6242_device *rtc = space.machine().device<msm6242_device>("rtc");
69   rtc->write(space,offset / 2, data);
7070}
7171
7272
trunk/src/mess/drivers/qx10.c
r17963r17964
377377    Channel 2: GDC
378378    Channel 3: Option slots
379379*/
380static UINT8 memory_read_byte(address_space *space, offs_t address) { return space->read_byte(address); }
381static void memory_write_byte(address_space *space, offs_t address, UINT8 data) { space->write_byte(address, data); }
380static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
381static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
382382
383383static I8237_INTERFACE( qx10_dma8237_1_interface )
384384{
trunk/src/mess/drivers/bigbord2.c
r17963r17964
207207/* Z80 DMA */
208208
209209
210static UINT8 memory_read_byte(address_space *space, offs_t address) { return space->read_byte(address); }
211static void memory_write_byte(address_space *space, offs_t address, UINT8 data) { space->write_byte(address, data); }
210static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
211static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
212212
213213static Z80DMA_INTERFACE( dma_intf )
214214{
r17963r17964
415415
416416WRITE_LINE_MEMBER( bigbord2_state::frame )
417417{
418   address_space *space = m_maincpu->space(AS_PROGRAM);
418   address_space &space = *m_maincpu->space(AS_PROGRAM);
419419   static UINT8 framecnt;
420420   framecnt++;
421421
422   if ((space->read_byte(0xf13d) == 0x4d) & (framecnt > 3))
422   if ((space.read_byte(0xf13d) == 0x4d) & (framecnt > 3))
423423   {
424424      framecnt = 0;
425425      // simulate interrupt by saving current pc on
r17963r17964
427427      UINT16 spreg = m_maincpu->state_int(Z80_SP);
428428      UINT16 pcreg = m_maincpu->state_int(Z80_PC);
429429      spreg--;
430      space->write_byte(spreg, pcreg >> 8);
430      space.write_byte(spreg, pcreg >> 8);
431431      spreg--;
432      space->write_byte(spreg, pcreg);
432      space.write_byte(spreg, pcreg);
433433      m_maincpu->set_state_int(Z80_SP, spreg);
434434      m_maincpu->set_state_int(Z80_PC, 0xF18E);
435435   }
trunk/src/mess/drivers/tvc.c
r17963r17964
1818#define TVC_INSTALL_ROM_BANK(_bank,_tag,_start,_end) \
1919   if (m_bank_type[_bank] != TVC_ROM_BANK) \
2020   { \
21      space->install_read_bank(_start, _end, _tag); \
22      space->unmap_write(_start, _end); \
21      space.install_read_bank(_start, _end, _tag); \
22      space.unmap_write(_start, _end); \
2323      m_bank_type[_bank] = TVC_ROM_BANK; \
2424   } \
2525
2626#define TVC_INSTALL_RAM_BANK(_bank,_tag,_start,_end) \
2727   if (m_bank_type[_bank] != TVC_RAM_BANK) \
2828   { \
29      space->install_readwrite_bank(_start, _end, _tag); \
29      space.install_readwrite_bank(_start, _end, _tag); \
3030      m_bank_type[_bank] = TVC_RAM_BANK; \
3131   } \
3232
3333void tvc_state::tvc_set_mem_page(UINT8 data)
3434{
35   address_space *space = m_maincpu->space(AS_PROGRAM);
35   address_space &space = *m_maincpu->space(AS_PROGRAM);
3636   switch(data & 0x18)
3737   {
3838      case 0x00 : // system ROM selected
r17963r17964
5656         }
5757         else
5858         {
59            space->unmap_readwrite(0x0000, 0x3fff);
59            space.unmap_readwrite(0x0000, 0x3fff);
6060            m_bank_type[0] = -1;
6161         }
6262         break;
r17963r17964
7676      }
7777      else
7878      {
79         space->unmap_readwrite(0x8000, 0xbfff);
79         space.unmap_readwrite(0x8000, 0xbfff);
8080         m_bank_type[2] = -1;
8181      }
8282   }
r17963r17964
9999         }
100100         else
101101         {
102            space->unmap_readwrite(0xc000, 0xffff);
102            space.unmap_readwrite(0xc000, 0xffff);
103103            m_bank_type[3] = -1;
104104         }
105105         break;
106106      case 0xc0 : // External ROM selected
107107         TVC_INSTALL_ROM_BANK(3, "bank4", 0xc000, 0xffff);
108108         membank("bank4")->set_base(memregion("ext")->base());
109         space->install_readwrite_handler (0xc000, 0xdfff, 0, 0, read8_delegate(FUNC(tvc_state::tvc_expansion_r), this), write8_delegate(FUNC(tvc_state::tvc_expansion_w), this), 0);
109         space.install_readwrite_handler (0xc000, 0xdfff, 0, 0, read8_delegate(FUNC(tvc_state::tvc_expansion_r), this), write8_delegate(FUNC(tvc_state::tvc_expansion_w), this), 0);
110110         m_bank_type[3] = -1;
111111         break;
112112   }
trunk/src/mess/drivers/fmtowns.c
r17963r17964
270270   switch(offset)
271271   {
272272      case 0x00:  // bit 7 = NMI vector protect, bit 6 = power off, bit 0 = software reset, bit 3 = A20 line?
273//          space->machine().device("maincpu")->execute().set_input_line(INPUT_LINE_A20,(data & 0x08) ? CLEAR_LINE : ASSERT_LINE);
273//          space.machine().device("maincpu")->execute().set_input_line(INPUT_LINE_A20,(data & 0x08) ? CLEAR_LINE : ASSERT_LINE);
274274         logerror("SYS: port 0x20 write %02x\n",data);
275275         break;
276276      case 0x02:
trunk/src/mess/drivers/fk1.c
r17963r17964
423423
424424void fk1_state::machine_reset()
425425{
426   address_space *space = m_maincpu->space(AS_PROGRAM);
426   address_space &space = *m_maincpu->space(AS_PROGRAM);
427427   UINT8 *ram = machine().device<ram_device>(RAM_TAG)->pointer();
428428
429   space->unmap_write(0x0000, 0x3fff);
429   space.unmap_write(0x0000, 0x3fff);
430430   membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base()); // ROM
431431   membank("bank2")->set_base(ram + 0x10000); // VRAM
432432   membank("bank3")->set_base(ram + 0x8000);
trunk/src/mess/drivers/bullet.c
r17963r17964
798798   }
799799}
800800
801static UINT8 memory_read_byte(address_space *space, offs_t address) { return space->read_byte(address); }
802static void memory_write_byte(address_space *space, offs_t address, UINT8 data) { space->write_byte(address, data); }
801static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
802static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
803803
804804static Z80DMA_INTERFACE( dma_intf )
805805{
trunk/src/mess/drivers/vtech1.c
r17963r17964
209209static SNAPSHOT_LOAD( vtech1 )
210210{
211211   vtech1_state *vtech1 = image.device().machine().driver_data<vtech1_state>();
212   address_space *space = image.device().machine().device("maincpu")->memory().space(AS_PROGRAM);
212   address_space &space = *image.device().machine().device("maincpu")->memory().space(AS_PROGRAM);
213213   UINT8 i, header[24];
214214   UINT16 start, end, size;
215215   char pgmname[18];
r17963r17964
241241   switch (header[21])
242242   {
243243   case VZ_BASIC:      /* 0xF0 */
244      space->write_byte(0x78a4, start % 256); /* start of basic program */
245      space->write_byte(0x78a5, start / 256);
246      space->write_byte(0x78f9, end % 256); /* end of basic program */
247      space->write_byte(0x78fa, end / 256);
248      space->write_byte(0x78fb, end % 256); /* start variable table */
249      space->write_byte(0x78fc, end / 256);
250      space->write_byte(0x78fd, end % 256); /* start free mem, end variable table */
251      space->write_byte(0x78fe, end / 256);
244      space.write_byte(0x78a4, start % 256); /* start of basic program */
245      space.write_byte(0x78a5, start / 256);
246      space.write_byte(0x78f9, end % 256); /* end of basic program */
247      space.write_byte(0x78fa, end / 256);
248      space.write_byte(0x78fb, end % 256); /* start variable table */
249      space.write_byte(0x78fc, end / 256);
250      space.write_byte(0x78fd, end % 256); /* start free mem, end variable table */
251      space.write_byte(0x78fe, end / 256);
252252      image.message(" %s (B)\nsize=%04X : start=%04X : end=%04X",pgmname,size,start,end);
253253      break;
254254
255255   case VZ_MCODE:      /* 0xF1 */
256      space->write_byte(0x788e, start % 256); /* usr subroutine address */
257      space->write_byte(0x788f, start / 256);
256      space.write_byte(0x788e, start % 256); /* usr subroutine address */
257      space.write_byte(0x788f, start / 256);
258258      image.message(" %s (M)\nsize=%04X : start=%04X : end=%04X",pgmname,size,start,end);
259259      image.device().machine().device("maincpu")->state().set_pc(start);            /* start program */
260260      break;
trunk/src/mess/drivers/ng_aes.c
r17963r17964
603603         bank_address = 0x100000;
604604      }
605605
606      neogeo_set_main_cpu_bank_address(&space, bank_address);
606      neogeo_set_main_cpu_bank_address(space, bank_address);
607607   }
608608}
609609
r17963r17964
611611static void main_cpu_banking_init( running_machine &machine )
612612{
613613   ng_aes_state *state = machine.driver_data<ng_aes_state>();
614   address_space *mainspace = machine.device("maincpu")->memory().space(AS_PROGRAM);
614   address_space &mainspace = *machine.device("maincpu")->memory().space(AS_PROGRAM);
615615
616616   /* create vector banks */
617617   state->membank(NEOGEO_BANK_VECTORS)->configure_entry(0, machine.root_device().memregion("mainbios")->base());
r17963r17964
642642}
643643
644644
645static void audio_cpu_bank_select( address_space *space, int region, UINT8 bank )
645static void audio_cpu_bank_select( address_space &space, int region, UINT8 bank )
646646{
647   neogeo_state *state = space->machine().driver_data<neogeo_state>();
647   neogeo_state *state = space.machine().driver_data<neogeo_state>();
648648
649   if (LOG_AUDIO_CPU_BANKING) logerror("Audio CPU PC %03x: audio_cpu_bank_select: Region: %d   Bank: %02x\n", space->device().safe_pc(), region, bank);
649   if (LOG_AUDIO_CPU_BANKING) logerror("Audio CPU PC %03x: audio_cpu_bank_select: Region: %d   Bank: %02x\n", space.device().safe_pc(), region, bank);
650650
651651   state->m_audio_cpu_banks[region] = bank;
652652
653   set_audio_cpu_banking(space->machine());
653   set_audio_cpu_banking(space.machine());
654654}
655655
656656
657657READ8_MEMBER(ng_aes_state::audio_cpu_bank_select_f000_f7ff_r)
658658{
659   audio_cpu_bank_select(&space, 0, offset >> 8);
659   audio_cpu_bank_select(space, 0, offset >> 8);
660660
661661   return 0;
662662}
r17963r17964
664664
665665READ8_MEMBER(ng_aes_state::audio_cpu_bank_select_e000_efff_r)
666666{
667   audio_cpu_bank_select(&space, 1, offset >> 8);
667   audio_cpu_bank_select(space, 1, offset >> 8);
668668
669669   return 0;
670670}
r17963r17964
672672
673673READ8_MEMBER(ng_aes_state::audio_cpu_bank_select_c000_dfff_r)
674674{
675   audio_cpu_bank_select(&space, 2, offset >> 8);
675   audio_cpu_bank_select(space, 2, offset >> 8);
676676
677677   return 0;
678678}
r17963r17964
680680
681681READ8_MEMBER(ng_aes_state::audio_cpu_bank_select_8000_bfff_r)
682682{
683   audio_cpu_bank_select(&space, 3, offset >> 8);
683   audio_cpu_bank_select(space, 3, offset >> 8);
684684
685685   return 0;
686686}
687687
688688
689static void _set_audio_cpu_rom_source( address_space *space )
689static void _set_audio_cpu_rom_source( address_space &space )
690690{
691   neogeo_state *state = space->machine().driver_data<neogeo_state>();
691   neogeo_state *state = space.machine().driver_data<neogeo_state>();
692692
693693/*  if (!state->memregion("audiobios")->base())   */
694694      state->m_audio_cpu_rom_source = 1;
r17963r17964
700700   {
701701      state->m_audio_cpu_rom_source_last = state->m_audio_cpu_rom_source;
702702
703      space->machine().device("audiocpu")->execute().set_input_line(INPUT_LINE_RESET, PULSE_LINE);
703      space.machine().device("audiocpu")->execute().set_input_line(INPUT_LINE_RESET, PULSE_LINE);
704704
705      if (LOG_AUDIO_CPU_BANKING) logerror("Audio CPU PC %03x: selectign %s ROM\n", space->device().safe_pc(), state->m_audio_cpu_rom_source ? "CARTRIDGE" : "BIOS");
705      if (LOG_AUDIO_CPU_BANKING) logerror("Audio CPU PC %03x: selectign %s ROM\n", space.device().safe_pc(), state->m_audio_cpu_rom_source ? "CARTRIDGE" : "BIOS");
706706   }
707707}
708708
709709
710static void set_audio_cpu_rom_source( address_space *space, UINT8 data )
710static void set_audio_cpu_rom_source( address_space &space, UINT8 data )
711711{
712   neogeo_state *state = space->machine().driver_data<neogeo_state>();
712   neogeo_state *state = space.machine().driver_data<neogeo_state>();
713713   state->m_audio_cpu_rom_source = data;
714714
715715   _set_audio_cpu_rom_source(space);
r17963r17964
752752   set_audio_cpu_banking(machine);
753753
754754   state->m_audio_cpu_rom_source_last = 0;
755   set_audio_cpu_rom_source(machine.device("maincpu")->memory().space(AS_PROGRAM), 0);
755   set_audio_cpu_rom_source(*machine.device("maincpu")->memory().space(AS_PROGRAM), 0);
756756}
757757
758758
r17963r17964
774774      default:
775775      case 0x00: neogeo_set_screen_dark(machine(), bit); break;
776776      case 0x01: set_main_cpu_vector_table_source(machine(), bit);
777               set_audio_cpu_rom_source(&space, bit); /* this is a guess */
777               set_audio_cpu_rom_source(space, bit); /* this is a guess */
778778               break;
779779      case 0x05: neogeo_set_fixed_layer_source(machine(), bit); break;
780780//      case 0x06: set_save_ram_unlock(machine(), bit); break;
r17963r17964
836836 *
837837 */
838838
839static void neocd_do_dma(address_space* space)
839static void neocd_do_dma(address_space& space)
840840{
841   ng_aes_state *state = space->machine().driver_data<ng_aes_state>();
841   ng_aes_state *state = space.machine().driver_data<ng_aes_state>();
842842   // TODO: Proper DMA timing and control
843843   int count;
844844//  UINT16 word;
r17963r17964
848848   case 0xffdd:
849849      for(count=0;count<state->m_neocd_ctrl.word_count;count++)
850850      {
851         //word = space->read_word(state->m_neocd_ctrl.addr_source);
852         space->write_word(state->m_neocd_ctrl.addr_source+(count*2),state->m_neocd_ctrl.fill_word);
851         //word = space.read_word(state->m_neocd_ctrl.addr_source);
852         space.write_word(state->m_neocd_ctrl.addr_source+(count*2),state->m_neocd_ctrl.fill_word);
853853      }
854854      logerror("CTRL: DMA word-fill transfer of %i bytes\n",count*2);
855855      break;
856856   case 0xfef5:
857857      for(count=0;count<state->m_neocd_ctrl.word_count;count++)
858858      {
859         //word = space->read_word(state->m_neocd_ctrl.addr_source);
860         space->write_word(state->m_neocd_ctrl.addr_source+(count*4),(state->m_neocd_ctrl.addr_source+(count*4)) >> 16);
861         space->write_word(state->m_neocd_ctrl.addr_source+(count*4)+2,(state->m_neocd_ctrl.addr_source+(count*4)) & 0xffff);
859         //word = space.read_word(state->m_neocd_ctrl.addr_source);
860         space.write_word(state->m_neocd_ctrl.addr_source+(count*4),(state->m_neocd_ctrl.addr_source+(count*4)) >> 16);
861         space.write_word(state->m_neocd_ctrl.addr_source+(count*4)+2,(state->m_neocd_ctrl.addr_source+(count*4)) & 0xffff);
862862      }
863863      logerror("CTRL: DMA mode 2 transfer of %i bytes\n",count*4);
864864      break;
865865   case 0xcffd:
866866      for(count=0;count<state->m_neocd_ctrl.word_count;count++)
867867      {
868         //word = space->read_word(state->m_neocd_ctrl.addr_source);
869         space->write_word(state->m_neocd_ctrl.addr_source+(count*8),((state->m_neocd_ctrl.addr_source+(count*8)) >> 24) | 0xff00);
870         space->write_word(state->m_neocd_ctrl.addr_source+(count*8)+2,((state->m_neocd_ctrl.addr_source+(count*8)) >> 16) | 0xff00);
871         space->write_word(state->m_neocd_ctrl.addr_source+(count*8)+4,((state->m_neocd_ctrl.addr_source+(count*8)) >> 8) | 0xff00);
872         space->write_word(state->m_neocd_ctrl.addr_source+(count*8)+6,(state->m_neocd_ctrl.addr_source+(count*8)) | 0xff00);
868         //word = space.read_word(state->m_neocd_ctrl.addr_source);
869         space.write_word(state->m_neocd_ctrl.addr_source+(count*8),((state->m_neocd_ctrl.addr_source+(count*8)) >> 24) | 0xff00);
870         space.write_word(state->m_neocd_ctrl.addr_source+(count*8)+2,((state->m_neocd_ctrl.addr_source+(count*8)) >> 16) | 0xff00);
871         space.write_word(state->m_neocd_ctrl.addr_source+(count*8)+4,((state->m_neocd_ctrl.addr_source+(count*8)) >> 8) | 0xff00);
872         space.write_word(state->m_neocd_ctrl.addr_source+(count*8)+6,(state->m_neocd_ctrl.addr_source+(count*8)) | 0xff00);
873873      }
874874      logerror("CTRL: DMA mode 3 transfer of %i bytes\n",count*8);
875875      break;
r17963r17964
929929   {
930930   case 0x60/2: // Start DMA transfer
931931      if((data & 0xff) == 0x40)
932         neocd_do_dma(&space);
932         neocd_do_dma(space);
933933      break;
934934   case 0x64/2: // source address, high word
935935      m_neocd_ctrl.addr_source = (m_neocd_ctrl.addr_source & 0x0000ffff) | (data << 16);
r17963r17964
11481148   _set_main_cpu_bank_address(state->machine());
11491149   _set_main_cpu_vector_table_source(state->machine());
11501150   set_audio_cpu_banking(state->machine());
1151   _set_audio_cpu_rom_source(state->machine().device("maincpu")->memory().space(AS_PROGRAM));
1151   _set_audio_cpu_rom_source(*state->machine().device("maincpu")->memory().space(AS_PROGRAM));
11521152}
11531153
11541154static void common_machine_start(running_machine &machine)
r17963r17964
12531253MACHINE_RESET_MEMBER(ng_aes_state,neogeo)
12541254{
12551255   offs_t offs;
1256   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
1256   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
12571257
12581258   /* reset system control registers */
12591259   for (offs = 0; offs < 8; offs++)
1260      system_control_w(*space, offs, 0, 0x00ff);
1260      system_control_w(space, offs, 0, 0x00ff);
12611261
12621262   machine().device("maincpu")->reset();
12631263
trunk/src/mess/drivers/psx.c
r17963r17964
455455static QUICKLOAD_LOAD( psx_exe_load )
456456{
457457   psx1_state *state = image.device().machine().driver_data<psx1_state>();
458   address_space *space = image.device().machine().device( "maincpu")->memory().space( AS_PROGRAM );
458   address_space &space = *image.device().machine().device( "maincpu")->memory().space( AS_PROGRAM );
459459
460460   state->m_exe_size = 0;
461461   state->m_exe_buffer = (UINT8*)malloc( quickload_size );
r17963r17964
470470      return IMAGE_INIT_FAIL;
471471   }
472472   state->m_exe_size = quickload_size;
473   space->set_direct_update_handler(direct_update_delegate(FUNC(psx1_state::psx_setopbase), state));
473   space.set_direct_update_handler(direct_update_delegate(FUNC(psx1_state::psx_setopbase), state));
474474
475475   return IMAGE_INIT_PASS;
476476}
trunk/src/mess/drivers/samcoupe.c
r17963r17964
167167
168168WRITE8_MEMBER(samcoupe_state::samcoupe_lmpr_w)
169169{
170   address_space *space_program = machine().device("maincpu")->memory().space(AS_PROGRAM);
170   address_space &space_program = *machine().device("maincpu")->memory().space(AS_PROGRAM);
171171
172172   m_lmpr = data;
173173   samcoupe_update_memory(space_program);
r17963r17964
180180
181181WRITE8_MEMBER(samcoupe_state::samcoupe_hmpr_w)
182182{
183   address_space *space_program = machine().device("maincpu")->memory().space(AS_PROGRAM);
183   address_space &space_program = *machine().device("maincpu")->memory().space(AS_PROGRAM);
184184
185185   m_hmpr = data;
186186   samcoupe_update_memory(space_program);
r17963r17964
193193
194194WRITE8_MEMBER(samcoupe_state::samcoupe_vmpr_w)
195195{
196   address_space *space_program = machine().device("maincpu")->memory().space(AS_PROGRAM);
196   address_space &space_program = *machine().device("maincpu")->memory().space(AS_PROGRAM);
197197
198198   m_vmpr = data;
199199   samcoupe_update_memory(space_program);
trunk/src/mess/drivers/atm.c
r17963r17964
120120MACHINE_RESET_MEMBER(atm_state,atm)
121121{
122122   UINT8 *messram = machine().device<ram_device>(RAM_TAG)->pointer();
123   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
123   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
124124   device_t *beta = machine().device(BETA_DISK_TAG);
125125
126   space->install_read_bank(0x0000, 0x3fff, "bank1");
127   space->unmap_write(0x0000, 0x3fff);
126   space.install_read_bank(0x0000, 0x3fff, "bank1");
127   space.unmap_write(0x0000, 0x3fff);
128128
129129   if (beta->started())  {
130130      betadisk_enable(beta);
131131      betadisk_clear_status(beta);
132132   }
133   space->set_direct_update_handler(direct_update_delegate(FUNC(atm_state::atm_direct), this));
133   space.set_direct_update_handler(direct_update_delegate(FUNC(atm_state::atm_direct), this));
134134
135135   memset(messram,0,128*1024);
136136
trunk/src/mess/drivers/itt3030.c
r17963r17964
5757
5858UINT32 itt3030_state::screen_update( screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect )
5959{
60   address_space *space = screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
60   address_space &space = *screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
6161
6262   for(int y = 0; y < 24; y++ )
6363   {
6464      for(int x = 0; x < 80; x++ )
6565      {
66         UINT8 code = space->read_byte(0x3000 + x + y*128);
66         UINT8 code = space.read_byte(0x3000 + x + y*128);
6767         drawgfx_opaque(bitmap, cliprect, screen.machine().gfx[0],  code , 0, 0,0, x*8,y*16);
6868      }
6969   }
trunk/src/mess/drivers/x07.c
r17963r17964
10421042{
10431043   running_machine &machine = image.device().machine();
10441044   x07_state *state = machine.driver_data<x07_state>();
1045   address_space *space = state->m_maincpu->space( AS_PROGRAM );
1045   address_space &space = *state->m_maincpu->space( AS_PROGRAM );
10461046   UINT16 ram_size = state->m_ram->size();
10471047
10481048   if (image.software_entry() == NULL)
r17963r17964
10501050      UINT8 *rom = machine.memory().region_alloc( "card", image.length(), 1, ENDIANNESS_LITTLE )->base();
10511051      image.fread(rom, image.length());
10521052
1053      space->install_ram(ram_size, ram_size + 0xfff);
1054      space->install_rom(0x6000, 0x7fff, rom);
1053      space.install_ram(ram_size, ram_size + 0xfff);
1054      space.install_rom(0x6000, 0x7fff, rom);
10551055   }
10561056   else
10571057   {
r17963r17964
10611061      {
10621062         // 0x4000 - 0x4fff   4KB RAM
10631063         // 0x6000 - 0x7fff   8KB ROM
1064         space->install_ram(ram_size, ram_size + 0xfff);
1065         space->install_rom(0x6000, 0x7fff, image.get_software_region("rom"));
1064         space.install_ram(ram_size, ram_size + 0xfff);
1065         space.install_rom(0x6000, 0x7fff, image.get_software_region("rom"));
10661066      }
10671067      else
10681068      {
trunk/src/mess/drivers/nanos.c
r17963r17964
439439
440440void nanos_state::machine_reset()
441441{
442   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
442   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
443443
444   space->install_write_bank(0x0000, 0x0fff, "bank3");
445   space->install_write_bank(0x1000, 0xffff, "bank2");
444   space.install_write_bank(0x0000, 0x0fff, "bank3");
445   space.install_write_bank(0x1000, 0xffff, "bank2");
446446
447447   membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base());
448448   membank("bank2")->set_base(machine().device<ram_device>(RAM_TAG)->pointer() + 0x1000);
449449   membank("bank3")->set_base(machine().device<ram_device>(RAM_TAG)->pointer());
450450
451   floppy_mon_w(floppy_get_device(space->machine(), 0), CLEAR_LINE);
452   floppy_drive_set_ready_state(floppy_get_device(space->machine(), 0), 1,1);
451   floppy_mon_w(floppy_get_device(space.machine(), 0), CLEAR_LINE);
452   floppy_drive_set_ready_state(floppy_get_device(space.machine(), 0), 1,1);
453453}
454454
455455static Z80PIO_INTERFACE( nanos_z80pio_intf )
trunk/src/mess/drivers/fm7.c
r17963r17964
5353#include "includes/fm7.h"
5454
5555
56static void fm7_mmr_refresh(address_space*);
56static void fm7_mmr_refresh(address_space&);
5757
5858
5959
r17963r17964
352352      membank("bank1")->set_base(RAM+0x38000);
353353   }
354354   else
355      fm7_mmr_refresh(&space);
355      fm7_mmr_refresh(space);
356356   logerror("BASIC ROM enabled\n");
357357   return 0x00;
358358}
r17963r17964
368368      membank("bank1")->set_base(RAM+0x8000);
369369   }
370370   else
371      fm7_mmr_refresh(&space);
371      fm7_mmr_refresh(space);
372372   logerror("BASIC ROM disabled\n");
373373}
374374
r17963r17964
383383   if(data & 0x02)
384384   {
385385      m_init_rom_en = 0;
386      fm7_mmr_refresh(&space);
386      fm7_mmr_refresh(space);
387387   }
388388   else
389389   {
390390      m_init_rom_en = 1;
391      fm7_mmr_refresh(&space);
391      fm7_mmr_refresh(space);
392392   }
393393}
394394
r17963r17964
985985   return 0xff;
986986}
987987
988static void fm7_update_bank(address_space* space, int bank, UINT8 physical)
988static void fm7_update_bank(address_space & space, int bank, UINT8 physical)
989989{
990   fm7_state *state = space->machine().driver_data<fm7_state>();
990   fm7_state *state = space.machine().driver_data<fm7_state>();
991991   UINT8* RAM = state->memregion("maincpu")->base();
992992   UINT16 size = 0xfff;
993993   char bank_name[10];
r17963r17964
10021002      switch(physical)
10031003      {
10041004         case 0x10:
1005            space->install_readwrite_handler(bank*0x1000,(bank*0x1000)+size,read8_delegate(FUNC(fm7_state::fm7_vram0_r),state),write8_delegate(FUNC(fm7_state::fm7_vram0_w),state));
1005            space.install_readwrite_handler(bank*0x1000,(bank*0x1000)+size,read8_delegate(FUNC(fm7_state::fm7_vram0_r),state),write8_delegate(FUNC(fm7_state::fm7_vram0_w),state));
10061006            break;
10071007         case 0x11:
1008            space->install_readwrite_handler(bank*0x1000,(bank*0x1000)+size,read8_delegate(FUNC(fm7_state::fm7_vram1_r),state),write8_delegate(FUNC(fm7_state::fm7_vram1_w),state));
1008            space.install_readwrite_handler(bank*0x1000,(bank*0x1000)+size,read8_delegate(FUNC(fm7_state::fm7_vram1_r),state),write8_delegate(FUNC(fm7_state::fm7_vram1_w),state));
10091009            break;
10101010         case 0x12:
1011            space->install_readwrite_handler(bank*0x1000,(bank*0x1000)+size,read8_delegate(FUNC(fm7_state::fm7_vram2_r),state),write8_delegate(FUNC(fm7_state::fm7_vram2_w),state));
1011            space.install_readwrite_handler(bank*0x1000,(bank*0x1000)+size,read8_delegate(FUNC(fm7_state::fm7_vram2_r),state),write8_delegate(FUNC(fm7_state::fm7_vram2_w),state));
10121012            break;
10131013         case 0x13:
1014            space->install_readwrite_handler(bank*0x1000,(bank*0x1000)+size,read8_delegate(FUNC(fm7_state::fm7_vram3_r),state),write8_delegate(FUNC(fm7_state::fm7_vram3_w),state));
1014            space.install_readwrite_handler(bank*0x1000,(bank*0x1000)+size,read8_delegate(FUNC(fm7_state::fm7_vram3_r),state),write8_delegate(FUNC(fm7_state::fm7_vram3_w),state));
10151015            break;
10161016         case 0x14:
1017            space->install_readwrite_handler(bank*0x1000,(bank*0x1000)+size,read8_delegate(FUNC(fm7_state::fm7_vram4_r),state),write8_delegate(FUNC(fm7_state::fm7_vram4_w),state));
1017            space.install_readwrite_handler(bank*0x1000,(bank*0x1000)+size,read8_delegate(FUNC(fm7_state::fm7_vram4_r),state),write8_delegate(FUNC(fm7_state::fm7_vram4_w),state));
10181018            break;
10191019         case 0x15:
1020            space->install_readwrite_handler(bank*0x1000,(bank*0x1000)+size,read8_delegate(FUNC(fm7_state::fm7_vram5_r),state),write8_delegate(FUNC(fm7_state::fm7_vram5_w),state));
1020            space.install_readwrite_handler(bank*0x1000,(bank*0x1000)+size,read8_delegate(FUNC(fm7_state::fm7_vram5_r),state),write8_delegate(FUNC(fm7_state::fm7_vram5_w),state));
10211021            break;
10221022         case 0x16:
1023            space->install_readwrite_handler(bank*0x1000,(bank*0x1000)+size,read8_delegate(FUNC(fm7_state::fm7_vram6_r),state),write8_delegate(FUNC(fm7_state::fm7_vram6_w),state));
1023            space.install_readwrite_handler(bank*0x1000,(bank*0x1000)+size,read8_delegate(FUNC(fm7_state::fm7_vram6_r),state),write8_delegate(FUNC(fm7_state::fm7_vram6_w),state));
10241024            break;
10251025         case 0x17:
1026            space->install_readwrite_handler(bank*0x1000,(bank*0x1000)+size,read8_delegate(FUNC(fm7_state::fm7_vram7_r),state),write8_delegate(FUNC(fm7_state::fm7_vram7_w),state));
1026            space.install_readwrite_handler(bank*0x1000,(bank*0x1000)+size,read8_delegate(FUNC(fm7_state::fm7_vram7_r),state),write8_delegate(FUNC(fm7_state::fm7_vram7_w),state));
10271027            break;
10281028         case 0x18:
1029            space->install_readwrite_handler(bank*0x1000,(bank*0x1000)+size,read8_delegate(FUNC(fm7_state::fm7_vram8_r),state),write8_delegate(FUNC(fm7_state::fm7_vram8_w),state));
1029            space.install_readwrite_handler(bank*0x1000,(bank*0x1000)+size,read8_delegate(FUNC(fm7_state::fm7_vram8_r),state),write8_delegate(FUNC(fm7_state::fm7_vram8_w),state));
10301030            break;
10311031         case 0x19:
1032            space->install_readwrite_handler(bank*0x1000,(bank*0x1000)+size,read8_delegate(FUNC(fm7_state::fm7_vram9_r),state),write8_delegate(FUNC(fm7_state::fm7_vram9_w),state));
1032            space.install_readwrite_handler(bank*0x1000,(bank*0x1000)+size,read8_delegate(FUNC(fm7_state::fm7_vram9_r),state),write8_delegate(FUNC(fm7_state::fm7_vram9_w),state));
10331033            break;
10341034         case 0x1a:
1035            space->install_readwrite_handler(bank*0x1000,(bank*0x1000)+size,read8_delegate(FUNC(fm7_state::fm7_vramA_r),state),write8_delegate(FUNC(fm7_state::fm7_vramA_w),state));
1035            space.install_readwrite_handler(bank*0x1000,(bank*0x1000)+size,read8_delegate(FUNC(fm7_state::fm7_vramA_r),state),write8_delegate(FUNC(fm7_state::fm7_vramA_w),state));
10361036            break;
10371037         case 0x1b:
1038            space->install_readwrite_handler(bank*0x1000,(bank*0x1000)+size,read8_delegate(FUNC(fm7_state::fm7_vramB_r),state),write8_delegate(FUNC(fm7_state::fm7_vramB_w),state));
1038            space.install_readwrite_handler(bank*0x1000,(bank*0x1000)+size,read8_delegate(FUNC(fm7_state::fm7_vramB_r),state),write8_delegate(FUNC(fm7_state::fm7_vramB_w),state));
10391039            break;
10401040      }
10411041//      state->membank(bank+1)->set_base(RAM+(physical<<12)-0x10000);
r17963r17964
10431043   }
10441044   if(physical == 0x1c)
10451045   {
1046      space->install_readwrite_handler(bank*0x1000,(bank*0x1000)+size,read8_delegate(FUNC(fm7_state::fm7_console_ram_banked_r),state),write8_delegate(FUNC(fm7_state::fm7_console_ram_banked_w),state));
1046      space.install_readwrite_handler(bank*0x1000,(bank*0x1000)+size,read8_delegate(FUNC(fm7_state::fm7_console_ram_banked_r),state),write8_delegate(FUNC(fm7_state::fm7_console_ram_banked_w),state));
10471047      return;
10481048   }
10491049   if(physical == 0x1d)
10501050   {
1051      space->install_readwrite_handler(bank*0x1000,(bank*0x1000)+size,read8_delegate(FUNC(fm7_state::fm7_sub_ram_ports_banked_r),state),write8_delegate(FUNC(fm7_state::fm7_sub_ram_ports_banked_w),state));
1051      space.install_readwrite_handler(bank*0x1000,(bank*0x1000)+size,read8_delegate(FUNC(fm7_state::fm7_sub_ram_ports_banked_r),state),write8_delegate(FUNC(fm7_state::fm7_sub_ram_ports_banked_w),state));
10521052      return;
10531053   }
10541054   if(physical == 0x35)
10551055   {
10561056      if(state->m_init_rom_en && (state->m_type == SYS_FM11 || state->m_type == SYS_FM16))
10571057      {
1058         RAM = space->machine().root_device().memregion("init")->base();
1059         space->install_read_bank(bank*0x1000,(bank*0x1000)+size,bank_name);
1060         space->nop_write(bank*0x1000,(bank*0x1000)+size);
1058         RAM = space.machine().root_device().memregion("init")->base();
1059         space.install_read_bank(bank*0x1000,(bank*0x1000)+size,bank_name);
1060         space.nop_write(bank*0x1000,(bank*0x1000)+size);
10611061         state->membank(bank_name)->set_base(RAM+(physical<<12)-0x35000);
10621062         return;
10631063      }
r17963r17964
10661066   {
10671067      if(state->m_init_rom_en && (state->m_type != SYS_FM11 && state->m_type != SYS_FM16))
10681068      {
1069         RAM = space->machine().root_device().memregion("init")->base();
1070         space->install_read_bank(bank*0x1000,(bank*0x1000)+size,bank_name);
1071         space->nop_write(bank*0x1000,(bank*0x1000)+size);
1069         RAM = space.machine().root_device().memregion("init")->base();
1070         space.install_read_bank(bank*0x1000,(bank*0x1000)+size,bank_name);
1071         space.nop_write(bank*0x1000,(bank*0x1000)+size);
10721072         state->membank(bank_name)->set_base(RAM+(physical<<12)-0x36000);
10731073         return;
10741074      }
r17963r17964
10771077   {
10781078      if(state->m_basic_rom_en && (state->m_type != SYS_FM11 && state->m_type != SYS_FM16))
10791079      {
1080         RAM = space->machine().root_device().memregion("fbasic")->base();
1081         space->install_read_bank(bank*0x1000,(bank*0x1000)+size,bank_name);
1082         space->nop_write(bank*0x1000,(bank*0x1000)+size);
1080         RAM = space.machine().root_device().memregion("fbasic")->base();
1081         space.install_read_bank(bank*0x1000,(bank*0x1000)+size,bank_name);
1082         space.nop_write(bank*0x1000,(bank*0x1000)+size);
10831083         state->membank(bank_name)->set_base(RAM+(physical<<12)-0x38000);
10841084         return;
10851085      }
10861086   }
1087   space->install_readwrite_bank(bank*0x1000,(bank*0x1000)+size,bank_name);
1087   space.install_readwrite_bank(bank*0x1000,(bank*0x1000)+size,bank_name);
10881088   state->membank(bank_name)->set_base(RAM+(physical<<12));
10891089}
10901090
1091static void fm7_mmr_refresh(address_space* space)
1091static void fm7_mmr_refresh(address_space& space)
10921092{
1093   fm7_state *state = space->machine().driver_data<fm7_state>();
1093   fm7_state *state = space.machine().driver_data<fm7_state>();
10941094   int x;
10951095   UINT16 window_addr;
10961096   UINT8* RAM = state->memregion("maincpu")->base();
r17963r17964
11151115      window_addr = ((state->m_mmr.window_offset << 8) + 0x7c00) & 0xffff;
11161116//      if(window_addr < 0xfc00)
11171117      {
1118         space->install_readwrite_bank(0x7c00,0x7fff,"bank24");
1118         space.install_readwrite_bank(0x7c00,0x7fff,"bank24");
11191119         state->membank("bank24")->set_base(RAM+window_addr);
11201120      }
11211121   }
r17963r17964
11271127   {
11281128      m_mmr.bank_addr[m_mmr.segment][offset] = data;
11291129      if(m_mmr.enabled)
1130         fm7_update_bank(&space,offset,data);
1130         fm7_update_bank(space,offset,data);
11311131      logerror("MMR: Segment %i, bank %i, set to  0x%02x\n",m_mmr.segment,offset,data);
11321132      return;
11331133   }
r17963r17964
11351135   {
11361136      case 0x10:
11371137         m_mmr.segment = data & 0x07;
1138         fm7_mmr_refresh(&space);
1138         fm7_mmr_refresh(space);
11391139         logerror("MMR: Active segment set to %i\n",m_mmr.segment);
11401140         break;
11411141      case 0x12:
11421142         m_mmr.window_offset = data;
1143         fm7_mmr_refresh(&space);
1143         fm7_mmr_refresh(space);
11441144         logerror("MMR: Window offset set to %02x\n",data);
11451145         break;
11461146      case 0x13:
11471147         m_mmr.mode = data;
11481148         m_mmr.enabled = data & 0x80;
1149         fm7_mmr_refresh(&space);
1149         fm7_mmr_refresh(space);
11501150         logerror("MMR: Mode register set to %02x\n",data);
11511151         break;
11521152   }
r17963r17964
19631963   }
19641964   if(m_type == SYS_FM77AV || m_type == SYS_FM77AV40EX || m_type == SYS_FM11)
19651965   {
1966      fm7_mmr_refresh(machine().device("maincpu")->memory().space(AS_PROGRAM));
1966      fm7_mmr_refresh(*machine().device("maincpu")->memory().space(AS_PROGRAM));
19671967   }
19681968   if(m_type == SYS_FM11)
19691969   {
trunk/src/mess/drivers/vidbrain.c
r17963r17964
449449   }
450450}
451451
452static UINT8 memory_read_byte(address_space *space, offs_t address) { return space->read_byte(address); }
452static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
453453
454454static UV201_INTERFACE( uv_intf )
455455{
trunk/src/mess/drivers/indiana.c
r17963r17964
8484DRIVER_INIT_MEMBER(indiana_state,indiana)
8585{
8686   pc_vga_init(machine(), indiana_vga_setting, NULL);
87   pc_vga_io_init(machine(), machine().device("maincpu")->memory().space(AS_PROGRAM), 0x7f7a0000, machine().device("maincpu")->memory().space(AS_PROGRAM), 0x7f600000);
87   pc_vga_io_init(machine(), *machine().device("maincpu")->memory().space(AS_PROGRAM), 0x7f7a0000, *machine().device("maincpu")->memory().space(AS_PROGRAM), 0x7f600000);
8888}
8989
9090/* ROM definition */
trunk/src/mess/drivers/trs80m2.c
r17963r17964
694694//  Z80DMA_INTERFACE( dma_intf )
695695//-------------------------------------------------
696696
697static UINT8 memory_read_byte(address_space *space, offs_t address) { return space->read_byte(address); }
698static void memory_write_byte(address_space *space, offs_t address, UINT8 data) { space->write_byte(address, data); }
697static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
698static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
699699
700700static Z80DMA_INTERFACE( dma_intf )
701701{
trunk/src/mess/drivers/a5105.c
r17963r17964
454454
455455void a5105_state::machine_reset()
456456{
457   address_space *space = m_maincpu->space(AS_PROGRAM);
458   a5105_ab_w(*space, 0, 9); // turn motor off
457   address_space &space = *m_maincpu->space(AS_PROGRAM);
458   a5105_ab_w(space, 0, 9); // turn motor off
459459   beep_set_frequency(m_beep, 500);
460460
461461   m_ram_base = (UINT8*)machine().device<ram_device>(RAM_TAG)->pointer();
trunk/src/mess/drivers/nc.c
r17963r17964
321321static void nc_refresh_memory_bank_config(running_machine &machine, int bank)
322322{
323323   nc_state *state = machine.driver_data<nc_state>();
324   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
324   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
325325   int mem_type;
326326   int mem_bank;
327327   char bank1[10];
r17963r17964
332332   mem_type = (state->m_memory_config[bank]>>6) & 0x03;
333333   mem_bank = state->m_memory_config[bank] & 0x03f;
334334
335   space->install_read_bank((bank * 0x4000), (bank * 0x4000) + 0x3fff, nc_bankhandler_r[bank]);
335   space.install_read_bank((bank * 0x4000), (bank * 0x4000) + 0x3fff, nc_bankhandler_r[bank]);
336336
337337   switch (mem_type)
338338   {
r17963r17964
348348
349349         state->membank(bank1)->set_base(addr);
350350
351         space->nop_write((bank * 0x4000), (bank * 0x4000) + 0x3fff);
351         space.nop_write((bank * 0x4000), (bank * 0x4000) + 0x3fff);
352352         LOG(("BANK %d: ROM %d\n",bank,mem_bank));
353353      }
354354      break;
r17963r17964
365365         state->membank(bank1)->set_base(addr);
366366         state->membank(bank5)->set_base(addr);
367367
368         space->install_write_bank((bank * 0x4000), (bank * 0x4000) + 0x3fff, nc_bankhandler_w[bank]);
368         space.install_write_bank((bank * 0x4000), (bank * 0x4000) + 0x3fff, nc_bankhandler_w[bank]);
369369         LOG(("BANK %d: RAM\n",bank));
370370      }
371371      break;
r17963r17964
389389               /* yes */
390390               state->membank(bank5)->set_base(addr);
391391
392               space->install_write_bank((bank * 0x4000), (bank * 0x4000) + 0x3fff, nc_bankhandler_w[bank]);
392               space.install_write_bank((bank * 0x4000), (bank * 0x4000) + 0x3fff, nc_bankhandler_w[bank]);
393393            }
394394            else
395395            {
396396               /* no */
397               space->nop_write((bank * 0x4000), (bank * 0x4000) + 0x3fff);
397               space.nop_write((bank * 0x4000), (bank * 0x4000) + 0x3fff);
398398            }
399399
400400            LOG(("BANK %d: CARD-RAM\n",bank));
r17963r17964
402402         else
403403         {
404404            /* if no card connected, then writes fail */
405            space->nop_readwrite((bank * 0x4000), (bank * 0x4000) + 0x3fff);
405            space.nop_readwrite((bank * 0x4000), (bank * 0x4000) + 0x3fff);
406406         }
407407      }
408408      break;
trunk/src/mess/drivers/p8k.c
r17963r17964
219219   p8k_daisy_interrupt(device, state);
220220}
221221
222static UINT8 memory_read_byte(address_space *space, offs_t address) { return space->read_byte(address); }
223static void memory_write_byte(address_space *space, offs_t address, UINT8 data) { space->write_byte(address, data); }
222static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
223static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
224224
225225static Z80DMA_INTERFACE( p8k_dma_intf )
226226{
trunk/src/mess/drivers/pentagon.c
r17963r17964
112112{
113113   UINT8 *messram = machine().device<ram_device>(RAM_TAG)->pointer();
114114   device_t *beta = machine().device(BETA_DISK_TAG);
115   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
115   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
116116
117   space->install_read_bank(0x0000, 0x3fff, "bank1");
118   space->unmap_write(0x0000, 0x3fff);
117   space.install_read_bank(0x0000, 0x3fff, "bank1");
118   space.unmap_write(0x0000, 0x3fff);
119119
120120   if (beta->started())  {
121121      betadisk_enable(beta);
122122      betadisk_clear_status(beta);
123123   }
124   space->set_direct_update_handler(direct_update_delegate(FUNC(pentagon_state::pentagon_direct), this));
124   space.set_direct_update_handler(direct_update_delegate(FUNC(pentagon_state::pentagon_direct), this));
125125
126126   memset(messram,0,128*1024);
127127
trunk/src/mess/drivers/nes.c
r17963r17964
3838
3939WRITE8_MEMBER(nes_state::nes_vh_sprite_dma_w)
4040{
41   m_ppu->spriteram_dma(&space, data);
41   m_ppu->spriteram_dma(space, data);
4242}
4343
4444static ADDRESS_MAP_START( nes_map, AS_PROGRAM, 8, nes_state )
trunk/src/mess/drivers/pce220.c
r17963r17964
873873
874874void pce220_state::machine_reset()
875875{
876   address_space *space = m_maincpu->space(AS_PROGRAM);
877   space->unmap_write(0x0000, 0x3fff);
876   address_space &space = *m_maincpu->space(AS_PROGRAM);
877   space.unmap_write(0x0000, 0x3fff);
878878
879879   // install the boot code into the first bank
880880   membank("bank1")->set_base(machine().root_device().memregion("user1")->base() + 0x0000);
trunk/src/mess/drivers/pcw16.c
r17963r17964
209209/* flash 0 */
210210static  READ8_HANDLER(pcw16_flash0_bank_handler0_r)
211211{
212   return pcw16_flash0_bank_handler_r(space->machine(),0, offset);
212   return pcw16_flash0_bank_handler_r(space.machine(),0, offset);
213213}
214214
215215static  READ8_HANDLER(pcw16_flash0_bank_handler1_r)
216216{
217   return pcw16_flash0_bank_handler_r(space->machine(),1, offset);
217   return pcw16_flash0_bank_handler_r(space.machine(),1, offset);
218218}
219219
220220static  READ8_HANDLER(pcw16_flash0_bank_handler2_r)
221221{
222   return pcw16_flash0_bank_handler_r(space->machine(),2, offset);
222   return pcw16_flash0_bank_handler_r(space.machine(),2, offset);
223223}
224224
225225static  READ8_HANDLER(pcw16_flash0_bank_handler3_r)
226226{
227   return pcw16_flash0_bank_handler_r(space->machine(),3, offset);
227   return pcw16_flash0_bank_handler_r(space.machine(),3, offset);
228228}
229229
230230/* flash 1 */
231231static  READ8_HANDLER(pcw16_flash1_bank_handler0_r)
232232{
233   return pcw16_flash1_bank_handler_r(space->machine(),0, offset);
233   return pcw16_flash1_bank_handler_r(space.machine(),0, offset);
234234}
235235
236236static  READ8_HANDLER(pcw16_flash1_bank_handler1_r)
237237{
238   return pcw16_flash1_bank_handler_r(space->machine(),1, offset);
238   return pcw16_flash1_bank_handler_r(space.machine(),1, offset);
239239}
240240
241241static  READ8_HANDLER(pcw16_flash1_bank_handler2_r)
242242{
243   return pcw16_flash1_bank_handler_r(space->machine(),2, offset);
243   return pcw16_flash1_bank_handler_r(space.machine(),2, offset);
244244}
245245
246246static  READ8_HANDLER(pcw16_flash1_bank_handler3_r)
247247{
248   return pcw16_flash1_bank_handler_r(space->machine(),3, offset);
248   return pcw16_flash1_bank_handler_r(space.machine(),3, offset);
249249}
250250
251251static const struct { read8_space_func func; const char *name; } pcw16_flash0_bank_handlers_r[4] =
r17963r17964
289289/* flash 0 */
290290static WRITE8_HANDLER(pcw16_flash0_bank_handler0_w)
291291{
292   pcw16_flash0_bank_handler_w(space->machine(),0, offset, data);
292   pcw16_flash0_bank_handler_w(space.machine(),0, offset, data);
293293}
294294
295295
296296static WRITE8_HANDLER(pcw16_flash0_bank_handler1_w)
297297{
298   pcw16_flash0_bank_handler_w(space->machine(),1, offset, data);
298   pcw16_flash0_bank_handler_w(space.machine(),1, offset, data);
299299}
300300
301301static WRITE8_HANDLER(pcw16_flash0_bank_handler2_w)
302302{
303   pcw16_flash0_bank_handler_w(space->machine(),2, offset, data);
303   pcw16_flash0_bank_handler_w(space.machine(),2, offset, data);
304304}
305305
306306static WRITE8_HANDLER(pcw16_flash0_bank_handler3_w)
307307{
308   pcw16_flash0_bank_handler_w(space->machine(),3, offset, data);
308   pcw16_flash0_bank_handler_w(space.machine(),3, offset, data);
309309}
310310
311311
312312/* flash 1 */
313313static WRITE8_HANDLER(pcw16_flash1_bank_handler0_w)
314314{
315   pcw16_flash1_bank_handler_w(space->machine(),0, offset, data);
315   pcw16_flash1_bank_handler_w(space.machine(),0, offset, data);
316316}
317317
318318
319319static WRITE8_HANDLER(pcw16_flash1_bank_handler1_w)
320320{
321   pcw16_flash1_bank_handler_w(space->machine(),1, offset, data);
321   pcw16_flash1_bank_handler_w(space.machine(),1, offset, data);
322322}
323323
324324static WRITE8_HANDLER(pcw16_flash1_bank_handler2_w)
325325{
326   pcw16_flash1_bank_handler_w(space->machine(),2, offset, data);
326   pcw16_flash1_bank_handler_w(space.machine(),2, offset, data);
327327}
328328
329329static WRITE8_HANDLER(pcw16_flash1_bank_handler3_w)
330330{
331   pcw16_flash1_bank_handler_w(space->machine(),3, offset, data);
331   pcw16_flash1_bank_handler_w(space.machine(),3, offset, data);
332332}
333333
334334static const struct { write8_space_func func; const char *name; } pcw16_flash0_bank_handlers_w[4] =
r17963r17964
369369/*
370370static void pcw16_set_bank_handlers(running_machine &machine, int bank, PCW16_RAM_TYPE type)
371371{
372    address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
372    address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
373373    pcw16_state *state = machine.driver_data<pcw16_state>();
374374    switch (type) {
375375    case PCW16_MEM_ROM:
376376        // rom
377        space->install_read_bank((bank * 0x4000), (bank * 0x4000) + 0x3fff, pcw16_read_handler_dram[bank]);
378        space->nop_write((bank * 0x4000), (bank * 0x4000) + 0x3fff);
377        space.install_read_bank((bank * 0x4000), (bank * 0x4000) + 0x3fff, pcw16_read_handler_dram[bank]);
378        space.nop_write((bank * 0x4000), (bank * 0x4000) + 0x3fff);
379379        break;
380380
381381    case PCW16_MEM_FLASH_1:
382382        // sram
383        space->install_legacy_read_handler((bank * 0x4000), (bank * 0x4000) + 0x3fff, pcw16_flash0_bank_handlers_r[bank].func, pcw16_flash0_bank_handlers_r[bank].name);
384        space->install_legacy_write_handler((bank * 0x4000), (bank * 0x4000) + 0x3fff, pcw16_flash0_bank_handlers_w[bank].func, pcw16_flash0_bank_handlers_w[bank].name);
383        space.install_legacy_read_handler((bank * 0x4000), (bank * 0x4000) + 0x3fff, pcw16_flash0_bank_handlers_r[bank].func, pcw16_flash0_bank_handlers_r[bank].name);
384        space.install_legacy_write_handler((bank * 0x4000), (bank * 0x4000) + 0x3fff, pcw16_flash0_bank_handlers_w[bank].func, pcw16_flash0_bank_handlers_w[bank].name);
385385        break;
386386
387387    case PCW16_MEM_FLASH_2:
388        space->install_legacy_read_handler((bank * 0x4000), (bank * 0x4000) + 0x3fff, pcw16_flash1_bank_handlers_r[bank].func, pcw16_flash1_bank_handlers_r[bank].name);
389        space->install_legacy_write_handler((bank * 0x4000), (bank * 0x4000) + 0x3fff, pcw16_flash1_bank_handlers_w[bank].func, pcw16_flash1_bank_handlers_w[bank].name);
388        space.install_legacy_read_handler((bank * 0x4000), (bank * 0x4000) + 0x3fff, pcw16_flash1_bank_handlers_r[bank].func, pcw16_flash1_bank_handlers_r[bank].name);
389        space.install_legacy_write_handler((bank * 0x4000), (bank * 0x4000) + 0x3fff, pcw16_flash1_bank_handlers_w[bank].func, pcw16_flash1_bank_handlers_w[bank].name);
390390        break;
391391
392392    case PCW16_MEM_NONE:
393        space->install_read_handler((bank * 0x4000), (bank * 0x4000) + 0x3fff, read8_delegate(FUNC(pcw16_state::pcw16_no_mem_r),state));
394        space->nop_write((bank * 0x4000), (bank * 0x4000) + 0x3fff);
393        space.install_read_handler((bank * 0x4000), (bank * 0x4000) + 0x3fff, read8_delegate(FUNC(pcw16_state::pcw16_no_mem_r),state));
394        space.nop_write((bank * 0x4000), (bank * 0x4000) + 0x3fff);
395395        break;
396396
397397    default:
398398    case PCW16_MEM_DRAM:
399399        // dram
400        space->install_read_bank((bank * 0x4000), (bank * 0x4000) + 0x3fff, pcw16_read_handler_dram[bank]);
401        space->install_write_bank((bank * 0x4000), (bank * 0x4000) + 0x3fff, pcw16_write_handler_dram[bank]);
400        space.install_read_bank((bank * 0x4000), (bank * 0x4000) + 0x3fff, pcw16_read_handler_dram[bank]);
401        space.install_write_bank((bank * 0x4000), (bank * 0x4000) + 0x3fff, pcw16_write_handler_dram[bank]);
402402        break;
403403    }
404404
r17963r17964
12541254/* write to Super I/O chip. FDC Data Rate. */
12551255WRITE8_MEMBER(pcw16_state::pcw16_superio_fdc_datarate_w)
12561256{
1257   pc_fdc_w(&space, PC_FDC_DATA_RATE_REGISTER,data);
1257   pc_fdc_w(space, PC_FDC_DATA_RATE_REGISTER,data);
12581258}
12591259
12601260/* write to Super I/O chip. FDC Digital output register */
12611261WRITE8_MEMBER(pcw16_state::pcw16_superio_fdc_digital_output_register_w)
12621262{
1263   pc_fdc_w(&space, PC_FDC_DIGITAL_OUTPUT_REGISTER, data);
1263   pc_fdc_w(space, PC_FDC_DIGITAL_OUTPUT_REGISTER, data);
12641264}
12651265
12661266/* write to Super I/O chip. FDC Data Register */
12671267WRITE8_MEMBER(pcw16_state::pcw16_superio_fdc_data_w)
12681268{
1269   pc_fdc_w(&space, PC_FDC_DATA_REGISTER, data);
1269   pc_fdc_w(space, PC_FDC_DATA_REGISTER, data);
12701270}
12711271
12721272/* write to Super I/O chip. FDC Data Register */
12731273READ8_MEMBER(pcw16_state::pcw16_superio_fdc_data_r)
12741274{
1275   return pc_fdc_r(&space, PC_FDC_DATA_REGISTER);
1275   return pc_fdc_r(space, PC_FDC_DATA_REGISTER);
12761276}
12771277
12781278/* write to Super I/O chip. FDC Main Status Register */
12791279READ8_MEMBER(pcw16_state::pcw16_superio_fdc_main_status_register_r)
12801280{
1281   return pc_fdc_r(&space, PC_FDC_MAIN_STATUS_REGISTER);
1281   return pc_fdc_r(space, PC_FDC_MAIN_STATUS_REGISTER);
12821282}
12831283
12841284READ8_MEMBER(pcw16_state::pcw16_superio_fdc_digital_input_register_r)
12851285{
1286   return pc_fdc_r(&space, PC_FDC_DIGITIAL_INPUT_REGISTER);
1286   return pc_fdc_r(space, PC_FDC_DIGITIAL_INPUT_REGISTER);
12871287}
12881288
12891289static void pcw16_fdc_interrupt(running_machine &machine, int state)
trunk/src/mess/drivers/next.c
r17963r17964
304304   dma_slot &ds = dma_slots[slot];
305305   ds.drq = state;
306306   if(state && (ds.state & DMA_ENABLE)) {
307      address_space *space = maincpu->space(AS_PROGRAM);
307      address_space &space = *maincpu->space(AS_PROGRAM);
308308      if(ds.state & DMA_READ) {
309309         while(ds.drq) {
310310            dma_check_update(slot);
r17963r17964
317317               logerror("DMA: bus error on read slot %d\n", slot);
318318               return;
319319            }
320            space->write_byte(ds.current++, val);
320            space.write_byte(ds.current++, val);
321321            dma_check_end(slot, eof);
322322            if(!(ds.state & DMA_ENABLE))
323323               return;
r17963r17964
325325      } else {
326326         while(ds.drq) {
327327            dma_check_update(slot);
328            UINT8 val = space->read_byte(ds.current++);
328            UINT8 val = space.read_byte(ds.current++);
329329            bool eof = ds.current == (ds.limit & 0x7fffffff) && (ds.limit & 0x80000000);
330330            bool err;
331331            dma_write(slot, val, eof, err);
trunk/src/mess/drivers/apollo.c
r17963r17964
483483         // no more than 192 read/write handlers may be used
484484         // see table_assign_handler in memory.c
485485         if (parity_error_handler_install_counter < 40) {
486            //memory_install_read32_handler(&space, ram_base_address+offset*4, ram_base_address+offset*4+3, 0xffffffff, 0, ram_with_parity_r);
486            //memory_install_read32_handler(space, ram_base_address+offset*4, ram_base_address+offset*4+3, 0xffffffff, 0, ram_with_parity_r);
487487            space.install_read_handler(ram_base_address+offset*4, ram_base_address+offset*4+3, 0xffffffff,0,read32_delegate(FUNC(apollo_state::ram_with_parity_r),this));
488488            parity_error_handler_is_installed = 1;
489489            parity_error_handler_install_counter++;
r17963r17964
495495
496496      // uninstall not supported, reinstall previous read handler instead
497497
498      // memory_install_rom(&space, ram_base_address, ram_end_address, 0xffffffff, 0, messram_ptr.v);
498      // memory_install_rom(space, ram_base_address, ram_end_address, 0xffffffff, 0, messram_ptr.v);
499499      space.install_rom(ram_base_address,ram_end_address,0xffffffff,0,&m_messram_ptr[0]);
500500
501501      parity_error_handler_is_installed = 0;
trunk/src/mess/drivers/dc.c
r17963r17964
4242
4343static READ64_HANDLER( dcus_idle_skip_r )
4444{
45   if (space->device().safe_pc()==0xc0ba52a)
46      space->device().execute().spin_until_time(attotime::from_usec(2500));
47   //  device_spinuntil_int(&space->device());
45   if (space.device().safe_pc()==0xc0ba52a)
46      space.device().execute().spin_until_time(attotime::from_usec(2500));
47   //  device_spinuntil_int(&space.device());
4848
49   return space->machine().driver_data<dc_state>()->dc_ram[0x2303b0/8];
49   return space.machine().driver_data<dc_state>()->dc_ram[0x2303b0/8];
5050}
5151
5252static READ64_HANDLER( dcjp_idle_skip_r )
5353{
54   if (space->device().safe_pc()==0xc0bac62)
55      space->device().execute().spin_until_time(attotime::from_usec(2500));
56   //  device_spinuntil_int(&space->device());
54   if (space.device().safe_pc()==0xc0bac62)
55      space.device().execute().spin_until_time(attotime::from_usec(2500));
56   //  device_spinuntil_int(&space.device());
5757
58   return space->machine().driver_data<dc_state>()->dc_ram[0x2302f8/8];
58   return space.machine().driver_data<dc_state>()->dc_ram[0x2302f8/8];
5959}
6060
6161DRIVER_INIT_MEMBER(dc_state,dc)
r17963r17964
110110
111111static READ64_HANDLER( dc_arm_r )
112112{
113   dc_state *state = space->machine().driver_data<dc_state>();
113   dc_state *state = space.machine().driver_data<dc_state>();
114114
115115   return *((UINT64 *)state->dc_sound_ram.target()+offset);
116116}
117117
118118static WRITE64_HANDLER( dc_arm_w )
119119{
120   dc_state *state = space->machine().driver_data<dc_state>();
120   dc_state *state = space.machine().driver_data<dc_state>();
121121
122122   COMBINE_DATA((UINT64 *)state->dc_sound_ram.target() + offset);
123123}
r17963r17964
126126 // SB_LMMODE0
127127 static WRITE64_HANDLER( ta_texture_directpath0_w )
128128 {
129   dc_state *state = space->machine().driver_data<dc_state>();
129   dc_state *state = space.machine().driver_data<dc_state>();
130130
131131   int mode = state->pvrctrl_regs[SB_LMMODE0]&1;
132132   if (mode&1)
r17963r17964
143143 // SB_LMMODE1
144144 static WRITE64_HANDLER( ta_texture_directpath1_w )
145145 {
146   dc_state *state = space->machine().driver_data<dc_state>();
146   dc_state *state = space.machine().driver_data<dc_state>();
147147
148148   int mode = state->pvrctrl_regs[SB_LMMODE1]&1;
149149   if (mode&1)
trunk/src/mess/drivers/basic52.c
r17963r17964
8080static void to_term(device_t *device, int data )
8181{
8282   basic52_state *state = device->machine().driver_data<basic52_state>();
83   address_space *space = device->memory().space(AS_PROGRAM);
84   state->m_terminal->write(*space, 0, data);
83   address_space &space = *device->memory().space(AS_PROGRAM);
84   state->m_terminal->write(space, 0, data);
8585}
8686
8787static int from_term(device_t *device)
trunk/src/mess/drivers/aquarius.c
r17963r17964
216216   /* install expansion memory if available */
217217   if (machine().device<ram_device>(RAM_TAG)->size() > 0x1000)
218218   {
219      address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
219      address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
220220
221      space->install_readwrite_bank(0x4000, 0x4000 + machine().device<ram_device>(RAM_TAG)->size() - 0x1000 - 1, "bank1");
221      space.install_readwrite_bank(0x4000, 0x4000 + machine().device<ram_device>(RAM_TAG)->size() - 0x1000 - 1, "bank1");
222222      membank("bank1")->set_base(machine().device<ram_device>(RAM_TAG)->pointer());
223223   }
224224}
trunk/src/mess/drivers/lynx.c
r17963r17964
138138static QUICKLOAD_LOAD( lynx )
139139{
140140   device_t *cpu = image.device().machine().device("maincpu");
141   address_space *space = image.device().machine().device("maincpu")->memory().space(AS_PROGRAM);
141   address_space &space = *image.device().machine().device("maincpu")->memory().space(AS_PROGRAM);
142142   UINT8 *data = NULL;
143143   UINT8 *rom = image.device().machine().root_device().memregion("maincpu")->base();
144144   UINT8 header[10]; // 80 08 dw Start dw Len B S 9 3
r17963r17964
165165   }
166166
167167   for (i = 0; i < length; i++)
168      space->write_byte(start + i, data[i]);
168      space.write_byte(start + i, data[i]);
169169
170170   free(data);
171171
172172   rom[0x1fc] = start & 0xff;
173173   rom[0x1fd] = start >> 8;
174   space->write_byte(0x1fc, start & 0xff);
175   space->write_byte(0x1fd, start >> 8);
174   space.write_byte(0x1fc, start & 0xff);
175   space.write_byte(0x1fd, start >> 8);
176176
177177   cpu->state().set_pc(start);
178178
trunk/src/mess/drivers/x1twin.c
r17963r17964
107107
108108static INPUT_CHANGED( ipl_reset )
109109{
110   //address_space *space = field.machine().device("x1_cpu")->memory().space(AS_PROGRAM);
110   //address_space &space = *field.machine().device("x1_cpu")->memory().space(AS_PROGRAM);
111111   x1twin_state *state = field.machine().driver_data<x1twin_state>();
112112
113113   state->m_x1_cpu->set_input_line(INPUT_LINE_RESET, newval ? CLEAR_LINE : ASSERT_LINE);
trunk/src/mess/drivers/specpls3.c
r17963r17964
183183
184184static WRITE8_HANDLER(spectrum_plus3_port_3ffd_w)
185185{
186   spectrum_state *state = space->machine().driver_data<spectrum_state>();
186   spectrum_state *state = space.machine().driver_data<spectrum_state>();
187187   if (state->m_floppy==1)
188      upd765_data_w(space->machine().device("upd765"), *space, 0,data);
188      upd765_data_w(space.machine().device("upd765"), space, 0,data);
189189}
190190
191191static  READ8_HANDLER(spectrum_plus3_port_3ffd_r)
192192{
193   spectrum_state *state = space->machine().driver_data<spectrum_state>();
193   spectrum_state *state = space.machine().driver_data<spectrum_state>();
194194   if (state->m_floppy==0)
195195      return 0xff;
196196   else
197      return upd765_data_r(space->machine().device("upd765"), *space, 0);
197      return upd765_data_r(space.machine().device("upd765"), space, 0);
198198}
199199
200200
201201static  READ8_HANDLER(spectrum_plus3_port_2ffd_r)
202202{
203   spectrum_state *state = space->machine().driver_data<spectrum_state>();
203   spectrum_state *state = space.machine().driver_data<spectrum_state>();
204204   if (state->m_floppy==0)
205205         return 0xff;
206206   else
207         return upd765_status_r(space->machine().device("upd765"), *space, 0);
207         return upd765_status_r(space.machine().device("upd765"), space, 0);
208208}
209209
210210
211211void spectrum_plus3_update_memory(running_machine &machine)
212212{
213213   spectrum_state *state = machine.driver_data<spectrum_state>();
214   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
214   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
215215   UINT8 *messram = machine.device<ram_device>(RAM_TAG)->pointer();
216216
217217   if (state->m_port_7ffd_data & 8)
r17963r17964
258258         ChosenROM = machine.root_device().memregion("maincpu")->base() + 0x010000 + (ROMSelection << 14);
259259
260260         state->membank("bank1")->set_base(ChosenROM);
261         space->unmap_write(0x0000, 0x3fff);
261         space.unmap_write(0x0000, 0x3fff);
262262
263263         logerror("rom switch: %02x\n", ROMSelection);
264264   }
r17963r17964
277277         ram_data = messram + (memory_selection[0] << 14);
278278         state->membank("bank1")->set_base(ram_data);
279279         /* allow writes to 0x0000-0x03fff */
280         space->install_write_bank(0x0000, 0x3fff, "bank1");
280         space.install_write_bank(0x0000, 0x3fff, "bank1");
281281
282282         ram_data = messram + (memory_selection[1] << 14);
283283         state->membank("bank2")->set_base(ram_data);
r17963r17964
301301      /* D4 - ROM select - which rom paged into 0x0000-0x03fff */
302302      /* D5 - Disable paging */
303303
304   spectrum_state *state = space->machine().driver_data<spectrum_state>();
304   spectrum_state *state = space.machine().driver_data<spectrum_state>();
305305
306306   /* disable paging? */
307307   if (state->m_port_7ffd_data & 0x20)
r17963r17964
311311   state->m_port_7ffd_data = data;
312312
313313   /* update memory */
314   spectrum_plus3_update_memory(space->machine());
314   spectrum_plus3_update_memory(space.machine());
315315}
316316
317317static WRITE8_HANDLER(spectrum_plus3_port_1ffd_w)
r17963r17964
321321   /* D3 - Disk motor on/off */
322322   /* D4 - parallel port strobe */
323323
324   spectrum_state *state = space->machine().driver_data<spectrum_state>();
324   spectrum_state *state = space.machine().driver_data<spectrum_state>();
325325
326   floppy_mon_w(floppy_get_device(space->machine(), 0), !BIT(data, 3));
327   floppy_mon_w(floppy_get_device(space->machine(), 1), !BIT(data, 3));
328   floppy_drive_set_ready_state(floppy_get_device(space->machine(), 0), 1, 1);
329   floppy_drive_set_ready_state(floppy_get_device(space->machine(), 1), 1, 1);
326   floppy_mon_w(floppy_get_device(space.machine(), 0), !BIT(data, 3));
327   floppy_mon_w(floppy_get_device(space.machine(), 1), !BIT(data, 3));
328   floppy_drive_set_ready_state(floppy_get_device(space.machine(), 0), 1, 1);
329   floppy_drive_set_ready_state(floppy_get_device(space.machine(), 1), 1, 1);
330330
331331   state->m_port_1ffd_data = data;
332332
r17963r17964
334334   if ((state->m_port_7ffd_data & 0x20)==0)
335335   {
336336         /* no */
337         spectrum_plus3_update_memory(space->machine());
337         spectrum_plus3_update_memory(space.machine());
338338   }
339339}
340340
trunk/src/mess/drivers/apexc.c
r17963r17964
397397static INTERRUPT_GEN( apexc_interrupt )
398398{
399399   apexc_state *state = device->machine().driver_data<apexc_state>();
400   address_space* space = device->machine().device("maincpu")->memory().space(AS_PROGRAM);
400   address_space& space = *device->machine().device("maincpu")->memory().space(AS_PROGRAM);
401401   UINT32 edit_keys;
402402   int control_keys;
403403
r17963r17964
478478
479479      if (control_keys & panel_write) {
480480         /* write memory */
481         space->write_dword(device->state().state_int(APEXC_ML_FULL)<<2, state->m_panel_data_reg);
481         space.write_dword(device->state().state_int(APEXC_ML_FULL)<<2, state->m_panel_data_reg);
482482      }
483483      else {
484484         /* read memory */
485         state->m_panel_data_reg = space->read_dword(device->state().state_int(APEXC_ML_FULL)<<2);
485         state->m_panel_data_reg = space.read_dword(device->state().state_int(APEXC_ML_FULL)<<2);
486486      }
487487   }
488488
trunk/src/mess/drivers/x68k.c
r17963r17964
346346// 4 channel DMA controller (Hitachi HD63450)
347347static WRITE16_HANDLER( x68k_dmac_w )
348348{
349   device_t* device = space->machine().device("hd63450");
350   hd63450_w(device, *space, offset, data, mem_mask);
349   device_t* device = space.machine().device("hd63450");
350   hd63450_w(device, space, offset, data, mem_mask);
351351}
352352
353353static READ16_HANDLER( x68k_dmac_r )
354354{
355   device_t* device = space->machine().device("hd63450");
356   return hd63450_r(device, *space, offset, mem_mask);
355   device_t* device = space.machine().device("hd63450");
356   return hd63450_r(device, space, offset, mem_mask);
357357}
358358
359359static void x68k_keyboard_ctrl_w(x68k_state *state, int data)
r17963r17964
583583*/
584584static READ16_HANDLER( x68k_scc_r )
585585{
586   scc8530_t *scc = space->machine().device<scc8530_t>("scc");
586   scc8530_t *scc = space.machine().device<scc8530_t>("scc");
587587   offset %= 4;
588588   switch(offset)
589589   {
590590   case 0:
591      return scc->reg_r(*space, 0);
591      return scc->reg_r(space, 0);
592592   case 1:
593      return x68k_read_mouse(space->machine());
593      return x68k_read_mouse(space.machine());
594594   case 2:
595      return scc->reg_r(*space, 1);
595      return scc->reg_r(space, 1);
596596   case 3:
597      return scc->reg_r(*space, 3);
597      return scc->reg_r(space, 3);
598598   default:
599599      return 0xff;
600600   }
r17963r17964
602602
603603static WRITE16_HANDLER( x68k_scc_w )
604604{
605   x68k_state *state = space->machine().driver_data<x68k_state>();
606   scc8530_t *scc = space->machine().device<scc8530_t>("scc");
605   x68k_state *state = space.machine().driver_data<x68k_state>();
606   scc8530_t *scc = space.machine().device<scc8530_t>("scc");
607607   offset %= 4;
608608
609609   switch(offset)
610610   {
611611   case 0:
612      scc->reg_w(*space, 0,(UINT8)data);
612      scc->reg_w(space, 0,(UINT8)data);
613613      if((scc->get_reg_b(5) & 0x02) != state->m_scc_prev)
614614      {
615615         if(scc->get_reg_b(5) & 0x02)  // Request to Send
r17963r17964
622622      }
623623      break;
624624   case 1:
625      scc->reg_w(*space, 2,(UINT8)data);
625      scc->reg_w(space, 2,(UINT8)data);
626626      break;
627627   case 2:
628      scc->reg_w(*space, 1,(UINT8)data);
628      scc->reg_w(space, 1,(UINT8)data);
629629      break;
630630   case 3:
631      scc->reg_w(*space, 3,(UINT8)data);
631      scc->reg_w(space, 3,(UINT8)data);
632632      break;
633633   }
634634   state->m_scc_prev = scc->get_reg_b(5) & 0x02;
r17963r17964
967967// NEC uPD72065 at 0xe94000
968968static WRITE16_HANDLER( x68k_fdc_w )
969969{
970   x68k_state *state = space->machine().driver_data<x68k_state>();
971   device_t *fdc = space->machine().device("upd72065");
970   x68k_state *state = space.machine().driver_data<x68k_state>();
971   device_t *fdc = space.machine().device("upd72065");
972972   unsigned int drive, x;
973973   switch(offset)
974974   {
975975   case 0x00:
976976   case 0x01:
977      upd765_data_w(fdc, *space, 0,data);
977      upd765_data_w(fdc, space, 0,data);
978978      break;
979979   case 0x02:  // drive option signal control
980980      x = data & 0x0f;
r17963r17964
989989               output_set_indexed_value("eject_drv",drive,(data & 0x40) ? 1 : 0);
990990               if(data & 0x20)  // ejects disk
991991               {
992                  (dynamic_cast<device_image_interface *>(floppy_get_device(space->machine(), drive)))->unload();
993                  floppy_mon_w(floppy_get_device(space->machine(), drive), ASSERT_LINE);
992                  (dynamic_cast<device_image_interface *>(floppy_get_device(space.machine(), drive)))->unload();
993                  floppy_mon_w(floppy_get_device(space.machine(), drive), ASSERT_LINE);
994994               }
995995            }
996996         }
r17963r17964
10011001   case 0x03:
10021002      state->m_fdc.media_density[data & 0x03] = data & 0x10;
10031003      state->m_fdc.motor[data & 0x03] = data & 0x80;
1004      floppy_mon_w(floppy_get_device(space->machine(), data & 0x03), !BIT(data, 7));
1004      floppy_mon_w(floppy_get_device(space.machine(), data & 0x03), !BIT(data, 7));
10051005      if(data & 0x80)
10061006      {
10071007         for(drive=0;drive<4;drive++) // enable motor for this drive
10081008         {
10091009            if(drive == (data & 0x03))
10101010            {
1011               floppy_mon_w(floppy_get_device(space->machine(), drive), CLEAR_LINE);
1011               floppy_mon_w(floppy_get_device(space.machine(), drive), CLEAR_LINE);
10121012               output_set_indexed_value("access_drv",drive,0);
10131013            }
10141014            else
r17963r17964
10191019      {
10201020         for(drive=0;drive<4;drive++)
10211021         {
1022            floppy_mon_w(floppy_get_device(space->machine(), drive), ASSERT_LINE);
1022            floppy_mon_w(floppy_get_device(space.machine(), drive), ASSERT_LINE);
10231023            output_set_indexed_value("access_drv",drive,1);
10241024         }
10251025      }
1026      floppy_drive_set_ready_state(floppy_get_device(space->machine(), 0),1,1);
1027      floppy_drive_set_ready_state(floppy_get_device(space->machine(), 1),1,1);
1028      floppy_drive_set_ready_state(floppy_get_device(space->machine(), 2),1,1);
1029      floppy_drive_set_ready_state(floppy_get_device(space->machine(), 3),1,1);
1026      floppy_drive_set_ready_state(floppy_get_device(space.machine(), 0),1,1);
1027      floppy_drive_set_ready_state(floppy_get_device(space.machine(), 1),1,1);
1028      floppy_drive_set_ready_state(floppy_get_device(space.machine(), 2),1,1);
1029      floppy_drive_set_ready_state(floppy_get_device(space.machine(), 3),1,1);
10301030#if 0
10311031      for(drive=0;drive<4;drive++)
10321032      {
r17963r17964
10391039      logerror("FDC: Drive #%i: Drive selection set to %02x\n",data & 0x03,data);
10401040      break;
10411041   default:
1042//      logerror("FDC: [%08x] Wrote %04x to invalid FDC port %04x\n",space->device().safe_pc(),data,offset);
1042//      logerror("FDC: [%08x] Wrote %04x to invalid FDC port %04x\n",space.device().safe_pc(),data,offset);
10431043      break;
10441044   }
10451045}
10461046
10471047static READ16_HANDLER( x68k_fdc_r )
10481048{
1049   x68k_state *state = space->machine().driver_data<x68k_state>();
1049   x68k_state *state = space.machine().driver_data<x68k_state>();
10501050   unsigned int ret;
10511051   int x;
1052   device_t *fdc = space->machine().device("upd72065");
1052   device_t *fdc = space.machine().device("upd72065");
10531053
10541054   switch(offset)
10551055   {
10561056   case 0x00:
1057      return upd765_status_r(fdc, *space, 0);
1057      return upd765_status_r(fdc, space, 0);
10581058   case 0x01:
1059      return upd765_data_r(fdc, *space, 0);
1059      return upd765_data_r(fdc, space, 0);
10601060   case 0x02:
10611061      ret = 0x00;
10621062      for(x=0;x<4;x++)
r17963r17964
11261126   {
11271127   case 0x00:
11281128   case 0x01:
1129      ym2151_w(space->machine().device("ym2151"), *space, offset, data);
1129      ym2151_w(space.machine().device("ym2151"), space, offset, data);
11301130      break;
11311131   }
11321132}
r17963r17964
11341134static READ16_HANDLER( x68k_fm_r )
11351135{
11361136   if(offset == 0x01)
1137      return ym2151_r(space->machine().device("ym2151"), *space, 1);
1137      return ym2151_r(space.machine().device("ym2151"), space, 1);
11381138
11391139   return 0xffff;
11401140}
r17963r17964
11721172*/
11731173static WRITE16_HANDLER( x68k_ioc_w )
11741174{
1175   x68k_state *state = space->machine().driver_data<x68k_state>();
1175   x68k_state *state = space.machine().driver_data<x68k_state>();
11761176   switch(offset)
11771177   {
11781178   case 0x00:
r17963r17964
12051205
12061206static READ16_HANDLER( x68k_ioc_r )
12071207{
1208   x68k_state *state = space->machine().driver_data<x68k_state>();
1208   x68k_state *state = space.machine().driver_data<x68k_state>();
12091209   switch(offset)
12101210   {
12111211   case 0x00:
r17963r17964
12381238*/
12391239static WRITE16_HANDLER( x68k_sysport_w )
12401240{
1241   x68k_state *state = space->machine().driver_data<x68k_state>();
1241   x68k_state *state = space.machine().driver_data<x68k_state>();
12421242   switch(offset)
12431243   {
12441244   case 0x00:
r17963r17964
12551255      state->m_sysport.sram_writeprotect = data;
12561256      break;
12571257   default:
1258//      logerror("SYS: [%08x] Wrote %04x to invalid or unimplemented system port %04x\n",space->device().safe_pc(),data,offset);
1258//      logerror("SYS: [%08x] Wrote %04x to invalid or unimplemented system port %04x\n",space.device().safe_pc(),data,offset);
12591259      break;
12601260   }
12611261}
12621262
12631263static READ16_HANDLER( x68k_sysport_r )
12641264{
1265   x68k_state *state = space->machine().driver_data<x68k_state>();
1265   x68k_state *state = space.machine().driver_data<x68k_state>();
12661266   int ret = 0;
12671267   switch(offset)
12681268   {
r17963r17964
12841284#ifdef UNUSED_FUNCTION
12851285static READ16_HANDLER( x68k_mfp_r )
12861286{
1287   device_t *x68k_mfp = space->machine().device(MC68901_TAG);
1287   device_t *x68k_mfp = space.machine().device(MC68901_TAG);
12881288
12891289   return mc68901_register_r(x68k_mfp, offset);
12901290}
r17963r17964
12921292
12931293static READ16_HANDLER( x68k_mfp_r )
12941294{
1295   x68k_state *state = space->machine().driver_data<x68k_state>();
1295   x68k_state *state = space.machine().driver_data<x68k_state>();
12961296
12971297   // Initial settings indicate that IRQs are generated for FM (YM2151), Receive buffer error or full,
12981298    // MFP Timer C, and the power switch
1299//  logerror("MFP: [%08x] Reading offset %i\n",space->device().safe_pc(),offset);
1299//  logerror("MFP: [%08x] Reading offset %i\n",space.device().safe_pc(),offset);
13001300    switch(offset)
13011301    {
13021302#if 0
r17963r17964
13101310//          ret |= 0x08;  // FM IRQ signal
13111311        if(machine.primary_screen->hpos() > state->m_crtc.width - 32)
13121312            ret |= 0x80;  // Hsync signal
1313//      logerror("MFP: [%08x] Reading offset %i (ret=%02x)\n",space->device().safe_pc(),offset,ret);
1313//      logerror("MFP: [%08x] Reading offset %i (ret=%02x)\n",space.device().safe_pc(),offset,ret);
13141314        return ret;  // bit 5 is always 1
13151315    case 3:
13161316        return state->m_mfp.iera;
r17963r17964
13501350    case 23:
13511351        return x68k_keyboard_pop_scancode(state);
13521352    default:
1353      if (ACCESSING_BITS_0_7) return state->m_mfpdev->read(*space, offset);
1353      if (ACCESSING_BITS_0_7) return state->m_mfpdev->read(space, offset);
13541354    }
13551355    return 0xffff;
13561356}
13571357
13581358static WRITE16_HANDLER( x68k_mfp_w )
13591359{
1360   x68k_state *state = space->machine().driver_data<x68k_state>();
1360   x68k_state *state = space.machine().driver_data<x68k_state>();
13611361
13621362   /* For the Interrupt registers, the bits are set out as such:
13631363       Reg A - bit 7: GPIP7 (HSync)
r17963r17964
14771477         // Keyboard control command.
14781478         state->m_mfp.usart.send_buffer = data;
14791479         x68k_keyboard_ctrl_w(state, data);
1480//          logerror("MFP: [%08x] USART Sent data %04x\n",space->device().safe_pc(),data);
1480//          logerror("MFP: [%08x] USART Sent data %04x\n",space.device().safe_pc(),data);
14811481      }
14821482      break;
14831483   default:
1484      if (ACCESSING_BITS_0_7) state->m_mfpdev->write(*space, offset, data & 0xff);
1484      if (ACCESSING_BITS_0_7) state->m_mfpdev->write(space, offset, data & 0xff);
14851485      return;
14861486   }
14871487}
r17963r17964
14891489
14901490static WRITE16_HANDLER( x68k_ppi_w )
14911491{
1492   i8255_device *ppi = space->machine().device<i8255_device>("ppi8255");
1493   ppi->write(*space,offset & 0x03,data);
1492   i8255_device *ppi = space.machine().device<i8255_device>("ppi8255");
1493   ppi->write(space,offset & 0x03,data);
14941494}
14951495
14961496static READ16_HANDLER( x68k_ppi_r )
14971497{
1498   i8255_device *ppi = space->machine().device<i8255_device>("ppi8255");
1499   return ppi->read(*space,offset & 0x03);
1498   i8255_device *ppi = space.machine().device<i8255_device>("ppi8255");
1499   return ppi->read(space,offset & 0x03);
15001500}
15011501
15021502static READ16_HANDLER( x68k_rtc_r )
15031503{
1504   x68k_state *state = space->machine().driver_data<x68k_state>();
1504   x68k_state *state = space.machine().driver_data<x68k_state>();
15051505
1506   return state->m_rtc->read(*space, offset);
1506   return state->m_rtc->read(space, offset);
15071507}
15081508
15091509static WRITE16_HANDLER( x68k_rtc_w )
15101510{
1511   x68k_state *state = space->machine().driver_data<x68k_state>();
1511   x68k_state *state = space.machine().driver_data<x68k_state>();
15121512
1513   state->m_rtc->write(*space, offset, data);
1513   state->m_rtc->write(space, offset, data);
15141514}
15151515
15161516static WRITE_LINE_DEVICE_HANDLER( x68k_rtc_alarm_irq )
r17963r17964
15401540
15411541static WRITE16_HANDLER( x68k_sram_w )
15421542{
1543   x68k_state *state = space->machine().driver_data<x68k_state>();
1543   x68k_state *state = space.machine().driver_data<x68k_state>();
15441544
15451545   if(state->m_sysport.sram_writeprotect == 0x31)
15461546   {
r17963r17964
15501550
15511551static READ16_HANDLER( x68k_sram_r )
15521552{
1553   x68k_state *state = space->machine().driver_data<x68k_state>();
1553   x68k_state *state = space.machine().driver_data<x68k_state>();
15541554   // HACKS!
15551555//  if(offset == 0x5a/2)  // 0x5a should be 0 if no SASI HDs are present.
15561556//      return 0x0000;
15571557   if(offset == 0x08/2)
1558      return space->machine().device<ram_device>(RAM_TAG)->size() >> 16;  // RAM size
1558      return space.machine().device<ram_device>(RAM_TAG)->size() >> 16;  // RAM size
15591559#if 0
15601560   if(offset == 0x46/2)
15611561      return 0x0024;
r17963r17964
15691569
15701570static READ32_HANDLER( x68k_sram32_r )
15711571{
1572   x68k_state *state = space->machine().driver_data<x68k_state>();
1572   x68k_state *state = space.machine().driver_data<x68k_state>();
15731573   if(offset == 0x08/4)
1574      return (space->machine().device<ram_device>(RAM_TAG)->size() & 0xffff0000);  // RAM size
1574      return (space.machine().device<ram_device>(RAM_TAG)->size() & 0xffff0000);  // RAM size
15751575#if 0
15761576   if(offset == 0x46/2)
15771577      return 0x0024;
r17963r17964
15851585
15861586static WRITE32_HANDLER( x68k_sram32_w )
15871587{
1588   x68k_state *state = space->machine().driver_data<x68k_state>();
1588   x68k_state *state = space.machine().driver_data<x68k_state>();
15891589   if(state->m_sysport.sram_writeprotect == 0x31)
15901590   {
15911591      COMBINE_DATA(state->m_nvram32 + offset);
r17963r17964
15941594
15951595static WRITE16_HANDLER( x68k_vid_w )
15961596{
1597   x68k_state *state = space->machine().driver_data<x68k_state>();
1597   x68k_state *state = space.machine().driver_data<x68k_state>();
15981598   int val;
15991599   if(offset < 0x100)  // Graphic layer palette
16001600   {
16011601      COMBINE_DATA(state->m_video.gfx_pal+offset);
16021602      val = state->m_video.gfx_pal[offset];
1603      palette_set_color_rgb(space->machine(),offset,(val & 0x07c0) >> 3,(val & 0xf800) >> 8,(val & 0x003e) << 2);
1603      palette_set_color_rgb(space.machine(),offset,(val & 0x07c0) >> 3,(val & 0xf800) >> 8,(val & 0x003e) << 2);
16041604      return;
16051605   }
16061606
r17963r17964
16081608   {
16091609      COMBINE_DATA(state->m_video.text_pal+(offset-0x100));
16101610      val = state->m_video.text_pal[offset-0x100];
1611      palette_set_color_rgb(space->machine(),offset,(val & 0x07c0) >> 3,(val & 0xf800) >> 8,(val & 0x003e) << 2);
1611      palette_set_color_rgb(space.machine(),offset,(val & 0x07c0) >> 3,(val & 0xf800) >> 8,(val & 0x003e) << 2);
16121612      return;
16131613   }
16141614
r17963r17964
16491649
16501650static READ16_HANDLER( x68k_vid_r )
16511651{
1652   x68k_state *state = space->machine().driver_data<x68k_state>();
1652   x68k_state *state = space.machine().driver_data<x68k_state>();
16531653   if(offset < 0x100)
16541654      return state->m_video.gfx_pal[offset];
16551655
r17963r17964
17091709
17101710static READ16_HANDLER( x68k_rom0_r )
17111711{
1712   x68k_state *state = space->machine().driver_data<x68k_state>();
1712   x68k_state *state = space.machine().driver_data<x68k_state>();
17131713   /* this location contains the address of some expansion device ROM, if no ROM exists,
17141714       then access causes a bus error */
17151715   state->m_current_vector[2] = 0x02;  // bus error
17161716   state->m_current_irq_line = 2;
1717//  space->machine().device("maincpu")->execute().set_input_line_and_vector(2,ASSERT_LINE,state->m_current_vector[2]);
1717//  space.machine().device("maincpu")->execute().set_input_line_and_vector(2,ASSERT_LINE,state->m_current_vector[2]);
17181718   if(state->ioport("options")->read() & 0x02)
17191719   {
17201720      offset *= 2;
17211721      if(ACCESSING_BITS_0_7)
17221722         offset++;
1723      space->machine().scheduler().timer_set(space->machine().device<cpu_device>("maincpu")->cycles_to_attotime(4), FUNC(x68k_bus_error), 0xbffffc+offset);
1723      space.machine().scheduler().timer_set(space.machine().device<cpu_device>("maincpu")->cycles_to_attotime(4), FUNC(x68k_bus_error), 0xbffffc+offset);
17241724   }
17251725   return 0xff;
17261726}
17271727
17281728static WRITE16_HANDLER( x68k_rom0_w )
17291729{
1730   x68k_state *state = space->machine().driver_data<x68k_state>();
1730   x68k_state *state = space.machine().driver_data<x68k_state>();
17311731   /* this location contains the address of some expansion device ROM, if no ROM exists,
17321732       then access causes a bus error */
17331733   state->m_current_vector[2] = 0x02;  // bus error
17341734   state->m_current_irq_line = 2;
1735//  space->machine().device("maincpu")->execute().set_input_line_and_vector(2,ASSERT_LINE,state->m_current_vector[2]);
1735//  space.machine().device("maincpu")->execute().set_input_line_and_vector(2,ASSERT_LINE,state->m_current_vector[2]);
17361736   if(state->ioport("options")->read() & 0x02)
17371737   {
17381738      offset *= 2;
17391739      if(ACCESSING_BITS_0_7)
17401740         offset++;
1741      space->machine().scheduler().timer_set(space->machine().device<cpu_device>("maincpu")->cycles_to_attotime(4), FUNC(x68k_bus_error), 0xbffffc+offset);
1741      space.machine().scheduler().timer_set(space.machine().device<cpu_device>("maincpu")->cycles_to_attotime(4), FUNC(x68k_bus_error), 0xbffffc+offset);
17421742   }
17431743}
17441744
17451745static READ16_HANDLER( x68k_emptyram_r )
17461746{
1747   x68k_state *state = space->machine().driver_data<x68k_state>();
1747   x68k_state *state = space.machine().driver_data<x68k_state>();
17481748   /* this location is unused RAM, access here causes a bus error
17491749       Often a method for detecting amount of installed RAM, is to read or write at 1MB intervals, until a bus error occurs */
17501750   state->m_current_vector[2] = 0x02;  // bus error
17511751   state->m_current_irq_line = 2;
1752//  space->machine().device("maincpu")->execute().set_input_line_and_vector(2,ASSERT_LINE,state->m_current_vector[2]);
1752//  space.machine().device("maincpu")->execute().set_input_line_and_vector(2,ASSERT_LINE,state->m_current_vector[2]);
17531753   if(state->ioport("options")->read() & 0x02)
17541754   {
17551755      offset *= 2;
17561756      if(ACCESSING_BITS_0_7)
17571757         offset++;
1758      space->machine().scheduler().timer_set(space->machine().device<cpu_device>("maincpu")->cycles_to_attotime(4), FUNC(x68k_bus_error), offset);
1758      space.machine().scheduler().timer_set(space.machine().device<cpu_device>("maincpu")->cycles_to_attotime(4), FUNC(x68k_bus_error), offset);
17591759   }
17601760   return 0xff;
17611761}
17621762
17631763static WRITE16_HANDLER( x68k_emptyram_w )
17641764{
1765   x68k_state *state = space->machine().driver_data<x68k_state>();
1765   x68k_state *state = space.machine().driver_data<x68k_state>();
17661766   /* this location is unused RAM, access here causes a bus error
17671767       Often a method for detecting amount of installed RAM, is to read or write at 1MB intervals, until a bus error occurs */
17681768   state->m_current_vector[2] = 0x02;  // bus error
17691769   state->m_current_irq_line = 2;
1770//  space->machine().device("maincpu")->execute().set_input_line_and_vector(2,ASSERT_LINE,state->m_current_vector[2]);
1770//  space.machine().device("maincpu")->execute().set_input_line_and_vector(2,ASSERT_LINE,state->m_current_vector[2]);
17711771   if(state->ioport("options")->read() & 0x02)
17721772   {
17731773      offset *= 2;
17741774      if(ACCESSING_BITS_0_7)
17751775         offset++;
1776      space->machine().scheduler().timer_set(space->machine().device<cpu_device>("maincpu")->cycles_to_attotime(4), FUNC(x68k_bus_error), offset);
1776      space.machine().scheduler().timer_set(space.machine().device<cpu_device>("maincpu")->cycles_to_attotime(4), FUNC(x68k_bus_error), offset);
17771777   }
17781778}
17791779
17801780static READ16_HANDLER( x68k_exp_r )
17811781{
1782   x68k_state *state = space->machine().driver_data<x68k_state>();
1782   x68k_state *state = space.machine().driver_data<x68k_state>();
17831783   /* These are expansion devices, if not present, they cause a bus error */
17841784   if(state->ioport("options")->read() & 0x02)
17851785   {
r17963r17964
17881788      offset *= 2;
17891789      if(ACCESSING_BITS_0_7)
17901790         offset++;
1791      space->machine().scheduler().timer_set(space->machine().device<cpu_device>("maincpu")->cycles_to_attotime(16), FUNC(x68k_bus_error), 0xeafa00+offset);
1791      space.machine().scheduler().timer_set(space.machine().device<cpu_device>("maincpu")->cycles_to_attotime(16), FUNC(x68k_bus_error), 0xeafa00+offset);
17921792//      machine.device("maincpu")->execute().set_input_line_and_vector(2,ASSERT_LINE,state->m_current_vector[2]);
17931793   }
17941794   return 0xffff;
r17963r17964
17961796
17971797static WRITE16_HANDLER( x68k_exp_w )
17981798{
1799   x68k_state *state = space->machine().driver_data<x68k_state>();
1799   x68k_state *state = space.machine().driver_data<x68k_state>();
18001800   /* These are expansion devices, if not present, they cause a bus error */
18011801   if(state->ioport("options")->read() & 0x02)
18021802   {
r17963r17964
18051805      offset *= 2;
18061806      if(ACCESSING_BITS_0_7)
18071807         offset++;
1808      space->machine().scheduler().timer_set(space->machine().device<cpu_device>("maincpu")->cycles_to_attotime(16), FUNC(x68k_bus_error), 0xeafa00+offset);
1808      space.machine().scheduler().timer_set(space.machine().device<cpu_device>("maincpu")->cycles_to_attotime(16), FUNC(x68k_bus_error), 0xeafa00+offset);
18091809//      machine.device("maincpu")->execute().set_input_line_and_vector(2,ASSERT_LINE,state->m_current_vector[2]);
18101810   }
18111811}
r17963r17964
26222622
26232623MACHINE_START_MEMBER(x68k_state,x68000)
26242624{
2625   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
2625   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
26262626   /*  Install RAM handlers  */
26272627   m_spriteram = (UINT16*)(*memregion("user1"));
2628   space->install_legacy_read_handler(0x000000,0xbffffb,0xffffffff,0,FUNC(x68k_emptyram_r));
2629   space->install_legacy_write_handler(0x000000,0xbffffb,0xffffffff,0,FUNC(x68k_emptyram_w));
2630   space->install_readwrite_bank(0x000000,machine().device<ram_device>(RAM_TAG)->size()-1,0xffffffff,0,"bank1");
2628   space.install_legacy_read_handler(0x000000,0xbffffb,0xffffffff,0,FUNC(x68k_emptyram_r));
2629   space.install_legacy_write_handler(0x000000,0xbffffb,0xffffffff,0,FUNC(x68k_emptyram_w));
2630   space.install_readwrite_bank(0x000000,machine().device<ram_device>(RAM_TAG)->size()-1,0xffffffff,0,"bank1");
26312631   membank("bank1")->set_base(machine().device<ram_device>(RAM_TAG)->pointer());
2632   space->install_legacy_read_handler(0xc00000,0xdfffff,0xffffffff,0,FUNC(x68k_gvram_r));
2633   space->install_legacy_write_handler(0xc00000,0xdfffff,0xffffffff,0,FUNC(x68k_gvram_w));
2632   space.install_legacy_read_handler(0xc00000,0xdfffff,0xffffffff,0,FUNC(x68k_gvram_r));
2633   space.install_legacy_write_handler(0xc00000,0xdfffff,0xffffffff,0,FUNC(x68k_gvram_w));
26342634   membank("bank2")->set_base(m_gvram16);  // so that code in VRAM is executable - needed for Terra Cresta
2635   space->install_legacy_read_handler(0xe00000,0xe7ffff,0xffffffff,0,FUNC(x68k_tvram_r));
2636   space->install_legacy_write_handler(0xe00000,0xe7ffff,0xffffffff,0,FUNC(x68k_tvram_w));
2635   space.install_legacy_read_handler(0xe00000,0xe7ffff,0xffffffff,0,FUNC(x68k_tvram_r));
2636   space.install_legacy_write_handler(0xe00000,0xe7ffff,0xffffffff,0,FUNC(x68k_tvram_w));
26372637   membank("bank3")->set_base(m_tvram16);  // so that code in VRAM is executable - needed for Terra Cresta
2638   space->install_legacy_read_handler(0xed0000,0xed3fff,0xffffffff,0,FUNC(x68k_sram_r));
2639   space->install_legacy_write_handler(0xed0000,0xed3fff,0xffffffff,0,FUNC(x68k_sram_w));
2638   space.install_legacy_read_handler(0xed0000,0xed3fff,0xffffffff,0,FUNC(x68k_sram_r));
2639   space.install_legacy_write_handler(0xed0000,0xed3fff,0xffffffff,0,FUNC(x68k_sram_w));
26402640   membank("bank4")->set_base(m_nvram16);  // so that code in SRAM is executable, there is an option for booting from SRAM
26412641
26422642   // start keyboard timer
r17963r17964
26522652
26532653MACHINE_START_MEMBER(x68k_state,x68030)
26542654{
2655   address_space *space = machine().device("maincpu")->memory().space(AS_PROGRAM);
2655   address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM);
26562656   /*  Install RAM handlers  */
26572657   m_spriteram = (UINT16*)(*memregion("user1"));
2658   space->install_legacy_read_handler(0x000000,0xbffffb,0xffffffff,0,FUNC(x68k_rom0_r),0xffffffff);
2659   space->install_legacy_write_handler(0x000000,0xbffffb,0xffffffff,0,FUNC(x68k_rom0_w),0xffffffff);
2660   space->install_readwrite_bank(0x000000,machine().device<ram_device>(RAM_TAG)->size()-1,0xffffffff,0,"bank1");
2658   space.install_legacy_read_handler(0x000000,0xbffffb,0xffffffff,0,FUNC(x68k_rom0_r),0xffffffff);
2659   space.install_legacy_write_handler(0x000000,0xbffffb,0xffffffff,0,FUNC(x68k_rom0_w),0xffffffff);
2660   space.install_readwrite_bank(0x000000,machine().device<ram_device>(RAM_TAG)->size()-1,0xffffffff,0,"bank1");
26612661   membank("bank1")->set_base(machine().device<ram_device>(RAM_TAG)->pointer());
2662   space->install_legacy_read_handler(0xc00000,0xdfffff,0xffffffff,0,FUNC(x68k_gvram32_r));
2663   space->install_legacy_write_handler(0xc00000,0xdfffff,0xffffffff,0,FUNC(x68k_gvram32_w));
2662   space.install_legacy_read_handler(0xc00000,0xdfffff,0xffffffff,0,FUNC(x68k_gvram32_r));
2663   space.install_legacy_write_handler(0xc00000,0xdfffff,0xffffffff,0,FUNC(x68k_gvram32_w));
26642664   membank("bank2")->set_base(m_gvram32);  // so that code in VRAM is executable - needed for Terra Cresta
2665   space->install_legacy_read_handler(0xe00000,0xe7ffff,0xffffffff,0,FUNC(x68k_tvram32_r));
2666   space->install_legacy_write_handler(0xe00000,0xe7ffff,0xffffffff,0,FUNC(x68k_tvram32_w));
2665   space.install_legacy_read_handler(0xe00000,0xe7ffff,0xffffffff,0,FUNC(x68k_tvram32_r));
2666   space.install_legacy_write_handler(0xe00000,0xe7ffff,0xffffffff,0,FUNC(x68k_tvram32_w));
26672667   membank("bank3")->set_base(m_tvram32);  // so that code in VRAM is executable - needed for Terra Cresta
2668   space->install_legacy_read_handler(0xed0000,0xed3fff,0xffffffff,0,FUNC(x68k_sram32_r));
2669   space->install_legacy_write_handler(0xed0000,0xed3fff,0xffffffff,0,FUNC(x68k_sram32_w));
2668   space.install_legacy_read_handler(0xed0000,0xed3fff,0xffffffff,0,FUNC(x68k_sram32_r));
2669   space.install_legacy_write_handler(0xed0000,0xed3fff,0xffffffff,0,FUNC(x68k_sram32_w));
26702670   membank("bank4")->set_base(m_nvram32);  // so that code in SRAM is executable, there is an option for booting from SRAM
26712671
26722672   // start keyboard timer
trunk/src/mess/drivers/px4.c
r17963r17964
497497}
498498
499499/* helper function to map rom capsules */
500static void install_rom_capsule(address_space *space, int size, const char *region)
500static void install_rom_capsule(address_space &space, int size, const char *region)
501501{
502   px4_state *state = space->machine().driver_data<px4_state>();
502   px4_state *state = space.machine().driver_data<px4_state>();
503503
504504   /* ram, part 1 */
505   space->install_readwrite_bank(0x0000, 0xdfff - size, "bank1");
505   space.install_readwrite_bank(0x0000, 0xdfff - size, "bank1");
506506   state->membank("bank1")->set_base(state->m_ram->pointer());
507507
508508   /* actual rom data, part 1 */
509   space->install_read_bank(0xe000 - size, 0xffff - size, "bank2");
510   space->nop_write(0xe000 - size, 0xffff - size);
511   state->membank("bank2")->set_base(space->machine().root_device().memregion(region)->base() + (size - 0x2000));
509   space.install_read_bank(0xe000 - size, 0xffff - size, "bank2");
510   space.nop_write(0xe000 - size, 0xffff - size);
511   state->membank("bank2")->set_base(space.machine().root_device().memregion(region)->base() + (size - 0x2000));
512512
513513   /* rom data, part 2 */
514514   if (size != 0x2000)
515515   {
516      space->install_read_bank(0x10000 - size, 0xdfff, "bank3");
517      space->nop_write(0x10000 - size, 0xdfff);
516      space.install_read_bank(0x10000 - size, 0xdfff, "bank3");
517      space.nop_write(0x10000 - size, 0xdfff);
518518      state->membank("bank3")->set_base(state->memregion(region)->base());
519519   }
520520
521521   /* ram, continued */
522   space->install_readwrite_bank(0xe000, 0xffff, "bank4");
522   space.install_readwrite_bank(0xe000, 0xffff, "bank4");
523523   state->membank("bank4")->set_base(state->m_ram->pointer() + 0xe000);
524524}
525525
526526/* bank register */
527527WRITE8_MEMBER(px4_state::px4_bankr_w)
528528{
529   address_space *space_program = machine().device("maincpu")->memory().space(AS_PROGRAM);
529   address_space &space_program = *machine().device("maincpu")->memory().space(AS_PROGRAM);
530530
531531   if (VERBOSE)
532532      logerror("%s: px4_bankr_w (0x%02x)\n", machine().describe_context(), data);
r17963r17964
538538   {
539539   case 0x00:
540540      /* system bank */
541      space_program->install_read_bank(0x0000, 0x7fff, "bank1");
542      space_program->nop_write(0x0000, 0x7fff);
541      space_program.install_read_bank(0x0000, 0x7fff, "bank1");
542      space_program.nop_write(0x0000, 0x7fff);
543543      membank("bank1")->set_base(machine().root_device().memregion("os")->base());
544      space_program->install_readwrite_bank(0x8000, 0xffff, "bank2");
544      space_program.install_readwrite_bank(0x8000, 0xffff, "bank2");
545545      membank("bank2")->set_base(m_ram->pointer() + 0x8000);
546546      break;
547547
548548   case 0x04:
549549      /* memory */
550      space_program->install_readwrite_bank(0x0000, 0xffff, "bank1");
550      space_program.install_readwrite_bank(0x0000, 0xffff, "bank1");
551551      membank("bank1")->set_base(m_ram->pointer());
552552      break;
553553
trunk/src/mess/drivers/instruct.c
r17963r17964
218218
219219QUICKLOAD_LOAD( instruct )
220220{
221   address_space *space = image.device().machine().device("maincpu")->memory().space(AS_PROGRAM);
221   address_space &space = *image.device().machine().device("maincpu")->memory().space(AS_PROGRAM);
222222   int i;
223223   int quick_addr = 0x0100;
224224   int exec_addr;
r17963r17964
275275
276276   for (i = quick_addr; i < quick_length; i++)
277277   {
278      space->write_byte(i, quick_data[i]);
278      space.write_byte(i, quick_data[i]);
279279   }
280280
281281   /* display a message about the loaded quickload */
trunk/src/mess/drivers/mmodular.c
r17963r17964
644644
645645   latch_data = data;
646646//    logerror("acad_write_latch %02x\n",data);
647   if (data != 0xff) mboard_write_board_8(&space,0, data);
647   if (data != 0xff) mboard_write_board_8(space,0, data);
648648}
649649
650650WRITE8_MEMBER(polgar_state::milano_write_board)
r17963r17964
754754   UINT8 data = 0;
755755
756756   if (monteciv_select[0] == 0xff && monteciv_select[1] == 0xff) {
757         data = mboard_read_board_8(&space,0);
757         data = mboard_read_board_8(space,0);
758758   } else {
759759      if (monteciv_select[0] == 0x0) {
760760         data = ioport("BUTTONS_MONTE2")->read();
r17963r17964
792792      data = ioport("BUTTONS_ACAD")->read();
793793   } else {
794794//      if (latch_data & 0x7f) {
795      data = mboard_read_board_8(&space,0);
795      data = mboard_read_board_8(space,0);
796796//      data = milano_read_board(space,0);
797797
798798//          logerror("ReadingBoard %02x\n",latch_data);
799799//          line = get_first_cleared_bit(latch_data);
800800//          tmp = machine.root_device().ioport(board_lines[line])->read();
801//          mboard_write_board_8(&space,0, latch_data);
802//          data = mboard_read_board_8(&space,0);
801//          mboard_write_board_8(space,0, latch_data);
802//          data = mboard_read_board_8(space,0);
803803//          logerror("BoardRead Port Offset = %d data %02x Latch %02x\n", offset,data,latch_data);
804804//          printf  ("BoardRead Port Offset = %d data %02x Latch %02x\n", offset,data,latch_data);
805805//      } else {
r17963r17964
885885
886886}
887887
888static void write_IOenable(unsigned char data,address_space *space) {
888static void write_IOenable(unsigned char data,address_space &space) {
889889
890   hd44780_device * hd44780 = space->machine().device<hd44780_device>("hd44780");
891   device_t *speaker = space->machine().device("beep");
890   hd44780_device * hd44780 = space.machine().device<hd44780_device>("hd44780");
891   device_t *speaker = space.machine().device("beep");
892892
893893   if (BIT(data,5) && BIT(data,4)) {
894894      if (BIT(data,1)) {
r17963r17964
899899         // MAME core does not appear to have this opcode timed right.
900900         // This also allows 'fake' clocks to test ELO at impossibly high speeds on real hardware
901901         // The original programmer says RAM is 2x as fast as the ROM on the 030 machines, maybe waitstates can be put in MAME core someday
902//          cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(50));
902//          cpu_spinuntil_time(space.cpu, ATTOTIME_IN_USEC(50));
903903         if (BIT(data,0)) {
904904            logerror("Write LCD_DATA [%02x] [%c]\n",lcd32_char,lcd32_char);
905905//              printf("Write LCD_DATA [%02x] [%c]\n",lcd32_char,lcd32_char);
906            hd44780->data_write(*space, 128, lcd32_char);
906            hd44780->data_write(space, 128, lcd32_char);
907907         } else {
908908            logerror("Write LCD_CTRL [%02x] [%c]\n",lcd32_char,lcd32_char);
909909//              printf("Write LCD_CTRL [%02x] [%c]\n",lcd32_char,lcd32_char);
910            hd44780->control_write(*space, 128, lcd32_char);
910            hd44780->control_write(space, 128, lcd32_char);
911911         }
912912      }
913913
r17963r17964
920920
921921WRITE32_MEMBER(polgar_state::write_IOenables_32){
922922
923   write_IOenable(data>>24,&space);
923   write_IOenable(data>>24,space);
924924}
925925
926926WRITE16_MEMBER(polgar_state::write_IOenables)
927927{
928   write_IOenable(data>>8,&space);
928   write_IOenable(data>>8,space);
929929}
930930
931931/* Unknown read/write */
trunk/src/mess/drivers/timex.c
r17963r17964
171171
172172static  READ8_HANDLER(ts2068_port_f4_r)
173173{
174   spectrum_state *state = space->machine().driver_data<spectrum_state>();
174   spectrum_state *state = space.machine().driver_data<spectrum_state>();
175175
176176   return state->m_port_f4_data;
177177}
178178
179179static WRITE8_HANDLER(ts2068_port_f4_w)
180180{
181   spectrum_state *state = space->machine().driver_data<spectrum_state>();
181   spectrum_state *state = space.machine().driver_data<spectrum_state>();
182182
183183   state->m_port_f4_data = data;
184   ts2068_update_memory(space->machine());
184   ts2068_update_memory(space.machine());
185185}
186186
187187static  READ8_HANDLER(ts2068_port_ff_r)
188188{
189   spectrum_state *state = space->machine().driver_data<spectrum_state>();
189   spectrum_state *state = space.machine().driver_data<spectrum_state>();
190190
191191   return state->m_port_ff_data;
192192}
r17963r17964
199199           Bit  6   17ms Interrupt Inhibit
200200           Bit  7   Cartridge (0) / EXROM (1) select
201201        */
202   spectrum_state *state = space->machine().driver_data<spectrum_state>();
202   spectrum_state *state = space.machine().driver_data<spectrum_state>();
203203
204204   state->m_port_ff_data = data;
205   ts2068_update_memory(space->machine());
205   ts2068_update_memory(space.machine());
206206   logerror("Port %04x write %02x\n", offset, data);
207207}
208208
r17963r17964
228228{
229229   spectrum_state *state = machine.driver_data<spectrum_state>();
230230   UINT8 *messram = machine.device<ram_device>(RAM_TAG)->pointer();
231   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
231   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
232232   unsigned char *ChosenROM, *ExROM;
233233   const timex_cart_t *timex_cart = timex_cart_data();
234234   int timex_cart_type = timex_cart->type;
r17963r17964
241241   {
242242      if (state->m_port_ff_data & 0x80)
243243      {
244            space->install_read_bank(0x0000, 0x1fff, "bank1");
245            space->unmap_write(0x0000, 0x1fff);
244            space.install_read_bank(0x0000, 0x1fff, "bank1");
245            space.unmap_write(0x0000, 0x1fff);
246246            state->membank("bank1")->set_base(ExROM);
247247            logerror("0000-1fff EXROM\n");
248248      }
r17963r17964
251251         if (timex_cart_type == TIMEX_CART_DOCK)
252252         {
253253            state->membank("bank1")->set_base(DOCK);
254            space->install_read_bank(0x0000, 0x1fff, "bank1");
254            space.install_read_bank(0x0000, 0x1fff, "bank1");
255255            if (timex_cart_chunks&0x01)
256               space->install_write_bank(0x0000, 0x1fff, "bank9");
256               space.install_write_bank(0x0000, 0x1fff, "bank9");
257257            else
258               space->unmap_write(0x0000, 0x1fff);
258               space.unmap_write(0x0000, 0x1fff);
259259
260260
261261         }
262262         else
263263         {
264            space->nop_read(0x0000, 0x1fff);
265            space->unmap_write(0x0000, 0x1fff);
264            space.nop_read(0x0000, 0x1fff);
265            space.unmap_write(0x0000, 0x1fff);
266266         }
267267         logerror("0000-1fff Cartridge\n");
268268      }
r17963r17964
271271   {
272272      ChosenROM = machine.root_device().memregion("maincpu")->base() + 0x010000;
273273      state->membank("bank1")->set_base(ChosenROM);
274      space->install_read_bank(0x0000, 0x1fff, "bank1");
275      space->unmap_write(0x0000, 0x1fff);
274      space.install_read_bank(0x0000, 0x1fff, "bank1");
275      space.unmap_write(0x0000, 0x1fff);
276276      logerror("0000-1fff HOME\n");
277277   }
278278
r17963r17964
281281      if (state->m_port_ff_data & 0x80)
282282      {
283283         state->membank("bank2")->set_base(ExROM);
284         space->install_read_bank(0x2000, 0x3fff, "bank2");
285         space->unmap_write(0x2000, 0x3fff);
284         space.install_read_bank(0x2000, 0x3fff, "bank2");
285         space.unmap_write(0x2000, 0x3fff);
286286         logerror("2000-3fff EXROM\n");
287287      }
288288      else
r17963r17964
290290         if (timex_cart_type == TIMEX_CART_DOCK)
291291         {
292292            state->membank("bank2")->set_base(DOCK+0x2000);
293            space->install_read_bank(0x2000, 0x3fff, "bank2");
293            space.install_read_bank(0x2000, 0x3fff, "bank2");
294294            if (timex_cart_chunks&0x02)
295               space->install_write_bank(0x2000, 0x3fff, "bank10");
295               space.install_write_bank(0x2000, 0x3fff, "bank10");
296296            else
297               space->unmap_write(0x2000, 0x3fff);
297               space.unmap_write(0x2000, 0x3fff);
298298
299299         }
300300         else
301301         {
302            space->nop_read(0x2000, 0x3fff);
303            space->unmap_write(0x2000, 0x3fff);
302            space.nop_read(0x2000, 0x3fff);
303            space.unmap_write(0x2000, 0x3fff);
304304         }
305305         logerror("2000-3fff Cartridge\n");
306306      }
r17963r17964
309309   {
310310      ChosenROM = machine.root_device().memregion("maincpu")->base() + 0x012000;
311311      state->membank("bank2")->set_base(ChosenROM);
312      space->install_read_bank(0x2000, 0x3fff, "bank2");
313      space->unmap_write(0x2000, 0x3fff);
312      space.install_read_bank(0x2000, 0x3fff, "bank2");
313      space.unmap_write(0x2000, 0x3fff);
314314      logerror("2000-3fff HOME\n");
315315   }
316316
r17963r17964
319319      if (state->m_port_ff_data & 0x80)
320320      {
321321         state->membank("bank3")->set_base(ExROM);
322         space->install_read_bank(0x4000, 0x5fff, "bank3");
323         space->unmap_write(0x4000, 0x5fff);
322         space.install_read_bank(0x4000, 0x5fff, "bank3");
323         space.unmap_write(0x4000, 0x5fff);
324324         logerror("4000-5fff EXROM\n");
325325      }
326326      else
r17963r17964
328328         if (timex_cart_type == TIMEX_CART_DOCK)
329329         {
330330            state->membank("bank3")->set_base(DOCK+0x4000);
331            space->install_read_bank(0x4000, 0x5fff, "bank3");
331            space.install_read_bank(0x4000, 0x5fff, "bank3");
332332            if (timex_cart_chunks&0x04)
333               space->install_write_bank(0x4000, 0x5fff, "bank11");
333               space.install_write_bank(0x4000, 0x5fff, "bank11");
334334            else
335               space->unmap_write(0x4000, 0x5fff);
335               space.unmap_write(0x4000, 0x5fff);
336336         }
337337         else
338338         {
339            space->nop_read(0x4000, 0x5fff);
340            space->unmap_write(0x4000, 0x5fff);
339            space.nop_read(0x4000, 0x5fff);
340            space.unmap_write(0x4000, 0x5fff);
341341         }
342342         logerror("4000-5fff Cartridge\n");
343343      }
r17963r17964
346346   {
347347      state->membank("bank3")->set_base(messram);
348348      state->membank("bank11")->set_base(messram);
349      space->install_read_bank(0x4000, 0x5fff, "bank3");
350      space->install_write_bank(0x4000, 0x5fff, "bank11");
349      space.install_read_bank(0x4000, 0x5fff, "bank3");
350      space.install_write_bank(0x4000, 0x5fff, "bank11");
351351      logerror("4000-5fff RAM\n");
352352   }
353353
r17963r17964
356356      if (state->m_port_ff_data & 0x80)
357357      {
358358         state->membank("bank4")->set_base(ExROM);
359         space->install_read_bank(0x6000, 0x7fff, "bank4");
360         space->unmap_write(0x6000, 0x7fff);
359         space.install_read_bank(0x6000, 0x7fff, "bank4");
360         space.unmap_write(0x6000, 0x7fff);
361361         logerror("6000-7fff EXROM\n");
362362      }
363363      else
r17963r17964
365365            if (timex_cart_type == TIMEX_CART_DOCK)
366366            {
367367               state->membank("bank4")->set_base(DOCK+0x6000);
368               space->install_read_bank(0x6000, 0x7fff, "bank4");
368               space.install_read_bank(0x6000, 0x7fff, "bank4");
369369               if (timex_cart_chunks&0x08)
370                  space->install_write_bank(0x6000, 0x7fff, "bank12");
370                  space.install_write_bank(0x6000, 0x7fff, "bank12");
371371               else
372                  space->unmap_write(0x6000, 0x7fff);
372                  space.unmap_write(0x6000, 0x7fff);
373373            }
374374            else
375375            {
376               space->nop_read(0x6000, 0x7fff);
377               space->unmap_write(0x6000, 0x7fff);
376               space.nop_read(0x6000, 0x7fff);
377               space.unmap_write(0x6000, 0x7fff);
378378            }
379379            logerror("6000-7fff Cartridge\n");
380380      }
r17963r17964
383383   {
384384      state->membank("bank4")->set_base(messram + 0x2000);
385385      state->membank("bank12")->set_base(messram + 0x2000);
386      space->install_read_bank(0x6000, 0x7fff, "bank4");
387      space->install_write_bank(0x6000, 0x7fff, "bank12");
386      space.install_read_bank(0x6000, 0x7fff, "bank4");
387      space.install_write_bank(0x6000, 0x7fff, "bank12");
388388      logerror("6000-7fff RAM\n");
389389   }
390390
r17963r17964
393393      if (state->m_port_ff_data & 0x80)
394394      {
395395         state->membank("bank5")->set_base(ExROM);
396         space->install_read_bank(0x8000, 0x9fff, "bank5");
397         space->unmap_write(0x8000, 0x9fff);
396         space.install_read_bank(0x8000, 0x9fff, "bank5");
397         space.unmap_write(0x8000, 0x9fff);
398398         logerror("8000-9fff EXROM\n");
399399      }
400400      else
r17963r17964
402402         if (timex_cart_type == TIMEX_CART_DOCK)
403403         {
404404            state->membank("bank5")->set_base(DOCK+0x8000);
405            space->install_read_bank(0x8000, 0x9fff,"bank5");
405            space.install_read_bank(0x8000, 0x9fff,"bank5");
406406            if (timex_cart_chunks&0x10)
407               space->install_write_bank(0x8000, 0x9fff,"bank13");
407               space.install_write_bank(0x8000, 0x9fff,"bank13");
408408            else
409               space->unmap_write(0x8000, 0x9fff);
409               space.unmap_write(0x8000, 0x9fff);
410410         }
411411         else
412412         {
413            space->nop_read(0x8000, 0x9fff);
414            space->unmap_write(0x8000, 0x9fff);
413            space.nop_read(0x8000, 0x9fff);
414            space.unmap_write(0x8000, 0x9fff);
415415         }
416416         logerror("8000-9fff Cartridge\n");
417417      }
r17963r17964
420420   {
421421      state->membank("bank5")->set_base(messram + 0x4000);
422422      state->membank("bank13")->set_base(messram + 0x4000);
423      space->install_read_bank(0x8000, 0x9fff,"bank5");
424      space->install_write_bank(0x8000, 0x9fff,"bank13");
423      space.install_read_bank(0x8000, 0x9fff,"bank5");
424      space.install_write_bank(0x8000, 0x9fff,"bank13");
425425      logerror("8000-9fff RAM\n");
426426   }
427427
r17963r17964
430430      if (state->m_port_ff_data & 0x80)
431431      {
432432         state->membank("bank6")->set_base(ExROM);
433         space->install_read_bank(0xa000, 0xbfff, "bank6");
434         space->unmap_write(0xa000, 0xbfff);
433         space.install_read_bank(0xa000, 0xbfff, "bank6");
434         space.unmap_write(0xa000, 0xbfff);
435435         logerror("a000-bfff EXROM\n");
436436      }
437437      else
r17963r17964
439439         if (timex_cart_type == TIMEX_CART_DOCK)
440440         {
441441            state->membank("bank6")->set_base(DOCK+0xa000);
442            space->install_read_bank(0xa000, 0xbfff, "bank6");
442            space.install_read_bank(0xa000, 0xbfff, "bank6");
443443            if (timex_cart_chunks&0x20)
444               space->install_write_bank(0xa000, 0xbfff, "bank14");
444               space.install_write_bank(0xa000, 0xbfff, "bank14");
445445            else
446               space->unmap_write(0xa000, 0xbfff);
446               space.unmap_write(0xa000, 0xbfff);
447447
448448         }
449449         else
450450         {
451            space->nop_read(0xa000, 0xbfff);
452            space->unmap_write(0xa000, 0xbfff);
451            space.nop_read(0xa000, 0xbfff);
452            space.unmap_write(0xa000, 0xbfff);
453453         }
454454         logerror("a000-bfff Cartridge\n");
455455      }
r17963r17964
458458   {
459459      state->membank("bank6")->set_base(messram + 0x6000);
460460      state->membank("bank14")->set_base(messram + 0x6000);
461      space->install_read_bank(0xa000, 0xbfff, "bank6");
462      space->install_write_bank(0xa000, 0xbfff, "bank14");
461      space.install_read_bank(0xa000, 0xbfff, "bank6");
462      space.install_write_bank(0xa000, 0xbfff, "bank14");
463463      logerror("a000-bfff RAM\n");
464464   }
465465
r17963r17964
468468      if (state->m_port_ff_data & 0x80)
469469      {
470470         state->membank("bank7")->set_base(ExROM);
471         space->install_read_bank(0xc000, 0xdfff, "bank7");
472         space->unmap_write(0xc000, 0xdfff);
471         space.install_read_bank(0xc000, 0xdfff, "bank7");
472         space.unmap_write(0xc000, 0xdfff);
473473         logerror("c000-dfff EXROM\n");
474474      }
475475      else
r17963r17964
477477         if (timex_cart_type == TIMEX_CART_DOCK)
478478         {
479479            state->membank("bank7")->set_base(DOCK+0xc000);
480            space->install_read_bank(0xc000, 0xdfff, "bank7");
480            space.install_read_bank(0xc000, 0xdfff, "bank7");
481481            if (timex_cart_chunks&0x40)
482               space->install_write_bank(0xc000, 0xdfff, "bank15");
482               space.install_write_bank(0xc000, 0xdfff, "bank15");
483483            else
484               space->unmap_write(0xc000, 0xdfff);
484               space.unmap_write(0xc000, 0xdfff);
485485         }
486486         else
487487         {
488            space->nop_read(0xc000, 0xdfff);
489            space->unmap_write(0xc000, 0xdfff);
488            space.nop_read(0xc000, 0xdfff);
489            space.unmap_write(0xc000, 0xdfff);
490490         }
491491         logerror("c000-dfff Cartridge\n");
492492      }
r17963r17964
495495   {
496496      state->membank("bank7")->set_base(messram + 0x8000);
497497      state->membank("bank15")->set_base(messram + 0x8000);
498      space->install_read_bank(0xc000, 0xdfff, "bank7");
499      space->install_write_bank(0xc000, 0xdfff, "bank15");
498      space.install_read_bank(0xc000, 0xdfff, "bank7");
499      space.install_write_bank(0xc000, 0xdfff, "bank15");
500500      logerror("c000-dfff RAM\n");
501501   }
502502
r17963r17964
505505      if (state->m_port_ff_data & 0x80)
506506      {
507507         state->membank("bank8")->set_base(ExROM);
508         space->install_read_bank(0xe000, 0xffff, "bank8");
509         space->unmap_write(0xe000, 0xffff);
508         space.install_read_bank(0xe000, 0xffff, "bank8");
509         space.unmap_write(0xe000, 0xffff);
510510         logerror("e000-ffff EXROM\n");
511511      }
512512      else
r17963r17964
514514         if (timex_cart_type == TIMEX_CART_DOCK)
515515         {
516516            state->membank("bank8")->set_base(DOCK+0xe000);
517            space->install_read_bank(0xe000, 0xffff, "bank8");
517            space.install_read_bank(0xe000, 0xffff, "bank8");
518518            if (timex_cart_chunks&0x80)
519               space->install_write_bank(0xe000, 0xffff, "bank16");
519               space.install_write_bank(0xe000, 0xffff, "bank16");
520520            else
521               space->unmap_write(0xe000, 0xffff);
521               space.unmap_write(0xe000, 0xffff);
522522         }
523523         else
524524         {
525            space->nop_read(0xe000, 0xffff);
526            space->unmap_write(0xe000, 0xffff);
525            space.nop_read(0xe000, 0xffff);
526            space.unmap_write(0xe000, 0xffff);
527527         }
528528         logerror("e000-ffff Cartridge\n");
529529      }
r17963r17964
532532   {
533533      state->membank("bank8")->set_base(messram + 0xa000);
534534      state->membank("bank16")->set_base(messram + 0xa000);
535      space->install_read_bank(0xe000, 0xffff, "bank8");
536      space->install_write_bank(0xe000, 0xffff, "bank16");
535      space.install_read_bank(0xe000, 0xffff, "bank8");
536      space.install_write_bank(0xe000, 0xffff, "bank16");
537537      logerror("e000-ffff RAM\n");
538538   }
539539}
r17963r17964
578578
579579static WRITE8_HANDLER( tc2048_port_ff_w )
580580{
581   spectrum_state *state = space->machine().driver_data<spectrum_state>();
581   spectrum_state *state = space.machine().driver_data<spectrum_state>();
582582
583583   state->m_port_ff_data = data;
584584   logerror("Port %04x write %02x\n", offset, data);
trunk/src/mess/drivers/enterp.c
r17963r17964
3131    MEMORY / I/O
3232***************************************************************************/
3333
34static void enterprise_update_memory_page(address_space *space, offs_t page, int index)
34static void enterprise_update_memory_page(address_space &space, offs_t page, int index)
3535{
36   ep_state *state = space->machine().driver_data<ep_state>();
36   ep_state *state = space.machine().driver_data<ep_state>();
3737   int start = (page - 1) * 0x4000;
3838   int end = (page - 1) * 0x4000 + 0x3fff;
3939   char page_num[10];
r17963r17964
4545   case 0x01:
4646   case 0x02:
4747   case 0x03:
48      space->install_read_bank(start, end, page_num);
49      space->nop_write(start, end);
50      state->membank(page_num)->set_base(space->machine().root_device().memregion("exos")->base() + (index * 0x4000));
48      space.install_read_bank(start, end, page_num);
49      space.nop_write(start, end);
50      state->membank(page_num)->set_base(space.machine().root_device().memregion("exos")->base() + (index * 0x4000));
5151      break;
5252
5353   case 0x04:
5454   case 0x05:
5555   case 0x06:
5656   case 0x07:
57      space->install_read_bank(start, end, page_num);
58      space->nop_write(start, end);
59      state->membank(page_num)->set_base(space->machine().root_device().memregion("cartridges")->base() + ((index - 0x04) * 0x4000));
57      space.install_read_bank(start, end, page_num);
58      space.nop_write(start, end);
59      state->membank(page_num)->set_base(space.machine().root_device().memregion("cartridges")->base() + ((index - 0x04) * 0x4000));
6060      break;
6161
6262   case 0x20:
6363   case 0x21:
64      space->install_read_bank(start, end, page_num);
65      space->nop_write(start, end);
64      space.install_read_bank(start, end, page_num);
65      space.nop_write(start, end);
6666      state->membank(page_num)->set_base(state->memregion("exdos")->base() + ((index - 0x20) * 0x4000));
6767      break;
6868
r17963r17964
7171   case 0xfa:
7272   case 0xfb:
7373      /* additional 64k ram */
74      if (space->machine().device<ram_device>(RAM_TAG)->size() == 128*1024)
74      if (space.machine().device<ram_device>(RAM_TAG)->size() == 128*1024)
7575      {
76         space->install_readwrite_bank(start, end, page_num);
77         state->membank(page_num)->set_base(space->machine().device<ram_device>(RAM_TAG)->pointer() + (index - 0xf4) * 0x4000);
76         space.install_readwrite_bank(start, end, page_num);
77         state->membank(page_num)->set_base(space.machine().device<ram_device>(RAM_TAG)->pointer() + (index - 0xf4) * 0x4000);
7878      }
7979      else
8080      {
81         space->unmap_readwrite(start, end);
81         space.unmap_readwrite(start, end);
8282      }
8383      break;
8484
r17963r17964
8787   case 0xfe:
8888   case 0xff:
8989      /* basic 64k ram */
90      space->install_readwrite_bank(start, end, page_num);
91      state->membank(page_num)->set_base(space->machine().device<ram_device>(RAM_TAG)->pointer() + (index - 0xfc) * 0x4000);
90      space.install_readwrite_bank(start, end, page_num);
91      state->membank(page_num)->set_base(space.machine().device<ram_device>(RAM_TAG)->pointer() + (index - 0xfc) * 0x4000);
9292      break;
9393
9494   default:
95      space->unmap_readwrite(start, end);
95      space.unmap_readwrite(start, end);
9696   }
9797}
9898
r17963r17964
108108   case 0x11:
109109   case 0x12:
110110   case 0x13:
111      enterprise_update_memory_page(device->machine().device("maincpu")->memory().space(AS_PROGRAM), offset - 0x0f, data);
111      enterprise_update_memory_page(*device->machine().device("maincpu")->memory().space(AS_PROGRAM), offset - 0x0f, data);
112112      break;
113113
114114   case 0x15:
trunk/src/mess/drivers/mc10.c
r17963r17964
236236
237237DRIVER_INIT_MEMBER(mc10_state,mc10)
238238{
239   address_space *prg = machine().device("maincpu")->memory().space(AS_PROGRAM);
239   address_space &prg = *machine().device("maincpu")->memory().space(AS_PROGRAM);
240240
241241   /* initialize keyboard strobe */
242242   m_keyboard_strobe = 0x00;
r17963r17964
254254   else if (m_ram_size == 24*1024)
255255      membank("bank2")->set_base(m_ram_base + 0x2000);
256256   else  if (m_ram_size != 32*1024)      //ensure that is not alice90
257      prg->nop_readwrite(0x5000, 0x8fff);
257      prg.nop_readwrite(0x5000, 0x8fff);
258258
259259   /* register for state saving */
260260   state_save_register_global(machine(), m_keyboard_strobe);
trunk/src/mess/drivers/gp32.c
r17963r17964
708708   gp32_state *state = machine.driver_data<gp32_state>();
709709   UINT32 *regs = &state->m_s3c240x_dma_regs[dma<<3];
710710   UINT32 curr_tc, curr_src, curr_dst;
711   address_space *space = machine.device( "maincpu")->memory().space( AS_PROGRAM);
711   address_space &space = *machine.device( "maincpu")->memory().space( AS_PROGRAM);
712712   int dsz, inc_src, inc_dst, servmode;
713713   static const UINT32 ch_int[] = { INT_DMA0, INT_DMA1, INT_DMA2, INT_DMA3 };
714714   verboselog( machine, 5, "DMA %d trigger\n", dma);
r17963r17964
725725      curr_tc--;
726726      switch (dsz)
727727      {
728         case 0 : space->write_byte( curr_dst, space->read_byte( curr_src)); break;
729         case 1 : space->write_word( curr_dst, space->read_word( curr_src)); break;
730         case 2 : space->write_dword( curr_dst, space->read_dword( curr_src)); break;
728         case 0 : space.write_byte( curr_dst, space.read_byte( curr_src)); break;
729         case 1 : space.write_word( curr_dst, space.read_word( curr_src)); break;
730         case 2 : space.write_dword( curr_dst, space.read_dword( curr_src)); break;
731731      }
732732      if (inc_src == 0) curr_src += (1 << dsz);
733733      if (inc_dst == 0) curr_dst += (1 << dsz);
trunk/src/mess/drivers/bebox.c
r17963r17964
3737#include "formats/pc_dsk.h"
3838#include "machine/ram.h"
3939
40static READ8_HANDLER(at_dma8237_1_r)  { return i8237_r(space->machine().device("dma8237_2"), *space, offset / 2); }
41static WRITE8_HANDLER(at_dma8237_1_w) { i8237_w(space->machine().device("dma8237_2"), *space, offset / 2, data); }
40static READ8_HANDLER(at_dma8237_1_r)  { return i8237_r(space.machine().device("dma8237_2"), space, offset / 2); }
41static WRITE8_HANDLER(at_dma8237_1_w) { i8237_w(space.machine().device("dma8237_2"), space, offset / 2, data); }
4242
4343static ADDRESS_MAP_START( bebox_mem, AS_PROGRAM, 64, bebox_state )
4444   AM_RANGE(0x7FFFF0F0, 0x7FFFF0F7) AM_READWRITE_LEGACY(bebox_cpu0_imask_r, bebox_cpu0_imask_w )
r17963r17964
7676
7777static READ64_HANDLER(bb_slave_64be_r)
7878{
79   pci_bus_device *device = space->machine().device<pci_bus_device>("pcibus");
79   pci_bus_device *device = space.machine().device<pci_bus_device>("pcibus");
8080
8181   // 2e94 is the real address, 2e84 is where the PC appears to be under full DRC
82   if ((space->device().safe_pc() == 0xfff02e94) || (space->device().safe_pc() == 0xfff02e84))
82   if ((space.device().safe_pc() == 0xfff02e94) || (space.device().safe_pc() == 0xfff02e84))
8383   {
8484      return 0x108000ff;   // indicate slave CPU
8585   }
8686
87   return device->read_64be(*space, offset, mem_mask);
87   return device->read_64be(space, offset, mem_mask);
8888}
8989
9090static ADDRESS_MAP_START( bebox_slave_mem, AS_PROGRAM, 64, bebox_state )
trunk/src/mess/drivers/cd2650.c
r17963r17964
166166
167167QUICKLOAD_LOAD( cd2650 )
168168{
169   address_space *space = image.device().machine().device("maincpu")->memory().space(AS_PROGRAM);
169   address_space &space = *image.device().machine().device("maincpu")->memory().space(AS_PROGRAM);
170170   int i;
171171   int quick_addr = 0x440;
172172   int exec_addr;
r17963r17964
226226      read_ = quick_length;
227227
228228   for (i = quick_addr; i < read_; i++)
229      space->write_byte(i, quick_data[i]);
229      space.write_byte(i, quick_data[i]);
230230
231231   read_ = 0x1780;
232232   if (quick_length < 0x1780)
r17963r17964
234234
235235   if (quick_length > 0x157f)
236236      for (i = 0x1580; i < read_; i++)
237         space->write_byte(i, quick_data[i]);
237         space.write_byte(i, quick_data[i]);
238238
239239   if (quick_length > 0x17ff)
240240      for (i = 0x1800; i < quick_length; i++)
241         space->write_byte(i, quick_data[i]);
241         space.write_byte(i, quick_data[i]);
242242
243243   /* display a message about the loaded quickload */
244244   image.message(" Quickload: size=%04X : exec=%04X",quick_length,exec_addr);
trunk/src/mess/drivers/esq5505.c
r17963r17964
136136
137137READ16_MEMBER(esq5505_state::es5510_dsp_r)
138138{
139//  logerror("%06x: DSP read offset %04x (data is %04x)\n",space->device().safe_pc(),offset,es5510_dsp_ram[offset]);
139//  logerror("%06x: DSP read offset %04x (data is %04x)\n",space.device().safe_pc(),offset,es5510_dsp_ram[offset]);
140140
141141   switch(offset)
142142   {
trunk/src/mess/drivers/avigo.c
r17963r17964
158158
159159void avigo_state::refresh_memory(UINT8 bank, UINT8 chip_select)
160160{
161   address_space* space = m_maincpu->space(AS_PROGRAM);
161   address_space& space = *m_maincpu->space(AS_PROGRAM);
162162   int &active_flash = (bank == 1 ? m_flash_at_0x4000 : m_flash_at_0x8000);
163163   char bank_tag[6];
164164
r17963r17964
167167   switch (chip_select)
168168   {
169169      case 0x06:   // videoram
170         space->install_readwrite_handler(bank * 0x4000, bank * 0x4000 + 0x3fff, read8_delegate(FUNC(avigo_state::vid_memory_r), this), write8_delegate(FUNC(avigo_state::vid_memory_w), this));
170         space.install_readwrite_handler(bank * 0x4000, bank * 0x4000 + 0x3fff, read8_delegate(FUNC(avigo_state::vid_memory_r), this), write8_delegate(FUNC(avigo_state::vid_memory_w), this));
171171         active_flash = -1;
172172         break;
173173
174174      case 0x01: // banked RAM
175175         sprintf(bank_tag,"bank%d", bank);
176176         membank(bank_tag)->set_base(m_ram_base + (((bank == 1 ? m_bank1_l : m_bank2_l) & 0x07)<<14));
177         space->install_readwrite_bank (bank * 0x4000, bank * 0x4000 + 0x3fff, bank_tag);
177         space.install_readwrite_bank (bank * 0x4000, bank * 0x4000 + 0x3fff, bank_tag);
178178         active_flash = -1;
179179         break;
180180
r17963r17964
185185         if (active_flash < 0)   // to avoid useless calls to install_readwrite_handler that cause slowdowns
186186         {
187187            if (bank == 1)
188               space->install_readwrite_handler(0x4000, 0x7fff, read8_delegate(FUNC(avigo_state::flash_0x4000_read_handler), this), write8_delegate(FUNC(avigo_state::flash_0x4000_write_handler), this));
188               space.install_readwrite_handler(0x4000, 0x7fff, read8_delegate(FUNC(avigo_state::flash_0x4000_read_handler), this), write8_delegate(FUNC(avigo_state::flash_0x4000_write_handler), this));
189189            else
190               space->install_readwrite_handler(0x8000, 0xbfff, read8_delegate(FUNC(avigo_state::flash_0x8000_read_handler), this), write8_delegate(FUNC(avigo_state::flash_0x8000_write_handler), this));
190               space.install_readwrite_handler(0x8000, 0xbfff, read8_delegate(FUNC(avigo_state::flash_0x8000_read_handler), this), write8_delegate(FUNC(avigo_state::flash_0x8000_write_handler), this));
191191         }
192192
193193         switch (chip_select)
r17963r17964
201201
202202      default:
203203         logerror("Unknown chip %02x mapped at %04x - %04x\n", chip_select, bank * 0x4000, bank * 0x4000 + 0x3fff);
204         space->unmap_readwrite(bank * 0x4000, bank * 0x4000 + 0x3fff);
204         space.unmap_readwrite(bank * 0x4000, bank * 0x4000 + 0x3fff);
205205         active_flash = -1;
206206         break;
207207   }
trunk/src/mess/drivers/super6.c
r17963r17964
396396//  Z80DMA_INTERFACE( dma_intf )
397397//-------------------------------------------------
398398
399static UINT8 memory_read_byte(address_space *space, offs_t address) { return space->read_byte(address); }
400static void memory_write_byte(address_space *space, offs_t address, UINT8 data) { space->write_byte(address, data); }
399static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
400static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
401401
402402static Z80DMA_INTERFACE( dma_intf )
403403{
trunk/src/mess/drivers/c64.c
r17963r17964
428428READ8_MEMBER( c64_state::sid_potx_r )
429429{
430430   UINT8 cia1_pa = mos6526_pa_r(m_cia1, space, 0);
431
431   
432432   int sela = BIT(cia1_pa, 6);
433433   int selb = BIT(cia1_pa, 7);
434434
r17963r17964
443443READ8_MEMBER( c64_state::sid_poty_r )
444444{
445445   UINT8 cia1_pa = mos6526_pa_r(m_cia1, space, 0);
446
446   
447447   int sela = BIT(cia1_pa, 6);
448448   int selb = BIT(cia1_pa, 7);
449449
trunk/src/mess/drivers/vc4000.c
r17963r17964
530530
531531QUICKLOAD_LOAD(vc4000)
532532{
533   address_space *space = image.device().machine().device("maincpu")->memory().space(AS_PROGRAM);
533   address_space &space = *image.device().machine().device("maincpu")->memory().space(AS_PROGRAM);
534534   int i;
535535   int quick_addr = 0x08c0;
536536   int exec_addr;
r17963r17964
567567      quick_addr = quick_data[1] * 256 + quick_data[2];
568568      exec_addr = quick_data[3] * 256 + quick_data[4];
569569
570      space->write_byte(0x08be, quick_data[3]);
571      space->write_byte(0x08bf, quick_data[4]);
570      space.write_byte(0x08be, quick_data[3]);
571      space.write_byte(0x08bf, quick_data[4]);
572572
573573      for (i = 0; i < quick_length - 5; i++)
574574         if ((quick_addr + i) < 0x1600)
575            space->write_byte(i + quick_addr, quick_data[i+5]);
575            space.write_byte(i + quick_addr, quick_data[i+5]);
576576
577577      /* display a message about the loaded quickload */
578578      image.message(" Quickload: size=%04X : start=%04X : end=%04X : exec=%04X",quick_length-5,quick_addr,quick_addr+quick_length-5,exec_addr);
r17963r17964
617617
618618      for (i = quick_addr; i < quick_length; i++)
619619         if (i < 0x1600)
620            space->write_byte(i, quick_data[i]);
620            space.write_byte(i, quick_data[i]);
621621
622622      /* display a message about the loaded quickload */
623623      image.message(" Quickload: size=%04X : exec=%04X",quick_length,exec_addr);
trunk/src/mess/drivers/dmv.c
r17963r17964
277277   i8237_hlda_w(m_dmac, state);
278278}
279279
280static UINT8 memory_read_byte(address_space *space, offs_t address)          { return space->read_byte(address); }
281static void memory_write_byte(address_space *space, offs_t address, UINT8 data) { space->write_byte(address, data); }
280static UINT8 memory_read_byte(address_space &space, offs_t address)          { return space.read_byte(address); }
281static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
282282
283283static I8237_INTERFACE( dmv_dma8237_config )
284284{
trunk/src/mess/drivers/b16.c
r17963r17964
262262   NULL      /* update address callback */
263263};
264264
265static UINT8 memory_read_byte(address_space *space, offs_t address) { return space->read_byte(address); }
266static void memory_write_byte(address_space *space, offs_t address, UINT8 data) { space->write_byte(address, data); }
265static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
266static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
267267
268268static I8237_INTERFACE( b16_dma8237_interface )
269269{
trunk/src/mess/drivers/psion.c
r17963r17964
101101      break;
102102   }
103103
104   m6801_io_w(&space, offset, data);
104   m6801_io_w(space, offset, data);
105105}
106106
107107READ8_MEMBER( psion_state::hd63701_int_reg_r )
r17963r17964
112112      /* datapack i/o data bus */
113113      return (m_pack1->data_r() | m_pack2->data_r()) & (~m_port2_ddr);
114114   case 0x14:
115      return (m6801_io_r(&space, offset)&0x7f) | (m_stby_pwr<<7);
115      return (m6801_io_r(space, offset)&0x7f) | (m_stby_pwr<<7);
116116   case 0x15:
117117      /*
118118        x--- ---- ON key active high
r17963r17964
125125      /* datapack control lines */
126126      return (m_pack1->control_r() | (m_pack2->control_r() & 0x8f)) | ((m_pack2->control_r() & 0x10)<<1);
127127   case 0x08:
128      m6801_io_w(&space, offset, m_tcsr_value);
128      m6801_io_w(space, offset, m_tcsr_value);
129129   default:
130      return m6801_io_r(&space, offset);
130      return m6801_io_r(space, offset);
131131   }
132132}
133133
trunk/src/mess/drivers/gba.c
r17963r17964
154154   int ctrl;
155155   int srcadd, dstadd;
156156   UINT32 src, dst;
157   address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
157   address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
158158   gba_state *state = machine.driver_data<gba_state>();
159159
160160   src = state->m_dma_src[ch];
r17963r17964
207207         dst &= 0xfffffffc;
208208
209209         // 32-bit
210         space->write_dword(dst, space->read_dword(src));
210         space.write_dword(dst, space.read_dword(src));
211211         switch (dstadd)
212212         {
213213            case 0:   // increment
r17963r17964
242242         dst &= 0xfffffffe;
243243
244244         // 16-bit
245         space->write_word(dst, space->read_word(src));
245         space.write_word(dst, space.read_word(src));
246246         switch (dstadd)
247247         {
248248            case 0:   // increment

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