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r17796 Tuesday 11th September, 2012 at 14:30:18 UTC by Curt Coder
Generalized the PLS100 into a PLA device of variable amounts of inputs/outputs/terms. [Curt Coder]

[src/emu]	emu.mak
[src/emu/machine]	pla.c* pla.h* pls100.c pls100.h
[src/mess/drivers]	c128.c c64.c
[src/mess/includes]	c128.h c64.h plus4.h
[src/mess/machine]	c128.c c1551.h

trunk/src/emu/emu.mak

r17795	r17796
223	223	$(EMUMACHINE)/netlist.o      \
224	224	$(EMUMACHINE)/net_lib.o      \
225	225	$(EMUMACHINE)/nmc9306.o      \
226		$(EMUMACHINE)/nscsi_bus.o      \
227		$(EMUMACHINE)/nscsi_cd.o       \
228		$(EMUMACHINE)/nscsi_hd.o       \
	226	$(EMUMACHINE)/nscsi_bus.o   \
	227	$(EMUMACHINE)/nscsi_cd.o    \
	228	$(EMUMACHINE)/nscsi_hd.o    \
229	229	$(EMUMACHINE)/nvram.o      \
230	230	$(EMUMACHINE)/pc16552d.o   \
231		$(EMUMACHINE)/pci.o      \
	231	$(EMUMACHINE)/pci.o         \
232	232	$(EMUMACHINE)/pd4990a.o      \
233	233	$(EMUMACHINE)/pic8259.o      \
234	234	$(EMUMACHINE)/pit8253.o      \
235		$(EMUMACHINE)/pls100.o      \
236		$(EMUMACHINE)/ram.o      \
	235	$(EMUMACHINE)/pla.o         \
	236	$(EMUMACHINE)/ram.o         \
237	237	$(EMUMACHINE)/roc10937.o   \
238	238	$(EMUMACHINE)/rp5c01.o      \
239	239	$(EMUMACHINE)/rp5c15.o      \
r17795	r17796
293	293	$(EMUVIDEO)/huc6261.o      \
294	294	$(EMUVIDEO)/huc6270.o      \
295	295	$(EMUVIDEO)/huc6272.o      \
296		$(EMUVIDEO)/i8275.o      \
	296	$(EMUVIDEO)/i8275.o         \
297	297	$(EMUVIDEO)/k053250.o      \
298	298	$(EMUVIDEO)/m50458.o      \
299	299	$(EMUVIDEO)/mb90082.o      \
r17795	r17796
302	302	$(EMUVIDEO)/pc_cga.o      \
303	303	$(EMUVIDEO)/cgapal.o      \
304	304	$(EMUVIDEO)/pc_vga.o      \
305		$(EMUVIDEO)/poly.o      \
306		$(EMUVIDEO)/psx.o      \
	305	$(EMUVIDEO)/poly.o         \
	306	$(EMUVIDEO)/psx.o         \
307	307	$(EMUVIDEO)/ramdac.o      \
308	308	$(EMUVIDEO)/resnet.o      \
309	309	$(EMUVIDEO)/rgbutil.o      \
310		$(EMUVIDEO)/s2636.o      \
	310	$(EMUVIDEO)/s2636.o         \
311	311	$(EMUVIDEO)/saa5050.o      \
312	312	$(EMUVIDEO)/sed1330.o      \
313	313	$(EMUVIDEO)/tlc34076.o      \
r17795	r17796
315	315	$(EMUVIDEO)/tms9927.o      \
316	316	$(EMUVIDEO)/tms9928a.o      \
317	317	$(EMUVIDEO)/upd3301.o      \
318		$(EMUVIDEO)/v9938.o      \
	318	$(EMUVIDEO)/v9938.o         \
319	319	$(EMUVIDEO)/vector.o      \
320	320	$(EMUVIDEO)/voodoo.o      \
321	321

trunk/src/emu/machine/pls100.c

r17795	r17796
1		/**********************************************************************
2
3		PLS100 16x48x8 Programmable Logic Array emulation
4
5		Copyright MESS Team.
6		Visit http://mamedev.org for licensing and usage restrictions.
7
8		**********************************************************************/
9
10		#include "emu.h"
11		#include "pls100.h"
12
13
14
15		//**************************************************************************
16		//  DEVICE TYPE DEFINITION
17		//**************************************************************************
18
19		const device_type PLS100 = &device_creator<pls100_device>;
20
21
22
23		//**************************************************************************
24		//  INLINE HELPERS
25		//**************************************************************************
26
27		//-------------------------------------------------
28		//  parse_fusemap -
29		//-------------------------------------------------
30
31		inline void pls100_device::parse_fusemap()
32		{
33		jed_data jed;
34		jedbin_parse(machine().root_device().memregion(tag())->base(), machine().root_device().memregion(tag())->bytes(), &jed);
35		UINT32 fusenum = 0;
36		m_xor = 0;
37
38		for (int term = 0; term < PAL_TERMS; term++)
39		{
40		m_and_comp[term] = 0;
41		m_and_true[term] = 0;
42		m_or[term] = 0;
43
44		for (int i = 0; i < PAL_INPUTS; i++)
45		{
46		m_and_comp[term] |= jed_get_fuse(&jed, fusenum++) << i;
47		m_and_true[term] |= jed_get_fuse(&jed, fusenum++) << i;
48		}
49
50		for (int f = 0; f < PAL_OUTPUTS; f++)
51		{
52		m_or[term] |= !jed_get_fuse(&jed, fusenum++) << f;
53		}
54		}
55
56		for (int f = 0; f < PAL_OUTPUTS; f++)
57		{
58		m_xor |= jed_get_fuse(&jed, fusenum++) << f;
59		}
60		}
61
62
63		//-------------------------------------------------
64		//  get_product -
65		//-------------------------------------------------
66
67		inline int pls100_device::get_product(int term)
68		{
69		UINT16 input_true = m_and_true[term] | m_i;
70		UINT16 input_comp = m_and_comp[term] | (m_i ^ 0xffff);
71
72		return (input_true & input_comp) == 0xffff;
73		}
74
75
76		//-------------------------------------------------
77		//  update_outputs -
78		//-------------------------------------------------
79
80		inline void pls100_device::update_outputs()
81		{
82		m_s = 0;
83
84		for (int term = 0; term < PAL_TERMS; term++)
85		{
86		if (get_product(term))
87		{
88		m_s |= m_or[term];
89		}
90		}
91		}
92
93
94
95		//**************************************************************************
96		//  LIVE DEVICE
97		//**************************************************************************
98
99		//-------------------------------------------------
100		//  pls100_device - constructor
101		//-------------------------------------------------
102
103		pls100_device::pls100_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
104		: device_t(mconfig, PLS100, "PLS100", tag, owner, clock)
105		{
106		}
107
108
109		//-------------------------------------------------
110		//  device_start - device-specific startup
111		//-------------------------------------------------
112
113		void pls100_device::device_start()
114		{
115		// parse fusemap
116		assert(machine().root_device().memregion(tag()) != NULL);
117		parse_fusemap();
118
119		// register for state saving
120		save_item(NAME(m_i));
121		save_item(NAME(m_s));
122		}
123
124
125		//-------------------------------------------------
126		//  read -
127		//-------------------------------------------------
128
129		UINT8 pls100_device::read(UINT16 input)
130		{
131		m_i = input;
132
133		update_outputs();
134
135		return m_s ^ m_xor;
136		}

trunk/src/emu/machine/pls100.h

r17795	r17796
1		/**********************************************************************
2
3		PLS100 16x48x8 Programmable Logic Array emulation
4
5		Copyright MESS Team.
6		Visit http://mamedev.org for licensing and usage restrictions.
7
8		**********************************************************************
9		_____   _____
10		FE   1 |*    \_/     | 28  Vcc
11		I7   2 |             | 27  I8
12		I6   3 |             | 26  I9
13		I5   4 |             | 25  I10
14		I4   5 |             | 24  I11
15		I3   6 |    82S100   | 23  I12
16		I2   7 |    82S101   | 22  I13
17		I1   8 |    PLS100   | 21  I14
18		I0   9 |    PLS101   | 20  I15
19		F7  10 |             | 19  _CE
20		F6  11 |             | 18  F0
21		F5  12 |             | 17  F1
22		F4  13 |             | 16  F2
23		GND  14 |_____________| 15  F3
24
25		**********************************************************************/
26
27		#pragma once
28
29		#ifndef __PLS100__
30		#define __PLS100__
31
32		#include "emu.h"
33		#include "jedparse.h"
34
35
36
37		//**************************************************************************
38		//  MACROS / CONSTANTS
39		//**************************************************************************
40
41		#define PAL_INPUTS      16
42		#define PAL_OUTPUTS      8
43		#define PAL_TERMS      48
44
45
46
47		///*************************************************************************
48		//  INTERFACE CONFIGURATION MACROS
49		///*************************************************************************
50
51		#define MCFG_PLS100_ADD(_tag) \
52		MCFG_DEVICE_ADD(_tag, PLS100, 0)
53
54
55
56		///*************************************************************************
57		//  TYPE DEFINITIONS
58		///*************************************************************************
59
60		// ======================> pls100_device
61
62		class pls100_device :   public device_t
63		{
64		public:
65		// construction/destruction
66		pls100_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
67
68		UINT8 read(UINT16 input);
69
70		protected:
71		// device-level overrides
72		virtual void device_start();
73
74		private:
75		inline void parse_fusemap();
76		inline int get_product(int term);
77		inline void update_outputs();
78
79		UINT16 m_i;
80		UINT8 m_s;
81		UINT16 m_and_true[PAL_TERMS];
82		UINT16 m_and_comp[PAL_TERMS];
83		UINT16 m_or[PAL_TERMS];
84		UINT8 m_xor;
85		};
86
87
88		// device type definition
89		extern const device_type PLS100;
90
91
92
93		#endif

trunk/src/emu/machine/pla.c

r0	r17796
	1	/**********************************************************************
	2
	3	PLS100 16x48x8 Programmable Logic Array emulation
	4
	5	Copyright MESS Team.
	6	Visit http://mamedev.org for licensing and usage restrictions.
	7
	8	**********************************************************************/
	9
	10	#include "pla.h"
	11
	12
	13
	14	//**************************************************************************
	15	//  DEVICE TYPE DEFINITION
	16	//**************************************************************************
	17
	18	const device_type PLS100 = &device_creator<pls100_device>;
	19	const device_type MOS8721 = &device_creator<mos8721_device>;
	20
	21
	22
	23	//**************************************************************************
	24	//  INLINE HELPERS
	25	//**************************************************************************
	26
	27	//-------------------------------------------------
	28	//  parse_fusemap -
	29	//-------------------------------------------------
	30
	31	inline void pla_device::parse_fusemap()
	32	{
	33	jed_data jed;
	34	jedbin_parse(machine().root_device().memregion(tag())->base(), machine().root_device().memregion(tag())->bytes(), &jed);
	35	UINT32 fusenum = 0;
	36	m_xor = 0;
	37
	38	for (int term = 0; term < m_terms; term++)
	39	{
	40	m_and_comp[term] = 0;
	41	m_and_true[term] = 0;
	42	m_or[term] = 0;
	43
	44	for (int i = 0; i < m_inputs; i++)
	45	{
	46	m_and_comp[term] |= jed_get_fuse(&jed, fusenum++) << i;
	47	m_and_true[term] |= jed_get_fuse(&jed, fusenum++) << i;
	48	}
	49
	50	for (int f = 0; f < m_outputs; f++)
	51	{
	52	m_or[term] |= !jed_get_fuse(&jed, fusenum++) << f;
	53	}
	54	}
	55
	56	for (int f = 0; f < m_outputs; f++)
	57	{
	58	m_xor |= jed_get_fuse(&jed, fusenum++) << f;
	59	}
	60	}
	61
	62
	63	//-------------------------------------------------
	64	//  get_product -
	65	//-------------------------------------------------
	66
	67	inline int pla_device::get_product(int term)
	68	{
	69	UINT32 input_true = m_and_true[term] | m_i;
	70	UINT32 input_comp = m_and_comp[term] | ~m_i;
	71
	72	return ((input_true & input_comp) & m_output_mask) == m_output_mask;
	73	}
	74
	75
	76	//-------------------------------------------------
	77	//  update_outputs -
	78	//-------------------------------------------------
	79
	80	inline void pla_device::update_outputs()
	81	{
	82	m_s = 0;
	83
	84	for (int term = 0; term < m_terms; term++)
	85	{
	86	if (get_product(term))
	87	{
	88	m_s |= m_or[term];
	89	}
	90	}
	91	}
	92
	93
	94
	95	//**************************************************************************
	96	//  LIVE DEVICE
	97	//**************************************************************************
	98
	99	//-------------------------------------------------
	100	//  pla_device - constructor
	101	//-------------------------------------------------
	102
	103	pla_device::pla_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, int inputs, int outputs, int terms, UINT32 output_mask)
	104	: device_t(mconfig, type, name, tag, owner, clock),
	105	m_inputs(inputs),
	106	m_outputs(outputs),
	107	m_terms(terms),
	108	m_output_mask(output_mask)
	109	{
	110	}
	111
	112	pls100_device::pls100_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
	113	: pla_device(mconfig, PLS100, "PLS100", tag, owner, clock, 16, 8, 48, 0xffff)
	114	{
	115	}
	116
	117	mos8721_device::mos8721_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
	118	: pla_device(mconfig, MOS8721, "MOS8721", tag, owner, clock, 27, 18, 48, 0x7ffffff)
	119	{
	120	}
	121
	122
	123	//-------------------------------------------------
	124	//  device_start - device-specific startup
	125	//-------------------------------------------------
	126
	127	void pla_device::device_start()
	128	{
	129	// parse fusemap
	130	assert(machine().root_device().memregion(tag()) != NULL);
	131	parse_fusemap();
	132
	133	// register for state saving
	134	save_item(NAME(m_i));
	135	save_item(NAME(m_s));
	136	}
	137
	138
	139	//-------------------------------------------------
	140	//  read -
	141	//-------------------------------------------------
	142
	143	UINT32 pla_device::read(UINT32 input)
	144	{
	145	m_i = input;
	146
	147	update_outputs();
	148
	149	return m_s ^ m_xor;
	150	}

trunk/src/emu/machine/pla.h

r0	r17796
	1	/**********************************************************************
	2
	3	PLS100 16x48x8 Programmable Logic Array emulation
	4
	5	Copyright MESS Team.
	6	Visit http://mamedev.org for licensing and usage restrictions.
	7
	8	**********************************************************************
	9	_____   _____
	10	FE   1 |*    \_/     | 28  Vcc
	11	I7   2 |             | 27  I8
	12	I6   3 |             | 26  I9
	13	I5   4 |             | 25  I10
	14	I4   5 |             | 24  I11
	15	I3   6 |    82S100   | 23  I12
	16	I2   7 |    82S101   | 22  I13
	17	I1   8 |    PLS100   | 21  I14
	18	I0   9 |    PLS101   | 20  I15
	19	F7  10 |             | 19  _CE
	20	F6  11 |             | 18  F0
	21	F5  12 |             | 17  F1
	22	F4  13 |             | 16  F2
	23	GND  14 |_____________| 15  F3
	24
	25	**********************************************************************/
	26
	27	#pragma once
	28
	29	#ifndef __PLA__
	30	#define __PLA__
	31
	32	#include "emu.h"
	33	#include "jedparse.h"
	34
	35
	36
	37	//**************************************************************************
	38	//  MACROS / CONSTANTS
	39	//**************************************************************************
	40
	41	#define MAX_TERMS       512
	42
	43
	44
	45	///*************************************************************************
	46	//  INTERFACE CONFIGURATION MACROS
	47	///*************************************************************************
	48
	49	#define MCFG_PLS100_ADD(_tag) \
	50	MCFG_DEVICE_ADD(_tag, PLS100, 0)
	51
	52	#define MCFG_MOS8721_ADD(_tag) \
	53	MCFG_DEVICE_ADD(_tag, MOS8721, 0)
	54
	55
	56	///*************************************************************************
	57	//  TYPE DEFINITIONS
	58	///*************************************************************************
	59
	60	// ======================> pla_device
	61
	62	class pla_device :   public device_t
	63	{
	64	public:
	65	// construction/destruction
	66	pla_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, int inputs, int outputs, int terms, UINT32 output_mask);
	67
	68	UINT32 read(UINT32 input);
	69
	70	protected:
	71	// device-level overrides
	72	virtual void device_start();
	73
	74	inline void parse_fusemap();
	75	inline int get_product(int term);
	76	inline void update_outputs();
	77
	78	int m_inputs;
	79	int m_outputs;
	80	int m_terms;
	81	UINT32 m_output_mask;
	82
	83	UINT32 m_i;
	84	UINT32 m_s;
	85	UINT32 m_and_true[MAX_TERMS];
	86	UINT32 m_and_comp[MAX_TERMS];
	87	UINT32 m_or[MAX_TERMS];
	88	UINT32 m_xor;
	89	};
	90
	91
	92	// ======================> pls100_device
	93
	94	class pls100_device : public pla_device
	95	{
	96	public:
	97	pls100_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
	98	};
	99
	100
	101	// ======================> mos8721_device
	102
	103	class mos8721_device : public pla_device
	104	{
	105	public:
	106	mos8721_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
	107	};
	108
	109
	110	// device type definition
	111	extern const device_type PLS100;
	112	extern const device_type MOS8721;
	113
	114
	115
	116	#endif

trunk/src/mess/machine/c128.c

r17795	r17796
294	294
295	295	m_vicaddr = m_memory + helper[data & 0x03];
296	296	m_c128_vicaddr = m_memory + helper[data & 0x03] + m_va1617;
	297
	298	// VIC banking
	299	m_va14 = BIT(data, 0);
	300	m_va15 = BIT(data, 1);
297	301	}
298	302
299	303	WRITE_LINE_MEMBER( c128_state::cia2_irq_w )
r17795	r17796
994	998
995	999	WRITE8_MEMBER( c128_state::cpu_w )
996	1000	{
	1001	/*
	1002
	1003	bit     description
	1004
	1005	P0      LORAM
	1006	P1      HIRAM
	1007	P2      CHAREN
	1008	P3      CASS WRT
	1009	P4
	1010	P5      CASS MOTOR
	1011	P6
	1012
	1013	*/
	1014
	1015	// memory banking
	1016	m_loram = BIT(data, 0);
	1017	m_hiram = BIT(data, 1);
	1018	m_charen = BIT(data, 2);
	1019
	1020	// cassette write
997	1021	m_cassette->write(BIT(data, 3));
998	1022
	1023	// cassette motor
999	1024	m_cassette->motor_w(BIT(data, 5));
1000	1025
1001	1026	bankswitch_64(0);
1002	1027
1003	1028	m_memory[0x000] = m_subcpu->memory().space(AS_PROGRAM)->read_byte(0);
1004	1029	m_memory[0x001] = m_subcpu->memory().space(AS_PROGRAM)->read_byte(1);
1005
1006	1030	}
1007	1031
1008	1032	READ8_MEMBER( c128_state::cpu_r)

trunk/src/mess/machine/c1551.h

r17795	r17796
22	22	#include "machine/6525tpi.h"
23	23	#include "machine/c1541.h"
24	24	#include "machine/cbmipt.h"
25		#include "machine/pls100.h"
	25	#include "machine/pla.h"
26	26	#include "machine/plus4exp.h"
27	27
28	28

trunk/src/mess/includes/plus4.h

r17795	r17796
15	15	#include "machine/cbmipt.h"
16	16	#include "machine/mos6529.h"
17	17	#include "machine/petcass.h"
18		#include "machine/pls100.h"
	18	#include "machine/pla.h"
19	19	#include "machine/ram.h"
20	20
21	21	#define MOS7501_TAG         "u2"

trunk/src/mess/includes/c128.h

r17795	r17796
24	24	#include "machine/cbmipt.h"
25	25	#include "machine/mos8722.h"
26	26	#include "machine/petcass.h"
	27	#include "machine/pla.h"
27	28	#include "machine/ram.h"
28	29	#include "machine/vcsctrl.h"
29	30	#include "sound/dac.h"
r17795	r17796
57	58	m_maincpu(*this, Z80A_TAG),
58	59	m_subcpu(*this, M8502_TAG),
59	60	m_mmu(*this, MOS8722_TAG),
	61	m_pla(*this, MOS8721_TAG),
60	62	m_vdc(*this, MOS8563_TAG),
61	63	m_vic(*this, MOS8564_TAG),
62	64	m_sid(*this, MOS6581_TAG),
r17795	r17796
80	82	required_device<legacy_cpu_device> m_maincpu;
81	83	required_device<legacy_cpu_device> m_subcpu;
82	84	required_device<mos8722_device> m_mmu;
	85	required_device<mos8721_device> m_pla;
83	86	required_device<mos8563_device> m_vdc;
84	87	required_device<mos6566_device> m_vic;
85	88	required_device<sid6581_device> m_sid;
r17795	r17796
96	99	virtual void machine_start();
97	100	virtual void machine_reset();
98	101
99		void bankswitch_pla(offs_t offset, offs_t vma, int ba, int rw, int aec, int z80io, int ms3, int ms2, int ms1, int ms0,
100		int *cas, int *gwe, int *rom1, int *rom2, int *rom3, int *rom4, int *charom, int *colorram, int *vic, int *from1, int *romh, int *roml, int *dwe, int *ioacc, int *clrbank, int *iocs, int *casenb);
	102	void bankswitch_pla(offs_t offset, offs_t ta, offs_t vma, int ba, int rw, int aec, int z80io, int ms3, int ms2, int ms1, int ms0,
	103	int *sden, int *dir, int *gwe, int *rom1, int *rom2, int *rom3, int *rom4, int *charom, int *colorram, int *vic, int *from1, int *romh, int *roml, int *dwe, int *ioacc, int *clrbank, int *iocs, int *casenb);
101	104	UINT8 read_memory(address_space &space, offs_t offset, offs_t vma, int ba, int aec, int z80io);
102	105	void write_memory(address_space &space, offs_t offset, offs_t vma, UINT8 data, int ba, int aec, int z80io);
103	106
r17795	r17796
171	174	void bankswitch(int reset);
172	175	void mmu8722_reset();
173	176
	177	// memory state
	178	int m_loram;
	179	int m_hiram;
	180	int m_charen;
	181	int m_va14;
	182	int m_va15;
174	183	const UINT8 *m_rom1;
175	184	const UINT8 *m_rom2;
176	185	const UINT8 *m_rom3;

trunk/src/mess/includes/c64.h

r17795	r17796
13	13	#include "machine/cbmiec.h"
14	14	#include "machine/cbmipt.h"
15	15	#include "machine/petcass.h"
16		#include "machine/pls100.h"
	16	#include "machine/pla.h"
17	17	#include "machine/ram.h"
18	18	#include "machine/vcsctrl.h"
19	19	#include "sound/dac.h"

trunk/src/mess/drivers/c128.c

r17795	r17796
204	204	#include "includes/c64_legacy.h"
205	205
206	206
	207
	208	//**************************************************************************
	209	//  MACROS / CONSTANTS
	210	//**************************************************************************
	211
	212	#define A15 BIT(offset, 15)
	213	#define A14 BIT(offset, 14)
	214	#define A13 BIT(offset, 13)
	215	#define A12 BIT(offset, 12)
	216	#define A11 BIT(offset, 11)
	217	#define A10 BIT(offset, 10)
	218	#define VMA5 BIT(vma, 13)
	219	#define VMA4 BIT(vma, 12)
	220
	221
207	222	/*************************************
208	223	*
209	224	*  Main CPU memory handlers
r17795	r17796
225	240	* 0xe000-0xffff ram as bank 0
226	241	*/
227	242
228		void c128_state::bankswitch_pla(offs_t offset, offs_t vma, int ba, int rw, int aec, int z80io, int ms3, int ms2, int ms1, int ms0,
229		int *cas, int *gwe, int *rom1, int *rom2, int *rom3, int *rom4, int *charom, int *colorram, int *vic,
	243	void c128_state::bankswitch_pla(offs_t offset, offs_t ta, offs_t vma, int ba, int rw, int aec, int z80io, int ms3, int ms2, int ms1, int ms0,
	244	int *sden, int *dir, int *gwe, int *rom1, int *rom2, int *rom3, int *rom4, int *charom, int *colorram, int *vic,
230	245	int *from1, int *romh, int *roml, int *dwe, int *ioacc, int *clrbank, int *iocs, int *casenb)
231	246	{
232		//int game = m_exp->game_r(offset, ba, rw, m_hiram);
233		//int exrom = m_exp->exrom_r(offset, ba, rw, m_hiram);
234		//int vicfix = 0;
235		//int _128_256 = 1;
	247	int _128_256 = 1;
	248	int dmaack = 1;
	249	int vicfix = 0;
	250	int game = m_exp->game_r(ta, ba, rw, m_hiram);
	251	int exrom = m_exp->exrom_r(ta, ba, rw, m_hiram);
	252	int clk = 1;
	253
	254	UINT32 input = clk << 26 | m_va14 << 25 | m_charen << 24 |
	255	m_hiram << 23 | m_loram << 22 | ba << 21 | VMA5 << 20 | VMA4 << 19 | ms0 << 18 | ms1 << 17 | ms2 << 16 |
	256	exrom << 15 | game << 14 | rw << 13 | aec << 12 | A10 << 11 | A11 << 10 | A12 << 9 | A13 << 8 |
	257	A14 << 7 | A15 << 6 | z80io << 5 | m_z80en << 4 | ms3 << 3 | vicfix << 2 | dmaack << 1 | _128_256;
	258
	259	UINT32 data = m_pla->read(input);
	260
	261	*sden = BIT(data, 0);
	262	*rom4 = BIT(data, 1);
	263	*rom2 = BIT(data, 2);
	264	*dir = BIT(data, 3);
	265	*roml = BIT(data, 4);
	266	*romh = BIT(data, 5);
	267	*clrbank = BIT(data, 6);
	268	*from1 = BIT(data, 7);
	269	*rom3 = BIT(data, 8);
	270	*rom1 = BIT(data, 9);
	271	*iocs = BIT(data, 10);
	272	*dwe = BIT(data, 11);
	273	*casenb = BIT(data, 12);
	274	*vic = BIT(data, 13);
	275	*ioacc = BIT(data, 14);
	276	*gwe = BIT(data, 15);
	277	*colorram = BIT(data, 16);
	278	*charom = BIT(data, 17);
236	279	}
237	280
238	281	UINT8 c128_state::read_memory(address_space &space, offs_t offset, offs_t vma, int ba, int aec, int z80io)
239	282	{
240	283	int rw = 1, ms0 = 1, ms1 = 1, ms2 = 1, ms3 = 1, cas0 = 1, cas1 = 1;
241		int cas = 1, gwe = 1, rom1 = 1, rom2 = 1, rom3 = 1, rom4 = 1, charom = 1, colorram = 1, vic = 1,
	284	int sden = 1, dir = 1, gwe = 1, rom1 = 1, rom2 = 1, rom3 = 1, rom4 = 1, charom = 1, colorram = 1, vic = 1,
242	285	from1 = 1, romh = 1, roml = 1, dwe = 1, ioacc = 1, clrbank = 1, iocs = 1, casenb = 1;
243	286	int io1 = 1, io2 = 1;
244	287
245	288	offs_t ta = m_mmu->ta_r(offset, aec, &ms0, &ms1, &ms2, &ms3, &cas0, &cas1);
246	289
247		bankswitch_pla(offset, vma, ba, rw, aec, z80io, ms3, ms2, ms1, ms0,
248		&cas, &gwe, &rom1, &rom2, &rom3, &rom4, &charom, &colorram, &vic,
	290	bankswitch_pla(offset, ta, vma, ba, rw, aec, z80io, ms3, ms2, ms1, ms0,
	291	&sden, &dir, &gwe, &rom1, &rom2, &rom3, &rom4, &charom, &colorram, &vic,
249	292	&from1, &romh, &roml, &dwe, &ioacc, &clrbank, &iocs, &casenb);
250	293
251	294	UINT8 data = 0xff;
r17795	r17796
357	400	void c128_state::write_memory(address_space &space, offs_t offset, offs_t vma, UINT8 data, int ba, int aec, int z80io)
358	401	{
359	402	int rw = 0, ms0 = 1, ms1 = 1, ms2 = 1, ms3 = 1, cas0 = 1, cas1 = 1;
360		int cas = 1, gwe = 1, rom1 = 1, rom2 = 1, rom3 = 1, rom4 = 1, charom = 1, colorram = 1, vic = 1,
	403	int sden = 1, dir = 1, gwe = 1, rom1 = 1, rom2 = 1, rom3 = 1, rom4 = 1, charom = 1, colorram = 1, vic = 1,
361	404	from1 = 1, romh = 1, roml = 1, dwe = 1, ioacc = 1, clrbank = 1, iocs = 1, casenb = 1;
362	405	int io1 = 1, io2 = 1;
363	406
364	407	offs_t ta = m_mmu->ta_r(offset, aec, &ms0, &ms1, &ms2, &ms3, &cas0, &cas1);
365	408
366		bankswitch_pla(offset, vma, ba, rw, aec, z80io, ms3, ms2, ms1, ms0,
367		&cas, &gwe, &rom1, &rom2, &rom3, &rom4, &charom, &colorram, &vic,
	409	bankswitch_pla(offset, ta, vma, ba, rw, aec, z80io, ms3, ms2, ms1, ms0,
	410	&sden, &dir, &gwe, &rom1, &rom2, &rom3, &rom4, &charom, &colorram, &vic,
368	411	&from1, &romh, &roml, &dwe, &ioacc, &clrbank, &iocs, &casenb);
369	412
370	413	if (!casenb && !dwe)
r17795	r17796
830	873	m_maincpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
831	874	m_subcpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
832	875	}
	876
	877	m_z80en = state;
833	878	}
834	879
835	880	WRITE_LINE_MEMBER( c128_state::mmu_fsdir_w )
r17795	r17796
1063	1108
1064	1109	// devices
1065	1110	MCFG_MOS8722_ADD(MOS8722_TAG, mmu_intf)
	1111	MCFG_MOS8721_ADD(MOS8721_TAG)
1066	1112	MCFG_MOS6526R1_ADD(MOS6526_1_TAG, VIC6567_CLOCK, 60, c128_cia1_intf)
1067	1113	MCFG_MOS6526R1_ADD(MOS6526_2_TAG, VIC6567_CLOCK, 60, c128_cia2_intf)
1068	1114	MCFG_QUICKLOAD_ADD("quickload", cbm_c64, "p00,prg", CBM_QUICKLOAD_DELAY_SECONDS)
r17795	r17796
1169	1215
1170	1216	// devices
1171	1217	MCFG_MOS8722_ADD(MOS8722_TAG, mmu_intf)
	1218	MCFG_MOS8721_ADD(MOS8721_TAG)
1172	1219	MCFG_MOS6526R1_ADD(MOS6526_1_TAG, VIC6569_CLOCK, 50, c128_cia1_intf)
1173	1220	MCFG_MOS6526R1_ADD(MOS6526_2_TAG, VIC6569_CLOCK, 50, c128_cia2_intf)
1174	1221	MCFG_QUICKLOAD_ADD("quickload", cbm_c64, "p00,prg", CBM_QUICKLOAD_DELAY_SECONDS)
r17795	r17796
1259	1306	ROM_LOAD( "390059-01.bin", 0x120000, 0x2000, CRC(6aaaafe6) SHA1(29ed066d513f2d5c09ff26d9166ba23c2afb2b3f) )      // Character
1260	1307
1261	1308	ROM_REGION( 0x10000, M8502_TAG, ROMREGION_ERASEFF )
	1309
	1310	ROM_REGION( 0x100, MOS8721_TAG, 0 )
	1311	ROM_LOAD( "8721r3.u11", 0x000, 0x100, NO_DUMP )
1262	1312	ROM_END
1263	1313
1264	1314
r17795	r17796
1280	1330	ROM_LOAD( "390059-01.u18", 0x120000, 0x2000, CRC(6aaaafe6) SHA1(29ed066d513f2d5c09ff26d9166ba23c2afb2b3f) )         // Character, "MOS // (C)1985 CBM // 390059-01 // M468613 8547H"
1281	1331
1282	1332	ROM_REGION( 0x10000, M8502_TAG, ROMREGION_ERASEFF )
	1333
	1334	ROM_REGION( 0x100, MOS8721_TAG, 0 )
	1335	ROM_LOAD( "8721r3.u11", 0x000, 0x100, NO_DUMP )
1283	1336	ROM_END
1284	1337
1285	1338
r17795	r17796
1302	1355	ROM_LOAD( "390059-01.bin", 0x120000, 0x2000, CRC(6aaaafe6) SHA1(29ed066d513f2d5c09ff26d9166ba23c2afb2b3f) )      // Character
1303	1356
1304	1357	ROM_REGION( 0x10000, M8502_TAG, ROMREGION_ERASEFF )
	1358
	1359	ROM_REGION( 0x100, MOS8721_TAG, 0 )
	1360	ROM_LOAD( "8721r3.u11", 0x000, 0x100, NO_DUMP )
1305	1361	ROM_END
1306	1362
1307	1363
r17795	r17796
1320	1376	ROM_LOAD( "325181-02.u18", 0x120000, 0x2000, BAD_DUMP CRC(7a70d9b8) SHA1(aca3f7321ee7e6152f1f0afad646ae41964de4fb) ) // C128 Char Sw/Fi
1321	1377
1322	1378	ROM_REGION( 0x10000, M8502_TAG, ROMREGION_ERASEFF )
	1379
	1380	ROM_REGION( 0x100, MOS8721_TAG, 0 )
	1381	ROM_LOAD( "8721r3.u11", 0x000, 0x100, NO_DUMP )
1323	1382	ROM_END
1324	1383
1325	1384
r17795	r17796
1338	1397	ROM_LOAD( "325167-01.bin", 0x120000, 0x2000, BAD_DUMP CRC(bad36b88) SHA1(9119b27a1bf885fa4c76fff5d858c74c194dd2b8) )
1339	1398
1340	1399	ROM_REGION( 0x10000, M8502_TAG, ROMREGION_ERASEFF )
	1400
	1401	ROM_REGION( 0x100, MOS8721_TAG, 0 )
	1402	ROM_LOAD( "8721r3.u11", 0x000, 0x100, NO_DUMP )
1341	1403	ROM_END
1342	1404
1343	1405
r17795	r17796
1357	1419	ROM_LOAD( "char.nor", 0x120000, 0x2000, BAD_DUMP CRC(ba95c625) SHA1(5a87faa457979e7b6f434251a9e32f4483b337b3) )
1358	1420
1359	1421	ROM_REGION( 0x10000, M8502_TAG, ROMREGION_ERASEFF )
	1422
	1423	ROM_REGION( 0x100, MOS8721_TAG, 0 )
	1424	ROM_LOAD( "8721r3.u11", 0x000, 0x100, NO_DUMP )
1360	1425	ROM_END
1361	1426
1362	1427
r17795	r17796
1374	1439	ROM_LOAD( "390059-01.bin", 0x120000, 0x2000, CRC(6aaaafe6) SHA1(29ed066d513f2d5c09ff26d9166ba23c2afb2b3f) )
1375	1440
1376	1441	ROM_REGION( 0x10000, M8502_TAG, ROMREGION_ERASEFF )
	1442
	1443	ROM_REGION( 0x100, MOS8721_TAG, 0 )
	1444	ROM_LOAD( "8721r3.u11", 0x000, 0x100, NO_DUMP )
1377	1445	ROM_END
1378	1446
1379	1447
r17795	r17796
1396	1464	ROM_LOAD( "390059-01.bin", 0x120000, 0x2000, CRC(6aaaafe6) SHA1(29ed066d513f2d5c09ff26d9166ba23c2afb2b3f) )         // Character
1397	1465
1398	1466	ROM_REGION( 0x10000, M8502_TAG, ROMREGION_ERASEFF )
	1467
	1468	ROM_REGION( 0x100, MOS8721_TAG, 0 )
	1469	ROM_LOAD( "8721r3.u11", 0x000, 0x100, NO_DUMP )
1399	1470	ROM_END
1400	1471
1401	1472
r17795	r17796
1410	1481	ROM_LOAD( "315079-01.bin", 0x120000, 0x2000, CRC(fe5a2db1) SHA1(638f8aff51c2ac4f99a55b12c4f8c985ef4bebd3) )
1411	1482
1412	1483	ROM_REGION( 0x10000, M8502_TAG, ROMREGION_ERASEFF )
	1484
	1485	ROM_REGION( 0x100, MOS8721_TAG, 0 )
	1486	ROM_LOAD( "8721r3.u11", 0x000, 0x100, NO_DUMP )
1413	1487	ROM_END
1414	1488
1415	1489
r17795	r17796
1424	1498	ROM_LOAD( "325181-01.bin", 0x120000, 0x2000, CRC(7a70d9b8) SHA1(aca3f7321ee7e6152f1f0afad646ae41964de4fb) )
1425	1499
1426	1500	ROM_REGION( 0x10000, M8502_TAG, ROMREGION_ERASEFF )
	1501
	1502	ROM_REGION( 0x100, MOS8721_TAG, 0 )
	1503	ROM_LOAD( "8721r3.u11", 0x000, 0x100, NO_DUMP )
1427	1504	ROM_END
1428	1505
1429	1506
r17795	r17796
1441	1518	ROM_LOAD( "325167-01.bin", 0x120000, 0x2000, BAD_DUMP CRC(bad36b88) SHA1(9119b27a1bf885fa4c76fff5d858c74c194dd2b8) )
1442	1519
1443	1520	ROM_REGION( 0x10000, M8502_TAG, ROMREGION_ERASEFF )
	1521
	1522	ROM_REGION( 0x100, MOS8721_TAG, 0 )
	1523	ROM_LOAD( "8721r3.u11", 0x000, 0x100, NO_DUMP )
1444	1524	ROM_END
1445	1525
1446	1526
r17795	r17796
1457	1537	ROM_LOAD( "390059-01.bin", 0x120000, 0x2000, CRC(6aaaafe6) SHA1(29ed066d513f2d5c09ff26d9166ba23c2afb2b3f) )
1458	1538
1459	1539	ROM_REGION( 0x10000, M8502_TAG, ROMREGION_ERASEFF )
	1540
	1541	ROM_REGION( 0x100, MOS8721_TAG, 0 )
	1542	ROM_LOAD( "8721r3.u11", 0x000, 0x100, NO_DUMP )
1460	1543	ROM_END
1461	1544
1462	1545

trunk/src/mess/drivers/c64.c

r17795	r17796
70	70	int game = m_exp->game_r(offset, ba, rw, m_hiram);
71	71	int exrom = m_exp->exrom_r(offset, ba, rw, m_hiram);
72	72
73		UINT16 input = VA12 << 15 | VA13 << 14 | game << 13 | exrom << 12 | rw << 11 | aec << 10 | ba << 9 | A12 << 8 | A13 << 7 | A14 << 6 | A15 << 5 | m_va14 << 4 | m_charen << 3 | m_hiram << 2 | m_loram << 1 | cas;
74		UINT8 data = m_pla->read(input);
	73	UINT32 input = VA12 << 15 | VA13 << 14 | game << 13 | exrom << 12 | rw << 11 | aec << 10 | ba << 9 | A12 << 8 | A13 << 7 | A14 << 6 | A15 << 5 | m_va14 << 4 | m_charen << 3 | m_hiram << 2 | m_loram << 1 | cas;
	74	UINT32 data = m_pla->read(input);
75	75
76	76	*casram = BIT(data, 0);
77	77	*basic = BIT(data, 1);

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