MAME SVN History

199869 Revisions

r17691 Friday 7th September, 2012 at 03:39:23 UTC by Jonathan Gevaryahu
(MESS) VK100: simplification of the code by emulating the register file as an array. [Lord Nightmare]

[src/mess/drivers]

vk100.c

trunk/src/mess/drivers/vk100.c
r17690	r17691
165	165	UINT8 m_vgPMUL; // reload value for PMUL_Count
166	166	UINT8 m_vgPMUL_Count;
167	167	UINT8 m_vgDownCount; // down counter = number of pixels, loaded from vgDU on execute
168		#define VG_DU m_regfile[0]
169		#define VG_DVM m_regfile[1]
170		#define VG_DIR m_regfile[2]
171		#define VG_WOPS m_regfile[3]
172		UINT8 m_regfile[4];
	168	#define VG_DU m_vgRegFile[0]
	169	#define VG_DVM m_vgRegFile[1]
	170	#define VG_DIR m_vgRegFile[2]
	171	#define VG_WOPS m_vgRegFile[3]
	172	UINT8 m_vgRegFile[4];
173	173	UINT8 m_VG_MODE; // 2 bits, latched on EXEC
174	174	UINT8 m_vgGO; // activated on next SYNC pulse after EXEC
175	175	UINT8 m_ACTS;
r17690	r17691
182	182	DECLARE_WRITE8_MEMBER(vgSOPS);
183	183	DECLARE_WRITE8_MEMBER(vgPAT);
184	184	DECLARE_WRITE8_MEMBER(vgPMUL);
185		DECLARE_WRITE8_MEMBER(vgDU);
186		DECLARE_WRITE8_MEMBER(vgDVM);
187		DECLARE_WRITE8_MEMBER(vgDIR);
188		DECLARE_WRITE8_MEMBER(vgWOPS);
	185	DECLARE_WRITE8_MEMBER(vgREG);
189	186	DECLARE_WRITE8_MEMBER(vgEX);
190	187	DECLARE_WRITE8_MEMBER(KBDW);
191	188	DECLARE_WRITE8_MEMBER(BAUD);
r17690	r17691
424	421	}
425	422
426	423	/* port 0x60: "DU" load vg vector major register */
427		WRITE8_MEMBER(vk100_state::vgDU)
428		{
429		VG_DU = data;
430		#ifdef VG60_VERBOSE
431		logerror("VG: 0x60: DU Reg loaded with %02X\n", VG_DU);
432		#endif
433		}
434
435	424	/* port 0x61: "DVM" load vg vector minor register */
436		WRITE8_MEMBER(vk100_state::vgDVM)
437		{
438		VG_DVM = data;
439		#ifdef VG60_VERBOSE
440		logerror("VG: 0x61: DVM Reg loaded with %02X\n", VG_DVM);
441		#endif
442		}
443
444	425	/* port 0x62: "DIR" load vg Direction register */
445		WRITE8_MEMBER(vk100_state::vgDIR)
446		{
447		VG_DIR = data;
448		#ifdef VG60_VERBOSE
449		logerror("VG: 0x62: DIR Reg loaded with %02X\n", VG_DIR);
450		#endif
451		}
452
453	426	/* port 0x63: "WOPS" vector 'pixel' write options
454	427	* --Attributes to change -- Enable -- Functions --
455	428	* Blink Green Red Blue Attrib F1 F0 FN
456	429	* Change
457	430	* d7 d6 d5 d4 d3 d2 d1 d0
458	431	*/
459		WRITE8_MEMBER(vk100_state::vg~~WOPS~~)
	432	WRITE8_MEMBER(vk100_state::vgREG)
460	433	{
461		VG_~~WOPS~~ = data;
	434	m_vgRegFile[offset] = data;
462	435	#ifdef VG60_VERBOSE
463		static const char *const functions[] = { "Overlay", "Replace", "Complement", "Erase" };
464		logerror("VG: 0x64: WOPS Reg loaded with %02X: KGRB %d%d%d%d, AttrChange %d, Function %s, Negate %d\n", data, (VG_WOPS>>7)&1, (VG_WOPS>>6)&1, (VG_WOPS>>5)&1, (VG_WOPS>>4)&1, (VG_WOPS>>3)&1, functions[(VG_WOPS>>1)&3], VG_WOPS&1);
	436	static const char *const regDest[4] = { "DU", "DVM", "DIR", "WOPS" };
	437	static const char *const wopsFunctions[] = { "Overlay", "Replace", "Complement", "Erase" };
	438	if (offset < 3) logerror("VG: 0x%02x: %s Reg loaded with %02X\n", (0x60+offset), regDest[offset], m_vgRegFile[offset]);
	439	else logerror("VG: 0x63: WOPS Reg loaded with %02X: KGRB %d%d%d%d, AttrChange %d, Function %s, Negate %d\n", data, (VG_WOPS>>7)&1, (VG_WOPS>>6)&1, (VG_WOPS>>5)&1, (VG_WOPS>>4)&1, (VG_WOPS>>3)&1, wopsFunctions[(VG_WOPS>>1)&3], VG_WOPS&1);
465	440	#endif
466	441	}
467	442
	443
468	444	/* port 0x64: "EX MOV" execute a move (relative move of x and y using du/dvm/dir/err, no writing) */
469	445	/* port 0x65: "EX DOT" execute a dot (draw a dot at x,y?) */
470	446	/* port 0x66: "EX VEC" execute a vector (draw a vector from x,y to a destination using du/dvm/dir/err ) */
r17690	r17691
686	662	AM_RANGE (0x45, 0x45) AM_MIRROR(0x98) AM_WRITE(vgSOPS) //LD SOPS (screen options (plus uart dest))
687	663	AM_RANGE (0x46, 0x46) AM_MIRROR(0x98) AM_WRITE(vgPAT) //LD PAT (pattern register)
688	664	AM_RANGE (0x47, 0x47) AM_MIRROR(0x98) AM_WRITE(vgPMUL) //LD PMUL (pattern multiplier)
689		AM_RANGE (0x60, 0x60) AM_MIRROR(0x80) AM_WRITE(vgDU) //LD DU (major)
690		AM_RANGE (0x61, 0x61) AM_MIRROR(0x80) AM_WRITE(vgDVM) //LD DVM (minor)
691		AM_RANGE (0x62, 0x62) AM_MIRROR(0x80) AM_WRITE(vgDIR) //LD DIR (direction)
692		AM_RANGE (0x63, 0x63) AM_MIRROR(0x80) AM_WRITE(vgWOPS) //LD WOPS (write options)
	665	AM_RANGE (0x60, 0x63) AM_MIRROR(0x80) AM_WRITE(vgREG) //LD DU, DVM, DIR, WOPS (register file)
693	666	AM_RANGE (0x64, 0x67) AM_MIRROR(0x80) AM_WRITE(vgEX) //EX MOV, DOT, VEC, ER
694	667	AM_RANGE (0x68, 0x68) AM_MIRROR(0x83) AM_WRITE(KBDW) //KBDW (probably AM_MIRROR(0x03))
695	668	AM_RANGE (0x6C, 0x6C) AM_MIRROR(0x83) AM_WRITE(BAUD) //LD BAUD (baud rate clock divider setting for i8251 tx and rx clocks) (probably AM_MIRROR(0x03))

199869 Revisions