trunk/src/emu/cpu/powerpc/ppcdrc.c
| r17689 | r17690 | |
|---|
| 2313 | 2313 | } |
| 2314 | 2314 | } |
| 2315 | 2315 | |
| 2316 | /*----------------------------------------------------- |
| 2317 | generate_shift_flags - compute S/Z flags for shifts |
| 2318 | -------------------------------------------------------*/ |
| 2319 | |
| 2320 | static void generate_shift_flags(powerpc_state *ppc, drcuml_block *block, const opcode_desc *desc, UINT32 op) |
| 2321 | { |
| 2322 | UML_CMP(block, R32(G_RA(op)), 0); // cmp ra, #0 |
| 2323 | UML_SETc(block, COND_Z, I1); // set Z, i1 |
| 2324 | UML_SHL(block, I1, I1, 2); // shl i1, i1, #2 (i1 now = FLAG_Z) |
| 2325 | |
| 2326 | UML_SHR(block, I2, R32(G_RA(op)), 28); // shr i2, ra, #28 |
| 2327 | UML_AND(block, I2, I2, FLAG_S); // and i2, i2, FLAG_S (i2 now = FLAG_S) |
| 2328 | UML_OR(block, I1, I1, I2); // or i1, i1, i2 |
| 2329 | UML_LOAD(block, I0, ppc->impstate->sz_cr_table, I1, SIZE_BYTE, SCALE_x1); // load i0,sz_cr_table,i0,byte |
| 2330 | UML_OR(block, CR32(0), I0, XERSO32); // or [cr0],i0,[xerso] |
| 2331 | } |
| 2332 | |
| 2316 | 2333 | /*------------------------------------------------- |
| 2317 | 2334 | generate_fp_flags - compute FPSCR floating |
| 2318 | 2335 | point status flags |
| r17689 | r17690 | |
|---|
| 3238 | 3255 | |
| 3239 | 3256 | UML_LABEL(block, compiler->labelnum++); // 0: |
| 3240 | 3257 | UML_SHL(block, R32(G_RA(op)), R32(G_RS(op)), R32(G_RB(op))); // shl ra,rs,rb |
| 3241 | | generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags> |
| 3258 | // calculate S and Z flags |
| 3259 | if (op & M_RC) |
| 3260 | { |
| 3261 | generate_shift_flags(ppc, block, desc, op); |
| 3262 | } |
| 3242 | 3263 | |
| 3243 | 3264 | UML_LABEL(block, compiler->labelnum++); // 1: |
| 3244 | 3265 | return TRUE; |
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| 3259 | 3280 | |
| 3260 | 3281 | UML_LABEL(block, compiler->labelnum++); // 0: |
| 3261 | 3282 | UML_SHR(block, R32(G_RA(op)), R32(G_RS(op)), R32(G_RB(op))); // shr ra,i0,rb |
| 3262 | | generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags> |
| 3283 | // calculate S and Z flags |
| 3284 | if (op & M_RC) |
| 3285 | { |
| 3286 | generate_shift_flags(ppc, block, desc, op); |
| 3287 | } |
| 3263 | 3288 | |
| 3264 | 3289 | UML_LABEL(block, compiler->labelnum++); // 1: |
| 3265 | 3290 | return TRUE; |
| r17689 | r17690 | |
|---|
| 3293 | 3318 | UML_SAR(block, R32(G_RA(op)), R32(G_RS(op)), I2); // sar ra,rs,i2 |
| 3294 | 3319 | |
| 3295 | 3320 | UML_LABEL(block, compiler->labelnum++); // 2: |
| 3296 | | generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags> |
| 3321 | // calculate S and Z flags |
| 3322 | if (op & M_RC) |
| 3323 | { |
| 3324 | generate_shift_flags(ppc, block, desc, op); |
| 3325 | } |
| 3297 | 3326 | return TRUE; |
| 3298 | 3327 | |
| 3299 | 3328 | case 0x338: /* SRAWIx */ |
| r17689 | r17690 | |
|---|
| 3306 | 3335 | UML_ROLINS(block, SPR32(SPR_XER), I0, 29, XER_CA); // rolins [xer],i0,29,XER_CA |
| 3307 | 3336 | } |
| 3308 | 3337 | UML_SAR(block, R32(G_RA(op)), R32(G_RS(op)), G_SH(op)); // sar ra,rs,sh |
| 3309 | | generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags> |
| 3338 | // calculate S and Z flags |
| 3339 | if (op & M_RC) |
| 3340 | { |
| 3341 | generate_shift_flags(ppc, block, desc, op); |
| 3342 | } |
| 3310 | 3343 | return TRUE; |
| 3311 | 3344 | |
| 3312 | 3345 | case 0x01a: /* CNTLZWx */ |