trunk/src/mame/drivers/scregg.c
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| 8 | 8 | |
| 9 | 9 | To Do: |
| 10 | 10 | - Sprite Priorities in dommy |
| 11 | | - Where is IRQ ack in dommy? |
| 12 | 11 | |
| 13 | 12 | |
| 14 | 13 | Rock Duck |
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| 61 | 60 | scregg_state(const machine_config &mconfig, device_type type, const char *tag) |
| 62 | 61 | : btime_state(mconfig, type, tag) { } |
| 63 | 62 | |
| 64 | | DECLARE_WRITE8_MEMBER(dommy_coincounter_w); |
| 63 | DECLARE_WRITE8_MEMBER(scregg_irqack_w); |
| 64 | DECLARE_READ8_MEMBER(scregg_irqack_r); |
| 65 | 65 | |
| 66 | 66 | DECLARE_DRIVER_INIT(rockduck); |
| 67 | 67 | }; |
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| 70 | 70 | |
| 71 | 71 | static TIMER_DEVICE_CALLBACK( scregg_interrupt ) |
| 72 | 72 | { |
| 73 | // assume that the irq generator is similar to burgertime hw |
| 73 | 74 | scregg_state *state = timer.machine().driver_data<scregg_state>(); |
| 74 | | device_set_input_line(state->m_maincpu, 0, (param & 8) ? HOLD_LINE : CLEAR_LINE); |
| 75 | device_set_input_line(state->m_maincpu, 0, (param & 8) ? ASSERT_LINE : CLEAR_LINE); |
| 75 | 76 | } |
| 76 | 77 | |
| 77 | | WRITE8_MEMBER(scregg_state::dommy_coincounter_w) |
| 78 | WRITE8_MEMBER(scregg_state::s |
| 78 | 79 | { |
| 79 | | coin_counter_w(machine(), 0, data & 0x40); |
| 80 | | coin_counter_w(machine(), 1, data & 0x80); |
| 80 | device_set_input_line(m_maincpu, 0, CLEAR_LINE); |
| 81 | 81 | } |
| 82 | 82 | |
| 83 | READ8_MEMBER(scregg_state::scregg_irqack_r) |
| 84 | { |
| 85 | device_set_input_line(m_maincpu, 0, CLEAR_LINE); |
| 86 | return 0; |
| 87 | } |
| 83 | 88 | |
| 89 | |
| 84 | 90 | static ADDRESS_MAP_START( dommy_map, AS_PROGRAM, 8, scregg_state ) |
| 85 | 91 | AM_RANGE(0x0000, 0x07ff) AM_RAM |
| 86 | 92 | AM_RANGE(0x2000, 0x23ff) AM_RAM AM_SHARE("videoram") |
| 87 | 93 | AM_RANGE(0x2400, 0x27ff) AM_RAM AM_SHARE("colorram") |
| 88 | 94 | AM_RANGE(0x2800, 0x2bff) AM_READWRITE(btime_mirrorvideoram_r, btime_mirrorvideoram_w) |
| 89 | | AM_RANGE(0x4000, 0x4000) AM_READ_PORT("DSW1") AM_WRITE(dommy_coincounter_w) |
| 95 | AM_RANGE(0x4000, 0x4000) AM_READ_PORT("DSW1") AM_WRITE(s |
| 90 | 96 | AM_RANGE(0x4001, 0x4001) AM_READ_PORT("DSW2") AM_WRITE(btime_video_control_w) |
| 91 | | /* AM_RANGE(0x4004, 0x4004) */ /* this is read */ |
| 92 | 97 | AM_RANGE(0x4002, 0x4002) AM_READ_PORT("P1") |
| 93 | 98 | AM_RANGE(0x4003, 0x4003) AM_READ_PORT("P2") |
| 94 | | AM_RANGE(0x4004, 0x4005) AM_DEVWRITE_LEGACY("ay1", ay8910_address_data_w) |
| 99 | AM_RANGE(0x4004, 0x4005) AM_DEVWRITE_LEGACY("ay1", ay8910_address_data_w) AM_READ(scregg_irqack_r) |
| 95 | 100 | AM_RANGE(0x4006, 0x4007) AM_DEVWRITE_LEGACY("ay2", ay8910_address_data_w) |
| 96 | 101 | AM_RANGE(0xa000, 0xffff) AM_ROM |
| 97 | 102 | ADDRESS_MAP_END |
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| 104 | 109 | AM_RANGE(0x1800, 0x1bff) AM_READWRITE(btime_mirrorvideoram_r,btime_mirrorvideoram_w) |
| 105 | 110 | AM_RANGE(0x1c00, 0x1fff) AM_READWRITE(btime_mirrorcolorram_r,btime_mirrorcolorram_w) |
| 106 | 111 | AM_RANGE(0x2000, 0x2000) AM_READ_PORT("DSW1") AM_WRITE(btime_video_control_w) |
| 107 | | AM_RANGE(0x2001, 0x2001) AM_READ_PORT("DSW2") // AM_WRITENOP // irqack/watchdog? + coincounter? |
| 112 | AM_RANGE(0x2001, 0x2001) AM_READ_PORT("DSW2") |
| 108 | 113 | AM_RANGE(0x2002, 0x2002) AM_READ_PORT("P1") |
| 109 | 114 | AM_RANGE(0x2003, 0x2003) AM_READ_PORT("P2") |
| 110 | | AM_RANGE(0x2004, 0x2005) AM_DEVWRITE_LEGACY("ay1", ay8910_address_data_w) |
| 115 | AM_RANGE(0x2004, 0x2005) AM_DEVWRITE_LEGACY("ay1", ay8910_address_data_w) AM_READ(scregg_irqack_r) |
| 111 | 116 | AM_RANGE(0x2006, 0x2007) AM_DEVWRITE_LEGACY("ay2", ay8910_address_data_w) |
| 112 | 117 | AM_RANGE(0x3000, 0x7fff) AM_ROM |
| 113 | 118 | AM_RANGE(0xf000, 0xffff) AM_ROM /* reset/interrupt vectors */ |