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r17424 Thursday 23rd August, 2012 at 15:31:38 UTC by Angelo Salese
Basic KRAM hook

[src/emu/video]	huc6272.c huc6272.h
[src/mess/drivers]	pcfx.c

trunk/src/emu/video/huc6272.c

r17423	r17424
16	16	// device type definition
17	17	const device_type huc6272 = &device_creator<huc6272_device>;
18	18
	19	static ADDRESS_MAP_START( huc6272_vram, AS_0, 16, huc6272_device )
	20	AM_RANGE(0x000000, 0x0fffff) AM_RAM
	21	AM_RANGE(0x100000, 0x1fffff) AM_RAM
	22	ADDRESS_MAP_END
19	23
	24
	25	//-------------------------------------------------
	26	//  memory_space_config - return a description of
	27	//  any address spaces owned by this device
	28	//-------------------------------------------------
	29
	30	const address_space_config *huc6272_device::memory_space_config(address_spacenum spacenum) const
	31	{
	32	return (spacenum == AS_0) ? &m_space_config : NULL;
	33	}
	34
20	35	//**************************************************************************
	36	//  INLINE HELPERS
	37	//**************************************************************************
	38
	39	//-------------------------------------------------
	40	//  read_dword - read a dword at the given address
	41	//-------------------------------------------------
	42
	43	inline UINT32 huc6272_device::read_word(offs_t address)
	44	{
	45	return space()->read_word(address << 1);
	46	}
	47
	48
	49	//-------------------------------------------------
	50	//  write_dword - write a dword at the given address
	51	//-------------------------------------------------
	52
	53	inline void huc6272_device::write_word(offs_t address, UINT32 data)
	54	{
	55	space()->write_word(address << 1, data);
	56	}
	57
	58	//**************************************************************************
21	59	//  LIVE DEVICE
22	60	//**************************************************************************
23	61
r17423	r17424
26	64	//-------------------------------------------------
27	65
28	66	huc6272_device::huc6272_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
29		: device_t(mconfig, huc6272, "huc6272", tag, owner, clock)
	67	: device_t(mconfig, huc6272, "huc6272", tag, owner, clock),
	68	device_memory_interface(mconfig, *this),
	69	m_space_config("videoram", ENDIANNESS_LITTLE, 16, 32, 0, NULL, *ADDRESS_MAP_NAME(huc6272_vram))
30	70	{
31	71
32	72	}
r17423	r17424
65	105	//  READ/WRITE HANDLERS
66	106	//**************************************************************************
67	107
68		READ16_MEMBER( huc6272_device::read )
	108	READ32_MEMBER( huc6272_device::read )
69	109	{
70		return 0;
	110	UINT32 res = 0;
	111
	112	if((offset & 1) == 0)
	113	res = m_register & 0x7f;
	114	else
	115	{
	116	switch(m_register)
	117	{
	118	/*
	119	x--- ---- ---- ---- ----
	120	*/
	121	case 0x0c: // KRAM load address
	122	res = (m_kram_addr_r & 0x3ffff) | ((m_kram_inc_r & 0x1ff) << 18) | ((m_kram_page_r & 1) << 31);
	123	break;
	124
	125	case 0x0d: // KRAM write address
	126	res = (m_kram_addr_w & 0x3ffff) | ((m_kram_inc_w & 0x1ff) << 18) | ((m_kram_page_w & 1) << 31);
	127	break;
	128
	129	case 0x0e:
	130	res = read_word((m_kram_addr_r)|(m_kram_page_r<<18));
	131	m_kram_addr_r += (m_kram_inc_r & 0x100) ? ((m_kram_inc_r & 0xff) - 0x100) : (m_kram_inc_r & 0xff);
	132	break;
	133	//default: printf("%04x\n",m_register);
	134	}
	135	}
	136
	137	return res;
71	138	}
72	139
73		WRITE16_MEMBER( huc6272_device::write )
	140	WRITE32_MEMBER( huc6272_device::write )
74	141	{
	142	if((offset & 1) == 0)
	143	m_register = data & 0x7f;
	144	else
	145	{
	146	switch(m_register)
	147	{
	148	/*
	149	---- ---- ---- ---- ----
	150	*/
	151	case 0x0c: // KRAM load address
	152	m_kram_addr_r = (data & 0x0003ffff);
	153	m_kram_inc_r =  (data & 0x07fc0000) >> 18;
	154	m_kram_page_r = (data & 0x80000000) >> 31;
	155	break;
	156
	157	case 0x0d: // KRAM write address
	158	m_kram_addr_w = (data & 0x0003ffff);
	159	m_kram_inc_w =  (data & 0x07fc0000) >> 18;
	160	m_kram_page_w = (data & 0x80000000) >> 31;
	161	break;
	162
	163	case 0x0e: // KRAM write VRAM
	164	write_word((m_kram_addr_w)|(m_kram_page_w<<18),data & 0xffff); /* TODO: there are some 32-bits accesses during BIOS? */
	165	m_kram_addr_w += (m_kram_inc_w & 0x100) ? ((m_kram_inc_w & 0xff) - 0x100) : (m_kram_inc_w & 0xff);
	166	break;
	167
	168	//default: printf("%04x %04x\n",m_register,data);
	169	}
	170	}
75	171	}

trunk/src/emu/video/huc6272.h

r17423	r17424
16	16	//**************************************************************************
17	17
18	18	#define MCFG_HUC6272_ADD(_tag,_freq) \
19		MCFG_DEVICE_ADD(_tag, huc6272, _freq) \
	19	MCFG_DEVICE_ADD(_tag, huc6272, _freq)
20	20
21	21
22	22	//**************************************************************************
r17423	r17424
25	25
26	26	// ======================> huc6272_device
27	27
28		class huc6272_device :   public device_t
	28	class huc6272_device :   public device_t,
	29	public device_memory_interface
29	30	{
30	31	public:
31	32	// construction/destruction
32	33	huc6272_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
33	34
34	35	// I/O operations
35		DECLARE_WRITE16_MEMBER( write );
36		DECLARE_READ16_MEMBER( read );
	36	DECLARE_WRITE32_MEMBER( write );
	37	DECLARE_READ32_MEMBER( read );
37	38
	39
38	40	protected:
39	41	// device-level overrides
40	42	virtual void device_validity_check(validity_checker &valid) const;
41	43	virtual void device_start();
42	44	virtual void device_reset();
	45	virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const;
	46
	47	private:
	48	inline UINT32 read_word(offs_t address);
	49	inline void write_word(offs_t address, UINT32 data);
	50	UINT8 m_register;
	51	UINT32 m_kram_addr_r, m_kram_addr_w;
	52	UINT16 m_kram_inc_r,m_kram_inc_w;
	53	UINT8 m_kram_page_r,m_kram_page_w;
	54
	55	const address_space_config      m_space_config;
43	56	};
44	57
45	58

trunk/src/mess/drivers/pcfx.c

r17423	r17424
166	166	AM_RANGE( 0x00000300, 0x000003FF ) AM_DEVREADWRITE16( "huc6261", huc6261_device, read, write, 0xffff )   /* HuC6261 */
167	167	AM_RANGE( 0x00000400, 0x000004FF ) AM_DEVREADWRITE8( "huc6270_a", huc6270_device, read, write, 0xffff )   /* HuC6270-A */
168	168	AM_RANGE( 0x00000500, 0x000005FF ) AM_DEVREADWRITE8( "huc6270_b", huc6270_device, read, write, 0xffff )   /* HuC6270-B */
169		AM_RANGE( 0x00000600, 0x000006FF ) AM_DEVREADWRITE16( "huc6272", huc6272_device, read, write, 0xffff )   /* HuC6272 */
	169	AM_RANGE( 0x00000600, 0x000006FF ) AM_DEVREADWRITE( "huc6272", huc6272_device, read, write )   /* HuC6272 */
170	170	AM_RANGE( 0x00000C80, 0x00000C83 ) AM_NOP
171	171	AM_RANGE( 0x00000E00, 0x00000EFF ) AM_READWRITE16( irq_read, irq_write, 0xffff )   /* Interrupt controller */
172	172	AM_RANGE( 0x00000F00, 0x00000FFF ) AM_NOP

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