trunk/src/mame/drivers/fidelz80.cpp
| r253062 | r253063 | |
| 598 | 598 | PB.4 - white wire (and TSI BUSY line) |
| 599 | 599 | PB.5 - selection jumper input (see below) |
| 600 | 600 | PB.6 - TSI start line |
| 601 | | PB.7 - TSI ROM A12 line |
| 601 | PB.7 - TSI ROM D0 line |
| 602 | 602 | |
| 603 | 603 | |
| 604 | 604 | selection jumpers: |
| r253062 | r253063 | |
| 1070 | 1070 | { |
| 1071 | 1071 | // d0-d3: select digits |
| 1072 | 1072 | // d0-d7: select leds, input mux low bits |
| 1073 | | m_inp_mux = (m_inp_mux & ~0xff) | data; |
| 1073 | m_inp_mux = (m_inp_mux & 0x300) | data; |
| 1074 | 1074 | m_led_select = data; |
| 1075 | 1075 | vsc_prepare_display(); |
| 1076 | 1076 | } |
| r253062 | r253063 | |
| 1081 | 1081 | READ8_MEMBER(fidelz80_state::vsc_pio_porta_r) |
| 1082 | 1082 | { |
| 1083 | 1083 | // d0-d7: multiplexed inputs |
| 1084 | | return read_inputs(11); |
| 1085 | | |
| 1084 | return read_inputs(10); |
| 1086 | 1085 | } |
| 1087 | 1086 | |
| 1088 | 1087 | READ8_MEMBER(fidelz80_state::vsc_pio_portb_r) |
| r253062 | r253063 | |
| 1091 | 1090 | |
| 1092 | 1091 | // d4: TSI BUSY line |
| 1093 | 1092 | ret |= (m_speech->busy_r()) ? 0 : 0x10; |
| 1094 | | |
| 1093 | |
| 1095 | 1094 | return ret; |
| 1096 | 1095 | } |
| 1097 | 1096 | |
| 1098 | 1097 | WRITE8_MEMBER(fidelz80_state::vsc_pio_portb_w) |
| 1099 | 1098 | { |
| 1100 | 1099 | // d0,d1: input mux highest bits |
| 1101 | | // d5: enable language switch |
| 1102 | | m_inp_mux = (m_inp_mux & ~0x700) | (data << 8 & 0x300) | (data << 5 & 0x400); |
| 1103 | | |
| 1104 | | //if (m_inp_mux & 0x400) debugger_break(machine()); |
| 1105 | | |
| 1106 | | // d7: TSI ROM A12 |
| 1107 | | |
| 1108 | | m_speech->force_update(); // update stream to now |
| 1109 | | m_speech_bank = data >> 7 & 1; |
| 1110 | | |
| 1100 | m_inp_mux = (m_inp_mux & 0xff) | (data << 8 & 0x300); |
| 1101 | |
| 1111 | 1102 | // d6: TSI START line |
| 1112 | 1103 | m_speech->start_w(data >> 6 & 1); |
| 1113 | | |
| 1104 | |
| 1114 | 1105 | // d2: lower TSI volume |
| 1115 | 1106 | m_speech->set_output_gain(0, (data & 4) ? 0.5 : 1.0); |
| 1116 | 1107 | } |
| r253062 | r253063 | |
| 1307 | 1298 | PORT_START("IN.4") |
| 1308 | 1299 | PORT_BIT(0x0f, IP_ACTIVE_HIGH, IPT_UNUSED) |
| 1309 | 1300 | |
| 1310 | | PORT_START("LEVEL") // hardwired (VCC/GND?) |
| 1311 | | PORT_CONFNAME( 0x80, 0x00, "Maximum Levels" ) |
| 1312 | | PORT_CONFSETTING( 0x00, "10" ) // factory setting |
| 1301 | PORT_START("LEVEL") // factory setting |
| 1302 | PORT_CONFNAME( 0x80, 0x00, "PPI.B.7: Maximum Levels" ) |
| 1303 | PORT_CONFSETTING( 0x00, "10" ) |
| 1313 | 1304 | PORT_CONFSETTING( 0x80, "3" ) |
| 1314 | 1305 | INPUT_PORTS_END |
| 1315 | 1306 | |
| 1316 | 1307 | static INPUT_PORTS_START( vcc ) |
| 1317 | 1308 | PORT_INCLUDE( vcc_base ) |
| 1318 | 1309 | |
| 1319 | | PORT_START("IN.4") // PCB jumpers, not consumer accessible |
| 1320 | | PORT_CONFNAME( 0x01, 0x00, "Language: French" ) |
| 1310 | PORT_START("IN.4") // not consumer accessible |
| 1311 | PORT_CONFNAME( 0x01, 0x00, "PCB Jumper: French" ) |
| 1321 | 1312 | PORT_CONFSETTING( 0x00, DEF_STR( Off ) ) |
| 1322 | 1313 | PORT_CONFSETTING( 0x01, DEF_STR( On ) ) |
| 1323 | | PORT_CONFNAME( 0x02, 0x00, "Language: Spanish" ) |
| 1314 | PORT_CONFNAME( 0x02, 0x00, "PCB Jumper: Spanish" ) |
| 1324 | 1315 | PORT_CONFSETTING( 0x00, DEF_STR( Off ) ) |
| 1325 | 1316 | PORT_CONFSETTING( 0x02, DEF_STR( On ) ) |
| 1326 | | PORT_CONFNAME( 0x04, 0x00, "Language: German" ) |
| 1317 | PORT_CONFNAME( 0x04, 0x00, "PCB Jumper: German" ) |
| 1327 | 1318 | PORT_CONFSETTING( 0x00, DEF_STR( Off ) ) |
| 1328 | 1319 | PORT_CONFSETTING( 0x04, DEF_STR( On ) ) |
| 1329 | | PORT_CONFNAME( 0x08, 0x00, "Language: Special" ) |
| 1320 | PORT_CONFNAME( 0x08, 0x00, "PCB Jumper: Special" ) |
| 1330 | 1321 | PORT_CONFSETTING( 0x00, DEF_STR( Off ) ) |
| 1331 | 1322 | PORT_CONFSETTING( 0x08, DEF_STR( On ) ) |
| 1332 | 1323 | INPUT_PORTS_END |
| r253062 | r253063 | |
| 1335 | 1326 | PORT_INCLUDE( vcc ) |
| 1336 | 1327 | |
| 1337 | 1328 | PORT_MODIFY("IN.4") |
| 1338 | | PORT_CONFNAME( 0x01, 0x01, "Language: French" ) |
| 1329 | PORT_CONFNAME( 0x01, 0x01, "PCB Jumper: French" ) |
| 1339 | 1330 | PORT_CONFSETTING( 0x00, DEF_STR( Off ) ) |
| 1340 | 1331 | PORT_CONFSETTING( 0x01, DEF_STR( On ) ) |
| 1341 | 1332 | INPUT_PORTS_END |
| r253062 | r253063 | |
| 1344 | 1335 | PORT_INCLUDE( vcc ) |
| 1345 | 1336 | |
| 1346 | 1337 | PORT_MODIFY("IN.4") |
| 1347 | | PORT_CONFNAME( 0x02, 0x02, "Language: Spanish" ) |
| 1338 | PORT_CONFNAME( 0x02, 0x02, "PCB Jumper: Spanish" ) |
| 1348 | 1339 | PORT_CONFSETTING( 0x00, DEF_STR( Off ) ) |
| 1349 | 1340 | PORT_CONFSETTING( 0x02, DEF_STR( On ) ) |
| 1350 | 1341 | INPUT_PORTS_END |
| r253062 | r253063 | |
| 1353 | 1344 | PORT_INCLUDE( vcc ) |
| 1354 | 1345 | |
| 1355 | 1346 | PORT_MODIFY("IN.4") |
| 1356 | | PORT_CONFNAME( 0x04, 0x04, "Language: German" ) |
| 1347 | PORT_CONFNAME( 0x04, 0x04, "PCB Jumper: German" ) |
| 1357 | 1348 | PORT_CONFSETTING( 0x00, DEF_STR( Off ) ) |
| 1358 | 1349 | PORT_CONFSETTING( 0x04, DEF_STR( On ) ) |
| 1359 | 1350 | INPUT_PORTS_END |
| r253062 | r253063 | |
| 1458 | 1449 | PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("DM") PORT_CODE(KEYCODE_M) |
| 1459 | 1450 | PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("ST") PORT_CODE(KEYCODE_S) |
| 1460 | 1451 | PORT_BIT(0xc0, IP_ACTIVE_HIGH, IPT_UNUSED) |
| 1461 | | |
| 1462 | | PORT_START("IN.10") // hardwired (2 diodes) |
| 1463 | | PORT_CONFNAME( 0x03, 0x00, "Language" ) |
| 1464 | | PORT_CONFSETTING( 0x00, "English" ) |
| 1465 | | PORT_CONFSETTING( 0x01, "1" ) // todo: game dasm says it checks against 0/not0, 2, 3.. which language is which? |
| 1466 | | PORT_CONFSETTING( 0x02, "2" ) |
| 1467 | | PORT_CONFSETTING( 0x03, "3" ) |
| 1468 | 1452 | INPUT_PORTS_END |
| 1469 | 1453 | |
| 1470 | 1454 | static INPUT_PORTS_START( vbrc ) |
| r253062 | r253063 | |
| 1598 | 1582 | /* sound hardware */ |
| 1599 | 1583 | MCFG_SPEAKER_STANDARD_MONO("mono") |
| 1600 | 1584 | MCFG_SOUND_ADD("speech", S14001A, 25000) // R/C circuit, around 25khz |
| 1601 | | MCFG_S14001A_EXT_READ_HANDLER(READ8(fidelz80_state, vcc_speech_r)) |
| 1602 | 1585 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.75) |
| 1603 | 1586 | MACHINE_CONFIG_END |
| 1604 | 1587 | |
| r253062 | r253063 | |
| 1722 | 1705 | ROM_LOAD("101-64109.bin", 0x2000, 0x2000, CRC(08a3577c) SHA1(69fe379d21a9d4b57c84c3832d7b3e7431eec341) ) |
| 1723 | 1706 | ROM_LOAD("101-32024.bin", 0x4000, 0x1000, CRC(2a078676) SHA1(db2f0aba7e8ac0f84a17bae7155210cdf0813afb) ) |
| 1724 | 1707 | |
| 1725 | | ROM_REGION( 0x2000, "speech", 0 ) |
| 1708 | ROM_REGION( 0x1000, "speech", 0 ) |
| 1726 | 1709 | ROM_LOAD("101-32107.bin", 0x0000, 0x1000, CRC(f35784f9) SHA1(348e54a7fa1e8091f89ac656b4da22f28ca2e44d) ) |
| 1727 | | ROM_RELOAD( 0x1000, 0x1000) |
| 1728 | 1710 | ROM_END |
| 1729 | 1711 | |
| 1730 | | ROM_START( vscsp ) |
| 1731 | | ROM_REGION( 0x10000, "maincpu", 0 ) |
| 1732 | | ROM_LOAD("101-64108.bin", 0x0000, 0x2000, CRC(c9c98490) SHA1(e6db883df088d60463e75db51433a4b01a3e7626) ) |
| 1733 | | ROM_LOAD("101-64109.bin", 0x2000, 0x2000, CRC(08a3577c) SHA1(69fe379d21a9d4b57c84c3832d7b3e7431eec341) ) |
| 1734 | | ROM_LOAD("101-32024.bin", 0x4000, 0x1000, CRC(2a078676) SHA1(db2f0aba7e8ac0f84a17bae7155210cdf0813afb) ) |
| 1735 | 1712 | |
| 1736 | | ROM_REGION( 0x2000, "speech", 0 ) |
| 1737 | | ROM_LOAD("vcc-spanish.bin", 0x0000, 0x2000, BAD_DUMP CRC(8766e128) SHA1(78c7413bf240159720b131ab70bfbdf4e86eb1e9) ) // taken from vcc/fexcelv, assume correct |
| 1738 | | ROM_END |
| 1739 | | |
| 1740 | | ROM_START( vscg ) |
| 1741 | | ROM_REGION( 0x10000, "maincpu", 0 ) |
| 1742 | | ROM_LOAD("101-64108.bin", 0x0000, 0x2000, CRC(c9c98490) SHA1(e6db883df088d60463e75db51433a4b01a3e7626) ) |
| 1743 | | ROM_LOAD("101-64109.bin", 0x2000, 0x2000, CRC(08a3577c) SHA1(69fe379d21a9d4b57c84c3832d7b3e7431eec341) ) |
| 1744 | | ROM_LOAD("101-32024.bin", 0x4000, 0x1000, CRC(2a078676) SHA1(db2f0aba7e8ac0f84a17bae7155210cdf0813afb) ) |
| 1745 | | |
| 1746 | | ROM_REGION( 0x2000, "speech", 0 ) |
| 1747 | | ROM_LOAD("vcc-german.bin", 0x0000, 0x2000, BAD_DUMP CRC(6c85e310) SHA1(20d1d6543c1e6a1f04184a2df2a468f33faec3ff) ) // taken from fexcelv, assume correct |
| 1748 | | ROM_END |
| 1749 | | |
| 1750 | | ROM_START( vscfr ) |
| 1751 | | ROM_REGION( 0x10000, "maincpu", 0 ) |
| 1752 | | ROM_LOAD("101-64108.bin", 0x0000, 0x2000, CRC(c9c98490) SHA1(e6db883df088d60463e75db51433a4b01a3e7626) ) |
| 1753 | | ROM_LOAD("101-64109.bin", 0x2000, 0x2000, CRC(08a3577c) SHA1(69fe379d21a9d4b57c84c3832d7b3e7431eec341) ) |
| 1754 | | ROM_LOAD("101-32024.bin", 0x4000, 0x1000, CRC(2a078676) SHA1(db2f0aba7e8ac0f84a17bae7155210cdf0813afb) ) |
| 1755 | | |
| 1756 | | ROM_REGION( 0x2000, "speech", 0 ) |
| 1757 | | ROM_LOAD("vcc-french.bin", 0x0000, 0x2000, BAD_DUMP CRC(fe8c5c18) SHA1(2b64279ab3747ee81c86963c13e78321c6cfa3a3) ) // taken from fexcelv, assume correct |
| 1758 | | ROM_END |
| 1759 | | |
| 1760 | | |
| 1761 | 1713 | ROM_START( vbrc ) // AKA model 7002 |
| 1762 | 1714 | ROM_REGION( 0x10000, "maincpu", 0 ) |
| 1763 | 1715 | // nec 2364 mask roms; pin 27 (PGM, probably NC here due to mask roms) goes to the pcb |
| r253062 | r253063 | |
| 1805 | 1757 | COMP( 1980, uvcg, vcc, 0, vcc, vccg, driver_device, 0, "Fidelity Electronics", "Advanced Voice Chess Challenger (German)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) |
| 1806 | 1758 | COMP( 1980, uvcfr, vcc, 0, vcc, vccfr, driver_device, 0, "Fidelity Electronics", "Advanced Voice Chess Challenger (French)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) |
| 1807 | 1759 | |
| 1808 | | COMP( 1980, vsc, 0, 0, vsc, vsc, driver_device, 0, "Fidelity Electronics", "Voice Sensory Chess Challenger (English)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK ) |
| 1809 | | COMP( 1980, vscsp, vsc, 0, vsc, vsc, driver_device, 0, "Fidelity Electronics", "Voice Sensory Chess Challenger (Spanish)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK ) |
| 1810 | | COMP( 1980, vscg, vsc, 0, vsc, vsc, driver_device, 0, "Fidelity Electronics", "Voice Sensory Chess Challenger (German)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK ) |
| 1811 | | COMP( 1980, vscfr, vsc, 0, vsc, vsc, driver_device, 0, "Fidelity Electronics", "Voice Sensory Chess Challenger (French)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK ) |
| 1760 | COMP( 1980, vsc, 0, 0, vsc, vsc, driver_device, 0, "Fidelity Electronics", "Voice Sensory Chess Challenger", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK ) |
| 1812 | 1761 | |
| 1813 | 1762 | COMP( 1979, vbrc, 0, 0, vbrc, vbrc, driver_device, 0, "Fidelity Electronics", "Voice Bridge Challenger", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) |
| 1814 | 1763 | COMP( 1980, bridgec3, vbrc, 0, vbrc, vbrc, driver_device, 0, "Fidelity Electronics", "Voice Bridge Challenger III", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) |
trunk/src/mame/drivers/iteagle.cpp
| r253062 | r253063 | |
| 179 | 179 | |
| 180 | 180 | static MACHINE_CONFIG_DERIVED( gtfore01, iteagle ) |
| 181 | 181 | MCFG_DEVICE_MODIFY(PCI_ID_FPGA) |
| 182 | | MCFG_ITEAGLE_FPGA_INIT(0x00000401, 0x0b0b0b) |
| 182 | MCFG_ITEAGLE_FPGA_INIT(0x01000401, 0x0b0b0b) |
| 183 | 183 | MCFG_DEVICE_MODIFY(PCI_ID_EEPROM) |
| 184 | 184 | MCFG_ITEAGLE_EEPROM_INIT(0x0401, 0x7) |
| 185 | 185 | MACHINE_CONFIG_END |
| r253062 | r253063 | |
| 187 | 187 | static MACHINE_CONFIG_DERIVED( gtfore02, iteagle ) |
| 188 | 188 | MCFG_DEVICE_MODIFY(PCI_ID_FPGA) |
| 189 | 189 | MCFG_ITEAGLE_FPGA_INIT(0x01000402, 0x020201) |
| 190 | | MCFG_DEVICE_MODIFY(PCI_ID_EEPROM) |
| 190 | MCFG_DEVICE_MODIFY(":pci:0a.0") |
| 191 | 191 | MCFG_ITEAGLE_EEPROM_INIT(0x0402, 0x7) |
| 192 | 192 | MACHINE_CONFIG_END |
| 193 | 193 | |
| r253062 | r253063 | |
| 215 | 215 | static MACHINE_CONFIG_DERIVED( gtfore06, iteagle ) |
| 216 | 216 | MCFG_DEVICE_MODIFY(PCI_ID_FPGA) |
| 217 | 217 | MCFG_ITEAGLE_FPGA_INIT(0x01000406, 0x0c0b0d) |
| 218 | | MCFG_DEVICE_MODIFY(PCI_ID_EEPROM) |
| 218 | MCFG_DEVICE_MODIFY(":pci:0a.0") |
| 219 | 219 | MCFG_ITEAGLE_EEPROM_INIT(0x0406, 0x9); |
| 220 | 220 | MACHINE_CONFIG_END |
| 221 | 221 | |
| 222 | 222 | static MACHINE_CONFIG_DERIVED( carnking, iteagle ) |
| 223 | 223 | MCFG_DEVICE_MODIFY(PCI_ID_FPGA) |
| 224 | | MCFG_ITEAGLE_FPGA_INIT(0x01000a01, 0x0e0a0a) |
| 224 | MCFG_ITEAGLE_FPGA_INIT(0x01000603, 0x0c0b0d) |
| 225 | 225 | MCFG_DEVICE_MODIFY(PCI_ID_EEPROM) |
| 226 | | MCFG_ITEAGLE_EEPROM_INIT(0x0a01, 0x9) |
| 226 | MCFG_ITEAGLE_EEPROM_INIT(0x0603, 0x9) |
| 227 | 227 | MACHINE_CONFIG_END |
| 228 | 228 | |
| 229 | 229 | static MACHINE_CONFIG_DERIVED( bbhsc, iteagle ) |
| 230 | 230 | MCFG_DEVICE_MODIFY(PCI_ID_FPGA) |
| 231 | | MCFG_ITEAGLE_FPGA_INIT(0x02000600, 0x0c0a0a) |
| 231 | MCFG_ITEAGLE_FPGA_INIT(0x01000600, 0x0c0a0a) |
| 232 | 232 | MCFG_DEVICE_MODIFY(PCI_ID_EEPROM) |
| 233 | | MCFG_ITEAGLE_EEPROM_INIT(0x0000, 0x7) |
| 233 | MCFG_ITEAGLE_EEPROM_INIT(0x0600, 0x9) |
| 234 | 234 | MACHINE_CONFIG_END |
| 235 | 235 | |
| 236 | 236 | static MACHINE_CONFIG_DERIVED( bbhcotw, iteagle ) |
| 237 | 237 | MCFG_DEVICE_MODIFY(PCI_ID_FPGA) |
| 238 | 238 | MCFG_ITEAGLE_FPGA_INIT(0x02000603, 0x080704) |
| 239 | | MCFG_DEVICE_MODIFY(PCI_ID_EEPROM) |
| 239 | MCFG_DEVICE_MODIFY(":pci:0a.0") |
| 240 | 240 | MCFG_ITEAGLE_EEPROM_INIT(0x0603, 0x9) |
| 241 | 241 | MACHINE_CONFIG_END |
| 242 | 242 | |
| r253062 | r253063 | |
| 331 | 331 | |
| 332 | 332 | INPUT_PORTS_END |
| 333 | 333 | |
| 334 | | static INPUT_PORTS_START( bbh ) |
| 334 | static INPUT_PORTS_START( bbhcotw ) |
| 335 | 335 | PORT_INCLUDE( iteagle ) |
| 336 | 336 | |
| 337 | 337 | PORT_MODIFY("IN1") |
| r253062 | r253063 | |
| 557 | 557 | |
| 558 | 558 | GAME( 2000, iteagle, 0, iteagle, iteagle, driver_device, 0, ROT0, "Incredible Technologies", "Eagle BIOS", MACHINE_IS_BIOS_ROOT ) |
| 559 | 559 | GAME( 1998, virtpool, iteagle, virtpool, virtpool, driver_device, 0, ROT0, "Incredible Technologies", "Virtual Pool", MACHINE_NOT_WORKING ) // random lockups on loading screens |
| 560 | | GAME( 2002, carnking, iteagle, carnking, bbh, driver_device, 0, ROT0, "Incredible Technologies", "Carnival King (v1.00.11)", 0 ) |
| 560 | GAME( 2002, carnking, iteagle, carnking, iteagle, driver_device, 0, ROT0, "Incredible Technologies", "Carnival King (v1.00.11)", MACHINE_NOT_WORKING ) |
| 561 | 561 | GAME( 2000, gtfore01, iteagle, gtfore01, iteagle, driver_device, 0, ROT0, "Incredible Technologies", "Golden Tee Fore! (v1.00.25)", 0 ) |
| 562 | 562 | GAME( 2001, gtfore02, iteagle, gtfore02, iteagle, driver_device, 0, ROT0, "Incredible Technologies", "Golden Tee Fore! 2002 (v2.01.06)", 0 ) |
| 563 | 563 | GAME( 2002, gtfore03, iteagle, gtfore03, iteagle, driver_device, 0, ROT0, "Incredible Technologies", "Golden Tee Fore! 2003 (v3.00.10)", 0 ) |
| r253062 | r253063 | |
| 569 | 569 | GAME( 2004, gtfore05b, gtfore05, gtfore05, iteagle, driver_device, 0, ROT0, "Incredible Technologies", "Golden Tee Fore! 2005 Extra (v5.01.00)", 0 ) |
| 570 | 570 | GAME( 2004, gtfore05c, gtfore05, gtfore05, iteagle, driver_device, 0, ROT0, "Incredible Technologies", "Golden Tee Fore! 2005 Extra (v5.00.00)", 0 ) |
| 571 | 571 | GAME( 2005, gtfore06, iteagle, gtfore06, iteagle, driver_device, 0, ROT0, "Incredible Technologies", "Golden Tee Fore! 2006 Complete (v6.00.01)", 0 ) |
| 572 | | GAME( 2002, bbhsc, iteagle, bbhsc, bbh, driver_device, 0, ROT0, "Incredible Technologies", "Big Buck Hunter - Shooter's Challenge (v1.50.07)", MACHINE_NOT_WORKING ) // doesn't boot |
| 573 | | GAME( 2006, bbhcotw, iteagle, bbhcotw, bbh, driver_device, 0, ROT0, "Incredible Technologies", "Big Buck Hunter Call of the Wild (v3.02.5)", MACHINE_NOT_WORKING ) // random lockups |
| 572 | GAME( 2002, bbhsc, iteagle, bbhsc, iteagle, driver_device, 0, ROT0, "Incredible Technologies", "Big Buck Hunter - Shooter's Challenge (v1.50.07)", MACHINE_NOT_WORKING ) // doesn't boot |
| 573 | GAME( 2006, bbhcotw, iteagle, bbhcotw, bbhcotw, driver_device, 0, ROT0, "Incredible Technologies", "Big Buck Hunter Call of the Wild (v3.02.5)", MACHINE_NOT_WORKING ) // random lockups |
trunk/src/mame/drivers/kurukuru.cpp
| r253062 | r253063 | |
| 459 | 459 | |
| 460 | 460 | static ADDRESS_MAP_START( ppj_audio_io, AS_IO, 8, kurukuru_state ) |
| 461 | 461 | ADDRESS_MAP_GLOBAL_MASK(0x7f) |
| 462 | | AM_RANGE(0x20, 0x20) AM_MIRROR(0x0f) AM_WRITE(kurukuru_adpcm_data_w) |
| 463 | | AM_RANGE(0x30, 0x30) AM_MIRROR(0x0f) AM_WRITE(kurukuru_adpcm_reset_w) |
| 464 | | AM_RANGE(0x40, 0x40) AM_MIRROR(0x0f) AM_READ(kurukuru_soundlatch_r) |
| 465 | | AM_RANGE(0x50, 0x50) AM_MIRROR(0x0f) AM_READ(kurukuru_adpcm_timer_irqack_r) |
| 466 | 462 | ADDRESS_MAP_END |
| 467 | | /* |
| 468 | | 30h -W --> 0x0b |
| 469 | | 40h R- --> soundlatch... |
| 470 | | 50h R- --> adpcm irq ack |
| 471 | | */ |
| 472 | 463 | |
| 464 | |
| 473 | 465 | /* YM2149 ports */ |
| 474 | 466 | WRITE8_MEMBER(kurukuru_state::ym2149_aout_w) |
| 475 | 467 | { |
| r253062 | r253063 | |
| 496 | 488 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_CODE(KEYCODE_C) PORT_NAME("3rd (Pyoko)") |
| 497 | 489 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_CODE(KEYCODE_V) PORT_NAME("4th (Kunio)") |
| 498 | 490 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_CODE(KEYCODE_B) PORT_NAME("5th (Pyon Pyon)") |
| 499 | | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_N) PORT_NAME("Unknown A0h - bit5") |
| 500 | | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_M) PORT_NAME("Unknown A0h - bit6") |
| 491 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_CODE(KEYCODE_N) PORT_NAME("Unknown A0h - bit5") |
| 492 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_CODE(KEYCODE_M) PORT_NAME("Unknown A0h - bit6") |
| 501 | 493 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 ) |
| 502 | 494 | |
| 503 | 495 | PORT_START("IN1") |
| r253062 | r253063 | |
| 566 | 558 | INPUT_PORTS_END |
| 567 | 559 | |
| 568 | 560 | |
| 569 | | static INPUT_PORTS_START( ppj ) |
| 570 | | PORT_START("IN0") |
| 571 | | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_CODE(KEYCODE_Z) PORT_NAME("1st (Boketa)") |
| 572 | | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_CODE(KEYCODE_X) PORT_NAME("2nd (Kunio)") |
| 573 | | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_CODE(KEYCODE_C) PORT_NAME("3rd (Pyon-Pyon)") |
| 574 | | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_CODE(KEYCODE_V) PORT_NAME("4th (Pyokorin)") |
| 575 | | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_CODE(KEYCODE_B) PORT_NAME("5th (Botechin)") |
| 576 | | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_S) PORT_NAME("Unknown 70h - bit5") |
| 577 | | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_D) PORT_NAME("Unknown 70h - bit6") |
| 578 | | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 ) |
| 579 | | |
| 580 | | PORT_START("IN1") |
| 581 | | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_9) PORT_NAME("Bookkeeping") |
| 582 | | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_NAME("Medal In") |
| 583 | | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_0) PORT_NAME("Reset Button") |
| 584 | | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN2 ) |
| 585 | | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_A) PORT_NAME("Unknown 60h - bit4") |
| 586 | | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE (2) |
| 587 | | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("hopper", ticket_dispenser_device, line_r) // hopper feedback |
| 588 | | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) |
| 589 | | |
| 590 | | PORT_START("DSW1") // found in the PCB: 00000000 (arranged for sale since they are uncommon settings) |
| 591 | | PORT_DIPNAME( 0x07, 0x03, "Coinage A (100 Y)" ) PORT_DIPLOCATION("DSW1:1,2,3") |
| 592 | | PORT_DIPSETTING( 0x00, "1 Coin / 1 Medal" ) |
| 593 | | PORT_DIPSETTING( 0x04, "1 Coin / 2 Medal" ) |
| 594 | | PORT_DIPSETTING( 0x02, "1 Coin / 3 Medal" ) |
| 595 | | PORT_DIPSETTING( 0x06, "1 Coin / 4 Medal" ) |
| 596 | | PORT_DIPSETTING( 0x01, "1 Coin / 5 Medal" ) |
| 597 | | PORT_DIPSETTING( 0x05, "1 Coin / 6 Medal" ) |
| 598 | | PORT_DIPSETTING( 0x03, "1 Coin / 10 Medal" ) |
| 599 | | PORT_DIPSETTING( 0x07, "1 Coin / 11 Medal" ) |
| 600 | | PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:4") |
| 601 | | PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) |
| 602 | | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 603 | | PORT_DIPNAME( 0x10, 0x00, "Unknown (related to coin1/payout)") PORT_DIPLOCATION("DSW1:5") |
| 604 | | PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) |
| 605 | | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 606 | | PORT_DIPNAME( 0x20, 0x00, "Coinage Config" ) PORT_DIPLOCATION("DSW1:6") |
| 607 | | PORT_DIPSETTING( 0x00, "Coin 1 = Normal" ) |
| 608 | | PORT_DIPSETTING( 0x20, "Coin 1 = Payout" ) |
| 609 | | PORT_DIPNAME( 0x40, 0x00, "Payout Mode" ) PORT_DIPLOCATION("DSW1:7") |
| 610 | | PORT_DIPSETTING( 0x40, "Manual" ) |
| 611 | | PORT_DIPSETTING( 0x00, "Automatic" ) |
| 612 | | PORT_DIPNAME( 0x80, 0x00, "Repeat Last Bet") PORT_DIPLOCATION("DSW1:8") |
| 613 | | PORT_DIPSETTING( 0x80, DEF_STR( No ) ) |
| 614 | | PORT_DIPSETTING( 0x00, DEF_STR( Yes ) ) |
| 615 | | |
| 616 | | PORT_START("DSW2") // found in the PCB: 00000000 (arranged for sale since they are uncommon settings) |
| 617 | | PORT_DIPNAME( 0x07, 0x01, "Percentage" ) PORT_DIPLOCATION("DSW2:1,2,3") |
| 618 | | PORT_DIPSETTING( 0x07, "50%" ) |
| 619 | | PORT_DIPSETTING( 0x03, "60%" ) |
| 620 | | PORT_DIPSETTING( 0x05, "70%" ) |
| 621 | | PORT_DIPSETTING( 0x01, "75%" ) |
| 622 | | PORT_DIPSETTING( 0x06, "80%" ) |
| 623 | | PORT_DIPSETTING( 0x02, "85%" ) |
| 624 | | PORT_DIPSETTING( 0x04, "90%" ) |
| 625 | | PORT_DIPSETTING( 0x00, "95%" ) |
| 626 | | PORT_DIPNAME( 0x08, 0x00, "Winwave" ) PORT_DIPLOCATION("DSW2:4") |
| 627 | | PORT_DIPSETTING( 0x08, "Small" ) |
| 628 | | PORT_DIPSETTING( 0x00, "Big" ) |
| 629 | | PORT_DIPNAME( 0x10, 0x00, "M.Medal" ) PORT_DIPLOCATION("DSW2:5") |
| 630 | | PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) |
| 631 | | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 632 | | PORT_DIPNAME( 0x60, 0x60, "HG" ) PORT_DIPLOCATION("DSW2:6,7") |
| 633 | | PORT_DIPSETTING( 0x60, "20-1" ) |
| 634 | | PORT_DIPSETTING( 0x20, "50-1" ) |
| 635 | | PORT_DIPSETTING( 0x40, "100-1" ) |
| 636 | | PORT_DIPSETTING( 0x00, "200-1" ) |
| 637 | | PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW2:8") |
| 638 | | PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) |
| 639 | | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 640 | | |
| 641 | | INPUT_PORTS_END |
| 642 | | |
| 643 | | |
| 644 | 561 | /************************************************* |
| 645 | 562 | * Machine Start & Reset Routines * |
| 646 | 563 | *************************************************/ |
| r253062 | r253063 | |
| 735 | 652 | |
| 736 | 653 | ***************************************************************************/ |
| 737 | 654 | |
| 738 | | /* Kuru Kuru Pyon Pyon. |
| 739 | | */ |
| 740 | 655 | ROM_START( kurukuru ) |
| 741 | 656 | ROM_REGION( 0x08000, "maincpu", 0 ) |
| 742 | 657 | ROM_LOAD( "kp_17l.ic17", 0x00000, 0x08000, CRC(9b552ebc) SHA1(07d0e62b7fdad381963a345376b72ad31eb7b96d) ) // program code |
| r253062 | r253063 | |
| 757 | 672 | ROM_LOAD( "7908b-4.ic32", 0x0600, 0x0034, CRC(bddf925e) SHA1(861cf5966444d0c0392241e5cfa08db475fb439a) ) |
| 758 | 673 | ROM_END |
| 759 | 674 | |
| 760 | | /* Pyon Pyon Jump. |
| 761 | | Ver 1.40. |
| 762 | | */ |
| 763 | 675 | ROM_START( ppj ) |
| 764 | 676 | ROM_REGION( 0x08000, "maincpu", 0 ) |
| 765 | 677 | ROM_LOAD( "ppj17.ic17", 0x00000, 0x08000, CRC(5d9c9ceb) SHA1(0f52c8a0aaaf978afeb07e56493399133b4ce781) ) // program code |
| r253062 | r253063 | |
| 781 | 693 | ROM_END |
| 782 | 694 | |
| 783 | 695 | |
| 784 | | /* YEAR NAME PARENT MACHINE INPUT STATE INIT ROT COMPANY FULLNAME FLAGS */ |
| 785 | | GAME( 199?, kurukuru, 0, kurukuru, kurukuru, driver_device, 0, ROT0, "Success / Taiyo Jidoki", "Kuru Kuru Pyon Pyon (Japan)", 0 ) |
| 786 | | GAME( 199?, ppj, 0, ppj, ppj, driver_device, 0, ROT0, "Success / Taiyo Jidoki", "Pyon Pyon Jump (V1.40, Japan)", 0 ) |
| 696 | /* YEAR NAME PARENT MACHINE INPUT STATE INIT ROT COMPANY FULLNAME FLAGS */ |
| 697 | GAME( 199?, kurukuru, 0, kurukuru, kurukuru, driver_device, 0, ROT0, "Success / Taiyo Jidoki", "Kuru Kuru Pyon Pyon (Japan)", 0 ) |
| 698 | GAME( 199?, ppj, 0, ppj, kurukuru, driver_device, 0, ROT0, "Success / Taiyo Jidoki", "Pyon Pyon Jump (Japan)", MACHINE_NOT_WORKING ) |
trunk/src/mame/drivers/mmodular.cpp
| r253062 | r253063 | |
| 15 | 15 | Vancouver 68020 12Mhz |
| 16 | 16 | Genius 68030 V4.00 33.333 Mhz |
| 17 | 17 | Genius 68030 V4.01 33.333 Mhz |
| 18 | Genius 68030 V4.01 33.333x2 Mhz (custom MESS overclocked version for higher ELO) |
| 18 | 19 | Berlin Pro 68020 24.576 Mhz (not modular board, but otherwise close to milano) |
| 19 | 20 | Berlin Pro (London) 68020 24.576 Mhz (not modular board, but otherwise close to milano) |
| 20 | 21 | London 68030 V5.00k 33.333 Mhz (probably the Genius 3/4 update ROM) |
| r253062 | r253063 | |
| 997 | 998 | MACHINE_START_MEMBER(polgar_state,van32) |
| 998 | 999 | { |
| 999 | 1000 | // patch LCD delay loop on the 68030 machines until waitstates and/or opcode timings are fixed in MAME core |
| 1000 | | // patches gen32 gen32_41 lond030 |
| 1001 | // patches gen32 gen32_41 gen32_oc lond030 |
| 1001 | 1002 | |
| 1002 | 1003 | UINT8 *rom = memregion("maincpu")->base(); |
| 1003 | 1004 | |
| 1004 | 1005 | if(rom[0x870] == 0x0c && rom[0x871] == 0x78) { |
| 1005 | | rom[0x870] = 0x38; |
| 1006 | if (!strcmp(machine().system().name,"gen32_oc")) { |
| 1007 | rom[0x870] = 0x6c; |
| 1008 | } else { |
| 1009 | rom[0x870] = 0x38; |
| 1010 | } |
| 1006 | 1011 | } |
| 1007 | 1012 | } |
| 1008 | 1013 | |
| r253062 | r253063 | |
| 1689 | 1694 | |
| 1690 | 1695 | MACHINE_CONFIG_END |
| 1691 | 1696 | |
| 1697 | static MACHINE_CONFIG_DERIVED( gen32_oc, gen32 ) |
| 1698 | MCFG_CPU_MODIFY("maincpu") |
| 1699 | MCFG_CPU_CLOCK( XTAL_33_333MHz * 2 ) |
| 1700 | MCFG_DEVICE_REMOVE("int_timer") |
| 1701 | MCFG_TIMER_DRIVER_ADD_PERIODIC("int_timer", polgar_state, timer_update_irq6, attotime::from_hz(500)) |
| 1702 | |
| 1703 | |
| 1704 | MACHINE_CONFIG_END |
| 1705 | |
| 1692 | 1706 | static MACHINE_CONFIG_START( bpl32, polgar_state ) |
| 1693 | 1707 | MCFG_CPU_ADD("maincpu", M68020, XTAL_24_576MHz) |
| 1694 | 1708 | MCFG_CPU_PROGRAM_MAP(bpl32_mem) |
| r253062 | r253063 | |
| 1837 | 1851 | ROM_LOAD("gen32_41.bin", 0x00000, 0x40000,CRC(ea9938c0) SHA1(645cf0b5b831b48104ad6cec8d78c63dbb6a588c)) |
| 1838 | 1852 | ROM_END |
| 1839 | 1853 | |
| 1854 | ROM_START( gen32_oc ) |
| 1855 | ROM_REGION32_BE( 0x40000, "maincpu", 0 ) |
| 1856 | ROM_LOAD("gen32_41.bin", 0x00000, 0x40000,CRC(ea9938c0) SHA1(645cf0b5b831b48104ad6cec8d78c63dbb6a588c)) |
| 1857 | ROM_END |
| 1858 | |
| 1840 | 1859 | ROM_START( berlinp ) |
| 1841 | 1860 | ROM_REGION32_BE( 0x40000, "maincpu", 0 ) |
| 1842 | 1861 | ROM_LOAD("berlinp.bin", 0x00000, 0x40000,CRC(82FBAF6E) SHA1(729B7CEF3DFAECC4594A6178FC4BA6015AFA6202)) |
| r253062 | r253063 | |
| 1885 | 1904 | CONS( 1992, risc, 0, 0, risc, van16, driver_device, 0, "Saitek", "RISC2500", MACHINE_SUPPORTS_SAVE|MACHINE_REQUIRES_ARTWORK|MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK ) |
| 1886 | 1905 | CONS( 1993, gen32, van16, 0, gen32, gen32, driver_device, 0, "Hegener & Glaser Muenchen", "Mephisto Genius030 V4.00", MACHINE_SUPPORTS_SAVE|MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK ) |
| 1887 | 1906 | CONS( 1993, gen32_41, van16, 0, gen32, gen32, driver_device, 0, "Hegener & Glaser Muenchen", "Mephisto Genius030 V4.01", MACHINE_SUPPORTS_SAVE|MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK ) |
| 1907 | CONS( 1993, gen32_oc, van16, 0, gen32_oc, gen32, driver_device, 0, "Hegener & Glaser Muenchen", "Mephisto Genius030 V4.01OC", MACHINE_SUPPORTS_SAVE|MACHINE_REQUIRES_ARTWORK|MACHINE_UNOFFICIAL | MACHINE_CLICKABLE_ARTWORK ) |
| 1888 | 1908 | CONS( 1994, berlinp, van16, 0, bpl32, bpl32, driver_device, 0, "Hegener & Glaser Muenchen", "Mephisto Berlin Pro 68020", MACHINE_SUPPORTS_SAVE|MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK ) |
| 1889 | 1909 | CONS( 1996, bpl32, van16, 0, bpl32, bpl32, driver_device, 0, "Hegener & Glaser Muenchen", "Mephisto Berlin Pro London Upgrade V5.00", MACHINE_SUPPORTS_SAVE|MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK ) |
| 1890 | 1910 | CONS( 1996, lond020, van16, 0, van32, van32, driver_device, 0, "Hegener & Glaser Muenchen", "Mephisto London 68020 32 Bit", MACHINE_SUPPORTS_SAVE|MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK ) |
trunk/src/mame/machine/iteagle_fpga.cpp
| r253062 | r253063 | |
| 4 | 4 | #include "coreutil.h" |
| 5 | 5 | |
| 6 | 6 | #define LOG_FPGA (0) |
| 7 | | #define LOG_SERIAL (0) |
| 8 | 7 | #define LOG_RTC (0) |
| 9 | 8 | #define LOG_RAM (0) |
| 10 | 9 | #define LOG_EEPROM (0) |
| r253062 | r253063 | |
| 81 | 80 | m_serial_str.clear(); |
| 82 | 81 | m_serial_idx = 0; |
| 83 | 82 | m_serial_data = false; |
| 84 | | memset(m_serial_com0, 0, sizeof(m_serial_com0)); |
| 85 | 83 | memset(m_serial_com1, 0, sizeof(m_serial_com1)); |
| 86 | 84 | memset(m_serial_com2, 0, sizeof(m_serial_com2)); |
| 87 | 85 | memset(m_serial_com3, 0, sizeof(m_serial_com3)); |
| 88 | | m_serial_com0[0] = 0x2c; |
| 86 | memset(m_serial_com4, 0, sizeof(m_serial_com4)); |
| 89 | 87 | m_serial_com1[0] = 0x2c; |
| 90 | 88 | m_serial_com2[0] = 0x2c; |
| 91 | 89 | m_serial_com3[0] = 0x2c; |
| 90 | m_serial_com4[0] = 0x2c; |
| 92 | 91 | } |
| 93 | 92 | |
| 94 | 93 | void iteagle_fpga_device::update_sequence(UINT32 data) |
| r253062 | r253063 | |
| 131 | 130 | val1 = ((m_seq & 0x2)<<6) | ((m_seq & 0x4)<<4) | ((m_seq & 0x8)<<2) | ((m_seq & 0x10)<<0) |
| 132 | 131 | | ((m_seq & 0x20)>>2) | ((m_seq & 0x40)>>4) | ((m_seq & 0x80)>>6) | ((m_seq & 0x100)>>8); |
| 133 | 132 | m_seq = (m_seq>>8) | ((feed&0xff)<<16); |
| 133 | //m_fpga_regs[offset] = (m_fpga_regs[offset]&0xFFFFFF00) | ((val1 + m_seq_rem1)&0xFF); |
| 134 | 134 | m_fpga_regs[offset] = (m_fpga_regs[offset]&0xFFFFFF00) | ((val1 + m_seq_rem1 + m_seq_rem2)&0xFF); |
| 135 | 135 | } else if (data & 0x2) { |
| 136 | 136 | val1 = ((m_seq & 0x2)<<1) | ((m_seq & 0x4)>>1) | ((m_seq & 0x8)>>3); |
| 137 | 137 | m_seq_rem1 = ((m_seq & 0x10)) | ((m_seq & 0x20)>>2) | ((m_seq & 0x40)>>4); |
| 138 | //m_seq_rem2 = ((m_seq & 0x80)>>1) | ((m_seq & 0x100)>>3) | ((m_seq & 0x200)>>5); |
| 138 | 139 | m_seq = (m_seq>>6) | ((feed&0x3f)<<18); |
| 139 | 140 | m_fpga_regs[offset] = (m_fpga_regs[offset]&0xFFFFFF00) | ((val1 + m_seq_rem1 + m_seq_rem2)&0xFF); |
| 140 | 141 | } else { |
| r253062 | r253063 | |
| 196 | 197 | logerror("%s:fpga_r offset %04X = %08X & %08X\n", machine().describe_context(), offset*4, result, mem_mask); |
| 197 | 198 | break; |
| 198 | 199 | case 0x0c/4: // 1d = modem byte |
| 199 | | result = (result & 0xFFFF0000) | ((m_serial_com1[m_serial_idx]&0xff)<<8) | (m_serial_com0[m_serial_idx]&0xff); |
| 200 | result = (result & 0xFFFF0000) | ((m_serial_com2[m_serial_idx]&0xff)<<8) | (m_serial_com1[m_serial_idx]&0xff); |
| 200 | 201 | if (ACCESSING_BITS_0_15) { |
| 201 | 202 | m_serial_data = false; |
| 202 | 203 | m_serial_idx = 0; |
| 203 | 204 | } |
| 204 | | if (0 && LOG_FPGA) |
| 205 | if (LOG_FPGA) |
| 205 | 206 | logerror("%s:fpga_r offset %04X = %08X & %08X\n", machine().describe_context(), offset*4, result, mem_mask); |
| 206 | 207 | break; |
| 207 | 208 | case 0x1c/4: // 1d = modem byte |
| 208 | | result = (result & 0xFFFF0000) | ((m_serial_com3[m_serial_idx]&0xff)<<8) | (m_serial_com2[m_serial_idx]&0xff); |
| 209 | result = (result & 0xFFFF0000) | ((m_serial_com4[m_serial_idx]&0xff)<<8) | (m_serial_com3[m_serial_idx]&0xff); |
| 209 | 210 | if (ACCESSING_BITS_0_15) { |
| 210 | 211 | m_serial_data = false; |
| 211 | 212 | m_serial_idx = 0; |
| r253062 | r253063 | |
| 232 | 233 | if ((m_version & 0xff00) == 0x0200) |
| 233 | 234 | update_sequence_eg1(data & 0xff); |
| 234 | 235 | else |
| 235 | | // ATMEL Chip access. Returns version id's when bit 7 is set. |
| 236 | | update_sequence(data & 0xff); |
| 236 | // ATMEL Chip access. Returns version id's when bit 7 is set. |
| 237 | update_sequence(data & 0xff); |
| 237 | 238 | if (0 && LOG_FPGA) |
| 238 | 239 | logerror("%s:fpga_w offset %04X = %08X & %08X\n", machine().describe_context(), offset*4, data, mem_mask); |
| 239 | 240 | } |
| r253062 | r253063 | |
| 241 | 242 | if (ACCESSING_BITS_24_31 && (data & 0x01000000)) { |
| 242 | 243 | m_cpu->set_input_line(m_irq_num, CLEAR_LINE); |
| 243 | 244 | // Not sure what value to use here, needed for lightgun |
| 244 | | m_timer->adjust(attotime::from_hz(59)); |
| 245 | m_timer->adjust(attotime::from_hz(25)); |
| 245 | 246 | if (LOG_FPGA) |
| 246 | 247 | logerror("%s:fpga_w offset %04X = %08X & %08X Clearing interrupt(%i)\n", machine().describe_context(), offset*4, data, mem_mask, m_irq_num); |
| 247 | 248 | } else { |
| r253062 | r253063 | |
| 268 | 269 | if (!m_serial_data) { |
| 269 | 270 | m_serial_idx = data&0xf; |
| 270 | 271 | } else { |
| 271 | | m_serial_com0[m_serial_idx] = data&0xff; |
| 272 | m_serial_com1[m_serial_idx] = data&0xff; |
| 272 | 273 | m_serial_idx = 0; |
| 273 | 274 | } |
| 274 | 275 | m_serial_data = !m_serial_data; |
| r253062 | r253063 | |
| 277 | 278 | if (!m_serial_data) { |
| 278 | 279 | m_serial_idx = (data&0x0f00)>>8; |
| 279 | 280 | } else { |
| 280 | | m_serial_com1[m_serial_idx] = (data&0xff00)>>8; |
| 281 | m_serial_com2[m_serial_idx] = (data&0xff00)>>8; |
| 281 | 282 | } |
| 282 | 283 | m_serial_data = !m_serial_data; |
| 283 | 284 | } |
| 284 | 285 | if (ACCESSING_BITS_16_23) { |
| 285 | 286 | if (m_serial_str.size()==0) |
| 286 | | m_serial_str = "com0: "; |
| 287 | m_serial_str = "com1: "; |
| 287 | 288 | m_serial_str += (data>>16)&0xff; |
| 288 | 289 | if (((data>>16)&0xff)==0xd) { |
| 289 | | if (LOG_SERIAL) logerror("%s\n", m_serial_str.c_str()); |
| 290 | 290 | osd_printf_debug("%s\n", m_serial_str.c_str()); |
| 291 | 291 | m_serial_str.clear(); |
| 292 | 292 | } |
| 293 | 293 | } |
| 294 | 294 | if (ACCESSING_BITS_24_31) { |
| 295 | 295 | if (m_serial_str.size()==0) |
| 296 | | m_serial_str = "com1: "; |
| 296 | m_serial_str = "com2: "; |
| 297 | 297 | m_serial_str += (data>>24)&0xff; |
| 298 | 298 | if (1 || ((data>>24)&0xff)==0xd) { |
| 299 | | if (LOG_SERIAL) logerror("%s\n", m_serial_str.c_str()); |
| 300 | 299 | osd_printf_debug("%s\n", m_serial_str.c_str()); |
| 301 | 300 | m_serial_str.clear(); |
| 302 | 301 | } |
| 303 | 302 | } |
| 304 | | if (0 && LOG_FPGA) |
| 303 | if (LOG_FPGA) |
| 305 | 304 | logerror("%s:fpga_w offset %04X = %08X & %08X\n", machine().describe_context(), offset*4, data, mem_mask); |
| 306 | 305 | break; |
| 307 | 306 | case 0x1c/4: |
| r253062 | r253063 | |
| 309 | 308 | if (!m_serial_data) { |
| 310 | 309 | m_serial_idx = data&0xf; |
| 311 | 310 | } else { |
| 312 | | m_serial_com2[m_serial_idx] = data&0xff; |
| 311 | m_serial_com3[m_serial_idx] = data&0xff; |
| 313 | 312 | m_serial_idx = 0; |
| 314 | 313 | } |
| 315 | 314 | m_serial_data = !m_serial_data; |
| r253062 | r253063 | |
| 318 | 317 | if (!m_serial_data) { |
| 319 | 318 | m_serial_idx = (data&0x0f00)>>8; |
| 320 | 319 | } else { |
| 321 | | m_serial_com3[m_serial_idx] = (data&0xff00)>>8; |
| 320 | m_serial_com4[m_serial_idx] = (data&0xff00)>>8; |
| 322 | 321 | } |
| 323 | 322 | m_serial_data = !m_serial_data; |
| 324 | 323 | } |
| 325 | 324 | if (ACCESSING_BITS_16_23) { |
| 326 | 325 | if (m_serial_str.size()==0) |
| 327 | | m_serial_str = "com2: "; |
| 326 | m_serial_str = "com3: "; |
| 328 | 327 | m_serial_str += (data>>16)&0xff; |
| 329 | 328 | if (1 || ((data>>16)&0xff)==0xd) { |
| 330 | | if (LOG_SERIAL) logerror("%s\n", m_serial_str.c_str()); |
| 331 | 329 | osd_printf_debug("%s\n", m_serial_str.c_str()); |
| 332 | 330 | m_serial_str.clear(); |
| 333 | 331 | } |
| 334 | 332 | } |
| 335 | 333 | if (ACCESSING_BITS_24_31) { |
| 336 | 334 | if (m_serial_str.size()==0) |
| 337 | | m_serial_str = "com3: "; |
| 335 | m_serial_str = "com4: "; |
| 338 | 336 | m_serial_str += (data>>24)&0xff; |
| 339 | 337 | if (((data>>24)&0xff)==0xd) { |
| 340 | | if (LOG_SERIAL) logerror("%s\n", m_serial_str.c_str()); |
| 341 | 338 | osd_printf_debug("%s\n", m_serial_str.c_str()); |
| 342 | 339 | m_serial_str.clear(); |
| 343 | 340 | } |
| r253062 | r253063 | |
| 652 | 649 | { |
| 653 | 650 | pci_device::device_reset(); |
| 654 | 651 | memset(m_ctrl_regs, 0, sizeof(m_ctrl_regs)); |
| 655 | | m_ctrl_regs[0x10/4] = 0x00070000; // 0x6=No SIMM, 0x2, 0x1, 0x0 = SIMM . Top 16 bits are compared to 0x3. Bit 0 might be lan chip present. |
| 652 | m_ctrl_regs[0x10/4] = 0x00000000; // 0x6=No SIMM, 0x2, 0x1, 0x0 = SIMM . Top 16 bits are compared to 0x3. |
| 656 | 653 | memset(m_rtc_regs, 0, sizeof(m_rtc_regs)); |
| 657 | 654 | m_rtc_regs[0xa] = 0x20; // 32.768 MHz |
| 658 | 655 | m_rtc_regs[0xb] = 0x02; // 24-hour format |