MAME SVN History

199869 Revisions

r44512 Wednesday 27th January, 2016 at 07:12:00 UTC by Miodrag Milanović
Cleanups and version bump

[hash]	casloopy.xml database.xml dim68k.xml pc1000.xml tutor.xml
[src]	version.cpp
[src/devices/bus/cbm2]	hrg.cpp hrg.h
[src/devices/bus/pet]	hsg.cpp hsg.h
[src/devices/cpu/hphybrid]	hphybrid.cpp hphybrid.h
[src/devices/cpu/i86]	i86.cpp
[src/devices/cpu/m68000]	m68kops.cpp
[src/devices/cpu/tlcs900]	tlcs900.cpp tlcs900.h
[src/devices/cpu/tms32051]	32051ops.inc
[src/devices/machine]	tms6100.cpp tms6100.h
[src/devices/sound]	beep.cpp fm.cpp rf5c400.cpp s14001a.cpp s14001a.h scsp.cpp sn76477.cpp upd7759.h
[src/devices/video]	pcd8544.cpp pcd8544.h voodoo.cpp voodoo_rast.inc
[src/emu]	bookkeeping.cpp bookkeeping.h config.h diimage.cpp image.cpp image.h luaengine.cpp machine.h output.cpp uiinput.cpp uiinput.h
[src/emu/ui]	ui.cpp
[src/lib/util]	corealloc.h
[src/mame]	arcade.lst mess.lst
[src/mame/audio]	carnival.cpp dcs.h
[src/mame/drivers]	20pacgal.cpp 40love.cpp 8080bw.cpp arkanoid.cpp atom.cpp barata.cpp bfm_sc1.cpp bfm_sc2.cpp bfmsys85.cpp casloopy.cpp cobra.cpp dccons.cpp didact.cpp dynax.cpp fastinvaders.cpp fidel6502.cpp fidelz80.cpp funworld.cpp gaelco2.cpp gkigt.cpp hp9845.cpp jpmimpct.cpp jpmmps.cpp jpmsys5.cpp kaneko16.cpp liberatr.cpp marywu.cpp megasys1.cpp metro.cpp mpu3.cpp mpu4hw.cpp naomi.cpp neogeo.cpp neogeo_noslot.cpp nokia_3310.cpp nova2001.cpp pacman.cpp proconn.cpp prophet600.cpp psychic5.cpp rsc55.cpp seattle.cpp sfkick.cpp snk.cpp spc1500.cpp taitopjc.cpp taitotz.cpp ticalc1x.cpp tourvis.cpp ts803.cpp wildpkr.cpp williams.cpp witch.cpp
[src/mame/includes]	40love.h arkanoid.h cps3.h dkong.h fm7.h gaelco2.h harddriv.h jaguar.h
[src/mame/layout]	fidel_vcc.lay marywu.lay
[src/mame/machine]	arkanoid.cpp gaelco2.cpp meters.cpp meters.h xbox.cpp
[src/mame/video]	40love.cpp battlex.cpp chihiro.cpp m107.cpp m58.cpp n64.cpp n64.h
[src/osd/modules/debugger]	debugint.cpp
[src/osd/modules/render/d3d]	d3dhlsl.cpp
[src/osd/modules/sound]	xaudio2_sound.cpp
[src/osd/sdl]	sdlfile.cpp
[src/osd/windows]	output.cpp winmain.h

trunk/hash/casloopy.xml
r253023	r253024
89	89	<software name="loopytwn">
90	90	<description>Loopy Town no Oheya ga Hoshii!</description>
91	91	<year>1996</year>
92		<publisher>Casio</publisher>
93		<info name="serial" value="XK-504"/>
94		<info name="alt_name" value="ルーピータウンのおへやがほしい!"/>
	92	<publisher>Casio</publisher>
	93	<info name="serial" value="XK-504"/>
	94	<info name="alt_name" value="ルーピータウンのおへやがほしい!"/>
95	95	<part name="cart" interface="loopy_cart">
96	96	<dataarea name="rom" size="0x300000">
97	97	<rom name="CHIP1.IC104" size="0x200000" crc="bae71d45" sha1="79628715ccedd9bc3fd72d21fa9ea6513b88cf51" offset="0x000000" />
98		<rom name="CHIP2.IC105" size="0x100000" crc="e0514d03" sha1="4dd02faa1ebf6754da0ade417e488512f3502620" offset="0x200000" />
	98	<rom name="CHIP2.IC105" size="0x100000" crc="e0514d03" sha1="4dd02faa1ebf6754da0ade417e488512f3502620" offset="0x200000" />
99	99	</dataarea>
100	100	</part>
101	101	</software>

trunk/hash/database.xml
r253023	r253024
261	261	<rom name="leapfrog.bin" size="4096" crc="105eb530" sha1="7211b0b1c6e8798399f4f6d2a942db4e8379c691" offset="0" />
262	262	</dataarea>
263	263	</part>
264		</software>
265
	264	</software>
	265
266	266	</softwarelist>

trunk/hash/dim68k.xml
r253023	r253024
171	171	<description>Dimension 68000 Burnin Test</description>
172	172	<year>1984</year>
173	173	<publisher>Micro Craft Corporation</publisher>
174
	174
175	175	<part name="flop1" interface="floppy_5_25">
176	176	<feature name="part_id" value="Disk 1"/>
177	177	<dataarea name="flop" size="181726">
r253023	r253024
184	184	<description>Fortran 68K</description>
185	185	<year>1983</year>
186	186	<publisher>Silicon Valley Software</publisher>
187
	187
188	188	<part name="flop1" interface="floppy_5_25">
189	189	<feature name="part_id" value="Disk 1"/>
190	190	<dataarea name="flop" size="391735">
191	191	<rom name="d68fort1.imd" size="391735" crc="db27dc48" sha1="b912b91ed49e828c91863d3f71d3a7d673ac08b1" offset="0"/>
192	192	</dataarea>
193	193	</part>
194
	194
195	195	<part name="flop2" interface="floppy_5_25">
196	196	<feature name="part_id" value="Disk 2"/>
197	197	<dataarea name="flop" size="386625">
r253023	r253024
199	199	</dataarea>
200	200	</part>
201	201	</software>
202
	202
203	203	</softwarelist>

trunk/hash/pc1000.xml
r253023	r253024
116	116	</part>
117	117	</software>
118	118
119		<software name="cgen2"> <!-- cart for Ordisavant -->
	119	<software name="cgen2"> <!-- cart for Ordisavant -->
120	120	<description>Connaissances Generales II</description>
121	121	<year>1988</year>
122	122	<publisher>VTech</publisher>
r253023	r253024
127	127	</part>
128	128	</software>
129	129
130		<software name="encyclop"> <!-- cart for Ordisavant -->
	130	<software name="encyclop"> <!-- cart for Ordisavant -->
131	131	<description>Encyclopedie</description>
132	132	<year>1988</year>
133	133	<publisher>VTech</publisher>

trunk/hash/tutor.xml
r253023	r253024
205	205	<rom name="tron.bin" size="8192" crc="280f191d" sha1="0d8b5c43db89a438f6036794be7628793643818b" offset="0" />
206	206	</dataarea>
207	207	</part>
208		</software>
209
	208	</software>
	209
210	210	<software name="jungler"> <!-- US and Japan confirmed to be the same -->
211	211	<!-- Stock No: 8202, (Japanese 015E)-->
212	212	<description>Jungler</description>

trunk/src/devices/bus/cbm2/hrg.cpp
r253023	r253024
90	90	MCFG_SCREEN_SIZE(512, 512)
91	91	MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 0, 512-1)
92	92	MCFG_SCREEN_REFRESH_RATE(25)
93		MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette")
	93	MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette")
94	94
95	95	MCFG_DEVICE_ADD(EF9365_TAG, EF9365, 1750000)
96	96	MCFG_VIDEO_SET_SCREEN(SCREEN_TAG)
r253023	r253024
111	111	MCFG_SCREEN_SIZE(512, 256)
112	112	MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 0, 256-1)
113	113	MCFG_SCREEN_REFRESH_RATE(50)
114		MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette")
	114	MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette")
115	115
116	116	MCFG_DEVICE_ADD(EF9366_TAG, EF9365, 1750000)
117	117	MCFG_VIDEO_SET_SCREEN(SCREEN_TAG)

trunk/src/devices/bus/cbm2/hrg.h
r253023	r253024
24	24	// ======================> cbm2_hrg_t
25	25
26	26	class cbm2_hrg_t : public device_t,
27		public device_cbm2_expansion_card_interface
	27	public device_cbm2_expansion_card_interface
28	28	{
29	29	public:
30	30	// construction/destruction

trunk/src/devices/bus/pet/hsg.cpp
r253023	r253024
92	92	MCFG_SCREEN_SIZE(512, 512)
93	93	MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 0, 512-1)
94	94	MCFG_SCREEN_REFRESH_RATE(25)
95		MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette")
	95	MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette")
96	96
97	97	MCFG_DEVICE_ADD(EF9365_TAG, EF9365, 1750000)
98	98	MCFG_VIDEO_SET_SCREEN(SCREEN_TAG)
r253023	r253024
113	113	MCFG_SCREEN_SIZE(512, 256)
114	114	MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 0, 256-1)
115	115	MCFG_SCREEN_REFRESH_RATE(50)
116		MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette")
	116	MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette")
117	117
118	118	MCFG_DEVICE_ADD(EF9366_TAG, EF9365, 1750000)
119	119	MCFG_VIDEO_SET_SCREEN(SCREEN_TAG)

trunk/src/devices/bus/pet/hsg.h
r253023	r253024
24	24	// ======================> cbm8000_hsg_t
25	25
26	26	class cbm8000_hsg_t : public device_t,
27		public device_pet_expansion_card_interface
	27	public device_pet_expansion_card_interface
28	28	{
29	29	public:
30	30	// construction/destruction

trunk/src/devices/cpu/hphybrid/hphybrid.cpp
r253023	r253024
1485	1485	bsc_reg = HP_REG_R37_ADDR;
1486	1486	break;
1487	1487
1488		case AEC_CASE_I:
1489		// Behaviour of AEC during interrupt vector fetch is undocumented but it can be guessed from 9845B firmware.
1490		// Basically in this case the integrated AEC seems to do what the discrete implementation in 9845A does:
1491		// top half of memory is mapped to block 0 (fixed) and bottom half is mapped according to content of R35
1492		// (see pg 334 of patent).
1493		bsc_reg = top_half ? 0 : HP_REG_R35_ADDR;
1494		break;
	1488	case AEC_CASE_I:
	1489	// Behaviour of AEC during interrupt vector fetch is undocumented but it can be guessed from 9845B firmware.
	1490	// Basically in this case the integrated AEC seems to do what the discrete implementation in 9845A does:
	1491	// top half of memory is mapped to block 0 (fixed) and bottom half is mapped according to content of R35
	1492	// (see pg 334 of patent).
	1493	bsc_reg = top_half ? 0 : HP_REG_R35_ADDR;
	1494	break;
1495	1495
1496		default:
1497		logerror("hphybrid: aec_case=%d\n" , aec_case);
1498		return 0;
1499		}
	1496	default:
	1497	logerror("hphybrid: aec_case=%d\n" , aec_case);
	1498	return 0;
	1499	}
1500	1500
1501		UINT16 aec_reg = (bsc_reg != 0) ? (m_reg_aec[ bsc_reg - HP_REG_R32_ADDR ] & BSC_REG_MASK) : 0;
	1501	UINT16 aec_reg = (bsc_reg != 0) ? (m_reg_aec[ bsc_reg - HP_REG_R32_ADDR ] & BSC_REG_MASK) : 0;
1502	1502
1503	1503	if (m_forced_bsc_25) {
1504	1504	aec_reg = (aec_reg & 0xf) \| 0x20;

trunk/src/devices/cpu/hphybrid/hphybrid.h
r253023	r253024
90	90	template<class _Object> static devcb_base &set_pa_changed_func(device_t &device, _Object object) { return downcast<hp_hybrid_cpu_device &>(device).m_pa_changed_func.set_callback(object); }
91	91
92	92	protected:
93		hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char name, const char tag, device_t owner, UINT32 clock, const char shortname , UINT8 addrwidth);
	93	hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char name, const char tag, device_t owner, UINT32 clock, const char shortname , UINT8 addrwidth);
94	94
95		// device-level overrides
96		virtual void device_start() override;
97		virtual void device_reset() override;
	95	// device-level overrides
	96	virtual void device_start() override;
	97	virtual void device_reset() override;
98	98
99		// device_execute_interface overrides
100		virtual UINT32 execute_min_cycles() const override { return 6; }
101		virtual UINT32 execute_input_lines() const override { return 2; }
102		virtual UINT32 execute_default_irq_vector() const override { return 0xffff; }
103		virtual void execute_run() override;
104		virtual void execute_set_input(int inputnum, int state) override;
	99	// device_execute_interface overrides
	100	virtual UINT32 execute_min_cycles() const override { return 6; }
	101	virtual UINT32 execute_input_lines() const override { return 2; }
	102	virtual UINT32 execute_default_irq_vector() const override { return 0xffff; }
	103	virtual void execute_run() override;
	104	virtual void execute_set_input(int inputnum, int state) override;
105	105
106		UINT16 execute_one(UINT16 opcode);
107		UINT16 execute_one_sub(UINT16 opcode);
108		// Execute an instruction that doesn't belong to either BPC or IOC
109		virtual UINT16 execute_no_bpc_ioc(UINT16 opcode) = 0;
	106	UINT16 execute_one(UINT16 opcode);
	107	UINT16 execute_one_sub(UINT16 opcode);
	108	// Execute an instruction that doesn't belong to either BPC or IOC
	109	virtual UINT16 execute_no_bpc_ioc(UINT16 opcode) = 0;
110	110
111		// device_memory_interface overrides
112		virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : NULL ); }
	111	// device_memory_interface overrides
	112	virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : NULL ); }
113	113
114		// device_state_interface overrides
115		void state_string_export(const device_state_entry &entry, std::string &str) const override;
	114	// device_state_interface overrides
	115	void state_string_export(const device_state_entry &entry, std::string &str) const override;
116	116
117		// device_disasm_interface overrides
118		virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
119		virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
120		virtual offs_t disasm_disassemble(char buffer, offs_t pc, const UINT8 oprom, const UINT8 *opram, UINT32 options) override;
	117	// device_disasm_interface overrides
	118	virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
	119	virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
	120	virtual offs_t disasm_disassemble(char buffer, offs_t pc, const UINT8 oprom, const UINT8 *opram, UINT32 options) override;
121	121
122		// Different cases of memory access
123		// See patent @ pg 361
124		typedef enum {
125		AEC_CASE_A, // Instr. fetches, non-base page fetches of link pointers, BPC direct non-base page accesses
126		AEC_CASE_B, // Base page fetches of link pointers, BPC direct base page accesses
127		AEC_CASE_C, // IOC, EMC & BPC indirect final destination accesses
128		AEC_CASE_D, // DMA accesses
129		AEC_CASE_I // Interrupt vector fetches
130		} aec_cases_t;
	122	// Different cases of memory access
	123	// See patent @ pg 361
	124	typedef enum {
	125	AEC_CASE_A, // Instr. fetches, non-base page fetches of link pointers, BPC direct non-base page accesses
	126	AEC_CASE_B, // Base page fetches of link pointers, BPC direct base page accesses
	127	AEC_CASE_C, // IOC, EMC & BPC indirect final destination accesses
	128	AEC_CASE_D, // DMA accesses
	129	AEC_CASE_I // Interrupt vector fetches
	130	} aec_cases_t;
131	131
132		// do memory address extension
133		virtual UINT32 add_mae(aec_cases_t aec_case , UINT16 addr) = 0;
	132	// do memory address extension
	133	virtual UINT32 add_mae(aec_cases_t aec_case , UINT16 addr) = 0;
134	134
135		UINT16 remove_mae(UINT32 addr);
	135	UINT16 remove_mae(UINT32 addr);
136	136
137		UINT16 RM(aec_cases_t aec_case , UINT16 addr);
138		UINT16 RM(UINT32 addr);
139		virtual UINT16 read_non_common_reg(UINT16 addr) = 0;
	137	UINT16 RM(aec_cases_t aec_case , UINT16 addr);
	138	UINT16 RM(UINT32 addr);
	139	virtual UINT16 read_non_common_reg(UINT16 addr) = 0;
140	140
141		void WM(aec_cases_t aec_case , UINT16 addr , UINT16 v);
142		void WM(UINT32 addr , UINT16 v);
143		virtual void write_non_common_reg(UINT16 addr , UINT16 v) = 0;
	141	void WM(aec_cases_t aec_case , UINT16 addr , UINT16 v);
	142	void WM(UINT32 addr , UINT16 v);
	143	virtual void write_non_common_reg(UINT16 addr , UINT16 v) = 0;
144	144
145		UINT16 fetch(void);
	145	UINT16 fetch(void);
146	146
147		UINT16 get_skip_addr(UINT16 opcode , bool condition) const;
	147	UINT16 get_skip_addr(UINT16 opcode , bool condition) const;
148	148
149		devcb_write8 m_pa_changed_func;
	149	devcb_write8 m_pa_changed_func;
150	150
151		int m_icount;
152		bool m_forced_bsc_25;
	151	int m_icount;
	152	bool m_forced_bsc_25;
153	153
154		// State of processor
155		UINT16 m_reg_A; // Register A
156		UINT16 m_reg_B; // Register B
157		UINT16 m_reg_P; // Register P
158		UINT16 m_reg_R; // Register R
159		UINT16 m_reg_C; // Register C
160		UINT16 m_reg_D; // Register D
161		UINT16 m_reg_IV; // Register IV
162		UINT16 m_reg_W; // Register W
163		UINT8 m_reg_PA[ HPHYBRID_INT_LVLS + 1 ]; // Stack of register PA (4 bit-long)
164		UINT16 m_flags; // Flags
165		UINT8 m_dmapa; // DMA peripheral address (4 bits)
166		UINT16 m_dmama; // DMA address
167		UINT16 m_dmac; // DMA counter
168		UINT16 m_reg_I; // Instruction register
169		UINT32 m_genpc; // Full PC
	154	// State of processor
	155	UINT16 m_reg_A; // Register A
	156	UINT16 m_reg_B; // Register B
	157	UINT16 m_reg_P; // Register P
	158	UINT16 m_reg_R; // Register R
	159	UINT16 m_reg_C; // Register C
	160	UINT16 m_reg_D; // Register D
	161	UINT16 m_reg_IV; // Register IV
	162	UINT16 m_reg_W; // Register W
	163	UINT8 m_reg_PA[ HPHYBRID_INT_LVLS + 1 ]; // Stack of register PA (4 bit-long)
	164	UINT16 m_flags; // Flags
	165	UINT8 m_dmapa; // DMA peripheral address (4 bits)
	166	UINT16 m_dmama; // DMA address
	167	UINT16 m_dmac; // DMA counter
	168	UINT16 m_reg_I; // Instruction register
	169	UINT32 m_genpc; // Full PC
170	170
171	171	private:
172	172	address_space_config m_program_config;

trunk/src/devices/cpu/i86/i86.cpp
r253023	r253024
159	159	}
160	160	}
161	161
162		/* Trap should allow one instruction to be executed.
	162	/* Trap should allow one instruction to be executed.
163	163	CPUID.ASM (by Bob Smith, 1985) suggests that in situations where m_no_interrupt is 1,
164	164	(directly after POP SS / MOV_SREG), single step IRQs don't fire.
165	165	*/
r253023	r253024
167	167	{
168	168	if ( (m_fire_trap >= 2) && (m_no_interrupt == 0) )
169	169	{
170		m_fire_trap = 0; // reset trap flag upon entry
	170	m_fire_trap = 0; // reset trap flag upon entry
171	171	interrupt(1);
172	172	}
173	173	else
r253023	r253024
1408	1408	m_src = GetRMWord();
1409	1409	m_sregs[(m_modrm & 0x18) >> 3] = m_src; // confirmed on hw: modrm bit 5 ignored
1410	1410	CLKM(MOV_SR,MOV_SM);
1411		m_no_interrupt = 1; // Disable IRQ after load segment register.
	1411	m_no_interrupt = 1; // Disable IRQ after load segment register.
1412	1412	break;
1413	1413
1414	1414	case 0x8f: // i_popw

trunk/src/devices/cpu/m68000/m68kops.cpp
r253023	r253024
34872	34872	/* ======================================================================== */
34873	34873	/* ============================== END OF FILE ============================= */
34874	34874	/* ======================================================================== */
34875
34876

trunk/src/devices/cpu/tlcs900/tlcs900.cpp
r253023	r253024
1748	1748	int ad_value;
1749	1749
1750	1750	/* Store A/D converted value */
1751		if ((m_reg[TMP95C063_ADMOD1] & 0x10) == 0) // conversion channel fixed
	1751	if ((m_reg[TMP95C063_ADMOD1] & 0x10) == 0) // conversion channel fixed
1752	1752	{
1753	1753	switch( m_reg[TMP95C063_ADMOD2] & 0x07 )
1754	1754	{
1755		case 0x00: // AN0
	1755	case 0x00: // AN0
1756	1756	ad_value = m_an0_read(0) & 0x3ff;
1757	1757	m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6;
1758	1758	m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff;
1759	1759	break;
1760		case 0x01: // AN1
	1760	case 0x01: // AN1
1761	1761	ad_value = m_an1_read(0) & 0x3ff;
1762	1762	m_reg[TMP95C063_ADREG15L] = (ad_value & 0x3) << 6;
1763	1763	m_reg[TMP95C063_ADREG15H] = (ad_value >> 2) & 0xff;
1764	1764	break;
1765		case 0x02: // AN2
	1765	case 0x02: // AN2
1766	1766	ad_value = m_an2_read(0) & 0x3ff;
1767	1767	m_reg[TMP95C063_ADREG26L] = (ad_value & 0x3) << 6;
1768	1768	m_reg[TMP95C063_ADREG26H] = (ad_value >> 2) & 0xff;
1769	1769	break;
1770		case 0x03: // AN3
	1770	case 0x03: // AN3
1771	1771	ad_value = m_an3_read(0) & 0x3ff;
1772	1772	m_reg[TMP95C063_ADREG37L] = (ad_value & 0x3) << 6;
1773	1773	m_reg[TMP95C063_ADREG37H] = (ad_value >> 2) & 0xff;
1774	1774	break;
1775		case 0x04: // AN4
	1775	case 0x04: // AN4
1776	1776	ad_value = m_an4_read(0) & 0x3ff;
1777	1777	m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6;
1778	1778	m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff;
1779	1779	break;
1780		case 0x05: // AN5
	1780	case 0x05: // AN5
1781	1781	ad_value = m_an5_read(0) & 0x3ff;
1782	1782	m_reg[TMP95C063_ADREG15L] = (ad_value & 0x3) << 6;
1783	1783	m_reg[TMP95C063_ADREG15H] = (ad_value >> 2) & 0xff;
1784	1784	break;
1785		case 0x06: // AN6
	1785	case 0x06: // AN6
1786	1786	ad_value = m_an6_read(0) & 0x3ff;
1787	1787	m_reg[TMP95C063_ADREG26L] = (ad_value & 0x3) << 6;
1788	1788	m_reg[TMP95C063_ADREG26H] = (ad_value >> 2) & 0xff;
1789	1789	break;
1790		case 0x07: // AN7
	1790	case 0x07: // AN7
1791	1791	ad_value = m_an7_read(0) & 0x3ff;
1792	1792	m_reg[TMP95C063_ADREG37L] = (ad_value & 0x3) << 6;
1793	1793	m_reg[TMP95C063_ADREG37H] = (ad_value >> 2) & 0xff;
1794	1794	break;
1795	1795	}
1796	1796	}
1797		else // conversion channel sweep
	1797	else // conversion channel sweep
1798	1798	{
1799	1799	switch( m_reg[TMP95C063_ADMOD2] & 0x07 )
1800	1800	{
1801		case 0x00: // AN0
	1801	case 0x00: // AN0
1802	1802	ad_value = m_an0_read(0) & 0x3ff;
1803	1803	m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6;
1804	1804	m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff;
1805	1805	break;
1806		case 0x01: // AN0 -> AN1
	1806	case 0x01: // AN0 -> AN1
1807	1807	ad_value = m_an0_read(0) & 0x3ff;
1808	1808	m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6;
1809	1809	m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff;
r253023	r253024
1811	1811	m_reg[TMP95C063_ADREG15L] = (ad_value & 0x3) << 6;
1812	1812	m_reg[TMP95C063_ADREG15H] = (ad_value >> 2) & 0xff;
1813	1813	break;
1814		case 0x02: // AN0 -> AN1 -> AN2
	1814	case 0x02: // AN0 -> AN1 -> AN2
1815	1815	ad_value = m_an0_read(0) & 0x3ff;
1816	1816	m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6;
1817	1817	m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff;
r253023	r253024
1822	1822	m_reg[TMP95C063_ADREG26L] = (ad_value & 0x3) << 6;
1823	1823	m_reg[TMP95C063_ADREG26H] = (ad_value >> 2) & 0xff;
1824	1824	break;
1825		case 0x03: // AN0 -> AN1 -> AN2 -> AN3
	1825	case 0x03: // AN0 -> AN1 -> AN2 -> AN3
1826	1826	ad_value = m_an0_read(0) & 0x3ff;
1827	1827	m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6;
1828	1828	m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff;
r253023	r253024
1836	1836	m_reg[TMP95C063_ADREG37L] = (ad_value & 0x3) << 6;
1837	1837	m_reg[TMP95C063_ADREG37H] = (ad_value >> 2) & 0xff;
1838	1838	break;
1839		case 0x04: // AN4
	1839	case 0x04: // AN4
1840	1840	ad_value = m_an4_read(0) & 0x3ff;
1841	1841	m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6;
1842	1842	m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff;
1843	1843	break;
1844		case 0x05: // AN4 -> AN5
	1844	case 0x05: // AN4 -> AN5
1845	1845	ad_value = m_an4_read(0) & 0x3ff;
1846	1846	m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6;
1847	1847	m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff;
r253023	r253024
1849	1849	m_reg[TMP95C063_ADREG15L] = (ad_value & 0x3) << 6;
1850	1850	m_reg[TMP95C063_ADREG15H] = (ad_value >> 2) & 0xff;
1851	1851	break;
1852		case 0x06: // AN4 -> AN5 -> AN6
	1852	case 0x06: // AN4 -> AN5 -> AN6
1853	1853	ad_value = m_an4_read(0) & 0x3ff;
1854	1854	m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6;
1855	1855	m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff;
r253023	r253024
1860	1860	m_reg[TMP95C063_ADREG26L] = (ad_value & 0x3) << 6;
1861	1861	m_reg[TMP95C063_ADREG26H] = (ad_value >> 2) & 0xff;
1862	1862	break;
1863		case 0x07: // AN4 -> AN5 -> AN6 -> AN7
	1863	case 0x07: // AN4 -> AN5 -> AN6 -> AN7
1864	1864	ad_value = m_an4_read(0) & 0x3ff;
1865	1865	m_reg[TMP95C063_ADREG04L] = (ad_value & 0x3) << 6;
1866	1866	m_reg[TMP95C063_ADREG04H] = (ad_value >> 2) & 0xff;

trunk/src/devices/cpu/tlcs900/tlcs900.h
r253023	r253024
852	852	devcb_write8 m_porte_write;
853	853
854	854	// analogue inputs, sampled at 10 bits
855		devcb_read16 m_an0_read;
856		devcb_read16 m_an1_read;
857		devcb_read16 m_an2_read;
858		devcb_read16 m_an3_read;
859		devcb_read16 m_an4_read;
860		devcb_read16 m_an5_read;
861		devcb_read16 m_an6_read;
862		devcb_read16 m_an7_read;
	855	devcb_read16 m_an0_read;
	856	devcb_read16 m_an1_read;
	857	devcb_read16 m_an2_read;
	858	devcb_read16 m_an3_read;
	859	devcb_read16 m_an4_read;
	860	devcb_read16 m_an5_read;
	861	devcb_read16 m_an6_read;
	862	devcb_read16 m_an7_read;
863	863	};
864	864
865	865	#endif

trunk/src/devices/cpu/tms32051/32051ops.inc
r253023	r253024
198	198
199	199	bool tms32051_device::GET_ZLVC_CONDITION(int zlvc, int zlvc_mask)
200	200	{
201		if (zlvc_mask & 0x2) // OV-bit
	201	if (zlvc_mask & 0x2) // OV-bit
202	202	{
203		if ((zlvc & 0x2) && m_st0.ov == 0) // OV
	203	if ((zlvc & 0x2) && m_st0.ov == 0) // OV
204	204	return false;
205		if (((zlvc & 0x2) == 0) && m_st0.ov != 0) // NOV
	205	if (((zlvc & 0x2) == 0) && m_st0.ov != 0) // NOV
206	206	return false;
207	207	}
208		if (zlvc_mask & 0x1) // C-bit
	208	if (zlvc_mask & 0x1) // C-bit
209	209	{
210		if ((zlvc & 0x1) && m_st1.c == 0) // C
	210	if ((zlvc & 0x1) && m_st1.c == 0) // C
211	211	return false;
212		if (((zlvc & 0x1) == 0) && m_st1.c != 0) // NC
	212	if (((zlvc & 0x1) == 0) && m_st1.c != 0) // NC
213	213	return false;
214	214	}
215	215
216	216	switch ((zlvc_mask & 0xc) \| ((zlvc >> 2) & 0x3))
217	217	{
218		case 0x00: break; // MZ=0, ML=0, Z=0, L=0
219		case 0x01: break; // MZ=0, ML=0, Z=0, L=1
220		case 0x02: break; // MZ=0, ML=0, Z=1, L=0
221		case 0x03: break; // MZ=0, ML=0, Z=1, L=1
222		case 0x04: if ((INT32)(m_acc) <= 0) return false; break; // MZ=0, ML=1, Z=0, L=0 (GT)
223		case 0x05: if ((INT32)(m_acc) >= 0) return false; break; // MZ=0, ML=1, Z=0, L=1 (LT)
224		case 0x06: if ((INT32)(m_acc) <= 0) return false; break; // MZ=0, ML=1, Z=1, L=0 (GT)
225		case 0x07: if ((INT32)(m_acc) >= 0) return false; break; // MZ=0, ML=1, Z=1, L=1 (LT)
226		case 0x08: if ((INT32)(m_acc) == 0) return false; break; // MZ=1, ML=0, Z=0, L=0 (NEQ)
227		case 0x09: if ((INT32)(m_acc) == 0) return false; break; // MZ=1, ML=0, Z=0, L=1 (NEQ)
228		case 0x0a: if ((INT32)(m_acc) != 0) return false; break; // MZ=1, ML=0, Z=1, L=0 (EQ)
229		case 0x0b: if ((INT32)(m_acc) != 0) return false; break; // MZ=1, ML=0, Z=1, L=1 (EQ)
230		case 0x0c: if ((INT32)(m_acc) <= 0) return false; break; // MZ=1, ML=1, Z=0, L=0 (GT)
231		case 0x0d: if ((INT32)(m_acc) >= 0) return false; break; // MZ=1, ML=1, Z=0, L=1 (LT)
232		case 0x0e: if ((INT32)(m_acc) < 0) return false; break; // MZ=1, ML=1, Z=1, L=0 (GEQ)
233		case 0x0f: if ((INT32)(m_acc) > 0) return false; break; // MZ=1, ML=1, Z=1, L=1 (LEQ)
	218	case 0x00: break; // MZ=0, ML=0, Z=0, L=0
	219	case 0x01: break; // MZ=0, ML=0, Z=0, L=1
	220	case 0x02: break; // MZ=0, ML=0, Z=1, L=0
	221	case 0x03: break; // MZ=0, ML=0, Z=1, L=1
	222	case 0x04: if ((INT32)(m_acc) <= 0) return false; break; // MZ=0, ML=1, Z=0, L=0 (GT)
	223	case 0x05: if ((INT32)(m_acc) >= 0) return false; break; // MZ=0, ML=1, Z=0, L=1 (LT)
	224	case 0x06: if ((INT32)(m_acc) <= 0) return false; break; // MZ=0, ML=1, Z=1, L=0 (GT)
	225	case 0x07: if ((INT32)(m_acc) >= 0) return false; break; // MZ=0, ML=1, Z=1, L=1 (LT)
	226	case 0x08: if ((INT32)(m_acc) == 0) return false; break; // MZ=1, ML=0, Z=0, L=0 (NEQ)
	227	case 0x09: if ((INT32)(m_acc) == 0) return false; break; // MZ=1, ML=0, Z=0, L=1 (NEQ)
	228	case 0x0a: if ((INT32)(m_acc) != 0) return false; break; // MZ=1, ML=0, Z=1, L=0 (EQ)
	229	case 0x0b: if ((INT32)(m_acc) != 0) return false; break; // MZ=1, ML=0, Z=1, L=1 (EQ)
	230	case 0x0c: if ((INT32)(m_acc) <= 0) return false; break; // MZ=1, ML=1, Z=0, L=0 (GT)
	231	case 0x0d: if ((INT32)(m_acc) >= 0) return false; break; // MZ=1, ML=1, Z=0, L=1 (LT)
	232	case 0x0e: if ((INT32)(m_acc) < 0) return false; break; // MZ=1, ML=1, Z=1, L=0 (GEQ)
	233	case 0x0f: if ((INT32)(m_acc) > 0) return false; break; // MZ=1, ML=1, Z=1, L=1 (LEQ)
234	234	}
235	235	return true;
236	236	}
r253023	r253024
239	239	{
240	240	switch (tp)
241	241	{
242		case 0: // BIO pin low
	242	case 0: // BIO pin low
243	243	// TODO
244	244	return false;
245
246		case 1: // TC == 1
	245
	246	case 1: // TC == 1
247	247	return m_st1.tc != 0;
248	248
249		case 2: // TC == 0
	249	case 2: // TC == 0
250	250	return m_st1.tc == 0;
251	251
252	252	case 3:
r253023	r253024
1376	1376	{
1377	1377	UINT16 port = ROPCODE();
1378	1378	UINT16 ea = GET_ADDRESS();
1379
	1379
1380	1380	UINT16 data = DM_READ16(ea);
1381	1381	m_io->write_word(port << 1, data);
1382	1382
r253023	r253024
1438	1438	{
1439	1439	UINT16 ea = GET_ADDRESS();
1440	1440	UINT16 data = DM_READ16(ea);
1441
	1441
1442	1442	data &= m_dbmr;
1443	1443
1444	1444	m_st1.tc = (data == 0) ? 1 : 0;
r253023	r253024
1452	1452	UINT16 ea = GET_ADDRESS();
1453	1453	UINT16 imm = ROPCODE();
1454	1454	UINT16 data = DM_READ16(ea);
1455
	1455
1456	1456	data &= imm;
1457	1457
1458	1458	m_st1.tc = (data == 0) ? 1 : 0;

trunk/src/devices/machine/tms6100.cpp
r253023	r253024
3	3	/**********************************************************************************************
4	4
5	5	Texas Instruments TMS6100 Voice Synthesis Memory (VSM)
6
	6
7	7	References:
8	8	- TMS 6100 Voice Synthesis Memory Data Manual
9	9	- TMS 6125 Voice Synthesis Memory Data Manual
r253023	r253024
147	147	UINT8 m = m_m1 << 1 \| m_m0;
148	148	if ((m & ~m_prev_m & 1) \|\| (m & ~m_prev_m & 2))
149	149	handle_command(m);
150
	150
151	151	m_prev_m = m;
152	152	}
153	153	}
154
	154
155	155	m_clk = (state) ? 1 : 0;
156	156	}
157	157
r253023	r253024
190	190	// or shift(rotate) right
191	191	m_sa = (m_sa >> 1) \| (m_sa << 7 & 0x80);
192	192	}
193
	193
194	194	// output to DATA pin(s)
195	195	if (!m_4bit_mode)
196	196	{
r253023	r253024
205	205	else
206	206	m_data = m_sa & 0xf;
207	207	}
208
	208
209	209	// 8 bits in 1-bit mode, otherwise 2 nybbles
210	210	m_count = (m_count + 1) & (m_4bit_mode ? 1 : 7);
211
	211
212	212	// TB8
213	213	if (m_count == 0)
214	214	m_address++; // CS bits too
215	215	}
216	216	break;
217
	217
218	218	// LA: load address
219	219	case M_LA:
220	220	if (m_prev_cmd == M_TB)
r253023	r253024
232	232	const UINT8 shift = 4 * (m_count+1);
233	233	m_address = (m_address & ~(0xf << shift)) \| (m_add << shift);
234	234	}
235
	235
236	236	m_count = (m_count + 1) & 7;
237	237	}
238	238	break;
r253023	r253024
251	251	m_address = (m_address & ~0x3fff) \| (rb & 0x3fff);
252	252	}
253	253	break;
254
	254
255	255	default:
256	256	break;
257	257	}
258
	258
259	259	m_prev_cmd = cmd;
260	260	}

trunk/src/devices/machine/tms6100.h
r253023	r253024
56	56	DATA/ADD8 \| 6 11 \| CS NC \| 6 11 \| /CS
57	57	NC \| 7 10 \| M1 NC \| 7 10 \| M1
58	58	M0 \| 8 9 \| VSS M0 \| 8 9 \| VSS
59		+---------+ +---------+
	59	+---------+ +---------+
60	60
61	61
62	62	Mitsubishi M58819S EPROM Interface:
r253023	r253024
112	112	protected:
113	113	// device-level overrides
114	114	virtual void device_start() override;
115
	115
116	116	void handle_command(UINT8 cmd);
117	117
118	118	// internal state
119	119	required_region_ptr<UINT8> m_rom;
120	120	bool m_reverse_bits;
121	121	bool m_4bit_mode;
122
	122
123	123	UINT32 m_rommask;
124	124	UINT32 m_address; // internal address + chipselect
125	125	UINT8 m_sa; // romdata shift register

trunk/src/devices/sound/beep.cpp
r253023	r253024
50	50	m_stream = stream_alloc(0, 1, BEEP_RATE);
51	51	m_enable = 0;
52	52	m_signal = 0x07fff;
53
	53
54	54	// register for savestates
55	55	save_item(NAME(m_enable));
56	56	save_item(NAME(m_frequency));

trunk/src/devices/sound/fm.cpp
r253023	r253024
2423	2423	UINT8 flagmask; /* YM2608 only */
2424	2424	UINT8 irqmask; /* YM2608 only */
2425	2425
2426		device_t *device;
	2426	device_t *device;
2427	2427	};
2428	2428
2429	2429	/* here is the virtual YM2608 */

trunk/src/devices/sound/rf5c400.cpp
r253023	r253024
355	355	return 0;
356	356	}
357	357
358		case 0x13: // memory read
	358	case 0x13: // memory read
359	359	{
360	360	return m_rom[m_ext_mem_address];
361	361	}

trunk/src/devices/sound/s14001a.cpp
r253023	r253024
132	132	// resolve callbacks
133	133	m_ext_read_handler.resolve();
134	134	m_bsy_handler.resolve();
135
	135
136	136	// note: zerofill is done already by MAME core
137	137	ClearStatistics();
138	138	m_uOutputP1 = m_uOutputP2 = 7;
139
	139
140	140	// register for savestates
141	141	save_item(NAME(m_bPhase1));
142	142	save_item(NAME(m_uStateP1));

trunk/src/devices/sound/s14001a.h
r253023	r253024
30	30	DECLARE_READ_LINE_MEMBER(romen_r); // ROM /EN (pin 9)
31	31	DECLARE_WRITE_LINE_MEMBER(start_w); // START (pin 10)
32	32	DECLARE_WRITE8_MEMBER(data_w); // 6-bit word
33
	33
34	34	void set_clock(UINT32 clock); // set new CLK frequency
35	35	void force_update(); // update stream, eg. before external ROM bankswitch
36	36
r253023	r253024
80	80
81	81	UINT16 m_uDAR13To05P1; // 9 MSBs of delta address register
82	82	UINT16 m_uDAR13To05P2; // incrementing uDAR05To13 advances ROM address by 8 bytes
83
	83
84	84	UINT16 m_uDAR04To00P1; // 5 LSBs of delta address register
85	85	UINT16 m_uDAR04To00P2; // 3 address ROM, 2 mux 8 bits of data into 2 bit delta
86		// carry indicates end of quarter pitch period (32 cycles)
	86	// carry indicates end of quarter pitch period (32 cycles)
87	87
88	88	UINT16 m_uCWARP1; // 12 bits Control Word Address Register (syllable)
89	89	UINT16 m_uCWARP2;
r253023	r253024
96	96	bool m_bSilenceP2;
97	97	UINT8 m_uLengthP1; // 7 bits, upper three loaded from ROM length
98	98	UINT8 m_uLengthP2; // middle two loaded from ROM repeat and/or uXRepeat
99		// bit 0 indicates mirror in voiced mode
100		// bit 1 indicates internal silence in voiced mode
101		// incremented each pitch period quarter
	99	// bit 0 indicates mirror in voiced mode
	100	// bit 1 indicates internal silence in voiced mode
	101	// incremented each pitch period quarter
102	102
103	103	UINT8 m_uXRepeatP1; // 2 bits, loaded from ROM repeat
104	104	UINT8 m_uXRepeatP2;

trunk/src/devices/sound/scsp.cpp
r253023	r253024
516	516	}
517	517
518	518	memory_region* ram_region = memregion(tag());
519
	519
520	520	// coolridr.c defines a region for the RAM, stv.c doesn't (uses set_ram_base instead, which seems to be more correct anyway?)
521	521	if (ram_region != NULL)
522	522	{

trunk/src/devices/sound/sn76477.cpp
r253023	r253024
957	957	{
958	958	m_channel->update();
959	959
960		m_enable = state;
	960	m_enable = state;
961	961
962		/* if falling edge */
963		if (!m_enable)
964		{
965		/* start the attack phase */
966		m_attack_decay_cap_voltage = AD_CAP_VOLTAGE_MIN;
	962	/* if falling edge */
	963	if (!m_enable)
	964	{
	965	/* start the attack phase */
	966	m_attack_decay_cap_voltage = AD_CAP_VOLTAGE_MIN;
967	967
968		/* one-shot runs regardless of envelope mode */
969		m_one_shot_running_ff = 1;
970		}
	968	/* one-shot runs regardless of envelope mode */
	969	m_one_shot_running_ff = 1;
	970	}
971	971
972	972	log_enable_line();
973	973	}
r253023	r253024
1392	1392	{
1393	1393	m_channel->update();
1394	1394
1395		if (data == 0)
1396		{
1397		m_noise_clock_ext = 1;
1398		}
1399		else
1400		{
1401		m_noise_clock_ext = 0;
	1395	if (data == 0)
	1396	{
	1397	m_noise_clock_ext = 1;
	1398	}
	1399	else
	1400	{
	1401	m_noise_clock_ext = 0;
1402	1402
1403		m_noise_clock_res = data;
1404		}
	1403	m_noise_clock_res = data;
	1404	}
1405	1405
1406	1406	log_noise_gen_freq();
1407	1407	}
r253023	r253024
1711	1711
1712	1712	stream_sample_t *buffer = outputs[0];
1713	1713
1714		/* compute charging values, doing it here ensures that we always use the latest values */
	1714	/* compute charging values, doing it here ensures that we always use the latest values */
1715	1715	one_shot_cap_charging_step = compute_one_shot_cap_charging_rate() / m_our_sample_rate;
1716	1716	one_shot_cap_discharging_step = compute_one_shot_cap_discharging_rate() / m_our_sample_rate;
1717	1717

trunk/src/devices/sound/upd7759.h
r253023	r253024
95	95	INT16 m_sample; /* current sample value */
96	96
97	97	/* ROM access */
98		optional_region_ptr<UINT8> m_rombase; /* pointer to ROM data or NULL for slave mode */
	98	optional_region_ptr<UINT8> m_rombase; /* pointer to ROM data or NULL for slave mode */
99	99	UINT8 * m_rom; /* pointer to ROM data or NULL for slave mode */
100	100	UINT32 m_romoffset; /* ROM offset to make save/restore easier */
101	101	UINT32 m_rommask; /* maximum address offset */

trunk/src/devices/video/pcd8544.cpp
r253023	r253024
61	61
62	62	void pcd8544_device::device_reset()
63	63	{
64		m_mode = 0x04; // PD=1, V=0, H=0
65		m_control = 0x00; // E=0, D=0
	64	m_mode = 0x04; // PD=1, V=0, H=0
	65	m_control = 0x00; // E=0, D=0
66	66	m_addr_y = 0;
67	67	m_addr_x = 0;
68	68	m_bias = 0;
r253023	r253024
207	207	{
208	208	switch (m_control)
209	209	{
210		case 0: // display blank
211		case 1: // all display segments on
	210	case 0: // display blank
	211	case 1: // all display segments on
212	212	bitmap.fill(m_control & 1, cliprect);
213	213	break;
214	214
215		case 2: // normal mode
216		case 3: // inverse video mode
	215	case 2: // normal mode
	216	case 3: // inverse video mode
217	217	if (!m_screen_update_cb.isnull())
218	218	m_screen_update_cb(screen, bitmap, cliprect, m_vram, m_control & 1);
219	219	break;

trunk/src/devices/video/pcd8544.h
r253023	r253024
50	50	void write_data(UINT8 data);
51	51
52	52	private:
53		pcd8544_screen_update_delegate m_screen_update_cb; // screen update callback
54		int m_sdin;
55		int m_sclk;
56		int m_dc;
57		int m_bits;
58		UINT8 m_mode;
59		UINT8 m_control;
60		UINT8 m_op_vol;
61		UINT8 m_bias;
62		UINT8 m_temp_coef;
63		UINT8 m_indata;
64		UINT8 m_addr_y;
65		UINT8 m_addr_x;
66		UINT8 m_vram[6*84]; // 4032 bit video ram
	53	pcd8544_screen_update_delegate m_screen_update_cb; // screen update callback
	54	int m_sdin;
	55	int m_sclk;
	56	int m_dc;
	57	int m_bits;
	58	UINT8 m_mode;
	59	UINT8 m_control;
	60	UINT8 m_op_vol;
	61	UINT8 m_bias;
	62	UINT8 m_temp_coef;
	63	UINT8 m_indata;
	64	UINT8 m_addr_y;
	65	UINT8 m_addr_x;
	66	UINT8 m_vram[6*84]; // 4032 bit video ram
67	67	};
68	68
69	69	// device type definition

trunk/src/devices/video/voodoo.cpp
r253023	r253024
3326	3326
3327	3327	rgbaint_t color, preFog;
3328	3328	rgbaint_t iterargb(0);
3329
3330	3329
	3330
3331	3331	/* pixel pipeline part 1 handles depth testing and stippling */
3332	3332	//PIXEL_PIPELINE_BEGIN(v, stats, x, y, v->reg[fbzColorPath].u, v->reg[fbzMode].u, iterz, iterw);
3333	3333	// Start PIXEL_PIPE_BEGIN copy
r253023	r253024
3387	3387	/* handle alpha test */
3388	3388	if (!alphaTest(v, stats, v->reg[alphaMode].u, color.get_a()))
3389	3389	goto nextpixel;
3390
3391	3390
	3391
3392	3392	/* wait for any outstanding work to finish */
3393	3393	poly_wait(v->poly, "LFB Write");
3394	3394
r253023	r253024
6016	6016
6017	6017	RASTERIZER(generic_2tmu, 2, v->reg[fbzColorPath].u, v->reg[fbzMode].u, v->reg[alphaMode].u,
6018	6018	v->reg[fogMode].u, v->tmu[0].reg[textureMode].u, v->tmu[1].reg[textureMode].u)
6019
6020

trunk/src/devices/video/voodoo_rast.inc
r253023	r253024
491	491	//RASTERIZER_ENTRY( 0x00000001, 0x00000000, 0x00000000, 0x00000300, 0x00000800, 0x00000800 ) /* * 87 2 72 */
492	492	//RASTERIZER_ENTRY( 0x00000001, 0x00000000, 0x00000000, 0x00000200, 0x08241A00, 0x08241A00 ) /* * 92 2 8 */
493	493	//RASTERIZER_ENTRY( 0x00000001, 0x00000000, 0x00000000, 0x00000200, 0x00000000, 0x08241A00 ) /* * 93 2 8 */
494

trunk/src/emu/bookkeeping.cpp
r253023	r253024
22	22
23	23	bookkeeping_manager::bookkeeping_manager(running_machine &machine)
24	24	: m_machine(machine),
25		m_dispensed_tickets(0)
	25	m_dispensed_tickets(0)
26	26	{
27
28	27	/* reset coin counters */
29	28	for (int counternum = 0; counternum < COIN_COUNTERS; counternum++)
30	29	{
r253023	r253024
33	32	m_coin_count[counternum] = 0;
34	33	}
35	34
36		// register coin save state
	35	// register coin save state
37	36	machine.save().save_item(NAME(m_coin_count));
38	37	machine.save().save_item(NAME(m_coinlockedout));
39	38	machine.save().save_item(NAME(m_lastcoin));

trunk/src/emu/bookkeeping.h
r253023	r253024
44	44	// increment the number of dispensed tickets
45	45	void increment_dispensed_tickets(int delta);
46	46
47		// ----- coin counters -----
	47	// ----- coin counters -----
48	48	// write to a particular coin counter (clocks on active high edge)
49	49	void coin_counter_w(int num, int on);
50	50
51	51	// return the coin count for a given coin
52	52	int coin_counter_get_count(int num);
53	53
54		// enable/disable coin lockout for a particular coin
	54	// enable/disable coin lockout for a particular coin
55	55	void coin_lockout_w(int num, int on);
56	56
57	57	// return current lockout state for a particular coin

trunk/src/emu/config.h
r253023	r253024
45	45	{
46	46	struct config_element
47	47	{
48		std::string name; /* node name */
	48	std::string name; /* node name */
49	49	config_saveload_delegate load; /* load callback */
50	50	config_saveload_delegate save; /* save callback */
51	51	};

trunk/src/emu/diimage.cpp
r253023	r253024
61	61	m_mame_file(nullptr),
62	62	m_software_info_ptr(nullptr),
63	63	m_software_part_ptr(nullptr),
64		m_supported(0),
	64	m_supported(0),
65	65	m_readonly(false),
66	66	m_created(false),
67		m_init_phase(false),
68		m_from_swlist(false),
69		m_create_format(0),
70		m_create_args(nullptr),
	67	m_init_phase(false),
	68	m_from_swlist(false),
	69	m_create_format(0),
	70	m_create_args(nullptr),
71	71	m_is_loading(FALSE)
72	72	{
73	73	}
r253023	r253024
1420	1420	image_fwrite_thunk,
1421	1421	image_fsize_thunk
1422	1422	};
1423

trunk/src/emu/image.cpp
r253023	r253024
231	231	{
232	232	/* retrieve image error message */
233	233	std::string image_err = std::string(image->error());
234
	234
235	235	/* unload all images */
236	236	unload_all();
237	237
r253023	r253024
243	243	/* add a callback for when we shut down */
244	244	machine().add_notifier(MACHINE_NOTIFY_EXIT, machine_notify_delegate(FUNC(image_manager::unload_all), this));
245	245	}
246

trunk/src/emu/image.h
r253023	r253024
20	20	public:
21	21	// construction/destruction
22	22	image_manager(running_machine &machine);
23
	23
24	24	void unload_all();
25	25	void postdevice_init();
26	26	std::string &mandatory_scan(std::string &mandatory);

trunk/src/emu/luaengine.cpp
r253023	r253024
863	863
864	864	static void serve_lua(void param)
865	865	{
866		lua_engine engine = (lua_engine )param;
867		engine->serve_lua();
868		return NULL;
	866	lua_engine engine = (lua_engine )param;
	867	engine->serve_lua();
	868	return NULL;
869	869	}
870	870
871	871	//-------------------------------------------------

trunk/src/emu/machine.h
r253023	r253024
294	294	std::unique_ptr<network_manager> m_network; // internal data from network.cpp
295	295	std::unique_ptr<bookkeeping_manager> m_bookkeeping;// internal data from bookkeeping.cpp
296	296	std::unique_ptr<configuration_manager> m_configuration; // internal data from config.cpp
297		std::unique_ptr<output_manager> m_output; // internal data from output.cpp
298		std::unique_ptr<crosshair_manager> m_crosshair; // internal data from crsshair.cpp
299		std::unique_ptr<image_manager> m_image; // internal data from image.cpp
300		std::unique_ptr<rom_load_manager> m_rom_load; // internal data from romload.cpp
301		std::unique_ptr<debugger_manager> m_debugger; // internal data from debugger.cpp
	297	std::unique_ptr<output_manager> m_output; // internal data from output.cpp
	298	std::unique_ptr<crosshair_manager> m_crosshair; // internal data from crsshair.cpp
	299	std::unique_ptr<image_manager> m_image; // internal data from image.cpp
	300	std::unique_ptr<rom_load_manager> m_rom_load; // internal data from romload.cpp
	301	std::unique_ptr<debugger_manager> m_debugger; // internal data from debugger.cpp
302	302
303	303	// system state
304	304	machine_phase m_current_phase; // current execution phase

trunk/src/emu/output.cpp
r253023	r253024
20	20
21	21	output_manager::output_manager(running_machine &machine)
22	22	: m_machine(machine),
23		m_uniqueid(12345)
	23	m_uniqueid(12345)
24	24	{
25	25	/* add pause callback */
26	26	machine.add_notifier(MACHINE_NOTIFY_PAUSE, machine_notify_delegate(FUNC(output_manager::pause), this));
r253023	r253024
49	49	output_manager::output_item output_manager::create_new_item(const char outname, INT32 value)
50	50	{
51	51	output_item item;
52
	52
53	53	/* fill in the data */
54	54	item.name = outname;
55	55	item.id = m_uniqueid++;
r253023	r253024
197	197	/* if no item of that name, create a new one */
198	198	if (item == nullptr)
199	199	item = create_new_item(outname, 0);
200
	200
201	201	item->notifylist.push_back(notify);
202	202	}
203	203	else

trunk/src/emu/ui/ui.cpp
r253023	r253024
1091	1091	str.append(emulator_info::get_gamenoun());
1092	1092	str.append(" was never completed. It may exhibit strange behavior or missing elements that are not bugs in the emulation.\n");
1093	1093	}
1094
	1094
1095	1095	if (machine().system().flags & MACHINE_NO_SOUND_HW )
1096	1096	{
1097	1097	str.append("This ");
1098	1098	str.append(emulator_info::get_gamenoun());
1099	1099	str.append(" has no sound hardware, MAME will produce no sounds, this is expected behaviour.\n");
1100	1100	}
1101
	1101
1102	1102	// if there's a NOT WORKING, UNEMULATED PROTECTION or GAME MECHANICAL warning, make it stronger
1103	1103	if (machine().system().flags & (MACHINE_NOT_WORKING \| MACHINE_UNEMULATED_PROTECTION \| MACHINE_MECHANICAL))
1104	1104	{

trunk/src/emu/uiinput.cpp
r253023	r253024
33	33	//-------------------------------------------------
34	34
35	35	ui_input_manager::ui_input_manager(running_machine &machine)
36		: m_machine(machine),
37		m_current_mouse_target(nullptr),
38		m_current_mouse_down(false),
39		m_events_start(0),
40		m_events_end(0)
	36	: m_machine(machine),
	37	m_current_mouse_target(nullptr),
	38	m_current_mouse_down(false),
	39	m_events_start(0),
	40	m_events_end(0)
41	41	{
42	42	/* create the private data */
43	43	m_current_mouse_x = -1;
r253023	r253024
78	78
79	79	bool ui_input_manager::push_event(ui_event evt)
80	80	{
81
82	81	/* some pre-processing (this is an icky place to do this stuff!) */
83	82	switch (evt.event_type)
84	83	{
r253023	r253024
241	240	}
242	241
243	242	/*-------------------------------------------------
244		push_mouse_move_event - pushes a mouse
245		move event to the specified render_target
	243	push_mouse_move_event - pushes a mouse
	244	move event to the specified render_target
246	245	-------------------------------------------------*/
247	246
248	247	void ui_input_manager::push_mouse_move_event(render_target* target, INT32 x, INT32 y)
r253023	r253024
256	255	}
257	256
258	257	/*-------------------------------------------------
259		push_mouse_leave_event - pushes a
260		mouse leave event to the specified render_target
	258	push_mouse_leave_event - pushes a
	259	mouse leave event to the specified render_target
261	260	-------------------------------------------------*/
262	261
263	262	void ui_input_manager::push_mouse_leave_event(render_target* target)
r253023	r253024
269	268	}
270	269
271	270	/*-------------------------------------------------
272		push_mouse_down_event - pushes a mouse
273		down event to the specified render_target
	271	push_mouse_down_event - pushes a mouse
	272	down event to the specified render_target
274	273	-------------------------------------------------*/
275	274
276	275	void ui_input_manager::push_mouse_down_event(render_target* target, INT32 x, INT32 y)
r253023	r253024
284	283	}
285	284
286	285	/*-------------------------------------------------
287		push_mouse_down_event - pushes a mouse
288		down event to the specified render_target
	286	push_mouse_down_event - pushes a mouse
	287	down event to the specified render_target
289	288	-------------------------------------------------*/
290	289
291	290	void ui_input_manager::push_mouse_up_event(render_target* target, INT32 x, INT32 y)
r253023	r253024
299	298	}
300	299
301	300	/*-------------------------------------------------
302		push_mouse_double_click_event - pushes
303		a mouse double-click event to the specified
304		render_target
	301	push_mouse_double_click_event - pushes
	302	a mouse double-click event to the specified
	303	render_target
305	304	-------------------------------------------------*/
306	305	void ui_input_manager::push_mouse_double_click_event(render_target* target, INT32 x, INT32 y)
307	306	{
r253023	r253024
314	313	}
315	314
316	315	/*-------------------------------------------------
317		push_char_event - pushes a char event
318		to the specified render_target
	316	push_char_event - pushes a char event
	317	to the specified render_target
319	318	-------------------------------------------------*/
320	319	void ui_input_manager::push_char_event(render_target* target, unicode_char ch)
321	320	{

trunk/src/emu/uiinput.h
r253023	r253024
16	16
17	17
18	18	/***************************************************************************
19		CONSTANTS
	19	CONSTANTS
20	20	***************************************************************************/
21	21
22	22	#define EVENT_QUEUE_SIZE 128

trunk/src/lib/util/corealloc.h
r253023	r253024
35	35
36	36	template<typename _Tp, typename... _Args>
37	37	inline _Tp* global_alloc_clear(_Args&&... __args)
38		{
	38	{
39	39	unsigned char * ptr = new unsigned char[sizeof(_Tp)]; // allocate memory
40	40	memset(ptr, 0, sizeof(_Tp));
41		return new(ptr) _Tp(std::forward<_Args>(__args)...);
	41	return new(ptr) _Tp(std::forward<_Args>(__args)...);
42	42	}
43	43
44	44	template<typename _Tp>
45	45	inline _Tp* global_alloc_array_clear(size_t __num)
46		{
	46	{
47	47	auto size = sizeof(_Tp) * __num;
48	48	unsigned char* ptr = new unsigned char[size]; // allocate memory
49	49	memset(ptr, 0, size);

trunk/src/mame/arcade.lst
r253023	r253024
2610	2610	taitotz
2611	2611	batlgear // E68 (c) 1999 Taito
2612	2612	pwrshovl // E74 (c) 1999 Taito
2613		pwrshovla //
	2613	pwrshovla //
2614	2614	landhigh // E82 (c) 1999 Taito
2615	2615	batlgr2 // E87 (c) 2000 Taito (2.04J)
2616	2616	batlgr2a // E87 (c) 2000 Taito (2.01J)
2617	2617	styphp // E98 (c) 2000 Taito
2618	2618	raizpin // F14 (c) 2002 Taito
2619		raizpinj //
	2619	raizpinj //
2620	2620
2621	2621	invqix // F34 (c) 2003 Taito Corporation
2622	2622
r253023	r253024
2717	2717	honeydol // (c) 1995 Barko Corp
2718	2718	twinadv // (c) 1995 Barko Corp
2719	2719	twinadvk // (c) 1995 Barko Corp
2720		multi96 // (c) 1996 Barko Corp
	2720	multi96 // (c) 1996 Barko Corp
2721	2721	snowbro3 // (c) 2002 Syrmex
2722	2722	ballboy // bootleg
2723	2723	// SemiCom games on "SnowBros"-like hardware
r253023	r253024
3146	3146	daimakair // 12/1988 (c) 1988 (Japan)
3147	3147	strider // 3/1989 (c) 1989 (not explicitly stated but should be USA)
3148	3148	striderua // 3/1989 (c) 1989 (not explicitly stated but should be USA)
3149		strideruc // conversion
	3149	strideruc // conversion
3150	3150	striderj // 3/1989 (c) 1989 (Japan)
3151	3151	striderjr // 3/1989 (c) 1989 (Japan)
3152	3152	dynwar // 4/1989 (c) 1989 (USA)
r253023	r253024
4194	4194	grmatch // (c) 1989 Yankee Game Technology
4195	4195	stratab // (c) 1990 Strata/Incredible Technologies
4196	4196	stratab1 // (c) 1990 Strata/Incredible Technologies
4197		stratabs // (c) 1990 Strata/Incredible Technologies
	4197	stratabs // (c) 1990 Strata/Incredible Technologies
4198	4198	sstrike // (c) 1990 Strata/Incredible Technologies
4199	4199	gtg // (c) 1990 Strata/Incredible Technologies
4200	4200	gtgt // (c) 1990 Strata/Incredible Technologies
r253023	r253024
4840	4840	mwalkj // 1990.08 Micheal Jackson's Moonwalker (Japan, FD1094+8751)
4841	4841	mwalk // 1990.?? Micheal Jackson's Moonwalker (World, FD1094+8751)
4842	4842	lghost // 1990.?? Laser Ghost (World, FD1094)
4843		lghostj // 1990.12 Laser Ghost (Japan)
	4843	lghostj // 1990.12 Laser Ghost (Japan)
4844	4844	lghostu // 1991.01 Laser Ghost (US, FD1094)
4845	4845	cltchitr // 1991.02 Clutch Hitter (US, FD1094)
4846	4846	cltchitrj // 1991.05 Clutch Hitter (Japan, FD1094)
r253023	r253024
5544	5544	// 1999.?? Pocket Shooting
5545	5545	sambap // 1999.?? Samba de Amigo (prototype)
5546	5546	spawn // 1999.?? Spawn In the Demon's Hand
5547		tokyobus // 1999.?? Tokyo Bus Guide (Rev A)
	5547	tokyobus // 1999.?? Tokyo Bus Guide (Rev A)
5548	5548	vtennisg // 1999.?? Virtua Tennis / Power Smash (GD-ROM)
5549	5549	18wheelr // 2000.01 18 Wheeler Deluxe (Rev A)
5550	5550	18wheels // 2000.01 18 Wheeler (Standard)
r253023	r253024
7687	7687	ikarinc // A5004 'IW' (c) 1986
7688	7688	ikarijp // A5004 'IW' (c) 1986 (Japan)
7689	7689	ikarijpb // bootleg
7690		ikariram // bootleg
	7690	ikariram // bootleg
7691	7691	victroad // A6002 (c) 1986
7692	7692	dogosoke // A6002 (c) 1986
7693	7693	dogosokb // bootleg
r253023	r253024
8243	8243	mouser // UPL-83001 (c) 1983
8244	8244	mouserc // UPL-83001 (c) 1983
8245	8245	nova2001 // UPL-83005 (c) 1983
8246		nova2001h // hack?
	8246	nova2001h // hack?
8247	8247	nova2001u // UPL-83005 (c) [1983] + Universal license
8248	8248	ninjakun // UPL-84003 (c) 1984 Taito Corporation
8249	8249	raiders5 // UPL-85004 (c) 1985
r253023	r253024
8837	8837	skysmash // (c) 1990 Nihon System Inc.
8838	8838	legionna // (c) 1992 Tad (World)
8839	8839	legionnau // (c) 1992 Tad + Fabtek license (US)
8840		legionnaj // (c) 1992 Tad (Japan)
	8840	legionnaj // (c) 1992 Tad (Japan)
8841	8841	heatbrl // (c) 1992 Tad (World version 3)
8842	8842	heatbrl2 // (c) 1992 Tad (World version 2)
8843	8843	heatbrlo // (c) 1992 Tad (World)
r253023	r253024
9179	9179	wrally2 // (c) 1995 - Ref 950510
9180	9180	maniacsp // (c) 1996 - Ref 922804/2 - (prototype)
9181	9181	maniacsq // (c) 1996 - Ref 940411 - (unprotected)
9182		maniacsqa // (c) 1996 - Ref 940411
	9182	maniacsqa // (c) 1996 - Ref 940411
9183	9183	snowboar // (c) 1996 - Ref 960419/1
9184	9184	snowboara // (c) 1996 - Ref 960419/1
9185	9185	bang // (c) 1998 - Ref ???
r253023	r253024
13459	13459	kas89 // 1989, SFC S.R.L.
13460	13460	caspoker // 1987, PM / Beck Elektronik.
13461	13461	wildpkr // 199?, TAB Austria.
13462		tabpkr // 199?, TAB Austira
	13462	tabpkr // 199?, TAB Austira
13463	13463	subhuntr // 1979 Model Racing
13464	13464
13465	13465	manohman // 199?, Merkur.
r253023	r253024
32680	32680
32681	32681	fi6845
32682	32682	fi8275
32683

trunk/src/mame/audio/carnival.cpp
r253023	r253024
203	203
204	204
205	205	MACHINE_CONFIG_FRAGMENT( carnival_audio )
206
	206
207	207	/* music board */
208	208	MCFG_CPU_ADD("audiocpu", I8039, XTAL_3_579545MHz)
209	209	MCFG_CPU_PROGRAM_MAP(mboard_map)

trunk/src/mame/audio/dcs.h
r253023	r253024
165	165	UINT32 m_sounddata_banks;
166	166	UINT16 m_sounddata_bank;
167	167
168		optional_memory_bank m_data_bank;
169		memory_bank * m_rom_page;
170		memory_bank * m_dram_page;
	168	optional_memory_bank m_data_bank;
	169	memory_bank * m_rom_page;
	170	memory_bank * m_dram_page;
171	171
172	172	/* I/O with the host */
173	173	UINT8 m_auto_ack;

trunk/src/mame/drivers/20pacgal.cpp
r253023	r253024
363	363	void _20pacgal_state::machine_start()
364	364	{
365	365	common_save_state();
366
	366
367	367	// membank currently used only by 20pacgal
368	368	membank("bank1")->configure_entry(0, memregion("maincpu")->base() + 0x08000);
369	369	membank("bank1")->configure_entry(1, m_ram_48000);

trunk/src/mame/drivers/40love.cpp
r253023	r253024
996	996	m_pix2[0] = 0;
997	997	m_pix2[1] = 0;
998	998	m_color_bank = false;
999
	999
1000	1000	/* sound */
1001	1001	m_sound_nmi_enable = 0;
1002	1002	m_pending_nmi = 0;

trunk/src/mame/drivers/8080bw.cpp
r253023	r253024
3300	3300	// decrypt rom
3301	3301	for (int i = 0; i < len; i++)
3302	3302	dest[i] = BITSWAP8(src[(i & 0x100ff) \| (BITSWAP8(i >> 8 & 0xff, 7,3,4,5,0,6,1,2) << 8)],0,6,5,7,4,3,1,2);
3303
	3303
3304	3304	membank("bank1")->configure_entries(0, 8, memregion("maincpu")->base(), 0x4000);
3305	3305	membank("bank1")->set_entry(0);
3306	3306	membank("bank2")->configure_entries(0, 8, memregion("maincpu")->base() + 0x2000, 0x4000);

trunk/src/mame/drivers/arkanoid.cpp
r253023	r253024
900	900	ic46 = 74ls08
901	901	ic87 = 74ls74
902	902	~VCC = 'pulled to vcc through a resistor'
903		icxx.y = ic xx pin y
	903	icxx.y = ic xx pin y
904	904	+--------\_/--------+
905	905	GND -- = VSS(GND) -- \| 1 28 \| <- /RESET = <- ~VCC & ic32.9 (4Q) & ic26.13 (/reset2) & ic26.1 (/reset1)
906	906	~VCC & ic26.6 (/1Q) & ic9.10 (I1C) -> = /INT -> \| 2 27 \| <> PA7 = -> ic27.18 (8D)
r253023	r253024
1527	1527	ROM_LOAD( "a75-07.ic24", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* Chip Silkscreen: "A75-07"; red component */
1528	1528	ROM_LOAD( "a75-08.ic23", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* Chip Silkscreen: "A75-08"; green component */
1529	1529	ROM_LOAD( "a75-09.ic22", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* Chip Silkscreen: "A75-09"; blue component */
1530
	1530
1531	1531	ROM_REGION( 0x8000, "altgfx", 0 )
1532	1532	ROM_LOAD( "a75__03(alternate).ic64", 0x00000, 0x8000, CRC(983d4485) SHA1(603a8798d1f531a70a527a5c6122f0ffd6adcfb6) ) // this was found on a legit v1.1 Romstar USA pcb with serial number 29342; the only difference seems to be the first 32 tiles are all 0xFF instead of 0x00. Those tiles don't seem to be used by the game at all. This is likely another incidence of "Taito forgot to clear programmer ram before burning a rom from a sparse s-record/ihex file"
1533	1533	ROM_END

trunk/src/mame/drivers/atom.cpp
r253023	r253024
291	291	-------------------------------------------------*/
292	292
293	293	//static ADDRESS_MAP_START( prophet2_mem, AS_PROGRAM, 8, atom_state )
294		// AM_RANGE(0x0000, 0x09ff) AM_RAM
295		// AM_RANGE(0x0a00, 0x7fff) AM_RAM
296		// AM_RANGE(0x8000, 0x97ff) AM_RAM AM_SHARE("video_ram")
297		// AM_RANGE(0x9800, 0x9fff) AM_RAM
298		// AM_RANGE(0xb000, 0xb003) AM_MIRROR(0x3fc) AM_DEVREADWRITE(INS8255_TAG, i8255_device, read, write)
	294	// AM_RANGE(0x0000, 0x09ff) AM_RAM
	295	// AM_RANGE(0x0a00, 0x7fff) AM_RAM
	296	// AM_RANGE(0x8000, 0x97ff) AM_RAM AM_SHARE("video_ram")
	297	// AM_RANGE(0x9800, 0x9fff) AM_RAM
	298	// AM_RANGE(0xb000, 0xb003) AM_MIRROR(0x3fc) AM_DEVREADWRITE(INS8255_TAG, i8255_device, read, write)
299	299	//// AM_RANGE(0xb400, 0xb403) AM_DEVREADWRITE(MC6854_TAG, mc6854_device, read, write)
300	300	//// AM_RANGE(0xb404, 0xb404) AM_READ_PORT("ECONET")
301		// AM_RANGE(0xb800, 0xb80f) AM_MIRROR(0x3f0) AM_DEVREADWRITE(R6522_TAG, via6522_device, read, write)
302		// AM_RANGE(0xc000, 0xffff) AM_ROM AM_REGION(SY6502_TAG, 0)
	301	// AM_RANGE(0xb800, 0xb80f) AM_MIRROR(0x3f0) AM_DEVREADWRITE(R6522_TAG, via6522_device, read, write)
	302	// AM_RANGE(0xc000, 0xffff) AM_ROM AM_REGION(SY6502_TAG, 0)
303	303	//ADDRESS_MAP_END
304	304
305	305	/***************************************************************************
r253023	r253024
859	859	-------------------------------------------------*/
860	860
861	861	//static MACHINE_CONFIG_DERIVED( prophet2, atom )
862		// /* basic machine hardware */
863		// MCFG_CPU_MODIFY(SY6502_TAG)
864		// MCFG_CPU_PROGRAM_MAP(prophet2_mem)
	862	// /* basic machine hardware */
	863	// MCFG_CPU_MODIFY(SY6502_TAG)
	864	// MCFG_CPU_PROGRAM_MAP(prophet2_mem)
865	865	//
866		// /* fdc */
867		// MCFG_DEVICE_REMOVE(I8271_TAG)
868		// MCFG_DEVICE_REMOVE(I8271_TAG ":0")
869		// MCFG_DEVICE_REMOVE(I8271_TAG ":1")
	866	// /* fdc */
	867	// MCFG_DEVICE_REMOVE(I8271_TAG)
	868	// MCFG_DEVICE_REMOVE(I8271_TAG ":0")
	869	// MCFG_DEVICE_REMOVE(I8271_TAG ":1")
870	870	//
871		// /* Software lists */
872		// MCFG_SOFTWARE_LIST_REMOVE("flop_list")
	871	// /* Software lists */
	872	// MCFG_SOFTWARE_LIST_REMOVE("flop_list")
873	873	//MACHINE_CONFIG_END
874	874
875	875	/*-------------------------------------------------
r253023	r253024
885	885	-------------------------------------------------*/
886	886
887	887	//static MACHINE_CONFIG_DERIVED( atommc, atom )
888		// /* Software lists */
889		// MCFG_SOFTWARE_LIST_ADD("mmc_list","atom_mmc")
890		// MCFG_SOFTWARE_LIST_REMOVE("flop_list")
	888	// /* Software lists */
	889	// MCFG_SOFTWARE_LIST_ADD("mmc_list","atom_mmc")
	890	// MCFG_SOFTWARE_LIST_REMOVE("flop_list")
891	891	//MACHINE_CONFIG_END
892	892
893	893	/***************************************************************************
r253023	r253024
938	938	-------------------------------------------------*/
939	939
940	940	//ROM_START( atommc )
941		// ROM_REGION( 0x4000, SY6502_TAG, 0 )
942		// ROM_LOAD( "abasic.ic20", 0x0000, 0x1000, CRC(289b7791) SHA1(0072c83458a9690a3ea1f6094f0f38cf8e96a445) )
943		// ROM_CONTINUE( 0x3000, 0x1000 )
944		// ROM_LOAD( "afloat.ic21", 0x1000, 0x1000, CRC(81d86af7) SHA1(ebcde5b36cb3a3344567cbba4c7b9fde015f4802) )
945		// ROM_LOAD( "atommc2-2.9-a000.rom", 0x2000, 0x1000, CRC(ba73e36c) SHA1(ea9739e96f3283c90b5306288c796fc01144b771) )
	941	// ROM_REGION( 0x4000, SY6502_TAG, 0 )
	942	// ROM_LOAD( "abasic.ic20", 0x0000, 0x1000, CRC(289b7791) SHA1(0072c83458a9690a3ea1f6094f0f38cf8e96a445) )
	943	// ROM_CONTINUE( 0x3000, 0x1000 )
	944	// ROM_LOAD( "afloat.ic21", 0x1000, 0x1000, CRC(81d86af7) SHA1(ebcde5b36cb3a3344567cbba4c7b9fde015f4802) )
	945	// ROM_LOAD( "atommc2-2.9-a000.rom", 0x2000, 0x1000, CRC(ba73e36c) SHA1(ea9739e96f3283c90b5306288c796fc01144b771) )
946	946	//ROM_END
947	947
948	948	DRIVER_INIT_MEMBER(atomeb_state, atomeb)

trunk/src/mame/drivers/barata.cpp
r253023	r253024
54	54	DECLARE_WRITE8_MEMBER(port2_w);
55	55	DECLARE_READ8_MEMBER(port2_r);
56	56	void fpga_send(unsigned char cmd);
57
	57
58	58	required_device<cpu_device> m_maincpu;
59	59	required_device<dac_device> m_dac;
60	60	private:

trunk/src/mame/drivers/bfm_sc1.cpp
r253023	r253024
1089	1089	MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(bfm_sc1_state, reel4_optic_cb))
1090	1090	MCFG_STARPOINT_48STEP_ADD("reel5")
1091	1091	MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(bfm_sc1_state, reel5_optic_cb))
1092
	1092
1093	1093	MCFG_DEVICE_ADD("meters", METERS, 0)
1094	1094	MCFG_METERS_NUMBER(8)
1095	1095	MACHINE_CONFIG_END

trunk/src/mame/drivers/bfm_sc2.cpp
r253023	r253024
605	605	}
606	606	}
607	607	}
608
	608
609	609	if ( data & 0x1F ) m_maincpu->set_input_line(M6809_FIRQ_LINE, ASSERT_LINE );
610	610	}
611	611
r253023	r253024
3656	3656	MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(bfm_sc2_state, reel4_optic_cb))
3657	3657	MCFG_STARPOINT_48STEP_ADD("reel5")
3658	3658	MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(bfm_sc2_state, reel5_optic_cb))
3659
	3659
3660	3660	MCFG_FRAGMENT_ADD(_8meters)
3661	3661	MACHINE_CONFIG_END
3662	3662
r253023	r253024
3669	3669	static MACHINE_CONFIG_DERIVED( scorpion3, scorpion2 )
3670	3670	MCFG_CPU_MODIFY("maincpu")
3671	3671	MCFG_CPU_PROGRAM_MAP(memmap_no_vid)
3672
	3672
3673	3673	MCFG_DEVICE_REMOVE("meters")
3674	3674	MCFG_FRAGMENT_ADD(_5meters)
3675	3675	MACHINE_CONFIG_END
r253023	r253024
3715	3715	MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(bfm_sc2_state, reel4_optic_cb))
3716	3716	MCFG_STARPOINT_48STEP_ADD("reel5")
3717	3717	MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(bfm_sc2_state, reel5_optic_cb))
3718
	3718
3719	3719	MCFG_FRAGMENT_ADD( _8meters)
3720	3720	MACHINE_CONFIG_END
3721	3721

trunk/src/mame/drivers/bfmsys85.cpp
r253023	r253024
754	754	b85_find_project_string();
755	755	}
756	756
757		#define MACHINE_FLAGS MACHINE_NOT_WORKING\|MACHINE_SUPPORTS_SAVE\|MACHINE_REQUIRES_ARTWORK
758		#define MACHINE_FLAGS_MECHANICAL MACHINE_FLAGS\|MACHINE_MECHANICAL
	757	#define MACHINE_FLAGS MACHINE_NOT_WORKING\|MACHINE_SUPPORTS_SAVE\|MACHINE_REQUIRES_ARTWORK
	758	#define MACHINE_FLAGS_MECHANICAL MACHINE_FLAGS\|MACHINE_MECHANICAL
759	759
760	760	// PROJECT NUMBER 5539 2P CASH EXPLOSION GAME No 39-350-190 - 29-MAR-1989 11:45:25
761	761	GAME( 1989, b85cexpl , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Cash Explosion (System 85)", MACHINE_FLAGS )

trunk/src/mame/drivers/casloopy.cpp
r253023	r253024
320	320
321	321	WRITE16_MEMBER(casloopy_state::vregs_w)
322	322	{
323		// if(offset != 6/2)
324		// printf("%08x %08x\n",offset*2,data);
	323	// if(offset != 6/2)
	324	// printf("%08x %08x\n",offset*2,data);
325	325	}
326	326
327	327	READ16_MEMBER(casloopy_state::pal_r)

trunk/src/mame/drivers/cobra.cpp
r253023	r253024
2288	2288	// GFX register select
2289	2289	m_gfx_register_select = w[3];
2290	2290
2291		// printf("GFX: register select %08X\n", m_gfx_register_select);
	2291	// printf("GFX: register select %08X\n", m_gfx_register_select);
2292	2292	}
2293	2293	else if (w2 == 0x10500018)
2294	2294	{
2295	2295	// register write to the register selected above?
2296	2296	// 64-bit registers, top 32-bits in word 2, low 32-bit in word 3
2297		// printf("GFX: register write %08X: %08X %08X\n", m_gfx_register_select, w[2], w[3]);
	2297	// printf("GFX: register write %08X: %08X %08X\n", m_gfx_register_select, w[2], w[3]);
2298	2298
2299	2299	gfx_write_reg(((UINT64)(w[2]) << 32) \| w[3]);
2300	2300	}

trunk/src/mame/drivers/dccons.cpp
r253023	r253024
681	681	DREAMCAST_COMMON_BIOS
682	682
683	683	ROM_REGION(0x020000, "dcflash", 0)
684		ROM_LOAD( "dcus_ntsc.bin", 0x000000, 0x020000, BAD_DUMP CRC(e6862dd0) SHA1(24875ce85c011600e73b1c3fd2b341824cbf8544) ) // dumped from VA2.4 mobo with 1.022 BIOS
	684	ROM_LOAD( "dcus_ntsc.bin", 0x000000, 0x020000, BAD_DUMP CRC(e6862dd0) SHA1(24875ce85c011600e73b1c3fd2b341824cbf8544) ) // dumped from VA2.4 mobo with 1.022 BIOS
685	685	ROM_END
686	686
687	687	ROM_START( dceu )
r253023	r253024
693	693
694	694	ROM_START( dcjp )
695	695	DREAMCAST_COMMON_BIOS
696		ROM_SYSTEM_BIOS(4, "1004", "v1.004 (Japan)") // oldest known mass production version, supports Japan region only
	696	ROM_SYSTEM_BIOS(4, "1004", "v1.004 (Japan)") // oldest known mass production version, supports Japan region only
697	697	ROM_LOAD_BIOS(4, "mpr-21068.ic501", 0x000000, 0x200000, CRC(5454841f) SHA1(1ea132c0fbbf07ef76789eadc07908045c089bd6) )
698	698
699	699	ROM_REGION(0x020000, "dcflash", 0)
r253023	r253024
706	706	// otherwise it boots from EPROM which contain system checker software (last dump)
707	707	ROM_START( dcdev )
708	708	ROM_REGION(0x200000, "maincpu", 0)
709		ROM_SYSTEM_BIOS(0, "1011", "Katana Set5 v1.011 (World)") // BOOT flash rom update from Katana SDK R9-R11, WinCE SDK v2.1
	709	ROM_SYSTEM_BIOS(0, "1011", "Katana Set5 v1.011 (World)") // BOOT flash rom update from Katana SDK R9-R11, WinCE SDK v2.1
710	710	ROM_LOAD_BIOS(0, "set5v1.011.ic507", 0x000000, 0x200000, CRC(2186e0e5) SHA1(6bd18fb83f8fdb56f1941e079580e5dd672a6dad) )
711		ROM_SYSTEM_BIOS(1, "1001", "Katana Set5 v1.001 (Japan)") // BOOT flash rom update from WinCE SDK v1.0
	711	ROM_SYSTEM_BIOS(1, "1001", "Katana Set5 v1.001 (Japan)") // BOOT flash rom update from WinCE SDK v1.0
712	712	ROM_LOAD_BIOS(1, "set5v1.001.ic507", 0x000000, 0x200000, CRC(5702d38f) SHA1(ea7a3ae1de73683008dd795c252941a4fc81b42e) )
713	713
714	714	// 27C160 EPROM (DIP42) IC??? labeled

trunk/src/mame/drivers/didact.cpp
r253023	r253024
41	41	* \|____________________________________________________________________________________________________________\| \|______ \| _\|\|\|_ \|___________________________________\|
42	42	*
43	43	* _____________________________________________________________________________________________ ___________________________________________________________________________
44		* \|The Didact Mikrodator 6802 CPU board by Lars Björklund 1983 ( ) \| \|The Didact Mikrodator 6802 TB16 board by Lars Björklund 1983 \|
	44	* \|The Didact Mikrodator 6802 CPU board by Lars Bjorklund 1983 ( ) \| \|The Didact Mikrodator 6802 TB16 board by Lars Bj??rklund 1983 \|
45	45	* \| +----= \| \| +-\|\|\|\|\|\|\|-+ ______ \|
46	46	* \| \| = \| \| CA2 Tx \|terminal \| \| () \| \|
47	47	* \| \| = \| \| PA7 Rx +---------+ +----------+ C1nF,<=R18k\| \| \|
r253023	r253024
77	77	*
78	78	* History of Didact
79	79	*------------------
80		* Didact Läromedelsproduktion was started in Linköping in Sweden by Anders Andersson, Arne Kullbjer and
81		* Lars Björklund. They constructed a series of microcomputers for educational purposes such as "Mikrodator 6802",
	80	* Didact Laromedelsproduktion was started in Linkoping in Sweden by Anders Andersson, Arne Kullbjer and
	81	* Lars Bjorklund. They constructed a series of microcomputers for educational purposes such as "Mikrodator 6802",
82	82	* Esselte 100 and the Candela computer for the swedish schools to educate the students in assembly programming
83	83	* and BASIC for electro mechanical applications such as stepper motors, simple process control, buttons
84	84	* and LED:s. Didact designs were marketed by Esselte Studium to the swedish schools. The Candela computer
r253023	r253024
92	92	* http://elektronikforumet.com/forum/download/file.php?id=63988&mode=view
93	93	* http://elektronikforumet.com/forum/viewtopic.php?f=2&t=79576&start=150#p1203915
94	94	*
95		* TODO:
	95	* TODO:
96	96	* Didact designs: mp68a, md6802, md6802v3, Esselte 100, Candela
97	97	* --------------------------------------------------------------------------
98	98	* - Add PCB layouts OK OK
r253023	r253024
110	110	#include "emu.h"
111	111	#include "cpu/m6800/m6800.h"
112	112	#include "machine/6821pia.h" // For all boards
113		#include "video/dm9368.h" // For the mp68a
	113	#include "video/dm9368.h" // For the mp68a
114	114	#include "machine/74145.h" // For the md6802
115	115	// Generated artwork includes
116	116	#include "mp68a.lh"
r253023	r253024
132	132	/* Didact base class */
133	133	class didact_state : public driver_device
134	134	{
135		public:
	135	public:
136	136	didact_state(const machine_config &mconfig, device_type type, const char * tag)
137		: driver_device(mconfig, type, tag)
	137	: driver_device(mconfig, type, tag)
138	138	,m_io_line0(*this, "LINE0")
139	139	,m_io_line1(*this, "LINE1")
140	140	,m_io_line2(*this, "LINE2")
r253023	r253024
166	166	/* Esselte 100 driver class */
167	167	class e100_state : public didact_state
168	168	{
169		public:
	169	public:
170	170	e100_state(const machine_config &mconfig, device_type type, const char * tag)
171		: didact_state(mconfig, type, tag),
	171	: didact_state(mconfig, type, tag),
172	172	m_maincpu(*this, "maincpu"),
173	173	m_pia1(*this, "pia1"),
174	174	m_pia2(*this, "pia2")
175		{ }
	175	{ }
176	176	required_device<m6802_cpu_device> m_maincpu;
177	177	virtual void machine_reset() override { m_maincpu->reset(); LOG(("--->%s()\n", FUNCNAME)); };
178	178	protected:
r253023	r253024
183	183	/* Mikrodator 6802 driver class */
184	184	class md6802_state : public didact_state
185	185	{
186		public:
	186	public:
187	187	md6802_state(const machine_config &mconfig, device_type type, const char * tag)
188		: didact_state(mconfig, type, tag)
	188	: didact_state(mconfig, type, tag)
189	189	,m_maincpu(*this, "maincpu")
190	190	,m_tb16_74145(*this, "tb16_74145")
191	191	,m_segments(0)
192	192	,m_pia1(*this, "pia1")
193	193	,m_pia2(*this, "pia2")
194		{ }
	194	{ }
195	195	required_device<m6802_cpu_device> m_maincpu;
196	196	required_device<ttl74145_device> m_tb16_74145;
197	197	UINT8 m_segments;
r253023	r253024
228	228	LOG(("%s()-->%02x %02x %02x %02x modified by %02x displaying %02x\n", FUNCNAME, m_line0, m_line1, m_line2, m_line3, m_shift, ls145));
229	229	#endif
230	230
231		// Mask out those rows that has a button pressed
	231	// Mask out those rows that has a button pressed
232	232	pa &= ~(((~m_line0 & ls145 ) != 0) ? 1 : 0);
233	233	pa &= ~(((~m_line1 & ls145 ) != 0) ? 2 : 0);
234	234	pa &= ~(((~m_line2 & ls145 ) != 0) ? 4 : 0);
r253023	r253024
236	236
237	237	if (m_shift)
238	238	{
239		pa &= 0x7f; // Clear shift bit if button being pressed (PA7) to ground (internal pullup)
	239	pa &= 0x7f; // Clear shift bit if button being pressed (PA7) to ground (internal pullup)
240	240	LOG( ("SHIFT is pressed\n") );
241	241	}
242	242
r253023	r253024
253	253	{
254	254	UINT8 digit_nbr;
255	255
256		// LOG(("--->%s(%02x)\n", FUNCNAME, data));
	256	// LOG(("--->%s(%02x)\n", FUNCNAME, data));
257	257
258	258	digit_nbr = (data >> 4) & 0x07;
259		m_tb16_74145->write( digit_nbr );
	259	m_tb16_74145->write( digit_nbr );
260	260	if (digit_nbr < 6)
261	261	{
262	262	output().set_digit_value( digit_nbr, m_segments);
r253023	r253024
266	266	/* PIA 2 Port B is all outputs to drive the display so it is very unlikelly that this function is called */
267	267	READ8_MEMBER( md6802_state::pia2_kbB_r )
268	268	{
269		LOG( ("Warning, trying to read from Port B designated to drive the display, please check why\n") );
270		logerror("Warning, trying to read from Port B designated to drive the display, please check why\n");
	269	LOG( ("Warning, trying to read from Port B designated to drive the display, please check why\n") );
	270	logerror("Warning, trying to read from Port B designated to drive the display, please check why\n");
271	271	return 0;
272	272	}
273	273
274	274	/* Port B is fully used ouputting the segment pattern to the display */
275	275	WRITE8_MEMBER( md6802_state::pia2_kbB_w )
276	276	{
277		// LOG(("--->%s(%02x)\n", FUNCNAME, data));
	277	// LOG(("--->%s(%02x)\n", FUNCNAME, data));
278	278
279	279	/* Store the segment pattern but do not lit up the digit here, done by pulling the correct cathode low on Port A */
280	280	m_segments = BITSWAP8(data, 0, 4, 5, 3, 2, 1, 7, 6);
r253023	r253024
299	299	{
300	300	LOG(("--->%s()\n", FUNCNAME));
301	301	m_led = 1;
302		m_maincpu->reset();
	302	m_maincpu->reset();
303	303	}
304	304
305	305	/* Didact mp68a driver class */
r253023	r253024
310	310	#define PIA6820 PIA6821
311	311	class mp68a_state : public didact_state
312	312	{
313		public:
	313	public:
314	314	mp68a_state(const machine_config &mconfig, device_type type, const char * tag)
315		: didact_state(mconfig, type, tag)
	315	: didact_state(mconfig, type, tag)
316	316	,m_maincpu(*this, "maincpu")
317	317	,m_digit0(*this, "digit0")
318	318	,m_digit1(*this, "digit1")
r253023	r253024
322	322	,m_digit5(*this, "digit5")
323	323	,m_pia1(*this, "pia1")
324	324	,m_pia2(*this, "pia2")
325		{ }
	325	{ }
326	326
327	327	required_device<m6800_cpu_device> m_maincpu;
328	328
r253023	r253024
367	367	but we are using data read from the port. */
368	368	digit_nbr = (data >> 4) & 0x07;
369	369
370		/* There is actually only one 9368 and a 74145 to drive the cathode of the right digit low */
371		/* This can be emulated by prentending there are one 9368 per digit, at least for now */
	370	/* There is actually only one 9368 and a 74145 to drive the cathode of the right digit low */
	371	/* This can be emulated by prentending there are one 9368 per digit, at least for now */
372	372	switch (digit_nbr)
373	373	{
374	374	case 0: m_digit0->a_w(data & 0x0f); break;
r253023	r253024
406	406	while (a012 > 0 && !(line & (1 << --a012)));
407	407	}
408	408
409		pb = a012; // A0-A2 -> PB0-PB3
	409	pb = a012; // A0-A2 -> PB0-PB3
410	410
411	411	if (m_shift)
412	412	{
413		pb \|= 0x80; // Set shift bit (PB7)
	413	pb \|= 0x80; // Set shift bit (PB7)
414	414	m_shift = 0; // Reset flip flop
415	415	output().set_led_value(m_led, m_shift);
416	416	LOG( ("SHIFT is released\n") );
r253023	r253024
489	489
490	490	static INPUT_PORTS_START( md6802 )
491	491	PORT_START("LINE0") /* KEY ROW 0 */
492		PORT_BIT(0x01, 0x01, IPT_KEYBOARD) PORT_NAME("0") PORT_CODE(KEYCODE_0) PORT_CHAR('0')
493		PORT_BIT(0x02, 0x02, IPT_KEYBOARD) PORT_NAME("1") PORT_CODE(KEYCODE_1) PORT_CHAR('1')
494		PORT_BIT(0x04, 0x04, IPT_KEYBOARD) PORT_NAME("2") PORT_CODE(KEYCODE_2) PORT_CHAR('2')
495		PORT_BIT(0x08, 0x08, IPT_KEYBOARD) PORT_NAME("3") PORT_CODE(KEYCODE_3) PORT_CHAR('3')
	492	PORT_BIT(0x01, 0x01, IPT_KEYBOARD) PORT_NAME("0") PORT_CODE(KEYCODE_0) PORT_CHAR('0')
	493	PORT_BIT(0x02, 0x02, IPT_KEYBOARD) PORT_NAME("1") PORT_CODE(KEYCODE_1) PORT_CHAR('1')
	494	PORT_BIT(0x04, 0x04, IPT_KEYBOARD) PORT_NAME("2") PORT_CODE(KEYCODE_2) PORT_CHAR('2')
	495	PORT_BIT(0x08, 0x08, IPT_KEYBOARD) PORT_NAME("3") PORT_CODE(KEYCODE_3) PORT_CHAR('3')
496	496	PORT_BIT(0xf0, 0x00, IPT_UNUSED )
497	497
498	498	PORT_START("LINE1") /* KEY ROW 1 */
499		PORT_BIT(0x01, 0x01, IPT_KEYBOARD) PORT_NAME("4") PORT_CODE(KEYCODE_4) PORT_CHAR('4')
500		PORT_BIT(0x02, 0x02, IPT_KEYBOARD) PORT_NAME("5") PORT_CODE(KEYCODE_5) PORT_CHAR('5')
501		PORT_BIT(0x04, 0x04, IPT_KEYBOARD) PORT_NAME("6") PORT_CODE(KEYCODE_6) PORT_CHAR('6')
502		PORT_BIT(0x08, 0x08, IPT_KEYBOARD) PORT_NAME("7") PORT_CODE(KEYCODE_7) PORT_CHAR('7')
	499	PORT_BIT(0x01, 0x01, IPT_KEYBOARD) PORT_NAME("4") PORT_CODE(KEYCODE_4) PORT_CHAR('4')
	500	PORT_BIT(0x02, 0x02, IPT_KEYBOARD) PORT_NAME("5") PORT_CODE(KEYCODE_5) PORT_CHAR('5')
	501	PORT_BIT(0x04, 0x04, IPT_KEYBOARD) PORT_NAME("6") PORT_CODE(KEYCODE_6) PORT_CHAR('6')
	502	PORT_BIT(0x08, 0x08, IPT_KEYBOARD) PORT_NAME("7") PORT_CODE(KEYCODE_7) PORT_CHAR('7')
503	503	PORT_BIT(0xf0, 0x00, IPT_UNUSED )
504	504
505	505	PORT_START("LINE2") /* KEY ROW 2 */
506		PORT_BIT(0x01, 0x01, IPT_KEYBOARD) PORT_NAME("8") PORT_CODE(KEYCODE_8) PORT_CHAR('8')
507		PORT_BIT(0x02, 0x02, IPT_KEYBOARD) PORT_NAME("9") PORT_CODE(KEYCODE_9) PORT_CHAR('9')
508		PORT_BIT(0x04, 0x04, IPT_KEYBOARD) PORT_NAME("A") PORT_CODE(KEYCODE_A) PORT_CHAR('A')
509		PORT_BIT(0x08, 0x08, IPT_KEYBOARD) PORT_NAME("B") PORT_CODE(KEYCODE_B) PORT_CHAR('B')
	506	PORT_BIT(0x01, 0x01, IPT_KEYBOARD) PORT_NAME("8") PORT_CODE(KEYCODE_8) PORT_CHAR('8')
	507	PORT_BIT(0x02, 0x02, IPT_KEYBOARD) PORT_NAME("9") PORT_CODE(KEYCODE_9) PORT_CHAR('9')
	508	PORT_BIT(0x04, 0x04, IPT_KEYBOARD) PORT_NAME("A") PORT_CODE(KEYCODE_A) PORT_CHAR('A')
	509	PORT_BIT(0x08, 0x08, IPT_KEYBOARD) PORT_NAME("B") PORT_CODE(KEYCODE_B) PORT_CHAR('B')
510	510	PORT_BIT(0xf0, 0x00, IPT_UNUSED )
511	511
512	512	PORT_START("LINE3") /* KEY ROW 3 */
513		PORT_BIT(0x01, 0x01, IPT_KEYBOARD) PORT_NAME("C") PORT_CODE(KEYCODE_C) PORT_CHAR('C')
514		PORT_BIT(0x02, 0x02, IPT_KEYBOARD) PORT_NAME("D") PORT_CODE(KEYCODE_D) PORT_CHAR('D')
515		PORT_BIT(0x04, 0x04, IPT_KEYBOARD) PORT_NAME("E") PORT_CODE(KEYCODE_E) PORT_CHAR('E')
516		PORT_BIT(0x08, 0x08, IPT_KEYBOARD) PORT_NAME("F") PORT_CODE(KEYCODE_F) PORT_CHAR('F')
	513	PORT_BIT(0x01, 0x01, IPT_KEYBOARD) PORT_NAME("C") PORT_CODE(KEYCODE_C) PORT_CHAR('C')
	514	PORT_BIT(0x02, 0x02, IPT_KEYBOARD) PORT_NAME("D") PORT_CODE(KEYCODE_D) PORT_CHAR('D')
	515	PORT_BIT(0x04, 0x04, IPT_KEYBOARD) PORT_NAME("E") PORT_CODE(KEYCODE_E) PORT_CHAR('E')
	516	PORT_BIT(0x08, 0x08, IPT_KEYBOARD) PORT_NAME("F") PORT_CODE(KEYCODE_F) PORT_CHAR('F')
517	517	PORT_BIT(0xf0, 0x00, IPT_UNUSED )
518	518
519	519	PORT_START("LINE4") /* Special KEY ROW for reset and Shift/'' keys /
r253023	r253024
524	524
525	525	static INPUT_PORTS_START( mp68a )
526	526	PORT_START("LINE0") /* KEY ROW 0 */
527		PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("C") PORT_CODE(KEYCODE_C) PORT_CHAR('C')
528		PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("D") PORT_CODE(KEYCODE_D) PORT_CHAR('D')
529		PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("E") PORT_CODE(KEYCODE_E) PORT_CHAR('E')
530		PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F") PORT_CODE(KEYCODE_F) PORT_CHAR('F')
	527	PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("C") PORT_CODE(KEYCODE_C) PORT_CHAR('C')
	528	PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("D") PORT_CODE(KEYCODE_D) PORT_CHAR('D')
	529	PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("E") PORT_CODE(KEYCODE_E) PORT_CHAR('E')
	530	PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F") PORT_CODE(KEYCODE_F) PORT_CHAR('F')
531	531	PORT_BIT(0x0f, IP_ACTIVE_HIGH, IPT_UNUSED )
532	532
533	533	PORT_START("LINE1") /* KEY ROW 1 */
534		PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("8") PORT_CODE(KEYCODE_8) PORT_CHAR('8')
535		PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("9") PORT_CODE(KEYCODE_9) PORT_CHAR('9')
536		PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("A") PORT_CODE(KEYCODE_A) PORT_CHAR('A')
537		PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("B") PORT_CODE(KEYCODE_B) PORT_CHAR('B')
	534	PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("8") PORT_CODE(KEYCODE_8) PORT_CHAR('8')
	535	PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("9") PORT_CODE(KEYCODE_9) PORT_CHAR('9')
	536	PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("A") PORT_CODE(KEYCODE_A) PORT_CHAR('A')
	537	PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("B") PORT_CODE(KEYCODE_B) PORT_CHAR('B')
538	538	PORT_BIT(0xf0, IP_ACTIVE_HIGH, IPT_UNUSED )
539	539
540	540	PORT_START("LINE2") /* KEY ROW 2 */
541		PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("4") PORT_CODE(KEYCODE_4) PORT_CHAR('4')
542		PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("5") PORT_CODE(KEYCODE_5) PORT_CHAR('5')
543		PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("6") PORT_CODE(KEYCODE_6) PORT_CHAR('6')
544		PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("7") PORT_CODE(KEYCODE_7) PORT_CHAR('7')
	541	PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("4") PORT_CODE(KEYCODE_4) PORT_CHAR('4')
	542	PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("5") PORT_CODE(KEYCODE_5) PORT_CHAR('5')
	543	PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("6") PORT_CODE(KEYCODE_6) PORT_CHAR('6')
	544	PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("7") PORT_CODE(KEYCODE_7) PORT_CHAR('7')
545	545	PORT_BIT(0x0f, IP_ACTIVE_HIGH, IPT_UNUSED )
546	546
547	547	PORT_START("LINE3") /* KEY ROW 3 */
548		PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("0") PORT_CODE(KEYCODE_0) PORT_CHAR('0')
549		PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("1") PORT_CODE(KEYCODE_1) PORT_CHAR('1')
550		PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("2") PORT_CODE(KEYCODE_2) PORT_CHAR('2')
551		PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("3") PORT_CODE(KEYCODE_3) PORT_CHAR('3')
	548	PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("0") PORT_CODE(KEYCODE_0) PORT_CHAR('0')
	549	PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("1") PORT_CODE(KEYCODE_1) PORT_CHAR('1')
	550	PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("2") PORT_CODE(KEYCODE_2) PORT_CHAR('2')
	551	PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("3") PORT_CODE(KEYCODE_3) PORT_CHAR('3')
552	552	PORT_BIT(0xf0, IP_ACTIVE_HIGH, IPT_UNUSED )
553	553
554	554	PORT_START("LINE4") /* Special KEY ROW for reset and Shift/'' keys /
r253023	r253024
559	559
560	560	TIMER_DEVICE_CALLBACK_MEMBER(didact_state::scan_artwork)
561	561	{
562		// LOG(("--->%s()\n", FUNCNAME));
	562	// LOG(("--->%s()\n", FUNCNAME));
563	563
564	564	// Poll the artwork Reset key
565	565	if ( (m_io_line4->read() & 0x04) )
r253023	r253024
567	567	LOG( ("RESET is pressed, resetting the CPU\n") );
568	568	m_shift = 0;
569	569	output().set_led_value(m_led, m_shift); // For mp68a only
570		if (m_reset == 0)
	570	if (m_reset == 0)
571	571	{
572	572	machine_reset();
573	573	}
574	574	m_reset = 1; // Inhibit multiple resets
575	575	}
576	576
577		// Poll the artwork SHIFT/* key
	577	// Poll the artwork SHIFT/* key
578	578	else if ( (m_io_line4->read() & 0x08) )
579	579	{
580	580	LOG( ("%s", !m_shift ? "SHIFT is set\n" : "") );
r253023	r253024
631	631	MACHINE_CONFIG_END
632	632
633	633	static MACHINE_CONFIG_START( mp68a, mp68a_state )
634		// Clock source is based on a N9602N Dual Retriggerable Resettable Monostable Multivibrator oscillator at aprox 505KHz.
	634	// Clock source is based on a N9602N Dual Retriggerable Resettable Monostable Multivibrator oscillator at aprox 505KHz.
635	635	// Trimpot seems broken/stuck at 5K Ohm thu. ROM code 1Ms delay loops suggest 1MHz+
636		MCFG_CPU_ADD("maincpu", M6800, 505000)
	636	MCFG_CPU_ADD("maincpu", M6800, 505000)
637	637	MCFG_CPU_PROGRAM_MAP(mp68a_map)
638	638	MCFG_DEFAULT_LAYOUT(layout_mp68a)
639	639
r253023	r253024
646	646	/* --init----------------------- */
647	647	/* 0x0BAF 0x601 (Control A) = 0x30 - CA2 is low and enable DDRA */
648	648	/* 0x0BB1 0x603 (Control B) = 0x30 - CB2 is low and enable DDRB */
649		/* 0x0BB5 0x600 (DDR A) = 0xFF - Port A all outputs and set to 0 (zero) */
650		/* 0x0BB9 0x602 (DDR B) = 0x50 - Port B two outputs and set to 0 (zero) */
	649	/* 0x0BB5 0x600 (DDR A) = 0xFF - Port A all outputs and set to 0 (zero) */
	650	/* 0x0BB9 0x602 (DDR B) = 0x50 - Port B two outputs and set to 0 (zero) */
651	651	/* 0x0BBD 0x601 (Control A) = 0x34 - CA2 is low and lock DDRA */
652	652	/* 0x0BBF 0x603 (Control B) = 0x34 - CB2 is low and lock DDRB */
653		/* 0x0BC3 0x602 (Port B) = 0x40 - Turn on display via RBI* on */
	653	/* 0x0BC3 0x602 (Port B) = 0x40 - Turn on display via RBI* on */
654	654	/* --execution-wait for key loop-- */
655		/* 0x086B Update display sequnc, see below */
656		/* 0x0826 CB1 read = 0x603 (Control B) - is a key presssed? */
	655	/* 0x086B Update display sequnc, see below */
	656	/* 0x0826 CB1 read = 0x603 (Control B) - is a key presssed? */
657	657	MCFG_PIA_WRITEPA_HANDLER(WRITE8(mp68a_state, pia2_kbA_w))
658	658	MCFG_PIA_READPA_HANDLER(READ8(mp68a_state, pia2_kbA_r))
659	659	MCFG_PIA_WRITEPB_HANDLER(WRITE8(mp68a_state, pia2_kbB_w))
r253023	r253024
663	663	MCFG_PIA_IRQB_HANDLER(DEVWRITELINE("maincpu", m6800_cpu_device, irq_line)) /* Not used by ROM. Combined trace to CPU IRQ with IRQA */
664	664
665	665	/* Display - sequence outputting all '0':s at start */
666		/* 0x086B 0x600 (Port A) = 0x00 */
667		/* 0x086B 0x600 (Port A) = 0x70 */
668		/* 0x086B 0x600 (Port A) = 0x10 */
669		/* 0x086B 0x600 (Port A) = 0x70 */
670		/* 0x086B 0x600 (Port A) = 0x20 */
671		/* 0x086B 0x600 (Port A) = 0x70 */
672		/* 0x086B 0x600 (Port A) = 0x30 */
673		/* 0x086B 0x600 (Port A) = 0x70 */
674		/* 0x086B 0x600 (Port A) = 0x40 */
675		/* 0x086B 0x600 (Port A) = 0x70 */
676		/* 0x086B 0x600 (Port A) = 0x50 */
677		/* 0x086B 0x600 (Port A) = 0x70 */
	666	/* 0x086B 0x600 (Port A) = 0x00 */
	667	/* 0x086B 0x600 (Port A) = 0x70 */
	668	/* 0x086B 0x600 (Port A) = 0x10 */
	669	/* 0x086B 0x600 (Port A) = 0x70 */
	670	/* 0x086B 0x600 (Port A) = 0x20 */
	671	/* 0x086B 0x600 (Port A) = 0x70 */
	672	/* 0x086B 0x600 (Port A) = 0x30 */
	673	/* 0x086B 0x600 (Port A) = 0x70 */
	674	/* 0x086B 0x600 (Port A) = 0x40 */
	675	/* 0x086B 0x600 (Port A) = 0x70 */
	676	/* 0x086B 0x600 (Port A) = 0x50 */
	677	/* 0x086B 0x600 (Port A) = 0x70 */
678	678	MCFG_DEVICE_ADD("digit0", DM9368, 0)
679	679	MCFG_OUTPUT_INDEX(0)
680	680	MCFG_DEVICE_ADD("digit1", DM9368, 0)
r253023	r253024
715	715	ROM_END
716	716
717	717	// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
718		COMP( 1979, mp68a, 0, 0, mp68a, mp68a, driver_device, 0, "Didact AB", "mp68a", MACHINE_NO_SOUND_HW )
719		COMP( 1982, e100, 0, 0, e100, e100, driver_device, 0, "Didact AB", "Esselte 100", MACHINE_IS_SKELETON )
720		COMP( 1983, md6802, 0, 0, md6802, md6802, driver_device, 0, "Didact AB", "Mikrodator 6802", MACHINE_NO_SOUND_HW )
	718	COMP( 1979, mp68a, 0, 0, mp68a, mp68a, driver_device, 0, "Didact AB", "mp68a", MACHINE_NO_SOUND_HW )
	719	COMP( 1982, e100, 0, 0, e100, e100, driver_device, 0, "Didact AB", "Esselte 100", MACHINE_IS_SKELETON )
	720	COMP( 1983, md6802, 0, 0, md6802, md6802, driver_device, 0, "Didact AB", "Mikrodator 6802", MACHINE_NO_SOUND_HW )

trunk/src/mame/drivers/dynax.cpp
r253023	r253024
4334	4334	{
4335	4335	UINT8 *ROM = memregion("maincpu")->base();
4336	4336	int bank_n = (memregion("maincpu")->bytes() - 0x10000) / 0x8000;
4337
	4337
4338	4338	m_hnoridur_ptr = &ROM[0x10000 + 0x18 * 0x8000];
4339	4339	save_pointer(NAME(m_hnoridur_ptr), 0x8000);
4340	4340

trunk/src/mame/drivers/fastinvaders.cpp
r253023	r253024
36	36	required_device<cpu_device> m_maincpu;
37	37	required_device<gfxdecode_device> m_gfxdecode;
38	38	required_shared_ptr<UINT8> m_videoram;
39
	39
40	40	optional_device<i8275_device> m_crtc8275;
41	41	optional_device<mc6845_device> m_crtc6845;
42	42	required_device<pic8259_device> m_pic8259;
r253023	r253024
52	52	UINT8 m_scudi;
53	53	UINT8 m_cannone;
54	54	UINT8 m_riga_inf;
55
	55
56	56	UINT8 m_irq0;
57	57	UINT8 m_irq1;
58	58	UINT8 m_irq2;
r253023	r253024
61	61	UINT8 m_irq5;
62	62	UINT8 m_irq6;
63	63	UINT8 m_irq7;
64
65
	64
	65
66	66	UINT8 m_start2_value;
67	67	UINT8 m_dma1;
68	68	UINT8 m_io_40;
69	69	UINT8 m_hsync;
70
	70
71	71	DECLARE_WRITE8_MEMBER(io_40_w);
72
	72
73	73	DECLARE_READ8_MEMBER(io_60_r);
74	74	DECLARE_WRITE8_MEMBER(io_70_w);
75	75	DECLARE_WRITE8_MEMBER(io_90_w);
r253023	r253024
79	79	DECLARE_WRITE8_MEMBER(io_d0_w);
80	80	DECLARE_WRITE8_MEMBER(io_e0_w);
81	81	DECLARE_WRITE8_MEMBER(io_f0_w);
82
83
84		DECLARE_INPUT_CHANGED_MEMBER(coin_inserted);
85		DECLARE_INPUT_CHANGED_MEMBER(start);
86		DECLARE_INPUT_CHANGED_MEMBER(start2);
87		DECLARE_INPUT_CHANGED_MEMBER(tilt);
88		DECLARE_INPUT_CHANGED_MEMBER(in0);
89		DECLARE_INPUT_CHANGED_MEMBER(in1);
90		DECLARE_INPUT_CHANGED_MEMBER(in2);
91		DECLARE_INPUT_CHANGED_MEMBER(in3);
92		DECLARE_INPUT_CHANGED_MEMBER(in4);
93		DECLARE_INPUT_CHANGED_MEMBER(in5);
94		DECLARE_INPUT_CHANGED_MEMBER(in6);
95
	82
	83
	84	DECLARE_INPUT_CHANGED_MEMBER(coin_inserted);
	85	DECLARE_INPUT_CHANGED_MEMBER(start);
	86	DECLARE_INPUT_CHANGED_MEMBER(start2);
	87	DECLARE_INPUT_CHANGED_MEMBER(tilt);
	88	DECLARE_INPUT_CHANGED_MEMBER(in0);
	89	DECLARE_INPUT_CHANGED_MEMBER(in1);
	90	DECLARE_INPUT_CHANGED_MEMBER(in2);
	91	DECLARE_INPUT_CHANGED_MEMBER(in3);
	92	DECLARE_INPUT_CHANGED_MEMBER(in4);
	93	DECLARE_INPUT_CHANGED_MEMBER(in5);
	94	DECLARE_INPUT_CHANGED_MEMBER(in6);
	95
96	96	DECLARE_READ_LINE_MEMBER(sid_read);
97	97
98
	98
99	99	virtual void video_start() override;
100	100
101	101	TIMER_DEVICE_CALLBACK_MEMBER(scanline_timer);
r253023	r253024
107	107	DECLARE_WRITE8_MEMBER(dark_1_clr);
108	108	DECLARE_WRITE8_MEMBER(dark_2_clr);
109	109	UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
110
111
	110
	111
112	112	DECLARE_DRIVER_INIT(fi6845);
113
	113
114	114	};
115	115
116	116
117	117	TIMER_DEVICE_CALLBACK_MEMBER(fastinvaders_state::scanline_timer)
118	118	{
119		/* int scanline = param;
	119	/* int scanline = param;
120	120
121	121
122	122
123	123
124		if(scanline == 16){
125		//logerror("scanline\n");
126		m_dma8257->dreq1_w(0x01);
127		m_dma8257->hlda_w(1);
128		}
129		*/
	124	if(scanline == 16){
	125	//logerror("scanline\n");
	126	m_dma8257->dreq1_w(0x01);
	127	m_dma8257->hlda_w(1);
	128	}
	129	*/
130	130	}
131	131
132	132	TIMER_DEVICE_CALLBACK_MEMBER(fastinvaders_state::count_ar)
133	133	{
134	134	if (m_ar<255){
135
136	135	m_riga_sup= ((m_prom[m_ar]&0x08)>>3)&0x01;
137		m_scudi= ((m_prom[m_ar]&0x04)>>2)&0x01;
138		m_cannone= ((m_prom[m_ar]&0x02)>>1)&0x01;
	136	m_scudi= ((m_prom[m_ar]&0x04)>>2)&0x01;
	137	m_cannone= ((m_prom[m_ar]&0x02)>>1)&0x01;
139	138	m_riga_inf= ((m_prom[m_ar]&0x01))&0x01;
140	139	//logerror("m_ar = %02X m_riga_sup %02X, m_scudi %02X, m_cannone %02X, m_riga_inf %02X\n",m_ar,m_riga_sup,m_scudi,m_cannone,m_riga_inf);
141
	140
142	141	if(m_riga_sup==0x01){
143	142	if(((m_prom[m_ar-1]&0x08)>>3)==0x01){
144		//logerror(" DMA1 \n");
	143	//logerror(" DMA1 \n");
145	144	//logerror("m_prom[m_ar]=%d m_prom[m_ar-1]= %d ar = %d r_s %d, sc %d, ca %d, ri %d\n",m_prom[m_ar],m_prom[m_ar-1],m_ar,m_riga_sup,m_scudi,m_cannone,m_riga_inf);
146	145	m_dma8257->dreq1_w(0x01);
147	146	m_dma8257->hlda_w(1);
r253023	r253024
151	150	}
152	151	m_ar++;
153	152	}
154
	153
155	154	if (m_av<255){
156	155	m_av++;
157	156	//logerror("m_av=%02X\n",m_av);
158	157	if (m_av == m_io_40){
159	158	if (m_hsync==1){
160		logerror(" DMA2 \n");
	159	logerror(" DMA2 \n");
161	160	m_dma8257->dreq2_w(0x01);
162	161	m_dma8257->hlda_w(1);
163	162	//m_pic8259->ir3_w(HOLD_LINE);
164	163	}
165
	164
166	165	}
167		}
	166	}
168	167	}
169	168
170	169	WRITE8_MEMBER(fastinvaders_state::dark_1_clr)
r253023	r253024
176	175	if(!data){
177	176	m_dma1=0;
178	177	}
179
	178
180	179	//logerror("dma 1 clr\n");
181	180	//m_maincpu->set_input_line(I8085_RST75_LINE, ASSERT_LINE);
182	181	//m_maincpu->set_input_line(I8085_RST75_LINE, CLEAR_LINE);
r253023	r253024
190	189	if(data){
191	190	m_dma8257->dreq2_w(0x00);
192	191	}
193		/* if(!data){
194		m_dma1=0;
195		}
196		*/
	192	/* if(!data){
	193	m_dma1=0;
	194	}
	195	*/
197	196	}
198	197
199	198	/***************************************************************************
r253023	r253024
231	230	);
232	231
233	232	count++;
234
	233
235	234	}
236	235
237	236	}
r253023	r253024
256	255	{
257	256	UINT8 tmp=0;
258	257	//0x60 ds6 input bit 0 DX or SX
259		// bit 1 DX or SX
260		// bit 2-7 dip switch
	258	// bit 1 DX or SX
	259	// bit 2-7 dip switch
261	260
262	261	tmp=ioport("IN1")->read()&0x03;
263	262	tmp=tmp \| (ioport("DSW1")->read()&0xfc);
r253023	r253024
269	268
270	269	WRITE8_MEMBER(fastinvaders_state::io_70_w)
271	270	{
272		//bit 0 rest55 clear
	271	//bit 0 rest55 clear
273	272	//bit 1 rest65 clear
274	273	//bit 2 trap clear
275		//bit 3 coin counter
	274	//bit 3 coin counter
276	275
277	276	//bit 4 irq0 clear
278		//bit 5 8085 reset
279		//bit 6 TODO
280		//bit 7 both used TODO
	277	//bit 5 8085 reset
	278	//bit 6 TODO
	279	//bit 7 both used TODO
281	280
282	281	//IRQ clear
283	282	if (data&0x01){
r253023	r253024
285	284	m_maincpu->set_input_line(I8085_RST55_LINE, CLEAR_LINE);
286	285	}
287	286	if (data&0x02){
288
289	287	if (m_rest65){
290	288	//logerror("clear");
291	289	m_rest65=0;
292	290	m_maincpu->set_input_line(I8085_RST65_LINE, CLEAR_LINE);
293	291	}
294		}
	292	}
295	293	if (data&0x04){
296	294	m_trap=0;
297	295	m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
298		}
	296	}
299	297	if (data&0x10){
300	298	m_irq0=0;
301	299	m_pic8259->ir0_w(CLEAR_LINE);
302		}
	300	}
303	301
304	302	//self reset
305	303	if (data&0x20){
306	304	logerror("RESET!!!!!\n");
307		}
	305	}
308	306
309
	307
310	308	//coin counter
311		// if (data&0x08){
312		// coin_counter_w(machine(), offset,0x01);
313		// }
	309	// if (data&0x08){
	310	// coin_counter_w(machine(), offset,0x01);
	311	// }
314	312
315	313	}
316	314
r253023	r253024
355	353	{
356	354	UINT8 tmp= m_start2_value ? ASSERT_LINE : CLEAR_LINE;
357	355	m_start2_value=0;
358		return tmp;
	356	return tmp;
359	357	}
360	358
361	359	INPUT_CHANGED_MEMBER(fastinvaders_state::tilt)
r253023	r253024
420	418	INPUT_CHANGED_MEMBER(fastinvaders_state::in4)
421	419	{
422	420	m_irq4=1;
423		if (newval)
	421	if (newval)
424	422	m_pic8259->ir4_w(HOLD_LINE);
425	423	}
426	424
r253023	r253024
434	432	INPUT_CHANGED_MEMBER(fastinvaders_state::in6)
435	433	{
436	434	m_irq6=1;
437		if (newval)
	435	if (newval)
438	436	m_pic8259->ir6_w(HOLD_LINE);
439	437	}
440	438
r253023	r253024
447	445	if (!state){
448	446	m_dma8257->dreq0_w(0x01);
449	447	m_dma8257->hlda_w(1);
450
	448
451	449	m_maincpu->set_input_line(I8085_RST75_LINE, ASSERT_LINE);
452	450	m_maincpu->set_input_line(I8085_RST75_LINE, CLEAR_LINE);
453	451	//machine().scheduler().abort_timeslice(); // transfer occurs immediately
r253023	r253024
456	454	}
457	455
458	456	if (state){
459
460		}
	457	}
461	458	}
462	459
463	460	DECLARE_WRITE_LINE_MEMBER( fastinvaders_state::hsync)
r253023	r253024
470	467
471	468	if (state){
472	469	m_hsync=1;
473		}
	470	}
474	471	}
475	472
476	473
r253023	r253024
503	500	***************************************************************************/
504	501
505	502	static ADDRESS_MAP_START( fastinvaders_map, AS_PROGRAM, 8, fastinvaders_state )
506		//AM_RANGE(0x0000, 0x1fff) AM_ROM AM_MIRROR(0x8000)
507		AM_RANGE(0x0000, 0x27ff) AM_ROM AM_MIRROR(0x8000)
	503	//AM_RANGE(0x0000, 0x1fff) AM_ROM AM_MIRROR(0x8000)
	504	AM_RANGE(0x0000, 0x27ff) AM_ROM AM_MIRROR(0x8000)
508	505	AM_RANGE(0x2800, 0x2fff) AM_RAM AM_MIRROR(0x8000) AM_SHARE("videoram")
509	506	AM_RANGE(0x3000, 0x33ff) AM_RAM AM_MIRROR(0x8000)
510	507	ADDRESS_MAP_END
r253023	r253024
517	514	AM_RANGE(0x20, 0x20) AM_DEVWRITE("6845", mc6845_device, address_w)
518	515	AM_RANGE(0x21, 0x21) AM_DEVREADWRITE("6845", mc6845_device, register_r, register_w)
519	516	AM_RANGE(0x30, 0x33) AM_DEVREADWRITE("pic8259", pic8259_device, read, write)
520		AM_RANGE(0x40, 0x4f) AM_WRITE(io_40_w) //ds4 //latch
521		//AM_RANGE(0x50, 0x50) AM_READ(io_50_r) //ds5 //latch
	517	AM_RANGE(0x40, 0x4f) AM_WRITE(io_40_w) //ds4 //latch
	518	//AM_RANGE(0x50, 0x50) AM_READ(io_50_r) //ds5 //latch
522	519	AM_RANGE(0x60, 0x60) AM_READ(io_60_r)
523		AM_RANGE(0x70, 0x70) AM_WRITE(io_70_w) //ds7 rest55,rest65,trap, irq0 clear
524		AM_RANGE(0x80, 0x80) AM_NOP //ds8 write here a LOT ?????
525		AM_RANGE(0x90, 0x90) AM_WRITE(io_90_w) //ds9 sound command
526		AM_RANGE(0xa0, 0xa0) AM_WRITE(io_a0_w) //ds10 irq1 clear
527		AM_RANGE(0xb0, 0xb0) AM_WRITE(io_b0_w) //ds11 irq2 clear
528		AM_RANGE(0xc0, 0xc0) AM_WRITE(io_c0_w) //ds12 irq3 clear
529		AM_RANGE(0xd0, 0xd0) AM_WRITE(io_d0_w) //ds13 irq5 clear
530		AM_RANGE(0xe0, 0xe0) AM_WRITE(io_e0_w) //ds14 irq4 clear
531		AM_RANGE(0xf0, 0xf0) AM_WRITE(io_f0_w) //ds15 irq6 clear
532
	520	AM_RANGE(0x70, 0x70) AM_WRITE(io_70_w) //ds7 rest55,rest65,trap, irq0 clear
	521	AM_RANGE(0x80, 0x80) AM_NOP //ds8 write here a LOT ?????
	522	AM_RANGE(0x90, 0x90) AM_WRITE(io_90_w) //ds9 sound command
	523	AM_RANGE(0xa0, 0xa0) AM_WRITE(io_a0_w) //ds10 irq1 clear
	524	AM_RANGE(0xb0, 0xb0) AM_WRITE(io_b0_w) //ds11 irq2 clear
	525	AM_RANGE(0xc0, 0xc0) AM_WRITE(io_c0_w) //ds12 irq3 clear
	526	AM_RANGE(0xd0, 0xd0) AM_WRITE(io_d0_w) //ds13 irq5 clear
	527	AM_RANGE(0xe0, 0xe0) AM_WRITE(io_e0_w) //ds14 irq4 clear
	528	AM_RANGE(0xf0, 0xf0) AM_WRITE(io_f0_w) //ds15 irq6 clear
	529
533	530	AM_IMPORT_FROM(fastinvaders_io_base)
534	531	ADDRESS_MAP_END
535	532
536	533
537	534	static ADDRESS_MAP_START( fastinvaders_8275_io, AS_IO, 8, fastinvaders_state )
538		AM_RANGE( 0x20, 0x21 ) AM_DEVREADWRITE("8275", i8275_device, read, write)
539
540		AM_RANGE(0x10, 0x1f) AM_DEVREADWRITE("dma8257", i8257_device, read, write)
	535	AM_RANGE( 0x20, 0x21 ) AM_DEVREADWRITE("8275", i8275_device, read, write)
	536
	537	AM_RANGE(0x10, 0x1f) AM_DEVREADWRITE("dma8257", i8257_device, read, write)
541	538	AM_RANGE(0x30, 0x33) AM_DEVREADWRITE("pic8259", pic8259_device, read, write)
542		AM_RANGE(0x40, 0x4f) AM_WRITE(io_40_w) //ds4 //latch
543		//AM_RANGE(0x50, 0x50) AM_READ(io_50_r) //ds5 //latch
	539	AM_RANGE(0x40, 0x4f) AM_WRITE(io_40_w) //ds4 //latch
	540	//AM_RANGE(0x50, 0x50) AM_READ(io_50_r) //ds5 //latch
544	541	AM_RANGE(0x60, 0x60) AM_READ(io_60_r)
545		AM_RANGE(0x70, 0x70) AM_WRITE(io_70_w) //ds7 rest55,rest65,trap, irq0 clear
546		AM_RANGE(0x80, 0x80) AM_NOP //write here a LOT
547		//AM_RANGE(0x80, 0x80) AM_WRITE(io_80_w) //ds8 ????
548		AM_RANGE(0x90, 0x90) AM_WRITE(io_90_w) //ds9 sound command
549		AM_RANGE(0xa0, 0xa0) AM_WRITE(io_a0_w) //ds10 irq1 clear
550		AM_RANGE(0xb0, 0xb0) AM_WRITE(io_b0_w) //ds11 irq2 clear
551		AM_RANGE(0xc0, 0xc0) AM_WRITE(io_c0_w) //ds12 irq3 clear
552		AM_RANGE(0xd0, 0xd0) AM_WRITE(io_d0_w) //ds13 irq5 clear
553		AM_RANGE(0xe0, 0xe0) AM_WRITE(io_e0_w) //ds14 irq4 clear
554		AM_RANGE(0xf0, 0xf0) AM_WRITE(io_f0_w) //ds15 irq6 clear
	542	AM_RANGE(0x70, 0x70) AM_WRITE(io_70_w) //ds7 rest55,rest65,trap, irq0 clear
	543	AM_RANGE(0x80, 0x80) AM_NOP //write here a LOT
	544	//AM_RANGE(0x80, 0x80) AM_WRITE(io_80_w) //ds8 ????
	545	AM_RANGE(0x90, 0x90) AM_WRITE(io_90_w) //ds9 sound command
	546	AM_RANGE(0xa0, 0xa0) AM_WRITE(io_a0_w) //ds10 irq1 clear
	547	AM_RANGE(0xb0, 0xb0) AM_WRITE(io_b0_w) //ds11 irq2 clear
	548	AM_RANGE(0xc0, 0xc0) AM_WRITE(io_c0_w) //ds12 irq3 clear
	549	AM_RANGE(0xd0, 0xd0) AM_WRITE(io_d0_w) //ds13 irq5 clear
	550	AM_RANGE(0xe0, 0xe0) AM_WRITE(io_e0_w) //ds14 irq4 clear
	551	AM_RANGE(0xf0, 0xf0) AM_WRITE(io_f0_w) //ds15 irq6 clear
555	552	AM_IMPORT_FROM(fastinvaders_io_base)
556	553	ADDRESS_MAP_END
557	554
r253023	r253024
565	562
566	563	static INPUT_PORTS_START( fastinvaders )
567	564
568		PORT_START("COIN") /* FAKE async input */
569		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state, coin_inserted, 0) //I8085_RST65_LINE
570		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state, start, 0) //I8085_RST55_LINE
571		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START2 ) PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state, start2, 0) //I8085_RST55_LINE
572		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Z) PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state,in0, 0) // int0, sparo
573		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_X) PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state,tilt, 0) //INPUT_LINE_NMI tilt
574
	565	PORT_START("COIN") /* FAKE async input */
	566	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state, coin_inserted, 0) //I8085_RST65_LINE
	567	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state, start, 0) //I8085_RST55_LINE
	568	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START2 ) PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state, start2, 0) //I8085_RST55_LINE
	569	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Z) PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state,in0, 0) // int0, sparo
	570	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_X) PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state,tilt, 0) //INPUT_LINE_NMI tilt
575	571
	572
576	573	PORT_START("IN0")
577
	574
578	575	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_S) PORT_NAME("1") PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state,in1, 0)
579	576	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_D) PORT_NAME("2") PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state,in2, 0)
580	577	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_F) PORT_NAME("3") PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state,in3, 0)
581	578	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_G) PORT_NAME("4") PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state,in4, 0)
582	579	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_H) PORT_NAME("5") PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state,in5, 0)
583	580	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_J) PORT_NAME("6") PORT_CHANGED_MEMBER(DEVICE_SELF, fastinvaders_state,in6, 0)
584
585
586		PORT_START("IN1") //0x60 io port
	581
	582
	583	PORT_START("IN1") //0x60 io port
587	584	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_COCKTAIL
588	585	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL
589	586
590
591		PORT_START("DSW1") //0x60 io port
	587
	588	PORT_START("DSW1") //0x60 io port
592	589	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
593	590	PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
594	591	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
r253023	r253024
598	595	PORT_DIPNAME( 0xf0, 0x80, "Ships/lives number" )
599	596	PORT_DIPSETTING( 0x10, "1 Ship" )
600	597	PORT_DIPSETTING( 0x20, "2 Ships" )
601		PORT_DIPSETTING( 0x30, "3 Ships" )
	598	PORT_DIPSETTING( 0x30, "3 Ships" )
602	599	PORT_DIPSETTING( 0x40, "4 Ships" )
603		PORT_DIPSETTING( 0x50, "5 Ships" )
604		PORT_DIPSETTING( 0x60, "6 Ships" )
605		PORT_DIPSETTING( 0x70, "7 Ships" )
606		PORT_DIPSETTING( 0x80, "8 Ships" )
607		PORT_DIPSETTING( 0x90, "9 Ships" )
608
	600	PORT_DIPSETTING( 0x50, "5 Ships" )
	601	PORT_DIPSETTING( 0x60, "6 Ships" )
	602	PORT_DIPSETTING( 0x70, "7 Ships" )
	603	PORT_DIPSETTING( 0x80, "8 Ships" )
	604	PORT_DIPSETTING( 0x90, "9 Ships" )
609	605
610
	606
	607
611	608	INPUT_PORTS_END
612	609
613	610
r253023	r253024
637	634	/* basic machine hardware */
638	635	MCFG_CPU_ADD("maincpu", I8085A, 6144100/2 ) // 6144100 Xtal /2 internaly
639	636	MCFG_CPU_PROGRAM_MAP(fastinvaders_map)
640		// MCFG_CPU_IO_MAP(fastinvaders_io_map)
641		// MCFG_CPU_VBLANK_INT_DRIVER("screen", fastinvaders_state, irq0_line_hold)
642		MCFG_I8085A_SID(READLINE(fastinvaders_state, sid_read))
	637	// MCFG_CPU_IO_MAP(fastinvaders_io_map)
	638	// MCFG_CPU_VBLANK_INT_DRIVER("screen", fastinvaders_state, irq0_line_hold)
	639	MCFG_I8085A_SID(READLINE(fastinvaders_state, sid_read))
643	640	MCFG_CPU_IRQ_ACKNOWLEDGE_DEVICE("pic8259", pic8259_device, inta_cb)
644	641	MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", fastinvaders_state, scanline_timer, "screen", 0, 1)
645
	642
646	643	MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NULL)
647	644
648	645	MCFG_DEVICE_ADD("dma8257", I8257, 6144100)
r253023	r253024
650	647	MCFG_I8257_OUT_MEMW_CB(WRITE8(fastinvaders_state, memory_write_byte))
651	648	MCFG_I8257_OUT_DACK_1_CB(WRITE8(fastinvaders_state, dark_1_clr))
652	649	MCFG_I8257_OUT_DACK_2_CB(WRITE8(fastinvaders_state, dark_2_clr))
653
654
	650
	651
655	652	MCFG_TIMER_DRIVER_ADD_PERIODIC("count_ar", fastinvaders_state, count_ar, attotime::from_hz(11500000/2))
656
	653
657	654	/* video hardware */
658	655	MCFG_SCREEN_ADD("screen", RASTER)
659	656	MCFG_SCREEN_REFRESH_RATE(60)
660	657	MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500))
661		MCFG_SCREEN_SIZE(6416, 3216)
662		MCFG_SCREEN_VISIBLE_AREA(016, 4016-1, 014, 1914-1)
	658	MCFG_SCREEN_SIZE(6416, 3216)
	659	MCFG_SCREEN_VISIBLE_AREA(016, 4016-1, 014, 1914-1)
663	660	MCFG_SCREEN_UPDATE_DRIVER(fastinvaders_state, screen_update)
664	661	MCFG_SCREEN_PALETTE("palette")
665	662
r253023	r253024
673	670	static MACHINE_CONFIG_DERIVED( fastinvaders_8275, fastinvaders )
674	671	MCFG_CPU_MODIFY("maincpu" ) // guess
675	672	MCFG_CPU_IO_MAP(fastinvaders_8275_io)
676
	673
677	674	MCFG_DEVICE_ADD("8275", I8275, 10000000 ) /* guess */ // does not configure a very useful resolution(!)
678	675	MCFG_I8275_CHARACTER_WIDTH(16)
679		// MCFG_I8275_DRAW_CHARACTER_CALLBACK_OWNER(apogee_state, display_pixels)
680		// MCFG_I8275_DRQ_CALLBACK(DEVWRITELINE("dma8257",i8257_device, dreq2_w))
	676	// MCFG_I8275_DRAW_CHARACTER_CALLBACK_OWNER(apogee_state, display_pixels)
	677	// MCFG_I8275_DRQ_CALLBACK(DEVWRITELINE("dma8257",i8257_device, dreq2_w))
681	678	MACHINE_CONFIG_END
682	679
683	680	static MACHINE_CONFIG_DERIVED( fastinvaders_6845, fastinvaders )
r253023	r253024
736	733	ROM_LOAD( "R2.2A", 0x2400, 0x0200, CRC(f446ef0d) SHA1(2be337c1197d14e5ffc33ea05b5262f1ea17d442) )
737	734	ROM_LOAD( "R2.2B", 0x2600, 0x0200, CRC(b97e35a3) SHA1(0878a83c7f9f0645749fdfb1ff372d0e04833c9e) )
738	735
739
	736
740	737	ROM_REGION( 0x0c00, "gfx1", 0 )
741	738	ROM_LOAD( "C2.1F", 0x0000, 0x0200, CRC(9feca88a) SHA1(14a8c46eb51eed01b7b537a9931cd092cec2019f) )
742	739	ROM_LOAD( "C2.1G", 0x0200, 0x0200, CRC(79fc3963) SHA1(25651d1031895a01a2a4751b355ff1200a899ac5) )
r253023	r253024
744	741	ROM_LOAD( "C2.2F", 0x0600, 0x0200, CRC(3bb16f55) SHA1(b1cc1e2346acd0e5c84861b414b4677871079844) )
745	742	ROM_LOAD( "C2.2G", 0x0800, 0x0200, CRC(19828c47) SHA1(f215ce55be32b3564e1b7cc19500d38a93117051) )
746	743	ROM_LOAD( "C2.2H", 0x0a00, 0x0200, CRC(284ae4eb) SHA1(6e28fcd9d481d37f47728f22f6048b29266f4346) )
747
	744
748	745	ROM_REGION( 0x0100, "prom", 0 )
749	746	ROM_LOAD( "93427.bin", 0x0000, 0x0100, CRC(f59c8573) SHA1(5aed4866abe1690fd0f088af1cfd99b3c85afe9a) )
750	747	ROM_END
r253023	r253024
774	771	ROM_LOAD( "C1.1A", 0x0600, 0x0200, CRC(3bb16f55) SHA1(b1cc1e2346acd0e5c84861b414b4677871079844) )
775	772	ROM_LOAD( "C1.2A", 0x0800, 0x0200, CRC(19828c47) SHA1(f215ce55be32b3564e1b7cc19500d38a93117051) )
776	773	ROM_LOAD( "C1.3A", 0x0a00, 0x0200, CRC(284ae4eb) SHA1(6e28fcd9d481d37f47728f22f6048b29266f4346) )
777
	774
778	775	ROM_REGION( 0x0100, "prom", 0 )
779	776	ROM_LOAD( "93427.bin", 0x0000, 0x0100, CRC(f59c8573) SHA1(5aed4866abe1690fd0f088af1cfd99b3c85afe9a) )
780	777	ROM_END
781	778
782		/* YEAR NAME PARENT MACHINE INPUT STATE INIT ROT COMPANY FULLNAME FLAGS*/
	779	/* YEAR NAME PARENT MACHINE INPUT STATE INIT ROT COMPANY FULLNAME FLAGS*/
783	780	GAME( 1979, fi6845, 0, fastinvaders_6845, fastinvaders, fastinvaders_state, fi6845, ROT270, "Fiberglass", "Fast Invaders (6845 version)", MACHINE_NOT_WORKING \| MACHINE_NO_SOUND )
784		GAME( 1979, fi8275, fi6845, fastinvaders_8275, fastinvaders, fastinvaders_state,fi6845, ROT270, "Fiberglass", "Fast Invaders (8275 version)", MACHINE_NOT_WORKING \| MACHINE_NO_SOUND )
		No newline at end of file
	781	GAME( 1979, fi8275, fi6845, fastinvaders_8275, fastinvaders, fastinvaders_state,fi6845, ROT270, "Fiberglass", "Fast Invaders (8275 version)", MACHINE_NOT_WORKING \| MACHINE_NO_SOUND )

trunk/src/mame/drivers/fidel6502.cpp
r253023	r253024
1	1	// license:BSD-3-Clause
2	2	// copyright-holders:Kevin Horton,Jonathan Gevaryahu,Sandro Ronco,hap
3	3	/******************************************************************************
4
	4
5	5	Fidelity Electronics 6502 based board driver
6	6	See drivers/fidelz80.cpp for hardware description
7	7
r253023	r253024
77	77	{
78	78	// 7442 output, also update input mux (9 is unused)
79	79	m_inp_mux = (1 << m_led_select) & 0x1ff;
80
	80
81	81	// 4 7seg leds + H
82	82	for (int i = 0; i < 4; i++)
83	83	{
84	84	m_display_segmask[i] = 0x7f;
85	85	m_display_state[i] = (m_inp_mux >> i & 1) ? m_7seg_data : 0;
86	86	}
87
	87
88	88	// 8*8 chessboard leds
89	89	for (int i = 0; i < 8; i++)
90	90	m_display_state[i+4] = (m_inp_mux >> i & 1) ? m_led_data : 0;
r253023	r253024
136	136	// d5: button row 8 (active low)
137	137	if (!(read_inputs(9) & 0x100))
138	138	data \|= 0x20;
139
	139
140	140	// d6,d7: language switches
141	141	data\|=0xc0;
142	142
r253023	r253024
228	228
229	229	// 7442 9: speaker out
230	230	m_speaker->level_w(sel >> 9 & 1);
231
	231
232	232	// d6,d7: led select (active low)
233	233	display_matrix(9, 2, sel & 0x1ff, ~data >> 6 & 3);
234
	234
235	235	// d4,d5: printer
236	236	//..
237	237	}

trunk/src/mame/drivers/fidelz80.cpp
r253023	r253024
1	1	// license:BSD-3-Clause
2	2	// copyright-holders:Kevin Horton,Jonathan Gevaryahu,Sandro Ronco,hap
3	3	/******************************************************************************
4
	4
5	5	Fidelity Electronics Z80 based board driver
6	6	for 6502 based boards, see drivers/fidel6502.cpp
7	7
r253023	r253024
897	897	{
898	898	// when RE button is directly wired to RESET pin(s)
899	899	m_maincpu->set_input_line(INPUT_LINE_RESET, newval ? ASSERT_LINE : CLEAR_LINE);
900
	900
901	901	if (m_mcu)
902	902	m_mcu->set_input_line(INPUT_LINE_RESET, newval ? ASSERT_LINE : CLEAR_LINE);
903	903	}
r253023	r253024
917	917	// 4 7seg leds
918	918	for (int i = 0; i < 4; i++)
919	919	m_display_segmask[i] = 0x7f;
920
	920
921	921	// note: sel d0 for extra leds
922	922	UINT8 outdata = (m_7seg_data & 0x7f) \| (m_led_select << 7 & 0x80);
923	923	display_matrix(8, 4, outdata, m_led_select >> 2 & 0xf);
r253023	r253024
1016	1016	m_display_segmask[i] = 0x7f;
1017	1017	m_display_state[i] = (m_led_select >> i & 1) ? m_7seg_data : 0;
1018	1018	}
1019
	1019
1020	1020	// 8*8 chessboard leds
1021	1021	for (int i = 0; i < 8; i++)
1022	1022	m_display_state[i+4] = (m_led_select >> i & 1) ? m_led_data : 0;
r253023	r253024
1066	1066	READ8_MEMBER(fidelz80_state::vsc_pio_portb_r)
1067	1067	{
1068	1068	UINT8 ret = 0;
1069
	1069
1070	1070	// d4: TSI BUSY line
1071	1071	ret \|= (m_speech->busy_r()) ? 0 : 0x10;
1072
	1072
1073	1073	return ret;
1074	1074	}
1075	1075
r253023	r253024
1135	1135	// T0: card scanner?
1136	1136	if (offset == 0)
1137	1137	return 0;
1138
	1138
1139	1139	// T1: ?
1140	1140	else
1141	1141	return rand() & 1;
r253023	r253024
1184	1184	ret &= m_ppi8255->read(space, offset & 3);
1185	1185	if (~offset & 8)
1186	1186	ret &= m_z80pio->read(space, offset & 3);
1187
	1187
1188	1188	return ret;
1189	1189	}
1190	1190
r253023	r253024
1207	1207	WRITE8_MEMBER(fidelz80_state::vbrc_speech_w)
1208	1208	{
1209	1209	//printf("%X ",data);
1210
	1210
1211	1211	// todo: HALT THE z80 here, and set up a callback to poll the s14001a BUSY line to resume z80
1212	1212	m_speech->data_w(space, 0, data & 0x3f);
1213	1213	m_speech->start_w(1);
1214	1214	m_speech->start_w(0);
1215
	1215
1216	1216	//m_speech->start_w(BIT(data, 7));
1217	1217	}
1218	1218

trunk/src/mame/drivers/funworld.cpp
r253023	r253024
5740	5740	ROM_LOAD( "82s147.bin", 0x0000, 0x0200, CRC(5377c680) SHA1(33857bbbfebfce28b8a68c69e030bf560a701e83) )
5741	5741
5742	5742	// and this is just an untouched NES multigame..
5743		ROM_REGION( 0x0100000, "nes_prg", 0 )
	5743	ROM_REGION( 0x0100000, "nes_prg", 0 )
5744	5744	ROM_LOAD( "me0.bin", 0x0000, 0x0100000, CRC(83a4e841) SHA1(280e1a26737fe0b90dd19be706df89e09ef84c77) ) // == 64 in 1 [a1][p1].prg nes:mc_64a 64 in 1 (Alt Games)
5745		ROM_REGION( 0x80000, "nes_chr", 0 )
	5745	ROM_REGION( 0x80000, "nes_chr", 0 )
5746	5746	ROM_LOAD( "me1.bin", 0x0000, 0x80000, CRC(7114b404) SHA1(0f5a206af25725b2e97c404a616e341f15925431) ) // == 64 in 1 [a1][p1].chr nes:mc_64a 64 in 1 (Alt Games)
5747	5747	ROM_END
5748	5748
r253023	r253024
5759	5759	ROM_LOAD( "24c04.bin", 0x0000, 0x0200, CRC(2a1e8abe) SHA1(639a704f25af02597ead2e69d15ac47953c27f09) )
5760	5760
5761	5761	// some kind of MSX multigame?
5762		ROM_REGION( 0x0100000, "msx_prg", 0 )
	5762	ROM_REGION( 0x0100000, "msx_prg", 0 )
5763	5763	ROM_LOAD( "me0.bin", 0x0000, 0x10000, CRC(bd5be18b) SHA1(b43a176db0522bcda0a17dd0c210c987dc380c97) ) // weird pattern? might be bad if not a lookup table? BADADDR -------xxxxxxxxx
5764	5764	ROM_LOAD( "me1.bin", 0x0000, 0x40000, CRC(2152c6b7) SHA1(e512e29f4a899cc3f91a446141fd4432a487228f) )
5765	5765	ROM_END

trunk/src/mame/drivers/gaelco2.cpp
r253023	r253024
202	202	ROM_REGION( 0x040000, "maincpu", 0 ) /* 68000 code */
203	203	ROM_LOAD16_BYTE( "MS_U_45.U45", 0x000000, 0x020000, CRC(98f4fdc0) SHA1(1e4d5b0a8a432de885c96319c21280d304b38db0) )
204	204	ROM_LOAD16_BYTE( "MS_U_44.U44", 0x000001, 0x020000, CRC(1785dd41) SHA1(5c6a65c00248971ce54c8185858393f2c52cc583) )
205
	205
206	206	ROM_REGION( 0x10000, "mcu", 0 ) /* DS5002FP code */
207	207	ROM_LOAD( "ms_ds5002fp.bin", 0x00000, 0x8000, NO_DUMP )
208	208
r253023	r253024
217	217	ROM_FILL( 0x0200000, 0x0080000, 0x00 ) /* to decode GFX as 5bpp */
218	218	ROM_END
219	219
220
221	220
	221
222	222	/*============================================================================
223	223	BANG
224	224	============================================================================*/
r253023	r253024
1457	1457	READ16_MEMBER(gaelco2_state::maniacsqa_prot_r)
1458	1458	{
1459	1459	int pc = space.device().safe_pc();
1460
	1460
1461	1461	// if -1 is returned at any point on these checks the game instantly reports 'power failure'
1462	1462	// these are generally done right before the other checks
1463	1463	if (pc == 0x3dbc) return 0x0000; // must not be -1
r253023	r253024
1471	1471	if (pc == 0x3dce) return 0x0000; // must be 0
1472	1472
1473	1473	if (pc == 0x25c2) return 0x0000; // writes 0 to 0xfe45fa then expects this to be 0
1474
	1474
1475	1475	if (pc == 0x5cf6) return 0x0000; // must be 0
1476	1476	if (pc == 0x5d1a) return 0x0000; // must be 0
1477	1477	if (pc == 0xaaa0) return 0x0000; // must be 0?
r253023	r253024
1480	1480	if (pc == 0xaad0) return 0x0a00; // if above ISN'T 0 this must be 0x0a00 (but code then dies, probably wants some data filled?)
1481	1481	// other code path just results in no more pieces dropping? maybe the MCU does the matching algorithm?
1482	1482
1483
1484
1485	1483
1486	1484
	1485
	1486
1487	1487	printf("read at PC %08x\n", pc);
1488	1488	return m_shareram[(0xfedaa2 - 0xfe0000) / 2];
1489	1489

trunk/src/mame/drivers/gkigt.cpp
r253023	r253024
45	45	MULTIMEDIA LITE boards:
46	46	Multimedia Lite 1 - uses up to 4MB on EPROMs to store sound
47	47	Multimedia Lite 2 - uses up to 16MB of SIMM to store sound
48
	48
49	49	Boards contain:
50	50	Custom programmed Cypress CY37032-125JC CPLD
51	51	32 Macrocells
r253023	r253024
108	108	{
109	109	return rand();
110	110	};
111
112	111
	112
113	113	};
114	114
115	115	static INPUT_PORTS_START( igt_gameking )
r253023	r253024
140	140	AM_RANGE(0x00000000, 0x0007ffff) AM_ROM
141	141	AM_RANGE(0x08000000, 0x081fffff) AM_ROM AM_REGION("game", 0)
142	142
143		AM_RANGE(0x10000000, 0x1000001f) AM_RAM
	143	AM_RANGE(0x10000000, 0x1000001f) AM_RAM
144	144	AM_RANGE(0x10000020, 0x1000021f) AM_RAM // strange range to test, correct or CPU issue?
145		AM_RANGE(0x10000220, 0x1003ffff) AM_RAM
	145	AM_RANGE(0x10000220, 0x1003ffff) AM_RAM
146	146
147	147	AM_RANGE(0x28010008, 0x2801000b) AM_READ(igt_gk_28010008_r)
148	148	AM_RANGE(0x28030000, 0x28030003) AM_READ(igt_gk_28030000_r)
149	149
150
151	150
	151
152	152	ADDRESS_MAP_END
153	153
154	154	static const gfx_layout igt_gameking_layout =
r253023	r253024
174	174	/* basic machine hardware */
175	175	MCFG_CPU_ADD("maincpu", I960, 20000000) // ?? Mhz
176	176	MCFG_CPU_PROGRAM_MAP(igt_gameking_mem)
177
178	177
	178
179	179	MCFG_GFXDECODE_ADD("gfxdecode", "palette", igt_gameking)
180	180
181	181	MCFG_SCREEN_ADD("screen", RASTER)
r253023	r253024
201	201
202	202	ROM_START( gkigt4 )
203	203	ROM_REGION( 0x80000, "maincpu", 0 )
204		ROM_LOAD( "M0000527 BASE (1-4002).bin", 0x00000, 0x80000, CRC(73981260) SHA1(24b42ae2796034815d35294efe0ac3d5c33100bd) )
	204	ROM_LOAD( "M0000527 BASE (1-4002).bin", 0x00000, 0x80000, CRC(73981260) SHA1(24b42ae2796034815d35294efe0ac3d5c33100bd) )
205	205
206	206	ROM_REGION32_LE( 0x200000, "game", 0 )
207		ROM_LOAD16_BYTE( "G0001777 GME1 1 of 2 (2-80).bin", 0x000000, 0x100000, CRC(99d5829d) SHA1(b2ec16f35503ba6a0a41221fb3f52c5d2223ad79) )
208		ROM_LOAD16_BYTE( "G0001777 GME2 2 of 2 (2-80).bin", 0x000001, 0x100000, CRC(3b7dfcc0) SHA1(2aeb35125c4320ba3198c44418c90fa6fd6270a9) )
	207	ROM_LOAD16_BYTE( "G0001777 GME1 1 of 2 (2-80).bin", 0x000000, 0x100000, CRC(99d5829d) SHA1(b2ec16f35503ba6a0a41221fb3f52c5d2223ad79) )
	208	ROM_LOAD16_BYTE( "G0001777 GME2 2 of 2 (2-80).bin", 0x000001, 0x100000, CRC(3b7dfcc0) SHA1(2aeb35125c4320ba3198c44418c90fa6fd6270a9) )
209	209
210	210	ROM_REGION( 0x100000, "cg", 0 )
211		ROM_LOAD16_BYTE( "C0000330 CG1 1 of 4 (2-40).bin", 0x000000, 0x80000, CRC(b92b8aa4) SHA1(05a1feac4012a73777eb28ab6e66e1dcadb9430f) )
212		ROM_LOAD16_BYTE( "C0000330 CG2 2 of 4 (2-40).bin", 0x000001, 0x80000, CRC(4e0560b5) SHA1(109f0bd47cfb0ed593fc34c5904bc639b0097d12))
	211	ROM_LOAD16_BYTE( "C0000330 CG1 1 of 4 (2-40).bin", 0x000000, 0x80000, CRC(b92b8aa4) SHA1(05a1feac4012a73777eb28ab6e66e1dcadb9430f) )
	212	ROM_LOAD16_BYTE( "C0000330 CG2 2 of 4 (2-40).bin", 0x000001, 0x80000, CRC(4e0560b5) SHA1(109f0bd47cfb0ed593fc34c5904bc639b0097d12))
213	213
214	214	ROM_REGION( 0x200000, "plx", 0 )
215		ROM_LOAD16_BYTE( "C0000330 PLX1 3 of 4 (2-80).bin", 0x000000, 0x100000, CRC(806ec7d4) SHA1(b9263f942b3d7101797bf87ad18cfddac9582791) )
216		ROM_LOAD16_BYTE( "C0000330 PLX2 4 of 4 (2-80).bin", 0x000001, 0x100000, CRC(c4ce5dc5) SHA1(cc5d090e88551550787b87d80aafe18ee1661dd7) )
	215	ROM_LOAD16_BYTE( "C0000330 PLX1 3 of 4 (2-80).bin", 0x000000, 0x100000, CRC(806ec7d4) SHA1(b9263f942b3d7101797bf87ad18cfddac9582791) )
	216	ROM_LOAD16_BYTE( "C0000330 PLX2 4 of 4 (2-80).bin", 0x000001, 0x100000, CRC(c4ce5dc5) SHA1(cc5d090e88551550787b87d80aafe18ee1661dd7) )
217	217
218	218	ROM_REGION( 0x200000, "snd", 0 )
219		ROM_LOAD( "SWC00046 SND1 1 of 2 (2-80).rom1", 0x000000, 0x100000, CRC(8213aeac) SHA1(4beff02fed64e607270e0e8e322a96f112bd2093) )
220		ROM_LOAD( "SWC00046 SND2 2 of 2 (2-80).rom2", 0x100000, 0x100000, CRC(a7ef9b46) SHA1(031373fb8e39c4ed828a58bb63a9395a205c6b6b) )
	219	ROM_LOAD( "SWC00046 SND1 1 of 2 (2-80).rom1", 0x000000, 0x100000, CRC(8213aeac) SHA1(4beff02fed64e607270e0e8e322a96f112bd2093) )
	220	ROM_LOAD( "SWC00046 SND2 2 of 2 (2-80).rom2", 0x100000, 0x100000, CRC(a7ef9b46) SHA1(031373fb8e39c4ed828a58bb63a9395a205c6b6b) )
221	221	ROM_END
222	222
223	223
224	224
225	225	ROM_START( gkigt4ms )
226	226	ROM_REGION( 0x80000, "maincpu", 0 )
227		ROM_LOAD( "M000526 BASE (1-4002) MS.u39", 0x00000, 0x80000, CRC(4d095df5) SHA1(bd0cdc4c1b07ef2723ba22b14abaf581b017f190) )
	227	ROM_LOAD( "M000526 BASE (1-4002) MS.u39", 0x00000, 0x80000, CRC(4d095df5) SHA1(bd0cdc4c1b07ef2723ba22b14abaf581b017f190) )
228	228
229	229	ROM_REGION32_LE( 0x200000, "game", 0 ) // same as gkigt4
230		ROM_LOAD16_BYTE( "G0001777 GME1 1 of 2 (2-80).bin", 0x000000, 0x100000, CRC(99d5829d) SHA1(b2ec16f35503ba6a0a41221fb3f52c5d2223ad79) )
231		ROM_LOAD16_BYTE( "G0001777 GME2 2 of 2 (2-80).bin", 0x000001, 0x100000, CRC(3b7dfcc0) SHA1(2aeb35125c4320ba3198c44418c90fa6fd6270a9) )
	230	ROM_LOAD16_BYTE( "G0001777 GME1 1 of 2 (2-80).bin", 0x000000, 0x100000, CRC(99d5829d) SHA1(b2ec16f35503ba6a0a41221fb3f52c5d2223ad79) )
	231	ROM_LOAD16_BYTE( "G0001777 GME2 2 of 2 (2-80).bin", 0x000001, 0x100000, CRC(3b7dfcc0) SHA1(2aeb35125c4320ba3198c44418c90fa6fd6270a9) )
232	232
233	233	ROM_REGION( 0x100000, "cg", 0 )
234		ROM_LOAD16_BYTE( "C000351 CG1 1 of 4 (2-40) MS.u30", 0x000000, 0x80000, CRC(2e841b28) SHA1(492b54e092b0d4028fd8edcb981bd1fd25dca47d) )
235		ROM_LOAD16_BYTE( "C000351 CG2 2 of 4 (2-40) MS.u53", 0x000001, 0x80000, CRC(673fc86c) SHA1(4d844330c5602d725253b4f78781fa9e213b8556) )
	234	ROM_LOAD16_BYTE( "C000351 CG1 1 of 4 (2-40) MS.u30", 0x000000, 0x80000, CRC(2e841b28) SHA1(492b54e092b0d4028fd8edcb981bd1fd25dca47d) )
	235	ROM_LOAD16_BYTE( "C000351 CG2 2 of 4 (2-40) MS.u53", 0x000001, 0x80000, CRC(673fc86c) SHA1(4d844330c5602d725253b4f78781fa9e213b8556) )
236	236
237	237	ROM_REGION( 0x200000, "plx", 0 )
238		ROM_LOAD16_BYTE( "C000351 PXL1 3 of 4 (2-80) MS.u14", 0x000000, 0x100000, CRC(438fb625) SHA1(369c860dffa323c2e9be155da1989252f6b0e694) )
239		ROM_LOAD16_BYTE( "C000351 PXL2 4 of 4 (2-80) MS.u37", 0x000001, 0x100000, CRC(22ec9c65) SHA1(bd944ae79faa8ceb73ed8f6f244fce6ff543ccd1) )
	238	ROM_LOAD16_BYTE( "C000351 PXL1 3 of 4 (2-80) MS.u14", 0x000000, 0x100000, CRC(438fb625) SHA1(369c860dffa323c2e9be155da1989252f6b0e694) )
	239	ROM_LOAD16_BYTE( "C000351 PXL2 4 of 4 (2-80) MS.u37", 0x000001, 0x100000, CRC(22ec9c65) SHA1(bd944ae79faa8ceb73ed8f6f244fce6ff543ccd1) )
240	240
241	241	ROM_REGION( 0x200000, "snd", 0 ) // same as gkigt4
242		ROM_LOAD( "SWC00046 SND1 1 of 2 (2-80).rom1", 0x000000, 0x100000, CRC(8213aeac) SHA1(4beff02fed64e607270e0e8e322a96f112bd2093) )
243		ROM_LOAD( "SWC00046 SND2 2 of 2 (2-80).rom2", 0x100000, 0x100000, CRC(a7ef9b46) SHA1(031373fb8e39c4ed828a58bb63a9395a205c6b6b) )
	242	ROM_LOAD( "SWC00046 SND1 1 of 2 (2-80).rom1", 0x000000, 0x100000, CRC(8213aeac) SHA1(4beff02fed64e607270e0e8e322a96f112bd2093) )
	243	ROM_LOAD( "SWC00046 SND2 2 of 2 (2-80).rom2", 0x100000, 0x100000, CRC(a7ef9b46) SHA1(031373fb8e39c4ed828a58bb63a9395a205c6b6b) )
244	244	ROM_END
245	245
246	246	ROM_START( gkigt43 )
247	247	ROM_REGION( 0x80000, "maincpu", 0 )
248		ROM_LOAD( "M0000837 BASE (1-4002).bin", 0x00000, 0x80000, CRC(98841e5c) SHA1(3b04bc9bc170cfcc6145dc601a63bd1394a62897) )
	248	ROM_LOAD( "M0000837 BASE (1-4002).bin", 0x00000, 0x80000, CRC(98841e5c) SHA1(3b04bc9bc170cfcc6145dc601a63bd1394a62897) )
249	249
250	250	ROM_REGION32_LE( 0x200000, "game", 0 )
251		ROM_LOAD16_BYTE( "G0002142 GME1 1 of 2 (2-80).bin", 0x000000, 0x100000, CRC(704ef406) SHA1(3f8f719342874243d479011372786a9b6b14f5b1) )
252		ROM_LOAD16_BYTE( "G0002142 GME2 2 of 2 (2-80).bin", 0x000001, 0x100000, CRC(3a576a75) SHA1(d2de1b61808412fb2fe68400387dcdcb7910a770) )
	251	ROM_LOAD16_BYTE( "G0002142 GME1 1 of 2 (2-80).bin", 0x000000, 0x100000, CRC(704ef406) SHA1(3f8f719342874243d479011372786a9b6b14f5b1) )
	252	ROM_LOAD16_BYTE( "G0002142 GME2 2 of 2 (2-80).bin", 0x000001, 0x100000, CRC(3a576a75) SHA1(d2de1b61808412fb2fe68400387dcdcb7910a770) )
253	253
254	254	ROM_REGION( 0x100000, "cg", 0 )
255		ROM_LOAD16_BYTE( "C0000793 CG1 1 of 4 (2-40).bin", 0x000000, 0x80000, CRC(582137cc) SHA1(66686a2332a3844f816cf7e988a346f5f593d8f6) )
256		ROM_LOAD16_BYTE( "C0000793 CG2 2 of 4 (2-40).bin", 0x000001, 0x80000, CRC(5e0b6310) SHA1(4bf718dc9859e8c10c9dca967185c57738249319) )
	255	ROM_LOAD16_BYTE( "C0000793 CG1 1 of 4 (2-40).bin", 0x000000, 0x80000, CRC(582137cc) SHA1(66686a2332a3844f816cf7e988a346f5f593d8f6) )
	256	ROM_LOAD16_BYTE( "C0000793 CG2 2 of 4 (2-40).bin", 0x000001, 0x80000, CRC(5e0b6310) SHA1(4bf718dc9859e8c10c9dca967185c57738249319) )
257	257
258	258	ROM_REGION( 0x200000, "plx", 0 )
259		ROM_LOAD16_BYTE( "C0000793 PLX1 3 of 4 (2-80).bin", 0x000000, 0x100000, CRC(6327a76e) SHA1(01ad5747788389d3d9d71a1c37472d33db3ba5fb) )
260		ROM_LOAD16_BYTE( "C0000793 PLX2 4 of 4 (2-80).bin", 0x000001, 0x100000, CRC(5a400e90) SHA1(c01be47d03e9ec418d0e4e1293fcf2c890301430) )
	259	ROM_LOAD16_BYTE( "C0000793 PLX1 3 of 4 (2-80).bin", 0x000000, 0x100000, CRC(6327a76e) SHA1(01ad5747788389d3d9d71a1c37472d33db3ba5fb) )
	260	ROM_LOAD16_BYTE( "C0000793 PLX2 4 of 4 (2-80).bin", 0x000001, 0x100000, CRC(5a400e90) SHA1(c01be47d03e9ec418d0e4e1293fcf2c890301430) )
261	261
262	262	ROM_REGION( 0x200000, "snd", 0 ) // same as gkigt4
263		ROM_LOAD( "SWC00046 SND1 1 of 2 (2-80).rom1", 0x000000, 0x100000, CRC(8213aeac) SHA1(4beff02fed64e607270e0e8e322a96f112bd2093) )
264		ROM_LOAD( "SWC00046 SND2 2 of 2 (2-80).rom2", 0x100000, 0x100000, CRC(a7ef9b46) SHA1(031373fb8e39c4ed828a58bb63a9395a205c6b6b) )
	263	ROM_LOAD( "SWC00046 SND1 1 of 2 (2-80).rom1", 0x000000, 0x100000, CRC(8213aeac) SHA1(4beff02fed64e607270e0e8e322a96f112bd2093) )
	264	ROM_LOAD( "SWC00046 SND2 2 of 2 (2-80).rom2", 0x100000, 0x100000, CRC(a7ef9b46) SHA1(031373fb8e39c4ed828a58bb63a9395a205c6b6b) )
265	265	ROM_END
266	266
267	267	ROM_START( gkigt43n )
268	268	ROM_REGION( 0x80000, "maincpu", 0 )
269		ROM_LOAD( "M0000811 BASE (1-4002) NJ.bin", 0x00000, 0x80000, CRC(4c659923) SHA1(4624179320cb284516980e2d3caea6fd45c3f967) )
	269	ROM_LOAD( "M0000811 BASE (1-4002) NJ.bin", 0x00000, 0x80000, CRC(4c659923) SHA1(4624179320cb284516980e2d3caea6fd45c3f967) )
270	270
271	271	ROM_REGION32_LE( 0x200000, "game", 0 )
272		ROM_LOAD16_BYTE( "G0001624 GME1 1 of 2 (2-80) NJ.bin", 0x000000, 0x100000, CRC(4aa4139b) SHA1(c3e13c84cc13d44de90a03d0b5d45f46d4f794ce) )
273		ROM_LOAD16_BYTE( "G0001624 GME2 2 of 2 (2-80) NJ.bin", 0x000001, 0x100000, CRC(5b3bb8bf) SHA1(271131f06944074bedab7fe7c80fce1e2136c385) )
	272	ROM_LOAD16_BYTE( "G0001624 GME1 1 of 2 (2-80) NJ.bin", 0x000000, 0x100000, CRC(4aa4139b) SHA1(c3e13c84cc13d44de90a03d0b5d45f46d4f794ce) )
	273	ROM_LOAD16_BYTE( "G0001624 GME2 2 of 2 (2-80) NJ.bin", 0x000001, 0x100000, CRC(5b3bb8bf) SHA1(271131f06944074bedab7fe7c80fce1e2136c385) )
274	274
275	275	ROM_REGION( 0x100000, "cg", 0 )
276		ROM_LOAD16_BYTE( "C0000770 CG1 1 of 4 (2-40) NJ.bin", 0x000000, 0x80000, CRC(35847c45) SHA1(9f6192a9cb43df1a32d13d09248f10d62cd5ad3c) )
277		ROM_LOAD16_BYTE( "C0000770 CG2 2 of 4 (2-40) NJ.bin", 0x000001, 0x80000, CRC(2207af01) SHA1(6f59d624fbbae56af081f2a2f4eb3f7a6e6c0ec1) )
	276	ROM_LOAD16_BYTE( "C0000770 CG1 1 of 4 (2-40) NJ.bin", 0x000000, 0x80000, CRC(35847c45) SHA1(9f6192a9cb43df1a32d13d09248f10d62cd5ad3c) )
	277	ROM_LOAD16_BYTE( "C0000770 CG2 2 of 4 (2-40) NJ.bin", 0x000001, 0x80000, CRC(2207af01) SHA1(6f59d624fbbae56af081f2a2f4eb3f7a6e6c0ec1) )
278	278
279	279	ROM_REGION( 0x200000, "plx", 0 )
280		ROM_LOAD16_BYTE( "C0000770 PLX1 3 of 4 (2-80) NJ.bin", 0x000000, 0x100000, CRC(d1e673cd) SHA1(22d0234e3efb5238d60c9aab4ffc171f28f5abac) )
281		ROM_LOAD16_BYTE( "C0000770 PLX2 4 of 4 (2-80) NJ.bin", 0x000001, 0x100000, CRC(d99074f3) SHA1(a5829761f558f8e543a1442128c0ae3520d42318) )
	280	ROM_LOAD16_BYTE( "C0000770 PLX1 3 of 4 (2-80) NJ.bin", 0x000000, 0x100000, CRC(d1e673cd) SHA1(22d0234e3efb5238d60c9aab4ffc171f28f5abac) )
	281	ROM_LOAD16_BYTE( "C0000770 PLX2 4 of 4 (2-80) NJ.bin", 0x000001, 0x100000, CRC(d99074f3) SHA1(a5829761f558f8e543a1442128c0ae3520d42318) )
282	282
283	283	ROM_REGION( 0x200000, "snd", 0 ) // same as gkigt4
284		ROM_LOAD( "SWC00046 SND1 1 of 2 (2-80).rom1", 0x000000, 0x100000, CRC(8213aeac) SHA1(4beff02fed64e607270e0e8e322a96f112bd2093) )
285		ROM_LOAD( "SWC00046 SND2 2 of 2 (2-80).rom2", 0x100000, 0x100000, CRC(a7ef9b46) SHA1(031373fb8e39c4ed828a58bb63a9395a205c6b6b) )
	284	ROM_LOAD( "SWC00046 SND1 1 of 2 (2-80).rom1", 0x000000, 0x100000, CRC(8213aeac) SHA1(4beff02fed64e607270e0e8e322a96f112bd2093) )
	285	ROM_LOAD( "SWC00046 SND2 2 of 2 (2-80).rom2", 0x100000, 0x100000, CRC(a7ef9b46) SHA1(031373fb8e39c4ed828a58bb63a9395a205c6b6b) )
286	286	ROM_END
287	287
288	288	ROM_START( gkigtez )
289	289	ROM_REGION( 0x80000, "maincpu", 0 ) // same as gkigt4ms
290		ROM_LOAD( "M000526 BASE (1-4002) MS.u39", 0x00000, 0x80000, CRC(4d095df5) SHA1(bd0cdc4c1b07ef2723ba22b14abaf581b017f190) )
	290	ROM_LOAD( "M000526 BASE (1-4002) MS.u39", 0x00000, 0x80000, CRC(4d095df5) SHA1(bd0cdc4c1b07ef2723ba22b14abaf581b017f190) )
291	291
292	292	ROM_REGION32_LE( 0x200000, "game", 0 )
293		ROM_LOAD16_BYTE( "G0002955 GME1 1 of 2 (2-80) MS.u13", 0x000000, 0x100000, CRC(472c04a1) SHA1(00b7784d254390475c9aa1beac1700c42514cbed) )
294		ROM_LOAD16_BYTE( "G0002955 GME2 2 of 2 (2-80) MS.u36", 0x000001, 0x100000, CRC(16903e65) SHA1(eb01c0f88212e8e35c35f897f17e12e859255270) )
	293	ROM_LOAD16_BYTE( "G0002955 GME1 1 of 2 (2-80) MS.u13", 0x000000, 0x100000, CRC(472c04a1) SHA1(00b7784d254390475c9aa1beac1700c42514cbed) )
	294	ROM_LOAD16_BYTE( "G0002955 GME2 2 of 2 (2-80) MS.u36", 0x000001, 0x100000, CRC(16903e65) SHA1(eb01c0f88212e8e35c35f897f17e12e859255270) )
295	295
296	296	ROM_REGION( 0x100000, "cg", 0 ) // same as gkigt4ms
297		ROM_LOAD16_BYTE( "C000351 CG1 1 of 4 (2-40) MS.u30", 0x000000, 0x80000, CRC(2e841b28) SHA1(492b54e092b0d4028fd8edcb981bd1fd25dca47d) )
298		ROM_LOAD16_BYTE( "C000351 CG2 2 of 4 (2-40) MS.u53", 0x000001, 0x80000, CRC(673fc86c) SHA1(4d844330c5602d725253b4f78781fa9e213b8556) )
	297	ROM_LOAD16_BYTE( "C000351 CG1 1 of 4 (2-40) MS.u30", 0x000000, 0x80000, CRC(2e841b28) SHA1(492b54e092b0d4028fd8edcb981bd1fd25dca47d) )
	298	ROM_LOAD16_BYTE( "C000351 CG2 2 of 4 (2-40) MS.u53", 0x000001, 0x80000, CRC(673fc86c) SHA1(4d844330c5602d725253b4f78781fa9e213b8556) )
299	299
300	300	ROM_REGION( 0x200000, "plx", 0 ) // same as gkigt4ms
301		ROM_LOAD16_BYTE( "C000351 PXL1 3 of 4 (2-80) MS.u14", 0x000000, 0x100000, CRC(438fb625) SHA1(369c860dffa323c2e9be155da1989252f6b0e694) )
302		ROM_LOAD16_BYTE( "C000351 PXL2 4 of 4 (2-80) MS.u37", 0x000001, 0x100000, CRC(22ec9c65) SHA1(bd944ae79faa8ceb73ed8f6f244fce6ff543ccd1) )
	301	ROM_LOAD16_BYTE( "C000351 PXL1 3 of 4 (2-80) MS.u14", 0x000000, 0x100000, CRC(438fb625) SHA1(369c860dffa323c2e9be155da1989252f6b0e694) )
	302	ROM_LOAD16_BYTE( "C000351 PXL2 4 of 4 (2-80) MS.u37", 0x000001, 0x100000, CRC(22ec9c65) SHA1(bd944ae79faa8ceb73ed8f6f244fce6ff543ccd1) )
303	303
304	304	ROM_REGION( 0x200000, "snd", 0 ) // same as gkigt4
305		ROM_LOAD( "SWC00046 SND1 1 of 2 (2-80).rom1", 0x000000, 0x100000, CRC(8213aeac) SHA1(4beff02fed64e607270e0e8e322a96f112bd2093) )
306		ROM_LOAD( "SWC00046 SND2 2 of 2 (2-80).rom2", 0x100000, 0x100000, CRC(a7ef9b46) SHA1(031373fb8e39c4ed828a58bb63a9395a205c6b6b) )
	305	ROM_LOAD( "SWC00046 SND1 1 of 2 (2-80).rom1", 0x000000, 0x100000, CRC(8213aeac) SHA1(4beff02fed64e607270e0e8e322a96f112bd2093) )
	306	ROM_LOAD( "SWC00046 SND2 2 of 2 (2-80).rom2", 0x100000, 0x100000, CRC(a7ef9b46) SHA1(031373fb8e39c4ed828a58bb63a9395a205c6b6b) )
307	307	ROM_END
308	308
309	309	ROM_START( gkigt5p )
310	310	ROM_REGION( 0x80000, "maincpu", 0 )
311		ROM_LOAD( "M0000761 BASE (1-4002).bin", 0x00000, 0x80000, CRC(efac4e4f) SHA1(0cf5b3eead66a791701a504330d9154e8f4d657d) )
	311	ROM_LOAD( "M0000761 BASE (1-4002).bin", 0x00000, 0x80000, CRC(efac4e4f) SHA1(0cf5b3eead66a791701a504330d9154e8f4d657d) )
312	312
313	313	ROM_REGION32_LE( 0x200000, "game", 0 )
314		ROM_LOAD16_BYTE( "G0001783 GME1 1 of 2 (2-80).bin", 0x000000, 0x100000, CRC(f6672841) SHA1(1f8fe98b931e7fd67e5cd56e193c44acabcb7c0a) )
315		ROM_LOAD16_BYTE( "G0001783 GME1 2 of 2 (2-80).bin", 0x000001, 0x100000, CRC(639de8c0) SHA1(ad4fb79f12bf19b4b39691cda9f5e61f32fa2dd5) )
	314	ROM_LOAD16_BYTE( "G0001783 GME1 1 of 2 (2-80).bin", 0x000000, 0x100000, CRC(f6672841) SHA1(1f8fe98b931e7fd67e5cd56e193c44acabcb7c0a) )
	315	ROM_LOAD16_BYTE( "G0001783 GME1 2 of 2 (2-80).bin", 0x000001, 0x100000, CRC(639de8c0) SHA1(ad4fb79f12bf19b4b39691cda9f5e61f32fa2dd5) )
316	316
317	317	ROM_REGION( 0x100000, "cg", 0 )
318		ROM_LOAD16_BYTE( "C0000517 CG1 1 of 4 (2-40).bin", 0x000000, 0x80000, CRC(26db44c9) SHA1(8afe145d1fb7535c651d78b23872b71c2c946509) )
319		ROM_LOAD16_BYTE( "C0000517 CG2 2 of 4 (2-40).bin", 0x000001, 0x80000, CRC(3554ba38) SHA1(6e0b8506943559dbee4cfa7c9e4b60590c6529fb) )
	318	ROM_LOAD16_BYTE( "C0000517 CG1 1 of 4 (2-40).bin", 0x000000, 0x80000, CRC(26db44c9) SHA1(8afe145d1fb7535c651d78b23872b71c2c946509) )
	319	ROM_LOAD16_BYTE( "C0000517 CG2 2 of 4 (2-40).bin", 0x000001, 0x80000, CRC(3554ba38) SHA1(6e0b8506943559dbee4cfa7c9e4b60590c6529fb) )
320	320
321	321	ROM_REGION( 0x200000, "plx", 0 )
322		ROM_LOAD16_BYTE( "C0000517 PLX1 3 of 4 (2-80).bin", 0x000000, 0x100000, CRC(956ba40c) SHA1(7d8ae934ef663ea6b3f342455d1e8c70a1ca4581) )
323		ROM_LOAD16_BYTE( "C0000517 PLX2 4 of 4 (2-80).bin", 0x000001, 0x100000, CRC(dff43975) SHA1(e1ca212e4e51175bcbab2af447863605f74ba77f) )
	322	ROM_LOAD16_BYTE( "C0000517 PLX1 3 of 4 (2-80).bin", 0x000000, 0x100000, CRC(956ba40c) SHA1(7d8ae934ef663ea6b3f342455d1e8c70a1ca4581) )
	323	ROM_LOAD16_BYTE( "C0000517 PLX2 4 of 4 (2-80).bin", 0x000001, 0x100000, CRC(dff43975) SHA1(e1ca212e4e51175bcbab2af447863605f74ba77f) )
324	324
325	325	ROM_REGION( 0x200000, "snd", 0 ) // same as gkigt4
326		ROM_LOAD( "SWC00046 SND1 1 of 2 (2-80).rom1", 0x000000, 0x100000, CRC(8213aeac) SHA1(4beff02fed64e607270e0e8e322a96f112bd2093) )
327		ROM_LOAD( "SWC00046 SND2 2 of 2 (2-80).rom2", 0x100000, 0x100000, CRC(a7ef9b46) SHA1(031373fb8e39c4ed828a58bb63a9395a205c6b6b) )
	326	ROM_LOAD( "SWC00046 SND1 1 of 2 (2-80).rom1", 0x000000, 0x100000, CRC(8213aeac) SHA1(4beff02fed64e607270e0e8e322a96f112bd2093) )
	327	ROM_LOAD( "SWC00046 SND2 2 of 2 (2-80).rom2", 0x100000, 0x100000, CRC(a7ef9b46) SHA1(031373fb8e39c4ed828a58bb63a9395a205c6b6b) )
328	328	ROM_END
329	329
330	330
331	331	ROM_START( igtsc )
332	332	ROM_REGION( 0x80000, "maincpu", 0 )
333		ROM_LOAD( "I0000838 BASE (1-4002).bin", 0x00000, 0x80000, CRC(7b66f0d5) SHA1(a13e7fa4062668ff7acb15e58025eeb401754898) )
	333	ROM_LOAD( "I0000838 BASE (1-4002).bin", 0x00000, 0x80000, CRC(7b66f0d5) SHA1(a13e7fa4062668ff7acb15e58025eeb401754898) )
334	334
335	335	ROM_REGION32_LE( 0x200000, "game", 0 )
336		ROM_LOAD16_BYTE( "G0001175 GME1 1 of 2 (2-80).bin", 0x000000, 0x100000, CRC(674e0172) SHA1(e7bfe13781988b9193f22ad93502e303ba9427eb) )
337		ROM_LOAD16_BYTE( "G0001175 GME2 2 of 2 (2-80).bin", 0x000001, 0x100000, CRC(db76db22) SHA1(e389b11a05f0ef0dcee303ba91578f4cd56beba0) )
	336	ROM_LOAD16_BYTE( "G0001175 GME1 1 of 2 (2-80).bin", 0x000000, 0x100000, CRC(674e0172) SHA1(e7bfe13781988b9193f22ad93502e303ba9427eb) )
	337	ROM_LOAD16_BYTE( "G0001175 GME2 2 of 2 (2-80).bin", 0x000001, 0x100000, CRC(db76db22) SHA1(e389b11a05f0ef0dcee303ba91578f4cd56beba0) )
338	338
339	339	// all these SIMM files are bad dumps, they never contains the byte value 0x0d (uploaded in ASCII mode with carriage return stripped out?)
340	340	ROM_REGION( 0x0800000, "cg", 0 )
r253023	r253024
353	353
354	354	ROM_START( gkkey )
355	355	ROM_REGION( 0x80000, "maincpu", 0 )
356		ROM_LOAD( "KEY00017 (1-4002).bin", 0x00000, 0x80000, CRC(1579739f) SHA1(7b6257d17f74599a4ada3014d02a2e7c6686ab3f) )
357		ROM_LOAD( "KEY00028 (1-4002).bin", 0x00000, 0x80000, CRC(bf06b98b) SHA1(5c46afb560bb5c0f7540b714c0dea851c6b18fe6) )
	356	ROM_LOAD( "KEY00017 (1-4002).bin", 0x00000, 0x80000, CRC(1579739f) SHA1(7b6257d17f74599a4ada3014d02a2e7c6686ab3f) )
	357	ROM_LOAD( "KEY00028 (1-4002).bin", 0x00000, 0x80000, CRC(bf06b98b) SHA1(5c46afb560bb5c0f7540b714c0dea851c6b18fe6) )
358	358
359	359	ROM_REGION( 0x80000, "miscbad", 0 )
360	360	// these are also bad dumps, again they never contains the byte value 0x0d (uploaded in ASCII mode with carriage return stripped out?)
r253023	r253024
377	377	GAME( 2003, gkigt5p, gkigt4, igt_gameking, igt_gameking, driver_device, 0, ROT0, "IGT", "Game King (Triple-Five Play)", MACHINE_NOT_WORKING \| MACHINE_NO_SOUND )
378	378	GAME( 2003, igtsc, 0, igt_gameking, igt_gameking, driver_device, 0, ROT0, "IGT", "Super Cherry", MACHINE_NOT_WORKING \| MACHINE_NO_SOUND ) // SIMM dumps are bad.
379	379	GAME( 2003, gkkey, 0, igt_gameking, igt_gameking, driver_device, 0, ROT0, "IGT", "Game King (Set Chips)", MACHINE_NOT_WORKING \| MACHINE_NO_SOUND ) // only 2 are good dumps
380

trunk/src/mame/drivers/hp9845.cpp
r253023	r253024
156	156	PORT_BIT(BIT_MASK(2) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP+") // KP +
157	157	PORT_BIT(BIT_MASK(3) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP,") // KP ,
158	158	PORT_BIT(BIT_MASK(4) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP.") // KP .
159		PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP0") // KP 0
	159	PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP0") // KP 0
160	160	PORT_BIT(BIT_MASK(6) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F12) PORT_NAME("Execute") // Execute
161	161	PORT_BIT(BIT_MASK(7) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F11) PORT_NAME("Cont") // Cont
162	162	PORT_BIT(BIT_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) // Right
r253023	r253024
261	261	PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("K12") // K12
262	262	PORT_BIT(BIT_MASK(6) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("K11") // K11
263	263	PORT_BIT(BIT_MASK(7) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("K10") // K10
264		PORT_BIT(BIT_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("K9") // K9
	264	PORT_BIT(BIT_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("K9") // K9
265	265	PORT_BIT(BIT_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("K8") // K8
266	266	PORT_BIT(BIT_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_0) PORT_CHAR('0') // 0
267	267	PORT_BIT(BIT_MASK(11) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(') // 8
r253023	r253024
270	270	PORT_BIT(BIT_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('"') // 2
271	271	PORT_BIT(BIT_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_TAB) PORT_CHAR('\t') // Tab
272	272	PORT_BIT(BIT_MASK(16) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Tab clr") // Tab clr
273		PORT_BIT(BIT_MASK(17) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Step") // Step
	273	PORT_BIT(BIT_MASK(17) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Step") // Step
274	274	PORT_BIT(BIT_MASK(18) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F7) PORT_NAME("K7") // K7
275	275	PORT_BIT(BIT_MASK(19) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F6) PORT_NAME("K6") // K6
276	276	PORT_BIT(BIT_MASK(20) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F5) PORT_NAME("K5") // K5
277		PORT_BIT(BIT_MASK(21) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F4) PORT_NAME("K4") // K4
278		PORT_BIT(BIT_MASK(22) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F3) PORT_NAME("K3") // K3
	277	PORT_BIT(BIT_MASK(21) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F4) PORT_NAME("K4") // K4
	278	PORT_BIT(BIT_MASK(22) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F3) PORT_NAME("K3") // K3
279	279	PORT_BIT(BIT_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F2) PORT_NAME("K2") // K2
280	280	PORT_BIT(BIT_MASK(24) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F1) PORT_NAME("K1") // K1
281	281	PORT_BIT(BIT_MASK(25) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_ESC) PORT_NAME("K0") // K0
r253023	r253024
621	621	MACHINE_CONFIG_END
622	622
623	623	static ADDRESS_MAP_START(global_mem_map , AS_PROGRAM , 16 , hp9845b_state)
624		ADDRESS_MAP_GLOBAL_MASK(0x3f7fff)
625		ADDRESS_MAP_UNMAP_LOW
626		AM_RANGE(0x000000 , 0x007fff) AM_RAM AM_SHARE("lpu_ram")
627		AM_RANGE(0x014000 , 0x017fff) AM_RAM AM_SHARE("ppu_ram")
628		AM_RANGE(0x030000 , 0x037fff) AM_ROM AM_REGION("lpu" , 0)
629		AM_RANGE(0x050000 , 0x057fff) AM_ROM AM_REGION("ppu" , 0)
	624	ADDRESS_MAP_GLOBAL_MASK(0x3f7fff)
	625	ADDRESS_MAP_UNMAP_LOW
	626	AM_RANGE(0x000000 , 0x007fff) AM_RAM AM_SHARE("lpu_ram")
	627	AM_RANGE(0x014000 , 0x017fff) AM_RAM AM_SHARE("ppu_ram")
	628	AM_RANGE(0x030000 , 0x037fff) AM_ROM AM_REGION("lpu" , 0)
	629	AM_RANGE(0x050000 , 0x057fff) AM_ROM AM_REGION("ppu" , 0)
630	630	//AM_RANGE(0x250000 , 0x251fff) AM_ROM AM_REGION("test_rom" , 0)
631	631	ADDRESS_MAP_END
632	632

trunk/src/mame/drivers/jpmimpct.cpp
r253023	r253024
862	862	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
863	863
864	864	MCFG_VIDEO_START_OVERRIDE(jpmimpct_state,jpmimpct)
865
	865
866	866	MCFG_DEVICE_ADD("meters", METERS, 0)
867	867	MCFG_METERS_NUMBER(5)
868	868	MACHINE_CONFIG_END
r253023	r253024
1339	1339	MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(jpmimpct_state, reel4_optic_cb))
1340	1340	MCFG_STARPOINT_48STEP_ADD("reel5")
1341	1341	MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(jpmimpct_state, reel5_optic_cb))
1342
	1342
1343	1343	MCFG_DEVICE_ADD("meters", METERS, 0)
1344	1344	MCFG_METERS_NUMBER(5)
1345	1345

trunk/src/mame/drivers/jpmmps.cpp
r253023	r253024
169	169
170	170	MCFG_SOUND_ADD("sn", SN76489, SOUND_CLOCK)
171	171	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
172
	172
173	173	MCFG_DEVICE_ADD("meters", METERS, 0)
174		MCFG_METERS_NUMBER(9) // TODO: meters.cpp sets a max of 8
	174	MCFG_METERS_NUMBER(9) // TODO: meters.cpp sets a max of 8
175	175
176	176	MCFG_DEFAULT_LAYOUT(layout_jpmmps)
177	177	MACHINE_CONFIG_END

trunk/src/mame/drivers/jpmsys5.cpp
r253023	r253024
473	473	READ8_MEMBER(jpmsys5_state::u29_porta_r)
474	474	{
475	475	int meter_bit =0;
476
	476
477	477	if (m_meters != nullptr)
478	478	{
479	479	int combined_meter = m_meters->GetActivity(0) \| m_meters->GetActivity(1) \|
r253023	r253024
492	492
493	493	return m_direct_port->read() \| meter_bit;
494	494	}
495
	495
496	496	else
497	497	return m_direct_port->read() \| meter_bit;
498	498	}
r253023	r253024
880	880	MCFG_PTM6840_OUT0_CB(WRITE8(jpmsys5_state, u26_o1_callback))
881	881	MCFG_PTM6840_IRQ_CB(WRITELINE(jpmsys5_state, ptm_irq))
882	882	MCFG_DEFAULT_LAYOUT(layout_jpmsys5)
883
	883
884	884	MCFG_DEVICE_ADD("meters", METERS, 0)
885	885	MCFG_METERS_NUMBER(8)
886	886	MACHINE_CONFIG_END
r253023	r253024
933	933	MCFG_PTM6840_OUT0_CB(WRITE8(jpmsys5_state, u26_o1_callback))
934	934	MCFG_PTM6840_IRQ_CB(WRITELINE(jpmsys5_state, ptm_irq))
935	935	MCFG_DEFAULT_LAYOUT(layout_jpmsys5)
936
	936
937	937	MCFG_DEVICE_ADD("meters", METERS, 0)
938	938	MCFG_METERS_NUMBER(8)
939	939	MACHINE_CONFIG_END

trunk/src/mame/drivers/kaneko16.cpp
r253023	r253024
785	785
786	786	static ADDRESS_MAP_START( wingforc_soundport, AS_IO, 8, kaneko16_state )
787	787	ADDRESS_MAP_GLOBAL_MASK(0xff)
788		// AM_RANGE(0x00, 0x00) // 02 written at boot
	788	// AM_RANGE(0x00, 0x00) // 02 written at boot
789	789	AM_RANGE(0x02, 0x03) AM_DEVREADWRITE("ymsnd", ym2151_device, read, write)
790	790	AM_RANGE(0x06, 0x06) AM_READ(soundlatch_byte_r)
791	791	AM_RANGE(0x0a, 0x0a) AM_DEVREADWRITE("oki", okim6295_device, read, write)
r253023	r253024
1143	1143	PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN )
1144	1144	PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN )
1145	1145	PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN )
1146		PORT_SERVICE_NO_TOGGLE( 0x2000, IP_ACTIVE_LOW ) // unused
1147		PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_TILT ) // unused
	1146	PORT_SERVICE_NO_TOGGLE( 0x2000, IP_ACTIVE_LOW ) // unused
	1147	PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_TILT ) // unused
1148	1148	PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_SERVICE1 )
1149	1149	INPUT_PORTS_END
1150	1150

trunk/src/mame/drivers/liberatr.cpp
r253023	r253024
158	158	// reset the control latch on the EAROM
159	159	m_earom->set_control(0, 1, 1, 0, 0);
160	160	}
161
162	161
163	162
	163
164	164	/*************************************
165	165	*
166	166	* Output ports

trunk/src/mame/drivers/marywu.cpp
r253023	r253024
1	1	// license:GPL2+
2	2	// copyright-holders:Felipe Sanches
3	3	/*************************************************************************
4
	4
5	5	This is a driver for a gambling board with a yet unknown name.
6	6	The PCB is labeled with: WU- MARY-1A
7	7	And there's a text string in the ROM that says: "Music by: SunKiss Chen"
r253023	r253024
25	25	class marywu_state : public driver_device
26	26	{
27	27	public:
28		marywu_state(const machine_config &mconfig, device_type type, const char *tag)
29		: driver_device(mconfig, type, tag)
30		{ }
	28	marywu_state(const machine_config &mconfig, device_type type, const char *tag)
	29	: driver_device(mconfig, type, tag)
	30	{ }
31	31
32		DECLARE_WRITE8_MEMBER(display_7seg_data_w);
33		DECLARE_WRITE8_MEMBER(multiplex_7seg_w);
34		DECLARE_WRITE8_MEMBER(ay1_port_a_w);
35		DECLARE_WRITE8_MEMBER(ay1_port_b_w);
36		DECLARE_WRITE8_MEMBER(ay2_port_a_w);
37		DECLARE_WRITE8_MEMBER(ay2_port_b_w);
38		DECLARE_READ8_MEMBER(keyboard_r);
39		DECLARE_READ8_MEMBER(port_r);
	32	DECLARE_WRITE8_MEMBER(display_7seg_data_w);
	33	DECLARE_WRITE8_MEMBER(multiplex_7seg_w);
	34	DECLARE_WRITE8_MEMBER(ay1_port_a_w);
	35	DECLARE_WRITE8_MEMBER(ay1_port_b_w);
	36	DECLARE_WRITE8_MEMBER(ay2_port_a_w);
	37	DECLARE_WRITE8_MEMBER(ay2_port_b_w);
	38	DECLARE_READ8_MEMBER(keyboard_r);
	39	DECLARE_READ8_MEMBER(port_r);
40	40	private:
41		uint8_t m_selected_7seg_module;
	41	uint8_t m_selected_7seg_module;
42	42	};
43	43
44	44	static INPUT_PORTS_START( marywu )
45		PORT_START("KEYS1")
46		PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_1)
47		PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_2)
48		PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_3)
49		PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_4)
50		PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_5)
51		PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_6)
52		PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_7)
53		PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_8)
	45	PORT_START("KEYS1")
	46	PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_1)
	47	PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_2)
	48	PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_3)
	49	PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_4)
	50	PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_5)
	51	PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_6)
	52	PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_7)
	53	PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_8)
54	54
55		PORT_START("KEYS2")
56		PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_Q)
57		PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_W)
58		PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_E)
59		PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_R)
60		PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_T)
61		PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_Y)
62		PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_U)
63		PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_I)
	55	PORT_START("KEYS2")
	56	PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_Q)
	57	PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_W)
	58	PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_E)
	59	PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_R)
	60	PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_T)
	61	PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_Y)
	62	PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_U)
	63	PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_I)
64	64
65		PORT_START("DSW")
66		PORT_DIPNAME( 0x01, 0x01, "Unknown bit #0" ) PORT_DIPLOCATION("DSW:0")
67		PORT_DIPSETTING(0x01, DEF_STR( On ) )
68		PORT_DIPSETTING(0x00, DEF_STR( Off ) )
69		PORT_DIPNAME( 0x02, 0x02, "Unknown bit #1" ) PORT_DIPLOCATION("DSW:1")
70		PORT_DIPSETTING(0x02, DEF_STR( On ) )
71		PORT_DIPSETTING(0x00, DEF_STR( Off ) )
72		PORT_DIPNAME( 0x04, 0x04, "Unknown bit #2" ) PORT_DIPLOCATION("DSW:2")
73		PORT_DIPSETTING(0x04, DEF_STR( On ) )
74		PORT_DIPSETTING(0x00, DEF_STR( Off ) )
75		PORT_DIPNAME( 0x08, 0x08, "Unknown bit #3" ) PORT_DIPLOCATION("DSW:3")
76		PORT_DIPSETTING(0x08, DEF_STR( On ) )
77		PORT_DIPSETTING(0x00, DEF_STR( Off ) )
78		PORT_DIPNAME( 0x10, 0x10, "Unknown bit #4" ) PORT_DIPLOCATION("DSW:4")
79		PORT_DIPSETTING(0x10, DEF_STR( On ) )
80		PORT_DIPSETTING(0x00, DEF_STR( Off ) )
81		PORT_DIPNAME( 0x20, 0x20, "Unknown bit #5" ) PORT_DIPLOCATION("DSW:5")
82		PORT_DIPSETTING(0x20, DEF_STR( On ) )
83		PORT_DIPSETTING(0x00, DEF_STR( Off ) )
84		PORT_DIPNAME( 0x40, 0x40, "Unknown bit #6" ) PORT_DIPLOCATION("DSW:6")
85		PORT_DIPSETTING(0x40, DEF_STR( On ) )
86		PORT_DIPSETTING(0x00, DEF_STR( Off ) )
87		PORT_DIPNAME( 0x80, 0x80, "Unknown bit #7" ) PORT_DIPLOCATION("DSW:7")
88		PORT_DIPSETTING(0x80, DEF_STR( On ) )
89		PORT_DIPSETTING(0x00, DEF_STR( Off ) )
	65	PORT_START("DSW")
	66	PORT_DIPNAME( 0x01, 0x01, "Unknown bit #0" ) PORT_DIPLOCATION("DSW:0")
	67	PORT_DIPSETTING(0x01, DEF_STR( On ) )
	68	PORT_DIPSETTING(0x00, DEF_STR( Off ) )
	69	PORT_DIPNAME( 0x02, 0x02, "Unknown bit #1" ) PORT_DIPLOCATION("DSW:1")
	70	PORT_DIPSETTING(0x02, DEF_STR( On ) )
	71	PORT_DIPSETTING(0x00, DEF_STR( Off ) )
	72	PORT_DIPNAME( 0x04, 0x04, "Unknown bit #2" ) PORT_DIPLOCATION("DSW:2")
	73	PORT_DIPSETTING(0x04, DEF_STR( On ) )
	74	PORT_DIPSETTING(0x00, DEF_STR( Off ) )
	75	PORT_DIPNAME( 0x08, 0x08, "Unknown bit #3" ) PORT_DIPLOCATION("DSW:3")
	76	PORT_DIPSETTING(0x08, DEF_STR( On ) )
	77	PORT_DIPSETTING(0x00, DEF_STR( Off ) )
	78	PORT_DIPNAME( 0x10, 0x10, "Unknown bit #4" ) PORT_DIPLOCATION("DSW:4")
	79	PORT_DIPSETTING(0x10, DEF_STR( On ) )
	80	PORT_DIPSETTING(0x00, DEF_STR( Off ) )
	81	PORT_DIPNAME( 0x20, 0x20, "Unknown bit #5" ) PORT_DIPLOCATION("DSW:5")
	82	PORT_DIPSETTING(0x20, DEF_STR( On ) )
	83	PORT_DIPSETTING(0x00, DEF_STR( Off ) )
	84	PORT_DIPNAME( 0x40, 0x40, "Unknown bit #6" ) PORT_DIPLOCATION("DSW:6")
	85	PORT_DIPSETTING(0x40, DEF_STR( On ) )
	86	PORT_DIPSETTING(0x00, DEF_STR( Off ) )
	87	PORT_DIPNAME( 0x80, 0x80, "Unknown bit #7" ) PORT_DIPLOCATION("DSW:7")
	88	PORT_DIPSETTING(0x80, DEF_STR( On ) )
	89	PORT_DIPSETTING(0x00, DEF_STR( Off ) )
90	90
91		PORT_START("PUSHBUTTONS")
92		PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_UNUSED )
93		PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_UNUSED )
94		PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
95		PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_UNUSED )
96		PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_A)
97		PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_S)
98		PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_D)
99		PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_F)
	91	PORT_START("PUSHBUTTONS")
	92	PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_UNUSED )
	93	PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_UNUSED )
	94	PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
	95	PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_UNUSED )
	96	PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_A)
	97	PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_S)
	98	PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_D)
	99	PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_F)
100	100	INPUT_PORTS_END
101	101
102	102	WRITE8_MEMBER( marywu_state::ay1_port_a_w )
103	103	{
104		for (uint8_t i=0; i<8; i++){
105		output().set_led_value(i, (data & (1 << i)) ? 1 : 0);
106		}
	104	for (uint8_t i=0; i<8; i++){
	105	output().set_led_value(i, (data & (1 << i)) ? 1 : 0);
	106	}
107	107	}
108	108
109	109	WRITE8_MEMBER( marywu_state::ay1_port_b_w )
110	110	{
111		for (uint8_t i=0; i<8; i++){
112		output().set_led_value(i+8, (data & (1 << i)) ? 1 : 0);
113		}
	111	for (uint8_t i=0; i<8; i++){
	112	output().set_led_value(i+8, (data & (1 << i)) ? 1 : 0);
	113	}
114	114	}
115	115
116	116	WRITE8_MEMBER( marywu_state::ay2_port_a_w )
117	117	{
118		for (uint8_t i=0; i<8; i++){
119		output().set_led_value(i+16, (data & (1 << i)) ? 1 : 0);
120		}
	118	for (uint8_t i=0; i<8; i++){
	119	output().set_led_value(i+16, (data & (1 << i)) ? 1 : 0);
	120	}
121	121	}
122	122
123	123	WRITE8_MEMBER( marywu_state::ay2_port_b_w )
124	124	{
125		for (uint8_t i=0; i<6; i++){
126		/* we only have 30 LEDs. The last 2 bits in this port are unused. */
127		output().set_led_value(i+24, (data & (1 << i)) ? 1 : 0);
128		}
	125	for (uint8_t i=0; i<6; i++){
	126	/* we only have 30 LEDs. The last 2 bits in this port are unused. */
	127	output().set_led_value(i+24, (data & (1 << i)) ? 1 : 0);
	128	}
129	129	}
130	130
131	131	WRITE8_MEMBER( marywu_state::multiplex_7seg_w )
132	132	{
133		m_selected_7seg_module = data;
	133	m_selected_7seg_module = data;
134	134	}
135	135
136	136	READ8_MEMBER( marywu_state::port_r )
137	137	{
138	138	//TODO: figure out what each bit is mapped to in the 80c31 ports P1 and P3
139		switch(offset){
140		//case 1:
141		// return (1 << 6);
	139	switch(offset){
	140	//case 1:
	141	// return (1 << 6);
142	142	default:
143	143	return 0x00;
144		}
	144	}
145	145	}
146	146
147	147	READ8_MEMBER( marywu_state::keyboard_r )
148	148	{
149		switch(m_selected_7seg_module % 8){
	149	switch(m_selected_7seg_module % 8){
150	150	case 0: return ioport("KEYS1")->read();
151		case 1: return ioport("KEYS2")->read();
152		case 2: return ioport("DSW")->read();
153		case 3: return ioport("PUSHBUTTONS")->read();
	151	case 1: return ioport("KEYS2")->read();
	152	case 2: return ioport("DSW")->read();
	153	case 3: return ioport("PUSHBUTTONS")->read();
154	154	default:
155		return 0x00;
156		}
	155	return 0x00;
	156	}
157	157	}
158	158
159	159	WRITE8_MEMBER( marywu_state::display_7seg_data_w )
160	160	{
161		static const UINT8 patterns[16] = { 0x3f, 0x06, 0x5b, 0x4f, 0x66, 0x6d, 0x7c, 0x07, 0x7f, 0x67, 0, 0, 0, 0, 0, 0 }; // HEF4511BP (7 seg display driver)
	161	static const UINT8 patterns[16] = { 0x3f, 0x06, 0x5b, 0x4f, 0x66, 0x6d, 0x7c, 0x07, 0x7f, 0x67, 0, 0, 0, 0, 0, 0 }; // HEF4511BP (7 seg display driver)
162	162
163		output().set_digit_value(2 * m_selected_7seg_module + 0, patterns[data & 0x0F]);
164		output().set_digit_value(2 * m_selected_7seg_module + 1, patterns[(data >> 4) & 0x0F]);
	163	output().set_digit_value(2 * m_selected_7seg_module + 0, patterns[data & 0x0F]);
	164	output().set_digit_value(2 * m_selected_7seg_module + 1, patterns[(data >> 4) & 0x0F]);
165	165	}
166	166
167	167	static ADDRESS_MAP_START( program_map, AS_PROGRAM, 8, marywu_state )
168		AM_RANGE(0x0000, 0x7fff) AM_ROM
	168	AM_RANGE(0x0000, 0x7fff) AM_ROM
169	169	ADDRESS_MAP_END
170	170
171	171	static ADDRESS_MAP_START( io_map, AS_IO, 8, marywu_state )
172		AM_RANGE(0x8000, 0x87ff) AM_MIRROR(0x0100) AM_RAM /* HM6116: 2kbytes of Static RAM */
173		AM_RANGE(0xb000, 0xb000) AM_MIRROR(0x0ffe) AM_DEVREADWRITE("i8279", i8279_device, data_r, data_w)
174		AM_RANGE(0xb001, 0xb001) AM_MIRROR(0x0ffe) AM_DEVREADWRITE("i8279", i8279_device, status_r, cmd_w)
175		AM_RANGE(0x9000, 0x9000) AM_MIRROR(0x0ffc) AM_DEVWRITE("ay1", ay8910_device, data_address_w)
176		AM_RANGE(0x9001, 0x9001) AM_MIRROR(0x0ffc) AM_DEVREADWRITE("ay1", ay8910_device, data_r, data_w)
177		AM_RANGE(0x9002, 0x9002) AM_MIRROR(0x0ffc) AM_DEVWRITE("ay2", ay8910_device, data_address_w)
178		AM_RANGE(0x9003, 0x9003) AM_MIRROR(0x0ffc) AM_DEVREADWRITE("ay2", ay8910_device, data_r, data_w)
179		AM_RANGE(0xf000, 0xf000) AM_NOP /* TODO: Investigate this. There's something going on at this address range. */
180		AM_RANGE(MCS51_PORT_P0, MCS51_PORT_P3) AM_READ(port_r)
	172	AM_RANGE(0x8000, 0x87ff) AM_MIRROR(0x0100) AM_RAM /* HM6116: 2kbytes of Static RAM */
	173	AM_RANGE(0xb000, 0xb000) AM_MIRROR(0x0ffe) AM_DEVREADWRITE("i8279", i8279_device, data_r, data_w)
	174	AM_RANGE(0xb001, 0xb001) AM_MIRROR(0x0ffe) AM_DEVREADWRITE("i8279", i8279_device, status_r, cmd_w)
	175	AM_RANGE(0x9000, 0x9000) AM_MIRROR(0x0ffc) AM_DEVWRITE("ay1", ay8910_device, data_address_w)
	176	AM_RANGE(0x9001, 0x9001) AM_MIRROR(0x0ffc) AM_DEVREADWRITE("ay1", ay8910_device, data_r, data_w)
	177	AM_RANGE(0x9002, 0x9002) AM_MIRROR(0x0ffc) AM_DEVWRITE("ay2", ay8910_device, data_address_w)
	178	AM_RANGE(0x9003, 0x9003) AM_MIRROR(0x0ffc) AM_DEVREADWRITE("ay2", ay8910_device, data_r, data_w)
	179	AM_RANGE(0xf000, 0xf000) AM_NOP /* TODO: Investigate this. There's something going on at this address range. */
	180	AM_RANGE(MCS51_PORT_P0, MCS51_PORT_P3) AM_READ(port_r)
181	181	ADDRESS_MAP_END
182	182
183	183	static MACHINE_CONFIG_START( marywu , marywu_state )
184		/* basic machine hardware */
185		MCFG_CPU_ADD("maincpu", I80C31, XTAL_10_738635MHz) //actual CPU is a Winbond w78c31b-24
186		MCFG_CPU_PROGRAM_MAP(program_map)
187		MCFG_CPU_IO_MAP(io_map)
	184	/* basic machine hardware */
	185	MCFG_CPU_ADD("maincpu", I80C31, XTAL_10_738635MHz) //actual CPU is a Winbond w78c31b-24
	186	MCFG_CPU_PROGRAM_MAP(program_map)
	187	MCFG_CPU_IO_MAP(io_map)
188	188
189		/* Keyboard & display interface */
190		MCFG_DEVICE_ADD("i8279", I8279, XTAL_10_738635MHz) /* should it be perhaps a fraction of the XTAL clock ? */
191		MCFG_I8279_OUT_SL_CB(WRITE8(marywu_state, multiplex_7seg_w)) // select block of 7seg modules by multiplexing the SL scan lines
192		MCFG_I8279_IN_RL_CB(READ8(marywu_state, keyboard_r)) // keyboard Return Lines
193		MCFG_I8279_OUT_DISP_CB(WRITE8(marywu_state, display_7seg_data_w))
	189	/* Keyboard & display interface */
	190	MCFG_DEVICE_ADD("i8279", I8279, XTAL_10_738635MHz) /* should it be perhaps a fraction of the XTAL clock ? */
	191	MCFG_I8279_OUT_SL_CB(WRITE8(marywu_state, multiplex_7seg_w)) // select block of 7seg modules by multiplexing the SL scan lines
	192	MCFG_I8279_IN_RL_CB(READ8(marywu_state, keyboard_r)) // keyboard Return Lines
	193	MCFG_I8279_OUT_DISP_CB(WRITE8(marywu_state, display_7seg_data_w))
194	194
195		/* Video */
196		MCFG_DEFAULT_LAYOUT(layout_marywu)
	195	/* Video */
	196	MCFG_DEFAULT_LAYOUT(layout_marywu)
197	197
198		/* sound hardware */
199		MCFG_SPEAKER_STANDARD_MONO("mono")
200		MCFG_SOUND_ADD("ay1", AY8910, XTAL_10_738635MHz) /* should it be perhaps a fraction of the XTAL clock ? */
201		MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
202		MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(marywu_state, ay1_port_a_w))
203		MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(marywu_state, ay1_port_b_w))
204
205		MCFG_SOUND_ADD("ay2", AY8910, XTAL_10_738635MHz) /* should it be perhaps a fraction of the XTAL clock ? */
206		MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
207		MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(marywu_state, ay2_port_a_w))
208		MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(marywu_state, ay2_port_b_w))
	198	/* sound hardware */
	199	MCFG_SPEAKER_STANDARD_MONO("mono")
	200	MCFG_SOUND_ADD("ay1", AY8910, XTAL_10_738635MHz) /* should it be perhaps a fraction of the XTAL clock ? */
	201	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
	202	MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(marywu_state, ay1_port_a_w))
	203	MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(marywu_state, ay1_port_b_w))
	204
	205	MCFG_SOUND_ADD("ay2", AY8910, XTAL_10_738635MHz) /* should it be perhaps a fraction of the XTAL clock ? */
	206	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
	207	MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(marywu_state, ay2_port_a_w))
	208	MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(marywu_state, ay2_port_b_w))
209	209	MACHINE_CONFIG_END
210	210
211	211	ROM_START( marywu )
212	212	ROM_REGION( 0x8000, "maincpu", 0 )
213		ROM_LOAD( "marywu_sunkiss_chen.rom", 0x0000, 0x8000, CRC(11f67c7d) SHA1(9c1fd1a5cc6e2b0d675f0217aa8ff21c30609a0c) )
	213	ROM_LOAD( "marywu_sunkiss_chen.rom", 0x0000, 0x8000, CRC(11f67c7d) SHA1(9c1fd1a5cc6e2b0d675f0217aa8ff21c30609a0c) )
214	214	ROM_END
215	215
216	216	/* YEAR NAME PARENT MACHINE INPUT STATE INIT ROT COMPANY FULLNAME FLAGS */

trunk/src/mame/drivers/megasys1.cpp
r253023	r253024
199	199	int scanline = param;
200	200
201	201	// TODO: there's more than one hint that MCU controls IRQ signals via work RAM buffers.
202		// This is a bare miminum guessing for this specific game, it definitely don't like neither lv 1 nor 2.
	202	// This is a bare miminum guessing for this specific game, it definitely don't like neither lv 1 nor 2.
203	203	// Of course MCU is probably doing a lot more to mask and probably set a specific line too.
204	204	if(m_ram[0] == 0)
205	205	return;

trunk/src/mame/drivers/metro.cpp
r253023	r253024
5066	5066	***************************************************************************/
5067	5067
5068	5068	ROM_START( karatour )
5069		ROM_REGION( 0x080000, "maincpu", 0 ) /* 68000 Code */
5070		ROM_LOAD16_BYTE( "2.2FAB.8G", 0x000000, 0x040000, CRC(199a28d4) SHA1(ae880b5d5a1703c54e0ef27015039c7bb05eb185) ) // Hand-written label "(2) 2FAB"
5071		ROM_LOAD16_BYTE( "3.0560.10G", 0x000001, 0x040000, CRC(b054e683) SHA1(51e28a99f87684f3e56c7a168523f94717903d79) ) // Hand-written label "(3) 0560"
	5069	ROM_REGION( 0x080000, "maincpu", 0 ) /* 68000 Code */
	5070	ROM_LOAD16_BYTE( "2.2FAB.8G", 0x000000, 0x040000, CRC(199a28d4) SHA1(ae880b5d5a1703c54e0ef27015039c7bb05eb185) ) // Hand-written label "(2) 2FAB"
	5071	ROM_LOAD16_BYTE( "3.0560.10G", 0x000001, 0x040000, CRC(b054e683) SHA1(51e28a99f87684f3e56c7a168523f94717903d79) ) // Hand-written label "(3) 0560"
5072	5072
5073		ROM_REGION( 0x02c000, "audiocpu", 0 ) /* NEC78C10 Code */
5074		ROM_LOAD( "KT001.1I", 0x000000, 0x004000, CRC(1dd2008c) SHA1(488b6f5d15bdbc069ee2cd6d7a0980a228d2f790) ) // 11xxxxxxxxxxxxxxx = 0xFF
5075		ROM_CONTINUE( 0x010000, 0x01c000 )
	5073	ROM_REGION( 0x02c000, "audiocpu", 0 ) /* NEC78C10 Code */
	5074	ROM_LOAD( "KT001.1I", 0x000000, 0x004000, CRC(1dd2008c) SHA1(488b6f5d15bdbc069ee2cd6d7a0980a228d2f790) ) // 11xxxxxxxxxxxxxxx = 0xFF
	5075	ROM_CONTINUE( 0x010000, 0x01c000 )
5076	5076
5077		ROM_REGION( 0x400000, "gfx1", 0 ) /* Gfx + Data (Addressable by CPU & Blitter) */
5078		ROMX_LOAD( "361A04.15F", 0x000000, 0x100000, CRC(f6bf20a5) SHA1(cb4cb249eb1c106fe7ef0ace735c0cc3106f1ab7) , ROM_GROUPWORD \| ROM_SKIP(6))
5079		ROMX_LOAD( "361A07.17D", 0x000002, 0x100000, CRC(794cc1c0) SHA1(ecfdec5874a95846c0fb7966fdd1da625d85531f) , ROM_GROUPWORD \| ROM_SKIP(6))
5080		ROMX_LOAD( "361A05.17F", 0x000004, 0x100000, CRC(ea9c11fc) SHA1(176c4419cfe13ff019654a93cd7b0befa238bbc3) , ROM_GROUPWORD \| ROM_SKIP(6))
5081		ROMX_LOAD( "361A06.15D", 0x000006, 0x100000, CRC(7e15f058) SHA1(267f0a5acb874d4fff3556ffa405e24724174667) , ROM_GROUPWORD \| ROM_SKIP(6))
	5077	ROM_REGION( 0x400000, "gfx1", 0 ) /* Gfx + Data (Addressable by CPU & Blitter) */
	5078	ROMX_LOAD( "361A04.15F", 0x000000, 0x100000, CRC(f6bf20a5) SHA1(cb4cb249eb1c106fe7ef0ace735c0cc3106f1ab7) , ROM_GROUPWORD \| ROM_SKIP(6))
	5079	ROMX_LOAD( "361A07.17D", 0x000002, 0x100000, CRC(794cc1c0) SHA1(ecfdec5874a95846c0fb7966fdd1da625d85531f) , ROM_GROUPWORD \| ROM_SKIP(6))
	5080	ROMX_LOAD( "361A05.17F", 0x000004, 0x100000, CRC(ea9c11fc) SHA1(176c4419cfe13ff019654a93cd7b0befa238bbc3) , ROM_GROUPWORD \| ROM_SKIP(6))
	5081	ROMX_LOAD( "361A06.15D", 0x000006, 0x100000, CRC(7e15f058) SHA1(267f0a5acb874d4fff3556ffa405e24724174667) , ROM_GROUPWORD \| ROM_SKIP(6))
5082	5082
5083		ROM_REGION( 0x040000, "oki", 0 ) /* Samples */
5084		ROM_LOAD( "8.4A06.1D", 0x000000, 0x040000, CRC(8d208179) SHA1(54a27ef155828435bc5eba60790a8584274c8b4a) ) // Hand-written label "(8) 4A06"
	5083	ROM_REGION( 0x040000, "oki", 0 ) /* Samples */
	5084	ROM_LOAD( "8.4A06.1D", 0x000000, 0x040000, CRC(8d208179) SHA1(54a27ef155828435bc5eba60790a8584274c8b4a) ) // Hand-written label "(8) 4A06"
5085	5085	ROM_END
5086	5086
5087	5087	ROM_START( karatourj )

trunk/src/mame/drivers/mpu3.cpp
r253023	r253024
856	856	MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu3_state, reel2_optic_cb))
857	857	MCFG_MPU3_REEL_ADD("reel3")
858	858	MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu3_state, reel3_optic_cb))
859
	859
860	860	MCFG_DEVICE_ADD("meters", METERS, 0)
861	861	MCFG_METERS_NUMBER(8)
862	862

trunk/src/mame/drivers/mpu4hw.cpp
r253023	r253024
2634	2634	MCFG_PIA_CB2_HANDLER(WRITELINE(mpu4_state, pia_ic8_cb2_w))
2635	2635	MCFG_PIA_IRQA_HANDLER(WRITELINE(mpu4_state, cpu0_irq))
2636	2636	MCFG_PIA_IRQB_HANDLER(WRITELINE(mpu4_state, cpu0_irq))
2637
	2637
2638	2638	MCFG_DEVICE_ADD("meters", METERS, 0)
2639	2639	MCFG_METERS_NUMBER(8)
2640	2640

trunk/src/mame/drivers/naomi.cpp
r253023	r253024
1861	1861	if (reg == 0x280/4)
1862	1862	{
1863	1863	/*
1864		0x00600280 r 0000dcba
1865		a/b/c/d - coin inputs 1-4, active low
1866		(ab == 0) -> BIOS skip RAM test
1867		*/
	1864	0x00600280 r 0000dcba
	1865	a/b/c/d - coin inputs 1-4, active low
	1866	(ab == 0) -> BIOS skip RAM test
	1867	*/
1868	1868	return U64(0xffffffff00000000) \| (ioport("COINS")->read() & 0x0F);
1869	1869	} else
1870	1870	if (reg == 0x284/4)
r253023	r253024
1888	1888	aw_ctrl_type = dat & 0xF0;
1889	1889	}
1890	1890	/*
1891		0x00600284 rw ddcc0000
1892		cc/dd - set type of Maple devices at ports 2/3 (EX. IO board)
1893		0 - regular Atomiswave controller
1894		1 - DC lightgun
1895		2 - DC mouse/trackball
1896		TODO: hook this then MAME have such devices emulated
	1891	0x00600284 rw ddcc0000
	1892	cc/dd - set type of Maple devices at ports 2/3 (EX. IO board)
	1893	0 - regular Atomiswave controller
	1894	1 - DC lightgun
	1895	2 - DC mouse/trackball
	1896	TODO: hook this then MAME have such devices emulated
1897	1897
1898		0x00600288 rw 0000dcba
1899		a - 1P coin couner
1900		b - 2P coin couner
1901		c - 1P coin lockout
1902		d - 2P coin lockout
	1898	0x00600288 rw 0000dcba
	1899	a - 1P coin couner
	1900	b - 2P coin couner
	1901	c - 1P coin lockout
	1902	d - 2P coin lockout
1903	1903
1904		0x0060028C rw POUT CN304 (EX. IO board)
	1904	0x0060028C rw POUT CN304 (EX. IO board)
1905	1905	*/
1906	1906
1907	1907	osd_printf_verbose("MODEM: [%08x=%x] write %" I64FMT "x to %x, mask %" I64FMT "x\n", 0x600000+reg*4, dat, data, offset, mem_mask);

trunk/src/mame/drivers/neogeo.cpp
r253023	r253024
308	308	MVS CHA:
309	309	GIGA CHAR Board 1.0 Rev. A
310	310	GIGA CHAR Board 1.5 Rev. 0
311		GIGA CHAR Board 1.5 Rev. C
	311	GIGA CHAR Board 1.5 Rev. C
312	312
313	313	MVS PROG:
314	314	GIGA PROG Board 1.0 Rev. B
315	315	GIGA PROG Board 1.5 Rev. A
316		GIGA PROG Board 1.5 Rev. C
	316	GIGA PROG Board 1.5 Rev. C
317	317
318	318
319	319	Unofficial pcb's from NEOBITZ:

trunk/src/mame/drivers/neogeo_noslot.cpp
r253023	r253024
3329	3329	NEO_SFIX_128K( "d96-04.s1", CRC(9caae538) SHA1(cf2d90a7c1a42107c0bb8b9a61397634286dbe0a) ) /* mask rom TC531000 */
3330	3330
3331	3331	NEO_BIOS_AUDIO_128K( "d96-06.m1", CRC(f424368a) SHA1(5e5bbcaeb82bed2ee17df08f005ca20ad1030723) ) /* M27C1001 */
3332		/* M1 on eprom with sticker; label is D96-06 */
	3332	/* M1 on eprom with sticker; label is D96-06 */
3333	3333
3334	3334	ROM_REGION( 0x380000, "ymsnd", 0 )
3335	3335	ROM_LOAD( "068-v1.v1", 0x000000, 0x100000, CRC(2ced86df) SHA1(d6b73d1f31efbd74fb745200d4dade5f80b71541) ) /* unused / / mask rom TC538200 */
r253023	r253024
4601	4601	. NGM-222
4602	4602	NEO-MVS PROGBK1 / NEO-MVS CHA256B
4603	4603	NEO-MVS PROGBK1 / NEO-MVS CHA256
4604		. NGH-222
	4604	. NGH-222
4605	4605	NEO-AEG PROGBK1Y / NEO-AEG CHA256RY
4606	4606	****************************************/
4607	4607
r253023	r253024
9610	9610	NEOGEO ROM-cart:2004/07/15
9611	9611	****************************************************************************/
9612	9612
9613		/* YEAR NAME PARENT MACHINE INPUT INIT MONITOR */
	9613	/* YEAR NAME PARENT MACHINE INPUT INIT MONITOR */
9614	9614	/* SNK */
9615	9615	GAME( 1990, nam1975, neogeo, neogeo_noslot, neogeo, neogeo_state, neogeo, ROT0, "SNK", "NAM-1975 (NGM-001)(NGH-001)", MACHINE_SUPPORTS_SAVE )
9616	9616	GAME( 1990, bstars, neogeo, neogeo_noslot, neogeo, neogeo_state, neogeo, ROT0, "SNK", "Baseball Stars Professional (NGM-002)", MACHINE_SUPPORTS_SAVE )

trunk/src/mame/drivers/nokia_3310.cpp
r253023	r253024
1	1	// license:BSD-3-Clause
2	2	// copyright-holders:Sandro Ronco
3	3	/*
4		Driver for Nokia phones based on Texas Instrument MAD2WD1 (ARM7TDMI + DSP)
	4	Driver for Nokia phones based on Texas Instrument MAD2WD1 (ARM7TDMI + DSP)
5	5
6		Driver based on documentations found here:
7		http://nokix.sourceforge.net/help/blacksphere/sub_050main.htm
8		http://tudor.rdslink.ro/MADos/
	6	Driver based on documentations found here:
	7	http://nokix.sourceforge.net/help/blacksphere/sub_050main.htm
	8	http://tudor.rdslink.ro/MADos/
9	9
10	10	*/
11	11
r253023	r253024
19	19	#include "debugger.h"
20	20
21	21
22		#define LOG_MAD2_REGISTER_ACCESS (0)
23		#define LOG_CCONT_REGISTER_ACCESS (0)
	22	#define LOG_MAD2_REGISTER_ACCESS (0)
	23	#define LOG_CCONT_REGISTER_ACCESS (0)
24	24
25	25
26	26	class noki3310_state : public driver_device
r253023	r253024
56	56	TIMER_CALLBACK_MEMBER(timer_watchdog);
57	57	TIMER_CALLBACK_MEMBER(timer_fiq8);
58	58
59		DECLARE_READ16_MEMBER(ram_r) { return m_ram[offset] & mem_mask; }
60		DECLARE_WRITE16_MEMBER(ram_w) { COMBINE_DATA(&m_ram[offset]); }
	59	DECLARE_READ16_MEMBER(ram_r) { return m_ram[offset] & mem_mask; }
	60	DECLARE_WRITE16_MEMBER(ram_w) { COMBINE_DATA(&m_ram[offset]); }
61	61	DECLARE_READ16_MEMBER(dsp_ram_r);
62	62	DECLARE_WRITE16_MEMBER(dsp_ram_w);
63	63	DECLARE_INPUT_CHANGED_MEMBER(key_irq);
r253023	r253024
72	72
73	73	std::unique_ptr<UINT16[]> m_ram;
74	74	std::unique_ptr<UINT16[]> m_dsp_ram;
75		UINT8 m_power_on;
76		UINT16 m_fiq_status;
77		UINT16 m_irq_status;
78		UINT16 m_timer1_counter;
79		UINT16 m_timer0_counter;
	75	UINT8 m_power_on;
	76	UINT16 m_fiq_status;
	77	UINT16 m_irq_status;
	78	UINT16 m_timer1_counter;
	79	UINT16 m_timer0_counter;
80	80
81		emu_timer * m_timer0;
82		emu_timer * m_timer1;
83		emu_timer * m_timer_watchdog;
84		emu_timer * m_timer_fiq8;
	81	emu_timer * m_timer0;
	82	emu_timer * m_timer1;
	83	emu_timer * m_timer_watchdog;
	84	emu_timer * m_timer_fiq8;
85	85
86	86	// CCONT
87	87	struct nokia_ccont
88	88	{
89		bool dc;
90		UINT8 cmd;
91		UINT8 watchdog;
92		UINT8 regs[0x10];
	89	bool dc;
	90	UINT8 cmd;
	91	UINT8 watchdog;
	92	UINT8 regs[0x10];
93	93	} m_ccont;
94	94
95		UINT8 m_mad2_regs[0x100];
	95	UINT8 m_mad2_regs[0x100];
96	96	};
97	97
98	98
r253023	r253024
101	101	{
102	102	switch(offset)
103	103	{
104		case 0x00: return "[CTSI] DCT3 ASIC version Primary hardware version (r)";
105		case 0x01: return "[CTSI] MCU reset control register (rw)";
106		case 0x02: return "[CTSI] DSP reset control register (rw)";
107		case 0x03: return "[CTSI] ASIC watchdog write register (w)";
108		case 0x04: return "[CTSI] Sleep clock counter (MSB) (r)";
109		case 0x05: return "[CTSI] Sleep clock counter (LSB) (r)";
110		case 0x06: return "[CTSI] ? (sleep) clock destination (LSB) (r)";
111		case 0x07: return "[CTSI] ? (sleep) clock destination (MSB) (r)";
112		case 0x08: return "[CTSI] FIQ lines active (rw)";
113		case 0x09: return "[CTSI] IRQ lines active (rw)";
114		case 0x0A: return "[CTSI] FIQ lines mask (rw)";
115		case 0x0B: return "[CTSI] IRQ lines mask (rw)";
116		case 0x0C: return "[CTSI] Interrupt control register (rw)";
117		case 0x0D: return "[CTSI] Clock control register (rw)";
118		case 0x0E: return "[CTSI] Interrupt trigger register (r)";
119		case 0x0F: return "[CTSI] Programmable timer clock divider (rw)";
120		case 0x10: return "[CTSI] Programmable timer counter (MSB) (r)";
121		case 0x11: return "[CTSI] Programmable timer counter (LSB) (r)";
122		case 0x12: return "[CTSI] Programmable timer destination (MSB) (rw)";
123		case 0x13: return "[CTSI] Programmable timer destination (LSB) (rw)";
124		case 0x15: return "[PUP] PUP control (rw)";
125		case 0x16: return "[PUP] FIQ 8 (timer?) interrupt control (rw)";
126		case 0x18: return "[PUP] MBUS control (rw)";
127		case 0x19: return "[PUP] MBUS status (rw)";
128		case 0x1A: return "[PUP] MBUS RX/TX (rw)";
129		case 0x1B: return "[PUP] Vibrator (w)";
130		case 0x1C: return "[PUP] Buzzer clock divider (w)";
131		case 0x1E: return "[PUP] Buzzer volume (w)";
132		case 0x20: return "[PUP] McuGenIO signal lines (rw)";
133		case 0x22: return "[PUP] ? (?)";
134		case 0x24: return "[PUP] McuGenIO I/O direction (rw)";
135		case 0x28: return "[UIF/KBGPIO] Keyboard ROW signal lines (rw)";
136		case 0x29: return "[UIF/KBGPIO] Keyboard ROW ?? (rw)";
137		case 0x2A: return "[UIF/KBGPIO] Keyboard COL signal lines (rw)";
138		case 0x2B: return "[UIF/KBGPIO] Keyboard COL ?? (rw)";
139		case 0x2C: return "[UIF/GENSIO] CCont write (w)";
140		case 0x2D: return "[UIF/GENSIO] GENSIO start transaction (w)";
141		case 0x2E: return "[UIF/GENSIO] LCD data write (w)";
142		case 0x32: return "[UIF] CTRL I/O 2 (rw)";
143		case 0x33: return "[UIF] CTRL I/O 3 (rw)";
144		case 0x36: return "[SIMI] SIM UART TxD (w)";
145		case 0x37: return "[SIMI] SIM UART RxD (r)";
146		case 0x38: return "[SIMI] SIM UART Interrupt Identification (r)";
147		case 0x39: return "[SIMI] SIM Control (rw)";
148		case 0x3A: return "[SIMI] SIM Clock Control (rw)";
149		case 0x3B: return "[SIMI] SIM UART TxD Low Water Mark (?)";
150		case 0x3C: return "[SIMI] SIM UART RxD queue fill (r)";
151		case 0x3D: return "[SIMI] SIM RxD flags (?)";
152		case 0x3E: return "[SIMI] SIM TxD flags (?)";
153		case 0x3F: return "[SIMI] SIM UART TxD queue fill (r)";
154		case 0x68: return "[UIF/KBGPIO] Keyboard ROW ?? 2 (rw)";
155		case 0x69: return "[UIF/KBGPIO] Keyboard ROW interrupt (rw)";
156		case 0x6A: return "[UIF/KBGPIO] Keyboard COL ?? 2 (rw)";
157		case 0x6B: return "[UIF/KBGPIO] Keyboard COL interrupt mask (rw)";
158		case 0x6C: return "[UIF/GENSIO] CCont read (r)";
159		case 0x6D: return "[UIF/GENSIO] GENSIO status (r)";
160		case 0x6E: return "[UIF/GENSIO] LCD command write (w)";
161		case 0x6F: return "[UIF/GENSIO] GENSIO ?? (3/SELECT1) (?)";
162		case 0x70: return "[UIF] CTRL I/O 0 I/O direction (1) (rw)";
163		case 0x71: return "[UIF] CTRL I/O 1 I/O direction (1) (rw)";
164		case 0x72: return "[UIF] CTRL I/O 2 I/O direction (1) (rw)";
165		case 0x73: return "[UIF] CTRL I/O 3 I/O direction (1) (rw)";
166		case 0xA8: return "[UIF/KBGPIO] Keyboard ROW I/O direction (rw)";
167		case 0xA9: return "[UIF/KBGPIO] Keyboard ROW ?? 3 (rw)";
168		case 0xAA: return "[UIF/KBGPIO] Keyboard COL I/O direction 0=in 1=out (rw)";
169		case 0xAB: return "[UIF/KBGPIO] Keyboard COL ?? 3 (rw)";
170		case 0xAD: return "[UIF/GENSIO] GENSIO ?? (1/SELECT2) (?)";
171		case 0xAE: return "[UIF/GENSIO] GENSIO ?? (2/SELECT2) (?)";
172		case 0xAF: return "[UIF/GENSIO] GENSIO ?? (3/SELECT2) (?)";
173		case 0xB0: return "[UIF] CTRL I/O 0 I/O direction (2) (rw)";
174		case 0xB1: return "[UIF] CTRL I/O 1 I/O direction (2) (rw)";
175		case 0xB2: return "[UIF] CTRL I/O 2 I/O direction (2) (rw)";
176		case 0xB3: return "[UIF] CTRL I/O 3 I/O direction (2) (rw)";
177		case 0xED: return "[UIF/GENSIO] GENSIO ?? (1/SELECT3) (?)";
178		case 0xEE: return "[UIF/GENSIO] GENSIO ?? (2/SELECT3) (?)";
179		case 0xEF: return "[UIF/GENSIO] GENSIO ?? (3/SELECT3) (?)";
180		case 0xF0: return "[UIF] CTRL I/O 0 input (r)";
181		case 0xF1: return "[UIF] CTRL I/O 1 input (r)";
182		case 0xF2: return "[UIF] CTRL I/O 2 input (r)";
183		case 0xF3: return "[UIF] CTRL I/O 3 input (r)";
184		default: return "<Unknown>";
	104	case 0x00: return "[CTSI] DCT3 ASIC version Primary hardware version (r)";
	105	case 0x01: return "[CTSI] MCU reset control register (rw)";
	106	case 0x02: return "[CTSI] DSP reset control register (rw)";
	107	case 0x03: return "[CTSI] ASIC watchdog write register (w)";
	108	case 0x04: return "[CTSI] Sleep clock counter (MSB) (r)";
	109	case 0x05: return "[CTSI] Sleep clock counter (LSB) (r)";
	110	case 0x06: return "[CTSI] ? (sleep) clock destination (LSB) (r)";
	111	case 0x07: return "[CTSI] ? (sleep) clock destination (MSB) (r)";
	112	case 0x08: return "[CTSI] FIQ lines active (rw)";
	113	case 0x09: return "[CTSI] IRQ lines active (rw)";
	114	case 0x0A: return "[CTSI] FIQ lines mask (rw)";
	115	case 0x0B: return "[CTSI] IRQ lines mask (rw)";
	116	case 0x0C: return "[CTSI] Interrupt control register (rw)";
	117	case 0x0D: return "[CTSI] Clock control register (rw)";
	118	case 0x0E: return "[CTSI] Interrupt trigger register (r)";
	119	case 0x0F: return "[CTSI] Programmable timer clock divider (rw)";
	120	case 0x10: return "[CTSI] Programmable timer counter (MSB) (r)";
	121	case 0x11: return "[CTSI] Programmable timer counter (LSB) (r)";
	122	case 0x12: return "[CTSI] Programmable timer destination (MSB) (rw)";
	123	case 0x13: return "[CTSI] Programmable timer destination (LSB) (rw)";
	124	case 0x15: return "[PUP] PUP control (rw)";
	125	case 0x16: return "[PUP] FIQ 8 (timer?) interrupt control (rw)";
	126	case 0x18: return "[PUP] MBUS control (rw)";
	127	case 0x19: return "[PUP] MBUS status (rw)";
	128	case 0x1A: return "[PUP] MBUS RX/TX (rw)";
	129	case 0x1B: return "[PUP] Vibrator (w)";
	130	case 0x1C: return "[PUP] Buzzer clock divider (w)";
	131	case 0x1E: return "[PUP] Buzzer volume (w)";
	132	case 0x20: return "[PUP] McuGenIO signal lines (rw)";
	133	case 0x22: return "[PUP] ? (?)";
	134	case 0x24: return "[PUP] McuGenIO I/O direction (rw)";
	135	case 0x28: return "[UIF/KBGPIO] Keyboard ROW signal lines (rw)";
	136	case 0x29: return "[UIF/KBGPIO] Keyboard ROW ?? (rw)";
	137	case 0x2A: return "[UIF/KBGPIO] Keyboard COL signal lines (rw)";
	138	case 0x2B: return "[UIF/KBGPIO] Keyboard COL ?? (rw)";
	139	case 0x2C: return "[UIF/GENSIO] CCont write (w)";
	140	case 0x2D: return "[UIF/GENSIO] GENSIO start transaction (w)";
	141	case 0x2E: return "[UIF/GENSIO] LCD data write (w)";
	142	case 0x32: return "[UIF] CTRL I/O 2 (rw)";
	143	case 0x33: return "[UIF] CTRL I/O 3 (rw)";
	144	case 0x36: return "[SIMI] SIM UART TxD (w)";
	145	case 0x37: return "[SIMI] SIM UART RxD (r)";
	146	case 0x38: return "[SIMI] SIM UART Interrupt Identification (r)";
	147	case 0x39: return "[SIMI] SIM Control (rw)";
	148	case 0x3A: return "[SIMI] SIM Clock Control (rw)";
	149	case 0x3B: return "[SIMI] SIM UART TxD Low Water Mark (?)";
	150	case 0x3C: return "[SIMI] SIM UART RxD queue fill (r)";
	151	case 0x3D: return "[SIMI] SIM RxD flags (?)";
	152	case 0x3E: return "[SIMI] SIM TxD flags (?)";
	153	case 0x3F: return "[SIMI] SIM UART TxD queue fill (r)";
	154	case 0x68: return "[UIF/KBGPIO] Keyboard ROW ?? 2 (rw)";
	155	case 0x69: return "[UIF/KBGPIO] Keyboard ROW interrupt (rw)";
	156	case 0x6A: return "[UIF/KBGPIO] Keyboard COL ?? 2 (rw)";
	157	case 0x6B: return "[UIF/KBGPIO] Keyboard COL interrupt mask (rw)";
	158	case 0x6C: return "[UIF/GENSIO] CCont read (r)";
	159	case 0x6D: return "[UIF/GENSIO] GENSIO status (r)";
	160	case 0x6E: return "[UIF/GENSIO] LCD command write (w)";
	161	case 0x6F: return "[UIF/GENSIO] GENSIO ?? (3/SELECT1) (?)";
	162	case 0x70: return "[UIF] CTRL I/O 0 I/O direction (1) (rw)";
	163	case 0x71: return "[UIF] CTRL I/O 1 I/O direction (1) (rw)";
	164	case 0x72: return "[UIF] CTRL I/O 2 I/O direction (1) (rw)";
	165	case 0x73: return "[UIF] CTRL I/O 3 I/O direction (1) (rw)";
	166	case 0xA8: return "[UIF/KBGPIO] Keyboard ROW I/O direction (rw)";
	167	case 0xA9: return "[UIF/KBGPIO] Keyboard ROW ?? 3 (rw)";
	168	case 0xAA: return "[UIF/KBGPIO] Keyboard COL I/O direction 0=in 1=out (rw)";
	169	case 0xAB: return "[UIF/KBGPIO] Keyboard COL ?? 3 (rw)";
	170	case 0xAD: return "[UIF/GENSIO] GENSIO ?? (1/SELECT2) (?)";
	171	case 0xAE: return "[UIF/GENSIO] GENSIO ?? (2/SELECT2) (?)";
	172	case 0xAF: return "[UIF/GENSIO] GENSIO ?? (3/SELECT2) (?)";
	173	case 0xB0: return "[UIF] CTRL I/O 0 I/O direction (2) (rw)";
	174	case 0xB1: return "[UIF] CTRL I/O 1 I/O direction (2) (rw)";
	175	case 0xB2: return "[UIF] CTRL I/O 2 I/O direction (2) (rw)";
	176	case 0xB3: return "[UIF] CTRL I/O 3 I/O direction (2) (rw)";
	177	case 0xED: return "[UIF/GENSIO] GENSIO ?? (1/SELECT3) (?)";
	178	case 0xEE: return "[UIF/GENSIO] GENSIO ?? (2/SELECT3) (?)";
	179	case 0xEF: return "[UIF/GENSIO] GENSIO ?? (3/SELECT3) (?)";
	180	case 0xF0: return "[UIF] CTRL I/O 0 input (r)";
	181	case 0xF1: return "[UIF] CTRL I/O 1 input (r)";
	182	case 0xF2: return "[UIF] CTRL I/O 2 input (r)";
	183	case 0xF3: return "[UIF] CTRL I/O 3 input (r)";
	184	default: return "<Unknown>";
185	185	}
186	186	}
187	187	#endif
r253023	r253024
191	191	{
192	192	switch(offset)
193	193	{
194		case 0x0: return "Control register (w)";
195		case 0x1: return "PWM (charger) (w)";
196		case 0x2: return "A/D read (LSB) (r)";
197		case 0x3: return "A/D read (MSB) (rw)";
198		case 0x4: return "?";
199		case 0x5: return "Watchdog (WDReg) (w)";
200		case 0x6: return "RTC enabled (w)";
201		case 0x7: return "RTC second (rw)";
202		case 0x8: return "RTC minute (r)";
203		case 0x9: return "RTC hour (r)";
204		case 0xA: return "RTC day (rw)";
205		case 0xB: return "RTC alarm minute (rw)";
206		case 0xC: return "RTC alarm hour (rw)";
207		case 0xD: return "RTC calibration value (rw)";
208		case 0xE: return "Interrupt lines (rw)";
209		case 0xF: return "Interrupt mask (rw)";
210		default: return "<Unknown>";
	194	case 0x0: return "Control register (w)";
	195	case 0x1: return "PWM (charger) (w)";
	196	case 0x2: return "A/D read (LSB) (r)";
	197	case 0x3: return "A/D read (MSB) (rw)";
	198	case 0x4: return "?";
	199	case 0x5: return "Watchdog (WDReg) (w)";
	200	case 0x6: return "RTC enabled (w)";
	201	case 0x7: return "RTC second (rw)";
	202	case 0x8: return "RTC minute (r)";
	203	case 0x9: return "RTC hour (r)";
	204	case 0xA: return "RTC day (rw)";
	205	case 0xB: return "RTC alarm minute (rw)";
	206	case 0xC: return "RTC alarm hour (rw)";
	207	case 0xD: return "RTC calibration value (rw)";
	208	case 0xE: return "Interrupt lines (rw)";
	209	case 0xF: return "Interrupt mask (rw)";
	210	default: return "<Unknown>";
211	211	}
212	212	}
213	213	#endif
r253023	r253024
215	215	void noki3310_state::machine_start()
216	216	{
217	217	m_ram = std::make_unique<UINT16[]>(0x40000);
218		m_dsp_ram = std::make_unique<UINT16[]>(0x800); // DSP shared RAM
	218	m_dsp_ram = std::make_unique<UINT16[]>(0x800); // DSP shared RAM
219	219
220	220	// allocate timers
221	221	m_timer0 = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(noki3310_state::timer0), this));
r253023	r253024
231	231	m_maincpu->set_state_int(ARM7_R15, 0x200040);
232	232
233	233	memset(m_mad2_regs, 0, 0x100);
234		m_mad2_regs[0x01] = 0x01; // power-on flag
235		m_mad2_regs[0x0c] = 0x0a; // disable FIQ and IRQ
236		m_mad2_regs[0x03] = 0xff; // disable MAD2 watchdog
237		m_ccont.watchdog = 0; // disable CCONT watchdog
	234	m_mad2_regs[0x01] = 0x01; // power-on flag
	235	m_mad2_regs[0x0c] = 0x0a; // disable FIQ and IRQ
	236	m_mad2_regs[0x03] = 0xff; // disable MAD2 watchdog
	237	m_ccont.watchdog = 0; // disable CCONT watchdog
238	238	m_ccont.dc = false;
239	239
240	240	m_fiq_status = 0;
r253023	r253024
242	242	m_timer1_counter = 0;
243	243	m_timer0_counter = 0;
244	244
245		m_timer0->adjust(attotime::from_hz(33055 / (255 + 1)), 0, attotime::from_hz(33055 / (255 + 1))); // programmable through port 0x0f
	245	m_timer0->adjust(attotime::from_hz(33055 / (255 + 1)), 0, attotime::from_hz(33055 / (255 + 1))); // programmable through port 0x0f
246	246	m_timer1->adjust(attotime::from_hz(1057), 0, attotime::from_hz(1057));
247	247	m_timer_watchdog->adjust(attotime::from_hz(1), 0, attotime::from_hz(1));
248	248	m_timer_fiq8->adjust(attotime::from_hz(1000), 0, attotime::from_hz(1000));
r253023	r253024
256	256
257	257	void noki3310_state::assert_fiq(int num)
258	258	{
259		if ((m_mad2_regs[0x0c] & 0x01) == 0) // check if FIQ is globally enabled
	259	if ((m_mad2_regs[0x0c] & 0x01) == 0) // check if FIQ is globally enabled
260	260	return;
261	261
262	262	if (num < 8)
r253023	r253024
277	277
278	278	void noki3310_state::assert_irq(int num)
279	279	{
280		if ((m_mad2_regs[0x0c] & 0x04) == 0) // check if IRQ is globally enabled
	280	if ((m_mad2_regs[0x0c] & 0x04) == 0) // check if IRQ is globally enabled
281	281	return;
282	282
283	283	if (num < 8)
r253023	r253024
327	327
328	328	switch(addr)
329	329	{
330		case 0x0: // ADC
	330	case 0x0: // ADC
331	331	{
332	332	UINT16 ad_id = (data >> 4) & 0x07;
333	333	UINT16 ad_value = 0;
334	334	switch(ad_id)
335	335	{
336		case 0: ad_value = 0x000; break; // Accessory Detect
337		case 1: ad_value = 0x3ff; break; // Received signal strength
338		case 2: ad_value = 0x3ff; break; // Battery voltage
339		case 3: ad_value = 0x280; break; // Battery type
340		case 4: ad_value = 0x000; break; // Battery temperature
341		case 5: ad_value = 0x000; break; // Charger voltage
342		case 6: ad_value = 0x000; break; // VCX0 (Voltage controlled oscilator) temperature
343		case 7: ad_value = 0x000; break; // Charging current
	336	case 0: ad_value = 0x000; break; // Accessory Detect
	337	case 1: ad_value = 0x3ff; break; // Received signal strength
	338	case 2: ad_value = 0x3ff; break; // Battery voltage
	339	case 3: ad_value = 0x280; break; // Battery type
	340	case 4: ad_value = 0x000; break; // Battery temperature
	341	case 5: ad_value = 0x000; break; // Charger voltage
	342	case 6: ad_value = 0x000; break; // VCX0 (Voltage controlled oscilator) temperature
	343	case 7: ad_value = 0x000; break; // Charging current
344	344	}
345	345
346	346	m_ccont.regs[addr] = data;
r253023	r253024
348	348	m_ccont.regs[3] = ((ad_value >> 8) & 0x03);
349	349	break;
350	350	}
351		case 0x5: // CCONT watchdog
	351	case 0x5: // CCONT watchdog
352	352	if (data == 0x20)
353	353	m_ccont.regs[addr] = data;
354	354	else if (data == 0x31)
r253023	r253024
382	382
383	383	switch(addr)
384	384	{
385		case 0x3: data = 0xb0 \| (m_ccont.regs[addr] & 0x03); break;
386		case 0x7: data = systime.local_time.second; break;
387		case 0x8: data = systime.local_time.minute; break;
388		case 0x9: data = systime.local_time.hour; break;
389		case 0xa: data = systime.local_time.mday; break;
390		case 0xe: data \|= 0x01; break;
	385	case 0x3: data = 0xb0 \| (m_ccont.regs[addr] & 0x03); break;
	386	case 0x7: data = systime.local_time.second; break;
	387	case 0x8: data = systime.local_time.minute; break;
	388	case 0x9: data = systime.local_time.hour; break;
	389	case 0xa: data = systime.local_time.mday; break;
	390	case 0xe: data \|= 0x01; break;
391	391	}
392	392
393	393	m_ccont.dc = !m_ccont.dc;
r253023	r253024
460	460	{
461	461	m_maincpu->reset();
462	462	machine_reset();
463		m_mad2_regs[0x01] \|= 0x02; // Last reset was by watchdog
	463	m_mad2_regs[0x01] \|= 0x02; // Last reset was by watchdog
464	464	}
465	465	}
466	466	}
r253023	r253024
468	468	READ16_MEMBER(noki3310_state::dsp_ram_r)
469	469	{
470	470	// HACK: avoid hangs when ARM try to communicate with the DSP
471		if (offset <= 0x004 >> 1) return 0x01;
472		if (offset == 0x0e0 >> 1) return 0x00;
473		if (offset == 0x0fe >> 1) return 0x01;
474		if (offset == 0x100 >> 1) return 0x01;
	471	if (offset <= 0x004 >> 1) return 0x01;
	472	if (offset == 0x0e0 >> 1) return 0x00;
	473	if (offset == 0x0fe >> 1) return 0x01;
	474	if (offset == 0x100 >> 1) return 0x01;
475	475
476	476	return m_dsp_ram[offset & 0x7ff];
477	477	}
r253023	r253024
488	488	switch(offset)
489	489	{
490	490	case 0x00:
491		data = 0x40; // ASIC version
	491	data = 0x40; // ASIC version
492	492	break;
493	493	case 0x04:
494	494	data = m_timer1_counter >> 8;
r253023	r253024
535	535	data = nokia_ccont_r();
536	536	break;
537	537	case 0x6d:
538		data = 0x07; // GENSIO ready
	538	data = 0x07; // GENSIO ready
539	539	break;
540	540	}
541	541
r253023	r253024
553	553	{
554	554	case 0x02:
555	555	//printf("DSP %s\n", data & 1 ? "RUN" : "HOLD");
556		//if (data & 0x01) debugger_break(machine());
	556	//if (data & 0x01) debugger_break(machine());
557	557	break;
558	558	case 0x08:
559	559	ack_fiq(data);
r253023	r253024
624	624
625	625	static ADDRESS_MAP_START( noki3310_map, AS_PROGRAM, 32, noki3310_state )
626	626	ADDRESS_MAP_GLOBAL_MASK(0x00ffffff)
627		AM_RANGE(0x00000000, 0x0000ffff) AM_MIRROR(0x80000) AM_READWRITE16(ram_r, ram_w, 0xffffffff) // boot ROM / RAM
628		AM_RANGE(0x00010000, 0x00010fff) AM_MIRROR(0x8f000) AM_READWRITE16(dsp_ram_r, dsp_ram_w, 0xffffffff) // DSP shared memory
629		AM_RANGE(0x00020000, 0x000200ff) AM_MIRROR(0x8ff00) AM_READWRITE8(mad2_io_r, mad2_io_w, 0xffffffff) // IO (Primary I/O range, configures peripherals)
630		AM_RANGE(0x00030000, 0x00030003) AM_MIRROR(0x8fffc) AM_READWRITE8(mad2_dspif_r, mad2_dspif_w, 0xffffffff) // DSPIF (API control register)
631		AM_RANGE(0x00040000, 0x00040003) AM_MIRROR(0x8fffc) AM_READWRITE8(mad2_mcuif_r, mad2_mcuif_w, 0xffffffff) // MCUIF (Secondary I/O range, configures memory ranges)
632		AM_RANGE(0x00100000, 0x0017ffff) AM_READWRITE16(ram_r, ram_w, 0xffffffff) // RAMSelX
633		AM_RANGE(0x00200000, 0x005fffff) AM_DEVREADWRITE16("flash", intelfsh16_device, read, write, 0xffffffff) // ROM1SelX
634		AM_RANGE(0x00600000, 0x009fffff) AM_UNMAP // ROM2SelX
635		AM_RANGE(0x00a00000, 0x00dfffff) AM_UNMAP // EEPROMSelX
636		AM_RANGE(0x00e00000, 0x00ffffff) AM_UNMAP // Reserved
	627	AM_RANGE(0x00000000, 0x0000ffff) AM_MIRROR(0x80000) AM_READWRITE16(ram_r, ram_w, 0xffffffff) // boot ROM / RAM
	628	AM_RANGE(0x00010000, 0x00010fff) AM_MIRROR(0x8f000) AM_READWRITE16(dsp_ram_r, dsp_ram_w, 0xffffffff) // DSP shared memory
	629	AM_RANGE(0x00020000, 0x000200ff) AM_MIRROR(0x8ff00) AM_READWRITE8(mad2_io_r, mad2_io_w, 0xffffffff) // IO (Primary I/O range, configures peripherals)
	630	AM_RANGE(0x00030000, 0x00030003) AM_MIRROR(0x8fffc) AM_READWRITE8(mad2_dspif_r, mad2_dspif_w, 0xffffffff) // DSPIF (API control register)
	631	AM_RANGE(0x00040000, 0x00040003) AM_MIRROR(0x8fffc) AM_READWRITE8(mad2_mcuif_r, mad2_mcuif_w, 0xffffffff) // MCUIF (Secondary I/O range, configures memory ranges)
	632	AM_RANGE(0x00100000, 0x0017ffff) AM_READWRITE16(ram_r, ram_w, 0xffffffff) // RAMSelX
	633	AM_RANGE(0x00200000, 0x005fffff) AM_DEVREADWRITE16("flash", intelfsh16_device, read, write, 0xffffffff) // ROM1SelX
	634	AM_RANGE(0x00600000, 0x009fffff) AM_UNMAP // ROM2SelX
	635	AM_RANGE(0x00a00000, 0x00dfffff) AM_UNMAP // EEPROMSelX
	636	AM_RANGE(0x00e00000, 0x00ffffff) AM_UNMAP // Reserved
637	637	ADDRESS_MAP_END
638	638
639	639
640	640	INPUT_CHANGED_MEMBER( noki3310_state::key_irq )
641	641	{
642		if (!newval) // TODO: COL/ROW IRQ mask
	642	if (!newval) // TODO: COL/ROW IRQ mask
643	643	assert_irq(0);
644	644	}
645	645
646	646	static INPUT_PORTS_START( noki3310 )
647	647	PORT_START("COL.0")
648	648	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
649		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_UP) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
650		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_0) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
	649	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_UP) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
	650	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_0) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
651	651	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
652		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_DEL) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
	652	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_DEL) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
653	653
654	654	PORT_START("COL.1")
655	655	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
656		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_DOWN) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
	656	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_DOWN) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
657	657	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
658		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_2) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
659		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_1) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
	658	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_2) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
	659	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_1) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
660	660
661	661	PORT_START("COL.2")
662	662	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
663	663	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )
664		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_6) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
665		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_5) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
666		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_4) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
	664	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_6) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
	665	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_5) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
	666	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_4) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
667	667
668	668	PORT_START("COL.3")
669	669	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
670	670	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )
671		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_9) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
672		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_8) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
673		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_7) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
	671	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_9) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
	672	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_8) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
	673	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_7) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
674	674
675	675	PORT_START("COL.4")
676	676	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
677		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_3) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
678		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_MINUS) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
679		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_ENTER) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
680		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_ASTERISK) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
	677	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_3) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
	678	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_MINUS) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
	679	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_ENTER) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
	680	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_ASTERISK) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
681	681
682	682	PORT_START("PWR")
683		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_SPACE) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
	683	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_CODE(KEYCODE_SPACE) PORT_CHANGED_MEMBER(DEVICE_SELF, noki3310_state, key_irq, 0)
684	684	PORT_BIT( 0x1d, IP_ACTIVE_LOW, IPT_UNUSED )
685	685	INPUT_PORTS_END
686	686
r253023	r253024
688	688	static MACHINE_CONFIG_START( noki3310, noki3310_state )
689	689
690	690	/* basic machine hardware */
691		MCFG_CPU_ADD("maincpu", ARM7_BE, 26000000 / 2) // MAD2WD1 13 MHz, clock internally supplied to ARM core can be divided by 2, in sleep mode a 32768 Hz clock is used
	691	MCFG_CPU_ADD("maincpu", ARM7_BE, 26000000 / 2) // MAD2WD1 13 MHz, clock internally supplied to ARM core can be divided by 2, in sleep mode a 32768 Hz clock is used
692	692	MCFG_CPU_PROGRAM_MAP(noki3310_map)
693	693
694	694	/* video hardware */
r253023	r253024
719	719	static MACHINE_CONFIG_DERIVED( noki3410, noki3330 )
720	720
721	721	MCFG_SCREEN_MODIFY("screen")
722		MCFG_SCREEN_SIZE(96, 65) // Philips OM6206
	722	MCFG_SCREEN_SIZE(96, 65) // Philips OM6206
723	723
724	724	MACHINE_CONFIG_END
725	725
726	726	static MACHINE_CONFIG_DERIVED( noki7110, noki3330 )
727	727
728	728	MCFG_SCREEN_MODIFY("screen")
729		MCFG_SCREEN_SIZE(96, 65) // Epson SED1565
	729	MCFG_SCREEN_SIZE(96, 65) // Epson SED1565
730	730
731	731	MACHINE_CONFIG_END
732	732
r253023	r253024
740	740
741	741	// MAD2 internal ROMS
742	742	#define MAD2_INTERNAL_ROMS \
743		ROM_REGION16_BE(0x10000, "boot_rom", ROMREGION_ERASE00 ) \
744		ROM_LOAD("boot_rom", 0x00000, 0x10000, NO_DUMP) \
	743	ROM_REGION16_BE(0x10000, "boot_rom", ROMREGION_ERASE00 ) \
	744	ROM_LOAD("boot_rom", 0x00000, 0x10000, NO_DUMP) \
745	745	\
746		ROM_REGION16_BE(0x20000, "dsp", ROMREGION_ERASE00 ) \
747		ROM_LOAD("dsp_prom" , 0x00000, 0xc000, NO_DUMP) \
748		ROM_LOAD("dsp_drom" , 0x0c000, 0x4000, NO_DUMP) \
749		ROM_LOAD("dsp_pdrom", 0x10000, 0x1000, NO_DUMP) \
	746	ROM_REGION16_BE(0x20000, "dsp", ROMREGION_ERASE00 ) \
	747	ROM_LOAD("dsp_prom" , 0x00000, 0xc000, NO_DUMP) \
	748	ROM_LOAD("dsp_drom" , 0x0c000, 0x4000, NO_DUMP) \
	749	ROM_LOAD("dsp_pdrom", 0x10000, 0x1000, NO_DUMP)
750	750
751
752	751	ROM_START( noki3210 )
753	752	MAD2_INTERNAL_ROMS
754	753
755	754	ROM_REGION16_BE(0x200000, "flash", ROMREGION_ERASEFF )
756		ROM_SYSTEM_BIOS(0, "600", "v6.00") // A 03-10-2000
	755	ROM_SYSTEM_BIOS(0, "600", "v6.00") // A 03-10-2000
757	756	ROMX_LOAD("3210F600A.fls", 0x000000, 0x200000, CRC(6a978478) SHA1(6bdec2ec76aca15bc12b621be4402e455562454b), ROM_BIOS(1))
758	757
759	758	ROM_REGION16_BE(0x04000, "eeprom", 0 )
r253023	r253024
764	763	MAD2_INTERNAL_ROMS
765	764
766	765	ROM_REGION16_BE(0x200000, "flash", ROMREGION_ERASEFF )
767		ROM_SYSTEM_BIOS(0, "607", "v6.07") // C 17-06-2003
768		ROM_SYSTEM_BIOS(1, "579", "v5.79") // N 11-11-2002
769		ROM_SYSTEM_BIOS(2, "513", "v5.13") // C 11-01-2002
	766	ROM_SYSTEM_BIOS(0, "607", "v6.07") // C 17-06-2003
	767	ROM_SYSTEM_BIOS(1, "579", "v5.79") // N 11-11-2002
	768	ROM_SYSTEM_BIOS(2, "513", "v5.13") // C 11-01-2002
770	769	ROMX_LOAD("3310_607_PPM_C.fls", 0x000000, 0x200000, CRC(5743f6ba) SHA1(0e80b5f1698909c9850be770c1289566582aa77a), ROM_BIOS(1))
771	770	ROMX_LOAD("3310 NR1 v5.79.fls", 0x000000, 0x200000, CRC(26b4f0df) SHA1(649de05ed88205a080693b918cd1295ac691dff1), ROM_BIOS(2))
772	771	ROMX_LOAD("3310 v. 5.13 C.fls", 0x000000, 0x1d0000, CRC(0f66d256) SHA1(04d8dabe2c454d6a1161f352d85c69c409895000), ROM_BIOS(3))
r253023	r253024
782	781	MAD2_INTERNAL_ROMS
783	782
784	783	ROM_REGION16_BE(0x0400000, "flash", ROMREGION_ERASEFF )
785		ROM_SYSTEM_BIOS(0, "450", "v4.50") // C 12-10-2001
	784	ROM_SYSTEM_BIOS(0, "450", "v4.50") // C 12-10-2001
786	785	ROMX_LOAD("3330F450C.fls", 0x000000, 0x350000, CRC(259313e7) SHA1(88bcc39d9358fd8a8562fe3a0280f0ce82f5897f), ROM_BIOS(1))
787	786	ROM_LOAD("3330 virgin eeprom 005F0000.fls", 0x3f0000, 0x010000, CRC(23459c10) SHA1(68481effb39d90a1639e8f261009c66e97d3e668))
788	787	ROM_END
r253023	r253024
791	790	MAD2_INTERNAL_ROMS
792	791
793	792	ROM_REGION16_BE(0x0400000, "flash", ROMREGION_ERASEFF )
794		ROM_SYSTEM_BIOS(0, "506", "v5.06") // C 29-11-2002
	793	ROM_SYSTEM_BIOS(0, "506", "v5.06") // C 29-11-2002
795	794	ROMX_LOAD("3410_5-06c.fls", 0x000000, 0x370000, CRC(1483e094) SHA1(ef26026297c779de7b01923a364ded822e720c38), ROM_BIOS(1))
796	795	ROM_END
797	796
r253023	r253024
799	798	MAD2_INTERNAL_ROMS
800	799
801	800	ROM_REGION16_BE(0x0400000, "flash", ROMREGION_ERASEFF )
802		ROM_SYSTEM_BIOS(0, "540", "v5.40") // C 11-10-2003
803		ROM_SYSTEM_BIOS(1, "525", "v5.25") // C 26-02-2003
804		ROM_SYSTEM_BIOS(2, "520", "v5.20") // C 12-08-2002
	801	ROM_SYSTEM_BIOS(0, "540", "v5.40") // C 11-10-2003
	802	ROM_SYSTEM_BIOS(1, "525", "v5.25") // C 26-02-2003
	803	ROM_SYSTEM_BIOS(2, "520", "v5.20") // C 12-08-2002
805	804	ROMX_LOAD("5210_5.40_PPM_C.FLS", 0x000000, 0x380000, CRC(e37d5beb) SHA1(726f000780dd67750b7d2859687f846ce17a1bf7), ROM_BIOS(1))
806	805	ROMX_LOAD("5210_5.25_PPM_C.FLS", 0x000000, 0x380000, CRC(13bba458) SHA1(3b5244244743fba48f9061e158f95fc46b86446e), ROM_BIOS(2))
807	806	ROMX_LOAD("5210_520_C.fls", 0x000000, 0x380000, CRC(38648cd3) SHA1(9210e15e6bd780f86c467bec33ef54d6393abe5a), ROM_BIOS(3))
r253023	r253024
811	810	MAD2_INTERNAL_ROMS
812	811
813	812	ROM_REGION16_BE(0x0400000, "flash", ROMREGION_ERASEFF )
814		ROM_SYSTEM_BIOS(0, "556", "v5.56") // C 25-01-2002
	813	ROM_SYSTEM_BIOS(0, "556", "v5.56") // C 25-01-2002
815	814	ROMX_LOAD("6210_556C.fls", 0x000000, 0x3a0000, CRC(203fb962) SHA1(3d9ea319503e78ec69b60d72cda23e461e118ea9), ROM_BIOS(1))
816	815	ROM_LOAD("6210 virgin eeprom 005FA000.fls", 0x3fa000, 0x006000, CRC(3c6d3437) SHA1(b3a527ede1be87bd715fb3741a81eef5bd422efa))
817	816	ROM_END
r253023	r253024
820	819	MAD2_INTERNAL_ROMS
821	820
822	821	ROM_REGION16_BE(0x0400000, "flash", ROMREGION_ERASEFF )
823		ROM_SYSTEM_BIOS(0, "503", "v5.03") // C 06-12-2001
	822	ROM_SYSTEM_BIOS(0, "503", "v5.03") // C 06-12-2001
824	823	ROMX_LOAD("6250-503mcuPPMC.fls", 0x000000, 0x3a0000, CRC(8dffb91b) SHA1(95607ce39c383bda75f1e6aeae67a214b787b0a1), ROM_BIOS(1))
825	824	ROM_LOAD("6250 virgin eeprom 005FA000.fls", 0x3fa000, 0x006000, CRC(6087ce70) SHA1(57c29c8387caf864603d94a22bfb63ace427b7f9))
826	825	ROM_END
r253023	r253024
829	828	MAD2_INTERNAL_ROMS
830	829
831	830	ROM_REGION16_BE(0x0400000, "flash", ROMREGION_ERASEFF )
832		ROM_SYSTEM_BIOS(0, "501", "v5.01") // C 08-12-2000
	831	ROM_SYSTEM_BIOS(0, "501", "v5.01") // C 08-12-2000
833	832	ROMX_LOAD("7110F501_ppmC.fls", 0x000000, 0x390000, CRC(919ac753) SHA1(53af8324919f455ba8199d2c05f7a921cfb811d5), ROM_BIOS(1))
834	833	ROM_LOAD("7110 virgin eeprom 005FA000.fls", 0x3fa000, 0x006000, CRC(78e7d8c1) SHA1(8b4dd782fc9d1306268ba63124ee463ac646912b))
835	834	ROM_END
r253023	r253024
838	837	MAD2_INTERNAL_ROMS
839	838
840	839	ROM_REGION16_BE(0x200000, "flash", ROMREGION_ERASEFF )
841		ROM_SYSTEM_BIOS(0, "531", "v5.31") // C 08-03-2002
	840	ROM_SYSTEM_BIOS(0, "531", "v5.31") // C 08-03-2002
842	841	ROMX_LOAD("8210_5.31PPM_C.FLS", 0x000000, 0x1d0000, CRC(927022b1) SHA1(c1a0fe95cedb89a92b19654208cc4855e1a4988e), ROM_BIOS(1))
843	842	ROM_LOAD("8210 virgin eeprom 003D0000.fls", 0x1d0000, 0x030000, CRC(37fddeea) SHA1(1c01ad3948ff9919890498a84f31052369d93e1d))
844	843	ROM_END
r253023	r253024
847	846	MAD2_INTERNAL_ROMS
848	847
849	848	ROM_REGION16_BE(0x200000, "flash", ROMREGION_ERASEFF )
850		ROM_SYSTEM_BIOS(0, "502", "v5.02") // K 28-01-2002
	849	ROM_SYSTEM_BIOS(0, "502", "v5.02") // K 28-01-2002
851	850	ROMX_LOAD("8250-502mcuPPMK.fls", 0x000000, 0x1d0000, CRC(2c58e48b) SHA1(f26c98ffcfffbbd5714889e10cfa41c5f6dd2529), ROM_BIOS(1))
852	851	ROM_LOAD("8250 virgin eeprom 003D0000.fls", 0x1d0000, 0x030000, CRC(7ca585e0) SHA1(a974fb5fddcd0438ac4aaf32b431f1453e8d923c))
853	852	ROM_END
r253023	r253024
856	855	MAD2_INTERNAL_ROMS
857	856
858	857	ROM_REGION16_BE(0x200000, "flash", ROMREGION_ERASEFF )
859		ROM_SYSTEM_BIOS(0, "531", "v5.31") // C 08-03-2002
	858	ROM_SYSTEM_BIOS(0, "531", "v5.31") // C 08-03-2002
860	859	ROMX_LOAD("8850v531.fls", 0x000000, 0x1d0000, CRC(8864fcb3) SHA1(9f966787403b68a09530680ad911302403eb1521), ROM_BIOS(1))
861	860	ROM_LOAD("8850 virgin eeprom 003D0000.fls", 0x1d0000, 0x030000, CRC(4823f27e) SHA1(b09455302d98fbedf35072c9ecfd7721a04924b0))
862	861	ROM_END
r253023	r253024
865	864	MAD2_INTERNAL_ROMS
866	865
867	866	ROM_REGION16_BE(0x200000, "flash", ROMREGION_ERASEFF )
868		ROM_SYSTEM_BIOS(0, "1220", "v12.20") // C 19-03-2001
	867	ROM_SYSTEM_BIOS(0, "1220", "v12.20") // C 19-03-2001
869	868	ROMX_LOAD("8890_12.20_ppmC.FLS", 0x000000, 0x1d0000, CRC(77206f78) SHA1(a214a0d69760ecd8eeca0b9d82f95c94bdfe70ed), ROM_BIOS(1))
870	869	ROM_LOAD("8890 virgin eeprom 003D0000.fls", 0x1d0000, 0x030000, CRC(1d8ef3b5) SHA1(cc0924cfd4c0ce796fca157c640fc3183c2b5f2c))
871	870	ROM_END

trunk/src/mame/drivers/nova2001.cpp
r253023	r253024
314	314	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
315	315
316	316	PORT_START("IN2")
317		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(4)
	317	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(4)
318	318	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START1 )
319	319	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START2 )
320	320	PORT_BIT( 0x78, IP_ACTIVE_LOW, IPT_UNUSED )
r253023	r253024
1020	1020	// many of these don't explicitly state Japan, eg. Nova 2001 could easily be used anywhere.
1021	1021
1022	1022	// YEAR, NAME, PARENT, MACHINE, INPUT, INIT, MONITOR,COMPANY,FULLNAME,FLAGS
1023		GAME( 1983, nova2001, 0, nova2001, nova2001, driver_device, 0, ROT0, "UPL", "Nova 2001 (Japan)", MACHINE_SUPPORTS_SAVE )
	1023	GAME( 1983, nova2001, 0, nova2001, nova2001, driver_device, 0, ROT0, "UPL", "Nova 2001 (Japan)", MACHINE_SUPPORTS_SAVE )
1024	1024	GAME( 1983, nova2001h, nova2001, nova2001, nova2001, driver_device, 0, ROT0, "UPL", "Nova 2001 (Japan, hack?)", MACHINE_SUPPORTS_SAVE )
1025	1025	GAME( 1983, nova2001u, nova2001, nova2001, nova2001, driver_device, 0, ROT0, "UPL (Universal license)", "Nova 2001 (US)", MACHINE_SUPPORTS_SAVE )
1026	1026	GAME( 1984, ninjakun, 0, ninjakun, ninjakun, driver_device, 0, ROT0, "UPL (Taito license)", "Ninjakun Majou no Bouken", MACHINE_SUPPORTS_SAVE )

trunk/src/mame/drivers/pacman.cpp
r253023	r253024
4156	4156	ROM_LOAD( "13.5f", 0x1000, 0x0800, CRC(22b0188a) SHA1(a9ed9ca8b36a60081fd364abc9bc23963932cc0b) )
4157	4157	ROM_LOAD( "15.5j", 0x1800, 0x0800, CRC(50c7477d) SHA1(c04ec282a8cb528df5e38ad750d12ee71612695d) )
4158	4158
4159		// Color PROMs have been dumped. They match the pacman/mspacman ones
	4159	// Color PROMs have been dumped. They match the pacman/mspacman ones
4160	4160	ROM_REGION( 0x0120, "proms", 0 )
4161	4161	ROM_LOAD( "n82s123n.7f", 0x0000, 0x0020, CRC(2fc650bd) SHA1(8d0268dee78e47c712202b0ec4f1f51109b1f2a5) )
4162	4162	ROM_LOAD( "m7611.4a", 0x0020, 0x0100, CRC(3eb3a8e4) SHA1(19097b5f60d1030f8b82d9f1d3a241f93e5c75d6) )
r253023	r253024
4177	4177	ROM_LOAD( "13.5f", 0x1000, 0x0800, CRC(22b0188a) SHA1(a9ed9ca8b36a60081fd364abc9bc23963932cc0b) )
4178	4178	ROM_LOAD( "15.5j", 0x1800, 0x0800, CRC(50c7477d) SHA1(c04ec282a8cb528df5e38ad750d12ee71612695d) )
4179	4179
4180		// Color PROMs have been dumped. They match the pacman/mspacman ones
	4180	// Color PROMs have been dumped. They match the pacman/mspacman ones
4181	4181	ROM_REGION( 0x0120, "proms", 0 )
4182	4182	ROM_LOAD( "n82s123n.7f", 0x0000, 0x0020, CRC(2fc650bd) SHA1(8d0268dee78e47c712202b0ec4f1f51109b1f2a5) )
4183	4183	ROM_LOAD( "m7611.4a", 0x0020, 0x0100, CRC(3eb3a8e4) SHA1(19097b5f60d1030f8b82d9f1d3a241f93e5c75d6) )

trunk/src/mame/drivers/proconn.cpp
r253023	r253024
189	189	required_device<z80dart_device> m_z80sio;
190	190	required_device<ay8910_device> m_ay;
191	191	required_device<meters_device> m_meters;
192
	192
193	193	public:
194	194	int m_meter;
195	195	DECLARE_DRIVER_INIT(proconn);
r253023	r253024
379	379	MCFG_SOUND_ADD("aysnd", AY8910, 1000000) /* ?? Mhz */ // YM2149F on PC92?
380	380	MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(proconn_state, meter_w))
381	381	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.33)
382
	382
383	383	MCFG_DEVICE_ADD("meters", METERS, 0)
384	384	MCFG_METERS_NUMBER(8)
385	385	MACHINE_CONFIG_END

trunk/src/mame/drivers/prophet600.cpp
r253023	r253024
3	3	/***************************************************************************
4	4
5	5	prophet600.cpp - Sequential Circuits Prophet-600, designed by Dave Smith
6
7		This was the first commercial synthesizer with built-in MIDI.
8
	6
	7	This was the first commercial synthesizer with built-in MIDI.
	8
9	9	Skeleton driver by R. Belmont
10	10
11	11	Hardware:
r253023	r253024
18	18	0x4000-0x4001: DAC for CV/gate drive
19	19	0x6000-0x6001: 6850 writes
20	20	0xe000-0xe001: 6850 reads
21
	21
22	22	I/O map:
23		00-07: 8253 PIT
	23	00-07: 8253 PIT
24	24	08: set row to scan for keyboard/panel input and LED / lamp output
25	25	09: read: analog comparitor, some value vs. the DAC. write: output for LEDs/lamps
26		comparitor bits:
27		bit 1: FFFStatus
28		bit 2: output of 8253 channel 2
29		bit 3: ADCCompare: returns sign of if current value is > or < the DAC value
30
31		0a: read: keyboard/panel input scan bits, write: select a pot on the panel for the comparitor
	26	comparitor bits:
	27	bit 1: FFFStatus
	28	bit 2: output of 8253 channel 2
	29	bit 3: ADCCompare: returns sign of if current value is > or < the DAC value
	30
	31	0a: read: keyboard/panel input scan bits, write: select a pot on the panel for the comparitor
32	32	0b: write: update all gate signals
33	33	0c: ???
34	34	0d: write: select which CV signal will be updated with the current DAC value
35	35	0e: write: mask, masks
36		bit 0: FFFP -FF P
37		bit 1: mask gate from 8253
38		bit 3: FFFD FF D
39		bit 4: FFFCL -FF CL
40
41
	36	bit 0: FFFP -FF P
	37	bit 1: mask gate from 8253
	38	bit 3: FFFD FF D
	39	bit 4: FFFCL -FF CL
	40
	41
42	42	Info:
43	43	- Prophet 600 Technical Manual
44
	44
45	45	- https://github.com/gligli/p600fw - GPLv3 licensed complete replacement firmware
46	46	for the Prophet 600, but written in C and runs on an AVR that replaces the original
47	47	Z80.
48
	48
49	49	***************************************************************************/
50	50
51	51	#include "emu.h"
r253023	r253024
57	57
58	58	#include "prophet600.lh"
59	59
60		#define MAINCPU_TAG "z80"
61		#define PIT_TAG "pit"
62		#define UART_TAG "uart"
	60	#define MAINCPU_TAG "z80"
	61	#define PIT_TAG "pit"
	62	#define UART_TAG "uart"
63	63
64	64	enum
65	65	{
66		CV_CV_Osc1A = 0, CV_Osc2A, CV_Osc3A, CV_Osc4A, CV_Osc5A, CV_Osc6A,
67		CV_Osc1B, CV_Osc2B, CV_Osc3B, CV_Osc4B, CV_Osc5B, CV_Osc6B,
68		CV_Flt1, CV_Flt2, CV_Flt3, CV_Flt4, CV_Flt5, CV_Flt6,
69		CV_Amp1, CV_Amp2, CV_Amp3, CV_Amp4, CV_Amp5, CV_Amp6,
	66	CV_CV_Osc1A = 0, CV_Osc2A, CV_Osc3A, CV_Osc4A, CV_Osc5A, CV_Osc6A,
	67	CV_Osc1B, CV_Osc2B, CV_Osc3B, CV_Osc4B, CV_Osc5B, CV_Osc6B,
	68	CV_Flt1, CV_Flt2, CV_Flt3, CV_Flt4, CV_Flt5, CV_Flt6,
	69	CV_Amp1, CV_Amp2, CV_Amp3, CV_Amp4, CV_Amp5, CV_Amp6,
70	70	CV_PModOscB, CV_VolA, CV_VolB, CV_MasterVol, CV_APW, CV_ExtFilter, CV_Resonance, CV_BPW,
71	71
72	72	CV_MAX
r253023	r253024
188	188	WRITE8_MEMBER(prophet600_state::mask_w)
189	189	{
190	190	m_nmi_gate = (data & 0x02) ? true : false;
191		if (m_nmi_gate) // gate is set, comparitor line is pulled up to Vcc
	191	if (m_nmi_gate) // gate is set, comparitor line is pulled up to Vcc
192	192	{
193	193	m_comparitor \|= 0x04;
194	194	}
r253023	r253024
197	197	m_comparitor &= ~0x04;
198	198	}
199	199
200		// printf("8253 gate = %x\n", data & 0x02);
	200	// printf("8253 gate = %x\n", data & 0x02);
201	201	}
202	202
203	203	WRITE8_MEMBER(prophet600_state::cv_w)
r253023	r253024
222	222	}
223	223
224	224	/* Pots: Mixer=0,Cutoff=1,Resonance=2,FilEnvAmt=3,FilRel=4,FilSus=5,
225		FilDec=6,FilAtt=7,AmpRel=8,AmpSus=9,AmpDec=10,AmpAtt=11,
226		Glide=12,BPW=13,MVol=14,MTune=15,PitchWheel=16,ModWheel=22,
	225	FilDec=6,FilAtt=7,AmpRel=8,AmpSus=9,AmpDec=10,AmpAtt=11,
	226	Glide=12,BPW=13,MVol=14,MTune=15,PitchWheel=16,ModWheel=22,
227	227	Speed,APW,PModFilEnv,LFOFreq,PModOscB,LFOAmt,FreqB,FreqA,FreqBFine
228	228	*/
229	229	WRITE8_MEMBER(prophet600_state::potmux_w)
r253023	r253024
232	232
233	233	READ8_MEMBER(prophet600_state::comparitor_r)
234	234	{
235		// m_comparitor ^= 0x04;
	235	// m_comparitor ^= 0x04;
236	236	return m_comparitor;
237	237	}
238	238
r253023	r253024
274	274	MCFG_PIT8253_CLK1(XTAL_8MHz/4)
275	275	MCFG_PIT8253_CLK2(XTAL_8MHz/4)
276	276	MCFG_PIT8253_OUT0_HANDLER(WRITELINE(prophet600_state, pit_ch0_tick_w))
277		MCFG_PIT8253_OUT2_HANDLER(WRITELINE(prophet600_state, pit_ch2_tick_w))
	277	MCFG_PIT8253_OUT2_HANDLER(WRITELINE(prophet600_state, pit_ch2_tick_w))
278	278
279	279	MCFG_DEVICE_ADD(UART_TAG, ACIA6850, 0)
280	280	MCFG_ACIA6850_TXD_HANDLER(DEVWRITELINE("mdout", midi_port_device, write_txd))
r253023	r253024
285	285
286	286	MCFG_MIDI_PORT_ADD("mdout", midiout_slot, "midiout")
287	287
288		MCFG_DEVICE_ADD("acia_clock", CLOCK, XTAL_8MHz/16) // 500kHz = 16 times the MIDI rate
	288	MCFG_DEVICE_ADD("acia_clock", CLOCK, XTAL_8MHz/16) // 500kHz = 16 times the MIDI rate
289	289	MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(prophet600_state, acia_clock_w))
290	290
291	291	MACHINE_CONFIG_END

trunk/src/mame/drivers/psychic5.cpp
r253023	r253024
321	321	- Bombs Away sports following issues, which indicates it's a unfinished product:
322	322	- missing bullets (missing data from ROMs);
323	323	- missing levels above 4 (missing data from ROMs);
324		- occasionally wrong flip x when the player route is from up to down;
	324	- occasionally wrong flip x when the player route is from up to down;
325	325	- enemy counter stops entirely when the S is collected;
326	326	- boss fights uses always the same pattern;
327	327	- single BGM repeated over and over, for every level;

trunk/src/mame/drivers/rsc55.cpp
r253023	r253024
71	71	MACHINE_CONFIG_END
72	72
73	73	ROM_START( sc55 )
74		ROM_REGION( 0x40000, "maincpu", 0 ) // additional H8/532 code and patch data - revisions match main CPU revisions
	74	ROM_REGION( 0x40000, "maincpu", 0 ) // additional H8/532 code and patch data - revisions match main CPU revisions
75	75	ROM_LOAD( "roland_r15209363.ic23", 0x000000, 0x040000, CRC(2dc58549) SHA1(9c17f85e784dc1549ac1f98d457b353393331f6b) )
76	76
77	77	ROM_REGION( 0x300000, "la", 0 )

trunk/src/mame/drivers/seattle.cpp
r253023	r253024
2864	2864	ROM_SYSTEM_BIOS( 3, "up16_3", "Disk Update 1.0x to 2.1a (1.25) Step 3 of 3" )
2865	2865	ROMX_LOAD("eprom #3 2.1A 3286", 0x000000, 0x100000, CRC(e7d8c88f) SHA1(06c11241ac439527b361826784aef4c58689892e), ROM_BIOS(4))
2866	2866
2867
	2867
2868	2868	DISK_REGION( "ide:0:hdd:image" ) /* Release version 1.0r8a (4/10/98) (Guts 4/10/98, Main 4/10/98) */
2869	2869	DISK_IMAGE( "cs_10r8a", 0, SHA1(ba4e7589740e0647938c81c5082bb71d8826bad4) )
2870	2870

trunk/src/mame/drivers/sfkick.cpp
r253023	r253024
85	85	GND \| e \| 27\| GND
86	86	GND \| f \| 28\| GND
87	87
88		____
	88	____
89	89	/ \
90	90	\| Dial \|
91	91	\____/
92		/\| \|\
	92	/\| \|\
93	93	/ \| \| \
94	94	Blue Red Black Yellow
95	95	/ \| \| \
r253023	r253024
510	510	PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(25) PORT_KEYDELTA(-20)
511	511
512	512	PORT_START("DSW1") /* bitswapped at read! 76543210 -> 45673210 */
513		PORT_DIPNAME( 0x10, 0x10, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:1")
	513	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:1")
514	514	PORT_DIPSETTING( 0x10, DEF_STR( Upright ) )
515	515	PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
516		PORT_DIPNAME( 0x01, 0x01, "Stage Select" ) PORT_DIPLOCATION("SW1:2") /* How does this work?? */
	516	PORT_DIPNAME( 0x01, 0x01, "Stage Select" ) PORT_DIPLOCATION("SW1:2") /* How does this work?? */
517	517	PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
518	518	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
519		PORT_DIPNAME( 0x20, 0x20, "Freeze" ) PORT_DIPLOCATION("SW1:3")
	519	PORT_DIPNAME( 0x20, 0x20, "Freeze" ) PORT_DIPLOCATION("SW1:3")
520	520	PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
521	521	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
522		PORT_DIPNAME( 0x02, 0x02, "Test Mode" ) PORT_DIPLOCATION("SW1:4")
	522	PORT_DIPNAME( 0x02, 0x02, "Test Mode" ) PORT_DIPLOCATION("SW1:4")
523	523	PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
524	524	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
525		PORT_DIPNAME( 0x40, 0x00, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW1:5")
	525	PORT_DIPNAME( 0x40, 0x00, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW1:5")
526	526	PORT_DIPSETTING( 0x40, DEF_STR( No ) )
527	527	PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
528		PORT_DIPNAME( 0x8c, 0x8c, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:6,8,7")
	528	PORT_DIPNAME( 0x8c, 0x8c, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:6,8,7")
529	529	PORT_DIPSETTING( 0x04, DEF_STR( 3C_1C ) )
530	530	PORT_DIPSETTING( 0x84, DEF_STR( 2C_1C ) )
531	531	PORT_DIPSETTING( 0x00, DEF_STR( 3C_2C ) )
r253023	r253024
537	537
538	538	PORT_START("DSW2") /* bitswapped at read! 76543210 -> 45673210 */
539	539	PORT_DIPUNUSED_DIPLOC( 0x10, IP_ACTIVE_LOW, "SW2:1" ) /* Manual states "No Comment" */
540		PORT_DIPNAME( 0x20, 0x20, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:2")
	540	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:2")
541	541	PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
542	542	PORT_DIPSETTING( 0x20, DEF_STR( On ) )
543		PORT_DIPNAME( 0x41, 0x01, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:3,4")
	543	PORT_DIPNAME( 0x41, 0x01, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:3,4")
544	544	PORT_DIPSETTING( 0x41, "1" )
545	545	PORT_DIPSETTING( 0x40, "2" )
546	546	PORT_DIPSETTING( 0x01, "3" )
547	547	PORT_DIPSETTING( 0x00, "5" )
548		PORT_DIPNAME( 0x82, 0x02, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:5,6")
	548	PORT_DIPNAME( 0x82, 0x02, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:5,6")
549	549	PORT_DIPSETTING( 0x80, "Every 20,000" )
550	550	PORT_DIPSETTING( 0x02, "20,000 & 50,000" )
551	551	PORT_DIPSETTING( 0x00, "Every 50,000" )
552	552	PORT_DIPSETTING( 0x82, DEF_STR( None ) )
553		PORT_DIPNAME( 0x0c, 0x08, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:7,8")
	553	PORT_DIPNAME( 0x0c, 0x08, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:7,8")
554	554	PORT_DIPSETTING( 0x0c, DEF_STR( Easy ) )
555	555	PORT_DIPSETTING( 0x08, DEF_STR( Normal ) )
556	556	PORT_DIPSETTING( 0x04, DEF_STR( Hard ) )

trunk/src/mame/drivers/snk.cpp
r253023	r253024
4982	4982	ROM_LOAD( "15.rom", 0x18000, 0x8000, CRC(65a61c99) SHA1(767694c919180de208b6211b593db68fc5a66ff1) )
4983	4983	ROM_LOAD( "13.rom", 0x20000, 0x8000, CRC(315383d7) SHA1(1c1c5931e3447c4dcbd54fc8ae383b03cb5fbf5b) )
4984	4984	ROM_LOAD( "16.rom", 0x28000, 0x8000, CRC(e9b03e07) SHA1(124e5328a965ea2af28c4d74934a82394a2ffd72) )
4985
	4985
4986	4986	ROM_REGION( 0x30000, "bootleg_proms", 0 )
4987		ROM_LOAD( "82s191.bin", 0x00000, 0x800, CRC(072f8622) SHA1(43b0d48656263e88067cddea1d01188755a2023d) ) //prom from a bootleg pcb
	4987	ROM_LOAD( "82s191.bin", 0x00000, 0x800, CRC(072f8622) SHA1(43b0d48656263e88067cddea1d01188755a2023d) ) //prom from a bootleg pcb
4988	4988	ROM_END
4989	4989
4990	4990

trunk/src/mame/drivers/spc1500.cpp
r253023	r253024
7	7	2015-12-16 preliminary driver initialized
8	8	2015-12-18 cassette tape supported
9	9	2015-12-26 80/40 column mode supported
10		2015-12-28 double access mode supported for I/O
	10	2015-12-28 double access mode supported for I/O
11	11	2016-01-02 Korean character input method and display enabled
12		2016-01-03 user defined char (PCG, Programmable Character Generator) support
13		2016-01-05 detection of color palette initialization
	12	2016-01-03 user defined char (PCG, Programmable Character Generator) support
	13	2016-01-05 detection of color palette initialization
14	14	2016-01-06 80x16 mode graphic mode support
15	15	2016-01-10 double character support
16	16	2016-01-12 PCG adressing improved
17	17	2016-01-13 Cassette tape motor improved
18
	18
19	19	TODO:
20	20	- Verify PCG ram read for Korean character (english character is fine)
21	21	- Support floppy disk drive with SD-1500A controller card
22
	22
23	23	****************************************************************************/
24	24
25	25	/*
r253023	r253024
32	32	* Market price 365,000 won ($430) on 04-01-1987
33	33
34	34	Hardware Specification
35
	35
36	36	1) SPC-1500
37	37	RAM 122KB
38	38	- Main Memory: 64KB
r253023	r253024
59	59	Two external power connector for FDD connection
60	60	- DIP switch settings for the screen
61	61	- Volume control
62
	62
63	63	2) SPC-1500A
64	64	July 1987 Release
65	65	RF modulator only remove the product from an existing model
66
	66
67	67	3) SPC-1500V
68	68	This product can not confirm the release date because of PCB level modification.
69	69	It equiped SPC-1500V VLSI chip embedded products and removed a lot of TTLs and the memory expansion card.
70	70	- IOCS ROM Version: 1.6
71	71	- Two internal 50-pin expension slots
72
	72
73	73	Firmware
74
	74
75	75	IOCS ROM
76	76	The various versions with 32KB of capacity existed to date has confirmed the final version number 1.8
77	77	- Version 1.3:
r253023	r253024
79	79	- Version 1.5:
80	80	- Version 1.6:
81	81	- Version 1.8: supports a variety of peripherals such as external hard disk, FM-Sound, RS-232C from Static soft (C)
82		various memu appears on the initial screen.
83
	82	various memu appears on the initial screen.
	83
84	84	BASIC ROM
85	85	Capacity and the final version number of the currently identified 32KB 1.3
86
	86
87	87	English ROM
88	88	The final version of the verification of the capacity 8KB SS150-1222
89	89	The character set of a 8x8 size, and are stored with the size 8x16 8x16 is a part of the size of the font data are written differently and 8x8.
90
	90
91	91	Hangul ROM
92	92	8KB each is divided by a consonant and consonant and neutral.
93	93	- Inital (Choseong) SS151-1223: 8 types of intial character (actual 6 types)
94	94	- Middle (Jungseong) SS152-1224: 2 types of middle character
95	95	- Final (Jongseong) SS153-1225: 2 types of final character
96
	96
97	97	Periperials - Monitor
98	98	- , high-resolution monitor SM, color monitor model was to distinguish it from CD.
99
	99
100	100	1) MD-1255H (Low resolution monitors MD)
101	101	- 12 inches Composite 15.734KHz / 60Hz
102	102	- N displayed after the model name in the model is non - CRT scanning products
103	103	- Stand adopted: if you put the rest on the bottom that can be placed slightly tilted back.
104
	104
105	105	2) MD-9052H (Low resolution monitors MD)
106	106	- 9 inches Composite 15.734KHz / 60Hz
107		- N from model name means 'anti-glare'
	107	- N from model name means 'anti-glare'
108	108	- All parts except for the appearance and size is the same as the CRT 1255H.
109
	109
110	110	3) MD-2563 (color monitor SM)
111	111	4) SM-1439A (high-resolution monitor SM)
112	112	5) SM-1422 (high-resolution monitor SM)
r253023	r253024
115	115	- High-resolution monochrome monitor
116	116	7) SM-1231A (high-resolution monitor SM)
117	117	- The other part is other than the appearance of the stand is attached to the same as the model SM-1231
118
119		8) CD-1451D (color monitor SM)
	118
	119	8) CD-1451D (color monitor SM)
120	120	- Composite color monitors
121	121	9) CD-1462X (color monitor SM)
122	122	10)CD-1464W (color monitor SM)
123		11)CW-4644
124
	123	11)CW-4644
	124
125	125	FDD (floppy disk drive)
126
	126
127	127	1) SD-1500A
128	128	- 5.25 "floppy drive for 2D composed of external disk drives diskettes
129		2) SD-1500B
	129	2) SD-1500B
130	130	- Dual external disk drives
131	131	- The two models are idential except the number of FDD. They need the expension controller card named by SFC-1500.
132	132	- IBM PC XT compatible FDD can be quipped. SFD-5x0 model is a genuine FDD from Samsung Electronics.
133	133
134	134	HDD (Hard Disk Drive)
135
	135
136	136	1) STH-20
137	137	- External hard disk drive set having a capacity of 20MB SCSI controller and the way
138	138	- The controller had not solved alone but the controller can be used to mount another hard disk products.
139	139	- Release price: 450,000 won ($530).
140
	140
141	141	Joysticks
142		- Joystick was limited to 1 as possible (The PCB was designed by supporting two joysticks.
143
	142	- Joystick was limited to 1 as possible (The PCB was designed by supporting two joysticks.
	143
144	144	1) SJ-1500
145	145	- Release price: 8,000 won ($9.4)
146	146	- SPC-1000A, MSX-compatible
147
	147
148	148	Printer
149
	149
150	150	1) SP-510S
151	151	- Bitmap image output method Hangul support
152	152	- Recommanded 80 columns dot-matrix printer
r253023	r253024
157	157	5) SP-570B
158	158
159	159	Expansion Cards
160
	160
161	161	1) SFC-1500
162	162	- External FDD capacity of the floppy disk controller 5.25 inches / 320KB can connect up to two.
163
	163
164	164	2) Multi-controller
165	165	- Floppy disk controllers and hard disk controllers on the same PCB.
166
	166
167	167	3) ST-PAC
168	168	- FM sound card can play with up to 9 simultaneous sound or 5 simultaneous sound and 5 drum tones at the same time (FM-PAC compatible MSX)
169	169	- Line output and speaker output volume, tone adjustment built-in volume
170		- it can be used as a synthesizer by connecting the ST-KEY2 product
	170	- it can be used as a synthesizer by connecting the ST-KEY2 product
171	171	- Release price: 60,000won ($71)
172
	172
173	173	SPC-1500 VDP card
174		- MSX game support
	174	- MSX game support
175	175	- Release price: 35,000won ($41) with composite output only
176	176	- Release price: 60,000won ($71) with composite and RGB outputs simultaneously
177
	177
178	178	VDP UNIT I
179	179	- Composite video output with built-in card expansion card using the same video chip and MSX (static soft)
180	180	- Release price: 40,000won ($47).
181
	181
182	182	VDP UNIT II
183	183	- Expansion using the same video chip and video card with built-in card MSX with an RGB output (static soft)
184	184	- Release price: 55,000won ($59).
185
	185
186	186	LAN card (SAMNET-K)
187	187	- It uses serial communication instead of an Ethernet network card has a way with two serial ports.
188	188	- There are two kinds of host card without a DIP switch and the DIP switch is in the client card.
189	189	- It was mainly supplied to the teacher / student in an educational institution.
190
	190
191	191	Super Pack Card
192	192	- Expansion cards that enable the external expansion slot, etc.
193
	193
194	194	RS-232C card
195		- At least 300bps, an external modem connected to the serial communication card that supports up to 19,200bps
196		additionally available communications services using the PSTN network (general switched telephone network)
197		and may also be connected to a 9-pin serial mouse.
198		- Support for common serial communications functions,
	195	- At least 300bps, an external modem connected to the serial communication card that supports up to 19,200bps
	196	additionally available communications services using the PSTN network (general switched telephone network)
	197	and may also be connected to a 9-pin serial mouse.
	198	- Support for common serial communications functions,
199	199	and if IOCS ROM version 1.8 or higher to connect an external modem to the PC communication card is available.
200		- When used in this communication program is super soft static net programs (XMODEM protocol, FS 220-6 compatible
	200	- When used in this communication program is super soft static net programs (XMODEM protocol, FS 220-6 compatible
201	201	and supporting Samsung/Sambo combination korean character code, and an 8-bit code completion support Hangul) is used.
202	202	- Release price: 60,000won ($71).
203
	203
204	204	SS-1 ROM pack unit
205	205	- The VDP unit containing 1 cartridge slot card and ROM pack
206	206	- ROM pack was not compatible with original MSX ROM pack
207	207	- Release price: 49,900won ($58)
208
	208
209	209	Super Pack
210	210	- External ROM cartrige from Static Soft (C)
211	211	- 1 cartridge slot and 3 expansion slots (up to five expansion slots available)
212	212	- It is available to use the MSX ROM packs without any modification with the static soft VDP card
213	213	- Release price: 60,000won ($71)
214
	214
215	215	ST-KEY2
216	216	- For synthesizer external keyboard
217
	217
218	218	* Compatiblity with X1 series of Sharp Electronics
219	219	- Almost the key components is the same as X1 models of Sharp Electronics and except for the keyboard input.
220	220	- To port the X1 software to SPC-1500, Text attribute, keyboard input and DMA related code should be modified
221
	221
222	222	*/
223	223
224	224	#include "emu.h"
r253023	r253024
247	247	, m_pcgram(*this, "pcgram")
248	248	, m_io_kb(*this, "LINE")
249	249	, m_io_joy(*this, "JOY")
250		, m_dipsw(*this, "DIP_SWITCH")
	250	, m_dipsw(*this, "DIP_SWITCH")
251	251	, m_centronics(*this, "centronics")
252	252	, m_pio(*this, "ppi8255")
253	253	, m_sound(*this, "ay8910")
254	254	, m_palette(*this, "palette")
255	255	, m_timer(nullptr)
256	256	{}
257		DECLARE_READ8_MEMBER(psga_r);
	257	DECLARE_READ8_MEMBER(psga_r);
258	258	DECLARE_READ8_MEMBER(porta_r);
259	259	DECLARE_WRITE_LINE_MEMBER( centronics_busy_w ) { m_centronics_busy = state; }
260	260	DECLARE_READ8_MEMBER(mc6845_videoram_r);
r253023	r253024
281	281	DECLARE_READ8_MEMBER(io_r);
282	282	DECLARE_PALETTE_INIT(spc);
283	283	DECLARE_VIDEO_START(spc);
284		MC6845_UPDATE_ROW(crtc_update_row);
	284	MC6845_UPDATE_ROW(crtc_update_row);
285	285	MC6845_RECONFIGURE(crtc_reconfig);
286	286	TIMER_DEVICE_CALLBACK_MEMBER(timer);
287	287	private:
r253023	r253024
315	315	required_device<centronics_device> m_centronics;
316	316	required_device<i8255_device> m_pio;
317	317	required_device<ay8910_device> m_sound;
318		required_device<palette_device> m_palette;
319		UINT8 *m_font;
	318	required_device<palette_device> m_palette;
	319	UINT8 *m_font;
320	320	UINT8 m_priority;
321	321	emu_timer *m_timer;
322	322	void get_pcg_addr();
r253023	r253024
338	338	if (m_ipl)
339	339	membank("bank1")->set_entry(0);
340	340	else
341		membank("bank1")->set_entry(1);
	341	membank("bank1")->set_entry(1);
342	342	}
343	343
344	344	WRITE8_MEMBER( spc1500_state::ramsel)
r253023	r253024
349	349
350	350	WRITE8_MEMBER( spc1500_state::portb_w)
351	351	{
352		// m_ipl = data & (1 << 1);
	352	// m_ipl = data & (1 << 1);
353	353	}
354	354
355	355	WRITE8_MEMBER( spc1500_state::psgb_w)
r253023	r253024
381	381	READ8_MEMBER( spc1500_state::portb_r)
382	382	{
383	383	UINT8 data = 0;
384		data \|= ((m_cass->get_state() & CASSETTE_MASK_UISTATE) == CASSETTE_STOPPED \|\| ((m_cass->get_state() & CASSETTE_MASK_MOTOR) == CASSETTE_MOTOR_DISABLED));
385		data \|= (m_dipsw->read() & 1) << 4;
386		data \|= (m_cass->input() > 0.0038)<<1;
387		data \|= m_vdg->vsync_r()<<7;
388		data &= ~((m_centronics_busy==0)<<3);
389		return data;
	384	data \|= ((m_cass->get_state() & CASSETTE_MASK_UISTATE) == CASSETTE_STOPPED \|\| ((m_cass->get_state() & CASSETTE_MASK_MOTOR) == CASSETTE_MOTOR_DISABLED));
	385	data \|= (m_dipsw->read() & 1) << 4;
	386	data \|= (m_cass->input() > 0.0038)<<1;
	387	data \|= m_vdg->vsync_r()<<7;
	388	data &= ~((m_centronics_busy==0)<<3);
	389	return data;
390	390	}
391	391
392	392	WRITE8_MEMBER( spc1500_state::crtc_w)
r253023	r253024
444	444	m_pcg_offset[0] = 0;
445	445	m_pcg_offset[1] = 0;
446	446	m_pcg_offset[2] = 0;
447		}
	447	}
448	448	}
449	449
450	450	WRITE8_MEMBER( spc1500_state::pcg_w)
r253023	r253024
506	506
507	507	VIDEO_START_MEMBER(spc1500_state, spc)
508	508	{
509
510	509	}
511	510
512	511	MC6845_RECONFIGURE(spc1500_state::crtc_reconfig)
513	512	{
514		// printf("reconfig. w:%d, h:%d, %f (%d,%d,%d,%d)\n", width, height, (float)frame_period, visarea.left(), visarea.top(), visarea.right(), visarea.bottom());
515		// printf("register. m_vert_disp:%d, m_horiz_disp:%d, m_max_ras_addr:%d, m_vert_char_total:%d\n", m_crtc_vreg[6], m_crtc_vreg[1], m_crtc_vreg[9], m_crtc_vreg[0x4]);
	513	// printf("reconfig. w:%d, h:%d, %f (%d,%d,%d,%d)\n", width, height, (float)frame_period, visarea.left(), visarea.top(), visarea.right(), visarea.bottom());
	514	// printf("register. m_vert_disp:%d, m_horiz_disp:%d, m_max_ras_addr:%d, m_vert_char_total:%d\n", m_crtc_vreg[6], m_crtc_vreg[1], m_crtc_vreg[9], m_crtc_vreg[0x4]);
516	515	}
517	516
518	517	MC6845_UPDATE_ROW(spc1500_state::crtc_update_row)
r253023	r253024
524	523	int j;
525	524	int h1, h2, h3;
526	525	UINT32 *p = &bitmap.pix32(y);
527
	526
528	527	unsigned char cho[] ={1,1,1,1,1,1,1,1,0,0,1,1,1,3,5,5,0,0,5,3,3,5,5,5,0,0,3,3,5,1};
529	528	unsigned char jong[]={0,0,0,1,1,1,1,1,0,0,1,1,1,2,2,2,0,0,2,2,2,2,2,2,0,0,2,2,1,1};
530	529	bool inv = false;
r253023	r253024
564	563	hfnt = hfnt & ((pf << 8) \| ((pf+16)));
565	564	pf = &m_font[0x6000+(h3 * 32) + (jong[h2]-1) * 16 * 2 * 32 + n];
566	565	hfnt = hfnt & ((pf << 8) \| ((pf+16)));
567		}
	566	}
568	567	else
569	568	{
570	569	ascii = *(pv+0x1001);
r253023	r253024
639	638	if (offset < 0x1e00) { romsel(space, offset, data);} else
640	639	if (offset < 0x1f00) { ramsel(space, offset, data);} else
641	640	if (offset < 0x2000) {} else
642		if (offset < 0x10000)
643		{
644		if (offset < 0x4000)
	641	if (offset < 0x10000)
	642	{
	643	if (offset < 0x4000)
645	644	{
646	645	offset &= 0xf7ff;
647	646	m_p_videoram[offset-0x1800] = m_p_videoram[offset-0x2000] = data;
648	647	}
649	648	else
650		m_p_videoram[offset-0x2000] = data;
	649	m_p_videoram[offset-0x2000] = data;
651	650	};
652	651	}
653	652	}
r253023	r253024
655	654	READ8_MEMBER( spc1500_state::io_r)
656	655	{
657	656	m_double_mode = false;
658		if (offset < 0x1000) {} else
	657	if (offset < 0x1000) {} else
659	658	if (offset < 0x1400) {} else
660	659	if (offset < 0x1800) { return pcg_r(space, offset); } else
661	660	if (offset < 0x1900) { return crtc_r(space, offset); } else
r253023	r253024
663	662	if (offset < 0x1b00) { return m_pio->read(space, offset); } else
664	663	if (offset < 0x1c00) { return m_sound->data_r(space, offset); } else
665	664	if (offset < 0x2000) {} else
666		if (offset < 0x10000){
	665	if (offset < 0x10000){
667	666	if (offset < 0x4000)
668	667	offset &= 0xf7ff;
669	668	return m_p_videoram[offset - 0x2000]; }
r253023	r253024
680	679	#if 0
681	680	static ADDRESS_MAP_START( spc1500_io , AS_IO, 8, spc1500_state )
682	681	ADDRESS_MAP_UNMAP_HIGH
683		// AM_RANGE(0x0000, 0x03ff) AM_DEVREADWRITE("userio", user_device, userio_r, userio_w)
684		// AM_RANGE(0x0400, 0x05ff) AM_DEVREADWRITE("lanio", lan_device, lanio_r, lanio_w)
685		// AM_RANGE(0x0600, 0x07ff) AM_DEVREADWRITE("rs232c", rs232c_device, rs232c_r, rs232c_w)
686		// AM_RANGE(0x0800, 0x09ff) AM_DEVREADWRITE("fdcx", fdcx_device, fdcx_r, fdcx_w)
687		// AM_RANGE(0x0a00, 0x0bff) AM_DEVREADWRITE("userio", user_device, userio_r, userio_w)
688		// AM_RANGE(0x0c00, 0x0dff) AM_DEVREADWRITE("fdc", fdc_device, fdc_r, fdc_w)
689		// AM_RANGE(0x0e00, 0x0fff) AM_DEVREADWRITE("extram", extram_device, extram_r, extram_w)
	682	// AM_RANGE(0x0000, 0x03ff) AM_DEVREADWRITE("userio", user_device, userio_r, userio_w)
	683	// AM_RANGE(0x0400, 0x05ff) AM_DEVREADWRITE("lanio", lan_device, lanio_r, lanio_w)
	684	// AM_RANGE(0x0600, 0x07ff) AM_DEVREADWRITE("rs232c", rs232c_device, rs232c_r, rs232c_w)
	685	// AM_RANGE(0x0800, 0x09ff) AM_DEVREADWRITE("fdcx", fdcx_device, fdcx_r, fdcx_w)
	686	// AM_RANGE(0x0a00, 0x0bff) AM_DEVREADWRITE("userio", user_device, userio_r, userio_w)
	687	// AM_RANGE(0x0c00, 0x0dff) AM_DEVREADWRITE("fdc", fdc_device, fdc_r, fdc_w)
	688	// AM_RANGE(0x0e00, 0x0fff) AM_DEVREADWRITE("extram", extram_device, extram_r, extram_w)
690	689	AM_RANGE(0x1000, 0x10ff) AM_WRITE(paletb_w)
691	690	AM_RANGE(0x1100, 0x11ff) AM_WRITE(paletr_w)
692	691	AM_RANGE(0x1200, 0x12ff) AM_WRITE(paletg_w)
r253023	r253024
696	695	AM_RANGE(0x1600, 0x16ff) AM_READWRITE(pcgr_r, pcgr_w)
697	696	AM_RANGE(0x1700, 0x17ff) AM_WRITE(pcgg_w)
698	697	AM_RANGE(0x1800, 0x18ff) AM_READWRITE(crtc_r, crtc_w)
699		// AM_RANGE(0x1800, 0x1800) AM_DEVWRITE("mc6845", mc6845_device, address_w)
700		// AM_RANGE(0x1801, 0x1801) AM_DEVREADWRITE("mc6845", mc6845_device, register_r, register_w)
701		// AM_RANGE(0x1800, 0x1801) AM_READWRITE(crtc_r, crtc_w)
	698	// AM_RANGE(0x1800, 0x1800) AM_DEVWRITE("mc6845", mc6845_device, address_w)
	699	// AM_RANGE(0x1801, 0x1801) AM_DEVREADWRITE("mc6845", mc6845_device, register_r, register_w)
	700	// AM_RANGE(0x1800, 0x1801) AM_READWRITE(crtc_r, crtc_w)
702	701	AM_RANGE(0x1900, 0x1909) AM_READ(keyboard_r)
703		AM_RANGE(0x1a00, 0x1a03) AM_DEVREADWRITE("ppi8255", i8255_device, read, write)
	702	AM_RANGE(0x1a00, 0x1a03) AM_DEVREADWRITE("ppi8255", i8255_device, read, write)
704	703	AM_RANGE(0x1b00, 0x1bff) AM_DEVREADWRITE("ay8910", ay8910_device, data_r, data_w)
705	704	AM_RANGE(0x1c00, 0x1cff) AM_DEVWRITE("ay8910", ay8910_device, address_w)
706	705	AM_RANGE(0x1d00, 0x1d00) AM_WRITE(romsel)
707	706	AM_RANGE(0x1e00, 0x1e00) AM_WRITE(ramsel)
708	707	AM_RANGE(0x2000, 0xffff) AM_RAM AM_SHARE("videoram")
709	708	ADDRESS_MAP_END
710		#endif
	709	#endif
711	710
712	711	/* Input ports */
713	712	static INPUT_PORTS_START( spc1500 )
714	713
715		PORT_START("DIP_SWITCH")
716		PORT_DIPNAME( 0x01, 0x00, "40/80" )
717		PORT_DIPSETTING( 0x00, "40COL" )
718		PORT_DIPSETTING( 0x01, "80COL" )
719		PORT_DIPNAME( 0x02, 0x02, "Language" )
720		PORT_DIPSETTING( 0x02, "Korean" )
721		PORT_DIPSETTING( 0x00, "English" )
	714	PORT_START("DIP_SWITCH")
	715	PORT_DIPNAME( 0x01, 0x00, "40/80" )
	716	PORT_DIPSETTING( 0x00, "40COL" )
	717	PORT_DIPSETTING( 0x01, "80COL" )
	718	PORT_DIPNAME( 0x02, 0x02, "Language" )
	719	PORT_DIPSETTING( 0x02, "Korean" )
	720	PORT_DIPSETTING( 0x00, "English" )
722	721	PORT_DIPNAME( 0x04, 0x00, "V-Res" )
723		PORT_DIPSETTING( 0x04, "400" )
	722	PORT_DIPSETTING( 0x04, "400" )
724	723	PORT_DIPSETTING( 0x00, "200" )
725	724	PORT_DIPNAME( 0x08, 0x08, "X1" )
726		PORT_DIPSETTING( 0x08, "Compatible Mode" )
	725	PORT_DIPSETTING( 0x08, "Compatible Mode" )
727	726	PORT_DIPSETTING( 0x00, "Non Compatible" )
728
	727
729	728	PORT_START("LINE.0")
730		PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED)
	729	PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED)
731	730	PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Shift") PORT_CODE(KEYCODE_RSHIFT) PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1)
732	731	PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Ctrl") PORT_CODE(KEYCODE_RCONTROL) PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_SHIFT_2)
733		PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_UNUSED)
	732	PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_UNUSED)
734	733	PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Break") PORT_CODE(KEYCODE_PAUSE)
735	734	PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("\\ \|") PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('\\') PORT_CHAR('\|') PORT_CHAR(0x1c)
736	735	PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Graph") PORT_CODE(KEYCODE_LALT)
737	736	PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_UNUSED)
738	737
739	738	PORT_START("LINE.1")
740		PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("= +") PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('=') PORT_CHAR('+')
	739	PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("= +") PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('=') PORT_CHAR('+')
741	740	PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Right") PORT_CODE(KEYCODE_RIGHT)
742	741	PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Space") PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ')
743	742	PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Return") PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13)
r253023	r253024
768	767
769	768	PORT_START("LINE.4")
770	769	PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Del Ins") PORT_CODE(KEYCODE_DEL_PAD) PORT_CHAR(UCHAR_MAMEKEY(DEL_PAD)) PORT_CHAR(8)
771		PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Down") PORT_CODE(KEYCODE_DOWN)
	770	PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Down") PORT_CODE(KEYCODE_DOWN)
772	771	PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Tab") PORT_CODE(KEYCODE_TAB) PORT_CHAR('\t')
773	772	PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Home") PORT_CODE(KEYCODE_HOME)
774	773	PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("N") PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N') PORT_CHAR(0x0e)
r253023	r253024
777	776	PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("4 $") PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$')
778	777
779	778	PORT_START("LINE.5")
780		PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED)
	779	PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED)
781	780	PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F1") PORT_CODE(KEYCODE_F1)
782		PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_UNUSED)
	781	PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_UNUSED)
783	782	PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_UNUSED)
784	783	PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("M") PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M') PORT_CHAR(0x0d)
785	784	PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("G") PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G') PORT_CHAR(0x07)
r253023	r253024
787	786	PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("5 %") PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%')
788	787
789	788	PORT_START("LINE.6")
790		PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED)
	789	PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED)
791	790	PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F2") PORT_CODE(KEYCODE_F2)
792	791	PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("[ {") PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR('{') PORT_CHAR(0x1b)
793	792	PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("X") PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X') PORT_CHAR(0x18)
r253023	r253024
797	796	PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("6 ^") PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('^')
798	797
799	798	PORT_START("LINE.7")
800		PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED)
	799	PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED)
801	800	PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F3") PORT_CODE(KEYCODE_F3)
802		PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_UNUSED)
	801	PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_UNUSED)
803	802	PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("P") PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P') PORT_CHAR(0x10)
804	803	PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(". >") PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>')
805	804	PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("J") PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J') PORT_CHAR(0x0a)
r253023	r253024
807	806	PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("7 &") PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('&')
808	807
809	808	PORT_START("LINE.8")
810		PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED)
	809	PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED)
811	810	PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F4") PORT_CODE(KEYCODE_F4)
812		PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_UNUSED)
	811	PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_UNUSED)
813	812	PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("\' \"") PORT_CODE(KEYCODE_QUOTE) PORT_CHAR('\'') PORT_CHAR('\"')
814	813	PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("/ ?") PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?')
815	814	PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("K") PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K') PORT_CHAR(0x0b)
r253023	r253024
817	816	PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("8 ") PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('')
818	817
819	818	PORT_START("LINE.9")
820		PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Hangul") PORT_CODE(KEYCODE_RALT)
	819	PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Hangul") PORT_CODE(KEYCODE_RALT)
821	820	PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F5") PORT_CODE(KEYCODE_F5)
822	821	PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("- _") PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('_')
823	822	PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("0 )") PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR(')')
r253023	r253024
834	833	PORT_BIT(0x10, IP_ACTIVE_HIGH,IPT_UNUSED) // DIP SW2 for Korean/English
835	834	PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
836	835	PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
837		PORT_BIT(0x80, IP_ACTIVE_HIGH,IPT_UNUSED) // DIP SW3 for 200/400 line
	836	PORT_BIT(0x80, IP_ACTIVE_HIGH,IPT_UNUSED) // DIP SW3 for 200/400 line
838	837	INPUT_PORTS_END
839	838
840	839	static ADDRESS_MAP_START(spc1500_mem, AS_PROGRAM, 8, spc1500_state )
841	840	ADDRESS_MAP_UNMAP_HIGH
842		AM_RANGE(0x0000, 0x7fff) AM_READ_BANK("bank1") AM_WRITE_BANK("bank2")
	841	AM_RANGE(0x0000, 0x7fff) AM_READ_BANK("bank1") AM_WRITE_BANK("bank2")
843	842	AM_RANGE(0x8000, 0xffff) AM_READWRITE_BANK("bank4")
844	843	ADDRESS_MAP_END
845	844
r253023	r253024
848	847	UINT8 *mem_basic = memregion("basic")->base();
849	848	UINT8 *mem_ipl = memregion("ipl")->base();
850	849	m_p_ram = m_ram->pointer();
851		m_font = memregion("font1")->base();
	850	m_font = memregion("font1")->base();
852	851	// configure and intialize banks 1 (read banks)
853	852	membank("bank1")->configure_entry(0, mem_ipl);
854	853	membank("bank1")->configure_entry(1, mem_basic);
r253023	r253024
859	858	set_address_space(AS_IO, m_maincpu->space(AS_IO));
860	859	// intialize banks 2, 3, 4 (write banks)
861	860	membank("bank2")->set_base(m_p_ram);
862		membank("bank4")->set_base(m_p_ram + 0x8000);
	861	membank("bank4")->set_base(m_p_ram + 0x8000);
863	862	m_timer = timer_alloc(0);
864	863	m_timer->adjust(attotime::zero);
865	864	}
r253023	r253024
867	866	void spc1500_state::machine_reset()
868	867	{
869	868	m_motor = false;
870		m_time = machine().scheduler().time();
	869	m_time = machine().scheduler().time();
871	870	m_double_mode = false;
872	871	memset(&m_paltbl[0], 1, 8);
873	872	m_char_count = 0;
r253023	r253024
904	903	MCFG_CPU_PERIODIC_INT_DRIVER(spc1500_state, irq0_line_hold, 60)
905	904
906	905	/* video hardware */
907
	906
908	907	MCFG_SCREEN_ADD("screen", RASTER)
909	908	MCFG_SCREEN_REFRESH_RATE(60)
910	909	MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
911	910	MCFG_SCREEN_SIZE(640, 400)
912	911	MCFG_SCREEN_VISIBLE_AREA(0,640-1,0,400-1)
913	912	MCFG_SCREEN_UPDATE_DEVICE("mc6845", mc6845_device, screen_update )
914		MCFG_PALETTE_ADD("palette", 8)
	913	MCFG_PALETTE_ADD("palette", 8)
915	914	MCFG_PALETTE_INIT_OWNER(spc1500_state, spc)
916	915	MCFG_MC6845_ADD("mc6845", MC6845, "screen", (VDP_CLOCK/48)) //unknown divider
917	916	MCFG_MC6845_SHOW_BORDER_AREA(false)
918	917	MCFG_MC6845_CHAR_WIDTH(8)
919	918	MCFG_MC6845_UPDATE_ROW_CB(spc1500_state, crtc_update_row)
920	919	MCFG_MC6845_RECONFIGURE_CB(spc1500_state, crtc_reconfig)
921		MCFG_VIDEO_START_OVERRIDE(spc1500_state, spc)
922
	920	MCFG_VIDEO_START_OVERRIDE(spc1500_state, spc)
	921
923	922	MCFG_DEVICE_ADD("ppi8255", I8255, 0)
924	923	MCFG_I8255_OUT_PORTA_CB(DEVWRITE8("cent_data_out", output_latch_device, write))
925	924	MCFG_I8255_IN_PORTB_CB(READ8(spc1500_state, portb_r))
926	925	MCFG_I8255_OUT_PORTB_CB(WRITE8(spc1500_state, portb_w))
927	926	MCFG_I8255_OUT_PORTC_CB(WRITE8(spc1500_state, portc_w))
928
	927
929	928	MCFG_TIMER_DRIVER_ADD_PERIODIC("1hz", spc1500_state, timer, attotime::from_hz(1))
930
	929
931	930	/* sound hardware */
932	931	MCFG_SPEAKER_STANDARD_MONO("mono")
933	932	MCFG_SOUND_ADD("ay8910", AY8910, XTAL_4MHz / 2)
r253023	r253024
959	958	ROM_LOAD("ipl.rom", 0x0000, 0x8000, CRC(80d0704a) SHA1(01e4cbe8baad72effbbe01addd477c5b0ec85c16))
960	959	ROM_REGION(0x8000, "basic", ROMREGION_ERASEFF)
961	960	ROM_LOAD("basic.rom", 0x0000, 0x8000, CRC(f48328e1) SHA1(fb874ea7d20078726682f2d0e03ea0d1f8bdbb07))
962		ROM_REGION(0x8000, "font1", 0)
	961	ROM_REGION(0x8000, "font1", 0)
963	962	ROM_LOAD( "ss150fnt.bin", 0x0000, 0x2000, CRC(affdc5c0) SHA1(2a93582fcccf9e40b99ae238ce585d189afe9a5a) )
964	963	ROM_LOAD( "ss151fnt.bin", 0x2000, 0x2000, CRC(83c2eb8d) SHA1(2adf7816206dc74b9f0d32cb3b56cbab31fa6044) )
965	964	ROM_LOAD( "ss152fnt.bin", 0x4000, 0x2000, CRC(f4a5a590) SHA1(c9a02756107083bf602ae7c90cfe29b8b964e0df) )
966	965	ROM_LOAD( "ss153fnt.bin", 0x6000, 0x2000, CRC(8677d5fa) SHA1(34bfacc855c3846744cd586c150c72e5cbe948b0) )
967
	966
968	967	ROM_END
969	968
970	969

trunk/src/mame/drivers/taitopjc.cpp
r253023	r253024
236	236	m_tilemap[1] = &machine().tilemap().create(m_gfxdecode, tilemap_get_info_delegate(FUNC(taitopjc_state::tile_get_info),this), tilemap_mapper_delegate(FUNC(taitopjc_state::tile_scan_layer1),this), 16, 16, 32, 32);
237	237	m_tilemap[0]->set_transparent_pen(0);
238	238	m_tilemap[1]->set_transparent_pen(1);
239
	239
240	240	m_gfxdecode->set_gfx(0, std::make_unique<gfx_element>(m_palette, char_layout, (UINT8*)m_screen_ram.get(), 0, m_palette->entries() / 256, 0));
241	241
242	242	machine().add_notifier(MACHINE_NOTIFY_EXIT, machine_notify_delegate(FUNC(taitopjc_state::video_exit), this));
r253023	r253024
280	280	{
281	281	UINT32 addr = address - 0x10000000;
282	282	m_screen_ram[addr] = data;
283
	283
284	284	if (address >= 0x1003f000)
285	285	{
286	286	UINT32 a = address - 0x1003f000;

trunk/src/mame/drivers/taitotz.cpp
r253023	r253024
1368	1368	UINT32 alpha = m_tnl_fifo[2];
1369	1369	render_tnl_object(m_tnl_fifo[0] & 0x1fffff, scale, alpha);
1370	1370
1371		// printf("TNL FIFO: %08X, %f, %08X, %08X\n", m_tnl_fifo[0], u2f(m_tnl_fifo[1]), m_tnl_fifo[2], m_tnl_fifo[3]);
	1371	// printf("TNL FIFO: %08X, %f, %08X, %08X\n", m_tnl_fifo[0], u2f(m_tnl_fifo[1]), m_tnl_fifo[2], m_tnl_fifo[3]);
1372	1372	m_tnl_fifo_ptr = 0;
1373	1373	}
1374	1374	}
r253023	r253024
1382	1382	int expected_size;
1383	1383	switch ((m_direct_fifo[0] >> 8) & 0x7)
1384	1384	{
1385		case 0: expected_size = 24; break;
	1385	case 0: expected_size = 24; break;
1386	1386	case 2: expected_size = 16; break;
1387	1387	case 3: expected_size = 24; break;
1388	1388	case 4: expected_size = 24; break;
r253023	r253024
1650	1650	{
1651	1651	case 0x14:
1652	1652	{
1653		r \|= 0xff; // more busy flags? (value & 0x11ff == 0xff expected)
	1653	r \|= 0xff; // more busy flags? (value & 0x11ff == 0xff expected)
1654	1654	break;
1655	1655	}
1656	1656
r253023	r253024
2612	2612	// rom[(0x2c620^4)/4] = 0x48000014; // ID check skip (not needed with correct serial number)
2613	2613
2614	2614	#if 0
2615		rom[(0x2c164^4)/4] = 0x39600001; // enable game debug output
2616		rom[(0x2c174^4)/4] = 0x39200001; // enable game debug output
	2615	rom[(0x2c164^4)/4] = 0x39600001; // enable game debug output
	2616	rom[(0x2c174^4)/4] = 0x39200001; // enable game debug output
2617	2617	rom[(0x2c978^4)/4] = 0x48000028;
2618	2618	#endif
2619	2619	}
r253023	r253024
2751	2751	Logical Sectors/Track 63
2752	2752	Physical Heads 6
2753	2753	Physical Disks 3
2754		Sectors Per Drive 8,418,816
2755		Average Seek Time 10.0 ms (read)
2756		Buffer Size 128K
	2754	Sectors Per Drive 8,418,816
	2755	Average Seek Time 10.0 ms (read)
	2756	Buffer Size 128K
2757	2757
2758	2758	*/
2759	2759

trunk/src/mame/drivers/ticalc1x.cpp
r253023	r253024
60	60	TI SR-16 (1974, first consumer product with TMS1000 series MCU)
61	61	* TMS1000 MCU labeled TMS1001NL (die labeled 1000, 1001A)
62	62	* 12-digit 7seg LED display
63
	63
64	64	TI SR-16 II (1975 version)
65	65	* TMS1000 MCU labeled TMS1016NL (die labeled 1000B, 1016A)
66	66	* notes: cost-reduced 'sequel', [10^x] was removed, and [pi] was added.
r253023	r253024
283	283	TI-1250/TI-1200 (1976 version), TI-1400, TI-1450, TI-1205, TI-1255, LADY 1200, ABLE
284	284	* TMS0970 MCU labeled TMS0972NL ZA0348, JP0972A (die labeled 0970D-72A)
285	285	* 8-digit 7seg LED display, or 9 digits with leftmost unused
286
	286
287	287	As seen listed above, the basic 4-function TMS0972 calculator MCU was used
288	288	in many calculators. It was licensed to other manufacturers too, one funny
289	289	example being a Mattel Barbie handheld calculator.
290
	290
291	291	Some cheaper models lacked the memory buttons (the function itself still works).
292	292	The ABLE series was for educational purposes, with each having a small subset of
293	293	available buttons.

trunk/src/mame/drivers/tourvis.cpp
r253023	r253024
24	24	Ballistix
25	25	Be Ball
26	26	Bomberman
27		Chōzetsurinjin Beraboh Man (Super Foolish Man)
	27	Chozetsurinjin Beraboh Man (Super Foolish Man)
28	28	Chuka Taisen
29	29	Columns
30	30	Coryoon
r253023	r253024
471	471
472	472
473	473
474		/* 1943 Kai */
	474	/* 1943 Kai */
475	475	ROM_START(tv1943)
476	476	ROM_REGION( 0x100000, "maincpu", 0 )
477	477	ROM_LOAD( "tourv_1943_kia.bin", 0x00000, 0x100000, CRC(de4672ab) SHA1(2da1ee082bfb920c632a95014208f11fb48c58e1) )
r253023	r253024
479	479	TOURVISION_BIOS
480	480	ROM_END
481	481
482		/* Aero Blasters - Hudson / Kaneko */
	482	/* Aero Blasters - Hudson / Kaneko */
483	483	ROM_START(tvablast)
484	484	ROM_REGION( 0x100000, "maincpu", 0 )
485	485	ROM_LOAD( "tourv_ablast.bin", 0x00000, 0x100000, CRC(9302f6d0) SHA1(76ef27a6d639514ed261b9d65f37217f2989d1c0) )
r253023	r253024
487	487	TOURVISION_BIOS
488	488	ROM_END
489	489
490		/* After Burner */
	490	/* After Burner */
491	491	ROM_START(tvaburn)
492	492	ROM_REGION( 0x100000, "maincpu", 0 )
493	493	ROM_LOAD( "tourv_afterburner.bin", 0x00000, 0x100000, CRC(5ce31322) SHA1(08918d443891bd70f1b0b0c739522b764b16bc96) )
r253023	r253024
495	495	TOURVISION_BIOS
496	496	ROM_END
497	497
498		/* Armed-F */
	498	/* Armed-F */
499	499	ROM_START(tvarmedf)
500	500	ROM_REGION( 0x100000, "maincpu", 0 )
501	501	ROM_LOAD( "tourv_armed-f.bin", 0x00000, 0x100000, CRC(056617f5) SHA1(d10eb80b8436b8d217170309647104181cca750a) )
r253023	r253024
503	503	TOURVISION_BIOS
504	504	ROM_END
505	505
506		/* Ballistix */
	506	/* Ballistix */
507	507	ROM_START(tvbalstx)
508	508	ROM_REGION( 0x100000, "maincpu", 0 )
509	509	ROM_LOAD( "tourv_ballistix.bin", 0x00000, 0x100000, CRC(9d32ed98) SHA1(404cc3695940a7fdc802ac166ec564a858a894d0) )
r253023	r253024
511	511	TOURVISION_BIOS
512	512	ROM_END
513	513
514		/* Be Ball */
	514	/* Be Ball */
515	515	ROM_START(tvbeball)
516	516	ROM_REGION( 0x100000, "maincpu", 0 )
517	517	ROM_LOAD( "tourv_be_ball.bin", 0x00000, 0x100000, CRC(4b1e2861) SHA1(bea449543284bb6f4b33b1fb4156cd18a782ad6a) )
r253023	r253024
519	519	TOURVISION_BIOS
520	520	ROM_END
521	521
522		/* Bomberman */
	522	/* Bomberman */
523	523	ROM_START(tvbomber)
524	524	ROM_REGION( 0x100000, "maincpu", 0 )
525	525	ROM_LOAD( "tourv_bomberman.bin", 0x00000, 0x100000, CRC(cfcabe78) SHA1(bdd1766fad43c6c76e1b0d6e8b4f0ba3363442d6) )
r253023	r253024
527	527	TOURVISION_BIOS
528	528	ROM_END
529	529
530		/* Chōzetsurinjin Beraboh Man (Super Foolist Man) */
	530	/* Chozetsurinjin Beraboh Man (Super Foolist Man) */
531	531	ROM_START(tvbrabho)
532	532	ROM_REGION( 0x100000, "maincpu", 0 )
533	533	ROM_LOAD( "tourv_chozetsurinjin_beraboh_man.bin", 0x00000, 0x100000, CRC(1f80cf04) SHA1(121bfb9ba4de4d047b08442d900b7f351210dd48) )
r253023	r253024
535	535	TOURVISION_BIOS
536	536	ROM_END
537	537
538		/* Chuka Taisen */
	538	/* Chuka Taisen */
539	539	ROM_START(tvtaisen)
540	540	ROM_REGION( 0x100000, "maincpu", 0 )
541	541	ROM_LOAD( "tourv_chuka_taisen.bin", 0x00000, 0x100000, CRC(3b9e9185) SHA1(96f9f82a9fa6ee2b92c0294e71d47886e27fdc06) )
r253023	r253024
551	551	TOURVISION_BIOS
552	552	ROM_END
553	553
554		/* Coryoon */
	554	/* Coryoon */
555	555	ROM_START(tvcoryon)
556	556	ROM_REGION( 0x100000, "maincpu", 0 )
557	557	ROM_LOAD( "tourv_corycoon.bin", 0x00000, 0x100000, CRC(c377db91) SHA1(1585d886f775ed361b2558839e544660533e9297) )
r253023	r253024
559	559	TOURVISION_BIOS
560	560	ROM_END
561	561
562		/* Daisenpu */
	562	/* Daisenpu */
563	563	ROM_START(tvdsenpu)
564	564	ROM_REGION( 0x100000, "maincpu", 0 )
565	565	ROM_LOAD( "tourv_daisenpu.bin", 0x00000, 0x100000, CRC(5a8cef75) SHA1(00f27127114e4f5bf69c81212e66948caaec755d) )
r253023	r253024
567	567	TOURVISION_BIOS
568	568	ROM_END
569	569
570		/* Dead Moon */
	570	/* Dead Moon */
571	571	ROM_START(tvdmoon)
572	572	ROM_REGION( 0x100000, "maincpu", 0 )
573	573	ROM_LOAD( "tourv_dead_moon.bin", 0x00000, 0x100000, CRC(b54793c1) SHA1(8899947092d9a02f3be61ac9c293642e83a015ec) )
r253023	r253024
575	575	TOURVISION_BIOS
576	576	ROM_END
577	577
578		/* Devil Crash */
	578	/* Devil Crash */
579	579	ROM_START(tvdevilc)
580	580	ROM_REGION( 0x100000, "maincpu", 0 )
581	581	ROM_LOAD( "tourv_devil_crash.bin", 0x00000, 0x100000, CRC(c163e5c1) SHA1(2134b3943df87af556694dbe6c77b30723f9175a) )
r253023	r253024
583	583	TOURVISION_BIOS
584	584	ROM_END
585	585
586		/* Dodge Ball */
	586	/* Dodge Ball */
587	587	ROM_START(tvdodgeb)
588	588	ROM_REGION( 0x100000, "maincpu", 0 )
589	589	ROM_LOAD( "tourv_dodge_ball.bin", 0x00000, 0x100000, CRC(7a12cf72) SHA1(c477bc5dae4e82a89766052f185afb73ca2234f3) )
r253023	r253024
591	591	TOURVISION_BIOS
592	592	ROM_END
593	593
594		/* Doraemon Meikyuu Daisakusen */
	594	/* Doraemon Meikyuu Daisakusen */
595	595	ROM_START(tvdormon)
596	596	ROM_REGION( 0x100000, "maincpu", 0 )
597	597	ROM_LOAD( "tourv_doreamon.bin", 0x00000, 0x100000, CRC(22e8b5ba) SHA1(f21101358df8625c39a5078b9f1b1a0215470bed) )
r253023	r253024
599	599	TOURVISION_BIOS
600	600	ROM_END
601	601
602		/* Dragon Spirit */
	602	/* Dragon Spirit */
603	603	ROM_START(tvdrgnst)
604	604	ROM_REGION( 0x100000, "maincpu", 0 )
605	605	ROM_LOAD( "tourv_dragon_spirit.bin", 0x00000, 0x100000, CRC(5733951f) SHA1(0256b4c343a3ad1ca625c316a470cc91a5254e8e) )
r253023	r253024
620	620	TOURVISION_BIOS
621	621	ROM_END
622	622
623		/* Final Blaster */
	623	/* Final Blaster */
624	624	ROM_START(tvfblast)
625	625	ROM_REGION( 0x100000, "maincpu", 0 )
626	626	ROM_LOAD( "tourv_final_blaster.bin", 0x00000, 0x100000, CRC(f5f7483c) SHA1(3933719bdd7a0c73cdad76de78d80463112b475a) )
r253023	r253024
636	636	TOURVISION_BIOS
637	637	ROM_END
638	638
639		/* Final Match Tennis */
	639	/* Final Match Tennis */
640	640	ROM_START(tvftenis)
641	641	ROM_REGION( 0x100000, "maincpu", 0 )
642	642	ROM_LOAD( "tourv_final_match_tennis.bin", 0x00000, 0x100000, CRC(f83ed70f) SHA1(f566bd7a806c11f3d33ba0a976e36026a131e6fd) )
r253023	r253024
660	660	TOURVISION_BIOS
661	661	ROM_END
662	662
663		/* Gunhed */
	663	/* Gunhed */
664	664	ROM_START(tvgunhed)
665	665	ROM_REGION( 0x100000, "maincpu", 0 )
666	666	ROM_LOAD( "tourv_gunhed.bin", 0x00000, 0x100000, CRC(9baace99) SHA1(ab676ba72a80314e8cba3810789041d3cc6298f9) )
r253023	r253024
668	668	TOURVISION_BIOS
669	669	ROM_END
670	670
671		/* Hana Taka Daka (Super Long Nose Goblin) */
	671	/* Hana Taka Daka (Super Long Nose Goblin) */
672	672	ROM_START(tvhtdaka)
673	673	ROM_REGION( 0x100000, "maincpu", 0 )
674	674	ROM_LOAD( "tourv_hana_taka_daka.bin", 0x00000, 0x100000, CRC(0fbfda5c) SHA1(02b2ce93ee5e2aaa11c8640ced15258d0d844e6f) )
r253023	r253024
684	684	TOURVISION_BIOS
685	685	ROM_END
686	686
687		/* jinmu Densho */
	687	/* jinmu Densho */
688	688	ROM_START(tvdensho)
689	689	ROM_REGION( 0x100000, "maincpu", 0 )
690	690	ROM_LOAD( "tourv_dinmu_densho.bin", 0x00000, 0x100000, CRC(411a8643) SHA1(46258042dcf6510404ebccaf47034421928f72a8) )
r253023	r253024
692	692	TOURVISION_BIOS
693	693	ROM_END
694	694
695		/* Kiki Kaikai */
	695	/* Kiki Kaikai */
696	696	ROM_START(tvkaikai)
697	697	ROM_REGION( 0x100000, "maincpu", 0 )
698	698	ROM_LOAD( "tourv_kiki_kaikai.bin", 0x00000, 0x100000, CRC(2bdd93f9) SHA1(9b08606865abb8cc8fa17a22becae34b172ff81a) )
r253023	r253024
700	700	TOURVISION_BIOS
701	701	ROM_END
702	702
703		/* Ledgnd of Hero Tonma */
	703	/* Ledgnd of Hero Tonma */
704	704	ROM_START(tvtonma)
705	705	ROM_REGION( 0x100000, "maincpu", 0 )
706	706	ROM_LOAD( "tourv_legend_of_hero_tonma.bin", 0x00000, 0x100000, CRC(e7c2efe3) SHA1(5767bdfa5600b1586e49c17cebd0fd7ef2c5426c) )
r253023	r253024
716	716	TOURVISION_BIOS
717	717	ROM_END
718	718
719		/* Mizubaku Daibouken Liquid Kids */
	719	/* Mizubaku Daibouken Liquid Kids */
720	720	ROM_START(tvlqkids)
721	721	ROM_REGION( 0x100000, "maincpu", 0 )
722	722	ROM_LOAD( "tourv_liquid_kids.bin", 0x00000, 0x100000, CRC(23a8636d) SHA1(752e03dcf8617b5a39cd250f4db1fe13cd13b761) )
r253023	r253024
724	724	TOURVISION_BIOS
725	725	ROM_END
726	726
727		/* Mr Heli */
	727	/* Mr Heli */
728	728	ROM_START(tvmrheli)
729	729	ROM_REGION( 0x100000, "maincpu", 0 )
730	730	ROM_LOAD( "tourv_mr_heli.bin", 0x00000, 0x100000, CRC(bf197c7a) SHA1(048f91f8ab86220a39ab146e531081950eaf1138) )
r253023	r253024
732	732	TOURVISION_BIOS
733	733	ROM_END
734	734
735		/* Ninja Ryukenden */
	735	/* Ninja Ryukenden */
736	736	ROM_START(tvninjar)
737	737	ROM_REGION( 0x100000, "maincpu", 0 )
738	738	ROM_LOAD( "tourv_ninja_ryukenden.bin", 0x00000, 0x100000, CRC(d9cc00ca) SHA1(42d914d338d7d0073b5cc98a4e85729e86bbfad1) )
r253023	r253024
740	740	TOURVISION_BIOS
741	741	ROM_END
742	742
743		/* Operation Wolf */
	743	/* Operation Wolf */
744	744	ROM_START(tvopwolf)
745	745	ROM_REGION( 0x100000, "maincpu", 0 )
746	746	ROM_LOAD( "tourv_operation_wolf.bin", 0x00000, 0x100000, CRC(d4a755a9) SHA1(cd236ba0c3439ba2356cb270f56a41a52e0d6dc6) )
r253023	r253024
748	748	TOURVISION_BIOS
749	749	ROM_END
750	750
751		/* Override */
	751	/* Override */
752	752	ROM_START(tvovride)
753	753	ROM_REGION( 0x100000, "maincpu", 0 )
754	754	ROM_LOAD( "tourv_override.bin", 0x00000, 0x100000, CRC(4dbbf4ef) SHA1(180a68f87a881db1d01ffa3566e0d2e28303d09e) )
r253023	r253024
756	756	TOURVISION_BIOS
757	757	ROM_END
758	758
759		/* Pac-Land */
	759	/* Pac-Land */
760	760	ROM_START(tvpaclnd)
761	761	ROM_REGION( 0x100000, "maincpu", 0 )
762	762	ROM_LOAD( "tourv_pac-land.bin", 0x00000, 0x100000, CRC(32aee4e2) SHA1(900a918e73aaa1dc5752f851ebd85217e736109b) )
r253023	r253024
764	764	TOURVISION_BIOS
765	765	ROM_END
766	766
767		/* PC Genjin Punkic Cyborg */
	767	/* PC Genjin Punkic Cyborg */
768	768	ROM_START(tvpcybrg)
769	769	ROM_REGION( 0x100000, "maincpu", 0 )
770	770	ROM_LOAD( "tourv_pc_genijin_punkic_cyborg.bin", 0x00000, 0x100000, CRC(5dfdc8fd) SHA1(e4e263cf7c102837c7d669d27894085f3369dd9b) )
r253023	r253024
788	788	TOURVISION_BIOS
789	789	ROM_END
790	790
791		/* Power Drift */
	791	/* Power Drift */
792	792	ROM_START(tvpdrift)
793	793	ROM_REGION( 0x100000, "maincpu", 0 )
794	794	ROM_LOAD( "tourv_power_drift.bin", 0x00000, 0x100000, CRC(eb2fdf0b) SHA1(da2191dd6e9d186c10c1c4d415254b8d7c456159) )
r253023	r253024
811	811	TOURVISION_BIOS
812	812	ROM_END
813	813
814		/* Pro Yakyuu World Stadium '91 */
	814	/* Pro Yakyuu World Stadium '91 */
815	815	ROM_START(tvpros91)
816	816	ROM_REGION( 0x100000, "maincpu", 0 )
817	817	ROM_LOAD( "tourv_pro_yakyuu_world_stadium_91.bin", 0x00000, 0x100000, CRC(2a5f1283) SHA1(e5044e397e6ccbc5c5741fa3f073697b60116325) )
r253023	r253024
819	819	TOURVISION_BIOS
820	820	ROM_END
821	821
822		/* Psycho Chaser */
	822	/* Psycho Chaser */
823	823	ROM_START(tvpchasr)
824	824	ROM_REGION( 0x100000, "maincpu", 0 )
825	825	ROM_LOAD( "tourv_pyscho_chaser.bin", 0x00000, 0x100000, CRC(e0b65280) SHA1(83248975e9bea62e67b5314c663d372c12b08416) )
r253023	r253024
827	827	TOURVISION_BIOS
828	828	ROM_END
829	829
830		/* Puzzle Boy */
	830	/* Puzzle Boy */
831	831	ROM_START(tvpzlboy)
832	832	ROM_REGION( 0x100000, "maincpu", 0 )
833	833	ROM_LOAD( "tourv_puzzle_boy.bin", 0x00000, 0x100000, CRC(0dd96cda) SHA1(652ce8b06f2aef69698d4372ff67b86362655de5) )
r253023	r253024
835	835	TOURVISION_BIOS
836	836	ROM_END
837	837
838		/* Raiden */
	838	/* Raiden */
839	839	ROM_START(tvraiden)
840	840	ROM_REGION( 0x100000, "maincpu", 0 )
841	841	ROM_LOAD( "tourv_raiden.bin", 0x00000, 0x100000, CRC(b99a85b6) SHA1(5c8b103c5a7bfeba20dcc490204d672b55e36452) )
r253023	r253024
856	856	TOURVISION_BIOS
857	857	ROM_END
858	858
859		/* R-Type II */
	859	/* R-Type II */
860	860	ROM_START(tvrtype2)
861	861	ROM_REGION( 0x100000, "maincpu", 0 )
862	862	ROM_LOAD( "tourv_r-type_ii.bin", 0x00000, 0x100000, CRC(b03bfd7a) SHA1(cc8cec1fc4bae3937d0ed60468ff703d07ce9d0c) )
r253023	r253024
864	864	TOURVISION_BIOS
865	865	ROM_END
866	866
867		/* Saiga No Nindou - Ninja Spirit */
	867	/* Saiga No Nindou - Ninja Spirit */
868	868	ROM_START(tvninjas)
869	869	ROM_REGION( 0x100000, "maincpu", 0 )
870	870	ROM_LOAD( "tourv_saiga_no_nindou.bin", 0x00000, 0x100000, CRC(87894514) SHA1(6845c29247f9dd805b7cd8cb046e88526e853a11) )
r253023	r253024
872	872	TOURVISION_BIOS
873	873	ROM_END
874	874
875		/* Salamander */
	875	/* Salamander */
876	876	ROM_START(tvslmndr)
877	877	ROM_REGION( 0x100000, "maincpu", 0 )
878	878	ROM_LOAD( "tourv_salamander.bin", 0x00000, 0x100000, CRC(ae8bcdf1) SHA1(3cc48fa594ab5ce1573c61861ec8e927163b6abb) )
r253023	r253024
880	880	TOURVISION_BIOS
881	881	ROM_END
882	882
883		/* Shinobi */
	883	/* Shinobi */
884	884	ROM_START(tvshnobi)
885	885	ROM_REGION( 0x100000, "maincpu", 0 )
886	886	ROM_LOAD( "tourv_shinobi.bin", 0x00000, 0x100000, CRC(091a2b01) SHA1(aac2d5fadc74f837b73f662456f8a308413de57a) )
r253023	r253024
888	888	TOURVISION_BIOS
889	889	ROM_END
890	890
891		/* Side arms */
	891	/* Side arms */
892	892	ROM_START(tvsdarms)
893	893	ROM_REGION( 0x100000, "maincpu", 0 )
894	894	ROM_LOAD( "tourv_side_arms.bin", 0x00000, 0x100000, CRC(04256267) SHA1(a4ff8f19fa528fc8a7aae5ad7e0c574dc52c3388) )
r253023	r253024
896	896	TOURVISION_BIOS
897	897	ROM_END
898	898
899		/* Skweek */
	899	/* Skweek */
900	900	ROM_START(tvskweek)
901	901	ROM_REGION( 0x100000, "maincpu", 0 )
902	902	ROM_LOAD( "tourv_skweek.bin", 0x00000, 0x100000, CRC(b2a86ecc) SHA1(c1b113132ca6be1b0f3f16f31cc5ba894bee7e91) )
r253023	r253024
904	904	TOURVISION_BIOS
905	905	ROM_END
906	906
907		/* Son Son II */
	907	/* Son Son II */
908	908	ROM_START(tvsson2)
909	909	ROM_REGION( 0x100000, "maincpu", 0 )
910	910	ROM_LOAD( "tourv_son_son_ii.bin", 0x00000, 0x100000, CRC(8fb484cd) SHA1(553838dcb3524fe0b620ea60e926a57cc371068d) )
r253023	r253024
943	943	TOURVISION_BIOS
944	944	ROM_END
945	945
946		/* Tatsujin */
	946	/* Tatsujin */
947	947	ROM_START(tvtsujin)
948	948	ROM_REGION( 0x100000, "maincpu", 0 )
949	949	ROM_LOAD( "tourv_tatsujin.bin", 0x00000, 0x100000, CRC(023adbcc) SHA1(bef7d03fff2e74970a0747c12d31ec8661703deb) )
r253023	r253024
951	951	TOURVISION_BIOS
952	952	ROM_END
953	953
954		/* Terra Cresta II */
	954	/* Terra Cresta II */
955	955	ROM_START(tvtcrst2)
956	956	ROM_REGION( 0x100000, "maincpu", 0 )
957	957	ROM_LOAD( "tourv_terra_cresta_ii.bin", 0x00000, 0x100000, CRC(8e7bb390) SHA1(af13afe006313b0db1273782c977efdad6100291) )
r253023	r253024
974	974	TOURVISION_BIOS
975	975	ROM_END
976	976
977		/* Toy Shop Boys */
	977	/* Toy Shop Boys */
978	978	ROM_START(tvtsboys)
979	979	ROM_REGION( 0x100000, "maincpu", 0 )
980	980	ROM_LOAD( "tourv_toy_shop_boys.bin", 0x00000, 0x100000, CRC(a9ed3440) SHA1(c519744cc16dad7a1455e359020ce95f4ac0b51a) )
r253023	r253024
997	997	TOURVISION_BIOS
998	998	ROM_END
999	999
1000		/* Veigues */
	1000	/* Veigues */
1001	1001	ROM_START(tveigues)
1002	1002	ROM_REGION( 0x100000, "maincpu", 0 )
1003	1003	ROM_LOAD( "tourv_veigues.bin", 0x00000, 0x100000, CRC(64ef8be7) SHA1(634191a181cbccbed8cf7a86e4f074691ba9b715) )
r253023	r253024
1013	1013	TOURVISION_BIOS
1014	1014	ROM_END
1015	1015
1016		/* Winning Shot */
	1016	/* Winning Shot */
1017	1017	ROM_START(tvwnshot)
1018	1018	ROM_REGION( 0x100000, "maincpu", 0 )
1019	1019	ROM_LOAD( "tourv_winning_shot.bin", 0x00000, 0x100000, CRC(7196b2ca) SHA1(a1ae2e875541ad39751a95629d614d2c913b8c02) )
r253023	r253024
1021	1021	TOURVISION_BIOS
1022	1022	ROM_END
1023	1023
1024		/* W-Ring */
	1024	/* W-Ring */
1025	1025	ROM_START(tvwring)
1026	1026	ROM_REGION( 0x100000, "maincpu", 0 )
1027	1027	ROM_LOAD( "tourv_w-ring.bin", 0x00000, 0x100000, CRC(609dc08d) SHA1(191b8751fc5b8700c7d9dae23d194016fe84586c) )
r253023	r253024
1029	1029	TOURVISION_BIOS
1030	1030	ROM_END
1031	1031
1032		/* Xevious */
	1032	/* Xevious */
1033	1033	ROM_START(tvxvious)
1034	1034	ROM_REGION( 0x100000, "maincpu", 0 )
1035	1035	ROM_LOAD( "tourv_xevious.bin", 0x00000, 0x100000, CRC(3c0fb5a9) SHA1(1fd9ff582da83e1b9fee569da4db4de15e912f62) )
r253023	r253024
1061	1061	GAME( 1990, tvarmedf, tourvis, tourvision, tourvision, pce_common_state, pce_common, ROT0, "bootleg (Tourvision) / Nichibutsu / Big Don", "Armed-F (Tourvision PCE bootleg)", MACHINE_IMPERFECT_SOUND \| MACHINE_NOT_WORKING )
1062	1062	GAME( 1990, tvbeball, tourvis, tourvision, tourvision, pce_common_state, pce_common, ROT0, "bootleg (Tourvision) / Hudson Soft", "Be Ball (Tourvision PCE bootleg)", MACHINE_IMPERFECT_SOUND \| MACHINE_NOT_WORKING )
1063	1063	GAME( 1990, tvbomber, tourvis, tourvision, tourvision, pce_common_state, pce_common, ROT0, "bootleg (Tourvision) / Hudson Soft", "Bomberman (Tourvision PCE bootleg)", MACHINE_IMPERFECT_SOUND \| MACHINE_NOT_WORKING )
1064		GAME( 1990, tvbrabho, tourvis, tourvision, tourvision, pce_common_state, pce_common, ROT0, "bootleg (Tourvision) / Namco / Namcot", "Chōzetsurinjin Beraboh Man (Tourvision PCE bootleg)", MACHINE_IMPERFECT_SOUND \| MACHINE_NOT_WORKING )
	1064	GAME( 1990, tvbrabho, tourvis, tourvision, tourvision, pce_common_state, pce_common, ROT0, "bootleg (Tourvision) / Namco / Namcot", "Ch??zetsurinjin Beraboh Man (Tourvision PCE bootleg)", MACHINE_IMPERFECT_SOUND \| MACHINE_NOT_WORKING )
1065	1065	GAME( 1990, tvdsenpu, tourvis, tourvision, tourvision, pce_common_state, pce_common, ROT0, "bootleg (Tourvision) / Toaplan / Nec Avenue", "Daisenpu (Tourvision PCE bootleg)", MACHINE_IMPERFECT_SOUND \| MACHINE_NOT_WORKING )
1066	1066	GAME( 1990, tvdevilc, tourvis, tourvision, tourvision, pce_common_state, pce_common, ROT0, "bootleg (Tourvision) / Naxat / Red", "Devil Crash (Tourvision PCE bootleg)", MACHINE_IMPERFECT_SOUND \| MACHINE_NOT_WORKING )
1067	1067	GAME( 1990, tvdodgeb, tourvis, tourvision, tourvision, pce_common_state, pce_common, ROT0, "bootleg (Tourvision) / Technos Japan Corp / Naxat Soft", "Dodge Ball (Tourvision PCE bootleg)", MACHINE_IMPERFECT_SOUND \| MACHINE_NOT_WORKING )

trunk/src/mame/drivers/ts803.cpp
r253023	r253024
124	124
125	125	I/0 Port Addresses
126	126
127		System Status Switch 1 00
128		Diagnostic Indicators 1 and 2 10
129		Diagnostic Indicators 3 and 4 11
130		RS-422 Control and Auto Wait 12
131		Memory Bank Select 13
132		STI Device (modem) 20-2F
133		DART Dual Asynchronous Receiver Transmitter
134		Device (keyboard, printer, mouse) 30-33
135		RS-422 SIO Device· 40-43
136		Floppy Disk Controller 80-83
137		Floppy Disk Drive Decoder 90
138		Winchester Disk Controller Reset A0
139		Winchester Disk Controller B0-BF
140		Graphics Controller C0-CF
	127	System Status Switch 1 00
	128	Diagnostic Indicators 1 and 2 10
	129	Diagnostic Indicators 3 and 4 11
	130	RS-422 Control and Auto Wait 12
	131	Memory Bank Select 13
	132	STI Device (modem) 20-2F
	133	DART Dual Asynchronous Receiver Transmitter
	134	Device (keyboard, printer, mouse) 30-33
	135	RS-422 SIO Device 40-43
	136	Floppy Disk Controller 80-83
	137	Floppy Disk Drive Decoder 90
	138	Winchester Disk Controller Reset A0
	139	Winchester Disk Controller B0-BF
	140	Graphics Controller C0-CF
141	141
142	142	*/
143	143	static ADDRESS_MAP_START(ts803_io, AS_IO, 8, ts803_state)
r253023	r253024
176	176	//m_maincpu->set_input_line(INPUT_LINE_IRQ0, ASSERT_LINE);
177	177
178	178	if (data==0x0d) m_maincpu->space(AS_PROGRAM).write_byte(0xf83f,0xC1);
179		else
	179	else
180	180	{
181	181	m_maincpu->space(AS_PROGRAM).write_byte(0xf83f,0x4f);
182	182	m_maincpu->space(AS_PROGRAM).write_byte(0xf890,data);
r253023	r253024
260	260	WRITE8_MEMBER( ts803_state::ts803_porthi_w )
261	261	{
262	262	//printf("PortHI write [%2x] [%2x]\n",offset+0x91,data);
263
	263
264	264	switch (offset+0x91)
265	265	{
266	266	case 0xc4:
r253023	r253024
416	416	{
417	417	/*
418	418	Bit 0 = 0 alpha mode
419		1 graphics mode
	419	1 graphics mode
420	420	Bit 1 = 0 page 1 (alpha mode only)
421		1 page 2 (alpha mode only)
	421	1 page 2 (alpha mode only)
422	422	Bit 2 = 0 alpha memory access (round off)
423		1 graphics memory access (normal CPU address)
	423	1 graphics memory access (normal CPU address)
424	424	*/
425	425
426	426	//printf("CRTC::c4 write [%2x]\n",data);

trunk/src/mame/drivers/wildpkr.cpp
r253023	r253024
231	231	AM_RANGE(0x300000, 0x303fff) AM_RAM
232	232	AM_RANGE(0x400000, 0x4007ff) AM_RAM // dallas timekeeper?
233	233
234		// AM_RANGE(0x800200, 0x800201) AM_DEVWRITE8("ramdac", ramdac_device, index_w, 0xff00)
235		// AM_RANGE(0x800202, 0x800203) AM_DEVWRITE8("ramdac", ramdac_device, pal_w, 0xff00)
236		// AM_RANGE(0x800204, 0x800205) AM_DEVWRITE8("ramdac", ramdac_device, mask_w, 0xff00)
	234	// AM_RANGE(0x800200, 0x800201) AM_DEVWRITE8("ramdac", ramdac_device, index_w, 0xff00)
	235	// AM_RANGE(0x800202, 0x800203) AM_DEVWRITE8("ramdac", ramdac_device, pal_w, 0xff00)
	236	// AM_RANGE(0x800204, 0x800205) AM_DEVWRITE8("ramdac", ramdac_device, mask_w, 0xff00)
237	237	ADDRESS_MAP_END
238	238
239	239	/* Unknown R/W:

trunk/src/mame/drivers/williams.cpp
r253023	r253024
493	493
494	494	It's a RAM-based palette with 4 bit red, green, blue and brightness/intensity components. It looks like the
495	495	brightness component (from IC76, the uppermost of the four 2148 SRAMs) should be combined with the color
496		components in a more complicated way than simply multiplying them like MAME does.
	496	components in a more complicated way than simply multiplying them like MAME does.
497	497
498	498	Reference video: https://www.youtube.com/watch?v=R5OeC6Wc_yI
499	499

trunk/src/mame/drivers/witch.cpp
r253023	r253024
415	415	case 0x02: //A002 bit 7&6 = m_bank ????
416	416	{
417	417	m_reg_a002 = data;
418
	418
419	419	membank("bank1")->set_entry((data>>6)&3);
420	420	}
421	421	break;
r253023	r253024
724	724	m_gfx0a_tilemap->set_palette_offset(0x100);
725	725	m_gfx0b_tilemap->set_palette_offset(0x100);
726	726	m_gfx1_tilemap->set_palette_offset(0x200);
727
	727
728	728	save_item(NAME(m_scrollx));
729	729	save_item(NAME(m_scrolly));
730	730	save_item(NAME(m_reg_a002));

trunk/src/mame/includes/40love.h
r253023	r253024
42	42	bitmap_ind16 *m_pixel_bitmap1;
43	43	bitmap_ind16 *m_pixel_bitmap2;
44	44	int m_pixram_sel;
45		bool m_color_bank;
46		bool m_screen_disable;
47
	45	bool m_color_bank;
	46	bool m_screen_disable;
	47
48	48	/* sound-related */
49	49	int m_sound_nmi_enable;
50	50	int m_pending_nmi;

trunk/src/mame/includes/arkanoid.h
r253023	r253024
54	54	UINT8 m_toz80; // byte latch for 68705->z80 comms
55	55
56	56	/* mcu internal related */
57		UINT8 m_port_a_in;
	57	UINT8 m_port_a_in;
58	58	UINT8 m_port_a_out;
59	59	UINT8 m_ddr_a;
60	60	UINT8 m_port_c_internal;

trunk/src/mame/includes/cps3.h
r253023	r253024
53	53	required_shared_ptr<UINT32> m_decrypted_gamerom;
54	54	required_shared_ptr<UINT32> m_0xc0000000_ram_decrypted;
55	55
56		optional_memory_region m_user4_region;
57		optional_memory_region m_user5_region;
	56	optional_memory_region m_user4_region;
	57	optional_memory_region m_user5_region;
58	58
59	59	fujitsu_29f016a_device *m_simm[7][8];
60	60	UINT32 m_cram_gfxflash_bank;

trunk/src/mame/includes/dkong.h
r253023	r253024
145	145	std::unique_ptr<UINT8[]> m_decrypted;
146	146
147	147	/* sound state */
148		optional_region_ptr<UINT8> m_snd_rom;
	148	optional_region_ptr<UINT8> m_snd_rom;
149	149
150	150	/* video state */
151	151	tilemap_t *m_bg_tilemap;

trunk/src/mame/includes/fm7.h
r253023	r253024
284	284	optional_shared_ptr<UINT8> m_shared_ram;
285	285	optional_shared_ptr<UINT8> m_boot_ram;
286	286
287		UINT8 m_irq_flags;
288		UINT8 m_irq_mask;
289		emu_timer* m_timer;
290		emu_timer* m_subtimer;
291		emu_timer* m_keyboard_timer;
292		UINT8 m_basic_rom_en;
293		UINT8 m_init_rom_en;
	287	UINT8 m_irq_flags;
	288	UINT8 m_irq_mask;
	289	emu_timer* m_timer;
	290	emu_timer* m_subtimer;
	291	emu_timer* m_keyboard_timer;
	292	UINT8 m_basic_rom_en;
	293	UINT8 m_init_rom_en;
294	294
295		unsigned int m_key_delay;
296		unsigned int m_key_repeat;
297		UINT16 m_current_scancode;
298		UINT32 m_key_data[4];
299		UINT32 m_mod_data;
300		UINT8 m_key_scan_mode;
301		UINT8 m_break_flag;
	295	unsigned int m_key_delay;
	296	unsigned int m_key_repeat;
	297	UINT16 m_current_scancode;
	298	UINT32 m_key_data[4];
	299	UINT32 m_mod_data;
	300	UINT8 m_key_scan_mode;
	301	UINT8 m_break_flag;
302	302
303		UINT8 m_psg_regsel;
304		UINT8 m_psg_data;
	303	UINT8 m_psg_regsel;
	304	UINT8 m_psg_data;
305	305
306		UINT8 m_fdc_side;
307		UINT8 m_fdc_drive;
308		UINT8 m_fdc_irq_flag;
309		UINT8 m_fdc_drq_flag;
	306	UINT8 m_fdc_side;
	307	UINT8 m_fdc_drive;
	308	UINT8 m_fdc_irq_flag;
	309	UINT8 m_fdc_drq_flag;
310	310
311		UINT8 m_fm77av_ym_irq;
312		UINT8 m_speaker_active;
	311	UINT8 m_fm77av_ym_irq;
	312	UINT8 m_speaker_active;
313	313
314		UINT16 m_kanji_address;
315		fm7_encoder_t m_encoder;
316		fm7_mmr_t m_mmr;
317		UINT8 m_cp_prev;
	314	UINT16 m_kanji_address;
	315	fm7_encoder_t m_encoder;
	316	fm7_mmr_t m_mmr;
	317	UINT8 m_cp_prev;
318	318
319		std::unique_ptr<UINT8[]> m_video_ram;
320		emu_timer* m_fm77av_vsync_timer;
	319	std::unique_ptr<UINT8[]> m_video_ram;
	320	emu_timer* m_fm77av_vsync_timer;
321	321	UINT8 m_type;
322		fm7_video_t m_video;
323		fm7_alu_t m_alu;
324		int m_sb_prev;
	322	fm7_video_t m_video;
	323	fm7_alu_t m_alu;
	324	int m_sb_prev;
325	325
326	326	void fm77av_encoder_setup_command();
327	327	void fm77av_encoder_handle_command();

trunk/src/mame/includes/gaelco2.h
r253023	r253024
30	30	required_shared_ptr<UINT16> m_generic_paletteram_16;
31	31	optional_shared_ptr<UINT16> m_shareram;
32	32
33
34	33
	34
35	35	UINT32 snowboard_latch;
36	36
37	37
r253023	r253024
39	39	tilemap_t *m_pant[2];
40	40	int m_dual_monitor;
41	41
42		DECLARE_READ16_MEMBER(dallas_kludge_r);
	42	DECLARE_READ16_MEMBER(dallas_kludge_r);
43	43	DECLARE_READ16_MEMBER(maniacsqa_prot_r);
44	44
45	45	DECLARE_WRITE16_MEMBER(gaelco2_coin_w);

trunk/src/mame/includes/harddriv.h
r253023	r253024
344	344	UINT16 m_som_memory[0x8000/2];
345	345	UINT16 * m_adsp_pgm_memory_word;
346	346
347		optional_region_ptr<UINT16> m_ds3_sdata_memory;
	347	optional_region_ptr<UINT16> m_ds3_sdata_memory;
348	348	UINT32 m_ds3_sdata_memory_size;
349	349
350	350	UINT8 m_ds3_gcmd;

trunk/src/mame/includes/jaguar.h
r253023	r253024
84	84	required_shared_ptr<UINT32> m_shared_ram;
85	85	required_shared_ptr<UINT32> m_gpu_ram;
86	86	required_shared_ptr<UINT32> m_gpu_clut;
87		optional_memory_region m_romboard_region;
	87	optional_memory_region m_romboard_region;
88	88
89	89	// configuration
90	90	bool m_is_r3000;

trunk/src/mame/layout/fidel_vcc.lay
r253023	r253024
62	62	<bezel name="0.7" element="led">
63	63	<bounds x="22.25" y="17" width="1.5" height="1.5" />
64	64	</bezel>
65
	65
66	66	</view>
67	67	</mamelayout>

trunk/src/mame/layout/marywu.lay
r253023	r253024
9	9	</led7seg>
10	10	</element>
11	11
12		<element name="led" defstate="0">
13		<text string=""></text>
14		<disk state="0">
15		<color red="0.1" green="0.025" blue="0.028" />
16		<bounds x="0.25" y="0.25" width="0.5" height="0.5" />
17		</disk>
18		<disk state="1">
19		<color red="1.0" green="0.25" blue="0.28" />
20		<bounds x="0.25" y="0.25" width="0.5" height="0.5" />
21		</disk>
22		</element>
	12	<element name="led" defstate="0">
	13	<text string=""></text>
	14	<disk state="0">
	15	<color red="0.1" green="0.025" blue="0.028" />
	16	<bounds x="0.25" y="0.25" width="0.5" height="0.5" />
	17	</disk>
	18	<disk state="1">
	19	<color red="1.0" green="0.25" blue="0.28" />
	20	<bounds x="0.25" y="0.25" width="0.5" height="0.5" />
	21	</disk>
	22	</element>
23	23
24	24	<element name="background">
25	25	<rect>
r253023	r253024
35	35	<bounds left="0" top="20" right="798" bottom="770" />
36	36	</backdrop>
37	37
38		<!-- LEDs -->
	38	<!-- LEDs -->
39	39
40		<bezel name="led4" element="led"><bounds x="199" y="160" width="40" height="40" /></bezel>
41		<bezel name="led5" element="led"><bounds x="249" y="160" width="40" height="40" /></bezel>
42		<bezel name="led6" element="led"><bounds x="324" y="160" width="40" height="40" /></bezel>
43		<bezel name="led7" element="led"><bounds x="399" y="160" width="40" height="40" /></bezel>
44		<bezel name="led8" element="led"><bounds x="474" y="160" width="40" height="40" /></bezel>
45		<bezel name="led9" element="led"><bounds x="549" y="160" width="40" height="40" /></bezel>
46		<bezel name="led10" element="led"><bounds x="599" y="160" width="40" height="40" /></bezel>
	40	<bezel name="led4" element="led"><bounds x="199" y="160" width="40" height="40" /></bezel>
	41	<bezel name="led5" element="led"><bounds x="249" y="160" width="40" height="40" /></bezel>
	42	<bezel name="led6" element="led"><bounds x="324" y="160" width="40" height="40" /></bezel>
	43	<bezel name="led7" element="led"><bounds x="399" y="160" width="40" height="40" /></bezel>
	44	<bezel name="led8" element="led"><bounds x="474" y="160" width="40" height="40" /></bezel>
	45	<bezel name="led9" element="led"><bounds x="549" y="160" width="40" height="40" /></bezel>
	46	<bezel name="led10" element="led"><bounds x="599" y="160" width="40" height="40" /></bezel>
47	47
48		<bezel name="led3" element="led"><bounds x="199" y="210" width="40" height="40" /></bezel>
49		<bezel name="led11" element="led"><bounds x="599" y="210" width="40" height="40" /></bezel>
	48	<bezel name="led3" element="led"><bounds x="199" y="210" width="40" height="40" /></bezel>
	49	<bezel name="led11" element="led"><bounds x="599" y="210" width="40" height="40" /></bezel>
50	50
51		<bezel name="led2" element="led"><bounds x="199" y="285" width="40" height="40" /></bezel>
52		<bezel name="led12" element="led"><bounds x="599" y="285" width="40" height="40" /></bezel>
	51	<bezel name="led2" element="led"><bounds x="199" y="285" width="40" height="40" /></bezel>
	52	<bezel name="led12" element="led"><bounds x="599" y="285" width="40" height="40" /></bezel>
53	53
54		<bezel name="led1" element="led"><bounds x="199" y="360" width="40" height="40" /></bezel>
55		<bezel name="led30" element="led"><bounds x="399" y="360" width="40" height="40" /></bezel>
56		<bezel name="led13" element="led"><bounds x="599" y="360" width="40" height="40" /></bezel>
	54	<bezel name="led1" element="led"><bounds x="199" y="360" width="40" height="40" /></bezel>
	55	<bezel name="led30" element="led"><bounds x="399" y="360" width="40" height="40" /></bezel>
	56	<bezel name="led13" element="led"><bounds x="599" y="360" width="40" height="40" /></bezel>
57	57
58		<bezel name="led0" element="led"><bounds x="199" y="435" width="40" height="40" /></bezel>
59		<bezel name="led14" element="led"><bounds x="599" y="435" width="40" height="40" /></bezel>
	58	<bezel name="led0" element="led"><bounds x="199" y="435" width="40" height="40" /></bezel>
	59	<bezel name="led14" element="led"><bounds x="599" y="435" width="40" height="40" /></bezel>
60	60
61		<bezel name="led23" element="led"><bounds x="199" y="510" width="40" height="40" /></bezel>
62		<bezel name="led15" element="led"><bounds x="599" y="510" width="40" height="40" /></bezel>
	61	<bezel name="led23" element="led"><bounds x="199" y="510" width="40" height="40" /></bezel>
	62	<bezel name="led15" element="led"><bounds x="599" y="510" width="40" height="40" /></bezel>
63	63
64		<bezel name="led22" element="led"><bounds x="199" y="560" width="40" height="40" /></bezel>
65		<bezel name="led21" element="led"><bounds x="249" y="560" width="40" height="40" /></bezel>
66		<bezel name="led20" element="led"><bounds x="324" y="560" width="40" height="40" /></bezel>
67		<bezel name="led19" element="led"><bounds x="399" y="560" width="40" height="40" /></bezel>
68		<bezel name="led18" element="led"><bounds x="474" y="560" width="40" height="40" /></bezel>
69		<bezel name="led17" element="led"><bounds x="549" y="560" width="40" height="40" /></bezel>
70		<bezel name="led16" element="led"><bounds x="599" y="560" width="40" height="40" /></bezel>
	64	<bezel name="led22" element="led"><bounds x="199" y="560" width="40" height="40" /></bezel>
	65	<bezel name="led21" element="led"><bounds x="249" y="560" width="40" height="40" /></bezel>
	66	<bezel name="led20" element="led"><bounds x="324" y="560" width="40" height="40" /></bezel>
	67	<bezel name="led19" element="led"><bounds x="399" y="560" width="40" height="40" /></bezel>
	68	<bezel name="led18" element="led"><bounds x="474" y="560" width="40" height="40" /></bezel>
	69	<bezel name="led17" element="led"><bounds x="549" y="560" width="40" height="40" /></bezel>
	70	<bezel name="led16" element="led"><bounds x="599" y="560" width="40" height="40" /></bezel>
71	71
72		<bezel name="led29" element="led"><bounds x="199" y="660" width="40" height="40" /></bezel>
73		<bezel name="led28" element="led"><bounds x="279" y="660" width="40" height="40" /></bezel>
74		<bezel name="led27" element="led"><bounds x="359" y="660" width="40" height="40" /></bezel>
75		<bezel name="led26" element="led"><bounds x="439" y="660" width="40" height="40" /></bezel>
76		<bezel name="led25" element="led"><bounds x="519" y="660" width="40" height="40" /></bezel>
77		<bezel name="led24" element="led"><bounds x="599" y="660" width="40" height="40" /></bezel>
	72	<bezel name="led29" element="led"><bounds x="199" y="660" width="40" height="40" /></bezel>
	73	<bezel name="led28" element="led"><bounds x="279" y="660" width="40" height="40" /></bezel>
	74	<bezel name="led27" element="led"><bounds x="359" y="660" width="40" height="40" /></bezel>
	75	<bezel name="led26" element="led"><bounds x="439" y="660" width="40" height="40" /></bezel>
	76	<bezel name="led25" element="led"><bounds x="519" y="660" width="40" height="40" /></bezel>
	77	<bezel name="led24" element="led"><bounds x="599" y="660" width="40" height="40" /></bezel>
78	78
79		<!-- Top 7seg display modules -->
	79	<!-- Top 7seg display modules -->
80	80
81		<bezel name="digit23" element="digit">
82		<bounds left="200" top="45" right="234" bottom="84" />
83		</bezel>
84		<bezel name="digit22" element="digit">
85		<bounds left="244" top="45" right="278" bottom="84" />
86		</bezel>
87		<bezel name="digit21" element="digit">
88		<bounds left="288" top="45" right="322" bottom="84" />
89		</bezel>
90		<bezel name="digit20" element="digit">
91		<bounds left="332" top="45" right="366" bottom="84" />
92		</bezel>
	81	<bezel name="digit23" element="digit">
	82	<bounds left="200" top="45" right="234" bottom="84" />
	83	</bezel>
	84	<bezel name="digit22" element="digit">
	85	<bounds left="244" top="45" right="278" bottom="84" />
	86	</bezel>
	87	<bezel name="digit21" element="digit">
	88	<bounds left="288" top="45" right="322" bottom="84" />
	89	</bezel>
	90	<bezel name="digit20" element="digit">
	91	<bounds left="332" top="45" right="366" bottom="84" />
	92	</bezel>
93	93
94	94
95		<bezel name="digit19" element="digit">
96		<bounds left="432" top="45" right="466" bottom="84" />
97		</bezel>
98		<bezel name="digit18" element="digit">
99		<bounds left="476" top="45" right="510" bottom="84" />
100		</bezel>
101		<bezel name="digit17" element="digit">
102		<bounds left="520" top="45" right="554" bottom="84" />
103		</bezel>
104		<bezel name="digit16" element="digit">
105		<bounds left="564" top="45" right="598" bottom="84" />
106		</bezel>
	95	<bezel name="digit19" element="digit">
	96	<bounds left="432" top="45" right="466" bottom="84" />
	97	</bezel>
	98	<bezel name="digit18" element="digit">
	99	<bounds left="476" top="45" right="510" bottom="84" />
	100	</bezel>
	101	<bezel name="digit17" element="digit">
	102	<bounds left="520" top="45" right="554" bottom="84" />
	103	</bezel>
	104	<bezel name="digit16" element="digit">
	105	<bounds left="564" top="45" right="598" bottom="84" />
	106	</bezel>
107	107
108	108
109	109
110		<!-- Middle 7seg display module -->
	110	<!-- Middle 7seg display module -->
111	111
112		<bezel name="digit25" element="digit">
113		<bounds left="355" top="421" right="389" bottom="460" />
114		</bezel>
115		<bezel name="digit24" element="digit">
116		<bounds left="399" top="421" right="433" bottom="460" />
117		</bezel>
	112	<bezel name="digit25" element="digit">
	113	<bounds left="355" top="421" right="389" bottom="460" />
	114	</bezel>
	115	<bezel name="digit24" element="digit">
	116	<bounds left="399" top="421" right="433" bottom="460" />
	117	</bezel>
118	118
119	119
120	120
121		<!-- Bottom 7seg display modules -->
	121	<!-- Bottom 7seg display modules -->
122	122
123	123	<bezel name="digit15" element="digit">
124	124	<bounds left="10" top="721" right="44" bottom="760" />

trunk/src/mame/machine/arkanoid.cpp
r253023	r253024
68	68	WRITE8_MEMBER(arkanoid_state::arkanoid_68705_tcr_w)
69	69	{
70	70	/*
71		logerror("arkanoid_68705 TCR written with %02X\n", data);
72		if (data&0x80) logerror(" TIR=1, Timer Interrupt state is set\n"); else logerror(" TIR=0; Timer Interrupt state is cleared\n");
73		if (data&0x40) logerror(" TIM=1, Timer Interrupt is now masked\n"); else logerror(" TIM=0, Timer Interrupt is now unmasked\n");
74		if (data&0x20) logerror(" TIN=1, Timer Clock source is set to external\n"); else logerror(" TIN=0, Timer Clock source is set to internal\n");
75		if (data&0x10) logerror(" TIE=1, Timer External pin is enabled\n"); else logerror(" TIE=0, Timer External pin is disabled\n");
76		if (data&0x08) logerror(" PSC=1, Prescaler counter cleared\n"); else logerror(" PSC=0, Prescaler counter left alone\n");
77		logerror(" Prescaler: %d\n", (1<<(data&0x7)));
	71	logerror("arkanoid_68705 TCR written with %02X\n", data);
	72	if (data&0x80) logerror(" TIR=1, Timer Interrupt state is set\n"); else logerror(" TIR=0; Timer Interrupt state is cleared\n");
	73	if (data&0x40) logerror(" TIM=1, Timer Interrupt is now masked\n"); else logerror(" TIM=0, Timer Interrupt is now unmasked\n");
	74	if (data&0x20) logerror(" TIN=1, Timer Clock source is set to external\n"); else logerror(" TIN=0, Timer Clock source is set to internal\n");
	75	if (data&0x10) logerror(" TIE=1, Timer External pin is enabled\n"); else logerror(" TIE=0, Timer External pin is disabled\n");
	76	if (data&0x08) logerror(" PSC=1, Prescaler counter cleared\n"); else logerror(" PSC=0, Prescaler counter left alone\n");
	77	logerror(" Prescaler: %d\n", (1<<(data&0x7)));
78	78	*/
79	79	// if timer was enabled but now isn't, shut it off.
80	80	// below is a hack assuming the TIMER pin isn't going anywhere except tied to +5v, so basically TIN is acting as an active-low timer enable, and TIE is ignored even in the case where TIE=1, the timer will end up being 5v ANDED against the internal timer clock which == the internal timer clock.
r253023	r253024
95	95	// if int state is set, and TIM is unmasked, assert an interrupt. otherwise clear it.
96	96	if ((m_tcr&0xC0) == 0x80)
97	97	m_mcu->set_input_line(M68705_INT_TIMER, ASSERT_LINE);
98		else
	98	else
99	99	m_mcu->set_input_line(M68705_INT_TIMER, CLEAR_LINE);
100	100
101	101	}
r253023	r253024
118	118	if (m_tdr == 0x00) m_tcr \|= 0x80; // if we overflowed, set the int bit
119	119	if ((m_tcr&0xC0) == 0x80)
120	120	m_mcu->set_input_line(M68705_INT_TIMER, ASSERT_LINE);
121		else
	121	else
122	122	m_mcu->set_input_line(M68705_INT_TIMER, CLEAR_LINE);
123	123	timer_set(attotime::from_hz(((XTAL_12MHz/4)/4)/(1<<(m_tcr&0x7))), TIMER_68705_PRESCALER_EXPIRED);
124	124	}
r253023	r253024
178	178	{
179	179	UINT8 changed_m_port_c_out = (m_port_c_out^(m_port_c_internal\|(~(data\|0xF0))));
180	180	m_port_c_out = (m_port_c_internal\|(~(data\|0xF0)));
181
	181
182	182	/* bits 0 and 1 are inputs, should never be set as outputs here. if they are, ignore them. */
183	183	/* bit 2 is an output, to clear latch 1(m_z80HasWritten) on rising edge, and enable the z80->68705 communication latch on level low */
184	184	// if 0x04 rising edge, clear m_z80HasWritten/latch 1 (and clear the irq line)
r253023	r253024
187	187	m_z80HasWritten = 0;
188	188	m_mcu->set_input_line(M68705_IRQ_LINE, CLEAR_LINE);
189	189	}
190
	190
191	191	// if 0x04 low, enable the m_port_a_in latch, otherwise set the latch value to 0xFF
192	192	if (~m_port_c_out&0x04)
193	193	m_port_a_in = m_fromz80;
194	194	else
195	195	m_port_a_in = 0xFF;
196
	196
197	197	/* bit 3 is an output, to set latch 2(m_68705HasWritten) and latch the port_a value into the 68705->z80 latch, on falling edge or low level */
198	198	// if 0x08 low, set m_68705HasWritten/latch 2
199	199	if (~m_port_c_out&0x08)

trunk/src/mame/machine/gaelco2.cpp
r253023	r253024
289	289
290	290	READ16_MEMBER(gaelco2_state::snowboar_protection_r)
291	291	{
292
293	292	chd_file * table = machine().rom_load().get_disk_handle(":decrypt");
294	293	UINT8 temp[1024];
295	294	table->read_hunk(snowboard_latch>>9, &temp[0]);

trunk/src/mame/machine/meters.cpp
r253023	r253024
41	41	m_meter_info[i].on = 0;
42	42	m_meter_info[i].meter_timer = timer_alloc(i);
43	43	m_meter_info[i].meter_timer->reset();
44
	44
45	45	//save_item(NAME(m_meter_info[i].reacttime), i); //enable if void ReactTime(int id, INT32 cycles) gets used
46	46	save_item(NAME(m_meter_info[i].state), i);
47	47	save_item(NAME(m_meter_info[i].count), i);
r253023	r253024
65	65	{
66	66	if (id >= m_number_mtr)
67	67	assert_always(FALSE, "Unknown id in meters_device::device_timer");
68
	68
69	69	m_meter_info[param].count++;
70	70	}
71	71

trunk/src/mame/machine/meters.h
r253023	r253024
18	18
19	19
20	20	#define MCFG_METERS_NUMBER(_number) \
21		meters_device::static_set_number_meters(*device, _number); \
22
	21	meters_device::static_set_number_meters(*device, _number);
23	22	#define MAXMECHMETERS 8
24	23
25	24	#define METERREACTTIME 0.025 // number of seconds meter has to be active to tick
r253023	r253024
56	55	bool state; // state 0/1
57	56	emu_timer *meter_timer;
58	57	};
59
	58
60	59	meter_info m_meter_info[MAXMECHMETERS];
61	60
62	61	int m_number_mtr;

trunk/src/mame/machine/xbox.cpp
r253023	r253024
1521	1521	superiost.configuration_mode = true;
1522	1522	return;
1523	1523	}
1524		if ((offset == 0) && (data == 0xaa))
	1524	if ((offset == 0) && (data == 0xaa))
1525	1525	{
1526	1526	// config port 0x2e
1527	1527	superiost.configuration_mode = false;
r253023	r253024
1543	1543	{
1544	1544	superiost.registers[superiost.selected][superiost.index] = data;
1545	1545	//if ((superiost.selected == 4) && (superiost.index == 0x30) && (data != 0))
1546		// ; // add handlers 0x3f8- +7
	1546	// ; // add handlers 0x3f8- +7
1547	1547	}
1548	1548	}
1549	1549	}

trunk/src/mame/mess.lst
r253023	r253024
120	120	svmu // 1998 Sega Visual Memory Unit
121	121
122	122	// Sequential Circuits
123		prpht600 // 1983 Sequential Circuits
	123	prpht600 // 1983 Sequential Circuits
124	124
125	125	// Sony
126	126	psj // 1994 Sony PlayStation (Japan)

trunk/src/mame/video/40love.cpp
r253023	r253024
164	164
165	165	if(data & 0xd2)
166	166	popmessage("pixram sel = %02x, contact MAMEdev",data);
167
	167
168	168	m_pixram_sel = (data & 0x04) >> 2;
169	169	m_screen_disable = bool(data & 0x20); // Undoukai
170
	170
171	171	if(cur_col_bank != m_color_bank)
172	172	{
173	173	m_color_bank = cur_col_bank;
174	174	redraw_pixels();
175	175	}
176
	176
177	177	if (m_flipscreen != f)
178	178	{
179	179	m_flipscreen = f;
r253023	r253024
372	372	bitmap.fill(m_palette->black_pen(), cliprect);
373	373	return 0;
374	374	}
375
	375
376	376	draw_pixram(bitmap, cliprect);
377	377
378	378	m_bg_tilemap->set_scrolldy(- m_video_ctrl[1] + 1, - m_video_ctrl[1] - 1 );

trunk/src/mame/video/battlex.cpp
r253023	r253024
96	96	m_bg_tilemap->set_scrollx(0, m_scroll_lsb \| (m_scroll_msb << 8));
97	97	else
98	98	m_bg_tilemap->set_scrollx(0, m_scroll_lsb \| m_scroll_msb);
99
	99
100	100	m_bg_tilemap->draw(screen, bitmap, cliprect, 0, 0);
101	101	draw_sprites(bitmap, cliprect);
102	102

trunk/src/mame/video/chihiro.cpp
r253023	r253024
2318	2318	};
2319	2319	/*
2320	2320	for (int i = 0; i < 4; i++) {
2321		v[i] *= matrix.scale[i];
	2321	v[i] *= matrix.scale[i];
2322	2322	}
2323	2323	for (int i = 0; i < 4; i++) {
2324		v[i] += matrix.translate[i];
	2324	v[i] += matrix.translate[i];
2325	2325	}
2326	2326	*/
2327	2327	destination[m].x = v[0] / v[3]; // source[m].attribute[0].fv[0];

trunk/src/mame/video/m107.cpp
r253023	r253024
162	162	UINT16 *spriteram = m_buffered_spriteram.get();
163	163	int offs;
164	164	UINT8 *rom = m_user1_ptr;
165
	165
166	166	for (offs = 0;offs < 0x800;offs += 4)
167	167	{
168	168	int x,y,sprite,colour,fx,fy,y_multi,i,s_ptr,pri_mask;

trunk/src/mame/video/m58.cpp
r253023	r253024
245	245	{
246	246	sy2 = sy1 + 0x10;
247	247	}
248
	248
249	249	m_gfxdecode->gfx(1)->transmask(bitmap, cliprect,
250	250	code1 + 256 * bank, color,
251	251	flipx, flipy, sx, visarea.min_y + sy1,

trunk/src/mame/video/n64.cpp
r253023	r253024
2299	2299	// ewdata[29] = 0; w frac
2300	2300	ewdata[30] = ((dsdx & 0x1f) << 11) << 16; // dsdx frac, dtdx frac
2301	2301	// ewdata[31] = 0; dwdx frac
2302		ewdata[32] = (dtdy >> 5) & 0xffff; // dsde, dtde
2303		// ewdata[33] = 0; dwde
2304		ewdata[34] = (dtdy >> 5) & 0xffff; // dsdy, dtdy
2305		// ewdata[35] = 0; dwdy
2306		ewdata[36] = (dtdy & 0x1f) << 11; // dsde frac, dtde frac
2307		// ewdata[37] = 0; dwde frac
2308		ewdata[38] = (dtdy & 0x1f) << 11; // dsdy frac, dtdy frac
2309		// ewdata[39] = 0; // dwdy frac
2310		// ewdata[40-43] = 0; // depth
	2302	ewdata[32] = (dtdy >> 5) & 0xffff; // dsde, dtde
	2303	// ewdata[33] = 0; dwde
	2304	ewdata[34] = (dtdy >> 5) & 0xffff; // dsdy, dtdy
	2305	// ewdata[35] = 0; dwdy
	2306	ewdata[36] = (dtdy & 0x1f) << 11; // dsde frac, dtde frac
	2307	// ewdata[37] = 0; dwde frac
	2308	ewdata[38] = (dtdy & 0x1f) << 11; // dsdy frac, dtdy frac
	2309	// ewdata[39] = 0; // dwdy frac
	2310	// ewdata[40-43] = 0; // depth
2311	2311
2312	2312	draw_triangle(true, true, false, true);
2313	2313	}
r253023	r253024
2339	2339	const INT32 xhint = (xh >> 2) & 0x3ff;
2340	2340
2341	2341	UINT32* ewdata = m_temp_rect_data;
2342		ewdata[0] = (0x25 << 24) \| ((0x80 \| tilenum) << 16) \| yl; // command, flipped, tile, yl
2343		ewdata[1] = (yl << 16) \| yh; // ym, yh
2344		ewdata[2] = (xlint << 16) \| ((xl & 3) << 14); // xl, xl frac
2345		// ewdata[3] = 0; dxldy, dxldy frac
2346		ewdata[4] = (xhint << 16) \| ((xh & 3) << 14); // xh, xh frac
2347		// ewdata[5] = 0; dxhdy, dxhdy frac
2348		ewdata[6] = (xlint << 16) \| ((xl & 3) << 14); // xm, xm frac
2349		// ewdata[7] = 0; dxmdy, dxmdy frac
2350		memset(&ewdata[8], 0, 16 * sizeof(UINT32)); // shade
2351		ewdata[24] = (s << 16) \| t; // s, t
2352		// ewdata[25] = 0; // w
2353		ewdata[26] = (dtdy >> 5) & 0xffff; // dsdx, dtdx
2354		// ewdata[27] = 0; dwdx
2355		// ewdata[28] = 0; s frac, t frac
2356		// ewdata[29] = 0; w frac
2357		ewdata[30] = ((dtdy & 0x1f) << 11); // dsdx frac, dtdx frac
2358		// ewdata[31] = 0; dwdx frac
2359		ewdata[32] = (dsdx >> 5) << 16; // dsde, dtde
2360		// ewdata[33] = 0; dwde
2361		ewdata[34] = (dsdx >> 5) << 16; // dsdy, dtdy
2362		// ewdata[35] = 0; dwdy
2363		ewdata[36] = (dsdx & 0x1f) << 27; // dsde frac, dtde frac
2364		// ewdata[37] = 0; dwde frac
2365		ewdata[38] = (dsdx & 0x1f) << 27; // dsdy frac, dtdy frac
2366		// ewdata[39] = 0; // dwdy frac
2367		// ewdata[40-43] = 0; // depth
	2342	ewdata[0] = (0x25 << 24) \| ((0x80 \| tilenum) << 16) \| yl; // command, flipped, tile, yl
	2343	ewdata[1] = (yl << 16) \| yh; // ym, yh
	2344	ewdata[2] = (xlint << 16) \| ((xl & 3) << 14); // xl, xl frac
	2345	// ewdata[3] = 0; dxldy, dxldy frac
	2346	ewdata[4] = (xhint << 16) \| ((xh & 3) << 14); // xh, xh frac
	2347	// ewdata[5] = 0; dxhdy, dxhdy frac
	2348	ewdata[6] = (xlint << 16) \| ((xl & 3) << 14); // xm, xm frac
	2349	// ewdata[7] = 0; dxmdy, dxmdy frac
	2350	memset(&ewdata[8], 0, 16 * sizeof(UINT32)); // shade
	2351	ewdata[24] = (s << 16) \| t; // s, t
	2352	// ewdata[25] = 0; // w
	2353	ewdata[26] = (dtdy >> 5) & 0xffff; // dsdx, dtdx
	2354	// ewdata[27] = 0; dwdx
	2355	// ewdata[28] = 0; s frac, t frac
	2356	// ewdata[29] = 0; w frac
	2357	ewdata[30] = ((dtdy & 0x1f) << 11); // dsdx frac, dtdx frac
	2358	// ewdata[31] = 0; dwdx frac
	2359	ewdata[32] = (dsdx >> 5) << 16; // dsde, dtde
	2360	// ewdata[33] = 0; dwde
	2361	ewdata[34] = (dsdx >> 5) << 16; // dsdy, dtdy
	2362	// ewdata[35] = 0; dwdy
	2363	ewdata[36] = (dsdx & 0x1f) << 27; // dsde frac, dtde frac
	2364	// ewdata[37] = 0; dwde frac
	2365	ewdata[38] = (dsdx & 0x1f) << 27; // dsdy frac, dtdy frac
	2366	// ewdata[39] = 0; // dwdy frac
	2367	// ewdata[40-43] = 0; // depth
2368	2368
2369	2369	draw_triangle(true, true, false, true);
2370	2370	}

trunk/src/mame/video/n64.h
r253023	r253024
331	331	compute_cvg_t m_compute_cvg[2];
332	332
333	333	running_machine* m_machine;
334		UINT32* m_rdram;
335		UINT32* m_dmem;
	334	UINT32* m_rdram;
	335	UINT32* m_dmem;
336	336
337	337	combine_modes_t m_combine;
338	338	bool m_pending_mode_block;

trunk/src/osd/modules/debugger/debugint.cpp
r253023	r253024
1495	1495	debug_cpu_get_visible_cpu(machine)->debug()->go();
1496	1496	}
1497	1497	}
1498
	1498
1499	1499	if(machine.input().code_pressed_once(KEYCODE_F5))
1500	1500	debug_cpu_get_visible_cpu(machine)->debug()->go();
1501	1501	if(machine.input().code_pressed_once(KEYCODE_F6))
r253023	r253024
1556	1556
1557	1557	set_focus_view(ndv);
1558	1558	}
1559		}
	1559	}
1560	1560	if(machine.input().code_pressed_once(KEYCODE_L))
1561	1561	{
1562	1562	if(machine.input().code_pressed(KEYCODE_LCONTROL))
r253023	r253024
1619	1619	}
1620	1620	}
1621	1621
1622
	1622
1623	1623	// pass keypresses to debug view with focus
1624	1624	if(machine.input().code_pressed_once(KEYCODE_UP))
1625	1625	focus_view->view->process_char(DCH_UP);

trunk/src/osd/modules/render/d3d/d3dhlsl.cpp
r253023	r253024
2779	2779
2780	2780	// static INT32 slider_ntsc_phase_count(running_machine &machine, void arg, std::string str, INT32 newval)
2781	2781	// {
2782		// hlsl_options options = (hlsl_options)arg;
2783		// if (newval != SLIDER_NOCHANGE)
2784		// {
2785		// options->yiq_phase_count = newval;
2786		// }
2787		// if (str != NULL)
2788		// {
2789		// strprintf(*str, "%d", options->yiq_phase_count);
2790		// }
2791		// options->params_dirty = true;
	2782	// hlsl_options options = (hlsl_options)arg;
	2783	// if (newval != SLIDER_NOCHANGE)
	2784	// {
	2785	// options->yiq_phase_count = newval;
	2786	// }
	2787	// if (str != NULL)
	2788	// {
	2789	// strprintf(*str, "%d", options->yiq_phase_count);
	2790	// }
	2791	// options->params_dirty = true;
2792	2792
2793		// return options->yiq_phase_count;
	2793	// return options->yiq_phase_count;
2794	2794	// }
2795	2795
2796	2796	static INT32 slider_ntsc_jitter(running_machine &machine, void arg, std::string str, INT32 newval)
r253023	r253024
3091	3091	if (shadersys->curr_render_target != NULL)
3092	3092	{
3093	3093	float targetdims[2] = {
3094		static_cast<float>(shadersys->curr_render_target->target_width),
	3094	static_cast<float>(shadersys->curr_render_target->target_width),
3095	3095	static_cast<float>(shadersys->curr_render_target->target_height) };
3096	3096	m_shader->set_vector("TargetDims", 2, targetdims);
3097	3097	}

trunk/src/osd/modules/sound/xaudio2_sound.cpp
r253023	r253024
51	51
52	52	// Check HRESULT result and log if error, then take an optional action on failure
53	53	#define HR_LOG( CALL, LOGFN, ONFAIL ) do { \
54		result = CALL; \
55		if (FAILED(result)) { \
56		LOGFN(#CALL " failed with error 0x%X\n", (unsigned int)result); \
57		ONFAIL; } \
	54	result = CALL; \
	55	if (FAILED(result)) { \
	56	LOGFN(#CALL " failed with error 0x%X\n", (unsigned int)result); \
	57	ONFAIL; } \
58	58	} while (0)
59	59
60	60	// Variant of HR_LOG to log using osd_printf_error
r253023	r253024
91	91	// A stucture to hold a pointer and the count of bytes of the data it points to
92	92	struct xaudio2_buffer
93	93	{
94		std::unique_ptr<BYTE[]> AudioData;
95		DWORD AudioSize;
	94	std::unique_ptr<BYTE[]> AudioData;
	95	DWORD AudioSize;
96	96	};
97	97
98	98	// Custom deleter with overloads to free smart pointer types used in the implementations
99	99	struct xaudio2_custom_deleter
100	100	{
101	101	public:
102		void operator()(IXAudio2* obj) const
103		{
104		if (obj != nullptr)
105		{
106		obj->Release();
107		}
108		}
	102	void operator()(IXAudio2* obj) const
	103	{
	104	if (obj != nullptr)
	105	{
	106	obj->Release();
	107	}
	108	}
109	109
110		void operator()(IXAudio2MasteringVoice* obj) const
111		{
112		if (obj != nullptr)
113		{
114		obj->DestroyVoice();
115		}
116		}
	110	void operator()(IXAudio2MasteringVoice* obj) const
	111	{
	112	if (obj != nullptr)
	113	{
	114	obj->DestroyVoice();
	115	}
	116	}
117	117
118		void operator()(IXAudio2SourceVoice* obj) const
119		{
120		if (obj != nullptr)
121		{
122		obj->Stop(0);
123		obj->FlushSourceBuffers();
124		obj->DestroyVoice();
125		}
126		}
	118	void operator()(IXAudio2SourceVoice* obj) const
	119	{
	120	if (obj != nullptr)
	121	{
	122	obj->Stop(0);
	123	obj->FlushSourceBuffers();
	124	obj->DestroyVoice();
	125	}
	126	}
127	127
128		void operator()(osd_lock* obj) const
129		{
130		if (obj != nullptr)
131		{
132		osd_lock_free(obj);
133		}
134		}
	128	void operator()(osd_lock* obj) const
	129	{
	130	if (obj != nullptr)
	131	{
	132	osd_lock_free(obj);
	133	}
	134	}
135	135	};
136	136
137	137	// Typedefs for smart pointers used with customer deleters
r253023	r253024
151	151	class osd_scoped_lock
152	152	{
153	153	private:
154		osd_lock * m_lock;
	154	osd_lock * m_lock;
155	155	public:
156		osd_scoped_lock(osd_lock* lock)
157		{
158		m_lock = lock;
159		osd_lock_acquire(m_lock);
160		}
	156	osd_scoped_lock(osd_lock* lock)
	157	{
	158	m_lock = lock;
	159	osd_lock_acquire(m_lock);
	160	}
161	161
162		~osd_scoped_lock()
163		{
164		if (m_lock != nullptr)
165		{
166		osd_lock_release(m_lock);
167		}
168		}
	162	~osd_scoped_lock()
	163	{
	164	if (m_lock != nullptr)
	165	{
	166	osd_lock_release(m_lock);
	167	}
	168	}
169	169	};
170	170
171	171	// Provides a pool of buffers
172	172	class bufferpool
173	173	{
174	174	private:
175		int m_initial;
176		int m_buffersize;
177		std::queue<std::unique_ptr<BYTE[]>> m_queue;
	175	int m_initial;
	176	int m_buffersize;
	177	std::queue<std::unique_ptr<BYTE[]>> m_queue;
178	178
179	179	public:
180		// constructor
181		bufferpool(int capacity, int bufferSize) :
182		m_initial(capacity),
183		m_buffersize(bufferSize)
184		{
185		for (int i = 0; i < m_initial; i++)
186		{
187		auto newBuffer = std::make_unique<BYTE[]>(m_buffersize);
188		memset(newBuffer.get(), 0, m_buffersize);
189		m_queue.push(std::move(newBuffer));
190		}
191		}
	180	// constructor
	181	bufferpool(int capacity, int bufferSize) :
	182	m_initial(capacity),
	183	m_buffersize(bufferSize)
	184	{
	185	for (int i = 0; i < m_initial; i++)
	186	{
	187	auto newBuffer = std::make_unique<BYTE[]>(m_buffersize);
	188	memset(newBuffer.get(), 0, m_buffersize);
	189	m_queue.push(std::move(newBuffer));
	190	}
	191	}
192	192
193		// get next buffer element from the pool
194		BYTE* next()
195		{
196		BYTE* next_buffer;
197		if (!m_queue.empty())
198		{
199		next_buffer = m_queue.front().release();
200		m_queue.pop();
201		}
202		else
203		{
204		next_buffer = new BYTE[m_buffersize];
205		memset(next_buffer, 0, m_buffersize);
206		}
	193	// get next buffer element from the pool
	194	BYTE* next()
	195	{
	196	BYTE* next_buffer;
	197	if (!m_queue.empty())
	198	{
	199	next_buffer = m_queue.front().release();
	200	m_queue.pop();
	201	}
	202	else
	203	{
	204	next_buffer = new BYTE[m_buffersize];
	205	memset(next_buffer, 0, m_buffersize);
	206	}
207	207
208		return next_buffer;
209		}
	208	return next_buffer;
	209	}
210	210
211		// release element, make it available back in the pool
212		void return_to_pool(BYTE* buffer)
213		{
214		auto returned_buf = std::unique_ptr<BYTE[]>(buffer);
215		memset(returned_buf.get(), 0, m_buffersize);
216		m_queue.push(std::move(returned_buf));
217		}
	211	// release element, make it available back in the pool
	212	void return_to_pool(BYTE* buffer)
	213	{
	214	auto returned_buf = std::unique_ptr<BYTE[]>(buffer);
	215	memset(returned_buf.get(), 0, m_buffersize);
	216	m_queue.push(std::move(returned_buf));
	217	}
218	218	};
219	219
220	220	//============================================================
r253023	r253024
225	225	class sound_xaudio2 : public osd_module, public sound_module, public IXAudio2VoiceCallback
226	226	{
227	227	private:
228		xaudio2_ptr m_xAudio2;
229		mastering_voice_ptr m_masterVoice;
230		src_voice_ptr m_sourceVoice;
231		DWORD m_sample_bytes;
232		std::unique_ptr<BYTE[]> m_buffer;
233		DWORD m_buffer_size;
234		DWORD m_buffer_count;
235		DWORD m_writepos;
236		osd_lock_ptr m_buffer_lock;
237		HANDLE m_hEventBufferCompleted;
238		HANDLE m_hEventDataAvailable;
239		HANDLE m_hEventExiting;
240		std::thread m_audioThread;
241		std::queue<xaudio2_buffer> m_queue;
242		std::unique_ptr<bufferpool> m_buffer_pool;
243		HMODULE m_xaudio2_module;
244		PFN_XAUDIO2CREATE m_pfnxaudio2create;
245		UINT32 m_overflows;
246		UINT32 m_underflows;
247		BOOL m_in_underflow;
	228	xaudio2_ptr m_xAudio2;
	229	mastering_voice_ptr m_masterVoice;
	230	src_voice_ptr m_sourceVoice;
	231	DWORD m_sample_bytes;
	232	std::unique_ptr<BYTE[]> m_buffer;
	233	DWORD m_buffer_size;
	234	DWORD m_buffer_count;
	235	DWORD m_writepos;
	236	osd_lock_ptr m_buffer_lock;
	237	HANDLE m_hEventBufferCompleted;
	238	HANDLE m_hEventDataAvailable;
	239	HANDLE m_hEventExiting;
	240	std::thread m_audioThread;
	241	std::queue<xaudio2_buffer> m_queue;
	242	std::unique_ptr<bufferpool> m_buffer_pool;
	243	HMODULE m_xaudio2_module;
	244	PFN_XAUDIO2CREATE m_pfnxaudio2create;
	245	UINT32 m_overflows;
	246	UINT32 m_underflows;
	247	BOOL m_in_underflow;
248	248
249	249	public:
250		sound_xaudio2() :
251		osd_module(OSD_SOUND_PROVIDER, "xaudio2"),
252		sound_module(),
253		m_xAudio2(nullptr),
254		m_masterVoice(nullptr),
255		m_sourceVoice(nullptr),
256		m_sample_bytes(0),
257		m_buffer(nullptr),
258		m_buffer_size(0),
259		m_buffer_count(0),
260		m_writepos(0),
261		m_buffer_lock(osd_lock_alloc()),
262		m_hEventBufferCompleted(NULL),
263		m_hEventDataAvailable(NULL),
264		m_hEventExiting(NULL),
265		m_buffer_pool(nullptr),
266		m_xaudio2_module(NULL),
267		m_pfnxaudio2create(nullptr),
268		m_overflows(0),
269		m_underflows(0),
270		m_in_underflow(FALSE)
271		{
272		}
	250	sound_xaudio2() :
	251	osd_module(OSD_SOUND_PROVIDER, "xaudio2"),
	252	sound_module(),
	253	m_xAudio2(nullptr),
	254	m_masterVoice(nullptr),
	255	m_sourceVoice(nullptr),
	256	m_sample_bytes(0),
	257	m_buffer(nullptr),
	258	m_buffer_size(0),
	259	m_buffer_count(0),
	260	m_writepos(0),
	261	m_buffer_lock(osd_lock_alloc()),
	262	m_hEventBufferCompleted(NULL),
	263	m_hEventDataAvailable(NULL),
	264	m_hEventExiting(NULL),
	265	m_buffer_pool(nullptr),
	266	m_xaudio2_module(NULL),
	267	m_pfnxaudio2create(nullptr),
	268	m_overflows(0),
	269	m_underflows(0),
	270	m_in_underflow(FALSE)
	271	{
	272	}
273	273
274		virtual int init(osd_options const &options) override;
275		virtual void exit() override;
	274	virtual int init(osd_options const &options) override;
	275	virtual void exit() override;
276	276
277		// sound_module
278		virtual void update_audio_stream(bool is_throttled, INT16 const *buffer, int samples_this_frame) override;
279		virtual void set_mastervolume(int attenuation) override;
	277	// sound_module
	278	virtual void update_audio_stream(bool is_throttled, INT16 const *buffer, int samples_this_frame) override;
	279	virtual void set_mastervolume(int attenuation) override;
280	280
281		// Xaudio callbacks
282		void OnVoiceProcessingPassStart(UINT32 bytes_required) override;
283		void OnVoiceProcessingPassEnd() override {}
284		void OnStreamEnd() override {}
285		void OnBufferStart(void* pBufferContext) override {}
286		void OnLoopEnd(void* pBufferContext) override {}
287		void OnVoiceError(void* pBufferContext, HRESULT error) override {}
288		void OnBufferEnd(void *pBufferContext) override;
289
	281	// Xaudio callbacks
	282	void OnVoiceProcessingPassStart(UINT32 bytes_required) override;
	283	void OnVoiceProcessingPassEnd() override {}
	284	void OnStreamEnd() override {}
	285	void OnBufferStart(void* pBufferContext) override {}
	286	void OnLoopEnd(void* pBufferContext) override {}
	287	void OnVoiceError(void* pBufferContext, HRESULT error) override {}
	288	void OnBufferEnd(void *pBufferContext) override;
	289
290	290	private:
291		void create_buffers(const WAVEFORMATEX &format);
292		HRESULT create_voices(const WAVEFORMATEX &format);
293		void process_audio();
294		void submit_buffer(std::unique_ptr<BYTE[]> audioData, DWORD audioLength);
295		void submit_needed();
296		HRESULT xaudio2_create(IXAudio2 ** xaudio2_interface);
297		void roll_buffer();
298		BOOL submit_next_queued();
	291	void create_buffers(const WAVEFORMATEX &format);
	292	HRESULT create_voices(const WAVEFORMATEX &format);
	293	void process_audio();
	294	void submit_buffer(std::unique_ptr<BYTE[]> audioData, DWORD audioLength);
	295	void submit_needed();
	296	HRESULT xaudio2_create(IXAudio2 ** xaudio2_interface);
	297	void roll_buffer();
	298	BOOL submit_next_queued();
299	299	};
300	300
301	301	//============================================================
r253023	r253024
304	304
305	305	int sound_xaudio2::init(osd_options const &options)
306	306	{
307		HRESULT result = S_OK;
	307	HRESULT result = S_OK;
308	308
309		// Create the IXAudio2 object
310		IXAudio2 *temp_xaudio2 = nullptr;
311		HR_RET1(xaudio2_create(&temp_xaudio2));
312		m_xAudio2 = xaudio2_ptr(temp_xaudio2);
	309	// Create the IXAudio2 object
	310	IXAudio2 *temp_xaudio2 = nullptr;
	311	HR_RET1(xaudio2_create(&temp_xaudio2));
	312	m_xAudio2 = xaudio2_ptr(temp_xaudio2);
313	313
314		// make a format description for what we want
315		WAVEFORMATEX format = { 0 };
316		format.wBitsPerSample = 16;
317		format.wFormatTag = WAVE_FORMAT_PCM;
318		format.nChannels = 2;
319		format.nSamplesPerSec = sample_rate();
320		format.nBlockAlign = format.wBitsPerSample * format.nChannels / 8;
321		format.nAvgBytesPerSec = format.nSamplesPerSec * format.nBlockAlign;
	314	// make a format description for what we want
	315	WAVEFORMATEX format = { 0 };
	316	format.wBitsPerSample = 16;
	317	format.wFormatTag = WAVE_FORMAT_PCM;
	318	format.nChannels = 2;
	319	format.nSamplesPerSec = sample_rate();
	320	format.nBlockAlign = format.wBitsPerSample * format.nChannels / 8;
	321	format.nAvgBytesPerSec = format.nSamplesPerSec * format.nBlockAlign;
322	322
323		m_sample_bytes = format.nBlockAlign;
	323	m_sample_bytes = format.nBlockAlign;
324	324
325	325	#if defined(_DEBUG)
326		XAUDIO2_DEBUG_CONFIGURATION debugConfig = { 0 };
327		debugConfig.TraceMask = XAUDIO2_LOG_WARNINGS \| XAUDIO2_LOG_TIMING \| XAUDIO2_LOG_STREAMING;
328		debugConfig.LogFunctionName = TRUE;
329		m_xAudio2->SetDebugConfiguration(&debugConfig);
	326	XAUDIO2_DEBUG_CONFIGURATION debugConfig = { 0 };
	327	debugConfig.TraceMask = XAUDIO2_LOG_WARNINGS \| XAUDIO2_LOG_TIMING \| XAUDIO2_LOG_STREAMING;
	328	debugConfig.LogFunctionName = TRUE;
	329	m_xAudio2->SetDebugConfiguration(&debugConfig);
330	330	#endif
331	331
332		// Create the buffers
333		create_buffers(format);
	332	// Create the buffers
	333	create_buffers(format);
334	334
335		// Initialize our events
336		m_hEventBufferCompleted = CreateEvent(NULL, FALSE, FALSE, NULL);
337		m_hEventDataAvailable = CreateEvent(NULL, FALSE, FALSE, NULL);
338		m_hEventExiting = CreateEvent(NULL, FALSE, FALSE, NULL);
	335	// Initialize our events
	336	m_hEventBufferCompleted = CreateEvent(NULL, FALSE, FALSE, NULL);
	337	m_hEventDataAvailable = CreateEvent(NULL, FALSE, FALSE, NULL);
	338	m_hEventExiting = CreateEvent(NULL, FALSE, FALSE, NULL);
339	339
340		// create the voices and start them
341		HR_RET1(create_voices(format));
342		HR_RET1(m_sourceVoice->Start());
	340	// create the voices and start them
	341	HR_RET1(create_voices(format));
	342	HR_RET1(m_sourceVoice->Start());
343	343
344		// Start the thread listening
345		m_audioThread = std::thread([](sound_xaudio2* self) { self->process_audio(); }, this);
	344	// Start the thread listening
	345	m_audioThread = std::thread([](sound_xaudio2* self) { self->process_audio(); }, this);
346	346
347		osd_printf_verbose("Sound: XAudio2 initialized\n");
	347	osd_printf_verbose("Sound: XAudio2 initialized\n");
348	348
349		return 0;
	349	return 0;
350	350	}
351	351
352	352	//============================================================
r253023	r253024
355	355
356	356	void sound_xaudio2::exit()
357	357	{
358		// Wait on processing thread to end
359		SetEvent(m_hEventExiting);
360		m_audioThread.join();
	358	// Wait on processing thread to end
	359	SetEvent(m_hEventExiting);
	360	m_audioThread.join();
361	361
362		CloseHandle(m_hEventBufferCompleted);
363		CloseHandle(m_hEventDataAvailable);
364		CloseHandle(m_hEventExiting);
	362	CloseHandle(m_hEventBufferCompleted);
	363	CloseHandle(m_hEventDataAvailable);
	364	CloseHandle(m_hEventExiting);
365	365
366		m_sourceVoice.reset();
367		m_masterVoice.reset();
368		m_xAudio2.reset();
369		m_buffer.reset();
370		m_buffer_pool.reset();
	366	m_sourceVoice.reset();
	367	m_masterVoice.reset();
	368	m_xAudio2.reset();
	369	m_buffer.reset();
	370	m_buffer_pool.reset();
371	371
372		if (m_overflows != 0 \|\| m_underflows != 0)
373		osd_printf_verbose("Sound: overflows=%u, underflows=%u\n", m_overflows, m_underflows);
	372	if (m_overflows != 0 \|\| m_underflows != 0)
	373	osd_printf_verbose("Sound: overflows=%u, underflows=%u\n", m_overflows, m_underflows);
374	374
375		osd_printf_verbose("Sound: XAudio2 deinitialized\n");
	375	osd_printf_verbose("Sound: XAudio2 deinitialized\n");
376	376	}
377	377
378	378	//============================================================
r253023	r253024
380	380	//============================================================
381	381
382	382	void sound_xaudio2::update_audio_stream(
383		bool is_throttled,
384		INT16 const *buffer,
385		int samples_this_frame)
	383	bool is_throttled,
	384	INT16 const *buffer,
	385	int samples_this_frame)
386	386	{
387		if ((sample_rate() == 0) \|\| !m_buffer)
388		return;
	387	if ((sample_rate() == 0) \|\| !m_buffer)
	388	return;
389	389
390		UINT32 const bytes_this_frame = samples_this_frame * m_sample_bytes;
	390	UINT32 const bytes_this_frame = samples_this_frame * m_sample_bytes;
391	391
392		osd_scoped_lock scope_lock(m_buffer_lock.get());
	392	osd_scoped_lock scope_lock(m_buffer_lock.get());
393	393
394		UINT32 bytes_left = bytes_this_frame;
	394	UINT32 bytes_left = bytes_this_frame;
395	395
396		while (bytes_left > 0)
397		{
398		UINT32 chunk = MIN(m_buffer_size, bytes_left);
	396	while (bytes_left > 0)
	397	{
	398	UINT32 chunk = MIN(m_buffer_size, bytes_left);
399	399
400		// Roll the buffer if needed
401		if (m_writepos + chunk >= m_buffer_size)
402		{
403		roll_buffer();
404		}
	400	// Roll the buffer if needed
	401	if (m_writepos + chunk >= m_buffer_size)
	402	{
	403	roll_buffer();
	404	}
405	405
406		// Copy in the data
407		memcpy(m_buffer.get() + m_writepos, buffer, chunk);
408		m_writepos += chunk;
409		bytes_left -= chunk;
410		}
	406	// Copy in the data
	407	memcpy(m_buffer.get() + m_writepos, buffer, chunk);
	408	m_writepos += chunk;
	409	bytes_left -= chunk;
	410	}
411	411
412		// Signal data available
413		SetEvent(m_hEventDataAvailable);
	412	// Signal data available
	413	SetEvent(m_hEventDataAvailable);
414	414	}
415	415
416	416	//============================================================
r253023	r253024
419	419
420	420	void sound_xaudio2::set_mastervolume(int attenuation)
421	421	{
422		assert(m_sourceVoice);
423
424		HRESULT result;
425
426		// clamp the attenuation to 0-32 range
427		attenuation = MAX(MIN(attenuation, 0), -32);
	422	assert(m_sourceVoice);
428	423
429		// Ranges from 1.0 to XAUDIO2_MAX_VOLUME_LEVEL indicate additional gain
430		// Ranges from 0 to 1.0 indicate a reduced volume level
431		// 0 indicates silence
432		// We only support a reduction from 1.0, so we generate values in the range 0.0 to 1.0
433		float scaledVolume = (32.0f + attenuation) / 32.0f;
434
435		// set the master volume
436		HR_RETV(m_sourceVoice->SetVolume(scaledVolume));
	424	HRESULT result;
	425
	426	// clamp the attenuation to 0-32 range
	427	attenuation = MAX(MIN(attenuation, 0), -32);
	428
	429	// Ranges from 1.0 to XAUDIO2_MAX_VOLUME_LEVEL indicate additional gain
	430	// Ranges from 0 to 1.0 indicate a reduced volume level
	431	// 0 indicates silence
	432	// We only support a reduction from 1.0, so we generate values in the range 0.0 to 1.0
	433	float scaledVolume = (32.0f + attenuation) / 32.0f;
	434
	435	// set the master volume
	436	HR_RETV(m_sourceVoice->SetVolume(scaledVolume));
437	437	}
438	438
439	439	//============================================================
r253023	r253024
443	443	// The XAudio2 voice callback triggered when a buffer finishes playing
444	444	void sound_xaudio2::OnBufferEnd(void *pBufferContext)
445	445	{
446		BYTE* completed_buffer = (BYTE*)pBufferContext;
447		if (completed_buffer != nullptr)
448		{
449		auto scoped_lock = osd_scoped_lock(m_buffer_lock.get());
450		m_buffer_pool->return_to_pool(completed_buffer);
451		}
	446	BYTE* completed_buffer = (BYTE*)pBufferContext;
	447	if (completed_buffer != nullptr)
	448	{
	449	auto scoped_lock = osd_scoped_lock(m_buffer_lock.get());
	450	m_buffer_pool->return_to_pool(completed_buffer);
	451	}
452	452
453		SetEvent(m_hEventBufferCompleted);
	453	SetEvent(m_hEventBufferCompleted);
454	454	}
455	455
456	456	//============================================================
r253023	r253024
460	460	// The XAudio2 voice callback triggered on every pass
461	461	void sound_xaudio2::OnVoiceProcessingPassStart(UINT32 bytes_required)
462	462	{
463		if (bytes_required == 0)
464		{
465		// Reset underflow indicator if we're caught up
466		if (m_in_underflow) m_in_underflow = FALSE;
	463	if (bytes_required == 0)
	464	{
	465	// Reset underflow indicator if we're caught up
	466	if (m_in_underflow) m_in_underflow = FALSE;
467	467
468		return;
469		}
	468	return;
	469	}
470	470
471		// Since there are bytes required, we're going to be in underflow
472		if (!m_in_underflow)
473		{
474		m_underflows++;
475		m_in_underflow = TRUE;
476		}
	471	// Since there are bytes required, we're going to be in underflow
	472	if (!m_in_underflow)
	473	{
	474	m_underflows++;
	475	m_in_underflow = TRUE;
	476	}
477	477	}
478	478
479	479	//============================================================
r253023	r253024
483	483	// Dynamically loads the XAudio2 DLL and calls the exported XAudio2Create()
484	484	HRESULT sound_xaudio2::xaudio2_create(IXAudio2 ** ppxaudio2_interface)
485	485	{
486		HRESULT result;
	486	HRESULT result;
487	487
488		if (nullptr == m_pfnxaudio2create)
489		{
490		if (nullptr == m_xaudio2_module)
491		{
492		m_xaudio2_module = LoadLibrary(XAUDIO2_DLL);
493		if (nullptr == m_xaudio2_module)
494		{
495		osd_printf_error("Failed to load module '%S', error: 0x%X\n", XAUDIO2_DLL, (unsigned int)GetLastError());
496		HR_RETHR(E_FAIL);
497		}
498		}
	488	if (nullptr == m_pfnxaudio2create)
	489	{
	490	if (nullptr == m_xaudio2_module)
	491	{
	492	m_xaudio2_module = LoadLibrary(XAUDIO2_DLL);
	493	if (nullptr == m_xaudio2_module)
	494	{
	495	osd_printf_error("Failed to load module '%S', error: 0x%X\n", XAUDIO2_DLL, (unsigned int)GetLastError());
	496	HR_RETHR(E_FAIL);
	497	}
	498	}
499	499
500		m_pfnxaudio2create = (PFN_XAUDIO2CREATE)GetProcAddress(m_xaudio2_module, "XAudio2Create");
501		if (nullptr == m_pfnxaudio2create)
502		{
503		osd_printf_error("Failed to get adddress of exported function XAudio2Create, error: 0x%X\n", (unsigned int)GetLastError());
504		HR_RETHR(E_FAIL);
505		}
506		}
	500	m_pfnxaudio2create = (PFN_XAUDIO2CREATE)GetProcAddress(m_xaudio2_module, "XAudio2Create");
	501	if (nullptr == m_pfnxaudio2create)
	502	{
	503	osd_printf_error("Failed to get adddress of exported function XAudio2Create, error: 0x%X\n", (unsigned int)GetLastError());
	504	HR_RETHR(E_FAIL);
	505	}
	506	}
507	507
508		HR_RETHR(m_pfnxaudio2create(ppxaudio2_interface, 0, XAUDIO2_DEFAULT_PROCESSOR));
	508	HR_RETHR(m_pfnxaudio2create(ppxaudio2_interface, 0, XAUDIO2_DEFAULT_PROCESSOR));
509	509
510		return S_OK;
	510	return S_OK;
511	511	}
512	512
513	513	//============================================================
r253023	r253024
516	516
517	517	void sound_xaudio2::create_buffers(const WAVEFORMATEX &format)
518	518	{
519		// Compute the buffer size
520		// buffer size is equal to the bytes we need to hold in memory per X tenths of a second where X is audio_latency
521		float audio_latency_in_seconds = m_audio_latency / 10.0f;
522		UINT32 format_bytes_per_second = format.nSamplesPerSec * format.nBlockAlign;
523		UINT32 total_buffer_size = format_bytes_per_second * audio_latency_in_seconds;
	519	// Compute the buffer size
	520	// buffer size is equal to the bytes we need to hold in memory per X tenths of a second where X is audio_latency
	521	float audio_latency_in_seconds = m_audio_latency / 10.0f;
	522	UINT32 format_bytes_per_second = format.nSamplesPerSec * format.nBlockAlign;
	523	UINT32 total_buffer_size = format_bytes_per_second * audio_latency_in_seconds;
524	524
525		// We want to be able to submit buffers every X milliseconds
526		// I want to divide these up into "packets" so figure out how many buffers we need
527		m_buffer_count = (audio_latency_in_seconds * 1000.0f) / SUBMIT_FREQUENCY_TARGET_MS;
	525	// We want to be able to submit buffers every X milliseconds
	526	// I want to divide these up into "packets" so figure out how many buffers we need
	527	m_buffer_count = (audio_latency_in_seconds * 1000.0f) / SUBMIT_FREQUENCY_TARGET_MS;
528	528
529		// Now record the size of the individual buffers
530		m_buffer_size = MAX(1024, total_buffer_size / m_buffer_count);
	529	// Now record the size of the individual buffers
	530	m_buffer_size = MAX(1024, total_buffer_size / m_buffer_count);
531	531
532		// Make the buffer a multiple of the format size bytes (rounding up)
533		UINT32 remainder = m_buffer_size % format.nBlockAlign;
534		if (remainder != 0)
535		m_buffer_size += format.nBlockAlign - remainder;
	532	// Make the buffer a multiple of the format size bytes (rounding up)
	533	UINT32 remainder = m_buffer_size % format.nBlockAlign;
	534	if (remainder != 0)
	535	m_buffer_size += format.nBlockAlign - remainder;
536	536
537		// get our initial buffer pool and our first buffer
538		m_buffer_pool = std::make_unique<bufferpool>(m_buffer_count + 1, m_buffer_size);
539		m_buffer = std::unique_ptr<BYTE[]>(m_buffer_pool->next());
	537	// get our initial buffer pool and our first buffer
	538	m_buffer_pool = std::make_unique<bufferpool>(m_buffer_count + 1, m_buffer_size);
	539	m_buffer = std::unique_ptr<BYTE[]>(m_buffer_pool->next());
540	540
541		osd_printf_verbose(
542		"Sound: XAudio2 created initial buffers. total size: %u, count %u, size each %u\n",
543		(unsigned int)total_buffer_size,
544		(unsigned int)m_buffer_count,
545		(unsigned int)m_buffer_size);
	541	osd_printf_verbose(
	542	"Sound: XAudio2 created initial buffers. total size: %u, count %u, size each %u\n",
	543	(unsigned int)total_buffer_size,
	544	(unsigned int)m_buffer_count,
	545	(unsigned int)m_buffer_size);
546	546
547		// reset buffer states
548		m_writepos = 0;
549		m_overflows = 0;
550		m_underflows = 0;
	547	// reset buffer states
	548	m_writepos = 0;
	549	m_overflows = 0;
	550	m_underflows = 0;
551	551	}
552	552
553	553	//============================================================
r253023	r253024
556	556
557	557	HRESULT sound_xaudio2::create_voices(const WAVEFORMATEX &format)
558	558	{
559		assert(m_xAudio2);
560		assert(!m_masterVoice);
561		HRESULT result;
	559	assert(m_xAudio2);
	560	assert(!m_masterVoice);
	561	HRESULT result;
562	562
563		IXAudio2MasteringVoice *temp_master_voice = nullptr;
564		HR_RET1(
565		m_xAudio2->CreateMasteringVoice(
566		&temp_master_voice,
567		format.nChannels,
568		sample_rate()));
	563	IXAudio2MasteringVoice *temp_master_voice = nullptr;
	564	HR_RET1(
	565	m_xAudio2->CreateMasteringVoice(
	566	&temp_master_voice,
	567	format.nChannels,
	568	sample_rate()));
569	569
570		m_masterVoice = mastering_voice_ptr(temp_master_voice);
	570	m_masterVoice = mastering_voice_ptr(temp_master_voice);
571	571
572		// create the source voice
573		IXAudio2SourceVoice *temp_source_voice = nullptr;
574		HR_RET1(m_xAudio2->CreateSourceVoice(
575		&temp_source_voice,
576		&format,
577		XAUDIO2_VOICE_NOSRC \| XAUDIO2_VOICE_NOPITCH,
578		1.0,
579		this));
	572	// create the source voice
	573	IXAudio2SourceVoice *temp_source_voice = nullptr;
	574	HR_RET1(m_xAudio2->CreateSourceVoice(
	575	&temp_source_voice,
	576	&format,
	577	XAUDIO2_VOICE_NOSRC \| XAUDIO2_VOICE_NOPITCH,
	578	1.0,
	579	this));
580	580
581		m_sourceVoice = src_voice_ptr(temp_source_voice);
	581	m_sourceVoice = src_voice_ptr(temp_source_voice);
582	582
583		return S_OK;
	583	return S_OK;
584	584	}
585	585
586	586	//============================================================
r253023	r253024
590	590	// submits audio events on another thread in a loop
591	591	void sound_xaudio2::process_audio()
592	592	{
593		BOOL exiting = FALSE;
594		HANDLE hEvents[] = { m_hEventBufferCompleted, m_hEventDataAvailable, m_hEventExiting };
595		while (!exiting)
596		{
597		DWORD wait_result = WaitForMultipleObjects(3, hEvents, FALSE, INFINITE);
598		switch (wait_result)
599		{
600		// Buffer is complete or new data is available
601		case 0:
602		case 1:
603		submit_needed();
604		break;
605		case 2:
606		// exiting
607		exiting = TRUE;
608		break;
609		}
610		}
	593	BOOL exiting = FALSE;
	594	HANDLE hEvents[] = { m_hEventBufferCompleted, m_hEventDataAvailable, m_hEventExiting };
	595	while (!exiting)
	596	{
	597	DWORD wait_result = WaitForMultipleObjects(3, hEvents, FALSE, INFINITE);
	598	switch (wait_result)
	599	{
	600	// Buffer is complete or new data is available
	601	case 0:
	602	case 1:
	603	submit_needed();
	604	break;
	605	case 2:
	606	// exiting
	607	exiting = TRUE;
	608	break;
	609	}
	610	}
611	611	}
612	612
613	613	//============================================================
614	614	// submit_needed
615	615	//============================================================
616	616
617		// Submits any buffers that have currently been queued,
	617	// Submits any buffers that have currently been queued,
618	618	// assuming they are needed based on current queue depth
619	619	void sound_xaudio2::submit_needed()
620	620	{
621		XAUDIO2_VOICE_STATE state;
622		m_sourceVoice->GetState(&state, XAUDIO2_VOICE_NOSAMPLESPLAYED);
	621	XAUDIO2_VOICE_STATE state;
	622	m_sourceVoice->GetState(&state, XAUDIO2_VOICE_NOSAMPLESPLAYED);
623	623
624		// If we have a buffer on the queue, no reason to submit
625		if (state.BuffersQueued >= 1)
626		return;
	624	// If we have a buffer on the queue, no reason to submit
	625	if (state.BuffersQueued >= 1)
	626	return;
627	627
628		osd_scoped_lock lock_scope(m_buffer_lock.get());
	628	osd_scoped_lock lock_scope(m_buffer_lock.get());
629	629
630		// Roll the buffer
631		roll_buffer();
	630	// Roll the buffer
	631	roll_buffer();
632	632
633		// Submit the next buffer
634		submit_next_queued();
	633	// Submit the next buffer
	634	submit_next_queued();
635	635	}
636	636
637	637	//============================================================
r253023	r253024
640	640
641	641	void sound_xaudio2::submit_buffer(std::unique_ptr<BYTE[]> audioData, DWORD audioLength)
642	642	{
643		assert(audioLength != 0);
	643	assert(audioLength != 0);
644	644
645		XAUDIO2_BUFFER buf = { 0 };
646		buf.AudioBytes = audioLength;
647		buf.pAudioData = audioData.get();
648		buf.PlayBegin = 0;
649		buf.PlayLength = audioLength / m_sample_bytes;
650		buf.Flags = XAUDIO2_END_OF_STREAM;
651		buf.pContext = audioData.get();
	645	XAUDIO2_BUFFER buf = { 0 };
	646	buf.AudioBytes = audioLength;
	647	buf.pAudioData = audioData.get();
	648	buf.PlayBegin = 0;
	649	buf.PlayLength = audioLength / m_sample_bytes;
	650	buf.Flags = XAUDIO2_END_OF_STREAM;
	651	buf.pContext = audioData.get();
652	652
653		HRESULT result;
654		if (FAILED(result = m_sourceVoice->SubmitSourceBuffer(&buf)))
655		{
656		osd_printf_verbose("Sound: XAudio2 failed to submit source buffer (non-fatal). Error: 0x%X\n", (unsigned int)result);
657		m_buffer_pool->return_to_pool(audioData.release());
658		return;
659		}
	653	HRESULT result;
	654	if (FAILED(result = m_sourceVoice->SubmitSourceBuffer(&buf)))
	655	{
	656	osd_printf_verbose("Sound: XAudio2 failed to submit source buffer (non-fatal). Error: 0x%X\n", (unsigned int)result);
	657	m_buffer_pool->return_to_pool(audioData.release());
	658	return;
	659	}
660	660
661		// If we succeeded, relinquish the buffer allocation to the XAudio2 runtime
662		// The buffer will be freed on the OnBufferCompleted callback
663		audioData.release();
	661	// If we succeeded, relinquish the buffer allocation to the XAudio2 runtime
	662	// The buffer will be freed on the OnBufferCompleted callback
	663	audioData.release();
664	664	}
665	665
666	666	//============================================================
r253023	r253024
669	669
670	670	BOOL sound_xaudio2::submit_next_queued()
671	671	{
672		if (!m_queue.empty())
673		{
674		// Get a reference to the buffer
675		auto buf = &m_queue.front();
	672	if (!m_queue.empty())
	673	{
	674	// Get a reference to the buffer
	675	auto buf = &m_queue.front();
676	676
677		// submit the buffer data
678		submit_buffer(std::move(buf->AudioData), buf->AudioSize);
	677	// submit the buffer data
	678	submit_buffer(std::move(buf->AudioData), buf->AudioSize);
679	679
680		// Remove it from the queue
681		assert(buf->AudioSize > 0);
682		m_queue.pop();
	680	// Remove it from the queue
	681	assert(buf->AudioSize > 0);
	682	m_queue.pop();
683	683
684		return !m_queue.empty();
685		}
	684	return !m_queue.empty();
	685	}
686	686
687		// queue was already empty
688		return FALSE;
	687	// queue was already empty
	688	return FALSE;
689	689	}
690	690
691	691	//============================================================
r253023	r253024
695	695	// Queues the current buffer, and gets a new write buffer
696	696	void sound_xaudio2::roll_buffer()
697	697	{
698		// Don't queue a buffer if it is empty
699		if (m_writepos == 0)
700		return;
	698	// Don't queue a buffer if it is empty
	699	if (m_writepos == 0)
	700	return;
701	701
702		// Queue the current buffer
703		xaudio2_buffer buf;
704		buf.AudioData = std::move(m_buffer);
705		buf.AudioSize = m_writepos;
706		m_queue.push(std::move(buf));
	702	// Queue the current buffer
	703	xaudio2_buffer buf;
	704	buf.AudioData = std::move(m_buffer);
	705	buf.AudioSize = m_writepos;
	706	m_queue.push(std::move(buf));
707	707
708		// Get a new buffer
709		m_buffer = std::unique_ptr<BYTE[]>(m_buffer_pool->next());
710		m_writepos = 0;
	708	// Get a new buffer
	709	m_buffer = std::unique_ptr<BYTE[]>(m_buffer_pool->next());
	710	m_writepos = 0;
711	711
712		// We only want to keep a maximum number of buffers at any given time
713		// so remove any from queue greater than MAX_QUEUED_BUFFERS
714		if (m_queue.size() > m_buffer_count)
715		{
716		xaudio2_buffer *next_buffer = &m_queue.front();
	712	// We only want to keep a maximum number of buffers at any given time
	713	// so remove any from queue greater than MAX_QUEUED_BUFFERS
	714	if (m_queue.size() > m_buffer_count)
	715	{
	716	xaudio2_buffer *next_buffer = &m_queue.front();
717	717
718		// return the oldest buffer to the pool, and remove it from queue
719		m_buffer_pool->return_to_pool(next_buffer->AudioData.release());
720		m_queue.pop();
	718	// return the oldest buffer to the pool, and remove it from queue
	719	m_buffer_pool->return_to_pool(next_buffer->AudioData.release());
	720	m_queue.pop();
721	721
722		m_overflows++;
723		}
	722	m_overflows++;
	723	}
724	724	}
725	725
726	726
r253023	r253024
728	728	MODULE_NOT_SUPPORTED(sound_xaudio2, OSD_SOUND_PROVIDER, "xaudio2")
729	729	#endif
730	730
731		MODULE_DEFINITION(SOUND_XAUDIO2, sound_xaudio2)
		No newline at end of file
	731	MODULE_DEFINITION(SOUND_XAUDIO2, sound_xaudio2)

trunk/src/osd/sdl/sdlfile.cpp
r253023	r253024
576	576	// start with an environment variable?
577	577	if (*dst[0] == '$')
578	578	{
579
580	579	envstr = (char *) osd_malloc_array(strlen(src)+1);
581	580	strcpy(envstr, src);
582	581

trunk/src/osd/windows/output.cpp
r253023	r253024
309	309
310	310	static void notifier_callback(const char outname, INT32 value, void param)
311	311	{
312		registered_client *client;
	312	registered_client *client;
313	313	// loop over clients and notify them
314		for (client = clientlist; client != nullptr; client = client->next)
	314	for (client = clientlist; client != nullptr; client = client->next)
315	315	{
316	316	printf("there are clients\n");
317	317	if (param == nullptr \|\| param == client)

trunk/src/osd/windows/winmain.h
r253023	r253024
156	156	float screen_scanline_height() const { return float_value(WINOPTION_SCANLINE_HEIGHT); }
157	157	float screen_scanline_bright_scale() const { return float_value(WINOPTION_SCANLINE_BRIGHT_SCALE); }
158	158	float screen_scanline_bright_offset() const { return float_value(WINOPTION_SCANLINE_BRIGHT_OFFSET); }
159		float screen_scanline_jitter() const { return float_value(WINOPTION_SCANLINE_JITTER); }
160		float screen_hum_bar_alpha() const { return float_value(WINOPTION_HUM_BAR_ALPHA); }
	159	float screen_scanline_jitter() const { return float_value(WINOPTION_SCANLINE_JITTER); }
	160	float screen_hum_bar_alpha() const { return float_value(WINOPTION_HUM_BAR_ALPHA); }
161	161	float screen_reflection() const { return float_value(WINOPTION_REFLECTION); }
162	162	float screen_curvature() const { return float_value(WINOPTION_CURVATURE); }
163	163	float screen_round_corner() const { return float_value(WINOPTION_ROUND_CORNER); }

trunk/src/version.cpp
r253023	r253024
8	8
9	9	***************************************************************************/
10	10
11		#define BARE_BUILD_VERSION "0.169"
	11	#define BARE_BUILD_VERSION "0.170"
12	12
13	13	extern const char bare_build_version[];
14	14	extern const char build_version[];

https://github.com/mamedev/mame/commit/b1d6f6d63f8294a3f62d7db6f9eea07da1d93664

199869 Revisions