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r44371 Saturday 23rd January, 2016 at 16:30:14 UTC by Ryan Holtz
More null fixes, nw

[src/devices/sound]	es5506.cpp
[src/mame/drivers]	fm7.cpp harddriv.cpp
[src/mame/includes]	dynax.h fm7.h harddriv.h
[src/mame/machine]	gamecom.cpp
[src/mame/video]	dynax.cpp

trunk/src/devices/sound/es5506.cpp

r252882	r252883
366	366	m_stream = machine().sound().stream_alloc(*this, 0, 2 * channels, clock() / (16*32));
367	367
368	368	/* initialize the regions */
369		m_region_base[0] = m_region0 ? (UINT16 *)machine().root_device().memregion(m_region0)->base() : nullptr;
370		m_region_base[1] = m_region1 ? (UINT16 *)machine().root_device().memregion(m_region1)->base() : nullptr;
	369	if (m_region0)
	370	{
	371	memory_region* region = machine().root_device().memregion(m_region0);
	372	m_region_base[0] = region ? reinterpret_cast<UINT16 *>(region->base()) : nullptr;
	373	}
	374	if (m_region1)
	375	{
	376	memory_region* region = machine().root_device().memregion(m_region1);
	377	m_region_base[1] = region ? reinterpret_cast<UINT16 *>(region->base()) : nullptr;
	378	}
371	379
372	380	/* initialize the rest of the structure */
373	381	m_master_clock = clock();

trunk/src/mame/drivers/fm7.cpp

r252882	r252883
313	313
314	314	READ8_MEMBER(fm7_state::vector_r)
315	315	{
316		UINT8* RAM = memregion("maincpu")->base();
317		UINT8* ROM = memregion("init")->base();
318		UINT32 init_size = memregion("init")->bytes();
	316	UINT32 init_size = m_rom_ptr.bytes();
319	317
320		if(m_init_rom_en)
321		return ROM[(init_size-0x10)+offset];
	318	if (m_init_rom_en)
	319	{
	320	return m_rom_ptr[(init_size-0x10)+offset];
	321	}
322	322	else
323	323	{
324	324	if(m_type == SYS_FM7)
325		return RAM[0xfff0+offset];
	325	return m_ram_ptr[0xfff0+offset];
326	326	else
327		return RAM[0x3fff0+offset];
	327	return m_ram_ptr[0x3fff0+offset];
328	328	}
329	329	}
330	330
331	331	WRITE8_MEMBER(fm7_state::vector_w)
332	332	{
333		UINT8* RAM = memregion("maincpu")->base();
334
335	333	if(m_type == SYS_FM7)
336		RAM[0xfff0+offset] = data;
	334	m_ram_ptr[0xfff0+offset] = data;
337	335	else
338		RAM[0x3fff0+offset] = data;
	336	m_ram_ptr[0x3fff0+offset] = data;
339	337	}
340	338
341	339	/*
r252882	r252883
1150	1148	}
1151	1149	if(m_init_rom_en)
1152	1150	{
1153		UINT8* ROM = memregion("init")->base();
1154		membank("init_bank_r")->set_base(ROM);
	1151	membank("init_bank_r")->set_base(m_rom_ptr);
1155	1152	}
1156	1153	else
1157	1154	{
1158		membank("init_bank_r")->set_base(RAM+0x36000);
	1155	membank("init_bank_r")->set_base(m_ram_ptr + 0x36000);
1159	1156	}
1160		if(m_basic_rom_en)
	1157
	1158	if (m_basic_rom_en)
1161	1159	{
1162		UINT8* ROM = memregion("fbasic")->base();
1163		if(ROM != nullptr)
1164		membank("fbasic_bank_r")->set_base(ROM);
	1160	if (m_basic_ptr)
	1161	{
	1162	membank("fbasic_bank_r")->set_base(m_rom_ptr);
	1163	}
1165	1164	}
1166	1165	else
1167	1166	{
1168		membank("fbasic_bank_r")->set_base(RAM+0x38000);
	1167	membank("fbasic_bank_r")->set_base(m_ram_ptr + 0x38000);
1169	1168	}
1170	1169	}
1171	1170
r252882	r252883
1955	1954
1956	1955	void fm7_state::machine_reset()
1957	1956	{
1958		UINT8* RAM = memregion("maincpu")->base();
1959		UINT8* ROM = memregion("init")->base();
1960
1961	1957	m_timer->adjust(attotime::from_nsec(2034500),0,attotime::from_nsec(2034500));
1962	1958	m_subtimer->adjust(attotime::from_msec(20),0,attotime::from_msec(20));
1963	1959	m_keyboard_timer->adjust(attotime::zero,0,attotime::from_msec(10));
r252882	r252883
1975	1971	{
1976	1972	m_init_rom_en = 1;
1977	1973	// last part of Initiate ROM is visible at the end of RAM too (interrupt vectors)
1978		memcpy(RAM+0x3fff0,ROM+0x1ff0,16);
	1974	memcpy(m_ram_ptr + 0x3fff0, m_rom_ptr + 0x1ff0, 16);
1979	1975	}
1980	1976	else if (m_type == SYS_FM11)
1981	1977	{
1982	1978	m_init_rom_en = 1;
1983	1979	// last part of Initiate ROM is visible at the end of RAM too (interrupt vectors)
1984		memcpy(RAM+0x3fff0,ROM+0x0ff0,16);
	1980	memcpy(m_ram_ptr + 0x3fff0, m_rom_ptr + 0x0ff0, 16);
1985	1981	}
1986	1982	else
1987	1983	m_init_rom_en = 0;
r252882	r252883
1990	1986	if(!(m_dsw->read() & 0x02))
1991	1987	{
1992	1988	m_basic_rom_en = 0;  // disabled for DOS mode
1993		membank("bank1")->set_base(RAM+0x08000);
	1989	membank("bank1")->set_base(m_ram_ptr + 0x08000);
1994	1990	}
1995	1991	else
1996		membank("bank1")->set_base(RAM+0x38000);
1997		membank("bank2")->set_base(RAM+0x08000);
	1992	{
	1993	membank("bank1")->set_base(m_ram_ptr + 0x38000);
	1994	}
	1995	membank("bank2")->set_base(m_ram_ptr + 0x08000);
1998	1996	}
1999	1997	m_key_delay = 700;  // 700ms on FM-7
2000	1998	m_key_repeat = 70;  // 70ms on FM-7
r252882	r252883
2025	2023	if(m_type == SYS_FM77AV || m_type == SYS_FM77AV40EX || m_type == SYS_FM11)
2026	2024	{
2027	2025	fm7_mmr_refresh(m_maincpu->space(AS_PROGRAM));
2028		membank("fbasic_bank_w")->set_base(RAM+0x38000);
2029		membank("init_bank_w")->set_base(RAM+0x36000);
	2026	membank("fbasic_bank_w")->set_base(m_ram_ptr + 0x38000);
	2027	membank("init_bank_w")->set_base(m_ram_ptr + 0x36000);
2030	2028	}
2031	2029	if(m_type == SYS_FM11)
2032	2030	{

trunk/src/mame/drivers/harddriv.cpp

r252882	r252883
358	358	m_screen(*this, "screen"),
359	359	m_duartn68681(*this, "duartn68681"),
360	360	m_hd34010_host_access(0),
361		m_dsk_pio_access(0),
362	361	m_msp_ram(*this, "msp_ram"),
363	362	m_dsk_ram(nullptr),
364	363	m_dsk_rom(nullptr),
365	364	m_dsk_10c(*this, "dsk_10c"),
366	365	m_dsk_30c(*this, "dsk_30c"),
	366	m_dsk_pio_access(0),
367	367	m_m68k_slapstic_base(nullptr),
368	368	m_m68k_sloop_alt_base(nullptr),
369	369	m_200e(*this, "200e"),
r252882	r252883
410	410	m_sim_memory(nullptr),
411	411	m_sim_memory_size(0),
412	412	m_adsp_pgm_memory_word(nullptr),
413		m_ds3_sdata_memory(nullptr),
	413	m_ds3_sdata_memory(*this, "ds3sdsp_data"),
414	414	m_ds3_sdata_memory_size(0),
415	415	m_ds3_gcmd(0),
416	416	m_ds3_gflag(0),
r252882	r252883
2005	2005	WRITE_LINE_MEMBER(harddriv_new_state::tx_a)
2006	2006	{
2007	2007	// passive connection, one way, to both screens
2008		m_leftpcb->m_duartn68681->rx_a_w(state);
2009		m_rightpcb->m_duartn68681->rx_a_w(state);
	2008	m_leftpcb->get_duart()->rx_a_w(state);
	2009	m_rightpcb->get_duart()->rx_a_w(state);
2010	2010	}
2011	2011
2012	2012	static MACHINE_CONFIG_START( racedriv_panorama_machine, harddriv_new_state )
r252882	r252883
2026	2026	// by forcing them to stay in sync using this ugly method everything works much better.
2027	2027	TIMER_DEVICE_CALLBACK_MEMBER(harddriv_new_state::hack_timer)
2028	2028	{
2029		m_leftpcb->m_screen->reset_origin(0, 0);
2030		m_mainpcb->m_screen->reset_origin(0, 0);
2031		m_rightpcb->m_screen->reset_origin(0, 0);
	2029	m_leftpcb->get_screen()->reset_origin(0, 0);
	2030	m_mainpcb->get_screen()->reset_origin(0, 0);
	2031	m_rightpcb->get_screen()->reset_origin(0, 0);
2032	2032	}
2033	2033
2034	2034	/*************************************
r252882	r252883
4707	4707	m_maincpu->space(AS_PROGRAM).install_write_handler(0x823800, 0x823fff, write16_delegate(FUNC(harddriv_state::hd68k_ds3_control_w), this));
4708	4708
4709	4709	/* predetermine memory regions */
4710		m_ds3_sdata_memory = (UINT16 *)memregion("ds3sdsp_data")->base();
4711		m_ds3_sdata_memory_size = memregion("ds3sdsp_data")->bytes() / 2;
4712
	4710	m_ds3_sdata_memory_size = m_ds3_sdata_memory.bytes() / 2;
4713	4711	/*
4714	4712
4715	4713

trunk/src/mame/includes/dynax.h

r252882	r252883
14	14	{
15	15	public:
16	16	dynax_state(const machine_config &mconfig, device_type type, const char *tag)
17		: driver_device(mconfig, type, tag),
18		m_maincpu(*this, "maincpu"),
19		m_soundcpu(*this, "soundcpu"),
20		m_ym2413(*this, "ym2413"),
21		m_oki(*this, "oki"),
22		m_msm(*this, "msm"),
23		m_screen(*this, "screen"),
24		m_palette(*this, "palette"),
25		m_rtc(*this, "rtc")
26		{ }
	17	: driver_device(mconfig, type, tag)
	18	, m_maincpu(*this, "maincpu")
	19	, m_soundcpu(*this, "soundcpu")
	20	, m_ym2413(*this, "ym2413")
	21	, m_oki(*this, "oki")
	22	, m_msm(*this, "msm")
	23	, m_screen(*this, "screen")
	24	, m_palette(*this, "palette")
	25	, m_rtc(*this, "rtc")
	26	, m_gfx_region(*this, "gfx")
	27	{
	28	}
27	29
28	30	/* devices */
29	31	required_device<cpu_device> m_maincpu;
r252882	r252883
34	36	optional_device<screen_device> m_screen;
35	37	required_device<palette_device> m_palette;
36	38	optional_device<msm6242_device> m_rtc;
	39	optional_region_ptr<UINT8> m_gfx_region;
37	40
38	41	// up to 8 layers, 2 images per layer (interleaved on screen)
39	42	std::unique_ptr<UINT8[]>  m_pixmap[8][2];

trunk/src/mame/includes/fm7.h

r252882	r252883
136	136	m_floppy0(*this, "fdc:0"),
137	137	m_floppy1(*this, "fdc:1"),
138	138	m_floppy(nullptr),
	139	m_ram_ptr(*this, "maincpu"),
	140	m_rom_ptr(*this, "init"),
	141	m_basic_ptr(*this, "fbasic"),
139	142	m_kanji(*this, "kanji1"),
140	143	m_key1(*this, "key1"),
141	144	m_key2(*this, "key2"),
r252882	r252883
164	167	m_avbank16(*this, "av_bank16")
165	168	{
166	169	}
	170	DECLARE_DRIVER_INIT(fm7);
167	171
168		optional_shared_ptr<UINT8> m_shared_ram;
169		optional_shared_ptr<UINT8> m_boot_ram;
	172	virtual void machine_reset() override;
	173	virtual void video_start() override;
170	174
171		UINT8 m_irq_flags;
172		UINT8 m_irq_mask;
173		emu_timer* m_timer;
174		emu_timer* m_subtimer;
175		emu_timer* m_keyboard_timer;
176		UINT8 m_basic_rom_en;
177		UINT8 m_init_rom_en;
178		unsigned int m_key_delay;
179		unsigned int m_key_repeat;
180		UINT16 m_current_scancode;
181		UINT32 m_key_data[4];
182		UINT32 m_mod_data;
183		UINT8 m_key_scan_mode;
184		UINT8 m_break_flag;
185		UINT8 m_psg_regsel;
186		UINT8 m_psg_data;
187		UINT8 m_fdc_side;
188		UINT8 m_fdc_drive;
189		UINT8 m_fdc_irq_flag;
190		UINT8 m_fdc_drq_flag;
191		UINT8 m_fm77av_ym_irq;
192		UINT8 m_speaker_active;
193		UINT16 m_kanji_address;
194		fm7_encoder_t m_encoder;
195		fm7_mmr_t m_mmr;
196		UINT8 m_cp_prev;
197		std::unique_ptr<UINT8[]> m_video_ram;
198		emu_timer* m_fm77av_vsync_timer;
199		UINT8 m_type;
200		fm7_video_t m_video;
201		fm7_alu_t m_alu;
202		int m_sb_prev;
	175	DECLARE_MACHINE_START(fm7);
	176	DECLARE_MACHINE_START(fm77av);
	177	DECLARE_MACHINE_START(fm11);
	178	DECLARE_MACHINE_START(fm16);
	179
	180	DECLARE_WRITE_LINE_MEMBER(fm7_fdc_intrq_w);
	181	DECLARE_WRITE_LINE_MEMBER(fm7_fdc_drq_w);
	182	DECLARE_READ8_MEMBER(fm77av_joy_1_r);
	183	DECLARE_READ8_MEMBER(fm77av_joy_2_r);
	184	DECLARE_WRITE_LINE_MEMBER(fm77av_fmirq);
	185
203	186	DECLARE_READ8_MEMBER(fm7_subintf_r);
204	187	DECLARE_WRITE8_MEMBER(fm7_subintf_w);
205	188	DECLARE_READ8_MEMBER(fm7_sub_busyflag_r);
r252882	r252883
286	269	DECLARE_WRITE8_MEMBER(fm7_mmr_w);
287	270	DECLARE_READ8_MEMBER(fm7_kanji_r);
288	271	DECLARE_WRITE8_MEMBER(fm7_kanji_w);
	272
	273	IRQ_CALLBACK_MEMBER(fm7_irq_ack);
	274	IRQ_CALLBACK_MEMBER(fm7_sub_irq_ack);
	275
	276	DECLARE_WRITE_LINE_MEMBER(write_centronics_busy);
	277	DECLARE_WRITE_LINE_MEMBER(write_centronics_fault);
	278	DECLARE_WRITE_LINE_MEMBER(write_centronics_ack);
	279	DECLARE_WRITE_LINE_MEMBER(write_centronics_perror);
	280
	281	UINT32 screen_update_fm7(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
	282
	283	protected:
	284	optional_shared_ptr<UINT8> m_shared_ram;
	285	optional_shared_ptr<UINT8> m_boot_ram;
	286
	287	UINT8         m_irq_flags;
	288	UINT8         m_irq_mask;
	289	emu_timer*      m_timer;
	290	emu_timer*      m_subtimer;
	291	emu_timer*      m_keyboard_timer;
	292	UINT8         m_basic_rom_en;
	293	UINT8         m_init_rom_en;
	294
	295	unsigned int   m_key_delay;
	296	unsigned int   m_key_repeat;
	297	UINT16          m_current_scancode;
	298	UINT32          m_key_data[4];
	299	UINT32          m_mod_data;
	300	UINT8          m_key_scan_mode;
	301	UINT8          m_break_flag;
	302
	303	UINT8          m_psg_regsel;
	304	UINT8          m_psg_data;
	305
	306	UINT8          m_fdc_side;
	307	UINT8          m_fdc_drive;
	308	UINT8          m_fdc_irq_flag;
	309	UINT8          m_fdc_drq_flag;
	310
	311	UINT8          m_fm77av_ym_irq;
	312	UINT8          m_speaker_active;
	313
	314	UINT16          m_kanji_address;
	315	fm7_encoder_t   m_encoder;
	316	fm7_mmr_t       m_mmr;
	317	UINT8          m_cp_prev;
	318
	319	std::unique_ptr<UINT8[]>   m_video_ram;
	320	emu_timer*                m_fm77av_vsync_timer;
	321	UINT8 m_type;
	322	fm7_video_t      m_video;
	323	fm7_alu_t      m_alu;
	324	int            m_sb_prev;
	325
289	326	void fm77av_encoder_setup_command();
290	327	void fm77av_encoder_handle_command();
291		DECLARE_DRIVER_INIT(fm7);
292		virtual void machine_reset() override;
293		virtual void video_start() override;
294		DECLARE_MACHINE_START(fm7);
295		DECLARE_MACHINE_START(fm77av);
296		DECLARE_MACHINE_START(fm11);
297		DECLARE_MACHINE_START(fm16);
298		UINT32 screen_update_fm7(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
299	328	TIMER_CALLBACK_MEMBER(fm7_beeper_off);
300	329	TIMER_CALLBACK_MEMBER(fm77av_encoder_ack);
301	330	TIMER_CALLBACK_MEMBER(fm7_timer_irq);
r252882	r252883
303	332	TIMER_CALLBACK_MEMBER(fm7_keyboard_poll);
304	333	TIMER_CALLBACK_MEMBER(fm77av_alu_task_end);
305	334	TIMER_CALLBACK_MEMBER(fm77av_vsync);
306		DECLARE_WRITE_LINE_MEMBER(fm7_fdc_intrq_w);
307		DECLARE_WRITE_LINE_MEMBER(fm7_fdc_drq_w);
308		DECLARE_READ8_MEMBER(fm77av_joy_1_r);
309		DECLARE_READ8_MEMBER(fm77av_joy_2_r);
310		IRQ_CALLBACK_MEMBER(fm7_irq_ack);
311		IRQ_CALLBACK_MEMBER(fm7_sub_irq_ack);
312		DECLARE_WRITE_LINE_MEMBER(fm77av_fmirq);
	335
313	336	required_device<cpu_device> m_maincpu;
314	337	required_device<cpu_device> m_sub;
315	338	optional_device<cpu_device> m_x86;
r252882	r252883
317	340	required_device<beep_device> m_beeper;
318	341	optional_device<ym2203_device> m_ym;
319	342	optional_device<ay8910_device> m_psg;
	343
320	344	required_device<centronics_device> m_centronics;
321	345	required_device<output_latch_device> m_cent_data_out;
	346
322	347	required_device<mb8877_t> m_fdc;
323	348	required_device<floppy_connector> m_floppy0;
324	349	required_device<floppy_connector> m_floppy1;
325
326	350	floppy_image_device *m_floppy;
327	351
	352	optional_region_ptr<UINT8> m_ram_ptr;
	353	optional_region_ptr<UINT8> m_rom_ptr;
	354	optional_region_ptr<UINT8> m_basic_ptr;
	355
328	356	void fm7_alu_mask_write(UINT32 offset, int bank, UINT8 dat);
329	357	void fm7_alu_function_compare(UINT32 offset);
330	358	void fm7_alu_function_pset(UINT32 offset);
r252882	r252883
350	378	int m_centronics_ack;
351	379	int m_centronics_perror;
352	380
353		DECLARE_WRITE_LINE_MEMBER(write_centronics_busy);
354		DECLARE_WRITE_LINE_MEMBER(write_centronics_fault);
355		DECLARE_WRITE_LINE_MEMBER(write_centronics_ack);
356		DECLARE_WRITE_LINE_MEMBER(write_centronics_perror);
357
358	381	optional_memory_region m_kanji;
359	382	required_ioport m_key1;
360	383	required_ioport m_key2;
r252882	r252883
383	406	optional_device<address_map_bank_device> m_avbank15;
384	407	optional_device<address_map_bank_device> m_avbank16;
385	408
386		protected:
387	409	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
388	410	};
389	411

trunk/src/mame/includes/harddriv.h

r252882	r252883
46	46	public:
47	47	harddriv_state(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
48	48
	49	void init_strtdriv(void);
49	50
	51	void init_harddriv(void);
	52
	53	void init_harddrivc(void);
	54
	55	void init_racedriv(void);
	56	void init_racedrivb1(void);
	57
	58	void init_racedrivc(void);
	59	void init_racedrivc1(void);
	60
	61	void init_hdrivair(void);
	62	void init_hdrivairp(void);
	63
	64	void init_steeltal(void);
	65	void init_steeltal1(void);
	66	void init_steeltalp(void);
	67
	68	void init_stunrun(void);
	69	void init_racedrivc_panorama_side();
	70
	71	mc68681_device* get_duart() { return m_duartn68681; }
	72	screen_device* get_screen() { return m_screen; }
	73
	74	void init_video();
	75	INTERRUPT_GEN_MEMBER(hd68k_irq_gen);
	76	TIMER_CALLBACK_MEMBER(deferred_adsp_bank_switch);
	77	TIMER_CALLBACK_MEMBER(rddsp32_sync_cb);
	78
	79	/*----------- defined in machine/harddriv.c -----------*/
	80
	81	/* Driver/Multisync board */
	82	DECLARE_WRITE16_MEMBER( hd68k_irq_ack_w );
	83
	84	DECLARE_WRITE_LINE_MEMBER(harddriv_duart_irq_handler);
	85
	86	DECLARE_READ16_MEMBER( hd68k_gsp_io_r );
	87	DECLARE_WRITE16_MEMBER( hd68k_gsp_io_w );
	88
	89	DECLARE_READ16_MEMBER( hd68k_msp_io_r );
	90	DECLARE_WRITE16_MEMBER( hd68k_msp_io_w );
	91
	92	DECLARE_READ16_MEMBER( hd68k_a80000_r );
	93	DECLARE_READ16_MEMBER( hd68k_port0_r );
	94	DECLARE_READ16_MEMBER( hd68k_adc8_r );
	95	DECLARE_READ16_MEMBER( hd68k_adc12_r );
	96	DECLARE_READ16_MEMBER( hdc68k_port1_r );
	97	DECLARE_READ16_MEMBER( hda68k_port1_r );
	98	DECLARE_READ16_MEMBER( hdc68k_wheel_r );
	99	DECLARE_READ16_MEMBER( hd68k_sound_reset_r );
	100
	101	DECLARE_WRITE16_MEMBER( hd68k_adc_control_w );
	102	DECLARE_WRITE16_MEMBER( hd68k_wr0_write );
	103	DECLARE_WRITE16_MEMBER( hd68k_wr1_write );
	104	DECLARE_WRITE16_MEMBER( hd68k_wr2_write );
	105	DECLARE_WRITE16_MEMBER( hd68k_nwr_w );
	106	DECLARE_WRITE16_MEMBER( hdc68k_wheel_edge_reset_w );
	107
	108	DECLARE_READ16_MEMBER( hd68k_zram_r );
	109	DECLARE_WRITE16_MEMBER( hd68k_zram_w );
	110
	111	DECLARE_WRITE16_MEMBER( hdgsp_io_w );
	112
	113	DECLARE_WRITE16_MEMBER( hdgsp_protection_w );
	114
	115	DECLARE_WRITE_LINE_MEMBER( hdgsp_irq_gen );
	116	DECLARE_WRITE_LINE_MEMBER( hdmsp_irq_gen );
	117
	118	/* ADSP board */
	119	DECLARE_READ16_MEMBER( hd68k_adsp_program_r );
	120	DECLARE_WRITE16_MEMBER( hd68k_adsp_program_w );
	121
	122	DECLARE_READ16_MEMBER( hd68k_adsp_data_r );
	123	DECLARE_WRITE16_MEMBER( hd68k_adsp_data_w );
	124
	125	DECLARE_READ16_MEMBER( hd68k_adsp_buffer_r );
	126	DECLARE_WRITE16_MEMBER( hd68k_adsp_buffer_w );
	127
	128	DECLARE_WRITE16_MEMBER( hd68k_adsp_control_w );
	129	DECLARE_WRITE16_MEMBER( hd68k_adsp_irq_clear_w );
	130	DECLARE_READ16_MEMBER( hd68k_adsp_irq_state_r );
	131
	132	DECLARE_READ16_MEMBER( hdadsp_special_r );
	133	DECLARE_WRITE16_MEMBER( hdadsp_special_w );
	134
	135	DECLARE_READ16_MEMBER(steeltal_dummy_r);
	136	DECLARE_READ32_MEMBER(rddsp_unmap_r);
	137
	138	/* DS III/IV board */
	139	DECLARE_WRITE16_MEMBER( hd68k_ds3_control_w );
	140	DECLARE_READ16_MEMBER( hd68k_ds3_girq_state_r );
	141
	142	DECLARE_READ16_MEMBER( hd68k_ds3_gdata_r );
	143	DECLARE_WRITE16_MEMBER( hd68k_ds3_gdata_w );
	144
	145	DECLARE_READ16_MEMBER( hdds3_special_r );
	146	DECLARE_WRITE16_MEMBER( hdds3_special_w );
	147	DECLARE_READ16_MEMBER( hdds3_control_r );
	148	DECLARE_WRITE16_MEMBER( hdds3_control_w );
	149
	150	DECLARE_READ16_MEMBER( hd68k_ds3_program_r );
	151	DECLARE_WRITE16_MEMBER( hd68k_ds3_program_w );
	152
	153	DECLARE_READ16_MEMBER( hd68k_ds3_sdata_r );
	154	DECLARE_WRITE16_MEMBER( hd68k_ds3_sdata_w );
	155	DECLARE_WRITE16_MEMBER( hd68k_ds3_sirq_clear_w );
	156	DECLARE_READ16_MEMBER( hd68k_ds3_sirq_state_r );
	157
	158	DECLARE_READ16_MEMBER( hdds3_sdsp_special_r );
	159	DECLARE_WRITE16_MEMBER( hdds3_sdsp_special_w );
	160
	161	DECLARE_READ16_MEMBER( hdds3_sdsp_control_r );
	162	DECLARE_WRITE16_MEMBER( hdds3_sdsp_control_w );
	163	DECLARE_READ16_MEMBER( hdds3_xdsp_control_r );
	164	DECLARE_WRITE16_MEMBER( hdds3_xdsp_control_w );
	165
	166	TIMER_CALLBACK_MEMBER( xsdp_sport1_irq_off_callback );
	167
	168	WRITE16_MEMBER( watchdog_reset16_w );
	169
	170	DECLARE_READ16_MEMBER( hdgsp_control_lo_r );
	171	DECLARE_WRITE16_MEMBER( hdgsp_control_lo_w );
	172	DECLARE_READ16_MEMBER( hdgsp_control_hi_r );
	173	DECLARE_WRITE16_MEMBER( hdgsp_control_hi_w );
	174
	175	DECLARE_READ16_MEMBER( hdgsp_vram_2bpp_r );
	176	DECLARE_WRITE16_MEMBER( hdgsp_vram_1bpp_w );
	177	DECLARE_WRITE16_MEMBER( hdgsp_vram_2bpp_w );
	178
	179	DECLARE_READ16_MEMBER( hdgsp_paletteram_lo_r );
	180	DECLARE_WRITE16_MEMBER( hdgsp_paletteram_lo_w );
	181	DECLARE_READ16_MEMBER( hdgsp_paletteram_hi_r );
	182	DECLARE_WRITE16_MEMBER( hdgsp_paletteram_hi_w );
	183
	184	/* DSK board */
	185	DECLARE_WRITE32_MEMBER(hddsk_update_pif);
	186
	187	/* DS III/IV board */
	188	TIMER_DEVICE_CALLBACK_MEMBER( ds3sdsp_internal_timer_callback );
	189	TIMER_DEVICE_CALLBACK_MEMBER( ds3xdsp_internal_timer_callback );
	190
	191	TMS340X0_SCANLINE_IND16_CB_MEMBER(scanline_driver);
	192	TMS340X0_SCANLINE_IND16_CB_MEMBER(scanline_multisync);
	193
	194	/*----------- defined in video/harddriv.c -----------*/
	195
	196	TMS340X0_TO_SHIFTREG_CB_MEMBER(hdgsp_write_to_shiftreg);
	197	TMS340X0_FROM_SHIFTREG_CB_MEMBER(hdgsp_read_from_shiftreg);
	198
	199	INTERRUPT_GEN_MEMBER(video_int_gen);
	200	DECLARE_WRITE_LINE_MEMBER(sound_int_write_line);
	201
	202
	203	/* DSK board */
	204	DECLARE_WRITE16_MEMBER( hd68k_dsk_control_w );
	205	DECLARE_READ16_MEMBER( hd68k_dsk_ram_r );
	206	DECLARE_WRITE16_MEMBER( hd68k_dsk_ram_w );
	207	DECLARE_READ16_MEMBER( hd68k_dsk_small_rom_r );
	208	DECLARE_READ16_MEMBER( hd68k_dsk_rom_r );
	209	DECLARE_WRITE16_MEMBER( hd68k_dsk_dsp32_w );
	210	DECLARE_READ16_MEMBER( hd68k_dsk_dsp32_r );
	211	DECLARE_WRITE32_MEMBER( rddsp32_sync0_w );
	212	DECLARE_WRITE32_MEMBER( rddsp32_sync1_w );
	213
	214	/* DSPCOM board */
	215	DECLARE_WRITE16_MEMBER( hddspcom_control_w );
	216
	217	DECLARE_WRITE16_MEMBER( rd68k_slapstic_w );
	218	DECLARE_READ16_MEMBER( rd68k_slapstic_r );
	219
	220	/* Game-specific protection */
	221	DECLARE_WRITE16_MEMBER( st68k_sloop_w );
	222	DECLARE_READ16_MEMBER( st68k_sloop_r );
	223	DECLARE_READ16_MEMBER( st68k_sloop_alt_r );
	224	DECLARE_WRITE16_MEMBER( st68k_protosloop_w );
	225	DECLARE_READ16_MEMBER( st68k_protosloop_r );
	226
	227	/* GSP optimizations */
	228	DECLARE_READ16_MEMBER( hdgsp_speedup_r );
	229	DECLARE_WRITE16_MEMBER( hdgsp_speedup1_w );
	230	DECLARE_WRITE16_MEMBER( hdgsp_speedup2_w );
	231	DECLARE_READ16_MEMBER( rdgsp_speedup1_r );
	232	DECLARE_WRITE16_MEMBER( rdgsp_speedup1_w );
	233
	234	/* MSP optimizations */
	235	DECLARE_READ16_MEMBER( hdmsp_speedup_r );
	236	DECLARE_WRITE16_MEMBER( hdmsp_speedup_w );
	237
	238	/* ADSP optimizations */
	239	DECLARE_READ16_MEMBER( hdadsp_speedup_r );
	240	DECLARE_READ16_MEMBER( hdds3_speedup_r );
	241
	242
	243	DECLARE_WRITE_LINE_MEMBER(hdds3sdsp_timer_enable_callback);
	244	DECLARE_WRITE32_MEMBER(hdds3sdsp_serial_tx_callback);
	245	DECLARE_READ32_MEMBER(hdds3sdsp_serial_rx_callback);
	246
	247	DECLARE_WRITE_LINE_MEMBER(hdds3xdsp_timer_enable_callback);
	248	DECLARE_WRITE32_MEMBER(hdds3xdsp_serial_tx_callback);
	249	DECLARE_READ32_MEMBER(hdds3xdsp_serial_rx_callback);
	250
	251	protected:
50	252	required_device<cpu_device> m_maincpu;
51	253	required_device<tms34010_device> m_gsp;
52	254	optional_device<tms34010_device> m_msp;
r252882	r252883
63	265	optional_device<mc68681_device> m_duartn68681;
64	266
65	267	UINT8                   m_hd34010_host_access;
66		UINT8                   m_dsk_pio_access;
67	268
68	269	optional_shared_ptr<UINT16> m_msp_ram;
	270
69	271	UINT16 *                m_dsk_ram;
70	272	UINT16 *                m_dsk_rom;
71	273	optional_device<eeprom_parallel_28xx_device> m_dsk_10c;
72	274	optional_device<eeprom_parallel_28xx_device> m_dsk_30c;
	275	UINT8                   m_dsk_pio_access;
	276
73	277	UINT16 *                m_m68k_slapstic_base;
74	278	UINT16 *                m_m68k_sloop_alt_base;
75	279
r252882	r252883
140	344	UINT16                  m_som_memory[0x8000/2];
141	345	UINT16 *                m_adsp_pgm_memory_word;
142	346
143		UINT16 *                m_ds3_sdata_memory;
	347	optional_region_ptr<UINT16>   m_ds3_sdata_memory;
144	348	UINT32                  m_ds3_sdata_memory_size;
145	349
146	350	UINT8                   m_ds3_gcmd;
r252882	r252883
204	408	INT8                    m_gfx_finescroll;
205	409	UINT8                   m_gfx_palettebank;
206	410	virtual void update_interrupts();
207		DECLARE_READ16_MEMBER(steeltal_dummy_r);
208		DECLARE_READ32_MEMBER(rddsp_unmap_r);
209	411	void init_driver();
210	412	void init_multisync(int compact_inputs);
211	413	void init_adsp();
r252882	r252883
217	419	void racedrivc_init_common(offs_t gsp_protection);
218	420	void steeltal_init_common(offs_t ds3_transfer_pc, int proto_sloop);
219	421
220		void init_strtdriv(void);
221
222		void init_harddriv(void);
223
224		void init_harddrivc(void);
225
226		void init_racedriv(void);
227		void init_racedrivb1(void);
228
229		void init_racedrivc(void);
230		void init_racedrivc1(void);
231
232		void init_hdrivair(void);
233		void init_hdrivairp(void);
234
235		void init_steeltal(void);
236		void init_steeltal1(void);
237		void init_steeltalp(void);
238
239		void init_stunrun(void);
240		void init_racedrivc_panorama_side();
241
242		void init_video();
243		INTERRUPT_GEN_MEMBER(hd68k_irq_gen);
244		TIMER_CALLBACK_MEMBER(deferred_adsp_bank_switch);
245		TIMER_CALLBACK_MEMBER(rddsp32_sync_cb);
246	422	required_device<mc68681_device> m_duart;
247	423	optional_device<asic65_device> m_asic65;
248		DECLARE_WRITE_LINE_MEMBER(harddriv_duart_irq_handler);
249	424
250		/*----------- defined in machine/harddriv.c -----------*/
251
252		/* Driver/Multisync board */
253		DECLARE_WRITE16_MEMBER( hd68k_irq_ack_w );
254
255		DECLARE_READ16_MEMBER( hd68k_gsp_io_r );
256		DECLARE_WRITE16_MEMBER( hd68k_gsp_io_w );
257
258		DECLARE_READ16_MEMBER( hd68k_msp_io_r );
259		DECLARE_WRITE16_MEMBER( hd68k_msp_io_w );
260
261		DECLARE_READ16_MEMBER( hd68k_a80000_r );
262		DECLARE_READ16_MEMBER( hd68k_port0_r );
263		DECLARE_READ16_MEMBER( hd68k_adc8_r );
264		DECLARE_READ16_MEMBER( hd68k_adc12_r );
265		DECLARE_READ16_MEMBER( hdc68k_port1_r );
266		DECLARE_READ16_MEMBER( hda68k_port1_r );
267		DECLARE_READ16_MEMBER( hdc68k_wheel_r );
268		DECLARE_READ16_MEMBER( hd68k_sound_reset_r );
269
270		DECLARE_WRITE16_MEMBER( hd68k_adc_control_w );
271		DECLARE_WRITE16_MEMBER( hd68k_wr0_write );
272		DECLARE_WRITE16_MEMBER( hd68k_wr1_write );
273		DECLARE_WRITE16_MEMBER( hd68k_wr2_write );
274		DECLARE_WRITE16_MEMBER( hd68k_nwr_w );
275		DECLARE_WRITE16_MEMBER( hdc68k_wheel_edge_reset_w );
276
277		DECLARE_READ16_MEMBER( hd68k_zram_r );
278		DECLARE_WRITE16_MEMBER( hd68k_zram_w );
279
280		DECLARE_WRITE16_MEMBER( hdgsp_io_w );
281
282		DECLARE_WRITE16_MEMBER( hdgsp_protection_w );
283
284		DECLARE_WRITE_LINE_MEMBER( hdgsp_irq_gen );
285		DECLARE_WRITE_LINE_MEMBER( hdmsp_irq_gen );
286
287		/* ADSP board */
288		DECLARE_READ16_MEMBER( hd68k_adsp_program_r );
289		DECLARE_WRITE16_MEMBER( hd68k_adsp_program_w );
290
291		DECLARE_READ16_MEMBER( hd68k_adsp_data_r );
292		DECLARE_WRITE16_MEMBER( hd68k_adsp_data_w );
293
294		DECLARE_READ16_MEMBER( hd68k_adsp_buffer_r );
295		DECLARE_WRITE16_MEMBER( hd68k_adsp_buffer_w );
296
297		DECLARE_WRITE16_MEMBER( hd68k_adsp_control_w );
298		DECLARE_WRITE16_MEMBER( hd68k_adsp_irq_clear_w );
299		DECLARE_READ16_MEMBER( hd68k_adsp_irq_state_r );
300
301		DECLARE_READ16_MEMBER( hdadsp_special_r );
302		DECLARE_WRITE16_MEMBER( hdadsp_special_w );
303
304	425	/* DS III/IV board */
305	426	void update_ds3_irq();
306	427	void update_ds3_sirq();
307	428
308		DECLARE_WRITE16_MEMBER( hd68k_ds3_control_w );
309		DECLARE_READ16_MEMBER( hd68k_ds3_girq_state_r );
310
311		DECLARE_READ16_MEMBER( hd68k_ds3_gdata_r );
312		DECLARE_WRITE16_MEMBER( hd68k_ds3_gdata_w );
313
314		DECLARE_READ16_MEMBER( hdds3_special_r );
315		DECLARE_WRITE16_MEMBER( hdds3_special_w );
316		DECLARE_READ16_MEMBER( hdds3_control_r );
317		DECLARE_WRITE16_MEMBER( hdds3_control_w );
318
319		DECLARE_READ16_MEMBER( hd68k_ds3_program_r );
320		DECLARE_WRITE16_MEMBER( hd68k_ds3_program_w );
321
322		DECLARE_READ16_MEMBER( hd68k_ds3_sdata_r );
323		DECLARE_WRITE16_MEMBER( hd68k_ds3_sdata_w );
324		DECLARE_WRITE16_MEMBER( hd68k_ds3_sirq_clear_w );
325		DECLARE_READ16_MEMBER( hd68k_ds3_sirq_state_r );
326
327		DECLARE_READ16_MEMBER( hdds3_sdsp_special_r );
328		DECLARE_WRITE16_MEMBER( hdds3_sdsp_special_w );
329
330		DECLARE_READ16_MEMBER( hdds3_sdsp_control_r );
331		DECLARE_WRITE16_MEMBER( hdds3_sdsp_control_w );
332		DECLARE_READ16_MEMBER( hdds3_xdsp_control_r );
333		DECLARE_WRITE16_MEMBER( hdds3_xdsp_control_w );
334
335	429	void hdds3sdsp_reset_timer();
336	430	void hdds3xdsp_reset_timer();
337	431
338		TIMER_CALLBACK_MEMBER( xsdp_sport1_irq_off_callback );
339
340		/* DSK board */
341		DECLARE_WRITE16_MEMBER( hd68k_dsk_control_w );
342		DECLARE_READ16_MEMBER( hd68k_dsk_ram_r );
343		DECLARE_WRITE16_MEMBER( hd68k_dsk_ram_w );
344		DECLARE_READ16_MEMBER( hd68k_dsk_small_rom_r );
345		DECLARE_READ16_MEMBER( hd68k_dsk_rom_r );
346		DECLARE_WRITE16_MEMBER( hd68k_dsk_dsp32_w );
347		DECLARE_READ16_MEMBER( hd68k_dsk_dsp32_r );
348		DECLARE_WRITE32_MEMBER( rddsp32_sync0_w );
349		DECLARE_WRITE32_MEMBER( rddsp32_sync1_w );
350
351		/* DSPCOM board */
352		DECLARE_WRITE16_MEMBER( hddspcom_control_w );
353
354		DECLARE_WRITE16_MEMBER( rd68k_slapstic_w );
355		DECLARE_READ16_MEMBER( rd68k_slapstic_r );
356
357	432	/* Game-specific protection */
358	433	int st68k_sloop_tweak(offs_t offset);
359		DECLARE_WRITE16_MEMBER( st68k_sloop_w );
360		DECLARE_READ16_MEMBER( st68k_sloop_r );
361		DECLARE_READ16_MEMBER( st68k_sloop_alt_r );
362	434	int st68k_protosloop_tweak(offs_t offset);
363		DECLARE_WRITE16_MEMBER( st68k_protosloop_w );
364		DECLARE_READ16_MEMBER( st68k_protosloop_r );
365	435
366		/* GSP optimizations */
367		DECLARE_READ16_MEMBER( hdgsp_speedup_r );
368		DECLARE_WRITE16_MEMBER( hdgsp_speedup1_w );
369		DECLARE_WRITE16_MEMBER( hdgsp_speedup2_w );
370		DECLARE_READ16_MEMBER( rdgsp_speedup1_r );
371		DECLARE_WRITE16_MEMBER( rdgsp_speedup1_w );
372
373		/* MSP optimizations */
374		DECLARE_READ16_MEMBER( hdmsp_speedup_r );
375		DECLARE_WRITE16_MEMBER( hdmsp_speedup_w );
376
377		/* ADSP optimizations */
378		DECLARE_READ16_MEMBER( hdadsp_speedup_r );
379		DECLARE_READ16_MEMBER( hdds3_speedup_r );
380
381
382		DECLARE_WRITE_LINE_MEMBER(hdds3sdsp_timer_enable_callback);
383		DECLARE_WRITE32_MEMBER(hdds3sdsp_serial_tx_callback);
384		DECLARE_READ32_MEMBER(hdds3sdsp_serial_rx_callback);
385
386		DECLARE_WRITE_LINE_MEMBER(hdds3xdsp_timer_enable_callback);
387		DECLARE_WRITE32_MEMBER(hdds3xdsp_serial_tx_callback);
388		DECLARE_READ32_MEMBER(hdds3xdsp_serial_rx_callback);
389
390	436	/*----------- defined in video/harddriv.c -----------*/
391		TMS340X0_TO_SHIFTREG_CB_MEMBER(hdgsp_write_to_shiftreg);
392		TMS340X0_FROM_SHIFTREG_CB_MEMBER(hdgsp_read_from_shiftreg);
393	437
394	438	void update_palette_bank(int newbank);
395	439
396		DECLARE_READ16_MEMBER( hdgsp_control_lo_r );
397		DECLARE_WRITE16_MEMBER( hdgsp_control_lo_w );
398		DECLARE_READ16_MEMBER( hdgsp_control_hi_r );
399		DECLARE_WRITE16_MEMBER( hdgsp_control_hi_w );
400
401		DECLARE_READ16_MEMBER( hdgsp_vram_2bpp_r );
402		DECLARE_WRITE16_MEMBER( hdgsp_vram_1bpp_w );
403		DECLARE_WRITE16_MEMBER( hdgsp_vram_2bpp_w );
404
405	440	inline void gsp_palette_change(int offset);
406	441
407		DECLARE_READ16_MEMBER( hdgsp_paletteram_lo_r );
408		DECLARE_WRITE16_MEMBER( hdgsp_paletteram_lo_w );
409		DECLARE_READ16_MEMBER( hdgsp_paletteram_hi_r );
410		DECLARE_WRITE16_MEMBER( hdgsp_paletteram_hi_w );
411
412		/* DSK board */
413		DECLARE_WRITE32_MEMBER(hddsk_update_pif);
414
415		/* DS III/IV board */
416		TIMER_DEVICE_CALLBACK_MEMBER( ds3sdsp_internal_timer_callback );
417		TIMER_DEVICE_CALLBACK_MEMBER( ds3xdsp_internal_timer_callback );
418
419		TMS340X0_SCANLINE_IND16_CB_MEMBER(scanline_driver);
420		TMS340X0_SCANLINE_IND16_CB_MEMBER(scanline_multisync);
421
422	442	UINT8               m_sound_int_state;
423	443	UINT8               m_video_int_state;
424	444
425	445	optional_device<palette_device> m_palette;
426	446	int get_hblank(screen_device &screen) const { return (screen.hpos() > (screen.width() * 9 / 10)); }
427		WRITE16_MEMBER( watchdog_reset16_w );
428		INTERRUPT_GEN_MEMBER(video_int_gen);
429		DECLARE_WRITE_LINE_MEMBER(sound_int_write_line);
430	447	optional_device<atari_slapstic_device> m_slapstic_device;
	448
431	449	protected:
432	450	//virtual machine_config_constructor device_mconfig_additions() const;
433	451	virtual void device_start() override;

trunk/src/mame/machine/gamecom.cpp

r252882	r252883
177	177	/* P3 bit6 clear, bit7 set -> enable cartridge port #1? */
178	178	switch (data & 0xc0)
179	179	{
180		case 0x40: m_cart_ptr = m_cart1_rom->base(); break;
181		case 0x80: m_cart_ptr = m_cart2_rom->base(); break;
	180	case 0x40: m_cart_ptr = m_cart1_rom != NULL ? m_cart1_rom->base() : NULL; break;
	181	case 0x80: m_cart_ptr = m_cart2_rom != NULL ? m_cart2_rom->base() : NULL; break;
182	182	default:   m_cart_ptr = nullptr;       break;
183	183	}
184	184	return;

trunk/src/mame/video/dynax.cpp

r252882	r252883
393	393	*/
394	394	int dynax_state::blitter_drawgfx( int layer, int mask, const char *gfx, int src, int pen, int x, int y, int wrap, int flags )
395	395	{
396		UINT8 cmd;
397		UINT8 *ROM = memregion(gfx)->base();
398		size_t ROM_size = memregion(gfx)->bytes();
	396	size_t rom_size = m_gfx_region.bytes();
399	397
400		int sx;
401
402	398	if (m_layer_layout == LAYOUT_HNORIDUR)   // e.g. yarunara
403	399	pen = ((pen >> 4) & 0xf) | ((mask & 0x10) ? ((pen & 0x08) << 1) : 0);
404	400	else
r252882	r252883
409	405
410	406	if (flags & 1)
411	407	{
412		int start, len;
413
414	408	/* Clear the buffer(s) starting from the given scanline and exit */
415
416	409	int addr = x + (y << 8);
417	410
	411	int start = addr;
418	412	if (m_flipscreen)
419	413	start = 0;
420		else
421		start = addr;
422	414
423		len = 0x10000 - addr;
	415	int len = 0x10000 - addr;
424	416
425	417	switch (m_layer_layout)
426	418	{
r252882	r252883
469	461	return src;
470	462	}
471	463
472		sx = x;
	464	int sx = x;
473	465
474	466	src &= 0xfffff;
475	467
476	468	for ( ;; )
477	469	{
478		if (src >= ROM_size)
	470	if (src >= rom_size)
479	471	{
480	472	popmessage("GFXROM %s OVER %08x",gfx,src);
481	473	LOG(("\nGFXROM %s OVER %08x",gfx,src));
482	474	return src;
483	475	}
484	476
485		cmd = ROM[src++];
	477	UINT8 cmd = m_gfx_region[src++];
486	478	src &= 0xfffff;
487	479	if (!(flags & 0x02))    // Ignore the pens specified in ROM, draw everything with the pen supplied as parameter
488	480	pen = (pen & 0xf0) | ((cmd & 0xf0) >> 4);
r252882	r252883
503	495	popmessage("Blitter unknown command %06X: %02X\n", src - 1, cmd);
504	496
505	497	case 0xd:   // Skip X pixels
506		if (src >= ROM_size)
	498	if (src >= rom_size)
507	499	{
508	500	popmessage("GFXROM %s OVER %08x",gfx,src);
509	501	LOG(("\nGFXROM %s OVER %08x",gfx,src));
510	502	return src;
511	503	}
512		x = sx + ROM[src++];
	504	x = sx + m_gfx_region[src++];
513	505	src &= 0xfffff;
514	506	/* fall through into next case */
515	507
516	508	case 0xc:   // Draw N pixels
517		if (src >= ROM_size)
	509	if (src >= rom_size)
518	510	{
519	511	popmessage("GFXROM %s OVER %08x",gfx,src);
520	512	LOG(("\nGFXROM %s OVER %08x",gfx,src));
521	513	return src;
522	514	}
523		cmd = ROM[src++];
	515	cmd = m_gfx_region[src++];
524	516	src &= 0xfffff;
525	517	/* fall through into next case */
526	518

https://github.com/mamedev/mame/commit/3e4605ebffaedb2d1d3b0c43afe829312044ea5c

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