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r41740 Sunday 15th November, 2015 at 15:55:37 UTC by R. Belmont
Merge pull request #461 from einstein95/patch-3 Make game names consistent (nw)

[/trunk]	makefile
[3rdparty/bx/include/bx]	os.h platform.h
[3rdparty/genie/build/gmake.bsd]	genie.make
[3rdparty/genie/build/gmake.solaris]	genie.make
[3rdparty/genie/src/actions/cmake]	cmake_project.lua
[3rdparty/genie/src/host]	scripts.c
[hash]	bbc_32016_flop.xml bbc_65c102_flop.xml bbc_68000_flop.xml* bbc_80186_flop.xml bbc_arm_flop.xml bbc_z80_flop.xml bbca_cass.xml bbcb_cass.xml bbcb_flop.xml bbcb_orig_flop.xml* bbcm_cass.xml psx.xml
[scripts]	genie.lua
[scripts/src]	3rdparty.lua bus.lua cpu.lua devices.lua emu.lua lib.lua main.lua netlist.lua tests.lua tools.lua
[scripts/src/osd]	modules.lua osdmini.lua sdl.lua windows.lua
[scripts/target/mame]	arcade.lua dummy.lua mame.lua mess.lua nl.lua tiny.lua
[src/devices/bus/a1bus]	a1bus.cpp a1cassette.cpp a1cffa.cpp
[src/devices/bus/a2bus]	a2alfam2.cpp a2applicard.cpp a2bus.cpp a2cffa.cpp a2corvus.cpp a2diskii.cpp a2diskiing.cpp a2dx1.cpp a2eauxslot.cpp a2eramworks3.cpp a2hsscsi.cpp a2mcms.cpp a2memexp.cpp a2midi.cpp a2mockingboard.cpp a2pic.cpp a2scsi.cpp a2softcard.cpp a2ssc.cpp a2swyft.cpp a2themill.cpp a2thunderclock.cpp a2ultraterm.cpp a2videoterm.cpp a2vulcan.cpp a2zipdrive.cpp corvfdc01.cpp corvfdc02.cpp laser128.cpp mouse.cpp ramcard128k.cpp ramcard16k.cpp timemasterho.cpp
[src/devices/bus/a7800]	a78_slot.cpp cpuwiz.cpp rom.cpp xboard.cpp
[src/devices/bus/a800]	a800_slot.cpp a8sio.cpp cassette.cpp oss.cpp rom.cpp sparta.cpp
[src/devices/bus/abcbus]	abcbus.cpp fd2.cpp lux10828.cpp lux21046.cpp lux21056.cpp
[src/devices/bus/abckb]	abc77.cpp abc800kb.cpp abc99.cpp abckb.cpp
[src/devices/bus/adam]	exp.cpp ide.cpp
[src/devices/bus/adamnet]	adamnet.cpp ddp.cpp
[src/devices/bus/apf]	slot.cpp
[src/devices/bus/apricot]	expansion.cpp
[src/devices/bus/arcadia]	slot.cpp
[src/devices/bus/astrocde]	exp.cpp rom.cpp slot.cpp
[src/devices/bus/bml3]	bml3bus.cpp bml3kanji.cpp bml3mp1802.cpp bml3mp1805.cpp
[src/devices/bus/bw2]	exp.cpp
[src/devices/bus/c64]	bn1541.cpp c128_partner.cpp comal80.cpp cpm.cpp dela_ep64.cpp dela_ep7x8.cpp dinamic.cpp dqbb.cpp easy_calc_result.cpp epyx_fast_load.cpp exp.cpp final3.cpp fun_play.cpp georam.cpp ide64.cpp mach5.cpp magic_desk.cpp magic_voice.cpp multiscreen.cpp neoram.cpp pagefox.cpp ross.cpp silverrock.cpp structured_basic.cpp super_explode.cpp super_games.cpp sw8k.cpp swiftlink.cpp system3.cpp tdos.cpp turbo232.cpp vw64.cpp zaxxon.cpp
[src/devices/bus/cbm2]	exp.cpp user.cpp
[src/devices/bus/cbmiec]	cbmiec.cpp
[src/devices/bus/centronics]	comxpl80.cpp covox.cpp epson_ex800.cpp epson_lx810l.cpp printer.cpp
[src/devices/bus/chanf]	rom.cpp slot.cpp
[src/devices/bus/coco]	coco_dwsock.cpp coco_fdc.cpp coco_multi.cpp coco_orch90.cpp coco_pak.cpp cococart.cpp
[src/devices/bus/coleco]	ctrl.cpp exp.cpp
[src/devices/bus/compucolor]	floppy.cpp
[src/devices/bus/comx35]	exp.cpp ram.cpp
[src/devices/bus/cpc]	amdrum.cpp brunword4.cpp cpc_pds.cpp cpc_rom.cpp cpc_rs232.cpp cpc_ssa1.cpp cpcexp.cpp ddi1.cpp doubler.cpp hd20.cpp magicsound.cpp mface2.cpp playcity.cpp smartwatch.cpp symbfac2.cpp transtape.cpp* transtape.h*
[src/devices/bus/crvision]	slot.cpp
[src/devices/bus/dmv]	dmvbus.cpp k210.cpp k220.cpp k230.cpp k233.cpp k801.cpp k803.cpp k806.cpp ram.cpp
[src/devices/bus/ecbbus]	ecbbus.cpp grip.cpp
[src/devices/bus/econet]	e01.cpp econet.cpp
[src/devices/bus/ep64]	exp.cpp
[src/devices/bus/epson_sio]	epson_sio.cpp pf10.cpp tf20.cpp
[src/devices/bus/gameboy]	gb_slot.cpp mbc.cpp rom.cpp
[src/devices/bus/gamegear]	ggext.cpp
[src/devices/bus/gba]	gba_slot.cpp rom.cpp
[src/devices/bus/generic]	slot.cpp
[src/devices/bus/ieee488]	c2031.cpp c2040.cpp c2040fdc.cpp c8050.cpp c8050fdc.cpp c8280.cpp d9060.cpp hardbox.cpp ieee488.cpp softbox.cpp
[src/devices/bus/imi7000]	imi7000.cpp
[src/devices/bus/intv]	slot.cpp
[src/devices/bus/iq151]	disc2.cpp grafik.cpp iq151.cpp minigraf.cpp ms151a.cpp rom.cpp staper.cpp video32.cpp video64.cpp
[src/devices/bus/isa]	3c503.cpp 3c505.cpp aga.cpp cga.cpp dectalk.cpp ega.cpp finalchs.cpp gus.cpp hdc.cpp ibm_mfc.cpp isa.cpp lpt.cpp mach32.cpp mc1502_fdc.cpp mda.cpp ne1000.cpp ne2000.cpp num9rev.cpp omti8621.cpp pgc.cpp sb16.cpp sblaster.cpp sc499.cpp stereo_fx.cpp svga_cirrus.cpp svga_s3.cpp svga_trident.cpp svga_tseng.cpp vga.cpp vga_ati.cpp xtide.cpp
[src/devices/bus/isbx]	isbc_218a.cpp isbx.cpp
[src/devices/bus/kc]	d002.cpp d004.cpp kc.cpp ram.cpp rom.cpp
[src/devices/bus/lpci]	i82439tx.cpp mpc105.cpp pci.cpp southbridge.cpp
[src/devices/bus/macpds]	macpds.cpp pds_tpdfpd.cpp
[src/devices/bus/megadrive]	eeprom.cpp ggenie.cpp jcart.cpp md_slot.cpp rom.cpp stm95.cpp svp.cpp
[src/devices/bus/midi]	midi.cpp
[src/devices/bus/msx_cart]	disk.cpp msx_audio_kb.cpp
[src/devices/bus/neogeo]	banked_cart.cpp bootleg_prot.cpp cmc_prot.cpp fatfury2_prot.cpp kof98_prot.cpp mslugx_prot.cpp neogeo_intf.cpp pvc_prot.cpp sbp_prot.cpp sma_prot.cpp
[src/devices/bus/nes]	act53.cpp aladdin.cpp ave.cpp bandai.cpp benshieng.cpp bootleg.cpp camerica.cpp cony.cpp datach.cpp disksys.cpp event.cpp ggenie.cpp henggedianzi.cpp hosenkan.cpp irem.cpp jaleco.cpp jy.cpp kaiser.cpp karastudio.cpp konami.cpp legacy.cpp mmc1.cpp mmc2.cpp mmc3.cpp mmc3_clones.cpp mmc5.cpp multigame.cpp namcot.cpp nanjing.cpp nes_slot.cpp ntdec.cpp nxrom.cpp pirate.cpp racermate.cpp rcm.cpp rexsoft.cpp sachen.cpp somari.cpp sunsoft.cpp sunsoft_dcs.cpp taito.cpp tengen.cpp waixing.cpp
[src/devices/bus/nes_ctrl]	4score.cpp arkpaddle.cpp bcbattle.cpp ctrl.cpp fckeybrd.cpp ftrainer.cpp joypad.cpp konamihs.cpp miracle.cpp mjpanel.cpp pachinko.cpp partytap.cpp suborkey.cpp
[src/devices/bus/nubus]	nubus.cpp nubus_48gc.cpp nubus_cb264.cpp nubus_image.cpp nubus_m2hires.cpp nubus_m2video.cpp nubus_radiustpd.cpp nubus_spec8.cpp nubus_specpdq.cpp nubus_vikbw.cpp nubus_wsportrait.cpp pds30_30hr.cpp pds30_cb264.cpp pds30_mc30.cpp pds30_procolor816.cpp pds30_sigmalview.cpp
[src/devices/bus/odyssey2]	rom.cpp slot.cpp
[src/devices/bus/oricext]	jasmin.cpp microdisc.cpp oricext.cpp
[src/devices/bus/pc_joy]	pc_joy.cpp pc_joy_sw.cpp
[src/devices/bus/pc_kbd]	iskr1030.cpp keytro.cpp msnat.cpp pc83.cpp pc_kbdc.cpp
[src/devices/bus/pce]	pce_rom.cpp pce_slot.cpp
[src/devices/bus/pet]	c2n.cpp cass.cpp exp.cpp superpet.cpp
[src/devices/bus/plus4]	c1551.cpp exp.cpp
[src/devices/bus/psx]	analogue.cpp ctlrport.cpp memcard.cpp multitap.cpp
[src/devices/bus/ql]	exp.cpp rom.cpp sandy_superdisk.cpp trumpcard.cpp
[src/devices/bus/rs232]	keyboard.cpp null_modem.cpp pty.cpp rs232.cpp ser_mouse.cpp terminal.cpp xvd701.cpp
[src/devices/bus/s100]	s100.cpp wunderbus.cpp
[src/devices/bus/saturn]	sat_slot.cpp
[src/devices/bus/scsi]	scsi.cpp scsihle.cpp
[src/devices/bus/scv]	rom.cpp slot.cpp
[src/devices/bus/sega8]	rom.cpp sega8_slot.cpp
[src/devices/bus/sms_ctrl]	lphaser.cpp smsctrl.cpp sports.cpp
[src/devices/bus/sms_exp]	smsexp.cpp
[src/devices/bus/snes]	bsx.cpp event.cpp rom.cpp rom21.cpp sa1.cpp sdd1.cpp sdd1.h sgb.cpp snes_slot.cpp spc7110.cpp
[src/devices/bus/snes_ctrl]	bcbattle.cpp ctrl.cpp joypad.cpp miracle.cpp mouse.cpp multitap.cpp pachinko.cpp sscope.cpp twintap.cpp
[src/devices/bus/spc1000]	exp.cpp fdd.cpp
[src/devices/bus/ti99_peb]	bwg.cpp evpc.cpp hfdc.cpp horizon.cpp hsgpl.cpp memex.cpp myarcmem.cpp pcode.cpp peribox.cpp peribox.h samsmem.cpp spchsyn.cpp ti_32kmem.cpp ti_fdc.cpp ti_rs232.cpp tn_ide.cpp tn_usbsm.cpp
[src/devices/bus/ti99x]	990_dk.cpp 998board.cpp 998board.h datamux.cpp datamux.h genboard.cpp grom.cpp gromport.cpp gromport.h handset.cpp joyport.cpp joyport.h mecmouse.cpp videowrp.cpp videowrp.h
[src/devices/bus/tiki100]	exp.cpp
[src/devices/bus/tvc]	hbf.cpp tvc.cpp
[src/devices/bus/vboy]	slot.cpp
[src/devices/bus/vc4000]	slot.cpp
[src/devices/bus/vcs]	dpc.cpp rom.cpp scharger.cpp vcs_slot.cpp
[src/devices/bus/vcs_ctrl]	ctrl.cpp keypad.cpp
[src/devices/bus/vectrex]	rom.cpp slot.cpp
[src/devices/bus/vic10]	exp.cpp
[src/devices/bus/vic20]	exp.cpp fe3.cpp vic1112.cpp
[src/devices/bus/vidbrain]	exp.cpp
[src/devices/bus/vip]	byteio.cpp exp.cpp vp550.cpp vp585.cpp vp590.cpp
[src/devices/bus/vtech/memexp]	floppy.cpp
[src/devices/bus/wangpc]	emb.cpp lvc.cpp mcc.cpp tig.cpp wangpc.cpp wdc.cpp
[src/devices/bus/wswan]	rom.cpp slot.cpp
[src/devices/bus/x68k]	x68k_neptunex.cpp x68k_scsiext.cpp x68kexp.cpp
[src/devices/bus/z88]	ram.cpp rom.cpp z88.cpp
[src/devices/cpu/dsp56k]	dsp56mem.h
[src/devices/cpu/i8085]	i8085.cpp
[src/devices/cpu/i86]	i286.cpp
[src/devices/cpu/m6502]	deco16.cpp m3745x.cpp m4510.cpp m5074x.cpp
[src/devices/cpu/m6809]	6309dasm.cpp 6809dasm.cpp hd6309.cpp
[src/devices/cpu/sh2]	sh2comn.cpp
[src/devices/cpu/tms32031]	32031ops.cpp 32031ops.inc* tms32031.cpp
[src/devices/cpu/tms32051]	32051ops.cpp 32051ops.inc* tms32051.cpp
[src/devices/cpu/tms34010]	34010fld.cpp 34010fld.inc* 34010gfx.cpp 34010gfx.inc* 34010ops.cpp 34010ops.inc* 34010tbl.cpp 34010tbl.inc* tms34010.cpp
[src/devices/cpu/tms9900]	tms9995.h
[src/devices/cpu/z80]	z80dasm.cpp
[src/devices/imagedev]	cassette.cpp chd_cd.cpp flopdrv.cpp flopdrv.h floppy.cpp mfmhd.cpp mfmhd.h midiin.cpp midiout.cpp snapquik.cpp
[src/devices/machine]	6532riot.cpp 6821pia.cpp bankdev.cpp keyboard.cpp legscsi.cpp nvram.cpp pci.cpp pit8253.cpp ram.cpp terminal.cpp z80ctc.cpp z80ctc.h
[src/devices/sound]	2151intf.cpp 3526intf.cpp 3812intf.cpp 8950intf.cpp ay8910.cpp discrete.cpp samples.cpp tms5110.cpp tms5220.cpp votrax.cpp ym2151.cpp
[src/devices/video]	mc6845.cpp mc6845.h poly.h saa5050.cpp
[src/emu]	addrmap.cpp audit.cpp config.cpp debugger.cpp devcb.cpp devcpu.cpp devfind.cpp devfind.h device.cpp device.h diexec.h digfx.cpp diimage.cpp diimage.h dimemory.cpp dinetwork.cpp dinetwork.h dioutput.cpp dioutput.h dipty.cpp dipty.h dirtc.h diserial.cpp dislot.cpp disound.cpp distate.cpp distate.h drawgfxm.h drivenum.cpp drivenum.h emualloc.cpp emuopts.cpp emupal.cpp hash.cpp hashfile.cpp input.cpp ioport.cpp ioport.h luaengine.cpp machine.cpp machine.h mame.cpp memory.cpp network.cpp profiler.cpp render.cpp render.h rendfont.cpp rendlay.cpp romload.cpp save.cpp schedule.cpp screen.cpp softlist.cpp sound.cpp speaker.cpp sprite.h tilemap.cpp timer.cpp uiinput.cpp validity.cpp video.cpp
[src/emu/debug]	debugcmd.cpp debugcon.cpp debugcpu.cpp debugvw.cpp debugvw.h dvmemory.cpp dvmemory.h dvwpoints.cpp express.cpp
[src/emu/drivers]	testcpu.cpp
[src/emu/machine]	generic.cpp
[src/emu/ui]	cheatopt.cpp filemngr.cpp filesel.cpp imgcntrl.cpp inputmap.cpp mainmenu.cpp menu.cpp menu.h miscmenu.cpp selgame.cpp swlist.cpp ui.cpp videoopt.cpp viewgfx.cpp
[src/emu/video]	resnet.cpp rgbgen.h rgbvmx.h vector.cpp
[src/lib/formats]	fsd_dsk.cpp* fsd_dsk.h*
[src/lib/netlist]	nl_parser.cpp
[src/lib/netlist/plib]	pconfig.h pparser.cpp
[src/lib/netlist/solver]	nld_solver.cpp
[src/lib/netlist/tools]	nl_convert.cpp
[src/mame]	arcade.lst
[src/mame/audio]	irem.cpp nl_kidniki.cpp nl_kidniki.inc*
[src/mame/drivers]	amstrad.cpp apricot.cpp bbc.cpp c65_old.cpp chihiro.cpp exidyttl.cpp fidelz80.cpp goldnpkr.cpp goldstar.cpp model3.cpp namcos23.cpp naomi.cpp pse.cpp psikyo.cpp psikyosh.cpp shadfrce.cpp ssem.cpp taitottl.cpp
[src/mame/includes]	amstrad.h bbc.h chihiro.h fidelz80.h shadfrce.h
[src/mame/layout]	cmpacman.lay
[src/mame/machine]	bbc.cpp c65_old.cpp dc.cpp naomim2.cpp xbox.cpp
[src/mame/video]	bbc.cpp chihiro.cpp shadfrce.cpp
[src/osd]	strconv.cpp
[src/osd/modules/debugger]	debugint.cpp debugwin.cpp
[src/osd/modules/debugger/win]	consolewininfo.cpp debugviewinfo.cpp debugwininfo.cpp disasmwininfo.cpp logwininfo.cpp memorywininfo.cpp pointswininfo.cpp uimetrics.cpp
[src/osd/modules/font]	font_none.cpp font_windows.cpp
[src/osd/modules/midi]	none.cpp portmidi.cpp
[src/osd/modules/netdev]	pcap.cpp
[src/osd/modules/render]	drawd3d.cpp drawdd.cpp drawnone.cpp drawogl.cpp
[src/osd/modules/render/d3d]	d3d9intf.cpp d3dhlsl.cpp d3dhlsl.h
[src/osd/modules/sound]	direct_sound.cpp
[src/osd/modules/sync]	work_osd.cpp
[src/osd/sdl]	sdldir.cpp sdlfile.cpp sdlptty_unix.cpp sdlptty_win32.cpp sdlsocket.cpp
[src/osd/windows]	input.cpp output.cpp video.cpp winclip.cpp window.cpp winfile.cpp winmain.cpp winsocket.cpp winutf8.cpp winutil.cpp

trunk/3rdparty/bx/include/bx/os.h

r250251	r250252
15	15	#elif  BX_PLATFORM_ANDROID \
16	16	|| BX_PLATFORM_EMSCRIPTEN \
17	17	|| BX_PLATFORM_FREEBSD \
	18	|| BX_PLATFORM_NETBSD \
18	19	|| BX_PLATFORM_IOS \
19	20	|| BX_PLATFORM_LINUX \
20	21	|| BX_PLATFORM_NACL \
r250251	r250252
24	25
25	26	#   include <sched.h> // sched_yield
26	27	#   if BX_PLATFORM_FREEBSD \
	28	|| BX_PLATFORM_NETBSD \
27	29	|| BX_PLATFORM_IOS \
28	30	|| BX_PLATFORM_NACL \
29	31	|| BX_PLATFORM_OSX \
r250251	r250252
103	105	return (pid_t)::syscall(SYS_gettid);
104	106	#elif BX_PLATFORM_IOS || BX_PLATFORM_OSX
105	107	return (mach_port_t)::pthread_mach_thread_np(pthread_self() );
106		#elif BX_PLATFORM_FREEBSD || BX_PLATFORM_NACL
	108	#elif BX_PLATFORM_FREEBSD || BX_PLATFORM_NACL || BX_PLATFORM_NETBSD
107	109	// Casting __nc_basic_thread_data*... need better way to do this.
108	110	return *(uint32_t*)::pthread_self();
109	111	#else

trunk/3rdparty/bx/include/bx/platform.h

r250251	r250252
15	15	#define BX_PLATFORM_ANDROID    0
16	16	#define BX_PLATFORM_EMSCRIPTEN 0
17	17	#define BX_PLATFORM_FREEBSD    0
	18	#define BX_PLATFORM_NETBSD     0
18	19	#define BX_PLATFORM_IOS        0
19	20	#define BX_PLATFORM_LINUX      0
20	21	#define BX_PLATFORM_NACL       0
r250251	r250252
187	188	#elif defined(__FreeBSD__)
188	189	#   undef  BX_PLATFORM_FREEBSD
189	190	#   define BX_PLATFORM_FREEBSD 1
	191	#elif defined(__NetBSD__)
	192	#   undef  BX_PLATFORM_NETBSD
	193	#   define BX_PLATFORM_NETBSD 1
190	194	#else
191	195	#   error "BX_PLATFORM_* is not defined!"
192	196	#endif //
r250251	r250252
195	199	|| BX_PLATFORM_ANDROID \
196	200	|| BX_PLATFORM_EMSCRIPTEN \
197	201	|| BX_PLATFORM_FREEBSD \
	202	|| BX_PLATFORM_NETBSD \
198	203	|| BX_PLATFORM_IOS \
199	204	|| BX_PLATFORM_LINUX \
200	205	|| BX_PLATFORM_NACL \
r250251	r250252
244	249	BX_STRINGIZE(__EMSCRIPTEN_tiny__)
245	250	#elif BX_PLATFORM_FREEBSD
246	251	#   define BX_PLATFORM_NAME "FreeBSD"
	252	#elif BX_PLATFORM_NETBSD
	253	#   define BX_PLATFORM_NAME "NetBSD"
247	254	#elif BX_PLATFORM_IOS
248	255	#   define BX_PLATFORM_NAME "iOS"
249	256	#elif BX_PLATFORM_LINUX

trunk/3rdparty/genie/build/gmake.bsd/genie.make

r250251	r250252
56	56	$(OBJDIR)/src/host/os_chdir.o \
57	57	$(OBJDIR)/src/host/os_copyfile.o \
58	58	$(OBJDIR)/src/host/os_getcwd.o \
59		$(OBJDIR)/src/host/os_getversion.o \
60	59	$(OBJDIR)/src/host/os_is64bit.o \
61	60	$(OBJDIR)/src/host/os_isdir.o \
62	61	$(OBJDIR)/src/host/os_isfile.o \
r250251	r250252
134	133	$(OBJDIR)/src/host/os_chdir.o \
135	134	$(OBJDIR)/src/host/os_copyfile.o \
136	135	$(OBJDIR)/src/host/os_getcwd.o \
137		$(OBJDIR)/src/host/os_getversion.o \
138	136	$(OBJDIR)/src/host/os_is64bit.o \
139	137	$(OBJDIR)/src/host/os_isdir.o \
140	138	$(OBJDIR)/src/host/os_isfile.o \
r250251	r250252
252	250	@echo $(notdir $<)
253	251	$(SILENT) $(CC) $(ALL_CFLAGS) $(FORCE_INCLUDE) -o "$@" -MF $(@:%.o=%.d) -c "$<"
254	252
255		$(OBJDIR)/src/host/os_getversion.o: ../../src/host/os_getversion.c
256		@echo $(notdir $<)
257		$(SILENT) $(CC) $(ALL_CFLAGS) $(FORCE_INCLUDE) -o "$@" -MF $(@:%.o=%.d) -c "$<"
258
259	253	$(OBJDIR)/src/host/os_is64bit.o: ../../src/host/os_is64bit.c
260	254	@echo $(notdir $<)
261	255	$(SILENT) $(CC) $(ALL_CFLAGS) $(FORCE_INCLUDE) -o "$@" -MF $(@:%.o=%.d) -c "$<"

trunk/3rdparty/genie/build/gmake.solaris/genie.make

r250251	r250252
56	56	$(OBJDIR)/src/host/os_chdir.o \
57	57	$(OBJDIR)/src/host/os_copyfile.o \
58	58	$(OBJDIR)/src/host/os_getcwd.o \
59		$(OBJDIR)/src/host/os_getversion.o \
60	59	$(OBJDIR)/src/host/os_is64bit.o \
61	60	$(OBJDIR)/src/host/os_isdir.o \
62	61	$(OBJDIR)/src/host/os_isfile.o \
r250251	r250252
134	133	$(OBJDIR)/src/host/os_chdir.o \
135	134	$(OBJDIR)/src/host/os_copyfile.o \
136	135	$(OBJDIR)/src/host/os_getcwd.o \
137		$(OBJDIR)/src/host/os_getversion.o \
138	136	$(OBJDIR)/src/host/os_is64bit.o \
139	137	$(OBJDIR)/src/host/os_isdir.o \
140	138	$(OBJDIR)/src/host/os_isfile.o \
r250251	r250252
252	250	@echo $(notdir $<)
253	251	$(SILENT) $(CC) $(ALL_CFLAGS) $(FORCE_INCLUDE) -o "$@" -MF $(@:%.o=%.d) -c "$<"
254	252
255		$(OBJDIR)/src/host/os_getversion.o: ../../src/host/os_getversion.c
256		@echo $(notdir $<)
257		$(SILENT) $(CC) $(ALL_CFLAGS) $(FORCE_INCLUDE) -o "$@" -MF $(@:%.o=%.d) -c "$<"
258
259	253	$(OBJDIR)/src/host/os_is64bit.o: ../../src/host/os_is64bit.c
260	254	@echo $(notdir $<)
261	255	$(SILENT) $(CC) $(ALL_CFLAGS) $(FORCE_INCLUDE) -o "$@" -MF $(@:%.o=%.d) -c "$<"

trunk/3rdparty/genie/src/actions/cmake/cmake_project.lua

r250251	r250252
42	42	for _,v in ipairs(cfg.includedirs) do
43	43	_p('include_directories(../%s)', premake.esc(v))
44	44	end
	45	for _,v in ipairs(cfg.defines) do
	46	_p('add_definitions(-D%s)', premake.esc(v))
	47	end
	48	break
45	49	end
	50	break
46	51	end
47	52
48	53	if (prj.kind=='StaticLib') then

trunk/3rdparty/genie/src/host/scripts.c

r250251	r250252
176	176	"function premake.cmake.workspace(sln)\n_p('cmake_minimum_required(VERSION 2.8.4)')\n_p('')\nfor i,prj in ipairs(sln.projects) do\nlocal name = premake.esc(prj.name)\n_p('add_subdirectory(%s)', name)\nend\nend\n",
177	177
178	178	/* actions/cmake/cmake_project.lua */
179		"local cmake = premake.cmake\nlocal tree = premake.tree\nfunction cmake.files(prj)\nlocal tr = premake.project.buildsourcetree(prj)\ntree.traverse(tr, {\nonbranchenter = function(node, depth)\nend,\nonbranchexit = function(node, depth)\nend,\nonleaf = function(node, depth)\n_p(1, '../%s', node.cfg.name)\nend,\n}, true, 1)\nend\nfunction premake.cmake.project(prj)\nio.indent = \"  \"\n_p('cmake_minimum_required(VERSION 2.8.4)')\n_p('')\n_p('project(%s)', premake.esc(prj.name))\n_p('set(')\n_p('source_list')\ncmake.files(prj)\n_p(')')\nlocal platforms = premake.filterplatforms(prj.solution, premake[_OPTIONS.cc].platforms, \"Native\")\nfor i = #platforms, 1, -1 do\nif premake.platforms[platforms[i]].iscrosscompiler then\ntable.remove(platforms, i)\nend\nend \nfor _, platform in ipairs(platforms) do\nfor cfg in premake.eachconfig(prj, platform) do\nfor _,v in ipairs(cfg.includedirs) do\n_p('include_directories(../%s)', premake.esc(v))\nend\nend\nend\nif (prj.kind=='StaticLib') then\n_p('add_library(%s STATIC ${sour"
180		"ce_list})',premake.esc(prj.name))\nend\nif (prj.kind=='SharedLib') then\n_p('add_library(%s SHARED ${source_list})',premake.esc(prj.name))\nend\nif (prj.kind=='ConsoleApp') then\n_p('add_executable(%s ${source_list})',premake.esc(prj.name))\nend\nif (prj.kind=='WindowedApp') then\n_p('add_executable(%s ${source_list})',premake.esc(prj.name))\nend\nend\n",
	179	"local cmake = premake.cmake\nlocal tree = premake.tree\nfunction cmake.files(prj)\nlocal tr = premake.project.buildsourcetree(prj)\ntree.traverse(tr, {\nonbranchenter = function(node, depth)\nend,\nonbranchexit = function(node, depth)\nend,\nonleaf = function(node, depth)\n_p(1, '../%s', node.cfg.name)\nend,\n}, true, 1)\nend\nfunction premake.cmake.project(prj)\nio.indent = \"  \"\n_p('cmake_minimum_required(VERSION 2.8.4)')\n_p('')\n_p('project(%s)', premake.esc(prj.name))\n_p('set(')\n_p('source_list')\ncmake.files(prj)\n_p(')')\nlocal platforms = premake.filterplatforms(prj.solution, premake[_OPTIONS.cc].platforms, \"Native\")\nfor i = #platforms, 1, -1 do\nif premake.platforms[platforms[i]].iscrosscompiler then\ntable.remove(platforms, i)\nend\nend \nfor _, platform in ipairs(platforms) do\nfor cfg in premake.eachconfig(prj, platform) do\nfor _,v in ipairs(cfg.includedirs) do\n_p('include_directories(../%s)', premake.esc(v))\nend\nfor _,v in ipairs(cfg.defines) do\n_p('add_definitions(-D%s)', premake.esc("
	180	"v))\nend\nbreak\nend\nbreak\nend\nif (prj.kind=='StaticLib') then\n_p('add_library(%s STATIC ${source_list})',premake.esc(prj.name))\nend\nif (prj.kind=='SharedLib') then\n_p('add_library(%s SHARED ${source_list})',premake.esc(prj.name))\nend\nif (prj.kind=='ConsoleApp') then\n_p('add_executable(%s ${source_list})',premake.esc(prj.name))\nend\nif (prj.kind=='WindowedApp') then\n_p('add_executable(%s ${source_list})',premake.esc(prj.name))\nend\nend\n",
181	181
182	182	/* actions/make/_make.lua */
183	183	"_MAKE = { }\npremake.make = { }\nlocal make = premake.make\nfunction _MAKE.esc(value)\nlocal result\nif (type(value) == \"table\") then\nresult = { }\nfor _,v in ipairs(value) do\ntable.insert(result, _MAKE.esc(v))\nend\nreturn result\nelse\nresult = value:gsub(\"\\\\\", \"\\\\\\\\\")\nresult = result:gsub(\" \", \"\\\\ \")\nresult = result:gsub(\"%%(\", \"\\\\%(\")\nresult = result:gsub(\"%%)\", \"\\\\%)\")\nresult = result:gsub(\"$\\\\%((.-)\\\\%)\", \"$%(%1%)\")\nreturn result\nend\nend\nfunction premake.make_copyrule(source, target)\n_p('%s: %s', target, source)\n_p('\\t@echo Copying $(notdir %s)', target)\n_p('\\t-$(call COPY,%s,%s)', source, target)\nend\nfunction premake.make_mkdirrule(var)\n_p('\\t@echo Creating %s', var)\n_p('\\t-$(call MKDIR,%s)', var)\n_p('')\nend\nfunction make.list(value)\nif #value > 0 then\nreturn \" \" .. table.concat(value, \" \")\nelse\nreturn \"\"\nend\nend\nfunction _MAKE.getmakefilename(this, searchprjs)\nlocal count = 0\nfor sln in premake.solution.each() do\nif (sln.loca"

trunk/hash/bbc_32016_flop.xml

r250251	r250252
1	1	<?xml version="1.0" encoding="UTF-8"?>
2	2	<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
3	3
4		<!-- Acorn Cambridge Workstation Disks -->
	4	<!-- BBC Micro - 32016 Co-Processor Discs -->
5	5
6	6	<!-- Loading Instructions:
7	7
8	8	Hold down the SHIFT key and press and release the BREAK key.
9	9	-->
10	10
11		<softwarelist name="bbc_32016_flop" description="Cambridge Workstation Distribution Discs">
	11	<softwarelist name="bbc_32016_flop" description="32016 Co-Processor Discs">
12	12
13		<software name="panos111" supported="no">
14		<description>1 PanOS Startup and Utilities v1.1</description>
	13	<software name="panos11" cloneof="panos14" supported="no">
	14	<description>PanOS Version 1.10 System Disks</description>
15	15	<year>1985</year>
16	16	<publisher>Acorn Computers</publisher>
17	17	<info name="format" value="DFS" />
18	18	<info name="compatibility" value="32016 co-processor" />
19	19	<part name="flop1" interface="floppy_5_25">
	20	<feature name="part_id" value="PanOS Startup and Utilities"/>
20	21	<dataarea name="flop" size="407552">
21	22	<rom name="panos11-1.ssd" size="407552" crc="bec45a4d" sha1="4634c4bc7fc62576a0cfe2ac43d75abfca7458fc" offset="0" />
22	23	</dataarea>
23	24	</part>
24		</software>
25
26		<software name="panos112" supported="no">
27		<description>2 PanOS System v1.1</description>
28		<year>1985</year>
29		<publisher>Acorn Computers</publisher>
30		<info name="format" value="DFS" />
31		<info name="compatibility" value="32016 co-processor" />
32		<part name="flop1" interface="floppy_5_25">
	25	<part name="flop2" interface="floppy_5_25">
	26	<feature name="part_id" value="PanOS System"/>
33	27	<dataarea name="flop" size="245760">
34	28	<rom name="panos11-2.ssd" size="245760" crc="e80fb7c4" sha1="41cd9b89a0b3e844f22b2afc7ff4acc52ae7d70c" offset="0" />
35	29	</dataarea>
36	30	</part>
37		</software>
38
39		<software name="panos113" supported="no">
40		<description>3 FORTRAN 77 (PanOS) v1.1</description>
41		<year>1985</year>
42		<publisher>Acorn Computers</publisher>
43		<info name="format" value="DFS" />
44		<info name="compatibility" value="32016 co-processor" />
45		<part name="flop1" interface="floppy_5_25">
	31	<part name="flop3" interface="floppy_5_25">
	32	<feature name="part_id" value="FORTRAN 77 (PanOS)"/>
46	33	<dataarea name="flop" size="309760">
47	34	<rom name="panos11-3.ssd" size="309760" crc="43841e68" sha1="99afc53f9964f825f0361bbe5f9c228e4a24fa9c" offset="0" />
48	35	</dataarea>
49	36	</part>
50		</software>
51
52		<software name="panos114" supported="no">
53		<description>4 ISO PASCAL (PanOS) v1.1</description>
54		<year>1985</year>
55		<publisher>Acorn Computers</publisher>
56		<info name="format" value="DFS" />
57		<info name="compatibility" value="32016 co-processor" />
58		<part name="flop1" interface="floppy_5_25">
	37	<part name="flop4" interface="floppy_5_25">
	38	<feature name="part_id" value="ISO PASCAL (PanOS)"/>
59	39	<dataarea name="flop" size="360960">
60	40	<rom name="panos11-4.ssd" size="360960" crc="634a61a5" sha1="232f80862d038f3932a8333bd3690e2e7f0aa25c" offset="0" />
61	41	</dataarea>
62	42	</part>
63		</software>
64
65		<software name="panos115" supported="no">
66		<description>5 C (PanOS) v1.1</description>
67		<year>1985</year>
68		<publisher>Acorn Computers</publisher>
69		<info name="format" value="DFS" />
70		<info name="compatibility" value="32016 co-processor" />
71		<part name="flop1" interface="floppy_5_25">
	43	<part name="flop5" interface="floppy_5_25">
	44	<feature name="part_id" value="C (PanOS)"/>
72	45	<dataarea name="flop" size="401664">
73	46	<rom name="panos11-5.ssd" size="401664" crc="99c7c7ad" sha1="bf5d4cece6673a04c634ea59af19cad3ed74e58b" offset="0" />
74	47	</dataarea>
75	48	</part>
76		</software>
77
78		<software name="panos116" supported="no">
79		<description>6 Cambridge LISP (PanOS) v1.1</description>
80		<year>1985</year>
81		<publisher>Acorn Computers</publisher>
82		<info name="format" value="DFS" />
83		<info name="compatibility" value="32016 co-processor" />
84		<part name="flop1" interface="floppy_5_25">
	49	<part name="flop6" interface="floppy_5_25">
	50	<feature name="part_id" value="Cambridge LISP (PanOS)"/>
85	51	<dataarea name="flop" size="409600">
86	52	<rom name="panos11-6.ssd" size="409600" crc="e125d3c1" sha1="35f3cb89abc909e0d6787ffa2e727f0f4b1937b9" offset="0" />
87	53	</dataarea>
88	54	</part>
89		</software>
90
91		<software name="panos117" supported="no">
92		<description>7 Welcome Programs v1.1</description>
93		<year>1985</year>
94		<publisher>Acorn Computers</publisher>
95		<info name="format" value="DFS" />
96		<info name="compatibility" value="32016 co-processor" />
97		<part name="flop1" interface="floppy_5_25">
	55	<part name="flop7" interface="floppy_5_25">
	56	<feature name="part_id" value="Welcome Programs"/>
98	57	<dataarea name="flop" size="377344">
99	58	<rom name="panos11-7.ssd" size="377344" crc="baa462ea" sha1="22cab34f8f51b13a3995db63a83354097c0a613e" offset="0" />
100	59	</dataarea>
101	60	</part>
102	61	</software>
103	62
104		<software name="panos141" supported="no">
105		<description>1 PanOS Startup and Utilities v1.4</description>
	63	<software name="panos14" supported="no">
	64	<description>PanOS Version 1.40 System Disks</description>
106	65	<year>1985</year>
107	66	<publisher>Acorn Computers</publisher>
108	67	<info name="format" value="DFS" />
109	68	<info name="compatibility" value="32016 co-processor" />
110	69	<part name="flop1" interface="floppy_5_25">
	70	<feature name="part_id" value="PanOS Startup and Utilities"/>
111	71	<dataarea name="flop" size="384768">
112	72	<rom name="panos14-1.ssd" size="384768" crc="eed42267" sha1="55a8a650ad214e2c623f6c0a2639acc96cd264cf" offset="0" />
113	73	</dataarea>
114	74	</part>
115		</software>
116
117		<software name="panos142" supported="no">
118		<description>2 PanOS System v1.4</description>
119		<year>1985</year>
120		<publisher>Acorn Computers</publisher>
121		<info name="format" value="DFS" />
122		<info name="compatibility" value="32016 co-processor" />
123		<part name="flop1" interface="floppy_5_25">
	75	<part name="flop2" interface="floppy_5_25">
	76	<feature name="part_id" value="PanOS System"/>
124	77	<dataarea name="flop" size="205060">
125	78	<rom name="panos14-2.ssd" size="205060" crc="5f0b7639" sha1="4bd9e7ee5db79f4c0f3608b7d2b9b5437aae356d" offset="0" />
126	79	</dataarea>
127	80	</part>
128		</software>
129
130		<software name="panos143" supported="no">
131		<description>3 FORTRAN 77 (PanOS) v1.4</description>
132		<year>1985</year>
133		<publisher>Acorn Computers</publisher>
134		<info name="format" value="DFS" />
135		<info name="compatibility" value="32016 co-processor" />
136		<part name="flop1" interface="floppy_5_25">
	81	<part name="flop3" interface="floppy_5_25">
	82	<feature name="part_id" value="FORTRAN 77 (PanOS)"/>
137	83	<dataarea name="flop" size="290304">
138	84	<rom name="panos14-3.ssd" size="290304" crc="5b28d9e4" sha1="e8503acb278259483bcb82697c3a8006be09ce42" offset="0" />
139	85	</dataarea>
140	86	</part>
141		</software>
142
143		<software name="panos144" supported="no">
144		<description>4 ISO PASCAL (PanOS) v1.4</description>
145		<year>1985</year>
146		<publisher>Acorn Computers</publisher>
147		<info name="format" value="DFS" />
148		<info name="compatibility" value="32016 co-processor" />
149		<part name="flop1" interface="floppy_5_25">
	87	<part name="flop4" interface="floppy_5_25">
	88	<feature name="part_id" value="ISO PASCAL (PanOS)"/>
150	89	<dataarea name="flop" size="378624">
151	90	<rom name="panos14-4.ssd" size="378624" crc="62fc2639" sha1="f2ceeccb021f4c5030150244fb47897cc7e63f80" offset="0" />
152	91	</dataarea>
153	92	</part>
154		</software>
155
156		<software name="panos145" supported="no">
157		<description>5 C (PanOS) v1.4</description>
158		<year>1985</year>
159		<publisher>Acorn Computers</publisher>
160		<info name="format" value="DFS" />
161		<info name="compatibility" value="32016 co-processor" />
162		<part name="flop1" interface="floppy_5_25">
	93	<part name="flop5" interface="floppy_5_25">
	94	<feature name="part_id" value="C (PanOS)"/>
163	95	<dataarea name="flop" size="378624">
164	96	<rom name="panos14-5.ssd" size="378624" crc="2f0940f6" sha1="873942b6033fd234db791b34d4df76a866f366b7" offset="0" />
165	97	</dataarea>
166	98	</part>
167		</software>
168
169		<software name="panos146" supported="no">
170		<description>6 Cambridge LISP (PanOS) v1.4</description>
171		<year>1985</year>
172		<publisher>Acorn Computers</publisher>
173		<info name="format" value="DFS" />
174		<info name="compatibility" value="32016 co-processor" />
175		<part name="flop1" interface="floppy_5_25">
	99	<part name="flop6" interface="floppy_5_25">
	100	<feature name="part_id" value="Cambridge LISP (PanOS)"/>
176	101	<dataarea name="flop" size="409088">
177	102	<rom name="panos14-6.ssd" size="409088" crc="5337964d" sha1="bfecd5cada401d6dfeb410ebc17fb62333f19bbc" offset="0" />
178	103	</dataarea>
179	104	</part>
180		</software>
181
182		<software name="panos147" supported="no">
183		<description>7 Welcome Programs v1.4</description>
184		<year>1985</year>
185		<publisher>Acorn Computers</publisher>
186		<info name="format" value="DFS" />
187		<info name="compatibility" value="32016 co-processor" />
188		<part name="flop1" interface="floppy_5_25">
	105	<part name="flop7" interface="floppy_5_25">
	106	<feature name="part_id" value="Welcome Programs"/>
189	107	<dataarea name="flop" size="402176">
190	108	<rom name="panos14-7.ssd" size="402176" crc="2e5e4fe4" sha1="f69687efea606468a72ed1363f6eab0ce8203f6b" offset="0" />
191	109	</dataarea>

trunk/hash/bbc_65c102_flop.xml

r250251	r250252
1	1	<?xml version="1.0" encoding="UTF-8"?>
2	2	<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
3	3
4		<!-- BBC Master 65C102 Co-Processor Support Disc -->
	4	<!-- BBC Micro - 65C102 Co-Processor Discs -->
5	5
6	6	<!-- Loading Instructions:
7	7
8	8	Hold down the SHIFT key and press and release the BREAK key.
9	9	-->
10	10
11		<softwarelist name="bbc_65c102_flop" description="BBC Master 65C102 Co-Processor Support Disc">
	11	<softwarelist name="bbc_65c102_flop" description="65C102 Co-Processor Discs">
12	12
13	13	<software name="coprosup" supported="no">
14		<description>65C102 Co-Processor Support Disc</description>
	14	<description>BBC Master 65C102 Co-Processor Support Disc</description>
15	15	<year>1983</year>
16	16	<publisher>Acorn Computers</publisher>
17	17	<info name="format" value="DFS" />

trunk/hash/bbc_68000_flop.xml

r0	r250252
	1	<?xml version="1.0" encoding="UTF-8"?>
	2	<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
	3
	4	<!-- BBC Micro - 68000 Co-Processor Discs -->
	5
	6	<!-- Loading Instructions:
	7
	8	Hold down the SHIFT key and press and release the BREAK key.
	9	-->
	10
	11	<softwarelist name="bbc_68000_flop" description="68000 Co-Processor Discs">
	12
	13	<software name="casper" supported="no">
	14	<description>Casper Support Discs</description>
	15	<year>1986</year>
	16	<publisher>Delcomm</publisher>
	17	<info name="format" value="DFS" />
	18	<info name="compatibility" value="68000 co-processor" />
	19	<part name="flop1" interface="floppy_5_25">
	20	<feature name="part_id" value="Casper Control C Version 0.1"/>
	21	<dataarea name="flop" size="204800">
	22	<rom name="casper control c version 0_1.ssd" size="204800" crc="f92958ef" sha1="3b68a54befb002e26c7a30a1d8f42dfae2b2f501" offset="0" />
	23	</dataarea>
	24	</part>
	25	<part name="flop2" interface="floppy_5_25">
	26	<feature name="part_id" value="Casper System Disc Version 2.2"/>
	27	<dataarea name="flop" size="204800">
	28	<rom name="casper system disc version 2_2.ssd" size="204800" crc="fa48e7e1" sha1="a3dffefdc13e4a44ec4e57b1cad27e912abdcd15" offset="0" />
	29	</dataarea>
	30	</part>
	31	<part name="flop3" interface="floppy_5_25">
	32	<feature name="part_id" value="Casper Test Disc Version 2.2"/>
	33	<dataarea name="flop" size="204800">
	34	<rom name="casper test disc version 2_2.ssd" size="204800" crc="67c43659" sha1="83b0361ab7908584aaedb9f5a42e9cf5c3cc6c1d" offset="0" />
	35	</dataarea>
	36	</part>
	37	</software>
	38
	39	</softwarelist>

trunk/hash/bbc_80186_flop.xml

r250251	r250252
1	1	<?xml version="1.0" encoding="UTF-8"?>
2	2	<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
3	3
4		<!-- BBC Master 512 System Discs -->
	4	<!-- BBC Micro - 80186 Co-Processor Discs -->
5	5
6	6	<!-- Loading Instructions:
7	7
8	8	Hold down the SHIFT key and press and release the BREAK key.
9	9	-->
10	10
11		<softwarelist name="bbc_80186_flop" description="BBC Master 512 System Discs">
	11	<softwarelist name="bbc_80186_flop" description="80186 Co-Processor Discs">
12	12
13		<software name="dosboot" supported="no">
14		<description>512 Disc 1 DOS Plus Boot v2.1</description>
	13	<software name="m512sys" supported="no">
	14	<description>BBC Master 512 System Discs</description>
15	15	<year>1986</year>
16	16	<publisher>Acorn Computers</publisher>
17	17	<info name="format" value="ADFS-DOS" />
18	18	<info name="compatibility" value="80186 co-processor" />
19	19	<part name="flop1" interface="floppy_5_25">
	20	<feature name="part_id" value="DOS Plus Boot v2.1"/>
20	21	<dataarea name="flop" size="655360">
21	22	<rom name="bbcmaster512-disc1-dosplusboot-v2.1.adl" size="655360" crc="7805045c" sha1="89ad16c97842f94809cf05eb9b079867944ca8d8" offset="0" />
22	23	</dataarea>
23	24	</part>
24		</software>
25
26		<software name="dosboot12a"  cloneof="dosboot" supported="no">
27		<description>512 Disc 1 DOS Plus Boot v1.2a</description>
28		<year>1986</year>
29		<publisher>Acorn Computers</publisher>
30		<info name="format" value="ADFS-DOS" />
31		<info name="compatibility" value="80186 co-processor" />
32		<part name="flop1" interface="floppy_5_25">
	25	<part name="flop2" interface="floppy_5_25">
	26	<feature name="part_id" value="DOS Plus Boot v1.2a"/>
33	27	<dataarea name="flop" size="655360">
34	28	<rom name="bbcmaster512-disc1-dosplusboot-v1.2a.adl" size="655360" crc="264fff88" sha1="7d3386e117b96cc08e78d80ba0d226821e945eac" offset="0" />
35	29	</dataarea>
36	30	</part>
37		</software>
38
39		<software name="dosboot12"  cloneof="dosboot" supported="no">
40		<description>512 Disc 1 DOS Plus Boot v1.2</description>
41		<year>1986</year>
42		<publisher>Acorn Computers</publisher>
43		<info name="format" value="ADFS-DOS" />
44		<info name="compatibility" value="80186 co-processor" />
45		<part name="flop1" interface="floppy_5_25">
	31	<part name="flop3" interface="floppy_5_25">
	32	<feature name="part_id" value="DOS Plus Boot v1.2"/>
46	33	<dataarea name="flop" size="655360">
47	34	<rom name="bbcmaster512-disc1-dosplusboot-v1.2.adl" size="655360" crc="c2677483" sha1="2df6155aecfd4fc9595cd95359b153d158c313a3" offset="0" />
48	35	</dataarea>
49	36	</part>
50		</software>
51
52		<software name="gemapps" supported="no">
53		<description>512 Disc 2 GEM Applications</description>
54		<year>1986</year>
55		<publisher>Acorn Computers</publisher>
56		<info name="format" value="DOS+" />
57		<info name="compatibility" value="80186 co-processor" />
58		<part name="flop1" interface="floppy_5_25">
	37	<part name="flop4" interface="floppy_5_25">
	38	<feature name="part_id" value="GEM Applications"/>
59	39	<dataarea name="flop" size="819200">
60	40	<rom name="bbcmaster512-disc2-gemapplications.img" size="819200" crc="68b1cdfe" sha1="0fd737ab5c8499727e6ec3711e59566e702244e7" offset="0" />
61	41	</dataarea>
62	42	</part>
63		</software>
64
65		<software name="gemdata" supported="no">
66		<description>512 Disc 3 GEM Data</description>
67		<year>1986</year>
68		<publisher>Acorn Computers</publisher>
69		<info name="format" value="DOS+" />
70		<info name="compatibility" value="80186 co-processor" />
71		<part name="flop1" interface="floppy_5_25">
	43	<part name="flop5" interface="floppy_5_25">
	44	<feature name="part_id" value="GEM Data"/>
72	45	<dataarea name="flop" size="819200">
73	46	<rom name="bbcmaster512-disc3-gemdata.img" size="819200" crc="b463f444" sha1="e80911c292aba1b601507c75d9233a79887e3b51" offset="0" />
74	47	</dataarea>
75	48	</part>
76		</software>
77
78		<software name="misc" supported="no">
79		<description>512 Disc 4 Miscellaneous</description>
80		<year>1986</year>
81		<publisher>Acorn Computers</publisher>
82		<info name="format" value="DOS+" />
83		<info name="compatibility" value="80186 co-processor" />
84		<part name="flop1" interface="floppy_5_25">
	49	<part name="flop6" interface="floppy_5_25">
	50	<feature name="part_id" value="Miscellaneous"/>
85	51	<dataarea name="flop" size="819200">
86	52	<rom name="bbcmaster512-disc4-miscellaneous.img" size="819200" crc="2de63513" sha1="e6718419d4d6f6a834653655f6334667b5c4c355" offset="0" />
87	53	</dataarea>
88	54	</part>
89	55	</software>
90	56
91		<software name="dabs11" supported="no">
92		<description>Dabs Shareware Vol.1 Disc 1</description>
93		<year>19??</year>
	57	<software name="dabs1" supported="no">
	58	<description>Dabs Shareware Vol.1</description>
	59	<year>1988</year>
94	60	<publisher>Dabs Press</publisher>
95	61	<info name="format" value="DOS+" />
96	62	<info name="compatibility" value="80186 co-processor" />
97	63	<part name="flop1" interface="floppy_5_25">
	64	<feature name="part_id" value="Disc 1 - Word Processing"/>
98	65	<dataarea name="flop" size="819200">
99	66	<rom name="dabs-shareware-vol1-disc1.img" size="819200" crc="767569f6" sha1="103718d7410cf635eb56010fa6204012fcddb719" offset="0" />
100	67	</dataarea>
101	68	</part>
102		</software>
103
104		<software name="dabs12" supported="no">
105		<description>Dabs Shareware Vol.1 Disc 2</description>
106		<year>19??</year>
107		<publisher>Dabs Press</publisher>
108		<info name="format" value="DOS+" />
109		<info name="compatibility" value="80186 co-processor" />
110		<part name="flop1" interface="floppy_5_25">
	69	<part name="flop2" interface="floppy_5_25">
	70	<feature name="part_id" value="Disc 2 - Business"/>
111	71	<dataarea name="flop" size="819200">
112	72	<rom name="dabs-shareware-vol1-disc2.img" size="819200" crc="011ac2db" sha1="8dc11173655864c6a1d37251bc88f512ba43a09c" offset="0" />
113	73	</dataarea>
114	74	</part>
115		</software>
116
117		<software name="dabs13" supported="no">
118		<description>Dabs Shareware Vol.1 Disc 3</description>
119		<year>19??</year>
120		<publisher>Dabs Press</publisher>
121		<info name="format" value="DOS+" />
122		<info name="compatibility" value="80186 co-processor" />
123		<part name="flop1" interface="floppy_5_25">
	75	<part name="flop3" interface="floppy_5_25">
	76	<feature name="part_id" value="Disc 3 - Games"/>
124	77	<dataarea name="flop" size="819200">
125	78	<rom name="dabs-shareware-vol1-disc3.img" size="819200" crc="531d3a4b" sha1="a75dd613f4f5bc096a01e259620d16b154305ba8" offset="0" />
126	79	</dataarea>
127	80	</part>
128		</software>
129
130		<software name="dabs14" supported="no">
131		<description>Dabs Shareware Vol.1 Disc 4</description>
132		<year>19??</year>
133		<publisher>Dabs Press</publisher>
134		<info name="format" value="DOS+" />
135		<info name="compatibility" value="80186 co-processor" />
136		<part name="flop1" interface="floppy_5_25">
	81	<part name="flop4" interface="floppy_5_25">
	82	<feature name="part_id" value="Disc 4 - Printer Programs"/>
137	83	<dataarea name="flop" size="819200">
138	84	<rom name="dabs-shareware-vol1-disc4.img" size="819200" crc="ee1a6961" sha1="c970d723d9b9ee55717928850897d6b21c376c5e" offset="0" />
139	85	</dataarea>
140	86	</part>
141		</software>
142
143		<software name="dabs15" supported="no">
144		<description>Dabs Shareware Vol.1 Disc 5</description>
145		<year>19??</year>
146		<publisher>Dabs Press</publisher>
147		<info name="format" value="DOS+" />
148		<info name="compatibility" value="80186 co-processor" />
149		<part name="flop1" interface="floppy_5_25">
	87	<part name="flop5" interface="floppy_5_25">
	88	<feature name="part_id" value="Disc 5 - Miscellaneous"/>
150	89	<dataarea name="flop" size="819200">
151	90	<rom name="dabs-shareware-vol1-disc5.img" size="819200" crc="4ab201a7" sha1="094d3af950631a803960d19b573be0e65c19158d" offset="0" />
152	91	</dataarea>
153	92	</part>
154	93	</software>
155	94
156		<software name="dabs21" supported="no">
157		<description>Dabs Shareware Vol.2 Disc 1</description>
158		<year>19??</year>
	95	<software name="dabs2" supported="no">
	96	<description>Dabs Shareware Vol.2</description>
	97	<year>1988</year>
159	98	<publisher>Dabs Press</publisher>
160	99	<info name="format" value="DOS+" />
161	100	<info name="compatibility" value="80186 co-processor" />
162	101	<part name="flop1" interface="floppy_5_25">
	102	<feature name="part_id" value="Disc 1"/>
163	103	<dataarea name="flop" size="819200">
164	104	<rom name="dabs-shareware-vol2-disc1.img" size="819200" crc="ba7e3ed4" sha1="b5d649a7bdc4ccd75f99e0636ad0a0b6ec71c4cf" offset="0" />
165	105	</dataarea>
166	106	</part>
167		</software>
168
169		<software name="dabs22" supported="no">
170		<description>Dabs Shareware Vol.2 Disc 2</description>
171		<year>19??</year>
172		<publisher>Dabs Press</publisher>
173		<info name="format" value="DOS+" />
174		<info name="compatibility" value="80186 co-processor" />
175		<part name="flop1" interface="floppy_5_25">
	107	<part name="flop2" interface="floppy_5_25">
	108	<feature name="part_id" value="Disc 2"/>
176	109	<dataarea name="flop" size="819200">
177	110	<rom name="dabs-shareware-vol2-disc2.img" size="819200" crc="b858f06c" sha1="698c6a29fc2f549e8b8ff057e1289c41fc6647e5" offset="0" />
178	111	</dataarea>
179	112	</part>
180		</software>
181
182		<software name="dabs23" supported="no">
183		<description>Dabs Shareware Vol.2 Disc 3</description>
184		<year>19??</year>
185		<publisher>Dabs Press</publisher>
186		<info name="format" value="DOS+" />
187		<info name="compatibility" value="80186 co-processor" />
188		<part name="flop1" interface="floppy_5_25">
	113	<part name="flop3" interface="floppy_5_25">
	114	<feature name="part_id" value="Disc 3"/>
189	115	<dataarea name="flop" size="819200">
190	116	<rom name="dabs-shareware-vol2-disc3.img" size="819200" crc="2f066a93" sha1="7b2c4b4355ba9855f9167e27d9316ed928dae010" offset="0" />
191	117	</dataarea>
192	118	</part>
193		</software>
194
195		<software name="dabs24" supported="no">
196		<description>Dabs Shareware Vol.2 Disc 4</description>
197		<year>19??</year>
198		<publisher>Dabs Press</publisher>
199		<info name="format" value="DOS+" />
200		<info name="compatibility" value="80186 co-processor" />
201		<part name="flop1" interface="floppy_5_25">
	119	<part name="flop4" interface="floppy_5_25">
	120	<feature name="part_id" value="Disc 4"/>
202	121	<dataarea name="flop" size="819200">
203	122	<rom name="dabs-shareware-vol2-disc4.img" size="819200" crc="d507700b" sha1="9d5a75b90eb73387eda913f12dde8cc5cf8c9cab" offset="0" />
204	123	</dataarea>
205	124	</part>
206		</software>
207
208		<software name="dabs25" supported="no">
209		<description>Dabs Shareware Vol.2 Disc 5</description>
210		<year>19??</year>
211		<publisher>Dabs Press</publisher>
212		<info name="format" value="DOS+" />
213		<info name="compatibility" value="80186 co-processor" />
214		<part name="flop1" interface="floppy_5_25">
	125	<part name="flop5" interface="floppy_5_25">
	126	<feature name="part_id" value="Disc 5"/>
215	127	<dataarea name="flop" size="819200">
216	128	<rom name="dabs-shareware-vol2-disc5.img" size="819200" crc="3cfdd202" sha1="e4e8230f29aff2c6bc4a1e218c9be4c9d157fbef" offset="0" />
217	129	</dataarea>
218	130	</part>
219		</software>
220
221		<software name="dabs2b" supported="no">
222		<description>Dabs Shareware Vol.2 Bonus</description>
223		<year>19??</year>
224		<publisher>Dabs Press</publisher>
225		<info name="format" value="DOS+" />
226		<info name="compatibility" value="80186 co-processor" />
227		<part name="flop1" interface="floppy_5_25">
	131	<part name="flop6" interface="floppy_5_25">
	132	<feature name="part_id" value="Bonus"/>
228	133	<dataarea name="flop" size="819200">
229	134	<rom name="dabs-shareware-vol2-bonus.img" size="819200" crc="69b81821" sha1="2977d4628e262907ddf5f5b3ad35abf703092809" offset="0" />
230	135	</dataarea>

trunk/hash/bbc_arm_flop.xml

r250251	r250252
1	1	<?xml version="1.0" encoding="UTF-8"?>
2	2	<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
3	3
4		<!-- ARM Evaluation System Discs -->
	4	<!-- BBC Micro - ARM Co-Processor Discs -->
5	5
6	6	<!-- Loading Instructions:
7	7
8	8	Hold down the SHIFT key and press and release the BREAK key.
9	9	-->
10	10
11		<softwarelist name="bbc_arm_flop" description="ARM Evaluation System Discs">
	11	<softwarelist name="bbc_arm_flop" description="ARM Co-Processor Discs">
12	12
13		<software name="armeval1" supported="no">
14		<description>ARM Evaluation System Disc 1</description>
	13	<software name="armevals" supported="no">
	14	<description>ARM Evaluation System Discs</description>
15	15	<year>1986</year>
16	16	<publisher>Acorn Computers</publisher>
17	17	<info name="format" value="ADFS" />
18	18	<info name="compatibility" value="ARM co-processor" />
19	19	<part name="flop1" interface="floppy_5_25">
	20	<feature name="part_id" value="TWIN and ASSEMBLER"/>
20	21	<dataarea name="flop" size="655360">
21		<rom name="armevaluationsystem-disc1.adl" size="655360" crc="c8d6fd8d" sha1="fad5516b2407279c68bca0d21cda1a5880a22248" offset="0" />
	22	<rom name="armevaluationsystem-disc1.adl" size="655360" crc="82fe3687" sha1="494bf65dcf070a198512115fa42456315a86e535" offset="0" />
22	23	</dataarea>
23	24	</part>
24		</software>
25
26		<software name="armeval2" supported="no">
27		<description>ARM Evaluation System Disc 2</description>
28		<year>1986</year>
29		<publisher>Acorn Computers</publisher>
30		<info name="format" value="ADFS" />
31		<info name="compatibility" value="ARM co-processor" />
32		<part name="flop1" interface="floppy_5_25">
	25	<part name="flop2" interface="floppy_5_25">
	26	<feature name="part_id" value="Utilities 1"/>
33	27	<dataarea name="flop" size="655360">
34		<rom name="armevaluationsystem-disc2.adl" size="655360" crc="5fee623f" sha1="ef084f6bac30471e9cbb06a498901e92b858bffa" offset="0" />
	28	<rom name="armevaluationsystem-disc2.adl" size="655360" crc="600e6976" sha1="f6f29281668e9673da7dee9a4fc9dec2b8c40343" offset="0" />
35	29	</dataarea>
36	30	</part>
37		</software>
38
39		<software name="armeval3" supported="no">
40		<description>ARM Evaluation System Disc 3</description>
41		<year>1986</year>
42		<publisher>Acorn Computers</publisher>
43		<info name="format" value="ADFS" />
44		<info name="compatibility" value="ARM co-processor" />
45		<part name="flop1" interface="floppy_5_25">
	31	<part name="flop3" interface="floppy_5_25">
	32	<feature name="part_id" value="Utilities 2 &amp; BASIC"/>
46	33	<dataarea name="flop" size="655360">
47		<rom name="armevaluationsystem-disc3.adl" size="655360" crc="8511d59e" sha1="be855b2a96c165cf1c76d9128edafb6df5ba47ca" offset="0" />
	34	<rom name="armevaluationsystem-disc3.adl" size="655360" crc="44fa03a3" sha1="f5114ff744f6f742da3959a91a1b98af0bd1db5d" offset="0" />
48	35	</dataarea>
49	36	</part>
50		</software>
51
52		<software name="armeval4" supported="no">
53		<description>ARM Evaluation System Disc 4</description>
54		<year>1986</year>
55		<publisher>Acorn Computers</publisher>
56		<info name="format" value="ADFS" />
57		<info name="compatibility" value="ARM co-processor" />
58		<part name="flop1" interface="floppy_5_25">
	37	<part name="flop4" interface="floppy_5_25">
	38	<feature name="part_id" value="Cambridge LISP"/>
59	39	<dataarea name="flop" size="655360">
60		<rom name="armevaluationsystem-disc4.adl" size="655360" crc="78dce270" sha1="4a6974193c1cefe2b7c21d06be33da9e32eea793" offset="0" />
	40	<rom name="armevaluationsystem-disc4.adl" size="655360" crc="99b8850d" sha1="aba50d169c63088a11e5ef106a86f26dd9e65db3" offset="0" />
61	41	</dataarea>
62	42	</part>
63		</software>
64
65		<software name="armeval5" supported="no">
66		<description>ARM Evaluation System Disc 5</description>
67		<year>1986</year>
68		<publisher>Acorn Computers</publisher>
69		<info name="format" value="ADFS" />
70		<info name="compatibility" value="ARM co-processor" />
71		<part name="flop1" interface="floppy_5_25">
	43	<part name="flop5" interface="floppy_5_25">
	44	<feature name="part_id" value="PROLOG"/>
72	45	<dataarea name="flop" size="655360">
73		<rom name="armevaluationsystem-disc5.adl" size="655360" crc="c77d9325" sha1="9ac7e92916a0f69214208d06ae22a285cf3e46d7" offset="0" />
	46	<rom name="armevaluationsystem-disc5.adl" size="655360" crc="c4756884" sha1="171f86f0c5591a8ee5388e42db76f81d30ab0484" offset="0" />
74	47	</dataarea>
75	48	</part>
	49	<part name="flop6" interface="floppy_5_25">
	50	<feature name="part_id" value="FORTRAN 77"/>
	51	<dataarea name="flop" size="655360">
	52	<rom name="armevaluationsystem-disc6.adl" size="655360" crc="3545ff34" sha1="88a74bfe6eb864574be41e09a6f338f5895bc980" offset="0" />
	53	</dataarea>
	54	</part>
76	55	</software>
77	56
78	57	</softwarelist>

trunk/hash/bbc_z80_flop.xml

r250251	r250252
1	1	<?xml version="1.0" encoding="UTF-8"?>
2	2	<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
3	3
4		<!-- BBC Micro Model B Disks - Z80 co-processor required -->
	4	<!-- BBC Micro - Z80 Co-Processor Discs -->
5	5
6	6	<!-- Loading CP/M:
7	7
8	8	Reset with Z80 co-processor enabled and Acorn CP/M System Disc 1 in drive 0.
9	9	-->
10	10
11		<softwarelist name="bbc_z80_flop" description="BBC Micro Model B disks - Z80">
	11	<softwarelist name="bbc_z80_flop" description="Z80 Co-Processor Discs">
12	12
13		<software name="cpmsys1" supported="no">
14		<description>Acorn CP/M System Disc 1</description>
	13	<software name="cpmsys" supported="no">
	14	<description>Acorn CP/M System Discs</description>
15	15	<year>1984</year>
16	16	<publisher>Acorn</publisher>
17		<info name="serial" value="CP2-884-003481" />
18	17	<info name="format" value="CP/M" />
19	18	<info name="usage" value="Hard reset with Z80 co-processor enabled" />
20	19	<info name="compatibility" value="Z80 co-processor" />
21	20	<part name="flop1" interface="floppy_5_25">
	21	<feature name="part_id" value="Disc 1"/>
22	22	<dataarea name="flop" size="409600">
23	23	<rom name="acorn_cpm_system_disk1.ssd" size="409600" crc="78686d61" sha1="28f33e5e356d307d7e35714b34c18e672aec0031" offset="0" />
24	24	</dataarea>
25	25	</part>
26		</software>
27
28		<software name="cpmsys2" supported="no">
29		<description>Acorn CP/M System Disc 2</description>
30		<year>1984</year>
31		<publisher>Acorn</publisher>
32		<info name="format" value="CP/M" />
33		<info name="compatibility" value="Z80 co-processor" />
34		<part name="flop1" interface="floppy_5_25">
	26	<part name="flop2" interface="floppy_5_25">
	27	<feature name="part_id" value="Disc 2"/>
35	28	<dataarea name="flop" size="409600">
36	29	<rom name="acorn_cpm_system_disk2.ssd" size="409600" crc="afeaa342" sha1="e4b838dae211317c8ccadf47a17fa2ab5aa436a4" offset="0" />
37	30	</dataarea>
38	31	</part>
39		</software>
40
41		<software name="cpmsys3" supported="no">
42		<description>Acorn CP/M System Disc 3</description>
43		<year>1984</year>
44		<publisher>Acorn</publisher>
45		<info name="format" value="CP/M" />
46		<info name="compatibility" value="Z80 co-processor" />
47		<part name="flop1" interface="floppy_5_25">
	32	<part name="flop3" interface="floppy_5_25">
	33	<feature name="part_id" value="Disc 3"/>
48	34	<dataarea name="flop" size="409600">
49	35	<rom name="acorn_cpm_system_disk3.ssd" size="409600" crc="edc26e0e" sha1="7650ecbd02ee0a9f3e986c96719c791db5505de6" offset="0" />
50	36	</dataarea>
51	37	</part>
52		</software>
53
54		<software name="cpmsys4" supported="no">
55		<description>Acorn CP/M System Disc 4</description>
56		<year>1984</year>
57		<publisher>Acorn</publisher>
58		<info name="format" value="CP/M" />
59		<info name="compatibility" value="Z80 co-processor" />
60		<part name="flop1" interface="floppy_5_25">
	38	<part name="flop4" interface="floppy_5_25">
	39	<feature name="part_id" value="Disc 4"/>
61	40	<dataarea name="flop" size="409600">
62	41	<rom name="acorn_cpm_system_disk4.ssd" size="409600" crc="53dbea69" sha1="1ab9fe7f7ea7b69e6dd1a1ebccd24eae9677b749" offset="0" />
63	42	</dataarea>
64	43	</part>
65		</software>
66
67		<software name="cpmsys5" supported="no">
68		<description>Acorn CP/M System Disc 5</description>
69		<year>1984</year>
70		<publisher>Acorn</publisher>
71		<info name="serial" value="A02 AC UK0013257" />
72		<info name="format" value="CP/M" />
73		<info name="compatibility" value="Z80 co-processor" />
74		<part name="flop1" interface="floppy_5_25">
	44	<part name="flop5" interface="floppy_5_25">
	45	<feature name="part_id" value="Disc 5"/>
75	46	<dataarea name="flop" size="409600">
76	47	<rom name="acorn_cpm_system_disk5.ssd" size="409600" crc="cf426f1c" sha1="7e336b8ae82138b7c6e19c59ba20c0664b4c8a77" offset="0" />
77	48	</dataarea>
78	49	</part>
79		</software>
80
81		<software name="cpmsys6" supported="no">
82		<description>Acorn CP/M System Disc 6</description>
83		<year>1984</year>
84		<publisher>Acorn</publisher>
85		<info name="serial" value="A02 AG UK0013440" />
86		<info name="format" value="CP/M" />
87		<info name="compatibility" value="Z80 co-processor" />
88		<part name="flop1" interface="floppy_5_25">
	50	<part name="flop6" interface="floppy_5_25">
	51	<feature name="part_id" value="Disc 6"/>
89	52	<dataarea name="flop" size="409600">
90	53	<rom name="acorn_cpm_system_disk6.ssd" size="409600" crc="03575faa" sha1="f568a23ae3b0d17866f55bf16ca29a351850167c" offset="0" />
91	54	</dataarea>
92	55	</part>
93		</software>
94
95		<software name="cpmsys7" supported="no">
96		<description>Acorn CP/M System Disc 7</description>
97		<year>1984</year>
98		<publisher>Acorn</publisher>
99		<info name="serial" value="BQ03261BC" />
100		<info name="format" value="CP/M" />
101		<info name="compatibility" value="Z80 co-processor" />
102		<part name="flop1" interface="floppy_5_25">
	56	<part name="flop7" interface="floppy_5_25">
	57	<feature name="part_id" value="Disc 7"/>
103	58	<dataarea name="flop" size="409600">
104	59	<rom name="acorn_cpm_system_disk7.ssd" size="409600" crc="8ae52625" sha1="23c102b852eab471a45fac588c8e326cc96e1368" offset="0" />
105	60	</dataarea>
106	61	</part>
107	62	</software>
108	63
109		<software name="cpmutils" supported="no">
110		<description>CP/M Utilities Disc</description>
	64	<software name="cpmprog" supported="no">
	65	<description>Acorn CP/M Program Discs</description>
111	66	<year>1984</year>
112	67	<publisher>Acorn</publisher>
113	68	<info name="format" value="CP/M" />
114	69	<info name="compatibility" value="Z80 co-processor" />
115	70	<part name="flop1" interface="floppy_5_25">
	71	<feature name="part_id" value="CP/M Utilities Disc"/>
116	72	<dataarea name="flop" size="409600">
117	73	<rom name="cpm_utilities_disc.dsd" size="409600" crc="1afbcc5f" sha1="ec4cf1810d43e0000b92943204dfd593bec883f1" offset="0" />
118	74	</dataarea>
119	75	</part>
120		</software>
121
122		<software name="basicprg" supported="no">
123		<description>BASIC Program Disc</description>
124		<year>1984</year>
125		<publisher>Acorn</publisher>
126		<info name="format" value="CP/M" />
127		<info name="compatibility" value="Z80 co-processor" />
128		<part name="flop1" interface="floppy_5_25">
	76	<part name="flop2" interface="floppy_5_25">
	77	<feature name="part_id" value="BASIC Program Disc"/>
129	78	<dataarea name="flop" size="409600">
130	79	<rom name="basic_program_disc.dsd" size="409600" crc="827304e7" sha1="76b808b059982ad6f1ab3454b745f83f2fc6ab1d" offset="0" />
131	80	</dataarea>
132	81	</part>
133		</software>
134
135		<software name="cobolprg" supported="no">
136		<description>CIS COBOL Program Disc</description>
137		<year>1984</year>
138		<publisher>Acorn</publisher>
139		<info name="format" value="CP/M" />
140		<info name="compatibility" value="Z80 co-processor" />
141		<part name="flop1" interface="floppy_5_25">
	82	<part name="flop3" interface="floppy_5_25">
	83	<feature name="part_id" value="CIS COBOL Program Disc"/>
142	84	<dataarea name="flop" size="409600">
143	85	<rom name="cis_cobol_program_disc.dsd" size="409600" crc="a7b8d740" sha1="f2d6cb366d00031958f1da774bc61521f61f86fe" offset="0" />
144	86	</dataarea>
145	87	</part>
146		</software>
147
148		<software name="memoprg" supported="no">
149		<description>MemoPlan Program Disc</description>
150		<year>1984</year>
151		<publisher>Acorn</publisher>
152		<info name="format" value="CP/M" />
153		<info name="compatibility" value="Z80 co-processor" />
154		<part name="flop1" interface="floppy_5_25">
	88	<part name="flop4" interface="floppy_5_25">
	89	<feature name="part_id" value="MemoPlan Program Disc"/>
155	90	<dataarea name="flop" size="409600">
156	91	<rom name="memoplan_program_disc.dsd" size="409600" crc="1a3eaf3e" sha1="87c047857e0bcd4abf6fc1c785e0e0035147fd0a" offset="0" />
157	92	</dataarea>
158	93	</part>
159		</software>
160
161		<software name="graphprg" supported="no">
162		<description>GraphPlan Program Disc</description>
163		<year>1984</year>
164		<publisher>Acorn</publisher>
165		<info name="format" value="CP/M" />
166		<info name="compatibility" value="Z80 co-processor" />
167		<part name="flop1" interface="floppy_5_25">
	94	<part name="flop5" interface="floppy_5_25">
	95	<feature name="part_id" value="GraphPlan Program Disc"/>
168	96	<dataarea name="flop" size="409600">
169	97	<rom name="graphplan_program_disc.dsd" size="409600" crc="015eca7c" sha1="c18216ca44bfd21d2119a33630691363b22c32b1" offset="0" />
170	98	</dataarea>
171	99	</part>
172		</software>
173
174		<software name="fileprg" supported="no">
175		<description>FilePlan Program Disc</description>
176		<year>1984</year>
177		<publisher>Acorn</publisher>
178		<info name="format" value="CP/M" />
179		<info name="compatibility" value="Z80 co-processor" />
180		<part name="flop1" interface="floppy_5_25">
	100	<part name="flop6" interface="floppy_5_25">
	101	<feature name="part_id" value="FilePlan Program Disc"/>
181	102	<dataarea name="flop" size="409600">
182	103	<rom name="fileplan_program_disc.dsd" size="409600" crc="8b832b7e" sha1="9d3f9401e098b8ab50c842552eb6ac98195647f7" offset="0" />
183	104	</dataarea>
184	105	</part>
185		</software>
186
187		<software name="accntprg" supported="no">
188		<description>Accountant Program Disc</description>
189		<year>1984</year>
190		<publisher>Acorn</publisher>
191		<info name="format" value="CP/M" />
192		<info name="compatibility" value="Z80 co-processor" />
193		<part name="flop1" interface="floppy_5_25">
	106	<part name="flop7" interface="floppy_5_25">
	107	<feature name="part_id" value="Accountant Program Disc"/>
194	108	<dataarea name="flop" size="409600">
195	109	<rom name="accountant_program_disc.dsd" size="409600" crc="02a76ee8" sha1="3119b294f63c6beb7726c6a5c73065a130efc8e2" offset="0" />
196	110	</dataarea>
197	111	</part>
198		</software>
199
200		<software name="accntdat" supported="no">
201		<description>Accountant Data Disc</description>
202		<year>1984</year>
203		<publisher>Acorn</publisher>
204		<info name="format" value="CP/M" />
205		<info name="compatibility" value="Z80 co-processor" />
206		<part name="flop1" interface="floppy_5_25">
	112	<part name="flop8" interface="floppy_5_25">
	113	<feature name="part_id" value="Accountant Data Disc"/>
207	114	<dataarea name="flop" size="409600">
208	115	<rom name="accountant_data_disc.dsd" size="409600" crc="d2b4c506" sha1="875e123044c9dee63c9c1f2b1fa8f248125f3dc7" offset="0" />
209	116	</dataarea>
210	117	</part>
211		</software>
212
213		<software name="nucldef" supported="no">
214		<description>Nucleus Definitions Program Disc</description>
215		<year>1984</year>
216		<publisher>Acorn</publisher>
217		<info name="format" value="CP/M" />
218		<info name="compatibility" value="Z80 co-processor" />
219		<part name="flop1" interface="floppy_5_25">
	118	<part name="flop9" interface="floppy_5_25">
	119	<feature name="part_id" value="Nucleus Definitions Program Disc"/>
220	120	<dataarea name="flop" size="409600">
221	121	<rom name="nucleus_definitions_program_disc.dsd" size="409600" crc="447e8629" sha1="2e39dfdae5aebaa7719e35499b13d5e6ac445f03" offset="0" />
222	122	</dataarea>
223	123	</part>
224		</software>
225
226		<software name="nuclrpt" supported="no">
227		<description>Nucleus Report Program Disc</description>
228		<year>1984</year>
229		<publisher>Acorn</publisher>
230		<info name="format" value="CP/M" />
231		<info name="compatibility" value="Z80 co-processor" />
232		<part name="flop1" interface="floppy_5_25">
	124	<part name="flop10" interface="floppy_5_25">
	125	<feature name="part_id" value="Nucleus Report Program Disc"/>
233	126	<dataarea name="flop" size="409600">
234	127	<rom name="nucleus_reporter_program_disc.dsd" size="409600" crc="c2e51084" sha1="62117dde924b10c7af241e640e468c3ca35db016" offset="0" />
235	128	</dataarea>
236	129	</part>
237		</software>
238
239		<software name="nuclparm" supported="no">
240		<description>Nucleus Parameter File Program Disc</description>
241		<year>1984</year>
242		<publisher>Acorn</publisher>
243		<info name="format" value="CP/M" />
244		<info name="compatibility" value="Z80 co-processor" />
245		<part name="flop1" interface="floppy_5_25">
	130	<part name="flop11" interface="floppy_5_25">
	131	<feature name="part_id" value="Nucleus Parameter File Program Disc"/>
246	132	<dataarea name="flop" size="409600">
247	133	<rom name="nucleus_parameter_file_program_disc.dsd" size="409600" crc="2c81fc08" sha1="b60bbfac15aab888c5be5e03b5977419b0e61903" offset="0" />
248	134	</dataarea>
249	135	</part>
250		</software>
251
252		<software name="startday" supported="no">
253		<description>Start Of Day Disc</description>
254		<year>1984</year>
255		<publisher>Acorn</publisher>
256		<info name="format" value="CP/M" />
257		<info name="compatibility" value="Z80 co-processor" />
258		<part name="flop1" interface="floppy_5_25">
	136	<part name="flop12" interface="floppy_5_25">
	137	<feature name="part_id" value="Start Of Day Disc"/>
259	138	<dataarea name="flop" size="409600">
260	139	<rom name="start_of_day_disc.dsd" size="409600" crc="f85aa0f5" sha1="4221d8c64dba5e44acd770effbce7fe2bc0da77e" offset="0" />
261	140	</dataarea>

trunk/hash/bbca_cass.xml

r250251	r250252
78	78	<publisher>Acornsoft</publisher>
79	79	<info name="release" value="G20" />
80	80	<part name="cass1" interface="bbc_cass">
	81	<feature name="part_id" value="Draughts"/>
81	82	<dataarea name="cass" size="6165">
82	83	<rom name="dar-draughts-v2.1(1983)(acornsoft)(g20).uef" size="6165" crc="35e365ed" sha1="0000bae54eaaa8d5507cc0d7a444aaeac03df97d" offset="0" />
83	84	</dataarea>
84	85	</part>
85	86	<part name="cass2" interface="bbc_cass">
	87	<feature name="part_id" value="Reversi"/>
86	88	<dataarea name="cass" size="5627">
87	89	<rom name="dar-reversi-v2.1(1983)(acornsoft)(g20).uef" size="5627" crc="fc23b2d1" sha1="6b96831ba63e0e9f6f4470af8a27cfc6a69588b1" offset="0" />
88	90	</dataarea>
r250251	r250252
94	96	<year>1982</year>
95	97	<publisher>I.J.K.</publisher>
96	98	<part name="cass1" interface="bbc_cass">
	99	<feature name="part_id" value="Beetle"/>
97	100	<dataarea name="cass" size="2152">
98	101	<rom name="fg-beetle(ijk).uef" size="2152" crc="b59da103" sha1="027cfc74305d4ffa415ea5c2a18eaf8049335eb1" offset="0" />
99	102	</dataarea>
100	103	</part>
101	104	<part name="cass2" interface="bbc_cass">
	105	<feature name="part_id" value="Dice"/>
102	106	<dataarea name="cass" size="1127">
103	107	<rom name="fg-dice(ijk).uef" size="1127" crc="8b9c429f" sha1="fd246f58c464c23b5e7f1d618e337bd108bf656a" offset="0" />
104	108	</dataarea>
105	109	</part>
106	110	<part name="cass3" interface="bbc_cass">
	111	<feature name="part_id" value="Grand National"/>
107	112	<dataarea name="cass" size="1498">
108	113	<rom name="fg-grandnational(ijk).uef" size="1498" crc="a734c961" sha1="e99e2f2fbb366f84a3869bb9637228452d9db109" offset="0" />
109	114	</dataarea>
110	115	</part>
111	116	<part name="cass4" interface="bbc_cass">
	117	<feature name="part_id" value="Hangman"/>
112	118	<dataarea name="cass" size="5086">
113	119	<rom name="fg-hangman(ijk).uef" size="5086" crc="e0f6ee12" sha1="ae091f682f59b88ac597337ade7718bc32bcf4b6" offset="0" />
114	120	</dataarea>
115	121	</part>
116	122	<part name="cass5" interface="bbc_cass">
	123	<feature name="part_id" value="Kryptogram"/>
117	124	<dataarea name="cass" size="1502">
118	125	<rom name="fg-kryptogram(ijk).uef" size="1502" crc="75367a68" sha1="5e260a5d929694dd32bf8fc62700999ece741f42" offset="0" />
119	126	</dataarea>
120	127	</part>
121	128	<part name="cass6" interface="bbc_cass">
	129	<feature name="part_id" value="Music"/>
122	130	<dataarea name="cass" size="1169">
123	131	<rom name="fg-music(ijk).uef" size="1169" crc="0a54e462" sha1="f5edcc6217f19744890b861fac5ba98ba1e5fe83" offset="0" />
124	132	</dataarea>

trunk/hash/bbcb_cass.xml

r250251	r250252
65	65	<software name="3dconvoy">
66	66	<description>3D Convoy</description>
67	67	<year>198?</year>
68		<publisher>Doctorsoft</publisher>
	68	<publisher>Doctor Soft</publisher>
69	69	<part name="cass" interface="bbc_cass">
70	70	<dataarea name="cass" size="6198">
71	71	<rom name="3dconvoy(doctorsoft).uef" size="6198" crc="75b32812" sha1="b08c67c044cb9d1feaf35cd0a8a466e77e083ae1" offset="0" />
r250251	r250252
222	222	<software name="747e" cloneof="747">
223	223	<description>747 (Early)</description>
224	224	<year>1983</year>
225		<publisher>Doctorsoft</publisher>
	225	<publisher>Doctor Soft</publisher>
226	226	<part name="cass" interface="bbc_cass">
227	227	<dataarea name="cass" size="7426">
228	228	<rom name="747-early(doctorsoft).uef" size="7426" crc="a1c21adf" sha1="bb2277de12538163cfa8e4382cfe294ae0d55bf7" offset="0" />
r250251	r250252
233	233	<software name="747">
234	234	<description>747</description>
235	235	<year>1983</year>
236		<publisher>Doctorsoft</publisher>
	236	<publisher>Doctor Soft</publisher>
237	237	<part name="cass1" interface="bbc_cass">
	238	<feature name="part_id" value="Joystick"/>
238	239	<dataarea name="cass" size="7319">
239	240	<rom name="747-joystick(doctorsoft).uef" size="7319" crc="904248e2" sha1="b948886e3547403763f5a15d946c0930d7c306b8" offset="0" />
240	241	</dataarea>
241	242	</part>
242	243	<part name="cass2" interface="bbc_cass">
	244	<feature name="part_id" value="Keyboard"/>
243	245	<dataarea name="cass" size="8981">
244	246	<rom name="747-keyboard(doctorsoft).uef" size="8981" crc="11c96e96" sha1="337569c285e62ff91043f33b55a580693d483d89" offset="0" />
245	247	</dataarea>
r250251	r250252
525	527
526	528	<software name="airwolf">
527	529	<description>Airwolf</description>
528		<year>198?</year>
	530	<year>1985</year>
529	531	<publisher>Elite</publisher>
530	532	<part name="cass" interface="bbc_cass">
531	533	<dataarea name="cass" size="15748">
r250251	r250252
619	621	<year>1986</year>
620	622	<publisher>Riverdale</publisher>
621	623	<part name="cass1" interface="bbc_cass">
	624	<feature name="part_id" value="Part 1"/>
622	625	<dataarea name="cass" size="10645">
623	626	<rom name="americansuds-pt1_be(1986)(riverdale).uef" size="10645" crc="bbba8a02" sha1="05bee4976191e3f67ff3c1d67d57261b508dcc94" offset="0" />
624	627	</dataarea>
625	628	</part>
626	629	<part name="cass2" interface="bbc_cass">
	630	<feature name="part_id" value="Part 2"/>
627	631	<dataarea name="cass" size="10434">
628	632	<rom name="americansuds-pt2_be(1986)(riverdale).uef" size="10434" crc="4b35ba6a" sha1="06586a7ad13735a85a6259074e5917bb607e03f7" offset="0" />
629	633	</dataarea>
630	634	</part>
631	635	<part name="cass3" interface="bbc_cass">
	636	<feature name="part_id" value="Part 3"/>
632	637	<dataarea name="cass" size="10892">
633	638	<rom name="americansuds-pt3_be(1986)(riverdale).uef" size="10892" crc="5e684124" sha1="24b12118544e9e01ca63380b4b9ef4c2677c965b" offset="0" />
634	639	</dataarea>
635	640	</part>
636	641	<part name="cass4" interface="bbc_cass">
	642	<feature name="part_id" value="Part 4"/>
637	643	<dataarea name="cass" size="10935">
638	644	<rom name="americansuds-pt4_be(1986)(riverdale).uef" size="10935" crc="8f5d1deb" sha1="681282f14eac3014c656c666f2d0eb1e22efa93e" offset="0" />
639	645	</dataarea>
r250251	r250252
667	673	<year>19??</year>
668	674	<publisher>Lee</publisher>
669	675	<part name="cass1" interface="bbc_cass">
	676	<feature name="part_id" value="Part 1"/>
670	677	<dataarea name="cass" size="12533">
671	678	<rom name="annabelgray-pt1_be(lee).uef" size="12533" crc="5e466131" sha1="8ceb3a881790854393b4b4f6bf0792b6c84db806" offset="0" />
672	679	</dataarea>
673	680	</part>
674	681	<part name="cass2" interface="bbc_cass">
	682	<feature name="part_id" value="Part 2"/>
675	683	<dataarea name="cass" size="12439">
676	684	<rom name="annabelgray-pt2_be(lee).uef" size="12439" crc="1fa621e2" sha1="15efd0bb58e6b9ccb63ede49bbf8b8e9e6004336" offset="0" />
677	685	</dataarea>
r250251	r250252
761	769	<year>1983</year>
762	770	<publisher>Software Invasion</publisher>
763	771	<part name="cass1" interface="bbc_cass">
	772	<feature name="part_id" value="Joystick"/>
764	773	<dataarea name="cass" size="7523">
765	774	<rom name="apollo-joysticks(softwareinvasion).uef" size="7523" crc="07ebf289" sha1="5543073467915012ee0059e8ef639f9d084378e8" offset="0" />
766	775	</dataarea>
767	776	</part>
768	777	<part name="cass2" interface="bbc_cass">
	778	<feature name="part_id" value="Keyboard"/>
769	779	<dataarea name="cass" size="7259">
770	780	<rom name="apollo(softwareinvasion).uef" size="7259" crc="787688ed" sha1="185de7feec4555f2d2093e9c18b860239fa71a68" offset="0" />
771	781	</dataarea>
r250251	r250252
1024	1034	<year>1987</year>
1025	1035	<publisher>Elk Adventure Club</publisher>
1026	1036	<part name="cass1" interface="bbc_cass">
	1037	<feature name="part_id" value="Part 1"/>
1027	1038	<dataarea name="cass" size="14406">
1028	1039	<rom name="axeofkolt-pt1_be(1987)(elk).uef" size="14406" crc="05ca98fc" sha1="0b0a6ab7e88fdb353e6103cb099eeefed1c726d5" offset="0" />
1029	1040	</dataarea>
1030	1041	</part>
1031	1042	<part name="cass2" interface="bbc_cass">
	1043	<feature name="part_id" value="Part 2"/>
1032	1044	<dataarea name="cass" size="11086">
1033	1045	<rom name="axeofkolt-pt2_be(1987)(elk).uef" size="11086" crc="98322c43" sha1="fea681b3a86e490456b29d8d918c3a51516d5dda" offset="0" />
1034	1046	</dataarea>
1035	1047	</part>
1036	1048	<part name="cass3" interface="bbc_cass">
	1049	<feature name="part_id" value="Part 3"/>
1037	1050	<dataarea name="cass" size="10930">
1038	1051	<rom name="axeofkolt-pt3_be(1987)(elk).uef" size="10930" crc="cf80e6c3" sha1="b02092dec746215e6780e2401f63a421ad8d442c" offset="0" />
1039	1052	</dataarea>
1040	1053	</part>
1041	1054	<part name="cass4" interface="bbc_cass">
	1055	<feature name="part_id" value="Part 4"/>
1042	1056	<dataarea name="cass" size="10808">
1043	1057	<rom name="axeofkolt-pt4_be(1987)(elk).uef" size="10808" crc="2af8d97a" sha1="6f45f4ff60048025294b1fd3966b6e1dc17b1e77" offset="0" />
1044	1058	</dataarea>
r250251	r250252
1149	1163	<year>1987</year>
1150	1164	<publisher>Superior Software</publisher>
1151	1165	<part name="cass1" interface="bbc_cass">
	1166	<feature name="part_id" value="Combat Practice"/>
1152	1167	<dataarea name="cass" size="24764">
1153	1168	<rom name="barbarian-combatpractice(1987)(superior).uef" size="24764" crc="2e4d51e3" sha1="8fba7af4384f7170bc735898b111c4d42d44f705" offset="0" />
1154	1169	</dataarea>
1155	1170	</part>
1156	1171	<part name="cass2" interface="bbc_cass">
	1172	<feature name="part_id" value="Fight to the Death"/>
1157	1173	<dataarea name="cass" size="24742">
1158	1174	<rom name="barbarian-fighttothedeath(1987)(superior).uef" size="24742" crc="4766f29c" sha1="f939b8c3cbe59ad457c8bc78a552ec4d28a9a3d9" offset="0" />
1159	1175	</dataarea>
r250251	r250252
1459	1475	</software>
1460	1476
1461	1477	<software name="blockbus">
1462		<description>Block Buster</description>
1463		<year>198?</year>
	1478	<description>Blockbuster</description>
	1479	<year>1984</year>
1464	1480	<publisher>Micro Power</publisher>
1465	1481	<part name="cass" interface="bbc_cass">
1466	1482	<dataarea name="cass" size="7253">
r250251	r250252
1754	1770	<year>19??</year>
1755	1771	<publisher>J Keyne</publisher>
1756	1772	<part name="cass1" interface="bbc_cass">
	1773	<feature name="part_id" value="Tape A"/>
1757	1774	<dataarea name="cass" size="5041">
1758	1775	<rom name="bridgemaster-tapea_be(jkeyne).uef" size="5041" crc="ba94bafc" sha1="752800f97f445afa16dcca40c488113892c4050c" offset="0" />
1759	1776	</dataarea>
1760	1777	</part>
1761	1778	<part name="cass2" interface="bbc_cass">
	1779	<feature name="part_id" value="Tape B"/>
1762	1780	<dataarea name="cass" size="5805">
1763	1781	<rom name="bridgemaster-tapeb_be(jkeyne).uef" size="5805" crc="6512bfc3" sha1="2005318732bb1014d5137bedde9c6203c64f360c" offset="0" />
1764	1782	</dataarea>
1765	1783	</part>
1766	1784	<part name="cass3" interface="bbc_cass">
	1785	<feature name="part_id" value="Tape C"/>
1767	1786	<dataarea name="cass" size="5690">
1768	1787	<rom name="bridgemaster-tapec_be(jkeyne).uef" size="5690" crc="ef6ce2ba" sha1="c2ddae81ee7951da1808eda070cd5633ad2991a6" offset="0" />
1769	1788	</dataarea>
1770	1789	</part>
1771	1790	<part name="cass4" interface="bbc_cass">
	1791	<feature name="part_id" value="Tape D"/>
1772	1792	<dataarea name="cass" size="5744">
1773	1793	<rom name="bridgemaster-taped_be(jkeyne).uef" size="5744" crc="004a5565" sha1="2d8f8d4f03e3d22c483ac1f1b5a9912c9b5984c7" offset="0" />
1774	1794	</dataarea>
r250251	r250252
1941	1961	</dataarea>
1942	1962	</part>
1943	1963	</software>
1944
	1964
1945	1965	<software name="carwarsp">
1946	1966	<description>Car Wars/Planet of the Aliens</description>
1947	1967	<year>1982</year>
r250251	r250252
2026	2046	<year>1984</year>
2027	2047	<publisher>MRM Software</publisher>
2028	2048	<part name="cass1" interface="bbc_cass">
	2049	<feature name="part_id" value="Side 1"/>
2029	2050	<dataarea name="cass" size="8824">
2030	2051	<rom name="castleofgems-side1(1984)(mrm).uef" size="8824" crc="69b0d0b6" sha1="4b937e34845664c5ccbf9324bb3d5cb70e97e167" offset="0" />
2031	2052	</dataarea>
2032	2053	</part>
2033	2054	<part name="cass2" interface="bbc_cass">
	2055	<feature name="part_id" value="Side 2"/>
2034	2056	<dataarea name="cass" size="8876">
2035	2057	<rom name="castleofgems-side2(1984)(mrm).uef" size="8876" crc="048aabb4" sha1="8b8d96a3641b6f93d02ad4e6003c442029d66673" offset="0" />
2036	2058	</dataarea>
r250251	r250252
2623	2645
2624	2646	<software name="commando">
2625	2647	<description>Commando</description>
2626		<year>198?</year>
	2648	<year>1985</year>
2627	2649	<publisher>Elite</publisher>
2628	2650	<part name="cass" interface="bbc_cass">
2629	2651	<dataarea name="cass" size="19228">
r250251	r250252
2648	2670	<year>198?</year>
2649	2671	<publisher>CDS</publisher>
2650	2672	<part name="cass1" interface="bbc_cass">
	2673	<feature name="part_id" value="Backgammon"/>
2651	2674	<dataarea name="cass" size="4290">
2652	2675	<rom name="tchec-backgammon(cds).uef" size="4290" crc="8dfeb5cc" sha1="4044b782321cd05dfe277ac0cfe094b2319a6083" offset="0" />
2653	2676	</dataarea>
2654	2677	</part>
2655	2678	<part name="cass2" interface="bbc_cass">
	2679	<feature name="part_id" value="Bridge"/>
2656	2680	<dataarea name="cass" size="22034">
2657	2681	<rom name="tchec-bridge(cds).uef" size="22034" crc="9ef5480e" sha1="b3fa888528fca6338de57021cc19e9ab0256ba50" offset="0" />
2658	2682	</dataarea>
2659	2683	</part>
2660	2684	<part name="cass3" interface="bbc_cass">
	2685	<feature name="part_id" value="Chess"/>
2661	2686	<dataarea name="cass" size="37519">
2662	2687	<rom name="tchec-chess(cds).uef" size="37519" crc="11e8b89c" sha1="8ebe8576f47c5756e19b90cfef511e636a091714" offset="0" />
2663	2688	</dataarea>
2664	2689	</part>
2665	2690	<part name="cass4" interface="bbc_cass">
	2691	<feature name="part_id" value="Dominoes"/>
2666	2692	<dataarea name="cass" size="6335">
2667	2693	<rom name="tchec-dominoes(cds).uef" size="6335" crc="b9f95e1e" sha1="148728f6f2d07b71fe95eb24e2908cbfd08d0269" offset="0" />
2668	2694	</dataarea>
2669	2695	</part>
2670	2696	<part name="cass5" interface="bbc_cass">
	2697	<feature name="part_id" value="Poker"/>
2671	2698	<dataarea name="cass" size="7040">
2672	2699	<rom name="tchec-poker(cds).uef" size="7040" crc="0940cf91" sha1="b715180928250a9d9c7c0c35353cf50734bfd4a1" offset="0" />
2673	2700	</dataarea>
2674	2701	</part>
2675	2702	<part name="cass6" interface="bbc_cass">
	2703	<feature name="part_id" value="Pontoon"/>
2676	2704	<dataarea name="cass" size="7633">
2677	2705	<rom name="tchec-pontoon(cds).uef" size="7633" crc="74807e91" sha1="c41877aa6c71fee5d126e3d82d86c6386f528bdf" offset="0" />
2678	2706	</dataarea>
2679	2707	</part>
2680	2708	<part name="cass7" interface="bbc_cass">
	2709	<feature name="part_id" value="Word Search"/>
2681	2710	<dataarea name="cass" size="13801">
2682	2711	<rom name="tchec-wordsearch(cds).uef" size="13801" crc="5c612659" sha1="a9206dd3d4170945f68252ee275c340e3bcb086c" offset="0" />
2683	2712	</dataarea>
r250251	r250252
2916	2945	</software>
2917	2946
2918	2947	<software name="ctodoom">
2919		<description>Countdown To Doom</description>
	2948	<description>Countdown to Doom</description>
2920	2949	<year>1982</year>
2921	2950	<publisher>Acornsoft</publisher>
2922	2951	<info name="release" value="G19" />
r250251	r250252
2932	2961	<year>19??</year>
2933	2962	<publisher>Selec</publisher>
2934	2963	<part name="cass1" interface="bbc_cass">
	2964	<feature name="part_id" value="Side 1"/>
2935	2965	<dataarea name="cass" size="9786">
2936	2966	<rom name="coursewinner3-side1-nh(selec).uef" size="9786" crc="37cade71" sha1="6ee07de660a965974c826c328d23f6ff87cf10b5" offset="0" />
2937	2967	</dataarea>
2938	2968	</part>
2939	2969	<part name="cass2" interface="bbc_cass">
	2970	<feature name="part_id" value="Side 2"/>
2940	2971	<dataarea name="cass" size="8882">
2941	2972	<rom name="coursewinner3-side2-flat(selec).uef" size="8882" crc="2cbd896e" sha1="30a8c7076c604fa1006706011af04c682f42d053" offset="0" />
2942	2973	</dataarea>
r250251	r250252
3129	3160	<year>198?</year>
3130	3161	<publisher>Cumana</publisher>
3131	3162	<part name="cass1" interface="bbc_cass">
	3163	<feature name="part_id" value="Side 1"/>
3132	3164	<dataarea name="cass" size="7308">
3133	3165	<rom name="cumanasketchpad-side1(cumana).uef" size="7308" crc="71be2480" sha1="3b2d824d15bee0f213257b8e6f8bdfd88a239bff" offset="0" />
3134	3166	</dataarea>
3135	3167	</part>
3136	3168	<part name="cass2" interface="bbc_cass">
	3169	<feature name="part_id" value="Side 2"/>
3137	3170	<dataarea name="cass" size="6046">
3138	3171	<rom name="cumanasketchpad-side2(cumana).uef" size="6046" crc="b0fdb864" sha1="e39d67bab0fbdc3826358e878de38a9698b67671" offset="0" />
3139	3172	</dataarea>
r250251	r250252
3211	3244	<year>198?</year>
3212	3245	<publisher>Ocean</publisher>
3213	3246	<part name="cass1" interface="bbc_cass">
	3247	<feature name="part_id" value="Side 1"/>
3214	3248	<dataarea name="cass" size="14665">
3215	3249	<rom name="daleythompsonssupertest-side1(ocean).uef" size="14665" crc="ef93cca9" sha1="add01e556a84000afca03d2c8466c83014ecb4c0" offset="0" />
3216	3250	</dataarea>
3217	3251	</part>
3218	3252	<part name="cass2" interface="bbc_cass">
	3253	<feature name="part_id" value="Side 2"/>
3219	3254	<dataarea name="cass" size="14837">
3220	3255	<rom name="daleythompsonssupertest-side2(ocean).uef" size="14837" crc="d0442a89" sha1="27f7eb82f9ac5a6439b78cc1103b49a1db982dd3" offset="0" />
3221	3256	</dataarea>
r250251	r250252
3383	3418	<publisher>Voltmace</publisher>
3384	3419	<info name="usage" value="Load with *RUN" />
3385	3420	<part name="cass1" interface="bbc_cass">
	3421	<feature name="part_id" value="Joystick Driver"/>
3386	3422	<dataarea name="cass" size="7467">
3387	3423	<rom name="delta14joystickdriver_run(voltmace).uef" size="7467" crc="a0d9062c" sha1="4fcb5a57ae6621f41d7fdcab1c1cb49ba1c7a0fe" offset="0" />
3388	3424	</dataarea>
3389	3425	</part>
3390	3426	<part name="cass2" interface="bbc_cass">
	3427	<feature name="part_id" value="Keypad Driver"/>
3391	3428	<dataarea name="cass" size="5424">
3392	3429	<rom name="delta14keypaddriver_run(voltmace).uef" size="5424" crc="04288595" sha1="a402bbd9c8e42318684da88b2252bf3f1f0825fd" offset="0" />
3393	3430	</dataarea>
r250251	r250252
3411	3448	<publisher>Visions</publisher>
3412	3449	<info name="usage" value="Load with *RUN" />
3413	3450	<part name="cass1" interface="bbc_cass">
	3451	<feature name="part_id" value="Normal"/>
3414	3452	<dataarea name="cass" size="9319">
3415	3453	<rom name="demolator_run(visions).uef" size="9319" crc="5dc43e5b" sha1="d7d88ca1b651926104c0833e257e967e0d47dfc2" offset="0" />
3416	3454	</dataarea>
3417	3455	</part>
3418	3456	<part name="cass2" interface="bbc_cass">
	3457	<feature name="part_id" value="Infinite Lives"/>
3419	3458	<dataarea name="cass" size="9339">
3420	3459	<rom name="demolator_infinitelives_run(visions).uef" size="9339" crc="8c638151" sha1="85aced0345aec14e7750c5daa290f1cb642b1961" offset="0" />
3421	3460	</dataarea>
r250251	r250252
4115	4154
4116	4155	<software name="etype">
4117	4156	<description>E-Type</description>
4118		<year>1989</year>
	4157	<year>1990</year>
4119	4158	<publisher>4th Dimension</publisher>
4120	4159	<part name="cass" interface="bbc_cass">
4121	4160	<dataarea name="cass" size="25773">
r250251	r250252
4593	4632
4594	4633	<software name="fortress">
4595	4634	<description>Fortress</description>
4596		<year>198?</year>
	4635	<year>1984</year>
4597	4636	<publisher>Pace</publisher>
4598	4637	<part name="cass" interface="bbc_cass">
4599	4638	<dataarea name="cass" size="14071">
r250251	r250252
5036	5075	<year>1983</year>
5037	5076	<publisher>Salamander</publisher>
5038	5077	<part name="cass1" interface="bbc_cass">
	5078	<feature name="part_id" value="Alphabet Soup"/>
5039	5079	<dataarea name="cass" size="2224">
5040	5080	<rom name="gcb1-alphabetsoup(1983)(salamander).uef" size="2224" crc="84837080" sha1="146778908cc9deed224ae56c1f35e83118f93928" offset="0" />
5041	5081	</dataarea>
5042	5082	</part>
5043	5083	<part name="cass2" interface="bbc_cass">
	5084	<feature name="part_id" value="Fireman"/>
5044	5085	<dataarea name="cass" size="2840">
5045	5086	<rom name="gcb1-fireman(1983)(salamander).uef" size="2840" crc="717985c4" sha1="f00b4cd9059fe889b9d74dfa402680922bdac53d" offset="0" />
5046	5087	</dataarea>
5047	5088	</part>
5048	5089	<part name="cass3" interface="bbc_cass">
	5090	<feature name="part_id" value="Hangman"/>
5049	5091	<dataarea name="cass" size="4191">
5050	5092	<rom name="gcb1-hangman(1983)(salamander).uef" size="4191" crc="f510b7d0" sha1="fc200debf38e8b748538c515f140722076e2012f" offset="0" />
5051	5093	</dataarea>
5052	5094	</part>
5053	5095	<part name="cass4" interface="bbc_cass">
	5096	<feature name="part_id" value="Simon"/>
5054	5097	<dataarea name="cass" size="1482">
5055	5098	<rom name="gcb1-simon(1983)(salamander).uef" size="1482" crc="062c610f" sha1="269ab5e3db28529edf0f45f5492acf7cadeb6b44" offset="0" />
5056	5099	</dataarea>
r250251	r250252
5062	5105	<year>1983</year>
5063	5106	<publisher>Salamander</publisher>
5064	5107	<part name="cass1" interface="bbc_cass">
	5108	<feature name="part_id" value="Bomber"/>
5065	5109	<dataarea name="cass" size="1764">
5066	5110	<rom name="gcb3-bomber(1983)(salamander).uef" size="1764" crc="2def2939" sha1="775103e746289002e4f7fac8ce5cfe6d1b919639" offset="0" />
5067	5111	</dataarea>
5068	5112	</part>
5069	5113	<part name="cass2" interface="bbc_cass">
	5114	<feature name="part_id" value="Boothill"/>
5070	5115	<dataarea name="cass" size="3244">
5071	5116	<rom name="gcb3-boothill(1983)(salamander).uef" size="3244" crc="79fd9d50" sha1="c4929cb24da850d9c033732c422daf53ceafd8df" offset="0" />
5072	5117	</dataarea>
5073	5118	</part>
5074	5119	<part name="cass3" interface="bbc_cass">
	5120	<feature name="part_id" value="Mole"/>
5075	5121	<dataarea name="cass" size="3857">
5076	5122	<rom name="gcb3-mole(1983)(salamander).uef" size="3857" crc="a0b991d5" sha1="ec16b655b072703162876ffd1107faa37696d7ba" offset="0" />
5077	5123	</dataarea>
r250251	r250252
5218	5264	<year>1983</year>
5219	5265	<publisher>MGB Software</publisher>
5220	5266	<part name="cass1" interface="bbc_cass">
	5267	<feature name="part_id" value="Keyboard"/>
5221	5268	<dataarea name="cass" size="3129">
5222	5269	<rom name="gobbler1k(1983)(mgb).uef" size="3129" crc="f155d05d" sha1="e18d9f3b6bbabd2f91bebcd3a202fe19aa811bb9" offset="0" />
5223	5270	</dataarea>
5224	5271	</part>
5225	5272	<part name="cass2" interface="bbc_cass">
	5273	<feature name="part_id" value="Joystick"/>
5226	5274	<dataarea name="cass" size="3043">
5227	5275	<rom name="gobbler2j(1983)(mgb).uef" size="3043" crc="7759f9ad" sha1="843dabc4c7c0deee658d39769afe90b50dac2478" offset="0" />
5228	5276	</dataarea>
5229	5277	</part>
5230	5278	</software>
5231
	5279
5232	5280	<software name="golddigg">
5233	5281	<description>Gold Digger</description>
5234	5282	<year>1984</year>
r250251	r250252
5309	5357	<software name="gorf">
5310	5358	<description>Gorf</description>
5311	5359	<year>1983</year>
5312		<publisher>Doctorsoft</publisher>
	5360	<publisher>Doctor Soft</publisher>
5313	5361	<part name="cass" interface="bbc_cass">
5314	5362	<dataarea name="cass" size="9462">
5315	5363	<rom name="gorf(1983)(doctorsoft).uef" size="9462" crc="379517fe" sha1="20b6241dba582a72bc906b4148385722b01b71ce" offset="0" />
r250251	r250252
5352	5400	</software>
5353	5401
5354	5402	<software name="gradvcre">
5355		<description>Graphic Adventure Creator</description>
	5403	<description>The Graphic Adventure Creator</description>
5356	5404	<year>1986</year>
5357	5405	<publisher>Incentive</publisher>
5358	5406	<part name="cass1" interface="bbc_cass">
	5407	<feature name="part_id" value="Side 1"/>
5359	5408	<dataarea name="cass" size="11147">
5360	5409	<rom name="adventurecreator-side1_be(incentive).uef" size="11147" crc="ba879f45" sha1="ebe76a4867abe84694710c2524f7886d2ebae4fd" offset="0" />
5361	5410	</dataarea>
5362	5411	</part>
5363	5412	<part name="cass2" interface="bbc_cass">
	5413	<feature name="part_id" value="Side 2"/>
5364	5414	<dataarea name="cass" size="6335">
5365	5415	<rom name="adventurecreator-side2_be(incentive).uef" size="6335" crc="e6ae14f8" sha1="d17790b4f51ae0439016897148c6a0c9f5c47c60" offset="0" />
5366	5416	</dataarea>
r250251	r250252
5612	5662	<software name="happynum">
5613	5663	<description>Happy Numbers</description>
5614	5664	<year>198?</year>
5615		<publisher>Bourne</publisher>
	5665	<publisher>Bourne Educational Software</publisher>
5616	5666	<part name="cass" interface="bbc_cass">
5617	5667	<dataarea name="cass" size="4676">
5618	5668	<rom name="happynumbers(bourne).uef" size="4676" crc="3cd9531a" sha1="04d71c30dc0804c6c416b6f8e743535ad68ccaa3" offset="0" />
r250251	r250252
5812	5862
5813	5863	<software name="holedoc1">
5814	5864	<description>Holed Out Extra Courses Vol.1</description>
5815		<year>19??</year>
	5865	<year>1990</year>
5816	5866	<publisher>4th Dimension</publisher>
5817	5867	<part name="cass" interface="bbc_cass">
5818	5868	<dataarea name="cass" size="35742">
r250251	r250252
5823	5873
5824	5874	<software name="holedoc2">
5825	5875	<description>Holed Out Extra Courses Vol.2</description>
5826		<year>19??</year>
	5876	<year>1990</year>
5827	5877	<publisher>4th Dimension</publisher>
5828	5878	<part name="cass" interface="bbc_cass">
5829	5879	<dataarea name="cass" size="35752">
r250251	r250252
6024	6074
6025	6075	<software name="hyperspo">
6026	6076	<description>Hyper Sports</description>
6027		<year>1984</year>
	6077	<year>1985</year>
6028	6078	<publisher>Imagine</publisher>
6029	6079	<info name="compatibility" value="disable Speech" />
6030	6080	<part name="cass" interface="bbc_cass">
r250251	r250252
6047	6097
6048	6098	<software name="icarus">
6049	6099	<description>Icarus</description>
6050		<year>19??</year>
	6100	<year>1988</year>
6051	6101	<publisher>Mandarin</publisher>
6052	6102	<part name="cass1" interface="bbc_cass">
6053		<dataarea name="cass" size="12628">
6054		<rom name="icarus-decks(mandarin).uef" size="12628" crc="ddcf1493" sha1="900ec9fe5c0a5eec6736fd7c654a82a4e8ef1b0f" offset="0" />
	6103	<feature name="part_id" value="Game"/>
	6104	<dataarea name="cass" size="15305">
	6105	<rom name="icarus-game(mandarin).uef" size="15305" crc="9c5c82cb" sha1="4b2c98f3005db862ac5fca8625fe291e55d1554a" offset="0" />
6055	6106	</dataarea>
6056	6107	</part>
6057	6108	<part name="cass2" interface="bbc_cass">
6058		<dataarea name="cass" size="15305">
6059		<rom name="icarus-game(mandarin).uef" size="15305" crc="9c5c82cb" sha1="4b2c98f3005db862ac5fca8625fe291e55d1554a" offset="0" />
	6109	<feature name="part_id" value="Decks"/>
	6110	<dataarea name="cass" size="12628">
	6111	<rom name="icarus-decks(mandarin).uef" size="12628" crc="ddcf1493" sha1="900ec9fe5c0a5eec6736fd7c654a82a4e8ef1b0f" offset="0" />
6060	6112	</dataarea>
6061	6113	</part>
6062	6114	</software>
r250251	r250252
6141	6193
6142	6194	<software name="impmiss">
6143	6195	<description>Impossible Mission</description>
6144		<year>198?</year>
	6196	<year>1985</year>
6145	6197	<publisher>U.S. Gold</publisher>
6146	6198	<part name="cass" interface="bbc_cass">
6147	6199	<dataarea name="cass" size="24956">
r250251	r250252
6174	6226
6175	6227	<software name="indoorsp">
6176	6228	<description>Indoor Sports</description>
6177		<year>198?</year>
	6229	<year>1988</year>
6178	6230	<publisher>Tynesoft</publisher>
6179	6231	<part name="cass" interface="bbc_cass">
6180	6232	<dataarea name="cass" size="79291">
r250251	r250252
6232	6284	<year>198?</year>
6233	6285	<publisher>Lee</publisher>
6234	6286	<part name="cass1" interface="bbc_cass">
	6287	<feature name="part_id" value="Part 1"/>
6235	6288	<dataarea name="cass" size="12851">
6236	6289	<rom name="insearchofatahaulpa-pt1_be(lee).uef" size="12851" crc="83783735" sha1="d3a1f6516a0a5be24825e7019f11d89b0c83d8f5" offset="0" />
6237	6290	</dataarea>
6238	6291	</part>
6239	6292	<part name="cass2" interface="bbc_cass">
	6293	<feature name="part_id" value="Part 2"/>
6240	6294	<dataarea name="cass" size="11759">
6241	6295	<rom name="insearchofatahaulpa-pt2_be(lee).uef" size="11759" crc="2474f012" sha1="f552732e68d4b8cb790ef9bffb71ec7654d401c0" offset="0" />
6242	6296	</dataarea>
r250251	r250252
6363	6417	<year>198?</year>
6364	6418	<publisher>Central Computing</publisher>
6365	6419	<part name="cass1" interface="bbc_cass">
	6420	<feature name="part_id" value="Part 1"/>
6366	6421	<dataarea name="cass" size="17561">
6367	6422	<rom name="itsmagic-pt1(central).uef" size="17561" crc="30f5faaa" sha1="90d33ab03dceacd94abde8c369ac104f0946e188" offset="0" />
6368	6423	</dataarea>
6369	6424	</part>
6370	6425	<part name="cass2" interface="bbc_cass">
	6426	<feature name="part_id" value="Part 2"/>
6371	6427	<dataarea name="cass" size="17598">
6372	6428	<rom name="itsmagic-pt2(central).uef" size="17598" crc="f3d30f21" sha1="3ff5506dad5c0d7a6d33179617084e39efc76f54" offset="0" />
6373	6429	</dataarea>
r250251	r250252
6556	6612
6557	6613	<software name="jumpjet">
6558	6614	<description>Jump Jet</description>
6559		<year>198?</year>
6560		<publisher>Doctorsoft</publisher>
	6615	<year>1984</year>
	6616	<publisher>Doctor Soft</publisher>
6561	6617	<part name="cass" interface="bbc_cass">
6562	6618	<dataarea name="cass" size="7292">
6563	6619	<rom name="jumpjet(doctorsoft).uef" size="7292" crc="ae44f860" sha1="d872a5032929bcfb7e8ef4e283994baa44242c45" offset="0" />
r250251	r250252
6622	6678
6623	6679	<software name="kayleth">
6624	6680	<description>Kayleth</description>
6625		<year>198?</year>
	6681	<year>1986</year>
6626	6682	<publisher>U.S. Gold</publisher>
6627	6683	<part name="cass" interface="bbc_cass">
6628	6684	<dataarea name="cass" size="20678">
r250251	r250252
6811	6867
6812	6868	<software name="kourtyd">
6813	6869	<description>Kourtyard</description>
6814		<year>19??</year>
	6870	<year>1988</year>
6815	6871	<publisher>Godax</publisher>
6816	6872	<part name="cass" interface="bbc_cass">
6817	6873	<dataarea name="cass" size="23712">
r250251	r250252
6834	6890	<software name="kremlin">
6835	6891	<description>Kremlin</description>
6836	6892	<year>1983</year>
6837		<publisher>Doctorsoft</publisher>
	6893	<publisher>Doctor Soft</publisher>
6838	6894	<part name="cass" interface="bbc_cass">
6839	6895	<dataarea name="cass" size="4784">
6840	6896	<rom name="kremlin(1983)(doctorsoft).uef" size="4784" crc="5dd9558c" sha1="ad3f9d85a457bafded72a7930f162104d88890f7" offset="0" />
r250251	r250252
7181	7237	<year>1985</year>
7182	7238	<publisher>Mirrorsoft</publisher>
7183	7239	<part name="cass1" interface="bbc_cass">
	7240	<feature name="part_id" value="Old MacDonalds Farm"/>
7184	7241	<dataarea name="cass" size="7497">
7185	7242	<rom name="ls-oldmacdonaldsfarm_be(1985)(mirrorsoft).uef" size="7497" crc="3f11d07f" sha1="359952f8fa204271f387760fd1b9632a563fd381" offset="0" />
7186	7243	</dataarea>
7187	7244	</part>
7188	7245	<part name="cass2" interface="bbc_cass">
	7246	<feature name="part_id" value="Sort"/>
7189	7247	<dataarea name="cass" size="8068">
7190	7248	<rom name="ls-sort_be(1985)(mirrorsoft).uef" size="8068" crc="aaaabdfd" sha1="1ec43458d43de2c146df7c85c4484128132c7e06" offset="0" />
7191	7249	</dataarea>
r250251	r250252
7230	7288	<year>1986</year>
7231	7289	<publisher>Melbourne House</publisher>
7232	7290	<part name="cass1" interface="bbc_cass">
	7291	<feature name="part_id" value="Tape 1 - Side 1 - Part 1a"/>
7233	7292	<dataarea name="cass" size="26529">
7234	7293	<rom name="lordoftherings-tape1side1-part1a(1986)(melbourne).uef" size="26529" crc="18c40a4e" sha1="620ff7a5107822a495379bff83886fde1469f6f3" offset="0" />
7235	7294	</dataarea>
7236	7295	</part>
7237	7296	<part name="cass2" interface="bbc_cass">
	7297	<feature name="part_id" value="Tape 1 - Side 2 - Part 1b"/>
7238	7298	<dataarea name="cass" size="25885">
7239	7299	<rom name="lordoftherings-tape1side2-part1b(1986)(melbourne).uef" size="25885" crc="fdb188b8" sha1="207e7d2a22bfd6310836f1431e7c99e6bf2af656" offset="0" />
7240	7300	</dataarea>
7241	7301	</part>
7242	7302	<part name="cass3" interface="bbc_cass">
	7303	<feature name="part_id" value="Tape 2 - Side 1 - Parts 2a-2b"/>
7243	7304	<dataarea name="cass" size="52459">
7244	7305	<rom name="lordoftherings-tape2side1-parts2a2b(1986)(melbourne).uef" size="52459" crc="3a3b8cb9" sha1="8009dc86f4882ad9fed8bd7c9c4e35af4c019cd6" offset="0" />
7245	7306	</dataarea>
7246	7307	</part>
7247	7308	<part name="cass4" interface="bbc_cass">
	7309	<feature name="part_id" value="Tape 2 - Side 2 - Beginners Game"/>
7248	7310	<dataarea name="cass" size="26716">
7249	7311	<rom name="lordoftherings-tape2side2-beginnersgame(1986)(melbourne).uef" size="26716" crc="93347237" sha1="4af3e25b76a71e0e35911643f5654fb75bdbeb23" offset="0" />
7250	7312	</dataarea>
r250251	r250252
7368	7430	<year>1987</year>
7369	7431	<publisher>Elk Adventure Club</publisher>
7370	7432	<part name="cass1" interface="bbc_cass">
	7433	<feature name="part_id" value="Part 1"/>
7371	7434	<dataarea name="cass" size="12224">
7372	7435	<rom name="magneticmoon-pt1_be(1987)(elk).uef" size="12224" crc="07a7a715" sha1="c0076c62477efd5ba34b11d00fcc6cf814edf37e" offset="0" />
7373	7436	</dataarea>
7374	7437	</part>
7375	7438	<part name="cass2" interface="bbc_cass">
	7439	<feature name="part_id" value="Part 2"/>
7376	7440	<dataarea name="cass" size="10367">
7377	7441	<rom name="magneticmoon-pt2_be(1987)(elk).uef" size="10367" crc="1d9bf270" sha1="3e5ba399d5d2dc7edcb7f43cd9a3d111800dd40d" offset="0" />
7378	7442	</dataarea>
7379	7443	</part>
7380	7444	<part name="cass3" interface="bbc_cass">
	7445	<feature name="part_id" value="Part 3"/>
7381	7446	<dataarea name="cass" size="10471">
7382	7447	<rom name="magneticmoon-pt3_be(1987)(elk).uef" size="10471" crc="bfc74912" sha1="9a383a100997b3dcc7eab19b07ef3f93c1017177" offset="0" />
7383	7448	</dataarea>
r250251	r250252
7431	7496	<software name="maprally">
7432	7497	<description>Map Rally</description>
7433	7498	<year>198?</year>
7434		<publisher>Bourne</publisher>
	7499	<publisher>Bourne Educational Software</publisher>
7435	7500	<part name="cass" interface="bbc_cass">
7436	7501	<dataarea name="cass" size="6957">
7437	7502	<rom name="maprally(bourne).uef" size="6957" crc="ece25693" sha1="7f4a1dc179ded6606cca053392c79eafb9772b26" offset="0" />
r250251	r250252
7563	7628	</software>
7564	7629
7565	7630	<software name="megapoca">
7566		<description>Mega Apocalypse</description>
7567		<year>198?</year>
	7631	<description>Mega-Apocalypse</description>
	7632	<year>1988</year>
7568	7633	<publisher>Martech</publisher>
7569	7634	<part name="cass" interface="bbc_cass">
7570	7635	<dataarea name="cass" size="16408">
r250251	r250252
7643	7708
7644	7709	<software name="mexico86">
7645	7710	<description>Mexico 86</description>
7646		<year>198?</year>
	7711	<year>1986</year>
7647	7712	<publisher>Qualsoft</publisher>
7648	7713	<part name="cass1" interface="bbc_cass">
	7714	<feature name="part_id" value="Finals"/>
7649	7715	<dataarea name="cass" size="8625">
7650	7716	<rom name="mexico86-finals(qualsoft).uef" size="8625" crc="633204a9" sha1="f75d4fcad28baf3ea9b03cb67cc9d28fa174c174" offset="0" />
7651	7717	</dataarea>
7652	7718	</part>
7653	7719	<part name="cass2" interface="bbc_cass">
	7720	<feature name="part_id" value="Qualifiers"/>
7654	7721	<dataarea name="cass" size="8727">
7655	7722	<rom name="mexico86-qualifiers(qualsoft).uef" size="8727" crc="c7e20a5e" sha1="7f2988fe361ecc184a238e09092ede3ceec12447" offset="0" />
7656	7723	</dataarea>
r250251	r250252
7816	7883	<software name="missatta">
7817	7884	<description>Missile Attack</description>
7818	7885	<year>1983</year>
7819		<publisher>Doctorsoft</publisher>
	7886	<publisher>Doctor Soft</publisher>
7820	7887	<part name="cass" interface="bbc_cass">
7821	7888	<dataarea name="cass" size="11379">
7822	7889	<rom name="missileattack(1983)(doctorsoft).uef" size="11379" crc="b6ac6d65" sha1="2c1a1e835e25cfebb3bd7a1d06e034529299a18d" offset="0" />
r250251	r250252
8042	8109	<year>198?</year>
8043	8110	<publisher>Slippery Slug</publisher>
8044	8111	<part name="cass1" interface="bbc_cass">
	8112	<feature name="part_id" value="Demonstration"/>
8045	8113	<dataarea name="cass" size="15741">
8046	8114	<rom name="moviemaker-demonstrationmovie(slippery).uef" size="15741" crc="5b34d6de" sha1="cd59f700e7f4374e6d73922f36bb70536cc1cc10" offset="0" />
8047	8115	</dataarea>
8048	8116	</part>
8049	8117	<part name="cass2" interface="bbc_cass">
	8118	<feature name="part_id" value="Introductory"/>
8050	8119	<dataarea name="cass" size="15809">
8051	8120	<rom name="moviemaker-introductorymovie_run(slippery).uef" size="15809" crc="a0f9acab" sha1="87e75d1ac034ebad36569d7ee83eb67405908eb2" offset="0" />
8052	8121	</dataarea>
r250251	r250252
8168	8237	<year>198?</year>
8169	8238	<publisher>Hybrid</publisher>
8170	8239	<part name="cass1" interface="bbc_cass">
	8240	<feature name="part_id" value="Side 1"/>
8171	8241	<dataarea name="cass" size="16132">
8172	8242	<rom name="music500-side1(hybrid).uef" size="16132" crc="3f32bb08" sha1="4f4124f5e63102f571e98ff325756126691586b1" offset="0" />
8173	8243	</dataarea>
8174	8244	</part>
8175	8245	<part name="cass2" interface="bbc_cass">
	8246	<feature name="part_id" value="Side 2"/>
8176	8247	<dataarea name="cass" size="13053">
8177	8248	<rom name="music500-side2(hybrid).uef" size="13053" crc="0e2d2db4" sha1="9a6b049efc3831e289915fe7479f0534858c4413" offset="0" />
8178	8249	</dataarea>
r250251	r250252
8184	8255	<year>19??</year>
8185	8256	<publisher>GTM</publisher>
8186	8257	<part name="cass1" interface="bbc_cass">
	8258	<feature name="part_id" value="Instructions"/>
8187	8259	<dataarea name="cass" size="10762">
8188	8260	<rom name="musicmaestro-instructions(gtm).uef" size="10762" crc="288b3e9b" sha1="ab7782e69a1fb77bf9b6cf4d52ae4c4da2dc97e0" offset="0" />
8189	8261	</dataarea>
r250251	r250252
8200	8272	<year>19??</year>
8201	8273	<publisher>Duckworth</publisher>
8202	8274	<part name="cass1" interface="bbc_cass">
	8275	<feature name="part_id" value="Side 1"/>
8203	8276	<dataarea name="cass" size="9912">
8204	8277	<rom name="musictools-side1(duckworth).uef" size="9912" crc="5cccd131" sha1="b671b05c09d4f7260d19b6458b902f294457de39" offset="0" />
8205	8278	</dataarea>
8206	8279	</part>
8207	8280	<part name="cass2" interface="bbc_cass">
	8281	<feature name="part_id" value="Side 2"/>
8208	8282	<dataarea name="cass" size="7682">
8209	8283	<rom name="musictools-side2(duckworth).uef" size="7682" crc="2429da82" sha1="db32006d5dabf9b41506e099e5768da2aa8ee426" offset="0" />
8210	8284	</dataarea>
r250251	r250252
8315	8389	<year>19??</year>
8316	8390	<publisher>Central Computing</publisher>
8317	8391	<part name="cass1" interface="bbc_cass">
	8392	<feature name="part_id" value="Side One"/>
8318	8393	<dataarea name="cass" size="18314">
8319	8394	<rom name="mysteryofthelostsheep-sideone(central).uef" size="18314" crc="3e5b7ef9" sha1="cfa4aba39083042f5df83e6314f27e08b43337f4" offset="0" />
8320	8395	</dataarea>
8321	8396	</part>
8322	8397	<part name="cass2" interface="bbc_cass">
	8398	<feature name="part_id" value="Side Two"/>
8323	8399	<dataarea name="cass" size="20179">
8324	8400	<rom name="mysteryofthelostsheep-sidetwo(central).uef" size="20179" crc="2e8c19d3" sha1="5a4cde7ad2709cd9d0274abf68ef3953092adb81" offset="0" />
8325	8401	</dataarea>
r250251	r250252
8450	8526
8451	8527	<software name="notapenn">
8452	8528	<description>Not a Penny More, Not a Penny Less</description>
8453		<year>198?</year>
	8529	<year>1987</year>
8454	8530	<publisher>Domark</publisher>
8455	8531	<part name="cass" interface="bbc_cass">
8456	8532	<dataarea name="cass" size="68039">
r250251	r250252
8548	8624	</software>
8549	8625
8550	8626	<software name="osprey">
8551		<description>Osprey</description>
8552		<year>19??</year>
8553		<publisher>Bourne</publisher>
	8627	<description>Osprey!</description>
	8628	<year>198?</year>
	8629	<publisher>Bourne Educational Software</publisher>
8554	8630	<part name="cass" interface="bbc_cass">
8555	8631	<dataarea name="cass" size="7916">
8556	8632	<rom name="osprey(bourne).uef" size="7916" crc="68b80b6e" sha1="f9ad3d68e48cb562ed9c435e21cc2ea416a143e8" offset="0" />
r250251	r250252
8869	8945
8870	8946	<software name="phancomb">
8871	8947	<description>Phantom Combat</description>
8872		<year>1986</year>
8873		<publisher>Doctorsoft</publisher>
	8948	<year>1985</year>
	8949	<publisher>Doctor Soft</publisher>
8874	8950	<part name="cass" interface="bbc_cass">
8875	8951	<dataarea name="cass" size="10039">
8876	8952	<rom name="phantomcombat(1986)(doctorsoft).uef" size="10039" crc="19c21145" sha1="86d91ed1e9806a2b055c57a17af83ff94a6e8d83" offset="0" />
r250251	r250252
8972	9048	<year>1989</year>
8973	9049	<publisher>Superior Software</publisher>
8974	9050	<part name="cass1" interface="bbc_cass">
	9051	<feature name="part_id" value="Game"/>
8975	9052	<dataarea name="cass" size="25675">
8976	9053	<rom name="pipeline-game(1989)(superior).uef" size="25675" crc="b718679c" sha1="a4754c6b3c0d09902cb4736bb7ef1f972ca11a72" offset="0" />
8977	9054	</dataarea>
8978	9055	</part>
8979	9056	<part name="cass2" interface="bbc_cass">
	9057	<feature name="part_id" value="Mission Design"/>
8980	9058	<dataarea name="cass" size="22942">
8981	9059	<rom name="pipeline-missiondesign(1989)(superior).uef" size="22942" crc="fa044ec6" sha1="43938e8a0492c8ab39787d046f674a0a3f54a873" offset="0" />
8982	9060	</dataarea>
r250251	r250252
8984	9062	</software>
8985	9063
8986	9064	<software name="pipemani">
8987		<description>Pipemania</description>
8988		<year>1988</year>
8989		<publisher>Superior Software</publisher>
	9065	<description>Pipe Mania</description>
	9066	<year>1989</year>
	9067	<publisher>Empire</publisher>
8990	9068	<info name="usage" value="Load with *RUN" />
8991	9069	<part name="cass" interface="bbc_cass">
8992	9070	<dataarea name="cass" size="20634">
8993		<rom name="pipemania_run(1988)(superior).uef" size="20634" crc="eb205617" sha1="9e98e9d12b5e453c064119b60dcaadec8c95437d" offset="0" />
	9071	<rom name="pipemania_run(1988)(empire).uef" size="20634" crc="eb205617" sha1="9e98e9d12b5e453c064119b60dcaadec8c95437d" offset="0" />
8994	9072	</dataarea>
8995	9073	</part>
8996	9074	</software>
r250251	r250252
9667	9745	<year>1987</year>
9668	9746	<publisher>Elk Adventure Club</publisher>
9669	9747	<part name="cass1" interface="bbc_cass">
	9748	<feature name="part_id" value="Part 1"/>
9670	9749	<dataarea name="cass" size="14192">
9671	9750	<rom name="reluctanthero-pt1_be(1987)(elk).uef" size="14192" crc="a723bbaa" sha1="e1c97335a5e85253014f03998925c7d6ca99c588" offset="0" />
9672	9751	</dataarea>
9673	9752	</part>
9674	9753	<part name="cass2" interface="bbc_cass">
	9754	<feature name="part_id" value="Part 2"/>
9675	9755	<dataarea name="cass" size="11070">
9676	9756	<rom name="reluctanthero-pt2_be(1987)(elk).uef" size="11070" crc="1e9a871b" sha1="b2245e11105e4513f164d9ce80ab54d15cd758b3" offset="0" />
9677	9757	</dataarea>
r250251	r250252
9883	9963	<year>1986</year>
9884	9964	<publisher>Robico</publisher>
9885	9965	<part name="cass1" interface="bbc_cass">
	9966	<feature name="part_id" value="Rick Hanson"/>
9886	9967	<dataarea name="cass" size="20174">
9887	9968	<rom name="rht1-rickhanson(1986)(robico).uef" size="20174" crc="4d032d45" sha1="393658b5d54aeff21cf77f90bf04cd6119753f9f" offset="0" />
9888	9969	</dataarea>
9889	9970	</part>
9890	9971	<part name="cass2" interface="bbc_cass">
	9972	<feature name="part_id" value="Project Thesius"/>
9891	9973	<dataarea name="cass" size="17256">
9892	9974	<rom name="rht2-projectthesius(1986)(robico).uef" size="17256" crc="36b903df" sha1="7a186a3140e071371a8543f91248fa020f73791c" offset="0" />
9893	9975	</dataarea>
9894	9976	</part>
9895	9977	<part name="cass3" interface="bbc_cass">
	9978	<feature name="part_id" value="Myorem"/>
9896	9979	<dataarea name="cass" size="21687">
9897	9980	<rom name="rht3-myorem(1986)(robico).uef" size="21687" crc="3367bc9a" sha1="2ad6f4349c9db4b90aafc52ba0fe0068e703db59" offset="0" />
9898	9981	</dataarea>
r250251	r250252
9949	10032	<publisher>Larsoft</publisher>
9950	10033	<info name="usage" value="Load with *RUN" />
9951	10034	<part name="cass1" interface="bbc_cass">
	10035	<feature name="part_id" value="The Prophecy"/>
9952	10036	<dataarea name="cass" size="9223">
9953	10037	<rom name="ros1-theprophecy_run_be(1984)(larsoft).uef" size="9223" crc="f7899448" sha1="3052ff98547e3d1af8a417282db8d1d89d92a963" offset="0" />
9954	10038	</dataarea>
9955	10039	</part>
9956	10040	<part name="cass2" interface="bbc_cass">
	10041	<feature name="part_id" value="Return of the Warrior"/>
9957	10042	<dataarea name="cass" size="10509">
9958	10043	<rom name="ros2-returnofthewarrior_run_be(1984)(larsoft).uef" size="10509" crc="3ba81ddc" sha1="984b771e4acfa0cdf334c93d790104b54a1f63c5" offset="0" />
9959	10044	</dataarea>
r250251	r250252
10091	10176	<publisher>Elk Adventure Club</publisher>
10092	10177	<info name="usage" value="Load with *RUN" />
10093	10178	<part name="cass1" interface="bbc_cass">
	10179	<feature name="part_id" value="Part 1"/>
10094	10180	<dataarea name="cass" size="12915">
10095	10181	<rom name="rohaktheswordsman-pt1_be(1987)(elk).uef" size="12915" crc="a96635d9" sha1="03d906ac5a6df1c95b7814710b5db0524e7dcfc0" offset="0" />
10096	10182	</dataarea>
10097	10183	</part>
10098	10184	<part name="cass2" interface="bbc_cass">
	10185	<feature name="part_id" value="Part 2"/>
10099	10186	<dataarea name="cass" size="10388">
10100	10187	<rom name="rohaktheswordsman-pt2_run_be(1987)(elk).uef" size="10388" crc="203423dd" sha1="da7d0ffefe738a31834fcb7b18636cd7fb1c0809" offset="0" />
10101	10188	</dataarea>
10102	10189	</part>
10103	10190	<part name="cass3" interface="bbc_cass">
	10191	<feature name="part_id" value="Part 3"/>
10104	10192	<dataarea name="cass" size="10530">
10105	10193	<rom name="rohaktheswordsman-pt3_run_be(1987)(elk).uef" size="10530" crc="e9e6fae7" sha1="e75c6deea3ba3cad12d8fa818939220251cff156" offset="0" />
10106	10194	</dataarea>
10107	10195	</part>
10108	10196	<part name="cass4" interface="bbc_cass">
	10197	<feature name="part_id" value="Part 4"/>
10109	10198	<dataarea name="cass" size="10535">
10110	10199	<rom name="rohaktheswordsman-pt4_run_be(1987)(elk).uef" size="10535" crc="98f13055" sha1="3ca8831ac63c1a88a24acd4db209dc922732041e" offset="0" />
10111	10200	</dataarea>
r250251	r250252
10271	10360	<year>1984</year>
10272	10361	<publisher>Triffid Software</publisher>
10273	10362	<part name="cass1" interface="bbc_cass">
	10363	<feature name="part_id" value="Character Generator"/>
10274	10364	<dataarea name="cass" size="8749">
10275	10365	<rom name="runemagicadv1-charactergenerator(triffid).uef" size="8749" crc="d1d81b63" sha1="2c807027b60cf20d60bb982306328bee15217561" offset="0" />
10276	10366	</dataarea>
10277	10367	</part>
10278	10368	<part name="cass2" interface="bbc_cass">
	10369	<feature name="part_id" value="Secret River"/>
10279	10370	<dataarea name="cass" size="15120">
10280	10371	<rom name="runemagicadv1-secretriver(triffid).uef" size="15120" crc="273b76ce" sha1="981c0b196ee4c4744fa08d9f13b734c854e10890" offset="0" />
10281	10372	</dataarea>
r250251	r250252
10287	10378	<year>1984</year>
10288	10379	<publisher>Triffid Software</publisher>
10289	10380	<part name="cass" interface="bbc_cass">
	10381	<feature name="part_id" value="Wizard's Citadel"/>
10290	10382	<dataarea name="cass" size="13980">
10291	10383	<rom name="runemagicadv2-wizardscitadel(triffid).uef" size="13980" crc="54705431" sha1="fab56a3d8d94419e295823d620d473e2f1da7d05" offset="0" />
10292	10384	</dataarea>
r250251	r250252
10739	10831
10740	10832	<software name="skirmish">
10741	10833	<description>Skirmish</description>
10742		<year>19??</year>
	10834	<year>1988</year>
10743	10835	<publisher>Godax</publisher>
10744	10836	<part name="cass" interface="bbc_cass">
10745	10837	<dataarea name="cass" size="22110">
r250251	r250252
11036	11128	<year>198?</year>
11037	11129	<publisher>Qualsoft</publisher>
11038	11130	<part name="cass1" interface="bbc_cass">
	11131	<feature name="part_id" value="Data"/>
11039	11132	<dataarea name="cass" size="2857">
11040	11133	<rom name="soccersupremo-data(qualsoft).uef" size="2857" crc="afe54b24" sha1="e7c29f3a71383d721413fbcd90625cf7181d088e" offset="0" />
11041	11134	</dataarea>
11042	11135	</part>
11043	11136	<part name="cass2" interface="bbc_cass">
	11137	<feature name="part_id" value="Division One"/>
11044	11138	<dataarea name="cass" size="9062">
11045	11139	<rom name="soccersupremo-division1(qualsoft).uef" size="9062" crc="a7a844f9" sha1="19bcaa0c7879fdd0b8305a630d83d4eab175ecd4" offset="0" />
11046	11140	</dataarea>
11047	11141	</part>
11048	11142	<part name="cass3" interface="bbc_cass">
	11143	<feature name="part_id" value="Euro Cups"/>
11049	11144	<dataarea name="cass" size="7793">
11050	11145	<rom name="soccersupremo-eurocups(qualsoft).uef" size="7793" crc="182792a9" sha1="15ad8c55cd09709f1c323b2f6f437044e8be4ec0" offset="0" />
11051	11146	</dataarea>
r250251	r250252
11259	11354
11260	11355	<software name="spshuttm">
11261	11356	<description>Space Shuttle (Microdeal)</description>
11262		<year>198?</year>
	11357	<year>1983</year>
11263	11358	<publisher>Microdeal</publisher>
11264	11359	<part name="cass" interface="bbc_cass">
11265	11360	<dataarea name="cass" size="7465">
r250251	r250252
11340	11435	<year>198?</year>
11341	11436	<publisher>Sullis</publisher>
11342	11437	<part name="cass1" interface="bbc_cass">
	11438	<feature name="part_id" value="Tape 1"/>
11343	11439	<dataarea name="cass" size="14151">
11344	11440	<rom name="spellboundbeseiged-tape1(sullis).uef" size="14151" crc="b6aca196" sha1="3935d2c6f8cf1b37eb11a79587de4413aa93fce2" offset="0" />
11345	11441	</dataarea>
11346	11442	</part>
11347	11443	<part name="cass2" interface="bbc_cass">
	11444	<feature name="part_id" value="Tape 2"/>
11348	11445	<dataarea name="cass" size="13746">
11349	11446	<rom name="spellboundbeseiged-tape2(sullis).uef" size="13746" crc="f1d787b2" sha1="8885169ac9ecc83bb87c4a1abba83a17b7456740" offset="0" />
11350	11447	</dataarea>
r250251	r250252
11456	11553	<year>1990</year>
11457	11554	<publisher>CDS</publisher>
11458	11555	<part name="cass1" interface="bbc_cass">
	11556	<feature name="part_id" value="Tape 1"/>
11459	11557	<dataarea name="cass" size="38897">
11460	11558	<rom name="sportingtrianglescassette1_be(1990)(cds).uef" size="38897" crc="c37b2b57" sha1="30bbc74cce8ac3662e3243e9369533068d8db52e" offset="0" />
11461	11559	</dataarea>
11462	11560	</part>
11463	11561	<part name="cass2" interface="bbc_cass">
	11562	<feature name="part_id" value="Tape 2"/>
11464	11563	<dataarea name="cass" size="46327">
11465	11564	<rom name="sportingtrianglescassette2_be(1990)(cds).uef" size="46327" crc="9481e84b" sha1="f27c48b6cb378b401578a4d112b56448d550b06d" offset="0" />
11466	11565	</dataarea>
r250251	r250252
11472	11571	<year>1988</year>
11473	11572	<publisher>Alternative</publisher>
11474	11573	<part name="cass1" interface="bbc_cass">
	11574	<feature name="part_id" value="Side 1"/>
11475	11575	<dataarea name="cass" size="30437">
11476	11576	<rom name="sportspectacular-side1_be(1988)(alternative).uef" size="30437" crc="5bd5966d" sha1="524f7ba974eda2de1c4ab24668a9f0a8ab6d3080" offset="0" />
11477	11577	</dataarea>
11478	11578	</part>
11479	11579	<part name="cass2" interface="bbc_cass">
	11580	<feature name="part_id" value="Side 2"/>
11480	11581	<dataarea name="cass" size="27849">
11481	11582	<rom name="sportspectacular-side2_be(1988)(alternative).uef" size="27849" crc="fff1292a" sha1="e29188ab795d065033e543fdc3afc8a00d41d35e" offset="0" />
11482	11583	</dataarea>
r250251	r250252
11605	11706	</software>
11606	11707
11607	11708	<software name="starflen">
11608		<description>Star Fleet Encounter</description>
	11709	<description>Starfleet Encounter</description>
11609	11710	<year>1984</year>
11610	11711	<publisher>Micro Power</publisher>
11611	11712	<part name="cass" interface="bbc_cass">
r250251	r250252
11684	11785
11685	11786	<software name="starquak">
11686	11787	<description>Star Quake</description>
11687		<year>19??</year>
	11788	<year>1987</year>
11688	11789	<publisher>Bubble Bus</publisher>
11689	11790	<part name="cass" interface="bbc_cass">
11690	11791	<dataarea name="cass" size="40808">
r250251	r250252
11732	11833	<year>1987</year>
11733	11834	<publisher>Elk Adventure Club</publisher>
11734	11835	<part name="cass1" interface="bbc_cass">
	11836	<feature name="part_id" value="Part 1"/>
11735	11837	<dataarea name="cass" size="12656">
11736	11838	<rom name="starshipquest-pt1_be(1987)(elk).uef" size="12656" crc="01577bd6" sha1="3b6173f5a48d92b95daa4e2247400717edfa1439" offset="0" />
11737	11839	</dataarea>
11738	11840	</part>
11739	11841	<part name="cass2" interface="bbc_cass">
	11842	<feature name="part_id" value="Part 2"/>
11740	11843	<dataarea name="cass" size="10241">
11741	11844	<rom name="starshipquest-pt2_be(1987)(elk).uef" size="10241" crc="36a649cf" sha1="1fa123d966b27be8e23b884f1a35faa8c96f3ae8" offset="0" />
11742	11845	</dataarea>
11743	11846	</part>
11744	11847	<part name="cass3" interface="bbc_cass">
	11848	<feature name="part_id" value="Part 3"/>
11745	11849	<dataarea name="cass" size="10653">
11746	11850	<rom name="starshipquest-pt3_be(1987)(elk).uef" size="10653" crc="c37fd2e4" sha1="10716471f6dfee7e969c5d93e8103d1752c06ec0" offset="0" />
11747	11851	</dataarea>
r250251	r250252
11964	12068	<year>19??</year>
11965	12069	<publisher>Central Computing</publisher>
11966	12070	<part name="cass1" interface="bbc_cass">
	12071	<feature name="part_id" value="Side One"/>
11967	12072	<dataarea name="cass" size="15755">
11968	12073	<rom name="streetpatroller-sideone(central).uef" size="15755" crc="3c80f7ad" sha1="e44925b30162f5671c05c08c315b44b8aea66af7" offset="0" />
11969	12074	</dataarea>
11970	12075	</part>
11971	12076	<part name="cass2" interface="bbc_cass">
	12077	<feature name="part_id" value="Side Two"/>
11972	12078	<dataarea name="cass" size="7153">
11973	12079	<rom name="streetpatroller-sidetwo(central).uef" size="7153" crc="dc47efc6" sha1="e11d07f0d0e54dbdfd682881c5644ee3380ed28a" offset="0" />
11974	12080	</dataarea>
r250251	r250252
11981	12087	<year>19??</year>
11982	12088	<publisher>Central Computing</publisher>
11983	12089	<part name="cass1" interface="bbc_cass">
	12090	<feature name="part_id" value="Side One"/>
11984	12091	<dataarea name="cass" size="23899">
11985	12092	<rom name="streetpatrollertheremix-sideone(central).uef" size="23899" crc="4fbccc21" sha1="646e5e7b4d2680c3beba590822810bdae7e65d3e" offset="0" />
11986	12093	</dataarea>
11987	12094	</part>
11988	12095	<part name="cass2" interface="bbc_cass">
	12096	<feature name="part_id" value="Side Two"/>
11989	12097	<dataarea name="cass" size="16446">
11990	12098	<rom name="streetpatrollertheremix-sidetwo(central).uef" size="16446" crc="f4f1db25" sha1="95335a56e2e72562effc89a6d2121d46ad930c36" offset="0" />
11991	12099	</dataarea>
r250251	r250252
12015	12123	</software>
12016	12124
12017	12125	<software name="strykrun">
12018		<description>Strykers Run</description>
	12126	<description>Stryker's Run</description>
12019	12127	<year>1986</year>
12020	12128	<publisher>Superior Software</publisher>
12021	12129	<part name="cass" interface="bbc_cass">
r250251	r250252
12063	12171	<year>1986</year>
12064	12172	<publisher>Riverdale</publisher>
12065	12173	<part name="cass1" interface="bbc_cass">
	12174	<feature name="part_id" value="Part 1"/>
12066	12175	<dataarea name="cass" size="10780">
12067	12176	<rom name="suds-pt1_be(1986)(riverdale).uef" size="10780" crc="76d35920" sha1="c895df01063eaf068e860c6d21ac4191edefd157" offset="0" />
12068	12177	</dataarea>
12069	12178	</part>
12070	12179	<part name="cass2" interface="bbc_cass">
	12180	<feature name="part_id" value="Part 2"/>
12071	12181	<dataarea name="cass" size="9860">
12072	12182	<rom name="suds-pt2_be(1986)(riverdale).uef" size="9860" crc="a65f7dba" sha1="f0501a881ffb55460efb60a6d3e3e01dbb8ac808" offset="0" />
12073	12183	</dataarea>
12074	12184	</part>
12075	12185	<part name="cass3" interface="bbc_cass">
	12186	<feature name="part_id" value="Part 3"/>
12076	12187	<dataarea name="cass" size="9081">
12077	12188	<rom name="suds-pt3_be(1986)(riverdale).uef" size="9081" crc="664a6f48" sha1="9bd6d372a82a4a0d0f5ca6752cecf055d70fbaa6" offset="0" />
12078	12189	</dataarea>
12079	12190	</part>
12080	12191	<part name="cass4" interface="bbc_cass">
	12192	<feature name="part_id" value="Part 4" />
12081	12193	<dataarea name="cass" size="9271">
12082	12194	<rom name="suds-pt4_be(1986)(riverdale).uef" size="9271" crc="6d0ceb39" sha1="367229021238c2910c9feda6f3cf1217fba0dd36" offset="0" />
12083	12195	</dataarea>
r250251	r250252
12377	12489
12378	12490	<software name="tarzanm">
12379	12491	<description>Tarzan (Martech)</description>
12380		<year>198?</year>
	12492	<year>1987</year>
12381	12493	<publisher>Martech</publisher>
12382	12494	<part name="cass" interface="bbc_cass">
12383	12495	<dataarea name="cass" size="15611">
r250251	r250252
12468	12580	<year>198?</year>
12469	12581	<publisher>CRL</publisher>
12470	12582	<part name="cass1" interface="bbc_cass">
	12583	<feature name="part_id" value="Side 1"/>
12471	12584	<dataarea name="cass" size="10033">
12472	12585	<rom name="testmatch-v2-side1(crl).uef" size="10033" crc="9b3930ec" sha1="47e29d64a4241beaeceb4fa1894fdb1a90244988" offset="0" />
12473	12586	</dataarea>
12474	12587	</part>
12475	12588	<part name="cass2" interface="bbc_cass">
	12589	<feature name="part_id" value="Side 2"/>
12476	12590	<dataarea name="cass" size="10485">
12477	12591	<rom name="testmatch-v2-side2(crl).uef" size="10485" crc="0caee081" sha1="556db26d207f271033e616a362d278177bfcae64" offset="0" />
12478	12592	</dataarea>
r250251	r250252
12484	12598	<year>198?</year>
12485	12599	<publisher>CRL</publisher>
12486	12600	<part name="cass1" interface="bbc_cass">
	12601	<feature name="part_id" value="Side 1"/>
12487	12602	<dataarea name="cass" size="10040">
12488	12603	<rom name="testmatch-side1(crl).uef" size="10040" crc="30cee921" sha1="62aa386bbc10aefba6fcd42a854fc3535282f733" offset="0" />
12489	12604	</dataarea>
12490	12605	</part>
12491	12606	<part name="cass2" interface="bbc_cass">
	12607	<feature name="part_id" value="Side 2"/>
12492	12608	<dataarea name="cass" size="7989">
12493	12609	<rom name="testmatch-side2(crl).uef" size="7989" crc="6d5979e6" sha1="3b0db0cd3e8e129185544ff7f965ea1cc26cac96" offset="0" />
12494	12610	</dataarea>
r250251	r250252
12556	12672	<year>1989</year>
12557	12673	<publisher>Impact</publisher>
12558	12674	<part name="cass1" interface="bbc_cass">
	12675	<feature name="part_id" value="Side 1 MODE4"/>
12559	12676	<dataarea name="cass" size="12647">
12560	12677	<rom name="theartstudio-side1mode4_be(1989)(impact).uef" size="12647" crc="df5049f8" sha1="cb37bd80c626f88e2de6d3b05838606ecff7ca5f" offset="0" />
12561	12678	</dataarea>
12562	12679	</part>
12563	12680	<part name="cass2" interface="bbc_cass">
	12681	<feature name="part_id" value="Side 2 MODE5"/>
12564	12682	<dataarea name="cass" size="13064">
12565	12683	<rom name="theartstudio-side2mode5_be(1989(impact).uef" size="13064" crc="22ab434f" sha1="a2e8a9373ca60f576d16e795e82e3e8eacd62595" offset="0" />
12566	12684	</dataarea>
r250251	r250252
12613	12731
12614	12732	<software name="dambustr">
12615	12733	<description>The Dam Busters</description>
12616		<year>198?</year>
	12734	<year>1985</year>
12617	12735	<publisher>U.S. Gold</publisher>
12618	12736	<part name="cass" interface="bbc_cass">
12619	12737	<dataarea name="cass" size="11310">
r250251	r250252
12627	12745	<year>1988</year>
12628	12746	<publisher>DW Gore</publisher>
12629	12747	<part name="cass1" interface="bbc_cass">
	12748	<feature name="part_id" value="Part 1"/>
12630	12749	<dataarea name="cass" size="11465">
12631	12750	<rom name="thefourwands-pt1_be(dwgore).uef" size="11465" crc="eebae37b" sha1="ee18f1b8a6332fd572d6d32a2b2e107d0d3360ff" offset="0" />
12632	12751	</dataarea>
12633	12752	</part>
12634	12753	<part name="cass2" interface="bbc_cass">
	12754	<feature name="part_id" value="Part 2"/>
12635	12755	<dataarea name="cass" size="10749">
12636	12756	<rom name="thefourwands-pt2_be(dwgore).uef" size="10749" crc="3e8821a5" sha1="10ff75d238cf636203dd38d728b0d48d75d4ba1b" offset="0" />
12637	12757	</dataarea>
12638	12758	</part>
12639	12759	<part name="cass3" interface="bbc_cass">
	12760	<feature name="part_id" value="Part 3"/>
12640	12761	<dataarea name="cass" size="10891">
12641	12762	<rom name="thefourwands-pt3_be(dwgore).uef" size="10891" crc="aaf524a2" sha1="ebf1f5611a32cb3ca91a7df834275deea1fa598f" offset="0" />
12642	12763	</dataarea>
r250251	r250252
12659	12780	<year>198?</year>
12660	12781	<publisher>Quicksilva</publisher>
12661	12782	<part name="cass1" interface="bbc_cass">
	12783	<feature name="part_id" value="Character Generator"/>
12662	12784	<dataarea name="cass" size="3762">
12663	12785	<rom name="tg-charactergenerator(quicksilva).uef" size="3762" crc="cae70c3b" sha1="c9fd1a732bccf92fe944320157b64778c4f05248" offset="0" />
12664	12786	</dataarea>
12665	12787	</part>
12666	12788	<part name="cass2" interface="bbc_cass">
	12789	<feature name="part_id" value="Teletext Generator"/>
12667	12790	<dataarea name="cass" size="7514">
12668	12791	<rom name="tg-teletextgenerator(quicksilva).uef" size="7514" crc="8c0ab1e7" sha1="e7a97dc451d54867d7ad20c093004361195d850d" offset="0" />
12669	12792	</dataarea>
r250251	r250252
13022	13145	<year>1983</year>
13023	13146	<publisher>Gemini</publisher>
13024	13147	<part name="cass1" interface="bbc_cass">
	13148	<feature name="part_id" value="Accordian"/>
13025	13149	<dataarea name="cass" size="2672">
13026	13150	<rom name="tg-accordian_be(1983)(gemini).uef" size="2672" crc="3a620f75" sha1="5c1fda51b7d6211cf87a6f8f3a1ca0878bb7ad61" offset="0" />
13027	13151	</dataarea>
13028	13152	</part>
13029	13153	<part name="cass2" interface="bbc_cass">
	13154	<feature name="part_id" value="Backgammon"/>
13030	13155	<dataarea name="cass" size="4723">
13031	13156	<rom name="tg-backgammon_be(1983)(gemini).uef" size="4723" crc="a4fc635e" sha1="cad405c987c8bf72eeed6b19ea577e8e59372b85" offset="0" />
13032	13157	</dataarea>
13033	13158	</part>
13034	13159	<part name="cass3" interface="bbc_cass">
	13160	<feature name="part_id" value="Gin Rummy"/>
13035	13161	<dataarea name="cass" size="3995">
13036	13162	<rom name="tg-ginrummy_be(1983)(gemini).uef" size="3995" crc="65cdb3a0" sha1="326394f88256f77849a3275772c5cc40fb8588d1" offset="0" />
13037	13163	</dataarea>
13038	13164	</part>
13039	13165	<part name="cass4" interface="bbc_cass">
	13166	<feature name="part_id" value="Piquet"/>
13040	13167	<dataarea name="cass" size="4129">
13041	13168	<rom name="tg-piquet_be(1983)(gemini).uef" size="4129" crc="e6755a3b" sha1="0ce6c4e3c0a361216d2a2737f216f715667abddd" offset="0" />
13042	13169	</dataarea>
r250251	r250252
13115	13242	<year>1988</year>
13116	13243	<publisher>Alternative</publisher>
13117	13244	<part name="cass1" interface="bbc_cass">
	13245	<feature name="part_id" value="Bunny Blitz"/>
13118	13246	<dataarea name="cass" size="1660">
13119	13247	<rom name="td10-bunnyblitz_be(1988)(alternative).uef" size="1660" crc="99f1a92b" sha1="abecf28d379e97dd2b436996713a16e995e75d6d" offset="0" />
13120	13248	</dataarea>
13121	13249	</part>
13122	13250	<part name="cass2" interface="bbc_cass">
	13251	<feature name="part_id" value="Money Maze"/>
13123	13252	<dataarea name="cass" size="2856">
13124	13253	<rom name="td10-moneymaze_be(1988)(alternative).uef" size="2856" crc="63772dac" sha1="12ab136d164ff5e4229df1e5386adb0d5050c4a3" offset="0" />
13125	13254	</dataarea>
13126	13255	</part>
13127	13256	<part name="cass3" interface="bbc_cass">
	13257	<feature name="part_id" value="Rockfall"/>
13128	13258	<dataarea name="cass" size="5148">
13129	13259	<rom name="td10-rockfall_be(1988)(alternative).uef" size="5148" crc="50d5a42c" sha1="e56ccb7cead9a85a9b789df1f63b7e698dfce298" offset="0" />
13130	13260	</dataarea>
r250251	r250252
13136	13266	<year>1988</year>
13137	13267	<publisher>Alternative</publisher>
13138	13268	<part name="cass1" interface="bbc_cass">
	13269	<feature name="part_id" value="Day at the Races"/>
13139	13270	<dataarea name="cass" size="3758">
13140	13271	<rom name="td1-dayattheraces_be(1988)(alternative).uef" size="3758" crc="98ad60b1" sha1="33b518d6ff7bf6aaadcd8fcbc93dcbbe8bb8288a" offset="0" />
13141	13272	</dataarea>
13142	13273	</part>
13143	13274	<part name="cass2" interface="bbc_cass">
	13275	<feature name="part_id" value="Grand Prix"/>
13144	13276	<dataarea name="cass" size="3106">
13145	13277	<rom name="td1-grandprix_be(1988)(alternative).uef" size="3106" crc="d1d4d48d" sha1="19afd5ee6c65f59502b34cf1a486b801cb9e619c" offset="0" />
13146	13278	</dataarea>
13147	13279	</part>
13148	13280	<part name="cass3" interface="bbc_cass">
	13281	<feature name="part_id" value="Manic Mole"/>
13149	13282	<dataarea name="cass" size="6029">
13150	13283	<rom name="td1-manicmole_be(1988)(alternative).uef" size="6029" crc="b7c33543" sha1="3ea65fc0b7e391c5816ee50c164869ecea9d9862" offset="0" />
13151	13284	</dataarea>
r250251	r250252
13157	13290	<year>1988</year>
13158	13291	<publisher>Alternative</publisher>
13159	13292	<part name="cass1" interface="bbc_cass">
	13293	<feature name="part_id" value="Haunted House"/>
13160	13294	<dataarea name="cass" size="6341">
13161	13295	<rom name="td2-hauntedhouse_be(1988)(alternative).uef" size="6341" crc="f220a044" sha1="974000aaf52ca543d8abee93a5dde9a7cad7c9d9" offset="0" />
13162	13296	</dataarea>
13163	13297	</part>
13164	13298	<part name="cass2" interface="bbc_cass">
	13299	<feature name="part_id" value="Invasion Force"/>
13165	13300	<dataarea name="cass" size="3817">
13166	13301	<rom name="td2-invasionforce_be(1988)(alternative).uef" size="3817" crc="1bc8de92" sha1="390a98f4ed21f804e42fdded33cc47f89dae5845" offset="0" />
13167	13302	</dataarea>
13168	13303	</part>
13169	13304	<part name="cass3" interface="bbc_cass">
	13305	<feature name="part_id" value="Parachute"/>
13170	13306	<dataarea name="cass" size="3189">
13171	13307	<rom name="td2-parachute_be(1988)(alternative).uef" size="3189" crc="f7d5340d" sha1="2765974ab62cb5c7b432271219b2267e45d33e00" offset="0" />
13172	13308	</dataarea>
r250251	r250252
13178	13314	<year>1988</year>
13179	13315	<publisher>Alternative</publisher>
13180	13316	<part name="cass1" interface="bbc_cass">
	13317	<feature name="part_id" value="Jam Butty"/>
13181	13318	<dataarea name="cass" size="4959">
13182	13319	<rom name="td3-jambutty_be(1988)(alternative).uef" size="4959" crc="e104ea68" sha1="1ece0e663d567593feec80c1e111fd308b5040d0" offset="0" />
13183	13320	</dataarea>
13184	13321	</part>
13185	13322	<part name="cass2" interface="bbc_cass">
	13323	<feature name="part_id" value="Lander"/>
13186	13324	<dataarea name="cass" size="2425">
13187	13325	<rom name="td3-lander_be(1988)(alternative).uef" size="2425" crc="556dfa34" sha1="02c14af7ac4582841c4a23dca80e028d5c2c8c87" offset="0" />
13188	13326	</dataarea>
13189	13327	</part>
13190	13328	<part name="cass3" interface="bbc_cass">
	13329	<feature name="part_id" value="Lunar Invasion"/>
13191	13330	<dataarea name="cass" size="5597">
13192	13331	<rom name="td3-lunarinvasion_be(1988)(alternative).uef" size="5597" crc="86ff28d6" sha1="086319c9695ee8d5ed1ffa8962bf5a7f5d76c2be" offset="0" />
13193	13332	</dataarea>
r250251	r250252
13199	13338	<year>1988</year>
13200	13339	<publisher>Alternative</publisher>
13201	13340	<part name="cass1" interface="bbc_cass">
	13341	<feature name="part_id" value="Fishing"/>
13202	13342	<dataarea name="cass" size="4316">
13203	13343	<rom name="td4-fishing_be(1988)(alternative).uef" size="4316" crc="30128ecd" sha1="4c1ae505585158c2e408d645ca7bcae78d00a3d7" offset="0" />
13204	13344	</dataarea>
13205	13345	</part>
13206	13346	<part name="cass2" interface="bbc_cass">
	13347	<feature name="part_id" value="Golf"/>
13207	13348	<dataarea name="cass" size="2959">
13208	13349	<rom name="td4-golf_be(1988)(alternative).uef" size="2959" crc="adaf81b4" sha1="9b3f2ec7cce0d758ee0c5f3a68ab936ee38e2f86" offset="0" />
13209	13350	</dataarea>
13210	13351	</part>
13211	13352	<part name="cass3" interface="bbc_cass">
	13353	<feature name="part_id" value="Howzat"/>
13212	13354	<dataarea name="cass" size="5319">
13213	13355	<rom name="td4-howzat_be(1988)(alternative).uef" size="5319" crc="27b76b55" sha1="af52dd65256abcdf88891fee936ee673c4e300c5" offset="0" />
13214	13356	</dataarea>
r250251	r250252
13220	13362	<year>1988</year>
13221	13363	<publisher>Alternative</publisher>
13222	13364	<part name="cass1" interface="bbc_cass">
	13365	<feature name="part_id" value="Karate Warrior"/>
13223	13366	<dataarea name="cass" size="5631">
13224	13367	<rom name="td5-karatewarrior_be(1988)(alternative).uef" size="5631" crc="121a519d" sha1="6e321d160e5ceb3757d76cdf59b7169770b074b5" offset="0" />
13225	13368	</dataarea>
13226	13369	</part>
13227	13370	<part name="cass2" interface="bbc_cass">
	13371	<feature name="part_id" value="Skramble"/>
13228	13372	<dataarea name="cass" size="6800">
13229	13373	<rom name="td5-skramble_be(1988)(alternative).uef" size="6800" crc="2d425461" sha1="7e0ab205fd8eaed8a748d0df9afc2d538e194f88" offset="0" />
13230	13374	</dataarea>
13231	13375	</part>
13232	13376	<part name="cass3" interface="bbc_cass">
	13377	<feature name="part_id" value="Starfight"/>
13233	13378	<dataarea name="cass" size="4024">
13234	13379	<rom name="td5-starfight_be(1988)(alternative).uef" size="4024" crc="b9f6cd6e" sha1="9986a532523f0faef807ba21bf32a4e12273f99f" offset="0" />
13235	13380	</dataarea>
r250251	r250252
13241	13386	<year>1988</year>
13242	13387	<publisher>Alternative</publisher>
13243	13388	<part name="cass1" interface="bbc_cass">
	13389	<feature name="part_id" value="Castles of Sand"/>
13244	13390	<dataarea name="cass" size="5703">
13245	13391	<rom name="td6-castlesofsand_be(1988)(alternative).uef" size="5703" crc="20827c9f" sha1="ea22fe3dd338cc52e58bdcd2b23b6edd6f704cdb" offset="0" />
13246	13392	</dataarea>
13247	13393	</part>
13248	13394	<part name="cass2" interface="bbc_cass">
	13395	<feature name="part_id" value="Cavern Capers"/>
13249	13396	<dataarea name="cass" size="6890">
13250	13397	<rom name="td6-caverncapers_be(1988)(alternative).uef" size="6890" crc="fa93f549" sha1="b5da4f0c96019a705449e878114bac314ee330e3" offset="0" />
13251	13398	</dataarea>
13252	13399	</part>
13253	13400	<part name="cass3" interface="bbc_cass">
	13401	<feature name="part_id" value="Snap Dragon"/>
13254	13402	<dataarea name="cass" size="4171">
13255	13403	<rom name="td6-snapdragon_be(1988)(alternative).uef" size="4171" crc="6d9369b9" sha1="428ef9cd739290973b4954653855528f0252a3f2" offset="0" />
13256	13404	</dataarea>
r250251	r250252
13262	13410	<year>1988</year>
13263	13411	<publisher>Alternative</publisher>
13264	13412	<part name="cass1" interface="bbc_cass">
	13413	<feature name="part_id" value="Atom Smash"/>
13265	13414	<dataarea name="cass" size="6959">
13266	13415	<rom name="td7-atomsmash_be(1988)(alternative).uef" size="6959" crc="29fc892b" sha1="c74b61e51a5e2eb01408d2e3a3e6d92f8dc27918" offset="0" />
13267	13416	</dataarea>
13268	13417	</part>
13269	13418	<part name="cass2" interface="bbc_cass">
	13419	<feature name="part_id" value="Knockout"/>
13270	13420	<dataarea name="cass" size="2438">
13271	13421	<rom name="td7-knockout_be(1988)(alternative).uef" size="2438" crc="b764e9d2" sha1="2e53324cc7caf04f07e89d3a29ad5d24b1e25889" offset="0" />
13272	13422	</dataarea>
13273	13423	</part>
13274	13424	<part name="cass3" interface="bbc_cass">
	13425	<feature name="part_id" value="Reaction Tester"/>
13275	13426	<dataarea name="cass" size="1206">
13276	13427	<rom name="td7-reactiontester_be(1988)(alternative).uef" size="1206" crc="97edffb0" sha1="64b747efdfba836d1e4aa3903f24b2a6d1828e3e" offset="0" />
13277	13428	</dataarea>
r250251	r250252
13283	13434	<year>1988</year>
13284	13435	<publisher>Alternative</publisher>
13285	13436	<part name="cass1" interface="bbc_cass">
	13437	<feature name="part_id" value="Break Free"/>
13286	13438	<dataarea name="cass" size="3517">
13287	13439	<rom name="td9-breakfree_be(1988)(alternative).uef" size="3517" crc="d8fb5d4b" sha1="e070e45360841c8d178b10fde9f461cef13b50e0" offset="0" />
13288	13440	</dataarea>
13289	13441	</part>
13290	13442	<part name="cass2" interface="bbc_cass">
	13443	<feature name="part_id" value="Code Breaker"/>
13291	13444	<dataarea name="cass" size="2108">
13292	13445	<rom name="td9-codebreaker_be(1988)(alternative).uef" size="2108" crc="b260db2f" sha1="b1593a47c0c991b92099a4083175e375b2e49222" offset="0" />
13293	13446	</dataarea>
13294	13447	</part>
13295	13448	<part name="cass3" interface="bbc_cass">
	13449	<feature name="part_id" value="Missile Jammer"/>
13296	13450	<dataarea name="cass" size="3223">
13297	13451	<rom name="td9-missilejammer_be(1988)(alternative).uef" size="3223" crc="8b5553da" sha1="f60628e9bf0e3d39af0767cee37750c10db37e4a" offset="0" />
13298	13452	</dataarea>
r250251	r250252
13395	13549	<year>19??</year>
13396	13550	<publisher>David McKeran</publisher>
13397	13551	<part name="cass1" interface="bbc_cass">
	13552	<feature name="part_id" value="Blockade"/>
13398	13553	<dataarea name="cass" size="1597">
13399	13554	<rom name="ug-blockade(davidmckeran).uef" size="1597" crc="e5e3b237" sha1="e0e98ed827277232427a7163c9d78ff2a892ed99" offset="0" />
13400	13555	</dataarea>
13401	13556	</part>
13402	13557	<part name="cass2" interface="bbc_cass">
	13558	<feature name="part_id" value="Nightmare Park"/>
13403	13559	<dataarea name="cass" size="5772">
13404	13560	<rom name="ug-nightmarepark(davidmckeran).uef" size="5772" crc="9dce54a4" sha1="ff61af98febaf51ebd675d060be7100c62a27b09" offset="0" />
13405	13561	</dataarea>
13406	13562	</part>
13407	13563	<part name="cass3" interface="bbc_cass">
	13564	<feature name="part_id" value="Pucman"/>
13408	13565	<dataarea name="cass" size="4260">
13409	13566	<rom name="ug-pucman(davidmckeran).uef" size="4260" crc="7bbe5a88" sha1="3ae0e563e1274219aed168c3d07fe0e914991562" offset="0" />
13410	13567	</dataarea>
13411	13568	</part>
13412	13569	<part name="cass4" interface="bbc_cass">
	13570	<feature name="part_id" value="Rockfall"/>
13413	13571	<dataarea name="cass" size="1598">
13414	13572	<rom name="ug-rockfall(davidmckeran).uef" size="1598" crc="a74823da" sha1="49bb83f5b3d1af50a87ac6df48330076457c8dc4" offset="0" />
13415	13573	</dataarea>
r250251	r250252
13824	13982
13825	13983	<software name="wknight11" cloneof="wknight">
13826	13984	<description>White Knight Mk11</description>
13827		<year>198?</year>
	13985	<year>1983</year>
13828	13986	<publisher>BBC Soft</publisher>
13829	13987	<part name="cass" interface="bbc_cass">
13830	13988	<dataarea name="cass" size="14860">
r250251	r250252
13835	13993
13836	13994	<software name="wknight">
13837	13995	<description>White Knight Mk12</description>
13838		<year>198?</year>
	13996	<year>1985</year>
13839	13997	<publisher>BBC Soft</publisher>
13840	13998	<part name="cass" interface="bbc_cass">
13841	13999	<dataarea name="cass" size="13673">
r250251	r250252
13959	14117	<software name="wolfpck3">
13960	14118	<description>Wolfpack 3</description>
13961	14119	<year>1983</year>
13962		<publisher>Doctorsoft</publisher>
	14120	<publisher>Doctor Soft</publisher>
13963	14121	<part name="cass" interface="bbc_cass">
13964	14122	<dataarea name="cass" size="7892">
13965	14123	<rom name="wolfpack3(1983)(doctorsoft).uef" size="7892" crc="64ce8d40" sha1="78dc14dde3097a346c8ecc465d86e1b99ee6f1e7" offset="0" />
r250251	r250252
14476	14634	<software name="animalve">
14477	14635	<description>Animal, Vegetable, Mineral</description>
14478	14636	<year>198?</year>
14479		<publisher>Bourne</publisher>
	14637	<publisher>Bourne Educational Software</publisher>
14480	14638	<part name="cass" interface="bbc_cass">
14481	14639	<dataarea name="cass" size="6797">
14482	14640	<rom name="animalvegetablemineral(bourne).uef" size="6797" crc="c30cb97b" sha1="69109e503cc67094ca829dea7a15ef3a85e7cd2f" offset="0" />
r250251	r250252
14489	14647	<year>198?</year>
14490	14648	<publisher>Glentop</publisher>
14491	14649	<part name="cass1" interface="bbc_cass">
	14650	<feature name="part_id" value="Side A"/>
14492	14651	<dataarea name="cass" size="4357">
14493	14652	<rom name="basicadventuresinspace-thealienplanet-sidea(glentop).uef" size="4357" crc="f7147e9f" sha1="e8d7c3cbdc60929d45bb2b04713f5ea415965f40" offset="0" />
14494	14653	</dataarea>
14495	14654	</part>
14496	14655	<part name="cass2" interface="bbc_cass">
	14656	<feature name="part_id" value="Side B"/>
14497	14657	<dataarea name="cass" size="10522">
14498	14658	<rom name="basicadventuresinspace-thealienplanet-sideb(glentop).uef" size="10522" crc="0ad0590c" sha1="75315ff323bba9ec39ebe5100a04c24adb9a528b" offset="0" />
14499	14659	</dataarea>
r250251	r250252
14505	14665	<year>198?</year>
14506	14666	<publisher>Addison-Wesley</publisher>
14507	14667	<part name="cass1" interface="bbc_cass">
	14668	<feature name="part_id" value="Side 1"/>
14508	14669	<dataarea name="cass" size="11679">
14509	14670	<rom name="basicgraphicsandsound-side1(addisonwesley).uef" size="11679" crc="c5677798" sha1="fecbf6fad0e1b73e630d6c92a3ea1940f372499c" offset="0" />
14510	14671	</dataarea>
14511	14672	</part>
14512	14673	<part name="cass2" interface="bbc_cass">
	14674	<feature name="part_id" value="Side 2"/>
14513	14675	<dataarea name="cass" size="21040">
14514	14676	<rom name="basicgraphicsandsound-side2(addisonwesley).uef" size="21040" crc="e72b6a02" sha1="49efed71b645915a374a7725d6290203cf4b0bed" offset="0" />
14515	14677	</dataarea>
r250251	r250252
14518	14680
14519	14681	<software name="bertboot">
14520	14682	<description>Bert Boot</description>
14521		<year>198?</year>
14522		<publisher>HS</publisher>
	14683	<year>1984</year>
	14684	<publisher>H.S.Software</publisher>
14523	14685	<part name="cass" interface="bbc_cass">
14524	14686	<dataarea name="cass" size="7174">
14525	14687	<rom name="bertboot(hs).uef" size="7174" crc="65f1605d" sha1="9eb8674dfebcd249576757641827dea5a4ee9495" offset="0" />
r250251	r250252
14532	14694	<year>1985</year>
14533	14695	<publisher>ASK</publisher>
14534	14696	<part name="cass1" interface="bbc_cass">
	14697	<feature name="part_id" value="Facemaker"/>
14535	14698	<dataarea name="cass" size="12006">
14536	14699	<rom name="bfl-facemaker_be(1985)(ask).uef" size="12006" crc="4543c740" sha1="0692279dbbe551a28e11f005c4a213f5bb8fa67c" offset="0" />
14537	14700	</dataarea>
14538	14701	</part>
14539	14702	<part name="cass2" interface="bbc_cass">
	14703	<feature name="part_id" value="Hide and Seek"/>
14540	14704	<dataarea name="cass" size="12919">
14541	14705	<rom name="bfl-hideandseek_be(1985)(ask).uef" size="12919" crc="b0de220e" sha1="f424e48ee6632f4fae7f5ef817925e1d73523052" offset="0" />
14542	14706	</dataarea>
14543	14707	</part>
14544	14708	<part name="cass3" interface="bbc_cass">
	14709	<feature name="part_id" value="Podd"/>
14545	14710	<dataarea name="cass" size="11435">
14546	14711	<rom name="bfl-podd_be(1985)(ask).uef" size="11435" crc="d6e3f02e" sha1="2cab0c8424189febb288df2ffbc2f2c37e9c09e8" offset="0" />
14547	14712	</dataarea>
14548	14713	</part>
14549	14714	<part name="cass4" interface="bbc_cass">
	14715	<feature name="part_id" value="Words Words Words"/>
14550	14716	<dataarea name="cass" size="13013">
14551	14717	<rom name="bfl-wordswordswords_be(1985)(ask).uef" size="13013" crc="70a0f49e" sha1="fc687cf3e45514abaebec713f168c5fd68afb72c" offset="0" />
14552	14718	</dataarea>
r250251	r250252
14580	14746	<year>198?</year>
14581	14747	<publisher>Macmillian</publisher>
14582	14748	<part name="cass1" interface="bbc_cass">
	14749	<feature name="part_id" value="Clown"/>
14583	14750	<dataarea name="cass" size="8622">
14584	14751	<rom name="cac-clown_be(macmillian).uef" size="8622" crc="7586ea21" sha1="e0e58bfefb5417cf42ea868bff9b5a69098bdeca" offset="0" />
14585	14752	</dataarea>
14586	14753	</part>
14587	14754	<part name="cass2" interface="bbc_cass">
	14755	<feature name="part_id" value="King of the Castle"/>
14588	14756	<dataarea name="cass" size="9059">
14589	14757	<rom name="cac-kingofthecastle_be(macmillian).uef" size="9059" crc="a3aa8576" sha1="c02fe5ea4c7e8c6a432b4e4d5de45d260600d900" offset="0" />
14590	14758	</dataarea>
r250251	r250252
14643	14811	<year>1985</year>
14644	14812	<publisher>Mirrorsoft</publisher>
14645	14813	<part name="cass1" interface="bbc_cass">
	14814	<feature name="part_id" value="Lollipops"/>
14646	14815	<dataarea name="cass" size="7814">
14647	14816	<rom name="cwo-lollipops_be(1985)(mirrorsoft).uef" size="7814" crc="9e494015" sha1="09feec7f7032257f335f019c254043fc83da2954" offset="0" />
14648	14817	</dataarea>
14649	14818	</part>
14650	14819	<part name="cass2" interface="bbc_cass">
	14820	<feature name="part_id" value="Toyshop"/>
14651	14821	<dataarea name="cass" size="7051">
14652	14822	<rom name="cwo-toyshop_be(1985)(mirrorsoft).uef" size="7051" crc="c2b70beb" sha1="712c3bd3f7bc5b3e59cec18190ac5f631c45f049" offset="0" />
14653	14823	</dataarea>
r250251	r250252
14780	14950	<year>198?</year>
14781	14951	<publisher>Chalksoft</publisher>
14782	14952	<part name="cass1" interface="bbc_cass">
	14953	<feature name="part_id" value="Side 1"/>
14783	14954	<dataarea name="cass" size="9992">
14784	14955	<rom name="eiffeltower-side1(chalksoft).uef" size="9992" crc="47792fb2" sha1="889248e53ea76dea9940c02d93653be27f1780e0" offset="0" />
14785	14956	</dataarea>
14786	14957	</part>
14787	14958	<part name="cass2" interface="bbc_cass">
	14959	<feature name="part_id" value="Side 2"/>
14788	14960	<dataarea name="cass" size="10004">
14789	14961	<rom name="eiffeltower-side2(chalksoft).uef" size="10004" crc="328409ab" sha1="0a9cd93111de6b9a1cf290157f3ed9711d784223" offset="0" />
14790	14962	</dataarea>
r250251	r250252
15057	15229
15058	15230	<software name="roadcft1">
15059	15231	<description>Roadcraft 1</description>
15060		<year>198?</year>
15061		<publisher>HS</publisher>
	15232	<year>1984</year>
	15233	<publisher>H.S.Software</publisher>
15062	15234	<part name="cass" interface="bbc_cass">
15063	15235	<dataarea name="cass" size="6854">
15064	15236	<rom name="roadcraft1(hs).uef" size="6854" crc="5cb6062d" sha1="6387fb7705651f3bf35ebbad8b5c1bd57393c3be" offset="0" />
r250251	r250252
15146	15318
15147	15319	<software name="timeman1">
15148	15320	<description>Timeman One</description>
15149		<year>198?</year>
15150		<publisher>Bourne</publisher>
	15321	<year>1983</year>
	15322	<publisher>Bourne Educational Software</publisher>
15151	15323	<part name="cass" interface="bbc_cass">
15152	15324	<dataarea name="cass" size="5889">
15153	15325	<rom name="timemanone(bourne).uef" size="5889" crc="724caf40" sha1="291e0410b9662e5a4f0dc7eb703a25686e029ab0" offset="0" />
r250251	r250252
15158	15330	<software name="timeman2">
15159	15331	<description>Timeman Two</description>
15160	15332	<year>198?</year>
15161		<publisher>Bourne</publisher>
	15333	<publisher>Bourne Educational Software</publisher>
15162	15334	<part name="cass" interface="bbc_cass">
15163	15335	<dataarea name="cass" size="6802">
15164	15336	<rom name="timemantwo(bourne).uef" size="6802" crc="d320af80" sha1="21c59974be9668bfc801445e885227f1f8a26571" offset="0" />
r250251	r250252
15171	15343	<year>198?</year>
15172	15344	<publisher>Macmillian</publisher>
15173	15345	<part name="cass1" interface="bbc_cass">
	15346	<feature name="part_id" value="Snakes and Ladders"/>
15174	15347	<dataarea name="cass" size="9665">
15175	15348	<rom name="tat-snakesandladders_be(macmillian).uef" size="9665" crc="1ff59a40" sha1="e43da34a97960199094fa0f379e17972ebde92b2" offset="0" />
15176	15349	</dataarea>
15177	15350	</part>
15178	15351	<part name="cass2" interface="bbc_cass">
	15352	<feature name="part_id" value="Tail End"/>
15179	15353	<dataarea name="cass" size="9392">
15180	15354	<rom name="tat-tailend_be(macmillian).uef" size="9392" crc="498e708d" sha1="ca70869eb30b1622d2933fa45aad9ef240f5da31" offset="0" />
15181	15355	</dataarea>
r250251	r250252
15229	15403
15230	15404	<software name="wordhang">
15231	15405	<description>Wordhang</description>
15232		<year>198?</year>
15233		<publisher>Bourne</publisher>
	15406	<year>1983</year>
	15407	<publisher>Bourne Educational Software</publisher>
15234	15408	<part name="cass" interface="bbc_cass">
15235	15409	<dataarea name="cass" size="8655">
15236	15410	<rom name="wordhang(bourne).uef" size="8655" crc="9d70a135" sha1="e99aa22e225f108ef2038de95d8325a2dd6c5af7" offset="0" />
r250251	r250252
15272	15446	</software>
15273	15447
15274	15448	<software name="worldwis">
15275		<description>World Wise</description>
	15449	<description>World-Wise</description>
15276	15450	<year>198?</year>
15277		<publisher>Bourne</publisher>
	15451	<publisher>Bourne Educational Software</publisher>
15278	15452	<part name="cass" interface="bbc_cass">
15279	15453	<dataarea name="cass" size="8377">
15280	15454	<rom name="worldwise(bourne).uef" size="8377" crc="c1e2ec64" sha1="e98121d7cb8d3ef7406a151ce4523db41a431699" offset="0" />
r250251	r250252
15284	15458
15285	15459	<software name="spooky">
15286	15460	<description>Spooky Manor</description>
15287		<year>198?</year>
	15461	<year>1984</year>
15288	15462	<publisher>Acornsoft</publisher>
15289	15463	<info name="release" value="E18" />
15290	15464	<part name="cass" interface="bbc_cass">
r250251	r250252
15325	15499	<year>198?</year>
15326	15500	<publisher>Macmillian</publisher>
15327	15501	<part name="cass1" interface="bbc_cass">
	15502	<feature name="part_id" value="Tape 1"/>
15328	15503	<dataarea name="cass" size="13958">
15329	15504	<rom name="assemblylanguageprogramming-tape1(macmillian).uef" size="13958" crc="307ba0e0" sha1="6acde07a24e117f9643bce2de0e5a9fff7c1295e" offset="0" />
15330	15505	</dataarea>
15331	15506	</part>
15332	15507	<part name="cass2" interface="bbc_cass">
	15508	<feature name="part_id" value="Tape 2"/>
15333	15509	<dataarea name="cass" size="16767">
15334	15510	<rom name="assemblylanguageprogramming-tape2(macmillian).uef" size="16767" crc="72841da8" sha1="652750b24001b41c610ebdfc5e7c60c75a9e7e0f" offset="0" />
15335	15511	</dataarea>
r250251	r250252
15378	15554	<year>198?</year>
15379	15555	<publisher>Macmillian</publisher>
15380	15556	<part name="cass1" interface="bbc_cass">
	15557	<feature name="part_id" value="Side 1a"/>
15381	15558	<dataarea name="cass" size="20678">
15382	15559	<rom name="advancedgraphics1a(macmillian).uef" size="20678" crc="af7b6e20" sha1="7a3caa7d2b8a20f2bb3fa988b157716119d5015d" offset="0" />
15383	15560	</dataarea>
15384	15561	</part>
15385	15562	<part name="cass2" interface="bbc_cass">
	15563	<feature name="part_id" value="Side 1b"/>
15386	15564	<dataarea name="cass" size="18346">
15387	15565	<rom name="advancedgraphics1b(macmillian).uef" size="18346" crc="2ef1b465" sha1="e6dc3f6d978acaaa8440687480d1a1bb9d6172b9" offset="0" />
15388	15566	</dataarea>
15389	15567	</part>
15390	15568	<part name="cass3" interface="bbc_cass">
	15569	<feature name="part_id" value="Side 2a"/>
15391	15570	<dataarea name="cass" size="28947">
15392	15571	<rom name="advancedgraphics2a(macmillian).uef" size="28947" crc="e16fc37c" sha1="bdd1c408dde831dd942905dbb60f8b6da8dc9741" offset="0" />
15393	15572	</dataarea>
15394	15573	</part>
15395	15574	<part name="cass4" interface="bbc_cass">
	15575	<feature name="part_id" value="Side 2b"/>
15396	15576	<dataarea name="cass" size="38985">
15397	15577	<rom name="advancedgraphics2b(macmillian).uef" size="38985" crc="5894c5f9" sha1="c7bbb763839c211791e676fc396604458ca92239" offset="0" />
15398	15578	</dataarea>
r250251	r250252
15402	15582	<software name="amxart">
15403	15583	<description>AMX Art</description>
15404	15584	<year>198?</year>
15405		<publisher>AMX</publisher>
	15585	<publisher>Advanced Memory Systems</publisher>
15406	15586	<part name="cass1" interface="bbc_cass">
	15587	<feature name="part_id" value="Side 1"/>
15407	15588	<dataarea name="cass" size="14901">
15408	15589	<rom name="amxart-side1(amx).uef" size="14901" crc="ea95cac7" sha1="e8a6d54a830ccf8cceafd8f23d680bfe8ba1a0a8" offset="0" />
15409	15590	</dataarea>
15410	15591	</part>
15411	15592	<part name="cass2" interface="bbc_cass">
	15593	<feature name="part_id" value="Side 2"/>
15412	15594	<dataarea name="cass" size="5876">
15413	15595	<rom name="amxart-side2(amx).uef" size="5876" crc="3e9dbe35" sha1="2875b75aced167973da64689ca033532b38f2561" offset="0" />
15414	15596	</dataarea>
r250251	r250252
15420	15602	<year>198?</year>
15421	15603	<publisher>Screenplay</publisher>
15422	15604	<part name="cass1" interface="bbc_cass">
	15605	<feature name="part_id" value="Side 1"/>
15423	15606	<dataarea name="cass" size="7288">
15424	15607	<rom name="animator-side1(screenplay).uef" size="7288" crc="d1749f77" sha1="9a3c5108ce94b427a0d80c85fc702d9857cdb749" offset="0" />
15425	15608	</dataarea>
15426	15609	</part>
15427	15610	<part name="cass2" interface="bbc_cass">
	15611	<feature name="part_id" value="Side 2"/>
15428	15612	<dataarea name="cass" size="5946">
15429	15613	<rom name="animator-side2(screenplay).uef" size="5946" crc="86fbd242" sha1="ed14517307cb3cae5f8fe71a51f0fb71337aeeea" offset="0" />
15430	15614	</dataarea>
r250251	r250252
15525	15709	<year>1984</year>
15526	15710	<publisher>Addison-Wesley</publisher>
15527	15711	<part name="cass1" interface="bbc_cass">
	15712	<feature name="part_id" value="Side One"/>
15528	15713	<dataarea name="cass" size="22943">
15529	15714	<rom name="graphitosideone_be(1984)(addisonwesley).uef" size="22943" crc="8dc66cc7" sha1="b9de070e071fe222491cb3eabf0db76c03bd600e" offset="0" />
15530	15715	</dataarea>
15531	15716	</part>
15532	15717	<part name="cass2" interface="bbc_cass">
	15718	<feature name="part_id" value="Side Two"/>
15533	15719	<dataarea name="cass" size="24492">
15534	15720	<rom name="graphitosidetwo_be(1984)(addisonwesley).uef" size="24492" crc="5116e227" sha1="2ecfee4a61320800087f02f278fff63b45826b6a" offset="0" />
15535	15721	</dataarea>
r250251	r250252
15590	15776	<publisher>Acornsoft</publisher>
15591	15777	<info name="release" value="X15" />
15592	15778	<part name="cass1" interface="bbc_cass">
	15779	<feature name="part_id" value="Side 1"/>
15593	15780	<dataarea name="cass" size="25919">
15594	15781	<rom name="linkwordspanish-side1(1984)(acornsoft)(x15).uef" size="25919" crc="f67a4b4a" sha1="857996b61e180ac4c5e73c0dc41e1fb07756de46" offset="0" />
15595	15782	</dataarea>
15596	15783	</part>
15597	15784	<part name="cass2" interface="bbc_cass">
	15785	<feature name="part_id" value="Side 2"/>
15598	15786	<dataarea name="cass" size="23660">
15599	15787	<rom name="linkwordspanish-side2(1984)(acornsoft)(x15).uef" size="23660" crc="f9c3f2fa" sha1="f07f2ebb9e6c9542ae748a5cdb1eac8dab48796d" offset="0" />
15600	15788	</dataarea>

trunk/hash/bbcb_flop.xml

r250251	r250252
15	15
16	16	<softwarelist name="bbcb_flop" description="BBC Micro Model B disks">
17	17
	18	<!-- Games -->
	19
18	20	<software name="3dbombal">
19	21	<description>3D Bomb Alley</description>
20	22	<year>1983</year>
21	23	<publisher>Software Invasion</publisher>
	24	<info name="notes" value="Original" />
22	25	<part name="flop1" interface="floppy_5_25">
23	26	<dataarea name="flop" size="102400">
24	27	<rom name="3dbomballey.ssd" size="102400" crc="5a8deaff" sha1="d0f4716a376e4407492b4db7f87597bc07d7651f" offset="0" />
r250251	r250252
26	29	</part>
27	30	</software>
28	31
	32	<software name="arsoccer">
	33	<description>Arcade Soccer</description>
	34	<year>1989</year>
	35	<publisher>4th Dimension</publisher>
	36	<info name="notes" value="Deprotected" />
	37	<part name="flop1" interface="floppy_5_25">
	38	<dataarea name="flop" size="92928">
	39	<rom name="arcade soccer.ssd" size="92928" crc="c0ff80d4" sha1="7c522c65ea565b1eba20ea2200fa80b2cc06c2db" offset="0" />
	40	</dataarea>
	41	</part>
	42	</software>
	43
29	44	<software name="cutekill">
30	45	<description>Cute To Kill: Beyond Infinity</description>
31	46	<year>1987</year>
r250251	r250252
36	51	</dataarea>
37	52	</part>
38	53	</software>
39
	54
40	55	<software name="elite">
41	56	<description>Elite</description>
42	57	<year>1984</year>
r250251	r250252
59	74	</part>
60	75	</software>
61	76
	77	<software name="etype">
	78	<description>E-Type</description>
	79	<year>1990</year>
	80	<publisher>4th Dimension</publisher>
	81	<info name="notes" value="Deprotected" />
	82	<part name="flop1" interface="floppy_5_25">
	83	<dataarea name="flop" size="72704">
	84	<rom name="e-type.ssd" size="72704" crc="cd685f63" sha1="9d64109db22299adbae8da053eb9d2e68a1cb08c" offset="0" />
	85	</dataarea>
	86	</part>
	87	</software>
	88
62	89	<software name="eyes">
63	90	<description>Eyes</description>
64	91	<year>1984</year>
r250251	r250252
81	108	</part>
82	109	</software>
83	110
	111	<software name="gkiller">
	112	<description>Giant Killer</description>
	113	<year>1987</year>
	114	<publisher>Topologika</publisher>
	115	<info name="notes" value="Deprotected" />
	116	<part name="flop1" interface="floppy_5_25">
	117	<dataarea name="flop" size="102400">
	118	<rom name="giant killer.ssd" size="102400" crc="082df282" sha1="dfd5e3f33cd850246cce1a7f8de977ee21fa0385" offset="0" />
	119	</dataarea>
	120	</part>
	121	</software>
	122
	123	<software name="holedout">
	124	<description>Holed Out</description>
	125	<year>1989</year>
	126	<publisher>4th Dimension</publisher>
	127	<info name="notes" value="Deprotected" />
	128	<part name="flop1" interface="floppy_5_25">
	129	<dataarea name="flop" size="89856">
	130	<rom name="holed out.ssd" size="89856" crc="4f767fc8" sha1="496f5f20d093651d056528fbee4bcfbc2e9a6c37" offset="0" />
	131	</dataarea>
	132	</part>
	133	</software>
	134
	135	<software name="holedoc1">
	136	<description>Holed Out Extra Courses Vol.1</description>
	137	<year>1990</year>
	138	<publisher>4th Dimension</publisher>
	139	<info name="notes" value="Deprotected" />
	140	<part name="flop1" interface="floppy_5_25">
	141	<dataarea name="flop" size="99584">
	142	<rom name="holed out extra courses vol1.ssd" size="99584" crc="186a21e9" sha1="b4475e56fae9786c4b964e43b0b1a14dec9e8368" offset="0" />
	143	</dataarea>
	144	</part>
	145	</software>
	146
	147	<software name="holedoc2">
	148	<description>Holed Out Extra Courses Vol.2</description>
	149	<year>1990</year>
	150	<publisher>4th Dimension</publisher>
	151	<info name="notes" value="Deprotected" />
	152	<part name="flop1" interface="floppy_5_25">
	153	<dataarea name="flop" size="99584">
	154	<rom name="holed out extra courses vol2.ssd" size="99584" crc="78324f99" sha1="eab859a632e8251aa7c3ece6aae4b7d759ec5b99" offset="0" />
	155	</dataarea>
	156	</part>
	157	</software>
	158
	159	<software name="huntshau">
	160	<description>The Hunt: Search for Shauna</description>
	161	<year>1987</year>
	162	<publisher>Robico</publisher>
	163	<info name="notes" value="Deprotected" />
	164	<part name="flop1" interface="floppy_5_25">
	165	<dataarea name="flop" size="102400">
	166	<rom name="the hunt search for shauna.ssd" size="102400" crc="9967e594" sha1="fc9512ecefc422ae6b2152aa308284b500072bd0" offset="0" />
	167	</dataarea>
	168	</part>
	169	</software>
	170
	171	<software name="inertia">
	172	<description>Inertia</description>
	173	<year>1990</year>
	174	<publisher>4th Dimension</publisher>
	175	<info name="notes" value="Deprotected" />
	176	<part name="flop1" interface="floppy_5_25">
	177	<dataarea name="flop" size="56064">
	178	<rom name="inertia.ssd" size="56064" crc="e7a50f85" sha1="ce2fa997a2e47abbae819a19b64858db816690d1" offset="0" />
	179	</dataarea>
	180	</part>
	181	</software>
	182
84	183	<software name="mapocaly">
85		<description>Mega Apocalypse</description>
	184	<description>Mega-Apocalypse</description>
86	185	<year>1988</year>
87		<publisher>Martech (Unreleased)</publisher>
	186	<publisher>Martech</publisher>
88	187	<part name="flop1" interface="floppy_5_25">
89	188	<dataarea name="flop" size="40192">
90	189	<rom name="megaapocalypse.ssd" size="40192" crc="4a6e1489" sha1="399e09d9782d7f0068a9acd9113595657dbb4673" offset="0" />
r250251	r250252
92	191	</part>
93	192	</software>
94	193
	194	<software name="nevryon">
	195	<description>Nevryon</description>
	196	<year>1991</year>
	197	<publisher>4th Dimension</publisher>
	198	<info name="notes" value="Deprotected" />
	199	<part name="flop1" interface="floppy_5_25">
	200	<dataarea name="flop" size="101632">
	201	<rom name="nevryon.ssd" size="101632" crc="a6c83ad4" sha1="e5f8336ffd3b27be04d70974a45d3972b796afdc" offset="0" />
	202	</dataarea>
	203	</part>
	204	</software>
	205
95	206	<software name="ssgames">
96	207	<description>Superior Software - Games on Disc</description>
97	208	<year>1983</year>
r250251	r250252
107	218	<description>Welcome and Disc Utils</description>
108	219	<year>1982</year>
109	220	<publisher>Acorn</publisher>
	221	<info name="notes" value="Original" />
110	222	<part name="flop1" interface="floppy_5_25">
111	223	<dataarea name="flop" size="78336">
112	224	<rom name="welcome.ssd" size="78336" crc="03728f14" sha1="d212aa33a14b30dc2ff64920f834fe8c4e6715cc" offset="0" />
r250251	r250252
114	226	</part>
115	227	</software>
116	228
	229	<software name="uim">
	230	<description>U.I.M.</description>
	231	<year>1989</year>
	232	<publisher>4th Dimension</publisher>
	233	<info name="notes" value="Deprotected" />
	234	<part name="flop1" interface="floppy_5_25">
	235	<dataarea name="flop" size="124928">
	236	<rom name="uim.ssd" size="124928" crc="08871fd4" sha1="c08e86fde0c8faa154eca45fab70c915d9b9c526" offset="0" />
	237	</dataarea>
	238	</part>
	239	</software>
	240
	241	<software name="whimagic">
	242	<description>White Magic</description>
	243	<year>1989</year>
	244	<publisher>4th Dimension</publisher>
	245	<info name="notes" value="Deprotected" />
	246	<part name="flop1" interface="floppy_5_25">
	247	<dataarea name="flop" size="88832">
	248	<rom name="white magic.ssd" size="88832" crc="81988eaf" sha1="04aed4908320aa5befb11aa9d8d707bcdc493b79" offset="0" />
	249	</dataarea>
	250	</part>
	251	</software>
	252
	253	<software name="whimagi2">
	254	<description>White Magic 2</description>
	255	<year>1989</year>
	256	<publisher>4th Dimension</publisher>
	257	<info name="notes" value="Deprotected" />
	258	<part name="flop1" interface="floppy_5_25">
	259	<dataarea name="flop" size="102400">
	260	<rom name="white magic 2.ssd" size="102400" crc="8d3ed4da" sha1="fe11e69648bae6e1c6fdfc54cdde91b816ca7e85" offset="0" />
	261	</dataarea>
	262	</part>
	263	</software>
	264
	265	<!-- Educational -->
	266
	267	<software name="wrldword">
	268	<description>World Without Words</description>
	269	<year>198?</year>
	270	<publisher>4mation</publisher>
	271	<info name="notes" value="Deprotected" />
	272	<part name="flop1" interface="floppy_5_25">
	273	<dataarea name="flop" size="102400">
	274	<rom name="world without words.ssd" size="102400" crc="576db44b" sha1="c2cb171af63296eb00bdb56a3b47ed0073ddc764" offset="0" />
	275	</dataarea>
	276	</part>
	277	</software>
	278
117	279	</softwarelist>

trunk/hash/bbcb_orig_flop.xml

r0	r250252
	1	<?xml version="1.0" encoding="UTF-8"?>
	2	<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
	3
	4	<!-- BBC Micro Model B Original Disks -->
	5
	6	<!-- Loading Instructions:
	7
	8	Hold down the SHIFT key and press and release the BREAK key.
	9	-->
	10
	11	<!-- This list was compiled from the archive at http://www.stairwaytohell.com/. Additional titles will be added as they are made available at http://stardot.org.uk/ forum. -->
	12
	13	<!-- All images in this list were created from original discs, most contain copy protection. -->
	14
	15	<softwarelist name="bbcb_orig_flop" description="BBC Micro Model B Original disks">
	16
	17	<!-- Games -->
	18
	19	<software name="magicmus">
	20	<description>Magic Mushrooms</description>
	21	<year>1985</year>
	22	<publisher>Acornsoft</publisher>
	23	<info name="release" value="G46" />
	24	<part name="flop1" interface="floppy_5_25">
	25	<dataarea name="flop" size="55146">
	26	<rom name="004 magic mushrooms.fsd" size="55146" crc="cac03f12" sha1="6efe0e75045805057ec45c44338ba5d2e9ec2c4e" offset="0" />
	27	</dataarea>
	28	</part>
	29	</software>
	30
	31	<software name="arcadian">
	32	<description>Arcadians</description>
	33	<year>1982</year>
	34	<publisher>Acornsoft</publisher>
	35	<info name="release" value="G14" />
	36	<part name="flop1" interface="floppy_5_25">
	37	<dataarea name="flop" size="35063">
	38	<rom name="005 arcadians.fsd" size="35063" crc="9e2f412b" sha1="6c833c589a619a4dac186d7e7a1db02b94ee8aba" offset="0" />
	39	</dataarea>
	40	</part>
	41	</software>
	42
	43	<software name="arcadian48" cloneof="arcadian">
	44	<description>Arcadians (40/80t)</description>
	45	<year>1982</year>
	46	<publisher>Acornsoft</publisher>
	47	<info name="release" value="G14" />
	48	<part name="flop1" interface="floppy_5_25">
	49	<dataarea name="flop" size="55277">
	50	<rom name="006 arcadians 40-80.fsd" size="55277" crc="94e7e5cf" sha1="66c84208dd461605ed48233b02e3ee6570e95de3" offset="0" />
	51	</dataarea>
	52	</part>
	53	</software>
	54
	55	<software name="boxer48">
	56	<description>Boxer (40/80t)</description>
	57	<year>1984</year>
	58	<publisher>Acornsoft</publisher>
	59	<info name="release" value="G31" />
	60	<part name="flop1" interface="floppy_5_25">
	61	<dataarea name="flop" size="55273">
	62	<rom name="007 boxer 40-80.fsd" size="55273" crc="365164a9" sha1="7f25cfa4f4cfccfbcececd0619884d02f1023628" offset="0" />
	63	</dataarea>
	64	</part>
	65	</software>
	66
	67	<software name="hopper48">
	68	<description>Hopper (40/80t)</description>
	69	<year>1983</year>
	70	<publisher>Acornsoft</publisher>
	71	<info name="release" value="G23" />
	72	<part name="flop1" interface="floppy_5_25">
	73	<dataarea name="flop" size="101175">
	74	<rom name="008 hopper 40-80.fsd" size="101175" crc="597ee0d9" sha1="3e0e2ad75147ab28cc514f125221c4e765f5f308" offset="0" />
	75	</dataarea>
	76	</part>
	77	</software>
	78
	79	<software name="volcano">
	80	<description>Volcano</description>
	81	<year>1984</year>
	82	<publisher>Acornsoft</publisher>
	83	<info name="release" value="G33" />
	84	<part name="flop1" interface="floppy_5_25">
	85	<dataarea name="flop" size="55275">
	86	<rom name="009 volcano.fsd" size="55275" crc="4e16b301" sha1="8775b14d2bb46b3e4254f3e7227463ff77cfd619" offset="0" />
	87	</dataarea>
	88	</part>
	89	</software>
	90
	91	<software name="meteors">
	92	<description>Meteors</description>
	93	<year>1982</year>
	94	<publisher>Acornsoft</publisher>
	95	<info name="release" value="G13" />
	96	<part name="flop1" interface="floppy_5_25">
	97	<dataarea name="flop" size="24709">
	98	<rom name="010 meteors.fsd" size="24709" crc="9f4226a2" sha1="6f529751be461cb695bad9778d2f4998784fda34" offset="0" />
	99	</dataarea>
	100	</part>
	101	</software>
	102
	103	<software name="labyrint">
	104	<description>Labyrinth</description>
	105	<year>1984</year>
	106	<publisher>Acornsoft</publisher>
	107	<info name="release" value="G41" />
	108	<part name="flop1" interface="floppy_5_25">
	109	<dataarea name="flop" size="55277">
	110	<rom name="011 labyrinth.fsd" size="55277" crc="919768d4" sha1="12e9b368afa58198c823e789ad4827ff6aaabbb3" offset="0" />
	111	</dataarea>
	112	</part>
	113	</software>
	114
	115	<software name="bboxgamb">
	116	<description>Black Box and Gambit</description>
	117	<year>198?</year>
	118	<publisher>Acornsoft</publisher>
	119	<info name="release" value="G34" />
	120	<part name="flop1" interface="floppy_5_25">
	121	<dataarea name="flop" size="102329">
	122	<rom name="015 black box and gambit.fsd" size="102329" crc="876b301b" sha1="c5114ea239fd42e4ae6d64c98b25a7f1ed714581" offset="0" />
	123	</dataarea>
	124	</part>
	125	</software>
	126
	127	<software name="metmissn">
	128	<description>Meteor Mission</description>
	129	<year>1983</year>
	130	<publisher>Acornsoft</publisher>
	131	<info name="release" value="G29" />
	132	<part name="flop1" interface="floppy_5_25">
	133	<dataarea name="flop" size="55282">
	134	<rom name="016 meteor mission.fsd" size="55282" crc="8c538999" sha1="abab70a653d18ed50ab0d838cb9fe89efedb9aa9" offset="0" />
	135	</dataarea>
	136	</part>
	137	</software>
	138
	139	<software name="tetrapod">
	140	<description>Tetrapod</description>
	141	<year>1984</year>
	142	<publisher>Acornsoft</publisher>
	143	<info name="release" value="G32" />
	144	<part name="flop1" interface="floppy_5_25">
	145	<dataarea name="flop" size="55276">
	146	<rom name="017 tetrapod.fsd" size="55276" crc="bc5f3936" sha1="0752cabb3c168cb4695df1d668c9a968c7b44979" offset="0" />
	147	</dataarea>
	148	</part>
	149	</software>
	150
	151	<software name="firebug">
	152	<description>Firebug</description>
	153	<year>1984</year>
	154	<publisher>Acornsoft</publisher>
	155	<info name="release" value="G39" />
	156	<part name="flop1" interface="floppy_5_25">
	157	<dataarea name="flop" size="55275">
	158	<rom name="018 firebug.fsd" size="55275" crc="826d3399" sha1="0120f272bc4de8f6ffa480bfc235e0a579c85444" offset="0" />
	159	</dataarea>
	160	</part>
	161	</software>
	162
	163	<software name="snapper">
	164	<description>Snapper</description>
	165	<year>1982</year>
	166	<publisher>Acornsoft</publisher>
	167	<info name="release" value="G04" />
	168	<part name="flop1" interface="floppy_5_25">
	169	<dataarea name="flop" size="55138">
	170	<rom name="019 snapper.fsd" size="55138" crc="526d12a5" sha1="a40b51aa75e02bd096e08c13fd8372e0f2c71069" offset="0" />
	171	</dataarea>
	172	</part>
	173	</software>
	174
	175	<software name="drogna">
	176	<description>Drogna</description>
	177	<year>1983</year>
	178	<publisher>Acornsoft</publisher>
	179	<info name="release" value="G27" />
	180	<part name="flop1" interface="floppy_5_25">
	181	<dataarea name="flop" size="55274">
	182	<rom name="020 drogna.fsd" size="55274" crc="4ff2895f" sha1="019545da835024bf31959d78bab351988c60ba47" offset="0" />
	183	</dataarea>
	184	</part>
	185	</software>
	186
	187	<software name="go">
	188	<description>Go</description>
	189	<year>1984</year>
	190	<publisher>Acornsoft</publisher>
	191	<info name="release" value="G42" />
	192	<part name="flop1" interface="floppy_5_25">
	193	<dataarea name="flop" size="55270">
	194	<rom name="026 go.fsd" size="55270" crc="bb260970" sha1="cdbca519a0825c2d54a08e685cc5dc2cb9ce2842" offset="0" />
	195	</dataarea>
	196	</part>
	197	</software>
	198
	199	<software name="maze">
	200	<description>Maze</description>
	201	<year>1982</year>
	202	<publisher>Acornsoft</publisher>
	203	<info name="release" value="G11" />
	204	<part name="flop1" interface="floppy_5_25">
	205	<dataarea name="flop" size="55272">
	206	<rom name="027 maze.fsd" size="55272" crc="38c998e4" sha1="00eee0558e2f12ba864b9612a09e911e5ba61e2e" offset="0" />
	207	</dataarea>
	208	</part>
	209	</software>
	210
	211	<software name="quondam">
	212	<description>Quondam</description>
	213	<year>1984</year>
	214	<publisher>Acornsoft</publisher>
	215	<info name="release" value="G40" />
	216	<part name="flop1" interface="floppy_5_25">
	217	<dataarea name="flop" size="55275">
	218	<rom name="028 quondam.fsd" size="55275" crc="10efe562" sha1="09c5069b68ff7dbfcfabfb0a04934e153d664945" offset="0" />
	219	</dataarea>
	220	</part>
	221	</software>
	222
	223	<software name="bouncer">
	224	<description>Bouncer</description>
	225	<year>1984</year>
	226	<publisher>Acornsoft</publisher>
	227	<info name="release" value="G35" />
	228	<part name="flop1" interface="floppy_5_25">
	229	<dataarea name="flop" size="55275">
	230	<rom name="029 bouncer.fsd" size="55275" crc="8166acf9" sha1="bc3f9fe318d6f22266698f3d70f9ba3509510813" offset="0" />
	231	</dataarea>
	232	</part>
	233	</software>
	234
	235	<software name="revs">
	236	<description>Revs</description>
	237	<year>1984</year>
	238	<publisher>Acornsoft</publisher>
	239	<info name="release" value="G43" />
	240	<part name="flop1" interface="floppy_5_25">
	241	<dataarea name="flop" size="104934">
	242	<rom name="030 revs.fsd" size="104934" crc="48f95827" sha1="2a8d2e82f1d4b0fdd56d39e2400f445a59855f98" offset="0" />
	243	</dataarea>
	244	</part>
	245	</software>
	246
	247	<software name="revs4tra">
	248	<description>Revs 4 Tracks</description>
	249	<year>1985</year>
	250	<publisher>Acornsoft</publisher>
	251	<info name="release" value="G44" />
	252	<part name="flop1" interface="floppy_5_25">
	253	<dataarea name="flop" size="102322">
	254	<rom name="031 revs 4 tracks.fsd" size="102322" crc="d1cbdf33" sha1="b4281b2b55c292b7ed96798a52139d9a1a50b661" offset="0" />
	255	</dataarea>
	256	</part>
	257	</software>
	258
	259	<software name="acheton" cloneof="achetont">
	260	<description>Acheton</description>
	261	<year>1984</year>
	262	<publisher>Acornsoft</publisher>
	263	<info name="release" value="G37" />
	264	<part name="flop1" interface="floppy_5_25">
	265	<feature name="part_id" value="Program"/>
	266	<dataarea name="flop" size="102461">
	267	<rom name="033 acheton program.fsd" size="102461" crc="0c6c46ca" sha1="6322945135310ea8ae1dbf2f1aced77f21688008" offset="0" />
	268	</dataarea>
	269	</part>
	270	<part name="flop2" interface="floppy_5_25">
	271	<feature name="part_id" value="Data"/>
	272	<dataarea name="flop" size="105079">
	273	<rom name="033 acheton data.fsd" size="105079" crc="86fdca91" sha1="57f448a17868f0bdbbc6a415464220da0c418f72" offset="0" />
	274	</dataarea>
	275	</part>
	276	</software>
	277
	278	<software name="monsters">
	279	<description>Monsters</description>
	280	<year>1982</year>
	281	<publisher>Acornsoft</publisher>
	282	<info name="release" value="G03" />
	283	<part name="flop1" interface="floppy_5_25">
	284	<dataarea name="flop" size="55276">
	285	<rom name="034 monsters.fsd" size="55276" crc="ba2223e5" sha1="66359136ad78a049733eca596a77115037fdbe82" offset="0" />
	286	</dataarea>
	287	</part>
	288	</software>
	289
	290	<software name="monsters4" cloneof="monsters">
	291	<description>Monsters (40t)</description>
	292	<year>1982</year>
	293	<publisher>Acornsoft</publisher>
	294	<info name="release" value="G03" />
	295	<part name="flop1" interface="floppy_5_25">
	296	<dataarea name="flop" size="24710">
	297	<rom name="054 monsters 40track.fsd" size="24710" crc="3e371d1d" sha1="f35c4b15f8f3358c4ff9c6fc63c850d228f2e6b3" offset="0" />
	298	</dataarea>
	299	</part>
	300	</software>
	301
	302	<software name="snookera">
	303	<description>Snooker</description>
	304	<year>1983</year>
	305	<publisher>Acornsoft</publisher>
	306	<info name="release" value="G21" />
	307	<part name="flop1" interface="floppy_5_25">
	308	<dataarea name="flop" size="55275">
	309	<rom name="035 snooker.fsd" size="55275" crc="08eaa805" sha1="42254fc9b39029f30abac5e4c2da6eeec16dec4a" offset="0" />
	310	</dataarea>
	311	</part>
	312	</software>
	313
	314	<software name="carousel">
	315	<description>Carousel</description>
	316	<year>1983</year>
	317	<publisher>Acornsoft</publisher>
	318	<info name="release" value="G24" />
	319	<part name="flop1" interface="floppy_5_25">
	320	<dataarea name="flop" size="101177">
	321	<rom name="036 carousel.fsd" size="101177" crc="dac1680a" sha1="b70cd85993adc22155ef750ef0ec3905e429d195" offset="0" />
	322	</dataarea>
	323	</part>
	324	</software>
	325
	326	<software name="freefall">
	327	<description>Free Fall</description>
	328	<year>1983</year>
	329	<publisher>Acornsoft</publisher>
	330	<info name="release" value="G28" />
	331	<part name="flop1" interface="floppy_5_25">
	332	<dataarea name="flop" size="55277">
	333	<rom name="037 free fall.fsd" size="55277" crc="eca72121" sha1="279300664a66bc95908fe48a37075adc24fb5aa1" offset="0" />
	334	</dataarea>
	335	</part>
	336	</software>
	337
	338	<software name="crtracer">
	339	<description>Crazy Tracer</description>
	340	<year>1983</year>
	341	<publisher>Acornsoft</publisher>
	342	<info name="release" value="G26" />
	343	<part name="flop1" interface="floppy_5_25">
	344	<dataarea name="flop" size="101318">
	345	<rom name="038 crazy tracer.fsd" size="101318" crc="40d4e30b" sha1="1a35ba220245b1d75319628c1c0cd5fcd53b82e9" offset="0" />
	346	</dataarea>
	347	</part>
	348	</software>
	349
	350	<software name="kofhamil" cloneof="kohamilt">
	351	<description>Kingdom of Hamil</description>
	352	<year>1983</year>
	353	<publisher>Acornsoft</publisher>
	354	<info name="release" value="G25" />
	355	<part name="flop1" interface="floppy_5_25">
	356	<dataarea name="flop" size="73134">
	357	<rom name="039 kingdom of hamil.fsd" size="73134" crc="3fe60d1e" sha1="a441d9c67a1677069f855e3b29f638b47b18aaea" offset="0" />
	358	</dataarea>
	359	</part>
	360	</software>
	361
	362	<software name="sshipcom">
	363	<description>Starship Command</description>
	364	<year>1983</year>
	365	<publisher>Acornsoft</publisher>
	366	<info name="release" value="G22" />
	367	<part name="flop1" interface="floppy_5_25">
	368	<dataarea name="flop" size="101185">
	369	<rom name="040 starship command.fsd" size="101185" crc="f0bc6523" sha1="446ca8e624a0edfe29540e94b6ad76fcd80b9bfc" offset="0" />
	370	</dataarea>
	371	</part>
	372	</software>
	373
	374	<software name="ctodoom" cloneof="ctodoomt">
	375	<description>Countdown to Doom</description>
	376	<year>1984</year>
	377	<publisher>Acornsoft</publisher>
	378	<info name="release" value="G19" />
	379	<part name="flop1" interface="floppy_5_25">
	380	<dataarea name="flop" size="73495">
	381	<rom name="041 countdown to doom.fsd" size="73495" crc="ba37517e" sha1="2cb63f7f044e99bd38abab273229c303f5801259" offset="0" />
	382	</dataarea>
	383	</part>
	384	</software>
	385
	386	<software name="missbase">
	387	<description>Missile Base</description>
	388	<year>1982</year>
	389	<publisher>Acornsoft</publisher>
	390	<info name="release" value="G18" />
	391	<part name="flop1" interface="floppy_5_25">
	392	<dataarea name="flop" size="101181">
	393	<rom name="042 missile base.fsd" size="101181" crc="91a46fa1" sha1="6afc77cb445e4aa1e8069ae9134449d51786b704" offset="0" />
	394	</dataarea>
	395	</part>
	396	</software>
	397
	398	<software name="phquest" cloneof="phquestt">
	399	<description>Philosopher's Quest</description>
	400	<year>1984</year>
	401	<publisher>Acornsoft</publisher>
	402	<info name="release" value="G01" />
	403	<part name="flop1" interface="floppy_5_25">
	404	<dataarea name="flop" size="55287">
	405	<rom name="043 philosopher's quest.fsd" size="55287" crc="d69898f3" sha1="ea76abc3dd58565d9219c76e2c15db3168ec96be" offset="0" />
	406	</dataarea>
	407	</part>
	408	</software>
	409
	410	<software name="aviator">
	411	<description>Aviator</description>
	412	<year>1983</year>
	413	<publisher>Acornsoft</publisher>
	414	<info name="release" value="G02" />
	415	<part name="flop1" interface="floppy_5_25">
	416	<dataarea name="flop" size="55275">
	417	<rom name="044 aviator.fsd" size="55275" crc="8249a0f0" sha1="a6f2a56059851b211c0dc753b14643571b3f4002" offset="0" />
	418	</dataarea>
	419	</part>
	420	</software>
	421
	422	<software name="sphinx">
	423	<description>Sphinx Adventure</description>
	424	<year>1983</year>
	425	<publisher>Acornsoft</publisher>
	426	<info name="release" value="G07" />
	427	<part name="flop1" interface="floppy_5_25">
	428	<dataarea name="flop" size="55284">
	429	<rom name="045 sphinx adventure.fsd" size="55284" crc="65f04493" sha1="45faab5009902c6df0e14fb780e74d487dcf7376" offset="0" />
	430	</dataarea>
	431	</part>
	432	</software>
	433
	434	<software name="plantoid">
	435	<description>Planetoid</description>
	436	<year>1982</year>
	437	<publisher>Acornsoft</publisher>
	438	<info name="release" value="G15" />
	439	<part name="flop1" interface="floppy_5_25">
	440	<dataarea name="flop" size="55277">
	441	<rom name="046 planetoid.fsd" size="55277" crc="c9b6bd5c" sha1="48fc462499de9fd37a3e5164e723f9022ab0f870" offset="0" />
	442	</dataarea>
	443	</part>
	444	</software>
	445
	446	<software name="plantoid4" cloneof="plantoid">
	447	<description>Planetoid (40t)</description>
	448	<year>1982</year>
	449	<publisher>Acornsoft</publisher>
	450	<info name="release" value="G15" />
	451	<part name="flop1" interface="floppy_5_25">
	452	<dataarea name="flop" size="24711">
	453	<rom name="055 planetoid 40track.fsd" size="24711" crc="f8f6c291" sha1="d7a8d0b55052d62f748301b6a0ece3d6d063e606" offset="0" />
	454	</dataarea>
	455	</part>
	456	</software>
	457
	458	<software name="superinv">
	459	<description>Super Invaders</description>
	460	<year>1982</year>
	461	<publisher>Acornsoft</publisher>
	462	<info name="release" value="G16" />
	463	<part name="flop1" interface="floppy_5_25">
	464	<dataarea name="flop" size="55282">
	465	<rom name="047 super invaders.fsd" size="55282" crc="e639e138" sha1="61fa94d5beb55b178b1ec732c69649d4a6bdb6ea" offset="0" />
	466	</dataarea>
	467	</part>
	468	</software>
	469
	470	<software name="superinv4" cloneof="superinv">
	471	<description>Super Invaders (40t)</description>
	472	<year>1982</year>
	473	<publisher>Acornsoft</publisher>
	474	<info name="release" value="G16" />
	475	<part name="flop1" interface="floppy_5_25">
	476	<dataarea name="flop" size="24716">
	477	<rom name="053 super invaders 40track.fsd" size="24716" crc="0a8e861d" sha1="7d81dbf2a01a83266b4531c913d956a68bc63a12" offset="0" />
	478	</dataarea>
	479	</part>
	480	</software>
	481
	482	<software name="rocketra">
	483	<description>Rocket Raid</description>
	484	<year>1982</year>
	485	<publisher>Acornsoft</publisher>
	486	<info name="release" value="G05" />
	487	<part name="flop1" interface="floppy_5_25">
	488	<dataarea name="flop" size="55279">
	489	<rom name="048 rocket raid.fsd" size="55279" crc="06311675" sha1="e7524e853b83906c12ec3a17497339d25596eee8" offset="0" />
	490	</dataarea>
	491	</part>
	492	</software>
	493
	494	<software name="sconrans">
	495	<description>Shirley Conran's Magic Garden</description>
	496	<year>1983</year>
	497	<publisher>Acornsoft</publisher>
	498	<info name="release" value="X04" />
	499	<part name="flop1" interface="floppy_5_25">
	500	<dataarea name="flop" size="104959">
	501	<rom name="067 shirley conran's magic garden.fsd" size="104959" crc="dd05b72c" sha1="5914bd14014f89cfae12b8e55a9b4b8349835286" offset="0" />
	502	</dataarea>
	503	</part>
	504	</software>
	505
	506	<software name="spooky">
	507	<description>Spooky Manor</description>
	508	<year>1984</year>
	509	<publisher>Acornsoft</publisher>
	510	<info name="release" value="E18" />
	511	<part name="flop1" interface="floppy_5_25">
	512	<dataarea name="flop" size="102321">
	513	<rom name="068 spooky manor.fsd" size="102321" crc="077375a1" sha1="2b2d7cccd4bfa6fe2e8c352098e11acc685633f4" offset="0" />
	514	</dataarea>
	515	</part>
	516	</software>
	517
	518	<software name="peekoc">
	519	<description>Peeko-Computer</description>
	520	<year>198?</year>
	521	<publisher>Acornsoft</publisher>
	522	<info name="release" value="E02" />
	523	<part name="flop1" interface="floppy_5_25">
	524	<dataarea name="flop" size="55478">
	525	<rom name="069 peeko-computer.fsd" size="55478" crc="149db5f7" sha1="62967f65582d2e3d78c28be407dbd68da5609824" offset="0" />
	526	</dataarea>
	527	</part>
	528	</software>
	529
	530	<software name="busgames">
	531	<description>Business Games</description>
	532	<year>198?</year>
	533	<publisher>Acornsoft</publisher>
	534	<info name="release" value="E03" />
	535	<part name="flop1" interface="floppy_5_25">
	536	<dataarea name="flop" size="102323">
	537	<rom name="070 business games.fsd" size="102323" crc="47b34ec1" sha1="96fe3ca59520a28113387606d5d6826a236e9027" offset="0" />
	538	</dataarea>
	539	</part>
	540	</software>
	541
	542	<software name="microtxt">
	543	<description>Microtext</description>
	544	<year>1983</year>
	545	<publisher>Acornsoft</publisher>
	546	<info name="release" value="L04" />
	547	<part name="flop1" interface="floppy_5_25">
	548	<dataarea name="flop" size="104939">
	549	<rom name="075 microtext.fsd" size="104939" crc="b614ea31" sha1="224e87db1a3fa677e53f3506fa1401ee598bd2b2" offset="0" />
	550	</dataarea>
	551	</part>
	552	</software>
	553
	554	<software name="elitedem">
	555	<description>Elite (Demo)</description>
	556	<year>1984</year>
	557	<publisher>Acornsoft</publisher>
	558	<part name="flop1" interface="floppy_5_25">
	559	<dataarea name="flop" size="104376">
	560	<rom name="202 elite demo.fsd" size="104376" crc="cd84ea0a" sha1="d7452ab1a7d6d619cf44f64b5743b8fa22a75367" offset="0" />
	561	</dataarea>
	562	</part>
	563	</software>
	564
	565	<software name="prtdrvgn">
	566	<description>Printer Driver Generator</description>
	567	<year>198?</year>
	568	<publisher>Acornsoft</publisher>
	569	<info name="release" value="B0?" />
	570	<part name="flop1" interface="floppy_5_25">
	571	<dataarea name="flop" size="105091">
	572	<rom name="227 printer driver generator.fsd" size="105091" crc="c047f362" sha1="024b53fe31bdbec2083de9a9ffc8c9d2737f398d" offset="0" />
	573	</dataarea>
	574	</part>
	575	</software>
	576
	577	<software name="forth">
	578	<description>FORTH</description>
	579	<year>1982</year>
	580	<publisher>Acornsoft</publisher>
	581	<info name="release" value="L01" />
	582	<part name="flop1" interface="floppy_5_25">
	583	<dataarea name="flop" size="81355">
	584	<rom name="235 forth.fsd" size="81355" crc="5d6ba897" sha1="f58964a536b59012e85298ffc55c2165b05bd154" offset="0" />
	585	</dataarea>
	586	</part>
	587	</software>
	588
	589	<software name="jars">
	590	<description>Jars</description>
	591	<year>198?</year>
	592	<publisher>Acornsoft</publisher>
	593	<info name="release" value="E15" />
	594	<part name="flop1" interface="floppy_5_25">
	595	<dataarea name="flop" size="29478">
	596	<rom name="262 jars.fsd" size="29478" crc="6613abb4" sha1="19024209a8fe98df7726acbefa78744459637dcf" offset="0" />
	597	</dataarea>
	598	</part>
	599	</software>
	600
	601	<software name="chemanal">
	602	<description>Chemical Analysis</description>
	603	<year>198?</year>
	604	<publisher>Acornsoft</publisher>
	605	<info name="release" value="E12" />
	606	<part name="flop1" interface="floppy_5_25">
	607	<dataarea name="flop" size="104947">
	608	<rom name="263 chemical analysis.fsd" size="104947" crc="1c0ecd19" sha1="04f9c198dda70bb498844594d206918344aa13d3" offset="0" />
	609	</dataarea>
	610	</part>
	611	</software>
	612
	613	<software name="jcbdiggr">
	614	<description>JCB Digger</description>
	615	<year>1983</year>
	616	<publisher>Acornsoft</publisher>
	617	<info name="release" value="G09" />
	618	<part name="flop1" interface="floppy_5_25">
	619	<dataarea name="flop" size="101190">
	620	<rom name="286 jcb digger.fsd" size="101190" crc="16102871" sha1="e0226e03b831d260c8ccbab5e1a6885a0b362b10" offset="0" />
	621	</dataarea>
	622	</part>
	623	</software>
	624
	625	<software name="homeedu">
	626	<description>Home Education</description>
	627	<year>1985</year>
	628	<publisher>Acornsoft</publisher>
	629	<info name="release" value="E0?" />
	630	<part name="flop1" interface="floppy_5_25">
	631	<dataarea name="flop" size="104944">
	632	<rom name="336 home education.fsd" size="104944" crc="34a7242f" sha1="1d667119e1abecc208c2f77d2e8617768501117e" offset="0" />
	633	</dataarea>
	634	</part>
	635	</software>
	636
	637	<software name="omegaorb">
	638	<description>Omega Orb</description>
	639	<year>1986</year>
	640	<publisher>Audiogenic</publisher>
	641	<part name="flop1" interface="floppy_5_25">
	642	<dataarea name="flop" size="104939">
	643	<rom name="077 omega orb.fsd" size="104939" crc="92433f95" sha1="76ff1011144660c06c13a0c058a168e32a6d9e63" offset="0" />
	644	</dataarea>
	645	</part>
	646	</software>
	647
	648	<software name="tstruck2">
	649	<description>Thunderstruck 2: Mind Master</description>
	650	<year>1986</year>
	651	<publisher>Audiogenic</publisher>
	652	<part name="flop1" interface="floppy_5_25">
	653	<dataarea name="flop" size="105098">
	654	<rom name="078 thunderstruck 2.fsd" size="105098" crc="7da6829a" sha1="34e1b77e47b91455f12ca2a8f328fe1b029cfc50" offset="0" />
	655	</dataarea>
	656	</part>
	657	</software>
	658
	659	<software name="blast">
	660	<description>Blast!</description>
	661	<year>1989</year>
	662	<publisher>Audiogenic</publisher>
	663	<part name="flop1" interface="floppy_5_25">
	664	<dataarea name="flop" size="104936">
	665	<rom name="084 blast!.fsd" size="104936" crc="25e91719" sha1="42203574fa4ad32b8464d326a11fb81cd56ada4d" offset="0" />
	666	</dataarea>
	667	</part>
	668	</software>
	669
	670	<software name="psycast">
	671	<description>Psycastria</description>
	672	<year>1986</year>
	673	<publisher>Audiogenic</publisher>
	674	<part name="flop1" interface="floppy_5_25">
	675	<dataarea name="flop" size="105077">
	676	<rom name="143 psycastria.fsd" size="105077" crc="3e79d475" sha1="0d3174a153da3b41ae1044874690317b2abf7f72" offset="0" />
	677	</dataarea>
	678	</part>
	679	</software>
	680
	681	<software name="breakthr">
	682	<description>Breakthrough</description>
	683	<year>1990</year>
	684	<publisher>Audiogenic</publisher>
	685	<part name="flop1" interface="floppy_5_25">
	686	<dataarea name="flop" size="104943">
	687	<rom name="144 breakthrough.fsd" size="104943" crc="f3b5f98b" sha1="a8429c0b2398c5ab90de318e30c29beafeeeda46" offset="0" />
	688	</dataarea>
	689	</part>
	690	</software>
	691
	692	<software name="shark">
	693	<description>Shark</description>
	694	<year>1988</year>
	695	<publisher>Audiogenic</publisher>
	696	<part name="flop1" interface="floppy_5_25">
	697	<dataarea name="flop" size="104935">
	698	<rom name="145 shark.fsd" size="104935" crc="1cb6d77a" sha1="6afe49ab8ed8057e7262556dd6121617bd61e931" offset="0" />
	699	</dataarea>
	700	</part>
	701	</software>
	702
	703	<software name="impact">
	704	<description>Impact</description>
	705	<year>1987</year>
	706	<publisher>Audiogenic</publisher>
	707	<part name="flop1" interface="floppy_5_25">
	708	<dataarea name="flop" size="105073">
	709	<rom name="146 impact.fsd" size="105073" crc="f02f0a19" sha1="7304eba08b8f27fcc9214975875e77b38a786ba4" offset="0" />
	710	</dataarea>
	711	</part>
	712	</software>
	713
	714	<software name="ziggy">
	715	<description>Ziggy</description>
	716	<year>1987</year>
	717	<publisher>Audiogenic</publisher>
	718	<part name="flop1" interface="floppy_5_25">
	719	<dataarea name="flop" size="104935">
	720	<rom name="147 ziggy.fsd" size="104935" crc="9d5e5fc0" sha1="dd6bde5b7ae47ddfb1e7ca983e748e18064ceb09" offset="0" />
	721	</dataarea>
	722	</part>
	723	</software>
	724
	725	<software name="ransack">
	726	<description>Ransack!</description>
	727	<year>1987</year>
	728	<publisher>Audiogenic</publisher>
	729	<part name="flop1" interface="floppy_5_25">
	730	<dataarea name="flop" size="104937">
	731	<rom name="148 ransack.fsd" size="104937" crc="04cf2bc5" sha1="dafa70507979a70026e4f666de711b0bf37a7661" offset="0" />
	732	</dataarea>
	733	</part>
	734	</software>
	735
	736	<software name="despride">
	737	<description>Despatch Rider</description>
	738	<year>1987</year>
	739	<publisher>Audiogenic</publisher>
	740	<part name="flop1" interface="floppy_5_25">
	741	<dataarea name="flop" size="104944">
	742	<rom name="149 despatch rider.fsd" size="104944" crc="adbfbd97" sha1="a5e1b47e70404e09c0147f41275b6b61f1ebd381" offset="0" />
	743	</dataarea>
	744	</part>
	745	</software>
	746
	747	<software name="heltersk">
	748	<description>Helter Skelter</description>
	749	<year>1990</year>
	750	<publisher>Audiogenic</publisher>
	751	<part name="flop1" interface="floppy_5_25">
	752	<dataarea name="flop" size="104944">
	753	<rom name="150 helter skelter.fsd" size="104944" crc="0321f080" sha1="91ccb93a3c61acbdbe100e61ed9e599cf8910580" offset="0" />
	754	</dataarea>
	755	</part>
	756	</software>
	757
	758	<software name="fabfour1">
	759	<description>Fab Four Vol.1</description>
	760	<year>1990</year>
	761	<publisher>Audiogenic</publisher>
	762	<part name="flop1" interface="floppy_5_25">
	763	<feature name="part_id" value="Side [A]"/>
	764	<dataarea name="flop" size="104944">
	765	<rom name="151 fab four vol 1 [a].fsd" size="104944" crc="f683f7ac" sha1="a8a43297779e2da6e80055fcc2ce80424ad86558" offset="0" />
	766	</dataarea>
	767	</part>
	768	<part name="flop2" interface="floppy_5_25">
	769	<feature name="part_id" value="Side [B]"/>
	770	<dataarea name="flop" size="104944">
	771	<rom name="151 fab four vol 1 [b].fsd" size="104944" crc="88473bf5" sha1="23a31ca311f2ad7c32bf18199cae8fb1fc3e6ca9" offset="0" />
	772	</dataarea>
	773	</part>
	774	</software>
	775
	776	<software name="bbcbonz">
	777	<description>BBC Bonanza</description>
	778	<year>1987</year>
	779	<publisher>Audiogenic</publisher>
	780	<part name="flop1" interface="floppy_5_25">
	781	<feature name="part_id" value="Side [A]"/>
	782	<dataarea name="flop" size="105078">
	783	<rom name="152 bbc bonanza [a].fsd" size="105078" crc="2b10b64f" sha1="2731e2e301bbb9e8ceb8e7cadd0b37b05daa83ab" offset="0" />
	784	</dataarea>
	785	</part>
	786	<part name="flop2" interface="floppy_5_25">
	787	<feature name="part_id" value="Side [B]"/>
	788	<dataarea name="flop" size="105078">
	789	<rom name="152 bbc bonanza [b].fsd" size="105078" crc="c12d9858" sha1="5f1061b8abd05b603e3892d82846593dea07b092" offset="0" />
	790	</dataarea>
	791	</part>
	792	</software>
	793
	794	<software name="emlynqz">
	795	<description>Emlyn Hughes Arcade Quiz</description>
	796	<year>1991</year>
	797	<publisher>Audiogenic</publisher>
	798	<part name="flop1" interface="floppy_5_25">
	799	<dataarea name="flop" size="104954">
	800	<rom name="157 emlyn hughes arcade quiz.fsd" size="104954" crc="7ab6c8c7" sha1="cce3b3ad142f2f4d0db48b0a568f645e2afe63de" offset="0" />
	801	</dataarea>
	802	</part>
	803	</software>
	804
	805	<software name="loopz">
	806	<description>Loopz</description>
	807	<year>1990</year>
	808	<publisher>Audiogenic</publisher>
	809	<part name="flop1" interface="floppy_5_25">
	810	<dataarea name="flop" size="104935">
	811	<rom name="158 loopz.fsd" size="104935" crc="52fe55a6" sha1="85e4ea724281f3999d0e56d18536c00d3a712047" offset="0" />
	812	</dataarea>
	813	</part>
	814	</software>
	815
	816	<software name="sphdest">
	817	<description>Sphere of Destiny</description>
	818	<year>1986</year>
	819	<publisher>Audiogenic</publisher>
	820	<part name="flop1" interface="floppy_5_25">
	821	<dataarea name="flop" size="105084">
	822	<rom name="167 sphere of destiny.fsd" size="105084" crc="2bda2617" sha1="da5bb898e4e8dbac0336ab225e38f0534f13848b" offset="0" />
	823	</dataarea>
	824	</part>
	825	</software>
	826
	827	<software name="colos4ch">
	828	<description>Colossus 4 Chess</description>
	829	<year>1988</year>
	830	<publisher>CDS</publisher>
	831	<part name="flop1" interface="floppy_5_25">
	832	<feature name="part_id" value="Side 1"/>
	833	<dataarea name="flop" size="104953">
	834	<rom name="000 colossus chess 4 side 1.fsd" size="104953" crc="c759e652" sha1="04a92c17cfec2827b4c6e85e4a271831346c9d00" offset="0" />
	835	</dataarea>
	836	</part>
	837	<part name="flop2" interface="floppy_5_25">
	838	<feature name="part_id" value="Side 2"/>
	839	<dataarea name="flop" size="104953">
	840	<rom name="000 colossus chess 4 side 2.fsd" size="104953" crc="2eda7e43" sha1="2b25c2d66c2d9ab40a90710ea931e01471b7a5d6" offset="0" />
	841	</dataarea>
	842	</part>
	843	</software>
	844
	845	<software name="infinity">
	846	<description>Infinity</description>
	847	<year>1989</year>
	848	<publisher>White Panther</publisher>
	849	<part name="flop1" interface="floppy_5_25">
	850	<dataarea name="flop" size="113298">
	851	<rom name="002 infinity.fsd" size="113298" crc="f39fad09" sha1="340f35470179ccca582c2a57b63f05f3a97036b5" offset="0" />
	852	</dataarea>
	853	</part>
	854	</software>
	855
	856	<software name="starquak">
	857	<description>Star Quake</description>
	858	<year>1987</year>
	859	<publisher>Bubble Bus</publisher>
	860	<part name="flop1" interface="floppy_5_25">
	861	<dataarea name="flop" size="78570">
	862	<rom name="012 starquake.fsd" size="78570" crc="9f7a8053" sha1="802cb77d35ed81aeb8651a5da63d6f3d5a5e2737" offset="0" />
	863	</dataarea>
	864	</part>
	865	</software>
	866
	867	<software name="wknight">
	868	<description>White Knight Mk12</description>
	869	<year>1985</year>
	870	<publisher>BBC Soft</publisher>
	871	<part name="flop1" interface="floppy_5_25">
	872	<dataarea name="flop" size="104947">
	873	<rom name="032 white knight mk12.fsd" size="104947" crc="526d60ba" sha1="cff5986414e73f0659014f2dd5a2a72b47920d2f" offset="0" />
	874	</dataarea>
	875	</part>
	876	</software>
	877
	878	<software name="firetrak">
	879	<description>Fire Track</description>
	880	<year>1987</year>
	881	<publisher>Aardvark</publisher>
	882	<part name="flop1" interface="floppy_5_25">
	883	<dataarea name="flop" size="81667">
	884	<rom name="050 firetrack.fsd" size="81667" crc="474ed4f7" sha1="6a6694f3d4f4ab03334a7513937b18f4150d97cf" offset="0" />
	885	</dataarea>
	886	</part>
	887	</software>
	888
	889	<software name="fortress">
	890	<description>Fortress</description>
	891	<year>1984</year>
	892	<publisher>Pace</publisher>
	893	<part name="flop1" interface="floppy_5_25">
	894	<dataarea name="flop" size="27817">
	895	<rom name="061 fortress.fsd" size="27817" crc="5d967134" sha1="1230f14adf671005e20636ec8d8272d8668d2b85" offset="0" />
	896	</dataarea>
	897	</part>
	898	</software>
	899
	900	<software name="xoraba" cloneof="xor">
	901	<description>XOR (A&amp;B Computing) (alt)</description>
	902	<year>1987</year>
	903	<publisher>Logotron</publisher>
	904	<part name="flop1" interface="floppy_5_25">
	905	<dataarea name="flop" size="102528">
	906	<rom name="064 xor (a+b)-2.fsd" size="102528" crc="d559d5b6" sha1="841cf3861da0c10e8824c024088fe50263c056c5" offset="0" />
	907	</dataarea>
	908	</part>
	909	</software>
	910
	911	<software name="xorab" cloneof="xor">
	912	<description>XOR (A&amp;B Computing)</description>
	913	<year>1987</year>
	914	<publisher>Logotron</publisher>
	915	<part name="flop1" interface="floppy_5_25">
	916	<dataarea name="flop" size="102528">
	917	<rom name="064 xor (a+b).fsd" size="102528" crc="0ac04a73" sha1="36b478d42541975037ee97fd1b10a74dd5f6d62a" offset="0" />
	918	</dataarea>
	919	</part>
	920	</software>
	921
	922	<software name="xor">
	923	<description>XOR</description>
	924	<year>1987</year>
	925	<publisher>Logotron</publisher>
	926	<part name="flop1" interface="floppy_5_25">
	927	<dataarea name="flop" size="102522">
	928	<rom name="065 xor.fsd" size="102522" crc="166cd24a" sha1="12a85d8058d459a8890b778c472b25e0af31ff5f" offset="0" />
	929	</dataarea>
	930	</part>
	931	</software>
	932
	933	<software name="xordesgn">
	934	<description>XOR Designer</description>
	935	<year>1987</year>
	936	<publisher>Logotron</publisher>
	937	<part name="flop1" interface="floppy_5_25">
	938	<dataarea name="flop" size="104999">
	939	<rom name="066 xor designer.fsd" size="104999" crc="97241bdb" sha1="9ee46c346167d6a352e048f6c6a93b79e1ae00f0" offset="0" />
	940	</dataarea>
	941	</part>
	942	</software>
	943
	944	<software name="sinkbism">
	945	<description>Sink the Bismarck</description>
	946	<year>1986</year>
	947	<publisher>Design People</publisher>
	948	<part name="flop1" interface="floppy_5_25">
	949	<dataarea name="flop" size="68253">
	950	<rom name="071 sink the bismarck.fsd" size="68253" crc="85fb8e93" sha1="829951372cb6ed89412d360e85bf58801606e051" offset="0" />
	951	</dataarea>
	952	</part>
	953	</software>
	954
	955	<software name="tsentinl">
	956	<description>The Sentinel</description>
	957	<year>1986</year>
	958	<publisher>Firebird</publisher>
	959	<part name="flop1" interface="floppy_5_25">
	960	<dataarea name="flop" size="78834">
	961	<rom name="073 the sentinel.fsd" size="78834" crc="ca2e8436" sha1="54fc3d458c86f571f43214e760408fccc190bc1a" offset="0" />
	962	</dataarea>
	963	</part>
	964	</software>
	965
	966	<software name="evenstar">
	967	<description>Evening Star</description>
	968	<year>1987</year>
	969	<publisher>Hewson Consultants</publisher>
	970	<part name="flop1" interface="floppy_5_25">
	971	<dataarea name="flop" size="105080">
	972	<rom name="074 evening star.fsd" size="105080" crc="40f24ae7" sha1="87ba44647a54ac67db3a0458d33e9388be206a50" offset="0" />
	973	</dataarea>
	974	</part>
	975	</software>
	976
	977	<software name="beachead">
	978	<description>Beach Head</description>
	979	<year>1984</year>
	980	<publisher>U.S. Gold</publisher>
	981	<part name="flop1" interface="floppy_5_25">
	982	<dataarea name="flop" size="105077">
	983	<rom name="076 beach-head.fsd" size="105077" crc="ae5024f2" sha1="11f429599303c0f28feadf1d6f3bf2a941e573ca" offset="0" />
	984	</dataarea>
	985	</part>
	986	</software>
	987
	988	<software name="apocalyc">
	989	<description>Apocalypse (Command)</description>
	990	<year>1987</year>
	991	<publisher>Command</publisher>
	992	<part name="flop1" interface="floppy_5_25">
	993	<dataarea name="flop" size="104940">
	994	<rom name="081 apocalypse.fsd" size="104940" crc="da99bbd1" sha1="e915edb63d15614609919daf00852fae46899a52" offset="0" />
	995	</dataarea>
	996	</part>
	997	</software>
	998
	999	<software name="villsoul">
	1000	<description>Village of Lost Souls</description>
	1001	<year>1987</year>
	1002	<publisher>Robico</publisher>
	1003	<part name="flop1" interface="floppy_5_25">
	1004	<dataarea name="flop" size="105088">
	1005	<rom name="082 village of lost souls.fsd" size="105088" crc="5fd2cbb2" sha1="bcf5d2897be1139fd5a53404350a3826da7cb2bb" offset="0" />
	1006	</dataarea>
	1007	</part>
	1008	</software>
	1009
	1010	<software name="huntshau">
	1011	<description>The Hunt: Search for Shauna</description>
	1012	<year>1987</year>
	1013	<publisher>Robico</publisher>
	1014	<part name="flop1" interface="floppy_5_25">
	1015	<dataarea name="flop" size="105093">
	1016	<rom name="083 the hunt search for shauna.fsd" size="105093" crc="7914a1a8" sha1="bcef28049a2962965742a0931deb11431fbf2657" offset="0" />
	1017	</dataarea>
	1018	</part>
	1019	</software>
	1020
	1021	<software name="vutype">
	1022	<description>Vu-Type</description>
	1023	<year>1984</year>
	1024	<publisher>BBC Soft</publisher>
	1025	<part name="flop1" interface="floppy_5_25">
	1026	<dataarea name="flop" size="104937">
	1027	<rom name="091 vu-type.fsd" size="104937" crc="9f3310a9" sha1="b09ec00aea21db3bb00d096244a18c0420d29f29" offset="0" />
	1028	</dataarea>
	1029	</part>
	1030	</software>
	1031
	1032	<software name="battbrit">
	1033	<description>Battle of Britain</description>
	1034	<year>1987</year>
	1035	<publisher>Design People</publisher>
	1036	<part name="flop1" interface="floppy_5_25">
	1037	<dataarea name="flop" size="104947">
	1038	<rom name="092 battle of britain.fsd" size="104947" crc="6ba3eb9e" sha1="d0798a2bd0717cf3fc872cfdaee77e35fee9913e" offset="0" />
	1039	</dataarea>
	1040	</part>
	1041	</software>
	1042
	1043	<software name="rhansont">
	1044	<description>The Rick Hanson Trilogy - Saga of a Spy</description>
	1045	<year>1986</year>
	1046	<publisher>Robico</publisher>
	1047	<part name="flop1" interface="floppy_5_25">
	1048	<dataarea name="flop" size="105106">
	1049	<rom name="093 the rick hanson trilogy - saga of a spy.fsd" size="105106" crc="ee8438de" sha1="95dbcef42ff4c40754567e5d5012d88b1f3bad9a" offset="0" />
	1050	</dataarea>
	1051	</part>
	1052	</software>
	1053
	1054	<software name="bribbon1">
	1055	<description>Blue Ribbon Games Disk No.1</description>
	1056	<year>1985</year>
	1057	<publisher>Blue Ribbon</publisher>
	1058	<part name="flop1" interface="floppy_5_25">
	1059	<dataarea name="flop" size="104957">
	1060	<rom name="094 blue ribbon games disk no 1.fsd" size="104957" crc="6c3094bb" sha1="61a6ec8bd025beb135db182150b9a7a0165dbd50" offset="0" />
	1061	</dataarea>
	1062	</part>
	1063	</software>
	1064
	1065	<software name="bribbon2">
	1066	<description>Blue Ribbon Games Disk No.2</description>
	1067	<year>1985</year>
	1068	<publisher>Blue Ribbon</publisher>
	1069	<part name="flop1" interface="floppy_5_25">
	1070	<dataarea name="flop" size="104957">
	1071	<rom name="095 blue ribbon games disk no 2.fsd" size="104957" crc="316ed0fc" sha1="9961df49786fa5dcbb510a34d9ce19ec56559b39" offset="0" />
	1072	</dataarea>
	1073	</part>
	1074	</software>
	1075
	1076	<software name="bribbon3">
	1077	<description>Blue Ribbon Games Disk No.3</description>
	1078	<year>1985</year>
	1079	<publisher>Blue Ribbon</publisher>
	1080	<part name="flop1" interface="floppy_5_25">
	1081	<dataarea name="flop" size="104957">
	1082	<rom name="096 blue ribbon games disk no 3.fsd" size="104957" crc="eca0ae33" sha1="7fcc50e9614f950b5f14415d7d5a595ba3ed1815" offset="0" />
	1083	</dataarea>
	1084	</part>
	1085	</software>
	1086
	1087	<software name="jumpjeta">
	1088	<description>Jump Jet</description>
	1089	<year>1985</year>
	1090	<publisher>Anirog</publisher>
	1091	<part name="flop1" interface="floppy_5_25">
	1092	<dataarea name="flop" size="36929">
	1093	<rom name="098 jump jet.fsd" size="36929" crc="41c43f6a" sha1="78ee556141909966138b5aedbff43fbea76e2d6b" offset="0" />
	1094	</dataarea>
	1095	</part>
	1096	</software>
	1097
	1098	<software name="war">
	1099	<description>W.A.R.</description>
	1100	<year>1986</year>
	1101	<publisher>Martech</publisher>
	1102	<part name="flop1" interface="floppy_5_25">
	1103	<dataarea name="flop" size="105070">
	1104	<rom name="099 war.fsd" size="105070" crc="7c6460ea" sha1="26828685ebd2127257b4e6922fac1c6a08b48b9f" offset="0" />
	1105	</dataarea>
	1106	</part>
	1107	</software>
	1108
	1109	<software name="yiear">
	1110	<description>Yie Ar Kung Fu</description>
	1111	<year>1984</year>
	1112	<publisher>Imagine</publisher>
	1113	<part name="flop1" interface="floppy_5_25">
	1114	<dataarea name="flop" size="105081">
	1115	<rom name="100 yie ar kung fu.fsd" size="105081" crc="75022df9" sha1="a0c0e92db0ed9a0b3cfa0c31562ab15faf964a73" offset="0" />
	1116	</dataarea>
	1117	</part>
	1118	</software>
	1119
	1120	<software name="dambustr">
	1121	<description>The Dam Busters</description>
	1122	<year>1985</year>
	1123	<publisher>U.S. Gold</publisher>
	1124	<part name="flop1" interface="floppy_5_25">
	1125	<dataarea name="flop" size="105077">
	1126	<rom name="101 dambusters.fsd" size="105077" crc="44dac52e" sha1="44583ea514799ebe43f821a164696189b6136ae4" offset="0" />
	1127	</dataarea>
	1128	</part>
	1129	</software>
	1130
	1131	<software name="impmiss">
	1132	<description>Impossible Mission</description>
	1133	<year>1985</year>
	1134	<publisher>U.S. Gold</publisher>
	1135	<part name="flop1" interface="floppy_5_25">
	1136	<dataarea name="flop" size="105085">
	1137	<rom name="102 impossible mission.fsd" size="105085" crc="4453c805" sha1="7f773a609222cf0e618721b379b7c2ff4c66d253" offset="0" />
	1138	</dataarea>
	1139	</part>
	1140	</software>
	1141
	1142	<software name="brucelee">
	1143	<description>Bruce Lee</description>
	1144	<year>1985</year>
	1145	<publisher>U.S. Gold</publisher>
	1146	<part name="flop1" interface="floppy_5_25">
	1147	<dataarea name="flop" size="105076">
	1148	<rom name="103 bruce lee.fsd" size="105076" crc="d4b5ca15" sha1="0cfa4617e97dd5bd9d0508c6286a6c3a6c34e914" offset="0" />
	1149	</dataarea>
	1150	</part>
	1151	</software>
	1152
	1153	<software name="hyperspo">
	1154	<description>Hyper Sports</description>
	1155	<year>1985</year>
	1156	<publisher>Imagine</publisher>
	1157	<part name="flop1" interface="floppy_5_25">
	1158	<dataarea name="flop" size="105087">
	1159	<rom name="104 hyper sports.fsd" size="105087" crc="d21cef74" sha1="09e64619a9bb0b0a933978186d139f5ce7da794c" offset="0" />
	1160	</dataarea>
	1161	</part>
	1162	</software>
	1163
	1164	<software name="paperboy">
	1165	<description>Paperboy</description>
	1166	<year>1984</year>
	1167	<publisher>Elite</publisher>
	1168	<part name="flop1" interface="floppy_5_25">
	1169	<dataarea name="flop" size="78728">
	1170	<rom name="105 paperboy.fsd" size="78728" crc="b003d5db" sha1="3f3f6ec3572f1c2e678e52a8f2756dfc309ed06d" offset="0" />
	1171	</dataarea>
	1172	</part>
	1173	</software>
	1174
	1175	<software name="airwolf">
	1176	<description>Airwolf</description>
	1177	<year>1985</year>
	1178	<publisher>Elite</publisher>
	1179	<part name="flop1" interface="floppy_5_25">
	1180	<dataarea name="flop" size="104937">
	1181	<rom name="106 airwolf.fsd" size="104937" crc="40e3a8e1" sha1="2b0c0aeb9f25f5cbf5905c6593ad734842b7649c" offset="0" />
	1182	</dataarea>
	1183	</part>
	1184	</software>
	1185
	1186	<software name="commando">
	1187	<description>Commando</description>
	1188	<year>1985</year>
	1189	<publisher>Elite</publisher>
	1190	<part name="flop1" interface="floppy_5_25">
	1191	<dataarea name="flop" size="104938">
	1192	<rom name="107 commando.fsd" size="104938" crc="98c52361" sha1="c72d07c98da31150622495064add6e21d16f5d94" offset="0" />
	1193	</dataarea>
	1194	</part>
	1195	</software>
	1196
	1197	<software name="arkanoid">
	1198	<description>Arkanoid</description>
	1199	<year>1987</year>
	1200	<publisher>Imagine</publisher>
	1201	<part name="flop1" interface="floppy_5_25">
	1202	<dataarea name="flop" size="105075">
	1203	<rom name="108 arkanoid.fsd" size="105075" crc="8e21d5a2" sha1="a6cd09e531488e7f258225c428e3f5541b964177" offset="0" />
	1204	</dataarea>
	1205	</part>
	1206	</software>
	1207
	1208	<software name="raidmosc">
	1209	<description>Raid Over Moscow</description>
	1210	<year>1986</year>
	1211	<publisher>U.S. Gold</publisher>
	1212	<part name="flop1" interface="floppy_5_25">
	1213	<dataarea name="flop" size="105083">
	1214	<rom name="109 raid over moscow.fsd" size="105083" crc="9e0f96b3" sha1="3326a2761cac3d974cfecb0e50ea95ebc46ead6d" offset="0" />
	1215	</dataarea>
	1216	</part>
	1217	</software>
	1218
	1219	<software name="wayotef">
	1220	<description>The Way of the Exploding Fist</description>
	1221	<year>1985</year>
	1222	<publisher>Melbourne House</publisher>
	1223	<part name="flop1" interface="floppy_5_25">
	1224	<dataarea name="flop" size="105096">
	1225	<rom name="110 the way of the exploding fist.fsd" size="105096" crc="17f7e77c" sha1="7290a74156c4d9666e6af1e928f7939808ed07be" offset="0" />
	1226	</dataarea>
	1227	</part>
	1228	</software>
	1229
	1230	<software name="sharrier">
	1231	<description>Strike Force Harrier</description>
	1232	<year>1986</year>
	1233	<publisher>Mirrorsoft</publisher>
	1234	<part name="flop1" interface="floppy_5_25">
	1235	<dataarea name="flop" size="102539">
	1236	<rom name="111 strike force harrier.fsd" size="102539" crc="8e4dbbe4" sha1="fef93e95b88963c958234c7e8d9ee36813ec44cc" offset="0" />
	1237	</dataarea>
	1238	</part>
	1239	</software>
	1240
	1241	<software name="tetrism">
	1242	<description>Tetris</description>
	1243	<year>1987</year>
	1244	<publisher>Mirrorsoft</publisher>
	1245	<part name="flop1" interface="floppy_5_25">
	1246	<dataarea name="flop" size="86589">
	1247	<rom name="112 tetris.fsd" size="86589" crc="5233bcdd" sha1="0ff0269595bb929504f9cc1b764203f77fac504e" offset="0" />
	1248	</dataarea>
	1249	</part>
	1250	</software>
	1251
	1252	<software name="pipemani">
	1253	<description>Pipe Mania</description>
	1254	<year>1989</year>
	1255	<publisher>Empire</publisher>
	1256	<part name="flop1" interface="floppy_5_25">
	1257	<dataarea name="flop" size="102575">
	1258	<rom name="113 pipe mania.fsd" size="102575" crc="a1590704" sha1="931e93720e87035ee4f813e17b073c84904914af" offset="0" />
	1259	</dataarea>
	1260	</part>
	1261	</software>
	1262
	1263	<software name="tarzanm">
	1264	<description>Tarzan (Martech)</description>
	1265	<year>1987</year>
	1266	<publisher>Martech</publisher>
	1267	<part name="flop1" interface="floppy_5_25">
	1268	<dataarea name="flop" size="105073">
	1269	<rom name="114 tarzan.fsd" size="105073" crc="7cc3db73" sha1="9b29951449b38c7d711a31192d91183142b2c920" offset="0" />
	1270	</dataarea>
	1271	</part>
	1272	</software>
	1273
	1274	<software name="samfoxsp">
	1275	<description>Samantha Fox Strip Poker</description>
	1276	<year>1986</year>
	1277	<publisher>Martech</publisher>
	1278	<part name="flop1" interface="floppy_5_25">
	1279	<dataarea name="flop" size="105091">
	1280	<rom name="115 samantha fox strip poker.fsd" size="105091" crc="813cd5ce" sha1="61f2e38713b5ab22098f77c1107c1e012eb2563f" offset="0" />
	1281	</dataarea>
	1282	</part>
	1283	</software>
	1284
	1285	<software name="kayleth">
	1286	<description>Kayleth</description>
	1287	<year>1986</year>
	1288	<publisher>U.S. Gold</publisher>
	1289	<part name="flop1" interface="floppy_5_25">
	1290	<dataarea name="flop" size="105074">
	1291	<rom name="116 kayleth.fsd" size="105074" crc="d77a0f43" sha1="8642156eaeaf3cf175dced0ae47aad89410a3d47" offset="0" />
	1292	</dataarea>
	1293	</part>
	1294	</software>
	1295
	1296	<software name="skirmish">
	1297	<description>Skirmish</description>
	1298	<year>1988</year>
	1299	<publisher>Godax</publisher>
	1300	<part name="flop1" interface="floppy_5_25">
	1301	<dataarea name="flop" size="103890">
	1302	<rom name="117 skirmish.fsd" size="103890" crc="5f00c4db" sha1="0750f32230ab429802e048185b1364f986230a9c" offset="0" />
	1303	</dataarea>
	1304	</part>
	1305	</software>
	1306
	1307	<software name="kourtyd">
	1308	<description>Kourtyard</description>
	1309	<year>1988</year>
	1310	<publisher>Godax</publisher>
	1311	<part name="flop1" interface="floppy_5_25">
	1312	<dataarea name="flop" size="104609">
	1313	<rom name="118 kourtyard.fsd" size="104609" crc="808ecc4a" sha1="3696dc1fd4df99213e254d362a5501c6a3f32dce" offset="0" />
	1314	</dataarea>
	1315	</part>
	1316	</software>
	1317
	1318	<software name="strandgr">
	1319	<description>Stranger Danger</description>
	1320	<year>1988</year>
	1321	<publisher>Roger Hargreaves</publisher>
	1322	<part name="flop1" interface="floppy_5_25">
	1323	<dataarea name="flop" size="104945">
	1324	<rom name="119 stranger danger.fsd" size="104945" crc="f2c5f3f1" sha1="41a69302866fcc436dc474cc96810c98c27bf421" offset="0" />
	1325	</dataarea>
	1326	</part>
	1327	</software>
	1328
	1329	<software name="megapoca">
	1330	<description>Mega-Apocalypse</description>
	1331	<year>1988</year>
	1332	<publisher>Martech</publisher>
	1333	<part name="flop1" interface="floppy_5_25">
	1334	<dataarea name="flop" size="105082">
	1335	<rom name="134 mega apocalypse.fsd" size="105082" crc="cf3a7d6e" sha1="296c43f5b55a9ddf9894ec47647e5ce978ad4249" offset="0" />
	1336	</dataarea>
	1337	</part>
	1338	</software>
	1339
	1340	<software name="cholo">
	1341	<description>Cholo</description>
	1342	<year>1986</year>
	1343	<publisher>Firebird</publisher>
	1344	<part name="flop1" interface="floppy_5_25">
	1345	<dataarea name="flop" size="105072">
	1346	<rom name="135 cholo.fsd" size="105072" crc="8f23bd24" sha1="464bec1cf14d34f902d783e62f7ea4789458cee8" offset="0" />
	1347	</dataarea>
	1348	</part>
	1349	</software>
	1350
	1351	<software name="icarus">
	1352	<description>Icarus</description>
	1353	<year>1988</year>
	1354	<publisher>Mandarin</publisher>
	1355	<part name="flop1" interface="floppy_5_25">
	1356	<dataarea name="flop" size="102315">
	1357	<rom name="136 icarus.fsd" size="102315" crc="a0ae7c9a" sha1="c8ac4964859127838228372dadf64f0391320c57" offset="0" />
	1358	</dataarea>
	1359	</part>
	1360	</software>
	1361
	1362	<software name="musicoll">
	1363	<description>The Musicsoft Collection</description>
	1364	<year>1986</year>
	1365	<publisher>Duckworth</publisher>
	1366	<part name="flop1" interface="floppy_5_25">
	1367	<dataarea name="flop" size="105091">
	1368	<rom name="137 the musicsoft collection.fsd" size="105091" crc="f877e2ca" sha1="2a7331c81bc61ff72d9adb167e86833928f863f4" offset="0" />
	1369	</dataarea>
	1370	</part>
	1371	</software>
	1372
	1373	<software name="midway">
	1374	<description>Midway</description>
	1375	<year>1988</year>
	1376	<publisher>Design People</publisher>
	1377	<part name="flop1" interface="floppy_5_25">
	1378	<dataarea name="flop" size="70863">
	1379	<rom name="138 midway.fsd" size="70863" crc="9bef6082" sha1="1264d847abf6c458570913ec3cda6c9ff0fb1d94" offset="0" />
	1380	</dataarea>
	1381	</part>
	1382	</software>
	1383
	1384	<software name="ckeypodd">
	1385	<description>Concept Keyboard Podd</description>
	1386	<year>1988</year>
	1387	<publisher>ESM</publisher>
	1388	<part name="flop1" interface="floppy_5_25">
	1389	<dataarea name="flop" size="104951">
	1390	<rom name="139 concept keyboard podd.fsd" size="104951" crc="b83dce35" sha1="abd3f44590143f7e4febcae3c4ec2f2db6c17019" offset="0" />
	1391	</dataarea>
	1392	</part>
	1393	</software>
	1394
	1395	<software name="gradvcre">
	1396	<description>The Graphic Adventure Creator</description>
	1397	<year>1986</year>
	1398	<publisher>Incentive</publisher>
	1399	<part name="flop1" interface="floppy_5_25">
	1400	<dataarea name="flop" size="104959">
	1401	<rom name="140 the graphic adventure creator.fsd" size="104959" crc="11341d1c" sha1="9df4cf2853bf58c5010d8dba0d479c65c5d962c7" offset="0" />
	1402	</dataarea>
	1403	</part>
	1404	</software>
	1405
	1406	<software name="buffers">
	1407	<description>Buffers</description>
	1408	<year>1986</year>
	1409	<publisher>FSoft</publisher>
	1410	<part name="flop1" interface="floppy_5_25">
	1411	<dataarea name="flop" size="81624">
	1412	<rom name="141 fsoft buffers (corrupt).fsd" size="81624" crc="30376f2f" sha1="f0fedbf368444fbcb12da926109cd7523dbbf1e3" offset="0" />
	1413	</dataarea>
	1414	</part>
	1415	</software>
	1416
	1417	<software name="musicmak">
	1418	<description>Music Maker</description>
	1419	<year>1983</year>
	1420	<publisher>FSoft</publisher>
	1421	<part name="flop1" interface="floppy_5_25">
	1422	<dataarea name="flop" size="81628">
	1423	<rom name="142 fsoft music maker.fsd" size="81628" crc="add9d908" sha1="76d8d04d294d475330afaa4fe901f8b076f06187" offset="0" />
	1424	</dataarea>
	1425	</part>
	1426	</software>
	1427
	1428	<software name="krakout">
	1429	<description>Krakout</description>
	1430	<year>1988</year>
	1431	<publisher>Gremlin</publisher>
	1432	<part name="flop1" interface="floppy_5_25">
	1433	<dataarea name="flop" size="89348">
	1434	<rom name="165 krakout.fsd" size="89348" crc="35067841" sha1="06cf690fba697dd83c1efb1e331d4b67ff11537c" offset="0" />
	1435	</dataarea>
	1436	</part>
	1437	</software>
	1438
	1439	<software name="3dpool">
	1440	<description>3D Pool</description>
	1441	<year>1989</year>
	1442	<publisher>Firebird</publisher>
	1443	<part name="flop1" interface="floppy_5_25">
	1444	<dataarea name="flop" size="105881">
	1445	<rom name="166 3d pool.fsd" size="105881" crc="b8d584c4" sha1="0ad3835f40fca9d967c4537b96733b88ebee460a" offset="0" />
	1446	</dataarea>
	1447	</part>
	1448	</software>
	1449
	1450	<software name="redarrow">
	1451	<description>Red Arrows</description>
	1452	<year>1985</year>
	1453	<publisher>Database</publisher>
	1454	<part name="flop1" interface="floppy_5_25">
	1455	<dataarea name="flop" size="59426">
	1456	<rom name="168 red arrows.fsd" size="59426" crc="5e9b2984" sha1="53211145e7de4742e43cff009ca212ce3167468b" offset="0" />
	1457	</dataarea>
	1458	</part>
	1459	</software>
	1460
	1461	<software name="phancomb">
	1462	<description>Phantom Combat (BBC Series)</description>
	1463	<year>1985</year>
	1464	<publisher>Doctor Soft</publisher>
	1465	<part name="flop1" interface="floppy_5_25">
	1466	<dataarea name="flop" size="104944">
	1467	<rom name="169 phantom combat (bbc series).fsd" size="104944" crc="fe65a681" sha1="bd249fcaccaec422ea753aafe9b24efe68d88a20" offset="0" />
	1468	</dataarea>
	1469	</part>
	1470	</software>
	1471
	1472	<software name="phancombb" cloneof="phancomb">
	1473	<description>Phantom Combat (BBC 'B' 32K)</description>
	1474	<year>1985</year>
	1475	<publisher>Doctor Soft</publisher>
	1476	<part name="flop1" interface="floppy_5_25">
	1477	<dataarea name="flop" size="54572">
	1478	<rom name="170 phantom combat (bbc 'b' 32k).fsd" size="54572" crc="513a6b64" sha1="4ff0d568790fe448d5f803098923a677815a6a53" offset="0" />
	1479	</dataarea>
	1480	</part>
	1481	</software>
	1482
	1483	<software name="phancombbp" cloneof="phancomb">
	1484	<description>Phantom Combat (BBC B &amp; 'Plus')</description>
	1485	<year>1985</year>
	1486	<publisher>Doctor Soft</publisher>
	1487	<part name="flop1" interface="floppy_5_25">
	1488	<dataarea name="flop" size="54572">
	1489	<rom name="170 phantom combat (bbc b &amp; 'plus').fsd" size="54572" crc="f0e01ac7" sha1="a242b35ee1fd2e403a7ea26a5dd3f708154b77ce" offset="0" />
	1490	</dataarea>
	1491	</part>
	1492	</software>
	1493
	1494	<software name="ccastles">
	1495	<description>Crystal Castles</description>
	1496	<year>1986</year>
	1497	<publisher>U.S. Gold</publisher>
	1498	<part name="flop1" interface="floppy_5_25">
	1499	<dataarea name="flop" size="105082">
	1500	<rom name="171 crystal castles.fsd" size="105082" crc="533f83de" sha1="765c6d8bbadc46ffe954afd626b6e54dbc7b7819" offset="0" />
	1501	</dataarea>
	1502	</part>
	1503	</software>
	1504
	1505	<software name="daleytst">
	1506	<description>Daley Thompson's Super-Test</description>
	1507	<year>1985</year>
	1508	<publisher>Ocean</publisher>
	1509	<part name="flop1" interface="floppy_5_25">
	1510	<dataarea name="flop" size="105094">
	1511	<rom name="172 daley thompson's super-test.fsd" size="105094" crc="76dec00e" sha1="c5e82c7338d985272abf099a51420988d0658bba" offset="0" />
	1512	</dataarea>
	1513	</part>
	1514	</software>
	1515
	1516	<software name="3dgraphd">
	1517	<description>3D Graphics Development System</description>
	1518	<year>1985</year>
	1519	<publisher>Glentop Publishers</publisher>
	1520	<part name="flop1" interface="floppy_5_25">
	1521	<feature name="part_id" value="Startup"/>
	1522	<dataarea name="flop" size="97078">
	1523	<rom name="173 3d graphics development system.fsd" size="97078" crc="407466ba" sha1="304eaf043119e382888771d1afbcf29f8d02038f" offset="0" />
	1524	</dataarea>
	1525	</part>
	1526	<part name="flop2" interface="floppy_5_25">
	1527	<feature name="part_id" value="Database"/>
	1528	<dataarea name="flop" size="105073">
	1529	<rom name="173 3d graphics development system database.fsd" size="105073" crc="b6b986fe" sha1="b425ea1f925032293509423ebe0296db42a356bf" offset="0" />
	1530	</dataarea>
	1531	</part>
	1532	</software>
	1533
	1534	<software name="wediag">
	1535	<description>Diagnostics Disc</description>
	1536	<year>1985</year>
	1537	<publisher>Watford Electronics</publisher>
	1538	<part name="flop1" interface="floppy_5_25">
	1539	<dataarea name="flop" size="15852">
	1540	<rom name="185 watford electronics diagnostics disc.fsd" size="15852" crc="74cd2892" sha1="ebbc2de75ed329ecdb657ea821864c626d9fa905" offset="0" />
	1541	</dataarea>
	1542	</part>
	1543	</software>
	1544
	1545	<software name="discdebg">
	1546	<description>Disc Debug and Copy All</description>
	1547	<year>198?</year>
	1548	<publisher>&lt;unknown&gt;</publisher>
	1549	<part name="flop1" interface="floppy_5_25">
	1550	<dataarea name="flop" size="104953">
	1551	<rom name="190 disk debug and copy-all.fsd" size="104953" crc="20dc59e1" sha1="c5e998e839cef9f9a53b531e10a0d2de4ee8050a" offset="0" />
	1552	</dataarea>
	1553	</part>
	1554	</software>
	1555
	1556	<software name="discexec">
	1557	<description>Disc Executor</description>
	1558	<year>198?</year>
	1559	<publisher>Vision Software</publisher>
	1560	<part name="flop1" interface="floppy_5_25">
	1561	<dataarea name="flop" size="104943">
	1562	<rom name="191 disc executor.fsd" size="104943" crc="ec1e85a4" sha1="df46bf83ecac015b2b6f5f2ebfe68e42b00a4b12" offset="0" />
	1563	</dataarea>
	1564	</part>
	1565	</software>
	1566
	1567	<software name="mooncrstl" cloneof="mooncrst">
	1568	<description>Moon Cresta (no Lenslok)</description>
	1569	<year>1986</year>
	1570	<publisher>Incentive</publisher>
	1571	<part name="flop1" interface="floppy_5_25">
	1572	<dataarea name="flop" size="105078">
	1573	<rom name="200 moon cresta (no lenslock).fsd" size="105078" crc="791afbfa" sha1="8a397320421f3a2cc00c2a5ac8378cc677dbbd76" offset="0" />
	1574	</dataarea>
	1575	</part>
	1576	</software>
	1577
	1578	<software name="mooncrst">
	1579	<description>Moon Cresta</description>
	1580	<year>1986</year>
	1581	<publisher>Incentive</publisher>
	1582	<part name="flop1" interface="floppy_5_25">
	1583	<dataarea name="flop" size="105078">
	1584	<rom name="200 moon cresta.fsd" size="105078" crc="b663fcde" sha1="7fe86e62536655b69308b59047e4867e06ff0c6b" offset="0" />
	1585	</dataarea>
	1586	</part>
	1587	</software>
	1588
	1589	<software name="mmindqm">
	1590	<description>BBC Mastermind Quizmaster</description>
	1591	<year>1984</year>
	1592	<publisher>Mirrorsoft-Ivan Berg</publisher>
	1593	<part name="flop1" interface="floppy_5_25">
	1594	<dataarea name="flop" size="102330">
	1595	<rom name="201 mastermind quizmaster.fsd" size="102330" crc="70955427" sha1="423ce6de7e159de72261802cf82a0db5db4169c4" offset="0" />
	1596	</dataarea>
	1597	</part>
	1598	</software>
	1599
	1600	<software name="mmind">
	1601	<description>BBC Mastermind</description>
	1602	<year>1984</year>
	1603	<publisher>Mirrorsoft-Ivan Berg</publisher>
	1604	<part name="flop1" interface="floppy_5_25">
	1605	<dataarea name="flop" size="102529">
	1606	<rom name="201 mastermind.fsd" size="102529" crc="a775c8b7" sha1="c11f149e7827ac5d83544593652f5fb9c8d97910" offset="0" />
	1607	</dataarea>
	1608	</part>
	1609	</software>
	1610
	1611	<software name="tcrosswd">
	1612	<description>The Times Crosswords Vol.1</description>
	1613	<year>1988</year>
	1614	<publisher>The Times</publisher>
	1615	<part name="flop1" interface="floppy_5_25">
	1616	<feature name="part_id" value="Side 1"/>
	1617	<dataarea name="flop" size="209879">
	1618	<rom name="203 the times crosswords volume 1 side 1.fsd" size="209879" crc="c24e1d46" sha1="43e6a446f763ecebac75fd83e2ee315cf4b7dadc" offset="0" />
	1619	</dataarea>
	1620	</part>
	1621	<part name="flop2" interface="floppy_5_25">
	1622	<feature name="part_id" value="Side 2"/>
	1623	<dataarea name="flop" size="209879">
	1624	<rom name="203 the times crosswords volume 1 side 2.fsd" size="209879" crc="341f1170" sha1="59bf18805722ef0e6b3672d35f9ac7192936f3b3" offset="0" />
	1625	</dataarea>
	1626	</part>
	1627	</software>
	1628
	1629	<software name="amxpagem">
	1630	<description>AMX Pagemaker</description>
	1631	<year>1986</year>
	1632	<publisher>Advanced Memory Systems</publisher>
	1633	<part name="flop1" interface="floppy_5_25">
	1634	<dataarea name="flop" size="105080">
	1635	<rom name="204 amx pagemaker.fsd" size="105080" crc="8f888021" sha1="252b293243a01d2f3fd89036918800ca6de1d8db" offset="0" />
	1636	</dataarea>
	1637	</part>
	1638	</software>
	1639
	1640	<software name="tessalat">
	1641	<description>Tesselator</description>
	1642	<year>1984</year>
	1643	<publisher>Addison-Wesley</publisher>
	1644	<part name="flop1" interface="floppy_5_25">
	1645	<dataarea name="flop" size="63004">
	1646	<rom name="205 tesselator.fsd" size="63004" crc="ee1b75ee" sha1="8f603b6ac22739fddc7185d31a1ce79d4716098c" offset="0" />
	1647	</dataarea>
	1648	</part>
	1649	</software>
	1650
	1651	<software name="dlogic">
	1652	<description>D-Logic</description>
	1653	<year>1983</year>
	1654	<publisher>SciCAL Software</publisher>
	1655	<part name="flop1" interface="floppy_5_25">
	1656	<dataarea name="flop" size="104937">
	1657	<rom name="207 d-logic.fsd" size="104937" crc="0a65c978" sha1="8b7b411e4e27a505749afd6daffdaaa2b16b9cb0" offset="0" />
	1658	</dataarea>
	1659	</part>
	1660	</software>
	1661
	1662	<software name="uridium">
	1663	<description>Uridium</description>
	1664	<year>1987</year>
	1665	<publisher>Hewson Consultants</publisher>
	1666	<part name="flop1" interface="floppy_5_25">
	1667	<dataarea name="flop" size="104675">
	1668	<rom name="209 uridium.fsd" size="104675" crc="8f3637f9" sha1="a68156d3fa600e4c4035102600ff4869fa4c01ba" offset="0" />
	1669	</dataarea>
	1670	</part>
	1671	</software>
	1672
	1673	<software name="tmsys86" cloneof="tmsys">
	1674	<description>The Music System (1986)</description>
	1675	<year>1986</year>
	1676	<publisher>Island Logic</publisher>
	1677	<part name="flop1" interface="floppy_5_25">
	1678	<dataarea name="flop" size="104951">
	1679	<rom name="210 the music system (1986 release).fsd" size="104951" crc="e61c1d8a" sha1="4e322c6fdef611c55fe16be9ec6302a4051f0c24" offset="0" />
	1680	</dataarea>
	1681	</part>
	1682	</software>
	1683
	1684	<software name="tmsys">
	1685	<description>The Music System</description>
	1686	<year>1984</year>
	1687	<publisher>Island Logic</publisher>
	1688	<part name="flop1" interface="floppy_5_25">
	1689	<feature name="part_id" value="1a"/>
	1690	<dataarea name="flop" size="104741">
	1691	<rom name="244 the music system 1a.fsd" size="104741" crc="5c2bcbbc" sha1="832dca99880d53b258f68c1f66ef0ce365c02b97" offset="0" />
	1692	</dataarea>
	1693	</part>
	1694	<part name="flop2" interface="floppy_5_25">
	1695	<feature name="part_id" value="1b"/>
	1696	<dataarea name="flop" size="104741">
	1697	<rom name="244 the music system 1b.fsd" size="104741" crc="705e8c30" sha1="e7f0f1f379213c995e403fd2b15445dfc75eb7f5" offset="0" />
	1698	</dataarea>
	1699	</part>
	1700	<part name="flop3" interface="floppy_5_25">
	1701	<feature name="part_id" value="1c"/>
	1702	<dataarea name="flop" size="104741">
	1703	<rom name="244 the music system 1c.fsd" size="104741" crc="c45ef959" sha1="655e0815acb01a9c9f474c58d6ebb9753aae9d56" offset="0" />
	1704	</dataarea>
	1705	</part>
	1706	</software>
	1707
	1708	<software name="sprtspec">
	1709	<description>Sport Spectacular</description>
	1710	<year>198?</year>
	1711	<publisher>Alternative</publisher>
	1712	<part name="flop1" interface="floppy_5_25">
	1713	<feature name="part_id" value="Side 1"/>
	1714	<dataarea name="flop" size="99705">
	1715	<rom name="211 sport spectacular side 1.fsd" size="99705" crc="12330a00" sha1="ed2368cde11a6cf26115e2dae85b4ce5ee5f3032" offset="0" />
	1716	</dataarea>
	1717	</part>
	1718	<part name="flop2" interface="floppy_5_25">
	1719	<feature name="part_id" value="Side 2"/>
	1720	<dataarea name="flop" size="99706">
	1721	<rom name="211 sport spectacular side 2.fsd" size="99706" crc="e68f751d" sha1="0325f070f4263480d4ac5bf3d3d3f14282effccf" offset="0" />
	1722	</dataarea>
	1723	</part>
	1724	</software>
	1725
	1726	<software name="mexico86">
	1727	<description>Mexico 86</description>
	1728	<year>1986</year>
	1729	<publisher>Qualsoft</publisher>
	1730	<part name="flop1" interface="floppy_5_25">
	1731	<dataarea name="flop" size="104939">
	1732	<rom name="214 mexico 86.fsd" size="104939" crc="ce06c188" sha1="3785e14ab12404589877959cd6fb6f4ee5f1ab1f" offset="0" />
	1733	</dataarea>
	1734	</part>
	1735	</software>
	1736
	1737	<software name="notapenn">
	1738	<description>Not a Penny More, Not a Penny Less</description>
	1739	<year>1987</year>
	1740	<publisher>Domark</publisher>
	1741	<part name="flop1" interface="floppy_5_25">
	1742	<feature name="part_id" value="Side 1"/>
	1743	<dataarea name="flop" size="104964">
	1744	<rom name="215 napmnapl side 1.fsd" size="104964" crc="8e59911a" sha1="91e5f2aaeee1eb7adb2ee8d898e8b46b53125c48" offset="0" />
	1745	</dataarea>
	1746	</part>
	1747	<part name="flop2" interface="floppy_5_25">
	1748	<feature name="part_id" value="Side 2"/>
	1749	<dataarea name="flop" size="104964">
	1750	<rom name="215 napmnapl side 2.fsd" size="104964" crc="ad51aaac" sha1="ef0e5a6daddaac0de147d28b4a7399baf7f3eb1c" offset="0" />
	1751	</dataarea>
	1752	</part>
	1753	</software>
	1754
	1755	<software name="discdup2">
	1756	<description>Disc Duplicator II</description>
	1757	<year>1984</year>
	1758	<publisher>Howard Spurr</publisher>
	1759	<part name="flop1" interface="floppy_5_25">
	1760	<dataarea name="flop" size="51116">
	1761	<rom name="216 disc duplicator ii.fsd" size="51116" crc="fa519064" sha1="832aa615e66f5594a688666769c9074a46bc054c" offset="0" />
	1762	</dataarea>
	1763	</part>
	1764	</software>
	1765
	1766	<software name="starseek">
	1767	<description>Star Seeker</description>
	1768	<year>1985</year>
	1769	<publisher>Mirrorsoft</publisher>
	1770	<part name="flop1" interface="floppy_5_25">
	1771	<dataarea name="flop" size="102530">
	1772	<rom name="217 star seeker.fsd" size="102530" crc="54e36349" sha1="8943dc64d52ff43dd6cb42f16b1ff2f94709bcd0" offset="0" />
	1773	</dataarea>
	1774	</part>
	1775	</software>
	1776
	1777	<software name="dunjunz">
	1778	<description>Dunjunz</description>
	1779	<year>1987</year>
	1780	<publisher>Bug Byte</publisher>
	1781	<part name="flop1" interface="floppy_5_25">
	1782	<feature name="part_id" value="Side A"/>
	1783	<dataarea name="flop" size="104937">
	1784	<rom name="226 dunjunz side a.fsd" size="104937" crc="25fc923b" sha1="9d05d9f79b506129347eeaf28711409058d029c9" offset="0" />
	1785	</dataarea>
	1786	</part>
	1787	<part name="flop2" interface="floppy_5_25">
	1788	<feature name="part_id" value="Side B"/>
	1789	<dataarea name="flop" size="104937">
	1790	<rom name="226 dunjunz side b.fsd" size="104937" crc="3f717792" sha1="915acda5b0522d96dabad0e3e0cfb0d1b260cae4" offset="0" />
	1791	</dataarea>
	1792	</part>
	1793	</software>
	1794
	1795	<software name="keybplay">
	1796	<description>Keyboard Player</description>
	1797	<year>1986</year>
	1798	<publisher>Chalksoft</publisher>
	1799	<part name="flop1" interface="floppy_5_25">
	1800	<dataarea name="flop" size="104945">
	1801	<rom name="253 keyboard player.fsd" size="104945" crc="ee551142" sha1="4742502caa112bc7c61231af0925becd2b7359e4" offset="0" />
	1802	</dataarea>
	1803	</part>
	1804	</software>
	1805
	1806	<software name="v2140dd">
	1807	<description>Vector 2 v1.40 (Acorn 1770)</description>
	1808	<year>1985</year>
	1809	<publisher>Chalice Software</publisher>
	1810	<part name="flop1" interface="floppy_5_25">
	1811	<dataarea name="flop" size="62238">
	1812	<rom name="256 vector 2 v140 acorn 1770.fsd" size="62238" crc="bb051095" sha1="3d41d8708ef97b77d63946886ef374d281106cbd" offset="0" />
	1813	</dataarea>
	1814	</part>
	1815	</software>
	1816
	1817	<software name="v2140sd">
	1818	<description>Vector 2 v1.40 (Single Density)</description>
	1819	<year>1985</year>
	1820	<publisher>Chalice Software</publisher>
	1821	<part name="flop1" interface="floppy_5_25">
	1822	<dataarea name="flop" size="59718">
	1823	<rom name="256 vector 2 v140 single density.fsd" size="59718" crc="38bcae0c" sha1="b585492a62d7a3d96b2f738ccb959eb4b170dfd2" offset="0" />
	1824	</dataarea>
	1825	</part>
	1826	</software>
	1827
	1828	<software name="v1120">
	1829	<description>Vector 1 v1.20</description>
	1830	<year>1985</year>
	1831	<publisher>Chalice Software</publisher>
	1832	<part name="flop1" interface="floppy_5_25">
	1833	<dataarea name="flop" size="63766">
	1834	<rom name="257 vector 1 v120.fsd" size="63766" crc="28a5004c" sha1="b9aded368127bcefbf699ceb9ebf798bcd536f30" offset="0" />
	1835	</dataarea>
	1836	</part>
	1837	</software>
	1838
	1839	<software name="v1120b">
	1840	<description>Vector 1 v1.20b</description>
	1841	<year>1985</year>
	1842	<publisher>Chalice Software</publisher>
	1843	<part name="flop1" interface="floppy_5_25">
	1844	<dataarea name="flop" size="63766">
	1845	<rom name="257 vector 1 v120b.fsd" size="63766" crc="2331b7c7" sha1="ab20b1a9ac3f03c550c71a11f030d2aafb5e73e4" offset="0" />
	1846	</dataarea>
	1847	</part>
	1848	</software>
	1849
	1850	<software name="doscopy">
	1851	<description>DOSCOPY</description>
	1852	<year>1986</year>
	1853	<publisher>Baksoft</publisher>
	1854	<part name="flop1" interface="floppy_5_25">
	1855	<dataarea name="flop" size="104945">
	1856	<rom name="258 baksoft doscopy.fsd" size="104945" crc="145a38f8" sha1="e340fc48921e863cc606cb64ca3aecd77ba5878e" offset="0" />
	1857	</dataarea>
	1858	</part>
	1859	</software>
	1860
	1861	<software name="puff">
	1862	<description>Puff</description>
	1863	<year>1986</year>
	1864	<publisher>ESM</publisher>
	1865	<part name="flop1" interface="floppy_5_25">
	1866	<dataarea name="flop" size="104938">
	1867	<rom name="279 esm puff.fsd" size="104938" crc="fea462d2" sha1="40f61cb68e77ca9be67352f45ab3462f8083cb7c" offset="0" />
	1868	</dataarea>
	1869	</part>
	1870	</software>
	1871
	1872	<software name="spshuttm">
	1873	<description>Space Shuttle</description>
	1874	<year>1983</year>
	1875	<publisher>Microdeal</publisher>
	1876	<part name="flop1" interface="floppy_5_25">
	1877	<dataarea name="flop" size="28928">
	1878	<rom name="291 shuttle.fsd" size="28928" crc="602ae93b" sha1="c7ecaf30794d5a4e917903487da94743d030124d" offset="0" />
	1879	</dataarea>
	1880	</part>
	1881	</software>
	1882
	1883	<software name="dddcalc">
	1884	<description>DDD-calc</description>
	1885	<year>1985</year>
	1886	<publisher>Gemini</publisher>
	1887	<part name="flop1" interface="floppy_5_25">
	1888	<dataarea name="flop" size="85808">
	1889	<rom name="293 ddd-calc.fsd" size="85808" crc="f66ccedc" sha1="0cfa84a59f4cbe0b82c581cbb7e7f2203660bd60" offset="0" />
	1890	</dataarea>
	1891	</part>
	1892	</software>
	1893
	1894	<software name="olympdec">
	1895	<description>Olympic Decathlon</description>
	1896	<year>1984</year>
	1897	<publisher>Alligata</publisher>
	1898	<part name="flop1" interface="floppy_5_25">
	1899	<dataarea name="flop" size="78737">
	1900	<rom name="294 olympic decathlon.fsd" size="78737" crc="b4543527" sha1="a0ed535c21a3f5cd4a65f2655391938d0d0d64ba" offset="0" />
	1901	</dataarea>
	1902	</part>
	1903	</software>
	1904
	1905	<software name="egyptadv">
	1906	<description>Egyptian Adventure</description>
	1907	<year>1987</year>
	1908	<publisher>Duckworth</publisher>
	1909	<part name="flop1" interface="floppy_5_25">
	1910	<dataarea name="flop" size="105085">
	1911	<rom name="295 egyptian adventure.fsd" size="105085" crc="aa65c795" sha1="a33c0188feb8029ede52a56428ca141af09648b9" offset="0" />
	1912	</dataarea>
	1913	</part>
	1914	</software>
	1915
	1916	<software name="akhdisku">
	1917	<description>Akhter BBC Disk Utilities</description>
	1918	<year>198?</year>
	1919	<publisher>Akhter</publisher>
	1920	<part name="flop1" interface="floppy_5_25">
	1921	<dataarea name="flop" size="81366">
	1922	<rom name="296 akhter bbc disk utilities.fsd" size="81366" crc="5eb84680" sha1="f973e9f756d50715d9e51c0883cb324d1c99dde8" offset="0" />
	1923	</dataarea>
	1924	</part>
	1925	</software>
	1926
	1927	<software name="discdup3m" cloneof="discdup3">
	1928	<description>Disc Duplicator 3 (modified to copy itself)</description>
	1929	<year>1985</year>
	1930	<publisher>FSoft</publisher>
	1931	<part name="flop1" interface="floppy_5_25">
	1932	<dataarea name="flop" size="47298">
	1933	<rom name="297 disc duplicator 3 (modified to copy itself).fsd" size="47298" crc="a27ba46e" sha1="b65903c0e47b118d586634ab52948f3b87eb2614" offset="0" />
	1934	</dataarea>
	1935	</part>
	1936	</software>
	1937
	1938	<software name="discdup3">
	1939	<description>Disc Duplicator 3</description>
	1940	<year>1985</year>
	1941	<publisher>FSoft</publisher>
	1942	<part name="flop1" interface="floppy_5_25">
	1943	<dataarea name="flop" size="47298">
	1944	<rom name="297 disc duplicator 3.fsd" size="47298" crc="b59f2073" sha1="adb2e3c2c481cd1f6b55cb6ae0866c1814072d29" offset="0" />
	1945	</dataarea>
	1946	</part>
	1947	</software>
	1948
	1949	<software name="lotr">
	1950	<description>The Lord of the Rings</description>
	1951	<year>1986</year>
	1952	<publisher>Melbourne House</publisher>
	1953	<part name="flop1" interface="floppy_5_25">
	1954	<feature name="part_id" value="Side 1"/>
	1955	<dataarea name="flop" size="105091">
	1956	<rom name="300 lord of the rings side 1.fsd" size="105091" crc="922d9f1b" sha1="cc684e196b8d87c5ebb2791e163855242bfabf19" offset="0" />
	1957	</dataarea>
	1958	</part>
	1959	<part name="flop2" interface="floppy_5_25">
	1960	<feature name="part_id" value="Side 2"/>
	1961	<dataarea name="flop" size="105091">
	1962	<rom name="300 lord of the rings side 2.fsd" size="105091" crc="b986982f" sha1="11ae12b8d274ac76b351b9e7b4e8cd192ad1b51d" offset="0" />
	1963	</dataarea>
	1964	</part>
	1965	</software>
	1966
	1967	<software name="offcmate">
	1968	<description>Office Mate</description>
	1969	<year>1986</year>
	1970	<publisher>Watford Electronics</publisher>
	1971	<part name="flop1" interface="floppy_5_25">
	1972	<dataarea name="flop" size="104941">
	1973	<rom name="301 office mate.fsd" size="104941" crc="7944a905" sha1="0cf2b74e31ebebca042e5a5d823f9f7fa3e6c39a" offset="0" />
	1974	</dataarea>
	1975	</part>
	1976	</software>
	1977
	1978	<software name="offcmast">
	1979	<description>Office Master</description>
	1980	<year>1986</year>
	1981	<publisher>Gemini</publisher>
	1982	<part name="flop1" interface="floppy_5_25">
	1983	<dataarea name="flop" size="104943">
	1984	<rom name="302 office master.fsd" size="104943" crc="ee2343b2" sha1="65844467183ed02b6253954ba9e498a1fc645e22" offset="0" />
	1985	</dataarea>
	1986	</part>
	1987	</software>
	1988
	1989	<software name="hobbit">
	1990	<description>The Hobbit</description>
	1991	<year>1983</year>
	1992	<publisher>Melbourne House</publisher>
	1993	<part name="flop1" interface="floppy_5_25">
	1994	<feature name="part_id" value="Side 1"/>
	1995	<dataarea name="flop" size="105084">
	1996	<rom name="304 the hobbit side 1.fsd" size="105084" crc="291aea5c" sha1="28b78d006b36dc3d4338729d6d92cb0454f9f285" offset="0" />
	1997	</dataarea>
	1998	</part>
	1999	<part name="flop2" interface="floppy_5_25">
	2000	<feature name="part_id" value="Side 2"/>
	2001	<dataarea name="flop" size="105084">
	2002	<rom name="304 the hobbit side 2.fsd" size="105084" crc="2629eaff" sha1="ab033a5c6d74d7c86b0e4d03be4a2fd76814cfe2" offset="0" />
	2003	</dataarea>
	2004	</part>
	2005	<part name="flop3" interface="floppy_5_25">
	2006	<feature name="part_id" value="Picture Disk 1"/>
	2007	<dataarea name="flop" size="104955">
	2008	<rom name="304 the hobbit picture disk 1.fsd" size="104955" crc="c6b638f4" sha1="a0e0683312eaa726b1bfec3e859a7c87bcaff175" offset="0" />
	2009	</dataarea>
	2010	</part>
	2011	<part name="flop4" interface="floppy_5_25">
	2012	<feature name="part_id" value="Picture Disk 2"/>
	2013	<dataarea name="flop" size="104955">
	2014	<rom name="304 the hobbit picture disk 2.fsd" size="104955" crc="b7a26a82" sha1="f8bc3078627fca6bf6760c86f1078686d8388061" offset="0" />
	2015	</dataarea>
	2016	</part>
	2017	<part name="flop5" interface="floppy_5_25">
	2018	<feature name="part_id" value="Save Game Disk"/>
	2019	<dataarea name="flop" size="104955">
	2020	<rom name="304 the hobbit save game disk.fsd" size="104955" crc="1f5b81aa" sha1="11f80d16b0d20258138791cd2a3649c4424f92c4" offset="0" />
	2021	</dataarea>
	2022	</part>
	2023	</software>
	2024
	2025	<software name="mrtmeasr">
	2026	<description>Mr T's Measuring Games</description>
	2027	<year>1983</year>
	2028	<publisher>Good Housekeeping Software</publisher>
	2029	<part name="flop1" interface="floppy_5_25">
	2030	<dataarea name="flop" size="49641">
	2031	<rom name="316 mr t's measuring games.fsd" size="49641" crc="b6c64f34" sha1="edc9bff92859328c2e3271a8269ad048dd500fa0" offset="0" />
	2032	</dataarea>
	2033	</part>
	2034	</software>
	2035
	2036	<software name="clone">
	2037	<description>Clone</description>
	2038	<year>1983</year>
	2039	<publisher>&lt;unknown&gt;</publisher>
	2040	<part name="flop1" interface="floppy_5_25">
	2041	<dataarea name="flop" size="34162">
	2042	<rom name="334 clone.fsd" size="34162" crc="5389bd26" sha1="9ac88e04d8c39699e7ed53a1ee27baf91ba99c10" offset="0" />
	2043	</dataarea>
	2044	</part>
	2045	</software>
	2046
	2047	<software name="enthar7">
	2048	<description>Enthar Seven</description>
	2049	<year>1985</year>
	2050	<publisher>Robico</publisher>
	2051	<part name="flop1" interface="floppy_5_25">
	2052	<feature name="part_id" value="Program Disc"/>
	2053	<dataarea name="flop" size="105092">
	2054	<rom name="335 enthar seven program disc.fsd" size="105092" crc="d5312823" sha1="2c87de7cd8d5a47bc892b544f1486a9b60003cc9" offset="0" />
	2055	</dataarea>
	2056	</part>
	2057	<part name="flop2" interface="floppy_5_25">
	2058	<feature name="part_id" value="Database Disc"/>
	2059	<dataarea name="flop" size="105093">
	2060	<rom name="335 enthar seven database disc.fsd" size="105093" crc="e49c3c99" sha1="82ec0bd187eb38bb96940173740b8f35a20d98f5" offset="0" />
	2061	</dataarea>
	2062	</part>
	2063	</software>
	2064
	2065	<software name="story">
	2066	<description>Story</description>
	2067	<year>1983</year>
	2068	<publisher>H &amp; H Software</publisher>
	2069	<part name="flop1" interface="floppy_5_25">
	2070	<dataarea name="flop" size="105191">
	2071	<rom name="342 story.fsd" size="105191" crc="3cfde5fc" sha1="99e1bdaacf6615d10279b87c279213188434a57a" offset="0" />
	2072	</dataarea>
	2073	</part>
	2074	</software>
	2075
	2076	<software name="crosswds">
	2077	<description>Crosswords</description>
	2078	<year>1986</year>
	2079	<publisher>H.S.Software</publisher>
	2080	<part name="flop1" interface="floppy_5_25">
	2081	<dataarea name="flop" size="100224">
	2082	<rom name="344 crosswords.fsd" size="100224" crc="703fe0a0" sha1="fabc8e0d7481e8f16efdefa13a7b38b080515f01" offset="0" />
	2083	</dataarea>
	2084	</part>
	2085	</software>
	2086
	2087	<software name="readrigh">
	2088	<description>Read-Right-Away</description>
	2089	<year>1986</year>
	2090	<publisher>H.S.Software</publisher>
	2091	<part name="flop1" interface="floppy_5_25">
	2092	<dataarea name="flop" size="58293">
	2093	<rom name="346 read-right-away.fsd" size="58293" crc="3801fa45" sha1="96f0009bd0c7ef6906a075ef2aba206b9ef7a1a4" offset="0" />
	2094	</dataarea>
	2095	</part>
	2096	</software>
	2097
	2098	<software name="goldcoll">
	2099	<description>The Gold Collection</description>
	2100	<year>1987</year>
	2101	<publisher>U.S. Gold</publisher>
	2102	<part name="flop1" interface="floppy_5_25">
	2103	<feature name="part_id" value="Side 0"/>
	2104	<dataarea name="flop" size="105086">
	2105	<rom name="351 the gold collection side 0.fsd" size="105086" crc="394f6d76" sha1="462bb55bcf122f9d5d998eacf3f927c7d64bd802" offset="0" />
	2106	</dataarea>
	2107	</part>
	2108	<part name="flop2" interface="floppy_5_25">
	2109	<feature name="part_id" value="Side 1"/>
	2110	<dataarea name="flop" size="105086">
	2111	<rom name="351 the gold collection side 1.fsd" size="105086" crc="aebd2b3d" sha1="77b604df862fd7ed18480ab09bb73f63f81adead" offset="0" />
	2112	</dataarea>
	2113	</part>
	2114	</software>
	2115
	2116	<software name="bismarck">
	2117	<description>Bismarck Death of a Battleship</description>
	2118	<year>1987</year>
	2119	<publisher>BBC Soft</publisher>
	2120	<part name="flop1" interface="floppy_5_25">
	2121	<dataarea name="flop" size="104960">
	2122	<rom name="352 bismarck death of a battleship.fsd" size="104960" crc="171efe2c" sha1="779c4405331e85da57c86463ef9c89e10fecc98c" offset="0" />
	2123	</dataarea>
	2124	</part>
	2125	</software>
	2126
	2127	<software name="stdsnook">
	2128	<description>Steve Davis Snooker</description>
	2129	<year>1986</year>
	2130	<publisher>CDS</publisher>
	2131	<part name="flop1" interface="floppy_5_25">
	2132	<dataarea name="flop" size="104949">
	2133	<rom name="359 steve davis snooker.fsd" size="104949" crc="fe76aa4b" sha1="d8ac57145d3fd2ddaf93746bab7fbac38e0b6354" offset="0" />
	2134	</dataarea>
	2135	</part>
	2136	</software>
	2137
	2138	<software name="bbcomp2">
	2139	<description>The Bug-Byte Compilation II</description>
	2140	<year>1987</year>
	2141	<publisher>Bug Byte</publisher>
	2142	<part name="flop1" interface="floppy_5_25">
	2143	<dataarea name="flop" size="104957">
	2144	<rom name="360 the bug-byte compilation ii.fsd" size="104957" crc="f15d6567" sha1="2789823d36f9001996a9d1c463b4789333137a89" offset="0" />
	2145	</dataarea>
	2146	</part>
	2147	</software>
	2148
	2149	<software name="replica2">
	2150	<description>Replica II</description>
	2151	<year>1983</year>
	2152	<publisher>Clares</publisher>
	2153	<part name="flop1" interface="floppy_5_25">
	2154	<dataarea name="flop" size="104940">
	2155	<rom name="323 replica ii.fsd" size="104940" crc="2127ca86" sha1="653efe9ebe4d4f0c6c4d13cadab9dd91701edf8b" offset="0" />
	2156	</dataarea>
	2157	</part>
	2158	</software>
	2159
	2160	<software name="replica3">
	2161	<description>Replica III</description>
	2162	<year>1985</year>
	2163	<publisher>Clares</publisher>
	2164	<part name="flop1" interface="floppy_5_25">
	2165	<dataarea name="flop" size="53033">
	2166	<rom name="324 replica iii.fsd" size="53033" crc="7ffdc729" sha1="a0062dd8035f644c8bf292fc4e05ae1ffeecafba" offset="0" />
	2167	</dataarea>
	2168	</part>
	2169	</software>
	2170
	2171	<software name="thekey">
	2172	<description>The Key</description>
	2173	<year>1983</year>
	2174	<publisher>Clares</publisher>
	2175	<part name="flop1" interface="floppy_5_25">
	2176	<dataarea name="flop" size="18444">
	2177	<rom name="325 the key.fsd" size="18444" crc="0494a7bc" sha1="4b42068026abd56496ea6e85931cc27cc772a795" offset="0" />
	2178	</dataarea>
	2179	</part>
	2180	</software>
	2181
	2182	<software name="funhous">
	2183	<description>Fun House</description>
	2184	<year>1984</year>
	2185	<publisher>Clares</publisher>
	2186	<part name="flop1" interface="floppy_5_25">
	2187	<dataarea name="flop" size="41627">
	2188	<rom name="326 fun house.fsd" size="41627" crc="12eedc8d" sha1="65509df6eb06707e1afbd2066e9d2b0daba47deb" offset="0" />
	2189	</dataarea>
	2190	</part>
	2191	</software>
	2192
	2193	<software name="grafdisk">
	2194	<description>Grafdisk</description>
	2195	<year>1983</year>
	2196	<publisher>Clares</publisher>
	2197	<part name="flop1" interface="floppy_5_25">
	2198	<dataarea name="flop" size="104938">
	2199	<rom name="327 grafdisk.fsd" size="104938" crc="5037d4c4" sha1="82e229f2666e749240c2b438a1cb81bf40ff7563" offset="0" />
	2200	</dataarea>
	2201	</part>
	2202	</software>
	2203
	2204	<software name="fwplus">
	2205	<description>Fontwise Plus</description>
	2206	<year>198?</year>
	2207	<publisher>Clares</publisher>
	2208	<part name="flop1" interface="floppy_5_25">
	2209	<dataarea name="flop" size="105455">
	2210	<rom name="328 fontwise plus.fsd" size="105455" crc="661e024d" sha1="2b3451d5938963a930175977750c3593884b370e" offset="0" />
	2211	</dataarea>
	2212	</part>
	2213	</software>
	2214
	2215	<software name="fwfonted">
	2216	<description>Fontwise Font Editor</description>
	2217	<year>198?</year>
	2218	<publisher>Clares</publisher>
	2219	<part name="flop1" interface="floppy_5_25">
	2220	<dataarea name="flop" size="105277">
	2221	<rom name="329 font editor.fsd" size="105277" crc="a5d91d15" sha1="2c422b94fdf41cff99c0356974d49adfe52828a1" offset="0" />
	2222	</dataarea>
	2223	</part>
	2224	</software>
	2225
	2226	<software name="profile">
	2227	<description>Profile</description>
	2228	<year>1985</year>
	2229	<publisher>Clares</publisher>
	2230	<part name="flop1" interface="floppy_5_25">
	2231	<dataarea name="flop" size="105449">
	2232	<rom name="330 profile.fsd" size="105449" crc="993e5239" sha1="e5b403c5a421e0a83b51763e8c9cc493fe901f29" offset="0" />
	2233	</dataarea>
	2234	</part>
	2235	</software>
	2236
	2237	<software name="bbase">
	2238	<description>Beta-Base</description>
	2239	<year>1983</year>
	2240	<publisher>Clares</publisher>
	2241	<part name="flop1" interface="floppy_5_25">
	2242	<dataarea name="flop" size="105451">
	2243	<rom name="331 beta base.fsd" size="105451" crc="c4846f7a" sha1="109496d5ba557db716de1e150b6a894e70539af1" offset="0" />
	2244	</dataarea>
	2245	</part>
	2246	</software>
	2247
	2248	<software name="bbaseutl">
	2249	<description>Beta-Base Utilities 1</description>
	2250	<year>198?</year>
	2251	<publisher>Clares</publisher>
	2252	<part name="flop1" interface="floppy_5_25">
	2253	<dataarea name="flop" size="105463">
	2254	<rom name="332 beta base utilities 1.fsd" size="105463" crc="437852e2" sha1="7dfd059bc601d869bb91ac7b3e412bced4d2b62e" offset="0" />
	2255	</dataarea>
	2256	</part>
	2257	</software>
	2258
	2259	<software name="klax">
	2260	<description>Klax</description>
	2261	<year>1990</year>
	2262	<publisher>Domark</publisher>
	2263	<part name="flop1" interface="floppy_5_25">
	2264	<dataarea name="flop" size="104934">
	2265	<rom name="353 klax.fsd" size="104934" crc="5ebf42dc" sha1="561eee716bdbb1d959d94f49dc818f541081044a" offset="0" />
	2266	</dataarea>
	2267	</part>
	2268	</software>
	2269
	2270	<software name="starwars">
	2271	<description>Star Wars</description>
	2272	<year>1987</year>
	2273	<publisher>Domark</publisher>
	2274	<part name="flop1" interface="floppy_5_25">
	2275	<dataarea name="flop" size="105197">
	2276	<rom name="354 star wars.fsd" size="105197" crc="90d585a7" sha1="c70e00a1565720319baf011662e2715c2ea6f7ac" offset="0" />
	2277	</dataarea>
	2278	</part>
	2279	</software>
	2280
	2281	<software name="esb">
	2282	<description>The Empire Strikes Back</description>
	2283	<year>1988</year>
	2284	<publisher>Domark</publisher>
	2285	<part name="flop1" interface="floppy_5_25">
	2286	<dataarea name="flop" size="102595">
	2287	<rom name="355 the empire strikes back.fsd" size="102595" crc="a633c113" sha1="919914ef1515093be5db820ea93a8e8de407d65b" offset="0" />
	2288	</dataarea>
	2289	</part>
	2290	</software>
	2291
	2292	<software name="jedi">
	2293	<description>Return of the Jedi</description>
	2294	<year>1988</year>
	2295	<publisher>Domark</publisher>
	2296	<part name="flop1" interface="floppy_5_25">
	2297	<dataarea name="flop" size="104948">
	2298	<rom name="356 return of the jedi.fsd" size="104948" crc="71a32e01" sha1="a8a096ca6ba6f1dc96bafc20d56b8547e4ff7e23" offset="0" />
	2299	</dataarea>
	2300	</part>
	2301	</software>
	2302
	2303	<software name="lickill">
	2304	<description>License to Kill</description>
	2305	<year>1989</year>
	2306	<publisher>Domark</publisher>
	2307	<part name="flop1" interface="floppy_5_25">
	2308	<dataarea name="flop" size="104945">
	2309	<rom name="357 licence to kill.fsd" size="104945" crc="2acfd2e6" sha1="a6a961b3c688ed70a1368081c7e5494b571d9c5b" offset="0" />
	2310	</dataarea>
	2311	</part>
	2312	</software>
	2313
	2314	<software name="livdayl">
	2315	<description>The Living Daylights</description>
	2316	<year>1983</year>
	2317	<publisher>Domark</publisher>
	2318	<part name="flop1" interface="floppy_5_25">
	2319	<dataarea name="flop" size="106031">
	2320	<rom name="358 the living daylights.fsd" size="106031" crc="03288645" sha1="b4be4e23f0ca89092385cc9337a3cbb39ba329e3" offset="0" />
	2321	</dataarea>
	2322	</part>
	2323	</software>
	2324
	2325	<software name="holedout">
	2326	<description>Holed Out</description>
	2327	<year>1989</year>
	2328	<publisher>4th Dimension</publisher>
	2329	<part name="flop1" interface="floppy_5_25">
	2330	<dataarea name="flop" size="104939">
	2331	<rom name="-121 holed out.fsd" size="104939" crc="5bd94592" sha1="2ec2c244fe8f2a3a6d6552c7b40d2edadf9d8538" offset="0" />
	2332	</dataarea>
	2333	</part>
	2334	</software>
	2335
	2336	<software name="whimagi2">
	2337	<description>White Magic 2</description>
	2338	<year>1989</year>
	2339	<publisher>4th Dimension</publisher>
	2340	<part name="flop1" interface="floppy_5_25">
	2341	<dataarea name="flop" size="104943">
	2342	<rom name="097 white magic 2.fsd" size="104943" crc="a51d8e1a" sha1="8a114a55de1f3feea15dbad0a6c4db8c753c953e" offset="0" />
	2343	</dataarea>
	2344	</part>
	2345	</software>
	2346
	2347	<software name="nevryon">
	2348	<description>Nevyron</description>
	2349	<year>1991</year>
	2350	<publisher>4th Dimension</publisher>
	2351	<part name="flop1" interface="floppy_5_25">
	2352	<dataarea name="flop" size="104937">
	2353	<rom name="120 nevryon.fsd" size="104937" crc="a699d6e8" sha1="dade4d81c4bdb9bc51065a80958e72b7212891db" offset="0" />
	2354	</dataarea>
	2355	</part>
	2356	</software>
	2357
	2358	<software name="uim">
	2359	<description>U.I.M.</description>
	2360	<year>1989</year>
	2361	<publisher>4th Dimension</publisher>
	2362	<part name="flop1" interface="floppy_5_25">
	2363	<dataarea name="flop" size="105070">
	2364	<rom name="122 uim.fsd" size="105070" crc="7a1272d1" sha1="b81fed0a92de79f7a41e598ed0bdba4f1055dbaa" offset="0" />
	2365	</dataarea>
	2366	</part>
	2367	</software>
	2368
	2369	<software name="etype">
	2370	<description>E-Type</description>
	2371	<year>1990</year>
	2372	<publisher>4th Dimension</publisher>
	2373	<part name="flop1" interface="floppy_5_25">
	2374	<dataarea name="flop" size="104936">
	2375	<rom name="123 e-type.fsd" size="104936" crc="48a0cf59" sha1="252ce33d06bc16b844563750a8c75d4a18089995" offset="0" />
	2376	</dataarea>
	2377	</part>
	2378	</software>
	2379
	2380	<software name="whimagic">
	2381	<description>White Magic</description>
	2382	<year>1989</year>
	2383	<publisher>4th Dimension</publisher>
	2384	<part name="flop1" interface="floppy_5_25">
	2385	<dataarea name="flop" size="105078">
	2386	<rom name="124 white magic.fsd" size="105078" crc="f4b7103e" sha1="c1d8757f87a8734c64a130b3cde6573c2c5c94af" offset="0" />
	2387	</dataarea>
	2388	</part>
	2389	</software>
	2390
	2391	<software name="arsoccer">
	2392	<description>Arcade Soccer</description>
	2393	<year>1989</year>
	2394	<publisher>4th Dimension</publisher>
	2395	<part name="flop1" interface="floppy_5_25">
	2396	<dataarea name="flop" size="104943">
	2397	<rom name="125 arcade soccer.fsd" size="104943" crc="ca1aa429" sha1="95eb3f63cb2e43cc4a36836490a972a0f2de2fd9" offset="0" />
	2398	</dataarea>
	2399	</part>
	2400	</software>
	2401
	2402	<software name="zenon">
	2403	<description>Zenon</description>
	2404	<year>1989</year>
	2405	<publisher>Impact</publisher>
	2406	<part name="flop1" interface="floppy_5_25">
	2407	<dataarea name="flop" size="104935">
	2408	<rom name="126 zenon.fsd" size="104935" crc="527d6a51" sha1="1913335c3075fe5410a8db6f750023689280feee" offset="0" />
	2409	</dataarea>
	2410	</part>
	2411	</software>
	2412
	2413	<software name="clogger">
	2414	<description>Clogger</description>
	2415	<year>1988</year>
	2416	<publisher>Impact</publisher>
	2417	<part name="flop1" interface="floppy_5_25">
	2418	<dataarea name="flop" size="105074">
	2419	<rom name="127 clogger.fsd" size="105074" crc="37eddb7b" sha1="eabb0ece6f7a29cc42006e2ffb03a4078db2b2f7" offset="0" />
	2420	</dataarea>
	2421	</part>
	2422	</software>
	2423
	2424	<software name="orbital">
	2425	<description>Orbital</description>
	2426	<year>1989</year>
	2427	<publisher>Impact</publisher>
	2428	<part name="flop1" interface="floppy_5_25">
	2429	<dataarea name="flop" size="105074">
	2430	<rom name="128 orbital.fsd" size="105074" crc="c62d6e23" sha1="1aaf7b08df9ac24abc854bee8d628b14e88d53d1" offset="0" />
	2431	</dataarea>
	2432	</part>
	2433	</software>
	2434
	2435	<software name="artstudi">
	2436	<description>The Art Studio</description>
	2437	<year>1989</year>
	2438	<publisher>Impact</publisher>
	2439	<part name="flop1" interface="floppy_5_25">
	2440	<dataarea name="flop" size="104944">
	2441	<rom name="129 the art studio.fsd" size="104944" crc="e4338f0a" sha1="fd5c30303169cbc1ffaf98197644ec17bfe5d7bd" offset="0" />
	2442	</dataarea>
	2443	</part>
	2444	</software>
	2445
	2446	<software name="cheatj1">
	2447	<description>Cheat It Again Joe Vol.1</description>
	2448	<year>1988</year>
	2449	<publisher>Impact</publisher>
	2450	<part name="flop1" interface="floppy_5_25">
	2451	<dataarea name="flop" size="102473">
	2452	<rom name="130 cheat it again, joe volume 1.fsd" size="102473" crc="7a090ddd" sha1="03dc30e97ec3ebcfd7a014a89be2c2cf4f535654" offset="0" />
	2453	</dataarea>
	2454	</part>
	2455	</software>
	2456
	2457	<software name="cheatj2">
	2458	<description>Cheat It Again Joe Vol.2</description>
	2459	<year>1988</year>
	2460	<publisher>Impact</publisher>
	2461	<part name="flop1" interface="floppy_5_25">
	2462	<dataarea name="flop" size="105094">
	2463	<rom name="131 cheat it again, joe volume 2.fsd" size="105094" crc="9305d08f" sha1="a543c79a6143e9777316a41802c1910febae07cf" offset="0" />
	2464	</dataarea>
	2465	</part>
	2466	</software>
	2467
	2468	<software name="cheatj4">
	2469	<description>Cheat It Again Joe Vol.4</description>
	2470	<year>1988</year>
	2471	<publisher>Impact</publisher>
	2472	<part name="flop1" interface="floppy_5_25">
	2473	<dataarea name="flop" size="102336">
	2474	<rom name="132 cheat it again, joe volume 4.fsd" size="102336" crc="70504e56" sha1="ca955b36a1035cf6bbe8b12670383c23bf940a2e" offset="0" />
	2475	</dataarea>
	2476	</part>
	2477	</software>
	2478
	2479	<software name="holedoc1">
	2480	<description>Holed Out Extra Courses Vol.1</description>
	2481	<year>1990</year>
	2482	<publisher>4th Dimension</publisher>
	2483	<part name="flop1" interface="floppy_5_25">
	2484	<dataarea name="flop" size="104959">
	2485	<rom name="298 holed out extra courses vol1.fsd" size="104959" crc="5b41e1e6" sha1="b8a1feca41cd9f445c96bfec4da9b1b9c5d7049e" offset="0" />
	2486	</dataarea>
	2487	</part>
	2488	</software>
	2489
	2490	<software name="holedoc2">
	2491	<description>Holed Out Extra Courses Vol.2</description>
	2492	<year>1990</year>
	2493	<publisher>4th Dimension</publisher>
	2494	<part name="flop1" interface="floppy_5_25">
	2495	<dataarea name="flop" size="104959">
	2496	<rom name="299 holed out extra courses vol2.fsd" size="104959" crc="26ea5dbd" sha1="f497036e19b42b9fa657d5ccadb7c1217c2e2e5f" offset="0" />
	2497	</dataarea>
	2498	</part>
	2499	</software>
	2500
	2501	<software name="reteden">
	2502	<description>Return to Eden</description>
	2503	<year>1984</year>
	2504	<publisher>Level 9 Computing</publisher>
	2505	<part name="flop1" interface="floppy_5_25">
	2506	<dataarea name="flop" size="35171">
	2507	<rom name="014 return to eden.fsd" size="35171" crc="3fe8c91d" sha1="18277447d0447b0ad5c8bbe8d7389ebe044933e8" offset="0" />
	2508	</dataarea>
	2509	</part>
	2510	</software>
	2511
	2512	<software name="colossal">
	2513	<description>Colossal Adventure</description>
	2514	<year>1983</year>
	2515	<publisher>Level 9 Computing</publisher>
	2516	<part name="flop1" interface="floppy_5_25">
	2517	<dataarea name="flop" size="35175">
	2518	<rom name="051 colossal adventure.fsd" size="35175" crc="0dcf036c" sha1="7344c685c8a06f557814190fc0fde7b54d703b5b" offset="0" />
	2519	</dataarea>
	2520	</part>
	2521	</software>
	2522
	2523	<software name="snowball">
	2524	<description>Snowball</description>
	2525	<year>1983</year>
	2526	<publisher>Level 9 Computing</publisher>
	2527	<part name="flop1" interface="floppy_5_25">
	2528	<dataarea name="flop" size="35165">
	2529	<rom name="063 snowball.fsd" size="35165" crc="5ef47761" sha1="2c2c2d2bfa4d158c2fe11c72378005d0b1af5ad8" offset="0" />
	2530	</dataarea>
	2531	</part>
	2532	</software>
	2533
	2534	<software name="lordstme">
	2535	<description>Lords of Time</description>
	2536	<year>1983</year>
	2537	<publisher>Level 9 Computing</publisher>
	2538	<part name="flop1" interface="floppy_5_25">
	2539	<dataarea name="flop" size="35170">
	2540	<rom name="085 lords of time.fsd" size="35170" crc="b3cbfeac" sha1="eb0e7b24b566b6cfb28af36a4a726e24e6936ee6" offset="0" />
	2541	</dataarea>
	2542	</part>
	2543	</software>
	2544
	2545	<software name="advquest">
	2546	<description>Adventure Quest</description>
	2547	<year>1983</year>
	2548	<publisher>Level 9 Computing</publisher>
	2549	<part name="flop1" interface="floppy_5_25">
	2550	<dataarea name="flop" size="35172">
	2551	<rom name="333 adventure quest.fsd" size="35172" crc="1d6057ce" sha1="7a5349928958c53b4ad883aac1e0e1d9084b31ab" offset="0" />
	2552	</dataarea>
	2553	</part>
	2554	</software>
	2555
	2556	<software name="timemagk">
	2557	<description>Time and Magik - The Trilogy</description>
	2558	<year>1988</year>
	2559	<publisher>Mandarin</publisher>
	2560	<part name="flop1" interface="floppy_5_25">
	2561	<feature name="part_id" value="Game"/>
	2562	<dataarea name="flop" size="209864">
	2563	<rom name="345 time and magik game side.fsd" size="209864" crc="03dd16fe" sha1="09c2bbaaf1a98292093933c139e3946b41faeddb" offset="0" />
	2564	</dataarea>
	2565	</part>
	2566	<part name="flop2" interface="floppy_5_25">
	2567	<feature name="part_id" value="Pictures"/>
	2568	<dataarea name="flop" size="209849">
	2569	<rom name="345 time and magik pictures side.fsd" size="209849" crc="c8f7b4d5" sha1="4662ba6a2dd6445b293465165630bdfce6d9b4c1" offset="0" />
	2570	</dataarea>
	2571	</part>
	2572	</software>
	2573
	2574	<software name="lancelot">
	2575	<description>Lancelot</description>
	2576	<year>1988</year>
	2577	<publisher>Mandarin</publisher>
	2578	<part name="flop1" interface="floppy_5_25">
	2579	<feature name="part_id" value="Game"/>
	2580	<dataarea name="flop" size="209868">
	2581	<rom name="350 lancelot game side.fsd" size="209868" crc="c4189869" sha1="5d65d025aded494d6030cf281d2bffe31049739d" offset="0" />
	2582	</dataarea>
	2583	</part>
	2584	<part name="flop2" interface="floppy_5_25">
	2585	<feature name="part_id" value="Pictures"/>
	2586	<dataarea name="flop" size="209872">
	2587	<rom name="350 lancelot pictures side.fsd" size="209872" crc="1a29bbe1" sha1="fb60bc459afc8b66b84a40a409076adad3b0b4f3" offset="0" />
	2588	</dataarea>
	2589	</part>
	2590	</software>
	2591
	2592	<software name="imogen">
	2593	<description>Imogen</description>
	2594	<year>1986</year>
	2595	<publisher>Micro Power</publisher>
	2596	<part name="flop1" interface="floppy_5_25">
	2597	<dataarea name="flop" size="94532">
	2598	<rom name="062 imogen.fsd" size="94532" crc="086b1ab5" sha1="fcf66c457b50a282517c037f0836bdecd8085dcc" offset="0" />
	2599	</dataarea>
	2600	</part>
	2601	</software>
	2602
	2603	<software name="castleq">
	2604	<description>Castle Quest</description>
	2605	<year>1985</year>
	2606	<publisher>Micro Power</publisher>
	2607	<part name="flop1" interface="floppy_5_25">
	2608	<dataarea name="flop" size="65627">
	2609	<rom name="072 castle quest.fsd" size="65627" crc="83552111" sha1="13458425fff08bd90686d048102a4d0befc66477" offset="0" />
	2610	</dataarea>
	2611	</part>
	2612	</software>
	2613
	2614	<software name="stockcar">
	2615	<description>Stock Car</description>
	2616	<year>1983</year>
	2617	<publisher>Micro Power</publisher>
	2618	<part name="flop1" interface="floppy_5_25">
	2619	<dataarea name="flop" size="82193">
	2620	<rom name="086 stock car.fsd" size="82193" crc="45c927de" sha1="617c17abce10221837b1c6483e3d96d4925b8b0b" offset="0" />
	2621	</dataarea>
	2622	</part>
	2623	</software>
	2624
	2625	<software name="cybermis">
	2626	<description>Cybertron Mission</description>
	2627	<year>1984</year>
	2628	<publisher>Micro Power</publisher>
	2629	<part name="flop1" interface="floppy_5_25">
	2630	<dataarea name="flop" size="87383">
	2631	<rom name="087 cybertron mission.fsd" size="87383" crc="24d1af1e" sha1="a8e0f30ded1a13a899558d6cb7e92fd41731902b" offset="0" />
	2632	</dataarea>
	2633	</part>
	2634	</software>
	2635
	2636	<software name="duneridr">
	2637	<description>Dune Rider</description>
	2638	<year>1984</year>
	2639	<publisher>Micro Power</publisher>
	2640	<part name="flop1" interface="floppy_5_25">
	2641	<dataarea name="flop" size="102922">
	2642	<rom name="088 dune rider.fsd" size="102922" crc="83414390" sha1="6256e43c97f8e2746baa543c4ec4b9535035e85f" offset="0" />
	2643	</dataarea>
	2644	</part>
	2645	</software>
	2646
	2647	<software name="intergal">
	2648	<description>Intergalactic Trader</description>
	2649	<year>1983</year>
	2650	<publisher>Micro Power</publisher>
	2651	<part name="flop1" interface="floppy_5_25">
	2652	<dataarea name="flop" size="104950">
	2653	<rom name="089 intergalactic trader.fsd" size="104950" crc="0fe3f66a" sha1="e0cbd9ec0a41a59b13c7e3f9f2684de3095b52c3" offset="0" />
	2654	</dataarea>
	2655	</part>
	2656	</software>
	2657
	2658	<software name="starflen">
	2659	<description>Starfleet Encounter</description>
	2660	<year>1984</year>
	2661	<publisher>Micro Power</publisher>
	2662	<part name="flop1" interface="floppy_5_25">
	2663	<dataarea name="flop" size="102931">
	2664	<rom name="090 starfleet encounter.fsd" size="102931" crc="85c85b37" sha1="ee81acfaffd937f1d5fea2b19f45844ae43a8881" offset="0" />
	2665	</dataarea>
	2666	</part>
	2667	</software>
	2668
	2669	<software name="drwhomin">
	2670	<description>Doctor Who and the Mines of Terror (Master/B+)</description>
	2671	<year>1986</year>
	2672	<publisher>Micro Power</publisher>
	2673	<part name="flop1" interface="floppy_5_25">
	2674	<dataarea name="flop" size="86617">
	2675	<rom name="133 doctor who and the mines of terror.fsd" size="86617" crc="c5eade21" sha1="b3bdd76eae53561f8ee4977d2a0088f223f5464b" offset="0" />
	2676	</dataarea>
	2677	</part>
	2678	</software>
	2679
	2680	<software name="drwhominb" cloneof="drwhomin">
	2681	<description>Doctor Who and the Mines of Terror (with ROM)</description>
	2682	<year>1985</year>
	2683	<publisher>Micro Power</publisher>
	2684	<part name="flop1" interface="floppy_5_25">
	2685	<dataarea name="flop" size="54004">
	2686	<rom name="303 doctor who and the mines of terror.fsd" size="54004" crc="dc4254fb" sha1="20f65441000054a4b878f033cda49ec6d376a2bd" offset="0" />
	2687	</dataarea>
	2688	</part>
	2689	<part name="cart1" interface="bbc_cart">
	2690	<dataarea name="rom" size="16384">
	2691	<rom name="DoctorWhoAndTheMinesOfTerror.rom" size="16384" crc="9ce48a7e" sha1="9287aa2c0ef535d008f7d0e7e34a96400098816a" offset="0" />
	2692	</dataarea>
	2693	</part>
	2694	</software>
	2695
	2696	<software name="blockbus">
	2697	<description>Blockbuster</description>
	2698	<year>1984</year>
	2699	<publisher>Micro Power</publisher>
	2700	<part name="flop1" interface="floppy_5_25">
	2701	<dataarea name="flop" size="79605">
	2702	<rom name="193 block buster.fsd" size="79605" crc="6ab8275c" sha1="6af1dcac1cb4d61e83ac11e29230a9ecd8209f04" offset="0" />
	2703	</dataarea>
	2704	</part>
	2705	</software>
	2706
	2707	<software name="mree">
	2708	<description>Mr Ee!</description>
	2709	<year>1984</year>
	2710	<publisher>Micro Power</publisher>
	2711	<part name="flop1" interface="floppy_5_25">
	2712	<dataarea name="flop" size="102917">
	2713	<rom name="194 mr ee.fsd" size="102917" crc="366d3852" sha1="7cd6deb7ceaebf088986e5dd60341d112079c4a8" offset="0" />
	2714	</dataarea>
	2715	</part>
	2716	</software>
	2717
	2718	<software name="frenzy">
	2719	<description>Frenzy</description>
	2720	<year>1983</year>
	2721	<publisher>Micro Power</publisher>
	2722	<part name="flop1" interface="floppy_5_25">
	2723	<dataarea name="flop" size="77008">
	2724	<rom name="195 frenzy.fsd" size="77008" crc="ccc3499e" sha1="eb3759b0c1b1c9a61adf9a84d3d32894afc73331" offset="0" />
	2725	</dataarea>
	2726	</part>
	2727	</software>
	2728
	2729	<software name="killergo">
	2730	<description>Killer Gorilla</description>
	2731	<year>1984</year>
	2732	<publisher>Micro Power</publisher>
	2733	<part name="flop1" interface="floppy_5_25">
	2734	<dataarea name="flop" size="82198">
	2735	<rom name="196 killer gorilla.fsd" size="82198" crc="7788ebfd" sha1="988898b520b46a0fb0ca5ad342284493261f90ef" offset="0" />
	2736	</dataarea>
	2737	</part>
	2738	</software>
	2739
	2740	<software name="ghouls">
	2741	<description>Ghouls</description>
	2742	<year>1984</year>
	2743	<publisher>Micro Power</publisher>
	2744	<part name="flop1" interface="floppy_5_25">
	2745	<dataarea name="flop" size="92554">
	2746	<rom name="197 ghouls.fsd" size="92554" crc="bfe5cffa" sha1="36e6bf5052a4b894e449446146ca1a1676babfd5" offset="0" />
	2747	</dataarea>
	2748	</part>
	2749	</software>
	2750
	2751	<software name="themine">
	2752	<description>The Mine</description>
	2753	<year>1984</year>
	2754	<publisher>Micro Power</publisher>
	2755	<part name="flop1" interface="floppy_5_25">
	2756	<dataarea name="flop" size="82192">
	2757	<rom name="198 the mine.fsd" size="82192" crc="ddf67dd6" sha1="3aa22c441642e05558a42dc3ce93f722df261d27" offset="0" />
	2758	</dataarea>
	2759	</part>
	2760	</software>
	2761
	2762	<software name="felixfac">
	2763	<description>Felix in the Factory</description>
	2764	<year>1982</year>
	2765	<publisher>Micro Power</publisher>
	2766	<part name="flop1" interface="floppy_5_25">
	2767	<dataarea name="flop" size="82204">
	2768	<rom name="199 felix in the factory.fsd" size="82204" crc="693a92fd" sha1="0a7ac7c5086685b0f8bc705a2ff558ce44a01570" offset="0" />
	2769	</dataarea>
	2770	</part>
	2771	</software>
	2772
	2773	<software name="felixwee">
	2774	<description>Felix Meets the Evil Weevils</description>
	2775	<year>1984</year>
	2776	<publisher>Micro Power</publisher>
	2777	<part name="flop1" interface="floppy_5_25">
	2778	<dataarea name="flop" size="100347">
	2779	<rom name="255 felix meets the evil weevils.fsd" size="100347" crc="71182cc8" sha1="798b4d58b98207e1f5491b76926b4a7198bc3578" offset="0" />
	2780	</dataarea>
	2781	</part>
	2782	</software>
	2783
	2784	<software name="rubbletr">
	2785	<description>Rubble Trouble</description>
	2786	<year>1983</year>
	2787	<publisher>Micro Power</publisher>
	2788	<part name="flop1" interface="floppy_5_25">
	2789	<dataarea name="flop" size="89971">
	2790	<rom name="264 rubbletrouble.fsd" size="89971" crc="cd1cf430" sha1="3ae07e2aa6d38c682cd1810b6c076a200bcba441" offset="0" />
	2791	</dataarea>
	2792	</part>
	2793	</software>
	2794
	2795	<software name="mpmagic">
	2796	<description>Micro Power Magic</description>
	2797	<year>1986</year>
	2798	<publisher>Micro Power</publisher>
	2799	<part name="flop1" interface="floppy_5_25">
	2800	<feature name="part_id" value="Side One"/>
	2801	<dataarea name="flop" size="86602">
	2802	<rom name="305 micro power magic i side one.fsd" size="86602" crc="5808f35e" sha1="8d290c1179560e0cca601fff17ea876050706158" offset="0" />
	2803	</dataarea>
	2804	</part>
	2805	<part name="flop2" interface="floppy_5_25">
	2806	<feature name="part_id" value="Side Two"/>
	2807	<dataarea name="flop" size="86602">
	2808	<rom name="305 micro power magic i side two.fsd" size="86602" crc="59188f60" sha1="faf9b366e650c808b3438bcc2e1c77a11ac1d529" offset="0" />
	2809	</dataarea>
	2810	</part>
	2811	</software>
	2812
	2813	<software name="mpmagic2">
	2814	<description>Micro Power Magic II</description>
	2815	<year>1986</year>
	2816	<publisher>Micro Power</publisher>
	2817	<part name="flop1" interface="floppy_5_25">
	2818	<feature name="part_id" value="Side One"/>
	2819	<dataarea name="flop" size="94466">
	2820	<rom name="306 micro power magic ii side one.fsd" size="94466" crc="02bfc44e" sha1="d323933d217c4b206f2cf7eefbd57b3b046b54bf" offset="0" />
	2821	</dataarea>
	2822	</part>
	2823	<part name="flop2" interface="floppy_5_25">
	2824	<feature name="part_id" value="Side Two"/>
	2825	<dataarea name="flop" size="70877">
	2826	<rom name="306 micro power magic ii side two.fsd" size="70877" crc="2638f310" sha1="d9af8ba63ca03ff74f8fa3b2ab75b34fdc774b9d" offset="0" />
	2827	</dataarea>
	2828	</part>
	2829	</software>
	2830
	2831	<software name="mpmagic3">
	2832	<description>Micro Power Magic III</description>
	2833	<year>1986</year>
	2834	<publisher>Micro Power</publisher>
	2835	<part name="flop1" interface="floppy_5_25">
	2836	<feature name="part_id" value="Side One"/>
	2837	<dataarea name="flop" size="104951">
	2838	<rom name="307 micro power magic iii side one.fsd" size="104951" crc="b50c606d" sha1="fd5995c4bdbea382563eaa4216e14494d4d781b9" offset="0" />
	2839	</dataarea>
	2840	</part>
	2841	<part name="flop2" interface="floppy_5_25">
	2842	<feature name="part_id" value="Side Two"/>
	2843	<dataarea name="flop" size="104951">
	2844	<rom name="307 micro power magic iii side two.fsd" size="104951" crc="b7404184" sha1="db1afd4c596654de069ad0e568a6a7d9f846c123" offset="0" />
	2845	</dataarea>
	2846	</part>
	2847	</software>
	2848
	2849	<software name="repton">
	2850	<description>Repton</description>
	2851	<year>1985</year>
	2852	<publisher>Superior Software</publisher>
	2853	<part name="flop1" interface="floppy_5_25">
	2854	<dataarea name="flop" size="104312">
	2855	<rom name="080 repton.fsd" size="104312" crc="425cfb77" sha1="f8bbb2b5264e3c3512302e72149715fdd2f6117e" offset="0" />
	2856	</dataarea>
	2857	</part>
	2858	</software>
	2859
	2860	<software name="citadel">
	2861	<description>Citadel</description>
	2862	<year>1985</year>
	2863	<publisher>Superior Software</publisher>
	2864	<part name="flop1" interface="floppy_5_25">
	2865	<dataarea name="flop" size="104937">
	2866	<rom name="174 citadel.fsd" size="104937" crc="36debf02" sha1="7014e8d9f93fbf394481fccf28a83e6776efcbb1" offset="0" />
	2867	</dataarea>
	2868	</part>
	2869	</software>
	2870
	2871	<software name="karatec">
	2872	<description>Karate Combat</description>
	2873	<year>1986</year>
	2874	<publisher>Superior Software</publisher>
	2875	<part name="flop1" interface="floppy_5_25">
	2876	<dataarea name="flop" size="44660">
	2877	<rom name="175 karate combat.fsd" size="44660" crc="96365316" sha1="bedde7da96eda08f3828d2dbc7873174ca32c5c7" offset="0" />
	2878	</dataarea>
	2879	</part>
	2880	</software>
	2881
	2882	<software name="tempest">
	2883	<description>Tempest</description>
	2884	<year>1985</year>
	2885	<publisher>Superior Software</publisher>
	2886	<part name="flop1" interface="floppy_5_25">
	2887	<dataarea name="flop" size="31549">
	2888	<rom name="176 tempest.fsd" size="31549" crc="671f7206" sha1="1d8ebbe1f3750d3d03ba9505a4a33cc93d365ca4" offset="0" />
	2889	</dataarea>
	2890	</part>
	2891	</software>
	2892
	2893	<software name="deathsta">
	2894	<description>Death Star</description>
	2895	<year>1985</year>
	2896	<publisher>Superior Software</publisher>
	2897	<part name="flop1" interface="floppy_5_25">
	2898	<dataarea name="flop" size="34172">
	2899	<rom name="177 deathstar.fsd" size="34172" crc="4a5c042c" sha1="f1371e67a4c1941ab2db1a8bcb5e5b01f93ab4dc" offset="0" />
	2900	</dataarea>
	2901	</part>
	2902	</software>
	2903
	2904	<software name="repton2">
	2905	<description>Repton 2</description>
	2906	<year>1985</year>
	2907	<publisher>Superior Software</publisher>
	2908	<part name="flop1" interface="floppy_5_25">
	2909	<dataarea name="flop" size="104938">
	2910	<rom name="178 repton 2.fsd" size="104938" crc="f37ac03b" sha1="84d0122678bb87263822d4fb5e3d89b2a067f552" offset="0" />
	2911	</dataarea>
	2912	</part>
	2913	</software>
	2914
	2915	<software name="thrust">
	2916	<description>Thrust</description>
	2917	<year>1986</year>
	2918	<publisher>Superior Software</publisher>
	2919	<part name="flop1" interface="floppy_5_25">
	2920	<dataarea name="flop" size="49895">
	2921	<rom name="179 thrust.fsd" size="49895" crc="52762853" sha1="a3de8ea8f50dfc8ceb2adea54734337874c34ba6" offset="0" />
	2922	</dataarea>
	2923	</part>
	2924	</software>
	2925
	2926	<software name="galaforc">
	2927	<description>Galaforce</description>
	2928	<year>1986</year>
	2929	<publisher>Superior Software</publisher>
	2930	<part name="flop1" interface="floppy_5_25">
	2931	<dataarea name="flop" size="47277">
	2932	<rom name="180 galaforce.fsd" size="47277" crc="885acb2c" sha1="65d96bdd73f8572a8b42bed368e0fc03ce2c9a02" offset="0" />
	2933	</dataarea>
	2934	</part>
	2935	</software>
	2936
	2937	<software name="strykrun">
	2938	<description>Stryker's Run</description>
	2939	<year>1986</year>
	2940	<publisher>Superior Software</publisher>
	2941	<part name="flop1" interface="floppy_5_25">
	2942	<dataarea name="flop" size="104943">
	2943	<rom name="181 stryker's run.fsd" size="104943" crc="92e3c589" sha1="cc943acffa8bfec35ac0eb249ebbeb98b6673314" offset="0" />
	2944	</dataarea>
	2945	</part>
	2946	</software>
	2947
	2948	<software name="repton3">
	2949	<description>Repton 3</description>
	2950	<year>1986</year>
	2951	<publisher>Superior Software</publisher>
	2952	<part name="flop1" interface="floppy_5_25">
	2953	<dataarea name="flop" size="104938">
	2954	<rom name="183 repton 3.fsd" size="104938" crc="98782628" sha1="acd102483cb429b14cdd501bba85f41384b332be" offset="0" />
	2955	</dataarea>
	2956	</part>
	2957	</software>
	2958
	2959	<software name="speech">
	2960	<description>Speech!</description>
	2961	<year>1985</year>
	2962	<publisher>Superior Software</publisher>
	2963	<part name="flop1" interface="floppy_5_25">
	2964	<dataarea name="flop" size="104936">
	2965	<rom name="184 speech.fsd" size="104936" crc="a7fa3db9" sha1="cda4594b29c63fa97f93bf6df64c32bbb1034493" offset="0" />
	2966	</dataarea>
	2967	</part>
	2968	</software>
	2969
	2970	<software name="overdriv">
	2971	<description>Overdrive</description>
	2972	<year>1984</year>
	2973	<publisher>Superior Software</publisher>
	2974	<part name="flop1" interface="floppy_5_25">
	2975	<dataarea name="flop" size="104939">
	2976	<rom name="321 overdrive.fsd" size="104939" crc="724512e0" sha1="1de4283665315ea0e9e736280048c3c07b31595e" offset="0" />
	2977	</dataarea>
	2978	</part>
	2979	</software>
	2980
	2981	<software name="froggys">
	2982	<description>Froggy</description>
	2983	<year>1982</year>
	2984	<publisher>Superior Software</publisher>
	2985	<part name="flop1" interface="floppy_5_25">
	2986	<dataarea name="flop" size="104936">
	2987	<rom name="322 froggy.fsd" size="104936" crc="6105cdaa" sha1="a836c603c8902fc706b16744037f4063a3bc322b" offset="0" />
	2988	</dataarea>
	2989	</part>
	2990	</software>
	2991
	2992	<software name="exilev1" cloneof="exilev3">
	2993	<description>Exile (Version 1)</description>
	2994	<year>1988</year>
	2995	<publisher>Superior Software/Acornsoft</publisher>
	2996	<part name="flop1" interface="floppy_5_25">
	2997	<dataarea name="flop" size="102387">
	2998	<rom name="001 exile.fsd" size="102387" crc="f720c7b2" sha1="e91b32a57a78356df8d3f19632c729378557214f" offset="0" />
	2999	</dataarea>
	3000	</part>
	3001	</software>
	3002
	3003	<software name="exilev2" cloneof="exilev3">
	3004	<description>Exile (Version 2)</description>
	3005	<year>1988</year>
	3006	<publisher>Superior Software/Acornsoft</publisher>
	3007	<part name="flop1" interface="floppy_5_25">
	3008	<dataarea name="flop" size="102387">
	3009	<rom name="188 exile (version 2).fsd" size="102387" crc="e2374b4e" sha1="5dbcc3339e36821d56aad9e234efb628806365fe" offset="0" />
	3010	</dataarea>
	3011	</part>
	3012	</software>
	3013
	3014	<software name="exilev3">
	3015	<description>Exile (Version 3)</description>
	3016	<year>1988</year>
	3017	<publisher>Superior Software/Acornsoft</publisher>
	3018	<part name="flop1" interface="floppy_5_25">
	3019	<dataarea name="flop" size="104935">
	3020	<rom name="189 exile (version 3).fsd" size="104935" crc="7d43daa0" sha1="784a7b912ab844d2406ee9dd55872f1429055863" offset="0" />
	3021	</dataarea>
	3022	</part>
	3023	</software>
	3024
	3025	<software name="exilerc" cloneof="exilev3">
	3026	<description>Exile (Review Copy)</description>
	3027	<year>1988</year>
	3028	<publisher>Superior Software/Acornsoft</publisher>
	3029	<info name="version" value="D100.43 14/10/88" />
	3030	<part name="flop1" interface="floppy_5_25">
	3031	<dataarea name="flop" size="102399">
	3032	<rom name="021 exile review copy.fsd" size="102399" crc="57bdb594" sha1="7d41668c3f9ed52e5e75f01a2e6349a3a7f59111" offset="0" />
	3033	</dataarea>
	3034	</part>
	3035	</software>
	3036
	3037	<software name="ravskull">
	3038	<description>Ravenskull</description>
	3039	<year>1987</year>
	3040	<publisher>Superior Software/Acornsoft</publisher>
	3041	<part name="flop1" interface="floppy_5_25">
	3042	<dataarea name="flop" size="104940">
	3043	<rom name="182 ravenskull.fsd" size="104940" crc="8b9ec17e" sha1="1d80d85ec1001d67047d8c3b352543ec44508bce" offset="0" />
	3044	</dataarea>
	3045	</part>
	3046	</software>
	3047
	3048	<software name="retdoom">
	3049	<description>Return to Doom</description>
	3050	<year>1988</year>
	3051	<publisher>Topologika</publisher>
	3052	<part name="flop1" interface="floppy_5_25">
	3053	<feature name="part_id" value="Game"/>
	3054	<dataarea name="flop" size="35495">
	3055	<rom name="057 return to doom.fsd" size="35495" crc="3e5c81b5" sha1="4e580a652a0df941fd2d434dfd507cff886a6280" offset="0" />
	3056	</dataarea>
	3057	</part>
	3058	<part name="flop2" interface="floppy_5_25">
	3059	<feature name="part_id" value="Database"/>
	3060	<dataarea name="flop" size="104953">
	3061	<rom name="057 return to doom database.fsd" size="104953" crc="51b8a45c" sha1="bf910c6d9c027a48d23d4c638c06104724bcb340" offset="0" />
	3062	</dataarea>
	3063	</part>
	3064	</software>
	3065
	3066	<software name="gkiller">
	3067	<description>Giant Killer</description>
	3068	<year>1987</year>
	3069	<publisher>Topologika</publisher>
	3070	<part name="flop1" interface="floppy_5_25">
	3071	<dataarea name="flop" size="104942">
	3072	<rom name="265 giant killer.fsd" size="104942" crc="a8ea4980" sha1="a0b7fc50d52301df4247fc488e907c8cfa7cc354" offset="0" />
	3073	</dataarea>
	3074	</part>
	3075	</software>
	3076
	3077	<software name="ctodoomt">
	3078	<description>Countdown to Doom (Topologika)</description>
	3079	<year>1987</year>
	3080	<publisher>Topologika</publisher>
	3081	<part name="flop1" interface="floppy_5_25">
	3082	<dataarea name="flop" size="72192">
	3083	<rom name="317 countdown to doom.fsd" size="72192" crc="28bd79f0" sha1="50c4ee07914e508811a08f0deb944d8d2e1c9496" offset="0" />
	3084	</dataarea>
	3085	</part>
	3086	</software>
	3087
	3088	<software name="phquestt">
	3089	<description>Philosopher's Quest (Topologika)</description>
	3090	<year>1987</year>
	3091	<publisher>Topologika</publisher>
	3092	<part name="flop1" interface="floppy_5_25">
	3093	<dataarea name="flop" size="82678">
	3094	<rom name="318 philosopher's quest.fsd" size="82678" crc="3d146faa" sha1="a722ade607790f89457211cf3e7fa2a0edee367e" offset="0" />
	3095	</dataarea>
	3096	</part>
	3097	</software>
	3098
	3099	<software name="ldaydoom">
	3100	<description>Last Days of Doom</description>
	3101	<year>1990</year>
	3102	<publisher>Topologika</publisher>
	3103	<part name="flop1" interface="floppy_5_25">
	3104	<dataarea name="flop" size="137797">
	3105	<rom name="319 last days of doom.fsd" size="137797" crc="fad16393" sha1="e21901c31869acc162fa0e427bfa839d56fda000" offset="0" />
	3106	</dataarea>
	3107	</part>
	3108	</software>
	3109
	3110	<software name="achetont">
	3111	<description>Acheton (Topologika)</description>
	3112	<year>1987</year>
	3113	<publisher>Topologika</publisher>
	3114	<part name="flop1" interface="floppy_5_25">
	3115	<dataarea name="flop" size="145650">
	3116	<rom name="320 acheton.fsd" size="145650" crc="bdac2c79" sha1="ccb1c915838b2cb94c693b1baaa389491e9ac687" offset="0" />
	3117	</dataarea>
	3118	</part>
	3119	</software>
	3120
	3121	<software name="avon">
	3122	<description>Avon</description>
	3123	<year>1989</year>
	3124	<publisher>Topologika</publisher>
	3125	<part name="flop1" interface="floppy_5_25">
	3126	<dataarea name="flop" size="82663">
	3127	<rom name="avon.fsd" size="82663" crc="67cbc628" sha1="7c4c9fc66d4eb2fa1f96244a665208881a90a72f" offset="0" />
	3128	</dataarea>
	3129	</part>
	3130	</software>
	3131
	3132	<software name="kohamilt">
	3133	<description>Kingdom of Hamil (Topologika)</description>
	3134	<year>1987</year>
	3135	<publisher>Topologika</publisher>
	3136	<part name="flop1" interface="floppy_5_25">
	3137	<dataarea name="flop" size="61696">
	3138	<rom name="kingdom of hamil.fsd" size="61696" crc="59ce6256" sha1="438bb9612bc7aaf6d9a7ece58c06168957991e2f" offset="0" />
	3139	</dataarea>
	3140	</part>
	3141	</software>
	3142
	3143	<software name="murdac">
	3144	<description>Murdac</description>
	3145	<year>1989</year>
	3146	<publisher>Topologika</publisher>
	3147	<part name="flop1" interface="floppy_5_25">
	3148	<dataarea name="flop" size="61697">
	3149	<rom name="murdac.fsd" size="61697" crc="5c81cfdb" sha1="193d8db2d1bf4b72a98310e4836bed27c1126f6f" offset="0" />
	3150	</dataarea>
	3151	</part>
	3152	</software>
	3153
	3154	<software name="wolympia">
	3155	<description>Winter Olympiad 88</description>
	3156	<year>1988</year>
	3157	<publisher>Tynesoft</publisher>
	3158	<part name="flop1" interface="floppy_5_25">
	3159	<dataarea name="flop" size="107328">
	3160	<rom name="013 winter olympiad 88.fsd" size="107328" crc="1e502929" sha1="e19e3cff176dea9485806ea81bfc9978fb82bd35" offset="0" />
	3161	</dataarea>
	3162	</part>
	3163	</software>
	3164
	3165	<software name="indoorsp">
	3166	<description>Indoor Sports</description>
	3167	<year>1988</year>
	3168	<publisher>Tynesoft</publisher>
	3169	<part name="flop1" interface="floppy_5_25">
	3170	<dataarea name="flop" size="119005">
	3171	<rom name="056 indoor sports.fsd" size="119005" crc="e72ce832" sha1="31c0aeb42b4464612bf42f6d3cf6615836cbd164" offset="0" />
	3172	</dataarea>
	3173	</part>
	3174	</software>
	3175
	3176	<software name="bdash">
	3177	<description>Boulder Dash</description>
	3178	<year>1988</year>
	3179	<publisher>Tynesoft</publisher>
	3180	<part name="flop1" interface="floppy_5_25">
	3181	<dataarea name="flop" size="116858">
	3182	<rom name="058 boulder dash.fsd" size="116858" crc="b3f9c0b5" sha1="4cc05e633e3e7204a02e3fd01f2d8c83cabab23e" offset="0" />
	3183	</dataarea>
	3184	</part>
	3185	</software>
	3186
	3187	<software name="saigon">
	3188	<description>Saigon</description>
	3189	<year>1988</year>
	3190	<publisher>Tynesoft</publisher>
	3191	<part name="flop1" interface="floppy_5_25">
	3192	<dataarea name="flop" size="118644">
	3193	<rom name="059 saigon.fsd" size="118644" crc="8cee8780" sha1="9b14463dffdb0f1fe47c2dfbbabb39bd5195fb27" offset="0" />
	3194	</dataarea>
	3195	</part>
	3196	</software>
	3197
	3198	<software name="solympid">
	3199	<description>Summer Olympiad</description>
	3200	<year>1988</year>
	3201	<publisher>Tynesoft</publisher>
	3202	<part name="flop1" interface="floppy_5_25">
	3203	<dataarea name="flop" size="105201">
	3204	<rom name="060 summer olympiad.fsd" size="105201" crc="46a76941" sha1="b07d3c9dde884a26316cb1ee382b68800d0839a8" offset="0" />
	3205	</dataarea>
	3206	</part>
	3207	</software>
	3208
	3209	<software name="spyvsspy">
	3210	<description>Spy vs Spy</description>
	3211	<year>1984</year>
	3212	<publisher>Tynesoft</publisher>
	3213	<part name="flop1" interface="floppy_5_25">
	3214	<dataarea name="flop" size="81351">
	3215	<rom name="079 spy vs spy.fsd" size="81351" crc="831855a9" sha1="9d329a6ca19be5ec044d4e3c0071109b999cc127" offset="0" />
	3216	</dataarea>
	3217	</part>
	3218	</software>
	3219
	3220	<software name="circusga">
	3221	<description>Circus Games</description>
	3222	<year>1988</year>
	3223	<publisher>Tynesoft</publisher>
	3224	<part name="flop1" interface="floppy_5_25">
	3225	<dataarea name="flop" size="104942">
	3226	<rom name="153 circus games.fsd" size="104942" crc="facb9c3d" sha1="0dd2404a9eb9e0bcd9af68c6841e30da7184e5c5" offset="0" />
	3227	</dataarea>
	3228	</part>
	3229	</software>
	3230
	3231	<software name="phantom">
	3232	<description>Phantom</description>
	3233	<year>1987</year>
	3234	<publisher>Tynesoft</publisher>
	3235	<part name="flop1" interface="floppy_5_25">
	3236	<dataarea name="flop" size="104937">
	3237	<rom name="154 phantom.fsd" size="104937" crc="d37cdfff" sha1="38889a30f3a2d9bcebd0db20fe999f7f5f819d9f" offset="0" />
	3238	</dataarea>
	3239	</part>
	3240	</software>
	3241
	3242	<software name="futuresh">
	3243	<description>Future Shock</description>
	3244	<year>1986</year>
	3245	<publisher>Tynesoft</publisher>
	3246	<part name="flop1" interface="floppy_5_25">
	3247	<dataarea name="flop" size="102362">
	3248	<rom name="155 future shock.fsd" size="102362" crc="310f80ad" sha1="1e91ba0d64bbb69749a258290b7a69d171458c40" offset="0" />
	3249	</dataarea>
	3250	</part>
	3251	</software>
	3252
	3253	<software name="bhillcop">
	3254	<description>Beverly Hills Cop</description>
	3255	<year>1990</year>
	3256	<publisher>Tynesoft</publisher>
	3257	<part name="flop1" interface="floppy_5_25">
	3258	<feature name="part_id" value="Side 00"/>
	3259	<dataarea name="flop" size="104947">
	3260	<rom name="156 beverly hills  cop (side 00).fsd" size="104947" crc="11ecb37b" sha1="85cef485bd4936ac62fe350fcc3242bd62119f51" offset="0" />
	3261	</dataarea>
	3262	</part>
	3263	<part name="flop2" interface="floppy_5_25">
	3264	<feature name="part_id" value="Side 01"/>
	3265	<dataarea name="flop" size="104948">
	3266	<rom name="156 beverly hills  cop (side 01).fsd" size="104948" crc="4ce85ea9" sha1="1e2951fb058fe10c212a5b59842733ba3dc09504" offset="0" />
	3267	</dataarea>
	3268	</part>
	3269	<part name="flop3" interface="floppy_5_25">
	3270	<feature name="part_id" value="Side 02"/>
	3271	<dataarea name="flop" size="104947">
	3272	<rom name="156 beverly hills  cop (side 02).fsd" size="104947" crc="05d06984" sha1="308cf3ff46e6b88478ab471bd412fc2d86d53e75" offset="0" />
	3273	</dataarea>
	3274	</part>
	3275	<part name="flop4" interface="floppy_5_25">
	3276	<feature name="part_id" value="Side 03"/>
	3277	<dataarea name="flop" size="104947">
	3278	<rom name="156 beverly hills  cop (side 03).fsd" size="104947" crc="bc1da561" sha1="8ac0badcea6caaedfe7a1404c4670928c8631fd7" offset="0" />
	3279	</dataarea>
	3280	</part>
	3281	</software>
	3282
	3283	<software name="goal">
	3284	<description>Goal!</description>
	3285	<year>1986</year>
	3286	<publisher>Tynesoft</publisher>
	3287	<part name="flop1" interface="floppy_5_25">
	3288	<dataarea name="flop" size="81345">
	3289	<rom name="159 goal.fsd" size="81345" crc="cdde2e1d" sha1="c77dbe6694beb7c2e3f301a85779d5e10b277a52" offset="0" />
	3290	</dataarea>
	3291	</part>
	3292	</software>
	3293
	3294	<software name="cwgames">
	3295	<description>Commonwealth Games</description>
	3296	<year>1986</year>
	3297	<publisher>Tynesoft</publisher>
	3298	<part name="flop1" interface="floppy_5_25">
	3299	<feature name="part_id" value="80 track"/>
	3300	<dataarea name="flop" size="209868">
	3301	<rom name="160 commonwealth games.fsd" size="209868" crc="7303c63a" sha1="377a42858481e6e5f2494058b70977f4a52ce4a3" offset="0" />
	3302	</dataarea>
	3303	</part>
	3304	<part name="flop2" interface="floppy_5_25">
	3305	<feature name="part_id" value="40 track"/>
	3306	<dataarea name="flop" size="104948">
	3307	<rom name="160 commonwealth games (40 track).fsd" size="104948" crc="12792e7e" sha1="d3a676358eaae38ca9b0d31d6bc4cf0687098575" offset="0" />
	3308	</dataarea>
	3309	</part>
	3310	</software>
	3311
	3312	<software name="wolympic">
	3313	<description>Winter Olympics</description>
	3314	<year>1986</year>
	3315	<publisher>Tynesoft</publisher>
	3316	<part name="flop1" interface="floppy_5_25">
	3317	<dataarea name="flop" size="104945">
	3318	<rom name="161 winter olympics.fsd" size="104945" crc="af0cff69" sha1="15c2950b6d3d49ea33d45b1a8d692a60933f6893" offset="0" />
	3319	</dataarea>
	3320	</part>
	3321	</software>
	3322
	3323	<software name="superman">
	3324	<description>Superman: The Man of Steel</description>
	3325	<year>1989</year>
	3326	<publisher>Tynesoft</publisher>
	3327	<part name="flop1" interface="floppy_5_25">
	3328	<feature name="part_id" value="Side 00"/>
	3329	<dataarea name="flop" size="201995">
	3330	<rom name="162 superman (side 00).fsd" size="201995" crc="08577c45" sha1="7ea9dedb20495773418a47ae09ca88714a6d95c2" offset="0" />
	3331	</dataarea>
	3332	</part>
	3333	<part name="flop2" interface="floppy_5_25">
	3334	<feature name="part_id" value="Side 01"/>
	3335	<dataarea name="flop" size="201995">
	3336	<rom name="162 superman (side 01).fsd" size="201995" crc="de9ef62e" sha1="f74cc1cb34fcabf44b40489a2c00573f89c47add" offset="0" />
	3337	</dataarea>
	3338	</part>
	3339	</software>
	3340
	3341	<software name="jetsetw2">
	3342	<description>Jet Set Willy II</description>
	3343	<year>1985</year>
	3344	<publisher>Tynesoft</publisher>
	3345	<part name="flop1" interface="floppy_5_25">
	3346	<dataarea name="flop" size="81357">
	3347	<rom name="208 jet set willy ii.fsd" size="81357" crc="84c8235b" sha1="56379360fefe1b14a38b14efadce203bf0739ba1" offset="0" />
	3348	</dataarea>
	3349	</part>
	3350	</software>
	3351
	3352	<!-- Business -->
	3353
	3354	<software name="mailsys">
	3355	<description>Mailing System</description>
	3356	<year>1984</year>
	3357	<publisher>Acornsoft</publisher>
	3358	<info name="release" value="B09" />
	3359	<part name="flop1" interface="floppy_5_25">
	3360	<dataarea name="flop" size="104944">
	3361	<rom name="228 mailing system.fsd" size="104944" crc="e3f570ed" sha1="cd5ec03cb9c28636496b5af912d615226d78677a" offset="0" />
	3362	</dataarea>
	3363	</part>
	3364	</software>
	3365
	3366	<software name="database">
	3367	<description>Database</description>
	3368	<year>1983</year>
	3369	<publisher>Acornsoft</publisher>
	3370	<info name="release" value="B06" />
	3371	<part name="flop1" interface="floppy_5_25">
	3372	<dataarea name="flop" size="102318">
	3373	<rom name="229 database.fsd" size="102318" crc="abebfbc3" sha1="49219fd09580b758bd2d5ab8d285555027407c05" offset="0" />
	3374	</dataarea>
	3375	</part>
	3376	</software>
	3377
	3378	<software name="acctrecv">
	3379	<description>Accounts Receivable</description>
	3380	<year>1984</year>
	3381	<publisher>Acornsoft/MI</publisher>
	3382	<info name="release" value="B10" />
	3383	<part name="flop1" interface="floppy_5_25">
	3384	<dataarea name="flop" size="104949">
	3385	<rom name="230 accounts receivable.fsd" size="104949" crc="ac819ec1" sha1="a9fe53efcaa39051ee4bb9bbb2b71f1009ddc8ca" offset="0" />
	3386	</dataarea>
	3387	</part>
	3388	</software>
	3389
	3390	<software name="acctpay">
	3391	<description>Accounts Payable</description>
	3392	<year>1984</year>
	3393	<publisher>Acornsoft/MI</publisher>
	3394	<info name="release" value="B13" />
	3395	<part name="flop1" interface="floppy_5_25">
	3396	<dataarea name="flop" size="104946">
	3397	<rom name="231 accounts payable.fsd" size="104946" crc="cb182be6" sha1="d47a2e8b18f8efb533bc300e334b88bd06125e48" offset="0" />
	3398	</dataarea>
	3399	</part>
	3400	</software>
	3401
	3402	<software name="purchsng">
	3403	<description>Purchasing</description>
	3404	<year>1984</year>
	3405	<publisher>Acornsoft</publisher>
	3406	<info name="release" value="B14" />
	3407	<part name="flop1" interface="floppy_5_25">
	3408	<dataarea name="flop" size="104940">
	3409	<rom name="232 purchasing.fsd" size="104940" crc="29d5cbdf" sha1="6c0751612fd710e6d09f347cbe0cb1fba3472bd7" offset="0" />
	3410	</dataarea>
	3411	</part>
	3412	</software>
	3413
	3414	<software name="invoicng">
	3415	<description>Invoicing</description>
	3416	<year>1984</year>
	3417	<publisher>Acornsoft</publisher>
	3418	<info name="release" value="B08" />
	3419	<part name="flop1" interface="floppy_5_25">
	3420	<dataarea name="flop" size="104939">
	3421	<rom name="234 invoicing.fsd" size="104939" crc="3fdd7673" sha1="a33910702375886d4ec4e48337861634e6783d14" offset="0" />
	3422	</dataarea>
	3423	</part>
	3424	</software>
	3425
	3426	<software name="farmcash">
	3427	<description>FarmCash Setup v1.12</description>
	3428	<year>198?</year>
	3429	<publisher>Acornsoft</publisher>
	3430	<info name="protection" value="None" />
	3431	<part name="flop1" interface="floppy_5_25">
	3432	<dataarea name="flop" size="204800">
	3433	<rom name="240 farmcash.ssd" size="204800" crc="ba011313" sha1="5f502b669b83dd80ef524addc75875b946ae0121" offset="0" />
	3434	</dataarea>
	3435	</part>
	3436	</software>
	3437
	3438	<software name="fieldfil">
	3439	<description>FieldFile Setup v1.11</description>
	3440	<year>198?</year>
	3441	<publisher>Acornsoft</publisher>
	3442	<info name="protection" value="None" />
	3443	<part name="flop1" interface="floppy_5_25">
	3444	<dataarea name="flop" size="204800">
	3445	<rom name="241 fieldfile.ssd" size="204800" crc="61938782" sha1="50ede0e4380043268a9b010587a4bdb5285ea0f2" offset="0" />
	3446	</dataarea>
	3447	</part>
	3448	</software>
	3449
	3450	<software name="capcost">
	3451	<description>CapCost Setup v1.11</description>
	3452	<year>1983</year>
	3453	<publisher>Acornsoft</publisher>
	3454	<info name="protection" value="None" />
	3455	<part name="flop1" interface="floppy_5_25">
	3456	<dataarea name="flop" size="204800">
	3457	<rom name="242 capcost.ssd" size="204800" crc="78f00286" sha1="d747ca27c7490c7638870a099e7660d623eaf54e" offset="0" />
	3458	</dataarea>
	3459	</part>
	3460	</software>
	3461
	3462	<software name="farmplan">
	3463	<description>FarmPlanner Setup v1.01</description>
	3464	<year>1983</year>
	3465	<publisher>Acornsoft</publisher>
	3466	<info name="protection" value="None" />
	3467	<part name="flop1" interface="floppy_5_25">
	3468	<dataarea name="flop" size="204800">
	3469	<rom name="243 farmplanner.ssd" size="204800" crc="142493ad" sha1="3dc58f3d23893f9a926858ff16edf3418ba1b0fd" offset="0" />
	3470	</dataarea>
	3471	</part>
	3472	</software>
	3473
	3474	<software name="moffice">
	3475	<description>Mini Office</description>
	3476	<year>1984</year>
	3477	<publisher>Database</publisher>
	3478	<part name="flop1" interface="floppy_5_25">
	3479	<dataarea name="flop" size="103283">
	3480	<rom name="206 mini office.fsd" size="103283" crc="0978164e" sha1="abfd772d691743157f4842776e80be8b5b496fcf" offset="0" />
	3481	</dataarea>
	3482	</part>
	3483	</software>
	3484
	3485	<software name="moffice2">
	3486	<description>Mini Office II</description>
	3487	<year>1986</year>
	3488	<publisher>Database</publisher>
	3489	<part name="flop1" interface="floppy_5_25">
	3490	<dataarea name="flop" size="109842">
	3491	<rom name="003 mini office ii.fsd" size="109842" crc="7fd56209" sha1="ae85a100242e4c564347148759b2e6eff0cf5dea" offset="0" />
	3492	</dataarea>
	3493	</part>
	3494	</software>
	3495
	3496	<!-- Educational -->
	3497
	3498	<software name="flowercr">
	3499	<description>Flowers of Crystal</description>
	3500	<year>198?</year>
	3501	<publisher>4mation</publisher>
	3502	<part name="flop1" interface="floppy_5_25">
	3503	<dataarea name="flop" size="102590">
	3504	<rom name="238 flowers of crystal.fsd" size="102590" crc="caf2ded1" sha1="515dd079c17c63b12c5b75e9129405373eef4013" offset="0" />
	3505	</dataarea>
	3506	</part>
	3507	</software>
	3508
	3509	<software name="dragonwb">
	3510	<description>Dragon World (BBC Only)</description>
	3511	<year>198?</year>
	3512	<publisher>4mation</publisher>
	3513	<part name="flop1" interface="floppy_5_25">
	3514	<dataarea name="flop" size="102584">
	3515	<rom name="246 dragon world bbc only.fsd" size="102584" crc="717df981" sha1="fc761572e5d2683f32aa48c873959ba0ffea041b" offset="0" />
	3516	</dataarea>
	3517	</part>
	3518	</software>
	3519
	3520	<software name="dragonw">
	3521	<description>Dragon World</description>
	3522	<year>198?</year>
	3523	<publisher>4mation</publisher>
	3524	<part name="flop1" interface="floppy_5_25">
	3525	<dataarea name="flop" size="102721">
	3526	<rom name="247 dragon world.fsd" size="102721" crc="68168c56" sha1="bad0599d4fddc84c5d295f50957f2e27f6360f6d" offset="0" />
	3527	</dataarea>
	3528	</part>
	3529	</software>
	3530
	3531	<software name="dinodisc">
	3532	<description>Dinosaur Discovery</description>
	3533	<year>198?</year>
	3534	<publisher>4mation</publisher>
	3535	<part name="flop1" interface="floppy_5_25">
	3536	<dataarea name="flop" size="102506">
	3537	<rom name="248 dinosaur discovery.fsd" size="102506" crc="a552c6cc" sha1="c948b46c8a88c52fcc021fb0c7d0efe9dec8b01b" offset="0" />
	3538	</dataarea>
	3539	</part>
	3540	</software>
	3541
	3542	<software name="wrldword">
	3543	<description>World Without Words</description>
	3544	<year>198?</year>
	3545	<publisher>4mation</publisher>
	3546	<part name="flop1" interface="floppy_5_25">
	3547	<dataarea name="flop" size="104949">
	3548	<rom name="249 world without words.fsd" size="104949" crc="afd53f5b" sha1="9326f106f479469f53e4abe09e9a096c2091cbe7" offset="0" />
	3549	</dataarea>
	3550	</part>
	3551	</software>
	3552
	3553	<software name="boxtresc">
	3554	<description>Box of Treasures Create</description>
	3555	<year>198?</year>
	3556	<publisher>4mation</publisher>
	3557	<part name="flop1" interface="floppy_5_25">
	3558	<dataarea name="flop" size="102725">
	3559	<rom name="250 box of treasures create.fsd" size="102725" crc="94a92558" sha1="3116adba9d0c5c454f966ccb02e5ec571c616a12" offset="0" />
	3560	</dataarea>
	3561	</part>
	3562	</software>
	3563
	3564	<software name="boxtres">
	3565	<description>Box of Treasures</description>
	3566	<year>1983</year>
	3567	<publisher>4mation</publisher>
	3568	<part name="flop1" interface="floppy_5_25">
	3569	<dataarea name="flop" size="102503">
	3570	<rom name="250 box of treasures.fsd" size="102503" crc="7e2a3d56" sha1="2a92a30c363b4830b3e9261b037fdee242103686" offset="0" />
	3571	</dataarea>
	3572	</part>
	3573	</software>
	3574
	3575	<software name="ggarden">
	3576	<description>Granny's Garden</description>
	3577	<year>1984</year>
	3578	<publisher>4mation</publisher>
	3579	<info name="protection" value="None" />
	3580	<part name="flop1" interface="floppy_5_25">
	3581	<dataarea name="flop" size="102400">
	3582	<rom name="245 granny's garden.ssd" size="102400" crc="60287cc8" sha1="3e9c0f0390fdc35d44923535226115173c43e49f" offset="0" />
	3583	</dataarea>
	3584	</part>
	3585	</software>
	3586
	3587	<software name="childspc">
	3588	<description>Children from Space</description>
	3589	<year>1984</year>
	3590	<publisher>Acornsoft/ASK</publisher>
	3591	<part name="flop1" interface="floppy_5_25">
	3592	<dataarea name="flop" size="79288">
	3593	<rom name="218 children from space.fsd" size="79288" crc="2a1f96c7" sha1="dda2f5479a755d065d830c9938370a6d743b5e28" offset="0" />
	3594	</dataarea>
	3595	</part>
	3596	</software>
	3597
	3598	<software name="hideseek">
	3599	<description>Hide &amp; Seek</description>
	3600	<year>1984</year>
	3601	<publisher>Acornsoft/ASK</publisher>
	3602	<part name="flop1" interface="floppy_5_25">
	3603	<dataarea name="flop" size="79280">
	3604	<rom name="219 hide and seek.fsd" size="79280" crc="6a537a1b" sha1="e1d3b464985e13da5476a1da4e40117c9cef0306" offset="0" />
	3605	</dataarea>
	3606	</part>
	3607	</software>
	3608
	3609	<software name="facemake">
	3610	<description>Facemaker</description>
	3611	<year>1984</year>
	3612	<publisher>Acornsoft/ASK</publisher>
	3613	<part name="flop1" interface="floppy_5_25">
	3614	<dataarea name="flop" size="76468">
	3615	<rom name="220 facemaker.fsd" size="76468" crc="02565c9f" sha1="c3044473cad293f2c0cb2f57d2ff30ffda3ac40b" offset="0" />
	3616	</dataarea>
	3617	</part>
	3618	</software>
	3619
	3620	<software name="squeeze">
	3621	<description>Squeeze</description>
	3622	<year>1984</year>
	3623	<publisher>Acornsoft/ASK</publisher>
	3624	<part name="flop1" interface="floppy_5_25">
	3625	<dataarea name="flop" size="55138">
	3626	<rom name="221 squeeze.fsd" size="55138" crc="9b9689e7" sha1="6d2af4e6c8454fb9e6ad588611fb22b369b2a845" offset="0" />
	3627	</dataarea>
	3628	</part>
	3629	</software>
	3630
	3631	<software name="numbergu">
	3632	<description>Number Gulper</description>
	3633	<year>1984</year>
	3634	<publisher>Acornsoft/ASK</publisher>
	3635	<part name="flop1" interface="floppy_5_25">
	3636	<dataarea name="flop" size="79282">
	3637	<rom name="222 number gulper.fsd" size="79282" crc="2827a37e" sha1="1c03bfb9f0af780ef9d271f715e856758795a215" offset="0" />
	3638	</dataarea>
	3639	</part>
	3640	</software>
	3641
	3642	<software name="cranky">
	3643	<description>Cranky</description>
	3644	<year>1984</year>
	3645	<publisher>Acornsoft/ASK</publisher>
	3646	<part name="flop1" interface="floppy_5_25">
	3647	<dataarea name="flop" size="79275">
	3648	<rom name="223 cranky.fsd" size="79275" crc="2cef012f" sha1="b693814f465653020504f87c57a7909e6a3225a8" offset="0" />
	3649	</dataarea>
	3650	</part>
	3651	</software>
	3652
	3653	<software name="tableadv">
	3654	<description>Table Adventures</description>
	3655	<year>1984</year>
	3656	<publisher>Acornsoft/ASK</publisher>
	3657	<part name="flop1" interface="floppy_5_25">
	3658	<dataarea name="flop" size="79285">
	3659	<rom name="224 table adventures.fsd" size="79285" crc="098d33cf" sha1="5d21be7e707cdfd2248a6f0beb1612a4cda4a08c" offset="0" />
	3660	</dataarea>
	3661	</part>
	3662	</software>
	3663
	3664	<software name="jugglepu">
	3665	<description>Juggle Puzzle</description>
	3666	<year>1984</year>
	3667	<publisher>Acornsoft/ASK</publisher>
	3668	<part name="flop1" interface="floppy_5_25">
	3669	<dataarea name="flop" size="55144">
	3670	<rom name="225 juggle puzzle.fsd" size="55144" crc="244d1ac3" sha1="b71d331ee864e91c863065b468617e2ec13179d9" offset="0" />
	3671	</dataarea>
	3672	</part>
	3673	</software>
	3674
	3675	<software name="pazazz">
	3676	<description>Pazazz</description>
	3677	<year>1985</year>
	3678	<publisher>ASK</publisher>
	3679	<part name="flop1" interface="floppy_5_25">
	3680	<dataarea name="flop" size="102525">
	3681	<rom name="343 pazazz.fsd" size="102525" crc="bb5b4b00" sha1="1fbf3db293278565163476c5eb9d8fbb84f1b3f3" offset="0" />
	3682	</dataarea>
	3683	</part>
	3684	</software>
	3685
	3686	<software name="letscoun">
	3687	<description>Let's Count</description>
	3688	<year>1984</year>
	3689	<publisher>Acornsoft/ASK</publisher>
	3690	<part name="flop1" interface="floppy_5_25">
	3691	<dataarea name="flop" size="79280">
	3692	<rom name="347 let's count.fsd" size="79280" crc="8d69c2ba" sha1="7dc53270ea1a36964cd2040f3044ae83f936b27a" offset="0" />
	3693	</dataarea>
	3694	</part>
	3695	</software>
	3696
	3697	<software name="wrdswrds">
	3698	<description>Words Words Words</description>
	3699	<year>1984</year>
	3700	<publisher>Acornsoft/ASK</publisher>
	3701	<part name="flop1" interface="floppy_5_25">
	3702	<dataarea name="flop" size="72642">
	3703	<rom name="348 words words words.fsd" size="72642" crc="ecda7e69" sha1="c2706c4bd45d6eee0af3ce176a8a34d8111bcbd9" offset="0" />
	3704	</dataarea>
	3705	</part>
	3706	</software>
	3707
	3708	<software name="podd">
	3709	<description>Podd</description>
	3710	<year>1984</year>
	3711	<publisher>Acornsoft/ASK</publisher>
	3712	<part name="flop1" interface="floppy_5_25">
	3713	<dataarea name="flop" size="102386">
	3714	<rom name="349 podd.fsd" size="102386" crc="6d764be9" sha1="8d6334c45f7e9d28e4300b7fe3f8a2f608e833a6" offset="0" />
	3715	</dataarea>
	3716	</part>
	3717	</software>
	3718
	3719	<software name="timeman1">
	3720	<description>Timeman One</description>
	3721	<year>1983</year>
	3722	<publisher>Bourne Educational Software</publisher>
	3723	<part name="flop1" interface="floppy_5_25">
	3724	<dataarea name="flop" size="15827">
	3725	<rom name="337 timeman one.fsd" size="15827" crc="9eed5d71" sha1="8a70525233f6d8a4b3e4be6bfe4312d8e67e0fd6" offset="0" />
	3726	</dataarea>
	3727	</part>
	3728	</software>
	3729
	3730	<software name="happynum">
	3731	<description>Happy Numbers</description>
	3732	<year>198?</year>
	3733	<publisher>Bourne Educational Software</publisher>
	3734	<part name="flop1" interface="floppy_5_25">
	3735	<dataarea name="flop" size="15829">
	3736	<rom name="338 happy numbers.fsd" size="15829" crc="94324df5" sha1="6daf43ab38a632a1a239b24ef513862053620066" offset="0" />
	3737	</dataarea>
	3738	</part>
	3739	</software>
	3740
	3741	<software name="fs2-68">
	3742	<description>Fun School 2 (For 6-8 year olds)</description>
	3743	<year>1989</year>
	3744	<publisher>Database Educational Software</publisher>
	3745	<part name="flop1" interface="floppy_5_25">
	3746	<dataarea name="flop" size="104946">
	3747	<rom name="163 fun school 2 6-8.fsd" size="104946" crc="709bc9d4" sha1="0d773bb6e39370f16e57f71e1a9f91507d1271e4" offset="0" />
	3748	</dataarea>
	3749	</part>
	3750	</software>
	3751
	3752	<software name="fs2-ov8">
	3753	<description>Fun School 2 (For the Over-8s)</description>
	3754	<year>1989</year>
	3755	<publisher>Database Educational Software</publisher>
	3756	<part name="flop1" interface="floppy_5_25">
	3757	<dataarea name="flop" size="104949">
	3758	<rom name="164 fun school 2 over 8.fsd" size="104949" crc="a530027a" sha1="e0bc5957023ed932788bf6e031de3603b1e439c6" offset="0" />
	3759	</dataarea>
	3760	</part>
	3761	</software>
	3762
	3763	<software name="symbmole">
	3764	<description>Symbols to Moles</description>
	3765	<year>198?</year>
	3766	<publisher>Five Ways Software</publisher>
	3767	<part name="flop1" interface="floppy_5_25">
	3768	<dataarea name="flop" size="98864">
	3769	<rom name="340 symbols to moles sn1638.fsd" size="98864" crc="83cafdd7" sha1="542f8a8f348b9bc29ddd1294d2b51680b2c7145d" offset="0" />
	3770	</dataarea>
	3771	</part>
	3772	</software>
	3773
	3774	<software name="longwave">
	3775	<description>Longitudinal Waves</description>
	3776	<year>198?</year>
	3777	<publisher>Five Ways Software</publisher>
	3778	<part name="flop1" interface="floppy_5_25">
	3779	<dataarea name="flop" size="57770">
	3780	<rom name="341 longitudinal waves.fsd" size="57770" crc="700e2dfe" sha1="45dd567282170c0cccc8dcd5c23fc50089d8c39e" offset="0" />
	3781	</dataarea>
	3782	</part>
	3783	</software>
	3784
	3785	<software name="bertboot">
	3786	<description>Bert Boot</description>
	3787	<year>1984</year>
	3788	<publisher>H.S.Software</publisher>
	3789	<part name="flop1" interface="floppy_5_25">
	3790	<dataarea name="flop" size="21593">
	3791	<rom name="212 bert boot.fsd" size="21593" crc="01f34468" sha1="1428fefdbe06b89e3f410b8aa8b3788bddfb2f72" offset="0" />
	3792	</dataarea>
	3793	</part>
	3794	</software>
	3795
	3796	<software name="roadcft1">
	3797	<description>Roadcraft 1</description>
	3798	<year>1984</year>
	3799	<publisher>H.S.Software</publisher>
	3800	<part name="flop1" interface="floppy_5_25">
	3801	<dataarea name="flop" size="21595">
	3802	<rom name="213 roadcraft 1.fsd" size="21595" crc="0ee47b08" sha1="3aca175651cd0daa237d2d9d40588aa8fc247775" offset="0" />
	3803	</dataarea>
	3804	</part>
	3805	</software>
	3806
	3807	<software name="frmistra">
	3808	<description>The French Mistress Level A</description>
	3809	<year>1983</year>
	3810	<publisher>Kosmos</publisher>
	3811	<part name="flop1" interface="floppy_5_25">
	3812	<dataarea name="flop" size="104957">
	3813	<rom name="251 the french mistress level a.fsd" size="104957" crc="33a4b3d3" sha1="25fc6b8a07def80334808d4e917ef3eb4c093bdb" offset="0" />
	3814	</dataarea>
	3815	</part>
	3816	</software>
	3817
	3818	<software name="frmistrb">
	3819	<description>The French Mistress Level B</description>
	3820	<year>1983</year>
	3821	<publisher>Kosmos</publisher>
	3822	<part name="flop1" interface="floppy_5_25">
	3823	<dataarea name="flop" size="104957">
	3824	<rom name="252 the french mistress level b.fsd" size="104957" crc="3c427fcc" sha1="ec1f59eedf4abf1b7c21d5d42a3d0768dc295efc" offset="0" />
	3825	</dataarea>
	3826	</part>
	3827	</software>
	3828
	3829	<software name="tpicnic">
	3830	<description>The Teddy Bears' Picnic</description>
	3831	<year>1989</year>
	3832	<publisher>Sherston Software</publisher>
	3833	<part name="flop1" interface="floppy_5_25">
	3834	<feature name="part_id" value="Side 1"/>
	3835	<dataarea name="flop" size="104960">
	3836	<rom name="186 the teddy bears' picnic side 1.fsd" size="104960" crc="83657179" sha1="1d12b5579fca525558115fd3338ecf41d1c38ec8" offset="0" />
	3837	</dataarea>
	3838	</part>
	3839	<part name="flop2" interface="floppy_5_25">
	3840	<feature name="part_id" value="Side 2"/>
	3841	<dataarea name="flop" size="104960">
	3842	<rom name="186 the teddy bears' picnic side 2.fsd" size="104960" crc="139afdc0" sha1="6ffbb34bd86c2117fde0d559ba1b1a2e9ad9bba5" offset="0" />
	3843	</dataarea>
	3844	</part>
	3845	</software>
	3846
	3847	<software name="connectn">
	3848	<description>Connections</description>
	3849	<year>1990</year>
	3850	<publisher>Sherston Software</publisher>
	3851	<part name="flop1" interface="floppy_5_25">
	3852	<dataarea name="flop" size="104941">
	3853	<rom name="187 connections.fsd" size="104941" crc="59113b53" sha1="4a764f10bad44ebfad503696726ff4d4528521d8" offset="0" />
	3854	</dataarea>
	3855	</part>
	3856	</software>
	3857
	3858	<software name="vowlsnd2">
	3859	<description>Short Vowel Sounds v2</description>
	3860	<year>1983</year>
	3861	<publisher>Sherston Software</publisher>
	3862	<part name="flop1" interface="floppy_5_25">
	3863	<dataarea name="flop" size="105085">
	3864	<rom name="270 short vowel sounds v2.fsd" size="105085" crc="a21326f0" sha1="681521dcd515c8d49cfa7fc3b92662fa8f0ad1db" offset="0" />
	3865	</dataarea>
	3866	</part>
	3867	</software>
	3868
	3869	<software name="vowlsnd" cloneof="vowlsnd2">
	3870	<description>Short Vowel Sounds</description>
	3871	<year>1983</year>
	3872	<publisher>Sherston Software</publisher>
	3873	<part name="flop1" interface="floppy_5_25">
	3874	<dataarea name="flop" size="104948">
	3875	<rom name="266 short vowel sounds.fsd" size="104948" crc="616d6bdd" sha1="c9a3ff853e963451adb501a0e1d0995687542e2d" offset="0" />
	3876	</dataarea>
	3877	</part>
	3878	</software>
	3879
	3880	<software name="tcircus">
	3881	<description>The Circus</description>
	3882	<year>1985</year>
	3883	<publisher>Sherston Software</publisher>
	3884	<part name="flop1" interface="floppy_5_25">
	3885	<feature name="part_id" value="40 track"/>
	3886	<dataarea name="flop" size="104940">
	3887	<rom name="267 the circus.fsd" size="104940" crc="3aabf560" sha1="caca0c3362ffd5fe2d3c164a36c9177690be9236" offset="0" />
	3888	</dataarea>
	3889	</part>
	3890	<part name="flop2" interface="floppy_5_25">
	3891	<feature name="part_id" value="80 track"/>
	3892	<dataarea name="flop" size="105020">
	3893	<rom name="267 the circus (80 track).fsd" size="105020" crc="bbf1118d" sha1="1eb0e41786ad7e43443b2a22f79e9d4a700460e6" offset="0" />
	3894	</dataarea>
	3895	</part>
	3896	</software>
	3897
	3898	<software name="mathsnap">
	3899	<description>Maths Snap</description>
	3900	<year>198?</year>
	3901	<publisher>Sherston Software</publisher>
	3902	<part name="flop1" interface="floppy_5_25">
	3903	<dataarea name="flop" size="105077">
	3904	<rom name="268 maths snap.fsd" size="105077" crc="533dedc1" sha1="25815346eadbbc6b30dcdb60f7a9ecdb0587ecb4" offset="0" />
	3905	</dataarea>
	3906	</part>
	3907	</software>
	3908
	3909	<software name="wbuild2">
	3910	<description>Word Builder MkII</description>
	3911	<year>1985</year>
	3912	<publisher>Sherston Software</publisher>
	3913	<part name="flop1" interface="floppy_5_25">
	3914	<dataarea name="flop" size="107132">
	3915	<rom name="272 word builder mkii.fsd" size="107132" crc="f4bf3718" sha1="cb1e3e74d3b87c7d6c718bcfe4462aa7061e28a6" offset="0" />
	3916	</dataarea>
	3917	</part>
	3918	</software>
	3919
	3920	<software name="wbuild2a" cloneof="wbuild2">
	3921	<description>Word Builder MkII (alt)</description>
	3922	<year>1985</year>
	3923	<publisher>Sherston Software</publisher>
	3924	<part name="flop1" interface="floppy_5_25">
	3925	<dataarea name="flop" size="107132">
	3926	<rom name="273 word builder mkii.fsd" size="107132" crc="533c68ff" sha1="07547298a79c30571d46e2abc67b1d407076cff1" offset="0" />
	3927	</dataarea>
	3928	</part>
	3929	</software>
	3930
	3931	<software name="wbuild">
	3932	<description>Word Builder</description>
	3933	<year>198?</year>
	3934	<publisher>Sherston Software</publisher>
	3935	<part name="flop1" interface="floppy_5_25">
	3936	<dataarea name="flop" size="105079">
	3937	<rom name="269 word builder.fsd" size="105079" crc="65291309" sha1="710bd3f042e81bed5342a8b3457e639683a86d5a" offset="0" />
	3938	</dataarea>
	3939	</part>
	3940	</software>
	3941
	3942	<software name="tensunit">
	3943	<description>Tens and Units</description>
	3944	<year>1985</year>
	3945	<publisher>Sherston Software</publisher>
	3946	<part name="flop1" interface="floppy_5_25">
	3947	<dataarea name="flop" size="107129">
	3948	<rom name="271 tens and units.fsd" size="107129" crc="232afd42" sha1="7138fcd17c27d6eaefc80864982e7ef0dc5b768c" offset="0" />
	3949	</dataarea>
	3950	</part>
	3951	</software>
	3952
	3953	<software name="gbuild">
	3954	<description>Graph Builder</description>
	3955	<year>1986</year>
	3956	<publisher>Sherston Software</publisher>
	3957	<part name="flop1" interface="floppy_5_25">
	3958	<dataarea name="flop" size="107128">
	3959	<rom name="274 graph builder.fsd" size="107128" crc="731b8fc5" sha1="5394615051514b193776759d90b2914c1dc5beb2" offset="0" />
	3960	</dataarea>
	3961	</part>
	3962	</software>
	3963
	3964	<software name="gbuilda" cloneof="gbuild">
	3965	<description>Graph Builder (alt)</description>
	3966	<year>1986</year>
	3967	<publisher>Sherston Software</publisher>
	3968	<part name="flop1" interface="floppy_5_25">
	3969	<dataarea name="flop" size="104943">
	3970	<rom name="284 graph builder.fsd" size="104943" crc="f4aef12c" sha1="98aeef93536d6401271b2b8e6ec9b1d9a7b50d4e" offset="0" />
	3971	</dataarea>
	3972	</part>
	3973	</software>
	3974
	3975	<software name="wizretna" cloneof="wizretn">
	3976	<description>The Wizard's Return (alt)</description>
	3977	<year>1989</year>
	3978	<publisher>Sherston Software</publisher>
	3979	<part name="flop1" interface="floppy_5_25">
	3980	<feature name="part_id" value="Disc 1"/>
	3981	<dataarea name="flop" size="107134">
	3982	<rom name="275 the wizard's return disc 1.fsd" size="107134" crc="1702b5d1" sha1="c5e7a19a7a2b1968f2d145dda2c0485a486c33fa" offset="0" />
	3983	</dataarea>
	3984	</part>
	3985	<part name="flop2" interface="floppy_5_25">
	3986	<feature name="part_id" value="Disc 2"/>
	3987	<dataarea name="flop" size="107134">
	3988	<rom name="275 the wizard's return disc 2.fsd" size="107134" crc="934a51ba" sha1="fa954c26816ab5f1f1c91aa75f7cfbf909d7764b" offset="0" />
	3989	</dataarea>
	3990	</part>
	3991	</software>
	3992
	3993	<software name="wizretn">
	3994	<description>The Wizard's Return</description>
	3995	<year>1985</year>
	3996	<publisher>Sherston Software</publisher>
	3997	<part name="flop1" interface="floppy_5_25">
	3998	<feature name="part_id" value="Part 1"/>
	3999	<dataarea name="flop" size="104949">
	4000	<rom name="313 the wizards return part 1.fsd" size="104949" crc="1d850a68" sha1="3c0df079d109623487b29357523597a7e5269855" offset="0" />
	4001	</dataarea>
	4002	</part>
	4003	<part name="flop2" interface="floppy_5_25">
	4004	<feature name="part_id" value="Part 2"/>
	4005	<dataarea name="flop" size="104949">
	4006	<rom name="313 the wizards return part 2.fsd" size="104949" crc="f3b0af75" sha1="f32b5340455d8bac2b2bb6f5f617b759314f310c" offset="0" />
	4007	</dataarea>
	4008	</part>
	4009	</software>
	4010
	4011	<software name="uareaa" cloneof="uarea">
	4012	<description>Understanding Area (alt)</description>
	4013	<year>1986</year>
	4014	<publisher>Sherston Software</publisher>
	4015	<part name="flop1" interface="floppy_5_25">
	4016	<dataarea name="flop" size="107133">
	4017	<rom name="276 understanding area.fsd" size="107133" crc="843de51c" sha1="eecb88db50820e863deeb72abb6e43056ea62180" offset="0" />
	4018	</dataarea>
	4019	</part>
	4020	</software>
	4021
	4022	<software name="uarea">
	4023	<description>Understanding Area</description>
	4024	<year>1986</year>
	4025	<publisher>Sherston Software</publisher>
	4026	<part name="flop1" interface="floppy_5_25">
	4027	<dataarea name="flop" size="104948">
	4028	<rom name="285 understanding area.fsd" size="104948" crc="75f77e4c" sha1="a8bb7871d9177d1e76cd780d1fd6daef341bf22f" offset="0" />
	4029	</dataarea>
	4030	</part>
	4031	</software>
	4032
	4033	<software name="dreamtim">
	4034	<description>Dream Time</description>
	4035	<year>1989</year>
	4036	<publisher>Sherston Software</publisher>
	4037	<part name="flop1" interface="floppy_5_25">
	4038	<feature name="part_id" value="The Lost Box"/>
	4039	<dataarea name="flop" size="104952">
	4040	<rom name="277 dreamtime the lost box.fsd" size="104952" crc="d5f3161f" sha1="a3cf6ef2c84ee90ea1abc99768f9df11bdb36b31" offset="0" />
	4041	</dataarea>
	4042	</part>
	4043	<part name="flop2" interface="floppy_5_25">
	4044	<feature name="part_id" value="The Lost Toy"/>
	4045	<dataarea name="flop" size="104952">
	4046	<rom name="277 dreamtime the lost toy.fsd" size="104952" crc="bce9d536" sha1="d63b17b405b622e61e0454af9e2f3cc504056f1c" offset="0" />
	4047	</dataarea>
	4048	</part>
	4049	</software>
	4050
	4051	<software name="teachcup">
	4052	<description>The Teachers Cupboard</description>
	4053	<year>198?</year>
	4054	<publisher>Sherston Software</publisher>
	4055	<part name="flop1" interface="floppy_5_25">
	4056	<feature name="part_id" value="The Apple"/>
	4057	<dataarea name="flop" size="104961">
	4058	<rom name="278 the teachers cupboard the apple.fsd" size="104961" crc="c2210968" sha1="9bcf2de3eb9928fba90da41e876c22218fe7f9cc" offset="0" />
	4059	</dataarea>
	4060	</part>
	4061	<part name="flop2" interface="floppy_5_25">
	4062	<feature name="part_id" value="The Crown"/>
	4063	<dataarea name="flop" size="104961">
	4064	<rom name="278 the teachers cupboard the crown.fsd" size="104961" crc="92f645c6" sha1="dbd30585b46d08c9f830319a0d43d8b76a55c49e" offset="0" />
	4065	</dataarea>
	4066	</part>
	4067	</software>
	4068
	4069	<software name="easytype">
	4070	<description>Easy Type</description>
	4071	<year>1984</year>
	4072	<publisher>Sherston Software</publisher>
	4073	<part name="flop1" interface="floppy_5_25">
	4074	<dataarea name="flop" size="107124">
	4075	<rom name="280 easy type.fsd" size="107124" crc="034cf940" sha1="6c32e19b82b5a9287dd87a256ffac826bab5224f" offset="0" />
	4076	</dataarea>
	4077	</part>
	4078	</software>
	4079
	4080	<software name="magice">
	4081	<description>Magic E</description>
	4082	<year>198?</year>
	4083	<publisher>Sherston Software</publisher>
	4084	<part name="flop1" interface="floppy_5_25">
	4085	<dataarea name="flop" size="107122">
	4086	<rom name="281 magic e.fsd" size="107122" crc="e6c930b5" sha1="a5c83281287b9417c9f1983dec52f565001b2d85" offset="0" />
	4087	</dataarea>
	4088	</part>
	4089	</software>
	4090
	4091	<software name="storysta">
	4092	<description>Story Starts</description>
	4093	<year>198?</year>
	4094	<publisher>Sherston Software</publisher>
	4095	<part name="flop1" interface="floppy_5_25">
	4096	<feature name="part_id" value="1 The House on the Hill"/>
	4097	<dataarea name="flop" size="107151">
	4098	<rom name="282 story starts 1 the house on the hill.fsd" size="107151" crc="cdb59931" sha1="1650a33d33fd9b5a278e2eb1b25c374c7449cb45" offset="0" />
	4099	</dataarea>
	4100	</part>
	4101	<part name="flop2" interface="floppy_5_25">
	4102	<feature name="part_id" value="2 Escape from the Castle of Evil"/>
	4103	<dataarea name="flop" size="107160">
	4104	<rom name="282 story starts 2 escape from the castle of evil.fsd" size="107160" crc="bc37093c" sha1="6b5af817f84e9f7d01d490d20cb44baca0748732" offset="0" />
	4105	</dataarea>
	4106	</part>
	4107	<part name="flop3" interface="floppy_5_25">
	4108	<feature name="part_id" value="3 The Box"/>
	4109	<dataarea name="flop" size="107137">
	4110	<rom name="282 story starts 3 the box.fsd" size="107137" crc="b97f2204" sha1="32d798223831e5df66ab0c327a7d94d5d2a97854" offset="0" />
	4111	</dataarea>
	4112	</part>
	4113	<part name="flop4" interface="floppy_5_25">
	4114	<feature name="part_id" value="4 The Junk Shop"/>
	4115	<dataarea name="flop" size="107143">
	4116	<rom name="282 story starts 4 the junk shop.fsd" size="107143" crc="901c4d1a" sha1="4da1e8d3af012e48da2e174a4e56a80cdfe64350" offset="0" />
	4117	</dataarea>
	4118	</part>
	4119	</software>
	4120
	4121	<software name="wizrevng">
	4122	<description>The Wizard's Revenge</description>
	4123	<year>1989</year>
	4124	<publisher>Sherston Software</publisher>
	4125	<part name="flop1" interface="floppy_5_25">
	4126	<feature name="part_id" value="40 track"/>
	4127	<dataarea name="flop" size="104950">
	4128	<rom name="283 the wizards revenge.fsd" size="104950" crc="a6595fae" sha1="9c0b74e7ec586eab95532bb1c8274fb3cedf14c1" offset="0" />
	4129	</dataarea>
	4130	</part>
	4131	<part name="flop2" interface="floppy_5_25">
	4132	<feature name="part_id" value="80 track"/>
	4133	<dataarea name="flop" size="105165">
	4134	<rom name="283 the wizard's revenge (80 track).fsd" size="105165" crc="189b2b12" sha1="7a16e39562c6634ea24a965c88aecb3c18f3d4a5" offset="0" />
	4135	</dataarea>
	4136	</part>
	4137	</software>
	4138
	4139	<software name="zillion">
	4140	<description>Zillion</description>
	4141	<year>1990</year>
	4142	<publisher>Sherston Software</publisher>
	4143	<part name="flop1" interface="floppy_5_25">
	4144	<feature name="part_id" value="Startup"/>
	4145	<dataarea name="flop" size="104945">
	4146	<rom name="287 zillion startup.fsd" size="104945" crc="5f418e9e" sha1="24c89246b9f4b25577b61fe03b9ca90704af0da9" offset="0" />
	4147	</dataarea>
	4148	</part>
	4149	<part name="flop2" interface="floppy_5_25">
	4150	<feature name="part_id" value="Planet"/>
	4151	<dataarea name="flop" size="104944">
	4152	<rom name="287 zillion planet.fsd" size="104944" crc="5730fb6b" sha1="0b1f058cbc31c68e4d7ee18292635185b6160187" offset="0" />
	4153	</dataarea>
	4154	</part>
	4155	<part name="flop3" interface="floppy_5_25">
	4156	<feature name="part_id" value="Solar"/>
	4157	<dataarea name="flop" size="104943">
	4158	<rom name="287 zillion solar.fsd" size="104943" crc="31e6903e" sha1="3b2aa66e6c060b73654b99d1bd50e3c1b4312772" offset="0" />
	4159	</dataarea>
	4160	</part>
	4161	</software>
	4162
	4163	<software name="animresc">
	4164	<description>Animal Rescue</description>
	4165	<year>1986</year>
	4166	<publisher>Sherston Software</publisher>
	4167	<part name="flop1" interface="floppy_5_25">
	4168	<feature name="part_id" value="Part 1"/>
	4169	<dataarea name="flop" size="105162">
	4170	<rom name="288 animal rescue part 1 (80 track).fsd" size="105162" crc="bd4297a5" sha1="72d9de024711aef34bd6485bf1f0e874b9722e42" offset="0" />
	4171	</dataarea>
	4172	</part>
	4173	<part name="flop2" interface="floppy_5_25">
	4174	<feature name="part_id" value="Part 2"/>
	4175	<dataarea name="flop" size="105165">
	4176	<rom name="288 animal rescue part 2 (80 track).fsd" size="105165" crc="c22c14a8" sha1="7fdbf88045b672d64d63ade918a6af5402651907" offset="0" />
	4177	</dataarea>
	4178	</part>
	4179	<part name="flop3" interface="floppy_5_25">
	4180	<feature name="part_id" value="Part 3"/>
	4181	<dataarea name="flop" size="105165">
	4182	<rom name="288 animal rescue part 3 (80 track).fsd" size="105165" crc="e2777096" sha1="f8309a72370535af6569890a4941daf6ca48d19c" offset="0" />
	4183	</dataarea>
	4184	</part>
	4185	<part name="flop4" interface="floppy_5_25">
	4186	<feature name="part_id" value="Problems Disk"/>
	4187	<dataarea name="flop" size="105172">
	4188	<rom name="288 animal rescue problems disk (80 track).fsd" size="105172" crc="3ebdc332" sha1="ff15becac2e10ef9d64c0dcda3a1dc4a7e0a1dd2" offset="0" />
	4189	</dataarea>
	4190	</part>
	4191	</software>
	4192
	4193	<software name="naturadv">
	4194	<description>The Nature Park Adventure</description>
	4195	<year>1987</year>
	4196	<publisher>Sherston Software</publisher>
	4197	<part name="flop1" interface="floppy_5_25">
	4198	<feature name="part_id" value="Part 1"/>
	4199	<dataarea name="flop" size="105095">
	4200	<rom name="289 nature park adventure part 1.fsd" size="105095" crc="a5d883c0" sha1="d9ac74f9432ef948d55f87c4b00c3dd416c94c7f" offset="0" />
	4201	</dataarea>
	4202	</part>
	4203	<part name="flop2" interface="floppy_5_25">
	4204	<feature name="part_id" value="Part 2"/>
	4205	<dataarea name="flop" size="105095">
	4206	<rom name="289 nature park adventure part 2.fsd" size="105095" crc="94f2b938" sha1="e5b49a1ec877cc5bee5bdbab8527656d8b70d172" offset="0" />
	4207	</dataarea>
	4208	</part>
	4209	<part name="flop3" interface="floppy_5_25">
	4210	<feature name="part_id" value="Part 3"/>
	4211	<dataarea name="flop" size="105095">
	4212	<rom name="289 nature park adventure part 3.fsd" size="105095" crc="23e7b649" sha1="5b243c89097cec8b5c47a57fbbd6faf8cd5c0561" offset="0" />
	4213	</dataarea>
	4214	</part>
	4215	<part name="flop4" interface="floppy_5_25">
	4216	<feature name="part_id" value="Problems Disk"/>
	4217	<dataarea name="flop" size="105102">
	4218	<rom name="289 nature park adventure problems disk.fsd" size="105102" crc="255f2e11" sha1="3cd50cf3e4424e4e4b7355687497aca38a2160a2" offset="0" />
	4219	</dataarea>
	4220	</part>
	4221	</software>
	4222
	4223	<software name="naturadvb" cloneof="naturadv">
	4224	<description>The Nature Park Adventure (alt)</description>
	4225	<year>1987</year>
	4226	<publisher>Sherston Software</publisher>
	4227	<part name="flop1" interface="floppy_5_25">
	4228	<feature name="part_id" value="Part 1"/>
	4229	<dataarea name="flop" size="104958">
	4230	<rom name="289b nature park adventure part 1.fsd" size="104958" crc="a61197f5" sha1="4468498ea1e4f9a31895b9fa074ae7ff0e65bb9b" offset="0" />
	4231	</dataarea>
	4232	</part>
	4233	<part name="flop2" interface="floppy_5_25">
	4234	<feature name="part_id" value="Part 2"/>
	4235	<dataarea name="flop" size="104958">
	4236	<rom name="289b nature park adventure part 2.fsd" size="104958" crc="c306712d" sha1="bffcda49cd64ae843412f7cff4004d84e37215ee" offset="0" />
	4237	</dataarea>
	4238	</part>
	4239	<part name="flop3" interface="floppy_5_25">
	4240	<feature name="part_id" value="Part 3"/>
	4241	<dataarea name="flop" size="104959">
	4242	<rom name="289b nature park adventure part 3.fsd" size="104959" crc="8460904d" sha1="53dfcbd310aa7934c400e54703cf0f29624e252d" offset="0" />
	4243	</dataarea>
	4244	</part>
	4245	<part name="flop4" interface="floppy_5_25">
	4246	<feature name="part_id" value="Problems Disk"/>
	4247	<dataarea name="flop" size="104965">
	4248	<rom name="289b nature park adventure problems disk.fsd" size="104965" crc="50569566" sha1="59c8e26e2582204637c7dbf2e7b020efe31902e6" offset="0" />
	4249	</dataarea>
	4250	</part>
	4251	</software>
	4252
	4253	<software name="tobybeac">
	4254	<description>Toby at the Beach</description>
	4255	<year>1990</year>
	4256	<publisher>Sherston Software</publisher>
	4257	<part name="flop1" interface="floppy_5_25">
	4258	<feature name="part_id" value="Fun and Games"/>
	4259	<dataarea name="flop" size="105041">
	4260	<rom name="290 toby at the beach fun and games (80 track).fsd" size="105041" crc="651d558a" sha1="41159a812f10991ed1da2543439854f369f300b8" offset="0" />
	4261	</dataarea>
	4262	</part>
	4263	<part name="flop2" interface="floppy_5_25">
	4264	<feature name="part_id" value="Judy's Shop"/>
	4265	<dataarea name="flop" size="105039">
	4266	<rom name="290 toby at the beach judy's shop (80 track).fsd" size="105039" crc="a786702b" sha1="3e8ae35f26714ff35a7f66c8d71db3ad3ac3705c" offset="0" />
	4267	</dataarea>
	4268	</part>
	4269	<part name="flop3" interface="floppy_5_25">
	4270	<feature name="part_id" value="Punch + Judy-Rockpools"/>
	4271	<dataarea name="flop" size="105052">
	4272	<rom name="290 toby at the beach punch + judy-rockpools (80 track).fsd" size="105052" crc="1becee05" sha1="9e6459a380a56bff5e682f40c82ca3019c43d721" offset="0" />
	4273	</dataarea>
	4274	</part>
	4275	<part name="flop4" interface="floppy_5_25">
	4276	<feature name="part_id" value="Ship Ahoy"/>
	4277	<dataarea name="flop" size="105037">
	4278	<rom name="290 toby at the beach ship ahoy (80 track).fsd" size="105037" crc="2080c6f9" sha1="dbbf24699a02dcca0acfb65bf9186971140a76ac" offset="0" />
	4279	</dataarea>
	4280	</part>
	4281	</software>
	4282
	4283	<software name="anialpha">
	4284	<description>The Animated Alphabet</description>
	4285	<year>198?</year>
	4286	<publisher>Sherston Software</publisher>
	4287	<part name="flop1" interface="floppy_5_25">
	4288	<feature name="part_id" value="Side 0"/>
	4289	<dataarea name="flop" size="104955">
	4290	<rom name="292 the animated alphabet side 0.fsd" size="104955" crc="9ed822f1" sha1="9df716119c502dd1236c6339be4bacb824e3de1b" offset="0" />
	4291	</dataarea>
	4292	</part>
	4293	<part name="flop2" interface="floppy_5_25">
	4294	<feature name="part_id" value="Side 1"/>
	4295	<dataarea name="flop" size="104955">
	4296	<rom name="292 the animated alphabet side 1.fsd" size="104955" crc="2604da04" sha1="57f0f1942e3846be99a0443ce18f952067a45d24" offset="0" />
	4297	</dataarea>
	4298	</part>
	4299	</software>
	4300
	4301	<software name="sellador">
	4302	<description>Selladore Tales</description>
	4303	<year>1991</year>
	4304	<publisher>Sherston Software</publisher>
	4305	<part name="flop1" interface="floppy_5_25">
	4306	<feature name="part_id" value="Startup Disk"/>
	4307	<dataarea name="flop" size="104945">
	4308	<rom name="308 selladore tales startup disk.fsd" size="104945" crc="ae135f24" sha1="7fcad53681521abe225cd33b47ca9bb1885cd25e" offset="0" />
	4309	</dataarea>
	4310	</part>
	4311	<part name="flop2" interface="floppy_5_25">
	4312	<feature name="part_id" value="User Disk"/>
	4313	<dataarea name="flop" size="104945">
	4314	<rom name="308 selladore tales user disk.fsd" size="104945" crc="170e5791" sha1="210cae555661d056bb2ef016fd33486ea53c3b9b" offset="0" />
	4315	</dataarea>
	4316	</part>
	4317	</software>
	4318
	4319	<software name="thefarm">
	4320	<description>The Farm</description>
	4321	<year>1987</year>
	4322	<publisher>Sherston Software</publisher>
	4323	<part name="flop1" interface="floppy_5_25">
	4324	<feature name="part_id" value="Side 1"/>
	4325	<dataarea name="flop" size="104938">
	4326	<rom name="309 the farm side 1.fsd" size="104938" crc="39c245da" sha1="fcf750803e8bdd7ac50e2f40f1205096f9b85dc7" offset="0" />
	4327	</dataarea>
	4328	</part>
	4329	<part name="flop2" interface="floppy_5_25">
	4330	<feature name="part_id" value="Side 2"/>
	4331	<dataarea name="flop" size="104938">
	4332	<rom name="309 the farm side 2.fsd" size="104938" crc="ba7dbe11" sha1="269aeef0129233bd8e6f315f3c6e56ecccdb1319" offset="0" />
	4333	</dataarea>
	4334	</part>
	4335	</software>
	4336
	4337	<software name="mryog">
	4338	<description>Mr Yog and the Nippet</description>
	4339	<year>1984</year>
	4340	<publisher>Sherston Software</publisher>
	4341	<part name="flop1" interface="floppy_5_25">
	4342	<dataarea name="flop" size="104951">
	4343	<rom name="310 mr yog and the nippet.fsd" size="104951" crc="2db88f43" sha1="b68811764db954b2bf86d993d929474fd94bcaf8" offset="0" />
	4344	</dataarea>
	4345	</part>
	4346	</software>
	4347
	4348	<software name="mapventu">
	4349	<description>Mapventure</description>
	4350	<year>1988</year>
	4351	<publisher>Sherston Software</publisher>
	4352	<part name="flop1" interface="floppy_5_25">
	4353	<feature name="part_id" value="Part 1"/>
	4354	<dataarea name="flop" size="106732">
	4355	<rom name="311 mapventure part 1.fsd" size="106732" crc="a13ffb19" sha1="0d537c94c54c2ba9fb626f3ef81a58635f5c6b22" offset="0" />
	4356	</dataarea>
	4357	</part>
	4358	<part name="flop2" interface="floppy_5_25">
	4359	<feature name="part_id" value="Part 2"/>
	4360	<dataarea name="flop" size="104940">
	4361	<rom name="311 mapventure part 2.fsd" size="104940" crc="aa5e5609" sha1="30659104edf7ed2257b743765d9deaed7e13dea7" offset="0" />
	4362	</dataarea>
	4363	</part>
	4364	</software>
	4365
	4366	<software name="aninumbr">
	4367	<description>Animated Numbers</description>
	4368	<year>198?</year>
	4369	<publisher>Sherston Software</publisher>
	4370	<part name="flop1" interface="floppy_5_25">
	4371	<dataarea name="flop" size="104946">
	4372	<rom name="312 animated numbers.fsd" size="104946" crc="d97a5ff8" sha1="03bdf36ee151ea7630d630e71648b80f7ad5a43b" offset="0" />
	4373	</dataarea>
	4374	</part>
	4375	</software>
	4376
	4377	<software name="typesett">
	4378	<description>Typesetter!</description>
	4379	<year>198?</year>
	4380	<publisher>Sherston Software</publisher>
	4381	<part name="flop1" interface="floppy_5_25">
	4382	<feature name="part_id" value="Startup Disk"/>
	4383	<dataarea name="flop" size="104948">
	4384	<rom name="314 typesetter startup disc.fsd" size="104948" crc="2489ed9c" sha1="864a14ee1d3d8d3cbc1ba2269849b085dccb7105" offset="0" />
	4385	</dataarea>
	4386	</part>
	4387	<part name="flop2" interface="floppy_5_25">
	4388	<feature name="part_id" value="User Disk"/>
	4389	<dataarea name="flop" size="104945">
	4390	<rom name="314 typesetter user disc.fsd" size="104945" crc="ac538429" sha1="c14cf40cd64c65bc5d96aca3c7c4641f2f16cc50" offset="0" />
	4391	</dataarea>
	4392	</part>
	4393	<part name="flop3" interface="floppy_5_25">
	4394	<feature name="part_id" value="Font Disk"/>
	4395	<dataarea name="flop" size="104945">
	4396	<rom name="314 typesetter font disc.fsd" size="104945" crc="8de73319" sha1="5d3dda7bd8495ec9f12c164103764e6ff2f4b975" offset="0" />
	4397	</dataarea>
	4398	</part>
	4399	<part name="flop4" interface="floppy_5_25">
	4400	<feature name="part_id" value="Font Disk II"/>
	4401	<dataarea name="flop" size="104948">
	4402	<rom name="314 typesetter font disc ii.fsd" size="104948" crc="9233d18a" sha1="f76720b5d42d5c9b973150367c3f24f58398a66d" offset="0" />
	4403	</dataarea>
	4404	</part>
	4405	</software>
	4406
	4407	<software name="osketchp">
	4408	<description>Ollie Octopus' Sketchpad</description>
	4409	<year>1983</year>
	4410	<publisher>Storm Software</publisher>
	4411	<part name="flop1" interface="floppy_5_25">
	4412	<dataarea name="flop" size="104954">
	4413	<rom name="315 ollie octopus' sketchpad.fsd" size="104954" crc="8352e2b8" sha1="8c9b1b7c9cfb4fbb651d94d0a0f2799aca7997e8" offset="0" />
	4414	</dataarea>
	4415	</part>
	4416	</software>
	4417
	4418	<software name="gtverbs">
	4419	<description>The Grammar Tree - Verbs &amp; Adverbs</description>
	4420	<year>1983</year>
	4421	<publisher>Sulis Software</publisher>
	4422	<part name="flop1" interface="floppy_5_25">
	4423	<dataarea name="flop" size="102364">
	4424	<rom name="259 thegrammartree-verbs&amp;adverbs.fsd" size="102364" crc="264f9b92" sha1="3c7120b87cf6374fa01f174362bf62e6089b3654" offset="0" />
	4425	</dataarea>
	4426	</part>
	4427	</software>
	4428
	4429	<software name="gtsenten">
	4430	<description>The Grammar Tree - Sentences</description>
	4431	<year>1983</year>
	4432	<publisher>Sulis Software</publisher>
	4433	<part name="flop1" interface="floppy_5_25">
	4434	<dataarea name="flop" size="104150">
	4435	<rom name="260 thegrammartree-sentences.fsd" size="104150" crc="cbf7ff57" sha1="299eb82358b3f02970f01b482e67ae71858ca51f" offset="0" />
	4436	</dataarea>
	4437	</part>
	4438	</software>
	4439
	4440	<software name="gtnouns">
	4441	<description>The Grammar Tree - Nouns &amp; Adjectives</description>
	4442	<year>1983</year>
	4443	<publisher>Sulis Software</publisher>
	4444	<part name="flop1" interface="floppy_5_25">
	4445	<dataarea name="flop" size="102367">
	4446	<rom name="261 thegrammartree-nouns&amp;adjectives.fsd" size="102367" crc="c3d75e80" sha1="d6e343bb1cdb3c218cde7809db6b6d1dd1dd2e5c" offset="0" />
	4447	</dataarea>
	4448	</part>
	4449	</software>
	4450
	4451	<software name="timetrav">
	4452	<description>Time Traveller</description>
	4453	<year>1983</year>
	4454	<publisher>Sulis Software</publisher>
	4455	<part name="flop1" interface="floppy_5_25">
	4456	<dataarea name="flop" size="104944">
	4457	<rom name="339 time traveller.fsd" size="104944" crc="8183b124" sha1="4a3f08b0f443fa3cf47e427d0a6d5d6e3e6e2991" offset="0" />
	4458	</dataarea>
	4459	</part>
	4460	</software>
	4461
	4462	</softwarelist>

trunk/hash/bbcm_cass.xml

r250251	r250252
62	62
63	63	<software name="welcome">
64	64	<description>Welcome</description>
65		<year>198?</year>
	65	<year>1986</year>
66	66	<publisher>BBC Soft</publisher>
67	67	<part name="cass1" interface="bbc_cass">
	68	<feature name="part_id" value="Side 1"/>
68	69	<dataarea name="cass" size="28803">
69	70	<rom name="welcome-bbcmaster-side1_bm.uef" size="28803" crc="29076f21" sha1="d56ddebc09166687e89fd1210d87a98ddaf37272" offset="0" />
70	71	</dataarea>
71	72	</part>
72	73	<part name="cass2" interface="bbc_cass">
	74	<feature name="part_id" value="Side 2"/>
73	75	<dataarea name="cass" size="38565">
74	76	<rom name="welcome-bbcmaster-side2_bm.uef" size="38565" crc="ac51d83c" sha1="c6cfd8ddbff42f983fbf0aa341cd49844025995b" offset="0" />
75	77	</dataarea>

trunk/hash/psx.xml

r250251	r250252
2	2	<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
3	3	<softwarelist name="psx" description="Sony Playstation CD-ROMs">
4	4
5		<!-- todo, reconvert original dumps using current CHDMAN version - Feb 2014 -->
	5	<!-- Interactive CD Sampler Discs-->
6	6
	7	<!-- size="364872255" crc="536126e5" -->
	8	<software name="intcdv1m">
	9	<description>Interactive CD Sampler Disc - Volume 01 (M Rated)</description>
	10	<year>1995</year>
	11	<publisher>SCEA</publisher>
	12	<part name="cdrom" interface="psx_cdrom">
	13	<diskarea name="cdrom">
	14	<disk name="Interactive CD Sampler Disc - Volume 1 (m rated)" sha1="4bc8e61f799ecd19c1b8207943eaab8359d34858"/>
	15	</diskarea>
	16	</part>
	17	</software>
	18
	19	<!-- size="428110417" crc="48bd3d35" -->
	20	<software name="intcdv2">
	21	<description>Interactive CD Sampler Disc - Volume 02</description>
	22	<year>1996</year>
	23	<publisher>SCEA</publisher>
	24	<part name="cdrom" interface="psx_cdrom">
	25	<diskarea name="cdrom">
	26	<disk name="Interactive CD Sampler Disc - Volume 2" sha1="5801f9972e483b9e2a7f316796b57b74d8baa5e7"/>
	27	</diskarea>
	28	</part>
	29	</software>
	30
	31	<!-- size="476195663" crc="fb8d356b" -->
	32	<software name="intcdv30">
	33	<description>Interactive CD Sampler Disc - Volume 03 (1.0)</description>
	34	<year>1996</year>
	35	<publisher>SCEA</publisher>
	36	<part name="cdrom" interface="psx_cdrom">
	37	<diskarea name="cdrom">
	38	<disk name="Interactive CD Sampler Disc - Volume 3 (1.0)" sha1="f82e72d70b10badb35a91a09950d0d89db50855c"/>
	39	</diskarea>
	40	</part>
	41	</software>
	42
	43	<!-- size="487436207" crc="336304eb" -->
	44	<software name="intcdv31">
	45	<description>Interactive CD Sampler Disc - Volume 03 (1.1)</description>
	46	<year>1996</year>
	47	<publisher>SCEA</publisher>
	48	<part name="cdrom" interface="psx_cdrom">
	49	<diskarea name="cdrom">
	50	<disk name="Interactive CD Sampler Disc - Volume 3 (1.1)" sha1="5f6fa89b8c9b31b3dabdc7ac06806bc721d2aa16"/>
	51	</diskarea>
	52	</part>
	53	</software>
	54
	55	<!-- size="487436203" crc="d96b31d2" -->
	56	<software name="intcdv32">
	57	<description>Interactive CD Sampler Disc - Volume 03 (1.2)</description>
	58	<year>1996</year>
	59	<publisher>SCEA</publisher>
	60	<part name="cdrom" interface="psx_cdrom">
	61	<diskarea name="cdrom">
	62	<disk name="Interactive CD Sampler Disc - Volume 3 (1.2)" sha1="20f261877d3f63bd9215ca791800417ff7287e46"/>
	63	</diskarea>
	64	</part>
	65	</software>
	66
	67	<!-- size="354903558" crc="67ca3059" -->
	68	<software name="intcdv4">
	69	<description>Interactive CD Sampler Disc - Volume 04</description>
	70	<year>1997</year>
	71	<publisher>SCEA</publisher>
	72	<part name="cdrom" interface="psx_cdrom">
	73	<diskarea name="cdrom">
	74	<disk name="Interactive CD Sampler Disc - Volume 4" sha1="c353a52e8b7831f11d3ce8ea771e865e9ba3431a"/>
	75	</diskarea>
	76	</part>
	77	</software>
	78
	79	<!-- size="291855185" crc="8119ed78" -->
	80	<software name="intcdv5">
	81	<description>Interactive CD Sampler Disc - Volume 05</description>
	82	<year>1997</year>
	83	<publisher>SCEA</publisher>
	84	<part name="cdrom" interface="psx_cdrom">
	85	<diskarea name="cdrom">
	86	<disk name="Interactive CD Sampler Disc - Volume 5" sha1="9aef2ff7583b61d24302a35831a25ed5549610e1"/>
	87	</diskarea>
	88	</part>
	89	</software>
	90
	91	<!-- size="427620748" crc="917b5f35" -->
	92	<software name="intcdv6">
	93	<description>Interactive CD Sampler Disc - Volume 06</description>
	94	<year>1998</year>
	95	<publisher>SCEA</publisher>
	96	<part name="cdrom" interface="psx_cdrom">
	97	<diskarea name="cdrom">
	98	<disk name="Interactive CD Sampler Disc - Volume 6" sha1="c35833fdd8a46016b3ccafa9ae08f68c10309737"/>
	99	</diskarea>
	100	</part>
	101	</software>
	102
	103	<!-- size="397092409" crc="17f17815" -->
	104	<software name="intcdv7">
	105	<description>Interactive CD Sampler Disc - Volume 07</description>
	106	<year>1998</year>
	107	<publisher>SCEA</publisher>
	108	<part name="cdrom" interface="psx_cdrom">
	109	<diskarea name="cdrom">
	110	<disk name="Interactive CD Sampler Disc - Volume 7" sha1="81db574e4599e022cfac938516cff29bb09d1388"/>
	111	</diskarea>
	112	</part>
	113	</software>
	114
	115	<!-- size="420000809" crc="91d8b335" -->
	116	<software name="intcdv8">
	117	<description>Interactive CD Sampler Disc - Volume 08</description>
	118	<year>1998</year>
	119	<publisher>SCEA</publisher>
	120	<part name="cdrom" interface="psx_cdrom">
	121	<diskarea name="cdrom">
	122	<disk name="Interactive CD Sampler Disc - Volume 8" sha1="7f23e2d284a104e6914d34527960567111914264"/>
	123	</diskarea>
	124	</part>
	125	</software>
	126
	127	<!-- size="389598196" crc="993e0ab1" -->
	128	<software name="intcdv9">
	129	<description>Interactive CD Sampler Disc - Volume 09</description>
	130	<year>1998</year>
	131	<publisher>SCEA</publisher>
	132	<part name="cdrom" interface="psx_cdrom">
	133	<diskarea name="cdrom">
	134	<disk name="Interactive CD Sampler Disc - Volume 9" sha1="286559ce34f06a7f2eb2b441e9188da0e158d107"/>
	135	</diskarea>
	136	</part>
	137	</software>
	138
	139	<!-- size="365007076" crc="5f5fd01f" -->
	140	<software name="intcdv10">
	141	<description>Interactive CD Sampler Disc - Volume 10</description>
	142	<year>1999</year>
	143	<publisher>SCEA</publisher>
	144	<part name="cdrom" interface="psx_cdrom">
	145	<diskarea name="cdrom">
	146	<disk name="Interactive CD Sampler Disc - Volume 10" sha1="8c414a1e26ac98d07f774cc8b16eb2fa8da0ca61"/>
	147	</diskarea>
	148	</part>
	149	</software>
	150
	151	<!-- size="272935197" crc="82e6fdf0" -->
	152	<software name="intcdv11">
	153	<description>Interactive CD Sampler Disc - Volume 11</description>
	154	<year>1999</year>
	155	<publisher>SCEA</publisher>
	156	<part name="cdrom" interface="psx_cdrom">
	157	<diskarea name="cdrom">
	158	<disk name="Interactive CD Sampler Disc - Volume 11" sha1="3029004840d98c2789d2a0d93bdd762b3c56df0f"/>
	159	</diskarea>
	160	</part>
	161	</software>
	162
	163	<!-- size="149681460" crc="99551669" -->
	164	<software name="intcdtru">
	165	<description>Toys R Us - Interactive CD Sampler Disc</description>
	166	<year>1998</year>
	167	<publisher>SCEA</publisher>
	168	<part name="cdrom" interface="psx_cdrom">
	169	<diskarea name="cdrom">
	170	<disk name="Toys R Us - Interactive CD Sampler Disc" sha1="4abae391a7ad1e38c2ee7cbd7401caebcf091df3"/>
	171	</diskarea>
	172	</part>
	173	</software>
	174
	175	<!-- size="93662349" crc="59bd7278" -->
	176	<software name="intcdff7">
	177	<description>Final Fantasy VII Interactive Sampler CD</description>
	178	<year>1996</year>
	179	<publisher>SCEA</publisher>
	180	<part name="cdrom" interface="psx_cdrom">
	181	<diskarea name="cdrom">
	182	<disk name="Final Fantasy VII Interactive Sampler CD" sha1="0a88439b32be5172e79847f79ae33b6ba22b1de6"/>
	183	</diskarea>
	184	</part>
	185	</software>
	186
7	187	<!--
8	188	***********************
9	189	NON-REDUMP Rips
r250251	r250252
27	207	that subtle errors are introduced either in this procedure, or in the original creation of the mdf/mds/cdi image. These should
28	208	be verified with the original media, and are marked as bad dumps.
29	209	-->
	210	<!-- todo, reconvert original dumps using current CHDMAN version - Feb 2014 -->
30	211
31
32	212	<!-- Pirate disks -->
33	213
34	214	<software name="ddrdmp" supported="no">

trunk/makefile

r250251	r250252
674	674	$(wildcard src/osd/$(OSD)/$(OSD).mak) \
675	675	$(wildcard src/$(TARGET)/$(SUBTARGET).mak)
676	676
	677	ifeq ($(SUBTARGET),mame)
	678	SCRIPTS += scripts/target/$(TARGET)/arcade.lua
	679	SCRIPTS += scripts/target/$(TARGET)/mess.lua
	680	endif
	681
677	682	ifndef SOURCES
678	683	SCRIPTS += scripts/target/$(TARGET)/$(SUBTARGET).lua
679	684	endif
r250251	r250252
841	846	vs2015: generate
842	847	$(SILENT) $(GENIE) $(PARAMS) vs2015
843	848
	849	vs2015_intel: generate
	850	$(SILENT) $(GENIE) $(PARAMS) --vs=intel-15 vs2015
	851
	852	vs2015_xp: generate
	853	$(SILENT) $(GENIE) $(PARAMS) --vs=vs2013-xp vs2015
	854
	855	vs2015_clang: generate
	856	$(SILENT) $(GENIE) $(PARAMS) --vs=vs2013-clang vs2015
	857
	858	vs2015_winrt: generate
	859	$(SILENT) $(GENIE) $(PARAMS) --vs=winstore81 vs2015
	860
844	861	android-arm: generate
845	862	ifndef ANDROID_NDK_ARM
846	863	$(error ANDROID_NDK_ARM is not set)

trunk/scripts/genie.lua

r250251	r250252
532	532	os.outputof( PYTHON .. " " .. MAME_DIR .. "scripts/build/makedep.py " .. MAME_DIR .. " " .. _OPTIONS["SOURCES"] .. " drivers " .. _OPTIONS["subtarget"] .. " > ".. GEN_DIR  .. _OPTIONS["target"] .. "/" .. _OPTIONS["subtarget"].."/drivlist.cpp")
533	533	end
534	534	configuration { "gmake" }
	535	defines {
	536	"nullptr=NULL" -- getting ready for C++11
	537	}
535	538	flags {
536	539	"SingleOutputDir",
537	540	}
r250251	r250252
1254	1257	"/Qwd1478",          -- warning #1478: function "xxx" (declared at line yyy of "zzz") was declared deprecated
1255	1258	"/Qwd1879",          -- warning #1879: unimplemented pragma ignored
1256	1259	"/Qwd3291",          -- warning #3291: invalid narrowing conversion from "double" to "int"
1257		"/Qwd1195",
1258		"/Qwd1786",
1259		"/Qwd592", -- For lua, false positive?
	1260	"/Qwd1195",          -- error #1195: conversion from integer to smaller pointer
	1261	"/Qwd47",            -- error #47: incompatible redefinition of macro "xxx"
	1262	"/Qwd265",            -- error #265: floating-point operation result is out of range
	1263	-- these occur on a release build, while we can increase the size limits instead some of the files do require extreme amounts
	1264	"/Qwd11074",         -- remark #11074: Inlining inhibited by limit max-size  / remark #11074: Inlining inhibited by limit max-total-size
	1265	"/Qwd11075",         -- remark #11075: To get full report use -Qopt-report:4 -Qopt-report-phase ipo
1260	1266	}
1261	1267	end
1262	1268

trunk/scripts/src/3rdparty.lua

r250251	r250252
1	1	-- license:BSD-3-Clause
2	2	-- copyright-holders:MAMEdev Team
3	3
	4	---------------------------------------------------------------------------
	5	--
	6	--   3rdparty.lua
	7	--
	8	--   Library objects for all 3rdparty sources
	9	--
	10	---------------------------------------------------------------------------
	11
4	12	--------------------------------------------------
5	13	-- expat library objects
6	14	--------------------------------------------------
r250251	r250252
16	24	"/wd4127", -- warning C4127: conditional expression is constant
17	25	"/wd4244", -- warning C4244: 'argument' : conversion from 'xxx' to 'xxx', possible loss of data
18	26	}
	27	if _OPTIONS["vs"]=="intel-15" then
	28	buildoptions {
	29	"/Qwd111",           -- remark #111: statement is unreachable
	30	"/Qwd1879",          -- warning #1879: unimplemented pragma ignored
	31	"/Qwd2557",          -- remark #2557: comparison between signed and unsigned operands
	32	"/Qwd869",           -- remark #869: parameter "xxx" was never referenced
	33	}
	34	end
19	35	configuration { "vs2015" }
20	36	buildoptions {
21	37	"/wd4456", -- warning C4456: declaration of 'xxx' hides previous local declaration
r250251	r250252
48	64	"/wd4127", -- warning C4127: conditional expression is constant
49	65	"/wd4244", -- warning C4244: 'argument' : conversion from 'xxx' to 'xxx', possible loss of data
50	66	}
51
	67	if _OPTIONS["vs"]=="intel-15" then
	68	buildoptions {
	69	"/Qwd111",           -- remark #111: statement is unreachable
	70	"/Qwd280",           -- remark #280: selector expression is constant
	71	}
	72	end
52	73	configuration "Debug"
53	74	defines {
54	75	"verbose=-1",
r250251	r250252
98	119	includedirs {
99	120	MAME_DIR .. "src/osd",
100	121	}
101
	122	if _OPTIONS["vs"]=="intel-15" then
	123	buildoptions {
	124	"/Qwd2557",          -- remark #2557: comparison between signed and unsigned operands
	125	}
	126	end
102	127	files {
103	128	MAME_DIR .. "3rdparty/softfloat/softfloat.c",
104	129	MAME_DIR .. "3rdparty/softfloat/fsincos.c",
r250251	r250252
120	145	"/wd4127", -- warning C4127: conditional expression is constant
121	146	"/wd4244", -- warning C4244: 'argument' : conversion from 'xxx' to 'xxx', possible loss of data
122	147	}
	148	if _OPTIONS["vs"]=="intel-15" then
	149	buildoptions {
	150	"/Qwd869",           -- remark #869: parameter "xxx" was never referenced
	151	}
	152	end
123	153
124	154	configuration { }
125	155
r250251	r250252
193	223	"/wd4100", -- warning C4100: 'xxx' : unreferenced formal parameter
194	224	"/wd4702", -- warning C4702: unreachable code
195	225	}
	226	if _OPTIONS["vs"]=="intel-15" then
	227	buildoptions {
	228	"/Qwd111",           -- remark #111: statement is unreachable
	229	"/Qwd177",           -- remark #177: function "xxx" was declared but never referenced
	230	"/Qwd181",           -- remark #181: argument of type "UINT32={unsigned int}" is incompatible with format "%d", expecting argument of type "int"
	231	"/Qwd188",           -- error #188: enumerated type mixed with another type
	232	"/Qwd869",           -- remark #869: parameter "xxx" was never referenced
	233	}
	234	end
196	235
197	236	configuration { "vs2015" }
198	237	buildoptions {
r250251	r250252
261	300	buildoptions {
262	301	"/wd4100", -- warning C4100: 'xxx' : unreferenced formal parameter
263	302	}
	303	if _OPTIONS["vs"]=="intel-15" then
	304	buildoptions {
	305	"/Qwd869",           -- remark #869: parameter "xxx" was never referenced
	306	}
	307	end
264	308	configuration { "vs2015" }
265	309	buildoptions {
266	310	"/wd4456", -- warning C4456: declaration of 'xxx' hides previous local declaration
r250251	r250252
318	362	"/wd4702", -- warning C4702: unreachable code
319	363	"/wd4310", -- warning C4310: cast truncates constant value
320	364	}
321
	365	if _OPTIONS["vs"]=="intel-15" then
	366	buildoptions {
	367	"/Qwd592", -- error #592: variable "xxx" is used before its value is set
	368	}
	369	end
322	370	configuration { }
323	371	defines {
324	372	"LUA_COMPAT_ALL",
r250251	r250252
459	507	"/wd4100", -- warning C4100: 'xxx' : unreferenced formal parameter
460	508	"/wd4706", -- warning C4706: assignment within conditional expression
461	509	}
	510	if _OPTIONS["vs"]=="intel-15" then
	511	buildoptions {
	512	"/Qwd869",           -- remark #869: parameter "xxx" was never referenced
	513	"/Qwd2557",          -- remark #2557: comparison between signed and unsigned operands
	514	}
	515	end
462	516
463	517	configuration { "vs2015" }
464	518	buildoptions {
r250251	r250252
513	567	"/wd4244", -- warning C4244: 'argument' : conversion from 'xxx' to 'xxx', possible loss of data
514	568	"/wd4706", -- warning C4706: assignment within conditional expression
515	569	}
	570	if _OPTIONS["vs"]=="intel-15" then
	571	buildoptions {
	572	"/Qwd188",           -- error #188: enumerated type mixed with another type
	573	"/Qwd344",           -- remark #344: typedef name has already been declared (with same type)
	574	"/Qwd869",           -- remark #869: parameter "xxx" was never referenced
	575	"/Qwd2557",          -- remark #2557: comparison between signed and unsigned operands
	576	}
	577	end
516	578
517	579	configuration { "vs2015" }
518	580	buildoptions {
r250251	r250252
587	649	"/wd4611", -- warning C4611: interaction between '_setjmp' and C++ object destruction is non-portable
588	650	"/wd4310", -- warning C4310: cast truncates constant value
589	651	}
590
	652	if _OPTIONS["vs"]=="intel-15" then
	653	buildoptions {
	654	"/Qwd906",           -- message #906: effect of this "#pragma pack" directive is local to function "xxx"
	655	"/Qwd1879",          -- warning #1879: unimplemented pragma ignored
	656	"/Qwd82",            -- remark #82: storage class is not first
	657	}
	658	end
591	659	configuration { }
592	660
593	661	includedirs {
r250251	r250252
706	774	"/wd4189", -- warning C4189: 'xxx' : local variable is initialized but not referenced
707	775	"/wd4127", -- warning C4127: conditional expression is constant
708	776	}
709
	777	if _OPTIONS["vs"]=="intel-15" then
	778	buildoptions {
	779	"/Qwd869",           -- remark #869: parameter "xxx" was never referenced
	780	"/Qwd1478",          -- warning #1478: function "xxx" (declared at line yyy of "zzz") was declared deprecated
	781	"/Qwd2544",          -- message #2544: empty dependent statement in if-statement
	782	"/Qwd1879",          -- warning #1879: unimplemented pragma ignored
	783	}
	784	end
710	785	configuration { "vs2015" }
711	786	buildoptions {
712	787	"/wd4456", -- warning C4456: declaration of 'xxx' hides previous local declaration
r250251	r250252
848	923	"-Wno-unused-variable",
849	924	}
850	925
	926	configuration { "vs*" }
	927	if _OPTIONS["vs"]=="intel-15" then
	928	buildoptions {
	929	"/Qwd1195",          -- error #1195: conversion from integer to smaller pointer
	930	}
	931	end
	932
851	933	configuration { }
852	934
853	935	includedirs {

trunk/scripts/src/bus.lua

r250251	r250252
2205	2205	MAME_DIR .. "src/devices/bus/cpc/magicsound.h",
2206	2206	MAME_DIR .. "src/devices/bus/cpc/doubler.cpp",
2207	2207	MAME_DIR .. "src/devices/bus/cpc/doubler.h",
	2208	MAME_DIR .. "src/devices/bus/cpc/transtape.cpp",
	2209	MAME_DIR .. "src/devices/bus/cpc/transtape.h",
2208	2210	}
2209	2211	end
2210	2212

trunk/scripts/src/cpu.lua

r250251	r250252
90	90	MAME_DIR .. "src/devices/cpu/arcompact/arcompact.cpp",
91	91	MAME_DIR .. "src/devices/cpu/arcompact/arcompact.h",
92	92	MAME_DIR .. "src/devices/cpu/arcompact/arcompact_execute.cpp",
	93	MAME_DIR .. "src/devices/cpu/arcompact/arcompactdasm_dispatch.h",
	94	MAME_DIR .. "src/devices/cpu/arcompact/arcompactdasm_ops.h",
	95	MAME_DIR .. "src/devices/cpu/arcompact/arcompact_common.h",
93	96	}
94	97	dependency {
95	98	{ MAME_DIR .. "src/devices/cpu/arcompact/arcompact.cpp",        GEN_DIR .. "emu/cpu/arcompact/arcompact.inc" },
r250251	r250252
134	137	MAME_DIR .. "src/devices/cpu/arm7/arm7ops.cpp",
135	138	MAME_DIR .. "src/devices/cpu/arm7/lpc210x.cpp",
136	139	MAME_DIR .. "src/devices/cpu/arm7/lpc210x.h",
	140	MAME_DIR .. "src/devices/cpu/arm7/arm7core.h",
	141	MAME_DIR .. "src/devices/cpu/arm7/arm7core.inc",
	142	MAME_DIR .. "src/devices/cpu/arm7/arm7drc.inc",
	143	MAME_DIR .. "src/devices/cpu/arm7/arm7help.h",
	144	MAME_DIR .. "src/devices/cpu/arm7/arm7tdrc.inc",
137	145	}
138	146	end
139	147
r250251	r250252
199	207	files {
200	208	MAME_DIR .. "src/devices/cpu/adsp2100/adsp2100.cpp",
201	209	MAME_DIR .. "src/devices/cpu/adsp2100/adsp2100.h",
	210	MAME_DIR .. "src/devices/cpu/adsp2100/2100ops.inc",
202	211	}
203	212	end
204	213
r250251	r250252
215	224	files {
216	225	MAME_DIR .. "src/devices/cpu/sharc/sharc.cpp",
217	226	MAME_DIR .. "src/devices/cpu/sharc/sharc.h",
	227	MAME_DIR .. "src/devices/cpu/sharc/compute.inc",
	228	MAME_DIR .. "src/devices/cpu/sharc/sharcdma.inc",
	229	MAME_DIR .. "src/devices/cpu/sharc/sharcdsm.h",
	230	MAME_DIR .. "src/devices/cpu/sharc/sharcmem.inc",
	231	MAME_DIR .. "src/devices/cpu/sharc/sharcops.h",
	232	MAME_DIR .. "src/devices/cpu/sharc/sharcops.inc",
218	233	}
219	234	end
220	235
r250251	r250252
247	262	files {
248	263	MAME_DIR .. "src/devices/cpu/dsp16/dsp16.cpp",
249	264	MAME_DIR .. "src/devices/cpu/dsp16/dsp16.h",
	265	MAME_DIR .. "src/devices/cpu/dsp16/dsp16ops.inc",
250	266	}
251	267	end
252	268
r250251	r250252
263	279	files {
264	280	MAME_DIR .. "src/devices/cpu/dsp32/dsp32.cpp",
265	281	MAME_DIR .. "src/devices/cpu/dsp32/dsp32.h",
	282	MAME_DIR .. "src/devices/cpu/dsp32/dsp32ops.inc",
266	283	}
267	284	end
268	285
r250251	r250252
295	312	files {
296	313	MAME_DIR .. "src/devices/cpu/am29000/am29000.cpp",
297	314	MAME_DIR .. "src/devices/cpu/am29000/am29000.h",
	315	MAME_DIR .. "src/devices/cpu/am29000/am29ops.h",
298	316	}
299	317	end
300	318
r250251	r250252
373	391	MAME_DIR .. "src/devices/cpu/e0c6200/e0c6200.h",
374	392	MAME_DIR .. "src/devices/cpu/e0c6200/e0c6s46.cpp",
375	393	MAME_DIR .. "src/devices/cpu/e0c6200/e0c6s46.h",
	394	MAME_DIR .. "src/devices/cpu/e0c6200/e0c6200op.inc",
376	395	}
377	396	end
378	397
r250251	r250252
405	424	files {
406	425	MAME_DIR .. "src/devices/cpu/cop400/cop400.cpp",
407	426	MAME_DIR .. "src/devices/cpu/cop400/cop400.h",
	427	MAME_DIR .. "src/devices/cpu/cop400/cop400op.inc",
408	428	}
409	429	end
410	430
r250251	r250252
455	475	files {
456	476	MAME_DIR .. "src/devices/cpu/t11/t11.cpp",
457	477	MAME_DIR .. "src/devices/cpu/t11/t11.h",
	478	MAME_DIR .. "src/devices/cpu/t11/t11ops.inc",
	479	MAME_DIR .. "src/devices/cpu/t11/t11table.inc",
458	480	}
459	481	end
460	482
r250251	r250252
508	530	MAME_DIR .. "src/devices/cpu/g65816/g65816o2.cpp",
509	531	MAME_DIR .. "src/devices/cpu/g65816/g65816o3.cpp",
510	532	MAME_DIR .. "src/devices/cpu/g65816/g65816o4.cpp",
	533	MAME_DIR .. "src/devices/cpu/g65816/g65816cm.h",
	534	MAME_DIR .. "src/devices/cpu/g65816/g65816ds.h",
	535	MAME_DIR .. "src/devices/cpu/g65816/g65816op.h",
511	536	}
512	537	end
513	538
r250251	r250252
586	611	files {
587	612	MAME_DIR .. "src/devices/cpu/hcd62121/hcd62121.cpp",
588	613	MAME_DIR .. "src/devices/cpu/hcd62121/hcd62121.h",
	614	MAME_DIR .. "src/devices/cpu/hcd62121/hcd62121_ops.h",
589	615	}
590	616	end
591	617
r250251	r250252
620	646	MAME_DIR .. "src/devices/cpu/sh2/sh2.cpp",
621	647	MAME_DIR .. "src/devices/cpu/sh2/sh2.h",
622	648	MAME_DIR .. "src/devices/cpu/sh2/sh2fe.cpp",
	649	--MAME_DIR .. "src/devices/cpu/sh2/sh2comn.cpp",
	650	--MAME_DIR .. "src/devices/cpu/sh2/sh2comn.h",
	651	--MAME_DIR .. "src/devices/cpu/sh2/sh2drc.cpp",
623	652	}
624	653	end
625	654
r250251	r250252
644	673	MAME_DIR .. "src/devices/cpu/sh4/sh4tmu.h",
645	674	MAME_DIR .. "src/devices/cpu/sh4/sh4dmac.cpp",
646	675	MAME_DIR .. "src/devices/cpu/sh4/sh4dmac.h",
	676	MAME_DIR .. "src/devices/cpu/sh4/sh4regs.h",
647	677	}
648	678	end
649	679
r250251	r250252
692	722	files {
693	723	MAME_DIR .. "src/devices/cpu/e132xs/e132xs.cpp",
694	724	MAME_DIR .. "src/devices/cpu/e132xs/e132xs.h",
	725	MAME_DIR .. "src/devices/cpu/e132xs/e132xsop.inc",
695	726	}
696	727	end
697	728
r250251	r250252
772	803	files {
773	804	MAME_DIR .. "src/devices/cpu/i8085/i8085.cpp",
774	805	MAME_DIR .. "src/devices/cpu/i8085/i8085.h",
	806	MAME_DIR .. "src/devices/cpu/i8085/i8085cpu.h",
775	807	}
776	808	end
777	809
r250251	r250252
823	855	files {
824	856	MAME_DIR .. "src/devices/cpu/mcs51/mcs51.cpp",
825	857	MAME_DIR .. "src/devices/cpu/mcs51/mcs51.h",
	858	MAME_DIR .. "src/devices/cpu/mcs51/mcs51ops.inc",
826	859	}
827	860	end
828	861
r250251	r250252
872	905	MAME_DIR .. "src/devices/cpu/i86/i186.h",
873	906	MAME_DIR .. "src/devices/cpu/i86/i286.cpp",
874	907	MAME_DIR .. "src/devices/cpu/i86/i286.h",
	908	MAME_DIR .. "src/devices/cpu/i86/i86inline.h",
875	909	}
876	910	end
877	911
r250251	r250252
883	917	files {
884	918	MAME_DIR .. "src/devices/cpu/i386/i386.cpp",
885	919	MAME_DIR .. "src/devices/cpu/i386/i386.h",
	920	MAME_DIR .. "src/devices/cpu/i386/cycles.h",
	921	MAME_DIR .. "src/devices/cpu/i386/i386op16.inc",
	922	MAME_DIR .. "src/devices/cpu/i386/i386op32.inc",
	923	MAME_DIR .. "src/devices/cpu/i386/i386ops.h",
	924	MAME_DIR .. "src/devices/cpu/i386/i386ops.inc",
	925	MAME_DIR .. "src/devices/cpu/i386/i386priv.h",
	926	MAME_DIR .. "src/devices/cpu/i386/i486ops.inc",
	927	MAME_DIR .. "src/devices/cpu/i386/pentops.inc",
	928	MAME_DIR .. "src/devices/cpu/i386/x87ops.inc",
886	929	}
887	930	end
888	931
r250251	r250252
899	942	files {
900	943	MAME_DIR .. "src/devices/cpu/i860/i860.cpp",
901	944	MAME_DIR .. "src/devices/cpu/i860/i860.h",
	945	--MAME_DIR .. "src/devices/cpu/i860/i860dasm.cpp",
	946	MAME_DIR .. "src/devices/cpu/i860/i860dec.inc",
902	947	}
903	948	end
904	949
r250251	r250252
914	959	if (CPUS["I960"]~=null) then
915	960	files {
916	961	MAME_DIR .. "src/devices/cpu/i960/i960.cpp",
917		MAME_DIR .. "src/devices/cpu/i960/i960.h",
	962	MAME_DIR .. "src/devices/cpu/i960/i960.h",
918	963	}
919	964	end
920	965
921	966	if (CPUS["I960"]~=null or _OPTIONS["with-tools"]) then
922	967	table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/i960/i960dis.cpp")
	968	table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/i960/i960dis.h")
923	969	end
924	970
925	971	--------------------------------------------------
r250251	r250252
931	977	files {
932	978	MAME_DIR .. "src/devices/cpu/lh5801/lh5801.cpp",
933	979	MAME_DIR .. "src/devices/cpu/lh5801/lh5801.h",
	980	MAME_DIR .. "src/devices/cpu/lh5801/5801tbl.inc",
934	981	}
935	982	end
936	983
r250251	r250252
1011	1058	files {
1012	1059	MAME_DIR .. "src/devices/cpu/pic16c5x/pic16c5x.cpp",
1013	1060	MAME_DIR .. "src/devices/cpu/pic16c5x/pic16c5x.h",
	1061	--MAME_DIR .. "src/devices/cpu/pic16c5x/dis16c5x.cpp",
1014	1062	}
1015	1063	end
1016	1064
r250251	r250252
1027	1075	files {
1028	1076	MAME_DIR .. "src/devices/cpu/pic16c62x/pic16c62x.cpp",
1029	1077	MAME_DIR .. "src/devices/cpu/pic16c62x/pic16c62x.h",
	1078	--MAME_DIR .. "src/devices/cpu/pic16c62x/dis16c62x.cpp",
1030	1079	}
1031	1080	end
1032	1081
r250251	r250252
1080	1129	MAME_DIR .. "src/devices/cpu/psx/rcnt.h",
1081	1130	MAME_DIR .. "src/devices/cpu/psx/sio.cpp",
1082	1131	MAME_DIR .. "src/devices/cpu/psx/sio.h",
	1132	--MAME_DIR .. "src/devices/cpu/psx/dismips.cpp",
1083	1133	}
1084	1134	end
1085	1135
r250251	r250252
1119	1169	MAME_DIR .. "src/devices/cpu/m37710/m37710o1.cpp",
1120	1170	MAME_DIR .. "src/devices/cpu/m37710/m37710o2.cpp",
1121	1171	MAME_DIR .. "src/devices/cpu/m37710/m37710o3.cpp",
	1172	MAME_DIR .. "src/devices/cpu/m37710/m37710cm.h",
	1173	MAME_DIR .. "src/devices/cpu/m37710/m37710il.h",
	1174	MAME_DIR .. "src/devices/cpu/m37710/m37710op.h",
	1175	MAME_DIR .. "src/devices/cpu/m37710/m7700ds.h",
1122	1176	}
1123	1177	end
1124	1178
r250251	r250252
1226	1280	files {
1227	1281	MAME_DIR .. "src/devices/cpu/m6800/m6800.cpp",
1228	1282	MAME_DIR .. "src/devices/cpu/m6800/m6800.h",
	1283	MAME_DIR .. "src/devices/cpu/m6800/6800ops.inc",
	1284	MAME_DIR .. "src/devices/cpu/m6800/6800tbl.inc",
1229	1285	}
1230	1286	end
1231	1287
r250251	r250252
1242	1298	files {
1243	1299	MAME_DIR .. "src/devices/cpu/m6805/m6805.cpp",
1244	1300	MAME_DIR .. "src/devices/cpu/m6805/m6805.h",
	1301	MAME_DIR .. "src/devices/cpu/m6805/6805ops.inc",
1245	1302	}
1246	1303	end
1247	1304
r250251	r250252
1264	1321	MAME_DIR .. "src/devices/cpu/m6809/hd6309.h",
1265	1322	MAME_DIR .. "src/devices/cpu/m6809/konami.cpp",
1266	1323	MAME_DIR .. "src/devices/cpu/m6809/konami.h",
	1324	MAME_DIR .. "src/devices/cpu/m6809/m6809inl.h",
1267	1325	}
1268	1326
1269	1327	dependency {
r250251	r250252
1294	1352	files {
1295	1353	MAME_DIR .. "src/devices/cpu/mc68hc11/mc68hc11.cpp",
1296	1354	MAME_DIR .. "src/devices/cpu/mc68hc11/mc68hc11.h",
	1355	MAME_DIR .. "src/devices/cpu/mc68hc11/hc11ops.h",
	1356	MAME_DIR .. "src/devices/cpu/mc68hc11/hc11ops.inc",
1297	1357	}
1298	1358	end
1299	1359
r250251	r250252
1312	1372	MAME_DIR .. "src/devices/cpu/m68000/m68kcpu.h",
1313	1373	MAME_DIR .. "src/devices/cpu/m68000/m68kops.cpp",
1314	1374	MAME_DIR .. "src/devices/cpu/m68000/m68kops.h",
	1375	MAME_DIR .. "src/devices/cpu/m68000/m68000.h",
	1376	MAME_DIR .. "src/devices/cpu/m68000/m68kfpu.inc",
	1377	--MAME_DIR .. "src/devices/cpu/m68000/m68kmake.cpp",
	1378	MAME_DIR .. "src/devices/cpu/m68000/m68kmmu.h",
	1379	--MAME_DIR .. "src/devices/cpu/m68000/m68k_in.cpp",
1315	1380	}
1316	1381	end
1317	1382
r250251	r250252
1332	1397	MAME_DIR .. "src/devices/cpu/dsp56k/dsp56mem.h",
1333	1398	MAME_DIR .. "src/devices/cpu/dsp56k/dsp56pcu.cpp",
1334	1399	MAME_DIR .. "src/devices/cpu/dsp56k/dsp56pcu.h",
	1400	MAME_DIR .. "src/devices/cpu/dsp56k/dsp56def.h",
	1401	MAME_DIR .. "src/devices/cpu/dsp56k/dsp56ops.inc",
	1402	MAME_DIR .. "src/devices/cpu/dsp56k/inst.h",
	1403	MAME_DIR .. "src/devices/cpu/dsp56k/opcode.h",
	1404	MAME_DIR .. "src/devices/cpu/dsp56k/pmove.h",
	1405	MAME_DIR .. "src/devices/cpu/dsp56k/tables.h",
1335	1406	}
1336	1407	end
1337	1408
r250251	r250252
1376	1447	MAME_DIR .. "src/devices/cpu/powerpc/ppcfe.cpp",
1377	1448	MAME_DIR .. "src/devices/cpu/powerpc/ppcfe.h",
1378	1449	MAME_DIR .. "src/devices/cpu/powerpc/ppcdrc.cpp",
	1450
	1451	--MAME_DIR .. "src/devices/cpu/powerpc/drc_ops.cpp",
	1452	MAME_DIR .. "src/devices/cpu/powerpc/drc_ops.h",
	1453	--MAME_DIR .. "src/devices/cpu/powerpc/ppc.cpp",
	1454	MAME_DIR .. "src/devices/cpu/powerpc/ppc.h",
	1455	MAME_DIR .. "src/devices/cpu/powerpc/ppc403.inc",
	1456	MAME_DIR .. "src/devices/cpu/powerpc/ppc602.inc",
	1457	MAME_DIR .. "src/devices/cpu/powerpc/ppc603.inc",
	1458	MAME_DIR .. "src/devices/cpu/powerpc/ppc_mem.inc",
	1459	MAME_DIR .. "src/devices/cpu/powerpc/ppc_ops.h",
	1460	MAME_DIR .. "src/devices/cpu/powerpc/ppc_ops.inc",
1379	1461	}
1380	1462	end
1381	1463
r250251	r250252
1393	1475	files {
1394	1476	MAME_DIR .. "src/devices/cpu/nec/nec.cpp",
1395	1477	MAME_DIR .. "src/devices/cpu/nec/nec.h",
	1478	MAME_DIR .. "src/devices/cpu/nec/necea.h",
	1479	MAME_DIR .. "src/devices/cpu/nec/necinstr.h",
	1480	MAME_DIR .. "src/devices/cpu/nec/necinstr.inc",
	1481	MAME_DIR .. "src/devices/cpu/nec/necmacro.h",
	1482	MAME_DIR .. "src/devices/cpu/nec/necmodrm.h",
	1483	MAME_DIR .. "src/devices/cpu/nec/necpriv.h",
	1484	MAME_DIR .. "src/devices/cpu/nec/v25instr.h",
	1485	MAME_DIR .. "src/devices/cpu/nec/v25instr.inc",
	1486	MAME_DIR .. "src/devices/cpu/nec/v25priv.h",
1396	1487	MAME_DIR .. "src/devices/cpu/nec/v25.cpp",
1397	1488	MAME_DIR .. "src/devices/cpu/nec/v25.h",
1398	1489	MAME_DIR .. "src/devices/cpu/nec/v25sfr.cpp",
r250251	r250252
1425	1516	files {
1426	1517	MAME_DIR .. "src/devices/cpu/v60/v60.cpp",
1427	1518	MAME_DIR .. "src/devices/cpu/v60/v60.h",
	1519	MAME_DIR .. "src/devices/cpu/v60/am.inc",
	1520	MAME_DIR .. "src/devices/cpu/v60/am1.inc",
	1521	MAME_DIR .. "src/devices/cpu/v60/am2.inc",
	1522	MAME_DIR .. "src/devices/cpu/v60/am3.inc",
	1523	MAME_DIR .. "src/devices/cpu/v60/op12.inc",
	1524	MAME_DIR .. "src/devices/cpu/v60/op2.inc",
	1525	MAME_DIR .. "src/devices/cpu/v60/op3.inc",
	1526	MAME_DIR .. "src/devices/cpu/v60/op4.inc",
	1527	MAME_DIR .. "src/devices/cpu/v60/op5.inc",
	1528	MAME_DIR .. "src/devices/cpu/v60/op6.inc",
	1529	MAME_DIR .. "src/devices/cpu/v60/op7a.inc",
	1530	MAME_DIR .. "src/devices/cpu/v60/optable.inc",
1428	1531	}
1429	1532	end
1430	1533
r250251	r250252
1475	1578	MAME_DIR .. "src/devices/cpu/upd7810/upd7810.h",
1476	1579	MAME_DIR .. "src/devices/cpu/upd7810/upd7810_opcodes.cpp",
1477	1580	MAME_DIR .. "src/devices/cpu/upd7810/upd7810_table.cpp",
	1581	MAME_DIR .. "src/devices/cpu/upd7810/upd7810_macros.h",
1478	1582	}
1479	1583	end
1480	1584
r250251	r250252
1508	1612	files {
1509	1613	MAME_DIR .. "src/devices/cpu/minx/minx.cpp",
1510	1614	MAME_DIR .. "src/devices/cpu/minx/minx.h",
	1615	MAME_DIR .. "src/devices/cpu/minx/minxfunc.h",
	1616	MAME_DIR .. "src/devices/cpu/minx/minxopce.h",
	1617	MAME_DIR .. "src/devices/cpu/minx/minxopcf.h",
	1618	MAME_DIR .. "src/devices/cpu/minx/minxops.h",
1511	1619	}
1512	1620	end
1513	1621
r250251	r250252
1557	1665	MAME_DIR .. "src/devices/cpu/rsp/vsub.h",
1558	1666	MAME_DIR .. "src/devices/cpu/rsp/vsubc.h",
1559	1667	MAME_DIR .. "src/devices/cpu/rsp/vxor.h",
	1668	MAME_DIR .. "src/devices/cpu/rsp/rspdiv.h",
1560	1669	}
1561	1670	end
1562	1671
r250251	r250252
1589	1698	files {
1590	1699	MAME_DIR .. "src/devices/cpu/saturn/saturn.cpp",
1591	1700	MAME_DIR .. "src/devices/cpu/saturn/saturn.h",
	1701	MAME_DIR .. "src/devices/cpu/saturn/satops.inc",
	1702	MAME_DIR .. "src/devices/cpu/saturn/sattable.inc",
1592	1703	}
1593	1704	end
1594	1705
r250251	r250252
1624	1735	files {
1625	1736	MAME_DIR .. "src/devices/cpu/sm8500/sm8500.cpp",
1626	1737	MAME_DIR .. "src/devices/cpu/sm8500/sm8500.h",
	1738	MAME_DIR .. "src/devices/cpu/sm8500/sm85ops.h",
1627	1739	}
1628	1740	end
1629	1741
r250251	r250252
1640	1752	files {
1641	1753	MAME_DIR .. "src/devices/cpu/s2650/s2650.cpp",
1642	1754	MAME_DIR .. "src/devices/cpu/s2650/s2650.h",
	1755	MAME_DIR .. "src/devices/cpu/s2650/s2650cpu.h",
1643	1756	}
1644	1757	end
1645	1758
r250251	r250252
1656	1769	files {
1657	1770	MAME_DIR .. "src/devices/cpu/sc61860/sc61860.cpp",
1658	1771	MAME_DIR .. "src/devices/cpu/sc61860/sc61860.h",
	1772	--MAME_DIR .. "src/devices/cpu/sc61860/readpc.cpp",
	1773	MAME_DIR .. "src/devices/cpu/sc61860/scops.inc",
	1774	MAME_DIR .. "src/devices/cpu/sc61860/sctable.inc",
1659	1775	}
1660	1776	end
1661	1777
r250251	r250252
1672	1788	files {
1673	1789	MAME_DIR .. "src/devices/cpu/spc700/spc700.cpp",
1674	1790	MAME_DIR .. "src/devices/cpu/spc700/spc700.h",
	1791	MAME_DIR .. "src/devices/cpu/spc700/spc700ds.h",
1675	1792	}
1676	1793	end
1677	1794
r250251	r250252
1752	1869	files {
1753	1870	MAME_DIR .. "src/devices/cpu/tms7000/tms7000.cpp",
1754	1871	MAME_DIR .. "src/devices/cpu/tms7000/tms7000.h",
	1872	MAME_DIR .. "src/devices/cpu/tms7000/tms70op.inc",
1755	1873	}
1756	1874	end
1757	1875
r250251	r250252
1777	1895	MAME_DIR .. "src/devices/cpu/tms9900/tms9995.h",
1778	1896	MAME_DIR .. "src/devices/cpu/tms9900/ti990_10.cpp",
1779	1897	MAME_DIR .. "src/devices/cpu/tms9900/ti990_10.h",
	1898	MAME_DIR .. "src/devices/cpu/tms9900/tms99com.h",
1780	1899	}
1781	1900	end
1782	1901
r250251	r250252
1793	1912	files {
1794	1913	MAME_DIR .. "src/devices/cpu/tms34010/tms34010.cpp",
1795	1914	MAME_DIR .. "src/devices/cpu/tms34010/tms34010.h",
	1915	MAME_DIR .. "src/devices/cpu/tms34010/34010fld.inc",
	1916	MAME_DIR .. "src/devices/cpu/tms34010/34010gfx.inc",
	1917	MAME_DIR .. "src/devices/cpu/tms34010/34010ops.h",
	1918	MAME_DIR .. "src/devices/cpu/tms34010/34010ops.inc",
	1919	MAME_DIR .. "src/devices/cpu/tms34010/34010tbl.inc",
	1920	--MAME_DIR .. "src/devices/cpu/tms34010/dis34010.cpp",
1796	1921	}
1797	1922	end
1798	1923
r250251	r250252
1809	1934	files {
1810	1935	MAME_DIR .. "src/devices/cpu/tms32010/tms32010.cpp",
1811	1936	MAME_DIR .. "src/devices/cpu/tms32010/tms32010.h",
	1937	--MAME_DIR .. "src/devices/cpu/tms32010/dis32010.cpp",
1812	1938	}
1813	1939	end
1814	1940
r250251	r250252
1825	1951	files {
1826	1952	MAME_DIR .. "src/devices/cpu/tms32025/tms32025.cpp",
1827	1953	MAME_DIR .. "src/devices/cpu/tms32025/tms32025.h",
	1954	--MAME_DIR .. "src/devices/cpu/tms32025/dis32025.cpp",
1828	1955	}
1829	1956	end
1830	1957
r250251	r250252
1841	1968	files {
1842	1969	MAME_DIR .. "src/devices/cpu/tms32031/tms32031.cpp",
1843	1970	MAME_DIR .. "src/devices/cpu/tms32031/tms32031.h",
	1971	MAME_DIR .. "src/devices/cpu/tms32031/32031ops.inc",
1844	1972	}
1845	1973	end
1846	1974
r250251	r250252
1857	1985	files {
1858	1986	MAME_DIR .. "src/devices/cpu/tms32051/tms32051.cpp",
1859	1987	MAME_DIR .. "src/devices/cpu/tms32051/tms32051.h",
	1988	MAME_DIR .. "src/devices/cpu/tms32051/32051ops.h",
	1989	MAME_DIR .. "src/devices/cpu/tms32051/32051ops.inc",
1860	1990	}
1861	1991	end
1862	1992
r250251	r250252
1929	2059	files {
1930	2060	MAME_DIR .. "src/devices/cpu/tlcs900/tlcs900.cpp",
1931	2061	MAME_DIR .. "src/devices/cpu/tlcs900/tlcs900.h",
	2062	MAME_DIR .. "src/devices/cpu/tlcs900/900tbl.inc",
1932	2063	}
1933	2064	end
1934	2065
r250251	r250252
1970	2101	files {
1971	2102	MAME_DIR .. "src/devices/cpu/lr35902/lr35902.cpp",
1972	2103	MAME_DIR .. "src/devices/cpu/lr35902/lr35902.h",
	2104	MAME_DIR .. "src/devices/cpu/lr35902/opc_cb.inc",
	2105	MAME_DIR .. "src/devices/cpu/lr35902/opc_main.inc",
1973	2106	}
1974	2107	end
1975	2108
r250251	r250252
1986	2119	files {
1987	2120	MAME_DIR .. "src/devices/cpu/z180/z180.cpp",
1988	2121	MAME_DIR .. "src/devices/cpu/z180/z180.h",
	2122	MAME_DIR .. "src/devices/cpu/z180/z180cb.inc",
	2123	MAME_DIR .. "src/devices/cpu/z180/z180dd.inc",
	2124	MAME_DIR .. "src/devices/cpu/z180/z180ed.inc",
	2125	MAME_DIR .. "src/devices/cpu/z180/z180fd.inc",
	2126	MAME_DIR .. "src/devices/cpu/z180/z180op.inc",
	2127	MAME_DIR .. "src/devices/cpu/z180/z180ops.h",
	2128	MAME_DIR .. "src/devices/cpu/z180/z180tbl.h",
	2129	MAME_DIR .. "src/devices/cpu/z180/z180xy.inc",
1989	2130	MAME_DIR .. "src/devices/cpu/z80/z80daisy.cpp",
1990	2131	MAME_DIR .. "src/devices/cpu/z80/z80daisy.h",
1991	2132	}
r250251	r250252
2004	2145	files {
2005	2146	MAME_DIR .. "src/devices/cpu/z8000/z8000.cpp",
2006	2147	MAME_DIR .. "src/devices/cpu/z8000/z8000.h",
	2148	--MAME_DIR .. "src/devices/cpu/z8000/makedab.cpp",
	2149	MAME_DIR .. "src/devices/cpu/z8000/z8000cpu.h",
	2150	MAME_DIR .. "src/devices/cpu/z8000/z8000dab.h",
	2151	MAME_DIR .. "src/devices/cpu/z8000/z8000ops.inc",
	2152	MAME_DIR .. "src/devices/cpu/z8000/z8000tbl.inc",
2007	2153	}
2008	2154	end
2009	2155
r250251	r250252
2020	2166	files {
2021	2167	MAME_DIR .. "src/devices/cpu/z8/z8.cpp",
2022	2168	MAME_DIR .. "src/devices/cpu/z8/z8.h",
	2169	MAME_DIR .. "src/devices/cpu/z8/z8ops.inc",
2023	2170	}
2024	2171	end
2025	2172
r250251	r250252
2116	2263	files {
2117	2264	MAME_DIR .. "src/devices/cpu/score/score.cpp",
2118	2265	MAME_DIR .. "src/devices/cpu/score/score.h",
	2266	MAME_DIR .. "src/devices/cpu/score/scorem.h",
2119	2267	}
2120	2268	end
2121	2269
r250251	r250252
2168	2316	MAME_DIR .. "src/devices/cpu/alto2/a2ram.h",
2169	2317	MAME_DIR .. "src/devices/cpu/alto2/a2roms.cpp",
2170	2318	MAME_DIR .. "src/devices/cpu/alto2/a2roms.h",
	2319	MAME_DIR .. "src/devices/cpu/alto2/a2jkff.h",
2171	2320	}
2172	2321	end
2173	2322

trunk/scripts/src/devices.lua

r250251	r250252
1	1	-- license:BSD-3-Clause
2	2	-- copyright-holders:MAMEdev Team
3	3
	4	---------------------------------------------------------------------------
	5	--
	6	--   devices.lua
	7	--
	8	--   Rules for building device cores
	9	--
	10	---------------------------------------------------------------------------
	11
4	12	function devicesProject(_target, _subtarget)
5	13
6	14	disasm_files = { }

trunk/scripts/src/emu.lua

r250251	r250252
1	1	-- license:BSD-3-Clause
2	2	-- copyright-holders:MAMEdev Team
3	3
	4	---------------------------------------------------------------------------
	5	--
	6	--   emu.lua
	7	--
	8	--   Rules for building emu cores
	9	--
	10	---------------------------------------------------------------------------
	11
4	12	project ("emu")
5	13	targetsubdir(_OPTIONS["target"] .."_" .. _OPTIONS["subtarget"])
6	14	uuid ("e6fa15e4-a354-4526-acef-13c8e80fcacf")

trunk/scripts/src/lib.lua

r250251	r250252
1	1	-- license:BSD-3-Clause
2	2	-- copyright-holders:MAMEdev Team
3	3
	4	---------------------------------------------------------------------------
	5	--
	6	--   lib.lua
	7	--
	8	--   Rules for building lib cores
	9	--
	10	---------------------------------------------------------------------------
	11
4	12	project "utils"
5	13	uuid "22489ad0-4cb2-4d91-ad81-24b0d80ca30a"
6	14	kind (LIBTYPE)
r250251	r250252
178	186	MAME_DIR .. "src/lib/formats/c8280_dsk.h",
179	187	MAME_DIR .. "src/lib/formats/camplynx_cas.cpp",
180	188	MAME_DIR .. "src/lib/formats/camplynx_cas.h",
	189	MAME_DIR .. "src/lib/formats/camplynx_dsk.cpp",
	190	MAME_DIR .. "src/lib/formats/camplynx_dsk.h",
181	191	MAME_DIR .. "src/lib/formats/cbm_crt.cpp",
182	192	MAME_DIR .. "src/lib/formats/cbm_crt.h",
183	193	MAME_DIR .. "src/lib/formats/cbm_tap.cpp",
r250251	r250252
251	261	MAME_DIR .. "src/lib/formats/fmsx_cas.h",
252	262	MAME_DIR .. "src/lib/formats/fmtowns_dsk.cpp",
253	263	MAME_DIR .. "src/lib/formats/fmtowns_dsk.h",
	264	MAME_DIR .. "src/lib/formats/fsd_dsk.cpp",
	265	MAME_DIR .. "src/lib/formats/fsd_dsk.h",
254	266	MAME_DIR .. "src/lib/formats/g64_dsk.cpp",
255	267	MAME_DIR .. "src/lib/formats/g64_dsk.h",
256	268	MAME_DIR .. "src/lib/formats/gtp_cas.cpp",

trunk/scripts/src/main.lua

r250251	r250252
1	1	-- license:BSD-3-Clause
2	2	-- copyright-holders:MAMEdev Team
3	3
	4	---------------------------------------------------------------------------
	5	--
	6	--   main.lua
	7	--
	8	--   Rules for building main binary
	9	--
	10	---------------------------------------------------------------------------
	11
4	12	function mainProject(_target, _subtarget)
5	13	if (_OPTIONS["SOURCES"] == nil) then
6	14	if (_target == _subtarget) then

trunk/scripts/src/netlist.lua

r250251	r250252
1	1	-- license:BSD-3-Clause
2	2	-- copyright-holders:MAMEdev Team
3	3
	4	---------------------------------------------------------------------------
	5	--
	6	--   netlist.lua
	7	--
	8	--   Rules for building netlist cores
	9	--
	10	---------------------------------------------------------------------------
	11
4	12	project "netlist"
5	13	uuid "665ef8ac-2a4c-4c3e-a05f-fd1e5db11de9"
6	14	kind (LIBTYPE)
r250251	r250252
34	42	MAME_DIR .. "src/lib/netlist/plib/pconfig.h",
35	43	MAME_DIR .. "src/lib/netlist/plib/palloc.cpp",
36	44	MAME_DIR .. "src/lib/netlist/plib/palloc.h",
37		MAME_DIR .. "src/lib/netlist/plib/pfmtlog.cpp",
38		MAME_DIR .. "src/lib/netlist/plib/pfmtlog.h",
	45	MAME_DIR .. "src/lib/netlist/plib/pfmtlog.cpp",
	46	MAME_DIR .. "src/lib/netlist/plib/pfmtlog.h",
39	47	MAME_DIR .. "src/lib/netlist/plib/plists.h",
40	48	MAME_DIR .. "src/lib/netlist/plib/poptions.h",
41	49	MAME_DIR .. "src/lib/netlist/plib/pparser.cpp",
r250251	r250252
48	56	MAME_DIR .. "src/lib/netlist/plib/pstring.h",
49	57	MAME_DIR .. "src/lib/netlist/plib/pstream.cpp",
50	58	MAME_DIR .. "src/lib/netlist/plib/pstream.h",
51		MAME_DIR .. "src/lib/netlist/plib/ptypes.h",
	59	MAME_DIR .. "src/lib/netlist/plib/ptypes.h",
52	60	MAME_DIR .. "src/lib/netlist/tools/nl_convert.cpp",
53	61	MAME_DIR .. "src/lib/netlist/tools/nl_convert.h",
54	62	MAME_DIR .. "src/lib/netlist/analog/nld_bjt.cpp",
r250251	r250252
69	77	MAME_DIR .. "src/lib/netlist/solver/nld_ms_sor.h",
70	78	MAME_DIR .. "src/lib/netlist/solver/nld_ms_sor_mat.h",
71	79	MAME_DIR .. "src/lib/netlist/solver/nld_ms_gmres.h",
	80	MAME_DIR .. "src/lib/netlist/solver/mat_cr.h",
	81	MAME_DIR .. "src/lib/netlist/solver/nld_ms_direct_lu.h",
	82	MAME_DIR .. "src/lib/netlist/solver/vector_base.h",
72	83	MAME_DIR .. "src/lib/netlist/devices/nld_4020.cpp",
73	84	MAME_DIR .. "src/lib/netlist/devices/nld_4020.h",
74	85	MAME_DIR .. "src/lib/netlist/devices/nld_4066.cpp",
r250251	r250252
160	171	MAME_DIR .. "src/lib/netlist/macro/nlm_opamp.cpp",
161	172	MAME_DIR .. "src/lib/netlist/macro/nlm_opamp.h",
162	173	MAME_DIR .. "src/lib/netlist/macro/nlm_other.cpp",
163		MAME_DIR .. "src/lib/netlist/macro/nlm_other.h",
	174	MAME_DIR .. "src/lib/netlist/macro/nlm_other.h",
164	175	}

trunk/scripts/src/osd/modules.lua

r250251	r250252
1	1	-- license:BSD-3-Clause
2	2	-- copyright-holders:MAMEdev Team
3	3
	4	---------------------------------------------------------------------------
	5	--
	6	--   modules.lua
	7	--
	8	--   Rules for the building of modules
	9	--
	10	---------------------------------------------------------------------------
	11
4	12	function string.starts(String,Start)
5	13	return string.sub(String,1,string.len(Start))==Start
6	14	end
r250251	r250252
35	43
36	44	files {
37	45	MAME_DIR .. "src/osd/osdnet.cpp",
	46	MAME_DIR .. "src/osd/osdnet.h",
	47	MAME_DIR .. "src/osd/modules/debugger/debug_module.h",
	48	MAME_DIR .. "src/osd/modules/font/font_module.h",
	49	MAME_DIR .. "src/osd/modules/midi/midi_module.h",
	50	MAME_DIR .. "src/osd/modules/netdev/netdev_module.h",
	51	MAME_DIR .. "src/osd/modules/sound/sound_module.h",
38	52	MAME_DIR .. "src/osd/modules/lib/osdobj_common.cpp",
	53	MAME_DIR .. "src/osd/modules/lib/osdobj_common.h",
39	54	MAME_DIR .. "src/osd/modules/debugger/none.cpp",
40	55	MAME_DIR .. "src/osd/modules/debugger/debugint.cpp",
41	56	MAME_DIR .. "src/osd/modules/debugger/debugwin.cpp",
r250251	r250252
71	86	MAME_DIR .. "src/osd/modules/render/drawogl.cpp",
72	87	MAME_DIR .. "src/osd/modules/opengl/gl_shader_tool.cpp",
73	88	MAME_DIR .. "src/osd/modules/opengl/gl_shader_mgr.cpp",
	89	MAME_DIR .. "src/osd/modules/opengl/gl_shader_mgr.h",
	90	MAME_DIR .. "src/osd/modules/opengl/gl_shader_tool.h",
	91	MAME_DIR .. "src/osd/modules/opengl/osd_opengl.h",
	92	MAME_DIR .. "src/osd/modules/opengl/SDL1211_opengl.h",
74	93	}
75	94	defines {
76	95	"USE_OPENGL=1",
r250251	r250252
104	123	if _OPTIONS["USE_QTDEBUG"]=="1" then
105	124	files {
106	125	MAME_DIR .. "src/osd/modules/debugger/qt/debuggerview.cpp",
	126	MAME_DIR .. "src/osd/modules/debugger/qt/debuggerview.h",
107	127	MAME_DIR .. "src/osd/modules/debugger/qt/windowqt.cpp",
	128	MAME_DIR .. "src/osd/modules/debugger/qt/windowqt.h",
108	129	MAME_DIR .. "src/osd/modules/debugger/qt/logwindow.cpp",
	130	MAME_DIR .. "src/osd/modules/debugger/qt/logwindow.h",
109	131	MAME_DIR .. "src/osd/modules/debugger/qt/dasmwindow.cpp",
	132	MAME_DIR .. "src/osd/modules/debugger/qt/dasmwindow.h",
110	133	MAME_DIR .. "src/osd/modules/debugger/qt/mainwindow.cpp",
	134	MAME_DIR .. "src/osd/modules/debugger/qt/mainwindow.h",
111	135	MAME_DIR .. "src/osd/modules/debugger/qt/memorywindow.cpp",
	136	MAME_DIR .. "src/osd/modules/debugger/qt/memorywindow.h",
112	137	MAME_DIR .. "src/osd/modules/debugger/qt/breakpointswindow.cpp",
	138	MAME_DIR .. "src/osd/modules/debugger/qt/breakpointswindow.h",
113	139	MAME_DIR .. "src/osd/modules/debugger/qt/deviceswindow.cpp",
114	140	MAME_DIR .. "src/osd/modules/debugger/qt/deviceinformationwindow.cpp",
	141	MAME_DIR .. "src/osd/modules/debugger/qt/deviceinformationwindow.h",
	142	MAME_DIR .. "src/osd/modules/debugger/qt/deviceswindow.h",
115	143	GEN_DIR .. "osd/modules/debugger/qt/debuggerview.moc.cpp",
116	144	GEN_DIR .. "osd/modules/debugger/qt/windowqt.moc.cpp",
117	145	GEN_DIR .. "osd/modules/debugger/qt/logwindow.moc.cpp",

trunk/scripts/src/osd/osdmini.lua

r250251	r250252
1	1	-- license:BSD-3-Clause
2	2	-- copyright-holders:MAMEdev Team
3	3
	4	---------------------------------------------------------------------------
	5	--
	6	--   osdmini.lua
	7	--
	8	--   Rules for the building of osdmini
	9	--
	10	---------------------------------------------------------------------------
	11
4	12	function maintargetosdoptions(_target,_subtarget)
5	13	end
6	14
r250251	r250252
30	38
31	39	files {
32	40	MAME_DIR .. "src/osd/osdnet.cpp",
	41	MAME_DIR .. "src/osd/osdnet.h",
33	42	MAME_DIR .. "src/osd/osdmini/minimain.cpp",
	43	MAME_DIR .. "src/osd/osdmini/osdmini.h",
	44	MAME_DIR .. "src/osd/osdepend.h",
34	45	MAME_DIR .. "src/osd/modules/lib/osdobj_common.cpp",
	46	MAME_DIR .. "src/osd/modules/lib/osdobj_common.h",
35	47	MAME_DIR .. "src/osd/modules/font/font_sdl.cpp",
36	48	MAME_DIR .. "src/osd/modules/font/font_windows.cpp",
37	49	MAME_DIR .. "src/osd/modules/font/font_osx.cpp",
r250251	r250252
85	97
86	98	files {
87	99	MAME_DIR .. "src/osd/osdcore.cpp",
	100	MAME_DIR .. "src/osd/osdcore.h",
88	101	MAME_DIR .. "src/osd/modules/osdmodule.cpp",
	102	MAME_DIR .. "src/osd/modules/osdmodule.h",
89	103	MAME_DIR .. "src/osd/osdmini/minidir.cpp",
90	104	MAME_DIR .. "src/osd/osdmini/minifile.cpp",
91	105	MAME_DIR .. "src/osd/osdmini/minimisc.cpp",

trunk/scripts/src/osd/sdl.lua

r250251	r250252
1	1	-- license:BSD-3-Clause
2	2	-- copyright-holders:MAMEdev Team
3	3
	4	---------------------------------------------------------------------------
	5	--
	6	--   sdl.lua
	7	--
	8	--   Rules for the building with SDL
	9	--
	10	---------------------------------------------------------------------------
	11
4	12	dofile("modules.lua")
5	13
6	14
r250251	r250252
329	337	files {
330	338	MAME_DIR .. "src/osd/modules/debugger/debugosx.mm",
331	339	MAME_DIR .. "src/osd/modules/debugger/osx/breakpointsview.mm",
	340	MAME_DIR .. "src/osd/modules/debugger/osx/breakpointsview.h",
332	341	MAME_DIR .. "src/osd/modules/debugger/osx/consoleview.mm",
	342	MAME_DIR .. "src/osd/modules/debugger/osx/consoleview.h",
333	343	MAME_DIR .. "src/osd/modules/debugger/osx/debugcommandhistory.mm",
	344	MAME_DIR .. "src/osd/modules/debugger/osx/debugcommandhistory.h",
334	345	MAME_DIR .. "src/osd/modules/debugger/osx/debugconsole.mm",
	346	MAME_DIR .. "src/osd/modules/debugger/osx/debugconsole.h",
335	347	MAME_DIR .. "src/osd/modules/debugger/osx/debugview.mm",
	348	MAME_DIR .. "src/osd/modules/debugger/osx/debugview.h",
336	349	MAME_DIR .. "src/osd/modules/debugger/osx/debugwindowhandler.mm",
	350	MAME_DIR .. "src/osd/modules/debugger/osx/debugwindowhandler.h",
337	351	MAME_DIR .. "src/osd/modules/debugger/osx/deviceinfoviewer.mm",
	352	MAME_DIR .. "src/osd/modules/debugger/osx/deviceinfoviewer.h",
338	353	MAME_DIR .. "src/osd/modules/debugger/osx/devicesviewer.mm",
	354	MAME_DIR .. "src/osd/modules/debugger/osx/devicesviewer.h",
339	355	MAME_DIR .. "src/osd/modules/debugger/osx/disassemblyview.mm",
340	356	MAME_DIR .. "src/osd/modules/debugger/osx/disassemblyviewer.mm",
	357	MAME_DIR .. "src/osd/modules/debugger/osx/disassemblyviewer.h",
341	358	MAME_DIR .. "src/osd/modules/debugger/osx/errorlogview.mm",
	359	MAME_DIR .. "src/osd/modules/debugger/osx/errorlogview.h",
	360	MAME_DIR .. "src/osd/modules/debugger/osx/disassemblyview.h",
342	361	MAME_DIR .. "src/osd/modules/debugger/osx/errorlogviewer.mm",
	362	MAME_DIR .. "src/osd/modules/debugger/osx/errorlogviewer.h",
343	363	MAME_DIR .. "src/osd/modules/debugger/osx/memoryview.mm",
	364	MAME_DIR .. "src/osd/modules/debugger/osx/memoryview.h",
344	365	MAME_DIR .. "src/osd/modules/debugger/osx/memoryviewer.mm",
	366	MAME_DIR .. "src/osd/modules/debugger/osx/memoryviewer.h",
345	367	MAME_DIR .. "src/osd/modules/debugger/osx/pointsviewer.mm",
	368	MAME_DIR .. "src/osd/modules/debugger/osx/pointsviewer.h",
346	369	MAME_DIR .. "src/osd/modules/debugger/osx/registersview.mm",
	370	MAME_DIR .. "src/osd/modules/debugger/osx/registersview.h",
347	371	MAME_DIR .. "src/osd/modules/debugger/osx/watchpointsview.mm",
	372	MAME_DIR .. "src/osd/modules/debugger/osx/watchpointsview.h",
	373	MAME_DIR .. "src/osd/modules/debugger/osx/debugosx.h",
348	374	}
349	375	if _OPTIONS["SDL_LIBVER"]=="sdl" then
350	376	-- SDLMain_tmpl isn't necessary for SDL2
351	377	files {
352	378	MAME_DIR .. "src/osd/sdl/SDLMain_tmpl.mm",
	379	MAME_DIR .. "src/osd/sdl/SDLMain_tmpl.h",
353	380	}
354	381	end
355	382	end
356	383
357	384	files {
	385	MAME_DIR .. "src/osd/sdl/osdsdl.h",
	386	MAME_DIR .. "src/osd/sdl/sdlinc.h",
	387	MAME_DIR .. "src/osd/sdl/sdlprefix.h",
358	388	MAME_DIR .. "src/osd/sdl/sdlmain.cpp",
	389	MAME_DIR .. "src/osd/osdepend.h",
359	390	MAME_DIR .. "src/osd/sdl/input.cpp",
	391	MAME_DIR .. "src/osd/sdl/input.h",
360	392	MAME_DIR .. "src/osd/sdl/video.cpp",
	393	MAME_DIR .. "src/osd/sdl/video.h",
361	394	MAME_DIR .. "src/osd/sdl/window.cpp",
	395	MAME_DIR .. "src/osd/sdl/window.h",
	396	MAME_DIR .. "src/osd/modules/osdwindow.h",
362	397	MAME_DIR .. "src/osd/sdl/output.cpp",
363	398	MAME_DIR .. "src/osd/sdl/watchdog.cpp",
	399	MAME_DIR .. "src/osd/sdl/watchdog.h",
364	400	MAME_DIR .. "src/osd/modules/render/drawsdl.cpp",
365	401	}
366	402	if _OPTIONS["SDL_LIBVER"]=="sdl2" then
367	403	files {
368	404	MAME_DIR .. "src/osd/modules/render/draw13.cpp",
	405	MAME_DIR .. "src/osd/modules/render/blit13.h",
369	406	}
370	407	end
371	408
r250251	r250252
391	428
392	429	files {
393	430	MAME_DIR .. "src/osd/osdcore.cpp",
	431	MAME_DIR .. "src/osd/osdcore.h",
394	432	MAME_DIR .. "src/osd/strconv.cpp",
	433	MAME_DIR .. "src/osd/strconv.h",
395	434	MAME_DIR .. "src/osd/sdl/sdldir.cpp",
396	435	MAME_DIR .. "src/osd/sdl/sdlfile.cpp",
	436	MAME_DIR .. "src/osd/sdl/sdlfile.h",
397	437	MAME_DIR .. "src/osd/sdl/sdlptty_" .. BASE_TARGETOS ..".cpp",
398	438	MAME_DIR .. "src/osd/sdl/sdlsocket.cpp",
399	439	MAME_DIR .. "src/osd/sdl/sdlos_" .. SDLOS_TARGETOS .. ".cpp",
400	440	MAME_DIR .. "src/osd/modules/osdmodule.cpp",
	441	MAME_DIR .. "src/osd/modules/osdmodule.h",
401	442	MAME_DIR .. "src/osd/modules/lib/osdlib_" .. SDLOS_TARGETOS .. ".cpp",
	443	MAME_DIR .. "src/osd/modules/lib/osdlib.h",
402	444	MAME_DIR .. "src/osd/modules/sync/sync_" .. SYNC_IMPLEMENTATION .. ".cpp",
	445	MAME_DIR .. "src/osd/modules/sync/osdsync.h",
403	446	}
404	447
405	448	if _OPTIONS["NOASM"]=="1" then
r250251	r250252
414	457
415	458	if _OPTIONS["targetos"]=="macosx" then
416	459	files {
	460	MAME_DIR .. "src/osd/sdl/osxutils.h",
417	461	MAME_DIR .. "src/osd/sdl/osxutils.mm",
418	462	}
419	463	end

trunk/scripts/src/osd/windows.lua

r250251	r250252
1	1	-- license:BSD-3-Clause
2	2	-- copyright-holders:MAMEdev Team
3	3
	4	---------------------------------------------------------------------------
	5	--
	6	--   windows.lua
	7	--
	8	--   Rules for the building for Windows
	9	--
	10	---------------------------------------------------------------------------
	11
4	12	dofile("modules.lua")
5	13
6	14
r250251	r250252
129	137
130	138	files {
131	139	MAME_DIR .. "src/osd/modules/render/drawd3d.cpp",
	140	MAME_DIR .. "src/osd/modules/render/drawd3d.h",
132	141	MAME_DIR .. "src/osd/modules/render/d3d/d3d9intf.cpp",
133	142	MAME_DIR .. "src/osd/modules/render/d3d/d3dhlsl.cpp",
	143	MAME_DIR .. "src/osd/modules/render/d3d/d3dcomm.h",
	144	MAME_DIR .. "src/osd/modules/render/d3d/d3dhlsl.h",
	145	MAME_DIR .. "src/osd/modules/render/d3d/d3dintf.h",
134	146	MAME_DIR .. "src/osd/modules/render/drawdd.cpp",
135	147	MAME_DIR .. "src/osd/modules/render/drawgdi.cpp",
136	148	MAME_DIR .. "src/osd/modules/render/drawnone.cpp",
137	149	MAME_DIR .. "src/osd/windows/input.cpp",
	150	MAME_DIR .. "src/osd/windows/input.h",
138	151	MAME_DIR .. "src/osd/windows/output.cpp",
	152	MAME_DIR .. "src/osd/windows/output.h",
139	153	MAME_DIR .. "src/osd/windows/video.cpp",
	154	MAME_DIR .. "src/osd/windows/video.h",
140	155	MAME_DIR .. "src/osd/windows/window.cpp",
	156	MAME_DIR .. "src/osd/windows/window.h",
	157	MAME_DIR .. "src/osd/modules/osdwindow.h",
141	158	MAME_DIR .. "src/osd/windows/winmenu.cpp",
142	159	MAME_DIR .. "src/osd/windows/winmain.cpp",
	160	MAME_DIR .. "src/osd/windows/winmain.h",
	161	MAME_DIR .. "src/osd/osdepend.h",
143	162	MAME_DIR .. "src/osd/modules/debugger/win/consolewininfo.cpp",
	163	MAME_DIR .. "src/osd/modules/debugger/win/consolewininfo.h",
144	164	MAME_DIR .. "src/osd/modules/debugger/win/debugbaseinfo.cpp",
	165	MAME_DIR .. "src/osd/modules/debugger/win/debugbaseinfo.h",
145	166	MAME_DIR .. "src/osd/modules/debugger/win/debugviewinfo.cpp",
	167	MAME_DIR .. "src/osd/modules/debugger/win/debugviewinfo.h",
146	168	MAME_DIR .. "src/osd/modules/debugger/win/debugwininfo.cpp",
	169	MAME_DIR .. "src/osd/modules/debugger/win/debugwininfo.h",
147	170	MAME_DIR .. "src/osd/modules/debugger/win/disasmbasewininfo.cpp",
	171	MAME_DIR .. "src/osd/modules/debugger/win/disasmbasewininfo.h",
148	172	MAME_DIR .. "src/osd/modules/debugger/win/disasmviewinfo.cpp",
	173	MAME_DIR .. "src/osd/modules/debugger/win/disasmviewinfo.h",
149	174	MAME_DIR .. "src/osd/modules/debugger/win/disasmwininfo.cpp",
	175	MAME_DIR .. "src/osd/modules/debugger/win/disasmwininfo.h",
150	176	MAME_DIR .. "src/osd/modules/debugger/win/editwininfo.cpp",
	177	MAME_DIR .. "src/osd/modules/debugger/win/editwininfo.h",
151	178	MAME_DIR .. "src/osd/modules/debugger/win/logwininfo.cpp",
	179	MAME_DIR .. "src/osd/modules/debugger/win/logwininfo.h",
152	180	MAME_DIR .. "src/osd/modules/debugger/win/memoryviewinfo.cpp",
	181	MAME_DIR .. "src/osd/modules/debugger/win/memoryviewinfo.h",
153	182	MAME_DIR .. "src/osd/modules/debugger/win/memorywininfo.cpp",
	183	MAME_DIR .. "src/osd/modules/debugger/win/memorywininfo.h",
154	184	MAME_DIR .. "src/osd/modules/debugger/win/pointswininfo.cpp",
	185	MAME_DIR .. "src/osd/modules/debugger/win/pointswininfo.h",
155	186	MAME_DIR .. "src/osd/modules/debugger/win/uimetrics.cpp",
	187	MAME_DIR .. "src/osd/modules/debugger/win/uimetrics.h",
	188	MAME_DIR .. "src/osd/modules/debugger/win/debugwin.h",
156	189	}
157	190
158	191
r250251	r250252
183	216	}
184	217
185	218	files {
	219	MAME_DIR .. "src/osd/eigccppc.h",
	220	MAME_DIR .. "src/osd/eigccx86.h",
	221	MAME_DIR .. "src/osd/eivc.h",
	222	MAME_DIR .. "src/osd/eivcx86.h",
	223	MAME_DIR .. "src/osd/eminline.h",
	224	MAME_DIR .. "src/osd/osdcomm.h",
186	225	MAME_DIR .. "src/osd/osdcore.cpp",
	226	MAME_DIR .. "src/osd/osdcore.h",
187	227	MAME_DIR .. "src/osd/strconv.cpp",
	228	MAME_DIR .. "src/osd/strconv.h",
188	229	MAME_DIR .. "src/osd/windows/main.cpp",
189	230	MAME_DIR .. "src/osd/windows/windir.cpp",
190	231	MAME_DIR .. "src/osd/windows/winfile.cpp",
191	232	MAME_DIR .. "src/osd/modules/sync/sync_windows.cpp",
	233	MAME_DIR .. "src/osd/modules/sync/osdsync.h",
192	234	MAME_DIR .. "src/osd/windows/winutf8.cpp",
	235	MAME_DIR .. "src/osd/windows/winutf8.h",
193	236	MAME_DIR .. "src/osd/windows/winutil.cpp",
	237	MAME_DIR .. "src/osd/windows/winutil.h",
	238	MAME_DIR .. "src/osd/windows/winfile.h",
194	239	MAME_DIR .. "src/osd/windows/winclip.cpp",
195	240	MAME_DIR .. "src/osd/windows/winsocket.cpp",
196	241	MAME_DIR .. "src/osd/windows/winptty.cpp",
197	242	MAME_DIR .. "src/osd/modules/osdmodule.cpp",
	243	MAME_DIR .. "src/osd/modules/osdmodule.h",
198	244	MAME_DIR .. "src/osd/modules/lib/osdlib_win32.cpp",
199	245	}
200	246

trunk/scripts/src/tests.lua

r250251	r250252
1	1	-- license:BSD-3-Clause
2	2	-- copyright-holders:MAMEdev Team
3	3
4		--------------------------------------------------
5		-- MAME tests
6		--------------------------------------------------
	4	---------------------------------------------------------------------------
	5	--
	6	--   tests.lua
	7	--
	8	--   Rules for building tests
	9	--
	10	---------------------------------------------------------------------------
7	11
8	12	project("tests")
9	13	uuid ("66d4c639-196b-4065-a411-7ee9266564f5")

trunk/scripts/src/tools.lua

r250251	r250252
1	1	-- license:BSD-3-Clause
2	2	-- copyright-holders:MAMEdev Team
3	3
	4	---------------------------------------------------------------------------
	5	--
	6	--   tools.lua
	7	--
	8	--   Rules for the building of tools
	9	--
	10	---------------------------------------------------------------------------
	11
4	12	--------------------------------------------------
5	13	-- romcmp
6	14	--------------------------------------------------
r250251	r250252
766	774
767	775	files {
768	776	MAME_DIR .. "src/tools/imgtool/main.cpp",
	777	MAME_DIR .. "src/tools/imgtool/main.h",
769	778	MAME_DIR .. "src/tools/imgtool/stream.cpp",
	779	MAME_DIR .. "src/tools/imgtool/stream.h",
770	780	MAME_DIR .. "src/tools/imgtool/library.cpp",
	781	MAME_DIR .. "src/tools/imgtool/library.h",
771	782	MAME_DIR .. "src/tools/imgtool/modules.cpp",
	783	MAME_DIR .. "src/tools/imgtool/modules.h",
772	784	MAME_DIR .. "src/tools/imgtool/iflopimg.cpp",
	785	MAME_DIR .. "src/tools/imgtool/iflopimg.h",
773	786	MAME_DIR .. "src/tools/imgtool/filter.cpp",
	787	MAME_DIR .. "src/tools/imgtool/filter.h",
774	788	MAME_DIR .. "src/tools/imgtool/filteoln.cpp",
775	789	MAME_DIR .. "src/tools/imgtool/filtbas.cpp",
776	790	MAME_DIR .. "src/tools/imgtool/imgtool.cpp",
	791	MAME_DIR .. "src/tools/imgtool/imgtool.h",
777	792	MAME_DIR .. "src/tools/imgtool/imgterrs.cpp",
	793	MAME_DIR .. "src/tools/imgtool/imgterrs.h",
778	794	MAME_DIR .. "src/tools/imgtool/imghd.cpp",
	795	MAME_DIR .. "src/tools/imgtool/imghd.h",
779	796	MAME_DIR .. "src/tools/imgtool/charconv.cpp",
	797	MAME_DIR .. "src/tools/imgtool/charconv.h",
780	798	MAME_DIR .. "src/tools/imgtool/formats/vt_dsk.cpp",
781	799	MAME_DIR .. "src/tools/imgtool/formats/vt_dsk.h",
782	800	MAME_DIR .. "src/tools/imgtool/formats/coco_dsk.cpp",
r250251	r250252
790	808	MAME_DIR .. "src/tools/imgtool/modules/ti990hd.cpp",
791	809	MAME_DIR .. "src/tools/imgtool/modules/concept.cpp",
792	810	MAME_DIR .. "src/tools/imgtool/modules/fat.cpp",
	811	MAME_DIR .. "src/tools/imgtool/modules/fat.h",
793	812	MAME_DIR .. "src/tools/imgtool/modules/pc_flop.cpp",
794	813	MAME_DIR .. "src/tools/imgtool/modules/pc_hard.cpp",
795	814	MAME_DIR .. "src/tools/imgtool/modules/prodos.cpp",
796	815	MAME_DIR .. "src/tools/imgtool/modules/vzdos.cpp",
797	816	MAME_DIR .. "src/tools/imgtool/modules/thomson.cpp",
798	817	MAME_DIR .. "src/tools/imgtool/modules/macutil.cpp",
	818	MAME_DIR .. "src/tools/imgtool/modules/macutil.h",
799	819	MAME_DIR .. "src/tools/imgtool/modules/cybiko.cpp",
800	820	MAME_DIR .. "src/tools/imgtool/modules/cybikoxt.cpp",
801	821	MAME_DIR .. "src/tools/imgtool/modules/psion.cpp",

trunk/scripts/target/mame/arcade.lua

r250251	r250252
787	787	createMAMEProjects(_target, _subtarget, "shared")
788	788	files {
789	789	MAME_DIR .. "src/mame/machine/nmk112.cpp",
	790	MAME_DIR .. "src/mame/machine/nmk112.h",
790	791	MAME_DIR .. "src/mame/machine/pcshare.cpp",
	792	MAME_DIR .. "src/mame/machine/pcshare.h",
791	793	MAME_DIR .. "src/mame/machine/segacrpt.cpp",
	794	MAME_DIR .. "src/mame/machine/segacrpt.h",
792	795	MAME_DIR .. "src/mame/machine/segacrp2.cpp",
	796	MAME_DIR .. "src/mame/machine/segacrp2.h",
793	797	MAME_DIR .. "src/mame/machine/ticket.cpp",
	798	MAME_DIR .. "src/mame/machine/ticket.h",
794	799	MAME_DIR .. "src/mame/video/avgdvg.cpp",
	800	MAME_DIR .. "src/mame/video/avgdvg.h",
795	801	MAME_DIR .. "src/mame/audio/dcs.cpp",
	802	MAME_DIR .. "src/mame/audio/dcs.h",
796	803	MAME_DIR .. "src/mame/audio/decobsmt.cpp",
	804	MAME_DIR .. "src/mame/audio/decobsmt.h",
797	805	MAME_DIR .. "src/mame/audio/segam1audio.cpp",
	806	MAME_DIR .. "src/mame/audio/segam1audio.h",
798	807	}
799	808
800	809	--------------------------------------------------
r250251	r250252
807	816	MAME_DIR .. "src/mame/drivers/ssfindo.cpp",
808	817	MAME_DIR .. "src/mame/drivers/aristmk5.cpp",
809	818	MAME_DIR .. "src/mame/machine/archimds.cpp",
	819	MAME_DIR .. "src/mame/includes/archimds.h",
810	820	MAME_DIR .. "src/mame/video/archimds.cpp",
811	821	}
812	822
r250251	r250252
827	837	createMAMEProjects(_target, _subtarget, "alpha")
828	838	files {
829	839	MAME_DIR .. "src/mame/drivers/alpha68k.cpp",
	840	MAME_DIR .. "src/mame/includes/alpha68k.h",
830	841	MAME_DIR .. "src/mame/video/alpha68k.cpp",
831	842	MAME_DIR .. "src/mame/drivers/champbas.cpp",
	843	MAME_DIR .. "src/mame/includes/champbas.h",
832	844	MAME_DIR .. "src/mame/video/champbas.cpp",
833	845	MAME_DIR .. "src/mame/drivers/equites.cpp",
	846	MAME_DIR .. "src/mame/includes/equites.h",
834	847	MAME_DIR .. "src/mame/video/equites.cpp",
835	848	MAME_DIR .. "src/mame/drivers/meijinsn.cpp",
836	849	MAME_DIR .. "src/mame/drivers/shougi.cpp",
837	850	MAME_DIR .. "src/mame/machine/alpha8201.cpp",
	851	MAME_DIR .. "src/mame/machine/alpha8201.h",
838	852	}
839	853
840	854	createMAMEProjects(_target, _subtarget, "amiga")
r250251	r250252
868	882	createMAMEProjects(_target, _subtarget, "atari")
869	883	files {
870	884	MAME_DIR .. "src/mame/drivers/arcadecl.cpp",
	885	MAME_DIR .. "src/mame/includes/arcadecl.h",
871	886	MAME_DIR .. "src/mame/video/arcadecl.cpp",
872	887	MAME_DIR .. "src/mame/drivers/asteroid.cpp",
	888	MAME_DIR .. "src/mame/includes/asteroid.h",
873	889	MAME_DIR .. "src/mame/machine/asteroid.cpp",
874	890	MAME_DIR .. "src/mame/audio/asteroid.cpp",
875	891	MAME_DIR .. "src/mame/audio/llander.cpp",
876	892	MAME_DIR .. "src/mame/drivers/atarifb.cpp",
	893	MAME_DIR .. "src/mame/includes/atarifb.h",
877	894	MAME_DIR .. "src/mame/machine/atarifb.cpp",
878	895	MAME_DIR .. "src/mame/audio/atarifb.cpp",
879	896	MAME_DIR .. "src/mame/video/atarifb.cpp",
880	897	MAME_DIR .. "src/mame/drivers/atarig1.cpp",
	898	MAME_DIR .. "src/mame/includes/atarig1.h",
881	899	MAME_DIR .. "src/mame/video/atarig1.cpp",
	900	MAME_DIR .. "src/mame/includes/slapstic.h",
882	901	MAME_DIR .. "src/mame/drivers/atarig42.cpp",
	902	MAME_DIR .. "src/mame/includes/atarig42.h",
883	903	MAME_DIR .. "src/mame/video/atarig42.cpp",
884	904	MAME_DIR .. "src/mame/drivers/atarigt.cpp",
	905	MAME_DIR .. "src/mame/includes/atarigt.h",
885	906	MAME_DIR .. "src/mame/video/atarigt.cpp",
886	907	MAME_DIR .. "src/mame/drivers/atarigx2.cpp",
	908	MAME_DIR .. "src/mame/includes/atarigx2.h",
887	909	MAME_DIR .. "src/mame/video/atarigx2.cpp",
888	910	MAME_DIR .. "src/mame/drivers/atarisy1.cpp",
	911	MAME_DIR .. "src/mame/includes/atarisy1.h",
889	912	MAME_DIR .. "src/mame/video/atarisy1.cpp",
890	913	MAME_DIR .. "src/mame/drivers/atarisy2.cpp",
	914	MAME_DIR .. "src/mame/includes/atarisy2.h",
891	915	MAME_DIR .. "src/mame/video/atarisy2.cpp",
892	916	MAME_DIR .. "src/mame/drivers/atarisy4.cpp",
893	917	MAME_DIR .. "src/mame/drivers/atarittl.cpp",
894	918	MAME_DIR .. "src/mame/drivers/atetris.cpp",
	919	MAME_DIR .. "src/mame/includes/atetris.h",
895	920	MAME_DIR .. "src/mame/video/atetris.cpp",
896	921	MAME_DIR .. "src/mame/drivers/avalnche.cpp",
	922	MAME_DIR .. "src/mame/includes/avalnche.h",
897	923	MAME_DIR .. "src/mame/audio/avalnche.cpp",
898	924	MAME_DIR .. "src/mame/drivers/badlands.cpp",
	925	MAME_DIR .. "src/mame/includes/badlands.h",
899	926	MAME_DIR .. "src/mame/video/badlands.cpp",
900	927	MAME_DIR .. "src/mame/drivers/bartop52.cpp",
901	928	MAME_DIR .. "src/mame/drivers/batman.cpp",
	929	MAME_DIR .. "src/mame/includes/batman.h",
902	930	MAME_DIR .. "src/mame/video/batman.cpp",
903	931	MAME_DIR .. "src/mame/drivers/beathead.cpp",
	932	MAME_DIR .. "src/mame/includes/beathead.h",
904	933	MAME_DIR .. "src/mame/video/beathead.cpp",
905	934	MAME_DIR .. "src/mame/drivers/blstroid.cpp",
	935	MAME_DIR .. "src/mame/includes/blstroid.h",
906	936	MAME_DIR .. "src/mame/video/blstroid.cpp",
907	937	MAME_DIR .. "src/mame/drivers/boxer.cpp",
908	938	MAME_DIR .. "src/mame/drivers/bsktball.cpp",
	939	MAME_DIR .. "src/mame/includes/bsktball.h",
909	940	MAME_DIR .. "src/mame/machine/bsktball.cpp",
910	941	MAME_DIR .. "src/mame/audio/bsktball.cpp",
911	942	MAME_DIR .. "src/mame/video/bsktball.cpp",
912	943	MAME_DIR .. "src/mame/drivers/bwidow.cpp",
	944	MAME_DIR .. "src/mame/includes/bwidow.h",
913	945	MAME_DIR .. "src/mame/audio/bwidow.cpp",
914	946	MAME_DIR .. "src/mame/drivers/bzone.cpp",
	947	MAME_DIR .. "src/mame/includes/bzone.h",
915	948	MAME_DIR .. "src/mame/audio/bzone.cpp",
916	949	MAME_DIR .. "src/mame/drivers/canyon.cpp",
	950	MAME_DIR .. "src/mame/includes/canyon.h",
917	951	MAME_DIR .. "src/mame/audio/canyon.cpp",
918	952	MAME_DIR .. "src/mame/video/canyon.cpp",
919	953	MAME_DIR .. "src/mame/drivers/cball.cpp",
920	954	MAME_DIR .. "src/mame/drivers/ccastles.cpp",
	955	MAME_DIR .. "src/mame/includes/ccastles.h",
921	956	MAME_DIR .. "src/mame/video/ccastles.cpp",
922	957	MAME_DIR .. "src/mame/drivers/centiped.cpp",
	958	MAME_DIR .. "src/mame/includes/centiped.h",
923	959	MAME_DIR .. "src/mame/video/centiped.cpp",
924	960	MAME_DIR .. "src/mame/drivers/cloak.cpp",
	961	MAME_DIR .. "src/mame/includes/cloak.h",
925	962	MAME_DIR .. "src/mame/video/cloak.cpp",
926	963	MAME_DIR .. "src/mame/drivers/cloud9.cpp",
	964	MAME_DIR .. "src/mame/includes/cloud9.h",
927	965	MAME_DIR .. "src/mame/video/cloud9.cpp",
928	966	MAME_DIR .. "src/mame/drivers/cmmb.cpp",
929	967	MAME_DIR .. "src/mame/drivers/cops.cpp",
930	968	MAME_DIR .. "src/mame/drivers/copsnrob.cpp",
	969	MAME_DIR .. "src/mame/includes/copsnrob.h",
931	970	MAME_DIR .. "src/mame/audio/copsnrob.cpp",
932	971	MAME_DIR .. "src/mame/video/copsnrob.cpp",
933	972	MAME_DIR .. "src/mame/drivers/cyberbal.cpp",
	973	MAME_DIR .. "src/mame/includes/cyberbal.h",
934	974	MAME_DIR .. "src/mame/audio/cyberbal.cpp",
935	975	MAME_DIR .. "src/mame/video/cyberbal.cpp",
936	976	MAME_DIR .. "src/mame/drivers/destroyr.cpp",
937	977	MAME_DIR .. "src/mame/drivers/dragrace.cpp",
	978	MAME_DIR .. "src/mame/includes/dragrace.h",
938	979	MAME_DIR .. "src/mame/audio/dragrace.cpp",
939	980	MAME_DIR .. "src/mame/video/dragrace.cpp",
940	981	MAME_DIR .. "src/mame/drivers/eprom.cpp",
	982	MAME_DIR .. "src/mame/includes/eprom.h",
941	983	MAME_DIR .. "src/mame/video/eprom.cpp",
942	984	MAME_DIR .. "src/mame/drivers/firefox.cpp",
943	985	MAME_DIR .. "src/mame/drivers/firetrk.cpp",
	986	MAME_DIR .. "src/mame/includes/firetrk.h",
944	987	MAME_DIR .. "src/mame/audio/firetrk.cpp",
945	988	MAME_DIR .. "src/mame/video/firetrk.cpp",
946	989	MAME_DIR .. "src/mame/drivers/flyball.cpp",
947	990	MAME_DIR .. "src/mame/drivers/foodf.cpp",
	991	MAME_DIR .. "src/mame/includes/foodf.h",
948	992	MAME_DIR .. "src/mame/video/foodf.cpp",
949	993	MAME_DIR .. "src/mame/drivers/gauntlet.cpp",
	994	MAME_DIR .. "src/mame/includes/gauntlet.h",
950	995	MAME_DIR .. "src/mame/video/gauntlet.cpp",
951	996	MAME_DIR .. "src/mame/drivers/harddriv.cpp",
	997	MAME_DIR .. "src/mame/includes/harddriv.h",
952	998	MAME_DIR .. "src/mame/machine/harddriv.cpp",
953	999	MAME_DIR .. "src/mame/audio/harddriv.cpp",
954	1000	MAME_DIR .. "src/mame/video/harddriv.cpp",
955	1001	MAME_DIR .. "src/mame/drivers/irobot.cpp",
	1002	MAME_DIR .. "src/mame/includes/irobot.h",
956	1003	MAME_DIR .. "src/mame/machine/irobot.cpp",
957	1004	MAME_DIR .. "src/mame/video/irobot.cpp",
958	1005	MAME_DIR .. "src/mame/drivers/jaguar.cpp",
	1006	MAME_DIR .. "src/mame/includes/jaguar.h",
959	1007	MAME_DIR .. "src/mame/audio/jaguar.cpp",
960	1008	MAME_DIR .. "src/mame/video/jaguar.cpp",
	1009	MAME_DIR .. "src/mame/video/jagblit.h",
	1010	MAME_DIR .. "src/mame/video/jagblit.inc",
	1011	MAME_DIR .. "src/mame/video/jagobj.inc",
961	1012	MAME_DIR .. "src/mame/drivers/jedi.cpp",
	1013	MAME_DIR .. "src/mame/includes/jedi.h",
962	1014	MAME_DIR .. "src/mame/audio/jedi.cpp",
963	1015	MAME_DIR .. "src/mame/video/jedi.cpp",
964	1016	MAME_DIR .. "src/mame/drivers/klax.cpp",
	1017	MAME_DIR .. "src/mame/includes/klax.h",
965	1018	MAME_DIR .. "src/mame/video/klax.cpp",
966	1019	MAME_DIR .. "src/mame/drivers/liberatr.cpp",
	1020	MAME_DIR .. "src/mame/includes/liberatr.h",
967	1021	MAME_DIR .. "src/mame/video/liberatr.cpp",
968	1022	MAME_DIR .. "src/mame/drivers/mediagx.cpp",
969	1023	MAME_DIR .. "src/mame/drivers/metalmx.cpp",
	1024	MAME_DIR .. "src/mame/includes/metalmx.h",
970	1025	MAME_DIR .. "src/mame/drivers/mgolf.cpp",
971	1026	MAME_DIR .. "src/mame/drivers/mhavoc.cpp",
	1027	MAME_DIR .. "src/mame/includes/mhavoc.h",
972	1028	MAME_DIR .. "src/mame/machine/mhavoc.cpp",
973	1029	MAME_DIR .. "src/mame/drivers/missile.cpp",
974	1030	MAME_DIR .. "src/mame/drivers/nitedrvr.cpp",
	1031	MAME_DIR .. "src/mame/includes/nitedrvr.h",
975	1032	MAME_DIR .. "src/mame/machine/nitedrvr.cpp",
976	1033	MAME_DIR .. "src/mame/audio/nitedrvr.cpp",
977	1034	MAME_DIR .. "src/mame/video/nitedrvr.cpp",
978	1035	MAME_DIR .. "src/mame/drivers/offtwall.cpp",
	1036	MAME_DIR .. "src/mame/includes/offtwall.h",
979	1037	MAME_DIR .. "src/mame/video/offtwall.cpp",
980	1038	MAME_DIR .. "src/mame/drivers/orbit.cpp",
	1039	MAME_DIR .. "src/mame/includes/orbit.h",
981	1040	MAME_DIR .. "src/mame/audio/orbit.cpp",
982	1041	MAME_DIR .. "src/mame/video/orbit.cpp",
983	1042	MAME_DIR .. "src/mame/drivers/pong.cpp",
r250251	r250252
985	1044	MAME_DIR .. "src/mame/drivers/nl_pongd.cpp",
986	1045	MAME_DIR .. "src/mame/drivers/nl_breakout.cpp",
987	1046	MAME_DIR .. "src/mame/drivers/poolshrk.cpp",
	1047	MAME_DIR .. "src/mame/includes/poolshrk.h",
988	1048	MAME_DIR .. "src/mame/audio/poolshrk.cpp",
989	1049	MAME_DIR .. "src/mame/video/poolshrk.cpp",
990	1050	MAME_DIR .. "src/mame/drivers/quantum.cpp",
991	1051	MAME_DIR .. "src/mame/drivers/quizshow.cpp",
992	1052	MAME_DIR .. "src/mame/drivers/rampart.cpp",
	1053	MAME_DIR .. "src/mame/includes/rampart.h",
993	1054	MAME_DIR .. "src/mame/video/rampart.cpp",
994	1055	MAME_DIR .. "src/mame/drivers/relief.cpp",
	1056	MAME_DIR .. "src/mame/includes/relief.h",
995	1057	MAME_DIR .. "src/mame/video/relief.cpp",
996	1058	MAME_DIR .. "src/mame/drivers/runaway.cpp",
	1059	MAME_DIR .. "src/mame/includes/runaway.h",
997	1060	MAME_DIR .. "src/mame/video/runaway.cpp",
998	1061	MAME_DIR .. "src/mame/drivers/sbrkout.cpp",
999	1062	MAME_DIR .. "src/mame/drivers/shuuz.cpp",
	1063	MAME_DIR .. "src/mame/includes/shuuz.h",
1000	1064	MAME_DIR .. "src/mame/video/shuuz.cpp",
1001	1065	MAME_DIR .. "src/mame/drivers/skullxbo.cpp",
	1066	MAME_DIR .. "src/mame/includes/skullxbo.h",
1002	1067	MAME_DIR .. "src/mame/video/skullxbo.cpp",
1003	1068	MAME_DIR .. "src/mame/drivers/skydiver.cpp",
	1069	MAME_DIR .. "src/mame/includes/skydiver.h",
1004	1070	MAME_DIR .. "src/mame/audio/skydiver.cpp",
1005	1071	MAME_DIR .. "src/mame/video/skydiver.cpp",
1006	1072	MAME_DIR .. "src/mame/drivers/skyraid.cpp",
	1073	MAME_DIR .. "src/mame/includes/skyraid.h",
1007	1074	MAME_DIR .. "src/mame/audio/skyraid.cpp",
1008	1075	MAME_DIR .. "src/mame/video/skyraid.cpp",
1009	1076	MAME_DIR .. "src/mame/drivers/sprint2.cpp",
	1077	MAME_DIR .. "src/mame/includes/sprint2.h",
1010	1078	MAME_DIR .. "src/mame/audio/sprint2.cpp",
1011	1079	MAME_DIR .. "src/mame/video/sprint2.cpp",
1012	1080	MAME_DIR .. "src/mame/drivers/sprint4.cpp",
	1081	MAME_DIR .. "src/mame/includes/sprint4.h",
1013	1082	MAME_DIR .. "src/mame/video/sprint4.cpp",
1014	1083	MAME_DIR .. "src/mame/audio/sprint4.cpp",
	1084	MAME_DIR .. "src/mame/audio/sprint4.h",
1015	1085	MAME_DIR .. "src/mame/drivers/sprint8.cpp",
	1086	MAME_DIR .. "src/mame/includes/sprint8.h",
1016	1087	MAME_DIR .. "src/mame/audio/sprint8.cpp",
1017	1088	MAME_DIR .. "src/mame/video/sprint8.cpp",
1018	1089	MAME_DIR .. "src/mame/drivers/starshp1.cpp",
	1090	MAME_DIR .. "src/mame/includes/starshp1.h",
1019	1091	MAME_DIR .. "src/mame/audio/starshp1.cpp",
1020	1092	MAME_DIR .. "src/mame/video/starshp1.cpp",
1021	1093	MAME_DIR .. "src/mame/drivers/starwars.cpp",
	1094	MAME_DIR .. "src/mame/includes/starwars.h",
1022	1095	MAME_DIR .. "src/mame/machine/starwars.cpp",
1023	1096	MAME_DIR .. "src/mame/audio/starwars.cpp",
1024	1097	MAME_DIR .. "src/mame/drivers/subs.cpp",
	1098	MAME_DIR .. "src/mame/includes/subs.h",
1025	1099	MAME_DIR .. "src/mame/machine/subs.cpp",
1026	1100	MAME_DIR .. "src/mame/audio/subs.cpp",
1027	1101	MAME_DIR .. "src/mame/video/subs.cpp",
1028	1102	MAME_DIR .. "src/mame/drivers/tank8.cpp",
	1103	MAME_DIR .. "src/mame/includes/tank8.h",
1029	1104	MAME_DIR .. "src/mame/audio/tank8.cpp",
1030	1105	MAME_DIR .. "src/mame/video/tank8.cpp",
1031	1106	MAME_DIR .. "src/mame/drivers/tempest.cpp",
1032	1107	MAME_DIR .. "src/mame/drivers/thunderj.cpp",
	1108	MAME_DIR .. "src/mame/includes/thunderj.h",
1033	1109	MAME_DIR .. "src/mame/video/thunderj.cpp",
1034	1110	MAME_DIR .. "src/mame/drivers/tomcat.cpp",
1035	1111	MAME_DIR .. "src/mame/drivers/toobin.cpp",
	1112	MAME_DIR .. "src/mame/includes/toobin.h",
1036	1113	MAME_DIR .. "src/mame/video/toobin.cpp",
1037	1114	MAME_DIR .. "src/mame/drivers/tourtabl.cpp",
1038	1115	MAME_DIR .. "src/mame/video/tia.cpp",
	1116	MAME_DIR .. "src/mame/video/tia.h",
1039	1117	MAME_DIR .. "src/mame/drivers/triplhnt.cpp",
	1118	MAME_DIR .. "src/mame/includes/triplhnt.h",
1040	1119	MAME_DIR .. "src/mame/audio/triplhnt.cpp",
1041	1120	MAME_DIR .. "src/mame/video/triplhnt.cpp",
1042	1121	MAME_DIR .. "src/mame/drivers/tunhunt.cpp",
	1122	MAME_DIR .. "src/mame/includes/tunhunt.h",
1043	1123	MAME_DIR .. "src/mame/video/tunhunt.cpp",
1044	1124	MAME_DIR .. "src/mame/drivers/ultratnk.cpp",
	1125	MAME_DIR .. "src/mame/includes/ultratnk.h",
1045	1126	MAME_DIR .. "src/mame/video/ultratnk.cpp",
1046	1127	MAME_DIR .. "src/mame/drivers/videopin.cpp",
	1128	MAME_DIR .. "src/mame/includes/videopin.h",
1047	1129	MAME_DIR .. "src/mame/audio/videopin.cpp",
1048	1130	MAME_DIR .. "src/mame/video/videopin.cpp",
1049	1131	MAME_DIR .. "src/mame/drivers/vindictr.cpp",
	1132	MAME_DIR .. "src/mame/includes/vindictr.h",
1050	1133	MAME_DIR .. "src/mame/video/vindictr.cpp",
1051	1134	MAME_DIR .. "src/mame/drivers/wolfpack.cpp",
	1135	MAME_DIR .. "src/mame/includes/wolfpack.h",
1052	1136	MAME_DIR .. "src/mame/video/wolfpack.cpp",
1053	1137	MAME_DIR .. "src/mame/drivers/xybots.cpp",
	1138	MAME_DIR .. "src/mame/includes/xybots.h",
1054	1139	MAME_DIR .. "src/mame/video/xybots.cpp",
1055	1140	MAME_DIR .. "src/mame/machine/asic65.cpp",
	1141	MAME_DIR .. "src/mame/machine/asic65.h",
1056	1142	MAME_DIR .. "src/mame/machine/atari_vg.cpp",
	1143	MAME_DIR .. "src/mame/machine/atari_vg.h",
1057	1144	MAME_DIR .. "src/mame/machine/atarigen.cpp",
	1145	MAME_DIR .. "src/mame/machine/atarigen.h",
1058	1146	MAME_DIR .. "src/mame/machine/mathbox.cpp",
	1147	MAME_DIR .. "src/mame/machine/mathbox.h",
1059	1148	MAME_DIR .. "src/mame/machine/slapstic.cpp",
1060	1149	MAME_DIR .. "src/mame/audio/atarijsa.cpp",
	1150	MAME_DIR .. "src/mame/audio/atarijsa.h",
1061	1151	MAME_DIR .. "src/mame/audio/cage.cpp",
	1152	MAME_DIR .. "src/mame/audio/cage.h",
1062	1153	MAME_DIR .. "src/mame/audio/redbaron.cpp",
	1154	MAME_DIR .. "src/mame/audio/redbaron.h",
1063	1155	MAME_DIR .. "src/mame/video/atarimo.cpp",
	1156	MAME_DIR .. "src/mame/video/atarimo.h",
1064	1157	MAME_DIR .. "src/mame/video/atarirle.cpp",
	1158	MAME_DIR .. "src/mame/video/atarirle.h",
1065	1159	}
1066	1160
1067	1161	createMAMEProjects(_target, _subtarget, "atlus")
1068	1162	files {
1069	1163	MAME_DIR .. "src/mame/drivers/blmbycar.cpp",
	1164	MAME_DIR .. "src/mame/includes/blmbycar.h",
1070	1165	MAME_DIR .. "src/mame/video/blmbycar.cpp",
1071	1166	MAME_DIR .. "src/mame/drivers/ohmygod.cpp",
	1167	MAME_DIR .. "src/mame/includes/ohmygod.h",
1072	1168	MAME_DIR .. "src/mame/video/ohmygod.cpp",
1073	1169	MAME_DIR .. "src/mame/drivers/powerins.cpp",
	1170	MAME_DIR .. "src/mame/includes/powerins.h",
1074	1171	MAME_DIR .. "src/mame/video/powerins.cpp",
1075	1172	MAME_DIR .. "src/mame/drivers/bowltry.cpp",
1076	1173	}
r250251	r250252
1082	1179	MAME_DIR .. "src/mame/drivers/mpu4hw.cpp",
1083	1180	MAME_DIR .. "src/mame/drivers/mpu4sw.cpp",
1084	1181	MAME_DIR .. "src/mame/drivers/mpu4.cpp",
	1182	MAME_DIR .. "src/mame/includes/mpu4.h",
1085	1183	MAME_DIR .. "src/mame/drivers/mpu4mod2sw.cpp",
1086	1184	MAME_DIR .. "src/mame/drivers/mpu4mod4yam.cpp",
1087	1185	MAME_DIR .. "src/mame/drivers/mpu4plasma.cpp",
r250251	r250252
1098	1196	MAME_DIR .. "src/mame/drivers/mpu5hw.cpp",
1099	1197	MAME_DIR .. "src/mame/drivers/mpu5.cpp",
1100	1198	MAME_DIR .. "src/mame/video/awpvid.cpp",
	1199	MAME_DIR .. "src/mame/video/awpvid.h",
1101	1200	MAME_DIR .. "src/mame/machine/meters.cpp",
	1201	MAME_DIR .. "src/mame/machine/meters.h",
1102	1202	}
1103	1203
1104	1204	createMAMEProjects(_target, _subtarget, "bfm")
1105	1205	files {
1106	1206	MAME_DIR .. "src/mame/drivers/bfcobra.cpp",
1107	1207	MAME_DIR .. "src/mame/machine/bfm_comn.cpp",
	1208	MAME_DIR .. "src/mame/machine/bfm_comn.h",
1108	1209	MAME_DIR .. "src/mame/drivers/bfm_sc1.cpp",
1109	1210	MAME_DIR .. "src/mame/drivers/bfm_sc2.cpp",
1110	1211	MAME_DIR .. "src/mame/video/bfm_adr2.cpp",
	1212	MAME_DIR .. "src/mame/video/bfm_adr2.h",
1111	1213	MAME_DIR .. "src/mame/drivers/bfm_sc4.cpp",
1112	1214	MAME_DIR .. "src/mame/drivers/bfm_sc4h.cpp",
1113	1215	MAME_DIR .. "src/mame/drivers/bfm_sc5.cpp",
	1216	MAME_DIR .. "src/mame/includes/bfm_sc5.h",
1114	1217	MAME_DIR .. "src/mame/drivers/bfm_sc5sw.cpp",
1115	1218	MAME_DIR .. "src/mame/drivers/bfm_ad5.cpp",
	1219	MAME_DIR .. "src/mame/includes/bfm_ad5.h",
1116	1220	MAME_DIR .. "src/mame/drivers/bfm_ad5sw.cpp",
1117	1221	MAME_DIR .. "src/mame/drivers/bfm_sc45_helper.cpp",
	1222	MAME_DIR .. "src/mame/drivers/bfm_sc45_helper.h",
	1223	MAME_DIR .. "src/mame/includes/bfm_sc45.h",
1118	1224	MAME_DIR .. "src/mame/drivers/bfm_swp.cpp",
1119	1225	MAME_DIR .. "src/mame/drivers/bfmsys83.cpp",
1120	1226	MAME_DIR .. "src/mame/drivers/bfmsys85.cpp",
1121	1227	MAME_DIR .. "src/mame/machine/sec.cpp",
	1228	MAME_DIR .. "src/mame/machine/sec.h",
1122	1229	MAME_DIR .. "src/mame/machine/bfm_bd1.cpp",
	1230	MAME_DIR .. "src/mame/machine/bfm_bd1.h",
1123	1231	MAME_DIR .. "src/mame/machine/bfm_bda.cpp",
	1232	MAME_DIR .. "src/mame/machine/bfm_bda.h",
1124	1233	MAME_DIR .. "src/mame/video/bfm_dm01.cpp",
	1234	MAME_DIR .. "src/mame/video/bfm_dm01.h",
1125	1235	MAME_DIR .. "src/mame/drivers/rastersp.cpp",
1126	1236	}
1127	1237
r250251	r250252
1136	1246	createMAMEProjects(_target, _subtarget, "capcom")
1137	1247	files {
1138	1248	MAME_DIR .. "src/mame/drivers/1942.cpp",
	1249	MAME_DIR .. "src/mame/includes/1942.h",
1139	1250	MAME_DIR .. "src/mame/video/1942.cpp",
1140	1251	MAME_DIR .. "src/mame/drivers/1943.cpp",
	1252	MAME_DIR .. "src/mame/includes/1943.h",
1141	1253	MAME_DIR .. "src/mame/video/1943.cpp",
1142	1254	MAME_DIR .. "src/mame/drivers/alien.cpp",
1143	1255	MAME_DIR .. "src/mame/drivers/bionicc.cpp",
	1256	MAME_DIR .. "src/mame/includes/bionicc.h",
1144	1257	MAME_DIR .. "src/mame/video/bionicc.cpp",
1145	1258	MAME_DIR .. "src/mame/drivers/supduck.cpp",
1146	1259	MAME_DIR .. "src/mame/video/tigeroad_spr.cpp",
	1260	MAME_DIR .. "src/mame/video/tigeroad_spr.h",
1147	1261	MAME_DIR .. "src/mame/drivers/blktiger.cpp",
	1262	MAME_DIR .. "src/mame/includes/blktiger.h",
1148	1263	MAME_DIR .. "src/mame/video/blktiger.cpp",
1149	1264	MAME_DIR .. "src/mame/drivers/cbasebal.cpp",
	1265	MAME_DIR .. "src/mame/includes/cbasebal.h",
1150	1266	MAME_DIR .. "src/mame/video/cbasebal.cpp",
1151	1267	MAME_DIR .. "src/mame/drivers/commando.cpp",
	1268	MAME_DIR .. "src/mame/includes/commando.h",
1152	1269	MAME_DIR .. "src/mame/video/commando.cpp",
1153	1270	MAME_DIR .. "src/mame/drivers/cps1.cpp",
	1271	MAME_DIR .. "src/mame/includes/cps1.h",
1154	1272	MAME_DIR .. "src/mame/video/cps1.cpp",
1155	1273	MAME_DIR .. "src/mame/drivers/kenseim.cpp",
1156	1274	MAME_DIR .. "src/mame/drivers/cps2.cpp",
1157	1275	MAME_DIR .. "src/mame/machine/cps2crpt.cpp",
	1276	MAME_DIR .. "src/mame/machine/cps2crypt.h",
1158	1277	MAME_DIR .. "src/mame/drivers/cps3.cpp",
	1278	MAME_DIR .. "src/mame/includes/cps3.h",
1159	1279	MAME_DIR .. "src/mame/audio/cps3.cpp",
	1280	MAME_DIR .. "src/mame/audio/cps3.h",
1160	1281	MAME_DIR .. "src/mame/drivers/egghunt.cpp",
1161	1282	MAME_DIR .. "src/mame/drivers/exedexes.cpp",
	1283	MAME_DIR .. "src/mame/includes/exedexes.h",
1162	1284	MAME_DIR .. "src/mame/video/exedexes.cpp",
1163	1285	MAME_DIR .. "src/mame/drivers/fcrash.cpp",
1164	1286	MAME_DIR .. "src/mame/drivers/gng.cpp",
	1287	MAME_DIR .. "src/mame/includes/gng.h",
1165	1288	MAME_DIR .. "src/mame/video/gng.cpp",
1166	1289	MAME_DIR .. "src/mame/drivers/gunsmoke.cpp",
	1290	MAME_DIR .. "src/mame/includes/gunsmoke.h",
1167	1291	MAME_DIR .. "src/mame/video/gunsmoke.cpp",
1168	1292	MAME_DIR .. "src/mame/drivers/higemaru.cpp",
	1293	MAME_DIR .. "src/mame/includes/higemaru.h",
1169	1294	MAME_DIR .. "src/mame/video/higemaru.cpp",
1170	1295	MAME_DIR .. "src/mame/drivers/lastduel.cpp",
	1296	MAME_DIR .. "src/mame/includes/lastduel.h",
1171	1297	MAME_DIR .. "src/mame/video/lastduel.cpp",
1172	1298	MAME_DIR .. "src/mame/drivers/lwings.cpp",
	1299	MAME_DIR .. "src/mame/includes/lwings.h",
1173	1300	MAME_DIR .. "src/mame/video/lwings.cpp",
1174	1301	MAME_DIR .. "src/mame/drivers/mitchell.cpp",
	1302	MAME_DIR .. "src/mame/includes/mitchell.h",
1175	1303	MAME_DIR .. "src/mame/video/mitchell.cpp",
1176	1304	MAME_DIR .. "src/mame/drivers/sf.cpp",
	1305	MAME_DIR .. "src/mame/includes/sf.h",
1177	1306	MAME_DIR .. "src/mame/video/sf.cpp",
1178	1307	MAME_DIR .. "src/mame/drivers/sidearms.cpp",
	1308	MAME_DIR .. "src/mame/includes/sidearms.h",
1179	1309	MAME_DIR .. "src/mame/video/sidearms.cpp",
1180	1310	MAME_DIR .. "src/mame/drivers/sonson.cpp",
	1311	MAME_DIR .. "src/mame/includes/sonson.h",
1181	1312	MAME_DIR .. "src/mame/video/sonson.cpp",
1182	1313	MAME_DIR .. "src/mame/drivers/srumbler.cpp",
	1314	MAME_DIR .. "src/mame/includes/srumbler.h",
1183	1315	MAME_DIR .. "src/mame/video/srumbler.cpp",
1184	1316	MAME_DIR .. "src/mame/drivers/tigeroad.cpp",
	1317	MAME_DIR .. "src/mame/includes/tigeroad.h",
1185	1318	MAME_DIR .. "src/mame/video/tigeroad.cpp",
1186	1319	MAME_DIR .. "src/mame/machine/tigeroad.cpp",
1187	1320	MAME_DIR .. "src/mame/drivers/vulgus.cpp",
	1321	MAME_DIR .. "src/mame/includes/vulgus.h",
1188	1322	MAME_DIR .. "src/mame/video/vulgus.cpp",
1189	1323	MAME_DIR .. "src/mame/machine/kabuki.cpp",
	1324	MAME_DIR .. "src/mame/machine/kabuki.h",
1190	1325	}
1191	1326
1192	1327	createMAMEProjects(_target, _subtarget, "cinemat")
1193	1328	files {
1194	1329	MAME_DIR .. "src/mame/drivers/ataxx.cpp",
1195	1330	MAME_DIR .. "src/mame/drivers/cinemat.cpp",
	1331	MAME_DIR .. "src/mame/includes/cinemat.h",
1196	1332	MAME_DIR .. "src/mame/audio/cinemat.cpp",
1197	1333	MAME_DIR .. "src/mame/video/cinemat.cpp",
1198	1334	MAME_DIR .. "src/mame/drivers/cchasm.cpp",
	1335	MAME_DIR .. "src/mame/includes/cchasm.h",
1199	1336	MAME_DIR .. "src/mame/machine/cchasm.cpp",
1200	1337	MAME_DIR .. "src/mame/audio/cchasm.cpp",
1201	1338	MAME_DIR .. "src/mame/video/cchasm.cpp",
r250251	r250252
1203	1340	MAME_DIR .. "src/mame/drivers/dlair2.cpp",
1204	1341	MAME_DIR .. "src/mame/drivers/embargo.cpp",
1205	1342	MAME_DIR .. "src/mame/drivers/jack.cpp",
	1343	MAME_DIR .. "src/mame/includes/jack.h",
1206	1344	MAME_DIR .. "src/mame/video/jack.cpp",
1207	1345	MAME_DIR .. "src/mame/drivers/leland.cpp",
	1346	MAME_DIR .. "src/mame/includes/leland.h",
1208	1347	MAME_DIR .. "src/mame/machine/leland.cpp",
1209	1348	MAME_DIR .. "src/mame/audio/leland.cpp",
1210	1349	MAME_DIR .. "src/mame/video/leland.cpp",
r250251	r250252
1213	1352	createMAMEProjects(_target, _subtarget, "comad")
1214	1353	files {
1215	1354	MAME_DIR .. "src/mame/drivers/funybubl.cpp",
	1355	MAME_DIR .. "src/mame/includes/funybubl.h",
1216	1356	MAME_DIR .. "src/mame/video/funybubl.cpp",
1217	1357	MAME_DIR .. "src/mame/drivers/galspnbl.cpp",
	1358	MAME_DIR .. "src/mame/includes/galspnbl.h",
1218	1359	MAME_DIR .. "src/mame/video/galspnbl.cpp",
1219	1360	MAME_DIR .. "src/mame/drivers/zerozone.cpp",
	1361	MAME_DIR .. "src/mame/includes/zerozone.h",
1220	1362	MAME_DIR .. "src/mame/video/zerozone.cpp",
1221	1363	}
1222	1364
1223	1365	createMAMEProjects(_target, _subtarget, "cvs")
1224	1366	files {
1225	1367	MAME_DIR .. "src/mame/drivers/cvs.cpp",
	1368	MAME_DIR .. "src/mame/includes/cvs.h",
1226	1369	MAME_DIR .. "src/mame/video/cvs.cpp",
1227	1370	MAME_DIR .. "src/mame/drivers/galaxia.cpp",
	1371	MAME_DIR .. "src/mame/includes/galaxia.h",
1228	1372	MAME_DIR .. "src/mame/video/galaxia.cpp",
1229	1373	MAME_DIR .. "src/mame/drivers/quasar.cpp",
	1374	MAME_DIR .. "src/mame/includes/quasar.h",
1230	1375	MAME_DIR .. "src/mame/video/quasar.cpp",
1231	1376	}
1232	1377
1233	1378	createMAMEProjects(_target, _subtarget, "dataeast")
1234	1379	files {
1235	1380	MAME_DIR .. "src/mame/drivers/actfancr.cpp",
	1381	MAME_DIR .. "src/mame/includes/actfancr.h",
1236	1382	MAME_DIR .. "src/mame/video/actfancr.cpp",
1237	1383	MAME_DIR .. "src/mame/drivers/astrof.cpp",
	1384	MAME_DIR .. "src/mame/includes/astrof.h",
1238	1385	MAME_DIR .. "src/mame/audio/astrof.cpp",
1239	1386	MAME_DIR .. "src/mame/drivers/backfire.cpp",
1240	1387	MAME_DIR .. "src/mame/drivers/battlera.cpp",
	1388	MAME_DIR .. "src/mame/includes/battlera.h",
1241	1389	MAME_DIR .. "src/mame/drivers/boogwing.cpp",
	1390	MAME_DIR .. "src/mame/includes/boogwing.h",
1242	1391	MAME_DIR .. "src/mame/video/boogwing.cpp",
1243	1392	MAME_DIR .. "src/mame/drivers/brkthru.cpp",
	1393	MAME_DIR .. "src/mame/includes/brkthru.h",
1244	1394	MAME_DIR .. "src/mame/video/brkthru.cpp",
1245	1395	MAME_DIR .. "src/mame/drivers/btime.cpp",
	1396	MAME_DIR .. "src/mame/includes/btime.h",
1246	1397	MAME_DIR .. "src/mame/machine/btime.cpp",
1247	1398	MAME_DIR .. "src/mame/video/btime.cpp",
1248	1399	MAME_DIR .. "src/mame/drivers/bwing.cpp",
	1400	MAME_DIR .. "src/mame/includes/bwing.h",
1249	1401	MAME_DIR .. "src/mame/video/bwing.cpp",
1250	1402	MAME_DIR .. "src/mame/drivers/cbuster.cpp",
	1403	MAME_DIR .. "src/mame/includes/cbuster.h",
1251	1404	MAME_DIR .. "src/mame/video/cbuster.cpp",
1252	1405	MAME_DIR .. "src/mame/drivers/chanbara.cpp",
1253	1406	MAME_DIR .. "src/mame/drivers/cninja.cpp",
	1407	MAME_DIR .. "src/mame/includes/cninja.h",
1254	1408	MAME_DIR .. "src/mame/video/cninja.cpp",
1255	1409	MAME_DIR .. "src/mame/drivers/cntsteer.cpp",
1256	1410	MAME_DIR .. "src/mame/drivers/compgolf.cpp",
	1411	MAME_DIR .. "src/mame/includes/compgolf.h",
1257	1412	MAME_DIR .. "src/mame/video/compgolf.cpp",
1258	1413	MAME_DIR .. "src/mame/drivers/darkseal.cpp",
	1414	MAME_DIR .. "src/mame/includes/darkseal.h",
1259	1415	MAME_DIR .. "src/mame/video/darkseal.cpp",
1260	1416	MAME_DIR .. "src/mame/drivers/dassault.cpp",
	1417	MAME_DIR .. "src/mame/includes/dassault.h",
1261	1418	MAME_DIR .. "src/mame/video/dassault.cpp",
1262	1419	MAME_DIR .. "src/mame/drivers/dblewing.cpp",
1263	1420	MAME_DIR .. "src/mame/drivers/dec0.cpp",
	1421	MAME_DIR .. "src/mame/includes/dec0.h",
1264	1422	MAME_DIR .. "src/mame/machine/dec0.cpp",
1265	1423	MAME_DIR .. "src/mame/video/dec0.cpp",
1266	1424	MAME_DIR .. "src/mame/drivers/dec8.cpp",
	1425	MAME_DIR .. "src/mame/includes/dec8.h",
1267	1426	MAME_DIR .. "src/mame/video/dec8.cpp",
1268	1427	MAME_DIR .. "src/mame/machine/deco222.cpp",
	1428	MAME_DIR .. "src/mame/machine/deco222.h",
1269	1429	MAME_DIR .. "src/mame/machine/decocpu7.cpp",
	1430	MAME_DIR .. "src/mame/machine/decocpu7.h",
1270	1431	MAME_DIR .. "src/mame/machine/decocpu6.cpp",
	1432	MAME_DIR .. "src/mame/machine/decocpu6.h",
1271	1433	MAME_DIR .. "src/mame/drivers/deco_ld.cpp",
1272	1434	MAME_DIR .. "src/mame/drivers/deco_mlc.cpp",
	1435	MAME_DIR .. "src/mame/includes/deco_mlc.h",
1273	1436	MAME_DIR .. "src/mame/video/deco_mlc.cpp",
1274	1437	MAME_DIR .. "src/mame/drivers/deco156.cpp",
1275	1438	MAME_DIR .. "src/mame/machine/deco156.cpp",
1276	1439	MAME_DIR .. "src/mame/drivers/deco32.cpp",
	1440	MAME_DIR .. "src/mame/includes/deco32.h",
1277	1441	MAME_DIR .. "src/mame/video/deco32.cpp",
1278	1442	MAME_DIR .. "src/mame/video/dvi.cpp",
1279	1443	MAME_DIR .. "src/mame/video/deco_zoomspr.cpp",
	1444	MAME_DIR .. "src/mame/video/deco_zoomspr.h",
1280	1445	MAME_DIR .. "src/mame/drivers/decocass.cpp",
	1446	MAME_DIR .. "src/mame/includes/decocass.h",
1281	1447	MAME_DIR .. "src/mame/machine/decocass.cpp",
1282	1448	MAME_DIR .. "src/mame/machine/decocass_tape.cpp",
	1449	MAME_DIR .. "src/mame/machine/decocass_tape.h",
1283	1450	MAME_DIR .. "src/mame/video/decocass.cpp",
1284	1451	MAME_DIR .. "src/mame/drivers/deshoros.cpp",
1285	1452	MAME_DIR .. "src/mame/drivers/dietgo.cpp",
	1453	MAME_DIR .. "src/mame/includes/dietgo.h",
1286	1454	MAME_DIR .. "src/mame/video/dietgo.cpp",
1287	1455	MAME_DIR .. "src/mame/drivers/dreambal.cpp",
1288	1456	MAME_DIR .. "src/mame/drivers/exprraid.cpp",
	1457	MAME_DIR .. "src/mame/includes/exprraid.h",
1289	1458	MAME_DIR .. "src/mame/video/exprraid.cpp",
1290	1459	MAME_DIR .. "src/mame/drivers/firetrap.cpp",
	1460	MAME_DIR .. "src/mame/includes/firetrap.h",
1291	1461	MAME_DIR .. "src/mame/video/firetrap.cpp",
1292	1462	MAME_DIR .. "src/mame/drivers/funkyjet.cpp",
	1463	MAME_DIR .. "src/mame/includes/funkyjet.h",
1293	1464	MAME_DIR .. "src/mame/video/funkyjet.cpp",
1294	1465	MAME_DIR .. "src/mame/drivers/karnov.cpp",
	1466	MAME_DIR .. "src/mame/includes/karnov.h",
1295	1467	MAME_DIR .. "src/mame/video/karnov.cpp",
1296	1468	MAME_DIR .. "src/mame/drivers/kchamp.cpp",
	1469	MAME_DIR .. "src/mame/includes/kchamp.h",
1297	1470	MAME_DIR .. "src/mame/video/kchamp.cpp",
1298	1471	MAME_DIR .. "src/mame/drivers/kingobox.cpp",
	1472	MAME_DIR .. "src/mame/includes/kingobox.h",
1299	1473	MAME_DIR .. "src/mame/video/kingobox.cpp",
1300	1474	MAME_DIR .. "src/mame/drivers/lemmings.cpp",
	1475	MAME_DIR .. "src/mame/includes/lemmings.h",
1301	1476	MAME_DIR .. "src/mame/video/lemmings.cpp",
1302	1477	MAME_DIR .. "src/mame/drivers/liberate.cpp",
	1478	MAME_DIR .. "src/mame/includes/liberate.h",
1303	1479	MAME_DIR .. "src/mame/video/liberate.cpp",
1304	1480	MAME_DIR .. "src/mame/drivers/madalien.cpp",
	1481	MAME_DIR .. "src/mame/includes/madalien.h",
1305	1482	MAME_DIR .. "src/mame/audio/madalien.cpp",
1306	1483	MAME_DIR .. "src/mame/video/madalien.cpp",
1307	1484	MAME_DIR .. "src/mame/drivers/madmotor.cpp",
	1485	MAME_DIR .. "src/mame/includes/madmotor.h",
1308	1486	MAME_DIR .. "src/mame/video/madmotor.cpp",
1309	1487	MAME_DIR .. "src/mame/drivers/metlclsh.cpp",
	1488	MAME_DIR .. "src/mame/includes/metlclsh.h",
1310	1489	MAME_DIR .. "src/mame/video/metlclsh.cpp",
1311	1490	MAME_DIR .. "src/mame/drivers/mirage.cpp",
1312	1491	MAME_DIR .. "src/mame/drivers/pcktgal.cpp",
	1492	MAME_DIR .. "src/mame/includes/pcktgal.h",
1313	1493	MAME_DIR .. "src/mame/video/pcktgal.cpp",
1314	1494	MAME_DIR .. "src/mame/drivers/pktgaldx.cpp",
	1495	MAME_DIR .. "src/mame/includes/pktgaldx.h",
1315	1496	MAME_DIR .. "src/mame/video/pktgaldx.cpp",
1316	1497	MAME_DIR .. "src/mame/drivers/progolf.cpp",
1317	1498	MAME_DIR .. "src/mame/drivers/rohga.cpp",
	1499	MAME_DIR .. "src/mame/includes/rohga.h",
1318	1500	MAME_DIR .. "src/mame/video/rohga.cpp",
1319	1501	MAME_DIR .. "src/mame/drivers/shootout.cpp",
	1502	MAME_DIR .. "src/mame/includes/shootout.h",
1320	1503	MAME_DIR .. "src/mame/video/shootout.cpp",
1321	1504	MAME_DIR .. "src/mame/drivers/sidepckt.cpp",
	1505	MAME_DIR .. "src/mame/includes/sidepckt.h",
1322	1506	MAME_DIR .. "src/mame/video/sidepckt.cpp",
1323	1507	MAME_DIR .. "src/mame/drivers/simpl156.cpp",
	1508	MAME_DIR .. "src/mame/includes/simpl156.h",
1324	1509	MAME_DIR .. "src/mame/video/simpl156.cpp",
1325	1510	MAME_DIR .. "src/mame/drivers/sshangha.cpp",
	1511	MAME_DIR .. "src/mame/includes/sshangha.h",
1326	1512	MAME_DIR .. "src/mame/video/sshangha.cpp",
1327	1513	MAME_DIR .. "src/mame/drivers/stadhero.cpp",
	1514	MAME_DIR .. "src/mame/includes/stadhero.h",
1328	1515	MAME_DIR .. "src/mame/video/stadhero.cpp",
1329	1516	MAME_DIR .. "src/mame/drivers/supbtime.cpp",
	1517	MAME_DIR .. "src/mame/includes/supbtime.h",
1330	1518	MAME_DIR .. "src/mame/video/supbtime.cpp",
1331	1519	MAME_DIR .. "src/mame/drivers/tryout.cpp",
	1520	MAME_DIR .. "src/mame/includes/tryout.h",
1332	1521	MAME_DIR .. "src/mame/video/tryout.cpp",
1333	1522	MAME_DIR .. "src/mame/drivers/tumbleb.cpp",
	1523	MAME_DIR .. "src/mame/includes/tumbleb.h",
1334	1524	MAME_DIR .. "src/mame/video/tumbleb.cpp",
1335	1525	MAME_DIR .. "src/mame/drivers/tumblep.cpp",
	1526	MAME_DIR .. "src/mame/includes/tumblep.h",
1336	1527	MAME_DIR .. "src/mame/video/tumblep.cpp",
1337	1528	MAME_DIR .. "src/mame/drivers/vaportra.cpp",
	1529	MAME_DIR .. "src/mame/includes/vaportra.h",
1338	1530	MAME_DIR .. "src/mame/video/vaportra.cpp",
1339	1531	MAME_DIR .. "src/mame/machine/deco102.cpp",
1340	1532	MAME_DIR .. "src/mame/machine/decocrpt.cpp",
	1533	MAME_DIR .. "src/mame/includes/decocrpt.h",
1341	1534	MAME_DIR .. "src/mame/machine/deco104.cpp",
	1535	MAME_DIR .. "src/mame/machine/deco104.h",
1342	1536	MAME_DIR .. "src/mame/machine/deco146.cpp",
	1537	MAME_DIR .. "src/mame/machine/deco146.h",
1343	1538	MAME_DIR .. "src/mame/video/decbac06.cpp",
	1539	MAME_DIR .. "src/mame/video/decbac06.h",
1344	1540	MAME_DIR .. "src/mame/video/deco16ic.cpp",
	1541	MAME_DIR .. "src/mame/video/deco16ic.h",
1345	1542	MAME_DIR .. "src/mame/video/decocomn.cpp",
	1543	MAME_DIR .. "src/mame/video/decocomn.h",
1346	1544	MAME_DIR .. "src/mame/video/decospr.cpp",
	1545	MAME_DIR .. "src/mame/video/decospr.h",
1347	1546	MAME_DIR .. "src/mame/video/decmxc06.cpp",
	1547	MAME_DIR .. "src/mame/video/decmxc06.h",
1348	1548	MAME_DIR .. "src/mame/video/deckarn.cpp",
	1549	MAME_DIR .. "src/mame/video/deckarn.h",
1349	1550	}
1350	1551
1351	1552	createMAMEProjects(_target, _subtarget, "dgrm")
1352	1553	files {
1353	1554	MAME_DIR .. "src/mame/drivers/blackt96.cpp",
1354	1555	MAME_DIR .. "src/mame/drivers/pokechmp.cpp",
	1556	MAME_DIR .. "src/mame/includes/pokechmp.h",
1355	1557	MAME_DIR .. "src/mame/video/pokechmp.cpp",
1356	1558	}
1357	1559
1358	1560	createMAMEProjects(_target, _subtarget, "dooyong")
1359	1561	files {
1360	1562	MAME_DIR .. "src/mame/drivers/dooyong.cpp",
	1563	MAME_DIR .. "src/mame/includes/dooyong.h",
1361	1564	MAME_DIR .. "src/mame/video/dooyong.cpp",
1362	1565	MAME_DIR .. "src/mame/drivers/gundealr.cpp",
	1566	MAME_DIR .. "src/mame/includes/gundealr.h",
1363	1567	MAME_DIR .. "src/mame/video/gundealr.cpp",
1364	1568	}
1365	1569
r250251	r250252
1367	1571	files {
1368	1572	MAME_DIR .. "src/mame/drivers/ddenlovr.cpp",
1369	1573	MAME_DIR .. "src/mame/drivers/dynax.cpp",
	1574	MAME_DIR .. "src/mame/includes/dynax.h",
1370	1575	MAME_DIR .. "src/mame/video/dynax.cpp",
1371	1576	MAME_DIR .. "src/mame/drivers/hnayayoi.cpp",
	1577	MAME_DIR .. "src/mame/includes/hnayayoi.h",
1372	1578	MAME_DIR .. "src/mame/video/hnayayoi.cpp",
1373	1579	MAME_DIR .. "src/mame/drivers/realbrk.cpp",
	1580	MAME_DIR .. "src/mame/includes/realbrk.h",
1374	1581	MAME_DIR .. "src/mame/video/realbrk.cpp",
1375	1582	MAME_DIR .. "src/mame/drivers/royalmah.cpp",
1376	1583	}
r250251	r250252
1379	1586	files {
1380	1587	MAME_DIR .. "src/mame/drivers/diverboy.cpp",
1381	1588	MAME_DIR .. "src/mame/drivers/fantland.cpp",
	1589	MAME_DIR .. "src/mame/includes/fantland.h",
1382	1590	MAME_DIR .. "src/mame/video/fantland.cpp",
1383	1591	MAME_DIR .. "src/mame/drivers/mwarr.cpp",
1384	1592	MAME_DIR .. "src/mame/drivers/mugsmash.cpp",
	1593	MAME_DIR .. "src/mame/includes/mugsmash.h",
1385	1594	MAME_DIR .. "src/mame/video/mugsmash.cpp",
1386	1595	MAME_DIR .. "src/mame/drivers/ppmast93.cpp",
1387	1596	MAME_DIR .. "src/mame/drivers/pzletime.cpp",
1388	1597	MAME_DIR .. "src/mame/drivers/stlforce.cpp",
	1598	MAME_DIR .. "src/mame/includes/stlforce.h",
1389	1599	MAME_DIR .. "src/mame/video/stlforce.cpp",
1390	1600	MAME_DIR .. "src/mame/drivers/twins.cpp",
1391	1601	}
r250251	r250252
1393	1603	createMAMEProjects(_target, _subtarget, "eolith")
1394	1604	files {
1395	1605	MAME_DIR .. "src/mame/drivers/eolith.cpp",
	1606	MAME_DIR .. "src/mame/includes/eolith.h",
1396	1607	MAME_DIR .. "src/mame/video/eolith.cpp",
1397	1608	MAME_DIR .. "src/mame/drivers/eolith16.cpp",
1398	1609	MAME_DIR .. "src/mame/drivers/eolithsp.cpp",
r250251	r250252
1403	1614	createMAMEProjects(_target, _subtarget, "excelent")
1404	1615	files {
1405	1616	MAME_DIR .. "src/mame/drivers/aquarium.cpp",
	1617	MAME_DIR .. "src/mame/includes/aquarium.h",
1406	1618	MAME_DIR .. "src/mame/video/aquarium.cpp",
1407	1619	MAME_DIR .. "src/mame/drivers/d9final.cpp",
1408	1620	MAME_DIR .. "src/mame/drivers/dblcrown.cpp",
1409	1621	MAME_DIR .. "src/mame/drivers/gcpinbal.cpp",
	1622	MAME_DIR .. "src/mame/includes/gcpinbal.h",
1410	1623	MAME_DIR .. "src/mame/video/gcpinbal.cpp",
1411	1624	MAME_DIR .. "src/mame/video/excellent_spr.cpp",
	1625	MAME_DIR .. "src/mame/video/excellent_spr.h",
1412	1626	MAME_DIR .. "src/mame/drivers/lastbank.cpp",
1413	1627	}
1414	1628
1415	1629	createMAMEProjects(_target, _subtarget, "exidy")
1416	1630	files {
1417	1631	MAME_DIR .. "src/mame/drivers/carpolo.cpp",
	1632	MAME_DIR .. "src/mame/includes/carpolo.h",
1418	1633	MAME_DIR .. "src/mame/machine/carpolo.cpp",
1419	1634	MAME_DIR .. "src/mame/video/carpolo.cpp",
1420	1635	MAME_DIR .. "src/mame/drivers/circus.cpp",
	1636	MAME_DIR .. "src/mame/includes/circus.h",
1421	1637	MAME_DIR .. "src/mame/audio/circus.cpp",
1422	1638	MAME_DIR .. "src/mame/video/circus.cpp",
1423	1639	MAME_DIR .. "src/mame/drivers/exidy.cpp",
	1640	MAME_DIR .. "src/mame/includes/exidy.h",
1424	1641	MAME_DIR .. "src/mame/audio/exidy.cpp",
	1642	MAME_DIR .. "src/mame/audio/exidy.h",
1425	1643	MAME_DIR .. "src/mame/video/exidy.cpp",
1426	1644	MAME_DIR .. "src/mame/audio/targ.cpp",
1427	1645	MAME_DIR .. "src/mame/drivers/exidy440.cpp",
	1646	MAME_DIR .. "src/mame/includes/exidy440.h",
1428	1647	MAME_DIR .. "src/mame/audio/exidy440.cpp",
	1648	MAME_DIR .. "src/mame/audio/exidy440.h",
1429	1649	MAME_DIR .. "src/mame/video/exidy440.cpp",
1430	1650	MAME_DIR .. "src/mame/drivers/exidyttl.cpp",
1431	1651	MAME_DIR .. "src/mame/drivers/maxaflex.cpp",
1432	1652	MAME_DIR .. "src/mame/machine/atari.cpp",
	1653	MAME_DIR .. "src/mame/includes/atari.h",
1433	1654	MAME_DIR .. "src/mame/video/atari.cpp",
1434	1655	MAME_DIR .. "src/mame/video/antic.cpp",
	1656	MAME_DIR .. "src/mame/video/antic.h",
1435	1657	MAME_DIR .. "src/mame/video/gtia.cpp",
	1658	MAME_DIR .. "src/mame/video/gtia.h",
1436	1659	MAME_DIR .. "src/mame/drivers/starfire.cpp",
	1660	MAME_DIR .. "src/mame/includes/starfire.h",
1437	1661	MAME_DIR .. "src/mame/video/starfire.cpp",
1438	1662	MAME_DIR .. "src/mame/drivers/vertigo.cpp",
	1663	MAME_DIR .. "src/mame/includes/vertigo.h",
1439	1664	MAME_DIR .. "src/mame/machine/vertigo.cpp",
1440	1665	MAME_DIR .. "src/mame/video/vertigo.cpp",
1441	1666	MAME_DIR .. "src/mame/drivers/victory.cpp",
	1667	MAME_DIR .. "src/mame/includes/victory.h",
1442	1668	MAME_DIR .. "src/mame/video/victory.cpp",
1443	1669	}
1444	1670
1445	1671	createMAMEProjects(_target, _subtarget, "f32")
1446	1672	files {
1447	1673	MAME_DIR .. "src/mame/drivers/crospang.cpp",
	1674	MAME_DIR .. "src/mame/includes/crospang.h",
1448	1675	MAME_DIR .. "src/mame/video/crospang.cpp",
1449	1676	MAME_DIR .. "src/mame/drivers/silvmil.cpp",
1450	1677	MAME_DIR .. "src/mame/drivers/f-32.cpp",
r250251	r250252
1454	1681	files {
1455	1682	MAME_DIR .. "src/mame/drivers/4roses.cpp",
1456	1683	MAME_DIR .. "src/mame/drivers/funworld.cpp",
	1684	MAME_DIR .. "src/mame/includes/funworld.h",
1457	1685	MAME_DIR .. "src/mame/video/funworld.cpp",
1458	1686	MAME_DIR .. "src/mame/drivers/snookr10.cpp",
	1687	MAME_DIR .. "src/mame/includes/snookr10.h",
1459	1688	MAME_DIR .. "src/mame/video/snookr10.cpp",
1460	1689	}
1461	1690
1462	1691	createMAMEProjects(_target, _subtarget, "fuuki")
1463	1692	files {
1464	1693	MAME_DIR .. "src/mame/drivers/fuukifg2.cpp",
	1694	MAME_DIR .. "src/mame/includes/fuukifg2.h",
1465	1695	MAME_DIR .. "src/mame/video/fuukifg2.cpp",
1466	1696	MAME_DIR .. "src/mame/drivers/fuukifg3.cpp",
	1697	MAME_DIR .. "src/mame/includes/fuukifg3.h",
1467	1698	MAME_DIR .. "src/mame/video/fuukifg3.cpp",
1468	1699	MAME_DIR .. "src/mame/video/fuukifg.cpp",
	1700	MAME_DIR .. "src/mame/video/fuukifg.h",
1469	1701	}
1470	1702
1471	1703	createMAMEProjects(_target, _subtarget, "gaelco")
1472	1704	files {
1473	1705	MAME_DIR .. "src/mame/drivers/atvtrack.cpp",
1474	1706	MAME_DIR .. "src/mame/drivers/gaelco.cpp",
	1707	MAME_DIR .. "src/mame/includes/gaelco.h",
1475	1708	MAME_DIR .. "src/mame/video/gaelco.cpp",
1476	1709	MAME_DIR .. "src/mame/machine/gaelcrpt.cpp",
	1710	MAME_DIR .. "src/mame/includes/gaelcrpt.h",
1477	1711	MAME_DIR .. "src/mame/drivers/gaelco2.cpp",
	1712	MAME_DIR .. "src/mame/includes/gaelco2.h",
1478	1713	MAME_DIR .. "src/mame/machine/gaelco2.cpp",
1479	1714	MAME_DIR .. "src/mame/video/gaelco2.cpp",
1480	1715	MAME_DIR .. "src/mame/drivers/gaelco3d.cpp",
	1716	MAME_DIR .. "src/mame/includes/gaelco3d.h",
1481	1717	MAME_DIR .. "src/mame/video/gaelco3d.cpp",
1482	1718	MAME_DIR .. "src/mame/machine/gaelco3d.cpp",
	1719	MAME_DIR .. "src/mame/machine/gaelco3d.h",
1483	1720	MAME_DIR .. "src/mame/drivers/glass.cpp",
	1721	MAME_DIR .. "src/mame/includes/glass.h",
1484	1722	MAME_DIR .. "src/mame/video/glass.cpp",
1485	1723	MAME_DIR .. "src/mame/drivers/mastboy.cpp",
1486	1724	MAME_DIR .. "src/mame/drivers/rollext.cpp",
1487	1725	MAME_DIR .. "src/mame/drivers/splash.cpp",
	1726	MAME_DIR .. "src/mame/includes/splash.h",
1488	1727	MAME_DIR .. "src/mame/video/splash.cpp",
1489	1728	MAME_DIR .. "src/mame/drivers/targeth.cpp",
	1729	MAME_DIR .. "src/mame/includes/targeth.h",
1490	1730	MAME_DIR .. "src/mame/video/targeth.cpp",
1491	1731	MAME_DIR .. "src/mame/drivers/thoop2.cpp",
	1732	MAME_DIR .. "src/mame/includes/thoop2.h",
1492	1733	MAME_DIR .. "src/mame/video/thoop2.cpp",
1493	1734	MAME_DIR .. "src/mame/drivers/tokyocop.cpp",
1494	1735	MAME_DIR .. "src/mame/drivers/wrally.cpp",
	1736	MAME_DIR .. "src/mame/includes/wrally.h",
1495	1737	MAME_DIR .. "src/mame/machine/wrally.cpp",
1496	1738	MAME_DIR .. "src/mame/video/wrally.cpp",
1497	1739	MAME_DIR .. "src/mame/drivers/xorworld.cpp",
	1740	MAME_DIR .. "src/mame/includes/xorworld.h",
1498	1741	MAME_DIR .. "src/mame/video/xorworld.cpp",
1499	1742	}
1500	1743
r250251	r250252
1502	1745	files {
1503	1746	MAME_DIR .. "src/mame/drivers/enigma2.cpp",
1504	1747	MAME_DIR .. "src/mame/drivers/gameplan.cpp",
	1748	MAME_DIR .. "src/mame/includes/gameplan.h",
1505	1749	MAME_DIR .. "src/mame/video/gameplan.cpp",
1506	1750	MAME_DIR .. "src/mame/drivers/toratora.cpp",
1507	1751	}
r250251	r250252
1509	1753	createMAMEProjects(_target, _subtarget, "gametron")
1510	1754	files {
1511	1755	MAME_DIR .. "src/mame/drivers/gatron.cpp",
	1756	MAME_DIR .. "src/mame/includes/gatron.h",
1512	1757	MAME_DIR .. "src/mame/video/gatron.cpp",
1513	1758	MAME_DIR .. "src/mame/drivers/gotya.cpp",
	1759	MAME_DIR .. "src/mame/includes/gotya.h",
1514	1760	MAME_DIR .. "src/mame/audio/gotya.cpp",
1515	1761	MAME_DIR .. "src/mame/video/gotya.cpp",
1516	1762	MAME_DIR .. "src/mame/drivers/sbugger.cpp",
	1763	MAME_DIR .. "src/mame/includes/sbugger.h",
1517	1764	MAME_DIR .. "src/mame/video/sbugger.cpp",
1518	1765	}
1519	1766
1520	1767	createMAMEProjects(_target, _subtarget, "gottlieb")
1521	1768	files {
1522	1769	MAME_DIR .. "src/mame/drivers/exterm.cpp",
	1770	MAME_DIR .. "src/mame/includes/exterm.h",
1523	1771	MAME_DIR .. "src/mame/video/exterm.cpp",
1524	1772	MAME_DIR .. "src/mame/drivers/gottlieb.cpp",
	1773	MAME_DIR .. "src/mame/includes/gottlieb.h",
1525	1774	MAME_DIR .. "src/mame/audio/gottlieb.cpp",
	1775	MAME_DIR .. "src/mame/audio/gottlieb.h",
1526	1776	MAME_DIR .. "src/mame/video/gottlieb.cpp",
1527	1777	}
1528	1778
r250251	r250252
1545	1795	MAME_DIR .. "src/mame/drivers/ddz.cpp",
1546	1796	MAME_DIR .. "src/mame/drivers/dunhuang.cpp",
1547	1797	MAME_DIR .. "src/mame/drivers/goldstar.cpp",
	1798	MAME_DIR .. "src/mame/includes/goldstar.h",
1548	1799	MAME_DIR .. "src/mame/video/goldstar.cpp",
1549	1800	MAME_DIR .. "src/mame/drivers/jackie.cpp",
1550	1801	MAME_DIR .. "src/mame/drivers/igspoker.cpp",
r250251	r250252
1552	1803	MAME_DIR .. "src/mame/drivers/igs011.cpp",
1553	1804	MAME_DIR .. "src/mame/drivers/igs017.cpp",
1554	1805	MAME_DIR .. "src/mame/video/igs017_igs031.cpp",
	1806	MAME_DIR .. "src/mame/video/igs017_igs031.h",
1555	1807	MAME_DIR .. "src/mame/drivers/igs_fear.cpp",
1556	1808	MAME_DIR .. "src/mame/drivers/igs_m027.cpp",
1557	1809	MAME_DIR .. "src/mame/drivers/igs_m036.cpp",
1558	1810	MAME_DIR .. "src/mame/drivers/iqblock.cpp",
	1811	MAME_DIR .. "src/mame/includes/iqblock.h",
1559	1812	MAME_DIR .. "src/mame/video/iqblock.cpp",
1560	1813	MAME_DIR .. "src/mame/drivers/lordgun.cpp",
	1814	MAME_DIR .. "src/mame/includes/lordgun.h",
1561	1815	MAME_DIR .. "src/mame/video/lordgun.cpp",
1562	1816	MAME_DIR .. "src/mame/drivers/pgm.cpp",
	1817	MAME_DIR .. "src/mame/includes/pgm.h",
1563	1818	MAME_DIR .. "src/mame/video/pgm.cpp",
1564	1819	MAME_DIR .. "src/mame/machine/pgmprot_igs027a_type1.cpp",
1565	1820	MAME_DIR .. "src/mame/machine/pgmprot_igs027a_type2.cpp",
r250251	r250252
1571	1826	MAME_DIR .. "src/mame/drivers/pgm2.cpp",
1572	1827	MAME_DIR .. "src/mame/drivers/spoker.cpp",
1573	1828	MAME_DIR .. "src/mame/machine/igs036crypt.cpp",
	1829	MAME_DIR .. "src/mame/machine/igs036crypt.h",
1574	1830	MAME_DIR .. "src/mame/machine/pgmcrypt.cpp",
	1831	MAME_DIR .. "src/mame/machine/pgmcrypt.h",
1575	1832	MAME_DIR .. "src/mame/machine/igs025.cpp",
	1833	MAME_DIR .. "src/mame/machine/igs025.h",
1576	1834	MAME_DIR .. "src/mame/machine/igs022.cpp",
	1835	MAME_DIR .. "src/mame/machine/igs022.h",
1577	1836	MAME_DIR .. "src/mame/machine/igs028.cpp",
	1837	MAME_DIR .. "src/mame/machine/igs028.h",
1578	1838	}
1579	1839
1580	1840	createMAMEProjects(_target, _subtarget, "irem")
1581	1841	files {
1582	1842	MAME_DIR .. "src/mame/drivers/m10.cpp",
	1843	MAME_DIR .. "src/mame/includes/m10.h",
1583	1844	MAME_DIR .. "src/mame/video/m10.cpp",
1584	1845	MAME_DIR .. "src/mame/drivers/m14.cpp",
1585	1846	MAME_DIR .. "src/mame/drivers/m52.cpp",
	1847	MAME_DIR .. "src/mame/includes/m52.h",
1586	1848	MAME_DIR .. "src/mame/video/m52.cpp",
1587	1849	MAME_DIR .. "src/mame/drivers/m57.cpp",
	1850	MAME_DIR .. "src/mame/includes/m57.h",
1588	1851	MAME_DIR .. "src/mame/video/m57.cpp",
1589	1852	MAME_DIR .. "src/mame/drivers/m58.cpp",
	1853	MAME_DIR .. "src/mame/includes/m58.h",
1590	1854	MAME_DIR .. "src/mame/video/m58.cpp",
1591	1855	MAME_DIR .. "src/mame/drivers/m62.cpp",
	1856	MAME_DIR .. "src/mame/includes/m62.h",
1592	1857	MAME_DIR .. "src/mame/video/m62.cpp",
1593	1858	MAME_DIR .. "src/mame/drivers/m63.cpp",
1594	1859	MAME_DIR .. "src/mame/drivers/m72.cpp",
	1860	MAME_DIR .. "src/mame/includes/m72.h",
1595	1861	MAME_DIR .. "src/mame/audio/m72.cpp",
	1862	MAME_DIR .. "src/mame/audio/m72.h",
1596	1863	MAME_DIR .. "src/mame/video/m72.cpp",
1597	1864	MAME_DIR .. "src/mame/drivers/m90.cpp",
	1865	MAME_DIR .. "src/mame/includes/m90.h",
1598	1866	MAME_DIR .. "src/mame/video/m90.cpp",
1599	1867	MAME_DIR .. "src/mame/drivers/m92.cpp",
	1868	MAME_DIR .. "src/mame/includes/m92.h",
1600	1869	MAME_DIR .. "src/mame/video/m92.cpp",
1601	1870	MAME_DIR .. "src/mame/drivers/m107.cpp",
	1871	MAME_DIR .. "src/mame/includes/m107.h",
1602	1872	MAME_DIR .. "src/mame/video/m107.cpp",
	1873	MAME_DIR .. "src/mame/includes/iremipt.h",
1603	1874	MAME_DIR .. "src/mame/drivers/olibochu.cpp",
1604	1875	MAME_DIR .. "src/mame/drivers/redalert.cpp",
	1876	MAME_DIR .. "src/mame/includes/redalert.h",
1605	1877	MAME_DIR .. "src/mame/audio/redalert.cpp",
1606	1878	MAME_DIR .. "src/mame/video/redalert.cpp",
1607	1879	MAME_DIR .. "src/mame/drivers/shisen.cpp",
	1880	MAME_DIR .. "src/mame/includes/shisen.h",
1608	1881	MAME_DIR .. "src/mame/video/shisen.cpp",
1609	1882	MAME_DIR .. "src/mame/drivers/travrusa.cpp",
	1883	MAME_DIR .. "src/mame/includes/travrusa.h",
1610	1884	MAME_DIR .. "src/mame/video/travrusa.cpp",
1611	1885	MAME_DIR .. "src/mame/drivers/vigilant.cpp",
	1886	MAME_DIR .. "src/mame/includes/vigilant.h",
1612	1887	MAME_DIR .. "src/mame/video/vigilant.cpp",
1613	1888	MAME_DIR .. "src/mame/machine/irem_cpu.cpp",
	1889	MAME_DIR .. "src/mame/machine/irem_cpu.h",
1614	1890	MAME_DIR .. "src/mame/audio/irem.cpp",
	1891	MAME_DIR .. "src/mame/audio/irem.h",
1615	1892	}
1616	1893
1617	1894	createMAMEProjects(_target, _subtarget, "itech")
1618	1895	files {
1619	1896	MAME_DIR .. "src/mame/drivers/capbowl.cpp",
	1897	MAME_DIR .. "src/mame/includes/capbowl.h",
1620	1898	MAME_DIR .. "src/mame/video/capbowl.cpp",
1621	1899	MAME_DIR .. "src/mame/drivers/itech8.cpp",
	1900	MAME_DIR .. "src/mame/includes/itech8.h",
1622	1901	MAME_DIR .. "src/mame/machine/slikshot.cpp",
1623	1902	MAME_DIR .. "src/mame/video/itech8.cpp",
1624	1903	MAME_DIR .. "src/mame/drivers/itech32.cpp",
	1904	MAME_DIR .. "src/mame/includes/itech32.h",
1625	1905	MAME_DIR .. "src/mame/video/itech32.cpp",
1626	1906	MAME_DIR .. "src/mame/drivers/iteagle.cpp",
1627	1907	MAME_DIR .. "src/mame/machine/iteagle_fpga.cpp",
	1908	MAME_DIR .. "src/mame/machine/iteagle_fpga.h",
1628	1909	}
1629	1910
1630	1911	createMAMEProjects(_target, _subtarget, "jaleco")
1631	1912	files {
1632	1913	MAME_DIR .. "src/mame/drivers/aeroboto.cpp",
	1914	MAME_DIR .. "src/mame/includes/aeroboto.h",
1633	1915	MAME_DIR .. "src/mame/video/aeroboto.cpp",
1634	1916	MAME_DIR .. "src/mame/drivers/argus.cpp",
	1917	MAME_DIR .. "src/mame/includes/argus.h",
1635	1918	MAME_DIR .. "src/mame/video/argus.cpp",
1636	1919	MAME_DIR .. "src/mame/drivers/bestleag.cpp",
1637	1920	MAME_DIR .. "src/mame/drivers/bigstrkb.cpp",
	1921	MAME_DIR .. "src/mame/includes/bigstrkb.h",
1638	1922	MAME_DIR .. "src/mame/video/bigstrkb.cpp",
1639	1923	MAME_DIR .. "src/mame/drivers/blueprnt.cpp",
	1924	MAME_DIR .. "src/mame/includes/blueprnt.h",
1640	1925	MAME_DIR .. "src/mame/video/blueprnt.cpp",
1641	1926	MAME_DIR .. "src/mame/drivers/bnstars.cpp",
1642	1927	MAME_DIR .. "src/mame/drivers/cischeat.cpp",
	1928	MAME_DIR .. "src/mame/includes/cischeat.h",
1643	1929	MAME_DIR .. "src/mame/video/cischeat.cpp",
1644	1930	MAME_DIR .. "src/mame/drivers/citycon.cpp",
	1931	MAME_DIR .. "src/mame/includes/citycon.h",
1645	1932	MAME_DIR .. "src/mame/video/citycon.cpp",
1646	1933	MAME_DIR .. "src/mame/drivers/ddayjlc.cpp",
1647	1934	MAME_DIR .. "src/mame/drivers/exerion.cpp",
	1935	MAME_DIR .. "src/mame/includes/exerion.h",
1648	1936	MAME_DIR .. "src/mame/video/exerion.cpp",
1649	1937	MAME_DIR .. "src/mame/drivers/fcombat.cpp",
	1938	MAME_DIR .. "src/mame/includes/fcombat.h",
1650	1939	MAME_DIR .. "src/mame/video/fcombat.cpp",
1651	1940	MAME_DIR .. "src/mame/drivers/ginganin.cpp",
	1941	MAME_DIR .. "src/mame/includes/ginganin.h",
1652	1942	MAME_DIR .. "src/mame/video/ginganin.cpp",
1653	1943	MAME_DIR .. "src/mame/drivers/homerun.cpp",
	1944	MAME_DIR .. "src/mame/includes/homerun.h",
1654	1945	MAME_DIR .. "src/mame/video/homerun.cpp",
1655	1946	MAME_DIR .. "src/mame/drivers/megasys1.cpp",
	1947	MAME_DIR .. "src/mame/includes/megasys1.h",
1656	1948	MAME_DIR .. "src/mame/video/megasys1.cpp",
1657	1949	MAME_DIR .. "src/mame/drivers/momoko.cpp",
	1950	MAME_DIR .. "src/mame/includes/momoko.h",
1658	1951	MAME_DIR .. "src/mame/video/momoko.cpp",
1659	1952	MAME_DIR .. "src/mame/drivers/ms32.cpp",
	1953	MAME_DIR .. "src/mame/includes/ms32.h",
1660	1954	MAME_DIR .. "src/mame/video/ms32.cpp",
1661	1955	MAME_DIR .. "src/mame/drivers/psychic5.cpp",
	1956	MAME_DIR .. "src/mame/includes/psychic5.h",
1662	1957	MAME_DIR .. "src/mame/video/psychic5.cpp",
1663	1958	MAME_DIR .. "src/mame/drivers/pturn.cpp",
1664	1959	MAME_DIR .. "src/mame/drivers/skyfox.cpp",
	1960	MAME_DIR .. "src/mame/includes/skyfox.h",
1665	1961	MAME_DIR .. "src/mame/video/skyfox.cpp",
1666	1962	MAME_DIR .. "src/mame/drivers/tetrisp2.cpp",
	1963	MAME_DIR .. "src/mame/includes/tetrisp2.h",
1667	1964	MAME_DIR .. "src/mame/video/tetrisp2.cpp",
1668	1965	MAME_DIR .. "src/mame/machine/jalcrpt.cpp",
	1966	MAME_DIR .. "src/mame/machine/jalcrpt.h",
1669	1967	MAME_DIR .. "src/mame/video/jalblend.cpp",
	1968	MAME_DIR .. "src/mame/video/jalblend.h",
1670	1969	}
1671	1970
1672	1971	createMAMEProjects(_target, _subtarget, "jpm")
1673	1972	files {
1674	1973	MAME_DIR .. "src/mame/drivers/guab.cpp",
1675	1974	MAME_DIR .. "src/mame/drivers/jpmsys5.cpp",
	1975	MAME_DIR .. "src/mame/includes/jpmsys5.h",
1676	1976	MAME_DIR .. "src/mame/drivers/jpmsys5sw.cpp",
1677	1977	MAME_DIR .. "src/mame/drivers/jpmmps.cpp",
1678	1978	MAME_DIR .. "src/mame/drivers/jpms80.cpp",
1679	1979	MAME_DIR .. "src/mame/drivers/jpmsru.cpp",
1680	1980	MAME_DIR .. "src/mame/drivers/jpmimpct.cpp",
	1981	MAME_DIR .. "src/mame/includes/jpmimpct.h",
1681	1982	MAME_DIR .. "src/mame/video/jpmimpct.cpp",
1682	1983	MAME_DIR .. "src/mame/drivers/jpmimpctsw.cpp",
1683	1984	MAME_DIR .. "src/mame/drivers/pluto5.cpp",
1684	1985	MAME_DIR .. "src/mame/drivers/jpmsys7.cpp",
1685	1986	MAME_DIR .. "src/mame/video/awpvid.cpp",
	1987	MAME_DIR .. "src/mame/video/awpvid.h",
1686	1988	MAME_DIR .. "src/mame/machine/meters.cpp",
	1989	MAME_DIR .. "src/mame/machine/meters.h",
1687	1990	}
1688	1991
1689	1992	createMAMEProjects(_target, _subtarget, "kaneko")
1690	1993	files {
1691	1994	MAME_DIR .. "src/mame/drivers/airbustr.cpp",
	1995	MAME_DIR .. "src/mame/includes/airbustr.h",
1692	1996	MAME_DIR .. "src/mame/video/airbustr.cpp",
1693	1997	MAME_DIR .. "src/mame/drivers/djboy.cpp",
	1998	MAME_DIR .. "src/mame/includes/djboy.h",
1694	1999	MAME_DIR .. "src/mame/video/djboy.cpp",
1695	2000	MAME_DIR .. "src/mame/drivers/expro02.cpp",
1696	2001	MAME_DIR .. "src/mame/drivers/galpanic.cpp",
	2002	MAME_DIR .. "src/mame/includes/galpnipt.h",
	2003	MAME_DIR .. "src/mame/includes/galpanic.h",
1697	2004	MAME_DIR .. "src/mame/video/galpanic.cpp",
1698	2005	MAME_DIR .. "src/mame/drivers/galpani2.cpp",
	2006	MAME_DIR .. "src/mame/includes/galpani2.h",
1699	2007	MAME_DIR .. "src/mame/video/galpani2.cpp",
1700	2008	MAME_DIR .. "src/mame/drivers/galpani3.cpp",
1701	2009	MAME_DIR .. "src/mame/video/kaneko_grap2.cpp",
	2010	MAME_DIR .. "src/mame/video/kaneko_grap2.h",
1702	2011	MAME_DIR .. "src/mame/drivers/hvyunit.cpp",
1703	2012	MAME_DIR .. "src/mame/drivers/jchan.cpp",
1704	2013	MAME_DIR .. "src/mame/drivers/kaneko16.cpp",
	2014	MAME_DIR .. "src/mame/includes/kaneko16.h",
1705	2015	MAME_DIR .. "src/mame/video/kaneko16.cpp",
1706	2016	MAME_DIR .. "src/mame/video/kaneko_tmap.cpp",
	2017	MAME_DIR .. "src/mame/video/kaneko_tmap.h",
1707	2018	MAME_DIR .. "src/mame/video/kaneko_spr.cpp",
	2019	MAME_DIR .. "src/mame/video/kaneko_spr.h",
1708	2020	MAME_DIR .. "src/mame/machine/kaneko_hit.cpp",
	2021	MAME_DIR .. "src/mame/machine/kaneko_hit.h",
1709	2022	MAME_DIR .. "src/mame/machine/kaneko_calc3.cpp",
	2023	MAME_DIR .. "src/mame/machine/kaneko_calc3.h",
1710	2024	MAME_DIR .. "src/mame/machine/kaneko_toybox.cpp",
	2025	MAME_DIR .. "src/mame/machine/kaneko_toybox.h",
1711	2026	MAME_DIR .. "src/mame/drivers/sandscrp.cpp",
1712	2027	MAME_DIR .. "src/mame/drivers/suprnova.cpp",
	2028	MAME_DIR .. "src/mame/includes/suprnova.h",
1713	2029	MAME_DIR .. "src/mame/video/suprnova.cpp",
1714	2030	MAME_DIR .. "src/mame/video/sknsspr.cpp",
	2031	MAME_DIR .. "src/mame/video/sknsspr.h",
1715	2032	}
1716	2033
1717	2034	createMAMEProjects(_target, _subtarget, "konami")
1718	2035	files {
1719	2036	MAME_DIR .. "src/mame/drivers/88games.cpp",
	2037	MAME_DIR .. "src/mame/includes/88games.h",
1720	2038	MAME_DIR .. "src/mame/video/88games.cpp",
1721	2039	MAME_DIR .. "src/mame/drivers/ajax.cpp",
	2040	MAME_DIR .. "src/mame/includes/ajax.h",
1722	2041	MAME_DIR .. "src/mame/machine/ajax.cpp",
1723	2042	MAME_DIR .. "src/mame/video/ajax.cpp",
1724	2043	MAME_DIR .. "src/mame/drivers/aliens.cpp",
	2044	MAME_DIR .. "src/mame/includes/aliens.h",
1725	2045	MAME_DIR .. "src/mame/video/aliens.cpp",
1726	2046	MAME_DIR .. "src/mame/drivers/asterix.cpp",
	2047	MAME_DIR .. "src/mame/includes/asterix.h",
1727	2048	MAME_DIR .. "src/mame/video/asterix.cpp",
1728	2049	MAME_DIR .. "src/mame/drivers/battlnts.cpp",
	2050	MAME_DIR .. "src/mame/includes/battlnts.h",
1729	2051	MAME_DIR .. "src/mame/video/battlnts.cpp",
1730	2052	MAME_DIR .. "src/mame/drivers/bishi.cpp",
	2053	MAME_DIR .. "src/mame/includes/bishi.h",
1731	2054	MAME_DIR .. "src/mame/video/bishi.cpp",
1732	2055	MAME_DIR .. "src/mame/drivers/bladestl.cpp",
	2056	MAME_DIR .. "src/mame/includes/bladestl.h",
1733	2057	MAME_DIR .. "src/mame/video/bladestl.cpp",
1734	2058	MAME_DIR .. "src/mame/drivers/blockhl.cpp",
1735	2059	MAME_DIR .. "src/mame/drivers/bottom9.cpp",
	2060	MAME_DIR .. "src/mame/includes/bottom9.h",
1736	2061	MAME_DIR .. "src/mame/video/bottom9.cpp",
1737	2062	MAME_DIR .. "src/mame/drivers/chqflag.cpp",
	2063	MAME_DIR .. "src/mame/includes/chqflag.h",
1738	2064	MAME_DIR .. "src/mame/video/chqflag.cpp",
1739	2065	MAME_DIR .. "src/mame/drivers/circusc.cpp",
	2066	MAME_DIR .. "src/mame/includes/circusc.h",
1740	2067	MAME_DIR .. "src/mame/video/circusc.cpp",
1741	2068	MAME_DIR .. "src/mame/drivers/cobra.cpp",
1742	2069	MAME_DIR .. "src/mame/drivers/combatsc.cpp",
	2070	MAME_DIR .. "src/mame/includes/combatsc.h",
1743	2071	MAME_DIR .. "src/mame/video/combatsc.cpp",
1744	2072	MAME_DIR .. "src/mame/drivers/contra.cpp",
	2073	MAME_DIR .. "src/mame/includes/contra.h",
1745	2074	MAME_DIR .. "src/mame/video/contra.cpp",
1746	2075	MAME_DIR .. "src/mame/drivers/crimfght.cpp",
	2076	MAME_DIR .. "src/mame/includes/crimfght.h",
1747	2077	MAME_DIR .. "src/mame/video/crimfght.cpp",
1748	2078	MAME_DIR .. "src/mame/drivers/dbz.cpp",
	2079	MAME_DIR .. "src/mame/includes/dbz.h",
1749	2080	MAME_DIR .. "src/mame/video/dbz.cpp",
1750	2081	MAME_DIR .. "src/mame/drivers/ddribble.cpp",
	2082	MAME_DIR .. "src/mame/includes/ddribble.h",
1751	2083	MAME_DIR .. "src/mame/video/ddribble.cpp",
1752	2084	MAME_DIR .. "src/mame/drivers/djmain.cpp",
	2085	MAME_DIR .. "src/mame/includes/djmain.h",
1753	2086	MAME_DIR .. "src/mame/video/djmain.cpp",
1754	2087	MAME_DIR .. "src/mame/drivers/fastfred.cpp",
	2088	MAME_DIR .. "src/mame/includes/fastfred.h",
1755	2089	MAME_DIR .. "src/mame/video/fastfred.cpp",
1756	2090	MAME_DIR .. "src/mame/drivers/fastlane.cpp",
	2091	MAME_DIR .. "src/mame/includes/fastlane.h",
1757	2092	MAME_DIR .. "src/mame/video/fastlane.cpp",
1758	2093	MAME_DIR .. "src/mame/drivers/finalizr.cpp",
	2094	MAME_DIR .. "src/mame/includes/finalizr.h",
1759	2095	MAME_DIR .. "src/mame/video/finalizr.cpp",
1760	2096	MAME_DIR .. "src/mame/drivers/firebeat.cpp",
1761	2097	MAME_DIR .. "src/mame/machine/midikbd.cpp",
	2098	MAME_DIR .. "src/mame/machine/midikbd.h",
1762	2099	MAME_DIR .. "src/mame/drivers/flkatck.cpp",
	2100	MAME_DIR .. "src/mame/includes/flkatck.h",
1763	2101	MAME_DIR .. "src/mame/video/flkatck.cpp",
1764	2102	MAME_DIR .. "src/mame/drivers/gberet.cpp",
	2103	MAME_DIR .. "src/mame/includes/gberet.h",
1765	2104	MAME_DIR .. "src/mame/video/gberet.cpp",
1766	2105	MAME_DIR .. "src/mame/drivers/gijoe.cpp",
	2106	MAME_DIR .. "src/mame/includes/gijoe.h",
1767	2107	MAME_DIR .. "src/mame/video/gijoe.cpp",
1768	2108	MAME_DIR .. "src/mame/drivers/gradius3.cpp",
	2109	MAME_DIR .. "src/mame/includes/gradius3.h",
1769	2110	MAME_DIR .. "src/mame/video/gradius3.cpp",
1770	2111	MAME_DIR .. "src/mame/drivers/gticlub.cpp",
1771	2112	MAME_DIR .. "src/mame/drivers/gyruss.cpp",
	2113	MAME_DIR .. "src/mame/includes/gyruss.h",
1772	2114	MAME_DIR .. "src/mame/video/gyruss.cpp",
1773	2115	MAME_DIR .. "src/mame/drivers/hcastle.cpp",
	2116	MAME_DIR .. "src/mame/includes/hcastle.h",
1774	2117	MAME_DIR .. "src/mame/video/hcastle.cpp",
1775	2118	MAME_DIR .. "src/mame/drivers/hexion.cpp",
	2119	MAME_DIR .. "src/mame/includes/hexion.h",
1776	2120	MAME_DIR .. "src/mame/video/hexion.cpp",
1777	2121	MAME_DIR .. "src/mame/drivers/hornet.cpp",
1778	2122	MAME_DIR .. "src/mame/machine/konppc.cpp",
	2123	MAME_DIR .. "src/mame/machine/konppc.h",
1779	2124	MAME_DIR .. "src/mame/drivers/hyperspt.cpp",
	2125	MAME_DIR .. "src/mame/includes/hyperspt.h",
1780	2126	MAME_DIR .. "src/mame/audio/hyprolyb.cpp",
	2127	MAME_DIR .. "src/mame/audio/hyprolyb.h",
1781	2128	MAME_DIR .. "src/mame/video/hyperspt.cpp",
1782	2129	MAME_DIR .. "src/mame/drivers/ironhors.cpp",
	2130	MAME_DIR .. "src/mame/includes/ironhors.h",
1783	2131	MAME_DIR .. "src/mame/video/ironhors.cpp",
1784	2132	MAME_DIR .. "src/mame/drivers/jackal.cpp",
	2133	MAME_DIR .. "src/mame/includes/jackal.h",
1785	2134	MAME_DIR .. "src/mame/video/jackal.cpp",
1786	2135	MAME_DIR .. "src/mame/drivers/jailbrek.cpp",
	2136	MAME_DIR .. "src/mame/includes/jailbrek.h",
1787	2137	MAME_DIR .. "src/mame/video/jailbrek.cpp",
1788	2138	MAME_DIR .. "src/mame/drivers/junofrst.cpp",
1789	2139	MAME_DIR .. "src/mame/drivers/konamigq.cpp",
1790	2140	MAME_DIR .. "src/mame/drivers/konamigv.cpp",
1791	2141	MAME_DIR .. "src/mame/drivers/konamigx.cpp",
	2142	MAME_DIR .. "src/mame/includes/konamigx.h",
1792	2143	MAME_DIR .. "src/mame/machine/konamigx.cpp",
1793	2144	MAME_DIR .. "src/mame/video/konamigx.cpp",
1794	2145	MAME_DIR .. "src/mame/drivers/konamim2.cpp",
r250251	r250252
1796	2147	MAME_DIR .. "src/mame/drivers/konendev.cpp",
1797	2148	MAME_DIR .. "src/mame/drivers/ksys573.cpp",
1798	2149	MAME_DIR .. "src/mame/machine/k573cass.cpp",
	2150	MAME_DIR .. "src/mame/machine/k573cass.h",
1799	2151	MAME_DIR .. "src/mame/machine/k573dio.cpp",
	2152	MAME_DIR .. "src/mame/machine/k573dio.h",
1800	2153	MAME_DIR .. "src/mame/machine/k573mcr.cpp",
	2154	MAME_DIR .. "src/mame/machine/k573mcr.h",
1801	2155	MAME_DIR .. "src/mame/machine/k573msu.cpp",
	2156	MAME_DIR .. "src/mame/machine/k573msu.h",
1802	2157	MAME_DIR .. "src/mame/machine/k573npu.cpp",
	2158	MAME_DIR .. "src/mame/machine/k573npu.h",
1803	2159	MAME_DIR .. "src/mame/machine/zs01.cpp",
	2160	MAME_DIR .. "src/mame/machine/zs01.h",
1804	2161	MAME_DIR .. "src/mame/drivers/labyrunr.cpp",
	2162	MAME_DIR .. "src/mame/includes/labyrunr.h",
1805	2163	MAME_DIR .. "src/mame/video/labyrunr.cpp",
1806	2164	MAME_DIR .. "src/mame/drivers/lethal.cpp",
	2165	MAME_DIR .. "src/mame/includes/lethal.h",
1807	2166	MAME_DIR .. "src/mame/video/lethal.cpp",
1808	2167	MAME_DIR .. "src/mame/drivers/mainevt.cpp",
	2168	MAME_DIR .. "src/mame/includes/mainevt.h",
1809	2169	MAME_DIR .. "src/mame/video/mainevt.cpp",
1810	2170	MAME_DIR .. "src/mame/drivers/megazone.cpp",
	2171	MAME_DIR .. "src/mame/includes/megazone.h",
1811	2172	MAME_DIR .. "src/mame/video/megazone.cpp",
1812	2173	MAME_DIR .. "src/mame/drivers/mikie.cpp",
	2174	MAME_DIR .. "src/mame/includes/mikie.h",
1813	2175	MAME_DIR .. "src/mame/video/mikie.cpp",
1814	2176	MAME_DIR .. "src/mame/drivers/mogura.cpp",
1815	2177	MAME_DIR .. "src/mame/drivers/moo.cpp",
	2178	MAME_DIR .. "src/mame/includes/moo.h",
1816	2179	MAME_DIR .. "src/mame/video/moo.cpp",
1817	2180	MAME_DIR .. "src/mame/drivers/mystwarr.cpp",
	2181	MAME_DIR .. "src/mame/includes/mystwarr.h",
1818	2182	MAME_DIR .. "src/mame/video/mystwarr.cpp",
1819	2183	MAME_DIR .. "src/mame/drivers/nemesis.cpp",
	2184	MAME_DIR .. "src/mame/includes/nemesis.h",
1820	2185	MAME_DIR .. "src/mame/video/nemesis.cpp",
1821	2186	MAME_DIR .. "src/mame/drivers/nwk-tr.cpp",
1822	2187	MAME_DIR .. "src/mame/drivers/overdriv.cpp",
	2188	MAME_DIR .. "src/mame/includes/overdriv.h",
1823	2189	MAME_DIR .. "src/mame/video/overdriv.cpp",
1824	2190	MAME_DIR .. "src/mame/drivers/pandoras.cpp",
	2191	MAME_DIR .. "src/mame/includes/pandoras.h",
1825	2192	MAME_DIR .. "src/mame/video/pandoras.cpp",
1826	2193	MAME_DIR .. "src/mame/drivers/parodius.cpp",
	2194	MAME_DIR .. "src/mame/includes/parodius.h",
1827	2195	MAME_DIR .. "src/mame/video/parodius.cpp",
1828	2196	MAME_DIR .. "src/mame/drivers/pingpong.cpp",
	2197	MAME_DIR .. "src/mame/includes/pingpong.h",
1829	2198	MAME_DIR .. "src/mame/video/pingpong.cpp",
1830	2199	MAME_DIR .. "src/mame/drivers/plygonet.cpp",
	2200	MAME_DIR .. "src/mame/includes/plygonet.h",
1831	2201	MAME_DIR .. "src/mame/video/plygonet.cpp",
1832	2202	MAME_DIR .. "src/mame/drivers/pooyan.cpp",
	2203	MAME_DIR .. "src/mame/includes/pooyan.h",
1833	2204	MAME_DIR .. "src/mame/video/pooyan.cpp",
1834	2205	MAME_DIR .. "src/mame/drivers/pyson.cpp",
1835	2206	MAME_DIR .. "src/mame/drivers/qdrmfgp.cpp",
	2207	MAME_DIR .. "src/mame/includes/qdrmfgp.h",
1836	2208	MAME_DIR .. "src/mame/video/qdrmfgp.cpp",
1837	2209	MAME_DIR .. "src/mame/drivers/rockrage.cpp",
	2210	MAME_DIR .. "src/mame/includes/rockrage.h",
1838	2211	MAME_DIR .. "src/mame/video/rockrage.cpp",
1839	2212	MAME_DIR .. "src/mame/drivers/rocnrope.cpp",
	2213	MAME_DIR .. "src/mame/includes/rocnrope.h",
1840	2214	MAME_DIR .. "src/mame/video/rocnrope.cpp",
1841	2215	MAME_DIR .. "src/mame/drivers/rollerg.cpp",
	2216	MAME_DIR .. "src/mame/includes/rollerg.h",
1842	2217	MAME_DIR .. "src/mame/video/rollerg.cpp",
1843	2218	MAME_DIR .. "src/mame/drivers/rungun.cpp",
	2219	MAME_DIR .. "src/mame/includes/rungun.h",
1844	2220	MAME_DIR .. "src/mame/video/rungun.cpp",
1845	2221	MAME_DIR .. "src/mame/drivers/sbasketb.cpp",
	2222	MAME_DIR .. "src/mame/includes/sbasketb.h",
1846	2223	MAME_DIR .. "src/mame/video/sbasketb.cpp",
1847	2224	MAME_DIR .. "src/mame/drivers/scobra.cpp",
1848	2225	MAME_DIR .. "src/mame/drivers/scotrsht.cpp",
	2226	MAME_DIR .. "src/mame/includes/scotrsht.h",
1849	2227	MAME_DIR .. "src/mame/video/scotrsht.cpp",
1850	2228	MAME_DIR .. "src/mame/drivers/scramble.cpp",
	2229	MAME_DIR .. "src/mame/includes/scramble.h",
1851	2230	MAME_DIR .. "src/mame/machine/scramble.cpp",
1852	2231	MAME_DIR .. "src/mame/audio/scramble.cpp",
1853	2232	MAME_DIR .. "src/mame/drivers/shaolins.cpp",
	2233	MAME_DIR .. "src/mame/includes/shaolins.h",
1854	2234	MAME_DIR .. "src/mame/video/shaolins.cpp",
1855	2235	MAME_DIR .. "src/mame/drivers/simpsons.cpp",
	2236	MAME_DIR .. "src/mame/includes/simpsons.h",
1856	2237	MAME_DIR .. "src/mame/machine/simpsons.cpp",
1857	2238	MAME_DIR .. "src/mame/video/simpsons.cpp",
1858	2239	MAME_DIR .. "src/mame/drivers/spy.cpp",
	2240	MAME_DIR .. "src/mame/includes/spy.h",
1859	2241	MAME_DIR .. "src/mame/video/spy.cpp",
1860	2242	MAME_DIR .. "src/mame/drivers/surpratk.cpp",
	2243	MAME_DIR .. "src/mame/includes/surpratk.h",
1861	2244	MAME_DIR .. "src/mame/video/surpratk.cpp",
1862	2245	MAME_DIR .. "src/mame/drivers/tasman.cpp",
1863	2246	MAME_DIR .. "src/mame/drivers/tgtpanic.cpp",
1864	2247	MAME_DIR .. "src/mame/drivers/thunderx.cpp",
	2248	MAME_DIR .. "src/mame/includes/thunderx.h",
1865	2249	MAME_DIR .. "src/mame/video/thunderx.cpp",
1866	2250	MAME_DIR .. "src/mame/drivers/timeplt.cpp",
	2251	MAME_DIR .. "src/mame/includes/timeplt.h",
1867	2252	MAME_DIR .. "src/mame/audio/timeplt.cpp",
	2253	MAME_DIR .. "src/mame/audio/timeplt.h",
1868	2254	MAME_DIR .. "src/mame/video/timeplt.cpp",
1869	2255	MAME_DIR .. "src/mame/drivers/tmnt.cpp",
	2256	MAME_DIR .. "src/mame/includes/tmnt.h",
1870	2257	MAME_DIR .. "src/mame/video/tmnt.cpp",
1871	2258	MAME_DIR .. "src/mame/drivers/tp84.cpp",
	2259	MAME_DIR .. "src/mame/includes/tp84.h",
1872	2260	MAME_DIR .. "src/mame/video/tp84.cpp",
1873	2261	MAME_DIR .. "src/mame/drivers/trackfld.cpp",
	2262	MAME_DIR .. "src/mame/includes/trackfld.h",
1874	2263	MAME_DIR .. "src/mame/machine/konami1.cpp",
	2264	MAME_DIR .. "src/mame/machine/konami1.h",
1875	2265	MAME_DIR .. "src/mame/audio/trackfld.cpp",
	2266	MAME_DIR .. "src/mame/audio/trackfld.h",
1876	2267	MAME_DIR .. "src/mame/video/trackfld.cpp",
1877	2268	MAME_DIR .. "src/mame/drivers/tutankhm.cpp",
	2269	MAME_DIR .. "src/mame/includes/tutankhm.h",
1878	2270	MAME_DIR .. "src/mame/video/tutankhm.cpp",
1879	2271	MAME_DIR .. "src/mame/drivers/twin16.cpp",
	2272	MAME_DIR .. "src/mame/includes/twin16.h",
1880	2273	MAME_DIR .. "src/mame/video/twin16.cpp",
1881	2274	MAME_DIR .. "src/mame/drivers/twinkle.cpp",
1882	2275	MAME_DIR .. "src/mame/drivers/ultrsprt.cpp",
1883	2276	MAME_DIR .. "src/mame/drivers/ultraman.cpp",
	2277	MAME_DIR .. "src/mame/includes/ultraman.h",
1884	2278	MAME_DIR .. "src/mame/video/ultraman.cpp",
1885	2279	MAME_DIR .. "src/mame/drivers/vendetta.cpp",
	2280	MAME_DIR .. "src/mame/includes/vendetta.h",
1886	2281	MAME_DIR .. "src/mame/video/vendetta.cpp",
1887	2282	MAME_DIR .. "src/mame/drivers/viper.cpp",
1888	2283	MAME_DIR .. "src/mame/drivers/wecleman.cpp",
	2284	MAME_DIR .. "src/mame/includes/wecleman.h",
1889	2285	MAME_DIR .. "src/mame/video/wecleman.cpp",
1890	2286	MAME_DIR .. "src/mame/drivers/xexex.cpp",
	2287	MAME_DIR .. "src/mame/includes/xexex.h",
1891	2288	MAME_DIR .. "src/mame/video/xexex.cpp",
1892	2289	MAME_DIR .. "src/mame/drivers/xmen.cpp",
	2290	MAME_DIR .. "src/mame/includes/xmen.h",
1893	2291	MAME_DIR .. "src/mame/video/xmen.cpp",
1894	2292	MAME_DIR .. "src/mame/drivers/yiear.cpp",
	2293	MAME_DIR .. "src/mame/includes/yiear.h",
1895	2294	MAME_DIR .. "src/mame/video/yiear.cpp",
1896	2295	MAME_DIR .. "src/mame/drivers/zr107.cpp",
	2296	MAME_DIR .. "src/mame/includes/konamipt.h",
1897	2297	MAME_DIR .. "src/mame/video/konami_helper.cpp",
	2298	MAME_DIR .. "src/mame/video/konami_helper.h",
1898	2299	MAME_DIR .. "src/mame/video/k007121.cpp",
	2300	MAME_DIR .. "src/mame/video/k007121.h",
1899	2301	MAME_DIR .. "src/mame/video/k007342.cpp",
	2302	MAME_DIR .. "src/mame/video/k007342.h",
1900	2303	MAME_DIR .. "src/mame/video/k007420.cpp",
	2304	MAME_DIR .. "src/mame/video/k007420.h",
1901	2305	MAME_DIR .. "src/mame/video/k037122.cpp",
	2306	MAME_DIR .. "src/mame/video/k037122.h",
1902	2307	MAME_DIR .. "src/mame/video/k051316.cpp",
	2308	MAME_DIR .. "src/mame/video/k051316.h",
1903	2309	MAME_DIR .. "src/mame/video/k051733.cpp",
	2310	MAME_DIR .. "src/mame/video/k051733.h",
1904	2311	MAME_DIR .. "src/mame/video/k051960.cpp",
	2312	MAME_DIR .. "src/mame/video/k051960.h",
1905	2313	MAME_DIR .. "src/mame/video/k052109.cpp",
	2314	MAME_DIR .. "src/mame/video/k052109.h",
1906	2315	MAME_DIR .. "src/mame/video/k053250.cpp",
	2316	MAME_DIR .. "src/mame/video/k053250.h",
1907	2317	MAME_DIR .. "src/mame/video/k053251.cpp",
	2318	MAME_DIR .. "src/mame/video/k053251.h",
1908	2319	MAME_DIR .. "src/mame/video/k054156_k054157_k056832.cpp",
	2320	MAME_DIR .. "src/mame/video/k054156_k054157_k056832.h",
1909	2321	MAME_DIR .. "src/mame/video/k053244_k053245.cpp",
	2322	MAME_DIR .. "src/mame/video/k053244_k053245.h",
1910	2323	MAME_DIR .. "src/mame/video/k053246_k053247_k055673.cpp",
	2324	MAME_DIR .. "src/mame/video/k053246_k053247_k055673.h",
1911	2325	MAME_DIR .. "src/mame/video/k055555.cpp",
	2326	MAME_DIR .. "src/mame/video/k055555.h",
1912	2327	MAME_DIR .. "src/mame/video/k054000.cpp",
	2328	MAME_DIR .. "src/mame/video/k054000.h",
1913	2329	MAME_DIR .. "src/mame/video/k054338.cpp",
	2330	MAME_DIR .. "src/mame/video/k054338.h",
1914	2331	MAME_DIR .. "src/mame/video/k053936.cpp",
	2332	MAME_DIR .. "src/mame/video/k053936.h",
1915	2333	MAME_DIR .. "src/mame/video/k001006.cpp",
	2334	MAME_DIR .. "src/mame/video/k001006.h",
1916	2335	MAME_DIR .. "src/mame/video/k001005.cpp",
	2336	MAME_DIR .. "src/mame/video/k001005.h",
1917	2337	MAME_DIR .. "src/mame/video/k001604.cpp",
	2338	MAME_DIR .. "src/mame/video/k001604.h",
1918	2339	MAME_DIR .. "src/mame/video/k057714.cpp",
	2340	MAME_DIR .. "src/mame/video/k057714.h",
1919	2341	}
1920	2342
1921	2343	createMAMEProjects(_target, _subtarget, "matic")
r250251	r250252
1926	2348	createMAMEProjects(_target, _subtarget, "maygay")
1927	2349	files {
1928	2350	MAME_DIR .. "src/mame/drivers/maygay1b.cpp",
	2351	MAME_DIR .. "src/mame/includes/maygay1b.h",
1929	2352	MAME_DIR .. "src/mame/drivers/maygay1bsw.cpp",
1930	2353	MAME_DIR .. "src/mame/drivers/maygayv1.cpp",
1931	2354	MAME_DIR .. "src/mame/drivers/maygayep.cpp",
r250251	r250252
1936	2359	createMAMEProjects(_target, _subtarget, "meadows")
1937	2360	files {
1938	2361	MAME_DIR .. "src/mame/drivers/lazercmd.cpp",
	2362	MAME_DIR .. "src/mame/includes/lazercmd.h",
1939	2363	MAME_DIR .. "src/mame/video/lazercmd.cpp",
1940	2364	MAME_DIR .. "src/mame/drivers/meadwttl.cpp",
1941	2365	MAME_DIR .. "src/mame/drivers/meadows.cpp",
	2366	MAME_DIR .. "src/mame/includes/meadows.h",
1942	2367	MAME_DIR .. "src/mame/audio/meadows.cpp",
1943	2368	MAME_DIR .. "src/mame/video/meadows.cpp",
1944	2369	MAME_DIR .. "src/mame/drivers/warpsped.cpp",
r250251	r250252
1954	2379	createMAMEProjects(_target, _subtarget, "metro")
1955	2380	files {
1956	2381	MAME_DIR .. "src/mame/drivers/hyprduel.cpp",
	2382	MAME_DIR .. "src/mame/includes/hyprduel.h",
1957	2383	MAME_DIR .. "src/mame/video/hyprduel.cpp",
1958	2384	MAME_DIR .. "src/mame/drivers/metro.cpp",
	2385	MAME_DIR .. "src/mame/includes/metro.h",
1959	2386	MAME_DIR .. "src/mame/video/metro.cpp",
1960	2387	MAME_DIR .. "src/mame/drivers/rabbit.cpp",
1961	2388	MAME_DIR .. "src/mame/drivers/tmmjprd.cpp",
r250251	r250252
1971	2398	createMAMEProjects(_target, _subtarget, "midw8080")
1972	2399	files {
1973	2400	MAME_DIR .. "src/mame/drivers/8080bw.cpp",
	2401	MAME_DIR .. "src/mame/includes/8080bw.h",
1974	2402	MAME_DIR .. "src/mame/audio/8080bw.cpp",
1975	2403	MAME_DIR .. "src/mame/video/8080bw.cpp",
1976	2404	MAME_DIR .. "src/mame/drivers/m79amb.cpp",
	2405	MAME_DIR .. "src/mame/includes/m79amb.h",
1977	2406	MAME_DIR .. "src/mame/audio/m79amb.cpp",
1978	2407	MAME_DIR .. "src/mame/drivers/mw8080bw.cpp",
	2408	MAME_DIR .. "src/mame/includes/mw8080bw.h",
1979	2409	MAME_DIR .. "src/mame/machine/mw8080bw.cpp",
1980	2410	MAME_DIR .. "src/mame/audio/mw8080bw.cpp",
1981	2411	MAME_DIR .. "src/mame/video/mw8080bw.cpp",
r250251	r250252
1985	2415	createMAMEProjects(_target, _subtarget, "midway")
1986	2416	files {
1987	2417	MAME_DIR .. "src/mame/drivers/astrocde.cpp",
	2418	MAME_DIR .. "src/mame/includes/astrocde.h",
1988	2419	MAME_DIR .. "src/mame/video/astrocde.cpp",
1989	2420	MAME_DIR .. "src/mame/audio/gorf.cpp",
1990	2421	MAME_DIR .. "src/mame/audio/wow.cpp",
1991	2422	MAME_DIR .. "src/mame/drivers/atlantis.cpp",
1992	2423	MAME_DIR .. "src/mame/drivers/balsente.cpp",
	2424	MAME_DIR .. "src/mame/includes/balsente.h",
1993	2425	MAME_DIR .. "src/mame/machine/balsente.cpp",
1994	2426	MAME_DIR .. "src/mame/video/balsente.cpp",
1995	2427	MAME_DIR .. "src/mame/drivers/gridlee.cpp",
	2428	MAME_DIR .. "src/mame/includes/gridlee.h",
1996	2429	MAME_DIR .. "src/mame/audio/gridlee.cpp",
1997	2430	MAME_DIR .. "src/mame/video/gridlee.cpp",
1998	2431	MAME_DIR .. "src/mame/drivers/mcr.cpp",
	2432	MAME_DIR .. "src/mame/includes/mcr.h",
1999	2433	MAME_DIR .. "src/mame/machine/mcr.cpp",
2000	2434	MAME_DIR .. "src/mame/video/mcr.cpp",
2001	2435	MAME_DIR .. "src/mame/drivers/mcr3.cpp",
	2436	MAME_DIR .. "src/mame/includes/mcr3.h",
2002	2437	MAME_DIR .. "src/mame/video/mcr3.cpp",
2003	2438	MAME_DIR .. "src/mame/drivers/mcr68.cpp",
	2439	MAME_DIR .. "src/mame/includes/mcr68.h",
2004	2440	MAME_DIR .. "src/mame/machine/mcr68.cpp",
2005	2441	MAME_DIR .. "src/mame/video/mcr68.cpp",
2006	2442	MAME_DIR .. "src/mame/drivers/midqslvr.cpp",
2007	2443	MAME_DIR .. "src/mame/drivers/midtunit.cpp",
	2444	MAME_DIR .. "src/mame/includes/midtunit.h",
2008	2445	MAME_DIR .. "src/mame/machine/midtunit.cpp",
2009	2446	MAME_DIR .. "src/mame/video/midtunit.cpp",
2010	2447	MAME_DIR .. "src/mame/drivers/midvunit.cpp",
	2448	MAME_DIR .. "src/mame/includes/midvunit.h",
2011	2449	MAME_DIR .. "src/mame/video/midvunit.cpp",
2012	2450	MAME_DIR .. "src/mame/drivers/midwunit.cpp",
	2451	MAME_DIR .. "src/mame/includes/midwunit.h",
2013	2452	MAME_DIR .. "src/mame/machine/midwunit.cpp",
2014	2453	MAME_DIR .. "src/mame/drivers/midxunit.cpp",
	2454	MAME_DIR .. "src/mame/includes/midxunit.h",
2015	2455	MAME_DIR .. "src/mame/machine/midxunit.cpp",
2016	2456	MAME_DIR .. "src/mame/drivers/midyunit.cpp",
	2457	MAME_DIR .. "src/mame/includes/midyunit.h",
2017	2458	MAME_DIR .. "src/mame/machine/midyunit.cpp",
2018	2459	MAME_DIR .. "src/mame/video/midyunit.cpp",
2019	2460	MAME_DIR .. "src/mame/drivers/midzeus.cpp",
	2461	MAME_DIR .. "src/mame/includes/midzeus.h",
2020	2462	MAME_DIR .. "src/mame/video/midzeus.cpp",
2021	2463	MAME_DIR .. "src/mame/video/midzeus2.cpp",
2022	2464	MAME_DIR .. "src/mame/drivers/mw18w.cpp",
r250251	r250252
2025	2467	MAME_DIR .. "src/mame/drivers/pinball2k.cpp",
2026	2468	MAME_DIR .. "src/mame/drivers/seattle.cpp",
2027	2469	MAME_DIR .. "src/mame/drivers/sspeedr.cpp",
	2470	MAME_DIR .. "src/mame/includes/sspeedr.h",
2028	2471	MAME_DIR .. "src/mame/video/sspeedr.cpp",
2029	2472	MAME_DIR .. "src/mame/drivers/tmaster.cpp",
2030	2473	MAME_DIR .. "src/mame/drivers/vegas.cpp",
2031	2474	MAME_DIR .. "src/mame/drivers/wmg.cpp",
2032	2475	MAME_DIR .. "src/mame/drivers/williams.cpp",
	2476	MAME_DIR .. "src/mame/includes/williams.h",
2033	2477	MAME_DIR .. "src/mame/machine/williams.cpp",
2034	2478	MAME_DIR .. "src/mame/audio/williams.cpp",
	2479	MAME_DIR .. "src/mame/audio/williams.h",
2035	2480	MAME_DIR .. "src/mame/video/williams.cpp",
2036	2481	MAME_DIR .. "src/mame/machine/midwayic.cpp",
	2482	MAME_DIR .. "src/mame/machine/midwayic.h",
2037	2483	MAME_DIR .. "src/mame/audio/midway.cpp",
	2484	MAME_DIR .. "src/mame/audio/midway.h",
2038	2485	}
2039	2486
2040	2487	createMAMEProjects(_target, _subtarget, "namco")
2041	2488	files {
2042	2489	MAME_DIR .. "src/mame/drivers/20pacgal.cpp",
	2490	MAME_DIR .. "src/mame/includes/20pacgal.h",
2043	2491	MAME_DIR .. "src/mame/video/20pacgal.cpp",
2044	2492	MAME_DIR .. "src/mame/drivers/30test.cpp",
2045	2493	MAME_DIR .. "src/mame/drivers/baraduke.cpp",
	2494	MAME_DIR .. "src/mame/includes/baraduke.h",
2046	2495	MAME_DIR .. "src/mame/video/baraduke.cpp",
2047	2496	MAME_DIR .. "src/mame/drivers/cswat.cpp",
2048	2497	MAME_DIR .. "src/mame/drivers/dambustr.cpp",
2049	2498	MAME_DIR .. "src/mame/drivers/gal3.cpp",
2050	2499	MAME_DIR .. "src/mame/drivers/galaga.cpp",
	2500	MAME_DIR .. "src/mame/includes/galaga.h",
2051	2501	MAME_DIR .. "src/mame/audio/galaga.cpp",
2052	2502	MAME_DIR .. "src/mame/video/galaga.cpp",
2053	2503	MAME_DIR .. "src/mame/video/bosco.cpp",
r250251	r250252
2055	2505	MAME_DIR .. "src/mame/machine/xevious.cpp",
2056	2506	MAME_DIR .. "src/mame/video/xevious.cpp",
2057	2507	MAME_DIR .. "src/mame/drivers/galaxian.cpp",
	2508	MAME_DIR .. "src/mame/includes/galaxian.h",
2058	2509	MAME_DIR .. "src/mame/audio/galaxian.cpp",
	2510	MAME_DIR .. "src/mame/audio/galaxian.h",
2059	2511	MAME_DIR .. "src/mame/video/galaxian.cpp",
2060	2512	MAME_DIR .. "src/mame/drivers/galaxold.cpp",
	2513	MAME_DIR .. "src/mame/includes/galaxold.h",
2061	2514	MAME_DIR .. "src/mame/machine/galaxold.cpp",
2062	2515	MAME_DIR .. "src/mame/video/galaxold.cpp",
2063	2516	MAME_DIR .. "src/mame/drivers/gaplus.cpp",
	2517	MAME_DIR .. "src/mame/includes/gaplus.h",
2064	2518	MAME_DIR .. "src/mame/machine/gaplus.cpp",
2065	2519	MAME_DIR .. "src/mame/video/gaplus.cpp",
2066	2520	MAME_DIR .. "src/mame/drivers/kungfur.cpp",
2067	2521	MAME_DIR .. "src/mame/drivers/mappy.cpp",
	2522	MAME_DIR .. "src/mame/includes/mappy.h",
2068	2523	MAME_DIR .. "src/mame/video/mappy.cpp",
2069	2524	MAME_DIR .. "src/mame/drivers/namcofl.cpp",
	2525	MAME_DIR .. "src/mame/includes/namcofl.h",
2070	2526	MAME_DIR .. "src/mame/video/namcofl.cpp",
2071	2527	MAME_DIR .. "src/mame/drivers/namcoic.cpp",
	2528	MAME_DIR .. "src/mame/includes/namcoic.h",
2072	2529	MAME_DIR .. "src/mame/drivers/namcona1.cpp",
	2530	MAME_DIR .. "src/mame/includes/namcona1.h",
2073	2531	MAME_DIR .. "src/mame/video/namcona1.cpp",
2074	2532	MAME_DIR .. "src/mame/drivers/namconb1.cpp",
	2533	MAME_DIR .. "src/mame/includes/namconb1.h",
2075	2534	MAME_DIR .. "src/mame/video/namconb1.cpp",
2076	2535	MAME_DIR .. "src/mame/drivers/namcond1.cpp",
	2536	MAME_DIR .. "src/mame/includes/namcond1.h",
2077	2537	MAME_DIR .. "src/mame/machine/namcond1.cpp",
2078	2538	MAME_DIR .. "src/mame/video/ygv608.cpp",
	2539	MAME_DIR .. "src/mame/video/ygv608.h",
2079	2540	MAME_DIR .. "src/mame/drivers/namcops2.cpp",
2080	2541	MAME_DIR .. "src/mame/drivers/namcos1.cpp",
	2542	MAME_DIR .. "src/mame/includes/namcos1.h",
2081	2543	MAME_DIR .. "src/mame/machine/namcos1.cpp",
2082	2544	MAME_DIR .. "src/mame/video/namcos1.cpp",
2083	2545	MAME_DIR .. "src/mame/drivers/namcos10.cpp",
2084	2546	MAME_DIR .. "src/mame/machine/ns10crypt.cpp",
	2547	MAME_DIR .. "src/mame/machine/ns10crypt.h",
2085	2548	MAME_DIR .. "src/mame/drivers/namcos11.cpp",
2086	2549	MAME_DIR .. "src/mame/machine/ns11prot.cpp",
	2550	MAME_DIR .. "src/mame/machine/ns11prot.h",
2087	2551	MAME_DIR .. "src/mame/drivers/namcos12.cpp",
2088	2552	MAME_DIR .. "src/mame/machine/namco_settings.cpp",
	2553	MAME_DIR .. "src/mame/machine/namco_settings.h",
2089	2554	MAME_DIR .. "src/mame/drivers/namcos2.cpp",
	2555	MAME_DIR .. "src/mame/includes/namcos2.h",
2090	2556	MAME_DIR .. "src/mame/machine/namcos2.cpp",
2091	2557	MAME_DIR .. "src/mame/video/namcos2.cpp",
2092	2558	MAME_DIR .. "src/mame/drivers/namcos21.cpp",
	2559	MAME_DIR .. "src/mame/includes/namcos21.h",
2093	2560	MAME_DIR .. "src/mame/video/namcos21.cpp",
2094	2561	MAME_DIR .. "src/mame/drivers/namcos22.cpp",
	2562	MAME_DIR .. "src/mame/includes/namcos22.h",
2095	2563	MAME_DIR .. "src/mame/video/namcos22.cpp",
2096	2564	MAME_DIR .. "src/mame/drivers/namcos23.cpp",
2097	2565	MAME_DIR .. "src/mame/drivers/namcos86.cpp",
	2566	MAME_DIR .. "src/mame/includes/namcos86.h",
2098	2567	MAME_DIR .. "src/mame/video/namcos86.cpp",
2099	2568	MAME_DIR .. "src/mame/drivers/pacland.cpp",
	2569	MAME_DIR .. "src/mame/includes/pacland.h",
2100	2570	MAME_DIR .. "src/mame/video/pacland.cpp",
2101	2571	MAME_DIR .. "src/mame/drivers/polepos.cpp",
	2572	MAME_DIR .. "src/mame/includes/polepos.h",
2102	2573	MAME_DIR .. "src/mame/audio/polepos.cpp",
2103	2574	MAME_DIR .. "src/mame/video/polepos.cpp",
2104	2575	MAME_DIR .. "src/mame/drivers/rallyx.cpp",
	2576	MAME_DIR .. "src/mame/includes/rallyx.h",
2105	2577	MAME_DIR .. "src/mame/video/rallyx.cpp",
2106	2578	MAME_DIR .. "src/mame/drivers/skykid.cpp",
	2579	MAME_DIR .. "src/mame/includes/skykid.h",
2107	2580	MAME_DIR .. "src/mame/video/skykid.cpp",
2108	2581	MAME_DIR .. "src/mame/drivers/tankbatt.cpp",
	2582	MAME_DIR .. "src/mame/includes/tankbatt.h",
2109	2583	MAME_DIR .. "src/mame/video/tankbatt.cpp",
2110	2584	MAME_DIR .. "src/mame/drivers/tceptor.cpp",
	2585	MAME_DIR .. "src/mame/includes/tceptor.h",
2111	2586	MAME_DIR .. "src/mame/video/tceptor.cpp",
2112	2587	MAME_DIR .. "src/mame/drivers/toypop.cpp",
	2588	MAME_DIR .. "src/mame/includes/toypop.h",
2113	2589	MAME_DIR .. "src/mame/video/toypop.cpp",
2114	2590	MAME_DIR .. "src/mame/drivers/turrett.cpp",
	2591	MAME_DIR .. "src/mame/includes/turrett.h",
2115	2592	MAME_DIR .. "src/mame/audio/turrett.cpp",
2116	2593	MAME_DIR .. "src/mame/video/turrett.cpp",
2117	2594	MAME_DIR .. "src/mame/drivers/warpwarp.cpp",
	2595	MAME_DIR .. "src/mame/includes/warpwarp.h",
2118	2596	MAME_DIR .. "src/mame/audio/geebee.cpp",
2119	2597	MAME_DIR .. "src/mame/audio/warpwarp.cpp",
	2598	MAME_DIR .. "src/mame/audio/warpwarp.h",
2120	2599	MAME_DIR .. "src/mame/video/warpwarp.cpp",
2121	2600	MAME_DIR .. "src/mame/machine/c117.cpp",
	2601	MAME_DIR .. "src/mame/machine/c117.h",
2122	2602	MAME_DIR .. "src/mame/machine/namcoio.cpp",
	2603	MAME_DIR .. "src/mame/machine/namcoio.h",
2123	2604	MAME_DIR .. "src/mame/machine/namco06.cpp",
	2605	MAME_DIR .. "src/mame/machine/namco06.h",
2124	2606	MAME_DIR .. "src/mame/machine/namco50.cpp",
	2607	MAME_DIR .. "src/mame/machine/namco50.h",
2125	2608	MAME_DIR .. "src/mame/machine/namco51.cpp",
	2609	MAME_DIR .. "src/mame/machine/namco51.h",
2126	2610	MAME_DIR .. "src/mame/machine/namco53.cpp",
	2611	MAME_DIR .. "src/mame/machine/namco53.h",
2127	2612	MAME_DIR .. "src/mame/machine/namco62.cpp",
	2613	MAME_DIR .. "src/mame/machine/namco62.h",
2128	2614	MAME_DIR .. "src/mame/machine/namcomcu.cpp",
	2615	MAME_DIR .. "src/mame/machine/namcomcu.h",
2129	2616	MAME_DIR .. "src/mame/audio/namco52.cpp",
	2617	MAME_DIR .. "src/mame/audio/namco52.h",
2130	2618	MAME_DIR .. "src/mame/audio/namco54.cpp",
	2619	MAME_DIR .. "src/mame/audio/namco54.h",
2131	2620	MAME_DIR .. "src/mame/video/c116.cpp",
	2621	MAME_DIR .. "src/mame/video/c116.h",
2132	2622	MAME_DIR .. "src/mame/video/c45.cpp",
	2623	MAME_DIR .. "src/mame/video/c45.h",
2133	2624	}
2134	2625
2135	2626	createMAMEProjects(_target, _subtarget, "nasco")
2136	2627	files {
2137	2628	MAME_DIR .. "src/mame/drivers/crgolf.cpp",
	2629	MAME_DIR .. "src/mame/includes/crgolf.h",
2138	2630	MAME_DIR .. "src/mame/video/crgolf.cpp",
2139	2631	MAME_DIR .. "src/mame/drivers/suprgolf.cpp",
2140	2632	}
r250251	r250252
2142	2634	createMAMEProjects(_target, _subtarget, "neogeo")
2143	2635	files {
2144	2636	MAME_DIR .. "src/mame/drivers/neogeo.cpp",
	2637	MAME_DIR .. "src/mame/includes/neogeo.h",
2145	2638	MAME_DIR .. "src/mame/video/neogeo.cpp",
2146	2639	MAME_DIR .. "src/mame/drivers/neogeo_noslot.cpp",
2147	2640	MAME_DIR .. "src/mame/video/neogeo_spr.cpp",
	2641	MAME_DIR .. "src/mame/video/neogeo_spr.h",
2148	2642	MAME_DIR .. "src/mame/machine/neocrypt.cpp",
2149	2643	MAME_DIR .. "src/mame/machine/ng_memcard.cpp",
	2644	MAME_DIR .. "src/mame/machine/ng_memcard.h",
2150	2645	}
2151	2646
2152	2647	createMAMEProjects(_target, _subtarget, "nichibut")
2153	2648	files {
2154	2649	MAME_DIR .. "src/mame/drivers/armedf.cpp",
	2650	MAME_DIR .. "src/mame/includes/armedf.h",
2155	2651	MAME_DIR .. "src/mame/video/armedf.cpp",
2156	2652	MAME_DIR .. "src/mame/drivers/cclimber.cpp",
	2653	MAME_DIR .. "src/mame/includes/cclimber.h",
2157	2654	MAME_DIR .. "src/mame/machine/cclimber.cpp",
2158	2655	MAME_DIR .. "src/mame/audio/cclimber.cpp",
	2656	MAME_DIR .. "src/mame/audio/cclimber.h",
2159	2657	MAME_DIR .. "src/mame/video/cclimber.cpp",
2160	2658	MAME_DIR .. "src/mame/drivers/clshroad.cpp",
	2659	MAME_DIR .. "src/mame/includes/clshroad.h",
2161	2660	MAME_DIR .. "src/mame/video/clshroad.cpp",
2162	2661	MAME_DIR .. "src/mame/drivers/csplayh5.cpp",
2163	2662	MAME_DIR .. "src/mame/drivers/cop01.cpp",
	2663	MAME_DIR .. "src/mame/includes/cop01.h",
2164	2664	MAME_DIR .. "src/mame/video/cop01.cpp",
2165	2665	MAME_DIR .. "src/mame/drivers/dacholer.cpp",
2166	2666	MAME_DIR .. "src/mame/drivers/galivan.cpp",
	2667	MAME_DIR .. "src/mame/includes/galivan.h",
2167	2668	MAME_DIR .. "src/mame/video/galivan.cpp",
2168	2669	MAME_DIR .. "src/mame/drivers/gomoku.cpp",
	2670	MAME_DIR .. "src/mame/includes/gomoku.h",
2169	2671	MAME_DIR .. "src/mame/audio/gomoku.cpp",
2170	2672	MAME_DIR .. "src/mame/video/gomoku.cpp",
2171	2673	MAME_DIR .. "src/mame/drivers/hyhoo.cpp",
	2674	MAME_DIR .. "src/mame/includes/hyhoo.h",
2172	2675	MAME_DIR .. "src/mame/video/hyhoo.cpp",
2173	2676	MAME_DIR .. "src/mame/drivers/jangou.cpp",
2174	2677	MAME_DIR .. "src/mame/drivers/magmax.cpp",
	2678	MAME_DIR .. "src/mame/includes/magmax.h",
2175	2679	MAME_DIR .. "src/mame/video/magmax.cpp",
2176	2680	MAME_DIR .. "src/mame/drivers/nbmj8688.cpp",
	2681	MAME_DIR .. "src/mame/includes/nbmj8688.h",
2177	2682	MAME_DIR .. "src/mame/video/nbmj8688.cpp",
2178	2683	MAME_DIR .. "src/mame/drivers/nbmj8891.cpp",
	2684	MAME_DIR .. "src/mame/includes/nbmj8891.h",
2179	2685	MAME_DIR .. "src/mame/video/nbmj8891.cpp",
2180	2686	MAME_DIR .. "src/mame/drivers/nbmj8900.cpp",
	2687	MAME_DIR .. "src/mame/includes/nbmj8900.h",
2181	2688	MAME_DIR .. "src/mame/video/nbmj8900.cpp",
2182	2689	MAME_DIR .. "src/mame/drivers/nbmj8991.cpp",
	2690	MAME_DIR .. "src/mame/includes/nbmj8991.h",
2183	2691	MAME_DIR .. "src/mame/video/nbmj8991.cpp",
2184	2692	MAME_DIR .. "src/mame/drivers/nbmj9195.cpp",
	2693	MAME_DIR .. "src/mame/includes/nbmj9195.h",
2185	2694	MAME_DIR .. "src/mame/video/nbmj9195.cpp",
2186	2695	MAME_DIR .. "src/mame/drivers/nightgal.cpp",
2187	2696	MAME_DIR .. "src/mame/drivers/niyanpai.cpp",
	2697	MAME_DIR .. "src/mame/includes/niyanpai.h",
2188	2698	MAME_DIR .. "src/mame/video/niyanpai.cpp",
2189	2699	MAME_DIR .. "src/mame/drivers/pastelg.cpp",
	2700	MAME_DIR .. "src/mame/includes/pastelg.h",
2190	2701	MAME_DIR .. "src/mame/video/pastelg.cpp",
2191	2702	MAME_DIR .. "src/mame/drivers/seicross.cpp",
	2703	MAME_DIR .. "src/mame/includes/seicross.h",
2192	2704	MAME_DIR .. "src/mame/video/seicross.cpp",
2193	2705	MAME_DIR .. "src/mame/drivers/terracre.cpp",
	2706	MAME_DIR .. "src/mame/includes/terracre.h",
2194	2707	MAME_DIR .. "src/mame/video/terracre.cpp",
2195	2708	MAME_DIR .. "src/mame/drivers/tubep.cpp",
	2709	MAME_DIR .. "src/mame/includes/tubep.h",
2196	2710	MAME_DIR .. "src/mame/video/tubep.cpp",
2197	2711	MAME_DIR .. "src/mame/drivers/wiping.cpp",
	2712	MAME_DIR .. "src/mame/includes/wiping.h",
2198	2713	MAME_DIR .. "src/mame/audio/wiping.cpp",
	2714	MAME_DIR .. "src/mame/audio/wiping.h",
2199	2715	MAME_DIR .. "src/mame/video/wiping.cpp",
2200	2716	MAME_DIR .. "src/mame/machine/nb1413m3.cpp",
	2717	MAME_DIR .. "src/mame/includes/nb1413m3.h",
2201	2718	MAME_DIR .. "src/mame/machine/nb1414m4.cpp",
	2719	MAME_DIR .. "src/mame/includes/nb1414m4.h",
2202	2720	}
2203	2721
2204	2722	createMAMEProjects(_target, _subtarget, "nintendo")
2205	2723	files {
2206	2724	MAME_DIR .. "src/mame/drivers/cham24.cpp",
2207	2725	MAME_DIR .. "src/mame/drivers/dkong.cpp",
	2726	MAME_DIR .. "src/mame/includes/dkong.h",
2208	2727	MAME_DIR .. "src/mame/audio/dkong.cpp",
2209	2728	MAME_DIR .. "src/mame/video/dkong.cpp",
2210	2729	MAME_DIR .. "src/mame/drivers/mario.cpp",
	2730	MAME_DIR .. "src/mame/includes/mario.h",
2211	2731	MAME_DIR .. "src/mame/audio/mario.cpp",
2212	2732	MAME_DIR .. "src/mame/video/mario.cpp",
2213	2733	MAME_DIR .. "src/mame/drivers/mmagic.cpp",
2214	2734	MAME_DIR .. "src/mame/drivers/multigam.cpp",
2215	2735	MAME_DIR .. "src/mame/drivers/n8080.cpp",
	2736	MAME_DIR .. "src/mame/includes/n8080.h",
2216	2737	MAME_DIR .. "src/mame/audio/n8080.cpp",
2217	2738	MAME_DIR .. "src/mame/video/n8080.cpp",
2218	2739	MAME_DIR .. "src/mame/drivers/nss.cpp",
2219	2740	MAME_DIR .. "src/mame/machine/snes.cpp",
2220	2741	MAME_DIR .. "src/mame/audio/snes_snd.cpp",
	2742	MAME_DIR .. "src/mame/audio/snes_snd.h",
2221	2743	MAME_DIR .. "src/mame/drivers/playch10.cpp",
	2744	MAME_DIR .. "src/mame/includes/playch10.h",
2222	2745	MAME_DIR .. "src/mame/machine/playch10.cpp",
2223	2746	MAME_DIR .. "src/mame/video/playch10.cpp",
2224	2747	MAME_DIR .. "src/mame/drivers/popeye.cpp",
	2748	MAME_DIR .. "src/mame/includes/popeye.h",
2225	2749	MAME_DIR .. "src/mame/video/popeye.cpp",
2226	2750	MAME_DIR .. "src/mame/drivers/punchout.cpp",
	2751	MAME_DIR .. "src/mame/includes/punchout.h",
2227	2752	MAME_DIR .. "src/mame/video/punchout.cpp",
2228	2753	MAME_DIR .. "src/mame/drivers/famibox.cpp",
2229	2754	MAME_DIR .. "src/mame/drivers/sfcbox.cpp",
2230	2755	MAME_DIR .. "src/mame/drivers/snesb.cpp",
2231	2756	MAME_DIR .. "src/mame/drivers/spacefb.cpp",
	2757	MAME_DIR .. "src/mame/includes/spacefb.h",
2232	2758	MAME_DIR .. "src/mame/audio/spacefb.cpp",
2233	2759	MAME_DIR .. "src/mame/video/spacefb.cpp",
2234	2760	MAME_DIR .. "src/mame/drivers/vsnes.cpp",
	2761	MAME_DIR .. "src/mame/includes/vsnes.h",
2235	2762	MAME_DIR .. "src/mame/machine/vsnes.cpp",
2236	2763	MAME_DIR .. "src/mame/video/vsnes.cpp",
2237	2764	MAME_DIR .. "src/mame/video/ppu2c0x.cpp",
	2765	MAME_DIR .. "src/mame/video/ppu2c0x.h",
2238	2766
2239	2767
2240	2768	}
r250251	r250252
2242	2770	createMAMEProjects(_target, _subtarget, "nix")
2243	2771	files {
2244	2772	MAME_DIR .. "src/mame/drivers/fitfight.cpp",
	2773	MAME_DIR .. "src/mame/includes/fitfight.h",
2245	2774	MAME_DIR .. "src/mame/video/fitfight.cpp",
2246	2775	MAME_DIR .. "src/mame/drivers/pirates.cpp",
	2776	MAME_DIR .. "src/mame/includes/pirates.h",
2247	2777	MAME_DIR .. "src/mame/video/pirates.cpp",
2248	2778	}
2249	2779
r250251	r250252
2254	2784	MAME_DIR .. "src/mame/drivers/ddealer.cpp",
2255	2785	MAME_DIR .. "src/mame/drivers/jalmah.cpp",
2256	2786	MAME_DIR .. "src/mame/drivers/macrossp.cpp",
	2787	MAME_DIR .. "src/mame/includes/macrossp.h",
2257	2788	MAME_DIR .. "src/mame/video/macrossp.cpp",
2258	2789	MAME_DIR .. "src/mame/drivers/nmk16.cpp",
	2790	MAME_DIR .. "src/mame/includes/nmk16.h",
2259	2791	MAME_DIR .. "src/mame/machine/nmk004.cpp",
	2792	MAME_DIR .. "src/mame/machine/nmk004.h",
2260	2793	MAME_DIR .. "src/mame/video/nmk16.cpp",
2261	2794	MAME_DIR .. "src/mame/drivers/quizdna.cpp",
	2795	MAME_DIR .. "src/mame/includes/quizdna.h",
2262	2796	MAME_DIR .. "src/mame/video/quizdna.cpp",
2263	2797	MAME_DIR .. "src/mame/drivers/quizpani.cpp",
	2798	MAME_DIR .. "src/mame/includes/quizpani.h",
2264	2799	MAME_DIR .. "src/mame/video/quizpani.cpp",
2265	2800	}
2266	2801
2267	2802	createMAMEProjects(_target, _subtarget, "olympia")
2268	2803	files {
2269	2804	MAME_DIR .. "src/mame/drivers/dday.cpp",
	2805	MAME_DIR .. "src/mame/includes/dday.h",
2270	2806	MAME_DIR .. "src/mame/video/dday.cpp",
2271	2807	MAME_DIR .. "src/mame/drivers/lbeach.cpp",
2272	2808	MAME_DIR .. "src/mame/drivers/monzagp.cpp",
2273	2809	MAME_DIR .. "src/mame/drivers/portrait.cpp",
	2810	MAME_DIR .. "src/mame/includes/portrait.h",
2274	2811	MAME_DIR .. "src/mame/video/portrait.cpp",
2275	2812	MAME_DIR .. "src/mame/drivers/vega.cpp",
2276	2813	}
r250251	r250252
2278	2815	createMAMEProjects(_target, _subtarget, "omori")
2279	2816	files {
2280	2817	MAME_DIR .. "src/mame/drivers/battlex.cpp",
	2818	MAME_DIR .. "src/mame/includes/battlex.h",
2281	2819	MAME_DIR .. "src/mame/video/battlex.cpp",
2282	2820	MAME_DIR .. "src/mame/drivers/carjmbre.cpp",
	2821	MAME_DIR .. "src/mame/includes/carjmbre.h",
2283	2822	MAME_DIR .. "src/mame/video/carjmbre.cpp",
2284	2823	MAME_DIR .. "src/mame/drivers/popper.cpp",
	2824	MAME_DIR .. "src/mame/includes/popper.h",
2285	2825	MAME_DIR .. "src/mame/video/popper.cpp",
2286	2826	MAME_DIR .. "src/mame/drivers/spaceg.cpp",
2287	2827	}
r250251	r250252
2289	2829	createMAMEProjects(_target, _subtarget, "orca")
2290	2830	files {
2291	2831	MAME_DIR .. "src/mame/drivers/espial.cpp",
	2832	MAME_DIR .. "src/mame/includes/espial.h",
2292	2833	MAME_DIR .. "src/mame/video/espial.cpp",
2293	2834	MAME_DIR .. "src/mame/drivers/funkybee.cpp",
	2835	MAME_DIR .. "src/mame/includes/funkybee.h",
2294	2836	MAME_DIR .. "src/mame/video/funkybee.cpp",
2295	2837	MAME_DIR .. "src/mame/drivers/marineb.cpp",
	2838	MAME_DIR .. "src/mame/includes/marineb.h",
2296	2839	MAME_DIR .. "src/mame/video/marineb.cpp",
2297	2840	MAME_DIR .. "src/mame/drivers/vastar.cpp",
	2841	MAME_DIR .. "src/mame/includes/vastar.h",
2298	2842	MAME_DIR .. "src/mame/video/vastar.cpp",
2299	2843	MAME_DIR .. "src/mame/drivers/zodiack.cpp",
	2844	MAME_DIR .. "src/mame/includes/zodiack.h",
2300	2845	MAME_DIR .. "src/mame/video/zodiack.cpp",
2301	2846	}
2302	2847
2303	2848	createMAMEProjects(_target, _subtarget, "pacific")
2304	2849	files {
2305	2850	MAME_DIR .. "src/mame/drivers/mrflea.cpp",
	2851	MAME_DIR .. "src/mame/includes/mrflea.h",
2306	2852	MAME_DIR .. "src/mame/video/mrflea.cpp",
2307	2853	MAME_DIR .. "src/mame/drivers/thief.cpp",
	2854	MAME_DIR .. "src/mame/includes/thief.h",
2308	2855	MAME_DIR .. "src/mame/video/thief.cpp",
2309	2856	}
2310	2857
r250251	r250252
2312	2859	files {
2313	2860	MAME_DIR .. "src/mame/drivers/jrpacman.cpp",
2314	2861	MAME_DIR .. "src/mame/drivers/pacman.cpp",
	2862	MAME_DIR .. "src/mame/includes/pacman.h",
2315	2863	MAME_DIR .. "src/mame/video/pacman.cpp",
2316	2864	MAME_DIR .. "src/mame/machine/acitya.cpp",
2317	2865	MAME_DIR .. "src/mame/machine/jumpshot.cpp",
r250251	r250252
2327	2875	MAME_DIR .. "src/mame/drivers/tourvis.cpp",
2328	2876	MAME_DIR .. "src/mame/drivers/uapce.cpp",
2329	2877	MAME_DIR .. "src/mame/machine/pcecommn.cpp",
	2878	MAME_DIR .. "src/mame/machine/pcecommn.h",
2330	2879	}
2331	2880
2332	2881	createMAMEProjects(_target, _subtarget, "phoenix")
2333	2882	files {
2334	2883	MAME_DIR .. "src/mame/drivers/naughtyb.cpp",
	2884	MAME_DIR .. "src/mame/includes/naughtyb.h",
2335	2885	MAME_DIR .. "src/mame/video/naughtyb.cpp",
2336	2886	MAME_DIR .. "src/mame/drivers/phoenix.cpp",
	2887	MAME_DIR .. "src/mame/includes/phoenix.h",
2337	2888	MAME_DIR .. "src/mame/audio/phoenix.cpp",
2338	2889	MAME_DIR .. "src/mame/video/phoenix.cpp",
2339	2890	MAME_DIR .. "src/mame/drivers/safarir.cpp",
2340	2891	MAME_DIR .. "src/mame/audio/pleiads.cpp",
	2892	MAME_DIR .. "src/mame/audio/pleiads.h",
2341	2893	}
2342	2894
2343	2895	createMAMEProjects(_target, _subtarget, "playmark")
2344	2896	files {
2345	2897	MAME_DIR .. "src/mame/drivers/drtomy.cpp",
2346	2898	MAME_DIR .. "src/mame/drivers/playmark.cpp",
	2899	MAME_DIR .. "src/mame/includes/playmark.h",
2347	2900	MAME_DIR .. "src/mame/video/playmark.cpp",
2348	2901	MAME_DIR .. "src/mame/drivers/powerbal.cpp",
2349	2902	MAME_DIR .. "src/mame/drivers/sderby.cpp",
	2903	MAME_DIR .. "src/mame/includes/sderby.h",
2350	2904	MAME_DIR .. "src/mame/video/sderby.cpp",
2351	2905	MAME_DIR .. "src/mame/drivers/sslam.cpp",
	2906	MAME_DIR .. "src/mame/includes/sslam.h",
2352	2907	MAME_DIR .. "src/mame/video/sslam.cpp",
2353	2908	}
2354	2909
2355	2910	createMAMEProjects(_target, _subtarget, "psikyo")
2356	2911	files {
2357	2912	MAME_DIR .. "src/mame/drivers/psikyo.cpp",
	2913	MAME_DIR .. "src/mame/includes/psikyo.h",
2358	2914	MAME_DIR .. "src/mame/video/psikyo.cpp",
2359	2915	MAME_DIR .. "src/mame/drivers/psikyo4.cpp",
	2916	MAME_DIR .. "src/mame/includes/psikyo4.h",
2360	2917	MAME_DIR .. "src/mame/video/psikyo4.cpp",
2361	2918	MAME_DIR .. "src/mame/drivers/psikyosh.cpp",
	2919	MAME_DIR .. "src/mame/includes/psikyosh.h",
2362	2920	MAME_DIR .. "src/mame/video/psikyosh.cpp",
2363	2921	}
2364	2922
2365	2923	createMAMEProjects(_target, _subtarget, "ramtek")
2366	2924	files {
2367	2925	MAME_DIR .. "src/mame/drivers/hitme.cpp",
	2926	MAME_DIR .. "src/mame/includes/hitme.h",
2368	2927	MAME_DIR .. "src/mame/audio/hitme.cpp",
2369	2928	MAME_DIR .. "src/mame/drivers/ramtek.cpp",
2370	2929	MAME_DIR .. "src/mame/drivers/starcrus.cpp",
	2930	MAME_DIR .. "src/mame/includes/starcrus.h",
2371	2931	MAME_DIR .. "src/mame/video/starcrus.cpp",
2372	2932	}
2373	2933
2374	2934	createMAMEProjects(_target, _subtarget, "rare")
2375	2935	files {
2376	2936	MAME_DIR .. "src/mame/drivers/btoads.cpp",
	2937	MAME_DIR .. "src/mame/includes/btoads.h",
2377	2938	MAME_DIR .. "src/mame/video/btoads.cpp",
2378	2939	MAME_DIR .. "src/mame/drivers/kinst.cpp",
2379	2940	MAME_DIR .. "src/mame/drivers/xtheball.cpp",
r250251	r250252
2382	2943	createMAMEProjects(_target, _subtarget, "sanritsu")
2383	2944	files {
2384	2945	MAME_DIR .. "src/mame/drivers/appoooh.cpp",
	2946	MAME_DIR .. "src/mame/includes/appoooh.h",
2385	2947	MAME_DIR .. "src/mame/video/appoooh.cpp",
2386	2948	MAME_DIR .. "src/mame/drivers/bankp.cpp",
	2949	MAME_DIR .. "src/mame/includes/bankp.h",
2387	2950	MAME_DIR .. "src/mame/video/bankp.cpp",
2388	2951	MAME_DIR .. "src/mame/drivers/chinsan.cpp",
2389	2952	MAME_DIR .. "src/mame/drivers/drmicro.cpp",
	2953	MAME_DIR .. "src/mame/includes/drmicro.h",
2390	2954	MAME_DIR .. "src/mame/video/drmicro.cpp",
2391	2955	MAME_DIR .. "src/mame/drivers/jantotsu.cpp",
2392	2956	MAME_DIR .. "src/mame/drivers/mayumi.cpp",
2393	2957	MAME_DIR .. "src/mame/drivers/mermaid.cpp",
	2958	MAME_DIR .. "src/mame/includes/mermaid.h",
2394	2959	MAME_DIR .. "src/mame/video/mermaid.cpp",
2395	2960	MAME_DIR .. "src/mame/drivers/mjkjidai.cpp",
	2961	MAME_DIR .. "src/mame/includes/mjkjidai.h",
2396	2962	MAME_DIR .. "src/mame/video/mjkjidai.cpp",
2397	2963	}
2398	2964
2399	2965	createMAMEProjects(_target, _subtarget, "sega")
2400	2966	files {
2401	2967	MAME_DIR .. "src/mame/drivers/angelkds.cpp",
	2968	MAME_DIR .. "src/mame/includes/angelkds.h",
2402	2969	MAME_DIR .. "src/mame/video/angelkds.cpp",
2403	2970	MAME_DIR .. "src/mame/drivers/bingoc.cpp",
2404	2971	MAME_DIR .. "src/mame/drivers/blockade.cpp",
	2972	MAME_DIR .. "src/mame/includes/blockade.h",
2405	2973	MAME_DIR .. "src/mame/audio/blockade.cpp",
2406	2974	MAME_DIR .. "src/mame/video/blockade.cpp",
2407	2975	MAME_DIR .. "src/mame/drivers/calorie.cpp",
2408	2976	MAME_DIR .. "src/mame/drivers/chihiro.cpp",
	2977	MAME_DIR .. "src/mame/includes/chihiro.h",
2409	2978	MAME_DIR .. "src/mame/video/chihiro.cpp",
2410	2979	MAME_DIR .. "src/mame/drivers/coolridr.cpp",
2411	2980	MAME_DIR .. "src/mame/drivers/deniam.cpp",
	2981	MAME_DIR .. "src/mame/includes/deniam.h",
2412	2982	MAME_DIR .. "src/mame/video/deniam.cpp",
2413	2983	MAME_DIR .. "src/mame/drivers/dotrikun.cpp",
2414	2984	MAME_DIR .. "src/mame/drivers/gpworld.cpp",
2415	2985	MAME_DIR .. "src/mame/drivers/hikaru.cpp",
2416	2986	MAME_DIR .. "src/mame/drivers/hshavoc.cpp",
2417	2987	MAME_DIR .. "src/mame/drivers/kopunch.cpp",
	2988	MAME_DIR .. "src/mame/includes/kopunch.h",
2418	2989	MAME_DIR .. "src/mame/video/kopunch.cpp",
2419	2990	MAME_DIR .. "src/mame/drivers/lindbergh.cpp",
2420	2991	MAME_DIR .. "src/mame/machine/segabb.cpp",
	2992	MAME_DIR .. "src/mame/machine/segabb.h",
2421	2993	MAME_DIR .. "src/mame/machine/megadriv.cpp",
	2994	MAME_DIR .. "src/mame/includes/md_cons.h",
2422	2995	MAME_DIR .. "src/mame/drivers/megadrvb.cpp",
2423	2996	MAME_DIR .. "src/mame/drivers/megaplay.cpp",
2424	2997	MAME_DIR .. "src/mame/drivers/megatech.cpp",
2425	2998	MAME_DIR .. "src/mame/drivers/model1.cpp",
	2999	MAME_DIR .. "src/mame/includes/model1.h",
2426	3000	MAME_DIR .. "src/mame/machine/model1.cpp",
2427	3001	MAME_DIR .. "src/mame/video/model1.cpp",
2428	3002	MAME_DIR .. "src/mame/machine/s32comm.cpp",
	3003	MAME_DIR .. "src/mame/machine/s32comm.h",
2429	3004	MAME_DIR .. "src/mame/machine/m1comm.cpp",
	3005	MAME_DIR .. "src/mame/machine/m1comm.h",
2430	3006	MAME_DIR .. "src/mame/audio/dsbz80.cpp",
	3007	MAME_DIR .. "src/mame/audio/dsbz80.h",
2431	3008	MAME_DIR .. "src/mame/drivers/model2.cpp",
	3009	MAME_DIR .. "src/mame/includes/model2.h",
	3010	MAME_DIR .. "src/mame/video/model2rd.inc",
2432	3011	MAME_DIR .. "src/mame/video/model2.cpp",
2433	3012	MAME_DIR .. "src/mame/drivers/model3.cpp",
	3013	MAME_DIR .. "src/mame/includes/model3.h",
2434	3014	MAME_DIR .. "src/mame/video/model3.cpp",
2435	3015	MAME_DIR .. "src/mame/machine/model3.cpp",
2436	3016	MAME_DIR .. "src/mame/drivers/monacogp.cpp",
2437	3017	MAME_DIR .. "src/mame/drivers/naomi.cpp",
	3018	MAME_DIR .. "src/mame/includes/naomi.h",
	3019	MAME_DIR .. "src/mame/includes/dc.h",
2438	3020	MAME_DIR .. "src/mame/drivers/segasp.cpp",
	3021	MAME_DIR .. "src/mame/includes/segasp.h",
2439	3022	MAME_DIR .. "src/mame/machine/dc.cpp",
2440	3023	MAME_DIR .. "src/mame/video/powervr2.cpp",
	3024	MAME_DIR .. "src/mame/video/powervr2.h",
2441	3025	MAME_DIR .. "src/mame/machine/naomi.cpp",
2442	3026	MAME_DIR .. "src/mame/machine/naomig1.cpp",
	3027	MAME_DIR .. "src/mame/machine/naomig1.h",
2443	3028	MAME_DIR .. "src/mame/machine/naomibd.cpp",
	3029	MAME_DIR .. "src/mame/machine/naomibd.h",
2444	3030	MAME_DIR .. "src/mame/machine/naomirom.cpp",
	3031	MAME_DIR .. "src/mame/machine/naomirom.h",
2445	3032	MAME_DIR .. "src/mame/machine/naomigd.cpp",
	3033	MAME_DIR .. "src/mame/machine/naomigd.h",
2446	3034	MAME_DIR .. "src/mame/machine/naomim1.cpp",
	3035	MAME_DIR .. "src/mame/machine/naomim1.h",
2447	3036	MAME_DIR .. "src/mame/machine/naomim2.cpp",
	3037	MAME_DIR .. "src/mame/machine/naomim2.h",
2448	3038	MAME_DIR .. "src/mame/machine/naomim4.cpp",
	3039	MAME_DIR .. "src/mame/machine/naomim4.h",
2449	3040	MAME_DIR .. "src/mame/machine/315-5881_crypt.cpp",
	3041	MAME_DIR .. "src/mame/machine/315-5881_crypt.h",
2450	3042	MAME_DIR .. "src/mame/machine/awboard.cpp",
	3043	MAME_DIR .. "src/mame/machine/awboard.h",
2451	3044	MAME_DIR .. "src/mame/machine/mie.cpp",
	3045	MAME_DIR .. "src/mame/machine/mie.h",
2452	3046	MAME_DIR .. "src/mame/machine/maple-dc.cpp",
	3047	MAME_DIR .. "src/mame/machine/maple-dc.h",
2453	3048	MAME_DIR .. "src/mame/machine/mapledev.cpp",
	3049	MAME_DIR .. "src/mame/machine/mapledev.h",
2454	3050	MAME_DIR .. "src/mame/machine/dc-ctrl.cpp",
	3051	MAME_DIR .. "src/mame/machine/dc-ctrl.h",
2455	3052	MAME_DIR .. "src/mame/machine/jvs13551.cpp",
	3053	MAME_DIR .. "src/mame/machine/jvs13551.h",
2456	3054	MAME_DIR .. "src/mame/drivers/triforce.cpp",
2457	3055	MAME_DIR .. "src/mame/drivers/puckpkmn.cpp",
2458	3056	MAME_DIR .. "src/mame/drivers/segac2.cpp",
r250251	r250252
2460	3058	MAME_DIR .. "src/mame/drivers/shtzone.cpp",
2461	3059	MAME_DIR .. "src/mame/drivers/segacoin.cpp",
2462	3060	MAME_DIR .. "src/mame/drivers/segag80r.cpp",
	3061	MAME_DIR .. "src/mame/includes/segag80r.h",
2463	3062	MAME_DIR .. "src/mame/machine/segag80.cpp",
	3063	MAME_DIR .. "src/mame/machine/segag80.h",
2464	3064	MAME_DIR .. "src/mame/audio/segag80r.cpp",
2465	3065	MAME_DIR .. "src/mame/video/segag80r.cpp",
2466	3066	MAME_DIR .. "src/mame/drivers/segag80v.cpp",
	3067	MAME_DIR .. "src/mame/includes/segag80v.h",
2467	3068	MAME_DIR .. "src/mame/audio/segag80v.cpp",
2468	3069	MAME_DIR .. "src/mame/video/segag80v.cpp",
2469	3070	MAME_DIR .. "src/mame/drivers/segahang.cpp",
	3071	MAME_DIR .. "src/mame/includes/segahang.h",
2470	3072	MAME_DIR .. "src/mame/video/segahang.cpp",
2471	3073	MAME_DIR .. "src/mame/drivers/segajw.cpp",
2472	3074	MAME_DIR .. "src/mame/drivers/segald.cpp",
2473	3075	MAME_DIR .. "src/mame/drivers/segaorun.cpp",
	3076	MAME_DIR .. "src/mame/includes/segaorun.h",
2474	3077	MAME_DIR .. "src/mame/video/segaorun.cpp",
2475	3078	MAME_DIR .. "src/mame/drivers/segas16a.cpp",
	3079	MAME_DIR .. "src/mame/includes/segas16a.h",
2476	3080	MAME_DIR .. "src/mame/video/segas16a.cpp",
2477	3081	MAME_DIR .. "src/mame/drivers/segas16b.cpp",
	3082	MAME_DIR .. "src/mame/includes/segas16b.h",
2478	3083	MAME_DIR .. "src/mame/video/segas16b.cpp",
2479	3084	MAME_DIR .. "src/mame/drivers/segas18.cpp",
	3085	MAME_DIR .. "src/mame/includes/segas18.h",
2480	3086	MAME_DIR .. "src/mame/video/segas18.cpp",
2481	3087	MAME_DIR .. "src/mame/drivers/segas24.cpp",
	3088	MAME_DIR .. "src/mame/includes/segas24.h",
2482	3089	MAME_DIR .. "src/mame/video/segas24.cpp",
2483	3090	MAME_DIR .. "src/mame/drivers/segam1.cpp",
2484	3091	MAME_DIR .. "src/mame/drivers/segas32.cpp",
	3092	MAME_DIR .. "src/mame/includes/segas32.h",
2485	3093	MAME_DIR .. "src/mame/machine/segas32.cpp",
2486	3094	MAME_DIR .. "src/mame/video/segas32.cpp",
2487	3095	MAME_DIR .. "src/mame/drivers/segaufo.cpp",
2488	3096	MAME_DIR .. "src/mame/drivers/segaxbd.cpp",
	3097	MAME_DIR .. "src/mame/includes/segaxbd.h",
2489	3098	MAME_DIR .. "src/mame/video/segaxbd.cpp",
2490	3099	MAME_DIR .. "src/mame/drivers/segaybd.cpp",
	3100	MAME_DIR .. "src/mame/includes/segaybd.h",
2491	3101	MAME_DIR .. "src/mame/video/segaybd.cpp",
	3102	MAME_DIR .. "src/mame/includes/segaipt.h",
2492	3103	MAME_DIR .. "src/mame/drivers/sg1000a.cpp",
2493	3104	MAME_DIR .. "src/mame/drivers/stactics.cpp",
	3105	MAME_DIR .. "src/mame/includes/stactics.h",
2494	3106	MAME_DIR .. "src/mame/video/stactics.cpp",
2495	3107	MAME_DIR .. "src/mame/drivers/stv.cpp",
	3108	MAME_DIR .. "src/mame/includes/stv.h",
2496	3109	MAME_DIR .. "src/mame/machine/stvprot.cpp",
2497	3110	MAME_DIR .. "src/mame/machine/315-5838_317-0229_comp.cpp",
	3111	MAME_DIR .. "src/mame/machine/315-5838_317-0229_comp.h",
2498	3112	MAME_DIR .. "src/mame/drivers/suprloco.cpp",
	3113	MAME_DIR .. "src/mame/includes/suprloco.h",
2499	3114	MAME_DIR .. "src/mame/video/suprloco.cpp",
2500	3115	MAME_DIR .. "src/mame/drivers/system1.cpp",
	3116	MAME_DIR .. "src/mame/includes/system1.h",
2501	3117	MAME_DIR .. "src/mame/video/system1.cpp",
2502	3118	MAME_DIR .. "src/mame/drivers/system16.cpp",
	3119	MAME_DIR .. "src/mame/includes/system16.h",
2503	3120	MAME_DIR .. "src/mame/video/system16.cpp",
2504	3121	MAME_DIR .. "src/mame/drivers/timetrv.cpp",
2505	3122	MAME_DIR .. "src/mame/drivers/turbo.cpp",
	3123	MAME_DIR .. "src/mame/includes/turbo.h",
2506	3124	MAME_DIR .. "src/mame/audio/turbo.cpp",
2507	3125	MAME_DIR .. "src/mame/video/turbo.cpp",
2508	3126	MAME_DIR .. "src/mame/drivers/vicdual.cpp",
	3127	MAME_DIR .. "src/mame/includes/vicdual.h",
2509	3128	MAME_DIR .. "src/mame/audio/vicdual.cpp",
2510	3129	MAME_DIR .. "src/mame/video/vicdual.cpp",
2511	3130	MAME_DIR .. "src/mame/audio/carnival.cpp",
r250251	r250252
2513	3132	MAME_DIR .. "src/mame/audio/invinco.cpp",
2514	3133	MAME_DIR .. "src/mame/audio/pulsar.cpp",
2515	3134	MAME_DIR .. "src/mame/drivers/zaxxon.cpp",
	3135	MAME_DIR .. "src/mame/includes/zaxxon.h",
2516	3136	MAME_DIR .. "src/mame/audio/zaxxon.cpp",
2517	3137	MAME_DIR .. "src/mame/video/zaxxon.cpp",
2518	3138	MAME_DIR .. "src/mame/machine/315_5296.cpp",
	3139	MAME_DIR .. "src/mame/machine/315_5296.h",
2519	3140	MAME_DIR .. "src/mame/machine/fd1089.cpp",
	3141	MAME_DIR .. "src/mame/machine/fd1089.h",
2520	3142	MAME_DIR .. "src/mame/machine/fd1094.cpp",
	3143	MAME_DIR .. "src/mame/machine/fd1094.h",
2521	3144	MAME_DIR .. "src/mame/machine/fddebug.cpp",
	3145	MAME_DIR .. "src/mame/machine/fddebug.h",
2522	3146	MAME_DIR .. "src/mame/machine/mc8123.cpp",
	3147	MAME_DIR .. "src/mame/machine/mc8123.h",
2523	3148	MAME_DIR .. "src/mame/machine/segaic16.cpp",
	3149	MAME_DIR .. "src/mame/machine/segaic16.h",
2524	3150	MAME_DIR .. "src/mame/audio/segasnd.cpp",
	3151	MAME_DIR .. "src/mame/audio/segasnd.h",
2525	3152	MAME_DIR .. "src/mame/video/segaic16.cpp",
	3153	MAME_DIR .. "src/mame/video/segaic16.h",
2526	3154	MAME_DIR .. "src/mame/video/segaic16_road.cpp",
	3155	MAME_DIR .. "src/mame/video/segaic16_road.h",
2527	3156	MAME_DIR .. "src/mame/video/sega16sp.cpp",
	3157	MAME_DIR .. "src/mame/video/sega16sp.h",
2528	3158	MAME_DIR .. "src/mame/video/segaic24.cpp",
	3159	MAME_DIR .. "src/mame/video/segaic24.h",
2529	3160	MAME_DIR .. "src/mame/machine/gdrom.cpp",
	3161	MAME_DIR .. "src/mame/machine/gdrom.h",
2530	3162	MAME_DIR .. "src/mame/machine/xbox.cpp",
2531	3163	}
2532	3164
2533	3165	createMAMEProjects(_target, _subtarget, "seibu")
2534	3166	files {
2535	3167	MAME_DIR .. "src/mame/drivers/bloodbro.cpp",
	3168	MAME_DIR .. "src/mame/includes/bloodbro.h",
2536	3169	MAME_DIR .. "src/mame/video/bloodbro.cpp",
2537	3170	MAME_DIR .. "src/mame/drivers/cabal.cpp",
	3171	MAME_DIR .. "src/mame/includes/cabal.h",
2538	3172	MAME_DIR .. "src/mame/video/cabal.cpp",
2539	3173	MAME_DIR .. "src/mame/drivers/cshooter.cpp",
2540	3174	MAME_DIR .. "src/mame/drivers/dcon.cpp",
	3175	MAME_DIR .. "src/mame/includes/dcon.h",
2541	3176	MAME_DIR .. "src/mame/video/dcon.cpp",
2542	3177	MAME_DIR .. "src/mame/drivers/deadang.cpp",
	3178	MAME_DIR .. "src/mame/includes/deadang.h",
2543	3179	MAME_DIR .. "src/mame/video/deadang.cpp",
2544	3180	MAME_DIR .. "src/mame/drivers/dynduke.cpp",
	3181	MAME_DIR .. "src/mame/includes/dynduke.h",
2545	3182	MAME_DIR .. "src/mame/video/dynduke.cpp",
2546	3183	MAME_DIR .. "src/mame/drivers/feversoc.cpp",
2547	3184	MAME_DIR .. "src/mame/drivers/goal92.cpp",
	3185	MAME_DIR .. "src/mame/includes/goal92.h",
2548	3186	MAME_DIR .. "src/mame/video/goal92.cpp",
2549	3187	MAME_DIR .. "src/mame/drivers/goodejan.cpp",
2550	3188	MAME_DIR .. "src/mame/drivers/kncljoe.cpp",
	3189	MAME_DIR .. "src/mame/includes/kncljoe.h",
2551	3190	MAME_DIR .. "src/mame/video/kncljoe.cpp",
2552	3191	MAME_DIR .. "src/mame/drivers/legionna.cpp",
	3192	MAME_DIR .. "src/mame/includes/legionna.h",
2553	3193	MAME_DIR .. "src/mame/video/legionna.cpp",
2554	3194	MAME_DIR .. "src/mame/drivers/mustache.cpp",
	3195	MAME_DIR .. "src/mame/includes/mustache.h",
2555	3196	MAME_DIR .. "src/mame/video/mustache.cpp",
2556	3197	MAME_DIR .. "src/mame/drivers/panicr.cpp",
2557	3198	MAME_DIR .. "src/mame/drivers/raiden.cpp",
	3199	MAME_DIR .. "src/mame/includes/raiden.h",
2558	3200	MAME_DIR .. "src/mame/video/raiden.cpp",
2559	3201	MAME_DIR .. "src/mame/drivers/raiden2.cpp",
	3202	MAME_DIR .. "src/mame/includes/raiden2.h",
2560	3203	MAME_DIR .. "src/mame/machine/r2crypt.cpp",
2561	3204	MAME_DIR .. "src/mame/machine/raiden2cop.cpp",
	3205	MAME_DIR .. "src/mame/machine/raiden2cop.h",
2562	3206	MAME_DIR .. "src/mame/drivers/r2dx_v33.cpp",
2563	3207	MAME_DIR .. "src/mame/drivers/seibuspi.cpp",
	3208	MAME_DIR .. "src/mame/includes/seibuspi.h",
2564	3209	MAME_DIR .. "src/mame/machine/seibuspi.cpp",
	3210	MAME_DIR .. "src/mame/machine/seibuspi.h",
2565	3211	MAME_DIR .. "src/mame/video/seibuspi.cpp",
2566	3212	MAME_DIR .. "src/mame/drivers/sengokmj.cpp",
2567	3213	MAME_DIR .. "src/mame/drivers/stfight.cpp",
	3214	MAME_DIR .. "src/mame/includes/stfight.h",
2568	3215	MAME_DIR .. "src/mame/machine/stfight.cpp",
2569	3216	MAME_DIR .. "src/mame/video/stfight.cpp",
2570	3217	MAME_DIR .. "src/mame/drivers/toki.cpp",
	3218	MAME_DIR .. "src/mame/includes/toki.h",
2571	3219	MAME_DIR .. "src/mame/video/toki.cpp",
2572	3220	MAME_DIR .. "src/mame/drivers/wiz.cpp",
	3221	MAME_DIR .. "src/mame/includes/wiz.h",
2573	3222	MAME_DIR .. "src/mame/video/wiz.cpp",
2574	3223	MAME_DIR .. "src/mame/machine/seicop.cpp",
	3224	MAME_DIR .. "src/mame/machine/seicop.h",
2575	3225	MAME_DIR .. "src/mame/machine/spisprit.cpp",
2576	3226	MAME_DIR .. "src/mame/audio/seibu.cpp",
	3227	MAME_DIR .. "src/mame/audio/seibu.h",
2577	3228	MAME_DIR .. "src/mame/video/seibu_crtc.cpp",
	3229	MAME_DIR .. "src/mame/video/seibu_crtc.h",
2578	3230	}
2579	3231
2580	3232	createMAMEProjects(_target, _subtarget, "seta")
r250251	r250252
2582	3234	MAME_DIR .. "src/mame/drivers/aleck64.cpp",
2583	3235	MAME_DIR .. "src/mame/machine/n64.cpp",
2584	3236	MAME_DIR .. "src/mame/video/n64.cpp",
	3237	MAME_DIR .. "src/mame/video/n64types.h",
	3238	MAME_DIR .. "src/mame/video/rdpfiltr.inc",
	3239	MAME_DIR .. "src/mame/video/n64.h",
2585	3240	MAME_DIR .. "src/mame/video/rdpblend.cpp",
	3241	MAME_DIR .. "src/mame/video/rdpblend.h",
2586	3242	MAME_DIR .. "src/mame/video/rdptpipe.cpp",
	3243	MAME_DIR .. "src/mame/video/rdptpipe.h",
2587	3244	MAME_DIR .. "src/mame/drivers/hanaawas.cpp",
	3245	MAME_DIR .. "src/mame/includes/hanaawas.h",
2588	3246	MAME_DIR .. "src/mame/video/hanaawas.cpp",
2589	3247	MAME_DIR .. "src/mame/drivers/jclub2.cpp",
2590	3248	MAME_DIR .. "src/mame/drivers/macs.cpp",
2591	3249	MAME_DIR .. "src/mame/drivers/seta.cpp",
	3250	MAME_DIR .. "src/mame/includes/seta.h",
2592	3251	MAME_DIR .. "src/mame/video/seta.cpp",
2593	3252	MAME_DIR .. "src/mame/drivers/seta2.cpp",
	3253	MAME_DIR .. "src/mame/includes/seta2.h",
2594	3254	MAME_DIR .. "src/mame/video/seta2.cpp",
2595	3255	MAME_DIR .. "src/mame/drivers/speedatk.cpp",
	3256	MAME_DIR .. "src/mame/includes/speedatk.h",
2596	3257	MAME_DIR .. "src/mame/video/speedatk.cpp",
2597	3258	MAME_DIR .. "src/mame/drivers/speglsht.cpp",
2598	3259	MAME_DIR .. "src/mame/drivers/srmp2.cpp",
	3260	MAME_DIR .. "src/mame/includes/srmp2.h",
2599	3261	MAME_DIR .. "src/mame/video/srmp2.cpp",
2600	3262	MAME_DIR .. "src/mame/drivers/srmp5.cpp",
2601	3263	MAME_DIR .. "src/mame/drivers/srmp6.cpp",
2602	3264	MAME_DIR .. "src/mame/drivers/ssv.cpp",
	3265	MAME_DIR .. "src/mame/includes/ssv.h",
2603	3266	MAME_DIR .. "src/mame/video/ssv.cpp",
2604	3267	MAME_DIR .. "src/mame/video/st0020.cpp",
	3268	MAME_DIR .. "src/mame/video/st0020.h",
2605	3269	MAME_DIR .. "src/mame/machine/st0016.cpp",
	3270	MAME_DIR .. "src/mame/machine/st0016.h",
2606	3271	MAME_DIR .. "src/mame/drivers/simple_st0016.cpp",
	3272	MAME_DIR .. "src/mame/includes/simple_st0016.h",
2607	3273	MAME_DIR .. "src/mame/video/seta001.cpp",
	3274	MAME_DIR .. "src/mame/video/seta001.h",
2608	3275	MAME_DIR .. "src/mame/drivers/thedealr.cpp",
2609	3276	}
2610	3277
r250251	r250252
2615	3282	MAME_DIR .. "src/mame/drivers/sigmab52.cpp",
2616	3283	MAME_DIR .. "src/mame/drivers/sigmab98.cpp",
2617	3284	MAME_DIR .. "src/mame/drivers/spiders.cpp",
	3285	MAME_DIR .. "src/mame/includes/spiders.h",
2618	3286	MAME_DIR .. "src/mame/audio/spiders.cpp",
2619	3287	MAME_DIR .. "src/mame/drivers/sub.cpp",
2620	3288	}
r250251	r250252
2622	3290	createMAMEProjects(_target, _subtarget, "snk")
2623	3291	files {
2624	3292	MAME_DIR .. "src/mame/drivers/bbusters.cpp",
	3293	MAME_DIR .. "src/mame/includes/bbusters.h",
2625	3294	MAME_DIR .. "src/mame/video/bbusters.cpp",
2626	3295	MAME_DIR .. "src/mame/drivers/dmndrby.cpp",
2627	3296	MAME_DIR .. "src/mame/drivers/hng64.cpp",
	3297	MAME_DIR .. "src/mame/includes/hng64.h",
2628	3298	MAME_DIR .. "src/mame/video/hng64.cpp",
2629	3299	MAME_DIR .. "src/mame/audio/hng64.cpp",
2630	3300	MAME_DIR .. "src/mame/machine/hng64_net.cpp",
2631	3301	MAME_DIR .. "src/mame/video/hng64_3d.cpp",
2632	3302	MAME_DIR .. "src/mame/video/hng64_sprite.cpp",
2633	3303	MAME_DIR .. "src/mame/drivers/lasso.cpp",
	3304	MAME_DIR .. "src/mame/includes/lasso.h",
2634	3305	MAME_DIR .. "src/mame/video/lasso.cpp",
2635	3306	MAME_DIR .. "src/mame/drivers/mainsnk.cpp",
	3307	MAME_DIR .. "src/mame/includes/mainsnk.h",
2636	3308	MAME_DIR .. "src/mame/video/mainsnk.cpp",
2637	3309	MAME_DIR .. "src/mame/drivers/munchmo.cpp",
	3310	MAME_DIR .. "src/mame/includes/munchmo.h",
2638	3311	MAME_DIR .. "src/mame/video/munchmo.cpp",
2639	3312	MAME_DIR .. "src/mame/drivers/prehisle.cpp",
	3313	MAME_DIR .. "src/mame/includes/prehisle.h",
2640	3314	MAME_DIR .. "src/mame/video/prehisle.cpp",
2641	3315	MAME_DIR .. "src/mame/drivers/snk6502.cpp",
	3316	MAME_DIR .. "src/mame/includes/snk6502.h",
2642	3317	MAME_DIR .. "src/mame/audio/snk6502.cpp",
2643	3318	MAME_DIR .. "src/mame/video/snk6502.cpp",
2644	3319	MAME_DIR .. "src/mame/drivers/snk.cpp",
	3320	MAME_DIR .. "src/mame/includes/snk.h",
2645	3321	MAME_DIR .. "src/mame/video/snk.cpp",
2646	3322	MAME_DIR .. "src/mame/drivers/snk68.cpp",
	3323	MAME_DIR .. "src/mame/includes/snk68.h",
2647	3324	MAME_DIR .. "src/mame/video/snk68.cpp",
2648	3325	}
2649	3326
r250251	r250252
2651	3328	files {
2652	3329	MAME_DIR .. "src/mame/drivers/zn.cpp",
2653	3330	MAME_DIR .. "src/mame/machine/zndip.cpp",
	3331	MAME_DIR .. "src/mame/machine/zndip.h",
2654	3332	MAME_DIR .. "src/mame/machine/cat702.cpp",
	3333	MAME_DIR .. "src/mame/machine/cat702.h",
2655	3334	}
2656	3335
2657	3336	createMAMEProjects(_target, _subtarget, "stern")
r250251	r250252
2670	3349	MAME_DIR .. "src/mame/drivers/subsino.cpp",
2671	3350	MAME_DIR .. "src/mame/drivers/subsino2.cpp",
2672	3351	MAME_DIR .. "src/mame/machine/subsino.cpp",
	3352	MAME_DIR .. "src/mame/machine/subsino.h",
2673	3353	}
2674	3354
2675	3355	createMAMEProjects(_target, _subtarget, "sun")
2676	3356	files {
2677	3357	MAME_DIR .. "src/mame/drivers/arabian.cpp",
	3358	MAME_DIR .. "src/mame/includes/arabian.h",
2678	3359	MAME_DIR .. "src/mame/video/arabian.cpp",
2679	3360	MAME_DIR .. "src/mame/drivers/dai3wksi.cpp",
2680	3361	MAME_DIR .. "src/mame/drivers/ikki.cpp",
	3362	MAME_DIR .. "src/mame/includes/ikki.h",
2681	3363	MAME_DIR .. "src/mame/video/ikki.cpp",
2682	3364	MAME_DIR .. "src/mame/drivers/kangaroo.cpp",
	3365	MAME_DIR .. "src/mame/includes/kangaroo.h",
2683	3366	MAME_DIR .. "src/mame/video/kangaroo.cpp",
2684	3367	MAME_DIR .. "src/mame/drivers/markham.cpp",
	3368	MAME_DIR .. "src/mame/includes/markham.h",
2685	3369	MAME_DIR .. "src/mame/video/markham.cpp",
2686	3370	MAME_DIR .. "src/mame/drivers/route16.cpp",
	3371	MAME_DIR .. "src/mame/includes/route16.h",
2687	3372	MAME_DIR .. "src/mame/video/route16.cpp",
2688	3373	MAME_DIR .. "src/mame/drivers/shanghai.cpp",
2689	3374	MAME_DIR .. "src/mame/drivers/shangha3.cpp",
	3375	MAME_DIR .. "src/mame/includes/shangha3.h",
2690	3376	MAME_DIR .. "src/mame/video/shangha3.cpp",
2691	3377	MAME_DIR .. "src/mame/drivers/strnskil.cpp",
	3378	MAME_DIR .. "src/mame/includes/strnskil.h",
2692	3379	MAME_DIR .. "src/mame/video/strnskil.cpp",
2693	3380	MAME_DIR .. "src/mame/drivers/tonton.cpp",
2694	3381	}
r250251	r250252
2697	3384	files {
2698	3385	MAME_DIR .. "src/mame/drivers/go2000.cpp",
2699	3386	MAME_DIR .. "src/mame/drivers/goindol.cpp",
	3387	MAME_DIR .. "src/mame/includes/goindol.h",
2700	3388	MAME_DIR .. "src/mame/video/goindol.cpp",
2701	3389	MAME_DIR .. "src/mame/drivers/suna8.cpp",
	3390	MAME_DIR .. "src/mame/includes/suna8.h",
2702	3391	MAME_DIR .. "src/mame/audio/suna8.cpp",
2703	3392	MAME_DIR .. "src/mame/video/suna8.cpp",
2704	3393	MAME_DIR .. "src/mame/drivers/suna16.cpp",
	3394	MAME_DIR .. "src/mame/includes/suna16.h",
2705	3395	MAME_DIR .. "src/mame/video/suna16.cpp",
2706	3396	}
2707	3397
r250251	r250252
2715	3405	files {
2716	3406	MAME_DIR .. "src/mame/drivers/2mindril.cpp",
2717	3407	MAME_DIR .. "src/mame/drivers/40love.cpp",
	3408	MAME_DIR .. "src/mame/includes/40love.h",
2718	3409	MAME_DIR .. "src/mame/video/40love.cpp",
2719	3410	MAME_DIR .. "src/mame/drivers/arkanoid.cpp",
	3411	MAME_DIR .. "src/mame/includes/arkanoid.h",
2720	3412	MAME_DIR .. "src/mame/machine/arkanoid.cpp",
2721	3413	MAME_DIR .. "src/mame/video/arkanoid.cpp",
2722	3414	MAME_DIR .. "src/mame/drivers/ashnojoe.cpp",
	3415	MAME_DIR .. "src/mame/includes/ashnojoe.h",
2723	3416	MAME_DIR .. "src/mame/video/ashnojoe.cpp",
2724	3417	MAME_DIR .. "src/mame/drivers/asuka.cpp",
	3418	MAME_DIR .. "src/mame/includes/asuka.h",
2725	3419	MAME_DIR .. "src/mame/machine/bonzeadv.cpp",
2726	3420	MAME_DIR .. "src/mame/video/asuka.cpp",
2727	3421	MAME_DIR .. "src/mame/drivers/bigevglf.cpp",
	3422	MAME_DIR .. "src/mame/includes/bigevglf.h",
2728	3423	MAME_DIR .. "src/mame/machine/bigevglf.cpp",
2729	3424	MAME_DIR .. "src/mame/video/bigevglf.cpp",
2730	3425	MAME_DIR .. "src/mame/drivers/bking.cpp",
	3426	MAME_DIR .. "src/mame/includes/bking.h",
2731	3427	MAME_DIR .. "src/mame/video/bking.cpp",
2732	3428	MAME_DIR .. "src/mame/drivers/bublbobl.cpp",
	3429	MAME_DIR .. "src/mame/includes/bublbobl.h",
2733	3430	MAME_DIR .. "src/mame/machine/bublbobl.cpp",
2734	3431	MAME_DIR .. "src/mame/video/bublbobl.cpp",
2735	3432	MAME_DIR .. "src/mame/drivers/buggychl.cpp",
	3433	MAME_DIR .. "src/mame/includes/buggychl.h",
2736	3434	MAME_DIR .. "src/mame/machine/buggychl.cpp",
	3435	MAME_DIR .. "src/mame/machine/buggychl.h",
2737	3436	MAME_DIR .. "src/mame/video/buggychl.cpp",
2738	3437	MAME_DIR .. "src/mame/drivers/capr1.cpp",
2739	3438	MAME_DIR .. "src/mame/drivers/caprcyc.cpp",
2740	3439	MAME_DIR .. "src/mame/drivers/cchance.cpp",
2741	3440	MAME_DIR .. "src/mame/drivers/chaknpop.cpp",
	3441	MAME_DIR .. "src/mame/includes/chaknpop.h",
2742	3442	MAME_DIR .. "src/mame/machine/chaknpop.cpp",
2743	3443	MAME_DIR .. "src/mame/video/chaknpop.cpp",
2744	3444	MAME_DIR .. "src/mame/drivers/champbwl.cpp",
2745	3445	MAME_DIR .. "src/mame/drivers/changela.cpp",
	3446	MAME_DIR .. "src/mame/includes/changela.h",
2746	3447	MAME_DIR .. "src/mame/video/changela.cpp",
2747	3448	MAME_DIR .. "src/mame/drivers/crbaloon.cpp",
	3449	MAME_DIR .. "src/mame/includes/crbaloon.h",
2748	3450	MAME_DIR .. "src/mame/video/crbaloon.cpp",
2749	3451	MAME_DIR .. "src/mame/audio/crbaloon.cpp",
2750	3452	MAME_DIR .. "src/mame/drivers/cyclemb.cpp",
2751	3453	MAME_DIR .. "src/mame/drivers/darius.cpp",
	3454	MAME_DIR .. "src/mame/includes/darius.h",
2752	3455	MAME_DIR .. "src/mame/video/darius.cpp",
2753	3456	MAME_DIR .. "src/mame/drivers/darkmist.cpp",
	3457	MAME_DIR .. "src/mame/includes/darkmist.h",
2754	3458	MAME_DIR .. "src/mame/video/darkmist.cpp",
2755	3459	MAME_DIR .. "src/mame/drivers/exzisus.cpp",
	3460	MAME_DIR .. "src/mame/includes/exzisus.h",
2756	3461	MAME_DIR .. "src/mame/video/exzisus.cpp",
2757	3462	MAME_DIR .. "src/mame/drivers/fgoal.cpp",
	3463	MAME_DIR .. "src/mame/includes/fgoal.h",
2758	3464	MAME_DIR .. "src/mame/video/fgoal.cpp",
2759	3465	MAME_DIR .. "src/mame/drivers/flstory.cpp",
	3466	MAME_DIR .. "src/mame/includes/flstory.h",
2760	3467	MAME_DIR .. "src/mame/machine/flstory.cpp",
2761	3468	MAME_DIR .. "src/mame/video/flstory.cpp",
2762	3469	MAME_DIR .. "src/mame/drivers/galastrm.cpp",
	3470	MAME_DIR .. "src/mame/includes/galastrm.h",
2763	3471	MAME_DIR .. "src/mame/video/galastrm.cpp",
2764	3472	MAME_DIR .. "src/mame/drivers/gladiatr.cpp",
	3473	MAME_DIR .. "src/mame/includes/gladiatr.h",
2765	3474	MAME_DIR .. "src/mame/video/gladiatr.cpp",
2766	3475	MAME_DIR .. "src/mame/drivers/grchamp.cpp",
	3476	MAME_DIR .. "src/mame/includes/grchamp.h",
2767	3477	MAME_DIR .. "src/mame/audio/grchamp.cpp",
2768	3478	MAME_DIR .. "src/mame/video/grchamp.cpp",
2769	3479	MAME_DIR .. "src/mame/drivers/groundfx.cpp",
	3480	MAME_DIR .. "src/mame/includes/groundfx.h",
2770	3481	MAME_DIR .. "src/mame/video/groundfx.cpp",
2771	3482	MAME_DIR .. "src/mame/drivers/gsword.cpp",
	3483	MAME_DIR .. "src/mame/includes/gsword.h",
2772	3484	MAME_DIR .. "src/mame/machine/tait8741.cpp",
	3485	MAME_DIR .. "src/mame/machine/tait8741.h",
2773	3486	MAME_DIR .. "src/mame/video/gsword.cpp",
2774	3487	MAME_DIR .. "src/mame/drivers/gunbustr.cpp",
	3488	MAME_DIR .. "src/mame/includes/gunbustr.h",
2775	3489	MAME_DIR .. "src/mame/video/gunbustr.cpp",
2776	3490	MAME_DIR .. "src/mame/drivers/halleys.cpp",
2777	3491	MAME_DIR .. "src/mame/drivers/invqix.cpp",
2778	3492	MAME_DIR .. "src/mame/drivers/jollyjgr.cpp",
2779	3493	MAME_DIR .. "src/mame/drivers/ksayakyu.cpp",
	3494	MAME_DIR .. "src/mame/includes/ksayakyu.h",
2780	3495	MAME_DIR .. "src/mame/video/ksayakyu.cpp",
2781	3496	MAME_DIR .. "src/mame/drivers/lgp.cpp",
2782	3497	MAME_DIR .. "src/mame/drivers/lkage.cpp",
	3498	MAME_DIR .. "src/mame/includes/lkage.h",
2783	3499	MAME_DIR .. "src/mame/machine/lkage.cpp",
2784	3500	MAME_DIR .. "src/mame/video/lkage.cpp",
2785	3501	MAME_DIR .. "src/mame/drivers/lsasquad.cpp",
	3502	MAME_DIR .. "src/mame/includes/lsasquad.h",
2786	3503	MAME_DIR .. "src/mame/machine/lsasquad.cpp",
2787	3504	MAME_DIR .. "src/mame/video/lsasquad.cpp",
2788	3505	MAME_DIR .. "src/mame/drivers/marinedt.cpp",
2789	3506	MAME_DIR .. "src/mame/drivers/mexico86.cpp",
	3507	MAME_DIR .. "src/mame/includes/mexico86.h",
2790	3508	MAME_DIR .. "src/mame/machine/mexico86.cpp",
2791	3509	MAME_DIR .. "src/mame/video/mexico86.cpp",
2792	3510	MAME_DIR .. "src/mame/drivers/minivadr.cpp",
2793	3511	MAME_DIR .. "src/mame/drivers/missb2.cpp",
2794	3512	MAME_DIR .. "src/mame/drivers/mlanding.cpp",
2795	3513	MAME_DIR .. "src/mame/drivers/msisaac.cpp",
	3514	MAME_DIR .. "src/mame/includes/msisaac.h",
2796	3515	MAME_DIR .. "src/mame/video/msisaac.cpp",
2797	3516	MAME_DIR .. "src/mame/drivers/ninjaw.cpp",
	3517	MAME_DIR .. "src/mame/includes/ninjaw.h",
2798	3518	MAME_DIR .. "src/mame/video/ninjaw.cpp",
2799	3519	MAME_DIR .. "src/mame/drivers/nycaptor.cpp",
	3520	MAME_DIR .. "src/mame/includes/nycaptor.h",
2800	3521	MAME_DIR .. "src/mame/machine/nycaptor.cpp",
2801	3522	MAME_DIR .. "src/mame/video/nycaptor.cpp",
2802	3523	MAME_DIR .. "src/mame/drivers/opwolf.cpp",
	3524	MAME_DIR .. "src/mame/includes/opwolf.h",
2803	3525	MAME_DIR .. "src/mame/machine/opwolf.cpp",
2804	3526	MAME_DIR .. "src/mame/video/opwolf.cpp",
2805	3527	MAME_DIR .. "src/mame/drivers/othunder.cpp",
	3528	MAME_DIR .. "src/mame/includes/othunder.h",
2806	3529	MAME_DIR .. "src/mame/video/othunder.cpp",
2807	3530	MAME_DIR .. "src/mame/drivers/pitnrun.cpp",
	3531	MAME_DIR .. "src/mame/includes/pitnrun.h",
2808	3532	MAME_DIR .. "src/mame/machine/pitnrun.cpp",
2809	3533	MAME_DIR .. "src/mame/video/pitnrun.cpp",
2810	3534	MAME_DIR .. "src/mame/drivers/qix.cpp",
	3535	MAME_DIR .. "src/mame/includes/qix.h",
2811	3536	MAME_DIR .. "src/mame/machine/qix.cpp",
2812	3537	MAME_DIR .. "src/mame/audio/qix.cpp",
2813	3538	MAME_DIR .. "src/mame/video/qix.cpp",
2814	3539	MAME_DIR .. "src/mame/drivers/rbisland.cpp",
	3540	MAME_DIR .. "src/mame/includes/rbisland.h",
2815	3541	MAME_DIR .. "src/mame/machine/rbisland.cpp",
2816	3542	MAME_DIR .. "src/mame/video/rbisland.cpp",
2817	3543	MAME_DIR .. "src/mame/drivers/rastan.cpp",
	3544	MAME_DIR .. "src/mame/includes/rastan.h",
2818	3545	MAME_DIR .. "src/mame/video/rastan.cpp",
2819	3546	MAME_DIR .. "src/mame/drivers/retofinv.cpp",
	3547	MAME_DIR .. "src/mame/includes/retofinv.h",
2820	3548	MAME_DIR .. "src/mame/machine/retofinv.cpp",
2821	3549	MAME_DIR .. "src/mame/video/retofinv.cpp",
2822	3550	MAME_DIR .. "src/mame/drivers/rollrace.cpp",
	3551	MAME_DIR .. "src/mame/includes/rollrace.h",
2823	3552	MAME_DIR .. "src/mame/video/rollrace.cpp",
2824	3553	MAME_DIR .. "src/mame/drivers/sbowling.cpp",
2825	3554	MAME_DIR .. "src/mame/drivers/slapshot.cpp",
	3555	MAME_DIR .. "src/mame/includes/slapshot.h",
2826	3556	MAME_DIR .. "src/mame/video/slapshot.cpp",
2827	3557	MAME_DIR .. "src/mame/drivers/ssrj.cpp",
	3558	MAME_DIR .. "src/mame/includes/ssrj.h",
2828	3559	MAME_DIR .. "src/mame/video/ssrj.cpp",
2829	3560	MAME_DIR .. "src/mame/drivers/superchs.cpp",
	3561	MAME_DIR .. "src/mame/includes/superchs.h",
2830	3562	MAME_DIR .. "src/mame/video/superchs.cpp",
2831	3563	MAME_DIR .. "src/mame/drivers/superqix.cpp",
	3564	MAME_DIR .. "src/mame/includes/superqix.h",
2832	3565	MAME_DIR .. "src/mame/video/superqix.cpp",
2833	3566	MAME_DIR .. "src/mame/drivers/taito_b.cpp",
	3567	MAME_DIR .. "src/mame/includes/taito_b.h",
2834	3568	MAME_DIR .. "src/mame/video/taito_b.cpp",
	3569	MAME_DIR .. "src/mame/includes/taitoipt.h",
2835	3570	MAME_DIR .. "src/mame/drivers/taito_f2.cpp",
	3571	MAME_DIR .. "src/mame/includes/taito_f2.h",
2836	3572	MAME_DIR .. "src/mame/video/taito_f2.cpp",
2837	3573	MAME_DIR .. "src/mame/drivers/taito_f3.cpp",
	3574	MAME_DIR .. "src/mame/includes/taito_f3.h",
2838	3575	MAME_DIR .. "src/mame/video/taito_f3.cpp",
2839	3576	MAME_DIR .. "src/mame/audio/taito_en.cpp",
	3577	MAME_DIR .. "src/mame/audio/taito_en.h",
2840	3578	MAME_DIR .. "src/mame/drivers/taito_h.cpp",
	3579	MAME_DIR .. "src/mame/includes/taito_h.h",
2841	3580	MAME_DIR .. "src/mame/video/taito_h.cpp",
2842	3581	MAME_DIR .. "src/mame/drivers/taito_l.cpp",
	3582	MAME_DIR .. "src/mame/includes/taito_l.h",
2843	3583	MAME_DIR .. "src/mame/video/taito_l.cpp",
2844	3584	MAME_DIR .. "src/mame/drivers/taito_x.cpp",
	3585	MAME_DIR .. "src/mame/includes/taito_x.h",
2845	3586	MAME_DIR .. "src/mame/machine/cchip.cpp",
2846	3587	MAME_DIR .. "src/mame/drivers/taito_z.cpp",
	3588	MAME_DIR .. "src/mame/includes/taito_z.h",
2847	3589	MAME_DIR .. "src/mame/video/taito_z.cpp",
2848	3590	MAME_DIR .. "src/mame/drivers/taito_o.cpp",
	3591	MAME_DIR .. "src/mame/includes/taito_o.h",
2849	3592	MAME_DIR .. "src/mame/video/taito_o.cpp",
2850	3593	MAME_DIR .. "src/mame/drivers/taitoair.cpp",
	3594	MAME_DIR .. "src/mame/includes/taitoair.h",
2851	3595	MAME_DIR .. "src/mame/video/taitoair.cpp",
2852	3596	MAME_DIR .. "src/mame/drivers/taitogn.cpp",
2853	3597	MAME_DIR .. "src/mame/drivers/taitojc.cpp",
	3598	MAME_DIR .. "src/mame/includes/taitojc.h",
2854	3599	MAME_DIR .. "src/mame/video/taitojc.cpp",
2855	3600	MAME_DIR .. "src/mame/drivers/taitopjc.cpp",
2856	3601	MAME_DIR .. "src/mame/drivers/taitosj.cpp",
	3602	MAME_DIR .. "src/mame/includes/taitosj.h",
2857	3603	MAME_DIR .. "src/mame/machine/taitosj.cpp",
2858	3604	MAME_DIR .. "src/mame/video/taitosj.cpp",
2859	3605	MAME_DIR .. "src/mame/drivers/taitottl.cpp",
r250251	r250252
2861	3607	MAME_DIR .. "src/mame/drivers/taitotx.cpp",
2862	3608	MAME_DIR .. "src/mame/drivers/taitowlf.cpp",
2863	3609	MAME_DIR .. "src/mame/drivers/tnzs.cpp",
	3610	MAME_DIR .. "src/mame/includes/tnzs.h",
2864	3611	MAME_DIR .. "src/mame/machine/tnzs.cpp",
2865	3612	MAME_DIR .. "src/mame/video/tnzs.cpp",
2866	3613	MAME_DIR .. "src/mame/drivers/topspeed.cpp",
	3614	MAME_DIR .. "src/mame/includes/topspeed.h",
2867	3615	MAME_DIR .. "src/mame/video/topspeed.cpp",
2868	3616	MAME_DIR .. "src/mame/drivers/tsamurai.cpp",
	3617	MAME_DIR .. "src/mame/includes/tsamurai.h",
2869	3618	MAME_DIR .. "src/mame/video/tsamurai.cpp",
2870	3619	MAME_DIR .. "src/mame/drivers/undrfire.cpp",
	3620	MAME_DIR .. "src/mame/includes/undrfire.h",
2871	3621	MAME_DIR .. "src/mame/video/undrfire.cpp",
2872	3622	MAME_DIR .. "src/mame/drivers/volfied.cpp",
	3623	MAME_DIR .. "src/mame/includes/volfied.h",
2873	3624	MAME_DIR .. "src/mame/machine/volfied.cpp",
2874	3625	MAME_DIR .. "src/mame/video/volfied.cpp",
2875	3626	MAME_DIR .. "src/mame/drivers/warriorb.cpp",
	3627	MAME_DIR .. "src/mame/includes/warriorb.h",
2876	3628	MAME_DIR .. "src/mame/video/warriorb.cpp",
2877	3629	MAME_DIR .. "src/mame/drivers/wgp.cpp",
	3630	MAME_DIR .. "src/mame/includes/wgp.h",
2878	3631	MAME_DIR .. "src/mame/video/wgp.cpp",
2879	3632	MAME_DIR .. "src/mame/drivers/wyvernf0.cpp",
2880	3633	MAME_DIR .. "src/mame/audio/taitosnd.cpp",
	3634	MAME_DIR .. "src/mame/audio/taitosnd.h",
2881	3635	MAME_DIR .. "src/mame/audio/taito_zm.cpp",
	3636	MAME_DIR .. "src/mame/audio/taito_zm.h",
2882	3637	MAME_DIR .. "src/mame/audio/t5182.cpp",
	3638	MAME_DIR .. "src/mame/audio/t5182.h",
2883	3639	MAME_DIR .. "src/mame/machine/taitoio.cpp",
	3640	MAME_DIR .. "src/mame/machine/taitoio.h",
2884	3641	MAME_DIR .. "src/mame/video/taito_helper.cpp",
	3642	MAME_DIR .. "src/mame/video/taito_helper.h",
2885	3643	MAME_DIR .. "src/mame/video/pc080sn.cpp",
	3644	MAME_DIR .. "src/mame/video/pc080sn.h",
2886	3645	MAME_DIR .. "src/mame/video/pc090oj.cpp",
	3646	MAME_DIR .. "src/mame/video/pc090oj.h",
2887	3647	MAME_DIR .. "src/mame/video/tc0080vco.cpp",
	3648	MAME_DIR .. "src/mame/video/tc0080vco.h",
2888	3649	MAME_DIR .. "src/mame/video/tc0100scn.cpp",
	3650	MAME_DIR .. "src/mame/video/tc0100scn.h",
2889	3651	MAME_DIR .. "src/mame/video/tc0150rod.cpp",
	3652	MAME_DIR .. "src/mame/video/tc0150rod.h",
2890	3653	MAME_DIR .. "src/mame/video/tc0280grd.cpp",
	3654	MAME_DIR .. "src/mame/video/tc0280grd.h",
2891	3655	MAME_DIR .. "src/mame/video/tc0360pri.cpp",
	3656	MAME_DIR .. "src/mame/video/tc0360pri.h",
2892	3657	MAME_DIR .. "src/mame/video/tc0480scp.cpp",
	3658	MAME_DIR .. "src/mame/video/tc0480scp.h",
2893	3659	MAME_DIR .. "src/mame/video/tc0110pcr.cpp",
	3660	MAME_DIR .. "src/mame/video/tc0110pcr.h",
2894	3661	MAME_DIR .. "src/mame/video/tc0180vcu.cpp",
	3662	MAME_DIR .. "src/mame/video/tc0180vcu.h",
2895	3663	}
2896	3664
2897	3665	createMAMEProjects(_target, _subtarget, "tatsumi")
2898	3666	files {
2899	3667	MAME_DIR .. "src/mame/drivers/kingdrby.cpp",
2900	3668	MAME_DIR .. "src/mame/drivers/lockon.cpp",
	3669	MAME_DIR .. "src/mame/includes/lockon.h",
2901	3670	MAME_DIR .. "src/mame/video/lockon.cpp",
2902	3671	MAME_DIR .. "src/mame/drivers/tatsumi.cpp",
	3672	MAME_DIR .. "src/mame/includes/tatsumi.h",
2903	3673	MAME_DIR .. "src/mame/machine/tatsumi.cpp",
2904	3674	MAME_DIR .. "src/mame/video/tatsumi.cpp",
2905	3675	MAME_DIR .. "src/mame/drivers/tx1.cpp",
	3676	MAME_DIR .. "src/mame/includes/tx1.h",
2906	3677	MAME_DIR .. "src/mame/machine/tx1.cpp",
2907	3678	MAME_DIR .. "src/mame/audio/tx1.cpp",
2908	3679	MAME_DIR .. "src/mame/video/tx1.cpp",
r250251	r250252
2911	3682	createMAMEProjects(_target, _subtarget, "tch")
2912	3683	files {
2913	3684	MAME_DIR .. "src/mame/drivers/kickgoal.cpp",
	3685	MAME_DIR .. "src/mame/includes/kickgoal.h",
2914	3686	MAME_DIR .. "src/mame/video/kickgoal.cpp",
2915	3687	MAME_DIR .. "src/mame/drivers/littlerb.cpp",
2916	3688	MAME_DIR .. "src/mame/drivers/rltennis.cpp",
	3689	MAME_DIR .. "src/mame/includes/rltennis.h",
2917	3690	MAME_DIR .. "src/mame/video/rltennis.cpp",
2918	3691	MAME_DIR .. "src/mame/drivers/speedspn.cpp",
	3692	MAME_DIR .. "src/mame/includes/speedspn.h",
2919	3693	MAME_DIR .. "src/mame/video/speedspn.cpp",
2920	3694	MAME_DIR .. "src/mame/drivers/wheelfir.cpp",
2921	3695	}
r250251	r250252
2923	3697	createMAMEProjects(_target, _subtarget, "tecfri")
2924	3698	files {
2925	3699	MAME_DIR .. "src/mame/drivers/ambush.cpp",
	3700	MAME_DIR .. "src/mame/includes/ambush.h",
2926	3701	MAME_DIR .. "src/mame/video/ambush.cpp",
2927	3702	MAME_DIR .. "src/mame/drivers/holeland.cpp",
	3703	MAME_DIR .. "src/mame/includes/holeland.h",
2928	3704	MAME_DIR .. "src/mame/video/holeland.cpp",
2929	3705	MAME_DIR .. "src/mame/drivers/sauro.cpp",
	3706	MAME_DIR .. "src/mame/includes/sauro.h",
2930	3707	MAME_DIR .. "src/mame/video/sauro.cpp",
2931	3708	MAME_DIR .. "src/mame/drivers/speedbal.cpp",
	3709	MAME_DIR .. "src/mame/includes/speedbal.h",
2932	3710	MAME_DIR .. "src/mame/video/speedbal.cpp",
2933	3711	}
2934	3712
2935	3713	createMAMEProjects(_target, _subtarget, "technos")
2936	3714	files {
2937	3715	MAME_DIR .. "src/mame/drivers/battlane.cpp",
	3716	MAME_DIR .. "src/mame/includes/battlane.h",
2938	3717	MAME_DIR .. "src/mame/video/battlane.cpp",
2939	3718	MAME_DIR .. "src/mame/drivers/blockout.cpp",
	3719	MAME_DIR .. "src/mame/includes/blockout.h",
2940	3720	MAME_DIR .. "src/mame/video/blockout.cpp",
2941	3721	MAME_DIR .. "src/mame/drivers/bogeyman.cpp",
	3722	MAME_DIR .. "src/mame/includes/bogeyman.h",
2942	3723	MAME_DIR .. "src/mame/video/bogeyman.cpp",
2943	3724	MAME_DIR .. "src/mame/drivers/chinagat.cpp",
2944	3725	MAME_DIR .. "src/mame/drivers/ddragon.cpp",
	3726	MAME_DIR .. "src/mame/includes/ddragon.h",
2945	3727	MAME_DIR .. "src/mame/video/ddragon.cpp",
2946	3728	MAME_DIR .. "src/mame/drivers/ddragon3.cpp",
	3729	MAME_DIR .. "src/mame/includes/ddragon3.h",
2947	3730	MAME_DIR .. "src/mame/video/ddragon3.cpp",
2948	3731	MAME_DIR .. "src/mame/drivers/dogfgt.cpp",
	3732	MAME_DIR .. "src/mame/includes/dogfgt.h",
2949	3733	MAME_DIR .. "src/mame/video/dogfgt.cpp",
2950	3734	MAME_DIR .. "src/mame/drivers/matmania.cpp",
	3735	MAME_DIR .. "src/mame/includes/matmania.h",
2951	3736	MAME_DIR .. "src/mame/video/matmania.cpp",
2952	3737	MAME_DIR .. "src/mame/drivers/mystston.cpp",
	3738	MAME_DIR .. "src/mame/includes/mystston.h",
2953	3739	MAME_DIR .. "src/mame/video/mystston.cpp",
2954	3740	MAME_DIR .. "src/mame/drivers/renegade.cpp",
	3741	MAME_DIR .. "src/mame/includes/renegade.h",
2955	3742	MAME_DIR .. "src/mame/video/renegade.cpp",
2956	3743	MAME_DIR .. "src/mame/drivers/scregg.cpp",
2957	3744	MAME_DIR .. "src/mame/drivers/shadfrce.cpp",
	3745	MAME_DIR .. "src/mame/includes/shadfrce.h",
2958	3746	MAME_DIR .. "src/mame/video/shadfrce.cpp",
2959	3747	MAME_DIR .. "src/mame/drivers/spdodgeb.cpp",
	3748	MAME_DIR .. "src/mame/includes/spdodgeb.h",
2960	3749	MAME_DIR .. "src/mame/video/spdodgeb.cpp",
2961	3750	MAME_DIR .. "src/mame/drivers/ssozumo.cpp",
	3751	MAME_DIR .. "src/mame/includes/ssozumo.h",
2962	3752	MAME_DIR .. "src/mame/video/ssozumo.cpp",
2963	3753	MAME_DIR .. "src/mame/drivers/tagteam.cpp",
	3754	MAME_DIR .. "src/mame/includes/tagteam.h",
2964	3755	MAME_DIR .. "src/mame/video/tagteam.cpp",
2965	3756	MAME_DIR .. "src/mame/drivers/vball.cpp",
	3757	MAME_DIR .. "src/mame/includes/vball.h",
2966	3758	MAME_DIR .. "src/mame/video/vball.cpp",
2967	3759	MAME_DIR .. "src/mame/drivers/wwfsstar.cpp",
	3760	MAME_DIR .. "src/mame/includes/wwfsstar.h",
2968	3761	MAME_DIR .. "src/mame/video/wwfsstar.cpp",
2969	3762	MAME_DIR .. "src/mame/drivers/xain.cpp",
	3763	MAME_DIR .. "src/mame/includes/xain.h",
2970	3764	MAME_DIR .. "src/mame/video/xain.cpp",
2971	3765	}
2972	3766
2973	3767	createMAMEProjects(_target, _subtarget, "tehkan")
2974	3768	files {
2975	3769	MAME_DIR .. "src/mame/video/tecmo_spr.cpp",
	3770	MAME_DIR .. "src/mame/video/tecmo_spr.h",
2976	3771	MAME_DIR .. "src/mame/video/tecmo_mix.cpp",
	3772	MAME_DIR .. "src/mame/video/tecmo_mix.h",
2977	3773	MAME_DIR .. "src/mame/drivers/bombjack.cpp",
	3774	MAME_DIR .. "src/mame/includes/bombjack.h",
2978	3775	MAME_DIR .. "src/mame/video/bombjack.cpp",
2979	3776	MAME_DIR .. "src/mame/drivers/gaiden.cpp",
	3777	MAME_DIR .. "src/mame/includes/gaiden.h",
2980	3778	MAME_DIR .. "src/mame/video/gaiden.cpp",
2981	3779	MAME_DIR .. "src/mame/drivers/lvcards.cpp",
	3780	MAME_DIR .. "src/mame/includes/lvcards.h",
2982	3781	MAME_DIR .. "src/mame/video/lvcards.cpp",
2983	3782	MAME_DIR .. "src/mame/drivers/pbaction.cpp",
	3783	MAME_DIR .. "src/mame/includes/pbaction.h",
2984	3784	MAME_DIR .. "src/mame/video/pbaction.cpp",
2985	3785	MAME_DIR .. "src/mame/drivers/senjyo.cpp",
	3786	MAME_DIR .. "src/mame/includes/senjyo.h",
2986	3787	MAME_DIR .. "src/mame/audio/senjyo.cpp",
2987	3788	MAME_DIR .. "src/mame/video/senjyo.cpp",
2988	3789	MAME_DIR .. "src/mame/drivers/solomon.cpp",
	3790	MAME_DIR .. "src/mame/includes/solomon.h",
2989	3791	MAME_DIR .. "src/mame/video/solomon.cpp",
2990	3792	MAME_DIR .. "src/mame/drivers/spbactn.cpp",
	3793	MAME_DIR .. "src/mame/includes/spbactn.h",
2991	3794	MAME_DIR .. "src/mame/video/spbactn.cpp",
2992	3795	MAME_DIR .. "src/mame/drivers/tbowl.cpp",
	3796	MAME_DIR .. "src/mame/includes/tbowl.h",
2993	3797	MAME_DIR .. "src/mame/video/tbowl.cpp",
2994	3798	MAME_DIR .. "src/mame/drivers/tecmo.cpp",
	3799	MAME_DIR .. "src/mame/includes/tecmo.h",
2995	3800	MAME_DIR .. "src/mame/video/tecmo.cpp",
2996	3801	MAME_DIR .. "src/mame/drivers/tecmo16.cpp",
	3802	MAME_DIR .. "src/mame/includes/tecmo16.h",
2997	3803	MAME_DIR .. "src/mame/video/tecmo16.cpp",
2998	3804	MAME_DIR .. "src/mame/drivers/tecmosys.cpp",
	3805	MAME_DIR .. "src/mame/includes/tecmosys.h",
2999	3806	MAME_DIR .. "src/mame/machine/tecmosys.cpp",
3000	3807	MAME_DIR .. "src/mame/video/tecmosys.cpp",
3001	3808	MAME_DIR .. "src/mame/drivers/tehkanwc.cpp",
	3809	MAME_DIR .. "src/mame/includes/tehkanwc.h",
3002	3810	MAME_DIR .. "src/mame/video/tehkanwc.cpp",
3003	3811	MAME_DIR .. "src/mame/drivers/wc90.cpp",
	3812	MAME_DIR .. "src/mame/includes/wc90.h",
3004	3813	MAME_DIR .. "src/mame/video/wc90.cpp",
3005	3814	MAME_DIR .. "src/mame/drivers/wc90b.cpp",
	3815	MAME_DIR .. "src/mame/includes/wc90b.h",
3006	3816	MAME_DIR .. "src/mame/video/wc90b.cpp",
3007	3817	}
3008	3818
3009	3819	createMAMEProjects(_target, _subtarget, "thepit")
3010	3820	files {
3011	3821	MAME_DIR .. "src/mame/drivers/thepit.cpp",
	3822	MAME_DIR .. "src/mame/includes/thepit.h",
3012	3823	MAME_DIR .. "src/mame/video/thepit.cpp",
3013	3824	MAME_DIR .. "src/mame/drivers/timelimt.cpp",
	3825	MAME_DIR .. "src/mame/includes/timelimt.h",
3014	3826	MAME_DIR .. "src/mame/video/timelimt.cpp",
3015	3827	}
3016	3828
r250251	r250252
3018	3830	files {
3019	3831	MAME_DIR .. "src/mame/drivers/mjsister.cpp",
3020	3832	MAME_DIR .. "src/mame/drivers/slapfght.cpp",
	3833	MAME_DIR .. "src/mame/includes/slapfght.h",
3021	3834	MAME_DIR .. "src/mame/machine/slapfght.cpp",
3022	3835	MAME_DIR .. "src/mame/video/slapfght.cpp",
3023	3836	MAME_DIR .. "src/mame/drivers/snowbros.cpp",
	3837	MAME_DIR .. "src/mame/includes/snowbros.h",
3024	3838	MAME_DIR .. "src/mame/video/kan_pand.cpp",
	3839	MAME_DIR .. "src/mame/video/kan_pand.h",
3025	3840	MAME_DIR .. "src/mame/video/kan_panb.cpp",
3026	3841	MAME_DIR .. "src/mame/drivers/toaplan1.cpp",
	3842	MAME_DIR .. "src/mame/includes/toaplan1.h",
3027	3843	MAME_DIR .. "src/mame/machine/toaplan1.cpp",
3028	3844	MAME_DIR .. "src/mame/video/toaplan1.cpp",
	3845	MAME_DIR .. "src/mame/includes/toaplipt.h",
3029	3846	MAME_DIR .. "src/mame/drivers/toaplan2.cpp",
	3847	MAME_DIR .. "src/mame/includes/toaplan2.h",
3030	3848	MAME_DIR .. "src/mame/video/toaplan2.cpp",
3031	3849	MAME_DIR .. "src/mame/video/gp9001.cpp",
	3850	MAME_DIR .. "src/mame/video/gp9001.h",
3032	3851	MAME_DIR .. "src/mame/drivers/twincobr.cpp",
	3852	MAME_DIR .. "src/mame/includes/twincobr.h",
3033	3853	MAME_DIR .. "src/mame/machine/twincobr.cpp",
3034	3854	MAME_DIR .. "src/mame/video/twincobr.cpp",
3035	3855	MAME_DIR .. "src/mame/drivers/wardner.cpp",
3036	3856	MAME_DIR .. "src/mame/video/toaplan_scu.cpp",
	3857	MAME_DIR .. "src/mame/video/toaplan_scu.h",
3037	3858	}
3038	3859
3039	3860	createMAMEProjects(_target, _subtarget, "tong")
3040	3861	files {
3041	3862	MAME_DIR .. "src/mame/drivers/beezer.cpp",
	3863	MAME_DIR .. "src/mame/includes/beezer.h",
3042	3864	MAME_DIR .. "src/mame/machine/beezer.cpp",
3043	3865	MAME_DIR .. "src/mame/video/beezer.cpp",
3044	3866	MAME_DIR .. "src/mame/audio/beezer.cpp",
r250251	r250252
3047	3869	createMAMEProjects(_target, _subtarget, "unico")
3048	3870	files {
3049	3871	MAME_DIR .. "src/mame/drivers/drgnmst.cpp",
	3872	MAME_DIR .. "src/mame/includes/drgnmst.h",
3050	3873	MAME_DIR .. "src/mame/video/drgnmst.cpp",
3051	3874	MAME_DIR .. "src/mame/drivers/silkroad.cpp",
	3875	MAME_DIR .. "src/mame/includes/silkroad.h",
3052	3876	MAME_DIR .. "src/mame/video/silkroad.cpp",
3053	3877	MAME_DIR .. "src/mame/drivers/unico.cpp",
	3878	MAME_DIR .. "src/mame/includes/unico.h",
3054	3879	MAME_DIR .. "src/mame/video/unico.cpp",
3055	3880	}
3056	3881
3057	3882	createMAMEProjects(_target, _subtarget, "univers")
3058	3883	files {
3059	3884	MAME_DIR .. "src/mame/drivers/cheekyms.cpp",
	3885	MAME_DIR .. "src/mame/includes/cheekyms.h",
3060	3886	MAME_DIR .. "src/mame/video/cheekyms.cpp",
3061	3887	MAME_DIR .. "src/mame/drivers/cosmic.cpp",
	3888	MAME_DIR .. "src/mame/includes/cosmic.h",
3062	3889	MAME_DIR .. "src/mame/video/cosmic.cpp",
3063	3890	MAME_DIR .. "src/mame/drivers/docastle.cpp",
	3891	MAME_DIR .. "src/mame/includes/docastle.h",
3064	3892	MAME_DIR .. "src/mame/machine/docastle.cpp",
3065	3893	MAME_DIR .. "src/mame/video/docastle.cpp",
3066	3894	MAME_DIR .. "src/mame/drivers/ladybug.cpp",
	3895	MAME_DIR .. "src/mame/includes/ladybug.h",
3067	3896	MAME_DIR .. "src/mame/video/ladybug.cpp",
3068	3897	MAME_DIR .. "src/mame/drivers/mrdo.cpp",
	3898	MAME_DIR .. "src/mame/includes/mrdo.h",
3069	3899	MAME_DIR .. "src/mame/video/mrdo.cpp",
3070	3900	MAME_DIR .. "src/mame/drivers/redclash.cpp",
3071	3901	MAME_DIR .. "src/mame/video/redclash.cpp",
r250251	r250252
3075	3905	createMAMEProjects(_target, _subtarget, "upl")
3076	3906	files {
3077	3907	MAME_DIR .. "src/mame/drivers/mouser.cpp",
	3908	MAME_DIR .. "src/mame/includes/mouser.h",
3078	3909	MAME_DIR .. "src/mame/video/mouser.cpp",
3079	3910	MAME_DIR .. "src/mame/drivers/ninjakd2.cpp",
	3911	MAME_DIR .. "src/mame/includes/ninjakd2.h",
3080	3912	MAME_DIR .. "src/mame/video/ninjakd2.cpp",
3081	3913	MAME_DIR .. "src/mame/drivers/nova2001.cpp",
	3914	MAME_DIR .. "src/mame/includes/nova2001.h",
3082	3915	MAME_DIR .. "src/mame/video/nova2001.cpp",
3083	3916	MAME_DIR .. "src/mame/drivers/xxmissio.cpp",
	3917	MAME_DIR .. "src/mame/includes/xxmissio.h",
3084	3918	MAME_DIR .. "src/mame/video/xxmissio.cpp",
3085	3919	}
3086	3920
3087	3921	createMAMEProjects(_target, _subtarget, "valadon")
3088	3922	files {
3089	3923	MAME_DIR .. "src/mame/drivers/bagman.cpp",
	3924	MAME_DIR .. "src/mame/includes/bagman.h",
3090	3925	MAME_DIR .. "src/mame/machine/bagman.cpp",
3091	3926	MAME_DIR .. "src/mame/video/bagman.cpp",
3092	3927	MAME_DIR .. "src/mame/drivers/tankbust.cpp",
	3928	MAME_DIR .. "src/mame/includes/tankbust.h",
3093	3929	MAME_DIR .. "src/mame/video/tankbust.cpp",
3094	3930	}
3095	3931
r250251	r250252
3103	3939	files {
3104	3940	MAME_DIR .. "src/mame/drivers/looping.cpp",
3105	3941	MAME_DIR .. "src/mame/drivers/spcforce.cpp",
	3942	MAME_DIR .. "src/mame/includes/spcforce.h",
3106	3943	MAME_DIR .. "src/mame/video/spcforce.cpp",
3107	3944	MAME_DIR .. "src/mame/drivers/suprridr.cpp",
	3945	MAME_DIR .. "src/mame/includes/suprridr.h",
3108	3946	MAME_DIR .. "src/mame/video/suprridr.cpp",
3109	3947	}
3110	3948
3111	3949	createMAMEProjects(_target, _subtarget, "vsystem")
3112	3950	files {
3113	3951	MAME_DIR .. "src/mame/video/vsystem_spr.cpp",
	3952	MAME_DIR .. "src/mame/video/vsystem_spr.h",
3114	3953	MAME_DIR .. "src/mame/video/vsystem_spr2.cpp",
	3954	MAME_DIR .. "src/mame/video/vsystem_spr2.h",
3115	3955	MAME_DIR .. "src/mame/drivers/aerofgt.cpp",
	3956	MAME_DIR .. "src/mame/includes/aerofgt.h",
3116	3957	MAME_DIR .. "src/mame/video/aerofgt.cpp",
3117	3958	MAME_DIR .. "src/mame/drivers/crshrace.cpp",
	3959	MAME_DIR .. "src/mame/includes/crshrace.h",
3118	3960	MAME_DIR .. "src/mame/video/crshrace.cpp",
3119	3961	MAME_DIR .. "src/mame/drivers/f1gp.cpp",
	3962	MAME_DIR .. "src/mame/includes/f1gp.h",
3120	3963	MAME_DIR .. "src/mame/video/f1gp.cpp",
3121	3964	MAME_DIR .. "src/mame/drivers/fromance.cpp",
	3965	MAME_DIR .. "src/mame/includes/fromance.h",
3122	3966	MAME_DIR .. "src/mame/video/fromance.cpp",
3123	3967	MAME_DIR .. "src/mame/drivers/fromanc2.cpp",
	3968	MAME_DIR .. "src/mame/includes/fromanc2.h",
3124	3969	MAME_DIR .. "src/mame/video/fromanc2.cpp",
3125	3970	MAME_DIR .. "src/mame/drivers/gstriker.cpp",
	3971	MAME_DIR .. "src/mame/includes/gstriker.h",
3126	3972	MAME_DIR .. "src/mame/video/gstriker.cpp",
3127	3973	MAME_DIR .. "src/mame/video/mb60553.cpp",
	3974	MAME_DIR .. "src/mame/video/mb60553.h",
3128	3975	MAME_DIR .. "src/mame/video/vs920a.cpp",
	3976	MAME_DIR .. "src/mame/video/vs920a.h",
3129	3977	MAME_DIR .. "src/mame/drivers/inufuku.cpp",
	3978	MAME_DIR .. "src/mame/includes/inufuku.h",
3130	3979	MAME_DIR .. "src/mame/video/inufuku.cpp",
3131	3980	MAME_DIR .. "src/mame/drivers/ojankohs.cpp",
	3981	MAME_DIR .. "src/mame/includes/ojankohs.h",
3132	3982	MAME_DIR .. "src/mame/video/ojankohs.cpp",
3133	3983	MAME_DIR .. "src/mame/drivers/pipedrm.cpp",
3134	3984	MAME_DIR .. "src/mame/drivers/rpunch.cpp",
	3985	MAME_DIR .. "src/mame/includes/rpunch.h",
3135	3986	MAME_DIR .. "src/mame/video/rpunch.cpp",
3136	3987	MAME_DIR .. "src/mame/drivers/suprslam.cpp",
	3988	MAME_DIR .. "src/mame/includes/suprslam.h",
3137	3989	MAME_DIR .. "src/mame/video/suprslam.cpp",
3138	3990	MAME_DIR .. "src/mame/drivers/tail2nos.cpp",
	3991	MAME_DIR .. "src/mame/includes/tail2nos.h",
3139	3992	MAME_DIR .. "src/mame/video/tail2nos.cpp",
3140	3993	MAME_DIR .. "src/mame/drivers/taotaido.cpp",
	3994	MAME_DIR .. "src/mame/includes/taotaido.h",
3141	3995	MAME_DIR .. "src/mame/video/taotaido.cpp",
3142	3996	MAME_DIR .. "src/mame/drivers/welltris.cpp",
	3997	MAME_DIR .. "src/mame/includes/welltris.h",
3143	3998	MAME_DIR .. "src/mame/video/welltris.cpp",
3144	3999	}
3145	4000
r250251	r250252
3147	4002	files {
3148	4003	MAME_DIR .. "src/mame/drivers/nmg5.cpp",
3149	4004	MAME_DIR .. "src/mame/drivers/paradise.cpp",
	4005	MAME_DIR .. "src/mame/includes/paradise.h",
3150	4006	MAME_DIR .. "src/mame/video/paradise.cpp",
3151	4007	MAME_DIR .. "src/mame/drivers/yunsung8.cpp",
	4008	MAME_DIR .. "src/mame/includes/yunsung8.h",
3152	4009	MAME_DIR .. "src/mame/video/yunsung8.cpp",
3153	4010	MAME_DIR .. "src/mame/drivers/yunsun16.cpp",
	4011	MAME_DIR .. "src/mame/includes/yunsun16.h",
3154	4012	MAME_DIR .. "src/mame/video/yunsun16.cpp",
3155	4013	}
3156	4014
3157	4015	createMAMEProjects(_target, _subtarget, "zaccaria")
3158	4016	files {
3159	4017	MAME_DIR .. "src/mame/drivers/laserbat.cpp",
	4018	MAME_DIR .. "src/mame/includes/laserbat.h",
3160	4019	MAME_DIR .. "src/mame/audio/laserbat.cpp",
3161	4020	MAME_DIR .. "src/mame/drivers/seabattl.cpp",
3162	4021	MAME_DIR .. "src/mame/drivers/zac2650.cpp",
	4022	MAME_DIR .. "src/mame/includes/zac2650.h",
3163	4023	MAME_DIR .. "src/mame/video/zac2650.cpp",
3164	4024	MAME_DIR .. "src/mame/drivers/zaccaria.cpp",
	4025	MAME_DIR .. "src/mame/includes/zaccaria.h",
3165	4026	MAME_DIR .. "src/mame/video/zaccaria.cpp",
3166	4027	}
3167	4028
r250251	r250252
3185	4046	MAME_DIR .. "src/mame/drivers/de_2.cpp",
3186	4047	MAME_DIR .. "src/mame/drivers/de_3.cpp",
3187	4048	MAME_DIR .. "src/mame/machine/decopincpu.cpp",
	4049	MAME_DIR .. "src/mame/machine/decopincpu.h",
3188	4050	MAME_DIR .. "src/mame/video/decodmd1.cpp",
	4051	MAME_DIR .. "src/mame/video/decodmd1.h",
3189	4052	MAME_DIR .. "src/mame/video/decodmd2.cpp",
	4053	MAME_DIR .. "src/mame/video/decodmd2.h",
3190	4054	MAME_DIR .. "src/mame/video/decodmd3.cpp",
	4055	MAME_DIR .. "src/mame/video/decodmd3.h",
3191	4056	MAME_DIR .. "src/mame/drivers/de_3b.cpp",
3192	4057	MAME_DIR .. "src/mame/drivers/flicker.cpp",
3193	4058	MAME_DIR .. "src/mame/drivers/g627.cpp",
3194	4059	MAME_DIR .. "src/mame/drivers/gp_1.cpp",
3195	4060	MAME_DIR .. "src/mame/machine/genpin.cpp",
	4061	MAME_DIR .. "src/mame/machine/genpin.h",
3196	4062	MAME_DIR .. "src/mame/drivers/gp_2.cpp",
3197	4063	MAME_DIR .. "src/mame/drivers/gts1.cpp",
3198	4064	MAME_DIR .. "src/mame/drivers/gts3.cpp",
r250251	r250252
3219	4085	MAME_DIR .. "src/mame/drivers/play_5.cpp",
3220	4086	MAME_DIR .. "src/mame/drivers/rowamet.cpp",
3221	4087	MAME_DIR .. "src/mame/drivers/s11.cpp",
	4088	MAME_DIR .. "src/mame/includes/s11.h",
3222	4089	MAME_DIR .. "src/mame/drivers/s11a.cpp",
3223	4090	MAME_DIR .. "src/mame/drivers/s11b.cpp",
3224	4091	MAME_DIR .. "src/mame/drivers/s11c.cpp",
3225	4092	MAME_DIR .. "src/mame/audio/s11c_bg.cpp",
	4093	MAME_DIR .. "src/mame/audio/s11c_bg.h",
3226	4094	MAME_DIR .. "src/mame/drivers/s3.cpp",
3227	4095	MAME_DIR .. "src/mame/drivers/s4.cpp",
3228	4096	MAME_DIR .. "src/mame/drivers/s6.cpp",
r250251	r250252
3251	4119	MAME_DIR .. "src/mame/drivers/wpc_flip2.cpp",
3252	4120	MAME_DIR .. "src/mame/drivers/wpc_s.cpp",
3253	4121	MAME_DIR .. "src/mame/machine/wpc.cpp",
	4122	MAME_DIR .. "src/mame/machine/wpc.h",
	4123	MAME_DIR .. "src/mame/includes/wpc_pin.h",
3254	4124	MAME_DIR .. "src/mame/audio/wpcsnd.cpp",
	4125	MAME_DIR .. "src/mame/audio/wpcsnd.h",
3255	4126	MAME_DIR .. "src/mame/video/wpc_dmd.cpp",
	4127	MAME_DIR .. "src/mame/video/wpc_dmd.h",
3256	4128	MAME_DIR .. "src/mame/machine/wpc_pic.cpp",
	4129	MAME_DIR .. "src/mame/machine/wpc_pic.h",
3257	4130	MAME_DIR .. "src/mame/machine/wpc_lamp.cpp",
	4131	MAME_DIR .. "src/mame/machine/wpc_lamp.h",
3258	4132	MAME_DIR .. "src/mame/machine/wpc_out.cpp",
	4133	MAME_DIR .. "src/mame/machine/wpc_out.h",
3259	4134	MAME_DIR .. "src/mame/machine/wpc_shift.cpp",
	4135	MAME_DIR .. "src/mame/machine/wpc_shift.h",
3260	4136	MAME_DIR .. "src/mame/drivers/zac_1.cpp",
3261	4137	MAME_DIR .. "src/mame/drivers/zac_2.cpp",
3262	4138	MAME_DIR .. "src/mame/drivers/zac_proto.cpp",
r250251	r250252
3270	4146	files {
3271	4147	MAME_DIR .. "src/mame/drivers/1945kiii.cpp",
3272	4148	MAME_DIR .. "src/mame/drivers/39in1.cpp",
	4149	MAME_DIR .. "src/mame/machine/pxa255.h",
3273	4150	MAME_DIR .. "src/mame/drivers/3do.cpp",
	4151	MAME_DIR .. "src/mame/includes/3do.h",
3274	4152	MAME_DIR .. "src/mame/machine/3do.cpp",
3275	4153	MAME_DIR .. "src/mame/drivers/3x3puzzl.cpp",
3276	4154	MAME_DIR .. "src/mame/drivers/4enraya.cpp",
	4155	MAME_DIR .. "src/mame/includes/4enraya.h",
3277	4156	MAME_DIR .. "src/mame/video/4enraya.cpp",
3278	4157	MAME_DIR .. "src/mame/drivers/4enlinea.cpp",
3279	4158	MAME_DIR .. "src/mame/drivers/5clown.cpp",
r250251	r250252
3285	4164	MAME_DIR .. "src/mame/drivers/alinvade.cpp",
3286	4165	MAME_DIR .. "src/mame/drivers/amaticmg.cpp",
3287	4166	MAME_DIR .. "src/mame/drivers/ampoker2.cpp",
	4167	MAME_DIR .. "src/mame/includes/ampoker2.h",
3288	4168	MAME_DIR .. "src/mame/video/ampoker2.cpp",
3289	4169	MAME_DIR .. "src/mame/drivers/amspdwy.cpp",
	4170	MAME_DIR .. "src/mame/includes/amspdwy.h",
3290	4171	MAME_DIR .. "src/mame/video/amspdwy.cpp",
3291	4172	MAME_DIR .. "src/mame/drivers/amusco.cpp",
3292	4173	MAME_DIR .. "src/mame/drivers/arachnid.cpp",
3293	4174	MAME_DIR .. "src/mame/drivers/artmagic.cpp",
	4175	MAME_DIR .. "src/mame/includes/artmagic.h",
3294	4176	MAME_DIR .. "src/mame/video/artmagic.cpp",
3295	4177	MAME_DIR .. "src/mame/drivers/astrafr.cpp",
3296	4178	MAME_DIR .. "src/mame/drivers/astrcorp.cpp",
r250251	r250252
3299	4181	MAME_DIR .. "src/mame/drivers/attckufo.cpp",
3300	4182	MAME_DIR .. "src/mame/drivers/avt.cpp",
3301	4183	MAME_DIR .. "src/mame/drivers/aztarac.cpp",
	4184	MAME_DIR .. "src/mame/includes/aztarac.h",
3302	4185	MAME_DIR .. "src/mame/audio/aztarac.cpp",
3303	4186	MAME_DIR .. "src/mame/video/aztarac.cpp",
3304	4187	MAME_DIR .. "src/mame/drivers/bailey.cpp",
r250251	r250252
3311	4194	MAME_DIR .. "src/mame/drivers/blitz68k.cpp",
3312	4195	MAME_DIR .. "src/mame/drivers/buster.cpp",
3313	4196	MAME_DIR .. "src/mame/drivers/calomega.cpp",
	4197	MAME_DIR .. "src/mame/includes/calomega.h",
3314	4198	MAME_DIR .. "src/mame/video/calomega.cpp",
3315	4199	MAME_DIR .. "src/mame/drivers/carrera.cpp",
3316	4200	MAME_DIR .. "src/mame/drivers/castle.cpp",
3317	4201	MAME_DIR .. "src/mame/drivers/cave.cpp",
	4202	MAME_DIR .. "src/mame/includes/cave.h",
3318	4203	MAME_DIR .. "src/mame/video/cave.cpp",
3319	4204	MAME_DIR .. "src/mame/drivers/cavepc.cpp",
3320	4205	MAME_DIR .. "src/mame/drivers/cv1k.cpp",
3321	4206	MAME_DIR .. "src/mame/drivers/cb2001.cpp",
3322	4207	MAME_DIR .. "src/mame/drivers/cdi.cpp",
	4208	MAME_DIR .. "src/mame/includes/cdi.h",
3323	4209	MAME_DIR .. "src/mame/video/mcd212.cpp",
	4210	MAME_DIR .. "src/mame/video/mcd212.h",
3324	4211	MAME_DIR .. "src/mame/machine/cdi070.cpp",
	4212	MAME_DIR .. "src/mame/machine/cdi070.h",
3325	4213	MAME_DIR .. "src/mame/machine/cdislave.cpp",
	4214	MAME_DIR .. "src/mame/machine/cdislave.h",
3326	4215	MAME_DIR .. "src/mame/machine/cdicdic.cpp",
	4216	MAME_DIR .. "src/mame/machine/cdicdic.h",
3327	4217	MAME_DIR .. "src/mame/drivers/cesclass.cpp",
3328	4218	MAME_DIR .. "src/mame/drivers/chance32.cpp",
3329	4219	MAME_DIR .. "src/mame/drivers/chexx.cpp",
3330	4220	MAME_DIR .. "src/mame/drivers/chicago.cpp",
3331	4221	MAME_DIR .. "src/mame/drivers/chsuper.cpp",
3332	4222	MAME_DIR .. "src/mame/drivers/cidelsa.cpp",
	4223	MAME_DIR .. "src/mame/includes/cidelsa.h",
3333	4224	MAME_DIR .. "src/mame/video/cidelsa.cpp",
3334	4225	MAME_DIR .. "src/mame/drivers/cocoloco.cpp",
3335	4226	MAME_DIR .. "src/mame/drivers/coinmstr.cpp",
r250251	r250252
3338	4229	MAME_DIR .. "src/mame/drivers/cupidon.cpp",
3339	4230	MAME_DIR .. "src/mame/drivers/bntyhunt.cpp",
3340	4231	MAME_DIR .. "src/mame/drivers/coolpool.cpp",
	4232	MAME_DIR .. "src/mame/includes/coolpool.h",
3341	4233	MAME_DIR .. "src/mame/drivers/megaphx.cpp",
3342	4234	MAME_DIR .. "src/mame/machine/inder_sb.cpp",
	4235	MAME_DIR .. "src/mame/machine/inder_sb.h",
3343	4236	MAME_DIR .. "src/mame/machine/inder_vid.cpp",
	4237	MAME_DIR .. "src/mame/machine/inder_vid.h",
3344	4238	MAME_DIR .. "src/mame/drivers/corona.cpp",
3345	4239	MAME_DIR .. "src/mame/drivers/crystal.cpp",
3346	4240	MAME_DIR .. "src/mame/video/vrender0.cpp",
	4241	MAME_DIR .. "src/mame/video/vrender0.h",
3347	4242	MAME_DIR .. "src/mame/drivers/cubeqst.cpp",
3348	4243	MAME_DIR .. "src/mame/drivers/cybertnk.cpp",
3349	4244	MAME_DIR .. "src/mame/drivers/dcheese.cpp",
	4245	MAME_DIR .. "src/mame/includes/dcheese.h",
3350	4246	MAME_DIR .. "src/mame/video/dcheese.cpp",
3351	4247	MAME_DIR .. "src/mame/drivers/dfruit.cpp",
3352	4248	MAME_DIR .. "src/mame/drivers/dgpix.cpp",
r250251	r250252
3355	4251	MAME_DIR .. "src/mame/drivers/dorachan.cpp",
3356	4252	MAME_DIR .. "src/mame/drivers/dreamwld.cpp",
3357	4253	MAME_DIR .. "src/mame/drivers/dribling.cpp",
	4254	MAME_DIR .. "src/mame/includes/dribling.h",
3358	4255	MAME_DIR .. "src/mame/video/dribling.cpp",
3359	4256	MAME_DIR .. "src/mame/drivers/drw80pkr.cpp",
3360	4257	MAME_DIR .. "src/mame/drivers/dwarfd.cpp",
r250251	r250252
3365	4262	MAME_DIR .. "src/mame/drivers/ecoinf3.cpp",
3366	4263	MAME_DIR .. "src/mame/drivers/electra.cpp",
3367	4264	MAME_DIR .. "src/mame/drivers/epos.cpp",
	4265	MAME_DIR .. "src/mame/includes/epos.h",
3368	4266	MAME_DIR .. "src/mame/video/epos.cpp",
3369	4267	MAME_DIR .. "src/mame/drivers/esd16.cpp",
	4268	MAME_DIR .. "src/mame/includes/esd16.h",
3370	4269	MAME_DIR .. "src/mame/video/esd16.cpp",
3371	4270	MAME_DIR .. "src/mame/drivers/esh.cpp",
3372	4271	MAME_DIR .. "src/mame/drivers/esripsys.cpp",
	4272	MAME_DIR .. "src/mame/includes/esripsys.h",
3373	4273	MAME_DIR .. "src/mame/video/esripsys.cpp",
3374	4274	MAME_DIR .. "src/mame/drivers/ettrivia.cpp",
3375	4275	MAME_DIR .. "src/mame/drivers/extrema.cpp",
3376	4276	MAME_DIR .. "src/mame/drivers/fireball.cpp",
3377	4277	MAME_DIR .. "src/mame/drivers/flipjack.cpp",
3378	4278	MAME_DIR .. "src/mame/drivers/flower.cpp",
	4279	MAME_DIR .. "src/mame/includes/flower.h",
3379	4280	MAME_DIR .. "src/mame/audio/flower.cpp",
3380	4281	MAME_DIR .. "src/mame/video/flower.cpp",
3381	4282	MAME_DIR .. "src/mame/drivers/fortecar.cpp",
3382	4283	MAME_DIR .. "src/mame/drivers/fresh.cpp",
3383	4284	MAME_DIR .. "src/mame/drivers/freekick.cpp",
	4285	MAME_DIR .. "src/mame/includes/freekick.h",
3384	4286	MAME_DIR .. "src/mame/video/freekick.cpp",
3385	4287	MAME_DIR .. "src/mame/drivers/fungames.cpp",
3386	4288	MAME_DIR .. "src/mame/drivers/funkball.cpp",
r250251	r250252
3398	4300	MAME_DIR .. "src/mame/drivers/goldnpkr.cpp",
3399	4301	MAME_DIR .. "src/mame/drivers/good.cpp",
3400	4302	MAME_DIR .. "src/mame/drivers/gotcha.cpp",
	4303	MAME_DIR .. "src/mame/includes/gotcha.h",
3401	4304	MAME_DIR .. "src/mame/video/gotcha.cpp",
3402	4305	MAME_DIR .. "src/mame/drivers/gstream.cpp",
3403	4306	MAME_DIR .. "src/mame/drivers/gumbo.cpp",
	4307	MAME_DIR .. "src/mame/includes/gumbo.h",
3404	4308	MAME_DIR .. "src/mame/video/gumbo.cpp",
3405	4309	MAME_DIR .. "src/mame/drivers/gunpey.cpp",
3406	4310	MAME_DIR .. "src/mame/drivers/hideseek.cpp",
r250251	r250252
3408	4312	MAME_DIR .. "src/mame/drivers/headonb.cpp",
3409	4313	MAME_DIR .. "src/mame/drivers/highvdeo.cpp",
3410	4314	MAME_DIR .. "src/mame/drivers/himesiki.cpp",
	4315	MAME_DIR .. "src/mame/includes/himesiki.h",
3411	4316	MAME_DIR .. "src/mame/video/himesiki.cpp",
3412	4317	MAME_DIR .. "src/mame/drivers/hitpoker.cpp",
3413	4318	MAME_DIR .. "src/mame/drivers/homedata.cpp",
	4319	MAME_DIR .. "src/mame/includes/homedata.h",
3414	4320	MAME_DIR .. "src/mame/video/homedata.cpp",
3415	4321	MAME_DIR .. "src/mame/drivers/hotblock.cpp",
3416	4322	MAME_DIR .. "src/mame/drivers/hotstuff.cpp",
r250251	r250252
3432	4338	MAME_DIR .. "src/mame/drivers/koikoi.cpp",
3433	4339	MAME_DIR .. "src/mame/drivers/kurukuru.cpp",
3434	4340	MAME_DIR .. "src/mame/drivers/kyugo.cpp",
	4341	MAME_DIR .. "src/mame/includes/kyugo.h",
3435	4342	MAME_DIR .. "src/mame/video/kyugo.cpp",
3436	4343	MAME_DIR .. "src/mame/drivers/ladyfrog.cpp",
	4344	MAME_DIR .. "src/mame/includes/ladyfrog.h",
3437	4345	MAME_DIR .. "src/mame/video/ladyfrog.cpp",
3438	4346	MAME_DIR .. "src/mame/drivers/laserbas.cpp",
3439	4347	MAME_DIR .. "src/mame/drivers/lethalj.cpp",
	4348	MAME_DIR .. "src/mame/includes/lethalj.h",
3440	4349	MAME_DIR .. "src/mame/video/lethalj.cpp",
3441	4350	MAME_DIR .. "src/mame/drivers/limenko.cpp",
3442	4351	MAME_DIR .. "src/mame/drivers/ltcasino.cpp",
3443	4352	MAME_DIR .. "src/mame/drivers/lucky74.cpp",
	4353	MAME_DIR .. "src/mame/includes/lucky74.h",
3444	4354	MAME_DIR .. "src/mame/video/lucky74.cpp",
3445	4355	MAME_DIR .. "src/mame/drivers/luckgrln.cpp",
3446	4356	MAME_DIR .. "src/mame/drivers/magic10.cpp",
r250251	r250252
3450	4360	MAME_DIR .. "src/mame/drivers/magtouch.cpp",
3451	4361	MAME_DIR .. "src/mame/drivers/majorpkr.cpp",
3452	4362	MAME_DIR .. "src/mame/drivers/malzak.cpp",
	4363	MAME_DIR .. "src/mame/includes/malzak.h",
3453	4364	MAME_DIR .. "src/mame/video/malzak.cpp",
3454	4365	MAME_DIR .. "src/mame/drivers/manohman.cpp",
3455	4366	MAME_DIR .. "src/mame/drivers/mcatadv.cpp",
	4367	MAME_DIR .. "src/mame/includes/mcatadv.h",
3456	4368	MAME_DIR .. "src/mame/video/mcatadv.cpp",
3457	4369	MAME_DIR .. "src/mame/drivers/mgavegas.cpp",
3458	4370	MAME_DIR .. "src/mame/drivers/meyc8080.cpp",
3459	4371	MAME_DIR .. "src/mame/drivers/meyc8088.cpp",
3460	4372	MAME_DIR .. "src/mame/drivers/micro3d.cpp",
	4373	MAME_DIR .. "src/mame/includes/micro3d.h",
3461	4374	MAME_DIR .. "src/mame/machine/micro3d.cpp",
3462	4375	MAME_DIR .. "src/mame/video/micro3d.cpp",
3463	4376	MAME_DIR .. "src/mame/audio/micro3d.cpp",
r250251	r250252
3466	4379	MAME_DIR .. "src/mame/drivers/mirax.cpp",
3467	4380	MAME_DIR .. "src/mame/drivers/mole.cpp",
3468	4381	MAME_DIR .. "src/mame/drivers/mosaic.cpp",
	4382	MAME_DIR .. "src/mame/includes/mosaic.h",
3469	4383	MAME_DIR .. "src/mame/video/mosaic.cpp",
3470	4384	MAME_DIR .. "src/mame/drivers/mpu12wbk.cpp",
3471	4385	MAME_DIR .. "src/mame/drivers/mrjong.cpp",
	4386	MAME_DIR .. "src/mame/includes/mrjong.h",
3472	4387	MAME_DIR .. "src/mame/video/mrjong.cpp",
3473	4388	MAME_DIR .. "src/mame/drivers/multfish.cpp",
	4389	MAME_DIR .. "src/mame/includes/multfish.h",
3474	4390	MAME_DIR .. "src/mame/drivers/multfish_boot.cpp",
3475	4391	MAME_DIR .. "src/mame/drivers/multfish_ref.cpp",
3476	4392	MAME_DIR .. "src/mame/drivers/murogem.cpp",
r250251	r250252
3478	4394	MAME_DIR .. "src/mame/drivers/neoprint.cpp",
3479	4395	MAME_DIR .. "src/mame/drivers/neptunp2.cpp",
3480	4396	MAME_DIR .. "src/mame/drivers/news.cpp",
	4397	MAME_DIR .. "src/mame/includes/news.h",
3481	4398	MAME_DIR .. "src/mame/video/news.cpp",
3482	4399	MAME_DIR .. "src/mame/drivers/nexus3d.cpp",
3483	4400	MAME_DIR .. "src/mame/drivers/norautp.cpp",
	4401	MAME_DIR .. "src/mame/includes/norautp.h",
3484	4402	MAME_DIR .. "src/mame/audio/norautp.cpp",
3485	4403	MAME_DIR .. "src/mame/drivers/nsmpoker.cpp",
3486	4404	MAME_DIR .. "src/mame/drivers/oneshot.cpp",
	4405	MAME_DIR .. "src/mame/includes/oneshot.h",
3487	4406	MAME_DIR .. "src/mame/video/oneshot.cpp",
3488	4407	MAME_DIR .. "src/mame/drivers/onetwo.cpp",
3489	4408	MAME_DIR .. "src/mame/drivers/othello.cpp",
3490	4409	MAME_DIR .. "src/mame/drivers/pachifev.cpp",
3491	4410	MAME_DIR .. "src/mame/drivers/pasha2.cpp",
3492	4411	MAME_DIR .. "src/mame/drivers/pass.cpp",
	4412	MAME_DIR .. "src/mame/includes/pass.h",
3493	4413	MAME_DIR .. "src/mame/video/pass.cpp",
3494	4414	MAME_DIR .. "src/mame/drivers/peplus.cpp",
3495	4415	MAME_DIR .. "src/mame/drivers/photon.cpp",
r250251	r250252
3502	4422	MAME_DIR .. "src/mame/drivers/pkscram.cpp",
3503	4423	MAME_DIR .. "src/mame/drivers/pntnpuzl.cpp",
3504	4424	MAME_DIR .. "src/mame/drivers/policetr.cpp",
	4425	MAME_DIR .. "src/mame/includes/policetr.h",
3505	4426	MAME_DIR .. "src/mame/video/policetr.cpp",
3506	4427	MAME_DIR .. "src/mame/drivers/polyplay.cpp",
	4428	MAME_DIR .. "src/mame/includes/polyplay.h",
3507	4429	MAME_DIR .. "src/mame/audio/polyplay.cpp",
3508	4430	MAME_DIR .. "src/mame/video/polyplay.cpp",
3509	4431	MAME_DIR .. "src/mame/drivers/poker72.cpp",
r250251	r250252
3523	4445	MAME_DIR .. "src/mame/drivers/sealy.cpp",
3524	4446	MAME_DIR .. "src/mame/drivers/sfbonus.cpp",
3525	4447	MAME_DIR .. "src/mame/drivers/shangkid.cpp",
	4448	MAME_DIR .. "src/mame/includes/shangkid.h",
3526	4449	MAME_DIR .. "src/mame/video/shangkid.cpp",
3527	4450	MAME_DIR .. "src/mame/drivers/skeetsht.cpp",
3528	4451	MAME_DIR .. "src/mame/drivers/skimaxx.cpp",
r250251	r250252
3535	4458	MAME_DIR .. "src/mame/drivers/splus.cpp",
3536	4459	MAME_DIR .. "src/mame/drivers/spool99.cpp",
3537	4460	MAME_DIR .. "src/mame/drivers/sprcros2.cpp",
	4461	MAME_DIR .. "src/mame/includes/sprcros2.h",
3538	4462	MAME_DIR .. "src/mame/video/sprcros2.cpp",
3539	4463	MAME_DIR .. "src/mame/drivers/sshot.cpp",
3540	4464	MAME_DIR .. "src/mame/drivers/ssingles.cpp",
r250251	r250252
3552	4476	MAME_DIR .. "src/mame/drivers/tapatune.cpp",
3553	4477	MAME_DIR .. "src/mame/drivers/tattack.cpp",
3554	4478	MAME_DIR .. "src/mame/drivers/taxidriv.cpp",
	4479	MAME_DIR .. "src/mame/includes/taxidriv.h",
3555	4480	MAME_DIR .. "src/mame/video/taxidriv.cpp",
3556	4481	MAME_DIR .. "src/mame/drivers/tcl.cpp",
3557	4482	MAME_DIR .. "src/mame/drivers/thayers.cpp",
3558	4483	MAME_DIR .. "src/mame/drivers/thedeep.cpp",
	4484	MAME_DIR .. "src/mame/includes/thedeep.h",
3559	4485	MAME_DIR .. "src/mame/video/thedeep.cpp",
3560	4486	MAME_DIR .. "src/mame/drivers/tiamc1.cpp",
	4487	MAME_DIR .. "src/mame/includes/tiamc1.h",
3561	4488	MAME_DIR .. "src/mame/video/tiamc1.cpp",
3562	4489	MAME_DIR .. "src/mame/audio/tiamc1.cpp",
3563	4490	MAME_DIR .. "src/mame/drivers/tickee.cpp",
3564	4491	MAME_DIR .. "src/mame/drivers/tmspoker.cpp",
3565	4492	MAME_DIR .. "src/mame/drivers/truco.cpp",
	4493	MAME_DIR .. "src/mame/includes/truco.h",
3566	4494	MAME_DIR .. "src/mame/video/truco.cpp",
3567	4495	MAME_DIR .. "src/mame/drivers/trucocl.cpp",
	4496	MAME_DIR .. "src/mame/includes/trucocl.h",
3568	4497	MAME_DIR .. "src/mame/video/trucocl.cpp",
3569	4498	MAME_DIR .. "src/mame/drivers/trvmadns.cpp",
3570	4499	MAME_DIR .. "src/mame/drivers/trvquest.cpp",
r250251	r250252
3574	4503	MAME_DIR .. "src/mame/drivers/unkfr.cpp",
3575	4504	MAME_DIR .. "src/mame/drivers/unkhorse.cpp",
3576	4505	MAME_DIR .. "src/mame/drivers/usgames.cpp",
	4506	MAME_DIR .. "src/mame/includes/usgames.h",
3577	4507	MAME_DIR .. "src/mame/video/usgames.cpp",
3578	4508	MAME_DIR .. "src/mame/drivers/vamphalf.cpp",
3579	4509	MAME_DIR .. "src/mame/drivers/vcombat.cpp",
3580	4510	MAME_DIR .. "src/mame/drivers/vectrex.cpp",
	4511	MAME_DIR .. "src/mame/includes/vectrex.h",
3581	4512	MAME_DIR .. "src/mame/video/vectrex.cpp",
3582	4513	MAME_DIR .. "src/mame/machine/vectrex.cpp",
3583	4514	MAME_DIR .. "src/mame/drivers/videopkr.cpp",
r250251	r250252
3591	4522	MAME_DIR .. "src/mame/drivers/wacky_gator.cpp",
3592	4523	MAME_DIR .. "src/mame/drivers/xtom3d.cpp",
3593	4524	MAME_DIR .. "src/mame/drivers/xyonix.cpp",
	4525	MAME_DIR .. "src/mame/includes/xyonix.h",
3594	4526	MAME_DIR .. "src/mame/video/xyonix.cpp",
3595	4527	}
3596	4528	end

trunk/scripts/target/mame/dummy.lua

r250251	r250252
29	29	GEN_DIR  .. "mess/layout",
30	30	}
31	31
32		files{
33		MAME_DIR .. "src/mame/drivers/coleco.cpp",
34		MAME_DIR .. "src/mame/machine/coleco.cpp",
35		}
	32	files{
	33	MAME_DIR .. "src/mame/drivers/coleco.cpp",
	34	MAME_DIR .. "src/mame/includes/coleco.h",
	35	MAME_DIR .. "src/mame/machine/coleco.cpp",
	36	MAME_DIR .. "src/mame/machine/coleco.h",
	37	}
36	38	end
37	39
38	40	function linkProjects_mame_dummy(_target, _subtarget)

trunk/scripts/target/mame/mame.lua

r250251	r250252
20	20	function linkProjects_mame_mame(_target, _subtarget)
21	21	linkProjects_mame_arcade(_target, _subtarget)
22	22	linkProjects_mame_mess(_target, _subtarget)
23		end
		No newline at end of file
	23	end

trunk/scripts/target/mame/mess.lua

r250251	r250252
927	927	MAME_DIR .. "src/mame/video/amiga.cpp",
928	928	MAME_DIR .. "src/mame/video/amigaaga.cpp",
929	929	MAME_DIR .. "src/mame/video/tia.cpp",
	930	MAME_DIR .. "src/mame/video/tia.h",
930	931	MAME_DIR .. "src/mame/machine/atari.cpp",
931	932	MAME_DIR .. "src/mame/video/atari.cpp",
	933	MAME_DIR .. "src/mame/includes/atari.h",
932	934	MAME_DIR .. "src/mame/video/antic.cpp",
	935	MAME_DIR .. "src/mame/video/antic.h",
933	936	MAME_DIR .. "src/mame/video/gtia.cpp",
	937	MAME_DIR .. "src/mame/video/gtia.h",
934	938	MAME_DIR .. "src/mame/drivers/jaguar.cpp",
	939	MAME_DIR .. "src/mame/includes/jaguar.h",
935	940	MAME_DIR .. "src/mame/audio/jaguar.cpp",
936	941	MAME_DIR .. "src/mame/video/jaguar.cpp",
	942	MAME_DIR .. "src/mame/video/jagblit.h",
	943	MAME_DIR .. "src/mame/video/jagblit.inc",
	944	MAME_DIR .. "src/mame/video/jagobj.inc",
937	945	MAME_DIR .. "src/mame/audio/gorf.cpp",
938	946	MAME_DIR .. "src/mame/audio/wow.cpp",
939	947	MAME_DIR .. "src/mame/drivers/astrocde.cpp",
	948	MAME_DIR .. "src/mame/includes/astrocde.h",
940	949	MAME_DIR .. "src/mame/video/astrocde.cpp",
941	950	MAME_DIR .. "src/mame/machine/kabuki.cpp",
	951	MAME_DIR .. "src/mame/machine/kabuki.h",
942	952	MAME_DIR .. "src/mame/video/pk8000.cpp",
943	953	MAME_DIR .. "src/mame/video/ppu2c0x.cpp",
	954	MAME_DIR .. "src/mame/video/ppu2c0x.h",
944	955	MAME_DIR .. "src/mame/machine/snes.cpp",
945	956	MAME_DIR .. "src/mame/audio/snes_snd.cpp",
	957	MAME_DIR .. "src/mame/audio/snes_snd.h",
946	958	MAME_DIR .. "src/mame/machine/n64.cpp",
947	959	MAME_DIR .. "src/mame/video/n64.cpp",
	960	MAME_DIR .. "src/mame/video/n64types.h",
	961	MAME_DIR .. "src/mame/video/rdpfiltr.inc",
	962	MAME_DIR .. "src/mame/video/n64.h",
948	963	MAME_DIR .. "src/mame/video/rdpblend.cpp",
	964	MAME_DIR .. "src/mame/video/rdpblend.h",
949	965	MAME_DIR .. "src/mame/video/rdptpipe.cpp",
	966	MAME_DIR .. "src/mame/video/rdptpipe.h",
950	967	MAME_DIR .. "src/mame/machine/megadriv.cpp",
951	968	MAME_DIR .. "src/mame/drivers/naomi.cpp",
	969	MAME_DIR .. "src/mame/includes/naomi.h",
	970	MAME_DIR .. "src/mame/includes/dc.h",
952	971	MAME_DIR .. "src/mame/machine/awboard.cpp",
	972	MAME_DIR .. "src/mame/machine/awboard.h",
953	973	MAME_DIR .. "src/mame/machine/dc.cpp",
954	974	MAME_DIR .. "src/mame/machine/dc-ctrl.cpp",
	975	MAME_DIR .. "src/mame/machine/dc-ctrl.h",
955	976	MAME_DIR .. "src/mame/machine/gdrom.cpp",
	977	MAME_DIR .. "src/mame/machine/gdrom.h",
956	978	MAME_DIR .. "src/mame/machine/jvs13551.cpp",
	979	MAME_DIR .. "src/mame/machine/jvs13551.h",
957	980	MAME_DIR .. "src/mame/machine/maple-dc.cpp",
	981	MAME_DIR .. "src/mame/machine/maple-dc.h",
958	982	MAME_DIR .. "src/mame/machine/mapledev.cpp",
	983	MAME_DIR .. "src/mame/machine/mapledev.h",
959	984	MAME_DIR .. "src/mame/machine/mie.cpp",
	985	MAME_DIR .. "src/mame/machine/mie.h",
960	986	MAME_DIR .. "src/mame/machine/naomi.cpp",
961	987	MAME_DIR .. "src/mame/machine/naomibd.cpp",
	988	MAME_DIR .. "src/mame/machine/naomibd.h",
962	989	MAME_DIR .. "src/mame/machine/naomig1.cpp",
	990	MAME_DIR .. "src/mame/machine/naomig1.h",
963	991	MAME_DIR .. "src/mame/machine/naomigd.cpp",
	992	MAME_DIR .. "src/mame/machine/naomigd.h",
964	993	MAME_DIR .. "src/mame/machine/naomim1.cpp",
	994	MAME_DIR .. "src/mame/machine/naomim1.h",
965	995	MAME_DIR .. "src/mame/machine/naomim2.cpp",
	996	MAME_DIR .. "src/mame/machine/naomim2.h",
966	997	MAME_DIR .. "src/mame/machine/naomim4.cpp",
	998	MAME_DIR .. "src/mame/machine/naomim4.h",
967	999	MAME_DIR .. "src/mame/machine/naomirom.cpp",
	1000	MAME_DIR .. "src/mame/machine/naomirom.h",
968	1001	MAME_DIR .. "src/mame/machine/315-5881_crypt.cpp",
	1002	MAME_DIR .. "src/mame/machine/315-5881_crypt.h",
969	1003	MAME_DIR .. "src/mame/video/powervr2.cpp",
	1004	MAME_DIR .. "src/mame/video/powervr2.h",
970	1005	MAME_DIR .. "src/mame/drivers/neogeo.cpp",
	1006	MAME_DIR .. "src/mame/includes/neogeo.h",
971	1007	MAME_DIR .. "src/mame/machine/neocrypt.cpp",
972	1008	MAME_DIR .. "src/mame/machine/ng_memcard.cpp",
	1009	MAME_DIR .. "src/mame/machine/ng_memcard.h",
973	1010	MAME_DIR .. "src/mame/video/neogeo.cpp",
974	1011	MAME_DIR .. "src/mame/video/neogeo_spr.cpp",
	1012	MAME_DIR .. "src/mame/video/neogeo_spr.h",
975	1013	MAME_DIR .. "src/mame/drivers/cdi.cpp",
	1014	MAME_DIR .. "src/mame/includes/cdi.h",
976	1015	MAME_DIR .. "src/mame/machine/cdi070.cpp",
	1016	MAME_DIR .. "src/mame/machine/cdi070.h",
977	1017	MAME_DIR .. "src/mame/machine/cdicdic.cpp",
	1018	MAME_DIR .. "src/mame/machine/cdicdic.h",
978	1019	MAME_DIR .. "src/mame/machine/cdislave.cpp",
	1020	MAME_DIR .. "src/mame/machine/cdislave.h",
979	1021	MAME_DIR .. "src/mame/video/mcd212.cpp",
	1022	MAME_DIR .. "src/mame/video/mcd212.h",
980	1023	MAME_DIR .. "src/mame/drivers/3do.cpp",
	1024	MAME_DIR .. "src/mame/includes/3do.h",
981	1025	MAME_DIR .. "src/mame/machine/3do.cpp",
982	1026	MAME_DIR .. "src/mame/drivers/konamim2.cpp",
983	1027	MAME_DIR .. "src/mame/drivers/vectrex.cpp",
	1028	MAME_DIR .. "src/mame/includes/vectrex.h",
984	1029	MAME_DIR .. "src/mame/machine/vectrex.cpp",
985	1030	MAME_DIR .. "src/mame/video/vectrex.cpp",
986	1031	MAME_DIR .. "src/mame/drivers/cps1.cpp",
	1032	MAME_DIR .. "src/mame/includes/cps1.h",
987	1033	MAME_DIR .. "src/mame/video/cps1.cpp",
988	1034	MAME_DIR .. "src/mame/video/chihiro.cpp",
989	1035	MAME_DIR .. "src/mame/machine/xbox.cpp",
r250251	r250252
996	1042	createMESSProjects(_target, _subtarget, "messshared")
997	1043	files {
998	1044	MAME_DIR .. "src/mame/audio/mea8000.cpp",
	1045	MAME_DIR .. "src/mame/audio/mea8000.h",
999	1046	MAME_DIR .. "src/mame/machine/appldriv.cpp",
	1047	MAME_DIR .. "src/mame/machine/appldriv.h",
1000	1048	MAME_DIR .. "src/mame/machine/applefdc.cpp",
	1049	MAME_DIR .. "src/mame/machine/applefdc.h",
1001	1050	MAME_DIR .. "src/mame/machine/microdrv.cpp",
	1051	MAME_DIR .. "src/mame/machine/microdrv.h",
1002	1052	MAME_DIR .. "src/mame/machine/smartmed.cpp",
	1053	MAME_DIR .. "src/mame/machine/smartmed.h",
1003	1054	MAME_DIR .. "src/mame/machine/sonydriv.cpp",
	1055	MAME_DIR .. "src/mame/machine/sonydriv.h",
1004	1056	MAME_DIR .. "src/mame/machine/teleprinter.cpp",
	1057	MAME_DIR .. "src/mame/machine/teleprinter.h",
1005	1058	MAME_DIR .. "src/mame/machine/z80bin.cpp",
	1059	MAME_DIR .. "src/mame/machine/z80bin.h",
1006	1060	}
1007	1061	--------------------------------------------------
1008	1062	-- manufacturer-specific groupings for drivers
r250251	r250252
1014	1068	MAME_DIR .. "src/mame/drivers/a6809.cpp",
1015	1069	MAME_DIR .. "src/mame/drivers/acrnsys1.cpp",
1016	1070	MAME_DIR .. "src/mame/drivers/atom.cpp",
	1071	MAME_DIR .. "src/mame/includes/atom.h",
1017	1072	MAME_DIR .. "src/mame/drivers/bbc.cpp",
	1073	MAME_DIR .. "src/mame/includes/bbc.h",
1018	1074	MAME_DIR .. "src/mame/machine/bbc.cpp",
1019	1075	MAME_DIR .. "src/mame/video/bbc.cpp",
1020	1076	MAME_DIR .. "src/mame/drivers/bbcbc.cpp",
1021	1077	MAME_DIR .. "src/mame/drivers/electron.cpp",
	1078	MAME_DIR .. "src/mame/includes/electron.h",
1022	1079	MAME_DIR .. "src/mame/machine/electron.cpp",
1023	1080	MAME_DIR .. "src/mame/video/electron.cpp",
1024	1081	MAME_DIR .. "src/mame/drivers/riscpc.cpp",
1025	1082	MAME_DIR .. "src/mame/drivers/z88.cpp",
	1083	MAME_DIR .. "src/mame/includes/z88.h",
1026	1084	MAME_DIR .. "src/mame/machine/upd65031.cpp",
	1085	MAME_DIR .. "src/mame/machine/upd65031.h",
1027	1086	MAME_DIR .. "src/mame/video/z88.cpp",
1028	1087	}
1029	1088
r250251	r250252
1033	1092	MAME_DIR .. "src/mame/drivers/apricotf.cpp",
1034	1093	MAME_DIR .. "src/mame/drivers/apricotp.cpp",
1035	1094	MAME_DIR .. "src/mame/machine/apricotkb.cpp",
	1095	MAME_DIR .. "src/mame/machine/apricotkb.h",
1036	1096	MAME_DIR .. "src/mame/machine/apricotkb_hle.cpp",
	1097	MAME_DIR .. "src/mame/machine/apricotkb_hle.h",
1037	1098	MAME_DIR .. "src/mame/drivers/victor9k.cpp",
	1099	MAME_DIR .. "src/mame/includes/victor9k.h",
1038	1100	MAME_DIR .. "src/mame/machine/victor9kb.cpp",
	1101	MAME_DIR .. "src/mame/machine/victor9kb.h",
1039	1102	MAME_DIR .. "src/mame/machine/victor9k_fdc.cpp",
	1103	MAME_DIR .. "src/mame/machine/victor9k_fdc.h",
1040	1104	}
1041	1105
1042	1106	createMESSProjects(_target, _subtarget, "adc")
1043	1107	files {
1044	1108	MAME_DIR .. "src/mame/drivers/super6.cpp",
	1109	MAME_DIR .. "src/mame/includes/super6.h",
1045	1110	MAME_DIR .. "src/mame/drivers/superslave.cpp",
	1111	MAME_DIR .. "src/mame/includes/superslave.h",
1046	1112	}
1047	1113
1048	1114	createMESSProjects(_target, _subtarget, "alesis")
1049	1115	files {
1050	1116	MAME_DIR .. "src/mame/drivers/alesis.cpp",
	1117	MAME_DIR .. "src/mame/includes/alesis.h",
1051	1118	MAME_DIR .. "src/mame/audio/alesis.cpp",
1052	1119	MAME_DIR .. "src/mame/video/alesis.cpp",
1053	1120	}
r250251	r250252
1060	1127	createMESSProjects(_target, _subtarget, "amiga")
1061	1128	files {
1062	1129	MAME_DIR .. "src/mame/drivers/amiga.cpp",
	1130	MAME_DIR .. "src/mame/includes/amiga.h",
1063	1131	MAME_DIR .. "src/mame/machine/amigakbd.cpp",
	1132	MAME_DIR .. "src/mame/machine/amigakbd.h",
1064	1133	}
1065	1134
1066	1135	createMESSProjects(_target, _subtarget, "amstrad")
1067	1136	files {
1068	1137	MAME_DIR .. "src/mame/drivers/amstrad.cpp",
	1138	MAME_DIR .. "src/mame/includes/amstrad.h",
1069	1139	MAME_DIR .. "src/mame/machine/amstrad.cpp",
1070	1140	MAME_DIR .. "src/mame/drivers/amstr_pc.cpp",
1071	1141	MAME_DIR .. "src/mame/drivers/nc.cpp",
	1142	MAME_DIR .. "src/mame/includes/nc.h",
1072	1143	MAME_DIR .. "src/mame/machine/nc.cpp",
1073	1144	MAME_DIR .. "src/mame/video/nc.cpp",
1074	1145	MAME_DIR .. "src/mame/drivers/pc1512.cpp",
	1146	MAME_DIR .. "src/mame/includes/pc1512.h",
1075	1147	MAME_DIR .. "src/mame/machine/pc1512kb.cpp",
	1148	MAME_DIR .. "src/mame/machine/pc1512kb.h",
1076	1149	MAME_DIR .. "src/mame/video/pc1512.cpp",
1077	1150	MAME_DIR .. "src/mame/drivers/pcw.cpp",
	1151	MAME_DIR .. "src/mame/includes/pcw.h",
1078	1152	MAME_DIR .. "src/mame/video/pcw.cpp",
1079	1153	MAME_DIR .. "src/mame/drivers/pcw16.cpp",
	1154	MAME_DIR .. "src/mame/includes/pcw16.h",
1080	1155	MAME_DIR .. "src/mame/video/pcw16.cpp",
1081	1156	MAME_DIR .. "src/mame/drivers/pda600.cpp",
1082	1157	}
r250251	r250252
1089	1164	createMESSProjects(_target, _subtarget, "apollo")
1090	1165	files {
1091	1166	MAME_DIR .. "src/mame/drivers/apollo.cpp",
	1167	MAME_DIR .. "src/mame/includes/apollo.h",
1092	1168	MAME_DIR .. "src/mame/machine/apollo.cpp",
1093	1169	MAME_DIR .. "src/mame/machine/apollo_dbg.cpp",
1094	1170	MAME_DIR .. "src/mame/machine/apollo_kbd.cpp",
	1171	MAME_DIR .. "src/mame/machine/apollo_kbd.h",
1095	1172	MAME_DIR .. "src/mame/video/apollo.cpp",
1096	1173	}
1097	1174
1098	1175	createMESSProjects(_target, _subtarget, "apple")
1099	1176	files {
1100	1177	MAME_DIR .. "src/mame/drivers/apple1.cpp",
	1178	MAME_DIR .. "src/mame/includes/apple1.h",
1101	1179	MAME_DIR .. "src/mame/machine/apple1.cpp",
1102	1180	MAME_DIR .. "src/mame/video/apple1.cpp",
1103	1181	MAME_DIR .. "src/mame/drivers/apple2.cpp",
	1182	MAME_DIR .. "src/mame/includes/apple2.h",
1104	1183	MAME_DIR .. "src/mame/drivers/apple2e.cpp",
1105	1184	MAME_DIR .. "src/mame/machine/apple2.cpp",
1106	1185	MAME_DIR .. "src/mame/video/apple2.cpp",
	1186	MAME_DIR .. "src/mame/video/apple2.h",
1107	1187	MAME_DIR .. "src/mame/drivers/tk2000.cpp",
1108	1188	MAME_DIR .. "src/mame/drivers/apple2gs.cpp",
	1189	MAME_DIR .. "src/mame/includes/apple2gs.h",
1109	1190	MAME_DIR .. "src/mame/machine/apple2gs.cpp",
1110	1191	MAME_DIR .. "src/mame/video/apple2gs.cpp",
1111	1192	MAME_DIR .. "src/mame/drivers/apple3.cpp",
	1193	MAME_DIR .. "src/mame/includes/apple3.h",
1112	1194	MAME_DIR .. "src/mame/machine/apple3.cpp",
1113	1195	MAME_DIR .. "src/mame/video/apple3.cpp",
1114	1196	MAME_DIR .. "src/mame/drivers/lisa.cpp",
	1197	MAME_DIR .. "src/mame/includes/lisa.h",
1115	1198	MAME_DIR .. "src/mame/machine/lisa.cpp",
1116	1199	MAME_DIR .. "src/mame/drivers/mac.cpp",
	1200	MAME_DIR .. "src/mame/includes/mac.h",
1117	1201	MAME_DIR .. "src/mame/audio/mac.cpp",
1118	1202	MAME_DIR .. "src/mame/machine/egret.cpp",
	1203	MAME_DIR .. "src/mame/machine/egret.h",
1119	1204	MAME_DIR .. "src/mame/machine/mac.cpp",
1120	1205	MAME_DIR .. "src/mame/machine/macadb.cpp",
1121	1206	MAME_DIR .. "src/mame/machine/macrtc.cpp",
	1207	MAME_DIR .. "src/mame/machine/macrtc.h",
1122	1208	MAME_DIR .. "src/mame/machine/mackbd.cpp",
	1209	MAME_DIR .. "src/mame/machine/mackbd.h",
1123	1210	MAME_DIR .. "src/mame/machine/swim.cpp",
	1211	MAME_DIR .. "src/mame/machine/swim.h",
1124	1212	MAME_DIR .. "src/mame/video/mac.cpp",
1125	1213	MAME_DIR .. "src/mame/drivers/macpci.cpp",
	1214	MAME_DIR .. "src/mame/includes/macpci.h",
1126	1215	MAME_DIR .. "src/mame/machine/macpci.cpp",
1127	1216	MAME_DIR .. "src/mame/machine/cuda.cpp",
	1217	MAME_DIR .. "src/mame/machine/cuda.h",
1128	1218	}
1129	1219
1130	1220	createMESSProjects(_target, _subtarget, "applied")
1131	1221	files {
1132	1222	MAME_DIR .. "src/mame/drivers/mbee.cpp",
	1223	MAME_DIR .. "src/mame/includes/mbee.h",
1133	1224	MAME_DIR .. "src/mame/machine/mbee.cpp",
1134	1225	MAME_DIR .. "src/mame/video/mbee.cpp",
1135	1226	}
r250251	r250252
1137	1228	createMESSProjects(_target, _subtarget, "arcadia")
1138	1229	files {
1139	1230	MAME_DIR .. "src/mame/drivers/arcadia.cpp",
	1231	MAME_DIR .. "src/mame/includes/arcadia.h",
1140	1232	MAME_DIR .. "src/mame/audio/arcadia.cpp",
	1233	MAME_DIR .. "src/mame/audio/arcadia.h",
1141	1234	MAME_DIR .. "src/mame/video/arcadia.cpp",
1142	1235	}
1143	1236
1144	1237	createMESSProjects(_target, _subtarget, "ascii")
1145	1238	files {
1146	1239	MAME_DIR .. "src/mame/drivers/msx.cpp",
	1240	MAME_DIR .. "src/mame/includes/msx.h",
1147	1241	MAME_DIR .. "src/mame/machine/msx.cpp",
1148	1242	MAME_DIR .. "src/mame/machine/msx_matsushita.cpp",
	1243	MAME_DIR .. "src/mame/machine/msx_matsushita.h",
1149	1244	MAME_DIR .. "src/mame/machine/msx_s1985.cpp",
	1245	MAME_DIR .. "src/mame/machine/msx_s1985.h",
1150	1246	MAME_DIR .. "src/mame/machine/msx_switched.cpp",
	1247	MAME_DIR .. "src/mame/machine/msx_switched.h",
1151	1248	MAME_DIR .. "src/mame/machine/msx_systemflags.cpp",
	1249	MAME_DIR .. "src/mame/machine/msx_systemflags.h",
1152	1250	}
1153	1251
1154	1252	createMESSProjects(_target, _subtarget, "at")
1155	1253	files {
1156	1254	MAME_DIR .. "src/mame/drivers/at.cpp",
	1255	MAME_DIR .. "src/mame/includes/at.h",
1157	1256	MAME_DIR .. "src/mame/machine/at.cpp",
1158	1257	MAME_DIR .. "src/mame/drivers/ct486.cpp",
1159	1258	}
r250251	r250252
1163	1262	MAME_DIR .. "src/mame/drivers/a2600.cpp",
1164	1263	MAME_DIR .. "src/mame/drivers/a7800.cpp",
1165	1264	MAME_DIR .. "src/mame/video/maria.cpp",
	1265	MAME_DIR .. "src/mame/video/maria.h",
1166	1266	MAME_DIR .. "src/mame/drivers/atari400.cpp",
1167	1267	MAME_DIR .. "src/mame/machine/atarifdc.cpp",
	1268	MAME_DIR .. "src/mame/machine/atarifdc.h",
1168	1269	MAME_DIR .. "src/mame/drivers/atarist.cpp",
	1270	MAME_DIR .. "src/mame/includes/atarist.h",
1169	1271	MAME_DIR .. "src/mame/video/atarist.cpp",
	1272	MAME_DIR .. "src/mame/video/atarist.h",
1170	1273	MAME_DIR .. "src/mame/drivers/lynx.cpp",
	1274	MAME_DIR .. "src/mame/includes/lynx.h",
1171	1275	MAME_DIR .. "src/mame/audio/lynx.cpp",
	1276	MAME_DIR .. "src/mame/audio/lynx.h",
1172	1277	MAME_DIR .. "src/mame/machine/lynx.cpp",
1173	1278	MAME_DIR .. "src/mame/drivers/portfoli.cpp",
	1279	MAME_DIR .. "src/mame/includes/portfoli.h",
1174	1280	}
1175	1281
1176	1282	createMESSProjects(_target, _subtarget, "att")
r250251	r250252
1186	1292	createMESSProjects(_target, _subtarget, "banctec")
1187	1293	files {
1188	1294	MAME_DIR .. "src/mame/drivers/banctec.cpp",
	1295	MAME_DIR .. "src/mame/includes/banctec.h",
1189	1296	}
1190	1297
1191	1298	createMESSProjects(_target, _subtarget, "bandai")
r250251	r250252
1194	1301	MAME_DIR .. "src/mame/drivers/rx78.cpp",
1195	1302	MAME_DIR .. "src/mame/drivers/tamag1.cpp",
1196	1303	MAME_DIR .. "src/mame/drivers/wswan.cpp",
	1304	MAME_DIR .. "src/mame/includes/wswan.h",
1197	1305	MAME_DIR .. "src/mame/audio/wswan_snd.cpp",
	1306	MAME_DIR .. "src/mame/audio/wswan_snd.h",
1198	1307	MAME_DIR .. "src/mame/machine/wswan.cpp",
1199	1308	MAME_DIR .. "src/mame/video/wswan_video.cpp",
	1309	MAME_DIR .. "src/mame/video/wswan_video.h",
1200	1310	}
1201	1311
1202	1312	createMESSProjects(_target, _subtarget, "be")
1203	1313	files {
1204	1314	MAME_DIR .. "src/mame/drivers/bebox.cpp",
	1315	MAME_DIR .. "src/mame/includes/bebox.h",
1205	1316	MAME_DIR .. "src/mame/machine/bebox.cpp",
1206	1317	}
1207	1318
1208	1319	createMESSProjects(_target, _subtarget, "bnpo")
1209	1320	files {
1210	1321	MAME_DIR .. "src/mame/drivers/b2m.cpp",
	1322	MAME_DIR .. "src/mame/includes/b2m.h",
1211	1323	MAME_DIR .. "src/mame/machine/b2m.cpp",
1212	1324	MAME_DIR .. "src/mame/video/b2m.cpp",
1213	1325	}
r250251	r250252
1215	1327	createMESSProjects(_target, _subtarget, "bondwell")
1216	1328	files {
1217	1329	MAME_DIR .. "src/mame/drivers/bw12.cpp",
	1330	MAME_DIR .. "src/mame/includes/bw12.h",
1218	1331	MAME_DIR .. "src/mame/drivers/bw2.cpp",
	1332	MAME_DIR .. "src/mame/includes/bw2.h",
1219	1333	}
1220	1334
1221	1335	createMESSProjects(_target, _subtarget, "booth")
r250251	r250252
1226	1340	createMESSProjects(_target, _subtarget, "camputers")
1227	1341	files {
1228	1342	MAME_DIR .. "src/mame/drivers/camplynx.cpp",
1229		MAME_DIR .. "src/lib/formats/camplynx_dsk.cpp",
1230	1343	}
1231	1344
1232	1345	createMESSProjects(_target, _subtarget, "canon")
1233	1346	files {
1234	1347	MAME_DIR .. "src/mame/drivers/cat.cpp",
1235	1348	MAME_DIR .. "src/mame/drivers/x07.cpp",
	1349	MAME_DIR .. "src/mame/includes/x07.h",
1236	1350	MAME_DIR .. "src/mame/drivers/canon_s80.cpp",
1237	1351	}
1238	1352
r250251	r250252
1256	1370	createMESSProjects(_target, _subtarget, "cbm")
1257	1371	files {
1258	1372	MAME_DIR .. "src/mame/drivers/c128.cpp",
	1373	MAME_DIR .. "src/mame/includes/c128.h",
1259	1374	MAME_DIR .. "src/mame/drivers/c64.cpp",
	1375	MAME_DIR .. "src/mame/includes/c64.h",
1260	1376	MAME_DIR .. "src/mame/drivers/c64dtv.cpp",
1261	1377	MAME_DIR .. "src/mame/drivers/c65.cpp",
	1378	MAME_DIR .. "src/mame/includes/c65.h",
1262	1379	MAME_DIR .. "src/mame/drivers/c900.cpp",
1263	1380	MAME_DIR .. "src/mame/drivers/cbm2.cpp",
	1381	MAME_DIR .. "src/mame/includes/cbm2.h",
1264	1382	MAME_DIR .. "src/mame/drivers/clcd.cpp",
1265	1383	MAME_DIR .. "src/mame/drivers/pet.cpp",
	1384	MAME_DIR .. "src/mame/includes/pet.h",
1266	1385	MAME_DIR .. "src/mame/drivers/plus4.cpp",
	1386	MAME_DIR .. "src/mame/includes/plus4.h",
1267	1387	MAME_DIR .. "src/mame/drivers/vic10.cpp",
	1388	MAME_DIR .. "src/mame/includes/vic10.h",
1268	1389	MAME_DIR .. "src/mame/drivers/vic20.cpp",
	1390	MAME_DIR .. "src/mame/includes/vic20.h",
1269	1391	MAME_DIR .. "src/mame/machine/cbm_snqk.cpp",
	1392	MAME_DIR .. "src/mame/machine/cbm_snqk.h",
1270	1393	MAME_DIR .. "src/mame/drivers/mps1230.cpp",
1271	1394	}
1272	1395
r250251	r250252
1275	1398	MAME_DIR .. "src/mame/drivers/argo.cpp",
1276	1399	MAME_DIR .. "src/mame/drivers/cm1800.cpp",
1277	1400	MAME_DIR .. "src/mame/drivers/lviv.cpp",
	1401	MAME_DIR .. "src/mame/includes/lviv.h",
1278	1402	MAME_DIR .. "src/mame/machine/lviv.cpp",
1279	1403	MAME_DIR .. "src/mame/video/lviv.cpp",
1280	1404	MAME_DIR .. "src/mame/drivers/mikro80.cpp",
	1405	MAME_DIR .. "src/mame/includes/mikro80.h",
1281	1406	MAME_DIR .. "src/mame/machine/mikro80.cpp",
1282	1407	MAME_DIR .. "src/mame/video/mikro80.cpp",
1283	1408	MAME_DIR .. "src/mame/drivers/pk8000.cpp",
	1409	MAME_DIR .. "src/mame/includes/pk8000.h",
1284	1410	MAME_DIR .. "src/mame/drivers/pk8020.cpp",
	1411	MAME_DIR .. "src/mame/includes/pk8020.h",
1285	1412	MAME_DIR .. "src/mame/machine/pk8020.cpp",
1286	1413	MAME_DIR .. "src/mame/video/pk8020.cpp",
1287	1414	MAME_DIR .. "src/mame/drivers/pyl601.cpp",
r250251	r250252
1289	1416	MAME_DIR .. "src/mame/drivers/uknc.cpp",
1290	1417	MAME_DIR .. "src/mame/drivers/unior.cpp",
1291	1418	MAME_DIR .. "src/mame/drivers/ut88.cpp",
	1419	MAME_DIR .. "src/mame/includes/ut88.h",
1292	1420	MAME_DIR .. "src/mame/machine/ut88.cpp",
1293	1421	MAME_DIR .. "src/mame/video/ut88.cpp",
1294	1422	MAME_DIR .. "src/mame/drivers/vector06.cpp",
	1423	MAME_DIR .. "src/mame/includes/vector06.h",
1295	1424	MAME_DIR .. "src/mame/machine/vector06.cpp",
1296	1425	MAME_DIR .. "src/mame/video/vector06.cpp",
1297	1426	MAME_DIR .. "src/mame/drivers/vta2000.cpp",
r250251	r250252
1300	1429	createMESSProjects(_target, _subtarget, "cce")
1301	1430	files {
1302	1431	MAME_DIR .. "src/mame/drivers/mc1000.cpp",
	1432	MAME_DIR .. "src/mame/includes/mc1000.h",
1303	1433	}
1304	1434
1305	1435	createMESSProjects(_target, _subtarget, "ccs")
r250251	r250252
1311	1441	createMESSProjects(_target, _subtarget, "chromatics")
1312	1442	files {
1313	1443	MAME_DIR .. "src/mame/drivers/cgc7900.cpp",
	1444	MAME_DIR .. "src/mame/includes/cgc7900.h",
1314	1445	MAME_DIR .. "src/mame/video/cgc7900.cpp",
1315	1446	}
1316	1447
1317	1448	createMESSProjects(_target, _subtarget, "coleco")
1318	1449	files {
1319	1450	MAME_DIR .. "src/mame/drivers/adam.cpp",
	1451	MAME_DIR .. "src/mame/includes/adam.h",
1320	1452	MAME_DIR .. "src/mame/drivers/coleco.cpp",
	1453	MAME_DIR .. "src/mame/includes/coleco.h",
1321	1454	MAME_DIR .. "src/mame/machine/coleco.cpp",
	1455	MAME_DIR .. "src/mame/machine/coleco.h",
1322	1456	}
1323	1457
1324	1458	createMESSProjects(_target, _subtarget, "cromemco")
r250251	r250252
1330	1464	createMESSProjects(_target, _subtarget, "comx")
1331	1465	files {
1332	1466	MAME_DIR .. "src/mame/drivers/comx35.cpp",
	1467	MAME_DIR .. "src/mame/includes/comx35.h",
1333	1468	MAME_DIR .. "src/mame/video/comx35.cpp",
1334	1469	}
1335	1470
1336	1471	createMESSProjects(_target, _subtarget, "concept")
1337	1472	files {
1338	1473	MAME_DIR .. "src/mame/drivers/concept.cpp",
	1474	MAME_DIR .. "src/mame/includes/concept.h",
1339	1475	MAME_DIR .. "src/mame/machine/concept.cpp",
1340	1476	}
1341	1477
1342	1478	createMESSProjects(_target, _subtarget, "conitec")
1343	1479	files {
1344	1480	MAME_DIR .. "src/mame/drivers/prof180x.cpp",
	1481	MAME_DIR .. "src/mame/includes/prof180x.h",
1345	1482	MAME_DIR .. "src/mame/drivers/prof80.cpp",
	1483	MAME_DIR .. "src/mame/includes/prof80.h",
1346	1484	MAME_DIR .. "src/mame/machine/prof80mmu.cpp",
	1485	MAME_DIR .. "src/mame/machine/prof80mmu.h",
1347	1486	}
1348	1487
1349	1488	createMESSProjects(_target, _subtarget, "cybiko")
1350	1489	files {
1351	1490	MAME_DIR .. "src/mame/drivers/cybiko.cpp",
	1491	MAME_DIR .. "src/mame/includes/cybiko.h",
1352	1492	MAME_DIR .. "src/mame/machine/cybiko.cpp",
1353	1493	}
1354	1494
1355	1495	createMESSProjects(_target, _subtarget, "dai")
1356	1496	files {
1357	1497	MAME_DIR .. "src/mame/drivers/dai.cpp",
	1498	MAME_DIR .. "src/mame/includes/dai.h",
1358	1499	MAME_DIR .. "src/mame/audio/dai_snd.cpp",
	1500	MAME_DIR .. "src/mame/audio/dai_snd.h",
1359	1501	MAME_DIR .. "src/mame/machine/dai.cpp",
1360	1502	MAME_DIR .. "src/mame/video/dai.cpp",
1361	1503	}
r250251	r250252
1363	1505	createMESSProjects(_target, _subtarget, "ddr")
1364	1506	files {
1365	1507	MAME_DIR .. "src/mame/drivers/ac1.cpp",
	1508	MAME_DIR .. "src/mame/includes/ac1.h",
1366	1509	MAME_DIR .. "src/mame/machine/ac1.cpp",
1367	1510	MAME_DIR .. "src/mame/video/ac1.cpp",
1368	1511	MAME_DIR .. "src/mame/drivers/bcs3.cpp",
1369	1512	MAME_DIR .. "src/mame/drivers/c80.cpp",
	1513	MAME_DIR .. "src/mame/includes/c80.h",
1370	1514	MAME_DIR .. "src/mame/drivers/huebler.cpp",
	1515	MAME_DIR .. "src/mame/includes/huebler.h",
1371	1516	MAME_DIR .. "src/mame/drivers/jtc.cpp",
1372	1517	MAME_DIR .. "src/mame/drivers/kramermc.cpp",
	1518	MAME_DIR .. "src/mame/includes/kramermc.h",
1373	1519	MAME_DIR .. "src/mame/machine/kramermc.cpp",
1374	1520	MAME_DIR .. "src/mame/video/kramermc.cpp",
1375	1521	MAME_DIR .. "src/mame/drivers/llc.cpp",
	1522	MAME_DIR .. "src/mame/includes/llc.h",
1376	1523	MAME_DIR .. "src/mame/machine/llc.cpp",
1377	1524	MAME_DIR .. "src/mame/video/llc.cpp",
1378	1525	MAME_DIR .. "src/mame/drivers/nanos.cpp",
1379	1526	MAME_DIR .. "src/mame/drivers/pcm.cpp",
1380	1527	MAME_DIR .. "src/mame/drivers/vcs80.cpp",
	1528	MAME_DIR .. "src/mame/includes/vcs80.h",
1381	1529	MAME_DIR .. "src/mame/machine/k7659kb.cpp",
	1530	MAME_DIR .. "src/mame/machine/k7659kb.h",
1382	1531	}
1383	1532
1384	1533	createMESSProjects(_target, _subtarget, "dec")
r250251	r250252
1396	1545	MAME_DIR .. "src/mame/drivers/vt320.cpp",
1397	1546	MAME_DIR .. "src/mame/drivers/vt520.cpp",
1398	1547	MAME_DIR .. "src/mame/machine/dec_lk201.cpp",
	1548	MAME_DIR .. "src/mame/machine/dec_lk201.h",
1399	1549	MAME_DIR .. "src/mame/machine/rx01.cpp",
	1550	MAME_DIR .. "src/mame/machine/rx01.h",
1400	1551	MAME_DIR .. "src/mame/video/vtvideo.cpp",
	1552	MAME_DIR .. "src/mame/video/vtvideo.h",
1401	1553	}
1402	1554
1403	1555	createMESSProjects(_target, _subtarget, "dicksmth")
1404	1556	files {
1405	1557	MAME_DIR .. "src/mame/drivers/super80.cpp",
	1558	MAME_DIR .. "src/mame/includes/super80.h",
1406	1559	MAME_DIR .. "src/mame/machine/super80.cpp",
1407	1560	MAME_DIR .. "src/mame/video/super80.cpp",
1408	1561	}
r250251	r250252
1417	1570	createMESSProjects(_target, _subtarget, "dragon")
1418	1571	files {
1419	1572	MAME_DIR .. "src/mame/drivers/dgn_beta.cpp",
	1573	MAME_DIR .. "src/mame/includes/dgn_beta.h",
1420	1574	MAME_DIR .. "src/mame/machine/dgn_beta.cpp",
1421	1575	MAME_DIR .. "src/mame/video/dgn_beta.cpp",
1422	1576	}
r250251	r250252
1434	1588	createMESSProjects(_target, _subtarget, "einis")
1435	1589	files {
1436	1590	MAME_DIR .. "src/mame/drivers/pecom.cpp",
	1591	MAME_DIR .. "src/mame/includes/pecom.h",
1437	1592	MAME_DIR .. "src/mame/machine/pecom.cpp",
1438	1593	MAME_DIR .. "src/mame/video/pecom.cpp",
1439	1594	}
r250251	r250252
1441	1596	createMESSProjects(_target, _subtarget, "elektrka")
1442	1597	files {
1443	1598	MAME_DIR .. "src/mame/drivers/bk.cpp",
	1599	MAME_DIR .. "src/mame/includes/bk.h",
1444	1600	MAME_DIR .. "src/mame/machine/bk.cpp",
1445	1601	MAME_DIR .. "src/mame/video/bk.cpp",
1446	1602	MAME_DIR .. "src/mame/drivers/dvk_kcgd.cpp",
1447	1603	MAME_DIR .. "src/mame/drivers/dvk_ksm.cpp",
1448	1604	MAME_DIR .. "src/mame/machine/ms7004.cpp",
	1605	MAME_DIR .. "src/mame/machine/ms7004.h",
1449	1606	MAME_DIR .. "src/mame/drivers/mk85.cpp",
1450	1607	MAME_DIR .. "src/mame/drivers/mk90.cpp",
1451	1608	}
r250251	r250252
1466	1623	MAME_DIR .. "src/mame/drivers/esqmr.cpp",
1467	1624	MAME_DIR .. "src/mame/drivers/enmirage.cpp",
1468	1625	MAME_DIR .. "src/mame/machine/esqpanel.cpp",
	1626	MAME_DIR .. "src/mame/machine/esqpanel.h",
1469	1627	MAME_DIR .. "src/mame/machine/esqvfd.cpp",
	1628	MAME_DIR .. "src/mame/machine/esqvfd.h",
1470	1629	}
1471	1630
1472	1631	createMESSProjects(_target, _subtarget, "enterprise")
1473	1632	files {
1474	1633	MAME_DIR .. "src/mame/drivers/ep64.cpp",
	1634	MAME_DIR .. "src/mame/includes/ep64.h",
1475	1635	MAME_DIR .. "src/mame/audio/dave.cpp",
	1636	MAME_DIR .. "src/mame/audio/dave.h",
1476	1637	MAME_DIR .. "src/mame/video/nick.cpp",
	1638	MAME_DIR .. "src/mame/video/nick.h",
1477	1639	}
1478	1640
1479	1641	createMESSProjects(_target, _subtarget, "entex")
1480	1642	files {
1481	1643	MAME_DIR .. "src/mame/drivers/advision.cpp",
	1644	MAME_DIR .. "src/mame/includes/advision.h",
1482	1645	MAME_DIR .. "src/mame/machine/advision.cpp",
1483	1646	MAME_DIR .. "src/mame/video/advision.cpp",
1484	1647	}
r250251	r250252
1486	1649	createMESSProjects(_target, _subtarget, "epoch")
1487	1650	files {
1488	1651	MAME_DIR .. "src/mame/drivers/gamepock.cpp",
	1652	MAME_DIR .. "src/mame/includes/gamepock.h",
1489	1653	MAME_DIR .. "src/mame/machine/gamepock.cpp",
1490	1654	MAME_DIR .. "src/mame/drivers/scv.cpp",
1491	1655	MAME_DIR .. "src/mame/audio/upd1771.cpp",
	1656	MAME_DIR .. "src/mame/audio/upd1771.h",
1492	1657	}
1493	1658
1494	1659	createMESSProjects(_target, _subtarget, "epson")
1495	1660	files {
1496	1661	MAME_DIR .. "src/mame/drivers/hx20.cpp",
	1662	MAME_DIR .. "src/mame/includes/hx20.h",
1497	1663	MAME_DIR .. "src/mame/drivers/px4.cpp",
1498	1664	MAME_DIR .. "src/mame/drivers/px8.cpp",
	1665	MAME_DIR .. "src/mame/includes/px8.h",
1499	1666	MAME_DIR .. "src/mame/drivers/qx10.cpp",
1500	1667	MAME_DIR .. "src/mame/machine/qx10kbd.cpp",
	1668	MAME_DIR .. "src/mame/machine/qx10kbd.h",
1501	1669	}
1502	1670
1503	1671	createMESSProjects(_target, _subtarget, "exidy")
1504	1672	files {
1505	1673	MAME_DIR .. "src/mame/machine/sorcerer.cpp",
1506	1674	MAME_DIR .. "src/mame/drivers/sorcerer.cpp",
	1675	MAME_DIR .. "src/mame/includes/sorcerer.h",
1507	1676	MAME_DIR .. "src/mame/machine/micropolis.cpp",
	1677	MAME_DIR .. "src/mame/machine/micropolis.h",
1508	1678	}
1509	1679
1510	1680	createMESSProjects(_target, _subtarget, "fairch")
1511	1681	files {
1512	1682	MAME_DIR .. "src/mame/drivers/channelf.cpp",
	1683	MAME_DIR .. "src/mame/includes/channelf.h",
1513	1684	MAME_DIR .. "src/mame/audio/channelf.cpp",
	1685	MAME_DIR .. "src/mame/audio/channelf.h",
1514	1686	MAME_DIR .. "src/mame/video/channelf.cpp",
1515	1687	}
1516	1688
r250251	r250252
1518	1690	files {
1519	1691	MAME_DIR .. "src/mame/drivers/csc.cpp",
1520	1692	MAME_DIR .. "src/mame/drivers/fidelz80.cpp",
	1693	MAME_DIR .. "src/mame/includes/fidelz80.h",
1521	1694	}
1522	1695
1523	1696	createMESSProjects(_target, _subtarget, "force")
r250251	r250252
1528	1701	createMESSProjects(_target, _subtarget, "fujitsu")
1529	1702	files {
1530	1703	MAME_DIR .. "src/mame/drivers/fmtowns.cpp",
	1704	MAME_DIR .. "src/mame/includes/fmtowns.h",
1531	1705	MAME_DIR .. "src/mame/video/fmtowns.cpp",
1532	1706	MAME_DIR .. "src/mame/machine/fm_scsi.cpp",
	1707	MAME_DIR .. "src/mame/machine/fm_scsi.h",
1533	1708	MAME_DIR .. "src/mame/drivers/fm7.cpp",
	1709	MAME_DIR .. "src/mame/includes/fm7.h",
1534	1710	MAME_DIR .. "src/mame/video/fm7.cpp",
1535	1711	}
1536	1712
r250251	r250252
1542	1718	createMESSProjects(_target, _subtarget, "galaxy")
1543	1719	files {
1544	1720	MAME_DIR .. "src/mame/drivers/galaxy.cpp",
	1721	MAME_DIR .. "src/mame/includes/galaxy.h",
1545	1722	MAME_DIR .. "src/mame/machine/galaxy.cpp",
1546	1723	MAME_DIR .. "src/mame/video/galaxy.cpp",
1547	1724	}
r250251	r250252
1550	1727	files {
1551	1728	MAME_DIR .. "src/mame/drivers/gp2x.cpp",
1552	1729	MAME_DIR .. "src/mame/drivers/gp32.cpp",
	1730	MAME_DIR .. "src/mame/includes/gp32.h",
1553	1731	}
1554	1732
1555	1733	createMESSProjects(_target, _subtarget, "gi")
r250251	r250252
1560	1738	createMESSProjects(_target, _subtarget, "grundy")
1561	1739	files {
1562	1740	MAME_DIR .. "src/mame/drivers/newbrain.cpp",
	1741	MAME_DIR .. "src/mame/includes/newbrain.h",
1563	1742	MAME_DIR .. "src/mame/video/newbrain.cpp",
1564	1743	}
1565	1744
r250251	r250252
1583	1762	MAME_DIR .. "src/mame/drivers/mmodular.cpp",
1584	1763	MAME_DIR .. "src/mame/drivers/stratos.cpp",
1585	1764	MAME_DIR .. "src/mame/machine/mboard.cpp",
	1765	MAME_DIR .. "src/mame/includes/mboard.h",
1586	1766	}
1587	1767
1588	1768	createMESSProjects(_target, _subtarget, "hitachi")
r250251	r250252
1619	1799	files {
1620	1800	MAME_DIR .. "src/mame/drivers/hp16500.cpp",
1621	1801	MAME_DIR .. "src/mame/drivers/hp48.cpp",
	1802	MAME_DIR .. "src/mame/includes/hp48.h",
1622	1803	MAME_DIR .. "src/mame/machine/hp48.cpp",
1623	1804	MAME_DIR .. "src/mame/video/hp48.cpp",
1624	1805	MAME_DIR .. "src/mame/drivers/hp49gp.cpp",
r250251	r250252
1632	1813	createMESSProjects(_target, _subtarget, "hec2hrp")
1633	1814	files {
1634	1815	MAME_DIR .. "src/mame/drivers/hec2hrp.cpp",
	1816	MAME_DIR .. "src/mame/includes/hec2hrp.h",
1635	1817	MAME_DIR .. "src/mame/machine/hec2hrp.cpp",
1636	1818	MAME_DIR .. "src/mame/machine/hecdisk2.cpp",
1637	1819	MAME_DIR .. "src/mame/video/hec2video.cpp",
r250251	r250252
1651	1833	MAME_DIR .. "src/mame/drivers/ipds.cpp",
1652	1834	MAME_DIR .. "src/mame/drivers/isbc.cpp",
1653	1835	MAME_DIR .. "src/mame/machine/isbc_215g.cpp",
	1836	MAME_DIR .. "src/mame/machine/isbc_215g.h",
1654	1837	MAME_DIR .. "src/mame/drivers/rex6000.cpp",
1655	1838	MAME_DIR .. "src/mame/drivers/sdk80.cpp",
1656	1839	MAME_DIR .. "src/mame/drivers/sdk85.cpp",
1657	1840	MAME_DIR .. "src/mame/drivers/sdk86.cpp",
1658	1841	MAME_DIR .. "src/mame/drivers/imds2.cpp",
	1842	MAME_DIR .. "src/mame/includes/imds2.h",
1659	1843	}
1660	1844
1661	1845	createMESSProjects(_target, _subtarget, "imp")
r250251	r250252
1667	1851	createMESSProjects(_target, _subtarget, "interton")
1668	1852	files {
1669	1853	MAME_DIR .. "src/mame/drivers/vc4000.cpp",
	1854	MAME_DIR .. "src/mame/includes/vc4000.h",
1670	1855	MAME_DIR .. "src/mame/audio/vc4000snd.cpp",
	1856	MAME_DIR .. "src/mame/audio/vc4000snd.h",
1671	1857	MAME_DIR .. "src/mame/video/vc4000.cpp",
1672	1858	}
1673	1859
1674	1860	createMESSProjects(_target, _subtarget, "intv")
1675	1861	files {
1676	1862	MAME_DIR .. "src/mame/drivers/intv.cpp",
	1863	MAME_DIR .. "src/mame/includes/intv.h",
1677	1864	MAME_DIR .. "src/mame/machine/intv.cpp",
1678	1865	MAME_DIR .. "src/mame/video/intv.cpp",
1679	1866	MAME_DIR .. "src/mame/video/stic.cpp",
	1867	MAME_DIR .. "src/mame/video/stic.h",
1680	1868	}
1681	1869
1682	1870	createMESSProjects(_target, _subtarget, "isc")
r250251	r250252
1687	1875	createMESSProjects(_target, _subtarget, "kaypro")
1688	1876	files {
1689	1877	MAME_DIR .. "src/mame/drivers/kaypro.cpp",
	1878	MAME_DIR .. "src/mame/includes/kaypro.h",
1690	1879	MAME_DIR .. "src/mame/machine/kaypro.cpp",
1691	1880	MAME_DIR .. "src/mame/machine/kay_kbd.cpp",
1692	1881	MAME_DIR .. "src/mame/video/kaypro.cpp",
r250251	r250252
1700	1889	createMESSProjects(_target, _subtarget, "kyocera")
1701	1890	files {
1702	1891	MAME_DIR .. "src/mame/drivers/kyocera.cpp",
	1892	MAME_DIR .. "src/mame/includes/kyocera.h",
1703	1893	MAME_DIR .. "src/mame/video/kyocera.cpp",
1704	1894	}
1705	1895
1706	1896	createMESSProjects(_target, _subtarget, "luxor")
1707	1897	files {
1708	1898	MAME_DIR .. "src/mame/drivers/abc80.cpp",
	1899	MAME_DIR .. "src/mame/includes/abc80.h",
1709	1900	MAME_DIR .. "src/mame/machine/abc80kb.cpp",
	1901	MAME_DIR .. "src/mame/machine/abc80kb.h",
1710	1902	MAME_DIR .. "src/mame/video/abc80.cpp",
1711	1903	MAME_DIR .. "src/mame/drivers/abc80x.cpp",
	1904	MAME_DIR .. "src/mame/includes/abc80x.h",
1712	1905	MAME_DIR .. "src/mame/video/abc800.cpp",
1713	1906	MAME_DIR .. "src/mame/video/abc802.cpp",
1714	1907	MAME_DIR .. "src/mame/video/abc806.cpp",
1715	1908	MAME_DIR .. "src/mame/drivers/abc1600.cpp",
	1909	MAME_DIR .. "src/mame/includes/abc1600.h",
1716	1910	MAME_DIR .. "src/mame/machine/abc1600mac.cpp",
	1911	MAME_DIR .. "src/mame/machine/abc1600mac.h",
1717	1912	MAME_DIR .. "src/mame/video/abc1600.cpp",
	1913	MAME_DIR .. "src/mame/video/abc1600.h",
1718	1914	}
1719	1915
1720	1916	createMESSProjects(_target, _subtarget, "magnavox")
r250251	r250252
1735	1931	createMESSProjects(_target, _subtarget, "mattel")
1736	1932	files {
1737	1933	MAME_DIR .. "src/mame/drivers/aquarius.cpp",
	1934	MAME_DIR .. "src/mame/includes/aquarius.h",
1738	1935	MAME_DIR .. "src/mame/video/aquarius.cpp",
1739	1936	MAME_DIR .. "src/mame/drivers/juicebox.cpp",
1740	1937	MAME_DIR .. "src/mame/drivers/hyperscan.cpp",
r250251	r250252
1761	1958	createMESSProjects(_target, _subtarget, "memotech")
1762	1959	files {
1763	1960	MAME_DIR .. "src/mame/drivers/mtx.cpp",
	1961	MAME_DIR .. "src/mame/includes/mtx.h",
1764	1962	MAME_DIR .. "src/mame/machine/mtx.cpp",
1765	1963	}
1766	1964
r250251	r250252
1772	1970	createMESSProjects(_target, _subtarget, "microkey")
1773	1971	files {
1774	1972	MAME_DIR .. "src/mame/drivers/primo.cpp",
	1973	MAME_DIR .. "src/mame/includes/primo.h",
1775	1974	MAME_DIR .. "src/mame/machine/primo.cpp",
1776	1975	MAME_DIR .. "src/mame/video/primo.cpp",
1777	1976	}
r250251	r250252
1779	1978	createMESSProjects(_target, _subtarget, "microsoft")
1780	1979	files {
1781	1980	MAME_DIR .. "src/mame/drivers/xbox.cpp",
	1981	MAME_DIR .. "src/mame/includes/xbox.h",
1782	1982	}
1783	1983
1784	1984	createMESSProjects(_target, _subtarget, "mit")
1785	1985	files {
1786	1986	MAME_DIR .. "src/mame/drivers/tx0.cpp",
	1987	MAME_DIR .. "src/mame/includes/tx0.h",
1787	1988	MAME_DIR .. "src/mame/video/crt.cpp",
	1989	MAME_DIR .. "src/mame/video/crt.h",
1788	1990	MAME_DIR .. "src/mame/video/tx0.cpp",
1789	1991	}
1790	1992
r250251	r250252
1810	2012	files {
1811	2013	MAME_DIR .. "src/mame/drivers/microdec.cpp",
1812	2014	MAME_DIR .. "src/mame/drivers/mpz80.cpp",
	2015	MAME_DIR .. "src/mame/includes/mpz80.h",
1813	2016	MAME_DIR .. "src/mame/drivers/tricep.cpp",
1814	2017	}
1815	2018
r250251	r250252
1828	2031	files {
1829	2032	MAME_DIR .. "src/mame/drivers/mkit09.cpp",
1830	2033	MAME_DIR .. "src/mame/drivers/mpf1.cpp",
	2034	MAME_DIR .. "src/mame/includes/mpf1.h",
1831	2035	}
1832	2036
1833	2037	createMESSProjects(_target, _subtarget, "nakajima")
r250251	r250252
1843	2047	createMESSProjects(_target, _subtarget, "ne")
1844	2048	files {
1845	2049	MAME_DIR .. "src/mame/drivers/z80ne.cpp",
	2050	MAME_DIR .. "src/mame/includes/z80ne.h",
1846	2051	MAME_DIR .. "src/mame/machine/z80ne.cpp",
1847	2052	}
1848	2053
r250251	r250252
1850	2055	files {
1851	2056	MAME_DIR .. "src/mame/drivers/apc.cpp",
1852	2057	MAME_DIR .. "src/mame/drivers/pce.cpp",
	2058	MAME_DIR .. "src/mame/includes/pce.h",
1853	2059	MAME_DIR .. "src/mame/machine/pce.cpp",
1854	2060	MAME_DIR .. "src/mame/machine/pce_cd.cpp",
	2061	MAME_DIR .. "src/mame/machine/pce_cd.h",
1855	2062	MAME_DIR .. "src/mame/drivers/pcfx.cpp",
1856	2063	MAME_DIR .. "src/mame/drivers/pc6001.cpp",
1857	2064	MAME_DIR .. "src/mame/drivers/pc8401a.cpp",
	2065	MAME_DIR .. "src/mame/includes/pc8401a.h",
1858	2066	MAME_DIR .. "src/mame/video/pc8401a.cpp",
1859	2067	MAME_DIR .. "src/mame/drivers/pc8001.cpp",
	2068	MAME_DIR .. "src/mame/includes/pc8001.h",
1860	2069	MAME_DIR .. "src/mame/drivers/pc8801.cpp",
1861	2070	MAME_DIR .. "src/mame/drivers/pc88va.cpp",
1862	2071	MAME_DIR .. "src/mame/drivers/pc100.cpp",
1863	2072	MAME_DIR .. "src/mame/drivers/pc9801.cpp",
1864	2073	MAME_DIR .. "src/mame/machine/pc9801_26.cpp",
	2074	MAME_DIR .. "src/mame/machine/pc9801_26.h",
1865	2075	MAME_DIR .. "src/mame/machine/pc9801_86.cpp",
	2076	MAME_DIR .. "src/mame/machine/pc9801_86.h",
1866	2077	MAME_DIR .. "src/mame/machine/pc9801_118.cpp",
	2078	MAME_DIR .. "src/mame/machine/pc9801_118.h",
1867	2079	MAME_DIR .. "src/mame/machine/pc9801_cbus.cpp",
	2080	MAME_DIR .. "src/mame/machine/pc9801_cbus.h",
1868	2081	MAME_DIR .. "src/mame/machine/pc9801_kbd.cpp",
	2082	MAME_DIR .. "src/mame/machine/pc9801_kbd.h",
1869	2083	MAME_DIR .. "src/mame/drivers/tk80bs.cpp",
1870	2084	MAME_DIR .. "src/mame/drivers/hh_ucom4.cpp",
	2085	MAME_DIR .. "src/mame/includes/hh_ucom4.h",
1871	2086	}
1872	2087
1873	2088	createMESSProjects(_target, _subtarget, "netronic")
1874	2089	files {
1875	2090	MAME_DIR .. "src/mame/drivers/elf.cpp",
	2091	MAME_DIR .. "src/mame/includes/elf.h",
1876	2092	MAME_DIR .. "src/mame/drivers/exp85.cpp",
	2093	MAME_DIR .. "src/mame/includes/exp85.h",
1877	2094	}
1878	2095
1879	2096	createMESSProjects(_target, _subtarget, "next")
1880	2097	files {
1881	2098	MAME_DIR .. "src/mame/drivers/next.cpp",
	2099	MAME_DIR .. "src/mame/includes/next.h",
1882	2100	MAME_DIR .. "src/mame/machine/nextkbd.cpp",
	2101	MAME_DIR .. "src/mame/machine/nextkbd.h",
1883	2102	MAME_DIR .. "src/mame/machine/nextmo.cpp",
	2103	MAME_DIR .. "src/mame/machine/nextmo.h",
1884	2104	}
1885	2105
1886	2106	createMESSProjects(_target, _subtarget, "nintendo")
1887	2107	files {
1888	2108	MAME_DIR .. "src/mame/drivers/gb.cpp",
	2109	MAME_DIR .. "src/mame/includes/gb.h",
1889	2110	MAME_DIR .. "src/mame/audio/gb.cpp",
	2111	MAME_DIR .. "src/mame/audio/gb.h",
1890	2112	MAME_DIR .. "src/mame/machine/gb.cpp",
1891	2113	MAME_DIR .. "src/mame/video/gb_lcd.cpp",
	2114	MAME_DIR .. "src/mame/video/gb_lcd.h",
1892	2115	MAME_DIR .. "src/mame/drivers/gba.cpp",
	2116	MAME_DIR .. "src/mame/includes/gba.h",
1893	2117	MAME_DIR .. "src/mame/video/gba.cpp",
1894	2118	MAME_DIR .. "src/mame/drivers/n64.cpp",
	2119	MAME_DIR .. "src/mame/includes/n64.h",
1895	2120	MAME_DIR .. "src/mame/drivers/nes.cpp",
	2121	MAME_DIR .. "src/mame/includes/nes.h",
1896	2122	MAME_DIR .. "src/mame/machine/nes.cpp",
1897	2123	MAME_DIR .. "src/mame/video/nes.cpp",
1898	2124	MAME_DIR .. "src/mame/drivers/pokemini.cpp",
1899	2125	MAME_DIR .. "src/mame/drivers/snes.cpp",
	2126	MAME_DIR .. "src/mame/includes/snes.h",
1900	2127	MAME_DIR .. "src/mame/machine/snescx4.cpp",
	2128	MAME_DIR .. "src/mame/machine/snescx4.h",
	2129	MAME_DIR .. "src/mame/machine/cx4data.inc",
	2130	MAME_DIR .. "src/mame/machine/cx4fn.inc",
	2131	MAME_DIR .. "src/mame/machine/cx4oam.inc",
	2132	MAME_DIR .. "src/mame/machine/cx4ops.inc",
1901	2133	MAME_DIR .. "src/mame/drivers/vboy.cpp",
1902	2134	MAME_DIR .. "src/mame/audio/vboy.cpp",
	2135	MAME_DIR .. "src/mame/audio/vboy.h",
1903	2136	}
1904	2137
1905	2138	createMESSProjects(_target, _subtarget, "nokia")
1906	2139	files {
1907	2140	MAME_DIR .. "src/mame/drivers/mikromik.cpp",
	2141	MAME_DIR .. "src/mame/includes/mikromik.h",
1908	2142	MAME_DIR .. "src/mame/machine/mm1kb.cpp",
	2143	MAME_DIR .. "src/mame/machine/mm1kb.h",
1909	2144	MAME_DIR .. "src/mame/video/mikromik.cpp",
1910	2145	}
1911	2146
r250251	r250252
1919	2154	MAME_DIR .. "src/mame/drivers/mk1.cpp",
1920	2155	MAME_DIR .. "src/mame/drivers/mk2.cpp",
1921	2156	MAME_DIR .. "src/mame/drivers/ssystem3.cpp",
	2157	MAME_DIR .. "src/mame/includes/ssystem3.h",
1922	2158	MAME_DIR .. "src/mame/video/ssystem3.cpp",
1923	2159	MAME_DIR .. "src/mame/drivers/supercon.cpp",
1924	2160	}
r250251	r250252
1927	2163	files {
1928	2164	MAME_DIR .. "src/mame/drivers/m20.cpp",
1929	2165	MAME_DIR .. "src/mame/machine/m20_kbd.cpp",
	2166	MAME_DIR .. "src/mame/machine/m20_kbd.h",
1930	2167	MAME_DIR .. "src/mame/machine/m20_8086.cpp",
	2168	MAME_DIR .. "src/mame/machine/m20_8086.h",
1931	2169	MAME_DIR .. "src/mame/drivers/m24.cpp",
1932	2170	MAME_DIR .. "src/mame/machine/m24_kbd.cpp",
1933		MAME_DIR .. "src/mame/machine/m24_z8000.cpp"
	2171	MAME_DIR .. "src/mame/machine/m24_kbd.h",
	2172	MAME_DIR .. "src/mame/machine/m24_z8000.cpp",
	2173	MAME_DIR .. "src/mame/machine/m24_z8000.h",
1934	2174	}
1935	2175
1936	2176	createMESSProjects(_target, _subtarget, "olympia")
r250251	r250252
1946	2186	createMESSProjects(_target, _subtarget, "omnibyte")
1947	2187	files {
1948	2188	MAME_DIR .. "src/mame/drivers/msbc1.cpp",
	2189	MAME_DIR .. "src/mame/includes/msbc1.h",
1949	2190	MAME_DIR .. "src/mame/drivers/ob68k1a.cpp",
	2191	MAME_DIR .. "src/mame/includes/ob68k1a.h",
1950	2192	}
1951	2193
1952	2194	createMESSProjects(_target, _subtarget, "orion")
1953	2195	files {
1954	2196	MAME_DIR .. "src/mame/drivers/orion.cpp",
	2197	MAME_DIR .. "src/mame/includes/orion.h",
1955	2198	MAME_DIR .. "src/mame/machine/orion.cpp",
1956	2199	MAME_DIR .. "src/mame/video/orion.cpp",
1957	2200	}
r250251	r250252
1959	2202	createMESSProjects(_target, _subtarget, "osborne")
1960	2203	files {
1961	2204	MAME_DIR .. "src/mame/drivers/osborne1.cpp",
	2205	MAME_DIR .. "src/mame/includes/osborne1.h",
1962	2206	MAME_DIR .. "src/mame/machine/osborne1.cpp",
1963	2207	MAME_DIR .. "src/mame/drivers/osbexec.cpp",
1964	2208	MAME_DIR .. "src/mame/drivers/vixen.cpp",
	2209	MAME_DIR .. "src/mame/includes/vixen.h",
1965	2210	}
1966	2211
1967	2212	createMESSProjects(_target, _subtarget, "osi")
1968	2213	files {
1969	2214	MAME_DIR .. "src/mame/drivers/osi.cpp",
	2215	MAME_DIR .. "src/mame/includes/osi.h",
1970	2216	MAME_DIR .. "src/mame/video/osi.cpp",
1971	2217	}
1972	2218
1973	2219	createMESSProjects(_target, _subtarget, "palm")
1974	2220	files {
1975	2221	MAME_DIR .. "src/mame/drivers/palm.cpp",
	2222	MAME_DIR .. "src/mame/drivers/palm_dbg.inc",
1976	2223	MAME_DIR .. "src/mame/drivers/palmz22.cpp",
1977	2224	}
1978	2225
r250251	r250252
1991	2238	MAME_DIR .. "src/mame/drivers/asst128.cpp",
1992	2239	MAME_DIR .. "src/mame/drivers/europc.cpp",
1993	2240	MAME_DIR .. "src/mame/drivers/genpc.cpp",
	2241	MAME_DIR .. "src/mame/includes/genpc.h",
1994	2242	MAME_DIR .. "src/mame/machine/genpc.cpp",
1995	2243	MAME_DIR .. "src/mame/drivers/ibmpc.cpp",
1996	2244	MAME_DIR .. "src/mame/drivers/ibmpcjr.cpp",
1997	2245	MAME_DIR .. "src/mame/drivers/pc.cpp",
1998	2246	MAME_DIR .. "src/mame/drivers/tandy1t.cpp",
1999	2247	MAME_DIR .. "src/mame/video/pc_t1t.cpp",
	2248	MAME_DIR .. "src/mame/video/pc_t1t.h",
2000	2249	}
2001	2250
2002	2251	createMESSProjects(_target, _subtarget, "pdp1")
2003	2252	files {
2004	2253	MAME_DIR .. "src/mame/drivers/pdp1.cpp",
	2254	MAME_DIR .. "src/mame/includes/pdp1.h",
2005	2255	MAME_DIR .. "src/mame/video/pdp1.cpp",
2006	2256	}
2007	2257
2008	2258	createMESSProjects(_target, _subtarget, "pel")
2009	2259	files {
2010	2260	MAME_DIR .. "src/mame/drivers/galeb.cpp",
	2261	MAME_DIR .. "src/mame/includes/galeb.h",
2011	2262	MAME_DIR .. "src/mame/video/galeb.cpp",
2012	2263	MAME_DIR .. "src/mame/drivers/orao.cpp",
	2264	MAME_DIR .. "src/mame/includes/orao.h",
2013	2265	MAME_DIR .. "src/mame/machine/orao.cpp",
2014	2266	MAME_DIR .. "src/mame/video/orao.cpp",
2015	2267	}
r250251	r250252
2017	2269	createMESSProjects(_target, _subtarget, "philips")
2018	2270	files {
2019	2271	MAME_DIR .. "src/mame/drivers/p2000t.cpp",
	2272	MAME_DIR .. "src/mame/includes/p2000t.h",
2020	2273	MAME_DIR .. "src/mame/machine/p2000t.cpp",
2021	2274	MAME_DIR .. "src/mame/video/p2000m.cpp",
2022	2275	MAME_DIR .. "src/mame/drivers/vg5k.cpp",
r250251	r250252
2025	2278	createMESSProjects(_target, _subtarget, "poly88")
2026	2279	files {
2027	2280	MAME_DIR .. "src/mame/drivers/poly88.cpp",
	2281	MAME_DIR .. "src/mame/includes/poly88.h",
2028	2282	MAME_DIR .. "src/mame/machine/poly88.cpp",
2029	2283	MAME_DIR .. "src/mame/video/poly88.cpp",
2030	2284	}
r250251	r250252
2032	2286	createMESSProjects(_target, _subtarget, "psion")
2033	2287	files {
2034	2288	MAME_DIR .. "src/mame/drivers/psion.cpp",
	2289	MAME_DIR .. "src/mame/includes/psion.h",
2035	2290	MAME_DIR .. "src/mame/machine/psion_pack.cpp",
	2291	MAME_DIR .. "src/mame/machine/psion_pack.h",
2036	2292	}
2037	2293
2038	2294	createMESSProjects(_target, _subtarget, "radio")
r250251	r250252
2040	2296	MAME_DIR .. "src/mame/drivers/apogee.cpp",
2041	2297	MAME_DIR .. "src/mame/drivers/mikrosha.cpp",
2042	2298	MAME_DIR .. "src/mame/drivers/partner.cpp",
	2299	MAME_DIR .. "src/mame/includes/partner.h",
2043	2300	MAME_DIR .. "src/mame/machine/partner.cpp",
2044	2301	MAME_DIR .. "src/mame/drivers/radio86.cpp",
	2302	MAME_DIR .. "src/mame/includes/radio86.h",
2045	2303	MAME_DIR .. "src/mame/machine/radio86.cpp",
2046	2304	}
2047	2305
r250251	r250252
2050	2308	MAME_DIR .. "src/mame/drivers/microkit.cpp",
2051	2309	MAME_DIR .. "src/mame/drivers/studio2.cpp",
2052	2310	MAME_DIR .. "src/mame/drivers/vip.cpp",
	2311	MAME_DIR .. "src/mame/includes/vip.h",
2053	2312	}
2054	2313
2055	2314	createMESSProjects(_target, _subtarget, "regnecentralen")
r250251	r250252
2065	2324	createMESSProjects(_target, _subtarget, "rm")
2066	2325	files {
2067	2326	MAME_DIR .. "src/mame/drivers/rm380z.cpp",
	2327	MAME_DIR .. "src/mame/includes/rm380z.h",
2068	2328	MAME_DIR .. "src/mame/machine/rm380z.cpp",
2069	2329	MAME_DIR .. "src/mame/video/rm380z.cpp",
2070	2330	MAME_DIR .. "src/mame/drivers/rmnimbus.cpp",
	2331	MAME_DIR .. "src/mame/includes/rmnimbus.h",
2071	2332	MAME_DIR .. "src/mame/machine/rmnimbus.cpp",
2072	2333	MAME_DIR .. "src/mame/video/rmnimbus.cpp",
2073	2334	MAME_DIR .. "src/mame/machine/rmnkbd.cpp",
	2335	MAME_DIR .. "src/mame/machine/rmnkbd.h",
2074	2336	}
2075	2337
2076	2338	createMESSProjects(_target, _subtarget, "robotron")
r250251	r250252
2096	2358	createMESSProjects(_target, _subtarget, "rockwell")
2097	2359	files {
2098	2360	MAME_DIR .. "src/mame/drivers/aim65.cpp",
	2361	MAME_DIR .. "src/mame/includes/aim65.h",
2099	2362	MAME_DIR .. "src/mame/machine/aim65.cpp",
2100	2363	MAME_DIR .. "src/mame/drivers/aim65_40.cpp",
2101	2364	}
r250251	r250252
2103	2366	createMESSProjects(_target, _subtarget, "sage")
2104	2367	files {
2105	2368	MAME_DIR .. "src/mame/drivers/sage2.cpp",
	2369	MAME_DIR .. "src/mame/includes/sage2.h",
2106	2370	}
2107	2371
2108	2372	createMESSProjects(_target, _subtarget, "samcoupe")
2109	2373	files {
2110	2374	MAME_DIR .. "src/mame/drivers/samcoupe.cpp",
	2375	MAME_DIR .. "src/mame/includes/samcoupe.h",
2111	2376	MAME_DIR .. "src/mame/machine/samcoupe.cpp",
2112	2377	MAME_DIR .. "src/mame/video/samcoupe.cpp",
2113	2378	}
r250251	r250252
2121	2386	files {
2122	2387	MAME_DIR .. "src/mame/drivers/mbc200.cpp",
2123	2388	MAME_DIR .. "src/mame/drivers/mbc55x.cpp",
	2389	MAME_DIR .. "src/mame/includes/mbc55x.h",
2124	2390	MAME_DIR .. "src/mame/machine/mbc55x.cpp",
2125	2391	MAME_DIR .. "src/mame/video/mbc55x.cpp",
2126	2392	MAME_DIR .. "src/mame/drivers/phc25.cpp",
	2393	MAME_DIR .. "src/mame/includes/phc25.h",
2127	2394	}
2128	2395
2129	2396	createMESSProjects(_target, _subtarget, "sega")
2130	2397	files {
2131	2398	MAME_DIR .. "src/mame/drivers/dccons.cpp",
	2399	MAME_DIR .. "src/mame/includes/dccons.h",
2132	2400	MAME_DIR .. "src/mame/machine/dccons.cpp",
2133	2401	MAME_DIR .. "src/mame/drivers/megadriv.cpp",
	2402	MAME_DIR .. "src/mame/includes/megadriv.h",
	2403	MAME_DIR .. "src/mame/includes/md_cons.h",
2134	2404	MAME_DIR .. "src/mame/drivers/saturn.cpp",
2135	2405	MAME_DIR .. "src/mame/drivers/segapico.cpp",
2136	2406	MAME_DIR .. "src/mame/drivers/sega_sawatte.cpp",
2137	2407	MAME_DIR .. "src/mame/drivers/segapm.cpp",
2138	2408	MAME_DIR .. "src/mame/drivers/sg1000.cpp",
	2409	MAME_DIR .. "src/mame/includes/sg1000.h",
2139	2410	MAME_DIR .. "src/mame/drivers/sms.cpp",
	2411	MAME_DIR .. "src/mame/includes/sms.h",
2140	2412	MAME_DIR .. "src/mame/machine/sms.cpp",
2141	2413	MAME_DIR .. "src/mame/drivers/svmu.cpp",
2142	2414	MAME_DIR .. "src/mame/machine/mega32x.cpp",
	2415	MAME_DIR .. "src/mame/machine/mega32x.h",
2143	2416	MAME_DIR .. "src/mame/machine/megacd.cpp",
	2417	MAME_DIR .. "src/mame/machine/megacd.h",
2144	2418	MAME_DIR .. "src/mame/machine/megacdcd.cpp",
	2419	MAME_DIR .. "src/mame/machine/megacdcd.h",
2145	2420	}
2146	2421
2147	2422	createMESSProjects(_target, _subtarget, "sgi")
2148	2423	files {
2149	2424	MAME_DIR .. "src/mame/machine/sgi.cpp",
	2425	MAME_DIR .. "src/mame/machine/sgi.h",
2150	2426	MAME_DIR .. "src/mame/drivers/sgi_ip2.cpp",
2151	2427	MAME_DIR .. "src/mame/drivers/sgi_ip6.cpp",
2152	2428	MAME_DIR .. "src/mame/drivers/ip20.cpp",
2153	2429	MAME_DIR .. "src/mame/drivers/ip22.cpp",
2154	2430	MAME_DIR .. "src/mame/video/newport.cpp",
	2431	MAME_DIR .. "src/mame/video/newport.h",
2155	2432	}
2156	2433
2157	2434	createMESSProjects(_target, _subtarget, "sharp")
r250251	r250252
2159	2436	MAME_DIR .. "src/mame/drivers/hh_sm510.cpp",
2160	2437	MAME_DIR .. "src/mame/video/mz700.cpp",
2161	2438	MAME_DIR .. "src/mame/drivers/mz700.cpp",
	2439	MAME_DIR .. "src/mame/includes/mz700.h",
2162	2440	MAME_DIR .. "src/mame/drivers/pc1500.cpp",
2163	2441	MAME_DIR .. "src/mame/drivers/pocketc.cpp",
	2442	MAME_DIR .. "src/mame/includes/pocketc.h",
2164	2443	MAME_DIR .. "src/mame/video/pc1401.cpp",
2165	2444	MAME_DIR .. "src/mame/machine/pc1401.cpp",
	2445	MAME_DIR .. "src/mame/includes/pc1401.h",
2166	2446	MAME_DIR .. "src/mame/video/pc1403.cpp",
2167	2447	MAME_DIR .. "src/mame/machine/pc1403.cpp",
	2448	MAME_DIR .. "src/mame/includes/pc1403.h",
2168	2449	MAME_DIR .. "src/mame/video/pc1350.cpp",
2169	2450	MAME_DIR .. "src/mame/machine/pc1350.cpp",
	2451	MAME_DIR .. "src/mame/includes/pc1350.h",
2170	2452	MAME_DIR .. "src/mame/video/pc1251.cpp",
2171	2453	MAME_DIR .. "src/mame/machine/pc1251.cpp",
	2454	MAME_DIR .. "src/mame/includes/pc1251.h",
2172	2455	MAME_DIR .. "src/mame/video/pocketc.cpp",
2173	2456	MAME_DIR .. "src/mame/machine/mz700.cpp",
2174	2457	MAME_DIR .. "src/mame/drivers/x68k.cpp",
	2458	MAME_DIR .. "src/mame/includes/x68k.h",
2175	2459	MAME_DIR .. "src/mame/video/x68k.cpp",
2176	2460	MAME_DIR .. "src/mame/machine/x68k_hdc.cpp",
	2461	MAME_DIR .. "src/mame/machine/x68k_hdc.h",
2177	2462	MAME_DIR .. "src/mame/machine/x68k_kbd.cpp",
	2463	MAME_DIR .. "src/mame/machine/x68k_kbd.h",
2178	2464	MAME_DIR .. "src/mame/drivers/mz80.cpp",
	2465	MAME_DIR .. "src/mame/includes/mz80.h",
2179	2466	MAME_DIR .. "src/mame/video/mz80.cpp",
2180	2467	MAME_DIR .. "src/mame/machine/mz80.cpp",
2181	2468	MAME_DIR .. "src/mame/drivers/mz2000.cpp",
2182	2469	MAME_DIR .. "src/mame/drivers/x1.cpp",
	2470	MAME_DIR .. "src/mame/includes/x1.h",
2183	2471	MAME_DIR .. "src/mame/machine/x1.cpp",
2184	2472	MAME_DIR .. "src/mame/drivers/x1twin.cpp",
2185	2473	MAME_DIR .. "src/mame/drivers/mz2500.cpp",
2186	2474	MAME_DIR .. "src/mame/drivers/mz3500.cpp",
2187	2475	MAME_DIR .. "src/mame/drivers/pce220.cpp",
2188	2476	MAME_DIR .. "src/mame/machine/pce220_ser.cpp",
	2477	MAME_DIR .. "src/mame/machine/pce220_ser.h",
2189	2478	MAME_DIR .. "src/mame/drivers/mz6500.cpp",
2190	2479	MAME_DIR .. "src/mame/drivers/zaurus.cpp",
	2480	MAME_DIR .. "src/mame/machine/pxa255.h",
2191	2481	}
2192	2482
2193	2483	createMESSProjects(_target, _subtarget, "sinclair")
r250251	r250252
2196	2486	MAME_DIR .. "src/mame/video/timex.cpp",
2197	2487	MAME_DIR .. "src/mame/video/zx.cpp",
2198	2488	MAME_DIR .. "src/mame/drivers/zx.cpp",
	2489	MAME_DIR .. "src/mame/includes/zx.h",
2199	2490	MAME_DIR .. "src/mame/machine/zx.cpp",
2200	2491	MAME_DIR .. "src/mame/drivers/spectrum.cpp",
	2492	MAME_DIR .. "src/mame/includes/spectrum.h",
2201	2493	MAME_DIR .. "src/mame/drivers/spec128.cpp",
2202	2494	MAME_DIR .. "src/mame/drivers/timex.cpp",
2203	2495	MAME_DIR .. "src/mame/drivers/specpls3.cpp",
r250251	r250252
2205	2497	MAME_DIR .. "src/mame/drivers/atm.cpp",
2206	2498	MAME_DIR .. "src/mame/drivers/pentagon.cpp",
2207	2499	MAME_DIR .. "src/mame/machine/beta.cpp",
	2500	MAME_DIR .. "src/mame/machine/beta.h",
2208	2501	MAME_DIR .. "src/mame/machine/spec_snqk.cpp",
	2502	MAME_DIR .. "src/mame/machine/spec_snqk.h",
2209	2503	MAME_DIR .. "src/mame/drivers/ql.cpp",
	2504	MAME_DIR .. "src/mame/includes/ql.h",
2210	2505	MAME_DIR .. "src/mame/machine/qimi.cpp",
	2506	MAME_DIR .. "src/mame/machine/qimi.h",
2211	2507	MAME_DIR .. "src/mame/video/zx8301.cpp",
	2508	MAME_DIR .. "src/mame/video/zx8301.h",
2212	2509	MAME_DIR .. "src/mame/machine/zx8302.cpp",
	2510	MAME_DIR .. "src/mame/machine/zx8302.h",
2213	2511	}
2214	2512
2215	2513	createMESSProjects(_target, _subtarget, "siemens")
2216	2514	files {
2217	2515	MAME_DIR .. "src/mame/drivers/pcd.cpp",
2218	2516	MAME_DIR .. "src/mame/machine/pcd_kbd.cpp",
	2517	MAME_DIR .. "src/mame/machine/pcd_kbd.h",
2219	2518	MAME_DIR .. "src/mame/video/pcd.cpp",
	2519	MAME_DIR .. "src/mame/video/pcd.h",
2220	2520	}
2221	2521
2222	2522	createMESSProjects(_target, _subtarget, "slicer")
r250251	r250252
2229	2529	MAME_DIR .. "src/mame/drivers/ng_aes.cpp",
2230	2530	MAME_DIR .. "src/mame/drivers/ngp.cpp",
2231	2531	MAME_DIR .. "src/mame/video/k1ge.cpp",
	2532	MAME_DIR .. "src/mame/video/k1ge.h",
2232	2533	}
2233	2534
2234	2535	createMESSProjects(_target, _subtarget, "sony")
r250251	r250252
2236	2537	MAME_DIR .. "src/mame/drivers/pockstat.cpp",
2237	2538	MAME_DIR .. "src/mame/drivers/psx.cpp",
2238	2539	MAME_DIR .. "src/mame/machine/psxcd.cpp",
	2540	MAME_DIR .. "src/mame/machine/psxcd.h",
2239	2541	MAME_DIR .. "src/mame/drivers/pve500.cpp",
2240	2542	MAME_DIR .. "src/mame/drivers/smc777.cpp",
2241	2543	}
r250251	r250252
2243	2545	createMESSProjects(_target, _subtarget, "sord")
2244	2546	files {
2245	2547	MAME_DIR .. "src/mame/drivers/m5.cpp",
	2548	MAME_DIR .. "src/mame/includes/m5.h",
2246	2549	}
2247	2550
2248	2551	createMESSProjects(_target, _subtarget, "special")
2249	2552	files {
2250	2553	MAME_DIR .. "src/mame/drivers/special.cpp",
	2554	MAME_DIR .. "src/mame/includes/special.h",
2251	2555	MAME_DIR .. "src/mame/audio/specimx_snd.cpp",
	2556	MAME_DIR .. "src/mame/audio/specimx_snd.h",
2252	2557	MAME_DIR .. "src/mame/machine/special.cpp",
2253	2558	MAME_DIR .. "src/mame/video/special.cpp",
2254	2559	}
r250251	r250252
2264	2569	createMESSProjects(_target, _subtarget, "svi")
2265	2570	files {
2266	2571	MAME_DIR .. "src/mame/drivers/svi318.cpp",
	2572	MAME_DIR .. "src/mame/includes/svi318.h",
2267	2573	MAME_DIR .. "src/mame/machine/svi318.cpp",
2268	2574	}
2269	2575
2270	2576	createMESSProjects(_target, _subtarget, "svision")
2271	2577	files {
2272	2578	MAME_DIR .. "src/mame/drivers/svision.cpp",
	2579	MAME_DIR .. "src/mame/includes/svision.h",
2273	2580	MAME_DIR .. "src/mame/audio/svis_snd.cpp",
	2581	MAME_DIR .. "src/mame/audio/svis_snd.h",
2274	2582	}
2275	2583
2276	2584	createMESSProjects(_target, _subtarget, "swtpc09")
2277	2585	files {
2278	2586	MAME_DIR .. "src/mame/drivers/swtpc09.cpp",
	2587	MAME_DIR .. "src/mame/includes/swtpc09.h",
2279	2588	MAME_DIR .. "src/mame/machine/swtpc09.cpp",
2280	2589	}
2281	2590
r250251	r250252
2292	2601	createMESSProjects(_target, _subtarget, "tandberg")
2293	2602	files {
2294	2603	MAME_DIR .. "src/mame/drivers/tdv2324.cpp",
	2604	MAME_DIR .. "src/mame/includes/tdv2324.h",
2295	2605	}
2296	2606
2297	2607	createMESSProjects(_target, _subtarget, "tangerin")
2298	2608	files {
2299	2609	MAME_DIR .. "src/mame/drivers/microtan.cpp",
	2610	MAME_DIR .. "src/mame/includes/microtan.h",
2300	2611	MAME_DIR .. "src/mame/machine/microtan.cpp",
2301	2612	MAME_DIR .. "src/mame/video/microtan.cpp",
2302	2613	MAME_DIR .. "src/mame/drivers/oric.cpp",
r250251	r250252
2305	2616	createMESSProjects(_target, _subtarget, "tatung")
2306	2617	files {
2307	2618	MAME_DIR .. "src/mame/drivers/einstein.cpp",
	2619	MAME_DIR .. "src/mame/includes/einstein.h",
2308	2620	MAME_DIR .. "src/mame/machine/einstein.cpp",
2309	2621	}
2310	2622
2311	2623	createMESSProjects(_target, _subtarget, "teamconc")
2312	2624	files {
2313	2625	MAME_DIR .. "src/mame/drivers/comquest.cpp",
	2626	MAME_DIR .. "src/mame/includes/comquest.h",
2314	2627	MAME_DIR .. "src/mame/video/comquest.cpp",
2315	2628	}
2316	2629
2317	2630	createMESSProjects(_target, _subtarget, "tektroni")
2318	2631	files {
2319	2632	MAME_DIR .. "src/mame/drivers/tek405x.cpp",
	2633	MAME_DIR .. "src/mame/includes/tek405x.h",
2320	2634	MAME_DIR .. "src/mame/drivers/tek410x.cpp",
2321	2635	}
2322	2636
2323	2637	createMESSProjects(_target, _subtarget, "telenova")
2324	2638	files {
2325	2639	MAME_DIR .. "src/mame/drivers/compis.cpp",
	2640	MAME_DIR .. "src/mame/includes/compis.h",
2326	2641	MAME_DIR .. "src/mame/machine/compiskb.cpp",
	2642	MAME_DIR .. "src/mame/machine/compiskb.h",
2327	2643	}
2328	2644
2329	2645	createMESSProjects(_target, _subtarget, "telercas")
2330	2646	files {
2331	2647	MAME_DIR .. "src/mame/drivers/tmc1800.cpp",
	2648	MAME_DIR .. "src/mame/includes/tmc1800.h",
2332	2649	MAME_DIR .. "src/mame/video/tmc1800.cpp",
2333	2650	MAME_DIR .. "src/mame/drivers/tmc600.cpp",
	2651	MAME_DIR .. "src/mame/includes/tmc600.h",
2334	2652	MAME_DIR .. "src/mame/video/tmc600.cpp",
2335	2653	MAME_DIR .. "src/mame/drivers/tmc2000e.cpp",
	2654	MAME_DIR .. "src/mame/includes/tmc2000e.h",
2336	2655	}
2337	2656
2338	2657	createMESSProjects(_target, _subtarget, "televideo")
r250251	r250252
2351	2670	createMESSProjects(_target, _subtarget, "tesla")
2352	2671	files {
2353	2672	MAME_DIR .. "src/mame/drivers/ondra.cpp",
	2673	MAME_DIR .. "src/mame/includes/ondra.h",
2354	2674	MAME_DIR .. "src/mame/machine/ondra.cpp",
2355	2675	MAME_DIR .. "src/mame/video/ondra.cpp",
2356	2676	MAME_DIR .. "src/mame/drivers/pmd85.cpp",
	2677	MAME_DIR .. "src/mame/includes/pmd85.h",
2357	2678	MAME_DIR .. "src/mame/machine/pmd85.cpp",
2358	2679	MAME_DIR .. "src/mame/drivers/pmi80.cpp",
2359	2680	MAME_DIR .. "src/mame/drivers/sapi1.cpp",
r250251	r250252
2368	2689	createMESSProjects(_target, _subtarget, "thomson")
2369	2690	files {
2370	2691	MAME_DIR .. "src/mame/drivers/thomson.cpp",
	2692	MAME_DIR .. "src/mame/includes/thomson.h",
2371	2693	MAME_DIR .. "src/mame/machine/thomson.cpp",
2372	2694	MAME_DIR .. "src/mame/machine/thomflop.cpp",
	2695	MAME_DIR .. "src/mame/machine/thomflop.h",
2373	2696	MAME_DIR .. "src/mame/video/thomson.cpp",
2374	2697	}
2375	2698
2376	2699	createMESSProjects(_target, _subtarget, "ti")
2377	2700	files {
2378	2701	MAME_DIR .. "src/mame/drivers/avigo.cpp",
	2702	MAME_DIR .. "src/mame/includes/avigo.h",
2379	2703	MAME_DIR .. "src/mame/video/avigo.cpp",
2380	2704	MAME_DIR .. "src/mame/drivers/cc40.cpp",
2381	2705	MAME_DIR .. "src/mame/drivers/evmbug.cpp",
r250251	r250252
2385	2709	MAME_DIR .. "src/mame/drivers/tispeak.cpp",
2386	2710	MAME_DIR .. "src/mame/drivers/ti74.cpp",
2387	2711	MAME_DIR .. "src/mame/drivers/ti85.cpp",
	2712	MAME_DIR .. "src/mame/includes/ti85.h",
2388	2713	MAME_DIR .. "src/mame/machine/ti85.cpp",
2389	2714	MAME_DIR .. "src/mame/video/ti85.cpp",
2390	2715	MAME_DIR .. "src/mame/drivers/ti89.cpp",
	2716	MAME_DIR .. "src/mame/includes/ti89.h",
2391	2717	MAME_DIR .. "src/mame/drivers/ti99_2.cpp",
2392	2718	MAME_DIR .. "src/mame/drivers/ti99_4x.cpp",
2393	2719	MAME_DIR .. "src/mame/drivers/ti99_4p.cpp",
r250251	r250252
2396	2722	MAME_DIR .. "src/mame/drivers/ti990_10.cpp",
2397	2723	MAME_DIR .. "src/mame/drivers/tm990189.cpp",
2398	2724	MAME_DIR .. "src/mame/video/733_asr.cpp",
	2725	MAME_DIR .. "src/mame/video/733_asr.h",
2399	2726	MAME_DIR .. "src/mame/video/911_vdt.cpp",
	2727	MAME_DIR .. "src/mame/video/911_vdt.h",
	2728	MAME_DIR .. "src/mame/video/911_chr.h",
	2729	MAME_DIR .. "src/mame/video/911_key.h",
2400	2730	MAME_DIR .. "src/mame/drivers/hh_tms1k.cpp",
	2731	MAME_DIR .. "src/mame/includes/hh_tms1k.h",
2401	2732	}
2402	2733
2403	2734	createMESSProjects(_target, _subtarget, "tiger")
2404	2735	files {
2405	2736	MAME_DIR .. "src/mame/drivers/gamecom.cpp",
	2737	MAME_DIR .. "src/mame/includes/gamecom.h",
2406	2738	MAME_DIR .. "src/mame/machine/gamecom.cpp",
2407	2739	MAME_DIR .. "src/mame/video/gamecom.cpp",
2408	2740	}
r250251	r250252
2411	2743	files {
2412	2744	MAME_DIR .. "src/mame/drivers/gizmondo.cpp",
2413	2745	MAME_DIR .. "src/mame/machine/docg3.cpp",
	2746	MAME_DIR .. "src/mame/machine/docg3.h",
2414	2747	}
2415	2748
2416	2749	createMESSProjects(_target, _subtarget, "tiki")
2417	2750	files {
2418	2751	MAME_DIR .. "src/mame/drivers/tiki100.cpp",
	2752	MAME_DIR .. "src/mame/includes/tiki100.h",
2419	2753	}
2420	2754
2421	2755	createMESSProjects(_target, _subtarget, "tomy")
r250251	r250252
2426	2760	createMESSProjects(_target, _subtarget, "toshiba")
2427	2761	files {
2428	2762	MAME_DIR .. "src/mame/drivers/pasopia.cpp",
	2763	MAME_DIR .. "src/mame/includes/pasopia.h",
2429	2764	MAME_DIR .. "src/mame/drivers/pasopia7.cpp",
2430	2765	MAME_DIR .. "src/mame/drivers/paso1600.cpp",
2431	2766	}
r250251	r250252
2449	2784	createMESSProjects(_target, _subtarget, "trs")
2450	2785	files {
2451	2786	MAME_DIR .. "src/mame/drivers/coco12.cpp",
	2787	MAME_DIR .. "src/mame/includes/coco12.h",
2452	2788	MAME_DIR .. "src/mame/drivers/coco3.cpp",
	2789	MAME_DIR .. "src/mame/includes/coco3.h",
2453	2790	MAME_DIR .. "src/mame/drivers/dragon.cpp",
	2791	MAME_DIR .. "src/mame/includes/dragon.h",
2454	2792	MAME_DIR .. "src/mame/drivers/mc10.cpp",
2455	2793	MAME_DIR .. "src/mame/machine/6883sam.cpp",
	2794	MAME_DIR .. "src/mame/machine/6883sam.h",
2456	2795	MAME_DIR .. "src/mame/machine/coco.cpp",
	2796	MAME_DIR .. "src/mame/includes/coco.h",
2457	2797	MAME_DIR .. "src/mame/machine/coco12.cpp",
2458	2798	MAME_DIR .. "src/mame/machine/coco3.cpp",
2459	2799	MAME_DIR .. "src/mame/machine/coco_vhd.cpp",
	2800	MAME_DIR .. "src/mame/machine/coco_vhd.h",
2460	2801	MAME_DIR .. "src/mame/machine/dragon.cpp",
2461	2802	MAME_DIR .. "src/mame/machine/dgnalpha.cpp",
	2803	MAME_DIR .. "src/mame/includes/dgnalpha.h",
2462	2804	MAME_DIR .. "src/mame/video/gime.cpp",
	2805	MAME_DIR .. "src/mame/video/gime.h",
2463	2806	MAME_DIR .. "src/mame/drivers/trs80.cpp",
	2807	MAME_DIR .. "src/mame/includes/trs80.h",
2464	2808	MAME_DIR .. "src/mame/machine/trs80.cpp",
2465	2809	MAME_DIR .. "src/mame/video/trs80.cpp",
2466	2810	MAME_DIR .. "src/mame/drivers/trs80m2.cpp",
	2811	MAME_DIR .. "src/mame/includes/trs80m2.h",
2467	2812	MAME_DIR .. "src/mame/machine/trs80m2kb.cpp",
	2813	MAME_DIR .. "src/mame/machine/trs80m2kb.h",
2468	2814	MAME_DIR .. "src/mame/drivers/tandy2k.cpp",
	2815	MAME_DIR .. "src/mame/includes/tandy2k.h",
2469	2816	MAME_DIR .. "src/mame/machine/tandy2kb.cpp",
	2817	MAME_DIR .. "src/mame/machine/tandy2kb.h",
2470	2818	}
2471	2819
2472	2820	createMESSProjects(_target, _subtarget, "ultimachine")
r250251	r250252
2483	2831	files {
2484	2832	MAME_DIR .. "src/mame/drivers/unichamp.cpp",
2485	2833	MAME_DIR .. "src/mame/video/gic.cpp",
	2834	MAME_DIR .. "src/mame/video/gic.h",
2486	2835	MAME_DIR .. "src/mame/video/gic.cpp",
	2836	MAME_DIR .. "src/mame/video/gic.h",
2487	2837	}
2488	2838
2489	2839
r250251	r250252
2496	2846	files {
2497	2847	MAME_DIR .. "src/mame/drivers/chessmst.cpp",
2498	2848	MAME_DIR .. "src/mame/drivers/kc.cpp",
	2849	MAME_DIR .. "src/mame/includes/kc.h",
2499	2850	MAME_DIR .. "src/mame/machine/kc.cpp",
2500	2851	MAME_DIR .. "src/mame/machine/kc_keyb.cpp",
	2852	MAME_DIR .. "src/mame/machine/kc_keyb.h",
2501	2853	MAME_DIR .. "src/mame/video/kc.cpp",
2502	2854	MAME_DIR .. "src/mame/drivers/lc80.cpp",
	2855	MAME_DIR .. "src/mame/includes/lc80.h",
2503	2856	MAME_DIR .. "src/mame/drivers/mc80.cpp",
	2857	MAME_DIR .. "src/mame/includes/mc80.h",
2504	2858	MAME_DIR .. "src/mame/machine/mc80.cpp",
2505	2859	MAME_DIR .. "src/mame/video/mc80.cpp",
2506	2860	MAME_DIR .. "src/mame/drivers/poly880.cpp",
	2861	MAME_DIR .. "src/mame/includes/poly880.h",
2507	2862	MAME_DIR .. "src/mame/drivers/sc1.cpp",
2508	2863	MAME_DIR .. "src/mame/drivers/sc2.cpp",
2509	2864	}
r250251	r250252
2511	2866	createMESSProjects(_target, _subtarget, "vidbrain")
2512	2867	files {
2513	2868	MAME_DIR .. "src/mame/drivers/vidbrain.cpp",
	2869	MAME_DIR .. "src/mame/includes/vidbrain.h",
2514	2870	MAME_DIR .. "src/mame/video/uv201.cpp",
	2871	MAME_DIR .. "src/mame/video/uv201.h",
2515	2872	}
2516	2873
2517	2874	createMESSProjects(_target, _subtarget, "videoton")
2518	2875	files {
2519	2876	MAME_DIR .. "src/mame/drivers/tvc.cpp",
2520	2877	MAME_DIR .. "src/mame/audio/tvc_snd.cpp",
	2878	MAME_DIR .. "src/mame/audio/tvc_snd.h",
2521	2879	}
2522	2880
2523	2881	createMESSProjects(_target, _subtarget, "visual")
2524	2882	files {
2525	2883	MAME_DIR .. "src/mame/drivers/v1050.cpp",
	2884	MAME_DIR .. "src/mame/includes/v1050.h",
2526	2885	MAME_DIR .. "src/mame/machine/v1050kb.cpp",
	2886	MAME_DIR .. "src/mame/machine/v1050kb.h",
2527	2887	MAME_DIR .. "src/mame/video/v1050.cpp",
2528	2888	}
2529	2889
r250251	r250252
2536	2896	createMESSProjects(_target, _subtarget, "vtech")
2537	2897	files {
2538	2898	MAME_DIR .. "src/mame/drivers/crvision.cpp",
	2899	MAME_DIR .. "src/mame/includes/crvision.h",
2539	2900	MAME_DIR .. "src/mame/drivers/geniusiq.cpp",
2540	2901	MAME_DIR .. "src/mame/drivers/laser3k.cpp",
2541	2902	MAME_DIR .. "src/mame/drivers/lcmate2.cpp",
2542	2903	MAME_DIR .. "src/mame/drivers/pc4.cpp",
	2904	MAME_DIR .. "src/mame/includes/pc4.h",
2543	2905	MAME_DIR .. "src/mame/video/pc4.cpp",
2544	2906	MAME_DIR .. "src/mame/drivers/pc2000.cpp",
2545	2907	MAME_DIR .. "src/mame/drivers/pitagjr.cpp",
2546	2908	MAME_DIR .. "src/mame/drivers/prestige.cpp",
2547	2909	MAME_DIR .. "src/mame/drivers/vtech1.cpp",
2548	2910	MAME_DIR .. "src/mame/drivers/vtech2.cpp",
	2911	MAME_DIR .. "src/mame/includes/vtech2.h",
2549	2912	MAME_DIR .. "src/mame/machine/vtech2.cpp",
2550	2913	MAME_DIR .. "src/mame/video/vtech2.cpp",
2551	2914	MAME_DIR .. "src/mame/drivers/socrates.cpp",
2552	2915	MAME_DIR .. "src/mame/audio/socrates.cpp",
	2916	MAME_DIR .. "src/mame/audio/socrates.h",
2553	2917	}
2554	2918
2555	2919	createMESSProjects(_target, _subtarget, "wang")
2556	2920	files {
2557	2921	MAME_DIR .. "src/mame/drivers/wangpc.cpp",
	2922	MAME_DIR .. "src/mame/includes/wangpc.h",
2558	2923	MAME_DIR .. "src/mame/machine/wangpckb.cpp",
	2924	MAME_DIR .. "src/mame/machine/wangpckb.h",
2559	2925	}
2560	2926
2561	2927	createMESSProjects(_target, _subtarget, "wavemate")
2562	2928	files {
2563	2929	MAME_DIR .. "src/mame/drivers/bullet.cpp",
	2930	MAME_DIR .. "src/mame/includes/bullet.h",
2564	2931	MAME_DIR .. "src/mame/drivers/jupiter.cpp",
	2932	MAME_DIR .. "src/mame/includes/jupiter.h",
2565	2933	}
2566	2934
2567	2935	createMESSProjects(_target, _subtarget, "xerox")
2568	2936	files {
2569	2937	MAME_DIR .. "src/mame/drivers/xerox820.cpp",
	2938	MAME_DIR .. "src/mame/includes/xerox820.h",
2570	2939	MAME_DIR .. "src/mame/machine/x820kb.cpp",
	2940	MAME_DIR .. "src/mame/machine/x820kb.h",
2571	2941	MAME_DIR .. "src/mame/drivers/bigbord2.cpp",
2572	2942	MAME_DIR .. "src/mame/drivers/alto2.cpp",
2573	2943	}
r250251	r250252
2575	2945	createMESSProjects(_target, _subtarget, "xussrpc")
2576	2946	files {
2577	2947	MAME_DIR .. "src/mame/drivers/ec184x.cpp",
	2948	MAME_DIR .. "src/mame/includes/ec184x.h",
2578	2949	MAME_DIR .. "src/mame/drivers/iskr103x.cpp",
2579	2950	MAME_DIR .. "src/mame/drivers/mc1502.cpp",
	2951	MAME_DIR .. "src/mame/machine/kb_7007_3.h",
	2952	MAME_DIR .. "src/mame/includes/mc1502.h",
2580	2953	MAME_DIR .. "src/mame/drivers/poisk1.cpp",
	2954	MAME_DIR .. "src/mame/machine/kb_poisk1.h",
	2955	MAME_DIR .. "src/mame/includes/poisk1.h",
2581	2956	MAME_DIR .. "src/mame/video/poisk1.cpp",
	2957	MAME_DIR .. "src/mame/video/poisk1.h",
2582	2958	}
2583	2959
2584	2960	createMESSProjects(_target, _subtarget, "yamaha")
r250251	r250252
2606	2982	createMESSProjects(_target, _subtarget, "zvt")
2607	2983	files {
2608	2984	MAME_DIR .. "src/mame/drivers/pp01.cpp",
	2985	MAME_DIR .. "src/mame/includes/pp01.h",
2609	2986	MAME_DIR .. "src/mame/machine/pp01.cpp",
2610	2987	MAME_DIR .. "src/mame/video/pp01.cpp",
2611	2988	}
r250251	r250252
2618	2995	MAME_DIR .. "src/mame/drivers/applix.cpp",
2619	2996	MAME_DIR .. "src/mame/drivers/attache.cpp",
2620	2997	MAME_DIR .. "src/mame/drivers/aussiebyte.cpp",
	2998	MAME_DIR .. "src/mame/includes/aussiebyte.h",
2621	2999	MAME_DIR .. "src/mame/video/aussiebyte.cpp",
2622	3000	MAME_DIR .. "src/mame/drivers/ax20.cpp",
2623	3001	MAME_DIR .. "src/mame/drivers/beehive.cpp",
r250251	r250252
2626	3004	MAME_DIR .. "src/mame/drivers/bitgraph.cpp",
2627	3005	MAME_DIR .. "src/mame/drivers/br8641.cpp",
2628	3006	MAME_DIR .. "src/mame/drivers/busicom.cpp",
	3007	MAME_DIR .. "src/mame/includes/busicom.h",
2629	3008	MAME_DIR .. "src/mame/video/busicom.cpp",
2630	3009	MAME_DIR .. "src/mame/drivers/chaos.cpp",
2631	3010	MAME_DIR .. "src/mame/drivers/chesstrv.cpp",
r250251	r250252
2634	3013	MAME_DIR .. "src/mame/drivers/codata.cpp",
2635	3014	MAME_DIR .. "src/mame/drivers/cortex.cpp",
2636	3015	MAME_DIR .. "src/mame/drivers/cosmicos.cpp",
	3016	MAME_DIR .. "src/mame/includes/cosmicos.h",
2637	3017	MAME_DIR .. "src/mame/drivers/cp1.cpp",
2638	3018	MAME_DIR .. "src/mame/drivers/cxhumax.cpp",
	3019	MAME_DIR .. "src/mame/includes/cxhumax.h",
2639	3020	MAME_DIR .. "src/mame/drivers/czk80.cpp",
2640	3021	MAME_DIR .. "src/mame/drivers/d6800.cpp",
2641	3022	MAME_DIR .. "src/mame/drivers/d6809.cpp",
r250251	r250252
2643	3024	MAME_DIR .. "src/mame/drivers/digel804.cpp",
2644	3025	MAME_DIR .. "src/mame/drivers/dim68k.cpp",
2645	3026	MAME_DIR .. "src/mame/drivers/dm7000.cpp",
	3027	MAME_DIR .. "src/mame/includes/dm7000.h",
2646	3028	MAME_DIR .. "src/mame/drivers/dmv.cpp",
2647	3029	MAME_DIR .. "src/mame/machine/dmv_keyb.cpp",
	3030	MAME_DIR .. "src/mame/machine/dmv_keyb.h",
2648	3031	MAME_DIR .. "src/mame/drivers/dps1.cpp",
2649	3032	MAME_DIR .. "src/mame/drivers/dsb46.cpp",
2650	3033	MAME_DIR .. "src/mame/drivers/dual68.cpp",
2651	3034	MAME_DIR .. "src/mame/drivers/eacc.cpp",
2652	3035	MAME_DIR .. "src/mame/drivers/elwro800.cpp",
2653	3036	MAME_DIR .. "src/mame/drivers/eti660.cpp",
	3037	MAME_DIR .. "src/mame/includes/eti660.h",
2654	3038	MAME_DIR .. "src/mame/drivers/excali64.cpp",
2655	3039	MAME_DIR .. "src/mame/drivers/fanucs15.cpp",
2656	3040	MAME_DIR .. "src/mame/drivers/fanucspmg.cpp",
r250251	r250252
2658	3042	MAME_DIR .. "src/mame/drivers/fk1.cpp",
2659	3043	MAME_DIR .. "src/mame/drivers/ft68m.cpp",
2660	3044	MAME_DIR .. "src/mame/drivers/gamate.cpp",
	3045	MAME_DIR .. "src/mame/includes/gamate.h",
2661	3046	MAME_DIR .. "src/mame/audio/gamate.cpp",
2662	3047	MAME_DIR .. "src/mame/drivers/gameking.cpp",
2663	3048	MAME_DIR .. "src/mame/drivers/gimix.cpp",
r250251	r250252
2672	3057	MAME_DIR .. "src/mame/drivers/icatel.cpp",
2673	3058	MAME_DIR .. "src/mame/drivers/ie15.cpp",
2674	3059	MAME_DIR .. "src/mame/machine/ie15_kbd.cpp",
	3060	MAME_DIR .. "src/mame/machine/ie15_kbd.h",
2675	3061	MAME_DIR .. "src/mame/drivers/if800.cpp",
2676	3062	MAME_DIR .. "src/mame/drivers/imsai.cpp",
2677	3063	MAME_DIR .. "src/mame/drivers/indiana.cpp",
r250251	r250252
2689	3075	MAME_DIR .. "src/mame/drivers/mice.cpp",
2690	3076	MAME_DIR .. "src/mame/drivers/micral.cpp",
2691	3077	MAME_DIR .. "src/mame/drivers/micronic.cpp",
	3078	MAME_DIR .. "src/mame/includes/micronic.h",
2692	3079	MAME_DIR .. "src/mame/drivers/mini2440.cpp",
2693	3080	MAME_DIR .. "src/mame/drivers/mmd1.cpp",
2694	3081	MAME_DIR .. "src/mame/drivers/mod8.cpp",
r250251	r250252
2703	3090	MAME_DIR .. "src/mame/drivers/myvision.cpp",
2704	3091	MAME_DIR .. "src/mame/drivers/ngen.cpp",
2705	3092	MAME_DIR .. "src/mame/machine/ngen_kb.cpp",
	3093	MAME_DIR .. "src/mame/machine/ngen_kb.h",
2706	3094	MAME_DIR .. "src/mame/drivers/octopus.cpp",
2707	3095	MAME_DIR .. "src/mame/drivers/onyx.cpp",
2708	3096	MAME_DIR .. "src/mame/drivers/okean240.cpp",
r250251	r250252
2710	3098	MAME_DIR .. "src/mame/drivers/pegasus.cpp",
2711	3099	MAME_DIR .. "src/mame/drivers/pencil2.cpp",
2712	3100	MAME_DIR .. "src/mame/drivers/pes.cpp",
	3101	MAME_DIR .. "src/mame/includes/pes.h",
2713	3102	MAME_DIR .. "src/mame/drivers/pipbug.cpp",
2714	3103	MAME_DIR .. "src/mame/drivers/plan80.cpp",
2715	3104	MAME_DIR .. "src/mame/drivers/pm68k.cpp",
r250251	r250252
2727	3116	MAME_DIR .. "src/mame/drivers/seattlecmp.cpp",
2728	3117	MAME_DIR .. "src/mame/drivers/sh4robot.cpp",
2729	3118	MAME_DIR .. "src/mame/drivers/softbox.cpp",
	3119	MAME_DIR .. "src/mame/includes/softbox.h",
2730	3120	MAME_DIR .. "src/mame/drivers/squale.cpp",
2731	3121	MAME_DIR .. "src/mame/drivers/swtpc.cpp",
2732	3122	MAME_DIR .. "src/mame/drivers/swyft.cpp",
r250251	r250252
2737	3127	MAME_DIR .. "src/mame/drivers/terak.cpp",
2738	3128	MAME_DIR .. "src/mame/drivers/ti630.cpp",
2739	3129	MAME_DIR .. "src/mame/drivers/tsispch.cpp",
	3130	MAME_DIR .. "src/mame/includes/tsispch.h",
2740	3131	MAME_DIR .. "src/mame/drivers/tvgame.cpp",
2741	3132	MAME_DIR .. "src/mame/drivers/unistar.cpp",
2742	3133	MAME_DIR .. "src/mame/drivers/v6809.cpp",
r250251	r250252
2744	3135	MAME_DIR .. "src/mame/drivers/vii.cpp",
2745	3136	MAME_DIR .. "src/mame/drivers/wicat.cpp",
2746	3137	MAME_DIR .. "src/mame/drivers/xor100.cpp",
	3138	MAME_DIR .. "src/mame/includes/xor100.h",
2747	3139	MAME_DIR .. "src/mame/drivers/xavix.cpp",
2748	3140	MAME_DIR .. "src/mame/drivers/zorba.cpp",
2749	3141	}

trunk/scripts/target/mame/nl.lua

r250251	r250252
97	97	GEN_DIR  .. "mame/layout",
98	98	}
99	99
100		files{
101		MAME_DIR .. "src/mame/drivers/pong.cpp",
102		MAME_DIR .. "src/mame/drivers/nl_pong.cpp",
103		MAME_DIR .. "src/mame/drivers/nl_pongd.cpp",
104		MAME_DIR .. "src/mame/drivers/nl_breakout.cpp",
	100	files{
	101	MAME_DIR .. "src/mame/drivers/pong.cpp",
	102	MAME_DIR .. "src/mame/drivers/nl_pong.cpp",
	103	MAME_DIR .. "src/mame/drivers/nl_pongd.cpp",
	104	MAME_DIR .. "src/mame/drivers/nl_breakout.cpp",
105	105
106		MAME_DIR .. "src/mame/drivers/1942.cpp",
107		MAME_DIR .. "src/mame/video/1942.cpp",
108		MAME_DIR .. "src/mame/drivers/popeye.cpp",
109		MAME_DIR .. "src/mame/video/popeye.cpp",
	106	MAME_DIR .. "src/mame/drivers/1942.cpp",
	107	MAME_DIR .. "src/mame/includes/1942.h",
	108	MAME_DIR .. "src/mame/video/1942.cpp",
	109	MAME_DIR .. "src/mame/drivers/popeye.cpp",
	110	MAME_DIR .. "src/mame/includes/popeye.h",
	111	MAME_DIR .. "src/mame/video/popeye.cpp",
110	112
111		}
	113	}
112	114	end
113	115
114	116	function linkProjects_mame_nl(_target, _subtarget)

trunk/scripts/target/mame/tiny.lua

r250251	r250252
92	92	GEN_DIR  .. "mame/layout",
93	93	}
94	94
95		files{
96		MAME_DIR .. "src/mame/machine/ticket.cpp",
97		MAME_DIR .. "src/mame/drivers/carpolo.cpp",
98		MAME_DIR .. "src/mame/machine/carpolo.cpp",
99		MAME_DIR .. "src/mame/video/carpolo.cpp",
100		MAME_DIR .. "src/mame/drivers/circus.cpp",
101		MAME_DIR .. "src/mame/audio/circus.cpp",
102		MAME_DIR .. "src/mame/video/circus.cpp",
103		MAME_DIR .. "src/mame/drivers/exidy.cpp",
104		MAME_DIR .. "src/mame/audio/exidy.cpp",
105		MAME_DIR .. "src/mame/video/exidy.cpp",
106		MAME_DIR .. "src/mame/audio/exidy440.cpp",
107		MAME_DIR .. "src/mame/drivers/starfire.cpp",
108		MAME_DIR .. "src/mame/video/starfire.cpp",
109		MAME_DIR .. "src/mame/drivers/vertigo.cpp",
110		MAME_DIR .. "src/mame/machine/vertigo.cpp",
111		MAME_DIR .. "src/mame/video/vertigo.cpp",
112		MAME_DIR .. "src/mame/drivers/victory.cpp",
113		MAME_DIR .. "src/mame/video/victory.cpp",
114		MAME_DIR .. "src/mame/audio/targ.cpp",
115		MAME_DIR .. "src/mame/drivers/astrocde.cpp",
116		MAME_DIR .. "src/mame/video/astrocde.cpp",
117		MAME_DIR .. "src/mame/drivers/gridlee.cpp",
118		MAME_DIR .. "src/mame/audio/gridlee.cpp",
119		MAME_DIR .. "src/mame/video/gridlee.cpp",
120		MAME_DIR .. "src/mame/drivers/williams.cpp",
121		MAME_DIR .. "src/mame/machine/williams.cpp",
122		MAME_DIR .. "src/mame/audio/williams.cpp",
123		MAME_DIR .. "src/mame/video/williams.cpp",
124		MAME_DIR .. "src/mame/audio/gorf.cpp",
125		MAME_DIR .. "src/mame/audio/wow.cpp",
126		MAME_DIR .. "src/mame/drivers/gaelco.cpp",
127		MAME_DIR .. "src/mame/video/gaelco.cpp",
128		MAME_DIR .. "src/mame/machine/gaelcrpt.cpp",
129		MAME_DIR .. "src/mame/drivers/wrally.cpp",
130		MAME_DIR .. "src/mame/machine/wrally.cpp",
131		MAME_DIR .. "src/mame/video/wrally.cpp",
132		MAME_DIR .. "src/mame/drivers/looping.cpp",
133		MAME_DIR .. "src/mame/drivers/supertnk.cpp",
134		}
	95	files{
	96	MAME_DIR .. "src/mame/machine/ticket.cpp",
	97	MAME_DIR .. "src/mame/machine/ticket.h",
	98	MAME_DIR .. "src/mame/drivers/carpolo.cpp",
	99	MAME_DIR .. "src/mame/includes/carpolo.h",
	100	MAME_DIR .. "src/mame/machine/carpolo.cpp",
	101	MAME_DIR .. "src/mame/video/carpolo.cpp",
	102	MAME_DIR .. "src/mame/drivers/circus.cpp",
	103	MAME_DIR .. "src/mame/includes/circus.h",
	104	MAME_DIR .. "src/mame/audio/circus.cpp",
	105	MAME_DIR .. "src/mame/video/circus.cpp",
	106	MAME_DIR .. "src/mame/drivers/exidy.cpp",
	107	MAME_DIR .. "src/mame/includes/exidy.h",
	108	MAME_DIR .. "src/mame/audio/exidy.cpp",
	109	MAME_DIR .. "src/mame/audio/exidy.h",
	110	MAME_DIR .. "src/mame/video/exidy.cpp",
	111	MAME_DIR .. "src/mame/audio/exidy440.cpp",
	112	MAME_DIR .. "src/mame/audio/exidy440.h",
	113	MAME_DIR .. "src/mame/drivers/starfire.cpp",
	114	MAME_DIR .. "src/mame/includes/starfire.h",
	115	MAME_DIR .. "src/mame/video/starfire.cpp",
	116	MAME_DIR .. "src/mame/drivers/vertigo.cpp",
	117	MAME_DIR .. "src/mame/includes/vertigo.h",
	118	MAME_DIR .. "src/mame/machine/vertigo.cpp",
	119	MAME_DIR .. "src/mame/video/vertigo.cpp",
	120	MAME_DIR .. "src/mame/drivers/victory.cpp",
	121	MAME_DIR .. "src/mame/includes/victory.h",
	122	MAME_DIR .. "src/mame/video/victory.cpp",
	123	MAME_DIR .. "src/mame/audio/targ.cpp",
	124	MAME_DIR .. "src/mame/drivers/astrocde.cpp",
	125	MAME_DIR .. "src/mame/includes/astrocde.h",
	126	MAME_DIR .. "src/mame/video/astrocde.cpp",
	127	MAME_DIR .. "src/mame/drivers/gridlee.cpp",
	128	MAME_DIR .. "src/mame/includes/gridlee.h",
	129	MAME_DIR .. "src/mame/audio/gridlee.cpp",
	130	MAME_DIR .. "src/mame/video/gridlee.cpp",
	131	MAME_DIR .. "src/mame/drivers/williams.cpp",
	132	MAME_DIR .. "src/mame/includes/williams.h",
	133	MAME_DIR .. "src/mame/machine/williams.cpp",
	134	MAME_DIR .. "src/mame/audio/williams.cpp",
	135	MAME_DIR .. "src/mame/audio/williams.h",
	136	MAME_DIR .. "src/mame/video/williams.cpp",
	137	MAME_DIR .. "src/mame/audio/gorf.cpp",
	138	MAME_DIR .. "src/mame/audio/wow.cpp",
	139	MAME_DIR .. "src/mame/drivers/gaelco.cpp",
	140	MAME_DIR .. "src/mame/includes/gaelco.h",
	141	MAME_DIR .. "src/mame/video/gaelco.cpp",
	142	MAME_DIR .. "src/mame/machine/gaelcrpt.cpp",
	143	MAME_DIR .. "src/mame/drivers/wrally.cpp",
	144	MAME_DIR .. "src/mame/includes/wrally.h",
	145	MAME_DIR .. "src/mame/machine/wrally.cpp",
	146	MAME_DIR .. "src/mame/video/wrally.cpp",
	147	MAME_DIR .. "src/mame/drivers/looping.cpp",
	148	MAME_DIR .. "src/mame/drivers/supertnk.cpp",
	149	}
135	150	end
136	151
137	152	function linkProjects_mame_tiny(_target, _subtarget)

trunk/src/devices/bus/a1bus/a1bus.cpp

r250251	r250252
26	26	//-------------------------------------------------
27	27	a1bus_slot_device::a1bus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
28	28	device_t(mconfig, A1BUS_SLOT, "Apple I Slot", tag, owner, clock, "a1bus_slot", __FILE__),
29		device_slot_interface(mconfig, *this)
	29	device_slot_interface(mconfig, *this),
	30	m_a1bus_tag(nullptr),
	31	m_a1bus_slottag(nullptr)
30	32	{
31	33	}
32	34
33	35	a1bus_slot_device::a1bus_slot_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
34	36	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
35		device_slot_interface(mconfig, *this)
	37	device_slot_interface(mconfig, *this), m_a1bus_tag(nullptr), m_a1bus_slottag(nullptr)
36	38	{
37	39	}
38	40
r250251	r250252
75	77	//-------------------------------------------------
76	78
77	79	a1bus_device::a1bus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
78		device_t(mconfig, A1BUS, "Apple I Bus", tag, owner, clock, "a1bus", __FILE__),
	80	device_t(mconfig, A1BUS, "Apple I Bus", tag, owner, clock, "a1bus", __FILE__), m_maincpu(nullptr),
79	81	m_out_irq_cb(*this),
80		m_out_nmi_cb(*this)
	82	m_out_nmi_cb(*this), m_device(nullptr), m_cputag(nullptr)
81	83	{
82	84	}
83	85
84	86	a1bus_device::a1bus_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
85		device_t(mconfig, type, name, tag, owner, clock, shortname, source),
	87	device_t(mconfig, type, name, tag, owner, clock, shortname, source), m_maincpu(nullptr),
86	88	m_out_irq_cb(*this),
87		m_out_nmi_cb(*this)
	89	m_out_nmi_cb(*this), m_device(nullptr), m_cputag(nullptr)
88	90	{
89	91	}
90	92	//-------------------------------------------------
r250251	r250252
166	168
167	169	device_a1bus_card_interface::device_a1bus_card_interface(const machine_config &mconfig, device_t &device)
168	170	: device_slot_card_interface(mconfig, device),
169		m_a1bus(NULL),
170		m_a1bus_tag(NULL)
	171	m_a1bus(nullptr),
	172	m_a1bus_tag(nullptr), m_a1bus_slottag(nullptr), m_next(nullptr)
171	173	{
172	174	}
173	175

trunk/src/devices/bus/a1bus/a1cassette.cpp

r250251	r250252
59	59	a1bus_cassette_device::a1bus_cassette_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
60	60	device_t(mconfig, A1BUS_CASSETTE, "Apple I cassette board", tag, owner, clock, "a1cass", __FILE__),
61	61	device_a1bus_card_interface(mconfig, *this),
62		m_cassette(*this, "cassette")
	62	m_cassette(*this, "cassette"), m_rom(nullptr), m_cassette_output_flipflop(0)
63	63	{
64	64	}
65	65
66	66	a1bus_cassette_device::a1bus_cassette_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
67	67	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
68	68	device_a1bus_card_interface(mconfig, *this),
69		m_cassette(*this, "cassette")
	69	m_cassette(*this, "cassette"), m_rom(nullptr), m_cassette_output_flipflop(0)
70	70	{
71	71	}
72	72

trunk/src/devices/bus/a1bus/a1cffa.cpp

r250251	r250252
54	54	a1bus_cffa_device::a1bus_cffa_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
55	55	device_t(mconfig, A1BUS_CFFA, "CFFA Compact Flash for Apple I", tag, owner, clock, "cffa1", __FILE__),
56	56	device_a1bus_card_interface(mconfig, *this),
57		m_ata(*this, CFFA_ATA_TAG)
	57	m_ata(*this, CFFA_ATA_TAG), m_rom(nullptr), m_lastdata(0), m_writeprotect(false)
58	58	{
59	59	}
60	60
61	61	a1bus_cffa_device::a1bus_cffa_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
62	62	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
63	63	device_a1bus_card_interface(mconfig, *this),
64		m_ata(*this, CFFA_ATA_TAG)
	64	m_ata(*this, CFFA_ATA_TAG), m_rom(nullptr), m_lastdata(0), m_writeprotect(false)
65	65	{
66	66	}
67	67

trunk/src/devices/bus/a2bus/a2alfam2.cpp

r250251	r250252
88	88	m_sn1(*this, SN1_TAG),
89	89	m_sn2(*this, SN2_TAG),
90	90	m_sn3(*this, SN3_TAG),
91		m_sn4(*this, SN4_TAG)
	91	m_sn4(*this, SN4_TAG), m_latch0(0), m_latch1(0), m_latch2(0), m_latch3(0), m_has4thsn(false)
92	92	{
93	93	}
94	94

trunk/src/devices/bus/a2bus/a2applicard.cpp

r250251	r250252
78	78	a2bus_applicard_device::a2bus_applicard_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
79	79	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
80	80	device_a2bus_card_interface(mconfig, *this),
81		m_z80(*this, Z80_TAG)
	81	m_z80(*this, Z80_TAG), m_bROMAtZ80Zero(false), m_z80stat(false), m_6502stat(false), m_toz80(0), m_to6502(0), m_z80rom(nullptr)
82	82	{
83	83	}
84	84
85	85	a2bus_applicard_device::a2bus_applicard_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
86	86	device_t(mconfig, A2BUS_APPLICARD, "PCPI Applicard", tag, owner, clock, "a2aplcrd", __FILE__),
87	87	device_a2bus_card_interface(mconfig, *this),
88		m_z80(*this, Z80_TAG)
	88	m_z80(*this, Z80_TAG), m_bROMAtZ80Zero(false), m_z80stat(false), m_6502stat(false), m_toz80(0), m_to6502(0), m_z80rom(nullptr)
89	89	{
90	90	}
91	91

trunk/src/devices/bus/a2bus/a2bus.cpp

r250251	r250252
90	90	//-------------------------------------------------
91	91	a2bus_slot_device::a2bus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
92	92	device_t(mconfig, A2BUS_SLOT, "Apple II Slot", tag, owner, clock, "a2bus_slot", __FILE__),
93		device_slot_interface(mconfig, *this)
	93	device_slot_interface(mconfig, *this), m_a2bus_tag(nullptr), m_a2bus_slottag(nullptr)
94	94	{
95	95	}
96	96
97	97	a2bus_slot_device::a2bus_slot_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
98	98	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
99		device_slot_interface(mconfig, *this)
	99	device_slot_interface(mconfig, *this), m_a2bus_tag(nullptr), m_a2bus_slottag(nullptr)
100	100	{
101	101	}
102	102
r250251	r250252
139	139	//-------------------------------------------------
140	140
141	141	a2bus_device::a2bus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
142		device_t(mconfig, A2BUS, "Apple II Bus", tag, owner, clock, "a2bus", __FILE__),
	142	device_t(mconfig, A2BUS, "Apple II Bus", tag, owner, clock, "a2bus", __FILE__), m_maincpu(nullptr), m_maincpu_space(nullptr),
143	143	m_out_irq_cb(*this),
144	144	m_out_nmi_cb(*this),
145		m_out_inh_cb(*this)
	145	m_out_inh_cb(*this), m_cputag(nullptr), m_slot_irq_mask(0), m_slot_nmi_mask(0)
146	146	{
147	147	}
148	148
149	149	a2bus_device::a2bus_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
150		device_t(mconfig, type, name, tag, owner, clock, shortname, source),
	150	device_t(mconfig, type, name, tag, owner, clock, shortname, source), m_maincpu(nullptr), m_maincpu_space(nullptr),
151	151	m_out_irq_cb(*this),
152	152	m_out_nmi_cb(*this),
153		m_out_inh_cb(*this)
	153	m_out_inh_cb(*this), m_cputag(nullptr), m_slot_irq_mask(0), m_slot_nmi_mask(0)
154	154	{
155	155	}
156	156	//-------------------------------------------------
r250251	r250252
296	296
297	297	device_a2bus_card_interface::device_a2bus_card_interface(const machine_config &mconfig, device_t &device)
298	298	: device_slot_card_interface(mconfig, device),
299		m_a2bus(NULL),
300		m_a2bus_tag(NULL)
	299	m_a2bus(nullptr),
	300	m_a2bus_tag(nullptr), m_a2bus_slottag(nullptr), m_slot(0), m_next(nullptr)
301	301	{
302	302	}
303	303

trunk/src/devices/bus/a2bus/a2cffa.cpp

r250251	r250252
86	86	a2bus_cffa2000_device::a2bus_cffa2000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
87	87	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
88	88	device_a2bus_card_interface(mconfig, *this),
89		m_ata(*this, CFFA2_ATA_TAG)
	89	m_ata(*this, CFFA2_ATA_TAG), m_rom(nullptr), m_lastdata(0), m_lastreaddata(0), m_writeprotect(false), m_inwritecycle(false)
90	90	{
91	91	}
92	92

trunk/src/devices/bus/a2bus/a2corvus.cpp

r250251	r250252
104	104	a2bus_corvus_device::a2bus_corvus_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
105	105	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
106	106	device_a2bus_card_interface(mconfig, *this),
107		m_corvushd(*this, CORVUS_HD_TAG)
	107	m_corvushd(*this, CORVUS_HD_TAG), m_rom(nullptr)
108	108	{
109	109	}
110	110
111	111	a2bus_corvus_device::a2bus_corvus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
112	112	device_t(mconfig, A2BUS_CORVUS, "Corvus Flat Cable interface", tag, owner, clock, "a2corvus", __FILE__),
113	113	device_a2bus_card_interface(mconfig, *this),
114		m_corvushd(*this, CORVUS_HD_TAG)
	114	m_corvushd(*this, CORVUS_HD_TAG), m_rom(nullptr)
115	115	{
116	116	}
117	117

trunk/src/devices/bus/a2bus/a2diskii.cpp

r250251	r250252
93	93	a2bus_floppy_device::a2bus_floppy_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
94	94	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
95	95	device_a2bus_card_interface(mconfig, *this),
96		m_fdc(*this, FDC_TAG)
	96	m_fdc(*this, FDC_TAG), m_rom(nullptr)
97	97	{
98	98	}
99	99

trunk/src/devices/bus/a2bus/a2diskiing.cpp

r250251	r250252
73	73	device_a2bus_card_interface(mconfig, *this),
74	74	m_wozfdc(*this, WOZFDC_TAG),
75	75	floppy0(*this, "0"),
76		floppy1(*this, "1")
	76	floppy1(*this, "1"), m_rom(nullptr)
77	77	{
78	78	}
79	79

trunk/src/devices/bus/a2bus/a2dx1.cpp

r250251	r250252
51	51	a2bus_dx1_device::a2bus_dx1_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
52	52	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
53	53	device_a2bus_card_interface(mconfig, *this),
54		m_dac(*this, DAC_TAG)
	54	m_dac(*this, DAC_TAG), m_volume(0), m_lastdac(0)
55	55	{
56	56	}
57	57
58	58	a2bus_dx1_device::a2bus_dx1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
59	59	device_t(mconfig, A2BUS_DX1, "Decillonix DX-1", tag, owner, clock, "a2dx1", __FILE__),
60	60	device_a2bus_card_interface(mconfig, *this),
61		m_dac(*this, DAC_TAG)
	61	m_dac(*this, DAC_TAG), m_volume(0), m_lastdac(0)
62	62	{
63	63	}
64	64

trunk/src/devices/bus/a2bus/a2eauxslot.cpp

r250251	r250252
28	28	//-------------------------------------------------
29	29	a2eauxslot_slot_device::a2eauxslot_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
30	30	device_t(mconfig, A2EAUXSLOT_SLOT, "Apple IIe AUX Slot", tag, owner, clock, "a2eauxslot_slot", __FILE__),
31		device_slot_interface(mconfig, *this)
	31	device_slot_interface(mconfig, *this),
	32	m_a2eauxslot_tag(nullptr),
	33	m_a2eauxslot_slottag(nullptr)
32	34	{
33	35	}
34	36
35	37	a2eauxslot_slot_device::a2eauxslot_slot_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
36	38	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
37		device_slot_interface(mconfig, *this)
	39	device_slot_interface(mconfig, *this), m_a2eauxslot_tag(nullptr), m_a2eauxslot_slottag(nullptr)
38	40	{
39	41	}
40	42
r250251	r250252
77	79	//-------------------------------------------------
78	80
79	81	a2eauxslot_device::a2eauxslot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
80		device_t(mconfig, A2EAUXSLOT, "Apple IIe AUX Bus", tag, owner, clock, "a2eauxslot", __FILE__),
	82	device_t(mconfig, A2EAUXSLOT, "Apple IIe AUX Bus", tag, owner, clock, "a2eauxslot", __FILE__), m_maincpu(nullptr),
81	83	m_out_irq_cb(*this),
82		m_out_nmi_cb(*this)
	84	m_out_nmi_cb(*this), m_device(nullptr), m_cputag(nullptr)
83	85	{
84	86	}
85	87
86	88	a2eauxslot_device::a2eauxslot_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
87		device_t(mconfig, type, name, tag, owner, clock, shortname, source),
	89	device_t(mconfig, type, name, tag, owner, clock, shortname, source), m_maincpu(nullptr),
88	90	m_out_irq_cb(*this),
89		m_out_nmi_cb(*this)
	91	m_out_nmi_cb(*this), m_device(nullptr), m_cputag(nullptr)
90	92	{
91	93	}
92	94	//-------------------------------------------------
r250251	r250252
152	154
153	155	device_a2eauxslot_card_interface::device_a2eauxslot_card_interface(const machine_config &mconfig, device_t &device)
154	156	: device_slot_card_interface(mconfig, device),
155		m_a2eauxslot(NULL),
156		m_a2eauxslot_tag(NULL)
	157	m_a2eauxslot(nullptr),
	158	m_a2eauxslot_tag(nullptr), m_a2eauxslot_slottag(nullptr), m_slot(0), m_next(nullptr)
157	159	{
158	160	}
159	161

trunk/src/devices/bus/a2bus/a2eramworks3.cpp

r250251	r250252
30	30
31	31	a2eaux_ramworks3_device::a2eaux_ramworks3_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
32	32	device_t(mconfig, A2EAUX_RAMWORKS3, "Applied Engineering RamWorks III", tag, owner, clock, "a2erwks3", __FILE__),
33		device_a2eauxslot_card_interface(mconfig, *this)
	33	device_a2eauxslot_card_interface(mconfig, *this),
	34	m_bank(0)
34	35	{
35	36	}
36	37
37	38	a2eaux_ramworks3_device::a2eaux_ramworks3_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
38	39	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
39		device_a2eauxslot_card_interface(mconfig, *this)
	40	device_a2eauxslot_card_interface(mconfig, *this), m_bank(0)
40	41	{
41	42	}
42	43

trunk/src/devices/bus/a2bus/a2hsscsi.cpp

r250251	r250252
117	117	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
118	118	device_a2bus_card_interface(mconfig, *this),
119	119	m_ncr5380(*this, SCSI_5380_TAG),
120		m_scsibus(*this, SCSI_BUS_TAG)
	120	m_scsibus(*this, SCSI_BUS_TAG), m_rom(nullptr), m_rambank(0), m_rombank(0), m_drq(0), m_bank(0), m_816block(false), m_c0ne(0), m_c0nf(0)
121	121	{
122	122	}
123	123
r250251	r250252
125	125	device_t(mconfig, A2BUS_HSSCSI, "Apple II High-Speed SCSI Card", tag, owner, clock, "a2hsscsi", __FILE__),
126	126	device_a2bus_card_interface(mconfig, *this),
127	127	m_ncr5380(*this, SCSI_5380_TAG),
128		m_scsibus(*this, SCSI_BUS_TAG)
	128	m_scsibus(*this, SCSI_BUS_TAG), m_rom(nullptr), m_rambank(0), m_rombank(0), m_drq(0), m_bank(0), m_816block(false), m_c0ne(0), m_c0nf(0)
129	129	{
130	130	}
131	131

trunk/src/devices/bus/a2bus/a2mcms.cpp

r250251	r250252
151	151
152	152	a2bus_mcms2_device::a2bus_mcms2_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
153	153	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
154		device_a2bus_card_interface(mconfig, *this)
	154	device_a2bus_card_interface(mconfig, *this), m_card1(nullptr), m_engine(nullptr)
155	155	{
156	156	}
157	157
158	158	a2bus_mcms2_device::a2bus_mcms2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
159	159	device_t(mconfig, A2BUS_MCMS2, "Mountain Computer Music System (card 2)", tag, owner, clock, "a2mcms2", __FILE__),
160		device_a2bus_card_interface(mconfig, *this)
	160	device_a2bus_card_interface(mconfig, *this), m_card1(nullptr), m_engine(nullptr)
161	161	{
162	162	}
163	163
r250251	r250252
215	215	mcms_device::mcms_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
216	216	: device_t(mconfig, MCMS, "Mountain Computer Music System engine", tag, owner, clock, "msmseng", __FILE__),
217	217	device_sound_interface(mconfig, *this),
218		m_write_irq(*this)
	218	m_write_irq(*this), m_stream(nullptr), m_timer(nullptr), m_clrtimer(nullptr), m_pBusDevice(nullptr), m_enabled(false), m_mastervol(0), m_rand(0)
219	219	{
220	220	}
221	221

trunk/src/devices/bus/a2bus/a2memexp.cpp

r250251	r250252
75	75
76	76	a2bus_memexp_device::a2bus_memexp_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
77	77	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
78		device_a2bus_card_interface(mconfig, *this)
	78	device_a2bus_card_interface(mconfig, *this), m_isramfactor(false), m_bankhior(0), m_addrmask(0), m_rom(nullptr), m_wptr(0), m_liveptr(0)
79	79	{
80	80	}
81	81

trunk/src/devices/bus/a2bus/a2midi.cpp

r250251	r250252
63	63	device_t(mconfig, A2BUS_MIDI, "6850 MIDI card", tag, owner, clock, "a2midi", __FILE__),
64	64	device_a2bus_card_interface(mconfig, *this),
65	65	m_ptm(*this, MIDI_PTM_TAG),
66		m_acia(*this, MIDI_ACIA_TAG),
	66	m_acia(*this, MIDI_ACIA_TAG), m_acia_irq(false),
67	67	m_ptm_irq(false)
68	68	{
69	69	}
r250251	r250252
72	72	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
73	73	device_a2bus_card_interface(mconfig, *this),
74	74	m_ptm(*this, MIDI_PTM_TAG),
75		m_acia(*this, MIDI_ACIA_TAG),
	75	m_acia(*this, MIDI_ACIA_TAG), m_acia_irq(false),
76	76	m_ptm_irq(false)
77	77	{
78	78	}

trunk/src/devices/bus/a2bus/a2mockingboard.cpp

r250251	r250252
128	128	m_ay1(*this, AY1_TAG),
129	129	m_ay2(*this, AY2_TAG),
130	130	m_ay3(*this, AY3_TAG),
131		m_ay4(*this, AY4_TAG)
	131	m_ay4(*this, AY4_TAG), m_isPhasor(false), m_PhasorNative(false), m_porta1(0), m_porta2(0)
132	132	{
133	133	}
134	134

trunk/src/devices/bus/a2bus/a2pic.cpp

r250251	r250252
104	104	m_dsw1(*this, "DSW1"),
105	105	m_ctx(*this, PIC_CENTRONICS_TAG),
106	106	m_ctx_data_in(*this, "ctx_data_in"),
107		m_ctx_data_out(*this, "ctx_data_out"),
108		m_started(false)
	107	m_ctx_data_out(*this, "ctx_data_out"), m_rom(nullptr),
	108	m_started(false), m_ack(0), m_irqenable(false), m_autostrobe(false), m_timer(nullptr)
109	109	{
110	110	}
111	111
r250251	r250252
115	115	m_dsw1(*this, "DSW1"),
116	116	m_ctx(*this, PIC_CENTRONICS_TAG),
117	117	m_ctx_data_in(*this, "ctx_data_in"),
118		m_ctx_data_out(*this, "ctx_data_out"),
119		m_started(false)
	118	m_ctx_data_out(*this, "ctx_data_out"), m_rom(nullptr),
	119	m_started(false), m_ack(0), m_irqenable(false), m_autostrobe(false), m_timer(nullptr)
120	120	{
121	121	}
122	122

trunk/src/devices/bus/a2bus/a2scsi.cpp

r250251	r250252
110	110	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
111	111	device_a2bus_card_interface(mconfig, *this),
112	112	m_ncr5380(*this, SCSI_5380_TAG),
113		m_scsibus(*this, SCSI_BUS_TAG)
	113	m_scsibus(*this, SCSI_BUS_TAG), m_rom(nullptr), m_rambank(0), m_rombank(0), m_drq(0), m_bank(0), m_816block(false)
114	114	{
115	115	}
116	116
r250251	r250252
118	118	device_t(mconfig, A2BUS_SCSI, "Apple II SCSI Card", tag, owner, clock, "a2scsi", __FILE__),
119	119	device_a2bus_card_interface(mconfig, *this),
120	120	m_ncr5380(*this, SCSI_5380_TAG),
121		m_scsibus(*this, SCSI_BUS_TAG)
	121	m_scsibus(*this, SCSI_BUS_TAG), m_rom(nullptr), m_rambank(0), m_rombank(0), m_drq(0), m_bank(0), m_816block(false)
122	122	{
123	123	}
124	124

trunk/src/devices/bus/a2bus/a2softcard.cpp

r250251	r250252
54	54	a2bus_softcard_device::a2bus_softcard_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
55	55	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
56	56	device_a2bus_card_interface(mconfig, *this),
57		m_z80(*this, Z80_TAG)
	57	m_z80(*this, Z80_TAG), m_bEnabled(false), m_FirstZ80Boot(false)
58	58	{
59	59	}
60	60
61	61	a2bus_softcard_device::a2bus_softcard_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
62	62	device_t(mconfig, A2BUS_SOFTCARD, "Microsoft SoftCard", tag, owner, clock, "a2softcard", __FILE__),
63	63	device_a2bus_card_interface(mconfig, *this),
64		m_z80(*this, Z80_TAG)
	64	m_z80(*this, Z80_TAG), m_bEnabled(false), m_FirstZ80Boot(false)
65	65	{
66	66	}
67	67

trunk/src/devices/bus/a2bus/a2ssc.cpp

r250251	r250252
132	132	device_a2bus_card_interface(mconfig, *this),
133	133	m_dsw1(*this, "DSW1"),
134	134	m_dsw2(*this, "DSW2"),
135		m_acia(*this, SSC_ACIA_TAG),
	135	m_acia(*this, SSC_ACIA_TAG), m_rom(nullptr),
136	136	m_started(false)
137	137	{
138	138	}
r250251	r250252
142	142	device_a2bus_card_interface(mconfig, *this),
143	143	m_dsw1(*this, "DSW1"),
144	144	m_dsw2(*this, "DSW2"),
145		m_acia(*this, SSC_ACIA_TAG),
	145	m_acia(*this, SSC_ACIA_TAG), m_rom(nullptr),
146	146	m_started(false)
147	147	{
148	148	}

trunk/src/devices/bus/a2bus/a2swyft.cpp

r250251	r250252
47	47
48	48	a2bus_swyft_device::a2bus_swyft_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
49	49	device_t(mconfig, A2BUS_SWYFT, "IAI SwyftCard", tag, owner, clock, "a2swyft", __FILE__),
50		device_a2bus_card_interface(mconfig, *this)
	50	device_a2bus_card_interface(mconfig, *this), m_rom(nullptr), m_rombank(0), m_inh_state(0)
51	51	{
52	52	}
53	53
54	54	a2bus_swyft_device::a2bus_swyft_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
55	55	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
56		device_a2bus_card_interface(mconfig, *this)
	56	device_a2bus_card_interface(mconfig, *this), m_rom(nullptr), m_rombank(0), m_inh_state(0)
57	57	{
58	58	}
59	59

trunk/src/devices/bus/a2bus/a2themill.cpp

r250251	r250252
70	70	a2bus_themill_device::a2bus_themill_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
71	71	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
72	72	device_a2bus_card_interface(mconfig, *this),
73		m_6809(*this, M6809_TAG)
	73	m_6809(*this, M6809_TAG), m_bEnabled(false), m_flipAddrSpace(false), m_6809Mode(false), m_status(0)
74	74	{
75	75	}
76	76
77	77	a2bus_themill_device::a2bus_themill_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
78	78	device_t(mconfig, A2BUS_THEMILL, "Stellation Two The Mill", tag, owner, clock, "a2themill", __FILE__),
79	79	device_a2bus_card_interface(mconfig, *this),
80		m_6809(*this, M6809_TAG)
	80	m_6809(*this, M6809_TAG), m_bEnabled(false), m_flipAddrSpace(false), m_6809Mode(false), m_status(0)
81	81	{
82	82	}
83	83

trunk/src/devices/bus/a2bus/a2thunderclock.cpp

r250251	r250252
79	79	a2bus_thunderclock_device::a2bus_thunderclock_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
80	80	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
81	81	device_a2bus_card_interface(mconfig, *this),
82		m_upd1990ac(*this, THUNDERCLOCK_UPD1990_TAG)
	82	m_upd1990ac(*this, THUNDERCLOCK_UPD1990_TAG), m_rom(nullptr), m_dataout(0)
83	83	{
84	84	}
85	85
86	86	a2bus_thunderclock_device::a2bus_thunderclock_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
87	87	device_t(mconfig, A2BUS_THUNDERCLOCK, "ThunderWare ThunderClock Plus", tag, owner, clock, "a2thunpl", __FILE__),
88	88	device_a2bus_card_interface(mconfig, *this),
89		m_upd1990ac(*this, THUNDERCLOCK_UPD1990_TAG)
	89	m_upd1990ac(*this, THUNDERCLOCK_UPD1990_TAG), m_rom(nullptr), m_dataout(0)
90	90	{
91	91	}
92	92

trunk/src/devices/bus/a2bus/a2ultraterm.cpp

r250251	r250252
140	140
141	141	a2bus_videx160_device::a2bus_videx160_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
142	142	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
143		device_a2bus_card_interface(mconfig, *this),
144		m_crtc(*this, ULTRATERM_MC6845_NAME)
	143	device_a2bus_card_interface(mconfig, *this), m_rom(nullptr), m_chrrom(nullptr), m_framecnt(0), m_ctrl1(0), m_ctrl2(0),
	144	m_crtc(*this, ULTRATERM_MC6845_NAME), m_rambank(0)
145	145	{
146	146	}
147	147

trunk/src/devices/bus/a2bus/a2videoterm.cpp

r250251	r250252
174	174
175	175	a2bus_videx80_device::a2bus_videx80_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
176	176	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
177		device_a2bus_card_interface(mconfig, *this),
178		m_crtc(*this, VIDEOTERM_MC6845_NAME),
	177	device_a2bus_card_interface(mconfig, *this), m_rom(nullptr), m_chrrom(nullptr), m_framecnt(0),
	178	m_crtc(*this, VIDEOTERM_MC6845_NAME), m_rambank(0),
179	179	m_palette(*this, ":palette")
180	180	{
181	181	}

trunk/src/devices/bus/a2bus/a2vulcan.cpp

r250251	r250252
117	117	a2bus_vulcanbase_device::a2bus_vulcanbase_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
118	118	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
119	119	device_a2bus_card_interface(mconfig, *this),
120		m_ata(*this, VULCAN_ATA_TAG)
	120	m_ata(*this, VULCAN_ATA_TAG), m_rom(nullptr), m_lastdata(0), m_rombank(0), m_rambank(0), m_last_read_was_0(false)
121	121	{
122	122	}
123	123

trunk/src/devices/bus/a2bus/a2zipdrive.cpp

r250251	r250252
72	72	a2bus_zipdrivebase_device::a2bus_zipdrivebase_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
73	73	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
74	74	device_a2bus_card_interface(mconfig, *this),
75		m_ata(*this, ZIPDRIVE_ATA_TAG)
	75	m_ata(*this, ZIPDRIVE_ATA_TAG), m_rom(nullptr), m_lastdata(0)
76	76	{
77	77	}
78	78

trunk/src/devices/bus/a2bus/corvfdc01.cpp

r250251	r250252
117	117	m_con1(*this, FDC01_FDC_TAG":0"),
118	118	m_con2(*this, FDC01_FDC_TAG":1"),
119	119	m_con3(*this, FDC01_FDC_TAG":2"),
120		m_con4(*this, FDC01_FDC_TAG":3")
	120	m_con4(*this, FDC01_FDC_TAG":3"), m_rom(nullptr), m_fdc_local_status(0), m_fdc_local_command(0), m_curfloppy(nullptr)
121	121	{
122	122	}
123	123
r250251	r250252
128	128	m_con1(*this, FDC01_FDC_TAG":0"),
129	129	m_con2(*this, FDC01_FDC_TAG":1"),
130	130	m_con3(*this, FDC01_FDC_TAG":2"),
131		m_con4(*this, FDC01_FDC_TAG":3")
	131	m_con4(*this, FDC01_FDC_TAG":3"), m_rom(nullptr), m_fdc_local_status(0), m_fdc_local_command(0), m_curfloppy(nullptr)
132	132	{
133	133	}
134	134

trunk/src/devices/bus/a2bus/corvfdc02.cpp

r250251	r250252
87	87	m_con1(*this, FDC02_FDC_TAG":0"),
88	88	m_con2(*this, FDC02_FDC_TAG":1"),
89	89	m_con3(*this, FDC02_FDC_TAG":2"),
90		m_con4(*this, FDC02_FDC_TAG":3")
	90	m_con4(*this, FDC02_FDC_TAG":3"), m_rom(nullptr), m_fdc_local_status(0), m_fdc_local_command(0), m_bufptr(0), m_curfloppy(nullptr), m_in_drq(false), m_timer(nullptr)
91	91	{
92	92	}
93	93
r250251	r250252
98	98	m_con1(*this, FDC02_FDC_TAG":0"),
99	99	m_con2(*this, FDC02_FDC_TAG":1"),
100	100	m_con3(*this, FDC02_FDC_TAG":2"),
101		m_con4(*this, FDC02_FDC_TAG":3")
	101	m_con4(*this, FDC02_FDC_TAG":3"), m_rom(nullptr), m_fdc_local_status(0), m_fdc_local_command(0), m_bufptr(0), m_curfloppy(nullptr), m_in_drq(false), m_timer(nullptr)
102	102	{
103	103	}
104	104
r250251	r250252
125	125	{
126	126	m_fdc_local_status = 2;
127	127	m_fdc_local_command = 0;
128		m_curfloppy = NULL;
	128	m_curfloppy = nullptr;
129	129	m_in_drq = false;
130	130	m_timer->adjust(attotime::never);
131	131	}

trunk/src/devices/bus/a2bus/laser128.cpp

r250251	r250252
44	44
45	45	a2bus_laser128_device::a2bus_laser128_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
46	46	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
47		device_a2bus_card_interface(mconfig, *this)
	47	device_a2bus_card_interface(mconfig, *this), m_rom(nullptr), m_slot7_bank(0), m_slot7_ram_bank(0)
48	48
49	49	{
50	50	}
51	51
52	52	a2bus_laser128_device::a2bus_laser128_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
53	53	device_t(mconfig, A2BUS_LASER128, "VTech Laser 128 Internal Device", tag, owner, clock, "a2laser128", __FILE__),
54		device_a2bus_card_interface(mconfig, *this)
	54	device_a2bus_card_interface(mconfig, *this), m_rom(nullptr), m_slot7_bank(0), m_slot7_ram_bank(0)
55	55	{
56	56	}
57	57

trunk/src/devices/bus/a2bus/mouse.cpp

r250251	r250252
179	179	m_mcu(*this, MOUSE_MCU_TAG),
180	180	m_mouseb(*this, MOUSE_BUTTON_TAG),
181	181	m_mousex(*this, MOUSE_XAXIS_TAG),
182		m_mousey(*this, MOUSE_YAXIS_TAG)
	182	m_mousey(*this, MOUSE_YAXIS_TAG), m_rom(nullptr), m_ddr_a(0), m_ddr_b(0), m_ddr_c(0), m_port_a_out(0), m_port_b_out(0), m_port_c_out(0), m_port_a_in(0), m_port_b_in(0),
	183	m_port_c_in(0), m_timer_cnt(0), m_timer_ctl(0), m_mask_option(0), last_mx(0), last_my(0), count_x(0), count_y(0), m_timer(nullptr), m_read_timer(nullptr)
183	184	{
184	185	m_started = false;
185	186	m_rom_bank = 0;
r250251	r250252
192	193	m_mcu(*this, MOUSE_MCU_TAG),
193	194	m_mouseb(*this, MOUSE_BUTTON_TAG),
194	195	m_mousex(*this, MOUSE_XAXIS_TAG),
195		m_mousey(*this, MOUSE_YAXIS_TAG)
	196	m_mousey(*this, MOUSE_YAXIS_TAG), m_rom(nullptr), m_ddr_a(0), m_ddr_b(0), m_ddr_c(0), m_port_a_out(0), m_port_b_out(0), m_port_c_out(0), m_port_a_in(0), m_port_b_in(0), m_port_c_in(0), m_timer_cnt(0), m_timer_ctl(0), m_mask_option(0), last_mx(0), last_my(0), count_x(0), count_y(0), m_timer(nullptr), m_read_timer(nullptr)
196	197	{
197	198	m_started = false;
198	199	m_rom_bank = 0;

trunk/src/devices/bus/a2bus/ramcard128k.cpp

r250251	r250252
30	30
31	31	a2bus_ssramcard_device::a2bus_ssramcard_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
32	32	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
33		device_a2bus_card_interface(mconfig, *this)
	33	device_a2bus_card_interface(mconfig, *this), m_inh_state(0), m_last_offset(0), m_dxxx_bank(0), m_main_bank(0)
34	34	{
35	35	}
36	36
37	37	a2bus_ssramcard_device::a2bus_ssramcard_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
38	38	device_t(mconfig, A2BUS_RAMCARD128K, "Saturn Systems 128K Extended Language Card", tag, owner, clock, "ssram128", __FILE__),
39		device_a2bus_card_interface(mconfig, *this)
	39	device_a2bus_card_interface(mconfig, *this), m_inh_state(0), m_last_offset(0), m_dxxx_bank(0), m_main_bank(0)
40	40	{
41	41	}
42	42

trunk/src/devices/bus/a2bus/ramcard16k.cpp

r250251	r250252
30	30
31	31	a2bus_ramcard_device::a2bus_ramcard_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
32	32	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
33		device_a2bus_card_interface(mconfig, *this)
	33	device_a2bus_card_interface(mconfig, *this), m_inh_state(0), m_last_offset(0), m_dxxx_bank(0)
34	34	{
35	35	}
36	36
37	37	a2bus_ramcard_device::a2bus_ramcard_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
38	38	device_t(mconfig, A2BUS_RAMCARD16K, "Apple II 16K Language Card", tag, owner, clock, "a2ram16k", __FILE__),
39		device_a2bus_card_interface(mconfig, *this)
	39	device_a2bus_card_interface(mconfig, *this), m_inh_state(0), m_last_offset(0), m_dxxx_bank(0)
40	40	{
41	41	}
42	42

trunk/src/devices/bus/a2bus/timemasterho.cpp

r250251	r250252
126	126	device_a2bus_card_interface(mconfig, *this),
127	127	m_pia(*this, TIMEMASTER_PIA_TAG),
128	128	m_msm5832(*this, TIMEMASTER_M5832_TAG),
129		m_dsw1(*this, "DSW1")
	129	m_dsw1(*this, "DSW1"), m_rom(nullptr), m_irqa(false), m_irqb(false)
130	130	{
131	131	m_started = false;
132	132	}
r250251	r250252
136	136	device_a2bus_card_interface(mconfig, *this),
137	137	m_pia(*this, TIMEMASTER_PIA_TAG),
138	138	m_msm5832(*this, TIMEMASTER_M5832_TAG),
139		m_dsw1(*this, "DSW1")
	139	m_dsw1(*this, "DSW1"), m_rom(nullptr), m_irqa(false), m_irqb(false)
140	140	{
141	141	m_started = false;
142	142	}

trunk/src/devices/bus/a7800/a78_slot.cpp

r250251	r250252
115	115	a78_cart_slot_device::a78_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
116	116	device_t(mconfig, A78_CART_SLOT, "Atari 7800 Cartridge Slot", tag, owner, clock, "a78_cart_slot", __FILE__),
117	117	device_image_interface(mconfig, *this),
118		device_slot_interface(mconfig, *this)
	118	device_slot_interface(mconfig, *this), m_cart(nullptr), m_type(0), m_stick_type(0)
119	119	{
120	120	}
121	121

trunk/src/devices/bus/a7800/cpuwiz.cpp

r250251	r250252
41	41
42	42
43	43	a78_versaboard_device::a78_versaboard_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
44		: a78_rom_sg_device(mconfig, type, name, tag, owner, clock, shortname, source)
45		{
	44	: a78_rom_sg_device(mconfig, type, name, tag, owner, clock, shortname, source), m_ram_bank(0)
	45	{
46	46	}
47	47
48	48	a78_versaboard_device::a78_versaboard_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
49		: a78_rom_sg_device(mconfig, A78_ROM_VERSABOARD, "Atari 7800 VersaBoard Cart", tag, owner, clock, "a78_versaboard", __FILE__)
50		{
	49	: a78_rom_sg_device(mconfig, A78_ROM_VERSABOARD, "Atari 7800 VersaBoard Cart", tag, owner, clock, "a78_versaboard", __FILE__), m_ram_bank(0)
	50	{
51	51	}
52	52
53	53

trunk/src/devices/bus/a7800/rom.cpp

r250251	r250252
68	68
69	69
70	70	a78_rom_sg_device::a78_rom_sg_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
71		: a78_rom_device(mconfig, type, name, tag, owner, clock, shortname, source)
72		{
	71	: a78_rom_device(mconfig, type, name, tag, owner, clock, shortname, source), m_bank(0)
	72	{
73	73	}
74	74
75	75	a78_rom_sg_device::a78_rom_sg_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
76		: a78_rom_device(mconfig, A78_ROM_SG, "Atari 7800 ROM Carts w/SuperGame Bankswitch", tag, owner, clock, "a78_rom_sg", __FILE__)
77		{
	76	: a78_rom_device(mconfig, A78_ROM_SG, "Atari 7800 ROM Carts w/SuperGame Bankswitch", tag, owner, clock, "a78_rom_sg", __FILE__), m_bank(0)
	77	{
78	78	}
79	79
80	80	a78_rom_sg_pokey_device::a78_rom_sg_pokey_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
107	107
108	108
109	109	a78_rom_abs_device::a78_rom_abs_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
110		: a78_rom_device(mconfig, A78_ROM_ABSOLUTE, "Atari 7800 ROM Carts w/Absolute Bankswitch", tag, owner, clock, "a78_rom_abs", __FILE__)
111		{
	110	: a78_rom_device(mconfig, A78_ROM_ABSOLUTE, "Atari 7800 ROM Carts w/Absolute Bankswitch", tag, owner, clock, "a78_rom_abs", __FILE__), m_bank(0)
	111	{
112	112	}
113	113
114	114
115	115	a78_rom_act_device::a78_rom_act_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
116		: a78_rom_device(mconfig, A78_ROM_ACTIVISION, "Atari 7800 ROM Carts w/Activision Bankswitch", tag, owner, clock, "a78_rom_act", __FILE__)
117		{
	116	: a78_rom_device(mconfig, A78_ROM_ACTIVISION, "Atari 7800 ROM Carts w/Activision Bankswitch", tag, owner, clock, "a78_rom_act", __FILE__), m_bank(0)
	117	{
118	118	}
119	119
120	120

trunk/src/devices/bus/a7800/xboard.cpp

r250251	r250252
59	59	a78_xboard_device::a78_xboard_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
60	60	: a78_rom_device(mconfig, type, name, tag, owner, clock, shortname, source),
61	61	m_xbslot(*this, "xb_slot"),
62		m_pokey(*this, "xb_pokey")
63		{
	62	m_pokey(*this, "xb_pokey"), m_reg(0), m_ram_bank(0)
	63	{
64	64	}
65	65
66	66
67	67	a78_xboard_device::a78_xboard_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
68	68	: a78_rom_device(mconfig, A78_XBOARD, "Atari 7800 XBoarD expansion", tag, owner, clock, "a78_xboard", __FILE__),
69	69	m_xbslot(*this, "xb_slot"),
70		m_pokey(*this, "xb_pokey")
71		{
	70	m_pokey(*this, "xb_pokey"), m_reg(0), m_ram_bank(0)
	71	{
72	72	}
73	73
74	74
75	75	a78_xm_device::a78_xm_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
76	76	: a78_xboard_device(mconfig, A78_XM, "Atari 7800 XM expansion module", tag, owner, clock, "a78_xm", __FILE__),
77		m_ym(*this, "xm_ym2151")
78		{
	77	m_ym(*this, "xm_ym2151"), m_ym_enabled(0)
	78	{
79	79	}
80	80
81	81

trunk/src/devices/bus/a800/a800_slot.cpp

r250251	r250252
104	104	a800_cart_slot_device::a800_cart_slot_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
105	105	device_t(mconfig, type, name, tag, owner, clock, shortname, __FILE__),
106	106	device_image_interface(mconfig, *this),
107		device_slot_interface(mconfig, *this)
	107	device_slot_interface(mconfig, *this), m_cart(nullptr), m_type(0)
108	108	{
109	109	}
110	110
111	111	a800_cart_slot_device::a800_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
112	112	device_t(mconfig, A800_CART_SLOT, "Atari 8bit Cartridge Slot", tag, owner, clock, "a800_cart_slot", __FILE__),
113	113	device_image_interface(mconfig, *this),
114		device_slot_interface(mconfig, *this)
	114	device_slot_interface(mconfig, *this), m_cart(nullptr), m_type(0)
115	115	{
116	116	}
117	117

trunk/src/devices/bus/a800/a8sio.cpp

r250251	r250252
50	50	//-------------------------------------------------
51	51	a8sio_slot_device::a8sio_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
52	52	: device_t(mconfig, A8SIO_SLOT, "Atari 8 bit SIO Slot", tag, owner, clock, "a8sio_slot", __FILE__)
53		, device_slot_interface(mconfig, *this)
	53	, device_slot_interface(mconfig, *this), m_a8sio_tag(nullptr), m_a8sio_slottag(nullptr)
54	54	{
55	55	}
56	56
57	57	a8sio_slot_device::a8sio_slot_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
58	58	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
59		device_slot_interface(mconfig, *this)
	59	device_slot_interface(mconfig, *this), m_a8sio_tag(nullptr), m_a8sio_slottag(nullptr)
60	60	{
61	61	}
62	62
r250251	r250252
102	102	: device_t(mconfig, A8SIO, "Atari 8 biot SIO", tag, owner, clock, "a8sio", __FILE__)
103	103	, m_out_clock_in_cb(*this)
104	104	, m_out_data_in_cb(*this)
105		, m_out_audio_in_cb(*this)
	105	, m_out_audio_in_cb(*this), m_device(nullptr)
106	106	{
107	107	}
108	108
r250251	r250252
110	110	: device_t(mconfig, type, name, tag, owner, clock, shortname, source)
111	111	, m_out_clock_in_cb(*this)
112	112	, m_out_data_in_cb(*this)
113		, m_out_audio_in_cb(*this)
	113	, m_out_audio_in_cb(*this), m_device(nullptr)
114	114	{
115	115	}
116	116
r250251	r250252
182	182	device_a8sio_card_interface::device_a8sio_card_interface(const machine_config &mconfig, device_t &device)
183	183	: device_slot_card_interface(mconfig, device)
184	184	, m_a8sio(NULL)
185		, m_a8sio_tag(NULL)
	185	, m_a8sio_tag(NULL), m_a8sio_slottag(nullptr)
186	186	{
187	187	}
188	188

trunk/src/devices/bus/a800/cassette.cpp

r250251	r250252
47	47	a8sio_cassette_device::a8sio_cassette_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
48	48	: device_t(mconfig, A8SIO_CASSETTE, "Atari 8 bit cassette", tag, owner, clock, "a8sio_cass", __FILE__)
49	49	, device_a8sio_card_interface(mconfig, *this)
50		, m_cassette(*this, "cassette")
51		, m_old_cass_signal(0)
	50	, m_cassette(*this, "cassette"), m_read_timer(nullptr)
	51	, m_old_cass_signal(0)
52	52	, m_signal_count(0)
53	53	{
54	54	}
r250251	r250252
56	56	a8sio_cassette_device::a8sio_cassette_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
57	57	: device_t(mconfig, type, name, tag, owner, clock, shortname, source)
58	58	, device_a8sio_card_interface(mconfig, *this)
59		, m_cassette(*this, "cassette")
60		, m_old_cass_signal(0)
	59	, m_cassette(*this, "cassette"), m_read_timer(nullptr)
	60	, m_old_cass_signal(0)
61	61	, m_signal_count(0)
62	62	{
63	63	}

trunk/src/devices/bus/a800/oss.cpp

r250251	r250252
22	22
23	23
24	24	a800_rom_oss8k_device::a800_rom_oss8k_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
25		: a800_rom_device(mconfig, A800_ROM_OSS8K, "Atari 800 ROM Carts OSS 8K", tag, owner, clock, "a800_oss8k", __FILE__)
26		{
	25	: a800_rom_device(mconfig, A800_ROM_OSS8K, "Atari 800 ROM Carts OSS 8K", tag, owner, clock, "a800_oss8k", __FILE__),
	26	m_bank(0)
	27	{
27	28	}
28	29
29	30
30	31	a800_rom_oss34_device::a800_rom_oss34_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
31		: a800_rom_device(mconfig, A800_ROM_OSS34, "Atari 800 ROM Carts OSS-034M", tag, owner, clock, "a800_034m", __FILE__)
32		{
	32	: a800_rom_device(mconfig, A800_ROM_OSS34, "Atari 800 ROM Carts OSS-034M", tag, owner, clock, "a800_034m", __FILE__), m_bank(0)
	33	{
33	34	}
34	35
35	36
36	37	a800_rom_oss43_device::a800_rom_oss43_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
37		: a800_rom_device(mconfig, A800_ROM_OSS43, "Atari 800 ROM Carts OSS-043M", tag, owner, clock, "a800_043m", __FILE__)
38		{
	38	: a800_rom_device(mconfig, A800_ROM_OSS43, "Atari 800 ROM Carts OSS-043M", tag, owner, clock, "a800_043m", __FILE__), m_bank(0)
	39	{
39	40	}
40	41
41	42
42	43	a800_rom_oss91_device::a800_rom_oss91_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
43		: a800_rom_device(mconfig, A800_ROM_OSS91, "Atari 800 ROM Carts OSS-M091", tag, owner, clock, "a800_m091", __FILE__)
44		{
	44	: a800_rom_device(mconfig, A800_ROM_OSS91, "Atari 800 ROM Carts OSS-M091", tag, owner, clock, "a800_m091", __FILE__), m_bank(0)
	45	{
45	46	}
46	47
47	48

trunk/src/devices/bus/a800/rom.cpp

r250251	r250252
51	51
52	52
53	53	xegs_rom_device::xegs_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
54		: a800_rom_device(mconfig, XEGS_ROM, "Atari XEGS 64K ROM Carts", tag, owner, clock, "a800_xegs", __FILE__)
55		{
	54	: a800_rom_device(mconfig, XEGS_ROM, "Atari XEGS 64K ROM Carts", tag, owner, clock, "a800_xegs", __FILE__), m_bank(0)
	55	{
56	56	}
57	57
58	58
59	59	a800_rom_williams_device::a800_rom_williams_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
60		: a800_rom_device(mconfig, A800_ROM_WILLIAMS, "Atari 800 64K ROM Carts Williams", tag, owner, clock, "a800_williams", __FILE__)
61		{
	60	: a800_rom_device(mconfig, A800_ROM_WILLIAMS, "Atari 800 64K ROM Carts Williams", tag, owner, clock, "a800_williams", __FILE__), m_bank(0)
	61	{
62	62	}
63	63
64	64
65	65	a800_rom_express_device::a800_rom_express_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
66		: a800_rom_device(mconfig, A800_ROM_EXPRESS, "Atari 800 64K ROM Carts Express/Diamond", tag, owner, clock, "a800_express", __FILE__)
67		{
	66	: a800_rom_device(mconfig, A800_ROM_EXPRESS, "Atari 800 64K ROM Carts Express/Diamond", tag, owner, clock, "a800_express", __FILE__), m_bank(0)
	67	{
68	68	}
69	69
70	70
71	71	a800_rom_turbo_device::a800_rom_turbo_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
72		: a800_rom_device(mconfig, A800_ROM_TURBO, "Atari 800 64K ROM Carts Turbosoft", tag, owner, clock, "a800_turbo", __FILE__)
73		{
	72	: a800_rom_device(mconfig, A800_ROM_TURBO, "Atari 800 64K ROM Carts Turbosoft", tag, owner, clock, "a800_turbo", __FILE__), m_bank(0)
	73	{
74	74	}
75	75
76	76
r250251	r250252
81	81
82	82
83	83	a800_rom_microcalc_device::a800_rom_microcalc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
84		: a800_rom_device(mconfig, A800_ROM_MICROCALC, "Atari 800 64K ROM Cart SITSA MicroCalc", tag, owner, clock, "a800_sitsa", __FILE__)
85		{
	84	: a800_rom_device(mconfig, A800_ROM_MICROCALC, "Atari 800 64K ROM Cart SITSA MicroCalc", tag, owner, clock, "a800_sitsa", __FILE__), m_bank(0)
	85	{
86	86	}
87	87
88	88

trunk/src/devices/bus/a800/sparta.cpp

r250251	r250252
19	19
20	20
21	21	a800_rom_spartados_device::a800_rom_spartados_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
22		: a800_rom_device(mconfig, A800_ROM_SPARTADOS, "Atari 800 SpartaDOS ROM Carts", tag, owner, clock, "a800_sparta", __FILE__)
23		{
	22	: a800_rom_device(mconfig, A800_ROM_SPARTADOS, "Atari 800 SpartaDOS ROM Carts", tag, owner, clock, "a800_sparta", __FILE__),
	23	m_bank(0),
	24	m_subslot_enabled(0)
	25	{
24	26	}
25	27
26	28

trunk/src/devices/bus/abcbus/abcbus.cpp

r250251	r250252
49	49	m_write_xint2(*this),
50	50	m_write_xint3(*this),
51	51	m_write_xint4(*this),
52		m_write_xint5(*this),
53		m_trrq(0)
	52	m_write_xint5(*this), m_card(nullptr), m_irq(0), m_nmi(0), m_pren(0),
	53	m_trrq(0), m_xint2(0), m_xint3(0), m_xint4(0), m_xint5(0)
54	54	{
55	55	}
56	56

trunk/src/devices/bus/abcbus/fd2.cpp

r250251	r250252
285	285	m_floppy0(*this, FD1771_TAG ":0"),
286	286	m_floppy1(*this, FD1771_TAG ":1"),
287	287	m_dos_rom(*this, "dos"),
288		m_cs(false)
	288	m_cs(false), m_status(0), m_data(0)
289	289	{
290	290	}
291	291

trunk/src/devices/bus/abcbus/lux10828.cpp

r250251	r250252
413	413	m_floppy1(*this, MB8876_TAG":1"),
414	414	m_sw1(*this, "SW1"),
415	415	m_s1(*this, "S1"),
416		m_cs(false),
	416	m_cs(false), m_status(0), m_data(0),
417	417	m_fdc_irq(0),
418	418	m_fdc_drq(0),
419	419	m_wait_enable(0),

trunk/src/devices/bus/abcbus/lux21046.cpp

r250251	r250252
748	748	m_fdc(*this, SAB1793_TAG),
749	749	m_floppy0(*this, SAB1793_TAG":0"),
750	750	m_floppy1(*this, SAB1793_TAG":1"),
751		m_floppy(NULL),
	751	m_floppy(nullptr),
752	752	m_sw1(*this, "SW1"),
753	753	m_sw2(*this, "SW2"),
754	754	m_sw3(*this, "SW3"),
755		m_cs(false),
	755	m_cs(false), m_status(0), m_out(0), m_inp(0),
756	756	m_fdc_irq(0),
757	757	m_dma_irq(0),
758	758	m_busy(0),
r250251	r250252
768	768	m_fdc(*this, SAB1793_TAG),
769	769	m_floppy0(*this, SAB1793_TAG":0"),
770	770	m_floppy1(*this, SAB1793_TAG":1"),
771		m_floppy(NULL),
	771	m_floppy(nullptr),
772	772	m_sw1(*this, "SW1"),
773	773	m_sw2(*this, "SW2"),
774	774	m_sw3(*this, "SW3"),
775		m_cs(false),
	775	m_cs(false), m_status(0), m_out(0), m_inp(0),
776	776	m_fdc_irq(0),
777	777	m_dma_irq(0),
778	778	m_busy(0),

trunk/src/devices/bus/abcbus/lux21056.cpp

r250251	r250252
352	352	m_sasi_io(0),
353	353	m_sasi_cd(0),
354	354	m_sasi_msg(0),
355		m_sasi_bsy(0),
	355	m_sasi_bsy(0), m_inp(0), m_out(0),
356	356	m_stat(0),
357	357	m_sasi_data(0)
358	358	{

trunk/src/devices/bus/abckb/abc77.cpp

r250251	r250252
439	439	m_x10(*this, "X10"),
440	440	m_x11(*this, "X11"),
441	441	m_dsw(*this, "DSW"),
442		m_txd(1),
	442	m_txd(1), m_keylatch(0),
443	443	m_keydown(1),
444		m_clock(0),
445		m_stb(1)
	444	m_clock(0), m_hys(0), m_reset(0),
	445	m_stb(1), m_j3(0), m_serial_timer(nullptr), m_reset_timer(nullptr)
446	446	{
447	447	}
448	448
r250251	r250252
464	464	m_x10(*this, "X10"),
465	465	m_x11(*this, "X11"),
466	466	m_dsw(*this, "DSW"),
467		m_txd(1),
	467	m_txd(1), m_keylatch(0),
468	468	m_keydown(1),
469		m_clock(0),
470		m_stb(1)
	469	m_clock(0), m_hys(0), m_reset(0),
	470	m_stb(1), m_j3(0), m_serial_timer(nullptr), m_reset_timer(nullptr)
471	471	{
472	472	}
473	473

trunk/src/devices/bus/abckb/abc800kb.cpp

r250251	r250252
352	352	m_txd(1),
353	353	m_clk(0),
354	354	m_stb(1),
355		m_keydown(1)
	355	m_keydown(1), m_serial_timer(nullptr)
356	356	{
357	357	}
358	358

trunk/src/devices/bus/abckb/abc99.cpp

r250251	r250252
487	487
488	488	abc99_device::abc99_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
489	489	device_t(mconfig, ABC99, "Luxor ABC 99", tag, owner, clock, "abc99", __FILE__),
490		abc_keyboard_interface(mconfig, *this),
	490	abc_keyboard_interface(mconfig, *this), m_serial_timer(nullptr), m_mouse_timer(nullptr),
491	491	m_maincpu(*this, I8035_Z2_TAG),
492	492	m_mousecpu(*this, I8035_Z5_TAG),
493	493	m_speaker(*this, "speaker"),

trunk/src/devices/bus/abckb/abckb.cpp

r250251	r250252
47	47	device_slot_interface(mconfig, *this),
48	48	m_out_rx_handler(*this),
49	49	m_out_trxc_handler(*this),
50		m_out_keydown_handler(*this)
	50	m_out_keydown_handler(*this), m_card(nullptr)
51	51	{
52	52	}
53	53

trunk/src/devices/bus/adam/exp.cpp

r250251	r250252
55	55	device_t(mconfig, ADAM_EXPANSION_SLOT, "ADAM expansion slot", tag, owner, clock, "adam_expansion_slot", __FILE__),
56	56	device_slot_interface(mconfig, *this),
57	57	device_image_interface(mconfig, *this),
58		m_write_irq(*this)
	58	m_write_irq(*this), m_card(nullptr)
59	59	{
60	60	}
61	61

trunk/src/devices/bus/adam/ide.cpp

r250251	r250252
92	92	: device_t(mconfig, ADAM_IDE, "Powermate HP IDE", tag, owner, clock, "adam_ide", __FILE__),
93	93	device_adam_expansion_slot_card_interface(mconfig, *this),
94	94	m_ata(*this, ATA_TAG),
95		m_cent_data_out(*this, "cent_data_out")
	95	m_cent_data_out(*this, "cent_data_out"), m_ata_data(0)
96	96	{
97	97	}
98	98

trunk/src/devices/bus/adamnet/adamnet.cpp

r250251	r250252
28	28	//-------------------------------------------------
29	29
30	30	device_adamnet_card_interface::device_adamnet_card_interface(const machine_config &mconfig, device_t &device)
31		: device_slot_card_interface(mconfig, device)
	31	: device_slot_card_interface(mconfig, device),
	32	m_bus(nullptr)
32	33	{
33	34	}
34	35
r250251	r250252
52	53	//-------------------------------------------------
53	54	adamnet_slot_device::adamnet_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
54	55	device_t(mconfig, ADAMNET_SLOT, "ADAMnet slot", tag, owner, clock, "adamnet_slot", __FILE__),
55		device_slot_interface(mconfig, *this)
	56	device_slot_interface(mconfig, *this), m_bus(nullptr)
56	57	{
57	58	}
58	59

trunk/src/devices/bus/adamnet/ddp.cpp

r250251	r250252
123	123	device_adamnet_card_interface(mconfig, *this),
124	124	m_maincpu(*this, M6801_TAG),
125	125	m_ddp0(*this, "cassette"),
126		m_ddp1(*this, "cassette2")
	126	m_ddp1(*this, "cassette2"), m_wr0(0), m_wr1(0), m_track(0)
127	127	{
128	128	}
129	129

trunk/src/devices/bus/apf/slot.cpp

r250251	r250252
76	76	device_t(mconfig, APF_CART_SLOT, "APF Cartridge Slot", tag, owner, clock, "apf_cart_slot", __FILE__),
77	77	device_image_interface(mconfig, *this),
78	78	device_slot_interface(mconfig, *this),
79		m_type(APF_STD)
	79	m_type(APF_STD), m_cart(nullptr)
80	80	{
81	81	}
82	82

trunk/src/devices/bus/apricot/expansion.cpp

r250251	r250252
69	69	m_ext1_handler(*this),
70	70	m_ext2_handler(*this),
71	71	m_int2_handler(*this),
72		m_int3_handler(*this)
	72	m_int3_handler(*this), m_cpu_tag(nullptr), m_iop_tag(nullptr)
73	73	{
74	74	}
75	75

trunk/src/devices/bus/arcadia/slot.cpp

r250251	r250252
66	66	device_t(mconfig, EA2001_CART_SLOT, "Emerson Arcadia Cartridge Slot", tag, owner, clock, "arcadia_cart_slot", __FILE__),
67	67	device_image_interface(mconfig, *this),
68	68	device_slot_interface(mconfig, *this),
69		m_type(ARCADIA_STD)
	69	m_type(ARCADIA_STD), m_cart(nullptr)
70	70	{
71	71	}
72	72

trunk/src/devices/bus/astrocde/exp.cpp

r250251	r250252
38	38	astrocade_exp_device::astrocade_exp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
39	39	device_t(mconfig, ASTROCADE_EXP_SLOT, "Bally Astrocade expansion", tag, owner, clock, "astrocde_exp", __FILE__),
40	40	device_slot_interface(mconfig, *this),
41		m_card_mounted(false)
	41	m_card_mounted(false), m_card(nullptr)
42	42	{
43	43	}
44	44

trunk/src/devices/bus/astrocde/rom.cpp

r250251	r250252
35	35	}
36	36
37	37	astrocade_rom_256k_device::astrocade_rom_256k_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
38		: astrocade_rom_device(mconfig, ASTROCADE_ROM_256K, "Bally Astrocade 256K Carts", tag, owner, clock, "astrocade_256k", __FILE__)
39		{
	38	: astrocade_rom_device(mconfig, ASTROCADE_ROM_256K, "Bally Astrocade 256K Carts", tag, owner, clock, "astrocade_256k", __FILE__), m_base_bank(0)
	39	{
40	40	}
41	41
42	42	astrocade_rom_512k_device::astrocade_rom_512k_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
43		: astrocade_rom_device(mconfig, ASTROCADE_ROM_512K, "Bally Astrocade 512K Carts", tag, owner, clock, "astrocade_512k", __FILE__)
44		{
	43	: astrocade_rom_device(mconfig, ASTROCADE_ROM_512K, "Bally Astrocade 512K Carts", tag, owner, clock, "astrocade_512k", __FILE__), m_base_bank(0)
	44	{
45	45	}
46	46
47	47

trunk/src/devices/bus/astrocde/slot.cpp

r250251	r250252
66	66	device_t(mconfig, ASTROCADE_CART_SLOT, "Bally Astrocade Cartridge Slot", tag, owner, clock, "astrocade_cart_slot", __FILE__),
67	67	device_image_interface(mconfig, *this),
68	68	device_slot_interface(mconfig, *this),
69		m_type(ASTROCADE_STD)
	69	m_type(ASTROCADE_STD), m_cart(nullptr)
70	70	{
71	71	}
72	72

trunk/src/devices/bus/bml3/bml3bus.cpp

r250251	r250252
62	62	//-------------------------------------------------
63	63	bml3bus_slot_device::bml3bus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
64	64	device_t(mconfig, BML3BUS_SLOT, "Hitachi MB-6890 Slot", tag, owner, clock, "bml3bus_slot", __FILE__),
65		device_slot_interface(mconfig, *this)
	65	device_slot_interface(mconfig, *this), m_bml3bus_tag(nullptr), m_bml3bus_slottag(nullptr)
66	66	{
67	67	}
68	68
69	69	bml3bus_slot_device::bml3bus_slot_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
70	70	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
71		device_slot_interface(mconfig, *this)
	71	device_slot_interface(mconfig, *this), m_bml3bus_tag(nullptr), m_bml3bus_slottag(nullptr)
72	72	{
73	73	}
74	74
r250251	r250252
111	111	//-------------------------------------------------
112	112
113	113	bml3bus_device::bml3bus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
114		device_t(mconfig, BML3BUS, "Hitachi MB-6890 Bus", tag, owner, clock, "bml3bus", __FILE__),
	114	device_t(mconfig, BML3BUS, "Hitachi MB-6890 Bus", tag, owner, clock, "bml3bus", __FILE__), m_maincpu(nullptr),
115	115	m_out_nmi_cb(*this),
116	116	m_out_irq_cb(*this),
117		m_out_firq_cb(*this)
	117	m_out_firq_cb(*this), m_cputag(nullptr)
118	118	{
119	119	}
120	120
121	121	bml3bus_device::bml3bus_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
122		device_t(mconfig, type, name, tag, owner, clock, shortname, source),
	122	device_t(mconfig, type, name, tag, owner, clock, shortname, source), m_maincpu(nullptr),
123	123	m_out_nmi_cb(*this),
124	124	m_out_irq_cb(*this),
125		m_out_firq_cb(*this)
	125	m_out_firq_cb(*this), m_cputag(nullptr)
126	126	{
127	127	}
128	128	//-------------------------------------------------
r250251	r250252
203	203
204	204	device_bml3bus_card_interface::device_bml3bus_card_interface(const machine_config &mconfig, device_t &device)
205	205	: device_slot_card_interface(mconfig, device),
206		m_bml3bus(NULL),
207		m_bml3bus_tag(NULL)
	206	m_bml3bus(nullptr),
	207	m_bml3bus_tag(nullptr), m_bml3bus_slottag(nullptr), m_slot(0), m_next(nullptr)
208	208	{
209	209	}
210	210

trunk/src/devices/bus/bml3/bml3kanji.cpp

r250251	r250252
74	74
75	75	bml3bus_kanji_device::bml3bus_kanji_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
76	76	device_t(mconfig, BML3BUS_KANJI, "Hitachi MP-9740 Kanji Character ROM Card", tag, owner, clock, "bml3kanji", __FILE__),
77		device_bml3bus_card_interface(mconfig, *this)
	77	device_bml3bus_card_interface(mconfig, *this), m_kanji_addr(0), m_rom(nullptr)
78	78	{
79	79	}
80	80

trunk/src/devices/bus/bml3/bml3mp1802.cpp

r250251	r250252
113	113	m_floppy0(*this, "fdc:0"),
114	114	m_floppy1(*this, "fdc:1"),
115	115	m_floppy2(*this, "fdc:2"),
116		m_floppy3(*this, "fdc:3")
	116	m_floppy3(*this, "fdc:3"), m_rom(nullptr)
117	117	{
118	118	}
119	119

trunk/src/devices/bus/bml3/bml3mp1805.cpp

r250251	r250252
140	140	bml3bus_mp1805_device::bml3bus_mp1805_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
141	141	device_t(mconfig, BML3BUS_MP1805, "Hitachi MP-1805 Floppy Controller Card", tag, owner, clock, "bml3mp1805", __FILE__),
142	142	device_bml3bus_card_interface(mconfig, *this),
143		m_mc6843(*this, "mc6843")
	143	m_mc6843(*this, "mc6843"), m_rom(nullptr)
144	144	{
145	145	}
146	146

trunk/src/devices/bus/bw2/exp.cpp

r250251	r250252
53	53
54	54	bw2_expansion_slot_device::bw2_expansion_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
55	55	device_t(mconfig, BW2_EXPANSION_SLOT, "Bondwell 2 expansion port", tag, owner, clock, "bw2_expansion_slot", __FILE__),
56		device_slot_interface(mconfig, *this)
	56	device_slot_interface(mconfig, *this), m_cart(nullptr)
57	57	{
58	58	}
59	59

trunk/src/devices/bus/c64/bn1541.cpp

r250251	r250252
37	37	//-------------------------------------------------
38	38
39	39	device_c64_floppy_parallel_interface::device_c64_floppy_parallel_interface(const machine_config &mconfig, device_t &device) :
40		m_other(NULL)
	40	m_other(nullptr), m_parallel_data(0)
41	41	{
42	42	}
43	43
r250251	r250252
63	63	c64_bn1541_device::c64_bn1541_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
64	64	device_t(mconfig, C64_BN1541, "C64 Burst Nibbler 1541/1571 Parallel Cable", tag, owner, clock, "c64_bn1541", __FILE__),
65	65	device_pet_user_port_interface(mconfig, *this),
66		device_c64_floppy_parallel_interface(mconfig, *this)
	66	device_c64_floppy_parallel_interface(mconfig, *this), m_parallel_output(0)
67	67	{
68	68	}
69	69

trunk/src/devices/bus/c64/c128_partner.cpp

r250251	r250252
80	80	device_t(mconfig, C128_PARTNER, "PARTNER 128", tag, owner, clock, "c128_partner", __FILE__),
81	81	device_c64_expansion_card_interface(mconfig, *this),
82	82	//device_vcs_control_port_interface(mconfig, *this),
83		m_ram(*this, "ram"),
	83	m_ram(*this, "ram"), t_joyb2(nullptr),
84	84	m_ram_a12_a7(0),
85	85	m_ls74_cd(0),
86	86	m_ls74_q1(0),

trunk/src/devices/bus/c64/comal80.cpp

r250251	r250252
28	28
29	29	c64_comal80_cartridge_device::c64_comal80_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
30	30	device_t(mconfig, C64_COMAL80, "C64 COMAL 80 cartridge", tag, owner, clock, "c64_comal80", __FILE__),
31		device_c64_expansion_card_interface(mconfig, *this)
	31	device_c64_expansion_card_interface(mconfig, *this),
	32	m_bank(0)
32	33	{
33	34	}
34	35

trunk/src/devices/bus/c64/cpm.cpp

r250251	r250252
134	134	device_c64_expansion_card_interface(mconfig, *this),
135	135	m_maincpu(*this, Z80_TAG),
136	136	m_enabled(0),
137		m_ba(1)
	137	m_ba(1), m_reset(0)
138	138	{
139	139	}
140	140

trunk/src/devices/bus/c64/dela_ep64.cpp

r250251	r250252
52	52	device_t(mconfig, C64_DELA_EP64, "C64 Rex 64KB EPROM cartridge", tag, owner, clock, "c64_dela_ep64", __FILE__),
53	53	device_c64_expansion_card_interface(mconfig, *this),
54	54	m_eprom1(*this, "eprom1"),
55		m_eprom2(*this, "eprom2")
	55	m_eprom2(*this, "eprom2"), m_bank(0), m_reset(0), m_rom0_ce(0), m_rom1_ce(0), m_rom2_ce(0)
56	56	{
57	57	}
58	58

trunk/src/devices/bus/c64/dela_ep7x8.cpp

r250251	r250252
67	67	m_eprom4(*this, "rom4"),
68	68	m_eprom5(*this, "rom5"),
69	69	m_eprom6(*this, "rom6"),
70		m_eprom7(*this, "rom7")
	70	m_eprom7(*this, "rom7"), m_bank(0)
71	71	{
72	72	}
73	73

trunk/src/devices/bus/c64/dinamic.cpp

r250251	r250252
28	28
29	29	c64_dinamic_cartridge_device::c64_dinamic_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
30	30	device_t(mconfig, C64_DINAMIC, "C64 Dinamic cartridge", tag, owner, clock, "c64_dinamic", __FILE__),
31		device_c64_expansion_card_interface(mconfig, *this)
	31	device_c64_expansion_card_interface(mconfig, *this),
	32	m_bank(0)
32	33	{
33	34	}
34	35

trunk/src/devices/bus/c64/dqbb.cpp

r250251	r250252
38	38	c64_dqbb_cartridge_device::c64_dqbb_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
39	39	device_t(mconfig, C64_DQBB, "C64 Double Quick Brown Box cartridge", tag, owner, clock, "c64_dqbb", __FILE__),
40	40	device_c64_expansion_card_interface(mconfig, *this),
41		device_nvram_interface(mconfig, *this)
	41	device_nvram_interface(mconfig, *this),
	42	m_cs(0),
	43	m_we(0)
42	44	{
43	45	}
44	46

trunk/src/devices/bus/c64/easy_calc_result.cpp

r250251	r250252
49	49
50	50	c64_easy_calc_result_cartridge_device::c64_easy_calc_result_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
51	51	device_t(mconfig, C64_EASY_CALC_RESULT, "C64 Easy Calc Result cartridge", tag, owner, clock, "c64_easy_calc_result", __FILE__),
52		device_c64_expansion_card_interface(mconfig, *this)
	52	device_c64_expansion_card_interface(mconfig, *this), m_bank(0)
53	53	{
54	54	}
55	55

trunk/src/devices/bus/c64/epyx_fast_load.cpp

r250251	r250252
38	38
39	39	c64_epyx_fast_load_cartridge_device::c64_epyx_fast_load_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
40	40	device_t(mconfig, C64_EPYX_FAST_LOAD, "C64 Epyx Fast Load cartridge", tag, owner, clock, "c64_epyx_fast_load", __FILE__),
41		device_c64_expansion_card_interface(mconfig, *this)
	41	device_c64_expansion_card_interface(mconfig, *this), m_exrom_timer(nullptr)
42	42	{
43	43	}
44	44

trunk/src/devices/bus/c64/exp.cpp

r250251	r250252
65	65	m_write_irq(*this),
66	66	m_write_nmi(*this),
67	67	m_write_dma(*this),
68		m_write_reset(*this)
	68	m_write_reset(*this), m_card(nullptr), m_hiram(0)
69	69	{
70	70	}
71	71

trunk/src/devices/bus/c64/final3.cpp

r250251	r250252
65	65
66	66	c64_final3_cartridge_device::c64_final3_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
67	67	device_t(mconfig, C64_FINAL3, "C64 Final Cartridge III", tag, owner, clock, "c64_final3", __FILE__),
68		device_c64_expansion_card_interface(mconfig, *this)
	68	device_c64_expansion_card_interface(mconfig, *this), m_bank(0), m_hidden(0)
69	69	{
70	70	}
71	71

trunk/src/devices/bus/c64/fun_play.cpp

r250251	r250252
28	28
29	29	c64_fun_play_cartridge_device::c64_fun_play_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
30	30	device_t(mconfig, C64_FUN_PLAY, "C64 Fun Play cartridge", tag, owner, clock, "c64_fun_play", __FILE__),
31		device_c64_expansion_card_interface(mconfig, *this)
	31	device_c64_expansion_card_interface(mconfig, *this),
	32	m_bank(0)
32	33	{
33	34	}
34	35

trunk/src/devices/bus/c64/georam.cpp

r250251	r250252
29	29	c64_georam_cartridge_device::c64_georam_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
30	30	device_t(mconfig, C64_GEORAM, "C64 GeoRAM cartridge", tag, owner, clock, "c64_georam", __FILE__),
31	31	device_c64_expansion_card_interface(mconfig, *this),
32		m_ram(*this, "ram")
	32	m_ram(*this, "ram"),
	33	m_bank(0)
33	34	{
34	35	}
35	36

trunk/src/devices/bus/c64/ide64.cpp

r250251	r250252
101	101	m_rtc(*this, DS1302_TAG),
102	102	m_ata(*this, ATA_TAG),
103	103	m_jp1(*this, "JP1"),
104		m_ram(*this, "ram")
	104	m_ram(*this, "ram"), m_bank(0), m_ata_data(0), m_wp(0), m_enable(0)
105	105	{
106	106	}
107	107

trunk/src/devices/bus/c64/mach5.cpp

r250251	r250252
54	54	c64_mach5_cartridge_device::c64_mach5_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
55	55	device_t(mconfig, C64_MACH5, "C64 MACH5 cartridge", tag, owner, clock, "c64_mach5", __FILE__),
56	56	device_c64_expansion_card_interface(mconfig, *this),
57		m_s1(*this, "S1")
	57	m_s1(*this, "S1"), m_c128(false)
58	58	{
59	59	}
60	60

trunk/src/devices/bus/c64/magic_desk.cpp

r250251	r250252
28	28
29	29	c64_magic_desk_cartridge_device::c64_magic_desk_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
30	30	device_t(mconfig, C64_MAGIC_DESK, "C64 Magic Desk cartridge", tag, owner, clock, "c64_magic_desk", __FILE__),
31		device_c64_expansion_card_interface(mconfig, *this)
	31	device_c64_expansion_card_interface(mconfig, *this),
	32	m_bank(0)
32	33	{
33	34	}
34	35

trunk/src/devices/bus/c64/magic_voice.cpp

r250251	r250252
266	266	m_vslsi(*this, T6721A_TAG),
267	267	m_tpi(*this, MOS6525_TAG),
268	268	m_fifo(*this, CMOS40105_TAG),
269		m_exp(*this, C64_EXPANSION_SLOT_TAG),
	269	m_exp(*this, C64_EXPANSION_SLOT_TAG), m_ca(0),
270	270	m_tpi_pb(0x60),
271	271	m_tpi_pc6(1),
272	272	m_pd(0)

trunk/src/devices/bus/c64/multiscreen.cpp

r250251	r250252
141	141
142	142	c64_multiscreen_cartridge_device::c64_multiscreen_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
143	143	device_t(mconfig, C64_MULTISCREEN, "C64 Multiscreen cartridge", tag, owner, clock, "c64_mscr", __FILE__),
144		device_c64_expansion_card_interface(mconfig, *this)
	144	device_c64_expansion_card_interface(mconfig, *this), m_bank(0)
145	145	{
146	146	}
147	147

trunk/src/devices/bus/c64/neoram.cpp

r250251	r250252
29	29	c64_neoram_cartridge_device::c64_neoram_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
30	30	device_t(mconfig, C64_NEORAM, "C64 NeoRAM cartridge", tag, owner, clock, "c64_neoram", __FILE__),
31	31	device_c64_expansion_card_interface(mconfig, *this),
32		device_nvram_interface(mconfig, *this)
	32	device_nvram_interface(mconfig, *this),
	33	m_bank(0)
33	34	{
34	35	}
35	36

trunk/src/devices/bus/c64/pagefox.cpp

r250251	r250252
51	51	c64_pagefox_cartridge_device::c64_pagefox_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
52	52	device_t(mconfig, C64_PAGEFOX, "C64 Pagefox cartridge", tag, owner, clock, "c64_pagefox", __FILE__),
53	53	device_c64_expansion_card_interface(mconfig, *this),
54		m_ram(*this, "ram")
	54	m_ram(*this, "ram"), m_bank(0)
55	55	{
56	56	}
57	57

trunk/src/devices/bus/c64/ross.cpp

r250251	r250252
28	28
29	29	c64_ross_cartridge_device::c64_ross_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
30	30	device_t(mconfig, C64_ROSS, "C64 Ross cartridge", tag, owner, clock, "c64_ross", __FILE__),
31		device_c64_expansion_card_interface(mconfig, *this)
	31	device_c64_expansion_card_interface(mconfig, *this), m_bank(0)
32	32	{
33	33	}
34	34

trunk/src/devices/bus/c64/silverrock.cpp

r250251	r250252
61	61
62	62	c64_silverrock_cartridge_device::c64_silverrock_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
63	63	device_t(mconfig, C64_SILVERROCK, "C64 SilverRock cartridge", tag, owner, clock, "c64_silverrock", __FILE__),
64		device_c64_expansion_card_interface(mconfig, *this)
	64	device_c64_expansion_card_interface(mconfig, *this), m_bank(0)
65	65	{
66	66	}
67	67

trunk/src/devices/bus/c64/structured_basic.cpp

r250251	r250252
28	28
29	29	c64_structured_basic_cartridge_device::c64_structured_basic_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
30	30	device_t(mconfig, C64_STRUCTURED_BASIC, "C64 Structured Basic cartridge", tag, owner, clock, "c64_structured_basic", __FILE__),
31		device_c64_expansion_card_interface(mconfig, *this)
	31	device_c64_expansion_card_interface(mconfig, *this),
	32	m_bank(0)
32	33	{
33	34	}
34	35

trunk/src/devices/bus/c64/super_explode.cpp

r250251	r250252
38	38
39	39	c64_super_explode_cartridge_device::c64_super_explode_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
40	40	device_t(mconfig, C64_SUPER_EXPLODE, "C64 Super Explode! cartridge", tag, owner, clock, "c64_super_explode", __FILE__),
41		device_c64_expansion_card_interface(mconfig, *this)
	41	device_c64_expansion_card_interface(mconfig, *this), m_bank(0), m_exrom_timer(nullptr)
42	42	{
43	43	}
44	44

trunk/src/devices/bus/c64/super_games.cpp

r250251	r250252
28	28
29	29	c64_super_games_cartridge_device::c64_super_games_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
30	30	device_t(mconfig, C64_SUPER_GAMES, "C64 Super Games cartridge", tag, owner, clock, "c64_super_games", __FILE__),
31		device_c64_expansion_card_interface(mconfig, *this)
	31	device_c64_expansion_card_interface(mconfig, *this),
	32	m_bank(0)
32	33	{
33	34	}
34	35

trunk/src/devices/bus/c64/sw8k.cpp

r250251	r250252
74	74	c64_switchable_8k_cartridge_device::c64_switchable_8k_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
75	75	device_t(mconfig, C64_SW8K, "C64 Switchable 8K cartridge", tag, owner, clock, "c64_sw8k", __FILE__),
76	76	device_c64_expansion_card_interface(mconfig, *this),
77		m_sw(*this, "SW")
	77	m_sw(*this, "SW"), m_bank(0)
78	78	{
79	79	}
80	80

trunk/src/devices/bus/c64/swiftlink.cpp

r250251	r250252
104	104	device_c64_expansion_card_interface(mconfig, *this),
105	105	m_acia(*this, MOS6551_TAG),
106	106	m_io_cs(*this, "CS"),
107		m_io_irq(*this, "IRQ")
	107	m_io_irq(*this, "IRQ"), m_cs(0), m_irq(0)
108	108	{
109	109	}
110	110

trunk/src/devices/bus/c64/system3.cpp

r250251	r250252
28	28
29	29	c64_system3_cartridge_device::c64_system3_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
30	30	device_t(mconfig, C64_SYSTEM3, "C64 System 3 cartridge", tag, owner, clock, "c64_system3", __FILE__),
31		device_c64_expansion_card_interface(mconfig, *this)
	31	device_c64_expansion_card_interface(mconfig, *this),
	32	m_bank(0)
32	33	{
33	34	}
34	35

trunk/src/devices/bus/c64/tdos.cpp

r250251	r250252
206	206	device_c64_expansion_card_interface(mconfig, *this),
207	207	m_ssda(*this, MC68A52P_TAG),
208	208	m_exp(*this, C64_EXPANSION_SLOT_TAG),
209		m_sw1(*this, "SW1")
	209	m_sw1(*this, "SW1"), m_enabled(false)
210	210	{
211	211	}
212	212

trunk/src/devices/bus/c64/turbo232.cpp

r250251	r250252
104	104	m_acia(*this, MOS6551_TAG),
105	105	m_rs232(*this, RS232_TAG),
106	106	m_io_cs(*this, "CS"),
107		m_io_irq(*this, "IRQ")
	107	m_io_irq(*this, "IRQ"), m_cs(0), m_irq(0), m_es(0)
108	108	{
109	109	}
110	110

trunk/src/devices/bus/c64/vw64.cpp

r250251	r250252
68	68
69	69	c64_vizawrite_cartridge_device::c64_vizawrite_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
70	70	device_t(mconfig, C64_VW64, "VizaWrite 64", tag, owner, clock, "c64_vizawrite", __FILE__),
71		device_c64_expansion_card_interface(mconfig, *this)
	71	device_c64_expansion_card_interface(mconfig, *this), m_game_timer(nullptr)
72	72	{
73	73	}
74	74

trunk/src/devices/bus/c64/zaxxon.cpp

r250251	r250252
28	28
29	29	c64_zaxxon_cartridge_device::c64_zaxxon_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
30	30	device_t(mconfig, C64_ZAXXON, "C64 Zaxxon cartridge", tag, owner, clock, "c64_zaxxon", __FILE__),
31		device_c64_expansion_card_interface(mconfig, *this)
	31	device_c64_expansion_card_interface(mconfig, *this),
	32	m_bank(0)
32	33	{
33	34	}
34	35

trunk/src/devices/bus/cbm2/exp.cpp

r250251	r250252
65	65	cbm2_expansion_slot_device::cbm2_expansion_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
66	66	device_t(mconfig, CBM2_EXPANSION_SLOT, "CBM-II expansion port", tag, owner, clock, "cbm2_expansion_slot", __FILE__),
67	67	device_slot_interface(mconfig, *this),
68		device_image_interface(mconfig, *this)
	68	device_image_interface(mconfig, *this), m_card(nullptr)
69	69	{
70	70	}
71	71

trunk/src/devices/bus/cbm2/user.cpp

r250251	r250252
48	48	m_write_irq(*this),
49	49	m_write_sp(*this),
50	50	m_write_cnt(*this),
51		m_write_flag(*this)
	51	m_write_flag(*this), m_card(nullptr)
52	52	{
53	53	}
54	54

trunk/src/devices/bus/cbmiec/cbmiec.cpp

r250251	r250252
222	222	//-------------------------------------------------
223	223
224	224	device_cbm_iec_interface::device_cbm_iec_interface(const machine_config &mconfig, device_t &device)
225		: device_slot_card_interface(mconfig, device)
	225	: device_slot_card_interface(mconfig, device), m_next(nullptr), m_bus(nullptr), m_slot(nullptr)
226	226	{
227	227	}
228	228
r250251	r250252
247	247
248	248	cbm_iec_slot_device::cbm_iec_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
249	249	device_t(mconfig, CBM_IEC_SLOT, "CBM IEC slot", tag, owner, clock, "cbm_iec_slot", __FILE__),
250		device_slot_interface(mconfig, *this)
	250	device_slot_interface(mconfig, *this), m_address(0)
251	251	{
252	252	}
253	253

trunk/src/devices/bus/centronics/comxpl80.cpp

r250251	r250252
163	163	device_centronics_peripheral_interface(mconfig, *this),
164	164	m_plotter(*this, "PLOTTER"),
165	165	m_font(*this, "FONT"),
166		m_sw(*this, "SW")
	166	m_sw(*this, "SW"), m_font_addr(0), m_x_motor_phase(0), m_y_motor_phase(0), m_z_motor_phase(0), m_plotter_data(0), m_plotter_ack(0), m_plotter_online(0), m_data(0)
167	167	{
168	168	}
169	169

trunk/src/devices/bus/centronics/covox.cpp

r250251	r250252
92	92	: device_t(mconfig, CENTRONICS_COVOX_STEREO, "Covox (Stereo-in-1)", tag, owner, clock, "covox_stereo", __FILE__),
93	93	device_centronics_peripheral_interface( mconfig, *this ),
94	94	m_dac_left(*this, "dac_left"),
95		m_dac_right(*this, "dac_right"),
96		m_data(0)
	95	m_dac_right(*this, "dac_right"), m_strobe(0),
	96	m_data(0), m_autofd(0)
97	97	{
98	98	}
99	99

trunk/src/devices/bus/centronics/epson_ex800.cpp

r250251	r250252
361	361	device_t(mconfig, EPSON_EX800, "Epson EX-800", tag, owner, clock, "ex800", __FILE__),
362	362	device_centronics_peripheral_interface(mconfig, *this),
363	363	m_maincpu(*this, "maincpu"),
364		m_beeper(*this, "beeper")
	364	m_beeper(*this, "beeper"), m_irq_state(0)
365	365	{
366	366	}
367	367

trunk/src/devices/bus/centronics/epson_lx810l.cpp

r250251	r250252
302	302	m_cr_pos_abs(1),
303	303	m_real_cr_pos(1),
304	304	m_real_cr_steps(0),
305		m_real_cr_dir(0)
	305	m_real_cr_dir(0), m_fakemem(0)
306	306	{
307	307	}
308	308
r250251	r250252
323	323	m_cr_pos_abs(1),
324	324	m_real_cr_pos(1),
325	325	m_real_cr_steps(0),
326		m_real_cr_dir(0)
	326	m_real_cr_dir(0), m_fakemem(0)
327	327	{
328	328	}
329	329

trunk/src/devices/bus/centronics/printer.cpp

r250251	r250252
27	27	centronics_printer_device::centronics_printer_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
28	28	device_t(mconfig, CENTRONICS_PRINTER, "Centronics Printer", tag, owner, clock, "centronics_printer", __FILE__),
29	29	device_centronics_peripheral_interface( mconfig, *this ),
30		m_strobe(0),
	30	m_strobe(0),
	31	m_data(0),
	32	m_busy(0),
31	33	m_printer(*this, "printer")
32	34	{
33	35	}

trunk/src/devices/bus/chanf/rom.cpp

r250251	r250252
33	33
34	34	chanf_rom_device::chanf_rom_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
35	35	: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
36		device_channelf_cart_interface( mconfig, *this )
37		{
	36	device_channelf_cart_interface( mconfig, *this ), m_addr_latch(0), m_addr(0), m_read_write(0), m_data0(0)
	37	{
38	38	}
39	39
40	40	chanf_rom_device::chanf_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
41	41	: device_t(mconfig, CHANF_ROM_STD, "Channel F Standard Carts", tag, owner, clock, "chanf_rom", __FILE__),
42		device_channelf_cart_interface( mconfig, *this )
43		{
	42	device_channelf_cart_interface( mconfig, *this ), m_addr_latch(0), m_addr(0), m_read_write(0), m_data0(0)
	43	{
44	44	}
45	45
46	46	chanf_maze_device::chanf_maze_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
59	59	}
60	60
61	61	chanf_multi_old_device::chanf_multi_old_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
62		: chanf_rom_device(mconfig, CHANF_ROM_MULTI_OLD, "Channel F Multigame (Earlier Version) Cart", tag, owner, clock, "chanf_multi_old", __FILE__)
63		{
	62	: chanf_rom_device(mconfig, CHANF_ROM_MULTI_OLD, "Channel F Multigame (Earlier Version) Cart", tag, owner, clock, "chanf_multi_old", __FILE__), m_base_bank(0)
	63	{
64	64	}
65	65
66	66	chanf_multi_final_device::chanf_multi_final_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
67		: chanf_rom_device(mconfig, CHANF_ROM_MULTI_FINAL, "Channel F Multigame (Final Version) Cart", tag, owner, clock, "chanf_multi_fin", __FILE__)
68		{
	67	: chanf_rom_device(mconfig, CHANF_ROM_MULTI_FINAL, "Channel F Multigame (Final Version) Cart", tag, owner, clock, "chanf_multi_fin", __FILE__), m_base_bank(0), m_half_bank(0)
	68	{
69	69	}
70	70
71	71

trunk/src/devices/bus/chanf/slot.cpp

r250251	r250252
76	76	device_t(mconfig, CHANF_CART_SLOT, "Fairchild Channel F Cartridge Slot", tag, owner, clock, "cf_cart_slot", __FILE__),
77	77	device_image_interface(mconfig, *this),
78	78	device_slot_interface(mconfig, *this),
79		m_type(CF_CHESS)
	79	m_type(CF_CHESS), m_cart(nullptr)
80	80	{
81	81	}
82	82

trunk/src/devices/bus/coco/coco_dwsock.cpp

r250251	r250252
66	66	//-------------------------------------------------
67	67
68	68	beckerport_device::beckerport_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
69		: device_t(mconfig, COCO_DWSOCK, "Virtual Becker Port", tag, owner, clock, "coco_dwsock", __FILE__),
70		m_dwconfigport(*this, DRIVEWIRE_PORT_TAG)
	69	: device_t(mconfig, COCO_DWSOCK, "Virtual Becker Port", tag, owner, clock, "coco_dwsock", __FILE__), m_hostname(nullptr),
	70	m_dwconfigport(*this, DRIVEWIRE_PORT_TAG), m_dwtcpport(0)
71	71	{
72	72	m_pSocket = NULL;
73	73	m_head = 0;

trunk/src/devices/bus/coco/coco_fdc.cpp

r250251	r250252
179	179	//-------------------------------------------------
180	180	coco_fdc_device::coco_fdc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
181	181	: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
182		device_cococart_interface( mconfig, *this ),
	182	device_cococart_interface( mconfig, *this ), m_owner(nullptr), m_dskreg(0), m_drq(0), m_intrq(0),
183	183	m_wd17xx(*this, WD_TAG),
184	184	m_wd2797(*this, WD2797_TAG),
185	185	m_ds1315(*this, CLOUD9_TAG),
186		m_disto_msm6242(*this, DISTO_TAG)
	186	m_disto_msm6242(*this, DISTO_TAG), m_msm6242_rtc_address(0)
187	187	{
188	188	}
189	189
190	190	coco_fdc_device::coco_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
191	191	: device_t(mconfig, COCO_FDC, "CoCo FDC", tag, owner, clock, "coco_fdc", __FILE__),
192		device_cococart_interface( mconfig, *this ),
	192	device_cococart_interface( mconfig, *this ), m_owner(nullptr), m_dskreg(0), m_drq(0), m_intrq(0),
193	193	m_wd17xx(*this, WD_TAG),
194	194	m_wd2797(*this, WD2797_TAG),
195	195	m_ds1315(*this, CLOUD9_TAG),
196		m_disto_msm6242(*this, DISTO_TAG)
197		{
	196	m_disto_msm6242(*this, DISTO_TAG), m_msm6242_rtc_address(0)
	197	{
198	198	}
199	199
200	200	//-------------------------------------------------

trunk/src/devices/bus/coco/coco_multi.cpp

r250251	r250252
140	140
141	141	coco_multipak_device::coco_multipak_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
142	142	: device_t(mconfig, COCO_MULTIPAK, "CoCo Multi-Pak Interface", tag, owner, clock, "coco_multipak", __FILE__),
143		device_cococart_interface( mconfig, *this )
144		{
	143	device_cococart_interface( mconfig, *this ), m_owner(nullptr), m_select(0)
	144	{
145	145	}
146	146
147	147

trunk/src/devices/bus/coco/coco_orch90.cpp

r250251	r250252
40	40
41	41	coco_orch90_device::coco_orch90_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
42	42	: device_t(mconfig, COCO_ORCH90, "CoCo Orch-90 PAK", tag, owner, clock, "coco_orch90", __FILE__),
43		device_cococart_interface( mconfig, *this )
44		{
	43	device_cococart_interface( mconfig, *this ), m_left_dac(nullptr), m_right_dac(nullptr)
	44	{
45	45	}
46	46
47	47	//-------------------------------------------------

trunk/src/devices/bus/coco/coco_pak.cpp

r250251	r250252
41	41	//-------------------------------------------------
42	42	coco_pak_device::coco_pak_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
43	43	: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
44		device_cococart_interface( mconfig, *this )
	44	device_cococart_interface( mconfig, *this ), m_cart(nullptr), m_owner(nullptr)
45	45	{
46	46	}
47	47
48	48	coco_pak_device::coco_pak_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
49	49	: device_t(mconfig, COCO_PAK, "CoCo Program PAK", tag, owner, clock, "cocopak", __FILE__),
50		device_cococart_interface( mconfig, *this )
51		{
	50	device_cococart_interface( mconfig, *this ), m_cart(nullptr), m_owner(nullptr)
	51	{
52	52	}
53	53
54	54	//-------------------------------------------------

trunk/src/devices/bus/coco/cococart.cpp

r250251	r250252
41	41	device_image_interface(mconfig, *this),
42	42	m_cart_callback(*this),
43	43	m_nmi_callback(*this),
44		m_halt_callback(*this)
	44	m_halt_callback(*this), m_cart(nullptr)
45	45	{
46	46	}
47	47

trunk/src/devices/bus/coleco/ctrl.cpp

r250251	r250252
46	46
47	47	colecovision_control_port_device::colecovision_control_port_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
48	48	device_t(mconfig, COLECOVISION_CONTROL_PORT, "ColecoVision control port", tag, owner, clock, "colecovision_control_port", __FILE__),
49		device_slot_interface(mconfig, *this),
	49	device_slot_interface(mconfig, *this), m_device(nullptr),
50	50	m_write_irq(*this)
51	51	{
52	52	}

trunk/src/devices/bus/coleco/exp.cpp

r250251	r250252
55	55	colecovision_cartridge_slot_device::colecovision_cartridge_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
56	56	device_t(mconfig, COLECOVISION_CARTRIDGE_SLOT, "ColecoVision cartridge port", tag, owner, clock, "coleco_cartridge_port", __FILE__),
57	57	device_slot_interface(mconfig, *this),
58		device_image_interface(mconfig, *this)
	58	device_image_interface(mconfig, *this), m_card(nullptr)
59	59	{
60	60	}
61	61

trunk/src/devices/bus/compucolor/floppy.cpp

r250251	r250252
85	85	//-------------------------------------------------
86	86
87	87	compucolor_floppy_port_device::compucolor_floppy_port_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
88		: rs232_port_device(mconfig, COMPUCOLOR_FLOPPY_PORT, "Compucolor Floppy Port", tag, owner, clock, "compclr_flp_port", __FILE__)
	88	: rs232_port_device(mconfig, COMPUCOLOR_FLOPPY_PORT, "Compucolor Floppy Port", tag, owner, clock, "compclr_flp_port", __FILE__), m_dev(nullptr)
89	89	{
90	90	}
91	91

trunk/src/devices/bus/comx35/exp.cpp

r250251	r250252
45	45	comx_expansion_slot_device::comx_expansion_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
46	46	device_t(mconfig, COMX_EXPANSION_SLOT, "COMX-35 expansion slot", tag, owner, clock, "comx_expansion_slot", __FILE__),
47	47	device_slot_interface(mconfig, *this),
48		m_write_irq(*this)
	48	m_write_irq(*this), m_card(nullptr)
49	49	{
50	50	}
51	51

trunk/src/devices/bus/comx35/ram.cpp

r250251	r250252
36	36	comx_ram_device::comx_ram_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
37	37	device_t(mconfig, COMX_RAM, "COMX-35 RAM Card", tag, owner, clock, "comx_ram", __FILE__),
38	38	device_comx_expansion_card_interface(mconfig, *this),
39		m_ram(*this, "ram")
	39	m_ram(*this, "ram"),
	40	m_bank(0)
40	41	{
41	42	}
42	43

trunk/src/devices/bus/cpc/amdrum.cpp

r250251	r250252
36	36
37	37	cpc_amdrum_device::cpc_amdrum_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
38	38	device_t(mconfig, CPC_AMDRUM, "Amdrum", tag, owner, clock, "cpc_amdrum", __FILE__),
39		device_cpc_expansion_card_interface(mconfig, *this),
	39	device_cpc_expansion_card_interface(mconfig, *this),
	40	m_slot(nullptr),
40	41	m_dac(*this,"dac")
41	42	{
42	43	}

trunk/src/devices/bus/cpc/brunword4.cpp

r250251	r250252
64	64
65	65	cpc_brunword4_device::cpc_brunword4_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
66	66	device_t(mconfig, CPC_BRUNWORD_MK4, "Brunword Elite MK4", tag, owner, clock, "cpc_brunword4", __FILE__),
67		device_cpc_expansion_card_interface(mconfig, *this)
	67	device_cpc_expansion_card_interface(mconfig, *this), m_slot(nullptr), m_rombank_active(false), m_bank_sel(0)
68	68	{
69	69	}
70	70

trunk/src/devices/bus/cpc/cpc_pds.cpp

r250251	r250252
37	37
38	38	cpc_pds_device::cpc_pds_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
39	39	device_t(mconfig, CPC_PDS, "Programmers Development System (CPC Target)", tag, owner, clock, "cpc_pds", __FILE__),
40		device_cpc_expansion_card_interface(mconfig, *this),
	40	device_cpc_expansion_card_interface(mconfig, *this), m_slot(nullptr),
41	41	m_pio(*this,"pio")
42	42	{
43	43	}

trunk/src/devices/bus/cpc/cpc_rom.cpp

r250251	r250252
81	81
82	82	rom_image_device::rom_image_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
83	83	: device_t(mconfig, ROMSLOT, "ROM image", tag, owner, clock, "rom_image", __FILE__),
84		device_image_interface(mconfig, *this)
	84	device_image_interface(mconfig, *this), m_base(nullptr)
85	85	{
86	86	}
87	87

trunk/src/devices/bus/cpc/cpc_rs232.cpp

r250251	r250252
85	85	device_cpc_expansion_card_interface(mconfig, *this),
86	86	m_pit(*this,"pit"),
87	87	m_dart(*this,"dart"),
88		m_rs232(*this,"rs232")
	88	m_rs232(*this,"rs232"), m_slot(nullptr)
89	89	{
90	90	}
91	91
r250251	r250252
94	94	device_cpc_expansion_card_interface(mconfig, *this),
95	95	m_pit(*this,"pit"),
96	96	m_dart(*this,"dart"),
97		m_rs232(*this,"rs232")
	97	m_rs232(*this,"rs232"), m_slot(nullptr)
98	98	{
99	99	}
100	100

trunk/src/devices/bus/cpc/cpc_ssa1.cpp

r250251	r250252
160	160
161	161	cpc_ssa1_device::cpc_ssa1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
162	162	device_t(mconfig, CPC_SSA1, "SSA-1", tag, owner, clock, "cpc_ssa1", __FILE__),
163		device_cpc_expansion_card_interface(mconfig, *this),
164		m_lrq(1),
	163	device_cpc_expansion_card_interface(mconfig, *this), m_slot(nullptr), m_rom(nullptr),
	164	m_lrq(1), m_sby(0),
165	165	m_sp0256_device(*this,"sp0256")
166	166	{
167	167	}
168	168
169	169	cpc_dkspeech_device::cpc_dkspeech_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
170	170	device_t(mconfig, CPC_DKSPEECH, "DK'Tronics Speech Synthesiser", tag, owner, clock, "cpc_dkspeech", __FILE__),
171		device_cpc_expansion_card_interface(mconfig, *this),
172		m_lrq(1),
	171	device_cpc_expansion_card_interface(mconfig, *this), m_slot(nullptr), m_rom(nullptr),
	172	m_lrq(1), m_sby(0),
173	173	m_sp0256_device(*this,"sp0256")
174	174	{
175	175	}

trunk/src/devices/bus/cpc/cpcexp.cpp

r250251	r250252
26	26
27	27
28	28	device_cpc_expansion_card_interface::device_cpc_expansion_card_interface(const machine_config &mconfig, device_t &device)
29		: device_slot_card_interface(mconfig,device)
	29	: device_slot_card_interface(mconfig,device),
	30	m_rom_sel(0)
30	31	{
31	32	}
32	33
r250251	r250252
48	49	m_out_nmi_cb(*this),
49	50	m_out_reset_cb(*this),
50	51	m_out_romdis_cb(*this),
51		m_out_rom_select(*this)
	52	m_out_rom_select(*this), m_card(nullptr)
52	53	{
53	54	}
54	55

trunk/src/devices/bus/cpc/ddi1.cpp

r250251	r250252
63	63
64	64	cpc_ddi1_device::cpc_ddi1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
65	65	device_t(mconfig, CPC_DDI1, "DDI-1", tag, owner, clock, "cpc_ddi1", __FILE__),
66		device_cpc_expansion_card_interface(mconfig, *this),
	66	device_cpc_expansion_card_interface(mconfig, *this), m_slot(nullptr),
67	67	m_fdc(*this,"upd765"),
68		m_connector(*this,"upd765:0")
	68	m_connector(*this,"upd765:0"), m_rom_active(false), m_romen(false)
69	69	{
70	70	}
71	71

trunk/src/devices/bus/cpc/doubler.cpp

r250251	r250252
6	6	*
7	7	*/
8	8
9		#include "doubler.h"
10		#include "includes/amstrad.h"
	9	#include "doubler.h"
	10	#include "includes/amstrad.h"
11	11
12		//**************************************************************************
	12	//**************************************************************************
13	13	//  DEVICE DEFINITIONS
14	14	//**************************************************************************
15	15
r250251	r250252
38	38
39	39	cpc_doubler_device::cpc_doubler_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
40	40	device_t(mconfig, CPC_DOUBLER, "Draysoft Doubler", tag, owner, clock, "cpc_doubler", __FILE__),
41		device_cpc_expansion_card_interface(mconfig, *this),
	41	device_cpc_expansion_card_interface(mconfig, *this), m_slot(nullptr),
42	42	m_tape(*this,"doubler_tape")
43	43	{
44	44	}

trunk/src/devices/bus/cpc/hd20.cpp

r250251	r250252
50	50
51	51	cpc_hd20_device::cpc_hd20_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
52	52	device_t(mconfig, CPC_HD20, "Dobbertin HD20", tag, owner, clock, "cpc_hd20", __FILE__),
53		device_cpc_expansion_card_interface(mconfig, *this),
	53	device_cpc_expansion_card_interface(mconfig, *this), m_slot(nullptr),
54	54	m_hdc(*this,"hdc")
55	55	{
56	56	}

trunk/src/devices/bus/cpc/magicsound.cpp

r250251	r250252
72	72
73	73	al_magicsound_device::al_magicsound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
74	74	device_t(mconfig, AL_MAGICSOUND, "Magic Sound Board", tag, owner, clock, "al_magicsound", __FILE__),
75		device_cpc_expansion_card_interface(mconfig, *this),
	75	device_cpc_expansion_card_interface(mconfig, *this), m_slot(nullptr),
76	76	m_dac1(*this,"dac1"),
77	77	m_dmac(*this,"dmac"),
78	78	m_timer1(*this,"timer1"),
79		m_timer2(*this,"timer2")
	79	m_timer2(*this,"timer2"), m_current_channel(0), m_ramptr(nullptr), m_current_output(0)
80	80	{
81	81	}
82	82

trunk/src/devices/bus/cpc/mface2.cpp

r250251	r250252
310	310
311	311	cpc_multiface2_device::cpc_multiface2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
312	312	device_t(mconfig, CPC_MFACE2, "Multiface II", tag, owner, clock, "cpc_mf2", __FILE__),
313		device_cpc_expansion_card_interface(mconfig, *this)
	313	device_cpc_expansion_card_interface(mconfig, *this), m_slot(nullptr), m_multiface_ram(nullptr), m_multiface_flags(0), m_romdis(0)
314	314	{
315	315	}
316	316

trunk/src/devices/bus/cpc/playcity.cpp

r250251	r250252
54	54
55	55	cpc_playcity_device::cpc_playcity_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
56	56	device_t(mconfig, CPC_PLAYCITY, "PlayCity", tag, owner, clock, "cpc_playcity", __FILE__),
57		device_cpc_expansion_card_interface(mconfig, *this),
	57	device_cpc_expansion_card_interface(mconfig, *this), m_slot(nullptr),
58	58	m_ctc(*this,"ctc"),
59	59	m_ymz1(*this,"ymz_1"),
60	60	m_ymz2(*this,"ymz_2")

trunk/src/devices/bus/cpc/smartwatch.cpp

r250251	r250252
47	47
48	48	cpc_smartwatch_device::cpc_smartwatch_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
49	49	device_t(mconfig, CPC_SMARTWATCH, "Dobbertin Smartwatch", tag, owner, clock, "cpc_smartwatch", __FILE__),
50		device_cpc_expansion_card_interface(mconfig, *this),
51		m_rtc(*this,"rtc")
	50	device_cpc_expansion_card_interface(mconfig, *this), m_slot(nullptr),
	51	m_rtc(*this,"rtc"), m_bank(nullptr)
52	52	{
53	53	}
54	54

trunk/src/devices/bus/cpc/symbfac2.cpp

r250251	r250252
73	73
74	74	cpc_symbiface2_device::cpc_symbiface2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
75	75	device_t(mconfig, CPC_SYMBIFACE2, "SYMBiFACE II", tag, owner, clock, "cpc_symf2", __FILE__),
76		device_cpc_expansion_card_interface(mconfig, *this),
	76	device_cpc_expansion_card_interface(mconfig, *this), m_slot(nullptr),
77	77	m_ide(*this,"ide"),
78	78	m_rtc(*this,"rtc"),
79	79	m_nvram(*this,"nvram"),
80	80	m_mouse_x(*this,"sf2_mouse_x"),
81	81	m_mouse_y(*this,"sf2_mouse_y"),
82		m_mouse_buttons(*this,"sf2_mouse_buttons")
	82	m_mouse_buttons(*this,"sf2_mouse_buttons"), m_iohigh(false), m_ide_data(0), m_mouse_state(0), m_input_x(0), m_input_y(0), m_4xxx_ptr_r(nullptr), m_4xxx_ptr_w(nullptr), m_6xxx_ptr_r(nullptr), m_6xxx_ptr_w(nullptr)
83	83	{
84	84	}
85	85

trunk/src/devices/bus/cpc/transtape.cpp

r0	r250252
	1	// license:BSD-3-Clause
	2	// copyright-holders:Barry Rodewald
	3	/*
	4	* transtape.c  --  Hard Micro SA Transtape
	5	*
	6	* Spanish hacking device
	7	*
	8	* Further info at - http://cpcwiki.eu/index.php/Transtape
	9	*/
	10
	11	#include "transtape.h"
	12	#include "includes/amstrad.h"
	13
	14	//**************************************************************************
	15	//  DEVICE DEFINITIONS
	16	//**************************************************************************
	17
	18	const device_type CPC_TRANSTAPE = &device_creator<cpc_transtape_device>;
	19
	20	ROM_START( cpc_transtape )
	21	ROM_REGION( 0x4000, "tt_rom", 0 )
	22	ROM_LOAD( "tta.rom",   0x0000, 0x4000, CRC(c568da76) SHA1(cc509d21216bf11d40f9a3e0791ef7f4ada03790) )
	23	ROM_END
	24
	25	const rom_entry *cpc_transtape_device::device_rom_region() const
	26	{
	27	return ROM_NAME( cpc_transtape );
	28	}
	29
	30	static INPUT_PORTS_START(cpc_transtape)
	31	PORT_START("transtape")
	32	PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("Red Button") PORT_CODE(KEYCODE_F1) PORT_CHANGED_MEMBER(DEVICE_SELF,cpc_transtape_device,button_red_w,1)
	33	PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("Black Button") PORT_CODE(KEYCODE_F2) PORT_CHANGED_MEMBER(DEVICE_SELF,cpc_transtape_device,button_black_w,1)
	34	INPUT_PORTS_END
	35
	36	ioport_constructor cpc_transtape_device::device_input_ports() const
	37	{
	38	return INPUT_PORTS_NAME( cpc_transtape );
	39	}
	40
	41	//**************************************************************************
	42	//  LIVE DEVICE
	43	//**************************************************************************
	44
	45	cpc_transtape_device::cpc_transtape_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
	46	device_t(mconfig, CPC_TRANSTAPE, "HM Transtape", tag, owner, clock, "cpc_transtape", __FILE__),
	47	device_cpc_expansion_card_interface(mconfig, *this), m_slot(nullptr), m_cpu(nullptr), m_space(nullptr), m_ram(nullptr),
	48	m_rom_active(false),
	49	m_romen(true),
	50	m_output(0)
	51	{
	52	}
	53
	54	//-------------------------------------------------
	55	//  device_start - device-specific startup
	56	//-------------------------------------------------
	57
	58	void cpc_transtape_device::device_start()
	59	{
	60	m_slot = dynamic_cast<cpc_expansion_slot_device *>(owner());
	61	m_cpu = static_cast<cpu_device*>(machine().device("maincpu"));
	62	m_space = &m_cpu->space(AS_IO);
	63
	64	m_ram = auto_alloc_array_clear(machine(), UINT8, 0x2000);
	65
	66	m_space->install_write_handler(0xfbf0,0xfbf0,0,0,write8_delegate(FUNC(cpc_transtape_device::output_w),this));
	67	m_space->install_read_handler(0xfbff,0xfbff,0,0,read8_delegate(FUNC(cpc_transtape_device::input_r),this));
	68	}
	69
	70	//-------------------------------------------------
	71	//  device_reset - device-specific reset
	72	//-------------------------------------------------
	73
	74	void cpc_transtape_device::device_reset()
	75	{
	76	// TODO
	77	m_rom_active = false;
	78	m_output = 0;
	79	}
	80
	81	void cpc_transtape_device::map_enable()
	82	{
	83	UINT8* ROM = memregion("tt_rom")->base();
	84	if(m_output & 0x02)  // ROM enable
	85	{
	86	membank(":bank1")->set_base(ROM);
	87	membank(":bank2")->set_base(ROM+0x2000);
	88	}
	89	if(m_output & 0x01)  // RAM enable
	90	{
	91	membank(":bank7")->set_base(m_ram);
	92	membank(":bank15")->set_base(m_ram);
	93	membank(":bank8")->set_base(m_ram);  // repeats in second 8kB
	94	membank(":bank16")->set_base(m_ram);
	95	}
	96	}
	97
	98	INPUT_CHANGED_MEMBER(cpc_transtape_device::button_red_w)
	99	{
	100	// enables device ROM at 0x0000, RAM at 0xc000, generates NMI
	101	if(newval & 0x01)
	102	{
	103	m_output |= 0x1f;
	104	map_enable();
	105	m_cpu->set_input_line(INPUT_LINE_NMI,PULSE_LINE);
	106	}
	107	}
	108
	109	INPUT_CHANGED_MEMBER(cpc_transtape_device::button_black_w)
	110	{
	111	// enables device ROM at 0x0000, RAM at 0xc000(?), force execution to start at 0x0000
	112	if(newval & 0x01)
	113	{
	114	m_output |= 0x1f;
	115	map_enable();
	116	m_cpu->set_pc(0);
	117	}
	118	}
	119
	120	READ8_MEMBER(cpc_transtape_device::input_r)
	121	{
	122	// TODO
	123	return 0x80;
	124	}
	125
	126	WRITE8_MEMBER(cpc_transtape_device::output_w)
	127	{
	128	// TODO
	129	m_output = data;
	130	m_slot->rom_select(space,0,get_rom_bank());  // trigger rethink
	131	}
	132
	133	void cpc_transtape_device::set_mapping(UINT8 type)
	134	{
	135	if(type != MAP_OTHER)
	136	return;
	137	map_enable();
	138	}
	139
	140

trunk/src/devices/bus/cpc/transtape.h

r0	r250252
	1	// license:BSD-3-Clause
	2	// copyright-holders:Barry Rodewald
	3	/*
	4	* transtape.c  --  Hard Micro SA Transtape
	5	*
	6	* Spanish hacking device
	7	*
	8	*/
	9
	10	#ifndef TRANSTAPE_H_
	11	#define TRANSTAPE_H_
	12
	13	#include "emu.h"
	14	#include "cpcexp.h"
	15
	16	class cpc_transtape_device  : public device_t,
	17	public device_cpc_expansion_card_interface
	18	{
	19	public:
	20	// construction/destruction
	21	cpc_transtape_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
	22
	23	// optional information overrides
	24	virtual const rom_entry *device_rom_region() const;
	25	virtual ioport_constructor device_input_ports() const;
	26
	27	virtual void set_mapping(UINT8 type);
	28	virtual WRITE_LINE_MEMBER( romen_w ) { m_romen = state; }
	29
	30	DECLARE_READ8_MEMBER(input_r);
	31	DECLARE_WRITE8_MEMBER(output_w);
	32	DECLARE_INPUT_CHANGED_MEMBER(button_red_w);
	33	DECLARE_INPUT_CHANGED_MEMBER(button_black_w);
	34
	35	protected:
	36	// device-level overrides
	37	virtual void device_start();
	38	virtual void device_reset();
	39
	40	private:
	41	cpc_expansion_slot_device *m_slot;
	42	cpu_device* m_cpu;
	43	address_space* m_space;
	44	UINT8* m_ram;  // 8kB internal RAM
	45	bool m_rom_active;
	46	bool m_romen;
	47	UINT8 m_output;
	48
	49	void map_enable();
	50	};
	51
	52	// device type definition
	53	extern const device_type CPC_TRANSTAPE;
	54
	55	#endif /* TRANSTAPE_H_ */

trunk/src/devices/bus/crvision/slot.cpp

r250251	r250252
66	66	device_t(mconfig, CRVISION_CART_SLOT, "CreatiVision Cartridge Slot", tag, owner, clock, "crvision_cart_slot", __FILE__),
67	67	device_image_interface(mconfig, *this),
68	68	device_slot_interface(mconfig, *this),
69		m_type(CRV_4K)
	69	m_type(CRV_4K), m_cart(nullptr)
70	70	{
71	71	}
72	72

trunk/src/devices/bus/dmv/dmvbus.cpp

r250251	r250252
201	201	m_prog_write_cb(*this),
202	202	m_out_int_cb(*this),
203	203	m_out_irq_cb(*this),
204		m_out_thold_cb(*this)
	204	m_out_thold_cb(*this), m_cart(nullptr)
205	205	{
206	206	}
207	207

trunk/src/devices/bus/dmv/k210.cpp

r250251	r250252
57	57	m_ppi(*this, "ppi8255"),
58	58	m_centronics(*this, "centronics"),
59	59	m_cent_data_in(*this, "cent_data_in"),
60		m_cent_data_out(*this, "cent_data_out")
61		{
	60	m_cent_data_out(*this, "cent_data_out"), m_bus(nullptr), m_clk1_timer(nullptr), m_portb(0), m_portc(0)
	61	{
62	62	}
63	63
64	64	//-------------------------------------------------

trunk/src/devices/bus/dmv/k220.cpp

r250251	r250252
138	138	m_pit(*this, "pit8253"),
139	139	m_ppi(*this, "ppi8255"),
140	140	m_ram(*this, "ram"),
141		m_rom(*this, "rom")
142		{
	141	m_rom(*this, "rom"), m_portc(0)
	142	{
143	143	}
144	144
145	145	//-------------------------------------------------

trunk/src/devices/bus/dmv/k230.cpp

r250251	r250252
110	110	: device_t(mconfig, DMV_K230, "K230 8088 without interrupt controller", tag, owner, clock, "dmv_k230", __FILE__),
111	111	device_dmvslot_interface( mconfig, *this ),
112	112	m_maincpu(*this, "maincpu"),
113		m_rom(*this, "rom")
114		{
	113	m_rom(*this, "rom"), m_bus(nullptr), m_io(nullptr), m_switch16(0), m_hold(0)
	114	{
115	115	}
116	116
117	117	dmv_k230_device::dmv_k230_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
118	118	: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
119	119	device_dmvslot_interface( mconfig, *this ),
120	120	m_maincpu(*this, "maincpu"),
121		m_rom(*this, "rom")
122		{
	121	m_rom(*this, "rom"), m_bus(nullptr), m_io(nullptr), m_switch16(0), m_hold(0)
	122	{
123	123	}
124	124
125	125	//-------------------------------------------------
r250251	r250252
136	136	//-------------------------------------------------
137	137
138	138	dmv_k234_device::dmv_k234_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
139		: dmv_k230_device(mconfig, DMV_K234, "K234 68008", tag, owner, clock, "dmv_k234", __FILE__)
140		{
	139	: dmv_k230_device(mconfig, DMV_K234, "K234 68008", tag, owner, clock, "dmv_k234", __FILE__), m_snr(0)
	140	{
141	141	}
142	142
143	143	//-------------------------------------------------
r250251	r250252
220	220
221	221	const rom_entry *dmv_k234_device::device_rom_region() const
222	222	{
223		return NULL;
	223	return nullptr;
224	224	}
225	225
226	226	const rom_entry *dmv_k235_device::device_rom_region() const

trunk/src/devices/bus/dmv/k233.cpp

r250251	r250252
30	30
31	31	dmv_k233_device::dmv_k233_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
32	32	: device_t(mconfig, DMV_K233, "K233 16K Shared RAM", tag, owner, clock, "dmv_k233", __FILE__),
33		device_dmvslot_interface( mconfig, *this )
34		{
	33	device_dmvslot_interface( mconfig, *this ),
	34	m_enabled(false),
	35	m_ram(nullptr)
	36	{
35	37	}
36	38
37	39	//-------------------------------------------------

trunk/src/devices/bus/dmv/k801.cpp

r250251	r250252
115	115	: device_t(mconfig, DMV_K801, "K801 RS-232 Switchable Interface", tag, owner, clock, "dmv_k801", __FILE__),
116	116	device_dmvslot_interface( mconfig, *this ),
117	117	m_epci(*this, "epci"),
118		m_dsw(*this, "DSW")
119		{
	118	m_dsw(*this, "DSW"), m_bus(nullptr)
	119	{
120	120	}
121	121
122	122	dmv_k801_device::dmv_k801_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
123	123	: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
124	124	device_dmvslot_interface( mconfig, *this ),
125	125	m_epci(*this, "epci"),
126		m_dsw(*this, "DSW")
127		{
	126	m_dsw(*this, "DSW"), m_bus(nullptr)
	127	{
128	128	}
129	129
130	130	//-------------------------------------------------

trunk/src/devices/bus/dmv/k803.cpp

r250251	r250252
53	53	: device_t(mconfig, DMV_K803, "K803 RTC", tag, owner, clock, "dmv_k803", __FILE__),
54	54	device_dmvslot_interface( mconfig, *this ),
55	55	m_rtc(*this, "rtc"),
56		m_dsw(*this, "DSW")
57		{
	56	m_dsw(*this, "DSW"), m_bus(nullptr), m_latch(0), m_rtc_int(0)
	57	{
58	58	}
59	59
60	60	//-------------------------------------------------

trunk/src/devices/bus/dmv/k806.cpp

r250251	r250252
82	82	m_jumpers(*this, "JUMPERS"),
83	83	m_mouse_buttons(*this, "MOUSE"),
84	84	m_mouse_x(*this, "MOUSEX"),
85		m_mouse_y(*this, "MOUSEY")
86		{
	85	m_mouse_y(*this, "MOUSEY"), m_bus(nullptr)
	86	{
87	87	}
88	88
89	89	//-------------------------------------------------

trunk/src/devices/bus/dmv/ram.cpp

r250251	r250252
34	34
35	35	dmv_ram_device::dmv_ram_device(const machine_config &mconfig, device_type type, UINT32 size, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
36	36	: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
37		device_dmvslot_interface( mconfig, *this ),
	37	device_dmvslot_interface( mconfig, *this ), m_ram(nullptr),
38	38	m_size(size)
39	39	{
40	40	}

trunk/src/devices/bus/ecbbus/ecbbus.cpp

r250251	r250252
28	28
29	29	ecbbus_slot_device::ecbbus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
30	30	device_t(mconfig, ECBBUS_SLOT, "ECB bus slot", tag, owner, clock, "ecbbus_slot", __FILE__),
31		device_slot_interface(mconfig, *this)
	31	device_slot_interface(mconfig, *this), m_bus_tag(nullptr), m_bus_num(0), m_bus(nullptr)
32	32	{
33	33	}
34	34

trunk/src/devices/bus/ecbbus/grip.cpp

r250251	r250252
625	625	m_video_ram(*this, "video_ram"),
626	626	m_j3a(*this, "J3A"),
627	627	m_j3b(*this, "J3B"),
628		m_j7(*this, "J7")
	628	m_j7(*this, "J7"), m_centronics_busy(0), m_centronics_fault(0), m_vol0(0), m_vol1(0), m_ia(0), m_ib(0), m_keydata(0), m_kbf(0), m_lps(0), m_page(0), m_flash(0), m_base(0), m_ppi_pa(0), m_ppi_pc(0), m_kb_timer(nullptr)
629	629	{
630	630	}
631	631

trunk/src/devices/bus/econet/e01.cpp

r250251	r250252
396	396	m_fdc_irq(CLEAR_LINE),
397	397	m_fdc_drq(CLEAR_LINE),
398	398	m_adlc_irq(CLEAR_LINE),
399		m_clk_en(0),
400		m_variant(TYPE_E01)
	399	m_clk_en(0), m_ram_en(false),
	400	m_variant(TYPE_E01), m_clk_timer(nullptr)
401	401	{
402	402	}
403	403
r250251	r250252
426	426	m_fdc_irq(CLEAR_LINE),
427	427	m_fdc_drq(CLEAR_LINE),
428	428	m_adlc_irq(CLEAR_LINE),
429		m_clk_en(0),
430		m_variant(TYPE_E01)
	429	m_clk_en(0), m_ram_en(false),
	430	m_variant(TYPE_E01), m_clk_timer(nullptr)
431	431	{
432	432	}
433	433

trunk/src/devices/bus/econet/econet.cpp

r250251	r250252
39	39	//-------------------------------------------------
40	40
41	41	device_econet_interface::device_econet_interface(const machine_config &mconfig, device_t &device) :
42		device_slot_card_interface(mconfig, device)
	42	device_slot_card_interface(mconfig, device), m_next(nullptr), m_econet(nullptr), m_address(0)
43	43	{
44	44	}
45	45
r250251	r250252
55	55
56	56	econet_slot_device::econet_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
57	57	device_t(mconfig, ECONET_SLOT, "Econet station", tag, owner, clock, "econet_slot", __FILE__),
58		device_slot_interface(mconfig, *this)
	58	device_slot_interface(mconfig, *this), m_address(0), m_econet(nullptr)
59	59	{
60	60	}
61	61

trunk/src/devices/bus/ep64/exp.cpp

r250251	r250252
48	48	m_write_irq(*this),
49	49	m_write_nmi(*this),
50	50	m_write_wait(*this),
51		m_dave(*this)
	51	m_dave(*this), m_card(nullptr)
52	52	{
53	53	}
54	54

trunk/src/devices/bus/epson_sio/epson_sio.cpp

r250251	r250252
54	54
55	55	epson_sio_device::epson_sio_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
56	56	device_t(mconfig, EPSON_SIO, "EPSON SIO port", tag, owner, clock, "epson_sio", __FILE__),
57		device_slot_interface(mconfig, *this),
	57	device_slot_interface(mconfig, *this), m_cart(nullptr),
58	58	m_write_rx(*this),
59	59	m_write_pin(*this)
60	60	{

trunk/src/devices/bus/epson_sio/pf10.cpp

r250251	r250252
96	96	device_epson_sio_interface(mconfig, *this),
97	97	m_cpu(*this, "maincpu"),
98	98	m_fdc(*this, "upd765a"),
99		m_sio_output(*this, "sio"),
	99	m_sio_output(*this, "sio"), m_floppy(nullptr), m_timer(nullptr),
100	100	m_port1(0xff),
101	101	m_port2(0xff),
102		m_rxc(1)
	102	m_rxc(1), m_hd6303_tx(0), m_pinc(0)
103	103	{
104	104	m_sio_input = dynamic_cast<epson_sio_device *>(owner);
105	105	}

trunk/src/devices/bus/epson_sio/tf20.cpp

r250251	r250252
133	133	m_ram(*this, "ram"),
134	134	m_fdc(*this, "5a"),
135	135	m_mpsc(*this, "3a"),
136		m_sio_output(*this, "sio"),
137		m_rxc(1)
	136	m_sio_output(*this, "sio"), m_fd0(nullptr), m_fd1(nullptr), m_timer_serial(nullptr), m_timer_tc(nullptr),
	137	m_rxc(1), m_txda(0), m_dtra(0), m_pinc(0)
138	138	{
139	139	m_sio_input = dynamic_cast<epson_sio_device *>(owner);
140	140	}

trunk/src/devices/bus/gameboy/gb_slot.cpp

r250251	r250252
38	38
39	39	device_gb_cart_interface::device_gb_cart_interface(const machine_config &mconfig, device_t &device)
40	40	: device_slot_card_interface(mconfig, device),
41		m_rom(NULL),
42		m_rom_size(0),
43		has_rumble(false),
44		has_timer(false),
45		has_battery(false)
	41	m_rom(NULL),
	42	m_rom_size(0), m_ram_bank(0), m_latch_bank(0), m_latch_bank2(0),
	43	has_rumble(false),
	44	has_timer(false),
	45	has_battery(false)
46	46	{
47	47	}
48	48
r250251	r250252
142	142	device_image_interface(mconfig, *this),
143	143	device_slot_interface(mconfig, *this),
144	144	m_sgb_hack(0),
145		m_type(GB_MBC_UNKNOWN)
	145	m_type(GB_MBC_UNKNOWN), m_cart(nullptr)
146	146	{
147	147	}
148	148

trunk/src/devices/bus/gameboy/mbc.cpp

r250251	r250252
39	39
40	40	gb_rom_mbc_device::gb_rom_mbc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
41	41	: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
42		device_gb_cart_interface( mconfig, *this )
43		{
	42	device_gb_cart_interface( mconfig, *this ), m_ram_enable(0)
	43	{
44	44	}
45	45
46	46	gb_rom_mbc1_device::gb_rom_mbc1_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
47		: gb_rom_mbc_device(mconfig, type, name, tag, owner, clock, shortname, source),
	47	: gb_rom_mbc_device(mconfig, type, name, tag, owner, clock, shortname, source), m_mode(0),
48	48	m_mask(0x1f),
49	49	m_shift(0)
50	50	{
51	51	}
52	52
53	53	gb_rom_mbc1_device::gb_rom_mbc1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
54		: gb_rom_mbc_device(mconfig, GB_ROM_MBC1, "GB MBC1 Carts", tag, owner, clock, "gb_rom_mbc1", __FILE__),
	54	: gb_rom_mbc_device(mconfig, GB_ROM_MBC1, "GB MBC1 Carts", tag, owner, clock, "gb_rom_mbc1", __FILE__), m_mode(0),
55	55	m_mask(0x1f),
56	56	m_shift(0)
57	57	{
r250251	r250252
78	78	}
79	79
80	80	gb_rom_mbc6_device::gb_rom_mbc6_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
81		: gb_rom_mbc_device(mconfig, GB_ROM_MBC6, "GB MBC6 Carts", tag, owner, clock, "gb_rom_mbc6", __FILE__)
82		{
	81	: gb_rom_mbc_device(mconfig, GB_ROM_MBC6, "GB MBC6 Carts", tag, owner, clock, "gb_rom_mbc6", __FILE__), m_latch1(0), m_latch2(0), m_bank_4000(0), m_bank_6000(0)
	82	{
83	83	}
84	84
85	85	gb_rom_mbc7_device::gb_rom_mbc7_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
88	88	}
89	89
90	90	gb_rom_m161_device::gb_rom_m161_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
91		: gb_rom_mbc_device(mconfig, GB_ROM_M161_M12, "GB M161-M12 Carts", tag, owner, clock, "gb_rom_m161m12", __FILE__)
92		{
	91	: gb_rom_mbc_device(mconfig, GB_ROM_M161_M12, "GB M161-M12 Carts", tag, owner, clock, "gb_rom_m161m12", __FILE__), m_base_bank(0)
	92	{
93	93	}
94	94
95	95	gb_rom_mmm01_device::gb_rom_mmm01_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
96		: gb_rom_mbc_device(mconfig, GB_ROM_MMM01, "GB MMM01 Carts", tag, owner, clock, "gb_rom_mmm01", __FILE__)
97		{
	96	: gb_rom_mbc_device(mconfig, GB_ROM_MMM01, "GB MMM01 Carts", tag, owner, clock, "gb_rom_mmm01", __FILE__), m_bank_mask(0), m_bank(0), m_reg(0)
	97	{
98	98	}
99	99
100	100	gb_rom_sachen_mmc1_device::gb_rom_sachen_mmc1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
101		: gb_rom_mbc_device(mconfig, GB_ROM_SACHEN1, "GB Sachen MMC1 Carts", tag, owner, clock, "gb_rom_sachen1", __FILE__)
102		{
	101	: gb_rom_mbc_device(mconfig, GB_ROM_SACHEN1, "GB Sachen MMC1 Carts", tag, owner, clock, "gb_rom_sachen1", __FILE__), m_base_bank(0), m_mask(0), m_mode(0), m_unlock_cnt(0)
	102	{
103	103	}
104	104
105	105	gb_rom_sachen_mmc1_device::gb_rom_sachen_mmc1_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
106		: gb_rom_mbc_device(mconfig, type, name, tag, owner, clock, shortname, source)
107		{
	106	: gb_rom_mbc_device(mconfig, type, name, tag, owner, clock, shortname, source), m_base_bank(0), m_mask(0), m_mode(0), m_unlock_cnt(0)
	107	{
108	108	}
109	109
110	110	gb_rom_sachen_mmc2_device::gb_rom_sachen_mmc2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
113	113	}
114	114
115	115	gb_rom_188in1_device::gb_rom_188in1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
116		: gb_rom_mbc1_device(mconfig, GB_ROM_188IN1, "GB 188in1", tag, owner, clock, "gb_rom_188in1", __FILE__)
117		{
	116	: gb_rom_mbc1_device(mconfig, GB_ROM_188IN1, "GB 188in1", tag, owner, clock, "gb_rom_188in1", __FILE__), m_game_base(0)
	117	{
118	118	}
119	119
120	120	gb_rom_sintax_device::gb_rom_sintax_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
121		: gb_rom_mbc_device(mconfig, GB_ROM_SINTAX, "GB MBC5 Sintax Carts", tag, owner, clock, "gb_rom_sintax", __FILE__)
122		{
	121	: gb_rom_mbc_device(mconfig, GB_ROM_SINTAX, "GB MBC5 Sintax Carts", tag, owner, clock, "gb_rom_sintax", __FILE__), m_bank_mask(0), m_bank(0), m_reg(0), m_currentxor(0), m_xor2(0), m_xor3(0), m_xor4(0), m_xor5(0), m_sintax_mode(0)
	122	{
123	123	}
124	124
125	125	gb_rom_chongwu_device::gb_rom_chongwu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
126		: gb_rom_mbc5_device(mconfig, GB_ROM_CHONGWU, "GB Chong Wu Xiao Jing Ling", tag, owner, clock, "gb_rom_chongwu", __FILE__)
127		{
	126	: gb_rom_mbc5_device(mconfig, GB_ROM_CHONGWU, "GB Chong Wu Xiao Jing Ling", tag, owner, clock, "gb_rom_chongwu", __FILE__), m_protection_checked(0)
	127	{
128	128	}
129	129
130	130	gb_rom_licheng_device::gb_rom_licheng_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
138	138	}
139	139
140	140	gb_rom_rockman8_device::gb_rom_rockman8_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
141		: gb_rom_mbc_device(mconfig, GB_ROM_ROCKMAN8, "GB MBC1 Rockman 8", tag, owner, clock, "gb_rom_rockman8", __FILE__)
142		{
	141	: gb_rom_mbc_device(mconfig, GB_ROM_ROCKMAN8, "GB MBC1 Rockman 8", tag, owner, clock, "gb_rom_rockman8", __FILE__), m_bank_mask(0), m_bank(0), m_reg(0)
	142	{
143	143	}
144	144
145	145	gb_rom_sm3sp_device::gb_rom_sm3sp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
146		: gb_rom_mbc_device(mconfig, GB_ROM_SM3SP, "GB MBC1 Super Mario 3 Special", tag, owner, clock, "gb_rom_sm3sp", __FILE__)
147		{
	146	: gb_rom_mbc_device(mconfig, GB_ROM_SM3SP, "GB MBC1 Super Mario 3 Special", tag, owner, clock, "gb_rom_sm3sp", __FILE__), m_bank_mask(0), m_bank(0), m_reg(0), m_mode(0)
	147	{
148	148	}
149	149
150	150

trunk/src/devices/bus/gameboy/rom.cpp

r250251	r250252
42	42	}
43	43
44	44	gb_rom_tama5_device::gb_rom_tama5_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
45		: gb_rom_device(mconfig, GB_ROM_TAMA5, "GB Tamagotchi", tag, owner, clock, "gb_rom_tama5", __FILE__)
46		{
	45	: gb_rom_device(mconfig, GB_ROM_TAMA5, "GB Tamagotchi", tag, owner, clock, "gb_rom_tama5", __FILE__), m_tama5_data(0), m_tama5_addr(0), m_tama5_cmd(0), m_rtc_reg(0)
	46	{
47	47	}
48	48
49	49	gb_rom_wisdom_device::gb_rom_wisdom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)

trunk/src/devices/bus/gamegear/ggext.cpp

r250251	r250252
56	56
57	57	gg_ext_port_device::gg_ext_port_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
58	58	device_t(mconfig, GG_EXT_PORT, "EXT Port", tag, owner, clock, "gg_ext_port", __FILE__),
59		device_slot_interface(mconfig, *this),
	59	device_slot_interface(mconfig, *this), m_device(nullptr),
60	60	m_th_pin_handler(*this),
61	61	m_pixel_handler(*this)
62	62	{

trunk/src/devices/bus/gba/gba_slot.cpp

r250251	r250252
78	78	device_t(mconfig, GBA_CART_SLOT, "Game Boy Advance Cartridge Slot", tag, owner, clock, "gba_cart_slot", __FILE__),
79	79	device_image_interface(mconfig, *this),
80	80	device_slot_interface(mconfig, *this),
81		m_type(GBA_STD)
	81	m_type(GBA_STD), m_cart(nullptr)
82	82	{
83	83	}
84	84

trunk/src/devices/bus/gba/rom.cpp

r250251	r250252
57	57	}
58	58
59	59	gba_rom_flash_device::gba_rom_flash_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
60		: gba_rom_device(mconfig, GBA_ROM_FLASH, "GBA Carts + Panasonic Flash", tag, owner, clock, "gba_flash", __FILE__),
	60	: gba_rom_device(mconfig, GBA_ROM_FLASH, "GBA Carts + Panasonic Flash", tag, owner, clock, "gba_flash", __FILE__), m_flash_mask(0),
61	61	m_flash(*this, "flash")
62	62	{
63	63	}
64	64
65	65	gba_rom_flash1m_device::gba_rom_flash1m_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
66		: gba_rom_device(mconfig, GBA_ROM_FLASH1M, "GBA Carts + Sanyo Flash", tag, owner, clock, "gba_flash1m", __FILE__),
	66	: gba_rom_device(mconfig, GBA_ROM_FLASH1M, "GBA Carts + Sanyo Flash", tag, owner, clock, "gba_flash1m", __FILE__), m_flash_mask(0),
67	67	m_flash(*this, "flash")
68	68	{
69	69	}

trunk/src/devices/bus/generic/slot.cpp

r250251	r250252
92	92	m_extensions("bin"),
93	93	m_must_be_loaded(FALSE),
94	94	m_width(GENERIC_ROM8_WIDTH),
95		m_endianness(ENDIANNESS_LITTLE)
	95	m_endianness(ENDIANNESS_LITTLE), m_cart(nullptr)
96	96	{
97	97	}
98	98

trunk/src/devices/bus/ieee488/c2031.cpp

r250251	r250252
408	408	m_address(*this, "ADDRESS"),
409	409	m_nrfd_out(1),
410	410	m_ndac_out(1),
411		m_atna(1),
	411	m_atna(1), m_ifc(0),
412	412	m_via0_irq(0),
413	413	m_via1_irq(0)
414	414	{

trunk/src/devices/bus/ieee488/c2040.cpp

r250251	r250252
690	690	m_address(*this, "ADDRESS"),
691	691	m_rfdo(1),
692	692	m_daco(1),
693		m_atna(1)
	693	m_atna(1), m_ifc(0)
694	694	{
695	695	}
696	696
r250251	r250252
710	710	m_address(*this, "ADDRESS"),
711	711	m_rfdo(1),
712	712	m_daco(1),
713		m_atna(1)
	713	m_atna(1), m_ifc(0)
714	714	{
715	715	}
716	716

trunk/src/devices/bus/ieee488/c2040fdc.cpp

r250251	r250252
86	86	m_ds1(0),
87	87	m_drv_sel(0),
88	88	m_mode_sel(0),
89		m_rw_sel(0),
90		m_period(attotime::from_hz(clock))
	89	m_rw_sel(0), m_odd_hd(0), m_pi(0),
	90	m_period(attotime::from_hz(clock)), t_gen(nullptr)
91	91	{
92	92	cur_live.tm = attotime::never;
93	93	cur_live.state = IDLE;

trunk/src/devices/bus/ieee488/c8050.cpp

r250251	r250252
832	832	m_address(*this, "ADDRESS"),
833	833	m_rfdo(1),
834	834	m_daco(1),
835		m_atna(1)
	835	m_atna(1), m_ifc(0)
836	836	{
837	837	}
838	838
r250251	r250252
851	851	m_address(*this, "ADDRESS"),
852	852	m_rfdo(1),
853	853	m_daco(1),
854		m_atna(1)
	854	m_atna(1), m_ifc(0)
855	855	{
856	856	}
857	857

trunk/src/devices/bus/ieee488/c8050fdc.cpp

r250251	r250252
89	89	m_ds1(0),
90	90	m_drv_sel(0),
91	91	m_mode_sel(0),
92		m_rw_sel(1)
	92	m_rw_sel(1), m_odd_hd(0), m_pi(0), t_gen(nullptr)
93	93	{
94	94	cur_live.tm = attotime::never;
95	95	cur_live.state = IDLE;

trunk/src/devices/bus/ieee488/c8280.cpp

r250251	r250252
392	392	m_fdc(*this, WD1797_TAG),
393	393	m_floppy0(*this, WD1797_TAG ":0"),
394	394	m_floppy1(*this, WD1797_TAG ":1"),
395		m_address(*this, "ADDRESS"),
	395	m_address(*this, "ADDRESS"), m_floppy(nullptr),
396	396	m_rfdo(1),
397	397	m_daco(1),
398		m_atna(1)
	398	m_atna(1), m_ifc(0), m_fk5(0)
399	399	{
400	400	}
401	401

trunk/src/devices/bus/ieee488/d9060.cpp

r250251	r250252
496	496	m_address(*this, "ADDRESS"),
497	497	m_rfdo(1),
498	498	m_daco(1),
499		m_atna(1),
500		m_enable(0),
	499	m_atna(1), m_ifc(0),
	500	m_enable(0), m_data(0),
501	501	m_variant(variant)
502	502	{
503	503	}

trunk/src/devices/bus/ieee488/hardbox.cpp

r250251	r250252
350	350	: device_t(mconfig, HARDBOX, "HardBox", tag, owner, clock, "hardbox", __FILE__),
351	351	device_ieee488_interface(mconfig, *this),
352	352	m_maincpu(*this, Z80_TAG),
353		m_hdc(*this, CORVUS_HDC_TAG)
	353	m_hdc(*this, CORVUS_HDC_TAG), m_ifc(0)
354	354	{
355	355	}
356	356

trunk/src/devices/bus/ieee488/ieee488.cpp

r250251	r250252
40	40	//-------------------------------------------------
41	41
42	42	device_ieee488_interface::device_ieee488_interface(const machine_config &mconfig, device_t &device)
43		: device_slot_card_interface(mconfig, device)
	43	: device_slot_card_interface(mconfig, device), m_next(nullptr), m_bus(nullptr), m_slot(nullptr)
44	44	{
45	45	}
46	46
r250251	r250252
65	65
66	66	ieee488_slot_device::ieee488_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
67	67	device_t(mconfig, IEEE488_SLOT, "IEEE-488 slot", tag, owner, clock, "ieee488_slot", __FILE__),
68		device_slot_interface(mconfig, *this)
	68	device_slot_interface(mconfig, *this), m_address(0)
69	69	{
70	70	}
71	71

trunk/src/devices/bus/ieee488/softbox.cpp

r250251	r250252
331	331	device_ieee488_interface(mconfig, *this),
332	332	m_maincpu(*this, Z80_TAG),
333	333	m_dbrg(*this, COM8116_TAG),
334		m_hdc(*this, CORVUS_HDC_TAG)
	334	m_hdc(*this, CORVUS_HDC_TAG), m_ifc(0)
335	335	{
336	336	}
337	337

trunk/src/devices/bus/imi7000/imi7000.cpp

r250251	r250252
36	36	//-------------------------------------------------
37	37
38	38	device_imi7000_interface::device_imi7000_interface(const machine_config &mconfig, device_t &device)
39		: device_slot_card_interface(mconfig, device)
	39	: device_slot_card_interface(mconfig, device), m_slot(nullptr)
40	40	{
41	41	}
42	42
r250251	r250252
52	52
53	53	imi7000_slot_device::imi7000_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
54	54	device_t(mconfig, IMI7000_SLOT, "IMI 7000 slot", tag, owner, clock, "imi7000_slot", __FILE__),
55		device_slot_interface(mconfig, *this)
	55	device_slot_interface(mconfig, *this), m_card(nullptr)
56	56	{
57	57	}
58	58

trunk/src/devices/bus/intv/slot.cpp

r250251	r250252
148	148	device_t(mconfig, INTV_CART_SLOT, "Intellivision Cartridge Slot", tag, owner, clock, "intv_cart_slot", __FILE__),
149	149	device_image_interface(mconfig, *this),
150	150	device_slot_interface(mconfig, *this),
151		m_type(INTV_STD)
	151	m_type(INTV_STD), m_cart(nullptr)
152	152	{
153	153	}
154	154

trunk/src/devices/bus/iq151/disc2.cpp

r250251	r250252
51	51	iq151_disc2_device::iq151_disc2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
52	52	: device_t(mconfig, IQ151_DISC2, "IQ151 Disc2", tag, owner, clock, "iq151_disc2", __FILE__),
53	53	device_iq151cart_interface( mconfig, *this ),
54		m_fdc(*this, "fdc")
55		{
	54	m_fdc(*this, "fdc"), m_rom(nullptr), m_rom_enabled(false)
	55	{
56	56	}
57	57
58	58	//-------------------------------------------------

trunk/src/devices/bus/iq151/grafik.cpp

r250251	r250252
40	40	iq151_grafik_device::iq151_grafik_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
41	41	: device_t(mconfig, IQ151_GRAFIK, "IQ151 grafik", tag, owner, clock, "iq151_grafik", __FILE__),
42	42	device_iq151cart_interface( mconfig, *this ),
43		m_ppi8255(*this, "ppi8255")
44		{
	43	m_ppi8255(*this, "ppi8255"), m_posx(0), m_posy(0), m_all(0), m_pen(0), m_fast(0), m_ev(0), m_ex(0), m_sel(0)
	44	{
45	45	}
46	46
47	47	//-------------------------------------------------

trunk/src/devices/bus/iq151/iq151.cpp

r250251	r250252
62	62	m_out_irq2_cb(*this),
63	63	m_out_irq3_cb(*this),
64	64	m_out_irq4_cb(*this),
65		m_out_drq_cb(*this)
	65	m_out_drq_cb(*this), m_cart(nullptr)
66	66	{
67	67	}
68	68

trunk/src/devices/bus/iq151/minigraf.cpp

r250251	r250252
49	49
50	50	iq151_minigraf_device::iq151_minigraf_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
51	51	: device_t(mconfig, IQ151_MINIGRAF, "IQ151 Minigraf", tag, owner, clock, "iq151_minigraf", __FILE__),
52		device_iq151cart_interface( mconfig, *this )
53		{
	52	device_iq151cart_interface( mconfig, *this ), m_rom(nullptr), m_posx(0), m_posy(0), m_pen(0), m_control(0), m_paper(nullptr)
	53	{
54	54	}
55	55
56	56	//-------------------------------------------------

trunk/src/devices/bus/iq151/ms151a.cpp

r250251	r250252
48	48
49	49	iq151_ms151a_device::iq151_ms151a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
50	50	: device_t(mconfig, IQ151_MS151A, "IQ151 MS151A", tag, owner, clock, "iq151_ms151a", __FILE__),
51		device_iq151cart_interface( mconfig, *this )
52		{
	51	device_iq151cart_interface( mconfig, *this ), m_rom(nullptr), m_posx(0), m_posy(0), m_pen(0), m_paper(nullptr)
	52	{
53	53	}
54	54
55	55	//-------------------------------------------------

trunk/src/devices/bus/iq151/rom.cpp

r250251	r250252
43	43
44	44	iq151_rom_device::iq151_rom_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
45	45	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
46		device_iq151cart_interface(mconfig, *this)
	46	device_iq151cart_interface(mconfig, *this), m_rom(nullptr)
47	47	{
48	48	}
49	49

trunk/src/devices/bus/iq151/staper.cpp

r250251	r250252
48	48	: device_t(mconfig, IQ151_STAPER, "IQ151 STAPER", tag, owner, clock, "iq151_staper", __FILE__),
49	49	device_iq151cart_interface( mconfig, *this ),
50	50	m_ppi(*this, "ppi8255"),
51		m_printer(*this, "printer")
52		{
	51	m_printer(*this, "printer"), m_printer_timer(nullptr), m_ppi_portc(0)
	52	{
53	53	}
54	54
55	55	//-------------------------------------------------

trunk/src/devices/bus/iq151/video32.cpp

r250251	r250252
59	59
60	60	iq151_video32_device::iq151_video32_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
61	61	: device_t(mconfig, IQ151_VIDEO32, "IQ151 video32", tag, owner, clock, "iq151_video32", __FILE__),
62		device_iq151cart_interface( mconfig, *this ),
	62	device_iq151cart_interface( mconfig, *this ), m_videoram(nullptr), m_chargen(nullptr),
63	63	m_gfxdecode(*this, "gfxdecode"),
64	64	m_palette(*this, "^^palette")
65	65	{

trunk/src/devices/bus/iq151/video64.cpp

r250251	r250252
59	59
60	60	iq151_video64_device::iq151_video64_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
61	61	: device_t(mconfig, IQ151_VIDEO64, "IQ151 video64", tag, owner, clock, "iq151_video64", __FILE__),
62		device_iq151cart_interface( mconfig, *this ),
	62	device_iq151cart_interface( mconfig, *this ), m_videoram(nullptr), m_chargen(nullptr),
63	63	m_gfxdecode(*this, "gfxdecode"),
64	64	m_palette(*this, "^^palette")
65	65	{

trunk/src/devices/bus/isa/3c503.cpp

r250251	r250252
18	18	return MACHINE_CONFIG_NAME(el2_3c503_config);
19	19	}
20	20
21		el2_3c503_device::el2_3c503_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
22		: device_t(mconfig, EL2_3C503, "3C503 Network Adapter", tag, owner, clock, "el2_3c503", __FILE__),
23		device_isa8_card_interface(mconfig, *this),
24		m_dp8390(*this, "dp8390d") {
	21	el2_3c503_device::el2_3c503_device(const machine_config& mconfig, const char* tag, device_t* owner, UINT32 clock)
	22	: device_t(mconfig, EL2_3C503, "3C503 Network Adapter", tag, owner, clock, "el2_3c503", __FILE__),
	23	device_isa8_card_interface(mconfig, *this),
	24	m_dp8390(*this, "dp8390d"),
	25	m_irq_state(0)
	26	{
25	27	}
26	28
27	29	void el2_3c503_device::device_start() {

trunk/src/devices/bus/isa/3c505.cpp

r250251	r250252
309	309	device_isa16_card_interface(mconfig, *this),
310	310	m_iobase(*this, "IO_BASE"),
311	311	m_irqdrq(*this, "IRQ_DRQ"),
312		m_romopts(*this, "ROM_OPTS")
	312	m_romopts(*this, "ROM_OPTS"), m_status(0), m_control(0), m_command_index(0), m_command_pending(0), m_wait_for_ack(0), m_wait_for_nak(0), m_rx_data_index(0), m_rx_pending(0), m_tx_data_length(0), m_program_length(0), m_response_length(0), m_response_index(0), m_microcode_version(0), m_microcode_running(0), m_i82586_config(0), irq_state(), m_do_command_timer(nullptr), m_installed(false), m_irq(0), m_drq(0)
313	313	{
314	314	}
315	315
r250251	r250252
319	319	device_isa16_card_interface(mconfig, *this),
320	320	m_iobase(*this, "IO_BASE"),
321	321	m_irqdrq(*this, "IRQ_DRQ"),
322		m_romopts(*this, "ROM_OPTS")
	322	m_romopts(*this, "ROM_OPTS"), m_status(0), m_control(0), m_command_index(0), m_command_pending(0), m_wait_for_ack(0), m_wait_for_nak(0), m_rx_data_index(0), m_rx_pending(0), m_tx_data_length(0), m_program_length(0), m_response_length(0), m_response_index(0), m_microcode_version(0), m_microcode_running(0), m_i82586_config(0), irq_state(), m_do_command_timer(nullptr), m_installed(false), m_irq(0), m_drq(0)
323	323	{
324	324	}
325	325
r250251	r250252
447	447	//**************************************************************************
448	448
449	449	threecom3c505_device::data_buffer::data_buffer() :
450		m_device(NULL)
	450	m_device(nullptr), m_length(0)
451	451	{
452	452	}
453	453
r250251	r250252
508	508	//**************************************************************************
509	509
510	510	threecom3c505_device::data_buffer_fifo::data_buffer_fifo() :
511		m_device(NULL),
512		m_size(0)
	511	m_device(nullptr),
	512	m_size(0), m_count(0), m_get_index(0), m_put_index(0)
513	513	{
514	514	}
515	515

trunk/src/devices/bus/isa/aga.cpp

r250251	r250252
62	62	m_palette(*this, "palette"),
63	63	m_mc6845(*this, AGA_MC6845_NAME),
64	64	m_cga_config(*this, "cga_config"),
65		m_update_row_type(-1),
	65	m_update_row_type(-1),
	66	m_mode(),
66	67	m_mda_mode_control(0),
67		m_mda_status(0),
	68	m_mda_status(0),
	69	m_mda_chr_gen(nullptr),
68	70	m_cga_mode_control(0),
69	71	m_cga_color_select(0),
70		m_cga_status(0),
	72	m_cga_status(0),
	73	m_cga_chr_gen(nullptr),
71	74	m_framecnt(0),
72	75	m_vsync(0),
73		m_hsync(0)
	76	m_hsync(0),
	77	m_videoram(nullptr)
74	78	{
75	79	}
76	80
r250251	r250252
80	84	m_palette(*this, "palette"),
81	85	m_mc6845(*this, AGA_MC6845_NAME),
82	86	m_cga_config(*this, "cga_config"),
83		m_update_row_type(-1),
	87	m_update_row_type(-1), m_mode(),
84	88	m_mda_mode_control(0),
85		m_mda_status(0),
	89	m_mda_status(0), m_mda_chr_gen(nullptr),
86	90	m_cga_mode_control(0),
87	91	m_cga_color_select(0),
88		m_cga_status(0),
	92	m_cga_status(0), m_cga_chr_gen(nullptr),
89	93	m_framecnt(0),
90	94	m_vsync(0),
91		m_hsync(0)
	95	m_hsync(0), m_videoram(nullptr)
92	96	{
93	97	}
94	98	//-------------------------------------------------

trunk/src/devices/bus/isa/cga.cpp

r250251	r250252
301	301	isa8_cga_device::isa8_cga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
302	302	device_t(mconfig, ISA8_CGA, "IBM Color/Graphics Monitor Adapter", tag, owner, clock, "cga", __FILE__),
303	303	device_isa8_card_interface(mconfig, *this),
304		m_cga_config(*this, "cga_config"),
305		m_update_row_type(-1),
306		m_vram_size( 0x4000 ),
	304	m_cga_config(*this, "cga_config"), m_framecnt(0), m_mode_control(0), m_color_select(0),
	305	m_update_row_type(-1), m_chr_gen_base(nullptr), m_chr_gen(nullptr), m_vsync(0), m_hsync(0),
	306	m_vram_size( 0x4000 ), m_plantronics(0),
307	307	m_palette(*this, "palette")
308	308	{
309	309	m_chr_gen_offset[0] = m_chr_gen_offset[2] = 0x1800;
r250251	r250252
316	316	isa8_cga_device::isa8_cga_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
317	317	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
318	318	device_isa8_card_interface(mconfig, *this),
319		m_cga_config(*this, "cga_config"),
320		m_update_row_type(-1),
321		m_vram_size( 0x4000 ),
	319	m_cga_config(*this, "cga_config"), m_framecnt(0), m_mode_control(0), m_color_select(0),
	320	m_update_row_type(-1), m_chr_gen_base(nullptr), m_chr_gen(nullptr), m_vsync(0), m_hsync(0),
	321	m_vram_size( 0x4000 ), m_plantronics(0),
322	322	m_palette(*this, "palette")
323	323	{
324	324	m_chr_gen_offset[0] = m_chr_gen_offset[2] = 0x1800;
r250251	r250252
1523	1523	//-------------------------------------------------
1524	1524
1525	1525	isa8_cga_pc1512_device::isa8_cga_pc1512_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
1526		isa8_cga_device( mconfig, ISA8_CGA_PC1512, "ISA8_CGA_PC1512", tag, owner, clock, "cga_pc1512", __FILE__)
	1526	isa8_cga_device( mconfig, ISA8_CGA_PC1512, "ISA8_CGA_PC1512", tag, owner, clock, "cga_pc1512", __FILE__), m_write(0), m_read(0), m_mc6845_address(0)
1527	1527	{
1528	1528	m_vram_size = 0x10000;
1529	1529	m_chr_gen_offset[0] = 0x0000;
r250251	r250252
1652	1652	//-------------------------------------------------
1653	1653
1654	1654	isa8_wyse700_device::isa8_wyse700_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
1655		isa8_cga_device( mconfig, ISA8_WYSE700, "Wyse 700", tag, owner, clock, "wyse700", __FILE__)
	1655	isa8_cga_device( mconfig, ISA8_WYSE700, "Wyse 700", tag, owner, clock, "wyse700", __FILE__), m_bank_offset(0), m_bank_base(0), m_control(0)
1656	1656	{
1657	1657	m_vram_size = 0x20000;
1658	1658	m_start_offset = 0x18000;
r250251	r250252
1740	1740	//-------------------------------------------------
1741	1741
1742	1742	isa8_ec1841_0002_device::isa8_ec1841_0002_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
1743		isa8_cga_device( mconfig, ISA8_EC1841_0002, "EC 1841.0002 (CGA)", tag, owner, clock, "ec1841_0002", __FILE__)
	1743	isa8_cga_device( mconfig, ISA8_EC1841_0002, "EC 1841.0002 (CGA)", tag, owner, clock, "ec1841_0002", __FILE__), m_p3df(0)
1744	1744	{
1745	1745	}
1746	1746
r250251	r250252
1894	1894	const device_type ISA8_CGA_M24 = &device_creator<isa8_cga_m24_device>;
1895	1895
1896	1896	isa8_cga_m24_device::isa8_cga_m24_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
1897		isa8_cga_device( mconfig, ISA8_CGA_M24, "Olivetti M24 CGA", tag, owner, clock, "cga_m24", __FILE__)
	1897	isa8_cga_device( mconfig, ISA8_CGA_M24, "Olivetti M24 CGA", tag, owner, clock, "cga_m24", __FILE__), m_mode2(0), m_index(0)
1898	1898	{
1899	1899	m_vram_size = 0x8000;
1900	1900	}

trunk/src/devices/bus/isa/dectalk.cpp

r250251	r250252
6	6
7	7	dectalk_isa_device::dectalk_isa_device(const machine_config& mconfig, const char* tag, device_t* owner, UINT32 clock) :
8	8	device_t(mconfig, ISA8_DECTALK, "DECTalk-PC", tag, owner, clock, "dectalk_isa", __FILE__),
9		device_isa8_card_interface(mconfig, *this),
	9	device_isa8_card_interface(mconfig, *this),
	10	m_cmd(0),
	11	m_stat(0),
	12	m_data(0),
	13	m_dsp_dma(0),
	14	m_ctl(0),
	15	m_dma(0),
	16	m_vol(0),
	17	m_bio(0),
10	18	m_cpu(*this, "dectalk_cpu"),
11	19	m_dac(*this, "dac"),
12	20	m_dsp(*this, "dectalk_dsp")

trunk/src/devices/bus/isa/ega.cpp

r250251	r250252
572	572
573	573	isa8_ega_device::isa8_ega_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
574	574	device_t(mconfig, ISA8_EGA, "IBM Enhanced Graphics Adapter", tag, owner, clock, "ega", __FILE__),
575		device_isa8_card_interface(mconfig, *this),
576		m_misc_output(0),
	575	device_isa8_card_interface(mconfig, *this), m_crtc_ega(nullptr), m_vram(nullptr), m_videoram(nullptr), m_charA(nullptr), m_charB(nullptr),
	576	m_misc_output(0), m_feature_control(0), m_frame_cnt(0), m_hsync(0), m_vsync(0), m_vblank(0), m_display_enable(0), m_video_mode(0),
577	577	m_palette(*this, "palette")
578	578	{
579	579	}
580	580
581	581	isa8_ega_device::isa8_ega_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
582	582	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
583		device_isa8_card_interface(mconfig, *this),
584		m_misc_output(0),
	583	device_isa8_card_interface(mconfig, *this), m_crtc_ega(nullptr), m_vram(nullptr), m_videoram(nullptr), m_charA(nullptr), m_charB(nullptr),
	584	m_misc_output(0), m_feature_control(0), m_frame_cnt(0), m_hsync(0), m_vsync(0), m_vblank(0), m_display_enable(0), m_video_mode(0),
585	585	m_palette(*this, "palette")
586	586	{
587	587	}

trunk/src/devices/bus/isa/finalchs.cpp

r250251	r250252
91	91
92	92	isa8_finalchs_device::isa8_finalchs_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
93	93	: device_t(mconfig, ISA8_FINALCHS, "Final Chess Card", tag, owner, clock, "finalchs", __FILE__),
94		device_isa8_card_interface( mconfig, *this )
95		{
	94	device_isa8_card_interface( mconfig, *this ), m_FCH_latch_data(0)
	95	{
96	96	}
97	97
98	98	//-------------------------------------------------

trunk/src/devices/bus/isa/gus.cpp

r250251	r250252
352	352
353	353	gf1_device::gf1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
354	354	acia6850_device(mconfig, GGF1, "Gravis GF1", tag, owner, clock, "gf1", __FILE__),
355		device_sound_interface( mconfig, *this ),
	355	device_sound_interface( mconfig, *this ), m_dma_dram_ctrl(0), m_dma_start_addr(0), m_dram_addr(0), m_timer_ctrl(0), m_timer1_count(0), m_timer2_count(0), m_timer1_value(0), m_timer2_value(0), m_sampling_freq(0), m_sampling_ctrl(0), m_joy_trim_dac(0), m_reset(0), m_active_voices(0), m_irq_source(0), m_stream(nullptr), m_timer1(nullptr), m_timer2(nullptr), m_dmatimer(nullptr), m_voltimer(nullptr), m_current_voice(0), m_current_reg(0), m_adlib_cmd(0), m_mix_ctrl(0), m_gf1_irq(0), m_midi_irq(0), m_dma_channel1(0), m_dma_channel2(0), m_irq_combine(0), m_dma_combine(0), m_adlib_timer_cmd(0), m_adlib_timer1_enable(0), m_adlib_timer2_enable(0), m_adlib_status(0), m_adlib_data(0), m_voice_irq_ptr(0), m_voice_irq_current(0), m_dma_16bit(0), m_statread(0), m_sb_data_2xc(0), m_sb_data_2xe(0), m_reg_ctrl(0), m_fake_adlib_status(0), m_dma_current(0), m_txirq(0), m_rxirq(0),
356	356	m_txirq_handler(*this),
357	357	m_rxirq_handler(*this),
358	358	m_wave_irq_handler(*this),
r250251	r250252
1276	1276	isa16_gus_device::isa16_gus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
1277	1277	device_t(mconfig, ISA16_GUS, "Gravis Ultrasound", tag, owner, clock, "isa_gus", __FILE__),
1278	1278	device_isa16_card_interface( mconfig, *this ),
1279		m_gf1(*this, "gf1")
	1279	m_gf1(*this, "gf1"), m_irq_status(0)
1280	1280	{
1281	1281	}
1282	1282

trunk/src/devices/bus/isa/hdc.cpp

r250251	r250252
162	162	const device_type ST11M_HDC = &device_creator<st11m_device>;
163	163
164	164	xt_hdc_device::xt_hdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
165		device_t(mconfig, XT_HDC, "Generic PC-XT Fixed Disk Controller", tag, owner, clock, "xt_hdc", __FILE__),
	165	device_t(mconfig, XT_HDC, "Generic PC-XT Fixed Disk Controller", tag, owner, clock, "xt_hdc", __FILE__), buffer_ptr(nullptr), csb(0), status(0), error(0), m_current_cmd(0),
166	166	m_irq_handler(*this),
167		m_drq_handler(*this)
	167	m_drq_handler(*this), drv(0), timer(nullptr), data_cnt(0), hdc_control(0), hdcdma_src(nullptr), hdcdma_dst(nullptr), hdcdma_read(0), hdcdma_write(0), hdcdma_size(0)
168	168	{
169	169	m_type = STANDARD;
170	170	}
171	171
172	172	xt_hdc_device::xt_hdc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
173		device_t(mconfig, type, name, tag, owner, clock, shortname, source),
	173	device_t(mconfig, type, name, tag, owner, clock, shortname, source), buffer_ptr(nullptr), csb(0), status(0), error(0), m_type(0), m_current_cmd(0),
174	174	m_irq_handler(*this),
175		m_drq_handler(*this)
	175	m_drq_handler(*this), drv(0), timer(nullptr), data_cnt(0), hdc_control(0), hdcdma_src(nullptr), hdcdma_dst(nullptr), hdcdma_read(0), hdcdma_write(0), hdcdma_size(0)
176	176	{
177	177	}
178	178
r250251	r250252
921	921	isa8_hdc_device::isa8_hdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
922	922	device_t(mconfig, ISA8_HDC, "Fixed Disk Controller Card", tag, owner, clock, "hdc", __FILE__),
923	923	device_isa8_card_interface(mconfig, *this),
924		m_hdc(*this,"hdc")
	924	m_hdc(*this,"hdc"), dip(0)
925	925	{
926	926	}
927	927
928	928	isa8_hdc_device::isa8_hdc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
929	929	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
930	930	device_isa8_card_interface(mconfig, *this),
931		m_hdc(*this,"hdc")
	931	m_hdc(*this,"hdc"), dip(0)
932	932	{
933	933	}
934	934

trunk/src/devices/bus/isa/ibm_mfc.cpp

r250251	r250252
449	449
450	450	isa8_ibm_mfc_device::isa8_ibm_mfc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
451	451	device_t(mconfig, ISA8_IBM_MFC, "IBM PC Music Feature Card", tag, owner, clock, "ibm_mfc", __FILE__),
452		device_isa8_card_interface(mconfig, *this),
	452	device_isa8_card_interface(mconfig, *this), m_tcr(0), m_pc_ppi_c(0), m_z80_ppi_c(0), m_pc_irq_state(0), m_z80_irq_state(0),
453	453	m_cpu(*this, "ibm_mfc"),
454	454	m_ym2151(*this, "ym2151"),
455	455	m_d8253(*this, "d8253"),

trunk/src/devices/bus/isa/isa.cpp

r250251	r250252
26	26	//-------------------------------------------------
27	27	isa8_slot_device::isa8_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
28	28	device_t(mconfig, ISA8_SLOT, "ISA8_SLOT", tag, owner, clock, "isa8_slot", __FILE__),
29		device_slot_interface(mconfig, *this)
	29	device_slot_interface(mconfig, *this),
	30	m_owner(nullptr),
	31	m_isa_tag(nullptr)
30	32	{
31	33	}
32	34
33	35	isa8_slot_device::isa8_slot_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
34	36	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
35		device_slot_interface(mconfig, *this)
	37	device_slot_interface(mconfig, *this), m_owner(nullptr), m_isa_tag(nullptr)
36	38	{
37	39	}
38	40
r250251	r250252
136	138	isa8_device::isa8_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
137	139	device_t(mconfig, ISA8, "ISA8", tag, owner, clock, "isa8", __FILE__),
138	140	device_memory_interface(mconfig, *this),
139		m_program_config("ISA 8-bit program", ENDIANNESS_LITTLE, 8, 24, 0, NULL),
140		m_io_config("ISA 8-bit I/O", ENDIANNESS_LITTLE, 8, 16, 0, NULL),
141		m_program16_config("ISA 16-bit program", ENDIANNESS_LITTLE, 16, 24, 0, NULL),
142		m_io16_config("ISA 16-bit I/O", ENDIANNESS_LITTLE, 16, 16, 0, NULL),
	141	m_program_config("ISA 8-bit program", ENDIANNESS_LITTLE, 8, 24, 0, nullptr),
	142	m_io_config("ISA 8-bit I/O", ENDIANNESS_LITTLE, 8, 16, 0, nullptr),
	143	m_program16_config("ISA 16-bit program", ENDIANNESS_LITTLE, 16, 24, 0, nullptr),
	144	m_io16_config("ISA 16-bit I/O", ENDIANNESS_LITTLE, 16, 16, 0, nullptr), m_maincpu(nullptr), m_iospace(nullptr), m_prgspace(nullptr),
143	145	m_out_irq2_cb(*this),
144	146	m_out_irq3_cb(*this),
145	147	m_out_irq4_cb(*this),
r250251	r250252
148	150	m_out_irq7_cb(*this),
149	151	m_out_drq1_cb(*this),
150	152	m_out_drq2_cb(*this),
151		m_out_drq3_cb(*this),
	153	m_out_drq3_cb(*this), m_cputag(nullptr),
152	154	m_write_iochck(*this)
153	155	{
154	156	for(int i=0;i<8;i++)
155	157	{
156		m_dma_device[i] = NULL;
	158	m_dma_device[i] = nullptr;
157	159	m_dma_eop[i] = false;
158	160	}
159	161	m_nmi_enabled = false;
r250251	r250252
164	166	isa8_device::isa8_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
165	167	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
166	168	device_memory_interface(mconfig, *this),
167		m_program_config("ISA 8-bit program", ENDIANNESS_LITTLE, 8, 24, 0, NULL),
168		m_io_config("ISA 8-bit I/O", ENDIANNESS_LITTLE, 8, 16, 0, NULL),
169		m_program16_config("ISA 16-bit program", ENDIANNESS_LITTLE, 16, 24, 0, NULL),
170		m_io16_config("ISA 16-bit I/O", ENDIANNESS_LITTLE, 16, 16, 0, NULL),
	169	m_program_config("ISA 8-bit program", ENDIANNESS_LITTLE, 8, 24, 0, nullptr),
	170	m_io_config("ISA 8-bit I/O", ENDIANNESS_LITTLE, 8, 16, 0, nullptr),
	171	m_program16_config("ISA 16-bit program", ENDIANNESS_LITTLE, 16, 24, 0, nullptr),
	172	m_io16_config("ISA 16-bit I/O", ENDIANNESS_LITTLE, 16, 16, 0, nullptr), m_maincpu(nullptr), m_iospace(nullptr), m_prgspace(nullptr),
171	173	m_out_irq2_cb(*this),
172	174	m_out_irq3_cb(*this),
173	175	m_out_irq4_cb(*this),
r250251	r250252
176	178	m_out_irq7_cb(*this),
177	179	m_out_drq1_cb(*this),
178	180	m_out_drq2_cb(*this),
179		m_out_drq3_cb(*this),
	181	m_out_drq3_cb(*this), m_cputag(nullptr),
180	182	m_write_iochck(*this)
181	183	{
182	184	for(int i=0;i<8;i++)
183	185	{
184		m_dma_device[i] = NULL;
	186	m_dma_device[i] = nullptr;
185	187	m_dma_eop[i] = false;
186	188	}
187	189	m_nmi_enabled = false;
r250251	r250252
418	420
419	421	device_isa8_card_interface::device_isa8_card_interface(const machine_config &mconfig, device_t &device)
420	422	: device_slot_card_interface(mconfig, device),
421		m_isa(NULL)
	423	m_isa(nullptr), m_isa_dev(nullptr), m_next(nullptr)
422	424	{
423	425	}
424	426
r250251	r250252
618	620	//-------------------------------------------------
619	621
620	622	device_isa16_card_interface::device_isa16_card_interface(const machine_config &mconfig, device_t &device)
621		: device_isa8_card_interface(mconfig,device)
	623	: device_isa8_card_interface(mconfig,device), m_isa(nullptr)
622	624	{
623	625	}
624	626

trunk/src/devices/bus/isa/lpt.cpp

r250251	r250252
14	14
15	15	isa8_lpt_device::isa8_lpt_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
16	16	device_t(mconfig, ISA8_LPT, "Printer Adapter", tag, owner, clock, "isa_lpt", __FILE__),
17		device_isa8_card_interface(mconfig, *this)
	17	device_isa8_card_interface(mconfig, *this),
	18	m_is_primary(false)
18	19	{
19	20	}
20	21

trunk/src/devices/bus/isa/mach32.cpp

r250251	r250252
23	23
24	24	// 8514/A device
25	25	mach32_8514a_device::mach32_8514a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
26		: mach8_device(mconfig, ATIMACH32_8514A, "ATi mach32 (2D acceleration module)", tag, owner, clock, "mach32_8514a", __FILE__)
	26	: mach8_device(mconfig, ATIMACH32_8514A, "ATi mach32 (2D acceleration module)", tag, owner, clock, "mach32_8514a", __FILE__),
	27	m_chip_ID(0),
	28	m_membounds(0)
27	29	{
28	30	}
29	31
30	32	mach32_8514a_device::mach32_8514a_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
31		: mach8_device(mconfig, type, name, tag, owner, clock, shortname, source)
	33	: mach8_device(mconfig, type, name, tag, owner, clock, shortname, source),
	34	m_chip_ID(0),
	35	m_membounds(0)
32	36	{
33	37	}
34	38

trunk/src/devices/bus/isa/mc1502_fdc.cpp

r250251	r250252
192	192	mc1502_fdc_device::mc1502_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
193	193	device_t(mconfig, MC1502_FDC, "MC-1502 floppy", tag, owner, clock, "mc1502_fdc", __FILE__),
194	194	device_isa8_card_interface( mconfig, *this ),
195		m_fdc(*this, "fdc")
	195	m_fdc(*this, "fdc"), motor_on(0), motor_timer(nullptr)
196	196	{
197	197	}
198	198

trunk/src/devices/bus/isa/mda.cpp

r250251	r250252
152	152
153	153	isa8_mda_device::isa8_mda_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
154	154	device_t(mconfig, ISA8_MDA, "IBM Monochrome Display and Printer Adapter", tag, owner, clock, "isa_ibm_mda", __FILE__),
155		device_isa8_card_interface(mconfig, *this),
156		m_update_row_type(-1),
	155	device_isa8_card_interface(mconfig, *this), m_framecnt(0), m_mode_control(0),
	156	m_update_row_type(-1), m_chr_gen(nullptr), m_vsync(0), m_hsync(0), m_pixel(0),
157	157	m_palette(*this, "palette")
158	158	{
159	159	}
160	160
161	161	isa8_mda_device::isa8_mda_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
162	162	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
163		device_isa8_card_interface(mconfig, *this),
164		m_update_row_type(-1),
	163	device_isa8_card_interface(mconfig, *this), m_framecnt(0), m_mode_control(0),
	164	m_update_row_type(-1), m_chr_gen(nullptr), m_vsync(0), m_hsync(0), m_pixel(0),
165	165	m_palette(*this, "palette")
166	166	{
167	167	}
r250251	r250252
581	581	//-------------------------------------------------
582	582
583	583	isa8_hercules_device::isa8_hercules_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
584		isa8_mda_device(mconfig, ISA8_HERCULES, "Hercules Graphics Card", tag, owner, clock, "isa_hercules", __FILE__)
	584	isa8_mda_device(mconfig, ISA8_HERCULES, "Hercules Graphics Card", tag, owner, clock, "isa_hercules", __FILE__), m_configuration_switch(0)
585	585	{
586	586	}
587	587
r250251	r250252
787	787	//-------------------------------------------------
788	788
789	789	isa8_ec1840_0002_device::isa8_ec1840_0002_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
790		isa8_mda_device( mconfig, ISA8_EC1840_0002, "EC 1840.0002 (MDA)", tag, owner, clock, "ec1840_0002", __FILE__)
	790	isa8_mda_device( mconfig, ISA8_EC1840_0002, "EC 1840.0002 (MDA)", tag, owner, clock, "ec1840_0002", __FILE__), m_soft_chr_gen(nullptr)
791	791	{
792	792	}
793	793

trunk/src/devices/bus/isa/ne1000.cpp

r250251	r250252
19	19	ne1000_device::ne1000_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
20	20	: device_t(mconfig, NE1000, "NE1000 Network Adapter", tag, owner, clock, "ne1000", __FILE__),
21	21	device_isa8_card_interface(mconfig, *this),
22		m_dp8390(*this, "dp8390d") {
	22	m_dp8390(*this, "dp8390d"),
	23	m_irq(0)
	24	{
23	25	}
24	26
25	27	void ne1000_device::device_start() {

trunk/src/devices/bus/isa/ne2000.cpp

r250251	r250252
17	17	return MACHINE_CONFIG_NAME(ne2000_config);
18	18	}
19	19
20		ne2000_device::ne2000_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
21		: device_t(mconfig, NE2000, "NE2000 Network Adapter", tag, owner, clock, "ne2000", __FILE__),
22		device_isa16_card_interface(mconfig, *this),
23		m_dp8390(*this, "dp8390d") {
	20	ne2000_device::ne2000_device(const machine_config& mconfig, const char* tag, device_t* owner, UINT32 clock)
	21	: device_t(mconfig, NE2000, "NE2000 Network Adapter", tag, owner, clock, "ne2000", __FILE__),
	22	device_isa16_card_interface(mconfig, *this),
	23	m_dp8390(*this, "dp8390d"),
	24	m_irq(0)
	25	{
24	26	}
25	27
26	28	void ne2000_device::device_start() {

trunk/src/devices/bus/isa/num9rev.cpp

r250251	r250252
83	83	m_upd7220(*this, "upd7220"),
84	84	m_palette(*this, "palette"),
85	85	m_ram(1024*1024),
86		m_overlay(1024)
	86	m_overlay(1024), m_bank(0), m_mode(0), m_1024(false)
87	87	{
88	88	}
89	89

trunk/src/devices/bus/isa/omti8621.cpp

r250251	r250252
376	376	device_isa16_card_interface(mconfig, *this),
377	377	m_fdc(*this, OMTI_FDC_TAG),
378	378	m_iobase(*this, "IO_BASE"),
379		m_biosopts(*this, "BIOS_OPTS")
	379	m_biosopts(*this, "BIOS_OPTS"), jumper(0), omti_state(0), status_port(0), config_port(0), mask_port(0), command_length(0), command_index(0), command_status(0), data_buffer(nullptr),
	380	data_length(0), data_index(0), diskaddr_ecc_error(0), diskaddr_format_bad_track(0), m_timer(nullptr), m_installed(false)
380	381	{
381	382	}
382	383
r250251	r250252
1287	1288
1288	1289	omti_disk_image_device::omti_disk_image_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
1289	1290	: device_t(mconfig, OMTI_DISK, "OMTI8621 ESDI disk", tag, owner, clock, "omti_disk_image", __FILE__),
1290		device_image_interface(mconfig, *this)
	1291	device_image_interface(mconfig, *this), m_type(0), m_cylinders(0), m_heads(0), m_sectors(0), m_sectorbytes(0), m_sector_count(0), m_image(nullptr)
1291	1292	{
1292	1293	}
1293	1294

trunk/src/devices/bus/isa/pgc.cpp

r250251	r250252
208	208	device_isa8_card_interface(mconfig, *this),
209	209	m_cpu(*this, "maincpu"),
210	210	m_screen(*this, PGC_SCREEN_NAME),
211		m_palette(*this, "palette")
	211	m_palette(*this, "palette"), m_commarea(nullptr), m_vram(nullptr), m_eram(nullptr), m_bitmap(nullptr)
212	212	{
213	213	}
214	214
r250251	r250252
217	217	device_isa8_card_interface(mconfig, *this),
218	218	m_cpu(*this, "maincpu"),
219	219	m_screen(*this, PGC_SCREEN_NAME),
220		m_palette(*this, "palette")
	220	m_palette(*this, "palette"), m_commarea(nullptr), m_vram(nullptr), m_eram(nullptr), m_bitmap(nullptr)
221	221	{
222	222	}
223	223

trunk/src/devices/bus/isa/sb16.cpp

r250251	r250252
684	684	m_dacl(*this, "dacl"),
685	685	m_dacr(*this, "dacr"),
686	686	m_joy(*this, "pc_joy"),
687		m_cpu(*this, "sb16_cpu")
	687	m_cpu(*this, "sb16_cpu"), m_data_in(false), m_in_byte(0), m_data_out(false), m_out_byte(0), m_freq(0), m_mode(0), m_dac_fifo_ctrl(0), m_adc_fifo_ctrl(0), m_ctrl8(0), m_ctrl16(0), m_mpu_byte(0),
	688	m_dma8_len(0), m_dma16_len(0), m_dma8_cnt(0), m_dma16_cnt(0), m_adc_fifo_head(0), m_adc_fifo_tail(0), m_dac_fifo_head(0), m_dac_fifo_tail(0), m_adc_r(false), m_dac_r(false), m_adc_h(false),
	689	m_dac_h(false), m_irq8(false), m_irq16(false), m_irq_midi(false), m_dma8_done(false), m_dma16_done(false), m_timer(nullptr)
688	690	{
689	691	}
690	692

trunk/src/devices/bus/isa/sblaster.cpp

r250251	r250252
1107	1107	m_dacl(*this, "sbdacl"),
1108	1108	m_dacr(*this, "sbdacr"),
1109	1109	m_joy(*this, "pc_joy"),
1110		m_mdout(*this, "mdout")
	1110	m_mdout(*this, "mdout"), m_dack_out(0), m_onebyte_midi(false), m_uart_midi(false), m_uart_irq(false), m_mpu_midi(false), m_rx_waiting(0), m_tx_waiting(0), m_xmit_read(0), m_xmit_write(0), m_recv_read(0), m_recv_write(0), m_tx_busy(false), m_timer(nullptr)
1111	1111	{
1112	1112	}
1113	1113

trunk/src/devices/bus/isa/sc499.cpp

r250251	r250252
319	319	: device_t(mconfig, SC499, "Archive SC-499", tag, owner, clock, "sc499", __FILE__),
320	320	device_isa8_card_interface(mconfig, *this),
321	321	m_iobase(*this, "IO_BASE"),
322		m_irqdrq(*this, "IRQ_DRQ"),
323		m_image(*this, SC499_CTAPE_TAG)
	322	m_irqdrq(*this, "IRQ_DRQ"), m_data(0), m_command(0), m_status(0), m_control(0), m_has_cartridge(0), m_is_writable(0), m_current_command(0), m_first_block_hack(0), m_nasty_readahead(0), m_read_block_pending(0),
	323	m_data_index(0), m_tape_status(0), m_data_error_counter(0), m_underrun_counter(0), m_tape_pos(0), m_ctape_block_count(0), m_ctape_block_index(0), m_image_length(0),
	324	m_image(*this, SC499_CTAPE_TAG), irq_state(), dma_drq_state(), m_timer(nullptr), m_timer1(nullptr), m_timer_type(0), m_irq(0), m_drq(0), m_installed(false)
324	325	{
325	326	}
326	327

trunk/src/devices/bus/isa/stereo_fx.cpp

r250251	r250252
192	192	m_dacl(*this, "dacl"),
193	193	m_dacr(*this, "dacr"),
194	194	m_joy(*this, "pc_joy"),
195		m_cpu(*this, "stereo_fx_cpu")
	195	m_cpu(*this, "stereo_fx_cpu"), m_data_in(false), m_in_byte(0), m_data_out(false), m_out_byte(0), m_port20(0), m_port00(0), m_timer(nullptr), m_t0(0)
196	196	{
197	197	m_t1 = 0;
198	198	}

trunk/src/devices/bus/isa/svga_cirrus.cpp

r250251	r250252
61	61
62	62	isa16_svga_cirrus_device::isa16_svga_cirrus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
63	63	device_t(mconfig, ISA16_SVGA_CIRRUS, "Diamond Speedstar Pro SE ISA Graphics Card (BIOS v1.00)", tag, owner, clock, "dm_clgd5430", __FILE__),
64		device_isa16_card_interface(mconfig, *this)
	64	device_isa16_card_interface(mconfig, *this), m_vga(nullptr)
65	65	{
66	66	}
67	67
r250251	r250252
147	147
148	148	isa16_svga_cirrus_gd542x_device::isa16_svga_cirrus_gd542x_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
149	149	device_t(mconfig, ISA16_SVGA_CIRRUS_GD542X, "Generic Cirrus Logic GD542x Graphics Card (BIOS v1.20)", tag, owner, clock, "clgd542x", __FILE__),
150		device_isa16_card_interface(mconfig, *this)
	150	device_isa16_card_interface(mconfig, *this), m_vga(nullptr)
151	151	{
152	152	}
153	153

trunk/src/devices/bus/isa/svga_s3.cpp

r250251	r250252
72	72
73	73	isa16_svga_s3_device::isa16_svga_s3_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
74	74	device_t(mconfig, ISA16_SVGA_S3, "Number Nine 9FX Vision 330 (S3 764) Graphics Card", tag, owner, clock, "s3_764", __FILE__),
75		device_isa16_card_interface(mconfig, *this)
	75	device_isa16_card_interface(mconfig, *this), m_vga(nullptr), m_8514(nullptr)
76	76	{
77	77	}
78	78
r250251	r250252
184	184
185	185	isa16_s3virge_device::isa16_s3virge_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
186	186	device_t(mconfig, ISA16_S3VIRGE, "S3 ViRGE Graphics Card", tag, owner, clock, "s3virge", __FILE__),
187		device_isa16_card_interface(mconfig, *this)
	187	device_isa16_card_interface(mconfig, *this), m_vga(nullptr)
188	188	{
189	189	}
190	190
r250251	r250252
271	271
272	272	isa16_s3virgedx_device::isa16_s3virgedx_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
273	273	device_t(mconfig, ISA16_S3VIRGEDX, "S3 ViRGE/DX Graphics Card", tag, owner, clock, "s3virgedx", __FILE__),
274		device_isa16_card_interface(mconfig, *this)
	274	device_isa16_card_interface(mconfig, *this), m_vga(nullptr)
275	275	{
276	276	}
277	277
r250251	r250252
359	359
360	360	isa16_stealth3d2kpro_device::isa16_stealth3d2kpro_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
361	361	device_t(mconfig, ISA16_DMS3D2KPRO, "Diamond Stealth 3D 2000 Pro", tag, owner, clock, "dms3d2kp", __FILE__),
362		device_isa16_card_interface(mconfig, *this)
	362	device_isa16_card_interface(mconfig, *this), m_vga(nullptr)
363	363	{
364	364	}
365	365

trunk/src/devices/bus/isa/svga_trident.cpp

r250251	r250252
63	63
64	64	isa16_svga_tgui9680_device::isa16_svga_tgui9680_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
65	65	device_t(mconfig, ISA16_SVGA_TGUI9680, "Trident TGUI9680 Graphics Card (BIOS X5.5 (02) 02/13/96)", tag, owner, clock, "tgui9680", __FILE__),
66		device_isa16_card_interface(mconfig, *this)
	66	device_isa16_card_interface(mconfig, *this), m_vga(nullptr)
67	67	{
68	68	}
69	69

trunk/src/devices/bus/isa/svga_tseng.cpp

r250251	r250252
61	61
62	62	isa8_svga_et4k_device::isa8_svga_et4k_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
63	63	device_t(mconfig, ISA8_SVGA_ET4K, "SVGA Tseng ET4000 Graphics Card", tag, owner, clock, "et4000", __FILE__),
64		device_isa8_card_interface(mconfig, *this)
	64	device_isa8_card_interface(mconfig, *this), m_vga(nullptr)
65	65	{
66	66	}
67	67

trunk/src/devices/bus/isa/vga.cpp

r250251	r250252
51	51
52	52	isa8_vga_device::isa8_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
53	53	device_t(mconfig, ISA8_VGA, "IBM VGA Graphics Card", tag, owner, clock, "ibm_vga", __FILE__),
54		device_isa8_card_interface(mconfig, *this)
	54	device_isa8_card_interface(mconfig, *this), m_vga(nullptr)
55	55	{
56	56	}
57	57

trunk/src/devices/bus/isa/vga_ati.cpp

r250251	r250252
148	148
149	149	isa16_vga_gfxultra_device::isa16_vga_gfxultra_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
150	150	device_t(mconfig, ISA16_VGA_GFXULTRA, "ATi Graphics Ultra Card", tag, owner, clock, "gfxultra", __FILE__),
151		device_isa16_card_interface(mconfig, *this)
	151	device_isa16_card_interface(mconfig, *this), m_vga(nullptr), m_8514(nullptr)
152	152	{
153	153	}
154	154
155	155	isa16_vga_gfxultrapro_device::isa16_vga_gfxultrapro_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
156	156	device_t(mconfig, ISA16_SVGA_GFXULTRAPRO, "ATi Graphics Ultra Pro Card", tag, owner, clock, "gfxultrp", __FILE__),
157		device_isa16_card_interface(mconfig, *this)
	157	device_isa16_card_interface(mconfig, *this), m_vga(nullptr)
158	158	{
159	159	}
160	160
161	161	isa16_vga_mach64_device::isa16_vga_mach64_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
162	162	device_t(mconfig, ISA16_SVGA_MACH64, "ATi mach64 Card", tag, owner, clock, "mach64", __FILE__),
163		device_isa16_card_interface(mconfig, *this)
	163	device_isa16_card_interface(mconfig, *this), m_vga(nullptr)
164	164	{
165	165	}
166	166

trunk/src/devices/bus/isa/xtide.cpp

r250251	r250252
303	303	: device_t(mconfig, ISA8_XTIDE, "XT-IDE Fixed Drive Adapter", tag, owner, clock, "isa8_xtide", __FILE__),
304	304	device_isa8_card_interface( mconfig, *this ),
305	305	m_ata(*this, "ata"),
306		m_eeprom(*this, "eeprom")
	306	m_eeprom(*this, "eeprom"), m_irq_number(0), m_d8_d15_latch(0)
307	307	{
308	308	}
309	309

trunk/src/devices/bus/isbx/isbc_218a.cpp

r250251	r250252
83	83	device_t(mconfig, ISBC_218A, "ISBX 218a for ISBC", tag, owner, clock, "isbc_218a", __FILE__),
84	84	device_isbx_card_interface(mconfig, *this),
85	85	m_fdc(*this, I8272_TAG),
86		m_floppy0(*this, I8272_TAG":0")
	86	m_floppy0(*this, I8272_TAG":0"), m_reset(false), m_motor(false)
87	87	{
88	88	}
89	89

trunk/src/devices/bus/isbx/isbx.cpp

r250251	r250252
43	43	m_write_mintr0(*this),
44	44	m_write_mintr1(*this),
45	45	m_write_mdrqt(*this),
46		m_write_mwait(*this)
	46	m_write_mwait(*this), m_card(nullptr)
47	47	{
48	48	}
49	49

trunk/src/devices/bus/kc/d002.cpp

r250251	r250252
110	110
111	111	kc_d002_device::kc_d002_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
112	112	: device_t(mconfig, KC_D002, "D002 Bus Driver", tag, owner, clock, "kc_d002", __FILE__),
113		device_kcexp_interface( mconfig, *this )
114		{
	113	device_kcexp_interface( mconfig, *this ), m_slot(nullptr)
	114	{
115	115	}
116	116
117	117	//-------------------------------------------------

trunk/src/devices/bus/kc/d004.cpp

r250251	r250252
137	137	m_floppy1(*this, UPD765_TAG ":1"),
138	138	m_floppy2(*this, UPD765_TAG ":2"),
139	139	m_floppy3(*this, UPD765_TAG ":3"),
140		m_koppel_ram(*this, "koppelram")
141		{
	140	m_koppel_ram(*this, "koppelram"), m_reset_timer(nullptr), m_rom(nullptr), m_rom_base(0), m_enabled(0), m_connected(0), m_floppy(nullptr)
	141	{
142	142	}
143	143
144	144	kc_d004_device::kc_d004_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
r250251	r250252
150	150	m_floppy1(*this, UPD765_TAG ":1"),
151	151	m_floppy2(*this, UPD765_TAG ":2"),
152	152	m_floppy3(*this, UPD765_TAG ":3"),
153		m_koppel_ram(*this, "koppelram")
154		{
	153	m_koppel_ram(*this, "koppelram"), m_reset_timer(nullptr), m_rom(nullptr), m_rom_base(0), m_enabled(0), m_connected(0), m_floppy(nullptr)
	154	{
155	155	}
156	156
157	157	//-------------------------------------------------
r250251	r250252
384	384
385	385	kc_d004_gide_device::kc_d004_gide_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
386	386	: kc_d004_device(mconfig, KC_D004, "D004 Floppy Disk + GIDE Interface", tag, owner, clock, "kc_d004gide", __FILE__),
387		m_ata(*this, ATA_TAG)
388		{
	387	m_ata(*this, ATA_TAG), m_ata_data(0), m_lh(0)
	388	{
389	389	}
390	390
391	391	//-------------------------------------------------

trunk/src/devices/bus/kc/kc.cpp

r250251	r250252
158	158	device_slot_interface(mconfig, *this),
159	159	m_out_irq_cb(*this),
160	160	m_out_nmi_cb(*this),
161		m_out_halt_cb(*this)
	161	m_out_halt_cb(*this), m_cart(nullptr), m_next_slot_tag(nullptr), m_next_slot(nullptr)
162	162	{
163	163	}
164	164
r250251	r250252
167	167	device_slot_interface(mconfig, *this),
168	168	m_out_irq_cb(*this),
169	169	m_out_nmi_cb(*this),
170		m_out_halt_cb(*this)
	170	m_out_halt_cb(*this), m_cart(nullptr), m_next_slot_tag(nullptr), m_next_slot(nullptr)
171	171	{
172	172	}
173	173

trunk/src/devices/bus/kc/ram.cpp

r250251	r250252
44	44
45	45	kc_m011_device::kc_m011_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
46	46	: device_t(mconfig, KC_M011, "M011 64KB RAM", tag, owner, clock, "kc_m011", __FILE__),
47		device_kcexp_interface( mconfig, *this )
48		{
	47	device_kcexp_interface( mconfig, *this ), m_slot(nullptr), m_mei(0), m_ram(nullptr), m_enabled(0), m_write_enabled(0), m_base(0), m_segment(0)
	48	{
49	49	}
50	50
51	51	kc_m011_device::kc_m011_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
52	52	: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
53		device_kcexp_interface( mconfig, *this )
	53	device_kcexp_interface( mconfig, *this ), m_slot(nullptr), m_mei(0), m_ram(nullptr), m_enabled(0), m_write_enabled(0), m_base(0), m_segment(0)
54	54	{
55	55	}
56	56

trunk/src/devices/bus/kc/rom.cpp

r250251	r250252
44	44
45	45	kc_8k_device::kc_8k_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
46	46	: device_t(mconfig, KC_STANDARD, "Standard", tag, owner, clock, "kc_8k", __FILE__),
47		device_kcexp_interface( mconfig, *this )
48		{
	47	device_kcexp_interface( mconfig, *this ), m_slot(nullptr), m_mei(0), m_rom(nullptr), m_enabled(0), m_base(0)
	48	{
49	49	}
50	50
51	51	kc_8k_device::kc_8k_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
52	52	: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
53		device_kcexp_interface( mconfig, *this )
54		{
	53	device_kcexp_interface( mconfig, *this ), m_slot(nullptr), m_mei(0), m_rom(nullptr), m_enabled(0), m_base(0)
	54	{
55	55	}
56	56
57	57
r250251	r250252
185	185	//-------------------------------------------------
186	186
187	187	kc_m033_device::kc_m033_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
188		: kc_8k_device(mconfig, KC_M033, "M033 TypeStar", tag, owner, clock, "kc_m033", __FILE__)
189		{
	188	: kc_8k_device(mconfig, KC_M033, "M033 TypeStar", tag, owner, clock, "kc_m033", __FILE__), m_bank(0)
	189	{
190	190	}
191	191
192	192	//-------------------------------------------------

trunk/src/devices/bus/lpci/i82439tx.cpp

r250251	r250252
20	20	: northbridge_device(mconfig, I82439TX, "Intel 82439TX", tag, owner, clock, "i82439tx", __FILE__),
21	21	pci_device_interface( mconfig, *this ),
22	22	m_cpu_tag( NULL ),
23		m_region_tag( NULL )
	23	m_region_tag( NULL ),
	24	m_space(nullptr),
	25	m_rom(nullptr)
24	26	{
25	27	}
26	28

trunk/src/devices/bus/lpci/mpc105.cpp

r250251	r250252
32	32	mpc105_device::mpc105_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
33	33	: device_t(mconfig, MPC105, "MPC105", tag, owner, clock, "mpc105", __FILE__),
34	34	pci_device_interface( mconfig, *this ),
35		m_cpu_tag(NULL),
36		m_bank_base_default(0)
	35	m_cpu_tag(nullptr),
	36	m_bank_base_default(0),
	37	m_bank_base(0),
	38	m_bank_enable(0),
	39	m_maincpu(nullptr)
37	40	{
38	41	}
39	42

trunk/src/devices/bus/lpci/pci.cpp

r250251	r250252
90	90	//  pci_bus_device - constructor
91	91	//-------------------------------------------------
92	92	pci_bus_device::pci_bus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
93		device_t(mconfig, PCI_BUS, "PCI Bus", tag, owner, clock, "pci_bus", __FILE__),
94		m_father(NULL)
	93	device_t(mconfig, PCI_BUS, "PCI Bus", tag, owner, clock, "pci_bus", __FILE__), m_busnum(0),
	94	m_father(NULL), m_address(0), m_devicenum(0), m_busnumber(0), m_busnumaddr(nullptr)
95	95	{
96	96	for (int i = 0; i < ARRAY_LENGTH(m_devtag); i++) {
97	97	m_devtag[i]= NULL;

trunk/src/devices/bus/lpci/southbridge.cpp

r250251	r250252
141	141	m_ds12885(*this, "rtc"),
142	142	m_pc_kbdc(*this, "pc_kbdc"),
143	143	m_ide(*this, "ide"),
144		m_ide2(*this, "ide2")
	144	m_ide2(*this, "ide2"), m_at_spkrdata(0), m_pit_out2(0), m_dma_channel(0), m_cur_eop(false), m_dma_high_byte(0), m_at_speaker(0), m_refresh(false), m_channel_check(0), m_nmi_enabled(0)
145	145	{
146	146	}
147	147	/**********************************************************

trunk/src/devices/bus/macpds/macpds.cpp

r250251	r250252
28	28	//-------------------------------------------------
29	29	macpds_slot_device::macpds_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
30	30	device_t(mconfig, MACPDS_SLOT, "Mac 68000 Processor-Direct Slot", tag, owner, clock, "macpds_slot", __FILE__),
31		device_slot_interface(mconfig, *this)
	31	device_slot_interface(mconfig, *this),
	32	m_macpds_tag(nullptr),
	33	m_macpds_slottag(nullptr)
32	34	{
33	35	}
34	36
35	37	macpds_slot_device::macpds_slot_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
36	38	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
37		device_slot_interface(mconfig, *this)
	39	device_slot_interface(mconfig, *this), m_macpds_tag(nullptr), m_macpds_slottag(nullptr)
38	40	{
39	41	}
40	42
r250251	r250252
77	79	//-------------------------------------------------
78	80
79	81	macpds_device::macpds_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
80		device_t(mconfig, MACPDS, "MACPDS", tag, owner, clock, "macpds", __FILE__)
	82	device_t(mconfig, MACPDS, "MACPDS", tag, owner, clock, "macpds", __FILE__), m_maincpu(nullptr), m_cputag(nullptr)
81	83	{
82	84	}
83	85
84	86	macpds_device::macpds_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
85		device_t(mconfig, type, name, tag, owner, clock, shortname, source)
	87	device_t(mconfig, type, name, tag, owner, clock, shortname, source), m_maincpu(nullptr), m_cputag(nullptr)
86	88	{
87	89	}
88	90	//-------------------------------------------------
r250251	r250252
148	150
149	151	device_macpds_card_interface::device_macpds_card_interface(const machine_config &mconfig, device_t &device)
150	152	: device_slot_card_interface(mconfig, device),
151		m_macpds(NULL),
152		m_macpds_tag(NULL)
	153	m_macpds(nullptr),
	154	m_macpds_tag(nullptr), m_macpds_slottag(nullptr), m_next(nullptr)
153	155	{
154	156	}
155	157

trunk/src/devices/bus/macpds/pds_tpdfpd.cpp

r250251	r250252
89	89	macpds_sedisplay_device::macpds_sedisplay_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
90	90	device_t(mconfig, PDS_SEDISPLAY, "Radius SE Full Page Display", tag, owner, clock, "pds_sefp", __FILE__),
91	91	device_video_interface(mconfig, *this),
92		device_macpds_card_interface(mconfig, *this)
	92	device_macpds_card_interface(mconfig, *this), m_vram(nullptr), m_vbl_disable(0), m_count(0), m_clutoffs(0), m_timer(nullptr)
93	93	{
94	94	m_assembled_tag = std::string(tag).append(":").append(SEDISPLAY_SCREEN_NAME);
95	95	m_screen_tag = m_assembled_tag.c_str();
r250251	r250252
98	98	macpds_sedisplay_device::macpds_sedisplay_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
99	99	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
100	100	device_video_interface(mconfig, *this),
101		device_macpds_card_interface(mconfig, *this)
	101	device_macpds_card_interface(mconfig, *this), m_vram(nullptr), m_vbl_disable(0), m_count(0), m_clutoffs(0), m_timer(nullptr)
102	102	{
103	103	m_assembled_tag = std::string(tag).append(":").append(SEDISPLAY_SCREEN_NAME);
104	104	m_screen_tag = m_assembled_tag.c_str();

trunk/src/devices/bus/megadrive/eeprom.cpp

r250251	r250252
63	63	md_std_eeprom_device::md_std_eeprom_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
64	64	: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
65	65	device_md_cart_interface( mconfig, *this ),
66		m_i2cmem(*this, "i2cmem")
67		{
	66	m_i2cmem(*this, "i2cmem"), m_i2c_mem(0), m_i2c_clk(0)
	67	{
68	68	}
69	69
70	70	md_std_eeprom_device::md_std_eeprom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
71	71	: device_t(mconfig, MD_STD_EEPROM, "MD Standard cart + EEPROM", tag, owner, clock, "md_std_eeprom", __FILE__),
72	72	device_md_cart_interface( mconfig, *this ),
73		m_i2cmem(*this, "i2cmem")
74		{
	73	m_i2cmem(*this, "i2cmem"), m_i2c_mem(0), m_i2c_clk(0)
	74	{
75	75	}
76	76
77	77	md_eeprom_nbajam_device::md_eeprom_nbajam_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)

trunk/src/devices/bus/megadrive/ggenie.cpp

r250251	r250252
35	35	md_rom_ggenie_device::md_rom_ggenie_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
36	36	: device_t(mconfig, MD_ROM_GAMEGENIE, "MD Game Genie", tag, owner, clock, "md_ggenie", __FILE__),
37	37	device_md_cart_interface( mconfig, *this ),
38		m_exp(*this, "subslot")
39		{
	38	m_exp(*this, "subslot"), m_gg_bypass(0), m_reg_enable(0)
	39	{
40	40	}
41	41
42	42

trunk/src/devices/bus/megadrive/jcart.cpp

r250251	r250252
59	59	// Micro Machines 2, Micro Machines Military
60	60	md_seprom_codemast_device::md_seprom_codemast_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
61	61	: md_jcart_device(mconfig, type, name, tag, owner, clock, shortname, source),
62		m_i2cmem(*this, "i2cmem")
63		{
	62	m_i2cmem(*this, "i2cmem"), m_i2c_mem(0), m_i2c_clk(0)
	63	{
64	64	}
65	65
66	66	md_seprom_codemast_device::md_seprom_codemast_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
67	67	: md_jcart_device(mconfig, MD_SEPROM_CODEMAST, "MD J-Cart games + SEPROM", tag, owner, clock, "md_seprom_codemast", __FILE__),
68		m_i2cmem(*this, "i2cmem")
69		{
	68	m_i2cmem(*this, "i2cmem"), m_i2c_mem(0), m_i2c_clk(0)
	69	{
70	70	}
71	71
72	72	// Micro Machines 96

trunk/src/devices/bus/megadrive/md_slot.cpp

r250251	r250252
64	64	//-------------------------------------------------
65	65
66	66	device_md_cart_interface::device_md_cart_interface(const machine_config &mconfig, device_t &device)
67		: device_slot_card_interface(mconfig, device),
	67	: device_slot_card_interface(mconfig, device), m_nvram_start(0), m_nvram_end(0), m_nvram_active(0), m_nvram_readonly(0), m_nvram_handlers_installed(0),
68	68	m_rom(NULL),
69	69	m_rom_size(0)
70	70	{
r250251	r250252
164	164	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
165	165	device_image_interface(mconfig, *this),
166	166	device_slot_interface(mconfig, *this),
167		m_type(SEGA_STD),
	167	m_type(SEGA_STD), m_cart(nullptr),
168	168	m_must_be_loaded(1)
169	169	{
170	170	}

trunk/src/devices/bus/megadrive/rom.cpp

r250251	r250252
86	86	}
87	87
88	88	md_rom_ssf2_device::md_rom_ssf2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
89		: md_std_rom_device(mconfig, MD_ROM_SSF2, "MD Super SF2", tag, owner, clock, "md_rom_ssf2", __FILE__)
90		{
	89	: md_std_rom_device(mconfig, MD_ROM_SSF2, "MD Super SF2", tag, owner, clock, "md_rom_ssf2", __FILE__), m_lastoff(0), m_lastdata(0)
	90	{
91	91	}
92	92
93	93	md_rom_cm2in1_device::md_rom_cm2in1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
94		: md_std_rom_device(mconfig, MD_ROM_CM2IN1, "MD Codemasters 2in1", tag, owner, clock, "md_rom_cm2in1", __FILE__)
95		{
	94	: md_std_rom_device(mconfig, MD_ROM_CM2IN1, "MD Codemasters 2in1", tag, owner, clock, "md_rom_cm2in1", __FILE__), m_base(0)
	95	{
96	96	}
97	97
98	98	md_rom_mcpirate_device::md_rom_mcpirate_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
99		: md_std_rom_device(mconfig, MD_ROM_MCPIR, "MD Pirate Multicarts (Various)", tag, owner, clock, "md_rom_mcpirate", __FILE__)
100		{
	99	: md_std_rom_device(mconfig, MD_ROM_MCPIR, "MD Pirate Multicarts (Various)", tag, owner, clock, "md_rom_mcpirate", __FILE__), m_bank(0)
	100	{
101	101	}
102	102
103	103	md_rom_bugslife_device::md_rom_bugslife_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
121	121	}
122	122
123	123	md_rom_smw64_device::md_rom_smw64_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
124		: md_std_rom_device(mconfig, MD_ROM_SMW64, "MD Super Mario World 64", tag, owner, clock, "md_rom_smw64", __FILE__)
125		{
	124	: md_std_rom_device(mconfig, MD_ROM_SMW64, "MD Super Mario World 64", tag, owner, clock, "md_rom_smw64", __FILE__), m_latch0(0), m_latch1(0)
	125	{
126	126	}
127	127
128	128	md_rom_sbubl_device::md_rom_sbubl_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
156	156	}
157	157
158	158	md_rom_chinf3_device::md_rom_chinf3_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
159		: md_std_rom_device(mconfig, MD_ROM_CHINF3, "MD Chinese Fighter 3", tag, owner, clock, "md_rom_chinf3", __FILE__)
160		{
	159	: md_std_rom_device(mconfig, MD_ROM_CHINF3, "MD Chinese Fighter 3", tag, owner, clock, "md_rom_chinf3", __FILE__), m_bank(0)
	160	{
161	161	}
162	162
163	163	md_rom_16mj2_device::md_rom_16mj2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
176	176	}
177	177
178	178	md_rom_lion2_device::md_rom_lion2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
179		: md_std_rom_device(mconfig, MD_ROM_LION2, "MD Lion King 2", tag, owner, clock, "md_rom_lion2", __FILE__)
180		{
	179	: md_std_rom_device(mconfig, MD_ROM_LION2, "MD Lion King 2", tag, owner, clock, "md_rom_lion2", __FILE__), m_prot1_data(0), m_prot2_data(0)
	180	{
181	181	}
182	182
183	183	md_rom_lion3_device::md_rom_lion3_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
184		: md_std_rom_device(mconfig, MD_ROM_LION3, "MD Lion King 3", tag, owner, clock, "md_rom_lion3", __FILE__)
185		{
	184	: md_std_rom_device(mconfig, MD_ROM_LION3, "MD Lion King 3", tag, owner, clock, "md_rom_lion3", __FILE__), m_bank(0)
	185	{
186	186	}
187	187
188	188	md_rom_pokea_device::md_rom_pokea_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
191	191	}
192	192
193	193	md_rom_pokestad_device::md_rom_pokestad_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
194		: md_std_rom_device(mconfig, MD_ROM_POKESTAD, "MD Pokemon Stadium", tag, owner, clock, "md_rom_pokestad", __FILE__)
195		{
	194	: md_std_rom_device(mconfig, MD_ROM_POKESTAD, "MD Pokemon Stadium", tag, owner, clock, "md_rom_pokestad", __FILE__), m_bank(0)
	195	{
196	196	}
197	197
198	198	md_rom_realtec_device::md_rom_realtec_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
199		: md_std_rom_device(mconfig, MD_ROM_REALTEC, "MD Realtec", tag, owner, clock, "md_rom_realtec", __FILE__)
200		{
	199	: md_std_rom_device(mconfig, MD_ROM_REALTEC, "MD Realtec", tag, owner, clock, "md_rom_realtec", __FILE__), m_bank_addr(0), m_bank_size(0), m_old_bank_addr(0)
	200	{
201	201	}
202	202
203	203	md_rom_redcl_device::md_rom_redcl_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
206	206	}
207	207
208	208	md_rom_squir_device::md_rom_squir_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
209		: md_std_rom_device(mconfig, MD_ROM_SQUIR, "MD Squirrel King", tag, owner, clock, "md_rom_squir", __FILE__)
210		{
	209	: md_std_rom_device(mconfig, MD_ROM_SQUIR, "MD Squirrel King", tag, owner, clock, "md_rom_squir", __FILE__), m_latch(0)
	210	{
211	211	}
212	212
213	213	md_rom_tekkensp_device::md_rom_tekkensp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
214		: md_std_rom_device(mconfig, MD_ROM_TEKKENSP, "MD Tekken Special", tag, owner, clock, "md_rom_tekkensp", __FILE__)
215		{
	214	: md_std_rom_device(mconfig, MD_ROM_TEKKENSP, "MD Tekken Special", tag, owner, clock, "md_rom_tekkensp", __FILE__), m_reg(0)
	215	{
216	216	}
217	217
218	218	md_rom_topf_device::md_rom_topf_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
219		: md_std_rom_device(mconfig, MD_ROM_TOPF, "MD Top Fighter", tag, owner, clock, "md_rom_topf", __FILE__)
220		{
	219	: md_std_rom_device(mconfig, MD_ROM_TOPF, "MD Top Fighter", tag, owner, clock, "md_rom_topf", __FILE__), m_latch(0)
	220	{
221	221	}
222	222
223	223	md_rom_radica_device::md_rom_radica_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
224		: md_std_rom_device(mconfig, MD_ROM_RADICA, "MD Radica TV games", tag, owner, clock, "md_rom_radica", __FILE__)
225		{
	224	: md_std_rom_device(mconfig, MD_ROM_RADICA, "MD Radica TV games", tag, owner, clock, "md_rom_radica", __FILE__), m_bank(0)
	225	{
226	226	}
227	227
228	228	md_rom_beggarp_device::md_rom_beggarp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
229		: md_std_rom_device(mconfig, MD_ROM_BEGGARP, "MD Beggar Prince", tag, owner, clock, "md_rom_beggarp", __FILE__)
230		{
	229	: md_std_rom_device(mconfig, MD_ROM_BEGGARP, "MD Beggar Prince", tag, owner, clock, "md_rom_beggarp", __FILE__), m_mode(0), m_lock(0)
	230	{
231	231	}
232	232
233	233	md_rom_wukong_device::md_rom_wukong_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
234		: md_std_rom_device(mconfig, MD_ROM_WUKONG, "MD Legend of Wukong", tag, owner, clock, "md_rom_wukong", __FILE__)
235		{
	234	: md_std_rom_device(mconfig, MD_ROM_WUKONG, "MD Legend of Wukong", tag, owner, clock, "md_rom_wukong", __FILE__), m_mode(0)
	235	{
236	236	}
237	237
238	238	//-------------------------------------------------

trunk/src/devices/bus/megadrive/stm95.cpp

r250251	r250252
177	177
178	178	md_eeprom_stm95_device::md_eeprom_stm95_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
179	179	: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
180		device_md_cart_interface( mconfig, *this )
181		{
	180	device_md_cart_interface( mconfig, *this ), m_rdcnt(0)
	181	{
182	182	}
183	183
184	184	md_eeprom_stm95_device::md_eeprom_stm95_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
185	185	: device_t(mconfig, MD_EEPROM_STM95, "MD Cart + EEPROM STM95", tag, owner, clock, "md_eeprom_stm95", __FILE__),
186		device_md_cart_interface( mconfig, *this )
187		{
	186	device_md_cart_interface( mconfig, *this ), m_rdcnt(0)
	187	{
188	188	}
189	189
190	190

trunk/src/devices/bus/megadrive/svp.cpp

r250251	r250252
40	40	: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
41	41	device_md_cart_interface( mconfig, *this ),
42	42	m_svp(*this, "svp"),
43		m_test_ipt(*this, "MEMORY_TEST")
44		{
	43	m_test_ipt(*this, "MEMORY_TEST"), m_emu_status(0), m_xst(0), m_xst2(0)
	44	{
45	45	}
46	46
47	47	md_rom_svp_device::md_rom_svp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
48	48	: device_t(mconfig, MD_ROM_SVP, "MD Virtua Racing", tag, owner, clock, "md_rom_svp", __FILE__),
49	49	device_md_cart_interface( mconfig, *this ),
50	50	m_svp(*this, "svp"),
51		m_test_ipt(*this, "MEMORY_TEST")
52		{
	51	m_test_ipt(*this, "MEMORY_TEST"), m_emu_status(0), m_xst(0), m_xst2(0)
	52	{
53	53	}
54	54
55	55

trunk/src/devices/bus/midi/midi.cpp

r250251	r250252
6	6
7	7	midi_port_device::midi_port_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
8	8	: device_t(mconfig, MIDI_PORT, "Midi Port", tag, owner, clock, "midi_port", __FILE__),
9		device_slot_interface(mconfig, *this),
	9	device_slot_interface(mconfig, *this),
	10	m_rxd(0),
10	11	m_rxd_handler(*this),
11	12	m_dev(NULL)
12	13	{

trunk/src/devices/bus/msx_cart/disk.cpp

r250251	r250252
140	140
141	141
142	142	msx_cart_disk_type1::msx_cart_disk_type1(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname)
143		: msx_cart_disk_wd(mconfig, type, name, tag, owner, clock, shortname)
144		, m_control(0)
	143	: msx_cart_disk_wd(mconfig, type, name, tag, owner, clock, shortname), m_side_control(0)
	144	, m_control(0)
145	145	{
146	146	}
147	147

trunk/src/devices/bus/msx_cart/msx_audio_kb.cpp

r250251	r250252
8	8
9	9
10	10	msx_audio_kbdc_port_device::msx_audio_kbdc_port_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
11		: device_t(mconfig, MSX_AUDIO_KBDC_PORT, "MSX Audio keyboard connector port", tag, owner, clock, "msx_audio_kbdc_port", __FILE__)
12		, device_slot_interface(mconfig, *this)
	11	: device_t(mconfig, MSX_AUDIO_KBDC_PORT, "MSX Audio keyboard connector port", tag, owner, clock, "msx_audio_kbdc_port", __FILE__),
	12	device_slot_interface(mconfig, *this),
	13	m_keyboard(NULL)
13	14	{
14	15	}
15	16

trunk/src/devices/bus/neogeo/banked_cart.cpp

r250251	r250252
10	10
11	11	neogeo_banked_cart_device::neogeo_banked_cart_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
12	12	: device_t(mconfig, NEOGEO_BANKED_CART, "NeoGeo Banked Cartridge", tag, owner, clock, "neogeo_banked_cart", __FILE__),
13		m_bank_cartridge(0),
14		m_region(0)
	13	m_bank_cartridge(0),
	14	m_main_cpu_bank_address(0),
	15	m_region(0),
	16	m_region_size(0)
15	17
16	18	{
17	19	}

trunk/src/devices/bus/neogeo/bootleg_prot.cpp

r250251	r250252
10	10
11	11
12	12	ngbootleg_prot_device::ngbootleg_prot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
13		: device_t(mconfig, NGBOOTLEG_PROT, "NeoGeo Protection (Bootleg)", tag, owner, clock, "ngbootleg_prot", __FILE__)
	13	: device_t(mconfig, NGBOOTLEG_PROT, "NeoGeo Protection (Bootleg)", tag, owner, clock, "ngbootleg_prot", __FILE__),
	14	kof2k3_overlay(0),
	15	m_mainrom(NULL),
	16	m_fixedrom(NULL),
	17	m_bankdev(NULL)
14	18	{
15	19	}
16	20

trunk/src/devices/bus/neogeo/cmc_prot.cpp

r250251	r250252
10	10
11	11
12	12	cmc_prot_device::cmc_prot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
13		: device_t(mconfig, CMC_PROT, "NeoGeo Protection (CMC)", tag, owner, clock, "cmc_prot", __FILE__)
	13	: device_t(mconfig, CMC_PROT, "NeoGeo Protection (CMC)", tag, owner, clock, "cmc_prot", __FILE__),
	14	type0_t03(NULL),
	15	type0_t12(NULL),
	16	type1_t03(NULL),
	17	type1_t12(NULL),
	18	address_8_15_xor1(NULL),
	19	address_8_15_xor2(NULL),
	20	address_16_23_xor1(NULL),
	21	address_16_23_xor2(NULL),
	22	address_0_7_xor(NULL)
14	23	{
15	24	}
16	25

trunk/src/devices/bus/neogeo/fatfury2_prot.cpp

r250251	r250252
10	10
11	11
12	12	fatfury2_prot_device::fatfury2_prot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
13		: device_t(mconfig, FATFURY2_PROT, "NeoGeo Protection (Fatal Fury 2)", tag, owner, clock, "fatfury2_prot", __FILE__)
	13	: device_t(mconfig, FATFURY2_PROT, "NeoGeo Protection (Fatal Fury 2)", tag, owner, clock, "fatfury2_prot", __FILE__),
	14	m_bankdev(NULL),
	15	m_fatfury2_prot_data(0)
14	16	{
15	17	}
16	18

trunk/src/devices/bus/neogeo/kof98_prot.cpp

r250251	r250252
11	11
12	12
13	13	kof98_prot_device::kof98_prot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
14		: device_t(mconfig, KOF98_PROT, "NeoGeo Protection (KOF98)", tag, owner, clock, "kof98_prot", __FILE__)
	14	: device_t(mconfig, KOF98_PROT, "NeoGeo Protection (KOF98)", tag, owner, clock, "kof98_prot", __FILE__),
	15	kof98_prot_state(0)
15	16	{
16	17	}
17	18

trunk/src/devices/bus/neogeo/mslugx_prot.cpp

r250251	r250252
9	9
10	10
11	11	mslugx_prot_device::mslugx_prot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
12		: device_t(mconfig, MSLUGX_PROT, "NeoGeo Protection (Metal Slug X)", tag, owner, clock, "mslugx_prot", __FILE__)
	12	: device_t(mconfig, MSLUGX_PROT, "NeoGeo Protection (Metal Slug X)", tag, owner, clock, "mslugx_prot", __FILE__),
	13	m_mslugx_counter(0),
	14	m_mslugx_command(0)
13	15	{
14	16	}
15	17

trunk/src/devices/bus/neogeo/neogeo_intf.cpp

r250251	r250252
9	9	//-------------------------------------------------
10	10
11	11	device_neogeo_cart_interface::device_neogeo_cart_interface(const machine_config &mconfig, device_t &device)
12		: device_slot_card_interface(mconfig, device)
13		/*
14		m_rom(NULL),
15		m_fixed(NULL),
16		m_sprites(NULL),
17		m_sprites_optimized(NULL),
18		m_audio(NULL),
19		m_ym(NULL),
20		m_ymdelta(NULL),
21		m_audiocrypt(NULL)
22		*/
	12	: device_slot_card_interface(mconfig, device),
	13	m_sprite_gfx_address_mask(0)
	14	/*
	15	m_rom(NULL),
	16	m_fixed(NULL),
	17	m_sprites(NULL),
	18	m_sprites_optimized(NULL),
	19	m_audio(NULL),
	20	m_ym(NULL),
	21	m_ymdelta(NULL),
	22	m_audiocrypt(NULL)
	23	*/
23	24	{
24	25	}
25	26

trunk/src/devices/bus/neogeo/pvc_prot.cpp

r250251	r250252
11	11
12	12
13	13	pvc_prot_device::pvc_prot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
14		: device_t(mconfig, PVC_PROT, "NeoGeo Protection (PVC)", tag, owner, clock, "pvc_prot", __FILE__)
	14	: device_t(mconfig, PVC_PROT, "NeoGeo Protection (PVC)", tag, owner, clock, "pvc_prot", __FILE__),
	15	m_bankdev(NULL)
15	16	{
16	17	}
17	18

trunk/src/devices/bus/neogeo/sbp_prot.cpp

r250251	r250252
11	11
12	12
13	13	sbp_prot_device::sbp_prot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
14		: device_t(mconfig, SBP_PROT, "NeoGeo Protection (Super Bubble Pop)", tag, owner, clock, "sbp_prot", __FILE__)
	14	: device_t(mconfig, SBP_PROT, "NeoGeo Protection (Super Bubble Pop)", tag, owner, clock, "sbp_prot", __FILE__),
	15	m_mainrom(NULL)
15	16	{
16	17	}
17	18

trunk/src/devices/bus/neogeo/sma_prot.cpp

r250251	r250252
9	9
10	10
11	11	sma_prot_device::sma_prot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
12		: device_t(mconfig, SMA_PROT, "NeoGeo SMA Cartridge", tag, owner, clock, "sma_prot", __FILE__)
	12	: device_t(mconfig, SMA_PROT, "NeoGeo SMA Cartridge", tag, owner, clock, "sma_prot", __FILE__),
	13	m_bankdev(NULL),
	14	m_sma_rng(0)
13	15	{
14	16	}
15	17

trunk/src/devices/bus/nes/act53.cpp

r250251	r250252
33	33
34	34
35	35	nes_action53_device::nes_action53_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
36		: nes_nrom_device(mconfig, NES_ACTION53, "NES Cart Action 53 PCB", tag, owner, clock, "nes_action53", __FILE__)
37		{
	36	: nes_nrom_device(mconfig, NES_ACTION53, "NES Cart Action 53 PCB", tag, owner, clock, "nes_action53", __FILE__),
	37	m_sel(0)
	38	{
38	39	}
39	40
40	41

trunk/src/devices/bus/nes/aladdin.cpp

r250251	r250252
41	41	aladdin_cart_interface::aladdin_cart_interface(const machine_config &mconfig, device_t &device)
42	42	: device_slot_card_interface(mconfig, device),
43	43	m_rom(NULL),
44		m_rom_size(0),
	44	m_rom_size(0),
	45	m_lobank(0),
	46	m_hibank(0),
45	47	m_rom_mask(0xff)
46	48	{
47	49	}
r250251	r250252
67	69	nes_aladdin_slot_device::nes_aladdin_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
68	70	device_t(mconfig, NES_ALADDIN_SLOT, "NES Aladdin Deck Enhancer Cartridge Slot", tag, owner, clock, "nes_ade_slot", __FILE__),
69	71	device_image_interface(mconfig, *this),
70		device_slot_interface(mconfig, *this)
	72	device_slot_interface(mconfig, *this), m_cart(nullptr)
71	73	{
72	74	}
73	75
r250251	r250252
194	196	}
195	197
196	198	nes_algq_rom_device::nes_algq_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
197		: nes_algn_rom_device(mconfig, NES_ALGQ_ROM, "NES Aladdin Deck Enhancer ALGQ ROM", tag, owner, clock, "nes_algq_rom", __FILE__)
198		{
	199	: nes_algn_rom_device(mconfig, NES_ALGQ_ROM, "NES Aladdin Deck Enhancer ALGQ ROM", tag, owner, clock, "nes_algq_rom", __FILE__), m_bank_base(0)
	200	{
199	201	}
200	202
201	203	void nes_algn_rom_device::device_start()

trunk/src/devices/bus/nes/ave.cpp

r250251	r250252
49	49	}
50	50
51	51	nes_maxi15_device::nes_maxi15_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
52		: nes_nrom_device(mconfig, NES_MAXI15, "NES Cart AVE Maxi 15 PCB", tag, owner, clock, "nes_maxi15", __FILE__)
53		{
	52	: nes_nrom_device(mconfig, NES_MAXI15, "NES Cart AVE Maxi 15 PCB", tag, owner, clock, "nes_maxi15", __FILE__), m_reg(0), m_bank(0)
	53	{
54	54	}
55	55
56	56

trunk/src/devices/bus/nes/bandai.cpp

r250251	r250252
59	59
60	60
61	61	nes_oekakids_device::nes_oekakids_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
62		: nes_nrom_device(mconfig, NES_OEKAKIDS, "NES Cart Bandai Oeka Kids PCB", tag, owner, clock, "nes_oeka", __FILE__)
63		{
	62	: nes_nrom_device(mconfig, NES_OEKAKIDS, "NES Cart Bandai Oeka Kids PCB", tag, owner, clock, "nes_oeka", __FILE__), m_reg(0), m_latch(0)
	63	{
64	64	}
65	65
66	66	nes_fcg_device::nes_fcg_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
67		: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source)
68		{
	67	: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source), m_irq_count(0), m_irq_enable(0), irq_timer(nullptr)
	68	{
69	69	}
70	70
71	71	nes_fcg_device::nes_fcg_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
72		: nes_nrom_device(mconfig, NES_FCG, "NES Cart Bandai FCG PCB", tag, owner, clock, "nes_fcg", __FILE__)
73		{
	72	: nes_nrom_device(mconfig, NES_FCG, "NES Cart Bandai FCG PCB", tag, owner, clock, "nes_fcg", __FILE__), m_irq_count(0), m_irq_enable(0), irq_timer(nullptr)
	73	{
74	74	}
75	75
76	76	nes_lz93d50_device::nes_lz93d50_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
r250251	r250252
85	85
86	86	nes_lz93d50_24c01_device::nes_lz93d50_24c01_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
87	87	: nes_lz93d50_device(mconfig, type, name, tag, owner, clock, shortname, source),
88		m_i2cmem(*this, "i2cmem")
89		{
	88	m_i2cmem(*this, "i2cmem"), m_i2c_dir(0)
	89	{
90	90	}
91	91
92	92	nes_lz93d50_24c01_device::nes_lz93d50_24c01_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
93	93	: nes_lz93d50_device(mconfig, NES_LZ93D50_24C01, "NES Cart Bandai LZ93D50 + 24C01 PCB", tag, owner, clock, "nes_lz93d50_ep1", __FILE__),
94		m_i2cmem(*this, "i2cmem")
95		{
	94	m_i2cmem(*this, "i2cmem"), m_i2c_dir(0)
	95	{
96	96	}
97	97
98	98	nes_lz93d50_24c02_device::nes_lz93d50_24c02_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)

trunk/src/devices/bus/nes/benshieng.cpp

r250251	r250252
32	32
33	33
34	34	nes_benshieng_device::nes_benshieng_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
35		: nes_nrom_device(mconfig, NES_BENSHIENG, "NES Cart Benshieng PCB", tag, owner, clock, "nes_benshieng", __FILE__)
36		{
	35	: nes_nrom_device(mconfig, NES_BENSHIENG, "NES Cart Benshieng PCB", tag, owner, clock, "nes_benshieng", __FILE__),
	36	m_dipsetting(0)
	37	{
37	38	}
38	39
39	40

trunk/src/devices/bus/nes/bootleg.cpp

r250251	r250252
66	66	}
67	67
68	68	nes_sc127_device::nes_sc127_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
69		: nes_nrom_device(mconfig, NES_SC127, "NES Cart SC-127 PCB", tag, owner, clock, "nes_sc127", __FILE__)
70		{
	69	: nes_nrom_device(mconfig, NES_SC127, "NES Cart SC-127 PCB", tag, owner, clock, "nes_sc127", __FILE__), m_irq_count(0), m_irq_enable(0)
	70	{
71	71	}
72	72
73	73	nes_mbaby_device::nes_mbaby_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
74		: nes_nrom_device(mconfig, NES_MARIOBABY, "NES Cart Mario Baby Bootleg PCB", tag, owner, clock, "nes_mbaby", __FILE__)
75		{
	74	: nes_nrom_device(mconfig, NES_MARIOBABY, "NES Cart Mario Baby Bootleg PCB", tag, owner, clock, "nes_mbaby", __FILE__), m_latch(0), m_irq_enable(0), irq_timer(nullptr)
	75	{
76	76	}
77	77
78	78	nes_asn_device::nes_asn_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
79		: nes_nrom_device(mconfig, NES_ASN, "NES Cart Ai Senshi Nicol Bootleg PCB", tag, owner, clock, "nes_asn", __FILE__)
80		{
	79	: nes_nrom_device(mconfig, NES_ASN, "NES Cart Ai Senshi Nicol Bootleg PCB", tag, owner, clock, "nes_asn", __FILE__), m_latch(0)
	80	{
81	81	}
82	82
83	83	nes_smb3p_device::nes_smb3p_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
84		: nes_nrom_device(mconfig, NES_SMB3PIRATE, "NES Cart Super Mario Bros. 3 Pirate PCB", tag, owner, clock, "nes_smb3p", __FILE__)
85		{
	84	: nes_nrom_device(mconfig, NES_SMB3PIRATE, "NES Cart Super Mario Bros. 3 Pirate PCB", tag, owner, clock, "nes_smb3p", __FILE__), m_irq_count(0), m_irq_enable(0), irq_timer(nullptr)
	85	{
86	86	}
87	87
88	88	nes_btl_dn_device::nes_btl_dn_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
89		: nes_nrom_device(mconfig, NES_BTL_DNINJA, "NES Cart DragonNinja Pirate PCB", tag, owner, clock, "nes_btl_dn", __FILE__)
90		{
	89	: nes_nrom_device(mconfig, NES_BTL_DNINJA, "NES Cart DragonNinja Pirate PCB", tag, owner, clock, "nes_btl_dn", __FILE__), m_irq_count(0)
	90	{
91	91	}
92	92
93	93	nes_whirl2706_device::nes_whirl2706_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
94		: nes_nrom_device(mconfig, NES_WHIRLWIND_2706, "NES Cart Whirlwind 2706 PCB", tag, owner, clock, "nes_whirl2706", __FILE__)
95		{
	94	: nes_nrom_device(mconfig, NES_WHIRLWIND_2706, "NES Cart Whirlwind 2706 PCB", tag, owner, clock, "nes_whirl2706", __FILE__), m_latch(0)
	95	{
96	96	}
97	97
98	98	nes_smb2j_device::nes_smb2j_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
99		: nes_nrom_device(mconfig, NES_SMB2J, "NES Cart Super Mario Bros. 2 Jpn PCB", tag, owner, clock, "nes_smb2j", __FILE__)
100		{
	99	: nes_nrom_device(mconfig, NES_SMB2J, "NES Cart Super Mario Bros. 2 Jpn PCB", tag, owner, clock, "nes_smb2j", __FILE__), m_irq_count(0), m_irq_enable(0), irq_timer(nullptr)
	100	{
101	101	}
102	102
103	103	nes_smb2ja_device::nes_smb2ja_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
104		: nes_nrom_device(mconfig, NES_SMB2JA, "NES Cart Super Mario Bros. 2 Jpn (Alt) PCB", tag, owner, clock, "nes_smb2ja", __FILE__)
105		{
	104	: nes_nrom_device(mconfig, NES_SMB2JA, "NES Cart Super Mario Bros. 2 Jpn (Alt) PCB", tag, owner, clock, "nes_smb2ja", __FILE__), m_irq_count(0), m_irq_enable(0), irq_timer(nullptr)
	105	{
106	106	}
107	107
108	108	nes_smb2jb_device::nes_smb2jb_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
109		: nes_nrom_device(mconfig, NES_SMB2JB, "NES Cart Super Mario Bros. 2 Jpn (Alt 2) PCB", tag, owner, clock, "nes_smb2jb", __FILE__)
110		{
	109	: nes_nrom_device(mconfig, NES_SMB2JB, "NES Cart Super Mario Bros. 2 Jpn (Alt 2) PCB", tag, owner, clock, "nes_smb2jb", __FILE__), m_irq_count(0), m_irq_enable(0), irq_timer(nullptr)
	110	{
111	111	}
112	112
113	113	nes_09034a_device::nes_09034a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
114		: nes_nrom_device(mconfig, NES_09034A, "NES Cart 09-034A PCB", tag, owner, clock, "nes_09034a", __FILE__)
115		{
	114	: nes_nrom_device(mconfig, NES_09034A, "NES Cart 09-034A PCB", tag, owner, clock, "nes_09034a", __FILE__), m_reg(0)
	115	{
116	116	}
117	117
118	118	nes_tobidase_device::nes_tobidase_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
119		: nes_nrom_device(mconfig, NES_TOBIDASE, "NES Cart Tobidase Daisakusen Pirate PCB", tag, owner, clock, "nes_tobidase", __FILE__)
120		{
	119	: nes_nrom_device(mconfig, NES_TOBIDASE, "NES Cart Tobidase Daisakusen Pirate PCB", tag, owner, clock, "nes_tobidase", __FILE__), m_latch(0)
	120	{
121	121	}
122	122
123	123	nes_lh32_device::nes_lh32_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
124		: nes_nrom_device(mconfig, NES_LH32, "NES Cart LH-32 Pirate PCB", tag, owner, clock, "nes_lh32", __FILE__)
125		{
	124	: nes_nrom_device(mconfig, NES_LH32, "NES Cart LH-32 Pirate PCB", tag, owner, clock, "nes_lh32", __FILE__), m_latch(0)
	125	{
126	126	}
127	127
128	128	nes_lh10_device::nes_lh10_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
129		: nes_nrom_device(mconfig, NES_LH10, "NES Cart LH-10 Pirate PCB", tag, owner, clock, "nes_lh10", __FILE__)
130		{
	129	: nes_nrom_device(mconfig, NES_LH10, "NES Cart LH-10 Pirate PCB", tag, owner, clock, "nes_lh10", __FILE__), m_latch(0)
	130	{
131	131	}
132	132
133	133	nes_lh53_device::nes_lh53_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
134		: nes_nrom_device(mconfig, NES_LH53, "NES Cart LH-53 Pirate PCB", tag, owner, clock, "nes_lh53", __FILE__)
135		{
	134	: nes_nrom_device(mconfig, NES_LH53, "NES Cart LH-53 Pirate PCB", tag, owner, clock, "nes_lh53", __FILE__), m_irq_count(0), m_irq_enable(0), m_reg(0), irq_timer(nullptr)
	135	{
136	136	}
137	137
138	138	nes_2708_device::nes_2708_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
141	141	}
142	142
143	143	nes_ac08_device::nes_ac08_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
144		: nes_nrom_device(mconfig, NES_AC08, "NES Cart AC08 Pirate PCB", tag, owner, clock, "nes_ac08", __FILE__)
145		{
	144	: nes_nrom_device(mconfig, NES_AC08, "NES Cart AC08 Pirate PCB", tag, owner, clock, "nes_ac08", __FILE__), m_latch(0)
	145	{
146	146	}
147	147
148	148	nes_unl_bb_device::nes_unl_bb_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
156	156	}
157	157
158	158	nes_shuiguan_device::nes_shuiguan_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
159		: nes_nrom_device(mconfig, NES_SHUIGUAN, "NES Cart Shui Guan Pipe Pirate PCB", tag, owner, clock, "nes_shuiguan", __FILE__)
160		{
	159	: nes_nrom_device(mconfig, NES_SHUIGUAN, "NES Cart Shui Guan Pipe Pirate PCB", tag, owner, clock, "nes_shuiguan", __FILE__), m_irq_count(0), m_irq_enable(0), irq_timer(nullptr)
	160	{
161	161	}
162	162
163	163

trunk/src/devices/bus/nes/camerica.cpp

r250251	r250252
52	52	}
53	53
54	54	nes_bf9096_device::nes_bf9096_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
55		: nes_nrom_device(mconfig, NES_BF9096, "NES Cart Camerica BF9096 PCB", tag, owner, clock, "nes_bf9096", __FILE__)
56		{
	55	: nes_nrom_device(mconfig, NES_BF9096, "NES Cart Camerica BF9096 PCB", tag, owner, clock, "nes_bf9096", __FILE__), m_bank_base(0), m_latch(0)
	56	{
57	57	}
58	58
59	59	nes_golden5_device::nes_golden5_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
60		: nes_nrom_device(mconfig, NES_GOLDEN5, "NES Cart Camerica Golden 5 PCB", tag, owner, clock, "nes_golden5", __FILE__)
61		{
	60	: nes_nrom_device(mconfig, NES_GOLDEN5, "NES Cart Camerica Golden 5 PCB", tag, owner, clock, "nes_golden5", __FILE__), m_bank_base(0), m_latch(0)
	61	{
62	62	}
63	63
64	64

trunk/src/devices/bus/nes/cony.cpp

r250251	r250252
40	40
41	41
42	42	nes_cony_device::nes_cony_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
43		: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source)
44		{
	43	: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source),
	44	m_irq_count(0),
	45	m_irq_enable(0),
	46	irq_timer(nullptr),
	47	m_latch1(0),
	48	m_latch2(0),
	49	m_extra1(0)
	50	{
45	51	}
46	52
47	53	nes_cony_device::nes_cony_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
48		: nes_nrom_device(mconfig, NES_CONY, "NES Cart Cony PCB", tag, owner, clock, "nes_cony", __FILE__)
49		{
	54	: nes_nrom_device(mconfig, NES_CONY, "NES Cart Cony PCB", tag, owner, clock, "nes_cony", __FILE__), m_irq_count(0), m_irq_enable(0), irq_timer(nullptr), m_latch1(0), m_latch2(0), m_extra1(0)
	55	{
50	56	}
51	57
52	58	nes_yoko_device::nes_yoko_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
53		: nes_cony_device(mconfig, NES_YOKO, "NES Cart Yoko PCB", tag, owner, clock, "nes_yoko", __FILE__)
54		{
	59	: nes_cony_device(mconfig, NES_YOKO, "NES Cart Yoko PCB", tag, owner, clock, "nes_yoko", __FILE__), m_extra2(0)
	60	{
55	61	}
56	62
57	63

trunk/src/devices/bus/nes/datach.cpp

r250251	r250252
45	45	datach_cart_interface::datach_cart_interface(const machine_config &mconfig, device_t &device)
46	46	: device_slot_card_interface(mconfig, device),
47	47	m_i2cmem(*this, "i2cmem"),
48		m_rom(NULL)
49		{
	48	m_rom(nullptr), m_bank(0)
	49	{
50	50	}
51	51
52	52	datach_cart_interface::~datach_cart_interface()
r250251	r250252
70	70	nes_datach_slot_device::nes_datach_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
71	71	device_t(mconfig, NES_DATACH_SLOT, "NES Datach Cartridge Slot", tag, owner, clock, "nes_datach_slot", __FILE__),
72	72	device_image_interface(mconfig, *this),
73		device_slot_interface(mconfig, *this)
	73	device_slot_interface(mconfig, *this), m_cart(nullptr)
74	74	{
75	75	}
76	76
r250251	r250252
228	228
229	229
230	230	nes_datach_device::nes_datach_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
231		: nes_lz93d50_device(mconfig, NES_DATACH, "NES Cart Bandai Datach PCB", tag, owner, clock, "nes_datach", __FILE__),
	231	: nes_lz93d50_device(mconfig, NES_DATACH, "NES Cart Bandai Datach PCB", tag, owner, clock, "nes_datach", __FILE__), m_datach_latch(0),
232	232	m_i2cmem(*this, "i2cmem"),
233	233	m_reader(*this, "datach"),
234		m_subslot(*this, "datach_slot")
235		{
	234	m_subslot(*this, "datach_slot"), m_i2c_dir(0), m_i2c_in_use(0), serial_timer(nullptr)
	235	{
236	236	}
237	237
238	238

trunk/src/devices/bus/nes/disksys.cpp

r250251	r250252
104	104
105	105
106	106	nes_disksys_device::nes_disksys_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
107		: nes_nrom_device(mconfig, NES_DISKSYS, "FC RAM Expansion + Disk System PCB", tag, owner, clock, "fc_disksys", __FILE__),
	107	: nes_nrom_device(mconfig, NES_DISKSYS, "FC RAM Expansion + Disk System PCB", tag, owner, clock, "fc_disksys", __FILE__), m_2c33_rom(nullptr),
108	108	m_fds_data(NULL),
109		m_disk(*this, FLOPPY_0),
110		m_fds_sides(0)
111		{
	109	m_disk(*this, FLOPPY_0), irq_timer(nullptr), m_irq_count(0), m_irq_count_latch(0), m_irq_enable(0), m_irq_transfer(0), m_fds_motor_on(0), m_fds_door_closed(0), m_fds_current_side(0), m_fds_head_position(0), m_fds_status0(0), m_read_mode(0), m_drive_ready(0),
	110	m_fds_sides(0), m_fds_last_side(0), m_fds_count(0)
	111	{
112	112	}
113	113
114	114

trunk/src/devices/bus/nes/event.cpp

r250251	r250252
37	37
38	38	nes_event_device::nes_event_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
39	39	: nes_sxrom_device(mconfig, NES_EVENT, "NES Cart Event PCB", tag, owner, clock, "nes_event", __FILE__),
40		m_dsw(*this, "DIPSW")
41		{
	40	m_dsw(*this, "DIPSW"),
	41	m_nwc_init(0),
	42	event_timer(nullptr),
	43	m_timer_count(0),
	44	m_timer_on(0),
	45	m_timer_enabled(0)
	46	{
42	47	}
43	48
44	49

trunk/src/devices/bus/nes/ggenie.cpp

r250251	r250252
36	36
37	37	nes_ggenie_device::nes_ggenie_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
38	38	: nes_nrom_device(mconfig, NES_GGENIE, "NES Cart Game Genie PCB", tag, owner, clock, "nes_ggenie", __FILE__),
39		m_ggslot(*this, "gg_slot")
40		{
	39	m_ggslot(*this, "gg_slot"),
	40	m_gg_bypass(0)
	41	{
41	42	}
42	43
43	44

trunk/src/devices/bus/nes/henggedianzi.cpp

r250251	r250252
54	54	}
55	55
56	56	nes_hengg_shjy3_device::nes_hengg_shjy3_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
57		: nes_nrom_device(mconfig, NES_HENGG_SHJY3, "NES Cart Henggedianzi Shen Hua Jian Yun III PCB", tag, owner, clock, "nes_hengg_shjy3", __FILE__)
58		{
	57	: nes_nrom_device(mconfig, NES_HENGG_SHJY3, "NES Cart Henggedianzi Shen Hua Jian Yun III PCB", tag, owner, clock, "nes_hengg_shjy3", __FILE__), m_irq_count(0), m_irq_count_latch(0), m_irq_enable(0), m_chr_mode(0)
	58	{
59	59	}
60	60
61	61

trunk/src/devices/bus/nes/hosenkan.cpp

r250251	r250252
33	33
34	34
35	35	nes_hosenkan_device::nes_hosenkan_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
36		: nes_nrom_device(mconfig, NES_HOSENKAN, "NES Cart HOSENKAN PCB", tag, owner, clock, "nes_hosenkan", __FILE__)
37		{
	36	: nes_nrom_device(mconfig, NES_HOSENKAN, "NES Cart HOSENKAN PCB", tag, owner, clock, "nes_hosenkan", __FILE__),
	37	m_irq_count(0),
	38	m_irq_count_latch(0),
	39	m_irq_clear(0),
	40	m_irq_enable(0),
	41	m_latch(0)
	42	{
38	43	}
39	44
40	45

trunk/src/devices/bus/nes/irem.cpp

r250251	r250252
58	58	}
59	59
60	60	nes_g101_device::nes_g101_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
61		: nes_nrom_device(mconfig, NES_G101, "NES Cart Irem G-101 PCB", tag, owner, clock, "nes_g101", __FILE__)
62		{
	61	: nes_nrom_device(mconfig, NES_G101, "NES Cart Irem G-101 PCB", tag, owner, clock, "nes_g101", __FILE__), m_latch(0)
	62	{
63	63	}
64	64
65	65	nes_h3001_device::nes_h3001_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
66		: nes_nrom_device(mconfig, NES_H3001, "NES Cart Irem H-3001 PCB", tag, owner, clock, "nes_h3001", __FILE__)
67		{
	66	: nes_nrom_device(mconfig, NES_H3001, "NES Cart Irem H-3001 PCB", tag, owner, clock, "nes_h3001", __FILE__), m_irq_count(0), m_irq_count_latch(0), m_irq_enable(0), irq_timer(nullptr)
	67	{
68	68	}
69	69
70	70

trunk/src/devices/bus/nes/jaleco.cpp

r250251	r250252
68	68	}
69	69
70	70	nes_jf17_device::nes_jf17_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
71		: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source)
72		{
	71	: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source), m_latch(0)
	72	{
73	73	}
74	74
75	75	nes_jf17_device::nes_jf17_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
76		: nes_nrom_device(mconfig, NES_JF17, "NES Cart Jaleco JF-17 PCB", tag, owner, clock, "nes_jf17", __FILE__)
77		{
	76	: nes_nrom_device(mconfig, NES_JF17, "NES Cart Jaleco JF-17 PCB", tag, owner, clock, "nes_jf17", __FILE__), m_latch(0)
	77	{
78	78	}
79	79
80	80	nes_jf17_adpcm_device::nes_jf17_adpcm_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
100	100	}
101	101
102	102	nes_ss88006_device::nes_ss88006_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
103		: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source)
104		{
	103	: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source), m_irq_count(0), m_irq_count_latch(0), m_irq_mode(0), m_irq_enable(0), irq_timer(nullptr), m_latch(0)
	104	{
105	105	}
106	106
107	107	nes_ss88006_device::nes_ss88006_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
108		: nes_nrom_device(mconfig, NES_SS88006, "NES Cart Jaleco SS88006 PCB", tag, owner, clock, "nes_ss88006", __FILE__)
109		{
	108	: nes_nrom_device(mconfig, NES_SS88006, "NES Cart Jaleco SS88006 PCB", tag, owner, clock, "nes_ss88006", __FILE__), m_irq_count(0), m_irq_count_latch(0), m_irq_mode(0), m_irq_enable(0), irq_timer(nullptr), m_latch(0)
	109	{
110	110	}
111	111
112	112	nes_ss88006_adpcm_device::nes_ss88006_adpcm_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)

trunk/src/devices/bus/nes/jy.cpp

r250251	r250252
43	43
44	44
45	45	nes_jy_typea_device::nes_jy_typea_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
46		: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source)
47		{
	46	: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source), m_latch(0), m_extra_chr_bank(0), m_extra_chr_mask(0), m_bank_6000(0),
	47	m_irq_mode(0), m_irq_count(0), m_irq_prescale(0), m_irq_prescale_mask(0), m_irq_flip(0), m_irq_enable(0), m_irq_up(0), m_irq_down(0), irq_timer(nullptr)
	48	{
48	49	}
49	50
50	51	nes_jy_typea_device::nes_jy_typea_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
51		: nes_nrom_device(mconfig, NES_JY_TYPEA, "NES Cart JY Company Type A PCB", tag, owner, clock, "nes_jya", __FILE__)
	52	: nes_nrom_device(mconfig, NES_JY_TYPEA, "NES Cart JY Company Type A PCB", tag, owner, clock, "nes_jya", __FILE__), m_latch(0), m_extra_chr_bank(0),
	53	m_extra_chr_mask(0), m_bank_6000(0), m_irq_mode(0), m_irq_count(0), m_irq_prescale(0), m_irq_prescale_mask(0), m_irq_flip(0), m_irq_enable(0), m_irq_up(0),
	54	m_irq_down(0), irq_timer(nullptr)
52	55	{
53	56	}
54	57

trunk/src/devices/bus/nes/kaiser.cpp

r250251	r250252
63	63	}
64	64
65	65	nes_ks7022_device::nes_ks7022_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
66		: nes_nrom_device(mconfig, NES_KS7022, "NES Cart Kaiser KS-7022 PCB", tag, owner, clock, "nes_ks7022", __FILE__)
67		{
	66	: nes_nrom_device(mconfig, NES_KS7022, "NES Cart Kaiser KS-7022 PCB", tag, owner, clock, "nes_ks7022", __FILE__), m_latch(0)
	67	{
68	68	}
69	69
70	70	nes_ks7032_device::nes_ks7032_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
71		: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source)
72		{
	71	: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source), m_latch(0), m_irq_count(0), m_irq_enable(0), irq_timer(nullptr)
	72	{
73	73	}
74	74
75	75	nes_ks7032_device::nes_ks7032_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
76		: nes_nrom_device(mconfig, NES_KS7032, "NES Cart Kaiser KS-7032 PCB", tag, owner, clock, "nes_ks7032", __FILE__)
77		{
	76	: nes_nrom_device(mconfig, NES_KS7032, "NES Cart Kaiser KS-7032 PCB", tag, owner, clock, "nes_ks7032", __FILE__), m_latch(0), m_irq_count(0), m_irq_enable(0), irq_timer(nullptr)
	77	{
78	78	}
79	79
80	80	nes_ks202_device::nes_ks202_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
83	83	}
84	84
85	85	nes_ks7017_device::nes_ks7017_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
86		: nes_nrom_device(mconfig, NES_KS7017, "NES Cart Kaiser KS-7017 PCB", tag, owner, clock, "nes_ks7017", __FILE__)
87		{
	86	: nes_nrom_device(mconfig, NES_KS7017, "NES Cart Kaiser KS-7017 PCB", tag, owner, clock, "nes_ks7017", __FILE__), m_latch(0), m_irq_count(0), m_irq_status(0), m_irq_enable(0), irq_timer(nullptr)
	87	{
88	88	}
89	89
90	90	nes_ks7012_device::nes_ks7012_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)

trunk/src/devices/bus/nes/karastudio.cpp

r250251	r250252
52	52
53	53	kstudio_cart_interface::kstudio_cart_interface(const machine_config &mconfig, device_t &device)
54	54	: device_slot_card_interface(mconfig, device),
55		m_rom(NULL)
56		{
	55	m_rom(nullptr), m_bank(0)
	56	{
57	57	}
58	58
59	59	kstudio_cart_interface::~kstudio_cart_interface()
r250251	r250252
74	74	nes_kstudio_slot_device::nes_kstudio_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
75	75	device_t(mconfig, NES_KSEXPANSION_SLOT, "NES Karaoke Studio Expansion Slot", tag, owner, clock, "nes_ks_slot", __FILE__),
76	76	device_image_interface(mconfig, *this),
77		device_slot_interface(mconfig, *this)
	77	device_slot_interface(mconfig, *this), m_cart(nullptr)
78	78	{
79	79	}
80	80
r250251	r250252
188	188
189	189
190	190	nes_karaokestudio_device::nes_karaokestudio_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
191		: nes_nrom_device(mconfig, NES_KARAOKESTUDIO, "NES Cart Bandai Karaoke Studio PCB", tag, owner, clock, "nes_karaoke", __FILE__),
	191	: nes_nrom_device(mconfig, NES_KARAOKESTUDIO, "NES Cart Bandai Karaoke Studio PCB", tag, owner, clock, "nes_karaoke", __FILE__), m_exp_active(0),
192	192	m_subslot(*this, "exp_slot"),
193	193	m_mic_ipt(*this, "MIC")
194	194	{

trunk/src/devices/bus/nes/konami.cpp

r250251	r250252
57	57	}
58	58
59	59	nes_konami_vrc2_device::nes_konami_vrc2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
60		: nes_nrom_device(mconfig, NES_VRC2, "NES Cart Konami VRC-2 PCB", tag, owner, clock, "nes_vrc2", __FILE__)
61		{
	60	: nes_nrom_device(mconfig, NES_VRC2, "NES Cart Konami VRC-2 PCB", tag, owner, clock, "nes_vrc2", __FILE__), m_latch(0)
	61	{
62	62	}
63	63
64	64	nes_konami_vrc3_device::nes_konami_vrc3_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
65		: nes_nrom_device(mconfig, NES_VRC3, "NES Cart Konami VRC-3 PCB", tag, owner, clock, "nes_vrc3", __FILE__)
66		{
	65	: nes_nrom_device(mconfig, NES_VRC3, "NES Cart Konami VRC-3 PCB", tag, owner, clock, "nes_vrc3", __FILE__), m_irq_count(0), m_irq_count_latch(0), m_irq_enable(0), m_irq_enable_latch(0), m_irq_mode(0), irq_timer(nullptr)
	66	{
67	67	}
68	68
69	69	nes_konami_vrc4_device::nes_konami_vrc4_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
70		: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source)
71		{
	70	: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source), m_latch(0), m_mmc_prg_bank(0), m_irq_count(0), m_irq_count_latch(0), m_irq_enable(0), m_irq_enable_latch(0), m_irq_mode(0), m_irq_prescale(0), irq_timer(nullptr)
	71	{
72	72	}
73	73
74	74	nes_konami_vrc4_device::nes_konami_vrc4_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
75		: nes_nrom_device(mconfig, NES_VRC4, "NES Cart Konami VRC-4 PCB", tag, owner, clock, "nes_vrc4", __FILE__)
76		{
	75	: nes_nrom_device(mconfig, NES_VRC4, "NES Cart Konami VRC-4 PCB", tag, owner, clock, "nes_vrc4", __FILE__), m_latch(0), m_mmc_prg_bank(0), m_irq_count(0), m_irq_count_latch(0), m_irq_enable(0), m_irq_enable_latch(0), m_irq_mode(0), m_irq_prescale(0), irq_timer(nullptr)
	76	{
77	77	}
78	78
79	79	nes_konami_vrc6_device::nes_konami_vrc6_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)

trunk/src/devices/bus/nes/legacy.cpp

r250251	r250252
45	45	}
46	46
47	47	nes_ffe4_device::nes_ffe4_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
48		: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source)
49		{
	48	: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source), m_irq_count(0), m_irq_enable(0), irq_timer(nullptr), m_latch(0), m_exram_enabled(0), m_exram_bank(0)
	49	{
50	50	}
51	51
52	52	nes_ffe4_device::nes_ffe4_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
53		: nes_nrom_device(mconfig, NES_FFE4, "NES Cart FFE-4 PCB", tag, owner, clock, "nes_ff4", __FILE__)
54		{
	53	: nes_nrom_device(mconfig, NES_FFE4, "NES Cart FFE-4 PCB", tag, owner, clock, "nes_ff4", __FILE__), m_irq_count(0), m_irq_enable(0), irq_timer(nullptr), m_latch(0), m_exram_enabled(0), m_exram_bank(0)
	54	{
55	55	}
56	56
57	57	nes_ffe8_device::nes_ffe8_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)

trunk/src/devices/bus/nes/mmc1.cpp

r250251	r250252
40	40
41	41
42	42	nes_sxrom_device::nes_sxrom_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
43		: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source)
44		{
	43	: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source), m_reg_write_enable(0), m_latch(0), m_count(0)
	44	{
45	45	}
46	46
47	47	nes_sxrom_device::nes_sxrom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
48		: nes_nrom_device(mconfig, NES_SXROM, "NES Cart SxROM (MMC-1) PCB", tag, owner, clock, "nes_sxrom", __FILE__)
49		{
	48	: nes_nrom_device(mconfig, NES_SXROM, "NES Cart SxROM (MMC-1) PCB", tag, owner, clock, "nes_sxrom", __FILE__), m_reg_write_enable(0), m_latch(0), m_count(0)
	49	{
50	50	}
51	51
52	52	nes_sorom_device::nes_sorom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)

trunk/src/devices/bus/nes/mmc2.cpp

r250251	r250252
33	33
34	34
35	35	nes_pxrom_device::nes_pxrom_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
36		: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source)
37		{
	36	: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source),
	37	m_latch1(0),
	38	m_latch2(0)
	39	{
38	40	}
39	41
40	42	nes_pxrom_device::nes_pxrom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
41		: nes_nrom_device(mconfig, NES_PXROM, "NES Cart PxROM (MMC-2) PCB", tag, owner, clock, "nes_pxrom", __FILE__)
42		{
	43	: nes_nrom_device(mconfig, NES_PXROM, "NES Cart PxROM (MMC-2) PCB", tag, owner, clock, "nes_pxrom", __FILE__), m_latch1(0), m_latch2(0)
	44	{
43	45	}
44	46
45	47	nes_fxrom_device::nes_fxrom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)

trunk/src/devices/bus/nes/mmc3.cpp

r250251	r250252
54	54
55	55
56	56	nes_txrom_device::nes_txrom_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
57		: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source)
58		{
	57	: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source), m_prg_base(0), m_prg_mask(0), m_chr_base(0), m_chr_mask(0),
	58	m_latch(0), m_wram_protect(0), m_alt_irq(0), m_irq_count(0), m_irq_count_latch(0), m_irq_clear(0), m_irq_enable(0)
	59	{
59	60	}
60	61
61	62	nes_txrom_device::nes_txrom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
62		: nes_nrom_device(mconfig, NES_TXROM, "NES Cart TxROM (MMC-3) PCB", tag, owner, clock, "nes_txrom", __FILE__)
63		{
	63	: nes_nrom_device(mconfig, NES_TXROM, "NES Cart TxROM (MMC-3) PCB", tag, owner, clock, "nes_txrom", __FILE__), m_prg_base(0), m_prg_mask(0), m_chr_base(0), m_chr_mask(0),
	64	m_latch(0), m_wram_protect(0), m_alt_irq(0), m_irq_count(0), m_irq_count_latch(0), m_irq_clear(0), m_irq_enable(0)
	65	{
64	66	}
65	67
66	68	nes_hkrom_device::nes_hkrom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
67		: nes_txrom_device(mconfig, NES_HKROM, "NES Cart HKROM (MMC-6) PCB", tag, owner, clock, "nes_hkrom", __FILE__)
68		{
	69	: nes_txrom_device(mconfig, NES_HKROM, "NES Cart HKROM (MMC-6) PCB", tag, owner, clock, "nes_hkrom", __FILE__), m_wram_enable(0), m_mmc6_reg(0)
	70	{
69	71	}
70	72
71	73	nes_txsrom_device::nes_txsrom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)

trunk/src/devices/bus/nes/mmc3_clones.cpp

r250251	r250252
96	96	}
97	97
98	98	nes_8237_device::nes_8237_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
99		: nes_txrom_device(mconfig, NES_8237, "NES Cart UNL-8237 PCB", tag, owner, clock, "nes_8237", __FILE__)
100		{
	99	: nes_txrom_device(mconfig, NES_8237, "NES Cart UNL-8237 PCB", tag, owner, clock, "nes_8237", __FILE__), m_cd_enable(0)
	100	{
101	101	}
102	102
103	103	nes_sglionk_device::nes_sglionk_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
104		: nes_txrom_device(mconfig, NES_SG_LIONK, "NES Cart SuperGame Lion King PCB", tag, owner, clock, "nes_sglionk", __FILE__)
105		{
	104	: nes_txrom_device(mconfig, NES_SG_LIONK, "NES Cart SuperGame Lion King PCB", tag, owner, clock, "nes_sglionk", __FILE__), m_reg(0), m_reg_enabled(0)
	105	{
106	106	}
107	107
108	108	nes_sgboog_device::nes_sgboog_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
109		: nes_txrom_device(mconfig, NES_SG_BOOG, "NES Cart SuperGame BoogerMan PCB", tag, owner, clock, "nes_sgbooger", __FILE__)
110		{
	109	: nes_txrom_device(mconfig, NES_SG_BOOG, "NES Cart SuperGame BoogerMan PCB", tag, owner, clock, "nes_sgbooger", __FILE__), m_mode(0)
	110	{
111	111	}
112	112
113	113	nes_kasing_device::nes_kasing_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
114		: nes_txrom_device(mconfig, NES_KASING, "NES Cart Kasing PCB", tag, owner, clock, "nes_kasing", __FILE__)
115		{
	114	: nes_txrom_device(mconfig, NES_KASING, "NES Cart Kasing PCB", tag, owner, clock, "nes_kasing", __FILE__), m_reg(0)
	115	{
116	116	}
117	117
118	118	nes_kay_device::nes_kay_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
119		: nes_txrom_device(mconfig, NES_KAY, "NES Cart KAY PCB", tag, owner, clock, "nes_kay", __FILE__)
120		{
	119	: nes_txrom_device(mconfig, NES_KAY, "NES Cart KAY PCB", tag, owner, clock, "nes_kay", __FILE__), m_low_reg(0)
	120	{
121	121	}
122	122
123	123	nes_h2288_device::nes_h2288_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
126	126	}
127	127
128	128	nes_6035052_device::nes_6035052_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
129		: nes_txrom_device(mconfig, NES_6035052, "NES Cart UNL-603-5052 PCB", tag, owner, clock, "nes_6035052", __FILE__)
130		{
	129	: nes_txrom_device(mconfig, NES_6035052, "NES Cart UNL-603-5052 PCB", tag, owner, clock, "nes_6035052", __FILE__), m_prot(0)
	130	{
131	131	}
132	132
133	133	nes_txc_tw_device::nes_txc_tw_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
156	156	}
157	157
158	158	nes_sa9602b_device::nes_sa9602b_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
159		: nes_txrom_device(mconfig, NES_SA9602B, "NES Cart SA-9602B PCB", tag, owner, clock, "nes_sa9602b", __FILE__)
160		{
	159	: nes_txrom_device(mconfig, NES_SA9602B, "NES Cart SA-9602B PCB", tag, owner, clock, "nes_sa9602b", __FILE__), m_reg(0), m_prg_chip(0)
	160	{
161	161	}
162	162
163	163	nes_sachen_shero_device::nes_sachen_shero_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
164		: nes_txrom_device(mconfig, NES_SACHEN_SHERO, "NES Cart Street Hero PCB", tag, owner, clock, "nes_shero", __FILE__)
165		{
	164	: nes_txrom_device(mconfig, NES_SACHEN_SHERO, "NES Cart Street Hero PCB", tag, owner, clock, "nes_shero", __FILE__), m_reg(0)
	165	{
166	166	}
167	167
168	168	//nes_a9746_device::nes_a9746_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
171	171	//}
172	172
173	173	nes_fk23c_device::nes_fk23c_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
174		: nes_txrom_device(mconfig, type, name, tag, owner, clock, shortname, source)
175		{
	174	: nes_txrom_device(mconfig, type, name, tag, owner, clock, shortname, source), m_mmc_cmd1(0)
	175	{
176	176	}
177	177
178	178	nes_fk23c_device::nes_fk23c_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
179		: nes_txrom_device(mconfig, NES_FK23C, "NES Cart FK23C PCB", tag, owner, clock, "nes_fk23c", __FILE__)
180		{
	179	: nes_txrom_device(mconfig, NES_FK23C, "NES Cart FK23C PCB", tag, owner, clock, "nes_fk23c", __FILE__), m_mmc_cmd1(0)
	180	{
181	181	}
182	182
183	183	nes_fk23ca_device::nes_fk23ca_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
201	201	}
202	202
203	203	nes_bmc_hik8_device::nes_bmc_hik8_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
204		: nes_txrom_device(mconfig, NES_BMC_HIK8, "NES Cart BMC Super HIK 8 in 1 PCB", tag, owner, clock, "nes_bmc_hik8", __FILE__)
205		{
	204	: nes_txrom_device(mconfig, NES_BMC_HIK8, "NES Cart BMC Super HIK 8 in 1 PCB", tag, owner, clock, "nes_bmc_hik8", __FILE__), m_count(0)
	205	{
206	206	}
207	207
208	208	nes_bmc_hik4_device::nes_bmc_hik4_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
211	211	}
212	212
213	213	nes_bmc_mario7in1_device::nes_bmc_mario7in1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
214		: nes_txrom_device(mconfig, NES_BMC_MARIO7IN1, "NES Cart BMC Mario 7 in 1 PCB", tag, owner, clock, "nes_bmc_mario7in1", __FILE__)
215		{
	214	: nes_txrom_device(mconfig, NES_BMC_MARIO7IN1, "NES Cart BMC Mario 7 in 1 PCB", tag, owner, clock, "nes_bmc_mario7in1", __FILE__), m_reg_written(0)
	215	{
216	216	}
217	217
218	218	nes_bmc_gold7in1_device::nes_bmc_gold7in1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
219		: nes_txrom_device(mconfig, NES_BMC_GOLD7IN1, "NES Cart BMC Golden 7 in 1 PCB", tag, owner, clock, "nes_bmc_gold7in1", __FILE__)
220		{
	219	: nes_txrom_device(mconfig, NES_BMC_GOLD7IN1, "NES Cart BMC Golden 7 in 1 PCB", tag, owner, clock, "nes_bmc_gold7in1", __FILE__), m_reg_written(0)
	220	{
221	221	}
222	222
223	223	nes_bmc_gc6in1_device::nes_bmc_gc6in1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
226	226	}
227	227
228	228	nes_bmc_411120c_device::nes_bmc_411120c_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
229		: nes_txrom_device(mconfig, NES_BMC_411120C, "NES Cart BMC 411120C PCB", tag, owner, clock, "nes_bmc_411120c", __FILE__)
230		{
	229	: nes_txrom_device(mconfig, NES_BMC_411120C, "NES Cart BMC 411120C PCB", tag, owner, clock, "nes_bmc_411120c", __FILE__), m_reg(0)
	230	{
231	231	}
232	232
233	233	nes_bmc_830118c_device::nes_bmc_830118c_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
234		: nes_txrom_device(mconfig, NES_BMC_830118C, "NES Cart BMC 830118C PCB", tag, owner, clock, "nes_bmc_830118c", __FILE__)
235		{
	234	: nes_txrom_device(mconfig, NES_BMC_830118C, "NES Cart BMC 830118C PCB", tag, owner, clock, "nes_bmc_830118c", __FILE__), m_reg(0)
	235	{
236	236	}
237	237
238	238	nes_pjoy84_device::nes_pjoy84_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)

trunk/src/devices/bus/nes/mmc5.cpp

r250251	r250252
45	45
46	46
47	47	nes_exrom_device::nes_exrom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
48		: nes_nrom_device(mconfig, NES_EXROM, "NES Cart ExROM (MMC-5) PCB", tag, owner, clock, "nes_exrom", __FILE__)
49		{
	48	: nes_nrom_device(mconfig, NES_EXROM, "NES Cart ExROM (MMC-5) PCB", tag, owner, clock, "nes_exrom", __FILE__), m_irq_count(0),
	49	m_irq_status(0), m_irq_enable(0), m_mult1(0), m_mult2(0), m_mmc5_scanline(0), m_vrom_page_a(0), m_vrom_page_b(0), m_floodtile(0), m_floodattr(0),
	50	m_prg_mode(0), m_chr_mode(0), m_wram_protect_1(0), m_wram_protect_2(0), m_exram_control(0), m_wram_base(0), m_last_chr(0), m_ex1_chr(0),
	51	m_split_chr(0), m_ex1_bank(0), m_high_chr(0), m_split_scr(0), m_split_rev(0), m_split_ctrl(0), m_split_yst(0), m_split_bank(0), m_vcount(0)
	52	{
50	53	}
51	54
52	55

trunk/src/devices/bus/nes/multigame.cpp

r250251	r250252
83	83	}
84	84
85	85	nes_caltron_device::nes_caltron_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
86		: nes_nrom_device(mconfig, NES_CALTRON6IN1, "NES Cart Caltron 6 in 1 PCB", tag, owner, clock, "nes_caltron", __FILE__)
87		{
	86	: nes_nrom_device(mconfig, NES_CALTRON6IN1, "NES Cart Caltron 6 in 1 PCB", tag, owner, clock, "nes_caltron", __FILE__), m_latch(0)
	87	{
88	88	}
89	89
90	90	nes_rumblestat_device::nes_rumblestat_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
91		: nes_nrom_device(mconfig, NES_RUMBLESTATION, "NES Cart Rumblestation PCB", tag, owner, clock, "nes_rumblestat", __FILE__)
92		{
	91	: nes_nrom_device(mconfig, NES_RUMBLESTATION, "NES Cart Rumblestation PCB", tag, owner, clock, "nes_rumblestat", __FILE__), m_prg(0), m_chr(0)
	92	{
93	93	}
94	94
95	95	nes_svision16_device::nes_svision16_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
96		: nes_nrom_device(mconfig, NES_SVISION16, "NES Cart Supervision 16 in 1 PCB", tag, owner, clock, "nes_svision16", __FILE__)
97		{
	96	: nes_nrom_device(mconfig, NES_SVISION16, "NES Cart Supervision 16 in 1 PCB", tag, owner, clock, "nes_svision16", __FILE__), m_latch1(0), m_latch2(0)
	97	{
98	98	}
99	99
100	100	nes_n625092_device::nes_n625092_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
101		: nes_nrom_device(mconfig, NES_N625092, "NES Cart N625092 PCB", tag, owner, clock, "nes_n625092", __FILE__)
102		{
	101	: nes_nrom_device(mconfig, NES_N625092, "NES Cart N625092 PCB", tag, owner, clock, "nes_n625092", __FILE__), m_latch1(0), m_latch2(0)
	102	{
103	103	}
104	104
105	105	nes_a65as_device::nes_a65as_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
108	108	}
109	109
110	110	nes_t262_device::nes_t262_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
111		: nes_nrom_device(mconfig, NES_T262, "NES Cart T-262 PCB", tag, owner, clock, "nes_t262", __FILE__)
112		{
	111	: nes_nrom_device(mconfig, NES_T262, "NES Cart T-262 PCB", tag, owner, clock, "nes_t262", __FILE__), m_latch1(0), m_latch2(0)
	112	{
113	113	}
114	114
115	115	nes_novel1_device::nes_novel1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
133	133	}
134	134
135	135	nes_vt5201_device::nes_vt5201_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
136		: nes_nrom_device(mconfig, NES_VT5201, "NES Cart VT5201 PCB", tag, owner, clock, "nes_vt5201", __FILE__)
137		{
	136	: nes_nrom_device(mconfig, NES_VT5201, "NES Cart VT5201 PCB", tag, owner, clock, "nes_vt5201", __FILE__), m_latch(0), m_dipsetting(0)
	137	{
138	138	}
139	139
140	140	nes_810544c_device::nes_810544c_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
148	148	}
149	149
150	150	nes_bmc_gb63_device::nes_bmc_gb63_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
151		: nes_nrom_device(mconfig, NES_BMC_GB63, "NES Cart BMC Ghostbusters 63 in 1 PCB", tag, owner, clock, "nes_bmc_gb63", __FILE__)
152		{
	151	: nes_nrom_device(mconfig, NES_BMC_GB63, "NES Cart BMC Ghostbusters 63 in 1 PCB", tag, owner, clock, "nes_bmc_gb63", __FILE__), m_latch(0), m_dipsetting(0), m_vram_disable(0)
	152	{
153	153	}
154	154
155	155	nes_bmc_gka_device::nes_bmc_gka_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
156		: nes_nrom_device(mconfig, NES_BMC_GKA, "NES Cart BMC GK-A PCB", tag, owner, clock, "nes_bmc_gka", __FILE__)
157		{
	156	: nes_nrom_device(mconfig, NES_BMC_GKA, "NES Cart BMC GK-A PCB", tag, owner, clock, "nes_bmc_gka", __FILE__), m_latch1(0), m_latch2(0)
	157	{
158	158	}
159	159
160	160	nes_bmc_gkb_device::nes_bmc_gkb_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
163	163	}
164	164
165	165	nes_bmc_ws_device::nes_bmc_ws_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
166		: nes_nrom_device(mconfig, NES_BMC_WS, "NES Cart BMC WS PCB", tag, owner, clock, "nes_bmc_ws", __FILE__)
167		{
	166	: nes_nrom_device(mconfig, NES_BMC_WS, "NES Cart BMC WS PCB", tag, owner, clock, "nes_bmc_ws", __FILE__), m_latch(0)
	167	{
168	168	}
169	169
170	170	nes_bmc_11160_device::nes_bmc_11160_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
243	243	}
244	244
245	245	nes_bmc_70in1_device::nes_bmc_70in1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
246		: nes_nrom_device(mconfig, NES_BMC_70IN1, "NES Cart BMC 70 in 1 PCB", tag, owner, clock, "nes_bmc_70in1", __FILE__)
247		{
	246	: nes_nrom_device(mconfig, NES_BMC_70IN1, "NES Cart BMC 70 in 1 PCB", tag, owner, clock, "nes_bmc_70in1", __FILE__), m_mode(0)
	247	{
248	248	}
249	249
250	250	nes_bmc_72in1_device::nes_bmc_72in1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
253	253	}
254	254
255	255	nes_bmc_76in1_device::nes_bmc_76in1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
256		: nes_nrom_device(mconfig, NES_BMC_76IN1, "NES Cart BMC 76 in 1 PCB", tag, owner, clock, "nes_bmc_76in1", __FILE__)
257		{
	256	: nes_nrom_device(mconfig, NES_BMC_76IN1, "NES Cart BMC 76 in 1 PCB", tag, owner, clock, "nes_bmc_76in1", __FILE__), m_latch1(0), m_latch2(0)
	257	{
258	258	}
259	259
260	260	nes_bmc_110in1_device::nes_bmc_110in1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
273	273	}
274	274
275	275	nes_bmc_800in1_device::nes_bmc_800in1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
276		: nes_nrom_device(mconfig, NES_BMC_800IN1, "NES Cart BMC 800 in 1 PCB", tag, owner, clock, "nes_bmc_800in1", __FILE__)
277		{
	276	: nes_nrom_device(mconfig, NES_BMC_800IN1, "NES Cart BMC 800 in 1 PCB", tag, owner, clock, "nes_bmc_800in1", __FILE__), m_mode(0)
	277	{
278	278	}
279	279
280	280	nes_bmc_1200in1_device::nes_bmc_1200in1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
281		: nes_nrom_device(mconfig, NES_BMC_1200IN1, "NES Cart BMC 1200 in 1 PCB", tag, owner, clock, "nes_bmc_1200in1", __FILE__)
282		{
	281	: nes_nrom_device(mconfig, NES_BMC_1200IN1, "NES Cart BMC 1200 in 1 PCB", tag, owner, clock, "nes_bmc_1200in1", __FILE__), m_vram_protect(0)
	282	{
283	283	}
284	284
285	285	nes_bmc_gold150_device::nes_bmc_gold150_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
286		: nes_nrom_device(mconfig, NES_BMC_GOLD150, "NES Cart BMC Golden 150 in 1 PCB", tag, owner, clock, "nes_bmc_gold150", __FILE__)
287		{
	286	: nes_nrom_device(mconfig, NES_BMC_GOLD150, "NES Cart BMC Golden 150 in 1 PCB", tag, owner, clock, "nes_bmc_gold150", __FILE__), m_latch(0)
	287	{
288	288	}
289	289
290	290	nes_bmc_gold260_device::nes_bmc_gold260_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
293	293	}
294	294
295	295	nes_bmc_ch001_device::nes_bmc_ch001_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
296		: nes_nrom_device(mconfig, NES_BMC_CH001, "NES Cart BMC CH-001 PCB", tag, owner, clock, "nes_bmc_ch001", __FILE__)
297		{
	296	: nes_nrom_device(mconfig, NES_BMC_CH001, "NES Cart BMC CH-001 PCB", tag, owner, clock, "nes_bmc_ch001", __FILE__), m_latch(0)
	297	{
298	298	}
299	299
300	300	nes_bmc_super22_device::nes_bmc_super22_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
303	303	}
304	304
305	305	nes_bmc_4in1reset_device::nes_bmc_4in1reset_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
306		: nes_nrom_device(mconfig, NES_BMC_4IN1RESET, "NES Cart BMC 4 in 1 (Reset Based) PCB", tag, owner, clock, "nes_bmc_4in1reset", __FILE__)
307		{
	306	: nes_nrom_device(mconfig, NES_BMC_4IN1RESET, "NES Cart BMC 4 in 1 (Reset Based) PCB", tag, owner, clock, "nes_bmc_4in1reset", __FILE__), m_latch(0)
	307	{
308	308	}
309	309
310	310	nes_bmc_42in1reset_device::nes_bmc_42in1reset_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
311		: nes_nrom_device(mconfig, NES_BMC_42IN1RESET, "NES Cart BMC 42 in 1 (Reset Based) PCB", tag, owner, clock, "nes_bmc_42in1reset", __FILE__)
312		{
	311	: nes_nrom_device(mconfig, NES_BMC_42IN1RESET, "NES Cart BMC 42 in 1 (Reset Based) PCB", tag, owner, clock, "nes_bmc_42in1reset", __FILE__), m_latch(0)
	312	{
313	313	}
314	314
315	315

trunk/src/devices/bus/nes/namcot.cpp

r250251	r250252
50	50
51	51
52	52	nes_namcot3433_device::nes_namcot3433_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
53		: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source)
54		{
	53	: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source), m_latch(0)
	54	{
55	55	}
56	56
57	57	nes_namcot3433_device::nes_namcot3433_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
58		: nes_nrom_device(mconfig, NES_NAMCOT3433, "NES Cart Namcot 3433 & 3443 / DxROM PCB", tag, owner, clock, "nes_namcot3433", __FILE__)
59		{
	58	: nes_nrom_device(mconfig, NES_NAMCOT3433, "NES Cart Namcot 3433 & 3443 / DxROM PCB", tag, owner, clock, "nes_namcot3433", __FILE__), m_latch(0)
	59	{
60	60	}
61	61
62	62	nes_namcot3446_device::nes_namcot3446_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
63		: nes_nrom_device(mconfig, NES_NAMCOT3446, "NES Cart Namcot 3446 PCB", tag, owner, clock, "nes_namcot3446", __FILE__)
64		{
	63	: nes_nrom_device(mconfig, NES_NAMCOT3446, "NES Cart Namcot 3446 PCB", tag, owner, clock, "nes_namcot3446", __FILE__), m_latch(0)
	64	{
65	65	}
66	66
67	67	nes_namcot3425_device::nes_namcot3425_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
68		: nes_nrom_device(mconfig, NES_NAMCOT3425, "NES Cart Namcot 3425 PCB", tag, owner, clock, "nes_namcot3425", __FILE__)
69		{
	68	: nes_nrom_device(mconfig, NES_NAMCOT3425, "NES Cart Namcot 3425 PCB", tag, owner, clock, "nes_namcot3425", __FILE__), m_latch(0)
	69	{
70	70	}
71	71
72	72	nes_namcot340_device::nes_namcot340_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
73		: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source)
74		{
	73	: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source), m_irq_count(0), m_irq_enable(0), irq_timer(nullptr)
	74	{
75	75	}
76	76
77	77	nes_namcot340_device::nes_namcot340_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
78		: nes_nrom_device(mconfig, NES_NAMCOT175, "NES Cart Namcot 340 PCB", tag, owner, clock, "nes_namcot340", __FILE__)
79		{
	78	: nes_nrom_device(mconfig, NES_NAMCOT175, "NES Cart Namcot 340 PCB", tag, owner, clock, "nes_namcot340", __FILE__), m_irq_count(0), m_irq_enable(0), irq_timer(nullptr)
	79	{
80	80	}
81	81
82	82	nes_namcot175_device::nes_namcot175_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
83		: nes_namcot340_device(mconfig, NES_NAMCOT340, "NES Cart Namcot 175 PCB", tag, owner, clock, "nes_namcot175", __FILE__)
84		{
	83	: nes_namcot340_device(mconfig, NES_NAMCOT340, "NES Cart Namcot 175 PCB", tag, owner, clock, "nes_namcot175", __FILE__), m_wram_protect(0)
	84	{
85	85	}
86	86
87	87	nes_namcot163_device::nes_namcot163_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
88		: nes_namcot340_device(mconfig, NES_NAMCOT163, "NES Cart Namcot 163 PCB", tag, owner, clock, "nes_namcot163", __FILE__)
89		{
	88	: nes_namcot340_device(mconfig, NES_NAMCOT163, "NES Cart Namcot 163 PCB", tag, owner, clock, "nes_namcot163", __FILE__), m_wram_protect(0), m_latch(0), m_chr_bank(0)
	89	{
90	90	}
91	91
92	92

trunk/src/devices/bus/nes/nanjing.cpp

r250251	r250252
34	34
35	35
36	36	nes_nanjing_device::nes_nanjing_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
37		: nes_nrom_device(mconfig, NES_NANJING, "NES Cart Nanjing PCB", tag, owner, clock, "nes_nanjing", __FILE__)
38		{
	37	: nes_nrom_device(mconfig, NES_NANJING, "NES Cart Nanjing PCB", tag, owner, clock, "nes_nanjing", __FILE__),
	38	m_count(0),
	39	m_latch1(0),
	40	m_latch2(0)
	41	{
39	42	}
40	43
41	44

trunk/src/devices/bus/nes/nes_slot.cpp

r250251	r250252
110	110	m_vrom(NULL),
111	111	m_ciram(NULL),
112	112	m_prg_size(0),
113		m_vrom_size(0),
	113	m_vrom_size(0), m_maincpu(nullptr),
114	114	m_mapper_sram(NULL),
115	115	m_mapper_sram_size(0),
116	116	m_ce_mask(0),
r250251	r250252
746	746	device_t(mconfig, NES_CART_SLOT, "NES Cartridge Slot", tag, owner, clock, "nes_cart_slot", __FILE__),
747	747	device_image_interface(mconfig, *this),
748	748	device_slot_interface(mconfig, *this),
749		m_crc_hack(0),
	749	m_crc_hack(0), m_cart(nullptr),
750	750	m_pcb_id(NO_BOARD),
751	751	m_must_be_loaded(1)
752	752	{

trunk/src/devices/bus/nes/ntdec.cpp

r250251	r250252
39	39
40	40
41	41	nes_ntdec_asder_device::nes_ntdec_asder_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
42		: nes_nrom_device(mconfig, NES_NTDEC_ASDER, "NES Cart NTDEC Asder PCB", tag, owner, clock, "nes_ntdec_asder", __FILE__)
43		{
	42	: nes_nrom_device(mconfig, NES_NTDEC_ASDER, "NES Cart NTDEC Asder PCB", tag, owner, clock, "nes_ntdec_asder", __FILE__),
	43	m_latch(0)
	44	{
44	45	}
45	46
46	47	nes_ntdec_fh_device::nes_ntdec_fh_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)

trunk/src/devices/bus/nes/nxrom.cpp

r250251	r250252
92	92	}
93	93
94	94	nes_cnrom_device::nes_cnrom_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
95		: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source)
96		{
	95	: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source), m_chr_open_bus(0)
	96	{
97	97	}
98	98
99	99	nes_cnrom_device::nes_cnrom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
100		: nes_nrom_device(mconfig, NES_CNROM, "NES Cart CNROM PCB", tag, owner, clock, "nes_cnrom", __FILE__)
101		{
	100	: nes_nrom_device(mconfig, NES_CNROM, "NES Cart CNROM PCB", tag, owner, clock, "nes_cnrom", __FILE__), m_chr_open_bus(0)
	101	{
102	102	}
103	103
104	104	nes_cprom_device::nes_cprom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)

trunk/src/devices/bus/nes/pirate.cpp

r250251	r250252
64	64	}
65	65
66	66	nes_fukutake_device::nes_fukutake_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
67		: nes_nrom_device(mconfig, NES_FUKUTAKE, "NES Cart Fukutake Study Box PCB", tag, owner, clock, "nes_fukutake", __FILE__)
68		{
	67	: nes_nrom_device(mconfig, NES_FUKUTAKE, "NES Cart Fukutake Study Box PCB", tag, owner, clock, "nes_fukutake", __FILE__), m_latch(0)
	68	{
69	69	}
70	70
71	71	nes_futuremedia_device::nes_futuremedia_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
72		: nes_nrom_device(mconfig, NES_FUTUREMEDIA, "NES Cart FutureMedia PCB", tag, owner, clock, "nes_futuremedia", __FILE__)
73		{
	72	: nes_nrom_device(mconfig, NES_FUTUREMEDIA, "NES Cart FutureMedia PCB", tag, owner, clock, "nes_futuremedia", __FILE__), m_irq_count(0), m_irq_count_latch(0), m_irq_clear(0), m_irq_enable(0)
	73	{
74	74	}
75	75
76	76	nes_magseries_device::nes_magseries_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
104	104	}
105	105
106	106	nes_edu2k_device::nes_edu2k_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
107		: nes_nrom_device(mconfig, NES_EDU2K, "NES Cart Educational Computer 2000 PCB", tag, owner, clock, "nes_edu2k", __FILE__)
108		{
	107	: nes_nrom_device(mconfig, NES_EDU2K, "NES Cart Educational Computer 2000 PCB", tag, owner, clock, "nes_edu2k", __FILE__), m_latch(0)
	108	{
109	109	}
110	110
111	111	nes_t230_device::nes_t230_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
112		: nes_nrom_device(mconfig, NES_T230, "NES Cart T-230 PCB", tag, owner, clock, "nes_t230", __FILE__)
113		{
	112	: nes_nrom_device(mconfig, NES_T230, "NES Cart T-230 PCB", tag, owner, clock, "nes_t230", __FILE__), m_irq_count(0), m_irq_count_latch(0), m_irq_mode(0), m_irq_enable(0), m_irq_enable_latch(0)
	113	{
114	114	}
115	115
116	116	nes_mk2_device::nes_mk2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
117		: nes_nrom_device(mconfig, NES_MK2, "NES Cart Mortal Kombat 2 PCB", tag, owner, clock, "nes_mk2", __FILE__)
118		{
	117	: nes_nrom_device(mconfig, NES_MK2, "NES Cart Mortal Kombat 2 PCB", tag, owner, clock, "nes_mk2", __FILE__), m_irq_count(0), m_irq_count_latch(0), m_irq_clear(0), m_irq_enable(0)
	118	{
119	119	}
120	120
121	121	nes_whero_device::nes_whero_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
122		: nes_nrom_device(mconfig, NES_WHERO, "NES Cart World Heroes PCB", tag, owner, clock, "nes_whero", __FILE__)
123		{
	122	: nes_nrom_device(mconfig, NES_WHERO, "NES Cart World Heroes PCB", tag, owner, clock, "nes_whero", __FILE__), m_reg(0), m_irq_count(0), m_irq_count_latch(0), m_irq_enable(0), m_irq_enable_latch(0)
	123	{
124	124	}
125	125
126	126	nes_43272_device::nes_43272_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
127		: nes_nrom_device(mconfig, NES_43272, "NES Cart UNL-43272 PCB", tag, owner, clock, "nes_43272", __FILE__)
128		{
	127	: nes_nrom_device(mconfig, NES_43272, "NES Cart UNL-43272 PCB", tag, owner, clock, "nes_43272", __FILE__), m_latch(0)
	128	{
129	129	}
130	130
131	131	nes_tf1201_device::nes_tf1201_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
132		: nes_nrom_device(mconfig, NES_TF1201, "NES Cart UNL-TF1201 PCB", tag, owner, clock, "nes_tf1201", __FILE__)
133		{
	132	: nes_nrom_device(mconfig, NES_TF1201, "NES Cart UNL-TF1201 PCB", tag, owner, clock, "nes_tf1201", __FILE__), m_prg(0), m_swap(0), m_irq_count(0), m_irq_enable(0), m_irq_enable_latch(0)
	133	{
134	134	}
135	135
136	136	nes_cityfight_device::nes_cityfight_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
137		: nes_nrom_device(mconfig, NES_TF1201, "NES Cart City Fighter PCB", tag, owner, clock, "nes_cityfight", __FILE__)
138		{
	137	: nes_nrom_device(mconfig, NES_TF1201, "NES Cart City Fighter PCB", tag, owner, clock, "nes_cityfight", __FILE__), m_prg_reg(0), m_prg_mode(0), m_irq_count(0), m_irq_enable(0), irq_timer(nullptr)
	138	{
139	139	}
140	140
141	141

trunk/src/devices/bus/nes/racermate.cpp

r250251	r250252
36	36
37	37
38	38	nes_racermate_device::nes_racermate_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
39		: nes_nrom_device(mconfig, NES_RACERMATE, "NES Cart Racermate PCB", tag, owner, clock, "nes_racermate", __FILE__)
40		{
	39	: nes_nrom_device(mconfig, NES_RACERMATE, "NES Cart Racermate PCB", tag, owner, clock, "nes_racermate", __FILE__),
	40	m_latch(0)
	41	{
41	42	}
42	43
43	44

trunk/src/devices/bus/nes/rcm.cpp

r250251	r250252
67	67	}
68	68
69	69	nes_3dblock_device::nes_3dblock_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
70		: nes_nrom_device(mconfig, NES_3DBLOCK, "NES Cart RCM 3D Block PCB", tag, owner, clock, "nes_3dblock", __FILE__)
71		{
	70	: nes_nrom_device(mconfig, NES_3DBLOCK, "NES Cart RCM 3D Block PCB", tag, owner, clock, "nes_3dblock", __FILE__), m_irq_count(0)
	71	{
72	72	}
73	73
74	74

trunk/src/devices/bus/nes/rexsoft.cpp

r250251	r250252
40	40
41	41
42	42	nes_rex_dbz5_device::nes_rex_dbz5_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
43		: nes_txrom_device(mconfig, NES_REX_DBZ5, "NES Cart Rex Soft DragonBall Z V PCB", tag, owner, clock, "nes_rex_dbz5", __FILE__)
44		{
	43	: nes_txrom_device(mconfig, NES_REX_DBZ5, "NES Cart Rex Soft DragonBall Z V PCB", tag, owner, clock, "nes_rex_dbz5", __FILE__),
	44	m_extra(0)
	45	{
45	46	}
46	47
47	48	nes_rex_sl1632_device::nes_rex_sl1632_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
48		: nes_txrom_device(mconfig, NES_REX_SL1632, "NES Cart Rex Soft SL-1632 PCB", tag, owner, clock, "nes_rex_sl1632", __FILE__)
49		{
	49	: nes_txrom_device(mconfig, NES_REX_SL1632, "NES Cart Rex Soft SL-1632 PCB", tag, owner, clock, "nes_rex_sl1632", __FILE__), m_mode(0), m_mirror(0)
	50	{
50	51	}
51	52
52	53

trunk/src/devices/bus/nes/sachen.cpp

r250251	r250252
96	96	}
97	97
98	98	nes_sachen_tcu02_device::nes_sachen_tcu02_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
99		: nes_nrom_device(mconfig, NES_SACHEN_TCU02, "NES Cart Sachen TCU-02 PCB", tag, owner, clock, "nes_tcu02", __FILE__)
100		{
	99	: nes_nrom_device(mconfig, NES_SACHEN_TCU02, "NES Cart Sachen TCU-02 PCB", tag, owner, clock, "nes_tcu02", __FILE__), m_latch(0)
	100	{
101	101	}
102	102
103	103	nes_sachen_74x374_device::nes_sachen_74x374_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
104		: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source)
105		{
	104	: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source), m_latch(0), m_mmc_vrom_bank(0)
	105	{
106	106	}
107	107
108	108	nes_sachen_74x374_device::nes_sachen_74x374_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
109		: nes_nrom_device(mconfig, NES_SACHEN_74X374, "NES Cart Sachen 74*374 PCB", tag, owner, clock, "nes_s74x34", __FILE__)
110		{
	109	: nes_nrom_device(mconfig, NES_SACHEN_74X374, "NES Cart Sachen 74*374 PCB", tag, owner, clock, "nes_s74x34", __FILE__), m_latch(0), m_mmc_vrom_bank(0)
	110	{
111	111	}
112	112
113	113	nes_sachen_74x374_alt_device::nes_sachen_74x374_alt_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)

trunk/src/devices/bus/nes/somari.cpp

r250251	r250252
40	40
41	41
42	42	nes_somari_device::nes_somari_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
43		: nes_txrom_device(mconfig, NES_SOMARI, "NES Cart Team Somari PCB", tag, owner, clock, "nes_somari", __FILE__)
44		{
	43	: nes_txrom_device(mconfig, NES_SOMARI, "NES Cart Team Somari PCB", tag, owner, clock, "nes_somari", __FILE__),
	44	m_board_mode(0),
	45	m_mmc3_mirror_reg(0),
	46	m_count(0),
	47	m_mmc1_latch(0),
	48	m_vrc_mirror_reg(0)
	49	{
45	50	}
46	51
47	52

trunk/src/devices/bus/nes/sunsoft.cpp

r250251	r250252
59	59	}
60	60
61	61	nes_sunsoft_3_device::nes_sunsoft_3_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
62		: nes_nrom_device(mconfig, NES_SUNSOFT_3, "NES Cart Sunsoft 3 PCB", tag, owner, clock, "nes_sun3", __FILE__)
63		{
	62	: nes_nrom_device(mconfig, NES_SUNSOFT_3, "NES Cart Sunsoft 3 PCB", tag, owner, clock, "nes_sun3", __FILE__), m_irq_count(0), m_irq_enable(0), m_irq_toggle(0), irq_timer(nullptr)
	63	{
64	64	}
65	65
66	66	nes_sunsoft_4_device::nes_sunsoft_4_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
67		: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source)
68		{
	67	: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source), m_reg(0), m_latch1(0), m_latch2(0), m_wram_enable(0)
	68	{
69	69	}
70	70
71	71	nes_sunsoft_4_device::nes_sunsoft_4_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
72		: nes_nrom_device(mconfig, NES_SUNSOFT_4, "NES Cart Sunsoft 4 PCB", tag, owner, clock, "nes_sun4", __FILE__)
73		{
	72	: nes_nrom_device(mconfig, NES_SUNSOFT_4, "NES Cart Sunsoft 4 PCB", tag, owner, clock, "nes_sun4", __FILE__), m_reg(0), m_latch1(0), m_latch2(0), m_wram_enable(0)
	73	{
74	74	}
75	75
76	76	nes_sunsoft_fme7_device::nes_sunsoft_fme7_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
77		: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source)
78		{
	77	: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source), m_irq_count(0), m_irq_enable(0), irq_timer(nullptr), m_latch(0), m_wram_bank(0)
	78	{
79	79	}
80	80
81	81	nes_sunsoft_fme7_device::nes_sunsoft_fme7_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
82		: nes_nrom_device(mconfig, NES_SUNSOFT_4, "NES Cart Sunsoft FME7 PCB", tag, owner, clock, "nes_fme7", __FILE__)
83		{
	82	: nes_nrom_device(mconfig, NES_SUNSOFT_4, "NES Cart Sunsoft FME7 PCB", tag, owner, clock, "nes_fme7", __FILE__), m_irq_count(0), m_irq_enable(0), irq_timer(nullptr), m_latch(0), m_wram_bank(0)
	83	{
84	84	}
85	85
86	86	nes_sunsoft_5_device::nes_sunsoft_5_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)

trunk/src/devices/bus/nes/sunsoft_dcs.cpp

r250251	r250252
53	53	nes_ntb_slot_device::nes_ntb_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
54	54	device_t(mconfig, NES_NTB_SLOT, "NES NTB Cartridge Slot", tag, owner, clock, "nes_ntb_slot", __FILE__),
55	55	device_image_interface(mconfig, *this),
56		device_slot_interface(mconfig, *this)
	56	device_slot_interface(mconfig, *this), m_cart(nullptr)
57	57	{
58	58	}
59	59
r250251	r250252
163	163
164	164
165	165	nes_sunsoft_dcs_device::nes_sunsoft_dcs_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
166		: nes_sunsoft_4_device(mconfig, NES_SUNSOFT_DCS, "NES Cart Sunsoft DCS PCB", tag, owner, clock, "nes_dcs", __FILE__),
167		m_subslot(*this, "ntb_slot")
168		{
	166	: nes_sunsoft_4_device(mconfig, NES_SUNSOFT_DCS, "NES Cart Sunsoft DCS PCB", tag, owner, clock, "nes_dcs", __FILE__), m_timer_on(0), m_exrom_enable(0),
	167	m_subslot(*this, "ntb_slot"), ntb_enable_timer(nullptr)
	168	{
169	169	}
170	170
171	171

trunk/src/devices/bus/nes/taito.cpp

r250251	r250252
58	58	}
59	59
60	60	nes_tc0190fmc_pal16r4_device::nes_tc0190fmc_pal16r4_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
61		: nes_tc0190fmc_device(mconfig, NES_TC0190FMC_PAL16R4, "NES Cart Taito TC0190FMC + PAL16R4 PCB", tag, owner, clock, "nes_tc0190pal", __FILE__)
62		{
	61	: nes_tc0190fmc_device(mconfig, NES_TC0190FMC_PAL16R4, "NES Cart Taito TC0190FMC + PAL16R4 PCB", tag, owner, clock, "nes_tc0190pal", __FILE__), m_irq_count(0), m_irq_count_latch(0), m_irq_enable(0)
	62	{
63	63	}
64	64
65	65	nes_x1_005_device::nes_x1_005_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
66		: nes_nrom_device(mconfig, NES_X1_005, "NES Cart Taito X1-005 PCB", tag, owner, clock, "nes_x1_005", __FILE__)
67		{
	66	: nes_nrom_device(mconfig, NES_X1_005, "NES Cart Taito X1-005 PCB", tag, owner, clock, "nes_x1_005", __FILE__), m_latch(0)
	67	{
68	68	}
69	69
70	70	nes_x1_017_device::nes_x1_017_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
71		: nes_nrom_device(mconfig, NES_X1_017, "NES Cart Taito X1-017 PCB", tag, owner, clock, "nes_x1_017", __FILE__)
72		{
	71	: nes_nrom_device(mconfig, NES_X1_017, "NES Cart Taito X1-017 PCB", tag, owner, clock, "nes_x1_017", __FILE__), m_latch(0)
	72	{
73	73	}
74	74
75	75

trunk/src/devices/bus/nes/tengen.cpp

r250251	r250252
49	49	}
50	50
51	51	nes_tengen032_device::nes_tengen032_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
52		: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source)
53		{
	52	: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source), m_irq_count(0), m_irq_count_latch(0), m_irq_mode(0), m_irq_reset(0), m_irq_enable(0), m_latch(0), irq_timer(nullptr)
	53	{
54	54	}
55	55
56	56	nes_tengen032_device::nes_tengen032_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
57		: nes_nrom_device(mconfig, NES_TENGEN_800032, "NES Cart Tengen 800032 PCB", tag, owner, clock, "nes_tengen032", __FILE__)
	57	: nes_nrom_device(mconfig, NES_TENGEN_800032, "NES Cart Tengen 800032 PCB", tag, owner, clock, "nes_tengen032", __FILE__), m_irq_count(0), m_irq_count_latch(0), m_irq_mode(0), m_irq_reset(0), m_irq_enable(0), m_latch(0), irq_timer(nullptr)
58	58	{
59	59	}
60	60

trunk/src/devices/bus/nes/waixing.cpp

r250251	r250252
132	132	}
133	133
134	134	nes_waixing_sec_device::nes_waixing_sec_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
135		: nes_txrom_device(mconfig, NES_WAIXING_SEC, "NES Cart Waixing Security Chip PCB", tag, owner, clock, "nes_waixing_sec", __FILE__)
136		{
	135	: nes_txrom_device(mconfig, NES_WAIXING_SEC, "NES Cart Waixing Security Chip PCB", tag, owner, clock, "nes_waixing_sec", __FILE__), m_reg(0)
	136	{
137	137	}
138	138
139	139	nes_waixing_sgz_device::nes_waixing_sgz_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
140		: nes_nrom_device(mconfig, NES_WAIXING_SGZ, "NES Cart Waixing San Guo Zhi PCB", tag, owner, clock, "nes_waixing_sgz", __FILE__)
141		{
	140	: nes_nrom_device(mconfig, NES_WAIXING_SGZ, "NES Cart Waixing San Guo Zhi PCB", tag, owner, clock, "nes_waixing_sgz", __FILE__), m_irq_count(0), m_irq_count_latch(0), m_irq_enable(0), m_irq_enable_latch(0)
	141	{
142	142	}
143	143
144	144	nes_waixing_sgzlz_device::nes_waixing_sgzlz_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
145		: nes_nrom_device(mconfig, NES_WAIXING_SGZLZ, "NES Cart Waixing San Guo Zhong Lie Zhuan PCB", tag, owner, clock, "nes_waixing_sgzlz", __FILE__)
146		{
	145	: nes_nrom_device(mconfig, NES_WAIXING_SGZLZ, "NES Cart Waixing San Guo Zhong Lie Zhuan PCB", tag, owner, clock, "nes_waixing_sgzlz", __FILE__), m_latch(0)
	146	{
147	147	}
148	148
149	149	nes_waixing_ffv_device::nes_waixing_ffv_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)

trunk/src/devices/bus/nes_ctrl/4score.cpp

r250251	r250252
112	112
113	113	nes_4score_device::nes_4score_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
114	114	: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
115		device_nes_control_port_interface(mconfig, *this)
116		{
	115	device_nes_control_port_interface(mconfig, *this), m_latch(0)
	116	{
117	117	}
118	118
119	119	nes_4score_p1p3_device::nes_4score_p1p3_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :

trunk/src/devices/bus/nes_ctrl/arkpaddle.cpp

r250251	r250252
48	48	: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
49	49	device_nes_control_port_interface(mconfig, *this),
50	50	m_paddle(*this, "PADDLE"),
51		m_button(*this, "BUTTON")
52		{
	51	m_button(*this, "BUTTON"), m_start_conv(0), m_latch(0)
	52	{
53	53	}
54	54
55	55	nes_vaus_device::nes_vaus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
56	56	device_t(mconfig, NES_ARKPADDLE, "NES Arkanoid Vaus Controller", tag, owner, clock, "nes_vaus", __FILE__),
57	57	device_nes_control_port_interface(mconfig, *this),
58	58	m_paddle(*this, "PADDLE"),
59		m_button(*this, "BUTTON")
	59	m_button(*this, "BUTTON"), m_start_conv(0), m_latch(0)
60	60	{
61	61	}
62	62

trunk/src/devices/bus/nes_ctrl/bcbattle.cpp

r250251	r250252
84	84	nes_bcbattle_device::nes_bcbattle_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
85	85	device_t(mconfig, NES_BARCODE_BATTLER, "Epoch Barcode Battler (FC)", tag, owner, clock, "nes_bcbattle", __FILE__),
86	86	device_nes_control_port_interface(mconfig, *this),
87		m_reader(*this, "battler")
	87	m_reader(*this, "battler"), m_pending_code(0), m_new_code(0), m_transmitting(0), m_cur_bit(0), m_cur_byte(0), battler_timer(nullptr)
88	88	{
89	89	}
90	90

trunk/src/devices/bus/nes_ctrl/ctrl.cpp

r250251	r250252
102	102
103	103	nes_control_port_device::nes_control_port_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
104	104	device_t(mconfig, NES_CONTROL_PORT, "Nintendo NES/FC control port", tag, owner, clock, "nes_control_port", __FILE__),
105		device_slot_interface(mconfig, *this)
	105	device_slot_interface(mconfig, *this), m_device(nullptr)
106	106	{
107	107	}
108	108

trunk/src/devices/bus/nes_ctrl/fckeybrd.cpp

r250251	r250252
148	148	device_t(mconfig, NES_FCKEYBOARD, "Nintendo Family Computer Keyboard Component", tag, owner, clock, "nes_fckeybrd", __FILE__),
149	149	device_nes_control_port_interface(mconfig, *this),
150	150	m_cassette(*this, "tape"),
151		m_kbd(*this, "FCKEY")
	151	m_kbd(*this, "FCKEY"), m_fck_scan(0), m_fck_mode(0)
152	152	{
153	153	}
154	154

trunk/src/devices/bus/nes_ctrl/ftrainer.cpp

r250251	r250252
86	86	nes_ftrainer_device::nes_ftrainer_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
87	87	device_t(mconfig, NES_FTRAINER, "Bandai Family Trainer", tag, owner, clock, "nes_famtrain", __FILE__),
88	88	device_nes_control_port_interface(mconfig, *this),
89		m_trainer(*this, "FT_COL")
	89	m_trainer(*this, "FT_COL"), m_row_scan(0)
90	90	{
91	91	}
92	92

trunk/src/devices/bus/nes_ctrl/joypad.cpp

r250251	r250252
176	176	nes_joypad_device::nes_joypad_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
177	177	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
178	178	device_nes_control_port_interface(mconfig, *this),
179		m_joypad(*this, "JOYPAD")
	179	m_joypad(*this, "JOYPAD"), m_latch(0)
180	180	{
181	181	}
182	182
183	183	nes_joypad_device::nes_joypad_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
184	184	device_t(mconfig, NES_JOYPAD, "Nintendo NES / FC Control Pad", tag, owner, clock, "nes_joypad", __FILE__),
185	185	device_nes_control_port_interface(mconfig, *this),
186		m_joypad(*this, "JOYPAD")
	186	m_joypad(*this, "JOYPAD"), m_latch(0)
187	187	{
188	188	}
189	189

trunk/src/devices/bus/nes_ctrl/konamihs.cpp

r250251	r250252
46	46	device_t(mconfig, NES_KONAMIHS, "Konami Hyper Shot Controller", tag, owner, clock, "nes_konamihs", __FILE__),
47	47	device_nes_control_port_interface(mconfig, *this),
48	48	m_ipt_p1(*this, "P1"),
49		m_ipt_p2(*this, "P2")
	49	m_ipt_p2(*this, "P2"), m_latch_p1(0), m_latch_p2(0)
50	50	{
51	51	}
52	52

trunk/src/devices/bus/nes_ctrl/miracle.cpp

r250251	r250252
63	63	device_serial_interface(mconfig, *this),
64	64	device_nes_control_port_interface(mconfig, *this),
65	65	m_midiin(*this, "mdin"),
66		m_midiout(*this, "mdout")
	66	m_midiout(*this, "mdout"), strobe_timer(nullptr), m_strobe_on(0), m_midi_mode(0), m_sent_bits(0), m_strobe_clock(0),
	67	m_data_sent(0), m_xmit_read(0), m_xmit_write(0), m_recv_read(0), m_recv_write(0), m_tx_busy(false), m_read_status(false), m_status_bit(false)
67	68	{
68	69	}
69	70

trunk/src/devices/bus/nes_ctrl/mjpanel.cpp

r250251	r250252
72	72	nes_mjpanel_device::nes_mjpanel_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
73	73	device_t(mconfig, NES_MJPANEL, "Famicom Mahjong Panel", tag, owner, clock, "nes_mjpanel", __FILE__),
74	74	device_nes_control_port_interface(mconfig, *this),
75		m_panel(*this, "MJPANEL")
	75	m_panel(*this, "MJPANEL"), m_latch(0)
76	76	{
77	77	}
78	78

trunk/src/devices/bus/nes_ctrl/pachinko.cpp

r250251	r250252
51	51	device_t(mconfig, NES_PACHINKO, "Famicom Pachinko Controller", tag, owner, clock, "nes_pachinko", __FILE__),
52	52	device_nes_control_port_interface(mconfig, *this),
53	53	m_joypad(*this, "JOYPAD"),
54		m_trigger(*this, "TRIGGER")
	54	m_trigger(*this, "TRIGGER"), m_latch(0)
55	55	{
56	56	}
57	57

trunk/src/devices/bus/nes_ctrl/partytap.cpp

r250251	r250252
46	46	nes_partytap_device::nes_partytap_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
47	47	device_t(mconfig, NES_PARTYTAP, "Yonezawa Party Tap Controller", tag, owner, clock, "nes_partytap", __FILE__),
48	48	device_nes_control_port_interface(mconfig, *this),
49		m_inputs(*this, "INPUTS")
	49	m_inputs(*this, "INPUTS"), m_mode(0), m_latch(0)
50	50	{
51	51	}
52	52

trunk/src/devices/bus/nes_ctrl/suborkey.cpp

r250251	r250252
163	163	nes_suborkey_device::nes_suborkey_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
164	164	device_t(mconfig, NES_SUBORKEYBOARD, "Subor FC Keyboard", tag, owner, clock, "nes_suborkey", __FILE__),
165	165	device_nes_control_port_interface(mconfig, *this),
166		m_kbd(*this, "SUBOR")
	166	m_kbd(*this, "SUBOR"), m_fck_scan(0), m_fck_mode(0)
167	167	{
168	168	}
169	169

trunk/src/devices/bus/nubus/nubus.cpp

r250251	r250252
28	28	//-------------------------------------------------
29	29	nubus_slot_device::nubus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
30	30	device_t(mconfig, NUBUS_SLOT, "NUBUS_SLOT", tag, owner, clock, "nubus_slot", __FILE__),
31		device_slot_interface(mconfig, *this)
	31	device_slot_interface(mconfig, *this),
	32	m_nubus_tag(nullptr),
	33	m_nubus_slottag(nullptr)
32	34	{
33	35	}
34	36
35	37	nubus_slot_device::nubus_slot_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
36	38	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
37		device_slot_interface(mconfig, *this)
	39	device_slot_interface(mconfig, *this), m_nubus_tag(nullptr), m_nubus_slottag(nullptr)
38	40	{
39	41	}
40	42
r250251	r250252
77	79	//-------------------------------------------------
78	80
79	81	nubus_device::nubus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
80		device_t(mconfig, NUBUS, "NUBUS", tag, owner, clock, "nubus", __FILE__),
	82	device_t(mconfig, NUBUS, "NUBUS", tag, owner, clock, "nubus", __FILE__), m_maincpu(nullptr),
81	83	m_out_irq9_cb(*this),
82	84	m_out_irqa_cb(*this),
83	85	m_out_irqb_cb(*this),
84	86	m_out_irqc_cb(*this),
85	87	m_out_irqd_cb(*this),
86		m_out_irqe_cb(*this)
	88	m_out_irqe_cb(*this), m_cputag(nullptr)
87	89	{
88	90	}
89	91
90	92	nubus_device::nubus_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
91		device_t(mconfig, type, name, tag, owner, clock, shortname, source),
	93	device_t(mconfig, type, name, tag, owner, clock, shortname, source), m_maincpu(nullptr),
92	94	m_out_irq9_cb(*this),
93	95	m_out_irqa_cb(*this),
94	96	m_out_irqb_cb(*this),
95	97	m_out_irqc_cb(*this),
96	98	m_out_irqd_cb(*this),
97		m_out_irqe_cb(*this)
	99	m_out_irqe_cb(*this), m_cputag(nullptr)
98	100	{
99	101	}
100	102	//-------------------------------------------------
r250251	r250252
256	258
257	259	device_nubus_card_interface::device_nubus_card_interface(const machine_config &mconfig, device_t &device)
258	260	: device_slot_card_interface(mconfig, device),
259		m_nubus(NULL),
260		m_nubus_tag(NULL)
	261	m_nubus(nullptr),
	262	m_nubus_tag(nullptr), m_nubus_slottag(nullptr), m_slot(0), m_next(nullptr)
261	263	{
262	264	}
263	265

trunk/src/devices/bus/nubus/nubus_48gc.cpp

r250251	r250252
79	79	jmfb_device::jmfb_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
80	80	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
81	81	device_video_interface(mconfig, *this),
82		device_nubus_card_interface(mconfig, *this)
	82	device_nubus_card_interface(mconfig, *this), m_screen(nullptr), m_timer(nullptr), m_mode(0), m_vbl_disable(0), m_toggle(0), m_stride(0), m_base(0), m_count(0), m_clutoffs(0), m_xres(0), m_yres(0), m_is824(false)
83	83	{
84	84	m_assembled_tag = std::string(tag).append(":").append(GC48_SCREEN_NAME);
85	85	m_screen_tag = m_assembled_tag.c_str();

trunk/src/devices/bus/nubus/nubus_cb264.cpp

r250251	r250252
71	71
72	72	nubus_cb264_device::nubus_cb264_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
73	73	device_t(mconfig, NUBUS_CB264, "RasterOps ColorBoard 264 video card", tag, owner, clock, "nb_cb264", __FILE__),
74		device_nubus_card_interface(mconfig, *this)
	74	device_nubus_card_interface(mconfig, *this), m_cb264_mode(0), m_cb264_vbl_disable(0), m_cb264_toggle(0), m_count(0), m_clutoffs(0)
75	75	{
76	76	}
77	77
78	78	nubus_cb264_device::nubus_cb264_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
79	79	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
80		device_nubus_card_interface(mconfig, *this)
	80	device_nubus_card_interface(mconfig, *this), m_cb264_mode(0), m_cb264_vbl_disable(0), m_cb264_toggle(0), m_count(0), m_clutoffs(0)
81	81	{
82	82	}
83	83

trunk/src/devices/bus/nubus/nubus_image.cpp

r250251	r250252
70	70
71	71	messimg_disk_image_device::messimg_disk_image_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
72	72	: device_t(mconfig, MESSIMG_DISK, "Mac image", tag, owner, clock, "messimg_disk_image", __FILE__),
73		device_image_interface(mconfig, *this)
	73	device_image_interface(mconfig, *this), m_size(0), m_data(nullptr), m_ejected(false)
74	74	{
75	75	}
76	76
r250251	r250252
175	175
176	176	nubus_image_device::nubus_image_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
177	177	device_t(mconfig, NUBUS_IMAGE, "Disk Image Pseudo-Card", tag, owner, clock, "nb_image", __FILE__),
178		device_nubus_card_interface(mconfig, *this)
	178	device_nubus_card_interface(mconfig, *this), m_image(nullptr)
179	179	{
180	180	}
181	181
182	182	nubus_image_device::nubus_image_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
183	183	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
184		device_nubus_card_interface(mconfig, *this)
	184	device_nubus_card_interface(mconfig, *this), m_image(nullptr)
185	185	{
186	186	}
187	187

trunk/src/devices/bus/nubus/nubus_m2hires.cpp

r250251	r250252
68	68	nubus_m2hires_device::nubus_m2hires_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
69	69	device_t(mconfig, NUBUS_M2HIRES, "Macintosh II Hi-Resolution video card", tag, owner, clock, "nb_m2hr", __FILE__),
70	70	device_video_interface(mconfig, *this),
71		device_nubus_card_interface(mconfig, *this)
	71	device_nubus_card_interface(mconfig, *this), m_vram32(nullptr), m_mode(0), m_vbl_disable(0), m_toggle(0), m_count(0), m_clutoffs(0), m_timer(nullptr)
72	72	{
73	73	m_assembled_tag = std::string(tag).append(":").append(M2HIRES_SCREEN_NAME);
74	74	m_screen_tag = m_assembled_tag.c_str();
r250251	r250252
77	77	nubus_m2hires_device::nubus_m2hires_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
78	78	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
79	79	device_video_interface(mconfig, *this),
80		device_nubus_card_interface(mconfig, *this)
	80	device_nubus_card_interface(mconfig, *this), m_vram32(nullptr), m_mode(0), m_vbl_disable(0), m_toggle(0), m_count(0), m_clutoffs(0), m_timer(nullptr)
81	81	{
82	82	m_assembled_tag = std::string(tag).append(":").append(M2HIRES_SCREEN_NAME);
83	83	m_screen_tag = m_assembled_tag.c_str();

trunk/src/devices/bus/nubus/nubus_m2video.cpp

r250251	r250252
69	69	nubus_m2video_device::nubus_m2video_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
70	70	device_t(mconfig, NUBUS_M2VIDEO, "Macintosh II Video Card", tag, owner, clock, "nb_m2vc", __FILE__),
71	71	device_video_interface(mconfig, *this),
72		device_nubus_card_interface(mconfig, *this)
	72	device_nubus_card_interface(mconfig, *this), m_vram32(nullptr), m_mode(0), m_vbl_disable(0), m_toggle(0), m_count(0), m_clutoffs(0), m_timer(nullptr)
73	73	{
74	74	m_assembled_tag = std::string(tag).append(":").append(M2VIDEO_SCREEN_NAME);
75	75	m_screen_tag = m_assembled_tag.c_str();
r250251	r250252
78	78	nubus_m2video_device::nubus_m2video_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
79	79	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
80	80	device_video_interface(mconfig, *this),
81		device_nubus_card_interface(mconfig, *this)
	81	device_nubus_card_interface(mconfig, *this), m_vram32(nullptr), m_mode(0), m_vbl_disable(0), m_toggle(0), m_count(0), m_clutoffs(0), m_timer(nullptr)
82	82	{
83	83	m_assembled_tag = std::string(tag).append(":").append(M2VIDEO_SCREEN_NAME);
84	84	m_screen_tag = m_assembled_tag.c_str();

trunk/src/devices/bus/nubus/nubus_radiustpd.cpp

r250251	r250252
68	68	nubus_radiustpd_device::nubus_radiustpd_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
69	69	device_t(mconfig, NUBUS_RADIUSTPD, "Radius Two Page Display video card", tag, owner, clock, "nb_rtpd", __FILE__),
70	70	device_video_interface(mconfig, *this),
71		device_nubus_card_interface(mconfig, *this)
	71	device_nubus_card_interface(mconfig, *this), m_vram32(nullptr), m_mode(0), m_vbl_disable(0), m_toggle(0), m_count(0), m_clutoffs(0), m_timer(nullptr)
72	72	{
73	73	m_assembled_tag = std::string(tag).append(":").append(RADIUSTPD_SCREEN_NAME);
74	74	m_screen_tag = m_assembled_tag.c_str();
r250251	r250252
77	77	nubus_radiustpd_device::nubus_radiustpd_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
78	78	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
79	79	device_video_interface(mconfig, *this),
80		device_nubus_card_interface(mconfig, *this)
	80	device_nubus_card_interface(mconfig, *this), m_vram32(nullptr), m_mode(0), m_vbl_disable(0), m_toggle(0), m_count(0), m_clutoffs(0), m_timer(nullptr)
81	81	{
82	82	m_assembled_tag = std::string(tag).append(":").append(RADIUSTPD_SCREEN_NAME);
83	83	m_screen_tag = m_assembled_tag.c_str();

trunk/src/devices/bus/nubus/nubus_spec8.cpp

r250251	r250252
70	70	nubus_spec8s3_device::nubus_spec8s3_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
71	71	device_t(mconfig, NUBUS_SPEC8S3, "SuperMac Spectrum/8 Series III video card", tag, owner, clock, "nb_sp8s3", __FILE__),
72	72	device_video_interface(mconfig, *this),
73		device_nubus_card_interface(mconfig, *this)
	73	device_nubus_card_interface(mconfig, *this), m_vram32(nullptr), m_mode(0), m_vbl_disable(0), m_count(0), m_clutoffs(0), m_timer(nullptr), m_vbl_pending(false), m_parameter(0)
74	74	{
75	75	m_assembled_tag = std::string(tag).append(":").append(SPEC8S3_SCREEN_NAME);
76	76	m_screen_tag = m_assembled_tag.c_str();
r250251	r250252
79	79	nubus_spec8s3_device::nubus_spec8s3_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
80	80	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
81	81	device_video_interface(mconfig, *this),
82		device_nubus_card_interface(mconfig, *this)
	82	device_nubus_card_interface(mconfig, *this), m_vram32(nullptr), m_mode(0), m_vbl_disable(0), m_count(0), m_clutoffs(0), m_timer(nullptr), m_vbl_pending(false), m_parameter(0)
83	83	{
84	84	m_assembled_tag = std::string(tag).append(":").append(SPEC8S3_SCREEN_NAME);
85	85	m_screen_tag = m_assembled_tag.c_str();

trunk/src/devices/bus/nubus/nubus_specpdq.cpp

r250251	r250252
85	85	nubus_specpdq_device::nubus_specpdq_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
86	86	device_t(mconfig, NUBUS_SPECPDQ, "SuperMac Spectrum PDQ video card", tag, owner, clock, "nb_spdq", __FILE__),
87	87	device_video_interface(mconfig, *this),
88		device_nubus_card_interface(mconfig, *this),
	88	device_nubus_card_interface(mconfig, *this), m_vram32(nullptr), m_mode(0), m_vbl_disable(0), m_count(0), m_clutoffs(0), m_timer(nullptr), m_width(0), m_height(0), m_patofsx(0), m_patofsy(0), m_vram_addr(0), m_vram_src(0),
89	89	m_palette(*this, "palette")
90	90	{
91	91	m_assembled_tag = std::string(tag).append(":").append(SPECPDQ_SCREEN_NAME);
r250251	r250252
95	95	nubus_specpdq_device::nubus_specpdq_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
96	96	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
97	97	device_video_interface(mconfig, *this),
98		device_nubus_card_interface(mconfig, *this),
	98	device_nubus_card_interface(mconfig, *this), m_vram32(nullptr), m_mode(0), m_vbl_disable(0), m_count(0), m_clutoffs(0), m_timer(nullptr), m_width(0), m_height(0), m_patofsx(0), m_patofsy(0), m_vram_addr(0), m_vram_src(0),
99	99	m_palette(*this, "palette")
100	100	{
101	101	m_assembled_tag = std::string(tag).append(":").append(SPECPDQ_SCREEN_NAME);

trunk/src/devices/bus/nubus/nubus_vikbw.cpp

r250251	r250252
67	67
68	68	nubus_vikbw_device::nubus_vikbw_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
69	69	device_t(mconfig, NUBUS_VIKBW, "Moniterm Viking video card", tag, owner, clock, "nb_vikbw", __FILE__),
70		device_nubus_card_interface(mconfig, *this)
	70	device_nubus_card_interface(mconfig, *this), m_vbl_disable(0)
71	71	{
72	72	}
73	73
74	74	nubus_vikbw_device::nubus_vikbw_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
75	75	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
76		device_nubus_card_interface(mconfig, *this)
	76	device_nubus_card_interface(mconfig, *this), m_vbl_disable(0)
77	77	{
78	78	}
79	79

trunk/src/devices/bus/nubus/nubus_wsportrait.cpp

r250251	r250252
71	71	nubus_wsportrait_device::nubus_wsportrait_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
72	72	device_t(mconfig, NUBUS_WSPORTRAIT, "Macintosh II Portrait Video Card", tag, owner, clock, "nb_wspt", __FILE__),
73	73	device_video_interface(mconfig, *this),
74		device_nubus_card_interface(mconfig, *this)
	74	device_nubus_card_interface(mconfig, *this), m_vram32(nullptr), m_mode(0), m_vbl_disable(0), m_toggle(0), m_count(0), m_clutoffs(0), m_timer(nullptr)
75	75	{
76	76	m_assembled_tag = std::string(tag).append(":").append(WSPORTRAIT_SCREEN_NAME);
77	77	m_screen_tag = m_assembled_tag.c_str();
r250251	r250252
80	80	nubus_wsportrait_device::nubus_wsportrait_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
81	81	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
82	82	device_video_interface(mconfig, *this),
83		device_nubus_card_interface(mconfig, *this)
	83	device_nubus_card_interface(mconfig, *this), m_vram32(nullptr), m_mode(0), m_vbl_disable(0), m_toggle(0), m_count(0), m_clutoffs(0), m_timer(nullptr)
84	84	{
85	85	m_assembled_tag = std::string(tag).append(":").append(WSPORTRAIT_SCREEN_NAME);
86	86	m_screen_tag = m_assembled_tag.c_str();

trunk/src/devices/bus/nubus/pds30_30hr.cpp

r250251	r250252
71	71	nubus_xceed30hr_device::nubus_xceed30hr_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
72	72	device_t(mconfig, PDS030_XCEED30HR, "Micron/XCEED Technology Color 30HR", tag, owner, clock, "pd3_30hr", __FILE__),
73	73	device_video_interface(mconfig, *this),
74		device_nubus_card_interface(mconfig, *this)
	74	device_nubus_card_interface(mconfig, *this), m_vram32(nullptr), m_mode(0), m_vbl_disable(0), m_toggle(0), m_count(0), m_clutoffs(0), m_timer(nullptr)
75	75	{
76	76	m_assembled_tag = std::string(tag).append(":").append(XCEED30HR_SCREEN_NAME);
77	77	m_screen_tag = m_assembled_tag.c_str();
r250251	r250252
80	80	nubus_xceed30hr_device::nubus_xceed30hr_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
81	81	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
82	82	device_video_interface(mconfig, *this),
83		device_nubus_card_interface(mconfig, *this)
	83	device_nubus_card_interface(mconfig, *this), m_vram32(nullptr), m_mode(0), m_vbl_disable(0), m_toggle(0), m_count(0), m_clutoffs(0), m_timer(nullptr)
84	84	{
85	85	m_assembled_tag = std::string(tag).append(":").append(XCEED30HR_SCREEN_NAME);
86	86	m_screen_tag = m_assembled_tag.c_str();

trunk/src/devices/bus/nubus/pds30_cb264.cpp

r250251	r250252
64	64	nubus_cb264se30_device::nubus_cb264se30_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
65	65	device_t(mconfig, PDS030_CB264SE30, "RasterOps Colorboard 264/SE30", tag, owner, clock, "pd3_c264", __FILE__),
66	66	device_video_interface(mconfig, *this),
67		device_nubus_card_interface(mconfig, *this)
	67	device_nubus_card_interface(mconfig, *this), m_vram32(nullptr), m_mode(0), m_vbl_disable(0), m_toggle(0), m_count(0), m_clutoffs(0), m_timer(nullptr)
68	68	{
69	69	m_assembled_tag = std::string(tag).append(":").append(CB264SE30_SCREEN_NAME);
70	70	m_screen_tag = m_assembled_tag.c_str();
r250251	r250252
73	73	nubus_cb264se30_device::nubus_cb264se30_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
74	74	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
75	75	device_video_interface(mconfig, *this),
76		device_nubus_card_interface(mconfig, *this)
	76	device_nubus_card_interface(mconfig, *this), m_vram32(nullptr), m_mode(0), m_vbl_disable(0), m_toggle(0), m_count(0), m_clutoffs(0), m_timer(nullptr)
77	77	{
78	78	m_assembled_tag = std::string(tag).append(":").append(CB264SE30_SCREEN_NAME);
79	79	m_screen_tag = m_assembled_tag.c_str();

trunk/src/devices/bus/nubus/pds30_mc30.cpp

r250251	r250252
67	67	nubus_xceedmc30_device::nubus_xceedmc30_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
68	68	device_t(mconfig, PDS030_XCEEDMC30, "Micron/XCEED Technology MacroColor 30", tag, owner, clock, "pd3_mclr", __FILE__),
69	69	device_video_interface(mconfig, *this),
70		device_nubus_card_interface(mconfig, *this)
	70	device_nubus_card_interface(mconfig, *this), m_vram32(nullptr), m_mode(0), m_vbl_disable(0), m_toggle(0), m_count(0), m_clutoffs(0), m_timer(nullptr)
71	71	{
72	72	m_assembled_tag = std::string(tag).append(":").append(XCEEDMC30_SCREEN_NAME);
73	73	m_screen_tag = m_assembled_tag.c_str();
r250251	r250252
76	76	nubus_xceedmc30_device::nubus_xceedmc30_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
77	77	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
78	78	device_video_interface(mconfig, *this),
79		device_nubus_card_interface(mconfig, *this)
	79	device_nubus_card_interface(mconfig, *this), m_vram32(nullptr), m_mode(0), m_vbl_disable(0), m_toggle(0), m_count(0), m_clutoffs(0), m_timer(nullptr)
80	80	{
81	81	m_assembled_tag = std::string(tag).append(":").append(XCEEDMC30_SCREEN_NAME);
82	82	m_screen_tag = m_assembled_tag.c_str();

trunk/src/devices/bus/nubus/pds30_procolor816.cpp

r250251	r250252
70	70	nubus_procolor816_device::nubus_procolor816_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
71	71	device_t(mconfig, PDS030_PROCOLOR816, "Lapis ProColor Server 8*16", tag, owner, clock, "pd3_pc16", __FILE__),
72	72	device_video_interface(mconfig, *this),
73		device_nubus_card_interface(mconfig, *this)
	73	device_nubus_card_interface(mconfig, *this), m_vram32(nullptr), m_mode(0), m_vbl_disable(0), m_toggle(0), m_count(0), m_clutoffs(0), m_timer(nullptr)
74	74	{
75	75	m_assembled_tag = std::string(tag).append(":").append(PROCOLOR816_SCREEN_NAME);
76	76	m_screen_tag = m_assembled_tag.c_str();
r250251	r250252
79	79	nubus_procolor816_device::nubus_procolor816_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
80	80	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
81	81	device_video_interface(mconfig, *this),
82		device_nubus_card_interface(mconfig, *this)
	82	device_nubus_card_interface(mconfig, *this), m_vram32(nullptr), m_mode(0), m_vbl_disable(0), m_toggle(0), m_count(0), m_clutoffs(0), m_timer(nullptr)
83	83	{
84	84	m_assembled_tag = std::string(tag).append(":").append(PROCOLOR816_SCREEN_NAME);
85	85	m_screen_tag = m_assembled_tag.c_str();

trunk/src/devices/bus/nubus/pds30_sigmalview.cpp

r250251	r250252
64	64	nubus_lview_device::nubus_lview_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
65	65	device_t(mconfig, PDS030_LVIEW, "Sigma Designs L-View", tag, owner, clock, "pd3_lviw", __FILE__),
66	66	device_video_interface(mconfig, *this),
67		device_nubus_card_interface(mconfig, *this)
	67	device_nubus_card_interface(mconfig, *this), m_vram32(nullptr), m_vbl_disable(0), m_toggle(0), m_timer(nullptr), m_protstate(0)
68	68	{
69	69	m_assembled_tag = std::string(tag).append(":").append(LVIEW_SCREEN_NAME);
70	70	m_screen_tag = m_assembled_tag.c_str();
r250251	r250252
73	73	nubus_lview_device::nubus_lview_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
74	74	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
75	75	device_video_interface(mconfig, *this),
76		device_nubus_card_interface(mconfig, *this)
	76	device_nubus_card_interface(mconfig, *this), m_vram32(nullptr), m_vbl_disable(0), m_toggle(0), m_timer(nullptr), m_protstate(0)
77	77	{
78	78	m_assembled_tag = std::string(tag).append(":").append(LVIEW_SCREEN_NAME);
79	79	m_screen_tag = m_assembled_tag.c_str();

trunk/src/devices/bus/odyssey2/rom.cpp

r250251	r250252
23	23
24	24
25	25	o2_rom_device::o2_rom_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
26		: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
27		device_o2_cart_interface( mconfig, *this )
	26	: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
	27	device_o2_cart_interface(mconfig, *this),
	28	m_bank_base(0)
28	29	{
29	30	}
30	31
31	32	o2_rom_device::o2_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
32	33	: device_t(mconfig, O2_ROM_STD, "Odyssey 2 Standard Carts", tag, owner, clock, "o2_rom", __FILE__),
33		device_o2_cart_interface( mconfig, *this )
34		{
	34	device_o2_cart_interface( mconfig, *this ),
	35	m_bank_base(0)
	36	{
35	37	}
36	38
37	39	o2_rom12_device::o2_rom12_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)

trunk/src/devices/bus/odyssey2/slot.cpp

r250251	r250252
76	76	device_t(mconfig, O2_CART_SLOT, "Odyssey 2 Cartridge Slot", tag, owner, clock, "o2_cart_slot", __FILE__),
77	77	device_image_interface(mconfig, *this),
78	78	device_slot_interface(mconfig, *this),
79		m_type(O2_STD)
	79	m_type(O2_STD), m_cart(nullptr)
80	80	{
81	81	}
82	82

trunk/src/devices/bus/oricext/jasmin.cpp

r250251	r250252
44	44
45	45	jasmin_device::jasmin_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
46	46	oricext_device(mconfig, JASMIN, "Jasmin floppy drive interface", tag, owner, clock, "jasmin", __FILE__),
47		fdc(*this, "fdc")
	47	fdc(*this, "fdc"), side_sel(false), fdc_reset(false), ram_access(false), rom_access(false), jasmin_rom(nullptr), cur_floppy(nullptr)
48	48	{
49	49	}
50	50

trunk/src/devices/bus/oricext/microdisc.cpp

r250251	r250252
39	39
40	40	microdisc_device::microdisc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
41	41	oricext_device(mconfig, MICRODISC, "Microdisc floppy drive interface", tag, owner, clock, "microdisc", __FILE__),
42		fdc(*this, "fdc")
	42	fdc(*this, "fdc"), microdisc_rom(nullptr), port_314(0), intrq_state(false), drq_state(false), hld_state(false)
43	43	{
44	44	}
45	45

trunk/src/devices/bus/oricext/oricext.cpp

r250251	r250252
9	9	oricext_connector::oricext_connector(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
10	10	device_t(mconfig, ORICEXT_CONNECTOR, "ORIC extension connector", tag, owner, clock, "oricext_connector", __FILE__),
11	11	device_slot_interface(mconfig, *this),
12		irq_handler(*this)
	12	irq_handler(*this),
	13	cputag(NULL)
13	14	{
14	15	}
15	16
r250251	r250252
41	42
42	43	oricext_device::oricext_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
43	44	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
44		device_slot_card_interface(mconfig, *this)
	45	device_slot_card_interface(mconfig, *this),
	46	cputag(nullptr),
	47	cpu(nullptr),
	48	connector(nullptr),
	49	bank_c000_r(nullptr),
	50	bank_e000_r(nullptr),
	51	bank_f800_r(nullptr),
	52	bank_c000_w(nullptr),
	53	bank_e000_w(nullptr),
	54	bank_f800_w(nullptr),
	55	rom(nullptr),
	56	ram(nullptr)
45	57	{
46	58	}
47	59

trunk/src/devices/bus/pc_joy/pc_joy.cpp

r250251	r250252
15	15
16	16	pc_joy_device::pc_joy_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
17	17	device_t(mconfig, PC_JOY, "PC joystick port", tag, owner, clock, "pc_joy", __FILE__),
18		device_slot_interface(mconfig, *this)
	18	device_slot_interface(mconfig, *this),
	19	m_dev(nullptr)
19	20	{
20	21	}
21	22

trunk/src/devices/bus/pc_joy/pc_joy_sw.cpp

r250251	r250252
13	13	m_btn2(*this, "btn2"),
14	14	m_btn3(*this, "btn3"),
15	15	m_btn4(*this, "btn4"),
16		m_conf(*this, "CONFIG")
	16	m_conf(*this, "CONFIG"),
	17	m_timer(NULL),
	18	m_count(0),
	19	m_state(0),
	20	m_active(false)
17	21	{
18	22	}
19	23

trunk/src/devices/bus/pc_kbd/iskr1030.cpp

r250251	r250252
286	286	m_md20(*this, "MD20"),
287	287	m_md21(*this, "MD21"),
288	288	m_md22(*this, "MD22"),
289		m_md23(*this, "MD23"),
	289	m_md23(*this, "MD23"), m_bus(0),
290	290	m_p1(0),
291	291	m_p2(0),
292	292	m_q(0)

trunk/src/devices/bus/pc_kbd/keytro.cpp

r250251	r250252
380	380	pc_kbd_keytronic_pc3270_device::pc_kbd_keytronic_pc3270_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
381	381	device_t(mconfig, PC_KBD_KEYTRONIC_PC3270, "Keytronic PC3270", tag, owner, clock, "keytronic_pc3270", __FILE__),
382	382	device_pc_kbd_interface(mconfig, *this),
383		m_cpu(*this, "kb_keytr")
	383	m_cpu(*this, "kb_keytr"), m_p1(0), m_p1_data(0), m_p2(0), m_p3(0), m_last_write_addr(0)
384	384	{
385	385	}
386	386

trunk/src/devices/bus/pc_kbd/msnat.cpp

r250251	r250252
247	247	, m_p1_4(*this, "P1.4")
248	248	, m_p1_5(*this, "P1.5")
249	249	, m_p1_6(*this, "P1.6")
250		, m_p1_7(*this, "P1.7")
	250	, m_p1_7(*this, "P1.7"), m_p0(0), m_p1(0), m_p2(0), m_p3(0)
251	251	{
252	252	}
253	253

trunk/src/devices/bus/pc_kbd/pc83.cpp

r250251	r250252
275	275	m_dr20(*this, "DR20"),
276	276	m_dr21(*this, "DR21"),
277	277	m_dr22(*this, "DR22"),
278		m_dr23(*this, "DR23")
	278	m_dr23(*this, "DR23"), m_cnt(0)
279	279	{
280	280	}
281	281

trunk/src/devices/bus/pc_kbd/pc_kbdc.cpp

r250251	r250252
33	33	//-------------------------------------------------
34	34	pc_kbdc_slot_device::pc_kbdc_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
35	35	device_t(mconfig, PC_KBDC_SLOT, "PC_KBDC_SLOT", tag, owner, clock, "pc_kbdc_slot", __FILE__),
36		device_slot_interface(mconfig, *this)
	36	device_slot_interface(mconfig, *this),
	37	m_kbdc_device(nullptr)
37	38	{
38	39	}
39	40
r250251	r250252
74	75	m_out_clock_cb(*this),
75	76	m_out_data_cb(*this),
76	77	m_clock_state(-1),
77		m_data_state(-1),
	78	m_data_state(-1), m_mb_clock_state(0), m_mb_data_state(0),
78	79	m_kb_clock_state(1),
79	80	m_kb_data_state(1),
80	81	m_keyboard( NULL )
r250251	r250252
195	196	device_pc_kbd_interface::device_pc_kbd_interface(const machine_config &mconfig, device_t &device)
196	197	: device_slot_card_interface(mconfig, device),
197	198	m_pc_kbdc(NULL),
198		m_pc_kbdc_tag(NULL)
	199	m_pc_kbdc_tag(NULL), m_next(nullptr)
199	200	{
200	201	}
201	202

trunk/src/devices/bus/pce/pce_rom.cpp

r250251	r250252
46	46	}
47	47
48	48	pce_sf2_device::pce_sf2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
49		: pce_rom_device(mconfig, PCE_ROM_SF2, "PCE Street Fighters 2 Cart", tag, owner, clock, "pce_sf2", __FILE__)
50		{
	49	: pce_rom_device(mconfig, PCE_ROM_SF2, "PCE Street Fighters 2 Cart", tag, owner, clock, "pce_sf2", __FILE__), m_bank_base(0)
	50	{
51	51	}
52	52
53	53

trunk/src/devices/bus/pce/pce_slot.cpp

r250251	r250252
140	140	device_image_interface(mconfig, *this),
141	141	device_slot_interface(mconfig, *this),
142	142	m_interface("pce_cart"),
143		m_type(PCE_STD)
	143	m_type(PCE_STD), m_cart(nullptr)
144	144	{
145	145	}
146	146

trunk/src/devices/bus/pet/c2n.cpp

r250251	r250252
55	55	: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
56	56	device_pet_datassette_port_interface(mconfig, *this),
57	57	m_cassette(*this, "cassette"),
58		m_motor(false)
	58	m_motor(false),
	59	m_read_timer(nullptr)
59	60	{
60	61	}
61	62
r250251	r250252
63	64	: device_t(mconfig, C2N, "C2N Datassette", tag, owner, clock, "c2n", __FILE__),
64	65	device_pet_datassette_port_interface(mconfig, *this),
65	66	m_cassette(*this, "cassette"),
66		m_motor(false)
	67	m_motor(false), m_read_timer(nullptr)
67	68	{
68	69	}
69	70

trunk/src/devices/bus/pet/cass.cpp

r250251	r250252
54	54	pet_datassette_port_device::pet_datassette_port_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
55	55	device_t(mconfig, PET_DATASSETTE_PORT, "Datassette Port", tag, owner, clock, "pet_datassette_port", __FILE__),
56	56	device_slot_interface(mconfig, *this),
57		m_read_handler(*this)
	57	m_read_handler(*this), m_cart(nullptr)
58	58	{
59	59	}
60	60

trunk/src/devices/bus/pet/exp.cpp

r250251	r250252
36	36
37	37	pet_expansion_slot_device::pet_expansion_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
38	38	device_t(mconfig, PET_EXPANSION_SLOT, "PET memory expansion port", tag, owner, clock, "pet_expansion_slot", __FILE__),
39		device_slot_interface(mconfig, *this),
	39	device_slot_interface(mconfig, *this), m_card(nullptr),
40	40	m_read_dma(*this),
41	41	m_write_dma(*this)
42	42	{

trunk/src/devices/bus/pet/superpet.cpp

r250251	r250252
185	185	m_io_sw1(*this, "SW1"),
186	186	m_io_sw2(*this, "SW2"),
187	187	m_system(0),
188		m_bank(0),
	188	m_bank(0), m_sw1(0), m_sw2(0),
189	189	m_sel9_rom(0),
190	190	m_pet_irq(CLEAR_LINE),
191	191	m_acia_irq(CLEAR_LINE)

trunk/src/devices/bus/plus4/c1551.cpp

r250251	r250252
428	428	m_status(1),
429	429	m_dav(1),
430	430	m_ack(1),
431		m_dev(0)
	431	m_dev(0), m_irq_timer(nullptr)
432	432	{
433	433	}
434	434

trunk/src/devices/bus/plus4/exp.cpp

r250251	r250252
74	74	m_write_irq(*this),
75	75	m_read_dma_cd(*this),
76	76	m_write_dma_cd(*this),
77		m_write_aec(*this)
	77	m_write_aec(*this), m_card(nullptr)
78	78	{
79	79	}
80	80

trunk/src/devices/bus/psx/analogue.cpp

r250251	r250252
7	7
8	8	psx_analog_controller_device::psx_analog_controller_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
9	9	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
10		device_psx_controller_interface(mconfig, *this),
	10	device_psx_controller_interface(mconfig, *this),
	11	m_type(),
	12	m_confmode(false),
	13	m_analogmode(false),
	14	m_analoglock(false),
	15	m_temp(0),
	16	m_cmd(0),
11	17	m_pad0(*this, "PSXPAD0"),
12	18	m_pad1(*this, "PSXPAD1"),
13	19	m_rstickx(*this, "PSXRSTICKX"),

trunk/src/devices/bus/psx/ctlrport.cpp

r250251	r250252
10	10
11	11	psx_controller_port_device::psx_controller_port_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
12	12	device_t(mconfig, PSX_CONTROLLER_PORT, "Playstation Controller Port", tag, owner, clock, "psx_controller_port", __FILE__),
13		device_slot_interface(mconfig, *this),
	13	device_slot_interface(mconfig, *this),
	14	m_tx(false),
	15	m_dev(nullptr),
14	16	m_card(*this, "card")
15	17	{
16	18	}
r250251	r250252
40	42	const device_type PSXCONTROLLERPORTS = &device_creator<psxcontrollerports_device>;
41	43
42	44	psxcontrollerports_device::psxcontrollerports_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
43		: device_t(mconfig, PSXCONTROLLERPORTS, "PSXCONTROLLERPORTS", tag, owner, clock, "psxcontrollerports", __FILE__),
	45	: device_t(mconfig, PSXCONTROLLERPORTS, "PSXCONTROLLERPORTS", tag, owner, clock, "psxcontrollerports", __FILE__), m_port0(nullptr), m_port1(nullptr),
44	46	m_dsr_handler(*this),
45	47	m_rxd_handler(*this)
46	48	{
r250251	r250252
97	99	}
98	100
99	101	device_psx_controller_interface::device_psx_controller_interface(const machine_config &mconfig, device_t &device) :
100		device_slot_card_interface(mconfig, device),
101		m_ack(true)
	102	device_slot_card_interface(mconfig, device), m_odata(0), m_idata(0), m_bit(0), m_count(0), m_memcard(false), m_clock(false), m_sel(false),
	103	m_ack(true), m_rx(false), m_ack_timer(nullptr), m_owner(nullptr)
102	104	{
103	105	}
104	106

trunk/src/devices/bus/psx/memcard.cpp

r250251	r250252
43	43
44	44	psxcard_device::psxcard_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
45	45	: device_t(mconfig, PSXCARD, "Sony PSX Memory Card", tag, owner, clock, "psxcard", __FILE__),
46		device_image_interface(mconfig, *this)
	46	device_image_interface(mconfig, *this),
	47	pkt_ptr(0),
	48	pkt_sz(0),
	49	cmd(0),
	50	addr(0),
	51	state(0),
	52	m_disabled(false),
	53	m_odata(0),
	54	m_idata(0),
	55	m_bit(0),
	56	m_count(0),
	57	m_pad(false),
	58	m_clock(false),
	59	m_sel(false),
	60	m_ack(false),
	61	m_rx(false),
	62	m_ack_timer(nullptr),
	63	m_owner(nullptr)
47	64	{
48	65	}
49	66

trunk/src/devices/bus/psx/multitap.cpp

r250251	r250252
8	8
9	9	psx_multitap_device::psx_multitap_device(const machine_config& mconfig, const char* tag, device_t* owner, UINT32 clock) :
10	10	device_t(mconfig, PSX_MULTITAP, "Playstation Multitap", tag, owner, clock, "psx_multitap", __FILE__),
11		device_psx_controller_interface(mconfig, *this),
	11	device_psx_controller_interface(mconfig, *this),
	12	m_activeport(0),
	13	m_singlemode(false),
	14	m_nextmode(false),
	15	m_tapmc(false),
12	16	m_porta(*this, "a"),
13	17	m_portb(*this, "b"),
14	18	m_portc(*this, "c"),

trunk/src/devices/bus/ql/exp.cpp

r250251	r250252
49	49	m_write_ipl0l(*this),
50	50	m_write_ipl1l(*this),
51	51	m_write_berrl(*this),
52		m_write_extintl(*this)
	52	m_write_extintl(*this), m_card(nullptr)
53	53	{
54	54	}
55	55

trunk/src/devices/bus/ql/rom.cpp

r250251	r250252
56	56	ql_rom_cartridge_slot_t::ql_rom_cartridge_slot_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
57	57	device_t(mconfig, QL_ROM_CARTRIDGE_SLOT, "QL ROM cartridge slot", tag, owner, clock, "ql_rom_cartridge_slot", __FILE__),
58	58	device_slot_interface(mconfig, *this),
59		device_image_interface(mconfig, *this)
	59	device_image_interface(mconfig, *this), m_card(nullptr)
60	60	{
61	61	}
62	62

trunk/src/devices/bus/ql/sandy_superdisk.cpp

r250251	r250252
120	120	m_centronics(*this, CENTRONICS_TAG),
121	121	m_latch(*this, TTL74273_TAG),
122	122	m_rom(*this, "rom"),
123		m_busy(1)
	123	m_busy(1), m_fd6(0)
124	124	{
125	125	}
126	126

trunk/src/devices/bus/ql/trumpcard.cpp

r250251	r250252
119	119	m_floppy1(*this, WD1772_TAG":1"),
120	120	m_rom(*this, "rom"),
121	121	m_ram(*this, "ram"),
122		m_ram_size(0)
	122	m_ram_size(0), m_rom_en(false)
123	123	{
124	124	}
125	125
r250251	r250252
131	131	m_floppy1(*this, WD1772_TAG":1"),
132	132	m_rom(*this, "rom"),
133	133	m_ram(*this, "ram"),
134		m_ram_size(ram_size)
	134	m_ram_size(ram_size), m_rom_en(false)
135	135	{
136	136	}
137	137

trunk/src/devices/bus/rs232/keyboard.cpp

r250251	r250252
5	5	serial_keyboard_device::serial_keyboard_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
6	6	: generic_keyboard_device(mconfig, SERIAL_KEYBOARD, "Serial Keyboard", tag, owner, clock, "serial_keyboard", __FILE__),
7	7	device_serial_interface(mconfig, *this),
8		device_rs232_port_interface(mconfig, *this),
	8	device_rs232_port_interface(mconfig, *this),
	9	m_curr_key(0),
9	10	m_key_valid(false),
10	11	m_rs232_txbaud(*this, "RS232_TXBAUD"),
11	12	m_rs232_startbits(*this, "RS232_STARTBITS"),
r250251	r250252
18	19	serial_keyboard_device::serial_keyboard_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
19	20	: generic_keyboard_device(mconfig, type, name, tag, owner, clock, shortname, source),
20	21	device_serial_interface(mconfig, *this),
21		device_rs232_port_interface(mconfig, *this),
	22	device_rs232_port_interface(mconfig, *this),
	23	m_curr_key(0),
22	24	m_key_valid(false),
23	25	m_rs232_txbaud(*this, "RS232_TXBAUD"),
24	26	m_rs232_startbits(*this, "RS232_STARTBITS"),

trunk/src/devices/bus/rs232/null_modem.cpp

r250251	r250252
14	14	m_rs232_parity(*this, "RS232_PARITY"),
15	15	m_rs232_stopbits(*this, "RS232_STOPBITS"),
16	16	m_input_count(0),
17		m_input_index(0)
	17	m_input_index(0),
	18	m_timer_poll(NULL)
18	19	{
19	20	}
20	21

trunk/src/devices/bus/rs232/pty.cpp

r250251	r250252
18	18	m_rs232_parity(*this, "RS232_PARITY"),
19	19	m_rs232_stopbits(*this, "RS232_STOPBITS"),
20	20	m_input_count(0),
21		m_input_index(0)
	21	m_input_index(0),
	22	m_timer_poll(NULL)
22	23	{
23	24	}
24	25

trunk/src/devices/bus/rs232/rs232.cpp

r250251	r250252
6	6
7	7	rs232_port_device::rs232_port_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
8	8	device_t(mconfig, RS232_PORT, "RS232 Port", tag, owner, clock, "rs232", __FILE__),
9		device_slot_interface(mconfig, *this),
	9	device_slot_interface(mconfig, *this),
	10	m_rxd(0),
	11	m_dcd(0),
	12	m_dsr(0),
	13	m_ri(0),
	14	m_cts(0),
10	15	m_rxd_handler(*this),
11	16	m_dcd_handler(*this),
12	17	m_dsr_handler(*this),
r250251	r250252
18	23
19	24	rs232_port_device::rs232_port_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
20	25	: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
21		device_slot_interface(mconfig, *this),
	26	device_slot_interface(mconfig, *this),
	27	m_rxd(0),
	28	m_dcd(0),
	29	m_dsr(0),
	30	m_ri(0),
	31	m_cts(0),
22	32	m_rxd_handler(*this),
23	33	m_dcd_handler(*this),
24	34	m_dsr_handler(*this),

trunk/src/devices/bus/rs232/ser_mouse.cpp

r250251	r250252
16	16	device_rs232_port_interface(mconfig, *this),
17	17	device_serial_interface(mconfig, *this),
18	18	m_dtr(1),
19		m_rts(1),
	19	m_rts(1),
	20	m_head(0),
	21	m_tail(0),
	22	m_mb(0),
	23	m_timer(nullptr),
	24	m_enabled(false),
20	25	m_x(*this, "ser_mouse_x"),
21	26	m_y(*this, "ser_mouse_y"),
22	27	m_btn(*this, "ser_mouse_btn")

trunk/src/devices/bus/rs232/terminal.cpp

r250251	r250252
11	11	m_rs232_startbits(*this, "RS232_STARTBITS"),
12	12	m_rs232_databits(*this, "RS232_DATABITS"),
13	13	m_rs232_parity(*this, "RS232_PARITY"),
14		m_rs232_stopbits(*this, "RS232_STOPBITS")
	14	m_rs232_stopbits(*this, "RS232_STOPBITS"),
	15	m_curr_key(0),
	16	m_key_valid(false)
15	17	{
16	18	}
17	19

trunk/src/devices/bus/rs232/xvd701.cpp

r250251	r250252
5	5	jvc_xvd701_device::jvc_xvd701_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
6	6	: device_t(mconfig, JVC_XVD701, "JVC XV-D701", tag, owner, clock, "xvd701", __FILE__),
7	7	device_serial_interface(mconfig, *this),
8		device_rs232_port_interface(mconfig, *this)
	8	device_rs232_port_interface(mconfig, *this),
	9	m_response_index(0),
	10	m_timer_response(nullptr)
9	11	{
10	12	}
11	13

trunk/src/devices/bus/s100/s100.cpp

r250251	r250252
27	27	//-------------------------------------------------
28	28
29	29	device_s100_card_interface::device_s100_card_interface(const machine_config &mconfig, device_t &device)
30		: device_slot_card_interface(mconfig, device)
	30	: device_slot_card_interface(mconfig, device),
	31	m_bus(nullptr),
	32	m_next(nullptr)
31	33	{
32	34	}
33	35
r250251	r250252
37	39	//-------------------------------------------------
38	40	s100_slot_t::s100_slot_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
39	41	device_t(mconfig, S100_SLOT, "S100 slot", tag, owner, clock, "s100_slot", __FILE__),
40		device_slot_interface(mconfig, *this)
	42	device_slot_interface(mconfig, *this), m_bus(nullptr)
41	43	{
42	44	}
43	45

trunk/src/devices/bus/s100/wunderbus.cpp

r250251	r250252
245	245	m_ace3(*this, INS8250_3_TAG),
246	246	m_rtc(*this, UPD1990C_TAG),
247	247	m_7c(*this, "7C"),
248		m_10a(*this, "10A")
	248	m_10a(*this, "10A"), m_group(0), m_rtc_tp(0)
249	249	{
250	250	}
251	251

trunk/src/devices/bus/saturn/sat_slot.cpp

r250251	r250252
37	37	//-------------------------------------------------
38	38
39	39	device_sat_cart_interface::device_sat_cart_interface(const machine_config &mconfig, device_t &device)
40		: device_slot_card_interface(mconfig, device),
	40	: device_slot_card_interface(mconfig, device), m_cart_type(0),
41	41	m_rom(NULL),
42	42	m_rom_size(0)
43	43	{
r250251	r250252
104	104	sat_cart_slot_device::sat_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
105	105	device_t(mconfig, SATURN_CART_SLOT, "Saturn Cartridge Slot", tag, owner, clock, "sat_cart_slot", __FILE__),
106	106	device_image_interface(mconfig, *this),
107		device_slot_interface(mconfig, *this)
	107	device_slot_interface(mconfig, *this), m_cart(nullptr)
108	108	{
109	109	}
110	110

trunk/src/devices/bus/scsi/scsi.cpp

r250251	r250252
21	21	m_data4_handler(*this),
22	22	m_data5_handler(*this),
23	23	m_data6_handler(*this),
24		m_data7_handler(*this),
	24	m_data7_handler(*this),
	25	m_device_count(0),
25	26	m_bsy_in(0),
26	27	m_sel_in(0),
27	28	m_cd_in(0),
28	29	m_io_in(0),
29	30	m_msg_in(0),
30	31	m_req_in(0),
31		m_ack_in(0),
	32	m_ack_in(0),
	33	m_atn_in(0),
32	34	m_rst_in(0),
33	35	m_data0_in(0),
34	36	m_data1_in(0),
r250251	r250252
44	46	m_io_out(0),
45	47	m_msg_out(0),
46	48	m_req_out(0),
47		m_ack_out(0),
	49	m_ack_out(0),
	50	m_atn_out(0),
48	51	m_rst_out(0),
49	52	m_data0_out(0),
50	53	m_data1_out(0),

trunk/src/devices/bus/scsi/scsihle.cpp

r250251	r250252
13	13	scsihle_device::scsihle_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
14	14	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
15	15	scsi_port_interface(mconfig, *this),
16		m_scsi_id(*this, "SCSI_ID"),
	16	m_scsi_id(*this, "SCSI_ID"),
	17	req_timer(NULL),
	18	sel_timer(NULL),
	19	dataout_timer(NULL),
	20	cmd_idx(0),
	21	is_linked(0),
	22	data_idx(0),
	23	bytes_left(0),
	24	data_last(0),
	25	scsiID(0),
17	26	m_input_data(0)
18	27	{
19	28	}

trunk/src/devices/bus/scv/rom.cpp

r250251	r250252
49	49	}
50	50
51	51	scv_rom32ram8_device::scv_rom32ram8_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
52		: scv_rom8_device(mconfig, SCV_ROM32K_RAM8K, "SCV 32K + RAM 8K Carts", tag, owner, clock, "scv_rom32_ram8", __FILE__)
53		{
	52	: scv_rom8_device(mconfig, SCV_ROM32K_RAM8K, "SCV 32K + RAM 8K Carts", tag, owner, clock, "scv_rom32_ram8", __FILE__), m_ram_enabled(0)
	53	{
54	54	}
55	55
56	56	scv_rom64_device::scv_rom64_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
57		: scv_rom8_device(mconfig, SCV_ROM16K, "SCV 64K Carts", tag, owner, clock, "scv_rom64", __FILE__)
58		{
	57	: scv_rom8_device(mconfig, SCV_ROM16K, "SCV 64K Carts", tag, owner, clock, "scv_rom64", __FILE__), m_bank_base(0)
	58	{
59	59	}
60	60
61	61	scv_rom128_device::scv_rom128_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
62		: scv_rom8_device(mconfig, SCV_ROM32K, "SCV 128K Carts", tag, owner, clock, "scv_rom128", __FILE__)
63		{
	62	: scv_rom8_device(mconfig, SCV_ROM32K, "SCV 128K Carts", tag, owner, clock, "scv_rom128", __FILE__), m_bank_base(0)
	63	{
64	64	}
65	65
66	66	scv_rom128ram4_device::scv_rom128ram4_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
67		: scv_rom8_device(mconfig, SCV_ROM128K_RAM4K, "SCV 128K + RAM 4K Carts", tag, owner, clock, "scv_rom128_ram4", __FILE__)
68		{
	67	: scv_rom8_device(mconfig, SCV_ROM128K_RAM4K, "SCV 128K + RAM 4K Carts", tag, owner, clock, "scv_rom128_ram4", __FILE__), m_bank_base(0), m_ram_enabled(0)
	68	{
69	69	}
70	70
71	71

trunk/src/devices/bus/scv/slot.cpp

r250251	r250252
76	76	device_t(mconfig, SCV_CART_SLOT, "SCV Cartridge Slot", tag, owner, clock, "scv_cart_slot", __FILE__),
77	77	device_image_interface(mconfig, *this),
78	78	device_slot_interface(mconfig, *this),
79		m_type(SCV_8K)
	79	m_type(SCV_8K), m_cart(nullptr)
80	80	{
81	81	}
82	82

trunk/src/devices/bus/sega8/rom.cpp

r250251	r250252
45	45
46	46	sega8_rom_device::sega8_rom_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
47	47	: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
48		device_sega8_cart_interface( mconfig, *this )
49		{
	48	device_sega8_cart_interface( mconfig, *this ), m_ram_base(0), m_ram_enabled(0)
	49	{
50	50	}
51	51
52	52	sega8_rom_device::sega8_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
53	53	: device_t(mconfig, SEGA8_ROM_STD, "Mark III, SMS & GG Carts", tag, owner, clock, "sega8_rom", __FILE__),
54		device_sega8_cart_interface( mconfig, *this )
55		{
	54	device_sega8_cart_interface( mconfig, *this ), m_ram_base(0), m_ram_enabled(0)
	55	{
56	56	}
57	57
58	58
r250251	r250252
86	86	: sega8_rom_device(mconfig, SEGA8_ROM_TEREBI, "SG-1000 Terebi Oekaki Cart", tag, owner, clock, "sega8_terebi", __FILE__),
87	87	m_tvdraw_x(*this, "TVDRAW_X"),
88	88	m_tvdraw_y(*this, "TVDRAW_Y"),
89		m_tvdraw_pen(*this, "TVDRAW_PEN")
90		{
	89	m_tvdraw_pen(*this, "TVDRAW_PEN"), m_tvdraw_data(0)
	90	{
91	91	}
92	92
93	93
r250251	r250252
108	108	sega8_eeprom_device::sega8_eeprom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
109	109	: device_t(mconfig, SEGA8_ROM_EEPROM, "GG Carts + EEPROM", tag, owner, clock, "sega8_eeprom", __FILE__),
110	110	device_sega8_cart_interface( mconfig, *this ),
111		m_eeprom(*this, "eeprom")
112		{
	111	m_eeprom(*this, "eeprom"), m_93c46_enabled(0), m_93c46_lines(0)
	112	{
113	113	}
114	114
115	115
116	116	sega8_codemasters_device::sega8_codemasters_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
117	117	: device_t(mconfig, SEGA8_ROM_CODEMASTERS, "Mark III, SMS & GG Codemasters Carts", tag, owner, clock, "sega8_codemasters", __FILE__),
118		device_sega8_cart_interface( mconfig, *this )
119		{
	118	device_sega8_cart_interface( mconfig, *this ), m_ram_base(0), m_ram_enabled(0)
	119	{
120	120	}
121	121
122	122
r250251	r250252
128	128
129	129	sega8_zemina_device::sega8_zemina_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
130	130	: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
131		device_sega8_cart_interface( mconfig, *this )
132		{
	131	device_sega8_cart_interface( mconfig, *this ), m_ram_base(0), m_ram_enabled(0)
	132	{
133	133	}
134	134
135	135	sega8_zemina_device::sega8_zemina_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
136	136	: device_t(mconfig, SEGA8_ROM_ZEMINA, "SMS Zemina Carts", tag, owner, clock, "sega8_zemina", __FILE__),
137		device_sega8_cart_interface( mconfig, *this )
138		{
	137	device_sega8_cart_interface( mconfig, *this ), m_ram_base(0), m_ram_enabled(0)
	138	{
139	139	}
140	140
141	141
r250251	r250252
153	153
154	154
155	155	sega8_hicom_device::sega8_hicom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
156		: sega8_rom_device(mconfig, SEGA8_ROM_HICOM, "SMS Hi-Com Carts", tag, owner, clock, "sega8_hicom", __FILE__)
157		{
	156	: sega8_rom_device(mconfig, SEGA8_ROM_HICOM, "SMS Hi-Com Carts", tag, owner, clock, "sega8_hicom", __FILE__), m_rom_bank_base(0)
	157	{
158	158	}
159	159
160	160

trunk/src/devices/bus/sega8/sega8_slot.cpp

r250251	r250252
114	114	m_type(SEGA8_BASE_ROM),
115	115	m_must_be_loaded(FALSE),
116	116	m_interface("sms_cart"),
117		m_extensions("bin")
	117	m_extensions("bin"), m_cart(nullptr)
118	118	{
119	119	m_is_card = is_card;
120	120	}
r250251	r250252
127	127	m_must_be_loaded(FALSE),
128	128	m_is_card(FALSE),
129	129	m_interface("sms_cart"),
130		m_extensions("bin")
	130	m_extensions("bin"), m_cart(nullptr)
131	131	{
132	132	}
133	133

trunk/src/devices/bus/sms_ctrl/lphaser.cpp

r250251	r250252
74	74	device_sms_control_port_interface(mconfig, *this),
75	75	m_lphaser_pins(*this, "CTRL_PORT"),
76	76	m_lphaser_x(*this, "LPHASER_X"),
77		m_lphaser_y(*this, "LPHASER_Y")
	77	m_lphaser_y(*this, "LPHASER_Y"), m_sensor_last_state(0), m_lphaser_timer(nullptr)
78	78	{
79	79	// Workaround for failed validation that occurs when running on a driver
80	80	// with Sega Scope emulation, which adds 2 screens (left/right lenses).

trunk/src/devices/bus/sms_ctrl/smsctrl.cpp

r250251	r250252
62	62
63	63	sms_control_port_device::sms_control_port_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
64	64	device_t(mconfig, SMS_CONTROL_PORT, "Sega SMS control port", tag, owner, clock, "sms_control_port", __FILE__),
65		device_slot_interface(mconfig, *this),
	65	device_slot_interface(mconfig, *this), m_device(nullptr),
66	66	m_th_pin_handler(*this),
67	67	m_pixel_handler(*this)
68	68	{

trunk/src/devices/bus/sms_ctrl/sports.cpp

r250251	r250252
154	154	m_last_data(0),
155	155	m_x_axis_reset_value(0x80), // value 0x80 helps when start playing paddle games.
156	156	m_y_axis_reset_value(0x80),
157		m_interval(SPORTS_PAD_INTERVAL)
	157	m_interval(SPORTS_PAD_INTERVAL), m_sportspad_timer(nullptr)
158	158	{
159	159	}
160	160

trunk/src/devices/bus/sms_exp/smsexp.cpp

r250251	r250252
52	52
53	53	sms_expansion_slot_device::sms_expansion_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
54	54	device_t(mconfig, SMS_EXPANSION_SLOT, "Sega SMS expansion slot", tag, owner, clock, "sms_expansion_slot", __FILE__),
55		device_slot_interface(mconfig, *this)
	55	device_slot_interface(mconfig, *this), m_device(nullptr)
56	56	{
57	57	}
58	58

trunk/src/devices/bus/snes/bsx.cpp

r250251	r250252
25	25
26	26
27	27	sns_rom_bsx_device::sns_rom_bsx_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
28		: sns_rom_device(mconfig, type, name, tag, owner, clock, shortname, source),
29		m_slot(*this, "bs_slot")
	28	: sns_rom_device(mconfig, type, name, tag, owner, clock, shortname, source),
	29	m_base_unit(nullptr),
	30	access_00_1f(0),
	31	access_80_9f(0),
	32	access_40_4f(0),
	33	access_50_5f(0),
	34	access_60_6f(0),
	35	rom_access(0),
	36	m_slot(*this, "bs_slot")
30	37	{
31	38	}
32	39
33	40	sns_rom_bsx_device::sns_rom_bsx_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
34	41	: sns_rom_device(mconfig, SNS_ROM_BSX, "SNES BS-X Cart", tag, owner, clock, "sns_rom_bsx", __FILE__),
	42	m_base_unit(nullptr),
	43	access_00_1f(0),
	44	access_80_9f(0),
	45	access_40_4f(0),
	46	access_50_5f(0),
	47	access_60_6f(0),
	48	rom_access(0),
35	49	m_slot(*this, "bs_slot")
36	50	{
37	51	}
r250251	r250252
49	63	}
50	64
51	65	sns_rom_bsmempak_device::sns_rom_bsmempak_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
52		: sns_rom_device(mconfig, SNS_BSMEMPAK, "SNES BS-X Memory packs", tag, owner, clock, "sns_bsmempak", __FILE__)
53		{
	66	: sns_rom_device(mconfig, SNS_BSMEMPAK, "SNES BS-X Memory packs", tag, owner, clock, "sns_bsmempak", __FILE__), m_command(0), m_write_old(0), m_write_new(0), m_flash_enable(0), m_read_enable(0), m_write_enable(0)
	67	{
54	68	}
55	69
56	70
r250251	r250252
113	127	// BS-X Base Unit emulation, to be device-fied ?
114	128
115	129	BSX_base::BSX_base(running_machine &machine)
116		: m_machine(machine)
	130	: r2192_minute(0), m_machine(machine)
117	131	{
118	132	m_machine.save().save_item(regs, "SNES_BSX/regs");
119	133	m_machine.save().save_item(r2192_counter, "SNES_BSX/r2192_counter");

trunk/src/devices/bus/snes/event.cpp

r250251	r250252
21	21
22	22
23	23	sns_pfest94_device::sns_pfest94_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
24		: device_t(mconfig, SNS_PFEST94, "SNES Powerfest '94", tag, owner, clock, "sns_pfest94", __FILE__),
25		device_sns_cart_interface( mconfig, *this ),
26		m_upd7725(*this, "dsp"),
27		m_dsw(*this, "DIPSW")
	24	: device_t(mconfig, SNS_PFEST94, "SNES Powerfest '94", tag, owner, clock, "sns_pfest94", __FILE__),
	25	device_sns_cart_interface(mconfig, *this),
	26	m_upd7725(*this, "dsp"),
	27	m_dsw(*this, "DIPSW"),
	28	m_base_bank(0),
	29	m_mask(0),
	30	m_status(0),
	31	m_count(0),
	32	pfest94_timer(nullptr)
28	33	{
29	34	}
30	35

trunk/src/devices/bus/snes/rom.cpp

r250251	r250252
42	42	}
43	43
44	44	sns_rom_obc1_device::sns_rom_obc1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
45		: sns_rom_device(mconfig, SNS_LOROM_OBC1, "SNES Cart (LoROM) + OBC-1", tag, owner, clock, "sns_rom_obc1", __FILE__)
46		{
	45	: sns_rom_device(mconfig, SNS_LOROM_OBC1, "SNES Cart (LoROM) + OBC-1", tag, owner, clock, "sns_rom_obc1", __FILE__), m_address(0), m_offset(0), m_shift(0)
	46	{
47	47	}
48	48
49	49
50	50
51	51	// Pirate LoROM 'mappers'
52	52	sns_rom_pokemon_device::sns_rom_pokemon_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
53		: sns_rom_device(mconfig, SNS_LOROM_POKEMON, "SNES Pirate Carts with Protection", tag, owner, clock, "sns_rom_pokemon", __FILE__)
54		{
	53	: sns_rom_device(mconfig, SNS_LOROM_POKEMON, "SNES Pirate Carts with Protection", tag, owner, clock, "sns_rom_pokemon", __FILE__), m_latch(0)
	54	{
55	55	}
56	56
57	57	sns_rom_tekken2_device::sns_rom_tekken2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
58		: sns_rom_device(mconfig, SNS_LOROM_TEKKEN2, "SNES Tekken 2", tag, owner, clock, "sns_rom_tekken2", __FILE__)
59		{
	58	: sns_rom_device(mconfig, SNS_LOROM_TEKKEN2, "SNES Tekken 2", tag, owner, clock, "sns_rom_tekken2", __FILE__), m_prot(0)
	59	{
60	60	}
61	61
62	62	sns_rom_soulblad_device::sns_rom_soulblad_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
r250251	r250252
76	76
77	77	// Multigame LoROM 'mappers'
78	78	sns_rom_mcpirate1_device::sns_rom_mcpirate1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
79		: sns_rom_device(mconfig, SNS_LOROM_MCPIR1, "SNES Pirate Multigame Carts Type 1", tag, owner, clock, "sns_rom_mcpirate1", __FILE__)
80		{
	79	: sns_rom_device(mconfig, SNS_LOROM_MCPIR1, "SNES Pirate Multigame Carts Type 1", tag, owner, clock, "sns_rom_mcpirate1", __FILE__), m_base_bank(0)
	80	{
81	81	}
82	82
83	83	sns_rom_mcpirate2_device::sns_rom_mcpirate2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
84		: sns_rom_device(mconfig, SNS_LOROM_MCPIR2, "SNES Pirate Multigame Carts Type 2", tag, owner, clock, "sns_rom_mcpirate2", __FILE__)
85		{
	84	: sns_rom_device(mconfig, SNS_LOROM_MCPIR2, "SNES Pirate Multigame Carts Type 2", tag, owner, clock, "sns_rom_mcpirate2", __FILE__), m_base_bank(0)
	85	{
86	86	}
87	87
88	88	sns_rom_20col_device::sns_rom_20col_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
89		: sns_rom_device(mconfig, SNS_LOROM_20COL, "SNES Super 20 Collection", tag, owner, clock, "sns_rom_20col", __FILE__)
90		{
	89	: sns_rom_device(mconfig, SNS_LOROM_20COL, "SNES Super 20 Collection", tag, owner, clock, "sns_rom_20col", __FILE__), m_base_bank(0)
	90	{
91	91	}
92	92
93	93

trunk/src/devices/bus/snes/rom21.cpp

r250251	r250252
32	32	}
33	33
34	34	sns_rom21_srtc_device::sns_rom21_srtc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
35		: sns_rom21_device(mconfig, SNS_HIROM_SRTC, "SNES Cart (HiROM) + S-RTC", tag, owner, clock, "sns_rom21_srtc", __FILE__)
36		{
	35	: sns_rom21_device(mconfig, SNS_HIROM_SRTC, "SNES Cart (HiROM) + S-RTC", tag, owner, clock, "sns_rom21_srtc", __FILE__), m_mode(0), m_index(0)
	36	{
37	37	}
38	38
39	39

trunk/src/devices/bus/snes/sa1.cpp

r250251	r250252
88	88	sns_sa1_device::sns_sa1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
89	89	: device_t(mconfig, SNS_LOROM_SA1, "SNES Cart + SA-1", tag, owner, clock, "sns_rom_sa1", __FILE__),
90	90	device_sns_cart_interface( mconfig, *this ),
91		m_sa1(*this, "sa1cpu")
92		{
	91	m_sa1(*this, "sa1cpu"), m_sa1_ctrl(0), m_scpu_sie(0), m_sa1_reset(0), m_sa1_nmi(0), m_sa1_irq(0), m_scpu_ctrl(0), m_sa1_sie(0), m_irq_vector(0), m_nmi_vector(0), m_hcount(0), m_vcount(0), m_bank_c_hi(0), m_bank_c_rom(0), m_bank_d_hi(0), m_bank_d_rom(0), m_bank_e_hi(0), m_bank_e_rom(0), m_bank_f_hi(0), m_bank_f_rom(0), m_bwram_snes(0), m_bwram_sa1(0), m_bwram_sa1_source(0), m_bwram_sa1_format(0), m_bwram_write_snes(0), m_bwram_write_sa1(0), m_bwpa_sa1(0), m_iram_write_snes(0), m_iram_write_sa1(0), m_dma_ctrl(0), m_dma_ccparam(0), m_src_addr(0), m_dst_addr(0), m_dma_cnt(0), m_math_ctlr(0), m_math_overflow(0), m_math_a(0), m_math_b(0), m_math_res(0), m_vda(0), m_vbit(0), m_vlen(0), m_drm(0), m_scpu_flags(0), m_sa1_flags(0), m_hcr(0), m_vcr(0)
	92	{
93	93	}
94	94
95	95

trunk/src/devices/bus/snes/sdd1.cpp

r250251	r250252
413	413
414	414	sns_rom_sdd1_device::sns_rom_sdd1_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
415	415	: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
416		device_sns_cart_interface( mconfig, *this )
417		{
	416	device_sns_cart_interface( mconfig, *this ), m_sdd1_enable(0), m_xfer_enable(0), m_sdd1emu(nullptr)
	417	{
418	418	}
419	419
420	420	sns_rom_sdd1_device::sns_rom_sdd1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
421	421	: device_t(mconfig, SNS_LOROM_SDD1, "SNES Cart + S-DD1", tag, owner, clock, "sns_rom_sdd1", __FILE__),
422		device_sns_cart_interface( mconfig, *this )
423		{
	422	device_sns_cart_interface( mconfig, *this ), m_sdd1_enable(0), m_xfer_enable(0), m_sdd1emu(nullptr)
	423	{
424	424	}
425	425
426	426

trunk/src/devices/bus/snes/sdd1.h

r250251	r250252
10	10	class SDD1_IM //Input Manager
11	11	{
12	12	public:
13		SDD1_IM() {}
	13	SDD1_IM():
	14	m_byte_ptr(0),
	15	m_bit_count(0)
	16	{ }
14	17
15	18	UINT32 m_byte_ptr;
16	19	UINT8 m_bit_count;
r250251	r250252
34	37	{
35	38	public:
36	39	SDD1_BG(SDD1_GCD* associatedGCD, UINT8 code)
37		: m_code_num(code),
38		m_GCD(associatedGCD) { }
	40	: m_code_num(code),
	41	m_MPScount(0),
	42	m_LPSind(0),
	43	m_GCD(associatedGCD)
	44	{
	45	}
39	46
40	47	UINT8 m_code_num;
41	48	UINT8 m_MPScount;
r250251	r250252
83	90	{
84	91	public:
85	92	SDD1_CM(SDD1_PEM* associatedPEM)
86		: m_PEM(associatedPEM) { }
	93	: m_bitplanesInfo(0), m_contextBitsInfo(0), m_bit_number(0), m_currBitplane(0), m_PEM(associatedPEM) { }
87	94
88	95	UINT8 m_bitplanesInfo;
89	96	UINT8 m_contextBitsInfo;
r250251	r250252
101	108	{
102	109	public:
103	110	SDD1_OL(SDD1_CM* associatedCM)
104		: m_CM(associatedCM) { }
	111	: m_bitplanesInfo(0), m_length(0), m_buffer(nullptr), m_CM(associatedCM) { }
105	112
106	113	UINT8 m_bitplanesInfo;
107	114	UINT16 m_length;

trunk/src/devices/bus/snes/sgb.cpp

r250251	r250252
22	22	const device_type SNS_LOROM_SUPERGB = &device_creator<sns_rom_sgb_device>;
23	23
24	24
25		sns_rom_sgb_device::sns_rom_sgb_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
26		: sns_rom_device(mconfig, SNS_LOROM_SUPERGB, "SNES Super Game Boy Cart", tag, owner, clock, "sns_rom_sgb", __FILE__),
27		m_gb_cpu(*this, "sgb_cpu"),
28		m_gb_snd(*this, "sgb_snd"),
29		m_gb_lcd(*this, "sgb_lcd"),
30		m_cartslot(*this, "gb_slot")
	25	sns_rom_sgb_device::sns_rom_sgb_device(const machine_config& mconfig, const char* tag, device_t* owner, UINT32 clock) :
	26	sns_rom_device(mconfig, SNS_LOROM_SUPERGB, "SNES Super Game Boy Cart", tag, owner, clock, "sns_rom_sgb", __FILE__),
	27	m_gb_cpu(*this, "sgb_cpu"),
	28	m_gb_snd(*this, "sgb_snd"),
	29	m_gb_lcd(*this, "sgb_lcd"),
	30	m_cartslot(*this, "gb_slot"),
	31	m_sgb_ly(0),
	32	m_sgb_row(0),
	33	m_vram(0),
	34	m_port(0),
	35	m_joy1(0),
	36	m_joy2(0),
	37	m_joy3(0),
	38	m_joy4(0),
	39	m_vram_offs(0),
	40	m_mlt_req(0),
	41	m_lcd_row(0),
	42	m_packetsize(0)
31	43	{
32	44	}
33	45

trunk/src/devices/bus/snes/snes_slot.cpp

r250251	r250252
177	177	device_image_interface(mconfig, *this),
178	178	device_slot_interface(mconfig, *this),
179	179	m_addon(ADDON_NONE),
180		m_type(SNES_MODE20)
	180	m_type(SNES_MODE20), m_cart(nullptr)
181	181	{
182	182	}
183	183

trunk/src/devices/bus/snes/spc7110.cpp

r250251	r250252
25	25
26	26
27	27	sns_rom_spc7110_device::sns_rom_spc7110_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
28		: sns_rom21_device(mconfig, type, name, tag, owner, clock, shortname, source)
29		{
	28	: sns_rom21_device(mconfig, type, name, tag, owner, clock, shortname, source), m_r4801(0), m_r4802(0), m_r4803(0), m_r4804(0), m_r4805(0), m_r4806(0), m_r4807(0),
	29	m_r4808(0), m_r4809(0), m_r480a(0), m_r480b(0), m_r480c(0), m_decomp(nullptr), m_r4811(0), m_r4812(0), m_r4813(0), m_r4814(0), m_r4815(0), m_r4816(0), m_r4817(0), m_r4818(0),
	30	m_r481x(0), m_r4814_latch(0), m_r4815_latch(0), m_r4820(0), m_r4821(0), m_r4822(0), m_r4823(0), m_r4824(0), m_r4825(0), m_r4826(0), m_r4827(0), m_r4828(0), m_r4829(0), m_r482a(0),
	31	m_r482b(0), m_r482c(0), m_r482d(0), m_r482e(0), m_r482f(0), m_r4830(0), m_r4831(0), m_r4832(0), m_r4833(0), m_r4834(0), m_dx_offset(0), m_ex_offset(0), m_fx_offset(0), m_r4840(0),
	32	m_r4841(0), m_r4842(0), m_rtc_state(0), m_rtc_mode(0), m_rtc_index(0), m_rtc_offset(0)
	33	{
30	34	}
31	35
32	36	sns_rom_spc7110_device::sns_rom_spc7110_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
33		: sns_rom21_device(mconfig, SNS_HIROM_SPC7110, "SNES Cart + SPC-7110", tag, owner, clock, "sns_rom_spc7110", __FILE__)
	37	: sns_rom21_device(mconfig, SNS_HIROM_SPC7110, "SNES Cart + SPC-7110", tag, owner, clock, "sns_rom_spc7110", __FILE__), m_r4801(0), m_r4802(0), m_r4803(0), m_r4804(0), m_r4805(0), m_r4806(0), m_r4807(0),
	38	m_r4808(0), m_r4809(0), m_r480a(0), m_r480b(0), m_r480c(0), m_decomp(nullptr), m_r4811(0), m_r4812(0), m_r4813(0), m_r4814(0), m_r4815(0), m_r4816(0), m_r4817(0), m_r4818(0),
	39	m_r481x(0), m_r4814_latch(0), m_r4815_latch(0), m_r4820(0), m_r4821(0), m_r4822(0), m_r4823(0), m_r4824(0), m_r4825(0), m_r4826(0), m_r4827(0), m_r4828(0), m_r4829(0), m_r482a(0),
	40	m_r482b(0), m_r482c(0), m_r482d(0), m_r482e(0), m_r482f(0), m_r4830(0), m_r4831(0), m_r4832(0), m_r4833(0), m_r4834(0), m_dx_offset(0), m_ex_offset(0), m_fx_offset(0), m_r4840(0),
	41	m_r4841(0), m_r4842(0), m_rtc_state(0), m_rtc_mode(0), m_rtc_index(0), m_rtc_offset(0)
34	42	{
35	43	}
36	44

trunk/src/devices/bus/snes_ctrl/bcbattle.cpp

r250251	r250252
84	84	snes_bcbattle_device::snes_bcbattle_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
85	85	device_t(mconfig, SNES_BARCODE_BATTLER, "Epoch Barcode Battler (SFC)", tag, owner, clock, "snes_bcbattle", __FILE__),
86	86	device_snes_control_port_interface(mconfig, *this),
87		m_reader(*this, "battler")
	87	m_reader(*this, "battler"), m_pending_code(0), m_new_code(0), m_transmitting(0), m_cur_bit(0), m_cur_byte(0), battler_timer(nullptr), m_strobe(0), m_idx(0)
88	88	{
89	89	}
90	90

trunk/src/devices/bus/snes_ctrl/ctrl.cpp

r250251	r250252
59	59
60	60	snes_control_port_device::snes_control_port_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
61	61	device_t(mconfig, SNES_CONTROL_PORT, "Nintendo SNES / SFC control port", tag, owner, clock, "snes_control_port", __FILE__),
62		device_slot_interface(mconfig, *this)
	62	device_slot_interface(mconfig, *this), m_device(nullptr)
63	63	{
64	64	}
65	65

trunk/src/devices/bus/snes_ctrl/joypad.cpp

r250251	r250252
55	55	snes_joypad_device::snes_joypad_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
56	56	device_t(mconfig, SNES_JOYPAD, "Nintendo SNES / SFC Control Pad", tag, owner, clock, "snes_joypad", __FILE__),
57	57	device_snes_control_port_interface(mconfig, *this),
58		m_joypad(*this, "JOYPAD")
	58	m_joypad(*this, "JOYPAD"), m_strobe(0), m_latch(0)
59	59	{
60	60	}
61	61

trunk/src/devices/bus/snes_ctrl/miracle.cpp

r250251	r250252
64	64	device_serial_interface(mconfig, *this),
65	65	device_snes_control_port_interface(mconfig, *this),
66	66	m_midiin(*this, "mdin"),
67		m_midiout(*this, "mdout")
	67	m_midiout(*this, "mdout"), strobe_timer(nullptr), m_strobe_on(0), m_midi_mode(0), m_sent_bits(0), m_strobe_clock(0),
	68	m_data_sent(0), m_xmit_read(0), m_xmit_write(0), m_recv_read(0), m_recv_write(0), m_tx_busy(false), m_read_status(false), m_status_bit(false)
68	69	{
69	70	}
70	71

trunk/src/devices/bus/snes_ctrl/mouse.cpp

r250251	r250252
63	63	device_snes_control_port_interface(mconfig, *this),
64	64	m_buttons(*this, "BUTTONS"),
65	65	m_xaxis(*this, "MOUSE_X"),
66		m_yaxis(*this, "MOUSE_Y")
	66	m_yaxis(*this, "MOUSE_Y"), m_strobe(0), m_idx(0), m_latch(0), m_x(0), m_y(0), m_oldx(0), m_oldy(0), m_deltax(0),
	67	m_deltay(0), m_speed(0), m_dirx(0), m_diry(0)
67	68	{
68	69	}
69	70

trunk/src/devices/bus/snes_ctrl/multitap.cpp

r250251	r250252
74	74	m_port2(*this, "port2"),
75	75	m_port3(*this, "port3"),
76	76	m_port4(*this, "port4"),
77		m_cfg(*this, "CONFIG")
	77	m_cfg(*this, "CONFIG"), m_select(0)
78	78	{
79	79	}
80	80

trunk/src/devices/bus/snes_ctrl/pachinko.cpp

r250251	r250252
48	48	device_t(mconfig, SNES_PACHINKO, "Sunsoft Pachinko Controller", tag, owner, clock, "snes_pachinko", __FILE__),
49	49	device_snes_control_port_interface(mconfig, *this),
50	50	m_dial(*this, "DIAL"),
51		m_button(*this, "BUTTON")
	51	m_button(*this, "BUTTON"), m_strobe(0), m_latch(0)
52	52	{
53	53	}
54	54

trunk/src/devices/bus/snes_ctrl/sscope.cpp

r250251	r250252
58	58	device_snes_control_port_interface(mconfig, *this),
59	59	m_buttons(*this, "BUTTONS"),
60	60	m_xaxis(*this, "SSX"),
61		m_yaxis(*this, "SSY")
	61	m_yaxis(*this, "SSY"), m_strobe(0), m_idx(0), m_latch(0), m_x(0), m_y(0), m_turbo_lock(0), m_pause_lock(0), m_fire_lock(0)
62	62	{
63	63	}
64	64

trunk/src/devices/bus/snes_ctrl/twintap.cpp

r250251	r250252
52	52	snes_twintap_device::snes_twintap_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
53	53	device_t(mconfig, SNES_TWINTAP, "Yonezawa Twin Tap Controller", tag, owner, clock, "snes_twintap", __FILE__),
54	54	device_snes_control_port_interface(mconfig, *this),
55		m_inputs(*this, "INPUTS")
	55	m_inputs(*this, "INPUTS"), m_strobe(0), m_latch(0)
56	56	{
57	57	}
58	58

trunk/src/devices/bus/spc1000/exp.cpp

r250251	r250252
37	37	//-------------------------------------------------
38	38	spc1000_exp_device::spc1000_exp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
39	39	device_t(mconfig, SPC1000_EXP_SLOT, "Samsung SPC-1000 expansion", tag, owner, clock, "spc1000_exp", __FILE__),
40		device_slot_interface(mconfig, *this)
	40	device_slot_interface(mconfig, *this), m_card(nullptr)
41	41	{
42	42	}
43	43

trunk/src/devices/bus/spc1000/fdd.cpp

r250251	r250252
139	139	device_spc1000_card_interface(mconfig, *this),
140	140	m_cpu(*this, "fdccpu"),
141	141	m_fdc(*this, "upd765"),
142		m_pio(*this, "d8255_master")
143		{
	142	m_pio(*this, "d8255_master"), m_fd0(nullptr), m_fd1(nullptr), m_timer_tc(nullptr), m_i8255_0_pc(0), m_i8255_1_pc(0), m_i8255_portb(0)
	143	{
144	144	}
145	145
146	146

trunk/src/devices/bus/ti99_peb/bwg.cpp

r250251	r250252
85	85	*/
86	86
87	87	snug_bwg_device::snug_bwg_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
88		: ti_expansion_card_device(mconfig, TI99_BWG, "SNUG BwG Floppy Controller", tag, owner, clock, "ti99_bwg", __FILE__),
	88	: ti_expansion_card_device(mconfig, TI99_BWG, "SNUG BwG Floppy Controller", tag, owner, clock, "ti99_bwg", __FILE__), m_DRQ(), m_IRQ(), m_dip1(0), m_dip2(0), m_dip34(0), m_ram_page(0), m_rom_page(0), m_WAITena(false), m_inDsrArea(false), m_WDsel(false), m_WDsel0(false), m_RTCsel(false), m_lastK(false), m_dataregLB(false), m_rtc_enabled(false), m_MOTOR_ON(), m_lastval(0), m_address(0), m_DSEL(0), m_SIDSEL(), m_motor_on_timer(nullptr), m_dsrrom(nullptr), m_buffer_ram(nullptr), m_current_floppy(nullptr),
89	89	m_wd1773(*this, FDC_TAG),
90		m_clock(*this, CLOCK_TAG) { }
	90	m_clock(*this, CLOCK_TAG), m_debug_dataout(false)
	91	{ }
91	92
92	93	/*
93	94	Operate the wait state logic.

trunk/src/devices/bus/ti99_peb/evpc.cpp

r250251	r250252
26	26
27	27	snug_enhanced_video_device::snug_enhanced_video_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
28	28	: ti_expansion_card_device(mconfig, TI99_EVPC, "SNUG Enhanced Video Processor Card", tag, owner, clock, "ti99_evpc", __FILE__),
29		device_nvram_interface(mconfig, *this)
	29	device_nvram_interface(mconfig, *this),
	30	m_dsrrom(nullptr),
	31	m_RAMEN(false),
	32	m_dsr_page(0),
	33	m_novram(nullptr)
30	34	{
31	35	}
32	36

trunk/src/devices/bus/ti99_peb/hfdc.cpp

r250251	r250252
88	88	Constructor for the HFDC card.
89	89	*/
90	90	myarc_hfdc_device::myarc_hfdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
91		: ti_expansion_card_device(mconfig, TI99_HFDC, "Myarc Hard and Floppy Disk Controller", tag, owner, clock, "ti99_hfdc", __FILE__),
	91	: ti_expansion_card_device(mconfig, TI99_HFDC, "Myarc Hard and Floppy Disk Controller", tag, owner, clock, "ti99_hfdc", __FILE__), m_motor_on_timer(nullptr),
92	92	m_hdc9234(*this, FDC_TAG),
93		m_clock(*this, CLOCK_TAG)
	93	m_clock(*this, CLOCK_TAG), m_current_floppy(nullptr), m_current_harddisk(nullptr), m_see_switches(false), m_irq(), m_dip(), m_motor_running(false),
	94	m_inDsrArea(false), m_HDCsel(false), m_RTCsel(false), m_tapesel(false), m_RAMsel(false), m_ROMsel(false), m_address(0), m_dma_in_progress(false),
	95	m_wait_for_hd1(false), m_dsrrom(nullptr), m_rom_page(0), m_buffer_ram(nullptr), m_status_latch(0), m_dma_address(0), m_output1_latch(0), m_output2_latch(0), m_lastval(0), m_MOTOR_ON(), m_readyflags(0)
94	96	{
95	97	}
96	98

trunk/src/devices/bus/ti99_peb/horizon.cpp

r250251	r250252
67	67
68	68	horizon_ramdisk_device::horizon_ramdisk_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
69	69	: ti_expansion_card_device(mconfig, TI99_HORIZON, "Horizon 4000 Ramdisk", tag, owner, clock,"ti99_horizon",__FILE__),
70		device_nvram_interface(mconfig, *this)
	70	device_nvram_interface(mconfig, *this), m_ram(nullptr), m_nvram(nullptr), m_ros(nullptr), m_select6_value(0), m_select_all(0), m_page(0), m_cru_horizon(0), m_cru_phoenix(0), m_timode(false), m_32k_installed(false), m_split_mode(false), m_rambo_mode(false), m_killswitch(false), m_use_rambo(false)
71	71	{
72	72	}
73	73

trunk/src/devices/bus/ti99_peb/hsgpl.cpp

r250251	r250252
140	140	#define ROM6_EEPROM "u6_rom6"
141	141
142	142	snug_high_speed_gpl_device::snug_high_speed_gpl_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
143		: ti_expansion_card_device(mconfig, TI99_HSGPL, "SNUG High-speed GPL card", tag, owner, clock, "ti99_hsgpl", __FILE__)
	143	: ti_expansion_card_device(mconfig, TI99_HSGPL, "SNUG High-speed GPL card", tag, owner, clock, "ti99_hsgpl", __FILE__), m_dsr_eeprom(nullptr),
	144	m_rom6_eeprom(nullptr), m_grom_a_eeprom(nullptr), m_grom_b_eeprom(nullptr), m_ram6_memory(nullptr), m_gram_memory(nullptr), m_dsr_enabled(false),
	145	m_gram_enabled(false), m_bank_inhibit(false), m_dsr_page(0), m_card_enabled(false), m_write_enabled(false), m_supercart_enabled(false), m_led_on(false),
	146	m_mbx_enabled(false), m_ram_enabled(false), m_flash_mode(false), m_current_grom_port(0), m_current_bank(0), m_module_bank(0), m_waddr_LSB(false), m_raddr_LSB(false), m_grom_address(0)
144	147	{
145	148	}
146	149

trunk/src/devices/bus/ti99_peb/memex.cpp

r250251	r250252
33	33	};
34	34
35	35	geneve_memex_device::geneve_memex_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
36		: ti_expansion_card_device(mconfig, TI99_MEMEX, "Geneve memory expansion card", tag, owner, clock, "ti99_memex", __FILE__)
	36	: ti_expansion_card_device(mconfig, TI99_MEMEX, "Geneve memory expansion card", tag, owner, clock, "ti99_memex", __FILE__),
	37	m_ram(nullptr),
	38	m_genmod(0)
37	39	{
38	40	}
39	41

trunk/src/devices/bus/ti99_peb/myarcmem.cpp

r250251	r250252
45	45	};
46	46
47	47	myarc_memory_expansion_device::myarc_memory_expansion_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
48		: ti_expansion_card_device(mconfig, TI99_MYARCMEM, "Myarc Memory expansion card MEXP-1", tag, owner, clock, "ti99_myarcmem", __FILE__)
	48	: ti_expansion_card_device(mconfig, TI99_MYARCMEM, "Myarc Memory expansion card MEXP-1", tag, owner, clock, "ti99_myarcmem", __FILE__),
	49	m_ram(nullptr), m_dsrrom(nullptr), m_bank(0), m_size(0)
49	50	{
50	51	}
51	52

trunk/src/devices/bus/ti99_peb/pcode.cpp

r250251	r250252
96	96	#define VERBOSE 1
97	97
98	98	ti_pcode_card_device::ti_pcode_card_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
99		: ti_expansion_card_device(mconfig, TI99_P_CODE, "TI-99 P-Code Card", tag, owner, clock, "ti99_pcode", __FILE__)
	99	: ti_expansion_card_device(mconfig, TI99_P_CODE, "TI-99 P-Code Card", tag, owner, clock, "ti99_pcode", __FILE__), m_rom(nullptr), m_bank_select(0), m_switch(false)
100	100	{
101	101	}
102	102

trunk/src/devices/bus/ti99_peb/peribox.cpp

r250251	r250252
220	220	: bus8z_device(mconfig, PERIBOX, "Peripheral expansion box", tag, owner, clock, "peribox", __FILE__),
221	221	m_console_inta(*this),
222	222	m_console_intb(*this),
223		m_datamux_ready(*this)
	223	m_datamux_ready(*this), m_inta_flag(0), m_intb_flag(0), m_ready_flag(0)
224	224	{
225	225	for (int i=2; i <= 8; i++) m_slot[i] = NULL;
226	226	// The address prefix is actually created by the "Flex cable interface"
r250251	r250252
235	235	: bus8z_device(mconfig, type, name, tag, owner, clock, shortname, source),
236	236	m_console_inta(*this),
237	237	m_console_intb(*this),
238		m_datamux_ready(*this)
	238	m_datamux_ready(*this), m_inta_flag(0), m_intb_flag(0), m_ready_flag(0), m_address_prefix(0)
239	239	{
240	240	for (int i=2; i <= 8; i++) m_slot[i] = NULL;
241	241	}
r250251	r250252
614	614	}
615	615
616	616	peribox_slot_device::peribox_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
617		: bus8z_device(mconfig, PERIBOX_SLOT, "TI P-Box slot", tag, owner, clock, "peribox_slot", __FILE__), device_slot_interface(mconfig, *this)
	617	: bus8z_device(mconfig, PERIBOX_SLOT, "TI P-Box slot", tag, owner, clock, "peribox_slot", __FILE__), device_slot_interface(mconfig, *this), m_card(nullptr), m_slotnumber(0)
618	618	{
619	619	}
620	620

trunk/src/devices/bus/ti99_peb/peribox.h

r250251	r250252
193	193	public:
194	194	ti_expansion_card_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
195	195	: bus8z_device(mconfig, type, name, tag, owner, clock, shortname, source),
196		device_slot_card_interface(mconfig, *this)
197		{
	196	device_slot_card_interface(mconfig, *this), m_selected(false), m_cru_base(0), m_select_mask(0), m_select_value(0)
	197	{
198	198	m_slot = static_cast<peribox_slot_device*>(owner);
199	199	m_senila = CLEAR_LINE;
200	200	m_senilb = CLEAR_LINE;

trunk/src/devices/bus/ti99_peb/samsmem.cpp

r250251	r250252
26	26	#define LOG logerror
27	27
28	28	sams_memory_expansion_device::sams_memory_expansion_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
29		: ti_expansion_card_device(mconfig, TI99_SAMSMEM, "SuperAMS memory expansion card", tag, owner, clock, "ti99_sams", __FILE__)
	29	: ti_expansion_card_device(mconfig, TI99_SAMSMEM, "SuperAMS memory expansion card", tag, owner, clock, "ti99_sams", __FILE__), m_ram(nullptr), m_map_mode(false), m_access_mapper(false)
30	30	{
31	31	}
32	32

trunk/src/devices/bus/ti99_peb/spchsyn.cpp

r250251	r250252
33	33	/****************************************************************************/
34	34
35	35	ti_speech_synthesizer_device::ti_speech_synthesizer_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
36		: ti_expansion_card_device(mconfig, TI99_SPEECH, "TI-99 Speech synthesizer (on adapter card)", tag, owner, clock, "ti99_speech", __FILE__)
	36	: ti_expansion_card_device(mconfig, TI99_SPEECH, "TI-99 Speech synthesizer (on adapter card)", tag, owner, clock, "ti99_speech", __FILE__), m_vsp(nullptr), m_read_mode(false)
37	37	{
38	38	}
39	39

trunk/src/devices/bus/ti99_peb/ti_32kmem.cpp

r250251	r250252
32	32	#define RAMREGION "ram"
33	33
34	34	ti_32k_expcard_device::ti_32k_expcard_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
35		: ti_expansion_card_device(mconfig, TI_32KMEM, "TI-99 32KiB memory expansion card", tag, owner, clock, "ti99_32k", __FILE__)
	35	: ti_expansion_card_device(mconfig, TI_32KMEM, "TI-99 32KiB memory expansion card", tag, owner, clock, "ti99_32k", __FILE__), m_ram_ptr(nullptr)
36	36	{
37	37	}
38	38

trunk/src/devices/bus/ti99_peb/ti_fdc.cpp

r250251	r250252
48	48	#define TI_FDC_TAG "ti_dssd_controller"
49	49
50	50	ti_fdc_device::ti_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
51		: ti_expansion_card_device(mconfig, TI99_FDC, "TI-99 Standard DSSD Floppy Controller", tag, owner, clock, "ti99_fdc", __FILE__),
52		m_fd1771(*this, FDC_TAG) { }
	51	: ti_expansion_card_device(mconfig, TI99_FDC, "TI-99 Standard DSSD Floppy Controller", tag, owner, clock, "ti99_fdc", __FILE__), m_address(0), m_DRQ(), m_IRQ(),
	52	m_lastval(0), m_DVENA(), m_inDsrArea(false), m_WAITena(false), m_WDsel(false), m_DSEL(0), m_SIDSEL(), m_motor_on_timer(nullptr),
	53	m_fd1771(*this, FDC_TAG), m_dsrrom(nullptr), m_current_floppy(nullptr), m_debug_dataout(false)
	54	{ }
53	55
54	56	/*
55	57	Operate the wait state logic.

trunk/src/devices/bus/ti99_peb/ti_rs232.cpp

r250251	r250252
117	117	#define ESC 0x1b
118	118
119	119	ti_rs232_pio_device::ti_rs232_pio_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
120		: ti_expansion_card_device(mconfig, TI99_RS232, "TI-99 RS232/PIO interface", tag, owner, clock, "ti99_rs232", __FILE__)
	120	: ti_expansion_card_device(mconfig, TI99_RS232, "TI-99 RS232/PIO interface", tag, owner, clock, "ti99_rs232", __FILE__), m_piodev(nullptr), m_dsrrom(nullptr), m_pio_direction_in(false), m_pio_handshakeout(false), m_pio_handshakein(false), m_pio_spareout(false), m_pio_sparein(false), m_flag0(false), m_led(false), m_pio_out_buffer(0), m_pio_in_buffer(0), m_pio_readable(false), m_pio_writable(false), m_pio_write(false), m_ila(0)
121	121	{
122	122	}
123	123

trunk/src/devices/bus/ti99_peb/tn_ide.cpp

r250251	r250252
50	50	};
51	51
52	52	nouspikel_ide_interface_device::nouspikel_ide_interface_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
53		: ti_expansion_card_device(mconfig, TI99_IDE, "Nouspikel IDE interface card", tag, owner, clock, "ti99_ide", __FILE__),
54		m_ata(*this, "ata")
	53	: ti_expansion_card_device(mconfig, TI99_IDE, "Nouspikel IDE interface card", tag, owner, clock, "ti99_ide", __FILE__), m_ata_irq(false),
	54	m_cru_register(0), m_rtc(nullptr),
	55	m_ata(*this, "ata"), m_clk_irq(false), m_sram_enable(false), m_sram_enable_dip(false), m_cur_page(0), m_tms9995_mode(false),
	56	m_input_latch(0), m_output_latch(0), m_ram(nullptr)
55	57	{
56	58	}
57	59

trunk/src/devices/bus/ti99_peb/tn_usbsm.cpp

r250251	r250252
52	52	};
53	53
54	54	nouspikel_usb_smartmedia_device::nouspikel_usb_smartmedia_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
55		: ti_expansion_card_device(mconfig, TI99_USBSM, "Nouspikel USB/Smartmedia card", tag, owner, clock, "ti99_usbsm", __FILE__),
	55	: ti_expansion_card_device(mconfig, TI99_USBSM, "Nouspikel USB/Smartmedia card", tag, owner, clock, "ti99_usbsm", __FILE__),
	56	m_feeprom_page(0), m_sram_page(0), m_cru_register(0), m_tms9995_mode(false), m_enable_io(false), m_enable_int(false), m_enable_sm(false),
	57	m_write_flash(false), m_input_latch(0), m_output_latch(0),
56	58	m_smartmedia(*this, "smartmedia"),
57	59	m_flash(*this, STRATA_TAG)
58	60	{

trunk/src/devices/bus/ti99x/990_dk.cpp

r250251	r250252
43	43	const device_type FD800 = &device_creator<fd800_legacy_device>;
44	44
45	45	fd800_legacy_device::fd800_legacy_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
46		: device_t(mconfig, FD800, "TI FD800 Diablo floppy disk controller", tag, owner, clock, "fd800", __FILE__),
47		m_int_line(*this)
	46	: device_t(mconfig, FD800, "TI FD800 Diablo floppy disk controller", tag, owner, clock, "fd800", __FILE__),
	47	m_recv_buf(0), m_stat_reg(0), m_xmit_buf(0), m_cmd_reg(0), m_interrupt_f_f(0),
	48	m_int_line(*this), m_buf_pos(0), m_buf_mode(), m_unit(0), m_sector(0)
48	49	{
49	50	}
50	51

trunk/src/devices/bus/ti99x/998board.cpp

r250251	r250252
205	205
206	206	mainboard8_device::mainboard8_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
207	207	: bus8z_device(mconfig, MAINBOARD8, "TI-99/8 Main board", tag, owner, clock, "ti998_mainboard", __FILE__),
208		m_ready(*this),
	208	m_ready(*this), m_dsr_selected(false), m_hexbus_selected(false), m_CRUS(false), m_PTGE(false), m_waitcount(0), m_sram(nullptr), m_dram(nullptr), m_rom0(nullptr), m_rom1(nullptr), m_pcode(nullptr),
209	209	m_oso(*this, OSO_TAG)
210	210	{ }
211	211
r250251	r250252
859	859	};
860	860
861	861	ti998_oso_device::ti998_oso_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
862		: device_t(mconfig, OSO, "OSO Hexbus interface", tag, owner, clock, "ti998_oso", __FILE__)
	862	: device_t(mconfig, OSO, "OSO Hexbus interface", tag, owner, clock, "ti998_oso", __FILE__), m_data(0), m_status(0), m_control(0), m_xmit(0)
863	863	{
864	864	}
865	865
r250251	r250252
948	948	#define REAL_TIMING 0
949	949
950	950	ti998_spsyn_device::ti998_spsyn_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
951		: bus8z_device(mconfig, SPEECH8, "TI-99/8 Onboard Speech synthesizer", tag, owner, clock, "ti998_speech", __FILE__),
	951	: bus8z_device(mconfig, SPEECH8, "TI-99/8 Onboard Speech synthesizer", tag, owner, clock, "ti998_speech", __FILE__), m_vsp(nullptr),
952	952	m_ready(*this)
953	953	{
954	954	}

trunk/src/devices/bus/ti99x/998board.h

r250251	r250252
90	90
91	91	public:
92	92	logically_addressed_device(mapper8_device_kind kind, device_t *busdevice, const mapper8_list_entry &entry)
93		: m_kind(kind), m_device(busdevice), m_config(&entry) { };
	93	: m_next(nullptr), m_kind(kind), m_device(busdevice), m_config(&entry) { };
94	94
95	95	private:
96	96	logically_addressed_device     *m_next;        // needed for simple_list
r250251	r250252
109	109
110	110	public:
111	111	physically_addressed_device(mapper8_device_kind kind, device_t *busdevice, const mapper8_list_entry &entry)
112		: m_kind(kind), m_device(busdevice), m_config(&entry) { };
	112	: m_next(nullptr), m_kind(kind), m_device(busdevice), m_config(&entry) { };
113	113
114	114	private:
115	115	physically_addressed_device       *m_next;        // needed for simple_list

trunk/src/devices/bus/ti99x/datamux.cpp

r250251	r250252
75	75	Constructor
76	76	*/
77	77	ti99_datamux_device::ti99_datamux_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
78		: device_t(mconfig, DATAMUX, "Databus multiplexer", tag, owner, clock, "ti99_datamux", __FILE__),
79		m_ready(*this) { }
	78	: device_t(mconfig, DATAMUX, "Databus multiplexer", tag, owner, clock, "ti99_datamux", __FILE__), m_spacep(nullptr),
	79	m_ready(*this), m_muxready(), m_sysready(), m_addr_buf(0), m_read_mode(false), m_latch(0), m_waitcount(0), m_ram16b(nullptr), m_use32k(false), m_base32k(0), m_cpu(nullptr)
	80	{ }
80	81
81	82	#define TRACE_READY 0
82	83	#define TRACE_ACCESS 0

trunk/src/devices/bus/ti99x/datamux.h

r250251	r250252
54	54
55	55	public:
56	56	attached_device(device_t *busdevice, const dmux_device_list_entry &entry)
57		: m_device(busdevice), m_config(&entry) { };
	57	: m_next(nullptr), m_device(busdevice), m_config(&entry) { };
58	58
59	59	private:
60	60	attached_device                 *m_next;

trunk/src/devices/bus/ti99x/genboard.cpp

r250251	r250252
206	206	#define TRACE_PFM 0
207	207
208	208	geneve_mapper_device::geneve_mapper_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
209		: device_t(mconfig, GENEVE_MAPPER, "Geneve Gate Array", tag, owner, clock, "geneve_mapper", __FILE__),
210		m_ready(*this)
	209	: device_t(mconfig, GENEVE_MAPPER, "Geneve Gate Array", tag, owner, clock, "geneve_mapper", __FILE__), m_gromwaddr_LSB(false), m_gromraddr_LSB(false), m_grom_address(0), m_video_waitstates(false), m_extra_waitstates(false), m_ready_asserted(false), m_read_mode(false), m_debug_no_ws(false), m_geneve_mode(false), m_direct_mode(false), m_cartridge_size(0), m_cartridge_secondpage(false), m_cartridge6_writable(false), m_cartridge7_writable(false), m_turbo(false), m_genmod(false), m_timode(false), m_pfm_mode(0), m_pfm_bank(0), m_pfm_output_enable(false), m_sram_mask(0), m_sram_val(0),
	210	m_ready(*this), m_waitcount(0), m_ext_waitcount(0), m_clock(nullptr), m_cpu(nullptr), m_pfm512(nullptr), m_pfm512a(nullptr), m_keyboard(nullptr), m_video(nullptr), m_peribox(nullptr), m_sound(nullptr), m_sram(nullptr), m_dram(nullptr)
211	211	{
212	212	m_eprom = NULL;
213	213	}
r250251	r250252
1468	1468
1469	1469	geneve_keyboard_device::geneve_keyboard_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
1470	1470	: device_t(mconfig, GENEVE_KEYBOARD, "Geneve XT-style keyboard", tag, owner, clock, "geneve_keyboard", __FILE__),
1471		m_interrupt(*this)
	1471	m_interrupt(*this), m_key_reset(false), m_key_queue_length(0), m_key_queue_head(0), m_key_in_buffer(false), m_key_numlock_state(false), m_key_ctrl_state(0), m_key_alt_state(0),
	1472	m_key_real_shift_state(0), m_key_fake_shift_state(false), m_key_fake_unshift_state(false), m_key_autorepeat_key(0), m_key_autorepeat_timer(0), m_keep_keybuf(false),
	1473	m_keyboard_clock(false), m_timer(nullptr)
1472	1474	{
1473	1475	}
1474	1476
r250251	r250252
1918	1920	****************************************************************************/
1919	1921
1920	1922	geneve_mouse_device::geneve_mouse_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
1921		: device_t(mconfig, GENEVE_MOUSE, "Geneve mouse", tag, owner, clock, "geneve_mouse", __FILE__)
	1923	: device_t(mconfig, GENEVE_MOUSE, "Geneve mouse", tag, owner, clock, "geneve_mouse", __FILE__), m_v9938(nullptr), m_last_mx(0), m_last_my(0)
1922	1924	{
1923	1925	}
1924	1926

trunk/src/devices/bus/ti99x/grom.cpp

r250251	r250252
93	93	Constructor.
94	94	*/
95	95	ti99_grom_device::ti99_grom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
96		: bus8z_device(mconfig, GROM, "TI-99 GROM device", tag, owner, clock, "ti99_grom", __FILE__),
97		m_gromready(*this)
	96	: bus8z_device(mconfig, GROM, "TI-99 GROM device", tag, owner, clock, "ti99_grom", __FILE__), m_writable(false), m_ident(0), m_size(0),
	97	m_gromready(*this), m_clockrate(0), m_address(0), m_buffer(0), m_raddr_LSB(false), m_waddr_LSB(false), m_memptr(nullptr), m_timer(nullptr)
98	98	{
99	99	}
100	100

trunk/src/devices/bus/ti99x/gromport.cpp

r250251	r250252
137	137	gromport_device::gromport_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
138	138	:   bus8z_device(mconfig, GROMPORT, "Cartridge port", tag, owner, clock, "gromport", __FILE__),
139	139	device_slot_interface(mconfig, *this),
140		m_connector(NULL),
	140	m_connector(nullptr),
141	141	m_reset_on_insert(true),
142	142	m_console_ready(*this),
143		m_console_reset(*this) { }
	143	m_console_reset(*this), m_grombase(0), m_grommask(0)
	144	{ }
144	145
145	146	/* Only called for addresses 6000-7fff and GROM addresses (see datamux config) */
146	147	READ8Z_MEMBER(gromport_device::readz)
r250251	r250252
1452	1453	Unlike in the previous implementation we do not model it as a full device.
1453	1454	***************************************************************************/
1454	1455
1455		ti99_cartridge_pcb::ti99_cartridge_pcb()
	1456	ti99_cartridge_pcb::ti99_cartridge_pcb(): m_cart(nullptr), m_grom_size(0), m_rom_size(0), m_ram_size(0), m_rom_ptr(nullptr), m_ram_ptr(nullptr), m_rom_page(0), m_grom_ptr(nullptr), m_grom_address(0), m_ram_page(0), m_tag(nullptr)
1456	1457	{
1457	1458	}
1458	1459
r250251	r250252
2124	2125	Constructor.
2125	2126	*/
2126	2127	rpk::rpk(emu_options& options, const char* sysname)
2127		:m_options(options)
2128		//,m_system_name(sysname)
	2128	:m_options(options), m_type(0)
	2129	//,m_system_name(sysname)
2129	2130	{
2130	2131	m_sockets.reset();
2131	2132	}
r250251	r250252
2461	2462	if (strcmp(socket_node->name, "socket")!=0) throw rpk_exception(RPK_INVALID_LAYOUT, "<pcb> element has only <socket> children");
2462	2463	id = xml_get_attribute_string(socket_node, "id", NULL);
2463	2464	if (id == NULL) throw rpk_exception(RPK_INVALID_LAYOUT, "<socket> must have an 'id' attribute");
2464		uses_name = xml_get_attribute_string(socket_node, "uses", NULL);
2465		if (uses_name == NULL) throw rpk_exception(RPK_INVALID_LAYOUT, "<socket> must have a 'uses' attribute");
	2465	uses_name = xml_get_attribute_string(socket_node, "uses", nullptr);
	2466	if (uses_name == nullptr) throw rpk_exception(RPK_INVALID_LAYOUT, "<socket> must have a 'uses' attribute");
2466	2467
2467	2468	bool found = false;
2468	2469	// Locate the resource node

trunk/src/devices/bus/ti99x/gromport.h

r250251	r250252
404	404	class ti99_gromemu_cartridge : public ti99_cartridge_pcb
405	405	{
406	406	public:
407		ti99_gromemu_cartridge() {  m_grom_address = 0; }
	407	ti99_gromemu_cartridge(): m_waddr_LSB(false)
	408	{  m_grom_address = 0; }
408	409	~ti99_gromemu_cartridge() { };
409	410	DECLARE_READ8Z_MEMBER(readz);
410	411	DECLARE_WRITE8_MEMBER(write);

trunk/src/devices/bus/ti99x/handset.cpp

r250251	r250252
51	51	static const char *const keynames[] = { "KP0", "KP1", "KP2", "KP3", "KP4" };
52	52
53	53	ti99_handset_device::ti99_handset_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
54		: joyport_attached_device(mconfig, HANDSET, "TI-99/4 IR handset", tag, owner, clock, "handset", __FILE__)
	54	: joyport_attached_device(mconfig, HANDSET, "TI-99/4 IR handset", tag, owner, clock, "handset", __FILE__), m_ack(0), m_clock_high(false), m_buf(0), m_buflen(0), m_delay_timer(nullptr)
55	55	{
56	56	}
57	57
r250251	r250252
490	490	INPUT_PORTS_END
491	491
492	492	ti99_twin_joystick::ti99_twin_joystick(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
493		: joyport_attached_device(mconfig, HANDSET, "TI-99/4(A) Twin Joystick", tag, owner, clock, "twinjoy", __FILE__)
	493	: joyport_attached_device(mconfig, HANDSET, "TI-99/4(A) Twin Joystick", tag, owner, clock, "twinjoy", __FILE__), m_joystick(0)
494	494	{
495	495	}
496	496

trunk/src/devices/bus/ti99x/joyport.cpp

r250251	r250252
42	42	joyport_device::joyport_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
43	43	:   device_t(mconfig, JOYPORT, "Joystick port", tag, owner, clock, "ti99_joyport", __FILE__),
44	44	device_slot_interface(mconfig, *this),
45		m_interrupt(*this)
	45	m_interrupt(*this), m_connected(nullptr)
46	46	{
47	47	}
48	48

trunk/src/devices/bus/ti99x/joyport.h

r250251	r250252
33	33	{
34	34	public:
35	35	joyport_attached_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
36		: device_t(mconfig, type, name, tag, owner, clock, shortname, source) { }
	36	: device_t(mconfig, type, name, tag, owner, clock, shortname, source), m_joyport(nullptr)
	37	{ }
37	38
38	39	virtual UINT8 read_dev() =0;
39	40	virtual void write_dev(UINT8 data) =0;

trunk/src/devices/bus/ti99x/mecmouse.cpp

r250251	r250252
53	53	#define POLL_TIMER 1
54	54
55	55	mecmouse_device::mecmouse_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
56		: joyport_attached_device(mconfig, MECMOUSE, "Mechatronics Mouse", tag, owner, clock, "mecmouse", __FILE__)
	56	: joyport_attached_device(mconfig, MECMOUSE, "Mechatronics Mouse", tag, owner, clock, "mecmouse", __FILE__), m_last_select(0), m_read_y_axis(false), m_x(0), m_y(0), m_x_buf(0), m_y_buf(0), m_last_mx(0), m_last_my(0), m_poll_timer(nullptr)
57	57	{
58	58	}
59	59

trunk/src/devices/bus/ti99x/videowrp.cpp

r250251	r250252
28	28	Constructors
29	29	*/
30	30	ti_video_device::ti_video_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
31		: bus8z_device(mconfig, type, name, tag, owner, clock, shortname, source)
	31	: bus8z_device(mconfig, type, name, tag, owner, clock, shortname, source),
	32	m_tms9928a(nullptr)
32	33	{
33	34	}
34	35
r250251	r250252
38	39	}
39	40
40	41	ti_exp_video_device::ti_exp_video_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
41		: ti_video_device(mconfig, V9938VIDEO, "TI99 EXP Video subsystem", tag, owner, clock, "v9938_video", __FILE__)
	42	: ti_video_device(mconfig, V9938VIDEO, "TI99 EXP Video subsystem", tag, owner, clock, "v9938_video", __FILE__), m_v9938(nullptr)
42	43	{
43	44	}
44	45

trunk/src/devices/bus/ti99x/videowrp.h

r250251	r250252
85	85	{
86	86	public:
87	87	ti_sound_system_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
88		: bus8z_device(mconfig, type, name, tag, owner, clock, shortname, source),
	88	: bus8z_device(mconfig, type, name, tag, owner, clock, shortname, source), m_sound_chip(nullptr),
89	89	m_console_ready(*this) { };
90	90
91	91	// Cannot read from sound; just ignore silently

trunk/src/devices/bus/tiki100/exp.cpp

r250251	r250252
29	29	tiki100_bus_slot_t::tiki100_bus_slot_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
30	30	device_t(mconfig, TIKI100_BUS_SLOT, "TIKI-100 expansion bus slot", tag, owner, clock, "tiki100bus_slot", __FILE__),
31	31	device_slot_interface(mconfig, *this),
32		device_z80daisy_interface(mconfig, *this)
	32	device_z80daisy_interface(mconfig, *this),
	33	m_bus(nullptr),
	34	m_card(nullptr)
33	35	{
34	36	}
35	37
r250251	r250252
186	188	//-------------------------------------------------
187	189
188	190	device_tiki100bus_card_interface::device_tiki100bus_card_interface(const machine_config &mconfig, device_t &device) :
189		device_slot_card_interface(mconfig, device),
190		m_busak(CLEAR_LINE)
	191	device_slot_card_interface(mconfig, device), m_bus(nullptr),
	192	m_busak(CLEAR_LINE), m_next(nullptr)
191	193	{
192	194	m_slot = dynamic_cast<tiki100_bus_slot_t *>(device.owner());
193	195	}

trunk/src/devices/bus/tvc/hbf.cpp

r250251	r250252
61	61	tvc_hbf_device::tvc_hbf_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
62	62	: device_t(mconfig, TVC_HBF, "HBF floppy interface", tag, owner, clock, "tvc_hbf", __FILE__),
63	63	device_tvcexp_interface( mconfig, *this ),
64		m_fdc(*this, "fdc")
65		{
	64	m_fdc(*this, "fdc"), m_rom(nullptr), m_ram(nullptr), m_rom_bank(0)
	65	{
66	66	}
67	67
68	68

trunk/src/devices/bus/tvc/tvc.cpp

r250251	r250252
56	56	device_t(mconfig, TVCEXP_SLOT, "TVC64 Expansion Slot", tag, owner, clock, "tvcexp_slot", __FILE__),
57	57	device_slot_interface(mconfig, *this),
58	58	m_out_irq_cb(*this),
59		m_out_nmi_cb(*this)
	59	m_out_nmi_cb(*this), m_cart(nullptr)
60	60	{
61	61	}
62	62

trunk/src/devices/bus/vboy/slot.cpp

r250251	r250252
78	78	device_t(mconfig, VBOY_CART_SLOT, "Nintendo Virtual Boy Cartridge Slot", tag, owner, clock, "vboy_cart_slot", __FILE__),
79	79	device_image_interface(mconfig, *this),
80	80	device_slot_interface(mconfig, *this),
81		m_type(VBOY_STD)
	81	m_type(VBOY_STD), m_cart(nullptr)
82	82	{
83	83	}
84	84

trunk/src/devices/bus/vc4000/slot.cpp

r250251	r250252
76	76	device_t(mconfig, VC4000_CART_SLOT, "Interton VC 4000 Cartridge Slot", tag, owner, clock, "vc4000_cart_slot", __FILE__),
77	77	device_image_interface(mconfig, *this),
78	78	device_slot_interface(mconfig, *this),
79		m_type(VC4000_STD)
	79	m_type(VC4000_STD), m_cart(nullptr)
80	80	{
81	81	}
82	82

trunk/src/devices/bus/vcs/dpc.cpp

r250251	r250252
17	17	const device_type ATARI_DPC = &device_creator<dpc_device>;
18	18
19	19
20		dpc_device::dpc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
21		: device_t(mconfig, ATARI_DPC, "Atari DCP", tag, owner, clock, "atari_dcp", __FILE__),
22		m_displaydata(NULL)
	20	dpc_device::dpc_device(const machine_config& mconfig, const char* tag, device_t* owner, UINT32 clock) :
	21	device_t(mconfig, ATARI_DPC, "Atari DCP", tag, owner, clock, "atari_dcp", __FILE__),
	22	m_movamt(0),
	23	m_latch_62(0),
	24	m_latch_64(0),
	25	m_dlc(0),
	26	m_shift_reg(0),
	27	m_displaydata(nullptr),
	28	m_oscillator(nullptr)
23	29	{
24	30	}
25	31

trunk/src/devices/bus/vcs/rom.cpp

r250251	r250252
104	104
105	105
106	106	a26_rom_fe_device::a26_rom_fe_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
107		: a26_rom_2k_device(mconfig, A26_ROM_FE, "Atari VCS 2600 ROM Carts w/FE bankswitch", tag, owner, clock, "vcs_fe", __FILE__)
108		{
	107	: a26_rom_2k_device(mconfig, A26_ROM_FE, "Atari VCS 2600 ROM Carts w/FE bankswitch", tag, owner, clock, "vcs_fe", __FILE__), m_base_bank(0), m_trigger_on_next_access(0)
	108	{
109	109	}
110	110
111	111
112	112	a26_rom_3e_device::a26_rom_3e_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
113		: a26_rom_f6_device(mconfig, A26_ROM_3E, "Atari VCS 2600 ROM Carts w/3E bankswitch", tag, owner, clock, "vcs_3e", __FILE__)
114		{
	113	: a26_rom_f6_device(mconfig, A26_ROM_3E, "Atari VCS 2600 ROM Carts w/3E bankswitch", tag, owner, clock, "vcs_3e", __FILE__), m_num_bank(0), m_ram_bank(0), m_ram_enable(0)
	114	{
115	115	}
116	116
117	117
118	118	a26_rom_3f_device::a26_rom_3f_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
119		: a26_rom_f6_device(mconfig, A26_ROM_3F, "Atari VCS 2600 ROM Carts w/3F bankswitch", tag, owner, clock, "vcs_3f", __FILE__)
120		{
	119	: a26_rom_f6_device(mconfig, A26_ROM_3F, "Atari VCS 2600 ROM Carts w/3F bankswitch", tag, owner, clock, "vcs_3f", __FILE__), m_num_bank(0)
	120	{
121	121	}
122	122
123	123
r250251	r250252
128	128
129	129
130	130	a26_rom_e7_device::a26_rom_e7_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
131		: a26_rom_f6_device(mconfig, A26_ROM_E7, "Atari VCS 2600 ROM Carts w/E7 bankswitch", tag, owner, clock, "vcs_e7", __FILE__)
132		{
	131	: a26_rom_f6_device(mconfig, A26_ROM_E7, "Atari VCS 2600 ROM Carts w/E7 bankswitch", tag, owner, clock, "vcs_e7", __FILE__), m_ram_bank(0)
	132	{
133	133	}
134	134
135	135
r250251	r250252
152	152
153	153
154	154	a26_rom_fv_device::a26_rom_fv_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
155		: a26_rom_f6_device(mconfig, A26_ROM_FV, "Atari VCS 2600 ROM Carts w/FV bankswitch", tag, owner, clock, "vcs_fv", __FILE__)
156		{
	155	: a26_rom_f6_device(mconfig, A26_ROM_FV, "Atari VCS 2600 ROM Carts w/FV bankswitch", tag, owner, clock, "vcs_fv", __FILE__), m_locked(0)
	156	{
157	157	}
158	158
159	159
r250251	r250252
170	170
171	171
172	172	a26_rom_8in1_device::a26_rom_8in1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
173		: a26_rom_f8_device(mconfig, A26_ROM_8IN1, "Atari VCS 2600 ROM Cart 8 in 1", tag, owner, clock, "vcs_8in1", __FILE__)
174		{
	173	: a26_rom_f8_device(mconfig, A26_ROM_8IN1, "Atari VCS 2600 ROM Cart 8 in 1", tag, owner, clock, "vcs_8in1", __FILE__), m_reset_bank(0)
	174	{
175	175	}
176	176
177	177

trunk/src/devices/bus/vcs/scharger.cpp

r250251	r250252
42	42
43	43	a26_rom_ss_device::a26_rom_ss_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
44	44	: a26_rom_f6_device(mconfig, A26_ROM_SUPERCHARGER, "Atari 2600 ROM Cart Supercharger", tag, owner, clock, "a2600_ss", __FILE__),
45		m_cassette(*this, "cassette")
46		{
	45	m_cassette(*this, "cassette"),
	46	m_maincpu(nullptr),
	47	m_reg(0),
	48	m_write_delay(0),
	49	m_ram_write_enabled(0),
	50	m_rom_enabled(0),
	51	m_byte_started(0),
	52	m_last_address(0),
	53	m_diff_adjust(0)
	54	{
47	55	}
48	56
49	57	//-------------------------------------------------

trunk/src/devices/bus/vcs/vcs_slot.cpp

r250251	r250252
80	80	vcs_cart_slot_device::vcs_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
81	81	device_t(mconfig, VCS_CART_SLOT, "Atari VCS 2600 Cartridge Slot", tag, owner, clock, "vcs_cart_slot", __FILE__),
82	82	device_image_interface(mconfig, *this),
83		device_slot_interface(mconfig, *this)
	83	device_slot_interface(mconfig, *this), m_cart(nullptr), m_type(0)
84	84	{
85	85	}
86	86

trunk/src/devices/bus/vcs_ctrl/ctrl.cpp

r250251	r250252
44	44
45	45	vcs_control_port_device::vcs_control_port_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
46	46	device_t(mconfig, VCS_CONTROL_PORT, "Atari VCS control port", tag, owner, clock, "vcs_control_port", __FILE__),
47		device_slot_interface(mconfig, *this),
	47	device_slot_interface(mconfig, *this), m_device(nullptr),
48	48	m_write_trigger(*this)
49	49	{
50	50	}

trunk/src/devices/bus/vcs_ctrl/keypad.cpp

r250251	r250252
56	56	vcs_keypad_device::vcs_keypad_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
57	57	device_t(mconfig, VCS_KEYPAD, "Atari / CBM Keypad", tag, owner, clock, "vcs_keypad", __FILE__),
58	58	device_vcs_control_port_interface(mconfig, *this),
59		m_keypad(*this, "KEYPAD")
	59	m_keypad(*this, "KEYPAD"), m_column(0)
60	60	{
61	61	}
62	62

trunk/src/devices/bus/vectrex/rom.cpp

r250251	r250252
38	38	}
39	39
40	40	vectrex_rom64k_device::vectrex_rom64k_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
41		: vectrex_rom_device(mconfig, VECTREX_ROM_64K, "Vectrex Carts w/ Bankswitch", tag, owner, clock, "vectrex_64k", __FILE__)
42		{
	41	: vectrex_rom_device(mconfig, VECTREX_ROM_64K, "Vectrex Carts w/ Bankswitch", tag, owner, clock, "vectrex_64k", __FILE__), m_bank(0)
	42	{
43	43	}
44	44
45	45	vectrex_sram_device::vectrex_sram_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)

trunk/src/devices/bus/vectrex/slot.cpp

r250251	r250252
67	67	device_image_interface(mconfig, *this),
68	68	device_slot_interface(mconfig, *this),
69	69	m_type(VECTREX_STD),
70		m_vec3d(VEC3D_NONE)
	70	m_vec3d(VEC3D_NONE), m_cart(nullptr)
71	71	{
72	72	}
73	73

trunk/src/devices/bus/vic10/exp.cpp

r250251	r250252
63	63	m_write_irq(*this),
64	64	m_write_res(*this),
65	65	m_write_cnt(*this),
66		m_write_sp(*this)
	66	m_write_sp(*this), m_card(nullptr)
67	67	{
68	68	}
69	69

trunk/src/devices/bus/vic20/exp.cpp

r250251	r250252
62	62	device_image_interface(mconfig, *this),
63	63	m_write_irq(*this),
64	64	m_write_nmi(*this),
65		m_write_res(*this)
	65	m_write_res(*this), m_card(nullptr)
66	66	{
67	67	}
68	68

trunk/src/devices/bus/vic20/fe3.cpp

r250251	r250252
114	114	device_t(mconfig, VIC20_FE3, "Final Expansion v3", tag, owner, clock, "vic20_fe3", __FILE__),
115	115	device_vic20_expansion_card_interface(mconfig, *this),
116	116	m_flash_rom(*this, AM29F040_TAG),
117		m_ram(*this, "sram")
	117	m_ram(*this, "sram"), m_reg1(0), m_reg2(0), m_lockbit(0)
118	118	{
119	119	}
120	120

trunk/src/devices/bus/vic20/vic1112.cpp

r250251	r250252
139	139	device_vic20_expansion_card_interface(mconfig, *this),
140	140	m_via0(*this, M6522_0_TAG),
141	141	m_via1(*this, M6522_1_TAG),
142		m_bus(*this, IEEE488_TAG)
	142	m_bus(*this, IEEE488_TAG), m_via0_irq(0), m_via1_irq(0)
143	143	{
144	144	}
145	145

trunk/src/devices/bus/vidbrain/exp.cpp

r250251	r250252
90	90	device_t(mconfig, VIDEOBRAIN_EXPANSION_SLOT, "VideoBrain expansion port", tag, owner, clock, "videobrain_expansion_slot", __FILE__),
91	91	device_slot_interface(mconfig, *this),
92	92	device_image_interface(mconfig, *this),
93		m_write_extres(*this)
	93	m_write_extres(*this), m_cart(nullptr)
94	94	{
95	95	}
96	96

trunk/src/devices/bus/vip/byteio.cpp

r250251	r250252
45	45	vip_byteio_port_device::vip_byteio_port_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
46	46	device_t(mconfig, VIP_BYTEIO_PORT, "VIP byte I/O port", tag, owner, clock, "vip_byteio_port", __FILE__),
47	47	device_slot_interface(mconfig, *this),
48		m_write_inst(*this)
	48	m_write_inst(*this), m_cart(nullptr)
49	49	{
50	50	}
51	51

trunk/src/devices/bus/vip/exp.cpp

r250251	r250252
55	55	device_slot_interface(mconfig, *this),
56	56	m_write_int(*this),
57	57	m_write_dma_out(*this),
58		m_write_dma_in(*this)
	58	m_write_dma_in(*this), m_card(nullptr)
59	59	{
60	60	}
61	61

trunk/src/devices/bus/vip/vp550.cpp

r250251	r250252
82	82	device_t(mconfig, VP550, "VP550", tag, owner, clock, "vp550", __FILE__),
83	83	device_vip_expansion_card_interface(mconfig, *this),
84	84	m_pfg_a(*this, CDP1863_A_TAG),
85		m_pfg_b(*this, CDP1863_B_TAG)
	85	m_pfg_b(*this, CDP1863_B_TAG), m_sync_timer(nullptr)
86	86	{
87	87	}
88	88

trunk/src/devices/bus/vip/vp585.cpp

r250251	r250252
83	83	device_t(mconfig, VP585, "VP585", tag, owner, clock, "vp585", __FILE__),
84	84	device_vip_expansion_card_interface(mconfig, *this),
85	85	m_j1(*this, "J1"),
86		m_j2(*this, "J2")
	86	m_j2(*this, "J2"), m_keylatch(0)
87	87	{
88	88	}
89	89

trunk/src/devices/bus/vip/vp590.cpp

r250251	r250252
142	142	m_cgc(*this, CDP1862_TAG),
143	143	m_color_ram(*this, "color_ram"),
144	144	m_j1(*this, "J1"),
145		m_j2(*this, "J2")
	145	m_j2(*this, "J2"), m_a12(0), m_color(0), m_keylatch(0)
146	146	{
147	147	}
148	148

trunk/src/devices/bus/vtech/memexp/floppy.cpp

r250251	r250252
72	72	device_memexp_interface(mconfig, *this),
73	73	m_memexp(*this, "mem"),
74	74	m_floppy0(*this, "0"),
75		m_floppy1(*this, "1")
	75	m_floppy1(*this, "1"), m_floppy(nullptr), m_latch(0), m_shifter(0), m_latching_inverter(false), m_current_cyl(0), m_write_position(0)
76	76	{
77	77	}
78	78

trunk/src/devices/bus/wangpc/emb.cpp

r250251	r250252
46	46	wangpc_emb_device::wangpc_emb_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
47	47	device_t(mconfig, WANGPC_EMB, "Wang PC-PM031-B", tag, owner, clock, "wangpc_emb", __FILE__),
48	48	device_wangpcbus_card_interface(mconfig, *this),
49		m_ram(*this, "ram")
	49	m_ram(*this, "ram"), m_option(0), m_parity_error(0), m_parity_odd(0)
50	50	{
51	51	}
52	52

trunk/src/devices/bus/wangpc/lvc.cpp

r250251	r250252
171	171	device_wangpcbus_card_interface(mconfig, *this),
172	172	m_crtc(*this, MC6845_TAG),
173	173	m_video_ram(*this, "video_ram"),
174		m_option(0),
	174	m_option(0), m_scroll(0),
175	175	m_irq(CLEAR_LINE)
176	176	{
177	177	}

trunk/src/devices/bus/wangpc/mcc.cpp

r250251	r250252
106	106	device_t(mconfig, WANGPC_MCC, "Wang PC-PM043", tag, owner, clock, "wangpc_mcc", __FILE__),
107	107	device_wangpcbus_card_interface(mconfig, *this),
108	108	m_sio(*this, Z80SIO2_TAG),
109		m_dart(*this, Z80DART_TAG)
	109	m_dart(*this, Z80DART_TAG), m_option(0), m_irq(0)
110	110	{
111	111	}
112	112

trunk/src/devices/bus/wangpc/tig.cpp

r250251	r250252
155	155	device_wangpcbus_card_interface(mconfig, *this),
156	156	m_hgdc0(*this, UPD7720_0_TAG),
157	157	m_hgdc1(*this, UPD7720_1_TAG),
158		m_option(0),
	158	m_option(0), m_underline(0),
159	159	m_palette(*this, "palette")
160	160	{
161	161	}

trunk/src/devices/bus/wangpc/wangpc.cpp

r250251	r250252
28	28
29	29	wangpcbus_slot_device::wangpcbus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
30	30	device_t(mconfig, WANGPC_BUS_SLOT, "Wang PC bus slot", tag, owner, clock, "wangpcbus_slot", __FILE__),
31		device_slot_interface(mconfig, *this)
	31	device_slot_interface(mconfig, *this),
	32	m_bus(nullptr),
	33	m_sid(0)
32	34	{
33	35	}
34	36
r250251	r250252
246	248	//-------------------------------------------------
247	249
248	250	device_wangpcbus_card_interface::device_wangpcbus_card_interface(const machine_config &mconfig, device_t &device) :
249		device_slot_card_interface(mconfig, device)
	251	device_slot_card_interface(mconfig, device), m_bus(nullptr), m_sid(0), m_next(nullptr)
250	252	{
251	253	m_slot = dynamic_cast<wangpcbus_slot_device *>(device.owner());
252	254	}

trunk/src/devices/bus/wangpc/wdc.cpp

r250251	r250252
145	145	device_t(mconfig, WANGPC_WDC, "Wang PC-PM001", tag, owner, clock, "wangpc_wdc", __FILE__),
146	146	device_wangpcbus_card_interface(mconfig, *this),
147	147	m_maincpu(*this, Z80_TAG),
148		m_ctc(*this, MK3882_TAG)
	148	m_ctc(*this, MK3882_TAG), m_status(0), m_option(0), m_irq(0)
149	149	{
150	150	}
151	151

trunk/src/devices/bus/wswan/rom.cpp

r250251	r250252
26	26	const device_type WS_ROM_EEPROM = &device_creator<ws_rom_eeprom_device>;
27	27
28	28
29		ws_rom_device::ws_rom_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
30		: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
31		device_ws_cart_interface( mconfig, *this )
	29	ws_rom_device::ws_rom_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
	30	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
	31	device_ws_cart_interface(mconfig, *this),
	32	m_base20(0),
	33	m_base30(0),
	34	m_base40(0),
	35	m_rtc_setting(0),
	36	m_rtc_year(0),
	37	m_rtc_month(0),
	38	m_rtc_day(0),
	39	m_rtc_day_of_week(0),
	40	m_rtc_hour(0),
	41	m_rtc_minute(0),
	42	m_rtc_second(0),
	43	m_rtc_index(0),
	44	rtc_timer(nullptr)
32	45	{
33	46	}
34	47
35	48	ws_rom_device::ws_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
36	49	: device_t(mconfig, WS_ROM_STD, "Wonderswan Standard Carts", tag, owner, clock, "ws_rom", __FILE__),
37		device_ws_cart_interface( mconfig, *this )
38		{
	50	device_ws_cart_interface( mconfig, *this ), m_base20(0),
	51	m_base30(0),
	52	m_base40(0),
	53	m_rtc_setting(0),
	54	m_rtc_year(0),
	55	m_rtc_month(0),
	56	m_rtc_day(0),
	57	m_rtc_day_of_week(0),
	58	m_rtc_hour(0),
	59	m_rtc_minute(0),
	60	m_rtc_second(0),
	61	m_rtc_index(0),
	62	rtc_timer(nullptr)
	63	{
39	64	}
40	65
41	66	ws_rom_sram_device::ws_rom_sram_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
42		: ws_rom_device(mconfig, WS_ROM_SRAM, "Wonderswan Carts w/SRAM", tag, owner, clock, "ws_sram", __FILE__)
43		{
	67	: ws_rom_device(mconfig, WS_ROM_SRAM, "Wonderswan Carts w/SRAM", tag, owner, clock, "ws_sram", __FILE__), m_nvram_base(0)
	68	{
44	69	}
45	70
46	71
47	72	ws_rom_eeprom_device::ws_rom_eeprom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
48		: ws_rom_device(mconfig, WS_ROM_EEPROM, "Wonderswan Carts w/EEPROM", tag, owner, clock, "ws_eeprom", __FILE__)
49		{
	73	: ws_rom_device(mconfig, WS_ROM_EEPROM, "Wonderswan Carts w/EEPROM", tag, owner, clock, "ws_eeprom", __FILE__), m_eeprom_mode(0),
	74	m_eeprom_address(0), m_eeprom_command(0), m_eeprom_start(0), m_eeprom_write_enabled(0)
	75	{
50	76	}
51	77
52	78

trunk/src/devices/bus/wswan/slot.cpp

r250251	r250252
80	80	device_t(mconfig, WS_CART_SLOT, "Wonderswan Cartridge Slot", tag, owner, clock, "ws_cart_slot", __FILE__),
81	81	device_image_interface(mconfig, *this),
82	82	device_slot_interface(mconfig, *this),
83		m_type(WS_STD)
	83	m_type(WS_STD), m_cart(nullptr)
84	84	{
85	85	}
86	86

trunk/src/devices/bus/x68k/x68k_neptunex.cpp

r250251	r250252
30	30
31	31	x68k_neptune_device::x68k_neptune_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
32	32	: device_t(mconfig, X68K_NEPTUNEX, "Neptune-X", tag, owner, clock, "x68k_neptunex", __FILE__),
33		device_x68k_expansion_card_interface(mconfig, *this),
	33	device_x68k_expansion_card_interface(mconfig, *this),
	34	m_slot(nullptr),
34	35	m_dp8390(*this, "dp8390d")
35	36	{
36	37	}

trunk/src/devices/bus/x68k/x68k_scsiext.cpp

r250251	r250252
58	58
59	59	x68k_scsiext_device::x68k_scsiext_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
60	60	: device_t(mconfig, X68K_SCSIEXT, "Sharp CZ-6BS1 SCSI-1", tag, owner, clock, "x68k_cz6bs1", __FILE__),
61		device_x68k_expansion_card_interface(mconfig, *this),
	61	device_x68k_expansion_card_interface(mconfig, *this), m_slot(nullptr),
62	62	m_spc(*this, "mb89352")
63	63	{
64	64	}

trunk/src/devices/bus/x68k/x68kexp.cpp

r250251	r250252
40	40	m_out_irq2_cb(*this),
41	41	m_out_irq4_cb(*this),
42	42	m_out_nmi_cb(*this),
43		m_out_reset_cb(*this)
	43	m_out_reset_cb(*this), m_card(nullptr)
44	44	{
45	45	}
46	46

trunk/src/devices/bus/z88/ram.cpp

r250251	r250252
34	34
35	35	z88_32k_ram_device::z88_32k_ram_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
36	36	: device_t(mconfig, Z88_32K_RAM, "Z88 32KB RAM", tag, owner, clock, "z88_32k_ram", __FILE__),
37		device_z88cart_interface( mconfig, *this )
38		{
	37	device_z88cart_interface( mconfig, *this ), m_ram(nullptr)
	38	{
39	39	}
40	40
41	41	z88_32k_ram_device::z88_32k_ram_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
42	42	: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
43		device_z88cart_interface( mconfig, *this )
44		{
	43	device_z88cart_interface( mconfig, *this ), m_ram(nullptr)
	44	{
45	45	}
46	46
47	47	//-------------------------------------------------

trunk/src/devices/bus/z88/rom.cpp

r250251	r250252
33	33
34	34	z88_32k_rom_device::z88_32k_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
35	35	: device_t(mconfig, Z88_32K_ROM, "Z88 32KB ROM", tag, owner, clock, "z88_32k_rom", __FILE__),
36		device_z88cart_interface( mconfig, *this )
37		{
	36	device_z88cart_interface( mconfig, *this ), m_rom(nullptr)
	37	{
38	38	}
39	39
40	40	z88_32k_rom_device::z88_32k_rom_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
41	41	: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
42		device_z88cart_interface( mconfig, *this )
43		{
	42	device_z88cart_interface( mconfig, *this ), m_rom(nullptr)
	43	{
44	44	}
45	45
46	46	//-------------------------------------------------

trunk/src/devices/bus/z88/z88.cpp

r250251	r250252
60	60	device_t(mconfig, Z88CART_SLOT, "Z88 Cartridge Slot", tag, owner, clock, "z88cart_slot", __FILE__),
61	61	device_image_interface(mconfig, *this),
62	62	device_slot_interface(mconfig, *this),
63		m_out_flp_cb(*this)
	63	m_out_flp_cb(*this), m_cart(nullptr), m_flp_timer(nullptr)
64	64	{
65	65	}
66	66

trunk/src/devices/cpu/dsp56k/dsp56mem.h

r250251	r250252
13	13	void mem_reset(dsp56k_core* cpustate);
14	14
15	15	// Adjusts the documented address to match the offset in peripheral RAM
16		#define A2O(a) (a-0xffc0)
	16	#define A2O(a) (a - 0xffc0)
17	17
18	18	// Adjusts the offset in peripheral RAM to match the documented address
19		#define O2A(a) (a+0xffc0)
	19	#define O2A(a) (a + 0xffc0)
20	20
21	21	// The memory 'registers'
22	22	#define PBC      (cpustate->peripheral_ram[A2O(0xffc0)])

trunk/src/devices/cpu/i8085/i8085.cpp

r250251	r250252
270	270	if (m_irq_state[I8085_RST55_LINE]) result |= IM_I55;
271	271
272	272	/* fetch the SID bit if we have a callback */
273		result = (result & 0x7f) | (sid ? 0x80 : 0);
	273	result = (result & ~IM_SID) | (sid ? IM_SID : 0);
274	274
275	275	return result;
276	276	}

trunk/src/devices/cpu/i86/i286.cpp

r250251	r250252
1292	1292	LOADDESC(0x848, DS);
1293	1293	#undef LOADDESC
1294	1294	// void cast supresses warning
1295		#define LOADDESC(addr, reg, r) { desc[1] = read_word(addr); desc[2] = read_word(addr+2); desc[0] = read_word(addr+4); \
	1295	#define LOADDESC(addr, reg, r) { desc[1] = read_word(addr); desc[2] = read_word(addr + 2); desc[0] = read_word(addr + 4); \
1296	1296	reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
1297	1297	LOADDESC(0x84e, m_gdtr, 1);
1298	1298	LOADDESC(0x854, m_ldtr, m_ldtr.rights = RIGHTS(desc));

trunk/src/devices/cpu/m6502/deco16.cpp

r250251	r250252
16	16	const device_type DECO16 = &device_creator<deco16_device>;
17	17
18	18	deco16_device::deco16_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
19		m6502_device(mconfig, DECO16, "DECO16", tag, owner, clock, "deco16", __FILE__),
	19	m6502_device(mconfig, DECO16, "DECO16", tag, owner, clock, "deco16", __FILE__),
	20	io(NULL),
20	21	io_config("io", ENDIANNESS_LITTLE, 8, 16)
21	22	{
22	23	}

trunk/src/devices/cpu/m6502/m3745x.cpp

r250251	r250252
55	55	read_ad_4(*this),
56	56	read_ad_5(*this),
57	57	read_ad_6(*this),
58		read_ad_7(*this)
	58	read_ad_7(*this),
	59	m_intreq1(0),
	60	m_intreq2(0),
	61	m_intctrl1(0),
	62	m_intctrl2(0),
	63	m_adctrl(0),
	64	m_last_all_ints(0)
59	65	{
60	66	}
61	67
r250251	r250252
195	201
196	202	void m3745x_device::recalc_irqs()
197	203	{
198		UINT16 all_ints = 0;
	204	UINT16 all_ints;
199	205	int static const irq_lines[16] =
200	206	{
201	207	-1, -1, -1, M740_INT11_LINE, M740_INT12_LINE, M740_INT13_LINE, -1, -1,

trunk/src/devices/cpu/m6502/m4510.cpp

r250251	r250252
14	14	const device_type M4510 = &device_creator<m4510_device>;
15	15
16	16	m4510_device::m4510_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
17		m65ce02_device(mconfig, M4510, "M4510", tag, owner, clock, "m4510", __FILE__)
	17	m65ce02_device(mconfig, M4510, "M4510", tag, owner, clock, "m4510", __FILE__),
	18	map_enable(0),
	19	nomap(false)
18	20	{
19	21	program_config.m_addrbus_width = 20;
20	22	program_config.m_logaddr_width = 16;

trunk/src/devices/cpu/m6502/m5074x.cpp

r250251	r250252
49	49	write_p0(*this),
50	50	write_p1(*this),
51	51	write_p2(*this),
52		write_p3(*this)
	52	write_p3(*this),
	53	m_intctrl(0),
	54	m_tmrctrl(0),
	55	m_tmr12pre(0),
	56	m_tmr1(0),
	57	m_tmr2(0),
	58	m_tmrxpre(0),
	59	m_tmrx(0),
	60	m_tmr1latch(0),
	61	m_tmr2latch(0),
	62	m_tmrxlatch(0),
	63	m_last_all_ints(0)
53	64	{
54	65	}
55	66

trunk/src/devices/cpu/m6809/6309dasm.cpp

r250251	r250252
613	613	unsigned int ea, flags;
614	614	int numoperands, offset, indirect;
615	615
616		int i, p = 0, page = 0, opcode_found = FALSE;
	616	int i, p = 0, page = 0, opcode_found;
617	617
618	618	do
619	619	{

trunk/src/devices/cpu/m6809/6809dasm.cpp

r250251	r250252
372	372	const UINT8 *operandarray;
373	373	unsigned int ea, flags;
374	374	int numoperands, offset, indirect;
375		int i, p = 0, page = 0, opcode_found = FALSE;
	375	int i, p = 0, page = 0, opcode_found;
376	376
377	377	do
378	378	{

trunk/src/devices/cpu/m6809/hd6309.cpp

r250251	r250252
127	127	//  hd6309_device - constructor
128	128	//-------------------------------------------------
129	129
130		hd6309_device::hd6309_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
131		: m6809_base_device(mconfig, "HD6309", tag, owner, clock, HD6309, 4, "hd6309", __FILE__)
	130	hd6309_device::hd6309_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
	131	m6809_base_device(mconfig, "HD6309", tag, owner, clock, HD6309, 4, "hd6309", __FILE__),
	132	m_md(0),
	133	m_temp_im(0)
132	134	{
133	135	}
134	136
r250251	r250252
450	452
451	453	inline m6809_base_device::exgtfr_register hd6309_device::read_exgtfr_register(UINT8 reg)
452	454	{
453		UINT16 value = 0;
	455	UINT16 value;
454	456
455	457	switch(reg & 0x0F)
456	458	{

trunk/src/devices/cpu/sh2/sh2comn.cpp

r250251	r250252
13	13	#include "sh2.h"
14	14	#include "sh2comn.h"
15	15
16
17		// for now, make buggy GCC/Mingw STFU about I64FMT
18		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
19		#pragma GCC diagnostic push
20		#pragma GCC diagnostic ignored "-Wformat"
21		#pragma GCC diagnostic ignored "-Wformat-extra-args"
22		#endif
23
24	16	#define VERBOSE 0
25	17
26	18	#define LOG(x)  do { if (VERBOSE) logerror x; } while (0)
r250251	r250252
1022	1014	{
1023	1015	COMBINE_DATA(&m_sh7021_regs[offset]);
1024	1016	}
1025		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
1026		#pragma GCC diagnostic pop
1027		#endif

trunk/src/devices/cpu/tms32031/32031ops.cpp

r250251	r250252
1		// license:BSD-3-Clause
2		// copyright-holders:Aaron Giles
3		/***************************************************************************
4
5		32031ops.cpp
6
7		TMS32031/2 emulator
8
9		***************************************************************************/
10
11
12		//**************************************************************************
13		//  COMPILE-TIME OPTIONS
14		//**************************************************************************
15
16		#define USE_FP              0
17
18
19
20		//**************************************************************************
21		//  MACROS
22		//**************************************************************************
23
24		#define IREG(rnum)          (m_r[rnum].i32[0])
25		#define FREGEXP(rnum)       (m_r[rnum].exponent())
26		#define FREGMAN(rnum)       (m_r[rnum].mantissa())
27
28		#define FP2LONG(rnum)       ((FREGEXP(rnum) << 24) | ((UINT32)FREGMAN(rnum) >> 8))
29		#define LONG2FP(rnum,v)     do { m_r[rnum].set_mantissa((v) << 8); m_r[rnum].set_exponent((INT32)(v) >> 24); } while (0)
30		#define SHORT2FP(rnum,v)    do { \
31		if ((UINT16)(v) == 0x8000) { m_r[rnum].set_mantissa(0); m_r[rnum].set_exponent(-128); } \
32		else { m_r[rnum].set_mantissa((v) << 20); m_r[rnum].set_exponent((INT16)(v) >> 12); } \
33		} while (0)
34
35		#define DIRECT(op)              (((IREG(TMR_DP) & 0xff) << 16) | ((UINT16)op))
36		#define INDIRECT_D(op,o)        ((this->*s_indirect_d[((o) >> 3) & 31])(op,o))
37		#define INDIRECT_1(op,o)        ((this->*s_indirect_1[((o) >> 3) & 31])(op,o))
38		#define INDIRECT_1_DEF(op,o)    ((this->*s_indirect_1_def[((o) >> 3) & 31])(op,o,defptr))
39
40		#define SIGN(val)           ((val) & 0x80000000)
41
42		#define OVERFLOW_SUB(a,b,r) ((INT32)(((a) ^ (b)) & ((a) ^ (r))) < 0)
43		#define OVERFLOW_ADD(a,b,r) ((INT32)(((a) ^ (r)) & ((b) ^ (r))) < 0)
44
45		#define CLR_FLAGS(f)        do { IREG(TMR_ST) &= ~(f); } while (0)
46		#define CLR_NVUF()          CLR_FLAGS(NFLAG | VFLAG | UFFLAG)
47		#define CLR_NZVUF()         CLR_FLAGS(NFLAG | ZFLAG | VFLAG | UFFLAG)
48		#define CLR_NZCVUF()        CLR_FLAGS(NFLAG | ZFLAG | VFLAG | CFLAG | UFFLAG)
49
50		#define OR_C(flag)          do { IREG(TMR_ST) |= flag & CFLAG; } while (0)
51		#define OR_NZ(val)          do { IREG(TMR_ST) |= (((val) >> 28) & NFLAG) | (((val) == 0) << 2); } while (0)
52		#define OR_NZF(reg)         do { IREG(TMR_ST) |= ((reg.mantissa() >> 28) & NFLAG) | ((reg.exponent() == -128) << 2); } while (0)
53		#define OR_NUF(reg)         do { int temp = (reg.exponent() == -128) << 4; IREG(TMR_ST) |= ((reg.mantissa() >> 28) & NFLAG) | (temp) | (temp << 2); } while (0)
54		#define OR_V_SUB(a,b,r)     do { UINT32 temp = ((((a) ^ (b)) & ((a) ^ (r))) >> 30) & VFLAG; IREG(TMR_ST) |= temp | (temp << 4); } while (0)
55		#define OR_V_ADD(a,b,r)     do { UINT32 temp = ((((a) ^ (r)) & ((b) ^ (r))) >> 30) & VFLAG; IREG(TMR_ST) |= temp | (temp << 4); } while (0)
56		#define OR_C_SUB(a,b,r)     do { IREG(TMR_ST) |= ((UINT32)(b) > (UINT32)(a)); } while (0)
57		#define OR_C_ADD(a,b,r)     do { IREG(TMR_ST) |= ((UINT32)(a) > (UINT32)(r)); } while (0)
58		#define OR_C_SBB(a,b,c)     do { INT64 temp = (INT64)(a) - (UINT32)(b) - (UINT32)(c); IREG(TMR_ST) |= (temp < 0); } while (0)
59		#define OR_C_ADC(a,b,c)     do { UINT64 temp = (UINT64)(a) + (UINT32)(b) + (UINT32)(c); IREG(TMR_ST) |= (temp > 0xffffffff); } while (0)
60
61		#define OVM()               (IREG(TMR_ST) & OVMFLAG)
62
63		#define DECLARE_DEF         UINT32 defval; UINT32 *defptr = &defval
64		#define UPDATE_DEF()        *defptr = defval
65
66
67
68		//**************************************************************************
69		//  IMPLEMENTATION
70		//**************************************************************************
71
72		void tms3203x_device::illegal(UINT32 op)
73		{
74		if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
75		{
76		logerror("Illegal op @ %06X: %08X (tbl=%03X)\n", m_pc - 1, op, op >> 21);
77		debugger_break(machine());
78		}
79		}
80
81
82		void tms3203x_device::unimplemented(UINT32 op)
83		{
84		fatalerror("Unimplemented op @ %06X: %08X (tbl=%03X)\n", m_pc - 1, op, op >> 21);
85		}
86
87
88		inline void tms3203x_device::execute_one()
89		{
90		UINT32 op = ROPCODE(m_pc);
91		m_icount -= 2;  // 2 clocks per cycle
92		m_pc++;
93		#if (TMS_3203X_LOG_OPCODE_USAGE)
94		m_hits[op >> 21]++;
95		#endif
96		(this->*s_tms32031ops[op >> 21])(op);
97		}
98
99
100		void tms3203x_device::update_special(int dreg)
101		{
102		if (dreg == TMR_BK)
103		{
104		UINT32 temp = IREG(TMR_BK);
105		m_bkmask = temp;
106		while (temp >>= 1)
107		m_bkmask |= temp;
108		}
109		else if (dreg == TMR_IOF)
110		{
111		if (IREG(TMR_IOF) & 0x002)
112		m_xf0_cb((offs_t)0, (IREG(TMR_IOF) >> 2) & 1);
113		if (IREG(TMR_IOF) & 0x020)
114		m_xf1_cb((offs_t)0, (IREG(TMR_IOF) >> 6) & 1);
115		}
116		else if (dreg == TMR_ST || dreg == TMR_IF || dreg == TMR_IE)
117		check_irqs();
118		}
119
120
121
122		//**************************************************************************
123		//  CONDITION CODES
124		//**************************************************************************
125
126		const UINT32 C_LO = 1 << 1;
127		const UINT32 C_LS = 1 << 2;
128		const UINT32 C_HI = 1 << 3;
129		const UINT32 C_HS = 1 << 4;
130		const UINT32 C_EQ = 1 << 5;
131		const UINT32 C_NE = 1 << 6;
132		const UINT32 C_LT = 1 << 7;
133		const UINT32 C_LE = 1 << 8;
134		const UINT32 C_GT = 1 << 9;
135		const UINT32 C_GE = 1 << 10;
136		const UINT32 C_NV = 1 << 12;
137		const UINT32 C_V = 1 << 13;
138		const UINT32 C_NUF = 1 << 14;
139		const UINT32 C_UF = 1 << 15;
140		const UINT32 C_NLV = 1 << 16;
141		const UINT32 C_LV = 1 << 17;
142		const UINT32 C_NLUF = 1 << 18;
143		const UINT32 C_LUF = 1 << 19;
144		const UINT32 C_ZUF = 1 << 20;
145
146		const UINT32 condition_table[0x80] =
147		{
148		/* ------- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_NLV | C_NLUF,
149		/* ------C */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_NLV | C_NLUF,
150		/* -----V- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V  | C_NUF | C_NLV | C_NLUF,
151		/* -----VC */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V  | C_NUF | C_NLV | C_NLUF,
152		/* ----Z-- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_NLV | C_NLUF | C_ZUF,
153		/* ----Z-C */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_NLV | C_NLUF | C_ZUF,
154		/* ----ZV- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V  | C_NUF | C_NLV | C_NLUF | C_ZUF,
155		/* ----ZVC */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V  | C_NUF | C_NLV | C_NLUF | C_ZUF,
156		/* ---N--- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_NLUF,
157		/* ---N--C */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_NLUF,
158		/* ---N-V- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V  | C_NUF | C_NLV | C_NLUF,
159		/* ---N-VC */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V  | C_NUF | C_NLV | C_NLUF,
160		/* ---NZ-- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_NLUF | C_ZUF,
161		/* ---NZ-C */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_NLUF | C_ZUF,
162		/* ---NZV- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V  | C_NUF | C_NLV | C_NLUF | C_ZUF,
163		/* ---NZVC */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V  | C_NUF | C_NLV | C_NLUF | C_ZUF,
164		/* --U---- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_UF  | C_NLV | C_NLUF | C_ZUF,
165		/* --U---C */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_UF  | C_NLV | C_NLUF | C_ZUF,
166		/* --U--V- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V  | C_UF  | C_NLV | C_NLUF | C_ZUF,
167		/* --U--VC */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V  | C_UF  | C_NLV | C_NLUF | C_ZUF,
168		/* --U-Z-- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_UF  | C_NLV | C_NLUF | C_ZUF,
169		/* --U-Z-C */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_UF  | C_NLV | C_NLUF | C_ZUF,
170		/* --U-ZV- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V  | C_UF  | C_NLV | C_NLUF | C_ZUF,
171		/* --U-ZVC */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V  | C_UF  | C_NLV | C_NLUF | C_ZUF,
172		/* --UN--- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_UF  | C_NLV | C_NLUF | C_ZUF,
173		/* --UN--C */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_UF  | C_NLV | C_NLUF | C_ZUF,
174		/* --UN-V- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V  | C_UF  | C_NLV | C_NLUF | C_ZUF,
175		/* --UN-VC */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V  | C_UF  | C_NLV | C_NLUF | C_ZUF,
176		/* --UNZ-- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_UF  | C_NLV | C_NLUF | C_ZUF,
177		/* --UNZ-C */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_UF  | C_NLV | C_NLUF | C_ZUF,
178		/* --UNZV- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V  | C_UF  | C_NLV | C_NLUF | C_ZUF,
179		/* --UNZVC */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V  | C_UF  | C_NLV | C_NLUF | C_ZUF,
180		/* -v----- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_LV  | C_NLUF,
181		/* -v----C */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_LV  | C_NLUF,
182		/* -v---V- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V  | C_NUF | C_LV  | C_NLUF,
183		/* -v---VC */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V  | C_NUF | C_LV  | C_NLUF,
184		/* -v--Z-- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_LV  | C_NLUF | C_ZUF,
185		/* -v--Z-C */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_LV  | C_NLUF | C_ZUF,
186		/* -v--ZV- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V  | C_NUF | C_LV  | C_NLUF | C_ZUF,
187		/* -v--ZVC */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V  | C_NUF | C_LV  | C_NLUF | C_ZUF,
188		/* -v-N--- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_LV  | C_NLUF,
189		/* -v-N--C */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_LV  | C_NLUF,
190		/* -v-N-V- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V  | C_NUF | C_LV  | C_NLUF,
191		/* -v-N-VC */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V  | C_NUF | C_LV  | C_NLUF,
192		/* -v-NZ-- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_LV  | C_NLUF | C_ZUF,
193		/* -v-NZ-C */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_LV  | C_NLUF | C_ZUF,
194		/* -v-NZV- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V  | C_NUF | C_LV  | C_NLUF | C_ZUF,
195		/* -v-NZVC */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V  | C_NUF | C_LV  | C_NLUF | C_ZUF,
196		/* -vU---- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_UF  | C_LV  | C_NLUF | C_ZUF,
197		/* -vU---C */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_UF  | C_LV  | C_NLUF | C_ZUF,
198		/* -vU--V- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V  | C_UF  | C_LV  | C_NLUF | C_ZUF,
199		/* -vU--VC */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V  | C_UF  | C_LV  | C_NLUF | C_ZUF,
200		/* -vU-Z-- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_UF  | C_LV  | C_NLUF | C_ZUF,
201		/* -vU-Z-C */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_UF  | C_LV  | C_NLUF | C_ZUF,
202		/* -vU-ZV- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V  | C_UF  | C_LV  | C_NLUF | C_ZUF,
203		/* -vU-ZVC */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V  | C_UF  | C_LV  | C_NLUF | C_ZUF,
204		/* -vUN--- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_UF  | C_LV  | C_NLUF | C_ZUF,
205		/* -vUN--C */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_UF  | C_LV  | C_NLUF | C_ZUF,
206		/* -vUN-V- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V  | C_UF  | C_LV  | C_NLUF | C_ZUF,
207		/* -vUN-VC */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V  | C_UF  | C_LV  | C_NLUF | C_ZUF,
208		/* -vUNZ-- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_UF  | C_LV  | C_NLUF | C_ZUF,
209		/* -vUNZ-C */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_UF  | C_LV  | C_NLUF | C_ZUF,
210		/* -vUNZV- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V  | C_UF  | C_LV  | C_NLUF | C_ZUF,
211		/* -vUNZVC */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V  | C_UF  | C_LV  | C_NLUF | C_ZUF,
212		/* u------ */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_NLV | C_LUF,
213		/* u-----C */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_NLV | C_LUF,
214		/* u----V- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V  | C_NUF | C_NLV | C_LUF,
215		/* u----VC */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V  | C_NUF | C_NLV | C_LUF,
216		/* u---Z-- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_NLV | C_LUF  | C_ZUF,
217		/* u---Z-C */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_NLV | C_LUF  | C_ZUF,
218		/* u---ZV- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V  | C_NUF | C_NLV | C_LUF  | C_ZUF,
219		/* u---ZVC */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V  | C_NUF | C_NLV | C_LUF  | C_ZUF,
220		/* u--N--- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_LUF,
221		/* u--N--C */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_LUF,
222		/* u--N-V- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V  | C_NUF | C_NLV | C_LUF,
223		/* u--N-VC */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V  | C_NUF | C_NLV | C_LUF,
224		/* u--NZ-- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_LUF  | C_ZUF,
225		/* u--NZ-C */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_LUF  | C_ZUF,
226		/* u--NZV- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V  | C_NUF | C_NLV | C_LUF  | C_ZUF,
227		/* u--NZVC */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V  | C_NUF | C_NLV | C_LUF  | C_ZUF,
228		/* u-U---- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_UF  | C_NLV | C_LUF  | C_ZUF,
229		/* u-U---C */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_UF  | C_NLV | C_LUF  | C_ZUF,
230		/* u-U--V- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V  | C_UF  | C_NLV | C_LUF  | C_ZUF,
231		/* u-U--VC */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V  | C_UF  | C_NLV | C_LUF  | C_ZUF,
232		/* u-U-Z-- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_UF  | C_NLV | C_LUF  | C_ZUF,
233		/* u-U-Z-C */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_UF  | C_NLV | C_LUF  | C_ZUF,
234		/* u-U-ZV- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V  | C_UF  | C_NLV | C_LUF  | C_ZUF,
235		/* u-U-ZVC */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V  | C_UF  | C_NLV | C_LUF  | C_ZUF,
236		/* u-UN--- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_UF  | C_NLV | C_LUF  | C_ZUF,
237		/* u-UN--C */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_UF  | C_NLV | C_LUF  | C_ZUF,
238		/* u-UN-V- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V  | C_UF  | C_NLV | C_LUF  | C_ZUF,
239		/* u-UN-VC */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V  | C_UF  | C_NLV | C_LUF  | C_ZUF,
240		/* u-UNZ-- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_UF  | C_NLV | C_LUF  | C_ZUF,
241		/* u-UNZ-C */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_UF  | C_NLV | C_LUF  | C_ZUF,
242		/* u-UNZV- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V  | C_UF  | C_NLV | C_LUF  | C_ZUF,
243		/* u-UNZVC */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V  | C_UF  | C_NLV | C_LUF  | C_ZUF,
244		/* uv----- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_LV  | C_LUF,
245		/* uv----C */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_LV  | C_LUF,
246		/* uv---V- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V  | C_NUF | C_LV  | C_LUF,
247		/* uv---VC */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V  | C_NUF | C_LV  | C_LUF,
248		/* uv--Z-- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_LV  | C_LUF  | C_ZUF,
249		/* uv--Z-C */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_LV  | C_LUF  | C_ZUF,
250		/* uv--ZV- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V  | C_NUF | C_LV  | C_LUF  | C_ZUF,
251		/* uv--ZVC */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V  | C_NUF | C_LV  | C_LUF  | C_ZUF,
252		/* uv-N--- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_LV  | C_LUF,
253		/* uv-N--C */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_LV  | C_LUF,
254		/* uv-N-V- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V  | C_NUF | C_LV  | C_LUF,
255		/* uv-N-VC */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V  | C_NUF | C_LV  | C_LUF,
256		/* uv-NZ-- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_LV  | C_LUF  | C_ZUF,
257		/* uv-NZ-C */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_LV  | C_LUF  | C_ZUF,
258		/* uv-NZV- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V  | C_NUF | C_LV  | C_LUF  | C_ZUF,
259		/* uv-NZVC */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V  | C_NUF | C_LV  | C_LUF  | C_ZUF,
260		/* uvU---- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_UF  | C_LV  | C_LUF  | C_ZUF,
261		/* uvU---C */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_UF  | C_LV  | C_LUF  | C_ZUF,
262		/* uvU--V- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V  | C_UF  | C_LV  | C_LUF  | C_ZUF,
263		/* uvU--VC */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V  | C_UF  | C_LV  | C_LUF  | C_ZUF,
264		/* uvU-Z-- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_UF  | C_LV  | C_LUF  | C_ZUF,
265		/* uvU-Z-C */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_UF  | C_LV  | C_LUF  | C_ZUF,
266		/* uvU-ZV- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V  | C_UF  | C_LV  | C_LUF  | C_ZUF,
267		/* uvU-ZVC */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V  | C_UF  | C_LV  | C_LUF  | C_ZUF,
268		/* uvUN--- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_UF  | C_LV  | C_LUF  | C_ZUF,
269		/* uvUN--C */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_UF  | C_LV  | C_LUF  | C_ZUF,
270		/* uvUN-V- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V  | C_UF  | C_LV  | C_LUF  | C_ZUF,
271		/* uvUN-VC */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V  | C_UF  | C_LV  | C_LUF  | C_ZUF,
272		/* uvUNZ-- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_UF  | C_LV  | C_LUF  | C_ZUF,
273		/* uvUNZ-C */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_UF  | C_LV  | C_LUF  | C_ZUF,
274		/* uvUNZV- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V  | C_UF  | C_LV  | C_LUF  | C_ZUF,
275		/* uvUNZVC */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V  | C_UF  | C_LV  | C_LUF  | C_ZUF,
276		};
277
278		#define CONDITION_LO()      (IREG(TMR_ST) & CFLAG)
279		#define CONDITION_LS()      (IREG(TMR_ST) & (CFLAG | ZFLAG))
280		#define CONDITION_HI()      (!(IREG(TMR_ST) & (CFLAG | ZFLAG)))
281		#define CONDITION_HS()      (!(IREG(TMR_ST) & CFLAG))
282		#define CONDITION_EQ()      (IREG(TMR_ST) & ZFLAG)
283		#define CONDITION_NE()      (!(IREG(TMR_ST) & ZFLAG))
284		#define CONDITION_LT()      (IREG(TMR_ST) & NFLAG)
285		#define CONDITION_LE()      (IREG(TMR_ST) & (NFLAG | ZFLAG))
286		#define CONDITION_GT()      (!(IREG(TMR_ST) & (NFLAG | ZFLAG)))
287		#define CONDITION_GE()      (!(IREG(TMR_ST) & NFLAG))
288		#define CONDITION_NV()      (!(IREG(TMR_ST) & VFLAG))
289		#define CONDITION_V()       (IREG(TMR_ST) & VFLAG)
290		#define CONDITION_NUF()     (!(IREG(TMR_ST) & UFFLAG))
291		#define CONDITION_UF()      (IREG(TMR_ST) & UFFLAG)
292		#define CONDITION_NLV()     (!(IREG(TMR_ST) & LVFLAG))
293		#define CONDITION_LV()      (IREG(TMR_ST) & LVFLAG)
294		#define CONDITION_NLUF()    (!(IREG(TMR_ST) & LUFFLAG))
295		#define CONDITION_LUF()     (IREG(TMR_ST) & LUFFLAG)
296		#define CONDITION_ZUF()     (IREG(TMR_ST) & (UFFLAG | ZFLAG))
297
298		inline bool tms3203x_device::condition(int which)
299		{
300		return (condition_table[IREG(TMR_ST) & (LUFFLAG | LVFLAG | UFFLAG | NFLAG | ZFLAG | VFLAG | CFLAG)] >> (which & 31)) & 1;
301		}
302
303
304
305		//**************************************************************************
306		//  FLOATING POINT HELPERS
307		//**************************************************************************
308
309		#if USE_FP
310		void tms3203x_device::double_to_dsp_with_flags(double val, tmsreg &result)
311		{
312		int_double id;
313		id.d = val;
314
315		CLR_NZVUF();
316
317		int mantissa = ((id.i[BYTE_XOR_BE(0)] & 0x000fffff) << 11) | ((id.i[BYTE_XOR_BE(1)] & 0xffe00000) >> 21);
318		int exponent = ((id.i[BYTE_XOR_BE(0)] & 0x7ff00000) >> 20) - 1023;
319		if (exponent <= -128)
320		{
321		result.set_mantissa(0);
322		result.set_exponent(-128);
323		IREG(TMR_ST) |= UFFLAG | LUFFLAG | ZFLAG;
324		}
325		else if (exponent > 127)
326		{
327		if ((INT32)id.i[BYTE_XOR_BE(0)] >= 0)
328		result.set_mantissa(0x7fffffff);
329		else
330		{
331		result.set_mantissa(0x80000001);
332		IREG(TMR_ST) |= NFLAG;
333		}
334		result.set_exponent(127);
335		IREG(TMR_ST) |= VFLAG | LVFLAG;
336		}
337		else if (val == 0)
338		{
339		result.set_mantissa(0);
340		result.set_exponent(-128);
341		IREG(TMR_ST) |= ZFLAG;
342		}
343		else if ((INT32)id.i[BYTE_XOR_BE(0)] >= 0)
344		{
345		result.set_mantissa(mantissa);
346		result.set_exponent(exponent);
347		}
348		else if (mantissa != 0)
349		{
350		result.set_mantissa(0x80000000 | -mantissa);
351		result.set_exponent(exponent);
352		IREG(TMR_ST) |= NFLAG;
353		}
354		else
355		{
356		result.set_mantissa(0x80000000);
357		result.set_exponent(exponent - 1);
358		IREG(TMR_ST) |= NFLAG;
359		}
360		}
361		#endif
362
363		// integer to floating point conversion
364		#if USE_FP
365		void tms3203x_device::int2float(tmsreg &srcdst)
366		{
367		double val = srcdst.mantissa();
368		double_to_dsp_with_flags(val, srcdst);
369		}
370		#else
371		void tms3203x_device::int2float(tmsreg &srcdst)
372		{
373		UINT32 man = srcdst.mantissa();
374		int exp, cnt;
375
376		// never overflows or underflows
377		CLR_NZVUF();
378
379		// 0 always has exponent of -128
380		if (man == 0)
381		{
382		man = 0x80000000;
383		exp = -128;
384		}
385
386		// check for -1 here because count_leading_ones will infinite loop
387		else if (man == (UINT32)-1)
388		{
389		man = 0;
390		exp = -1;
391		}
392
393		// positive values; count leading zeros and shift
394		else if ((INT32)man > 0)
395		{
396		cnt = count_leading_zeros(man);
397		man <<= cnt;
398		exp = 31 - cnt;
399		}
400
401		// negative values; count leading ones and shift
402		else
403		{
404		cnt = count_leading_ones(man);
405		man <<= cnt;
406		exp = 31 - cnt;
407		}
408
409		// set the final results and compute NZ
410		srcdst.set_mantissa(man ^ 0x80000000);
411		srcdst.set_exponent(exp);
412		OR_NZF(srcdst);
413		}
414		#endif
415
416
417		// floating point to integer conversion
418		#if USE_FP
419		void tms3203x_device::float2int(tmsreg &srcdst, int setflags)
420		{
421		INT32 val;
422
423		if (setflags) CLR_NZVUF();
424		if (srcdst.exponent() > 30)
425		{
426		if ((INT32)srcdst.mantissa() >= 0)
427		val = 0x7fffffff;
428		else
429		val = 0x80000000;
430		if (setflags) IREG(TMR_ST) |= VFLAG | LVFLAG;
431		}
432		else
433		val = floor(srcdst.as_double());
434		srcdst.set_mantissa(val);
435		if (setflags) OR_NZ(val);
436		}
437		#else
438		void tms3203x_device::float2int(tmsreg &srcdst, bool setflags)
439		{
440		INT32 man = srcdst.mantissa();
441		int shift = 31 - srcdst.exponent();
442
443		// never underflows
444		if (setflags) CLR_NZVUF();
445
446		// if we've got too much to handle, overflow
447		if (shift <= 0)
448		{
449		srcdst.set_mantissa((man >= 0) ? 0x7fffffff : 0x80000000);
450		if (setflags) IREG(TMR_ST) |= VFLAG | LVFLAG;
451		}
452
453		// if we're too small, go to 0 or -1
454		else if (shift > 31)
455		srcdst.set_mantissa(man >> 31);
456
457		// we're in the middle; shift it
458		else
459		srcdst.set_mantissa((man >> shift) ^ (1 << (31 - shift)));
460
461		// set the NZ flags
462		if (setflags) OR_NZ(srcdst.mantissa());
463		}
464		#endif
465
466
467		// compute the negative of a floating point value
468		#if USE_FP
469		void tms3203x_device::negf(tmsreg &dst, tmsreg tmsreg &src)
470		{
471		double val = -src.as_double();
472		double_to_dsp_with_flags(val, dst);
473		}
474		#else
475		void tms3203x_device::negf(tmsreg &dst, tmsreg &src)
476		{
477		INT32 man = src.mantissa();
478
479		CLR_NZVUF();
480
481		if (src.exponent() == -128)
482		{
483		dst.set_mantissa(0);
484		dst.set_exponent(-128);
485		}
486		else if ((man & 0x7fffffff) != 0)
487		{
488		dst.set_mantissa(-man);
489		dst.set_exponent(src.exponent());
490		}
491		else
492		{
493		dst.set_mantissa(man ^ 0x80000000);
494		if (man == 0)
495		dst.set_exponent(src.exponent() - 1);
496		else
497		dst.set_exponent(src.exponent() + 1);
498		}
499		OR_NZF(dst);
500		}
501		#endif
502
503
504
505		// add two floating point values
506		#if USE_FP
507		void tms3203x_device::addf(tmsreg &dst, tmsreg &src1, tmsreg &src2)
508		{
509		double val = src1.as_double() + src2.as_double();
510		double_to_dsp_with_flags(val, dst);
511		}
512		#else
513		void tms3203x_device::addf(tmsreg &dst, tmsreg &src1, tmsreg &src2)
514		{
515		INT64 man;
516		INT64 m1, m2;
517		int exp, cnt;
518
519		// reset over/underflow conditions
520		CLR_NZVUF();
521
522		// first check for 0 operands
523		if (src1.exponent() == -128)
524		{
525		dst = src2;
526		OR_NZF(dst);
527		return;
528		}
529		if (src2.exponent() == -128)
530		{
531		dst = src1;
532		OR_NZF(dst);
533		return;
534		}
535
536		// extract mantissas from 1.0.31 values to 1.1.31 values
537		m1 = (INT64)src1.mantissa() ^ 0x80000000;
538		m2 = (INT64)src2.mantissa() ^ 0x80000000;
539
540		// normalize based on the exponent
541		if (src1.exponent() > src2.exponent())
542		{
543		exp = src1.exponent();
544		cnt = exp - src2.exponent();
545		if (cnt >= 32)
546		{
547		dst = src1;
548		OR_NZF(dst);
549		return;
550		}
551		m2 >>= cnt;
552		}
553		else
554		{
555		exp = src2.exponent();
556		cnt = exp - src1.exponent();
557		if (cnt >= 32)
558		{
559		dst = src2;
560		OR_NZF(dst);
561		return;
562		}
563		m1 >>= cnt;
564		}
565
566		// add
567		man = m1 + m2;
568
569		// if the mantissa is zero, set the exponent appropriately
570		if (man == 0 || exp == -128)
571		{
572		exp = -128;
573		man = 0x80000000;
574		}
575
576		// if the mantissa is >= 2.0 or < -2.0, normalize
577		else if (man >= ((INT64)2 << 31) || man < ((INT64)-2 << 31))
578		{
579		man >>= 1;
580		exp++;
581		}
582
583		// if the mantissa is < 1.0 and > -1.0, normalize
584		else if (man < ((INT64)1 << 31) && man >= ((INT64)-1 << 31))
585		{
586		if (man > 0)
587		{
588		cnt = count_leading_zeros((UINT32)man);
589		man <<= cnt;
590		exp -= cnt;
591		}
592		else
593		{
594		cnt = count_leading_ones((UINT32)man);
595		man <<= cnt;
596		exp -= cnt;
597		}
598		}
599
600		// check for underflow
601		if (exp <= -128)
602		{
603		man = 0x80000000;
604		exp = -128;
605		IREG(TMR_ST) |= UFFLAG | LUFFLAG;
606		}
607
608		// check for overflow
609		else if (exp > 127)
610		{
611		man = (man < 0) ? 0x00000000 : 0xffffffff;
612		exp = 127;
613		IREG(TMR_ST) |= VFLAG | LVFLAG;
614		}
615
616		// store the result back, removing the implicit one and putting
617		// back the sign bit
618		dst.set_mantissa((UINT32)man ^ 0x80000000);
619		dst.set_exponent(exp);
620		OR_NZF(dst);
621		}
622		#endif
623
624
625		// subtract two floating point values
626		#if USE_FP
627		void tms3203x_device::subf(tmsreg &dst, tmsreg &src1, tmsreg &src2)
628		{
629		double val = src1.as_double() - src2.as_double();
630		double_to_dsp_with_flags(val, dst);
631		}
632		#else
633		void tms3203x_device::subf(tmsreg &dst, tmsreg &src1, tmsreg &src2)
634		{
635		INT64 man;
636		INT64 m1, m2;
637		int exp, cnt;
638
639		// reset over/underflow conditions
640		CLR_NZVUF();
641
642		// first check for 0 operands
643		if (src2.exponent() == -128)
644		{
645		dst = src1;
646		OR_NZF(dst);
647		return;
648		}
649
650		// extract mantissas from 1.0.31 values to 1.1.31 values
651		m1 = (INT64)src1.mantissa() ^ 0x80000000;
652		m2 = (INT64)src2.mantissa() ^ 0x80000000;
653
654		// normalize based on the exponent
655		if (src1.exponent() > src2.exponent())
656		{
657		exp = src1.exponent();
658		cnt = exp - src2.exponent();
659		if (cnt >= 32)
660		{
661		dst = src1;
662		OR_NZF(dst);
663		return;
664		}
665		m2 >>= cnt;
666		}
667		else
668		{
669		exp = src2.exponent();
670		cnt = exp - src1.exponent();
671		if (cnt >= 32)
672		{
673		negf(dst, src2);
674		return;
675		}
676		m1 >>= cnt;
677		}
678
679		// subtract
680		man = m1 - m2;
681
682		// if the mantissa is zero, set the exponent appropriately
683		if (man == 0 || exp == -128)
684		{
685		exp = -128;
686		man = 0x80000000;
687		}
688
689		// if the mantissa is >= 2.0 or < -2.0, normalize
690		else if (man >= ((INT64)2 << 31) || man < ((INT64)-2 << 31))
691		{
692		man >>= 1;
693		exp++;
694		}
695
696		// if the mantissa is < 1.0 and > -1.0, normalize
697		else if (man < ((INT64)1 << 31) && man >= ((INT64)-1 << 31))
698		{
699		if (man > 0)
700		{
701		cnt = count_leading_zeros((UINT32)man);
702		man <<= cnt;
703		exp -= cnt;
704		}
705		else
706		{
707		cnt = count_leading_ones((UINT32)man);
708		man <<= cnt;
709		exp -= cnt;
710		}
711		}
712
713		// check for underflow
714		if (exp <= -128)
715		{
716		// make sure a 0 result doesn't set underflow
717		if (man != 0 || exp < -128)
718		IREG(TMR_ST) |= UFFLAG | LUFFLAG;
719		man = 0x80000000;
720		exp = -128;
721		}
722
723		// check for overflow
724		else if (exp > 127)
725		{
726		man = (man < 0) ? 0x00000000 : 0xffffffff;
727		exp = 127;
728		IREG(TMR_ST) |= VFLAG | LVFLAG;
729		}
730
731		// store the result back, removing the implicit one and putting
732		// back the sign bit
733		dst.set_mantissa((UINT32)man ^ 0x80000000);
734		dst.set_exponent(exp);
735		OR_NZF(dst);
736		}
737		#endif
738
739
740		// multiply two floating point values
741		#if USE_FP
742		void tms3203x_device::mpyf(tmsreg &dst, tmsreg &src1, tmsreg &src2)
743		{
744		double val = (double)src1.as_float() * (double)src2.as_float();
745		double_to_dsp_with_flags(val, dst);
746		}
747		#else
748		void tms3203x_device::mpyf(tmsreg &dst, tmsreg &src1, tmsreg &src2)
749		{
750		// reset over/underflow conditions
751		CLR_NZVUF();
752
753		// first check for 0 multipliers and return 0 in any case
754		if (src1.exponent() == -128 || src2.exponent() == -128)
755		{
756		dst.set_mantissa(0);
757		dst.set_exponent(-128);
758		OR_NZF(dst);
759		return;
760		}
761
762		// convert the mantissas from 1.0.31 numbers to 1.1.23 numbers
763		INT32 m1 = (src1.mantissa() >> 8) ^ 0x800000;
764		INT32 m2 = (src2.mantissa() >> 8) ^ 0x800000;
765
766		// multiply the mantissas and add the exponents
767		INT64 man = (INT64)m1 * (INT64)m2;
768		int exp = src1.exponent() + src2.exponent();
769
770		// chop off the low bits, going from 1.2.46 down to 1.2.31
771		man >>= 46 - 31;
772
773		// if the mantissa is zero, set the exponent appropriately
774		if (man == 0)
775		{
776		exp = -128;
777		man = 0x80000000;
778		}
779
780		// if the mantissa is >= 2.0 or <= -2.0, normalize
781		else if (man >= ((INT64)2 << 31))
782		{
783		man >>= 1;
784		exp++;
785		if (man >= ((INT64)2 << 31))
786		{
787		man >>= 1;
788		exp++;
789		}
790		}
791
792		// if the mantissa is >= 2.0 or <= -2.0, normalize
793		else if (man < ((INT64)-2 << 31))
794		{
795		man >>= 1;
796		exp++;
797		}
798
799		// check for underflow
800		if (exp <= -128)
801		{
802		man = 0x80000000;
803		exp = -128;
804		IREG(TMR_ST) |= UFFLAG | LUFFLAG;
805		}
806
807		// check for overflow
808		else if (exp > 127)
809		{
810		man = (man < 0) ? 0x00000000 : 0xffffffff;
811		exp = 127;
812		IREG(TMR_ST) |= VFLAG | LVFLAG;
813		}
814
815		// store the result back, removing the implicit one and putting
816		// back the sign bit
817		dst.set_mantissa((UINT32)man ^ 0x80000000);
818		dst.set_exponent(exp);
819		OR_NZF(dst);
820		}
821		#endif
822
823
824		// normalize a floating point value
825		#if USE_FP
826		void tms3203x_device::norm(tmsreg &dst, tmsreg &src)
827		{
828		fatalerror("norm not implemented\n");
829		}
830		#else
831		void tms3203x_device::norm(tmsreg &dst, tmsreg &src)
832		{
833		INT32 man = src.mantissa();
834		int exp = src.exponent();
835
836		CLR_NZVUF();
837
838		if (exp == -128 || man == 0)
839		{
840		dst.set_mantissa(0);
841		dst.set_exponent(-128);
842		if (man != 0)
843		IREG(TMR_ST) |= UFFLAG | LUFFLAG;
844		}
845		else
846		{
847		int cnt;
848		if (man > 0)
849		{
850		cnt = count_leading_zeros((UINT32)man);
851		man <<= cnt;
852		exp -= cnt;
853		}
854		else
855		{
856		cnt = count_leading_ones((UINT32)man);
857		man <<= cnt;
858		exp -= cnt;
859		}
860
861		// check for underflow
862		if (exp <= -128)
863		{
864		man = 0x00000000;
865		exp = -128;
866		IREG(TMR_ST) |= UFFLAG | LUFFLAG;
867		}
868		}
869
870		dst.set_mantissa(man);
871		dst.set_exponent(exp);
872		OR_NZF(dst);
873		}
874		#endif
875
876
877
878
879		//**************************************************************************
880		//  INDIRECT MEMORY REFS
881		//**************************************************************************
882
883		// immediate displacement variants
884
885		UINT32 tms3203x_device::mod00_d(UINT32 op, UINT8 ar)
886		{
887		int reg = TMR_AR0 + (ar & 7);
888		return IREG(reg) + (UINT8)op;
889		}
890
891		UINT32 tms3203x_device::mod01_d(UINT32 op, UINT8 ar)
892		{
893		int reg = TMR_AR0 + (ar & 7);
894		return IREG(reg) - (UINT8)op;
895		}
896
897		UINT32 tms3203x_device::mod02_d(UINT32 op, UINT8 ar)
898		{
899		int reg = TMR_AR0 + (ar & 7);
900		IREG(reg) += (UINT8)op;
901		return IREG(reg);
902		}
903
904		UINT32 tms3203x_device::mod03_d(UINT32 op, UINT8 ar)
905		{
906		int reg = TMR_AR0 + (ar & 7);
907		IREG(reg) -= (UINT8)op;
908		return IREG(reg);
909		}
910
911		UINT32 tms3203x_device::mod04_d(UINT32 op, UINT8 ar)
912		{
913		int reg = TMR_AR0 + (ar & 7);
914		UINT32 result = IREG(reg);
915		IREG(reg) += (UINT8)op;
916		return result;
917		}
918
919		UINT32 tms3203x_device::mod05_d(UINT32 op, UINT8 ar)
920		{
921		int reg = TMR_AR0 + (ar & 7);
922		UINT32 result = IREG(reg);
923		IREG(reg) -= (UINT8)op;
924		return result;
925		}
926
927		UINT32 tms3203x_device::mod06_d(UINT32 op, UINT8 ar)
928		{
929		int reg = TMR_AR0 + (ar & 7);
930		UINT32 result = IREG(reg);
931		INT32 temp = (result & m_bkmask) + (UINT8)op;
932		if (temp >= IREG(TMR_BK))
933		temp -= IREG(TMR_BK);
934		IREG(reg) = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
935		return result;
936		}
937
938		UINT32 tms3203x_device::mod07_d(UINT32 op, UINT8 ar)
939		{
940		int reg = TMR_AR0 + (ar & 7);
941		UINT32 result = IREG(reg);
942		INT32 temp = (result & m_bkmask) - (UINT8)op;
943		if (temp < 0)
944		temp += IREG(TMR_BK);
945		IREG(reg) = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
946		return result;
947		}
948
949
950		// immediate displacement variants (implied 1)
951
952		UINT32 tms3203x_device::mod00_1(UINT32 op, UINT8 ar)
953		{
954		int reg = TMR_AR0 + (ar & 7);
955		return IREG(reg) + 1;
956		}
957
958		UINT32 tms3203x_device::mod01_1(UINT32 op, UINT8 ar)
959		{
960		int reg = TMR_AR0 + (ar & 7);
961		return IREG(reg) - 1;
962		}
963
964		UINT32 tms3203x_device::mod02_1(UINT32 op, UINT8 ar)
965		{
966		int reg = TMR_AR0 + (ar & 7);
967		return ++IREG(reg);
968		}
969
970		UINT32 tms3203x_device::mod03_1(UINT32 op, UINT8 ar)
971		{
972		int reg = TMR_AR0 + (ar & 7);
973		return --IREG(reg);
974		}
975
976		UINT32 tms3203x_device::mod04_1(UINT32 op, UINT8 ar)
977		{
978		int reg = TMR_AR0 + (ar & 7);
979		return IREG(reg)++;
980		}
981
982		UINT32 tms3203x_device::mod05_1(UINT32 op, UINT8 ar)
983		{
984		int reg = TMR_AR0 + (ar & 7);
985		return IREG(reg)--;
986		}
987
988		UINT32 tms3203x_device::mod06_1(UINT32 op, UINT8 ar)
989		{
990		int reg = TMR_AR0 + (ar & 7);
991		UINT32 result = IREG(reg);
992		INT32 temp = (result & m_bkmask) + 1;
993		if (temp >= IREG(TMR_BK))
994		temp -= IREG(TMR_BK);
995		IREG(reg) = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
996		return result;
997		}
998
999		UINT32 tms3203x_device::mod07_1(UINT32 op, UINT8 ar)
1000		{
1001		int reg = TMR_AR0 + (ar & 7);
1002		UINT32 result = IREG(reg);
1003		INT32 temp = (result & m_bkmask) - 1;
1004		if (temp < 0)
1005		temp += IREG(TMR_BK);
1006		IREG(reg) = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
1007		return result;
1008		}
1009
1010
1011		// IR0 displacement variants
1012
1013		UINT32 tms3203x_device::mod08(UINT32 op, UINT8 ar)
1014		{
1015		int reg = TMR_AR0 + (ar & 7);
1016		return IREG(reg) + IREG(TMR_IR0);
1017		}
1018
1019		UINT32 tms3203x_device::mod09(UINT32 op, UINT8 ar)
1020		{
1021		int reg = TMR_AR0 + (ar & 7);
1022		return IREG(reg) - IREG(TMR_IR0);
1023		}
1024
1025		UINT32 tms3203x_device::mod0a(UINT32 op, UINT8 ar)
1026		{
1027		int reg = TMR_AR0 + (ar & 7);
1028		IREG(reg) += IREG(TMR_IR0);
1029		return IREG(reg);
1030		}
1031
1032		UINT32 tms3203x_device::mod0b(UINT32 op, UINT8 ar)
1033		{
1034		int reg = TMR_AR0 + (ar & 7);
1035		IREG(reg) -= IREG(TMR_IR0);
1036		return IREG(reg);
1037		}
1038
1039		UINT32 tms3203x_device::mod0c(UINT32 op, UINT8 ar)
1040		{
1041		int reg = TMR_AR0 + (ar & 7);
1042		UINT32 result = IREG(reg);
1043		IREG(reg) += IREG(TMR_IR0);
1044		return result;
1045		}
1046
1047		UINT32 tms3203x_device::mod0d(UINT32 op, UINT8 ar)
1048		{
1049		int reg = TMR_AR0 + (ar & 7);
1050		UINT32 result = IREG(reg);
1051		IREG(reg) -= IREG(TMR_IR0);
1052		return result;
1053		}
1054
1055		UINT32 tms3203x_device::mod0e(UINT32 op, UINT8 ar)
1056		{
1057		int reg = TMR_AR0 + (ar & 7);
1058		UINT32 result = IREG(reg);
1059		INT32 temp = (result & m_bkmask) + IREG(TMR_IR0);
1060		if (temp >= IREG(TMR_BK))
1061		temp -= IREG(TMR_BK);
1062		IREG(reg) = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
1063		return result;
1064		}
1065
1066		UINT32 tms3203x_device::mod0f(UINT32 op, UINT8 ar)
1067		{
1068		int reg = TMR_AR0 + (ar & 7);
1069		UINT32 result = IREG(reg);
1070		INT32 temp = (result & m_bkmask) - IREG(TMR_IR0);
1071		if (temp < 0)
1072		temp += IREG(TMR_BK);
1073		IREG(reg) = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
1074		return result;
1075		}
1076
1077
1078		// IR1 displacement variants
1079
1080		UINT32 tms3203x_device::mod10(UINT32 op, UINT8 ar)
1081		{
1082		int reg = TMR_AR0 + (ar & 7);
1083		return IREG(reg) + IREG(TMR_IR1);
1084		}
1085
1086		UINT32 tms3203x_device::mod11(UINT32 op, UINT8 ar)
1087		{
1088		int reg = TMR_AR0 + (ar & 7);
1089		return IREG(reg) - IREG(TMR_IR1);
1090		}
1091
1092		UINT32 tms3203x_device::mod12(UINT32 op, UINT8 ar)
1093		{
1094		int reg = TMR_AR0 + (ar & 7);
1095		IREG(reg) += IREG(TMR_IR1);
1096		return IREG(reg);
1097		}
1098
1099		UINT32 tms3203x_device::mod13(UINT32 op, UINT8 ar)
1100		{
1101		int reg = TMR_AR0 + (ar & 7);
1102		IREG(reg) -= IREG(TMR_IR1);
1103		return IREG(reg);
1104		}
1105
1106		UINT32 tms3203x_device::mod14(UINT32 op, UINT8 ar)
1107		{
1108		int reg = TMR_AR0 + (ar & 7);
1109		UINT32 result = IREG(reg);
1110		IREG(reg) += IREG(TMR_IR1);
1111		return result;
1112		}
1113
1114		UINT32 tms3203x_device::mod15(UINT32 op, UINT8 ar)
1115		{
1116		int reg = TMR_AR0 + (ar & 7);
1117		UINT32 result = IREG(reg);
1118		IREG(reg) -= IREG(TMR_IR1);
1119		return result;
1120		}
1121
1122		UINT32 tms3203x_device::mod16(UINT32 op, UINT8 ar)
1123		{
1124		int reg = TMR_AR0 + (ar & 7);
1125		UINT32 result = IREG(reg);
1126		INT32 temp = (result & m_bkmask) + IREG(TMR_IR1);
1127		if (temp >= IREG(TMR_BK))
1128		temp -= IREG(TMR_BK);
1129		IREG(reg) = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
1130		return result;
1131		}
1132
1133		UINT32 tms3203x_device::mod17(UINT32 op, UINT8 ar)
1134		{
1135		int reg = TMR_AR0 + (ar & 7);
1136		UINT32 result = IREG(reg);
1137		INT32 temp = (result & m_bkmask) - IREG(TMR_IR1);
1138		if (temp < 0)
1139		temp += IREG(TMR_BK);
1140		IREG(reg) = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
1141		return result;
1142		}
1143
1144
1145		// special variants
1146
1147		UINT32 tms3203x_device::mod18(UINT32 op, UINT8 ar)
1148		{
1149		int reg = TMR_AR0 + (ar & 7);
1150		return IREG(reg);
1151		}
1152
1153		UINT32 tms3203x_device::mod19(UINT32 op, UINT8 ar)
1154		{
1155		unimplemented(op);
1156		return 0;
1157		}
1158
1159		UINT32 tms3203x_device::modillegal(UINT32 op, UINT8 ar)
1160		{
1161		illegal(op);
1162		return 0;
1163		}
1164
1165
1166		// immediate displacement variants (implied 1)
1167
1168		UINT32 tms3203x_device::mod00_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
1169		{
1170		int reg = TMR_AR0 + (ar & 7);
1171		return IREG(reg) + 1;
1172		}
1173
1174		UINT32 tms3203x_device::mod01_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
1175		{
1176		int reg = TMR_AR0 + (ar & 7);
1177		return IREG(reg) - 1;
1178		}
1179
1180		UINT32 tms3203x_device::mod02_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
1181		{
1182		int reg = TMR_AR0 + (ar & 7);
1183		UINT32 defval = IREG(reg) + 1;
1184		*defptrptr = defval;
1185		defptrptr = &IREG(reg);
1186		return defval;
1187		}
1188
1189		UINT32 tms3203x_device::mod03_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
1190		{
1191		int reg = TMR_AR0 + (ar & 7);
1192		UINT32 defval = IREG(reg) - 1;
1193		*defptrptr = defval;
1194		defptrptr = &IREG(reg);
1195		return defval;
1196		}
1197
1198		UINT32 tms3203x_device::mod04_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
1199		{
1200		int reg = TMR_AR0 + (ar & 7);
1201		*defptrptr = IREG(reg) + 1;
1202		defptrptr = &IREG(reg);
1203		return IREG(reg);
1204		}
1205
1206		UINT32 tms3203x_device::mod05_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
1207		{
1208		int reg = TMR_AR0 + (ar & 7);
1209		*defptrptr = IREG(reg) - 1;
1210		defptrptr = &IREG(reg);
1211		return IREG(reg);
1212		}
1213
1214		UINT32 tms3203x_device::mod06_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
1215		{
1216		int reg = TMR_AR0 + (ar & 7);
1217		UINT32 result = IREG(reg);
1218		INT32 temp = (result & m_bkmask) + 1;
1219		if (temp >= IREG(TMR_BK))
1220		temp -= IREG(TMR_BK);
1221		*defptrptr = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
1222		defptrptr = &IREG(reg);
1223		return result;
1224		}
1225
1226		UINT32 tms3203x_device::mod07_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
1227		{
1228		int reg = TMR_AR0 + (ar & 7);
1229		UINT32 result = IREG(reg);
1230		INT32 temp = (result & m_bkmask) - 1;
1231		if (temp < 0)
1232		temp += IREG(TMR_BK);
1233		*defptrptr = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
1234		defptrptr = &IREG(reg);
1235		return result;
1236		}
1237
1238
1239		// IR0 displacement variants
1240
1241		UINT32 tms3203x_device::mod08_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
1242		{
1243		int reg = TMR_AR0 + (ar & 7);
1244		return IREG(reg) + IREG(TMR_IR0);
1245		}
1246
1247		UINT32 tms3203x_device::mod09_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
1248		{
1249		int reg = TMR_AR0 + (ar & 7);
1250		return IREG(reg) - IREG(TMR_IR0);
1251		}
1252
1253		UINT32 tms3203x_device::mod0a_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
1254		{
1255		int reg = TMR_AR0 + (ar & 7);
1256		UINT32 defval = IREG(reg) + IREG(TMR_IR0);
1257		*defptrptr = defval;
1258		defptrptr = &IREG(reg);
1259		return defval;
1260		}
1261
1262		UINT32 tms3203x_device::mod0b_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
1263		{
1264		int reg = TMR_AR0 + (ar & 7);
1265		UINT32 defval = IREG(reg) - IREG(TMR_IR0);
1266		*defptrptr = defval;
1267		defptrptr = &IREG(reg);
1268		return defval;
1269		}
1270
1271		UINT32 tms3203x_device::mod0c_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
1272		{
1273		int reg = TMR_AR0 + (ar & 7);
1274		*defptrptr = IREG(reg) + IREG(TMR_IR0);
1275		defptrptr = &IREG(reg);
1276		return IREG(reg);
1277		}
1278
1279		UINT32 tms3203x_device::mod0d_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
1280		{
1281		int reg = TMR_AR0 + (ar & 7);
1282		*defptrptr = IREG(reg) - IREG(TMR_IR0);
1283		defptrptr = &IREG(reg);
1284		return IREG(reg);
1285		}
1286
1287		UINT32 tms3203x_device::mod0e_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
1288		{
1289		int reg = TMR_AR0 + (ar & 7);
1290		UINT32 result = IREG(reg);
1291		INT32 temp = (result & m_bkmask) + IREG(TMR_IR0);
1292		if (temp >= IREG(TMR_BK))
1293		temp -= IREG(TMR_BK);
1294		*defptrptr = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
1295		defptrptr = &IREG(reg);
1296		return result;
1297		}
1298
1299		UINT32 tms3203x_device::mod0f_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
1300		{
1301		int reg = TMR_AR0 + (ar & 7);
1302		UINT32 result = IREG(reg);
1303		INT32 temp = (result & m_bkmask) - IREG(TMR_IR0);
1304		if (temp < 0)
1305		temp += IREG(TMR_BK);
1306		*defptrptr = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
1307		defptrptr = &IREG(reg);
1308		return result;
1309		}
1310
1311
1312		// IR1 displacement variants
1313
1314		UINT32 tms3203x_device::mod10_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
1315		{
1316		int reg = TMR_AR0 + (ar & 7);
1317		return IREG(reg) + IREG(TMR_IR1);
1318		}
1319
1320		UINT32 tms3203x_device::mod11_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
1321		{
1322		int reg = TMR_AR0 + (ar & 7);
1323		return IREG(reg) - IREG(TMR_IR1);
1324		}
1325
1326		UINT32 tms3203x_device::mod12_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
1327		{
1328		int reg = TMR_AR0 + (ar & 7);
1329		UINT32 defval = IREG(reg) + IREG(TMR_IR1);
1330		*defptrptr = defval;
1331		defptrptr = &IREG(reg);
1332		return defval;
1333		}
1334
1335		UINT32 tms3203x_device::mod13_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
1336		{
1337		int reg = TMR_AR0 + (ar & 7);
1338		UINT32 defval = IREG(reg) - IREG(TMR_IR1);
1339		*defptrptr = defval;
1340		defptrptr = &IREG(reg);
1341		return defval;
1342		}
1343
1344		UINT32 tms3203x_device::mod14_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
1345		{
1346		int reg = TMR_AR0 + (ar & 7);
1347		*defptrptr = IREG(reg) + IREG(TMR_IR1);
1348		defptrptr = &IREG(reg);
1349		return IREG(reg);
1350		}
1351
1352		UINT32 tms3203x_device::mod15_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
1353		{
1354		int reg = TMR_AR0 + (ar & 7);
1355		*defptrptr = IREG(reg) - IREG(TMR_IR1);
1356		defptrptr = &IREG(reg);
1357		return IREG(reg);
1358		}
1359
1360		UINT32 tms3203x_device::mod16_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
1361		{
1362		int reg = TMR_AR0 + (ar & 7);
1363		UINT32 result = IREG(reg);
1364		INT32 temp = (result & m_bkmask) + IREG(TMR_IR1);
1365		if (temp >= IREG(TMR_BK))
1366		temp -= IREG(TMR_BK);
1367		*defptrptr = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
1368		defptrptr = &IREG(reg);
1369		return result;
1370		}
1371
1372		UINT32 tms3203x_device::mod17_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
1373		{
1374		int reg = TMR_AR0 + (ar & 7);
1375		UINT32 result = IREG(reg);
1376		INT32 temp = (result & m_bkmask) - IREG(TMR_IR1);
1377		if (temp < 0)
1378		temp += IREG(TMR_BK);
1379		*defptrptr = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
1380		defptrptr = &IREG(reg);
1381		return result;
1382		}
1383
1384		UINT32 tms3203x_device::mod18_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
1385		{
1386		int reg = TMR_AR0 + (ar & 7);
1387		return IREG(reg);
1388		}
1389
1390		UINT32 tms3203x_device::mod19_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
1391		{
1392		unimplemented(op);
1393		return 0;
1394		}
1395
1396		UINT32 tms3203x_device::modillegal_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
1397		{
1398		illegal(op);
1399		return 0;
1400		}
1401
1402
1403		/*-----------------------------------------------------*/
1404
1405		#define ABSF(dreg, sreg)                                                \
1406		{                                                                       \
1407		INT32 man = FREGMAN(sreg);                                          \
1408		CLR_NZVUF();                                                        \
1409		m_r[dreg] = m_r[sreg];                              \
1410		if (man < 0)                                                        \
1411		{                                                                   \
1412		m_r[dreg].set_mantissa(~man);                           \
1413		if (man == (INT32)0x80000000 && FREGEXP(sreg) == 127)           \
1414		IREG(TMR_ST) |= VFLAG | LVFLAG;                             \
1415		}                                                                   \
1416		OR_NZF(m_r[dreg]);                                          \
1417		}
1418
1419		void tms3203x_device::absf_reg(UINT32 op)
1420		{
1421		int dreg = (op >> 16) & 7;
1422		int sreg = op & 7;
1423		ABSF(dreg, sreg);
1424		}
1425
1426		void tms3203x_device::absf_dir(UINT32 op)
1427		{
1428		UINT32 res = RMEM(DIRECT(op));
1429		int dreg = (op >> 16) & 7;
1430		LONG2FP(TMR_TEMP1, res);
1431		ABSF(dreg, TMR_TEMP1);
1432		}
1433
1434		void tms3203x_device::absf_ind(UINT32 op)
1435		{
1436		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
1437		int dreg = (op >> 16) & 7;
1438		LONG2FP(TMR_TEMP1, res);
1439		ABSF(dreg, TMR_TEMP1);
1440		}
1441
1442		void tms3203x_device::absf_imm(UINT32 op)
1443		{
1444		int dreg = (op >> 16) & 7;
1445		SHORT2FP(TMR_TEMP1, op);
1446		ABSF(dreg, TMR_TEMP1);
1447		}
1448
1449		/*-----------------------------------------------------*/
1450
1451		#define ABSI(dreg, src)                                             \
1452		{                                                                   \
1453		UINT32 _res = ((INT32)src < 0) ? -src : src;                    \
1454		if (!OVM() || _res != 0x80000000)                                   \
1455		IREG(dreg) = _res;                                          \
1456		else                                                            \
1457		IREG(dreg) = 0x7fffffff;                                    \
1458		if (dreg < 8)                                                   \
1459		{                                                               \
1460		CLR_NZVUF();                                                \
1461		OR_NZ(_res);                                                \
1462		if (_res == 0x80000000)                                     \
1463		IREG(TMR_ST) |= VFLAG | LVFLAG;                         \
1464		}                                                               \
1465		else if (dreg >= TMR_BK)                                        \
1466		update_special(dreg);                                       \
1467		}
1468
1469		void tms3203x_device::absi_reg(UINT32 op)
1470		{
1471		UINT32 src = IREG(op & 31);
1472		int dreg = (op >> 16) & 31;
1473		ABSI(dreg, src);
1474		}
1475
1476		void tms3203x_device::absi_dir(UINT32 op)
1477		{
1478		UINT32 src = RMEM(DIRECT(op));
1479		int dreg = (op >> 16) & 31;
1480		ABSI(dreg, src);
1481		}
1482
1483		void tms3203x_device::absi_ind(UINT32 op)
1484		{
1485		UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
1486		int dreg = (op >> 16) & 31;
1487		ABSI(dreg, src);
1488		}
1489
1490		void tms3203x_device::absi_imm(UINT32 op)
1491		{
1492		UINT32 src = (INT16)op;
1493		int dreg = (op >> 16) & 31;
1494		ABSI(dreg, src);
1495		}
1496
1497		/*-----------------------------------------------------*/
1498
1499		#define ADDC(dreg, src1, src2)                                      \
1500		{                                                                   \
1501		UINT32 _res = src1 + src2 + (IREG(TMR_ST) & CFLAG);             \
1502		if (!OVM() || !OVERFLOW_ADD(src1,src2,_res))                    \
1503		IREG(dreg) = _res;                                          \
1504		else                                                            \
1505		IREG(dreg) = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff;   \
1506		if (dreg < 8)                                                   \
1507		{                                                               \
1508		UINT32 tempc = IREG(TMR_ST) & CFLAG;                        \
1509		CLR_NZCVUF();                                               \
1510		OR_C_ADC(src1,src2,tempc);                                  \
1511		OR_V_ADD(src1,src2,_res);                                   \
1512		OR_NZ(_res);                                                \
1513		}                                                               \
1514		else if (dreg >= TMR_BK)                                        \
1515		update_special(dreg);                                       \
1516		}
1517
1518		void tms3203x_device::addc_reg(UINT32 op)
1519		{
1520		UINT32 src = IREG(op & 31);
1521		int dreg = (op >> 16) & 31;
1522		UINT32 dst = IREG(dreg);
1523		ADDC(dreg, dst, src);
1524		}
1525
1526		void tms3203x_device::addc_dir(UINT32 op)
1527		{
1528		UINT32 src = RMEM(DIRECT(op));
1529		int dreg = (op >> 16) & 31;
1530		UINT32 dst = IREG(dreg);
1531		ADDC(dreg, dst, src);
1532		}
1533
1534		void tms3203x_device::addc_ind(UINT32 op)
1535		{
1536		UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
1537		int dreg = (op >> 16) & 31;
1538		UINT32 dst = IREG(dreg);
1539		ADDC(dreg, dst, src);
1540		}
1541
1542		void tms3203x_device::addc_imm(UINT32 op)
1543		{
1544		UINT32 src = (INT16)op;
1545		int dreg = (op >> 16) & 31;
1546		UINT32 dst = IREG(dreg);
1547		ADDC(dreg, dst, src);
1548		}
1549
1550		/*-----------------------------------------------------*/
1551
1552		void tms3203x_device::addf_reg(UINT32 op)
1553		{
1554		int dreg = (op >> 16) & 7;
1555		addf(m_r[dreg], m_r[dreg], m_r[op & 7]);
1556		}
1557
1558		void tms3203x_device::addf_dir(UINT32 op)
1559		{
1560		UINT32 res = RMEM(DIRECT(op));
1561		int dreg = (op >> 16) & 7;
1562		LONG2FP(TMR_TEMP1, res);
1563		addf(m_r[dreg], m_r[dreg], m_r[TMR_TEMP1]);
1564		}
1565
1566		void tms3203x_device::addf_ind(UINT32 op)
1567		{
1568		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
1569		int dreg = (op >> 16) & 7;
1570		LONG2FP(TMR_TEMP1, res);
1571		addf(m_r[dreg], m_r[dreg], m_r[TMR_TEMP1]);
1572		}
1573
1574		void tms3203x_device::addf_imm(UINT32 op)
1575		{
1576		int dreg = (op >> 16) & 7;
1577		SHORT2FP(TMR_TEMP1, op);
1578		addf(m_r[dreg], m_r[dreg], m_r[TMR_TEMP1]);
1579		}
1580
1581		/*-----------------------------------------------------*/
1582
1583		#define ADDI(dreg, src1, src2)                                      \
1584		{                                                                   \
1585		UINT32 _res = src1 + src2;                                      \
1586		if (!OVM() || !OVERFLOW_ADD(src1,src2,_res))                    \
1587		IREG(dreg) = _res;                                          \
1588		else                                                            \
1589		IREG(dreg) = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff;   \
1590		if (dreg < 8)                                                   \
1591		{                                                               \
1592		CLR_NZCVUF();                                               \
1593		OR_C_ADD(src1,src2,_res);                                   \
1594		OR_V_ADD(src1,src2,_res);                                   \
1595		OR_NZ(_res);                                                \
1596		}                                                               \
1597		else if (dreg >= TMR_BK)                                        \
1598		update_special(dreg);                                       \
1599		}
1600
1601		void tms3203x_device::addi_reg(UINT32 op)
1602		{
1603		UINT32 src = IREG(op & 31);
1604		int dreg = (op >> 16) & 31;
1605		UINT32 dst = IREG(dreg);
1606		ADDI(dreg, dst, src);
1607		}
1608
1609		void tms3203x_device::addi_dir(UINT32 op)
1610		{
1611		UINT32 src = RMEM(DIRECT(op));
1612		int dreg = (op >> 16) & 31;
1613		UINT32 dst = IREG(dreg);
1614		ADDI(dreg, dst, src);
1615		}
1616
1617		void tms3203x_device::addi_ind(UINT32 op)
1618		{
1619		UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
1620		int dreg = (op >> 16) & 31;
1621		UINT32 dst = IREG(dreg);
1622		ADDI(dreg, dst, src);
1623		}
1624
1625		void tms3203x_device::addi_imm(UINT32 op)
1626		{
1627		UINT32 src = (INT16)op;
1628		int dreg = (op >> 16) & 31;
1629		UINT32 dst = IREG(dreg);
1630		ADDI(dreg, dst, src);
1631		}
1632
1633		/*-----------------------------------------------------*/
1634
1635		#define AND(dreg, src1, src2)                                       \
1636		{                                                                   \
1637		UINT32 _res = (src1) & (src2);                                  \
1638		IREG(dreg) = _res;                                              \
1639		if (dreg < 8)                                                   \
1640		{                                                               \
1641		CLR_NZVUF();                                                \
1642		OR_NZ(_res);                                                \
1643		}                                                               \
1644		else if (dreg >= TMR_BK)                                        \
1645		update_special(dreg);                                       \
1646		}
1647
1648		void tms3203x_device::and_reg(UINT32 op)
1649		{
1650		UINT32 src = IREG(op & 31);
1651		int dreg = (op >> 16) & 31;
1652		UINT32 dst = IREG(dreg);
1653		AND(dreg, dst, src);
1654		}
1655
1656		void tms3203x_device::and_dir(UINT32 op)
1657		{
1658		UINT32 src = RMEM(DIRECT(op));
1659		int dreg = (op >> 16) & 31;
1660		UINT32 dst = IREG(dreg);
1661		AND(dreg, dst, src);
1662		}
1663
1664		void tms3203x_device::and_ind(UINT32 op)
1665		{
1666		UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
1667		int dreg = (op >> 16) & 31;
1668		UINT32 dst = IREG(dreg);
1669		AND(dreg, dst, src);
1670		}
1671
1672		void tms3203x_device::and_imm(UINT32 op)
1673		{
1674		UINT32 src = (UINT16)op;
1675		int dreg = (op >> 16) & 31;
1676		UINT32 dst = IREG(dreg);
1677		AND(dreg, dst, src);
1678		}
1679
1680		/*-----------------------------------------------------*/
1681
1682		#define ANDN(dreg, src1, src2)                                      \
1683		{                                                                   \
1684		UINT32 _res = (src1) & ~(src2);                                 \
1685		IREG(dreg) = _res;                                              \
1686		if (dreg < 8)                                                   \
1687		{                                                               \
1688		CLR_NZVUF();                                                \
1689		OR_NZ(_res);                                                \
1690		}                                                               \
1691		else if (dreg >= TMR_BK)                                        \
1692		update_special(dreg);                                       \
1693		}
1694
1695		void tms3203x_device::andn_reg(UINT32 op)
1696		{
1697		UINT32 src = IREG(op & 31);
1698		int dreg = (op >> 16) & 31;
1699		UINT32 dst = IREG(dreg);
1700		ANDN(dreg, dst, src);
1701		}
1702
1703		void tms3203x_device::andn_dir(UINT32 op)
1704		{
1705		UINT32 src = RMEM(DIRECT(op));
1706		int dreg = (op >> 16) & 31;
1707		UINT32 dst = IREG(dreg);
1708		ANDN(dreg, dst, src);
1709		}
1710
1711		void tms3203x_device::andn_ind(UINT32 op)
1712		{
1713		UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
1714		int dreg = (op >> 16) & 31;
1715		UINT32 dst = IREG(dreg);
1716		ANDN(dreg, dst, src);
1717		}
1718
1719		void tms3203x_device::andn_imm(UINT32 op)
1720		{
1721		UINT32 src = (UINT16)op;
1722		int dreg = (op >> 16) & 31;
1723		UINT32 dst = IREG(dreg);
1724		ANDN(dreg, dst, src);
1725		}
1726
1727		/*-----------------------------------------------------*/
1728
1729		#define ASH(dreg, src, count)                                       \
1730		{                                                                   \
1731		UINT32 _res;                                                    \
1732		INT32 _count = (INT16)(count << 9) >> 9;    /* 7 LSBs */        \
1733		if (_count < 0)                                                 \
1734		{                                                               \
1735		if (_count >= -31)                                          \
1736		_res = (INT32)src >> -_count;                           \
1737		else                                                        \
1738		_res = (INT32)src >> 31;                                \
1739		}                                                               \
1740		else                                                            \
1741		{                                                               \
1742		if (_count <= 31)                                           \
1743		_res = (INT32)src << _count;                            \
1744		else                                                        \
1745		_res = 0;                                               \
1746		}                                                               \
1747		IREG(dreg) = _res;                                              \
1748		if (dreg < 8)                                                   \
1749		{                                                               \
1750		CLR_NZCVUF();                                               \
1751		OR_NZ(_res);                                                \
1752		if (_count < 0)                                             \
1753		{                                                           \
1754		if (_count >= -32)                                      \
1755		OR_C(((INT32)src >> (-_count - 1)) & 1);            \
1756		else                                                    \
1757		OR_C(((INT32)src >> 31) & 1);                       \
1758		}                                                           \
1759		else if (_count > 0)                                        \
1760		{                                                           \
1761		if (_count <= 32)                                       \
1762		OR_C(((UINT32)src << (_count - 1)) >> 31);          \
1763		}                                                           \
1764		}                                                               \
1765		else if (dreg >= TMR_BK)                                        \
1766		update_special(dreg);                                       \
1767		}
1768
1769		void tms3203x_device::ash_reg(UINT32 op)
1770		{
1771		int dreg = (op >> 16) & 31;
1772		int count = IREG(op & 31);
1773		UINT32 src = IREG(dreg);
1774		ASH(dreg, src, count);
1775		}
1776
1777		void tms3203x_device::ash_dir(UINT32 op)
1778		{
1779		int dreg = (op >> 16) & 31;
1780		int count = RMEM(DIRECT(op));
1781		UINT32 src = IREG(dreg);
1782		ASH(dreg, src, count);
1783		}
1784
1785		void tms3203x_device::ash_ind(UINT32 op)
1786		{
1787		int dreg = (op >> 16) & 31;
1788		int count = RMEM(INDIRECT_D(op, op >> 8));
1789		UINT32 src = IREG(dreg);
1790		ASH(dreg, src, count);
1791		}
1792
1793		void tms3203x_device::ash_imm(UINT32 op)
1794		{
1795		int dreg = (op >> 16) & 31;
1796		int count = op;
1797		UINT32 src = IREG(dreg);
1798		ASH(dreg, src, count);
1799		}
1800
1801		/*-----------------------------------------------------*/
1802
1803		void tms3203x_device::cmpf_reg(UINT32 op)
1804		{
1805		int dreg = (op >> 16) & 7;
1806		subf(m_r[TMR_TEMP2], m_r[dreg], m_r[op & 7]);
1807		}
1808
1809		void tms3203x_device::cmpf_dir(UINT32 op)
1810		{
1811		UINT32 res = RMEM(DIRECT(op));
1812		int dreg = (op >> 16) & 7;
1813		LONG2FP(TMR_TEMP1, res);
1814		subf(m_r[TMR_TEMP2], m_r[dreg], m_r[TMR_TEMP1]);
1815		}
1816
1817		void tms3203x_device::cmpf_ind(UINT32 op)
1818		{
1819		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
1820		int dreg = (op >> 16) & 7;
1821		LONG2FP(TMR_TEMP1, res);
1822		subf(m_r[TMR_TEMP2], m_r[dreg], m_r[TMR_TEMP1]);
1823		}
1824
1825		void tms3203x_device::cmpf_imm(UINT32 op)
1826		{
1827		int dreg = (op >> 16) & 7;
1828		SHORT2FP(TMR_TEMP1, op);
1829		subf(m_r[TMR_TEMP2], m_r[dreg], m_r[TMR_TEMP1]);
1830		}
1831
1832		/*-----------------------------------------------------*/
1833
1834		#define CMPI(src1, src2)                                            \
1835		{                                                                   \
1836		UINT32 _res = src1 - src2;                                      \
1837		CLR_NZCVUF();                                                   \
1838		OR_C_SUB(src1,src2,_res);                                       \
1839		OR_V_SUB(src1,src2,_res);                                       \
1840		OR_NZ(_res);                                                    \
1841		}
1842
1843		void tms3203x_device::cmpi_reg(UINT32 op)
1844		{
1845		UINT32 src = IREG(op & 31);
1846		UINT32 dst = IREG((op >> 16) & 31);
1847		CMPI(dst, src);
1848		}
1849
1850		void tms3203x_device::cmpi_dir(UINT32 op)
1851		{
1852		UINT32 src = RMEM(DIRECT(op));
1853		UINT32 dst = IREG((op >> 16) & 31);
1854		CMPI(dst, src);
1855		}
1856
1857		void tms3203x_device::cmpi_ind(UINT32 op)
1858		{
1859		UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
1860		UINT32 dst = IREG((op >> 16) & 31);
1861		CMPI(dst, src);
1862		}
1863
1864		void tms3203x_device::cmpi_imm(UINT32 op)
1865		{
1866		UINT32 src = (INT16)op;
1867		UINT32 dst = IREG((op >> 16) & 31);
1868		CMPI(dst, src);
1869		}
1870
1871		/*-----------------------------------------------------*/
1872
1873		void tms3203x_device::fix_reg(UINT32 op)
1874		{
1875		int dreg = (op >> 16) & 31;
1876		m_r[TMR_TEMP1] = m_r[op & 7];
1877		float2int(m_r[TMR_TEMP1], dreg < 8);
1878		m_r[dreg].set_mantissa(m_r[TMR_TEMP1].mantissa());
1879		}
1880
1881		void tms3203x_device::fix_dir(UINT32 op)
1882		{
1883		UINT32 res = RMEM(DIRECT(op));
1884		int dreg = (op >> 16) & 31;
1885		LONG2FP(TMR_TEMP1, res);
1886		float2int(m_r[TMR_TEMP1], dreg < 8);
1887		m_r[dreg].set_mantissa(m_r[TMR_TEMP1].mantissa());
1888		}
1889
1890		void tms3203x_device::fix_ind(UINT32 op)
1891		{
1892		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
1893		int dreg = (op >> 16) & 31;
1894		LONG2FP(TMR_TEMP1, res);
1895		float2int(m_r[TMR_TEMP1], dreg < 8);
1896		m_r[dreg].set_mantissa(m_r[TMR_TEMP1].mantissa());
1897		}
1898
1899		void tms3203x_device::fix_imm(UINT32 op)
1900		{
1901		int dreg = (op >> 16) & 31;
1902		SHORT2FP(TMR_TEMP1, op);
1903		float2int(m_r[TMR_TEMP1], dreg < 8);
1904		m_r[dreg].set_mantissa(m_r[TMR_TEMP1].mantissa());
1905		}
1906
1907		/*-----------------------------------------------------*/
1908
1909		#define FLOAT(dreg, src)                                            \
1910		{                                                                   \
1911		IREG(dreg) = src;                                               \
1912		int2float(m_r[dreg]);                                   \
1913		}
1914
1915		void tms3203x_device::float_reg(UINT32 op)
1916		{
1917		UINT32 src = IREG(op & 31);
1918		int dreg = (op >> 16) & 7;
1919		FLOAT(dreg, src);
1920		}
1921
1922		void tms3203x_device::float_dir(UINT32 op)
1923		{
1924		UINT32 src = RMEM(DIRECT(op));
1925		int dreg = (op >> 16) & 7;
1926		FLOAT(dreg, src);
1927		}
1928
1929		void tms3203x_device::float_ind(UINT32 op)
1930		{
1931		UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
1932		int dreg = (op >> 16) & 7;
1933		FLOAT(dreg, src);
1934		}
1935
1936		void tms3203x_device::float_imm(UINT32 op)
1937		{
1938		UINT32 src = (INT16)op;
1939		int dreg = (op >> 16) & 7;
1940		FLOAT(dreg, src);
1941		}
1942
1943		/*-----------------------------------------------------*/
1944
1945		void tms3203x_device::idle(UINT32 op)
1946		{
1947		m_is_idling = true;
1948		IREG(TMR_ST) |= GIEFLAG;
1949		check_irqs();
1950		if (m_is_idling)
1951		m_icount = 0;
1952		}
1953
1954		/*-----------------------------------------------------*/
1955
1956		void tms3203x_device::lde_reg(UINT32 op)
1957		{
1958		int dreg = (op >> 16) & 7;
1959		m_r[dreg].set_exponent(m_r[op & 7].exponent());
1960		if (m_r[dreg].exponent() == -128)
1961		m_r[dreg].set_mantissa(0);
1962		}
1963
1964		void tms3203x_device::lde_dir(UINT32 op)
1965		{
1966		UINT32 res = RMEM(DIRECT(op));
1967		int dreg = (op >> 16) & 7;
1968		LONG2FP(TMR_TEMP1, res);
1969		m_r[dreg].set_exponent(m_r[TMR_TEMP1].exponent());
1970		if (m_r[dreg].exponent() == -128)
1971		m_r[dreg].set_mantissa(0);
1972		}
1973
1974		void tms3203x_device::lde_ind(UINT32 op)
1975		{
1976		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
1977		int dreg = (op >> 16) & 7;
1978		LONG2FP(TMR_TEMP1, res);
1979		m_r[dreg].set_exponent(m_r[TMR_TEMP1].exponent());
1980		if (m_r[dreg].exponent() == -128)
1981		m_r[dreg].set_mantissa(0);
1982		}
1983
1984		void tms3203x_device::lde_imm(UINT32 op)
1985		{
1986		int dreg = (op >> 16) & 7;
1987		SHORT2FP(TMR_TEMP1, op);
1988		m_r[dreg].set_exponent(m_r[TMR_TEMP1].exponent());
1989		if (m_r[dreg].exponent() == -128)
1990		m_r[dreg].set_mantissa(0);
1991		}
1992
1993		/*-----------------------------------------------------*/
1994
1995		void tms3203x_device::ldf_reg(UINT32 op)
1996		{
1997		int dreg = (op >> 16) & 7;
1998		m_r[dreg] = m_r[op & 7];
1999		CLR_NZVUF();
2000		OR_NZF(m_r[dreg]);
2001		}
2002
2003		void tms3203x_device::ldf_dir(UINT32 op)
2004		{
2005		UINT32 res = RMEM(DIRECT(op));
2006		int dreg = (op >> 16) & 7;
2007		LONG2FP(dreg, res);
2008		CLR_NZVUF();
2009		OR_NZF(m_r[dreg]);
2010		}
2011
2012		void tms3203x_device::ldf_ind(UINT32 op)
2013		{
2014		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
2015		int dreg = (op >> 16) & 7;
2016		LONG2FP(dreg, res);
2017		CLR_NZVUF();
2018		OR_NZF(m_r[dreg]);
2019		}
2020
2021		void tms3203x_device::ldf_imm(UINT32 op)
2022		{
2023		int dreg = (op >> 16) & 7;
2024		SHORT2FP(dreg, op);
2025		CLR_NZVUF();
2026		OR_NZF(m_r[dreg]);
2027		}
2028
2029		/*-----------------------------------------------------*/
2030
2031		void tms3203x_device::ldfi_dir(UINT32 op) { unimplemented(op); }
2032		void tms3203x_device::ldfi_ind(UINT32 op) { unimplemented(op); }
2033
2034		/*-----------------------------------------------------*/
2035
2036		#define LDI(dreg, src)                                              \
2037		{                                                                   \
2038		IREG(dreg) = src;                                               \
2039		if (dreg < 8)                                                   \
2040		{                                                               \
2041		CLR_NZVUF();                                                \
2042		OR_NZ(src);                                                 \
2043		}                                                               \
2044		else if (dreg >= TMR_BK)                                        \
2045		update_special(dreg);                                       \
2046		}
2047
2048		void tms3203x_device::ldi_reg(UINT32 op)
2049		{
2050		UINT32 src = IREG(op & 31);
2051		int dreg = (op >> 16) & 31;
2052		LDI(dreg, src);
2053		}
2054
2055		void tms3203x_device::ldi_dir(UINT32 op)
2056		{
2057		UINT32 src = RMEM(DIRECT(op));
2058		int dreg = (op >> 16) & 31;
2059		LDI(dreg, src);
2060		}
2061
2062		void tms3203x_device::ldi_ind(UINT32 op)
2063		{
2064		UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
2065		int dreg = (op >> 16) & 31;
2066		LDI(dreg, src);
2067		}
2068
2069		void tms3203x_device::ldi_imm(UINT32 op)
2070		{
2071		UINT32 src = (INT16)op;
2072		int dreg = (op >> 16) & 31;
2073		LDI(dreg, src);
2074		}
2075
2076		/*-----------------------------------------------------*/
2077
2078		void tms3203x_device::ldii_dir(UINT32 op) { unimplemented(op); }
2079		void tms3203x_device::ldii_ind(UINT32 op) { unimplemented(op); }
2080
2081		/*-----------------------------------------------------*/
2082
2083		void tms3203x_device::ldm_reg(UINT32 op)
2084		{
2085		int dreg = (op >> 16) & 7;
2086		m_r[dreg].set_mantissa(m_r[op & 7].mantissa());
2087		}
2088
2089		void tms3203x_device::ldm_dir(UINT32 op)
2090		{
2091		UINT32 res = RMEM(DIRECT(op));
2092		int dreg = (op >> 16) & 7;
2093		m_r[dreg].set_mantissa(res);
2094		}
2095
2096		void tms3203x_device::ldm_ind(UINT32 op)
2097		{
2098		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
2099		int dreg = (op >> 16) & 7;
2100		m_r[dreg].set_mantissa(res);
2101		}
2102
2103		void tms3203x_device::ldm_imm(UINT32 op)
2104		{
2105		int dreg = (op >> 16) & 7;
2106		SHORT2FP(TMR_TEMP1, op);
2107		m_r[dreg].set_mantissa(m_r[TMR_TEMP1].mantissa());
2108		}
2109
2110		/*-----------------------------------------------------*/
2111
2112		#define LSH(dreg, src, count)                                       \
2113		{                                                                   \
2114		UINT32 _res;                                                    \
2115		INT32 _count = (INT16)(count << 9) >> 9;    /* 7 LSBs */        \
2116		if (_count < 0)                                                 \
2117		{                                                               \
2118		if (_count >= -31)                                          \
2119		_res = (UINT32)src >> -_count;                          \
2120		else                                                        \
2121		_res = 0;                                               \
2122		}                                                               \
2123		else                                                            \
2124		{                                                               \
2125		if (_count <= 31)                                           \
2126		_res = (UINT32)src << _count;                           \
2127		else                                                        \
2128		_res = 0;                                               \
2129		}                                                               \
2130		IREG(dreg) = _res;                                              \
2131		if (dreg < 8)                                                   \
2132		{                                                               \
2133		CLR_NZCVUF();                                               \
2134		OR_NZ(_res);                                                \
2135		if (_count < 0)                                             \
2136		{                                                           \
2137		if (_count >= -32)                                      \
2138		OR_C(((UINT32)src >> (-_count - 1)) & 1);           \
2139		}                                                           \
2140		else if (_count > 0)                                        \
2141		{                                                           \
2142		if (_count <= 32)                                       \
2143		OR_C(((UINT32)src << (_count - 1)) >> 31);          \
2144		}                                                           \
2145		}                                                               \
2146		else if (dreg >= TMR_BK)                                        \
2147		update_special(dreg);                                       \
2148		}
2149
2150		void tms3203x_device::lsh_reg(UINT32 op)
2151		{
2152		int dreg = (op >> 16) & 31;
2153		int count = IREG(op & 31);
2154		UINT32 src = IREG(dreg);
2155		LSH(dreg, src, count);
2156		}
2157
2158		void tms3203x_device::lsh_dir(UINT32 op)
2159		{
2160		int dreg = (op >> 16) & 31;
2161		int count = RMEM(DIRECT(op));
2162		UINT32 src = IREG(dreg);
2163		LSH(dreg, src, count);
2164		}
2165
2166		void tms3203x_device::lsh_ind(UINT32 op)
2167		{
2168		int dreg = (op >> 16) & 31;
2169		int count = RMEM(INDIRECT_D(op, op >> 8));
2170		UINT32 src = IREG(dreg);
2171		LSH(dreg, src, count);
2172		}
2173
2174		void tms3203x_device::lsh_imm(UINT32 op)
2175		{
2176		int dreg = (op >> 16) & 31;
2177		int count = op;
2178		UINT32 src = IREG(dreg);
2179		LSH(dreg, src, count);
2180		}
2181
2182		/*-----------------------------------------------------*/
2183
2184		void tms3203x_device::mpyf_reg(UINT32 op)
2185		{
2186		int dreg = (op >> 16) & 31;
2187		mpyf(m_r[dreg], m_r[dreg], m_r[op & 31]);
2188		}
2189
2190		void tms3203x_device::mpyf_dir(UINT32 op)
2191		{
2192		UINT32 res = RMEM(DIRECT(op));
2193		int dreg = (op >> 16) & 31;
2194		LONG2FP(TMR_TEMP1, res);
2195		mpyf(m_r[dreg], m_r[dreg], m_r[TMR_TEMP1]);
2196		}
2197
2198		void tms3203x_device::mpyf_ind(UINT32 op)
2199		{
2200		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
2201		int dreg = (op >> 16) & 31;
2202		LONG2FP(TMR_TEMP1, res);
2203		mpyf(m_r[dreg], m_r[dreg], m_r[TMR_TEMP1]);
2204		}
2205
2206		void tms3203x_device::mpyf_imm(UINT32 op)
2207		{
2208		int dreg = (op >> 16) & 31;
2209		SHORT2FP(TMR_TEMP1, op);
2210		mpyf(m_r[dreg], m_r[dreg], m_r[TMR_TEMP1]);
2211		}
2212
2213		/*-----------------------------------------------------*/
2214
2215		#define MPYI(dreg, src1, src2)                                      \
2216		{                                                                   \
2217		INT64 _res = (INT64)((INT32)(src1 << 8) >> 8) * (INT64)((INT32)(src2 << 8) >> 8);\
2218		if (!OVM() || (_res >= -(INT64)0x80000000 && _res <= (INT64)0x7fffffff))        \
2219		IREG(dreg) = _res;                                          \
2220		else                                                            \
2221		IREG(dreg) = (_res < 0) ? 0x80000000 : 0x7fffffff;          \
2222		if (dreg < 8)                                                   \
2223		{                                                               \
2224		CLR_NZVUF();                                                \
2225		OR_NZ((UINT32)_res);                                        \
2226		if (_res < -(INT64)0x80000000 || _res > (INT64)0x7fffffff)  \
2227		IREG(TMR_ST) |= VFLAG | LVFLAG;                         \
2228		}                                                               \
2229		else if (dreg >= TMR_BK)                                        \
2230		update_special(dreg);                                       \
2231		}
2232
2233		void tms3203x_device::mpyi_reg(UINT32 op)
2234		{
2235		UINT32 src = IREG(op & 31);
2236		int dreg = (op >> 16) & 31;
2237		UINT32 dst = IREG(dreg);
2238		MPYI(dreg, dst, src);
2239		}
2240
2241		void tms3203x_device::mpyi_dir(UINT32 op)
2242		{
2243		UINT32 src = RMEM(DIRECT(op));
2244		int dreg = (op >> 16) & 31;
2245		UINT32 dst = IREG(dreg);
2246		MPYI(dreg, dst, src);
2247		}
2248
2249		void tms3203x_device::mpyi_ind(UINT32 op)
2250		{
2251		UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
2252		int dreg = (op >> 16) & 31;
2253		UINT32 dst = IREG(dreg);
2254		MPYI(dreg, dst, src);
2255		}
2256
2257		void tms3203x_device::mpyi_imm(UINT32 op)
2258		{
2259		UINT32 src = (INT16)op;
2260		int dreg = (op >> 16) & 31;
2261		UINT32 dst = IREG(dreg);
2262		MPYI(dreg, dst, src);
2263		}
2264
2265		/*-----------------------------------------------------*/
2266
2267		#define NEGB(dreg, src)                                             \
2268		{                                                                   \
2269		UINT32 _res = 0 - src - (IREG(TMR_ST) & CFLAG);                 \
2270		if (!OVM() || !OVERFLOW_SUB(0,src,_res))                        \
2271		IREG(dreg) = _res;                                          \
2272		else                                                            \
2273		IREG(dreg) = ((INT32)src < 0) ? 0x80000000 : 0x7fffffff;    \
2274		if (dreg < 8)                                                   \
2275		{                                                               \
2276		UINT32 tempc = IREG(TMR_ST) & CFLAG;                        \
2277		CLR_NZCVUF();                                               \
2278		OR_C_SBB(0,src,tempc);                                      \
2279		OR_V_SUB(0,src,_res);                                       \
2280		OR_NZ(_res);                                                \
2281		}                                                               \
2282		else if (dreg >= TMR_BK)                                        \
2283		update_special(dreg);                                       \
2284		}
2285
2286		void tms3203x_device::negb_reg(UINT32 op)
2287		{
2288		UINT32 src = IREG(op & 31);
2289		int dreg = (op >> 16) & 31;
2290		NEGB(dreg, src);
2291		}
2292
2293		void tms3203x_device::negb_dir(UINT32 op)
2294		{
2295		UINT32 src = RMEM(DIRECT(op));
2296		int dreg = (op >> 16) & 31;
2297		NEGB(dreg, src);
2298		}
2299
2300		void tms3203x_device::negb_ind(UINT32 op)
2301		{
2302		UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
2303		int dreg = (op >> 16) & 31;
2304		NEGB(dreg, src);
2305		}
2306
2307		void tms3203x_device::negb_imm(UINT32 op)
2308		{
2309		UINT32 src = (INT16)op;
2310		int dreg = (op >> 16) & 31;
2311		NEGB(dreg, src);
2312		}
2313
2314		/*-----------------------------------------------------*/
2315
2316		void tms3203x_device::negf_reg(UINT32 op)
2317		{
2318		int dreg = (op >> 16) & 7;
2319		negf(m_r[dreg], m_r[op & 7]);
2320		}
2321
2322		void tms3203x_device::negf_dir(UINT32 op)
2323		{
2324		UINT32 res = RMEM(DIRECT(op));
2325		int dreg = (op >> 16) & 7;
2326		LONG2FP(TMR_TEMP1, res);
2327		negf(m_r[dreg], m_r[TMR_TEMP1]);
2328		}
2329
2330		void tms3203x_device::negf_ind(UINT32 op)
2331		{
2332		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
2333		int dreg = (op >> 16) & 7;
2334		LONG2FP(TMR_TEMP1, res);
2335		negf(m_r[dreg], m_r[TMR_TEMP1]);
2336		}
2337
2338		void tms3203x_device::negf_imm(UINT32 op)
2339		{
2340		int dreg = (op >> 16) & 7;
2341		SHORT2FP(TMR_TEMP1, op);
2342		negf(m_r[dreg], m_r[TMR_TEMP1]);
2343		}
2344
2345		/*-----------------------------------------------------*/
2346
2347		#define NEGI(dreg, src)                                             \
2348		{                                                                   \
2349		UINT32 _res = 0 - src;                                          \
2350		if (!OVM() || !OVERFLOW_SUB(0,src,_res))                        \
2351		IREG(dreg) = _res;                                          \
2352		else                                                            \
2353		IREG(dreg) = ((INT32)src < 0) ? 0x80000000 : 0x7fffffff;    \
2354		if (dreg < 8)                                                   \
2355		{                                                               \
2356		CLR_NZCVUF();                                               \
2357		OR_C_SUB(0,src,_res);                                       \
2358		OR_V_SUB(0,src,_res);                                       \
2359		OR_NZ(_res);                                                \
2360		}                                                               \
2361		else if (dreg >= TMR_BK)                                        \
2362		update_special(dreg);                                       \
2363		}
2364
2365		void tms3203x_device::negi_reg(UINT32 op)
2366		{
2367		UINT32 src = IREG(op & 31);
2368		int dreg = (op >> 16) & 31;
2369		NEGI(dreg, src);
2370		}
2371
2372		void tms3203x_device::negi_dir(UINT32 op)
2373		{
2374		UINT32 src = RMEM(DIRECT(op));
2375		int dreg = (op >> 16) & 31;
2376		NEGI(dreg, src);
2377		}
2378
2379		void tms3203x_device::negi_ind(UINT32 op)
2380		{
2381		UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
2382		int dreg = (op >> 16) & 31;
2383		NEGI(dreg, src);
2384		}
2385
2386		void tms3203x_device::negi_imm(UINT32 op)
2387		{
2388		UINT32 src = (INT16)op;
2389		int dreg = (op >> 16) & 31;
2390		NEGI(dreg, src);
2391		}
2392
2393		/*-----------------------------------------------------*/
2394
2395		void tms3203x_device::nop_reg(UINT32 op)
2396		{
2397		}
2398
2399		void tms3203x_device::nop_ind(UINT32 op)
2400		{
2401		RMEM(INDIRECT_D(op, op >> 8));
2402		}
2403
2404		/*-----------------------------------------------------*/
2405
2406		void tms3203x_device::norm_reg(UINT32 op)
2407		{
2408		int dreg = (op >> 16) & 7;
2409		norm(m_r[dreg], m_r[op & 7]);
2410		}
2411
2412		void tms3203x_device::norm_dir(UINT32 op)
2413		{
2414		UINT32 res = RMEM(DIRECT(op));
2415		int dreg = (op >> 16) & 7;
2416		LONG2FP(TMR_TEMP1, res);
2417		norm(m_r[dreg], m_r[TMR_TEMP1]);
2418		}
2419
2420		void tms3203x_device::norm_ind(UINT32 op)
2421		{
2422		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
2423		int dreg = (op >> 16) & 7;
2424		LONG2FP(TMR_TEMP1, res);
2425		norm(m_r[dreg], m_r[TMR_TEMP1]);
2426		}
2427
2428		void tms3203x_device::norm_imm(UINT32 op)
2429		{
2430		int dreg = (op >> 16) & 7;
2431		SHORT2FP(TMR_TEMP1, op);
2432		norm(m_r[dreg], m_r[TMR_TEMP1]);
2433		}
2434
2435		/*-----------------------------------------------------*/
2436
2437		#define NOT(dreg, src)                                              \
2438		{                                                                   \
2439		UINT32 _res = ~(src);                                           \
2440		IREG(dreg) = _res;                                              \
2441		if (dreg < 8)                                                   \
2442		{                                                               \
2443		CLR_NZVUF();                                                \
2444		OR_NZ(_res);                                                \
2445		}                                                               \
2446		else if (dreg >= TMR_BK)                                        \
2447		update_special(dreg);                                       \
2448		}
2449
2450		void tms3203x_device::not_reg(UINT32 op)
2451		{
2452		UINT32 src = IREG(op & 31);
2453		int dreg = (op >> 16) & 31;
2454		NOT(dreg, src);
2455		}
2456
2457		void tms3203x_device::not_dir(UINT32 op)
2458		{
2459		UINT32 src = RMEM(DIRECT(op));
2460		int dreg = (op >> 16) & 31;
2461		NOT(dreg, src);
2462		}
2463
2464		void tms3203x_device::not_ind(UINT32 op)
2465		{
2466		UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
2467		int dreg = (op >> 16) & 31;
2468		NOT(dreg, src);
2469		}
2470
2471		void tms3203x_device::not_imm(UINT32 op)
2472		{
2473		UINT32 src = (UINT16)op;
2474		int dreg = (op >> 16) & 31;
2475		NOT(dreg, src);
2476		}
2477
2478		/*-----------------------------------------------------*/
2479
2480		void tms3203x_device::pop(UINT32 op)
2481		{
2482		int dreg = (op >> 16) & 31;
2483		UINT32 val = RMEM(IREG(TMR_SP)--);
2484		IREG(dreg) = val;
2485		if (dreg < 8)
2486		{
2487		CLR_NZVUF();
2488		OR_NZ(val);
2489		}
2490		else if (dreg >= TMR_BK)
2491		update_special(dreg);
2492		}
2493
2494		void tms3203x_device::popf(UINT32 op)
2495		{
2496		int dreg = (op >> 16) & 7;
2497		UINT32 val = RMEM(IREG(TMR_SP)--);
2498		LONG2FP(dreg, val);
2499		CLR_NZVUF();
2500		OR_NZF(m_r[dreg]);
2501		}
2502
2503		void tms3203x_device::push(UINT32 op)
2504		{
2505		WMEM(++IREG(TMR_SP), IREG((op >> 16) & 31));
2506		}
2507
2508		void tms3203x_device::pushf(UINT32 op)
2509		{
2510		int dreg = (op >> 16) & 7;
2511		WMEM(++IREG(TMR_SP), FP2LONG(dreg));
2512		}
2513
2514		/*-----------------------------------------------------*/
2515
2516		#define OR(dreg, src1, src2)                                        \
2517		{                                                                   \
2518		UINT32 _res = (src1) | (src2);                                  \
2519		IREG(dreg) = _res;                                              \
2520		if (dreg < 8)                                                   \
2521		{                                                               \
2522		CLR_NZVUF();                                                \
2523		OR_NZ(_res);                                                \
2524		}                                                               \
2525		else if (dreg >= TMR_BK)                                        \
2526		update_special(dreg);                                       \
2527		}
2528
2529		void tms3203x_device::or_reg(UINT32 op)
2530		{
2531		UINT32 src = IREG(op & 31);
2532		int dreg = (op >> 16) & 31;
2533		UINT32 dst = IREG(dreg);
2534		OR(dreg, dst, src);
2535		}
2536
2537		void tms3203x_device::or_dir(UINT32 op)
2538		{
2539		UINT32 src = RMEM(DIRECT(op));
2540		int dreg = (op >> 16) & 31;
2541		UINT32 dst = IREG(dreg);
2542		OR(dreg, dst, src);
2543		}
2544
2545		void tms3203x_device::or_ind(UINT32 op)
2546		{
2547		UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
2548		int dreg = (op >> 16) & 31;
2549		UINT32 dst = IREG(dreg);
2550		OR(dreg, dst, src);
2551		}
2552
2553		void tms3203x_device::or_imm(UINT32 op)
2554		{
2555		UINT32 src = (UINT16)op;
2556		int dreg = (op >> 16) & 31;
2557		UINT32 dst = IREG(dreg);
2558		OR(dreg, dst, src);
2559		}
2560
2561		/*-----------------------------------------------------*/
2562
2563		void tms3203x_device::maxspeed(UINT32 op) { unimplemented(op); }
2564
2565		/*-----------------------------------------------------*/
2566
2567		#define RND(dreg)                                                   \
2568		{                                                                   \
2569		INT32 man = FREGMAN(dreg);                                      \
2570		CLR_NVUF();                                                     \
2571		if (man < 0x7fffff80)                                           \
2572		{                                                               \
2573		m_r[dreg].set_mantissa(((UINT32)man + 0x80) & 0xffffff00);  \
2574		OR_NUF(m_r[dreg]);                                  \
2575		}                                                               \
2576		else if (FREGEXP(dreg) < 127)                                   \
2577		{                                                               \
2578		m_r[dreg].set_mantissa(((UINT32)man + 0x80) & 0x7fffff00);  \
2579		m_r[dreg].set_exponent(FREGEXP(dreg) + 1);          \
2580		OR_NUF(m_r[dreg]);                                  \
2581		}                                                               \
2582		else                                                            \
2583		{                                                               \
2584		m_r[dreg].set_mantissa(0x7fffff00);             \
2585		IREG(TMR_ST) |= VFLAG | LVFLAG;                             \
2586		}                                                               \
2587		}
2588
2589		void tms3203x_device::rnd_reg(UINT32 op)
2590		{
2591		int sreg = op & 7;
2592		int dreg = (op >> 16) & 7;
2593		m_r[dreg] = m_r[sreg];
2594		RND(dreg);
2595		}
2596
2597		void tms3203x_device::rnd_dir(UINT32 op)
2598		{
2599		UINT32 res = RMEM(DIRECT(op));
2600		int dreg = (op >> 16) & 7;
2601		LONG2FP(dreg, res);
2602		RND(dreg);
2603		}
2604
2605		void tms3203x_device::rnd_ind(UINT32 op)
2606		{
2607		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
2608		int dreg = (op >> 16) & 7;
2609		LONG2FP(dreg, res);
2610		RND(dreg);
2611		}
2612
2613		void tms3203x_device::rnd_imm(UINT32 op)
2614		{
2615		int dreg = (op >> 16) & 7;
2616		SHORT2FP(dreg, op);
2617		RND(dreg);
2618		}
2619
2620		/*-----------------------------------------------------*/
2621
2622		void tms3203x_device::rol(UINT32 op)
2623		{
2624		int dreg = (op >> 16) & 31;
2625		UINT32 res = IREG(dreg);
2626		int newcflag = res >> 31;
2627		res = (res << 1) | newcflag;
2628		IREG(dreg) = res;
2629		if (dreg < 8)
2630		{
2631		CLR_NZCVUF();
2632		OR_NZ(res);
2633		OR_C(newcflag);
2634		}
2635		else if (dreg >= TMR_BK)
2636		update_special(dreg);
2637		}
2638
2639		void tms3203x_device::rolc(UINT32 op)
2640		{
2641		int dreg = (op >> 16) & 31;
2642		UINT32 res = IREG(dreg);
2643		int newcflag = res >> 31;
2644		res = (res << 1) | (IREG(TMR_ST) & CFLAG);
2645		IREG(dreg) = res;
2646		if (dreg < 8)
2647		{
2648		CLR_NZCVUF();
2649		OR_NZ(res);
2650		OR_C(newcflag);
2651		}
2652		else if (dreg >= TMR_BK)
2653		update_special(dreg);
2654		}
2655
2656		void tms3203x_device::ror(UINT32 op)
2657		{
2658		int dreg = (op >> 16) & 31;
2659		UINT32 res = IREG(dreg);
2660		int newcflag = res & 1;
2661		res = (res >> 1) | (newcflag << 31);
2662		IREG(dreg) = res;
2663		if (dreg < 8)
2664		{
2665		CLR_NZCVUF();
2666		OR_NZ(res);
2667		OR_C(newcflag);
2668		}
2669		else if (dreg >= TMR_BK)
2670		update_special(dreg);
2671		}
2672
2673		void tms3203x_device::rorc(UINT32 op)
2674		{
2675		int dreg = (op >> 16) & 31;
2676		UINT32 res = IREG(dreg);
2677		int newcflag = res & 1;
2678		res = (res >> 1) | ((IREG(TMR_ST) & CFLAG) << 31);
2679		IREG(dreg) = res;
2680		if (dreg < 8)
2681		{
2682		CLR_NZCVUF();
2683		OR_NZ(res);
2684		OR_C(newcflag);
2685		}
2686		else if (dreg >= TMR_BK)
2687		update_special(dreg);
2688		}
2689
2690		/*-----------------------------------------------------*/
2691
2692		void tms3203x_device::rtps_reg(UINT32 op)
2693		{
2694		IREG(TMR_RC) = IREG(op & 31);
2695		IREG(TMR_RS) = m_pc;
2696		IREG(TMR_RE) = m_pc;
2697		IREG(TMR_ST) |= RMFLAG;
2698		m_icount -= 3*2;
2699		m_delayed = true;
2700		}
2701
2702		void tms3203x_device::rtps_dir(UINT32 op)
2703		{
2704		IREG(TMR_RC) = RMEM(DIRECT(op));
2705		IREG(TMR_RS) = m_pc;
2706		IREG(TMR_RE) = m_pc;
2707		IREG(TMR_ST) |= RMFLAG;
2708		m_icount -= 3*2;
2709		m_delayed = true;
2710		}
2711
2712		void tms3203x_device::rtps_ind(UINT32 op)
2713		{
2714		IREG(TMR_RC) = RMEM(INDIRECT_D(op, op >> 8));
2715		IREG(TMR_RS) = m_pc;
2716		IREG(TMR_RE) = m_pc;
2717		IREG(TMR_ST) |= RMFLAG;
2718		m_icount -= 3*2;
2719		m_delayed = true;
2720		}
2721
2722		void tms3203x_device::rtps_imm(UINT32 op)
2723		{
2724		IREG(TMR_RC) = (UINT16)op;
2725		IREG(TMR_RS) = m_pc;
2726		IREG(TMR_RE) = m_pc;
2727		IREG(TMR_ST) |= RMFLAG;
2728		m_icount -= 3*2;
2729		m_delayed = true;
2730		}
2731
2732		/*-----------------------------------------------------*/
2733
2734		void tms3203x_device::stf_dir(UINT32 op)
2735		{
2736		WMEM(DIRECT(op), FP2LONG((op >> 16) & 7));
2737		}
2738
2739		void tms3203x_device::stf_ind(UINT32 op)
2740		{
2741		WMEM(INDIRECT_D(op, op >> 8), FP2LONG((op >> 16) & 7));
2742		}
2743
2744		/*-----------------------------------------------------*/
2745
2746		void tms3203x_device::stfi_dir(UINT32 op) { unimplemented(op); }
2747		void tms3203x_device::stfi_ind(UINT32 op) { unimplemented(op); }
2748
2749		/*-----------------------------------------------------*/
2750
2751		void tms3203x_device::sti_dir(UINT32 op)
2752		{
2753		WMEM(DIRECT(op), IREG((op >> 16) & 31));
2754		}
2755
2756		void tms3203x_device::sti_ind(UINT32 op)
2757		{
2758		WMEM(INDIRECT_D(op, op >> 8), IREG((op >> 16) & 31));
2759		}
2760
2761		/*-----------------------------------------------------*/
2762
2763		void tms3203x_device::stii_dir(UINT32 op) { unimplemented(op); }
2764		void tms3203x_device::stii_ind(UINT32 op) { unimplemented(op); }
2765
2766		/*-----------------------------------------------------*/
2767
2768		void tms3203x_device::sigi(UINT32 op) { unimplemented(op); }
2769
2770		/*-----------------------------------------------------*/
2771
2772		#define SUBB(dreg, src1, src2)                                      \
2773		{                                                                   \
2774		UINT32 _res = src1 - src2 - (IREG(TMR_ST) & CFLAG);             \
2775		if (!OVM() || !OVERFLOW_SUB(src1,src2,_res))                    \
2776		IREG(dreg) = _res;                                          \
2777		else                                                            \
2778		IREG(dreg) = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff;   \
2779		if (dreg < 8)                                                   \
2780		{                                                               \
2781		UINT32 tempc = IREG(TMR_ST) & CFLAG;                        \
2782		CLR_NZCVUF();                                               \
2783		OR_C_SBB(src1,src2,tempc);                                  \
2784		OR_V_SUB(src1,src2,_res);                                   \
2785		OR_NZ(_res);                                                \
2786		}                                                               \
2787		else if (dreg >= TMR_BK)                                        \
2788		update_special(dreg);                                       \
2789		}
2790
2791		void tms3203x_device::subb_reg(UINT32 op)
2792		{
2793		UINT32 src = IREG(op & 31);
2794		int dreg = (op >> 16) & 31;
2795		UINT32 dst = IREG(dreg);
2796		SUBB(dreg, dst, src);
2797		}
2798
2799		void tms3203x_device::subb_dir(UINT32 op)
2800		{
2801		UINT32 src = RMEM(DIRECT(op));
2802		int dreg = (op >> 16) & 31;
2803		UINT32 dst = IREG(dreg);
2804		SUBB(dreg, dst, src);
2805		}
2806
2807		void tms3203x_device::subb_ind(UINT32 op)
2808		{
2809		UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
2810		int dreg = (op >> 16) & 31;
2811		UINT32 dst = IREG(dreg);
2812		SUBB(dreg, dst, src);
2813		}
2814
2815		void tms3203x_device::subb_imm(UINT32 op)
2816		{
2817		UINT32 src = (INT16)op;
2818		int dreg = (op >> 16) & 31;
2819		UINT32 dst = IREG(dreg);
2820		SUBB(dreg, dst, src);
2821		}
2822
2823		/*-----------------------------------------------------*/
2824
2825		#define SUBC(dreg, src)                                             \
2826		{                                                                   \
2827		UINT32 dst = IREG(dreg);                                        \
2828		if (dst >= src)                                                 \
2829		IREG(dreg) = ((dst - src) << 1) | 1;                        \
2830		else                                                            \
2831		IREG(dreg) = dst << 1;                                      \
2832		if (dreg >= TMR_BK)                                             \
2833		update_special(dreg);                                       \
2834		}
2835
2836		void tms3203x_device::subc_reg(UINT32 op)
2837		{
2838		UINT32 src = IREG(op & 31);
2839		int dreg = (op >> 16) & 31;
2840		SUBC(dreg, src);
2841		}
2842
2843		void tms3203x_device::subc_dir(UINT32 op)
2844		{
2845		UINT32 src = RMEM(DIRECT(op));
2846		int dreg = (op >> 16) & 31;
2847		SUBC(dreg, src);
2848		}
2849
2850		void tms3203x_device::subc_ind(UINT32 op)
2851		{
2852		UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
2853		int dreg = (op >> 16) & 31;
2854		SUBC(dreg, src);
2855		}
2856
2857		void tms3203x_device::subc_imm(UINT32 op)
2858		{
2859		UINT32 src = (INT16)op;
2860		int dreg = (op >> 16) & 31;
2861		SUBC(dreg, src);
2862		}
2863
2864		/*-----------------------------------------------------*/
2865
2866		void tms3203x_device::subf_reg(UINT32 op)
2867		{
2868		int dreg = (op >> 16) & 7;
2869		subf(m_r[dreg], m_r[dreg], m_r[op & 7]);
2870		}
2871
2872		void tms3203x_device::subf_dir(UINT32 op)
2873		{
2874		UINT32 res = RMEM(DIRECT(op));
2875		int dreg = (op >> 16) & 7;
2876		LONG2FP(TMR_TEMP1, res);
2877		subf(m_r[dreg], m_r[dreg], m_r[TMR_TEMP1]);
2878		}
2879
2880		void tms3203x_device::subf_ind(UINT32 op)
2881		{
2882		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
2883		int dreg = (op >> 16) & 7;
2884		LONG2FP(TMR_TEMP1, res);
2885		subf(m_r[dreg], m_r[dreg], m_r[TMR_TEMP1]);
2886		}
2887
2888		void tms3203x_device::subf_imm(UINT32 op)
2889		{
2890		int dreg = (op >> 16) & 7;
2891		SHORT2FP(TMR_TEMP1, op);
2892		subf(m_r[dreg], m_r[dreg], m_r[TMR_TEMP1]);
2893		}
2894
2895		/*-----------------------------------------------------*/
2896
2897		#define SUBI(dreg, src1, src2)                                      \
2898		{                                                                   \
2899		UINT32 _res = src1 - src2;                                      \
2900		if (!OVM() || !OVERFLOW_SUB(src1,src2,_res))                    \
2901		IREG(dreg) = _res;                                          \
2902		else                                                            \
2903		IREG(dreg) = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff;   \
2904		if (dreg < 8)                                                   \
2905		{                                                               \
2906		CLR_NZCVUF();                                               \
2907		OR_C_SUB(src1,src2,_res);                                   \
2908		OR_V_SUB(src1,src2,_res);                                   \
2909		OR_NZ(_res);                                                \
2910		}                                                               \
2911		else if (dreg >= TMR_BK)                                        \
2912		update_special(dreg);                                       \
2913		}
2914
2915		void tms3203x_device::subi_reg(UINT32 op)
2916		{
2917		UINT32 src = IREG(op & 31);
2918		int dreg = (op >> 16) & 31;
2919		UINT32 dst = IREG(dreg);
2920		SUBI(dreg, dst, src);
2921		}
2922
2923		void tms3203x_device::subi_dir(UINT32 op)
2924		{
2925		UINT32 src = RMEM(DIRECT(op));
2926		int dreg = (op >> 16) & 31;
2927		UINT32 dst = IREG(dreg);
2928		SUBI(dreg, dst, src);
2929		}
2930
2931		void tms3203x_device::subi_ind(UINT32 op)
2932		{
2933		UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
2934		int dreg = (op >> 16) & 31;
2935		UINT32 dst = IREG(dreg);
2936		SUBI(dreg, dst, src);
2937		}
2938
2939		void tms3203x_device::subi_imm(UINT32 op)
2940		{
2941		UINT32 src = (INT16)op;
2942		int dreg = (op >> 16) & 31;
2943		UINT32 dst = IREG(dreg);
2944		SUBI(dreg, dst, src);
2945		}
2946
2947		/*-----------------------------------------------------*/
2948
2949		void tms3203x_device::subrb_reg(UINT32 op)
2950		{
2951		UINT32 src = IREG(op & 31);
2952		int dreg = (op >> 16) & 31;
2953		UINT32 dst = IREG(dreg);
2954		SUBB(dreg, src, dst);
2955		}
2956
2957		void tms3203x_device::subrb_dir(UINT32 op)
2958		{
2959		UINT32 src = RMEM(DIRECT(op));
2960		int dreg = (op >> 16) & 31;
2961		UINT32 dst = IREG(dreg);
2962		SUBB(dreg, src, dst);
2963		}
2964
2965		void tms3203x_device::subrb_ind(UINT32 op)
2966		{
2967		UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
2968		int dreg = (op >> 16) & 31;
2969		UINT32 dst = IREG(dreg);
2970		SUBB(dreg, src, dst);
2971		}
2972
2973		void tms3203x_device::subrb_imm(UINT32 op)
2974		{
2975		UINT32 src = (INT16)op;
2976		int dreg = (op >> 16) & 31;
2977		UINT32 dst = IREG(dreg);
2978		SUBB(dreg, src, dst);
2979		}
2980
2981		/*-----------------------------------------------------*/
2982
2983		void tms3203x_device::subrf_reg(UINT32 op)
2984		{
2985		int dreg = (op >> 16) & 7;
2986		subf(m_r[dreg], m_r[op & 7], m_r[dreg]);
2987		}
2988
2989		void tms3203x_device::subrf_dir(UINT32 op)
2990		{
2991		UINT32 res = RMEM(DIRECT(op));
2992		int dreg = (op >> 16) & 7;
2993		LONG2FP(TMR_TEMP1, res);
2994		subf(m_r[dreg], m_r[TMR_TEMP1], m_r[dreg]);
2995		}
2996
2997		void tms3203x_device::subrf_ind(UINT32 op)
2998		{
2999		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
3000		int dreg = (op >> 16) & 7;
3001		LONG2FP(TMR_TEMP1, res);
3002		subf(m_r[dreg], m_r[TMR_TEMP1], m_r[dreg]);
3003		}
3004
3005		void tms3203x_device::subrf_imm(UINT32 op)
3006		{
3007		int dreg = (op >> 16) & 7;
3008		SHORT2FP(TMR_TEMP1, op);
3009		subf(m_r[dreg], m_r[TMR_TEMP1], m_r[dreg]);
3010		}
3011
3012		/*-----------------------------------------------------*/
3013
3014		void tms3203x_device::subri_reg(UINT32 op)
3015		{
3016		UINT32 src = IREG(op & 31);
3017		int dreg = (op >> 16) & 31;
3018		UINT32 dst = IREG(dreg);
3019		SUBI(dreg, src, dst);
3020		}
3021
3022		void tms3203x_device::subri_dir(UINT32 op)
3023		{
3024		UINT32 src = RMEM(DIRECT(op));
3025		int dreg = (op >> 16) & 31;
3026		UINT32 dst = IREG(dreg);
3027		SUBI(dreg, src, dst);
3028		}
3029
3030		void tms3203x_device::subri_ind(UINT32 op)
3031		{
3032		UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
3033		int dreg = (op >> 16) & 31;
3034		UINT32 dst = IREG(dreg);
3035		SUBI(dreg, src, dst);
3036		}
3037
3038		void tms3203x_device::subri_imm(UINT32 op)
3039		{
3040		UINT32 src = (INT16)op;
3041		int dreg = (op >> 16) & 31;
3042		UINT32 dst = IREG(dreg);
3043		SUBI(dreg, src, dst);
3044		}
3045
3046		/*-----------------------------------------------------*/
3047
3048		#define TSTB(src1, src2)                                            \
3049		{                                                                   \
3050		UINT32 _res = (src1) & (src2);                                  \
3051		CLR_NZVUF();                                                    \
3052		OR_NZ(_res);                                                    \
3053		}
3054
3055		void tms3203x_device::tstb_reg(UINT32 op)
3056		{
3057		UINT32 src = IREG(op & 31);
3058		UINT32 dst = IREG((op >> 16) & 31);
3059		TSTB(dst, src);
3060		}
3061
3062		void tms3203x_device::tstb_dir(UINT32 op)
3063		{
3064		UINT32 src = RMEM(DIRECT(op));
3065		UINT32 dst = IREG((op >> 16) & 31);
3066		TSTB(dst, src);
3067		}
3068
3069		void tms3203x_device::tstb_ind(UINT32 op)
3070		{
3071		UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
3072		UINT32 dst = IREG((op >> 16) & 31);
3073		TSTB(dst, src);
3074		}
3075
3076		void tms3203x_device::tstb_imm(UINT32 op)
3077		{
3078		UINT32 src = (UINT16)op;
3079		UINT32 dst = IREG((op >> 16) & 31);
3080		TSTB(dst, src);
3081		}
3082
3083		/*-----------------------------------------------------*/
3084
3085		#define XOR(dreg, src1, src2)                                       \
3086		{                                                                   \
3087		UINT32 _res = (src1) ^ (src2);                                  \
3088		IREG(dreg) = _res;                                              \
3089		if (dreg < 8)                                                   \
3090		{                                                               \
3091		CLR_NZVUF();                                                \
3092		OR_NZ(_res);                                                \
3093		}                                                               \
3094		else if (dreg >= TMR_BK)                                        \
3095		update_special(dreg);                                       \
3096		}
3097
3098		void tms3203x_device::xor_reg(UINT32 op)
3099		{
3100		UINT32 src = IREG(op & 31);
3101		int dreg = (op >> 16) & 31;
3102		UINT32 dst = IREG(dreg);
3103		XOR(dreg, dst, src);
3104		}
3105
3106		void tms3203x_device::xor_dir(UINT32 op)
3107		{
3108		UINT32 src = RMEM(DIRECT(op));
3109		int dreg = (op >> 16) & 31;
3110		UINT32 dst = IREG(dreg);
3111		XOR(dreg, dst, src);
3112		}
3113
3114		void tms3203x_device::xor_ind(UINT32 op)
3115		{
3116		UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
3117		int dreg = (op >> 16) & 31;
3118		UINT32 dst = IREG(dreg);
3119		XOR(dreg, dst, src);
3120		}
3121
3122		void tms3203x_device::xor_imm(UINT32 op)
3123		{
3124		UINT32 src = (UINT16)op;
3125		int dreg = (op >> 16) & 31;
3126		UINT32 dst = IREG(dreg);
3127		XOR(dreg, dst, src);
3128		}
3129
3130		/*-----------------------------------------------------*/
3131
3132		void tms3203x_device::iack_dir(UINT32 op)
3133		{
3134		offs_t addr = DIRECT(op);
3135		m_iack_cb(addr, ASSERT_LINE);
3136		RMEM(addr);
3137		m_iack_cb(addr, CLEAR_LINE);
3138		}
3139
3140		void tms3203x_device::iack_ind(UINT32 op)
3141		{
3142		offs_t addr = INDIRECT_D(op, op >> 8);
3143		m_iack_cb(addr, ASSERT_LINE);
3144		RMEM(addr);
3145		m_iack_cb(addr, CLEAR_LINE);
3146		}
3147
3148		/*-----------------------------------------------------*/
3149
3150		void tms3203x_device::addc3_regreg(UINT32 op)
3151		{
3152		UINT32 src1 = IREG((op >> 8) & 31);
3153		UINT32 src2 = IREG(op & 31);
3154		int dreg = (op >> 16) & 31;
3155		ADDC(dreg, src1, src2);
3156		}
3157
3158		void tms3203x_device::addc3_indreg(UINT32 op)
3159		{
3160		UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
3161		UINT32 src2 = IREG(op & 31);
3162		int dreg = (op >> 16) & 31;
3163		ADDC(dreg, src1, src2);
3164		}
3165
3166		void tms3203x_device::addc3_regind(UINT32 op)
3167		{
3168		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3169		UINT32 src1 = IREG((op >> 8) & 31);
3170		int dreg = (op >> 16) & 31;
3171		ADDC(dreg, src1, src2);
3172		}
3173
3174		void tms3203x_device::addc3_indind(UINT32 op)
3175		{
3176		DECLARE_DEF;
3177		UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
3178		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3179		int dreg = (op >> 16) & 31;
3180		UPDATE_DEF();
3181		ADDC(dreg, src1, src2);
3182		}
3183
3184		/*-----------------------------------------------------*/
3185
3186		void tms3203x_device::addf3_regreg(UINT32 op)
3187		{
3188		int sreg1 = (op >> 8) & 7;
3189		int sreg2 = op & 7;
3190		int dreg = (op >> 16) & 7;
3191		addf(m_r[dreg], m_r[sreg1], m_r[sreg2]);
3192		}
3193
3194		void tms3203x_device::addf3_indreg(UINT32 op)
3195		{
3196		UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
3197		int sreg2 = op & 7;
3198		int dreg = (op >> 16) & 7;
3199		LONG2FP(TMR_TEMP1, src1);
3200		addf(m_r[dreg], m_r[TMR_TEMP1], m_r[sreg2]);
3201		}
3202
3203		void tms3203x_device::addf3_regind(UINT32 op)
3204		{
3205		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3206		int sreg1 = (op >> 8) & 7;
3207		int dreg = (op >> 16) & 7;
3208		LONG2FP(TMR_TEMP2, src2);
3209		addf(m_r[dreg], m_r[sreg1], m_r[TMR_TEMP2]);
3210		}
3211
3212		void tms3203x_device::addf3_indind(UINT32 op)
3213		{
3214		DECLARE_DEF;
3215		UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
3216		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3217		int dreg = (op >> 16) & 7;
3218		UPDATE_DEF();
3219		LONG2FP(TMR_TEMP1, src1);
3220		LONG2FP(TMR_TEMP2, src2);
3221		addf(m_r[dreg], m_r[TMR_TEMP1], m_r[TMR_TEMP2]);
3222		}
3223
3224		/*-----------------------------------------------------*/
3225
3226		void tms3203x_device::addi3_regreg(UINT32 op)
3227		{
3228		UINT32 src1 = IREG((op >> 8) & 31);
3229		UINT32 src2 = IREG(op & 31);
3230		int dreg = (op >> 16) & 31;
3231		ADDI(dreg, src1, src2);
3232		}
3233
3234		void tms3203x_device::addi3_indreg(UINT32 op)
3235		{
3236		UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
3237		UINT32 src2 = IREG(op & 31);
3238		int dreg = (op >> 16) & 31;
3239		ADDI(dreg, src1, src2);
3240		}
3241
3242		void tms3203x_device::addi3_regind(UINT32 op)
3243		{
3244		// Radikal Bikers confirms via ADDI3 AR3,*AR3++(1),R2 / SUB $0001,R2 sequence
3245		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3246		UINT32 src1 = IREG((op >> 8) & 31);
3247		int dreg = (op >> 16) & 31;
3248		ADDI(dreg, src1, src2);
3249		}
3250
3251		void tms3203x_device::addi3_indind(UINT32 op)
3252		{
3253		DECLARE_DEF;
3254		UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
3255		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3256		int dreg = (op >> 16) & 31;
3257		UPDATE_DEF();
3258		ADDI(dreg, src1, src2);
3259		}
3260
3261		/*-----------------------------------------------------*/
3262
3263		void tms3203x_device::and3_regreg(UINT32 op)
3264		{
3265		UINT32 src1 = IREG((op >> 8) & 31);
3266		UINT32 src2 = IREG(op & 31);
3267		int dreg = (op >> 16) & 31;
3268		AND(dreg, src1, src2);
3269		}
3270
3271		void tms3203x_device::and3_indreg(UINT32 op)
3272		{
3273		UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
3274		UINT32 src2 = IREG(op & 31);
3275		int dreg = (op >> 16) & 31;
3276		AND(dreg, src1, src2);
3277		}
3278
3279		void tms3203x_device::and3_regind(UINT32 op)
3280		{
3281		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3282		UINT32 src1 = IREG((op >> 8) & 31);
3283		int dreg = (op >> 16) & 31;
3284		AND(dreg, src1, src2);
3285		}
3286
3287		void tms3203x_device::and3_indind(UINT32 op)
3288		{
3289		DECLARE_DEF;
3290		UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
3291		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3292		int dreg = (op >> 16) & 31;
3293		UPDATE_DEF();
3294		AND(dreg, src1, src2);
3295		}
3296
3297		/*-----------------------------------------------------*/
3298
3299		void tms3203x_device::andn3_regreg(UINT32 op)
3300		{
3301		UINT32 src1 = IREG((op >> 8) & 31);
3302		UINT32 src2 = IREG(op & 31);
3303		int dreg = (op >> 16) & 31;
3304		ANDN(dreg, src1, src2);
3305		}
3306
3307		void tms3203x_device::andn3_indreg(UINT32 op)
3308		{
3309		UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
3310		UINT32 src2 = IREG(op & 31);
3311		int dreg = (op >> 16) & 31;
3312		ANDN(dreg, src1, src2);
3313		}
3314
3315		void tms3203x_device::andn3_regind(UINT32 op)
3316		{
3317		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3318		UINT32 src1 = IREG((op >> 8) & 31);
3319		int dreg = (op >> 16) & 31;
3320		ANDN(dreg, src1, src2);
3321		}
3322
3323		void tms3203x_device::andn3_indind(UINT32 op)
3324		{
3325		DECLARE_DEF;
3326		UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
3327		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3328		int dreg = (op >> 16) & 31;
3329		UPDATE_DEF();
3330		ANDN(dreg, src1, src2);
3331		}
3332
3333		/*-----------------------------------------------------*/
3334
3335		void tms3203x_device::ash3_regreg(UINT32 op)
3336		{
3337		UINT32 src1 = IREG((op >> 8) & 31);
3338		UINT32 src2 = IREG(op & 31);
3339		int dreg = (op >> 16) & 31;
3340		ASH(dreg, src1, src2);
3341		}
3342
3343		void tms3203x_device::ash3_indreg(UINT32 op)
3344		{
3345		UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
3346		UINT32 src2 = IREG(op & 31);
3347		int dreg = (op >> 16) & 31;
3348		ASH(dreg, src1, src2);
3349		}
3350
3351		void tms3203x_device::ash3_regind(UINT32 op)
3352		{
3353		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3354		UINT32 src1 = IREG((op >> 8) & 31);
3355		int dreg = (op >> 16) & 31;
3356		ASH(dreg, src1, src2);
3357		}
3358
3359		void tms3203x_device::ash3_indind(UINT32 op)
3360		{
3361		DECLARE_DEF;
3362		UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
3363		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3364		int dreg = (op >> 16) & 31;
3365		UPDATE_DEF();
3366		ASH(dreg, src1, src2);
3367		}
3368
3369		/*-----------------------------------------------------*/
3370
3371		void tms3203x_device::cmpf3_regreg(UINT32 op)
3372		{
3373		int sreg1 = (op >> 8) & 7;
3374		int sreg2 = op & 7;
3375		subf(m_r[TMR_TEMP1], m_r[sreg1], m_r[sreg2]);
3376		}
3377
3378		void tms3203x_device::cmpf3_indreg(UINT32 op)
3379		{
3380		UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
3381		int sreg2 = op & 7;
3382		LONG2FP(TMR_TEMP1, src1);
3383		subf(m_r[TMR_TEMP1], m_r[TMR_TEMP1], m_r[sreg2]);
3384		}
3385
3386		void tms3203x_device::cmpf3_regind(UINT32 op)
3387		{
3388		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3389		int sreg1 = (op >> 8) & 7;
3390		LONG2FP(TMR_TEMP2, src2);
3391		subf(m_r[TMR_TEMP1], m_r[sreg1], m_r[TMR_TEMP2]);
3392		}
3393
3394		void tms3203x_device::cmpf3_indind(UINT32 op)
3395		{
3396		DECLARE_DEF;
3397		UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
3398		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3399		UPDATE_DEF();
3400		LONG2FP(TMR_TEMP1, src1);
3401		LONG2FP(TMR_TEMP2, src2);
3402		subf(m_r[TMR_TEMP1], m_r[TMR_TEMP1], m_r[TMR_TEMP2]);
3403		}
3404
3405		/*-----------------------------------------------------*/
3406
3407		void tms3203x_device::cmpi3_regreg(UINT32 op)
3408		{
3409		UINT32 src1 = IREG((op >> 8) & 31);
3410		UINT32 src2 = IREG(op & 31);
3411		CMPI(src1, src2);
3412		}
3413
3414		void tms3203x_device::cmpi3_indreg(UINT32 op)
3415		{
3416		UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
3417		UINT32 src2 = IREG(op & 31);
3418		CMPI(src1, src2);
3419		}
3420
3421		void tms3203x_device::cmpi3_regind(UINT32 op)
3422		{
3423		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3424		UINT32 src1 = IREG((op >> 8) & 31);
3425		CMPI(src1, src2);
3426		}
3427
3428		void tms3203x_device::cmpi3_indind(UINT32 op)
3429		{
3430		DECLARE_DEF;
3431		UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
3432		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3433		UPDATE_DEF();
3434		CMPI(src1, src2);
3435		}
3436
3437		/*-----------------------------------------------------*/
3438
3439		void tms3203x_device::lsh3_regreg(UINT32 op)
3440		{
3441		UINT32 src1 = IREG((op >> 8) & 31);
3442		UINT32 src2 = IREG(op & 31);
3443		int dreg = (op >> 16) & 31;
3444		LSH(dreg, src1, src2);
3445		}
3446
3447		void tms3203x_device::lsh3_indreg(UINT32 op)
3448		{
3449		UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
3450		UINT32 src2 = IREG(op & 31);
3451		int dreg = (op >> 16) & 31;
3452		LSH(dreg, src1, src2);
3453		}
3454
3455		void tms3203x_device::lsh3_regind(UINT32 op)
3456		{
3457		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3458		UINT32 src1 = IREG((op >> 8) & 31);
3459		int dreg = (op >> 16) & 31;
3460		LSH(dreg, src1, src2);
3461		}
3462
3463		void tms3203x_device::lsh3_indind(UINT32 op)
3464		{
3465		DECLARE_DEF;
3466		UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
3467		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3468		int dreg = (op >> 16) & 31;
3469		UPDATE_DEF();
3470		LSH(dreg, src1, src2);
3471		}
3472
3473		/*-----------------------------------------------------*/
3474
3475		void tms3203x_device::mpyf3_regreg(UINT32 op)
3476		{
3477		int sreg1 = (op >> 8) & 7;
3478		int sreg2 = op & 7;
3479		int dreg = (op >> 16) & 7;
3480		mpyf(m_r[dreg], m_r[sreg1], m_r[sreg2]);
3481		}
3482
3483		void tms3203x_device::mpyf3_indreg(UINT32 op)
3484		{
3485		UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
3486		int sreg2 = op & 7;
3487		int dreg = (op >> 16) & 7;
3488		LONG2FP(TMR_TEMP1, src1);
3489		mpyf(m_r[dreg], m_r[TMR_TEMP1], m_r[sreg2]);
3490		}
3491
3492		void tms3203x_device::mpyf3_regind(UINT32 op)
3493		{
3494		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3495		int sreg1 = (op >> 8) & 7;
3496		int dreg = (op >> 16) & 7;
3497		LONG2FP(TMR_TEMP2, src2);
3498		mpyf(m_r[dreg], m_r[sreg1], m_r[TMR_TEMP2]);
3499		}
3500
3501		void tms3203x_device::mpyf3_indind(UINT32 op)
3502		{
3503		DECLARE_DEF;
3504		UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
3505		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3506		int dreg = (op >> 16) & 7;
3507		UPDATE_DEF();
3508		LONG2FP(TMR_TEMP1, src1);
3509		LONG2FP(TMR_TEMP2, src2);
3510		mpyf(m_r[dreg], m_r[TMR_TEMP1], m_r[TMR_TEMP2]);
3511		}
3512
3513		/*-----------------------------------------------------*/
3514
3515		void tms3203x_device::mpyi3_regreg(UINT32 op)
3516		{
3517		UINT32 src1 = IREG((op >> 8) & 31);
3518		UINT32 src2 = IREG(op & 31);
3519		int dreg = (op >> 16) & 31;
3520		MPYI(dreg, src1, src2);
3521		}
3522
3523		void tms3203x_device::mpyi3_indreg(UINT32 op)
3524		{
3525		UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
3526		UINT32 src2 = IREG(op & 31);
3527		int dreg = (op >> 16) & 31;
3528		MPYI(dreg, src1, src2);
3529		}
3530
3531		void tms3203x_device::mpyi3_regind(UINT32 op)
3532		{
3533		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3534		UINT32 src1 = IREG((op >> 8) & 31);
3535		int dreg = (op >> 16) & 31;
3536		MPYI(dreg, src1, src2);
3537		}
3538
3539		void tms3203x_device::mpyi3_indind(UINT32 op)
3540		{
3541		DECLARE_DEF;
3542		UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
3543		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3544		int dreg = (op >> 16) & 31;
3545		UPDATE_DEF();
3546		MPYI(dreg, src1, src2);
3547		}
3548
3549		/*-----------------------------------------------------*/
3550
3551		void tms3203x_device::or3_regreg(UINT32 op)
3552		{
3553		UINT32 src1 = IREG((op >> 8) & 31);
3554		UINT32 src2 = IREG(op & 31);
3555		int dreg = (op >> 16) & 31;
3556		OR(dreg, src1, src2);
3557		}
3558
3559		void tms3203x_device::or3_indreg(UINT32 op)
3560		{
3561		UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
3562		UINT32 src2 = IREG(op & 31);
3563		int dreg = (op >> 16) & 31;
3564		OR(dreg, src1, src2);
3565		}
3566
3567		void tms3203x_device::or3_regind(UINT32 op)
3568		{
3569		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3570		UINT32 src1 = IREG((op >> 8) & 31);
3571		int dreg = (op >> 16) & 31;
3572		OR(dreg, src1, src2);
3573		}
3574
3575		void tms3203x_device::or3_indind(UINT32 op)
3576		{
3577		DECLARE_DEF;
3578		UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
3579		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3580		int dreg = (op >> 16) & 31;
3581		UPDATE_DEF();
3582		OR(dreg, src1, src2);
3583		}
3584
3585		/*-----------------------------------------------------*/
3586
3587		void tms3203x_device::subb3_regreg(UINT32 op)
3588		{
3589		UINT32 src1 = IREG((op >> 8) & 31);
3590		UINT32 src2 = IREG(op & 31);
3591		int dreg = (op >> 16) & 31;
3592		SUBB(dreg, src1, src2);
3593		}
3594
3595		void tms3203x_device::subb3_indreg(UINT32 op)
3596		{
3597		UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
3598		UINT32 src2 = IREG(op & 31);
3599		int dreg = (op >> 16) & 31;
3600		SUBB(dreg, src1, src2);
3601		}
3602
3603		void tms3203x_device::subb3_regind(UINT32 op)
3604		{
3605		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3606		UINT32 src1 = IREG((op >> 8) & 31);
3607		int dreg = (op >> 16) & 31;
3608		SUBB(dreg, src1, src2);
3609		}
3610
3611		void tms3203x_device::subb3_indind(UINT32 op)
3612		{
3613		DECLARE_DEF;
3614		UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
3615		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3616		int dreg = (op >> 16) & 31;
3617		UPDATE_DEF();
3618		SUBB(dreg, src1, src2);
3619		}
3620
3621		/*-----------------------------------------------------*/
3622
3623		void tms3203x_device::subf3_regreg(UINT32 op)
3624		{
3625		int sreg1 = (op >> 8) & 7;
3626		int sreg2 = op & 7;
3627		int dreg = (op >> 16) & 7;
3628		subf(m_r[dreg], m_r[sreg1], m_r[sreg2]);
3629		}
3630
3631		void tms3203x_device::subf3_indreg(UINT32 op)
3632		{
3633		UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
3634		int sreg2 = op & 7;
3635		int dreg = (op >> 16) & 7;
3636		LONG2FP(TMR_TEMP1, src1);
3637		subf(m_r[dreg], m_r[TMR_TEMP1], m_r[sreg2]);
3638		}
3639
3640		void tms3203x_device::subf3_regind(UINT32 op)
3641		{
3642		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3643		int sreg1 = (op >> 8) & 7;
3644		int dreg = (op >> 16) & 7;
3645		LONG2FP(TMR_TEMP2, src2);
3646		subf(m_r[dreg], m_r[sreg1], m_r[TMR_TEMP2]);
3647		}
3648
3649		void tms3203x_device::subf3_indind(UINT32 op)
3650		{
3651		DECLARE_DEF;
3652		UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
3653		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3654		int dreg = (op >> 16) & 7;
3655		UPDATE_DEF();
3656		LONG2FP(TMR_TEMP1, src1);
3657		LONG2FP(TMR_TEMP2, src2);
3658		subf(m_r[dreg], m_r[TMR_TEMP1], m_r[TMR_TEMP2]);
3659		}
3660
3661		/*-----------------------------------------------------*/
3662
3663		void tms3203x_device::subi3_regreg(UINT32 op)
3664		{
3665		UINT32 src1 = IREG((op >> 8) & 31);
3666		UINT32 src2 = IREG(op & 31);
3667		int dreg = (op >> 16) & 31;
3668		SUBI(dreg, src1, src2);
3669		}
3670
3671		void tms3203x_device::subi3_indreg(UINT32 op)
3672		{
3673		UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
3674		UINT32 src2 = IREG(op & 31);
3675		int dreg = (op >> 16) & 31;
3676		SUBI(dreg, src1, src2);
3677		}
3678
3679		void tms3203x_device::subi3_regind(UINT32 op)
3680		{
3681		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3682		UINT32 src1 = IREG((op >> 8) & 31);
3683		int dreg = (op >> 16) & 31;
3684		SUBI(dreg, src1, src2);
3685		}
3686
3687		void tms3203x_device::subi3_indind(UINT32 op)
3688		{
3689		DECLARE_DEF;
3690		UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
3691		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3692		int dreg = (op >> 16) & 31;
3693		UPDATE_DEF();
3694		SUBI(dreg, src1, src2);
3695		}
3696
3697		/*-----------------------------------------------------*/
3698
3699		void tms3203x_device::tstb3_regreg(UINT32 op)
3700		{
3701		UINT32 src1 = IREG((op >> 8) & 31);
3702		UINT32 src2 = IREG(op & 31);
3703		TSTB(src1, src2);
3704		}
3705
3706		void tms3203x_device::tstb3_indreg(UINT32 op)
3707		{
3708		UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
3709		UINT32 src2 = IREG(op & 31);
3710		TSTB(src1, src2);
3711		}
3712
3713		void tms3203x_device::tstb3_regind(UINT32 op)
3714		{
3715		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3716		UINT32 src1 = IREG((op >> 8) & 31);
3717		TSTB(src1, src2);
3718		}
3719
3720		void tms3203x_device::tstb3_indind(UINT32 op)
3721		{
3722		DECLARE_DEF;
3723		UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
3724		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3725		UPDATE_DEF();
3726		TSTB(src1, src2);
3727		}
3728
3729		/*-----------------------------------------------------*/
3730
3731		void tms3203x_device::xor3_regreg(UINT32 op)
3732		{
3733		UINT32 src1 = IREG((op >> 8) & 31);
3734		UINT32 src2 = IREG(op & 31);
3735		int dreg = (op >> 16) & 31;
3736		XOR(dreg, src1, src2);
3737		}
3738
3739		void tms3203x_device::xor3_indreg(UINT32 op)
3740		{
3741		UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
3742		UINT32 src2 = IREG(op & 31);
3743		int dreg = (op >> 16) & 31;
3744		XOR(dreg, src1, src2);
3745		}
3746
3747		void tms3203x_device::xor3_regind(UINT32 op)
3748		{
3749		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3750		UINT32 src1 = IREG((op >> 8) & 31);
3751		int dreg = (op >> 16) & 31;
3752		XOR(dreg, src1, src2);
3753		}
3754
3755		void tms3203x_device::xor3_indind(UINT32 op)
3756		{
3757		DECLARE_DEF;
3758		UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
3759		UINT32 src2 = RMEM(INDIRECT_1(op, op));
3760		int dreg = (op >> 16) & 31;
3761		UPDATE_DEF();
3762		XOR(dreg, src1, src2);
3763		}
3764
3765		/*-----------------------------------------------------*/
3766
3767		void tms3203x_device::ldfu_reg(UINT32 op)
3768		{
3769		m_r[(op >> 16) & 7] = m_r[op & 7];
3770		}
3771
3772		void tms3203x_device::ldfu_dir(UINT32 op)
3773		{
3774		UINT32 res = RMEM(DIRECT(op));
3775		int dreg = (op >> 16) & 7;
3776		LONG2FP(dreg, res);
3777		}
3778
3779		void tms3203x_device::ldfu_ind(UINT32 op)
3780		{
3781		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
3782		int dreg = (op >> 16) & 7;
3783		LONG2FP(dreg, res);
3784		}
3785
3786		void tms3203x_device::ldfu_imm(UINT32 op)
3787		{
3788		int dreg = (op >> 16) & 7;
3789		SHORT2FP(dreg, op);
3790		}
3791
3792		/*-----------------------------------------------------*/
3793
3794		void tms3203x_device::ldflo_reg(UINT32 op)
3795		{
3796		if (CONDITION_LO())
3797		m_r[(op >> 16) & 7] = m_r[op & 7];
3798		}
3799
3800		void tms3203x_device::ldflo_dir(UINT32 op)
3801		{
3802		if (CONDITION_LO())
3803		{
3804		UINT32 res = RMEM(DIRECT(op));
3805		int dreg = (op >> 16) & 7;
3806		LONG2FP(dreg, res);
3807		}
3808		}
3809
3810		void tms3203x_device::ldflo_ind(UINT32 op)
3811		{
3812		if (CONDITION_LO())
3813		{
3814		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
3815		int dreg = (op >> 16) & 7;
3816		LONG2FP(dreg, res);
3817		}
3818		else
3819		INDIRECT_D(op, op >> 8);
3820		}
3821
3822		void tms3203x_device::ldflo_imm(UINT32 op)
3823		{
3824		if (CONDITION_LO())
3825		{
3826		int dreg = (op >> 16) & 7;
3827		SHORT2FP(dreg, op);
3828		}
3829		}
3830
3831		/*-----------------------------------------------------*/
3832
3833		void tms3203x_device::ldfls_reg(UINT32 op)
3834		{
3835		if (CONDITION_LS())
3836		m_r[(op >> 16) & 7] = m_r[op & 7];
3837		}
3838
3839		void tms3203x_device::ldfls_dir(UINT32 op)
3840		{
3841		if (CONDITION_LS())
3842		{
3843		UINT32 res = RMEM(DIRECT(op));
3844		int dreg = (op >> 16) & 7;
3845		LONG2FP(dreg, res);
3846		}
3847		}
3848
3849		void tms3203x_device::ldfls_ind(UINT32 op)
3850		{
3851		if (CONDITION_LS())
3852		{
3853		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
3854		int dreg = (op >> 16) & 7;
3855		LONG2FP(dreg, res);
3856		}
3857		else
3858		INDIRECT_D(op, op >> 8);
3859		}
3860
3861		void tms3203x_device::ldfls_imm(UINT32 op)
3862		{
3863		if (CONDITION_LS())
3864		{
3865		int dreg = (op >> 16) & 7;
3866		SHORT2FP(dreg, op);
3867		}
3868		}
3869
3870		/*-----------------------------------------------------*/
3871
3872		void tms3203x_device::ldfhi_reg(UINT32 op)
3873		{
3874		if (CONDITION_HI())
3875		m_r[(op >> 16) & 7] = m_r[op & 7];
3876		}
3877
3878		void tms3203x_device::ldfhi_dir(UINT32 op)
3879		{
3880		if (CONDITION_HI())
3881		{
3882		UINT32 res = RMEM(DIRECT(op));
3883		int dreg = (op >> 16) & 7;
3884		LONG2FP(dreg, res);
3885		}
3886		}
3887
3888		void tms3203x_device::ldfhi_ind(UINT32 op)
3889		{
3890		if (CONDITION_HI())
3891		{
3892		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
3893		int dreg = (op >> 16) & 7;
3894		LONG2FP(dreg, res);
3895		}
3896		else
3897		INDIRECT_D(op, op >> 8);
3898		}
3899
3900		void tms3203x_device::ldfhi_imm(UINT32 op)
3901		{
3902		if (CONDITION_HI())
3903		{
3904		int dreg = (op >> 16) & 7;
3905		SHORT2FP(dreg, op);
3906		}
3907		}
3908
3909		/*-----------------------------------------------------*/
3910
3911		void tms3203x_device::ldfhs_reg(UINT32 op)
3912		{
3913		if (CONDITION_HS())
3914		m_r[(op >> 16) & 7] = m_r[op & 7];
3915		}
3916
3917		void tms3203x_device::ldfhs_dir(UINT32 op)
3918		{
3919		if (CONDITION_HS())
3920		{
3921		UINT32 res = RMEM(DIRECT(op));
3922		int dreg = (op >> 16) & 7;
3923		LONG2FP(dreg, res);
3924		}
3925		}
3926
3927		void tms3203x_device::ldfhs_ind(UINT32 op)
3928		{
3929		if (CONDITION_HS())
3930		{
3931		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
3932		int dreg = (op >> 16) & 7;
3933		LONG2FP(dreg, res);
3934		}
3935		else
3936		INDIRECT_D(op, op >> 8);
3937		}
3938
3939		void tms3203x_device::ldfhs_imm(UINT32 op)
3940		{
3941		if (CONDITION_HS())
3942		{
3943		int dreg = (op >> 16) & 7;
3944		SHORT2FP(dreg, op);
3945		}
3946		}
3947
3948		/*-----------------------------------------------------*/
3949
3950		void tms3203x_device::ldfeq_reg(UINT32 op)
3951		{
3952		if (CONDITION_EQ())
3953		m_r[(op >> 16) & 7] = m_r[op & 7];
3954		}
3955
3956		void tms3203x_device::ldfeq_dir(UINT32 op)
3957		{
3958		if (CONDITION_EQ())
3959		{
3960		UINT32 res = RMEM(DIRECT(op));
3961		int dreg = (op >> 16) & 7;
3962		LONG2FP(dreg, res);
3963		}
3964		}
3965
3966		void tms3203x_device::ldfeq_ind(UINT32 op)
3967		{
3968		if (CONDITION_EQ())
3969		{
3970		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
3971		int dreg = (op >> 16) & 7;
3972		LONG2FP(dreg, res);
3973		}
3974		else
3975		INDIRECT_D(op, op >> 8);
3976		}
3977
3978		void tms3203x_device::ldfeq_imm(UINT32 op)
3979		{
3980		if (CONDITION_EQ())
3981		{
3982		int dreg = (op >> 16) & 7;
3983		SHORT2FP(dreg, op);
3984		}
3985		}
3986
3987		/*-----------------------------------------------------*/
3988
3989		void tms3203x_device::ldfne_reg(UINT32 op)
3990		{
3991		if (CONDITION_NE())
3992		m_r[(op >> 16) & 7] = m_r[op & 7];
3993		}
3994
3995		void tms3203x_device::ldfne_dir(UINT32 op)
3996		{
3997		if (CONDITION_NE())
3998		{
3999		UINT32 res = RMEM(DIRECT(op));
4000		int dreg = (op >> 16) & 7;
4001		LONG2FP(dreg, res);
4002		}
4003		}
4004
4005		void tms3203x_device::ldfne_ind(UINT32 op)
4006		{
4007		if (CONDITION_NE())
4008		{
4009		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
4010		int dreg = (op >> 16) & 7;
4011		LONG2FP(dreg, res);
4012		}
4013		else
4014		INDIRECT_D(op, op >> 8);
4015		}
4016
4017		void tms3203x_device::ldfne_imm(UINT32 op)
4018		{
4019		if (CONDITION_NE())
4020		{
4021		int dreg = (op >> 16) & 7;
4022		SHORT2FP(dreg, op);
4023		}
4024		}
4025
4026		/*-----------------------------------------------------*/
4027
4028		void tms3203x_device::ldflt_reg(UINT32 op)
4029		{
4030		if (CONDITION_LT())
4031		m_r[(op >> 16) & 7] = m_r[op & 7];
4032		}
4033
4034		void tms3203x_device::ldflt_dir(UINT32 op)
4035		{
4036		if (CONDITION_LT())
4037		{
4038		UINT32 res = RMEM(DIRECT(op));
4039		int dreg = (op >> 16) & 7;
4040		LONG2FP(dreg, res);
4041		}
4042		}
4043
4044		void tms3203x_device::ldflt_ind(UINT32 op)
4045		{
4046		if (CONDITION_LT())
4047		{
4048		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
4049		int dreg = (op >> 16) & 7;
4050		LONG2FP(dreg, res);
4051		}
4052		else
4053		INDIRECT_D(op, op >> 8);
4054		}
4055
4056		void tms3203x_device::ldflt_imm(UINT32 op)
4057		{
4058		if (CONDITION_LT())
4059		{
4060		int dreg = (op >> 16) & 7;
4061		SHORT2FP(dreg, op);
4062		}
4063		}
4064
4065		/*-----------------------------------------------------*/
4066
4067		void tms3203x_device::ldfle_reg(UINT32 op)
4068		{
4069		if (CONDITION_LE())
4070		m_r[(op >> 16) & 7] = m_r[op & 7];
4071		}
4072
4073		void tms3203x_device::ldfle_dir(UINT32 op)
4074		{
4075		if (CONDITION_LE())
4076		{
4077		UINT32 res = RMEM(DIRECT(op));
4078		int dreg = (op >> 16) & 7;
4079		LONG2FP(dreg, res);
4080		}
4081		}
4082
4083		void tms3203x_device::ldfle_ind(UINT32 op)
4084		{
4085		if (CONDITION_LE())
4086		{
4087		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
4088		int dreg = (op >> 16) & 7;
4089		LONG2FP(dreg, res);
4090		}
4091		else
4092		INDIRECT_D(op, op >> 8);
4093		}
4094
4095		void tms3203x_device::ldfle_imm(UINT32 op)
4096		{
4097		if (CONDITION_LE())
4098		{
4099		int dreg = (op >> 16) & 7;
4100		SHORT2FP(dreg, op);
4101		}
4102		}
4103
4104		/*-----------------------------------------------------*/
4105
4106		void tms3203x_device::ldfgt_reg(UINT32 op)
4107		{
4108		if (CONDITION_GT())
4109		m_r[(op >> 16) & 7] = m_r[op & 7];
4110		}
4111
4112		void tms3203x_device::ldfgt_dir(UINT32 op)
4113		{
4114		if (CONDITION_GT())
4115		{
4116		UINT32 res = RMEM(DIRECT(op));
4117		int dreg = (op >> 16) & 7;
4118		LONG2FP(dreg, res);
4119		}
4120		}
4121
4122		void tms3203x_device::ldfgt_ind(UINT32 op)
4123		{
4124		if (CONDITION_GT())
4125		{
4126		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
4127		int dreg = (op >> 16) & 7;
4128		LONG2FP(dreg, res);
4129		}
4130		else
4131		INDIRECT_D(op, op >> 8);
4132		}
4133
4134		void tms3203x_device::ldfgt_imm(UINT32 op)
4135		{
4136		if (CONDITION_GT())
4137		{
4138		int dreg = (op >> 16) & 7;
4139		SHORT2FP(dreg, op);
4140		}
4141		}
4142
4143		/*-----------------------------------------------------*/
4144
4145		void tms3203x_device::ldfge_reg(UINT32 op)
4146		{
4147		if (CONDITION_GE())
4148		m_r[(op >> 16) & 7] = m_r[op & 7];
4149		}
4150
4151		void tms3203x_device::ldfge_dir(UINT32 op)
4152		{
4153		if (CONDITION_GE())
4154		{
4155		UINT32 res = RMEM(DIRECT(op));
4156		int dreg = (op >> 16) & 7;
4157		LONG2FP(dreg, res);
4158		}
4159		}
4160
4161		void tms3203x_device::ldfge_ind(UINT32 op)
4162		{
4163		if (CONDITION_GE())
4164		{
4165		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
4166		int dreg = (op >> 16) & 7;
4167		LONG2FP(dreg, res);
4168		}
4169		else
4170		INDIRECT_D(op, op >> 8);
4171		}
4172
4173		void tms3203x_device::ldfge_imm(UINT32 op)
4174		{
4175		if (CONDITION_GE())
4176		{
4177		int dreg = (op >> 16) & 7;
4178		SHORT2FP(dreg, op);
4179		}
4180		}
4181
4182		/*-----------------------------------------------------*/
4183
4184		void tms3203x_device::ldfnv_reg(UINT32 op)
4185		{
4186		if (CONDITION_NV())
4187		m_r[(op >> 16) & 7] = m_r[op & 7];
4188		}
4189
4190		void tms3203x_device::ldfnv_dir(UINT32 op)
4191		{
4192		if (CONDITION_NV())
4193		{
4194		UINT32 res = RMEM(DIRECT(op));
4195		int dreg = (op >> 16) & 7;
4196		LONG2FP(dreg, res);
4197		}
4198		}
4199
4200		void tms3203x_device::ldfnv_ind(UINT32 op)
4201		{
4202		if (CONDITION_NV())
4203		{
4204		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
4205		int dreg = (op >> 16) & 7;
4206		LONG2FP(dreg, res);
4207		}
4208		else
4209		INDIRECT_D(op, op >> 8);
4210		}
4211
4212		void tms3203x_device::ldfnv_imm(UINT32 op)
4213		{
4214		if (CONDITION_NV())
4215		{
4216		int dreg = (op >> 16) & 7;
4217		SHORT2FP(dreg, op);
4218		}
4219		}
4220
4221		/*-----------------------------------------------------*/
4222
4223		void tms3203x_device::ldfv_reg(UINT32 op)
4224		{
4225		if (CONDITION_V())
4226		m_r[(op >> 16) & 7] = m_r[op & 7];
4227		}
4228
4229		void tms3203x_device::ldfv_dir(UINT32 op)
4230		{
4231		if (CONDITION_V())
4232		{
4233		UINT32 res = RMEM(DIRECT(op));
4234		int dreg = (op >> 16) & 7;
4235		LONG2FP(dreg, res);
4236		}
4237		}
4238
4239		void tms3203x_device::ldfv_ind(UINT32 op)
4240		{
4241		if (CONDITION_V())
4242		{
4243		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
4244		int dreg = (op >> 16) & 7;
4245		LONG2FP(dreg, res);
4246		}
4247		else
4248		INDIRECT_D(op, op >> 8);
4249		}
4250
4251		void tms3203x_device::ldfv_imm(UINT32 op)
4252		{
4253		if (CONDITION_V())
4254		{
4255		int dreg = (op >> 16) & 7;
4256		SHORT2FP(dreg, op);
4257		}
4258		}
4259
4260		/*-----------------------------------------------------*/
4261
4262		void tms3203x_device::ldfnuf_reg(UINT32 op)
4263		{
4264		if (CONDITION_NUF())
4265		m_r[(op >> 16) & 7] = m_r[op & 7];
4266		}
4267
4268		void tms3203x_device::ldfnuf_dir(UINT32 op)
4269		{
4270		if (CONDITION_NUF())
4271		{
4272		UINT32 res = RMEM(DIRECT(op));
4273		int dreg = (op >> 16) & 7;
4274		LONG2FP(dreg, res);
4275		}
4276		}
4277
4278		void tms3203x_device::ldfnuf_ind(UINT32 op)
4279		{
4280		if (CONDITION_NUF())
4281		{
4282		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
4283		int dreg = (op >> 16) & 7;
4284		LONG2FP(dreg, res);
4285		}
4286		else
4287		INDIRECT_D(op, op >> 8);
4288		}
4289
4290		void tms3203x_device::ldfnuf_imm(UINT32 op)
4291		{
4292		if (CONDITION_NUF())
4293		{
4294		int dreg = (op >> 16) & 7;
4295		SHORT2FP(dreg, op);
4296		}
4297		}
4298
4299		/*-----------------------------------------------------*/
4300
4301		void tms3203x_device::ldfuf_reg(UINT32 op)
4302		{
4303		if (CONDITION_UF())
4304		m_r[(op >> 16) & 7] = m_r[op & 7];
4305		}
4306
4307		void tms3203x_device::ldfuf_dir(UINT32 op)
4308		{
4309		if (CONDITION_UF())
4310		{
4311		UINT32 res = RMEM(DIRECT(op));
4312		int dreg = (op >> 16) & 7;
4313		LONG2FP(dreg, res);
4314		}
4315		}
4316
4317		void tms3203x_device::ldfuf_ind(UINT32 op)
4318		{
4319		if (CONDITION_UF())
4320		{
4321		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
4322		int dreg = (op >> 16) & 7;
4323		LONG2FP(dreg, res);
4324		}
4325		else
4326		INDIRECT_D(op, op >> 8);
4327		}
4328
4329		void tms3203x_device::ldfuf_imm(UINT32 op)
4330		{
4331		if (CONDITION_UF())
4332		{
4333		int dreg = (op >> 16) & 7;
4334		SHORT2FP(dreg, op);
4335		}
4336		}
4337
4338		/*-----------------------------------------------------*/
4339
4340		void tms3203x_device::ldfnlv_reg(UINT32 op)
4341		{
4342		if (CONDITION_NLV())
4343		m_r[(op >> 16) & 7] = m_r[op & 7];
4344		}
4345
4346		void tms3203x_device::ldfnlv_dir(UINT32 op)
4347		{
4348		if (CONDITION_NLV())
4349		{
4350		UINT32 res = RMEM(DIRECT(op));
4351		int dreg = (op >> 16) & 7;
4352		LONG2FP(dreg, res);
4353		}
4354		}
4355
4356		void tms3203x_device::ldfnlv_ind(UINT32 op)
4357		{
4358		if (CONDITION_NLV())
4359		{
4360		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
4361		int dreg = (op >> 16) & 7;
4362		LONG2FP(dreg, res);
4363		}
4364		else
4365		INDIRECT_D(op, op >> 8);
4366		}
4367
4368		void tms3203x_device::ldfnlv_imm(UINT32 op)
4369		{
4370		if (CONDITION_NLV())
4371		{
4372		int dreg = (op >> 16) & 7;
4373		SHORT2FP(dreg, op);
4374		}
4375		}
4376
4377		/*-----------------------------------------------------*/
4378
4379		void tms3203x_device::ldflv_reg(UINT32 op)
4380		{
4381		if (CONDITION_LV())
4382		m_r[(op >> 16) & 7] = m_r[op & 7];
4383		}
4384
4385		void tms3203x_device::ldflv_dir(UINT32 op)
4386		{
4387		if (CONDITION_LV())
4388		{
4389		UINT32 res = RMEM(DIRECT(op));
4390		int dreg = (op >> 16) & 7;
4391		LONG2FP(dreg, res);
4392		}
4393		}
4394
4395		void tms3203x_device::ldflv_ind(UINT32 op)
4396		{
4397		if (CONDITION_LV())
4398		{
4399		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
4400		int dreg = (op >> 16) & 7;
4401		LONG2FP(dreg, res);
4402		}
4403		else
4404		INDIRECT_D(op, op >> 8);
4405		}
4406
4407		void tms3203x_device::ldflv_imm(UINT32 op)
4408		{
4409		if (CONDITION_LV())
4410		{
4411		int dreg = (op >> 16) & 7;
4412		SHORT2FP(dreg, op);
4413		}
4414		}
4415
4416		/*-----------------------------------------------------*/
4417
4418		void tms3203x_device::ldfnluf_reg(UINT32 op)
4419		{
4420		if (CONDITION_NLUF())
4421		m_r[(op >> 16) & 7] = m_r[op & 7];
4422		}
4423
4424		void tms3203x_device::ldfnluf_dir(UINT32 op)
4425		{
4426		if (CONDITION_NLUF())
4427		{
4428		UINT32 res = RMEM(DIRECT(op));
4429		int dreg = (op >> 16) & 7;
4430		LONG2FP(dreg, res);
4431		}
4432		}
4433
4434		void tms3203x_device::ldfnluf_ind(UINT32 op)
4435		{
4436		if (CONDITION_NLUF())
4437		{
4438		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
4439		int dreg = (op >> 16) & 7;
4440		LONG2FP(dreg, res);
4441		}
4442		else
4443		INDIRECT_D(op, op >> 8);
4444		}
4445
4446		void tms3203x_device::ldfnluf_imm(UINT32 op)
4447		{
4448		if (CONDITION_NLUF())
4449		{
4450		int dreg = (op >> 16) & 7;
4451		SHORT2FP(dreg, op);
4452		}
4453		}
4454
4455		/*-----------------------------------------------------*/
4456
4457		void tms3203x_device::ldfluf_reg(UINT32 op)
4458		{
4459		if (CONDITION_LUF())
4460		m_r[(op >> 16) & 7] = m_r[op & 7];
4461		}
4462
4463		void tms3203x_device::ldfluf_dir(UINT32 op)
4464		{
4465		if (CONDITION_LUF())
4466		{
4467		UINT32 res = RMEM(DIRECT(op));
4468		int dreg = (op >> 16) & 7;
4469		LONG2FP(dreg, res);
4470		}
4471		}
4472
4473		void tms3203x_device::ldfluf_ind(UINT32 op)
4474		{
4475		if (CONDITION_LUF())
4476		{
4477		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
4478		int dreg = (op >> 16) & 7;
4479		LONG2FP(dreg, res);
4480		}
4481		else
4482		INDIRECT_D(op, op >> 8);
4483		}
4484
4485		void tms3203x_device::ldfluf_imm(UINT32 op)
4486		{
4487		if (CONDITION_LUF())
4488		{
4489		int dreg = (op >> 16) & 7;
4490		SHORT2FP(dreg, op);
4491		}
4492		}
4493
4494		/*-----------------------------------------------------*/
4495
4496		void tms3203x_device::ldfzuf_reg(UINT32 op)
4497		{
4498		if (CONDITION_ZUF())
4499		m_r[(op >> 16) & 7] = m_r[op & 7];
4500		}
4501
4502		void tms3203x_device::ldfzuf_dir(UINT32 op)
4503		{
4504		if (CONDITION_ZUF())
4505		{
4506		UINT32 res = RMEM(DIRECT(op));
4507		int dreg = (op >> 16) & 7;
4508		LONG2FP(dreg, res);
4509		}
4510		}
4511
4512		void tms3203x_device::ldfzuf_ind(UINT32 op)
4513		{
4514		if (CONDITION_ZUF())
4515		{
4516		UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
4517		int dreg = (op >> 16) & 7;
4518		LONG2FP(dreg, res);
4519		}
4520		else
4521		INDIRECT_D(op, op >> 8);
4522		}
4523
4524		void tms3203x_device::ldfzuf_imm(UINT32 op)
4525		{
4526		if (CONDITION_ZUF())
4527		{
4528		int dreg = (op >> 16) & 7;
4529		SHORT2FP(dreg, op);
4530		}
4531		}
4532
4533		/*-----------------------------------------------------*/
4534
4535		void tms3203x_device::ldiu_reg(UINT32 op)
4536		{
4537		int dreg = (op >> 16) & 31;
4538		IREG(dreg) = IREG(op & 31);
4539		if (dreg >= TMR_BK)
4540		update_special(dreg);
4541		}
4542
4543		void tms3203x_device::ldiu_dir(UINT32 op)
4544		{
4545		int dreg = (op >> 16) & 31;
4546		IREG(dreg) = RMEM(DIRECT(op));
4547		if (dreg >= TMR_BK)
4548		update_special(dreg);
4549		}
4550
4551		void tms3203x_device::ldiu_ind(UINT32 op)
4552		{
4553		int dreg = (op >> 16) & 31;
4554		IREG(dreg) = RMEM(INDIRECT_D(op, op >> 8));
4555		if (dreg >= TMR_BK)
4556		update_special(dreg);
4557		}
4558
4559		void tms3203x_device::ldiu_imm(UINT32 op)
4560		{
4561		int dreg = (op >> 16) & 31;
4562		IREG(dreg) = (INT16)op;
4563		if (dreg >= TMR_BK)
4564		update_special(dreg);
4565		}
4566
4567		/*-----------------------------------------------------*/
4568
4569		void tms3203x_device::ldilo_reg(UINT32 op)
4570		{
4571		if (CONDITION_LO())
4572		{
4573		int dreg = (op >> 16) & 31;
4574		IREG(dreg) = IREG(op & 31);
4575		if (dreg >= TMR_BK)
4576		update_special(dreg);
4577		}
4578		}
4579
4580		void tms3203x_device::ldilo_dir(UINT32 op)
4581		{
4582		UINT32 val = RMEM(DIRECT(op));
4583		if (CONDITION_LO())
4584		{
4585		int dreg = (op >> 16) & 31;
4586		IREG(dreg) = val;
4587		if (dreg >= TMR_BK)
4588		update_special(dreg);
4589		}
4590		}
4591
4592		void tms3203x_device::ldilo_ind(UINT32 op)
4593		{
4594		UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
4595		if (CONDITION_LO())
4596		{
4597		int dreg = (op >> 16) & 31;
4598		IREG(dreg) = val;
4599		if (dreg >= TMR_BK)
4600		update_special(dreg);
4601		}
4602		}
4603
4604		void tms3203x_device::ldilo_imm(UINT32 op)
4605		{
4606		if (CONDITION_LO())
4607		{
4608		int dreg = (op >> 16) & 31;
4609		IREG(dreg) = (INT16)op;
4610		if (dreg >= TMR_BK)
4611		update_special(dreg);
4612		}
4613		}
4614
4615		/*-----------------------------------------------------*/
4616
4617		void tms3203x_device::ldils_reg(UINT32 op)
4618		{
4619		if (CONDITION_LS())
4620		{
4621		int dreg = (op >> 16) & 31;
4622		IREG(dreg) = IREG(op & 31);
4623		if (dreg >= TMR_BK)
4624		update_special(dreg);
4625		}
4626		}
4627
4628		void tms3203x_device::ldils_dir(UINT32 op)
4629		{
4630		UINT32 val = RMEM(DIRECT(op));
4631		if (CONDITION_LS())
4632		{
4633		int dreg = (op >> 16) & 31;
4634		IREG(dreg) = val;
4635		if (dreg >= TMR_BK)
4636		update_special(dreg);
4637		}
4638		}
4639
4640		void tms3203x_device::ldils_ind(UINT32 op)
4641		{
4642		UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
4643		if (CONDITION_LS())
4644		{
4645		int dreg = (op >> 16) & 31;
4646		IREG(dreg) = val;
4647		if (dreg >= TMR_BK)
4648		update_special(dreg);
4649		}
4650		}
4651
4652		void tms3203x_device::ldils_imm(UINT32 op)
4653		{
4654		if (CONDITION_LS())
4655		{
4656		int dreg = (op >> 16) & 31;
4657		IREG(dreg) = (INT16)op;
4658		if (dreg >= TMR_BK)
4659		update_special(dreg);
4660		}
4661		}
4662
4663		/*-----------------------------------------------------*/
4664
4665		void tms3203x_device::ldihi_reg(UINT32 op)
4666		{
4667		if (CONDITION_HI())
4668		{
4669		int dreg = (op >> 16) & 31;
4670		IREG(dreg) = IREG(op & 31);
4671		if (dreg >= TMR_BK)
4672		update_special(dreg);
4673		}
4674		}
4675
4676		void tms3203x_device::ldihi_dir(UINT32 op)
4677		{
4678		UINT32 val = RMEM(DIRECT(op));
4679		if (CONDITION_HI())
4680		{
4681		int dreg = (op >> 16) & 31;
4682		IREG(dreg) = val;
4683		if (dreg >= TMR_BK)
4684		update_special(dreg);
4685		}
4686		}
4687
4688		void tms3203x_device::ldihi_ind(UINT32 op)
4689		{
4690		UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
4691		if (CONDITION_HI())
4692		{
4693		int dreg = (op >> 16) & 31;
4694		IREG(dreg) = val;
4695		if (dreg >= TMR_BK)
4696		update_special(dreg);
4697		}
4698		}
4699
4700		void tms3203x_device::ldihi_imm(UINT32 op)
4701		{
4702		if (CONDITION_HI())
4703		{
4704		int dreg = (op >> 16) & 31;
4705		IREG(dreg) = (INT16)op;
4706		if (dreg >= TMR_BK)
4707		update_special(dreg);
4708		}
4709		}
4710
4711		/*-----------------------------------------------------*/
4712
4713		void tms3203x_device::ldihs_reg(UINT32 op)
4714		{
4715		if (CONDITION_HS())
4716		{
4717		int dreg = (op >> 16) & 31;
4718		IREG(dreg) = IREG(op & 31);
4719		if (dreg >= TMR_BK)
4720		update_special(dreg);
4721		}
4722		}
4723
4724		void tms3203x_device::ldihs_dir(UINT32 op)
4725		{
4726		UINT32 val = RMEM(DIRECT(op));
4727		if (CONDITION_HS())
4728		{
4729		int dreg = (op >> 16) & 31;
4730		IREG(dreg) = val;
4731		if (dreg >= TMR_BK)
4732		update_special(dreg);
4733		}
4734		}
4735
4736		void tms3203x_device::ldihs_ind(UINT32 op)
4737		{
4738		UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
4739		if (CONDITION_HS())
4740		{
4741		int dreg = (op >> 16) & 31;
4742		IREG(dreg) = val;
4743		if (dreg >= TMR_BK)
4744		update_special(dreg);
4745		}
4746		}
4747
4748		void tms3203x_device::ldihs_imm(UINT32 op)
4749		{
4750		if (CONDITION_HS())
4751		{
4752		int dreg = (op >> 16) & 31;
4753		IREG(dreg) = (INT16)op;
4754		if (dreg >= TMR_BK)
4755		update_special(dreg);
4756		}
4757		}
4758
4759		/*-----------------------------------------------------*/
4760
4761		void tms3203x_device::ldieq_reg(UINT32 op)
4762		{
4763		if (CONDITION_EQ())
4764		{
4765		int dreg = (op >> 16) & 31;
4766		IREG(dreg) = IREG(op & 31);
4767		if (dreg >= TMR_BK)
4768		update_special(dreg);
4769		}
4770		}
4771
4772		void tms3203x_device::ldieq_dir(UINT32 op)
4773		{
4774		UINT32 val = RMEM(DIRECT(op));
4775		if (CONDITION_EQ())
4776		{
4777		int dreg = (op >> 16) & 31;
4778		IREG(dreg) = val;
4779		if (dreg >= TMR_BK)
4780		update_special(dreg);
4781		}
4782		}
4783
4784		void tms3203x_device::ldieq_ind(UINT32 op)
4785		{
4786		UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
4787		if (CONDITION_EQ())
4788		{
4789		int dreg = (op >> 16) & 31;
4790		IREG(dreg) = val;
4791		if (dreg >= TMR_BK)
4792		update_special(dreg);
4793		}
4794		}
4795
4796		void tms3203x_device::ldieq_imm(UINT32 op)
4797		{
4798		if (CONDITION_EQ())
4799		{
4800		int dreg = (op >> 16) & 31;
4801		IREG(dreg) = (INT16)op;
4802		if (dreg >= TMR_BK)
4803		update_special(dreg);
4804		}
4805		}
4806
4807		/*-----------------------------------------------------*/
4808
4809		void tms3203x_device::ldine_reg(UINT32 op)
4810		{
4811		if (CONDITION_NE())
4812		{
4813		int dreg = (op >> 16) & 31;
4814		IREG(dreg) = IREG(op & 31);
4815		if (dreg >= TMR_BK)
4816		update_special(dreg);
4817		}
4818		}
4819
4820		void tms3203x_device::ldine_dir(UINT32 op)
4821		{
4822		UINT32 val = RMEM(DIRECT(op));
4823		if (CONDITION_NE())
4824		{
4825		int dreg = (op >> 16) & 31;
4826		IREG(dreg) = val;
4827		if (dreg >= TMR_BK)
4828		update_special(dreg);
4829		}
4830		}
4831
4832		void tms3203x_device::ldine_ind(UINT32 op)
4833		{
4834		UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
4835		if (CONDITION_NE())
4836		{
4837		int dreg = (op >> 16) & 31;
4838		IREG(dreg) = val;
4839		if (dreg >= TMR_BK)
4840		update_special(dreg);
4841		}
4842		}
4843
4844		void tms3203x_device::ldine_imm(UINT32 op)
4845		{
4846		if (CONDITION_NE())
4847		{
4848		int dreg = (op >> 16) & 31;
4849		IREG(dreg) = (INT16)op;
4850		if (dreg >= TMR_BK)
4851		update_special(dreg);
4852		}
4853		}
4854
4855		/*-----------------------------------------------------*/
4856
4857		void tms3203x_device::ldilt_reg(UINT32 op)
4858		{
4859		if (CONDITION_LT())
4860		{
4861		int dreg = (op >> 16) & 31;
4862		IREG(dreg) = IREG(op & 31);
4863		if (dreg >= TMR_BK)
4864		update_special(dreg);
4865		}
4866		}
4867
4868		void tms3203x_device::ldilt_dir(UINT32 op)
4869		{
4870		UINT32 val = RMEM(DIRECT(op));
4871		if (CONDITION_LT())
4872		{
4873		int dreg = (op >> 16) & 31;
4874		IREG(dreg) = val;
4875		if (dreg >= TMR_BK)
4876		update_special(dreg);
4877		}
4878		}
4879
4880		void tms3203x_device::ldilt_ind(UINT32 op)
4881		{
4882		UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
4883		if (CONDITION_LT())
4884		{
4885		int dreg = (op >> 16) & 31;
4886		IREG(dreg) = val;
4887		if (dreg >= TMR_BK)
4888		update_special(dreg);
4889		}
4890		}
4891
4892		void tms3203x_device::ldilt_imm(UINT32 op)
4893		{
4894		if (CONDITION_LT())
4895		{
4896		int dreg = (op >> 16) & 31;
4897		IREG(dreg) = (INT16)op;
4898		if (dreg >= TMR_BK)
4899		update_special(dreg);
4900		}
4901		}
4902
4903		/*-----------------------------------------------------*/
4904
4905		void tms3203x_device::ldile_reg(UINT32 op)
4906		{
4907		if (CONDITION_LE())
4908		{
4909		int dreg = (op >> 16) & 31;
4910		IREG(dreg) = IREG(op & 31);
4911		if (dreg >= TMR_BK)
4912		update_special(dreg);
4913		}
4914		}
4915
4916		void tms3203x_device::ldile_dir(UINT32 op)
4917		{
4918		UINT32 val = RMEM(DIRECT(op));
4919		if (CONDITION_LE())
4920		{
4921		int dreg = (op >> 16) & 31;
4922		IREG(dreg) = val;
4923		if (dreg >= TMR_BK)
4924		update_special(dreg);
4925		}
4926		}
4927
4928		void tms3203x_device::ldile_ind(UINT32 op)
4929		{
4930		UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
4931		if (CONDITION_LE())
4932		{
4933		int dreg = (op >> 16) & 31;
4934		IREG(dreg) = val;
4935		if (dreg >= TMR_BK)
4936		update_special(dreg);
4937		}
4938		}
4939
4940		void tms3203x_device::ldile_imm(UINT32 op)
4941		{
4942		if (CONDITION_LE())
4943		{
4944		int dreg = (op >> 16) & 31;
4945		IREG(dreg) = (INT16)op;
4946		if (dreg >= TMR_BK)
4947		update_special(dreg);
4948		}
4949		}
4950
4951		/*-----------------------------------------------------*/
4952
4953		void tms3203x_device::ldigt_reg(UINT32 op)
4954		{
4955		if (CONDITION_GT())
4956		{
4957		int dreg = (op >> 16) & 31;
4958		IREG(dreg) = IREG(op & 31);
4959		if (dreg >= TMR_BK)
4960		update_special(dreg);
4961		}
4962		}
4963
4964		void tms3203x_device::ldigt_dir(UINT32 op)
4965		{
4966		UINT32 val = RMEM(DIRECT(op));
4967		if (CONDITION_GT())
4968		{
4969		int dreg = (op >> 16) & 31;
4970		IREG(dreg) = val;
4971		if (dreg >= TMR_BK)
4972		update_special(dreg);
4973		}
4974		}
4975
4976		void tms3203x_device::ldigt_ind(UINT32 op)
4977		{
4978		UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
4979		if (CONDITION_GT())
4980		{
4981		int dreg = (op >> 16) & 31;
4982		IREG(dreg) = val;
4983		if (dreg >= TMR_BK)
4984		update_special(dreg);
4985		}
4986		}
4987
4988		void tms3203x_device::ldigt_imm(UINT32 op)
4989		{
4990		if (CONDITION_GT())
4991		{
4992		int dreg = (op >> 16) & 31;
4993		IREG(dreg) = (INT16)op;
4994		if (dreg >= TMR_BK)
4995		update_special(dreg);
4996		}
4997		}
4998
4999		/*-----------------------------------------------------*/
5000
5001		void tms3203x_device::ldige_reg(UINT32 op)
5002		{
5003		if (CONDITION_GE())
5004		{
5005		int dreg = (op >> 16) & 31;
5006		IREG(dreg) = IREG(op & 31);
5007		if (dreg >= TMR_BK)
5008		update_special(dreg);
5009		}
5010		}
5011
5012		void tms3203x_device::ldige_dir(UINT32 op)
5013		{
5014		UINT32 val = RMEM(DIRECT(op));
5015		if (CONDITION_GE())
5016		{
5017		int dreg = (op >> 16) & 31;
5018		IREG(dreg) = val;
5019		if (dreg >= TMR_BK)
5020		update_special(dreg);
5021		}
5022		}
5023
5024		void tms3203x_device::ldige_ind(UINT32 op)
5025		{
5026		UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
5027		if (CONDITION_GE())
5028		{
5029		int dreg = (op >> 16) & 31;
5030		IREG(dreg) = val;
5031		if (dreg >= TMR_BK)
5032		update_special(dreg);
5033		}
5034		}
5035
5036		void tms3203x_device::ldige_imm(UINT32 op)
5037		{
5038		if (CONDITION_GE())
5039		{
5040		int dreg = (op >> 16) & 31;
5041		IREG(dreg) = (INT16)op;
5042		if (dreg >= TMR_BK)
5043		update_special(dreg);
5044		}
5045		}
5046
5047		/*-----------------------------------------------------*/
5048
5049		void tms3203x_device::ldinv_reg(UINT32 op)
5050		{
5051		if (CONDITION_NV())
5052		{
5053		int dreg = (op >> 16) & 31;
5054		IREG(dreg) = IREG(op & 31);
5055		if (dreg >= TMR_BK)
5056		update_special(dreg);
5057		}
5058		}
5059
5060		void tms3203x_device::ldinv_dir(UINT32 op)
5061		{
5062		UINT32 val = RMEM(DIRECT(op));
5063		if (CONDITION_NV())
5064		{
5065		int dreg = (op >> 16) & 31;
5066		IREG(dreg) = val;
5067		if (dreg >= TMR_BK)
5068		update_special(dreg);
5069		}
5070		}
5071
5072		void tms3203x_device::ldinv_ind(UINT32 op)
5073		{
5074		UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
5075		if (CONDITION_NV())
5076		{
5077		int dreg = (op >> 16) & 31;
5078		IREG(dreg) = val;
5079		if (dreg >= TMR_BK)
5080		update_special(dreg);
5081		}
5082		}
5083
5084		void tms3203x_device::ldinv_imm(UINT32 op)
5085		{
5086		if (CONDITION_NV())
5087		{
5088		int dreg = (op >> 16) & 31;
5089		IREG(dreg) = (INT16)op;
5090		if (dreg >= TMR_BK)
5091		update_special(dreg);
5092		}
5093		}
5094
5095		/*-----------------------------------------------------*/
5096
5097		void tms3203x_device::ldiuf_reg(UINT32 op)
5098		{
5099		if (CONDITION_UF())
5100		{
5101		int dreg = (op >> 16) & 31;
5102		IREG(dreg) = IREG(op & 31);
5103		if (dreg >= TMR_BK)
5104		update_special(dreg);
5105		}
5106		}
5107
5108		void tms3203x_device::ldiuf_dir(UINT32 op)
5109		{
5110		UINT32 val = RMEM(DIRECT(op));
5111		if (CONDITION_UF())
5112		{
5113		int dreg = (op >> 16) & 31;
5114		IREG(dreg) = val;
5115		if (dreg >= TMR_BK)
5116		update_special(dreg);
5117		}
5118		}
5119
5120		void tms3203x_device::ldiuf_ind(UINT32 op)
5121		{
5122		UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
5123		if (CONDITION_UF())
5124		{
5125		int dreg = (op >> 16) & 31;
5126		IREG(dreg) = val;
5127		if (dreg >= TMR_BK)
5128		update_special(dreg);
5129		}
5130		}
5131
5132		void tms3203x_device::ldiuf_imm(UINT32 op)
5133		{
5134		if (CONDITION_UF())
5135		{
5136		int dreg = (op >> 16) & 31;
5137		IREG(dreg) = (INT16)op;
5138		if (dreg >= TMR_BK)
5139		update_special(dreg);
5140		}
5141		}
5142
5143		/*-----------------------------------------------------*/
5144
5145		void tms3203x_device::ldinuf_reg(UINT32 op)
5146		{
5147		if (CONDITION_NUF())
5148		{
5149		int dreg = (op >> 16) & 31;
5150		IREG(dreg) = IREG(op & 31);
5151		if (dreg >= TMR_BK)
5152		update_special(dreg);
5153		}
5154		}
5155
5156		void tms3203x_device::ldinuf_dir(UINT32 op)
5157		{
5158		UINT32 val = RMEM(DIRECT(op));
5159		if (CONDITION_NUF())
5160		{
5161		int dreg = (op >> 16) & 31;
5162		IREG(dreg) = val;
5163		if (dreg >= TMR_BK)
5164		update_special(dreg);
5165		}
5166		}
5167
5168		void tms3203x_device::ldinuf_ind(UINT32 op)
5169		{
5170		UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
5171		if (CONDITION_NUF())
5172		{
5173		int dreg = (op >> 16) & 31;
5174		IREG(dreg) = val;
5175		if (dreg >= TMR_BK)
5176		update_special(dreg);
5177		}
5178		}
5179
5180		void tms3203x_device::ldinuf_imm(UINT32 op)
5181		{
5182		if (CONDITION_NUF())
5183		{
5184		int dreg = (op >> 16) & 31;
5185		IREG(dreg) = (INT16)op;
5186		if (dreg >= TMR_BK)
5187		update_special(dreg);
5188		}
5189		}
5190
5191		/*-----------------------------------------------------*/
5192
5193		void tms3203x_device::ldiv_reg(UINT32 op)
5194		{
5195		if (CONDITION_V())
5196		{
5197		int dreg = (op >> 16) & 31;
5198		IREG(dreg) = IREG(op & 31);
5199		if (dreg >= TMR_BK)
5200		update_special(dreg);
5201		}
5202		}
5203
5204		void tms3203x_device::ldiv_dir(UINT32 op)
5205		{
5206		UINT32 val = RMEM(DIRECT(op));
5207		if (CONDITION_V())
5208		{
5209		int dreg = (op >> 16) & 31;
5210		IREG(dreg) = val;
5211		if (dreg >= TMR_BK)
5212		update_special(dreg);
5213		}
5214		}
5215
5216		void tms3203x_device::ldiv_ind(UINT32 op)
5217		{
5218		UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
5219		if (CONDITION_V())
5220		{
5221		int dreg = (op >> 16) & 31;
5222		IREG(dreg) = val;
5223		if (dreg >= TMR_BK)
5224		update_special(dreg);
5225		}
5226		}
5227
5228		void tms3203x_device::ldiv_imm(UINT32 op)
5229		{
5230		if (CONDITION_V())
5231		{
5232		int dreg = (op >> 16) & 31;
5233		IREG(dreg) = (INT16)op;
5234		if (dreg >= TMR_BK)
5235		update_special(dreg);
5236		}
5237		}
5238
5239		/*-----------------------------------------------------*/
5240
5241		void tms3203x_device::ldinlv_reg(UINT32 op)
5242		{
5243		if (CONDITION_NLV())
5244		{
5245		int dreg = (op >> 16) & 31;
5246		IREG(dreg) = IREG(op & 31);
5247		if (dreg >= TMR_BK)
5248		update_special(dreg);
5249		}
5250		}
5251
5252		void tms3203x_device::ldinlv_dir(UINT32 op)
5253		{
5254		UINT32 val = RMEM(DIRECT(op));
5255		if (CONDITION_NLV())
5256		{
5257		int dreg = (op >> 16) & 31;
5258		IREG(dreg) = val;
5259		if (dreg >= TMR_BK)
5260		update_special(dreg);
5261		}
5262		}
5263
5264		void tms3203x_device::ldinlv_ind(UINT32 op)
5265		{
5266		UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
5267		if (CONDITION_NLV())
5268		{
5269		int dreg = (op >> 16) & 31;
5270		IREG(dreg) = val;
5271		if (dreg >= TMR_BK)
5272		update_special(dreg);
5273		}
5274		}
5275
5276		void tms3203x_device::ldinlv_imm(UINT32 op)
5277		{
5278		if (CONDITION_NLV())
5279		{
5280		int dreg = (op >> 16) & 31;
5281		IREG(dreg) = (INT16)op;
5282		if (dreg >= TMR_BK)
5283		update_special(dreg);
5284		}
5285		}
5286
5287		/*-----------------------------------------------------*/
5288
5289		void tms3203x_device::ldilv_reg(UINT32 op)
5290		{
5291		if (CONDITION_LV())
5292		{
5293		int dreg = (op >> 16) & 31;
5294		IREG(dreg) = IREG(op & 31);
5295		if (dreg >= TMR_BK)
5296		update_special(dreg);
5297		}
5298		}
5299
5300		void tms3203x_device::ldilv_dir(UINT32 op)
5301		{
5302		UINT32 val = RMEM(DIRECT(op));
5303		if (CONDITION_LV())
5304		{
5305		int dreg = (op >> 16) & 31;
5306		IREG(dreg) = val;
5307		if (dreg >= TMR_BK)
5308		update_special(dreg);
5309		}
5310		}
5311
5312		void tms3203x_device::ldilv_ind(UINT32 op)
5313		{
5314		UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
5315		if (CONDITION_LV())
5316		{
5317		int dreg = (op >> 16) & 31;
5318		IREG(dreg) = val;
5319		if (dreg >= TMR_BK)
5320		update_special(dreg);
5321		}
5322		}
5323
5324		void tms3203x_device::ldilv_imm(UINT32 op)
5325		{
5326		if (CONDITION_LV())
5327		{
5328		int dreg = (op >> 16) & 31;
5329		IREG(dreg) = (INT16)op;
5330		if (dreg >= TMR_BK)
5331		update_special(dreg);
5332		}
5333		}
5334
5335		/*-----------------------------------------------------*/
5336
5337		void tms3203x_device::ldinluf_reg(UINT32 op)
5338		{
5339		if (CONDITION_NLUF())
5340		{
5341		int dreg = (op >> 16) & 31;
5342		IREG(dreg) = IREG(op & 31);
5343		if (dreg >= TMR_BK)
5344		update_special(dreg);
5345		}
5346		}
5347
5348		void tms3203x_device::ldinluf_dir(UINT32 op)
5349		{
5350		UINT32 val = RMEM(DIRECT(op));
5351		if (CONDITION_NLUF())
5352		{
5353		int dreg = (op >> 16) & 31;
5354		IREG(dreg) = val;
5355		if (dreg >= TMR_BK)
5356		update_special(dreg);
5357		}
5358		}
5359
5360		void tms3203x_device::ldinluf_ind(UINT32 op)
5361		{
5362		UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
5363		if (CONDITION_NLUF())
5364		{
5365		int dreg = (op >> 16) & 31;
5366		IREG(dreg) = val;
5367		if (dreg >= TMR_BK)
5368		update_special(dreg);
5369		}
5370		}
5371
5372		void tms3203x_device::ldinluf_imm(UINT32 op)
5373		{
5374		if (CONDITION_NLUF())
5375		{
5376		int dreg = (op >> 16) & 31;
5377		IREG(dreg) = (INT16)op;
5378		if (dreg >= TMR_BK)
5379		update_special(dreg);
5380		}
5381		}
5382
5383		/*-----------------------------------------------------*/
5384
5385		void tms3203x_device::ldiluf_reg(UINT32 op)
5386		{
5387		if (CONDITION_LUF())
5388		{
5389		int dreg = (op >> 16) & 31;
5390		IREG(dreg) = IREG(op & 31);
5391		if (dreg >= TMR_BK)
5392		update_special(dreg);
5393		}
5394		}
5395
5396		void tms3203x_device::ldiluf_dir(UINT32 op)
5397		{
5398		UINT32 val = RMEM(DIRECT(op));
5399		if (CONDITION_LUF())
5400		{
5401		int dreg = (op >> 16) & 31;
5402		IREG(dreg) = val;
5403		if (dreg >= TMR_BK)
5404		update_special(dreg);
5405		}
5406		}
5407
5408		void tms3203x_device::ldiluf_ind(UINT32 op)
5409		{
5410		UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
5411		if (CONDITION_LUF())
5412		{
5413		int dreg = (op >> 16) & 31;
5414		IREG(dreg) = val;
5415		if (dreg >= TMR_BK)
5416		update_special(dreg);
5417		}
5418		}
5419
5420		void tms3203x_device::ldiluf_imm(UINT32 op)
5421		{
5422		if (CONDITION_LUF())
5423		{
5424		int dreg = (op >> 16) & 31;
5425		IREG(dreg) = (INT16)op;
5426		if (dreg >= TMR_BK)
5427		update_special(dreg);
5428		}
5429		}
5430
5431		/*-----------------------------------------------------*/
5432
5433		void tms3203x_device::ldizuf_reg(UINT32 op)
5434		{
5435		if (CONDITION_ZUF())
5436		{
5437		int dreg = (op >> 16) & 31;
5438		IREG(dreg) = IREG(op & 31);
5439		if (dreg >= TMR_BK)
5440		update_special(dreg);
5441		}
5442		}
5443
5444		void tms3203x_device::ldizuf_dir(UINT32 op)
5445		{
5446		UINT32 val = RMEM(DIRECT(op));
5447		if (CONDITION_ZUF())
5448		{
5449		int dreg = (op >> 16) & 31;
5450		IREG(dreg) = val;
5451		if (dreg >= TMR_BK)
5452		update_special(dreg);
5453		}
5454		}
5455
5456		void tms3203x_device::ldizuf_ind(UINT32 op)
5457		{
5458		UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
5459		if (CONDITION_ZUF())
5460		{
5461		int dreg = (op >> 16) & 31;
5462		IREG(dreg) = val;
5463		if (dreg >= TMR_BK)
5464		update_special(dreg);
5465		}
5466		}
5467
5468		void tms3203x_device::ldizuf_imm(UINT32 op)
5469		{
5470		if (CONDITION_ZUF())
5471		{
5472		int dreg = (op >> 16) & 31;
5473		IREG(dreg) = (INT16)op;
5474		if (dreg >= TMR_BK)
5475		update_special(dreg);
5476		}
5477		}
5478
5479		/*-----------------------------------------------------*/
5480
5481		inline void tms3203x_device::execute_delayed(UINT32 newpc)
5482		{
5483		m_delayed = true;
5484
5485		if ((machine().debug_flags & DEBUG_FLAG_ENABLED) == 0)
5486		{
5487		execute_one();
5488		execute_one();
5489		execute_one();
5490		}
5491		else
5492		{
5493		debugger_instruction_hook(this, m_pc);
5494		execute_one();
5495		debugger_instruction_hook(this, m_pc);
5496		execute_one();
5497		debugger_instruction_hook(this, m_pc);
5498		execute_one();
5499		}
5500
5501		if (newpc != ~0)
5502		m_pc = newpc;
5503
5504		m_delayed = false;
5505		if (m_irq_pending)
5506		{
5507		m_irq_pending = false;
5508		check_irqs();
5509		}
5510		}
5511
5512		/*-----------------------------------------------------*/
5513
5514		void tms3203x_device::br_imm(UINT32 op)
5515		{
5516		m_pc = op & 0xffffff;
5517		m_icount -= 3*2;
5518		}
5519
5520		void tms3203x_device::brd_imm(UINT32 op)
5521		{
5522		execute_delayed(op & 0xffffff);
5523		}
5524
5525		/*-----------------------------------------------------*/
5526
5527		void tms3203x_device::call_imm(UINT32 op)
5528		{
5529		WMEM(++IREG(TMR_SP), m_pc);
5530		m_pc = op & 0xffffff;
5531		m_icount -= 3*2;
5532		}
5533
5534		/*-----------------------------------------------------*/
5535
5536		void tms3203x_device::rptb_imm(UINT32 op)
5537		{
5538		IREG(TMR_RS) = m_pc;
5539		IREG(TMR_RE) = op & 0xffffff;
5540		IREG(TMR_ST) |= RMFLAG;
5541		m_icount -= 3*2;
5542		}
5543
5544		/*-----------------------------------------------------*/
5545
5546		void tms3203x_device::swi(UINT32 op) { unimplemented(op); }
5547
5548		/*-----------------------------------------------------*/
5549
5550		void tms3203x_device::brc_reg(UINT32 op)
5551		{
5552		if (condition(op >> 16))
5553		{
5554		m_pc = IREG(op & 31);
5555		m_icount -= 3*2;
5556		}
5557		}
5558
5559		void tms3203x_device::brcd_reg(UINT32 op)
5560		{
5561		if (condition(op >> 16))
5562		execute_delayed(IREG(op & 31));
5563		else
5564		execute_delayed(~0);
5565		}
5566
5567		void tms3203x_device::brc_imm(UINT32 op)
5568		{
5569		if (condition(op >> 16))
5570		{
5571		m_pc += (INT16)op;
5572		m_icount -= 3*2;
5573		}
5574		}
5575
5576		void tms3203x_device::brcd_imm(UINT32 op)
5577		{
5578		if (condition(op >> 16))
5579		execute_delayed(m_pc + 2 + (INT16)op);
5580		else
5581		execute_delayed(~0);
5582		}
5583
5584		/*-----------------------------------------------------*/
5585
5586		void tms3203x_device::dbc_reg(UINT32 op)
5587		{
5588		int reg = TMR_AR0 + ((op >> 22) & 7);
5589		int res = (IREG(reg) - 1) & 0xffffff;
5590		IREG(reg) = res | (IREG(reg) & 0xff000000);
5591		if (condition(op >> 16) && !(res & 0x800000))
5592		{
5593		m_pc = IREG(op & 31);
5594		m_icount -= 3*2;
5595		}
5596		}
5597
5598		void tms3203x_device::dbcd_reg(UINT32 op)
5599		{
5600		int reg = TMR_AR0 + ((op >> 22) & 7);
5601		int res = (IREG(reg) - 1) & 0xffffff;
5602		IREG(reg) = res | (IREG(reg) & 0xff000000);
5603		if (condition(op >> 16) && !(res & 0x800000))
5604		execute_delayed(IREG(op & 31));
5605		else
5606		execute_delayed(~0);
5607		}
5608
5609		void tms3203x_device::dbc_imm(UINT32 op)
5610		{
5611		int reg = TMR_AR0 + ((op >> 22) & 7);
5612		int res = (IREG(reg) - 1) & 0xffffff;
5613		IREG(reg) = res | (IREG(reg) & 0xff000000);
5614		if (condition(op >> 16) && !(res & 0x800000))
5615		{
5616		m_pc += (INT16)op;
5617		m_icount -= 3*2;
5618		}
5619		}
5620
5621		void tms3203x_device::dbcd_imm(UINT32 op)
5622		{
5623		int reg = TMR_AR0 + ((op >> 22) & 7);
5624		int res = (IREG(reg) - 1) & 0xffffff;
5625		IREG(reg) = res | (IREG(reg) & 0xff000000);
5626		if (condition(op >> 16) && !(res & 0x800000))
5627		execute_delayed(m_pc + 2 + (INT16)op);
5628		else
5629		execute_delayed(~0);
5630		}
5631
5632		/*-----------------------------------------------------*/
5633
5634		void tms3203x_device::callc_reg(UINT32 op)
5635		{
5636		if (condition(op >> 16))
5637		{
5638		WMEM(++IREG(TMR_SP), m_pc);
5639		m_pc = IREG(op & 31);
5640		m_icount -= 3*2;
5641		}
5642		}
5643
5644		void tms3203x_device::callc_imm(UINT32 op)
5645		{
5646		if (condition(op >> 16))
5647		{
5648		WMEM(++IREG(TMR_SP), m_pc);
5649		m_pc += (INT16)op;
5650		m_icount -= 3*2;
5651		}
5652		}
5653
5654		/*-----------------------------------------------------*/
5655
5656		void tms3203x_device::trap(int trapnum)
5657		{
5658		WMEM(++IREG(TMR_SP), m_pc);
5659		IREG(TMR_ST) &= ~GIEFLAG;
5660		if (m_chip_type == CHIP_TYPE_TMS32032)
5661		m_pc = RMEM(((IREG(TMR_IF) >> 16) << 8) + trapnum);
5662		else
5663		m_pc = RMEM(trapnum);
5664		m_icount -= 4*2;
5665		}
5666
5667		void tms3203x_device::trapc(UINT32 op)
5668		{
5669		if (condition(op >> 16))
5670		trap(op & 0x3f);
5671		}
5672
5673		/*-----------------------------------------------------*/
5674
5675		void tms3203x_device::retic_reg(UINT32 op)
5676		{
5677		if (condition(op >> 16))
5678		{
5679		m_pc = RMEM(IREG(TMR_SP)--);
5680		IREG(TMR_ST) |= GIEFLAG;
5681		m_icount -= 3*2;
5682		check_irqs();
5683		}
5684		}
5685
5686		void tms3203x_device::retsc_reg(UINT32 op)
5687		{
5688		if (condition(op >> 16))
5689		{
5690		m_pc = RMEM(IREG(TMR_SP)--);
5691		m_icount -= 3*2;
5692		}
5693		}
5694
5695		/*-----------------------------------------------------*/
5696
5697		void tms3203x_device::mpyaddf_0(UINT32 op)
5698		{
5699		// src3 * src4, src1 + src2
5700		DECLARE_DEF;
5701		UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
5702		UINT32 src4 = RMEM(INDIRECT_1(op, op));
5703		LONG2FP(TMR_TEMP1, src3);
5704		LONG2FP(TMR_TEMP2, src4);
5705		mpyf(m_r[TMR_TEMP3], m_r[TMR_TEMP1], m_r[TMR_TEMP2]);
5706		addf(m_r[((op >> 22) & 1) | 2], m_r[(op >> 19) & 7], m_r[(op >> 16) & 7]);
5707		m_r[(op >> 23) & 1] = m_r[TMR_TEMP3];
5708		UPDATE_DEF();
5709		}
5710
5711		void tms3203x_device::mpyaddf_1(UINT32 op)
5712		{
5713		// src3 * src1, src4 + src2
5714		DECLARE_DEF;
5715		UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
5716		UINT32 src4 = RMEM(INDIRECT_1(op, op));
5717		LONG2FP(TMR_TEMP1, src3);
5718		LONG2FP(TMR_TEMP2, src4);
5719		mpyf(m_r[TMR_TEMP3], m_r[TMR_TEMP1], m_r[(op >> 19) & 7]);
5720		addf(m_r[((op >> 22) & 1) | 2], m_r[TMR_TEMP2], m_r[(op >> 16) & 7]);
5721		m_r[(op >> 23) & 1] = m_r[TMR_TEMP3];
5722		UPDATE_DEF();
5723		}
5724
5725		void tms3203x_device::mpyaddf_2(UINT32 op)
5726		{
5727		// src1 * src2, src3 + src4
5728		DECLARE_DEF;
5729		UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
5730		UINT32 src4 = RMEM(INDIRECT_1(op, op));
5731		LONG2FP(TMR_TEMP1, src3);
5732		LONG2FP(TMR_TEMP2, src4);
5733		mpyf(m_r[TMR_TEMP3], m_r[(op >> 19) & 7], m_r[(op >> 16) & 7]);
5734		addf(m_r[((op >> 22) & 1) | 2], m_r[TMR_TEMP1], m_r[TMR_TEMP2]);
5735		m_r[(op >> 23) & 1] = m_r[TMR_TEMP3];
5736		UPDATE_DEF();
5737		}
5738
5739		void tms3203x_device::mpyaddf_3(UINT32 op)
5740		{
5741		// src3 * src1, src2 + src4
5742		DECLARE_DEF;
5743		UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
5744		UINT32 src4 = RMEM(INDIRECT_1(op, op));
5745		LONG2FP(TMR_TEMP1, src3);
5746		LONG2FP(TMR_TEMP2, src4);
5747		mpyf(m_r[TMR_TEMP3], m_r[TMR_TEMP1], m_r[(op >> 19) & 7]);
5748		addf(m_r[((op >> 22) & 1) | 2], m_r[(op >> 16) & 7], m_r[TMR_TEMP2]);
5749		m_r[(op >> 23) & 1] = m_r[TMR_TEMP3];
5750		UPDATE_DEF();
5751		}
5752
5753		/*-----------------------------------------------------*/
5754
5755		void tms3203x_device::mpysubf_0(UINT32 op)
5756		{
5757		// src3 * src4, src1 - src2
5758		DECLARE_DEF;
5759		UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
5760		UINT32 src4 = RMEM(INDIRECT_1(op, op));
5761		LONG2FP(TMR_TEMP1, src3);
5762		LONG2FP(TMR_TEMP2, src4);
5763		mpyf(m_r[TMR_TEMP3], m_r[TMR_TEMP1], m_r[TMR_TEMP2]);
5764		subf(m_r[((op >> 22) & 1) | 2], m_r[(op >> 19) & 7], m_r[(op >> 16) & 7]);
5765		m_r[(op >> 23) & 1] = m_r[TMR_TEMP3];
5766		UPDATE_DEF();
5767		}
5768
5769		void tms3203x_device::mpysubf_1(UINT32 op)
5770		{
5771		// src3 * src1, src4 - src2
5772		DECLARE_DEF;
5773		UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
5774		UINT32 src4 = RMEM(INDIRECT_1(op, op));
5775		LONG2FP(TMR_TEMP1, src3);
5776		LONG2FP(TMR_TEMP2, src4);
5777		mpyf(m_r[TMR_TEMP3], m_r[TMR_TEMP1], m_r[(op >> 19) & 7]);
5778		subf(m_r[((op >> 22) & 1) | 2], m_r[TMR_TEMP2], m_r[(op >> 16) & 7]);
5779		m_r[(op >> 23) & 1] = m_r[TMR_TEMP3];
5780		UPDATE_DEF();
5781		}
5782
5783		void tms3203x_device::mpysubf_2(UINT32 op)
5784		{
5785		// src1 * src2, src3 - src4
5786		DECLARE_DEF;
5787		UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
5788		UINT32 src4 = RMEM(INDIRECT_1(op, op));
5789		LONG2FP(TMR_TEMP1, src3);
5790		LONG2FP(TMR_TEMP2, src4);
5791		mpyf(m_r[TMR_TEMP3], m_r[(op >> 19) & 7], m_r[(op >> 16) & 7]);
5792		subf(m_r[((op >> 22) & 1) | 2], m_r[TMR_TEMP1], m_r[TMR_TEMP2]);
5793		m_r[(op >> 23) & 1] = m_r[TMR_TEMP3];
5794		UPDATE_DEF();
5795		}
5796
5797		void tms3203x_device::mpysubf_3(UINT32 op)
5798		{
5799		// src3 * src1, src2 - src4
5800		DECLARE_DEF;
5801		UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
5802		UINT32 src4 = RMEM(INDIRECT_1(op, op));
5803		LONG2FP(TMR_TEMP1, src3);
5804		LONG2FP(TMR_TEMP2, src4);
5805		mpyf(m_r[TMR_TEMP3], m_r[TMR_TEMP1], m_r[(op >> 19) & 7]);
5806		subf(m_r[((op >> 22) & 1) | 2], m_r[(op >> 16) & 7], m_r[TMR_TEMP2]);
5807		m_r[(op >> 23) & 1] = m_r[TMR_TEMP3];
5808		UPDATE_DEF();
5809		}
5810
5811		/*-----------------------------------------------------*/
5812
5813		void tms3203x_device::mpyaddi_0(UINT32 op)
5814		{
5815		// src3 * src4, src1 + src2
5816		DECLARE_DEF;
5817		UINT32 src1 = IREG((op >> 19) & 7);
5818		UINT32 src2 = IREG((op >> 16) & 7);
5819		UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
5820		UINT32 src4 = RMEM(INDIRECT_1(op, op));
5821		INT64 mres = (INT64)((INT32)(src3 << 8) >> 8) * (INT64)((INT32)(src4 << 8) >> 8);
5822		UINT32 ares = src1 + src2;
5823
5824		CLR_NZVUF();
5825		if (OVM())
5826		{
5827		if (mres < -(INT64)0x80000000 || mres > (INT64)0x7fffffff)
5828		mres = (mres < 0) ? 0x80000000 : 0x7fffffff;
5829		if (OVERFLOW_ADD(src1,src2,ares))
5830		ares = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff;
5831		}
5832		IREG((op >> 23) & 1) = mres;
5833		IREG(((op >> 22) & 1) | 2) = ares;
5834		UPDATE_DEF();
5835		}
5836
5837		void tms3203x_device::mpyaddi_1(UINT32 op)
5838		{
5839		// src3 * src1, src4 + src2
5840		DECLARE_DEF;
5841		UINT32 src1 = IREG((op >> 19) & 7);
5842		UINT32 src2 = IREG((op >> 16) & 7);
5843		UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
5844		UINT32 src4 = RMEM(INDIRECT_1(op, op));
5845		INT64 mres = (INT64)((INT32)(src3 << 8) >> 8) * (INT64)((INT32)(src1 << 8) >> 8);
5846		UINT32 ares = src4 + src2;
5847
5848		CLR_NZVUF();
5849		if (OVM())
5850		{
5851		if (mres < -(INT64)0x80000000 || mres > (INT64)0x7fffffff)
5852		mres = (mres < 0) ? 0x80000000 : 0x7fffffff;
5853		if (OVERFLOW_ADD(src4,src2,ares))
5854		ares = ((INT32)src4 < 0) ? 0x80000000 : 0x7fffffff;
5855		}
5856		IREG((op >> 23) & 1) = mres;
5857		IREG(((op >> 22) & 1) | 2) = ares;
5858		UPDATE_DEF();
5859		}
5860
5861		void tms3203x_device::mpyaddi_2(UINT32 op)
5862		{
5863		// src1 * src2, src3 + src4
5864		DECLARE_DEF;
5865		UINT32 src1 = IREG((op >> 19) & 7);
5866		UINT32 src2 = IREG((op >> 16) & 7);
5867		UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
5868		UINT32 src4 = RMEM(INDIRECT_1(op, op));
5869		INT64 mres = (INT64)((INT32)(src1 << 8) >> 8) * (INT64)((INT32)(src2 << 8) >> 8);
5870		UINT32 ares = src3 + src4;
5871
5872		CLR_NZVUF();
5873		if (OVM())
5874		{
5875		if (mres < -(INT64)0x80000000 || mres > (INT64)0x7fffffff)
5876		mres = (mres < 0) ? 0x80000000 : 0x7fffffff;
5877		if (OVERFLOW_ADD(src3,src4,ares))
5878		ares = ((INT32)src3 < 0) ? 0x80000000 : 0x7fffffff;
5879		}
5880		IREG((op >> 23) & 1) = mres;
5881		IREG(((op >> 22) & 1) | 2) = ares;
5882		UPDATE_DEF();
5883		}
5884
5885		void tms3203x_device::mpyaddi_3(UINT32 op)
5886		{
5887		// src3 * src1, src2 + src4
5888		DECLARE_DEF;
5889		UINT32 src1 = IREG((op >> 19) & 7);
5890		UINT32 src2 = IREG((op >> 16) & 7);
5891		UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
5892		UINT32 src4 = RMEM(INDIRECT_1(op, op));
5893		INT64 mres = (INT64)((INT32)(src3 << 8) >> 8) * (INT64)((INT32)(src1 << 8) >> 8);
5894		UINT32 ares = src2 + src4;
5895
5896		CLR_NZVUF();
5897		if (OVM())
5898		{
5899		if (mres < -(INT64)0x80000000 || mres > (INT64)0x7fffffff)
5900		mres = (mres < 0) ? 0x80000000 : 0x7fffffff;
5901		if (OVERFLOW_ADD(src2,src4,ares))
5902		ares = ((INT32)src2 < 0) ? 0x80000000 : 0x7fffffff;
5903		}
5904		IREG((op >> 23) & 1) = mres;
5905		IREG(((op >> 22) & 1) | 2) = ares;
5906		UPDATE_DEF();
5907		}
5908
5909		/*-----------------------------------------------------*/
5910
5911		void tms3203x_device::mpysubi_0(UINT32 op)
5912		{
5913		// src3 * src4, src1 - src2
5914		DECLARE_DEF;
5915		UINT32 src1 = IREG((op >> 19) & 7);
5916		UINT32 src2 = IREG((op >> 16) & 7);
5917		UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
5918		UINT32 src4 = RMEM(INDIRECT_1(op, op));
5919		INT64 mres = (INT64)((INT32)(src3 << 8) >> 8) * (INT64)((INT32)(src4 << 8) >> 8);
5920		UINT32 ares = src1 - src2;
5921
5922		CLR_NZVUF();
5923		if (OVM())
5924		{
5925		if (mres < -(INT64)0x80000000 || mres > (INT64)0x7fffffff)
5926		mres = (mres < 0) ? 0x80000000 : 0x7fffffff;
5927		if (OVERFLOW_SUB(src1,src2,ares))
5928		ares = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff;
5929		}
5930		IREG((op >> 23) & 1) = mres;
5931		IREG(((op >> 22) & 1) | 2) = ares;
5932		UPDATE_DEF();
5933		}
5934
5935		void tms3203x_device::mpysubi_1(UINT32 op)
5936		{
5937		// src3 * src1, src4 - src2
5938		DECLARE_DEF;
5939		UINT32 src1 = IREG((op >> 19) & 7);
5940		UINT32 src2 = IREG((op >> 16) & 7);
5941		UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
5942		UINT32 src4 = RMEM(INDIRECT_1(op, op));
5943		INT64 mres = (INT64)((INT32)(src3 << 8) >> 8) * (INT64)((INT32)(src1 << 8) >> 8);
5944		UINT32 ares = src4 - src2;
5945
5946		CLR_NZVUF();
5947		if (OVM())
5948		{
5949		if (mres < -(INT64)0x80000000 || mres > (INT64)0x7fffffff)
5950		mres = (mres < 0) ? 0x80000000 : 0x7fffffff;
5951		if (OVERFLOW_SUB(src4,src2,ares))
5952		ares = ((INT32)src4 < 0) ? 0x80000000 : 0x7fffffff;
5953		}
5954		IREG((op >> 23) & 1) = mres;
5955		IREG(((op >> 22) & 1) | 2) = ares;
5956		UPDATE_DEF();
5957		}
5958
5959		void tms3203x_device::mpysubi_2(UINT32 op)
5960		{
5961		// src1 * src2, src3 - src4
5962		DECLARE_DEF;
5963		UINT32 src1 = IREG((op >> 19) & 7);
5964		UINT32 src2 = IREG((op >> 16) & 7);
5965		UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
5966		UINT32 src4 = RMEM(INDIRECT_1(op, op));
5967		INT64 mres = (INT64)((INT32)(src1 << 8) >> 8) * (INT64)((INT32)(src2 << 8) >> 8);
5968		UINT32 ares = src3 - src4;
5969
5970		CLR_NZVUF();
5971		if (OVM())
5972		{
5973		if (mres < -(INT64)0x80000000 || mres > (INT64)0x7fffffff)
5974		mres = (mres < 0) ? 0x80000000 : 0x7fffffff;
5975		if (OVERFLOW_SUB(src3,src4,ares))
5976		ares = ((INT32)src3 < 0) ? 0x80000000 : 0x7fffffff;
5977		}
5978		IREG((op >> 23) & 1) = mres;
5979		IREG(((op >> 22) & 1) | 2) = ares;
5980		UPDATE_DEF();
5981		}
5982
5983		void tms3203x_device::mpysubi_3(UINT32 op)
5984		{
5985		// src3 * src1, src2 - src4
5986		DECLARE_DEF;
5987		UINT32 src1 = IREG((op >> 19) & 7);
5988		UINT32 src2 = IREG((op >> 16) & 7);
5989		UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
5990		UINT32 src4 = RMEM(INDIRECT_1(op, op));
5991		INT64 mres = (INT64)((INT32)(src3 << 8) >> 8) * (INT64)((INT32)(src1 << 8) >> 8);
5992		UINT32 ares = src2 - src4;
5993
5994		CLR_NZVUF();
5995		if (OVM())
5996		{
5997		if (mres < -(INT64)0x80000000 || mres > (INT64)0x7fffffff)
5998		mres = (mres < 0) ? 0x80000000 : 0x7fffffff;
5999		if (OVERFLOW_SUB(src2,src4,ares))
6000		ares = ((INT32)src2 < 0) ? 0x80000000 : 0x7fffffff;
6001		}
6002		IREG((op >> 23) & 1) = mres;
6003		IREG(((op >> 22) & 1) | 2) = ares;
6004		UPDATE_DEF();
6005		}
6006
6007		/*-----------------------------------------------------*/
6008
6009		void tms3203x_device::stfstf(UINT32 op)
6010		{
6011		DECLARE_DEF;
6012		WMEM(INDIRECT_1_DEF(op, op >> 8), FP2LONG((op >> 16) & 7));
6013		WMEM(INDIRECT_1(op, op), FP2LONG((op >> 22) & 7));
6014		UPDATE_DEF();
6015		}
6016
6017		void tms3203x_device::stisti(UINT32 op)
6018		{
6019		DECLARE_DEF;
6020		WMEM(INDIRECT_1_DEF(op, op >> 8), IREG((op >> 16) & 7));
6021		WMEM(INDIRECT_1(op, op), IREG((op >> 22) & 7));
6022		UPDATE_DEF();
6023		}
6024
6025		/*-----------------------------------------------------*/
6026
6027		void tms3203x_device::ldfldf(UINT32 op)
6028		{
6029		DECLARE_DEF;
6030		UINT32 res;
6031		int dreg;
6032
6033		res = RMEM(INDIRECT_1_DEF(op, op >> 8));
6034		dreg = (op >> 19) & 7;
6035		LONG2FP(dreg, res);
6036		res = RMEM(INDIRECT_1(op, op));
6037		dreg = (op >> 22) & 7;
6038		LONG2FP(dreg, res);
6039		UPDATE_DEF();
6040		}
6041
6042		void tms3203x_device::ldildi(UINT32 op)
6043		{
6044		DECLARE_DEF;
6045		IREG((op >> 19) & 7) = RMEM(INDIRECT_1_DEF(op, op >> 8));
6046		IREG((op >> 22) & 7) = RMEM(INDIRECT_1(op, op));
6047		UPDATE_DEF();
6048		}
6049
6050		/*-----------------------------------------------------*/
6051
6052		//  src2 = ind(op)
6053		//  dst2 = ind(op >> 8)
6054		//  sreg3 = ((op >> 16) & 7)
6055		//  sreg1 = ((op >> 19) & 7)
6056		//  dreg1 = ((op >> 22) & 7)
6057
6058		void tms3203x_device::absfstf(UINT32 op)
6059		{
6060		DECLARE_DEF;
6061		UINT32 src3 = FP2LONG((op >> 16) & 7);
6062		UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
6063		{
6064		int dreg = (op >> 22) & 7;
6065		LONG2FP(TMR_TEMP1, src2);
6066		ABSF(dreg, TMR_TEMP1);
6067		}
6068		WMEM(INDIRECT_1(op, op >> 8), src3);
6069		UPDATE_DEF();
6070		}
6071
6072		void tms3203x_device::absisti(UINT32 op)
6073		{
6074		DECLARE_DEF;
6075		UINT32 src3 = IREG((op >> 16) & 7);
6076		UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
6077		{
6078		int dreg = (op >> 22) & 7;
6079		ABSI(dreg, src2);
6080		}
6081		WMEM(INDIRECT_1(op, op >> 8), src3);
6082		UPDATE_DEF();
6083		}
6084
6085		void tms3203x_device::addf3stf(UINT32 op)
6086		{
6087		DECLARE_DEF;
6088		UINT32 src3 = FP2LONG((op >> 16) & 7);
6089		UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
6090		{
6091		LONG2FP(TMR_TEMP1, src2);
6092		addf(m_r[(op >> 22) & 7], m_r[(op >> 19) & 7], m_r[TMR_TEMP1]);
6093		}
6094		WMEM(INDIRECT_1(op, op >> 8), src3);
6095		UPDATE_DEF();
6096		}
6097
6098		void tms3203x_device::addi3sti(UINT32 op)
6099		{
6100		DECLARE_DEF;
6101		UINT32 src3 = IREG((op >> 16) & 7);
6102		UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
6103		{
6104		int dreg = (op >> 22) & 7;
6105		UINT32 src1 = IREG((op >> 19) & 7);
6106		ADDI(dreg, src1, src2);
6107		}
6108		WMEM(INDIRECT_1(op, op >> 8), src3);
6109		UPDATE_DEF();
6110		}
6111
6112		void tms3203x_device::and3sti(UINT32 op)
6113		{
6114		DECLARE_DEF;
6115		UINT32 src3 = IREG((op >> 16) & 7);
6116		UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
6117		{
6118		int dreg = (op >> 22) & 7;
6119		UINT32 src1 = IREG((op >> 19) & 7);
6120		AND(dreg, src1, src2);
6121		}
6122		WMEM(INDIRECT_1(op, op >> 8), src3);
6123		UPDATE_DEF();
6124		}
6125
6126		void tms3203x_device::ash3sti(UINT32 op)
6127		{
6128		DECLARE_DEF;
6129		UINT32 src3 = IREG((op >> 16) & 7);
6130		UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
6131		{
6132		int dreg = (op >> 22) & 7;
6133		UINT32 count = IREG((op >> 19) & 7);
6134		ASH(dreg, src2, count);
6135		}
6136		WMEM(INDIRECT_1(op, op >> 8), src3);
6137		UPDATE_DEF();
6138		}
6139
6140		void tms3203x_device::fixsti(UINT32 op)
6141		{
6142		DECLARE_DEF;
6143		UINT32 src3 = IREG((op >> 16) & 7);
6144		UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
6145		{
6146		int dreg = (op >> 22) & 7;
6147		LONG2FP(dreg, src2);
6148		float2int(m_r[dreg], 1);
6149		}
6150		WMEM(INDIRECT_1(op, op >> 8), src3);
6151		UPDATE_DEF();
6152		}
6153
6154		void tms3203x_device::floatstf(UINT32 op)
6155		{
6156		DECLARE_DEF;
6157		UINT32 src3 = FP2LONG((op >> 16) & 7);
6158		UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
6159		{
6160		int dreg = (op >> 22) & 7;
6161		IREG(dreg) = src2;
6162		int2float(m_r[dreg]);
6163		}
6164		WMEM(INDIRECT_1(op, op >> 8), src3);
6165		UPDATE_DEF();
6166		}
6167
6168		void tms3203x_device::ldfstf(UINT32 op)
6169		{
6170		DECLARE_DEF;
6171		UINT32 src3 = FP2LONG((op >> 16) & 7);
6172		UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
6173		{
6174		int dreg = (op >> 22) & 7;
6175		LONG2FP(dreg, src2);
6176		}
6177		WMEM(INDIRECT_1(op, op >> 8), src3);
6178		UPDATE_DEF();
6179		}
6180
6181		void tms3203x_device::ldisti(UINT32 op)
6182		{
6183		DECLARE_DEF;
6184		UINT32 src3 = IREG((op >> 16) & 7);
6185		UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
6186		IREG((op >> 22) & 7) = src2;
6187		WMEM(INDIRECT_1(op, op >> 8), src3);
6188		UPDATE_DEF();
6189		}
6190
6191		void tms3203x_device::lsh3sti(UINT32 op)
6192		{
6193		DECLARE_DEF;
6194		UINT32 src3 = IREG((op >> 16) & 7);
6195		UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
6196		{
6197		int dreg = (op >> 22) & 7;
6198		UINT32 count = IREG((op >> 19) & 7);
6199		LSH(dreg, src2, count);
6200		}
6201		WMEM(INDIRECT_1(op, op >> 8), src3);
6202		UPDATE_DEF();
6203		}
6204
6205		void tms3203x_device::mpyf3stf(UINT32 op)
6206		{
6207		DECLARE_DEF;
6208		UINT32 src3 = FP2LONG((op >> 16) & 7);
6209		UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
6210		{
6211		LONG2FP(TMR_TEMP1, src2);
6212		mpyf(m_r[(op >> 22) & 7], m_r[(op >> 19) & 7], m_r[TMR_TEMP1]);
6213		}
6214		WMEM(INDIRECT_1(op, op >> 8), src3);
6215		UPDATE_DEF();
6216		}
6217
6218		void tms3203x_device::mpyi3sti(UINT32 op)
6219		{
6220		DECLARE_DEF;
6221		UINT32 src3 = IREG((op >> 16) & 7);
6222		UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
6223		{
6224		int dreg = (op >> 22) & 7;
6225		UINT32 src1 = IREG((op >> 19) & 7);
6226		MPYI(dreg, src1, src2);
6227		}
6228		WMEM(INDIRECT_1(op, op >> 8), src3);
6229		UPDATE_DEF();
6230		}
6231
6232		void tms3203x_device::negfstf(UINT32 op)
6233		{
6234		DECLARE_DEF;
6235		UINT32 src3 = FP2LONG((op >> 16) & 7);
6236		UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
6237		{
6238		LONG2FP(TMR_TEMP1, src2);
6239		negf(m_r[(op >> 22) & 7], m_r[TMR_TEMP1]);
6240		}
6241		WMEM(INDIRECT_1(op, op >> 8), src3);
6242		UPDATE_DEF();
6243		}
6244
6245		void tms3203x_device::negisti(UINT32 op)
6246		{
6247		DECLARE_DEF;
6248		UINT32 src3 = IREG((op >> 16) & 7);
6249		UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
6250		{
6251		int dreg = (op >> 22) & 7;
6252		NEGI(dreg, src2);
6253		}
6254		WMEM(INDIRECT_1(op, op >> 8), src3);
6255		UPDATE_DEF();
6256		}
6257
6258		void tms3203x_device::notsti(UINT32 op)
6259		{
6260		DECLARE_DEF;
6261		UINT32 src3 = IREG((op >> 16) & 7);
6262		UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
6263		{
6264		int dreg = (op >> 22) & 7;
6265		NOT(dreg, src2);
6266		}
6267		WMEM(INDIRECT_1(op, op >> 8), src3);
6268		UPDATE_DEF();
6269		}
6270
6271		void tms3203x_device::or3sti(UINT32 op)
6272		{
6273		DECLARE_DEF;
6274		UINT32 src3 = IREG((op >> 16) & 7);
6275		UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
6276		{
6277		int dreg = (op >> 22) & 7;
6278		UINT32 src1 = IREG((op >> 19) & 7);
6279		OR(dreg, src1, src2);
6280		}
6281		WMEM(INDIRECT_1(op, op >> 8), src3);
6282		UPDATE_DEF();
6283		}
6284
6285		void tms3203x_device::subf3stf(UINT32 op)
6286		{
6287		DECLARE_DEF;
6288		UINT32 src3 = FP2LONG((op >> 16) & 7);
6289		UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
6290		{
6291		LONG2FP(TMR_TEMP1, src2);
6292		subf(m_r[(op >> 22) & 7], m_r[TMR_TEMP1], m_r[(op >> 19) & 7]);
6293		}
6294		WMEM(INDIRECT_1(op, op >> 8), src3);
6295		UPDATE_DEF();
6296		}
6297
6298		void tms3203x_device::subi3sti(UINT32 op)
6299		{
6300		DECLARE_DEF;
6301		UINT32 src3 = IREG((op >> 16) & 7);
6302		UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
6303		{
6304		int dreg = (op >> 22) & 7;
6305		UINT32 src1 = IREG((op >> 19) & 7);
6306		SUBI(dreg, src2, src1);
6307		}
6308		WMEM(INDIRECT_1(op, op >> 8), src3);
6309		UPDATE_DEF();
6310		}
6311
6312		void tms3203x_device::xor3sti(UINT32 op)
6313		{
6314		DECLARE_DEF;
6315		UINT32 src3 = IREG((op >> 16) & 7);
6316		UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
6317		{
6318		int dreg = (op >> 22) & 7;
6319		UINT32 src1 = IREG((op >> 19) & 7);
6320		XOR(dreg, src1, src2);
6321		}
6322		WMEM(INDIRECT_1(op, op >> 8), src3);
6323		UPDATE_DEF();
6324		}
6325
6326
6327		//**************************************************************************
6328		//  FUNCTION TABLE
6329		//**************************************************************************
6330
6331		UINT32 (tms3203x_device::*const tms3203x_device::s_indirect_d[0x20])(UINT32, UINT8) =
6332		{
6333		&tms3203x_device::mod00_d,      &tms3203x_device::mod01_d,      &tms3203x_device::mod02_d,      &tms3203x_device::mod03_d,
6334		&tms3203x_device::mod04_d,      &tms3203x_device::mod05_d,      &tms3203x_device::mod06_d,      &tms3203x_device::mod07_d,
6335		&tms3203x_device::mod08,        &tms3203x_device::mod09,        &tms3203x_device::mod0a,        &tms3203x_device::mod0b,
6336		&tms3203x_device::mod0c,        &tms3203x_device::mod0d,        &tms3203x_device::mod0e,        &tms3203x_device::mod0f,
6337		&tms3203x_device::mod10,        &tms3203x_device::mod11,        &tms3203x_device::mod12,        &tms3203x_device::mod13,
6338		&tms3203x_device::mod14,        &tms3203x_device::mod15,        &tms3203x_device::mod16,        &tms3203x_device::mod17,
6339		&tms3203x_device::mod18,        &tms3203x_device::mod19,        &tms3203x_device::modillegal,   &tms3203x_device::modillegal,
6340		&tms3203x_device::modillegal,   &tms3203x_device::modillegal,   &tms3203x_device::modillegal,   &tms3203x_device::modillegal
6341		};
6342
6343
6344		UINT32 (tms3203x_device::*const tms3203x_device::s_indirect_1[0x20])(UINT32, UINT8) =
6345		{
6346		&tms3203x_device::mod00_1,      &tms3203x_device::mod01_1,      &tms3203x_device::mod02_1,      &tms3203x_device::mod03_1,
6347		&tms3203x_device::mod04_1,      &tms3203x_device::mod05_1,      &tms3203x_device::mod06_1,      &tms3203x_device::mod07_1,
6348		&tms3203x_device::mod08,        &tms3203x_device::mod09,        &tms3203x_device::mod0a,        &tms3203x_device::mod0b,
6349		&tms3203x_device::mod0c,        &tms3203x_device::mod0d,        &tms3203x_device::mod0e,        &tms3203x_device::mod0f,
6350		&tms3203x_device::mod10,        &tms3203x_device::mod11,        &tms3203x_device::mod12,        &tms3203x_device::mod13,
6351		&tms3203x_device::mod14,        &tms3203x_device::mod15,        &tms3203x_device::mod16,        &tms3203x_device::mod17,
6352		&tms3203x_device::mod18,        &tms3203x_device::mod19,        &tms3203x_device::modillegal,   &tms3203x_device::modillegal,
6353		&tms3203x_device::modillegal,   &tms3203x_device::modillegal,   &tms3203x_device::modillegal,   &tms3203x_device::modillegal
6354		};
6355
6356
6357		UINT32 (tms3203x_device::*const tms3203x_device::s_indirect_1_def[0x20])(UINT32, UINT8, UINT32 *&) =
6358		{
6359		&tms3203x_device::mod00_1_def,  &tms3203x_device::mod01_1_def,  &tms3203x_device::mod02_1_def,  &tms3203x_device::mod03_1_def,
6360		&tms3203x_device::mod04_1_def,  &tms3203x_device::mod05_1_def,  &tms3203x_device::mod06_1_def,  &tms3203x_device::mod07_1_def,
6361		&tms3203x_device::mod08_def,    &tms3203x_device::mod09_def,    &tms3203x_device::mod0a_def,    &tms3203x_device::mod0b_def,
6362		&tms3203x_device::mod0c_def,    &tms3203x_device::mod0d_def,    &tms3203x_device::mod0e_def,    &tms3203x_device::mod0f_def,
6363		&tms3203x_device::mod10_def,    &tms3203x_device::mod11_def,    &tms3203x_device::mod12_def,    &tms3203x_device::mod13_def,
6364		&tms3203x_device::mod14_def,    &tms3203x_device::mod15_def,    &tms3203x_device::mod16_def,    &tms3203x_device::mod17_def,
6365		&tms3203x_device::mod18_def,    &tms3203x_device::mod19_def,    &tms3203x_device::modillegal_def,&tms3203x_device::modillegal_def,
6366		&tms3203x_device::modillegal_def,&tms3203x_device::modillegal_def,&tms3203x_device::modillegal_def,&tms3203x_device::modillegal_def
6367		};
6368
6369		void (tms3203x_device::*const tms3203x_device::s_tms32031ops[])(UINT32 op) =
6370		{
6371		&tms3203x_device::absf_reg,     &tms3203x_device::absf_dir,     &tms3203x_device::absf_ind,     &tms3203x_device::absf_imm,     // 0x00
6372		&tms3203x_device::absi_reg,     &tms3203x_device::absi_dir,     &tms3203x_device::absi_ind,     &tms3203x_device::absi_imm,
6373		&tms3203x_device::addc_reg,     &tms3203x_device::addc_dir,     &tms3203x_device::addc_ind,     &tms3203x_device::addc_imm,
6374		&tms3203x_device::addf_reg,     &tms3203x_device::addf_dir,     &tms3203x_device::addf_ind,     &tms3203x_device::addf_imm,
6375		&tms3203x_device::addi_reg,     &tms3203x_device::addi_dir,     &tms3203x_device::addi_ind,     &tms3203x_device::addi_imm,
6376		&tms3203x_device::and_reg,      &tms3203x_device::and_dir,      &tms3203x_device::and_ind,      &tms3203x_device::and_imm,
6377		&tms3203x_device::andn_reg,     &tms3203x_device::andn_dir,     &tms3203x_device::andn_ind,     &tms3203x_device::andn_imm,
6378		&tms3203x_device::ash_reg,      &tms3203x_device::ash_dir,      &tms3203x_device::ash_ind,      &tms3203x_device::ash_imm,
6379		&tms3203x_device::cmpf_reg,     &tms3203x_device::cmpf_dir,     &tms3203x_device::cmpf_ind,     &tms3203x_device::cmpf_imm,     // 0x08
6380		&tms3203x_device::cmpi_reg,     &tms3203x_device::cmpi_dir,     &tms3203x_device::cmpi_ind,     &tms3203x_device::cmpi_imm,
6381		&tms3203x_device::fix_reg,      &tms3203x_device::fix_dir,      &tms3203x_device::fix_ind,      &tms3203x_device::fix_imm,
6382		&tms3203x_device::float_reg,    &tms3203x_device::float_dir,    &tms3203x_device::float_ind,    &tms3203x_device::float_imm,
6383		&tms3203x_device::idle,         &tms3203x_device::idle,         &tms3203x_device::idle,         &tms3203x_device::idle,
6384		&tms3203x_device::lde_reg,      &tms3203x_device::lde_dir,      &tms3203x_device::lde_ind,      &tms3203x_device::lde_imm,
6385		&tms3203x_device::ldf_reg,      &tms3203x_device::ldf_dir,      &tms3203x_device::ldf_ind,      &tms3203x_device::ldf_imm,
6386		&tms3203x_device::illegal,      &tms3203x_device::ldfi_dir,     &tms3203x_device::ldfi_ind,     &tms3203x_device::illegal,
6387		&tms3203x_device::ldi_reg,      &tms3203x_device::ldi_dir,      &tms3203x_device::ldi_ind,      &tms3203x_device::ldi_imm,      // 0x10
6388		&tms3203x_device::illegal,      &tms3203x_device::ldii_dir,     &tms3203x_device::ldii_ind,     &tms3203x_device::illegal,
6389		&tms3203x_device::ldm_reg,      &tms3203x_device::ldm_dir,      &tms3203x_device::ldm_ind,      &tms3203x_device::ldm_imm,
6390		&tms3203x_device::lsh_reg,      &tms3203x_device::lsh_dir,      &tms3203x_device::lsh_ind,      &tms3203x_device::lsh_imm,
6391		&tms3203x_device::mpyf_reg,     &tms3203x_device::mpyf_dir,     &tms3203x_device::mpyf_ind,     &tms3203x_device::mpyf_imm,
6392		&tms3203x_device::mpyi_reg,     &tms3203x_device::mpyi_dir,     &tms3203x_device::mpyi_ind,     &tms3203x_device::mpyi_imm,
6393		&tms3203x_device::negb_reg,     &tms3203x_device::negb_dir,     &tms3203x_device::negb_ind,     &tms3203x_device::negb_imm,
6394		&tms3203x_device::negf_reg,     &tms3203x_device::negf_dir,     &tms3203x_device::negf_ind,     &tms3203x_device::negf_imm,
6395		&tms3203x_device::negi_reg,     &tms3203x_device::negi_dir,     &tms3203x_device::negi_ind,     &tms3203x_device::negi_imm,     // 0x18
6396		&tms3203x_device::nop_reg,      &tms3203x_device::illegal,      &tms3203x_device::nop_ind,      &tms3203x_device::illegal,
6397		&tms3203x_device::norm_reg,     &tms3203x_device::norm_dir,     &tms3203x_device::norm_ind,     &tms3203x_device::norm_imm,
6398		&tms3203x_device::not_reg,      &tms3203x_device::not_dir,      &tms3203x_device::not_ind,      &tms3203x_device::not_imm,
6399		&tms3203x_device::illegal,      &tms3203x_device::pop,          &tms3203x_device::illegal,      &tms3203x_device::illegal,
6400		&tms3203x_device::illegal,      &tms3203x_device::popf,         &tms3203x_device::illegal,      &tms3203x_device::illegal,
6401		&tms3203x_device::illegal,      &tms3203x_device::push,         &tms3203x_device::illegal,      &tms3203x_device::illegal,
6402		&tms3203x_device::illegal,      &tms3203x_device::pushf,        &tms3203x_device::illegal,      &tms3203x_device::illegal,
6403		&tms3203x_device::or_reg,       &tms3203x_device::or_dir,       &tms3203x_device::or_ind,       &tms3203x_device::or_imm,       // 0x20
6404		&tms3203x_device::maxspeed,     &tms3203x_device::maxspeed,     &tms3203x_device::maxspeed,     &tms3203x_device::maxspeed,
6405		&tms3203x_device::rnd_reg,      &tms3203x_device::rnd_dir,      &tms3203x_device::rnd_ind,      &tms3203x_device::rnd_imm,
6406		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::rol,
6407		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::rolc,
6408		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::ror,
6409		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::rorc,
6410		&tms3203x_device::rtps_reg,     &tms3203x_device::rtps_dir,     &tms3203x_device::rtps_ind,     &tms3203x_device::rtps_imm,
6411		&tms3203x_device::illegal,      &tms3203x_device::stf_dir,      &tms3203x_device::stf_ind,      &tms3203x_device::illegal,      // 0x28
6412		&tms3203x_device::illegal,      &tms3203x_device::stfi_dir,     &tms3203x_device::stfi_ind,     &tms3203x_device::illegal,
6413		&tms3203x_device::illegal,      &tms3203x_device::sti_dir,      &tms3203x_device::sti_ind,      &tms3203x_device::illegal,
6414		&tms3203x_device::illegal,      &tms3203x_device::stii_dir,     &tms3203x_device::stii_ind,     &tms3203x_device::illegal,
6415		&tms3203x_device::sigi,         &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6416		&tms3203x_device::subb_reg,     &tms3203x_device::subb_dir,     &tms3203x_device::subb_ind,     &tms3203x_device::subb_imm,
6417		&tms3203x_device::subc_reg,     &tms3203x_device::subc_dir,     &tms3203x_device::subc_ind,     &tms3203x_device::subc_imm,
6418		&tms3203x_device::subf_reg,     &tms3203x_device::subf_dir,     &tms3203x_device::subf_ind,     &tms3203x_device::subf_imm,
6419		&tms3203x_device::subi_reg,     &tms3203x_device::subi_dir,     &tms3203x_device::subi_ind,     &tms3203x_device::subi_imm,     // 0x30
6420		&tms3203x_device::subrb_reg,    &tms3203x_device::subrb_dir,    &tms3203x_device::subrb_ind,    &tms3203x_device::subrb_imm,
6421		&tms3203x_device::subrf_reg,    &tms3203x_device::subrf_dir,    &tms3203x_device::subrf_ind,    &tms3203x_device::subrf_imm,
6422		&tms3203x_device::subri_reg,    &tms3203x_device::subri_dir,    &tms3203x_device::subri_ind,    &tms3203x_device::subri_imm,
6423		&tms3203x_device::tstb_reg,     &tms3203x_device::tstb_dir,     &tms3203x_device::tstb_ind,     &tms3203x_device::tstb_imm,
6424		&tms3203x_device::xor_reg,      &tms3203x_device::xor_dir,      &tms3203x_device::xor_ind,      &tms3203x_device::xor_imm,
6425		&tms3203x_device::illegal,      &tms3203x_device::iack_dir,     &tms3203x_device::iack_ind,     &tms3203x_device::illegal,
6426		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6427		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x38
6428		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6429		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6430		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6431		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6432		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6433		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6434		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6435
6436		&tms3203x_device::addc3_regreg, &tms3203x_device::addc3_indreg, &tms3203x_device::addc3_regind, &tms3203x_device::addc3_indind, // 0x40
6437		&tms3203x_device::addf3_regreg, &tms3203x_device::addf3_indreg, &tms3203x_device::addf3_regind, &tms3203x_device::addf3_indind,
6438		&tms3203x_device::addi3_regreg, &tms3203x_device::addi3_indreg, &tms3203x_device::addi3_regind, &tms3203x_device::addi3_indind,
6439		&tms3203x_device::and3_regreg,  &tms3203x_device::and3_indreg,  &tms3203x_device::and3_regind,  &tms3203x_device::and3_indind,
6440		&tms3203x_device::andn3_regreg, &tms3203x_device::andn3_indreg, &tms3203x_device::andn3_regind, &tms3203x_device::andn3_indind,
6441		&tms3203x_device::ash3_regreg,  &tms3203x_device::ash3_indreg,  &tms3203x_device::ash3_regind,  &tms3203x_device::ash3_indind,
6442		&tms3203x_device::cmpf3_regreg, &tms3203x_device::cmpf3_indreg, &tms3203x_device::cmpf3_regind, &tms3203x_device::cmpf3_indind,
6443		&tms3203x_device::cmpi3_regreg, &tms3203x_device::cmpi3_indreg, &tms3203x_device::cmpi3_regind, &tms3203x_device::cmpi3_indind,
6444		&tms3203x_device::lsh3_regreg,  &tms3203x_device::lsh3_indreg,  &tms3203x_device::lsh3_regind,  &tms3203x_device::lsh3_indind,  // 0x48
6445		&tms3203x_device::mpyf3_regreg, &tms3203x_device::mpyf3_indreg, &tms3203x_device::mpyf3_regind, &tms3203x_device::mpyf3_indind,
6446		&tms3203x_device::mpyi3_regreg, &tms3203x_device::mpyi3_indreg, &tms3203x_device::mpyi3_regind, &tms3203x_device::mpyi3_indind,
6447		&tms3203x_device::or3_regreg,   &tms3203x_device::or3_indreg,   &tms3203x_device::or3_regind,   &tms3203x_device::or3_indind,
6448		&tms3203x_device::subb3_regreg, &tms3203x_device::subb3_indreg, &tms3203x_device::subb3_regind, &tms3203x_device::subb3_indind,
6449		&tms3203x_device::subf3_regreg, &tms3203x_device::subf3_indreg, &tms3203x_device::subf3_regind, &tms3203x_device::subf3_indind,
6450		&tms3203x_device::subi3_regreg, &tms3203x_device::subi3_indreg, &tms3203x_device::subi3_regind, &tms3203x_device::subi3_indind,
6451		&tms3203x_device::tstb3_regreg, &tms3203x_device::tstb3_indreg, &tms3203x_device::tstb3_regind, &tms3203x_device::tstb3_indind,
6452		&tms3203x_device::xor3_regreg,  &tms3203x_device::xor3_indreg,  &tms3203x_device::xor3_regind,  &tms3203x_device::xor3_indind,  // 0x50
6453		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6454		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6455		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6456		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6457		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6458		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6459		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6460		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x58
6461		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6462		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6463		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6464		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6465		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6466		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6467		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6468		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x60
6469		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6470		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6471		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6472		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6473		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6474		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6475		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6476		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x68
6477		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6478		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6479		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6480		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6481		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6482		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6483		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6484		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x70
6485		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6486		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6487		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6488		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6489		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6490		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6491		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6492		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x78
6493		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6494		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6495		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6496		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6497		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6498		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6499		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6500
6501		&tms3203x_device::ldfu_reg,     &tms3203x_device::ldfu_dir,     &tms3203x_device::ldfu_ind,     &tms3203x_device::ldfu_imm,     // 0x80
6502		&tms3203x_device::ldflo_reg,    &tms3203x_device::ldflo_dir,    &tms3203x_device::ldflo_ind,    &tms3203x_device::ldflo_imm,
6503		&tms3203x_device::ldfls_reg,    &tms3203x_device::ldfls_dir,    &tms3203x_device::ldfls_ind,    &tms3203x_device::ldfls_imm,
6504		&tms3203x_device::ldfhi_reg,    &tms3203x_device::ldfhi_dir,    &tms3203x_device::ldfhi_ind,    &tms3203x_device::ldfhi_imm,
6505		&tms3203x_device::ldfhs_reg,    &tms3203x_device::ldfhs_dir,    &tms3203x_device::ldfhs_ind,    &tms3203x_device::ldfhs_imm,
6506		&tms3203x_device::ldfeq_reg,    &tms3203x_device::ldfeq_dir,    &tms3203x_device::ldfeq_ind,    &tms3203x_device::ldfeq_imm,
6507		&tms3203x_device::ldfne_reg,    &tms3203x_device::ldfne_dir,    &tms3203x_device::ldfne_ind,    &tms3203x_device::ldfne_imm,
6508		&tms3203x_device::ldflt_reg,    &tms3203x_device::ldflt_dir,    &tms3203x_device::ldflt_ind,    &tms3203x_device::ldflt_imm,
6509		&tms3203x_device::ldfle_reg,    &tms3203x_device::ldfle_dir,    &tms3203x_device::ldfle_ind,    &tms3203x_device::ldfle_imm,    // 0x88
6510		&tms3203x_device::ldfgt_reg,    &tms3203x_device::ldfgt_dir,    &tms3203x_device::ldfgt_ind,    &tms3203x_device::ldfgt_imm,
6511		&tms3203x_device::ldfge_reg,    &tms3203x_device::ldfge_dir,    &tms3203x_device::ldfge_ind,    &tms3203x_device::ldfge_imm,
6512		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6513		&tms3203x_device::ldfnv_reg,    &tms3203x_device::ldfnv_dir,    &tms3203x_device::ldfnv_ind,    &tms3203x_device::ldfnv_imm,
6514		&tms3203x_device::ldfv_reg,     &tms3203x_device::ldfv_dir,     &tms3203x_device::ldfv_ind,     &tms3203x_device::ldfv_imm,
6515		&tms3203x_device::ldfnuf_reg,   &tms3203x_device::ldfnuf_dir,   &tms3203x_device::ldfnuf_ind,   &tms3203x_device::ldfnuf_imm,
6516		&tms3203x_device::ldfuf_reg,    &tms3203x_device::ldfuf_dir,    &tms3203x_device::ldfuf_ind,    &tms3203x_device::ldfuf_imm,
6517		&tms3203x_device::ldfnlv_reg,   &tms3203x_device::ldfnlv_dir,   &tms3203x_device::ldfnlv_ind,   &tms3203x_device::ldfnlv_imm,   // 0x90
6518		&tms3203x_device::ldflv_reg,    &tms3203x_device::ldflv_dir,    &tms3203x_device::ldflv_ind,    &tms3203x_device::ldflv_imm,
6519		&tms3203x_device::ldfnluf_reg,  &tms3203x_device::ldfnluf_dir,  &tms3203x_device::ldfnluf_ind,  &tms3203x_device::ldfnluf_imm,
6520		&tms3203x_device::ldfluf_reg,   &tms3203x_device::ldfluf_dir,   &tms3203x_device::ldfluf_ind,   &tms3203x_device::ldfluf_imm,
6521		&tms3203x_device::ldfzuf_reg,   &tms3203x_device::ldfzuf_dir,   &tms3203x_device::ldfzuf_ind,   &tms3203x_device::ldfzuf_imm,
6522		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6523		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6524		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6525		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x98
6526		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6527		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6528		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6529		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6530		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6531		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6532		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6533		&tms3203x_device::ldiu_reg,     &tms3203x_device::ldiu_dir,     &tms3203x_device::ldiu_ind,     &tms3203x_device::ldiu_imm,     // 0xa0
6534		&tms3203x_device::ldilo_reg,    &tms3203x_device::ldilo_dir,    &tms3203x_device::ldilo_ind,    &tms3203x_device::ldilo_imm,
6535		&tms3203x_device::ldils_reg,    &tms3203x_device::ldils_dir,    &tms3203x_device::ldils_ind,    &tms3203x_device::ldils_imm,
6536		&tms3203x_device::ldihi_reg,    &tms3203x_device::ldihi_dir,    &tms3203x_device::ldihi_ind,    &tms3203x_device::ldihi_imm,
6537		&tms3203x_device::ldihs_reg,    &tms3203x_device::ldihs_dir,    &tms3203x_device::ldihs_ind,    &tms3203x_device::ldihs_imm,
6538		&tms3203x_device::ldieq_reg,    &tms3203x_device::ldieq_dir,    &tms3203x_device::ldieq_ind,    &tms3203x_device::ldieq_imm,
6539		&tms3203x_device::ldine_reg,    &tms3203x_device::ldine_dir,    &tms3203x_device::ldine_ind,    &tms3203x_device::ldine_imm,
6540		&tms3203x_device::ldilt_reg,    &tms3203x_device::ldilt_dir,    &tms3203x_device::ldilt_ind,    &tms3203x_device::ldilt_imm,
6541		&tms3203x_device::ldile_reg,    &tms3203x_device::ldile_dir,    &tms3203x_device::ldile_ind,    &tms3203x_device::ldile_imm,    // 0xa8
6542		&tms3203x_device::ldigt_reg,    &tms3203x_device::ldigt_dir,    &tms3203x_device::ldigt_ind,    &tms3203x_device::ldigt_imm,
6543		&tms3203x_device::ldige_reg,    &tms3203x_device::ldige_dir,    &tms3203x_device::ldige_ind,    &tms3203x_device::ldige_imm,
6544		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6545		&tms3203x_device::ldinv_reg,    &tms3203x_device::ldinv_dir,    &tms3203x_device::ldinv_ind,    &tms3203x_device::ldinv_imm,
6546		&tms3203x_device::ldiv_reg,     &tms3203x_device::ldiv_dir,     &tms3203x_device::ldiv_ind,     &tms3203x_device::ldiv_imm,
6547		&tms3203x_device::ldinuf_reg,   &tms3203x_device::ldinuf_dir,   &tms3203x_device::ldinuf_ind,   &tms3203x_device::ldinuf_imm,
6548		&tms3203x_device::ldiuf_reg,    &tms3203x_device::ldiuf_dir,    &tms3203x_device::ldiuf_ind,    &tms3203x_device::ldiuf_imm,
6549		&tms3203x_device::ldinlv_reg,   &tms3203x_device::ldinlv_dir,   &tms3203x_device::ldinlv_ind,   &tms3203x_device::ldinlv_imm,   // 0xb0
6550		&tms3203x_device::ldilv_reg,    &tms3203x_device::ldilv_dir,    &tms3203x_device::ldilv_ind,    &tms3203x_device::ldilv_imm,
6551		&tms3203x_device::ldinluf_reg,  &tms3203x_device::ldinluf_dir,  &tms3203x_device::ldinluf_ind,  &tms3203x_device::ldinluf_imm,
6552		&tms3203x_device::ldiluf_reg,   &tms3203x_device::ldiluf_dir,   &tms3203x_device::ldiluf_ind,   &tms3203x_device::ldiluf_imm,
6553		&tms3203x_device::ldizuf_reg,   &tms3203x_device::ldizuf_dir,   &tms3203x_device::ldizuf_ind,   &tms3203x_device::ldizuf_imm,
6554		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6555		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6556		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6557		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0xb8
6558		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6559		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6560		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6561		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6562		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6563		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6564		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6565
6566		&tms3203x_device::br_imm,       &tms3203x_device::br_imm,       &tms3203x_device::br_imm,       &tms3203x_device::br_imm,       // 0xc0
6567		&tms3203x_device::br_imm,       &tms3203x_device::br_imm,       &tms3203x_device::br_imm,       &tms3203x_device::br_imm,
6568		&tms3203x_device::brd_imm,      &tms3203x_device::brd_imm,      &tms3203x_device::brd_imm,      &tms3203x_device::brd_imm,
6569		&tms3203x_device::brd_imm,      &tms3203x_device::brd_imm,      &tms3203x_device::brd_imm,      &tms3203x_device::brd_imm,
6570		&tms3203x_device::call_imm,     &tms3203x_device::call_imm,     &tms3203x_device::call_imm,     &tms3203x_device::call_imm,
6571		&tms3203x_device::call_imm,     &tms3203x_device::call_imm,     &tms3203x_device::call_imm,     &tms3203x_device::call_imm,
6572		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6573		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6574		&tms3203x_device::rptb_imm,     &tms3203x_device::rptb_imm,     &tms3203x_device::rptb_imm,     &tms3203x_device::rptb_imm,     // 0xc8
6575		&tms3203x_device::rptb_imm,     &tms3203x_device::rptb_imm,     &tms3203x_device::rptb_imm,     &tms3203x_device::rptb_imm,
6576		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6577		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6578		&tms3203x_device::swi,          &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6579		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6580		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6581		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6582		&tms3203x_device::brc_reg,      &tms3203x_device::brcd_reg,     &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0xd0
6583		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6584		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6585		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6586		&tms3203x_device::brc_imm,      &tms3203x_device::brcd_imm,     &tms3203x_device::illegal,      &tms3203x_device::illegal,
6587		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6588		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6589		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6590		&tms3203x_device::dbc_reg,      &tms3203x_device::dbcd_reg,     &tms3203x_device::dbc_reg,      &tms3203x_device::dbcd_reg,     // 0xd8
6591		&tms3203x_device::dbc_reg,      &tms3203x_device::dbcd_reg,     &tms3203x_device::dbc_reg,      &tms3203x_device::dbcd_reg,
6592		&tms3203x_device::dbc_reg,      &tms3203x_device::dbcd_reg,     &tms3203x_device::dbc_reg,      &tms3203x_device::dbcd_reg,
6593		&tms3203x_device::dbc_reg,      &tms3203x_device::dbcd_reg,     &tms3203x_device::dbc_reg,      &tms3203x_device::dbcd_reg,
6594		&tms3203x_device::dbc_imm,      &tms3203x_device::dbcd_imm,     &tms3203x_device::dbc_imm,      &tms3203x_device::dbcd_imm,
6595		&tms3203x_device::dbc_imm,      &tms3203x_device::dbcd_imm,     &tms3203x_device::dbc_imm,      &tms3203x_device::dbcd_imm,
6596		&tms3203x_device::dbc_imm,      &tms3203x_device::dbcd_imm,     &tms3203x_device::dbc_imm,      &tms3203x_device::dbcd_imm,
6597		&tms3203x_device::dbc_imm,      &tms3203x_device::dbcd_imm,     &tms3203x_device::dbc_imm,      &tms3203x_device::dbcd_imm,
6598		&tms3203x_device::callc_reg,    &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0xe0
6599		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6600		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6601		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6602		&tms3203x_device::callc_imm,    &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6603		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6604		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6605		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6606		&tms3203x_device::trapc,        &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0xe8
6607		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6608		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6609		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6610		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6611		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6612		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6613		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6614		&tms3203x_device::retic_reg,    &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0xf0
6615		&tms3203x_device::retsc_reg,    &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6616		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6617		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6618		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6619		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6620		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6621		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6622		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0xf8
6623		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6624		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6625		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6626		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6627		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6628		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6629		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6630
6631		&tms3203x_device::mpyaddf_0,    &tms3203x_device::mpyaddf_0,    &tms3203x_device::mpyaddf_0,    &tms3203x_device::mpyaddf_0,    // 0x100
6632		&tms3203x_device::mpyaddf_0,    &tms3203x_device::mpyaddf_0,    &tms3203x_device::mpyaddf_0,    &tms3203x_device::mpyaddf_0,
6633		&tms3203x_device::mpyaddf_1,    &tms3203x_device::mpyaddf_1,    &tms3203x_device::mpyaddf_1,    &tms3203x_device::mpyaddf_1,
6634		&tms3203x_device::mpyaddf_1,    &tms3203x_device::mpyaddf_1,    &tms3203x_device::mpyaddf_1,    &tms3203x_device::mpyaddf_1,
6635		&tms3203x_device::mpyaddf_2,    &tms3203x_device::mpyaddf_2,    &tms3203x_device::mpyaddf_2,    &tms3203x_device::mpyaddf_2,
6636		&tms3203x_device::mpyaddf_2,    &tms3203x_device::mpyaddf_2,    &tms3203x_device::mpyaddf_2,    &tms3203x_device::mpyaddf_2,
6637		&tms3203x_device::mpyaddf_3,    &tms3203x_device::mpyaddf_3,    &tms3203x_device::mpyaddf_3,    &tms3203x_device::mpyaddf_3,
6638		&tms3203x_device::mpyaddf_3,    &tms3203x_device::mpyaddf_3,    &tms3203x_device::mpyaddf_3,    &tms3203x_device::mpyaddf_3,
6639		&tms3203x_device::mpysubf_0,    &tms3203x_device::mpysubf_0,    &tms3203x_device::mpysubf_0,    &tms3203x_device::mpysubf_0,    // 0x108
6640		&tms3203x_device::mpysubf_0,    &tms3203x_device::mpysubf_0,    &tms3203x_device::mpysubf_0,    &tms3203x_device::mpysubf_0,
6641		&tms3203x_device::mpysubf_1,    &tms3203x_device::mpysubf_1,    &tms3203x_device::mpysubf_1,    &tms3203x_device::mpysubf_1,
6642		&tms3203x_device::mpysubf_1,    &tms3203x_device::mpysubf_1,    &tms3203x_device::mpysubf_1,    &tms3203x_device::mpysubf_1,
6643		&tms3203x_device::mpysubf_2,    &tms3203x_device::mpysubf_2,    &tms3203x_device::mpysubf_2,    &tms3203x_device::mpysubf_2,
6644		&tms3203x_device::mpysubf_2,    &tms3203x_device::mpysubf_2,    &tms3203x_device::mpysubf_2,    &tms3203x_device::mpysubf_2,
6645		&tms3203x_device::mpysubf_3,    &tms3203x_device::mpysubf_3,    &tms3203x_device::mpysubf_3,    &tms3203x_device::mpysubf_3,
6646		&tms3203x_device::mpysubf_3,    &tms3203x_device::mpysubf_3,    &tms3203x_device::mpysubf_3,    &tms3203x_device::mpysubf_3,
6647		&tms3203x_device::mpyaddi_0,    &tms3203x_device::mpyaddi_0,    &tms3203x_device::mpyaddi_0,    &tms3203x_device::mpyaddi_0,    // 0x110
6648		&tms3203x_device::mpyaddi_0,    &tms3203x_device::mpyaddi_0,    &tms3203x_device::mpyaddi_0,    &tms3203x_device::mpyaddi_0,
6649		&tms3203x_device::mpyaddi_1,    &tms3203x_device::mpyaddi_1,    &tms3203x_device::mpyaddi_1,    &tms3203x_device::mpyaddi_1,
6650		&tms3203x_device::mpyaddi_1,    &tms3203x_device::mpyaddi_1,    &tms3203x_device::mpyaddi_1,    &tms3203x_device::mpyaddi_1,
6651		&tms3203x_device::mpyaddi_2,    &tms3203x_device::mpyaddi_2,    &tms3203x_device::mpyaddi_2,    &tms3203x_device::mpyaddi_2,
6652		&tms3203x_device::mpyaddi_2,    &tms3203x_device::mpyaddi_2,    &tms3203x_device::mpyaddi_2,    &tms3203x_device::mpyaddi_2,
6653		&tms3203x_device::mpyaddi_3,    &tms3203x_device::mpyaddi_3,    &tms3203x_device::mpyaddi_3,    &tms3203x_device::mpyaddi_3,
6654		&tms3203x_device::mpyaddi_3,    &tms3203x_device::mpyaddi_3,    &tms3203x_device::mpyaddi_3,    &tms3203x_device::mpyaddi_3,
6655		&tms3203x_device::mpysubi_0,    &tms3203x_device::mpysubi_0,    &tms3203x_device::mpysubi_0,    &tms3203x_device::mpysubi_0,    // 0x118
6656		&tms3203x_device::mpysubi_0,    &tms3203x_device::mpysubi_0,    &tms3203x_device::mpysubi_0,    &tms3203x_device::mpysubi_0,
6657		&tms3203x_device::mpysubi_1,    &tms3203x_device::mpysubi_1,    &tms3203x_device::mpysubi_1,    &tms3203x_device::mpysubi_1,
6658		&tms3203x_device::mpysubi_1,    &tms3203x_device::mpysubi_1,    &tms3203x_device::mpysubi_1,    &tms3203x_device::mpysubi_1,
6659		&tms3203x_device::mpysubi_2,    &tms3203x_device::mpysubi_2,    &tms3203x_device::mpysubi_2,    &tms3203x_device::mpysubi_2,
6660		&tms3203x_device::mpysubi_2,    &tms3203x_device::mpysubi_2,    &tms3203x_device::mpysubi_2,    &tms3203x_device::mpysubi_2,
6661		&tms3203x_device::mpysubi_3,    &tms3203x_device::mpysubi_3,    &tms3203x_device::mpysubi_3,    &tms3203x_device::mpysubi_3,
6662		&tms3203x_device::mpysubi_3,    &tms3203x_device::mpysubi_3,    &tms3203x_device::mpysubi_3,    &tms3203x_device::mpysubi_3,
6663		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x120
6664		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6665		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6666		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6667		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6668		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6669		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6670		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6671		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x128
6672		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6673		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6674		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6675		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6676		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6677		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6678		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6679		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x130
6680		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6681		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6682		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6683		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6684		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6685		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6686		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6687		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x138
6688		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6689		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6690		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6691		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6692		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6693		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6694		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6695
6696		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x140
6697		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6698		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6699		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6700		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6701		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6702		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6703		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6704		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x148
6705		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6706		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6707		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6708		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6709		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6710		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6711		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6712		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x150
6713		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6714		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6715		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6716		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6717		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6718		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6719		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6720		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x158
6721		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6722		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6723		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6724		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6725		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6726		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6727		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6728		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x160
6729		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6730		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6731		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6732		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6733		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6734		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6735		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6736		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x168
6737		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6738		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6739		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6740		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6741		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6742		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6743		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6744		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x170
6745		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6746		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6747		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6748		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6749		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6750		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6751		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6752		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x178
6753		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6754		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6755		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6756		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6757		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6758		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6759		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6760
6761		&tms3203x_device::stfstf,       &tms3203x_device::stfstf,       &tms3203x_device::stfstf,       &tms3203x_device::stfstf,       // 0x180
6762		&tms3203x_device::stfstf,       &tms3203x_device::stfstf,       &tms3203x_device::stfstf,       &tms3203x_device::stfstf,
6763		&tms3203x_device::stfstf,       &tms3203x_device::stfstf,       &tms3203x_device::stfstf,       &tms3203x_device::stfstf,
6764		&tms3203x_device::stfstf,       &tms3203x_device::stfstf,       &tms3203x_device::stfstf,       &tms3203x_device::stfstf,
6765		&tms3203x_device::stisti,       &tms3203x_device::stisti,       &tms3203x_device::stisti,       &tms3203x_device::stisti,
6766		&tms3203x_device::stisti,       &tms3203x_device::stisti,       &tms3203x_device::stisti,       &tms3203x_device::stisti,
6767		&tms3203x_device::stisti,       &tms3203x_device::stisti,       &tms3203x_device::stisti,       &tms3203x_device::stisti,
6768		&tms3203x_device::stisti,       &tms3203x_device::stisti,       &tms3203x_device::stisti,       &tms3203x_device::stisti,
6769		&tms3203x_device::ldfldf,       &tms3203x_device::ldfldf,       &tms3203x_device::ldfldf,       &tms3203x_device::ldfldf,       // 0x188
6770		&tms3203x_device::ldfldf,       &tms3203x_device::ldfldf,       &tms3203x_device::ldfldf,       &tms3203x_device::ldfldf,
6771		&tms3203x_device::ldfldf,       &tms3203x_device::ldfldf,       &tms3203x_device::ldfldf,       &tms3203x_device::ldfldf,
6772		&tms3203x_device::ldfldf,       &tms3203x_device::ldfldf,       &tms3203x_device::ldfldf,       &tms3203x_device::ldfldf,
6773		&tms3203x_device::ldildi,       &tms3203x_device::ldildi,       &tms3203x_device::ldildi,       &tms3203x_device::ldildi,
6774		&tms3203x_device::ldildi,       &tms3203x_device::ldildi,       &tms3203x_device::ldildi,       &tms3203x_device::ldildi,
6775		&tms3203x_device::ldildi,       &tms3203x_device::ldildi,       &tms3203x_device::ldildi,       &tms3203x_device::ldildi,
6776		&tms3203x_device::ldildi,       &tms3203x_device::ldildi,       &tms3203x_device::ldildi,       &tms3203x_device::ldildi,
6777		&tms3203x_device::absfstf,      &tms3203x_device::absfstf,      &tms3203x_device::absfstf,      &tms3203x_device::absfstf,      // 0x190
6778		&tms3203x_device::absfstf,      &tms3203x_device::absfstf,      &tms3203x_device::absfstf,      &tms3203x_device::absfstf,
6779		&tms3203x_device::absfstf,      &tms3203x_device::absfstf,      &tms3203x_device::absfstf,      &tms3203x_device::absfstf,
6780		&tms3203x_device::absfstf,      &tms3203x_device::absfstf,      &tms3203x_device::absfstf,      &tms3203x_device::absfstf,
6781		&tms3203x_device::absisti,      &tms3203x_device::absisti,      &tms3203x_device::absisti,      &tms3203x_device::absisti,
6782		&tms3203x_device::absisti,      &tms3203x_device::absisti,      &tms3203x_device::absisti,      &tms3203x_device::absisti,
6783		&tms3203x_device::absisti,      &tms3203x_device::absisti,      &tms3203x_device::absisti,      &tms3203x_device::absisti,
6784		&tms3203x_device::absisti,      &tms3203x_device::absisti,      &tms3203x_device::absisti,      &tms3203x_device::absisti,
6785		&tms3203x_device::addf3stf,     &tms3203x_device::addf3stf,     &tms3203x_device::addf3stf,     &tms3203x_device::addf3stf,     // 0x198
6786		&tms3203x_device::addf3stf,     &tms3203x_device::addf3stf,     &tms3203x_device::addf3stf,     &tms3203x_device::addf3stf,
6787		&tms3203x_device::addf3stf,     &tms3203x_device::addf3stf,     &tms3203x_device::addf3stf,     &tms3203x_device::addf3stf,
6788		&tms3203x_device::addf3stf,     &tms3203x_device::addf3stf,     &tms3203x_device::addf3stf,     &tms3203x_device::addf3stf,
6789		&tms3203x_device::addi3sti,     &tms3203x_device::addi3sti,     &tms3203x_device::addi3sti,     &tms3203x_device::addi3sti,
6790		&tms3203x_device::addi3sti,     &tms3203x_device::addi3sti,     &tms3203x_device::addi3sti,     &tms3203x_device::addi3sti,
6791		&tms3203x_device::addi3sti,     &tms3203x_device::addi3sti,     &tms3203x_device::addi3sti,     &tms3203x_device::addi3sti,
6792		&tms3203x_device::addi3sti,     &tms3203x_device::addi3sti,     &tms3203x_device::addi3sti,     &tms3203x_device::addi3sti,
6793		&tms3203x_device::and3sti,      &tms3203x_device::and3sti,      &tms3203x_device::and3sti,      &tms3203x_device::and3sti,      // 0x1a0
6794		&tms3203x_device::and3sti,      &tms3203x_device::and3sti,      &tms3203x_device::and3sti,      &tms3203x_device::and3sti,
6795		&tms3203x_device::and3sti,      &tms3203x_device::and3sti,      &tms3203x_device::and3sti,      &tms3203x_device::and3sti,
6796		&tms3203x_device::and3sti,      &tms3203x_device::and3sti,      &tms3203x_device::and3sti,      &tms3203x_device::and3sti,
6797		&tms3203x_device::ash3sti,      &tms3203x_device::ash3sti,      &tms3203x_device::ash3sti,      &tms3203x_device::ash3sti,
6798		&tms3203x_device::ash3sti,      &tms3203x_device::ash3sti,      &tms3203x_device::ash3sti,      &tms3203x_device::ash3sti,
6799		&tms3203x_device::ash3sti,      &tms3203x_device::ash3sti,      &tms3203x_device::ash3sti,      &tms3203x_device::ash3sti,
6800		&tms3203x_device::ash3sti,      &tms3203x_device::ash3sti,      &tms3203x_device::ash3sti,      &tms3203x_device::ash3sti,
6801		&tms3203x_device::fixsti,       &tms3203x_device::fixsti,       &tms3203x_device::fixsti,       &tms3203x_device::fixsti,       // 0x1a8
6802		&tms3203x_device::fixsti,       &tms3203x_device::fixsti,       &tms3203x_device::fixsti,       &tms3203x_device::fixsti,
6803		&tms3203x_device::fixsti,       &tms3203x_device::fixsti,       &tms3203x_device::fixsti,       &tms3203x_device::fixsti,
6804		&tms3203x_device::fixsti,       &tms3203x_device::fixsti,       &tms3203x_device::fixsti,       &tms3203x_device::fixsti,
6805		&tms3203x_device::floatstf,     &tms3203x_device::floatstf,     &tms3203x_device::floatstf,     &tms3203x_device::floatstf,
6806		&tms3203x_device::floatstf,     &tms3203x_device::floatstf,     &tms3203x_device::floatstf,     &tms3203x_device::floatstf,
6807		&tms3203x_device::floatstf,     &tms3203x_device::floatstf,     &tms3203x_device::floatstf,     &tms3203x_device::floatstf,
6808		&tms3203x_device::floatstf,     &tms3203x_device::floatstf,     &tms3203x_device::floatstf,     &tms3203x_device::floatstf,
6809		&tms3203x_device::ldfstf,       &tms3203x_device::ldfstf,       &tms3203x_device::ldfstf,       &tms3203x_device::ldfstf,       // 0x1b0
6810		&tms3203x_device::ldfstf,       &tms3203x_device::ldfstf,       &tms3203x_device::ldfstf,       &tms3203x_device::ldfstf,
6811		&tms3203x_device::ldfstf,       &tms3203x_device::ldfstf,       &tms3203x_device::ldfstf,       &tms3203x_device::ldfstf,
6812		&tms3203x_device::ldfstf,       &tms3203x_device::ldfstf,       &tms3203x_device::ldfstf,       &tms3203x_device::ldfstf,
6813		&tms3203x_device::ldisti,       &tms3203x_device::ldisti,       &tms3203x_device::ldisti,       &tms3203x_device::ldisti,
6814		&tms3203x_device::ldisti,       &tms3203x_device::ldisti,       &tms3203x_device::ldisti,       &tms3203x_device::ldisti,
6815		&tms3203x_device::ldisti,       &tms3203x_device::ldisti,       &tms3203x_device::ldisti,       &tms3203x_device::ldisti,
6816		&tms3203x_device::ldisti,       &tms3203x_device::ldisti,       &tms3203x_device::ldisti,       &tms3203x_device::ldisti,
6817		&tms3203x_device::lsh3sti,      &tms3203x_device::lsh3sti,      &tms3203x_device::lsh3sti,      &tms3203x_device::lsh3sti,      // 0x1b8
6818		&tms3203x_device::lsh3sti,      &tms3203x_device::lsh3sti,      &tms3203x_device::lsh3sti,      &tms3203x_device::lsh3sti,
6819		&tms3203x_device::lsh3sti,      &tms3203x_device::lsh3sti,      &tms3203x_device::lsh3sti,      &tms3203x_device::lsh3sti,
6820		&tms3203x_device::lsh3sti,      &tms3203x_device::lsh3sti,      &tms3203x_device::lsh3sti,      &tms3203x_device::lsh3sti,
6821		&tms3203x_device::mpyf3stf,     &tms3203x_device::mpyf3stf,     &tms3203x_device::mpyf3stf,     &tms3203x_device::mpyf3stf,
6822		&tms3203x_device::mpyf3stf,     &tms3203x_device::mpyf3stf,     &tms3203x_device::mpyf3stf,     &tms3203x_device::mpyf3stf,
6823		&tms3203x_device::mpyf3stf,     &tms3203x_device::mpyf3stf,     &tms3203x_device::mpyf3stf,     &tms3203x_device::mpyf3stf,
6824		&tms3203x_device::mpyf3stf,     &tms3203x_device::mpyf3stf,     &tms3203x_device::mpyf3stf,     &tms3203x_device::mpyf3stf,
6825
6826		&tms3203x_device::mpyi3sti,     &tms3203x_device::mpyi3sti,     &tms3203x_device::mpyi3sti,     &tms3203x_device::mpyi3sti,     // 0x1c0
6827		&tms3203x_device::mpyi3sti,     &tms3203x_device::mpyi3sti,     &tms3203x_device::mpyi3sti,     &tms3203x_device::mpyi3sti,
6828		&tms3203x_device::mpyi3sti,     &tms3203x_device::mpyi3sti,     &tms3203x_device::mpyi3sti,     &tms3203x_device::mpyi3sti,
6829		&tms3203x_device::mpyi3sti,     &tms3203x_device::mpyi3sti,     &tms3203x_device::mpyi3sti,     &tms3203x_device::mpyi3sti,
6830		&tms3203x_device::negfstf,      &tms3203x_device::negfstf,      &tms3203x_device::negfstf,      &tms3203x_device::negfstf,
6831		&tms3203x_device::negfstf,      &tms3203x_device::negfstf,      &tms3203x_device::negfstf,      &tms3203x_device::negfstf,
6832		&tms3203x_device::negfstf,      &tms3203x_device::negfstf,      &tms3203x_device::negfstf,      &tms3203x_device::negfstf,
6833		&tms3203x_device::negfstf,      &tms3203x_device::negfstf,      &tms3203x_device::negfstf,      &tms3203x_device::negfstf,
6834		&tms3203x_device::negisti,      &tms3203x_device::negisti,      &tms3203x_device::negisti,      &tms3203x_device::negisti,      // 0x1c8
6835		&tms3203x_device::negisti,      &tms3203x_device::negisti,      &tms3203x_device::negisti,      &tms3203x_device::negisti,
6836		&tms3203x_device::negisti,      &tms3203x_device::negisti,      &tms3203x_device::negisti,      &tms3203x_device::negisti,
6837		&tms3203x_device::negisti,      &tms3203x_device::negisti,      &tms3203x_device::negisti,      &tms3203x_device::negisti,
6838		&tms3203x_device::notsti,       &tms3203x_device::notsti,       &tms3203x_device::notsti,       &tms3203x_device::notsti,
6839		&tms3203x_device::notsti,       &tms3203x_device::notsti,       &tms3203x_device::notsti,       &tms3203x_device::notsti,
6840		&tms3203x_device::notsti,       &tms3203x_device::notsti,       &tms3203x_device::notsti,       &tms3203x_device::notsti,
6841		&tms3203x_device::notsti,       &tms3203x_device::notsti,       &tms3203x_device::notsti,       &tms3203x_device::notsti,
6842		&tms3203x_device::or3sti,       &tms3203x_device::or3sti,       &tms3203x_device::or3sti,       &tms3203x_device::or3sti,       // 0x1d0
6843		&tms3203x_device::or3sti,       &tms3203x_device::or3sti,       &tms3203x_device::or3sti,       &tms3203x_device::or3sti,
6844		&tms3203x_device::or3sti,       &tms3203x_device::or3sti,       &tms3203x_device::or3sti,       &tms3203x_device::or3sti,
6845		&tms3203x_device::or3sti,       &tms3203x_device::or3sti,       &tms3203x_device::or3sti,       &tms3203x_device::or3sti,
6846		&tms3203x_device::subf3stf,     &tms3203x_device::subf3stf,     &tms3203x_device::subf3stf,     &tms3203x_device::subf3stf,
6847		&tms3203x_device::subf3stf,     &tms3203x_device::subf3stf,     &tms3203x_device::subf3stf,     &tms3203x_device::subf3stf,
6848		&tms3203x_device::subf3stf,     &tms3203x_device::subf3stf,     &tms3203x_device::subf3stf,     &tms3203x_device::subf3stf,
6849		&tms3203x_device::subf3stf,     &tms3203x_device::subf3stf,     &tms3203x_device::subf3stf,     &tms3203x_device::subf3stf,
6850		&tms3203x_device::subi3sti,     &tms3203x_device::subi3sti,     &tms3203x_device::subi3sti,     &tms3203x_device::subi3sti,     // 0x1d8
6851		&tms3203x_device::subi3sti,     &tms3203x_device::subi3sti,     &tms3203x_device::subi3sti,     &tms3203x_device::subi3sti,
6852		&tms3203x_device::subi3sti,     &tms3203x_device::subi3sti,     &tms3203x_device::subi3sti,     &tms3203x_device::subi3sti,
6853		&tms3203x_device::subi3sti,     &tms3203x_device::subi3sti,     &tms3203x_device::subi3sti,     &tms3203x_device::subi3sti,
6854		&tms3203x_device::xor3sti,      &tms3203x_device::xor3sti,      &tms3203x_device::xor3sti,      &tms3203x_device::xor3sti,
6855		&tms3203x_device::xor3sti,      &tms3203x_device::xor3sti,      &tms3203x_device::xor3sti,      &tms3203x_device::xor3sti,
6856		&tms3203x_device::xor3sti,      &tms3203x_device::xor3sti,      &tms3203x_device::xor3sti,      &tms3203x_device::xor3sti,
6857		&tms3203x_device::xor3sti,      &tms3203x_device::xor3sti,      &tms3203x_device::xor3sti,      &tms3203x_device::xor3sti,
6858		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x1e0
6859		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6860		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6861		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6862		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6863		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6864		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6865		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6866		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x1e8
6867		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6868		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6869		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6870		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6871		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6872		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6873		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6874		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x1f0
6875		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6876		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6877		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6878		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6879		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6880		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6881		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6882		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x1f8
6883		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6884		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6885		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6886		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6887		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6888		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
6889		&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal
6890		};

trunk/src/devices/cpu/tms32031/32031ops.inc

r0	r250252
	1	// license:BSD-3-Clause
	2	// copyright-holders:Aaron Giles
	3	/***************************************************************************
	4
	5	32031ops.cpp
	6
	7	TMS32031/2 emulator
	8
	9	***************************************************************************/
	10
	11
	12	//**************************************************************************
	13	//  COMPILE-TIME OPTIONS
	14	//**************************************************************************
	15
	16	#define USE_FP              0
	17
	18
	19
	20	//**************************************************************************
	21	//  MACROS
	22	//**************************************************************************
	23
	24	#define IREG(rnum)          (m_r[rnum].i32[0])
	25	#define FREGEXP(rnum)       (m_r[rnum].exponent())
	26	#define FREGMAN(rnum)       (m_r[rnum].mantissa())
	27
	28	#define FP2LONG(rnum)       ((FREGEXP(rnum) << 24) | ((UINT32)FREGMAN(rnum) >> 8))
	29	#define LONG2FP(rnum,v)     do { m_r[rnum].set_mantissa((v) << 8); m_r[rnum].set_exponent((INT32)(v) >> 24); } while (0)
	30	#define SHORT2FP(rnum,v)    do { \
	31	if ((UINT16)(v) == 0x8000) { m_r[rnum].set_mantissa(0); m_r[rnum].set_exponent(-128); } \
	32	else { m_r[rnum].set_mantissa((v) << 20); m_r[rnum].set_exponent((INT16)(v) >> 12); } \
	33	} while (0)
	34
	35	#define DIRECT(op)              (((IREG(TMR_DP) & 0xff) << 16) | ((UINT16)op))
	36	#define INDIRECT_D(op,o)        ((this->*s_indirect_d[((o) >> 3) & 31])(op,o))
	37	#define INDIRECT_1(op,o)        ((this->*s_indirect_1[((o) >> 3) & 31])(op,o))
	38	#define INDIRECT_1_DEF(op,o)    ((this->*s_indirect_1_def[((o) >> 3) & 31])(op,o,defptr))
	39
	40	#define SIGN(val)           ((val) & 0x80000000)
	41
	42	#define OVERFLOW_SUB(a,b,r) ((INT32)(((a) ^ (b)) & ((a) ^ (r))) < 0)
	43	#define OVERFLOW_ADD(a,b,r) ((INT32)(((a) ^ (r)) & ((b) ^ (r))) < 0)
	44
	45	#define CLR_FLAGS(f)        do { IREG(TMR_ST) &= ~(f); } while (0)
	46	#define CLR_NVUF()          CLR_FLAGS(NFLAG | VFLAG | UFFLAG)
	47	#define CLR_NZVUF()         CLR_FLAGS(NFLAG | ZFLAG | VFLAG | UFFLAG)
	48	#define CLR_NZCVUF()        CLR_FLAGS(NFLAG | ZFLAG | VFLAG | CFLAG | UFFLAG)
	49
	50	#define OR_C(flag)          do { IREG(TMR_ST) |= flag & CFLAG; } while (0)
	51	#define OR_NZ(val)          do { IREG(TMR_ST) |= (((val) >> 28) & NFLAG) | (((val) == 0) << 2); } while (0)
	52	#define OR_NZF(reg)         do { IREG(TMR_ST) |= ((reg.mantissa() >> 28) & NFLAG) | ((reg.exponent() == -128) << 2); } while (0)
	53	#define OR_NUF(reg)         do { int temp = (reg.exponent() == -128) << 4; IREG(TMR_ST) |= ((reg.mantissa() >> 28) & NFLAG) | (temp) | (temp << 2); } while (0)
	54	#define OR_V_SUB(a,b,r)     do { UINT32 temp = ((((a) ^ (b)) & ((a) ^ (r))) >> 30) & VFLAG; IREG(TMR_ST) |= temp | (temp << 4); } while (0)
	55	#define OR_V_ADD(a,b,r)     do { UINT32 temp = ((((a) ^ (r)) & ((b) ^ (r))) >> 30) & VFLAG; IREG(TMR_ST) |= temp | (temp << 4); } while (0)
	56	#define OR_C_SUB(a,b,r)     do { IREG(TMR_ST) |= ((UINT32)(b) > (UINT32)(a)); } while (0)
	57	#define OR_C_ADD(a,b,r)     do { IREG(TMR_ST) |= ((UINT32)(a) > (UINT32)(r)); } while (0)
	58	#define OR_C_SBB(a,b,c)     do { INT64 temp = (INT64)(a) - (UINT32)(b) - (UINT32)(c); IREG(TMR_ST) |= (temp < 0); } while (0)
	59	#define OR_C_ADC(a,b,c)     do { UINT64 temp = (UINT64)(a) + (UINT32)(b) + (UINT32)(c); IREG(TMR_ST) |= (temp > 0xffffffff); } while (0)
	60
	61	#define OVM()               (IREG(TMR_ST) & OVMFLAG)
	62
	63	#define DECLARE_DEF         UINT32 defval; UINT32 *defptr = &defval
	64	#define UPDATE_DEF()        *defptr = defval
	65
	66
	67
	68	//**************************************************************************
	69	//  IMPLEMENTATION
	70	//**************************************************************************
	71
	72	void tms3203x_device::illegal(UINT32 op)
	73	{
	74	if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
	75	{
	76	logerror("Illegal op @ %06X: %08X (tbl=%03X)\n", m_pc - 1, op, op >> 21);
	77	debugger_break(machine());
	78	}
	79	}
	80
	81
	82	void tms3203x_device::unimplemented(UINT32 op)
	83	{
	84	fatalerror("Unimplemented op @ %06X: %08X (tbl=%03X)\n", m_pc - 1, op, op >> 21);
	85	}
	86
	87
	88	inline void tms3203x_device::execute_one()
	89	{
	90	UINT32 op = ROPCODE(m_pc);
	91	m_icount -= 2;  // 2 clocks per cycle
	92	m_pc++;
	93	#if (TMS_3203X_LOG_OPCODE_USAGE)
	94	m_hits[op >> 21]++;
	95	#endif
	96	(this->*s_tms32031ops[op >> 21])(op);
	97	}
	98
	99
	100	void tms3203x_device::update_special(int dreg)
	101	{
	102	if (dreg == TMR_BK)
	103	{
	104	UINT32 temp = IREG(TMR_BK);
	105	m_bkmask = temp;
	106	while (temp >>= 1)
	107	m_bkmask |= temp;
	108	}
	109	else if (dreg == TMR_IOF)
	110	{
	111	if (IREG(TMR_IOF) & 0x002)
	112	m_xf0_cb((offs_t)0, (IREG(TMR_IOF) >> 2) & 1);
	113	if (IREG(TMR_IOF) & 0x020)
	114	m_xf1_cb((offs_t)0, (IREG(TMR_IOF) >> 6) & 1);
	115	}
	116	else if (dreg == TMR_ST || dreg == TMR_IF || dreg == TMR_IE)
	117	check_irqs();
	118	}
	119
	120
	121
	122	//**************************************************************************
	123	//  CONDITION CODES
	124	//**************************************************************************
	125
	126	const UINT32 C_LO = 1 << 1;
	127	const UINT32 C_LS = 1 << 2;
	128	const UINT32 C_HI = 1 << 3;
	129	const UINT32 C_HS = 1 << 4;
	130	const UINT32 C_EQ = 1 << 5;
	131	const UINT32 C_NE = 1 << 6;
	132	const UINT32 C_LT = 1 << 7;
	133	const UINT32 C_LE = 1 << 8;
	134	const UINT32 C_GT = 1 << 9;
	135	const UINT32 C_GE = 1 << 10;
	136	const UINT32 C_NV = 1 << 12;
	137	const UINT32 C_V = 1 << 13;
	138	const UINT32 C_NUF = 1 << 14;
	139	const UINT32 C_UF = 1 << 15;
	140	const UINT32 C_NLV = 1 << 16;
	141	const UINT32 C_LV = 1 << 17;
	142	const UINT32 C_NLUF = 1 << 18;
	143	const UINT32 C_LUF = 1 << 19;
	144	const UINT32 C_ZUF = 1 << 20;
	145
	146	const UINT32 condition_table[0x80] =
	147	{
	148	/* ------- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_NLV | C_NLUF,
	149	/* ------C */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_NLV | C_NLUF,
	150	/* -----V- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V  | C_NUF | C_NLV | C_NLUF,
	151	/* -----VC */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V  | C_NUF | C_NLV | C_NLUF,
	152	/* ----Z-- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_NLV | C_NLUF | C_ZUF,
	153	/* ----Z-C */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_NLV | C_NLUF | C_ZUF,
	154	/* ----ZV- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V  | C_NUF | C_NLV | C_NLUF | C_ZUF,
	155	/* ----ZVC */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V  | C_NUF | C_NLV | C_NLUF | C_ZUF,
	156	/* ---N--- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_NLUF,
	157	/* ---N--C */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_NLUF,
	158	/* ---N-V- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V  | C_NUF | C_NLV | C_NLUF,
	159	/* ---N-VC */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V  | C_NUF | C_NLV | C_NLUF,
	160	/* ---NZ-- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_NLUF | C_ZUF,
	161	/* ---NZ-C */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_NLUF | C_ZUF,
	162	/* ---NZV- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V  | C_NUF | C_NLV | C_NLUF | C_ZUF,
	163	/* ---NZVC */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V  | C_NUF | C_NLV | C_NLUF | C_ZUF,
	164	/* --U---- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_UF  | C_NLV | C_NLUF | C_ZUF,
	165	/* --U---C */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_UF  | C_NLV | C_NLUF | C_ZUF,
	166	/* --U--V- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V  | C_UF  | C_NLV | C_NLUF | C_ZUF,
	167	/* --U--VC */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V  | C_UF  | C_NLV | C_NLUF | C_ZUF,
	168	/* --U-Z-- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_UF  | C_NLV | C_NLUF | C_ZUF,
	169	/* --U-Z-C */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_UF  | C_NLV | C_NLUF | C_ZUF,
	170	/* --U-ZV- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V  | C_UF  | C_NLV | C_NLUF | C_ZUF,
	171	/* --U-ZVC */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V  | C_UF  | C_NLV | C_NLUF | C_ZUF,
	172	/* --UN--- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_UF  | C_NLV | C_NLUF | C_ZUF,
	173	/* --UN--C */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_UF  | C_NLV | C_NLUF | C_ZUF,
	174	/* --UN-V- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V  | C_UF  | C_NLV | C_NLUF | C_ZUF,
	175	/* --UN-VC */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V  | C_UF  | C_NLV | C_NLUF | C_ZUF,
	176	/* --UNZ-- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_UF  | C_NLV | C_NLUF | C_ZUF,
	177	/* --UNZ-C */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_UF  | C_NLV | C_NLUF | C_ZUF,
	178	/* --UNZV- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V  | C_UF  | C_NLV | C_NLUF | C_ZUF,
	179	/* --UNZVC */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V  | C_UF  | C_NLV | C_NLUF | C_ZUF,
	180	/* -v----- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_LV  | C_NLUF,
	181	/* -v----C */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_LV  | C_NLUF,
	182	/* -v---V- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V  | C_NUF | C_LV  | C_NLUF,
	183	/* -v---VC */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V  | C_NUF | C_LV  | C_NLUF,
	184	/* -v--Z-- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_LV  | C_NLUF | C_ZUF,
	185	/* -v--Z-C */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_LV  | C_NLUF | C_ZUF,
	186	/* -v--ZV- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V  | C_NUF | C_LV  | C_NLUF | C_ZUF,
	187	/* -v--ZVC */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V  | C_NUF | C_LV  | C_NLUF | C_ZUF,
	188	/* -v-N--- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_LV  | C_NLUF,
	189	/* -v-N--C */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_LV  | C_NLUF,
	190	/* -v-N-V- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V  | C_NUF | C_LV  | C_NLUF,
	191	/* -v-N-VC */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V  | C_NUF | C_LV  | C_NLUF,
	192	/* -v-NZ-- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_LV  | C_NLUF | C_ZUF,
	193	/* -v-NZ-C */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_LV  | C_NLUF | C_ZUF,
	194	/* -v-NZV- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V  | C_NUF | C_LV  | C_NLUF | C_ZUF,
	195	/* -v-NZVC */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V  | C_NUF | C_LV  | C_NLUF | C_ZUF,
	196	/* -vU---- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_UF  | C_LV  | C_NLUF | C_ZUF,
	197	/* -vU---C */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_UF  | C_LV  | C_NLUF | C_ZUF,
	198	/* -vU--V- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V  | C_UF  | C_LV  | C_NLUF | C_ZUF,
	199	/* -vU--VC */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V  | C_UF  | C_LV  | C_NLUF | C_ZUF,
	200	/* -vU-Z-- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_UF  | C_LV  | C_NLUF | C_ZUF,
	201	/* -vU-Z-C */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_UF  | C_LV  | C_NLUF | C_ZUF,
	202	/* -vU-ZV- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V  | C_UF  | C_LV  | C_NLUF | C_ZUF,
	203	/* -vU-ZVC */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V  | C_UF  | C_LV  | C_NLUF | C_ZUF,
	204	/* -vUN--- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_UF  | C_LV  | C_NLUF | C_ZUF,
	205	/* -vUN--C */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_UF  | C_LV  | C_NLUF | C_ZUF,
	206	/* -vUN-V- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V  | C_UF  | C_LV  | C_NLUF | C_ZUF,
	207	/* -vUN-VC */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V  | C_UF  | C_LV  | C_NLUF | C_ZUF,
	208	/* -vUNZ-- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_UF  | C_LV  | C_NLUF | C_ZUF,
	209	/* -vUNZ-C */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_UF  | C_LV  | C_NLUF | C_ZUF,
	210	/* -vUNZV- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V  | C_UF  | C_LV  | C_NLUF | C_ZUF,
	211	/* -vUNZVC */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V  | C_UF  | C_LV  | C_NLUF | C_ZUF,
	212	/* u------ */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_NLV | C_LUF,
	213	/* u-----C */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_NLV | C_LUF,
	214	/* u----V- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V  | C_NUF | C_NLV | C_LUF,
	215	/* u----VC */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V  | C_NUF | C_NLV | C_LUF,
	216	/* u---Z-- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_NLV | C_LUF  | C_ZUF,
	217	/* u---Z-C */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_NLV | C_LUF  | C_ZUF,
	218	/* u---ZV- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V  | C_NUF | C_NLV | C_LUF  | C_ZUF,
	219	/* u---ZVC */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V  | C_NUF | C_NLV | C_LUF  | C_ZUF,
	220	/* u--N--- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_LUF,
	221	/* u--N--C */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_LUF,
	222	/* u--N-V- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V  | C_NUF | C_NLV | C_LUF,
	223	/* u--N-VC */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V  | C_NUF | C_NLV | C_LUF,
	224	/* u--NZ-- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_LUF  | C_ZUF,
	225	/* u--NZ-C */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_LUF  | C_ZUF,
	226	/* u--NZV- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V  | C_NUF | C_NLV | C_LUF  | C_ZUF,
	227	/* u--NZVC */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V  | C_NUF | C_NLV | C_LUF  | C_ZUF,
	228	/* u-U---- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_UF  | C_NLV | C_LUF  | C_ZUF,
	229	/* u-U---C */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_UF  | C_NLV | C_LUF  | C_ZUF,
	230	/* u-U--V- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V  | C_UF  | C_NLV | C_LUF  | C_ZUF,
	231	/* u-U--VC */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V  | C_UF  | C_NLV | C_LUF  | C_ZUF,
	232	/* u-U-Z-- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_UF  | C_NLV | C_LUF  | C_ZUF,
	233	/* u-U-Z-C */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_UF  | C_NLV | C_LUF  | C_ZUF,
	234	/* u-U-ZV- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V  | C_UF  | C_NLV | C_LUF  | C_ZUF,
	235	/* u-U-ZVC */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V  | C_UF  | C_NLV | C_LUF  | C_ZUF,
	236	/* u-UN--- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_UF  | C_NLV | C_LUF  | C_ZUF,
	237	/* u-UN--C */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_UF  | C_NLV | C_LUF  | C_ZUF,
	238	/* u-UN-V- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V  | C_UF  | C_NLV | C_LUF  | C_ZUF,
	239	/* u-UN-VC */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V  | C_UF  | C_NLV | C_LUF  | C_ZUF,
	240	/* u-UNZ-- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_UF  | C_NLV | C_LUF  | C_ZUF,
	241	/* u-UNZ-C */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_UF  | C_NLV | C_LUF  | C_ZUF,
	242	/* u-UNZV- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V  | C_UF  | C_NLV | C_LUF  | C_ZUF,
	243	/* u-UNZVC */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V  | C_UF  | C_NLV | C_LUF  | C_ZUF,
	244	/* uv----- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_LV  | C_LUF,
	245	/* uv----C */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_LV  | C_LUF,
	246	/* uv---V- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V  | C_NUF | C_LV  | C_LUF,
	247	/* uv---VC */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V  | C_NUF | C_LV  | C_LUF,
	248	/* uv--Z-- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_LV  | C_LUF  | C_ZUF,
	249	/* uv--Z-C */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_LV  | C_LUF  | C_ZUF,
	250	/* uv--ZV- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V  | C_NUF | C_LV  | C_LUF  | C_ZUF,
	251	/* uv--ZVC */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V  | C_NUF | C_LV  | C_LUF  | C_ZUF,
	252	/* uv-N--- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_LV  | C_LUF,
	253	/* uv-N--C */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_LV  | C_LUF,
	254	/* uv-N-V- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V  | C_NUF | C_LV  | C_LUF,
	255	/* uv-N-VC */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V  | C_NUF | C_LV  | C_LUF,
	256	/* uv-NZ-- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_LV  | C_LUF  | C_ZUF,
	257	/* uv-NZ-C */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_LV  | C_LUF  | C_ZUF,
	258	/* uv-NZV- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V  | C_NUF | C_LV  | C_LUF  | C_ZUF,
	259	/* uv-NZVC */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V  | C_NUF | C_LV  | C_LUF  | C_ZUF,
	260	/* uvU---- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_UF  | C_LV  | C_LUF  | C_ZUF,
	261	/* uvU---C */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_UF  | C_LV  | C_LUF  | C_ZUF,
	262	/* uvU--V- */   1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V  | C_UF  | C_LV  | C_LUF  | C_ZUF,
	263	/* uvU--VC */   1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V  | C_UF  | C_LV  | C_LUF  | C_ZUF,
	264	/* uvU-Z-- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_UF  | C_LV  | C_LUF  | C_ZUF,
	265	/* uvU-Z-C */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_UF  | C_LV  | C_LUF  | C_ZUF,
	266	/* uvU-ZV- */   1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V  | C_UF  | C_LV  | C_LUF  | C_ZUF,
	267	/* uvU-ZVC */   1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V  | C_UF  | C_LV  | C_LUF  | C_ZUF,
	268	/* uvUN--- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_UF  | C_LV  | C_LUF  | C_ZUF,
	269	/* uvUN--C */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_UF  | C_LV  | C_LUF  | C_ZUF,
	270	/* uvUN-V- */   1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V  | C_UF  | C_LV  | C_LUF  | C_ZUF,
	271	/* uvUN-VC */   1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V  | C_UF  | C_LV  | C_LUF  | C_ZUF,
	272	/* uvUNZ-- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_UF  | C_LV  | C_LUF  | C_ZUF,
	273	/* uvUNZ-C */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_UF  | C_LV  | C_LUF  | C_ZUF,
	274	/* uvUNZV- */   1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V  | C_UF  | C_LV  | C_LUF  | C_ZUF,
	275	/* uvUNZVC */   1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V  | C_UF  | C_LV  | C_LUF  | C_ZUF,
	276	};
	277
	278	#define CONDITION_LO()      (IREG(TMR_ST) & CFLAG)
	279	#define CONDITION_LS()      (IREG(TMR_ST) & (CFLAG | ZFLAG))
	280	#define CONDITION_HI()      (!(IREG(TMR_ST) & (CFLAG | ZFLAG)))
	281	#define CONDITION_HS()      (!(IREG(TMR_ST) & CFLAG))
	282	#define CONDITION_EQ()      (IREG(TMR_ST) & ZFLAG)
	283	#define CONDITION_NE()      (!(IREG(TMR_ST) & ZFLAG))
	284	#define CONDITION_LT()      (IREG(TMR_ST) & NFLAG)
	285	#define CONDITION_LE()      (IREG(TMR_ST) & (NFLAG | ZFLAG))
	286	#define CONDITION_GT()      (!(IREG(TMR_ST) & (NFLAG | ZFLAG)))
	287	#define CONDITION_GE()      (!(IREG(TMR_ST) & NFLAG))
	288	#define CONDITION_NV()      (!(IREG(TMR_ST) & VFLAG))
	289	#define CONDITION_V()       (IREG(TMR_ST) & VFLAG)
	290	#define CONDITION_NUF()     (!(IREG(TMR_ST) & UFFLAG))
	291	#define CONDITION_UF()      (IREG(TMR_ST) & UFFLAG)
	292	#define CONDITION_NLV()     (!(IREG(TMR_ST) & LVFLAG))
	293	#define CONDITION_LV()      (IREG(TMR_ST) & LVFLAG)
	294	#define CONDITION_NLUF()    (!(IREG(TMR_ST) & LUFFLAG))
	295	#define CONDITION_LUF()     (IREG(TMR_ST) & LUFFLAG)
	296	#define CONDITION_ZUF()     (IREG(TMR_ST) & (UFFLAG | ZFLAG))
	297
	298	inline bool tms3203x_device::condition(int which)
	299	{
	300	return (condition_table[IREG(TMR_ST) & (LUFFLAG | LVFLAG | UFFLAG | NFLAG | ZFLAG | VFLAG | CFLAG)] >> (which & 31)) & 1;
	301	}
	302
	303
	304
	305	//**************************************************************************
	306	//  FLOATING POINT HELPERS
	307	//**************************************************************************
	308
	309	#if USE_FP
	310	void tms3203x_device::double_to_dsp_with_flags(double val, tmsreg &result)
	311	{
	312	int_double id;
	313	id.d = val;
	314
	315	CLR_NZVUF();
	316
	317	int mantissa = ((id.i[BYTE_XOR_BE(0)] & 0x000fffff) << 11) | ((id.i[BYTE_XOR_BE(1)] & 0xffe00000) >> 21);
	318	int exponent = ((id.i[BYTE_XOR_BE(0)] & 0x7ff00000) >> 20) - 1023;
	319	if (exponent <= -128)
	320	{
	321	result.set_mantissa(0);
	322	result.set_exponent(-128);
	323	IREG(TMR_ST) |= UFFLAG | LUFFLAG | ZFLAG;
	324	}
	325	else if (exponent > 127)
	326	{
	327	if ((INT32)id.i[BYTE_XOR_BE(0)] >= 0)
	328	result.set_mantissa(0x7fffffff);
	329	else
	330	{
	331	result.set_mantissa(0x80000001);
	332	IREG(TMR_ST) |= NFLAG;
	333	}
	334	result.set_exponent(127);
	335	IREG(TMR_ST) |= VFLAG | LVFLAG;
	336	}
	337	else if (val == 0)
	338	{
	339	result.set_mantissa(0);
	340	result.set_exponent(-128);
	341	IREG(TMR_ST) |= ZFLAG;
	342	}
	343	else if ((INT32)id.i[BYTE_XOR_BE(0)] >= 0)
	344	{
	345	result.set_mantissa(mantissa);
	346	result.set_exponent(exponent);
	347	}
	348	else if (mantissa != 0)
	349	{
	350	result.set_mantissa(0x80000000 | -mantissa);
	351	result.set_exponent(exponent);
	352	IREG(TMR_ST) |= NFLAG;
	353	}
	354	else
	355	{
	356	result.set_mantissa(0x80000000);
	357	result.set_exponent(exponent - 1);
	358	IREG(TMR_ST) |= NFLAG;
	359	}
	360	}
	361	#endif
	362
	363	// integer to floating point conversion
	364	#if USE_FP
	365	void tms3203x_device::int2float(tmsreg &srcdst)
	366	{
	367	double val = srcdst.mantissa();
	368	double_to_dsp_with_flags(val, srcdst);
	369	}
	370	#else
	371	void tms3203x_device::int2float(tmsreg &srcdst)
	372	{
	373	UINT32 man = srcdst.mantissa();
	374	int exp, cnt;
	375
	376	// never overflows or underflows
	377	CLR_NZVUF();
	378
	379	// 0 always has exponent of -128
	380	if (man == 0)
	381	{
	382	man = 0x80000000;
	383	exp = -128;
	384	}
	385
	386	// check for -1 here because count_leading_ones will infinite loop
	387	else if (man == (UINT32)-1)
	388	{
	389	man = 0;
	390	exp = -1;
	391	}
	392
	393	// positive values; count leading zeros and shift
	394	else if ((INT32)man > 0)
	395	{
	396	cnt = count_leading_zeros(man);
	397	man <<= cnt;
	398	exp = 31 - cnt;
	399	}
	400
	401	// negative values; count leading ones and shift
	402	else
	403	{
	404	cnt = count_leading_ones(man);
	405	man <<= cnt;
	406	exp = 31 - cnt;
	407	}
	408
	409	// set the final results and compute NZ
	410	srcdst.set_mantissa(man ^ 0x80000000);
	411	srcdst.set_exponent(exp);
	412	OR_NZF(srcdst);
	413	}
	414	#endif
	415
	416
	417	// floating point to integer conversion
	418	#if USE_FP
	419	void tms3203x_device::float2int(tmsreg &srcdst, int setflags)
	420	{
	421	INT32 val;
	422
	423	if (setflags) CLR_NZVUF();
	424	if (srcdst.exponent() > 30)
	425	{
	426	if ((INT32)srcdst.mantissa() >= 0)
	427	val = 0x7fffffff;
	428	else
	429	val = 0x80000000;
	430	if (setflags) IREG(TMR_ST) |= VFLAG | LVFLAG;
	431	}
	432	else
	433	val = floor(srcdst.as_double());
	434	srcdst.set_mantissa(val);
	435	if (setflags) OR_NZ(val);
	436	}
	437	#else
	438	void tms3203x_device::float2int(tmsreg &srcdst, bool setflags)
	439	{
	440	INT32 man = srcdst.mantissa();
	441	int shift = 31 - srcdst.exponent();
	442
	443	// never underflows
	444	if (setflags) CLR_NZVUF();
	445
	446	// if we've got too much to handle, overflow
	447	if (shift <= 0)
	448	{
	449	srcdst.set_mantissa((man >= 0) ? 0x7fffffff : 0x80000000);
	450	if (setflags) IREG(TMR_ST) |= VFLAG | LVFLAG;
	451	}
	452
	453	// if we're too small, go to 0 or -1
	454	else if (shift > 31)
	455	srcdst.set_mantissa(man >> 31);
	456
	457	// we're in the middle; shift it
	458	else
	459	srcdst.set_mantissa((man >> shift) ^ (1 << (31 - shift)));
	460
	461	// set the NZ flags
	462	if (setflags) OR_NZ(srcdst.mantissa());
	463	}
	464	#endif
	465
	466
	467	// compute the negative of a floating point value
	468	#if USE_FP
	469	void tms3203x_device::negf(tmsreg &dst, tmsreg tmsreg &src)
	470	{
	471	double val = -src.as_double();
	472	double_to_dsp_with_flags(val, dst);
	473	}
	474	#else
	475	void tms3203x_device::negf(tmsreg &dst, tmsreg &src)
	476	{
	477	INT32 man = src.mantissa();
	478
	479	CLR_NZVUF();
	480
	481	if (src.exponent() == -128)
	482	{
	483	dst.set_mantissa(0);
	484	dst.set_exponent(-128);
	485	}
	486	else if ((man & 0x7fffffff) != 0)
	487	{
	488	dst.set_mantissa(-man);
	489	dst.set_exponent(src.exponent());
	490	}
	491	else
	492	{
	493	dst.set_mantissa(man ^ 0x80000000);
	494	if (man == 0)
	495	dst.set_exponent(src.exponent() - 1);
	496	else
	497	dst.set_exponent(src.exponent() + 1);
	498	}
	499	OR_NZF(dst);
	500	}
	501	#endif
	502
	503
	504
	505	// add two floating point values
	506	#if USE_FP
	507	void tms3203x_device::addf(tmsreg &dst, tmsreg &src1, tmsreg &src2)
	508	{
	509	double val = src1.as_double() + src2.as_double();
	510	double_to_dsp_with_flags(val, dst);
	511	}
	512	#else
	513	void tms3203x_device::addf(tmsreg &dst, tmsreg &src1, tmsreg &src2)
	514	{
	515	INT64 man;
	516	INT64 m1, m2;
	517	int exp, cnt;
	518
	519	// reset over/underflow conditions
	520	CLR_NZVUF();
	521
	522	// first check for 0 operands
	523	if (src1.exponent() == -128)
	524	{
	525	dst = src2;
	526	OR_NZF(dst);
	527	return;
	528	}
	529	if (src2.exponent() == -128)
	530	{
	531	dst = src1;
	532	OR_NZF(dst);
	533	return;
	534	}
	535
	536	// extract mantissas from 1.0.31 values to 1.1.31 values
	537	m1 = (INT64)src1.mantissa() ^ 0x80000000;
	538	m2 = (INT64)src2.mantissa() ^ 0x80000000;
	539
	540	// normalize based on the exponent
	541	if (src1.exponent() > src2.exponent())
	542	{
	543	exp = src1.exponent();
	544	cnt = exp - src2.exponent();
	545	if (cnt >= 32)
	546	{
	547	dst = src1;
	548	OR_NZF(dst);
	549	return;
	550	}
	551	m2 >>= cnt;
	552	}
	553	else
	554	{
	555	exp = src2.exponent();
	556	cnt = exp - src1.exponent();
	557	if (cnt >= 32)
	558	{
	559	dst = src2;
	560	OR_NZF(dst);
	561	return;
	562	}
	563	m1 >>= cnt;
	564	}
	565
	566	// add
	567	man = m1 + m2;
	568
	569	// if the mantissa is zero, set the exponent appropriately
	570	if (man == 0 || exp == -128)
	571	{
	572	exp = -128;
	573	man = 0x80000000;
	574	}
	575
	576	// if the mantissa is >= 2.0 or < -2.0, normalize
	577	else if (man >= ((INT64)2 << 31) || man < ((INT64)-2 << 31))
	578	{
	579	man >>= 1;
	580	exp++;
	581	}
	582
	583	// if the mantissa is < 1.0 and > -1.0, normalize
	584	else if (man < ((INT64)1 << 31) && man >= ((INT64)-1 << 31))
	585	{
	586	if (man > 0)
	587	{
	588	cnt = count_leading_zeros((UINT32)man);
	589	man <<= cnt;
	590	exp -= cnt;
	591	}
	592	else
	593	{
	594	cnt = count_leading_ones((UINT32)man);
	595	man <<= cnt;
	596	exp -= cnt;
	597	}
	598	}
	599
	600	// check for underflow
	601	if (exp <= -128)
	602	{
	603	man = 0x80000000;
	604	exp = -128;
	605	IREG(TMR_ST) |= UFFLAG | LUFFLAG;
	606	}
	607
	608	// check for overflow
	609	else if (exp > 127)
	610	{
	611	man = (man < 0) ? 0x00000000 : 0xffffffff;
	612	exp = 127;
	613	IREG(TMR_ST) |= VFLAG | LVFLAG;
	614	}
	615
	616	// store the result back, removing the implicit one and putting
	617	// back the sign bit
	618	dst.set_mantissa((UINT32)man ^ 0x80000000);
	619	dst.set_exponent(exp);
	620	OR_NZF(dst);
	621	}
	622	#endif
	623
	624
	625	// subtract two floating point values
	626	#if USE_FP
	627	void tms3203x_device::subf(tmsreg &dst, tmsreg &src1, tmsreg &src2)
	628	{
	629	double val = src1.as_double() - src2.as_double();
	630	double_to_dsp_with_flags(val, dst);
	631	}
	632	#else
	633	void tms3203x_device::subf(tmsreg &dst, tmsreg &src1, tmsreg &src2)
	634	{
	635	INT64 man;
	636	INT64 m1, m2;
	637	int exp, cnt;
	638
	639	// reset over/underflow conditions
	640	CLR_NZVUF();
	641
	642	// first check for 0 operands
	643	if (src2.exponent() == -128)
	644	{
	645	dst = src1;
	646	OR_NZF(dst);
	647	return;
	648	}
	649
	650	// extract mantissas from 1.0.31 values to 1.1.31 values
	651	m1 = (INT64)src1.mantissa() ^ 0x80000000;
	652	m2 = (INT64)src2.mantissa() ^ 0x80000000;
	653
	654	// normalize based on the exponent
	655	if (src1.exponent() > src2.exponent())
	656	{
	657	exp = src1.exponent();
	658	cnt = exp - src2.exponent();
	659	if (cnt >= 32)
	660	{
	661	dst = src1;
	662	OR_NZF(dst);
	663	return;
	664	}
	665	m2 >>= cnt;
	666	}
	667	else
	668	{
	669	exp = src2.exponent();
	670	cnt = exp - src1.exponent();
	671	if (cnt >= 32)
	672	{
	673	negf(dst, src2);
	674	return;
	675	}
	676	m1 >>= cnt;
	677	}
	678
	679	// subtract
	680	man = m1 - m2;
	681
	682	// if the mantissa is zero, set the exponent appropriately
	683	if (man == 0 || exp == -128)
	684	{
	685	exp = -128;
	686	man = 0x80000000;
	687	}
	688
	689	// if the mantissa is >= 2.0 or < -2.0, normalize
	690	else if (man >= ((INT64)2 << 31) || man < ((INT64)-2 << 31))
	691	{
	692	man >>= 1;
	693	exp++;
	694	}
	695
	696	// if the mantissa is < 1.0 and > -1.0, normalize
	697	else if (man < ((INT64)1 << 31) && man >= ((INT64)-1 << 31))
	698	{
	699	if (man > 0)
	700	{
	701	cnt = count_leading_zeros((UINT32)man);
	702	man <<= cnt;
	703	exp -= cnt;
	704	}
	705	else
	706	{
	707	cnt = count_leading_ones((UINT32)man);
	708	man <<= cnt;
	709	exp -= cnt;
	710	}
	711	}
	712
	713	// check for underflow
	714	if (exp <= -128)
	715	{
	716	// make sure a 0 result doesn't set underflow
	717	if (man != 0 || exp < -128)
	718	IREG(TMR_ST) |= UFFLAG | LUFFLAG;
	719	man = 0x80000000;
	720	exp = -128;
	721	}
	722
	723	// check for overflow
	724	else if (exp > 127)
	725	{
	726	man = (man < 0) ? 0x00000000 : 0xffffffff;
	727	exp = 127;
	728	IREG(TMR_ST) |= VFLAG | LVFLAG;
	729	}
	730
	731	// store the result back, removing the implicit one and putting
	732	// back the sign bit
	733	dst.set_mantissa((UINT32)man ^ 0x80000000);
	734	dst.set_exponent(exp);
	735	OR_NZF(dst);
	736	}
	737	#endif
	738
	739
	740	// multiply two floating point values
	741	#if USE_FP
	742	void tms3203x_device::mpyf(tmsreg &dst, tmsreg &src1, tmsreg &src2)
	743	{
	744	double val = (double)src1.as_float() * (double)src2.as_float();
	745	double_to_dsp_with_flags(val, dst);
	746	}
	747	#else
	748	void tms3203x_device::mpyf(tmsreg &dst, tmsreg &src1, tmsreg &src2)
	749	{
	750	// reset over/underflow conditions
	751	CLR_NZVUF();
	752
	753	// first check for 0 multipliers and return 0 in any case
	754	if (src1.exponent() == -128 || src2.exponent() == -128)
	755	{
	756	dst.set_mantissa(0);
	757	dst.set_exponent(-128);
	758	OR_NZF(dst);
	759	return;
	760	}
	761
	762	// convert the mantissas from 1.0.31 numbers to 1.1.23 numbers
	763	INT32 m1 = (src1.mantissa() >> 8) ^ 0x800000;
	764	INT32 m2 = (src2.mantissa() >> 8) ^ 0x800000;
	765
	766	// multiply the mantissas and add the exponents
	767	INT64 man = (INT64)m1 * (INT64)m2;
	768	int exp = src1.exponent() + src2.exponent();
	769
	770	// chop off the low bits, going from 1.2.46 down to 1.2.31
	771	man >>= 46 - 31;
	772
	773	// if the mantissa is zero, set the exponent appropriately
	774	if (man == 0)
	775	{
	776	exp = -128;
	777	man = 0x80000000;
	778	}
	779
	780	// if the mantissa is >= 2.0 or <= -2.0, normalize
	781	else if (man >= ((INT64)2 << 31))
	782	{
	783	man >>= 1;
	784	exp++;
	785	if (man >= ((INT64)2 << 31))
	786	{
	787	man >>= 1;
	788	exp++;
	789	}
	790	}
	791
	792	// if the mantissa is >= 2.0 or <= -2.0, normalize
	793	else if (man < ((INT64)-2 << 31))
	794	{
	795	man >>= 1;
	796	exp++;
	797	}
	798
	799	// check for underflow
	800	if (exp <= -128)
	801	{
	802	man = 0x80000000;
	803	exp = -128;
	804	IREG(TMR_ST) |= UFFLAG | LUFFLAG;
	805	}
	806
	807	// check for overflow
	808	else if (exp > 127)
	809	{
	810	man = (man < 0) ? 0x00000000 : 0xffffffff;
	811	exp = 127;
	812	IREG(TMR_ST) |= VFLAG | LVFLAG;
	813	}
	814
	815	// store the result back, removing the implicit one and putting
	816	// back the sign bit
	817	dst.set_mantissa((UINT32)man ^ 0x80000000);
	818	dst.set_exponent(exp);
	819	OR_NZF(dst);
	820	}
	821	#endif
	822
	823
	824	// normalize a floating point value
	825	#if USE_FP
	826	void tms3203x_device::norm(tmsreg &dst, tmsreg &src)
	827	{
	828	fatalerror("norm not implemented\n");
	829	}
	830	#else
	831	void tms3203x_device::norm(tmsreg &dst, tmsreg &src)
	832	{
	833	INT32 man = src.mantissa();
	834	int exp = src.exponent();
	835
	836	CLR_NZVUF();
	837
	838	if (exp == -128 || man == 0)
	839	{
	840	dst.set_mantissa(0);
	841	dst.set_exponent(-128);
	842	if (man != 0)
	843	IREG(TMR_ST) |= UFFLAG | LUFFLAG;
	844	}
	845	else
	846	{
	847	int cnt;
	848	if (man > 0)
	849	{
	850	cnt = count_leading_zeros((UINT32)man);
	851	man <<= cnt;
	852	exp -= cnt;
	853	}
	854	else
	855	{
	856	cnt = count_leading_ones((UINT32)man);
	857	man <<= cnt;
	858	exp -= cnt;
	859	}
	860
	861	// check for underflow
	862	if (exp <= -128)
	863	{
	864	man = 0x00000000;
	865	exp = -128;
	866	IREG(TMR_ST) |= UFFLAG | LUFFLAG;
	867	}
	868	}
	869
	870	dst.set_mantissa(man);
	871	dst.set_exponent(exp);
	872	OR_NZF(dst);
	873	}
	874	#endif
	875
	876
	877
	878
	879	//**************************************************************************
	880	//  INDIRECT MEMORY REFS
	881	//**************************************************************************
	882
	883	// immediate displacement variants
	884
	885	UINT32 tms3203x_device::mod00_d(UINT32 op, UINT8 ar)
	886	{
	887	int reg = TMR_AR0 + (ar & 7);
	888	return IREG(reg) + (UINT8)op;
	889	}
	890
	891	UINT32 tms3203x_device::mod01_d(UINT32 op, UINT8 ar)
	892	{
	893	int reg = TMR_AR0 + (ar & 7);
	894	return IREG(reg) - (UINT8)op;
	895	}
	896
	897	UINT32 tms3203x_device::mod02_d(UINT32 op, UINT8 ar)
	898	{
	899	int reg = TMR_AR0 + (ar & 7);
	900	IREG(reg) += (UINT8)op;
	901	return IREG(reg);
	902	}
	903
	904	UINT32 tms3203x_device::mod03_d(UINT32 op, UINT8 ar)
	905	{
	906	int reg = TMR_AR0 + (ar & 7);
	907	IREG(reg) -= (UINT8)op;
	908	return IREG(reg);
	909	}
	910
	911	UINT32 tms3203x_device::mod04_d(UINT32 op, UINT8 ar)
	912	{
	913	int reg = TMR_AR0 + (ar & 7);
	914	UINT32 result = IREG(reg);
	915	IREG(reg) += (UINT8)op;
	916	return result;
	917	}
	918
	919	UINT32 tms3203x_device::mod05_d(UINT32 op, UINT8 ar)
	920	{
	921	int reg = TMR_AR0 + (ar & 7);
	922	UINT32 result = IREG(reg);
	923	IREG(reg) -= (UINT8)op;
	924	return result;
	925	}
	926
	927	UINT32 tms3203x_device::mod06_d(UINT32 op, UINT8 ar)
	928	{
	929	int reg = TMR_AR0 + (ar & 7);
	930	UINT32 result = IREG(reg);
	931	INT32 temp = (result & m_bkmask) + (UINT8)op;
	932	if (temp >= IREG(TMR_BK))
	933	temp -= IREG(TMR_BK);
	934	IREG(reg) = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
	935	return result;
	936	}
	937
	938	UINT32 tms3203x_device::mod07_d(UINT32 op, UINT8 ar)
	939	{
	940	int reg = TMR_AR0 + (ar & 7);
	941	UINT32 result = IREG(reg);
	942	INT32 temp = (result & m_bkmask) - (UINT8)op;
	943	if (temp < 0)
	944	temp += IREG(TMR_BK);
	945	IREG(reg) = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
	946	return result;
	947	}
	948
	949
	950	// immediate displacement variants (implied 1)
	951
	952	UINT32 tms3203x_device::mod00_1(UINT32 op, UINT8 ar)
	953	{
	954	int reg = TMR_AR0 + (ar & 7);
	955	return IREG(reg) + 1;
	956	}
	957
	958	UINT32 tms3203x_device::mod01_1(UINT32 op, UINT8 ar)
	959	{
	960	int reg = TMR_AR0 + (ar & 7);
	961	return IREG(reg) - 1;
	962	}
	963
	964	UINT32 tms3203x_device::mod02_1(UINT32 op, UINT8 ar)
	965	{
	966	int reg = TMR_AR0 + (ar & 7);
	967	return ++IREG(reg);
	968	}
	969
	970	UINT32 tms3203x_device::mod03_1(UINT32 op, UINT8 ar)
	971	{
	972	int reg = TMR_AR0 + (ar & 7);
	973	return --IREG(reg);
	974	}
	975
	976	UINT32 tms3203x_device::mod04_1(UINT32 op, UINT8 ar)
	977	{
	978	int reg = TMR_AR0 + (ar & 7);
	979	return IREG(reg)++;
	980	}
	981
	982	UINT32 tms3203x_device::mod05_1(UINT32 op, UINT8 ar)
	983	{
	984	int reg = TMR_AR0 + (ar & 7);
	985	return IREG(reg)--;
	986	}
	987
	988	UINT32 tms3203x_device::mod06_1(UINT32 op, UINT8 ar)
	989	{
	990	int reg = TMR_AR0 + (ar & 7);
	991	UINT32 result = IREG(reg);
	992	INT32 temp = (result & m_bkmask) + 1;
	993	if (temp >= IREG(TMR_BK))
	994	temp -= IREG(TMR_BK);
	995	IREG(reg) = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
	996	return result;
	997	}
	998
	999	UINT32 tms3203x_device::mod07_1(UINT32 op, UINT8 ar)
	1000	{
	1001	int reg = TMR_AR0 + (ar & 7);
	1002	UINT32 result = IREG(reg);
	1003	INT32 temp = (result & m_bkmask) - 1;
	1004	if (temp < 0)
	1005	temp += IREG(TMR_BK);
	1006	IREG(reg) = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
	1007	return result;
	1008	}
	1009
	1010
	1011	// IR0 displacement variants
	1012
	1013	UINT32 tms3203x_device::mod08(UINT32 op, UINT8 ar)
	1014	{
	1015	int reg = TMR_AR0 + (ar & 7);
	1016	return IREG(reg) + IREG(TMR_IR0);
	1017	}
	1018
	1019	UINT32 tms3203x_device::mod09(UINT32 op, UINT8 ar)
	1020	{
	1021	int reg = TMR_AR0 + (ar & 7);
	1022	return IREG(reg) - IREG(TMR_IR0);
	1023	}
	1024
	1025	UINT32 tms3203x_device::mod0a(UINT32 op, UINT8 ar)
	1026	{
	1027	int reg = TMR_AR0 + (ar & 7);
	1028	IREG(reg) += IREG(TMR_IR0);
	1029	return IREG(reg);
	1030	}
	1031
	1032	UINT32 tms3203x_device::mod0b(UINT32 op, UINT8 ar)
	1033	{
	1034	int reg = TMR_AR0 + (ar & 7);
	1035	IREG(reg) -= IREG(TMR_IR0);
	1036	return IREG(reg);
	1037	}
	1038
	1039	UINT32 tms3203x_device::mod0c(UINT32 op, UINT8 ar)
	1040	{
	1041	int reg = TMR_AR0 + (ar & 7);
	1042	UINT32 result = IREG(reg);
	1043	IREG(reg) += IREG(TMR_IR0);
	1044	return result;
	1045	}
	1046
	1047	UINT32 tms3203x_device::mod0d(UINT32 op, UINT8 ar)
	1048	{
	1049	int reg = TMR_AR0 + (ar & 7);
	1050	UINT32 result = IREG(reg);
	1051	IREG(reg) -= IREG(TMR_IR0);
	1052	return result;
	1053	}
	1054
	1055	UINT32 tms3203x_device::mod0e(UINT32 op, UINT8 ar)
	1056	{
	1057	int reg = TMR_AR0 + (ar & 7);
	1058	UINT32 result = IREG(reg);
	1059	INT32 temp = (result & m_bkmask) + IREG(TMR_IR0);
	1060	if (temp >= IREG(TMR_BK))
	1061	temp -= IREG(TMR_BK);
	1062	IREG(reg) = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
	1063	return result;
	1064	}
	1065
	1066	UINT32 tms3203x_device::mod0f(UINT32 op, UINT8 ar)
	1067	{
	1068	int reg = TMR_AR0 + (ar & 7);
	1069	UINT32 result = IREG(reg);
	1070	INT32 temp = (result & m_bkmask) - IREG(TMR_IR0);
	1071	if (temp < 0)
	1072	temp += IREG(TMR_BK);
	1073	IREG(reg) = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
	1074	return result;
	1075	}
	1076
	1077
	1078	// IR1 displacement variants
	1079
	1080	UINT32 tms3203x_device::mod10(UINT32 op, UINT8 ar)
	1081	{
	1082	int reg = TMR_AR0 + (ar & 7);
	1083	return IREG(reg) + IREG(TMR_IR1);
	1084	}
	1085
	1086	UINT32 tms3203x_device::mod11(UINT32 op, UINT8 ar)
	1087	{
	1088	int reg = TMR_AR0 + (ar & 7);
	1089	return IREG(reg) - IREG(TMR_IR1);
	1090	}
	1091
	1092	UINT32 tms3203x_device::mod12(UINT32 op, UINT8 ar)
	1093	{
	1094	int reg = TMR_AR0 + (ar & 7);
	1095	IREG(reg) += IREG(TMR_IR1);
	1096	return IREG(reg);
	1097	}
	1098
	1099	UINT32 tms3203x_device::mod13(UINT32 op, UINT8 ar)
	1100	{
	1101	int reg = TMR_AR0 + (ar & 7);
	1102	IREG(reg) -= IREG(TMR_IR1);
	1103	return IREG(reg);
	1104	}
	1105
	1106	UINT32 tms3203x_device::mod14(UINT32 op, UINT8 ar)
	1107	{
	1108	int reg = TMR_AR0 + (ar & 7);
	1109	UINT32 result = IREG(reg);
	1110	IREG(reg) += IREG(TMR_IR1);
	1111	return result;
	1112	}
	1113
	1114	UINT32 tms3203x_device::mod15(UINT32 op, UINT8 ar)
	1115	{
	1116	int reg = TMR_AR0 + (ar & 7);
	1117	UINT32 result = IREG(reg);
	1118	IREG(reg) -= IREG(TMR_IR1);
	1119	return result;
	1120	}
	1121
	1122	UINT32 tms3203x_device::mod16(UINT32 op, UINT8 ar)
	1123	{
	1124	int reg = TMR_AR0 + (ar & 7);
	1125	UINT32 result = IREG(reg);
	1126	INT32 temp = (result & m_bkmask) + IREG(TMR_IR1);
	1127	if (temp >= IREG(TMR_BK))
	1128	temp -= IREG(TMR_BK);
	1129	IREG(reg) = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
	1130	return result;
	1131	}
	1132
	1133	UINT32 tms3203x_device::mod17(UINT32 op, UINT8 ar)
	1134	{
	1135	int reg = TMR_AR0 + (ar & 7);
	1136	UINT32 result = IREG(reg);
	1137	INT32 temp = (result & m_bkmask) - IREG(TMR_IR1);
	1138	if (temp < 0)
	1139	temp += IREG(TMR_BK);
	1140	IREG(reg) = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
	1141	return result;
	1142	}
	1143
	1144
	1145	// special variants
	1146
	1147	UINT32 tms3203x_device::mod18(UINT32 op, UINT8 ar)
	1148	{
	1149	int reg = TMR_AR0 + (ar & 7);
	1150	return IREG(reg);
	1151	}
	1152
	1153	UINT32 tms3203x_device::mod19(UINT32 op, UINT8 ar)
	1154	{
	1155	unimplemented(op);
	1156	return 0;
	1157	}
	1158
	1159	UINT32 tms3203x_device::modillegal(UINT32 op, UINT8 ar)
	1160	{
	1161	illegal(op);
	1162	return 0;
	1163	}
	1164
	1165
	1166	// immediate displacement variants (implied 1)
	1167
	1168	UINT32 tms3203x_device::mod00_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
	1169	{
	1170	int reg = TMR_AR0 + (ar & 7);
	1171	return IREG(reg) + 1;
	1172	}
	1173
	1174	UINT32 tms3203x_device::mod01_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
	1175	{
	1176	int reg = TMR_AR0 + (ar & 7);
	1177	return IREG(reg) - 1;
	1178	}
	1179
	1180	UINT32 tms3203x_device::mod02_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
	1181	{
	1182	int reg = TMR_AR0 + (ar & 7);
	1183	UINT32 defval = IREG(reg) + 1;
	1184	*defptrptr = defval;
	1185	defptrptr = &IREG(reg);
	1186	return defval;
	1187	}
	1188
	1189	UINT32 tms3203x_device::mod03_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
	1190	{
	1191	int reg = TMR_AR0 + (ar & 7);
	1192	UINT32 defval = IREG(reg) - 1;
	1193	*defptrptr = defval;
	1194	defptrptr = &IREG(reg);
	1195	return defval;
	1196	}
	1197
	1198	UINT32 tms3203x_device::mod04_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
	1199	{
	1200	int reg = TMR_AR0 + (ar & 7);
	1201	*defptrptr = IREG(reg) + 1;
	1202	defptrptr = &IREG(reg);
	1203	return IREG(reg);
	1204	}
	1205
	1206	UINT32 tms3203x_device::mod05_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
	1207	{
	1208	int reg = TMR_AR0 + (ar & 7);
	1209	*defptrptr = IREG(reg) - 1;
	1210	defptrptr = &IREG(reg);
	1211	return IREG(reg);
	1212	}
	1213
	1214	UINT32 tms3203x_device::mod06_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
	1215	{
	1216	int reg = TMR_AR0 + (ar & 7);
	1217	UINT32 result = IREG(reg);
	1218	INT32 temp = (result & m_bkmask) + 1;
	1219	if (temp >= IREG(TMR_BK))
	1220	temp -= IREG(TMR_BK);
	1221	*defptrptr = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
	1222	defptrptr = &IREG(reg);
	1223	return result;
	1224	}
	1225
	1226	UINT32 tms3203x_device::mod07_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
	1227	{
	1228	int reg = TMR_AR0 + (ar & 7);
	1229	UINT32 result = IREG(reg);
	1230	INT32 temp = (result & m_bkmask) - 1;
	1231	if (temp < 0)
	1232	temp += IREG(TMR_BK);
	1233	*defptrptr = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
	1234	defptrptr = &IREG(reg);
	1235	return result;
	1236	}
	1237
	1238
	1239	// IR0 displacement variants
	1240
	1241	UINT32 tms3203x_device::mod08_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
	1242	{
	1243	int reg = TMR_AR0 + (ar & 7);
	1244	return IREG(reg) + IREG(TMR_IR0);
	1245	}
	1246
	1247	UINT32 tms3203x_device::mod09_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
	1248	{
	1249	int reg = TMR_AR0 + (ar & 7);
	1250	return IREG(reg) - IREG(TMR_IR0);
	1251	}
	1252
	1253	UINT32 tms3203x_device::mod0a_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
	1254	{
	1255	int reg = TMR_AR0 + (ar & 7);
	1256	UINT32 defval = IREG(reg) + IREG(TMR_IR0);
	1257	*defptrptr = defval;
	1258	defptrptr = &IREG(reg);
	1259	return defval;
	1260	}
	1261
	1262	UINT32 tms3203x_device::mod0b_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
	1263	{
	1264	int reg = TMR_AR0 + (ar & 7);
	1265	UINT32 defval = IREG(reg) - IREG(TMR_IR0);
	1266	*defptrptr = defval;
	1267	defptrptr = &IREG(reg);
	1268	return defval;
	1269	}
	1270
	1271	UINT32 tms3203x_device::mod0c_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
	1272	{
	1273	int reg = TMR_AR0 + (ar & 7);
	1274	*defptrptr = IREG(reg) + IREG(TMR_IR0);
	1275	defptrptr = &IREG(reg);
	1276	return IREG(reg);
	1277	}
	1278
	1279	UINT32 tms3203x_device::mod0d_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
	1280	{
	1281	int reg = TMR_AR0 + (ar & 7);
	1282	*defptrptr = IREG(reg) - IREG(TMR_IR0);
	1283	defptrptr = &IREG(reg);
	1284	return IREG(reg);
	1285	}
	1286
	1287	UINT32 tms3203x_device::mod0e_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
	1288	{
	1289	int reg = TMR_AR0 + (ar & 7);
	1290	UINT32 result = IREG(reg);
	1291	INT32 temp = (result & m_bkmask) + IREG(TMR_IR0);
	1292	if (temp >= IREG(TMR_BK))
	1293	temp -= IREG(TMR_BK);
	1294	*defptrptr = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
	1295	defptrptr = &IREG(reg);
	1296	return result;
	1297	}
	1298
	1299	UINT32 tms3203x_device::mod0f_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
	1300	{
	1301	int reg = TMR_AR0 + (ar & 7);
	1302	UINT32 result = IREG(reg);
	1303	INT32 temp = (result & m_bkmask) - IREG(TMR_IR0);
	1304	if (temp < 0)
	1305	temp += IREG(TMR_BK);
	1306	*defptrptr = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
	1307	defptrptr = &IREG(reg);
	1308	return result;
	1309	}
	1310
	1311
	1312	// IR1 displacement variants
	1313
	1314	UINT32 tms3203x_device::mod10_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
	1315	{
	1316	int reg = TMR_AR0 + (ar & 7);
	1317	return IREG(reg) + IREG(TMR_IR1);
	1318	}
	1319
	1320	UINT32 tms3203x_device::mod11_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
	1321	{
	1322	int reg = TMR_AR0 + (ar & 7);
	1323	return IREG(reg) - IREG(TMR_IR1);
	1324	}
	1325
	1326	UINT32 tms3203x_device::mod12_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
	1327	{
	1328	int reg = TMR_AR0 + (ar & 7);
	1329	UINT32 defval = IREG(reg) + IREG(TMR_IR1);
	1330	*defptrptr = defval;
	1331	defptrptr = &IREG(reg);
	1332	return defval;
	1333	}
	1334
	1335	UINT32 tms3203x_device::mod13_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
	1336	{
	1337	int reg = TMR_AR0 + (ar & 7);
	1338	UINT32 defval = IREG(reg) - IREG(TMR_IR1);
	1339	*defptrptr = defval;
	1340	defptrptr = &IREG(reg);
	1341	return defval;
	1342	}
	1343
	1344	UINT32 tms3203x_device::mod14_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
	1345	{
	1346	int reg = TMR_AR0 + (ar & 7);
	1347	*defptrptr = IREG(reg) + IREG(TMR_IR1);
	1348	defptrptr = &IREG(reg);
	1349	return IREG(reg);
	1350	}
	1351
	1352	UINT32 tms3203x_device::mod15_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
	1353	{
	1354	int reg = TMR_AR0 + (ar & 7);
	1355	*defptrptr = IREG(reg) - IREG(TMR_IR1);
	1356	defptrptr = &IREG(reg);
	1357	return IREG(reg);
	1358	}
	1359
	1360	UINT32 tms3203x_device::mod16_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
	1361	{
	1362	int reg = TMR_AR0 + (ar & 7);
	1363	UINT32 result = IREG(reg);
	1364	INT32 temp = (result & m_bkmask) + IREG(TMR_IR1);
	1365	if (temp >= IREG(TMR_BK))
	1366	temp -= IREG(TMR_BK);
	1367	*defptrptr = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
	1368	defptrptr = &IREG(reg);
	1369	return result;
	1370	}
	1371
	1372	UINT32 tms3203x_device::mod17_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
	1373	{
	1374	int reg = TMR_AR0 + (ar & 7);
	1375	UINT32 result = IREG(reg);
	1376	INT32 temp = (result & m_bkmask) - IREG(TMR_IR1);
	1377	if (temp < 0)
	1378	temp += IREG(TMR_BK);
	1379	*defptrptr = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
	1380	defptrptr = &IREG(reg);
	1381	return result;
	1382	}
	1383
	1384	UINT32 tms3203x_device::mod18_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
	1385	{
	1386	int reg = TMR_AR0 + (ar & 7);
	1387	return IREG(reg);
	1388	}
	1389
	1390	UINT32 tms3203x_device::mod19_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
	1391	{
	1392	unimplemented(op);
	1393	return 0;
	1394	}
	1395
	1396	UINT32 tms3203x_device::modillegal_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
	1397	{
	1398	illegal(op);
	1399	return 0;
	1400	}
	1401
	1402
	1403	/*-----------------------------------------------------*/
	1404
	1405	#define ABSF(dreg, sreg)                                                \
	1406	{                                                                       \
	1407	INT32 man = FREGMAN(sreg);                                          \
	1408	CLR_NZVUF();                                                        \
	1409	m_r[dreg] = m_r[sreg];                              \
	1410	if (man < 0)                                                        \
	1411	{                                                                   \
	1412	m_r[dreg].set_mantissa(~man);                           \
	1413	if (man == (INT32)0x80000000 && FREGEXP(sreg) == 127)           \
	1414	IREG(TMR_ST) |= VFLAG | LVFLAG;                             \
	1415	}                                                                   \
	1416	OR_NZF(m_r[dreg]);                                          \
	1417	}
	1418
	1419	void tms3203x_device::absf_reg(UINT32 op)
	1420	{
	1421	int dreg = (op >> 16) & 7;
	1422	int sreg = op & 7;
	1423	ABSF(dreg, sreg);
	1424	}
	1425
	1426	void tms3203x_device::absf_dir(UINT32 op)
	1427	{
	1428	UINT32 res = RMEM(DIRECT(op));
	1429	int dreg = (op >> 16) & 7;
	1430	LONG2FP(TMR_TEMP1, res);
	1431	ABSF(dreg, TMR_TEMP1);
	1432	}
	1433
	1434	void tms3203x_device::absf_ind(UINT32 op)
	1435	{
	1436	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	1437	int dreg = (op >> 16) & 7;
	1438	LONG2FP(TMR_TEMP1, res);
	1439	ABSF(dreg, TMR_TEMP1);
	1440	}
	1441
	1442	void tms3203x_device::absf_imm(UINT32 op)
	1443	{
	1444	int dreg = (op >> 16) & 7;
	1445	SHORT2FP(TMR_TEMP1, op);
	1446	ABSF(dreg, TMR_TEMP1);
	1447	}
	1448
	1449	/*-----------------------------------------------------*/
	1450
	1451	#define ABSI(dreg, src)                                             \
	1452	{                                                                   \
	1453	UINT32 _res = ((INT32)src < 0) ? -src : src;                    \
	1454	if (!OVM() || _res != 0x80000000)                                   \
	1455	IREG(dreg) = _res;                                          \
	1456	else                                                            \
	1457	IREG(dreg) = 0x7fffffff;                                    \
	1458	if (dreg < 8)                                                   \
	1459	{                                                               \
	1460	CLR_NZVUF();                                                \
	1461	OR_NZ(_res);                                                \
	1462	if (_res == 0x80000000)                                     \
	1463	IREG(TMR_ST) |= VFLAG | LVFLAG;                         \
	1464	}                                                               \
	1465	else if (dreg >= TMR_BK)                                        \
	1466	update_special(dreg);                                       \
	1467	}
	1468
	1469	void tms3203x_device::absi_reg(UINT32 op)
	1470	{
	1471	UINT32 src = IREG(op & 31);
	1472	int dreg = (op >> 16) & 31;
	1473	ABSI(dreg, src);
	1474	}
	1475
	1476	void tms3203x_device::absi_dir(UINT32 op)
	1477	{
	1478	UINT32 src = RMEM(DIRECT(op));
	1479	int dreg = (op >> 16) & 31;
	1480	ABSI(dreg, src);
	1481	}
	1482
	1483	void tms3203x_device::absi_ind(UINT32 op)
	1484	{
	1485	UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
	1486	int dreg = (op >> 16) & 31;
	1487	ABSI(dreg, src);
	1488	}
	1489
	1490	void tms3203x_device::absi_imm(UINT32 op)
	1491	{
	1492	UINT32 src = (INT16)op;
	1493	int dreg = (op >> 16) & 31;
	1494	ABSI(dreg, src);
	1495	}
	1496
	1497	/*-----------------------------------------------------*/
	1498
	1499	#define ADDC(dreg, src1, src2)                                      \
	1500	{                                                                   \
	1501	UINT32 _res = src1 + src2 + (IREG(TMR_ST) & CFLAG);             \
	1502	if (!OVM() || !OVERFLOW_ADD(src1,src2,_res))                    \
	1503	IREG(dreg) = _res;                                          \
	1504	else                                                            \
	1505	IREG(dreg) = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff;   \
	1506	if (dreg < 8)                                                   \
	1507	{                                                               \
	1508	UINT32 tempc = IREG(TMR_ST) & CFLAG;                        \
	1509	CLR_NZCVUF();                                               \
	1510	OR_C_ADC(src1,src2,tempc);                                  \
	1511	OR_V_ADD(src1,src2,_res);                                   \
	1512	OR_NZ(_res);                                                \
	1513	}                                                               \
	1514	else if (dreg >= TMR_BK)                                        \
	1515	update_special(dreg);                                       \
	1516	}
	1517
	1518	void tms3203x_device::addc_reg(UINT32 op)
	1519	{
	1520	UINT32 src = IREG(op & 31);
	1521	int dreg = (op >> 16) & 31;
	1522	UINT32 dst = IREG(dreg);
	1523	ADDC(dreg, dst, src);
	1524	}
	1525
	1526	void tms3203x_device::addc_dir(UINT32 op)
	1527	{
	1528	UINT32 src = RMEM(DIRECT(op));
	1529	int dreg = (op >> 16) & 31;
	1530	UINT32 dst = IREG(dreg);
	1531	ADDC(dreg, dst, src);
	1532	}
	1533
	1534	void tms3203x_device::addc_ind(UINT32 op)
	1535	{
	1536	UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
	1537	int dreg = (op >> 16) & 31;
	1538	UINT32 dst = IREG(dreg);
	1539	ADDC(dreg, dst, src);
	1540	}
	1541
	1542	void tms3203x_device::addc_imm(UINT32 op)
	1543	{
	1544	UINT32 src = (INT16)op;
	1545	int dreg = (op >> 16) & 31;
	1546	UINT32 dst = IREG(dreg);
	1547	ADDC(dreg, dst, src);
	1548	}
	1549
	1550	/*-----------------------------------------------------*/
	1551
	1552	void tms3203x_device::addf_reg(UINT32 op)
	1553	{
	1554	int dreg = (op >> 16) & 7;
	1555	addf(m_r[dreg], m_r[dreg], m_r[op & 7]);
	1556	}
	1557
	1558	void tms3203x_device::addf_dir(UINT32 op)
	1559	{
	1560	UINT32 res = RMEM(DIRECT(op));
	1561	int dreg = (op >> 16) & 7;
	1562	LONG2FP(TMR_TEMP1, res);
	1563	addf(m_r[dreg], m_r[dreg], m_r[TMR_TEMP1]);
	1564	}
	1565
	1566	void tms3203x_device::addf_ind(UINT32 op)
	1567	{
	1568	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	1569	int dreg = (op >> 16) & 7;
	1570	LONG2FP(TMR_TEMP1, res);
	1571	addf(m_r[dreg], m_r[dreg], m_r[TMR_TEMP1]);
	1572	}
	1573
	1574	void tms3203x_device::addf_imm(UINT32 op)
	1575	{
	1576	int dreg = (op >> 16) & 7;
	1577	SHORT2FP(TMR_TEMP1, op);
	1578	addf(m_r[dreg], m_r[dreg], m_r[TMR_TEMP1]);
	1579	}
	1580
	1581	/*-----------------------------------------------------*/
	1582
	1583	#define ADDI(dreg, src1, src2)                                      \
	1584	{                                                                   \
	1585	UINT32 _res = src1 + src2;                                      \
	1586	if (!OVM() || !OVERFLOW_ADD(src1,src2,_res))                    \
	1587	IREG(dreg) = _res;                                          \
	1588	else                                                            \
	1589	IREG(dreg) = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff;   \
	1590	if (dreg < 8)                                                   \
	1591	{                                                               \
	1592	CLR_NZCVUF();                                               \
	1593	OR_C_ADD(src1,src2,_res);                                   \
	1594	OR_V_ADD(src1,src2,_res);                                   \
	1595	OR_NZ(_res);                                                \
	1596	}                                                               \
	1597	else if (dreg >= TMR_BK)                                        \
	1598	update_special(dreg);                                       \
	1599	}
	1600
	1601	void tms3203x_device::addi_reg(UINT32 op)
	1602	{
	1603	UINT32 src = IREG(op & 31);
	1604	int dreg = (op >> 16) & 31;
	1605	UINT32 dst = IREG(dreg);
	1606	ADDI(dreg, dst, src);
	1607	}
	1608
	1609	void tms3203x_device::addi_dir(UINT32 op)
	1610	{
	1611	UINT32 src = RMEM(DIRECT(op));
	1612	int dreg = (op >> 16) & 31;
	1613	UINT32 dst = IREG(dreg);
	1614	ADDI(dreg, dst, src);
	1615	}
	1616
	1617	void tms3203x_device::addi_ind(UINT32 op)
	1618	{
	1619	UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
	1620	int dreg = (op >> 16) & 31;
	1621	UINT32 dst = IREG(dreg);
	1622	ADDI(dreg, dst, src);
	1623	}
	1624
	1625	void tms3203x_device::addi_imm(UINT32 op)
	1626	{
	1627	UINT32 src = (INT16)op;
	1628	int dreg = (op >> 16) & 31;
	1629	UINT32 dst = IREG(dreg);
	1630	ADDI(dreg, dst, src);
	1631	}
	1632
	1633	/*-----------------------------------------------------*/
	1634
	1635	#define AND(dreg, src1, src2)                                       \
	1636	{                                                                   \
	1637	UINT32 _res = (src1) & (src2);                                  \
	1638	IREG(dreg) = _res;                                              \
	1639	if (dreg < 8)                                                   \
	1640	{                                                               \
	1641	CLR_NZVUF();                                                \
	1642	OR_NZ(_res);                                                \
	1643	}                                                               \
	1644	else if (dreg >= TMR_BK)                                        \
	1645	update_special(dreg);                                       \
	1646	}
	1647
	1648	void tms3203x_device::and_reg(UINT32 op)
	1649	{
	1650	UINT32 src = IREG(op & 31);
	1651	int dreg = (op >> 16) & 31;
	1652	UINT32 dst = IREG(dreg);
	1653	AND(dreg, dst, src);
	1654	}
	1655
	1656	void tms3203x_device::and_dir(UINT32 op)
	1657	{
	1658	UINT32 src = RMEM(DIRECT(op));
	1659	int dreg = (op >> 16) & 31;
	1660	UINT32 dst = IREG(dreg);
	1661	AND(dreg, dst, src);
	1662	}
	1663
	1664	void tms3203x_device::and_ind(UINT32 op)
	1665	{
	1666	UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
	1667	int dreg = (op >> 16) & 31;
	1668	UINT32 dst = IREG(dreg);
	1669	AND(dreg, dst, src);
	1670	}
	1671
	1672	void tms3203x_device::and_imm(UINT32 op)
	1673	{
	1674	UINT32 src = (UINT16)op;
	1675	int dreg = (op >> 16) & 31;
	1676	UINT32 dst = IREG(dreg);
	1677	AND(dreg, dst, src);
	1678	}
	1679
	1680	/*-----------------------------------------------------*/
	1681
	1682	#define ANDN(dreg, src1, src2)                                      \
	1683	{                                                                   \
	1684	UINT32 _res = (src1) & ~(src2);                                 \
	1685	IREG(dreg) = _res;                                              \
	1686	if (dreg < 8)                                                   \
	1687	{                                                               \
	1688	CLR_NZVUF();                                                \
	1689	OR_NZ(_res);                                                \
	1690	}                                                               \
	1691	else if (dreg >= TMR_BK)                                        \
	1692	update_special(dreg);                                       \
	1693	}
	1694
	1695	void tms3203x_device::andn_reg(UINT32 op)
	1696	{
	1697	UINT32 src = IREG(op & 31);
	1698	int dreg = (op >> 16) & 31;
	1699	UINT32 dst = IREG(dreg);
	1700	ANDN(dreg, dst, src);
	1701	}
	1702
	1703	void tms3203x_device::andn_dir(UINT32 op)
	1704	{
	1705	UINT32 src = RMEM(DIRECT(op));
	1706	int dreg = (op >> 16) & 31;
	1707	UINT32 dst = IREG(dreg);
	1708	ANDN(dreg, dst, src);
	1709	}
	1710
	1711	void tms3203x_device::andn_ind(UINT32 op)
	1712	{
	1713	UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
	1714	int dreg = (op >> 16) & 31;
	1715	UINT32 dst = IREG(dreg);
	1716	ANDN(dreg, dst, src);
	1717	}
	1718
	1719	void tms3203x_device::andn_imm(UINT32 op)
	1720	{
	1721	UINT32 src = (UINT16)op;
	1722	int dreg = (op >> 16) & 31;
	1723	UINT32 dst = IREG(dreg);
	1724	ANDN(dreg, dst, src);
	1725	}
	1726
	1727	/*-----------------------------------------------------*/
	1728
	1729	#define ASH(dreg, src, count)                                       \
	1730	{                                                                   \
	1731	UINT32 _res;                                                    \
	1732	INT32 _count = (INT16)(count << 9) >> 9;    /* 7 LSBs */        \
	1733	if (_count < 0)                                                 \
	1734	{                                                               \
	1735	if (_count >= -31)                                          \
	1736	_res = (INT32)src >> -_count;                           \
	1737	else                                                        \
	1738	_res = (INT32)src >> 31;                                \
	1739	}                                                               \
	1740	else                                                            \
	1741	{                                                               \
	1742	if (_count <= 31)                                           \
	1743	_res = (INT32)src << _count;                            \
	1744	else                                                        \
	1745	_res = 0;                                               \
	1746	}                                                               \
	1747	IREG(dreg) = _res;                                              \
	1748	if (dreg < 8)                                                   \
	1749	{                                                               \
	1750	CLR_NZCVUF();                                               \
	1751	OR_NZ(_res);                                                \
	1752	if (_count < 0)                                             \
	1753	{                                                           \
	1754	if (_count >= -32)                                      \
	1755	OR_C(((INT32)src >> (-_count - 1)) & 1);            \
	1756	else                                                    \
	1757	OR_C(((INT32)src >> 31) & 1);                       \
	1758	}                                                           \
	1759	else if (_count > 0)                                        \
	1760	{                                                           \
	1761	if (_count <= 32)                                       \
	1762	OR_C(((UINT32)src << (_count - 1)) >> 31);          \
	1763	}                                                           \
	1764	}                                                               \
	1765	else if (dreg >= TMR_BK)                                        \
	1766	update_special(dreg);                                       \
	1767	}
	1768
	1769	void tms3203x_device::ash_reg(UINT32 op)
	1770	{
	1771	int dreg = (op >> 16) & 31;
	1772	int count = IREG(op & 31);
	1773	UINT32 src = IREG(dreg);
	1774	ASH(dreg, src, count);
	1775	}
	1776
	1777	void tms3203x_device::ash_dir(UINT32 op)
	1778	{
	1779	int dreg = (op >> 16) & 31;
	1780	int count = RMEM(DIRECT(op));
	1781	UINT32 src = IREG(dreg);
	1782	ASH(dreg, src, count);
	1783	}
	1784
	1785	void tms3203x_device::ash_ind(UINT32 op)
	1786	{
	1787	int dreg = (op >> 16) & 31;
	1788	int count = RMEM(INDIRECT_D(op, op >> 8));
	1789	UINT32 src = IREG(dreg);
	1790	ASH(dreg, src, count);
	1791	}
	1792
	1793	void tms3203x_device::ash_imm(UINT32 op)
	1794	{
	1795	int dreg = (op >> 16) & 31;
	1796	int count = op;
	1797	UINT32 src = IREG(dreg);
	1798	ASH(dreg, src, count);
	1799	}
	1800
	1801	/*-----------------------------------------------------*/
	1802
	1803	void tms3203x_device::cmpf_reg(UINT32 op)
	1804	{
	1805	int dreg = (op >> 16) & 7;
	1806	subf(m_r[TMR_TEMP2], m_r[dreg], m_r[op & 7]);
	1807	}
	1808
	1809	void tms3203x_device::cmpf_dir(UINT32 op)
	1810	{
	1811	UINT32 res = RMEM(DIRECT(op));
	1812	int dreg = (op >> 16) & 7;
	1813	LONG2FP(TMR_TEMP1, res);
	1814	subf(m_r[TMR_TEMP2], m_r[dreg], m_r[TMR_TEMP1]);
	1815	}
	1816
	1817	void tms3203x_device::cmpf_ind(UINT32 op)
	1818	{
	1819	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	1820	int dreg = (op >> 16) & 7;
	1821	LONG2FP(TMR_TEMP1, res);
	1822	subf(m_r[TMR_TEMP2], m_r[dreg], m_r[TMR_TEMP1]);
	1823	}
	1824
	1825	void tms3203x_device::cmpf_imm(UINT32 op)
	1826	{
	1827	int dreg = (op >> 16) & 7;
	1828	SHORT2FP(TMR_TEMP1, op);
	1829	subf(m_r[TMR_TEMP2], m_r[dreg], m_r[TMR_TEMP1]);
	1830	}
	1831
	1832	/*-----------------------------------------------------*/
	1833
	1834	#define CMPI(src1, src2)                                            \
	1835	{                                                                   \
	1836	UINT32 _res = src1 - src2;                                      \
	1837	CLR_NZCVUF();                                                   \
	1838	OR_C_SUB(src1,src2,_res);                                       \
	1839	OR_V_SUB(src1,src2,_res);                                       \
	1840	OR_NZ(_res);                                                    \
	1841	}
	1842
	1843	void tms3203x_device::cmpi_reg(UINT32 op)
	1844	{
	1845	UINT32 src = IREG(op & 31);
	1846	UINT32 dst = IREG((op >> 16) & 31);
	1847	CMPI(dst, src);
	1848	}
	1849
	1850	void tms3203x_device::cmpi_dir(UINT32 op)
	1851	{
	1852	UINT32 src = RMEM(DIRECT(op));
	1853	UINT32 dst = IREG((op >> 16) & 31);
	1854	CMPI(dst, src);
	1855	}
	1856
	1857	void tms3203x_device::cmpi_ind(UINT32 op)
	1858	{
	1859	UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
	1860	UINT32 dst = IREG((op >> 16) & 31);
	1861	CMPI(dst, src);
	1862	}
	1863
	1864	void tms3203x_device::cmpi_imm(UINT32 op)
	1865	{
	1866	UINT32 src = (INT16)op;
	1867	UINT32 dst = IREG((op >> 16) & 31);
	1868	CMPI(dst, src);
	1869	}
	1870
	1871	/*-----------------------------------------------------*/
	1872
	1873	void tms3203x_device::fix_reg(UINT32 op)
	1874	{
	1875	int dreg = (op >> 16) & 31;
	1876	m_r[TMR_TEMP1] = m_r[op & 7];
	1877	float2int(m_r[TMR_TEMP1], dreg < 8);
	1878	m_r[dreg].set_mantissa(m_r[TMR_TEMP1].mantissa());
	1879	}
	1880
	1881	void tms3203x_device::fix_dir(UINT32 op)
	1882	{
	1883	UINT32 res = RMEM(DIRECT(op));
	1884	int dreg = (op >> 16) & 31;
	1885	LONG2FP(TMR_TEMP1, res);
	1886	float2int(m_r[TMR_TEMP1], dreg < 8);
	1887	m_r[dreg].set_mantissa(m_r[TMR_TEMP1].mantissa());
	1888	}
	1889
	1890	void tms3203x_device::fix_ind(UINT32 op)
	1891	{
	1892	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	1893	int dreg = (op >> 16) & 31;
	1894	LONG2FP(TMR_TEMP1, res);
	1895	float2int(m_r[TMR_TEMP1], dreg < 8);
	1896	m_r[dreg].set_mantissa(m_r[TMR_TEMP1].mantissa());
	1897	}
	1898
	1899	void tms3203x_device::fix_imm(UINT32 op)
	1900	{
	1901	int dreg = (op >> 16) & 31;
	1902	SHORT2FP(TMR_TEMP1, op);
	1903	float2int(m_r[TMR_TEMP1], dreg < 8);
	1904	m_r[dreg].set_mantissa(m_r[TMR_TEMP1].mantissa());
	1905	}
	1906
	1907	/*-----------------------------------------------------*/
	1908
	1909	#define FLOAT(dreg, src)                                            \
	1910	{                                                                   \
	1911	IREG(dreg) = src;                                               \
	1912	int2float(m_r[dreg]);                                   \
	1913	}
	1914
	1915	void tms3203x_device::float_reg(UINT32 op)
	1916	{
	1917	UINT32 src = IREG(op & 31);
	1918	int dreg = (op >> 16) & 7;
	1919	FLOAT(dreg, src);
	1920	}
	1921
	1922	void tms3203x_device::float_dir(UINT32 op)
	1923	{
	1924	UINT32 src = RMEM(DIRECT(op));
	1925	int dreg = (op >> 16) & 7;
	1926	FLOAT(dreg, src);
	1927	}
	1928
	1929	void tms3203x_device::float_ind(UINT32 op)
	1930	{
	1931	UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
	1932	int dreg = (op >> 16) & 7;
	1933	FLOAT(dreg, src);
	1934	}
	1935
	1936	void tms3203x_device::float_imm(UINT32 op)
	1937	{
	1938	UINT32 src = (INT16)op;
	1939	int dreg = (op >> 16) & 7;
	1940	FLOAT(dreg, src);
	1941	}
	1942
	1943	/*-----------------------------------------------------*/
	1944
	1945	void tms3203x_device::idle(UINT32 op)
	1946	{
	1947	m_is_idling = true;
	1948	IREG(TMR_ST) |= GIEFLAG;
	1949	check_irqs();
	1950	if (m_is_idling)
	1951	m_icount = 0;
	1952	}
	1953
	1954	/*-----------------------------------------------------*/
	1955
	1956	void tms3203x_device::lde_reg(UINT32 op)
	1957	{
	1958	int dreg = (op >> 16) & 7;
	1959	m_r[dreg].set_exponent(m_r[op & 7].exponent());
	1960	if (m_r[dreg].exponent() == -128)
	1961	m_r[dreg].set_mantissa(0);
	1962	}
	1963
	1964	void tms3203x_device::lde_dir(UINT32 op)
	1965	{
	1966	UINT32 res = RMEM(DIRECT(op));
	1967	int dreg = (op >> 16) & 7;
	1968	LONG2FP(TMR_TEMP1, res);
	1969	m_r[dreg].set_exponent(m_r[TMR_TEMP1].exponent());
	1970	if (m_r[dreg].exponent() == -128)
	1971	m_r[dreg].set_mantissa(0);
	1972	}
	1973
	1974	void tms3203x_device::lde_ind(UINT32 op)
	1975	{
	1976	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	1977	int dreg = (op >> 16) & 7;
	1978	LONG2FP(TMR_TEMP1, res);
	1979	m_r[dreg].set_exponent(m_r[TMR_TEMP1].exponent());
	1980	if (m_r[dreg].exponent() == -128)
	1981	m_r[dreg].set_mantissa(0);
	1982	}
	1983
	1984	void tms3203x_device::lde_imm(UINT32 op)
	1985	{
	1986	int dreg = (op >> 16) & 7;
	1987	SHORT2FP(TMR_TEMP1, op);
	1988	m_r[dreg].set_exponent(m_r[TMR_TEMP1].exponent());
	1989	if (m_r[dreg].exponent() == -128)
	1990	m_r[dreg].set_mantissa(0);
	1991	}
	1992
	1993	/*-----------------------------------------------------*/
	1994
	1995	void tms3203x_device::ldf_reg(UINT32 op)
	1996	{
	1997	int dreg = (op >> 16) & 7;
	1998	m_r[dreg] = m_r[op & 7];
	1999	CLR_NZVUF();
	2000	OR_NZF(m_r[dreg]);
	2001	}
	2002
	2003	void tms3203x_device::ldf_dir(UINT32 op)
	2004	{
	2005	UINT32 res = RMEM(DIRECT(op));
	2006	int dreg = (op >> 16) & 7;
	2007	LONG2FP(dreg, res);
	2008	CLR_NZVUF();
	2009	OR_NZF(m_r[dreg]);
	2010	}
	2011
	2012	void tms3203x_device::ldf_ind(UINT32 op)
	2013	{
	2014	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	2015	int dreg = (op >> 16) & 7;
	2016	LONG2FP(dreg, res);
	2017	CLR_NZVUF();
	2018	OR_NZF(m_r[dreg]);
	2019	}
	2020
	2021	void tms3203x_device::ldf_imm(UINT32 op)
	2022	{
	2023	int dreg = (op >> 16) & 7;
	2024	SHORT2FP(dreg, op);
	2025	CLR_NZVUF();
	2026	OR_NZF(m_r[dreg]);
	2027	}
	2028
	2029	/*-----------------------------------------------------*/
	2030
	2031	void tms3203x_device::ldfi_dir(UINT32 op) { unimplemented(op); }
	2032	void tms3203x_device::ldfi_ind(UINT32 op) { unimplemented(op); }
	2033
	2034	/*-----------------------------------------------------*/
	2035
	2036	#define LDI(dreg, src)                                              \
	2037	{                                                                   \
	2038	IREG(dreg) = src;                                               \
	2039	if (dreg < 8)                                                   \
	2040	{                                                               \
	2041	CLR_NZVUF();                                                \
	2042	OR_NZ(src);                                                 \
	2043	}                                                               \
	2044	else if (dreg >= TMR_BK)                                        \
	2045	update_special(dreg);                                       \
	2046	}
	2047
	2048	void tms3203x_device::ldi_reg(UINT32 op)
	2049	{
	2050	UINT32 src = IREG(op & 31);
	2051	int dreg = (op >> 16) & 31;
	2052	LDI(dreg, src);
	2053	}
	2054
	2055	void tms3203x_device::ldi_dir(UINT32 op)
	2056	{
	2057	UINT32 src = RMEM(DIRECT(op));
	2058	int dreg = (op >> 16) & 31;
	2059	LDI(dreg, src);
	2060	}
	2061
	2062	void tms3203x_device::ldi_ind(UINT32 op)
	2063	{
	2064	UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
	2065	int dreg = (op >> 16) & 31;
	2066	LDI(dreg, src);
	2067	}
	2068
	2069	void tms3203x_device::ldi_imm(UINT32 op)
	2070	{
	2071	UINT32 src = (INT16)op;
	2072	int dreg = (op >> 16) & 31;
	2073	LDI(dreg, src);
	2074	}
	2075
	2076	/*-----------------------------------------------------*/
	2077
	2078	void tms3203x_device::ldii_dir(UINT32 op) { unimplemented(op); }
	2079	void tms3203x_device::ldii_ind(UINT32 op) { unimplemented(op); }
	2080
	2081	/*-----------------------------------------------------*/
	2082
	2083	void tms3203x_device::ldm_reg(UINT32 op)
	2084	{
	2085	int dreg = (op >> 16) & 7;
	2086	m_r[dreg].set_mantissa(m_r[op & 7].mantissa());
	2087	}
	2088
	2089	void tms3203x_device::ldm_dir(UINT32 op)
	2090	{
	2091	UINT32 res = RMEM(DIRECT(op));
	2092	int dreg = (op >> 16) & 7;
	2093	m_r[dreg].set_mantissa(res);
	2094	}
	2095
	2096	void tms3203x_device::ldm_ind(UINT32 op)
	2097	{
	2098	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	2099	int dreg = (op >> 16) & 7;
	2100	m_r[dreg].set_mantissa(res);
	2101	}
	2102
	2103	void tms3203x_device::ldm_imm(UINT32 op)
	2104	{
	2105	int dreg = (op >> 16) & 7;
	2106	SHORT2FP(TMR_TEMP1, op);
	2107	m_r[dreg].set_mantissa(m_r[TMR_TEMP1].mantissa());
	2108	}
	2109
	2110	/*-----------------------------------------------------*/
	2111
	2112	#define LSH(dreg, src, count)                                       \
	2113	{                                                                   \
	2114	UINT32 _res;                                                    \
	2115	INT32 _count = (INT16)(count << 9) >> 9;    /* 7 LSBs */        \
	2116	if (_count < 0)                                                 \
	2117	{                                                               \
	2118	if (_count >= -31)                                          \
	2119	_res = (UINT32)src >> -_count;                          \
	2120	else                                                        \
	2121	_res = 0;                                               \
	2122	}                                                               \
	2123	else                                                            \
	2124	{                                                               \
	2125	if (_count <= 31)                                           \
	2126	_res = (UINT32)src << _count;                           \
	2127	else                                                        \
	2128	_res = 0;                                               \
	2129	}                                                               \
	2130	IREG(dreg) = _res;                                              \
	2131	if (dreg < 8)                                                   \
	2132	{                                                               \
	2133	CLR_NZCVUF();                                               \
	2134	OR_NZ(_res);                                                \
	2135	if (_count < 0)                                             \
	2136	{                                                           \
	2137	if (_count >= -32)                                      \
	2138	OR_C(((UINT32)src >> (-_count - 1)) & 1);           \
	2139	}                                                           \
	2140	else if (_count > 0)                                        \
	2141	{                                                           \
	2142	if (_count <= 32)                                       \
	2143	OR_C(((UINT32)src << (_count - 1)) >> 31);          \
	2144	}                                                           \
	2145	}                                                               \
	2146	else if (dreg >= TMR_BK)                                        \
	2147	update_special(dreg);                                       \
	2148	}
	2149
	2150	void tms3203x_device::lsh_reg(UINT32 op)
	2151	{
	2152	int dreg = (op >> 16) & 31;
	2153	int count = IREG(op & 31);
	2154	UINT32 src = IREG(dreg);
	2155	LSH(dreg, src, count);
	2156	}
	2157
	2158	void tms3203x_device::lsh_dir(UINT32 op)
	2159	{
	2160	int dreg = (op >> 16) & 31;
	2161	int count = RMEM(DIRECT(op));
	2162	UINT32 src = IREG(dreg);
	2163	LSH(dreg, src, count);
	2164	}
	2165
	2166	void tms3203x_device::lsh_ind(UINT32 op)
	2167	{
	2168	int dreg = (op >> 16) & 31;
	2169	int count = RMEM(INDIRECT_D(op, op >> 8));
	2170	UINT32 src = IREG(dreg);
	2171	LSH(dreg, src, count);
	2172	}
	2173
	2174	void tms3203x_device::lsh_imm(UINT32 op)
	2175	{
	2176	int dreg = (op >> 16) & 31;
	2177	int count = op;
	2178	UINT32 src = IREG(dreg);
	2179	LSH(dreg, src, count);
	2180	}
	2181
	2182	/*-----------------------------------------------------*/
	2183
	2184	void tms3203x_device::mpyf_reg(UINT32 op)
	2185	{
	2186	int dreg = (op >> 16) & 31;
	2187	mpyf(m_r[dreg], m_r[dreg], m_r[op & 31]);
	2188	}
	2189
	2190	void tms3203x_device::mpyf_dir(UINT32 op)
	2191	{
	2192	UINT32 res = RMEM(DIRECT(op));
	2193	int dreg = (op >> 16) & 31;
	2194	LONG2FP(TMR_TEMP1, res);
	2195	mpyf(m_r[dreg], m_r[dreg], m_r[TMR_TEMP1]);
	2196	}
	2197
	2198	void tms3203x_device::mpyf_ind(UINT32 op)
	2199	{
	2200	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	2201	int dreg = (op >> 16) & 31;
	2202	LONG2FP(TMR_TEMP1, res);
	2203	mpyf(m_r[dreg], m_r[dreg], m_r[TMR_TEMP1]);
	2204	}
	2205
	2206	void tms3203x_device::mpyf_imm(UINT32 op)
	2207	{
	2208	int dreg = (op >> 16) & 31;
	2209	SHORT2FP(TMR_TEMP1, op);
	2210	mpyf(m_r[dreg], m_r[dreg], m_r[TMR_TEMP1]);
	2211	}
	2212
	2213	/*-----------------------------------------------------*/
	2214
	2215	#define MPYI(dreg, src1, src2)                                      \
	2216	{                                                                   \
	2217	INT64 _res = (INT64)((INT32)(src1 << 8) >> 8) * (INT64)((INT32)(src2 << 8) >> 8);\
	2218	if (!OVM() || (_res >= -(INT64)0x80000000 && _res <= (INT64)0x7fffffff))        \
	2219	IREG(dreg) = _res;                                          \
	2220	else                                                            \
	2221	IREG(dreg) = (_res < 0) ? 0x80000000 : 0x7fffffff;          \
	2222	if (dreg < 8)                                                   \
	2223	{                                                               \
	2224	CLR_NZVUF();                                                \
	2225	OR_NZ((UINT32)_res);                                        \
	2226	if (_res < -(INT64)0x80000000 || _res > (INT64)0x7fffffff)  \
	2227	IREG(TMR_ST) |= VFLAG | LVFLAG;                         \
	2228	}                                                               \
	2229	else if (dreg >= TMR_BK)                                        \
	2230	update_special(dreg);                                       \
	2231	}
	2232
	2233	void tms3203x_device::mpyi_reg(UINT32 op)
	2234	{
	2235	UINT32 src = IREG(op & 31);
	2236	int dreg = (op >> 16) & 31;
	2237	UINT32 dst = IREG(dreg);
	2238	MPYI(dreg, dst, src);
	2239	}
	2240
	2241	void tms3203x_device::mpyi_dir(UINT32 op)
	2242	{
	2243	UINT32 src = RMEM(DIRECT(op));
	2244	int dreg = (op >> 16) & 31;
	2245	UINT32 dst = IREG(dreg);
	2246	MPYI(dreg, dst, src);
	2247	}
	2248
	2249	void tms3203x_device::mpyi_ind(UINT32 op)
	2250	{
	2251	UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
	2252	int dreg = (op >> 16) & 31;
	2253	UINT32 dst = IREG(dreg);
	2254	MPYI(dreg, dst, src);
	2255	}
	2256
	2257	void tms3203x_device::mpyi_imm(UINT32 op)
	2258	{
	2259	UINT32 src = (INT16)op;
	2260	int dreg = (op >> 16) & 31;
	2261	UINT32 dst = IREG(dreg);
	2262	MPYI(dreg, dst, src);
	2263	}
	2264
	2265	/*-----------------------------------------------------*/
	2266
	2267	#define NEGB(dreg, src)                                             \
	2268	{                                                                   \
	2269	UINT32 _res = 0 - src - (IREG(TMR_ST) & CFLAG);                 \
	2270	if (!OVM() || !OVERFLOW_SUB(0,src,_res))                        \
	2271	IREG(dreg) = _res;                                          \
	2272	else                                                            \
	2273	IREG(dreg) = ((INT32)src < 0) ? 0x80000000 : 0x7fffffff;    \
	2274	if (dreg < 8)                                                   \
	2275	{                                                               \
	2276	UINT32 tempc = IREG(TMR_ST) & CFLAG;                        \
	2277	CLR_NZCVUF();                                               \
	2278	OR_C_SBB(0,src,tempc);                                      \
	2279	OR_V_SUB(0,src,_res);                                       \
	2280	OR_NZ(_res);                                                \
	2281	}                                                               \
	2282	else if (dreg >= TMR_BK)                                        \
	2283	update_special(dreg);                                       \
	2284	}
	2285
	2286	void tms3203x_device::negb_reg(UINT32 op)
	2287	{
	2288	UINT32 src = IREG(op & 31);
	2289	int dreg = (op >> 16) & 31;
	2290	NEGB(dreg, src);
	2291	}
	2292
	2293	void tms3203x_device::negb_dir(UINT32 op)
	2294	{
	2295	UINT32 src = RMEM(DIRECT(op));
	2296	int dreg = (op >> 16) & 31;
	2297	NEGB(dreg, src);
	2298	}
	2299
	2300	void tms3203x_device::negb_ind(UINT32 op)
	2301	{
	2302	UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
	2303	int dreg = (op >> 16) & 31;
	2304	NEGB(dreg, src);
	2305	}
	2306
	2307	void tms3203x_device::negb_imm(UINT32 op)
	2308	{
	2309	UINT32 src = (INT16)op;
	2310	int dreg = (op >> 16) & 31;
	2311	NEGB(dreg, src);
	2312	}
	2313
	2314	/*-----------------------------------------------------*/
	2315
	2316	void tms3203x_device::negf_reg(UINT32 op)
	2317	{
	2318	int dreg = (op >> 16) & 7;
	2319	negf(m_r[dreg], m_r[op & 7]);
	2320	}
	2321
	2322	void tms3203x_device::negf_dir(UINT32 op)
	2323	{
	2324	UINT32 res = RMEM(DIRECT(op));
	2325	int dreg = (op >> 16) & 7;
	2326	LONG2FP(TMR_TEMP1, res);
	2327	negf(m_r[dreg], m_r[TMR_TEMP1]);
	2328	}
	2329
	2330	void tms3203x_device::negf_ind(UINT32 op)
	2331	{
	2332	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	2333	int dreg = (op >> 16) & 7;
	2334	LONG2FP(TMR_TEMP1, res);
	2335	negf(m_r[dreg], m_r[TMR_TEMP1]);
	2336	}
	2337
	2338	void tms3203x_device::negf_imm(UINT32 op)
	2339	{
	2340	int dreg = (op >> 16) & 7;
	2341	SHORT2FP(TMR_TEMP1, op);
	2342	negf(m_r[dreg], m_r[TMR_TEMP1]);
	2343	}
	2344
	2345	/*-----------------------------------------------------*/
	2346
	2347	#define NEGI(dreg, src)                                             \
	2348	{                                                                   \
	2349	UINT32 _res = 0 - src;                                          \
	2350	if (!OVM() || !OVERFLOW_SUB(0,src,_res))                        \
	2351	IREG(dreg) = _res;                                          \
	2352	else                                                            \
	2353	IREG(dreg) = ((INT32)src < 0) ? 0x80000000 : 0x7fffffff;    \
	2354	if (dreg < 8)                                                   \
	2355	{                                                               \
	2356	CLR_NZCVUF();                                               \
	2357	OR_C_SUB(0,src,_res);                                       \
	2358	OR_V_SUB(0,src,_res);                                       \
	2359	OR_NZ(_res);                                                \
	2360	}                                                               \
	2361	else if (dreg >= TMR_BK)                                        \
	2362	update_special(dreg);                                       \
	2363	}
	2364
	2365	void tms3203x_device::negi_reg(UINT32 op)
	2366	{
	2367	UINT32 src = IREG(op & 31);
	2368	int dreg = (op >> 16) & 31;
	2369	NEGI(dreg, src);
	2370	}
	2371
	2372	void tms3203x_device::negi_dir(UINT32 op)
	2373	{
	2374	UINT32 src = RMEM(DIRECT(op));
	2375	int dreg = (op >> 16) & 31;
	2376	NEGI(dreg, src);
	2377	}
	2378
	2379	void tms3203x_device::negi_ind(UINT32 op)
	2380	{
	2381	UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
	2382	int dreg = (op >> 16) & 31;
	2383	NEGI(dreg, src);
	2384	}
	2385
	2386	void tms3203x_device::negi_imm(UINT32 op)
	2387	{
	2388	UINT32 src = (INT16)op;
	2389	int dreg = (op >> 16) & 31;
	2390	NEGI(dreg, src);
	2391	}
	2392
	2393	/*-----------------------------------------------------*/
	2394
	2395	void tms3203x_device::nop_reg(UINT32 op)
	2396	{
	2397	}
	2398
	2399	void tms3203x_device::nop_ind(UINT32 op)
	2400	{
	2401	RMEM(INDIRECT_D(op, op >> 8));
	2402	}
	2403
	2404	/*-----------------------------------------------------*/
	2405
	2406	void tms3203x_device::norm_reg(UINT32 op)
	2407	{
	2408	int dreg = (op >> 16) & 7;
	2409	norm(m_r[dreg], m_r[op & 7]);
	2410	}
	2411
	2412	void tms3203x_device::norm_dir(UINT32 op)
	2413	{
	2414	UINT32 res = RMEM(DIRECT(op));
	2415	int dreg = (op >> 16) & 7;
	2416	LONG2FP(TMR_TEMP1, res);
	2417	norm(m_r[dreg], m_r[TMR_TEMP1]);
	2418	}
	2419
	2420	void tms3203x_device::norm_ind(UINT32 op)
	2421	{
	2422	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	2423	int dreg = (op >> 16) & 7;
	2424	LONG2FP(TMR_TEMP1, res);
	2425	norm(m_r[dreg], m_r[TMR_TEMP1]);
	2426	}
	2427
	2428	void tms3203x_device::norm_imm(UINT32 op)
	2429	{
	2430	int dreg = (op >> 16) & 7;
	2431	SHORT2FP(TMR_TEMP1, op);
	2432	norm(m_r[dreg], m_r[TMR_TEMP1]);
	2433	}
	2434
	2435	/*-----------------------------------------------------*/
	2436
	2437	#define NOT(dreg, src)                                              \
	2438	{                                                                   \
	2439	UINT32 _res = ~(src);                                           \
	2440	IREG(dreg) = _res;                                              \
	2441	if (dreg < 8)                                                   \
	2442	{                                                               \
	2443	CLR_NZVUF();                                                \
	2444	OR_NZ(_res);                                                \
	2445	}                                                               \
	2446	else if (dreg >= TMR_BK)                                        \
	2447	update_special(dreg);                                       \
	2448	}
	2449
	2450	void tms3203x_device::not_reg(UINT32 op)
	2451	{
	2452	UINT32 src = IREG(op & 31);
	2453	int dreg = (op >> 16) & 31;
	2454	NOT(dreg, src);
	2455	}
	2456
	2457	void tms3203x_device::not_dir(UINT32 op)
	2458	{
	2459	UINT32 src = RMEM(DIRECT(op));
	2460	int dreg = (op >> 16) & 31;
	2461	NOT(dreg, src);
	2462	}
	2463
	2464	void tms3203x_device::not_ind(UINT32 op)
	2465	{
	2466	UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
	2467	int dreg = (op >> 16) & 31;
	2468	NOT(dreg, src);
	2469	}
	2470
	2471	void tms3203x_device::not_imm(UINT32 op)
	2472	{
	2473	UINT32 src = (UINT16)op;
	2474	int dreg = (op >> 16) & 31;
	2475	NOT(dreg, src);
	2476	}
	2477
	2478	/*-----------------------------------------------------*/
	2479
	2480	void tms3203x_device::pop(UINT32 op)
	2481	{
	2482	int dreg = (op >> 16) & 31;
	2483	UINT32 val = RMEM(IREG(TMR_SP)--);
	2484	IREG(dreg) = val;
	2485	if (dreg < 8)
	2486	{
	2487	CLR_NZVUF();
	2488	OR_NZ(val);
	2489	}
	2490	else if (dreg >= TMR_BK)
	2491	update_special(dreg);
	2492	}
	2493
	2494	void tms3203x_device::popf(UINT32 op)
	2495	{
	2496	int dreg = (op >> 16) & 7;
	2497	UINT32 val = RMEM(IREG(TMR_SP)--);
	2498	LONG2FP(dreg, val);
	2499	CLR_NZVUF();
	2500	OR_NZF(m_r[dreg]);
	2501	}
	2502
	2503	void tms3203x_device::push(UINT32 op)
	2504	{
	2505	WMEM(++IREG(TMR_SP), IREG((op >> 16) & 31));
	2506	}
	2507
	2508	void tms3203x_device::pushf(UINT32 op)
	2509	{
	2510	int dreg = (op >> 16) & 7;
	2511	WMEM(++IREG(TMR_SP), FP2LONG(dreg));
	2512	}
	2513
	2514	/*-----------------------------------------------------*/
	2515
	2516	#define OR(dreg, src1, src2)                                        \
	2517	{                                                                   \
	2518	UINT32 _res = (src1) | (src2);                                  \
	2519	IREG(dreg) = _res;                                              \
	2520	if (dreg < 8)                                                   \
	2521	{                                                               \
	2522	CLR_NZVUF();                                                \
	2523	OR_NZ(_res);                                                \
	2524	}                                                               \
	2525	else if (dreg >= TMR_BK)                                        \
	2526	update_special(dreg);                                       \
	2527	}
	2528
	2529	void tms3203x_device::or_reg(UINT32 op)
	2530	{
	2531	UINT32 src = IREG(op & 31);
	2532	int dreg = (op >> 16) & 31;
	2533	UINT32 dst = IREG(dreg);
	2534	OR(dreg, dst, src);
	2535	}
	2536
	2537	void tms3203x_device::or_dir(UINT32 op)
	2538	{
	2539	UINT32 src = RMEM(DIRECT(op));
	2540	int dreg = (op >> 16) & 31;
	2541	UINT32 dst = IREG(dreg);
	2542	OR(dreg, dst, src);
	2543	}
	2544
	2545	void tms3203x_device::or_ind(UINT32 op)
	2546	{
	2547	UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
	2548	int dreg = (op >> 16) & 31;
	2549	UINT32 dst = IREG(dreg);
	2550	OR(dreg, dst, src);
	2551	}
	2552
	2553	void tms3203x_device::or_imm(UINT32 op)
	2554	{
	2555	UINT32 src = (UINT16)op;
	2556	int dreg = (op >> 16) & 31;
	2557	UINT32 dst = IREG(dreg);
	2558	OR(dreg, dst, src);
	2559	}
	2560
	2561	/*-----------------------------------------------------*/
	2562
	2563	void tms3203x_device::maxspeed(UINT32 op) { unimplemented(op); }
	2564
	2565	/*-----------------------------------------------------*/
	2566
	2567	#define RND(dreg)                                                   \
	2568	{                                                                   \
	2569	INT32 man = FREGMAN(dreg);                                      \
	2570	CLR_NVUF();                                                     \
	2571	if (man < 0x7fffff80)                                           \
	2572	{                                                               \
	2573	m_r[dreg].set_mantissa(((UINT32)man + 0x80) & 0xffffff00);  \
	2574	OR_NUF(m_r[dreg]);                                  \
	2575	}                                                               \
	2576	else if (FREGEXP(dreg) < 127)                                   \
	2577	{                                                               \
	2578	m_r[dreg].set_mantissa(((UINT32)man + 0x80) & 0x7fffff00);  \
	2579	m_r[dreg].set_exponent(FREGEXP(dreg) + 1);          \
	2580	OR_NUF(m_r[dreg]);                                  \
	2581	}                                                               \
	2582	else                                                            \
	2583	{                                                               \
	2584	m_r[dreg].set_mantissa(0x7fffff00);             \
	2585	IREG(TMR_ST) |= VFLAG | LVFLAG;                             \
	2586	}                                                               \
	2587	}
	2588
	2589	void tms3203x_device::rnd_reg(UINT32 op)
	2590	{
	2591	int sreg = op & 7;
	2592	int dreg = (op >> 16) & 7;
	2593	m_r[dreg] = m_r[sreg];
	2594	RND(dreg);
	2595	}
	2596
	2597	void tms3203x_device::rnd_dir(UINT32 op)
	2598	{
	2599	UINT32 res = RMEM(DIRECT(op));
	2600	int dreg = (op >> 16) & 7;
	2601	LONG2FP(dreg, res);
	2602	RND(dreg);
	2603	}
	2604
	2605	void tms3203x_device::rnd_ind(UINT32 op)
	2606	{
	2607	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	2608	int dreg = (op >> 16) & 7;
	2609	LONG2FP(dreg, res);
	2610	RND(dreg);
	2611	}
	2612
	2613	void tms3203x_device::rnd_imm(UINT32 op)
	2614	{
	2615	int dreg = (op >> 16) & 7;
	2616	SHORT2FP(dreg, op);
	2617	RND(dreg);
	2618	}
	2619
	2620	/*-----------------------------------------------------*/
	2621
	2622	void tms3203x_device::rol(UINT32 op)
	2623	{
	2624	int dreg = (op >> 16) & 31;
	2625	UINT32 res = IREG(dreg);
	2626	int newcflag = res >> 31;
	2627	res = (res << 1) | newcflag;
	2628	IREG(dreg) = res;
	2629	if (dreg < 8)
	2630	{
	2631	CLR_NZCVUF();
	2632	OR_NZ(res);
	2633	OR_C(newcflag);
	2634	}
	2635	else if (dreg >= TMR_BK)
	2636	update_special(dreg);
	2637	}
	2638
	2639	void tms3203x_device::rolc(UINT32 op)
	2640	{
	2641	int dreg = (op >> 16) & 31;
	2642	UINT32 res = IREG(dreg);
	2643	int newcflag = res >> 31;
	2644	res = (res << 1) | (IREG(TMR_ST) & CFLAG);
	2645	IREG(dreg) = res;
	2646	if (dreg < 8)
	2647	{
	2648	CLR_NZCVUF();
	2649	OR_NZ(res);
	2650	OR_C(newcflag);
	2651	}
	2652	else if (dreg >= TMR_BK)
	2653	update_special(dreg);
	2654	}
	2655
	2656	void tms3203x_device::ror(UINT32 op)
	2657	{
	2658	int dreg = (op >> 16) & 31;
	2659	UINT32 res = IREG(dreg);
	2660	int newcflag = res & 1;
	2661	res = (res >> 1) | (newcflag << 31);
	2662	IREG(dreg) = res;
	2663	if (dreg < 8)
	2664	{
	2665	CLR_NZCVUF();
	2666	OR_NZ(res);
	2667	OR_C(newcflag);
	2668	}
	2669	else if (dreg >= TMR_BK)
	2670	update_special(dreg);
	2671	}
	2672
	2673	void tms3203x_device::rorc(UINT32 op)
	2674	{
	2675	int dreg = (op >> 16) & 31;
	2676	UINT32 res = IREG(dreg);
	2677	int newcflag = res & 1;
	2678	res = (res >> 1) | ((IREG(TMR_ST) & CFLAG) << 31);
	2679	IREG(dreg) = res;
	2680	if (dreg < 8)
	2681	{
	2682	CLR_NZCVUF();
	2683	OR_NZ(res);
	2684	OR_C(newcflag);
	2685	}
	2686	else if (dreg >= TMR_BK)
	2687	update_special(dreg);
	2688	}
	2689
	2690	/*-----------------------------------------------------*/
	2691
	2692	void tms3203x_device::rtps_reg(UINT32 op)
	2693	{
	2694	IREG(TMR_RC) = IREG(op & 31);
	2695	IREG(TMR_RS) = m_pc;
	2696	IREG(TMR_RE) = m_pc;
	2697	IREG(TMR_ST) |= RMFLAG;
	2698	m_icount -= 3*2;
	2699	m_delayed = true;
	2700	}
	2701
	2702	void tms3203x_device::rtps_dir(UINT32 op)
	2703	{
	2704	IREG(TMR_RC) = RMEM(DIRECT(op));
	2705	IREG(TMR_RS) = m_pc;
	2706	IREG(TMR_RE) = m_pc;
	2707	IREG(TMR_ST) |= RMFLAG;
	2708	m_icount -= 3*2;
	2709	m_delayed = true;
	2710	}
	2711
	2712	void tms3203x_device::rtps_ind(UINT32 op)
	2713	{
	2714	IREG(TMR_RC) = RMEM(INDIRECT_D(op, op >> 8));
	2715	IREG(TMR_RS) = m_pc;
	2716	IREG(TMR_RE) = m_pc;
	2717	IREG(TMR_ST) |= RMFLAG;
	2718	m_icount -= 3*2;
	2719	m_delayed = true;
	2720	}
	2721
	2722	void tms3203x_device::rtps_imm(UINT32 op)
	2723	{
	2724	IREG(TMR_RC) = (UINT16)op;
	2725	IREG(TMR_RS) = m_pc;
	2726	IREG(TMR_RE) = m_pc;
	2727	IREG(TMR_ST) |= RMFLAG;
	2728	m_icount -= 3*2;
	2729	m_delayed = true;
	2730	}
	2731
	2732	/*-----------------------------------------------------*/
	2733
	2734	void tms3203x_device::stf_dir(UINT32 op)
	2735	{
	2736	WMEM(DIRECT(op), FP2LONG((op >> 16) & 7));
	2737	}
	2738
	2739	void tms3203x_device::stf_ind(UINT32 op)
	2740	{
	2741	WMEM(INDIRECT_D(op, op >> 8), FP2LONG((op >> 16) & 7));
	2742	}
	2743
	2744	/*-----------------------------------------------------*/
	2745
	2746	void tms3203x_device::stfi_dir(UINT32 op) { unimplemented(op); }
	2747	void tms3203x_device::stfi_ind(UINT32 op) { unimplemented(op); }
	2748
	2749	/*-----------------------------------------------------*/
	2750
	2751	void tms3203x_device::sti_dir(UINT32 op)
	2752	{
	2753	WMEM(DIRECT(op), IREG((op >> 16) & 31));
	2754	}
	2755
	2756	void tms3203x_device::sti_ind(UINT32 op)
	2757	{
	2758	WMEM(INDIRECT_D(op, op >> 8), IREG((op >> 16) & 31));
	2759	}
	2760
	2761	/*-----------------------------------------------------*/
	2762
	2763	void tms3203x_device::stii_dir(UINT32 op) { unimplemented(op); }
	2764	void tms3203x_device::stii_ind(UINT32 op) { unimplemented(op); }
	2765
	2766	/*-----------------------------------------------------*/
	2767
	2768	void tms3203x_device::sigi(UINT32 op) { unimplemented(op); }
	2769
	2770	/*-----------------------------------------------------*/
	2771
	2772	#define SUBB(dreg, src1, src2)                                      \
	2773	{                                                                   \
	2774	UINT32 _res = src1 - src2 - (IREG(TMR_ST) & CFLAG);             \
	2775	if (!OVM() || !OVERFLOW_SUB(src1,src2,_res))                    \
	2776	IREG(dreg) = _res;                                          \
	2777	else                                                            \
	2778	IREG(dreg) = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff;   \
	2779	if (dreg < 8)                                                   \
	2780	{                                                               \
	2781	UINT32 tempc = IREG(TMR_ST) & CFLAG;                        \
	2782	CLR_NZCVUF();                                               \
	2783	OR_C_SBB(src1,src2,tempc);                                  \
	2784	OR_V_SUB(src1,src2,_res);                                   \
	2785	OR_NZ(_res);                                                \
	2786	}                                                               \
	2787	else if (dreg >= TMR_BK)                                        \
	2788	update_special(dreg);                                       \
	2789	}
	2790
	2791	void tms3203x_device::subb_reg(UINT32 op)
	2792	{
	2793	UINT32 src = IREG(op & 31);
	2794	int dreg = (op >> 16) & 31;
	2795	UINT32 dst = IREG(dreg);
	2796	SUBB(dreg, dst, src);
	2797	}
	2798
	2799	void tms3203x_device::subb_dir(UINT32 op)
	2800	{
	2801	UINT32 src = RMEM(DIRECT(op));
	2802	int dreg = (op >> 16) & 31;
	2803	UINT32 dst = IREG(dreg);
	2804	SUBB(dreg, dst, src);
	2805	}
	2806
	2807	void tms3203x_device::subb_ind(UINT32 op)
	2808	{
	2809	UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
	2810	int dreg = (op >> 16) & 31;
	2811	UINT32 dst = IREG(dreg);
	2812	SUBB(dreg, dst, src);
	2813	}
	2814
	2815	void tms3203x_device::subb_imm(UINT32 op)
	2816	{
	2817	UINT32 src = (INT16)op;
	2818	int dreg = (op >> 16) & 31;
	2819	UINT32 dst = IREG(dreg);
	2820	SUBB(dreg, dst, src);
	2821	}
	2822
	2823	/*-----------------------------------------------------*/
	2824
	2825	#define SUBC(dreg, src)                                             \
	2826	{                                                                   \
	2827	UINT32 dst = IREG(dreg);                                        \
	2828	if (dst >= src)                                                 \
	2829	IREG(dreg) = ((dst - src) << 1) | 1;                        \
	2830	else                                                            \
	2831	IREG(dreg) = dst << 1;                                      \
	2832	if (dreg >= TMR_BK)                                             \
	2833	update_special(dreg);                                       \
	2834	}
	2835
	2836	void tms3203x_device::subc_reg(UINT32 op)
	2837	{
	2838	UINT32 src = IREG(op & 31);
	2839	int dreg = (op >> 16) & 31;
	2840	SUBC(dreg, src);
	2841	}
	2842
	2843	void tms3203x_device::subc_dir(UINT32 op)
	2844	{
	2845	UINT32 src = RMEM(DIRECT(op));
	2846	int dreg = (op >> 16) & 31;
	2847	SUBC(dreg, src);
	2848	}
	2849
	2850	void tms3203x_device::subc_ind(UINT32 op)
	2851	{
	2852	UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
	2853	int dreg = (op >> 16) & 31;
	2854	SUBC(dreg, src);
	2855	}
	2856
	2857	void tms3203x_device::subc_imm(UINT32 op)
	2858	{
	2859	UINT32 src = (INT16)op;
	2860	int dreg = (op >> 16) & 31;
	2861	SUBC(dreg, src);
	2862	}
	2863
	2864	/*-----------------------------------------------------*/
	2865
	2866	void tms3203x_device::subf_reg(UINT32 op)
	2867	{
	2868	int dreg = (op >> 16) & 7;
	2869	subf(m_r[dreg], m_r[dreg], m_r[op & 7]);
	2870	}
	2871
	2872	void tms3203x_device::subf_dir(UINT32 op)
	2873	{
	2874	UINT32 res = RMEM(DIRECT(op));
	2875	int dreg = (op >> 16) & 7;
	2876	LONG2FP(TMR_TEMP1, res);
	2877	subf(m_r[dreg], m_r[dreg], m_r[TMR_TEMP1]);
	2878	}
	2879
	2880	void tms3203x_device::subf_ind(UINT32 op)
	2881	{
	2882	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	2883	int dreg = (op >> 16) & 7;
	2884	LONG2FP(TMR_TEMP1, res);
	2885	subf(m_r[dreg], m_r[dreg], m_r[TMR_TEMP1]);
	2886	}
	2887
	2888	void tms3203x_device::subf_imm(UINT32 op)
	2889	{
	2890	int dreg = (op >> 16) & 7;
	2891	SHORT2FP(TMR_TEMP1, op);
	2892	subf(m_r[dreg], m_r[dreg], m_r[TMR_TEMP1]);
	2893	}
	2894
	2895	/*-----------------------------------------------------*/
	2896
	2897	#define SUBI(dreg, src1, src2)                                      \
	2898	{                                                                   \
	2899	UINT32 _res = src1 - src2;                                      \
	2900	if (!OVM() || !OVERFLOW_SUB(src1,src2,_res))                    \
	2901	IREG(dreg) = _res;                                          \
	2902	else                                                            \
	2903	IREG(dreg) = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff;   \
	2904	if (dreg < 8)                                                   \
	2905	{                                                               \
	2906	CLR_NZCVUF();                                               \
	2907	OR_C_SUB(src1,src2,_res);                                   \
	2908	OR_V_SUB(src1,src2,_res);                                   \
	2909	OR_NZ(_res);                                                \
	2910	}                                                               \
	2911	else if (dreg >= TMR_BK)                                        \
	2912	update_special(dreg);                                       \
	2913	}
	2914
	2915	void tms3203x_device::subi_reg(UINT32 op)
	2916	{
	2917	UINT32 src = IREG(op & 31);
	2918	int dreg = (op >> 16) & 31;
	2919	UINT32 dst = IREG(dreg);
	2920	SUBI(dreg, dst, src);
	2921	}
	2922
	2923	void tms3203x_device::subi_dir(UINT32 op)
	2924	{
	2925	UINT32 src = RMEM(DIRECT(op));
	2926	int dreg = (op >> 16) & 31;
	2927	UINT32 dst = IREG(dreg);
	2928	SUBI(dreg, dst, src);
	2929	}
	2930
	2931	void tms3203x_device::subi_ind(UINT32 op)
	2932	{
	2933	UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
	2934	int dreg = (op >> 16) & 31;
	2935	UINT32 dst = IREG(dreg);
	2936	SUBI(dreg, dst, src);
	2937	}
	2938
	2939	void tms3203x_device::subi_imm(UINT32 op)
	2940	{
	2941	UINT32 src = (INT16)op;
	2942	int dreg = (op >> 16) & 31;
	2943	UINT32 dst = IREG(dreg);
	2944	SUBI(dreg, dst, src);
	2945	}
	2946
	2947	/*-----------------------------------------------------*/
	2948
	2949	void tms3203x_device::subrb_reg(UINT32 op)
	2950	{
	2951	UINT32 src = IREG(op & 31);
	2952	int dreg = (op >> 16) & 31;
	2953	UINT32 dst = IREG(dreg);
	2954	SUBB(dreg, src, dst);
	2955	}
	2956
	2957	void tms3203x_device::subrb_dir(UINT32 op)
	2958	{
	2959	UINT32 src = RMEM(DIRECT(op));
	2960	int dreg = (op >> 16) & 31;
	2961	UINT32 dst = IREG(dreg);
	2962	SUBB(dreg, src, dst);
	2963	}
	2964
	2965	void tms3203x_device::subrb_ind(UINT32 op)
	2966	{
	2967	UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
	2968	int dreg = (op >> 16) & 31;
	2969	UINT32 dst = IREG(dreg);
	2970	SUBB(dreg, src, dst);
	2971	}
	2972
	2973	void tms3203x_device::subrb_imm(UINT32 op)
	2974	{
	2975	UINT32 src = (INT16)op;
	2976	int dreg = (op >> 16) & 31;
	2977	UINT32 dst = IREG(dreg);
	2978	SUBB(dreg, src, dst);
	2979	}
	2980
	2981	/*-----------------------------------------------------*/
	2982
	2983	void tms3203x_device::subrf_reg(UINT32 op)
	2984	{
	2985	int dreg = (op >> 16) & 7;
	2986	subf(m_r[dreg], m_r[op & 7], m_r[dreg]);
	2987	}
	2988
	2989	void tms3203x_device::subrf_dir(UINT32 op)
	2990	{
	2991	UINT32 res = RMEM(DIRECT(op));
	2992	int dreg = (op >> 16) & 7;
	2993	LONG2FP(TMR_TEMP1, res);
	2994	subf(m_r[dreg], m_r[TMR_TEMP1], m_r[dreg]);
	2995	}
	2996
	2997	void tms3203x_device::subrf_ind(UINT32 op)
	2998	{
	2999	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	3000	int dreg = (op >> 16) & 7;
	3001	LONG2FP(TMR_TEMP1, res);
	3002	subf(m_r[dreg], m_r[TMR_TEMP1], m_r[dreg]);
	3003	}
	3004
	3005	void tms3203x_device::subrf_imm(UINT32 op)
	3006	{
	3007	int dreg = (op >> 16) & 7;
	3008	SHORT2FP(TMR_TEMP1, op);
	3009	subf(m_r[dreg], m_r[TMR_TEMP1], m_r[dreg]);
	3010	}
	3011
	3012	/*-----------------------------------------------------*/
	3013
	3014	void tms3203x_device::subri_reg(UINT32 op)
	3015	{
	3016	UINT32 src = IREG(op & 31);
	3017	int dreg = (op >> 16) & 31;
	3018	UINT32 dst = IREG(dreg);
	3019	SUBI(dreg, src, dst);
	3020	}
	3021
	3022	void tms3203x_device::subri_dir(UINT32 op)
	3023	{
	3024	UINT32 src = RMEM(DIRECT(op));
	3025	int dreg = (op >> 16) & 31;
	3026	UINT32 dst = IREG(dreg);
	3027	SUBI(dreg, src, dst);
	3028	}
	3029
	3030	void tms3203x_device::subri_ind(UINT32 op)
	3031	{
	3032	UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
	3033	int dreg = (op >> 16) & 31;
	3034	UINT32 dst = IREG(dreg);
	3035	SUBI(dreg, src, dst);
	3036	}
	3037
	3038	void tms3203x_device::subri_imm(UINT32 op)
	3039	{
	3040	UINT32 src = (INT16)op;
	3041	int dreg = (op >> 16) & 31;
	3042	UINT32 dst = IREG(dreg);
	3043	SUBI(dreg, src, dst);
	3044	}
	3045
	3046	/*-----------------------------------------------------*/
	3047
	3048	#define TSTB(src1, src2)                                            \
	3049	{                                                                   \
	3050	UINT32 _res = (src1) & (src2);                                  \
	3051	CLR_NZVUF();                                                    \
	3052	OR_NZ(_res);                                                    \
	3053	}
	3054
	3055	void tms3203x_device::tstb_reg(UINT32 op)
	3056	{
	3057	UINT32 src = IREG(op & 31);
	3058	UINT32 dst = IREG((op >> 16) & 31);
	3059	TSTB(dst, src);
	3060	}
	3061
	3062	void tms3203x_device::tstb_dir(UINT32 op)
	3063	{
	3064	UINT32 src = RMEM(DIRECT(op));
	3065	UINT32 dst = IREG((op >> 16) & 31);
	3066	TSTB(dst, src);
	3067	}
	3068
	3069	void tms3203x_device::tstb_ind(UINT32 op)
	3070	{
	3071	UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
	3072	UINT32 dst = IREG((op >> 16) & 31);
	3073	TSTB(dst, src);
	3074	}
	3075
	3076	void tms3203x_device::tstb_imm(UINT32 op)
	3077	{
	3078	UINT32 src = (UINT16)op;
	3079	UINT32 dst = IREG((op >> 16) & 31);
	3080	TSTB(dst, src);
	3081	}
	3082
	3083	/*-----------------------------------------------------*/
	3084
	3085	#define XOR(dreg, src1, src2)                                       \
	3086	{                                                                   \
	3087	UINT32 _res = (src1) ^ (src2);                                  \
	3088	IREG(dreg) = _res;                                              \
	3089	if (dreg < 8)                                                   \
	3090	{                                                               \
	3091	CLR_NZVUF();                                                \
	3092	OR_NZ(_res);                                                \
	3093	}                                                               \
	3094	else if (dreg >= TMR_BK)                                        \
	3095	update_special(dreg);                                       \
	3096	}
	3097
	3098	void tms3203x_device::xor_reg(UINT32 op)
	3099	{
	3100	UINT32 src = IREG(op & 31);
	3101	int dreg = (op >> 16) & 31;
	3102	UINT32 dst = IREG(dreg);
	3103	XOR(dreg, dst, src);
	3104	}
	3105
	3106	void tms3203x_device::xor_dir(UINT32 op)
	3107	{
	3108	UINT32 src = RMEM(DIRECT(op));
	3109	int dreg = (op >> 16) & 31;
	3110	UINT32 dst = IREG(dreg);
	3111	XOR(dreg, dst, src);
	3112	}
	3113
	3114	void tms3203x_device::xor_ind(UINT32 op)
	3115	{
	3116	UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
	3117	int dreg = (op >> 16) & 31;
	3118	UINT32 dst = IREG(dreg);
	3119	XOR(dreg, dst, src);
	3120	}
	3121
	3122	void tms3203x_device::xor_imm(UINT32 op)
	3123	{
	3124	UINT32 src = (UINT16)op;
	3125	int dreg = (op >> 16) & 31;
	3126	UINT32 dst = IREG(dreg);
	3127	XOR(dreg, dst, src);
	3128	}
	3129
	3130	/*-----------------------------------------------------*/
	3131
	3132	void tms3203x_device::iack_dir(UINT32 op)
	3133	{
	3134	offs_t addr = DIRECT(op);
	3135	m_iack_cb(addr, ASSERT_LINE);
	3136	RMEM(addr);
	3137	m_iack_cb(addr, CLEAR_LINE);
	3138	}
	3139
	3140	void tms3203x_device::iack_ind(UINT32 op)
	3141	{
	3142	offs_t addr = INDIRECT_D(op, op >> 8);
	3143	m_iack_cb(addr, ASSERT_LINE);
	3144	RMEM(addr);
	3145	m_iack_cb(addr, CLEAR_LINE);
	3146	}
	3147
	3148	/*-----------------------------------------------------*/
	3149
	3150	void tms3203x_device::addc3_regreg(UINT32 op)
	3151	{
	3152	UINT32 src1 = IREG((op >> 8) & 31);
	3153	UINT32 src2 = IREG(op & 31);
	3154	int dreg = (op >> 16) & 31;
	3155	ADDC(dreg, src1, src2);
	3156	}
	3157
	3158	void tms3203x_device::addc3_indreg(UINT32 op)
	3159	{
	3160	UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
	3161	UINT32 src2 = IREG(op & 31);
	3162	int dreg = (op >> 16) & 31;
	3163	ADDC(dreg, src1, src2);
	3164	}
	3165
	3166	void tms3203x_device::addc3_regind(UINT32 op)
	3167	{
	3168	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3169	UINT32 src1 = IREG((op >> 8) & 31);
	3170	int dreg = (op >> 16) & 31;
	3171	ADDC(dreg, src1, src2);
	3172	}
	3173
	3174	void tms3203x_device::addc3_indind(UINT32 op)
	3175	{
	3176	DECLARE_DEF;
	3177	UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	3178	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3179	int dreg = (op >> 16) & 31;
	3180	UPDATE_DEF();
	3181	ADDC(dreg, src1, src2);
	3182	}
	3183
	3184	/*-----------------------------------------------------*/
	3185
	3186	void tms3203x_device::addf3_regreg(UINT32 op)
	3187	{
	3188	int sreg1 = (op >> 8) & 7;
	3189	int sreg2 = op & 7;
	3190	int dreg = (op >> 16) & 7;
	3191	addf(m_r[dreg], m_r[sreg1], m_r[sreg2]);
	3192	}
	3193
	3194	void tms3203x_device::addf3_indreg(UINT32 op)
	3195	{
	3196	UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
	3197	int sreg2 = op & 7;
	3198	int dreg = (op >> 16) & 7;
	3199	LONG2FP(TMR_TEMP1, src1);
	3200	addf(m_r[dreg], m_r[TMR_TEMP1], m_r[sreg2]);
	3201	}
	3202
	3203	void tms3203x_device::addf3_regind(UINT32 op)
	3204	{
	3205	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3206	int sreg1 = (op >> 8) & 7;
	3207	int dreg = (op >> 16) & 7;
	3208	LONG2FP(TMR_TEMP2, src2);
	3209	addf(m_r[dreg], m_r[sreg1], m_r[TMR_TEMP2]);
	3210	}
	3211
	3212	void tms3203x_device::addf3_indind(UINT32 op)
	3213	{
	3214	DECLARE_DEF;
	3215	UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	3216	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3217	int dreg = (op >> 16) & 7;
	3218	UPDATE_DEF();
	3219	LONG2FP(TMR_TEMP1, src1);
	3220	LONG2FP(TMR_TEMP2, src2);
	3221	addf(m_r[dreg], m_r[TMR_TEMP1], m_r[TMR_TEMP2]);
	3222	}
	3223
	3224	/*-----------------------------------------------------*/
	3225
	3226	void tms3203x_device::addi3_regreg(UINT32 op)
	3227	{
	3228	UINT32 src1 = IREG((op >> 8) & 31);
	3229	UINT32 src2 = IREG(op & 31);
	3230	int dreg = (op >> 16) & 31;
	3231	ADDI(dreg, src1, src2);
	3232	}
	3233
	3234	void tms3203x_device::addi3_indreg(UINT32 op)
	3235	{
	3236	UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
	3237	UINT32 src2 = IREG(op & 31);
	3238	int dreg = (op >> 16) & 31;
	3239	ADDI(dreg, src1, src2);
	3240	}
	3241
	3242	void tms3203x_device::addi3_regind(UINT32 op)
	3243	{
	3244	// Radikal Bikers confirms via ADDI3 AR3,*AR3++(1),R2 / SUB $0001,R2 sequence
	3245	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3246	UINT32 src1 = IREG((op >> 8) & 31);
	3247	int dreg = (op >> 16) & 31;
	3248	ADDI(dreg, src1, src2);
	3249	}
	3250
	3251	void tms3203x_device::addi3_indind(UINT32 op)
	3252	{
	3253	DECLARE_DEF;
	3254	UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	3255	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3256	int dreg = (op >> 16) & 31;
	3257	UPDATE_DEF();
	3258	ADDI(dreg, src1, src2);
	3259	}
	3260
	3261	/*-----------------------------------------------------*/
	3262
	3263	void tms3203x_device::and3_regreg(UINT32 op)
	3264	{
	3265	UINT32 src1 = IREG((op >> 8) & 31);
	3266	UINT32 src2 = IREG(op & 31);
	3267	int dreg = (op >> 16) & 31;
	3268	AND(dreg, src1, src2);
	3269	}
	3270
	3271	void tms3203x_device::and3_indreg(UINT32 op)
	3272	{
	3273	UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
	3274	UINT32 src2 = IREG(op & 31);
	3275	int dreg = (op >> 16) & 31;
	3276	AND(dreg, src1, src2);
	3277	}
	3278
	3279	void tms3203x_device::and3_regind(UINT32 op)
	3280	{
	3281	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3282	UINT32 src1 = IREG((op >> 8) & 31);
	3283	int dreg = (op >> 16) & 31;
	3284	AND(dreg, src1, src2);
	3285	}
	3286
	3287	void tms3203x_device::and3_indind(UINT32 op)
	3288	{
	3289	DECLARE_DEF;
	3290	UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	3291	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3292	int dreg = (op >> 16) & 31;
	3293	UPDATE_DEF();
	3294	AND(dreg, src1, src2);
	3295	}
	3296
	3297	/*-----------------------------------------------------*/
	3298
	3299	void tms3203x_device::andn3_regreg(UINT32 op)
	3300	{
	3301	UINT32 src1 = IREG((op >> 8) & 31);
	3302	UINT32 src2 = IREG(op & 31);
	3303	int dreg = (op >> 16) & 31;
	3304	ANDN(dreg, src1, src2);
	3305	}
	3306
	3307	void tms3203x_device::andn3_indreg(UINT32 op)
	3308	{
	3309	UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
	3310	UINT32 src2 = IREG(op & 31);
	3311	int dreg = (op >> 16) & 31;
	3312	ANDN(dreg, src1, src2);
	3313	}
	3314
	3315	void tms3203x_device::andn3_regind(UINT32 op)
	3316	{
	3317	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3318	UINT32 src1 = IREG((op >> 8) & 31);
	3319	int dreg = (op >> 16) & 31;
	3320	ANDN(dreg, src1, src2);
	3321	}
	3322
	3323	void tms3203x_device::andn3_indind(UINT32 op)
	3324	{
	3325	DECLARE_DEF;
	3326	UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	3327	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3328	int dreg = (op >> 16) & 31;
	3329	UPDATE_DEF();
	3330	ANDN(dreg, src1, src2);
	3331	}
	3332
	3333	/*-----------------------------------------------------*/
	3334
	3335	void tms3203x_device::ash3_regreg(UINT32 op)
	3336	{
	3337	UINT32 src1 = IREG((op >> 8) & 31);
	3338	UINT32 src2 = IREG(op & 31);
	3339	int dreg = (op >> 16) & 31;
	3340	ASH(dreg, src1, src2);
	3341	}
	3342
	3343	void tms3203x_device::ash3_indreg(UINT32 op)
	3344	{
	3345	UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
	3346	UINT32 src2 = IREG(op & 31);
	3347	int dreg = (op >> 16) & 31;
	3348	ASH(dreg, src1, src2);
	3349	}
	3350
	3351	void tms3203x_device::ash3_regind(UINT32 op)
	3352	{
	3353	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3354	UINT32 src1 = IREG((op >> 8) & 31);
	3355	int dreg = (op >> 16) & 31;
	3356	ASH(dreg, src1, src2);
	3357	}
	3358
	3359	void tms3203x_device::ash3_indind(UINT32 op)
	3360	{
	3361	DECLARE_DEF;
	3362	UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	3363	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3364	int dreg = (op >> 16) & 31;
	3365	UPDATE_DEF();
	3366	ASH(dreg, src1, src2);
	3367	}
	3368
	3369	/*-----------------------------------------------------*/
	3370
	3371	void tms3203x_device::cmpf3_regreg(UINT32 op)
	3372	{
	3373	int sreg1 = (op >> 8) & 7;
	3374	int sreg2 = op & 7;
	3375	subf(m_r[TMR_TEMP1], m_r[sreg1], m_r[sreg2]);
	3376	}
	3377
	3378	void tms3203x_device::cmpf3_indreg(UINT32 op)
	3379	{
	3380	UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
	3381	int sreg2 = op & 7;
	3382	LONG2FP(TMR_TEMP1, src1);
	3383	subf(m_r[TMR_TEMP1], m_r[TMR_TEMP1], m_r[sreg2]);
	3384	}
	3385
	3386	void tms3203x_device::cmpf3_regind(UINT32 op)
	3387	{
	3388	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3389	int sreg1 = (op >> 8) & 7;
	3390	LONG2FP(TMR_TEMP2, src2);
	3391	subf(m_r[TMR_TEMP1], m_r[sreg1], m_r[TMR_TEMP2]);
	3392	}
	3393
	3394	void tms3203x_device::cmpf3_indind(UINT32 op)
	3395	{
	3396	DECLARE_DEF;
	3397	UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	3398	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3399	UPDATE_DEF();
	3400	LONG2FP(TMR_TEMP1, src1);
	3401	LONG2FP(TMR_TEMP2, src2);
	3402	subf(m_r[TMR_TEMP1], m_r[TMR_TEMP1], m_r[TMR_TEMP2]);
	3403	}
	3404
	3405	/*-----------------------------------------------------*/
	3406
	3407	void tms3203x_device::cmpi3_regreg(UINT32 op)
	3408	{
	3409	UINT32 src1 = IREG((op >> 8) & 31);
	3410	UINT32 src2 = IREG(op & 31);
	3411	CMPI(src1, src2);
	3412	}
	3413
	3414	void tms3203x_device::cmpi3_indreg(UINT32 op)
	3415	{
	3416	UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
	3417	UINT32 src2 = IREG(op & 31);
	3418	CMPI(src1, src2);
	3419	}
	3420
	3421	void tms3203x_device::cmpi3_regind(UINT32 op)
	3422	{
	3423	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3424	UINT32 src1 = IREG((op >> 8) & 31);
	3425	CMPI(src1, src2);
	3426	}
	3427
	3428	void tms3203x_device::cmpi3_indind(UINT32 op)
	3429	{
	3430	DECLARE_DEF;
	3431	UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	3432	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3433	UPDATE_DEF();
	3434	CMPI(src1, src2);
	3435	}
	3436
	3437	/*-----------------------------------------------------*/
	3438
	3439	void tms3203x_device::lsh3_regreg(UINT32 op)
	3440	{
	3441	UINT32 src1 = IREG((op >> 8) & 31);
	3442	UINT32 src2 = IREG(op & 31);
	3443	int dreg = (op >> 16) & 31;
	3444	LSH(dreg, src1, src2);
	3445	}
	3446
	3447	void tms3203x_device::lsh3_indreg(UINT32 op)
	3448	{
	3449	UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
	3450	UINT32 src2 = IREG(op & 31);
	3451	int dreg = (op >> 16) & 31;
	3452	LSH(dreg, src1, src2);
	3453	}
	3454
	3455	void tms3203x_device::lsh3_regind(UINT32 op)
	3456	{
	3457	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3458	UINT32 src1 = IREG((op >> 8) & 31);
	3459	int dreg = (op >> 16) & 31;
	3460	LSH(dreg, src1, src2);
	3461	}
	3462
	3463	void tms3203x_device::lsh3_indind(UINT32 op)
	3464	{
	3465	DECLARE_DEF;
	3466	UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	3467	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3468	int dreg = (op >> 16) & 31;
	3469	UPDATE_DEF();
	3470	LSH(dreg, src1, src2);
	3471	}
	3472
	3473	/*-----------------------------------------------------*/
	3474
	3475	void tms3203x_device::mpyf3_regreg(UINT32 op)
	3476	{
	3477	int sreg1 = (op >> 8) & 7;
	3478	int sreg2 = op & 7;
	3479	int dreg = (op >> 16) & 7;
	3480	mpyf(m_r[dreg], m_r[sreg1], m_r[sreg2]);
	3481	}
	3482
	3483	void tms3203x_device::mpyf3_indreg(UINT32 op)
	3484	{
	3485	UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
	3486	int sreg2 = op & 7;
	3487	int dreg = (op >> 16) & 7;
	3488	LONG2FP(TMR_TEMP1, src1);
	3489	mpyf(m_r[dreg], m_r[TMR_TEMP1], m_r[sreg2]);
	3490	}
	3491
	3492	void tms3203x_device::mpyf3_regind(UINT32 op)
	3493	{
	3494	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3495	int sreg1 = (op >> 8) & 7;
	3496	int dreg = (op >> 16) & 7;
	3497	LONG2FP(TMR_TEMP2, src2);
	3498	mpyf(m_r[dreg], m_r[sreg1], m_r[TMR_TEMP2]);
	3499	}
	3500
	3501	void tms3203x_device::mpyf3_indind(UINT32 op)
	3502	{
	3503	DECLARE_DEF;
	3504	UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	3505	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3506	int dreg = (op >> 16) & 7;
	3507	UPDATE_DEF();
	3508	LONG2FP(TMR_TEMP1, src1);
	3509	LONG2FP(TMR_TEMP2, src2);
	3510	mpyf(m_r[dreg], m_r[TMR_TEMP1], m_r[TMR_TEMP2]);
	3511	}
	3512
	3513	/*-----------------------------------------------------*/
	3514
	3515	void tms3203x_device::mpyi3_regreg(UINT32 op)
	3516	{
	3517	UINT32 src1 = IREG((op >> 8) & 31);
	3518	UINT32 src2 = IREG(op & 31);
	3519	int dreg = (op >> 16) & 31;
	3520	MPYI(dreg, src1, src2);
	3521	}
	3522
	3523	void tms3203x_device::mpyi3_indreg(UINT32 op)
	3524	{
	3525	UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
	3526	UINT32 src2 = IREG(op & 31);
	3527	int dreg = (op >> 16) & 31;
	3528	MPYI(dreg, src1, src2);
	3529	}
	3530
	3531	void tms3203x_device::mpyi3_regind(UINT32 op)
	3532	{
	3533	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3534	UINT32 src1 = IREG((op >> 8) & 31);
	3535	int dreg = (op >> 16) & 31;
	3536	MPYI(dreg, src1, src2);
	3537	}
	3538
	3539	void tms3203x_device::mpyi3_indind(UINT32 op)
	3540	{
	3541	DECLARE_DEF;
	3542	UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	3543	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3544	int dreg = (op >> 16) & 31;
	3545	UPDATE_DEF();
	3546	MPYI(dreg, src1, src2);
	3547	}
	3548
	3549	/*-----------------------------------------------------*/
	3550
	3551	void tms3203x_device::or3_regreg(UINT32 op)
	3552	{
	3553	UINT32 src1 = IREG((op >> 8) & 31);
	3554	UINT32 src2 = IREG(op & 31);
	3555	int dreg = (op >> 16) & 31;
	3556	OR(dreg, src1, src2);
	3557	}
	3558
	3559	void tms3203x_device::or3_indreg(UINT32 op)
	3560	{
	3561	UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
	3562	UINT32 src2 = IREG(op & 31);
	3563	int dreg = (op >> 16) & 31;
	3564	OR(dreg, src1, src2);
	3565	}
	3566
	3567	void tms3203x_device::or3_regind(UINT32 op)
	3568	{
	3569	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3570	UINT32 src1 = IREG((op >> 8) & 31);
	3571	int dreg = (op >> 16) & 31;
	3572	OR(dreg, src1, src2);
	3573	}
	3574
	3575	void tms3203x_device::or3_indind(UINT32 op)
	3576	{
	3577	DECLARE_DEF;
	3578	UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	3579	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3580	int dreg = (op >> 16) & 31;
	3581	UPDATE_DEF();
	3582	OR(dreg, src1, src2);
	3583	}
	3584
	3585	/*-----------------------------------------------------*/
	3586
	3587	void tms3203x_device::subb3_regreg(UINT32 op)
	3588	{
	3589	UINT32 src1 = IREG((op >> 8) & 31);
	3590	UINT32 src2 = IREG(op & 31);
	3591	int dreg = (op >> 16) & 31;
	3592	SUBB(dreg, src1, src2);
	3593	}
	3594
	3595	void tms3203x_device::subb3_indreg(UINT32 op)
	3596	{
	3597	UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
	3598	UINT32 src2 = IREG(op & 31);
	3599	int dreg = (op >> 16) & 31;
	3600	SUBB(dreg, src1, src2);
	3601	}
	3602
	3603	void tms3203x_device::subb3_regind(UINT32 op)
	3604	{
	3605	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3606	UINT32 src1 = IREG((op >> 8) & 31);
	3607	int dreg = (op >> 16) & 31;
	3608	SUBB(dreg, src1, src2);
	3609	}
	3610
	3611	void tms3203x_device::subb3_indind(UINT32 op)
	3612	{
	3613	DECLARE_DEF;
	3614	UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	3615	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3616	int dreg = (op >> 16) & 31;
	3617	UPDATE_DEF();
	3618	SUBB(dreg, src1, src2);
	3619	}
	3620
	3621	/*-----------------------------------------------------*/
	3622
	3623	void tms3203x_device::subf3_regreg(UINT32 op)
	3624	{
	3625	int sreg1 = (op >> 8) & 7;
	3626	int sreg2 = op & 7;
	3627	int dreg = (op >> 16) & 7;
	3628	subf(m_r[dreg], m_r[sreg1], m_r[sreg2]);
	3629	}
	3630
	3631	void tms3203x_device::subf3_indreg(UINT32 op)
	3632	{
	3633	UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
	3634	int sreg2 = op & 7;
	3635	int dreg = (op >> 16) & 7;
	3636	LONG2FP(TMR_TEMP1, src1);
	3637	subf(m_r[dreg], m_r[TMR_TEMP1], m_r[sreg2]);
	3638	}
	3639
	3640	void tms3203x_device::subf3_regind(UINT32 op)
	3641	{
	3642	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3643	int sreg1 = (op >> 8) & 7;
	3644	int dreg = (op >> 16) & 7;
	3645	LONG2FP(TMR_TEMP2, src2);
	3646	subf(m_r[dreg], m_r[sreg1], m_r[TMR_TEMP2]);
	3647	}
	3648
	3649	void tms3203x_device::subf3_indind(UINT32 op)
	3650	{
	3651	DECLARE_DEF;
	3652	UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	3653	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3654	int dreg = (op >> 16) & 7;
	3655	UPDATE_DEF();
	3656	LONG2FP(TMR_TEMP1, src1);
	3657	LONG2FP(TMR_TEMP2, src2);
	3658	subf(m_r[dreg], m_r[TMR_TEMP1], m_r[TMR_TEMP2]);
	3659	}
	3660
	3661	/*-----------------------------------------------------*/
	3662
	3663	void tms3203x_device::subi3_regreg(UINT32 op)
	3664	{
	3665	UINT32 src1 = IREG((op >> 8) & 31);
	3666	UINT32 src2 = IREG(op & 31);
	3667	int dreg = (op >> 16) & 31;
	3668	SUBI(dreg, src1, src2);
	3669	}
	3670
	3671	void tms3203x_device::subi3_indreg(UINT32 op)
	3672	{
	3673	UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
	3674	UINT32 src2 = IREG(op & 31);
	3675	int dreg = (op >> 16) & 31;
	3676	SUBI(dreg, src1, src2);
	3677	}
	3678
	3679	void tms3203x_device::subi3_regind(UINT32 op)
	3680	{
	3681	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3682	UINT32 src1 = IREG((op >> 8) & 31);
	3683	int dreg = (op >> 16) & 31;
	3684	SUBI(dreg, src1, src2);
	3685	}
	3686
	3687	void tms3203x_device::subi3_indind(UINT32 op)
	3688	{
	3689	DECLARE_DEF;
	3690	UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	3691	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3692	int dreg = (op >> 16) & 31;
	3693	UPDATE_DEF();
	3694	SUBI(dreg, src1, src2);
	3695	}
	3696
	3697	/*-----------------------------------------------------*/
	3698
	3699	void tms3203x_device::tstb3_regreg(UINT32 op)
	3700	{
	3701	UINT32 src1 = IREG((op >> 8) & 31);
	3702	UINT32 src2 = IREG(op & 31);
	3703	TSTB(src1, src2);
	3704	}
	3705
	3706	void tms3203x_device::tstb3_indreg(UINT32 op)
	3707	{
	3708	UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
	3709	UINT32 src2 = IREG(op & 31);
	3710	TSTB(src1, src2);
	3711	}
	3712
	3713	void tms3203x_device::tstb3_regind(UINT32 op)
	3714	{
	3715	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3716	UINT32 src1 = IREG((op >> 8) & 31);
	3717	TSTB(src1, src2);
	3718	}
	3719
	3720	void tms3203x_device::tstb3_indind(UINT32 op)
	3721	{
	3722	DECLARE_DEF;
	3723	UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	3724	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3725	UPDATE_DEF();
	3726	TSTB(src1, src2);
	3727	}
	3728
	3729	/*-----------------------------------------------------*/
	3730
	3731	void tms3203x_device::xor3_regreg(UINT32 op)
	3732	{
	3733	UINT32 src1 = IREG((op >> 8) & 31);
	3734	UINT32 src2 = IREG(op & 31);
	3735	int dreg = (op >> 16) & 31;
	3736	XOR(dreg, src1, src2);
	3737	}
	3738
	3739	void tms3203x_device::xor3_indreg(UINT32 op)
	3740	{
	3741	UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
	3742	UINT32 src2 = IREG(op & 31);
	3743	int dreg = (op >> 16) & 31;
	3744	XOR(dreg, src1, src2);
	3745	}
	3746
	3747	void tms3203x_device::xor3_regind(UINT32 op)
	3748	{
	3749	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3750	UINT32 src1 = IREG((op >> 8) & 31);
	3751	int dreg = (op >> 16) & 31;
	3752	XOR(dreg, src1, src2);
	3753	}
	3754
	3755	void tms3203x_device::xor3_indind(UINT32 op)
	3756	{
	3757	DECLARE_DEF;
	3758	UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	3759	UINT32 src2 = RMEM(INDIRECT_1(op, op));
	3760	int dreg = (op >> 16) & 31;
	3761	UPDATE_DEF();
	3762	XOR(dreg, src1, src2);
	3763	}
	3764
	3765	/*-----------------------------------------------------*/
	3766
	3767	void tms3203x_device::ldfu_reg(UINT32 op)
	3768	{
	3769	m_r[(op >> 16) & 7] = m_r[op & 7];
	3770	}
	3771
	3772	void tms3203x_device::ldfu_dir(UINT32 op)
	3773	{
	3774	UINT32 res = RMEM(DIRECT(op));
	3775	int dreg = (op >> 16) & 7;
	3776	LONG2FP(dreg, res);
	3777	}
	3778
	3779	void tms3203x_device::ldfu_ind(UINT32 op)
	3780	{
	3781	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	3782	int dreg = (op >> 16) & 7;
	3783	LONG2FP(dreg, res);
	3784	}
	3785
	3786	void tms3203x_device::ldfu_imm(UINT32 op)
	3787	{
	3788	int dreg = (op >> 16) & 7;
	3789	SHORT2FP(dreg, op);
	3790	}
	3791
	3792	/*-----------------------------------------------------*/
	3793
	3794	void tms3203x_device::ldflo_reg(UINT32 op)
	3795	{
	3796	if (CONDITION_LO())
	3797	m_r[(op >> 16) & 7] = m_r[op & 7];
	3798	}
	3799
	3800	void tms3203x_device::ldflo_dir(UINT32 op)
	3801	{
	3802	if (CONDITION_LO())
	3803	{
	3804	UINT32 res = RMEM(DIRECT(op));
	3805	int dreg = (op >> 16) & 7;
	3806	LONG2FP(dreg, res);
	3807	}
	3808	}
	3809
	3810	void tms3203x_device::ldflo_ind(UINT32 op)
	3811	{
	3812	if (CONDITION_LO())
	3813	{
	3814	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	3815	int dreg = (op >> 16) & 7;
	3816	LONG2FP(dreg, res);
	3817	}
	3818	else
	3819	INDIRECT_D(op, op >> 8);
	3820	}
	3821
	3822	void tms3203x_device::ldflo_imm(UINT32 op)
	3823	{
	3824	if (CONDITION_LO())
	3825	{
	3826	int dreg = (op >> 16) & 7;
	3827	SHORT2FP(dreg, op);
	3828	}
	3829	}
	3830
	3831	/*-----------------------------------------------------*/
	3832
	3833	void tms3203x_device::ldfls_reg(UINT32 op)
	3834	{
	3835	if (CONDITION_LS())
	3836	m_r[(op >> 16) & 7] = m_r[op & 7];
	3837	}
	3838
	3839	void tms3203x_device::ldfls_dir(UINT32 op)
	3840	{
	3841	if (CONDITION_LS())
	3842	{
	3843	UINT32 res = RMEM(DIRECT(op));
	3844	int dreg = (op >> 16) & 7;
	3845	LONG2FP(dreg, res);
	3846	}
	3847	}
	3848
	3849	void tms3203x_device::ldfls_ind(UINT32 op)
	3850	{
	3851	if (CONDITION_LS())
	3852	{
	3853	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	3854	int dreg = (op >> 16) & 7;
	3855	LONG2FP(dreg, res);
	3856	}
	3857	else
	3858	INDIRECT_D(op, op >> 8);
	3859	}
	3860
	3861	void tms3203x_device::ldfls_imm(UINT32 op)
	3862	{
	3863	if (CONDITION_LS())
	3864	{
	3865	int dreg = (op >> 16) & 7;
	3866	SHORT2FP(dreg, op);
	3867	}
	3868	}
	3869
	3870	/*-----------------------------------------------------*/
	3871
	3872	void tms3203x_device::ldfhi_reg(UINT32 op)
	3873	{
	3874	if (CONDITION_HI())
	3875	m_r[(op >> 16) & 7] = m_r[op & 7];
	3876	}
	3877
	3878	void tms3203x_device::ldfhi_dir(UINT32 op)
	3879	{
	3880	if (CONDITION_HI())
	3881	{
	3882	UINT32 res = RMEM(DIRECT(op));
	3883	int dreg = (op >> 16) & 7;
	3884	LONG2FP(dreg, res);
	3885	}
	3886	}
	3887
	3888	void tms3203x_device::ldfhi_ind(UINT32 op)
	3889	{
	3890	if (CONDITION_HI())
	3891	{
	3892	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	3893	int dreg = (op >> 16) & 7;
	3894	LONG2FP(dreg, res);
	3895	}
	3896	else
	3897	INDIRECT_D(op, op >> 8);
	3898	}
	3899
	3900	void tms3203x_device::ldfhi_imm(UINT32 op)
	3901	{
	3902	if (CONDITION_HI())
	3903	{
	3904	int dreg = (op >> 16) & 7;
	3905	SHORT2FP(dreg, op);
	3906	}
	3907	}
	3908
	3909	/*-----------------------------------------------------*/
	3910
	3911	void tms3203x_device::ldfhs_reg(UINT32 op)
	3912	{
	3913	if (CONDITION_HS())
	3914	m_r[(op >> 16) & 7] = m_r[op & 7];
	3915	}
	3916
	3917	void tms3203x_device::ldfhs_dir(UINT32 op)
	3918	{
	3919	if (CONDITION_HS())
	3920	{
	3921	UINT32 res = RMEM(DIRECT(op));
	3922	int dreg = (op >> 16) & 7;
	3923	LONG2FP(dreg, res);
	3924	}
	3925	}
	3926
	3927	void tms3203x_device::ldfhs_ind(UINT32 op)
	3928	{
	3929	if (CONDITION_HS())
	3930	{
	3931	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	3932	int dreg = (op >> 16) & 7;
	3933	LONG2FP(dreg, res);
	3934	}
	3935	else
	3936	INDIRECT_D(op, op >> 8);
	3937	}
	3938
	3939	void tms3203x_device::ldfhs_imm(UINT32 op)
	3940	{
	3941	if (CONDITION_HS())
	3942	{
	3943	int dreg = (op >> 16) & 7;
	3944	SHORT2FP(dreg, op);
	3945	}
	3946	}
	3947
	3948	/*-----------------------------------------------------*/
	3949
	3950	void tms3203x_device::ldfeq_reg(UINT32 op)
	3951	{
	3952	if (CONDITION_EQ())
	3953	m_r[(op >> 16) & 7] = m_r[op & 7];
	3954	}
	3955
	3956	void tms3203x_device::ldfeq_dir(UINT32 op)
	3957	{
	3958	if (CONDITION_EQ())
	3959	{
	3960	UINT32 res = RMEM(DIRECT(op));
	3961	int dreg = (op >> 16) & 7;
	3962	LONG2FP(dreg, res);
	3963	}
	3964	}
	3965
	3966	void tms3203x_device::ldfeq_ind(UINT32 op)
	3967	{
	3968	if (CONDITION_EQ())
	3969	{
	3970	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	3971	int dreg = (op >> 16) & 7;
	3972	LONG2FP(dreg, res);
	3973	}
	3974	else
	3975	INDIRECT_D(op, op >> 8);
	3976	}
	3977
	3978	void tms3203x_device::ldfeq_imm(UINT32 op)
	3979	{
	3980	if (CONDITION_EQ())
	3981	{
	3982	int dreg = (op >> 16) & 7;
	3983	SHORT2FP(dreg, op);
	3984	}
	3985	}
	3986
	3987	/*-----------------------------------------------------*/
	3988
	3989	void tms3203x_device::ldfne_reg(UINT32 op)
	3990	{
	3991	if (CONDITION_NE())
	3992	m_r[(op >> 16) & 7] = m_r[op & 7];
	3993	}
	3994
	3995	void tms3203x_device::ldfne_dir(UINT32 op)
	3996	{
	3997	if (CONDITION_NE())
	3998	{
	3999	UINT32 res = RMEM(DIRECT(op));
	4000	int dreg = (op >> 16) & 7;
	4001	LONG2FP(dreg, res);
	4002	}
	4003	}
	4004
	4005	void tms3203x_device::ldfne_ind(UINT32 op)
	4006	{
	4007	if (CONDITION_NE())
	4008	{
	4009	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	4010	int dreg = (op >> 16) & 7;
	4011	LONG2FP(dreg, res);
	4012	}
	4013	else
	4014	INDIRECT_D(op, op >> 8);
	4015	}
	4016
	4017	void tms3203x_device::ldfne_imm(UINT32 op)
	4018	{
	4019	if (CONDITION_NE())
	4020	{
	4021	int dreg = (op >> 16) & 7;
	4022	SHORT2FP(dreg, op);
	4023	}
	4024	}
	4025
	4026	/*-----------------------------------------------------*/
	4027
	4028	void tms3203x_device::ldflt_reg(UINT32 op)
	4029	{
	4030	if (CONDITION_LT())
	4031	m_r[(op >> 16) & 7] = m_r[op & 7];
	4032	}
	4033
	4034	void tms3203x_device::ldflt_dir(UINT32 op)
	4035	{
	4036	if (CONDITION_LT())
	4037	{
	4038	UINT32 res = RMEM(DIRECT(op));
	4039	int dreg = (op >> 16) & 7;
	4040	LONG2FP(dreg, res);
	4041	}
	4042	}
	4043
	4044	void tms3203x_device::ldflt_ind(UINT32 op)
	4045	{
	4046	if (CONDITION_LT())
	4047	{
	4048	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	4049	int dreg = (op >> 16) & 7;
	4050	LONG2FP(dreg, res);
	4051	}
	4052	else
	4053	INDIRECT_D(op, op >> 8);
	4054	}
	4055
	4056	void tms3203x_device::ldflt_imm(UINT32 op)
	4057	{
	4058	if (CONDITION_LT())
	4059	{
	4060	int dreg = (op >> 16) & 7;
	4061	SHORT2FP(dreg, op);
	4062	}
	4063	}
	4064
	4065	/*-----------------------------------------------------*/
	4066
	4067	void tms3203x_device::ldfle_reg(UINT32 op)
	4068	{
	4069	if (CONDITION_LE())
	4070	m_r[(op >> 16) & 7] = m_r[op & 7];
	4071	}
	4072
	4073	void tms3203x_device::ldfle_dir(UINT32 op)
	4074	{
	4075	if (CONDITION_LE())
	4076	{
	4077	UINT32 res = RMEM(DIRECT(op));
	4078	int dreg = (op >> 16) & 7;
	4079	LONG2FP(dreg, res);
	4080	}
	4081	}
	4082
	4083	void tms3203x_device::ldfle_ind(UINT32 op)
	4084	{
	4085	if (CONDITION_LE())
	4086	{
	4087	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	4088	int dreg = (op >> 16) & 7;
	4089	LONG2FP(dreg, res);
	4090	}
	4091	else
	4092	INDIRECT_D(op, op >> 8);
	4093	}
	4094
	4095	void tms3203x_device::ldfle_imm(UINT32 op)
	4096	{
	4097	if (CONDITION_LE())
	4098	{
	4099	int dreg = (op >> 16) & 7;
	4100	SHORT2FP(dreg, op);
	4101	}
	4102	}
	4103
	4104	/*-----------------------------------------------------*/
	4105
	4106	void tms3203x_device::ldfgt_reg(UINT32 op)
	4107	{
	4108	if (CONDITION_GT())
	4109	m_r[(op >> 16) & 7] = m_r[op & 7];
	4110	}
	4111
	4112	void tms3203x_device::ldfgt_dir(UINT32 op)
	4113	{
	4114	if (CONDITION_GT())
	4115	{
	4116	UINT32 res = RMEM(DIRECT(op));
	4117	int dreg = (op >> 16) & 7;
	4118	LONG2FP(dreg, res);
	4119	}
	4120	}
	4121
	4122	void tms3203x_device::ldfgt_ind(UINT32 op)
	4123	{
	4124	if (CONDITION_GT())
	4125	{
	4126	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	4127	int dreg = (op >> 16) & 7;
	4128	LONG2FP(dreg, res);
	4129	}
	4130	else
	4131	INDIRECT_D(op, op >> 8);
	4132	}
	4133
	4134	void tms3203x_device::ldfgt_imm(UINT32 op)
	4135	{
	4136	if (CONDITION_GT())
	4137	{
	4138	int dreg = (op >> 16) & 7;
	4139	SHORT2FP(dreg, op);
	4140	}
	4141	}
	4142
	4143	/*-----------------------------------------------------*/
	4144
	4145	void tms3203x_device::ldfge_reg(UINT32 op)
	4146	{
	4147	if (CONDITION_GE())
	4148	m_r[(op >> 16) & 7] = m_r[op & 7];
	4149	}
	4150
	4151	void tms3203x_device::ldfge_dir(UINT32 op)
	4152	{
	4153	if (CONDITION_GE())
	4154	{
	4155	UINT32 res = RMEM(DIRECT(op));
	4156	int dreg = (op >> 16) & 7;
	4157	LONG2FP(dreg, res);
	4158	}
	4159	}
	4160
	4161	void tms3203x_device::ldfge_ind(UINT32 op)
	4162	{
	4163	if (CONDITION_GE())
	4164	{
	4165	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	4166	int dreg = (op >> 16) & 7;
	4167	LONG2FP(dreg, res);
	4168	}
	4169	else
	4170	INDIRECT_D(op, op >> 8);
	4171	}
	4172
	4173	void tms3203x_device::ldfge_imm(UINT32 op)
	4174	{
	4175	if (CONDITION_GE())
	4176	{
	4177	int dreg = (op >> 16) & 7;
	4178	SHORT2FP(dreg, op);
	4179	}
	4180	}
	4181
	4182	/*-----------------------------------------------------*/
	4183
	4184	void tms3203x_device::ldfnv_reg(UINT32 op)
	4185	{
	4186	if (CONDITION_NV())
	4187	m_r[(op >> 16) & 7] = m_r[op & 7];
	4188	}
	4189
	4190	void tms3203x_device::ldfnv_dir(UINT32 op)
	4191	{
	4192	if (CONDITION_NV())
	4193	{
	4194	UINT32 res = RMEM(DIRECT(op));
	4195	int dreg = (op >> 16) & 7;
	4196	LONG2FP(dreg, res);
	4197	}
	4198	}
	4199
	4200	void tms3203x_device::ldfnv_ind(UINT32 op)
	4201	{
	4202	if (CONDITION_NV())
	4203	{
	4204	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	4205	int dreg = (op >> 16) & 7;
	4206	LONG2FP(dreg, res);
	4207	}
	4208	else
	4209	INDIRECT_D(op, op >> 8);
	4210	}
	4211
	4212	void tms3203x_device::ldfnv_imm(UINT32 op)
	4213	{
	4214	if (CONDITION_NV())
	4215	{
	4216	int dreg = (op >> 16) & 7;
	4217	SHORT2FP(dreg, op);
	4218	}
	4219	}
	4220
	4221	/*-----------------------------------------------------*/
	4222
	4223	void tms3203x_device::ldfv_reg(UINT32 op)
	4224	{
	4225	if (CONDITION_V())
	4226	m_r[(op >> 16) & 7] = m_r[op & 7];
	4227	}
	4228
	4229	void tms3203x_device::ldfv_dir(UINT32 op)
	4230	{
	4231	if (CONDITION_V())
	4232	{
	4233	UINT32 res = RMEM(DIRECT(op));
	4234	int dreg = (op >> 16) & 7;
	4235	LONG2FP(dreg, res);
	4236	}
	4237	}
	4238
	4239	void tms3203x_device::ldfv_ind(UINT32 op)
	4240	{
	4241	if (CONDITION_V())
	4242	{
	4243	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	4244	int dreg = (op >> 16) & 7;
	4245	LONG2FP(dreg, res);
	4246	}
	4247	else
	4248	INDIRECT_D(op, op >> 8);
	4249	}
	4250
	4251	void tms3203x_device::ldfv_imm(UINT32 op)
	4252	{
	4253	if (CONDITION_V())
	4254	{
	4255	int dreg = (op >> 16) & 7;
	4256	SHORT2FP(dreg, op);
	4257	}
	4258	}
	4259
	4260	/*-----------------------------------------------------*/
	4261
	4262	void tms3203x_device::ldfnuf_reg(UINT32 op)
	4263	{
	4264	if (CONDITION_NUF())
	4265	m_r[(op >> 16) & 7] = m_r[op & 7];
	4266	}
	4267
	4268	void tms3203x_device::ldfnuf_dir(UINT32 op)
	4269	{
	4270	if (CONDITION_NUF())
	4271	{
	4272	UINT32 res = RMEM(DIRECT(op));
	4273	int dreg = (op >> 16) & 7;
	4274	LONG2FP(dreg, res);
	4275	}
	4276	}
	4277
	4278	void tms3203x_device::ldfnuf_ind(UINT32 op)
	4279	{
	4280	if (CONDITION_NUF())
	4281	{
	4282	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	4283	int dreg = (op >> 16) & 7;
	4284	LONG2FP(dreg, res);
	4285	}
	4286	else
	4287	INDIRECT_D(op, op >> 8);
	4288	}
	4289
	4290	void tms3203x_device::ldfnuf_imm(UINT32 op)
	4291	{
	4292	if (CONDITION_NUF())
	4293	{
	4294	int dreg = (op >> 16) & 7;
	4295	SHORT2FP(dreg, op);
	4296	}
	4297	}
	4298
	4299	/*-----------------------------------------------------*/
	4300
	4301	void tms3203x_device::ldfuf_reg(UINT32 op)
	4302	{
	4303	if (CONDITION_UF())
	4304	m_r[(op >> 16) & 7] = m_r[op & 7];
	4305	}
	4306
	4307	void tms3203x_device::ldfuf_dir(UINT32 op)
	4308	{
	4309	if (CONDITION_UF())
	4310	{
	4311	UINT32 res = RMEM(DIRECT(op));
	4312	int dreg = (op >> 16) & 7;
	4313	LONG2FP(dreg, res);
	4314	}
	4315	}
	4316
	4317	void tms3203x_device::ldfuf_ind(UINT32 op)
	4318	{
	4319	if (CONDITION_UF())
	4320	{
	4321	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	4322	int dreg = (op >> 16) & 7;
	4323	LONG2FP(dreg, res);
	4324	}
	4325	else
	4326	INDIRECT_D(op, op >> 8);
	4327	}
	4328
	4329	void tms3203x_device::ldfuf_imm(UINT32 op)
	4330	{
	4331	if (CONDITION_UF())
	4332	{
	4333	int dreg = (op >> 16) & 7;
	4334	SHORT2FP(dreg, op);
	4335	}
	4336	}
	4337
	4338	/*-----------------------------------------------------*/
	4339
	4340	void tms3203x_device::ldfnlv_reg(UINT32 op)
	4341	{
	4342	if (CONDITION_NLV())
	4343	m_r[(op >> 16) & 7] = m_r[op & 7];
	4344	}
	4345
	4346	void tms3203x_device::ldfnlv_dir(UINT32 op)
	4347	{
	4348	if (CONDITION_NLV())
	4349	{
	4350	UINT32 res = RMEM(DIRECT(op));
	4351	int dreg = (op >> 16) & 7;
	4352	LONG2FP(dreg, res);
	4353	}
	4354	}
	4355
	4356	void tms3203x_device::ldfnlv_ind(UINT32 op)
	4357	{
	4358	if (CONDITION_NLV())
	4359	{
	4360	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	4361	int dreg = (op >> 16) & 7;
	4362	LONG2FP(dreg, res);
	4363	}
	4364	else
	4365	INDIRECT_D(op, op >> 8);
	4366	}
	4367
	4368	void tms3203x_device::ldfnlv_imm(UINT32 op)
	4369	{
	4370	if (CONDITION_NLV())
	4371	{
	4372	int dreg = (op >> 16) & 7;
	4373	SHORT2FP(dreg, op);
	4374	}
	4375	}
	4376
	4377	/*-----------------------------------------------------*/
	4378
	4379	void tms3203x_device::ldflv_reg(UINT32 op)
	4380	{
	4381	if (CONDITION_LV())
	4382	m_r[(op >> 16) & 7] = m_r[op & 7];
	4383	}
	4384
	4385	void tms3203x_device::ldflv_dir(UINT32 op)
	4386	{
	4387	if (CONDITION_LV())
	4388	{
	4389	UINT32 res = RMEM(DIRECT(op));
	4390	int dreg = (op >> 16) & 7;
	4391	LONG2FP(dreg, res);
	4392	}
	4393	}
	4394
	4395	void tms3203x_device::ldflv_ind(UINT32 op)
	4396	{
	4397	if (CONDITION_LV())
	4398	{
	4399	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	4400	int dreg = (op >> 16) & 7;
	4401	LONG2FP(dreg, res);
	4402	}
	4403	else
	4404	INDIRECT_D(op, op >> 8);
	4405	}
	4406
	4407	void tms3203x_device::ldflv_imm(UINT32 op)
	4408	{
	4409	if (CONDITION_LV())
	4410	{
	4411	int dreg = (op >> 16) & 7;
	4412	SHORT2FP(dreg, op);
	4413	}
	4414	}
	4415
	4416	/*-----------------------------------------------------*/
	4417
	4418	void tms3203x_device::ldfnluf_reg(UINT32 op)
	4419	{
	4420	if (CONDITION_NLUF())
	4421	m_r[(op >> 16) & 7] = m_r[op & 7];
	4422	}
	4423
	4424	void tms3203x_device::ldfnluf_dir(UINT32 op)
	4425	{
	4426	if (CONDITION_NLUF())
	4427	{
	4428	UINT32 res = RMEM(DIRECT(op));
	4429	int dreg = (op >> 16) & 7;
	4430	LONG2FP(dreg, res);
	4431	}
	4432	}
	4433
	4434	void tms3203x_device::ldfnluf_ind(UINT32 op)
	4435	{
	4436	if (CONDITION_NLUF())
	4437	{
	4438	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	4439	int dreg = (op >> 16) & 7;
	4440	LONG2FP(dreg, res);
	4441	}
	4442	else
	4443	INDIRECT_D(op, op >> 8);
	4444	}
	4445
	4446	void tms3203x_device::ldfnluf_imm(UINT32 op)
	4447	{
	4448	if (CONDITION_NLUF())
	4449	{
	4450	int dreg = (op >> 16) & 7;
	4451	SHORT2FP(dreg, op);
	4452	}
	4453	}
	4454
	4455	/*-----------------------------------------------------*/
	4456
	4457	void tms3203x_device::ldfluf_reg(UINT32 op)
	4458	{
	4459	if (CONDITION_LUF())
	4460	m_r[(op >> 16) & 7] = m_r[op & 7];
	4461	}
	4462
	4463	void tms3203x_device::ldfluf_dir(UINT32 op)
	4464	{
	4465	if (CONDITION_LUF())
	4466	{
	4467	UINT32 res = RMEM(DIRECT(op));
	4468	int dreg = (op >> 16) & 7;
	4469	LONG2FP(dreg, res);
	4470	}
	4471	}
	4472
	4473	void tms3203x_device::ldfluf_ind(UINT32 op)
	4474	{
	4475	if (CONDITION_LUF())
	4476	{
	4477	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	4478	int dreg = (op >> 16) & 7;
	4479	LONG2FP(dreg, res);
	4480	}
	4481	else
	4482	INDIRECT_D(op, op >> 8);
	4483	}
	4484
	4485	void tms3203x_device::ldfluf_imm(UINT32 op)
	4486	{
	4487	if (CONDITION_LUF())
	4488	{
	4489	int dreg = (op >> 16) & 7;
	4490	SHORT2FP(dreg, op);
	4491	}
	4492	}
	4493
	4494	/*-----------------------------------------------------*/
	4495
	4496	void tms3203x_device::ldfzuf_reg(UINT32 op)
	4497	{
	4498	if (CONDITION_ZUF())
	4499	m_r[(op >> 16) & 7] = m_r[op & 7];
	4500	}
	4501
	4502	void tms3203x_device::ldfzuf_dir(UINT32 op)
	4503	{
	4504	if (CONDITION_ZUF())
	4505	{
	4506	UINT32 res = RMEM(DIRECT(op));
	4507	int dreg = (op >> 16) & 7;
	4508	LONG2FP(dreg, res);
	4509	}
	4510	}
	4511
	4512	void tms3203x_device::ldfzuf_ind(UINT32 op)
	4513	{
	4514	if (CONDITION_ZUF())
	4515	{
	4516	UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
	4517	int dreg = (op >> 16) & 7;
	4518	LONG2FP(dreg, res);
	4519	}
	4520	else
	4521	INDIRECT_D(op, op >> 8);
	4522	}
	4523
	4524	void tms3203x_device::ldfzuf_imm(UINT32 op)
	4525	{
	4526	if (CONDITION_ZUF())
	4527	{
	4528	int dreg = (op >> 16) & 7;
	4529	SHORT2FP(dreg, op);
	4530	}
	4531	}
	4532
	4533	/*-----------------------------------------------------*/
	4534
	4535	void tms3203x_device::ldiu_reg(UINT32 op)
	4536	{
	4537	int dreg = (op >> 16) & 31;
	4538	IREG(dreg) = IREG(op & 31);
	4539	if (dreg >= TMR_BK)
	4540	update_special(dreg);
	4541	}
	4542
	4543	void tms3203x_device::ldiu_dir(UINT32 op)
	4544	{
	4545	int dreg = (op >> 16) & 31;
	4546	IREG(dreg) = RMEM(DIRECT(op));
	4547	if (dreg >= TMR_BK)
	4548	update_special(dreg);
	4549	}
	4550
	4551	void tms3203x_device::ldiu_ind(UINT32 op)
	4552	{
	4553	int dreg = (op >> 16) & 31;
	4554	IREG(dreg) = RMEM(INDIRECT_D(op, op >> 8));
	4555	if (dreg >= TMR_BK)
	4556	update_special(dreg);
	4557	}
	4558
	4559	void tms3203x_device::ldiu_imm(UINT32 op)
	4560	{
	4561	int dreg = (op >> 16) & 31;
	4562	IREG(dreg) = (INT16)op;
	4563	if (dreg >= TMR_BK)
	4564	update_special(dreg);
	4565	}
	4566
	4567	/*-----------------------------------------------------*/
	4568
	4569	void tms3203x_device::ldilo_reg(UINT32 op)
	4570	{
	4571	if (CONDITION_LO())
	4572	{
	4573	int dreg = (op >> 16) & 31;
	4574	IREG(dreg) = IREG(op & 31);
	4575	if (dreg >= TMR_BK)
	4576	update_special(dreg);
	4577	}
	4578	}
	4579
	4580	void tms3203x_device::ldilo_dir(UINT32 op)
	4581	{
	4582	UINT32 val = RMEM(DIRECT(op));
	4583	if (CONDITION_LO())
	4584	{
	4585	int dreg = (op >> 16) & 31;
	4586	IREG(dreg) = val;
	4587	if (dreg >= TMR_BK)
	4588	update_special(dreg);
	4589	}
	4590	}
	4591
	4592	void tms3203x_device::ldilo_ind(UINT32 op)
	4593	{
	4594	UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
	4595	if (CONDITION_LO())
	4596	{
	4597	int dreg = (op >> 16) & 31;
	4598	IREG(dreg) = val;
	4599	if (dreg >= TMR_BK)
	4600	update_special(dreg);
	4601	}
	4602	}
	4603
	4604	void tms3203x_device::ldilo_imm(UINT32 op)
	4605	{
	4606	if (CONDITION_LO())
	4607	{
	4608	int dreg = (op >> 16) & 31;
	4609	IREG(dreg) = (INT16)op;
	4610	if (dreg >= TMR_BK)
	4611	update_special(dreg);
	4612	}
	4613	}
	4614
	4615	/*-----------------------------------------------------*/
	4616
	4617	void tms3203x_device::ldils_reg(UINT32 op)
	4618	{
	4619	if (CONDITION_LS())
	4620	{
	4621	int dreg = (op >> 16) & 31;
	4622	IREG(dreg) = IREG(op & 31);
	4623	if (dreg >= TMR_BK)
	4624	update_special(dreg);
	4625	}
	4626	}
	4627
	4628	void tms3203x_device::ldils_dir(UINT32 op)
	4629	{
	4630	UINT32 val = RMEM(DIRECT(op));
	4631	if (CONDITION_LS())
	4632	{
	4633	int dreg = (op >> 16) & 31;
	4634	IREG(dreg) = val;
	4635	if (dreg >= TMR_BK)
	4636	update_special(dreg);
	4637	}
	4638	}
	4639
	4640	void tms3203x_device::ldils_ind(UINT32 op)
	4641	{
	4642	UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
	4643	if (CONDITION_LS())
	4644	{
	4645	int dreg = (op >> 16) & 31;
	4646	IREG(dreg) = val;
	4647	if (dreg >= TMR_BK)
	4648	update_special(dreg);
	4649	}
	4650	}
	4651
	4652	void tms3203x_device::ldils_imm(UINT32 op)
	4653	{
	4654	if (CONDITION_LS())
	4655	{
	4656	int dreg = (op >> 16) & 31;
	4657	IREG(dreg) = (INT16)op;
	4658	if (dreg >= TMR_BK)
	4659	update_special(dreg);
	4660	}
	4661	}
	4662
	4663	/*-----------------------------------------------------*/
	4664
	4665	void tms3203x_device::ldihi_reg(UINT32 op)
	4666	{
	4667	if (CONDITION_HI())
	4668	{
	4669	int dreg = (op >> 16) & 31;
	4670	IREG(dreg) = IREG(op & 31);
	4671	if (dreg >= TMR_BK)
	4672	update_special(dreg);
	4673	}
	4674	}
	4675
	4676	void tms3203x_device::ldihi_dir(UINT32 op)
	4677	{
	4678	UINT32 val = RMEM(DIRECT(op));
	4679	if (CONDITION_HI())
	4680	{
	4681	int dreg = (op >> 16) & 31;
	4682	IREG(dreg) = val;
	4683	if (dreg >= TMR_BK)
	4684	update_special(dreg);
	4685	}
	4686	}
	4687
	4688	void tms3203x_device::ldihi_ind(UINT32 op)
	4689	{
	4690	UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
	4691	if (CONDITION_HI())
	4692	{
	4693	int dreg = (op >> 16) & 31;
	4694	IREG(dreg) = val;
	4695	if (dreg >= TMR_BK)
	4696	update_special(dreg);
	4697	}
	4698	}
	4699
	4700	void tms3203x_device::ldihi_imm(UINT32 op)
	4701	{
	4702	if (CONDITION_HI())
	4703	{
	4704	int dreg = (op >> 16) & 31;
	4705	IREG(dreg) = (INT16)op;
	4706	if (dreg >= TMR_BK)
	4707	update_special(dreg);
	4708	}
	4709	}
	4710
	4711	/*-----------------------------------------------------*/
	4712
	4713	void tms3203x_device::ldihs_reg(UINT32 op)
	4714	{
	4715	if (CONDITION_HS())
	4716	{
	4717	int dreg = (op >> 16) & 31;
	4718	IREG(dreg) = IREG(op & 31);
	4719	if (dreg >= TMR_BK)
	4720	update_special(dreg);
	4721	}
	4722	}
	4723
	4724	void tms3203x_device::ldihs_dir(UINT32 op)
	4725	{
	4726	UINT32 val = RMEM(DIRECT(op));
	4727	if (CONDITION_HS())
	4728	{
	4729	int dreg = (op >> 16) & 31;
	4730	IREG(dreg) = val;
	4731	if (dreg >= TMR_BK)
	4732	update_special(dreg);
	4733	}
	4734	}
	4735
	4736	void tms3203x_device::ldihs_ind(UINT32 op)
	4737	{
	4738	UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
	4739	if (CONDITION_HS())
	4740	{
	4741	int dreg = (op >> 16) & 31;
	4742	IREG(dreg) = val;
	4743	if (dreg >= TMR_BK)
	4744	update_special(dreg);
	4745	}
	4746	}
	4747
	4748	void tms3203x_device::ldihs_imm(UINT32 op)
	4749	{
	4750	if (CONDITION_HS())
	4751	{
	4752	int dreg = (op >> 16) & 31;
	4753	IREG(dreg) = (INT16)op;
	4754	if (dreg >= TMR_BK)
	4755	update_special(dreg);
	4756	}
	4757	}
	4758
	4759	/*-----------------------------------------------------*/
	4760
	4761	void tms3203x_device::ldieq_reg(UINT32 op)
	4762	{
	4763	if (CONDITION_EQ())
	4764	{
	4765	int dreg = (op >> 16) & 31;
	4766	IREG(dreg) = IREG(op & 31);
	4767	if (dreg >= TMR_BK)
	4768	update_special(dreg);
	4769	}
	4770	}
	4771
	4772	void tms3203x_device::ldieq_dir(UINT32 op)
	4773	{
	4774	UINT32 val = RMEM(DIRECT(op));
	4775	if (CONDITION_EQ())
	4776	{
	4777	int dreg = (op >> 16) & 31;
	4778	IREG(dreg) = val;
	4779	if (dreg >= TMR_BK)
	4780	update_special(dreg);
	4781	}
	4782	}
	4783
	4784	void tms3203x_device::ldieq_ind(UINT32 op)
	4785	{
	4786	UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
	4787	if (CONDITION_EQ())
	4788	{
	4789	int dreg = (op >> 16) & 31;
	4790	IREG(dreg) = val;
	4791	if (dreg >= TMR_BK)
	4792	update_special(dreg);
	4793	}
	4794	}
	4795
	4796	void tms3203x_device::ldieq_imm(UINT32 op)
	4797	{
	4798	if (CONDITION_EQ())
	4799	{
	4800	int dreg = (op >> 16) & 31;
	4801	IREG(dreg) = (INT16)op;
	4802	if (dreg >= TMR_BK)
	4803	update_special(dreg);
	4804	}
	4805	}
	4806
	4807	/*-----------------------------------------------------*/
	4808
	4809	void tms3203x_device::ldine_reg(UINT32 op)
	4810	{
	4811	if (CONDITION_NE())
	4812	{
	4813	int dreg = (op >> 16) & 31;
	4814	IREG(dreg) = IREG(op & 31);
	4815	if (dreg >= TMR_BK)
	4816	update_special(dreg);
	4817	}
	4818	}
	4819
	4820	void tms3203x_device::ldine_dir(UINT32 op)
	4821	{
	4822	UINT32 val = RMEM(DIRECT(op));
	4823	if (CONDITION_NE())
	4824	{
	4825	int dreg = (op >> 16) & 31;
	4826	IREG(dreg) = val;
	4827	if (dreg >= TMR_BK)
	4828	update_special(dreg);
	4829	}
	4830	}
	4831
	4832	void tms3203x_device::ldine_ind(UINT32 op)
	4833	{
	4834	UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
	4835	if (CONDITION_NE())
	4836	{
	4837	int dreg = (op >> 16) & 31;
	4838	IREG(dreg) = val;
	4839	if (dreg >= TMR_BK)
	4840	update_special(dreg);
	4841	}
	4842	}
	4843
	4844	void tms3203x_device::ldine_imm(UINT32 op)
	4845	{
	4846	if (CONDITION_NE())
	4847	{
	4848	int dreg = (op >> 16) & 31;
	4849	IREG(dreg) = (INT16)op;
	4850	if (dreg >= TMR_BK)
	4851	update_special(dreg);
	4852	}
	4853	}
	4854
	4855	/*-----------------------------------------------------*/
	4856
	4857	void tms3203x_device::ldilt_reg(UINT32 op)
	4858	{
	4859	if (CONDITION_LT())
	4860	{
	4861	int dreg = (op >> 16) & 31;
	4862	IREG(dreg) = IREG(op & 31);
	4863	if (dreg >= TMR_BK)
	4864	update_special(dreg);
	4865	}
	4866	}
	4867
	4868	void tms3203x_device::ldilt_dir(UINT32 op)
	4869	{
	4870	UINT32 val = RMEM(DIRECT(op));
	4871	if (CONDITION_LT())
	4872	{
	4873	int dreg = (op >> 16) & 31;
	4874	IREG(dreg) = val;
	4875	if (dreg >= TMR_BK)
	4876	update_special(dreg);
	4877	}
	4878	}
	4879
	4880	void tms3203x_device::ldilt_ind(UINT32 op)
	4881	{
	4882	UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
	4883	if (CONDITION_LT())
	4884	{
	4885	int dreg = (op >> 16) & 31;
	4886	IREG(dreg) = val;
	4887	if (dreg >= TMR_BK)
	4888	update_special(dreg);
	4889	}
	4890	}
	4891
	4892	void tms3203x_device::ldilt_imm(UINT32 op)
	4893	{
	4894	if (CONDITION_LT())
	4895	{
	4896	int dreg = (op >> 16) & 31;
	4897	IREG(dreg) = (INT16)op;
	4898	if (dreg >= TMR_BK)
	4899	update_special(dreg);
	4900	}
	4901	}
	4902
	4903	/*-----------------------------------------------------*/
	4904
	4905	void tms3203x_device::ldile_reg(UINT32 op)
	4906	{
	4907	if (CONDITION_LE())
	4908	{
	4909	int dreg = (op >> 16) & 31;
	4910	IREG(dreg) = IREG(op & 31);
	4911	if (dreg >= TMR_BK)
	4912	update_special(dreg);
	4913	}
	4914	}
	4915
	4916	void tms3203x_device::ldile_dir(UINT32 op)
	4917	{
	4918	UINT32 val = RMEM(DIRECT(op));
	4919	if (CONDITION_LE())
	4920	{
	4921	int dreg = (op >> 16) & 31;
	4922	IREG(dreg) = val;
	4923	if (dreg >= TMR_BK)
	4924	update_special(dreg);
	4925	}
	4926	}
	4927
	4928	void tms3203x_device::ldile_ind(UINT32 op)
	4929	{
	4930	UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
	4931	if (CONDITION_LE())
	4932	{
	4933	int dreg = (op >> 16) & 31;
	4934	IREG(dreg) = val;
	4935	if (dreg >= TMR_BK)
	4936	update_special(dreg);
	4937	}
	4938	}
	4939
	4940	void tms3203x_device::ldile_imm(UINT32 op)
	4941	{
	4942	if (CONDITION_LE())
	4943	{
	4944	int dreg = (op >> 16) & 31;
	4945	IREG(dreg) = (INT16)op;
	4946	if (dreg >= TMR_BK)
	4947	update_special(dreg);
	4948	}
	4949	}
	4950
	4951	/*-----------------------------------------------------*/
	4952
	4953	void tms3203x_device::ldigt_reg(UINT32 op)
	4954	{
	4955	if (CONDITION_GT())
	4956	{
	4957	int dreg = (op >> 16) & 31;
	4958	IREG(dreg) = IREG(op & 31);
	4959	if (dreg >= TMR_BK)
	4960	update_special(dreg);
	4961	}
	4962	}
	4963
	4964	void tms3203x_device::ldigt_dir(UINT32 op)
	4965	{
	4966	UINT32 val = RMEM(DIRECT(op));
	4967	if (CONDITION_GT())
	4968	{
	4969	int dreg = (op >> 16) & 31;
	4970	IREG(dreg) = val;
	4971	if (dreg >= TMR_BK)
	4972	update_special(dreg);
	4973	}
	4974	}
	4975
	4976	void tms3203x_device::ldigt_ind(UINT32 op)
	4977	{
	4978	UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
	4979	if (CONDITION_GT())
	4980	{
	4981	int dreg = (op >> 16) & 31;
	4982	IREG(dreg) = val;
	4983	if (dreg >= TMR_BK)
	4984	update_special(dreg);
	4985	}
	4986	}
	4987
	4988	void tms3203x_device::ldigt_imm(UINT32 op)
	4989	{
	4990	if (CONDITION_GT())
	4991	{
	4992	int dreg = (op >> 16) & 31;
	4993	IREG(dreg) = (INT16)op;
	4994	if (dreg >= TMR_BK)
	4995	update_special(dreg);
	4996	}
	4997	}
	4998
	4999	/*-----------------------------------------------------*/
	5000
	5001	void tms3203x_device::ldige_reg(UINT32 op)
	5002	{
	5003	if (CONDITION_GE())
	5004	{
	5005	int dreg = (op >> 16) & 31;
	5006	IREG(dreg) = IREG(op & 31);
	5007	if (dreg >= TMR_BK)
	5008	update_special(dreg);
	5009	}
	5010	}
	5011
	5012	void tms3203x_device::ldige_dir(UINT32 op)
	5013	{
	5014	UINT32 val = RMEM(DIRECT(op));
	5015	if (CONDITION_GE())
	5016	{
	5017	int dreg = (op >> 16) & 31;
	5018	IREG(dreg) = val;
	5019	if (dreg >= TMR_BK)
	5020	update_special(dreg);
	5021	}
	5022	}
	5023
	5024	void tms3203x_device::ldige_ind(UINT32 op)
	5025	{
	5026	UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
	5027	if (CONDITION_GE())
	5028	{
	5029	int dreg = (op >> 16) & 31;
	5030	IREG(dreg) = val;
	5031	if (dreg >= TMR_BK)
	5032	update_special(dreg);
	5033	}
	5034	}
	5035
	5036	void tms3203x_device::ldige_imm(UINT32 op)
	5037	{
	5038	if (CONDITION_GE())
	5039	{
	5040	int dreg = (op >> 16) & 31;
	5041	IREG(dreg) = (INT16)op;
	5042	if (dreg >= TMR_BK)
	5043	update_special(dreg);
	5044	}
	5045	}
	5046
	5047	/*-----------------------------------------------------*/
	5048
	5049	void tms3203x_device::ldinv_reg(UINT32 op)
	5050	{
	5051	if (CONDITION_NV())
	5052	{
	5053	int dreg = (op >> 16) & 31;
	5054	IREG(dreg) = IREG(op & 31);
	5055	if (dreg >= TMR_BK)
	5056	update_special(dreg);
	5057	}
	5058	}
	5059
	5060	void tms3203x_device::ldinv_dir(UINT32 op)
	5061	{
	5062	UINT32 val = RMEM(DIRECT(op));
	5063	if (CONDITION_NV())
	5064	{
	5065	int dreg = (op >> 16) & 31;
	5066	IREG(dreg) = val;
	5067	if (dreg >= TMR_BK)
	5068	update_special(dreg);
	5069	}
	5070	}
	5071
	5072	void tms3203x_device::ldinv_ind(UINT32 op)
	5073	{
	5074	UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
	5075	if (CONDITION_NV())
	5076	{
	5077	int dreg = (op >> 16) & 31;
	5078	IREG(dreg) = val;
	5079	if (dreg >= TMR_BK)
	5080	update_special(dreg);
	5081	}
	5082	}
	5083
	5084	void tms3203x_device::ldinv_imm(UINT32 op)
	5085	{
	5086	if (CONDITION_NV())
	5087	{
	5088	int dreg = (op >> 16) & 31;
	5089	IREG(dreg) = (INT16)op;
	5090	if (dreg >= TMR_BK)
	5091	update_special(dreg);
	5092	}
	5093	}
	5094
	5095	/*-----------------------------------------------------*/
	5096
	5097	void tms3203x_device::ldiuf_reg(UINT32 op)
	5098	{
	5099	if (CONDITION_UF())
	5100	{
	5101	int dreg = (op >> 16) & 31;
	5102	IREG(dreg) = IREG(op & 31);
	5103	if (dreg >= TMR_BK)
	5104	update_special(dreg);
	5105	}
	5106	}
	5107
	5108	void tms3203x_device::ldiuf_dir(UINT32 op)
	5109	{
	5110	UINT32 val = RMEM(DIRECT(op));
	5111	if (CONDITION_UF())
	5112	{
	5113	int dreg = (op >> 16) & 31;
	5114	IREG(dreg) = val;
	5115	if (dreg >= TMR_BK)
	5116	update_special(dreg);
	5117	}
	5118	}
	5119
	5120	void tms3203x_device::ldiuf_ind(UINT32 op)
	5121	{
	5122	UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
	5123	if (CONDITION_UF())
	5124	{
	5125	int dreg = (op >> 16) & 31;
	5126	IREG(dreg) = val;
	5127	if (dreg >= TMR_BK)
	5128	update_special(dreg);
	5129	}
	5130	}
	5131
	5132	void tms3203x_device::ldiuf_imm(UINT32 op)
	5133	{
	5134	if (CONDITION_UF())
	5135	{
	5136	int dreg = (op >> 16) & 31;
	5137	IREG(dreg) = (INT16)op;
	5138	if (dreg >= TMR_BK)
	5139	update_special(dreg);
	5140	}
	5141	}
	5142
	5143	/*-----------------------------------------------------*/
	5144
	5145	void tms3203x_device::ldinuf_reg(UINT32 op)
	5146	{
	5147	if (CONDITION_NUF())
	5148	{
	5149	int dreg = (op >> 16) & 31;
	5150	IREG(dreg) = IREG(op & 31);
	5151	if (dreg >= TMR_BK)
	5152	update_special(dreg);
	5153	}
	5154	}
	5155
	5156	void tms3203x_device::ldinuf_dir(UINT32 op)
	5157	{
	5158	UINT32 val = RMEM(DIRECT(op));
	5159	if (CONDITION_NUF())
	5160	{
	5161	int dreg = (op >> 16) & 31;
	5162	IREG(dreg) = val;
	5163	if (dreg >= TMR_BK)
	5164	update_special(dreg);
	5165	}
	5166	}
	5167
	5168	void tms3203x_device::ldinuf_ind(UINT32 op)
	5169	{
	5170	UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
	5171	if (CONDITION_NUF())
	5172	{
	5173	int dreg = (op >> 16) & 31;
	5174	IREG(dreg) = val;
	5175	if (dreg >= TMR_BK)
	5176	update_special(dreg);
	5177	}
	5178	}
	5179
	5180	void tms3203x_device::ldinuf_imm(UINT32 op)
	5181	{
	5182	if (CONDITION_NUF())
	5183	{
	5184	int dreg = (op >> 16) & 31;
	5185	IREG(dreg) = (INT16)op;
	5186	if (dreg >= TMR_BK)
	5187	update_special(dreg);
	5188	}
	5189	}
	5190
	5191	/*-----------------------------------------------------*/
	5192
	5193	void tms3203x_device::ldiv_reg(UINT32 op)
	5194	{
	5195	if (CONDITION_V())
	5196	{
	5197	int dreg = (op >> 16) & 31;
	5198	IREG(dreg) = IREG(op & 31);
	5199	if (dreg >= TMR_BK)
	5200	update_special(dreg);
	5201	}
	5202	}
	5203
	5204	void tms3203x_device::ldiv_dir(UINT32 op)
	5205	{
	5206	UINT32 val = RMEM(DIRECT(op));
	5207	if (CONDITION_V())
	5208	{
	5209	int dreg = (op >> 16) & 31;
	5210	IREG(dreg) = val;
	5211	if (dreg >= TMR_BK)
	5212	update_special(dreg);
	5213	}
	5214	}
	5215
	5216	void tms3203x_device::ldiv_ind(UINT32 op)
	5217	{
	5218	UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
	5219	if (CONDITION_V())
	5220	{
	5221	int dreg = (op >> 16) & 31;
	5222	IREG(dreg) = val;
	5223	if (dreg >= TMR_BK)
	5224	update_special(dreg);
	5225	}
	5226	}
	5227
	5228	void tms3203x_device::ldiv_imm(UINT32 op)
	5229	{
	5230	if (CONDITION_V())
	5231	{
	5232	int dreg = (op >> 16) & 31;
	5233	IREG(dreg) = (INT16)op;
	5234	if (dreg >= TMR_BK)
	5235	update_special(dreg);
	5236	}
	5237	}
	5238
	5239	/*-----------------------------------------------------*/
	5240
	5241	void tms3203x_device::ldinlv_reg(UINT32 op)
	5242	{
	5243	if (CONDITION_NLV())
	5244	{
	5245	int dreg = (op >> 16) & 31;
	5246	IREG(dreg) = IREG(op & 31);
	5247	if (dreg >= TMR_BK)
	5248	update_special(dreg);
	5249	}
	5250	}
	5251
	5252	void tms3203x_device::ldinlv_dir(UINT32 op)
	5253	{
	5254	UINT32 val = RMEM(DIRECT(op));
	5255	if (CONDITION_NLV())
	5256	{
	5257	int dreg = (op >> 16) & 31;
	5258	IREG(dreg) = val;
	5259	if (dreg >= TMR_BK)
	5260	update_special(dreg);
	5261	}
	5262	}
	5263
	5264	void tms3203x_device::ldinlv_ind(UINT32 op)
	5265	{
	5266	UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
	5267	if (CONDITION_NLV())
	5268	{
	5269	int dreg = (op >> 16) & 31;
	5270	IREG(dreg) = val;
	5271	if (dreg >= TMR_BK)
	5272	update_special(dreg);
	5273	}
	5274	}
	5275
	5276	void tms3203x_device::ldinlv_imm(UINT32 op)
	5277	{
	5278	if (CONDITION_NLV())
	5279	{
	5280	int dreg = (op >> 16) & 31;
	5281	IREG(dreg) = (INT16)op;
	5282	if (dreg >= TMR_BK)
	5283	update_special(dreg);
	5284	}
	5285	}
	5286
	5287	/*-----------------------------------------------------*/
	5288
	5289	void tms3203x_device::ldilv_reg(UINT32 op)
	5290	{
	5291	if (CONDITION_LV())
	5292	{
	5293	int dreg = (op >> 16) & 31;
	5294	IREG(dreg) = IREG(op & 31);
	5295	if (dreg >= TMR_BK)
	5296	update_special(dreg);
	5297	}
	5298	}
	5299
	5300	void tms3203x_device::ldilv_dir(UINT32 op)
	5301	{
	5302	UINT32 val = RMEM(DIRECT(op));
	5303	if (CONDITION_LV())
	5304	{
	5305	int dreg = (op >> 16) & 31;
	5306	IREG(dreg) = val;
	5307	if (dreg >= TMR_BK)
	5308	update_special(dreg);
	5309	}
	5310	}
	5311
	5312	void tms3203x_device::ldilv_ind(UINT32 op)
	5313	{
	5314	UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
	5315	if (CONDITION_LV())
	5316	{
	5317	int dreg = (op >> 16) & 31;
	5318	IREG(dreg) = val;
	5319	if (dreg >= TMR_BK)
	5320	update_special(dreg);
	5321	}
	5322	}
	5323
	5324	void tms3203x_device::ldilv_imm(UINT32 op)
	5325	{
	5326	if (CONDITION_LV())
	5327	{
	5328	int dreg = (op >> 16) & 31;
	5329	IREG(dreg) = (INT16)op;
	5330	if (dreg >= TMR_BK)
	5331	update_special(dreg);
	5332	}
	5333	}
	5334
	5335	/*-----------------------------------------------------*/
	5336
	5337	void tms3203x_device::ldinluf_reg(UINT32 op)
	5338	{
	5339	if (CONDITION_NLUF())
	5340	{
	5341	int dreg = (op >> 16) & 31;
	5342	IREG(dreg) = IREG(op & 31);
	5343	if (dreg >= TMR_BK)
	5344	update_special(dreg);
	5345	}
	5346	}
	5347
	5348	void tms3203x_device::ldinluf_dir(UINT32 op)
	5349	{
	5350	UINT32 val = RMEM(DIRECT(op));
	5351	if (CONDITION_NLUF())
	5352	{
	5353	int dreg = (op >> 16) & 31;
	5354	IREG(dreg) = val;
	5355	if (dreg >= TMR_BK)
	5356	update_special(dreg);
	5357	}
	5358	}
	5359
	5360	void tms3203x_device::ldinluf_ind(UINT32 op)
	5361	{
	5362	UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
	5363	if (CONDITION_NLUF())
	5364	{
	5365	int dreg = (op >> 16) & 31;
	5366	IREG(dreg) = val;
	5367	if (dreg >= TMR_BK)
	5368	update_special(dreg);
	5369	}
	5370	}
	5371
	5372	void tms3203x_device::ldinluf_imm(UINT32 op)
	5373	{
	5374	if (CONDITION_NLUF())
	5375	{
	5376	int dreg = (op >> 16) & 31;
	5377	IREG(dreg) = (INT16)op;
	5378	if (dreg >= TMR_BK)
	5379	update_special(dreg);
	5380	}
	5381	}
	5382
	5383	/*-----------------------------------------------------*/
	5384
	5385	void tms3203x_device::ldiluf_reg(UINT32 op)
	5386	{
	5387	if (CONDITION_LUF())
	5388	{
	5389	int dreg = (op >> 16) & 31;
	5390	IREG(dreg) = IREG(op & 31);
	5391	if (dreg >= TMR_BK)
	5392	update_special(dreg);
	5393	}
	5394	}
	5395
	5396	void tms3203x_device::ldiluf_dir(UINT32 op)
	5397	{
	5398	UINT32 val = RMEM(DIRECT(op));
	5399	if (CONDITION_LUF())
	5400	{
	5401	int dreg = (op >> 16) & 31;
	5402	IREG(dreg) = val;
	5403	if (dreg >= TMR_BK)
	5404	update_special(dreg);
	5405	}
	5406	}
	5407
	5408	void tms3203x_device::ldiluf_ind(UINT32 op)
	5409	{
	5410	UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
	5411	if (CONDITION_LUF())
	5412	{
	5413	int dreg = (op >> 16) & 31;
	5414	IREG(dreg) = val;
	5415	if (dreg >= TMR_BK)
	5416	update_special(dreg);
	5417	}
	5418	}
	5419
	5420	void tms3203x_device::ldiluf_imm(UINT32 op)
	5421	{
	5422	if (CONDITION_LUF())
	5423	{
	5424	int dreg = (op >> 16) & 31;
	5425	IREG(dreg) = (INT16)op;
	5426	if (dreg >= TMR_BK)
	5427	update_special(dreg);
	5428	}
	5429	}
	5430
	5431	/*-----------------------------------------------------*/
	5432
	5433	void tms3203x_device::ldizuf_reg(UINT32 op)
	5434	{
	5435	if (CONDITION_ZUF())
	5436	{
	5437	int dreg = (op >> 16) & 31;
	5438	IREG(dreg) = IREG(op & 31);
	5439	if (dreg >= TMR_BK)
	5440	update_special(dreg);
	5441	}
	5442	}
	5443
	5444	void tms3203x_device::ldizuf_dir(UINT32 op)
	5445	{
	5446	UINT32 val = RMEM(DIRECT(op));
	5447	if (CONDITION_ZUF())
	5448	{
	5449	int dreg = (op >> 16) & 31;
	5450	IREG(dreg) = val;
	5451	if (dreg >= TMR_BK)
	5452	update_special(dreg);
	5453	}
	5454	}
	5455
	5456	void tms3203x_device::ldizuf_ind(UINT32 op)
	5457	{
	5458	UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
	5459	if (CONDITION_ZUF())
	5460	{
	5461	int dreg = (op >> 16) & 31;
	5462	IREG(dreg) = val;
	5463	if (dreg >= TMR_BK)
	5464	update_special(dreg);
	5465	}
	5466	}
	5467
	5468	void tms3203x_device::ldizuf_imm(UINT32 op)
	5469	{
	5470	if (CONDITION_ZUF())
	5471	{
	5472	int dreg = (op >> 16) & 31;
	5473	IREG(dreg) = (INT16)op;
	5474	if (dreg >= TMR_BK)
	5475	update_special(dreg);
	5476	}
	5477	}
	5478
	5479	/*-----------------------------------------------------*/
	5480
	5481	inline void tms3203x_device::execute_delayed(UINT32 newpc)
	5482	{
	5483	m_delayed = true;
	5484
	5485	if ((machine().debug_flags & DEBUG_FLAG_ENABLED) == 0)
	5486	{
	5487	execute_one();
	5488	execute_one();
	5489	execute_one();
	5490	}
	5491	else
	5492	{
	5493	debugger_instruction_hook(this, m_pc);
	5494	execute_one();
	5495	debugger_instruction_hook(this, m_pc);
	5496	execute_one();
	5497	debugger_instruction_hook(this, m_pc);
	5498	execute_one();
	5499	}
	5500
	5501	if (newpc != ~0)
	5502	m_pc = newpc;
	5503
	5504	m_delayed = false;
	5505	if (m_irq_pending)
	5506	{
	5507	m_irq_pending = false;
	5508	check_irqs();
	5509	}
	5510	}
	5511
	5512	/*-----------------------------------------------------*/
	5513
	5514	void tms3203x_device::br_imm(UINT32 op)
	5515	{
	5516	m_pc = op & 0xffffff;
	5517	m_icount -= 3*2;
	5518	}
	5519
	5520	void tms3203x_device::brd_imm(UINT32 op)
	5521	{
	5522	execute_delayed(op & 0xffffff);
	5523	}
	5524
	5525	/*-----------------------------------------------------*/
	5526
	5527	void tms3203x_device::call_imm(UINT32 op)
	5528	{
	5529	WMEM(++IREG(TMR_SP), m_pc);
	5530	m_pc = op & 0xffffff;
	5531	m_icount -= 3*2;
	5532	}
	5533
	5534	/*-----------------------------------------------------*/
	5535
	5536	void tms3203x_device::rptb_imm(UINT32 op)
	5537	{
	5538	IREG(TMR_RS) = m_pc;
	5539	IREG(TMR_RE) = op & 0xffffff;
	5540	IREG(TMR_ST) |= RMFLAG;
	5541	m_icount -= 3*2;
	5542	}
	5543
	5544	/*-----------------------------------------------------*/
	5545
	5546	void tms3203x_device::swi(UINT32 op) { unimplemented(op); }
	5547
	5548	/*-----------------------------------------------------*/
	5549
	5550	void tms3203x_device::brc_reg(UINT32 op)
	5551	{
	5552	if (condition(op >> 16))
	5553	{
	5554	m_pc = IREG(op & 31);
	5555	m_icount -= 3*2;
	5556	}
	5557	}
	5558
	5559	void tms3203x_device::brcd_reg(UINT32 op)
	5560	{
	5561	if (condition(op >> 16))
	5562	execute_delayed(IREG(op & 31));
	5563	else
	5564	execute_delayed(~0);
	5565	}
	5566
	5567	void tms3203x_device::brc_imm(UINT32 op)
	5568	{
	5569	if (condition(op >> 16))
	5570	{
	5571	m_pc += (INT16)op;
	5572	m_icount -= 3*2;
	5573	}
	5574	}
	5575
	5576	void tms3203x_device::brcd_imm(UINT32 op)
	5577	{
	5578	if (condition(op >> 16))
	5579	execute_delayed(m_pc + 2 + (INT16)op);
	5580	else
	5581	execute_delayed(~0);
	5582	}
	5583
	5584	/*-----------------------------------------------------*/
	5585
	5586	void tms3203x_device::dbc_reg(UINT32 op)
	5587	{
	5588	int reg = TMR_AR0 + ((op >> 22) & 7);
	5589	int res = (IREG(reg) - 1) & 0xffffff;
	5590	IREG(reg) = res | (IREG(reg) & 0xff000000);
	5591	if (condition(op >> 16) && !(res & 0x800000))
	5592	{
	5593	m_pc = IREG(op & 31);
	5594	m_icount -= 3*2;
	5595	}
	5596	}
	5597
	5598	void tms3203x_device::dbcd_reg(UINT32 op)
	5599	{
	5600	int reg = TMR_AR0 + ((op >> 22) & 7);
	5601	int res = (IREG(reg) - 1) & 0xffffff;
	5602	IREG(reg) = res | (IREG(reg) & 0xff000000);
	5603	if (condition(op >> 16) && !(res & 0x800000))
	5604	execute_delayed(IREG(op & 31));
	5605	else
	5606	execute_delayed(~0);
	5607	}
	5608
	5609	void tms3203x_device::dbc_imm(UINT32 op)
	5610	{
	5611	int reg = TMR_AR0 + ((op >> 22) & 7);
	5612	int res = (IREG(reg) - 1) & 0xffffff;
	5613	IREG(reg) = res | (IREG(reg) & 0xff000000);
	5614	if (condition(op >> 16) && !(res & 0x800000))
	5615	{
	5616	m_pc += (INT16)op;
	5617	m_icount -= 3*2;
	5618	}
	5619	}
	5620
	5621	void tms3203x_device::dbcd_imm(UINT32 op)
	5622	{
	5623	int reg = TMR_AR0 + ((op >> 22) & 7);
	5624	int res = (IREG(reg) - 1) & 0xffffff;
	5625	IREG(reg) = res | (IREG(reg) & 0xff000000);
	5626	if (condition(op >> 16) && !(res & 0x800000))
	5627	execute_delayed(m_pc + 2 + (INT16)op);
	5628	else
	5629	execute_delayed(~0);
	5630	}
	5631
	5632	/*-----------------------------------------------------*/
	5633
	5634	void tms3203x_device::callc_reg(UINT32 op)
	5635	{
	5636	if (condition(op >> 16))
	5637	{
	5638	WMEM(++IREG(TMR_SP), m_pc);
	5639	m_pc = IREG(op & 31);
	5640	m_icount -= 3*2;
	5641	}
	5642	}
	5643
	5644	void tms3203x_device::callc_imm(UINT32 op)
	5645	{
	5646	if (condition(op >> 16))
	5647	{
	5648	WMEM(++IREG(TMR_SP), m_pc);
	5649	m_pc += (INT16)op;
	5650	m_icount -= 3*2;
	5651	}
	5652	}
	5653
	5654	/*-----------------------------------------------------*/
	5655
	5656	void tms3203x_device::trap(int trapnum)
	5657	{
	5658	WMEM(++IREG(TMR_SP), m_pc);
	5659	IREG(TMR_ST) &= ~GIEFLAG;
	5660	if (m_chip_type == CHIP_TYPE_TMS32032)
	5661	m_pc = RMEM(((IREG(TMR_IF) >> 16) << 8) + trapnum);
	5662	else
	5663	m_pc = RMEM(trapnum);
	5664	m_icount -= 4*2;
	5665	}
	5666
	5667	void tms3203x_device::trapc(UINT32 op)
	5668	{
	5669	if (condition(op >> 16))
	5670	trap(op & 0x3f);
	5671	}
	5672
	5673	/*-----------------------------------------------------*/
	5674
	5675	void tms3203x_device::retic_reg(UINT32 op)
	5676	{
	5677	if (condition(op >> 16))
	5678	{
	5679	m_pc = RMEM(IREG(TMR_SP)--);
	5680	IREG(TMR_ST) |= GIEFLAG;
	5681	m_icount -= 3*2;
	5682	check_irqs();
	5683	}
	5684	}
	5685
	5686	void tms3203x_device::retsc_reg(UINT32 op)
	5687	{
	5688	if (condition(op >> 16))
	5689	{
	5690	m_pc = RMEM(IREG(TMR_SP)--);
	5691	m_icount -= 3*2;
	5692	}
	5693	}
	5694
	5695	/*-----------------------------------------------------*/
	5696
	5697	void tms3203x_device::mpyaddf_0(UINT32 op)
	5698	{
	5699	// src3 * src4, src1 + src2
	5700	DECLARE_DEF;
	5701	UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	5702	UINT32 src4 = RMEM(INDIRECT_1(op, op));
	5703	LONG2FP(TMR_TEMP1, src3);
	5704	LONG2FP(TMR_TEMP2, src4);
	5705	mpyf(m_r[TMR_TEMP3], m_r[TMR_TEMP1], m_r[TMR_TEMP2]);
	5706	addf(m_r[((op >> 22) & 1) | 2], m_r[(op >> 19) & 7], m_r[(op >> 16) & 7]);
	5707	m_r[(op >> 23) & 1] = m_r[TMR_TEMP3];
	5708	UPDATE_DEF();
	5709	}
	5710
	5711	void tms3203x_device::mpyaddf_1(UINT32 op)
	5712	{
	5713	// src3 * src1, src4 + src2
	5714	DECLARE_DEF;
	5715	UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	5716	UINT32 src4 = RMEM(INDIRECT_1(op, op));
	5717	LONG2FP(TMR_TEMP1, src3);
	5718	LONG2FP(TMR_TEMP2, src4);
	5719	mpyf(m_r[TMR_TEMP3], m_r[TMR_TEMP1], m_r[(op >> 19) & 7]);
	5720	addf(m_r[((op >> 22) & 1) | 2], m_r[TMR_TEMP2], m_r[(op >> 16) & 7]);
	5721	m_r[(op >> 23) & 1] = m_r[TMR_TEMP3];
	5722	UPDATE_DEF();
	5723	}
	5724
	5725	void tms3203x_device::mpyaddf_2(UINT32 op)
	5726	{
	5727	// src1 * src2, src3 + src4
	5728	DECLARE_DEF;
	5729	UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	5730	UINT32 src4 = RMEM(INDIRECT_1(op, op));
	5731	LONG2FP(TMR_TEMP1, src3);
	5732	LONG2FP(TMR_TEMP2, src4);
	5733	mpyf(m_r[TMR_TEMP3], m_r[(op >> 19) & 7], m_r[(op >> 16) & 7]);
	5734	addf(m_r[((op >> 22) & 1) | 2], m_r[TMR_TEMP1], m_r[TMR_TEMP2]);
	5735	m_r[(op >> 23) & 1] = m_r[TMR_TEMP3];
	5736	UPDATE_DEF();
	5737	}
	5738
	5739	void tms3203x_device::mpyaddf_3(UINT32 op)
	5740	{
	5741	// src3 * src1, src2 + src4
	5742	DECLARE_DEF;
	5743	UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	5744	UINT32 src4 = RMEM(INDIRECT_1(op, op));
	5745	LONG2FP(TMR_TEMP1, src3);
	5746	LONG2FP(TMR_TEMP2, src4);
	5747	mpyf(m_r[TMR_TEMP3], m_r[TMR_TEMP1], m_r[(op >> 19) & 7]);
	5748	addf(m_r[((op >> 22) & 1) | 2], m_r[(op >> 16) & 7], m_r[TMR_TEMP2]);
	5749	m_r[(op >> 23) & 1] = m_r[TMR_TEMP3];
	5750	UPDATE_DEF();
	5751	}
	5752
	5753	/*-----------------------------------------------------*/
	5754
	5755	void tms3203x_device::mpysubf_0(UINT32 op)
	5756	{
	5757	// src3 * src4, src1 - src2
	5758	DECLARE_DEF;
	5759	UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	5760	UINT32 src4 = RMEM(INDIRECT_1(op, op));
	5761	LONG2FP(TMR_TEMP1, src3);
	5762	LONG2FP(TMR_TEMP2, src4);
	5763	mpyf(m_r[TMR_TEMP3], m_r[TMR_TEMP1], m_r[TMR_TEMP2]);
	5764	subf(m_r[((op >> 22) & 1) | 2], m_r[(op >> 19) & 7], m_r[(op >> 16) & 7]);
	5765	m_r[(op >> 23) & 1] = m_r[TMR_TEMP3];
	5766	UPDATE_DEF();
	5767	}
	5768
	5769	void tms3203x_device::mpysubf_1(UINT32 op)
	5770	{
	5771	// src3 * src1, src4 - src2
	5772	DECLARE_DEF;
	5773	UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	5774	UINT32 src4 = RMEM(INDIRECT_1(op, op));
	5775	LONG2FP(TMR_TEMP1, src3);
	5776	LONG2FP(TMR_TEMP2, src4);
	5777	mpyf(m_r[TMR_TEMP3], m_r[TMR_TEMP1], m_r[(op >> 19) & 7]);
	5778	subf(m_r[((op >> 22) & 1) | 2], m_r[TMR_TEMP2], m_r[(op >> 16) & 7]);
	5779	m_r[(op >> 23) & 1] = m_r[TMR_TEMP3];
	5780	UPDATE_DEF();
	5781	}
	5782
	5783	void tms3203x_device::mpysubf_2(UINT32 op)
	5784	{
	5785	// src1 * src2, src3 - src4
	5786	DECLARE_DEF;
	5787	UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	5788	UINT32 src4 = RMEM(INDIRECT_1(op, op));
	5789	LONG2FP(TMR_TEMP1, src3);
	5790	LONG2FP(TMR_TEMP2, src4);
	5791	mpyf(m_r[TMR_TEMP3], m_r[(op >> 19) & 7], m_r[(op >> 16) & 7]);
	5792	subf(m_r[((op >> 22) & 1) | 2], m_r[TMR_TEMP1], m_r[TMR_TEMP2]);
	5793	m_r[(op >> 23) & 1] = m_r[TMR_TEMP3];
	5794	UPDATE_DEF();
	5795	}
	5796
	5797	void tms3203x_device::mpysubf_3(UINT32 op)
	5798	{
	5799	// src3 * src1, src2 - src4
	5800	DECLARE_DEF;
	5801	UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	5802	UINT32 src4 = RMEM(INDIRECT_1(op, op));
	5803	LONG2FP(TMR_TEMP1, src3);
	5804	LONG2FP(TMR_TEMP2, src4);
	5805	mpyf(m_r[TMR_TEMP3], m_r[TMR_TEMP1], m_r[(op >> 19) & 7]);
	5806	subf(m_r[((op >> 22) & 1) | 2], m_r[(op >> 16) & 7], m_r[TMR_TEMP2]);
	5807	m_r[(op >> 23) & 1] = m_r[TMR_TEMP3];
	5808	UPDATE_DEF();
	5809	}
	5810
	5811	/*-----------------------------------------------------*/
	5812
	5813	void tms3203x_device::mpyaddi_0(UINT32 op)
	5814	{
	5815	// src3 * src4, src1 + src2
	5816	DECLARE_DEF;
	5817	UINT32 src1 = IREG((op >> 19) & 7);
	5818	UINT32 src2 = IREG((op >> 16) & 7);
	5819	UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	5820	UINT32 src4 = RMEM(INDIRECT_1(op, op));
	5821	INT64 mres = (INT64)((INT32)(src3 << 8) >> 8) * (INT64)((INT32)(src4 << 8) >> 8);
	5822	UINT32 ares = src1 + src2;
	5823
	5824	CLR_NZVUF();
	5825	if (OVM())
	5826	{
	5827	if (mres < -(INT64)0x80000000 || mres > (INT64)0x7fffffff)
	5828	mres = (mres < 0) ? 0x80000000 : 0x7fffffff;
	5829	if (OVERFLOW_ADD(src1,src2,ares))
	5830	ares = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff;
	5831	}
	5832	IREG((op >> 23) & 1) = mres;
	5833	IREG(((op >> 22) & 1) | 2) = ares;
	5834	UPDATE_DEF();
	5835	}
	5836
	5837	void tms3203x_device::mpyaddi_1(UINT32 op)
	5838	{
	5839	// src3 * src1, src4 + src2
	5840	DECLARE_DEF;
	5841	UINT32 src1 = IREG((op >> 19) & 7);
	5842	UINT32 src2 = IREG((op >> 16) & 7);
	5843	UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	5844	UINT32 src4 = RMEM(INDIRECT_1(op, op));
	5845	INT64 mres = (INT64)((INT32)(src3 << 8) >> 8) * (INT64)((INT32)(src1 << 8) >> 8);
	5846	UINT32 ares = src4 + src2;
	5847
	5848	CLR_NZVUF();
	5849	if (OVM())
	5850	{
	5851	if (mres < -(INT64)0x80000000 || mres > (INT64)0x7fffffff)
	5852	mres = (mres < 0) ? 0x80000000 : 0x7fffffff;
	5853	if (OVERFLOW_ADD(src4,src2,ares))
	5854	ares = ((INT32)src4 < 0) ? 0x80000000 : 0x7fffffff;
	5855	}
	5856	IREG((op >> 23) & 1) = mres;
	5857	IREG(((op >> 22) & 1) | 2) = ares;
	5858	UPDATE_DEF();
	5859	}
	5860
	5861	void tms3203x_device::mpyaddi_2(UINT32 op)
	5862	{
	5863	// src1 * src2, src3 + src4
	5864	DECLARE_DEF;
	5865	UINT32 src1 = IREG((op >> 19) & 7);
	5866	UINT32 src2 = IREG((op >> 16) & 7);
	5867	UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	5868	UINT32 src4 = RMEM(INDIRECT_1(op, op));
	5869	INT64 mres = (INT64)((INT32)(src1 << 8) >> 8) * (INT64)((INT32)(src2 << 8) >> 8);
	5870	UINT32 ares = src3 + src4;
	5871
	5872	CLR_NZVUF();
	5873	if (OVM())
	5874	{
	5875	if (mres < -(INT64)0x80000000 || mres > (INT64)0x7fffffff)
	5876	mres = (mres < 0) ? 0x80000000 : 0x7fffffff;
	5877	if (OVERFLOW_ADD(src3,src4,ares))
	5878	ares = ((INT32)src3 < 0) ? 0x80000000 : 0x7fffffff;
	5879	}
	5880	IREG((op >> 23) & 1) = mres;
	5881	IREG(((op >> 22) & 1) | 2) = ares;
	5882	UPDATE_DEF();
	5883	}
	5884
	5885	void tms3203x_device::mpyaddi_3(UINT32 op)
	5886	{
	5887	// src3 * src1, src2 + src4
	5888	DECLARE_DEF;
	5889	UINT32 src1 = IREG((op >> 19) & 7);
	5890	UINT32 src2 = IREG((op >> 16) & 7);
	5891	UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	5892	UINT32 src4 = RMEM(INDIRECT_1(op, op));
	5893	INT64 mres = (INT64)((INT32)(src3 << 8) >> 8) * (INT64)((INT32)(src1 << 8) >> 8);
	5894	UINT32 ares = src2 + src4;
	5895
	5896	CLR_NZVUF();
	5897	if (OVM())
	5898	{
	5899	if (mres < -(INT64)0x80000000 || mres > (INT64)0x7fffffff)
	5900	mres = (mres < 0) ? 0x80000000 : 0x7fffffff;
	5901	if (OVERFLOW_ADD(src2,src4,ares))
	5902	ares = ((INT32)src2 < 0) ? 0x80000000 : 0x7fffffff;
	5903	}
	5904	IREG((op >> 23) & 1) = mres;
	5905	IREG(((op >> 22) & 1) | 2) = ares;
	5906	UPDATE_DEF();
	5907	}
	5908
	5909	/*-----------------------------------------------------*/
	5910
	5911	void tms3203x_device::mpysubi_0(UINT32 op)
	5912	{
	5913	// src3 * src4, src1 - src2
	5914	DECLARE_DEF;
	5915	UINT32 src1 = IREG((op >> 19) & 7);
	5916	UINT32 src2 = IREG((op >> 16) & 7);
	5917	UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	5918	UINT32 src4 = RMEM(INDIRECT_1(op, op));
	5919	INT64 mres = (INT64)((INT32)(src3 << 8) >> 8) * (INT64)((INT32)(src4 << 8) >> 8);
	5920	UINT32 ares = src1 - src2;
	5921
	5922	CLR_NZVUF();
	5923	if (OVM())
	5924	{
	5925	if (mres < -(INT64)0x80000000 || mres > (INT64)0x7fffffff)
	5926	mres = (mres < 0) ? 0x80000000 : 0x7fffffff;
	5927	if (OVERFLOW_SUB(src1,src2,ares))
	5928	ares = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff;
	5929	}
	5930	IREG((op >> 23) & 1) = mres;
	5931	IREG(((op >> 22) & 1) | 2) = ares;
	5932	UPDATE_DEF();
	5933	}
	5934
	5935	void tms3203x_device::mpysubi_1(UINT32 op)
	5936	{
	5937	// src3 * src1, src4 - src2
	5938	DECLARE_DEF;
	5939	UINT32 src1 = IREG((op >> 19) & 7);
	5940	UINT32 src2 = IREG((op >> 16) & 7);
	5941	UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	5942	UINT32 src4 = RMEM(INDIRECT_1(op, op));
	5943	INT64 mres = (INT64)((INT32)(src3 << 8) >> 8) * (INT64)((INT32)(src1 << 8) >> 8);
	5944	UINT32 ares = src4 - src2;
	5945
	5946	CLR_NZVUF();
	5947	if (OVM())
	5948	{
	5949	if (mres < -(INT64)0x80000000 || mres > (INT64)0x7fffffff)
	5950	mres = (mres < 0) ? 0x80000000 : 0x7fffffff;
	5951	if (OVERFLOW_SUB(src4,src2,ares))
	5952	ares = ((INT32)src4 < 0) ? 0x80000000 : 0x7fffffff;
	5953	}
	5954	IREG((op >> 23) & 1) = mres;
	5955	IREG(((op >> 22) & 1) | 2) = ares;
	5956	UPDATE_DEF();
	5957	}
	5958
	5959	void tms3203x_device::mpysubi_2(UINT32 op)
	5960	{
	5961	// src1 * src2, src3 - src4
	5962	DECLARE_DEF;
	5963	UINT32 src1 = IREG((op >> 19) & 7);
	5964	UINT32 src2 = IREG((op >> 16) & 7);
	5965	UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	5966	UINT32 src4 = RMEM(INDIRECT_1(op, op));
	5967	INT64 mres = (INT64)((INT32)(src1 << 8) >> 8) * (INT64)((INT32)(src2 << 8) >> 8);
	5968	UINT32 ares = src3 - src4;
	5969
	5970	CLR_NZVUF();
	5971	if (OVM())
	5972	{
	5973	if (mres < -(INT64)0x80000000 || mres > (INT64)0x7fffffff)
	5974	mres = (mres < 0) ? 0x80000000 : 0x7fffffff;
	5975	if (OVERFLOW_SUB(src3,src4,ares))
	5976	ares = ((INT32)src3 < 0) ? 0x80000000 : 0x7fffffff;
	5977	}
	5978	IREG((op >> 23) & 1) = mres;
	5979	IREG(((op >> 22) & 1) | 2) = ares;
	5980	UPDATE_DEF();
	5981	}
	5982
	5983	void tms3203x_device::mpysubi_3(UINT32 op)
	5984	{
	5985	// src3 * src1, src2 - src4
	5986	DECLARE_DEF;
	5987	UINT32 src1 = IREG((op >> 19) & 7);
	5988	UINT32 src2 = IREG((op >> 16) & 7);
	5989	UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
	5990	UINT32 src4 = RMEM(INDIRECT_1(op, op));
	5991	INT64 mres = (INT64)((INT32)(src3 << 8) >> 8) * (INT64)((INT32)(src1 << 8) >> 8);
	5992	UINT32 ares = src2 - src4;
	5993
	5994	CLR_NZVUF();
	5995	if (OVM())
	5996	{
	5997	if (mres < -(INT64)0x80000000 || mres > (INT64)0x7fffffff)
	5998	mres = (mres < 0) ? 0x80000000 : 0x7fffffff;
	5999	if (OVERFLOW_SUB(src2,src4,ares))
	6000	ares = ((INT32)src2 < 0) ? 0x80000000 : 0x7fffffff;
	6001	}
	6002	IREG((op >> 23) & 1) = mres;
	6003	IREG(((op >> 22) & 1) | 2) = ares;
	6004	UPDATE_DEF();
	6005	}
	6006
	6007	/*-----------------------------------------------------*/
	6008
	6009	void tms3203x_device::stfstf(UINT32 op)
	6010	{
	6011	DECLARE_DEF;
	6012	WMEM(INDIRECT_1_DEF(op, op >> 8), FP2LONG((op >> 16) & 7));
	6013	WMEM(INDIRECT_1(op, op), FP2LONG((op >> 22) & 7));
	6014	UPDATE_DEF();
	6015	}
	6016
	6017	void tms3203x_device::stisti(UINT32 op)
	6018	{
	6019	DECLARE_DEF;
	6020	WMEM(INDIRECT_1_DEF(op, op >> 8), IREG((op >> 16) & 7));
	6021	WMEM(INDIRECT_1(op, op), IREG((op >> 22) & 7));
	6022	UPDATE_DEF();
	6023	}
	6024
	6025	/*-----------------------------------------------------*/
	6026
	6027	void tms3203x_device::ldfldf(UINT32 op)
	6028	{
	6029	DECLARE_DEF;
	6030	UINT32 res;
	6031	int dreg;
	6032
	6033	res = RMEM(INDIRECT_1_DEF(op, op >> 8));
	6034	dreg = (op >> 19) & 7;
	6035	LONG2FP(dreg, res);
	6036	res = RMEM(INDIRECT_1(op, op));
	6037	dreg = (op >> 22) & 7;
	6038	LONG2FP(dreg, res);
	6039	UPDATE_DEF();
	6040	}
	6041
	6042	void tms3203x_device::ldildi(UINT32 op)
	6043	{
	6044	DECLARE_DEF;
	6045	IREG((op >> 19) & 7) = RMEM(INDIRECT_1_DEF(op, op >> 8));
	6046	IREG((op >> 22) & 7) = RMEM(INDIRECT_1(op, op));
	6047	UPDATE_DEF();
	6048	}
	6049
	6050	/*-----------------------------------------------------*/
	6051
	6052	//  src2 = ind(op)
	6053	//  dst2 = ind(op >> 8)
	6054	//  sreg3 = ((op >> 16) & 7)
	6055	//  sreg1 = ((op >> 19) & 7)
	6056	//  dreg1 = ((op >> 22) & 7)
	6057
	6058	void tms3203x_device::absfstf(UINT32 op)
	6059	{
	6060	DECLARE_DEF;
	6061	UINT32 src3 = FP2LONG((op >> 16) & 7);
	6062	UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
	6063	{
	6064	int dreg = (op >> 22) & 7;
	6065	LONG2FP(TMR_TEMP1, src2);
	6066	ABSF(dreg, TMR_TEMP1);
	6067	}
	6068	WMEM(INDIRECT_1(op, op >> 8), src3);
	6069	UPDATE_DEF();
	6070	}
	6071
	6072	void tms3203x_device::absisti(UINT32 op)
	6073	{
	6074	DECLARE_DEF;
	6075	UINT32 src3 = IREG((op >> 16) & 7);
	6076	UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
	6077	{
	6078	int dreg = (op >> 22) & 7;
	6079	ABSI(dreg, src2);
	6080	}
	6081	WMEM(INDIRECT_1(op, op >> 8), src3);
	6082	UPDATE_DEF();
	6083	}
	6084
	6085	void tms3203x_device::addf3stf(UINT32 op)
	6086	{
	6087	DECLARE_DEF;
	6088	UINT32 src3 = FP2LONG((op >> 16) & 7);
	6089	UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
	6090	{
	6091	LONG2FP(TMR_TEMP1, src2);
	6092	addf(m_r[(op >> 22) & 7], m_r[(op >> 19) & 7], m_r[TMR_TEMP1]);
	6093	}
	6094	WMEM(INDIRECT_1(op, op >> 8), src3);
	6095	UPDATE_DEF();
	6096	}
	6097
	6098	void tms3203x_device::addi3sti(UINT32 op)
	6099	{
	6100	DECLARE_DEF;
	6101	UINT32 src3 = IREG((op >> 16) & 7);
	6102	UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
	6103	{
	6104	int dreg = (op >> 22) & 7;
	6105	UINT32 src1 = IREG((op >> 19) & 7);
	6106	ADDI(dreg, src1, src2);
	6107	}
	6108	WMEM(INDIRECT_1(op, op >> 8), src3);
	6109	UPDATE_DEF();
	6110	}
	6111
	6112	void tms3203x_device::and3sti(UINT32 op)
	6113	{
	6114	DECLARE_DEF;
	6115	UINT32 src3 = IREG((op >> 16) & 7);
	6116	UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
	6117	{
	6118	int dreg = (op >> 22) & 7;
	6119	UINT32 src1 = IREG((op >> 19) & 7);
	6120	AND(dreg, src1, src2);
	6121	}
	6122	WMEM(INDIRECT_1(op, op >> 8), src3);
	6123	UPDATE_DEF();
	6124	}
	6125
	6126	void tms3203x_device::ash3sti(UINT32 op)
	6127	{
	6128	DECLARE_DEF;
	6129	UINT32 src3 = IREG((op >> 16) & 7);
	6130	UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
	6131	{
	6132	int dreg = (op >> 22) & 7;
	6133	UINT32 count = IREG((op >> 19) & 7);
	6134	ASH(dreg, src2, count);
	6135	}
	6136	WMEM(INDIRECT_1(op, op >> 8), src3);
	6137	UPDATE_DEF();
	6138	}
	6139
	6140	void tms3203x_device::fixsti(UINT32 op)
	6141	{
	6142	DECLARE_DEF;
	6143	UINT32 src3 = IREG((op >> 16) & 7);
	6144	UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
	6145	{
	6146	int dreg = (op >> 22) & 7;
	6147	LONG2FP(dreg, src2);
	6148	float2int(m_r[dreg], 1);
	6149	}
	6150	WMEM(INDIRECT_1(op, op >> 8), src3);
	6151	UPDATE_DEF();
	6152	}
	6153
	6154	void tms3203x_device::floatstf(UINT32 op)
	6155	{
	6156	DECLARE_DEF;
	6157	UINT32 src3 = FP2LONG((op >> 16) & 7);
	6158	UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
	6159	{
	6160	int dreg = (op >> 22) & 7;
	6161	IREG(dreg) = src2;
	6162	int2float(m_r[dreg]);
	6163	}
	6164	WMEM(INDIRECT_1(op, op >> 8), src3);
	6165	UPDATE_DEF();
	6166	}
	6167
	6168	void tms3203x_device::ldfstf(UINT32 op)
	6169	{
	6170	DECLARE_DEF;
	6171	UINT32 src3 = FP2LONG((op >> 16) & 7);
	6172	UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
	6173	{
	6174	int dreg = (op >> 22) & 7;
	6175	LONG2FP(dreg, src2);
	6176	}
	6177	WMEM(INDIRECT_1(op, op >> 8), src3);
	6178	UPDATE_DEF();
	6179	}
	6180
	6181	void tms3203x_device::ldisti(UINT32 op)
	6182	{
	6183	DECLARE_DEF;
	6184	UINT32 src3 = IREG((op >> 16) & 7);
	6185	UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
	6186	IREG((op >> 22) & 7) = src2;
	6187	WMEM(INDIRECT_1(op, op >> 8), src3);
	6188	UPDATE_DEF();
	6189	}
	6190
	6191	void tms3203x_device::lsh3sti(UINT32 op)
	6192	{
	6193	DECLARE_DEF;
	6194	UINT32 src3 = IREG((op >> 16) & 7);
	6195	UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
	6196	{
	6197	int dreg = (op >> 22) & 7;
	6198	UINT32 count = IREG((op >> 19) & 7);
	6199	LSH(dreg, src2, count);
	6200	}
	6201	WMEM(INDIRECT_1(op, op >> 8), src3);
	6202	UPDATE_DEF();
	6203	}
	6204
	6205	void tms3203x_device::mpyf3stf(UINT32 op)
	6206	{
	6207	DECLARE_DEF;
	6208	UINT32 src3 = FP2LONG((op >> 16) & 7);
	6209	UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
	6210	{
	6211	LONG2FP(TMR_TEMP1, src2);
	6212	mpyf(m_r[(op >> 22) & 7], m_r[(op >> 19) & 7], m_r[TMR_TEMP1]);
	6213	}
	6214	WMEM(INDIRECT_1(op, op >> 8), src3);
	6215	UPDATE_DEF();
	6216	}
	6217
	6218	void tms3203x_device::mpyi3sti(UINT32 op)
	6219	{
	6220	DECLARE_DEF;
	6221	UINT32 src3 = IREG((op >> 16) & 7);
	6222	UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
	6223	{
	6224	int dreg = (op >> 22) & 7;
	6225	UINT32 src1 = IREG((op >> 19) & 7);
	6226	MPYI(dreg, src1, src2);
	6227	}
	6228	WMEM(INDIRECT_1(op, op >> 8), src3);
	6229	UPDATE_DEF();
	6230	}
	6231
	6232	void tms3203x_device::negfstf(UINT32 op)
	6233	{
	6234	DECLARE_DEF;
	6235	UINT32 src3 = FP2LONG((op >> 16) & 7);
	6236	UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
	6237	{
	6238	LONG2FP(TMR_TEMP1, src2);
	6239	negf(m_r[(op >> 22) & 7], m_r[TMR_TEMP1]);
	6240	}
	6241	WMEM(INDIRECT_1(op, op >> 8), src3);
	6242	UPDATE_DEF();
	6243	}
	6244
	6245	void tms3203x_device::negisti(UINT32 op)
	6246	{
	6247	DECLARE_DEF;
	6248	UINT32 src3 = IREG((op >> 16) & 7);
	6249	UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
	6250	{
	6251	int dreg = (op >> 22) & 7;
	6252	NEGI(dreg, src2);
	6253	}
	6254	WMEM(INDIRECT_1(op, op >> 8), src3);
	6255	UPDATE_DEF();
	6256	}
	6257
	6258	void tms3203x_device::notsti(UINT32 op)
	6259	{
	6260	DECLARE_DEF;
	6261	UINT32 src3 = IREG((op >> 16) & 7);
	6262	UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
	6263	{
	6264	int dreg = (op >> 22) & 7;
	6265	NOT(dreg, src2);
	6266	}
	6267	WMEM(INDIRECT_1(op, op >> 8), src3);
	6268	UPDATE_DEF();
	6269	}
	6270
	6271	void tms3203x_device::or3sti(UINT32 op)
	6272	{
	6273	DECLARE_DEF;
	6274	UINT32 src3 = IREG((op >> 16) & 7);
	6275	UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
	6276	{
	6277	int dreg = (op >> 22) & 7;
	6278	UINT32 src1 = IREG((op >> 19) & 7);
	6279	OR(dreg, src1, src2);
	6280	}
	6281	WMEM(INDIRECT_1(op, op >> 8), src3);
	6282	UPDATE_DEF();
	6283	}
	6284
	6285	void tms3203x_device::subf3stf(UINT32 op)
	6286	{
	6287	DECLARE_DEF;
	6288	UINT32 src3 = FP2LONG((op >> 16) & 7);
	6289	UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
	6290	{
	6291	LONG2FP(TMR_TEMP1, src2);
	6292	subf(m_r[(op >> 22) & 7], m_r[TMR_TEMP1], m_r[(op >> 19) & 7]);
	6293	}
	6294	WMEM(INDIRECT_1(op, op >> 8), src3);
	6295	UPDATE_DEF();
	6296	}
	6297
	6298	void tms3203x_device::subi3sti(UINT32 op)
	6299	{
	6300	DECLARE_DEF;
	6301	UINT32 src3 = IREG((op >> 16) & 7);
	6302	UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
	6303	{
	6304	int dreg = (op >> 22) & 7;
	6305	UINT32 src1 = IREG((op >> 19) & 7);
	6306	SUBI(dreg, src2, src1);
	6307	}
	6308	WMEM(INDIRECT_1(op, op >> 8), src3);
	6309	UPDATE_DEF();
	6310	}
	6311
	6312	void tms3203x_device::xor3sti(UINT32 op)
	6313	{
	6314	DECLARE_DEF;
	6315	UINT32 src3 = IREG((op >> 16) & 7);
	6316	UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
	6317	{
	6318	int dreg = (op >> 22) & 7;
	6319	UINT32 src1 = IREG((op >> 19) & 7);
	6320	XOR(dreg, src1, src2);
	6321	}
	6322	WMEM(INDIRECT_1(op, op >> 8), src3);
	6323	UPDATE_DEF();
	6324	}
	6325
	6326
	6327	//**************************************************************************
	6328	//  FUNCTION TABLE
	6329	//**************************************************************************
	6330
	6331	UINT32 (tms3203x_device::*const tms3203x_device::s_indirect_d[0x20])(UINT32, UINT8) =
	6332	{
	6333	&tms3203x_device::mod00_d,      &tms3203x_device::mod01_d,      &tms3203x_device::mod02_d,      &tms3203x_device::mod03_d,
	6334	&tms3203x_device::mod04_d,      &tms3203x_device::mod05_d,      &tms3203x_device::mod06_d,      &tms3203x_device::mod07_d,
	6335	&tms3203x_device::mod08,        &tms3203x_device::mod09,        &tms3203x_device::mod0a,        &tms3203x_device::mod0b,
	6336	&tms3203x_device::mod0c,        &tms3203x_device::mod0d,        &tms3203x_device::mod0e,        &tms3203x_device::mod0f,
	6337	&tms3203x_device::mod10,        &tms3203x_device::mod11,        &tms3203x_device::mod12,        &tms3203x_device::mod13,
	6338	&tms3203x_device::mod14,        &tms3203x_device::mod15,        &tms3203x_device::mod16,        &tms3203x_device::mod17,
	6339	&tms3203x_device::mod18,        &tms3203x_device::mod19,        &tms3203x_device::modillegal,   &tms3203x_device::modillegal,
	6340	&tms3203x_device::modillegal,   &tms3203x_device::modillegal,   &tms3203x_device::modillegal,   &tms3203x_device::modillegal
	6341	};
	6342
	6343
	6344	UINT32 (tms3203x_device::*const tms3203x_device::s_indirect_1[0x20])(UINT32, UINT8) =
	6345	{
	6346	&tms3203x_device::mod00_1,      &tms3203x_device::mod01_1,      &tms3203x_device::mod02_1,      &tms3203x_device::mod03_1,
	6347	&tms3203x_device::mod04_1,      &tms3203x_device::mod05_1,      &tms3203x_device::mod06_1,      &tms3203x_device::mod07_1,
	6348	&tms3203x_device::mod08,        &tms3203x_device::mod09,        &tms3203x_device::mod0a,        &tms3203x_device::mod0b,
	6349	&tms3203x_device::mod0c,        &tms3203x_device::mod0d,        &tms3203x_device::mod0e,        &tms3203x_device::mod0f,
	6350	&tms3203x_device::mod10,        &tms3203x_device::mod11,        &tms3203x_device::mod12,        &tms3203x_device::mod13,
	6351	&tms3203x_device::mod14,        &tms3203x_device::mod15,        &tms3203x_device::mod16,        &tms3203x_device::mod17,
	6352	&tms3203x_device::mod18,        &tms3203x_device::mod19,        &tms3203x_device::modillegal,   &tms3203x_device::modillegal,
	6353	&tms3203x_device::modillegal,   &tms3203x_device::modillegal,   &tms3203x_device::modillegal,   &tms3203x_device::modillegal
	6354	};
	6355
	6356
	6357	UINT32 (tms3203x_device::*const tms3203x_device::s_indirect_1_def[0x20])(UINT32, UINT8, UINT32 *&) =
	6358	{
	6359	&tms3203x_device::mod00_1_def,  &tms3203x_device::mod01_1_def,  &tms3203x_device::mod02_1_def,  &tms3203x_device::mod03_1_def,
	6360	&tms3203x_device::mod04_1_def,  &tms3203x_device::mod05_1_def,  &tms3203x_device::mod06_1_def,  &tms3203x_device::mod07_1_def,
	6361	&tms3203x_device::mod08_def,    &tms3203x_device::mod09_def,    &tms3203x_device::mod0a_def,    &tms3203x_device::mod0b_def,
	6362	&tms3203x_device::mod0c_def,    &tms3203x_device::mod0d_def,    &tms3203x_device::mod0e_def,    &tms3203x_device::mod0f_def,
	6363	&tms3203x_device::mod10_def,    &tms3203x_device::mod11_def,    &tms3203x_device::mod12_def,    &tms3203x_device::mod13_def,
	6364	&tms3203x_device::mod14_def,    &tms3203x_device::mod15_def,    &tms3203x_device::mod16_def,    &tms3203x_device::mod17_def,
	6365	&tms3203x_device::mod18_def,    &tms3203x_device::mod19_def,    &tms3203x_device::modillegal_def,&tms3203x_device::modillegal_def,
	6366	&tms3203x_device::modillegal_def,&tms3203x_device::modillegal_def,&tms3203x_device::modillegal_def,&tms3203x_device::modillegal_def
	6367	};
	6368
	6369	void (tms3203x_device::*const tms3203x_device::s_tms32031ops[])(UINT32 op) =
	6370	{
	6371	&tms3203x_device::absf_reg,     &tms3203x_device::absf_dir,     &tms3203x_device::absf_ind,     &tms3203x_device::absf_imm,     // 0x00
	6372	&tms3203x_device::absi_reg,     &tms3203x_device::absi_dir,     &tms3203x_device::absi_ind,     &tms3203x_device::absi_imm,
	6373	&tms3203x_device::addc_reg,     &tms3203x_device::addc_dir,     &tms3203x_device::addc_ind,     &tms3203x_device::addc_imm,
	6374	&tms3203x_device::addf_reg,     &tms3203x_device::addf_dir,     &tms3203x_device::addf_ind,     &tms3203x_device::addf_imm,
	6375	&tms3203x_device::addi_reg,     &tms3203x_device::addi_dir,     &tms3203x_device::addi_ind,     &tms3203x_device::addi_imm,
	6376	&tms3203x_device::and_reg,      &tms3203x_device::and_dir,      &tms3203x_device::and_ind,      &tms3203x_device::and_imm,
	6377	&tms3203x_device::andn_reg,     &tms3203x_device::andn_dir,     &tms3203x_device::andn_ind,     &tms3203x_device::andn_imm,
	6378	&tms3203x_device::ash_reg,      &tms3203x_device::ash_dir,      &tms3203x_device::ash_ind,      &tms3203x_device::ash_imm,
	6379	&tms3203x_device::cmpf_reg,     &tms3203x_device::cmpf_dir,     &tms3203x_device::cmpf_ind,     &tms3203x_device::cmpf_imm,     // 0x08
	6380	&tms3203x_device::cmpi_reg,     &tms3203x_device::cmpi_dir,     &tms3203x_device::cmpi_ind,     &tms3203x_device::cmpi_imm,
	6381	&tms3203x_device::fix_reg,      &tms3203x_device::fix_dir,      &tms3203x_device::fix_ind,      &tms3203x_device::fix_imm,
	6382	&tms3203x_device::float_reg,    &tms3203x_device::float_dir,    &tms3203x_device::float_ind,    &tms3203x_device::float_imm,
	6383	&tms3203x_device::idle,         &tms3203x_device::idle,         &tms3203x_device::idle,         &tms3203x_device::idle,
	6384	&tms3203x_device::lde_reg,      &tms3203x_device::lde_dir,      &tms3203x_device::lde_ind,      &tms3203x_device::lde_imm,
	6385	&tms3203x_device::ldf_reg,      &tms3203x_device::ldf_dir,      &tms3203x_device::ldf_ind,      &tms3203x_device::ldf_imm,
	6386	&tms3203x_device::illegal,      &tms3203x_device::ldfi_dir,     &tms3203x_device::ldfi_ind,     &tms3203x_device::illegal,
	6387	&tms3203x_device::ldi_reg,      &tms3203x_device::ldi_dir,      &tms3203x_device::ldi_ind,      &tms3203x_device::ldi_imm,      // 0x10
	6388	&tms3203x_device::illegal,      &tms3203x_device::ldii_dir,     &tms3203x_device::ldii_ind,     &tms3203x_device::illegal,
	6389	&tms3203x_device::ldm_reg,      &tms3203x_device::ldm_dir,      &tms3203x_device::ldm_ind,      &tms3203x_device::ldm_imm,
	6390	&tms3203x_device::lsh_reg,      &tms3203x_device::lsh_dir,      &tms3203x_device::lsh_ind,      &tms3203x_device::lsh_imm,
	6391	&tms3203x_device::mpyf_reg,     &tms3203x_device::mpyf_dir,     &tms3203x_device::mpyf_ind,     &tms3203x_device::mpyf_imm,
	6392	&tms3203x_device::mpyi_reg,     &tms3203x_device::mpyi_dir,     &tms3203x_device::mpyi_ind,     &tms3203x_device::mpyi_imm,
	6393	&tms3203x_device::negb_reg,     &tms3203x_device::negb_dir,     &tms3203x_device::negb_ind,     &tms3203x_device::negb_imm,
	6394	&tms3203x_device::negf_reg,     &tms3203x_device::negf_dir,     &tms3203x_device::negf_ind,     &tms3203x_device::negf_imm,
	6395	&tms3203x_device::negi_reg,     &tms3203x_device::negi_dir,     &tms3203x_device::negi_ind,     &tms3203x_device::negi_imm,     // 0x18
	6396	&tms3203x_device::nop_reg,      &tms3203x_device::illegal,      &tms3203x_device::nop_ind,      &tms3203x_device::illegal,
	6397	&tms3203x_device::norm_reg,     &tms3203x_device::norm_dir,     &tms3203x_device::norm_ind,     &tms3203x_device::norm_imm,
	6398	&tms3203x_device::not_reg,      &tms3203x_device::not_dir,      &tms3203x_device::not_ind,      &tms3203x_device::not_imm,
	6399	&tms3203x_device::illegal,      &tms3203x_device::pop,          &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6400	&tms3203x_device::illegal,      &tms3203x_device::popf,         &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6401	&tms3203x_device::illegal,      &tms3203x_device::push,         &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6402	&tms3203x_device::illegal,      &tms3203x_device::pushf,        &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6403	&tms3203x_device::or_reg,       &tms3203x_device::or_dir,       &tms3203x_device::or_ind,       &tms3203x_device::or_imm,       // 0x20
	6404	&tms3203x_device::maxspeed,     &tms3203x_device::maxspeed,     &tms3203x_device::maxspeed,     &tms3203x_device::maxspeed,
	6405	&tms3203x_device::rnd_reg,      &tms3203x_device::rnd_dir,      &tms3203x_device::rnd_ind,      &tms3203x_device::rnd_imm,
	6406	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::rol,
	6407	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::rolc,
	6408	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::ror,
	6409	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::rorc,
	6410	&tms3203x_device::rtps_reg,     &tms3203x_device::rtps_dir,     &tms3203x_device::rtps_ind,     &tms3203x_device::rtps_imm,
	6411	&tms3203x_device::illegal,      &tms3203x_device::stf_dir,      &tms3203x_device::stf_ind,      &tms3203x_device::illegal,      // 0x28
	6412	&tms3203x_device::illegal,      &tms3203x_device::stfi_dir,     &tms3203x_device::stfi_ind,     &tms3203x_device::illegal,
	6413	&tms3203x_device::illegal,      &tms3203x_device::sti_dir,      &tms3203x_device::sti_ind,      &tms3203x_device::illegal,
	6414	&tms3203x_device::illegal,      &tms3203x_device::stii_dir,     &tms3203x_device::stii_ind,     &tms3203x_device::illegal,
	6415	&tms3203x_device::sigi,         &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6416	&tms3203x_device::subb_reg,     &tms3203x_device::subb_dir,     &tms3203x_device::subb_ind,     &tms3203x_device::subb_imm,
	6417	&tms3203x_device::subc_reg,     &tms3203x_device::subc_dir,     &tms3203x_device::subc_ind,     &tms3203x_device::subc_imm,
	6418	&tms3203x_device::subf_reg,     &tms3203x_device::subf_dir,     &tms3203x_device::subf_ind,     &tms3203x_device::subf_imm,
	6419	&tms3203x_device::subi_reg,     &tms3203x_device::subi_dir,     &tms3203x_device::subi_ind,     &tms3203x_device::subi_imm,     // 0x30
	6420	&tms3203x_device::subrb_reg,    &tms3203x_device::subrb_dir,    &tms3203x_device::subrb_ind,    &tms3203x_device::subrb_imm,
	6421	&tms3203x_device::subrf_reg,    &tms3203x_device::subrf_dir,    &tms3203x_device::subrf_ind,    &tms3203x_device::subrf_imm,
	6422	&tms3203x_device::subri_reg,    &tms3203x_device::subri_dir,    &tms3203x_device::subri_ind,    &tms3203x_device::subri_imm,
	6423	&tms3203x_device::tstb_reg,     &tms3203x_device::tstb_dir,     &tms3203x_device::tstb_ind,     &tms3203x_device::tstb_imm,
	6424	&tms3203x_device::xor_reg,      &tms3203x_device::xor_dir,      &tms3203x_device::xor_ind,      &tms3203x_device::xor_imm,
	6425	&tms3203x_device::illegal,      &tms3203x_device::iack_dir,     &tms3203x_device::iack_ind,     &tms3203x_device::illegal,
	6426	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6427	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x38
	6428	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6429	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6430	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6431	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6432	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6433	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6434	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6435
	6436	&tms3203x_device::addc3_regreg, &tms3203x_device::addc3_indreg, &tms3203x_device::addc3_regind, &tms3203x_device::addc3_indind, // 0x40
	6437	&tms3203x_device::addf3_regreg, &tms3203x_device::addf3_indreg, &tms3203x_device::addf3_regind, &tms3203x_device::addf3_indind,
	6438	&tms3203x_device::addi3_regreg, &tms3203x_device::addi3_indreg, &tms3203x_device::addi3_regind, &tms3203x_device::addi3_indind,
	6439	&tms3203x_device::and3_regreg,  &tms3203x_device::and3_indreg,  &tms3203x_device::and3_regind,  &tms3203x_device::and3_indind,
	6440	&tms3203x_device::andn3_regreg, &tms3203x_device::andn3_indreg, &tms3203x_device::andn3_regind, &tms3203x_device::andn3_indind,
	6441	&tms3203x_device::ash3_regreg,  &tms3203x_device::ash3_indreg,  &tms3203x_device::ash3_regind,  &tms3203x_device::ash3_indind,
	6442	&tms3203x_device::cmpf3_regreg, &tms3203x_device::cmpf3_indreg, &tms3203x_device::cmpf3_regind, &tms3203x_device::cmpf3_indind,
	6443	&tms3203x_device::cmpi3_regreg, &tms3203x_device::cmpi3_indreg, &tms3203x_device::cmpi3_regind, &tms3203x_device::cmpi3_indind,
	6444	&tms3203x_device::lsh3_regreg,  &tms3203x_device::lsh3_indreg,  &tms3203x_device::lsh3_regind,  &tms3203x_device::lsh3_indind,  // 0x48
	6445	&tms3203x_device::mpyf3_regreg, &tms3203x_device::mpyf3_indreg, &tms3203x_device::mpyf3_regind, &tms3203x_device::mpyf3_indind,
	6446	&tms3203x_device::mpyi3_regreg, &tms3203x_device::mpyi3_indreg, &tms3203x_device::mpyi3_regind, &tms3203x_device::mpyi3_indind,
	6447	&tms3203x_device::or3_regreg,   &tms3203x_device::or3_indreg,   &tms3203x_device::or3_regind,   &tms3203x_device::or3_indind,
	6448	&tms3203x_device::subb3_regreg, &tms3203x_device::subb3_indreg, &tms3203x_device::subb3_regind, &tms3203x_device::subb3_indind,
	6449	&tms3203x_device::subf3_regreg, &tms3203x_device::subf3_indreg, &tms3203x_device::subf3_regind, &tms3203x_device::subf3_indind,
	6450	&tms3203x_device::subi3_regreg, &tms3203x_device::subi3_indreg, &tms3203x_device::subi3_regind, &tms3203x_device::subi3_indind,
	6451	&tms3203x_device::tstb3_regreg, &tms3203x_device::tstb3_indreg, &tms3203x_device::tstb3_regind, &tms3203x_device::tstb3_indind,
	6452	&tms3203x_device::xor3_regreg,  &tms3203x_device::xor3_indreg,  &tms3203x_device::xor3_regind,  &tms3203x_device::xor3_indind,  // 0x50
	6453	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6454	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6455	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6456	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6457	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6458	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6459	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6460	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x58
	6461	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6462	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6463	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6464	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6465	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6466	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6467	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6468	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x60
	6469	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6470	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6471	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6472	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6473	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6474	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6475	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6476	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x68
	6477	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6478	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6479	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6480	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6481	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6482	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6483	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6484	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x70
	6485	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6486	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6487	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6488	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6489	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6490	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6491	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6492	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x78
	6493	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6494	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6495	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6496	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6497	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6498	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6499	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6500
	6501	&tms3203x_device::ldfu_reg,     &tms3203x_device::ldfu_dir,     &tms3203x_device::ldfu_ind,     &tms3203x_device::ldfu_imm,     // 0x80
	6502	&tms3203x_device::ldflo_reg,    &tms3203x_device::ldflo_dir,    &tms3203x_device::ldflo_ind,    &tms3203x_device::ldflo_imm,
	6503	&tms3203x_device::ldfls_reg,    &tms3203x_device::ldfls_dir,    &tms3203x_device::ldfls_ind,    &tms3203x_device::ldfls_imm,
	6504	&tms3203x_device::ldfhi_reg,    &tms3203x_device::ldfhi_dir,    &tms3203x_device::ldfhi_ind,    &tms3203x_device::ldfhi_imm,
	6505	&tms3203x_device::ldfhs_reg,    &tms3203x_device::ldfhs_dir,    &tms3203x_device::ldfhs_ind,    &tms3203x_device::ldfhs_imm,
	6506	&tms3203x_device::ldfeq_reg,    &tms3203x_device::ldfeq_dir,    &tms3203x_device::ldfeq_ind,    &tms3203x_device::ldfeq_imm,
	6507	&tms3203x_device::ldfne_reg,    &tms3203x_device::ldfne_dir,    &tms3203x_device::ldfne_ind,    &tms3203x_device::ldfne_imm,
	6508	&tms3203x_device::ldflt_reg,    &tms3203x_device::ldflt_dir,    &tms3203x_device::ldflt_ind,    &tms3203x_device::ldflt_imm,
	6509	&tms3203x_device::ldfle_reg,    &tms3203x_device::ldfle_dir,    &tms3203x_device::ldfle_ind,    &tms3203x_device::ldfle_imm,    // 0x88
	6510	&tms3203x_device::ldfgt_reg,    &tms3203x_device::ldfgt_dir,    &tms3203x_device::ldfgt_ind,    &tms3203x_device::ldfgt_imm,
	6511	&tms3203x_device::ldfge_reg,    &tms3203x_device::ldfge_dir,    &tms3203x_device::ldfge_ind,    &tms3203x_device::ldfge_imm,
	6512	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6513	&tms3203x_device::ldfnv_reg,    &tms3203x_device::ldfnv_dir,    &tms3203x_device::ldfnv_ind,    &tms3203x_device::ldfnv_imm,
	6514	&tms3203x_device::ldfv_reg,     &tms3203x_device::ldfv_dir,     &tms3203x_device::ldfv_ind,     &tms3203x_device::ldfv_imm,
	6515	&tms3203x_device::ldfnuf_reg,   &tms3203x_device::ldfnuf_dir,   &tms3203x_device::ldfnuf_ind,   &tms3203x_device::ldfnuf_imm,
	6516	&tms3203x_device::ldfuf_reg,    &tms3203x_device::ldfuf_dir,    &tms3203x_device::ldfuf_ind,    &tms3203x_device::ldfuf_imm,
	6517	&tms3203x_device::ldfnlv_reg,   &tms3203x_device::ldfnlv_dir,   &tms3203x_device::ldfnlv_ind,   &tms3203x_device::ldfnlv_imm,   // 0x90
	6518	&tms3203x_device::ldflv_reg,    &tms3203x_device::ldflv_dir,    &tms3203x_device::ldflv_ind,    &tms3203x_device::ldflv_imm,
	6519	&tms3203x_device::ldfnluf_reg,  &tms3203x_device::ldfnluf_dir,  &tms3203x_device::ldfnluf_ind,  &tms3203x_device::ldfnluf_imm,
	6520	&tms3203x_device::ldfluf_reg,   &tms3203x_device::ldfluf_dir,   &tms3203x_device::ldfluf_ind,   &tms3203x_device::ldfluf_imm,
	6521	&tms3203x_device::ldfzuf_reg,   &tms3203x_device::ldfzuf_dir,   &tms3203x_device::ldfzuf_ind,   &tms3203x_device::ldfzuf_imm,
	6522	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6523	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6524	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6525	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x98
	6526	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6527	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6528	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6529	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6530	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6531	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6532	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6533	&tms3203x_device::ldiu_reg,     &tms3203x_device::ldiu_dir,     &tms3203x_device::ldiu_ind,     &tms3203x_device::ldiu_imm,     // 0xa0
	6534	&tms3203x_device::ldilo_reg,    &tms3203x_device::ldilo_dir,    &tms3203x_device::ldilo_ind,    &tms3203x_device::ldilo_imm,
	6535	&tms3203x_device::ldils_reg,    &tms3203x_device::ldils_dir,    &tms3203x_device::ldils_ind,    &tms3203x_device::ldils_imm,
	6536	&tms3203x_device::ldihi_reg,    &tms3203x_device::ldihi_dir,    &tms3203x_device::ldihi_ind,    &tms3203x_device::ldihi_imm,
	6537	&tms3203x_device::ldihs_reg,    &tms3203x_device::ldihs_dir,    &tms3203x_device::ldihs_ind,    &tms3203x_device::ldihs_imm,
	6538	&tms3203x_device::ldieq_reg,    &tms3203x_device::ldieq_dir,    &tms3203x_device::ldieq_ind,    &tms3203x_device::ldieq_imm,
	6539	&tms3203x_device::ldine_reg,    &tms3203x_device::ldine_dir,    &tms3203x_device::ldine_ind,    &tms3203x_device::ldine_imm,
	6540	&tms3203x_device::ldilt_reg,    &tms3203x_device::ldilt_dir,    &tms3203x_device::ldilt_ind,    &tms3203x_device::ldilt_imm,
	6541	&tms3203x_device::ldile_reg,    &tms3203x_device::ldile_dir,    &tms3203x_device::ldile_ind,    &tms3203x_device::ldile_imm,    // 0xa8
	6542	&tms3203x_device::ldigt_reg,    &tms3203x_device::ldigt_dir,    &tms3203x_device::ldigt_ind,    &tms3203x_device::ldigt_imm,
	6543	&tms3203x_device::ldige_reg,    &tms3203x_device::ldige_dir,    &tms3203x_device::ldige_ind,    &tms3203x_device::ldige_imm,
	6544	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6545	&tms3203x_device::ldinv_reg,    &tms3203x_device::ldinv_dir,    &tms3203x_device::ldinv_ind,    &tms3203x_device::ldinv_imm,
	6546	&tms3203x_device::ldiv_reg,     &tms3203x_device::ldiv_dir,     &tms3203x_device::ldiv_ind,     &tms3203x_device::ldiv_imm,
	6547	&tms3203x_device::ldinuf_reg,   &tms3203x_device::ldinuf_dir,   &tms3203x_device::ldinuf_ind,   &tms3203x_device::ldinuf_imm,
	6548	&tms3203x_device::ldiuf_reg,    &tms3203x_device::ldiuf_dir,    &tms3203x_device::ldiuf_ind,    &tms3203x_device::ldiuf_imm,
	6549	&tms3203x_device::ldinlv_reg,   &tms3203x_device::ldinlv_dir,   &tms3203x_device::ldinlv_ind,   &tms3203x_device::ldinlv_imm,   // 0xb0
	6550	&tms3203x_device::ldilv_reg,    &tms3203x_device::ldilv_dir,    &tms3203x_device::ldilv_ind,    &tms3203x_device::ldilv_imm,
	6551	&tms3203x_device::ldinluf_reg,  &tms3203x_device::ldinluf_dir,  &tms3203x_device::ldinluf_ind,  &tms3203x_device::ldinluf_imm,
	6552	&tms3203x_device::ldiluf_reg,   &tms3203x_device::ldiluf_dir,   &tms3203x_device::ldiluf_ind,   &tms3203x_device::ldiluf_imm,
	6553	&tms3203x_device::ldizuf_reg,   &tms3203x_device::ldizuf_dir,   &tms3203x_device::ldizuf_ind,   &tms3203x_device::ldizuf_imm,
	6554	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6555	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6556	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6557	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0xb8
	6558	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6559	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6560	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6561	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6562	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6563	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6564	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6565
	6566	&tms3203x_device::br_imm,       &tms3203x_device::br_imm,       &tms3203x_device::br_imm,       &tms3203x_device::br_imm,       // 0xc0
	6567	&tms3203x_device::br_imm,       &tms3203x_device::br_imm,       &tms3203x_device::br_imm,       &tms3203x_device::br_imm,
	6568	&tms3203x_device::brd_imm,      &tms3203x_device::brd_imm,      &tms3203x_device::brd_imm,      &tms3203x_device::brd_imm,
	6569	&tms3203x_device::brd_imm,      &tms3203x_device::brd_imm,      &tms3203x_device::brd_imm,      &tms3203x_device::brd_imm,
	6570	&tms3203x_device::call_imm,     &tms3203x_device::call_imm,     &tms3203x_device::call_imm,     &tms3203x_device::call_imm,
	6571	&tms3203x_device::call_imm,     &tms3203x_device::call_imm,     &tms3203x_device::call_imm,     &tms3203x_device::call_imm,
	6572	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6573	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6574	&tms3203x_device::rptb_imm,     &tms3203x_device::rptb_imm,     &tms3203x_device::rptb_imm,     &tms3203x_device::rptb_imm,     // 0xc8
	6575	&tms3203x_device::rptb_imm,     &tms3203x_device::rptb_imm,     &tms3203x_device::rptb_imm,     &tms3203x_device::rptb_imm,
	6576	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6577	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6578	&tms3203x_device::swi,          &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6579	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6580	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6581	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6582	&tms3203x_device::brc_reg,      &tms3203x_device::brcd_reg,     &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0xd0
	6583	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6584	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6585	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6586	&tms3203x_device::brc_imm,      &tms3203x_device::brcd_imm,     &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6587	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6588	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6589	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6590	&tms3203x_device::dbc_reg,      &tms3203x_device::dbcd_reg,     &tms3203x_device::dbc_reg,      &tms3203x_device::dbcd_reg,     // 0xd8
	6591	&tms3203x_device::dbc_reg,      &tms3203x_device::dbcd_reg,     &tms3203x_device::dbc_reg,      &tms3203x_device::dbcd_reg,
	6592	&tms3203x_device::dbc_reg,      &tms3203x_device::dbcd_reg,     &tms3203x_device::dbc_reg,      &tms3203x_device::dbcd_reg,
	6593	&tms3203x_device::dbc_reg,      &tms3203x_device::dbcd_reg,     &tms3203x_device::dbc_reg,      &tms3203x_device::dbcd_reg,
	6594	&tms3203x_device::dbc_imm,      &tms3203x_device::dbcd_imm,     &tms3203x_device::dbc_imm,      &tms3203x_device::dbcd_imm,
	6595	&tms3203x_device::dbc_imm,      &tms3203x_device::dbcd_imm,     &tms3203x_device::dbc_imm,      &tms3203x_device::dbcd_imm,
	6596	&tms3203x_device::dbc_imm,      &tms3203x_device::dbcd_imm,     &tms3203x_device::dbc_imm,      &tms3203x_device::dbcd_imm,
	6597	&tms3203x_device::dbc_imm,      &tms3203x_device::dbcd_imm,     &tms3203x_device::dbc_imm,      &tms3203x_device::dbcd_imm,
	6598	&tms3203x_device::callc_reg,    &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0xe0
	6599	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6600	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6601	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6602	&tms3203x_device::callc_imm,    &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6603	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6604	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6605	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6606	&tms3203x_device::trapc,        &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0xe8
	6607	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6608	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6609	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6610	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6611	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6612	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6613	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6614	&tms3203x_device::retic_reg,    &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0xf0
	6615	&tms3203x_device::retsc_reg,    &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6616	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6617	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6618	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6619	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6620	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6621	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6622	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0xf8
	6623	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6624	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6625	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6626	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6627	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6628	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6629	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6630
	6631	&tms3203x_device::mpyaddf_0,    &tms3203x_device::mpyaddf_0,    &tms3203x_device::mpyaddf_0,    &tms3203x_device::mpyaddf_0,    // 0x100
	6632	&tms3203x_device::mpyaddf_0,    &tms3203x_device::mpyaddf_0,    &tms3203x_device::mpyaddf_0,    &tms3203x_device::mpyaddf_0,
	6633	&tms3203x_device::mpyaddf_1,    &tms3203x_device::mpyaddf_1,    &tms3203x_device::mpyaddf_1,    &tms3203x_device::mpyaddf_1,
	6634	&tms3203x_device::mpyaddf_1,    &tms3203x_device::mpyaddf_1,    &tms3203x_device::mpyaddf_1,    &tms3203x_device::mpyaddf_1,
	6635	&tms3203x_device::mpyaddf_2,    &tms3203x_device::mpyaddf_2,    &tms3203x_device::mpyaddf_2,    &tms3203x_device::mpyaddf_2,
	6636	&tms3203x_device::mpyaddf_2,    &tms3203x_device::mpyaddf_2,    &tms3203x_device::mpyaddf_2,    &tms3203x_device::mpyaddf_2,
	6637	&tms3203x_device::mpyaddf_3,    &tms3203x_device::mpyaddf_3,    &tms3203x_device::mpyaddf_3,    &tms3203x_device::mpyaddf_3,
	6638	&tms3203x_device::mpyaddf_3,    &tms3203x_device::mpyaddf_3,    &tms3203x_device::mpyaddf_3,    &tms3203x_device::mpyaddf_3,
	6639	&tms3203x_device::mpysubf_0,    &tms3203x_device::mpysubf_0,    &tms3203x_device::mpysubf_0,    &tms3203x_device::mpysubf_0,    // 0x108
	6640	&tms3203x_device::mpysubf_0,    &tms3203x_device::mpysubf_0,    &tms3203x_device::mpysubf_0,    &tms3203x_device::mpysubf_0,
	6641	&tms3203x_device::mpysubf_1,    &tms3203x_device::mpysubf_1,    &tms3203x_device::mpysubf_1,    &tms3203x_device::mpysubf_1,
	6642	&tms3203x_device::mpysubf_1,    &tms3203x_device::mpysubf_1,    &tms3203x_device::mpysubf_1,    &tms3203x_device::mpysubf_1,
	6643	&tms3203x_device::mpysubf_2,    &tms3203x_device::mpysubf_2,    &tms3203x_device::mpysubf_2,    &tms3203x_device::mpysubf_2,
	6644	&tms3203x_device::mpysubf_2,    &tms3203x_device::mpysubf_2,    &tms3203x_device::mpysubf_2,    &tms3203x_device::mpysubf_2,
	6645	&tms3203x_device::mpysubf_3,    &tms3203x_device::mpysubf_3,    &tms3203x_device::mpysubf_3,    &tms3203x_device::mpysubf_3,
	6646	&tms3203x_device::mpysubf_3,    &tms3203x_device::mpysubf_3,    &tms3203x_device::mpysubf_3,    &tms3203x_device::mpysubf_3,
	6647	&tms3203x_device::mpyaddi_0,    &tms3203x_device::mpyaddi_0,    &tms3203x_device::mpyaddi_0,    &tms3203x_device::mpyaddi_0,    // 0x110
	6648	&tms3203x_device::mpyaddi_0,    &tms3203x_device::mpyaddi_0,    &tms3203x_device::mpyaddi_0,    &tms3203x_device::mpyaddi_0,
	6649	&tms3203x_device::mpyaddi_1,    &tms3203x_device::mpyaddi_1,    &tms3203x_device::mpyaddi_1,    &tms3203x_device::mpyaddi_1,
	6650	&tms3203x_device::mpyaddi_1,    &tms3203x_device::mpyaddi_1,    &tms3203x_device::mpyaddi_1,    &tms3203x_device::mpyaddi_1,
	6651	&tms3203x_device::mpyaddi_2,    &tms3203x_device::mpyaddi_2,    &tms3203x_device::mpyaddi_2,    &tms3203x_device::mpyaddi_2,
	6652	&tms3203x_device::mpyaddi_2,    &tms3203x_device::mpyaddi_2,    &tms3203x_device::mpyaddi_2,    &tms3203x_device::mpyaddi_2,
	6653	&tms3203x_device::mpyaddi_3,    &tms3203x_device::mpyaddi_3,    &tms3203x_device::mpyaddi_3,    &tms3203x_device::mpyaddi_3,
	6654	&tms3203x_device::mpyaddi_3,    &tms3203x_device::mpyaddi_3,    &tms3203x_device::mpyaddi_3,    &tms3203x_device::mpyaddi_3,
	6655	&tms3203x_device::mpysubi_0,    &tms3203x_device::mpysubi_0,    &tms3203x_device::mpysubi_0,    &tms3203x_device::mpysubi_0,    // 0x118
	6656	&tms3203x_device::mpysubi_0,    &tms3203x_device::mpysubi_0,    &tms3203x_device::mpysubi_0,    &tms3203x_device::mpysubi_0,
	6657	&tms3203x_device::mpysubi_1,    &tms3203x_device::mpysubi_1,    &tms3203x_device::mpysubi_1,    &tms3203x_device::mpysubi_1,
	6658	&tms3203x_device::mpysubi_1,    &tms3203x_device::mpysubi_1,    &tms3203x_device::mpysubi_1,    &tms3203x_device::mpysubi_1,
	6659	&tms3203x_device::mpysubi_2,    &tms3203x_device::mpysubi_2,    &tms3203x_device::mpysubi_2,    &tms3203x_device::mpysubi_2,
	6660	&tms3203x_device::mpysubi_2,    &tms3203x_device::mpysubi_2,    &tms3203x_device::mpysubi_2,    &tms3203x_device::mpysubi_2,
	6661	&tms3203x_device::mpysubi_3,    &tms3203x_device::mpysubi_3,    &tms3203x_device::mpysubi_3,    &tms3203x_device::mpysubi_3,
	6662	&tms3203x_device::mpysubi_3,    &tms3203x_device::mpysubi_3,    &tms3203x_device::mpysubi_3,    &tms3203x_device::mpysubi_3,
	6663	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x120
	6664	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6665	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6666	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6667	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6668	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6669	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6670	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6671	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x128
	6672	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6673	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6674	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6675	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6676	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6677	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6678	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6679	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x130
	6680	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6681	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6682	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6683	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6684	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6685	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6686	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6687	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x138
	6688	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6689	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6690	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6691	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6692	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6693	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6694	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6695
	6696	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x140
	6697	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6698	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6699	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6700	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6701	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6702	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6703	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6704	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x148
	6705	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6706	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6707	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6708	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6709	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6710	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6711	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6712	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x150
	6713	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6714	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6715	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6716	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6717	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6718	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6719	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6720	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x158
	6721	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6722	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6723	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6724	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6725	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6726	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6727	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6728	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x160
	6729	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6730	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6731	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6732	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6733	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6734	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6735	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6736	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x168
	6737	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6738	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6739	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6740	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6741	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6742	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6743	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6744	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x170
	6745	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6746	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6747	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6748	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6749	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6750	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6751	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6752	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x178
	6753	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6754	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6755	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6756	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6757	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6758	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6759	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6760
	6761	&tms3203x_device::stfstf,       &tms3203x_device::stfstf,       &tms3203x_device::stfstf,       &tms3203x_device::stfstf,       // 0x180
	6762	&tms3203x_device::stfstf,       &tms3203x_device::stfstf,       &tms3203x_device::stfstf,       &tms3203x_device::stfstf,
	6763	&tms3203x_device::stfstf,       &tms3203x_device::stfstf,       &tms3203x_device::stfstf,       &tms3203x_device::stfstf,
	6764	&tms3203x_device::stfstf,       &tms3203x_device::stfstf,       &tms3203x_device::stfstf,       &tms3203x_device::stfstf,
	6765	&tms3203x_device::stisti,       &tms3203x_device::stisti,       &tms3203x_device::stisti,       &tms3203x_device::stisti,
	6766	&tms3203x_device::stisti,       &tms3203x_device::stisti,       &tms3203x_device::stisti,       &tms3203x_device::stisti,
	6767	&tms3203x_device::stisti,       &tms3203x_device::stisti,       &tms3203x_device::stisti,       &tms3203x_device::stisti,
	6768	&tms3203x_device::stisti,       &tms3203x_device::stisti,       &tms3203x_device::stisti,       &tms3203x_device::stisti,
	6769	&tms3203x_device::ldfldf,       &tms3203x_device::ldfldf,       &tms3203x_device::ldfldf,       &tms3203x_device::ldfldf,       // 0x188
	6770	&tms3203x_device::ldfldf,       &tms3203x_device::ldfldf,       &tms3203x_device::ldfldf,       &tms3203x_device::ldfldf,
	6771	&tms3203x_device::ldfldf,       &tms3203x_device::ldfldf,       &tms3203x_device::ldfldf,       &tms3203x_device::ldfldf,
	6772	&tms3203x_device::ldfldf,       &tms3203x_device::ldfldf,       &tms3203x_device::ldfldf,       &tms3203x_device::ldfldf,
	6773	&tms3203x_device::ldildi,       &tms3203x_device::ldildi,       &tms3203x_device::ldildi,       &tms3203x_device::ldildi,
	6774	&tms3203x_device::ldildi,       &tms3203x_device::ldildi,       &tms3203x_device::ldildi,       &tms3203x_device::ldildi,
	6775	&tms3203x_device::ldildi,       &tms3203x_device::ldildi,       &tms3203x_device::ldildi,       &tms3203x_device::ldildi,
	6776	&tms3203x_device::ldildi,       &tms3203x_device::ldildi,       &tms3203x_device::ldildi,       &tms3203x_device::ldildi,
	6777	&tms3203x_device::absfstf,      &tms3203x_device::absfstf,      &tms3203x_device::absfstf,      &tms3203x_device::absfstf,      // 0x190
	6778	&tms3203x_device::absfstf,      &tms3203x_device::absfstf,      &tms3203x_device::absfstf,      &tms3203x_device::absfstf,
	6779	&tms3203x_device::absfstf,      &tms3203x_device::absfstf,      &tms3203x_device::absfstf,      &tms3203x_device::absfstf,
	6780	&tms3203x_device::absfstf,      &tms3203x_device::absfstf,      &tms3203x_device::absfstf,      &tms3203x_device::absfstf,
	6781	&tms3203x_device::absisti,      &tms3203x_device::absisti,      &tms3203x_device::absisti,      &tms3203x_device::absisti,
	6782	&tms3203x_device::absisti,      &tms3203x_device::absisti,      &tms3203x_device::absisti,      &tms3203x_device::absisti,
	6783	&tms3203x_device::absisti,      &tms3203x_device::absisti,      &tms3203x_device::absisti,      &tms3203x_device::absisti,
	6784	&tms3203x_device::absisti,      &tms3203x_device::absisti,      &tms3203x_device::absisti,      &tms3203x_device::absisti,
	6785	&tms3203x_device::addf3stf,     &tms3203x_device::addf3stf,     &tms3203x_device::addf3stf,     &tms3203x_device::addf3stf,     // 0x198
	6786	&tms3203x_device::addf3stf,     &tms3203x_device::addf3stf,     &tms3203x_device::addf3stf,     &tms3203x_device::addf3stf,
	6787	&tms3203x_device::addf3stf,     &tms3203x_device::addf3stf,     &tms3203x_device::addf3stf,     &tms3203x_device::addf3stf,
	6788	&tms3203x_device::addf3stf,     &tms3203x_device::addf3stf,     &tms3203x_device::addf3stf,     &tms3203x_device::addf3stf,
	6789	&tms3203x_device::addi3sti,     &tms3203x_device::addi3sti,     &tms3203x_device::addi3sti,     &tms3203x_device::addi3sti,
	6790	&tms3203x_device::addi3sti,     &tms3203x_device::addi3sti,     &tms3203x_device::addi3sti,     &tms3203x_device::addi3sti,
	6791	&tms3203x_device::addi3sti,     &tms3203x_device::addi3sti,     &tms3203x_device::addi3sti,     &tms3203x_device::addi3sti,
	6792	&tms3203x_device::addi3sti,     &tms3203x_device::addi3sti,     &tms3203x_device::addi3sti,     &tms3203x_device::addi3sti,
	6793	&tms3203x_device::and3sti,      &tms3203x_device::and3sti,      &tms3203x_device::and3sti,      &tms3203x_device::and3sti,      // 0x1a0
	6794	&tms3203x_device::and3sti,      &tms3203x_device::and3sti,      &tms3203x_device::and3sti,      &tms3203x_device::and3sti,
	6795	&tms3203x_device::and3sti,      &tms3203x_device::and3sti,      &tms3203x_device::and3sti,      &tms3203x_device::and3sti,
	6796	&tms3203x_device::and3sti,      &tms3203x_device::and3sti,      &tms3203x_device::and3sti,      &tms3203x_device::and3sti,
	6797	&tms3203x_device::ash3sti,      &tms3203x_device::ash3sti,      &tms3203x_device::ash3sti,      &tms3203x_device::ash3sti,
	6798	&tms3203x_device::ash3sti,      &tms3203x_device::ash3sti,      &tms3203x_device::ash3sti,      &tms3203x_device::ash3sti,
	6799	&tms3203x_device::ash3sti,      &tms3203x_device::ash3sti,      &tms3203x_device::ash3sti,      &tms3203x_device::ash3sti,
	6800	&tms3203x_device::ash3sti,      &tms3203x_device::ash3sti,      &tms3203x_device::ash3sti,      &tms3203x_device::ash3sti,
	6801	&tms3203x_device::fixsti,       &tms3203x_device::fixsti,       &tms3203x_device::fixsti,       &tms3203x_device::fixsti,       // 0x1a8
	6802	&tms3203x_device::fixsti,       &tms3203x_device::fixsti,       &tms3203x_device::fixsti,       &tms3203x_device::fixsti,
	6803	&tms3203x_device::fixsti,       &tms3203x_device::fixsti,       &tms3203x_device::fixsti,       &tms3203x_device::fixsti,
	6804	&tms3203x_device::fixsti,       &tms3203x_device::fixsti,       &tms3203x_device::fixsti,       &tms3203x_device::fixsti,
	6805	&tms3203x_device::floatstf,     &tms3203x_device::floatstf,     &tms3203x_device::floatstf,     &tms3203x_device::floatstf,
	6806	&tms3203x_device::floatstf,     &tms3203x_device::floatstf,     &tms3203x_device::floatstf,     &tms3203x_device::floatstf,
	6807	&tms3203x_device::floatstf,     &tms3203x_device::floatstf,     &tms3203x_device::floatstf,     &tms3203x_device::floatstf,
	6808	&tms3203x_device::floatstf,     &tms3203x_device::floatstf,     &tms3203x_device::floatstf,     &tms3203x_device::floatstf,
	6809	&tms3203x_device::ldfstf,       &tms3203x_device::ldfstf,       &tms3203x_device::ldfstf,       &tms3203x_device::ldfstf,       // 0x1b0
	6810	&tms3203x_device::ldfstf,       &tms3203x_device::ldfstf,       &tms3203x_device::ldfstf,       &tms3203x_device::ldfstf,
	6811	&tms3203x_device::ldfstf,       &tms3203x_device::ldfstf,       &tms3203x_device::ldfstf,       &tms3203x_device::ldfstf,
	6812	&tms3203x_device::ldfstf,       &tms3203x_device::ldfstf,       &tms3203x_device::ldfstf,       &tms3203x_device::ldfstf,
	6813	&tms3203x_device::ldisti,       &tms3203x_device::ldisti,       &tms3203x_device::ldisti,       &tms3203x_device::ldisti,
	6814	&tms3203x_device::ldisti,       &tms3203x_device::ldisti,       &tms3203x_device::ldisti,       &tms3203x_device::ldisti,
	6815	&tms3203x_device::ldisti,       &tms3203x_device::ldisti,       &tms3203x_device::ldisti,       &tms3203x_device::ldisti,
	6816	&tms3203x_device::ldisti,       &tms3203x_device::ldisti,       &tms3203x_device::ldisti,       &tms3203x_device::ldisti,
	6817	&tms3203x_device::lsh3sti,      &tms3203x_device::lsh3sti,      &tms3203x_device::lsh3sti,      &tms3203x_device::lsh3sti,      // 0x1b8
	6818	&tms3203x_device::lsh3sti,      &tms3203x_device::lsh3sti,      &tms3203x_device::lsh3sti,      &tms3203x_device::lsh3sti,
	6819	&tms3203x_device::lsh3sti,      &tms3203x_device::lsh3sti,      &tms3203x_device::lsh3sti,      &tms3203x_device::lsh3sti,
	6820	&tms3203x_device::lsh3sti,      &tms3203x_device::lsh3sti,      &tms3203x_device::lsh3sti,      &tms3203x_device::lsh3sti,
	6821	&tms3203x_device::mpyf3stf,     &tms3203x_device::mpyf3stf,     &tms3203x_device::mpyf3stf,     &tms3203x_device::mpyf3stf,
	6822	&tms3203x_device::mpyf3stf,     &tms3203x_device::mpyf3stf,     &tms3203x_device::mpyf3stf,     &tms3203x_device::mpyf3stf,
	6823	&tms3203x_device::mpyf3stf,     &tms3203x_device::mpyf3stf,     &tms3203x_device::mpyf3stf,     &tms3203x_device::mpyf3stf,
	6824	&tms3203x_device::mpyf3stf,     &tms3203x_device::mpyf3stf,     &tms3203x_device::mpyf3stf,     &tms3203x_device::mpyf3stf,
	6825
	6826	&tms3203x_device::mpyi3sti,     &tms3203x_device::mpyi3sti,     &tms3203x_device::mpyi3sti,     &tms3203x_device::mpyi3sti,     // 0x1c0
	6827	&tms3203x_device::mpyi3sti,     &tms3203x_device::mpyi3sti,     &tms3203x_device::mpyi3sti,     &tms3203x_device::mpyi3sti,
	6828	&tms3203x_device::mpyi3sti,     &tms3203x_device::mpyi3sti,     &tms3203x_device::mpyi3sti,     &tms3203x_device::mpyi3sti,
	6829	&tms3203x_device::mpyi3sti,     &tms3203x_device::mpyi3sti,     &tms3203x_device::mpyi3sti,     &tms3203x_device::mpyi3sti,
	6830	&tms3203x_device::negfstf,      &tms3203x_device::negfstf,      &tms3203x_device::negfstf,      &tms3203x_device::negfstf,
	6831	&tms3203x_device::negfstf,      &tms3203x_device::negfstf,      &tms3203x_device::negfstf,      &tms3203x_device::negfstf,
	6832	&tms3203x_device::negfstf,      &tms3203x_device::negfstf,      &tms3203x_device::negfstf,      &tms3203x_device::negfstf,
	6833	&tms3203x_device::negfstf,      &tms3203x_device::negfstf,      &tms3203x_device::negfstf,      &tms3203x_device::negfstf,
	6834	&tms3203x_device::negisti,      &tms3203x_device::negisti,      &tms3203x_device::negisti,      &tms3203x_device::negisti,      // 0x1c8
	6835	&tms3203x_device::negisti,      &tms3203x_device::negisti,      &tms3203x_device::negisti,      &tms3203x_device::negisti,
	6836	&tms3203x_device::negisti,      &tms3203x_device::negisti,      &tms3203x_device::negisti,      &tms3203x_device::negisti,
	6837	&tms3203x_device::negisti,      &tms3203x_device::negisti,      &tms3203x_device::negisti,      &tms3203x_device::negisti,
	6838	&tms3203x_device::notsti,       &tms3203x_device::notsti,       &tms3203x_device::notsti,       &tms3203x_device::notsti,
	6839	&tms3203x_device::notsti,       &tms3203x_device::notsti,       &tms3203x_device::notsti,       &tms3203x_device::notsti,
	6840	&tms3203x_device::notsti,       &tms3203x_device::notsti,       &tms3203x_device::notsti,       &tms3203x_device::notsti,
	6841	&tms3203x_device::notsti,       &tms3203x_device::notsti,       &tms3203x_device::notsti,       &tms3203x_device::notsti,
	6842	&tms3203x_device::or3sti,       &tms3203x_device::or3sti,       &tms3203x_device::or3sti,       &tms3203x_device::or3sti,       // 0x1d0
	6843	&tms3203x_device::or3sti,       &tms3203x_device::or3sti,       &tms3203x_device::or3sti,       &tms3203x_device::or3sti,
	6844	&tms3203x_device::or3sti,       &tms3203x_device::or3sti,       &tms3203x_device::or3sti,       &tms3203x_device::or3sti,
	6845	&tms3203x_device::or3sti,       &tms3203x_device::or3sti,       &tms3203x_device::or3sti,       &tms3203x_device::or3sti,
	6846	&tms3203x_device::subf3stf,     &tms3203x_device::subf3stf,     &tms3203x_device::subf3stf,     &tms3203x_device::subf3stf,
	6847	&tms3203x_device::subf3stf,     &tms3203x_device::subf3stf,     &tms3203x_device::subf3stf,     &tms3203x_device::subf3stf,
	6848	&tms3203x_device::subf3stf,     &tms3203x_device::subf3stf,     &tms3203x_device::subf3stf,     &tms3203x_device::subf3stf,
	6849	&tms3203x_device::subf3stf,     &tms3203x_device::subf3stf,     &tms3203x_device::subf3stf,     &tms3203x_device::subf3stf,
	6850	&tms3203x_device::subi3sti,     &tms3203x_device::subi3sti,     &tms3203x_device::subi3sti,     &tms3203x_device::subi3sti,     // 0x1d8
	6851	&tms3203x_device::subi3sti,     &tms3203x_device::subi3sti,     &tms3203x_device::subi3sti,     &tms3203x_device::subi3sti,
	6852	&tms3203x_device::subi3sti,     &tms3203x_device::subi3sti,     &tms3203x_device::subi3sti,     &tms3203x_device::subi3sti,
	6853	&tms3203x_device::subi3sti,     &tms3203x_device::subi3sti,     &tms3203x_device::subi3sti,     &tms3203x_device::subi3sti,
	6854	&tms3203x_device::xor3sti,      &tms3203x_device::xor3sti,      &tms3203x_device::xor3sti,      &tms3203x_device::xor3sti,
	6855	&tms3203x_device::xor3sti,      &tms3203x_device::xor3sti,      &tms3203x_device::xor3sti,      &tms3203x_device::xor3sti,
	6856	&tms3203x_device::xor3sti,      &tms3203x_device::xor3sti,      &tms3203x_device::xor3sti,      &tms3203x_device::xor3sti,
	6857	&tms3203x_device::xor3sti,      &tms3203x_device::xor3sti,      &tms3203x_device::xor3sti,      &tms3203x_device::xor3sti,
	6858	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x1e0
	6859	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6860	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6861	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6862	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6863	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6864	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6865	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6866	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x1e8
	6867	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6868	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6869	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6870	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6871	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6872	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6873	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6874	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x1f0
	6875	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6876	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6877	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6878	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6879	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6880	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6881	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6882	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      // 0x1f8
	6883	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6884	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6885	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6886	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6887	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6888	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,
	6889	&tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal,      &tms3203x_device::illegal
	6890	};

trunk/src/devices/cpu/tms32031/tms32031.cpp

r250251	r250252
846	846	//  CORE OPCODES
847	847	//**************************************************************************
848	848
849		#include "32031ops.cpp"
	849	#include "32031ops.inc"

trunk/src/devices/cpu/tms32051/32051ops.cpp

r250251	r250252
1		// license:BSD-3-Clause
2		// copyright-holders:Ville Linde
3		// stack is LIFO and is 8 levels deep, there is no stackpointer on the real chip
4		void tms32051_device::PUSH_STACK(UINT16 pc)
5		{
6		m_pcstack_ptr = (m_pcstack_ptr - 1) & 7;
7		m_pcstack[m_pcstack_ptr] = pc;
8		}
9
10		UINT16 tms32051_device::POP_STACK()
11		{
12		UINT16 pc = m_pcstack[m_pcstack_ptr];
13		m_pcstack_ptr = (m_pcstack_ptr + 1) & 7;
14		m_pcstack[(m_pcstack_ptr + 7) & 7] = m_pcstack[(m_pcstack_ptr + 6) & 7];
15		return pc;
16		}
17
18		INT32 tms32051_device::SUB(UINT32 a, UINT32 b)
19		{
20		UINT32 res = a - b;
21
22		// C is cleared if borrow was generated
23		m_st1.c = (b > a) ? 0 : 1;
24
25		// check overflow
26		if ((a ^ b) & (a ^ res) & 0x80000000)
27		{
28		if (m_st0.ovm)  // overflow saturation mode
29		{
30		res = ((INT32)(res) < 0) ? 0x7fffffff : 0x80000000;
31		}
32
33		// set OV, this is a sticky flag
34		m_st0.ov = 1;
35		}
36
37		return (INT32)(res);
38		}
39
40		INT32 tms32051_device::ADD(UINT32 a, UINT32 b)
41		{
42		UINT32 res = a + b;
43
44		// C is set if carry was generated
45		m_st1.c = (a > res) ? 1 : 0;
46
47		// check overflow
48		if ((a ^ res) & (b ^ res) & 0x80000000)
49		{
50		if (m_st0.ovm)  // overflow saturation mode
51		{
52		res = ((INT32)(res) < 0) ? 0x7fffffff : 0x80000000;
53		}
54
55		// set OV, this is a sticky flag
56		m_st0.ov = 1;
57		}
58
59		return (INT32)(res);
60		}
61
62
63		void tms32051_device::UPDATE_AR(int ar, int step)
64		{
65		int cenb1 = (m_cbcr >> 3) & 0x1;
66		int car1 = m_cbcr & 0x7;
67		int cenb2 = (m_cbcr >> 7) & 0x1;
68		int car2 = (m_cbcr >> 4) & 0x7;
69
70		if (cenb1 && ar == car1)
71		{
72		// update circular buffer 1, note that it only checks ==
73		if (m_ar[ar] == m_cber1)
74		{
75		m_ar[ar] = m_cbsr1;
76		}
77		else
78		{
79		m_ar[ar] += step;
80		}
81		}
82		else if (cenb2 && ar == car2)
83		{
84		// update circular buffer 2, note that it only checks ==
85		if (m_ar[ar] == m_cber2)
86		{
87		m_ar[ar] = m_cbsr2;
88		}
89		else
90		{
91		m_ar[ar] += step;
92		}
93		}
94		else
95		{
96		m_ar[ar] += step;
97		}
98		}
99
100		void tms32051_device::UPDATE_ARP(int nar)
101		{
102		m_st1.arb = m_st0.arp;
103		m_st0.arp = nar;
104		}
105
106		UINT16 tms32051_device::GET_ADDRESS()
107		{
108		if (m_op & 0x80)        // Indirect Addressing
109		{
110		UINT16 ea;
111		int arp = m_st0.arp;
112		int nar = m_op & 0x7;
113
114		ea = m_ar[arp];
115
116		switch ((m_op >> 3) & 0xf)
117		{
118		case 0x0:   // *            (no operation)
119		{
120		break;
121		}
122		case 0x1:   // *, ARn       (NAR -> ARP)
123		{
124		UPDATE_ARP(nar);
125		break;
126		}
127		case 0x2:   // *-           ((CurrentAR)-1 -> CurrentAR)
128		{
129		UPDATE_AR(arp, -1);
130		break;
131		}
132		case 0x3:   // *-, ARn      ((CurrentAR)-1 -> CurrentAR, NAR -> ARP)
133		{
134		UPDATE_AR(arp, -1);
135		UPDATE_ARP(nar);
136		break;
137		}
138		case 0x4:   // *+           ((CurrentAR)+1 -> CurrentAR)
139		{
140		UPDATE_AR(arp, 1);
141		break;
142		}
143		case 0x5:   // *+, ARn      ((CurrentAR)+1 -> CurrentAR, NAR -> ARP)
144		{
145		UPDATE_AR(arp, 1);
146		UPDATE_ARP(nar);
147		break;
148		}
149		case 0xa:   // *0-          ((CurrentAR) - INDX)
150		{
151		UPDATE_AR(arp, -m_indx);
152		break;
153		}
154		case 0xb:   // *0-, ARn     ((CurrentAR) - INDX -> CurrentAR, NAR -> ARP)
155		{
156		UPDATE_AR(arp, -m_indx);
157		UPDATE_ARP(nar);
158		break;
159		}
160		case 0xc:   // *0+          ((CurrentAR) + INDX -> CurrentAR)
161		{
162		UPDATE_AR(arp, m_indx);
163		break;
164		}
165		case 0xd:   // *0+, ARn     ((CurrentAR) + INDX -> CurrentAR, NAR -> ARP)
166		{
167		UPDATE_AR(arp, m_indx);
168		UPDATE_ARP(nar);
169		break;
170		}
171
172		default:    fatalerror("32051: GET_ADDRESS: unimplemented indirect addressing mode %d at %04X (%04X)\n", (m_op >> 3) & 0xf, m_pc, m_op);
173		}
174
175		return ea;
176		}
177		else                    // Direct Addressing
178		{
179		return m_st0.dp | (m_op & 0x7f);
180		}
181		}
182
183		int tms32051_device::GET_ZLVC_CONDITION(int zlvc, int zlvc_mask)
184		{
185		if (zlvc_mask & 0x2)        // OV-bit
186		{
187		if ((zlvc & 0x2) && m_st0.ov)                           // OV
188		{
189		// clear OV
190		m_st0.ov = 0;
191
192		return 1;
193		}
194		else if ((zlvc & 0x2) == 0 && m_st0.ov == 0)            // NOV
195		return 1;
196		}
197		if (zlvc_mask & 0x1)        // C-bit
198		{
199		if ((zlvc & 0x1) && m_st1.c)                            // C
200		return 1;
201		else if ((zlvc & 0x1) == 0 && m_st1.c == 0)         // NC
202		return 1;
203		}
204		if (zlvc_mask & 0x8)        // Z-bit
205		{
206		if ((zlvc & 0x8) && (INT32)(m_acc) == 0)                // EQ
207		return 1;
208		else if ((zlvc & 0x8) == 0 && (INT32)(m_acc) != 0)  // NEQ
209		return 1;
210		}
211		if (zlvc_mask & 0x4)        // L-bit
212		{
213		if ((zlvc & 0x4) && (INT32)(m_acc) < 0)             // LT
214		return 1;
215		else if ((zlvc & 0x4) == 0 && (INT32)(m_acc) > 0)       // GT
216		return 1;
217		}
218		return 0;
219		}
220
221		int tms32051_device::GET_TP_CONDITION(int tp)
222		{
223		switch (tp)
224		{
225		case 0:     // BIO pin low
226		{
227		// TODO
228		return 0;
229		}
230		case 1:     // TC = 1
231		{
232		return m_st1.tc;
233		}
234		case 2:     // TC = 0
235		{
236		return m_st1.tc ^ 1;
237		}
238		case 3:     // always false
239		{
240		return 0;
241		}
242		}
243		return 0;
244		}
245
246		INT32 tms32051_device::PREG_PSCALER(INT32 preg)
247		{
248		switch (m_st1.pm & 3)
249		{
250		case 0:     // No shift
251		{
252		return preg;
253		}
254		case 1:     // Left-shifted 1 bit, LSB zero-filled
255		{
256		return preg << 1;
257		}
258		case 2:     // Left-shifted 4 bits, 4 LSBs zero-filled
259		{
260		return preg << 4;
261		}
262		case 3:     // Right-shifted 6 bits, sign-extended, 6 LSBs lost
263		{
264		return (INT32)(preg >> 6);
265		}
266		}
267		return 0;
268		}
269
270
271
272		void tms32051_device::op_invalid()
273		{
274		fatalerror("32051: invalid op at %08X\n", m_pc-1);
275		}
276
277		/*****************************************************************************/
278
279		void tms32051_device::op_abs()
280		{
281		fatalerror("32051: unimplemented op abs at %08X\n", m_pc-1);
282		}
283
284		void tms32051_device::op_adcb()
285		{
286		fatalerror("32051: unimplemented op adcb at %08X\n", m_pc-1);
287		}
288
289		void tms32051_device::op_add_mem()
290		{
291		INT32 d;
292		UINT16 ea = GET_ADDRESS();
293		UINT16 data = DM_READ16(ea);
294		int shift = (m_op >> 8) & 0xf;
295
296		if (m_st1.sxm)
297		{
298		d = (INT32)(INT16)(data) << shift;
299		}
300		else
301		{
302		d = (UINT32)(UINT16)(data) << shift;
303		}
304
305		m_acc = ADD(m_acc, d);
306
307		CYCLES(1);
308		}
309
310		void tms32051_device::op_add_simm()
311		{
312		UINT16 imm = m_op & 0xff;
313
314		m_acc = ADD(m_acc, imm);
315
316		CYCLES(1);
317		}
318
319		void tms32051_device::op_add_limm()
320		{
321		INT32 d;
322		UINT16 imm = ROPCODE();
323		int shift = m_op & 0xf;
324
325		if (m_st1.sxm)
326		{
327		d = (INT32)(INT16)(imm) << shift;
328		}
329		else
330		{
331		d = (UINT32)(UINT16)(imm) << shift;
332		}
333
334		m_acc = ADD(m_acc, d);
335
336		CYCLES(2);
337		}
338
339		void tms32051_device::op_add_s16_mem()
340		{
341		UINT16 ea = GET_ADDRESS();
342		UINT32 data = DM_READ16(ea) << 16;
343
344		m_acc = ADD(m_acc, data);
345
346		CYCLES(1);
347		}
348
349		void tms32051_device::op_addb()
350		{
351		m_acc = ADD(m_acc, m_accb);
352
353		CYCLES(1);
354		}
355
356		void tms32051_device::op_addc()
357		{
358		fatalerror("32051: unimplemented op addc at %08X\n", m_pc-1);
359		}
360
361		void tms32051_device::op_adds()
362		{
363		fatalerror("32051: unimplemented op adds at %08X\n", m_pc-1);
364		}
365
366		void tms32051_device::op_addt()
367		{
368		fatalerror("32051: unimplemented op addt at %08X\n", m_pc-1);
369		}
370
371		void tms32051_device::op_and_mem()
372		{
373		fatalerror("32051: unimplemented op and mem at %08X\n", m_pc-1);
374		}
375
376		void tms32051_device::op_and_limm()
377		{
378		UINT32 imm = ROPCODE();
379		int shift = m_op & 0xf;
380
381		m_acc &= imm << shift;
382
383		CYCLES(2);
384		}
385
386		void tms32051_device::op_and_s16_limm()
387		{
388		fatalerror("32051: unimplemented op and s16 limm at %08X\n", m_pc-1);
389		}
390
391		void tms32051_device::op_andb()
392		{
393		fatalerror("32051: unimplemented op andb at %08X\n", m_pc-1);
394		}
395
396		void tms32051_device::op_bsar()
397		{
398		int shift = (m_op & 0xf) + 1;
399
400		if (m_st1.sxm)
401		{
402		m_acc = (INT32)(m_acc) >> shift;
403		}
404		else
405		{
406		m_acc = (UINT32)(m_acc) >> shift;
407		}
408
409		CYCLES(1);
410		}
411
412		void tms32051_device::op_cmpl()
413		{
414		m_acc = ~(UINT32)(m_acc);
415
416		CYCLES(1);
417		}
418
419		void tms32051_device::op_crgt()
420		{
421		if (m_acc >= m_accb)
422		{
423		m_accb = m_acc;
424		m_st1.c = 1;
425		}
426		else
427		{
428		m_acc = m_accb;
429		m_st1.c = 0;
430		}
431
432		CYCLES(1);
433		}
434
435		void tms32051_device::op_crlt()
436		{
437		if (m_acc >= m_accb)
438		{
439		m_acc = m_accb;
440		m_st1.c = 0;
441		}
442		else
443		{
444		m_accb = m_acc;
445		m_st1.c = 1;
446		}
447
448		CYCLES(1);
449		}
450
451		void tms32051_device::op_exar()
452		{
453		INT32 tmp = m_acc;
454		m_acc = m_accb;
455		m_accb = tmp;
456
457		CYCLES(1);
458		}
459
460		void tms32051_device::op_lacb()
461		{
462		m_acc = m_accb;
463
464		CYCLES(1);
465		}
466
467		void tms32051_device::op_lacc_mem()
468		{
469		int shift = (m_op >> 8) & 0xf;
470		UINT16 ea = GET_ADDRESS();
471		UINT16 data = DM_READ16(ea);
472
473		if (m_st1.sxm)
474		{
475		m_acc = (INT32)(INT16)(data) << shift;
476		}
477		else
478		{
479		m_acc = (UINT32)(UINT16)(data) << shift;
480		}
481
482		CYCLES(1);
483		}
484
485		void tms32051_device::op_lacc_limm()
486		{
487		UINT16 imm = ROPCODE();
488		int shift = m_op & 0xf;
489
490		if (m_st1.sxm)
491		{
492		m_acc = (INT32)(INT16)(imm) << shift;
493		}
494		else
495		{
496		m_acc = (UINT32)(UINT16)(imm) << shift;
497		}
498
499		CYCLES(1);
500		}
501
502		void tms32051_device::op_lacc_s16_mem()
503		{
504		UINT16 ea = GET_ADDRESS();
505		m_acc = DM_READ16(ea) << 16;
506
507		CYCLES(1);
508		}
509
510		void tms32051_device::op_lacl_simm()
511		{
512		m_acc = m_op & 0xff;
513
514		CYCLES(1);
515		}
516
517		void tms32051_device::op_lacl_mem()
518		{
519		UINT16 ea = GET_ADDRESS();
520		m_acc = DM_READ16(ea) & 0xffff;
521
522		CYCLES(1);
523		}
524
525		void tms32051_device::op_lact()
526		{
527		fatalerror("32051: unimplemented op lact at %08X\n", m_pc-1);
528		}
529
530		void tms32051_device::op_lamm()
531		{
532		UINT16 ea = GET_ADDRESS() & 0x7f;
533		m_acc = DM_READ16(ea) & 0xffff;
534
535		CYCLES(1);
536		}
537
538		void tms32051_device::op_neg()
539		{
540		if ((UINT32)(m_acc) == 0x80000000)
541		{
542		m_st0.ov = 1;
543		m_st1.c = 0;
544		m_acc = (m_st0.ovm) ? 0x7fffffff : 0x80000000;
545		}
546		else
547		{
548		m_acc = 0 - (UINT32)(m_acc);
549		m_st1.c = (m_acc == 0) ? 1 : 0;
550		}
551
552		CYCLES(1);
553		}
554
555		void tms32051_device::op_norm()
556		{
557		fatalerror("32051: unimplemented op norm at %08X\n", m_pc-1);
558		}
559
560		void tms32051_device::op_or_mem()
561		{
562		UINT16 ea = GET_ADDRESS();
563		UINT16 data = DM_READ16(ea);
564
565		m_acc |= (UINT32)(data);
566
567		CYCLES(1);
568		}
569
570		void tms32051_device::op_or_limm()
571		{
572		UINT32 imm = ROPCODE();
573		int shift = m_op & 0xf;
574
575		m_acc |= imm << shift;
576
577		CYCLES(1);
578		}
579
580		void tms32051_device::op_or_s16_limm()
581		{
582		fatalerror("32051: unimplemented op or s16 limm at %08X\n", m_pc-1);
583		}
584
585		void tms32051_device::op_orb()
586		{
587		m_acc |= m_accb;
588
589		CYCLES(1);
590		}
591
592		void tms32051_device::op_rol()
593		{
594		fatalerror("32051: unimplemented op rol at %08X\n", m_pc-1);
595		}
596
597		void tms32051_device::op_rolb()
598		{
599		UINT32 acc = m_acc;
600		UINT32 accb = m_accb;
601		UINT32 c = m_st1.c & 1;
602
603		m_acc = (acc << 1) | ((accb >> 31) & 1);
604		m_accb = (accb << 1) | c;
605		m_st1.c = (acc >> 31) & 1;
606
607		CYCLES(1);
608		}
609
610		void tms32051_device::op_ror()
611		{
612		fatalerror("32051: unimplemented op ror at %08X\n", m_pc-1);
613		}
614
615		void tms32051_device::op_rorb()
616		{
617		fatalerror("32051: unimplemented op rorb at %08X\n", m_pc-1);
618		}
619
620		void tms32051_device::op_sacb()
621		{
622		m_accb = m_acc;
623
624		CYCLES(1);
625		}
626
627		void tms32051_device::op_sach()
628		{
629		UINT16 ea = GET_ADDRESS();
630		int shift = (m_op >> 8) & 0x7;
631
632		DM_WRITE16(ea, (UINT16)((m_acc << shift) >> 16));
633		CYCLES(1);
634		}
635
636		void tms32051_device::op_sacl()
637		{
638		UINT16 ea = GET_ADDRESS();
639		int shift = (m_op >> 8) & 0x7;
640
641		DM_WRITE16(ea, (UINT16)(m_acc << shift));
642		CYCLES(1);
643		}
644
645		void tms32051_device::op_samm()
646		{
647		UINT16 ea = GET_ADDRESS();
648		ea &= 0x7f;
649
650		DM_WRITE16(ea, (UINT16)(m_acc));
651		CYCLES(1);
652		}
653
654		void tms32051_device::op_sath()
655		{
656		fatalerror("32051: unimplemented op sath at %08X\n", m_pc-1);
657		}
658
659		void tms32051_device::op_satl()
660		{
661		fatalerror("32051: unimplemented op satl at %08X\n", m_pc-1);
662		}
663
664		void tms32051_device::op_sbb()
665		{
666		m_acc = SUB(m_acc, m_accb);
667
668		CYCLES(1);
669		}
670
671		void tms32051_device::op_sbbb()
672		{
673		fatalerror("32051: unimplemented op sbbb at %08X\n", m_pc-1);
674		}
675
676		void tms32051_device::op_sfl()
677		{
678		m_st1.c = (m_acc >> 31) & 1;
679		m_acc = m_acc << 1;
680
681		CYCLES(1);
682		}
683
684		void tms32051_device::op_sflb()
685		{
686		UINT32 acc = m_acc;
687		UINT32 accb = m_accb;
688
689		m_acc = (acc << 1) | ((accb >> 31) & 1);
690		m_accb = (accb << 1);
691		m_st1.c = (acc >> 31) & 1;
692
693		CYCLES(1);
694		}
695
696		void tms32051_device::op_sfr()
697		{
698		m_st1.c = m_acc & 1;
699
700		if (m_st1.sxm)
701		{
702		m_acc = (INT32)(m_acc) >> 1;
703		}
704		else
705		{
706		m_acc = (UINT32)(m_acc) >> 1;
707		}
708
709		CYCLES(1);
710		}
711
712		void tms32051_device::op_sfrb()
713		{
714		fatalerror("32051: unimplemented op sfrb at %08X\n", m_pc-1);
715		}
716
717		void tms32051_device::op_sub_mem()
718		{
719		INT32 d;
720		UINT16 ea = GET_ADDRESS();
721		UINT16 data = DM_READ16(ea);
722		int shift = (m_op >> 8) & 0xf;
723
724		if (m_st1.sxm)
725		{
726		d = (INT32)(INT16)(data) << shift;
727		}
728		else
729		{
730		d = (UINT32)(UINT16)(data) << shift;
731		}
732
733		m_acc = SUB(m_acc, d);
734
735		CYCLES(1);
736		}
737
738		void tms32051_device::op_sub_s16_mem()
739		{
740		fatalerror("32051: unimplemented op sub s16 mem at %08X\n", m_pc-1);
741		}
742
743		void tms32051_device::op_sub_simm()
744		{
745		UINT16 imm = m_op & 0xff;
746
747		m_acc = SUB(m_acc, imm);
748
749		CYCLES(1);
750		}
751
752		void tms32051_device::op_sub_limm()
753		{
754		INT32 d;
755		UINT16 imm = ROPCODE();
756		int shift = m_op & 0xf;
757
758		if (m_st1.sxm)
759		{
760		d = (INT32)(INT16)(imm) << shift;
761		}
762		else
763		{
764		d = (UINT32)(UINT16)(imm) << shift;
765		}
766
767		m_acc = SUB(m_acc, d);
768
769		CYCLES(2);
770		}
771
772		void tms32051_device::op_subb()
773		{
774		fatalerror("32051: unimplemented op subb at %08X\n", m_pc-1);
775		}
776
777		void tms32051_device::op_subc()
778		{
779		fatalerror("32051: unimplemented op subc at %08X\n", m_pc-1);
780		}
781
782		void tms32051_device::op_subs()
783		{
784		fatalerror("32051: unimplemented op subs at %08X\n", m_pc-1);
785		}
786
787		void tms32051_device::op_subt()
788		{
789		fatalerror("32051: unimplemented op subt at %08X\n", m_pc-1);
790		}
791
792		void tms32051_device::op_xor_mem()
793		{
794		UINT16 ea = GET_ADDRESS();
795		UINT16 data = DM_READ16(ea);
796
797		m_acc ^= (UINT32)(data);
798
799		CYCLES(1);
800		}
801
802		void tms32051_device::op_xor_limm()
803		{
804		UINT32 imm = ROPCODE();
805		int shift = m_op & 0xf;
806
807		m_acc ^= imm << shift;
808
809		CYCLES(1);
810		}
811
812		void tms32051_device::op_xor_s16_limm()
813		{
814		fatalerror("32051: unimplemented op xor s16 limm at %08X\n", m_pc-1);
815		}
816
817		void tms32051_device::op_xorb()
818		{
819		fatalerror("32051: unimplemented op xorb at %08X\n", m_pc-1);
820		}
821
822		void tms32051_device::op_zalr()
823		{
824		fatalerror("32051: unimplemented op zalr at %08X\n", m_pc-1);
825		}
826
827		void tms32051_device::op_zap()
828		{
829		m_acc = 0;
830		m_preg = 0;
831
832		CYCLES(1);
833		}
834
835		/*****************************************************************************/
836
837		void tms32051_device::op_adrk()
838		{
839		UINT16 imm = m_op & 0xff;
840		UPDATE_AR(m_st0.arp, imm);
841
842		CYCLES(1);
843		}
844
845		void tms32051_device::op_cmpr()
846		{
847		m_st1.tc = 0;
848
849		switch (m_op & 0x3)
850		{
851		case 0:         // (CurrentAR) == ARCR
852		{
853		if (m_ar[m_st0.arp] == m_arcr)
854		{
855		m_st1.tc = 1;
856		}
857		break;
858		}
859		case 1:         // (CurrentAR) < ARCR
860		{
861		if (m_ar[m_st0.arp] < m_arcr)
862		{
863		m_st1.tc = 1;
864		}
865		break;
866		}
867		case 2:         // (CurrentAR) > ARCR
868		{
869		if (m_ar[m_st0.arp] > m_arcr)
870		{
871		m_st1.tc = 1;
872		}
873		break;
874		}
875		case 3:         // (CurrentAR) != ARCR
876		{
877		if (m_ar[m_st0.arp] != m_arcr)
878		{
879		m_st1.tc = 1;
880		}
881		break;
882		}
883		}
884
885		CYCLES(1);
886		}
887
888		void tms32051_device::op_lar_mem()
889		{
890		int arx = (m_op >> 8) & 0x7;
891		UINT16 ea = GET_ADDRESS();
892		UINT16 data = DM_READ16(ea);
893
894		m_ar[arx] = data;
895
896		CYCLES(2);
897		}
898
899		void tms32051_device::op_lar_simm()
900		{
901		int arx = (m_op >> 8) & 0x7;
902		m_ar[arx] = m_op & 0xff;
903
904		CYCLES(2);
905		}
906
907		void tms32051_device::op_lar_limm()
908		{
909		int arx = m_op & 0x7;
910		UINT16 imm = ROPCODE();
911		m_ar[arx] = imm;
912
913		CYCLES(2);
914		}
915
916		void tms32051_device::op_ldp_mem()
917		{
918		fatalerror("32051: unimplemented op ldp mem at %08X\n", m_pc-1);
919		}
920
921		void tms32051_device::op_ldp_imm()
922		{
923		m_st0.dp = (m_op & 0x1ff) << 7;
924		CYCLES(2);
925		}
926
927		void tms32051_device::op_mar()
928		{
929		// direct addressing is NOP
930		if (m_op & 0x80)
931		{
932		GET_ADDRESS();
933		}
934		CYCLES(1);
935		}
936
937		void tms32051_device::op_sar()
938		{
939		int arx = (m_op >> 8) & 0x7;
940		UINT16 ar = m_ar[arx];
941		UINT16 ea = GET_ADDRESS();
942		DM_WRITE16(ea, ar);
943
944		CYCLES(1);
945		}
946
947		void tms32051_device::op_sbrk()
948		{
949		UINT16 imm = m_op & 0xff;
950		UPDATE_AR(m_st0.arp, -imm);
951
952		CYCLES(1);
953		}
954
955		/*****************************************************************************/
956
957		void tms32051_device::op_b()
958		{
959		UINT16 pma = ROPCODE();
960		GET_ADDRESS();      // update AR/ARP
961
962		CHANGE_PC(pma);
963		CYCLES(4);
964		}
965
966		void tms32051_device::op_bacc()
967		{
968		CHANGE_PC((UINT16)(m_acc));
969
970		CYCLES(4);
971		}
972
973		void tms32051_device::op_baccd()
974		{
975		UINT16 pc = (UINT16)(m_acc);
976
977		delay_slot(m_pc);
978		CHANGE_PC(pc);
979
980		CYCLES(2);
981		}
982
983		void tms32051_device::op_banz()
984		{
985		UINT16 pma = ROPCODE();
986
987		if (m_ar[m_st0.arp] != 0)
988		{
989		CHANGE_PC(pma);
990		CYCLES(4);
991		}
992		else
993		{
994		CYCLES(2);
995		}
996
997		GET_ADDRESS();      // modify AR/ARP
998		}
999
1000		void tms32051_device::op_banzd()
1001		{
1002		fatalerror("32051: unimplemented op banzd at %08X\n", m_pc-1);
1003		}
1004
1005		void tms32051_device::op_bcnd()
1006		{
1007		UINT16 pma = ROPCODE();
1008
1009		if (GET_ZLVC_CONDITION((m_op >> 4) & 0xf, m_op & 0xf) || GET_TP_CONDITION((m_op >> 8) & 0x3))
1010		{
1011		CHANGE_PC(pma);
1012		CYCLES(4);
1013		}
1014		else
1015		{
1016		CYCLES(2);
1017		}
1018		}
1019
1020		void tms32051_device::op_bcndd()
1021		{
1022		UINT16 pma = ROPCODE();
1023
1024		if (GET_ZLVC_CONDITION((m_op >> 4) & 0xf, m_op & 0xf) || GET_TP_CONDITION((m_op >> 8) & 0x3))
1025		{
1026		delay_slot(m_pc);
1027		CHANGE_PC(pma);
1028		CYCLES(4);
1029		}
1030		else
1031		{
1032		CYCLES(2);
1033		}
1034		}
1035
1036		void tms32051_device::op_bd()
1037		{
1038		UINT16 pma = ROPCODE();
1039		GET_ADDRESS();      // update AR/ARP
1040
1041		delay_slot(m_pc);
1042		CHANGE_PC(pma);
1043		CYCLES(2);
1044		}
1045
1046		void tms32051_device::op_cala()
1047		{
1048		PUSH_STACK(m_pc);
1049
1050		CHANGE_PC(m_acc);
1051
1052		CYCLES(4);
1053		}
1054
1055		void tms32051_device::op_calad()
1056		{
1057		UINT16 pma = m_acc;
1058		PUSH_STACK(m_pc+2);
1059
1060		delay_slot(m_pc);
1061		CHANGE_PC(pma);
1062
1063		CYCLES(4);
1064		}
1065
1066		void tms32051_device::op_call()
1067		{
1068		UINT16 pma = ROPCODE();
1069		GET_ADDRESS();      // update AR/ARP
1070		PUSH_STACK(m_pc);
1071
1072		CHANGE_PC(pma);
1073
1074		CYCLES(4);
1075		}
1076
1077		void tms32051_device::op_calld()
1078		{
1079		UINT16 pma = ROPCODE();
1080		GET_ADDRESS();      // update AR/ARP
1081		PUSH_STACK(m_pc+2);
1082
1083		delay_slot(m_pc);
1084		CHANGE_PC(pma);
1085
1086		CYCLES(4);
1087		}
1088
1089		void tms32051_device::op_cc()
1090		{
1091		fatalerror("32051: unimplemented op cc at %08X\n", m_pc-1);
1092		}
1093
1094		void tms32051_device::op_ccd()
1095		{
1096		UINT16 pma = ROPCODE();
1097
1098		if (GET_ZLVC_CONDITION((m_op >> 4) & 0xf, m_op & 0xf) || GET_TP_CONDITION((m_op >> 8) & 0x3))
1099		{
1100		PUSH_STACK(m_pc+2);
1101
1102		delay_slot(m_pc);
1103		CHANGE_PC(pma);
1104		}
1105
1106		CYCLES(2);
1107		}
1108
1109		void tms32051_device::op_intr()
1110		{
1111		fatalerror("32051: unimplemented op intr at %08X\n", m_pc-1);
1112		}
1113
1114		void tms32051_device::op_nmi()
1115		{
1116		fatalerror("32051: unimplemented op nmi at %08X\n", m_pc-1);
1117		}
1118
1119		void tms32051_device::op_retc()
1120		{
1121		if ((m_op & 0x3ff) == 0x300 || GET_ZLVC_CONDITION((m_op >> 4) & 0xf, m_op & 0xf) || GET_TP_CONDITION((m_op >> 8) & 0x3))
1122		{
1123		UINT16 pc = POP_STACK();
1124		CHANGE_PC(pc);
1125		CYCLES(4);
1126		}
1127		else
1128		{
1129		CYCLES(2);
1130		}
1131		}
1132
1133		void tms32051_device::op_retcd()
1134		{
1135		if ((m_op & 0x3ff) == 0x300 || GET_ZLVC_CONDITION((m_op >> 4) & 0xf, m_op & 0xf) || GET_TP_CONDITION((m_op >> 8) & 0x3))
1136		{
1137		UINT16 pc = POP_STACK();
1138		delay_slot(m_pc);
1139		CHANGE_PC(pc);
1140		CYCLES(4);
1141		}
1142		else
1143		{
1144		CYCLES(2);
1145		}
1146		}
1147
1148		void tms32051_device::op_rete()
1149		{
1150		UINT16 pc = POP_STACK();
1151		CHANGE_PC(pc);
1152
1153		m_st0.intm = 0;
1154
1155		restore_interrupt_context();
1156
1157		CYCLES(4);
1158		}
1159
1160		void tms32051_device::op_reti()
1161		{
1162		fatalerror("32051: unimplemented op reti at %08X\n", m_pc-1);
1163		}
1164
1165		void tms32051_device::op_trap()
1166		{
1167		fatalerror("32051: unimplemented op trap at %08X\n", m_pc-1);
1168		}
1169
1170		void tms32051_device::op_xc()
1171		{
1172		if (GET_ZLVC_CONDITION((m_op >> 4) & 0xf, m_op & 0xf) || GET_TP_CONDITION((m_op >> 8) & 0x3))
1173		{
1174		CYCLES(1);
1175		}
1176		else
1177		{
1178		int n = ((m_op >> 12) & 0x1) + 1;
1179		CHANGE_PC(m_pc + n);
1180		CYCLES(1 + n);
1181		}
1182		}
1183
1184		/*****************************************************************************/
1185
1186		void tms32051_device::op_bldd_slimm()
1187		{
1188		UINT16 pfc = ROPCODE();
1189
1190		while (m_rptc > -1)
1191		{
1192		UINT16 ea = GET_ADDRESS();
1193		UINT16 data = DM_READ16(pfc);
1194		DM_WRITE16(ea, data);
1195		pfc++;
1196		CYCLES(2);
1197
1198		m_rptc--;
1199		};
1200		}
1201
1202		void tms32051_device::op_bldd_dlimm()
1203		{
1204		UINT16 pfc = ROPCODE();
1205
1206		while (m_rptc > -1)
1207		{
1208		UINT16 ea = GET_ADDRESS();
1209		UINT16 data = DM_READ16(ea);
1210		DM_WRITE16(pfc, data);
1211		pfc++;
1212		CYCLES(2);
1213
1214		m_rptc--;
1215		};
1216		}
1217
1218		void tms32051_device::op_bldd_sbmar()
1219		{
1220		UINT16 pfc = m_bmar;
1221
1222		while (m_rptc > -1)
1223		{
1224		UINT16 ea = GET_ADDRESS();
1225		UINT16 data = DM_READ16(pfc);
1226		DM_WRITE16(ea, data);
1227		pfc++;
1228		CYCLES(2);
1229
1230		m_rptc--;
1231		};
1232		}
1233
1234		void tms32051_device::op_bldd_dbmar()
1235		{
1236		UINT16 pfc = m_bmar;
1237
1238		while (m_rptc > -1)
1239		{
1240		UINT16 ea = GET_ADDRESS();
1241		UINT16 data = DM_READ16(ea);
1242		DM_WRITE16(pfc, data);
1243		pfc++;
1244		CYCLES(2);
1245
1246		m_rptc--;
1247		};
1248		}
1249
1250		void tms32051_device::op_bldp()
1251		{
1252		UINT16 pfc = m_bmar;
1253
1254		while (m_rptc > -1)
1255		{
1256		UINT16 ea = GET_ADDRESS();
1257		UINT16 data = DM_READ16(ea);
1258		PM_WRITE16(pfc, data);
1259		pfc++;
1260		CYCLES(1);
1261
1262		m_rptc--;
1263		};
1264		}
1265
1266		void tms32051_device::op_blpd_bmar()
1267		{
1268		fatalerror("32051: unimplemented op bpld bmar at %08X\n", m_pc-1);
1269		}
1270
1271		void tms32051_device::op_blpd_imm()
1272		{
1273		UINT16 pfc = ROPCODE();
1274
1275		while (m_rptc > -1)
1276		{
1277		UINT16 ea = GET_ADDRESS();
1278		UINT16 data = PM_READ16(pfc);
1279		DM_WRITE16(ea, data);
1280		pfc++;
1281		CYCLES(2);
1282
1283		m_rptc--;
1284		};
1285		}
1286
1287		/*****************************************************************************/
1288
1289		void tms32051_device::op_dmov()
1290		{
1291		fatalerror("32051: unimplemented op dmov at %08X\n", m_pc-1);
1292		}
1293
1294		void tms32051_device::op_in()
1295		{
1296		fatalerror("32051: unimplemented op in at %08X\n", m_pc-1);
1297		}
1298
1299		void tms32051_device::op_lmmr()
1300		{
1301		UINT16 pfc = ROPCODE();
1302
1303		while (m_rptc > -1)
1304		{
1305		UINT16 ea = GET_ADDRESS();
1306		UINT16 data = DM_READ16(pfc);
1307		DM_WRITE16(ea & 0x7f, data);
1308		pfc++;
1309		CYCLES(2);
1310
1311		m_rptc--;
1312		};
1313		}
1314
1315		void tms32051_device::op_out()
1316		{
1317		fatalerror("32051: unimplemented op out at %08X\n", m_pc-1);
1318		}
1319
1320		void tms32051_device::op_smmr()
1321		{
1322		UINT16 pfc = ROPCODE();
1323
1324		while (m_rptc > -1)
1325		{
1326		UINT16 ea = GET_ADDRESS();
1327		UINT16 data = DM_READ16(ea & 0x7f);
1328		DM_WRITE16(pfc, data);
1329		pfc++;
1330		CYCLES(2);
1331
1332		m_rptc--;
1333		};
1334		}
1335
1336		void tms32051_device::op_tblr()
1337		{
1338		UINT16 pfc = (UINT16)(m_acc);
1339
1340		while (m_rptc > -1)
1341		{
1342		UINT16 ea = GET_ADDRESS();
1343		UINT16 data = PM_READ16(pfc);
1344		DM_WRITE16(ea, data);
1345		pfc++;
1346		CYCLES(2);
1347
1348		m_rptc--;
1349		};
1350		}
1351
1352		void tms32051_device::op_tblw()
1353		{
1354		UINT16 pfc = (UINT16)(m_acc);
1355
1356		while (m_rptc > -1)
1357		{
1358		UINT16 ea = GET_ADDRESS();
1359		UINT16 data = DM_READ16(ea);
1360		PM_WRITE16(pfc, data);
1361		pfc++;
1362		CYCLES(2);
1363
1364		m_rptc--;
1365		};
1366		}
1367
1368		/*****************************************************************************/
1369
1370		void tms32051_device::op_apl_dbmr()
1371		{
1372		UINT16 ea = GET_ADDRESS();
1373		UINT16 data = DM_READ16(ea);
1374		data &= m_dbmr;
1375		DM_WRITE16(ea, data);
1376		CYCLES(1);
1377		}
1378
1379		void tms32051_device::op_apl_imm()
1380		{
1381		UINT16 ea = GET_ADDRESS();
1382		UINT16 imm = ROPCODE();
1383		UINT16 data = DM_READ16(ea);
1384		data &= imm;
1385		DM_WRITE16(ea, data);
1386		CYCLES(1);
1387		}
1388
1389		void tms32051_device::op_cpl_dbmr()
1390		{
1391		fatalerror("32051: unimplemented op cpl dbmr at %08X\n", m_pc-1);
1392		}
1393
1394		void tms32051_device::op_cpl_imm()
1395		{
1396		UINT16 imm = ROPCODE();
1397		UINT16 ea = GET_ADDRESS();
1398		UINT16 data = DM_READ16(ea);
1399
1400		m_st1.tc = (data == imm) ? 1 : 0;
1401
1402		CYCLES(1);
1403		}
1404
1405		void tms32051_device::op_opl_dbmr()
1406		{
1407		UINT16 ea = GET_ADDRESS();
1408		UINT16 data = DM_READ16(ea);
1409		data |= m_dbmr;
1410		DM_WRITE16(ea, data);
1411		CYCLES(1);
1412		}
1413
1414		void tms32051_device::op_opl_imm()
1415		{
1416		UINT16 ea = GET_ADDRESS();
1417		UINT16 imm = ROPCODE();
1418		UINT16 data = DM_READ16(ea);
1419		data |= imm;
1420		DM_WRITE16(ea, data);
1421		CYCLES(1);
1422		}
1423
1424		void tms32051_device::op_splk()
1425		{
1426		UINT16 ea = GET_ADDRESS();
1427		UINT16 imm = ROPCODE();
1428
1429		DM_WRITE16(ea, imm);
1430
1431		CYCLES(2);
1432		}
1433
1434		void tms32051_device::op_xpl_dbmr()
1435		{
1436		fatalerror("32051: unimplemented op xpl dbmr at %08X\n", m_pc-1);
1437		}
1438
1439		void tms32051_device::op_xpl_imm()
1440		{
1441		fatalerror("32051: unimplemented op xpl imm at %08X\n", m_pc-1);
1442		}
1443
1444		void tms32051_device::op_apac()
1445		{
1446		INT32 spreg = PREG_PSCALER(m_preg);
1447		m_acc = ADD(m_acc, spreg);
1448
1449		CYCLES(1);
1450		}
1451
1452		void tms32051_device::op_lph()
1453		{
1454		fatalerror("32051: unimplemented op lph at %08X\n", m_pc-1);
1455		}
1456
1457		void tms32051_device::op_lt()
1458		{
1459		UINT16 ea = GET_ADDRESS();
1460		UINT16 data = DM_READ16(ea);
1461
1462		m_treg0 = data;
1463		if (m_pmst.trm == 0)
1464		{
1465		m_treg1 = data;
1466		m_treg2 = data;
1467		}
1468
1469		CYCLES(1);
1470		}
1471
1472		void tms32051_device::op_lta()
1473		{
1474		INT32 spreg;
1475		UINT16 ea = GET_ADDRESS();
1476		UINT16 data = DM_READ16(ea);
1477
1478		m_treg0 = data;
1479		spreg = PREG_PSCALER(m_preg);
1480		m_acc = ADD(m_acc, spreg);
1481		if (m_pmst.trm == 0)
1482		{
1483		m_treg1 = data;
1484		m_treg2 = data;
1485		}
1486
1487		CYCLES(1);
1488		}
1489
1490		void tms32051_device::op_ltd()
1491		{
1492		fatalerror("32051: unimplemented op ltd at %08X\n", m_pc-1);
1493		}
1494
1495		void tms32051_device::op_ltp()
1496		{
1497		fatalerror("32051: unimplemented op ltp at %08X\n", m_pc-1);
1498		}
1499
1500		void tms32051_device::op_lts()
1501		{
1502		fatalerror("32051: unimplemented op lts at %08X\n", m_pc-1);
1503		}
1504
1505		void tms32051_device::op_mac()
1506		{
1507		fatalerror("32051: unimplemented op mac at %08X\n", m_pc-1);
1508		}
1509
1510		void tms32051_device::op_macd()
1511		{
1512		fatalerror("32051: unimplemented op macd at %08X\n", m_pc-1);
1513		}
1514
1515		void tms32051_device::op_madd()
1516		{
1517		fatalerror("32051: unimplemented op madd at %08X\n", m_pc-1);
1518		}
1519
1520		void tms32051_device::op_mads()
1521		{
1522		fatalerror("32051: unimplemented op mads at %08X\n", m_pc-1);
1523		}
1524
1525		void tms32051_device::op_mpy_mem()
1526		{
1527		UINT16 ea = GET_ADDRESS();
1528		INT16 data = DM_READ16(ea);
1529
1530		m_preg = (INT32)(data) * (INT32)(INT16)(m_treg0);
1531
1532		CYCLES(1);
1533		}
1534
1535		void tms32051_device::op_mpy_simm()
1536		{
1537		fatalerror("32051: unimplemented op mpy simm at %08X\n", m_pc-1);
1538		}
1539
1540		void tms32051_device::op_mpy_limm()
1541		{
1542		fatalerror("32051: unimplemented op mpy limm at %08X\n", m_pc-1);
1543		}
1544
1545		void tms32051_device::op_mpya()
1546		{
1547		fatalerror("32051: unimplemented op mpya at %08X\n", m_pc-1);
1548		}
1549
1550		void tms32051_device::op_mpys()
1551		{
1552		fatalerror("32051: unimplemented op mpys at %08X\n", m_pc-1);
1553		}
1554
1555		void tms32051_device::op_mpyu()
1556		{
1557		fatalerror("32051: unimplemented op mpyu at %08X\n", m_pc-1);
1558		}
1559
1560		void tms32051_device::op_pac()
1561		{
1562		fatalerror("32051: unimplemented op pac at %08X\n", m_pc-1);
1563		}
1564
1565		void tms32051_device::op_spac()
1566		{
1567		fatalerror("32051: unimplemented op spac at %08X\n", m_pc-1);
1568		}
1569
1570		void tms32051_device::op_sph()
1571		{
1572		UINT16 ea = GET_ADDRESS();
1573		UINT16 spreg = (UINT16)(PREG_PSCALER(m_preg) >> 16);
1574		DM_WRITE16(ea, spreg);
1575
1576		CYCLES(1);
1577		}
1578
1579		void tms32051_device::op_spl()
1580		{
1581		fatalerror("32051: unimplemented op spl at %08X\n", m_pc-1);
1582		}
1583
1584		void tms32051_device::op_spm()
1585		{
1586		m_st1.pm = m_op & 0x3;
1587
1588		CYCLES(1);
1589		}
1590
1591		void tms32051_device::op_sqra()
1592		{
1593		fatalerror("32051: unimplemented op sqra at %08X\n", m_pc-1);
1594		}
1595
1596		void tms32051_device::op_sqrs()
1597		{
1598		fatalerror("32051: unimplemented op sqrs at %08X\n", m_pc-1);
1599		}
1600
1601		void tms32051_device::op_zpr()
1602		{
1603		fatalerror("32051: unimplemented op zpr at %08X\n", m_pc-1);
1604		}
1605
1606		void tms32051_device::op_bit()
1607		{
1608		UINT16 ea = GET_ADDRESS();
1609		UINT16 data = DM_READ16(ea);
1610
1611		m_st1.tc = (data >> (~m_op >> 8 & 0xf)) & 1;
1612
1613		CYCLES(1);
1614		}
1615
1616		void tms32051_device::op_bitt()
1617		{
1618		UINT16 ea = GET_ADDRESS();
1619		UINT16 data = DM_READ16(ea);
1620
1621		m_st1.tc = (data >> (~m_treg2 & 0xf)) & 1;
1622
1623		CYCLES(1);
1624		}
1625
1626		void tms32051_device::op_clrc_ov()
1627		{
1628		m_st0.ovm = 0;
1629
1630		CYCLES(1);
1631		}
1632
1633		void tms32051_device::op_clrc_ext()
1634		{
1635		m_st1.sxm = 0;
1636
1637		CYCLES(1);
1638		}
1639
1640		void tms32051_device::op_clrc_hold()
1641		{
1642		fatalerror("32051: unimplemented op clrc hold at %08X\n", m_pc-1);
1643		}
1644
1645		void tms32051_device::op_clrc_tc()
1646		{
1647		fatalerror("32051: unimplemented op clrc tc at %08X\n", m_pc-1);
1648		}
1649
1650		void tms32051_device::op_clrc_carry()
1651		{
1652		fatalerror("32051: unimplemented op clrc carry at %08X\n", m_pc-1);
1653		}
1654
1655		void tms32051_device::op_clrc_cnf()
1656		{
1657		m_st1.cnf = 0;
1658
1659		CYCLES(1);
1660		}
1661
1662		void tms32051_device::op_clrc_intm()
1663		{
1664		m_st0.intm = 0;
1665
1666		check_interrupts();
1667
1668		CYCLES(1);
1669		}
1670
1671		void tms32051_device::op_clrc_xf()
1672		{
1673		fatalerror("32051: unimplemented op clrc xf at %08X\n", m_pc-1);
1674		}
1675
1676		void tms32051_device::op_idle()
1677		{
1678		fatalerror("32051: unimplemented op idle at %08X\n", m_pc-1);
1679		}
1680
1681		void tms32051_device::op_idle2()
1682		{
1683		fatalerror("32051: unimplemented op idle2 at %08X\n", m_pc-1);
1684		}
1685
1686		void tms32051_device::op_lst_st0()
1687		{
1688		fatalerror("32051: unimplemented op lst st0 at %08X\n", m_pc-1);
1689		}
1690
1691		void tms32051_device::op_lst_st1()
1692		{
1693		fatalerror("32051: unimplemented op lst st1 at %08X\n", m_pc-1);
1694		}
1695
1696		void tms32051_device::op_pop()
1697		{
1698		m_acc = POP_STACK();
1699
1700		CYCLES(1);
1701		}
1702
1703		void tms32051_device::op_popd()
1704		{
1705		fatalerror("32051: unimplemented op popd at %08X\n", m_pc-1);
1706		}
1707
1708		void tms32051_device::op_pshd()
1709		{
1710		fatalerror("32051: unimplemented op pshd at %08X\n", m_pc-1);
1711		}
1712
1713		void tms32051_device::op_push()
1714		{
1715		fatalerror("32051: unimplemented op push at %08X\n", m_pc-1);
1716		}
1717
1718		void tms32051_device::op_rpt_mem()
1719		{
1720		UINT16 ea = GET_ADDRESS();
1721		UINT16 data = DM_READ16(ea);
1722		m_rptc = data;
1723		m_rpt_start = m_pc;
1724		m_rpt_end = m_pc;
1725
1726		CYCLES(1);
1727		}
1728
1729		void tms32051_device::op_rpt_limm()
1730		{
1731		m_rptc = (UINT16)ROPCODE();
1732		m_rpt_start = m_pc;
1733		m_rpt_end = m_pc;
1734
1735		CYCLES(2);
1736		}
1737
1738		void tms32051_device::op_rpt_simm()
1739		{
1740		m_rptc = (m_op & 0xff);
1741		m_rpt_start = m_pc;
1742		m_rpt_end = m_pc;
1743
1744		CYCLES(1);
1745		}
1746
1747		void tms32051_device::op_rptb()
1748		{
1749		UINT16 pma = ROPCODE();
1750		m_pmst.braf = 1;
1751		m_pasr = m_pc;
1752		m_paer = pma + 1;
1753
1754		CYCLES(2);
1755		}
1756
1757		void tms32051_device::op_rptz()
1758		{
1759		fatalerror("32051: unimplemented op rptz at %08X\n", m_pc-1);
1760		}
1761
1762		void tms32051_device::op_setc_ov()
1763		{
1764		m_st0.ovm = 1;
1765
1766		CYCLES(1);
1767		}
1768
1769		void tms32051_device::op_setc_ext()
1770		{
1771		m_st1.sxm = 1;
1772
1773		CYCLES(1);
1774		}
1775
1776		void tms32051_device::op_setc_hold()
1777		{
1778		fatalerror("32051: unimplemented op setc hold at %08X\n", m_pc-1);
1779		}
1780
1781		void tms32051_device::op_setc_tc()
1782		{
1783		fatalerror("32051: unimplemented op setc tc at %08X\n", m_pc-1);
1784		}
1785
1786		void tms32051_device::op_setc_carry()
1787		{
1788		fatalerror("32051: unimplemented op setc carry at %08X\n", m_pc-1);
1789		}
1790
1791		void tms32051_device::op_setc_xf()
1792		{
1793		fatalerror("32051: unimplemented op setc xf at %08X\n", m_pc-1);
1794		}
1795
1796		void tms32051_device::op_setc_cnf()
1797		{
1798		m_st1.cnf = 1;
1799
1800		CYCLES(1);
1801		}
1802
1803		void tms32051_device::op_setc_intm()
1804		{
1805		m_st0.intm = 1;
1806
1807		check_interrupts();
1808
1809		CYCLES(1);
1810		}
1811
1812		void tms32051_device::op_sst_st0()
1813		{
1814		fatalerror("32051: unimplemented op sst st0 at %08X\n", m_pc-1);
1815		}
1816
1817		void tms32051_device::op_sst_st1()
1818		{
1819		fatalerror("32051: unimplemented op sst st1 at %08X\n", m_pc-1);
1820		}

trunk/src/devices/cpu/tms32051/32051ops.inc

r0	r250252
	1	// license:BSD-3-Clause
	2	// copyright-holders:Ville Linde
	3	// stack is LIFO and is 8 levels deep, there is no stackpointer on the real chip
	4	void tms32051_device::PUSH_STACK(UINT16 pc)
	5	{
	6	m_pcstack_ptr = (m_pcstack_ptr - 1) & 7;
	7	m_pcstack[m_pcstack_ptr] = pc;
	8	}
	9
	10	UINT16 tms32051_device::POP_STACK()
	11	{
	12	UINT16 pc = m_pcstack[m_pcstack_ptr];
	13	m_pcstack_ptr = (m_pcstack_ptr + 1) & 7;
	14	m_pcstack[(m_pcstack_ptr + 7) & 7] = m_pcstack[(m_pcstack_ptr + 6) & 7];
	15	return pc;
	16	}
	17
	18	INT32 tms32051_device::SUB(UINT32 a, UINT32 b)
	19	{
	20	UINT32 res = a - b;
	21
	22	// C is cleared if borrow was generated
	23	m_st1.c = (b > a) ? 0 : 1;
	24
	25	// check overflow
	26	if ((a ^ b) & (a ^ res) & 0x80000000)
	27	{
	28	if (m_st0.ovm)  // overflow saturation mode
	29	{
	30	res = ((INT32)(res) < 0) ? 0x7fffffff : 0x80000000;
	31	}
	32
	33	// set OV, this is a sticky flag
	34	m_st0.ov = 1;
	35	}
	36
	37	return (INT32)(res);
	38	}
	39
	40	INT32 tms32051_device::ADD(UINT32 a, UINT32 b)
	41	{
	42	UINT32 res = a + b;
	43
	44	// C is set if carry was generated
	45	m_st1.c = (a > res) ? 1 : 0;
	46
	47	// check overflow
	48	if ((a ^ res) & (b ^ res) & 0x80000000)
	49	{
	50	if (m_st0.ovm)  // overflow saturation mode
	51	{
	52	res = ((INT32)(res) < 0) ? 0x7fffffff : 0x80000000;
	53	}
	54
	55	// set OV, this is a sticky flag
	56	m_st0.ov = 1;
	57	}
	58
	59	return (INT32)(res);
	60	}
	61
	62
	63	void tms32051_device::UPDATE_AR(int ar, int step)
	64	{
	65	int cenb1 = (m_cbcr >> 3) & 0x1;
	66	int car1 = m_cbcr & 0x7;
	67	int cenb2 = (m_cbcr >> 7) & 0x1;
	68	int car2 = (m_cbcr >> 4) & 0x7;
	69
	70	if (cenb1 && ar == car1)
	71	{
	72	// update circular buffer 1, note that it only checks ==
	73	if (m_ar[ar] == m_cber1)
	74	{
	75	m_ar[ar] = m_cbsr1;
	76	}
	77	else
	78	{
	79	m_ar[ar] += step;
	80	}
	81	}
	82	else if (cenb2 && ar == car2)
	83	{
	84	// update circular buffer 2, note that it only checks ==
	85	if (m_ar[ar] == m_cber2)
	86	{
	87	m_ar[ar] = m_cbsr2;
	88	}
	89	else
	90	{
	91	m_ar[ar] += step;
	92	}
	93	}
	94	else
	95	{
	96	m_ar[ar] += step;
	97	}
	98	}
	99
	100	void tms32051_device::UPDATE_ARP(int nar)
	101	{
	102	m_st1.arb = m_st0.arp;
	103	m_st0.arp = nar;
	104	}
	105
	106	UINT16 tms32051_device::GET_ADDRESS()
	107	{
	108	if (m_op & 0x80)        // Indirect Addressing
	109	{
	110	UINT16 ea;
	111	int arp = m_st0.arp;
	112	int nar = m_op & 0x7;
	113
	114	ea = m_ar[arp];
	115
	116	switch ((m_op >> 3) & 0xf)
	117	{
	118	case 0x0:   // *            (no operation)
	119	{
	120	break;
	121	}
	122	case 0x1:   // *, ARn       (NAR -> ARP)
	123	{
	124	UPDATE_ARP(nar);
	125	break;
	126	}
	127	case 0x2:   // *-           ((CurrentAR)-1 -> CurrentAR)
	128	{
	129	UPDATE_AR(arp, -1);
	130	break;
	131	}
	132	case 0x3:   // *-, ARn      ((CurrentAR)-1 -> CurrentAR, NAR -> ARP)
	133	{
	134	UPDATE_AR(arp, -1);
	135	UPDATE_ARP(nar);
	136	break;
	137	}
	138	case 0x4:   // *+           ((CurrentAR)+1 -> CurrentAR)
	139	{
	140	UPDATE_AR(arp, 1);
	141	break;
	142	}
	143	case 0x5:   // *+, ARn      ((CurrentAR)+1 -> CurrentAR, NAR -> ARP)
	144	{
	145	UPDATE_AR(arp, 1);
	146	UPDATE_ARP(nar);
	147	break;
	148	}
	149	case 0xa:   // *0-          ((CurrentAR) - INDX)
	150	{
	151	UPDATE_AR(arp, -m_indx);
	152	break;
	153	}
	154	case 0xb:   // *0-, ARn     ((CurrentAR) - INDX -> CurrentAR, NAR -> ARP)
	155	{
	156	UPDATE_AR(arp, -m_indx);
	157	UPDATE_ARP(nar);
	158	break;
	159	}
	160	case 0xc:   // *0+          ((CurrentAR) + INDX -> CurrentAR)
	161	{
	162	UPDATE_AR(arp, m_indx);
	163	break;
	164	}
	165	case 0xd:   // *0+, ARn     ((CurrentAR) + INDX -> CurrentAR, NAR -> ARP)
	166	{
	167	UPDATE_AR(arp, m_indx);
	168	UPDATE_ARP(nar);
	169	break;
	170	}
	171
	172	default:    fatalerror("32051: GET_ADDRESS: unimplemented indirect addressing mode %d at %04X (%04X)\n", (m_op >> 3) & 0xf, m_pc, m_op);
	173	}
	174
	175	return ea;
	176	}
	177	else                    // Direct Addressing
	178	{
	179	return m_st0.dp | (m_op & 0x7f);
	180	}
	181	}
	182
	183	int tms32051_device::GET_ZLVC_CONDITION(int zlvc, int zlvc_mask)
	184	{
	185	if (zlvc_mask & 0x2)        // OV-bit
	186	{
	187	if ((zlvc & 0x2) && m_st0.ov)                           // OV
	188	{
	189	// clear OV
	190	m_st0.ov = 0;
	191
	192	return 1;
	193	}
	194	else if ((zlvc & 0x2) == 0 && m_st0.ov == 0)            // NOV
	195	return 1;
	196	}
	197	if (zlvc_mask & 0x1)        // C-bit
	198	{
	199	if ((zlvc & 0x1) && m_st1.c)                            // C
	200	return 1;
	201	else if ((zlvc & 0x1) == 0 && m_st1.c == 0)         // NC
	202	return 1;
	203	}
	204	if (zlvc_mask & 0x8)        // Z-bit
	205	{
	206	if ((zlvc & 0x8) && (INT32)(m_acc) == 0)                // EQ
	207	return 1;
	208	else if ((zlvc & 0x8) == 0 && (INT32)(m_acc) != 0)  // NEQ
	209	return 1;
	210	}
	211	if (zlvc_mask & 0x4)        // L-bit
	212	{
	213	if ((zlvc & 0x4) && (INT32)(m_acc) < 0)             // LT
	214	return 1;
	215	else if ((zlvc & 0x4) == 0 && (INT32)(m_acc) > 0)       // GT
	216	return 1;
	217	}
	218	return 0;
	219	}
	220
	221	int tms32051_device::GET_TP_CONDITION(int tp)
	222	{
	223	switch (tp)
	224	{
	225	case 0:     // BIO pin low
	226	{
	227	// TODO
	228	return 0;
	229	}
	230	case 1:     // TC = 1
	231	{
	232	return m_st1.tc;
	233	}
	234	case 2:     // TC = 0
	235	{
	236	return m_st1.tc ^ 1;
	237	}
	238	case 3:     // always false
	239	{
	240	return 0;
	241	}
	242	}
	243	return 0;
	244	}
	245
	246	INT32 tms32051_device::PREG_PSCALER(INT32 preg)
	247	{
	248	switch (m_st1.pm & 3)
	249	{
	250	case 0:     // No shift
	251	{
	252	return preg;
	253	}
	254	case 1:     // Left-shifted 1 bit, LSB zero-filled
	255	{
	256	return preg << 1;
	257	}
	258	case 2:     // Left-shifted 4 bits, 4 LSBs zero-filled
	259	{
	260	return preg << 4;
	261	}
	262	case 3:     // Right-shifted 6 bits, sign-extended, 6 LSBs lost
	263	{
	264	return (INT32)(preg >> 6);
	265	}
	266	}
	267	return 0;
	268	}
	269
	270
	271
	272	void tms32051_device::op_invalid()
	273	{
	274	fatalerror("32051: invalid op at %08X\n", m_pc-1);
	275	}
	276
	277	/*****************************************************************************/
	278
	279	void tms32051_device::op_abs()
	280	{
	281	fatalerror("32051: unimplemented op abs at %08X\n", m_pc-1);
	282	}
	283
	284	void tms32051_device::op_adcb()
	285	{
	286	fatalerror("32051: unimplemented op adcb at %08X\n", m_pc-1);
	287	}
	288
	289	void tms32051_device::op_add_mem()
	290	{
	291	INT32 d;
	292	UINT16 ea = GET_ADDRESS();
	293	UINT16 data = DM_READ16(ea);
	294	int shift = (m_op >> 8) & 0xf;
	295
	296	if (m_st1.sxm)
	297	{
	298	d = (INT32)(INT16)(data) << shift;
	299	}
	300	else
	301	{
	302	d = (UINT32)(UINT16)(data) << shift;
	303	}
	304
	305	m_acc = ADD(m_acc, d);
	306
	307	CYCLES(1);
	308	}
	309
	310	void tms32051_device::op_add_simm()
	311	{
	312	UINT16 imm = m_op & 0xff;
	313
	314	m_acc = ADD(m_acc, imm);
	315
	316	CYCLES(1);
	317	}
	318
	319	void tms32051_device::op_add_limm()
	320	{
	321	INT32 d;
	322	UINT16 imm = ROPCODE();
	323	int shift = m_op & 0xf;
	324
	325	if (m_st1.sxm)
	326	{
	327	d = (INT32)(INT16)(imm) << shift;
	328	}
	329	else
	330	{
	331	d = (UINT32)(UINT16)(imm) << shift;
	332	}
	333
	334	m_acc = ADD(m_acc, d);
	335
	336	CYCLES(2);
	337	}
	338
	339	void tms32051_device::op_add_s16_mem()
	340	{
	341	UINT16 ea = GET_ADDRESS();
	342	UINT32 data = DM_READ16(ea) << 16;
	343
	344	m_acc = ADD(m_acc, data);
	345
	346	CYCLES(1);
	347	}
	348
	349	void tms32051_device::op_addb()
	350	{
	351	m_acc = ADD(m_acc, m_accb);
	352
	353	CYCLES(1);
	354	}
	355
	356	void tms32051_device::op_addc()
	357	{
	358	fatalerror("32051: unimplemented op addc at %08X\n", m_pc-1);
	359	}
	360
	361	void tms32051_device::op_adds()
	362	{
	363	fatalerror("32051: unimplemented op adds at %08X\n", m_pc-1);
	364	}
	365
	366	void tms32051_device::op_addt()
	367	{
	368	fatalerror("32051: unimplemented op addt at %08X\n", m_pc-1);
	369	}
	370
	371	void tms32051_device::op_and_mem()
	372	{
	373	fatalerror("32051: unimplemented op and mem at %08X\n", m_pc-1);
	374	}
	375
	376	void tms32051_device::op_and_limm()
	377	{
	378	UINT32 imm = ROPCODE();
	379	int shift = m_op & 0xf;
	380
	381	m_acc &= imm << shift;
	382
	383	CYCLES(2);
	384	}
	385
	386	void tms32051_device::op_and_s16_limm()
	387	{
	388	fatalerror("32051: unimplemented op and s16 limm at %08X\n", m_pc-1);
	389	}
	390
	391	void tms32051_device::op_andb()
	392	{
	393	fatalerror("32051: unimplemented op andb at %08X\n", m_pc-1);
	394	}
	395
	396	void tms32051_device::op_bsar()
	397	{
	398	int shift = (m_op & 0xf) + 1;
	399
	400	if (m_st1.sxm)
	401	{
	402	m_acc = (INT32)(m_acc) >> shift;
	403	}
	404	else
	405	{
	406	m_acc = (UINT32)(m_acc) >> shift;
	407	}
	408
	409	CYCLES(1);
	410	}
	411
	412	void tms32051_device::op_cmpl()
	413	{
	414	m_acc = ~(UINT32)(m_acc);
	415
	416	CYCLES(1);
	417	}
	418
	419	void tms32051_device::op_crgt()
	420	{
	421	if (m_acc >= m_accb)
	422	{
	423	m_accb = m_acc;
	424	m_st1.c = 1;
	425	}
	426	else
	427	{
	428	m_acc = m_accb;
	429	m_st1.c = 0;
	430	}
	431
	432	CYCLES(1);
	433	}
	434
	435	void tms32051_device::op_crlt()
	436	{
	437	if (m_acc >= m_accb)
	438	{
	439	m_acc = m_accb;
	440	m_st1.c = 0;
	441	}
	442	else
	443	{
	444	m_accb = m_acc;
	445	m_st1.c = 1;
	446	}
	447
	448	CYCLES(1);
	449	}
	450
	451	void tms32051_device::op_exar()
	452	{
	453	INT32 tmp = m_acc;
	454	m_acc = m_accb;
	455	m_accb = tmp;
	456
	457	CYCLES(1);
	458	}
	459
	460	void tms32051_device::op_lacb()
	461	{
	462	m_acc = m_accb;
	463
	464	CYCLES(1);
	465	}
	466
	467	void tms32051_device::op_lacc_mem()
	468	{
	469	int shift = (m_op >> 8) & 0xf;
	470	UINT16 ea = GET_ADDRESS();
	471	UINT16 data = DM_READ16(ea);
	472
	473	if (m_st1.sxm)
	474	{
	475	m_acc = (INT32)(INT16)(data) << shift;
	476	}
	477	else
	478	{
	479	m_acc = (UINT32)(UINT16)(data) << shift;
	480	}
	481
	482	CYCLES(1);
	483	}
	484
	485	void tms32051_device::op_lacc_limm()
	486	{
	487	UINT16 imm = ROPCODE();
	488	int shift = m_op & 0xf;
	489
	490	if (m_st1.sxm)
	491	{
	492	m_acc = (INT32)(INT16)(imm) << shift;
	493	}
	494	else
	495	{
	496	m_acc = (UINT32)(UINT16)(imm) << shift;
	497	}
	498
	499	CYCLES(1);
	500	}
	501
	502	void tms32051_device::op_lacc_s16_mem()
	503	{
	504	UINT16 ea = GET_ADDRESS();
	505	m_acc = DM_READ16(ea) << 16;
	506
	507	CYCLES(1);
	508	}
	509
	510	void tms32051_device::op_lacl_simm()
	511	{
	512	m_acc = m_op & 0xff;
	513
	514	CYCLES(1);
	515	}
	516
	517	void tms32051_device::op_lacl_mem()
	518	{
	519	UINT16 ea = GET_ADDRESS();
	520	m_acc = DM_READ16(ea) & 0xffff;
	521
	522	CYCLES(1);
	523	}
	524
	525	void tms32051_device::op_lact()
	526	{
	527	fatalerror("32051: unimplemented op lact at %08X\n", m_pc-1);
	528	}
	529
	530	void tms32051_device::op_lamm()
	531	{
	532	UINT16 ea = GET_ADDRESS() & 0x7f;
	533	m_acc = DM_READ16(ea) & 0xffff;
	534
	535	CYCLES(1);
	536	}
	537
	538	void tms32051_device::op_neg()
	539	{
	540	if ((UINT32)(m_acc) == 0x80000000)
	541	{
	542	m_st0.ov = 1;
	543	m_st1.c = 0;
	544	m_acc = (m_st0.ovm) ? 0x7fffffff : 0x80000000;
	545	}
	546	else
	547	{
	548	m_acc = 0 - (UINT32)(m_acc);
	549	m_st1.c = (m_acc == 0) ? 1 : 0;
	550	}
	551
	552	CYCLES(1);
	553	}
	554
	555	void tms32051_device::op_norm()
	556	{
	557	fatalerror("32051: unimplemented op norm at %08X\n", m_pc-1);
	558	}
	559
	560	void tms32051_device::op_or_mem()
	561	{
	562	UINT16 ea = GET_ADDRESS();
	563	UINT16 data = DM_READ16(ea);
	564
	565	m_acc |= (UINT32)(data);
	566
	567	CYCLES(1);
	568	}
	569
	570	void tms32051_device::op_or_limm()
	571	{
	572	UINT32 imm = ROPCODE();
	573	int shift = m_op & 0xf;
	574
	575	m_acc |= imm << shift;
	576
	577	CYCLES(1);
	578	}
	579
	580	void tms32051_device::op_or_s16_limm()
	581	{
	582	fatalerror("32051: unimplemented op or s16 limm at %08X\n", m_pc-1);
	583	}
	584
	585	void tms32051_device::op_orb()
	586	{
	587	m_acc |= m_accb;
	588
	589	CYCLES(1);
	590	}
	591
	592	void tms32051_device::op_rol()
	593	{
	594	fatalerror("32051: unimplemented op rol at %08X\n", m_pc-1);
	595	}
	596
	597	void tms32051_device::op_rolb()
	598	{
	599	UINT32 acc = m_acc;
	600	UINT32 accb = m_accb;
	601	UINT32 c = m_st1.c & 1;
	602
	603	m_acc = (acc << 1) | ((accb >> 31) & 1);
	604	m_accb = (accb << 1) | c;
	605	m_st1.c = (acc >> 31) & 1;
	606
	607	CYCLES(1);
	608	}
	609
	610	void tms32051_device::op_ror()
	611	{
	612	fatalerror("32051: unimplemented op ror at %08X\n", m_pc-1);
	613	}
	614
	615	void tms32051_device::op_rorb()
	616	{
	617	fatalerror("32051: unimplemented op rorb at %08X\n", m_pc-1);
	618	}
	619
	620	void tms32051_device::op_sacb()
	621	{
	622	m_accb = m_acc;
	623
	624	CYCLES(1);
	625	}
	626
	627	void tms32051_device::op_sach()
	628	{
	629	UINT16 ea = GET_ADDRESS();
	630	int shift = (m_op >> 8) & 0x7;
	631
	632	DM_WRITE16(ea, (UINT16)((m_acc << shift) >> 16));
	633	CYCLES(1);
	634	}
	635
	636	void tms32051_device::op_sacl()
	637	{
	638	UINT16 ea = GET_ADDRESS();
	639	int shift = (m_op >> 8) & 0x7;
	640
	641	DM_WRITE16(ea, (UINT16)(m_acc << shift));
	642	CYCLES(1);
	643	}
	644
	645	void tms32051_device::op_samm()
	646	{
	647	UINT16 ea = GET_ADDRESS();
	648	ea &= 0x7f;
	649
	650	DM_WRITE16(ea, (UINT16)(m_acc));
	651	CYCLES(1);
	652	}
	653
	654	void tms32051_device::op_sath()
	655	{
	656	fatalerror("32051: unimplemented op sath at %08X\n", m_pc-1);
	657	}
	658
	659	void tms32051_device::op_satl()
	660	{
	661	fatalerror("32051: unimplemented op satl at %08X\n", m_pc-1);
	662	}
	663
	664	void tms32051_device::op_sbb()
	665	{
	666	m_acc = SUB(m_acc, m_accb);
	667
	668	CYCLES(1);
	669	}
	670
	671	void tms32051_device::op_sbbb()
	672	{
	673	fatalerror("32051: unimplemented op sbbb at %08X\n", m_pc-1);
	674	}
	675
	676	void tms32051_device::op_sfl()
	677	{
	678	m_st1.c = (m_acc >> 31) & 1;
	679	m_acc = m_acc << 1;
	680
	681	CYCLES(1);
	682	}
	683
	684	void tms32051_device::op_sflb()
	685	{
	686	UINT32 acc = m_acc;
	687	UINT32 accb = m_accb;
	688
	689	m_acc = (acc << 1) | ((accb >> 31) & 1);
	690	m_accb = (accb << 1);
	691	m_st1.c = (acc >> 31) & 1;
	692
	693	CYCLES(1);
	694	}
	695
	696	void tms32051_device::op_sfr()
	697	{
	698	m_st1.c = m_acc & 1;
	699
	700	if (m_st1.sxm)
	701	{
	702	m_acc = (INT32)(m_acc) >> 1;
	703	}
	704	else
	705	{
	706	m_acc = (UINT32)(m_acc) >> 1;
	707	}
	708
	709	CYCLES(1);
	710	}
	711
	712	void tms32051_device::op_sfrb()
	713	{
	714	fatalerror("32051: unimplemented op sfrb at %08X\n", m_pc-1);
	715	}
	716
	717	void tms32051_device::op_sub_mem()
	718	{
	719	INT32 d;
	720	UINT16 ea = GET_ADDRESS();
	721	UINT16 data = DM_READ16(ea);
	722	int shift = (m_op >> 8) & 0xf;
	723
	724	if (m_st1.sxm)
	725	{
	726	d = (INT32)(INT16)(data) << shift;
	727	}
	728	else
	729	{
	730	d = (UINT32)(UINT16)(data) << shift;
	731	}
	732
	733	m_acc = SUB(m_acc, d);
	734
	735	CYCLES(1);
	736	}
	737
	738	void tms32051_device::op_sub_s16_mem()
	739	{
	740	fatalerror("32051: unimplemented op sub s16 mem at %08X\n", m_pc-1);
	741	}
	742
	743	void tms32051_device::op_sub_simm()
	744	{
	745	UINT16 imm = m_op & 0xff;
	746
	747	m_acc = SUB(m_acc, imm);
	748
	749	CYCLES(1);
	750	}
	751
	752	void tms32051_device::op_sub_limm()
	753	{
	754	INT32 d;
	755	UINT16 imm = ROPCODE();
	756	int shift = m_op & 0xf;
	757
	758	if (m_st1.sxm)
	759	{
	760	d = (INT32)(INT16)(imm) << shift;
	761	}
	762	else
	763	{
	764	d = (UINT32)(UINT16)(imm) << shift;
	765	}
	766
	767	m_acc = SUB(m_acc, d);
	768
	769	CYCLES(2);
	770	}
	771
	772	void tms32051_device::op_subb()
	773	{
	774	fatalerror("32051: unimplemented op subb at %08X\n", m_pc-1);
	775	}
	776
	777	void tms32051_device::op_subc()
	778	{
	779	fatalerror("32051: unimplemented op subc at %08X\n", m_pc-1);
	780	}
	781
	782	void tms32051_device::op_subs()
	783	{
	784	fatalerror("32051: unimplemented op subs at %08X\n", m_pc-1);
	785	}
	786
	787	void tms32051_device::op_subt()
	788	{
	789	fatalerror("32051: unimplemented op subt at %08X\n", m_pc-1);
	790	}
	791
	792	void tms32051_device::op_xor_mem()
	793	{
	794	UINT16 ea = GET_ADDRESS();
	795	UINT16 data = DM_READ16(ea);
	796
	797	m_acc ^= (UINT32)(data);
	798
	799	CYCLES(1);
	800	}
	801
	802	void tms32051_device::op_xor_limm()
	803	{
	804	UINT32 imm = ROPCODE();
	805	int shift = m_op & 0xf;
	806
	807	m_acc ^= imm << shift;
	808
	809	CYCLES(1);
	810	}
	811
	812	void tms32051_device::op_xor_s16_limm()
	813	{
	814	fatalerror("32051: unimplemented op xor s16 limm at %08X\n", m_pc-1);
	815	}
	816
	817	void tms32051_device::op_xorb()
	818	{
	819	fatalerror("32051: unimplemented op xorb at %08X\n", m_pc-1);
	820	}
	821
	822	void tms32051_device::op_zalr()
	823	{
	824	fatalerror("32051: unimplemented op zalr at %08X\n", m_pc-1);
	825	}
	826
	827	void tms32051_device::op_zap()
	828	{
	829	m_acc = 0;
	830	m_preg = 0;
	831
	832	CYCLES(1);
	833	}
	834
	835	/*****************************************************************************/
	836
	837	void tms32051_device::op_adrk()
	838	{
	839	UINT16 imm = m_op & 0xff;
	840	UPDATE_AR(m_st0.arp, imm);
	841
	842	CYCLES(1);
	843	}
	844
	845	void tms32051_device::op_cmpr()
	846	{
	847	m_st1.tc = 0;
	848
	849	switch (m_op & 0x3)
	850	{
	851	case 0:         // (CurrentAR) == ARCR
	852	{
	853	if (m_ar[m_st0.arp] == m_arcr)
	854	{
	855	m_st1.tc = 1;
	856	}
	857	break;
	858	}
	859	case 1:         // (CurrentAR) < ARCR
	860	{
	861	if (m_ar[m_st0.arp] < m_arcr)
	862	{
	863	m_st1.tc = 1;
	864	}
	865	break;
	866	}
	867	case 2:         // (CurrentAR) > ARCR
	868	{
	869	if (m_ar[m_st0.arp] > m_arcr)
	870	{
	871	m_st1.tc = 1;
	872	}
	873	break;
	874	}
	875	case 3:         // (CurrentAR) != ARCR
	876	{
	877	if (m_ar[m_st0.arp] != m_arcr)
	878	{
	879	m_st1.tc = 1;
	880	}
	881	break;
	882	}
	883	}
	884
	885	CYCLES(1);
	886	}
	887
	888	void tms32051_device::op_lar_mem()
	889	{
	890	int arx = (m_op >> 8) & 0x7;
	891	UINT16 ea = GET_ADDRESS();
	892	UINT16 data = DM_READ16(ea);
	893
	894	m_ar[arx] = data;
	895
	896	CYCLES(2);
	897	}
	898
	899	void tms32051_device::op_lar_simm()
	900	{
	901	int arx = (m_op >> 8) & 0x7;
	902	m_ar[arx] = m_op & 0xff;
	903
	904	CYCLES(2);
	905	}
	906
	907	void tms32051_device::op_lar_limm()
	908	{
	909	int arx = m_op & 0x7;
	910	UINT16 imm = ROPCODE();
	911	m_ar[arx] = imm;
	912
	913	CYCLES(2);
	914	}
	915
	916	void tms32051_device::op_ldp_mem()
	917	{
	918	fatalerror("32051: unimplemented op ldp mem at %08X\n", m_pc-1);
	919	}
	920
	921	void tms32051_device::op_ldp_imm()
	922	{
	923	m_st0.dp = (m_op & 0x1ff) << 7;
	924	CYCLES(2);
	925	}
	926
	927	void tms32051_device::op_mar()
	928	{
	929	// direct addressing is NOP
	930	if (m_op & 0x80)
	931	{
	932	GET_ADDRESS();
	933	}
	934	CYCLES(1);
	935	}
	936
	937	void tms32051_device::op_sar()
	938	{
	939	int arx = (m_op >> 8) & 0x7;
	940	UINT16 ar = m_ar[arx];
	941	UINT16 ea = GET_ADDRESS();
	942	DM_WRITE16(ea, ar);
	943
	944	CYCLES(1);
	945	}
	946
	947	void tms32051_device::op_sbrk()
	948	{
	949	UINT16 imm = m_op & 0xff;
	950	UPDATE_AR(m_st0.arp, -imm);
	951
	952	CYCLES(1);
	953	}
	954
	955	/*****************************************************************************/
	956
	957	void tms32051_device::op_b()
	958	{
	959	UINT16 pma = ROPCODE();
	960	GET_ADDRESS();      // update AR/ARP
	961
	962	CHANGE_PC(pma);
	963	CYCLES(4);
	964	}
	965
	966	void tms32051_device::op_bacc()
	967	{
	968	CHANGE_PC((UINT16)(m_acc));
	969
	970	CYCLES(4);
	971	}
	972
	973	void tms32051_device::op_baccd()
	974	{
	975	UINT16 pc = (UINT16)(m_acc);
	976
	977	delay_slot(m_pc);
	978	CHANGE_PC(pc);
	979
	980	CYCLES(2);
	981	}
	982
	983	void tms32051_device::op_banz()
	984	{
	985	UINT16 pma = ROPCODE();
	986
	987	if (m_ar[m_st0.arp] != 0)
	988	{
	989	CHANGE_PC(pma);
	990	CYCLES(4);
	991	}
	992	else
	993	{
	994	CYCLES(2);
	995	}
	996
	997	GET_ADDRESS();      // modify AR/ARP
	998	}
	999
	1000	void tms32051_device::op_banzd()
	1001	{
	1002	fatalerror("32051: unimplemented op banzd at %08X\n", m_pc-1);
	1003	}
	1004
	1005	void tms32051_device::op_bcnd()
	1006	{
	1007	UINT16 pma = ROPCODE();
	1008
	1009	if (GET_ZLVC_CONDITION((m_op >> 4) & 0xf, m_op & 0xf) || GET_TP_CONDITION((m_op >> 8) & 0x3))
	1010	{
	1011	CHANGE_PC(pma);
	1012	CYCLES(4);
	1013	}
	1014	else
	1015	{
	1016	CYCLES(2);
	1017	}
	1018	}
	1019
	1020	void tms32051_device::op_bcndd()
	1021	{
	1022	UINT16 pma = ROPCODE();
	1023
	1024	if (GET_ZLVC_CONDITION((m_op >> 4) & 0xf, m_op & 0xf) || GET_TP_CONDITION((m_op >> 8) & 0x3))
	1025	{
	1026	delay_slot(m_pc);
	1027	CHANGE_PC(pma);
	1028	CYCLES(4);
	1029	}
	1030	else
	1031	{
	1032	CYCLES(2);
	1033	}
	1034	}
	1035
	1036	void tms32051_device::op_bd()
	1037	{
	1038	UINT16 pma = ROPCODE();
	1039	GET_ADDRESS();      // update AR/ARP
	1040
	1041	delay_slot(m_pc);
	1042	CHANGE_PC(pma);
	1043	CYCLES(2);
	1044	}
	1045
	1046	void tms32051_device::op_cala()
	1047	{
	1048	PUSH_STACK(m_pc);
	1049
	1050	CHANGE_PC(m_acc);
	1051
	1052	CYCLES(4);
	1053	}
	1054
	1055	void tms32051_device::op_calad()
	1056	{
	1057	UINT16 pma = m_acc;
	1058	PUSH_STACK(m_pc+2);
	1059
	1060	delay_slot(m_pc);
	1061	CHANGE_PC(pma);
	1062
	1063	CYCLES(4);
	1064	}
	1065
	1066	void tms32051_device::op_call()
	1067	{
	1068	UINT16 pma = ROPCODE();
	1069	GET_ADDRESS();      // update AR/ARP
	1070	PUSH_STACK(m_pc);
	1071
	1072	CHANGE_PC(pma);
	1073
	1074	CYCLES(4);
	1075	}
	1076
	1077	void tms32051_device::op_calld()
	1078	{
	1079	UINT16 pma = ROPCODE();
	1080	GET_ADDRESS();      // update AR/ARP
	1081	PUSH_STACK(m_pc+2);
	1082
	1083	delay_slot(m_pc);
	1084	CHANGE_PC(pma);
	1085
	1086	CYCLES(4);
	1087	}
	1088
	1089	void tms32051_device::op_cc()
	1090	{
	1091	fatalerror("32051: unimplemented op cc at %08X\n", m_pc-1);
	1092	}
	1093
	1094	void tms32051_device::op_ccd()
	1095	{
	1096	UINT16 pma = ROPCODE();
	1097
	1098	if (GET_ZLVC_CONDITION((m_op >> 4) & 0xf, m_op & 0xf) || GET_TP_CONDITION((m_op >> 8) & 0x3))
	1099	{
	1100	PUSH_STACK(m_pc+2);
	1101
	1102	delay_slot(m_pc);
	1103	CHANGE_PC(pma);
	1104	}
	1105
	1106	CYCLES(2);
	1107	}
	1108
	1109	void tms32051_device::op_intr()
	1110	{
	1111	fatalerror("32051: unimplemented op intr at %08X\n", m_pc-1);
	1112	}
	1113
	1114	void tms32051_device::op_nmi()
	1115	{
	1116	fatalerror("32051: unimplemented op nmi at %08X\n", m_pc-1);
	1117	}
	1118
	1119	void tms32051_device::op_retc()
	1120	{
	1121	if ((m_op & 0x3ff) == 0x300 || GET_ZLVC_CONDITION((m_op >> 4) & 0xf, m_op & 0xf) || GET_TP_CONDITION((m_op >> 8) & 0x3))
	1122	{
	1123	UINT16 pc = POP_STACK();
	1124	CHANGE_PC(pc);
	1125	CYCLES(4);
	1126	}
	1127	else
	1128	{
	1129	CYCLES(2);
	1130	}
	1131	}
	1132
	1133	void tms32051_device::op_retcd()
	1134	{
	1135	if ((m_op & 0x3ff) == 0x300 || GET_ZLVC_CONDITION((m_op >> 4) & 0xf, m_op & 0xf) || GET_TP_CONDITION((m_op >> 8) & 0x3))
	1136	{
	1137	UINT16 pc = POP_STACK();
	1138	delay_slot(m_pc);
	1139	CHANGE_PC(pc);
	1140	CYCLES(4);
	1141	}
	1142	else
	1143	{
	1144	CYCLES(2);
	1145	}
	1146	}
	1147
	1148	void tms32051_device::op_rete()
	1149	{
	1150	UINT16 pc = POP_STACK();
	1151	CHANGE_PC(pc);
	1152
	1153	m_st0.intm = 0;
	1154
	1155	restore_interrupt_context();
	1156
	1157	CYCLES(4);
	1158	}
	1159
	1160	void tms32051_device::op_reti()
	1161	{
	1162	fatalerror("32051: unimplemented op reti at %08X\n", m_pc-1);
	1163	}
	1164
	1165	void tms32051_device::op_trap()
	1166	{
	1167	fatalerror("32051: unimplemented op trap at %08X\n", m_pc-1);
	1168	}
	1169
	1170	void tms32051_device::op_xc()
	1171	{
	1172	if (GET_ZLVC_CONDITION((m_op >> 4) & 0xf, m_op & 0xf) || GET_TP_CONDITION((m_op >> 8) & 0x3))
	1173	{
	1174	CYCLES(1);
	1175	}
	1176	else
	1177	{
	1178	int n = ((m_op >> 12) & 0x1) + 1;
	1179	CHANGE_PC(m_pc + n);
	1180	CYCLES(1 + n);
	1181	}
	1182	}
	1183
	1184	/*****************************************************************************/
	1185
	1186	void tms32051_device::op_bldd_slimm()
	1187	{
	1188	UINT16 pfc = ROPCODE();
	1189
	1190	while (m_rptc > -1)
	1191	{
	1192	UINT16 ea = GET_ADDRESS();
	1193	UINT16 data = DM_READ16(pfc);
	1194	DM_WRITE16(ea, data);
	1195	pfc++;
	1196	CYCLES(2);
	1197
	1198	m_rptc--;
	1199	};
	1200	}
	1201
	1202	void tms32051_device::op_bldd_dlimm()
	1203	{
	1204	UINT16 pfc = ROPCODE();
	1205
	1206	while (m_rptc > -1)
	1207	{
	1208	UINT16 ea = GET_ADDRESS();
	1209	UINT16 data = DM_READ16(ea);
	1210	DM_WRITE16(pfc, data);
	1211	pfc++;
	1212	CYCLES(2);
	1213
	1214	m_rptc--;
	1215	};
	1216	}
	1217
	1218	void tms32051_device::op_bldd_sbmar()
	1219	{
	1220	UINT16 pfc = m_bmar;
	1221
	1222	while (m_rptc > -1)
	1223	{
	1224	UINT16 ea = GET_ADDRESS();
	1225	UINT16 data = DM_READ16(pfc);
	1226	DM_WRITE16(ea, data);
	1227	pfc++;
	1228	CYCLES(2);
	1229
	1230	m_rptc--;
	1231	};
	1232	}
	1233
	1234	void tms32051_device::op_bldd_dbmar()
	1235	{
	1236	UINT16 pfc = m_bmar;
	1237
	1238	while (m_rptc > -1)
	1239	{
	1240	UINT16 ea = GET_ADDRESS();
	1241	UINT16 data = DM_READ16(ea);
	1242	DM_WRITE16(pfc, data);
	1243	pfc++;
	1244	CYCLES(2);
	1245
	1246	m_rptc--;
	1247	};
	1248	}
	1249
	1250	void tms32051_device::op_bldp()
	1251	{
	1252	UINT16 pfc = m_bmar;
	1253
	1254	while (m_rptc > -1)
	1255	{
	1256	UINT16 ea = GET_ADDRESS();
	1257	UINT16 data = DM_READ16(ea);
	1258	PM_WRITE16(pfc, data);
	1259	pfc++;
	1260	CYCLES(1);
	1261
	1262	m_rptc--;
	1263	};
	1264	}
	1265
	1266	void tms32051_device::op_blpd_bmar()
	1267	{
	1268	fatalerror("32051: unimplemented op bpld bmar at %08X\n", m_pc-1);
	1269	}
	1270
	1271	void tms32051_device::op_blpd_imm()
	1272	{
	1273	UINT16 pfc = ROPCODE();
	1274
	1275	while (m_rptc > -1)
	1276	{
	1277	UINT16 ea = GET_ADDRESS();
	1278	UINT16 data = PM_READ16(pfc);
	1279	DM_WRITE16(ea, data);
	1280	pfc++;
	1281	CYCLES(2);
	1282
	1283	m_rptc--;
	1284	};
	1285	}
	1286
	1287	/*****************************************************************************/
	1288
	1289	void tms32051_device::op_dmov()
	1290	{
	1291	fatalerror("32051: unimplemented op dmov at %08X\n", m_pc-1);
	1292	}
	1293
	1294	void tms32051_device::op_in()
	1295	{
	1296	fatalerror("32051: unimplemented op in at %08X\n", m_pc-1);
	1297	}
	1298
	1299	void tms32051_device::op_lmmr()
	1300	{
	1301	UINT16 pfc = ROPCODE();
	1302
	1303	while (m_rptc > -1)
	1304	{
	1305	UINT16 ea = GET_ADDRESS();
	1306	UINT16 data = DM_READ16(pfc);
	1307	DM_WRITE16(ea & 0x7f, data);
	1308	pfc++;
	1309	CYCLES(2);
	1310
	1311	m_rptc--;
	1312	};
	1313	}
	1314
	1315	void tms32051_device::op_out()
	1316	{
	1317	fatalerror("32051: unimplemented op out at %08X\n", m_pc-1);
	1318	}
	1319
	1320	void tms32051_device::op_smmr()
	1321	{
	1322	UINT16 pfc = ROPCODE();
	1323
	1324	while (m_rptc > -1)
	1325	{
	1326	UINT16 ea = GET_ADDRESS();
	1327	UINT16 data = DM_READ16(ea & 0x7f);
	1328	DM_WRITE16(pfc, data);
	1329	pfc++;
	1330	CYCLES(2);
	1331
	1332	m_rptc--;
	1333	};
	1334	}
	1335
	1336	void tms32051_device::op_tblr()
	1337	{
	1338	UINT16 pfc = (UINT16)(m_acc);
	1339
	1340	while (m_rptc > -1)
	1341	{
	1342	UINT16 ea = GET_ADDRESS();
	1343	UINT16 data = PM_READ16(pfc);
	1344	DM_WRITE16(ea, data);
	1345	pfc++;
	1346	CYCLES(2);
	1347
	1348	m_rptc--;
	1349	};
	1350	}
	1351
	1352	void tms32051_device::op_tblw()
	1353	{
	1354	UINT16 pfc = (UINT16)(m_acc);
	1355
	1356	while (m_rptc > -1)
	1357	{
	1358	UINT16 ea = GET_ADDRESS();
	1359	UINT16 data = DM_READ16(ea);
	1360	PM_WRITE16(pfc, data);
	1361	pfc++;
	1362	CYCLES(2);
	1363
	1364	m_rptc--;
	1365	};
	1366	}
	1367
	1368	/*****************************************************************************/
	1369
	1370	void tms32051_device::op_apl_dbmr()
	1371	{
	1372	UINT16 ea = GET_ADDRESS();
	1373	UINT16 data = DM_READ16(ea);
	1374	data &= m_dbmr;
	1375	DM_WRITE16(ea, data);
	1376	CYCLES(1);
	1377	}
	1378
	1379	void tms32051_device::op_apl_imm()
	1380	{
	1381	UINT16 ea = GET_ADDRESS();
	1382	UINT16 imm = ROPCODE();
	1383	UINT16 data = DM_READ16(ea);
	1384	data &= imm;
	1385	DM_WRITE16(ea, data);
	1386	CYCLES(1);
	1387	}
	1388
	1389	void tms32051_device::op_cpl_dbmr()
	1390	{
	1391	fatalerror("32051: unimplemented op cpl dbmr at %08X\n", m_pc-1);
	1392	}
	1393
	1394	void tms32051_device::op_cpl_imm()
	1395	{
	1396	UINT16 imm = ROPCODE();
	1397	UINT16 ea = GET_ADDRESS();
	1398	UINT16 data = DM_READ16(ea);
	1399
	1400	m_st1.tc = (data == imm) ? 1 : 0;
	1401
	1402	CYCLES(1);
	1403	}
	1404
	1405	void tms32051_device::op_opl_dbmr()
	1406	{
	1407	UINT16 ea = GET_ADDRESS();
	1408	UINT16 data = DM_READ16(ea);
	1409	data |= m_dbmr;
	1410	DM_WRITE16(ea, data);
	1411	CYCLES(1);
	1412	}
	1413
	1414	void tms32051_device::op_opl_imm()
	1415	{
	1416	UINT16 ea = GET_ADDRESS();
	1417	UINT16 imm = ROPCODE();
	1418	UINT16 data = DM_READ16(ea);
	1419	data |= imm;
	1420	DM_WRITE16(ea, data);
	1421	CYCLES(1);
	1422	}
	1423
	1424	void tms32051_device::op_splk()
	1425	{
	1426	UINT16 ea = GET_ADDRESS();
	1427	UINT16 imm = ROPCODE();
	1428
	1429	DM_WRITE16(ea, imm);
	1430
	1431	CYCLES(2);
	1432	}
	1433
	1434	void tms32051_device::op_xpl_dbmr()
	1435	{
	1436	fatalerror("32051: unimplemented op xpl dbmr at %08X\n", m_pc-1);
	1437	}
	1438
	1439	void tms32051_device::op_xpl_imm()
	1440	{
	1441	fatalerror("32051: unimplemented op xpl imm at %08X\n", m_pc-1);
	1442	}
	1443
	1444	void tms32051_device::op_apac()
	1445	{
	1446	INT32 spreg = PREG_PSCALER(m_preg);
	1447	m_acc = ADD(m_acc, spreg);
	1448
	1449	CYCLES(1);
	1450	}
	1451
	1452	void tms32051_device::op_lph()
	1453	{
	1454	fatalerror("32051: unimplemented op lph at %08X\n", m_pc-1);
	1455	}
	1456
	1457	void tms32051_device::op_lt()
	1458	{
	1459	UINT16 ea = GET_ADDRESS();
	1460	UINT16 data = DM_READ16(ea);
	1461
	1462	m_treg0 = data;
	1463	if (m_pmst.trm == 0)
	1464	{
	1465	m_treg1 = data;
	1466	m_treg2 = data;
	1467	}
	1468
	1469	CYCLES(1);
	1470	}
	1471
	1472	void tms32051_device::op_lta()
	1473	{
	1474	INT32 spreg;
	1475	UINT16 ea = GET_ADDRESS();
	1476	UINT16 data = DM_READ16(ea);
	1477
	1478	m_treg0 = data;
	1479	spreg = PREG_PSCALER(m_preg);
	1480	m_acc = ADD(m_acc, spreg);
	1481	if (m_pmst.trm == 0)
	1482	{
	1483	m_treg1 = data;
	1484	m_treg2 = data;
	1485	}
	1486
	1487	CYCLES(1);
	1488	}
	1489
	1490	void tms32051_device::op_ltd()
	1491	{
	1492	fatalerror("32051: unimplemented op ltd at %08X\n", m_pc-1);
	1493	}
	1494
	1495	void tms32051_device::op_ltp()
	1496	{
	1497	fatalerror("32051: unimplemented op ltp at %08X\n", m_pc-1);
	1498	}
	1499
	1500	void tms32051_device::op_lts()
	1501	{
	1502	fatalerror("32051: unimplemented op lts at %08X\n", m_pc-1);
	1503	}
	1504
	1505	void tms32051_device::op_mac()
	1506	{
	1507	fatalerror("32051: unimplemented op mac at %08X\n", m_pc-1);
	1508	}
	1509
	1510	void tms32051_device::op_macd()
	1511	{
	1512	fatalerror("32051: unimplemented op macd at %08X\n", m_pc-1);
	1513	}
	1514
	1515	void tms32051_device::op_madd()
	1516	{
	1517	fatalerror("32051: unimplemented op madd at %08X\n", m_pc-1);
	1518	}
	1519
	1520	void tms32051_device::op_mads()
	1521	{
	1522	fatalerror("32051: unimplemented op mads at %08X\n", m_pc-1);
	1523	}
	1524
	1525	void tms32051_device::op_mpy_mem()
	1526	{
	1527	UINT16 ea = GET_ADDRESS();
	1528	INT16 data = DM_READ16(ea);
	1529
	1530	m_preg = (INT32)(data) * (INT32)(INT16)(m_treg0);
	1531
	1532	CYCLES(1);
	1533	}
	1534
	1535	void tms32051_device::op_mpy_simm()
	1536	{
	1537	fatalerror("32051: unimplemented op mpy simm at %08X\n", m_pc-1);
	1538	}
	1539
	1540	void tms32051_device::op_mpy_limm()
	1541	{
	1542	fatalerror("32051: unimplemented op mpy limm at %08X\n", m_pc-1);
	1543	}
	1544
	1545	void tms32051_device::op_mpya()
	1546	{
	1547	fatalerror("32051: unimplemented op mpya at %08X\n", m_pc-1);
	1548	}
	1549
	1550	void tms32051_device::op_mpys()
	1551	{
	1552	fatalerror("32051: unimplemented op mpys at %08X\n", m_pc-1);
	1553	}
	1554
	1555	void tms32051_device::op_mpyu()
	1556	{
	1557	fatalerror("32051: unimplemented op mpyu at %08X\n", m_pc-1);
	1558	}
	1559
	1560	void tms32051_device::op_pac()
	1561	{
	1562	fatalerror("32051: unimplemented op pac at %08X\n", m_pc-1);
	1563	}
	1564
	1565	void tms32051_device::op_spac()
	1566	{
	1567	fatalerror("32051: unimplemented op spac at %08X\n", m_pc-1);
	1568	}
	1569
	1570	void tms32051_device::op_sph()
	1571	{
	1572	UINT16 ea = GET_ADDRESS();
	1573	UINT16 spreg = (UINT16)(PREG_PSCALER(m_preg) >> 16);
	1574	DM_WRITE16(ea, spreg);
	1575
	1576	CYCLES(1);
	1577	}
	1578
	1579	void tms32051_device::op_spl()
	1580	{
	1581	fatalerror("32051: unimplemented op spl at %08X\n", m_pc-1);
	1582	}
	1583
	1584	void tms32051_device::op_spm()
	1585	{
	1586	m_st1.pm = m_op & 0x3;
	1587
	1588	CYCLES(1);
	1589	}
	1590
	1591	void tms32051_device::op_sqra()
	1592	{
	1593	fatalerror("32051: unimplemented op sqra at %08X\n", m_pc-1);
	1594	}
	1595
	1596	void tms32051_device::op_sqrs()
	1597	{
	1598	fatalerror("32051: unimplemented op sqrs at %08X\n", m_pc-1);
	1599	}
	1600
	1601	void tms32051_device::op_zpr()
	1602	{
	1603	fatalerror("32051: unimplemented op zpr at %08X\n", m_pc-1);
	1604	}
	1605
	1606	void tms32051_device::op_bit()
	1607	{
	1608	UINT16 ea = GET_ADDRESS();
	1609	UINT16 data = DM_READ16(ea);
	1610
	1611	m_st1.tc = (data >> (~m_op >> 8 & 0xf)) & 1;
	1612
	1613	CYCLES(1);
	1614	}
	1615
	1616	void tms32051_device::op_bitt()
	1617	{
	1618	UINT16 ea = GET_ADDRESS();
	1619	UINT16 data = DM_READ16(ea);
	1620
	1621	m_st1.tc = (data >> (~m_treg2 & 0xf)) & 1;
	1622
	1623	CYCLES(1);
	1624	}
	1625
	1626	void tms32051_device::op_clrc_ov()
	1627	{
	1628	m_st0.ovm = 0;
	1629
	1630	CYCLES(1);
	1631	}
	1632
	1633	void tms32051_device::op_clrc_ext()
	1634	{
	1635	m_st1.sxm = 0;
	1636
	1637	CYCLES(1);
	1638	}
	1639
	1640	void tms32051_device::op_clrc_hold()
	1641	{
	1642	fatalerror("32051: unimplemented op clrc hold at %08X\n", m_pc-1);
	1643	}
	1644
	1645	void tms32051_device::op_clrc_tc()
	1646	{
	1647	fatalerror("32051: unimplemented op clrc tc at %08X\n", m_pc-1);
	1648	}
	1649
	1650	void tms32051_device::op_clrc_carry()
	1651	{
	1652	fatalerror("32051: unimplemented op clrc carry at %08X\n", m_pc-1);
	1653	}
	1654
	1655	void tms32051_device::op_clrc_cnf()
	1656	{
	1657	m_st1.cnf = 0;
	1658
	1659	CYCLES(1);
	1660	}
	1661
	1662	void tms32051_device::op_clrc_intm()
	1663	{
	1664	m_st0.intm = 0;
	1665
	1666	check_interrupts();
	1667
	1668	CYCLES(1);
	1669	}
	1670
	1671	void tms32051_device::op_clrc_xf()
	1672	{
	1673	fatalerror("32051: unimplemented op clrc xf at %08X\n", m_pc-1);
	1674	}
	1675
	1676	void tms32051_device::op_idle()
	1677	{
	1678	fatalerror("32051: unimplemented op idle at %08X\n", m_pc-1);
	1679	}
	1680
	1681	void tms32051_device::op_idle2()
	1682	{
	1683	fatalerror("32051: unimplemented op idle2 at %08X\n", m_pc-1);
	1684	}
	1685
	1686	void tms32051_device::op_lst_st0()
	1687	{
	1688	fatalerror("32051: unimplemented op lst st0 at %08X\n", m_pc-1);
	1689	}
	1690
	1691	void tms32051_device::op_lst_st1()
	1692	{
	1693	fatalerror("32051: unimplemented op lst st1 at %08X\n", m_pc-1);
	1694	}
	1695
	1696	void tms32051_device::op_pop()
	1697	{
	1698	m_acc = POP_STACK();
	1699
	1700	CYCLES(1);
	1701	}
	1702
	1703	void tms32051_device::op_popd()
	1704	{
	1705	fatalerror("32051: unimplemented op popd at %08X\n", m_pc-1);
	1706	}
	1707
	1708	void tms32051_device::op_pshd()
	1709	{
	1710	fatalerror("32051: unimplemented op pshd at %08X\n", m_pc-1);
	1711	}
	1712
	1713	void tms32051_device::op_push()
	1714	{
	1715	fatalerror("32051: unimplemented op push at %08X\n", m_pc-1);
	1716	}
	1717
	1718	void tms32051_device::op_rpt_mem()
	1719	{
	1720	UINT16 ea = GET_ADDRESS();
	1721	UINT16 data = DM_READ16(ea);
	1722	m_rptc = data;
	1723	m_rpt_start = m_pc;
	1724	m_rpt_end = m_pc;
	1725
	1726	CYCLES(1);
	1727	}
	1728
	1729	void tms32051_device::op_rpt_limm()
	1730	{
	1731	m_rptc = (UINT16)ROPCODE();
	1732	m_rpt_start = m_pc;
	1733	m_rpt_end = m_pc;
	1734
	1735	CYCLES(2);
	1736	}
	1737
	1738	void tms32051_device::op_rpt_simm()
	1739	{
	1740	m_rptc = (m_op & 0xff);
	1741	m_rpt_start = m_pc;
	1742	m_rpt_end = m_pc;
	1743
	1744	CYCLES(1);
	1745	}
	1746
	1747	void tms32051_device::op_rptb()
	1748	{
	1749	UINT16 pma = ROPCODE();
	1750	m_pmst.braf = 1;
	1751	m_pasr = m_pc;
	1752	m_paer = pma + 1;
	1753
	1754	CYCLES(2);
	1755	}
	1756
	1757	void tms32051_device::op_rptz()
	1758	{
	1759	fatalerror("32051: unimplemented op rptz at %08X\n", m_pc-1);
	1760	}
	1761
	1762	void tms32051_device::op_setc_ov()
	1763	{
	1764	m_st0.ovm = 1;
	1765
	1766	CYCLES(1);
	1767	}
	1768
	1769	void tms32051_device::op_setc_ext()
	1770	{
	1771	m_st1.sxm = 1;
	1772
	1773	CYCLES(1);
	1774	}
	1775
	1776	void tms32051_device::op_setc_hold()
	1777	{
	1778	fatalerror("32051: unimplemented op setc hold at %08X\n", m_pc-1);
	1779	}
	1780
	1781	void tms32051_device::op_setc_tc()
	1782	{
	1783	fatalerror("32051: unimplemented op setc tc at %08X\n", m_pc-1);
	1784	}
	1785
	1786	void tms32051_device::op_setc_carry()
	1787	{
	1788	fatalerror("32051: unimplemented op setc carry at %08X\n", m_pc-1);
	1789	}
	1790
	1791	void tms32051_device::op_setc_xf()
	1792	{
	1793	fatalerror("32051: unimplemented op setc xf at %08X\n", m_pc-1);
	1794	}
	1795
	1796	void tms32051_device::op_setc_cnf()
	1797	{
	1798	m_st1.cnf = 1;
	1799
	1800	CYCLES(1);
	1801	}
	1802
	1803	void tms32051_device::op_setc_intm()
	1804	{
	1805	m_st0.intm = 1;
	1806
	1807	check_interrupts();
	1808
	1809	CYCLES(1);
	1810	}
	1811
	1812	void tms32051_device::op_sst_st0()
	1813	{
	1814	fatalerror("32051: unimplemented op sst st0 at %08X\n", m_pc-1);
	1815	}
	1816
	1817	void tms32051_device::op_sst_st1()
	1818	{
	1819	fatalerror("32051: unimplemented op sst st1 at %08X\n", m_pc-1);
	1820	}

trunk/src/devices/cpu/tms32051/tms32051.cpp

r250251	r250252
105	105	m_data->write_word(address << 1, data);
106	106	}
107	107
108		#include "32051ops.cpp"
	108	#include "32051ops.inc"
109	109	#include "32051ops.h"
110	110
111	111	void tms32051_device::op_group_be()

trunk/src/devices/cpu/tms34010/34010fld.cpp

r250251	r250252
1		// license:BSD-3-Clause
2		// copyright-holders:Alex Pasadyn,Zsolt Vasvari
3		/***************************************************************************
4
5		TMS34010: Portable Texas Instruments TMS34010 emulator
6
7		Copyright Alex Pasadyn/Zsolt Vasvari
8		Parts based on code by Aaron Giles
9
10		***************************************************************************/
11
12
13
14		/***************************************************************************
15		FIELD WRITE FUNCTIONS
16		***************************************************************************/
17
18		void tms340x0_device::wfield_01(offs_t offset, UINT32 data)
19		{
20		WFIELDMAC(0x01,16);
21		}
22
23		void tms340x0_device::wfield_02(offs_t offset, UINT32 data)
24		{
25		WFIELDMAC(0x03,15);
26		}
27
28		void tms340x0_device::wfield_03(offs_t offset, UINT32 data)
29		{
30		WFIELDMAC(0x07,14);
31		}
32
33		void tms340x0_device::wfield_04(offs_t offset, UINT32 data)
34		{
35		WFIELDMAC(0x0f,13);
36		}
37
38		void tms340x0_device::wfield_05(offs_t offset, UINT32 data)
39		{
40		WFIELDMAC(0x1f,12);
41		}
42
43		void tms340x0_device::wfield_06(offs_t offset, UINT32 data)
44		{
45		WFIELDMAC(0x3f,11);
46		}
47
48		void tms340x0_device::wfield_07(offs_t offset, UINT32 data)
49		{
50		WFIELDMAC(0x7f,10);
51		}
52
53		void tms340x0_device::wfield_08(offs_t offset, UINT32 data)
54		{
55		WFIELDMAC_8();
56		}
57
58		void tms340x0_device::wfield_09(offs_t offset, UINT32 data)
59		{
60		WFIELDMAC(0x1ff,8);
61		}
62
63		void tms340x0_device::wfield_10(offs_t offset, UINT32 data)
64		{
65		WFIELDMAC(0x3ff,7);
66		}
67
68		void tms340x0_device::wfield_11(offs_t offset, UINT32 data)
69		{
70		WFIELDMAC(0x7ff,6);
71		}
72
73		void tms340x0_device::wfield_12(offs_t offset, UINT32 data)
74		{
75		WFIELDMAC(0xfff,5);
76		}
77
78		void tms340x0_device::wfield_13(offs_t offset, UINT32 data)
79		{
80		WFIELDMAC(0x1fff,4);
81		}
82
83		void tms340x0_device::wfield_14(offs_t offset, UINT32 data)
84		{
85		WFIELDMAC(0x3fff,3);
86		}
87
88		void tms340x0_device::wfield_15(offs_t offset, UINT32 data)
89		{
90		WFIELDMAC(0x7fff,2);
91		}
92
93		void tms340x0_device::wfield_16(offs_t offset, UINT32 data)
94		{
95		if (offset & 0x0f)
96		{
97		WFIELDMAC(0xffff,1);
98		}
99		else
100		{
101		TMS34010_WRMEM_WORD(TOBYTE(offset),data);
102		}
103		}
104
105		void tms340x0_device::wfield_17(offs_t offset, UINT32 data)
106		{
107		WFIELDMAC(0x1ffff,0);
108		}
109
110		void tms340x0_device::wfield_18(offs_t offset, UINT32 data)
111		{
112		WFIELDMAC_BIG(0x3ffff,15);
113		}
114
115		void tms340x0_device::wfield_19(offs_t offset, UINT32 data)
116		{
117		WFIELDMAC_BIG(0x7ffff,14);
118		}
119
120		void tms340x0_device::wfield_20(offs_t offset, UINT32 data)
121		{
122		WFIELDMAC_BIG(0xfffff,13);
123		}
124
125		void tms340x0_device::wfield_21(offs_t offset, UINT32 data)
126		{
127		WFIELDMAC_BIG(0x1fffff,12);
128		}
129
130		void tms340x0_device::wfield_22(offs_t offset, UINT32 data)
131		{
132		WFIELDMAC_BIG(0x3fffff,11);
133		}
134
135		void tms340x0_device::wfield_23(offs_t offset, UINT32 data)
136		{
137		WFIELDMAC_BIG(0x7fffff,10);
138		}
139
140		void tms340x0_device::wfield_24(offs_t offset, UINT32 data)
141		{
142		WFIELDMAC_BIG(0xffffff,9);
143		}
144
145		void tms340x0_device::wfield_25(offs_t offset, UINT32 data)
146		{
147		WFIELDMAC_BIG(0x1ffffff,8);
148		}
149
150		void tms340x0_device::wfield_26(offs_t offset, UINT32 data)
151		{
152		WFIELDMAC_BIG(0x3ffffff,7);
153		}
154
155		void tms340x0_device::wfield_27(offs_t offset, UINT32 data)
156		{
157		WFIELDMAC_BIG(0x7ffffff,6);
158		}
159
160		void tms340x0_device::wfield_28(offs_t offset, UINT32 data)
161		{
162		WFIELDMAC_BIG(0xfffffff,5);
163		}
164
165		void tms340x0_device::wfield_29(offs_t offset, UINT32 data)
166		{
167		WFIELDMAC_BIG(0x1fffffff,4);
168		}
169
170		void tms340x0_device::wfield_30(offs_t offset, UINT32 data)
171		{
172		WFIELDMAC_BIG(0x3fffffff,3);
173		}
174
175		void tms340x0_device::wfield_31(offs_t offset, UINT32 data)
176		{
177		WFIELDMAC_BIG(0x7fffffff,2);
178		}
179
180		void tms340x0_device::wfield_32(offs_t offset, UINT32 data)
181		{
182		WFIELDMAC_32();
183		}
184
185
186		const tms340x0_device::wfield_func tms340x0_device::s_wfield_functions[32] =
187		{
188		&tms340x0_device::wfield_32, &tms340x0_device::wfield_01, &tms340x0_device::wfield_02, &tms340x0_device::wfield_03, &tms340x0_device::wfield_04, &tms340x0_device::wfield_05,
189		&tms340x0_device::wfield_06, &tms340x0_device::wfield_07, &tms340x0_device::wfield_08, &tms340x0_device::wfield_09, &tms340x0_device::wfield_10, &tms340x0_device::wfield_11,
190		&tms340x0_device::wfield_12, &tms340x0_device::wfield_13, &tms340x0_device::wfield_14, &tms340x0_device::wfield_15, &tms340x0_device::wfield_16, &tms340x0_device::wfield_17,
191		&tms340x0_device::wfield_18, &tms340x0_device::wfield_19, &tms340x0_device::wfield_20, &tms340x0_device::wfield_21, &tms340x0_device::wfield_22, &tms340x0_device::wfield_23,
192		&tms340x0_device::wfield_24, &tms340x0_device::wfield_25, &tms340x0_device::wfield_26, &tms340x0_device::wfield_27, &tms340x0_device::wfield_28, &tms340x0_device::wfield_29,
193		&tms340x0_device::wfield_30, &tms340x0_device::wfield_31
194		};
195
196
197
198		/***************************************************************************
199		FIELD READ FUNCTIONS (ZERO-EXTEND)
200		***************************************************************************/
201
202		UINT32 tms340x0_device::rfield_z_01(offs_t offset)
203		{
204		UINT32 ret;
205		RFIELDMAC(0x01,16);
206		return ret;
207		}
208
209		UINT32 tms340x0_device::rfield_z_02(offs_t offset)
210		{
211		UINT32 ret;
212		RFIELDMAC(0x03,15);
213		return ret;
214		}
215
216		UINT32 tms340x0_device::rfield_z_03(offs_t offset)
217		{
218		UINT32 ret;
219		RFIELDMAC(0x07,14);
220		return ret;
221		}
222
223		UINT32 tms340x0_device::rfield_z_04(offs_t offset)
224		{
225		UINT32 ret;
226		RFIELDMAC(0x0f,13);
227		return ret;
228		}
229
230		UINT32 tms340x0_device::rfield_z_05(offs_t offset)
231		{
232		UINT32 ret;
233		RFIELDMAC(0x1f,12);
234		return ret;
235		}
236
237		UINT32 tms340x0_device::rfield_z_06(offs_t offset)
238		{
239		UINT32 ret;
240		RFIELDMAC(0x3f,11);
241		return ret;
242		}
243
244		UINT32 tms340x0_device::rfield_z_07(offs_t offset)
245		{
246		UINT32 ret;
247		RFIELDMAC(0x7f,10);
248		return ret;
249		}
250
251		UINT32 tms340x0_device::rfield_z_08(offs_t offset)
252		{
253		UINT32 ret;
254		RFIELDMAC_8();
255		return ret;
256		}
257
258		UINT32 tms340x0_device::rfield_z_09(offs_t offset)
259		{
260		UINT32 ret;
261		RFIELDMAC(0x1ff,8);
262		return ret;
263		}
264
265		UINT32 tms340x0_device::rfield_z_10(offs_t offset)
266		{
267		UINT32 ret;
268		RFIELDMAC(0x3ff,7);
269		return ret;
270		}
271
272		UINT32 tms340x0_device::rfield_z_11(offs_t offset)
273		{
274		UINT32 ret;
275		RFIELDMAC(0x7ff,6);
276		return ret;
277		}
278
279		UINT32 tms340x0_device::rfield_z_12(offs_t offset)
280		{
281		UINT32 ret;
282		RFIELDMAC(0xfff,5);
283		return ret;
284		}
285
286		UINT32 tms340x0_device::rfield_z_13(offs_t offset)
287		{
288		UINT32 ret;
289		RFIELDMAC(0x1fff,4);
290		return ret;
291		}
292
293		UINT32 tms340x0_device::rfield_z_14(offs_t offset)
294		{
295		UINT32 ret;
296		RFIELDMAC(0x3fff,3);
297		return ret;
298		}
299
300		UINT32 tms340x0_device::rfield_z_15(offs_t offset)
301		{
302		UINT32 ret;
303		RFIELDMAC(0x7fff,2);
304		return ret;
305		}
306
307		UINT32 tms340x0_device::rfield_z_16(offs_t offset)
308		{
309		UINT32 ret;
310		if (offset & 0x0f)
311		{
312		RFIELDMAC(0xffff,1);
313		}
314
315		else
316		ret = TMS34010_RDMEM_WORD(TOBYTE(offset));
317		return ret;
318		}
319
320		UINT32 tms340x0_device::rfield_z_17(offs_t offset)
321		{
322		UINT32 ret;
323		RFIELDMAC(0x1ffff,0);
324		return ret;
325		}
326
327		UINT32 tms340x0_device::rfield_z_18(offs_t offset)
328		{
329		UINT32 ret;
330		RFIELDMAC_BIG(0x3ffff,15);
331		return ret;
332		}
333
334		UINT32 tms340x0_device::rfield_z_19(offs_t offset)
335		{
336		UINT32 ret;
337		RFIELDMAC_BIG(0x7ffff,14);
338		return ret;
339		}
340
341		UINT32 tms340x0_device::rfield_z_20(offs_t offset)
342		{
343		UINT32 ret;
344		RFIELDMAC_BIG(0xfffff,13);
345		return ret;
346		}
347
348		UINT32 tms340x0_device::rfield_z_21(offs_t offset)
349		{
350		UINT32 ret;
351		RFIELDMAC_BIG(0x1fffff,12);
352		return ret;
353		}
354
355		UINT32 tms340x0_device::rfield_z_22(offs_t offset)
356		{
357		UINT32 ret;
358		RFIELDMAC_BIG(0x3fffff,11);
359		return ret;
360		}
361
362		UINT32 tms340x0_device::rfield_z_23(offs_t offset)
363		{
364		UINT32 ret;
365		RFIELDMAC_BIG(0x7fffff,10);
366		return ret;
367		}
368
369		UINT32 tms340x0_device::rfield_z_24(offs_t offset)
370		{
371		UINT32 ret;
372		RFIELDMAC_BIG(0xffffff,9);
373		return ret;
374		}
375
376		UINT32 tms340x0_device::rfield_z_25(offs_t offset)
377		{
378		UINT32 ret;
379		RFIELDMAC_BIG(0x1ffffff,8);
380		return ret;
381		}
382
383		UINT32 tms340x0_device::rfield_z_26(offs_t offset)
384		{
385		UINT32 ret;
386		RFIELDMAC_BIG(0x3ffffff,7);
387		return ret;
388		}
389
390		UINT32 tms340x0_device::rfield_z_27(offs_t offset)
391		{
392		UINT32 ret;
393		RFIELDMAC_BIG(0x7ffffff,6);
394		return ret;
395		}
396
397		UINT32 tms340x0_device::rfield_z_28(offs_t offset)
398		{
399		UINT32 ret;
400		RFIELDMAC_BIG(0xfffffff,5);
401		return ret;
402		}
403
404		UINT32 tms340x0_device::rfield_z_29(offs_t offset)
405		{
406		UINT32 ret;
407		RFIELDMAC_BIG(0x1fffffff,4);
408		return ret;
409		}
410
411		UINT32 tms340x0_device::rfield_z_30(offs_t offset)
412		{
413		UINT32 ret;
414		RFIELDMAC_BIG(0x3fffffff,3);
415		return ret;
416		}
417
418		UINT32 tms340x0_device::rfield_z_31(offs_t offset)
419		{
420		UINT32 ret;
421		RFIELDMAC_BIG(0x7fffffff,2);
422		return ret;
423		}
424
425		UINT32 tms340x0_device::rfield_32(offs_t offset)
426		{
427		RFIELDMAC_32();
428		}
429
430
431		/***************************************************************************
432		FIELD READ FUNCTIONS (SIGN-EXTEND)
433		***************************************************************************/
434
435		UINT32 tms340x0_device::rfield_s_01(offs_t offset)
436		{
437		UINT32 ret;
438		RFIELDMAC(0x01,16);
439		return ((INT32)(ret << 31)) >> 31;
440		}
441
442		UINT32 tms340x0_device::rfield_s_02(offs_t offset)
443		{
444		UINT32 ret;
445		RFIELDMAC(0x03,15);
446		return ((INT32)(ret << 30)) >> 30;
447		}
448
449		UINT32 tms340x0_device::rfield_s_03(offs_t offset)
450		{
451		UINT32 ret;
452		RFIELDMAC(0x07,14);
453		return ((INT32)(ret << 29)) >> 29;
454		}
455
456		UINT32 tms340x0_device::rfield_s_04(offs_t offset)
457		{
458		UINT32 ret;
459		RFIELDMAC(0x0f,13);
460		return ((INT32)(ret << 28)) >> 28;
461		}
462
463		UINT32 tms340x0_device::rfield_s_05(offs_t offset)
464		{
465		UINT32 ret;
466		RFIELDMAC(0x1f,12);
467		return ((INT32)(ret << 27)) >> 27;
468		}
469
470		UINT32 tms340x0_device::rfield_s_06(offs_t offset)
471		{
472		UINT32 ret;
473		RFIELDMAC(0x3f,11);
474		return ((INT32)(ret << 26)) >> 26;
475		}
476
477		UINT32 tms340x0_device::rfield_s_07(offs_t offset)
478		{
479		UINT32 ret;
480		RFIELDMAC(0x7f,10);
481		return ((INT32)(ret << 25)) >> 25;
482		}
483
484		UINT32 tms340x0_device::rfield_s_08(offs_t offset)
485		{
486		UINT32 ret;
487		if (offset & 0x07)
488		{
489		RFIELDMAC(0xff,9);
490		}
491
492		else
493		ret = TMS34010_RDMEM(TOBYTE(offset));
494		return (INT32)(INT8)ret;
495		}
496
497		UINT32 tms340x0_device::rfield_s_09(offs_t offset)
498		{
499		UINT32 ret;
500		RFIELDMAC(0x1ff,8);
501		return ((INT32)(ret << 23)) >> 23;
502		}
503
504		UINT32 tms340x0_device::rfield_s_10(offs_t offset)
505		{
506		UINT32 ret;
507		RFIELDMAC(0x3ff,7);
508		return ((INT32)(ret << 22)) >> 22;
509		}
510
511		UINT32 tms340x0_device::rfield_s_11(offs_t offset)
512		{
513		UINT32 ret;
514		RFIELDMAC(0x7ff,6);
515		return ((INT32)(ret << 21)) >> 21;
516		}
517
518		UINT32 tms340x0_device::rfield_s_12(offs_t offset)
519		{
520		UINT32 ret;
521		RFIELDMAC(0xfff,5);
522		return ((INT32)(ret << 20)) >> 20;
523		}
524
525		UINT32 tms340x0_device::rfield_s_13(offs_t offset)
526		{
527		UINT32 ret;
528		RFIELDMAC(0x1fff,4);
529		return ((INT32)(ret << 19)) >> 19;
530		}
531
532		UINT32 tms340x0_device::rfield_s_14(offs_t offset)
533		{
534		UINT32 ret;
535		RFIELDMAC(0x3fff,3);
536		return ((INT32)(ret << 18)) >> 18;
537		}
538
539		UINT32 tms340x0_device::rfield_s_15(offs_t offset)
540		{
541		UINT32 ret;
542		RFIELDMAC(0x7fff,2);
543		return ((INT32)(ret << 17)) >> 17;
544		}
545
546		UINT32 tms340x0_device::rfield_s_16(offs_t offset)
547		{
548		UINT32 ret;
549		if (offset & 0x0f)
550		{
551		RFIELDMAC(0xffff,1);
552		}
553
554		else
555		{
556		ret = TMS34010_RDMEM_WORD(TOBYTE(offset));
557		}
558
559		return (INT32)(INT16)ret;
560		}
561
562		UINT32 tms340x0_device::rfield_s_17(offs_t offset)
563		{
564		UINT32 ret;
565		RFIELDMAC(0x1ffff,0);
566		return ((INT32)(ret << 15)) >> 15;
567		}
568
569		UINT32 tms340x0_device::rfield_s_18(offs_t offset)
570		{
571		UINT32 ret;
572		RFIELDMAC_BIG(0x3ffff,15);
573		return ((INT32)(ret << 14)) >> 14;
574		}
575
576		UINT32 tms340x0_device::rfield_s_19(offs_t offset)
577		{
578		UINT32 ret;
579		RFIELDMAC_BIG(0x7ffff,14);
580		return ((INT32)(ret << 13)) >> 13;
581		}
582
583		UINT32 tms340x0_device::rfield_s_20(offs_t offset)
584		{
585		UINT32 ret;
586		RFIELDMAC_BIG(0xfffff,13);
587		return ((INT32)(ret << 12)) >> 12;
588		}
589
590		UINT32 tms340x0_device::rfield_s_21(offs_t offset)
591		{
592		UINT32 ret;
593		RFIELDMAC_BIG(0x1fffff,12);
594		return ((INT32)(ret << 11)) >> 11;
595		}
596
597		UINT32 tms340x0_device::rfield_s_22(offs_t offset)
598		{
599		UINT32 ret;
600		RFIELDMAC_BIG(0x3fffff,11);
601		return ((INT32)(ret << 10)) >> 10;
602		}
603
604		UINT32 tms340x0_device::rfield_s_23(offs_t offset)
605		{
606		UINT32 ret;
607		RFIELDMAC_BIG(0x7fffff,10);
608		return ((INT32)(ret << 9)) >> 9;
609		}
610
611		UINT32 tms340x0_device::rfield_s_24(offs_t offset)
612		{
613		UINT32 ret;
614		RFIELDMAC_BIG(0xffffff,9);
615		return ((INT32)(ret << 8)) >> 8;
616		}
617
618		UINT32 tms340x0_device::rfield_s_25(offs_t offset)
619		{
620		UINT32 ret;
621		RFIELDMAC_BIG(0x1ffffff,8);
622		return ((INT32)(ret << 7)) >> 7;
623		}
624
625		UINT32 tms340x0_device::rfield_s_26(offs_t offset)
626		{
627		UINT32 ret;
628		RFIELDMAC_BIG(0x3ffffff,7);
629		return ((INT32)(ret << 6)) >> 6;
630		}
631
632		UINT32 tms340x0_device::rfield_s_27(offs_t offset)
633		{
634		UINT32 ret;
635		RFIELDMAC_BIG(0x7ffffff,6);
636		return ((INT32)(ret << 5)) >> 5;
637		}
638
639		UINT32 tms340x0_device::rfield_s_28(offs_t offset)
640		{
641		UINT32 ret;
642		RFIELDMAC_BIG(0xfffffff,5);
643		return ((INT32)(ret << 4)) >> 4;
644		}
645
646		UINT32 tms340x0_device::rfield_s_29(offs_t offset)
647		{
648		UINT32 ret;
649		RFIELDMAC_BIG(0x1fffffff,4);
650		return ((INT32)(ret << 3)) >> 3;
651		}
652
653		UINT32 tms340x0_device::rfield_s_30(offs_t offset)
654		{
655		UINT32 ret;
656		RFIELDMAC_BIG(0x3fffffff,3);
657		return ((INT32)(ret << 2)) >> 2;
658		}
659
660		UINT32 tms340x0_device::rfield_s_31(offs_t offset)
661		{
662		UINT32 ret;
663		RFIELDMAC_BIG(0x7fffffff,2);
664		return ((INT32)(ret << 1)) >> 1;
665		}
666
667		const tms340x0_device::rfield_func tms340x0_device::s_rfield_functions[64] =
668		{
669		&tms340x0_device::rfield_32  , &tms340x0_device::rfield_z_01, &tms340x0_device::rfield_z_02, &tms340x0_device::rfield_z_03, &tms340x0_device::rfield_z_04, &tms340x0_device::rfield_z_05,
670		&tms340x0_device::rfield_z_06, &tms340x0_device::rfield_z_07, &tms340x0_device::rfield_z_08, &tms340x0_device::rfield_z_09, &tms340x0_device::rfield_z_10, &tms340x0_device::rfield_z_11,
671		&tms340x0_device::rfield_z_12, &tms340x0_device::rfield_z_13, &tms340x0_device::rfield_z_14, &tms340x0_device::rfield_z_15, &tms340x0_device::rfield_z_16, &tms340x0_device::rfield_z_17,
672		&tms340x0_device::rfield_z_18, &tms340x0_device::rfield_z_19, &tms340x0_device::rfield_z_20, &tms340x0_device::rfield_z_21, &tms340x0_device::rfield_z_22, &tms340x0_device::rfield_z_23,
673		&tms340x0_device::rfield_z_24, &tms340x0_device::rfield_z_25, &tms340x0_device::rfield_z_26, &tms340x0_device::rfield_z_27, &tms340x0_device::rfield_z_28, &tms340x0_device::rfield_z_29,
674		&tms340x0_device::rfield_z_30, &tms340x0_device::rfield_z_31,
675		&tms340x0_device::rfield_32  , &tms340x0_device::rfield_s_01, &tms340x0_device::rfield_s_02, &tms340x0_device::rfield_s_03, &tms340x0_device::rfield_s_04, &tms340x0_device::rfield_s_05,
676		&tms340x0_device::rfield_s_06, &tms340x0_device::rfield_s_07, &tms340x0_device::rfield_s_08, &tms340x0_device::rfield_s_09, &tms340x0_device::rfield_s_10, &tms340x0_device::rfield_s_11,
677		&tms340x0_device::rfield_s_12, &tms340x0_device::rfield_s_13, &tms340x0_device::rfield_s_14, &tms340x0_device::rfield_s_15, &tms340x0_device::rfield_s_16, &tms340x0_device::rfield_s_17,
678		&tms340x0_device::rfield_s_18, &tms340x0_device::rfield_s_19, &tms340x0_device::rfield_s_20, &tms340x0_device::rfield_s_21, &tms340x0_device::rfield_s_22, &tms340x0_device::rfield_s_23,
679		&tms340x0_device::rfield_s_24, &tms340x0_device::rfield_s_25, &tms340x0_device::rfield_s_26, &tms340x0_device::rfield_s_27, &tms340x0_device::rfield_s_28, &tms340x0_device::rfield_s_29,
680		&tms340x0_device::rfield_s_30, &tms340x0_device::rfield_s_31
681		};

trunk/src/devices/cpu/tms34010/34010fld.inc

r0	r250252
	1	// license:BSD-3-Clause
	2	// copyright-holders:Alex Pasadyn,Zsolt Vasvari
	3	/***************************************************************************
	4
	5	TMS34010: Portable Texas Instruments TMS34010 emulator
	6
	7	Copyright Alex Pasadyn/Zsolt Vasvari
	8	Parts based on code by Aaron Giles
	9
	10	***************************************************************************/
	11
	12
	13
	14	/***************************************************************************
	15	FIELD WRITE FUNCTIONS
	16	***************************************************************************/
	17
	18	void tms340x0_device::wfield_01(offs_t offset, UINT32 data)
	19	{
	20	WFIELDMAC(0x01,16);
	21	}
	22
	23	void tms340x0_device::wfield_02(offs_t offset, UINT32 data)
	24	{
	25	WFIELDMAC(0x03,15);
	26	}
	27
	28	void tms340x0_device::wfield_03(offs_t offset, UINT32 data)
	29	{
	30	WFIELDMAC(0x07,14);
	31	}
	32
	33	void tms340x0_device::wfield_04(offs_t offset, UINT32 data)
	34	{
	35	WFIELDMAC(0x0f,13);
	36	}
	37
	38	void tms340x0_device::wfield_05(offs_t offset, UINT32 data)
	39	{
	40	WFIELDMAC(0x1f,12);
	41	}
	42
	43	void tms340x0_device::wfield_06(offs_t offset, UINT32 data)
	44	{
	45	WFIELDMAC(0x3f,11);
	46	}
	47
	48	void tms340x0_device::wfield_07(offs_t offset, UINT32 data)
	49	{
	50	WFIELDMAC(0x7f,10);
	51	}
	52
	53	void tms340x0_device::wfield_08(offs_t offset, UINT32 data)
	54	{
	55	WFIELDMAC_8();
	56	}
	57
	58	void tms340x0_device::wfield_09(offs_t offset, UINT32 data)
	59	{
	60	WFIELDMAC(0x1ff,8);
	61	}
	62
	63	void tms340x0_device::wfield_10(offs_t offset, UINT32 data)
	64	{
	65	WFIELDMAC(0x3ff,7);
	66	}
	67
	68	void tms340x0_device::wfield_11(offs_t offset, UINT32 data)
	69	{
	70	WFIELDMAC(0x7ff,6);
	71	}
	72
	73	void tms340x0_device::wfield_12(offs_t offset, UINT32 data)
	74	{
	75	WFIELDMAC(0xfff,5);
	76	}
	77
	78	void tms340x0_device::wfield_13(offs_t offset, UINT32 data)
	79	{
	80	WFIELDMAC(0x1fff,4);
	81	}
	82
	83	void tms340x0_device::wfield_14(offs_t offset, UINT32 data)
	84	{
	85	WFIELDMAC(0x3fff,3);
	86	}
	87
	88	void tms340x0_device::wfield_15(offs_t offset, UINT32 data)
	89	{
	90	WFIELDMAC(0x7fff,2);
	91	}
	92
	93	void tms340x0_device::wfield_16(offs_t offset, UINT32 data)
	94	{
	95	if (offset & 0x0f)
	96	{
	97	WFIELDMAC(0xffff,1);
	98	}
	99	else
	100	{
	101	TMS34010_WRMEM_WORD(TOBYTE(offset),data);
	102	}
	103	}
	104
	105	void tms340x0_device::wfield_17(offs_t offset, UINT32 data)
	106	{
	107	WFIELDMAC(0x1ffff,0);
	108	}
	109
	110	void tms340x0_device::wfield_18(offs_t offset, UINT32 data)
	111	{
	112	WFIELDMAC_BIG(0x3ffff,15);
	113	}
	114
	115	void tms340x0_device::wfield_19(offs_t offset, UINT32 data)
	116	{
	117	WFIELDMAC_BIG(0x7ffff,14);
	118	}
	119
	120	void tms340x0_device::wfield_20(offs_t offset, UINT32 data)
	121	{
	122	WFIELDMAC_BIG(0xfffff,13);
	123	}
	124
	125	void tms340x0_device::wfield_21(offs_t offset, UINT32 data)
	126	{
	127	WFIELDMAC_BIG(0x1fffff,12);
	128	}
	129
	130	void tms340x0_device::wfield_22(offs_t offset, UINT32 data)
	131	{
	132	WFIELDMAC_BIG(0x3fffff,11);
	133	}
	134
	135	void tms340x0_device::wfield_23(offs_t offset, UINT32 data)
	136	{
	137	WFIELDMAC_BIG(0x7fffff,10);
	138	}
	139
	140	void tms340x0_device::wfield_24(offs_t offset, UINT32 data)
	141	{
	142	WFIELDMAC_BIG(0xffffff,9);
	143	}
	144
	145	void tms340x0_device::wfield_25(offs_t offset, UINT32 data)
	146	{
	147	WFIELDMAC_BIG(0x1ffffff,8);
	148	}
	149
	150	void tms340x0_device::wfield_26(offs_t offset, UINT32 data)
	151	{
	152	WFIELDMAC_BIG(0x3ffffff,7);
	153	}
	154
	155	void tms340x0_device::wfield_27(offs_t offset, UINT32 data)
	156	{
	157	WFIELDMAC_BIG(0x7ffffff,6);
	158	}
	159
	160	void tms340x0_device::wfield_28(offs_t offset, UINT32 data)
	161	{
	162	WFIELDMAC_BIG(0xfffffff,5);
	163	}
	164
	165	void tms340x0_device::wfield_29(offs_t offset, UINT32 data)
	166	{
	167	WFIELDMAC_BIG(0x1fffffff,4);
	168	}
	169
	170	void tms340x0_device::wfield_30(offs_t offset, UINT32 data)
	171	{
	172	WFIELDMAC_BIG(0x3fffffff,3);
	173	}
	174
	175	void tms340x0_device::wfield_31(offs_t offset, UINT32 data)
	176	{
	177	WFIELDMAC_BIG(0x7fffffff,2);
	178	}
	179
	180	void tms340x0_device::wfield_32(offs_t offset, UINT32 data)
	181	{
	182	WFIELDMAC_32();
	183	}
	184
	185
	186	const tms340x0_device::wfield_func tms340x0_device::s_wfield_functions[32] =
	187	{
	188	&tms340x0_device::wfield_32, &tms340x0_device::wfield_01, &tms340x0_device::wfield_02, &tms340x0_device::wfield_03, &tms340x0_device::wfield_04, &tms340x0_device::wfield_05,
	189	&tms340x0_device::wfield_06, &tms340x0_device::wfield_07, &tms340x0_device::wfield_08, &tms340x0_device::wfield_09, &tms340x0_device::wfield_10, &tms340x0_device::wfield_11,
	190	&tms340x0_device::wfield_12, &tms340x0_device::wfield_13, &tms340x0_device::wfield_14, &tms340x0_device::wfield_15, &tms340x0_device::wfield_16, &tms340x0_device::wfield_17,
	191	&tms340x0_device::wfield_18, &tms340x0_device::wfield_19, &tms340x0_device::wfield_20, &tms340x0_device::wfield_21, &tms340x0_device::wfield_22, &tms340x0_device::wfield_23,
	192	&tms340x0_device::wfield_24, &tms340x0_device::wfield_25, &tms340x0_device::wfield_26, &tms340x0_device::wfield_27, &tms340x0_device::wfield_28, &tms340x0_device::wfield_29,
	193	&tms340x0_device::wfield_30, &tms340x0_device::wfield_31
	194	};
	195
	196
	197
	198	/***************************************************************************
	199	FIELD READ FUNCTIONS (ZERO-EXTEND)
	200	***************************************************************************/
	201
	202	UINT32 tms340x0_device::rfield_z_01(offs_t offset)
	203	{
	204	UINT32 ret;
	205	RFIELDMAC(0x01,16);
	206	return ret;
	207	}
	208
	209	UINT32 tms340x0_device::rfield_z_02(offs_t offset)
	210	{
	211	UINT32 ret;
	212	RFIELDMAC(0x03,15);
	213	return ret;
	214	}
	215
	216	UINT32 tms340x0_device::rfield_z_03(offs_t offset)
	217	{
	218	UINT32 ret;
	219	RFIELDMAC(0x07,14);
	220	return ret;
	221	}
	222
	223	UINT32 tms340x0_device::rfield_z_04(offs_t offset)
	224	{
	225	UINT32 ret;
	226	RFIELDMAC(0x0f,13);
	227	return ret;
	228	}
	229
	230	UINT32 tms340x0_device::rfield_z_05(offs_t offset)
	231	{
	232	UINT32 ret;
	233	RFIELDMAC(0x1f,12);
	234	return ret;
	235	}
	236
	237	UINT32 tms340x0_device::rfield_z_06(offs_t offset)
	238	{
	239	UINT32 ret;
	240	RFIELDMAC(0x3f,11);
	241	return ret;
	242	}
	243
	244	UINT32 tms340x0_device::rfield_z_07(offs_t offset)
	245	{
	246	UINT32 ret;
	247	RFIELDMAC(0x7f,10);
	248	return ret;
	249	}
	250
	251	UINT32 tms340x0_device::rfield_z_08(offs_t offset)
	252	{
	253	UINT32 ret;
	254	RFIELDMAC_8();
	255	return ret;
	256	}
	257
	258	UINT32 tms340x0_device::rfield_z_09(offs_t offset)
	259	{
	260	UINT32 ret;
	261	RFIELDMAC(0x1ff,8);
	262	return ret;
	263	}
	264
	265	UINT32 tms340x0_device::rfield_z_10(offs_t offset)
	266	{
	267	UINT32 ret;
	268	RFIELDMAC(0x3ff,7);
	269	return ret;
	270	}
	271
	272	UINT32 tms340x0_device::rfield_z_11(offs_t offset)
	273	{
	274	UINT32 ret;
	275	RFIELDMAC(0x7ff,6);
	276	return ret;
	277	}
	278
	279	UINT32 tms340x0_device::rfield_z_12(offs_t offset)
	280	{
	281	UINT32 ret;
	282	RFIELDMAC(0xfff,5);
	283	return ret;
	284	}
	285
	286	UINT32 tms340x0_device::rfield_z_13(offs_t offset)
	287	{
	288	UINT32 ret;
	289	RFIELDMAC(0x1fff,4);
	290	return ret;
	291	}
	292
	293	UINT32 tms340x0_device::rfield_z_14(offs_t offset)
	294	{
	295	UINT32 ret;
	296	RFIELDMAC(0x3fff,3);
	297	return ret;
	298	}
	299
	300	UINT32 tms340x0_device::rfield_z_15(offs_t offset)
	301	{
	302	UINT32 ret;
	303	RFIELDMAC(0x7fff,2);
	304	return ret;
	305	}
	306
	307	UINT32 tms340x0_device::rfield_z_16(offs_t offset)
	308	{
	309	UINT32 ret;
	310	if (offset & 0x0f)
	311	{
	312	RFIELDMAC(0xffff,1);
	313	}
	314
	315	else
	316	ret = TMS34010_RDMEM_WORD(TOBYTE(offset));
	317	return ret;
	318	}
	319
	320	UINT32 tms340x0_device::rfield_z_17(offs_t offset)
	321	{
	322	UINT32 ret;
	323	RFIELDMAC(0x1ffff,0);
	324	return ret;
	325	}
	326
	327	UINT32 tms340x0_device::rfield_z_18(offs_t offset)
	328	{
	329	UINT32 ret;
	330	RFIELDMAC_BIG(0x3ffff,15);
	331	return ret;
	332	}
	333
	334	UINT32 tms340x0_device::rfield_z_19(offs_t offset)
	335	{
	336	UINT32 ret;
	337	RFIELDMAC_BIG(0x7ffff,14);
	338	return ret;
	339	}
	340
	341	UINT32 tms340x0_device::rfield_z_20(offs_t offset)
	342	{
	343	UINT32 ret;
	344	RFIELDMAC_BIG(0xfffff,13);
	345	return ret;
	346	}
	347
	348	UINT32 tms340x0_device::rfield_z_21(offs_t offset)
	349	{
	350	UINT32 ret;
	351	RFIELDMAC_BIG(0x1fffff,12);
	352	return ret;
	353	}
	354
	355	UINT32 tms340x0_device::rfield_z_22(offs_t offset)
	356	{
	357	UINT32 ret;
	358	RFIELDMAC_BIG(0x3fffff,11);
	359	return ret;
	360	}
	361
	362	UINT32 tms340x0_device::rfield_z_23(offs_t offset)
	363	{
	364	UINT32 ret;
	365	RFIELDMAC_BIG(0x7fffff,10);
	366	return ret;
	367	}
	368
	369	UINT32 tms340x0_device::rfield_z_24(offs_t offset)
	370	{
	371	UINT32 ret;
	372	RFIELDMAC_BIG(0xffffff,9);
	373	return ret;
	374	}
	375
	376	UINT32 tms340x0_device::rfield_z_25(offs_t offset)
	377	{
	378	UINT32 ret;
	379	RFIELDMAC_BIG(0x1ffffff,8);
	380	return ret;
	381	}
	382
	383	UINT32 tms340x0_device::rfield_z_26(offs_t offset)
	384	{
	385	UINT32 ret;
	386	RFIELDMAC_BIG(0x3ffffff,7);
	387	return ret;
	388	}
	389
	390	UINT32 tms340x0_device::rfield_z_27(offs_t offset)
	391	{
	392	UINT32 ret;
	393	RFIELDMAC_BIG(0x7ffffff,6);
	394	return ret;
	395	}
	396
	397	UINT32 tms340x0_device::rfield_z_28(offs_t offset)
	398	{
	399	UINT32 ret;
	400	RFIELDMAC_BIG(0xfffffff,5);
	401	return ret;
	402	}
	403
	404	UINT32 tms340x0_device::rfield_z_29(offs_t offset)
	405	{
	406	UINT32 ret;
	407	RFIELDMAC_BIG(0x1fffffff,4);
	408	return ret;
	409	}
	410
	411	UINT32 tms340x0_device::rfield_z_30(offs_t offset)
	412	{
	413	UINT32 ret;
	414	RFIELDMAC_BIG(0x3fffffff,3);
	415	return ret;
	416	}
	417
	418	UINT32 tms340x0_device::rfield_z_31(offs_t offset)
	419	{
	420	UINT32 ret;
	421	RFIELDMAC_BIG(0x7fffffff,2);
	422	return ret;
	423	}
	424
	425	UINT32 tms340x0_device::rfield_32(offs_t offset)
	426	{
	427	RFIELDMAC_32();
	428	}
	429
	430
	431	/***************************************************************************
	432	FIELD READ FUNCTIONS (SIGN-EXTEND)
	433	***************************************************************************/
	434
	435	UINT32 tms340x0_device::rfield_s_01(offs_t offset)
	436	{
	437	UINT32 ret;
	438	RFIELDMAC(0x01,16);
	439	return ((INT32)(ret << 31)) >> 31;
	440	}
	441
	442	UINT32 tms340x0_device::rfield_s_02(offs_t offset)
	443	{
	444	UINT32 ret;
	445	RFIELDMAC(0x03,15);
	446	return ((INT32)(ret << 30)) >> 30;
	447	}
	448
	449	UINT32 tms340x0_device::rfield_s_03(offs_t offset)
	450	{
	451	UINT32 ret;
	452	RFIELDMAC(0x07,14);
	453	return ((INT32)(ret << 29)) >> 29;
	454	}
	455
	456	UINT32 tms340x0_device::rfield_s_04(offs_t offset)
	457	{
	458	UINT32 ret;
	459	RFIELDMAC(0x0f,13);
	460	return ((INT32)(ret << 28)) >> 28;
	461	}
	462
	463	UINT32 tms340x0_device::rfield_s_05(offs_t offset)
	464	{
	465	UINT32 ret;
	466	RFIELDMAC(0x1f,12);
	467	return ((INT32)(ret << 27)) >> 27;
	468	}
	469
	470	UINT32 tms340x0_device::rfield_s_06(offs_t offset)
	471	{
	472	UINT32 ret;
	473	RFIELDMAC(0x3f,11);
	474	return ((INT32)(ret << 26)) >> 26;
	475	}
	476
	477	UINT32 tms340x0_device::rfield_s_07(offs_t offset)
	478	{
	479	UINT32 ret;
	480	RFIELDMAC(0x7f,10);
	481	return ((INT32)(ret << 25)) >> 25;
	482	}
	483
	484	UINT32 tms340x0_device::rfield_s_08(offs_t offset)
	485	{
	486	UINT32 ret;
	487	if (offset & 0x07)
	488	{
	489	RFIELDMAC(0xff,9);
	490	}
	491
	492	else
	493	ret = TMS34010_RDMEM(TOBYTE(offset));
	494	return (INT32)(INT8)ret;
	495	}
	496
	497	UINT32 tms340x0_device::rfield_s_09(offs_t offset)
	498	{
	499	UINT32 ret;
	500	RFIELDMAC(0x1ff,8);
	501	return ((INT32)(ret << 23)) >> 23;
	502	}
	503
	504	UINT32 tms340x0_device::rfield_s_10(offs_t offset)
	505	{
	506	UINT32 ret;
	507	RFIELDMAC(0x3ff,7);
	508	return ((INT32)(ret << 22)) >> 22;
	509	}
	510
	511	UINT32 tms340x0_device::rfield_s_11(offs_t offset)
	512	{
	513	UINT32 ret;
	514	RFIELDMAC(0x7ff,6);
	515	return ((INT32)(ret << 21)) >> 21;
	516	}
	517
	518	UINT32 tms340x0_device::rfield_s_12(offs_t offset)
	519	{
	520	UINT32 ret;
	521	RFIELDMAC(0xfff,5);
	522	return ((INT32)(ret << 20)) >> 20;
	523	}
	524
	525	UINT32 tms340x0_device::rfield_s_13(offs_t offset)
	526	{
	527	UINT32 ret;
	528	RFIELDMAC(0x1fff,4);
	529	return ((INT32)(ret << 19)) >> 19;
	530	}
	531
	532	UINT32 tms340x0_device::rfield_s_14(offs_t offset)
	533	{
	534	UINT32 ret;
	535	RFIELDMAC(0x3fff,3);
	536	return ((INT32)(ret << 18)) >> 18;
	537	}
	538
	539	UINT32 tms340x0_device::rfield_s_15(offs_t offset)
	540	{
	541	UINT32 ret;
	542	RFIELDMAC(0x7fff,2);
	543	return ((INT32)(ret << 17)) >> 17;
	544	}
	545
	546	UINT32 tms340x0_device::rfield_s_16(offs_t offset)
	547	{
	548	UINT32 ret;
	549	if (offset & 0x0f)
	550	{
	551	RFIELDMAC(0xffff,1);
	552	}
	553
	554	else
	555	{
	556	ret = TMS34010_RDMEM_WORD(TOBYTE(offset));
	557	}
	558
	559	return (INT32)(INT16)ret;
	560	}
	561
	562	UINT32 tms340x0_device::rfield_s_17(offs_t offset)
	563	{
	564	UINT32 ret;
	565	RFIELDMAC(0x1ffff,0);
	566	return ((INT32)(ret << 15)) >> 15;
	567	}
	568
	569	UINT32 tms340x0_device::rfield_s_18(offs_t offset)
	570	{
	571	UINT32 ret;
	572	RFIELDMAC_BIG(0x3ffff,15);
	573	return ((INT32)(ret << 14)) >> 14;
	574	}
	575
	576	UINT32 tms340x0_device::rfield_s_19(offs_t offset)
	577	{
	578	UINT32 ret;
	579	RFIELDMAC_BIG(0x7ffff,14);
	580	return ((INT32)(ret << 13)) >> 13;
	581	}
	582
	583	UINT32 tms340x0_device::rfield_s_20(offs_t offset)
	584	{
	585	UINT32 ret;
	586	RFIELDMAC_BIG(0xfffff,13);
	587	return ((INT32)(ret << 12)) >> 12;
	588	}
	589
	590	UINT32 tms340x0_device::rfield_s_21(offs_t offset)
	591	{
	592	UINT32 ret;
	593	RFIELDMAC_BIG(0x1fffff,12);
	594	return ((INT32)(ret << 11)) >> 11;
	595	}
	596
	597	UINT32 tms340x0_device::rfield_s_22(offs_t offset)
	598	{
	599	UINT32 ret;
	600	RFIELDMAC_BIG(0x3fffff,11);
	601	return ((INT32)(ret << 10)) >> 10;
	602	}
	603
	604	UINT32 tms340x0_device::rfield_s_23(offs_t offset)
	605	{
	606	UINT32 ret;
	607	RFIELDMAC_BIG(0x7fffff,10);
	608	return ((INT32)(ret << 9)) >> 9;
	609	}
	610
	611	UINT32 tms340x0_device::rfield_s_24(offs_t offset)
	612	{
	613	UINT32 ret;
	614	RFIELDMAC_BIG(0xffffff,9);
	615	return ((INT32)(ret << 8)) >> 8;
	616	}
	617
	618	UINT32 tms340x0_device::rfield_s_25(offs_t offset)
	619	{
	620	UINT32 ret;
	621	RFIELDMAC_BIG(0x1ffffff,8);
	622	return ((INT32)(ret << 7)) >> 7;
	623	}
	624
	625	UINT32 tms340x0_device::rfield_s_26(offs_t offset)
	626	{
	627	UINT32 ret;
	628	RFIELDMAC_BIG(0x3ffffff,7);
	629	return ((INT32)(ret << 6)) >> 6;
	630	}
	631
	632	UINT32 tms340x0_device::rfield_s_27(offs_t offset)
	633	{
	634	UINT32 ret;
	635	RFIELDMAC_BIG(0x7ffffff,6);
	636	return ((INT32)(ret << 5)) >> 5;
	637	}
	638
	639	UINT32 tms340x0_device::rfield_s_28(offs_t offset)
	640	{
	641	UINT32 ret;
	642	RFIELDMAC_BIG(0xfffffff,5);
	643	return ((INT32)(ret << 4)) >> 4;
	644	}
	645
	646	UINT32 tms340x0_device::rfield_s_29(offs_t offset)
	647	{
	648	UINT32 ret;
	649	RFIELDMAC_BIG(0x1fffffff,4);
	650	return ((INT32)(ret << 3)) >> 3;
	651	}
	652
	653	UINT32 tms340x0_device::rfield_s_30(offs_t offset)
	654	{
	655	UINT32 ret;
	656	RFIELDMAC_BIG(0x3fffffff,3);
	657	return ((INT32)(ret << 2)) >> 2;
	658	}
	659
	660	UINT32 tms340x0_device::rfield_s_31(offs_t offset)
	661	{
	662	UINT32 ret;
	663	RFIELDMAC_BIG(0x7fffffff,2);
	664	return ((INT32)(ret << 1)) >> 1;
	665	}
	666
	667	const tms340x0_device::rfield_func tms340x0_device::s_rfield_functions[64] =
	668	{
	669	&tms340x0_device::rfield_32  , &tms340x0_device::rfield_z_01, &tms340x0_device::rfield_z_02, &tms340x0_device::rfield_z_03, &tms340x0_device::rfield_z_04, &tms340x0_device::rfield_z_05,
	670	&tms340x0_device::rfield_z_06, &tms340x0_device::rfield_z_07, &tms340x0_device::rfield_z_08, &tms340x0_device::rfield_z_09, &tms340x0_device::rfield_z_10, &tms340x0_device::rfield_z_11,
	671	&tms340x0_device::rfield_z_12, &tms340x0_device::rfield_z_13, &tms340x0_device::rfield_z_14, &tms340x0_device::rfield_z_15, &tms340x0_device::rfield_z_16, &tms340x0_device::rfield_z_17,
	672	&tms340x0_device::rfield_z_18, &tms340x0_device::rfield_z_19, &tms340x0_device::rfield_z_20, &tms340x0_device::rfield_z_21, &tms340x0_device::rfield_z_22, &tms340x0_device::rfield_z_23,
	673	&tms340x0_device::rfield_z_24, &tms340x0_device::rfield_z_25, &tms340x0_device::rfield_z_26, &tms340x0_device::rfield_z_27, &tms340x0_device::rfield_z_28, &tms340x0_device::rfield_z_29,
	674	&tms340x0_device::rfield_z_30, &tms340x0_device::rfield_z_31,
	675	&tms340x0_device::rfield_32  , &tms340x0_device::rfield_s_01, &tms340x0_device::rfield_s_02, &tms340x0_device::rfield_s_03, &tms340x0_device::rfield_s_04, &tms340x0_device::rfield_s_05,
	676	&tms340x0_device::rfield_s_06, &tms340x0_device::rfield_s_07, &tms340x0_device::rfield_s_08, &tms340x0_device::rfield_s_09, &tms340x0_device::rfield_s_10, &tms340x0_device::rfield_s_11,
	677	&tms340x0_device::rfield_s_12, &tms340x0_device::rfield_s_13, &tms340x0_device::rfield_s_14, &tms340x0_device::rfield_s_15, &tms340x0_device::rfield_s_16, &tms340x0_device::rfield_s_17,
	678	&tms340x0_device::rfield_s_18, &tms340x0_device::rfield_s_19, &tms340x0_device::rfield_s_20, &tms340x0_device::rfield_s_21, &tms340x0_device::rfield_s_22, &tms340x0_device::rfield_s_23,
	679	&tms340x0_device::rfield_s_24, &tms340x0_device::rfield_s_25, &tms340x0_device::rfield_s_26, &tms340x0_device::rfield_s_27, &tms340x0_device::rfield_s_28, &tms340x0_device::rfield_s_29,
	680	&tms340x0_device::rfield_s_30, &tms340x0_device::rfield_s_31
	681	};

trunk/src/devices/cpu/tms34010/34010gfx.cpp

r250251	r250252
1		// license:BSD-3-Clause
2		// copyright-holders:Alex Pasadyn,Zsolt Vasvari,Aaron Giles
3		/***************************************************************************
4
5		TMS34010: Portable Texas Instruments TMS34010 emulator
6
7		Copyright Alex Pasadyn/Zsolt Vasvari
8		Parts based on code by Aaron Giles
9
10		***************************************************************************/
11
12		#ifndef RECURSIVE_INCLUDE
13
14
15		#define LOG_GFX_OPS 0
16		#define LOGGFX(x) do { if (LOG_GFX_OPS && machine().input().code_pressed(KEYCODE_L)) logerror x; } while (0)
17
18
19		/* Graphics Instructions */
20
21		void tms340x0_device::line(UINT16 op)
22		{
23		if (!P_FLAG())
24		{
25		if (WINDOW_CHECKING() != 0 && WINDOW_CHECKING() != 3)
26		logerror("LINE XY  %08X - Window Checking Mode %d not supported\n", m_pc, WINDOW_CHECKING());
27
28		m_st |= STBIT_P;
29		TEMP() = (op & 0x80) ? 1 : 0;  /* boundary value depends on the algorithm */
30		LOGGFX(("%08X(%3d):LINE (%d,%d)-(%d,%d)\n", m_pc, m_screen->vpos(), DADDR_X(), DADDR_Y(), DADDR_X() + DYDX_X(), DADDR_Y() + DYDX_Y()));
31		}
32
33		if (COUNT() > 0)
34		{
35		INT16 x1,y1;
36
37		COUNT()--;
38		if (WINDOW_CHECKING() != 3 ||
39		(DADDR_X() >= WSTART_X() && DADDR_X() <= WEND_X() &&
40		DADDR_Y() >= WSTART_Y() && DADDR_Y() <= WEND_Y()))
41		WPIXEL(DXYTOL(DADDR_XY()),COLOR1());
42
43		if (SADDR() >= TEMP())
44		{
45		SADDR() += DYDX_Y()*2 - DYDX_X()*2;
46		x1 = INC1_X();
47		y1 = INC1_Y();
48		}
49		else
50		{
51		SADDR() += DYDX_Y()*2;
52		x1 = INC2_X();
53		y1 = INC2_Y();
54		}
55		DADDR_X() += x1;
56		DADDR_Y() += y1;
57
58		COUNT_UNKNOWN_CYCLES(2);
59		m_pc -= 0x10;  /* not done yet, check for interrupts and restart instruction */
60		return;
61		}
62		m_st &= ~STBIT_P;
63		}
64
65
66		/*
67		cases:
68		* window modes (0,1,2,3)
69		* boolean/arithmetic ops (16+6)
70		* transparency (on/off)
71		* plane masking
72		* directions (left->right/right->left, top->bottom/bottom->top)
73		*/
74
75		int tms340x0_device::apply_window(const char *inst_name,int srcbpp, UINT32 *srcaddr, XY *dst, int *dx, int *dy)
76		{
77		/* apply the window */
78		if (WINDOW_CHECKING() == 0)
79		return 0;
80		else
81		{
82		int sx = dst->x;
83		int sy = dst->y;
84		int ex = sx + *dx - 1;
85		int ey = sy + *dy - 1;
86		int diff, cycles = 3;
87
88		if (WINDOW_CHECKING() == 2)
89		logerror("%08x: %s apply_window window mode %d not supported!\n", pc(), inst_name, WINDOW_CHECKING());
90
91		CLR_V();
92		if (WINDOW_CHECKING() == 1)
93		SET_V_LOG(1);
94
95		/* clip X */
96		diff = WSTART_X() - sx;
97		if (diff > 0)
98		{
99		if (srcaddr)
100		*srcaddr += diff * srcbpp;
101		sx += diff;
102		SET_V_LOG(1);
103		}
104		diff = ex - WEND_X();
105		if (diff > 0)
106		{
107		ex -= diff;
108		SET_V_LOG(1);
109		}
110
111
112		/* clip Y */
113		diff = WSTART_Y() - sy;
114		if (diff > 0)
115		{
116		if (srcaddr)
117		*srcaddr += diff * m_convsp;
118
119		sy += diff;
120		SET_V_LOG(1);
121		}
122		diff = ey - WEND_Y();
123		if (diff > 0)
124		{
125		ey -= diff;
126		SET_V_LOG(1);
127		}
128
129		/* compute cycles */
130		if (*dx != ex - sx + 1 || *dy != ey - sy + 1)
131		{
132		if (dst->x != sx || dst->y != sy)
133		cycles += 11;
134		else
135		cycles += 3;
136		}
137		else if (dst->x != sx || dst->y != sy)
138		cycles += 7;
139
140		/* update the values */
141		dst->x = sx;
142		dst->y = sy;
143		*dx = ex - sx + 1;
144		*dy = ey - sy + 1;
145		return cycles;
146		}
147		}
148
149
150		/*******************************************************************
151
152		About the timing of gfx operations:
153
154		The 34010 manual lists a fairly intricate and accurate way of
155		computing cycle timings for graphics ops. However, there are
156		enough typos and misleading statements to make the reliability
157		of the timing info questionable.
158
159		So, to address this, here is a simplified approximate version
160		of the timing.
161
162		timing = setup + (srcwords * 2 + dstwords * gfxop) * rows
163
164		Each read access takes 2 cycles. Each gfx operation has
165		its own timing as specified in the 34010 manual. So, it's 2
166		cycles per read plus gfxop cycles per operation. Pretty
167		simple, no?
168
169		*******************************************************************/
170
171		int tms340x0_device::compute_fill_cycles(int left_partials, int right_partials, int full_words, int op_timing)
172		{
173		int dstwords;
174
175		if (left_partials) full_words += 1;
176		if (right_partials) full_words += 1;
177		dstwords = full_words;
178
179		return (dstwords * op_timing);
180		}
181
182		int tms340x0_device::compute_pixblt_cycles(int left_partials, int right_partials, int full_words, int op_timing)
183		{
184		int srcwords, dstwords;
185
186		if (left_partials) full_words += 1;
187		if (right_partials) full_words += 1;
188		srcwords = full_words;
189		dstwords = full_words;
190
191		return (dstwords * op_timing + srcwords * 2) + 2;
192		}
193
194		int tms340x0_device::compute_pixblt_b_cycles(int left_partials, int right_partials, int full_words, int rows, int op_timing, int bpp)
195		{
196		int srcwords, dstwords;
197
198		if (left_partials) full_words += 1;
199		if (right_partials) full_words += 1;
200		srcwords = full_words * bpp / 16;
201		dstwords = full_words;
202
203		return (dstwords * op_timing + srcwords * 2) * rows + 2;
204		}
205
206
207		/* Shift register handling */
208		void tms340x0_device::memory_w(address_space &space, offs_t offset,UINT16 data)
209		{
210		space.write_word(offset, data);
211		}
212
213		UINT16 tms340x0_device::memory_r(address_space &space, offs_t offset)
214		{
215		return space.read_word(offset);
216		}
217
218		void tms340x0_device::shiftreg_w(address_space &space, offs_t offset,UINT16 data)
219		{
220		if (!m_from_shiftreg_cb.isnull())
221		m_from_shiftreg_cb(space, (UINT32)(offset << 3) & ~15, &m_shiftreg[0]);
222		else
223		logerror("From ShiftReg function not set. PC = %08X\n", m_pc);
224		}
225
226		UINT16 tms340x0_device::shiftreg_r(address_space &space, offs_t offset)
227		{
228		if (!m_to_shiftreg_cb.isnull())
229		m_to_shiftreg_cb(space, (UINT32)(offset << 3) & ~15, &m_shiftreg[0]);
230		else
231		logerror("To ShiftReg function not set. PC = %08X\n", m_pc);
232		return m_shiftreg[0];
233		}
234
235		UINT16 tms340x0_device::dummy_shiftreg_r(address_space &space, offs_t offset)
236		{
237		return m_shiftreg[0];
238		}
239
240
241
242		/* Pixel operations */
243		UINT32 tms340x0_device::pixel_op00(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return srcpix; }
244		UINT32 tms340x0_device::pixel_op01(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return srcpix & dstpix; }
245		UINT32 tms340x0_device::pixel_op02(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return srcpix & ~dstpix; }
246		UINT32 tms340x0_device::pixel_op03(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return 0; }
247		UINT32 tms340x0_device::pixel_op04(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (srcpix | ~dstpix) & mask; }
248		UINT32 tms340x0_device::pixel_op05(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return ~(srcpix ^ dstpix) & mask; }
249		UINT32 tms340x0_device::pixel_op06(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return ~dstpix & mask; }
250		UINT32 tms340x0_device::pixel_op07(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return ~(srcpix | dstpix) & mask; }
251		UINT32 tms340x0_device::pixel_op08(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (srcpix | dstpix) & mask; }
252		UINT32 tms340x0_device::pixel_op09(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return dstpix & mask; }
253		UINT32 tms340x0_device::pixel_op10(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (srcpix ^ dstpix) & mask; }
254		UINT32 tms340x0_device::pixel_op11(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (~srcpix & dstpix) & mask; }
255		UINT32 tms340x0_device::pixel_op12(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return mask; }
256		UINT32 tms340x0_device::pixel_op13(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (~srcpix & dstpix) & mask; }
257		UINT32 tms340x0_device::pixel_op14(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return ~(srcpix & dstpix) & mask; }
258		UINT32 tms340x0_device::pixel_op15(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return srcpix ^ mask; }
259		UINT32 tms340x0_device::pixel_op16(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (srcpix + dstpix) & mask; }
260		UINT32 tms340x0_device::pixel_op17(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { INT32 tmp = srcpix + (dstpix & mask); return (tmp > mask) ? mask : tmp; }
261		UINT32 tms340x0_device::pixel_op18(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (dstpix - srcpix) & mask; }
262		UINT32 tms340x0_device::pixel_op19(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { INT32 tmp = srcpix - (dstpix & mask); return (tmp < 0) ? 0 : tmp; }
263		UINT32 tms340x0_device::pixel_op20(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { dstpix &= mask; return (srcpix > dstpix) ? srcpix : dstpix; }
264		UINT32 tms340x0_device::pixel_op21(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { dstpix &= mask; return (srcpix < dstpix) ? srcpix : dstpix; }
265
266		const tms340x0_device::pixel_op_func tms340x0_device::s_pixel_op_table[32] =
267		{
268		&tms340x0_device::pixel_op00, &tms340x0_device::pixel_op01, &tms340x0_device::pixel_op02, &tms340x0_device::pixel_op03, &tms340x0_device::pixel_op04, &tms340x0_device::pixel_op05, &tms340x0_device::pixel_op06, &tms340x0_device::pixel_op07,
269		&tms340x0_device::pixel_op08, &tms340x0_device::pixel_op09, &tms340x0_device::pixel_op10, &tms340x0_device::pixel_op11, &tms340x0_device::pixel_op12, &tms340x0_device::pixel_op13, &tms340x0_device::pixel_op14, &tms340x0_device::pixel_op15,
270		&tms340x0_device::pixel_op16, &tms340x0_device::pixel_op17, &tms340x0_device::pixel_op18, &tms340x0_device::pixel_op19, &tms340x0_device::pixel_op20, &tms340x0_device::pixel_op21, &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00,
271		&tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00
272		};
273		const UINT8 tms340x0_device::s_pixel_op_timing_table[33] =
274		{
275		2,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,5,5,6,5,5,2,2,2,2,2,2,2,2,2,2,2
276		};
277
278
279		/* tables */
280		const tms340x0_device::pixblt_op_func tms340x0_device::s_pixblt_op_table[] =
281		{
282		&tms340x0_device::pixblt_1_op0,   &tms340x0_device::pixblt_1_op0_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
283		&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
284		&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
285		&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
286		&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
287		&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
288		&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
289		&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
290		&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
291		&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
292		&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
293		&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
294		&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
295		&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
296		&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
297		&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
298
299		&tms340x0_device::pixblt_2_op0,   &tms340x0_device::pixblt_2_op0_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
300		&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
301		&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
302		&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
303		&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
304		&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
305		&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
306		&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
307		&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
308		&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
309		&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
310		&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
311		&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
312		&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
313		&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
314		&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
315
316		&tms340x0_device::pixblt_4_op0,   &tms340x0_device::pixblt_4_op0_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
317		&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
318		&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
319		&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
320		&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
321		&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
322		&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
323		&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
324		&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
325		&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
326		&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
327		&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
328		&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
329		&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
330		&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
331		&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
332
333		&tms340x0_device::pixblt_8_op0,   &tms340x0_device::pixblt_8_op0_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
334		&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
335		&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
336		&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
337		&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
338		&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
339		&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
340		&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
341		&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
342		&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
343		&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
344		&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
345		&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
346		&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
347		&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
348		&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
349
350		&tms340x0_device::pixblt_16_op0,  &tms340x0_device::pixblt_16_op0_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
351		&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
352		&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
353		&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
354		&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
355		&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
356		&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
357		&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
358		&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
359		&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
360		&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
361		&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
362		&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
363		&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
364		&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
365		&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans
366		};
367
368		const tms340x0_device::pixblt_op_func tms340x0_device::s_pixblt_r_op_table[] =
369		{
370		&tms340x0_device::pixblt_r_1_op0, &tms340x0_device::pixblt_r_1_op0_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
371		&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
372		&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
373		&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
374		&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
375		&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
376		&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
377		&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
378		&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
379		&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
380		&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
381		&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
382		&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
383		&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
384		&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
385		&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
386
387		&tms340x0_device::pixblt_r_2_op0, &tms340x0_device::pixblt_r_2_op0_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
388		&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
389		&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
390		&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
391		&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
392		&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
393		&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
394		&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
395		&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
396		&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
397		&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
398		&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
399		&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
400		&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
401		&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
402		&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
403
404		&tms340x0_device::pixblt_r_4_op0, &tms340x0_device::pixblt_r_4_op0_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
405		&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
406		&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
407		&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
408		&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
409		&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
410		&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
411		&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
412		&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
413		&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
414		&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
415		&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
416		&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
417		&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
418		&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
419		&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
420
421		&tms340x0_device::pixblt_r_8_op0, &tms340x0_device::pixblt_r_8_op0_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
422		&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
423		&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
424		&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
425		&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
426		&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
427		&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
428		&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
429		&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
430		&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
431		&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
432		&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
433		&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
434		&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
435		&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
436		&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
437
438		&tms340x0_device::pixblt_r_16_op0,&tms340x0_device::pixblt_r_16_op0_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
439		&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
440		&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
441		&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
442		&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
443		&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
444		&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
445		&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
446		&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
447		&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
448		&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
449		&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
450		&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
451		&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
452		&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
453		&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans
454		};
455
456		const tms340x0_device::pixblt_b_op_func tms340x0_device::s_pixblt_b_op_table[] =
457		{
458		&tms340x0_device::pixblt_b_1_op0, &tms340x0_device::pixblt_b_1_op0_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
459		&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
460		&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
461		&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
462		&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
463		&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
464		&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
465		&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
466		&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
467		&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
468		&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
469		&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
470		&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
471		&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
472		&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
473		&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
474
475		&tms340x0_device::pixblt_b_2_op0, &tms340x0_device::pixblt_b_2_op0_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
476		&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
477		&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
478		&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
479		&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
480		&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
481		&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
482		&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
483		&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
484		&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
485		&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
486		&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
487		&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
488		&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
489		&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
490		&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
491
492		&tms340x0_device::pixblt_b_4_op0, &tms340x0_device::pixblt_b_4_op0_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
493		&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
494		&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
495		&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
496		&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
497		&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
498		&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
499		&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
500		&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
501		&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
502		&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
503		&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
504		&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
505		&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
506		&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
507		&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
508
509		&tms340x0_device::pixblt_b_8_op0, &tms340x0_device::pixblt_b_8_op0_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
510		&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
511		&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
512		&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
513		&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
514		&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
515		&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
516		&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
517		&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
518		&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
519		&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
520		&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
521		&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
522		&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
523		&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
524		&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
525
526		&tms340x0_device::pixblt_b_16_op0,&tms340x0_device::pixblt_b_16_op0_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
527		&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
528		&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
529		&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
530		&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
531		&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
532		&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
533		&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
534		&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
535		&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
536		&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
537		&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
538		&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
539		&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
540		&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
541		&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans
542		};
543
544		const tms340x0_device::pixblt_b_op_func tms340x0_device::s_fill_op_table[] =
545		{
546		&tms340x0_device::fill_1_op0,     &tms340x0_device::fill_1_op0_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
547		&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
548		&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
549		&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
550		&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
551		&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
552		&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
553		&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
554		&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
555		&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
556		&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
557		&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
558		&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
559		&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
560		&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
561		&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
562
563		&tms340x0_device::fill_2_op0,     &tms340x0_device::fill_2_op0_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
564		&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
565		&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
566		&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
567		&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
568		&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
569		&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
570		&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
571		&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
572		&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
573		&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
574		&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
575		&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
576		&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
577		&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
578		&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
579
580		&tms340x0_device::fill_4_op0,     &tms340x0_device::fill_4_op0_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
581		&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
582		&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
583		&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
584		&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
585		&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
586		&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
587		&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
588		&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
589		&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
590		&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
591		&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
592		&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
593		&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
594		&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
595		&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
596
597		&tms340x0_device::fill_8_op0,     &tms340x0_device::fill_8_op0_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
598		&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
599		&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
600		&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
601		&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
602		&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
603		&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
604		&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
605		&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
606		&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
607		&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
608		&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
609		&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
610		&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
611		&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
612		&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
613
614		&tms340x0_device::fill_16_op0,    &tms340x0_device::fill_16_op0_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
615		&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
616		&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
617		&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
618		&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
619		&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
620		&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
621		&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
622		&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
623		&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
624		&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
625		&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
626		&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
627		&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
628		&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
629		&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans
630		};
631
632
633		#define RECURSIVE_INCLUDE
634
635		/* non-transparent replace ops */
636		#define PIXEL_OP(src, mask, pixel)      pixel = pixel
637		#define PIXEL_OP_TIMING                 2
638		#define PIXEL_OP_REQUIRES_SOURCE        0
639		#define TRANSPARENCY                    0
640
641		/* 1bpp cases */
642		#define BITS_PER_PIXEL                  1
643		#define FUNCTION_NAME(base)             base##_1_op0
644		#include "34010gfx.cpp"
645		#undef FUNCTION_NAME
646		#undef BITS_PER_PIXEL
647
648		/* 2bpp cases */
649		#define BITS_PER_PIXEL                  2
650		#define FUNCTION_NAME(base)             base##_2_op0
651		#include "34010gfx.cpp"
652		#undef FUNCTION_NAME
653		#undef BITS_PER_PIXEL
654
655		/* 4bpp cases */
656		#define BITS_PER_PIXEL                  4
657		#define FUNCTION_NAME(base)             base##_4_op0
658		#include "34010gfx.cpp"
659		#undef FUNCTION_NAME
660		#undef BITS_PER_PIXEL
661
662		/* 8bpp cases */
663		#define BITS_PER_PIXEL                  8
664		#define FUNCTION_NAME(base)             base##_8_op0
665		#include "34010gfx.cpp"
666		#undef FUNCTION_NAME
667		#undef BITS_PER_PIXEL
668
669		/* 16bpp cases */
670		#define BITS_PER_PIXEL                  16
671		#define FUNCTION_NAME(base)             base##_16_op0
672		#include "34010gfx.cpp"
673		#undef FUNCTION_NAME
674		#undef BITS_PER_PIXEL
675
676		#undef TRANSPARENCY
677		#undef PIXEL_OP_REQUIRES_SOURCE
678		#undef PIXEL_OP_TIMING
679		#undef PIXEL_OP
680
681
682		#define PIXEL_OP(src, mask, pixel)      pixel = (this->*m_pixel_op)(src, mask, pixel)
683		#define PIXEL_OP_TIMING                 m_pixel_op_timing
684		#define PIXEL_OP_REQUIRES_SOURCE        1
685		#define TRANSPARENCY                    0
686
687		/* 1bpp cases */
688		#define BITS_PER_PIXEL                  1
689		#define FUNCTION_NAME(base)             base##_1_opx
690		#include "34010gfx.cpp"
691		#undef FUNCTION_NAME
692		#undef BITS_PER_PIXEL
693
694		/* 2bpp cases */
695		#define BITS_PER_PIXEL                  2
696		#define FUNCTION_NAME(base)             base##_2_opx
697		#include "34010gfx.cpp"
698		#undef FUNCTION_NAME
699		#undef BITS_PER_PIXEL
700
701		/* 4bpp cases */
702		#define BITS_PER_PIXEL                  4
703		#define FUNCTION_NAME(base)             base##_4_opx
704		#include "34010gfx.cpp"
705		#undef FUNCTION_NAME
706		#undef BITS_PER_PIXEL
707
708		/* 8bpp cases */
709		#define BITS_PER_PIXEL                  8
710		#define FUNCTION_NAME(base)             base##_8_opx
711		#include "34010gfx.cpp"
712		#undef FUNCTION_NAME
713		#undef BITS_PER_PIXEL
714
715		/* 16bpp cases */
716		#define BITS_PER_PIXEL                  16
717		#define FUNCTION_NAME(base)             base##_16_opx
718		#include "34010gfx.cpp"
719		#undef FUNCTION_NAME
720		#undef BITS_PER_PIXEL
721
722		#undef TRANSPARENCY
723		#undef PIXEL_OP_REQUIRES_SOURCE
724		#undef PIXEL_OP_TIMING
725		#undef PIXEL_OP
726
727
728		/* transparent replace ops */
729		#define PIXEL_OP(src, mask, pixel)      pixel = pixel
730		#define PIXEL_OP_REQUIRES_SOURCE        0
731		#define PIXEL_OP_TIMING                 4
732		#define TRANSPARENCY                    1
733
734		/* 1bpp cases */
735		#define BITS_PER_PIXEL                  1
736		#define FUNCTION_NAME(base)             base##_1_op0_trans
737		#include "34010gfx.cpp"
738		#undef FUNCTION_NAME
739		#undef BITS_PER_PIXEL
740
741		/* 2bpp cases */
742		#define BITS_PER_PIXEL                  2
743		#define FUNCTION_NAME(base)             base##_2_op0_trans
744		#include "34010gfx.cpp"
745		#undef FUNCTION_NAME
746		#undef BITS_PER_PIXEL
747
748		/* 4bpp cases */
749		#define BITS_PER_PIXEL                  4
750		#define FUNCTION_NAME(base)             base##_4_op0_trans
751		#include "34010gfx.cpp"
752		#undef FUNCTION_NAME
753		#undef BITS_PER_PIXEL
754
755		/* 8bpp cases */
756		#define BITS_PER_PIXEL                  8
757		#define FUNCTION_NAME(base)             base##_8_op0_trans
758		#include "34010gfx.cpp"
759		#undef FUNCTION_NAME
760		#undef BITS_PER_PIXEL
761
762		/* 16bpp cases */
763		#define BITS_PER_PIXEL                  16
764		#define FUNCTION_NAME(base)             base##_16_op0_trans
765		#include "34010gfx.cpp"
766		#undef FUNCTION_NAME
767		#undef BITS_PER_PIXEL
768
769		#undef TRANSPARENCY
770		#undef PIXEL_OP_REQUIRES_SOURCE
771		#undef PIXEL_OP_TIMING
772		#undef PIXEL_OP
773
774
775		#define PIXEL_OP(src, mask, pixel)      pixel = (this->*m_pixel_op)(src, mask, pixel)
776		#define PIXEL_OP_REQUIRES_SOURCE        1
777		#define PIXEL_OP_TIMING                 (2+m_pixel_op_timing)
778		#define TRANSPARENCY                    1
779
780		/* 1bpp cases */
781		#define BITS_PER_PIXEL                  1
782		#define FUNCTION_NAME(base)             base##_1_opx_trans
783		#include "34010gfx.cpp"
784		#undef FUNCTION_NAME
785		#undef BITS_PER_PIXEL
786
787		/* 2bpp cases */
788		#define BITS_PER_PIXEL                  2
789		#define FUNCTION_NAME(base)             base##_2_opx_trans
790		#include "34010gfx.cpp"
791		#undef FUNCTION_NAME
792		#undef BITS_PER_PIXEL
793
794		/* 4bpp cases */
795		#define BITS_PER_PIXEL                  4
796		#define FUNCTION_NAME(base)             base##_4_opx_trans
797		#include "34010gfx.cpp"
798		#undef FUNCTION_NAME
799		#undef BITS_PER_PIXEL
800
801		/* 8bpp cases */
802		#define BITS_PER_PIXEL                  8
803		#define FUNCTION_NAME(base)             base##_8_opx_trans
804		#include "34010gfx.cpp"
805		#undef FUNCTION_NAME
806		#undef BITS_PER_PIXEL
807
808		/* 16bpp cases */
809		#define BITS_PER_PIXEL                  16
810		#define FUNCTION_NAME(base)             base##_16_opx_trans
811		#include "34010gfx.cpp"
812		#undef FUNCTION_NAME
813		#undef BITS_PER_PIXEL
814
815		#undef TRANSPARENCY
816		#undef PIXEL_OP_REQUIRES_SOURCE
817		#undef PIXEL_OP_TIMING
818		#undef PIXEL_OP
819
820		static const UINT8 pixelsize_lookup[32] =
821		{
822		0,0,1,1,2,2,2,2,3,3,3,3,3,3,3,3,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
823		};
824
825
826		void tms340x0_device::pixblt_b_l(UINT16 op)
827		{
828		int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f];
829		int trans = (IOREG(REG_CONTROL) & 0x20) >> 5;
830		int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f;
831		int ix = trans | (rop << 1) | (psize << 6);
832		if (!P_FLAG()) LOGGFX(("%08X(%3d):PIXBLT B,L (%dx%d) depth=%d\n", m_pc, m_screen->vpos(), DYDX_X(), DYDX_Y(), IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
833		m_pixel_op = s_pixel_op_table[rop];
834		m_pixel_op_timing = s_pixel_op_timing_table[rop];
835		(this->*s_pixblt_b_op_table[ix])(1);
836		}
837
838		void tms340x0_device::pixblt_b_xy(UINT16 op)
839		{
840		int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f];
841		int trans = (IOREG(REG_CONTROL) & 0x20) >> 5;
842		int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f;
843		int ix = trans | (rop << 1) | (psize << 6);
844		if (!P_FLAG()) LOGGFX(("%08X(%3d):PIXBLT B,XY (%d,%d) (%dx%d) depth=%d\n", m_pc, m_screen->vpos(), DADDR_X(), DADDR_Y(), DYDX_X(), DYDX_Y(), IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
845		m_pixel_op = s_pixel_op_table[rop];
846		m_pixel_op_timing = s_pixel_op_timing_table[rop];
847		(this->*s_pixblt_b_op_table[ix])(0);
848		}
849
850		void tms340x0_device::pixblt_l_l(UINT16 op)
851		{
852		int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f];
853		int trans = (IOREG(REG_CONTROL) & 0x20) >> 5;
854		int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f;
855		int pbh = (IOREG(REG_CONTROL) >> 8) & 1;
856		int ix = trans | (rop << 1) | (psize << 6);
857		if (!P_FLAG()) LOGGFX(("%08X(%3d):PIXBLT L,L (%dx%d) depth=%d\n", m_pc, m_screen->vpos(), DYDX_X(), DYDX_Y(), IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
858		m_pixel_op = s_pixel_op_table[rop];
859		m_pixel_op_timing = s_pixel_op_timing_table[rop];
860		if (!pbh)
861		(this->*s_pixblt_op_table[ix])(1, 1);
862		else
863		(this->*s_pixblt_r_op_table[ix])(1, 1);
864		}
865
866		void tms340x0_device::pixblt_l_xy(UINT16 op)
867		{
868		int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f];
869		int trans = (IOREG(REG_CONTROL) & 0x20) >> 5;
870		int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f;
871		int pbh = (IOREG(REG_CONTROL) >> 8) & 1;
872		int ix = trans | (rop << 1) | (psize << 6);
873		if (!P_FLAG()) LOGGFX(("%08X(%3d):PIXBLT L,XY (%d,%d) (%dx%d) depth=%d\n", m_pc, m_screen->vpos(), DADDR_X(), DADDR_Y(), DYDX_X(), DYDX_Y(), IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
874		m_pixel_op = s_pixel_op_table[rop];
875		m_pixel_op_timing = s_pixel_op_timing_table[rop];
876		if (!pbh)
877		(this->*s_pixblt_op_table[ix])(1, 0);
878		else
879		(this->*s_pixblt_r_op_table[ix])(1, 0);
880		}
881
882		void tms340x0_device::pixblt_xy_l(UINT16 op)
883		{
884		int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f];
885		int trans = (IOREG(REG_CONTROL) & 0x20) >> 5;
886		int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f;
887		int pbh = (IOREG(REG_CONTROL) >> 8) & 1;
888		int ix = trans | (rop << 1) | (psize << 6);
889		if (!P_FLAG()) LOGGFX(("%08X(%3d):PIXBLT XY,L (%dx%d) depth=%d\n", m_pc, m_screen->vpos(), DYDX_X(), DYDX_Y(), IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
890		m_pixel_op = s_pixel_op_table[rop];
891		m_pixel_op_timing = s_pixel_op_timing_table[rop];
892		if (!pbh)
893		(this->*s_pixblt_op_table[ix])(0, 1);
894		else
895		(this->*s_pixblt_r_op_table[ix])(0, 1);
896		}
897
898		void tms340x0_device::pixblt_xy_xy(UINT16 op)
899		{
900		int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f];
901		int trans = (IOREG(REG_CONTROL) & 0x20) >> 5;
902		int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f;
903		int pbh = (IOREG(REG_CONTROL) >> 8) & 1;
904		int ix = trans | (rop << 1) | (psize << 6);
905		if (!P_FLAG()) LOGGFX(("%08X(%3d):PIXBLT XY,XY (%dx%d) depth=%d\n", m_pc, m_screen->vpos(), DYDX_X(), DYDX_Y(), IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
906		m_pixel_op = s_pixel_op_table[rop];
907		m_pixel_op_timing = s_pixel_op_timing_table[rop];
908		if (!pbh)
909		(this->*s_pixblt_op_table[ix])(0, 0);
910		else
911		(this->*s_pixblt_r_op_table[ix])(0, 0);
912		}
913
914		void tms340x0_device::fill_l(UINT16 op)
915		{
916		int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f];
917		int trans = (IOREG(REG_CONTROL) & 0x20) >> 5;
918		int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f;
919		int ix = trans | (rop << 1) | (psize << 6);
920		if (!P_FLAG()) LOGGFX(("%08X(%3d):FILL L (%dx%d) depth=%d\n", m_pc, m_screen->vpos(), DYDX_X(), DYDX_Y(), IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
921		m_pixel_op = s_pixel_op_table[rop];
922		m_pixel_op_timing = s_pixel_op_timing_table[rop];
923		(this->*s_fill_op_table[ix])(1);
924		}
925
926		void tms340x0_device::fill_xy(UINT16 op)
927		{
928		int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f];
929		int trans = (IOREG(REG_CONTROL) & 0x20) >> 5;
930		int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f;
931		int ix = trans | (rop << 1) | (psize << 6);
932		if (!P_FLAG()) LOGGFX(("%08X(%3d):FILL XY (%d,%d) (%dx%d) depth=%d\n", m_pc, m_screen->vpos(), DADDR_X(), DADDR_Y(), DYDX_X(), DYDX_Y(), IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
933		m_pixel_op = s_pixel_op_table[rop];
934		m_pixel_op_timing = s_pixel_op_timing_table[rop];
935		(this->*s_fill_op_table[ix])(0);
936		}
937
938
939		#else
940
941
942		#undef PIXELS_PER_WORD
943		#undef PIXEL_MASK
944
945		#define PIXELS_PER_WORD (16 / BITS_PER_PIXEL)
946		#define PIXEL_MASK ((1 << BITS_PER_PIXEL) - 1)
947
948		void FUNCTION_NAME(tms340x0_device::pixblt)(int src_is_linear, int dst_is_linear)
949		{
950		/* if this is the first time through, perform the operation */
951		if (!P_FLAG())
952		{
953		int dx, dy, x, y, /*words,*/ yreverse;
954		word_write_func word_write;
955		word_read_func word_read;
956		UINT32 readwrites = 0;
957		UINT32 saddr, daddr;
958		XY dstxy = { 0 };
959
960		/* determine read/write functions */
961		if (IOREG(REG_DPYCTL) & 0x0800)
962		{
963		word_write = &tms340x0_device::shiftreg_w;
964		word_read = &tms340x0_device::shiftreg_r;
965		}
966		else
967		{
968		word_write = &tms340x0_device::memory_w;
969		word_read = &tms340x0_device::memory_r;
970		}
971
972		/* compute the starting addresses */
973		saddr = src_is_linear ? SADDR() : SXYTOL(SADDR_XY());
974
975		/* compute the bounds of the operation */
976		dx = (INT16)DYDX_X();
977		dy = (INT16)DYDX_Y();
978
979		/* apply the window for non-linear destinations */
980		m_gfxcycles = 7 + (src_is_linear ? 0 : 2);
981		if (!dst_is_linear)
982		{
983		dstxy = DADDR_XY();
984		m_gfxcycles += 2 + (!src_is_linear) + apply_window("PIXBLT", BITS_PER_PIXEL, &saddr, &dstxy, &dx, &dy);
985		daddr = DXYTOL(dstxy);
986		}
987		else
988		daddr = DADDR();
989		daddr &= ~(BITS_PER_PIXEL - 1);
990		LOGGFX(("  saddr=%08X daddr=%08X sptch=%08X dptch=%08X\n", saddr, daddr, SPTCH(), DPTCH()));
991
992		/* bail if we're clipped */
993		if (dx <= 0 || dy <= 0)
994		return;
995
996		/* window mode 1: just return and interrupt if we are within the window */
997		if (WINDOW_CHECKING() == 1 && !dst_is_linear)
998		{
999		CLR_V();
1000		DADDR_XY() = dstxy;
1001		DYDX_X() = dx;
1002		DYDX_Y() = dy;
1003		IOREG(REG_INTPEND) |= TMS34010_WV;
1004		check_interrupt();
1005		return;
1006		}
1007
1008		/* handle flipping the addresses */
1009		yreverse = (IOREG(REG_CONTROL) >> 9) & 1;
1010		if (!src_is_linear || !dst_is_linear)
1011		{
1012		if (yreverse)
1013		{
1014		saddr += (dy - 1) * m_convsp;
1015		daddr += (dy - 1) * m_convdp;
1016		}
1017		}
1018
1019		m_st |= STBIT_P;
1020
1021		/* loop over rows */
1022		for (y = 0; y < dy; y++)
1023		{
1024		UINT32 srcwordaddr = saddr >> 4;
1025		UINT32 dstwordaddr = daddr >> 4;
1026		UINT8 srcbit = saddr & 15;
1027		UINT8 dstbit = daddr & 15;
1028		UINT32 srcword, dstword = 0;
1029
1030		/* fetch the initial source word */
1031		srcword = (this->*word_read)(*m_program, srcwordaddr++ << 1);
1032		readwrites++;
1033
1034		/* fetch the initial dest word */
1035		if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY || (daddr & 0x0f) != 0)
1036		{
1037		dstword = (this->*word_read)(*m_program, dstwordaddr << 1);
1038		readwrites++;
1039		}
1040
1041		/* loop over pixels */
1042		for (x = 0; x < dx; x++)
1043		{
1044		UINT32 dstmask;
1045		UINT32 pixel;
1046
1047		/* fetch more words if necessary */
1048		if (srcbit + BITS_PER_PIXEL > 16)
1049		{
1050		srcword |= (this->*word_read)(*m_program, srcwordaddr++ << 1) << 16;
1051		readwrites++;
1052		}
1053
1054		/* extract pixel from source */
1055		pixel = (srcword >> srcbit) & PIXEL_MASK;
1056		srcbit += BITS_PER_PIXEL;
1057		if (srcbit > 16)
1058		{
1059		srcbit -= 16;
1060		srcword >>= 16;
1061		}
1062
1063		/* fetch additional destination word if necessary */
1064		if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY)
1065		if (dstbit + BITS_PER_PIXEL > 16)
1066		{
1067		dstword |= (this->*word_read)(*m_program, (dstwordaddr + 1) << 1) << 16;
1068		readwrites++;
1069		}
1070
1071		/* apply pixel operations */
1072		pixel <<= dstbit;
1073		dstmask = PIXEL_MASK << dstbit;
1074		PIXEL_OP(dstword, dstmask, pixel);
1075		if (!TRANSPARENCY || pixel != 0)
1076		dstword = (dstword & ~dstmask) | pixel;
1077
1078		/* flush destination words */
1079		dstbit += BITS_PER_PIXEL;
1080		if (dstbit > 16)
1081		{
1082		(this->*word_write)(*m_program, dstwordaddr++ << 1, dstword);
1083		readwrites++;
1084		dstbit -= 16;
1085		dstword >>= 16;
1086		}
1087		}
1088
1089		/* flush any remaining words */
1090		if (dstbit > 0)
1091		{
1092		/* if we're right-partial, read and mask the remaining bits */
1093		if (dstbit != 16)
1094		{
1095		UINT16 origdst = (this->*word_read)(*m_program, dstwordaddr << 1);
1096		UINT16 mask = 0xffff << dstbit;
1097		dstword = (dstword & ~mask) | (origdst & mask);
1098		readwrites++;
1099		}
1100
1101		(this->*word_write)(*m_program, dstwordaddr++ << 1, dstword);
1102		readwrites++;
1103		}
1104
1105
1106
1107		#if 0
1108		int left_partials, right_partials, full_words, bitshift, bitshift_alt;
1109		UINT16 srcword, srcmask, dstword, dstmask, pixel;
1110		UINT32 swordaddr, dwordaddr;
1111
1112		/* determine the bit shift to get from source to dest */
1113		bitshift = ((daddr & 15) - (saddr & 15)) & 15;
1114		bitshift_alt = (16 - bitshift) & 15;
1115
1116		/* how many left and right partial pixels do we have? */
1117		left_partials = (PIXELS_PER_WORD - ((daddr & 15) / BITS_PER_PIXEL)) & (PIXELS_PER_WORD - 1);
1118		right_partials = ((daddr + dx * BITS_PER_PIXEL) & 15) / BITS_PER_PIXEL;
1119		full_words = dx - left_partials - right_partials;
1120		if (full_words < 0)
1121		left_partials = dx, right_partials = full_words = 0;
1122		else
1123		full_words /= PIXELS_PER_WORD;
1124
1125		/* compute cycles */
1126		m_gfxcycles += compute_pixblt_cycles(left_partials, right_partials, full_words, PIXEL_OP_TIMING);
1127
1128		/* use word addresses each row */
1129		swordaddr = saddr >> 4;
1130		dwordaddr = daddr >> 4;
1131
1132		/* fetch the initial source word */
1133		srcword = (this->*word_read)(*m_program, swordaddr++ << 1);
1134		srcmask = PIXEL_MASK << (saddr & 15);
1135
1136		/* handle the left partial word */
1137		if (left_partials != 0)
1138		{
1139		/* fetch the destination word */
1140		dstword = (this->*word_read)(*m_program, dwordaddr << 1);
1141		dstmask = PIXEL_MASK << (daddr & 15);
1142
1143		/* loop over partials */
1144		for (x = 0; x < left_partials; x++)
1145		{
1146		/* fetch another word if necessary */
1147		if (srcmask == 0)
1148		{
1149		srcword = (this->*word_read)(*m_program, swordaddr++ << 1);
1150		srcmask = PIXEL_MASK;
1151		}
1152
1153		/* process the pixel */
1154		pixel = srcword & srcmask;
1155		if (dstmask > srcmask)
1156		pixel <<= bitshift;
1157		else
1158		pixel >>= bitshift_alt;
1159		PIXEL_OP(dstword, dstmask, pixel);
1160		if (!TRANSPARENCY || pixel != 0)
1161		dstword = (dstword & ~dstmask) | pixel;
1162
1163		/* update the source */
1164		srcmask <<= BITS_PER_PIXEL;
1165
1166		/* update the destination */
1167		dstmask <<= BITS_PER_PIXEL;
1168		}
1169
1170		/* write the result */
1171		(this->*word_write)(*m_program, dwordaddr++ << 1, dstword);
1172		}
1173
1174		/* loop over full words */
1175		for (words = 0; words < full_words; words++)
1176		{
1177		/* fetch the destination word (if necessary) */
1178		if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY)
1179		dstword = (this->*word_read)(*m_program, dwordaddr << 1);
1180		else
1181		dstword = 0;
1182		dstmask = PIXEL_MASK;
1183
1184		/* loop over partials */
1185		for (x = 0; x < PIXELS_PER_WORD; x++)
1186		{
1187		/* fetch another word if necessary */
1188		if (srcmask == 0)
1189		{
1190		srcword = (this->*word_read)(*m_program, swordaddr++ << 1);
1191		srcmask = PIXEL_MASK;
1192		}
1193
1194		/* process the pixel */
1195		pixel = srcword & srcmask;
1196		if (dstmask > srcmask)
1197		pixel <<= bitshift;
1198		else
1199		pixel >>= bitshift_alt;
1200		PIXEL_OP(dstword, dstmask, pixel);
1201		if (!TRANSPARENCY || pixel != 0)
1202		dstword = (dstword & ~dstmask) | pixel;
1203
1204		/* update the source */
1205		srcmask <<= BITS_PER_PIXEL;
1206
1207		/* update the destination */
1208		dstmask <<= BITS_PER_PIXEL;
1209		}
1210
1211		/* write the result */
1212		(this->*word_write)(*m_program, dwordaddr++ << 1, dstword);
1213		}
1214
1215		/* handle the right partial word */
1216		if (right_partials != 0)
1217		{
1218		/* fetch the destination word */
1219		dstword = (this->*word_read)(*m_program, dwordaddr << 1);
1220		dstmask = PIXEL_MASK;
1221
1222		/* loop over partials */
1223		for (x = 0; x < right_partials; x++)
1224		{
1225		/* fetch another word if necessary */
1226		if (srcmask == 0)
1227		{
1228		LOGGFX(("  right fetch @ %08x\n", swordaddr));
1229		srcword = (this->*word_read)(*m_program, swordaddr++ << 1);
1230		srcmask = PIXEL_MASK;
1231		}
1232
1233		/* process the pixel */
1234		pixel = srcword & srcmask;
1235		if (dstmask > srcmask)
1236		pixel <<= bitshift;
1237		else
1238		pixel >>= bitshift_alt;
1239		PIXEL_OP(dstword, dstmask, pixel);
1240		if (!TRANSPARENCY || pixel != 0)
1241		dstword = (dstword & ~dstmask) | pixel;
1242
1243		/* update the source */
1244		srcmask <<= BITS_PER_PIXEL;
1245
1246		/* update the destination */
1247		dstmask <<= BITS_PER_PIXEL;
1248		}
1249
1250		/* write the result */
1251		(this->*word_write)(*m_program, dwordaddr++ << 1, dstword);
1252		}
1253		#endif
1254
1255		/* update for next row */
1256		if (!yreverse)
1257		{
1258		saddr += SPTCH();
1259		daddr += DPTCH();
1260		}
1261		else
1262		{
1263		saddr -= SPTCH();
1264		daddr -= DPTCH();
1265		}
1266		}
1267
1268		m_gfxcycles += readwrites * 2 + dx * dy * (PIXEL_OP_TIMING - 2);
1269
1270		LOGGFX(("  (%d cycles)\n", m_gfxcycles));
1271		}
1272
1273		/* eat cycles */
1274		if (m_gfxcycles > m_icount)
1275		{
1276		m_gfxcycles -= m_icount;
1277		m_icount = 0;
1278		m_pc -= 0x10;
1279		}
1280		else
1281		{
1282		m_icount -= m_gfxcycles;
1283		m_st &= ~STBIT_P;
1284		if (src_is_linear && dst_is_linear)
1285		SADDR() += DYDX_Y() * SPTCH();
1286		else if (src_is_linear)
1287		SADDR() += DYDX_Y() * SPTCH();
1288		else
1289		SADDR_Y() += DYDX_Y();
1290		if (dst_is_linear)
1291		DADDR() += DYDX_Y() * DPTCH();
1292		else
1293		DADDR_Y() += DYDX_Y();
1294		}
1295		}
1296
1297		void FUNCTION_NAME(tms340x0_device::pixblt_r)(int src_is_linear, int dst_is_linear)
1298		{
1299		/* if this is the first time through, perform the operation */
1300		if (!P_FLAG())
1301		{
1302		int dx, dy, x, y, words, yreverse;
1303		word_write_func word_write;
1304		word_read_func word_read;
1305		UINT32 saddr, daddr;
1306		XY dstxy = { 0 };
1307
1308		/* determine read/write functions */
1309		if (IOREG(REG_DPYCTL) & 0x0800)
1310		{
1311		word_write = &tms340x0_device::shiftreg_w;
1312		word_read = &tms340x0_device::shiftreg_r;
1313		}
1314		else
1315		{
1316		word_write = &tms340x0_device::memory_w;
1317		word_read = &tms340x0_device::memory_r;
1318		}
1319
1320		/* compute the starting addresses */
1321		saddr = src_is_linear ? SADDR() : SXYTOL(SADDR_XY());
1322		if ((saddr & (BITS_PER_PIXEL - 1)) != 0) osd_printf_debug("PIXBLT_R%d with odd saddr\n", BITS_PER_PIXEL);
1323		saddr &= ~(BITS_PER_PIXEL - 1);
1324
1325		/* compute the bounds of the operation */
1326		dx = (INT16)DYDX_X();
1327		dy = (INT16)DYDX_Y();
1328
1329		/* apply the window for non-linear destinations */
1330		m_gfxcycles = 7 + (src_is_linear ? 0 : 2);
1331		if (!dst_is_linear)
1332		{
1333		dstxy = DADDR_XY();
1334		m_gfxcycles += 2 + (!src_is_linear) + apply_window("PIXBLT R", BITS_PER_PIXEL, &saddr, &dstxy, &dx, &dy);
1335		daddr = DXYTOL(dstxy);
1336		}
1337		else
1338		daddr = DADDR();
1339		if ((daddr & (BITS_PER_PIXEL - 1)) != 0) osd_printf_debug("PIXBLT_R%d with odd daddr\n", BITS_PER_PIXEL);
1340		daddr &= ~(BITS_PER_PIXEL - 1);
1341		LOGGFX(("  saddr=%08X daddr=%08X sptch=%08X dptch=%08X\n", saddr, daddr, SPTCH(), DPTCH()));
1342
1343		/* bail if we're clipped */
1344		if (dx <= 0 || dy <= 0)
1345		return;
1346
1347		/* window mode 1: just return and interrupt if we are within the window */
1348		if (WINDOW_CHECKING() == 1 && !dst_is_linear)
1349		{
1350		CLR_V();
1351		DADDR_XY() = dstxy;
1352		DYDX_X() = dx;
1353		DYDX_Y() = dy;
1354		IOREG(REG_INTPEND) |= TMS34010_WV;
1355		check_interrupt();
1356		return;
1357		}
1358
1359		/* handle flipping the addresses */
1360		yreverse = (IOREG(REG_CONTROL) >> 9) & 1;
1361		if (!src_is_linear || !dst_is_linear)
1362		{
1363		saddr += dx * BITS_PER_PIXEL;
1364		daddr += dx * BITS_PER_PIXEL;
1365		if (yreverse)
1366		{
1367		saddr += (dy - 1) * m_convsp;
1368		daddr += (dy - 1) * m_convdp;
1369		}
1370		}
1371
1372		m_st |= STBIT_P;
1373
1374		/* loop over rows */
1375		for (y = 0; y < dy; y++)
1376		{
1377		int left_partials, right_partials, full_words, bitshift, bitshift_alt;
1378		UINT16 srcword, srcmask, dstword, dstmask, pixel;
1379		UINT32 swordaddr, dwordaddr;
1380
1381		/* determine the bit shift to get from source to dest */
1382		bitshift = ((daddr & 15) - (saddr & 15)) & 15;
1383		bitshift_alt = (16 - bitshift) & 15;
1384
1385		/* how many left and right partial pixels do we have? */
1386		left_partials = (PIXELS_PER_WORD - (((daddr - dx * BITS_PER_PIXEL) & 15) / BITS_PER_PIXEL)) & (PIXELS_PER_WORD - 1);
1387		right_partials = (daddr & 15) / BITS_PER_PIXEL;
1388		full_words = dx - left_partials - right_partials;
1389		if (full_words < 0)
1390		right_partials = dx, left_partials = full_words = 0;
1391		else
1392		full_words /= PIXELS_PER_WORD;
1393
1394		/* compute cycles */
1395		m_gfxcycles += compute_pixblt_cycles(left_partials, right_partials, full_words, PIXEL_OP_TIMING);
1396
1397		/* use word addresses each row */
1398		swordaddr = (saddr + 15) >> 4;
1399		dwordaddr = (daddr + 15) >> 4;
1400
1401		/* fetch the initial source word */
1402		srcword = (this->*word_read)(*m_program, --swordaddr << 1);
1403		srcmask = PIXEL_MASK << ((saddr - BITS_PER_PIXEL) & 15);
1404
1405		/* handle the right partial word */
1406		if (right_partials != 0)
1407		{
1408		/* fetch the destination word */
1409		dstword = (this->*word_read)(*m_program, --dwordaddr << 1);
1410		dstmask = PIXEL_MASK << ((daddr - BITS_PER_PIXEL) & 15);
1411
1412		/* loop over partials */
1413		for (x = 0; x < right_partials; x++)
1414		{
1415		/* fetch source pixel if necessary */
1416		if (srcmask == 0)
1417		{
1418		srcword = (this->*word_read)(*m_program, --swordaddr << 1);
1419		srcmask = PIXEL_MASK << (16 - BITS_PER_PIXEL);
1420		}
1421
1422		/* process the pixel */
1423		pixel = srcword & srcmask;
1424		if (dstmask > srcmask)
1425		pixel <<= bitshift;
1426		else
1427		pixel >>= bitshift_alt;
1428		PIXEL_OP(dstword, dstmask, pixel);
1429		if (!TRANSPARENCY || pixel != 0)
1430		dstword = (dstword & ~dstmask) | pixel;
1431
1432		#if (BITS_PER_PIXEL<16)
1433		/* update the source */
1434		srcmask >>= BITS_PER_PIXEL;
1435
1436		/* update the destination */
1437		dstmask >>= BITS_PER_PIXEL;
1438		#else
1439		srcmask = 0;
1440		dstmask = 0;
1441		#endif
1442		}
1443
1444		/* write the result */
1445		(this->*word_write)(*m_program, dwordaddr << 1, dstword);
1446		}
1447
1448		/* loop over full words */
1449		for (words = 0; words < full_words; words++)
1450		{
1451		/* fetch the destination word (if necessary) */
1452		dwordaddr--;
1453		if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY)
1454		dstword = (this->*word_read)(*m_program, dwordaddr << 1);
1455		else
1456		dstword = 0;
1457		dstmask = PIXEL_MASK << (16 - BITS_PER_PIXEL);
1458
1459		/* loop over partials */
1460		for (x = 0; x < PIXELS_PER_WORD; x++)
1461		{
1462		/* fetch source pixel if necessary */
1463		if (srcmask == 0)
1464		{
1465		srcword = (this->*word_read)(*m_program, --swordaddr << 1);
1466		srcmask = PIXEL_MASK << (16 - BITS_PER_PIXEL);
1467		}
1468
1469		/* process the pixel */
1470		pixel = srcword & srcmask;
1471		if (dstmask > srcmask)
1472		pixel <<= bitshift;
1473		else
1474		pixel >>= bitshift_alt;
1475		PIXEL_OP(dstword, dstmask, pixel);
1476		if (!TRANSPARENCY || pixel != 0)
1477		dstword = (dstword & ~dstmask) | pixel;
1478
1479		#if (BITS_PER_PIXEL<16)
1480		/* update the source */
1481		srcmask >>= BITS_PER_PIXEL;
1482
1483		/* update the destination */
1484		dstmask >>= BITS_PER_PIXEL;
1485		#else
1486		srcmask = 0;
1487		dstmask = 0;
1488		#endif
1489		}
1490
1491		/* write the result */
1492		(this->*word_write)(*m_program, dwordaddr << 1, dstword);
1493		}
1494
1495		/* handle the left partial word */
1496		if (left_partials != 0)
1497		{
1498		/* fetch the destination word */
1499		dstword = (this->*word_read)(*m_program, --dwordaddr << 1);
1500		dstmask = PIXEL_MASK << (16 - BITS_PER_PIXEL);
1501
1502		/* loop over partials */
1503		for (x = 0; x < left_partials; x++)
1504		{
1505		/* fetch the source pixel if necessary */
1506		if (srcmask == 0)
1507		{
1508		srcword = (this->*word_read)(*m_program, --swordaddr << 1);
1509		srcmask = PIXEL_MASK << (16 - BITS_PER_PIXEL);
1510		}
1511
1512		/* process the pixel */
1513		pixel = srcword & srcmask;
1514		if (dstmask > srcmask)
1515		pixel <<= bitshift;
1516		else
1517		pixel >>= bitshift_alt;
1518		PIXEL_OP(dstword, dstmask, pixel);
1519		if (!TRANSPARENCY || pixel != 0)
1520		dstword = (dstword & ~dstmask) | pixel;
1521
1522		#if (BITS_PER_PIXEL<16)
1523		/* update the source */
1524		srcmask >>= BITS_PER_PIXEL;
1525
1526		/* update the destination */
1527		dstmask >>= BITS_PER_PIXEL;
1528		#else
1529		srcmask = 0;
1530		dstmask = 0;
1531		#endif
1532		}
1533
1534		/* write the result */
1535		(this->*word_write)(*m_program, dwordaddr << 1, dstword);
1536		}
1537
1538		/* update for next row */
1539		if (!yreverse)
1540		{
1541		saddr += SPTCH();
1542		daddr += DPTCH();
1543		}
1544		else
1545		{
1546		saddr -= SPTCH();
1547		daddr -= DPTCH();
1548		}
1549		}
1550		LOGGFX(("  (%d cycles)\n", m_gfxcycles));
1551		}
1552
1553		/* eat cycles */
1554		if (m_gfxcycles > m_icount)
1555		{
1556		m_gfxcycles -= m_icount;
1557		m_icount = 0;
1558		m_pc -= 0x10;
1559		}
1560		else
1561		{
1562		m_icount -= m_gfxcycles;
1563		m_st &= ~STBIT_P;
1564		if (src_is_linear && dst_is_linear)
1565		SADDR() += DYDX_Y() * SPTCH();
1566		else if (src_is_linear)
1567		SADDR() += DYDX_Y() * SPTCH();
1568		else
1569		SADDR_Y() += DYDX_Y();
1570		if (dst_is_linear)
1571		DADDR() += DYDX_Y() * DPTCH();
1572		else
1573		DADDR_Y() += DYDX_Y();
1574		}
1575		}
1576
1577		void FUNCTION_NAME(tms340x0_device::pixblt_b)(int dst_is_linear)
1578		{
1579		/* if this is the first time through, perform the operation */
1580		if (!P_FLAG())
1581		{
1582		int dx, dy, x, y, words, left_partials, right_partials, full_words;
1583		word_write_func word_write;
1584		word_read_func word_read;
1585		UINT32 saddr, daddr;
1586		XY dstxy = { 0 };
1587
1588		/* determine read/write functions */
1589		if (IOREG(REG_DPYCTL) & 0x0800)
1590		{
1591		word_write = &tms340x0_device::shiftreg_w;
1592		word_read = &tms340x0_device::shiftreg_r;
1593		}
1594		else
1595		{
1596		word_write = &tms340x0_device::memory_w;
1597		word_read = &tms340x0_device::memory_r;
1598		}
1599
1600		/* compute the starting addresses */
1601		saddr = SADDR();
1602
1603		/* compute the bounds of the operation */
1604		dx = (INT16)DYDX_X();
1605		dy = (INT16)DYDX_Y();
1606
1607		/* apply the window for non-linear destinations */
1608		m_gfxcycles = 4;
1609		if (!dst_is_linear)
1610		{
1611		dstxy = DADDR_XY();
1612		m_gfxcycles += 2 + apply_window("PIXBLT B", 1, &saddr, &dstxy, &dx, &dy);
1613		daddr = DXYTOL(dstxy);
1614		}
1615		else
1616		daddr = DADDR();
1617		daddr &= ~(BITS_PER_PIXEL - 1);
1618		LOGGFX(("  saddr=%08X daddr=%08X sptch=%08X dptch=%08X\n", saddr, daddr, SPTCH(), DPTCH()));
1619
1620		/* bail if we're clipped */
1621		if (dx <= 0 || dy <= 0)
1622		return;
1623
1624		/* window mode 1: just return and interrupt if we are within the window */
1625		if (WINDOW_CHECKING() == 1 && !dst_is_linear)
1626		{
1627		CLR_V();
1628		DADDR_XY() = dstxy;
1629		DYDX_X() = dx;
1630		DYDX_Y() = dy;
1631		IOREG(REG_INTPEND) |= TMS34010_WV;
1632		check_interrupt();
1633		return;
1634		}
1635
1636		/* how many left and right partial pixels do we have? */
1637		left_partials = (PIXELS_PER_WORD - ((daddr & 15) / BITS_PER_PIXEL)) & (PIXELS_PER_WORD - 1);
1638		right_partials = ((daddr + dx * BITS_PER_PIXEL) & 15) / BITS_PER_PIXEL;
1639		full_words = dx - left_partials - right_partials;
1640		if (full_words < 0)
1641		left_partials = dx, right_partials = full_words = 0;
1642		else
1643		full_words /= PIXELS_PER_WORD;
1644
1645		/* compute cycles */
1646		m_gfxcycles += compute_pixblt_b_cycles(left_partials, right_partials, full_words, dy, PIXEL_OP_TIMING, BITS_PER_PIXEL);
1647		m_st |= STBIT_P;
1648
1649		/* loop over rows */
1650		for (y = 0; y < dy; y++)
1651		{
1652		UINT16 srcword, srcmask, dstword, dstmask, pixel;
1653		UINT32 swordaddr, dwordaddr;
1654
1655		/* use byte addresses each row */
1656		swordaddr = saddr >> 4;
1657		dwordaddr = daddr >> 4;
1658
1659		/* fetch the initial source word */
1660		srcword = (this->*word_read)(*m_program, swordaddr++ << 1);
1661		srcmask = 1 << (saddr & 15);
1662
1663		/* handle the left partial word */
1664		if (left_partials != 0)
1665		{
1666		/* fetch the destination word */
1667		dstword = (this->*word_read)(*m_program, dwordaddr << 1);
1668		dstmask = PIXEL_MASK << (daddr & 15);
1669
1670		/* loop over partials */
1671		for (x = 0; x < left_partials; x++)
1672		{
1673		/* process the pixel */
1674		pixel = (srcword & srcmask) ? COLOR1() : COLOR0();
1675		pixel &= dstmask;
1676		PIXEL_OP(dstword, dstmask, pixel);
1677		if (!TRANSPARENCY || pixel != 0)
1678		dstword = (dstword & ~dstmask) | pixel;
1679
1680		/* update the source */
1681		srcmask <<= 1;
1682		if (srcmask == 0)
1683		{
1684		srcword = (this->*word_read)(*m_program, swordaddr++ << 1);
1685		srcmask = 0x0001;
1686		}
1687
1688		/* update the destination */
1689		dstmask = dstmask << BITS_PER_PIXEL;
1690		}
1691
1692		/* write the result */
1693		(this->*word_write)(*m_program, dwordaddr++ << 1, dstword);
1694		}
1695
1696		/* loop over full words */
1697		for (words = 0; words < full_words; words++)
1698		{
1699		/* fetch the destination word (if necessary) */
1700		if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY)
1701		dstword = (this->*word_read)(*m_program, dwordaddr << 1);
1702		else
1703		dstword = 0;
1704		dstmask = PIXEL_MASK;
1705
1706		/* loop over partials */
1707		for (x = 0; x < PIXELS_PER_WORD; x++)
1708		{
1709		/* process the pixel */
1710		pixel = (srcword & srcmask) ? COLOR1() : COLOR0();
1711		pixel &= dstmask;
1712		PIXEL_OP(dstword, dstmask, pixel);
1713		if (!TRANSPARENCY || pixel != 0)
1714		dstword = (dstword & ~dstmask) | pixel;
1715
1716		/* update the source */
1717		srcmask <<= 1;
1718		if (srcmask == 0)
1719		{
1720		srcword = (this->*word_read)(*m_program, swordaddr++ << 1);
1721		srcmask = 0x0001;
1722		}
1723
1724		/* update the destination */
1725		dstmask = dstmask << BITS_PER_PIXEL;
1726		}
1727
1728		/* write the result */
1729		(this->*word_write)(*m_program, dwordaddr++ << 1, dstword);
1730		}
1731
1732		/* handle the right partial word */
1733		if (right_partials != 0)
1734		{
1735		/* fetch the destination word */
1736		dstword = (this->*word_read)(*m_program, dwordaddr << 1);
1737		dstmask = PIXEL_MASK;
1738
1739		/* loop over partials */
1740		for (x = 0; x < right_partials; x++)
1741		{
1742		/* process the pixel */
1743		pixel = (srcword & srcmask) ? COLOR1() : COLOR0();
1744		pixel &= dstmask;
1745		PIXEL_OP(dstword, dstmask, pixel);
1746		if (!TRANSPARENCY || pixel != 0)
1747		dstword = (dstword & ~dstmask) | pixel;
1748
1749		/* update the source */
1750		srcmask <<= 1;
1751		if (srcmask == 0)
1752		{
1753		srcword = (this->*word_read)(*m_program, swordaddr++ << 1);
1754		srcmask = 0x0001;
1755		}
1756
1757		/* update the destination */
1758		dstmask = dstmask << BITS_PER_PIXEL;
1759		}
1760
1761		/* write the result */
1762		(this->*word_write)(*m_program, dwordaddr++ << 1, dstword);
1763		}
1764
1765		/* update for next row */
1766		saddr += SPTCH();
1767		daddr += DPTCH();
1768		}
1769		LOGGFX(("  (%d cycles)\n", m_gfxcycles));
1770		}
1771
1772		/* eat cycles */
1773		if (m_gfxcycles > m_icount)
1774		{
1775		m_gfxcycles -= m_icount;
1776		m_icount = 0;
1777		m_pc -= 0x10;
1778		}
1779		else
1780		{
1781		m_icount -= m_gfxcycles;
1782		m_st &= ~STBIT_P;
1783		SADDR() += DYDX_Y() * SPTCH();
1784		if (dst_is_linear)
1785		DADDR() += DYDX_Y() * DPTCH();
1786		else
1787		DADDR_Y() += DYDX_Y();
1788		}
1789		}
1790
1791		void FUNCTION_NAME(tms340x0_device::fill)(int dst_is_linear)
1792		{
1793		/* if this is the first time through, perform the operation */
1794		if (!P_FLAG())
1795		{
1796		int dx, dy, x, y, words, left_partials, right_partials, full_words;
1797		word_write_func word_write;
1798		word_read_func word_read;
1799		UINT32 daddr;
1800		XY dstxy = { 0 };
1801
1802		/* determine read/write functions */
1803		if (IOREG(REG_DPYCTL) & 0x0800)
1804		{
1805		word_write = &tms340x0_device::shiftreg_w;
1806		word_read = &tms340x0_device::dummy_shiftreg_r;
1807		}
1808		else
1809		{
1810		word_write = &tms340x0_device::memory_w;
1811		word_read = &tms340x0_device::memory_r;
1812		}
1813
1814		/* compute the bounds of the operation */
1815		dx = (INT16)DYDX_X();
1816		dy = (INT16)DYDX_Y();
1817
1818		/* apply the window for non-linear destinations */
1819		m_gfxcycles = 4;
1820		if (!dst_is_linear)
1821		{
1822		dstxy = DADDR_XY();
1823		m_gfxcycles += 2 + apply_window("FILL", 0, NULL, &dstxy, &dx, &dy);
1824		daddr = DXYTOL(dstxy);
1825		}
1826		else
1827		daddr = DADDR();
1828		daddr &= ~(BITS_PER_PIXEL - 1);
1829		LOGGFX(("  daddr=%08X\n", daddr));
1830
1831		/* bail if we're clipped */
1832		if (dx <= 0 || dy <= 0)
1833		return;
1834
1835		/* window mode 1: just return and interrupt if we are within the window */
1836		if (WINDOW_CHECKING() == 1 && !dst_is_linear)
1837		{
1838		CLR_V();
1839		DADDR_XY() = dstxy;
1840		DYDX_X() = dx;
1841		DYDX_Y() = dy;
1842		IOREG(REG_INTPEND) |= TMS34010_WV;
1843		check_interrupt();
1844		return;
1845		}
1846
1847		/* how many left and right partial pixels do we have? */
1848		left_partials = (PIXELS_PER_WORD - ((daddr & 15) / BITS_PER_PIXEL)) & (PIXELS_PER_WORD - 1);
1849		right_partials = ((daddr + dx * BITS_PER_PIXEL) & 15) / BITS_PER_PIXEL;
1850		full_words = dx - left_partials - right_partials;
1851		if (full_words < 0)
1852		left_partials = dx, right_partials = full_words = 0;
1853		else
1854		full_words /= PIXELS_PER_WORD;
1855
1856		/* compute cycles */
1857		m_gfxcycles += 2;
1858		m_st |= STBIT_P;
1859
1860		/* loop over rows */
1861		for (y = 0; y < dy; y++)
1862		{
1863		UINT16 dstword, dstmask, pixel;
1864		UINT32 dwordaddr;
1865
1866		/* use byte addresses each row */
1867		dwordaddr = daddr >> 4;
1868
1869		/* compute cycles */
1870		m_gfxcycles += compute_fill_cycles(left_partials, right_partials, full_words, PIXEL_OP_TIMING);
1871
1872		/* handle the left partial word */
1873		if (left_partials != 0)
1874		{
1875		/* fetch the destination word */
1876		dstword = (this->*word_read)(*m_program, dwordaddr << 1);
1877		dstmask = PIXEL_MASK << (daddr & 15);
1878
1879		/* loop over partials */
1880		for (x = 0; x < left_partials; x++)
1881		{
1882		/* process the pixel */
1883		pixel = COLOR1() & dstmask;
1884		PIXEL_OP(dstword, dstmask, pixel);
1885		if (!TRANSPARENCY || pixel != 0)
1886		dstword = (dstword & ~dstmask) | pixel;
1887
1888		/* update the destination */
1889		dstmask = dstmask << BITS_PER_PIXEL;
1890		}
1891
1892		/* write the result */
1893		(this->*word_write)(*m_program, dwordaddr++ << 1, dstword);
1894		}
1895
1896		/* loop over full words */
1897		for (words = 0; words < full_words; words++)
1898		{
1899		/* fetch the destination word (if necessary) */
1900		if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY)
1901		dstword = (this->*word_read)(*m_program, dwordaddr << 1);
1902		else
1903		dstword = 0;
1904		dstmask = PIXEL_MASK;
1905
1906		/* loop over partials */
1907		for (x = 0; x < PIXELS_PER_WORD; x++)
1908		{
1909		/* process the pixel */
1910		pixel = COLOR1() & dstmask;
1911		PIXEL_OP(dstword, dstmask, pixel);
1912		if (!TRANSPARENCY || pixel != 0)
1913		dstword = (dstword & ~dstmask) | pixel;
1914
1915		/* update the destination */
1916		dstmask = dstmask << BITS_PER_PIXEL;
1917		}
1918
1919		/* write the result */
1920		(this->*word_write)(*m_program, dwordaddr++ << 1, dstword);
1921		}
1922
1923		/* handle the right partial word */
1924		if (right_partials != 0)
1925		{
1926		/* fetch the destination word */
1927		dstword = (this->*word_read)(*m_program, dwordaddr << 1);
1928		dstmask = PIXEL_MASK;
1929
1930		/* loop over partials */
1931		for (x = 0; x < right_partials; x++)
1932		{
1933		/* process the pixel */
1934		pixel = COLOR1() & dstmask;
1935		PIXEL_OP(dstword, dstmask, pixel);
1936		if (!TRANSPARENCY || pixel != 0)
1937		dstword = (dstword & ~dstmask) | pixel;
1938
1939		/* update the destination */
1940		dstmask = dstmask << BITS_PER_PIXEL;
1941		}
1942
1943		/* write the result */
1944		(this->*word_write)(*m_program, dwordaddr++ << 1, dstword);
1945		}
1946
1947		/* update for next row */
1948		daddr += DPTCH();
1949		}
1950
1951		LOGGFX(("  (%d cycles)\n", m_gfxcycles));
1952		}
1953
1954		/* eat cycles */
1955		if (m_gfxcycles > m_icount)
1956		{
1957		m_gfxcycles -= m_icount;
1958		m_icount = 0;
1959		m_pc -= 0x10;
1960		}
1961		else
1962		{
1963		m_icount -= m_gfxcycles;
1964		m_st &= ~STBIT_P;
1965		if (dst_is_linear)
1966		DADDR() += DYDX_Y() * DPTCH();
1967		else
1968		DADDR_Y() += DYDX_Y();
1969		}
1970		}
1971
1972		#endif

trunk/src/devices/cpu/tms34010/34010gfx.inc

r0	r250252
	1	// license:BSD-3-Clause
	2	// copyright-holders:Alex Pasadyn,Zsolt Vasvari,Aaron Giles
	3	/***************************************************************************
	4
	5	TMS34010: Portable Texas Instruments TMS34010 emulator
	6
	7	Copyright Alex Pasadyn/Zsolt Vasvari
	8	Parts based on code by Aaron Giles
	9
	10	***************************************************************************/
	11
	12	#ifndef RECURSIVE_INCLUDE
	13
	14
	15	#define LOG_GFX_OPS 0
	16	#define LOGGFX(x) do { if (LOG_GFX_OPS && machine().input().code_pressed(KEYCODE_L)) logerror x; } while (0)
	17
	18
	19	/* Graphics Instructions */
	20
	21	void tms340x0_device::line(UINT16 op)
	22	{
	23	if (!P_FLAG())
	24	{
	25	if (WINDOW_CHECKING() != 0 && WINDOW_CHECKING() != 3)
	26	logerror("LINE XY  %08X - Window Checking Mode %d not supported\n", m_pc, WINDOW_CHECKING());
	27
	28	m_st |= STBIT_P;
	29	TEMP() = (op & 0x80) ? 1 : 0;  /* boundary value depends on the algorithm */
	30	LOGGFX(("%08X(%3d):LINE (%d,%d)-(%d,%d)\n", m_pc, m_screen->vpos(), DADDR_X(), DADDR_Y(), DADDR_X() + DYDX_X(), DADDR_Y() + DYDX_Y()));
	31	}
	32
	33	if (COUNT() > 0)
	34	{
	35	INT16 x1,y1;
	36
	37	COUNT()--;
	38	if (WINDOW_CHECKING() != 3 ||
	39	(DADDR_X() >= WSTART_X() && DADDR_X() <= WEND_X() &&
	40	DADDR_Y() >= WSTART_Y() && DADDR_Y() <= WEND_Y()))
	41	WPIXEL(DXYTOL(DADDR_XY()),COLOR1());
	42
	43	if (SADDR() >= TEMP())
	44	{
	45	SADDR() += DYDX_Y()*2 - DYDX_X()*2;
	46	x1 = INC1_X();
	47	y1 = INC1_Y();
	48	}
	49	else
	50	{
	51	SADDR() += DYDX_Y()*2;
	52	x1 = INC2_X();
	53	y1 = INC2_Y();
	54	}
	55	DADDR_X() += x1;
	56	DADDR_Y() += y1;
	57
	58	COUNT_UNKNOWN_CYCLES(2);
	59	m_pc -= 0x10;  /* not done yet, check for interrupts and restart instruction */
	60	return;
	61	}
	62	m_st &= ~STBIT_P;
	63	}
	64
	65
	66	/*
	67	cases:
	68	* window modes (0,1,2,3)
	69	* boolean/arithmetic ops (16+6)
	70	* transparency (on/off)
	71	* plane masking
	72	* directions (left->right/right->left, top->bottom/bottom->top)
	73	*/
	74
	75	int tms340x0_device::apply_window(const char *inst_name,int srcbpp, UINT32 *srcaddr, XY *dst, int *dx, int *dy)
	76	{
	77	/* apply the window */
	78	if (WINDOW_CHECKING() == 0)
	79	return 0;
	80	else
	81	{
	82	int sx = dst->x;
	83	int sy = dst->y;
	84	int ex = sx + *dx - 1;
	85	int ey = sy + *dy - 1;
	86	int diff, cycles = 3;
	87
	88	if (WINDOW_CHECKING() == 2)
	89	logerror("%08x: %s apply_window window mode %d not supported!\n", pc(), inst_name, WINDOW_CHECKING());
	90
	91	CLR_V();
	92	if (WINDOW_CHECKING() == 1)
	93	SET_V_LOG(1);
	94
	95	/* clip X */
	96	diff = WSTART_X() - sx;
	97	if (diff > 0)
	98	{
	99	if (srcaddr)
	100	*srcaddr += diff * srcbpp;
	101	sx += diff;
	102	SET_V_LOG(1);
	103	}
	104	diff = ex - WEND_X();
	105	if (diff > 0)
	106	{
	107	ex -= diff;
	108	SET_V_LOG(1);
	109	}
	110
	111
	112	/* clip Y */
	113	diff = WSTART_Y() - sy;
	114	if (diff > 0)
	115	{
	116	if (srcaddr)
	117	*srcaddr += diff * m_convsp;
	118
	119	sy += diff;
	120	SET_V_LOG(1);
	121	}
	122	diff = ey - WEND_Y();
	123	if (diff > 0)
	124	{
	125	ey -= diff;
	126	SET_V_LOG(1);
	127	}
	128
	129	/* compute cycles */
	130	if (*dx != ex - sx + 1 || *dy != ey - sy + 1)
	131	{
	132	if (dst->x != sx || dst->y != sy)
	133	cycles += 11;
	134	else
	135	cycles += 3;
	136	}
	137	else if (dst->x != sx || dst->y != sy)
	138	cycles += 7;
	139
	140	/* update the values */
	141	dst->x = sx;
	142	dst->y = sy;
	143	*dx = ex - sx + 1;
	144	*dy = ey - sy + 1;
	145	return cycles;
	146	}
	147	}
	148
	149
	150	/*******************************************************************
	151
	152	About the timing of gfx operations:
	153
	154	The 34010 manual lists a fairly intricate and accurate way of
	155	computing cycle timings for graphics ops. However, there are
	156	enough typos and misleading statements to make the reliability
	157	of the timing info questionable.
	158
	159	So, to address this, here is a simplified approximate version
	160	of the timing.
	161
	162	timing = setup + (srcwords * 2 + dstwords * gfxop) * rows
	163
	164	Each read access takes 2 cycles. Each gfx operation has
	165	its own timing as specified in the 34010 manual. So, it's 2
	166	cycles per read plus gfxop cycles per operation. Pretty
	167	simple, no?
	168
	169	*******************************************************************/
	170
	171	int tms340x0_device::compute_fill_cycles(int left_partials, int right_partials, int full_words, int op_timing)
	172	{
	173	int dstwords;
	174
	175	if (left_partials) full_words += 1;
	176	if (right_partials) full_words += 1;
	177	dstwords = full_words;
	178
	179	return (dstwords * op_timing);
	180	}
	181
	182	int tms340x0_device::compute_pixblt_cycles(int left_partials, int right_partials, int full_words, int op_timing)
	183	{
	184	int srcwords, dstwords;
	185
	186	if (left_partials) full_words += 1;
	187	if (right_partials) full_words += 1;
	188	srcwords = full_words;
	189	dstwords = full_words;
	190
	191	return (dstwords * op_timing + srcwords * 2) + 2;
	192	}
	193
	194	int tms340x0_device::compute_pixblt_b_cycles(int left_partials, int right_partials, int full_words, int rows, int op_timing, int bpp)
	195	{
	196	int srcwords, dstwords;
	197
	198	if (left_partials) full_words += 1;
	199	if (right_partials) full_words += 1;
	200	srcwords = full_words * bpp / 16;
	201	dstwords = full_words;
	202
	203	return (dstwords * op_timing + srcwords * 2) * rows + 2;
	204	}
	205
	206
	207	/* Shift register handling */
	208	void tms340x0_device::memory_w(address_space &space, offs_t offset,UINT16 data)
	209	{
	210	space.write_word(offset, data);
	211	}
	212
	213	UINT16 tms340x0_device::memory_r(address_space &space, offs_t offset)
	214	{
	215	return space.read_word(offset);
	216	}
	217
	218	void tms340x0_device::shiftreg_w(address_space &space, offs_t offset,UINT16 data)
	219	{
	220	if (!m_from_shiftreg_cb.isnull())
	221	m_from_shiftreg_cb(space, (UINT32)(offset << 3) & ~15, &m_shiftreg[0]);
	222	else
	223	logerror("From ShiftReg function not set. PC = %08X\n", m_pc);
	224	}
	225
	226	UINT16 tms340x0_device::shiftreg_r(address_space &space, offs_t offset)
	227	{
	228	if (!m_to_shiftreg_cb.isnull())
	229	m_to_shiftreg_cb(space, (UINT32)(offset << 3) & ~15, &m_shiftreg[0]);
	230	else
	231	logerror("To ShiftReg function not set. PC = %08X\n", m_pc);
	232	return m_shiftreg[0];
	233	}
	234
	235	UINT16 tms340x0_device::dummy_shiftreg_r(address_space &space, offs_t offset)
	236	{
	237	return m_shiftreg[0];
	238	}
	239
	240
	241
	242	/* Pixel operations */
	243	UINT32 tms340x0_device::pixel_op00(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return srcpix; }
	244	UINT32 tms340x0_device::pixel_op01(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return srcpix & dstpix; }
	245	UINT32 tms340x0_device::pixel_op02(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return srcpix & ~dstpix; }
	246	UINT32 tms340x0_device::pixel_op03(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return 0; }
	247	UINT32 tms340x0_device::pixel_op04(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (srcpix | ~dstpix) & mask; }
	248	UINT32 tms340x0_device::pixel_op05(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return ~(srcpix ^ dstpix) & mask; }
	249	UINT32 tms340x0_device::pixel_op06(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return ~dstpix & mask; }
	250	UINT32 tms340x0_device::pixel_op07(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return ~(srcpix | dstpix) & mask; }
	251	UINT32 tms340x0_device::pixel_op08(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (srcpix | dstpix) & mask; }
	252	UINT32 tms340x0_device::pixel_op09(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return dstpix & mask; }
	253	UINT32 tms340x0_device::pixel_op10(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (srcpix ^ dstpix) & mask; }
	254	UINT32 tms340x0_device::pixel_op11(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (~srcpix & dstpix) & mask; }
	255	UINT32 tms340x0_device::pixel_op12(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return mask; }
	256	UINT32 tms340x0_device::pixel_op13(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (~srcpix & dstpix) & mask; }
	257	UINT32 tms340x0_device::pixel_op14(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return ~(srcpix & dstpix) & mask; }
	258	UINT32 tms340x0_device::pixel_op15(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return srcpix ^ mask; }
	259	UINT32 tms340x0_device::pixel_op16(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (srcpix + dstpix) & mask; }
	260	UINT32 tms340x0_device::pixel_op17(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { INT32 tmp = srcpix + (dstpix & mask); return (tmp > mask) ? mask : tmp; }
	261	UINT32 tms340x0_device::pixel_op18(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (dstpix - srcpix) & mask; }
	262	UINT32 tms340x0_device::pixel_op19(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { INT32 tmp = srcpix - (dstpix & mask); return (tmp < 0) ? 0 : tmp; }
	263	UINT32 tms340x0_device::pixel_op20(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { dstpix &= mask; return (srcpix > dstpix) ? srcpix : dstpix; }
	264	UINT32 tms340x0_device::pixel_op21(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { dstpix &= mask; return (srcpix < dstpix) ? srcpix : dstpix; }
	265
	266	const tms340x0_device::pixel_op_func tms340x0_device::s_pixel_op_table[32] =
	267	{
	268	&tms340x0_device::pixel_op00, &tms340x0_device::pixel_op01, &tms340x0_device::pixel_op02, &tms340x0_device::pixel_op03, &tms340x0_device::pixel_op04, &tms340x0_device::pixel_op05, &tms340x0_device::pixel_op06, &tms340x0_device::pixel_op07,
	269	&tms340x0_device::pixel_op08, &tms340x0_device::pixel_op09, &tms340x0_device::pixel_op10, &tms340x0_device::pixel_op11, &tms340x0_device::pixel_op12, &tms340x0_device::pixel_op13, &tms340x0_device::pixel_op14, &tms340x0_device::pixel_op15,
	270	&tms340x0_device::pixel_op16, &tms340x0_device::pixel_op17, &tms340x0_device::pixel_op18, &tms340x0_device::pixel_op19, &tms340x0_device::pixel_op20, &tms340x0_device::pixel_op21, &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00,
	271	&tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00
	272	};
	273	const UINT8 tms340x0_device::s_pixel_op_timing_table[33] =
	274	{
	275	2,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,5,5,6,5,5,2,2,2,2,2,2,2,2,2,2,2
	276	};
	277
	278
	279	/* tables */
	280	const tms340x0_device::pixblt_op_func tms340x0_device::s_pixblt_op_table[] =
	281	{
	282	&tms340x0_device::pixblt_1_op0,   &tms340x0_device::pixblt_1_op0_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
	283	&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
	284	&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
	285	&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
	286	&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
	287	&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
	288	&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
	289	&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
	290	&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
	291	&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
	292	&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
	293	&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
	294	&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
	295	&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
	296	&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
	297	&tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,     &tms340x0_device::pixblt_1_opx,   &tms340x0_device::pixblt_1_opx_trans,
	298
	299	&tms340x0_device::pixblt_2_op0,   &tms340x0_device::pixblt_2_op0_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
	300	&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
	301	&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
	302	&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
	303	&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
	304	&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
	305	&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
	306	&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
	307	&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
	308	&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
	309	&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
	310	&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
	311	&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
	312	&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
	313	&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
	314	&tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,     &tms340x0_device::pixblt_2_opx,   &tms340x0_device::pixblt_2_opx_trans,
	315
	316	&tms340x0_device::pixblt_4_op0,   &tms340x0_device::pixblt_4_op0_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
	317	&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
	318	&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
	319	&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
	320	&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
	321	&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
	322	&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
	323	&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
	324	&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
	325	&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
	326	&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
	327	&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
	328	&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
	329	&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
	330	&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
	331	&tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,     &tms340x0_device::pixblt_4_opx,   &tms340x0_device::pixblt_4_opx_trans,
	332
	333	&tms340x0_device::pixblt_8_op0,   &tms340x0_device::pixblt_8_op0_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
	334	&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
	335	&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
	336	&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
	337	&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
	338	&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
	339	&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
	340	&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
	341	&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
	342	&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
	343	&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
	344	&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
	345	&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
	346	&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
	347	&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
	348	&tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,     &tms340x0_device::pixblt_8_opx,   &tms340x0_device::pixblt_8_opx_trans,
	349
	350	&tms340x0_device::pixblt_16_op0,  &tms340x0_device::pixblt_16_op0_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
	351	&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
	352	&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
	353	&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
	354	&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
	355	&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
	356	&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
	357	&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
	358	&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
	359	&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
	360	&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
	361	&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
	362	&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
	363	&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
	364	&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,
	365	&tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans,    &tms340x0_device::pixblt_16_opx,  &tms340x0_device::pixblt_16_opx_trans
	366	};
	367
	368	const tms340x0_device::pixblt_op_func tms340x0_device::s_pixblt_r_op_table[] =
	369	{
	370	&tms340x0_device::pixblt_r_1_op0, &tms340x0_device::pixblt_r_1_op0_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
	371	&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
	372	&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
	373	&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
	374	&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
	375	&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
	376	&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
	377	&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
	378	&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
	379	&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
	380	&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
	381	&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
	382	&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
	383	&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
	384	&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
	385	&tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,   &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans,
	386
	387	&tms340x0_device::pixblt_r_2_op0, &tms340x0_device::pixblt_r_2_op0_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
	388	&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
	389	&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
	390	&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
	391	&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
	392	&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
	393	&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
	394	&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
	395	&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
	396	&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
	397	&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
	398	&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
	399	&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
	400	&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
	401	&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
	402	&tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,   &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans,
	403
	404	&tms340x0_device::pixblt_r_4_op0, &tms340x0_device::pixblt_r_4_op0_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
	405	&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
	406	&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
	407	&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
	408	&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
	409	&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
	410	&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
	411	&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
	412	&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
	413	&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
	414	&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
	415	&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
	416	&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
	417	&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
	418	&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
	419	&tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,   &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans,
	420
	421	&tms340x0_device::pixblt_r_8_op0, &tms340x0_device::pixblt_r_8_op0_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
	422	&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
	423	&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
	424	&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
	425	&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
	426	&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
	427	&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
	428	&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
	429	&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
	430	&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
	431	&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
	432	&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
	433	&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
	434	&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
	435	&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
	436	&tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,   &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans,
	437
	438	&tms340x0_device::pixblt_r_16_op0,&tms340x0_device::pixblt_r_16_op0_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
	439	&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
	440	&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
	441	&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
	442	&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
	443	&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
	444	&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
	445	&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
	446	&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
	447	&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
	448	&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
	449	&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
	450	&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
	451	&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
	452	&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,
	453	&tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans,  &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans
	454	};
	455
	456	const tms340x0_device::pixblt_b_op_func tms340x0_device::s_pixblt_b_op_table[] =
	457	{
	458	&tms340x0_device::pixblt_b_1_op0, &tms340x0_device::pixblt_b_1_op0_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
	459	&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
	460	&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
	461	&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
	462	&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
	463	&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
	464	&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
	465	&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
	466	&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
	467	&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
	468	&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
	469	&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
	470	&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
	471	&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
	472	&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
	473	&tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,   &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans,
	474
	475	&tms340x0_device::pixblt_b_2_op0, &tms340x0_device::pixblt_b_2_op0_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
	476	&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
	477	&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
	478	&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
	479	&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
	480	&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
	481	&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
	482	&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
	483	&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
	484	&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
	485	&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
	486	&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
	487	&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
	488	&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
	489	&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
	490	&tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,   &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans,
	491
	492	&tms340x0_device::pixblt_b_4_op0, &tms340x0_device::pixblt_b_4_op0_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
	493	&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
	494	&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
	495	&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
	496	&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
	497	&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
	498	&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
	499	&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
	500	&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
	501	&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
	502	&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
	503	&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
	504	&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
	505	&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
	506	&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
	507	&tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,   &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans,
	508
	509	&tms340x0_device::pixblt_b_8_op0, &tms340x0_device::pixblt_b_8_op0_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
	510	&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
	511	&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
	512	&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
	513	&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
	514	&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
	515	&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
	516	&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
	517	&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
	518	&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
	519	&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
	520	&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
	521	&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
	522	&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
	523	&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
	524	&tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,   &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans,
	525
	526	&tms340x0_device::pixblt_b_16_op0,&tms340x0_device::pixblt_b_16_op0_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
	527	&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
	528	&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
	529	&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
	530	&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
	531	&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
	532	&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
	533	&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
	534	&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
	535	&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
	536	&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
	537	&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
	538	&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
	539	&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
	540	&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,
	541	&tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans,  &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans
	542	};
	543
	544	const tms340x0_device::pixblt_b_op_func tms340x0_device::s_fill_op_table[] =
	545	{
	546	&tms340x0_device::fill_1_op0,     &tms340x0_device::fill_1_op0_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
	547	&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
	548	&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
	549	&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
	550	&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
	551	&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
	552	&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
	553	&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
	554	&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
	555	&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
	556	&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
	557	&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
	558	&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
	559	&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
	560	&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
	561	&tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,       &tms340x0_device::fill_1_opx,     &tms340x0_device::fill_1_opx_trans,
	562
	563	&tms340x0_device::fill_2_op0,     &tms340x0_device::fill_2_op0_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
	564	&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
	565	&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
	566	&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
	567	&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
	568	&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
	569	&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
	570	&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
	571	&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
	572	&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
	573	&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
	574	&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
	575	&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
	576	&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
	577	&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
	578	&tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,       &tms340x0_device::fill_2_opx,     &tms340x0_device::fill_2_opx_trans,
	579
	580	&tms340x0_device::fill_4_op0,     &tms340x0_device::fill_4_op0_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
	581	&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
	582	&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
	583	&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
	584	&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
	585	&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
	586	&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
	587	&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
	588	&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
	589	&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
	590	&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
	591	&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
	592	&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
	593	&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
	594	&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
	595	&tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,       &tms340x0_device::fill_4_opx,     &tms340x0_device::fill_4_opx_trans,
	596
	597	&tms340x0_device::fill_8_op0,     &tms340x0_device::fill_8_op0_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
	598	&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
	599	&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
	600	&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
	601	&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
	602	&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
	603	&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
	604	&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
	605	&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
	606	&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
	607	&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
	608	&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
	609	&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
	610	&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
	611	&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
	612	&tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,       &tms340x0_device::fill_8_opx,     &tms340x0_device::fill_8_opx_trans,
	613
	614	&tms340x0_device::fill_16_op0,    &tms340x0_device::fill_16_op0_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
	615	&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
	616	&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
	617	&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
	618	&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
	619	&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
	620	&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
	621	&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
	622	&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
	623	&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
	624	&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
	625	&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
	626	&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
	627	&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
	628	&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,
	629	&tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans,      &tms340x0_device::fill_16_opx,    &tms340x0_device::fill_16_opx_trans
	630	};
	631
	632
	633	#define RECURSIVE_INCLUDE
	634
	635	/* non-transparent replace ops */
	636	#define PIXEL_OP(src, mask, pixel)      pixel = pixel
	637	#define PIXEL_OP_TIMING                 2
	638	#define PIXEL_OP_REQUIRES_SOURCE        0
	639	#define TRANSPARENCY                    0
	640
	641	/* 1bpp cases */
	642	#define BITS_PER_PIXEL                  1
	643	#define FUNCTION_NAME(base)             base##_1_op0
	644	#include "34010gfx.inc"
	645	#undef FUNCTION_NAME
	646	#undef BITS_PER_PIXEL
	647
	648	/* 2bpp cases */
	649	#define BITS_PER_PIXEL                  2
	650	#define FUNCTION_NAME(base)             base##_2_op0
	651	#include "34010gfx.inc"
	652	#undef FUNCTION_NAME
	653	#undef BITS_PER_PIXEL
	654
	655	/* 4bpp cases */
	656	#define BITS_PER_PIXEL                  4
	657	#define FUNCTION_NAME(base)             base##_4_op0
	658	#include "34010gfx.inc"
	659	#undef FUNCTION_NAME
	660	#undef BITS_PER_PIXEL
	661
	662	/* 8bpp cases */
	663	#define BITS_PER_PIXEL                  8
	664	#define FUNCTION_NAME(base)             base##_8_op0
	665	#include "34010gfx.inc"
	666	#undef FUNCTION_NAME
	667	#undef BITS_PER_PIXEL
	668
	669	/* 16bpp cases */
	670	#define BITS_PER_PIXEL                  16
	671	#define FUNCTION_NAME(base)             base##_16_op0
	672	#include "34010gfx.inc"
	673	#undef FUNCTION_NAME
	674	#undef BITS_PER_PIXEL
	675
	676	#undef TRANSPARENCY
	677	#undef PIXEL_OP_REQUIRES_SOURCE
	678	#undef PIXEL_OP_TIMING
	679	#undef PIXEL_OP
	680
	681
	682	#define PIXEL_OP(src, mask, pixel)      pixel = (this->*m_pixel_op)(src, mask, pixel)
	683	#define PIXEL_OP_TIMING                 m_pixel_op_timing
	684	#define PIXEL_OP_REQUIRES_SOURCE        1
	685	#define TRANSPARENCY                    0
	686
	687	/* 1bpp cases */
	688	#define BITS_PER_PIXEL                  1
	689	#define FUNCTION_NAME(base)             base##_1_opx
	690	#include "34010gfx.inc"
	691	#undef FUNCTION_NAME
	692	#undef BITS_PER_PIXEL
	693
	694	/* 2bpp cases */
	695	#define BITS_PER_PIXEL                  2
	696	#define FUNCTION_NAME(base)             base##_2_opx
	697	#include "34010gfx.inc"
	698	#undef FUNCTION_NAME
	699	#undef BITS_PER_PIXEL
	700
	701	/* 4bpp cases */
	702	#define BITS_PER_PIXEL                  4
	703	#define FUNCTION_NAME(base)             base##_4_opx
	704	#include "34010gfx.inc"
	705	#undef FUNCTION_NAME
	706	#undef BITS_PER_PIXEL
	707
	708	/* 8bpp cases */
	709	#define BITS_PER_PIXEL                  8
	710	#define FUNCTION_NAME(base)             base##_8_opx
	711	#include "34010gfx.inc"
	712	#undef FUNCTION_NAME
	713	#undef BITS_PER_PIXEL
	714
	715	/* 16bpp cases */
	716	#define BITS_PER_PIXEL                  16
	717	#define FUNCTION_NAME(base)             base##_16_opx
	718	#include "34010gfx.inc"
	719	#undef FUNCTION_NAME
	720	#undef BITS_PER_PIXEL
	721
	722	#undef TRANSPARENCY
	723	#undef PIXEL_OP_REQUIRES_SOURCE
	724	#undef PIXEL_OP_TIMING
	725	#undef PIXEL_OP
	726
	727
	728	/* transparent replace ops */
	729	#define PIXEL_OP(src, mask, pixel)      pixel = pixel
	730	#define PIXEL_OP_REQUIRES_SOURCE        0
	731	#define PIXEL_OP_TIMING                 4
	732	#define TRANSPARENCY                    1
	733
	734	/* 1bpp cases */
	735	#define BITS_PER_PIXEL                  1
	736	#define FUNCTION_NAME(base)             base##_1_op0_trans
	737	#include "34010gfx.inc"
	738	#undef FUNCTION_NAME
	739	#undef BITS_PER_PIXEL
	740
	741	/* 2bpp cases */
	742	#define BITS_PER_PIXEL                  2
	743	#define FUNCTION_NAME(base)             base##_2_op0_trans
	744	#include "34010gfx.inc"
	745	#undef FUNCTION_NAME
	746	#undef BITS_PER_PIXEL
	747
	748	/* 4bpp cases */
	749	#define BITS_PER_PIXEL                  4
	750	#define FUNCTION_NAME(base)             base##_4_op0_trans
	751	#include "34010gfx.inc"
	752	#undef FUNCTION_NAME
	753	#undef BITS_PER_PIXEL
	754
	755	/* 8bpp cases */
	756	#define BITS_PER_PIXEL                  8
	757	#define FUNCTION_NAME(base)             base##_8_op0_trans
	758	#include "34010gfx.inc"
	759	#undef FUNCTION_NAME
	760	#undef BITS_PER_PIXEL
	761
	762	/* 16bpp cases */
	763	#define BITS_PER_PIXEL                  16
	764	#define FUNCTION_NAME(base)             base##_16_op0_trans
	765	#include "34010gfx.inc"
	766	#undef FUNCTION_NAME
	767	#undef BITS_PER_PIXEL
	768
	769	#undef TRANSPARENCY
	770	#undef PIXEL_OP_REQUIRES_SOURCE
	771	#undef PIXEL_OP_TIMING
	772	#undef PIXEL_OP
	773
	774
	775	#define PIXEL_OP(src, mask, pixel)      pixel = (this->*m_pixel_op)(src, mask, pixel)
	776	#define PIXEL_OP_REQUIRES_SOURCE        1
	777	#define PIXEL_OP_TIMING                 (2+m_pixel_op_timing)
	778	#define TRANSPARENCY                    1
	779
	780	/* 1bpp cases */
	781	#define BITS_PER_PIXEL                  1
	782	#define FUNCTION_NAME(base)             base##_1_opx_trans
	783	#include "34010gfx.inc"
	784	#undef FUNCTION_NAME
	785	#undef BITS_PER_PIXEL
	786
	787	/* 2bpp cases */
	788	#define BITS_PER_PIXEL                  2
	789	#define FUNCTION_NAME(base)             base##_2_opx_trans
	790	#include "34010gfx.inc"
	791	#undef FUNCTION_NAME
	792	#undef BITS_PER_PIXEL
	793
	794	/* 4bpp cases */
	795	#define BITS_PER_PIXEL                  4
	796	#define FUNCTION_NAME(base)             base##_4_opx_trans
	797	#include "34010gfx.inc"
	798	#undef FUNCTION_NAME
	799	#undef BITS_PER_PIXEL
	800
	801	/* 8bpp cases */
	802	#define BITS_PER_PIXEL                  8
	803	#define FUNCTION_NAME(base)             base##_8_opx_trans
	804	#include "34010gfx.inc"
	805	#undef FUNCTION_NAME
	806	#undef BITS_PER_PIXEL
	807
	808	/* 16bpp cases */
	809	#define BITS_PER_PIXEL                  16
	810	#define FUNCTION_NAME(base)             base##_16_opx_trans
	811	#include "34010gfx.inc"
	812	#undef FUNCTION_NAME
	813	#undef BITS_PER_PIXEL
	814
	815	#undef TRANSPARENCY
	816	#undef PIXEL_OP_REQUIRES_SOURCE
	817	#undef PIXEL_OP_TIMING
	818	#undef PIXEL_OP
	819
	820	static const UINT8 pixelsize_lookup[32] =
	821	{
	822	0,0,1,1,2,2,2,2,3,3,3,3,3,3,3,3,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
	823	};
	824
	825
	826	void tms340x0_device::pixblt_b_l(UINT16 op)
	827	{
	828	int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f];
	829	int trans = (IOREG(REG_CONTROL) & 0x20) >> 5;
	830	int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f;
	831	int ix = trans | (rop << 1) | (psize << 6);
	832	if (!P_FLAG()) LOGGFX(("%08X(%3d):PIXBLT B,L (%dx%d) depth=%d\n", m_pc, m_screen->vpos(), DYDX_X(), DYDX_Y(), IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
	833	m_pixel_op = s_pixel_op_table[rop];
	834	m_pixel_op_timing = s_pixel_op_timing_table[rop];
	835	(this->*s_pixblt_b_op_table[ix])(1);
	836	}
	837
	838	void tms340x0_device::pixblt_b_xy(UINT16 op)
	839	{
	840	int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f];
	841	int trans = (IOREG(REG_CONTROL) & 0x20) >> 5;
	842	int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f;
	843	int ix = trans | (rop << 1) | (psize << 6);
	844	if (!P_FLAG()) LOGGFX(("%08X(%3d):PIXBLT B,XY (%d,%d) (%dx%d) depth=%d\n", m_pc, m_screen->vpos(), DADDR_X(), DADDR_Y(), DYDX_X(), DYDX_Y(), IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
	845	m_pixel_op = s_pixel_op_table[rop];
	846	m_pixel_op_timing = s_pixel_op_timing_table[rop];
	847	(this->*s_pixblt_b_op_table[ix])(0);
	848	}
	849
	850	void tms340x0_device::pixblt_l_l(UINT16 op)
	851	{
	852	int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f];
	853	int trans = (IOREG(REG_CONTROL) & 0x20) >> 5;
	854	int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f;
	855	int pbh = (IOREG(REG_CONTROL) >> 8) & 1;
	856	int ix = trans | (rop << 1) | (psize << 6);
	857	if (!P_FLAG()) LOGGFX(("%08X(%3d):PIXBLT L,L (%dx%d) depth=%d\n", m_pc, m_screen->vpos(), DYDX_X(), DYDX_Y(), IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
	858	m_pixel_op = s_pixel_op_table[rop];
	859	m_pixel_op_timing = s_pixel_op_timing_table[rop];
	860	if (!pbh)
	861	(this->*s_pixblt_op_table[ix])(1, 1);
	862	else
	863	(this->*s_pixblt_r_op_table[ix])(1, 1);
	864	}
	865
	866	void tms340x0_device::pixblt_l_xy(UINT16 op)
	867	{
	868	int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f];
	869	int trans = (IOREG(REG_CONTROL) & 0x20) >> 5;
	870	int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f;
	871	int pbh = (IOREG(REG_CONTROL) >> 8) & 1;
	872	int ix = trans | (rop << 1) | (psize << 6);
	873	if (!P_FLAG()) LOGGFX(("%08X(%3d):PIXBLT L,XY (%d,%d) (%dx%d) depth=%d\n", m_pc, m_screen->vpos(), DADDR_X(), DADDR_Y(), DYDX_X(), DYDX_Y(), IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
	874	m_pixel_op = s_pixel_op_table[rop];
	875	m_pixel_op_timing = s_pixel_op_timing_table[rop];
	876	if (!pbh)
	877	(this->*s_pixblt_op_table[ix])(1, 0);
	878	else
	879	(this->*s_pixblt_r_op_table[ix])(1, 0);
	880	}
	881
	882	void tms340x0_device::pixblt_xy_l(UINT16 op)
	883	{
	884	int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f];
	885	int trans = (IOREG(REG_CONTROL) & 0x20) >> 5;
	886	int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f;
	887	int pbh = (IOREG(REG_CONTROL) >> 8) & 1;
	888	int ix = trans | (rop << 1) | (psize << 6);
	889	if (!P_FLAG()) LOGGFX(("%08X(%3d):PIXBLT XY,L (%dx%d) depth=%d\n", m_pc, m_screen->vpos(), DYDX_X(), DYDX_Y(), IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
	890	m_pixel_op = s_pixel_op_table[rop];
	891	m_pixel_op_timing = s_pixel_op_timing_table[rop];
	892	if (!pbh)
	893	(this->*s_pixblt_op_table[ix])(0, 1);
	894	else
	895	(this->*s_pixblt_r_op_table[ix])(0, 1);
	896	}
	897
	898	void tms340x0_device::pixblt_xy_xy(UINT16 op)
	899	{
	900	int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f];
	901	int trans = (IOREG(REG_CONTROL) & 0x20) >> 5;
	902	int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f;
	903	int pbh = (IOREG(REG_CONTROL) >> 8) & 1;
	904	int ix = trans | (rop << 1) | (psize << 6);
	905	if (!P_FLAG()) LOGGFX(("%08X(%3d):PIXBLT XY,XY (%dx%d) depth=%d\n", m_pc, m_screen->vpos(), DYDX_X(), DYDX_Y(), IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
	906	m_pixel_op = s_pixel_op_table[rop];
	907	m_pixel_op_timing = s_pixel_op_timing_table[rop];
	908	if (!pbh)
	909	(this->*s_pixblt_op_table[ix])(0, 0);
	910	else
	911	(this->*s_pixblt_r_op_table[ix])(0, 0);
	912	}
	913
	914	void tms340x0_device::fill_l(UINT16 op)
	915	{
	916	int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f];
	917	int trans = (IOREG(REG_CONTROL) & 0x20) >> 5;
	918	int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f;
	919	int ix = trans | (rop << 1) | (psize << 6);
	920	if (!P_FLAG()) LOGGFX(("%08X(%3d):FILL L (%dx%d) depth=%d\n", m_pc, m_screen->vpos(), DYDX_X(), DYDX_Y(), IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
	921	m_pixel_op = s_pixel_op_table[rop];
	922	m_pixel_op_timing = s_pixel_op_timing_table[rop];
	923	(this->*s_fill_op_table[ix])(1);
	924	}
	925
	926	void tms340x0_device::fill_xy(UINT16 op)
	927	{
	928	int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f];
	929	int trans = (IOREG(REG_CONTROL) & 0x20) >> 5;
	930	int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f;
	931	int ix = trans | (rop << 1) | (psize << 6);
	932	if (!P_FLAG()) LOGGFX(("%08X(%3d):FILL XY (%d,%d) (%dx%d) depth=%d\n", m_pc, m_screen->vpos(), DADDR_X(), DADDR_Y(), DYDX_X(), DYDX_Y(), IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32));
	933	m_pixel_op = s_pixel_op_table[rop];
	934	m_pixel_op_timing = s_pixel_op_timing_table[rop];
	935	(this->*s_fill_op_table[ix])(0);
	936	}
	937
	938
	939	#else
	940
	941
	942	#undef PIXELS_PER_WORD
	943	#undef PIXEL_MASK
	944
	945	#define PIXELS_PER_WORD (16 / BITS_PER_PIXEL)
	946	#define PIXEL_MASK ((1 << BITS_PER_PIXEL) - 1)
	947
	948	void FUNCTION_NAME(tms340x0_device::pixblt)(int src_is_linear, int dst_is_linear)
	949	{
	950	/* if this is the first time through, perform the operation */
	951	if (!P_FLAG())
	952	{
	953	int dx, dy, x, y, /*words,*/ yreverse;
	954	word_write_func word_write;
	955	word_read_func word_read;
	956	UINT32 readwrites = 0;
	957	UINT32 saddr, daddr;
	958	XY dstxy = { 0 };
	959
	960	/* determine read/write functions */
	961	if (IOREG(REG_DPYCTL) & 0x0800)
	962	{
	963	word_write = &tms340x0_device::shiftreg_w;
	964	word_read = &tms340x0_device::shiftreg_r;
	965	}
	966	else
	967	{
	968	word_write = &tms340x0_device::memory_w;
	969	word_read = &tms340x0_device::memory_r;
	970	}
	971
	972	/* compute the starting addresses */
	973	saddr = src_is_linear ? SADDR() : SXYTOL(SADDR_XY());
	974
	975	/* compute the bounds of the operation */
	976	dx = (INT16)DYDX_X();
	977	dy = (INT16)DYDX_Y();
	978
	979	/* apply the window for non-linear destinations */
	980	m_gfxcycles = 7 + (src_is_linear ? 0 : 2);
	981	if (!dst_is_linear)
	982	{
	983	dstxy = DADDR_XY();
	984	m_gfxcycles += 2 + (!src_is_linear) + apply_window("PIXBLT", BITS_PER_PIXEL, &saddr, &dstxy, &dx, &dy);
	985	daddr = DXYTOL(dstxy);
	986	}
	987	else
	988	daddr = DADDR();
	989	daddr &= ~(BITS_PER_PIXEL - 1);
	990	LOGGFX(("  saddr=%08X daddr=%08X sptch=%08X dptch=%08X\n", saddr, daddr, SPTCH(), DPTCH()));
	991
	992	/* bail if we're clipped */
	993	if (dx <= 0 || dy <= 0)
	994	return;
	995
	996	/* window mode 1: just return and interrupt if we are within the window */
	997	if (WINDOW_CHECKING() == 1 && !dst_is_linear)
	998	{
	999	CLR_V();
	1000	DADDR_XY() = dstxy;
	1001	DYDX_X() = dx;
	1002	DYDX_Y() = dy;
	1003	IOREG(REG_INTPEND) |= TMS34010_WV;
	1004	check_interrupt();
	1005	return;
	1006	}
	1007
	1008	/* handle flipping the addresses */
	1009	yreverse = (IOREG(REG_CONTROL) >> 9) & 1;
	1010	if (!src_is_linear || !dst_is_linear)
	1011	{
	1012	if (yreverse)
	1013	{
	1014	saddr += (dy - 1) * m_convsp;
	1015	daddr += (dy - 1) * m_convdp;
	1016	}
	1017	}
	1018
	1019	m_st |= STBIT_P;
	1020
	1021	/* loop over rows */
	1022	for (y = 0; y < dy; y++)
	1023	{
	1024	UINT32 srcwordaddr = saddr >> 4;
	1025	UINT32 dstwordaddr = daddr >> 4;
	1026	UINT8 srcbit = saddr & 15;
	1027	UINT8 dstbit = daddr & 15;
	1028	UINT32 srcword, dstword = 0;
	1029
	1030	/* fetch the initial source word */
	1031	srcword = (this->*word_read)(*m_program, srcwordaddr++ << 1);
	1032	readwrites++;
	1033
	1034	/* fetch the initial dest word */
	1035	if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY || (daddr & 0x0f) != 0)
	1036	{
	1037	dstword = (this->*word_read)(*m_program, dstwordaddr << 1);
	1038	readwrites++;
	1039	}
	1040
	1041	/* loop over pixels */
	1042	for (x = 0; x < dx; x++)
	1043	{
	1044	UINT32 dstmask;
	1045	UINT32 pixel;
	1046
	1047	/* fetch more words if necessary */
	1048	if (srcbit + BITS_PER_PIXEL > 16)
	1049	{
	1050	srcword |= (this->*word_read)(*m_program, srcwordaddr++ << 1) << 16;
	1051	readwrites++;
	1052	}
	1053
	1054	/* extract pixel from source */
	1055	pixel = (srcword >> srcbit) & PIXEL_MASK;
	1056	srcbit += BITS_PER_PIXEL;
	1057	if (srcbit > 16)
	1058	{
	1059	srcbit -= 16;
	1060	srcword >>= 16;
	1061	}
	1062
	1063	/* fetch additional destination word if necessary */
	1064	if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY)
	1065	if (dstbit + BITS_PER_PIXEL > 16)
	1066	{
	1067	dstword |= (this->*word_read)(*m_program, (dstwordaddr + 1) << 1) << 16;
	1068	readwrites++;
	1069	}
	1070
	1071	/* apply pixel operations */
	1072	pixel <<= dstbit;
	1073	dstmask = PIXEL_MASK << dstbit;
	1074	PIXEL_OP(dstword, dstmask, pixel);
	1075	if (!TRANSPARENCY || pixel != 0)
	1076	dstword = (dstword & ~dstmask) | pixel;
	1077
	1078	/* flush destination words */
	1079	dstbit += BITS_PER_PIXEL;
	1080	if (dstbit > 16)
	1081	{
	1082	(this->*word_write)(*m_program, dstwordaddr++ << 1, dstword);
	1083	readwrites++;
	1084	dstbit -= 16;
	1085	dstword >>= 16;
	1086	}
	1087	}
	1088
	1089	/* flush any remaining words */
	1090	if (dstbit > 0)
	1091	{
	1092	/* if we're right-partial, read and mask the remaining bits */
	1093	if (dstbit != 16)
	1094	{
	1095	UINT16 origdst = (this->*word_read)(*m_program, dstwordaddr << 1);
	1096	UINT16 mask = 0xffff << dstbit;
	1097	dstword = (dstword & ~mask) | (origdst & mask);
	1098	readwrites++;
	1099	}
	1100
	1101	(this->*word_write)(*m_program, dstwordaddr++ << 1, dstword);
	1102	readwrites++;
	1103	}
	1104
	1105
	1106
	1107	#if 0
	1108	int left_partials, right_partials, full_words, bitshift, bitshift_alt;
	1109	UINT16 srcword, srcmask, dstword, dstmask, pixel;
	1110	UINT32 swordaddr, dwordaddr;
	1111
	1112	/* determine the bit shift to get from source to dest */
	1113	bitshift = ((daddr & 15) - (saddr & 15)) & 15;
	1114	bitshift_alt = (16 - bitshift) & 15;
	1115
	1116	/* how many left and right partial pixels do we have? */
	1117	left_partials = (PIXELS_PER_WORD - ((daddr & 15) / BITS_PER_PIXEL)) & (PIXELS_PER_WORD - 1);
	1118	right_partials = ((daddr + dx * BITS_PER_PIXEL) & 15) / BITS_PER_PIXEL;
	1119	full_words = dx - left_partials - right_partials;
	1120	if (full_words < 0)
	1121	left_partials = dx, right_partials = full_words = 0;
	1122	else
	1123	full_words /= PIXELS_PER_WORD;
	1124
	1125	/* compute cycles */
	1126	m_gfxcycles += compute_pixblt_cycles(left_partials, right_partials, full_words, PIXEL_OP_TIMING);
	1127
	1128	/* use word addresses each row */
	1129	swordaddr = saddr >> 4;
	1130	dwordaddr = daddr >> 4;
	1131
	1132	/* fetch the initial source word */
	1133	srcword = (this->*word_read)(*m_program, swordaddr++ << 1);
	1134	srcmask = PIXEL_MASK << (saddr & 15);
	1135
	1136	/* handle the left partial word */
	1137	if (left_partials != 0)
	1138	{
	1139	/* fetch the destination word */
	1140	dstword = (this->*word_read)(*m_program, dwordaddr << 1);
	1141	dstmask = PIXEL_MASK << (daddr & 15);
	1142
	1143	/* loop over partials */
	1144	for (x = 0; x < left_partials; x++)
	1145	{
	1146	/* fetch another word if necessary */
	1147	if (srcmask == 0)
	1148	{
	1149	srcword = (this->*word_read)(*m_program, swordaddr++ << 1);
	1150	srcmask = PIXEL_MASK;
	1151	}
	1152
	1153	/* process the pixel */
	1154	pixel = srcword & srcmask;
	1155	if (dstmask > srcmask)
	1156	pixel <<= bitshift;
	1157	else
	1158	pixel >>= bitshift_alt;
	1159	PIXEL_OP(dstword, dstmask, pixel);
	1160	if (!TRANSPARENCY || pixel != 0)
	1161	dstword = (dstword & ~dstmask) | pixel;
	1162
	1163	/* update the source */
	1164	srcmask <<= BITS_PER_PIXEL;
	1165
	1166	/* update the destination */
	1167	dstmask <<= BITS_PER_PIXEL;
	1168	}
	1169
	1170	/* write the result */
	1171	(this->*word_write)(*m_program, dwordaddr++ << 1, dstword);
	1172	}
	1173
	1174	/* loop over full words */
	1175	for (words = 0; words < full_words; words++)
	1176	{
	1177	/* fetch the destination word (if necessary) */
	1178	if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY)
	1179	dstword = (this->*word_read)(*m_program, dwordaddr << 1);
	1180	else
	1181	dstword = 0;
	1182	dstmask = PIXEL_MASK;
	1183
	1184	/* loop over partials */
	1185	for (x = 0; x < PIXELS_PER_WORD; x++)
	1186	{
	1187	/* fetch another word if necessary */
	1188	if (srcmask == 0)
	1189	{
	1190	srcword = (this->*word_read)(*m_program, swordaddr++ << 1);
	1191	srcmask = PIXEL_MASK;
	1192	}
	1193
	1194	/* process the pixel */
	1195	pixel = srcword & srcmask;
	1196	if (dstmask > srcmask)
	1197	pixel <<= bitshift;
	1198	else
	1199	pixel >>= bitshift_alt;
	1200	PIXEL_OP(dstword, dstmask, pixel);
	1201	if (!TRANSPARENCY || pixel != 0)
	1202	dstword = (dstword & ~dstmask) | pixel;
	1203
	1204	/* update the source */
	1205	srcmask <<= BITS_PER_PIXEL;
	1206
	1207	/* update the destination */
	1208	dstmask <<= BITS_PER_PIXEL;
	1209	}
	1210
	1211	/* write the result */
	1212	(this->*word_write)(*m_program, dwordaddr++ << 1, dstword);
	1213	}
	1214
	1215	/* handle the right partial word */
	1216	if (right_partials != 0)
	1217	{
	1218	/* fetch the destination word */
	1219	dstword = (this->*word_read)(*m_program, dwordaddr << 1);
	1220	dstmask = PIXEL_MASK;
	1221
	1222	/* loop over partials */
	1223	for (x = 0; x < right_partials; x++)
	1224	{
	1225	/* fetch another word if necessary */
	1226	if (srcmask == 0)
	1227	{
	1228	LOGGFX(("  right fetch @ %08x\n", swordaddr));
	1229	srcword = (this->*word_read)(*m_program, swordaddr++ << 1);
	1230	srcmask = PIXEL_MASK;
	1231	}
	1232
	1233	/* process the pixel */
	1234	pixel = srcword & srcmask;
	1235	if (dstmask > srcmask)
	1236	pixel <<= bitshift;
	1237	else
	1238	pixel >>= bitshift_alt;
	1239	PIXEL_OP(dstword, dstmask, pixel);
	1240	if (!TRANSPARENCY || pixel != 0)
	1241	dstword = (dstword & ~dstmask) | pixel;
	1242
	1243	/* update the source */
	1244	srcmask <<= BITS_PER_PIXEL;
	1245
	1246	/* update the destination */
	1247	dstmask <<= BITS_PER_PIXEL;
	1248	}
	1249
	1250	/* write the result */
	1251	(this->*word_write)(*m_program, dwordaddr++ << 1, dstword);
	1252	}
	1253	#endif
	1254
	1255	/* update for next row */
	1256	if (!yreverse)
	1257	{
	1258	saddr += SPTCH();
	1259	daddr += DPTCH();
	1260	}
	1261	else
	1262	{
	1263	saddr -= SPTCH();
	1264	daddr -= DPTCH();
	1265	}
	1266	}
	1267
	1268	m_gfxcycles += readwrites * 2 + dx * dy * (PIXEL_OP_TIMING - 2);
	1269
	1270	LOGGFX(("  (%d cycles)\n", m_gfxcycles));
	1271	}
	1272
	1273	/* eat cycles */
	1274	if (m_gfxcycles > m_icount)
	1275	{
	1276	m_gfxcycles -= m_icount;
	1277	m_icount = 0;
	1278	m_pc -= 0x10;
	1279	}
	1280	else
	1281	{
	1282	m_icount -= m_gfxcycles;
	1283	m_st &= ~STBIT_P;
	1284	if (src_is_linear && dst_is_linear)
	1285	SADDR() += DYDX_Y() * SPTCH();
	1286	else if (src_is_linear)
	1287	SADDR() += DYDX_Y() * SPTCH();
	1288	else
	1289	SADDR_Y() += DYDX_Y();
	1290	if (dst_is_linear)
	1291	DADDR() += DYDX_Y() * DPTCH();
	1292	else
	1293	DADDR_Y() += DYDX_Y();
	1294	}
	1295	}
	1296
	1297	void FUNCTION_NAME(tms340x0_device::pixblt_r)(int src_is_linear, int dst_is_linear)
	1298	{
	1299	/* if this is the first time through, perform the operation */
	1300	if (!P_FLAG())
	1301	{
	1302	int dx, dy, x, y, words, yreverse;
	1303	word_write_func word_write;
	1304	word_read_func word_read;
	1305	UINT32 saddr, daddr;
	1306	XY dstxy = { 0 };
	1307
	1308	/* determine read/write functions */
	1309	if (IOREG(REG_DPYCTL) & 0x0800)
	1310	{
	1311	word_write = &tms340x0_device::shiftreg_w;
	1312	word_read = &tms340x0_device::shiftreg_r;
	1313	}
	1314	else
	1315	{
	1316	word_write = &tms340x0_device::memory_w;
	1317	word_read = &tms340x0_device::memory_r;
	1318	}
	1319
	1320	/* compute the starting addresses */
	1321	saddr = src_is_linear ? SADDR() : SXYTOL(SADDR_XY());
	1322	if ((saddr & (BITS_PER_PIXEL - 1)) != 0) osd_printf_debug("PIXBLT_R%d with odd saddr\n", BITS_PER_PIXEL);
	1323	saddr &= ~(BITS_PER_PIXEL - 1);
	1324
	1325	/* compute the bounds of the operation */
	1326	dx = (INT16)DYDX_X();
	1327	dy = (INT16)DYDX_Y();
	1328
	1329	/* apply the window for non-linear destinations */
	1330	m_gfxcycles = 7 + (src_is_linear ? 0 : 2);
	1331	if (!dst_is_linear)
	1332	{
	1333	dstxy = DADDR_XY();
	1334	m_gfxcycles += 2 + (!src_is_linear) + apply_window("PIXBLT R", BITS_PER_PIXEL, &saddr, &dstxy, &dx, &dy);
	1335	daddr = DXYTOL(dstxy);
	1336	}
	1337	else
	1338	daddr = DADDR();
	1339	if ((daddr & (BITS_PER_PIXEL - 1)) != 0) osd_printf_debug("PIXBLT_R%d with odd daddr\n", BITS_PER_PIXEL);
	1340	daddr &= ~(BITS_PER_PIXEL - 1);
	1341	LOGGFX(("  saddr=%08X daddr=%08X sptch=%08X dptch=%08X\n", saddr, daddr, SPTCH(), DPTCH()));
	1342
	1343	/* bail if we're clipped */
	1344	if (dx <= 0 || dy <= 0)
	1345	return;
	1346
	1347	/* window mode 1: just return and interrupt if we are within the window */
	1348	if (WINDOW_CHECKING() == 1 && !dst_is_linear)
	1349	{
	1350	CLR_V();
	1351	DADDR_XY() = dstxy;
	1352	DYDX_X() = dx;
	1353	DYDX_Y() = dy;
	1354	IOREG(REG_INTPEND) |= TMS34010_WV;
	1355	check_interrupt();
	1356	return;
	1357	}
	1358
	1359	/* handle flipping the addresses */
	1360	yreverse = (IOREG(REG_CONTROL) >> 9) & 1;
	1361	if (!src_is_linear || !dst_is_linear)
	1362	{
	1363	saddr += dx * BITS_PER_PIXEL;
	1364	daddr += dx * BITS_PER_PIXEL;
	1365	if (yreverse)
	1366	{
	1367	saddr += (dy - 1) * m_convsp;
	1368	daddr += (dy - 1) * m_convdp;
	1369	}
	1370	}
	1371
	1372	m_st |= STBIT_P;
	1373
	1374	/* loop over rows */
	1375	for (y = 0; y < dy; y++)
	1376	{
	1377	int left_partials, right_partials, full_words, bitshift, bitshift_alt;
	1378	UINT16 srcword, srcmask, dstword, dstmask, pixel;
	1379	UINT32 swordaddr, dwordaddr;
	1380
	1381	/* determine the bit shift to get from source to dest */
	1382	bitshift = ((daddr & 15) - (saddr & 15)) & 15;
	1383	bitshift_alt = (16 - bitshift) & 15;
	1384
	1385	/* how many left and right partial pixels do we have? */
	1386	left_partials = (PIXELS_PER_WORD - (((daddr - dx * BITS_PER_PIXEL) & 15) / BITS_PER_PIXEL)) & (PIXELS_PER_WORD - 1);
	1387	right_partials = (daddr & 15) / BITS_PER_PIXEL;
	1388	full_words = dx - left_partials - right_partials;
	1389	if (full_words < 0)
	1390	right_partials = dx, left_partials = full_words = 0;
	1391	else
	1392	full_words /= PIXELS_PER_WORD;
	1393
	1394	/* compute cycles */
	1395	m_gfxcycles += compute_pixblt_cycles(left_partials, right_partials, full_words, PIXEL_OP_TIMING);
	1396
	1397	/* use word addresses each row */
	1398	swordaddr = (saddr + 15) >> 4;
	1399	dwordaddr = (daddr + 15) >> 4;
	1400
	1401	/* fetch the initial source word */
	1402	srcword = (this->*word_read)(*m_program, --swordaddr << 1);
	1403	srcmask = PIXEL_MASK << ((saddr - BITS_PER_PIXEL) & 15);
	1404
	1405	/* handle the right partial word */
	1406	if (right_partials != 0)
	1407	{
	1408	/* fetch the destination word */
	1409	dstword = (this->*word_read)(*m_program, --dwordaddr << 1);
	1410	dstmask = PIXEL_MASK << ((daddr - BITS_PER_PIXEL) & 15);
	1411
	1412	/* loop over partials */
	1413	for (x = 0; x < right_partials; x++)
	1414	{
	1415	/* fetch source pixel if necessary */
	1416	if (srcmask == 0)
	1417	{
	1418	srcword = (this->*word_read)(*m_program, --swordaddr << 1);
	1419	srcmask = PIXEL_MASK << (16 - BITS_PER_PIXEL);
	1420	}
	1421
	1422	/* process the pixel */
	1423	pixel = srcword & srcmask;
	1424	if (dstmask > srcmask)
	1425	pixel <<= bitshift;
	1426	else
	1427	pixel >>= bitshift_alt;
	1428	PIXEL_OP(dstword, dstmask, pixel);
	1429	if (!TRANSPARENCY || pixel != 0)
	1430	dstword = (dstword & ~dstmask) | pixel;
	1431
	1432	#if (BITS_PER_PIXEL<16)
	1433	/* update the source */
	1434	srcmask >>= BITS_PER_PIXEL;
	1435
	1436	/* update the destination */
	1437	dstmask >>= BITS_PER_PIXEL;
	1438	#else
	1439	srcmask = 0;
	1440	dstmask = 0;
	1441	#endif
	1442	}
	1443
	1444	/* write the result */
	1445	(this->*word_write)(*m_program, dwordaddr << 1, dstword);
	1446	}
	1447
	1448	/* loop over full words */
	1449	for (words = 0; words < full_words; words++)
	1450	{
	1451	/* fetch the destination word (if necessary) */
	1452	dwordaddr--;
	1453	if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY)
	1454	dstword = (this->*word_read)(*m_program, dwordaddr << 1);
	1455	else
	1456	dstword = 0;
	1457	dstmask = PIXEL_MASK << (16 - BITS_PER_PIXEL);
	1458
	1459	/* loop over partials */
	1460	for (x = 0; x < PIXELS_PER_WORD; x++)
	1461	{
	1462	/* fetch source pixel if necessary */
	1463	if (srcmask == 0)
	1464	{
	1465	srcword = (this->*word_read)(*m_program, --swordaddr << 1);
	1466	srcmask = PIXEL_MASK << (16 - BITS_PER_PIXEL);
	1467	}
	1468
	1469	/* process the pixel */
	1470	pixel = srcword & srcmask;
	1471	if (dstmask > srcmask)
	1472	pixel <<= bitshift;
	1473	else
	1474	pixel >>= bitshift_alt;
	1475	PIXEL_OP(dstword, dstmask, pixel);
	1476	if (!TRANSPARENCY || pixel != 0)
	1477	dstword = (dstword & ~dstmask) | pixel;
	1478
	1479	#if (BITS_PER_PIXEL<16)
	1480	/* update the source */
	1481	srcmask >>= BITS_PER_PIXEL;
	1482
	1483	/* update the destination */
	1484	dstmask >>= BITS_PER_PIXEL;
	1485	#else
	1486	srcmask = 0;
	1487	dstmask = 0;
	1488	#endif
	1489	}
	1490
	1491	/* write the result */
	1492	(this->*word_write)(*m_program, dwordaddr << 1, dstword);
	1493	}
	1494
	1495	/* handle the left partial word */
	1496	if (left_partials != 0)
	1497	{
	1498	/* fetch the destination word */
	1499	dstword = (this->*word_read)(*m_program, --dwordaddr << 1);
	1500	dstmask = PIXEL_MASK << (16 - BITS_PER_PIXEL);
	1501
	1502	/* loop over partials */
	1503	for (x = 0; x < left_partials; x++)
	1504	{
	1505	/* fetch the source pixel if necessary */
	1506	if (srcmask == 0)
	1507	{
	1508	srcword = (this->*word_read)(*m_program, --swordaddr << 1);
	1509	srcmask = PIXEL_MASK << (16 - BITS_PER_PIXEL);
	1510	}
	1511
	1512	/* process the pixel */
	1513	pixel = srcword & srcmask;
	1514	if (dstmask > srcmask)
	1515	pixel <<= bitshift;
	1516	else
	1517	pixel >>= bitshift_alt;
	1518	PIXEL_OP(dstword, dstmask, pixel);
	1519	if (!TRANSPARENCY || pixel != 0)
	1520	dstword = (dstword & ~dstmask) | pixel;
	1521
	1522	#if (BITS_PER_PIXEL<16)
	1523	/* update the source */
	1524	srcmask >>= BITS_PER_PIXEL;
	1525
	1526	/* update the destination */
	1527	dstmask >>= BITS_PER_PIXEL;
	1528	#else
	1529	srcmask = 0;
	1530	dstmask = 0;
	1531	#endif
	1532	}
	1533
	1534	/* write the result */
	1535	(this->*word_write)(*m_program, dwordaddr << 1, dstword);
	1536	}
	1537
	1538	/* update for next row */
	1539	if (!yreverse)
	1540	{
	1541	saddr += SPTCH();
	1542	daddr += DPTCH();
	1543	}
	1544	else
	1545	{
	1546	saddr -= SPTCH();
	1547	daddr -= DPTCH();
	1548	}
	1549	}
	1550	LOGGFX(("  (%d cycles)\n", m_gfxcycles));
	1551	}
	1552
	1553	/* eat cycles */
	1554	if (m_gfxcycles > m_icount)
	1555	{
	1556	m_gfxcycles -= m_icount;
	1557	m_icount = 0;
	1558	m_pc -= 0x10;
	1559	}
	1560	else
	1561	{
	1562	m_icount -= m_gfxcycles;
	1563	m_st &= ~STBIT_P;
	1564	if (src_is_linear && dst_is_linear)
	1565	SADDR() += DYDX_Y() * SPTCH();
	1566	else if (src_is_linear)
	1567	SADDR() += DYDX_Y() * SPTCH();
	1568	else
	1569	SADDR_Y() += DYDX_Y();
	1570	if (dst_is_linear)
	1571	DADDR() += DYDX_Y() * DPTCH();
	1572	else
	1573	DADDR_Y() += DYDX_Y();
	1574	}
	1575	}
	1576
	1577	void FUNCTION_NAME(tms340x0_device::pixblt_b)(int dst_is_linear)
	1578	{
	1579	/* if this is the first time through, perform the operation */
	1580	if (!P_FLAG())
	1581	{
	1582	int dx, dy, x, y, words, left_partials, right_partials, full_words;
	1583	word_write_func word_write;
	1584	word_read_func word_read;
	1585	UINT32 saddr, daddr;
	1586	XY dstxy = { 0 };
	1587
	1588	/* determine read/write functions */
	1589	if (IOREG(REG_DPYCTL) & 0x0800)
	1590	{
	1591	word_write = &tms340x0_device::shiftreg_w;
	1592	word_read = &tms340x0_device::shiftreg_r;
	1593	}
	1594	else
	1595	{
	1596	word_write = &tms340x0_device::memory_w;
	1597	word_read = &tms340x0_device::memory_r;
	1598	}
	1599
	1600	/* compute the starting addresses */
	1601	saddr = SADDR();
	1602
	1603	/* compute the bounds of the operation */
	1604	dx = (INT16)DYDX_X();
	1605	dy = (INT16)DYDX_Y();
	1606
	1607	/* apply the window for non-linear destinations */
	1608	m_gfxcycles = 4;
	1609	if (!dst_is_linear)
	1610	{
	1611	dstxy = DADDR_XY();
	1612	m_gfxcycles += 2 + apply_window("PIXBLT B", 1, &saddr, &dstxy, &dx, &dy);
	1613	daddr = DXYTOL(dstxy);
	1614	}
	1615	else
	1616	daddr = DADDR();
	1617	daddr &= ~(BITS_PER_PIXEL - 1);
	1618	LOGGFX(("  saddr=%08X daddr=%08X sptch=%08X dptch=%08X\n", saddr, daddr, SPTCH(), DPTCH()));
	1619
	1620	/* bail if we're clipped */
	1621	if (dx <= 0 || dy <= 0)
	1622	return;
	1623
	1624	/* window mode 1: just return and interrupt if we are within the window */
	1625	if (WINDOW_CHECKING() == 1 && !dst_is_linear)
	1626	{
	1627	CLR_V();
	1628	DADDR_XY() = dstxy;
	1629	DYDX_X() = dx;
	1630	DYDX_Y() = dy;
	1631	IOREG(REG_INTPEND) |= TMS34010_WV;
	1632	check_interrupt();
	1633	return;
	1634	}
	1635
	1636	/* how many left and right partial pixels do we have? */
	1637	left_partials = (PIXELS_PER_WORD - ((daddr & 15) / BITS_PER_PIXEL)) & (PIXELS_PER_WORD - 1);
	1638	right_partials = ((daddr + dx * BITS_PER_PIXEL) & 15) / BITS_PER_PIXEL;
	1639	full_words = dx - left_partials - right_partials;
	1640	if (full_words < 0)
	1641	left_partials = dx, right_partials = full_words = 0;
	1642	else
	1643	full_words /= PIXELS_PER_WORD;
	1644
	1645	/* compute cycles */
	1646	m_gfxcycles += compute_pixblt_b_cycles(left_partials, right_partials, full_words, dy, PIXEL_OP_TIMING, BITS_PER_PIXEL);
	1647	m_st |= STBIT_P;
	1648
	1649	/* loop over rows */
	1650	for (y = 0; y < dy; y++)
	1651	{
	1652	UINT16 srcword, srcmask, dstword, dstmask, pixel;
	1653	UINT32 swordaddr, dwordaddr;
	1654
	1655	/* use byte addresses each row */
	1656	swordaddr = saddr >> 4;
	1657	dwordaddr = daddr >> 4;
	1658
	1659	/* fetch the initial source word */
	1660	srcword = (this->*word_read)(*m_program, swordaddr++ << 1);
	1661	srcmask = 1 << (saddr & 15);
	1662
	1663	/* handle the left partial word */
	1664	if (left_partials != 0)
	1665	{
	1666	/* fetch the destination word */
	1667	dstword = (this->*word_read)(*m_program, dwordaddr << 1);
	1668	dstmask = PIXEL_MASK << (daddr & 15);
	1669
	1670	/* loop over partials */
	1671	for (x = 0; x < left_partials; x++)
	1672	{
	1673	/* process the pixel */
	1674	pixel = (srcword & srcmask) ? COLOR1() : COLOR0();
	1675	pixel &= dstmask;
	1676	PIXEL_OP(dstword, dstmask, pixel);
	1677	if (!TRANSPARENCY || pixel != 0)
	1678	dstword = (dstword & ~dstmask) | pixel;
	1679
	1680	/* update the source */
	1681	srcmask <<= 1;
	1682	if (srcmask == 0)
	1683	{
	1684	srcword = (this->*word_read)(*m_program, swordaddr++ << 1);
	1685	srcmask = 0x0001;
	1686	}
	1687
	1688	/* update the destination */
	1689	dstmask = dstmask << BITS_PER_PIXEL;
	1690	}
	1691
	1692	/* write the result */
	1693	(this->*word_write)(*m_program, dwordaddr++ << 1, dstword);
	1694	}
	1695
	1696	/* loop over full words */
	1697	for (words = 0; words < full_words; words++)
	1698	{
	1699	/* fetch the destination word (if necessary) */
	1700	if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY)
	1701	dstword = (this->*word_read)(*m_program, dwordaddr << 1);
	1702	else
	1703	dstword = 0;
	1704	dstmask = PIXEL_MASK;
	1705
	1706	/* loop over partials */
	1707	for (x = 0; x < PIXELS_PER_WORD; x++)
	1708	{
	1709	/* process the pixel */
	1710	pixel = (srcword & srcmask) ? COLOR1() : COLOR0();
	1711	pixel &= dstmask;
	1712	PIXEL_OP(dstword, dstmask, pixel);
	1713	if (!TRANSPARENCY || pixel != 0)
	1714	dstword = (dstword & ~dstmask) | pixel;
	1715
	1716	/* update the source */
	1717	srcmask <<= 1;
	1718	if (srcmask == 0)
	1719	{
	1720	srcword = (this->*word_read)(*m_program, swordaddr++ << 1);
	1721	srcmask = 0x0001;
	1722	}
	1723
	1724	/* update the destination */
	1725	dstmask = dstmask << BITS_PER_PIXEL;
	1726	}
	1727
	1728	/* write the result */
	1729	(this->*word_write)(*m_program, dwordaddr++ << 1, dstword);
	1730	}
	1731
	1732	/* handle the right partial word */
	1733	if (right_partials != 0)
	1734	{
	1735	/* fetch the destination word */
	1736	dstword = (this->*word_read)(*m_program, dwordaddr << 1);
	1737	dstmask = PIXEL_MASK;
	1738
	1739	/* loop over partials */
	1740	for (x = 0; x < right_partials; x++)
	1741	{
	1742	/* process the pixel */
	1743	pixel = (srcword & srcmask) ? COLOR1() : COLOR0();
	1744	pixel &= dstmask;
	1745	PIXEL_OP(dstword, dstmask, pixel);
	1746	if (!TRANSPARENCY || pixel != 0)
	1747	dstword = (dstword & ~dstmask) | pixel;
	1748
	1749	/* update the source */
	1750	srcmask <<= 1;
	1751	if (srcmask == 0)
	1752	{
	1753	srcword = (this->*word_read)(*m_program, swordaddr++ << 1);
	1754	srcmask = 0x0001;
	1755	}
	1756
	1757	/* update the destination */
	1758	dstmask = dstmask << BITS_PER_PIXEL;
	1759	}
	1760
	1761	/* write the result */
	1762	(this->*word_write)(*m_program, dwordaddr++ << 1, dstword);
	1763	}
	1764
	1765	/* update for next row */
	1766	saddr += SPTCH();
	1767	daddr += DPTCH();
	1768	}
	1769	LOGGFX(("  (%d cycles)\n", m_gfxcycles));
	1770	}
	1771
	1772	/* eat cycles */
	1773	if (m_gfxcycles > m_icount)
	1774	{
	1775	m_gfxcycles -= m_icount;
	1776	m_icount = 0;
	1777	m_pc -= 0x10;
	1778	}
	1779	else
	1780	{
	1781	m_icount -= m_gfxcycles;
	1782	m_st &= ~STBIT_P;
	1783	SADDR() += DYDX_Y() * SPTCH();
	1784	if (dst_is_linear)
	1785	DADDR() += DYDX_Y() * DPTCH();
	1786	else
	1787	DADDR_Y() += DYDX_Y();
	1788	}
	1789	}
	1790
	1791	void FUNCTION_NAME(tms340x0_device::fill)(int dst_is_linear)
	1792	{
	1793	/* if this is the first time through, perform the operation */
	1794	if (!P_FLAG())
	1795	{
	1796	int dx, dy, x, y, words, left_partials, right_partials, full_words;
	1797	word_write_func word_write;
	1798	word_read_func word_read;
	1799	UINT32 daddr;
	1800	XY dstxy = { 0 };
	1801
	1802	/* determine read/write functions */
	1803	if (IOREG(REG_DPYCTL) & 0x0800)
	1804	{
	1805	word_write = &tms340x0_device::shiftreg_w;
	1806	word_read = &tms340x0_device::dummy_shiftreg_r;
	1807	}
	1808	else
	1809	{
	1810	word_write = &tms340x0_device::memory_w;
	1811	word_read = &tms340x0_device::memory_r;
	1812	}
	1813
	1814	/* compute the bounds of the operation */
	1815	dx = (INT16)DYDX_X();
	1816	dy = (INT16)DYDX_Y();
	1817
	1818	/* apply the window for non-linear destinations */
	1819	m_gfxcycles = 4;
	1820	if (!dst_is_linear)
	1821	{
	1822	dstxy = DADDR_XY();
	1823	m_gfxcycles += 2 + apply_window("FILL", 0, NULL, &dstxy, &dx, &dy);
	1824	daddr = DXYTOL(dstxy);
	1825	}
	1826	else
	1827	daddr = DADDR();
	1828	daddr &= ~(BITS_PER_PIXEL - 1);
	1829	LOGGFX(("  daddr=%08X\n", daddr));
	1830
	1831	/* bail if we're clipped */
	1832	if (dx <= 0 || dy <= 0)
	1833	return;
	1834
	1835	/* window mode 1: just return and interrupt if we are within the window */
	1836	if (WINDOW_CHECKING() == 1 && !dst_is_linear)
	1837	{
	1838	CLR_V();
	1839	DADDR_XY() = dstxy;
	1840	DYDX_X() = dx;
	1841	DYDX_Y() = dy;
	1842	IOREG(REG_INTPEND) |= TMS34010_WV;
	1843	check_interrupt();
	1844	return;
	1845	}
	1846
	1847	/* how many left and right partial pixels do we have? */
	1848	left_partials = (PIXELS_PER_WORD - ((daddr & 15) / BITS_PER_PIXEL)) & (PIXELS_PER_WORD - 1);
	1849	right_partials = ((daddr + dx * BITS_PER_PIXEL) & 15) / BITS_PER_PIXEL;
	1850	full_words = dx - left_partials - right_partials;
	1851	if (full_words < 0)
	1852	left_partials = dx, right_partials = full_words = 0;
	1853	else
	1854	full_words /= PIXELS_PER_WORD;
	1855
	1856	/* compute cycles */
	1857	m_gfxcycles += 2;
	1858	m_st |= STBIT_P;
	1859
	1860	/* loop over rows */
	1861	for (y = 0; y < dy; y++)
	1862	{
	1863	UINT16 dstword, dstmask, pixel;
	1864	UINT32 dwordaddr;
	1865
	1866	/* use byte addresses each row */
	1867	dwordaddr = daddr >> 4;
	1868
	1869	/* compute cycles */
	1870	m_gfxcycles += compute_fill_cycles(left_partials, right_partials, full_words, PIXEL_OP_TIMING);
	1871
	1872	/* handle the left partial word */
	1873	if (left_partials != 0)
	1874	{
	1875	/* fetch the destination word */
	1876	dstword = (this->*word_read)(*m_program, dwordaddr << 1);
	1877	dstmask = PIXEL_MASK << (daddr & 15);
	1878
	1879	/* loop over partials */
	1880	for (x = 0; x < left_partials; x++)
	1881	{
	1882	/* process the pixel */
	1883	pixel = COLOR1() & dstmask;
	1884	PIXEL_OP(dstword, dstmask, pixel);
	1885	if (!TRANSPARENCY || pixel != 0)
	1886	dstword = (dstword & ~dstmask) | pixel;
	1887
	1888	/* update the destination */
	1889	dstmask = dstmask << BITS_PER_PIXEL;
	1890	}
	1891
	1892	/* write the result */
	1893	(this->*word_write)(*m_program, dwordaddr++ << 1, dstword);
	1894	}
	1895
	1896	/* loop over full words */
	1897	for (words = 0; words < full_words; words++)
	1898	{
	1899	/* fetch the destination word (if necessary) */
	1900	if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY)
	1901	dstword = (this->*word_read)(*m_program, dwordaddr << 1);
	1902	else
	1903	dstword = 0;
	1904	dstmask = PIXEL_MASK;
	1905
	1906	/* loop over partials */
	1907	for (x = 0; x < PIXELS_PER_WORD; x++)
	1908	{
	1909	/* process the pixel */
	1910	pixel = COLOR1() & dstmask;
	1911	PIXEL_OP(dstword, dstmask, pixel);
	1912	if (!TRANSPARENCY || pixel != 0)
	1913	dstword = (dstword & ~dstmask) | pixel;
	1914
	1915	/* update the destination */
	1916	dstmask = dstmask << BITS_PER_PIXEL;
	1917	}
	1918
	1919	/* write the result */
	1920	(this->*word_write)(*m_program, dwordaddr++ << 1, dstword);
	1921	}
	1922
	1923	/* handle the right partial word */
	1924	if (right_partials != 0)
	1925	{
	1926	/* fetch the destination word */
	1927	dstword = (this->*word_read)(*m_program, dwordaddr << 1);
	1928	dstmask = PIXEL_MASK;
	1929
	1930	/* loop over partials */
	1931	for (x = 0; x < right_partials; x++)
	1932	{
	1933	/* process the pixel */
	1934	pixel = COLOR1() & dstmask;
	1935	PIXEL_OP(dstword, dstmask, pixel);
	1936	if (!TRANSPARENCY || pixel != 0)
	1937	dstword = (dstword & ~dstmask) | pixel;
	1938
	1939	/* update the destination */
	1940	dstmask = dstmask << BITS_PER_PIXEL;
	1941	}
	1942
	1943	/* write the result */
	1944	(this->*word_write)(*m_program, dwordaddr++ << 1, dstword);
	1945	}
	1946
	1947	/* update for next row */
	1948	daddr += DPTCH();
	1949	}
	1950
	1951	LOGGFX(("  (%d cycles)\n", m_gfxcycles));
	1952	}
	1953
	1954	/* eat cycles */
	1955	if (m_gfxcycles > m_icount)
	1956	{
	1957	m_gfxcycles -= m_icount;
	1958	m_icount = 0;
	1959	m_pc -= 0x10;
	1960	}
	1961	else
	1962	{
	1963	m_icount -= m_gfxcycles;
	1964	m_st &= ~STBIT_P;
	1965	if (dst_is_linear)
	1966	DADDR() += DYDX_Y() * DPTCH();
	1967	else
	1968	DADDR_Y() += DYDX_Y();
	1969	}
	1970	}
	1971
	1972	#endif

trunk/src/devices/cpu/tms34010/34010ops.cpp

r250251	r250252
1		// license:BSD-3-Clause
2		// copyright-holders:Alex Pasadyn,Zsolt Vasvari
3		/***************************************************************************
4
5		TMS34010: Portable Texas Instruments TMS34010 emulator
6
7		Copyright Alex Pasadyn/Zsolt Vasvari
8		Parts based on code by Aaron Giles
9
10		***************************************************************************/
11
12
13
14		/***************************************************************************
15		MISC MACROS
16		***************************************************************************/
17
18		#define ZEXTEND(val,width) if (width) (val) &= ((UINT32)0xffffffff >> (32 - (width)))
19		#define SEXTEND(val,width) if (width) (val) = (INT32)((val) << (32 - (width))) >> (32 - (width))
20
21		#define SXYTOL(val)   ((((INT16)(val).y * m_convsp) + ((INT16)(val).x << m_pixelshift)) + OFFSET())
22		#define DXYTOL(val)   ((((INT16)(val).y * m_convdp) + ((INT16)(val).x << m_pixelshift)) + OFFSET())
23		#define MXYTOL(val)   ((((INT16)(val).y * m_convmp) + ((INT16)(val).x << m_pixelshift)) + OFFSET())
24
25		#define COUNT_CYCLES(x)   m_icount -= x
26		#define COUNT_UNKNOWN_CYCLES(x) COUNT_CYCLES(x)
27
28		#define CORRECT_ODD_PC(x) do { if (m_pc & 0x0f) logerror("%s to PC=%08X\n", x, m_pc); m_pc &= ~0x0f; } while (0)
29
30
31
32		/***************************************************************************
33		FLAG HANDLING MACROS
34		***************************************************************************/
35
36		#define SIGN(val)           ((val) & 0x80000000)
37
38		#define CLR_Z()                m_st &= ~STBIT_Z
39		#define CLR_V()                m_st &= ~STBIT_V
40		#define CLR_C()                m_st &= ~STBIT_C
41		#define CLR_N()                m_st &= ~STBIT_N
42		#define CLR_NZ()               m_st &= ~(STBIT_N | STBIT_Z)
43		#define CLR_CZ()               m_st &= ~(STBIT_C | STBIT_Z)
44		#define CLR_ZV()               m_st &= ~(STBIT_Z | STBIT_V)
45		#define CLR_NZV()              m_st &= ~(STBIT_N | STBIT_Z | STBIT_V)
46		#define CLR_NCZ()              m_st &= ~(STBIT_N | STBIT_C | STBIT_Z)
47		#define CLR_NCZV()             m_st &= ~(STBIT_N | STBIT_C | STBIT_Z | STBIT_V)
48
49		#define SET_V_BIT_LO(val,bit) m_st |= ((val) << (28 - (bit))) & STBIT_V
50		#define SET_V_BIT_HI(val,bit) m_st |= ((val) >> ((bit) - 28)) & STBIT_V
51		#define SET_V_LOG(val)        m_st |= (val) << 28
52		#define SET_Z_BIT_LO(val,bit) m_st |= ((val) << (29 - (bit))) & STBIT_Z
53		#define SET_Z_BIT_HI(val,bit) m_st |= ((val) >> ((bit) - 29)) & STBIT_Z
54		#define SET_Z_LOG(val)        m_st |= (val) << 29
55		#define SET_C_BIT_LO(val,bit) m_st |= ((val) << (30 - (bit))) & STBIT_C
56		#define SET_C_BIT_HI(val,bit) m_st |= ((val) >> ((bit) - 30)) & STBIT_C
57		#define SET_C_LOG(val)        m_st |= (val) << 30
58		#define SET_N_BIT(val,bit)    m_st |= ((val) << (31 - (bit))) & STBIT_N
59		#define SET_N_LOG(val)        m_st |= (val) << 31
60
61		#define SET_Z_VAL(val)        SET_Z_LOG((val) == 0)
62		#define SET_N_VAL(val)        SET_N_BIT(val, 31)
63		#define SET_NZ_VAL(val)       SET_Z_VAL(val); SET_N_VAL(val)
64		#define SET_V_SUB(a,b,r)      SET_V_BIT_HI(((a) ^ (b)) & ((a) ^ (r)), 31)
65		#define SET_V_ADD(a,b,r)      SET_V_BIT_HI(~((a) ^ (b)) & ((a) ^ (r)), 31)
66		#define SET_C_SUB(a,b)        SET_C_LOG((UINT32)(b) > (UINT32)(a))
67		#define SET_C_ADD(a,b)        SET_C_LOG((UINT32)~(a) < (UINT32)(b))
68		#define SET_NZV_SUB(a,b,r)    SET_NZ_VAL(r); SET_V_SUB(a,b,r)
69		#define SET_NZCV_SUB(a,b,r)   SET_NZV_SUB(a,b,r); SET_C_SUB(a,b)
70		#define SET_NZCV_ADD(a,b,r)   SET_NZ_VAL(r); SET_V_ADD(a,b,r); SET_C_ADD(a,b)
71
72		static const UINT8 fw_inc[32] = { 32,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 };
73
74
75		/***************************************************************************
76		UNIMPLEMENTED INSTRUCTION
77		***************************************************************************/
78
79		void tms340x0_device::unimpl(UINT16 op)
80		{
81		/* kludge for Super High Impact -- this doesn't seem to cause */
82		/* an illegal opcode exception */
83		if (m_direct->read_word(TOBYTE(m_pc - 0x10)) == 0x0007)
84		return;
85
86		/* 9 Ball Shootout calls to FFDF7468, expecting it */
87		/* to execute the next instruction from FFDF7470 */
88		/* but the instruction at FFDF7460 is an 0x0001 */
89		if (m_direct->read_word(TOBYTE(m_pc - 0x10)) == 0x0001)
90		return;
91
92		PUSH(m_pc);
93		PUSH(m_st);
94		RESET_ST();
95		m_pc = RLONG(0xfffffc20);
96		COUNT_UNKNOWN_CYCLES(16);
97
98		/* extra check to prevent bad things */
99		if (m_pc == 0 || s_opcode_table[m_direct->read_word(TOBYTE(m_pc)) >> 4] == &tms34010_device::unimpl)
100		{
101		set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
102		debugger_break(machine());
103		}
104		}
105
106
107
108		/***************************************************************************
109		X/Y OPERATIONS
110		***************************************************************************/
111
112		#define ADD_XY(R)                               \
113		{                                               \
114		XY  a =  R##REG_XY(SRCREG(op));                 \
115		XY *b = &R##REG_XY(DSTREG(op));                 \
116		CLR_NCZV();                                  \
117		b->x += a.x;                                \
118		b->y += a.y;                                \
119		SET_N_LOG(b->x == 0);                      \
120		SET_C_BIT_LO(b->y, 15);                        \
121		SET_Z_LOG(b->y == 0);                      \
122		SET_V_BIT_LO(b->x, 15);                        \
123		COUNT_CYCLES(1);                            \
124		}
125		void tms340x0_device::add_xy_a(UINT16 op) { ADD_XY(A); }
126		void tms340x0_device::add_xy_b(UINT16 op) { ADD_XY(B); }
127
128		#define SUB_XY(R)                               \
129		{                                               \
130		XY  a =  R##REG_XY(SRCREG(op));                 \
131		XY *b = &R##REG_XY(DSTREG(op));                 \
132		CLR_NCZV();                                  \
133		SET_N_LOG(a.x == b->x);                        \
134		SET_C_LOG(a.y > b->y);                     \
135		SET_Z_LOG(a.y == b->y);                        \
136		SET_V_LOG(a.x > b->x);                     \
137		b->x -= a.x;                                \
138		b->y -= a.y;                                \
139		COUNT_CYCLES(1);                            \
140		}
141		void tms340x0_device::sub_xy_a(UINT16 op) { SUB_XY(A); }
142		void tms340x0_device::sub_xy_b(UINT16 op) { SUB_XY(B); }
143
144		#define CMP_XY(R)                               \
145		{                                               \
146		INT16 res;                                  \
147		XY a = R##REG_XY(DSTREG(op));                   \
148		XY b = R##REG_XY(SRCREG(op));                   \
149		CLR_NCZV();                                  \
150		res = a.x-b.x;                              \
151		SET_N_LOG(res == 0);                       \
152		SET_V_BIT_LO(res, 15);                     \
153		res = a.y-b.y;                              \
154		SET_Z_LOG(res == 0);                       \
155		SET_C_BIT_LO(res, 15);                     \
156		COUNT_CYCLES(1);                            \
157		}
158		void tms340x0_device::cmp_xy_a(UINT16 op) { CMP_XY(A); }
159		void tms340x0_device::cmp_xy_b(UINT16 op) { CMP_XY(B); }
160
161		#define CPW(R)                                  \
162		{                                               \
163		INT32 res = 0;                              \
164		INT16 x = R##REG_X(SRCREG(op));                 \
165		INT16 y = R##REG_Y(SRCREG(op));                 \
166		\
167		CLR_V();                                     \
168		res |= ((WSTART_X() > x) ? 0x20  : 0);       \
169		res |= ((x > WEND_X())   ? 0x40  : 0);       \
170		res |= ((WSTART_Y() > y) ? 0x80  : 0);       \
171		res |= ((y > WEND_Y())   ? 0x100 : 0);       \
172		R##REG(DSTREG(op)) = res;                       \
173		SET_V_LOG(res != 0);                       \
174		COUNT_CYCLES(1);                            \
175		}
176		void tms340x0_device::cpw_a(UINT16 op) { CPW(A); }
177		void tms340x0_device::cpw_b(UINT16 op) { CPW(B); }
178
179		#define CVXYL(R)                                    \
180		{                                                   \
181		R##REG(DSTREG(op)) = DXYTOL(R##REG_XY(SRCREG(op)));     \
182		COUNT_CYCLES(3);                                \
183		}
184		void tms340x0_device::cvxyl_a(UINT16 op) { CVXYL(A); }
185		void tms340x0_device::cvxyl_b(UINT16 op) { CVXYL(B); }
186
187		#define MOVX(R)                                     \
188		{                                                   \
189		R##REG(DSTREG(op)) = (R##REG(DSTREG(op)) & 0xffff0000) | (UINT16)R##REG(SRCREG(op));    \
190		COUNT_CYCLES(1);                                                                    \
191		}
192		void tms340x0_device::movx_a(UINT16 op) { MOVX(A); }
193		void tms340x0_device::movx_b(UINT16 op) { MOVX(B); }
194
195		#define MOVY(R)                                     \
196		{                                                   \
197		R##REG(DSTREG(op)) = (R##REG(SRCREG(op)) & 0xffff0000) | (UINT16)R##REG(DSTREG(op));    \
198		COUNT_CYCLES(1);                                                                    \
199		}
200		void tms340x0_device::movy_a(UINT16 op) { MOVY(A); }
201		void tms340x0_device::movy_b(UINT16 op) { MOVY(B); }
202
203
204
205		/***************************************************************************
206		PIXEL TRANSFER OPERATIONS
207		***************************************************************************/
208
209		#define PIXT_RI(R)                                  \
210		{                                                   \
211		WPIXEL(R##REG(DSTREG(op)),R##REG(SRCREG(op)));  \
212		COUNT_UNKNOWN_CYCLES(2);                        \
213		}
214		void tms340x0_device::pixt_ri_a(UINT16 op) { PIXT_RI(A); }
215		void tms340x0_device::pixt_ri_b(UINT16 op) { PIXT_RI(B); }
216
217		#define PIXT_RIXY(R)                                                                \
218		{                                                                                   \
219		if (WINDOW_CHECKING() != 0)                                                      \
220		{                                                                               \
221		CLR_V();                                                                     \
222		if (R##REG_X(DSTREG(op)) < WSTART_X() || R##REG_X(DSTREG(op)) > WEND_X() ||               \
223		R##REG_Y(DSTREG(op)) < WSTART_Y() || R##REG_Y(DSTREG(op)) > WEND_Y())             \
224		{                                                                           \
225		SET_V_LOG(1);                                                          \
226		goto skip;                                                              \
227		}                                                                           \
228		if (WINDOW_CHECKING() == 1) goto skip;                                       \
229		}                                                                               \
230		WPIXEL(DXYTOL(R##REG_XY(DSTREG(op))),R##REG(SRCREG(op)));                               \
231		skip:                                                                               \
232		COUNT_UNKNOWN_CYCLES(4);                                                        \
233		}
234		void tms340x0_device::pixt_rixy_a(UINT16 op) { PIXT_RIXY(A); }
235		void tms340x0_device::pixt_rixy_b(UINT16 op) { PIXT_RIXY(B); }
236
237		#define PIXT_IR(R)                                  \
238		{                                                   \
239		INT32 temp = RPIXEL(R##REG(SRCREG(op)));            \
240		CLR_V();                                         \
241		R##REG(DSTREG(op)) = temp;                          \
242		SET_V_LOG(temp != 0);                          \
243		COUNT_CYCLES(4);                                \
244		}
245		void tms340x0_device::pixt_ir_a(UINT16 op) { PIXT_IR(A); }
246		void tms340x0_device::pixt_ir_b(UINT16 op) { PIXT_IR(B); }
247
248		#define PIXT_II(R)                                  \
249		{                                                   \
250		WPIXEL(R##REG(DSTREG(op)),RPIXEL(R##REG(SRCREG(op))));  \
251		COUNT_UNKNOWN_CYCLES(4);                        \
252		}
253		void tms340x0_device::pixt_ii_a(UINT16 op) { PIXT_II(A); }
254		void tms340x0_device::pixt_ii_b(UINT16 op) { PIXT_II(B); }
255
256		#define PIXT_IXYR(R)                                \
257		{                                                   \
258		INT32 temp = RPIXEL(SXYTOL(R##REG_XY(SRCREG(op)))); \
259		CLR_V();                                         \
260		R##REG(DSTREG(op)) = temp;                          \
261		SET_V_LOG(temp != 0);                          \
262		COUNT_CYCLES(6);                                \
263		}
264		void tms340x0_device::pixt_ixyr_a(UINT16 op) { PIXT_IXYR(A); }
265		void tms340x0_device::pixt_ixyr_b(UINT16 op) { PIXT_IXYR(B); }
266
267		#define PIXT_IXYIXY(R)                                                              \
268		{                                                                                   \
269		if (WINDOW_CHECKING() != 0)                                                      \
270		{                                                                               \
271		CLR_V();                                                                     \
272		if (R##REG_X(DSTREG(op)) < WSTART_X() || R##REG_X(DSTREG(op)) > WEND_X() ||               \
273		R##REG_Y(DSTREG(op)) < WSTART_Y() || R##REG_Y(DSTREG(op)) > WEND_Y())             \
274		{                                                                           \
275		SET_V_LOG(1);                                                          \
276		goto skip;                                                              \
277		}                                                                           \
278		if (WINDOW_CHECKING() == 1) goto skip;                                       \
279		}                                                                               \
280		WPIXEL(DXYTOL(R##REG_XY(DSTREG(op))),RPIXEL(SXYTOL(R##REG_XY(SRCREG(op)))));            \
281		skip:                                                                               \
282		COUNT_UNKNOWN_CYCLES(7);                                                        \
283		}
284		void tms340x0_device::pixt_ixyixy_a(UINT16 op) { PIXT_IXYIXY(A); }
285		void tms340x0_device::pixt_ixyixy_b(UINT16 op) { PIXT_IXYIXY(B); }
286
287		#define DRAV(R)                                                                     \
288		{                                                                                   \
289		if (WINDOW_CHECKING() != 0)                                                      \
290		{                                                                               \
291		CLR_V();                                                                     \
292		if (R##REG_X(DSTREG(op)) < WSTART_X() || R##REG_X(DSTREG(op)) > WEND_X() ||               \
293		R##REG_Y(DSTREG(op)) < WSTART_Y() || R##REG_Y(DSTREG(op)) > WEND_Y())             \
294		{                                                                           \
295		SET_V_LOG(1);                                                          \
296		goto skip;                                                              \
297		}                                                                           \
298		if (WINDOW_CHECKING() == 1) goto skip;                                       \
299		}                                                                               \
300		WPIXEL(DXYTOL(R##REG_XY(DSTREG(op))),COLOR1());                                      \
301		skip:                                                                               \
302		R##REG_X(DSTREG(op)) += R##REG_X(SRCREG(op));                                           \
303		R##REG_Y(DSTREG(op)) += R##REG_Y(SRCREG(op));                                           \
304		COUNT_UNKNOWN_CYCLES(4);                                                        \
305		}
306		void tms340x0_device::drav_a(UINT16 op) { DRAV(A); }
307		void tms340x0_device::drav_b(UINT16 op) { DRAV(B); }
308
309
310
311		/***************************************************************************
312		ARITHMETIC OPERATIONS
313		***************************************************************************/
314
315		#define ABS(R)                                              \
316		{                                                           \
317		INT32 *rd = &R##REG(DSTREG(op));                            \
318		INT32 r = 0 - *rd;                                      \
319		CLR_NZV();                                               \
320		if (r > 0) *rd = r;                                     \
321		SET_NZ_VAL(r);                                         \
322		SET_V_LOG(r == (INT32)0x80000000);                     \
323		COUNT_CYCLES(1);                                        \
324		}
325		void tms340x0_device::abs_a(UINT16 op) { ABS(A); }
326		void tms340x0_device::abs_b(UINT16 op) { ABS(B); }
327
328		#define ADD(R)                                              \
329		{                                                           \
330		INT32 a = R##REG(SRCREG(op));                               \
331		INT32 *rd = &R##REG(DSTREG(op));                            \
332		INT32 b = *rd;                                          \
333		INT32 r = a + b;                                        \
334		CLR_NCZV();                                              \
335		*rd = r;                                                \
336		SET_NZCV_ADD(a,b,r);                                    \
337		COUNT_CYCLES(1);                                        \
338		}
339		void tms340x0_device::add_a(UINT16 op) { ADD(A); }
340		void tms340x0_device::add_b(UINT16 op) { ADD(B); }
341
342		#define ADDC(R)                                             \
343		{                                                           \
344		/* I'm not sure to which side the carry is added to, should */  \
345		/* verify it against the examples */                    \
346		INT32 a = R##REG(SRCREG(op));                               \
347		INT32 *rd = &R##REG(DSTREG(op));                            \
348		INT32 b = *rd;                                          \
349		INT32 r = a + b + (C_FLAG() ? 1 : 0);                        \
350		CLR_NCZV();                                              \
351		*rd = r;                                                \
352		SET_NZCV_ADD(a,b,r);                                    \
353		COUNT_CYCLES(1);                                        \
354		}
355		void tms340x0_device::addc_a(UINT16 op) { ADDC(A); }
356		void tms340x0_device::addc_b(UINT16 op) { ADDC(B); }
357
358		#define ADDI_W(R)                                           \
359		{                                                           \
360		INT32 a = PARAM_WORD();                              \
361		INT32 *rd = &R##REG(DSTREG(op));                            \
362		INT32 b = *rd;                                          \
363		INT32 r = a + b;                                        \
364		CLR_NCZV();                                              \
365		*rd = r;                                                \
366		SET_NZCV_ADD(a,b,r);                                    \
367		COUNT_CYCLES(2);                                        \
368		}
369		void tms340x0_device::addi_w_a(UINT16 op) { ADDI_W(A); }
370		void tms340x0_device::addi_w_b(UINT16 op) { ADDI_W(B); }
371
372		#define ADDI_L(R)                                           \
373		{                                                           \
374		INT32 a = PARAM_LONG();                              \
375		INT32 *rd = &R##REG(DSTREG(op));                            \
376		INT32 b = *rd;                                          \
377		INT32 r = a + b;                                        \
378		CLR_NCZV();                                              \
379		*rd = r;                                                \
380		SET_NZCV_ADD(a,b,r);                                    \
381		COUNT_CYCLES(3);                                        \
382		}
383		void tms340x0_device::addi_l_a(UINT16 op) { ADDI_L(A); }
384		void tms340x0_device::addi_l_b(UINT16 op) { ADDI_L(B); }
385
386		#define ADDK(R)                                             \
387		{                                                           \
388		INT32 a = fw_inc[PARAM_K(op)];                              \
389		INT32 *rd = &R##REG(DSTREG(op));                            \
390		INT32 b = *rd;                                          \
391		INT32 r = a + b;                                        \
392		CLR_NCZV();                                              \
393		*rd = r;                                                \
394		SET_NZCV_ADD(a,b,r);                                    \
395		COUNT_CYCLES(1);                                        \
396		}
397		void tms340x0_device::addk_a(UINT16 op) { ADDK(A); }
398		void tms340x0_device::addk_b(UINT16 op) { ADDK(B); }
399
400		#define AND(R)                                              \
401		{                                                           \
402		INT32 *rd = &R##REG(DSTREG(op));                            \
403		CLR_Z();                                                 \
404		*rd &= R##REG(SRCREG(op));                                  \
405		SET_Z_VAL(*rd);                                            \
406		COUNT_CYCLES(1);                                        \
407		}
408		void tms340x0_device::and_a(UINT16 op) { AND(A); }
409		void tms340x0_device::and_b(UINT16 op) { AND(B); }
410
411		#define ANDI(R)                                             \
412		{                                                           \
413		INT32 *rd = &R##REG(DSTREG(op));                            \
414		CLR_Z();                                                 \
415		*rd &= ~PARAM_LONG();                                \
416		SET_Z_VAL(*rd);                                            \
417		COUNT_CYCLES(3);                                        \
418		}
419		void tms340x0_device::andi_a(UINT16 op) { ANDI(A); }
420		void tms340x0_device::andi_b(UINT16 op) { ANDI(B); }
421
422		#define ANDN(R)                                             \
423		{                                                           \
424		INT32 *rd = &R##REG(DSTREG(op));                            \
425		CLR_Z();                                                 \
426		*rd &= ~R##REG(SRCREG(op));                                 \
427		SET_Z_VAL(*rd);                                            \
428		COUNT_CYCLES(1);                                        \
429		}
430		void tms340x0_device::andn_a(UINT16 op) { ANDN(A); }
431		void tms340x0_device::andn_b(UINT16 op) { ANDN(B); }
432
433		#define BTST_K(R)                                           \
434		{                                                           \
435		int bit = 31 - PARAM_K(op);                                 \
436		CLR_Z();                                                 \
437		if (bit <= 29)                                          \
438		SET_Z_BIT_LO(~R##REG(DSTREG(op)), bit);                    \
439		else                                                    \
440		SET_Z_BIT_HI(~R##REG(DSTREG(op)), bit);                    \
441		COUNT_CYCLES(1);                                        \
442		}
443		void tms340x0_device::btst_k_a(UINT16 op) { BTST_K(A); }
444		void tms340x0_device::btst_k_b(UINT16 op) { BTST_K(B); }
445
446		#define BTST_R(R)                                           \
447		{                                                           \
448		int bit = R##REG(SRCREG(op)) & 0x1f;                        \
449		CLR_Z();                                                 \
450		if (bit <= 29)                                          \
451		SET_Z_BIT_LO(~R##REG(DSTREG(op)), bit);                    \
452		else                                                    \
453		SET_Z_BIT_HI(~R##REG(DSTREG(op)), bit);                    \
454		COUNT_CYCLES(2);                                        \
455		}
456		void tms340x0_device::btst_r_a(UINT16 op) { BTST_R(A); }
457		void tms340x0_device::btst_r_b(UINT16 op) { BTST_R(B); }
458
459		void tms340x0_device::clrc(UINT16 op)
460		{
461		CLR_C();
462		COUNT_CYCLES(1);
463		}
464
465		#define CMP(R)                                              \
466		{                                                           \
467		INT32 *rs = &R##REG(SRCREG(op));                            \
468		INT32 *rd = &R##REG(DSTREG(op));                            \
469		INT32 r = *rd - *rs;                                    \
470		CLR_NCZV();                                              \
471		SET_NZCV_SUB(*rd,*rs,r);                                \
472		COUNT_CYCLES(1);                                        \
473		}
474		void tms340x0_device::cmp_a(UINT16 op) { CMP(A); }
475		void tms340x0_device::cmp_b(UINT16 op) { CMP(B); }
476
477		#define CMPI_W(R)                                           \
478		{                                                           \
479		INT32 *rd = &R##REG(DSTREG(op));                            \
480		INT32 t = (INT16)~PARAM_WORD();                      \
481		INT32 r = *rd - t;                                      \
482		CLR_NCZV();                                              \
483		SET_NZCV_SUB(*rd,t,r);                                  \
484		COUNT_CYCLES(2);                                        \
485		}
486		void tms340x0_device::cmpi_w_a(UINT16 op) { CMPI_W(A); }
487		void tms340x0_device::cmpi_w_b(UINT16 op) { CMPI_W(B); }
488
489		#define CMPI_L(R)                                           \
490		{                                                           \
491		INT32 *rd = &R##REG(DSTREG(op));                            \
492		INT32 t = ~PARAM_LONG();                             \
493		INT32 r = *rd - t;                                      \
494		CLR_NCZV();                                              \
495		SET_NZCV_SUB(*rd,t,r);                                  \
496		COUNT_CYCLES(3);                                        \
497		}
498		void tms340x0_device::cmpi_l_a(UINT16 op) { CMPI_L(A); }
499		void tms340x0_device::cmpi_l_b(UINT16 op) { CMPI_L(B); }
500
501		void tms340x0_device::dint(UINT16 op)
502		{
503		m_st &= ~STBIT_IE;
504		COUNT_CYCLES(3);
505		}
506
507		#define DIVS(R)                                             \
508		{                                                           \
509		INT32 *rs  = &R##REG(SRCREG(op));                           \
510		INT32 *rd1 = &R##REG(DSTREG(op));                           \
511		CLR_NZV();                                               \
512		if (!(DSTREG(op) & 1))                                      \
513		{                                                       \
514		if (!*rs)                                           \
515		{                                                   \
516		SET_V_LOG(1);                                  \
517		}                                                   \
518		else                                                \
519		{                                                   \
520		INT32 *rd2 = &R##REG(DSTREG(op)+1);                 \
521		INT64 dividend = ((UINT64)*rd1 << 32) | (UINT32)*rd2; \
522		INT64 quotient = dividend / *rs;                \
523		INT32 remainder = dividend % *rs;               \
524		UINT32 signbits = (INT32)quotient >> 31;        \
525		if (EXTRACT_64HI(quotient) != signbits)         \
526		{                                               \
527		SET_V_LOG(1);                              \
528		}                                               \
529		else                                            \
530		{                                               \
531		*rd1 = quotient;                            \
532		*rd2 = remainder;                           \
533		SET_NZ_VAL(*rd1);                          \
534		}                                               \
535		}                                                   \
536		COUNT_CYCLES(40);                                   \
537		}                                                       \
538		else                                                    \
539		{                                                       \
540		if (!*rs)                                           \
541		{                                                   \
542		SET_V_LOG(1);                                  \
543		}                                                   \
544		else                                                \
545		{                                                   \
546		*rd1 /= *rs;                                    \
547		SET_NZ_VAL(*rd1);                              \
548		}                                                   \
549		COUNT_CYCLES(39);                                   \
550		}                                                       \
551		}
552		void tms340x0_device::divs_a(UINT16 op) { DIVS(A); }
553		void tms340x0_device::divs_b(UINT16 op) { DIVS(B); }
554
555		#define DIVU(R)                                             \
556		{                                                           \
557		INT32 *rs  = &R##REG(SRCREG(op));                           \
558		INT32 *rd1 = &R##REG(DSTREG(op));                           \
559		CLR_ZV();                                                    \
560		if (!(DSTREG(op) & 1))                                      \
561		{                                                       \
562		if (!*rs)                                           \
563		{                                                   \
564		SET_V_LOG(1);                                  \
565		}                                                   \
566		else                                                \
567		{                                                   \
568		INT32 *rd2 = &R##REG(DSTREG(op)+1);                 \
569		UINT64 dividend  = ((UINT64)*rd1 << 32) | (UINT32)*rd2; \
570		UINT64 quotient  = dividend / (UINT32)*rs;      \
571		UINT32 remainder = dividend % (UINT32)*rs;      \
572		if (EXTRACT_64HI(quotient) != 0)                \
573		{                                               \
574		SET_V_LOG(1);                              \
575		}                                               \
576		else                                            \
577		{                                               \
578		*rd1 = quotient;                            \
579		*rd2 = remainder;                           \
580		SET_Z_VAL(*rd1);                           \
581		}                                               \
582		}                                                   \
583		}                                                       \
584		else                                                    \
585		{                                                       \
586		if (!*rs)                                           \
587		{                                                   \
588		SET_V_LOG(1);                                  \
589		}                                                   \
590		else                                                \
591		{                                                   \
592		*rd1 = (UINT32)*rd1 / (UINT32)*rs;              \
593		SET_Z_VAL(*rd1);                               \
594		}                                                   \
595		}                                                       \
596		COUNT_CYCLES(37);                                       \
597		}
598		void tms340x0_device::divu_a(UINT16 op) { DIVU(A); }
599		void tms340x0_device::divu_b(UINT16 op) { DIVU(B); }
600
601		void tms340x0_device::eint(UINT16 op)
602		{
603		m_st |= STBIT_IE;
604		check_interrupt();
605		COUNT_CYCLES(3);
606		}
607
608		#define EXGF(F,R)                                               \
609		{                                                               \
610		UINT8 shift = F ? 6 : 0;                                    \
611		INT32 *rd = &R##REG(DSTREG(op));                                \
612		UINT32 temp = (m_st >> shift) & 0x3f;                    \
613		m_st &= ~(0x3f << shift);                                \
614		m_st |= (*rd & 0x3f) << shift;                           \
615		*rd = temp;                                                 \
616		COUNT_CYCLES(1);                                            \
617		}
618		void tms340x0_device::exgf0_a(UINT16 op) { EXGF(0,A); }
619		void tms340x0_device::exgf0_b(UINT16 op) { EXGF(0,B); }
620		void tms340x0_device::exgf1_a(UINT16 op) { EXGF(1,A); }
621		void tms340x0_device::exgf1_b(UINT16 op) { EXGF(1,B); }
622
623		#define LMO(R)                                                  \
624		{                                                               \
625		UINT32 res = 0;                                             \
626		UINT32 rs  = R##REG(SRCREG(op));                                \
627		INT32 *rd = &R##REG(DSTREG(op));                                \
628		CLR_Z();                                                     \
629		SET_Z_VAL(rs);                                             \
630		if (rs)                                                     \
631		{                                                           \
632		while (!(rs & 0x80000000))                              \
633		{                                                       \
634		res++;                                              \
635		rs <<= 1;                                           \
636		}                                                       \
637		}                                                           \
638		*rd = res;                                                  \
639		COUNT_CYCLES(1);                                            \
640		}
641		void tms340x0_device::lmo_a(UINT16 op) { LMO(A); }
642		void tms340x0_device::lmo_b(UINT16 op) { LMO(B); }
643
644		#define MMFM(R)                                                 \
645		{                                                               \
646		INT32 i;                                                    \
647		UINT16 l = (UINT16) PARAM_WORD();                        \
648		COUNT_CYCLES(3);                                            \
649		{                                                           \
650		INT32 rd = DSTREG(op);                                      \
651		for (i = 15; i >= 0 ; i--)                              \
652		{                                                       \
653		if (l & 0x8000)                                     \
654		{                                                   \
655		R##REG(i) = RLONG(R##REG(rd));                 \
656		R##REG(rd) += 0x20;                             \
657		COUNT_CYCLES(4);                                \
658		}                                                   \
659		l <<= 1;                                            \
660		}                                                       \
661		}                                                           \
662		}
663		void tms340x0_device::mmfm_a(UINT16 op) { MMFM(A); }
664		void tms340x0_device::mmfm_b(UINT16 op) { MMFM(B); }
665
666		#define MMTM(R)                                                 \
667		{                                                               \
668		UINT32 i;                                                   \
669		UINT16 l = (UINT16) PARAM_WORD();                        \
670		COUNT_CYCLES(2);                                            \
671		{                                                           \
672		INT32 rd = DSTREG(op);                                      \
673		if (m_is_34020)                                      \
674		{                                                       \
675		CLR_N();                                             \
676		SET_N_VAL(R##REG(rd) ^ 0x80000000);                    \
677		}                                                       \
678		for (i = 0; i  < 16; i++)                               \
679		{                                                       \
680		if (l & 0x8000)                                     \
681		{                                                   \
682		R##REG(rd) -= 0x20;                             \
683		WLONG(R##REG(rd),R##REG(i));                   \
684		COUNT_CYCLES(4);                                \
685		}                                                   \
686		l <<= 1;                                            \
687		}                                                       \
688		}                                                           \
689		}
690		void tms340x0_device::mmtm_a(UINT16 op) { MMTM(A); }
691		void tms340x0_device::mmtm_b(UINT16 op) { MMTM(B); }
692
693		#define MODS(R)                                                 \
694		{                                                               \
695		INT32 *rs = &R##REG(SRCREG(op));                                \
696		INT32 *rd = &R##REG(DSTREG(op));                                \
697		CLR_NZV();                                                   \
698		if (*rs != 0)                                               \
699		{                                                           \
700		*rd %= *rs;                                             \
701		SET_NZ_VAL(*rd);                                       \
702		}                                                           \
703		else                                                        \
704		SET_V_LOG(1);                                          \
705		COUNT_CYCLES(40);                                           \
706		}
707		void tms340x0_device::mods_a(UINT16 op) { MODS(A); }
708		void tms340x0_device::mods_b(UINT16 op) { MODS(B); }
709
710		#define MODU(R)                                                 \
711		{                                                               \
712		INT32 *rs = &R##REG(SRCREG(op));                                \
713		INT32 *rd = &R##REG(DSTREG(op));                                \
714		CLR_ZV();                                                        \
715		if (*rs != 0)                                               \
716		{                                                           \
717		*rd = (UINT32)*rd % (UINT32)*rs;                        \
718		SET_Z_VAL(*rd);                                            \
719		}                                                           \
720		else                                                        \
721		SET_V_LOG(1);                                          \
722		COUNT_CYCLES(35);                                           \
723		}
724		void tms340x0_device::modu_a(UINT16 op) { MODU(A); }
725		void tms340x0_device::modu_b(UINT16 op) { MODU(B); }
726
727		#define MPYS(R)                                                 \
728		{                                                               \
729		INT32 *rd1 = &R##REG(DSTREG(op));                               \
730		INT32 m1 = R##REG(SRCREG(op));                                  \
731		INT64 product;                                              \
732		\
733		SEXTEND(m1, FW(1));                                         \
734		CLR_NZ();                                                        \
735		product = mul_32x32(m1, *rd1);                          \
736		SET_Z_LOG(product == 0);                                   \
737		SET_N_BIT(product >> 32, 31);                              \
738		\
739		*rd1             = EXTRACT_64HI(product);                       \
740		R##REG(DSTREG(op)|1) = EXTRACT_64LO(product);                       \
741		\
742		COUNT_CYCLES(20);                                           \
743		}
744		void tms340x0_device::mpys_a(UINT16 op) { MPYS(A); }
745		void tms340x0_device::mpys_b(UINT16 op) { MPYS(B); }
746
747		#define MPYU(R)                                                 \
748		{                                                               \
749		INT32 *rd1 = &R##REG(DSTREG(op));                               \
750		UINT32 m1 = R##REG(SRCREG(op));                                 \
751		UINT64 product;                                             \
752		\
753		ZEXTEND(m1, FW(1));                                         \
754		CLR_Z();                                                     \
755		product = mulu_32x32(m1, *rd1);                     \
756		SET_Z_LOG(product == 0);                                   \
757		\
758		*rd1             = EXTRACT_64HI(product);                       \
759		R##REG(DSTREG(op)|1) = EXTRACT_64LO(product);                       \
760		\
761		COUNT_CYCLES(21);                                           \
762		}
763		void tms340x0_device::mpyu_a(UINT16 op) { MPYU(A); }
764		void tms340x0_device::mpyu_b(UINT16 op) { MPYU(B); }
765
766		#define NEG(R)                                                  \
767		{                                                               \
768		INT32 *rd = &R##REG(DSTREG(op));                                \
769		INT32 r = 0 - *rd;                                          \
770		CLR_NCZV();                                                  \
771		SET_NZCV_SUB(0,*rd,r);                                      \
772		*rd = r;                                                    \
773		COUNT_CYCLES(1);                                            \
774		}
775		void tms340x0_device::neg_a(UINT16 op) { NEG(A); }
776		void tms340x0_device::neg_b(UINT16 op) { NEG(B); }
777
778		#define NEGB(R)                                                 \
779		{                                                               \
780		INT32 *rd = &R##REG(DSTREG(op));                                \
781		INT32 t = *rd + (C_FLAG() ? 1 : 0);                          \
782		INT32 r = 0 - t;                                            \
783		CLR_NCZV();                                                  \
784		SET_NZCV_SUB(0,t,r);                                        \
785		*rd = r;                                                    \
786		COUNT_CYCLES(1);                                            \
787		}
788		void tms340x0_device::negb_a(UINT16 op) { NEGB(A); }
789		void tms340x0_device::negb_b(UINT16 op) { NEGB(B); }
790
791		void tms340x0_device::nop(UINT16 op)
792		{
793		COUNT_CYCLES(1);
794		}
795
796		#define NOT(R)                                                  \
797		{                                                               \
798		INT32 *rd = &R##REG(DSTREG(op));                                \
799		CLR_Z();                                                     \
800		*rd = ~(*rd);                                               \
801		SET_Z_VAL(*rd);                                                \
802		COUNT_CYCLES(1);                                            \
803		}
804		void tms340x0_device::not_a(UINT16 op) { NOT(A); }
805		void tms340x0_device::not_b(UINT16 op) { NOT(B); }
806
807		#define OR(R)                                                   \
808		{                                                               \
809		INT32 *rd = &R##REG(DSTREG(op));                                \
810		CLR_Z();                                                     \
811		*rd |= R##REG(SRCREG(op));                                      \
812		SET_Z_VAL(*rd);                                                \
813		COUNT_CYCLES(1);                                            \
814		}
815		void tms340x0_device::or_a(UINT16 op) { OR(A); }
816		void tms340x0_device::or_b(UINT16 op) { OR(B); }
817
818		#define ORI(R)                                                  \
819		{                                                               \
820		INT32 *rd = &R##REG(DSTREG(op));                                \
821		CLR_Z();                                                     \
822		*rd |= PARAM_LONG();                                     \
823		SET_Z_VAL(*rd);                                                \
824		COUNT_CYCLES(3);                                            \
825		}
826		void tms340x0_device::ori_a(UINT16 op) { ORI(A); }
827		void tms340x0_device::ori_b(UINT16 op) { ORI(B); }
828
829		void tms340x0_device::setc(UINT16 op)
830		{
831		SET_C_LOG(1);
832		COUNT_CYCLES(1);
833		}
834
835		#define SETF(F)                                                 \
836		{                                                               \
837		UINT8 shift = F ? 6 : 0;                                    \
838		m_st &= ~(0x3f << shift);                                \
839		m_st |= (op & 0x3f) << shift;                        \
840		COUNT_CYCLES(1+F);                                          \
841		}
842		void tms340x0_device::setf0(UINT16 op) { SETF(0); }
843		void tms340x0_device::setf1(UINT16 op) { SETF(1); }
844
845		#define SEXT(F,R)                                               \
846		{                                                               \
847		INT32 *rd = &R##REG(DSTREG(op));                                \
848		CLR_NZ();                                                        \
849		SEXTEND(*rd,FW(F));                                         \
850		SET_NZ_VAL(*rd);                                           \
851		COUNT_CYCLES(3);                                            \
852		}
853		void tms340x0_device::sext0_a(UINT16 op) { SEXT(0,A); }
854		void tms340x0_device::sext0_b(UINT16 op) { SEXT(0,B); }
855		void tms340x0_device::sext1_a(UINT16 op) { SEXT(1,A); }
856		void tms340x0_device::sext1_b(UINT16 op) { SEXT(1,B); }
857
858		#define RL(R,K)                                                 \
859		{                                                               \
860		INT32 *rd = &R##REG(DSTREG(op));                                \
861		INT32 res = *rd;                                            \
862		INT32 k = (K);                                              \
863		CLR_CZ();                                                        \
864		if (k)                                                      \
865		{                                                           \
866		res<<=(k-1);                                            \
867		SET_C_BIT_HI(res, 31);                                 \
868		res<<=1;                                                \
869		res |= (((UINT32)*rd)>>((-k)&0x1f));                    \
870		*rd = res;                                              \
871		}                                                           \
872		SET_Z_VAL(res);                                                \
873		COUNT_CYCLES(1);                                            \
874		}
875		void tms340x0_device::rl_k_a(UINT16 op) { RL(A,PARAM_K(op)); }
876		void tms340x0_device::rl_k_b(UINT16 op) { RL(B,PARAM_K(op)); }
877		void tms340x0_device::rl_r_a(UINT16 op) { RL(A,AREG(SRCREG(op))&0x1f); }
878		void tms340x0_device::rl_r_b(UINT16 op) { RL(B,BREG(SRCREG(op))&0x1f); }
879
880		#define SLA(R,K)                                                \
881		{                                                               \
882		INT32 *rd = &R##REG(DSTREG(op));                                \
883		UINT32 res = *rd;                                           \
884		INT32 k = K;                                                \
885		CLR_NCZV();                                                  \
886		if (k)                                                      \
887		{                                                           \
888		UINT32 mask = (0xffffffff<<(31-k))&0x7fffffff;          \
889		UINT32 res2 = SIGN(res) ? res^mask : res;               \
890		SET_V_LOG((res2 & mask) != 0);                         \
891		\
892		res<<=(k-1);                                            \
893		SET_C_BIT_HI(res, 31);                                 \
894		res<<=1;                                                \
895		*rd = res;                                              \
896		}                                                           \
897		SET_NZ_VAL(res);                                           \
898		COUNT_CYCLES(3);                                            \
899		}
900		void tms340x0_device::sla_k_a(UINT16 op) { SLA(A,PARAM_K(op)); }
901		void tms340x0_device::sla_k_b(UINT16 op) { SLA(B,PARAM_K(op)); }
902		void tms340x0_device::sla_r_a(UINT16 op) { SLA(A,AREG(SRCREG(op))&0x1f); }
903		void tms340x0_device::sla_r_b(UINT16 op) { SLA(B,BREG(SRCREG(op))&0x1f); }
904
905		#define SLL(R,K)                                                \
906		{                                                               \
907		INT32 *rd = &R##REG(DSTREG(op));                                \
908		UINT32 res = *rd;                                           \
909		INT32 k = K;                                                \
910		CLR_CZ();                                                        \
911		if (k)                                                      \
912		{                                                           \
913		res<<=(k-1);                                            \
914		SET_C_BIT_HI(res, 31);                                 \
915		res<<=1;                                                \
916		*rd = res;                                              \
917		}                                                           \
918		SET_Z_VAL(res);                                                \
919		COUNT_CYCLES(1);                                            \
920		}
921		void tms340x0_device::sll_k_a(UINT16 op) { SLL(A,PARAM_K(op)); }
922		void tms340x0_device::sll_k_b(UINT16 op) { SLL(B,PARAM_K(op)); }
923		void tms340x0_device::sll_r_a(UINT16 op) { SLL(A,AREG(SRCREG(op))&0x1f); }
924		void tms340x0_device::sll_r_b(UINT16 op) { SLL(B,BREG(SRCREG(op))&0x1f); }
925
926		#define SRA(R,K)                                                \
927		{                                                               \
928		INT32 *rd = &R##REG(DSTREG(op));                                \
929		INT32 res = *rd;                                            \
930		INT32 k = (-(K)) & 0x1f;                                    \
931		CLR_NCZ();                                                   \
932		if (k)                                                      \
933		{                                                           \
934		res>>=(k-1);                                            \
935		SET_C_BIT_LO(res, 0);                                  \
936		res>>=1;                                                \
937		*rd = res;                                              \
938		}                                                           \
939		SET_NZ_VAL(res);                                           \
940		COUNT_CYCLES(1);                                            \
941		}
942		void tms340x0_device::sra_k_a(UINT16 op) { SRA(A,PARAM_K(op)); }
943		void tms340x0_device::sra_k_b(UINT16 op) { SRA(B,PARAM_K(op)); }
944		void tms340x0_device::sra_r_a(UINT16 op) { SRA(A,AREG(SRCREG(op))); }
945		void tms340x0_device::sra_r_b(UINT16 op) { SRA(B,BREG(SRCREG(op))); }
946
947		#define SRL(R,K)                                                \
948		{                                                               \
949		INT32 *rd = &R##REG(DSTREG(op));                                \
950		UINT32 res = *rd;                                           \
951		INT32 k = (-(K)) & 0x1f;                                    \
952		CLR_CZ();                                                        \
953		if (k)                                                      \
954		{                                                           \
955		res>>=(k-1);                                            \
956		SET_C_BIT_LO(res, 0);                                  \
957		res>>=1;                                                \
958		*rd = res;                                              \
959		}                                                           \
960		SET_Z_VAL(res);                                                \
961		COUNT_CYCLES(1);                                            \
962		}
963		void tms340x0_device::srl_k_a(UINT16 op) { SRL(A,PARAM_K(op)); }
964		void tms340x0_device::srl_k_b(UINT16 op) { SRL(B,PARAM_K(op)); }
965		void tms340x0_device::srl_r_a(UINT16 op) { SRL(A,AREG(SRCREG(op))); }
966		void tms340x0_device::srl_r_b(UINT16 op) { SRL(B,BREG(SRCREG(op))); }
967
968		#define SUB(R)                                                  \
969		{                                                               \
970		INT32 *rs = &R##REG(SRCREG(op));                                \
971		INT32 *rd = &R##REG(DSTREG(op));                                \
972		INT32 r = *rd - *rs;                                        \
973		CLR_NCZV();                                                  \
974		SET_NZCV_SUB(*rd,*rs,r);                                    \
975		*rd = r;                                                    \
976		COUNT_CYCLES(1);                                            \
977		}
978		void tms340x0_device::sub_a(UINT16 op) { SUB(A); }
979		void tms340x0_device::sub_b(UINT16 op) { SUB(B); }
980
981		#define SUBB(R)                                                 \
982		{                                                               \
983		INT32 *rd = &R##REG(DSTREG(op));                                \
984		INT32 t = R##REG(SRCREG(op));                                   \
985		INT32 r = *rd - t - (C_FLAG() ? 1 : 0);                      \
986		CLR_NCZV();                                                  \
987		SET_NZCV_SUB(*rd,t,r);                                      \
988		*rd = r;                                                    \
989		COUNT_CYCLES(1);                                            \
990		}
991		void tms340x0_device::subb_a(UINT16 op) { SUBB(A); }
992		void tms340x0_device::subb_b(UINT16 op) { SUBB(B); }
993
994		#define SUBI_W(R)                                               \
995		{                                                               \
996		INT32 *rd = &R##REG(DSTREG(op));                                \
997		INT32 r;                                                    \
998		INT32 t = ~PARAM_WORD();                                 \
999		CLR_NCZV();                                                  \
1000		r = *rd - t;                                                \
1001		SET_NZCV_SUB(*rd,t,r);                                      \
1002		*rd = r;                                                    \
1003		COUNT_CYCLES(2);                                            \
1004		}
1005		void tms340x0_device::subi_w_a(UINT16 op) { SUBI_W(A); }
1006		void tms340x0_device::subi_w_b(UINT16 op) { SUBI_W(B); }
1007
1008		#define SUBI_L(R)                                               \
1009		{                                                               \
1010		INT32 *rd = &R##REG(DSTREG(op));                                \
1011		INT32 t = ~PARAM_LONG();                                 \
1012		INT32 r = *rd - t;                                          \
1013		CLR_NCZV();                                                  \
1014		SET_NZCV_SUB(*rd,t,r);                                      \
1015		*rd = r;                                                    \
1016		COUNT_CYCLES(3);                                            \
1017		}
1018		void tms340x0_device::subi_l_a(UINT16 op) { SUBI_L(A); }
1019		void tms340x0_device::subi_l_b(UINT16 op) { SUBI_L(B); }
1020
1021		#define SUBK(R)                                                 \
1022		{                                                               \
1023		INT32 *rd = &R##REG(DSTREG(op));                                \
1024		INT32 t = fw_inc[PARAM_K(op)];                                  \
1025		INT32 r = *rd - t;                                          \
1026		CLR_NCZV();                                                  \
1027		SET_NZCV_SUB(*rd,t,r);                                      \
1028		*rd = r;                                                    \
1029		COUNT_CYCLES(1);                                            \
1030		}
1031		void tms340x0_device::subk_a(UINT16 op) { SUBK(A); }
1032		void tms340x0_device::subk_b(UINT16 op) { SUBK(B); }
1033
1034		#define XOR(R)                                                  \
1035		{                                                               \
1036		INT32 *rd = &R##REG(DSTREG(op));                                \
1037		CLR_Z();                                                     \
1038		*rd ^= R##REG(SRCREG(op));                                      \
1039		SET_Z_VAL(*rd);                                                \
1040		COUNT_CYCLES(1);                                            \
1041		}
1042		void tms340x0_device::xor_a(UINT16 op) { XOR(A); }
1043		void tms340x0_device::xor_b(UINT16 op) { XOR(B); }
1044
1045		#define XORI(R)                                                 \
1046		{                                                               \
1047		INT32 *rd = &R##REG(DSTREG(op));                                \
1048		CLR_Z();                                                     \
1049		*rd ^= PARAM_LONG();                                     \
1050		SET_Z_VAL(*rd);                                                \
1051		COUNT_CYCLES(3);                                            \
1052		}
1053		void tms340x0_device::xori_a(UINT16 op) { XORI(A); }
1054		void tms340x0_device::xori_b(UINT16 op) { XORI(B); }
1055
1056		#define ZEXT(F,R)                                               \
1057		{                                                               \
1058		INT32 *rd = &R##REG(DSTREG(op));                                \
1059		CLR_Z();                                                     \
1060		ZEXTEND(*rd,FW(F));                                         \
1061		SET_Z_VAL(*rd);                                                \
1062		COUNT_CYCLES(1);                                            \
1063		}
1064		void tms340x0_device::zext0_a(UINT16 op) { ZEXT(0,A); }
1065		void tms340x0_device::zext0_b(UINT16 op) { ZEXT(0,B); }
1066		void tms340x0_device::zext1_a(UINT16 op) { ZEXT(1,A); }
1067		void tms340x0_device::zext1_b(UINT16 op) { ZEXT(1,B); }
1068
1069
1070
1071		/***************************************************************************
1072		MOVE INSTRUCTIONS
1073		***************************************************************************/
1074
1075		#define MOVI_W(R)                                               \
1076		{                                                               \
1077		INT32 *rd = &R##REG(DSTREG(op));                                \
1078		CLR_NZV();                                                   \
1079		*rd=PARAM_WORD();                                        \
1080		SET_NZ_VAL(*rd);                                           \
1081		COUNT_CYCLES(2);                                            \
1082		}
1083		void tms340x0_device::movi_w_a(UINT16 op) { MOVI_W(A); }
1084		void tms340x0_device::movi_w_b(UINT16 op) { MOVI_W(B); }
1085
1086		#define MOVI_L(R)                                               \
1087		{                                                               \
1088		INT32 *rd = &R##REG(DSTREG(op));                                \
1089		CLR_NZV();                                                   \
1090		*rd=PARAM_LONG();                                        \
1091		SET_NZ_VAL(*rd);                                           \
1092		COUNT_CYCLES(3);                                            \
1093		}
1094		void tms340x0_device::movi_l_a(UINT16 op) { MOVI_L(A); }
1095		void tms340x0_device::movi_l_b(UINT16 op) { MOVI_L(B); }
1096
1097		#define MOVK(R)                                                 \
1098		{                                                               \
1099		INT32 k = PARAM_K(op); if (!k) k = 32;                          \
1100		R##REG(DSTREG(op)) = k;                                         \
1101		COUNT_CYCLES(1);                                            \
1102		}
1103		void tms340x0_device::movk_a(UINT16 op) { MOVK(A); }
1104		void tms340x0_device::movk_b(UINT16 op) { MOVK(B); }
1105
1106		#define MOVB_RN(R)                                              \
1107		{                                                               \
1108		WBYTE(R##REG(DSTREG(op)),R##REG(SRCREG(op)));                      \
1109		COUNT_CYCLES(1);                                            \
1110		}
1111		void tms340x0_device::movb_rn_a(UINT16 op) { MOVB_RN(A); }
1112		void tms340x0_device::movb_rn_b(UINT16 op) { MOVB_RN(B); }
1113
1114		#define MOVB_NR(R)                                              \
1115		{                                                               \
1116		INT32 *rd = &R##REG(DSTREG(op));                                \
1117		CLR_NZV();                                                   \
1118		*rd = (INT8)RBYTE(R##REG(SRCREG(op)));                     \
1119		SET_NZ_VAL(*rd);                                           \
1120		COUNT_CYCLES(3);                                            \
1121		}
1122		void tms340x0_device::movb_nr_a(UINT16 op) { MOVB_NR(A); }
1123		void tms340x0_device::movb_nr_b(UINT16 op) { MOVB_NR(B); }
1124
1125		#define MOVB_NN(R)                                              \
1126		{                                                               \
1127		WBYTE(R##REG(DSTREG(op)),(UINT32)(UINT8)RBYTE(R##REG(SRCREG(op))));\
1128		COUNT_CYCLES(3);                                            \
1129		}
1130		void tms340x0_device::movb_nn_a(UINT16 op) { MOVB_NN(A); }
1131		void tms340x0_device::movb_nn_b(UINT16 op) { MOVB_NN(B); }
1132
1133		#define MOVB_R_NO(R)                                            \
1134		{                                                               \
1135		INT32 o = PARAM_WORD();                                  \
1136		WBYTE(R##REG(DSTREG(op))+o,R##REG(SRCREG(op)));                        \
1137		COUNT_CYCLES(3);                                            \
1138		}
1139		void tms340x0_device::movb_r_no_a(UINT16 op) { MOVB_R_NO(A); }
1140		void tms340x0_device::movb_r_no_b(UINT16 op) { MOVB_R_NO(B); }
1141
1142		#define MOVB_NO_R(R)                                            \
1143		{                                                               \
1144		INT32 *rd = &R##REG(DSTREG(op));                                \
1145		INT32 o = PARAM_WORD();                                  \
1146		CLR_NZV();                                                   \
1147		*rd = (INT8)RBYTE(R##REG(SRCREG(op))+o);                   \
1148		SET_NZ_VAL(*rd);                                           \
1149		COUNT_CYCLES(5);                                            \
1150		}
1151		void tms340x0_device::movb_no_r_a(UINT16 op) { MOVB_NO_R(A); }
1152		void tms340x0_device::movb_no_r_b(UINT16 op) { MOVB_NO_R(B); }
1153
1154		#define MOVB_NO_NO(R)                                           \
1155		{                                                               \
1156		INT32 o1 = PARAM_WORD();                                 \
1157		INT32 o2 = PARAM_WORD();                                 \
1158		WBYTE(R##REG(DSTREG(op))+o2,(UINT32)(UINT8)RBYTE(R##REG(SRCREG(op))+o1)); \
1159		COUNT_CYCLES(5);                                            \
1160		}
1161		void tms340x0_device::movb_no_no_a(UINT16 op) { MOVB_NO_NO(A); }
1162		void tms340x0_device::movb_no_no_b(UINT16 op) { MOVB_NO_NO(B); }
1163
1164		#define MOVB_RA(R)                                              \
1165		{                                                               \
1166		WBYTE(PARAM_LONG(),R##REG(DSTREG(op)));                     \
1167		COUNT_CYCLES(1);                                            \
1168		}
1169		void tms340x0_device::movb_ra_a(UINT16 op) { MOVB_RA(A); }
1170		void tms340x0_device::movb_ra_b(UINT16 op) { MOVB_RA(B); }
1171
1172		#define MOVB_AR(R)                                              \
1173		{                                                               \
1174		INT32 *rd = &R##REG(DSTREG(op));                                \
1175		CLR_NZV();                                                   \
1176		*rd = (INT8)RBYTE(PARAM_LONG());                    \
1177		SET_NZ_VAL(*rd);                                           \
1178		COUNT_CYCLES(5);                                            \
1179		}
1180		void tms340x0_device::movb_ar_a(UINT16 op) { MOVB_AR(A); }
1181		void tms340x0_device::movb_ar_b(UINT16 op) { MOVB_AR(B); }
1182
1183		void tms340x0_device::movb_aa(UINT16 op)
1184		{
1185		UINT32 bitaddrs=PARAM_LONG();
1186		WBYTE(PARAM_LONG(),(UINT32)(UINT8)RBYTE(bitaddrs));
1187		COUNT_CYCLES(6);
1188		}
1189
1190		#define MOVE_RR(RS,RD)                                          \
1191		{                                                               \
1192		INT32 *rd = &RD##REG(DSTREG(op));                               \
1193		CLR_NZV();                                                   \
1194		*rd = RS##REG(SRCREG(op));                                      \
1195		SET_NZ_VAL(*rd);                                           \
1196		COUNT_CYCLES(1);                                            \
1197		}
1198		void tms340x0_device::move_rr_a (UINT16 op) { MOVE_RR(A,A); }
1199		void tms340x0_device::move_rr_b (UINT16 op) { MOVE_RR(B,B); }
1200		void tms340x0_device::move_rr_ax(UINT16 op) { MOVE_RR(A,B); }
1201		void tms340x0_device::move_rr_bx(UINT16 op) { MOVE_RR(B,A); }
1202
1203		#define MOVE_RN(F,R)                                            \
1204		{                                                               \
1205		WFIELD##F(R##REG(DSTREG(op)),R##REG(SRCREG(op)));                   \
1206		COUNT_CYCLES(1);                                            \
1207		}
1208		void tms340x0_device::move0_rn_a (UINT16 op) { MOVE_RN(0,A); }
1209		void tms340x0_device::move0_rn_b (UINT16 op) { MOVE_RN(0,B); }
1210		void tms340x0_device::move1_rn_a (UINT16 op) { MOVE_RN(1,A); }
1211		void tms340x0_device::move1_rn_b (UINT16 op) { MOVE_RN(1,B); }
1212
1213		#define MOVE_R_DN(F,R)                                          \
1214		{                                                               \
1215		INT32 *rd = &R##REG(DSTREG(op));                                \
1216		*rd-=fw_inc[FW(F)];                                         \
1217		WFIELD##F(*rd,R##REG(SRCREG(op)));                              \
1218		COUNT_CYCLES(2);                                            \
1219		}
1220		void tms340x0_device::move0_r_dn_a (UINT16 op) { MOVE_R_DN(0,A); }
1221		void tms340x0_device::move0_r_dn_b (UINT16 op) { MOVE_R_DN(0,B); }
1222		void tms340x0_device::move1_r_dn_a (UINT16 op) { MOVE_R_DN(1,A); }
1223		void tms340x0_device::move1_r_dn_b (UINT16 op) { MOVE_R_DN(1,B); }
1224
1225		#define MOVE_R_NI(F,R)                                          \
1226		{                                                               \
1227		INT32 *rd = &R##REG(DSTREG(op));                                \
1228		WFIELD##F(*rd,R##REG(SRCREG(op)));                              \
1229		*rd+=fw_inc[FW(F)];                                         \
1230		COUNT_CYCLES(1);                                            \
1231		}
1232		void tms340x0_device::move0_r_ni_a (UINT16 op) { MOVE_R_NI(0,A); }
1233		void tms340x0_device::move0_r_ni_b (UINT16 op) { MOVE_R_NI(0,B); }
1234		void tms340x0_device::move1_r_ni_a (UINT16 op) { MOVE_R_NI(1,A); }
1235		void tms340x0_device::move1_r_ni_b (UINT16 op) { MOVE_R_NI(1,B); }
1236
1237		#define MOVE_NR(F,R)                                            \
1238		{                                                               \
1239		INT32 *rd = &R##REG(DSTREG(op));                                \
1240		CLR_NZV();                                                   \
1241		*rd = RFIELD##F(R##REG(SRCREG(op)));                            \
1242		SET_NZ_VAL(*rd);                                           \
1243		COUNT_CYCLES(3);                                            \
1244		}
1245		void tms340x0_device::move0_nr_a (UINT16 op) { MOVE_NR(0,A); }
1246		void tms340x0_device::move0_nr_b (UINT16 op) { MOVE_NR(0,B); }
1247		void tms340x0_device::move1_nr_a (UINT16 op) { MOVE_NR(1,A); }
1248		void tms340x0_device::move1_nr_b (UINT16 op) { MOVE_NR(1,B); }
1249
1250		#define MOVE_DN_R(F,R)                                          \
1251		{                                                               \
1252		INT32 *rd = &R##REG(DSTREG(op));                                \
1253		INT32 *rs = &R##REG(SRCREG(op));                                \
1254		CLR_NZV();                                                   \
1255		*rs-=fw_inc[FW(F)];                                         \
1256		*rd = RFIELD##F(*rs);                                       \
1257		SET_NZ_VAL(*rd);                                           \
1258		COUNT_CYCLES(4);                                            \
1259		}
1260		void tms340x0_device::move0_dn_r_a (UINT16 op) { MOVE_DN_R(0,A); }
1261		void tms340x0_device::move0_dn_r_b (UINT16 op) { MOVE_DN_R(0,B); }
1262		void tms340x0_device::move1_dn_r_a (UINT16 op) { MOVE_DN_R(1,A); }
1263		void tms340x0_device::move1_dn_r_b (UINT16 op) { MOVE_DN_R(1,B); }
1264
1265		#define MOVE_NI_R(F,R)                                          \
1266		{                                                               \
1267		INT32 *rd = &R##REG(DSTREG(op));                                \
1268		INT32 *rs = &R##REG(SRCREG(op));                                \
1269		INT32 data = RFIELD##F(*rs);                                \
1270		CLR_NZV();                                                   \
1271		*rs+=fw_inc[FW(F)];                                         \
1272		*rd = data;                                                 \
1273		SET_NZ_VAL(*rd);                                           \
1274		COUNT_CYCLES(3);                                            \
1275		}
1276		void tms340x0_device::move0_ni_r_a (UINT16 op) { MOVE_NI_R(0,A); }
1277		void tms340x0_device::move0_ni_r_b (UINT16 op) { MOVE_NI_R(0,B); }
1278		void tms340x0_device::move1_ni_r_a (UINT16 op) { MOVE_NI_R(1,A); }
1279		void tms340x0_device::move1_ni_r_b (UINT16 op) { MOVE_NI_R(1,B); }
1280
1281		#define MOVE_NN(F,R)                                            \
1282		{                                                               \
1283		WFIELD##F(R##REG(DSTREG(op)),RFIELD##F(R##REG(SRCREG(op))));        \
1284		COUNT_CYCLES(3);                                            \
1285		}
1286		void tms340x0_device::move0_nn_a (UINT16 op) { MOVE_NN(0,A); }
1287		void tms340x0_device::move0_nn_b (UINT16 op) { MOVE_NN(0,B); }
1288		void tms340x0_device::move1_nn_a (UINT16 op) { MOVE_NN(1,A); }
1289		void tms340x0_device::move1_nn_b (UINT16 op) { MOVE_NN(1,B); }
1290
1291		#define MOVE_DN_DN(F,R)                                         \
1292		{                                                               \
1293		INT32 *rd = &R##REG(DSTREG(op));                                \
1294		INT32 *rs = &R##REG(SRCREG(op));                                \
1295		INT32 data;                                                 \
1296		*rs-=fw_inc[FW(F)];                                         \
1297		data = RFIELD##F(*rs);                                      \
1298		*rd-=fw_inc[FW(F)];                                         \
1299		WFIELD##F(*rd,data);                                        \
1300		COUNT_CYCLES(4);                                            \
1301		}
1302		void tms340x0_device::move0_dn_dn_a (UINT16 op) { MOVE_DN_DN(0,A); }
1303		void tms340x0_device::move0_dn_dn_b (UINT16 op) { MOVE_DN_DN(0,B); }
1304		void tms340x0_device::move1_dn_dn_a (UINT16 op) { MOVE_DN_DN(1,A); }
1305		void tms340x0_device::move1_dn_dn_b (UINT16 op) { MOVE_DN_DN(1,B); }
1306
1307		#define MOVE_NI_NI(F,R)                                         \
1308		{                                                               \
1309		INT32 *rd = &R##REG(DSTREG(op));                                \
1310		INT32 *rs = &R##REG(SRCREG(op));                                \
1311		INT32 data = RFIELD##F(*rs);                                \
1312		*rs+=fw_inc[FW(F)];                                         \
1313		WFIELD##F(*rd,data);                                        \
1314		*rd+=fw_inc[FW(F)];                                         \
1315		COUNT_CYCLES(4);                                            \
1316		}
1317		void tms340x0_device::move0_ni_ni_a (UINT16 op) { MOVE_NI_NI(0,A); }
1318		void tms340x0_device::move0_ni_ni_b (UINT16 op) { MOVE_NI_NI(0,B); }
1319		void tms340x0_device::move1_ni_ni_a (UINT16 op) { MOVE_NI_NI(1,A); }
1320		void tms340x0_device::move1_ni_ni_b (UINT16 op) { MOVE_NI_NI(1,B); }
1321
1322		#define MOVE_R_NO(F,R)                                          \
1323		{                                                               \
1324		INT32 o = PARAM_WORD();                                  \
1325		WFIELD##F(R##REG(DSTREG(op))+o,R##REG(SRCREG(op)));                 \
1326		COUNT_CYCLES(3);                                            \
1327		}
1328		void tms340x0_device::move0_r_no_a (UINT16 op) { MOVE_R_NO(0,A); }
1329		void tms340x0_device::move0_r_no_b (UINT16 op) { MOVE_R_NO(0,B); }
1330		void tms340x0_device::move1_r_no_a (UINT16 op) { MOVE_R_NO(1,A); }
1331		void tms340x0_device::move1_r_no_b (UINT16 op) { MOVE_R_NO(1,B); }
1332
1333		#define MOVE_NO_R(F,R)                                          \
1334		{                                                               \
1335		INT32 *rd = &R##REG(DSTREG(op));                                \
1336		INT32 o = PARAM_WORD();                                  \
1337		CLR_NZV();                                                   \
1338		*rd = RFIELD##F(R##REG(SRCREG(op))+o);                          \
1339		SET_NZ_VAL(*rd);                                           \
1340		COUNT_CYCLES(5);                                            \
1341		}
1342		void tms340x0_device::move0_no_r_a (UINT16 op) { MOVE_NO_R(0,A); }
1343		void tms340x0_device::move0_no_r_b (UINT16 op) { MOVE_NO_R(0,B); }
1344		void tms340x0_device::move1_no_r_a (UINT16 op) { MOVE_NO_R(1,A); }
1345		void tms340x0_device::move1_no_r_b (UINT16 op) { MOVE_NO_R(1,B); }
1346
1347		#define MOVE_NO_NI(F,R)                                         \
1348		{                                                               \
1349		INT32 *rd = &R##REG(DSTREG(op));                                \
1350		INT32 o = PARAM_WORD();                                  \
1351		INT32 data = RFIELD##F(R##REG(SRCREG(op))+o);                   \
1352		WFIELD##F(*rd,data);                                        \
1353		*rd+=fw_inc[FW(F)];                                         \
1354		COUNT_CYCLES(5);                                            \
1355		}
1356		void tms340x0_device::move0_no_ni_a (UINT16 op) { MOVE_NO_NI(0,A); }
1357		void tms340x0_device::move0_no_ni_b (UINT16 op) { MOVE_NO_NI(0,B); }
1358		void tms340x0_device::move1_no_ni_a (UINT16 op) { MOVE_NO_NI(1,A); }
1359		void tms340x0_device::move1_no_ni_b (UINT16 op) { MOVE_NO_NI(1,B); }
1360
1361		#define MOVE_NO_NO(F,R)                                         \
1362		{                                                               \
1363		INT32 o1 = PARAM_WORD();                                 \
1364		INT32 o2 = PARAM_WORD();                                 \
1365		INT32 data = RFIELD##F(R##REG(SRCREG(op))+o1);                  \
1366		WFIELD##F(R##REG(DSTREG(op))+o2,data);                          \
1367		COUNT_CYCLES(5);                                            \
1368		}
1369		void tms340x0_device::move0_no_no_a (UINT16 op) { MOVE_NO_NO(0,A); }
1370		void tms340x0_device::move0_no_no_b (UINT16 op) { MOVE_NO_NO(0,B); }
1371		void tms340x0_device::move1_no_no_a (UINT16 op) { MOVE_NO_NO(1,A); }
1372		void tms340x0_device::move1_no_no_b (UINT16 op) { MOVE_NO_NO(1,B); }
1373
1374		#define MOVE_RA(F,R)                                            \
1375		{                                                               \
1376		WFIELD##F(PARAM_LONG(),R##REG(DSTREG(op)));                  \
1377		COUNT_CYCLES(3);                                            \
1378		}
1379		void tms340x0_device::move0_ra_a (UINT16 op) { MOVE_RA(0,A); }
1380		void tms340x0_device::move0_ra_b (UINT16 op) { MOVE_RA(0,B); }
1381		void tms340x0_device::move1_ra_a (UINT16 op) { MOVE_RA(1,A); }
1382		void tms340x0_device::move1_ra_b (UINT16 op) { MOVE_RA(1,B); }
1383
1384		#define MOVE_AR(F,R)                                            \
1385		{                                                               \
1386		INT32 *rd = &R##REG(DSTREG(op));                                \
1387		CLR_NZV();                                                   \
1388		*rd = RFIELD##F(PARAM_LONG());                           \
1389		SET_NZ_VAL(*rd);                                           \
1390		COUNT_CYCLES(5);                                            \
1391		}
1392		void tms340x0_device::move0_ar_a (UINT16 op) { MOVE_AR(0,A); }
1393		void tms340x0_device::move0_ar_b (UINT16 op) { MOVE_AR(0,B); }
1394		void tms340x0_device::move1_ar_a (UINT16 op) { MOVE_AR(1,A); }
1395		void tms340x0_device::move1_ar_b (UINT16 op) { MOVE_AR(1,B); }
1396
1397		#define MOVE_A_NI(F,R)                                          \
1398		{                                                               \
1399		INT32 *rd = &R##REG(DSTREG(op));                                \
1400		WFIELD##F(*rd,RFIELD##F(PARAM_LONG()));                  \
1401		*rd+=fw_inc[FW(F)];                                         \
1402		COUNT_CYCLES(5);                                            \
1403		}
1404		void tms340x0_device::move0_a_ni_a (UINT16 op) { MOVE_A_NI(0,A); }
1405		void tms340x0_device::move0_a_ni_b (UINT16 op) { MOVE_A_NI(0,B); }
1406		void tms340x0_device::move1_a_ni_a (UINT16 op) { MOVE_A_NI(1,A); }
1407		void tms340x0_device::move1_a_ni_b (UINT16 op) { MOVE_A_NI(1,B); }
1408
1409		#define MOVE_AA(F)                                              \
1410		{                                                               \
1411		UINT32 bitaddrs=PARAM_LONG();                            \
1412		WFIELD##F(PARAM_LONG(),RFIELD##F(bitaddrs));             \
1413		COUNT_CYCLES(7);                                            \
1414		}
1415		void tms340x0_device::move0_aa (UINT16 op) { MOVE_AA(0); }
1416		void tms340x0_device::move1_aa (UINT16 op) { MOVE_AA(1); }
1417
1418
1419
1420		/***************************************************************************
1421		PROGRAM CONTROL INSTRUCTIONS
1422		***************************************************************************/
1423
1424		#define CALL(R)                                                 \
1425		{                                                               \
1426		PUSH(m_pc);                                                 \
1427		m_pc = R##REG(DSTREG(op));                                       \
1428		CORRECT_ODD_PC("CALL");                                     \
1429		COUNT_CYCLES(3);                                            \
1430		}
1431		void tms340x0_device::call_a (UINT16 op) { CALL(A); }
1432		void tms340x0_device::call_b (UINT16 op) { CALL(B); }
1433
1434		void tms340x0_device::callr(UINT16 op)
1435		{
1436		PUSH(m_pc+0x10);
1437		m_pc += (PARAM_WORD_NO_INC()<<4)+0x10;
1438		COUNT_CYCLES(3);
1439		}
1440
1441		void tms340x0_device::calla(UINT16 op)
1442		{
1443		PUSH(m_pc+0x20);
1444		m_pc = PARAM_LONG_NO_INC();
1445		CORRECT_ODD_PC("CALLA");
1446		COUNT_CYCLES(4);
1447		}
1448
1449		#define DSJ(R)                                                  \
1450		{                                                               \
1451		if (--R##REG(DSTREG(op)))                                       \
1452		{                                                           \
1453		m_pc += (PARAM_WORD_NO_INC()<<4)+0x10;                    \
1454		COUNT_CYCLES(3);                                        \
1455		}                                                           \
1456		else                                                        \
1457		{                                                           \
1458		SKIP_WORD();                                             \
1459		COUNT_CYCLES(2);                                        \
1460		}                                                           \
1461		}
1462		void tms340x0_device::dsj_a (UINT16 op) { DSJ(A); }
1463		void tms340x0_device::dsj_b (UINT16 op) { DSJ(B); }
1464
1465		#define DSJEQ(R)                                                \
1466		{                                                               \
1467		if (Z_FLAG())                                                    \
1468		{                                                           \
1469		if (--R##REG(DSTREG(op)))                                   \
1470		{                                                       \
1471		m_pc += (PARAM_WORD_NO_INC()<<4)+0x10;                \
1472		COUNT_CYCLES(3);                                    \
1473		}                                                       \
1474		else                                                    \
1475		{                                                       \
1476		SKIP_WORD();                                         \
1477		COUNT_CYCLES(2);                                    \
1478		}                                                       \
1479		}                                                           \
1480		else                                                        \
1481		{                                                           \
1482		SKIP_WORD();                                             \
1483		COUNT_CYCLES(2);                                        \
1484		}                                                           \
1485		}
1486		void tms340x0_device::dsjeq_a (UINT16 op) { DSJEQ(A); }
1487		void tms340x0_device::dsjeq_b (UINT16 op) { DSJEQ(B); }
1488
1489		#define DSJNE(R)                                                \
1490		{                                                               \
1491		if (!Z_FLAG())                                               \
1492		{                                                           \
1493		if (--R##REG(DSTREG(op)))                                   \
1494		{                                                       \
1495		m_pc += (PARAM_WORD_NO_INC()<<4)+0x10;                \
1496		COUNT_CYCLES(3);                                    \
1497		}                                                       \
1498		else                                                    \
1499		{                                                       \
1500		SKIP_WORD();                                         \
1501		COUNT_CYCLES(2);                                    \
1502		}                                                       \
1503		}                                                           \
1504		else                                                        \
1505		{                                                           \
1506		SKIP_WORD();                                             \
1507		COUNT_CYCLES(2);                                        \
1508		}                                                           \
1509		}
1510		void tms340x0_device::dsjne_a (UINT16 op) { DSJNE(A); }
1511		void tms340x0_device::dsjne_b (UINT16 op) { DSJNE(B); }
1512
1513		#define DSJS(R)                                                 \
1514		{                                                               \
1515		if (op & 0x0400)                                        \
1516		{                                                           \
1517		if (--R##REG(DSTREG(op)))                                   \
1518		{                                                       \
1519		m_pc -= ((PARAM_K(op))<<4);                              \
1520		COUNT_CYCLES(2);                                    \
1521		}                                                       \
1522		else                                                    \
1523		COUNT_CYCLES(3);                                    \
1524		}                                                           \
1525		else                                                        \
1526		{                                                           \
1527		if (--R##REG(DSTREG(op)))                                   \
1528		{                                                       \
1529		m_pc += ((PARAM_K(op))<<4);                              \
1530		COUNT_CYCLES(2);                                    \
1531		}                                                       \
1532		else                                                    \
1533		COUNT_CYCLES(3);                                    \
1534		}                                                           \
1535		}
1536		void tms340x0_device::dsjs_a (UINT16 op) { DSJS(A); }
1537		void tms340x0_device::dsjs_b (UINT16 op) { DSJS(B); }
1538
1539		void tms340x0_device::emu(UINT16 op)
1540		{
1541		/* in RUN state, this instruction is a NOP */
1542		COUNT_CYCLES(6);
1543		}
1544
1545		#define EXGPC(R)                                                \
1546		{                                                               \
1547		INT32 *rd = &R##REG(DSTREG(op));                                \
1548		INT32 temppc = *rd;                                         \
1549		*rd = m_pc;                                                  \
1550		m_pc = temppc;                                               \
1551		CORRECT_ODD_PC("EXGPC");                                    \
1552		COUNT_CYCLES(2);                                            \
1553		}
1554		void tms340x0_device::exgpc_a (UINT16 op) { EXGPC(A); }
1555		void tms340x0_device::exgpc_b (UINT16 op) { EXGPC(B); }
1556
1557		#define GETPC(R)                                                \
1558		{                                                               \
1559		R##REG(DSTREG(op)) = m_pc;                                       \
1560		COUNT_CYCLES(1);                                            \
1561		}
1562		void tms340x0_device::getpc_a (UINT16 op) { GETPC(A); }
1563		void tms340x0_device::getpc_b (UINT16 op) { GETPC(B); }
1564
1565		#define GETST(R)                                                \
1566		{                                                               \
1567		R##REG(DSTREG(op)) = m_st;                               \
1568		COUNT_CYCLES(1);                                            \
1569		}
1570		void tms340x0_device::getst_a (UINT16 op) { GETST(A); }
1571		void tms340x0_device::getst_b (UINT16 op) { GETST(B); }
1572
1573		#define j_xx_8(TAKE)                                            \
1574		{                                                               \
1575		if (DSTREG(op))                                                 \
1576		{                                                           \
1577		if (TAKE)                                               \
1578		{                                                       \
1579		m_pc += (PARAM_REL8(op) << 4);                           \
1580		COUNT_CYCLES(2);                                    \
1581		}                                                       \
1582		else                                                    \
1583		COUNT_CYCLES(1);                                    \
1584		}                                                           \
1585		else                                                        \
1586		{                                                           \
1587		if (TAKE)                                               \
1588		{                                                       \
1589		m_pc = PARAM_LONG_NO_INC();                       \
1590		CORRECT_ODD_PC("J_XX_8");                           \
1591		COUNT_CYCLES(3);                                    \
1592		}                                                       \
1593		else                                                    \
1594		{                                                       \
1595		SKIP_LONG();                                         \
1596		COUNT_CYCLES(4);                                    \
1597		}                                                       \
1598		}                                                           \
1599		}
1600
1601		#define j_xx_0(TAKE)                                            \
1602		{                                                               \
1603		if (DSTREG(op))                                             \
1604		{                                                           \
1605		if (TAKE)                                               \
1606		{                                                       \
1607		m_pc += (PARAM_REL8(op) << 4);                           \
1608		COUNT_CYCLES(2);                                    \
1609		}                                                       \
1610		else                                                    \
1611		COUNT_CYCLES(1);                                    \
1612		}                                                           \
1613		else                                                        \
1614		{                                                           \
1615		if (TAKE)                                               \
1616		{                                                       \
1617		m_pc += (PARAM_WORD_NO_INC()<<4)+0x10;                \
1618		COUNT_CYCLES(3);                                    \
1619		}                                                       \
1620		else                                                    \
1621		{                                                       \
1622		SKIP_WORD();                                         \
1623		COUNT_CYCLES(2);                                    \
1624		}                                                       \
1625		}                                                           \
1626		}
1627
1628		#define j_xx_x(TAKE)                                            \
1629		{                                                               \
1630		if (TAKE)                                                   \
1631		{                                                           \
1632		m_pc += (PARAM_REL8(op) << 4);                               \
1633		COUNT_CYCLES(2);                                        \
1634		}                                                           \
1635		else                                                        \
1636		COUNT_CYCLES(1);                                        \
1637		}
1638
1639		void tms340x0_device::j_UC_0(UINT16 op)
1640		{
1641		j_xx_0(1);
1642		}
1643		void tms340x0_device::j_UC_8(UINT16 op)
1644		{
1645		j_xx_8(1);
1646		}
1647		void tms340x0_device::j_UC_x(UINT16 op)
1648		{
1649		j_xx_x(1);
1650		}
1651		void tms340x0_device::j_P_0(UINT16 op)
1652		{
1653		j_xx_0(!N_FLAG() && !Z_FLAG());
1654		}
1655		void tms340x0_device::j_P_8(UINT16 op)
1656		{
1657		j_xx_8(!N_FLAG() && !Z_FLAG());
1658		}
1659		void tms340x0_device::j_P_x(UINT16 op)
1660		{
1661		j_xx_x(!N_FLAG() && !Z_FLAG());
1662		}
1663		void tms340x0_device::j_LS_0(UINT16 op)
1664		{
1665		j_xx_0(C_FLAG() || Z_FLAG());
1666		}
1667		void tms340x0_device::j_LS_8(UINT16 op)
1668		{
1669		j_xx_8(C_FLAG() || Z_FLAG());
1670		}
1671		void tms340x0_device::j_LS_x(UINT16 op)
1672		{
1673		j_xx_x(C_FLAG() || Z_FLAG());
1674		}
1675		void tms340x0_device::j_HI_0(UINT16 op)
1676		{
1677		j_xx_0(!C_FLAG() && !Z_FLAG());
1678		}
1679		void tms340x0_device::j_HI_8(UINT16 op)
1680		{
1681		j_xx_8(!C_FLAG() && !Z_FLAG());
1682		}
1683		void tms340x0_device::j_HI_x(UINT16 op)
1684		{
1685		j_xx_x(!C_FLAG() && !Z_FLAG());
1686		}
1687		void tms340x0_device::j_LT_0(UINT16 op)
1688		{
1689		j_xx_0((N_FLAG() && !V_FLAG()) || (!N_FLAG() && V_FLAG()));
1690		}
1691		void tms340x0_device::j_LT_8(UINT16 op)
1692		{
1693		j_xx_8((N_FLAG() && !V_FLAG()) || (!N_FLAG() && V_FLAG()));
1694		}
1695		void tms340x0_device::j_LT_x(UINT16 op)
1696		{
1697		j_xx_x((N_FLAG() && !V_FLAG()) || (!N_FLAG() && V_FLAG()));
1698		}
1699		void tms340x0_device::j_GE_0(UINT16 op)
1700		{
1701		j_xx_0((N_FLAG() && V_FLAG()) || (!N_FLAG() && !V_FLAG()));
1702		}
1703		void tms340x0_device::j_GE_8(UINT16 op)
1704		{
1705		j_xx_8((N_FLAG() && V_FLAG()) || (!N_FLAG() && !V_FLAG()));
1706		}
1707		void tms340x0_device::j_GE_x(UINT16 op)
1708		{
1709		j_xx_x((N_FLAG() && V_FLAG()) || (!N_FLAG() && !V_FLAG()));
1710		}
1711		void tms340x0_device::j_LE_0(UINT16 op)
1712		{
1713		j_xx_0((N_FLAG() && !V_FLAG()) || (!N_FLAG() && V_FLAG()) || Z_FLAG());
1714		}
1715		void tms340x0_device::j_LE_8(UINT16 op)
1716		{
1717		j_xx_8((N_FLAG() && !V_FLAG()) || (!N_FLAG() && V_FLAG()) || Z_FLAG());
1718		}
1719		void tms340x0_device::j_LE_x(UINT16 op)
1720		{
1721		j_xx_x((N_FLAG() && !V_FLAG()) || (!N_FLAG() && V_FLAG()) || Z_FLAG());
1722		}
1723		void tms340x0_device::j_GT_0(UINT16 op)
1724		{
1725		j_xx_0((N_FLAG() && V_FLAG() && !Z_FLAG()) || (!N_FLAG() && !V_FLAG() && !Z_FLAG()));
1726		}
1727		void tms340x0_device::j_GT_8(UINT16 op)
1728		{
1729		j_xx_8((N_FLAG() && V_FLAG() && !Z_FLAG()) || (!N_FLAG() && !V_FLAG() && !Z_FLAG()));
1730		}
1731		void tms340x0_device::j_GT_x(UINT16 op)
1732		{
1733		j_xx_x((N_FLAG() && V_FLAG() && !Z_FLAG()) || (!N_FLAG() && !V_FLAG() && !Z_FLAG()));
1734		}
1735		void tms340x0_device::j_C_0(UINT16 op)
1736		{
1737		j_xx_0(C_FLAG());
1738		}
1739		void tms340x0_device::j_C_8(UINT16 op)
1740		{
1741		j_xx_8(C_FLAG());
1742		}
1743		void tms340x0_device::j_C_x(UINT16 op)
1744		{
1745		j_xx_x(C_FLAG());
1746		}
1747		void tms340x0_device::j_NC_0(UINT16 op)
1748		{
1749		j_xx_0(!C_FLAG());
1750		}
1751		void tms340x0_device::j_NC_8(UINT16 op)
1752		{
1753		j_xx_8(!C_FLAG());
1754		}
1755		void tms340x0_device::j_NC_x(UINT16 op)
1756		{
1757		j_xx_x(!C_FLAG());
1758		}
1759		void tms340x0_device::j_EQ_0(UINT16 op)
1760		{
1761		j_xx_0(Z_FLAG());
1762		}
1763		void tms340x0_device::j_EQ_8(UINT16 op)
1764		{
1765		j_xx_8(Z_FLAG());
1766		}
1767		void tms340x0_device::j_EQ_x(UINT16 op)
1768		{
1769		j_xx_x(Z_FLAG());
1770		}
1771		void tms340x0_device::j_NE_0(UINT16 op)
1772		{
1773		j_xx_0(!Z_FLAG());
1774		}
1775		void tms340x0_device::j_NE_8(UINT16 op)
1776		{
1777		j_xx_8(!Z_FLAG());
1778		}
1779		void tms340x0_device::j_NE_x(UINT16 op)
1780		{
1781		j_xx_x(!Z_FLAG());
1782		}
1783		void tms340x0_device::j_V_0(UINT16 op)
1784		{
1785		j_xx_0(V_FLAG());
1786		}
1787		void tms340x0_device::j_V_8(UINT16 op)
1788		{
1789		j_xx_8(V_FLAG());
1790		}
1791		void tms340x0_device::j_V_x(UINT16 op)
1792		{
1793		j_xx_x(V_FLAG());
1794		}
1795		void tms340x0_device::j_NV_0(UINT16 op)
1796		{
1797		j_xx_0(!V_FLAG());
1798		}
1799		void tms340x0_device::j_NV_8(UINT16 op)
1800		{
1801		j_xx_8(!V_FLAG());
1802		}
1803		void tms340x0_device::j_NV_x(UINT16 op)
1804		{
1805		j_xx_x(!V_FLAG());
1806		}
1807		void tms340x0_device::j_N_0(UINT16 op)
1808		{
1809		j_xx_0(N_FLAG());
1810		}
1811		void tms340x0_device::j_N_8(UINT16 op)
1812		{
1813		j_xx_8(N_FLAG());
1814		}
1815		void tms340x0_device::j_N_x(UINT16 op)
1816		{
1817		j_xx_x(N_FLAG());
1818		}
1819		void tms340x0_device::j_NN_0(UINT16 op)
1820		{
1821		j_xx_0(!N_FLAG());
1822		}
1823		void tms340x0_device::j_NN_8(UINT16 op)
1824		{
1825		j_xx_8(!N_FLAG());
1826		}
1827		void tms340x0_device::j_NN_x(UINT16 op)
1828		{
1829		j_xx_x(!N_FLAG());
1830		}
1831
1832		#define JUMP(R)                                                 \
1833		{                                                               \
1834		m_pc = R##REG(DSTREG(op));                                       \
1835		CORRECT_ODD_PC("JUMP");                                     \
1836		COUNT_CYCLES(2);                                            \
1837		}
1838		void tms340x0_device::jump_a (UINT16 op) { JUMP(A); }
1839		void tms340x0_device::jump_b (UINT16 op) { JUMP(B); }
1840
1841		void tms340x0_device::popst(UINT16 op)
1842		{
1843		SET_ST(POP());
1844		COUNT_CYCLES(8);
1845		}
1846
1847		void tms340x0_device::pushst(UINT16 op)
1848		{
1849		PUSH(m_st);
1850		COUNT_CYCLES(2);
1851		}
1852
1853		#define PUTST(R)                                                \
1854		{                                                               \
1855		SET_ST(R##REG(DSTREG(op)));                                \
1856		COUNT_CYCLES(3);                                            \
1857		}
1858		void tms340x0_device::putst_a (UINT16 op) { PUTST(A); }
1859		void tms340x0_device::putst_b (UINT16 op) { PUTST(B); }
1860
1861		void tms340x0_device::reti(UINT16 op)
1862		{
1863		INT32 st = POP();
1864		m_pc = POP();
1865		CORRECT_ODD_PC("RETI");
1866		SET_ST(st);
1867		COUNT_CYCLES(11);
1868		}
1869
1870		void tms340x0_device::rets(UINT16 op)
1871		{
1872		UINT32 offs;
1873		m_pc = POP();
1874		CORRECT_ODD_PC("RETS");
1875		offs = PARAM_N(op);
1876		if (offs)
1877		{
1878		SP()+=(offs<<4);
1879		}
1880		COUNT_CYCLES(7);
1881		}
1882
1883		#define REV(R)                                                  \
1884		{                                                               \
1885		R##REG(DSTREG(op)) = 0x0008;                                    \
1886		COUNT_CYCLES(1);                                            \
1887		}
1888		void tms340x0_device::rev_a (UINT16 op) { REV(A); }
1889		void tms340x0_device::rev_b (UINT16 op) { REV(B); }
1890
1891		void tms340x0_device::trap(UINT16 op)
1892		{
1893		UINT32 t = PARAM_N(op);
1894		if (t)
1895		{
1896		PUSH(m_pc);
1897		PUSH(m_st);
1898		}
1899		RESET_ST();
1900		m_pc = RLONG(0xffffffe0-(t<<5));
1901		CORRECT_ODD_PC("TRAP");
1902		COUNT_CYCLES(16);
1903		}
1904
1905
1906
1907		/***************************************************************************
1908		34020 INSTRUCTIONS
1909		***************************************************************************/
1910
1911		/************************************
1912
1913		New 34020 ops:
1914
1915		0000 1100 000R dddd = ADDXYI IL,Rd
1916		iiii iiii iiii iiii
1917		iiii iiii iiii iiii
1918
1919		0000 0000 1111 00SD = BLMOVE S,D
1920
1921		0000 0110 0000 0000 = CEXEC S,c,ID,L
1922		cccc cccc S000 0000
1923		iiic cccc cccc cccc
1924
1925		1101 1000 0ccc cccS = CEXEC S,c,ID
1926		iiic cccc cccc cccc
1927
1928		0000 1000 1111 0010 = CLIP
1929
1930		0000 0110 011R dddd = CMOVCG Rd1,Rd2,S,c,ID
1931		cccc cccc S00R dddd
1932		iiic cccc cccc cccc
1933
1934		0000 0110 101R dddd = CMOVCM *Rd+,n,S,c,ID
1935		cccc cccc S00n nnnn
1936		iiic cccc cccc cccc
1937
1938		0000 0110 110R dddd = CMOVCM -*Rd,n,S,c,ID
1939		cccc cccc S00n nnnn
1940		iiic cccc cccc cccc
1941
1942		0000 0110 0110 0000 = CMOVCS c,ID
1943		cccc cccc 0000 0001
1944		iiic cccc cccc cccc
1945
1946		0000 0110 001R ssss = CMOVGC Rs,c,ID
1947		cccc cccc 0000 0000
1948		iiic cccc cccc cccc
1949
1950		0000 0110 010R ssss = CMOVGC Rs1,Rs2,S,c,ID
1951		cccc cccc S00R ssss
1952		iiic cccc cccc cccc
1953
1954		0000 0110 100n nnnn = CMOVMC *Rs+,n,S,c,ID
1955		cccc cccc S00R ssss
1956		iiic cccc cccc cccc
1957
1958		0000 1000 001n nnnn = CMOVMC -*Rs,n,S,c,ID
1959		cccc cccc S00R ssss
1960		iiic cccc cccc cccc
1961
1962		0000 0110 111R dddd = CMOVMC *Rs+,Rd,S,c,ID
1963		cccc cccc S00R ssss
1964		iiic cccc cccc cccc
1965
1966		0011 01kk kkkR dddd = CMPK k,Rd
1967
1968		0000 1010 100R dddd = CVDXYL Rd
1969
1970		0000 1010 011R dddd = CVMXYL Rd
1971
1972		1110 101s sssR dddd = CVSXYL Rs,Rd
1973
1974		0000 0010 101R dddd = EXGPS Rd
1975
1976		1101 1110 Z001 1010 = FLINE Z
1977
1978		0000 1010 1011 1011 = FPIXEQ
1979
1980		0000 1010 1101 1011 = FPIXNE
1981
1982		0000 0010 110R dddd = GETPS Rd
1983
1984		0000 0000 0100 0000 = IDLE
1985
1986		0000 1100 0101 0111 = LINIT
1987
1988		0000 0000 1000 0000 = MWAIT
1989
1990		0000 1010 0011 0111 = PFILL XY
1991
1992		0000 1110 0001 0111 = PIXBLT L,M,L
1993
1994		0000 1000 0110 0000 = RETM
1995
1996		0111 101s sssR dddd = RMO Rs,Rd
1997
1998		0000 0010 100R dddd = RPIX Rd
1999
2000		0000 0010 0111 0011 = SETCDP
2001
2002		0000 0010 1111 1011 = SETCMP
2003
2004		0000 0010 0101 0001 = SETCSP
2005
2006		0111 111s sssR dddd = SWAPF *Rs,Rd,0
2007
2008		0000 1110 1111 1010 = TFILL XY
2009
2010		0000 1000 0000 1111 = TRAPL
2011
2012		0000 1000 0101 0111 = VBLT B,L
2013
2014		0000 1010 0101 0111 = VFILL L
2015
2016		0000 1010 0000 0000 = VLCOL
2017
2018		************************************/
2019
2020
2021		#define ADD_XYI(R)                              \
2022		{                                               \
2023		UINT32 a = PARAM_LONG();                 \
2024		XY *b = &R##REG_XY(DSTREG(op));                 \
2025		CLR_NCZV();                                  \
2026		b->x += (INT16)(a & 0xffff);                \
2027		b->y += ((INT32)a >> 16);                   \
2028		SET_N_LOG(b->x == 0);                      \
2029		SET_C_BIT_LO(b->y, 15);                        \
2030		SET_Z_LOG(b->y == 0);                      \
2031		SET_V_BIT_LO(b->x, 15);                        \
2032		COUNT_CYCLES(1);                            \
2033		}
2034		void tms340x0_device::addxyi_a(UINT16 op)
2035		{
2036		if (!m_is_34020) { unimpl(op); return; }
2037		ADD_XYI(A);
2038		}
2039		void tms340x0_device::addxyi_b(UINT16 op)
2040		{
2041		if (!m_is_34020) { unimpl(op); return; }
2042		ADD_XYI(B);
2043		}
2044
2045		void tms340x0_device::blmove(UINT16 op)
2046		{
2047		offs_t src = BREG(0);
2048		offs_t dst = BREG(2);
2049		offs_t bits = BREG(7);
2050
2051		if (!m_is_34020) { unimpl(op); return; }
2052
2053		/* src and dst are aligned */
2054		if (!(src & 0x0f) && !(dst & 0x0f))
2055		{
2056		while (bits >= 16 && m_icount > 0)
2057		{
2058		TMS34010_WRMEM_WORD(TOBYTE(dst), TMS34010_RDMEM_WORD(TOBYTE(src)));
2059		src += 0x10;
2060		dst += 0x10;
2061		bits -= 0x10;
2062		m_icount -= 2;
2063		}
2064		if (bits != 0 && m_icount > 0)
2065		{
2066		(this->*s_wfield_functions[bits])(dst, (this->*s_rfield_functions[bits])(src));
2067		dst += bits;
2068		src += bits;
2069		bits = 0;
2070		m_icount -= 2;
2071		}
2072		}
2073
2074		/* src is aligned, dst is not */
2075		else if (!(src & 0x0f))
2076		{
2077		logerror("020:BLMOVE with aligned src and unaligned dst\n");
2078		}
2079
2080		/* dst is aligned, src is not */
2081		else if (!(dst & 0x0f))
2082		{
2083		logerror("020:BLMOVE with unaligned src and aligned dst\n");
2084		}
2085
2086		/* neither are aligned */
2087		else
2088		{
2089		logerror("020:BLMOVE with completely unaligned src and dst\n");
2090		}
2091
2092		/* update the final results */
2093		BREG(0) = src;
2094		BREG(2) = dst;
2095		BREG(7) = bits;
2096
2097		/* if we're not done yet, back up the PC */
2098		if (bits != 0)
2099		m_pc -= 0x10;
2100		}
2101
2102		void tms340x0_device::cexec_l(UINT16 op)
2103		{
2104		if (!m_is_34020) { unimpl(op); return; }
2105		logerror("020:cexec_l\n");
2106		}
2107
2108		void tms340x0_device::cexec_s(UINT16 op)
2109		{
2110		if (!m_is_34020) { unimpl(op); return; }
2111		logerror("020:cexec_s\n");
2112		}
2113
2114		void tms340x0_device::clip(UINT16 op)
2115		{
2116		if (!m_is_34020) { unimpl(op); return; }
2117		logerror("020:clip\n");
2118		}
2119
2120		void tms340x0_device::cmovcg_a(UINT16 op)
2121		{
2122		if (!m_is_34020) { unimpl(op); return; }
2123		logerror("020:cmovcg_a\n");
2124		}
2125
2126		void tms340x0_device::cmovcg_b(UINT16 op)
2127		{
2128		if (!m_is_34020) { unimpl(op); return; }
2129		logerror("020:cmovcg_b\n");
2130		}
2131
2132		void tms340x0_device::cmovcm_f(UINT16 op)
2133		{
2134		if (!m_is_34020) { unimpl(op); return; }
2135		logerror("020:cmovcm_f\n");
2136		}
2137
2138		void tms340x0_device::cmovcm_b(UINT16 op)
2139		{
2140		if (!m_is_34020) { unimpl(op); return; }
2141		logerror("020:cmovcm_b\n");
2142		}
2143
2144		void tms340x0_device::cmovgc_a(UINT16 op)
2145		{
2146		if (!m_is_34020) { unimpl(op); return; }
2147		logerror("020:cmovgc_a\n");
2148		}
2149
2150		void tms340x0_device::cmovgc_b(UINT16 op)
2151		{
2152		if (!m_is_34020) { unimpl(op); return; }
2153		logerror("020:cmovgc_b\n");
2154		}
2155
2156		void tms340x0_device::cmovgc_a_s(UINT16 op)
2157		{
2158		if (!m_is_34020) { unimpl(op); return; }
2159		logerror("020:cmovgc_a_s\n");
2160		}
2161
2162		void tms340x0_device::cmovgc_b_s(UINT16 op)
2163		{
2164		if (!m_is_34020) { unimpl(op); return; }
2165		logerror("020:cmovgc_b_s\n");
2166		}
2167
2168		void tms340x0_device::cmovmc_f(UINT16 op)
2169		{
2170		if (!m_is_34020) { unimpl(op); return; }
2171		logerror("020:cmovmc_f\n");
2172		}
2173
2174		void tms340x0_device::cmovmc_f_va(UINT16 op)
2175		{
2176		if (!m_is_34020) { unimpl(op); return; }
2177		logerror("020:cmovmc_f_va\n");
2178		}
2179
2180		void tms340x0_device::cmovmc_f_vb(UINT16 op)
2181		{
2182		if (!m_is_34020) { unimpl(op); return; }
2183		logerror("020:cmovmc_f_vb\n");
2184		}
2185
2186		void tms340x0_device::cmovmc_b(UINT16 op)
2187		{
2188		if (!m_is_34020) { unimpl(op); return; }
2189		logerror("020:cmovmc_b\n");
2190		}
2191
2192		#define CMPK(R)                                             \
2193		{                                                           \
2194		INT32 r;                                                \
2195		INT32 *rd = &R##REG(DSTREG(op));                            \
2196		INT32 t = PARAM_K(op); if (!t) t = 32;                      \
2197		CLR_NCZV();                                              \
2198		r = *rd - t;                                            \
2199		SET_NZCV_SUB(*rd,t,r);                                  \
2200		COUNT_CYCLES(1);                                        \
2201		}
2202		void tms340x0_device::cmp_k_a(UINT16 op)
2203		{
2204		if (!m_is_34020) { unimpl(op); return; }
2205		CMPK(A);
2206		}
2207		void tms340x0_device::cmp_k_b(UINT16 op)
2208		{
2209		if (!m_is_34020) { unimpl(op); return; }
2210		CMPK(B);
2211		}
2212
2213		void tms340x0_device::cvdxyl_a(UINT16 op)
2214		{
2215		if (!m_is_34020) { unimpl(op); return; }
2216		logerror("020:cvdxyl_a\n");
2217		}
2218
2219		void tms340x0_device::cvdxyl_b(UINT16 op)
2220		{
2221		if (!m_is_34020) { unimpl(op); return; }
2222		logerror("020:cvdxyl_b\n");
2223		}
2224
2225		void tms340x0_device::cvmxyl_a(UINT16 op)
2226		{
2227		if (!m_is_34020) { unimpl(op); return; }
2228		logerror("020:cvmxyl_a\n");
2229		}
2230
2231		void tms340x0_device::cvmxyl_b(UINT16 op)
2232		{
2233		if (!m_is_34020) { unimpl(op); return; }
2234		logerror("020:cvmxyl_b\n");
2235		}
2236
2237		void tms340x0_device::cvsxyl_a(UINT16 op)
2238		{
2239		if (!m_is_34020) { unimpl(op); return; }
2240		logerror("020:cvsxyl_a\n");
2241		}
2242
2243		void tms340x0_device::cvsxyl_b(UINT16 op)
2244		{
2245		if (!m_is_34020) { unimpl(op); return; }
2246		logerror("020:cvsxyl_b\n");
2247		}
2248
2249		void tms340x0_device::exgps_a(UINT16 op)
2250		{
2251		if (!m_is_34020) { unimpl(op); return; }
2252		logerror("020:exgps_a\n");
2253		}
2254
2255		void tms340x0_device::exgps_b(UINT16 op)
2256		{
2257		if (!m_is_34020) { unimpl(op); return; }
2258		logerror("020:exgps_b\n");
2259		}
2260
2261		void tms340x0_device::fline(UINT16 op)
2262		{
2263		if (!m_is_34020) { unimpl(op); return; }
2264		logerror("020:fline\n");
2265		}
2266
2267		void tms340x0_device::fpixeq(UINT16 op)
2268		{
2269		if (!m_is_34020) { unimpl(op); return; }
2270		logerror("020:fpixeq\n");
2271		}
2272
2273		void tms340x0_device::fpixne(UINT16 op)
2274		{
2275		if (!m_is_34020) { unimpl(op); return; }
2276		logerror("020:fpixne\n");
2277		}
2278
2279		void tms340x0_device::getps_a(UINT16 op)
2280		{
2281		if (!m_is_34020) { unimpl(op); return; }
2282		logerror("020:getps_a\n");
2283		}
2284
2285		void tms340x0_device::getps_b(UINT16 op)
2286		{
2287		if (!m_is_34020) { unimpl(op); return; }
2288		logerror("020:getps_b\n");
2289		}
2290
2291		void tms340x0_device::idle(UINT16 op)
2292		{
2293		if (!m_is_34020) { unimpl(op); return; }
2294		logerror("020:idle\n");
2295		}
2296
2297		void tms340x0_device::linit(UINT16 op)
2298		{
2299		if (!m_is_34020) { unimpl(op); return; }
2300		logerror("020:linit\n");
2301		}
2302
2303		void tms340x0_device::mwait(UINT16 op)
2304		{
2305		if (!m_is_34020) { unimpl(op); return; }
2306		}
2307
2308		void tms340x0_device::pfill_xy(UINT16 op)
2309		{
2310		if (!m_is_34020) { unimpl(op); return; }
2311		logerror("020:pfill_xy\n");
2312		}
2313
2314		void tms340x0_device::pixblt_l_m_l(UINT16 op)
2315		{
2316		if (!m_is_34020) { unimpl(op); return; }
2317		logerror("020:pixblt_l_m_l\n");
2318		}
2319
2320		void tms340x0_device::retm(UINT16 op)
2321		{
2322		if (!m_is_34020) { unimpl(op); return; }
2323		logerror("020:retm\n");
2324		}
2325
2326		#define RMO(R)                                                  \
2327		{                                                               \
2328		UINT32 res = 0;                                             \
2329		UINT32 rs  = R##REG(SRCREG(op));                                \
2330		INT32 *rd = &R##REG(DSTREG(op));                                \
2331		CLR_Z();                                                     \
2332		SET_Z_VAL(rs);                                             \
2333		if (rs)                                                     \
2334		{                                                           \
2335		while (!(rs & 0x00000001))                              \
2336		{                                                       \
2337		res++;                                              \
2338		rs >>= 1;                                           \
2339		}                                                       \
2340		}                                                           \
2341		*rd = res;                                                  \
2342		COUNT_CYCLES(1);                                            \
2343		}
2344
2345		void tms340x0_device::rmo_a(UINT16 op) { RMO(A); }
2346		void tms340x0_device::rmo_b(UINT16 op) { RMO(B); }
2347
2348		#define RPIX(R)                                 \
2349		{                                               \
2350		UINT32 v = R##REG(DSTREG(op));                  \
2351		switch (m_pixelshift)                    \
2352		{                                           \
2353		case 0:                                 \
2354		v = (v & 1) ? 0xffffffff : 0x00000000;\
2355		COUNT_CYCLES(8);                    \
2356		break;                              \
2357		case 1:                                 \
2358		v &= 3;                             \
2359		v |= v << 2;                        \
2360		v |= v << 4;                        \
2361		v |= v << 8;                        \
2362		v |= v << 16;                       \
2363		COUNT_CYCLES(7);                    \
2364		break;                              \
2365		case 2:                                 \
2366		v &= 0x0f;                          \
2367		v |= v << 4;                        \
2368		v |= v << 8;                        \
2369		v |= v << 16;                       \
2370		COUNT_CYCLES(6);                    \
2371		break;                              \
2372		case 3:                                 \
2373		v &= 0xff;                          \
2374		v |= v << 8;                        \
2375		v |= v << 16;                       \
2376		COUNT_CYCLES(5);                    \
2377		break;                              \
2378		case 4:                                 \
2379		v &= 0xffff;                        \
2380		v |= v << 16;                       \
2381		COUNT_CYCLES(4);                    \
2382		break;                              \
2383		case 5:                                 \
2384		COUNT_CYCLES(2);                    \
2385		break;                              \
2386		}                                           \
2387		R##REG(DSTREG(op)) = v;                         \
2388		}
2389
2390		void tms340x0_device::rpix_a(UINT16 op)
2391		{
2392		if (!m_is_34020) { unimpl(op); return; }
2393		RPIX(A);
2394		}
2395
2396		void tms340x0_device::rpix_b(UINT16 op)
2397		{
2398		if (!m_is_34020) { unimpl(op); return; }
2399		RPIX(B);
2400		}
2401
2402		void tms340x0_device::setcdp(UINT16 op)
2403		{
2404		if (!m_is_34020) { unimpl(op); return; }
2405		logerror("020:setcdp\n");
2406		}
2407
2408		void tms340x0_device::setcmp(UINT16 op)
2409		{
2410		if (!m_is_34020) { unimpl(op); return; }
2411		logerror("020:setcmp\n");
2412		}
2413
2414		void tms340x0_device::setcsp(UINT16 op)
2415		{
2416		if (!m_is_34020) { unimpl(op); return; }
2417		logerror("020:setcsp\n");
2418		}
2419
2420		void tms340x0_device::swapf_a(UINT16 op)
2421		{
2422		if (!m_is_34020) { unimpl(op); return; }
2423		logerror("020:swapf_a\n");
2424		}
2425
2426		void tms340x0_device::swapf_b(UINT16 op)
2427		{
2428		if (!m_is_34020) { unimpl(op); return; }
2429		logerror("020:swapf_b\n");
2430		}
2431
2432		void tms340x0_device::tfill_xy(UINT16 op)
2433		{
2434		if (!m_is_34020) { unimpl(op); return; }
2435		logerror("020:tfill_xy\n");
2436		}
2437
2438		void tms340x0_device::trapl(UINT16 op)
2439		{
2440		if (!m_is_34020) { unimpl(op); return; }
2441		logerror("020:trapl\n");
2442		}
2443
2444		void tms340x0_device::vblt_b_l(UINT16 op)
2445		{
2446		if (!m_is_34020) { unimpl(op); return; }
2447		logerror("020:vblt_b_l\n");
2448		}
2449
2450		void tms340x0_device::vfill_l(UINT16 op)
2451		{
2452		if (!m_is_34020) { unimpl(op); return; }
2453		logerror("020:vfill_l\n");
2454		}
2455
2456		void tms340x0_device::vlcol(UINT16 op)
2457		{
2458		if (!m_is_34020) { unimpl(op); return; }
2459		logerror("020:vlcol\n");
2460		}

trunk/src/devices/cpu/tms34010/34010ops.inc

r0	r250252
	1	// license:BSD-3-Clause
	2	// copyright-holders:Alex Pasadyn,Zsolt Vasvari
	3	/***************************************************************************
	4
	5	TMS34010: Portable Texas Instruments TMS34010 emulator
	6
	7	Copyright Alex Pasadyn/Zsolt Vasvari
	8	Parts based on code by Aaron Giles
	9
	10	***************************************************************************/
	11
	12
	13
	14	/***************************************************************************
	15	MISC MACROS
	16	***************************************************************************/
	17
	18	#define ZEXTEND(val,width) if (width) (val) &= ((UINT32)0xffffffff >> (32 - (width)))
	19	#define SEXTEND(val,width) if (width) (val) = (INT32)((val) << (32 - (width))) >> (32 - (width))
	20
	21	#define SXYTOL(val)   ((((INT16)(val).y * m_convsp) + ((INT16)(val).x << m_pixelshift)) + OFFSET())
	22	#define DXYTOL(val)   ((((INT16)(val).y * m_convdp) + ((INT16)(val).x << m_pixelshift)) + OFFSET())
	23	#define MXYTOL(val)   ((((INT16)(val).y * m_convmp) + ((INT16)(val).x << m_pixelshift)) + OFFSET())
	24
	25	#define COUNT_CYCLES(x)   m_icount -= x
	26	#define COUNT_UNKNOWN_CYCLES(x) COUNT_CYCLES(x)
	27
	28	#define CORRECT_ODD_PC(x) do { if (m_pc & 0x0f) logerror("%s to PC=%08X\n", x, m_pc); m_pc &= ~0x0f; } while (0)
	29
	30
	31
	32	/***************************************************************************
	33	FLAG HANDLING MACROS
	34	***************************************************************************/
	35
	36	#define SIGN(val)           ((val) & 0x80000000)
	37
	38	#define CLR_Z()                m_st &= ~STBIT_Z
	39	#define CLR_V()                m_st &= ~STBIT_V
	40	#define CLR_C()                m_st &= ~STBIT_C
	41	#define CLR_N()                m_st &= ~STBIT_N
	42	#define CLR_NZ()               m_st &= ~(STBIT_N | STBIT_Z)
	43	#define CLR_CZ()               m_st &= ~(STBIT_C | STBIT_Z)
	44	#define CLR_ZV()               m_st &= ~(STBIT_Z | STBIT_V)
	45	#define CLR_NZV()              m_st &= ~(STBIT_N | STBIT_Z | STBIT_V)
	46	#define CLR_NCZ()              m_st &= ~(STBIT_N | STBIT_C | STBIT_Z)
	47	#define CLR_NCZV()             m_st &= ~(STBIT_N | STBIT_C | STBIT_Z | STBIT_V)
	48
	49	#define SET_V_BIT_LO(val,bit) m_st |= ((val) << (28 - (bit))) & STBIT_V
	50	#define SET_V_BIT_HI(val,bit) m_st |= ((val) >> ((bit) - 28)) & STBIT_V
	51	#define SET_V_LOG(val)        m_st |= (val) << 28
	52	#define SET_Z_BIT_LO(val,bit) m_st |= ((val) << (29 - (bit))) & STBIT_Z
	53	#define SET_Z_BIT_HI(val,bit) m_st |= ((val) >> ((bit) - 29)) & STBIT_Z
	54	#define SET_Z_LOG(val)        m_st |= (val) << 29
	55	#define SET_C_BIT_LO(val,bit) m_st |= ((val) << (30 - (bit))) & STBIT_C
	56	#define SET_C_BIT_HI(val,bit) m_st |= ((val) >> ((bit) - 30)) & STBIT_C
	57	#define SET_C_LOG(val)        m_st |= (val) << 30
	58	#define SET_N_BIT(val,bit)    m_st |= ((val) << (31 - (bit))) & STBIT_N
	59	#define SET_N_LOG(val)        m_st |= (val) << 31
	60
	61	#define SET_Z_VAL(val)        SET_Z_LOG((val) == 0)
	62	#define SET_N_VAL(val)        SET_N_BIT(val, 31)
	63	#define SET_NZ_VAL(val)       SET_Z_VAL(val); SET_N_VAL(val)
	64	#define SET_V_SUB(a,b,r)      SET_V_BIT_HI(((a) ^ (b)) & ((a) ^ (r)), 31)
	65	#define SET_V_ADD(a,b,r)      SET_V_BIT_HI(~((a) ^ (b)) & ((a) ^ (r)), 31)
	66	#define SET_C_SUB(a,b)        SET_C_LOG((UINT32)(b) > (UINT32)(a))
	67	#define SET_C_ADD(a,b)        SET_C_LOG((UINT32)~(a) < (UINT32)(b))
	68	#define SET_NZV_SUB(a,b,r)    SET_NZ_VAL(r); SET_V_SUB(a,b,r)
	69	#define SET_NZCV_SUB(a,b,r)   SET_NZV_SUB(a,b,r); SET_C_SUB(a,b)
	70	#define SET_NZCV_ADD(a,b,r)   SET_NZ_VAL(r); SET_V_ADD(a,b,r); SET_C_ADD(a,b)
	71
	72	static const UINT8 fw_inc[32] = { 32,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 };
	73
	74
	75	/***************************************************************************
	76	UNIMPLEMENTED INSTRUCTION
	77	***************************************************************************/
	78
	79	void tms340x0_device::unimpl(UINT16 op)
	80	{
	81	/* kludge for Super High Impact -- this doesn't seem to cause */
	82	/* an illegal opcode exception */
	83	if (m_direct->read_word(TOBYTE(m_pc - 0x10)) == 0x0007)
	84	return;
	85
	86	/* 9 Ball Shootout calls to FFDF7468, expecting it */
	87	/* to execute the next instruction from FFDF7470 */
	88	/* but the instruction at FFDF7460 is an 0x0001 */
	89	if (m_direct->read_word(TOBYTE(m_pc - 0x10)) == 0x0001)
	90	return;
	91
	92	PUSH(m_pc);
	93	PUSH(m_st);
	94	RESET_ST();
	95	m_pc = RLONG(0xfffffc20);
	96	COUNT_UNKNOWN_CYCLES(16);
	97
	98	/* extra check to prevent bad things */
	99	if (m_pc == 0 || s_opcode_table[m_direct->read_word(TOBYTE(m_pc)) >> 4] == &tms34010_device::unimpl)
	100	{
	101	set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
	102	debugger_break(machine());
	103	}
	104	}
	105
	106
	107
	108	/***************************************************************************
	109	X/Y OPERATIONS
	110	***************************************************************************/
	111
	112	#define ADD_XY(R)                               \
	113	{                                               \
	114	XY  a =  R##REG_XY(SRCREG(op));                 \
	115	XY *b = &R##REG_XY(DSTREG(op));                 \
	116	CLR_NCZV();                                  \
	117	b->x += a.x;                                \
	118	b->y += a.y;                                \
	119	SET_N_LOG(b->x == 0);                      \
	120	SET_C_BIT_LO(b->y, 15);                        \
	121	SET_Z_LOG(b->y == 0);                      \
	122	SET_V_BIT_LO(b->x, 15);                        \
	123	COUNT_CYCLES(1);                            \
	124	}
	125	void tms340x0_device::add_xy_a(UINT16 op) { ADD_XY(A); }
	126	void tms340x0_device::add_xy_b(UINT16 op) { ADD_XY(B); }
	127
	128	#define SUB_XY(R)                               \
	129	{                                               \
	130	XY  a =  R##REG_XY(SRCREG(op));                 \
	131	XY *b = &R##REG_XY(DSTREG(op));                 \
	132	CLR_NCZV();                                  \
	133	SET_N_LOG(a.x == b->x);                        \
	134	SET_C_LOG(a.y > b->y);                     \
	135	SET_Z_LOG(a.y == b->y);                        \
	136	SET_V_LOG(a.x > b->x);                     \
	137	b->x -= a.x;                                \
	138	b->y -= a.y;                                \
	139	COUNT_CYCLES(1);                            \
	140	}
	141	void tms340x0_device::sub_xy_a(UINT16 op) { SUB_XY(A); }
	142	void tms340x0_device::sub_xy_b(UINT16 op) { SUB_XY(B); }
	143
	144	#define CMP_XY(R)                               \
	145	{                                               \
	146	INT16 res;                                  \
	147	XY a = R##REG_XY(DSTREG(op));                   \
	148	XY b = R##REG_XY(SRCREG(op));                   \
	149	CLR_NCZV();                                  \
	150	res = a.x-b.x;                              \
	151	SET_N_LOG(res == 0);                       \
	152	SET_V_BIT_LO(res, 15);                     \
	153	res = a.y-b.y;                              \
	154	SET_Z_LOG(res == 0);                       \
	155	SET_C_BIT_LO(res, 15);                     \
	156	COUNT_CYCLES(1);                            \
	157	}
	158	void tms340x0_device::cmp_xy_a(UINT16 op) { CMP_XY(A); }
	159	void tms340x0_device::cmp_xy_b(UINT16 op) { CMP_XY(B); }
	160
	161	#define CPW(R)                                  \
	162	{                                               \
	163	INT32 res = 0;                              \
	164	INT16 x = R##REG_X(SRCREG(op));                 \
	165	INT16 y = R##REG_Y(SRCREG(op));                 \
	166	\
	167	CLR_V();                                     \
	168	res |= ((WSTART_X() > x) ? 0x20  : 0);       \
	169	res |= ((x > WEND_X())   ? 0x40  : 0);       \
	170	res |= ((WSTART_Y() > y) ? 0x80  : 0);       \
	171	res |= ((y > WEND_Y())   ? 0x100 : 0);       \
	172	R##REG(DSTREG(op)) = res;                       \
	173	SET_V_LOG(res != 0);                       \
	174	COUNT_CYCLES(1);                            \
	175	}
	176	void tms340x0_device::cpw_a(UINT16 op) { CPW(A); }
	177	void tms340x0_device::cpw_b(UINT16 op) { CPW(B); }
	178
	179	#define CVXYL(R)                                    \
	180	{                                                   \
	181	R##REG(DSTREG(op)) = DXYTOL(R##REG_XY(SRCREG(op)));     \
	182	COUNT_CYCLES(3);                                \
	183	}
	184	void tms340x0_device::cvxyl_a(UINT16 op) { CVXYL(A); }
	185	void tms340x0_device::cvxyl_b(UINT16 op) { CVXYL(B); }
	186
	187	#define MOVX(R)                                     \
	188	{                                                   \
	189	R##REG(DSTREG(op)) = (R##REG(DSTREG(op)) & 0xffff0000) | (UINT16)R##REG(SRCREG(op));    \
	190	COUNT_CYCLES(1);                                                                    \
	191	}
	192	void tms340x0_device::movx_a(UINT16 op) { MOVX(A); }
	193	void tms340x0_device::movx_b(UINT16 op) { MOVX(B); }
	194
	195	#define MOVY(R)                                     \
	196	{                                                   \
	197	R##REG(DSTREG(op)) = (R##REG(SRCREG(op)) & 0xffff0000) | (UINT16)R##REG(DSTREG(op));    \
	198	COUNT_CYCLES(1);                                                                    \
	199	}
	200	void tms340x0_device::movy_a(UINT16 op) { MOVY(A); }
	201	void tms340x0_device::movy_b(UINT16 op) { MOVY(B); }
	202
	203
	204
	205	/***************************************************************************
	206	PIXEL TRANSFER OPERATIONS
	207	***************************************************************************/
	208
	209	#define PIXT_RI(R)                                  \
	210	{                                                   \
	211	WPIXEL(R##REG(DSTREG(op)),R##REG(SRCREG(op)));  \
	212	COUNT_UNKNOWN_CYCLES(2);                        \
	213	}
	214	void tms340x0_device::pixt_ri_a(UINT16 op) { PIXT_RI(A); }
	215	void tms340x0_device::pixt_ri_b(UINT16 op) { PIXT_RI(B); }
	216
	217	#define PIXT_RIXY(R)                                                                \
	218	{                                                                                   \
	219	if (WINDOW_CHECKING() != 0)                                                      \
	220	{                                                                               \
	221	CLR_V();                                                                     \
	222	if (R##REG_X(DSTREG(op)) < WSTART_X() || R##REG_X(DSTREG(op)) > WEND_X() ||               \
	223	R##REG_Y(DSTREG(op)) < WSTART_Y() || R##REG_Y(DSTREG(op)) > WEND_Y())             \
	224	{                                                                           \
	225	SET_V_LOG(1);                                                          \
	226	goto skip;                                                              \
	227	}                                                                           \
	228	if (WINDOW_CHECKING() == 1) goto skip;                                       \
	229	}                                                                               \
	230	WPIXEL(DXYTOL(R##REG_XY(DSTREG(op))),R##REG(SRCREG(op)));                               \
	231	skip:                                                                               \
	232	COUNT_UNKNOWN_CYCLES(4);                                                        \
	233	}
	234	void tms340x0_device::pixt_rixy_a(UINT16 op) { PIXT_RIXY(A); }
	235	void tms340x0_device::pixt_rixy_b(UINT16 op) { PIXT_RIXY(B); }
	236
	237	#define PIXT_IR(R)                                  \
	238	{                                                   \
	239	INT32 temp = RPIXEL(R##REG(SRCREG(op)));            \
	240	CLR_V();                                         \
	241	R##REG(DSTREG(op)) = temp;                          \
	242	SET_V_LOG(temp != 0);                          \
	243	COUNT_CYCLES(4);                                \
	244	}
	245	void tms340x0_device::pixt_ir_a(UINT16 op) { PIXT_IR(A); }
	246	void tms340x0_device::pixt_ir_b(UINT16 op) { PIXT_IR(B); }
	247
	248	#define PIXT_II(R)                                  \
	249	{                                                   \
	250	WPIXEL(R##REG(DSTREG(op)),RPIXEL(R##REG(SRCREG(op))));  \
	251	COUNT_UNKNOWN_CYCLES(4);                        \
	252	}
	253	void tms340x0_device::pixt_ii_a(UINT16 op) { PIXT_II(A); }
	254	void tms340x0_device::pixt_ii_b(UINT16 op) { PIXT_II(B); }
	255
	256	#define PIXT_IXYR(R)                                \
	257	{                                                   \
	258	INT32 temp = RPIXEL(SXYTOL(R##REG_XY(SRCREG(op)))); \
	259	CLR_V();                                         \
	260	R##REG(DSTREG(op)) = temp;                          \
	261	SET_V_LOG(temp != 0);                          \
	262	COUNT_CYCLES(6);                                \
	263	}
	264	void tms340x0_device::pixt_ixyr_a(UINT16 op) { PIXT_IXYR(A); }
	265	void tms340x0_device::pixt_ixyr_b(UINT16 op) { PIXT_IXYR(B); }
	266
	267	#define PIXT_IXYIXY(R)                                                              \
	268	{                                                                                   \
	269	if (WINDOW_CHECKING() != 0)                                                      \
	270	{                                                                               \
	271	CLR_V();                                                                     \
	272	if (R##REG_X(DSTREG(op)) < WSTART_X() || R##REG_X(DSTREG(op)) > WEND_X() ||               \
	273	R##REG_Y(DSTREG(op)) < WSTART_Y() || R##REG_Y(DSTREG(op)) > WEND_Y())             \
	274	{                                                                           \
	275	SET_V_LOG(1);                                                          \
	276	goto skip;                                                              \
	277	}                                                                           \
	278	if (WINDOW_CHECKING() == 1) goto skip;                                       \
	279	}                                                                               \
	280	WPIXEL(DXYTOL(R##REG_XY(DSTREG(op))),RPIXEL(SXYTOL(R##REG_XY(SRCREG(op)))));            \
	281	skip:                                                                               \
	282	COUNT_UNKNOWN_CYCLES(7);                                                        \
	283	}
	284	void tms340x0_device::pixt_ixyixy_a(UINT16 op) { PIXT_IXYIXY(A); }
	285	void tms340x0_device::pixt_ixyixy_b(UINT16 op) { PIXT_IXYIXY(B); }
	286
	287	#define DRAV(R)                                                                     \
	288	{                                                                                   \
	289	if (WINDOW_CHECKING() != 0)                                                      \
	290	{                                                                               \
	291	CLR_V();                                                                     \
	292	if (R##REG_X(DSTREG(op)) < WSTART_X() || R##REG_X(DSTREG(op)) > WEND_X() ||               \
	293	R##REG_Y(DSTREG(op)) < WSTART_Y() || R##REG_Y(DSTREG(op)) > WEND_Y())             \
	294	{                                                                           \
	295	SET_V_LOG(1);                                                          \
	296	goto skip;                                                              \
	297	}                                                                           \
	298	if (WINDOW_CHECKING() == 1) goto skip;                                       \
	299	}                                                                               \
	300	WPIXEL(DXYTOL(R##REG_XY(DSTREG(op))),COLOR1());                                      \
	301	skip:                                                                               \
	302	R##REG_X(DSTREG(op)) += R##REG_X(SRCREG(op));                                           \
	303	R##REG_Y(DSTREG(op)) += R##REG_Y(SRCREG(op));                                           \
	304	COUNT_UNKNOWN_CYCLES(4);                                                        \
	305	}
	306	void tms340x0_device::drav_a(UINT16 op) { DRAV(A); }
	307	void tms340x0_device::drav_b(UINT16 op) { DRAV(B); }
	308
	309
	310
	311	/***************************************************************************
	312	ARITHMETIC OPERATIONS
	313	***************************************************************************/
	314
	315	#define ABS(R)                                              \
	316	{                                                           \
	317	INT32 *rd = &R##REG(DSTREG(op));                            \
	318	INT32 r = 0 - *rd;                                      \
	319	CLR_NZV();                                               \
	320	if (r > 0) *rd = r;                                     \
	321	SET_NZ_VAL(r);                                         \
	322	SET_V_LOG(r == (INT32)0x80000000);                     \
	323	COUNT_CYCLES(1);                                        \
	324	}
	325	void tms340x0_device::abs_a(UINT16 op) { ABS(A); }
	326	void tms340x0_device::abs_b(UINT16 op) { ABS(B); }
	327
	328	#define ADD(R)                                              \
	329	{                                                           \
	330	INT32 a = R##REG(SRCREG(op));                               \
	331	INT32 *rd = &R##REG(DSTREG(op));                            \
	332	INT32 b = *rd;                                          \
	333	INT32 r = a + b;                                        \
	334	CLR_NCZV();                                              \
	335	*rd = r;                                                \
	336	SET_NZCV_ADD(a,b,r);                                    \
	337	COUNT_CYCLES(1);                                        \
	338	}
	339	void tms340x0_device::add_a(UINT16 op) { ADD(A); }
	340	void tms340x0_device::add_b(UINT16 op) { ADD(B); }
	341
	342	#define ADDC(R)                                             \
	343	{                                                           \
	344	/* I'm not sure to which side the carry is added to, should */  \
	345	/* verify it against the examples */                    \
	346	INT32 a = R##REG(SRCREG(op));                               \
	347	INT32 *rd = &R##REG(DSTREG(op));                            \
	348	INT32 b = *rd;                                          \
	349	INT32 r = a + b + (C_FLAG() ? 1 : 0);                        \
	350	CLR_NCZV();                                              \
	351	*rd = r;                                                \
	352	SET_NZCV_ADD(a,b,r);                                    \
	353	COUNT_CYCLES(1);                                        \
	354	}
	355	void tms340x0_device::addc_a(UINT16 op) { ADDC(A); }
	356	void tms340x0_device::addc_b(UINT16 op) { ADDC(B); }
	357
	358	#define ADDI_W(R)                                           \
	359	{                                                           \
	360	INT32 a = PARAM_WORD();                              \
	361	INT32 *rd = &R##REG(DSTREG(op));                            \
	362	INT32 b = *rd;                                          \
	363	INT32 r = a + b;                                        \
	364	CLR_NCZV();                                              \
	365	*rd = r;                                                \
	366	SET_NZCV_ADD(a,b,r);                                    \
	367	COUNT_CYCLES(2);                                        \
	368	}
	369	void tms340x0_device::addi_w_a(UINT16 op) { ADDI_W(A); }
	370	void tms340x0_device::addi_w_b(UINT16 op) { ADDI_W(B); }
	371
	372	#define ADDI_L(R)                                           \
	373	{                                                           \
	374	INT32 a = PARAM_LONG();                              \
	375	INT32 *rd = &R##REG(DSTREG(op));                            \
	376	INT32 b = *rd;                                          \
	377	INT32 r = a + b;                                        \
	378	CLR_NCZV();                                              \
	379	*rd = r;                                                \
	380	SET_NZCV_ADD(a,b,r);                                    \
	381	COUNT_CYCLES(3);                                        \
	382	}
	383	void tms340x0_device::addi_l_a(UINT16 op) { ADDI_L(A); }
	384	void tms340x0_device::addi_l_b(UINT16 op) { ADDI_L(B); }
	385
	386	#define ADDK(R)                                             \
	387	{                                                           \
	388	INT32 a = fw_inc[PARAM_K(op)];                              \
	389	INT32 *rd = &R##REG(DSTREG(op));                            \
	390	INT32 b = *rd;                                          \
	391	INT32 r = a + b;                                        \
	392	CLR_NCZV();                                              \
	393	*rd = r;                                                \
	394	SET_NZCV_ADD(a,b,r);                                    \
	395	COUNT_CYCLES(1);                                        \
	396	}
	397	void tms340x0_device::addk_a(UINT16 op) { ADDK(A); }
	398	void tms340x0_device::addk_b(UINT16 op) { ADDK(B); }
	399
	400	#define AND(R)                                              \
	401	{                                                           \
	402	INT32 *rd = &R##REG(DSTREG(op));                            \
	403	CLR_Z();                                                 \
	404	*rd &= R##REG(SRCREG(op));                                  \
	405	SET_Z_VAL(*rd);                                            \
	406	COUNT_CYCLES(1);                                        \
	407	}
	408	void tms340x0_device::and_a(UINT16 op) { AND(A); }
	409	void tms340x0_device::and_b(UINT16 op) { AND(B); }
	410
	411	#define ANDI(R)                                             \
	412	{                                                           \
	413	INT32 *rd = &R##REG(DSTREG(op));                            \
	414	CLR_Z();                                                 \
	415	*rd &= ~PARAM_LONG();                                \
	416	SET_Z_VAL(*rd);                                            \
	417	COUNT_CYCLES(3);                                        \
	418	}
	419	void tms340x0_device::andi_a(UINT16 op) { ANDI(A); }
	420	void tms340x0_device::andi_b(UINT16 op) { ANDI(B); }
	421
	422	#define ANDN(R)                                             \
	423	{                                                           \
	424	INT32 *rd = &R##REG(DSTREG(op));                            \
	425	CLR_Z();                                                 \
	426	*rd &= ~R##REG(SRCREG(op));                                 \
	427	SET_Z_VAL(*rd);                                            \
	428	COUNT_CYCLES(1);                                        \
	429	}
	430	void tms340x0_device::andn_a(UINT16 op) { ANDN(A); }
	431	void tms340x0_device::andn_b(UINT16 op) { ANDN(B); }
	432
	433	#define BTST_K(R)                                           \
	434	{                                                           \
	435	int bit = 31 - PARAM_K(op);                                 \
	436	CLR_Z();                                                 \
	437	if (bit <= 29)                                          \
	438	SET_Z_BIT_LO(~R##REG(DSTREG(op)), bit);                    \
	439	else                                                    \
	440	SET_Z_BIT_HI(~R##REG(DSTREG(op)), bit);                    \
	441	COUNT_CYCLES(1);                                        \
	442	}
	443	void tms340x0_device::btst_k_a(UINT16 op) { BTST_K(A); }
	444	void tms340x0_device::btst_k_b(UINT16 op) { BTST_K(B); }
	445
	446	#define BTST_R(R)                                           \
	447	{                                                           \
	448	int bit = R##REG(SRCREG(op)) & 0x1f;                        \
	449	CLR_Z();                                                 \
	450	if (bit <= 29)                                          \
	451	SET_Z_BIT_LO(~R##REG(DSTREG(op)), bit);                    \
	452	else                                                    \
	453	SET_Z_BIT_HI(~R##REG(DSTREG(op)), bit);                    \
	454	COUNT_CYCLES(2);                                        \
	455	}
	456	void tms340x0_device::btst_r_a(UINT16 op) { BTST_R(A); }
	457	void tms340x0_device::btst_r_b(UINT16 op) { BTST_R(B); }
	458
	459	void tms340x0_device::clrc(UINT16 op)
	460	{
	461	CLR_C();
	462	COUNT_CYCLES(1);
	463	}
	464
	465	#define CMP(R)                                              \
	466	{                                                           \
	467	INT32 *rs = &R##REG(SRCREG(op));                            \
	468	INT32 *rd = &R##REG(DSTREG(op));                            \
	469	INT32 r = *rd - *rs;                                    \
	470	CLR_NCZV();                                              \
	471	SET_NZCV_SUB(*rd,*rs,r);                                \
	472	COUNT_CYCLES(1);                                        \
	473	}
	474	void tms340x0_device::cmp_a(UINT16 op) { CMP(A); }
	475	void tms340x0_device::cmp_b(UINT16 op) { CMP(B); }
	476
	477	#define CMPI_W(R)                                           \
	478	{                                                           \
	479	INT32 *rd = &R##REG(DSTREG(op));                            \
	480	INT32 t = (INT16)~PARAM_WORD();                      \
	481	INT32 r = *rd - t;                                      \
	482	CLR_NCZV();                                              \
	483	SET_NZCV_SUB(*rd,t,r);                                  \
	484	COUNT_CYCLES(2);                                        \
	485	}
	486	void tms340x0_device::cmpi_w_a(UINT16 op) { CMPI_W(A); }
	487	void tms340x0_device::cmpi_w_b(UINT16 op) { CMPI_W(B); }
	488
	489	#define CMPI_L(R)                                           \
	490	{                                                           \
	491	INT32 *rd = &R##REG(DSTREG(op));                            \
	492	INT32 t = ~PARAM_LONG();                             \
	493	INT32 r = *rd - t;                                      \
	494	CLR_NCZV();                                              \
	495	SET_NZCV_SUB(*rd,t,r);                                  \
	496	COUNT_CYCLES(3);                                        \
	497	}
	498	void tms340x0_device::cmpi_l_a(UINT16 op) { CMPI_L(A); }
	499	void tms340x0_device::cmpi_l_b(UINT16 op) { CMPI_L(B); }
	500
	501	void tms340x0_device::dint(UINT16 op)
	502	{
	503	m_st &= ~STBIT_IE;
	504	COUNT_CYCLES(3);
	505	}
	506
	507	#define DIVS(R)                                             \
	508	{                                                           \
	509	INT32 *rs  = &R##REG(SRCREG(op));                           \
	510	INT32 *rd1 = &R##REG(DSTREG(op));                           \
	511	CLR_NZV();                                               \
	512	if (!(DSTREG(op) & 1))                                      \
	513	{                                                       \
	514	if (!*rs)                                           \
	515	{                                                   \
	516	SET_V_LOG(1);                                  \
	517	}                                                   \
	518	else                                                \
	519	{                                                   \
	520	INT32 *rd2 = &R##REG(DSTREG(op)+1);                 \
	521	INT64 dividend = ((UINT64)*rd1 << 32) | (UINT32)*rd2; \
	522	INT64 quotient = dividend / *rs;                \
	523	INT32 remainder = dividend % *rs;               \
	524	UINT32 signbits = (INT32)quotient >> 31;        \
	525	if (EXTRACT_64HI(quotient) != signbits)         \
	526	{                                               \
	527	SET_V_LOG(1);                              \
	528	}                                               \
	529	else                                            \
	530	{                                               \
	531	*rd1 = quotient;                            \
	532	*rd2 = remainder;                           \
	533	SET_NZ_VAL(*rd1);                          \
	534	}                                               \
	535	}                                                   \
	536	COUNT_CYCLES(40);                                   \
	537	}                                                       \
	538	else                                                    \
	539	{                                                       \
	540	if (!*rs)                                           \
	541	{                                                   \
	542	SET_V_LOG(1);                                  \
	543	}                                                   \
	544	else                                                \
	545	{                                                   \
	546	*rd1 /= *rs;                                    \
	547	SET_NZ_VAL(*rd1);                              \
	548	}                                                   \
	549	COUNT_CYCLES(39);                                   \
	550	}                                                       \
	551	}
	552	void tms340x0_device::divs_a(UINT16 op) { DIVS(A); }
	553	void tms340x0_device::divs_b(UINT16 op) { DIVS(B); }
	554
	555	#define DIVU(R)                                             \
	556	{                                                           \
	557	INT32 *rs  = &R##REG(SRCREG(op));                           \
	558	INT32 *rd1 = &R##REG(DSTREG(op));                           \
	559	CLR_ZV();                                                    \
	560	if (!(DSTREG(op) & 1))                                      \
	561	{                                                       \
	562	if (!*rs)                                           \
	563	{                                                   \
	564	SET_V_LOG(1);                                  \
	565	}                                                   \
	566	else                                                \
	567	{                                                   \
	568	INT32 *rd2 = &R##REG(DSTREG(op)+1);                 \
	569	UINT64 dividend  = ((UINT64)*rd1 << 32) | (UINT32)*rd2; \
	570	UINT64 quotient  = dividend / (UINT32)*rs;      \
	571	UINT32 remainder = dividend % (UINT32)*rs;      \
	572	if (EXTRACT_64HI(quotient) != 0)                \
	573	{                                               \
	574	SET_V_LOG(1);                              \
	575	}                                               \
	576	else                                            \
	577	{                                               \
	578	*rd1 = quotient;                            \
	579	*rd2 = remainder;                           \
	580	SET_Z_VAL(*rd1);                           \
	581	}                                               \
	582	}                                                   \
	583	}                                                       \
	584	else                                                    \
	585	{                                                       \
	586	if (!*rs)                                           \
	587	{                                                   \
	588	SET_V_LOG(1);                                  \
	589	}                                                   \
	590	else                                                \
	591	{                                                   \
	592	*rd1 = (UINT32)*rd1 / (UINT32)*rs;              \
	593	SET_Z_VAL(*rd1);                               \
	594	}                                                   \
	595	}                                                       \
	596	COUNT_CYCLES(37);                                       \
	597	}
	598	void tms340x0_device::divu_a(UINT16 op) { DIVU(A); }
	599	void tms340x0_device::divu_b(UINT16 op) { DIVU(B); }
	600
	601	void tms340x0_device::eint(UINT16 op)
	602	{
	603	m_st |= STBIT_IE;
	604	check_interrupt();
	605	COUNT_CYCLES(3);
	606	}
	607
	608	#define EXGF(F,R)                                               \
	609	{                                                               \
	610	UINT8 shift = F ? 6 : 0;                                    \
	611	INT32 *rd = &R##REG(DSTREG(op));                                \
	612	UINT32 temp = (m_st >> shift) & 0x3f;                    \
	613	m_st &= ~(0x3f << shift);                                \
	614	m_st |= (*rd & 0x3f) << shift;                           \
	615	*rd = temp;                                                 \
	616	COUNT_CYCLES(1);                                            \
	617	}
	618	void tms340x0_device::exgf0_a(UINT16 op) { EXGF(0,A); }
	619	void tms340x0_device::exgf0_b(UINT16 op) { EXGF(0,B); }
	620	void tms340x0_device::exgf1_a(UINT16 op) { EXGF(1,A); }
	621	void tms340x0_device::exgf1_b(UINT16 op) { EXGF(1,B); }
	622
	623	#define LMO(R)                                                  \
	624	{                                                               \
	625	UINT32 res = 0;                                             \
	626	UINT32 rs  = R##REG(SRCREG(op));                                \
	627	INT32 *rd = &R##REG(DSTREG(op));                                \
	628	CLR_Z();                                                     \
	629	SET_Z_VAL(rs);                                             \
	630	if (rs)                                                     \
	631	{                                                           \
	632	while (!(rs & 0x80000000))                              \
	633	{                                                       \
	634	res++;                                              \
	635	rs <<= 1;                                           \
	636	}                                                       \
	637	}                                                           \
	638	*rd = res;                                                  \
	639	COUNT_CYCLES(1);                                            \
	640	}
	641	void tms340x0_device::lmo_a(UINT16 op) { LMO(A); }
	642	void tms340x0_device::lmo_b(UINT16 op) { LMO(B); }
	643
	644	#define MMFM(R)                                                 \
	645	{                                                               \
	646	INT32 i;                                                    \
	647	UINT16 l = (UINT16) PARAM_WORD();                        \
	648	COUNT_CYCLES(3);                                            \
	649	{                                                           \
	650	INT32 rd = DSTREG(op);                                      \
	651	for (i = 15; i >= 0 ; i--)                              \
	652	{                                                       \
	653	if (l & 0x8000)                                     \
	654	{                                                   \
	655	R##REG(i) = RLONG(R##REG(rd));                 \
	656	R##REG(rd) += 0x20;                             \
	657	COUNT_CYCLES(4);                                \
	658	}                                                   \
	659	l <<= 1;                                            \
	660	}                                                       \
	661	}                                                           \
	662	}
	663	void tms340x0_device::mmfm_a(UINT16 op) { MMFM(A); }
	664	void tms340x0_device::mmfm_b(UINT16 op) { MMFM(B); }
	665
	666	#define MMTM(R)                                                 \
	667	{                                                               \
	668	UINT32 i;                                                   \
	669	UINT16 l = (UINT16) PARAM_WORD();                        \
	670	COUNT_CYCLES(2);                                            \
	671	{                                                           \
	672	INT32 rd = DSTREG(op);                                      \
	673	if (m_is_34020)                                      \
	674	{                                                       \
	675	CLR_N();                                             \
	676	SET_N_VAL(R##REG(rd) ^ 0x80000000);                    \
	677	}                                                       \
	678	for (i = 0; i  < 16; i++)                               \
	679	{                                                       \
	680	if (l & 0x8000)                                     \
	681	{                                                   \
	682	R##REG(rd) -= 0x20;                             \
	683	WLONG(R##REG(rd),R##REG(i));                   \
	684	COUNT_CYCLES(4);                                \
	685	}                                                   \
	686	l <<= 1;                                            \
	687	}                                                       \
	688	}                                                           \
	689	}
	690	void tms340x0_device::mmtm_a(UINT16 op) { MMTM(A); }
	691	void tms340x0_device::mmtm_b(UINT16 op) { MMTM(B); }
	692
	693	#define MODS(R)                                                 \
	694	{                                                               \
	695	INT32 *rs = &R##REG(SRCREG(op));                                \
	696	INT32 *rd = &R##REG(DSTREG(op));                                \
	697	CLR_NZV();                                                   \
	698	if (*rs != 0)                                               \
	699	{                                                           \
	700	*rd %= *rs;                                             \
	701	SET_NZ_VAL(*rd);                                       \
	702	}                                                           \
	703	else                                                        \
	704	SET_V_LOG(1);                                          \
	705	COUNT_CYCLES(40);                                           \
	706	}
	707	void tms340x0_device::mods_a(UINT16 op) { MODS(A); }
	708	void tms340x0_device::mods_b(UINT16 op) { MODS(B); }
	709
	710	#define MODU(R)                                                 \
	711	{                                                               \
	712	INT32 *rs = &R##REG(SRCREG(op));                                \
	713	INT32 *rd = &R##REG(DSTREG(op));                                \
	714	CLR_ZV();                                                        \
	715	if (*rs != 0)                                               \
	716	{                                                           \
	717	*rd = (UINT32)*rd % (UINT32)*rs;                        \
	718	SET_Z_VAL(*rd);                                            \
	719	}                                                           \
	720	else                                                        \
	721	SET_V_LOG(1);                                          \
	722	COUNT_CYCLES(35);                                           \
	723	}
	724	void tms340x0_device::modu_a(UINT16 op) { MODU(A); }
	725	void tms340x0_device::modu_b(UINT16 op) { MODU(B); }
	726
	727	#define MPYS(R)                                                 \
	728	{                                                               \
	729	INT32 *rd1 = &R##REG(DSTREG(op));                               \
	730	INT32 m1 = R##REG(SRCREG(op));                                  \
	731	INT64 product;                                              \
	732	\
	733	SEXTEND(m1, FW(1));                                         \
	734	CLR_NZ();                                                        \
	735	product = mul_32x32(m1, *rd1);                          \
	736	SET_Z_LOG(product == 0);                                   \
	737	SET_N_BIT(product >> 32, 31);                              \
	738	\
	739	*rd1             = EXTRACT_64HI(product);                       \
	740	R##REG(DSTREG(op)|1) = EXTRACT_64LO(product);                       \
	741	\
	742	COUNT_CYCLES(20);                                           \
	743	}
	744	void tms340x0_device::mpys_a(UINT16 op) { MPYS(A); }
	745	void tms340x0_device::mpys_b(UINT16 op) { MPYS(B); }
	746
	747	#define MPYU(R)                                                 \
	748	{                                                               \
	749	INT32 *rd1 = &R##REG(DSTREG(op));                               \
	750	UINT32 m1 = R##REG(SRCREG(op));                                 \
	751	UINT64 product;                                             \
	752	\
	753	ZEXTEND(m1, FW(1));                                         \
	754	CLR_Z();                                                     \
	755	product = mulu_32x32(m1, *rd1);                     \
	756	SET_Z_LOG(product == 0);                                   \
	757	\
	758	*rd1             = EXTRACT_64HI(product);                       \
	759	R##REG(DSTREG(op)|1) = EXTRACT_64LO(product);                       \
	760	\
	761	COUNT_CYCLES(21);                                           \
	762	}
	763	void tms340x0_device::mpyu_a(UINT16 op) { MPYU(A); }
	764	void tms340x0_device::mpyu_b(UINT16 op) { MPYU(B); }
	765
	766	#define NEG(R)                                                  \
	767	{                                                               \
	768	INT32 *rd = &R##REG(DSTREG(op));                                \
	769	INT32 r = 0 - *rd;                                          \
	770	CLR_NCZV();                                                  \
	771	SET_NZCV_SUB(0,*rd,r);                                      \
	772	*rd = r;                                                    \
	773	COUNT_CYCLES(1);                                            \
	774	}
	775	void tms340x0_device::neg_a(UINT16 op) { NEG(A); }
	776	void tms340x0_device::neg_b(UINT16 op) { NEG(B); }
	777
	778	#define NEGB(R)                                                 \
	779	{                                                               \
	780	INT32 *rd = &R##REG(DSTREG(op));                                \
	781	INT32 t = *rd + (C_FLAG() ? 1 : 0);                          \
	782	INT32 r = 0 - t;                                            \
	783	CLR_NCZV();                                                  \
	784	SET_NZCV_SUB(0,t,r);                                        \
	785	*rd = r;                                                    \
	786	COUNT_CYCLES(1);                                            \
	787	}
	788	void tms340x0_device::negb_a(UINT16 op) { NEGB(A); }
	789	void tms340x0_device::negb_b(UINT16 op) { NEGB(B); }
	790
	791	void tms340x0_device::nop(UINT16 op)
	792	{
	793	COUNT_CYCLES(1);
	794	}
	795
	796	#define NOT(R)                                                  \
	797	{                                                               \
	798	INT32 *rd = &R##REG(DSTREG(op));                                \
	799	CLR_Z();                                                     \
	800	*rd = ~(*rd);                                               \
	801	SET_Z_VAL(*rd);                                                \
	802	COUNT_CYCLES(1);                                            \
	803	}
	804	void tms340x0_device::not_a(UINT16 op) { NOT(A); }
	805	void tms340x0_device::not_b(UINT16 op) { NOT(B); }
	806
	807	#define OR(R)                                                   \
	808	{                                                               \
	809	INT32 *rd = &R##REG(DSTREG(op));                                \
	810	CLR_Z();                                                     \
	811	*rd |= R##REG(SRCREG(op));                                      \
	812	SET_Z_VAL(*rd);                                                \
	813	COUNT_CYCLES(1);                                            \
	814	}
	815	void tms340x0_device::or_a(UINT16 op) { OR(A); }
	816	void tms340x0_device::or_b(UINT16 op) { OR(B); }
	817
	818	#define ORI(R)                                                  \
	819	{                                                               \
	820	INT32 *rd = &R##REG(DSTREG(op));                                \
	821	CLR_Z();                                                     \
	822	*rd |= PARAM_LONG();                                     \
	823	SET_Z_VAL(*rd);                                                \
	824	COUNT_CYCLES(3);                                            \
	825	}
	826	void tms340x0_device::ori_a(UINT16 op) { ORI(A); }
	827	void tms340x0_device::ori_b(UINT16 op) { ORI(B); }
	828
	829	void tms340x0_device::setc(UINT16 op)
	830	{
	831	SET_C_LOG(1);
	832	COUNT_CYCLES(1);
	833	}
	834
	835	#define SETF(F)                                                 \
	836	{                                                               \
	837	UINT8 shift = F ? 6 : 0;                                    \
	838	m_st &= ~(0x3f << shift);                                \
	839	m_st |= (op & 0x3f) << shift;                        \
	840	COUNT_CYCLES(1+F);                                          \
	841	}
	842	void tms340x0_device::setf0(UINT16 op) { SETF(0); }
	843	void tms340x0_device::setf1(UINT16 op) { SETF(1); }
	844
	845	#define SEXT(F,R)                                               \
	846	{                                                               \
	847	INT32 *rd = &R##REG(DSTREG(op));                                \
	848	CLR_NZ();                                                        \
	849	SEXTEND(*rd,FW(F));                                         \
	850	SET_NZ_VAL(*rd);                                           \
	851	COUNT_CYCLES(3);                                            \
	852	}
	853	void tms340x0_device::sext0_a(UINT16 op) { SEXT(0,A); }
	854	void tms340x0_device::sext0_b(UINT16 op) { SEXT(0,B); }
	855	void tms340x0_device::sext1_a(UINT16 op) { SEXT(1,A); }
	856	void tms340x0_device::sext1_b(UINT16 op) { SEXT(1,B); }
	857
	858	#define RL(R,K)                                                 \
	859	{                                                               \
	860	INT32 *rd = &R##REG(DSTREG(op));                                \
	861	INT32 res = *rd;                                            \
	862	INT32 k = (K);                                              \
	863	CLR_CZ();                                                        \
	864	if (k)                                                      \
	865	{                                                           \
	866	res<<=(k-1);                                            \
	867	SET_C_BIT_HI(res, 31);                                 \
	868	res<<=1;                                                \
	869	res |= (((UINT32)*rd)>>((-k)&0x1f));                    \
	870	*rd = res;                                              \
	871	}                                                           \
	872	SET_Z_VAL(res);                                                \
	873	COUNT_CYCLES(1);                                            \
	874	}
	875	void tms340x0_device::rl_k_a(UINT16 op) { RL(A,PARAM_K(op)); }
	876	void tms340x0_device::rl_k_b(UINT16 op) { RL(B,PARAM_K(op)); }
	877	void tms340x0_device::rl_r_a(UINT16 op) { RL(A,AREG(SRCREG(op))&0x1f); }
	878	void tms340x0_device::rl_r_b(UINT16 op) { RL(B,BREG(SRCREG(op))&0x1f); }
	879
	880	#define SLA(R,K)                                                \
	881	{                                                               \
	882	INT32 *rd = &R##REG(DSTREG(op));                                \
	883	UINT32 res = *rd;                                           \
	884	INT32 k = K;                                                \
	885	CLR_NCZV();                                                  \
	886	if (k)                                                      \
	887	{                                                           \
	888	UINT32 mask = (0xffffffff<<(31-k))&0x7fffffff;          \
	889	UINT32 res2 = SIGN(res) ? res^mask : res;               \
	890	SET_V_LOG((res2 & mask) != 0);                         \
	891	\
	892	res<<=(k-1);                                            \
	893	SET_C_BIT_HI(res, 31);                                 \
	894	res<<=1;                                                \
	895	*rd = res;                                              \
	896	}                                                           \
	897	SET_NZ_VAL(res);                                           \
	898	COUNT_CYCLES(3);                                            \
	899	}
	900	void tms340x0_device::sla_k_a(UINT16 op) { SLA(A,PARAM_K(op)); }
	901	void tms340x0_device::sla_k_b(UINT16 op) { SLA(B,PARAM_K(op)); }
	902	void tms340x0_device::sla_r_a(UINT16 op) { SLA(A,AREG(SRCREG(op))&0x1f); }
	903	void tms340x0_device::sla_r_b(UINT16 op) { SLA(B,BREG(SRCREG(op))&0x1f); }
	904
	905	#define SLL(R,K)                                                \
	906	{                                                               \
	907	INT32 *rd = &R##REG(DSTREG(op));                                \
	908	UINT32 res = *rd;                                           \
	909	INT32 k = K;                                                \
	910	CLR_CZ();                                                        \
	911	if (k)                                                      \
	912	{                                                           \
	913	res<<=(k-1);                                            \
	914	SET_C_BIT_HI(res, 31);                                 \
	915	res<<=1;                                                \
	916	*rd = res;                                              \
	917	}                                                           \
	918	SET_Z_VAL(res);                                                \
	919	COUNT_CYCLES(1);                                            \
	920	}
	921	void tms340x0_device::sll_k_a(UINT16 op) { SLL(A,PARAM_K(op)); }
	922	void tms340x0_device::sll_k_b(UINT16 op) { SLL(B,PARAM_K(op)); }
	923	void tms340x0_device::sll_r_a(UINT16 op) { SLL(A,AREG(SRCREG(op))&0x1f); }
	924	void tms340x0_device::sll_r_b(UINT16 op) { SLL(B,BREG(SRCREG(op))&0x1f); }
	925
	926	#define SRA(R,K)                                                \
	927	{                                                               \
	928	INT32 *rd = &R##REG(DSTREG(op));                                \
	929	INT32 res = *rd;                                            \
	930	INT32 k = (-(K)) & 0x1f;                                    \
	931	CLR_NCZ();                                                   \
	932	if (k)                                                      \
	933	{                                                           \
	934	res>>=(k-1);                                            \
	935	SET_C_BIT_LO(res, 0);                                  \
	936	res>>=1;                                                \
	937	*rd = res;                                              \
	938	}                                                           \
	939	SET_NZ_VAL(res);                                           \
	940	COUNT_CYCLES(1);                                            \
	941	}
	942	void tms340x0_device::sra_k_a(UINT16 op) { SRA(A,PARAM_K(op)); }
	943	void tms340x0_device::sra_k_b(UINT16 op) { SRA(B,PARAM_K(op)); }
	944	void tms340x0_device::sra_r_a(UINT16 op) { SRA(A,AREG(SRCREG(op))); }
	945	void tms340x0_device::sra_r_b(UINT16 op) { SRA(B,BREG(SRCREG(op))); }
	946
	947	#define SRL(R,K)                                                \
	948	{                                                               \
	949	INT32 *rd = &R##REG(DSTREG(op));                                \
	950	UINT32 res = *rd;                                           \
	951	INT32 k = (-(K)) & 0x1f;                                    \
	952	CLR_CZ();                                                        \
	953	if (k)                                                      \
	954	{                                                           \
	955	res>>=(k-1);                                            \
	956	SET_C_BIT_LO(res, 0);                                  \
	957	res>>=1;                                                \
	958	*rd = res;                                              \
	959	}                                                           \
	960	SET_Z_VAL(res);                                                \
	961	COUNT_CYCLES(1);                                            \
	962	}
	963	void tms340x0_device::srl_k_a(UINT16 op) { SRL(A,PARAM_K(op)); }
	964	void tms340x0_device::srl_k_b(UINT16 op) { SRL(B,PARAM_K(op)); }
	965	void tms340x0_device::srl_r_a(UINT16 op) { SRL(A,AREG(SRCREG(op))); }
	966	void tms340x0_device::srl_r_b(UINT16 op) { SRL(B,BREG(SRCREG(op))); }
	967
	968	#define SUB(R)                                                  \
	969	{                                                               \
	970	INT32 *rs = &R##REG(SRCREG(op));                                \
	971	INT32 *rd = &R##REG(DSTREG(op));                                \
	972	INT32 r = *rd - *rs;                                        \
	973	CLR_NCZV();                                                  \
	974	SET_NZCV_SUB(*rd,*rs,r);                                    \
	975	*rd = r;                                                    \
	976	COUNT_CYCLES(1);                                            \
	977	}
	978	void tms340x0_device::sub_a(UINT16 op) { SUB(A); }
	979	void tms340x0_device::sub_b(UINT16 op) { SUB(B); }
	980
	981	#define SUBB(R)                                                 \
	982	{                                                               \
	983	INT32 *rd = &R##REG(DSTREG(op));                                \
	984	INT32 t = R##REG(SRCREG(op));                                   \
	985	INT32 r = *rd - t - (C_FLAG() ? 1 : 0);                      \
	986	CLR_NCZV();                                                  \
	987	SET_NZCV_SUB(*rd,t,r);                                      \
	988	*rd = r;                                                    \
	989	COUNT_CYCLES(1);                                            \
	990	}
	991	void tms340x0_device::subb_a(UINT16 op) { SUBB(A); }
	992	void tms340x0_device::subb_b(UINT16 op) { SUBB(B); }
	993
	994	#define SUBI_W(R)                                               \
	995	{                                                               \
	996	INT32 *rd = &R##REG(DSTREG(op));                                \
	997	INT32 r;                                                    \
	998	INT32 t = ~PARAM_WORD();                                 \
	999	CLR_NCZV();                                                  \
	1000	r = *rd - t;                                                \
	1001	SET_NZCV_SUB(*rd,t,r);                                      \
	1002	*rd = r;                                                    \
	1003	COUNT_CYCLES(2);                                            \
	1004	}
	1005	void tms340x0_device::subi_w_a(UINT16 op) { SUBI_W(A); }
	1006	void tms340x0_device::subi_w_b(UINT16 op) { SUBI_W(B); }
	1007
	1008	#define SUBI_L(R)                                               \
	1009	{                                                               \
	1010	INT32 *rd = &R##REG(DSTREG(op));                                \
	1011	INT32 t = ~PARAM_LONG();                                 \
	1012	INT32 r = *rd - t;                                          \
	1013	CLR_NCZV();                                                  \
	1014	SET_NZCV_SUB(*rd,t,r);                                      \
	1015	*rd = r;                                                    \
	1016	COUNT_CYCLES(3);                                            \
	1017	}
	1018	void tms340x0_device::subi_l_a(UINT16 op) { SUBI_L(A); }
	1019	void tms340x0_device::subi_l_b(UINT16 op) { SUBI_L(B); }
	1020
	1021	#define SUBK(R)                                                 \
	1022	{                                                               \
	1023	INT32 *rd = &R##REG(DSTREG(op));                                \
	1024	INT32 t = fw_inc[PARAM_K(op)];                                  \
	1025	INT32 r = *rd - t;                                          \
	1026	CLR_NCZV();                                                  \
	1027	SET_NZCV_SUB(*rd,t,r);                                      \
	1028	*rd = r;                                                    \
	1029	COUNT_CYCLES(1);                                            \
	1030	}
	1031	void tms340x0_device::subk_a(UINT16 op) { SUBK(A); }
	1032	void tms340x0_device::subk_b(UINT16 op) { SUBK(B); }
	1033
	1034	#define XOR(R)                                                  \
	1035	{                                                               \
	1036	INT32 *rd = &R##REG(DSTREG(op));                                \
	1037	CLR_Z();                                                     \
	1038	*rd ^= R##REG(SRCREG(op));                                      \
	1039	SET_Z_VAL(*rd);                                                \
	1040	COUNT_CYCLES(1);                                            \
	1041	}
	1042	void tms340x0_device::xor_a(UINT16 op) { XOR(A); }
	1043	void tms340x0_device::xor_b(UINT16 op) { XOR(B); }
	1044
	1045	#define XORI(R)                                                 \
	1046	{                                                               \
	1047	INT32 *rd = &R##REG(DSTREG(op));                                \
	1048	CLR_Z();                                                     \
	1049	*rd ^= PARAM_LONG();                                     \
	1050	SET_Z_VAL(*rd);                                                \
	1051	COUNT_CYCLES(3);                                            \
	1052	}
	1053	void tms340x0_device::xori_a(UINT16 op) { XORI(A); }
	1054	void tms340x0_device::xori_b(UINT16 op) { XORI(B); }
	1055
	1056	#define ZEXT(F,R)                                               \
	1057	{                                                               \
	1058	INT32 *rd = &R##REG(DSTREG(op));                                \
	1059	CLR_Z();                                                     \
	1060	ZEXTEND(*rd,FW(F));                                         \
	1061	SET_Z_VAL(*rd);                                                \
	1062	COUNT_CYCLES(1);                                            \
	1063	}
	1064	void tms340x0_device::zext0_a(UINT16 op) { ZEXT(0,A); }
	1065	void tms340x0_device::zext0_b(UINT16 op) { ZEXT(0,B); }
	1066	void tms340x0_device::zext1_a(UINT16 op) { ZEXT(1,A); }
	1067	void tms340x0_device::zext1_b(UINT16 op) { ZEXT(1,B); }
	1068
	1069
	1070
	1071	/***************************************************************************
	1072	MOVE INSTRUCTIONS
	1073	***************************************************************************/
	1074
	1075	#define MOVI_W(R)                                               \
	1076	{                                                               \
	1077	INT32 *rd = &R##REG(DSTREG(op));                                \
	1078	CLR_NZV();                                                   \
	1079	*rd=PARAM_WORD();                                        \
	1080	SET_NZ_VAL(*rd);                                           \
	1081	COUNT_CYCLES(2);                                            \
	1082	}
	1083	void tms340x0_device::movi_w_a(UINT16 op) { MOVI_W(A); }
	1084	void tms340x0_device::movi_w_b(UINT16 op) { MOVI_W(B); }
	1085
	1086	#define MOVI_L(R)                                               \
	1087	{                                                               \
	1088	INT32 *rd = &R##REG(DSTREG(op));                                \
	1089	CLR_NZV();                                                   \
	1090	*rd=PARAM_LONG();                                        \
	1091	SET_NZ_VAL(*rd);                                           \
	1092	COUNT_CYCLES(3);                                            \
	1093	}
	1094	void tms340x0_device::movi_l_a(UINT16 op) { MOVI_L(A); }
	1095	void tms340x0_device::movi_l_b(UINT16 op) { MOVI_L(B); }
	1096
	1097	#define MOVK(R)                                                 \
	1098	{                                                               \
	1099	INT32 k = PARAM_K(op); if (!k) k = 32;                          \
	1100	R##REG(DSTREG(op)) = k;                                         \
	1101	COUNT_CYCLES(1);                                            \
	1102	}
	1103	void tms340x0_device::movk_a(UINT16 op) { MOVK(A); }
	1104	void tms340x0_device::movk_b(UINT16 op) { MOVK(B); }
	1105
	1106	#define MOVB_RN(R)                                              \
	1107	{                                                               \
	1108	WBYTE(R##REG(DSTREG(op)),R##REG(SRCREG(op)));                      \
	1109	COUNT_CYCLES(1);                                            \
	1110	}
	1111	void tms340x0_device::movb_rn_a(UINT16 op) { MOVB_RN(A); }
	1112	void tms340x0_device::movb_rn_b(UINT16 op) { MOVB_RN(B); }
	1113
	1114	#define MOVB_NR(R)                                              \
	1115	{                                                               \
	1116	INT32 *rd = &R##REG(DSTREG(op));                                \
	1117	CLR_NZV();                                                   \
	1118	*rd = (INT8)RBYTE(R##REG(SRCREG(op)));                     \
	1119	SET_NZ_VAL(*rd);                                           \
	1120	COUNT_CYCLES(3);                                            \
	1121	}
	1122	void tms340x0_device::movb_nr_a(UINT16 op) { MOVB_NR(A); }
	1123	void tms340x0_device::movb_nr_b(UINT16 op) { MOVB_NR(B); }
	1124
	1125	#define MOVB_NN(R)                                              \
	1126	{                                                               \
	1127	WBYTE(R##REG(DSTREG(op)),(UINT32)(UINT8)RBYTE(R##REG(SRCREG(op))));\
	1128	COUNT_CYCLES(3);                                            \
	1129	}
	1130	void tms340x0_device::movb_nn_a(UINT16 op) { MOVB_NN(A); }
	1131	void tms340x0_device::movb_nn_b(UINT16 op) { MOVB_NN(B); }
	1132
	1133	#define MOVB_R_NO(R)                                            \
	1134	{                                                               \
	1135	INT32 o = PARAM_WORD();                                  \
	1136	WBYTE(R##REG(DSTREG(op))+o,R##REG(SRCREG(op)));                        \
	1137	COUNT_CYCLES(3);                                            \
	1138	}
	1139	void tms340x0_device::movb_r_no_a(UINT16 op) { MOVB_R_NO(A); }
	1140	void tms340x0_device::movb_r_no_b(UINT16 op) { MOVB_R_NO(B); }
	1141
	1142	#define MOVB_NO_R(R)                                            \
	1143	{                                                               \
	1144	INT32 *rd = &R##REG(DSTREG(op));                                \
	1145	INT32 o = PARAM_WORD();                                  \
	1146	CLR_NZV();                                                   \
	1147	*rd = (INT8)RBYTE(R##REG(SRCREG(op))+o);                   \
	1148	SET_NZ_VAL(*rd);                                           \
	1149	COUNT_CYCLES(5);                                            \
	1150	}
	1151	void tms340x0_device::movb_no_r_a(UINT16 op) { MOVB_NO_R(A); }
	1152	void tms340x0_device::movb_no_r_b(UINT16 op) { MOVB_NO_R(B); }
	1153
	1154	#define MOVB_NO_NO(R)                                           \
	1155	{                                                               \
	1156	INT32 o1 = PARAM_WORD();                                 \
	1157	INT32 o2 = PARAM_WORD();                                 \
	1158	WBYTE(R##REG(DSTREG(op))+o2,(UINT32)(UINT8)RBYTE(R##REG(SRCREG(op))+o1)); \
	1159	COUNT_CYCLES(5);                                            \
	1160	}
	1161	void tms340x0_device::movb_no_no_a(UINT16 op) { MOVB_NO_NO(A); }
	1162	void tms340x0_device::movb_no_no_b(UINT16 op) { MOVB_NO_NO(B); }
	1163
	1164	#define MOVB_RA(R)                                              \
	1165	{                                                               \
	1166	WBYTE(PARAM_LONG(),R##REG(DSTREG(op)));                     \
	1167	COUNT_CYCLES(1);                                            \
	1168	}
	1169	void tms340x0_device::movb_ra_a(UINT16 op) { MOVB_RA(A); }
	1170	void tms340x0_device::movb_ra_b(UINT16 op) { MOVB_RA(B); }
	1171
	1172	#define MOVB_AR(R)                                              \
	1173	{                                                               \
	1174	INT32 *rd = &R##REG(DSTREG(op));                                \
	1175	CLR_NZV();                                                   \
	1176	*rd = (INT8)RBYTE(PARAM_LONG());                    \
	1177	SET_NZ_VAL(*rd);                                           \
	1178	COUNT_CYCLES(5);                                            \
	1179	}
	1180	void tms340x0_device::movb_ar_a(UINT16 op) { MOVB_AR(A); }
	1181	void tms340x0_device::movb_ar_b(UINT16 op) { MOVB_AR(B); }
	1182
	1183	void tms340x0_device::movb_aa(UINT16 op)
	1184	{
	1185	UINT32 bitaddrs=PARAM_LONG();
	1186	WBYTE(PARAM_LONG(),(UINT32)(UINT8)RBYTE(bitaddrs));
	1187	COUNT_CYCLES(6);
	1188	}
	1189
	1190	#define MOVE_RR(RS,RD)                                          \
	1191	{                                                               \
	1192	INT32 *rd = &RD##REG(DSTREG(op));                               \
	1193	CLR_NZV();                                                   \
	1194	*rd = RS##REG(SRCREG(op));                                      \
	1195	SET_NZ_VAL(*rd);                                           \
	1196	COUNT_CYCLES(1);                                            \
	1197	}
	1198	void tms340x0_device::move_rr_a (UINT16 op) { MOVE_RR(A,A); }
	1199	void tms340x0_device::move_rr_b (UINT16 op) { MOVE_RR(B,B); }
	1200	void tms340x0_device::move_rr_ax(UINT16 op) { MOVE_RR(A,B); }
	1201	void tms340x0_device::move_rr_bx(UINT16 op) { MOVE_RR(B,A); }
	1202
	1203	#define MOVE_RN(F,R)                                            \
	1204	{                                                               \
	1205	WFIELD##F(R##REG(DSTREG(op)),R##REG(SRCREG(op)));                   \
	1206	COUNT_CYCLES(1);                                            \
	1207	}
	1208	void tms340x0_device::move0_rn_a (UINT16 op) { MOVE_RN(0,A); }
	1209	void tms340x0_device::move0_rn_b (UINT16 op) { MOVE_RN(0,B); }
	1210	void tms340x0_device::move1_rn_a (UINT16 op) { MOVE_RN(1,A); }
	1211	void tms340x0_device::move1_rn_b (UINT16 op) { MOVE_RN(1,B); }
	1212
	1213	#define MOVE_R_DN(F,R)                                          \
	1214	{                                                               \
	1215	INT32 *rd = &R##REG(DSTREG(op));                                \
	1216	*rd-=fw_inc[FW(F)];                                         \
	1217	WFIELD##F(*rd,R##REG(SRCREG(op)));                              \
	1218	COUNT_CYCLES(2);                                            \
	1219	}
	1220	void tms340x0_device::move0_r_dn_a (UINT16 op) { MOVE_R_DN(0,A); }
	1221	void tms340x0_device::move0_r_dn_b (UINT16 op) { MOVE_R_DN(0,B); }
	1222	void tms340x0_device::move1_r_dn_a (UINT16 op) { MOVE_R_DN(1,A); }
	1223	void tms340x0_device::move1_r_dn_b (UINT16 op) { MOVE_R_DN(1,B); }
	1224
	1225	#define MOVE_R_NI(F,R)                                          \
	1226	{                                                               \
	1227	INT32 *rd = &R##REG(DSTREG(op));                                \
	1228	WFIELD##F(*rd,R##REG(SRCREG(op)));                              \
	1229	*rd+=fw_inc[FW(F)];                                         \
	1230	COUNT_CYCLES(1);                                            \
	1231	}
	1232	void tms340x0_device::move0_r_ni_a (UINT16 op) { MOVE_R_NI(0,A); }
	1233	void tms340x0_device::move0_r_ni_b (UINT16 op) { MOVE_R_NI(0,B); }
	1234	void tms340x0_device::move1_r_ni_a (UINT16 op) { MOVE_R_NI(1,A); }
	1235	void tms340x0_device::move1_r_ni_b (UINT16 op) { MOVE_R_NI(1,B); }
	1236
	1237	#define MOVE_NR(F,R)                                            \
	1238	{                                                               \
	1239	INT32 *rd = &R##REG(DSTREG(op));                                \
	1240	CLR_NZV();                                                   \
	1241	*rd = RFIELD##F(R##REG(SRCREG(op)));                            \
	1242	SET_NZ_VAL(*rd);                                           \
	1243	COUNT_CYCLES(3);                                            \
	1244	}
	1245	void tms340x0_device::move0_nr_a (UINT16 op) { MOVE_NR(0,A); }
	1246	void tms340x0_device::move0_nr_b (UINT16 op) { MOVE_NR(0,B); }
	1247	void tms340x0_device::move1_nr_a (UINT16 op) { MOVE_NR(1,A); }
	1248	void tms340x0_device::move1_nr_b (UINT16 op) { MOVE_NR(1,B); }
	1249
	1250	#define MOVE_DN_R(F,R)                                          \
	1251	{                                                               \
	1252	INT32 *rd = &R##REG(DSTREG(op));                                \
	1253	INT32 *rs = &R##REG(SRCREG(op));                                \
	1254	CLR_NZV();                                                   \
	1255	*rs-=fw_inc[FW(F)];                                         \
	1256	*rd = RFIELD##F(*rs);                                       \
	1257	SET_NZ_VAL(*rd);                                           \
	1258	COUNT_CYCLES(4);                                            \
	1259	}
	1260	void tms340x0_device::move0_dn_r_a (UINT16 op) { MOVE_DN_R(0,A); }
	1261	void tms340x0_device::move0_dn_r_b (UINT16 op) { MOVE_DN_R(0,B); }
	1262	void tms340x0_device::move1_dn_r_a (UINT16 op) { MOVE_DN_R(1,A); }
	1263	void tms340x0_device::move1_dn_r_b (UINT16 op) { MOVE_DN_R(1,B); }
	1264
	1265	#define MOVE_NI_R(F,R)                                          \
	1266	{                                                               \
	1267	INT32 *rd = &R##REG(DSTREG(op));                                \
	1268	INT32 *rs = &R##REG(SRCREG(op));                                \
	1269	INT32 data = RFIELD##F(*rs);                                \
	1270	CLR_NZV();                                                   \
	1271	*rs+=fw_inc[FW(F)];                                         \
	1272	*rd = data;                                                 \
	1273	SET_NZ_VAL(*rd);                                           \
	1274	COUNT_CYCLES(3);                                            \
	1275	}
	1276	void tms340x0_device::move0_ni_r_a (UINT16 op) { MOVE_NI_R(0,A); }
	1277	void tms340x0_device::move0_ni_r_b (UINT16 op) { MOVE_NI_R(0,B); }
	1278	void tms340x0_device::move1_ni_r_a (UINT16 op) { MOVE_NI_R(1,A); }
	1279	void tms340x0_device::move1_ni_r_b (UINT16 op) { MOVE_NI_R(1,B); }
	1280
	1281	#define MOVE_NN(F,R)                                            \
	1282	{                                                               \
	1283	WFIELD##F(R##REG(DSTREG(op)),RFIELD##F(R##REG(SRCREG(op))));        \
	1284	COUNT_CYCLES(3);                                            \
	1285	}
	1286	void tms340x0_device::move0_nn_a (UINT16 op) { MOVE_NN(0,A); }
	1287	void tms340x0_device::move0_nn_b (UINT16 op) { MOVE_NN(0,B); }
	1288	void tms340x0_device::move1_nn_a (UINT16 op) { MOVE_NN(1,A); }
	1289	void tms340x0_device::move1_nn_b (UINT16 op) { MOVE_NN(1,B); }
	1290
	1291	#define MOVE_DN_DN(F,R)                                         \
	1292	{                                                               \
	1293	INT32 *rd = &R##REG(DSTREG(op));                                \
	1294	INT32 *rs = &R##REG(SRCREG(op));                                \
	1295	INT32 data;                                                 \
	1296	*rs-=fw_inc[FW(F)];                                         \
	1297	data = RFIELD##F(*rs);                                      \
	1298	*rd-=fw_inc[FW(F)];                                         \
	1299	WFIELD##F(*rd,data);                                        \
	1300	COUNT_CYCLES(4);                                            \
	1301	}
	1302	void tms340x0_device::move0_dn_dn_a (UINT16 op) { MOVE_DN_DN(0,A); }
	1303	void tms340x0_device::move0_dn_dn_b (UINT16 op) { MOVE_DN_DN(0,B); }
	1304	void tms340x0_device::move1_dn_dn_a (UINT16 op) { MOVE_DN_DN(1,A); }
	1305	void tms340x0_device::move1_dn_dn_b (UINT16 op) { MOVE_DN_DN(1,B); }
	1306
	1307	#define MOVE_NI_NI(F,R)                                         \
	1308	{                                                               \
	1309	INT32 *rd = &R##REG(DSTREG(op));                                \
	1310	INT32 *rs = &R##REG(SRCREG(op));                                \
	1311	INT32 data = RFIELD##F(*rs);                                \
	1312	*rs+=fw_inc[FW(F)];                                         \
	1313	WFIELD##F(*rd,data);                                        \
	1314	*rd+=fw_inc[FW(F)];                                         \
	1315	COUNT_CYCLES(4);                                            \
	1316	}
	1317	void tms340x0_device::move0_ni_ni_a (UINT16 op) { MOVE_NI_NI(0,A); }
	1318	void tms340x0_device::move0_ni_ni_b (UINT16 op) { MOVE_NI_NI(0,B); }
	1319	void tms340x0_device::move1_ni_ni_a (UINT16 op) { MOVE_NI_NI(1,A); }
	1320	void tms340x0_device::move1_ni_ni_b (UINT16 op) { MOVE_NI_NI(1,B); }
	1321
	1322	#define MOVE_R_NO(F,R)                                          \
	1323	{                                                               \
	1324	INT32 o = PARAM_WORD();                                  \
	1325	WFIELD##F(R##REG(DSTREG(op))+o,R##REG(SRCREG(op)));                 \
	1326	COUNT_CYCLES(3);                                            \
	1327	}
	1328	void tms340x0_device::move0_r_no_a (UINT16 op) { MOVE_R_NO(0,A); }
	1329	void tms340x0_device::move0_r_no_b (UINT16 op) { MOVE_R_NO(0,B); }
	1330	void tms340x0_device::move1_r_no_a (UINT16 op) { MOVE_R_NO(1,A); }
	1331	void tms340x0_device::move1_r_no_b (UINT16 op) { MOVE_R_NO(1,B); }
	1332
	1333	#define MOVE_NO_R(F,R)                                          \
	1334	{                                                               \
	1335	INT32 *rd = &R##REG(DSTREG(op));                                \
	1336	INT32 o = PARAM_WORD();                                  \
	1337	CLR_NZV();                                                   \
	1338	*rd = RFIELD##F(R##REG(SRCREG(op))+o);                          \
	1339	SET_NZ_VAL(*rd);                                           \
	1340	COUNT_CYCLES(5);                                            \
	1341	}
	1342	void tms340x0_device::move0_no_r_a (UINT16 op) { MOVE_NO_R(0,A); }
	1343	void tms340x0_device::move0_no_r_b (UINT16 op) { MOVE_NO_R(0,B); }
	1344	void tms340x0_device::move1_no_r_a (UINT16 op) { MOVE_NO_R(1,A); }
	1345	void tms340x0_device::move1_no_r_b (UINT16 op) { MOVE_NO_R(1,B); }
	1346
	1347	#define MOVE_NO_NI(F,R)                                         \
	1348	{                                                               \
	1349	INT32 *rd = &R##REG(DSTREG(op));                                \
	1350	INT32 o = PARAM_WORD();                                  \
	1351	INT32 data = RFIELD##F(R##REG(SRCREG(op))+o);                   \
	1352	WFIELD##F(*rd,data);                                        \
	1353	*rd+=fw_inc[FW(F)];                                         \
	1354	COUNT_CYCLES(5);                                            \
	1355	}
	1356	void tms340x0_device::move0_no_ni_a (UINT16 op) { MOVE_NO_NI(0,A); }
	1357	void tms340x0_device::move0_no_ni_b (UINT16 op) { MOVE_NO_NI(0,B); }
	1358	void tms340x0_device::move1_no_ni_a (UINT16 op) { MOVE_NO_NI(1,A); }
	1359	void tms340x0_device::move1_no_ni_b (UINT16 op) { MOVE_NO_NI(1,B); }
	1360
	1361	#define MOVE_NO_NO(F,R)                                         \
	1362	{                                                               \
	1363	INT32 o1 = PARAM_WORD();                                 \
	1364	INT32 o2 = PARAM_WORD();                                 \
	1365	INT32 data = RFIELD##F(R##REG(SRCREG(op))+o1);                  \
	1366	WFIELD##F(R##REG(DSTREG(op))+o2,data);                          \
	1367	COUNT_CYCLES(5);                                            \
	1368	}
	1369	void tms340x0_device::move0_no_no_a (UINT16 op) { MOVE_NO_NO(0,A); }
	1370	void tms340x0_device::move0_no_no_b (UINT16 op) { MOVE_NO_NO(0,B); }
	1371	void tms340x0_device::move1_no_no_a (UINT16 op) { MOVE_NO_NO(1,A); }
	1372	void tms340x0_device::move1_no_no_b (UINT16 op) { MOVE_NO_NO(1,B); }
	1373
	1374	#define MOVE_RA(F,R)                                            \
	1375	{                                                               \
	1376	WFIELD##F(PARAM_LONG(),R##REG(DSTREG(op)));                  \
	1377	COUNT_CYCLES(3);                                            \
	1378	}
	1379	void tms340x0_device::move0_ra_a (UINT16 op) { MOVE_RA(0,A); }
	1380	void tms340x0_device::move0_ra_b (UINT16 op) { MOVE_RA(0,B); }
	1381	void tms340x0_device::move1_ra_a (UINT16 op) { MOVE_RA(1,A); }
	1382	void tms340x0_device::move1_ra_b (UINT16 op) { MOVE_RA(1,B); }
	1383
	1384	#define MOVE_AR(F,R)                                            \
	1385	{                                                               \
	1386	INT32 *rd = &R##REG(DSTREG(op));                                \
	1387	CLR_NZV();                                                   \
	1388	*rd = RFIELD##F(PARAM_LONG());                           \
	1389	SET_NZ_VAL(*rd);                                           \
	1390	COUNT_CYCLES(5);                                            \
	1391	}
	1392	void tms340x0_device::move0_ar_a (UINT16 op) { MOVE_AR(0,A); }
	1393	void tms340x0_device::move0_ar_b (UINT16 op) { MOVE_AR(0,B); }
	1394	void tms340x0_device::move1_ar_a (UINT16 op) { MOVE_AR(1,A); }
	1395	void tms340x0_device::move1_ar_b (UINT16 op) { MOVE_AR(1,B); }
	1396
	1397	#define MOVE_A_NI(F,R)                                          \
	1398	{                                                               \
	1399	INT32 *rd = &R##REG(DSTREG(op));                                \
	1400	WFIELD##F(*rd,RFIELD##F(PARAM_LONG()));                  \
	1401	*rd+=fw_inc[FW(F)];                                         \
	1402	COUNT_CYCLES(5);                                            \
	1403	}
	1404	void tms340x0_device::move0_a_ni_a (UINT16 op) { MOVE_A_NI(0,A); }
	1405	void tms340x0_device::move0_a_ni_b (UINT16 op) { MOVE_A_NI(0,B); }
	1406	void tms340x0_device::move1_a_ni_a (UINT16 op) { MOVE_A_NI(1,A); }
	1407	void tms340x0_device::move1_a_ni_b (UINT16 op) { MOVE_A_NI(1,B); }
	1408
	1409	#define MOVE_AA(F)                                              \
	1410	{                                                               \
	1411	UINT32 bitaddrs=PARAM_LONG();                            \
	1412	WFIELD##F(PARAM_LONG(),RFIELD##F(bitaddrs));             \
	1413	COUNT_CYCLES(7);                                            \
	1414	}
	1415	void tms340x0_device::move0_aa (UINT16 op) { MOVE_AA(0); }
	1416	void tms340x0_device::move1_aa (UINT16 op) { MOVE_AA(1); }
	1417
	1418
	1419
	1420	/***************************************************************************
	1421	PROGRAM CONTROL INSTRUCTIONS
	1422	***************************************************************************/
	1423
	1424	#define CALL(R)                                                 \
	1425	{                                                               \
	1426	PUSH(m_pc);                                                 \
	1427	m_pc = R##REG(DSTREG(op));                                       \
	1428	CORRECT_ODD_PC("CALL");                                     \
	1429	COUNT_CYCLES(3);                                            \
	1430	}
	1431	void tms340x0_device::call_a (UINT16 op) { CALL(A); }
	1432	void tms340x0_device::call_b (UINT16 op) { CALL(B); }
	1433
	1434	void tms340x0_device::callr(UINT16 op)
	1435	{
	1436	PUSH(m_pc+0x10);
	1437	m_pc += (PARAM_WORD_NO_INC()<<4)+0x10;
	1438	COUNT_CYCLES(3);
	1439	}
	1440
	1441	void tms340x0_device::calla(UINT16 op)
	1442	{
	1443	PUSH(m_pc+0x20);
	1444	m_pc = PARAM_LONG_NO_INC();
	1445	CORRECT_ODD_PC("CALLA");
	1446	COUNT_CYCLES(4);
	1447	}
	1448
	1449	#define DSJ(R)                                                  \
	1450	{                                                               \
	1451	if (--R##REG(DSTREG(op)))                                       \
	1452	{                                                           \
	1453	m_pc += (PARAM_WORD_NO_INC()<<4)+0x10;                    \
	1454	COUNT_CYCLES(3);                                        \
	1455	}                                                           \
	1456	else                                                        \
	1457	{                                                           \
	1458	SKIP_WORD();                                             \
	1459	COUNT_CYCLES(2);                                        \
	1460	}                                                           \
	1461	}
	1462	void tms340x0_device::dsj_a (UINT16 op) { DSJ(A); }
	1463	void tms340x0_device::dsj_b (UINT16 op) { DSJ(B); }
	1464
	1465	#define DSJEQ(R)                                                \
	1466	{                                                               \
	1467	if (Z_FLAG())                                                    \
	1468	{                                                           \
	1469	if (--R##REG(DSTREG(op)))                                   \
	1470	{                                                       \
	1471	m_pc += (PARAM_WORD_NO_INC()<<4)+0x10;                \
	1472	COUNT_CYCLES(3);                                    \
	1473	}                                                       \
	1474	else                                                    \
	1475	{                                                       \
	1476	SKIP_WORD();                                         \
	1477	COUNT_CYCLES(2);                                    \
	1478	}                                                       \
	1479	}                                                           \
	1480	else                                                        \
	1481	{                                                           \
	1482	SKIP_WORD();                                             \
	1483	COUNT_CYCLES(2);                                        \
	1484	}                                                           \
	1485	}
	1486	void tms340x0_device::dsjeq_a (UINT16 op) { DSJEQ(A); }
	1487	void tms340x0_device::dsjeq_b (UINT16 op) { DSJEQ(B); }
	1488
	1489	#define DSJNE(R)                                                \
	1490	{                                                               \
	1491	if (!Z_FLAG())                                               \
	1492	{                                                           \
	1493	if (--R##REG(DSTREG(op)))                                   \
	1494	{                                                       \
	1495	m_pc += (PARAM_WORD_NO_INC()<<4)+0x10;                \
	1496	COUNT_CYCLES(3);                                    \
	1497	}                                                       \
	1498	else                                                    \
	1499	{                                                       \
	1500	SKIP_WORD();                                         \
	1501	COUNT_CYCLES(2);                                    \
	1502	}                                                       \
	1503	}                                                           \
	1504	else                                                        \
	1505	{                                                           \
	1506	SKIP_WORD();                                             \
	1507	COUNT_CYCLES(2);                                        \
	1508	}                                                           \
	1509	}
	1510	void tms340x0_device::dsjne_a (UINT16 op) { DSJNE(A); }
	1511	void tms340x0_device::dsjne_b (UINT16 op) { DSJNE(B); }
	1512
	1513	#define DSJS(R)                                                 \
	1514	{                                                               \
	1515	if (op & 0x0400)                                        \
	1516	{                                                           \
	1517	if (--R##REG(DSTREG(op)))                                   \
	1518	{                                                       \
	1519	m_pc -= ((PARAM_K(op))<<4);                              \
	1520	COUNT_CYCLES(2);                                    \
	1521	}                                                       \
	1522	else                                                    \
	1523	COUNT_CYCLES(3);                                    \
	1524	}                                                           \
	1525	else                                                        \
	1526	{                                                           \
	1527	if (--R##REG(DSTREG(op)))                                   \
	1528	{                                                       \
	1529	m_pc += ((PARAM_K(op))<<4);                              \
	1530	COUNT_CYCLES(2);                                    \
	1531	}                                                       \
	1532	else                                                    \
	1533	COUNT_CYCLES(3);                                    \
	1534	}                                                           \
	1535	}
	1536	void tms340x0_device::dsjs_a (UINT16 op) { DSJS(A); }
	1537	void tms340x0_device::dsjs_b (UINT16 op) { DSJS(B); }
	1538
	1539	void tms340x0_device::emu(UINT16 op)
	1540	{
	1541	/* in RUN state, this instruction is a NOP */
	1542	COUNT_CYCLES(6);
	1543	}
	1544
	1545	#define EXGPC(R)                                                \
	1546	{                                                               \
	1547	INT32 *rd = &R##REG(DSTREG(op));                                \
	1548	INT32 temppc = *rd;                                         \
	1549	*rd = m_pc;                                                  \
	1550	m_pc = temppc;                                               \
	1551	CORRECT_ODD_PC("EXGPC");                                    \
	1552	COUNT_CYCLES(2);                                            \
	1553	}
	1554	void tms340x0_device::exgpc_a (UINT16 op) { EXGPC(A); }
	1555	void tms340x0_device::exgpc_b (UINT16 op) { EXGPC(B); }
	1556
	1557	#define GETPC(R)                                                \
	1558	{                                                               \
	1559	R##REG(DSTREG(op)) = m_pc;                                       \
	1560	COUNT_CYCLES(1);                                            \
	1561	}
	1562	void tms340x0_device::getpc_a (UINT16 op) { GETPC(A); }
	1563	void tms340x0_device::getpc_b (UINT16 op) { GETPC(B); }
	1564
	1565	#define GETST(R)                                                \
	1566	{                                                               \
	1567	R##REG(DSTREG(op)) = m_st;                               \
	1568	COUNT_CYCLES(1);                                            \
	1569	}
	1570	void tms340x0_device::getst_a (UINT16 op) { GETST(A); }
	1571	void tms340x0_device::getst_b (UINT16 op) { GETST(B); }
	1572
	1573	#define j_xx_8(TAKE)                                            \
	1574	{                                                               \
	1575	if (DSTREG(op))                                                 \
	1576	{                                                           \
	1577	if (TAKE)                                               \
	1578	{                                                       \
	1579	m_pc += (PARAM_REL8(op) << 4);                           \
	1580	COUNT_CYCLES(2);                                    \
	1581	}                                                       \
	1582	else                                                    \
	1583	COUNT_CYCLES(1);                                    \
	1584	}                                                           \
	1585	else                                                        \
	1586	{                                                           \
	1587	if (TAKE)                                               \
	1588	{                                                       \
	1589	m_pc = PARAM_LONG_NO_INC();                       \
	1590	CORRECT_ODD_PC("J_XX_8");                           \
	1591	COUNT_CYCLES(3);                                    \
	1592	}                                                       \
	1593	else                                                    \
	1594	{                                                       \
	1595	SKIP_LONG();                                         \
	1596	COUNT_CYCLES(4);                                    \
	1597	}                                                       \
	1598	}                                                           \
	1599	}
	1600
	1601	#define j_xx_0(TAKE)                                            \
	1602	{                                                               \
	1603	if (DSTREG(op))                                             \
	1604	{                                                           \
	1605	if (TAKE)                                               \
	1606	{                                                       \
	1607	m_pc += (PARAM_REL8(op) << 4);                           \
	1608	COUNT_CYCLES(2);                                    \
	1609	}                                                       \
	1610	else                                                    \
	1611	COUNT_CYCLES(1);                                    \
	1612	}                                                           \
	1613	else                                                        \
	1614	{                                                           \
	1615	if (TAKE)                                               \
	1616	{                                                       \
	1617	m_pc += (PARAM_WORD_NO_INC()<<4)+0x10;                \
	1618	COUNT_CYCLES(3);                                    \
	1619	}                                                       \
	1620	else                                                    \
	1621	{                                                       \
	1622	SKIP_WORD();                                         \
	1623	COUNT_CYCLES(2);                                    \
	1624	}                                                       \
	1625	}                                                           \
	1626	}
	1627
	1628	#define j_xx_x(TAKE)                                            \
	1629	{                                                               \
	1630	if (TAKE)                                                   \
	1631	{                                                           \
	1632	m_pc += (PARAM_REL8(op) << 4);                               \
	1633	COUNT_CYCLES(2);                                        \
	1634	}                                                           \
	1635	else                                                        \
	1636	COUNT_CYCLES(1);                                        \
	1637	}
	1638
	1639	void tms340x0_device::j_UC_0(UINT16 op)
	1640	{
	1641	j_xx_0(1);
	1642	}
	1643	void tms340x0_device::j_UC_8(UINT16 op)
	1644	{
	1645	j_xx_8(1);
	1646	}
	1647	void tms340x0_device::j_UC_x(UINT16 op)
	1648	{
	1649	j_xx_x(1);
	1650	}
	1651	void tms340x0_device::j_P_0(UINT16 op)
	1652	{
	1653	j_xx_0(!N_FLAG() && !Z_FLAG());
	1654	}
	1655	void tms340x0_device::j_P_8(UINT16 op)
	1656	{
	1657	j_xx_8(!N_FLAG() && !Z_FLAG());
	1658	}
	1659	void tms340x0_device::j_P_x(UINT16 op)
	1660	{
	1661	j_xx_x(!N_FLAG() && !Z_FLAG());
	1662	}
	1663	void tms340x0_device::j_LS_0(UINT16 op)
	1664	{
	1665	j_xx_0(C_FLAG() || Z_FLAG());
	1666	}
	1667	void tms340x0_device::j_LS_8(UINT16 op)
	1668	{
	1669	j_xx_8(C_FLAG() || Z_FLAG());
	1670	}
	1671	void tms340x0_device::j_LS_x(UINT16 op)
	1672	{
	1673	j_xx_x(C_FLAG() || Z_FLAG());
	1674	}
	1675	void tms340x0_device::j_HI_0(UINT16 op)
	1676	{
	1677	j_xx_0(!C_FLAG() && !Z_FLAG());
	1678	}
	1679	void tms340x0_device::j_HI_8(UINT16 op)
	1680	{
	1681	j_xx_8(!C_FLAG() && !Z_FLAG());
	1682	}
	1683	void tms340x0_device::j_HI_x(UINT16 op)
	1684	{
	1685	j_xx_x(!C_FLAG() && !Z_FLAG());
	1686	}
	1687	void tms340x0_device::j_LT_0(UINT16 op)
	1688	{
	1689	j_xx_0((N_FLAG() && !V_FLAG()) || (!N_FLAG() && V_FLAG()));
	1690	}
	1691	void tms340x0_device::j_LT_8(UINT16 op)
	1692	{
	1693	j_xx_8((N_FLAG() && !V_FLAG()) || (!N_FLAG() && V_FLAG()));
	1694	}
	1695	void tms340x0_device::j_LT_x(UINT16 op)
	1696	{
	1697	j_xx_x((N_FLAG() && !V_FLAG()) || (!N_FLAG() && V_FLAG()));
	1698	}
	1699	void tms340x0_device::j_GE_0(UINT16 op)
	1700	{
	1701	j_xx_0((N_FLAG() && V_FLAG()) || (!N_FLAG() && !V_FLAG()));
	1702	}
	1703	void tms340x0_device::j_GE_8(UINT16 op)
	1704	{
	1705	j_xx_8((N_FLAG() && V_FLAG()) || (!N_FLAG() && !V_FLAG()));
	1706	}
	1707	void tms340x0_device::j_GE_x(UINT16 op)
	1708	{
	1709	j_xx_x((N_FLAG() && V_FLAG()) || (!N_FLAG() && !V_FLAG()));
	1710	}
	1711	void tms340x0_device::j_LE_0(UINT16 op)
	1712	{
	1713	j_xx_0((N_FLAG() && !V_FLAG()) || (!N_FLAG() && V_FLAG()) || Z_FLAG());
	1714	}
	1715	void tms340x0_device::j_LE_8(UINT16 op)
	1716	{
	1717	j_xx_8((N_FLAG() && !V_FLAG()) || (!N_FLAG() && V_FLAG()) || Z_FLAG());
	1718	}
	1719	void tms340x0_device::j_LE_x(UINT16 op)
	1720	{
	1721	j_xx_x((N_FLAG() && !V_FLAG()) || (!N_FLAG() && V_FLAG()) || Z_FLAG());
	1722	}
	1723	void tms340x0_device::j_GT_0(UINT16 op)
	1724	{
	1725	j_xx_0((N_FLAG() && V_FLAG() && !Z_FLAG()) || (!N_FLAG() && !V_FLAG() && !Z_FLAG()));
	1726	}
	1727	void tms340x0_device::j_GT_8(UINT16 op)
	1728	{
	1729	j_xx_8((N_FLAG() && V_FLAG() && !Z_FLAG()) || (!N_FLAG() && !V_FLAG() && !Z_FLAG()));
	1730	}
	1731	void tms340x0_device::j_GT_x(UINT16 op)
	1732	{
	1733	j_xx_x((N_FLAG() && V_FLAG() && !Z_FLAG()) || (!N_FLAG() && !V_FLAG() && !Z_FLAG()));
	1734	}
	1735	void tms340x0_device::j_C_0(UINT16 op)
	1736	{
	1737	j_xx_0(C_FLAG());
	1738	}
	1739	void tms340x0_device::j_C_8(UINT16 op)
	1740	{
	1741	j_xx_8(C_FLAG());
	1742	}
	1743	void tms340x0_device::j_C_x(UINT16 op)
	1744	{
	1745	j_xx_x(C_FLAG());
	1746	}
	1747	void tms340x0_device::j_NC_0(UINT16 op)
	1748	{
	1749	j_xx_0(!C_FLAG());
	1750	}
	1751	void tms340x0_device::j_NC_8(UINT16 op)
	1752	{
	1753	j_xx_8(!C_FLAG());
	1754	}
	1755	void tms340x0_device::j_NC_x(UINT16 op)
	1756	{
	1757	j_xx_x(!C_FLAG());
	1758	}
	1759	void tms340x0_device::j_EQ_0(UINT16 op)
	1760	{
	1761	j_xx_0(Z_FLAG());
	1762	}
	1763	void tms340x0_device::j_EQ_8(UINT16 op)
	1764	{
	1765	j_xx_8(Z_FLAG());
	1766	}
	1767	void tms340x0_device::j_EQ_x(UINT16 op)
	1768	{
	1769	j_xx_x(Z_FLAG());
	1770	}
	1771	void tms340x0_device::j_NE_0(UINT16 op)
	1772	{
	1773	j_xx_0(!Z_FLAG());
	1774	}
	1775	void tms340x0_device::j_NE_8(UINT16 op)
	1776	{
	1777	j_xx_8(!Z_FLAG());
	1778	}
	1779	void tms340x0_device::j_NE_x(UINT16 op)
	1780	{
	1781	j_xx_x(!Z_FLAG());
	1782	}
	1783	void tms340x0_device::j_V_0(UINT16 op)
	1784	{
	1785	j_xx_0(V_FLAG());
	1786	}
	1787	void tms340x0_device::j_V_8(UINT16 op)
	1788	{
	1789	j_xx_8(V_FLAG());
	1790	}
	1791	void tms340x0_device::j_V_x(UINT16 op)
	1792	{
	1793	j_xx_x(V_FLAG());
	1794	}
	1795	void tms340x0_device::j_NV_0(UINT16 op)
	1796	{
	1797	j_xx_0(!V_FLAG());
	1798	}
	1799	void tms340x0_device::j_NV_8(UINT16 op)
	1800	{
	1801	j_xx_8(!V_FLAG());
	1802	}
	1803	void tms340x0_device::j_NV_x(UINT16 op)
	1804	{
	1805	j_xx_x(!V_FLAG());
	1806	}
	1807	void tms340x0_device::j_N_0(UINT16 op)
	1808	{
	1809	j_xx_0(N_FLAG());
	1810	}
	1811	void tms340x0_device::j_N_8(UINT16 op)
	1812	{
	1813	j_xx_8(N_FLAG());
	1814	}
	1815	void tms340x0_device::j_N_x(UINT16 op)
	1816	{
	1817	j_xx_x(N_FLAG());
	1818	}
	1819	void tms340x0_device::j_NN_0(UINT16 op)
	1820	{
	1821	j_xx_0(!N_FLAG());
	1822	}
	1823	void tms340x0_device::j_NN_8(UINT16 op)
	1824	{
	1825	j_xx_8(!N_FLAG());
	1826	}
	1827	void tms340x0_device::j_NN_x(UINT16 op)
	1828	{
	1829	j_xx_x(!N_FLAG());
	1830	}
	1831
	1832	#define JUMP(R)                                                 \
	1833	{                                                               \
	1834	m_pc = R##REG(DSTREG(op));                                       \
	1835	CORRECT_ODD_PC("JUMP");                                     \
	1836	COUNT_CYCLES(2);                                            \
	1837	}
	1838	void tms340x0_device::jump_a (UINT16 op) { JUMP(A); }
	1839	void tms340x0_device::jump_b (UINT16 op) { JUMP(B); }
	1840
	1841	void tms340x0_device::popst(UINT16 op)
	1842	{
	1843	SET_ST(POP());
	1844	COUNT_CYCLES(8);
	1845	}
	1846
	1847	void tms340x0_device::pushst(UINT16 op)
	1848	{
	1849	PUSH(m_st);
	1850	COUNT_CYCLES(2);
	1851	}
	1852
	1853	#define PUTST(R)                                                \
	1854	{                                                               \
	1855	SET_ST(R##REG(DSTREG(op)));                                \
	1856	COUNT_CYCLES(3);                                            \
	1857	}
	1858	void tms340x0_device::putst_a (UINT16 op) { PUTST(A); }
	1859	void tms340x0_device::putst_b (UINT16 op) { PUTST(B); }
	1860
	1861	void tms340x0_device::reti(UINT16 op)
	1862	{
	1863	INT32 st = POP();
	1864	m_pc = POP();
	1865	CORRECT_ODD_PC("RETI");
	1866	SET_ST(st);
	1867	COUNT_CYCLES(11);
	1868	}
	1869
	1870	void tms340x0_device::rets(UINT16 op)
	1871	{
	1872	UINT32 offs;
	1873	m_pc = POP();
	1874	CORRECT_ODD_PC("RETS");
	1875	offs = PARAM_N(op);
	1876	if (offs)
	1877	{
	1878	SP()+=(offs<<4);
	1879	}
	1880	COUNT_CYCLES(7);
	1881	}
	1882
	1883	#define REV(R)                                                  \
	1884	{                                                               \
	1885	R##REG(DSTREG(op)) = 0x0008;                                    \
	1886	COUNT_CYCLES(1);                                            \
	1887	}
	1888	void tms340x0_device::rev_a (UINT16 op) { REV(A); }
	1889	void tms340x0_device::rev_b (UINT16 op) { REV(B); }
	1890
	1891	void tms340x0_device::trap(UINT16 op)
	1892	{
	1893	UINT32 t = PARAM_N(op);
	1894	if (t)
	1895	{
	1896	PUSH(m_pc);
	1897	PUSH(m_st);
	1898	}
	1899	RESET_ST();
	1900	m_pc = RLONG(0xffffffe0-(t<<5));
	1901	CORRECT_ODD_PC("TRAP");
	1902	COUNT_CYCLES(16);
	1903	}
	1904
	1905
	1906
	1907	/***************************************************************************
	1908	34020 INSTRUCTIONS
	1909	***************************************************************************/
	1910
	1911	/************************************
	1912
	1913	New 34020 ops:
	1914
	1915	0000 1100 000R dddd = ADDXYI IL,Rd
	1916	iiii iiii iiii iiii
	1917	iiii iiii iiii iiii
	1918
	1919	0000 0000 1111 00SD = BLMOVE S,D
	1920
	1921	0000 0110 0000 0000 = CEXEC S,c,ID,L
	1922	cccc cccc S000 0000
	1923	iiic cccc cccc cccc
	1924
	1925	1101 1000 0ccc cccS = CEXEC S,c,ID
	1926	iiic cccc cccc cccc
	1927
	1928	0000 1000 1111 0010 = CLIP
	1929
	1930	0000 0110 011R dddd = CMOVCG Rd1,Rd2,S,c,ID
	1931	cccc cccc S00R dddd
	1932	iiic cccc cccc cccc
	1933
	1934	0000 0110 101R dddd = CMOVCM *Rd+,n,S,c,ID
	1935	cccc cccc S00n nnnn
	1936	iiic cccc cccc cccc
	1937
	1938	0000 0110 110R dddd = CMOVCM -*Rd,n,S,c,ID
	1939	cccc cccc S00n nnnn
	1940	iiic cccc cccc cccc
	1941
	1942	0000 0110 0110 0000 = CMOVCS c,ID
	1943	cccc cccc 0000 0001
	1944	iiic cccc cccc cccc
	1945
	1946	0000 0110 001R ssss = CMOVGC Rs,c,ID
	1947	cccc cccc 0000 0000
	1948	iiic cccc cccc cccc
	1949
	1950	0000 0110 010R ssss = CMOVGC Rs1,Rs2,S,c,ID
	1951	cccc cccc S00R ssss
	1952	iiic cccc cccc cccc
	1953
	1954	0000 0110 100n nnnn = CMOVMC *Rs+,n,S,c,ID
	1955	cccc cccc S00R ssss
	1956	iiic cccc cccc cccc
	1957
	1958	0000 1000 001n nnnn = CMOVMC -*Rs,n,S,c,ID
	1959	cccc cccc S00R ssss
	1960	iiic cccc cccc cccc
	1961
	1962	0000 0110 111R dddd = CMOVMC *Rs+,Rd,S,c,ID
	1963	cccc cccc S00R ssss
	1964	iiic cccc cccc cccc
	1965
	1966	0011 01kk kkkR dddd = CMPK k,Rd
	1967
	1968	0000 1010 100R dddd = CVDXYL Rd
	1969
	1970	0000 1010 011R dddd = CVMXYL Rd
	1971
	1972	1110 101s sssR dddd = CVSXYL Rs,Rd
	1973
	1974	0000 0010 101R dddd = EXGPS Rd
	1975
	1976	1101 1110 Z001 1010 = FLINE Z
	1977
	1978	0000 1010 1011 1011 = FPIXEQ
	1979
	1980	0000 1010 1101 1011 = FPIXNE
	1981
	1982	0000 0010 110R dddd = GETPS Rd
	1983
	1984	0000 0000 0100 0000 = IDLE
	1985
	1986	0000 1100 0101 0111 = LINIT
	1987
	1988	0000 0000 1000 0000 = MWAIT
	1989
	1990	0000 1010 0011 0111 = PFILL XY
	1991
	1992	0000 1110 0001 0111 = PIXBLT L,M,L
	1993
	1994	0000 1000 0110 0000 = RETM
	1995
	1996	0111 101s sssR dddd = RMO Rs,Rd
	1997
	1998	0000 0010 100R dddd = RPIX Rd
	1999
	2000	0000 0010 0111 0011 = SETCDP
	2001
	2002	0000 0010 1111 1011 = SETCMP
	2003
	2004	0000 0010 0101 0001 = SETCSP
	2005
	2006	0111 111s sssR dddd = SWAPF *Rs,Rd,0
	2007
	2008	0000 1110 1111 1010 = TFILL XY
	2009
	2010	0000 1000 0000 1111 = TRAPL
	2011
	2012	0000 1000 0101 0111 = VBLT B,L
	2013
	2014	0000 1010 0101 0111 = VFILL L
	2015
	2016	0000 1010 0000 0000 = VLCOL
	2017
	2018	************************************/
	2019
	2020
	2021	#define ADD_XYI(R)                              \
	2022	{                                               \
	2023	UINT32 a = PARAM_LONG();                 \
	2024	XY *b = &R##REG_XY(DSTREG(op));                 \
	2025	CLR_NCZV();                                  \
	2026	b->x += (INT16)(a & 0xffff);                \
	2027	b->y += ((INT32)a >> 16);                   \
	2028	SET_N_LOG(b->x == 0);                      \
	2029	SET_C_BIT_LO(b->y, 15);                        \
	2030	SET_Z_LOG(b->y == 0);                      \
	2031	SET_V_BIT_LO(b->x, 15);                        \
	2032	COUNT_CYCLES(1);                            \
	2033	}
	2034	void tms340x0_device::addxyi_a(UINT16 op)
	2035	{
	2036	if (!m_is_34020) { unimpl(op); return; }
	2037	ADD_XYI(A);
	2038	}
	2039	void tms340x0_device::addxyi_b(UINT16 op)
	2040	{
	2041	if (!m_is_34020) { unimpl(op); return; }
	2042	ADD_XYI(B);
	2043	}
	2044
	2045	void tms340x0_device::blmove(UINT16 op)
	2046	{
	2047	offs_t src = BREG(0);
	2048	offs_t dst = BREG(2);
	2049	offs_t bits = BREG(7);
	2050
	2051	if (!m_is_34020) { unimpl(op); return; }
	2052
	2053	/* src and dst are aligned */
	2054	if (!(src & 0x0f) && !(dst & 0x0f))
	2055	{
	2056	while (bits >= 16 && m_icount > 0)
	2057	{
	2058	TMS34010_WRMEM_WORD(TOBYTE(dst), TMS34010_RDMEM_WORD(TOBYTE(src)));
	2059	src += 0x10;
	2060	dst += 0x10;
	2061	bits -= 0x10;
	2062	m_icount -= 2;
	2063	}
	2064	if (bits != 0 && m_icount > 0)
	2065	{
	2066	(this->*s_wfield_functions[bits])(dst, (this->*s_rfield_functions[bits])(src));
	2067	dst += bits;
	2068	src += bits;
	2069	bits = 0;
	2070	m_icount -= 2;
	2071	}
	2072	}
	2073
	2074	/* src is aligned, dst is not */
	2075	else if (!(src & 0x0f))
	2076	{
	2077	logerror("020:BLMOVE with aligned src and unaligned dst\n");
	2078	}
	2079
	2080	/* dst is aligned, src is not */
	2081	else if (!(dst & 0x0f))
	2082	{
	2083	logerror("020:BLMOVE with unaligned src and aligned dst\n");
	2084	}
	2085
	2086	/* neither are aligned */
	2087	else
	2088	{
	2089	logerror("020:BLMOVE with completely unaligned src and dst\n");
	2090	}
	2091
	2092	/* update the final results */
	2093	BREG(0) = src;
	2094	BREG(2) = dst;
	2095	BREG(7) = bits;
	2096
	2097	/* if we're not done yet, back up the PC */
	2098	if (bits != 0)
	2099	m_pc -= 0x10;
	2100	}
	2101
	2102	void tms340x0_device::cexec_l(UINT16 op)
	2103	{
	2104	if (!m_is_34020) { unimpl(op); return; }
	2105	logerror("020:cexec_l\n");
	2106	}
	2107
	2108	void tms340x0_device::cexec_s(UINT16 op)
	2109	{
	2110	if (!m_is_34020) { unimpl(op); return; }
	2111	logerror("020:cexec_s\n");
	2112	}
	2113
	2114	void tms340x0_device::clip(UINT16 op)
	2115	{
	2116	if (!m_is_34020) { unimpl(op); return; }
	2117	logerror("020:clip\n");
	2118	}
	2119
	2120	void tms340x0_device::cmovcg_a(UINT16 op)
	2121	{
	2122	if (!m_is_34020) { unimpl(op); return; }
	2123	logerror("020:cmovcg_a\n");
	2124	}
	2125
	2126	void tms340x0_device::cmovcg_b(UINT16 op)
	2127	{
	2128	if (!m_is_34020) { unimpl(op); return; }
	2129	logerror("020:cmovcg_b\n");
	2130	}
	2131
	2132	void tms340x0_device::cmovcm_f(UINT16 op)
	2133	{
	2134	if (!m_is_34020) { unimpl(op); return; }
	2135	logerror("020:cmovcm_f\n");
	2136	}
	2137
	2138	void tms340x0_device::cmovcm_b(UINT16 op)
	2139	{
	2140	if (!m_is_34020) { unimpl(op); return; }
	2141	logerror("020:cmovcm_b\n");
	2142	}
	2143
	2144	void tms340x0_device::cmovgc_a(UINT16 op)
	2145	{
	2146	if (!m_is_34020) { unimpl(op); return; }
	2147	logerror("020:cmovgc_a\n");
	2148	}
	2149
	2150	void tms340x0_device::cmovgc_b(UINT16 op)
	2151	{
	2152	if (!m_is_34020) { unimpl(op); return; }
	2153	logerror("020:cmovgc_b\n");
	2154	}
	2155
	2156	void tms340x0_device::cmovgc_a_s(UINT16 op)
	2157	{
	2158	if (!m_is_34020) { unimpl(op); return; }
	2159	logerror("020:cmovgc_a_s\n");
	2160	}
	2161
	2162	void tms340x0_device::cmovgc_b_s(UINT16 op)
	2163	{
	2164	if (!m_is_34020) { unimpl(op); return; }
	2165	logerror("020:cmovgc_b_s\n");
	2166	}
	2167
	2168	void tms340x0_device::cmovmc_f(UINT16 op)
	2169	{
	2170	if (!m_is_34020) { unimpl(op); return; }
	2171	logerror("020:cmovmc_f\n");
	2172	}
	2173
	2174	void tms340x0_device::cmovmc_f_va(UINT16 op)
	2175	{
	2176	if (!m_is_34020) { unimpl(op); return; }
	2177	logerror("020:cmovmc_f_va\n");
	2178	}
	2179
	2180	void tms340x0_device::cmovmc_f_vb(UINT16 op)
	2181	{
	2182	if (!m_is_34020) { unimpl(op); return; }
	2183	logerror("020:cmovmc_f_vb\n");
	2184	}
	2185
	2186	void tms340x0_device::cmovmc_b(UINT16 op)
	2187	{
	2188	if (!m_is_34020) { unimpl(op); return; }
	2189	logerror("020:cmovmc_b\n");
	2190	}
	2191
	2192	#define CMPK(R)                                             \
	2193	{                                                           \
	2194	INT32 r;                                                \
	2195	INT32 *rd = &R##REG(DSTREG(op));                            \
	2196	INT32 t = PARAM_K(op); if (!t) t = 32;                      \
	2197	CLR_NCZV();                                              \
	2198	r = *rd - t;                                            \
	2199	SET_NZCV_SUB(*rd,t,r);                                  \
	2200	COUNT_CYCLES(1);                                        \
	2201	}
	2202	void tms340x0_device::cmp_k_a(UINT16 op)
	2203	{
	2204	if (!m_is_34020) { unimpl(op); return; }
	2205	CMPK(A);
	2206	}
	2207	void tms340x0_device::cmp_k_b(UINT16 op)
	2208	{
	2209	if (!m_is_34020) { unimpl(op); return; }
	2210	CMPK(B);
	2211	}
	2212
	2213	void tms340x0_device::cvdxyl_a(UINT16 op)
	2214	{
	2215	if (!m_is_34020) { unimpl(op); return; }
	2216	logerror("020:cvdxyl_a\n");
	2217	}
	2218
	2219	void tms340x0_device::cvdxyl_b(UINT16 op)
	2220	{
	2221	if (!m_is_34020) { unimpl(op); return; }
	2222	logerror("020:cvdxyl_b\n");
	2223	}
	2224
	2225	void tms340x0_device::cvmxyl_a(UINT16 op)
	2226	{
	2227	if (!m_is_34020) { unimpl(op); return; }
	2228	logerror("020:cvmxyl_a\n");
	2229	}
	2230
	2231	void tms340x0_device::cvmxyl_b(UINT16 op)
	2232	{
	2233	if (!m_is_34020) { unimpl(op); return; }
	2234	logerror("020:cvmxyl_b\n");
	2235	}
	2236
	2237	void tms340x0_device::cvsxyl_a(UINT16 op)
	2238	{
	2239	if (!m_is_34020) { unimpl(op); return; }
	2240	logerror("020:cvsxyl_a\n");
	2241	}
	2242
	2243	void tms340x0_device::cvsxyl_b(UINT16 op)
	2244	{
	2245	if (!m_is_34020) { unimpl(op); return; }
	2246	logerror("020:cvsxyl_b\n");
	2247	}
	2248
	2249	void tms340x0_device::exgps_a(UINT16 op)
	2250	{
	2251	if (!m_is_34020) { unimpl(op); return; }
	2252	logerror("020:exgps_a\n");
	2253	}
	2254
	2255	void tms340x0_device::exgps_b(UINT16 op)
	2256	{
	2257	if (!m_is_34020) { unimpl(op); return; }
	2258	logerror("020:exgps_b\n");
	2259	}
	2260
	2261	void tms340x0_device::fline(UINT16 op)
	2262	{
	2263	if (!m_is_34020) { unimpl(op); return; }
	2264	logerror("020:fline\n");
	2265	}
	2266
	2267	void tms340x0_device::fpixeq(UINT16 op)
	2268	{
	2269	if (!m_is_34020) { unimpl(op); return; }
	2270	logerror("020:fpixeq\n");
	2271	}
	2272
	2273	void tms340x0_device::fpixne(UINT16 op)
	2274	{
	2275	if (!m_is_34020) { unimpl(op); return; }
	2276	logerror("020:fpixne\n");
	2277	}
	2278
	2279	void tms340x0_device::getps_a(UINT16 op)
	2280	{
	2281	if (!m_is_34020) { unimpl(op); return; }
	2282	logerror("020:getps_a\n");
	2283	}
	2284
	2285	void tms340x0_device::getps_b(UINT16 op)
	2286	{
	2287	if (!m_is_34020) { unimpl(op); return; }
	2288	logerror("020:getps_b\n");
	2289	}
	2290
	2291	void tms340x0_device::idle(UINT16 op)
	2292	{
	2293	if (!m_is_34020) { unimpl(op); return; }
	2294	logerror("020:idle\n");
	2295	}
	2296
	2297	void tms340x0_device::linit(UINT16 op)
	2298	{
	2299	if (!m_is_34020) { unimpl(op); return; }
	2300	logerror("020:linit\n");
	2301	}
	2302
	2303	void tms340x0_device::mwait(UINT16 op)
	2304	{
	2305	if (!m_is_34020) { unimpl(op); return; }
	2306	}
	2307
	2308	void tms340x0_device::pfill_xy(UINT16 op)
	2309	{
	2310	if (!m_is_34020) { unimpl(op); return; }
	2311	logerror("020:pfill_xy\n");
	2312	}
	2313
	2314	void tms340x0_device::pixblt_l_m_l(UINT16 op)
	2315	{
	2316	if (!m_is_34020) { unimpl(op); return; }
	2317	logerror("020:pixblt_l_m_l\n");
	2318	}
	2319
	2320	void tms340x0_device::retm(UINT16 op)
	2321	{
	2322	if (!m_is_34020) { unimpl(op); return; }
	2323	logerror("020:retm\n");
	2324	}
	2325
	2326	#define RMO(R)                                                  \
	2327	{                                                               \
	2328	UINT32 res = 0;                                             \
	2329	UINT32 rs  = R##REG(SRCREG(op));                                \
	2330	INT32 *rd = &R##REG(DSTREG(op));                                \
	2331	CLR_Z();                                                     \
	2332	SET_Z_VAL(rs);                                             \
	2333	if (rs)                                                     \
	2334	{                                                           \
	2335	while (!(rs & 0x00000001))                              \
	2336	{                                                       \
	2337	res++;                                              \
	2338	rs >>= 1;                                           \
	2339	}                                                       \
	2340	}                                                           \
	2341	*rd = res;                                                  \
	2342	COUNT_CYCLES(1);                                            \
	2343	}
	2344
	2345	void tms340x0_device::rmo_a(UINT16 op) { RMO(A); }
	2346	void tms340x0_device::rmo_b(UINT16 op) { RMO(B); }
	2347
	2348	#define RPIX(R)                                 \
	2349	{                                               \
	2350	UINT32 v = R##REG(DSTREG(op));                  \
	2351	switch (m_pixelshift)                    \
	2352	{                                           \
	2353	case 0:                                 \
	2354	v = (v & 1) ? 0xffffffff : 0x00000000;\
	2355	COUNT_CYCLES(8);                    \
	2356	break;                              \
	2357	case 1:                                 \
	2358	v &= 3;                             \
	2359	v |= v << 2;                        \
	2360	v |= v << 4;                        \
	2361	v |= v << 8;                        \
	2362	v |= v << 16;                       \
	2363	COUNT_CYCLES(7);                    \
	2364	break;                              \
	2365	case 2:                                 \
	2366	v &= 0x0f;                          \
	2367	v |= v << 4;                        \
	2368	v |= v << 8;                        \
	2369	v |= v << 16;                       \
	2370	COUNT_CYCLES(6);                    \
	2371	break;                              \
	2372	case 3:                                 \
	2373	v &= 0xff;                          \
	2374	v |= v << 8;                        \
	2375	v |= v << 16;                       \
	2376	COUNT_CYCLES(5);                    \
	2377	break;                              \
	2378	case 4:                                 \
	2379	v &= 0xffff;                        \
	2380	v |= v << 16;                       \
	2381	COUNT_CYCLES(4);                    \
	2382	break;                              \
	2383	case 5:                                 \
	2384	COUNT_CYCLES(2);                    \
	2385	break;                              \
	2386	}                                           \
	2387	R##REG(DSTREG(op)) = v;                         \
	2388	}
	2389
	2390	void tms340x0_device::rpix_a(UINT16 op)
	2391	{
	2392	if (!m_is_34020) { unimpl(op); return; }
	2393	RPIX(A);
	2394	}
	2395
	2396	void tms340x0_device::rpix_b(UINT16 op)
	2397	{
	2398	if (!m_is_34020) { unimpl(op); return; }
	2399	RPIX(B);
	2400	}
	2401
	2402	void tms340x0_device::setcdp(UINT16 op)
	2403	{
	2404	if (!m_is_34020) { unimpl(op); return; }
	2405	logerror("020:setcdp\n");
	2406	}
	2407
	2408	void tms340x0_device::setcmp(UINT16 op)
	2409	{
	2410	if (!m_is_34020) { unimpl(op); return; }
	2411	logerror("020:setcmp\n");
	2412	}
	2413
	2414	void tms340x0_device::setcsp(UINT16 op)
	2415	{
	2416	if (!m_is_34020) { unimpl(op); return; }
	2417	logerror("020:setcsp\n");
	2418	}
	2419
	2420	void tms340x0_device::swapf_a(UINT16 op)
	2421	{
	2422	if (!m_is_34020) { unimpl(op); return; }
	2423	logerror("020:swapf_a\n");
	2424	}
	2425
	2426	void tms340x0_device::swapf_b(UINT16 op)
	2427	{
	2428	if (!m_is_34020) { unimpl(op); return; }
	2429	logerror("020:swapf_b\n");
	2430	}
	2431
	2432	void tms340x0_device::tfill_xy(UINT16 op)
	2433	{
	2434	if (!m_is_34020) { unimpl(op); return; }
	2435	logerror("020:tfill_xy\n");
	2436	}
	2437
	2438	void tms340x0_device::trapl(UINT16 op)
	2439	{
	2440	if (!m_is_34020) { unimpl(op); return; }
	2441	logerror("020:trapl\n");
	2442	}
	2443
	2444	void tms340x0_device::vblt_b_l(UINT16 op)
	2445	{
	2446	if (!m_is_34020) { unimpl(op); return; }
	2447	logerror("020:vblt_b_l\n");
	2448	}
	2449
	2450	void tms340x0_device::vfill_l(UINT16 op)
	2451	{
	2452	if (!m_is_34020) { unimpl(op); return; }
	2453	logerror("020:vfill_l\n");
	2454	}
	2455
	2456	void tms340x0_device::vlcol(UINT16 op)
	2457	{
	2458	if (!m_is_34020) { unimpl(op); return; }
	2459	logerror("020:vlcol\n");
	2460	}

trunk/src/devices/cpu/tms34010/34010tbl.cpp

r250251	r250252
1		// license:BSD-3-Clause
2		// copyright-holders:Alex Pasadyn,Zsolt Vasvari
3		/*** TMS34010: Portable TMS34010 emulator ***********************************
4
5		Copyright Alex Pasadyn/Zsolt Vasvari
6
7		Opcode Table
8
9		*****************************************************************************/
10
11		/* Opcode Table */
12		const tms340x0_device::opcode_func tms340x0_device::s_opcode_table[65536 >> 4] =
13		{
14		/* 0x0000 0x0010 0x0020 0x0030 ... 0x00f0 */
15		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::rev_a,      &tms340x0_device::rev_b,      &tms340x0_device::idle,       &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
16		&tms340x0_device::mwait,      &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::blmove,
17		/* 0x0100 */
18		&tms340x0_device::emu,        &tms340x0_device::unimpl,     &tms340x0_device::exgpc_a,    &tms340x0_device::exgpc_b,    &tms340x0_device::getpc_a,    &tms340x0_device::getpc_b,    &tms340x0_device::jump_a,     &tms340x0_device::jump_b,
19		&tms340x0_device::getst_a,    &tms340x0_device::getst_b,    &tms340x0_device::putst_a,    &tms340x0_device::putst_b,    &tms340x0_device::popst,      &tms340x0_device::unimpl,     &tms340x0_device::pushst,     &tms340x0_device::unimpl,
20		/* 0x0200 */
21		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::setcsp,     &tms340x0_device::unimpl,     &tms340x0_device::setcdp,
22		&tms340x0_device::rpix_a,     &tms340x0_device::rpix_b,     &tms340x0_device::exgps_a,    &tms340x0_device::exgps_b,    &tms340x0_device::getps_a,    &tms340x0_device::getps_b,    &tms340x0_device::unimpl,     &tms340x0_device::setcmp,
23		/* 0x0300 */
24		&tms340x0_device::nop,        &tms340x0_device::unimpl,     &tms340x0_device::clrc,       &tms340x0_device::unimpl,     &tms340x0_device::movb_aa,    &tms340x0_device::unimpl,     &tms340x0_device::dint,       &tms340x0_device::unimpl,
25		&tms340x0_device::abs_a,      &tms340x0_device::abs_b,      &tms340x0_device::neg_a,      &tms340x0_device::neg_b,      &tms340x0_device::negb_a,     &tms340x0_device::negb_b,     &tms340x0_device::not_a,      &tms340x0_device::not_b,
26		/* 0x0400 */
27		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
28		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
29		/* 0x0500 */
30		&tms340x0_device::sext0_a,    &tms340x0_device::sext0_b,    &tms340x0_device::zext0_a,    &tms340x0_device::zext0_b,    &tms340x0_device::setf0,      &tms340x0_device::setf0,      &tms340x0_device::setf0,      &tms340x0_device::setf0,
31		&tms340x0_device::move0_ra_a, &tms340x0_device::move0_ra_b, &tms340x0_device::move0_ar_a, &tms340x0_device::move0_ar_b, &tms340x0_device::move0_aa,   &tms340x0_device::unimpl,     &tms340x0_device::movb_ra_a,  &tms340x0_device::movb_ra_b,
32		/* 0x0600 */
33		&tms340x0_device::cexec_l,    &tms340x0_device::unimpl,     &tms340x0_device::cmovgc_a,   &tms340x0_device::cmovgc_b,   &tms340x0_device::cmovgc_a_s, &tms340x0_device::cmovgc_b_s, &tms340x0_device::cmovcg_a,   &tms340x0_device::cmovcg_b,
34		&tms340x0_device::cmovmc_f,   &tms340x0_device::cmovmc_f,   &tms340x0_device::cmovcm_f,   &tms340x0_device::cmovcm_f,   &tms340x0_device::cmovcm_b,   &tms340x0_device::cmovcm_b,   &tms340x0_device::cmovmc_f_va,&tms340x0_device::cmovmc_f_vb,
35		/* 0x0700 */
36		&tms340x0_device::sext1_a,    &tms340x0_device::sext1_b,    &tms340x0_device::zext1_a,    &tms340x0_device::zext1_b,    &tms340x0_device::setf1,      &tms340x0_device::setf1,      &tms340x0_device::setf1,      &tms340x0_device::setf1,
37		&tms340x0_device::move1_ra_a, &tms340x0_device::move1_ra_b, &tms340x0_device::move1_ar_a, &tms340x0_device::move1_ar_b, &tms340x0_device::move1_aa,   &tms340x0_device::unimpl,     &tms340x0_device::movb_ar_a,  &tms340x0_device::movb_ar_b,
38		/* 0x0800 */
39		&tms340x0_device::trapl,      &tms340x0_device::unimpl,     &tms340x0_device::cmovmc_b,   &tms340x0_device::cmovmc_b,   &tms340x0_device::unimpl,     &tms340x0_device::vblt_b_l,   &tms340x0_device::retm,       &tms340x0_device::unimpl,
40		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::clip,
41		/* 0x0900 */
42		&tms340x0_device::trap,       &tms340x0_device::trap,       &tms340x0_device::call_a,     &tms340x0_device::call_b,     &tms340x0_device::reti,       &tms340x0_device::unimpl,     &tms340x0_device::rets,       &tms340x0_device::rets,
43		&tms340x0_device::mmtm_a,     &tms340x0_device::mmtm_b,     &tms340x0_device::mmfm_a,     &tms340x0_device::mmfm_b,     &tms340x0_device::movi_w_a,   &tms340x0_device::movi_w_b,   &tms340x0_device::movi_l_a,   &tms340x0_device::movi_l_b,
44		/* 0x0a00 */
45		&tms340x0_device::vlcol,      &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::pfill_xy,   &tms340x0_device::unimpl,     &tms340x0_device::vfill_l,    &tms340x0_device::cvmxyl_a,   &tms340x0_device::cvmxyl_b,
46		&tms340x0_device::cvdxyl_a,   &tms340x0_device::cvdxyl_b,   &tms340x0_device::unimpl,     &tms340x0_device::fpixeq,     &tms340x0_device::unimpl,     &tms340x0_device::fpixne,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
47		/* 0x0b00 */
48		&tms340x0_device::addi_w_a,   &tms340x0_device::addi_w_b,   &tms340x0_device::addi_l_a,   &tms340x0_device::addi_l_b,   &tms340x0_device::cmpi_w_a,   &tms340x0_device::cmpi_w_b,   &tms340x0_device::cmpi_l_a,   &tms340x0_device::cmpi_l_b,
49		&tms340x0_device::andi_a,     &tms340x0_device::andi_b,     &tms340x0_device::ori_a,      &tms340x0_device::ori_b,      &tms340x0_device::xori_a,     &tms340x0_device::xori_b,     &tms340x0_device::subi_w_a,   &tms340x0_device::subi_w_b,
50		/* 0x0c00 */
51		&tms340x0_device::addxyi_a,   &tms340x0_device::addxyi_b,   &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::linit,      &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
52		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
53		/* 0x0d00 */
54		&tms340x0_device::subi_l_a,   &tms340x0_device::subi_l_b,   &tms340x0_device::unimpl,     &tms340x0_device::callr,      &tms340x0_device::unimpl,     &tms340x0_device::calla,      &tms340x0_device::eint,       &tms340x0_device::unimpl,
55		&tms340x0_device::dsj_a,      &tms340x0_device::dsj_b,      &tms340x0_device::dsjeq_a,    &tms340x0_device::dsjeq_b,    &tms340x0_device::dsjne_a,    &tms340x0_device::dsjne_b,    &tms340x0_device::setc,       &tms340x0_device::unimpl,
56		/* 0x0e00 */
57		&tms340x0_device::unimpl,     &tms340x0_device::pixblt_l_m_l,&tms340x0_device::unimpl,    &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
58		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::tfill_xy,
59		/* 0x0f00 */
60		&tms340x0_device::pixblt_l_l, &tms340x0_device::unimpl,     &tms340x0_device::pixblt_l_xy,&tms340x0_device::unimpl,     &tms340x0_device::pixblt_xy_l,&tms340x0_device::unimpl,     &tms340x0_device::pixblt_xy_xy,&tms340x0_device::unimpl,
61		&tms340x0_device::pixblt_b_l, &tms340x0_device::unimpl,     &tms340x0_device::pixblt_b_xy,&tms340x0_device::unimpl,     &tms340x0_device::fill_l,     &tms340x0_device::unimpl,     &tms340x0_device::fill_xy,    &tms340x0_device::unimpl,
62		/* 0x1000 */
63		&tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,
64		&tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,
65		/* 0x1100 */
66		&tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,
67		&tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,
68		/* 0x1200 */
69		&tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,
70		&tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,
71		/* 0x1300 */
72		&tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,
73		&tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,
74		/* 0x1400 */
75		&tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,
76		&tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,
77		/* 0x1500 */
78		&tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,
79		&tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,
80		/* 0x1600 */
81		&tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,
82		&tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,
83		/* 0x1700 */
84		&tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,
85		&tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,
86		/* 0x1800 */
87		&tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,
88		&tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,
89		/* 0x1900 */
90		&tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,
91		&tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,
92		/* 0x1a00 */
93		&tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,
94		&tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,
95		/* 0x1b00 */
96		&tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,
97		&tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,
98		/* 0x1c00 */
99		&tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,
100		&tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,
101		/* 0x1d00 */
102		&tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,
103		&tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,
104		/* 0x1e00 */
105		&tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,
106		&tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,
107		/* 0x1f00 */
108		&tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,
109		&tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,
110		/* 0x2000 */
111		&tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,
112		&tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,
113		/* 0x2100 */
114		&tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,
115		&tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,
116		/* 0x2200 */
117		&tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,
118		&tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,
119		/* 0x2300 */
120		&tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,
121		&tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,
122		/* 0x2400 */
123		&tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,
124		&tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,
125		/* 0x2500 */
126		&tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,
127		&tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,
128		/* 0x2600 */
129		&tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,
130		&tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,
131		/* 0x2700 */
132		&tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,
133		&tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,
134		/* 0x2800 */
135		&tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,
136		&tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,
137		/* 0x2900 */
138		&tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,
139		&tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,
140		/* 0x2a00 */
141		&tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,
142		&tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,
143		/* 0x2b00 */
144		&tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,
145		&tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,
146		/* 0x2c00 */
147		&tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,
148		&tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,
149		/* 0x2d00 */
150		&tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,
151		&tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,
152		/* 0x2e00 */
153		&tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,
154		&tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,
155		/* 0x2f00 */
156		&tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,
157		&tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,
158		/* 0x3000 */
159		&tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,
160		&tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,
161		/* 0x3100 */
162		&tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,
163		&tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,
164		/* 0x3200 */
165		&tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,
166		&tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,
167		/* 0x3300 */
168		&tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,
169		&tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,
170		/* 0x3400 */
171		&tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,
172		&tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,
173		/* 0x3500 */
174		&tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,
175		&tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,
176		/* 0x3600 */
177		&tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,
178		&tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,
179		/* 0x3700 */
180		&tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,
181		&tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,
182		/* 0x3800 */
183		&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
184		&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
185		/* 0x3900 */
186		&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
187		&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
188		/* 0x3a00 */
189		&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
190		&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
191		/* 0x3b00 */
192		&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
193		&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
194		/* 0x3c00 */
195		&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
196		&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
197		/* 0x3d00 */
198		&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
199		&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
200		/* 0x3e00 */
201		&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
202		&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
203		/* 0x3f00 */
204		&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
205		&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
206		/* 0x4000 */
207		&tms340x0_device::add_a,      &tms340x0_device::add_b,      &tms340x0_device::add_a,      &tms340x0_device::add_b,      &tms340x0_device::add_a,      &tms340x0_device::add_b,      &tms340x0_device::add_a,      &tms340x0_device::add_b,
208		&tms340x0_device::add_a,      &tms340x0_device::add_b,      &tms340x0_device::add_a,      &tms340x0_device::add_b,      &tms340x0_device::add_a,      &tms340x0_device::add_b,      &tms340x0_device::add_a,      &tms340x0_device::add_b,
209		/* 0x4100 */
210		&tms340x0_device::add_a,      &tms340x0_device::add_b,      &tms340x0_device::add_a,      &tms340x0_device::add_b,      &tms340x0_device::add_a,      &tms340x0_device::add_b,      &tms340x0_device::add_a,      &tms340x0_device::add_b,
211		&tms340x0_device::add_a,      &tms340x0_device::add_b,      &tms340x0_device::add_a,      &tms340x0_device::add_b,      &tms340x0_device::add_a,      &tms340x0_device::add_b,      &tms340x0_device::add_a,      &tms340x0_device::add_b,
212		/* 0x4200 */
213		&tms340x0_device::addc_a,     &tms340x0_device::addc_b,     &tms340x0_device::addc_a,     &tms340x0_device::addc_b,     &tms340x0_device::addc_a,     &tms340x0_device::addc_b,     &tms340x0_device::addc_a,     &tms340x0_device::addc_b,
214		&tms340x0_device::addc_a,     &tms340x0_device::addc_b,     &tms340x0_device::addc_a,     &tms340x0_device::addc_b,     &tms340x0_device::addc_a,     &tms340x0_device::addc_b,     &tms340x0_device::addc_a,     &tms340x0_device::addc_b,
215		/* 0x4300 */
216		&tms340x0_device::addc_a,     &tms340x0_device::addc_b,     &tms340x0_device::addc_a,     &tms340x0_device::addc_b,     &tms340x0_device::addc_a,     &tms340x0_device::addc_b,     &tms340x0_device::addc_a,     &tms340x0_device::addc_b,
217		&tms340x0_device::addc_a,     &tms340x0_device::addc_b,     &tms340x0_device::addc_a,     &tms340x0_device::addc_b,     &tms340x0_device::addc_a,     &tms340x0_device::addc_b,     &tms340x0_device::addc_a,     &tms340x0_device::addc_b,
218		/* 0x4400 */
219		&tms340x0_device::sub_a,      &tms340x0_device::sub_b,      &tms340x0_device::sub_a,      &tms340x0_device::sub_b,      &tms340x0_device::sub_a,      &tms340x0_device::sub_b,      &tms340x0_device::sub_a,      &tms340x0_device::sub_b,
220		&tms340x0_device::sub_a,      &tms340x0_device::sub_b,      &tms340x0_device::sub_a,      &tms340x0_device::sub_b,      &tms340x0_device::sub_a,      &tms340x0_device::sub_b,      &tms340x0_device::sub_a,      &tms340x0_device::sub_b,
221		/* 0x4500 */
222		&tms340x0_device::sub_a,      &tms340x0_device::sub_b,      &tms340x0_device::sub_a,      &tms340x0_device::sub_b,      &tms340x0_device::sub_a,      &tms340x0_device::sub_b,      &tms340x0_device::sub_a,      &tms340x0_device::sub_b,
223		&tms340x0_device::sub_a,      &tms340x0_device::sub_b,      &tms340x0_device::sub_a,      &tms340x0_device::sub_b,      &tms340x0_device::sub_a,      &tms340x0_device::sub_b,      &tms340x0_device::sub_a,      &tms340x0_device::sub_b,
224		/* 0x4600 */
225		&tms340x0_device::subb_a,     &tms340x0_device::subb_b,     &tms340x0_device::subb_a,     &tms340x0_device::subb_b,     &tms340x0_device::subb_a,     &tms340x0_device::subb_b,     &tms340x0_device::subb_a,     &tms340x0_device::subb_b,
226		&tms340x0_device::subb_a,     &tms340x0_device::subb_b,     &tms340x0_device::subb_a,     &tms340x0_device::subb_b,     &tms340x0_device::subb_a,     &tms340x0_device::subb_b,     &tms340x0_device::subb_a,     &tms340x0_device::subb_b,
227		/* 0x4700 */
228		&tms340x0_device::subb_a,     &tms340x0_device::subb_b,     &tms340x0_device::subb_a,     &tms340x0_device::subb_b,     &tms340x0_device::subb_a,     &tms340x0_device::subb_b,     &tms340x0_device::subb_a,     &tms340x0_device::subb_b,
229		&tms340x0_device::subb_a,     &tms340x0_device::subb_b,     &tms340x0_device::subb_a,     &tms340x0_device::subb_b,     &tms340x0_device::subb_a,     &tms340x0_device::subb_b,     &tms340x0_device::subb_a,     &tms340x0_device::subb_b,
230		/* 0x4800 */
231		&tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,      &tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,      &tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,      &tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,
232		&tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,      &tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,      &tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,      &tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,
233		/* 0x4900 */
234		&tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,      &tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,      &tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,      &tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,
235		&tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,      &tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,      &tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,      &tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,
236		/* 0x4a00 */
237		&tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,   &tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,   &tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,   &tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,
238		&tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,   &tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,   &tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,   &tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,
239		/* 0x4b00 */
240		&tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,   &tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,   &tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,   &tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,
241		&tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,   &tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,   &tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,   &tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,
242		/* 0x4c00 */
243		&tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,  &tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,  &tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,  &tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,
244		&tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,  &tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,  &tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,  &tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,
245		/* 0x4d00 */
246		&tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,  &tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,  &tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,  &tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,
247		&tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,  &tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,  &tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,  &tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,
248		/* 0x4e00 */
249		&tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx,
250		&tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx,
251		/* 0x4f00 */
252		&tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx,
253		&tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx,
254		/* 0x5000 */
255		&tms340x0_device::and_a,      &tms340x0_device::and_b,      &tms340x0_device::and_a,      &tms340x0_device::and_b,      &tms340x0_device::and_a,      &tms340x0_device::and_b,      &tms340x0_device::and_a,      &tms340x0_device::and_b,
256		&tms340x0_device::and_a,      &tms340x0_device::and_b,      &tms340x0_device::and_a,      &tms340x0_device::and_b,      &tms340x0_device::and_a,      &tms340x0_device::and_b,      &tms340x0_device::and_a,      &tms340x0_device::and_b,
257		/* 0x5100 */
258		&tms340x0_device::and_a,      &tms340x0_device::and_b,      &tms340x0_device::and_a,      &tms340x0_device::and_b,      &tms340x0_device::and_a,      &tms340x0_device::and_b,      &tms340x0_device::and_a,      &tms340x0_device::and_b,
259		&tms340x0_device::and_a,      &tms340x0_device::and_b,      &tms340x0_device::and_a,      &tms340x0_device::and_b,      &tms340x0_device::and_a,      &tms340x0_device::and_b,      &tms340x0_device::and_a,      &tms340x0_device::and_b,
260		/* 0x5200 */
261		&tms340x0_device::andn_a,     &tms340x0_device::andn_b,     &tms340x0_device::andn_a,     &tms340x0_device::andn_b,     &tms340x0_device::andn_a,     &tms340x0_device::andn_b,     &tms340x0_device::andn_a,     &tms340x0_device::andn_b,
262		&tms340x0_device::andn_a,     &tms340x0_device::andn_b,     &tms340x0_device::andn_a,     &tms340x0_device::andn_b,     &tms340x0_device::andn_a,     &tms340x0_device::andn_b,     &tms340x0_device::andn_a,     &tms340x0_device::andn_b,
263		/* 0x5300 */
264		&tms340x0_device::andn_a,     &tms340x0_device::andn_b,     &tms340x0_device::andn_a,     &tms340x0_device::andn_b,     &tms340x0_device::andn_a,     &tms340x0_device::andn_b,     &tms340x0_device::andn_a,     &tms340x0_device::andn_b,
265		&tms340x0_device::andn_a,     &tms340x0_device::andn_b,     &tms340x0_device::andn_a,     &tms340x0_device::andn_b,     &tms340x0_device::andn_a,     &tms340x0_device::andn_b,     &tms340x0_device::andn_a,     &tms340x0_device::andn_b,
266		/* 0x5400 */
267		&tms340x0_device::or_a,       &tms340x0_device::or_b,       &tms340x0_device::or_a,       &tms340x0_device::or_b,       &tms340x0_device::or_a,       &tms340x0_device::or_b,       &tms340x0_device::or_a,       &tms340x0_device::or_b,
268		&tms340x0_device::or_a,       &tms340x0_device::or_b,       &tms340x0_device::or_a,       &tms340x0_device::or_b,       &tms340x0_device::or_a,       &tms340x0_device::or_b,       &tms340x0_device::or_a,       &tms340x0_device::or_b,
269		/* 0x5500 */
270		&tms340x0_device::or_a,       &tms340x0_device::or_b,       &tms340x0_device::or_a,       &tms340x0_device::or_b,       &tms340x0_device::or_a,       &tms340x0_device::or_b,       &tms340x0_device::or_a,       &tms340x0_device::or_b,
271		&tms340x0_device::or_a,       &tms340x0_device::or_b,       &tms340x0_device::or_a,       &tms340x0_device::or_b,       &tms340x0_device::or_a,       &tms340x0_device::or_b,       &tms340x0_device::or_a,       &tms340x0_device::or_b,
272		/* 0x5600 */
273		&tms340x0_device::xor_a,      &tms340x0_device::xor_b,      &tms340x0_device::xor_a,      &tms340x0_device::xor_b,      &tms340x0_device::xor_a,      &tms340x0_device::xor_b,      &tms340x0_device::xor_a,      &tms340x0_device::xor_b,
274		&tms340x0_device::xor_a,      &tms340x0_device::xor_b,      &tms340x0_device::xor_a,      &tms340x0_device::xor_b,      &tms340x0_device::xor_a,      &tms340x0_device::xor_b,      &tms340x0_device::xor_a,      &tms340x0_device::xor_b,
275		/* 0x5700 */
276		&tms340x0_device::xor_a,      &tms340x0_device::xor_b,      &tms340x0_device::xor_a,      &tms340x0_device::xor_b,      &tms340x0_device::xor_a,      &tms340x0_device::xor_b,      &tms340x0_device::xor_a,      &tms340x0_device::xor_b,
277		&tms340x0_device::xor_a,      &tms340x0_device::xor_b,      &tms340x0_device::xor_a,      &tms340x0_device::xor_b,      &tms340x0_device::xor_a,      &tms340x0_device::xor_b,      &tms340x0_device::xor_a,      &tms340x0_device::xor_b,
278		/* 0x5800 */
279		&tms340x0_device::divs_a,     &tms340x0_device::divs_b,     &tms340x0_device::divs_a,     &tms340x0_device::divs_b,     &tms340x0_device::divs_a,     &tms340x0_device::divs_b,     &tms340x0_device::divs_a,     &tms340x0_device::divs_b,
280		&tms340x0_device::divs_a,     &tms340x0_device::divs_b,     &tms340x0_device::divs_a,     &tms340x0_device::divs_b,     &tms340x0_device::divs_a,     &tms340x0_device::divs_b,     &tms340x0_device::divs_a,     &tms340x0_device::divs_b,
281		/* 0x5900 */
282		&tms340x0_device::divs_a,     &tms340x0_device::divs_b,     &tms340x0_device::divs_a,     &tms340x0_device::divs_b,     &tms340x0_device::divs_a,     &tms340x0_device::divs_b,     &tms340x0_device::divs_a,     &tms340x0_device::divs_b,
283		&tms340x0_device::divs_a,     &tms340x0_device::divs_b,     &tms340x0_device::divs_a,     &tms340x0_device::divs_b,     &tms340x0_device::divs_a,     &tms340x0_device::divs_b,     &tms340x0_device::divs_a,     &tms340x0_device::divs_b,
284		/* 0x5a00 */
285		&tms340x0_device::divu_a,     &tms340x0_device::divu_b,     &tms340x0_device::divu_a,     &tms340x0_device::divu_b,     &tms340x0_device::divu_a,     &tms340x0_device::divu_b,     &tms340x0_device::divu_a,     &tms340x0_device::divu_b,
286		&tms340x0_device::divu_a,     &tms340x0_device::divu_b,     &tms340x0_device::divu_a,     &tms340x0_device::divu_b,     &tms340x0_device::divu_a,     &tms340x0_device::divu_b,     &tms340x0_device::divu_a,     &tms340x0_device::divu_b,
287		/* 0x5b00 */
288		&tms340x0_device::divu_a,     &tms340x0_device::divu_b,     &tms340x0_device::divu_a,     &tms340x0_device::divu_b,     &tms340x0_device::divu_a,     &tms340x0_device::divu_b,     &tms340x0_device::divu_a,     &tms340x0_device::divu_b,
289		&tms340x0_device::divu_a,     &tms340x0_device::divu_b,     &tms340x0_device::divu_a,     &tms340x0_device::divu_b,     &tms340x0_device::divu_a,     &tms340x0_device::divu_b,     &tms340x0_device::divu_a,     &tms340x0_device::divu_b,
290		/* 0x5c00 */
291		&tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,     &tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,     &tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,     &tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,
292		&tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,     &tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,     &tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,     &tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,
293		/* 0x5d00 */
294		&tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,     &tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,     &tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,     &tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,
295		&tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,     &tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,     &tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,     &tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,
296		/* 0x5e00 */
297		&tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,     &tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,     &tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,     &tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,
298		&tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,     &tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,     &tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,     &tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,
299		/* 0x5f00 */
300		&tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,     &tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,     &tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,     &tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,
301		&tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,     &tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,     &tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,     &tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,
302		/* 0x6000 */
303		&tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,    &tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,    &tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,    &tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,
304		&tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,    &tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,    &tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,    &tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,
305		/* 0x6100 */
306		&tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,    &tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,    &tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,    &tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,
307		&tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,    &tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,    &tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,    &tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,
308		/* 0x6200 */
309		&tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,    &tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,    &tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,    &tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,
310		&tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,    &tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,    &tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,    &tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,
311		/* 0x6300 */
312		&tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,    &tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,    &tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,    &tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,
313		&tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,    &tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,    &tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,    &tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,
314		/* 0x6400 */
315		&tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,    &tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,    &tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,    &tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,
316		&tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,    &tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,    &tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,    &tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,
317		/* 0x6500 */
318		&tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,    &tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,    &tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,    &tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,
319		&tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,    &tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,    &tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,    &tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,
320		/* 0x6600 */
321		&tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,    &tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,    &tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,    &tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,
322		&tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,    &tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,    &tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,    &tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,
323		/* 0x6700 */
324		&tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,    &tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,    &tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,    &tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,
325		&tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,    &tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,    &tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,    &tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,
326		/* 0x6800 */
327		&tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,     &tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,     &tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,     &tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,
328		&tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,     &tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,     &tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,     &tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,
329		/* 0x6900 */
330		&tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,     &tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,     &tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,     &tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,
331		&tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,     &tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,     &tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,     &tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,
332		/* 0x6a00 */
333		&tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,      &tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,      &tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,      &tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,
334		&tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,      &tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,      &tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,      &tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,
335		/* 0x6b00 */
336		&tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,      &tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,      &tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,      &tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,
337		&tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,      &tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,      &tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,      &tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,
338		/* 0x6c00 */
339		&tms340x0_device::mods_a,     &tms340x0_device::mods_b,     &tms340x0_device::mods_a,     &tms340x0_device::mods_b,     &tms340x0_device::mods_a,     &tms340x0_device::mods_b,     &tms340x0_device::mods_a,     &tms340x0_device::mods_b,
340		&tms340x0_device::mods_a,     &tms340x0_device::mods_b,     &tms340x0_device::mods_a,     &tms340x0_device::mods_b,     &tms340x0_device::mods_a,     &tms340x0_device::mods_b,     &tms340x0_device::mods_a,     &tms340x0_device::mods_b,
341		/* 0x6d00 */
342		&tms340x0_device::mods_a,     &tms340x0_device::mods_b,     &tms340x0_device::mods_a,     &tms340x0_device::mods_b,     &tms340x0_device::mods_a,     &tms340x0_device::mods_b,     &tms340x0_device::mods_a,     &tms340x0_device::mods_b,
343		&tms340x0_device::mods_a,     &tms340x0_device::mods_b,     &tms340x0_device::mods_a,     &tms340x0_device::mods_b,     &tms340x0_device::mods_a,     &tms340x0_device::mods_b,     &tms340x0_device::mods_a,     &tms340x0_device::mods_b,
344		/* 0x6e00 */
345		&tms340x0_device::modu_a,     &tms340x0_device::modu_b,     &tms340x0_device::modu_a,     &tms340x0_device::modu_b,     &tms340x0_device::modu_a,     &tms340x0_device::modu_b,     &tms340x0_device::modu_a,     &tms340x0_device::modu_b,
346		&tms340x0_device::modu_a,     &tms340x0_device::modu_b,     &tms340x0_device::modu_a,     &tms340x0_device::modu_b,     &tms340x0_device::modu_a,     &tms340x0_device::modu_b,     &tms340x0_device::modu_a,     &tms340x0_device::modu_b,
347		/* 0x6f00 */
348		&tms340x0_device::modu_a,     &tms340x0_device::modu_b,     &tms340x0_device::modu_a,     &tms340x0_device::modu_b,     &tms340x0_device::modu_a,     &tms340x0_device::modu_b,     &tms340x0_device::modu_a,     &tms340x0_device::modu_b,
349		&tms340x0_device::modu_a,     &tms340x0_device::modu_b,     &tms340x0_device::modu_a,     &tms340x0_device::modu_b,     &tms340x0_device::modu_a,     &tms340x0_device::modu_b,     &tms340x0_device::modu_a,     &tms340x0_device::modu_b,
350		/* 0x7000 */
351		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
352		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
353		/* 0x7100 */
354		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
355		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
356		/* 0x7200 */
357		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
358		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
359		/* 0x7300 */
360		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
361		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
362		/* 0x7400 */
363		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
364		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
365		/* 0x7500 */
366		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
367		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
368		/* 0x7600 */
369		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
370		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
371		/* 0x7700 */
372		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
373		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
374		/* 0x7800 */
375		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
376		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
377		/* 0x7900 */
378		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
379		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
380		/* 0x7a00 */
381		&tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,      &tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,      &tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,      &tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,
382		&tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,      &tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,      &tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,      &tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,
383		/* 0x7b00 */
384		&tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,      &tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,      &tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,      &tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,
385		&tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,      &tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,      &tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,      &tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,
386		/* 0x7c00 */
387		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
388		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
389		/* 0x7d00 */
390		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
391		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
392		/* 0x7e00 */
393		&tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,    &tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,    &tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,    &tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,
394		&tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,    &tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,    &tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,    &tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,
395		/* 0x7f00 */
396		&tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,    &tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,    &tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,    &tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,
397		&tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,    &tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,    &tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,    &tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,
398		/* 0x8000 */
399		&tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b,
400		&tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b,
401		/* 0x8100 */
402		&tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b,
403		&tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b,
404		/* 0x8200 */
405		&tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b,
406		&tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b,
407		/* 0x8300 */
408		&tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b,
409		&tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b,
410		/* 0x8400 */
411		&tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b,
412		&tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b,
413		/* 0x8500 */
414		&tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b,
415		&tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b,
416		/* 0x8600 */
417		&tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b,
418		&tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b,
419		/* 0x8700 */
420		&tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b,
421		&tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b,
422		/* 0x8800 */
423		&tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b,
424		&tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b,
425		/* 0x8900 */
426		&tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b,
427		&tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b,
428		/* 0x8a00 */
429		&tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b,
430		&tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b,
431		/* 0x8b00 */
432		&tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b,
433		&tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b,
434		/* 0x8c00 */
435		&tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,  &tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,  &tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,  &tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,
436		&tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,  &tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,  &tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,  &tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,
437		/* 0x8d00 */
438		&tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,  &tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,  &tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,  &tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,
439		&tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,  &tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,  &tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,  &tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,
440		/* 0x8e00 */
441		&tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,  &tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,  &tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,  &tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,
442		&tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,  &tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,  &tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,  &tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,
443		/* 0x8f00 */
444		&tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,  &tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,  &tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,  &tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,
445		&tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,  &tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,  &tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,  &tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,
446		/* 0x9000 */
447		&tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,   &tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,   &tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,   &tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,
448		&tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,   &tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,   &tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,   &tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,
449		/* 0x9100 */
450		&tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,   &tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,   &tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,   &tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,
451		&tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,   &tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,   &tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,   &tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,
452		/* 0x9200 */
453		&tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,   &tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,   &tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,   &tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,
454		&tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,   &tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,   &tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,   &tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,
455		/* 0x9300 */
456		&tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,   &tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,   &tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,   &tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,
457		&tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,   &tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,   &tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,   &tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,
458		/* 0x9400 */
459		&tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,   &tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,   &tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,   &tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,
460		&tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,   &tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,   &tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,   &tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,
461		/* 0x9500 */
462		&tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,   &tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,   &tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,   &tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,
463		&tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,   &tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,   &tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,   &tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,
464		/* 0x9600 */
465		&tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,   &tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,   &tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,   &tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,
466		&tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,   &tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,   &tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,   &tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,
467		/* 0x9700 */
468		&tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,   &tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,   &tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,   &tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,
469		&tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,   &tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,   &tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,   &tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,
470		/* 0x9800 */
471		&tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,  &tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,  &tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,  &tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,
472		&tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,  &tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,  &tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,  &tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,
473		/* 0x9900 */
474		&tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,  &tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,  &tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,  &tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,
475		&tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,  &tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,  &tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,  &tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,
476		/* 0x9a00 */
477		&tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,  &tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,  &tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,  &tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,
478		&tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,  &tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,  &tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,  &tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,
479		/* 0x9b00 */
480		&tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,  &tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,  &tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,  &tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,
481		&tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,  &tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,  &tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,  &tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,
482		/* 0x9c00 */
483		&tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,  &tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,  &tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,  &tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,
484		&tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,  &tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,  &tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,  &tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,
485		/* 0x9d00 */
486		&tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,  &tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,  &tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,  &tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,
487		&tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,  &tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,  &tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,  &tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,
488		/* 0x9e00 */
489		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
490		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
491		/* 0x9f00 */
492		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
493		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
494		/* 0xa000 */
495		&tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,   &tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,   &tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,   &tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,
496		&tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,   &tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,   &tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,   &tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,
497		/* 0xa100 */
498		&tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,   &tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,   &tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,   &tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,
499		&tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,   &tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,   &tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,   &tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,
500		/* 0xa200 */
501		&tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,   &tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,   &tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,   &tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,
502		&tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,   &tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,   &tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,   &tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,
503		/* 0xa300 */
504		&tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,   &tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,   &tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,   &tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,
505		&tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,   &tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,   &tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,   &tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,
506		/* 0xa400 */
507		&tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,   &tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,   &tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,   &tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,
508		&tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,   &tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,   &tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,   &tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,
509		/* 0xa500 */
510		&tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,   &tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,   &tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,   &tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,
511		&tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,   &tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,   &tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,   &tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,
512		/* 0xa600 */
513		&tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,   &tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,   &tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,   &tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,
514		&tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,   &tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,   &tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,   &tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,
515		/* 0xa700 */
516		&tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,   &tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,   &tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,   &tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,
517		&tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,   &tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,   &tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,   &tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,
518		/* 0xa800 */
519		&tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,  &tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,  &tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,  &tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,
520		&tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,  &tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,  &tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,  &tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,
521		/* 0xa900 */
522		&tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,  &tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,  &tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,  &tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,
523		&tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,  &tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,  &tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,  &tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,
524		/* 0xaa00 */
525		&tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,  &tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,  &tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,  &tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,
526		&tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,  &tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,  &tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,  &tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,
527		/* 0xab00 */
528		&tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,  &tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,  &tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,  &tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,
529		&tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,  &tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,  &tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,  &tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,
530		/* 0xac00 */
531		&tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,    &tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,    &tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,    &tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,
532		&tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,    &tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,    &tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,    &tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,
533		/* 0xad00 */
534		&tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,    &tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,    &tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,    &tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,
535		&tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,    &tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,    &tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,    &tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,
536		/* 0xae00 */
537		&tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,    &tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,    &tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,    &tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,
538		&tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,    &tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,    &tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,    &tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,
539		/* 0xaf00 */
540		&tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,    &tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,    &tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,    &tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,
541		&tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,    &tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,    &tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,    &tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,
542		/* 0xb000 */
543		&tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,   &tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,   &tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,   &tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,
544		&tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,   &tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,   &tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,   &tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,
545		/* 0xb100 */
546		&tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,   &tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,   &tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,   &tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,
547		&tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,   &tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,   &tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,   &tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,
548		/* 0xb200 */
549		&tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,   &tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,   &tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,   &tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,
550		&tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,   &tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,   &tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,   &tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,
551		/* 0xb300 */
552		&tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,   &tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,   &tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,   &tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,
553		&tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,   &tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,   &tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,   &tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,
554		/* 0xb400 */
555		&tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,   &tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,   &tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,   &tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,
556		&tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,   &tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,   &tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,   &tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,
557		/* 0xb500 */
558		&tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,   &tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,   &tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,   &tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,
559		&tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,   &tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,   &tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,   &tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,
560		/* 0xb600 */
561		&tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,   &tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,   &tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,   &tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,
562		&tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,   &tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,   &tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,   &tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,
563		/* 0xb700 */
564		&tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,   &tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,   &tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,   &tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,
565		&tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,   &tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,   &tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,   &tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,
566		/* 0xb800 */
567		&tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,  &tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,  &tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,  &tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,
568		&tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,  &tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,  &tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,  &tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,
569		/* 0xb900 */
570		&tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,  &tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,  &tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,  &tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,
571		&tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,  &tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,  &tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,  &tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,
572		/* 0xba00 */
573		&tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,  &tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,  &tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,  &tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,
574		&tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,  &tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,  &tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,  &tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,
575		/* 0xbb00 */
576		&tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,  &tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,  &tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,  &tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,
577		&tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,  &tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,  &tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,  &tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,
578		/* 0xbc00 */
579		&tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,   &tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,   &tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,   &tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,
580		&tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,   &tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,   &tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,   &tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,
581		/* 0xbd00 */
582		&tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,   &tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,   &tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,   &tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,
583		&tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,   &tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,   &tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,   &tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,
584		/* 0xbe00 */
585		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
586		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
587		/* 0xbf00 */
588		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
589		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
590		/* 0xc000 */
591		&tms340x0_device::j_UC_0,     &tms340x0_device::j_UC_x,     &tms340x0_device::j_UC_x,     &tms340x0_device::j_UC_x,     &tms340x0_device::j_UC_x,     &tms340x0_device::j_UC_x,     &tms340x0_device::j_UC_x,     &tms340x0_device::j_UC_x,
592		&tms340x0_device::j_UC_8,     &tms340x0_device::j_UC_x,     &tms340x0_device::j_UC_x,     &tms340x0_device::j_UC_x,     &tms340x0_device::j_UC_x,     &tms340x0_device::j_UC_x,     &tms340x0_device::j_UC_x,     &tms340x0_device::j_UC_x,
593		/* 0xc100 */
594		&tms340x0_device::j_P_0,      &tms340x0_device::j_P_x,      &tms340x0_device::j_P_x,      &tms340x0_device::j_P_x,      &tms340x0_device::j_P_x,      &tms340x0_device::j_P_x,      &tms340x0_device::j_P_x,      &tms340x0_device::j_P_x,
595		&tms340x0_device::j_P_8,      &tms340x0_device::j_P_x,      &tms340x0_device::j_P_x,      &tms340x0_device::j_P_x,      &tms340x0_device::j_P_x,      &tms340x0_device::j_P_x,      &tms340x0_device::j_P_x,      &tms340x0_device::j_P_x,
596		/* 0xc200 */
597		&tms340x0_device::j_LS_0,     &tms340x0_device::j_LS_x,     &tms340x0_device::j_LS_x,     &tms340x0_device::j_LS_x,     &tms340x0_device::j_LS_x,     &tms340x0_device::j_LS_x,     &tms340x0_device::j_LS_x,     &tms340x0_device::j_LS_x,
598		&tms340x0_device::j_LS_8,     &tms340x0_device::j_LS_x,     &tms340x0_device::j_LS_x,     &tms340x0_device::j_LS_x,     &tms340x0_device::j_LS_x,     &tms340x0_device::j_LS_x,     &tms340x0_device::j_LS_x,     &tms340x0_device::j_LS_x,
599		/* 0xc300 */
600		&tms340x0_device::j_HI_0,     &tms340x0_device::j_HI_x,     &tms340x0_device::j_HI_x,     &tms340x0_device::j_HI_x,     &tms340x0_device::j_HI_x,     &tms340x0_device::j_HI_x,     &tms340x0_device::j_HI_x,     &tms340x0_device::j_HI_x,
601		&tms340x0_device::j_HI_8,     &tms340x0_device::j_HI_x,     &tms340x0_device::j_HI_x,     &tms340x0_device::j_HI_x,     &tms340x0_device::j_HI_x,     &tms340x0_device::j_HI_x,     &tms340x0_device::j_HI_x,     &tms340x0_device::j_HI_x,
602		/* 0xc400 */
603		&tms340x0_device::j_LT_0,     &tms340x0_device::j_LT_x,     &tms340x0_device::j_LT_x,     &tms340x0_device::j_LT_x,     &tms340x0_device::j_LT_x,     &tms340x0_device::j_LT_x,     &tms340x0_device::j_LT_x,     &tms340x0_device::j_LT_x,
604		&tms340x0_device::j_LT_8,     &tms340x0_device::j_LT_x,     &tms340x0_device::j_LT_x,     &tms340x0_device::j_LT_x,     &tms340x0_device::j_LT_x,     &tms340x0_device::j_LT_x,     &tms340x0_device::j_LT_x,     &tms340x0_device::j_LT_x,
605		/* 0xc500 */
606		&tms340x0_device::j_GE_0,     &tms340x0_device::j_GE_x,     &tms340x0_device::j_GE_x,     &tms340x0_device::j_GE_x,     &tms340x0_device::j_GE_x,     &tms340x0_device::j_GE_x,     &tms340x0_device::j_GE_x,     &tms340x0_device::j_GE_x,
607		&tms340x0_device::j_GE_8,     &tms340x0_device::j_GE_x,     &tms340x0_device::j_GE_x,     &tms340x0_device::j_GE_x,     &tms340x0_device::j_GE_x,     &tms340x0_device::j_GE_x,     &tms340x0_device::j_GE_x,     &tms340x0_device::j_GE_x,
608		/* 0xc600 */
609		&tms340x0_device::j_LE_0,     &tms340x0_device::j_LE_x,     &tms340x0_device::j_LE_x,     &tms340x0_device::j_LE_x,     &tms340x0_device::j_LE_x,     &tms340x0_device::j_LE_x,     &tms340x0_device::j_LE_x,     &tms340x0_device::j_LE_x,
610		&tms340x0_device::j_LE_8,     &tms340x0_device::j_LE_x,     &tms340x0_device::j_LE_x,     &tms340x0_device::j_LE_x,     &tms340x0_device::j_LE_x,     &tms340x0_device::j_LE_x,     &tms340x0_device::j_LE_x,     &tms340x0_device::j_LE_x,
611		/* 0xc700 */
612		&tms340x0_device::j_GT_0,     &tms340x0_device::j_GT_x,     &tms340x0_device::j_GT_x,     &tms340x0_device::j_GT_x,     &tms340x0_device::j_GT_x,     &tms340x0_device::j_GT_x,     &tms340x0_device::j_GT_x,     &tms340x0_device::j_GT_x,
613		&tms340x0_device::j_GT_8,     &tms340x0_device::j_GT_x,     &tms340x0_device::j_GT_x,     &tms340x0_device::j_GT_x,     &tms340x0_device::j_GT_x,     &tms340x0_device::j_GT_x,     &tms340x0_device::j_GT_x,     &tms340x0_device::j_GT_x,
614		/* 0xc800 */
615		&tms340x0_device::j_C_0,      &tms340x0_device::j_C_x,      &tms340x0_device::j_C_x,      &tms340x0_device::j_C_x,      &tms340x0_device::j_C_x,      &tms340x0_device::j_C_x,      &tms340x0_device::j_C_x,      &tms340x0_device::j_C_x,
616		&tms340x0_device::j_C_8,      &tms340x0_device::j_C_x,      &tms340x0_device::j_C_x,      &tms340x0_device::j_C_x,      &tms340x0_device::j_C_x,      &tms340x0_device::j_C_x,      &tms340x0_device::j_C_x,      &tms340x0_device::j_C_x,
617		/* 0xc900 */
618		&tms340x0_device::j_NC_0,     &tms340x0_device::j_NC_x,     &tms340x0_device::j_NC_x,     &tms340x0_device::j_NC_x,     &tms340x0_device::j_NC_x,     &tms340x0_device::j_NC_x,     &tms340x0_device::j_NC_x,     &tms340x0_device::j_NC_x,
619		&tms340x0_device::j_NC_8,     &tms340x0_device::j_NC_x,     &tms340x0_device::j_NC_x,     &tms340x0_device::j_NC_x,     &tms340x0_device::j_NC_x,     &tms340x0_device::j_NC_x,     &tms340x0_device::j_NC_x,     &tms340x0_device::j_NC_x,
620		/* 0xca00 */
621		&tms340x0_device::j_EQ_0,     &tms340x0_device::j_EQ_x,     &tms340x0_device::j_EQ_x,     &tms340x0_device::j_EQ_x,     &tms340x0_device::j_EQ_x,     &tms340x0_device::j_EQ_x,     &tms340x0_device::j_EQ_x,     &tms340x0_device::j_EQ_x,
622		&tms340x0_device::j_EQ_8,     &tms340x0_device::j_EQ_x,     &tms340x0_device::j_EQ_x,     &tms340x0_device::j_EQ_x,     &tms340x0_device::j_EQ_x,     &tms340x0_device::j_EQ_x,     &tms340x0_device::j_EQ_x,     &tms340x0_device::j_EQ_x,
623		/* 0xcb00 */
624		&tms340x0_device::j_NE_0,     &tms340x0_device::j_NE_x,     &tms340x0_device::j_NE_x,     &tms340x0_device::j_NE_x,     &tms340x0_device::j_NE_x,     &tms340x0_device::j_NE_x,     &tms340x0_device::j_NE_x,     &tms340x0_device::j_NE_x,
625		&tms340x0_device::j_NE_8,     &tms340x0_device::j_NE_x,     &tms340x0_device::j_NE_x,     &tms340x0_device::j_NE_x,     &tms340x0_device::j_NE_x,     &tms340x0_device::j_NE_x,     &tms340x0_device::j_NE_x,     &tms340x0_device::j_NE_x,
626		/* 0xcc00 */
627		&tms340x0_device::j_V_0,      &tms340x0_device::j_V_x,      &tms340x0_device::j_V_x,      &tms340x0_device::j_V_x,      &tms340x0_device::j_V_x,      &tms340x0_device::j_V_x,      &tms340x0_device::j_V_x,      &tms340x0_device::j_V_x,
628		&tms340x0_device::j_V_8,      &tms340x0_device::j_V_x,      &tms340x0_device::j_V_x,      &tms340x0_device::j_V_x,      &tms340x0_device::j_V_x,      &tms340x0_device::j_V_x,      &tms340x0_device::j_V_x,      &tms340x0_device::j_V_x,
629		/* 0xcd00 */
630		&tms340x0_device::j_NV_0,     &tms340x0_device::j_NV_x,     &tms340x0_device::j_NV_x,     &tms340x0_device::j_NV_x,     &tms340x0_device::j_NV_x,     &tms340x0_device::j_NV_x,     &tms340x0_device::j_NV_x,     &tms340x0_device::j_NV_x,
631		&tms340x0_device::j_NV_8,     &tms340x0_device::j_NV_x,     &tms340x0_device::j_NV_x,     &tms340x0_device::j_NV_x,     &tms340x0_device::j_NV_x,     &tms340x0_device::j_NV_x,     &tms340x0_device::j_NV_x,     &tms340x0_device::j_NV_x,
632		/* 0xce00 */
633		&tms340x0_device::j_N_0,      &tms340x0_device::j_N_x,      &tms340x0_device::j_N_x,      &tms340x0_device::j_N_x,      &tms340x0_device::j_N_x,      &tms340x0_device::j_N_x,      &tms340x0_device::j_N_x,      &tms340x0_device::j_N_x,
634		&tms340x0_device::j_N_8,      &tms340x0_device::j_N_x,      &tms340x0_device::j_N_x,      &tms340x0_device::j_N_x,      &tms340x0_device::j_N_x,      &tms340x0_device::j_N_x,      &tms340x0_device::j_N_x,      &tms340x0_device::j_N_x,
635		/* 0xcf00 */
636		&tms340x0_device::j_NN_0,     &tms340x0_device::j_NN_x,     &tms340x0_device::j_NN_x,     &tms340x0_device::j_NN_x,     &tms340x0_device::j_NN_x,     &tms340x0_device::j_NN_x,     &tms340x0_device::j_NN_x,     &tms340x0_device::j_NN_x,
637		&tms340x0_device::j_NN_8,     &tms340x0_device::j_NN_x,     &tms340x0_device::j_NN_x,     &tms340x0_device::j_NN_x,     &tms340x0_device::j_NN_x,     &tms340x0_device::j_NN_x,     &tms340x0_device::j_NN_x,     &tms340x0_device::j_NN_x,
638		/* 0xd000 */
639		&tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,  &tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,  &tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,  &tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,
640		&tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,  &tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,  &tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,  &tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,
641		/* 0xd100 */
642		&tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,  &tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,  &tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,  &tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,
643		&tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,  &tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,  &tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,  &tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,
644		/* 0xd200 */
645		&tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,  &tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,  &tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,  &tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,
646		&tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,  &tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,  &tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,  &tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,
647		/* 0xd300 */
648		&tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,  &tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,  &tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,  &tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,
649		&tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,  &tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,  &tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,  &tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,
650		/* 0xd400 */
651		&tms340x0_device::move0_a_ni_a,&tms340x0_device::move0_a_ni_b,&tms340x0_device::unimpl,   &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
652		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
653		/* 0xd500 */
654		&tms340x0_device::exgf0_a,    &tms340x0_device::exgf0_b,    &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
655		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
656		/* 0xd600 */
657		&tms340x0_device::move1_a_ni_a,&tms340x0_device::move1_a_ni_b,&tms340x0_device::unimpl,   &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
658		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
659		/* 0xd700 */
660		&tms340x0_device::exgf1_a,    &tms340x0_device::exgf1_b,    &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
661		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
662		/* 0xd800 */
663		&tms340x0_device::cexec_s,    &tms340x0_device::cexec_s,    &tms340x0_device::cexec_s,    &tms340x0_device::cexec_s,    &tms340x0_device::cexec_s,    &tms340x0_device::cexec_s,    &tms340x0_device::cexec_s,    &tms340x0_device::cexec_s,
664		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
665		/* 0xd900 */
666		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
667		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
668		/* 0xda00 */
669		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
670		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
671		/* 0xdb00 */
672		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
673		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
674		/* 0xdc00 */
675		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
676		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
677		/* 0xdd00 */
678		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
679		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
680		/* 0xde00 */
681		&tms340x0_device::unimpl,     &tms340x0_device::fline,      &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
682		&tms340x0_device::unimpl,     &tms340x0_device::fline,      &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
683		/* 0xdf00 */
684		&tms340x0_device::unimpl,     &tms340x0_device::line,       &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
685		&tms340x0_device::unimpl,     &tms340x0_device::line,       &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
686		/* 0xe000 */
687		&tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,   &tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,   &tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,   &tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,
688		&tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,   &tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,   &tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,   &tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,
689		/* 0xe100 */
690		&tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,   &tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,   &tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,   &tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,
691		&tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,   &tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,   &tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,   &tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,
692		/* 0xe200 */
693		&tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,   &tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,   &tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,   &tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,
694		&tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,   &tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,   &tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,   &tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,
695		/* 0xe300 */
696		&tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,   &tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,   &tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,   &tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,
697		&tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,   &tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,   &tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,   &tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,
698		/* 0xe400 */
699		&tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,   &tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,   &tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,   &tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,
700		&tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,   &tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,   &tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,   &tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,
701		/* 0xe500 */
702		&tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,   &tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,   &tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,   &tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,
703		&tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,   &tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,   &tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,   &tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,
704		/* 0xe600 */
705		&tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,      &tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,      &tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,      &tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,
706		&tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,      &tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,      &tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,      &tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,
707		/* 0xe700 */
708		&tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,      &tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,      &tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,      &tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,
709		&tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,      &tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,      &tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,      &tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,
710		/* 0xe800 */
711		&tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,    &tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,    &tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,    &tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,
712		&tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,    &tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,    &tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,    &tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,
713		/* 0xe900 */
714		&tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,    &tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,    &tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,    &tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,
715		&tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,    &tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,    &tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,    &tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,
716		/* 0xea00 */
717		&tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,   &tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,   &tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,   &tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,
718		&tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,   &tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,   &tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,   &tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,
719		/* 0xeb00 */
720		&tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,   &tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,   &tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,   &tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,
721		&tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,   &tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,   &tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,   &tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,
722		/* 0xec00 */
723		&tms340x0_device::movx_a,     &tms340x0_device::movx_b,     &tms340x0_device::movx_a,     &tms340x0_device::movx_b,     &tms340x0_device::movx_a,     &tms340x0_device::movx_b,     &tms340x0_device::movx_a,     &tms340x0_device::movx_b,
724		&tms340x0_device::movx_a,     &tms340x0_device::movx_b,     &tms340x0_device::movx_a,     &tms340x0_device::movx_b,     &tms340x0_device::movx_a,     &tms340x0_device::movx_b,     &tms340x0_device::movx_a,     &tms340x0_device::movx_b,
725		/* 0xed00 */
726		&tms340x0_device::movx_a,     &tms340x0_device::movx_b,     &tms340x0_device::movx_a,     &tms340x0_device::movx_b,     &tms340x0_device::movx_a,     &tms340x0_device::movx_b,     &tms340x0_device::movx_a,     &tms340x0_device::movx_b,
727		&tms340x0_device::movx_a,     &tms340x0_device::movx_b,     &tms340x0_device::movx_a,     &tms340x0_device::movx_b,     &tms340x0_device::movx_a,     &tms340x0_device::movx_b,     &tms340x0_device::movx_a,     &tms340x0_device::movx_b,
728		/* 0xee00 */
729		&tms340x0_device::movy_a,     &tms340x0_device::movy_b,     &tms340x0_device::movy_a,     &tms340x0_device::movy_b,     &tms340x0_device::movy_a,     &tms340x0_device::movy_b,     &tms340x0_device::movy_a,     &tms340x0_device::movy_b,
730		&tms340x0_device::movy_a,     &tms340x0_device::movy_b,     &tms340x0_device::movy_a,     &tms340x0_device::movy_b,     &tms340x0_device::movy_a,     &tms340x0_device::movy_b,     &tms340x0_device::movy_a,     &tms340x0_device::movy_b,
731		/* 0xef00 */
732		&tms340x0_device::movy_a,     &tms340x0_device::movy_b,     &tms340x0_device::movy_a,     &tms340x0_device::movy_b,     &tms340x0_device::movy_a,     &tms340x0_device::movy_b,     &tms340x0_device::movy_a,     &tms340x0_device::movy_b,
733		&tms340x0_device::movy_a,     &tms340x0_device::movy_b,     &tms340x0_device::movy_a,     &tms340x0_device::movy_b,     &tms340x0_device::movy_a,     &tms340x0_device::movy_b,     &tms340x0_device::movy_a,     &tms340x0_device::movy_b,
734		/* 0xf000 */
735		&tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,    &tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,    &tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,    &tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,
736		&tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,    &tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,    &tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,    &tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,
737		/* 0xf100 */
738		&tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,    &tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,    &tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,    &tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,
739		&tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,    &tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,    &tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,    &tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,
740		/* 0xf200 */
741		&tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,    &tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,    &tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,    &tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,
742		&tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,    &tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,    &tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,    &tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,
743		/* 0xf300 */
744		&tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,    &tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,    &tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,    &tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,
745		&tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,    &tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,    &tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,    &tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,
746		/* 0xf400 */
747		&tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,  &tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,  &tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,  &tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,
748		&tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,  &tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,  &tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,  &tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,
749		/* 0xf500 */
750		&tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,  &tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,  &tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,  &tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,
751		&tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,  &tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,  &tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,  &tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,
752		/* 0xf600 */
753		&tms340x0_device::drav_a,     &tms340x0_device::drav_b,     &tms340x0_device::drav_a,     &tms340x0_device::drav_b,     &tms340x0_device::drav_a,     &tms340x0_device::drav_b,     &tms340x0_device::drav_a,     &tms340x0_device::drav_b,
754		&tms340x0_device::drav_a,     &tms340x0_device::drav_b,     &tms340x0_device::drav_a,     &tms340x0_device::drav_b,     &tms340x0_device::drav_a,     &tms340x0_device::drav_b,     &tms340x0_device::drav_a,     &tms340x0_device::drav_b,
755		/* 0xf700 */
756		&tms340x0_device::drav_a,     &tms340x0_device::drav_b,     &tms340x0_device::drav_a,     &tms340x0_device::drav_b,     &tms340x0_device::drav_a,     &tms340x0_device::drav_b,     &tms340x0_device::drav_a,     &tms340x0_device::drav_b,
757		&tms340x0_device::drav_a,     &tms340x0_device::drav_b,     &tms340x0_device::drav_a,     &tms340x0_device::drav_b,     &tms340x0_device::drav_a,     &tms340x0_device::drav_b,     &tms340x0_device::drav_a,     &tms340x0_device::drav_b,
758		/* 0xf800 */
759		&tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,  &tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,  &tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,  &tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,
760		&tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,  &tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,  &tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,  &tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,
761		/* 0xf900 */
762		&tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,  &tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,  &tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,  &tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,
763		&tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,  &tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,  &tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,  &tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,
764		/* 0xfa00 */
765		&tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,  &tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,  &tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,  &tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,
766		&tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,  &tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,  &tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,  &tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,
767		/* 0xfb00 */
768		&tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,  &tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,  &tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,  &tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,
769		&tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,  &tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,  &tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,  &tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,
770		/* 0xfc00 */
771		&tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,  &tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,  &tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,  &tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,
772		&tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,  &tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,  &tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,  &tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,
773		/* 0xfd00 */
774		&tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,  &tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,  &tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,  &tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,
775		&tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,  &tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,  &tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,  &tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,
776		/* 0xfe00 */
777		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
778		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
779		/* 0xff00 */
780		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
781		&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl
782		};

trunk/src/devices/cpu/tms34010/34010tbl.inc

r0	r250252
	1	// license:BSD-3-Clause
	2	// copyright-holders:Alex Pasadyn,Zsolt Vasvari
	3	/*** TMS34010: Portable TMS34010 emulator ***********************************
	4
	5	Copyright Alex Pasadyn/Zsolt Vasvari
	6
	7	Opcode Table
	8
	9	*****************************************************************************/
	10
	11	/* Opcode Table */
	12	const tms340x0_device::opcode_func tms340x0_device::s_opcode_table[65536 >> 4] =
	13	{
	14	/* 0x0000 0x0010 0x0020 0x0030 ... 0x00f0 */
	15	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::rev_a,      &tms340x0_device::rev_b,      &tms340x0_device::idle,       &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	16	&tms340x0_device::mwait,      &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::blmove,
	17	/* 0x0100 */
	18	&tms340x0_device::emu,        &tms340x0_device::unimpl,     &tms340x0_device::exgpc_a,    &tms340x0_device::exgpc_b,    &tms340x0_device::getpc_a,    &tms340x0_device::getpc_b,    &tms340x0_device::jump_a,     &tms340x0_device::jump_b,
	19	&tms340x0_device::getst_a,    &tms340x0_device::getst_b,    &tms340x0_device::putst_a,    &tms340x0_device::putst_b,    &tms340x0_device::popst,      &tms340x0_device::unimpl,     &tms340x0_device::pushst,     &tms340x0_device::unimpl,
	20	/* 0x0200 */
	21	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::setcsp,     &tms340x0_device::unimpl,     &tms340x0_device::setcdp,
	22	&tms340x0_device::rpix_a,     &tms340x0_device::rpix_b,     &tms340x0_device::exgps_a,    &tms340x0_device::exgps_b,    &tms340x0_device::getps_a,    &tms340x0_device::getps_b,    &tms340x0_device::unimpl,     &tms340x0_device::setcmp,
	23	/* 0x0300 */
	24	&tms340x0_device::nop,        &tms340x0_device::unimpl,     &tms340x0_device::clrc,       &tms340x0_device::unimpl,     &tms340x0_device::movb_aa,    &tms340x0_device::unimpl,     &tms340x0_device::dint,       &tms340x0_device::unimpl,
	25	&tms340x0_device::abs_a,      &tms340x0_device::abs_b,      &tms340x0_device::neg_a,      &tms340x0_device::neg_b,      &tms340x0_device::negb_a,     &tms340x0_device::negb_b,     &tms340x0_device::not_a,      &tms340x0_device::not_b,
	26	/* 0x0400 */
	27	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	28	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	29	/* 0x0500 */
	30	&tms340x0_device::sext0_a,    &tms340x0_device::sext0_b,    &tms340x0_device::zext0_a,    &tms340x0_device::zext0_b,    &tms340x0_device::setf0,      &tms340x0_device::setf0,      &tms340x0_device::setf0,      &tms340x0_device::setf0,
	31	&tms340x0_device::move0_ra_a, &tms340x0_device::move0_ra_b, &tms340x0_device::move0_ar_a, &tms340x0_device::move0_ar_b, &tms340x0_device::move0_aa,   &tms340x0_device::unimpl,     &tms340x0_device::movb_ra_a,  &tms340x0_device::movb_ra_b,
	32	/* 0x0600 */
	33	&tms340x0_device::cexec_l,    &tms340x0_device::unimpl,     &tms340x0_device::cmovgc_a,   &tms340x0_device::cmovgc_b,   &tms340x0_device::cmovgc_a_s, &tms340x0_device::cmovgc_b_s, &tms340x0_device::cmovcg_a,   &tms340x0_device::cmovcg_b,
	34	&tms340x0_device::cmovmc_f,   &tms340x0_device::cmovmc_f,   &tms340x0_device::cmovcm_f,   &tms340x0_device::cmovcm_f,   &tms340x0_device::cmovcm_b,   &tms340x0_device::cmovcm_b,   &tms340x0_device::cmovmc_f_va,&tms340x0_device::cmovmc_f_vb,
	35	/* 0x0700 */
	36	&tms340x0_device::sext1_a,    &tms340x0_device::sext1_b,    &tms340x0_device::zext1_a,    &tms340x0_device::zext1_b,    &tms340x0_device::setf1,      &tms340x0_device::setf1,      &tms340x0_device::setf1,      &tms340x0_device::setf1,
	37	&tms340x0_device::move1_ra_a, &tms340x0_device::move1_ra_b, &tms340x0_device::move1_ar_a, &tms340x0_device::move1_ar_b, &tms340x0_device::move1_aa,   &tms340x0_device::unimpl,     &tms340x0_device::movb_ar_a,  &tms340x0_device::movb_ar_b,
	38	/* 0x0800 */
	39	&tms340x0_device::trapl,      &tms340x0_device::unimpl,     &tms340x0_device::cmovmc_b,   &tms340x0_device::cmovmc_b,   &tms340x0_device::unimpl,     &tms340x0_device::vblt_b_l,   &tms340x0_device::retm,       &tms340x0_device::unimpl,
	40	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::clip,
	41	/* 0x0900 */
	42	&tms340x0_device::trap,       &tms340x0_device::trap,       &tms340x0_device::call_a,     &tms340x0_device::call_b,     &tms340x0_device::reti,       &tms340x0_device::unimpl,     &tms340x0_device::rets,       &tms340x0_device::rets,
	43	&tms340x0_device::mmtm_a,     &tms340x0_device::mmtm_b,     &tms340x0_device::mmfm_a,     &tms340x0_device::mmfm_b,     &tms340x0_device::movi_w_a,   &tms340x0_device::movi_w_b,   &tms340x0_device::movi_l_a,   &tms340x0_device::movi_l_b,
	44	/* 0x0a00 */
	45	&tms340x0_device::vlcol,      &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::pfill_xy,   &tms340x0_device::unimpl,     &tms340x0_device::vfill_l,    &tms340x0_device::cvmxyl_a,   &tms340x0_device::cvmxyl_b,
	46	&tms340x0_device::cvdxyl_a,   &tms340x0_device::cvdxyl_b,   &tms340x0_device::unimpl,     &tms340x0_device::fpixeq,     &tms340x0_device::unimpl,     &tms340x0_device::fpixne,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	47	/* 0x0b00 */
	48	&tms340x0_device::addi_w_a,   &tms340x0_device::addi_w_b,   &tms340x0_device::addi_l_a,   &tms340x0_device::addi_l_b,   &tms340x0_device::cmpi_w_a,   &tms340x0_device::cmpi_w_b,   &tms340x0_device::cmpi_l_a,   &tms340x0_device::cmpi_l_b,
	49	&tms340x0_device::andi_a,     &tms340x0_device::andi_b,     &tms340x0_device::ori_a,      &tms340x0_device::ori_b,      &tms340x0_device::xori_a,     &tms340x0_device::xori_b,     &tms340x0_device::subi_w_a,   &tms340x0_device::subi_w_b,
	50	/* 0x0c00 */
	51	&tms340x0_device::addxyi_a,   &tms340x0_device::addxyi_b,   &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::linit,      &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	52	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	53	/* 0x0d00 */
	54	&tms340x0_device::subi_l_a,   &tms340x0_device::subi_l_b,   &tms340x0_device::unimpl,     &tms340x0_device::callr,      &tms340x0_device::unimpl,     &tms340x0_device::calla,      &tms340x0_device::eint,       &tms340x0_device::unimpl,
	55	&tms340x0_device::dsj_a,      &tms340x0_device::dsj_b,      &tms340x0_device::dsjeq_a,    &tms340x0_device::dsjeq_b,    &tms340x0_device::dsjne_a,    &tms340x0_device::dsjne_b,    &tms340x0_device::setc,       &tms340x0_device::unimpl,
	56	/* 0x0e00 */
	57	&tms340x0_device::unimpl,     &tms340x0_device::pixblt_l_m_l,&tms340x0_device::unimpl,    &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	58	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::tfill_xy,
	59	/* 0x0f00 */
	60	&tms340x0_device::pixblt_l_l, &tms340x0_device::unimpl,     &tms340x0_device::pixblt_l_xy,&tms340x0_device::unimpl,     &tms340x0_device::pixblt_xy_l,&tms340x0_device::unimpl,     &tms340x0_device::pixblt_xy_xy,&tms340x0_device::unimpl,
	61	&tms340x0_device::pixblt_b_l, &tms340x0_device::unimpl,     &tms340x0_device::pixblt_b_xy,&tms340x0_device::unimpl,     &tms340x0_device::fill_l,     &tms340x0_device::unimpl,     &tms340x0_device::fill_xy,    &tms340x0_device::unimpl,
	62	/* 0x1000 */
	63	&tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,
	64	&tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,
	65	/* 0x1100 */
	66	&tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,
	67	&tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,
	68	/* 0x1200 */
	69	&tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,
	70	&tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,
	71	/* 0x1300 */
	72	&tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,
	73	&tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,     &tms340x0_device::addk_a,     &tms340x0_device::addk_b,
	74	/* 0x1400 */
	75	&tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,
	76	&tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,
	77	/* 0x1500 */
	78	&tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,
	79	&tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,
	80	/* 0x1600 */
	81	&tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,
	82	&tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,
	83	/* 0x1700 */
	84	&tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,
	85	&tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,     &tms340x0_device::subk_a,     &tms340x0_device::subk_b,
	86	/* 0x1800 */
	87	&tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,
	88	&tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,
	89	/* 0x1900 */
	90	&tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,
	91	&tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,
	92	/* 0x1a00 */
	93	&tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,
	94	&tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,
	95	/* 0x1b00 */
	96	&tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,
	97	&tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,     &tms340x0_device::movk_a,     &tms340x0_device::movk_b,
	98	/* 0x1c00 */
	99	&tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,
	100	&tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,
	101	/* 0x1d00 */
	102	&tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,
	103	&tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,
	104	/* 0x1e00 */
	105	&tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,
	106	&tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,
	107	/* 0x1f00 */
	108	&tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,
	109	&tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,   &tms340x0_device::btst_k_a,   &tms340x0_device::btst_k_b,
	110	/* 0x2000 */
	111	&tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,
	112	&tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,
	113	/* 0x2100 */
	114	&tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,
	115	&tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,
	116	/* 0x2200 */
	117	&tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,
	118	&tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,
	119	/* 0x2300 */
	120	&tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,
	121	&tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,    &tms340x0_device::sla_k_a,    &tms340x0_device::sla_k_b,
	122	/* 0x2400 */
	123	&tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,
	124	&tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,
	125	/* 0x2500 */
	126	&tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,
	127	&tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,
	128	/* 0x2600 */
	129	&tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,
	130	&tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,
	131	/* 0x2700 */
	132	&tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,
	133	&tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,    &tms340x0_device::sll_k_a,    &tms340x0_device::sll_k_b,
	134	/* 0x2800 */
	135	&tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,
	136	&tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,
	137	/* 0x2900 */
	138	&tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,
	139	&tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,
	140	/* 0x2a00 */
	141	&tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,
	142	&tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,
	143	/* 0x2b00 */
	144	&tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,
	145	&tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,    &tms340x0_device::sra_k_a,    &tms340x0_device::sra_k_b,
	146	/* 0x2c00 */
	147	&tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,
	148	&tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,
	149	/* 0x2d00 */
	150	&tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,
	151	&tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,
	152	/* 0x2e00 */
	153	&tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,
	154	&tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,
	155	/* 0x2f00 */
	156	&tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,
	157	&tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,    &tms340x0_device::srl_k_a,    &tms340x0_device::srl_k_b,
	158	/* 0x3000 */
	159	&tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,
	160	&tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,
	161	/* 0x3100 */
	162	&tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,
	163	&tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,
	164	/* 0x3200 */
	165	&tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,
	166	&tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,
	167	/* 0x3300 */
	168	&tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,
	169	&tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,     &tms340x0_device::rl_k_a,     &tms340x0_device::rl_k_b,
	170	/* 0x3400 */
	171	&tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,
	172	&tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,
	173	/* 0x3500 */
	174	&tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,
	175	&tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,
	176	/* 0x3600 */
	177	&tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,
	178	&tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,
	179	/* 0x3700 */
	180	&tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,
	181	&tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,    &tms340x0_device::cmp_k_a,    &tms340x0_device::cmp_k_b,
	182	/* 0x3800 */
	183	&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
	184	&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
	185	/* 0x3900 */
	186	&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
	187	&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
	188	/* 0x3a00 */
	189	&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
	190	&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
	191	/* 0x3b00 */
	192	&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
	193	&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
	194	/* 0x3c00 */
	195	&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
	196	&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
	197	/* 0x3d00 */
	198	&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
	199	&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
	200	/* 0x3e00 */
	201	&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
	202	&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
	203	/* 0x3f00 */
	204	&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
	205	&tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,     &tms340x0_device::dsjs_a,     &tms340x0_device::dsjs_b,
	206	/* 0x4000 */
	207	&tms340x0_device::add_a,      &tms340x0_device::add_b,      &tms340x0_device::add_a,      &tms340x0_device::add_b,      &tms340x0_device::add_a,      &tms340x0_device::add_b,      &tms340x0_device::add_a,      &tms340x0_device::add_b,
	208	&tms340x0_device::add_a,      &tms340x0_device::add_b,      &tms340x0_device::add_a,      &tms340x0_device::add_b,      &tms340x0_device::add_a,      &tms340x0_device::add_b,      &tms340x0_device::add_a,      &tms340x0_device::add_b,
	209	/* 0x4100 */
	210	&tms340x0_device::add_a,      &tms340x0_device::add_b,      &tms340x0_device::add_a,      &tms340x0_device::add_b,      &tms340x0_device::add_a,      &tms340x0_device::add_b,      &tms340x0_device::add_a,      &tms340x0_device::add_b,
	211	&tms340x0_device::add_a,      &tms340x0_device::add_b,      &tms340x0_device::add_a,      &tms340x0_device::add_b,      &tms340x0_device::add_a,      &tms340x0_device::add_b,      &tms340x0_device::add_a,      &tms340x0_device::add_b,
	212	/* 0x4200 */
	213	&tms340x0_device::addc_a,     &tms340x0_device::addc_b,     &tms340x0_device::addc_a,     &tms340x0_device::addc_b,     &tms340x0_device::addc_a,     &tms340x0_device::addc_b,     &tms340x0_device::addc_a,     &tms340x0_device::addc_b,
	214	&tms340x0_device::addc_a,     &tms340x0_device::addc_b,     &tms340x0_device::addc_a,     &tms340x0_device::addc_b,     &tms340x0_device::addc_a,     &tms340x0_device::addc_b,     &tms340x0_device::addc_a,     &tms340x0_device::addc_b,
	215	/* 0x4300 */
	216	&tms340x0_device::addc_a,     &tms340x0_device::addc_b,     &tms340x0_device::addc_a,     &tms340x0_device::addc_b,     &tms340x0_device::addc_a,     &tms340x0_device::addc_b,     &tms340x0_device::addc_a,     &tms340x0_device::addc_b,
	217	&tms340x0_device::addc_a,     &tms340x0_device::addc_b,     &tms340x0_device::addc_a,     &tms340x0_device::addc_b,     &tms340x0_device::addc_a,     &tms340x0_device::addc_b,     &tms340x0_device::addc_a,     &tms340x0_device::addc_b,
	218	/* 0x4400 */
	219	&tms340x0_device::sub_a,      &tms340x0_device::sub_b,      &tms340x0_device::sub_a,      &tms340x0_device::sub_b,      &tms340x0_device::sub_a,      &tms340x0_device::sub_b,      &tms340x0_device::sub_a,      &tms340x0_device::sub_b,
	220	&tms340x0_device::sub_a,      &tms340x0_device::sub_b,      &tms340x0_device::sub_a,      &tms340x0_device::sub_b,      &tms340x0_device::sub_a,      &tms340x0_device::sub_b,      &tms340x0_device::sub_a,      &tms340x0_device::sub_b,
	221	/* 0x4500 */
	222	&tms340x0_device::sub_a,      &tms340x0_device::sub_b,      &tms340x0_device::sub_a,      &tms340x0_device::sub_b,      &tms340x0_device::sub_a,      &tms340x0_device::sub_b,      &tms340x0_device::sub_a,      &tms340x0_device::sub_b,
	223	&tms340x0_device::sub_a,      &tms340x0_device::sub_b,      &tms340x0_device::sub_a,      &tms340x0_device::sub_b,      &tms340x0_device::sub_a,      &tms340x0_device::sub_b,      &tms340x0_device::sub_a,      &tms340x0_device::sub_b,
	224	/* 0x4600 */
	225	&tms340x0_device::subb_a,     &tms340x0_device::subb_b,     &tms340x0_device::subb_a,     &tms340x0_device::subb_b,     &tms340x0_device::subb_a,     &tms340x0_device::subb_b,     &tms340x0_device::subb_a,     &tms340x0_device::subb_b,
	226	&tms340x0_device::subb_a,     &tms340x0_device::subb_b,     &tms340x0_device::subb_a,     &tms340x0_device::subb_b,     &tms340x0_device::subb_a,     &tms340x0_device::subb_b,     &tms340x0_device::subb_a,     &tms340x0_device::subb_b,
	227	/* 0x4700 */
	228	&tms340x0_device::subb_a,     &tms340x0_device::subb_b,     &tms340x0_device::subb_a,     &tms340x0_device::subb_b,     &tms340x0_device::subb_a,     &tms340x0_device::subb_b,     &tms340x0_device::subb_a,     &tms340x0_device::subb_b,
	229	&tms340x0_device::subb_a,     &tms340x0_device::subb_b,     &tms340x0_device::subb_a,     &tms340x0_device::subb_b,     &tms340x0_device::subb_a,     &tms340x0_device::subb_b,     &tms340x0_device::subb_a,     &tms340x0_device::subb_b,
	230	/* 0x4800 */
	231	&tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,      &tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,      &tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,      &tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,
	232	&tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,      &tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,      &tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,      &tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,
	233	/* 0x4900 */
	234	&tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,      &tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,      &tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,      &tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,
	235	&tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,      &tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,      &tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,      &tms340x0_device::cmp_a,      &tms340x0_device::cmp_b,
	236	/* 0x4a00 */
	237	&tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,   &tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,   &tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,   &tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,
	238	&tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,   &tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,   &tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,   &tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,
	239	/* 0x4b00 */
	240	&tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,   &tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,   &tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,   &tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,
	241	&tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,   &tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,   &tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,   &tms340x0_device::btst_r_a,   &tms340x0_device::btst_r_b,
	242	/* 0x4c00 */
	243	&tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,  &tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,  &tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,  &tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,
	244	&tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,  &tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,  &tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,  &tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,
	245	/* 0x4d00 */
	246	&tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,  &tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,  &tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,  &tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,
	247	&tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,  &tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,  &tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,  &tms340x0_device::move_rr_a,  &tms340x0_device::move_rr_b,
	248	/* 0x4e00 */
	249	&tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx,
	250	&tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx,
	251	/* 0x4f00 */
	252	&tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx,
	253	&tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx,
	254	/* 0x5000 */
	255	&tms340x0_device::and_a,      &tms340x0_device::and_b,      &tms340x0_device::and_a,      &tms340x0_device::and_b,      &tms340x0_device::and_a,      &tms340x0_device::and_b,      &tms340x0_device::and_a,      &tms340x0_device::and_b,
	256	&tms340x0_device::and_a,      &tms340x0_device::and_b,      &tms340x0_device::and_a,      &tms340x0_device::and_b,      &tms340x0_device::and_a,      &tms340x0_device::and_b,      &tms340x0_device::and_a,      &tms340x0_device::and_b,
	257	/* 0x5100 */
	258	&tms340x0_device::and_a,      &tms340x0_device::and_b,      &tms340x0_device::and_a,      &tms340x0_device::and_b,      &tms340x0_device::and_a,      &tms340x0_device::and_b,      &tms340x0_device::and_a,      &tms340x0_device::and_b,
	259	&tms340x0_device::and_a,      &tms340x0_device::and_b,      &tms340x0_device::and_a,      &tms340x0_device::and_b,      &tms340x0_device::and_a,      &tms340x0_device::and_b,      &tms340x0_device::and_a,      &tms340x0_device::and_b,
	260	/* 0x5200 */
	261	&tms340x0_device::andn_a,     &tms340x0_device::andn_b,     &tms340x0_device::andn_a,     &tms340x0_device::andn_b,     &tms340x0_device::andn_a,     &tms340x0_device::andn_b,     &tms340x0_device::andn_a,     &tms340x0_device::andn_b,
	262	&tms340x0_device::andn_a,     &tms340x0_device::andn_b,     &tms340x0_device::andn_a,     &tms340x0_device::andn_b,     &tms340x0_device::andn_a,     &tms340x0_device::andn_b,     &tms340x0_device::andn_a,     &tms340x0_device::andn_b,
	263	/* 0x5300 */
	264	&tms340x0_device::andn_a,     &tms340x0_device::andn_b,     &tms340x0_device::andn_a,     &tms340x0_device::andn_b,     &tms340x0_device::andn_a,     &tms340x0_device::andn_b,     &tms340x0_device::andn_a,     &tms340x0_device::andn_b,
	265	&tms340x0_device::andn_a,     &tms340x0_device::andn_b,     &tms340x0_device::andn_a,     &tms340x0_device::andn_b,     &tms340x0_device::andn_a,     &tms340x0_device::andn_b,     &tms340x0_device::andn_a,     &tms340x0_device::andn_b,
	266	/* 0x5400 */
	267	&tms340x0_device::or_a,       &tms340x0_device::or_b,       &tms340x0_device::or_a,       &tms340x0_device::or_b,       &tms340x0_device::or_a,       &tms340x0_device::or_b,       &tms340x0_device::or_a,       &tms340x0_device::or_b,
	268	&tms340x0_device::or_a,       &tms340x0_device::or_b,       &tms340x0_device::or_a,       &tms340x0_device::or_b,       &tms340x0_device::or_a,       &tms340x0_device::or_b,       &tms340x0_device::or_a,       &tms340x0_device::or_b,
	269	/* 0x5500 */
	270	&tms340x0_device::or_a,       &tms340x0_device::or_b,       &tms340x0_device::or_a,       &tms340x0_device::or_b,       &tms340x0_device::or_a,       &tms340x0_device::or_b,       &tms340x0_device::or_a,       &tms340x0_device::or_b,
	271	&tms340x0_device::or_a,       &tms340x0_device::or_b,       &tms340x0_device::or_a,       &tms340x0_device::or_b,       &tms340x0_device::or_a,       &tms340x0_device::or_b,       &tms340x0_device::or_a,       &tms340x0_device::or_b,
	272	/* 0x5600 */
	273	&tms340x0_device::xor_a,      &tms340x0_device::xor_b,      &tms340x0_device::xor_a,      &tms340x0_device::xor_b,      &tms340x0_device::xor_a,      &tms340x0_device::xor_b,      &tms340x0_device::xor_a,      &tms340x0_device::xor_b,
	274	&tms340x0_device::xor_a,      &tms340x0_device::xor_b,      &tms340x0_device::xor_a,      &tms340x0_device::xor_b,      &tms340x0_device::xor_a,      &tms340x0_device::xor_b,      &tms340x0_device::xor_a,      &tms340x0_device::xor_b,
	275	/* 0x5700 */
	276	&tms340x0_device::xor_a,      &tms340x0_device::xor_b,      &tms340x0_device::xor_a,      &tms340x0_device::xor_b,      &tms340x0_device::xor_a,      &tms340x0_device::xor_b,      &tms340x0_device::xor_a,      &tms340x0_device::xor_b,
	277	&tms340x0_device::xor_a,      &tms340x0_device::xor_b,      &tms340x0_device::xor_a,      &tms340x0_device::xor_b,      &tms340x0_device::xor_a,      &tms340x0_device::xor_b,      &tms340x0_device::xor_a,      &tms340x0_device::xor_b,
	278	/* 0x5800 */
	279	&tms340x0_device::divs_a,     &tms340x0_device::divs_b,     &tms340x0_device::divs_a,     &tms340x0_device::divs_b,     &tms340x0_device::divs_a,     &tms340x0_device::divs_b,     &tms340x0_device::divs_a,     &tms340x0_device::divs_b,
	280	&tms340x0_device::divs_a,     &tms340x0_device::divs_b,     &tms340x0_device::divs_a,     &tms340x0_device::divs_b,     &tms340x0_device::divs_a,     &tms340x0_device::divs_b,     &tms340x0_device::divs_a,     &tms340x0_device::divs_b,
	281	/* 0x5900 */
	282	&tms340x0_device::divs_a,     &tms340x0_device::divs_b,     &tms340x0_device::divs_a,     &tms340x0_device::divs_b,     &tms340x0_device::divs_a,     &tms340x0_device::divs_b,     &tms340x0_device::divs_a,     &tms340x0_device::divs_b,
	283	&tms340x0_device::divs_a,     &tms340x0_device::divs_b,     &tms340x0_device::divs_a,     &tms340x0_device::divs_b,     &tms340x0_device::divs_a,     &tms340x0_device::divs_b,     &tms340x0_device::divs_a,     &tms340x0_device::divs_b,
	284	/* 0x5a00 */
	285	&tms340x0_device::divu_a,     &tms340x0_device::divu_b,     &tms340x0_device::divu_a,     &tms340x0_device::divu_b,     &tms340x0_device::divu_a,     &tms340x0_device::divu_b,     &tms340x0_device::divu_a,     &tms340x0_device::divu_b,
	286	&tms340x0_device::divu_a,     &tms340x0_device::divu_b,     &tms340x0_device::divu_a,     &tms340x0_device::divu_b,     &tms340x0_device::divu_a,     &tms340x0_device::divu_b,     &tms340x0_device::divu_a,     &tms340x0_device::divu_b,
	287	/* 0x5b00 */
	288	&tms340x0_device::divu_a,     &tms340x0_device::divu_b,     &tms340x0_device::divu_a,     &tms340x0_device::divu_b,     &tms340x0_device::divu_a,     &tms340x0_device::divu_b,     &tms340x0_device::divu_a,     &tms340x0_device::divu_b,
	289	&tms340x0_device::divu_a,     &tms340x0_device::divu_b,     &tms340x0_device::divu_a,     &tms340x0_device::divu_b,     &tms340x0_device::divu_a,     &tms340x0_device::divu_b,     &tms340x0_device::divu_a,     &tms340x0_device::divu_b,
	290	/* 0x5c00 */
	291	&tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,     &tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,     &tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,     &tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,
	292	&tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,     &tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,     &tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,     &tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,
	293	/* 0x5d00 */
	294	&tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,     &tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,     &tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,     &tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,
	295	&tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,     &tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,     &tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,     &tms340x0_device::mpys_a,     &tms340x0_device::mpys_b,
	296	/* 0x5e00 */
	297	&tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,     &tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,     &tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,     &tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,
	298	&tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,     &tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,     &tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,     &tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,
	299	/* 0x5f00 */
	300	&tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,     &tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,     &tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,     &tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,
	301	&tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,     &tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,     &tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,     &tms340x0_device::mpyu_a,     &tms340x0_device::mpyu_b,
	302	/* 0x6000 */
	303	&tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,    &tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,    &tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,    &tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,
	304	&tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,    &tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,    &tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,    &tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,
	305	/* 0x6100 */
	306	&tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,    &tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,    &tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,    &tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,
	307	&tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,    &tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,    &tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,    &tms340x0_device::sla_r_a,    &tms340x0_device::sla_r_b,
	308	/* 0x6200 */
	309	&tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,    &tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,    &tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,    &tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,
	310	&tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,    &tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,    &tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,    &tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,
	311	/* 0x6300 */
	312	&tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,    &tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,    &tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,    &tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,
	313	&tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,    &tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,    &tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,    &tms340x0_device::sll_r_a,    &tms340x0_device::sll_r_b,
	314	/* 0x6400 */
	315	&tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,    &tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,    &tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,    &tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,
	316	&tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,    &tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,    &tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,    &tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,
	317	/* 0x6500 */
	318	&tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,    &tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,    &tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,    &tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,
	319	&tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,    &tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,    &tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,    &tms340x0_device::sra_r_a,    &tms340x0_device::sra_r_b,
	320	/* 0x6600 */
	321	&tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,    &tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,    &tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,    &tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,
	322	&tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,    &tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,    &tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,    &tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,
	323	/* 0x6700 */
	324	&tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,    &tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,    &tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,    &tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,
	325	&tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,    &tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,    &tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,    &tms340x0_device::srl_r_a,    &tms340x0_device::srl_r_b,
	326	/* 0x6800 */
	327	&tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,     &tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,     &tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,     &tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,
	328	&tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,     &tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,     &tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,     &tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,
	329	/* 0x6900 */
	330	&tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,     &tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,     &tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,     &tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,
	331	&tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,     &tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,     &tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,     &tms340x0_device::rl_r_a,     &tms340x0_device::rl_r_b,
	332	/* 0x6a00 */
	333	&tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,      &tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,      &tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,      &tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,
	334	&tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,      &tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,      &tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,      &tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,
	335	/* 0x6b00 */
	336	&tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,      &tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,      &tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,      &tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,
	337	&tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,      &tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,      &tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,      &tms340x0_device::lmo_a,      &tms340x0_device::lmo_b,
	338	/* 0x6c00 */
	339	&tms340x0_device::mods_a,     &tms340x0_device::mods_b,     &tms340x0_device::mods_a,     &tms340x0_device::mods_b,     &tms340x0_device::mods_a,     &tms340x0_device::mods_b,     &tms340x0_device::mods_a,     &tms340x0_device::mods_b,
	340	&tms340x0_device::mods_a,     &tms340x0_device::mods_b,     &tms340x0_device::mods_a,     &tms340x0_device::mods_b,     &tms340x0_device::mods_a,     &tms340x0_device::mods_b,     &tms340x0_device::mods_a,     &tms340x0_device::mods_b,
	341	/* 0x6d00 */
	342	&tms340x0_device::mods_a,     &tms340x0_device::mods_b,     &tms340x0_device::mods_a,     &tms340x0_device::mods_b,     &tms340x0_device::mods_a,     &tms340x0_device::mods_b,     &tms340x0_device::mods_a,     &tms340x0_device::mods_b,
	343	&tms340x0_device::mods_a,     &tms340x0_device::mods_b,     &tms340x0_device::mods_a,     &tms340x0_device::mods_b,     &tms340x0_device::mods_a,     &tms340x0_device::mods_b,     &tms340x0_device::mods_a,     &tms340x0_device::mods_b,
	344	/* 0x6e00 */
	345	&tms340x0_device::modu_a,     &tms340x0_device::modu_b,     &tms340x0_device::modu_a,     &tms340x0_device::modu_b,     &tms340x0_device::modu_a,     &tms340x0_device::modu_b,     &tms340x0_device::modu_a,     &tms340x0_device::modu_b,
	346	&tms340x0_device::modu_a,     &tms340x0_device::modu_b,     &tms340x0_device::modu_a,     &tms340x0_device::modu_b,     &tms340x0_device::modu_a,     &tms340x0_device::modu_b,     &tms340x0_device::modu_a,     &tms340x0_device::modu_b,
	347	/* 0x6f00 */
	348	&tms340x0_device::modu_a,     &tms340x0_device::modu_b,     &tms340x0_device::modu_a,     &tms340x0_device::modu_b,     &tms340x0_device::modu_a,     &tms340x0_device::modu_b,     &tms340x0_device::modu_a,     &tms340x0_device::modu_b,
	349	&tms340x0_device::modu_a,     &tms340x0_device::modu_b,     &tms340x0_device::modu_a,     &tms340x0_device::modu_b,     &tms340x0_device::modu_a,     &tms340x0_device::modu_b,     &tms340x0_device::modu_a,     &tms340x0_device::modu_b,
	350	/* 0x7000 */
	351	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	352	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	353	/* 0x7100 */
	354	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	355	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	356	/* 0x7200 */
	357	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	358	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	359	/* 0x7300 */
	360	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	361	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	362	/* 0x7400 */
	363	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	364	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	365	/* 0x7500 */
	366	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	367	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	368	/* 0x7600 */
	369	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	370	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	371	/* 0x7700 */
	372	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	373	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	374	/* 0x7800 */
	375	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	376	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	377	/* 0x7900 */
	378	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	379	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	380	/* 0x7a00 */
	381	&tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,      &tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,      &tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,      &tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,
	382	&tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,      &tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,      &tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,      &tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,
	383	/* 0x7b00 */
	384	&tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,      &tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,      &tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,      &tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,
	385	&tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,      &tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,      &tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,      &tms340x0_device::rmo_a,      &tms340x0_device::rmo_b,
	386	/* 0x7c00 */
	387	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	388	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	389	/* 0x7d00 */
	390	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	391	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	392	/* 0x7e00 */
	393	&tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,    &tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,    &tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,    &tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,
	394	&tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,    &tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,    &tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,    &tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,
	395	/* 0x7f00 */
	396	&tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,    &tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,    &tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,    &tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,
	397	&tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,    &tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,    &tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,    &tms340x0_device::swapf_a,    &tms340x0_device::swapf_b,
	398	/* 0x8000 */
	399	&tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b,
	400	&tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b,
	401	/* 0x8100 */
	402	&tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b,
	403	&tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b,
	404	/* 0x8200 */
	405	&tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b,
	406	&tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b,
	407	/* 0x8300 */
	408	&tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b,
	409	&tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b,
	410	/* 0x8400 */
	411	&tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b,
	412	&tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b,
	413	/* 0x8500 */
	414	&tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b,
	415	&tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b,
	416	/* 0x8600 */
	417	&tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b,
	418	&tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b,
	419	/* 0x8700 */
	420	&tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b,
	421	&tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b,
	422	/* 0x8800 */
	423	&tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b,
	424	&tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b,
	425	/* 0x8900 */
	426	&tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b,
	427	&tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b,
	428	/* 0x8a00 */
	429	&tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b,
	430	&tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b,
	431	/* 0x8b00 */
	432	&tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b,
	433	&tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b,
	434	/* 0x8c00 */
	435	&tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,  &tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,  &tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,  &tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,
	436	&tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,  &tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,  &tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,  &tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,
	437	/* 0x8d00 */
	438	&tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,  &tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,  &tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,  &tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,
	439	&tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,  &tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,  &tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,  &tms340x0_device::movb_rn_a,  &tms340x0_device::movb_rn_b,
	440	/* 0x8e00 */
	441	&tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,  &tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,  &tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,  &tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,
	442	&tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,  &tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,  &tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,  &tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,
	443	/* 0x8f00 */
	444	&tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,  &tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,  &tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,  &tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,
	445	&tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,  &tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,  &tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,  &tms340x0_device::movb_nr_a,  &tms340x0_device::movb_nr_b,
	446	/* 0x9000 */
	447	&tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,   &tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,   &tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,   &tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,
	448	&tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,   &tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,   &tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,   &tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,
	449	/* 0x9100 */
	450	&tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,   &tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,   &tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,   &tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,
	451	&tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,   &tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,   &tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,   &tms340x0_device::move0_r_ni_a,   &tms340x0_device::move0_r_ni_b,
	452	/* 0x9200 */
	453	&tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,   &tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,   &tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,   &tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,
	454	&tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,   &tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,   &tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,   &tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,
	455	/* 0x9300 */
	456	&tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,   &tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,   &tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,   &tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,
	457	&tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,   &tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,   &tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,   &tms340x0_device::move1_r_ni_a,   &tms340x0_device::move1_r_ni_b,
	458	/* 0x9400 */
	459	&tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,   &tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,   &tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,   &tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,
	460	&tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,   &tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,   &tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,   &tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,
	461	/* 0x9500 */
	462	&tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,   &tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,   &tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,   &tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,
	463	&tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,   &tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,   &tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,   &tms340x0_device::move0_ni_r_a,   &tms340x0_device::move0_ni_r_b,
	464	/* 0x9600 */
	465	&tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,   &tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,   &tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,   &tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,
	466	&tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,   &tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,   &tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,   &tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,
	467	/* 0x9700 */
	468	&tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,   &tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,   &tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,   &tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,
	469	&tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,   &tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,   &tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,   &tms340x0_device::move1_ni_r_a,   &tms340x0_device::move1_ni_r_b,
	470	/* 0x9800 */
	471	&tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,  &tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,  &tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,  &tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,
	472	&tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,  &tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,  &tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,  &tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,
	473	/* 0x9900 */
	474	&tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,  &tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,  &tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,  &tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,
	475	&tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,  &tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,  &tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,  &tms340x0_device::move0_ni_ni_a,  &tms340x0_device::move0_ni_ni_b,
	476	/* 0x9a00 */
	477	&tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,  &tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,  &tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,  &tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,
	478	&tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,  &tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,  &tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,  &tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,
	479	/* 0x9b00 */
	480	&tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,  &tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,  &tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,  &tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,
	481	&tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,  &tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,  &tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,  &tms340x0_device::move1_ni_ni_a,  &tms340x0_device::move1_ni_ni_b,
	482	/* 0x9c00 */
	483	&tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,  &tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,  &tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,  &tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,
	484	&tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,  &tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,  &tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,  &tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,
	485	/* 0x9d00 */
	486	&tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,  &tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,  &tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,  &tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,
	487	&tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,  &tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,  &tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,  &tms340x0_device::movb_nn_a,  &tms340x0_device::movb_nn_b,
	488	/* 0x9e00 */
	489	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	490	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	491	/* 0x9f00 */
	492	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	493	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	494	/* 0xa000 */
	495	&tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,   &tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,   &tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,   &tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,
	496	&tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,   &tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,   &tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,   &tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,
	497	/* 0xa100 */
	498	&tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,   &tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,   &tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,   &tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,
	499	&tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,   &tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,   &tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,   &tms340x0_device::move0_r_dn_a,   &tms340x0_device::move0_r_dn_b,
	500	/* 0xa200 */
	501	&tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,   &tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,   &tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,   &tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,
	502	&tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,   &tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,   &tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,   &tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,
	503	/* 0xa300 */
	504	&tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,   &tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,   &tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,   &tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,
	505	&tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,   &tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,   &tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,   &tms340x0_device::move1_r_dn_a,   &tms340x0_device::move1_r_dn_b,
	506	/* 0xa400 */
	507	&tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,   &tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,   &tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,   &tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,
	508	&tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,   &tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,   &tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,   &tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,
	509	/* 0xa500 */
	510	&tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,   &tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,   &tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,   &tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,
	511	&tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,   &tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,   &tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,   &tms340x0_device::move0_dn_r_a,   &tms340x0_device::move0_dn_r_b,
	512	/* 0xa600 */
	513	&tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,   &tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,   &tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,   &tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,
	514	&tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,   &tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,   &tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,   &tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,
	515	/* 0xa700 */
	516	&tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,   &tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,   &tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,   &tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,
	517	&tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,   &tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,   &tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,   &tms340x0_device::move1_dn_r_a,   &tms340x0_device::move1_dn_r_b,
	518	/* 0xa800 */
	519	&tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,  &tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,  &tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,  &tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,
	520	&tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,  &tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,  &tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,  &tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,
	521	/* 0xa900 */
	522	&tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,  &tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,  &tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,  &tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,
	523	&tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,  &tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,  &tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,  &tms340x0_device::move0_dn_dn_a,  &tms340x0_device::move0_dn_dn_b,
	524	/* 0xaa00 */
	525	&tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,  &tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,  &tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,  &tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,
	526	&tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,  &tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,  &tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,  &tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,
	527	/* 0xab00 */
	528	&tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,  &tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,  &tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,  &tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,
	529	&tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,  &tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,  &tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,  &tms340x0_device::move1_dn_dn_a,  &tms340x0_device::move1_dn_dn_b,
	530	/* 0xac00 */
	531	&tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,    &tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,    &tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,    &tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,
	532	&tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,    &tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,    &tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,    &tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,
	533	/* 0xad00 */
	534	&tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,    &tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,    &tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,    &tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,
	535	&tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,    &tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,    &tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,    &tms340x0_device::movb_r_no_a,    &tms340x0_device::movb_r_no_b,
	536	/* 0xae00 */
	537	&tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,    &tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,    &tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,    &tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,
	538	&tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,    &tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,    &tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,    &tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,
	539	/* 0xaf00 */
	540	&tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,    &tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,    &tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,    &tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,
	541	&tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,    &tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,    &tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,    &tms340x0_device::movb_no_r_a,    &tms340x0_device::movb_no_r_b,
	542	/* 0xb000 */
	543	&tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,   &tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,   &tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,   &tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,
	544	&tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,   &tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,   &tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,   &tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,
	545	/* 0xb100 */
	546	&tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,   &tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,   &tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,   &tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,
	547	&tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,   &tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,   &tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,   &tms340x0_device::move0_r_no_a,   &tms340x0_device::move0_r_no_b,
	548	/* 0xb200 */
	549	&tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,   &tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,   &tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,   &tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,
	550	&tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,   &tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,   &tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,   &tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,
	551	/* 0xb300 */
	552	&tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,   &tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,   &tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,   &tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,
	553	&tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,   &tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,   &tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,   &tms340x0_device::move1_r_no_a,   &tms340x0_device::move1_r_no_b,
	554	/* 0xb400 */
	555	&tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,   &tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,   &tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,   &tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,
	556	&tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,   &tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,   &tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,   &tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,
	557	/* 0xb500 */
	558	&tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,   &tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,   &tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,   &tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,
	559	&tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,   &tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,   &tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,   &tms340x0_device::move0_no_r_a,   &tms340x0_device::move0_no_r_b,
	560	/* 0xb600 */
	561	&tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,   &tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,   &tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,   &tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,
	562	&tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,   &tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,   &tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,   &tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,
	563	/* 0xb700 */
	564	&tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,   &tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,   &tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,   &tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,
	565	&tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,   &tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,   &tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,   &tms340x0_device::move1_no_r_a,   &tms340x0_device::move1_no_r_b,
	566	/* 0xb800 */
	567	&tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,  &tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,  &tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,  &tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,
	568	&tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,  &tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,  &tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,  &tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,
	569	/* 0xb900 */
	570	&tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,  &tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,  &tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,  &tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,
	571	&tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,  &tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,  &tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,  &tms340x0_device::move0_no_no_a,  &tms340x0_device::move0_no_no_b,
	572	/* 0xba00 */
	573	&tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,  &tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,  &tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,  &tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,
	574	&tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,  &tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,  &tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,  &tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,
	575	/* 0xbb00 */
	576	&tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,  &tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,  &tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,  &tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,
	577	&tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,  &tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,  &tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,  &tms340x0_device::move1_no_no_a,  &tms340x0_device::move1_no_no_b,
	578	/* 0xbc00 */
	579	&tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,   &tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,   &tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,   &tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,
	580	&tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,   &tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,   &tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,   &tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,
	581	/* 0xbd00 */
	582	&tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,   &tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,   &tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,   &tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,
	583	&tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,   &tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,   &tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,   &tms340x0_device::movb_no_no_a,   &tms340x0_device::movb_no_no_b,
	584	/* 0xbe00 */
	585	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	586	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	587	/* 0xbf00 */
	588	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	589	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	590	/* 0xc000 */
	591	&tms340x0_device::j_UC_0,     &tms340x0_device::j_UC_x,     &tms340x0_device::j_UC_x,     &tms340x0_device::j_UC_x,     &tms340x0_device::j_UC_x,     &tms340x0_device::j_UC_x,     &tms340x0_device::j_UC_x,     &tms340x0_device::j_UC_x,
	592	&tms340x0_device::j_UC_8,     &tms340x0_device::j_UC_x,     &tms340x0_device::j_UC_x,     &tms340x0_device::j_UC_x,     &tms340x0_device::j_UC_x,     &tms340x0_device::j_UC_x,     &tms340x0_device::j_UC_x,     &tms340x0_device::j_UC_x,
	593	/* 0xc100 */
	594	&tms340x0_device::j_P_0,      &tms340x0_device::j_P_x,      &tms340x0_device::j_P_x,      &tms340x0_device::j_P_x,      &tms340x0_device::j_P_x,      &tms340x0_device::j_P_x,      &tms340x0_device::j_P_x,      &tms340x0_device::j_P_x,
	595	&tms340x0_device::j_P_8,      &tms340x0_device::j_P_x,      &tms340x0_device::j_P_x,      &tms340x0_device::j_P_x,      &tms340x0_device::j_P_x,      &tms340x0_device::j_P_x,      &tms340x0_device::j_P_x,      &tms340x0_device::j_P_x,
	596	/* 0xc200 */
	597	&tms340x0_device::j_LS_0,     &tms340x0_device::j_LS_x,     &tms340x0_device::j_LS_x,     &tms340x0_device::j_LS_x,     &tms340x0_device::j_LS_x,     &tms340x0_device::j_LS_x,     &tms340x0_device::j_LS_x,     &tms340x0_device::j_LS_x,
	598	&tms340x0_device::j_LS_8,     &tms340x0_device::j_LS_x,     &tms340x0_device::j_LS_x,     &tms340x0_device::j_LS_x,     &tms340x0_device::j_LS_x,     &tms340x0_device::j_LS_x,     &tms340x0_device::j_LS_x,     &tms340x0_device::j_LS_x,
	599	/* 0xc300 */
	600	&tms340x0_device::j_HI_0,     &tms340x0_device::j_HI_x,     &tms340x0_device::j_HI_x,     &tms340x0_device::j_HI_x,     &tms340x0_device::j_HI_x,     &tms340x0_device::j_HI_x,     &tms340x0_device::j_HI_x,     &tms340x0_device::j_HI_x,
	601	&tms340x0_device::j_HI_8,     &tms340x0_device::j_HI_x,     &tms340x0_device::j_HI_x,     &tms340x0_device::j_HI_x,     &tms340x0_device::j_HI_x,     &tms340x0_device::j_HI_x,     &tms340x0_device::j_HI_x,     &tms340x0_device::j_HI_x,
	602	/* 0xc400 */
	603	&tms340x0_device::j_LT_0,     &tms340x0_device::j_LT_x,     &tms340x0_device::j_LT_x,     &tms340x0_device::j_LT_x,     &tms340x0_device::j_LT_x,     &tms340x0_device::j_LT_x,     &tms340x0_device::j_LT_x,     &tms340x0_device::j_LT_x,
	604	&tms340x0_device::j_LT_8,     &tms340x0_device::j_LT_x,     &tms340x0_device::j_LT_x,     &tms340x0_device::j_LT_x,     &tms340x0_device::j_LT_x,     &tms340x0_device::j_LT_x,     &tms340x0_device::j_LT_x,     &tms340x0_device::j_LT_x,
	605	/* 0xc500 */
	606	&tms340x0_device::j_GE_0,     &tms340x0_device::j_GE_x,     &tms340x0_device::j_GE_x,     &tms340x0_device::j_GE_x,     &tms340x0_device::j_GE_x,     &tms340x0_device::j_GE_x,     &tms340x0_device::j_GE_x,     &tms340x0_device::j_GE_x,
	607	&tms340x0_device::j_GE_8,     &tms340x0_device::j_GE_x,     &tms340x0_device::j_GE_x,     &tms340x0_device::j_GE_x,     &tms340x0_device::j_GE_x,     &tms340x0_device::j_GE_x,     &tms340x0_device::j_GE_x,     &tms340x0_device::j_GE_x,
	608	/* 0xc600 */
	609	&tms340x0_device::j_LE_0,     &tms340x0_device::j_LE_x,     &tms340x0_device::j_LE_x,     &tms340x0_device::j_LE_x,     &tms340x0_device::j_LE_x,     &tms340x0_device::j_LE_x,     &tms340x0_device::j_LE_x,     &tms340x0_device::j_LE_x,
	610	&tms340x0_device::j_LE_8,     &tms340x0_device::j_LE_x,     &tms340x0_device::j_LE_x,     &tms340x0_device::j_LE_x,     &tms340x0_device::j_LE_x,     &tms340x0_device::j_LE_x,     &tms340x0_device::j_LE_x,     &tms340x0_device::j_LE_x,
	611	/* 0xc700 */
	612	&tms340x0_device::j_GT_0,     &tms340x0_device::j_GT_x,     &tms340x0_device::j_GT_x,     &tms340x0_device::j_GT_x,     &tms340x0_device::j_GT_x,     &tms340x0_device::j_GT_x,     &tms340x0_device::j_GT_x,     &tms340x0_device::j_GT_x,
	613	&tms340x0_device::j_GT_8,     &tms340x0_device::j_GT_x,     &tms340x0_device::j_GT_x,     &tms340x0_device::j_GT_x,     &tms340x0_device::j_GT_x,     &tms340x0_device::j_GT_x,     &tms340x0_device::j_GT_x,     &tms340x0_device::j_GT_x,
	614	/* 0xc800 */
	615	&tms340x0_device::j_C_0,      &tms340x0_device::j_C_x,      &tms340x0_device::j_C_x,      &tms340x0_device::j_C_x,      &tms340x0_device::j_C_x,      &tms340x0_device::j_C_x,      &tms340x0_device::j_C_x,      &tms340x0_device::j_C_x,
	616	&tms340x0_device::j_C_8,      &tms340x0_device::j_C_x,      &tms340x0_device::j_C_x,      &tms340x0_device::j_C_x,      &tms340x0_device::j_C_x,      &tms340x0_device::j_C_x,      &tms340x0_device::j_C_x,      &tms340x0_device::j_C_x,
	617	/* 0xc900 */
	618	&tms340x0_device::j_NC_0,     &tms340x0_device::j_NC_x,     &tms340x0_device::j_NC_x,     &tms340x0_device::j_NC_x,     &tms340x0_device::j_NC_x,     &tms340x0_device::j_NC_x,     &tms340x0_device::j_NC_x,     &tms340x0_device::j_NC_x,
	619	&tms340x0_device::j_NC_8,     &tms340x0_device::j_NC_x,     &tms340x0_device::j_NC_x,     &tms340x0_device::j_NC_x,     &tms340x0_device::j_NC_x,     &tms340x0_device::j_NC_x,     &tms340x0_device::j_NC_x,     &tms340x0_device::j_NC_x,
	620	/* 0xca00 */
	621	&tms340x0_device::j_EQ_0,     &tms340x0_device::j_EQ_x,     &tms340x0_device::j_EQ_x,     &tms340x0_device::j_EQ_x,     &tms340x0_device::j_EQ_x,     &tms340x0_device::j_EQ_x,     &tms340x0_device::j_EQ_x,     &tms340x0_device::j_EQ_x,
	622	&tms340x0_device::j_EQ_8,     &tms340x0_device::j_EQ_x,     &tms340x0_device::j_EQ_x,     &tms340x0_device::j_EQ_x,     &tms340x0_device::j_EQ_x,     &tms340x0_device::j_EQ_x,     &tms340x0_device::j_EQ_x,     &tms340x0_device::j_EQ_x,
	623	/* 0xcb00 */
	624	&tms340x0_device::j_NE_0,     &tms340x0_device::j_NE_x,     &tms340x0_device::j_NE_x,     &tms340x0_device::j_NE_x,     &tms340x0_device::j_NE_x,     &tms340x0_device::j_NE_x,     &tms340x0_device::j_NE_x,     &tms340x0_device::j_NE_x,
	625	&tms340x0_device::j_NE_8,     &tms340x0_device::j_NE_x,     &tms340x0_device::j_NE_x,     &tms340x0_device::j_NE_x,     &tms340x0_device::j_NE_x,     &tms340x0_device::j_NE_x,     &tms340x0_device::j_NE_x,     &tms340x0_device::j_NE_x,
	626	/* 0xcc00 */
	627	&tms340x0_device::j_V_0,      &tms340x0_device::j_V_x,      &tms340x0_device::j_V_x,      &tms340x0_device::j_V_x,      &tms340x0_device::j_V_x,      &tms340x0_device::j_V_x,      &tms340x0_device::j_V_x,      &tms340x0_device::j_V_x,
	628	&tms340x0_device::j_V_8,      &tms340x0_device::j_V_x,      &tms340x0_device::j_V_x,      &tms340x0_device::j_V_x,      &tms340x0_device::j_V_x,      &tms340x0_device::j_V_x,      &tms340x0_device::j_V_x,      &tms340x0_device::j_V_x,
	629	/* 0xcd00 */
	630	&tms340x0_device::j_NV_0,     &tms340x0_device::j_NV_x,     &tms340x0_device::j_NV_x,     &tms340x0_device::j_NV_x,     &tms340x0_device::j_NV_x,     &tms340x0_device::j_NV_x,     &tms340x0_device::j_NV_x,     &tms340x0_device::j_NV_x,
	631	&tms340x0_device::j_NV_8,     &tms340x0_device::j_NV_x,     &tms340x0_device::j_NV_x,     &tms340x0_device::j_NV_x,     &tms340x0_device::j_NV_x,     &tms340x0_device::j_NV_x,     &tms340x0_device::j_NV_x,     &tms340x0_device::j_NV_x,
	632	/* 0xce00 */
	633	&tms340x0_device::j_N_0,      &tms340x0_device::j_N_x,      &tms340x0_device::j_N_x,      &tms340x0_device::j_N_x,      &tms340x0_device::j_N_x,      &tms340x0_device::j_N_x,      &tms340x0_device::j_N_x,      &tms340x0_device::j_N_x,
	634	&tms340x0_device::j_N_8,      &tms340x0_device::j_N_x,      &tms340x0_device::j_N_x,      &tms340x0_device::j_N_x,      &tms340x0_device::j_N_x,      &tms340x0_device::j_N_x,      &tms340x0_device::j_N_x,      &tms340x0_device::j_N_x,
	635	/* 0xcf00 */
	636	&tms340x0_device::j_NN_0,     &tms340x0_device::j_NN_x,     &tms340x0_device::j_NN_x,     &tms340x0_device::j_NN_x,     &tms340x0_device::j_NN_x,     &tms340x0_device::j_NN_x,     &tms340x0_device::j_NN_x,     &tms340x0_device::j_NN_x,
	637	&tms340x0_device::j_NN_8,     &tms340x0_device::j_NN_x,     &tms340x0_device::j_NN_x,     &tms340x0_device::j_NN_x,     &tms340x0_device::j_NN_x,     &tms340x0_device::j_NN_x,     &tms340x0_device::j_NN_x,     &tms340x0_device::j_NN_x,
	638	/* 0xd000 */
	639	&tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,  &tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,  &tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,  &tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,
	640	&tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,  &tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,  &tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,  &tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,
	641	/* 0xd100 */
	642	&tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,  &tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,  &tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,  &tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,
	643	&tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,  &tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,  &tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,  &tms340x0_device::move0_no_ni_a,  &tms340x0_device::move0_no_ni_b,
	644	/* 0xd200 */
	645	&tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,  &tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,  &tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,  &tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,
	646	&tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,  &tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,  &tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,  &tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,
	647	/* 0xd300 */
	648	&tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,  &tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,  &tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,  &tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,
	649	&tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,  &tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,  &tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,  &tms340x0_device::move1_no_ni_a,  &tms340x0_device::move1_no_ni_b,
	650	/* 0xd400 */
	651	&tms340x0_device::move0_a_ni_a,&tms340x0_device::move0_a_ni_b,&tms340x0_device::unimpl,   &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	652	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	653	/* 0xd500 */
	654	&tms340x0_device::exgf0_a,    &tms340x0_device::exgf0_b,    &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	655	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	656	/* 0xd600 */
	657	&tms340x0_device::move1_a_ni_a,&tms340x0_device::move1_a_ni_b,&tms340x0_device::unimpl,   &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	658	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	659	/* 0xd700 */
	660	&tms340x0_device::exgf1_a,    &tms340x0_device::exgf1_b,    &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	661	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	662	/* 0xd800 */
	663	&tms340x0_device::cexec_s,    &tms340x0_device::cexec_s,    &tms340x0_device::cexec_s,    &tms340x0_device::cexec_s,    &tms340x0_device::cexec_s,    &tms340x0_device::cexec_s,    &tms340x0_device::cexec_s,    &tms340x0_device::cexec_s,
	664	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	665	/* 0xd900 */
	666	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	667	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	668	/* 0xda00 */
	669	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	670	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	671	/* 0xdb00 */
	672	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	673	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	674	/* 0xdc00 */
	675	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	676	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	677	/* 0xdd00 */
	678	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	679	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	680	/* 0xde00 */
	681	&tms340x0_device::unimpl,     &tms340x0_device::fline,      &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	682	&tms340x0_device::unimpl,     &tms340x0_device::fline,      &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	683	/* 0xdf00 */
	684	&tms340x0_device::unimpl,     &tms340x0_device::line,       &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	685	&tms340x0_device::unimpl,     &tms340x0_device::line,       &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	686	/* 0xe000 */
	687	&tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,   &tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,   &tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,   &tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,
	688	&tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,   &tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,   &tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,   &tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,
	689	/* 0xe100 */
	690	&tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,   &tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,   &tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,   &tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,
	691	&tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,   &tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,   &tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,   &tms340x0_device::add_xy_a,   &tms340x0_device::add_xy_b,
	692	/* 0xe200 */
	693	&tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,   &tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,   &tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,   &tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,
	694	&tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,   &tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,   &tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,   &tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,
	695	/* 0xe300 */
	696	&tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,   &tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,   &tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,   &tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,
	697	&tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,   &tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,   &tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,   &tms340x0_device::sub_xy_a,   &tms340x0_device::sub_xy_b,
	698	/* 0xe400 */
	699	&tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,   &tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,   &tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,   &tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,
	700	&tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,   &tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,   &tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,   &tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,
	701	/* 0xe500 */
	702	&tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,   &tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,   &tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,   &tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,
	703	&tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,   &tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,   &tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,   &tms340x0_device::cmp_xy_a,   &tms340x0_device::cmp_xy_b,
	704	/* 0xe600 */
	705	&tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,      &tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,      &tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,      &tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,
	706	&tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,      &tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,      &tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,      &tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,
	707	/* 0xe700 */
	708	&tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,      &tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,      &tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,      &tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,
	709	&tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,      &tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,      &tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,      &tms340x0_device::cpw_a,      &tms340x0_device::cpw_b,
	710	/* 0xe800 */
	711	&tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,    &tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,    &tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,    &tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,
	712	&tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,    &tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,    &tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,    &tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,
	713	/* 0xe900 */
	714	&tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,    &tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,    &tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,    &tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,
	715	&tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,    &tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,    &tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,    &tms340x0_device::cvxyl_a,    &tms340x0_device::cvxyl_b,
	716	/* 0xea00 */
	717	&tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,   &tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,   &tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,   &tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,
	718	&tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,   &tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,   &tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,   &tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,
	719	/* 0xeb00 */
	720	&tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,   &tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,   &tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,   &tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,
	721	&tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,   &tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,   &tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,   &tms340x0_device::cvsxyl_a,   &tms340x0_device::cvsxyl_b,
	722	/* 0xec00 */
	723	&tms340x0_device::movx_a,     &tms340x0_device::movx_b,     &tms340x0_device::movx_a,     &tms340x0_device::movx_b,     &tms340x0_device::movx_a,     &tms340x0_device::movx_b,     &tms340x0_device::movx_a,     &tms340x0_device::movx_b,
	724	&tms340x0_device::movx_a,     &tms340x0_device::movx_b,     &tms340x0_device::movx_a,     &tms340x0_device::movx_b,     &tms340x0_device::movx_a,     &tms340x0_device::movx_b,     &tms340x0_device::movx_a,     &tms340x0_device::movx_b,
	725	/* 0xed00 */
	726	&tms340x0_device::movx_a,     &tms340x0_device::movx_b,     &tms340x0_device::movx_a,     &tms340x0_device::movx_b,     &tms340x0_device::movx_a,     &tms340x0_device::movx_b,     &tms340x0_device::movx_a,     &tms340x0_device::movx_b,
	727	&tms340x0_device::movx_a,     &tms340x0_device::movx_b,     &tms340x0_device::movx_a,     &tms340x0_device::movx_b,     &tms340x0_device::movx_a,     &tms340x0_device::movx_b,     &tms340x0_device::movx_a,     &tms340x0_device::movx_b,
	728	/* 0xee00 */
	729	&tms340x0_device::movy_a,     &tms340x0_device::movy_b,     &tms340x0_device::movy_a,     &tms340x0_device::movy_b,     &tms340x0_device::movy_a,     &tms340x0_device::movy_b,     &tms340x0_device::movy_a,     &tms340x0_device::movy_b,
	730	&tms340x0_device::movy_a,     &tms340x0_device::movy_b,     &tms340x0_device::movy_a,     &tms340x0_device::movy_b,     &tms340x0_device::movy_a,     &tms340x0_device::movy_b,     &tms340x0_device::movy_a,     &tms340x0_device::movy_b,
	731	/* 0xef00 */
	732	&tms340x0_device::movy_a,     &tms340x0_device::movy_b,     &tms340x0_device::movy_a,     &tms340x0_device::movy_b,     &tms340x0_device::movy_a,     &tms340x0_device::movy_b,     &tms340x0_device::movy_a,     &tms340x0_device::movy_b,
	733	&tms340x0_device::movy_a,     &tms340x0_device::movy_b,     &tms340x0_device::movy_a,     &tms340x0_device::movy_b,     &tms340x0_device::movy_a,     &tms340x0_device::movy_b,     &tms340x0_device::movy_a,     &tms340x0_device::movy_b,
	734	/* 0xf000 */
	735	&tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,    &tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,    &tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,    &tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,
	736	&tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,    &tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,    &tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,    &tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,
	737	/* 0xf100 */
	738	&tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,    &tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,    &tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,    &tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,
	739	&tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,    &tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,    &tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,    &tms340x0_device::pixt_rixy_a,    &tms340x0_device::pixt_rixy_b,
	740	/* 0xf200 */
	741	&tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,    &tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,    &tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,    &tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,
	742	&tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,    &tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,    &tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,    &tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,
	743	/* 0xf300 */
	744	&tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,    &tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,    &tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,    &tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,
	745	&tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,    &tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,    &tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,    &tms340x0_device::pixt_ixyr_a,    &tms340x0_device::pixt_ixyr_b,
	746	/* 0xf400 */
	747	&tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,  &tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,  &tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,  &tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,
	748	&tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,  &tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,  &tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,  &tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,
	749	/* 0xf500 */
	750	&tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,  &tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,  &tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,  &tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,
	751	&tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,  &tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,  &tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,  &tms340x0_device::pixt_ixyixy_a,  &tms340x0_device::pixt_ixyixy_b,
	752	/* 0xf600 */
	753	&tms340x0_device::drav_a,     &tms340x0_device::drav_b,     &tms340x0_device::drav_a,     &tms340x0_device::drav_b,     &tms340x0_device::drav_a,     &tms340x0_device::drav_b,     &tms340x0_device::drav_a,     &tms340x0_device::drav_b,
	754	&tms340x0_device::drav_a,     &tms340x0_device::drav_b,     &tms340x0_device::drav_a,     &tms340x0_device::drav_b,     &tms340x0_device::drav_a,     &tms340x0_device::drav_b,     &tms340x0_device::drav_a,     &tms340x0_device::drav_b,
	755	/* 0xf700 */
	756	&tms340x0_device::drav_a,     &tms340x0_device::drav_b,     &tms340x0_device::drav_a,     &tms340x0_device::drav_b,     &tms340x0_device::drav_a,     &tms340x0_device::drav_b,     &tms340x0_device::drav_a,     &tms340x0_device::drav_b,
	757	&tms340x0_device::drav_a,     &tms340x0_device::drav_b,     &tms340x0_device::drav_a,     &tms340x0_device::drav_b,     &tms340x0_device::drav_a,     &tms340x0_device::drav_b,     &tms340x0_device::drav_a,     &tms340x0_device::drav_b,
	758	/* 0xf800 */
	759	&tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,  &tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,  &tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,  &tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,
	760	&tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,  &tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,  &tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,  &tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,
	761	/* 0xf900 */
	762	&tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,  &tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,  &tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,  &tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,
	763	&tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,  &tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,  &tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,  &tms340x0_device::pixt_ri_a,  &tms340x0_device::pixt_ri_b,
	764	/* 0xfa00 */
	765	&tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,  &tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,  &tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,  &tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,
	766	&tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,  &tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,  &tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,  &tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,
	767	/* 0xfb00 */
	768	&tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,  &tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,  &tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,  &tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,
	769	&tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,  &tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,  &tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,  &tms340x0_device::pixt_ir_a,  &tms340x0_device::pixt_ir_b,
	770	/* 0xfc00 */
	771	&tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,  &tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,  &tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,  &tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,
	772	&tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,  &tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,  &tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,  &tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,
	773	/* 0xfd00 */
	774	&tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,  &tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,  &tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,  &tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,
	775	&tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,  &tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,  &tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,  &tms340x0_device::pixt_ii_a,  &tms340x0_device::pixt_ii_b,
	776	/* 0xfe00 */
	777	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	778	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	779	/* 0xff00 */
	780	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,
	781	&tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl,     &tms340x0_device::unimpl
	782	};

trunk/src/devices/cpu/tms34010/tms34010.cpp

r250251	r250252
458	458	OPCODE TABLE & IMPLEMENTATIONS
459	459	***************************************************************************/
460	460
461		#include "34010fld.cpp"
	461	#include "34010fld.inc"
462	462
463	463	/* includes the static function prototypes and the master opcode table */
464		#include "34010tbl.cpp"
	464	#include "34010tbl.inc"
465	465
466	466	/* includes the actual opcode implementations */
467		#include "34010ops.cpp"
468		#include "34010gfx.cpp"
	467	#include "34010ops.inc"
	468	#include "34010gfx.inc"
469	469
470	470
471	471

trunk/src/devices/cpu/tms9900/tms9995.h

r250251	r250252
131	131	// Processor states
132	132	bool    m_idle_state;
133	133	bool    m_nmi_state;
134		bool    m_irq_state;
	134	//   bool    m_irq_state;
135	135	bool    m_hold_state;
136	136
137	137	// READY handling. The READY line is operated before the clock
r250251	r250252
382	382	void alu_lst_lwp();
383	383	void alu_mov();
384	384	void alu_multiply();
385		void alu_multiply_signed();
	385	//   void alu_multiply_signed();
386	386	void alu_rtwp();
387	387	void alu_sbo_sbz();
388	388	void alu_shift();

trunk/src/devices/cpu/z80/z80dasm.cpp

r250251	r250252
420	420	char *dst;
421	421	INT8 offset = 0;
422	422	UINT8 op, op1 = 0;
423		UINT16 ea = 0;
	423	UINT16 ea;
424	424	int pos = 0;
425	425
426	426	ixy = "oops!!";

trunk/src/devices/imagedev/cassette.cpp

r250251	r250252
30	30
31	31	cassette_image_device::cassette_image_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
32	32	: device_t(mconfig, CASSETTE, "Cassette", tag, owner, clock, "cassette_image", __FILE__),
33		device_image_interface(mconfig, *this),
34		m_state(CASSETTE_STOPPED),
	33	device_image_interface(mconfig, *this),
	34	m_cassette(NULL),
	35	m_state(CASSETTE_STOPPED),
	36	m_position(0),
	37	m_position_time(0),
	38	m_value(0),
	39	m_channel(0),
	40	m_speed(0),
	41	m_direction(0),
35	42	m_formats(cassette_default_formats),
36	43	m_create_opts(NULL),
37	44	m_default_state(CASSETTE_PLAY),
r250251	r250252
423	430	if (position > length)
424	431	{
425	432	m_state = (cassette_state)(( m_state & ~CASSETTE_MASK_UISTATE ) | CASSETTE_STOPPED);
426		position = length;
427	433	}
428	434	}
429	435	}

trunk/src/devices/imagedev/chd_cd.cpp

r250251	r250252
28	28
29	29	cdrom_image_device::cdrom_image_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
30	30	: device_t(mconfig, CDROM, "CD-ROM Image", tag, owner, clock, "cdrom_image", __FILE__),
31		device_image_interface(mconfig, *this),
	31	device_image_interface(mconfig, *this),
	32	m_cdrom_handle(NULL),
	33	m_extension_list(NULL),
32	34	m_interface(NULL)
33	35	{
34	36	}
35	37
36	38	cdrom_image_device::cdrom_image_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
37	39	: device_t(mconfig, type, name,  tag, owner, clock, shortname, source),
38		device_image_interface(mconfig, *this),
	40	device_image_interface(mconfig, *this),
	41	m_cdrom_handle(NULL),
	42	m_extension_list(NULL),
39	43	m_interface(NULL)
40	44	{
41	45	}

trunk/src/devices/imagedev/flopdrv.cpp

r250251	r250252
709	709	m_rdy(0),
710	710	m_dskchg(0),
711	711	m_drive_id(0),
712		m_active(0),
	712	m_active(0),
	713	m_config(NULL),
713	714	m_flags(0),
714	715	m_max_track(0),
715	716	m_num_sides(0),
716		m_current_track(0),
	717	m_current_track(0),
	718	m_index_timer(NULL),
717	719	m_index_pulse_callback(NULL),
718	720	m_rpm(0.0f),
719	721	m_id_index(0),
r250251	r250252
741	743	m_rdy(0),
742	744	m_dskchg(0),
743	745	m_drive_id(0),
744		m_active(0),
	746	m_active(0),
	747	m_config(NULL),
745	748	m_flags(0),
746	749	m_max_track(0),
747	750	m_num_sides(0),
748		m_current_track(0),
	751	m_current_track(0),
	752	m_index_timer(NULL),
749	753	m_index_pulse_callback(NULL),
750	754	m_rpm(0.0f),
751	755	m_id_index(0),

trunk/src/devices/imagedev/flopdrv.h

r250251	r250252
161	161	TIMER_CALLBACK_MEMBER(floppy_drive_index_callback);
162	162	void floppy_drive_init();
163	163	void floppy_drive_index_func();
164		TIMER_CALLBACK(floppy_drive_index_callback);
165	164	int internal_floppy_device_load(int create_format, option_resolution *create_args);
166	165	TIMER_CALLBACK_MEMBER( set_wpt );
167	166

trunk/src/devices/imagedev/floppy.cpp

r250251	r250252
7	7	*********************************************************************/
8	8
9	9	#include "emu.h"
10		#include "emuopts.h"
11	10	#include "ui/menu.h"
12	11	#include "ui/filesel.h"
13	12	#include "zippath.h"
r250251	r250252
127	126
128	127	floppy_connector::floppy_connector(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
129	128	device_t(mconfig, FLOPPY_CONNECTOR, "Floppy drive connector abstraction", tag, owner, clock, "floppy_connector", __FILE__),
130		device_slot_interface(mconfig, *this),
	129	device_slot_interface(mconfig, *this),
	130	formats(NULL),
131	131	m_enable_sound(false)
132	132	{
133	133	}
r250251	r250252
167	167	floppy_image_device::floppy_image_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
168	168	: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
169	169	device_image_interface(mconfig, *this),
170		device_slot_card_interface(mconfig, *this),
	170	device_slot_card_interface(mconfig, *this),
	171	input_format(NULL),
	172	output_format(NULL),
171	173	image(NULL),
172		fif_list(NULL),
173		m_make_sound(false)
	174	fif_list(NULL),
	175	index_timer(NULL),
	176	tracks(0),
	177	sides(0),
	178	form_factor(0),
	179	motor_always_on(false),
	180	dir(0), stp(0), wtg(0), mon(0), ss(0), idx(0), wpt(0), rdy(0), dskchg(0),
	181	ready(false),
	182	rpm(0),
	183	floppy_ratio_1(0),
	184	revolution_count(0),
	185	cyl(0),
	186	subcyl(0),
	187	image_dirty(false),
	188	ready_counter(0),
	189	m_make_sound(false),
	190	m_sound_out(NULL)
174	191	{
175	192	extension_list[0] = '\0';
176	193	m_err = IMAGE_ERROR_INVALIDIMAGE;
r250251	r250252
668	685	{
669	686	int spos = (buf.size() >> 1)-1;
670	687	int step;
671		for(step=1; step<buf.size()+1; step<<=1);
	688	for(step=1; step<buf.size()+1; step<<=1) { }
672	689	step >>= 1;
673	690
674	691	for(;;) {
r250251	r250252
983	1000
984	1001	bool can_in_place = input_format->supports_save();
985	1002	if(can_in_place) {
986		file_error filerr = FILERR_NOT_FOUND;
	1003	file_error filerr;
987	1004	std::string tmp_path;
988	1005	core_file *tmp_file;
989	1006	/* attempt to open the file for writing but *without* create */
r250251	r250252
1004	1021	switch (state) {
1005	1022	case DO_CREATE: {
1006	1023	floppy_image_format_t *fif_list = fd->get_formats();
1007		int ext_match = 0, total_usable = 0;
1008		for(floppy_image_format_t *i = fif_list; i; i = i->next) {
	1024	int ext_match;
	1025	int total_usable = 0;
	1026	for(floppy_image_format_t *i = fif_list; i; i = i->next) {
1009	1027	if(!i->supports_save())
1010	1028	continue;
1011	1029	if (i->extension_matches(current_file.c_str()))
r250251	r250252
1085	1103	//===================================================================
1086	1104
1087	1105	floppy_sound_device::floppy_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
1088		: samples_device(mconfig, FLOPPYSOUND, "Floppy sound", tag, owner, clock, "flopsnd", __FILE__)
	1106	: samples_device(mconfig, FLOPPYSOUND, "Floppy sound", tag, owner, clock, "flopsnd", __FILE__),
	1107	m_sound(NULL),
	1108	m_is525(false),
	1109	m_sampleindex_motor_start(0),
	1110	m_sampleindex_motor_loop(0),
	1111	m_sampleindex_motor_end(0),
	1112	m_samplesize_motor_start(0),
	1113	m_samplesize_motor_loop(0),
	1114	m_samplesize_motor_end(0),
	1115	m_samplepos_motor(0),
	1116	m_motor_playback_state(0),
	1117	m_motor_on(false),
	1118	m_step_samples(0),
	1119	m_sampleindex_step1(0),
	1120	m_samplepos_step(0),
	1121	m_step_playback_state(0)
1089	1122	{
1090	1123	m_loaded = false;
1091	1124	}
r250251	r250252
1193	1226	// Also, there is no need for interpolation, as we only expect
1194	1227	// one sample rate of 44100 for all samples
1195	1228
1196		INT16 out = 0;
	1229	INT16 out;
1197	1230	stream_sample_t *samplebuffer = outputs[0];
1198	1231
1199	1232	while (samples-- > 0)

trunk/src/devices/imagedev/mfmhd.cpp

r250251	r250252
270	270	**************************************************************************/
271	271
272	272	#include "emu.h"
273		#include "formats/imageutl.h"
274	273	#include "harddisk.h"
275	274	#include "mfmhd.h"
276	275
r250251	r250252
310	309
311	310	mfm_harddisk_device::mfm_harddisk_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
312	311	: harddisk_image_device(mconfig, type, name, tag, owner, clock, shortname, source),
313		device_slot_card_interface(mconfig, *this)
	312	device_slot_card_interface(mconfig, *this),
	313	m_index_timer(NULL),
	314	m_spinup_timer(NULL),
	315	m_seek_timer(NULL),
	316	m_cache_timer(NULL),
	317	m_precomp_cyl(0),
	318	m_redwc_cyl(0),
	319	m_encoding(),
	320	m_ready(false),
	321	m_current_cylinder(0),
	322	m_current_head(0),
	323	m_track_delta(0),
	324	m_step_phase(0),
	325	m_seek_complete(false),
	326	m_seek_inward(false),
	327	m_autotruncation(false),
	328	m_recalibrated(false),
	329	m_step_line(),
	330	m_format(NULL)
314	331	{
315	332	m_spinupms = 10000;
316	333	m_cachelines = 5;
r250251	r250252
952	969	//   This is a write-back LRU cache.
953	970	// ===========================================================
954	971
955		mfmhd_trackimage_cache::mfmhd_trackimage_cache(running_machine &machine):
	972	mfmhd_trackimage_cache::mfmhd_trackimage_cache(running_machine &machine):
	973	m_mfmhd(NULL),
956	974	m_tracks(NULL),
957	975	m_machine(machine)
958	976	{
r250251	r250252
1026	1044	{
1027	1045	if (TRACE_CACHE) m_machine.logerror("%s: MFM HD cache init; cache size is %d tracks\n", mfmhd->tag(), trackslots);
1028	1046
1029		chd_error state = CHDERR_NONE;
	1047	chd_error state;
1030	1048
1031		mfmhd_trackimage* previous = NULL;
	1049	mfmhd_trackimage* previous;
1032	1050	mfmhd_trackimage* current = NULL;
1033	1051
1034	1052	m_mfmhd = mfmhd;
r250251	r250252
1141	1159
1142	1160	mfm_harddisk_connector::mfm_harddisk_connector(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock):
1143	1161	device_t(mconfig, MFM_HD_CONNECTOR, "MFM hard disk connector", tag, owner, clock, "mfm_hd_connector", __FILE__),
1144		device_slot_interface(mconfig, *this)
	1162	device_slot_interface(mconfig, *this),
	1163	m_encoding(),
	1164	m_spinupms(0),
	1165	m_cachesize(0),
	1166	m_format(NULL)
1145	1167	{
1146	1168	}
1147	1169

trunk/src/devices/imagedev/mfmhd.h

r250251	r250252
154	154	mfmhd_trackimage_cache* m_cache;
155	155	mfmhd_image_format_t*   m_format;
156	156
157		void        prepare_track(int cylinder, int head);
158	157	void        head_move();
159	158	void        recalibrate();
160	159

trunk/src/devices/imagedev/midiin.cpp

r250251	r250252
24	24
25	25	midiin_device::midiin_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
26	26	: device_t(mconfig, MIDIIN, "MIDI In image device", tag, owner, clock, "midiin", __FILE__),
27		device_image_interface(mconfig, *this),
28		device_serial_interface(mconfig, *this),
29		m_input_cb(*this)
	27	device_image_interface(mconfig, *this),
	28	device_serial_interface(mconfig, *this),
	29	m_midi(NULL),
	30	m_timer(NULL),
	31	m_input_cb(*this),
	32	m_xmit_read(0),
	33	m_xmit_write(0),
	34	m_tx_busy(false)
30	35	{
31	36	}
32	37

trunk/src/devices/imagedev/midiout.cpp

r250251	r250252
24	24
25	25	midiout_device::midiout_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
26	26	: device_t(mconfig, MIDIOUT, "MIDI Out image device", tag, owner, clock, "midiout", __FILE__),
27		device_image_interface(mconfig, *this),
28		device_serial_interface(mconfig, *this)
	27	device_image_interface(mconfig, *this),
	28	device_serial_interface(mconfig, *this),
	29	m_midi(NULL)
29	30	{
30	31	}
31	32

trunk/src/devices/imagedev/snapquik.cpp

r250251	r250252
20	20
21	21	snapshot_image_device::snapshot_image_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
22	22	: device_t(mconfig, SNAPSHOT, "Snapshot", tag, owner, clock, "snapshot_image", __FILE__),
23		device_image_interface(mconfig, *this),
24		m_interface(NULL),
25		m_delay_attoseconds(0)
	23	device_image_interface(mconfig, *this),
	24	m_file_extensions(NULL),
	25	m_interface(NULL),
	26	m_delay_seconds(0),
	27	m_delay_attoseconds(0),
	28	m_timer(NULL)
26	29	{
27	30	}
28	31
29	32	snapshot_image_device::snapshot_image_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
30		device_t(mconfig, type, name, tag, owner, clock, shortname, source),
31		device_image_interface(mconfig, *this),
32		m_interface(NULL),
33		m_delay_attoseconds(0)
	33	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
	34	device_image_interface(mconfig, *this),
	35	m_file_extensions(NULL),
	36	m_interface(NULL),
	37	m_delay_seconds(0),
	38	m_delay_attoseconds(0),
	39	m_timer(NULL)
34	40	{
35	41	}
36	42	//-------------------------------------------------

trunk/src/devices/machine/6532riot.cpp

r250251	r250252
238	238
239	239	UINT8 riot6532_device::reg_r(UINT8 offset, bool debugger_access)
240	240	{
241		UINT8 val = 0;
	241	UINT8 val;
242	242
243	243	/* if A2 == 1 and A0 == 1, we are reading interrupt flags */
244	244	if ((offset & 0x05) == 0x05)
r250251	r250252
392	392	m_out_pa_cb(*this),
393	393	m_in_pb_cb(*this),
394	394	m_out_pb_cb(*this),
395		m_irq_cb(*this),
	395	m_irq_cb(*this),
	396	m_irqstate(0),
	397	m_irqenable(0),
396	398	m_irq(CLEAR_LINE),
397	399	m_pa7dir(0),
398		m_pa7prev(0)
	400	m_pa7prev(0),
	401	m_timershift(0),
	402	m_timerstate(0),
	403	m_timer(NULL)
399	404	{
400	405	memset(m_port, 0x00, sizeof(m_port));
401	406	}

trunk/src/devices/machine/6821pia.cpp

r250251	r250252
51	51
52	52	pia6821_device::pia6821_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
53	53	: device_t(mconfig, PIA6821, "6821 PIA", tag, owner, clock, "pia6821", __FILE__),
54		m_in_a_handler(*this),
55		m_in_b_handler(*this),
56		m_in_ca1_handler(*this),
57		m_in_cb1_handler(*this),
58		m_in_ca2_handler(*this),
59		m_out_a_handler(*this),
60		m_out_b_handler(*this),
61		m_ca2_handler(*this),
62		m_cb2_handler(*this),
63		m_irqa_handler(*this),
64		m_irqb_handler(*this),
65		m_in_ca1(0),
66		m_ctl_a(0),
67		m_irq_a_state(0),
68		m_in_cb1(0),
69		m_ctl_b(0),
70		m_irq_b_state(0)
	54	m_in_a_handler(*this),
	55	m_in_b_handler(*this),
	56	m_in_ca1_handler(*this),
	57	m_in_cb1_handler(*this),
	58	m_in_ca2_handler(*this),
	59	m_out_a_handler(*this),
	60	m_out_b_handler(*this),
	61	m_ca2_handler(*this),
	62	m_cb2_handler(*this),
	63	m_irqa_handler(*this),
	64	m_irqb_handler(*this), m_in_a(0),
	65	m_in_ca1(0), m_in_ca2(0), m_out_a(0), m_out_ca2(0), m_port_a_z_mask(0), m_ddr_a(0),
	66	m_ctl_a(0), m_irq_a1(0), m_irq_a2(0),
	67	m_irq_a_state(0), m_in_b(0),
	68	m_in_cb1(0), m_in_cb2(0), m_out_b(0), m_out_cb2(0), m_last_out_cb2_z(0), m_ddr_b(0),
	69	m_ctl_b(0), m_irq_b1(0), m_irq_b2(0),
	70	m_irq_b_state(0), m_in_a_pushed(false), m_out_a_needs_pulled(false), m_in_ca1_pushed(false),
	71	m_in_ca2_pushed(false), m_out_ca2_needs_pulled(false), m_in_b_pushed(false), m_out_b_needs_pulled(false),
	72	m_in_cb1_pushed(false), m_in_cb2_pushed(false), m_out_cb2_needs_pulled(false), m_logged_port_a_not_connected(false),
	73	m_logged_port_b_not_connected(false), m_logged_ca1_not_connected(false), m_logged_ca2_not_connected(false),
	74	m_logged_cb1_not_connected(false), m_logged_cb2_not_connected(false)
71	75	{
72	76	}
73	77

trunk/src/devices/machine/bankdev.cpp

r250251	r250252
11	11	m_endianness(ENDIANNESS_NATIVE),
12	12	m_databus_width(0),
13	13	m_addrbus_width(32),
14		m_stride(1),
	14	m_stride(1),
	15	m_program(NULL),
15	16	m_offset(0)
16	17	{
17	18	}

trunk/src/devices/machine/keyboard.cpp

r250251	r250252
43	43	m_io_kbd7(*this, "TERM_LINE7"),
44	44	m_io_kbd8(*this, "TERM_LINE8"),
45	45	m_io_kbd9(*this, "TERM_LINE9"),
46		m_io_kbdc(*this, "TERM_LINEC"),
	46	m_io_kbdc(*this, "TERM_LINEC"),
	47	m_timer(NULL),
	48	m_last_code(0),
	49	m_scan_line(0),
47	50	m_keyboard_cb(*this)
48	51	{
49	52	}
r250251	r250252
61	64	m_io_kbd8(*this, "TERM_LINE8"),
62	65	m_io_kbd9(*this, "TERM_LINE9"),
63	66	m_io_kbdc(*this, "TERM_LINEC"),
	67	m_timer(NULL),
	68	m_last_code(0),
	69	m_scan_line(0),
64	70	m_keyboard_cb(*this)
65	71	{
66	72	}

trunk/src/devices/machine/legscsi.cpp

r250251	r250252
3	3	#include "legscsi.h"
4	4
5	5	legacy_scsi_host_adapter::legacy_scsi_host_adapter(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
6		device_t(mconfig, type, name, tag, owner, clock, shortname, source),
	6	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
	7	m_selected(0),
7	8	m_scsi_port(*this)
8	9	{
9	10	}

trunk/src/devices/machine/nvram.cpp

r250251	r250252
11	11	#include "emu.h"
12	12	#include "machine/nvram.h"
13	13
14
15		// for now, make buggy GCC/Mingw STFU about I64FMT
16		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
17		#pragma GCC diagnostic push
18		#pragma GCC diagnostic ignored "-Wformat"
19		#pragma GCC diagnostic ignored "-Wformat-extra-args"
20		#endif
21
22	14	//**************************************************************************
23	15	//  LIVE DEVICE
24	16	//**************************************************************************
r250251	r250252
175	167	if (m_region != NULL && m_region->bytes() != m_length)
176	168	throw emu_fatalerror("NVRAM device '%s' has a default region, but it should be 0x%" SIZETFMT "X bytes", tag(), m_length);
177	169	}
178
179		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
180		#pragma GCC diagnostic pop
181		#endif

trunk/src/devices/machine/pci.cpp

r250251	r250252
2	2	// copyright-holders:Olivier Galibert
3	3	#include "pci.h"
4	4
5		// for now, make buggy GCC/Mingw STFU about I64FMT
6		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
7		#pragma GCC diagnostic push
8		#pragma GCC diagnostic ignored "-Wformat"
9		#pragma GCC diagnostic ignored "-Wformat-extra-args"
10		#endif
11
12	5	const device_type PCI_ROOT   = &device_creator<pci_root_device>;
13	6	const device_type PCI_BRIDGE = &device_creator<pci_bridge_device>;
14	7
r250251	r250252
902	895	void pci_root_device::device_reset()
903	896	{
904	897	}
905
906		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
907		#pragma GCC diagnostic pop
908		#endif

trunk/src/devices/machine/pit8253.cpp

r250251	r250252
23	23	#include "emu.h"
24	24	#include "machine/pit8253.h"
25	25
26		// for now, make buggy GCC/Mingw STFU about I64FMT
27		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
28		#pragma GCC diagnostic push
29		#pragma GCC diagnostic ignored "-Wformat"
30		#pragma GCC diagnostic ignored "-Wformat-extra-args"
31		#endif
32
33	26	/* device types */
34	27	enum
35	28	{
r250251	r250252
1129	1122	{
1130	1123	set_clock_signal(2, state);
1131	1124	}
1132
1133		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
1134		#pragma GCC diagnostic pop
1135		#endif

trunk/src/devices/machine/ram.cpp

r250251	r250252
78	78	{
79	79	const char *ramsize_string = NULL;
80	80	int is_valid = FALSE;
81		UINT32 specified_ram = 0;
82		const char *gamename_option = NULL;
	81	UINT32 specified_ram;
	82	const char *gamename_option;
83	83
84	84	/* verify default ram value */
85	85	if (default_size() == 0)
r250251	r250252
183	183	UINT32 ram;
184	184	char suffix = '\0';
185	185
186		s += sscanf(s, "%u%c", &ram, &suffix);
	186	sscanf(s, "%u%c", &ram, &suffix);
187	187
188	188	switch(tolower(suffix))
189	189	{

trunk/src/devices/machine/terminal.cpp

r250251	r250252
143	143	generic_terminal_device::generic_terminal_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
144	144	: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
145	145	m_palette(*this, "palette"),
146		m_io_term_conf(*this, "TERM_CONF"),
	146	m_io_term_conf(*this, "TERM_CONF"),
	147	m_x_pos(0),
	148	m_framecnt(0),
	149	m_y_pos(0),
147	150	m_keyboard_cb(*this)
148	151	{
149	152	}
150	153
151	154	generic_terminal_device::generic_terminal_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
152	155	: device_t(mconfig, GENERIC_TERMINAL, "Generic Terminal", tag, owner, clock, "generic_terminal", __FILE__),
153		m_palette(*this, "palette"),
154		m_io_term_conf(*this, "TERM_CONF"),
155		m_keyboard_cb(*this)
	156	m_palette(*this, "palette"),
	157	m_io_term_conf(*this, "TERM_CONF"),
	158	m_x_pos(0),
	159	m_framecnt(0),
	160	m_y_pos(0),
	161	m_keyboard_cb(*this)
156	162	{
157	163	}
158	164

trunk/src/devices/machine/z80ctc.cpp

r250251	r250252
10	10
11	11	#include "emu.h"
12	12	#include "z80ctc.h"
13		#include "cpu/z80/z80.h"
14	13	#include "cpu/z80/z80daisy.h"
15	14
16	15
r250251	r250252
86	85	m_zc0_cb(*this),
87	86	m_zc1_cb(*this),
88	87	m_zc2_cb(*this),
89		m_zc3_cb(*this)
	88	m_zc3_cb(*this),
	89	m_vector(0)
90	90	{
91	91	}
92	92
r250251	r250252
284	284	//-------------------------------------------------
285	285
286	286	z80ctc_device::ctc_channel::ctc_channel()
287		: m_mode(0),
	287	: m_device(NULL),
	288	m_index(0),
	289	m_mode(0),
288	290	m_tconst(0),
289	291	m_down(0),
290	292	m_extclk(0),

trunk/src/devices/machine/z80ctc.h

r250251	r250252
88	88	private:
89	89	// internal helpers
90	90	void interrupt_check();
91		void timercallback(int chanindex);
92	91
93	92	// a single channel within the CTC
94	93	class ctc_channel

trunk/src/devices/sound/2151intf.cpp

r250251	r250252
9	9	***************************************************************************/
10	10
11	11	#include "emu.h"
12		#include "fm.h"
13	12	#include "2151intf.h"
14	13	#include "ym2151.h"
15	14
r250251	r250252
24	23
25	24	ym2151_device::ym2151_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
26	25	: device_t(mconfig, YM2151, "YM2151", tag, owner, clock, "ym2151", __FILE__),
27		device_sound_interface(mconfig, *this),
	26	device_sound_interface(mconfig, *this),
	27	m_stream(NULL),
	28	m_chip(NULL),
	29	m_lastreg(0),
28	30	m_irqhandler(*this),
29	31	m_portwritehandler(*this)
30	32	{

trunk/src/devices/sound/3526intf.cpp

r250251	r250252
19	19	*
20	20	******************************************************************************/
21	21	#include "3526intf.h"
22		#include "fm.h"
23	22	#include "fmopl.h"
24	23
25	24
r250251	r250252
157	156
158	157	ym3526_device::ym3526_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
159	158	: device_t(mconfig, YM3526, "YM3526", tag, owner, clock, "ym3526", __FILE__),
160		device_sound_interface(mconfig, *this),
	159	device_sound_interface(mconfig, *this),
	160	m_stream(NULL),
	161	m_chip(NULL),
161	162	m_irq_handler(*this)
162	163	{
163	164	}

trunk/src/devices/sound/3812intf.cpp

r250251	r250252
20	20	******************************************************************************/
21	21	#include "emu.h"
22	22	#include "3812intf.h"
23		#include "fm.h"
24	23	#include "sound/fmopl.h"
25	24
26	25
r250251	r250252
155	154
156	155	ym3812_device::ym3812_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
157	156	: device_t(mconfig, YM3812, "YM3812", tag, owner, clock, "ym3812", __FILE__),
158		device_sound_interface(mconfig, *this),
	157	device_sound_interface(mconfig, *this),
	158	m_stream(NULL),
	159	m_chip(NULL),
159	160	m_irq_handler(*this)
160	161	{
161	162	}

trunk/src/devices/sound/8950intf.cpp

r250251	r250252
19	19	*
20	20	******************************************************************************/
21	21	#include "8950intf.h"
22		#include "fm.h"
23	22	#include "fmopl.h"
24	23
25	24
r250251	r250252
206	205
207	206	y8950_device::y8950_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
208	207	: device_t(mconfig, Y8950, "Y8950", tag, owner, clock, "y8950", __FILE__),
209		device_sound_interface(mconfig, *this),
	208	device_sound_interface(mconfig, *this),
	209	m_stream(NULL),
	210	m_chip(NULL),
210	211	m_irq_handler(*this),
211	212	m_keyboard_read_handler(*this),
212	213	m_keyboard_write_handler(*this),

trunk/src/devices/sound/ay8910.cpp

r250251	r250252
493	493	INLINE void build_single_table(double rl, const ay8910_device::ay_ym_param *par, int normalize, INT32 *tab, int zero_is_off)
494	494	{
495	495	int j;
496		double rt, rw = 0;
	496	double rt;
	497	double rw;
497	498	double temp[32], min=10.0, max=0.0;
498	499
499	500	for (j=0; j < par->res_count; j++)

trunk/src/devices/sound/discrete.cpp

r250251	r250252
39	39	#include "sound/wavwrite.h"
40	40	#include "discrete.h"
41	41
42		// for now, make buggy GCC/Mingw STFU about I64FMT
43		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
44		#pragma GCC diagnostic push
45		#pragma GCC diagnostic ignored "-Wformat"
46		#pragma GCC diagnostic ignored "-Wformat-extra-args"
47		#endif
48
49
50	42	/* for_each collides with c++ standard libraries - include it here */
51	43	#define for_each(_T, _e, _l) for (_T _e = (_l)->begin_ptr() ;  _e <= (_l)->end_ptr(); _e++)
52	44
r250251	r250252
135	127
136	128	protected:
137	129	discrete_task(discrete_device &pdev)
138		: task_group(0), m_device(pdev), m_threadid(-1)
139		{
	130	: task_group(0), m_device(pdev), m_threadid(-1), m_samples(0)
	131	{
140	132	source_list.clear();
141	133	step_list.clear();
142	134	m_buffers.clear();
r250251	r250252
332	324	buf.source = dest_node->m_input[inputnum];
333	325	buf.node_num = inputnode_num;
334	326	//buf.node = device->discrete_find_node(inputnode);
335		i = m_buffers.count();
	327	m_buffers.count();
336	328	pbuf = m_buffers.add(buf);
337	329	}
338	330	m_device.discrete_log("dso_task_start - buffering %d(%d) in task %p group %d referenced by %d group %d", NODE_INDEX(inputnode_num), NODE_CHILD_NODE_NUM(inputnode_num), this, task_group, dest_node->index(), dest_task->task_group);
r250251	r250252
362	354	*
363	355	*************************************/
364	356
365		discrete_base_node::discrete_base_node() :
	357	discrete_base_node::discrete_base_node() :
	358	m_device(NULL),
	359	m_block(NULL),
	360	m_active_inputs(0),
	361	m_custom(NULL),
	362	m_input_is_node(0),
366	363	m_step_intf(NULL),
367		m_input_intf(NULL)
	364	m_input_intf(NULL),
	365	m_output_intf(NULL)
368	366	{
369	367	m_output[0] = 0.0;
370	368	}
r250251	r250252
853	851
854	852	discrete_sound_device::discrete_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
855	853	: discrete_device(mconfig, DISCRETE, "DISCRETE", tag, owner, clock),
856		device_sound_interface(mconfig, *this)
	854	device_sound_interface(mconfig, *this),
	855	m_stream(NULL)
857	856	{
858	857	}
859	858
r250251	r250252
1104	1103	{
1105	1104	const discrete_base_node *node = discrete_find_node(offset);
1106	1105
1107		UINT8 data = 0;
	1106	UINT8 data;
1108	1107
1109	1108	/* Read the node input value if allowed */
1110	1109	if (node)
r250251	r250252
1142	1141	discrete_log("discrete_sound_w write to non-existent NODE_%02d\n", offset-NODE_00);
1143	1142	}
1144	1143	}
1145
1146		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
1147		#pragma GCC diagnostic pop
1148		#endif

trunk/src/devices/sound/samples.cpp

r250251	r250252
363	363	chan.source_num = -1;
364	364	if (samples > 0)
365	365	memset(buffer, 0, samples * sizeof(*buffer));
366		samples = 0;
367	366	break;
368	367	}
369	368	}

trunk/src/devices/sound/tms5110.cpp

r250251	r250252
726	726	m_u[2] = m_u[3] - matrix_multiply(m_current_k[2], m_x[2]);
727	727	m_u[1] = m_u[2] - matrix_multiply(m_current_k[1], m_x[1]);
728	728	m_u[0] = m_u[1] - matrix_multiply(m_current_k[0], m_x[0]);
	729	#ifdef DEBUG_LATTICE
	730	INT32 err = m_x[9] + matrix_multiply(m_current_k[9], m_u[9]); //x_10, real chip doesn't use or calculate this
	731	#endif
729	732	m_x[9] = m_x[8] + matrix_multiply(m_current_k[8], m_u[8]);
730	733	m_x[8] = m_x[7] + matrix_multiply(m_current_k[7], m_u[7]);
731	734	m_x[7] = m_x[6] + matrix_multiply(m_current_k[6], m_u[6]);
r250251	r250252
743	746	for (i = 9; i >= 0; i--)
744	747	{
745	748	fprintf(stderr,"Y%d:%04d ", i+1, m_u[i]);
	749	}
	750	fprintf(stderr,"\n");
	751	fprintf(stderr,"E:%04d ", err);
	752	for (i = 9; i >= 0; i--)
	753	{
746	754	fprintf(stderr,"b%d:%04d ", i+1, m_x[i]);
747		if ((i % 5) == 0) fprintf(stderr,"\n");
748	755	}
	756	fprintf(stderr,"\n");
749	757	#endif
750	758	return m_u[0];
751	759	}

trunk/src/devices/sound/tms5220.cpp

r250251	r250252
1129	1129	m_u[2] = m_u[3] - matrix_multiply(m_current_k[2], m_x[2]);
1130	1130	m_u[1] = m_u[2] - matrix_multiply(m_current_k[1], m_x[1]);
1131	1131	m_u[0] = m_u[1] - matrix_multiply(m_current_k[0], m_x[0]);
	1132	#ifdef DEBUG_LATTICE
	1133	INT32 err = m_x[9] + matrix_multiply(m_current_k[9], m_u[9]); //x_10, real chip doesn't use or calculate this
	1134	#endif
1132	1135	m_x[9] = m_x[8] + matrix_multiply(m_current_k[8], m_u[8]);
1133	1136	m_x[8] = m_x[7] + matrix_multiply(m_current_k[7], m_u[7]);
1134	1137	m_x[7] = m_x[6] + matrix_multiply(m_current_k[6], m_u[6]);
r250251	r250252
1146	1149	for (i = 9; i >= 0; i--)
1147	1150	{
1148	1151	fprintf(stderr,"Y%d:%04d ", i+1, m_u[i]);
	1152	}
	1153	fprintf(stderr,"\n");
	1154	fprintf(stderr,"E:%04d ", err);
	1155	for (i = 9; i >= 0; i--)
	1156	{
1149	1157	fprintf(stderr,"b%d:%04d ", i+1, m_x[i]);
1150		if ((i % 5) == 0) fprintf(stderr,"\n");
1151	1158	}
	1159	fprintf(stderr,"\n");
1152	1160	#endif
1153	1161	return m_u[0];
1154	1162	}

trunk/src/devices/sound/votrax.cpp

r250251	r250252
96	96
97	97	votrax_sc01_device::votrax_sc01_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
98	98	: device_t(mconfig, VOTRAX_SC01, "Votrax SC-01", tag, owner, clock, "votrax", __FILE__),
99		device_sound_interface(mconfig, *this),
100		m_stream(NULL),
101		m_phoneme_timer(NULL),
102		m_request_cb(*this)
	99	device_sound_interface(mconfig, *this),
	100	m_stream(NULL),
	101	m_phoneme_timer(NULL), m_rom(NULL), m_inflection(0), m_phoneme(0),
	102	m_request_cb(*this), m_request_state(0), m_internal_request(0), m_master_clock_freq(0), m_master_clock(0), m_counter_34(0),
	103	m_latch_70(0), m_latch_72(0), m_beta1(0), m_p2(0), m_p1(0), m_phi2(0), m_phi1(0), m_phi2_20(0), m_phi1_20(0), m_subphoneme_period(0),
	104	m_subphoneme_count(0), m_clock_88(0), m_latch_42(0), m_counter_84(0), m_latch_92(0), m_srff_132(false), m_srff_114(false), m_srff_112(false),
	105	m_srff_142(false), m_latch_80(0), m_counter_220(0), m_counter_222(0), m_counter_224(0), m_counter_234(0), m_counter_236(0), m_fgate(0),
	106	m_glottal_sync(0), m_0625_clock(0), m_counter_46(0), m_latch_46(0), m_latch_168(0), m_latch_170(0), m_f1(0), m_f2(0), m_fc(0), m_f3(0),
	107	m_f2q(0), m_va(0), m_fa(0), m_noise_clock(0), m_shift_252(0), m_counter_250(0)
103	108	{
104	109	}
105	110

trunk/src/devices/sound/ym2151.cpp

r250251	r250252
601	601
602	602	for (i=0; i<768; i++)
603	603	{
	604	#if 0
604	605	/* 3.4375 Hz is note A; C# is 4 semitones higher */
605	606	Hz = 1000;
606		#if 0
607		/* Hz is close, but not perfect */
	607	/* Hz is close, but not perfect */
608	608	//Hz = scaler * 3.4375 * pow (2, (i + 4 * 64 ) / 768.0 );
609	609	/* calculate phase increment */
610	610	phaseinc = (Hz*SIN_LEN) / (double)chip->sampfreq;
r250251	r250252
687	687
688	688	/* calculate timers' deltas */
689	689	/* User's Manual pages 15,16  */
690		mult = (1<<TIMER_SH);
	690	#ifndef USE_MAME_TIMERS
	691	mult = (1<<TIMER_SH);
	692	#endif
691	693	for (i=0; i<1024; i++)
692	694	{
693	695	/* ASG 980324: changed to compute both tim_A_tab and timer_A_time */

trunk/src/devices/video/mc6845.cpp

r250251	r250252
220	220	case 0x06:  m_vert_disp        =   data & 0x7f; break;
221	221	case 0x07:  m_vert_sync_pos    =   data & 0x7f; break;
222	222	case 0x08:  m_mode_control     =   data & 0xff; break;
223		case 0x09:  m_max_ras_addr     =   data & 0x1f; if (MODE_INTERLACE_AND_VIDEO) m_max_ras_addr += m_interlace_adjust; break;
	223	case 0x09:  m_max_ras_addr     =   data & 0x1f; break;
224	224	case 0x0a:  m_cursor_start_ras =   data & 0x7f; break;
225	225	case 0x0b:  m_cursor_end_ras   =   data & 0x1f; break;
226	226	case 0x0c:  m_disp_start_addr  = ((data & 0x3f) << 8) | (m_disp_start_addr & 0x00ff); break;
r250251	r250252
456	456	{
457	457	UINT16 hsync_on_pos, hsync_off_pos, vsync_on_pos, vsync_off_pos;
458	458
459		UINT16 video_char_height = m_max_ras_addr + 1;   // fix garbage at the bottom of the screen (eg victor9k)
	459	UINT16 video_char_height = m_max_ras_addr + (MODE_INTERLACE_AND_VIDEO ? m_interlace_adjust : m_noninterlace_adjust);   // fix garbage at the bottom of the screen (eg victor9k)
460	460	// Would be useful for 'interlace and video' mode support...
461	461	// UINT16 frame_char_height = (MODE_INTERLACE_AND_VIDEO ? m_max_ras_addr / 2 : m_max_ras_addr) + 1;
462	462
r250251	r250252
654	654	// For rudimentary 'interlace and video' support, m_raster_counter increments by 1 rather than the correct 2.
655	655	// The correct test would be:
656	656	// if ( m_raster_counter == (MODE_INTERLACE_AND_VIDEO ? m_max_ras_addr + 1 : m_max_ras_addr) )
657		if ( m_raster_counter == m_max_ras_addr )
	657	if ( m_raster_counter == m_max_ras_addr + (MODE_INTERLACE_AND_VIDEO ? m_interlace_adjust : m_noninterlace_adjust) - 1 )
658	658	{
659	659	/* Check if we have reached the end of the vertical area */
660	660	if ( m_line_counter == m_vert_char_total )
r250251	r250252
922	922	UINT8 mc6845_device::draw_scanline(int y, bitmap_rgb32 &bitmap, const rectangle &cliprect)
923	923	{
924	924	/* compute the current raster line */
925		UINT8 ra = y % (m_max_ras_addr + 1);
	925	UINT8 ra = y % (m_max_ras_addr + (MODE_INTERLACE_AND_VIDEO ? m_interlace_adjust : m_noninterlace_adjust));
926	926
927	927	/* check if the cursor is visible and is on this scanline */
928	928	int cursor_visible = m_cursor_state &&
r250251	r250252
943	943	if (MODE_ROW_COLUMN_ADDRESSING)
944	944	{
945	945	UINT8 cc = 0;
946		UINT8 cr = y / (m_max_ras_addr + 1);
	946	UINT8 cr = y / (m_max_ras_addr + (MODE_INTERLACE_AND_VIDEO ? m_interlace_adjust : m_noninterlace_adjust));
947	947	UINT16 ma = (cr << 8) | cc;
948	948
949	949	m_update_row_cb(bitmap, cliprect, ma, ra, y, m_horiz_disp, cursor_x, de, hbp, vbp);
r250251	r250252
954	954	}
955	955
956	956	/* update MA if the last raster address */
957		if (ra == m_max_ras_addr)
	957	if (ra == m_max_ras_addr + (MODE_INTERLACE_AND_VIDEO ? m_interlace_adjust : m_noninterlace_adjust) - 1)
958	958	m_current_disp_addr = (m_current_disp_addr + m_horiz_disp) & 0x3fff;
959	959
960	960	return ra;
r250251	r250252
1064	1064	m_line_address = 0;
1065	1065	m_current_disp_addr = 0;
1066	1066	m_disp_start_addr = 0;
	1067	m_noninterlace_adjust = 1;
	1068	m_interlace_adjust = 1;
1067	1069
1068	1070	save_item(NAME(m_show_border_area));
1069	1071	save_item(NAME(m_visarea_adjust_min_x));
r250251	r250252
1173	1175	m_supports_status_reg_d6 = false;
1174	1176	m_supports_status_reg_d7 = false;
1175	1177	m_supports_transparent = false;
	1178
	1179	// Non-interlace Mode, Interlace Sync Mode - When total number of rasters is RN, RN-1 shall be programmed.
	1180	m_noninterlace_adjust = 1;
	1181	// Interlace Sync & Video Mode - When total number of rasters is RN, RN-2 shall be programmed.
	1182	m_interlace_adjust = 2;
1176	1183	}
1177	1184
1178	1185

trunk/src/devices/video/mc6845.h

r250251	r250252
167	167	void set_hpixels_per_column(int hpixels_per_column);
168	168
169	169	/* updates the screen -- this will call begin_update(),
170		followed by update_row() reapeatedly and after all row
	170	followed by update_row() repeatedly and after all row
171	171	updating is complete, end_update() */
172	172	UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
173	173
r250251	r250252
283	283	************************/
284	284
285	285	bool m_show_border_area;        /* visible screen area (false) active display (true) active display + blanking */
286		int m_interlace_adjust; /* adjust max ras in interlace mode */
	286	int m_noninterlace_adjust;      /* adjust max ras in non-interlace mode */
	287	int m_interlace_adjust;         /* adjust max ras in interlace mode */
287	288
288	289	/* visible screen area adjustment */
289	290	int m_visarea_adjust_min_x;
r250251	r250252
314	315	* vblank/hblank timing not supported yet! */
315	316	mc6845_on_update_addr_changed_delegate m_on_update_addr_changed_cb;
316	317
317		/* if specified, this gets called for every change of the disply enable pin (pin 18) */
	318	/* if specified, this gets called for every change of the display enable pin (pin 18) */
318	319	devcb_write_line            m_out_de_cb;
319	320
320	321	/* if specified, this gets called for every change of the cursor pin (pin 19) */

trunk/src/devices/video/poly.h

r250251	r250252
656	656	v3 = tv;
657	657	if (v2->y < v1->y)
658	658	{
659		const vertex_t *tv = v1;
	659	const vertex_t *tv2 = v1;
660	660	v1 = v2;
661		v2 = tv;
	661	v2 = tv2;
662	662	}
663	663	}
664	664
r250251	r250252
1002	1002	edgeptr->dxdy = (edgeptr->v2->x - edgeptr->v1->x) * ooy;
1003	1003	for (int paramnum = 0; paramnum < paramcount; paramnum++)
1004	1004	edgeptr->dpdy[paramnum] = (edgeptr->v2->p[paramnum] - edgeptr->v1->p[paramnum]) * ooy;
1005		edgeptr++;
	1005	++edgeptr;
1006	1006	}
1007	1007
1008	1008	// walk backward to build up the backward edge list
r250251	r250252
1023	1023	edgeptr->dxdy = (edgeptr->v2->x - edgeptr->v1->x) * ooy;
1024	1024	for (int paramnum = 0; paramnum < paramcount; paramnum++)
1025	1025	edgeptr->dpdy[paramnum] = (edgeptr->v2->p[paramnum] - edgeptr->v1->p[paramnum]) * ooy;
1026		edgeptr++;
	1026	++edgeptr;
1027	1027	}
1028	1028
1029	1029	// determine which list is left/right:
r250251	r250252
1068	1068	// compute the ending X based on which part of the triangle we're in
1069	1069	_BaseType fully = _BaseType(curscan + extnum) + _BaseType(0.5);
1070	1070	while (fully > ledge->v2->y && fully < v[maxv].y)
1071		ledge++;
	1071	++ledge;
1072	1072	while (fully > redge->v2->y && fully < v[maxv].y)
1073		redge++;
	1073	++redge;
1074	1074	_BaseType startx = ledge->v1->x + (fully - ledge->v1->y) * ledge->dxdy;
1075	1075	_BaseType stopx = redge->v1->x + (fully - redge->v1->y) * redge->dxdy;
1076	1076
r250251	r250252
1159	1159	nextout->y = v1.y + frac * (v2.y - v1.y);
1160	1160	for (int paramnum = 0; paramnum < paramcount; paramnum++)
1161	1161	nextout->p[paramnum] = v1.p[paramnum] + frac * (v2.p[paramnum] - v1.p[paramnum]);
1162		nextout++;
	1162	++nextout;
1163	1163	}
1164	1164
1165	1165	// if this vertex is not clipped, copy it in

trunk/src/devices/video/saa5050.cpp

r250251	r250252
12	12
13	13	TODO:
14	14
	15	- interlace, use CRS to output odd/even fields
15	16	- remote controller input
16	17	- boxing
17	18
r250251	r250252
535	536	m_ra++;
536	537	m_ra %= 20;
537	538
538		if (m_ra == 19)
	539	if (!m_ra)
539	540	{
540	541	if (m_double_height_bottom_row)
541	542	m_double_height_bottom_row = false;

trunk/src/emu/addrmap.cpp

r250251	r250252
29	29	m_addrmask(0),
30	30	m_share(NULL),
31	31	m_region(NULL),
32		m_rgnoffs(0),
	32	m_rgnoffs(0),
	33	m_submap_bits(0),
33	34	m_memory(NULL),
34	35	m_bytestart(0),
35	36	m_byteend(0),

trunk/src/emu/audit.cpp

r250251	r250252
15	15	#include "sound/samples.h"
16	16	#include "softlist.h"
17	17
18		// for now, make buggy GCC/Mingw STFU about I64FMT
19		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
20		#pragma GCC diagnostic push
21		#pragma GCC diagnostic ignored "-Wformat"
22		#pragma GCC diagnostic ignored "-Wformat-extra-args"
23		#endif
24
25
26	18	//**************************************************************************
27	19	//  CORE FUNCTIONS
28	20	//**************************************************************************
r250251	r250252
278	270	int found = 0;
279	271
280	272	// iterate over sample entries
281		samples_device_iterator iter(m_enumerator.config().root_device());
282		for (samples_device *device = iter.first(); device != NULL; device = iter.next())
	273	samples_device_iterator iterator(m_enumerator.config().root_device());
	274	for (samples_device *device = iterator.first(); device != NULL; device = iterator.next())
283	275	{
284	276	// by default we just search using the driver name
285	277	std::string searchpath(m_enumerator.driver().name);
r250251	r250252
615	607	m_shared_device(NULL)
616	608	{
617	609	}
618
619		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
620		#pragma GCC diagnostic pop
621		#endif

trunk/src/emu/config.cpp

r250251	r250252
86	86	newtype->save = save;
87	87
88	88	/* add us to the end */
89		for (ptype = &typelist; *ptype; ptype = &(*ptype)->next) ;
	89	for (ptype = &typelist; *ptype; ptype = &(*ptype)->next) { }
90	90	*ptype = newtype;
91	91	}
92	92

trunk/src/emu/debug/debugcmd.cpp

r250251	r250252
1353	1353	address_space *space;
1354	1354	const char *action = NULL;
1355	1355	UINT64 address, length;
1356		int type = 0;
	1356	int type;
1357	1357	int wpnum;
1358	1358
1359	1359	/* CPU is implicit */
r250251	r250252
1484	1484	/* loop over all CPUs */
1485	1485	device_iterator iter(machine.root_device());
1486	1486	for (device_t *device = iter.first(); device != NULL; device = iter.next())
1487		for (address_spacenum spacenum = AS_0; spacenum < ADDRESS_SPACES; spacenum++)
	1487	for (address_spacenum spacenum = AS_0; spacenum < ADDRESS_SPACES; ++spacenum)
1488	1488	if (device->debug()->watchpoint_first(spacenum) != NULL)
1489	1489	{
1490	1490	static const char *const types[] = { "unkn ", "read ", "write", "r/w  " };
r250251	r250252
1830	1830	{
1831	1831	UINT64 offset, endoffset, length, width = 0, ascii = 1;
1832	1832	address_space *space;
1833		FILE *f = NULL;
	1833	FILE *f;
1834	1834	UINT64 i, j;
1835	1835
1836	1836	/* validate parameters */
r250251	r250252
1984	1984	/* initialize entire memory by default */
1985	1985	if (params <= 1)
1986	1986	{
1987		offset = 0;
1988		length = space->bytemask() + 1;
1989	1987	for (entry = space->map()->m_entrylist.first(); entry != NULL; entry = entry->next())
1990	1988	{
1991	1989	cheat_region[region_count].offset = space->address_to_byte(entry->m_addrstart) & space->bytemask();
r250251	r250252
2456	2454	UINT64 offset, length, bytes = 1;
2457	2455	int minbytes, maxbytes, byteswidth;
2458	2456	address_space *space, *decrypted_space;
2459		FILE *f = NULL;
	2457	FILE *f;
2460	2458	int j;
2461	2459
2462	2460	/* validate parameters */

trunk/src/emu/debug/debugcon.cpp

r250251	r250252
11	11	#include "emu.h"
12	12	#include "debugcon.h"
13	13	#include "debugcpu.h"
14		#include "debughlp.h"
15	14	#include "debugvw.h"
16	15	#include "textbuf.h"
17	16	#include "debugger.h"
r250251	r250252
270	269	{
271	270	char command[MAX_COMMAND_LENGTH], parens[MAX_COMMAND_LENGTH];
272	271	char *params[MAX_COMMAND_PARAMS] = { 0 };
273		CMDERR result = CMDERR_NONE;
	272	CMDERR result;
274	273	char *command_start;
275	274	char *p, c = 0;
276	275

trunk/src/emu/debug/debugcpu.cpp

r250251	r250252
12	12	#include "emuopts.h"
13	13	#include "osdepend.h"
14	14	#include "debugcpu.h"
15		#include "debugcmd.h"
16	15	#include "debugcon.h"
17	16	#include "express.h"
18	17	#include "debugvw.h"
r250251	r250252
2378	2377	bool device_debug::watchpoint_clear(int index)
2379	2378	{
2380	2379	// scan the list to see if we own this breakpoint
2381		for (address_spacenum spacenum = AS_0; spacenum < ARRAY_LENGTH(m_wplist); spacenum++)
	2380	for (address_spacenum spacenum = AS_0; spacenum < ARRAY_LENGTH(m_wplist); ++spacenum)
2382	2381	for (watchpoint **wp = &m_wplist[spacenum]; *wp != NULL; wp = &(*wp)->m_next)
2383	2382	if ((*wp)->m_index == index)
2384	2383	{
r250251	r250252
2402	2401	void device_debug::watchpoint_clear_all()
2403	2402	{
2404	2403	// clear the head until we run out
2405		for (address_spacenum spacenum = AS_0; spacenum < ARRAY_LENGTH(m_wplist); spacenum++)
	2404	for (address_spacenum spacenum = AS_0; spacenum < ARRAY_LENGTH(m_wplist); ++spacenum)
2406	2405	while (m_wplist[spacenum] != NULL)
2407	2406	watchpoint_clear(m_wplist[spacenum]->index());
2408	2407	}
r250251	r250252
2416	2415	bool device_debug::watchpoint_enable(int index, bool enable)
2417	2416	{
2418	2417	// scan the list to see if we own this watchpoint
2419		for (address_spacenum spacenum = AS_0; spacenum < ARRAY_LENGTH(m_wplist); spacenum++)
	2418	for (address_spacenum spacenum = AS_0; spacenum < ARRAY_LENGTH(m_wplist); ++spacenum)
2420	2419	for (watchpoint *wp = m_wplist[spacenum]; wp != NULL; wp = wp->next())
2421	2420	if (wp->m_index == index)
2422	2421	{
r250251	r250252
2438	2437	void device_debug::watchpoint_enable_all(bool enable)
2439	2438	{
2440	2439	// apply the enable to all watchpoints we own
2441		for (address_spacenum spacenum = AS_0; spacenum < ARRAY_LENGTH(m_wplist); spacenum++)
	2440	for (address_spacenum spacenum = AS_0; spacenum < ARRAY_LENGTH(m_wplist); ++spacenum)
2442	2441	for (watchpoint *wp = m_wplist[spacenum]; wp != NULL; wp = wp->next())
2443	2442	watchpoint_enable(wp->index(), enable);
2444	2443	}

trunk/src/emu/debug/debugvw.cpp

r250251	r250252
17	17	#include "dvmemory.h"
18	18	#include "dvbpoints.h"
19	19	#include "dvwpoints.h"
20		#include "debugcmd.h"
21	20	#include "debugcpu.h"
22		#include "debugcon.h"
23	21	#include <ctype.h>
24	22
25	23
r250251	r250252
443	441	debug_view *debug_view_manager::append(debug_view *view)
444	442	{
445	443	debug_view **viewptr;
446		for (viewptr = &m_viewlist; *viewptr != NULL; viewptr = &(*viewptr)->m_next) ;
	444	for (viewptr = &m_viewlist; *viewptr != NULL; viewptr = &(*viewptr)->m_next) { }
447	445	*viewptr = view;
448	446	return view;
449	447	}

trunk/src/emu/debug/debugvw.h

r250251	r250252
162	162	const simple_list<debug_view_source> &source_list() const { return m_source_list; }
163	163
164	164	// setters
165		void set_size(int width, int height);
166	165	void set_visible_size(debug_view_xy size);
167	166	void set_visible_position(debug_view_xy pos);
168	167	void set_cursor_position(debug_view_xy pos);

trunk/src/emu/debug/dvmemory.cpp

r250251	r250252
133	133	memory_interface_iterator iter(machine().root_device());
134	134	for (device_memory_interface *memintf = iter.first(); memintf != NULL; memintf = iter.next())
135	135	if (&memintf->device() != &machine().root_device())
136		for (address_spacenum spacenum = AS_0; spacenum < ADDRESS_SPACES; spacenum++)
	136	for (address_spacenum spacenum = AS_0; spacenum < ADDRESS_SPACES; ++spacenum)
137	137	if (memintf->has_space(spacenum))
138	138	{
139	139	address_space &space = memintf->space(spacenum);

trunk/src/emu/debug/dvmemory.h

r250251	r250252
11	11	#ifndef __DVMEMORY_H__
12	12	#define __DVMEMORY_H__
13	13
14		#include "dvstate.h"
15
16
17	14	//**************************************************************************
18	15	//  TYPE DEFINITIONS
19	16	//**************************************************************************

trunk/src/emu/debug/dvwpoints.cpp

r250251	r250252
231	231	{
232	232	// Collect
233	233	device_debug &debugInterface = *source->device()->debug();
234		for (address_spacenum spacenum = AS_0; spacenum < ADDRESS_SPACES; spacenum++)
	234	for (address_spacenum spacenum = AS_0; spacenum < ADDRESS_SPACES; ++spacenum)
235	235	{
236	236	for (device_debug::watchpoint *wp = debugInterface.watchpoint_first(spacenum); wp != NULL; wp = wp->next())
237	237	m_buffer.push_back(wp);

trunk/src/emu/debug/express.cpp

r250251	r250252
1105	1105	throw expression_error(expression_error::INVALID_TOKEN, token.offset());
1106	1106
1107	1107	// convert the space to flags
1108		expression_space memspace = EXPSPACE_INVALID;
	1108	expression_space memspace;
1109	1109	switch (space)
1110	1110	{
1111	1111	case 'p':   memspace = physical ? EXPSPACE_PROGRAM_PHYSICAL : EXPSPACE_PROGRAM_LOGICAL; break;
r250251	r250252
1219	1219
1220	1220	// loop over all the original tokens
1221	1221	parse_token *prev = NULL;
1222		parse_token *next = NULL;
	1222	parse_token *next;
1223	1223	for (parse_token *token = m_tokenlist.detach_all(); token != NULL; prev = token, token = next)
1224	1224	{
1225	1225	// pre-determine our next token

trunk/src/emu/debugger.cpp

r250251	r250252
13	13	#include "debug/debugcpu.h"
14	14	#include "debug/debugcmd.h"
15	15	#include "debug/debugcon.h"
16		#include "debug/express.h"
17	16	#include "debug/debugvw.h"
18	17	#include <ctype.h>
19	18

trunk/src/emu/devcb.cpp

r250251	r250252
108	108	//-------------------------------------------------
109	109
110	110	devcb_read_base::devcb_read_base(device_t &device, UINT64 defmask)
111		: devcb_base(device, defmask)
	111	: devcb_base(device, defmask),
	112	m_adapter(NULL)
112	113	{
113	114	}
114	115
r250251	r250252
335	336	//-------------------------------------------------
336	337
337	338	devcb_write_base::devcb_write_base(device_t &device, UINT64 defmask)
338		: devcb_base(device, defmask)
	339	: devcb_base(device, defmask),
	340	m_adapter(NULL)
339	341	{
340	342	}
341	343

trunk/src/emu/devcpu.cpp

r250251	r250252
9	9	***************************************************************************/
10	10
11	11	#include "emu.h"
12		#include "debugger.h"
13	12	#include <ctype.h>
14	13
15	14

trunk/src/emu/devfind.cpp

r250251	r250252
40	40	//  find_memregion - find memory region
41	41	//-------------------------------------------------
42	42
43		void *finder_base::find_memregion(UINT8 width, size_t &length, bool required)
	43	void *finder_base::find_memregion(UINT8 width, size_t &length, bool required) const
44	44	{
45	45	// look up the region and return NULL if not found
46	46	memory_region *region = m_base.memregion(m_tag);

trunk/src/emu/devfind.h

r250251	r250252
53	53
54	54	protected:
55	55	// helpers
56		void *find_memregion(UINT8 width, size_t &length, bool required);
	56	void *find_memregion(UINT8 width, size_t &length, bool required) const;
57	57	void *find_memshare(UINT8 width, size_t &bytes, bool required);
58	58	bool report_missing(bool found, const char *objname, bool required);
59	59
r250251	r250252
80	80
81	81	// operators to make use transparent
82	82	operator _ObjectClass *() const { return m_target; }
83		_ObjectClass *operator->() const { assert(m_target != NULL); return m_target; }
84	83
	84	virtual _ObjectClass *operator->() const { assert(m_target != NULL); return m_target; }
	85
85	86	// getter for explicit fetching
86	87	_ObjectClass *target() const { return m_target; }
87	88

trunk/src/emu/device.cpp

r250251	r250252
14	14	#include "debug/debugcpu.h"
15	15
16	16
17
18	17	//**************************************************************************
19		//  CONSTANTS
20		//**************************************************************************
21
22		#define TEMP_STRING_POOL_ENTRIES        16
23		#define MAX_STRING_LENGTH               256
24
25
26
27		//**************************************************************************
28		//  GLOBAL VARIABLES
29		//**************************************************************************
30
31		static char temp_string_pool[TEMP_STRING_POOL_ENTRIES][MAX_STRING_LENGTH];
32		static int temp_string_pool_index;
33
34
35
36		//**************************************************************************
37		//  INLINE FUNCTIONS
38		//**************************************************************************
39
40		//-------------------------------------------------
41		//  get_temp_string_buffer - return a pointer to
42		//  a temporary string buffer
43		//-------------------------------------------------
44
45		char *get_temp_string_buffer(void)
46		{
47		char *string = &temp_string_pool[temp_string_pool_index++ % TEMP_STRING_POOL_ENTRIES][0];
48		string[0] = 0;
49		return string;
50		}
51
52
53		resource_pool &machine_get_pool(running_machine &machine)
54		{
55		// temporary to get around include dependencies, until CPUs
56		// get a proper device class
57		return machine.respool();
58		}
59
60
61
62		//**************************************************************************
63	18	//  LIVE DEVICE MANAGEMENT
64	19	//**************************************************************************
65	20
r250251	r250252
898	853	m_type(type)
899	854	{
900	855	device_interface **tailptr;
901		for (tailptr = &device.m_interface_list; *tailptr != NULL; tailptr = &(*tailptr)->m_interface_next) ;
	856	for (tailptr = &device.m_interface_list; *tailptr != NULL; tailptr = &(*tailptr)->m_interface_next) { }
902	857	*tailptr = this;
903	858	}
904	859

trunk/src/emu/device.h

r250251	r250252
198	198
199	199	// debugging
200	200	device_debug *debug() const { return m_debug; }
201		offs_t safe_pc();
202		offs_t safe_pcbase();
	201	offs_t safe_pc() const;
	202	offs_t safe_pcbase() const;
203	203
204	204	void set_default_bios(UINT8 bios) { m_default_bios = bios; }
205	205	void set_system_bios(UINT8 bios) { m_system_bios = bios; }

trunk/src/emu/diexec.h

r250251	r250252
166	166	void set_input_line(int linenum, int state) { m_input[linenum].set_state_synced(state); }
167	167	void set_input_line_vector(int linenum, int vector) { m_input[linenum].set_vector(vector); }
168	168	void set_input_line_and_vector(int linenum, int state, int vector) { m_input[linenum].set_state_synced(state, vector); }
169		int input_state(int linenum) { return m_input[linenum].m_curstate; }
	169	int input_state(int linenum) const { return m_input[linenum].m_curstate; }
170	170
171	171	// suspend/resume
172	172	void suspend(UINT32 reason, bool eatcycles);
173	173	void resume(UINT32 reason);
174		bool suspended(UINT32 reason = SUSPEND_ANY_REASON) { return (m_nextsuspend & reason) != 0; }
	174	bool suspended(UINT32 reason = SUSPEND_ANY_REASON) const { return (m_nextsuspend & reason) != 0; }
175	175	void yield() { suspend(SUSPEND_REASON_TIMESLICE, false); }
176	176	void spin() { suspend(SUSPEND_REASON_TIMESLICE, true); }
177	177	void spin_until_trigger(int trigid) { suspend_until_trigger(trigid, true); }
r250251	r250252
195	195	device_execute_interface &execute() { return *this; }
196	196
197	197	protected:
198		// internal helpers
199		void run_thread_wrapper();
200
201	198	// clock and cycle information getters
202	199	virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const;
203	200	virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const;

trunk/src/emu/digfx.cpp

r250251	r250252
22	22
23	23	device_gfx_interface::device_gfx_interface(const machine_config &mconfig, device_t &device,
24	24	const gfx_decode_entry *gfxinfo, const char *palette_tag)
25		: device_interface(device, "gfx"),
	25	: device_interface(device, "gfx"),
	26	m_palette(NULL),
26	27	m_gfxdecodeinfo(gfxinfo),
27	28	m_palette_tag(palette_tag),
28	29	m_palette_is_sibling(palette_tag == NULL),

trunk/src/emu/diimage.cpp

r250251	r250252
14	14	#include "ui/ui.h"
15	15	#include "ui/menu.h"
16	16	#include "zippath.h"
17		#include "ui/filesel.h"
18		#include "ui/swlist.h"
19	17	#include "ui/imgcntrl.h"
20	18	#include "softlist.h"
21	19	#include "image.h"
r250251	r250252
57	55
58	56	device_image_interface::device_image_interface(const machine_config &mconfig, device_t &device)
59	57	: device_interface(device, "image"),
	58	m_err(),
60	59	m_file(NULL),
61	60	m_mame_file(NULL),
62	61	m_software_info_ptr(NULL),
63		m_software_part_ptr(NULL),
	62	m_software_part_ptr(NULL),
	63	m_supported(0),
64	64	m_readonly(false),
65		m_created(false),
	65	m_created(false),
	66	m_init_phase(false),
	67	m_from_swlist(false),
	68	m_create_format(0),
	69	m_create_args(NULL),
66	70	m_is_loading(FALSE)
67	71	{
68	72	}
r250251	r250252
575	579
576	580	image_error_t device_image_interface::load_image_by_path(UINT32 open_flags, const char *path)
577	581	{
578		file_error filerr = FILERR_NOT_FOUND;
579		image_error_t err = IMAGE_ERROR_FILENOTFOUND;
	582	file_error filerr;
	583	image_error_t err;
580	584	std::string revised_path;
581	585
582	586	/* attempt to read the file */
r250251	r250252
629	633	if(m_file)
630	634	core_fclose(m_file);
631	635
632		file_error filerr = FILERR_NOT_FOUND;
633		image_error_t err = IMAGE_ERROR_FILENOTFOUND;
	636	file_error filerr;
	637	image_error_t err;
634	638	std::string revised_path;
635	639
636	640	/* attempt to open the file for writing*/

trunk/src/emu/diimage.h

r250251	r250252
253	253	void setup_working_directory();
254	254	bool try_change_working_directory(const char *subdir);
255	255
256		int read_hash_config(const char *sysname);
257	256	void run_hash(void (*partialhash)(hash_collection &, const unsigned char *, unsigned long, const char *), hash_collection &hashes, const char *types);
258	257	void image_checkhash();
259	258	void update_names(const device_type device_type = NULL, const char *inst = NULL, const char *brief = NULL);

trunk/src/emu/dimemory.cpp

r250251	r250252
241	241	bool detected_overlap = DETECT_OVERLAPPING_MEMORY ? false : true;
242	242
243	243	// loop over all address spaces
244		for (address_spacenum spacenum = AS_0; spacenum < ADDRESS_SPACES; spacenum++)
	244	for (address_spacenum spacenum = AS_0; spacenum < ADDRESS_SPACES; ++spacenum)
245	245	{
246	246	const address_space_config *spaceconfig = space_config(spacenum);
247	247	if (spaceconfig != NULL)

trunk/src/emu/dinetwork.cpp

r250251	r250252
16	16	{
17	17	}
18	18
19		int device_network_interface::send(UINT8 *buf, int len)
	19	int device_network_interface::send(UINT8 *buf, int len) const
20	20	{
21	21	if(!m_dev) return 0;
22	22	return m_dev->send(buf, len);

trunk/src/emu/dinetwork.h

r250251	r250252
19	19	bool get_promisc() { return m_promisc; }
20	20	int get_interface() { return m_intf; }
21	21
22		int send(UINT8 *buf, int len);
	22	int send(UINT8 *buf, int len) const;
23	23	virtual void recv_cb(UINT8 *buf, int len);
24	24
25	25	protected:

trunk/src/emu/dioutput.cpp

r250251	r250252
35	35	{
36	36	}
37	37
38		void device_output_interface::set_output_value(int value)
	38	void device_output_interface::set_output_value(int value) const
39	39	{
40	40	if (m_output_name)
41	41	output_set_value(m_output_name, value);
r250251	r250252
43	43	fatalerror("Output name not set!");
44	44	}
45	45
46		void device_output_interface::set_led_value(int value)
	46	void device_output_interface::set_led_value(int value) const
47	47	{
48	48	if (m_output_name)
49	49	output_set_value(m_output_name, value);
r250251	r250252
51	51	output_set_led_value(m_output_index, value);
52	52	}
53	53
54		void device_output_interface::set_lamp_value(int value)
	54	void device_output_interface::set_lamp_value(int value) const
55	55	{
56	56	if (m_output_name)
57	57	output_set_value(m_output_name, value);
r250251	r250252
59	59	output_set_lamp_value(m_output_index, value);
60	60	}
61	61
62		void device_output_interface::set_digit_value(int value)
	62	void device_output_interface::set_digit_value(int value) const
63	63	{
64	64	if (m_output_name)
65	65	output_set_value(m_output_name, value);

trunk/src/emu/dioutput.h

r250251	r250252
47	47	static void set_output_index(device_t &device, int index) { dynamic_cast<device_output_interface &>(device).m_output_index = index; }
48	48	static void set_output_name(device_t &device, const char *name) { dynamic_cast<device_output_interface &>(device).m_output_name = name; }
49	49
50		void set_output_value(int value);
51		void set_led_value(int value);
52		void set_lamp_value(int value);
53		void set_digit_value(int value);
	50	void set_output_value(int value) const;
	51	void set_led_value(int value) const;
	52	void set_lamp_value(int value) const;
	53	void set_digit_value(int value) const;
54	54
55	55	protected:
56	56	int m_output_index;

trunk/src/emu/dipty.cpp

r250251	r250252
53	53	return m_opened;
54	54	}
55	55
56		ssize_t device_pty_interface::read(UINT8 *rx_chars , size_t count)
	56	ssize_t device_pty_interface::read(UINT8 *rx_chars , size_t count) const
57	57	{
58	58	UINT32 actual_bytes;
59	59
r250251	r250252
64	64	}
65	65	}
66	66
67		void device_pty_interface::write(UINT8 tx_char)
	67	void device_pty_interface::write(UINT8 tx_char) const
68	68	{
69	69	UINT32 actual_bytes;
70	70

trunk/src/emu/dipty.h

r250251	r250252
29	29
30	30	bool is_open(void) const;
31	31
32		ssize_t read(UINT8 *rx_chars , size_t count);
33		void write(UINT8 tx_char);
	32	ssize_t read(UINT8 *rx_chars , size_t count) const;
	33	void write(UINT8 tx_char) const;
34	34
35	35	bool is_slave_connected(void) const;
36	36

trunk/src/emu/dirtc.h

r250251	r250252
55	55	void set_current_time(running_machine &machine);
56	56
57	57	protected:
58		UINT8 convert_to_bcd(int val);
59		int bcd_to_integer(UINT8 val);
	58	static UINT8 convert_to_bcd(int val);
	59	static int bcd_to_integer(UINT8 val);
60	60
61	61	void set_clock_register(int register, int value);
62	62	int get_clock_register(int register);

trunk/src/emu/diserial.cpp

r250251	r250252
19	19	m_rcv_register_data(0x8000),
20	20	m_rcv_flags(0),
21	21	m_rcv_bit_count_received(0),
22		m_rcv_bit_count(0),
	22	m_rcv_bit_count(0),
	23	m_rcv_byte_received(0),
23	24	m_rcv_framing_error(false),
24	25	m_rcv_parity_error(false),
25		m_tra_flags(TRANSMIT_REGISTER_EMPTY),
	26	m_tra_register_data(0),
	27	m_tra_flags(TRANSMIT_REGISTER_EMPTY),
	28	m_tra_bit_count_transmitted(0),
	29	m_tra_bit_count(0),
26	30	m_rcv_clock(NULL),
27	31	m_tra_clock(NULL),
28	32	m_rcv_rate(attotime::never),

trunk/src/emu/dislot.cpp

r250251	r250252
20	20	{
21	21	}
22	22
23		device_slot_option::device_slot_option(const char *name, const device_type &devtype):
24		m_name(name),
	23	device_slot_option::device_slot_option(const char *name, const device_type &devtype):
	24	m_next(NULL),
	25	m_name(name),
25	26	m_devtype(devtype),
26	27	m_selectable(true),
27	28	m_default_bios(NULL),

trunk/src/emu/disound.cpp

r250251	r250252
194	194	{
195	195	for (sound_stream *stream = m_device.machine().sound().first_stream(); stream != NULL; stream = stream->next())
196	196	if (&stream->device() == &device())
197		for (int outputnum = 0; outputnum < stream->output_count(); outputnum++)
198		stream->set_output_gain(outputnum, gain);
	197	for (int num = 0; num < stream->output_count(); num++)
	198	stream->set_output_gain(num, gain);
199	199	}
200	200
201	201	// look up the stream and stream output index

trunk/src/emu/distate.cpp

r250251	r250252
146	146	UINT64 device_state_entry::value() const
147	147	{
148	148	// pick up the value
149		UINT64 result = ~(UINT64)0;
	149	UINT64 result;
150	150	switch (m_datasize)
151	151	{
152	152	default:
r250251	r250252
172	172	bool leadzero = false;
173	173	bool percent = false;
174	174	bool explicitsign = false;
175		bool hitnonzero = false;
	175	bool hitnonzero;
176	176	bool reset = true;
177	177	int width = 0;
178	178	for (const char *fptr = m_format.c_str(); *fptr != 0; fptr++)

trunk/src/emu/distate.h

r250251	r250252
195	195	//  or 0 if no state object exists
196	196	//-------------------------------------------------
197	197
198		inline offs_t device_t::safe_pc()
	198	inline offs_t device_t::safe_pc() const
199	199	{
200	200	return (m_state != NULL) ? m_state->pc() : 0;
201	201	}
r250251	r250252
206	206	//  base or 0 if no state object exists
207	207	//-------------------------------------------------
208	208
209		inline offs_t device_t::safe_pcbase()
	209	inline offs_t device_t::safe_pcbase() const
210	210	{
211	211	return (m_state != NULL) ? m_state->pcbase() : 0;
212	212	}

trunk/src/emu/drawgfxm.h

r250251	r250252
50	50	#ifndef __DRAWGFXM_H__
51	51	#define __DRAWGFXM_H__
52	52
53		#include "profiler.h"
54
55
56	53	/* special priority type meaning "none" */
57	54	struct NO_PRIORITY { char dummy[3]; };
58	55

trunk/src/emu/drivenum.cpp

r250251	r250252
395	395	//  we're done with it
396	396	//-------------------------------------------------
397	397
398		void driver_enumerator::release_current()
	398	void driver_enumerator::release_current() const
399	399	{
400	400	// skip if no current entry
401	401	if (m_current < 0 || m_current >= s_driver_count)

trunk/src/emu/drivenum.h

r250251	r250252
117	117
118	118	private:
119	119	// internal helpers
120		void release_current();
	120	void release_current() const;
121	121
122	122	// entry in the config cache
123	123	struct config_entry

trunk/src/emu/drivers/testcpu.cpp

r250251	r250252
32	32	testcpu_state(const machine_config &mconfig, device_type type, const char *tag)
33	33	: driver_device(mconfig, type, tag),
34	34	m_cpu(*this, "maincpu"),
35		m_ram(*this, "ram")
	35	m_ram(*this, "ram"),
	36	m_space(NULL)
36	37	{
37	38	}
38	39

trunk/src/emu/emualloc.cpp

r250251	r250252
9	9	***************************************************************************/
10	10
11	11	#include "emucore.h"
12		#include "coreutil.h"
13	12
14	13
15	14	//**************************************************************************

trunk/src/emu/emuopts.cpp

r250251	r250252
290	290	}
291	291	}
292	292	}
293		while (add_slot_options(false));
	293	while (add_slot_options(false)) { }
294	294	add_device_options(false);
295	295	}
296	296
r250251	r250252
359	359	bool emu_options::parse_slot_devices(int argc, char *argv[], std::string &error_string, const char *name, const char *value)
360	360	{
361	361	// an initial parse to capture the initial set of values
362		bool result = core_options::parse_command_line(argc, argv, OPTION_PRIORITY_CMDLINE, error_string);
	362	bool result;
	363
	364	core_options::parse_command_line(argc, argv, OPTION_PRIORITY_CMDLINE, error_string);
363	365
364	366	// keep adding slot options until we stop seeing new stuff
365	367	bool isfirstpass = true;
366	368	while (add_slot_options(isfirstpass))
367	369	{
368		result = core_options::parse_command_line(argc, argv, OPTION_PRIORITY_CMDLINE, error_string);
	370	core_options::parse_command_line(argc, argv, OPTION_PRIORITY_CMDLINE, error_string);
369	371	isfirstpass = false;
370	372	}
371	373
r250251	r250252
373	375	add_device_options(true);
374	376	if (name != NULL && exists(name))
375	377	set_value(name, value, OPTION_PRIORITY_CMDLINE, error_string);
376		result = core_options::parse_command_line(argc, argv, OPTION_PRIORITY_CMDLINE, error_string);
	378	core_options::parse_command_line(argc, argv, OPTION_PRIORITY_CMDLINE, error_string);
377	379
378		int num = 0;
	380	int num;
379	381	do {
380	382	num = options_count();
381	383	update_slot_options();
r250251	r250252
528	530
529	531	// then add the options
530	532	add_device_options(true);
531		int num = 0;
	533	int num;
532	534	do {
533	535	num = options_count();
534	536	update_slot_options();

trunk/src/emu/emupal.cpp

r250251	r250252
24	24	m_entries(0),
25	25	m_indirect_entries(0),
26	26	m_enable_shadows(0),
27		m_enable_hilights(0),
28		m_membits_supplied(false),
	27	m_enable_hilights(0),
	28	m_membits(0),
	29	m_membits_supplied(false),
	30	m_endianness(),
29	31	m_endianness_supplied(false),
30	32	m_raw_to_rgb(raw_to_rgb_converter()),
31	33	m_palette(NULL),
32		m_pens(NULL),
	34	m_pens(NULL),
	35	m_format(),
33	36	m_shadow_table(NULL),
34	37	m_shadow_group(0),
35		m_hilight_group(0),
	38	m_hilight_group(0),
	39	m_white_pen(0),
	40	m_black_pen(0),
36	41	m_init(palette_init_delegate())
37	42	{
38	43	}

trunk/src/emu/hash.cpp

r250251	r250252
292	292	// non-hex alpha values specify a hash type
293	293	if (uc >= 'G' && uc <= 'Z')
294	294	{
295		if (skip_digits != 0)
296		errors = true;
297	295	skip_digits = 0;
298	296	if (uc == HASH_CRC)
299	297	{

trunk/src/emu/hashfile.cpp

r250251	r250252
539	539
540	540	bool read_hash_config(device_image_interface &image, const char *sysname, std::string &result)
541	541	{
542		hash_file *hashfile = NULL;
543		const hash_info *info = NULL;
	542	hash_file *hashfile;
	543	const hash_info *info;
544	544
545	545	/* open the hash file */
546	546	hashfile = hashfile_open(image.device().mconfig().options(), sysname, FALSE, NULL);

trunk/src/emu/input.cpp

r250251	r250252
834	834	// if we have a generic ID, pick a new internal one
835	835	input_item_id originalid = itemid;
836	836	if (itemid >= ITEM_ID_OTHER_SWITCH && itemid <= ITEM_ID_OTHER_AXIS_RELATIVE)
837		for (itemid = (input_item_id)(ITEM_ID_MAXIMUM + 1); itemid <= ITEM_ID_ABSOLUTE_MAXIMUM; itemid++)
	837	for (itemid = (input_item_id)(ITEM_ID_MAXIMUM + 1); itemid <= ITEM_ID_ABSOLUTE_MAXIMUM; ++itemid)
838	838	if (m_item[itemid] == NULL)
839	839	break;
840	840	assert(itemid <= ITEM_ID_ABSOLUTE_MAXIMUM);
r250251	r250252
843	843	assert(m_item[itemid] == NULL);
844	844
845	845	// determine the class and create the appropriate item class
846		input_device_item *item = NULL;
	846	input_device_item *item;
847	847	switch (m_class.standard_item_class(originalid))
848	848	{
849	849	case ITEM_CLASS_SWITCH:
r250251	r250252
859	859	break;
860	860
861	861	default:
	862	item = NULL;
862	863	assert(false);
863	864	}
864	865
r250251	r250252
919	920
920	921	// update the state of all the keys and see if any changed state
921	922	bool anything_changed = false;
922		for (input_item_id itemid = ITEM_ID_FIRST_VALID; itemid <= m_maxitem; itemid++)
	923	for (input_item_id itemid = ITEM_ID_FIRST_VALID; itemid <= m_maxitem; ++itemid)
923	924	{
924	925	input_device_item *item = m_item[itemid];
925	926	if (item != NULL && item->itemclass() == ITEM_CLASS_SWITCH)
r250251	r250252
929	930
930	931	// if the keyboard state is stable, flush the current state
931	932	if (!anything_changed)
932		for (input_item_id itemid = ITEM_ID_FIRST_VALID; itemid <= m_maxitem; itemid++)
	933	for (input_item_id itemid = ITEM_ID_FIRST_VALID; itemid <= m_maxitem; ++itemid)
933	934	{
934	935	input_device_item *item = m_item[itemid];
935	936	if (item != NULL && item->itemclass() == ITEM_CLASS_SWITCH)
r250251	r250252
1182	1183	reset_memory();
1183	1184
1184	1185	// iterate over device classes and devices
1185		for (input_device_class devclass = DEVICE_CLASS_FIRST_VALID; devclass <= DEVICE_CLASS_LAST_VALID; devclass++)
	1186	for (input_device_class devclass = DEVICE_CLASS_FIRST_VALID; devclass <= DEVICE_CLASS_LAST_VALID; ++devclass)
1186	1187	for (int devnum = 0; devnum <= m_class[devclass]->maxindex(); devnum++)
1187	1188	{
1188	1189	// fetch the device; ignore if NULL
r250251	r250252
1191	1192	continue;
1192	1193
1193	1194	// iterate over items within each device
1194		for (input_item_id itemid = ITEM_ID_FIRST_VALID; itemid <= device->maxitem(); itemid++)
	1195	for (input_item_id itemid = ITEM_ID_FIRST_VALID; itemid <= device->maxitem(); ++itemid)
1195	1196	{
1196	1197	// for any non-switch items, set memory equal to the current value
1197	1198	input_device_item *item = device->item(itemid);
r250251	r250252
1209	1210	input_code input_manager::poll_switches()
1210	1211	{
1211	1212	// iterate over device classes and devices
1212		for (input_device_class devclass = DEVICE_CLASS_FIRST_VALID; devclass <= DEVICE_CLASS_LAST_VALID; devclass++)
	1213	for (input_device_class devclass = DEVICE_CLASS_FIRST_VALID; devclass <= DEVICE_CLASS_LAST_VALID; ++devclass)
1213	1214	for (int devnum = 0; devnum <= m_class[devclass]->maxindex(); devnum++)
1214	1215	{
1215	1216	// fetch the device; ignore if NULL
r250251	r250252
1218	1219	continue;
1219	1220
1220	1221	// iterate over items within each device
1221		for (input_item_id itemid = ITEM_ID_FIRST_VALID; itemid <= device->maxitem(); itemid++)
	1222	for (input_item_id itemid = ITEM_ID_FIRST_VALID; itemid <= device->maxitem(); ++itemid)
1222	1223	{
1223	1224	input_device_item *item = device->item(itemid);
1224	1225	if (item != NULL)
r250251	r250252
1298	1299	continue;
1299	1300
1300	1301	// iterate over items within each device
1301		for (input_item_id itemid = ITEM_ID_FIRST_VALID; itemid <= device->maxitem(); itemid++)
	1302	for (input_item_id itemid = ITEM_ID_FIRST_VALID; itemid <= device->maxitem(); ++itemid)
1302	1303	{
1303	1304	input_device_item *item = device->item(itemid);
1304	1305	if (item != NULL && item->itemclass() == ITEM_CLASS_SWITCH)
r250251	r250252
1363	1364	input_code input_manager::poll_axes()
1364	1365	{
1365	1366	// iterate over device classes and devices
1366		for (input_device_class devclass = DEVICE_CLASS_FIRST_VALID; devclass <= DEVICE_CLASS_LAST_VALID; devclass++)
	1367	for (input_device_class devclass = DEVICE_CLASS_FIRST_VALID; devclass <= DEVICE_CLASS_LAST_VALID; ++devclass)
1367	1368	for (int devnum = 0; devnum <= m_class[devclass]->maxindex(); devnum++)
1368	1369	{
1369	1370	// fetch the device; ignore if NULL
r250251	r250252
1372	1373	continue;
1373	1374
1374	1375	// iterate over items within each device
1375		for (input_item_id itemid = ITEM_ID_FIRST_VALID; itemid <= device->maxitem(); itemid++)
	1376	for (input_item_id itemid = ITEM_ID_FIRST_VALID; itemid <= device->maxitem(); ++itemid)
1376	1377	{
1377	1378	input_device_item *item = device->item(itemid);
1378	1379	if (item != NULL && item->itemclass() != ITEM_CLASS_SWITCH)
r250251	r250252
1444	1445	input_code input_manager::code_from_itemid(input_item_id itemid) const
1445	1446	{
1446	1447	// iterate over device classes and devices
1447		for (input_device_class devclass = DEVICE_CLASS_FIRST_VALID; devclass <= DEVICE_CLASS_LAST_VALID; devclass++)
	1448	for (input_device_class devclass = DEVICE_CLASS_FIRST_VALID; devclass <= DEVICE_CLASS_LAST_VALID; ++devclass)
1448	1449	for (int devnum = 0; devnum <= m_class[devclass]->maxindex(); devnum++)
1449	1450	{
1450	1451	input_device *device = m_class[devclass]->device(devnum);
r250251	r250252
1612	1613	return INPUT_CODE_INVALID;
1613	1614
1614	1615	// if not a standard code, look it up in the device specific codes
1615		for (itemid = ITEM_ID_FIRST_VALID; itemid <= device->maxitem(); itemid++)
	1616	for (itemid = ITEM_ID_FIRST_VALID; itemid <= device->maxitem(); ++itemid)
1616	1617	{
1617	1618	input_device_item *item = device->item(itemid);
1618	1619	if (item != NULL && token[curtok].compare(item->token()) == 0)

trunk/src/emu/ioport.cpp

r250251	r250252
97	97	#include "profiler.h"
98	98	#include "ui/ui.h"
99	99	#include "uiinput.h"
100		#include "debug/debugcon.h"
101	100
102	101	#include "osdepend.h"
103	102
r250251	r250252
713	712
714	713	void input_type_entry::restore_default_seq()
715	714	{
716		for (input_seq_type seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; seqtype++)
	715	for (input_seq_type seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; ++seqtype)
717	716	m_seq[seqtype] = defseq(seqtype);
718	717	}
719	718
r250251	r250252
727	726	//-------------------------------------------------
728	727
729	728	digital_joystick::digital_joystick(int player, int number)
730		: m_player(player),
	729	:   m_next(NULL),
	730	m_player(player),
731	731	m_number(number),
732	732	m_current(0),
733	733	m_current4way(0),
r250251	r250252
763	763
764	764	// read all the associated ports
765	765	running_machine *machine = NULL;
766		for (direction_t direction = JOYDIR_UP; direction < JOYDIR_COUNT; direction++)
	766	for (direction_t direction = JOYDIR_UP; direction < JOYDIR_COUNT; ++direction)
767	767	for (const simple_list_wrapper<ioport_field> *i = m_field[direction].first(); i != NULL; i = i->next())
768	768	{
769	769	machine = &i->object()->machine();
r250251	r250252
1477	1477	m_way(0)
1478	1478	{
1479	1479	// reset sequences and chars
1480		for (input_seq_type seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; seqtype++)
	1480	for (input_seq_type seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; ++seqtype)
1481	1481	m_seq[seqtype].set_default();
1482	1482	m_chars[0] = m_chars[1] = m_chars[2] = m_chars[3] = unicode_char(0);
1483	1483
r250251	r250252
1679	1679	memset(&settings, 0, sizeof(settings));
1680	1680
1681	1681	// copy the basics
1682		for (input_seq_type seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; seqtype++)
	1682	for (input_seq_type seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; ++seqtype)
1683	1683	settings.seq[seqtype] = seq(seqtype);
1684	1684
1685	1685	// if there's a list of settings or we're an adjuster, copy the current value
r250251	r250252
1711	1711	void ioport_field::set_user_settings(const user_settings &settings)
1712	1712	{
1713	1713	// copy the basics
1714		for (input_seq_type seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; seqtype++)
	1714	for (input_seq_type seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; ++seqtype)
1715	1715	{
1716	1716	const input_seq &defseq = manager().type_seq(m_type, m_player, input_seq_type(seqtype));
1717	1717	if (defseq == settings.seq[seqtype])
r250251	r250252
2159	2159	joydir(digital_joystick::JOYDIR_COUNT)
2160	2160	{
2161	2161	// fill in the basic values
2162		for (input_seq_type seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; seqtype++)
	2162	for (input_seq_type seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; ++seqtype)
2163	2163	seq[seqtype] = field.defseq_unresolved(seqtype);
2164	2164
2165	2165	// if this is a digital joystick field, make a note of it
r250251	r250252
2454	2454	m_record_file(machine.options().input_directory(), OPEN_FLAG_WRITE | OPEN_FLAG_CREATE | OPEN_FLAG_CREATE_PATHS),
2455	2455	m_playback_file(machine.options().input_directory(), OPEN_FLAG_READ),
2456	2456	m_playback_accumulated_speed(0),
2457		m_playback_accumulated_frames(0)
	2457	m_playback_accumulated_frames(0),
	2458	m_has_configs(false),
	2459	m_has_analog(false),
	2460	m_has_dips(false),
	2461	m_has_bioses(false)
2458	2462	{
2459	2463	memset(m_type_to_entry, 0, sizeof(m_type_to_entry));
2460	2464	}
r250251	r250252
2980	2984
2981	2985	// initialize sequences to invalid defaults
2982	2986	input_seq newseq[SEQ_TYPE_TOTAL];
2983		for (input_seq_type seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; seqtype++)
	2987	for (input_seq_type seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; ++seqtype)
2984	2988	newseq[seqtype].set(INPUT_CODE_INVALID);
2985	2989
2986	2990	// loop over new sequences
r250251	r250252
3008	3012	// what we will diff against
3009	3013	if (config_type == CONFIG_TYPE_CONTROLLER)
3010	3014	for (input_type_entry *entry = m_typelist.first(); entry != NULL; entry = entry->next())
3011		for (input_seq_type seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; seqtype++)
	3015	for (input_seq_type seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; ++seqtype)
3012	3016	entry->defseq(seqtype) = entry->seq(seqtype);
3013	3017	}
3014	3018
r250251	r250252
3049	3053	// loop over the remapping table, then over default ports, replacing old with new
3050	3054	for (int remapnum = 0; remapnum < count; remapnum++)
3051	3055	for (input_type_entry *entry = m_typelist.first(); entry != NULL; entry = entry->next())
3052		for (input_seq_type seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; seqtype++)
	3056	for (input_seq_type seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; ++seqtype)
3053	3057	entry->m_seq[seqtype].replace(oldtable[remapnum], newtable[remapnum]);
3054	3058	}
3055	3059	}
r250251	r250252
3066	3070	for (input_type_entry *entry = m_typelist.first(); entry != NULL; entry = entry->next())
3067	3071	if (entry->type() == type && entry->player() == player)
3068	3072	{
3069		for (input_seq_type seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; seqtype++)
	3073	for (input_seq_type seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; ++seqtype)
3070	3074	if (newseq[seqtype][0] != INPUT_CODE_INVALID)
3071	3075	entry->m_seq[seqtype] = newseq[seqtype];
3072	3076	return true;
r250251	r250252
3098	3102	field->mask() == mask && (field->defvalue() & mask) == (defvalue & mask))
3099	3103	{
3100	3104	// if a sequence was specified, copy it in
3101		for (input_seq_type seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; seqtype++)
	3105	for (input_seq_type seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; ++seqtype)
3102	3106	if (newseq[seqtype][0] != INPUT_CODE_INVALID)
3103	3107	field->live().seq[seqtype] = newseq[seqtype];
3104	3108
r250251	r250252
3217	3221	{
3218	3222	// see if any of the sequences have changed
3219	3223	input_seq_type seqtype;
3220		for (seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; seqtype++)
	3224	for (seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; ++seqtype)
3221	3225	if (entry->seq(seqtype) != entry->defseq(seqtype))
3222	3226	break;
3223	3227
r250251	r250252
3233	3237	xml_set_attribute(portnode, "type", input_type_to_token(tempstr, entry->type(), entry->player()));
3234	3238
3235	3239	// add only the sequences that have changed from the defaults
3236		for (input_seq_type seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; seqtype++)
3237		if (entry->seq(seqtype) != entry->defseq(seqtype))
3238		save_sequence(portnode, seqtype, entry->type(), entry->seq(seqtype));
	3240	for (input_seq_type type = SEQ_TYPE_STANDARD; type < SEQ_TYPE_TOTAL; ++type)
	3241	if (entry->seq(type) != entry->defseq(type))
	3242	save_sequence(portnode, type, entry->type(), entry->seq(type));
3239	3243	}
3240	3244	}
3241	3245	}
r250251	r250252
3257	3261	{
3258	3262	// determine if we changed
3259	3263	bool changed = false;
3260		for (input_seq_type seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; seqtype++)
	3264	for (input_seq_type seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; ++seqtype)
3261	3265	changed |= (field->seq(seqtype) != field->defseq(seqtype));
3262	3266
3263	3267	// non-analog changes
r250251	r250252
3291	3295	xml_set_attribute_int(portnode, "defvalue", field->defvalue() & field->mask());
3292	3296
3293	3297	// add sequences if changed
3294		for (input_seq_type seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; seqtype++)
	3298	for (input_seq_type seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; ++seqtype)
3295	3299	if (field->seq(seqtype) != field->defseq(seqtype))
3296	3300	save_sequence(portnode, seqtype, field->type(), field->seq(seqtype));
3297	3301

trunk/src/emu/ioport.h

r250251	r250252
1394	1394	int count_players() const;
1395	1395	bool crosshair_position(int player, float &x, float &y);
1396	1396	bool has_keyboard() const;
1397		void setup_natural_keyboard(ioport_queue_chars_delegate queue_chars, ioport_accept_char_delegate accept_char, ioport_charqueue_empty_delegate charqueue_empty);
1398	1397	INT32 frame_interpolate(INT32 oldval, INT32 newval);
1399	1398	ioport_type token_to_input_type(const char *string, int &player) const;
1400	1399	const char *input_type_to_token(std::string &str, ioport_type type, int player);

trunk/src/emu/luaengine.cpp

r250251	r250252
13	13	#include "luabridge/Source/LuaBridge/LuaBridge.h"
14	14	#include <signal.h>
15	15	#include "emu.h"
16		#include "emuopts.h"
17		#include "osdepend.h"
18	16	#include "drivenum.h"
19	17	#include "ui/ui.h"
20	18	#include "luaengine.h"
r250251	r250252
430	428	lua_State *L = luaThis->m_lua_state;
431	429	luabridge::LuaRef sp_table = luabridge::LuaRef::newTable(L);
432	430
433		for (address_spacenum sp = AS_0; sp < ADDRESS_SPACES; sp++) {
	431	for (address_spacenum sp = AS_0; sp < ADDRESS_SPACES; ++sp) {
434	432	if (dev->memory().has_space(sp)) {
435	433	sp_table[dev->memory().space(sp).name()] = &(dev->memory().space(sp));
436	434	}
r250251	r250252
838	836	osd_lock_release(lock);
839	837
840	838	// Wait for response
841		int done = 0;
	839	int done;
842	840	do {
843	841	osd_sleep(osd_ticks_per_second() / 1000);
844	842	osd_lock_acquire(lock);

trunk/src/emu/machine.cpp

r250251	r250252
75	75	#include "debugger.h"
76	76	#include "render.h"
77	77	#include "cheat.h"
78		#include "ui/selgame.h"
79	78	#include "uiinput.h"
80	79	#include "crsshair.h"
81		#include "validity.h"
82	80	#include "unzip.h"
83		#include "debug/debugcon.h"
84	81	#include "debug/debugvw.h"
85	82	#include "image.h"
86	83	#include "luaengine.h"
r250251	r250252
322	319
323	320	// notify this device and all its subdevices that they are now configured
324	321	device_iterator iter(root_device());
325		for (device_t *device = iter.first(); device != NULL; device = iter.next())
326		if (!device->configured())
327		device->config_complete();
	322	for (device_t *dev = iter.first(); dev != NULL; dev = iter.next())
	323	if (!dev->configured())
	324	dev->config_complete();
328	325	return *device;
329	326	}
330	327
r250251	r250252
578	575	// find length of the device name
579	576	int end1 = statename_str.find("/", pos + 3);
580	577	int end2 = statename_str.find("%", pos + 3);
581		int end = -1;
	578	int end;
582	579
583	580	if ((end1 != -1) && (end2 != -1))
584	581	end = MIN(end1, end2);

trunk/src/emu/machine.h

r250251	r250252
73	73	#define auto_alloc_array_clear(m, t, c) pool_alloc_array_clear(static_cast<running_machine &>(m).respool(), t, c)
74	74	#define auto_free(m, v)                 pool_free(static_cast<running_machine &>(m).respool(), v)
75	75
76		#define auto_bitmap_alloc(m, w, h, f)   auto_alloc(m, bitmap_t(w, h, f))
77	76	#define auto_bitmap_ind8_alloc(m, w, h) auto_alloc(m, bitmap_ind8(w, h))
78	77	#define auto_bitmap_ind16_alloc(m, w, h)    auto_alloc(m, bitmap_ind16(w, h))
79	78	#define auto_bitmap_ind32_alloc(m, w, h)    auto_alloc(m, bitmap_ind32(w, h))
r250251	r250252
191	190	bool scheduled_event_pending() const { return m_exit_pending || m_hard_reset_pending; }
192	191
193	192	// fetch items by name
194		inline device_t *device(const char *tag) { return root_device().subdevice(tag); }
	193	inline device_t *device(const char *tag) const { return root_device().subdevice(tag); }
195	194	template<class _DeviceClass> inline _DeviceClass *device(const char *tag) { return downcast<_DeviceClass *>(device(tag)); }
196	195
197	196	// configuration helpers

trunk/src/emu/machine/generic.cpp

r250251	r250252
9	9	*********************************************************************/
10	10
11	11	#include "emu.h"
12		#include "emuopts.h"
13	12	#include "config.h"
14	13
15	14

trunk/src/emu/mame.cpp

r250251	r250252
73	73	#include "emu.h"
74	74	#include "emuopts.h"
75	75	#include "osdepend.h"
76		#include "config.h"
77		#include "debugger.h"
78		#include "render.h"
79		#include "cheat.h"
80		#include "ui/ui.h"
81		#include "uiinput.h"
82		#include "crsshair.h"
83	76	#include "validity.h"
84		#include "debug/debugcon.h"
85	77	#include "luaengine.h"
86	78	#include <time.h>
87	79

trunk/src/emu/memory.cpp

r250251	r250252
335	335
336	336	// construction/destruction
337	337	handler_entry_read(UINT8 width, endianness_t endianness, UINT8 **rambaseptr)
338		: handler_entry(width, endianness, rambaseptr)
	338	: handler_entry(width, endianness, rambaseptr),
	339	m_ioport(NULL)
339	340	{
340	341	}
341	342
r250251	r250252
397	398
398	399	// construction/destruction
399	400	handler_entry_write(UINT8 width, endianness_t endianness, UINT8 **rambaseptr)
400		: handler_entry(width, endianness, rambaseptr)
	401	: handler_entry(width, endianness, rambaseptr),
	402	m_ioport(NULL)
401	403	{
402	404	}
403	405
r250251	r250252
482	484
483	485	// forward delegate callbacks configuration
484	486	template<typename _delegate> void set_delegate(_delegate delegate) const {
485		for (typename std::list<_HandlerEntry *>::const_iterator i = handlers.begin(); i != handlers.end(); i++)
	487	for (typename std::list<_HandlerEntry *>::const_iterator i = handlers.begin(); i != handlers.end(); ++i)
486	488	(*i)->set_delegate(delegate, mask);
487	489	}
488	490
489	491	// forward I/O port access configuration
490	492	void set_ioport(ioport_port &ioport) const {
491		for (typename std::list<_HandlerEntry *>::const_iterator i = handlers.begin(); i != handlers.end(); i++)
	493	for (typename std::list<_HandlerEntry *>::const_iterator i = handlers.begin(); i != handlers.end(); ++i)
492	494	(*i)->set_ioport(ioport);
493	495	}
494	496
r250251	r250252
659	661	std::list<UINT32> entries;
660	662	setup_range(bytestart, byteend, bytemask, bytemirror, mask, entries);
661	663	std::list<handler_entry_read *> handlers;
662		for (std::list<UINT32>::const_iterator i = entries.begin(); i != entries.end(); i++)
	664	for (std::list<UINT32>::const_iterator i = entries.begin(); i != entries.end(); ++i)
663	665	handlers.push_back(&handler_read(*i));
664	666	return handler_entry_proxy<handler_entry_read>(handlers, mask);
665	667	}
r250251	r250252
732	734	std::list<UINT32> entries;
733	735	setup_range(bytestart, byteend, bytemask, bytemirror, mask, entries);
734	736	std::list<handler_entry_write *> handlers;
735		for (std::list<UINT32>::const_iterator i = entries.begin(); i != entries.end(); i++)
	737	for (std::list<UINT32>::const_iterator i = entries.begin(); i != entries.end(); ++i)
736	738	handlers.push_back(&handler_write(*i));
737	739	return handler_entry_proxy<handler_entry_write>(handlers, mask);
738	740	}
r250251	r250252
810	812	std::list<UINT32> entries;
811	813	setup_range(bytestart, byteend, bytemask, bytemirror, mask, entries);
812	814	std::list<handler_entry_setoffset *> handlers;
813		for (std::list<UINT32>::const_iterator i = entries.begin(); i != entries.end(); i++)
	815	for (std::list<UINT32>::const_iterator i = entries.begin(); i != entries.end(); ++i)
814	816	handlers.push_back(&handler_setoffset(*i));
815	817	return handler_entry_proxy<handler_entry_setoffset>(handlers, mask);
816	818	}
r250251	r250252
1522	1524	// loop over devices and spaces within each device
1523	1525	memory_interface_iterator iter(machine().root_device());
1524	1526	for (device_memory_interface *memory = iter.first(); memory != NULL; memory = iter.next())
1525		for (address_spacenum spacenum = AS_0; spacenum < ADDRESS_SPACES; spacenum++)
	1527	for (address_spacenum spacenum = AS_0; spacenum < ADDRESS_SPACES; ++spacenum)
1526	1528	{
1527	1529	// if there is a configuration for this space, we need an address space
1528	1530	const address_space_config *spaceconfig = memory->space_config(spacenum);
r250251	r250252
1909	1911	{
1910	1912	// find the entry before the last one we processed
1911	1913	const address_map_entry *entry;
1912		for (entry = map->m_entrylist.first(); entry->next() != last_entry; entry = entry->next()) ;
	1914	for (entry = map->m_entrylist.first(); entry->next() != last_entry; entry = entry->next()) { };
1913	1915	last_entry = entry;
1914	1916
1915	1917	// map both read and write halves
r250251	r250252
2867	2869	curentry.configure(bytestart, byteend, bytemask);
2868	2870
2869	2871	// Populate it wherever needed
2870		for (std::list<subrange>::const_iterator i = range_override.begin(); i != range_override.end(); i++)
	2872	for (std::list<subrange>::const_iterator i = range_override.begin(); i != range_override.end(); ++i)
2871	2873	populate_range(i->start, i->end, entry);
2872	2874
2873	2875	// Add it in the "to be setup" list
r250251	r250252
2880	2882	// Ranges in range_partial must duplicated then partially changed
2881	2883	if (!range_partial.empty())
2882	2884	{
2883		for (std::map<UINT16, std::list<subrange> >::const_iterator i = range_partial.begin(); i != range_partial.end(); i++)
	2885	for (std::map<UINT16, std::list<subrange> >::const_iterator i = range_partial.begin(); i != range_partial.end(); ++i)
2884	2886	{
2885	2887	// Theorically, if the handler to change matches the
2886	2888	// characteristics of ours, we can directly change it.  In
r250251	r250252
2910	2912	curentry.configure(bytestart, byteend, bytemask);
2911	2913
2912	2914	// Populate it wherever needed
2913		for (std::list<subrange>::const_iterator j = i->second.begin(); j != i->second.end(); j++)
	2915	for (std::list<subrange>::const_iterator j = i->second.begin(); j != i->second.end(); ++j)
2914	2916	populate_range(j->start, j->end, entry);
2915	2917
2916	2918	// Add it in the "to be setup" list
r250251	r250252
4079	4081	m_byteend(0),
4080	4082	m_bytemask(~0),
4081	4083	m_rambaseptr(rambaseptr),
4082		m_subunits(0)
	4084	m_subunits(0),
	4085	m_invsubmask(0)
4083	4086	{
4084	4087	}
4085	4088

trunk/src/emu/network.cpp

r250251	r250252
9	9	#include <ctype.h>
10	10
11	11	#include "emu.h"
12		#include "emuopts.h"
13	12	#include "network.h"
14	13	#include "config.h"
15	14	#include "xmlfile.h"

trunk/src/emu/profiler.cpp

r250251	r250252
175	175	// compute the total time for all bits, not including profiler or idle
176	176	UINT64 computed = 0;
177	177	profile_type curtype;
178		for (curtype = PROFILER_DEVICE_FIRST; curtype < PROFILER_PROFILER; curtype++)
	178	for (curtype = PROFILER_DEVICE_FIRST; curtype < PROFILER_PROFILER; ++curtype)
179	179	computed += m_data[curtype];
180	180
181	181	// save that result in normalize, and continue adding the rest
182	182	UINT64 normalize = computed;
183		for ( ; curtype < PROFILER_TOTAL; curtype++)
	183	for ( ; curtype < PROFILER_TOTAL; ++curtype)
184	184	computed += m_data[curtype];
185	185
186	186	// this becomes the total; if we end up with 0 for anything, we were just started, so return empty
r250251	r250252
193	193
194	194	// loop over all types and generate the string
195	195	device_iterator iter(machine.root_device());
196		for (curtype = PROFILER_DEVICE_FIRST; curtype < PROFILER_TOTAL; curtype++)
	196	for (curtype = PROFILER_DEVICE_FIRST; curtype < PROFILER_TOTAL; ++curtype)
197	197	{
198	198	// determine the accumulated time for this type
199	199	computed = m_data[curtype];

trunk/src/emu/render.cpp

r250251	r250252
1204	1204	throw emu_fatalerror("Mandatory artwork is missing");
1205	1205
1206	1206	// scan the current view for all screens
1207		for (item_layer layer = ITEM_LAYER_FIRST; layer < ITEM_LAYER_MAX; layer++)
	1207	for (item_layer layer = ITEM_LAYER_FIRST; layer < ITEM_LAYER_MAX; ++layer)
1208	1208
1209	1209	// iterate over items in the layer
1210	1210	for (layout_view::item *curitem = m_curview->first_item(layer); curitem != NULL; curitem = curitem->next())
r250251	r250252
1287	1287
1288	1288	// iterate over layers back-to-front, but only if we're running
1289	1289	if (m_manager.machine().phase() >= MACHINE_PHASE_RESET)
1290		for (item_layer layernum = ITEM_LAYER_FIRST; layernum < ITEM_LAYER_MAX; layernum++)
	1290	for (item_layer layernum = ITEM_LAYER_FIRST; layernum < ITEM_LAYER_MAX; ++layernum)
1291	1291	{
1292	1292	int blendmode;
1293	1293	item_layer layer = get_layer_and_blendmode(*m_curview, layernum, blendmode);
r250251	r250252
1916	1916	}
1917	1917
1918	1918	// loop through each layer
1919		for (item_layer layernum = ITEM_LAYER_FIRST; layernum < ITEM_LAYER_MAX; layernum++)
	1919	for (item_layer layernum = ITEM_LAYER_FIRST; layernum < ITEM_LAYER_MAX; ++layernum)
1920	1920	{
1921	1921	int blendmode;
1922	1922	item_layer layer = get_layer_and_blendmode(*m_curview, layernum, blendmode);
r250251	r250252
2500	2500
2501	2501	float render_manager::ui_aspect(render_container *rc)
2502	2502	{
2503		int orient = 0;
2504		float aspect = 1.0f;
	2503	int orient;
	2504	float aspect;
2505	2505
2506	2506	if (rc == m_ui_container || rc == NULL) {
2507	2507	// ui container, aggregated multi-screen target

trunk/src/emu/render.h

r250251	r250252
304	304	friend class simple_list<render_primitive>;
305	305
306	306	public:
	307	render_primitive():
	308	type(),
	309	flags(0),
	310	width(0),
	311	container(NULL),
	312	m_next(NULL)
	313	{}
	314
307	315	// render primitive types
308	316	enum primitive_type
309	317	{
r250251	r250252
522	530	friend class simple_list<item>;
523	531
524	532	public:
	533	item() : m_next(NULL), m_type(0), m_flags(0), m_internal(0), m_width(0), m_texture(NULL) { }
	534
525	535	// getters
526	536	item *next() const { return m_next; }
527	537	UINT8 type() const { return m_type; }

trunk/src/emu/rendfont.cpp

r250251	r250252
10	10
11	11	#include "emu.h"
12	12	#include "rendfont.h"
13		#include "rendutil.h"
14	13	#include "emuopts.h"
15	14	#include "coreutil.h"
16	15
r250251	r250252
511	510	else if (strncmp(ptr, "BITMAP", 6) == 0)
512	511	{
513	512	// stash the raw pointer and scan for the end of the character
514		for (rawdata = ptr = next_line(ptr); ptr != NULL && strncmp(ptr, "ENDCHAR", 7) != 0; ptr = next_line(ptr)) ;
	513	for (rawdata = ptr = next_line(ptr); ptr != NULL && strncmp(ptr, "ENDCHAR", 7) != 0; ptr = next_line(ptr)) { }
515	514	break;
516	515	}
517	516	}

trunk/src/emu/rendlay.cpp

r250251	r250252
53	53	#include "rendlay.h"
54	54	#include "rendutil.h"
55	55	#include "xmlfile.h"
56		#include "png.h"
57		#include "ui/ui.h"
58	56
59	57
60	58
r250251	r250252
632	630	std::string symbollist = xml_get_attribute_string_with_subst(machine, compnode, "symbollist", "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15");
633	631
634	632	// split out position names from string and figure out our number of symbols
635		int location = -1;
	633	int location;
636	634	m_numstops = 0;
637	635	location=symbollist.find(",");
638	636	while (location!=-1)
r250251	r250252
2218	2216	// loop over all layers
2219	2217	bool first = true;
2220	2218	bool scrfirst = true;
2221		for (item_layer layer = ITEM_LAYER_FIRST; layer < ITEM_LAYER_MAX; layer++)
	2219	for (item_layer layer = ITEM_LAYER_FIRST; layer < ITEM_LAYER_MAX; ++layer)
2222	2220	{
2223	2221	// determine if this layer should be visible
2224	2222	switch (layer)
r250251	r250252
2293	2291	float yscale = (target_bounds.y1 - target_bounds.y0) / (m_bounds.y1 - m_bounds.y0);
2294	2292
2295	2293	// normalize all the item bounds
2296		for (item_layer layer = ITEM_LAYER_FIRST; layer < ITEM_LAYER_MAX; layer++)
	2294	for (item_layer layer = ITEM_LAYER_FIRST; layer < ITEM_LAYER_MAX; ++layer)
2297	2295	for (item *curitem = first_item(layer); curitem != NULL; curitem = curitem->next())
2298	2296	{
2299	2297	curitem->m_bounds.x0 = target_bounds.x0 + (curitem->m_rawbounds.x0 - xoffs) * xscale;
r250251	r250252
2310	2308
2311	2309	void layout_view::resolve_tags()
2312	2310	{
2313		for (item_layer layer = ITEM_LAYER_FIRST; layer < ITEM_LAYER_MAX; layer++)
	2311	for (item_layer layer = ITEM_LAYER_FIRST; layer < ITEM_LAYER_MAX; ++layer)
2314	2312	{
2315	2313	for (item *curitem = first_item(layer); curitem != NULL; curitem = curitem->next())
2316	2314	{

trunk/src/emu/romload.cpp

r250251	r250252
10	10	#include "emu.h"
11	11	#include "emuopts.h"
12	12	#include "drivenum.h"
13		#include "png.h"
14	13	#include "chd.h"
15		#include "config.h"
16	14	#include "softlist.h"
17	15	#include "ui/ui.h"
18	16

trunk/src/emu/save.cpp

r250251	r250252
194	194	save_error save_manager::check_file(running_machine &machine, emu_file &file, const char *gamename, void (CLIB_DECL *errormsg)(const char *fmt, ...))
195	195	{
196	196	// if we want to validate the signature, compute it
197		UINT32 sig = 0;
	197	UINT32 sig;
198	198	sig = machine.save().signature();
199	199
200	200	// seek to the beginning and read the header

trunk/src/emu/schedule.cpp

r250251	r250252
11	11	#include "emu.h"
12	12	#include "debugger.h"
13	13
14		// for now, make buggy GCC/Mingw STFU about I64FMT
15		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
16		#pragma GCC diagnostic push
17		#pragma GCC diagnostic ignored "-Wformat"
18		#pragma GCC diagnostic ignored "-Wformat-extra-args"
19		#endif
20
21
22	14	//**************************************************************************
23	15	//  DEBUGGING
24	16	//**************************************************************************
r250251	r250252
498	490	exec->m_totalcycles += ran;
499	491
500	492	// update the local time for this CPU
501		attotime delta(0, exec->m_attoseconds_per_cycle * ran);
502		assert(delta >= attotime::zero);
503		exec->m_localtime += delta;
	493	attotime deltatime(0, exec->m_attoseconds_per_cycle * ran);
	494	assert(deltatime >= attotime::zero);
	495	exec->m_localtime += deltatime;
504	496	LOG(("         %d ran, %d total, time = %s\n", ran, (INT32)exec->m_totalcycles, exec->m_localtime.as_string(PRECISION)));
505	497
506	498	// if the new local CPU time is less than our target, move the target up, but not before the base
r250251	r250252
990	982	timer->dump();
991	983	machine().logerror("=============================================\n");
992	984	}
993
994		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
995		#pragma GCC diagnostic pop
996		#endif

trunk/src/emu/screen.cpp

r250251	r250252
58	58	m_container(NULL),
59	59	m_width(100),
60	60	m_height(100),
61		m_visarea(0, 99, 0, 99),
	61	m_visarea(0, 99, 0, 99),
	62	m_texformat(),
62	63	m_curbitmap(0),
63	64	m_curtexture(0),
64	65	m_changed(true),
r250251	r250252
634	635	LOG_PARTIAL_UPDATES(("updating %d-%d\n", clip.min_y, clip.max_y));
635	636	g_profiler.start(PROFILER_VIDEO);
636	637
637		UINT32 flags = UPDATE_HAS_NOT_CHANGED;
	638	UINT32 flags;
638	639	screen_bitmap &curbitmap = m_bitmap[m_curbitmap];
639	640	switch (curbitmap.format())
640	641	{
r250251	r250252
751	752
752	753	LOG_PARTIAL_UPDATES(("doing scanline partial draw: Y %d X %d-%d\n", clip.max_y, clip.min_x, clip.max_x));
753	754
754		UINT32 flags = UPDATE_HAS_NOT_CHANGED;
	755	UINT32 flags;
755	756	screen_bitmap &curbitmap = m_bitmap[m_curbitmap];
756	757	switch (curbitmap.format())
757	758	{

trunk/src/emu/softlist.cpp

r250251	r250252
9	9	***************************************************************************/
10	10
11	11	#include "emu.h"
12		#include "pool.h"
13	12	#include "emuopts.h"
14	13	#include "softlist.h"
15	14	#include "clifront.h"
r250251	r250252
279	278	m_list_type(SOFTWARE_LIST_ORIGINAL_SYSTEM),
280	279	m_filter(NULL),
281	280	m_parsed(false),
282		m_file(mconfig.options().hash_path(), OPEN_FLAG_READ)
	281	m_file(mconfig.options().hash_path(), OPEN_FLAG_READ),
	282	m_description(NULL)
283	283	{
284	284	}
285	285

trunk/src/emu/sound.cpp

r250251	r250252
791	791	//-------------------------------------------------
792	792
793	793	sound_stream::stream_output::stream_output()
794		: m_dependents(0),
795		m_gain(0x100)
	794	: m_stream(NULL),
	795	m_dependents(0),
	796	m_gain(0x100)
796	797	{
797	798	}
798	799

trunk/src/emu/speaker.cpp

r250251	r250252
9	9	***************************************************************************/
10	10
11	11	#include "emu.h"
12		#include "emuopts.h"
13		#include "osdepend.h"
14		#include "config.h"
15		#include "sound/wavwrite.h"
16	12
17	13
18	14

trunk/src/emu/sprite.h

r250251	r250252
20	20
21	21	// class representing a single dirty region
22	22	class sparse_dirty_rect : public rectangle
23		{
	23	{
24	24	friend class simple_list<sparse_dirty_rect>;
25	25
26	26	public:
	27	sparse_dirty_rect(): m_next(NULL) { }
27	28	// getters
28	29	const sparse_dirty_rect *next() const { return m_next; }
29	30

trunk/src/emu/tilemap.cpp

r250251	r250252
1355	1355	// advance in X
1356	1356	cx += incxx;
1357	1357	x++;
1358		dest++;
	1358	++dest;
1359	1359	pri++;
1360	1360	}
1361	1361	}
r250251	r250252
1395	1395	cx += incxx;
1396	1396	cy += incxy;
1397	1397	x++;
1398		dest++;
	1398	++dest;
1399	1399	pri++;
1400	1400	}
1401	1401
r250251	r250252
1436	1436	cx += incxx;
1437	1437	cy += incxy;
1438	1438	x++;
1439		dest++;
	1439	++dest;
1440	1440	pri++;
1441	1441	}
1442	1442
r250251	r250252
1589	1589	tilemap_device::tilemap_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
1590	1590	: device_t(mconfig, TILEMAP, "Tilemap", tag, owner, clock, "tilemap", __FILE__),
1591	1591	m_gfxdecode(*this),
1592		m_standard_mapper(TILEMAP_STANDARD_COUNT),
	1592	m_standard_mapper(TILEMAP_STANDARD_COUNT),
	1593	m_bytes_per_entry(0),
1593	1594	m_tile_width(8),
1594	1595	m_tile_height(8),
1595	1596	m_num_columns(64),

trunk/src/emu/timer.cpp

r250251	r250252
217	217	case TIMER_TYPE_PERIODIC:
218	218	{
219	219	// convert the period into attotime
220		attotime period = attotime::never;
	220	attotime period;
221	221	if (m_period > attotime::zero)
222	222	{
223	223	period = m_period;

trunk/src/emu/ui/cheatopt.cpp

r250251	r250252
11	11	#include "emu.h"
12	12	#include "cheat.h"
13	13
14		#include "uiinput.h"
15	14	#include "ui/ui.h"
16	15	#include "ui/menu.h"
17	16	#include "ui/cheatopt.h"

trunk/src/emu/ui/filemngr.cpp

r250251	r250252
14	14	#include "emu.h"
15	15	#include "ui/ui.h"
16	16	#include "ui/menu.h"
17		#include "ui/swlist.h"
18	17	#include "ui/filemngr.h"
19	18	#include "ui/filesel.h"
20	19	#include "ui/miscmenu.h"
r250251	r250252
29	28	//  ctor
30	29	//-------------------------------------------------
31	30
32		ui_menu_file_manager::ui_menu_file_manager(running_machine &machine, render_container *container, const char *warnings) : ui_menu(machine, container)
	31	ui_menu_file_manager::ui_menu_file_manager(running_machine &machine, render_container *container, const char *warnings) : ui_menu(machine, container), selected_device(NULL)
33	32	{
34	33	// This warning string is used when accessing from the force_file_manager call, i.e.
35	34	// when the file manager is loaded top front in the case of mandatory image devices
r250251	r250252
127	126	if (subiter.count() > 0)
128	127	{
129	128	// if so, cycle through all its image interfaces
130		image_interface_iterator subiter(*dev);
131		for (device_image_interface *scan = subiter.first(); scan != NULL; scan = subiter.next())
	129	image_interface_iterator subiterator(*dev);
	130	for (device_image_interface *scan = subiterator.first(); scan != NULL; scan = subiterator.next())
132	131	{
133	132	// if it is a children device, and not something further down the device tree, we want it in the menu!
134	133	if (strcmp(scan->device().owner()->tag(), dev->tag()) == 0)

trunk/src/emu/ui/filesel.cpp

r250251	r250252
16	16	#include "ui/ui.h"
17	17	#include "ui/menu.h"
18	18	#include "zippath.h"
19		#include "ui/menu.h"
20	19	#include "ui/filesel.h"
21		#include "ui/swlist.h"
22	20	#include "imagedev/floppy.h"
23	21
24	22
r250251	r250252
100	98
101	99	// take off the borders
102	100	x1 += UI_BOX_LR_BORDER;
103		x2 -= UI_BOX_LR_BORDER;
104	101	y1 += UI_BOX_TB_BORDER;
105		y2 -= UI_BOX_TB_BORDER;
106	102
107	103	// draw the text within it
108	104	container->manager().machine().ui().draw_text_full(container,text, x1, y1, text_width, JUSTIFY_LEFT, WRAP_WORD,
r250251	r250252
222	218	ui_menu_file_create::ui_menu_file_create(running_machine &machine, render_container *container, device_image_interface *image, std::string &current_directory, std::string &current_file, bool *ok)
223	219	: ui_menu(machine, container),
224	220	m_current_directory(current_directory),
225		m_current_file(current_file)
	221	m_current_file(current_file),
	222	m_current_format(NULL)
226	223	{
227	224	m_image = image;
228	225	m_ok = ok;
r250251	r250252
274	271	item_append("New Image Name:", new_image_name, 0, ITEMREF_NEW_IMAGE_NAME);
275	272
276	273	// do we support multiple formats?
277		format = m_image->formatlist();
	274	if (ENABLE_FORMATS) format = m_image->formatlist();
278	275	if (ENABLE_FORMATS && (format != NULL))
279	276	{
280	277	item_append("Image Format:", m_current_format->description(), 0, ITEMREF_FORMAT);
r250251	r250252
347	344	ui_menu_file_selector::ui_menu_file_selector(running_machine &machine, render_container *container, device_image_interface *image, std::string &current_directory, std::string &current_file, bool has_empty, bool has_softlist, bool has_create, int *result)
348	345	: ui_menu(machine, container),
349	346	m_current_directory(current_directory),
350		m_current_file(current_file)
	347	m_current_file(current_file),
	348	m_entrylist(NULL)
351	349	{
352	350	m_image = image;
353	351	m_has_empty = has_empty;
r250251	r250252
538	536	void ui_menu_file_selector::populate()
539	537	{
540	538	zippath_directory *directory = NULL;
541		file_error err = FILERR_NONE;
	539	file_error err;
542	540	const osd_directory_entry *dirent;
543	541	const file_selector_entry *entry;
544	542	const file_selector_entry *selected_entry = NULL;

trunk/src/emu/ui/imgcntrl.cpp

r250251	r250252
28	28	//-------------------------------------------------
29	29
30	30	ui_menu_control_device_image::ui_menu_control_device_image(running_machine &machine, render_container *container, device_image_interface *_image)
31		: ui_menu(machine, container)
	31	: ui_menu(machine, container),
	32	submenu_result(0),
	33	create_ok(false),
	34	create_confirmed(false)
32	35	{
33	36	image = _image;
34	37

trunk/src/emu/ui/inputmap.cpp

r250251	r250252
109	109
110	110	/* loop over all sequence types */
111	111	sortorder++;
112		for (seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; seqtype++)
	112	for (seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; ++seqtype)
113	113	{
114	114	/* build an entry for the standard sequence */
115	115	input_item_data *item = (input_item_data *)m_pool_alloc(sizeof(*item));
r250251	r250252
187	187	sortorder = field->type() | 0xf000;
188	188
189	189	/* loop over all sequence types */
190		for (seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; seqtype++)
	190	for (seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; ++seqtype)
191	191	{
192	192	/* build an entry for the standard sequence */
193	193	input_item_data *item = (input_item_data *)m_pool_alloc(sizeof(*item));
r250251	r250252
224	224	/*-------------------------------------------------
225	225	menu_input - display a menu for inputs
226	226	-------------------------------------------------*/
227		ui_menu_input::ui_menu_input(running_machine &machine, render_container *container) : ui_menu(machine, container)
	227	ui_menu_input::ui_menu_input(running_machine &machine, render_container *container) : ui_menu(machine, container), last_sortorder(0), record_next(false)
228	228	{
229	229	pollingitem = 0;
230	230	pollingref = 0;
r250251	r250252
264	264	if (pollingitem != NULL)
265	265	{
266	266	input_item_data *item = pollingitem;
267		input_seq newseq;
268	267
269	268	/* if UI_CANCEL is pressed, abort */
270	269	if (ui_input_pressed(machine(), IPT_UI_CANCEL))
r250251	r250252
533	532	switches menus
534	533	-------------------------------------------------*/
535	534
536		ui_menu_settings::ui_menu_settings(running_machine &machine, render_container *container, UINT32 _type) : ui_menu(machine, container)
	535	ui_menu_settings::ui_menu_settings(running_machine &machine, render_container *container, UINT32 _type) : ui_menu(machine, container), diplist(NULL), dipcount(0)
537	536	{
538	537	type = _type;
539	538	}

trunk/src/emu/ui/mainmenu.cpp

r250251	r250252
9	9	*********************************************************************/
10	10
11	11	#include "emu.h"
12		#include "audit.h"
13	12	#include "crsshair.h"
14		#include "osdnet.h"
15	13	#include "emuopts.h"
16	14	#include "rendutil.h"
17	15	#include "cheat.h"
18		#include "uiinput.h"
19		#include "ui/ui.h"
20	16	#include "ui/menu.h"
21	17	#include "ui/filemngr.h"
22		#include "ui/filesel.h"
23	18	#include "ui/barcode.h"
24	19	#include "ui/cheatopt.h"
25	20	#include "ui/info.h"
r250251	r250252
33	28	#include "ui/tapectrl.h"
34	29	#include "ui/videoopt.h"
35	30	#include "imagedev/cassette.h"
36		#include "imagedev/bitbngr.h"
37	31	#include "machine/bcreader.h"
38	32
39	33

trunk/src/emu/ui/menu.cpp

r250251	r250252
9	9	*********************************************************************/
10	10
11	11	#include "emu.h"
12		#include "emuopts.h"
13	12	#include "rendutil.h"
14	13	#include "cheat.h"
15	14	#include "uiinput.h"
16	15	#include "ui/ui.h"
17	16	#include "ui/menu.h"
18	17	#include "ui/mainmenu.h"
19		#include "ui/cheatopt.h"
20	18
21	19
22	20
r250251	r250252
411	409
412	410	float effective_width, effective_left;
413	411	float visible_width, visible_main_menu_height;
414		float visible_extra_menu_height = 0;
	412	float visible_extra_menu_height;
415	413	float visible_top, visible_left;
416	414	int selected_subitem_too_big = FALSE;
417	415	int visible_lines;
r250251	r250252
812	810	void ui_menu::handle_keys(UINT32 flags)
813	811	{
814	812	int ignorepause = ui_menu::stack_has_special_main_menu();
815		int ignoreright = FALSE;
816		int ignoreleft = FALSE;
	813	int ignoreright;
	814	int ignoreleft;
817	815	int code;
818	816
819	817	// bail if no items

trunk/src/emu/ui/menu.h

r250251	r250252
180	180	void draw_text_box();
181	181	void handle_events();
182	182	void handle_keys(UINT32 flags);
183		void clear_free_list();
184	183
185	184	inline bool exclusive_input_pressed(int key, int repeat);
186	185	static void clear_free_list(running_machine &machine);

trunk/src/emu/ui/miscmenu.cpp

r250251	r250252
15	15	#include "ui/ui.h"
16	16	#include "ui/menu.h"
17	17	#include "ui/miscmenu.h"
18		#include "ui/filemngr.h"
19	18
20	19
21	20	/***************************************************************************

trunk/src/emu/ui/selgame.cpp

r250251	r250252
9	9	***************************************************************************/
10	10
11	11	#include "emu.h"
12		#include "osdnet.h"
13	12	#include "emuopts.h"
14	13	#include "ui/ui.h"
15	14	#include "ui/menu.h"
16		#include "rendutil.h"
17		#include "cheat.h"
18	15	#include "uiinput.h"
19	16	#include "ui/selgame.h"
20	17	#include "ui/inputmap.h"
21	18	#include "ui/miscmenu.h"
22	19	#include "audit.h"
23		#include "crsshair.h"
24	20	#include <ctype.h>
25	21
26	22
r250251	r250252
409	405	x1 += UI_BOX_LR_BORDER;
410	406	x2 -= UI_BOX_LR_BORDER;
411	407	y1 += UI_BOX_TB_BORDER;
412		y2 -= UI_BOX_TB_BORDER;
413	408
414	409	// draw all lines
415	410	for (line = 0; line < 4; line++)

trunk/src/emu/ui/swlist.cpp

r250251	r250252
270	270	// handle selections
271	271	else if (event->iptkey == IPT_UI_SELECT)
272	272	{
273		entry_info *entry = (entry_info *) event->itemref;
274		m_result = entry->short_name;
	273	entry_info *info = (entry_info *) event->itemref;
	274	m_result = info->short_name;
275	275	ui_menu::stack_pop(machine());
276	276	}
277	277	else if (event->iptkey == IPT_SPECIAL)

trunk/src/emu/ui/ui.cpp

r250251	r250252
18	18	#include "uiinput.h"
19	19	#include "ui/ui.h"
20	20	#include "ui/menu.h"
21		#include "ui/cheatopt.h"
22	21	#include "ui/mainmenu.h"
23		#include "ui/miscmenu.h"
24	22	#include "ui/filemngr.h"
25	23	#include "ui/sliders.h"
26	24	#include "ui/viewgfx.h"
r250251	r250252
371	369
372	370	// clear the input memory
373	371	machine().input().reset_polling();
374		while (machine().input().poll_switches() != INPUT_CODE_INVALID) ;
	372	while (machine().input().poll_switches() != INPUT_CODE_INVALID) { }
375	373
376	374	// loop while we have a handler
377	375	while (m_handler_callback != handler_ingame && !machine().scheduled_event_pending() && !ui_menu::stack_has_special_main_menu())
r250251	r250252
1688	1686	UINT32 ui_manager::handler_load_save(running_machine &machine, render_container *container, UINT32 state)
1689	1687	{
1690	1688	char filename[20];
1691		input_code code;
1692	1689	char file = 0;
1693	1690
1694	1691	// if we're not in the middle of anything, skip
r250251	r250252
1716	1713	}
1717	1714
1718	1715	// check for A-Z or 0-9
1719		for (input_item_id id = ITEM_ID_A; id <= ITEM_ID_Z; id++)
	1716	for (input_item_id id = ITEM_ID_A; id <= ITEM_ID_Z; ++id)
1720	1717	if (machine.input().code_pressed_once(input_code(DEVICE_CLASS_KEYBOARD, 0, ITEM_CLASS_SWITCH, ITEM_MODIFIER_NONE, id)))
1721	1718	file = id - ITEM_ID_A + 'a';
1722	1719	if (file == 0)
1723		for (input_item_id id = ITEM_ID_0; id <= ITEM_ID_9; id++)
	1720	for (input_item_id id = ITEM_ID_0; id <= ITEM_ID_9; ++id)
1724	1721	if (machine.input().code_pressed_once(input_code(DEVICE_CLASS_KEYBOARD, 0, ITEM_CLASS_SWITCH, ITEM_MODIFIER_NONE, id)))
1725	1722	file = id - ITEM_ID_0 + '0';
1726	1723	if (file == 0)
1727		for (input_item_id id = ITEM_ID_0_PAD; id <= ITEM_ID_9_PAD; id++)
	1724	for (input_item_id id = ITEM_ID_0_PAD; id <= ITEM_ID_9_PAD; ++id)
1728	1725	if (machine.input().code_pressed_once(input_code(DEVICE_CLASS_KEYBOARD, 0, ITEM_CLASS_SWITCH, ITEM_MODIFIER_NONE, id)))
1729	1726	file = id - ITEM_ID_0_PAD + '0';
1730	1727	if (file == 0)

trunk/src/emu/ui/videoopt.cpp

r250251	r250252
11	11	#include "emu.h"
12	12	#include "rendutil.h"
13	13
14		#include "uiinput.h"
15		#include "ui/ui.h"
16	14	#include "ui/menu.h"
17	15	#include "ui/videoopt.h"
18	16

trunk/src/emu/ui/viewgfx.cpp

r250251	r250252
10	10
11	11	#include "emu.h"
12	12	#include "ui/ui.h"
13		#include "ui/menu.h"
14	13	#include "uiinput.h"
15	14	#include "render.h"
16	15	#include "rendfont.h"
r250251	r250252
193	192	i < tempcount && state.gfxset.devcount < MAX_GFX_DECODERS;
194	193	i++, interface = gfx_iter.next())
195	194	{
196		for (count = 0; count < MAX_GFX_ELEMENTS && interface->gfx(count) != NULL; count++);
	195	for (count = 0; count < MAX_GFX_ELEMENTS && interface->gfx(count) != NULL; count++) { }
197	196
198	197	// count = index of first NULL
199	198	if (count > 0)
r250251	r250252
1007	1006	pixelscale = state.tilemap.zoom;
1008	1007	if (pixelscale == 0)
1009	1008	{
1010		for (maxxscale = 1; mapwidth * (maxxscale + 1) < mapboxwidth; maxxscale++) ;
1011		for (maxyscale = 1; mapheight * (maxyscale + 1) < mapboxheight; maxyscale++) ;
	1009	for (maxxscale = 1; mapwidth * (maxxscale + 1) < mapboxwidth; maxxscale++) { }
	1010	for (maxyscale = 1; mapheight * (maxyscale + 1) < mapboxheight; maxyscale++) { }
1012	1011	pixelscale = MIN(maxxscale, maxyscale);
1013	1012	}
1014	1013

trunk/src/emu/uiinput.cpp

r250251	r250252
97	97	ui_input_private *uidata = machine.ui_input_data;
98	98
99	99	/* update the state of all the UI keys */
100		for (ioport_type code = ioport_type(IPT_UI_FIRST + 1); code < IPT_UI_LAST; code++)
	100	for (ioport_type code = ioport_type(IPT_UI_FIRST + 1); code < IPT_UI_LAST; ++code)
101	101	{
102	102	bool pressed = machine.ioport().type_pressed(code);
103	103	if (!pressed || uidata->seqpressed[code] != SEQ_PRESSED_RESET)
r250251	r250252
249	249	bool ui_input_pressed_repeat(running_machine &machine, int code, int speed)
250	250	{
251	251	ui_input_private *uidata = machine.ui_input_data;
252		int pressed = FALSE;
	252	int pressed;
253	253
254	254	g_profiler.start(PROFILER_INPUT);
255	255

trunk/src/emu/validity.cpp

r250251	r250252
719	719	if (field.type() == IPT_POSITIONAL || field.type() == IPT_POSITIONAL_V)
720	720	{
721	721	int shift;
722		for (shift = 0; shift <= 31 && (~field.mask() & (1 << shift)) != 0; shift++) ;
	722	for (shift = 0; shift <= 31 && (~field.mask() & (1 << shift)) != 0; shift++) { }
723	723
724	724	// convert the positional max value to be in the bitmask for testing
725		INT32 analog_max = field.maxval();
726		analog_max = (analog_max - 1) << shift;
	725	//INT32 analog_max = field.maxval();
	726	//analog_max = (analog_max - 1) << shift;
727	727
728	728	// positional port size must fit in bits used
729	729	if ((field.mask() >> shift) + 1 < field.maxval())

trunk/src/emu/video.cpp

r250251	r250252
1142	1142	// find length of the device name
1143	1143	int end1 = snapstr.find("/", pos + 3);
1144	1144	int end2 = snapstr.find("%", pos + 3);
1145		int end = -1;
	1145	int end;
1146	1146
1147	1147	if ((end1 != -1) && (end2 != -1))
1148	1148	end = MIN(end1, end2);

trunk/src/emu/video/resnet.cpp

r250251	r250252
346	346	max = minval;
347	347	for( i = 0; i < networks_no; i++ )
348	348	{
349		double val = 0.0;
	349	double val;
350	350	double max_tmp = minval;
351	351	double min_tmp = maxval;
352	352

trunk/src/emu/video/rgbgen.h

r250251	r250252
19	19	class rgbaint_t
20	20	{
21	21	public:
22		inline rgbaint_t() { }
	22	inline rgbaint_t(): m_a(0), m_r(0), m_g(0), m_b(0) { }
23	23	inline rgbaint_t(UINT32 rgba) { set(rgba); }
24	24	inline rgbaint_t(INT32 a, INT32 r, INT32 g, INT32 b) { set(a, r, g, b); }
25	25	inline rgbaint_t(rgb_t& rgba) { set(rgba); }

trunk/src/emu/video/rgbvmx.h

r250251	r250252
28	28	typedef __vector unsigned int   VECU32;
29	29
30	30	public:
31		inline rgbaint_t() { }
	31	inline rgbaint_t(): VECS8(0), VECU8(0), VECS16(0), VECU16(0), VECS32(0), VECU32(0) { }
32	32	inline rgbaint_t(UINT32 rgba) { set(rgba); }
33	33	inline rgbaint_t(INT32 a, INT32 r, INT32 g, INT32 b) { set(a, r, g, b); }
34	34	inline rgbaint_t(rgb_t& rgb) { set(rgb); }
35		inline rgbaint_t(VECS32 rgba) { m_value = rgba; }
	35	inline rgbaint_t(VECS32 rgba): VECS8(0), VECU8(0), VECS16(0), VECU16(0), VECS32(0), VECU32(0) { m_value = rgba; }
36	36
37	37	inline void set(rgbaint_t& other) { m_value = other.m_value; }
38	38

trunk/src/emu/video/vector.cpp

r250251	r250252
130	130
131	131	vector_device::vector_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
132	132	: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
133		device_video_interface(mconfig, *this)
	133	device_video_interface(mconfig, *this),
	134	m_vector_list(NULL)
134	135	{
135	136	}
136	137
137	138	vector_device::vector_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
138	139	: device_t(mconfig, VECTOR, "VECTOR", tag, owner, clock, "vector_device", __FILE__),
139		device_video_interface(mconfig, *this)
	140	device_video_interface(mconfig, *this),
	141	m_vector_list(NULL)
140	142	{
141	143	}
142	144
r250251	r250252
299	301	float xratio = xscale / yscale;
300	302	float yratio = yscale / xscale;
301	303	xratio = (xratio < 1.0f) ? xratio : 1.0f;
302		xratio = (yratio < 1.0f) ? yratio : 1.0f;
	304	yratio = (yratio < 1.0f) ? yratio : 1.0f;
303	305
304	306	point *curpoint;
305	307	render_bounds clip;

trunk/src/lib/formats/fsd_dsk.cpp

r0	r250252
	1	// license:BSD-3-Clause
	2	// copyright-holders:Nigel Barnes
	3	/***************************************************************************
	4
	5	BBC Micro 8271 protected disk image format
	6
	7	Disk image format
	8
	9	***************************************************************************/
	10
	11	#include "emu.h"
	12	#include "fsd_dsk.h"
	13
	14
	15	/*********************************************************************
	16
	17	BBC Micro 8271 protected disk image format
	18
	19	Header:
	20	=======
	21	Identifier: "FSD"  string literal 3 bytes
	22	Creator:        5 bytes; date of creation/author
	23	Title:        Character string (unlimited length; may contain any but null)
	24	Title_End: 0x00   byte literal 1 byte
	25	Num_Tr: xx     1 byte, number of tracks
	26
	27	For each track
	28	==============
	29	track_num: 1 byte
	30	num_sec: 1 byte (00 == unformatted)
	31	readable: 1 byte (00 == unreadable, ff ==readable)
	32
	33	If readable:
	34	For each sector
	35	===============
	36	Track_ID: 1 byte
	37	Head_number: 1 byte
	38	Sector_ID: 1 byte
	39	reported_size: 1 byte (2^{7+x}; 0 ==>128, 1 ==> 256, 2==>512, 3==>1024 etc)
	40	real_size: 1 byte (2^{7+x})
	41	error_code: 1 byte (0==No Error, &20==Deleted Data; &0E = Data CRC Error)
	42	data: <real_size> bytes
	43	Note that error_code matches the OSWORD &7F result byte
	44
	45	If unreadable:
	46	Track_ID: 1 byte
	47	Head_number: 1 byte
	48	Sector_ID: 1 byte
	49	reported_size: 1 byte
	50
	51	Decoding of the "creator" 5 byte field:
	52	=======================================
	53	(byte1 byte2 byte3 byte4 byte5)
	54
	55	Date_DD = (byte1 AND &F8)/8
	56	Date_MM = (byte3 AND &0F)
	57	Date_YYYY = (byte1 AND &07)*256+byte2
	58	Creator_ID = (byte3 AND &F0)/16
	59	Release_num = ((byte5 AND &C0)/64)*256 + byte4
	60
	61	*********************************************************************/
	62
	63	fsd_format::fsd_format()
	64	{
	65	}
	66
	67	const char *fsd_format::name() const
	68	{
	69	return "fsd";
	70	}
	71
	72	const char *fsd_format::description() const
	73	{
	74	return "BBC Micro 8271 protected disk image";
	75	}
	76
	77	const char *fsd_format::extensions() const
	78	{
	79	return "fsd";
	80	}
	81
	82	bool fsd_format::supports_save() const
	83	{
	84	return false;
	85	}
	86
	87	int fsd_format::identify(io_generic *io, UINT32 form_factor)
	88	{
	89	UINT8 h[3];
	90
	91	io_generic_read(io, h, 0, 3);
	92	if (memcmp(h, "FSD", 3) == 0) {
	93	return 100;
	94	}
	95	return 0;
	96	}
	97
	98	bool fsd_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
	99	{
	100	UINT64 size = io_generic_size(io);
	101	dynamic_buffer img(size);
	102	io_generic_read(io, &img[0], 0, size);
	103
	104	UINT64 pos;
	105	std::string title;
	106	for(pos=8; pos < size && img[pos] != '\0'; pos++)
	107	title += char(img[pos]);
	108	pos++;
	109
	110	if(pos >= size)
	111	return false;
	112
	113	//popmessage("Loading image of '%s'\n", title);
	114
	115	desc_pc_sector sects[10];
	116	UINT8 total_tracks = img[pos++];
	117	UINT8 tnum, hnum, snum, ssize, error;
	118
	119	hnum = 0;
	120	//osd_printf_verbose("%d Tracks\n", total_tracks+1);
	121	//osd_printf_verbose("Tr.#  No.S  Sec.# Tr.ID Head# SecID IDsiz REsiz Error\n");
	122	for(int curr_track=0; curr_track <= total_tracks; curr_track++)
	123	{
	124	UINT8 track = img[pos++];
	125	UINT8 spt = img[pos++];
	126	//osd_printf_verbose("%x    %x\n", track, spt);
	127	if (spt > 0) // formatted
	128	{
	129	UINT8 readable = img[pos++];
	130	for (int i = 0; i < spt; i++)
	131	{
	132	tnum = img[pos++];  // logical track
	133	hnum = img[pos++];  // head number
	134	snum = img[pos++];  // logical sector
	135	ssize = img[pos++]; // reported size
	136	sects[i].track = tnum;
	137	sects[i].head = hnum;
	138	sects[i].sector = snum;
	139	sects[i].size = ssize;
	140	if (readable == 0xff)
	141	{
	142	sects[i].actual_size = 1 << (img[pos++] + 7);
	143	error = img[pos++];
	144	sects[i].deleted = (error & 0x20) == 0x20;
	145	sects[i].bad_crc = (error & 0x0e) == 0x0e;
	146	sects[i].data = &img[pos];
	147	pos += sects[i].actual_size;
	148	//osd_printf_verbose("Read        %x    %x    %x    %x    %x  %x  %x\n", i, sects[i].track, sects[i].head, sects[i].sector, sects[i].size, sects[i].actual_size, error);
	149	}
	150	else
	151	{
	152	throw emu_fatalerror("fsd_format: Unsupported unreadable sector on track %d sector %d head %d", track, i, hnum);
	153
	154	// Unreadable sectors not supported!!
	155	//sects[i].track = track;
	156	//sects[i].head = 0;
	157	//sects[i].sector = i;
	158	//sects[i].size = 0;
	159	//sects[i].actual_size = 0;
	160	//sects[i].deleted = false;
	161	//sects[i].bad_crc = false;
	162	//sects[i].data = NULL;
	163	//osd_printf_verbose("Unread      %x    %x    %x    %x    %x  %x  %x\n", i, sects[i].track, sects[i].head, sects[i].sector, sects[i].size, sects[i].actual_size, 0);
	164	}
	165	}
	166	}
	167	else // unformatted
	168	{
	169	sects[0].track = curr_track;
	170	sects[0].head = hnum;
	171	sects[0].sector = 0;
	172	sects[0].size = 0;
	173	//osd_printf_verbose("Unform      %x    %x    %x    %x    %x  %x  %x\n", 0, sects[0].track, sects[0].head, sects[0].sector, sects[0].size, sects[0].actual_size, 0);
	174	}
	175	build_wd_track_fm(curr_track, hnum, image, 50000, spt, sects, 10, 40, 10);
	176	}
	177	return true;
	178	}
	179
	180	const floppy_format_type FLOPPY_FSD_FORMAT = &floppy_image_format_creator<fsd_format>;

trunk/src/lib/formats/fsd_dsk.h

r0	r250252
	1	// license:BSD-3-Clause
	2	// copyright-holders:Nigel Barnes
	3	/***************************************************************************
	4
	5	BBC Micro
	6
	7	Disk image formats
	8
	9	***************************************************************************/
	10
	11	#pragma once
	12
	13	#ifndef __FSD_DSK_H__
	14	#define __FSD_DSK_H__
	15
	16	#include "flopimg.h"
	17	#include "wd177x_dsk.h"
	18
	19	/**************************************************************************/
	20
	21	LEGACY_FLOPPY_OPTIONS_EXTERN(fsd);
	22
	23	/**************************************************************************/
	24
	25
	26
	27	class fsd_format : public floppy_image_format_t
	28	{
	29	public:
	30	fsd_format();
	31
	32	virtual const char *name() const;
	33	virtual const char *description() const;
	34	virtual const char *extensions() const;
	35	virtual bool supports_save() const;
	36
	37	virtual int identify(io_generic *io, UINT32 form_factor);
	38	virtual bool load(io_generic *io, UINT32 form_factor, floppy_image *image);
	39	};
	40
	41	extern const floppy_format_type FLOPPY_FSD_FORMAT;
	42
	43	#endif // __FSD_DSK_H__

trunk/src/lib/netlist/nl_parser.cpp

r250251	r250252
9	9	#include "nl_factory.h"
10	10	#include "devices/nld_truthtable.h"
11	11
12		// for now, make buggy GCC/Mingw STFU about I64FMT
13		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
14		#pragma GCC diagnostic push
15		#pragma GCC diagnostic ignored "-Wformat"
16		#pragma GCC diagnostic ignored "-Wformat-extra-args"
17		#endif
18
19	12	namespace netlist
20	13	{
21	14	// ----------------------------------------------------------------------------------------
r250251	r250252
463	456	#endif
464	457	}
465	458	}
466
467		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
468		#pragma GCC diagnostic pop
469		#endif

trunk/src/lib/netlist/plib/pconfig.h

r250251	r250252
5	5	*
6	6	*/
7	7
8		// for now, make buggy GCC/Mingw STFU about I64FMT
9		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
10		#pragma GCC diagnostic push
11		#pragma GCC diagnostic ignored "-Wformat"
12		#pragma GCC diagnostic ignored "-Wformat-extra-args"
13		#endif
14
15	8	#ifndef PCONFIG_H_
16	9	#define PCONFIG_H_
17	10
r250251	r250252
206	199	#endif
207	200
208	201	#endif /* PCONFIG_H_ */
209
210		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
211		#pragma GCC diagnostic pop
212		#endif

trunk/src/lib/netlist/plib/pparser.cpp

r250251	r250252
9	9
10	10	#include "pparser.h"
11	11
12		// for now, make buggy GCC/Mingw STFU about I64FMT
13		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
14		#pragma GCC diagnostic push
15		#pragma GCC diagnostic ignored "-Wformat"
16		#pragma GCC diagnostic ignored "-Wformat-extra-args"
17		#endif
18
19	12	// ----------------------------------------------------------------------------------------
20	13	// A simple tokenizer
21	14	// ----------------------------------------------------------------------------------------
r250251	r250252
475	468	}
476	469	return ostrm;
477	470	}
478
479
480		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
481		#pragma GCC diagnostic pop
482		#endif

trunk/src/lib/netlist/solver/nld_solver.cpp

r250251	r250252
9	9	* the vectorizations fast-math enables pretty expensive
10	10	*/
11	11
12		// for now, make buggy GCC/Mingw STFU about I64FMT
13		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
14		#pragma GCC diagnostic push
15		#pragma GCC diagnostic ignored "-Wformat"
16		#pragma GCC diagnostic ignored "-Wformat-extra-args"
17		#endif
18
19
20	12	#if 0
21	13	#pragma GCC optimize "-ffast-math"
22	14	//#pragma GCC optimize "-ftree-parallelize-loops=4"
r250251	r250252
649	641	}
650	642
651	643	NETLIB_NAMESPACE_DEVICES_END()
652
653		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
654		#pragma GCC diagnostic pop
655		#endif

trunk/src/lib/netlist/tools/nl_convert.cpp

r250251	r250252
11	11	#include "nl_convert.h"
12	12
13	13
14		// for now, make buggy GCC/Mingw STFU about I64FMT
15		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
16		#pragma GCC diagnostic push
17		#pragma GCC diagnostic ignored "-Wformat"
18		#pragma GCC diagnostic ignored "-Wformat-extra-args"
19		#endif
20
21	14	template<typename Class>
22	15	static plist_t<int> bubble(const pnamedlist_t<Class *> &sl)
23	16	{
r250251	r250252
453	446	}
454	447
455	448	}
456
457		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
458		#pragma GCC diagnostic pop
459		#endif

trunk/src/mame/arcade.lst

r250251	r250252
8138	8138	wwfwfestb       // bootleg
8139	8139	wwfwfestj       // TA-0031 (c) 1991 (Japan)
8140	8140	wwfwfestk       // TA-0031 (c) 1991 (Korea)
8141		shadfrce        // TA-0032 (c) 1993 (US)
	8141	shadfrce        // TA-0032 (c) 1993 (World)
	8142	shadfrceu       // TA-0032 (c) 1993 (US)
8142	8143	shadfrcej       // TA-0032 (c) 1993 (Japan)
8143		shadfrcejv2     // TA-0032 (c) 1993 (Japan)
8144	8144
8145	8145	// Stern "Berzerk hardware" games
8146	8146	berzerk         // (c) 1980
r250251	r250252
9006	9006	// 68020 board
9007	9007	samuraia        // (c) 1993 (World)
9008	9008	sngkace         // (c) 1993 (Japan)
	9009	sngkacea        // (c) 1993 (Japan)
9009	9010	gunbird         // (c) 1994
9010	9011	gunbirdk        // (c) 1994
9011	9012	gunbirdj        // (c) 1994
r250251	r250252
11231	11232	potnpkre        // Bootleg
11232	11233	potnpkrf        // Bootleg
11233	11234	potnpkrg        // Bootleg
	11235	potnpkrh        // Bootleg
11234	11236	ngold           // 198? Unknown
11235	11237	ngolda          // 198? Unknown
11236	11238	ngoldb          // 198? Unknown
r250251	r250252
13312	13314	deathrac      // (c) 1976 Exidy
13313	13315	biplane4      // (c) 1976 Fun Games
13314	13316	take5         // (c) 1975 Fun Games
	13317	//knightar    // (c) 1976 PSE
	13318	bazooka       // (c) 1976 PSE
	13319	bazookabr     // (c) 1977 Taito do Brasil
13315	13320	dpatrol       // (c) 1977 PSE
13316		//knightar    // (c) 1976 PSE
13317	13321	//gametree    // (c) 1978 PSE
13318	13322	vollyrmt      // (c) 1973 Ramtek
13319	13323	hockyrmt      // (c) 1973 Ramtek
r250251	r250252
13325	13329	monacogp      // (c) 1980 Sega
13326	13330	monacogpa     // (c) 1980 Sega
13327	13331	gunman        // (c) 1977 Taito
13328		bazooka       // (c) 1977 PSE
13329		bazookabr     // (c) 1977 Taito do Brasil
13330	13332	missilex      // (c) 1977 Taito
13331	13333	ttblock       // (c) 1977 Taito
13332	13334	zzblock       // (c) 1979 Taito

trunk/src/mame/audio/irem.cpp

r250251	r250252
409	409	#define USE_FRONTIERS 1
410	410	#define USE_FIXED_STV 1
411	411
412		#include "nl_kidniki.cpp"
	412	#include "nl_kidniki.inc"
413	413
414	414	NETLIST_START(kidniki_interface)
415	415

trunk/src/mame/audio/nl_kidniki.cpp

r250251	r250252
1
2		#include "netlist/devices/net_lib.h"
3
4		#ifndef USE_FRONTIERS
5		#define USE_FRONTIERS 0
6		#endif
7
8		#ifndef USE_FIXED_STV
9		#define USE_FIXED_STV 0
10		#endif
11
12		/* ----------------------------------------------------------------------------
13		*  Library section header START
14		* ---------------------------------------------------------------------------*/
15
16		#ifndef __PLIB_PREPROCESSOR__
17
18		#endif
19
20		/* ----------------------------------------------------------------------------
21		*  Library section header END
22		* ---------------------------------------------------------------------------*/
23
24		/* ----------------------------------------------------------------------------
25		*  Kidniki schematics
26		* ---------------------------------------------------------------------------*/
27
28		NETLIST_START(kidniki_schematics)
29		//  EESCHEMA NETLIST VERSION 1.1 (SPICE FORMAT) CREATION DATE: SAT 06 JUN 2015 01:06:26 PM CEST
30		//  TO EXCLUDE A COMPONENT FROM THE SPICE NETLIST ADD [SPICE_NETLIST_ENABLED] USER FIELD SET TO: N
31		//  TO REORDER THE COMPONENT SPICE NODE SEQUENCE ADD [SPICE_NODE_SEQUENCE] USER FIELD AND DEFINE SEQUENCE: 2,1,0
32		// SHEET NAME:/
33		// IGNORED O_AUDIO0: O_AUDIO0  49 0
34		// .END
35
36		/*
37		* Workaround: The simplified opamp model does not correctly
38		* model the internals of the inputs.
39		*/
40
41		ANALOG_INPUT(VWORKAROUND, 2.061)
42		RES(RWORKAROUND, RES_K(27))
43		NET_C(VWORKAROUND.Q, RWORKAROUND.1)
44		NET_C(XU1.6, RWORKAROUND.2)
45
46		CAP(C200, CAP_N(100))
47		CAP(C28, CAP_U(1))
48		CAP(C31, CAP_N(470))
49		CAP(C32, CAP_N(3.3))
50		CAP(C33, CAP_U(1))
51		CAP(C34, CAP_N(1))
52		CAP(C35, CAP_N(1))
53		CAP(C36, CAP_N(6.5))
54		CAP(C37, CAP_N(22))
55		CAP(C38, CAP_N(1))
56		CAP(C39, CAP_N(1))
57		CAP(C40, CAP_P(12))
58		CAP(C41, CAP_U(1))
59		CAP(C42, CAP_N(1.2))
60		CAP(C43, CAP_N(1.2))
61		CAP(C44, CAP_U(1))
62		CAP(C45, CAP_N(22))
63		CAP(C47, CAP_U(1))
64		CAP(C48, CAP_N(470))
65		CAP(C49, CAP_N(3.3))
66		CAP(C50, CAP_N(22))
67		CAP(C51, CAP_N(22))
68		CAP(C52, CAP_N(27))
69		CAP(C53, CAP_N(27))
70		CAP(C56, CAP_N(6.8))
71		CAP(C57, CAP_N(6.8))
72		CAP(C59, CAP_N(6.8))
73		CAP(C60, CAP_N(22))
74		CAP(C61, CAP_N(22))
75		CAP(C62, CAP_N(6.8))
76		CAP(C63, CAP_N(1))
77		CAP(C64, CAP_N(68))
78		CAP(C65, CAP_N(68))
79		CAP(C66, CAP_N(68))
80		CAP(C67, CAP_N(15))
81		CAP(C68, CAP_N(15))
82		CAP(C69, CAP_N(10))
83		CAP(C70, CAP_N(22))
84		CAP(C72, CAP_N(12))
85		CAP(C73, CAP_N(10))
86		CAP(C76, CAP_N(68))
87		CAP(C77, CAP_N(12))
88
89		DIODE(D3, "1S1588")
90		DIODE(D4, "1S1588")
91		DIODE(D5, "1S1588")
92
93		POT(RV1, RES_K(50))
94
95		QBJT_EB(Q10, "2SC945")
96		QBJT_EB(Q3, "2SC945")
97		QBJT_EB(Q4, "2SC945")
98		QBJT_EB(Q5, "2SC945")
99		QBJT_EB(Q6, "2SC945")
100		QBJT_EB(Q7, "2SC945")
101		QBJT_EB(Q9, "2SC945")
102
103		LM324_DIP(XU1)
104		LM358_DIP(XU2)
105
106		MC14584B_DIP(XU3)
107
108		RES(R100, RES_K(560))
109		RES(R101, RES_K(150))
110		RES(R102, RES_K(150))
111		RES(R103, RES_K(470))
112		RES(R104, RES_K(22))
113		RES(R105, RES_K(470))
114		RES(R106, RES_K(150))
115		RES(R107, RES_K(150))
116		RES(R108, RES_K(560))
117		RES(R119, RES_K(22))
118		RES(R200, RES_K(100))
119		RES(R201, RES_K(100))
120		RES(R27, RES_K(6.8))
121		RES(R28, RES_K(150))
122		RES(R29, RES_K(2.7))
123		RES(R30, RES_K(10))
124		RES(R31, RES_K(5.1))
125		//RES(R32, RES_K(1))
126		RES(R32, RES_K(4.7))
127		RES(R34, RES_K(100))
128		RES(R35, RES_K(100))
129		RES(R36, RES_K(100))
130		RES(R37, RES_K(47))
131		RES(R38, 820)
132		RES(R39, RES_K(22))
133		RES(R40, RES_K(10))
134		RES(R41, RES_K(10))
135		RES(R42, RES_K(150))
136		RES(R43, 470)
137		RES(R44, RES_K(100))
138		RES(R45, RES_K(1))
139		RES(R46, RES_K(12))
140		RES(R48, 470)
141		RES(R48_2, RES_K(100))
142		RES(R49, RES_K(10))
143		RES(R50, RES_K(2.2))
144		RES(R51, RES_K(150))
145		RES(R52, RES_K(100))
146		RES(R53, RES_K(100))
147		RES(R54, RES_K(680))
148		RES(R55, RES_K(510))
149		RES(R57, 560)
150		RES(R58, RES_K(39))
151		RES(R59, 560)
152		RES(R60, RES_K(39))
153		RES(R61, RES_K(100))
154		RES(R62, RES_K(100))
155		RES(R63, RES_K(1))
156		RES(R65, RES_K(1))
157		RES(R65_1, RES_K(27))
158		RES(R66, RES_M(1))
159		RES(R67, RES_K(100))
160		RES(R68, RES_K(100))
161		RES(R69, RES_K(1))
162		RES(R70, RES_K(10))
163		RES(R71, RES_K(100))
164		RES(R72, RES_K(100))
165		RES(R73, RES_K(10))
166		RES(R74, RES_K(10))
167		RES(R75, RES_K(10))
168		RES(R76, RES_K(10))
169		RES(R81, 220)
170		RES(R82, RES_M(2.2))
171		RES(R83, RES_K(12))
172		RES(R84, RES_K(1))
173		RES(R85, RES_M(2.2))
174		RES(R86, RES_K(10))
175		RES(R87, RES_K(68))
176		RES(R89, RES_K(22))
177		RES(R90, RES_K(390))
178		RES(R91, RES_K(100))
179		RES(R92, RES_K(22))
180		RES(R93, RES_K(1))
181		RES(R94, RES_K(22))
182		RES(R95, RES_K(330))
183		RES(R96, RES_K(150))
184		RES(R97, RES_K(150))
185		RES(R98, RES_K(650))
186
187		#if USE_FIXED_STV
188		ANALOG_INPUT(STV, 2)
189		#else
190		RES(R78, RES_K(3.3))
191		RES(R77, RES_K(2.2))
192		CAP(C58, CAP_U(47))
193		#endif
194
195		NET_C(R95.1, XU3.2, R96.2)
196		NET_C(R95.2, XU3.1, C69.1)
197		NET_C(XU3.3, R103.2, C73.1)
198		NET_C(XU3.4, R103.1, R102.2)
199		NET_C(XU3.5, R105.2, C72.1)
200		NET_C(XU3.6, R105.1, R106.2)
201		#if USE_FIXED_STV
202		//FIXME: We should have a NET_C_REMOVE
203		NET_C(XU3.7, C69.2, C73.2, C72.2, C77.2, C67.2, C68.2, R65.2, R38.2, XU1.11, R54.2, Q4.E, R63.2, C47.2, R72.2, R67.2, R71.2, R68.2, C48.2, R46.2, C28.1, C32.1, R43.2, XU2.4, C56.1, C52.1,/* R77.2, C58.1, */ R48.2, R93.2, R94.2, R119.2, R104.2, R53.2, R34.2, R81.2, R92.2, R89.2, C33.1, R37.2, R36.1, R91.1, I_V0.Q, RV1.3)
204		#else
205		NET_C(XU3.7, C69.2, C73.2, C72.2, C77.2, C67.2, C68.2, R65.2, R38.2, XU1.11, R54.2, Q4.E, R63.2, C47.2, R72.2, R67.2, R71.2, R68.2, C48.2, R46.2, C28.1, C32.1, R43.2, XU2.4, C56.1, C52.1, R77.2, C58.1, R48.2, R93.2, R94.2, R119.2, R104.2, R53.2, R34.2, R81.2, R92.2, R89.2, C33.1, R37.2, R36.1, R91.1, I_V0.Q, RV1.3)
206		#endif
207		NET_C(XU3.8, R108.1, R107.2)
208		NET_C(XU3.9, R108.2, C77.1)
209		NET_C(XU3.10, R100.1, R101.2)
210		NET_C(XU3.11, R100.2, C67.1)
211		NET_C(XU3.12, R98.1, R97.2)
212		NET_C(XU3.13, R98.2, C68.1)
213		#if USE_FIXED_STV
214		NET_C(XU3.14, XU1.4, R66.1, R70.1, Q6.C, Q5.C, XU2.8, /* R78.1, */ R86.1, R83.1, Q3.C, I_V5.Q)
215		#else
216		NET_C(XU3.14, XU1.4, R66.1, R70.1, Q6.C, Q5.C, XU2.8, R78.1, R86.1, R83.1, Q3.C, I_V5.Q)
217		#endif
218		NET_C(R96.1, R102.1, R106.1, R107.1, R101.1, R97.1, R65.1, C63.2)
219		NET_C(C63.1, R65_1.2)
220		NET_C(R65_1.1, R44.2, C38.2, C40.2, XU1.6)
221		#if USE_FIXED_STV
222		NET_C(R30.1, R41.1, R40.1, STV, R76.2, /* R78.2, R77.1, C58.2*/ STV)
223		#else
224		NET_C(R30.1, R41.1, R40.1, R76.2, R78.2, R77.1, C58.2)
225		#endif
226		NET_C(R30.2, XU1.5)
227		NET_C(R44.1, C39.1, C40.1, R48_2.2)
228		NET_C(C38.1, C39.2, R38.1)
229		NET_C(XU1.1, XU1.2, R39.1, R32.2)
230		NET_C(XU1.3, C34.1, R41.2)
231		NET_C(XU1.7, R45.2)
232		NET_C(XU1.8, XU1.9, R31.2, C36.2)
233		NET_C(XU1.10, R42.1, C32.2)
234		NET_C(XU1.12, C49.1, C31.1, R40.2, C61.1, C60.1)
235		NET_C(XU1.13, R27.1, R28.2)
236		NET_C(XU1.14, R28.1, R29.2, I_SINH0)
237		NET_C(R48_2.1, C45.2, R54.1)
238		NET_C(C45.1, R55.1, Q7.B)
239		NET_C(R55.2, R90.2, C33.2, R37.1, Q3.E)
240		NET_C(R45.1, C44.2)
241		NET_C(C44.1, R66.2, Q4.B)
242		NET_C(Q4.C, C42.1, C43.1, R46.1, C35.2, D4.K, D5.K)
243		NET_C(R70.2, R69.2, Q7.C)
244		NET_C(R63.1, Q7.E)
245		NET_C(R69.1, C49.2)
246		NET_C(C42.2, R58.1, D5.A)
247		NET_C(R58.2, R57.1, C47.1)
248		NET_C(R57.2, Q6.E)
249		NET_C(Q6.B, R61.1)
250		NET_C(C50.1, R67.1, R61.2)
251		NET_C(C50.2, R72.1, I_OH0.Q)
252		NET_C(C51.1, R68.1, R62.2)
253		NET_C(C51.2, R71.1, I_CH0.Q)
254		NET_C(R62.1, Q5.B)
255		NET_C(Q5.E, R59.2)
256		NET_C(R60.1, C43.2, D4.A)
257		NET_C(R60.2, R59.1, C48.1)
258		NET_C(C35.1, C34.2, R39.2)
259		NET_C(R32.1, C31.2)
260		NET_C(R27.2, C28.2)
261		NET_C(R29.1, R31.1, R50.2, R49.1, RV1.1)
262		NET_C(R42.2, R51.1, C36.1)
263		NET_C(R51.2, C41.1)
264		NET_C(C41.2, R43.1, I_SOUNDIC0)
265		NET_C(XU2.1, XU2.2, R73.1)
266		NET_C(XU2.3, R76.1, C200.2)
267		NET_C(XU2.5, C56.2, R75.1)
268		NET_C(XU2.6, XU2.7, R50.1, C53.2)
269		NET_C(R75.2, R74.1, C53.1)
270		NET_C(R74.2, C52.2, R73.2)
271		NET_C(R49.2, R48.1, I_SOUND0)
272		NET_C(Q9.E, R81.1)
273		NET_C(Q9.C, R84.2, R83.2, R82.1, C59.1)
274		NET_C(Q9.B, R82.2, C62.1)
275		NET_C(Q10.E, R93.1)
276		NET_C(Q10.C, R87.2, R86.2, R85.1, C76.1)
277		NET_C(Q10.B, R85.2, C64.1)
278		NET_C(R84.1, C61.2)
279		NET_C(C60.2, R87.1)
280		NET_C(C64.2, C65.1, R94.1, D3.K)
281		NET_C(C65.2, C66.1, R119.1)
282		NET_C(C66.2, C76.2, R104.1)
283		NET_C(R53.1, R52.2, C37.1)
284		NET_C(R34.1, C37.2, I_BD0.Q)
285		NET_C(R52.1, D3.A)
286		NET_C(R92.1, C62.2, C57.1)
287		NET_C(R89.1, C57.2, C59.2, R90.1)
288		NET_C(Q3.B, R35.1)
289		NET_C(R35.2, R36.2, C70.1)
290		NET_C(R91.2, C70.2, I_SD0.Q)
291		NET_C(I_MSM3K0.Q, R200.2)
292		NET_C(I_MSM2K0.Q, R201.2)
293		NET_C(R200.1, R201.1, C200.1)
294
295		/* Amplifier stage */
296
297		CAP(C26, CAP_U(1))
298		RES(R25, 560)
299		RES(R26, RES_K(47))
300		CAP(C29, CAP_U(0.01))
301
302		NET_C(RV1.2, C26.1)
303		NET_C(C26.2, R25.1)
304		NET_C(R25.2, R26.1, C29.1)
305		NET_C(R26.2, C29.2, GND)
306
307		NETLIST_END()

trunk/src/mame/audio/nl_kidniki.inc

r0	r250252
	1
	2	#include "netlist/devices/net_lib.h"
	3
	4	#ifndef USE_FRONTIERS
	5	#define USE_FRONTIERS 0
	6	#endif
	7
	8	#ifndef USE_FIXED_STV
	9	#define USE_FIXED_STV 0
	10	#endif
	11
	12	/* ----------------------------------------------------------------------------
	13	*  Library section header START
	14	* ---------------------------------------------------------------------------*/
	15
	16	#ifndef __PLIB_PREPROCESSOR__
	17
	18	#endif
	19
	20	/* ----------------------------------------------------------------------------
	21	*  Library section header END
	22	* ---------------------------------------------------------------------------*/
	23
	24	/* ----------------------------------------------------------------------------
	25	*  Kidniki schematics
	26	* ---------------------------------------------------------------------------*/
	27
	28	NETLIST_START(kidniki_schematics)
	29	//  EESCHEMA NETLIST VERSION 1.1 (SPICE FORMAT) CREATION DATE: SAT 06 JUN 2015 01:06:26 PM CEST
	30	//  TO EXCLUDE A COMPONENT FROM THE SPICE NETLIST ADD [SPICE_NETLIST_ENABLED] USER FIELD SET TO: N
	31	//  TO REORDER THE COMPONENT SPICE NODE SEQUENCE ADD [SPICE_NODE_SEQUENCE] USER FIELD AND DEFINE SEQUENCE: 2,1,0
	32	// SHEET NAME:/
	33	// IGNORED O_AUDIO0: O_AUDIO0  49 0
	34	// .END
	35
	36	/*
	37	* Workaround: The simplified opamp model does not correctly
	38	* model the internals of the inputs.
	39	*/
	40
	41	ANALOG_INPUT(VWORKAROUND, 2.061)
	42	RES(RWORKAROUND, RES_K(27))
	43	NET_C(VWORKAROUND.Q, RWORKAROUND.1)
	44	NET_C(XU1.6, RWORKAROUND.2)
	45
	46	CAP(C200, CAP_N(100))
	47	CAP(C28, CAP_U(1))
	48	CAP(C31, CAP_N(470))
	49	CAP(C32, CAP_N(3.3))
	50	CAP(C33, CAP_U(1))
	51	CAP(C34, CAP_N(1))
	52	CAP(C35, CAP_N(1))
	53	CAP(C36, CAP_N(6.5))
	54	CAP(C37, CAP_N(22))
	55	CAP(C38, CAP_N(1))
	56	CAP(C39, CAP_N(1))
	57	CAP(C40, CAP_P(12))
	58	CAP(C41, CAP_U(1))
	59	CAP(C42, CAP_N(1.2))
	60	CAP(C43, CAP_N(1.2))
	61	CAP(C44, CAP_U(1))
	62	CAP(C45, CAP_N(22))
	63	CAP(C47, CAP_U(1))
	64	CAP(C48, CAP_N(470))
	65	CAP(C49, CAP_N(3.3))
	66	CAP(C50, CAP_N(22))
	67	CAP(C51, CAP_N(22))
	68	CAP(C52, CAP_N(27))
	69	CAP(C53, CAP_N(27))
	70	CAP(C56, CAP_N(6.8))
	71	CAP(C57, CAP_N(6.8))
	72	CAP(C59, CAP_N(6.8))
	73	CAP(C60, CAP_N(22))
	74	CAP(C61, CAP_N(22))
	75	CAP(C62, CAP_N(6.8))
	76	CAP(C63, CAP_N(1))
	77	CAP(C64, CAP_N(68))
	78	CAP(C65, CAP_N(68))
	79	CAP(C66, CAP_N(68))
	80	CAP(C67, CAP_N(15))
	81	CAP(C68, CAP_N(15))
	82	CAP(C69, CAP_N(10))
	83	CAP(C70, CAP_N(22))
	84	CAP(C72, CAP_N(12))
	85	CAP(C73, CAP_N(10))
	86	CAP(C76, CAP_N(68))
	87	CAP(C77, CAP_N(12))
	88
	89	DIODE(D3, "1S1588")
	90	DIODE(D4, "1S1588")
	91	DIODE(D5, "1S1588")
	92
	93	POT(RV1, RES_K(50))
	94
	95	QBJT_EB(Q10, "2SC945")
	96	QBJT_EB(Q3, "2SC945")
	97	QBJT_EB(Q4, "2SC945")
	98	QBJT_EB(Q5, "2SC945")
	99	QBJT_EB(Q6, "2SC945")
	100	QBJT_EB(Q7, "2SC945")
	101	QBJT_EB(Q9, "2SC945")
	102
	103	LM324_DIP(XU1)
	104	LM358_DIP(XU2)
	105
	106	MC14584B_DIP(XU3)
	107
	108	RES(R100, RES_K(560))
	109	RES(R101, RES_K(150))
	110	RES(R102, RES_K(150))
	111	RES(R103, RES_K(470))
	112	RES(R104, RES_K(22))
	113	RES(R105, RES_K(470))
	114	RES(R106, RES_K(150))
	115	RES(R107, RES_K(150))
	116	RES(R108, RES_K(560))
	117	RES(R119, RES_K(22))
	118	RES(R200, RES_K(100))
	119	RES(R201, RES_K(100))
	120	RES(R27, RES_K(6.8))
	121	RES(R28, RES_K(150))
	122	RES(R29, RES_K(2.7))
	123	RES(R30, RES_K(10))
	124	RES(R31, RES_K(5.1))
	125	//RES(R32, RES_K(1))
	126	RES(R32, RES_K(4.7))
	127	RES(R34, RES_K(100))
	128	RES(R35, RES_K(100))
	129	RES(R36, RES_K(100))
	130	RES(R37, RES_K(47))
	131	RES(R38, 820)
	132	RES(R39, RES_K(22))
	133	RES(R40, RES_K(10))
	134	RES(R41, RES_K(10))
	135	RES(R42, RES_K(150))
	136	RES(R43, 470)
	137	RES(R44, RES_K(100))
	138	RES(R45, RES_K(1))
	139	RES(R46, RES_K(12))
	140	RES(R48, 470)
	141	RES(R48_2, RES_K(100))
	142	RES(R49, RES_K(10))
	143	RES(R50, RES_K(2.2))
	144	RES(R51, RES_K(150))
	145	RES(R52, RES_K(100))
	146	RES(R53, RES_K(100))
	147	RES(R54, RES_K(680))
	148	RES(R55, RES_K(510))
	149	RES(R57, 560)
	150	RES(R58, RES_K(39))
	151	RES(R59, 560)
	152	RES(R60, RES_K(39))
	153	RES(R61, RES_K(100))
	154	RES(R62, RES_K(100))
	155	RES(R63, RES_K(1))
	156	RES(R65, RES_K(1))
	157	RES(R65_1, RES_K(27))
	158	RES(R66, RES_M(1))
	159	RES(R67, RES_K(100))
	160	RES(R68, RES_K(100))
	161	RES(R69, RES_K(1))
	162	RES(R70, RES_K(10))
	163	RES(R71, RES_K(100))
	164	RES(R72, RES_K(100))
	165	RES(R73, RES_K(10))
	166	RES(R74, RES_K(10))
	167	RES(R75, RES_K(10))
	168	RES(R76, RES_K(10))
	169	RES(R81, 220)
	170	RES(R82, RES_M(2.2))
	171	RES(R83, RES_K(12))
	172	RES(R84, RES_K(1))
	173	RES(R85, RES_M(2.2))
	174	RES(R86, RES_K(10))
	175	RES(R87, RES_K(68))
	176	RES(R89, RES_K(22))
	177	RES(R90, RES_K(390))
	178	RES(R91, RES_K(100))
	179	RES(R92, RES_K(22))
	180	RES(R93, RES_K(1))
	181	RES(R94, RES_K(22))
	182	RES(R95, RES_K(330))
	183	RES(R96, RES_K(150))
	184	RES(R97, RES_K(150))
	185	RES(R98, RES_K(650))
	186
	187	#if USE_FIXED_STV
	188	ANALOG_INPUT(STV, 2)
	189	#else
	190	RES(R78, RES_K(3.3))
	191	RES(R77, RES_K(2.2))
	192	CAP(C58, CAP_U(47))
	193	#endif
	194
	195	NET_C(R95.1, XU3.2, R96.2)
	196	NET_C(R95.2, XU3.1, C69.1)
	197	NET_C(XU3.3, R103.2, C73.1)
	198	NET_C(XU3.4, R103.1, R102.2)
	199	NET_C(XU3.5, R105.2, C72.1)
	200	NET_C(XU3.6, R105.1, R106.2)
	201	#if USE_FIXED_STV
	202	//FIXME: We should have a NET_C_REMOVE
	203	NET_C(XU3.7, C69.2, C73.2, C72.2, C77.2, C67.2, C68.2, R65.2, R38.2, XU1.11, R54.2, Q4.E, R63.2, C47.2, R72.2, R67.2, R71.2, R68.2, C48.2, R46.2, C28.1, C32.1, R43.2, XU2.4, C56.1, C52.1,/* R77.2, C58.1, */ R48.2, R93.2, R94.2, R119.2, R104.2, R53.2, R34.2, R81.2, R92.2, R89.2, C33.1, R37.2, R36.1, R91.1, I_V0.Q, RV1.3)
	204	#else
	205	NET_C(XU3.7, C69.2, C73.2, C72.2, C77.2, C67.2, C68.2, R65.2, R38.2, XU1.11, R54.2, Q4.E, R63.2, C47.2, R72.2, R67.2, R71.2, R68.2, C48.2, R46.2, C28.1, C32.1, R43.2, XU2.4, C56.1, C52.1, R77.2, C58.1, R48.2, R93.2, R94.2, R119.2, R104.2, R53.2, R34.2, R81.2, R92.2, R89.2, C33.1, R37.2, R36.1, R91.1, I_V0.Q, RV1.3)
	206	#endif
	207	NET_C(XU3.8, R108.1, R107.2)
	208	NET_C(XU3.9, R108.2, C77.1)
	209	NET_C(XU3.10, R100.1, R101.2)
	210	NET_C(XU3.11, R100.2, C67.1)
	211	NET_C(XU3.12, R98.1, R97.2)
	212	NET_C(XU3.13, R98.2, C68.1)
	213	#if USE_FIXED_STV
	214	NET_C(XU3.14, XU1.4, R66.1, R70.1, Q6.C, Q5.C, XU2.8, /* R78.1, */ R86.1, R83.1, Q3.C, I_V5.Q)
	215	#else
	216	NET_C(XU3.14, XU1.4, R66.1, R70.1, Q6.C, Q5.C, XU2.8, R78.1, R86.1, R83.1, Q3.C, I_V5.Q)
	217	#endif
	218	NET_C(R96.1, R102.1, R106.1, R107.1, R101.1, R97.1, R65.1, C63.2)
	219	NET_C(C63.1, R65_1.2)
	220	NET_C(R65_1.1, R44.2, C38.2, C40.2, XU1.6)
	221	#if USE_FIXED_STV
	222	NET_C(R30.1, R41.1, R40.1, STV, R76.2, /* R78.2, R77.1, C58.2*/ STV)
	223	#else
	224	NET_C(R30.1, R41.1, R40.1, R76.2, R78.2, R77.1, C58.2)
	225	#endif
	226	NET_C(R30.2, XU1.5)
	227	NET_C(R44.1, C39.1, C40.1, R48_2.2)
	228	NET_C(C38.1, C39.2, R38.1)
	229	NET_C(XU1.1, XU1.2, R39.1, R32.2)
	230	NET_C(XU1.3, C34.1, R41.2)
	231	NET_C(XU1.7, R45.2)
	232	NET_C(XU1.8, XU1.9, R31.2, C36.2)
	233	NET_C(XU1.10, R42.1, C32.2)
	234	NET_C(XU1.12, C49.1, C31.1, R40.2, C61.1, C60.1)
	235	NET_C(XU1.13, R27.1, R28.2)
	236	NET_C(XU1.14, R28.1, R29.2, I_SINH0)
	237	NET_C(R48_2.1, C45.2, R54.1)
	238	NET_C(C45.1, R55.1, Q7.B)
	239	NET_C(R55.2, R90.2, C33.2, R37.1, Q3.E)
	240	NET_C(R45.1, C44.2)
	241	NET_C(C44.1, R66.2, Q4.B)
	242	NET_C(Q4.C, C42.1, C43.1, R46.1, C35.2, D4.K, D5.K)
	243	NET_C(R70.2, R69.2, Q7.C)
	244	NET_C(R63.1, Q7.E)
	245	NET_C(R69.1, C49.2)
	246	NET_C(C42.2, R58.1, D5.A)
	247	NET_C(R58.2, R57.1, C47.1)
	248	NET_C(R57.2, Q6.E)
	249	NET_C(Q6.B, R61.1)
	250	NET_C(C50.1, R67.1, R61.2)
	251	NET_C(C50.2, R72.1, I_OH0.Q)
	252	NET_C(C51.1, R68.1, R62.2)
	253	NET_C(C51.2, R71.1, I_CH0.Q)
	254	NET_C(R62.1, Q5.B)
	255	NET_C(Q5.E, R59.2)
	256	NET_C(R60.1, C43.2, D4.A)
	257	NET_C(R60.2, R59.1, C48.1)
	258	NET_C(C35.1, C34.2, R39.2)
	259	NET_C(R32.1, C31.2)
	260	NET_C(R27.2, C28.2)
	261	NET_C(R29.1, R31.1, R50.2, R49.1, RV1.1)
	262	NET_C(R42.2, R51.1, C36.1)
	263	NET_C(R51.2, C41.1)
	264	NET_C(C41.2, R43.1, I_SOUNDIC0)
	265	NET_C(XU2.1, XU2.2, R73.1)
	266	NET_C(XU2.3, R76.1, C200.2)
	267	NET_C(XU2.5, C56.2, R75.1)
	268	NET_C(XU2.6, XU2.7, R50.1, C53.2)
	269	NET_C(R75.2, R74.1, C53.1)
	270	NET_C(R74.2, C52.2, R73.2)
	271	NET_C(R49.2, R48.1, I_SOUND0)
	272	NET_C(Q9.E, R81.1)
	273	NET_C(Q9.C, R84.2, R83.2, R82.1, C59.1)
	274	NET_C(Q9.B, R82.2, C62.1)
	275	NET_C(Q10.E, R93.1)
	276	NET_C(Q10.C, R87.2, R86.2, R85.1, C76.1)
	277	NET_C(Q10.B, R85.2, C64.1)
	278	NET_C(R84.1, C61.2)
	279	NET_C(C60.2, R87.1)
	280	NET_C(C64.2, C65.1, R94.1, D3.K)
	281	NET_C(C65.2, C66.1, R119.1)
	282	NET_C(C66.2, C76.2, R104.1)
	283	NET_C(R53.1, R52.2, C37.1)
	284	NET_C(R34.1, C37.2, I_BD0.Q)
	285	NET_C(R52.1, D3.A)
	286	NET_C(R92.1, C62.2, C57.1)
	287	NET_C(R89.1, C57.2, C59.2, R90.1)
	288	NET_C(Q3.B, R35.1)
	289	NET_C(R35.2, R36.2, C70.1)
	290	NET_C(R91.2, C70.2, I_SD0.Q)
	291	NET_C(I_MSM3K0.Q, R200.2)
	292	NET_C(I_MSM2K0.Q, R201.2)
	293	NET_C(R200.1, R201.1, C200.1)
	294
	295	/* Amplifier stage */
	296
	297	CAP(C26, CAP_U(1))
	298	RES(R25, 560)
	299	RES(R26, RES_K(47))
	300	CAP(C29, CAP_U(0.01))
	301
	302	NET_C(RV1.2, C26.1)
	303	NET_C(C26.2, R25.1)
	304	NET_C(R25.2, R26.1, C29.1)
	305	NET_C(R26.2, C29.2, GND)
	306
	307	NETLIST_END()

trunk/src/mame/drivers/amstrad.cpp

r250251	r250252
816	816	SLOT_INTERFACE("brunword4", CPC_BRUNWORD_MK4)
817	817	SLOT_INTERFACE("hd20", CPC_HD20)
818	818	SLOT_INTERFACE("doubler", CPC_DOUBLER)
	819	SLOT_INTERFACE("transtape", CPC_TRANSTAPE)
819	820	SLOT_INTERFACE_END
820	821
821	822	SLOT_INTERFACE_START(cpc_exp_cards)
r250251	r250252
833	834	SLOT_INTERFACE("brunword4", CPC_BRUNWORD_MK4)
834	835	SLOT_INTERFACE("hd20", CPC_HD20)
835	836	SLOT_INTERFACE("doubler", CPC_DOUBLER)
	837	SLOT_INTERFACE("transtape", CPC_TRANSTAPE)
836	838	SLOT_INTERFACE_END
837	839
838	840	SLOT_INTERFACE_START(cpcplus_exp_cards)
r250251	r250252
848	850	SLOT_INTERFACE("smartwatch", CPC_SMARTWATCH)
849	851	SLOT_INTERFACE("hd20", CPC_HD20)
850	852	SLOT_INTERFACE("doubler", CPC_DOUBLER)
	853	SLOT_INTERFACE("transtape", CPC_TRANSTAPE)  // Plus compatible?
851	854	SLOT_INTERFACE_END
852	855
853	856	SLOT_INTERFACE_START(aleste_exp_cards)
r250251	r250252
865	868	SLOT_INTERFACE("brunword4", CPC_BRUNWORD_MK4)
866	869	SLOT_INTERFACE("hd20", CPC_HD20)
867	870	SLOT_INTERFACE("doubler", CPC_DOUBLER)
	871	SLOT_INTERFACE("transtape", CPC_TRANSTAPE)
868	872	SLOT_INTERFACE("magicsound", AL_MAGICSOUND)
869	873	SLOT_INTERFACE_END
870	874

trunk/src/mame/drivers/apricot.cpp

r250251	r250252
401	401	MCFG_PALETTE_ADD_MONOCHROME_GREEN_HIGHLIGHT("palette")
402	402
403	403	MCFG_MC6845_ADD("ic30", MC6845, "screen", XTAL_15MHz / 10)
404		MCFG_MC6845_INTERLACE_ADJUST(1)
	404	MCFG_MC6845_INTERLACE_ADJUST(2)
405	405	MCFG_MC6845_SHOW_BORDER_AREA(false)
406	406	MCFG_MC6845_CHAR_WIDTH(10)
407	407	MCFG_MC6845_UPDATE_ROW_CB(apricot_state, crtc_update_row)

trunk/src/mame/drivers/bbc.cpp

r250251	r250252
30	30	ARM1  - ARM Evaluation System
31	31	ADB20 - Master Compact
32	32
	33	Acorn Business Computer
	34
	35	ABC110        - 64K, 10MB HDD, Z80, CP/M 2.2
	36	ABC210/ACW443 - 4096K, 20MB HDD, 32016, PanOS
	37	ABC310        - 1024K, 10MB HDD, 80286, DOS 3.1/GEM
	38
33	39	******************************************************************************/
34	40
35	41	/* Core includes */
r250251	r250252
49	55	/* Devices */
50	56	#include "imagedev/flopdrv.h"
51	57	#include "formats/bbc_dsk.h"
52		//#include "formats/fsd_dsk.h"
	58	#include "formats/fsd_dsk.h"
53	59	#include "imagedev/cassette.h"
54	60	#include "formats/uef_cas.h"
55	61	#include "formats/csw_cas.h"
r250251	r250252
136	142	AM_RANGE(0x8000, 0xbfff) AM_READ_BANK("bank4") AM_WRITE(bbc_memoryb4_w)                                     /*    8000-bfff                 Paged ROM                       */
137	143	AM_RANGE(0xc000, 0xfbff) AM_READ_BANK("bank7")                                                              /*    c000-fbff                 OS ROM                          */
138	144	AM_RANGE(0xfc00, 0xfdff) AM_NOP                                                                             /*    fc00-fdff                 FRED & JIM Pages                */
139		/*    fe00-feff                 SHEILA Address Page             */
140		AM_RANGE(0xfe00, 0xfe00) AM_MIRROR(0x06) AM_DEVREADWRITE("mc6845", mc6845_device, status_r, address_w)      /*    fe00-fe07  6845 CRTC      Video controller                */
141		AM_RANGE(0xfe01, 0xfe01) AM_MIRROR(0x06) AM_DEVREADWRITE("mc6845", mc6845_device, register_r, register_w)
	145	/*    fe00-feff                 SHEILA Address Page             */
	146	AM_RANGE(0xfe00, 0xfe00) AM_MIRROR(0x06) AM_DEVREADWRITE("hd6845", hd6845_device, status_r, address_w)      /*    fe00-fe07  6845 CRTC      Video controller                */
	147	AM_RANGE(0xfe01, 0xfe01) AM_MIRROR(0x06) AM_DEVREADWRITE("hd6845", hd6845_device, register_r, register_w)
142	148	AM_RANGE(0xfe08, 0xfe08) AM_MIRROR(0x06) AM_DEVREADWRITE("acia6850", acia6850_device, status_r, control_w)  /*    fe08-fe0F  6850 ACIA      Serial controller               */
143	149	AM_RANGE(0xfe09, 0xfe09) AM_MIRROR(0x06) AM_DEVREADWRITE("acia6850", acia6850_device, data_r, data_w)
144	150	AM_RANGE(0xfe10, 0xfe17) AM_READWRITE(bbc_fe_r, bbc_SerialULA_w)                                            /*    fe10-fe17  Serial ULA     Serial system chip              */
145	151	AM_RANGE(0xfe18, 0xfe1f) AM_NOP                                                                             /*    fe18-fe1f  INTOFF/STATID  # ECONET Interrupt Off / ID No. */
146		AM_RANGE(0xfe20, 0xfe2f) AM_WRITE(bbc_videoULA_w)                                                           /* R: fe20-fe2f  INTON          # ECONET Interrupt On           */
147		/* W: fe20-fe2f  Video ULA      Video system chip               */
	152	AM_RANGE(0xfe20, 0xfe2f) AM_READWRITE(bbc_fe_r, bbc_videoULA_w)                                             /* R: fe20-fe2f  INTON          # ECONET Interrupt On           */
	153	/* W: fe20-fe2f  Video ULA      Video system chip               */
148	154	AM_RANGE(0xfe30, 0xfe3f) AM_READWRITE(bbc_fe_r, bbc_page_selecta_w)                                         /* R: fe30-fe3f  NC             Not Connected                   */
149		/* W: fe30-fe3f  84LS161        Paged ROM selector              */
	155	/* W: fe30-fe3f  74LS161        Paged ROM selector              */
150	156	AM_RANGE(0xfe40, 0xfe5f) AM_DEVREADWRITE("via6522_0", via6522_device, read, write)                          /*    fe40-fe5f  6522 VIA       SYSTEM VIA                      */
151	157	AM_RANGE(0xfe60, 0xfe7f) AM_NOP                                                                             /*    fe60-fe7f  6522 VIA       # USER VIA                      */
152	158	AM_RANGE(0xfe80, 0xfe9f) AM_NOP                                                                             /*    fe80-fe9f  8271/1770 FDC  # Floppy disc controller        */
r250251	r250252
162	168
163	169	AM_RANGE(0xc000, 0xfbff) AM_READ_BANK("bank7")                                                              /*    c000-fbff                 OS ROM                          */
164	170	AM_RANGE(0xfc00, 0xfdff) AM_NOP                                                                             /*    fc00-fdff                 FRED & JIM Pages                */
165		/*    fe00-feff                 SHEILA Address Page             */
166		AM_RANGE(0xfe00, 0xfe00) AM_MIRROR(0x06) AM_DEVREADWRITE("mc6845", mc6845_device, status_r, address_w)      /*    fe00-fe07  6845 CRTC      Video controller                */
167		AM_RANGE(0xfe01, 0xfe01) AM_MIRROR(0x06) AM_DEVREADWRITE("mc6845", mc6845_device, register_r, register_w)
	171	/*    fe00-feff                 SHEILA Address Page             */
	172	AM_RANGE(0xfe00, 0xfe00) AM_MIRROR(0x06) AM_DEVREADWRITE("hd6845", hd6845_device, status_r, address_w)      /*    fe00-fe07  6845 CRTC      Video controller                */
	173	AM_RANGE(0xfe01, 0xfe01) AM_MIRROR(0x06) AM_DEVREADWRITE("hd6845", hd6845_device, register_r, register_w)
168	174	AM_RANGE(0xfe08, 0xfe08) AM_MIRROR(0x06) AM_DEVREADWRITE("acia6850", acia6850_device, status_r, control_w)  /*    fe08-fe0F  6850 ACIA      Serial controller               */
169	175	AM_RANGE(0xfe09, 0xfe09) AM_MIRROR(0x06) AM_DEVREADWRITE("acia6850", acia6850_device, data_r, data_w)
170	176	AM_RANGE(0xfe10, 0xfe17) AM_READWRITE(bbc_fe_r, bbc_SerialULA_w)                                            /*    fe10-fe17  Serial ULA     Serial system chip              */
171	177	AM_RANGE(0xfe18, 0xfe1f) AM_READ_PORT("STATID")                                                             /*    fe18-fe1f  INTOFF/STATID  ECONET Interrupt Off / ID No.   */
172		AM_RANGE(0xfe20, 0xfe2f) AM_WRITE(bbc_videoULA_w)                                                           /* R: fe20-fe2f  INTON          ECONET Interrupt On             */
173		/* W: fe20-fe2f  Video ULA      Video system chip               */
	178	AM_RANGE(0xfe20, 0xfe2f) AM_READWRITE(bbc_fe_r, bbc_videoULA_w)                                             /* R: fe20-fe2f  INTON          ECONET Interrupt On             */
	179	/* W: fe20-fe2f  Video ULA      Video system chip               */
174	180	AM_RANGE(0xfe40, 0xfe5f) AM_DEVREADWRITE("via6522_0", via6522_device, read, write)                          /*    fe40-fe5f  6522 VIA       SYSTEM VIA                      */
175	181	AM_RANGE(0xfe60, 0xfe7f) AM_DEVREADWRITE("via6522_1", via6522_device, read, write)                          /*    fe60-fe7f  6522 VIA       USER VIA                        */
176		/*    fe80-fe9f  FDC            Floppy disc controller          */
	182	/*    fe80-fe9f  FDC            Floppy disc controller          */
177	183	AM_RANGE(0xfea0, 0xfebf) AM_READ(bbc_fe_r)                                                                  /*    fea0-febf  68B54 ADLC     ECONET controller               */
178	184	AM_RANGE(0xfec0, 0xfedf) AM_DEVREADWRITE("upd7002", upd7002_device, read, write)                            /*    fec0-fedf  uPD7002        Analogue to digital converter   */
179	185	AM_RANGE(0xfee0, 0xfeff) AM_READ(bbc_fe_r)                                                                  /*    fee0-feff  Tube ULA       Tube system interface           */
r250251	r250252
186	192	AM_RANGE(0x4000, 0x7fff) AM_READ_BANK("bank3") AM_WRITE(bbc_memoryb3_w)                     /*    4000-7fff                 Regular Ram                     */
187	193	AM_RANGE(0x8000, 0xbfff) AM_READ_BANK("bank4") AM_WRITE(bbc_memoryb4_w)                     /*    8000-bfff                 Paged ROM                       */
188	194	AM_RANGE(0xfe30, 0xfe3f) AM_READWRITE(bbc_fe_r, bbc_page_selectb_w)                         /* R: fe30-fe3f  NC             Not Connected                   */
189		/* W: fe30-fe3f  84LS161        Paged ROM selector              */
	195	/* W: fe30-fe3f  84LS161        Paged ROM selector              */
190	196	AM_RANGE(0xfe80, 0xfe83) AM_DEVICE("i8271", i8271_device, map)                              /*    fe80-fe83  8271 FDC       Floppy disc controller          */
191	197	AM_RANGE(0xfe84, 0xfe9f) AM_DEVREADWRITE("i8271", i8271_device, data_r, data_w)             /*    fe84-fe9f  8271 FDC       Floppy disc controller          */
192	198	AM_IMPORT_FROM(bbc_base)
r250251	r250252
198	204	AM_RANGE(0x4000, 0x7fff) AM_READ_BANK("bank3") AM_WRITE(bbc_memoryb3_w)                     /*    4000-7fff                 Regular Ram                     */
199	205	AM_RANGE(0x8000, 0xbfff) AM_READ_BANK("bank4") AM_WRITE(bbc_memoryb4_w)                     /*    8000-bfff                 Paged ROM                       */
200	206	AM_RANGE(0xfe30, 0xfe3f) AM_READWRITE(bbc_fe_r, bbc_page_selectb_w)                         /* R: fe30-fe3f  NC             Not Connected                   */
201		/* W: fe30-fe3f  84LS161        Paged ROM selector              */
	207	/* W: fe30-fe3f  84LS161        Paged ROM selector              */
202	208	AM_RANGE(0xfe80, 0xfe83) AM_WRITE(bbc_wd1770_status_w)                                      /*    fe80-fe83  1770 FDC       Drive control register          */
203	209	AM_RANGE(0xfe84, 0xfe9f) AM_DEVREADWRITE("wd1770", wd1770_t, read, write)                   /*    fe84-fe9f  1770 FDC       Floppy disc controller          */
204	210	AM_IMPORT_FROM(bbc_base)
r250251	r250252
211	217	AM_RANGE(0x8000, 0xafff) AM_READ_BANK("bank4") AM_WRITE(bbc_memorybp4_w)                    /*    8000-afff                 Paged ROM or 12K of SWRAM       */
212	218	AM_RANGE(0xb000, 0xbfff) AM_READ_BANK("bank6")                                              /*    b000-bfff                 Rest of paged ROM area          */
213	219	AM_RANGE(0xfe30, 0xfe3f) AM_READWRITE(bbc_fe_r, bbc_page_selectbp_w)                        /* R: fe30-fe3f  NC             Not Connected                   */
214		/* W: fe30-fe3f  84LS161        Paged ROM selector              */
	220	/* W: fe30-fe3f  84LS161        Paged ROM selector              */
215	221	AM_RANGE(0xfe80, 0xfe83) AM_WRITE(bbc_wd1770_status_w)                                      /*    fe80-fe83  1770 FDC       Drive control register          */
216	222	AM_RANGE(0xfe84, 0xfe9f) AM_DEVREADWRITE("wd1770", wd1770_t, read, write)                   /*    fe84-fe9f  1770 FDC       Floppy disc controller          */
217	223	AM_IMPORT_FROM(bbc_base)
r250251	r250252
224	230	AM_RANGE(0x8000, 0xafff) AM_READ_BANK("bank4") AM_WRITE(bbc_memorybp4_128_w)                /*    8000-afff                 Paged ROM or 12K of SWRAM       */
225	231	AM_RANGE(0xb000, 0xbfff) AM_READ_BANK("bank6") AM_WRITE(bbc_memorybp6_128_w)                /*    b000-bfff                 Rest of paged ROM area          */
226	232	AM_RANGE(0xfe30, 0xfe3f) AM_READWRITE(bbc_fe_r, bbc_page_selectbp_w)                        /* R: fe30-fe3f  NC             Not Connected                   */
227		/* W: fe30-fe3f  84LS161        Paged ROM selector              */
	233	/* W: fe30-fe3f  84LS161        Paged ROM selector              */
228	234	AM_RANGE(0xfe80, 0xfe83) AM_WRITE(bbc_wd1770_status_w)                                      /*    fe80-fe83  1770 FDC       Drive control register          */
229	235	AM_RANGE(0xfe84, 0xfe9f) AM_DEVREADWRITE("wd1770", wd1770_t, read, write)                   /*    fe84-fe9f  1770 FDC       Floppy disc controller          */
230	236	AM_IMPORT_FROM(bbc_base)
r250251	r250252
237	243	AM_RANGE(0x8000, 0xafff) AM_READ_BANK("bank4") AM_WRITE(bbc_memorybp4_w)                    /*    8000-afff                 Paged ROM or 12K of SWRAM       */
238	244	AM_RANGE(0xb000, 0xbfff) AM_READ_BANK("bank6")                                              /*    b000-bfff                 Rest of paged ROM area          */
239	245	AM_RANGE(0xfe30, 0xfe3f) AM_READWRITE(bbc_fe_r, bbc_page_selectbp_w)                        /* R: fe30-fe3f  NC             Not Connected                   */
240		/* W: fe30-fe3f  84LS161        Paged ROM selector              */
	246	/* W: fe30-fe3f  84LS161        Paged ROM selector              */
241	247	AM_RANGE(0xfe80, 0xfe83) AM_NOP                                                             /*    fe80-fe83  1770 FDC       Drive control register          */
242	248	AM_RANGE(0xfe84, 0xfe9f) AM_NOP                                                             /*    fe84-fe9f  1770 FDC       Floppy disc controller          */
243	249	AM_IMPORT_FROM(bbc_base)
r250251	r250252
677	683
678	684	FLOPPY_FORMATS_MEMBER( bbc_state::floppy_formats_bbc )
679	685	FLOPPY_BBC_DFS_FORMAT,
680		FLOPPY_BBC_CPM_FORMAT
681		//FLOPPY_FSD_FORMAT
	686	FLOPPY_BBC_CPM_FORMAT,
	687	FLOPPY_FSD_FORMAT
682	688	FLOPPY_FORMATS_END
683	689
684	690	FLOPPY_FORMATS_MEMBER( bbc_state::floppy_formats_bbcm )
685	691	FLOPPY_BBC_DFS_FORMAT,
686	692	FLOPPY_BBC_ADFS_FORMAT,
687	693	FLOPPY_BBC_CPM_FORMAT,
688		FLOPPY_BBC_DOS_FORMAT
689		//FLOPPY_FSD_FORMAT
	694	FLOPPY_BBC_DOS_FORMAT,
	695	FLOPPY_FSD_FORMAT
690	696	FLOPPY_FORMATS_END
691	697
692	698	FLOPPY_FORMATS_MEMBER( bbc_state::floppy_formats_bbcmc )
r250251	r250252
758	764
759	765	/* video hardware */
760	766	MCFG_SCREEN_ADD("screen", RASTER)
	767	//MCFG_SCREEN_RAW_PARAMS( XTAL_17_73447MHz / 4, 1024, 80, 80 + 640 + 48, 625, 12, 12 + 256 + 13 )
761	768	MCFG_SCREEN_SIZE(640, 256)
762	769	MCFG_SCREEN_VISIBLE_AREA(0, 640-1, 0, 256-1)
763	770	MCFG_SCREEN_REFRESH_RATE(50)
764	771	MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(128))
765		MCFG_SCREEN_UPDATE_DEVICE("mc6845", mc6845_device, screen_update)
	772	MCFG_SCREEN_UPDATE_DEVICE("hd6845", hd6845_device, screen_update)
766	773
767	774	MCFG_PALETTE_ADD("palette", 16)
768	775	MCFG_PALETTE_INIT_OWNER(bbc_state,bbc)
r250251	r250252
771	778	MCFG_SAA5050_SCREEN_SIZE(40, 25, 40)
772	779
773	780	/* crtc */
774		MCFG_MC6845_ADD("mc6845", MC6845, "screen", 2000000)
	781	MCFG_MC6845_ADD("hd6845", HD6845, "screen", 2000000)
775	782	MCFG_MC6845_SHOW_BORDER_AREA(false)
776	783	MCFG_MC6845_CHAR_WIDTH(12)
777	784	MCFG_MC6845_UPDATE_ROW_CB(bbc_state, crtc_update_row)
r250251	r250252
875	882	/* software lists */
876	883	MCFG_SOFTWARE_LIST_ADD("cass_ls_b", "bbcb_cass")
877	884	MCFG_SOFTWARE_LIST_ADD("flop_ls_b", "bbcb_flop")
	885	MCFG_SOFTWARE_LIST_ADD("flop_ls_b_orig", "bbcb_orig_flop")
878	886	MCFG_SOFTWARE_LIST_ADD("flop_ls_z80", "bbc_z80_flop")
879	887	MCFG_SOFTWARE_LIST_ADD("flop_ls_32016", "bbc_32016_flop")
880	888	MACHINE_CONFIG_END
r250251	r250252
970	978	MCFG_SOFTWARE_LIST_REMOVE("cass_ls_a")
971	979	MCFG_SOFTWARE_LIST_REMOVE("cass_ls_b")
972	980	MCFG_SOFTWARE_LIST_REMOVE("flop_ls_b")
	981	MCFG_SOFTWARE_LIST_REMOVE("flop_ls_b_orig")
973	982	MCFG_SOFTWARE_LIST_REMOVE("flop_ls_32016")
974	983	MACHINE_CONFIG_END
975	984
r250251	r250252
990	999	MCFG_SOFTWARE_LIST_REMOVE("cass_ls_a")
991	1000	MCFG_SOFTWARE_LIST_REMOVE("cass_ls_b")
992	1001	MCFG_SOFTWARE_LIST_REMOVE("flop_ls_b")
	1002	MCFG_SOFTWARE_LIST_REMOVE("flop_ls_b_orig")
993	1003	MCFG_SOFTWARE_LIST_REMOVE("flop_ls_z80")
994	1004	MACHINE_CONFIG_END
995	1005
r250251	r250252
1041	1051	MCFG_SOFTWARE_LIST_REMOVE("cass_ls_a")
1042	1052	MCFG_SOFTWARE_LIST_REMOVE("cass_ls_b")
1043	1053	MCFG_SOFTWARE_LIST_REMOVE("flop_ls_b")
	1054	MCFG_SOFTWARE_LIST_REMOVE("flop_ls_b_orig")
1044	1055	MCFG_SOFTWARE_LIST_REMOVE("flop_ls_z80")
1045	1056	MCFG_SOFTWARE_LIST_REMOVE("flop_ls_32016")
1046	1057	MACHINE_CONFIG_END
r250251	r250252
1077	1088	MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(128))
1078	1089	MCFG_SCREEN_SIZE(640, 256)
1079	1090	MCFG_SCREEN_VISIBLE_AREA(0, 640-1, 0, 256-1)
1080		MCFG_SCREEN_UPDATE_DEVICE("mc6845", mc6845_device, screen_update)
	1091	MCFG_SCREEN_UPDATE_DEVICE("hd6845", hd6845_device, screen_update)
	1092
1081	1093	MCFG_PALETTE_ADD("palette", 16)
1082	1094	MCFG_PALETTE_INIT_OWNER(bbc_state,bbc)
1083	1095
r250251	r250252
1085	1097	MCFG_SAA5050_SCREEN_SIZE(40, 25, 40)
1086	1098
1087	1099	/* crtc */
1088		MCFG_MC6845_ADD("mc6845", MC6845, "screen", 2000000)
	1100	MCFG_MC6845_ADD("hd6845", HD6845, "screen", 2000000)
1089	1101	MCFG_MC6845_SHOW_BORDER_AREA(false)
1090	1102	MCFG_MC6845_CHAR_WIDTH(12)
1091	1103	MCFG_MC6845_UPDATE_ROW_CB(bbc_state, crtc_update_row)
r250251	r250252
1128	1140	MCFG_SOFTWARE_LIST_COMPATIBLE_ADD("cass_ls_a", "bbca_cass")
1129	1141	MCFG_SOFTWARE_LIST_COMPATIBLE_ADD("cass_ls_b", "bbcb_cass")
1130	1142	MCFG_SOFTWARE_LIST_COMPATIBLE_ADD("flop_ls_b", "bbcb_flop")
	1143	MCFG_SOFTWARE_LIST_COMPATIBLE_ADD("flop_ls_b_orig", "bbcb_orig_flop")
1131	1144
1132	1145	/* acia */
1133	1146	MCFG_DEVICE_ADD("acia6850", ACIA6850, 0)
r250251	r250252
1217	1230	MCFG_SOFTWARE_LIST_REMOVE("cass_ls_b")
1218	1231	MCFG_SOFTWARE_LIST_REMOVE("flop_ls_m")
1219	1232	MCFG_SOFTWARE_LIST_REMOVE("flop_ls_b")
	1233	MCFG_SOFTWARE_LIST_REMOVE("flop_ls_b_orig")
1220	1234	MCFG_SOFTWARE_LIST_REMOVE("flop_ls_z80")
1221	1235	MCFG_SOFTWARE_LIST_REMOVE("flop_ls_32016")
1222	1236
r250251	r250252
1278	1292	/* eeprom pcd8572 */
1279	1293	//MCFG_DEVICE_REMOVE("rtc")
1280	1294
	1295	MCFG_MACHINE_START_OVERRIDE(bbc_state, bbcmc)
	1296	MCFG_MACHINE_RESET_OVERRIDE(bbc_state, bbcmc)
	1297
1281	1298	/* software lists */
1282	1299	MCFG_SOFTWARE_LIST_REMOVE("cass_ls_m")
1283	1300	MCFG_SOFTWARE_LIST_REMOVE("cass_ls_a")
1284	1301	MCFG_SOFTWARE_LIST_REMOVE("cass_ls_b")
1285	1302	MCFG_SOFTWARE_LIST_REMOVE("flop_ls_m")
1286	1303	MCFG_SOFTWARE_LIST_REMOVE("flop_ls_b")
	1304	MCFG_SOFTWARE_LIST_REMOVE("flop_ls_b_orig")
1287	1305	MCFG_SOFTWARE_LIST_REMOVE("flop_ls_z80")
1288	1306	MCFG_SOFTWARE_LIST_REMOVE("flop_ls_32016")
1289	1307	MCFG_SOFTWARE_LIST_REMOVE("cart_ls_m")

trunk/src/mame/drivers/c65_old.cpp

r250251	r250252
1		// license:GPL-2.0+
2		// copyright-holders:Peter Trauner
3		/***************************************************************************
4
5		Commodore C65 home computer
6		PeT mess@utanet.at
7
8		documention
9		www.funet.fi
10
11		***************************************************************************/
12
13		/*
14
15		2008 - Driver Updates
16		---------------------
17
18		(most of the informations are taken from http://www.zimmers.net/cbmpics/ )
19
20
21		[CBM systems which belong to this driver]
22
23		* Commodore 65 (1989)
24
25		Also known as C64 DX at early stages of the project. It was cancelled
26		around 1990-1991. Only few units survive (they were sold after Commodore
27		liquidation in 1994).
28
29		CPU: CSG 4510 (3.54 MHz)
30		RAM: 128 kilobytes, expandable to 8 megabytes
31		ROM: 128 kilobytes
32		Video: CSG 4569 "VIC-III" (6 Video modes; Resolutions from 320x200 to
33		1280x400; 80 columns text; Palette of 4096 colors)
34		Sound: CSG 8580 "SID" x2 (6 voice stereo synthesizer/digital sound
35		capabilities)
36		Ports: CSG 4510 (2 Joystick/Mouse ports; CBM Serial port; CBM 'USER'
37		port; CBM Monitor port; Power and reset switches; C65 bus drive
38		port; RGBI video port; 2 RCA audio ports; RAM expansion port; C65
39		expansion port)
40		Keyboard: Full-sized 77 key QWERTY (12 programmable function keys;
41		4 direction cursor-pad)
42		Additional Hardware: Built in 3.5" DD disk drive (1581 compatible)
43		Miscellaneous: Partially implemented Commodore 64 emulation
44
45		[Notes]
46
47		The datasette port was removed here. C65 supports an additional "dumb"
48		drive externally. It also features, in addition to the standard CBM
49		bus serial (available in all modes), a Fast and a Burst serial bus
50		(both available in C65 mode only)
51
52		*/
53
54
55		#include "emu.h"
56		#include "cpu/m6502/m4510.h"
57		#include "machine/mos6526.h"
58		#include "machine/cbm_snqk.h"
59		#include "includes/c65.h"
60		#include "bus/cbmiec/cbmiec.h"
61		#include "machine/ram.h"
62
63		static void cbm_c65_quick_sethiaddress( address_space &space, UINT16 hiaddress )
64		{
65		space.write_byte(0x82, hiaddress & 0xff);
66		space.write_byte(0x83, hiaddress >> 8);
67		}
68
69		QUICKLOAD_LOAD_MEMBER( c65_state, cbm_c65 )
70		{
71		return general_cbm_loadsnap(image, file_type, quickload_size, m_maincpu->space(AS_PROGRAM), 0, cbm_c65_quick_sethiaddress);
72		}
73
74		/*************************************
75		*
76		*  Main CPU memory handlers
77		*
78		*************************************/
79
80		static ADDRESS_MAP_START( c65_mem , AS_PROGRAM, 8, c65_state )
81		AM_RANGE(0x00000, 0x07fff) AM_RAMBANK("bank11")
82		AM_RANGE(0x08000, 0x09fff) AM_READ_BANK("bank1") AM_WRITE_BANK("bank12")
83		AM_RANGE(0x0a000, 0x0bfff) AM_READ_BANK("bank2") AM_WRITE_BANK("bank13")
84		AM_RANGE(0x0c000, 0x0cfff) AM_READ_BANK("bank3") AM_WRITE_BANK("bank14")
85		AM_RANGE(0x0d000, 0x0d7ff) AM_READ_BANK("bank4") AM_WRITE_BANK("bank5")
86		AM_RANGE(0x0d800, 0x0dbff) AM_READ_BANK("bank6") AM_WRITE_BANK("bank7")
87		AM_RANGE(0x0dc00, 0x0dfff) AM_READ_BANK("bank8") AM_WRITE_BANK("bank9")
88		AM_RANGE(0x0e000, 0x0ffff) AM_READ_BANK("bank10") AM_WRITE_BANK("bank15")
89		AM_RANGE(0x10000, 0x1f7ff) AM_RAM
90		AM_RANGE(0x1f800, 0x1ffff) AM_RAM AM_SHARE("colorram")
91
92		AM_RANGE(0x20000, 0x23fff) AM_ROM /* &c65_dos,     maps to 0x8000    */
93		AM_RANGE(0x24000, 0x28fff) AM_ROM /* reserved */
94		AM_RANGE(0x29000, 0x29fff) AM_ROM AM_SHARE("c65_chargen")
95		AM_RANGE(0x2a000, 0x2bfff) AM_ROM AM_SHARE("basic")
96		AM_RANGE(0x2c000, 0x2cfff) AM_ROM AM_SHARE("interface")
97		AM_RANGE(0x2d000, 0x2dfff) AM_ROM AM_SHARE("chargen")
98		AM_RANGE(0x2e000, 0x2ffff) AM_ROM AM_SHARE("kernal")
99
100		AM_RANGE(0x30000, 0x31fff) AM_ROM /*&c65_monitor,     monitor maps to 0x6000    */
101		AM_RANGE(0x32000, 0x37fff) AM_ROM /*&c65_basic, */
102		AM_RANGE(0x38000, 0x3bfff) AM_ROM /*&c65_graphics, */
103		AM_RANGE(0x3c000, 0x3dfff) AM_ROM /* reserved */
104		AM_RANGE(0x3e000, 0x3ffff) AM_ROM /* &c65_kernal, */
105
106		AM_RANGE(0x40000, 0x7ffff) AM_NOP
107		/* 8 megabyte full address space! */
108		ADDRESS_MAP_END
109
110
111		/*************************************
112		*
113		*  Input Ports
114		*
115		*************************************/
116
117		static INPUT_PORTS_START( c65 )
118		PORT_START( "ROW0" )
119		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Crsr Down Up") PORT_CODE(KEYCODE_RALT)        PORT_CHAR(UCHAR_MAMEKEY(DOWN)) PORT_CHAR(UCHAR_MAMEKEY(UP))
120		PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F3)                                    PORT_CHAR(UCHAR_MAMEKEY(F5))
121		PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F2)                                    PORT_CHAR(UCHAR_MAMEKEY(F3))
122		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F1)                                    PORT_CHAR(UCHAR_MAMEKEY(F1))
123		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F4)                                    PORT_CHAR(UCHAR_MAMEKEY(F7))
124		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Crsr Right Left") PORT_CODE(KEYCODE_RCONTROL) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) PORT_CHAR(UCHAR_MAMEKEY(LEFT))
125		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Return") PORT_CODE(KEYCODE_ENTER)             PORT_CHAR(13)
126		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("INST DEL") PORT_CODE(KEYCODE_BACKSPACE)       PORT_CHAR(8) PORT_CHAR(UCHAR_MAMEKEY(INSERT))
127
128		PORT_START( "ROW1" )
129		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Shift (Left)") PORT_CODE(KEYCODE_LSHIFT)      PORT_CHAR(UCHAR_SHIFT_1)
130		PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_E)         PORT_CHAR('E')
131		PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_S)         PORT_CHAR('S')
132		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Z)         PORT_CHAR('Z')
133		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4)         PORT_CHAR('4') PORT_CHAR('$')
134		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_A)         PORT_CHAR('A')
135		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_W)         PORT_CHAR('W')
136		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3)         PORT_CHAR('3') PORT_CHAR('#')
137
138		PORT_START( "ROW2" )
139		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_X)         PORT_CHAR('X')
140		PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_T)         PORT_CHAR('T')
141		PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F)         PORT_CHAR('F')
142		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_C)         PORT_CHAR('C')
143		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6)         PORT_CHAR('6') PORT_CHAR('&')
144		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_D)         PORT_CHAR('D')
145		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_R)         PORT_CHAR('R')
146		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_5)         PORT_CHAR('5') PORT_CHAR('%')
147
148		PORT_START( "ROW3" )
149		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_V)         PORT_CHAR('V')
150		PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_U)         PORT_CHAR('U')
151		PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_H)         PORT_CHAR('H')
152		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_B)         PORT_CHAR('B')
153		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_8)         PORT_CHAR('8') PORT_CHAR('(')
154		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_G)         PORT_CHAR('G')
155		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Y)         PORT_CHAR('Y')
156		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7)         PORT_CHAR('7') PORT_CHAR('\'')
157
158		PORT_START( "ROW4" )
159		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_N)         PORT_CHAR('N')
160		PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_O)         PORT_CHAR('O')
161		PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_K)         PORT_CHAR('K')
162		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_M)         PORT_CHAR('M')
163		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_0)         PORT_CHAR('0')
164		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_J)         PORT_CHAR('J')
165		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_I)         PORT_CHAR('I')
166		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_9)         PORT_CHAR('9') PORT_CHAR(')')
167
168		PORT_START( "ROW5" )
169		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COMMA)     PORT_CHAR(',') PORT_CHAR('<')
170		PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('@')
171		PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COLON)     PORT_CHAR(':') PORT_CHAR('[')
172		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_STOP)      PORT_CHAR('.') PORT_CHAR('>')
173		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_EQUALS)    PORT_CHAR('-')
174		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_L)         PORT_CHAR('L')
175		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_P)         PORT_CHAR('P')
176		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_MINUS)     PORT_CHAR('+')
177
178		PORT_START( "ROW6" )
179		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SLASH)                             PORT_CHAR('/') PORT_CHAR('?')
180		PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("\xE2\x86\x91  Pi") PORT_CODE(KEYCODE_DEL) PORT_CHAR(0x2191) PORT_CHAR(0x03C0)
181		PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSLASH)                         PORT_CHAR('=')
182		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Shift (Right)") PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_SHIFT_1)
183		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("CLR HOME") PORT_CODE(KEYCODE_INSERT)      PORT_CHAR(UCHAR_MAMEKEY(HOME))
184		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_QUOTE)                             PORT_CHAR(';') PORT_CHAR(']')
185		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_CLOSEBRACE)                        PORT_CHAR('*')
186		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSLASH2)                        PORT_CHAR('\xA3')
187
188		PORT_START( "ROW7" )
189		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("RUN STOP") PORT_CODE(KEYCODE_HOME)
190		PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Q)                                 PORT_CHAR('Q')
191		PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("CBM") PORT_CODE(KEYCODE_LALT)
192		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SPACE)                             PORT_CHAR(' ')
193		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2)                                 PORT_CHAR('2') PORT_CHAR('"')
194		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_TAB)                               PORT_CHAR(UCHAR_SHIFT_2)
195		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("\xE2\x86\x90") PORT_CODE(KEYCODE_TILDE)   PORT_CHAR(0x2190)
196		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1)                                 PORT_CHAR('1') PORT_CHAR('!')
197		PORT_START("FUNCT")
198		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("ESC") PORT_CODE(KEYCODE_F1)
199		PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F13 F14") PORT_CODE(KEYCODE_F11)
200		PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F11 F12") PORT_CODE(KEYCODE_F10)
201		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F9 F10") PORT_CODE(KEYCODE_F9)
202		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("HELP") PORT_CODE(KEYCODE_F12)
203		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("ALT") PORT_CODE(KEYCODE_F2)       /* non blocking */
204		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("TAB") PORT_CODE(KEYCODE_TAB)
205		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("NO SCRL") PORT_CODE(KEYCODE_F4)
206
207		PORT_START( "SPECIAL" )  /* special keys */
208		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Restore") PORT_CODE(KEYCODE_PRTSCR)
209		PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Shift Lock (switch)") PORT_CODE(KEYCODE_CAPSLOCK) PORT_TOGGLE PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK))
210		PORT_CONFNAME( 0x20, 0x00, "(C65) Caps Lock (switch)") PORT_CODE(KEYCODE_F3)
211		PORT_CONFSETTING(   0x00, DEF_STR( Off ) )
212		PORT_CONFSETTING(   0x20, DEF_STR( On ) )
213		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED )
214
215		PORT_START("CTRLSEL")   /* Controller selection */
216		PORT_CONFNAME( 0x07, 0x00, "Gameport A" )
217		PORT_CONFSETTING( 0x00, DEF_STR( Joystick ) )
218		PORT_CONFSETTING( 0x01, "Paddles 1 & 2" )
219		PORT_CONFSETTING( 0x02, "Mouse 1351" )
220		PORT_CONFSETTING( 0x03, "Mouse (Non Proportional) 1350" )
221		PORT_CONFSETTING( 0x04, "Lightpen" )
222		//  PORT_CONFSETTING( 0x05, "Koala Pad" )
223		PORT_CONFSETTING( 0x06, "Lightgun" )
224		PORT_CONFSETTING( 0x07, "No Device Connected" )
225		PORT_CONFNAME( 0x70, 0x00, "Gameport B" )
226		PORT_CONFSETTING( 0x00, DEF_STR( Joystick ) )
227		PORT_CONFSETTING( 0x10, "Paddles 3 & 4" )
228		//  PORT_CONFSETTING( 0x20, "Mouse 1351" )
229		//  PORT_CONFSETTING( 0x30, "Mouse (Non Proportional) 1350" )
230		PORT_CONFSETTING( 0x70, "No Device Connected" )
231		PORT_CONFNAME( 0x80, 0x00, "Swap Gameport A and B") PORT_CODE(KEYCODE_F1) PORT_TOGGLE
232		PORT_CONFSETTING(   0x00, DEF_STR( No ) )
233		PORT_CONFSETTING(   0x80, DEF_STR( Yes ) )
234
235		PORT_START("JOY1_1B")
236		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1) PORT_CONDITION("CTRLSEL", 0x0f, EQUALS, 0x00)
237		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1) PORT_CONDITION("CTRLSEL", 0x0f, EQUALS, 0x00)
238		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1) PORT_CONDITION("CTRLSEL", 0x0f, EQUALS, 0x00)
239		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(1) PORT_CONDITION("CTRLSEL", 0x0f, EQUALS, 0x00)
240		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1) PORT_CONDITION("CTRLSEL", 0x0f, EQUALS, 0x00)
241		PORT_BIT( 0xe0, IP_ACTIVE_HIGH, IPT_UNUSED )
242
243		PORT_START("JOY2_1B")
244		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2) PORT_CODE(KEYCODE_HOME) PORT_CODE(JOYCODE_Y_UP_SWITCH) PORT_CONDITION("CTRLSEL", 0xf0, EQUALS, 0x00)
245		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2) PORT_CODE(KEYCODE_END) PORT_CODE(JOYCODE_Y_DOWN_SWITCH) PORT_CONDITION("CTRLSEL", 0xf0, EQUALS, 0x00)
246		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2) PORT_CODE(KEYCODE_DEL) PORT_CODE(JOYCODE_X_LEFT_SWITCH) PORT_CONDITION("CTRLSEL", 0xf0, EQUALS, 0x00)
247		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2) PORT_CODE(KEYCODE_PGDN) PORT_CODE(JOYCODE_X_RIGHT_SWITCH) PORT_CONDITION("CTRLSEL", 0xf0, EQUALS, 0x00)
248		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_CODE(KEYCODE_INSERT) PORT_CODE(JOYCODE_BUTTON1) PORT_CONDITION("CTRLSEL", 0xf0, EQUALS, 0x00)
249		PORT_BIT( 0xe0, IP_ACTIVE_HIGH, IPT_UNUSED )
250
251		/* Mouse Commodore 1350 was basically working as a Joystick */
252		PORT_START("JOY1_2B")
253		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1) PORT_NAME("Mouse 1350 Up") PORT_CONDITION("CTRLSEL", 0x0f, EQUALS, 0x03)
254		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1) PORT_NAME("Mouse 1350 Down") PORT_CONDITION("CTRLSEL", 0x0f, EQUALS, 0x03)
255		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1) PORT_NAME("Mouse 1350 Left") PORT_CONDITION("CTRLSEL", 0x0f, EQUALS, 0x03)
256		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(1) PORT_NAME("Mouse 1350 Right") PORT_CONDITION("CTRLSEL", 0x0f, EQUALS, 0x03)
257		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1) PORT_NAME("Mouse 1350 Button 1") PORT_CONDITION("CTRLSEL", 0x0f, EQUALS, 0x03)
258		PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(1) PORT_NAME("Mouse 1350 Button 2") PORT_CONDITION("CTRLSEL", 0x0f, EQUALS, 0x03)
259		PORT_BIT( 0xc0, IP_ACTIVE_HIGH, IPT_UNUSED )
260
261		/* Still to verify how many mice you were able to plug into a C64 */
262		/* Only one, for now */
263		PORT_START("JOY2_2B")
264		PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNUSED )
265		/*  PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2) PORT_CODE(KEYCODE_HOME) PORT_CODE(JOYCODE_Y_UP_SWITCH)
266		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2) PORT_CODE(KEYCODE_END) PORT_CODE(JOYCODE_Y_DOWN_SWITCH) PORT_CONDITION("CTRLSEL", 0xf0, EQUALS, 0x30)
267		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2) PORT_CODE(KEYCODE_DEL) PORT_CODE(JOYCODE_X_LEFT_SWITCH) PORT_CONDITION("CTRLSEL", 0xf0, EQUALS, 0x30)
268		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2) PORT_CODE(KEYCODE_PGDN) PORT_CODE(JOYCODE_X_RIGHT_SWITCH) PORT_CONDITION("CTRLSEL", 0xf0, EQUALS, 0x30)
269		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_CODE(KEYCODE_INSERT) PORT_CODE(JOYCODE_BUTTON1) PORT_CONDITION("CTRLSEL", 0xf0, EQUALS, 0x30)
270		PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(2) PORT_CODE(KEYCODE_PGUP) PORT_CODE(JOYCODE_BUTTON2) PORT_CONDITION("CTRLSEL", 0xf0, EQUALS, 0x30)
271		PORT_BIT( 0xc0, IP_ACTIVE_HIGH, IPT_UNUSED )
272		*/
273		PORT_START("PADDLE1")
274		PORT_BIT( 0xff, 128, IPT_PADDLE) PORT_SENSITIVITY(30) PORT_KEYDELTA(20) PORT_MINMAX(0,255) PORT_CENTERDELTA(0) PORT_CODE_DEC(KEYCODE_LEFT) PORT_CODE_INC(KEYCODE_RIGHT) PORT_CODE_DEC(JOYCODE_X_LEFT_SWITCH) PORT_CODE_INC(JOYCODE_X_RIGHT_SWITCH) PORT_PLAYER(1) PORT_REVERSE PORT_CONDITION("CTRLSEL", 0x0f, EQUALS, 0x01)
275
276		PORT_START("PADDLE2")
277		PORT_BIT( 0xff, 128, IPT_PADDLE) PORT_SENSITIVITY(30) PORT_KEYDELTA(20) PORT_MINMAX(0,255) PORT_CENTERDELTA(0) PORT_CODE_DEC(KEYCODE_DOWN) PORT_CODE_INC(KEYCODE_UP) PORT_CODE_DEC(JOYCODE_Y_UP_SWITCH) PORT_CODE_INC(JOYCODE_Y_DOWN_SWITCH) PORT_PLAYER(2) PORT_REVERSE PORT_CONDITION("CTRLSEL", 0x0f, EQUALS, 0x01)
278
279		PORT_START("PADDLE3")
280		PORT_BIT( 0xff, 128, IPT_PADDLE) PORT_SENSITIVITY(30) PORT_KEYDELTA(20) PORT_MINMAX(0,255) PORT_CENTERDELTA(0) PORT_CODE_DEC(KEYCODE_HOME) PORT_CODE_INC(KEYCODE_PGUP) PORT_PLAYER(3) PORT_REVERSE PORT_CONDITION("CTRLSEL", 0xf0, EQUALS, 0x10)
281
282		PORT_START("PADDLE4")
283		PORT_BIT( 0xff, 128, IPT_PADDLE) PORT_SENSITIVITY(30) PORT_KEYDELTA(20) PORT_MINMAX(0,255) PORT_CENTERDELTA(0) PORT_CODE_DEC(KEYCODE_END) PORT_CODE_INC(KEYCODE_PGDN) PORT_PLAYER(4) PORT_REVERSE PORT_CONDITION("CTRLSEL", 0xf0, EQUALS, 0x10)
284
285		PORT_START("TRACKX")
286		PORT_BIT( 0x7e, 0x00, IPT_TRACKBALL_X) PORT_SENSITIVITY(100) PORT_KEYDELTA(0) PORT_PLAYER(1) PORT_CONDITION("CTRLSEL", 0x0f, EQUALS, 0x02)
287
288		PORT_START("TRACKY")
289		PORT_BIT( 0x7e, 0x00, IPT_TRACKBALL_Y) PORT_SENSITIVITY(100) PORT_KEYDELTA(0) PORT_PLAYER(1) PORT_REVERSE PORT_CONDITION("CTRLSEL", 0x0f, EQUALS, 0x02)
290
291		PORT_START("LIGHTX")
292		PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X) PORT_NAME("Lightpen X Axis") PORT_CROSSHAIR(X, 1.0, 0.0, 0) PORT_SENSITIVITY(30) PORT_KEYDELTA(20) PORT_PLAYER(1) PORT_CONDITION("CTRLSEL", 0x0f, EQUALS, 0x04)
293
294		PORT_START("LIGHTY")
295		PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y) PORT_NAME("Lightpen Y Axis") PORT_CROSSHAIR(Y, 1.0, 0.0, 0) PORT_SENSITIVITY(30) PORT_KEYDELTA(20) PORT_PLAYER(1) PORT_CONDITION("CTRLSEL", 0x0f, EQUALS, 0x04)
296
297		PORT_START("OTHER")
298		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON1) PORT_NAME("Paddle 1 Button") PORT_CODE(KEYCODE_LCONTROL) PORT_CODE(JOYCODE_BUTTON1) PORT_CONDITION("CTRLSEL", 0x0f, EQUALS, 0x01)
299		PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON2) PORT_NAME("Paddle 2 Button") PORT_CODE(KEYCODE_LALT) PORT_CODE(JOYCODE_BUTTON2) PORT_CONDITION("CTRLSEL", 0x0f, EQUALS, 0x01)
300		PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON3) PORT_NAME("Paddle 3 Button") PORT_CODE(KEYCODE_INSERT) PORT_CODE(JOYCODE_BUTTON1) PORT_CONDITION("CTRLSEL", 0xf0, EQUALS, 0x10)
301		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON4) PORT_NAME("Paddle 4 Button") PORT_CODE(KEYCODE_DEL) PORT_CODE(JOYCODE_BUTTON2) PORT_CONDITION("CTRLSEL", 0xf0, EQUALS, 0x10)
302		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON1) PORT_NAME("Lightpen Signal") PORT_CODE(KEYCODE_LCONTROL) PORT_CONDITION("CTRLSEL", 0x0f, EQUALS, 0x04)
303		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON1) PORT_NAME("Mouse Button Left") PORT_CODE(KEYCODE_LCONTROL) PORT_CODE(JOYCODE_BUTTON1) PORT_CONDITION("CTRLSEL", 0x0f, EQUALS, 0x02)
304		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON2) PORT_NAME("Mouse Button Right") PORT_CODE(KEYCODE_LALT) PORT_CODE(JOYCODE_BUTTON2) PORT_CONDITION("CTRLSEL", 0x0f, EQUALS, 0x02)INPUT_PORTS_END
305
306
307		static INPUT_PORTS_START( c65ger )
308		PORT_INCLUDE( c65 )
309
310		PORT_MODIFY( "ROW1" )
311		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Z  { Y }") PORT_CODE(KEYCODE_Z)                   PORT_CHAR('Z')
312		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("3  #  { 3  Paragraph }") PORT_CODE(KEYCODE_3)     PORT_CHAR('3') PORT_CHAR('#')
313
314		PORT_MODIFY( "ROW3" )
315		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Y  { Z }") PORT_CODE(KEYCODE_Y)                   PORT_CHAR('Y')
316		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("7 ' { 7  / }") PORT_CODE(KEYCODE_7)               PORT_CHAR('7') PORT_CHAR('\'')
317
318		PORT_MODIFY( "ROW4" )
319		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("0  { = }") PORT_CODE(KEYCODE_0)                   PORT_CHAR('0')
320
321		PORT_MODIFY( "ROW5" )
322		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME(",  <  { ; }") PORT_CODE(KEYCODE_COMMA)            PORT_CHAR(',') PORT_CHAR('<')
323		PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Paragraph  \xE2\x86\x91  { \xc3\xbc }") PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR(0x00A7) PORT_CHAR(0x2191)
324		PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME(":  [  { \xc3\xa4 }") PORT_CODE(KEYCODE_COLON)     PORT_CHAR(':') PORT_CHAR('[')
325		PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME(".  >  { : }") PORT_CODE(KEYCODE_STOP)             PORT_CHAR('.') PORT_CHAR('>')
326		PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("-  { '  ` }") PORT_CODE(KEYCODE_EQUALS)           PORT_CHAR('-')
327		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("+  { \xc3\x9f ? }") PORT_CODE(KEYCODE_MINUS)      PORT_CHAR('+')
328
329		PORT_MODIFY( "ROW6" )
330		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("/  ?  { -  _ }") PORT_CODE(KEYCODE_SLASH)         PORT_CHAR('/') PORT_CHAR('?')
331		PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Sum Pi  { ]  \\ }") PORT_CODE(KEYCODE_DEL)        PORT_CHAR(0x03A3) PORT_CHAR(0x03C0)
332		PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("=  { #  ' }") PORT_CODE(KEYCODE_BACKSLASH)        PORT_CHAR('=')
333		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME(";  ]  { \xc3\xb6 }") PORT_CODE(KEYCODE_QUOTE)     PORT_CHAR(';') PORT_CHAR(']')
334		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("*  `  { +  * }") PORT_CODE(KEYCODE_CLOSEBRACE)    PORT_CHAR('*') PORT_CHAR('`')
335		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("\\  { [ \xE2\x86\x91 }") PORT_CODE(KEYCODE_BACKSLASH2) PORT_CHAR('\xa3')
336
337		PORT_MODIFY( "ROW7" )
338		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("_  { <  > }") PORT_CODE(KEYCODE_TILDE)            PORT_CHAR('_')
339
340		PORT_MODIFY("SPECIAL") /* special keys */
341		PORT_DIPNAME( 0x20, 0x00, "(C65) DIN ASC (switch)") PORT_CODE(KEYCODE_F3)
342		PORT_DIPSETTING(    0x00, "ASC" )
343		PORT_DIPSETTING(    0x20, "DIN" )
344		INPUT_PORTS_END
345
346
347
348		/*************************************
349		*
350		*  Sound definitions
351		*
352		*************************************/
353
354		int c65_state::c64_paddle_read( device_t *device, address_space &space, int which )
355		{
356		int pot1 = 0xff, pot2 = 0xff, pot3 = 0xff, pot4 = 0xff, temp;
357		UINT8 cia0porta = machine().device<mos6526_device>("cia_0")->pa_r(space, 0);
358		int controller1 = ioport("CTRLSEL")->read() & 0x07;
359		int controller2 = ioport("CTRLSEL")->read() & 0x70;
360		/* Notice that only a single input is defined for Mouse & Lightpen in both ports */
361		switch (controller1)
362		{
363		case 0x01:
364		if (which)
365		pot2 = ioport("PADDLE2")->read();
366		else
367		pot1 = ioport("PADDLE1")->read();
368		break;
369
370		case 0x02:
371		if (which)
372		pot2 = ioport("TRACKY")->read();
373		else
374		pot1 = ioport("TRACKX")->read();
375		break;
376
377		case 0x03:
378		if (which && (ioport("JOY1_2B")->read() & 0x20))  /* Joy1 Button 2 */
379		pot1 = 0x00;
380		break;
381
382		case 0x04:
383		if (which)
384		pot2 = ioport("LIGHTY")->read();
385		else
386		pot1 = ioport("LIGHTX")->read();
387		break;
388
389		case 0x06:
390		if (which && (ioport("OTHER")->read() & 0x04))    /* Lightpen Signal */
391		pot2 = 0x00;
392		break;
393
394		case 0x00:
395		case 0x07:
396		break;
397
398		default:
399		logerror("Invalid Controller Setting %d\n", controller1);
400		break;
401		}
402
403		switch (controller2)
404		{
405		case 0x10:
406		if (which)
407		pot4 = ioport("PADDLE4")->read();
408		else
409		pot3 = ioport("PADDLE3")->read();
410		break;
411
412		case 0x20:
413		if (which)
414		pot4 = ioport("TRACKY")->read();
415		else
416		pot3 = ioport("TRACKX")->read();
417		break;
418
419		case 0x30:
420		if (which && (ioport("JOY2_2B")->read() & 0x20))  /* Joy2 Button 2 */
421		pot4 = 0x00;
422		break;
423
424		case 0x40:
425		if (which)
426		pot4 = ioport("LIGHTY")->read();
427		else
428		pot3 = ioport("LIGHTX")->read();
429		break;
430
431		case 0x60:
432		if (which && (ioport("OTHER")->read() & 0x04))    /* Lightpen Signal */
433		pot4 = 0x00;
434		break;
435
436		case 0x00:
437		case 0x70:
438		break;
439
440		default:
441		logerror("Invalid Controller Setting %d\n", controller1);
442		break;
443		}
444
445		if (ioport("CTRLSEL")->read() & 0x80)     /* Swap */
446		{
447		temp = pot1; pot1 = pot3; pot3 = temp;
448		temp = pot2; pot2 = pot4; pot4 = temp;
449		}
450
451		switch (cia0porta & 0xc0)
452		{
453		case 0x40:
454		return which ? pot2 : pot1;
455
456		case 0x80:
457		return which ? pot4 : pot3;
458
459		case 0xc0:
460		return which ? pot2 : pot1;
461
462		default:
463		return 0;
464		}
465		}
466
467		READ8_MEMBER( c65_state::sid_potx_r )
468		{
469		return c64_paddle_read(m_sid_r, space, 0);
470		}
471
472		READ8_MEMBER( c65_state::sid_poty_r )
473		{
474		return c64_paddle_read(m_sid_r, space, 1);
475		}
476
477
478		/*************************************
479		*
480		*  VIC III interfaces
481		*
482		*************************************/
483
484		UINT32 c65_state::screen_update_c65(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
485		{
486		m_vic->video_update(bitmap, cliprect);
487		return 0;
488		}
489
490		READ8_MEMBER(c65_state::c65_lightpen_x_cb)
491		{
492		return ioport("LIGHTX")->read() & ~0x01;
493		}
494
495		READ8_MEMBER(c65_state::c65_lightpen_y_cb)
496		{
497		return ioport("LIGHTY")->read() & ~0x01;
498		}
499
500		READ8_MEMBER(c65_state::c65_lightpen_button_cb)
501		{
502		return ioport("OTHER")->read() & 0x04;
503		}
504
505		READ8_MEMBER(c65_state::c65_c64_mem_r)
506		{
507		return m_memory[offset];
508		}
509
510		INTERRUPT_GEN_MEMBER(c65_state::vic3_raster_irq)
511		{
512		m_vic->raster_interrupt_gen();
513		}
514
515		/*************************************
516		*
517		*  Machine driver
518		*
519		*************************************/
520
521		static MACHINE_CONFIG_START( c65, c65_state )
522		/* basic machine hardware */
523		MCFG_CPU_ADD("maincpu", M4510, 3500000)  /* or VIC6567_CLOCK, */
524		MCFG_CPU_PROGRAM_MAP(c65_mem)
525		MCFG_CPU_VBLANK_INT_DRIVER("screen", c65_state,  c65_frame_interrupt)
526		MCFG_CPU_PERIODIC_INT_DRIVER(c65_state, vic3_raster_irq,  VIC6567_HRETRACERATE)
527
528		MCFG_MACHINE_START_OVERRIDE(c65_state, c65 )
529
530		/* video hardware */
531		MCFG_SCREEN_ADD("screen", RASTER)
532		MCFG_SCREEN_REFRESH_RATE(VIC6567_VRETRACERATE)
533		MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
534		MCFG_SCREEN_SIZE(525 * 2, 520 * 2)
535		MCFG_SCREEN_VISIBLE_AREA(VIC6567_STARTVISIBLECOLUMNS ,(VIC6567_STARTVISIBLECOLUMNS + VIC6567_VISIBLECOLUMNS - 1) * 2, VIC6567_STARTVISIBLELINES, VIC6567_STARTVISIBLELINES + VIC6567_VISIBLELINES - 1)
536		MCFG_SCREEN_UPDATE_DRIVER(c65_state, screen_update_c65)
537		MCFG_SCREEN_PALETTE("vic3:palette")
538
539		MCFG_DEVICE_ADD("vic3", VIC3, 0)
540		MCFG_VIC3_CPU("maincpu")
541		MCFG_VIC3_TYPE(VIC4567_NTSC)
542		MCFG_VIC3_LIGHTPEN_X_CB(READ8(c65_state, c65_lightpen_x_cb))
543		MCFG_VIC3_LIGHTPEN_Y_CB(READ8(c65_state, c65_lightpen_y_cb))
544		MCFG_VIC3_LIGHTPEN_BUTTON_CB(READ8(c65_state, c65_lightpen_button_cb))
545		MCFG_VIC3_DMA_READ_CB(READ8(c65_state, c65_dma_read))
546		MCFG_VIC3_DMA_READ_COLOR_CB(READ8(c65_state, c65_dma_read_color))
547		MCFG_VIC3_INTERRUPT_CB(WRITELINE(c65_state, c65_vic_interrupt))
548		MCFG_VIC3_PORT_CHANGED_CB(WRITE8(c65_state, c65_bankswitch_interface))
549		MCFG_VIC3_C64_MEM_R_CB(READ8(c65_state, c65_c64_mem_r))
550
551		/* sound hardware */
552		MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
553		MCFG_SOUND_ADD("sid_r", MOS8580, 985248)
554		MCFG_MOS6581_POTX_CALLBACK(READ8(c65_state, sid_potx_r))
555		MCFG_MOS6581_POTY_CALLBACK(READ8(c65_state, sid_poty_r))
556		MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.50)
557		MCFG_SOUND_ADD("sid_l", MOS8580, 985248)
558		MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.50)
559
560		/* quickload */
561		MCFG_QUICKLOAD_ADD("quickload", c65_state, cbm_c65, "p00,prg", CBM_QUICKLOAD_DELAY_SECONDS)
562
563		/* cia */
564		MCFG_DEVICE_ADD("cia_0", MOS6526, 3500000)
565		MCFG_MOS6526_TOD(60)
566		MCFG_MOS6526_IRQ_CALLBACK(WRITELINE(c65_state, c65_cia0_interrupt))
567		MCFG_MOS6526_PA_INPUT_CALLBACK(READ8(c65_state, c65_cia0_port_a_r))
568		MCFG_MOS6526_PB_INPUT_CALLBACK(READ8(c65_state, c65_cia0_port_b_r))
569		MCFG_MOS6526_PB_OUTPUT_CALLBACK(WRITE8(c65_state, c65_cia0_port_b_w))
570
571		MCFG_DEVICE_ADD("cia_1", MOS6526, 3500000)
572		MCFG_MOS6526_TOD(60)
573		MCFG_MOS6526_IRQ_CALLBACK(WRITELINE(c65_state, c65_cia1_interrupt))
574		MCFG_MOS6526_PA_INPUT_CALLBACK(READ8(c65_state, c65_cia1_port_a_r))
575		MCFG_MOS6526_PA_OUTPUT_CALLBACK(WRITE8(c65_state, c65_cia1_port_a_w))
576
577		/* floppy from serial bus */
578		MCFG_CBM_IEC_ADD(NULL)
579
580		/* internal ram */
581		MCFG_RAM_ADD(RAM_TAG)
582		MCFG_RAM_DEFAULT_SIZE("128K")
583		MCFG_RAM_EXTRA_OPTIONS("640K,4224K")
584		MACHINE_CONFIG_END
585
586		static MACHINE_CONFIG_DERIVED( c65pal, c65 )
587		MCFG_SCREEN_MODIFY("screen")
588		MCFG_SCREEN_REFRESH_RATE(VIC6569_VRETRACERATE)
589		MCFG_SCREEN_SIZE(625 * 2, 520 * 2)
590		MCFG_SCREEN_VISIBLE_AREA(VIC6569_STARTVISIBLECOLUMNS, (VIC6569_STARTVISIBLECOLUMNS + VIC6569_VISIBLECOLUMNS - 1) * 2, VIC6569_STARTVISIBLELINES, VIC6569_STARTVISIBLELINES + VIC6569_VISIBLELINES - 1)
591		MCFG_SCREEN_PALETTE("vic3:palette")
592
593		MCFG_DEVICE_MODIFY("vic3")
594		MCFG_VIC3_TYPE(VIC4567_PAL)
595
596		/* sound hardware */
597		MCFG_SOUND_REPLACE("sid_r", MOS8580, 1022727)
598		MCFG_MOS6581_POTX_CALLBACK(READ8(c65_state, sid_potx_r))
599		MCFG_MOS6581_POTY_CALLBACK(READ8(c65_state, sid_poty_r))
600		MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.50)
601		MCFG_SOUND_REPLACE("sid_l", MOS8580, 1022727)
602		MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.50)
603
604		/* cia */
605		MCFG_DEVICE_MODIFY("cia_0")
606		MCFG_MOS6526_TOD(50)
607
608		MCFG_DEVICE_MODIFY("cia_1")
609		MCFG_MOS6526_TOD(50)
610		MACHINE_CONFIG_END
611
612
613		/*************************************
614		*
615		*  ROM definition(s)
616		*
617		*************************************/
618
619
620		ROM_START( c65 )
621		ROM_REGION( 0x400000, "maincpu", 0 )
622		ROM_SYSTEM_BIOS( 0, "910111", "V0.9.910111" )
623		ROMX_LOAD( "910111.bin", 0x20000, 0x20000, CRC(c5d8d32e) SHA1(71c05f098eff29d306b0170e2c1cdeadb1a5f206), ROM_BIOS(1) )
624		ROM_SYSTEM_BIOS( 1, "910523", "V0.9.910523" )
625		ROMX_LOAD( "910523.bin", 0x20000, 0x20000, CRC(e8235dd4) SHA1(e453a8e7e5b95de65a70952e9d48012191e1b3e7), ROM_BIOS(2) )
626		ROM_SYSTEM_BIOS( 2, "910626", "V0.9.910626" )
627		ROMX_LOAD( "910626.bin", 0x20000, 0x20000, CRC(12527742) SHA1(07c185b3bc58410183422f7ac13a37ddd330881b), ROM_BIOS(3) )
628		ROM_SYSTEM_BIOS( 3, "910828", "V0.9.910828" )
629		ROMX_LOAD( "910828.bin", 0x20000, 0x20000, CRC(3ee40b06) SHA1(b63d970727a2b8da72a0a8e234f3c30a20cbcb26), ROM_BIOS(4) )
630		ROM_SYSTEM_BIOS( 4, "911001", "V0.9.911001" )
631		ROMX_LOAD( "911001.bin", 0x20000, 0x20000, CRC(0888b50f) SHA1(129b9a2611edaebaa028ac3e3f444927c8b1fc5d), ROM_BIOS(5) )
632		ROM_END
633
634		ROM_START( c64dx )
635		ROM_REGION( 0x400000, "maincpu", 0 )
636		ROM_LOAD( "910429.bin", 0x20000, 0x20000, CRC(b025805c) SHA1(c3b05665684f74adbe33052a2d10170a1063ee7d) )
637		ROM_END
638
639		/***************************************************************************
640
641		Game driver(s)
642
643		***************************************************************************/
644
645		/*    YEAR  NAME    PARENT  COMPAT  MACHINE INPUT   INIT    COMPANY                         FULLNAME                                              FLAGS */
646
647		COMP( 1991, c65,    0,      0,      c65,    c65, c65_state,    c65,    "Commodore Business Machines",  "Commodore 65 Development System (Prototype, NTSC)", MACHINE_NOT_WORKING )
648		COMP( 1991, c64dx,  c65,    0,      c65pal, c65ger, c65_state, c65pal, "Commodore Business Machines",  "Commodore 64DX Development System (Prototype, PAL, German)", MACHINE_NOT_WORKING )

trunk/src/mame/drivers/chihiro.cpp

r250251	r250252
378	378	#include "includes/chihiro.h"
379	379	#include "includes/xbox.h"
380	380
381		// for now, make buggy GCC/Mingw STFU about I64FMT
382		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
383		#pragma GCC diagnostic push
384		#pragma GCC diagnostic ignored "-Wformat"
385		#pragma GCC diagnostic ignored "-Wformat-extra-args"
386		#endif
387
388	381	#define LOG_PCI
389	382	//#define LOG_BASEBOARD
390	383
r250251	r250252
1283	1276	// 0023
1284	1277	// 0024     GAME( 2009, ccfboxo,  ccfboxa,  chihirogd,    chihiro, driver_device, 0, ROT0, "Sega",                     "Chihiro Firmware Update For Compact Flash Box (GDX-0024)", MACHINE_NO_SOUND|MACHINE_NOT_WORKING )
1285	1278	/* 0024A */ GAME( 2009, ccfboxa,  chihiro,  chihirogd,    chihiro, driver_device, 0, ROT0, "Sega",                     "Chihiro Firmware Update For Compact Flash Box (Rev A) (GDX-0024A)", MACHINE_NO_SOUND|MACHINE_NOT_WORKING )
1286
1287		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
1288		#pragma GCC diagnostic pop
1289		#endif

trunk/src/mame/drivers/exidyttl.cpp

r250251	r250252
4	4
5	5	Exidy discrete hardware games
6	6
7		Alley Rally (1975) (AR-1A)
8		Attack (1977)
9		Death Race (1976)
10		Destruction Derby (1975)
11		Hockey / Tennis (Thumper Bumper?) (1974)
12		Score (1977)
	7	Alley Rally (1976/10) (AR-1A)
	8	Attack (1977/02)
	9	Death Race (1976/04)
	10	Destruction Derby (1976/01)
	11	Hockey / Tennis (Thumper Bumper?) (1974/03)
	12	Score (1977/07)
13	13	Spiders From Space (1976)
14		Sting (1974)
15		Super Death Chase (1977)
16		Table Foosballer / Table Football (1975)
17		Table Pinball (1974)
18		TV Pinball (1974) (PB-4)
	14	Sting (1974/03)
	15	Super Death Chase (1977/10)
	16	Table Foosballer / Table Football (1975/11)
	17	Table Pinball (1974/11)
	18	TV Pinball (1974/11) (PB-4)
19	19
20	20	***************************************************************************/
21	21
r250251	r250252
211	211	ROM_LOAD( "6331-36.t7",     0x0000, 0x0020, CRC(15e00a2a) SHA1(cd43d227a34e5444ed9d8a4acf5497df9c789c73) )
212	212	ROM_END
213	213
214
215
216	214	GAME( 1977, attckexd,  0,        attack,   0, driver_device,  0, ROT0, "Exidy", "Attack (Set 1) [TTL]", MACHINE_IS_SKELETON )
217	215	GAME( 1977, attckexd2, attckexd, attack,   0, driver_device,  0, ROT0, "Exidy", "Attack (Set 2) [TTL]", MACHINE_IS_SKELETON )
218	216	GAME( 1976, deathrac,  0,        deathrac, 0, driver_device,  0, ROT0, "Exidy", "Death Race [TTL]", MACHINE_IS_SKELETON )

trunk/src/mame/drivers/fidelz80.cpp

r250251	r250252
8	8	*  All detailed RE work done by Kevin 'kevtris' Horton
9	9	*
10	10	*  TODO:
11		*  * Figure out why it says the first speech line twice; it shouldn't. (It sometimes does this on the sensory chess challenger real hardware)
	11	*  * Figure out why it says the first speech line twice; it shouldn't?
	12	*    It sometimes does this on Voice Sensory Chess Challenger real hardware.
	13	*    It can also be heard on Advanced Talking Chess Challenger real hardware, but not the whole line:
	14	*    "I I am Fidelity's chess challenger", instead.
12	15	*  * Get rom locations from pcb (done for UVC, VCC is probably similar)
13	16	*  * correctly hook up 7002/VBRC and 7014/bridgec3 speech so that the z80 is halted while words are being spoken
14	17	*
r250251	r250252
49	52
50	53	I/O map:
51	54	--------
52		00-FF: 8255 port chip [LN edit: 00-03, mirrored over the 00-FF range; program accesses F4-F7]
	55	00-03: 8255 port chip, mirrored over the 00-FF range; program accesses F4-F7
53	56
54	57
55	58	8255 connections:
r250251	r250252
605	608	void fidelz80_state::update_display()
606	609	{
607	610	// data for the 4x 7seg leds, bits are 0bxABCDEFG
608		UINT8 out_digit = BITSWAP8( m_digit_data,7,0,1,2,3,4,5,6 ) & 0x7f;
	611	UINT8 out_digit = BITSWAP8(m_digit_data,7,0,1,2,3,4,5,6) & 0x7f;
609	612
610	613	if (m_led_selected&0x04)
611	614	{
612	615	output_set_digit_value(0, out_digit);
613	616
614		output_set_led_value(1, m_led_data & 0x01);
	617	output_set_led_value(1, m_led_data);
615	618	}
616	619	if (m_led_selected&0x08)
617	620	{
618	621	output_set_digit_value(1, out_digit);
619	622
620		output_set_led_value(0, m_led_data & 0x01);
	623	output_set_led_value(0, m_led_data);
621	624	}
622	625	if (m_led_selected&0x10)
623	626	{
r250251	r250252
629	632	}
630	633	}
631	634
632		READ8_MEMBER( fidelz80_state::fidelz80_portc_r )
	635	READ8_MEMBER(fidelz80_state::fidelz80_portc_r)
633	636	{
634	637	UINT8 data = 0xff;
635	638
r250251	r250252
653	656	return data;
654	657	}
655	658
656		WRITE8_MEMBER( fidelz80_state::fidelz80_portb_w )
	659	WRITE8_MEMBER(fidelz80_state::fidelz80_portb_w)
657	660	{
658	661	if (!(data & 0x80))
659	662	{
660		m_led_data = (data&0x01);  // common for two leds
	663	m_led_data = data & 1; // common for two leds
661	664
662	665	m_led_selected = data;
663	666
r250251	r250252
667	670	// ignoring the language switch enable for now, is bit 0x40
668	671	}
669	672
670		WRITE8_MEMBER( fidelz80_state::fidelz80_portc_w )
	673	WRITE8_MEMBER(fidelz80_state::fidelz80_portc_w)
671	674	{
672	675	m_kp_matrix = data;
673	676	}
674	677
675		WRITE8_MEMBER( fidelz80_state::cc10_porta_w )
	678	WRITE8_MEMBER(fidelz80_state::cc10_porta_w)
676	679	{
677	680	m_beep->set_state((data & 0x80) ? 0 : 1);
678	681
r250251	r250252
681	684	update_display();
682	685	}
683	686
684		READ8_MEMBER( fidelz80_state::vcc_portb_r )
	687	READ8_MEMBER(fidelz80_state::vcc_portb_r)
685	688	{
686	689	return (m_speech->bsy_r() != 0) ? 0x80 : 0x00;
687	690	}
688	691
689		WRITE8_MEMBER( fidelz80_state::vcc_porta_w )
	692	WRITE8_MEMBER(fidelz80_state::vcc_porta_w)
690	693	{
691	694	m_speech->set_volume(15); // hack, s14001a core should assume a volume of 15 unless otherwise stated...
692	695	m_speech->reg_w(data & 0x3f);
r250251	r250252
701	704	I8255 Device, for VSC
702	705	******************************************************************************/
703	706
704		WRITE8_MEMBER( fidelz80_state::vsc_porta_w )
	707	WRITE8_MEMBER(fidelz80_state::vsc_porta_w)
705	708	{
706		UINT8 out_digit = BITSWAP8( data,7,6,2,1,0,5,4,3 );
	709	UINT8 out_digit = BITSWAP8(data,7,6,2,1,0,5,4,3);
707	710
708	711	if (m_kp_matrix & 0x01)
709	712	{
r250251	r250252
728	731	m_speech->reg_w(data & 0x3f);
729	732	}
730	733
731		WRITE8_MEMBER( fidelz80_state::vsc_portb_w )
	734	WRITE8_MEMBER(fidelz80_state::vsc_portb_w)
732	735	{
733		for (int row=1; row<=8; row++)
	736	for (int row = 1; row <= 8; row++)
734	737	{
735	738	if (m_kp_matrix & 0x01)
736	739	output_set_indexed_value("led_a", row, BIT(data, 8-row));
r250251	r250252
751	754	}
752	755	}
753	756
754		WRITE8_MEMBER( fidelz80_state::vsc_portc_w )
	757	WRITE8_MEMBER(fidelz80_state::vsc_portc_w)
755	758	{
756	759	m_kp_matrix = (m_kp_matrix & 0x300) | data;
757	760	}
r250251	r250252
760	763	PIO Device, for VSC
761	764	******************************************************************************/
762	765
763		READ8_MEMBER( fidelz80_state::vsc_pio_porta_r )
	766	READ8_MEMBER(fidelz80_state::vsc_pio_porta_r)
764	767	{
765	768	UINT8 data = 0;
766	769
r250251	r250252
788	791	return data & 0xff;
789	792	}
790	793
791		READ8_MEMBER( fidelz80_state::vsc_pio_portb_r )
	794	READ8_MEMBER(fidelz80_state::vsc_pio_portb_r)
792	795	{
793	796	UINT8 data = 0x00;
794	797
r250251	r250252
798	801	return data;
799	802	}
800	803
801		WRITE8_MEMBER( fidelz80_state::vsc_pio_portb_w )
	804	WRITE8_MEMBER(fidelz80_state::vsc_pio_portb_w)
802	805	{
803	806	m_kp_matrix = (m_kp_matrix & 0xff) | ((data & 0x03)<<8);
804	807
r250251	r250252
955	958	return m_i8041->upi41_master_r(space, 1);
956	959	}
957	960
958		WRITE8_MEMBER( fidelz80_state::bridgec_speech_w )
	961	WRITE8_MEMBER(fidelz80_state::bridgec_speech_w)
959	962	{
960	963	// todo: HALT THE z80 here, and set up a callback to poll the s14001a DONE line to resume z80
961	964	m_speech->set_volume(15); // hack, s14001a core should assume a volume of 15 unless otherwise stated...
r250251	r250252
963	966	m_speech->rst_w(BIT(data, 7));
964	967	}
965	968
966		void fidelz80_state::machine_reset()
	969	void fidelz80_state::machine_start()
967	970	{
	971	// zerofill
968	972	m_led_selected = 0;
969	973	m_kp_matrix = 0;
970	974	m_digit_data = 0;
971	975	m_led_data = 0;
972	976	memset(m_digit_line_status, 0, sizeof(m_digit_line_status));
	977
	978	// register for savestates
	979	save_item(NAME(m_led_selected));
	980	save_item(NAME(m_kp_matrix));
	981	save_item(NAME(m_digit_data));
	982	save_item(NAME(m_led_data));
	983	save_item(NAME(m_digit_line_status));
973	984	}
974	985
975	986	TIMER_DEVICE_CALLBACK_MEMBER(fidelz80_state::nmi_timer)
r250251	r250252
1009	1020	AM_RANGE(0x2000, 0x3fff) AM_ROM // 8k rom
1010	1021	AM_RANGE(0x4000, 0x5fff) AM_ROM // 8k rom
1011	1022	AM_RANGE(0x6000, 0x63ff) AM_RAM AM_MIRROR(0x1c00) // 1k ram (2114*2) mirrored 8 times
1012		AM_RANGE(0xE000, 0xE000) AM_WRITE(bridgec_speech_w) AM_MIRROR(0x1FFF) // write to speech chip, halts cpu
	1023	AM_RANGE(0xe000, 0xe000) AM_WRITE(bridgec_speech_w) AM_MIRROR(0x1fff) // write to speech chip, halts cpu
1013	1024	ADDRESS_MAP_END
1014	1025
1015	1026	static ADDRESS_MAP_START(fidel_z80_io, AS_IO, 8, fidelz80_state)
r250251	r250252
1059	1070	}
1060	1071
1061	1072	static INPUT_PORTS_START( fidelz80 )
1062		PORT_START("LEVEL")     // cc10 only
	1073	PORT_START("LEVEL") // cc10 only
1063	1074	PORT_CONFNAME( 0x80, 0x00, "Number of levels" )
1064	1075	PORT_CONFSETTING( 0x00, "10" )
1065	1076	PORT_CONFSETTING( 0x80, "3" )
r250251	r250252
1248	1259	******************************************************************************/
1249	1260
1250	1261	static MACHINE_CONFIG_START( cc10, fidelz80_state )
	1262
1251	1263	/* basic machine hardware */
1252	1264	MCFG_CPU_ADD("maincpu", Z80, XTAL_4MHz)
1253	1265	MCFG_CPU_PROGRAM_MAP(cc10_z80_mem)
r250251	r250252
1266	1278	MCFG_I8255_OUT_PORTC_CB(WRITE8(fidelz80_state, fidelz80_portc_w))
1267	1279
1268	1280	/* sound hardware */
1269		MCFG_SPEAKER_STANDARD_MONO( "mono" )
1270		MCFG_SOUND_ADD( "beeper", BEEP, 0 )
1271		MCFG_SOUND_ROUTE( ALL_OUTPUTS, "mono", 1.00 )
	1281	MCFG_SPEAKER_STANDARD_MONO("mono")
	1282	MCFG_SOUND_ADD("beeper", BEEP, 0)
	1283	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
1272	1284	MACHINE_CONFIG_END
1273	1285
1274	1286	static MACHINE_CONFIG_START( vcc, fidelz80_state )
	1287
1275	1288	/* basic machine hardware */
1276	1289	MCFG_CPU_ADD("maincpu", Z80, XTAL_4MHz)
1277	1290	MCFG_CPU_PROGRAM_MAP(vcc_z80_mem)
r250251	r250252
1297	1310	MACHINE_CONFIG_END
1298	1311
1299	1312	static MACHINE_CONFIG_START( vsc, fidelz80_state )
	1313
1300	1314	/* basic machine hardware */
1301	1315	MCFG_CPU_ADD("maincpu", Z80, XTAL_4MHz)
1302	1316	MCFG_CPU_PROGRAM_MAP(vsc_mem)
r250251	r250252
1325	1339	MACHINE_CONFIG_END
1326	1340
1327	1341	static MACHINE_CONFIG_START( bridgec, fidelz80_state )
	1342
1328	1343	/* basic machine hardware */
1329	1344	MCFG_CPU_ADD("maincpu", Z80, XTAL_5MHz/2) // 2.5MHz
1330	1345	MCFG_CPU_PROGRAM_MAP(bridgec_z80_mem)
r250251	r250252
1341	1356	MCFG_I8243_ADD("i8243", NOOP, WRITE8(fidelz80_state,digit_w))
1342	1357
1343	1358	/* sound hardware */
1344		MCFG_SPEAKER_STANDARD_MONO( "mono" )
	1359	MCFG_SPEAKER_STANDARD_MONO("mono")
1345	1360	MCFG_SOUND_ADD("speech", S14001A, 25000) // around 25khz
1346		MCFG_SOUND_ROUTE( ALL_OUTPUTS, "mono", 1.00 )
	1361	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
1347	1362	MACHINE_CONFIG_END
1348	1363
1349	1364
r250251	r250252
1417	1432	Drivers
1418	1433	******************************************************************************/
1419	1434
1420		/*    YEAR  NAME        PARENT      COMPAT  MACHINE     INPUT   INIT      COMPANY                     FULLNAME                                                    FLAGS */
1421		COMP( 1978, cc10,       0,          0,      cc10,  fidelz80, driver_device, 0,      "Fidelity Electronics",   "Chess Challenger 10 (Model CC10/BCC)", MACHINE_NOT_WORKING )
1422		COMP( 1979, vcc,        0,          0,      vcc,   fidelz80, driver_device, 0,      "Fidelity Electronics",   "Talking Chess Challenger (model VCC)", MACHINE_NOT_WORKING )
1423		COMP( 1979, vbrc,       0,          0,      bridgec,   bridgec, driver_device,      0,      "Fidelity Electronics",   "Bridge Challenger (model VBRC/7002)",  MACHINE_NOT_WORKING )
1424		COMP( 1980, uvc,        vcc,        0,      vcc,   fidelz80, driver_device, 0,      "Fidelity Electronics",   "Advanced Talking Chess Challenger (model UVC)", MACHINE_NOT_WORKING )
1425		COMP( 1980, bridgec3,   vbrc,       0,      bridgec,   bridgec, driver_device,      0,      "Fidelity Electronics",   "Bridge Challenger 3 (model 7014)", MACHINE_NOT_WORKING )
1426		COMP( 1980, vsc,        0,          0,      vsc,   vsc, driver_device,      0,      "Fidelity Electronics",   "Voice Sensory Chess Challenger (model VSC)", MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK )
	1435	/*    YEAR  NAME      PARENT  COMPAT  MACHINE  INPUT     INIT              COMPANY, FULLNAME, FLAGS */
	1436	COMP( 1978, cc10,     0,      0,      cc10,    fidelz80, driver_device, 0, "Fidelity Electronics", "Chess Challenger 10 (Model CC10/BCC)", MACHINE_NOT_WORKING )
	1437	COMP( 1979, vcc,      0,      0,      vcc,     fidelz80, driver_device, 0, "Fidelity Electronics", "Talking Chess Challenger (model VCC)", MACHINE_NOT_WORKING )
	1438	COMP( 1979, vbrc,     0,      0,      bridgec, bridgec,  driver_device, 0, "Fidelity Electronics", "Bridge Challenger (model VBRC/7002)",  MACHINE_NOT_WORKING )
	1439	COMP( 1980, uvc,      vcc,    0,      vcc,     fidelz80, driver_device, 0, "Fidelity Electronics", "Advanced Talking Chess Challenger (model UVC)", MACHINE_NOT_WORKING )
	1440	COMP( 1980, bridgec3, vbrc,   0,      bridgec, bridgec,  driver_device, 0, "Fidelity Electronics", "Bridge Challenger 3 (model 7014)", MACHINE_NOT_WORKING )
	1441	COMP( 1980, vsc,      0,      0,      vsc,     vsc,      driver_device, 0, "Fidelity Electronics", "Voice Sensory Chess Challenger (model VSC)", MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK )

trunk/src/mame/drivers/goldnpkr.cpp

r250251	r250252
4499	4499	ROM_LOAD( "prg.bin",    0x4000, 0x4000, CRC(d7a932a2) SHA1(c940ea90378a631c217a09c4a9e73c382acaa48d) )
4500	4500
4501	4501	ROM_REGION( 0x3000, "gfx1", 0 )
4502		ROM_FILL(                   0x0000, 0x2000, 0 ) /* filling the R-G bitplanes */
	4502	ROM_FILL(           0x0000, 0x2000, 0 ) /* filling the R-G bitplanes */
4503	4503	ROM_LOAD( "3.bin",  0x2000, 0x0800, CRC(23e83e89) SHA1(0c6352d46e3dfe176b0e970dd163e2bc01246890) )    /* text layer */
4504	4504
4505	4505	ROM_REGION( 0x1800, "gfx2", 0 )
4506		ROM_LOAD( "0.bin",    0x0000, 0x0800, CRC(1f41c541) SHA1(00df5079193f78db0617a6b8a613d8a0616fc8e9) )    /* cards deck gfx, bitplane1 */
4507		ROM_LOAD( "1.bin",    0x0800, 0x0800, CRC(6bbb1e2d) SHA1(51ee282219bf84218886ad11a24bc6a8e7337527) )    /* cards deck gfx, bitplane2 */
4508		ROM_LOAD( "2.bin",    0x1000, 0x0800, CRC(6e3e9b1d) SHA1(14eb8d14ce16719a6ad7d13db01e47c8f05955f0) )    /* cards deck gfx, bitplane3 */
	4506	ROM_LOAD( "0.bin",  0x0000, 0x0800, CRC(1f41c541) SHA1(00df5079193f78db0617a6b8a613d8a0616fc8e9) )    /* cards deck gfx, bitplane1 */
	4507	ROM_LOAD( "1.bin",  0x0800, 0x0800, CRC(6bbb1e2d) SHA1(51ee282219bf84218886ad11a24bc6a8e7337527) )    /* cards deck gfx, bitplane2 */
	4508	ROM_LOAD( "2.bin",  0x1000, 0x0800, CRC(6e3e9b1d) SHA1(14eb8d14ce16719a6ad7d13db01e47c8f05955f0) )    /* cards deck gfx, bitplane3 */
4509	4509
4510	4510	ROM_REGION( 0x0100, "proms", 0 )
4511		ROM_LOAD( "82s129.9c",      0x0000, 0x0100, CRC(7f31066b) SHA1(15420780ec6b2870fc4539ec3afe4f0c58eedf12) ) /* PROM dump needed */
	4511	ROM_LOAD( "82s129.9c",  0x0000, 0x0100, CRC(7f31066b) SHA1(15420780ec6b2870fc4539ec3afe4f0c58eedf12) ) /* PROM dump needed */
4512	4512	ROM_END
4513	4513
4514	4514	/* Unknown australian hard to dump set
r250251	r250252
4532	4532	ROM_LOAD( "bprom.bin",    0x0000, 0x0100, BAD_DUMP CRC(7f31066b) SHA1(15420780ec6b2870fc4539ec3afe4f0c58eedf12) ) /* PROM dump needed */
4533	4533	ROM_END
4534	4534
	4535	/* Unknown australian set
	4536	String "just 4 fun" replaces the "insert coins" one.
	4537	*/
	4538	ROM_START( potnpkrh )
	4539	ROM_REGION( 0x10000, "maincpu", 0 )
	4540	ROM_LOAD( "unk_2732.15a", 0x2000, 0x1000, CRC(441ad1b2) SHA1(248b8e03723989c7766b50858c9a5d0abbb5e055) )
	4541	ROM_LOAD( "unk_2732.17a", 0x3000, 0x1000, CRC(9d72e145) SHA1(526d88c70e03bcff18072436ca3d498a0bb39913) )
	4542
	4543	/* Backcard logo is different, showing 'FR'. The rest matches the common char gfx */
	4544	ROM_REGION( 0x1800, "gfx1", 0 )
	4545	ROM_FILL(                  0x0000, 0x1000, 0 ) /* filling the R-G bitplanes */
	4546	ROM_LOAD( "unk_2716.8a",   0x1000, 0x0800, CRC(a138afa6) SHA1(80c6d11086f78e36dfc01c15b23e70667fcf17fc) )    /* char ROM */
	4547
	4548	/* Backplane at 5a has two bits different against the common cards gfx
	4549	Offsets 0x380 and 0x400, bit0 is set to 0 */
	4550	ROM_REGION( 0x1800, "gfx2", 0 )
	4551	ROM_LOAD( "unk_2716.4a",  0x0000, 0x0800, CRC(f2f94661) SHA1(f37f7c0dff680fd02897dae64e13e297d0fdb3e7) )    /* cards deck gfx, bitplane1 */
	4552	ROM_LOAD( "unk_2716.5a",  0x0800, 0x0800, CRC(daf38d03) SHA1(6b518494688756ad7b753fdec46b6392c4a9ebbe) )    /* cards deck gfx, bitplane2 */
	4553	ROM_LOAD( "unk_2716.7a",  0x1000, 0x0800, CRC(6e3e9b1d) SHA1(14eb8d14ce16719a6ad7d13db01e47c8f05955f0) )    /* cards deck gfx, bitplane3 */
	4554
	4555	ROM_REGION( 0x0100, "proms", 0 )
	4556	ROM_LOAD( "bprom.bin",    0x0000, 0x0100, BAD_DUMP CRC(7f31066b) SHA1(15420780ec6b2870fc4539ec3afe4f0c58eedf12) ) /* PROM dump needed */
	4557	ROM_END
	4558
	4559
4535	4560	ROM_START( goodluck )
4536	4561	ROM_REGION( 0x10000, "maincpu", 0 )
4537	4562	ROM_LOAD( "goodluck_glh6b.bin", 0x0000, 0x8000, CRC(2cfa4a2c) SHA1(720e2900f3a0ef2632aa201a63b5eba0570e6aa3) )
r250251	r250252
4546	4571	ROM_LOAD( "5.bin",  0x2000, 0x1000, CRC(2712f297) SHA1(d3cc1469d07c3febbbe4a645cd6bdb57e09cf504) )    /* cards deck gfx, bitplane3 */
4547	4572
4548	4573	ROM_REGION( 0x0100, "proms", 0 )
4549		ROM_LOAD( "82s129.9c",      0x0000, 0x0100, CRC(7f31066b) SHA1(15420780ec6b2870fc4539ec3afe4f0c58eedf12) ) /* PROM dump needed */
	4574	ROM_LOAD( "82s129.9c",  0x0000, 0x0100, CRC(7f31066b) SHA1(15420780ec6b2870fc4539ec3afe4f0c58eedf12) ) /* PROM dump needed */
4550	4575	ROM_END
4551	4576
4552	4577
r250251	r250252
10516	10541	GAMEL( 198?, potnpkre,  pottnpkr, pottnpkr, pottnpkr, driver_device,  0,        ROT0,   "bootleg",                  "Jack Potten's Poker (set 6)",             0,                layout_goldnpkr )
10517	10542	GAMEL( 198?, potnpkrf,  pottnpkr, goldnpkr, goldnpkr, driver_device,  0,        ROT0,   "bootleg",                  "Jack Potten's Poker (set 7, Royale GFX)", 0,                layout_goldnpkr )
10518	10543	GAMEL( 198?, potnpkrg,  pottnpkr, pottnpkr, potnpkra, driver_device,  0,        ROT0,   "bootleg",                  "Jack Potten's Poker (set 8, Australian)", 0,                layout_goldnpkr )
	10544	GAMEL( 198?, potnpkrh,  pottnpkr, pottnpkr, goldnpkr, driver_device,  0,        ROT0,   "bootleg",                  "Jack Potten's Poker (set 9, 'just 4 fun')", 0,              layout_goldnpkr )
10519	10545	GAMEL( 198?, ngold,     pottnpkr, pottnpkr, ngold,    driver_device,  0,        ROT0,   "<unknown>",                "Jack Potten's Poker (NGold, set 1)",      0,                layout_goldnpkr )
10520	10546	GAMEL( 198?, ngolda,    pottnpkr, pottnpkr, ngold,    driver_device,  0,        ROT0,   "<unknown>",                "Jack Potten's Poker (NGold, set 2)",      0,                layout_goldnpkr )
10521	10547	GAMEL( 198?, ngoldb,    pottnpkr, pottnpkr, ngoldb,   driver_device,  0,        ROT0,   "<unknown>",                "Jack Potten's Poker (NGold, set 3)",      0,                layout_goldnpkr )
r250251	r250252
10565	10591
10566	10592	GAMEL( 1994, witchjol,  0,        wcrdxtnd, witchjol, goldnpkr_state, vkdlsa,   ROT0,   "Video Klein",              "Jolli Witch (Export, 6T/12T ver 1.57D)",  0,                layout_goldnpkr )
10567	10593
10568		GAMEL( 2001, wldwitch,  0,        wcrdxtnd, wldwitch, goldnpkr_state, vkdlsww,  ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.84A)",       0,                layout_goldnpkr )  /* Ver 184A, 2001-09-12 */
10569		GAMEL( 1992, wldwitcha, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwa, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.57-SP)",     0,                layout_goldnpkr )  /* Ver 157-SP, 1992-12-25 */
10570		GAMEL( 1992, wldwitchb, wldwitch, wcrdxtnd, wldwitch, driver_device,  0,        ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.57-TE)",     MACHINE_NOT_WORKING, layout_goldnpkr )   /* Ver 157-TE, 1992-12-25 */
10571		GAMEL( 1994, wldwitchc, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwc, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.62A)",       0,                layout_goldnpkr )  /* Ver 162A, 1994-04-26 */
10572		GAMEL( 1994, wldwitchd, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwd, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.62B)",       0,                layout_goldnpkr )  /* Ver 162B, 1994-04-26 */
10573		GAMEL( 1994, wldwitche, wldwitch, wcrdxtnd, wldwitch, driver_device,  0,        ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.62A-F)",     MACHINE_NOT_WORKING, layout_goldnpkr )   /* Ver 162A-F, 1994-04-26 */
10574		GAMEL( 1994, wldwitchf, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwc, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.62A alt)",   0,                layout_goldnpkr )  /* Ver 162A alt, 1994-11-03 */
10575		GAMEL( 1994, wldwitchg, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwd, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.62B alt)",   0,                layout_goldnpkr )  /* Ver 162B alt, 1994-11-03 */
10576		GAMEL( 1995, wldwitchh, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwh, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.65A)",       0,                layout_goldnpkr )  /* Ver 165A, 1995-11-16 */
10577		GAMEL( 1996, wldwitchi, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwh, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.65A-S)",     0,                layout_goldnpkr )  /* Ver 165A-S (Fast Deal), 1996-03-26 */
10578		GAMEL( 1996, wldwitchj, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwh, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.65A-S alt)", 0,                layout_goldnpkr )  /* Ver 165A-S alt (Fast Deal), 1996-05-26 */
10579		GAMEL( 1996, wldwitchk, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwh, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.65A-N)",     0,                layout_goldnpkr )  /* Ver 165A-N, 1996-05-29 */
10580		GAMEL( 1996, wldwitchl, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwl, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.70A beta)",  0,                layout_goldnpkr )  /* Ver 170A-beta, 1996-06-25 */
10581		GAMEL( 1996, wldwitchm, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwl, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.70A)",       0,                layout_goldnpkr )  /* Ver 170A, 1996-09-30 */
10582		GAMEL( 1997, wldwitchn, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwl, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.70A alt)",   0,                layout_goldnpkr )  /* Ver 170A alt, 1997-06-11 */
10583		GAMEL( 1998, wldwitcho, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwo, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.74A-SP-BELG)", 0,              layout_goldnpkr )  /* Ver 174A-SP-BELG (no D-UP, no payout), 1998-05-11 */
10584		GAMEL( 1998, wldwitchp, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwp, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.74A)",       0,                layout_goldnpkr )  /* Ver 174A (no D-UP, no payout), 1998-09-20 */
10585		GAMEL( 1998, wldwitchq, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlsb,   ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.74A alt)",   0,                layout_goldnpkr )  /* Ver 174A alt, box, 1998-09-25 */
10586		GAMEL( 1999, wldwitchr, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwr, ROT0,   "Video Klein",              "Wild Witch (Export, 6B/12B ver 1.75A-E English)", 0,            layout_goldnpkr )  /* Ver 175A-E (English), 1999-01-11 */
10587		GAMEL( 1999, wldwitchs, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswws, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.76A)",       0,                layout_goldnpkr )  /* Ver 176A, 1999-??-?? */
10588		GAMEL( 1999, wldwitcht, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwt, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.77A)",       0,                layout_goldnpkr )  /* Ver 177A, 1999-??-?? */
10589		GAMEL( 2000, wldwitchu, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwu, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.79A)",       0,                layout_goldnpkr )  /* Ver 179A, 2000-05-10 */
10590		GAMEL( 2001, wldwitchv, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwv, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.83A)",       0,                layout_goldnpkr )  /* Ver 183A, 2001-06-13 */
	10594	GAMEL( 2001, wldwitch,  0,        wcrdxtnd, wldwitch, goldnpkr_state, vkdlsww,  ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.84A)",       0,                   layout_goldnpkr )  /* Ver 184A, 2001-09-12 */
	10595	GAMEL( 1992, wldwitcha, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwa, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.57-SP)",     0,                   layout_goldnpkr )  /* Ver 157-SP, 1992-12-25 */
	10596	GAMEL( 1992, wldwitchb, wldwitch, wcrdxtnd, wldwitch, driver_device,  0,        ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.57-TE)",     MACHINE_NOT_WORKING, layout_goldnpkr )  /* Ver 157-TE, 1992-12-25 */
	10597	GAMEL( 1994, wldwitchc, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwc, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.62A)",       0,                   layout_goldnpkr )  /* Ver 162A, 1994-04-26 */
	10598	GAMEL( 1994, wldwitchd, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwd, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.62B)",       0,                   layout_goldnpkr )  /* Ver 162B, 1994-04-26 */
	10599	GAMEL( 1994, wldwitche, wldwitch, wcrdxtnd, wldwitch, driver_device,  0,        ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.62A-F)",     MACHINE_NOT_WORKING, layout_goldnpkr )  /* Ver 162A-F, 1994-04-26 */
	10600	GAMEL( 1994, wldwitchf, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwc, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.62A alt)",   0,                   layout_goldnpkr )  /* Ver 162A alt, 1994-11-03 */
	10601	GAMEL( 1994, wldwitchg, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwd, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.62B alt)",   0,                   layout_goldnpkr )  /* Ver 162B alt, 1994-11-03 */
	10602	GAMEL( 1995, wldwitchh, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwh, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.65A)",       0,                   layout_goldnpkr )  /* Ver 165A, 1995-11-16 */
	10603	GAMEL( 1996, wldwitchi, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwh, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.65A-S)",     0,                   layout_goldnpkr )  /* Ver 165A-S (Fast Deal), 1996-03-26 */
	10604	GAMEL( 1996, wldwitchj, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwh, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.65A-S alt)", 0,                   layout_goldnpkr )  /* Ver 165A-S alt (Fast Deal), 1996-05-26 */
	10605	GAMEL( 1996, wldwitchk, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwh, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.65A-N)",     0,                   layout_goldnpkr )  /* Ver 165A-N, 1996-05-29 */
	10606	GAMEL( 1996, wldwitchl, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwl, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.70A beta)",  0,                   layout_goldnpkr )  /* Ver 170A-beta, 1996-06-25 */
	10607	GAMEL( 1996, wldwitchm, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwl, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.70A)",       0,                   layout_goldnpkr )  /* Ver 170A, 1996-09-30 */
	10608	GAMEL( 1997, wldwitchn, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwl, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.70A alt)",   0,                   layout_goldnpkr )  /* Ver 170A alt, 1997-06-11 */
	10609	GAMEL( 1998, wldwitcho, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwo, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.74A-SP-BELG)", 0,                 layout_goldnpkr )  /* Ver 174A-SP-BELG (no D-UP, no payout), 1998-05-11 */
	10610	GAMEL( 1998, wldwitchp, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwp, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.74A)",       0,                   layout_goldnpkr )  /* Ver 174A (no D-UP, no payout), 1998-09-20 */
	10611	GAMEL( 1998, wldwitchq, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlsb,   ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.74A alt)",   0,                   layout_goldnpkr )  /* Ver 174A alt, box, 1998-09-25 */
	10612	GAMEL( 1999, wldwitchr, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwr, ROT0,   "Video Klein",              "Wild Witch (Export, 6B/12B ver 1.75A-E English)", 0,               layout_goldnpkr )  /* Ver 175A-E (English), 1999-01-11 */
	10613	GAMEL( 1999, wldwitchs, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswws, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.76A)",       0,                   layout_goldnpkr )  /* Ver 176A, 1999-??-?? */
	10614	GAMEL( 1999, wldwitcht, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwt, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.77A)",       0,                   layout_goldnpkr )  /* Ver 177A, 1999-??-?? */
	10615	GAMEL( 2000, wldwitchu, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwu, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.79A)",       0,                   layout_goldnpkr )  /* Ver 179A, 2000-05-10 */
	10616	GAMEL( 2001, wldwitchv, wldwitch, wcrdxtnd, wldwitch, goldnpkr_state, vkdlswwv, ROT0,   "Video Klein",              "Wild Witch (Export, 6T/12T ver 1.83A)",       0,                   layout_goldnpkr )  /* Ver 183A, 2001-06-13 */
10591	10617
10592	10618	GAMEL( 1998, wupndown,  0,        wcrdxtnd, wupndown, driver_device,  0,        ROT0,   "Video Klein",              "Witch Up & Down (Export, 6T/12T ver 1.02)",        0,           layout_upndown )    /* Ver 1.02, 1998-10-26 */
10593	10619	GAMEL( 1998, wupndowna, wupndown, wcrdxtnd, wupndown, driver_device,  0,        ROT0,   "Video Klein",              "Witch Up & Down (Export, 6T/12T ver 0.99, set 1)", 0,           layout_upndown )    /* Ver 0.99, 1998-04-09 */

trunk/src/mame/drivers/goldstar.cpp

r250251	r250252
6236	6236	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* Tied to GND and to the hidden switch that change games. (PC0+GND) -+-> PB0 */
6237	6237
6238	6238	PORT_START("DSW1")
6239		PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )  PORT_DIPLOCATION("DSW1:!1")  /* OK */
	6239	PORT_DIPNAME( 0x01, 0x01, "Unknown" )                   PORT_DIPLOCATION("DSW1:!1")     /* not checked */
6240	6240	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
6241	6241	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
6242		PORT_DIPNAME( 0x02, 0x02, "Hopper Out Switch" ) PORT_DIPLOCATION("DSW1:!2")  /* OK */
	6242	PORT_DIPNAME( 0x02, 0x02, "Hopper Out Switch" )         PORT_DIPLOCATION("DSW1:!2")     /* not checked */
6243	6243	PORT_DIPSETTING(    0x02, "Active Low" )
6244	6244	PORT_DIPSETTING(    0x00, "Active High" )
6245		PORT_DIPNAME( 0x04, 0x04, "Payout Mode" )       PORT_DIPLOCATION("DSW1:!3")  /* OK */
	6245	PORT_DIPNAME( 0x04, 0x04, "Payout Mode" )               PORT_DIPLOCATION("DSW1:!3")     /* not checked */
6246	6246	PORT_DIPSETTING(    0x04, "Payout Switch" )
6247	6247	PORT_DIPSETTING(    0x00, "Automatic" )
6248		PORT_DIPNAME( 0x08, 0x00, "W-UP '7'" )          PORT_DIPLOCATION("DSW1:!4")  /* not checked */
6249		PORT_DIPSETTING(    0x08, "Loss" )
6250		PORT_DIPSETTING(    0x00, "Even" )
6251		PORT_DIPNAME( 0x10, 0x00, "W-UP Pay Rate" )     PORT_DIPLOCATION("DSW1:!5")  /* OK */
	6248	PORT_DIPNAME( 0x08, 0x00, "'7' In Double Up Game" )     PORT_DIPLOCATION("DSW1:!4")     /* OK */
	6249	PORT_DIPSETTING(    0x00, "Lose" )
	6250	PORT_DIPSETTING(    0x08, "Even" )
	6251	PORT_DIPNAME( 0x10, 0x00, "Double Up Game Pay Rate" )   PORT_DIPLOCATION("DSW1:!5")     /* OK */
6252	6252	PORT_DIPSETTING(    0x00, "80%" )
6253	6253	PORT_DIPSETTING(    0x10, "90%" )
6254		PORT_DIPNAME( 0x20, 0x00, "W-UP Game" )         PORT_DIPLOCATION("DSW1:!6")  /* OK */
	6254	PORT_DIPNAME( 0x20, 0x00, "Double Up Game" )            PORT_DIPLOCATION("DSW1:!6")     /* OK */
6255	6255	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
6256	6256	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
6257		PORT_DIPNAME( 0xc0, 0xc0, "Bet Max" )           PORT_DIPLOCATION("DSW1:!7,!8")    /* OK */
	6257	PORT_DIPNAME( 0xc0, 0xc0, "Bet Max" )                   PORT_DIPLOCATION("DSW1:!7,!8")  /* OK */
6258	6258	PORT_DIPSETTING(    0x00, "16" )
6259	6259	PORT_DIPSETTING(    0x40, "32" )
6260	6260	PORT_DIPSETTING(    0x80, "64" )
6261	6261	PORT_DIPSETTING(    0xc0, "96" )
6262	6262
6263	6263	PORT_START("DSW2")
6264		PORT_DIPNAME( 0x07, 0x00, "Main Game Pay Rate" )    PORT_DIPLOCATION("DSW2:!1,!2,!3")  /* OK */
	6264	PORT_DIPNAME( 0x07, 0x00, "Main Game Pay Rate" )    PORT_DIPLOCATION("DSW2:!1,!2,!3")  /* OK */
6265	6265	PORT_DIPSETTING(    0x07, "55%" )
6266	6266	PORT_DIPSETTING(    0x06, "60%" )
6267	6267	PORT_DIPSETTING(    0x05, "65%" )
r250251	r250252
6270	6270	PORT_DIPSETTING(    0x02, "80%" )
6271	6271	PORT_DIPSETTING(    0x01, "85%" )
6272	6272	PORT_DIPSETTING(    0x00, "90%" )
6273		PORT_DIPNAME( 0x18, 0x00, "Hopper Limit" )          PORT_DIPLOCATION("DSW2:!4,!5")    /* OK */
	6273	PORT_DIPNAME( 0x18, 0x00, "Hopper Limit" )          PORT_DIPLOCATION("DSW2:!4,!5")      /* not checked */
6274	6274	PORT_DIPSETTING(    0x18, "300" )
6275	6275	PORT_DIPSETTING(    0x10, "500" )
6276	6276	PORT_DIPSETTING(    0x08, "1000" )
6277	6277	PORT_DIPSETTING(    0x00, "Unlimited" )
6278		PORT_DIPNAME( 0x20, 0x00, "100 Odds Sound" )        PORT_DIPLOCATION("DSW2:!6")  /* not checked */
	6278	PORT_DIPNAME( 0x20, 0x00, "100 Odds Sound" )        PORT_DIPLOCATION("DSW2:!6")         /* not checked */
6279	6279	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
6280	6280	PORT_DIPSETTING(    0x20, DEF_STR( On ) )
6281		PORT_DIPNAME( 0x40, 0x40, "Key-In Type" )           PORT_DIPLOCATION("DSW2:!7")  /* OK */
	6281	PORT_DIPNAME( 0x40, 0x40, "Key-In Type" )           PORT_DIPLOCATION("DSW2:!7")         /* OK */
6282	6282	PORT_DIPSETTING(    0x40, "A-Type" )
6283	6283	PORT_DIPSETTING(    0x00, "B-Type" )
6284		PORT_DIPNAME( 0x80, 0x00, "Center Super 7 Bet Limit" )  PORT_DIPLOCATION("DSW2:!8")  /* related with DSW 4-6 */
	6284	PORT_DIPNAME( 0x80, 0x00, "Center Super 7 Bet Limit" )  PORT_DIPLOCATION("DSW2:!8")     /* related with DSW 4-6 */
6285	6285	PORT_DIPSETTING(    0x80, "Unlimited" )
6286	6286	PORT_DIPSETTING(    0x00, "Limited" )
6287	6287
r250251	r250252
6318	6318	PORT_INCLUDE( cmv4_dsw4 )   /* Display Of Payout Limit not working; all others OK */
6319	6319
6320	6320	PORT_INCLUDE( cmv4_dsw5 )
	6321	PORT_MODIFY("DSW5")
6321	6322	/* Display of Doll On Demo only affects payout table screen */
6322	6323	/* Coin In Limit OK */
6323		/* Condition For 3 Kind Of Bonus not checked */
	6324	/* Condition For 3 Kind Of Bonus OK */
6324	6325	/* Display Of Doll At All Fr. Bonus not checked */
6325		/* DSW5-7 listed as unused */
	6326	PORT_DIPNAME( 0x40, 0x40, "Card Shuffle Animation" )    PORT_DIPLOCATION("DSW5:7")  /* OK */
	6327	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	6328	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
6326	6329	/* Test Mode For Disp. Of Doll not working */
6327	6330	INPUT_PORTS_END
6328	6331

trunk/src/mame/drivers/model3.cpp

r250251	r250252
667	667	#include "includes/model3.h"
668	668
669	669
670		// for now, make buggy GCC/Mingw STFU about I64FMT
671		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
672		#pragma GCC diagnostic push
673		#pragma GCC diagnostic ignored "-Wformat"
674		#pragma GCC diagnostic ignored "-Wformat-extra-args"
675		#endif
676
677
678	670	void model3_state::update_irq_state()
679	671	{
680	672	if ((m_irq_enable & m_irq_state) || m_scsi_irq_state)
r250251	r250252
6059	6051	GAME( 1999, eca,              0, model3_21_5881, eca,      model3_state, eca,      ROT0, "Sega", "Emergency Call Ambulance (Export)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND )
6060	6052	GAME( 1999, ecau,           eca, model3_21_5881, eca,      model3_state, eca,      ROT0, "Sega", "Emergency Call Ambulance (USA)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND )
6061	6053	GAME( 1999, ecap,           eca, model3_21_5881, eca,      model3_state, eca,      ROT0, "Sega", "Emergency Call Ambulance (US location test?)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND )
6062
6063		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
6064		#pragma GCC diagnostic pop
6065		#endif

trunk/src/mame/drivers/namcos23.cpp

r250251	r250252
86	86	return
87	87
88	88
	89	c8000000:
	90	8011e384:
	91	if((a2000000.w & 0xfff0 != 0x0080) (c417_r, 808e or 008e)
	92	+10.w = 2
	93	+16.w = 42
	94	+16.w = 23c0
	95	+10.w = 3
	96	801deaf0.w *0x28 -> +12.w (fixed)
	97
	98
	99
	100
	101	':maincpu' (801142FC): unmapped program memory write to 0C800010 = 00020000 & FFFF0000
	102	':maincpu' (801143A8): unmapped program memory write to 0C800010 = 00020000 & FFFF0000
	103	':maincpu' (801143B4): unmapped program memory write to 0C800014 = 00000042 & 0000FFFF
	104	':maincpu' (801143C0): unmapped program memory write to 0C800014 = 000023C0 & 0000FFFF
	105	':maincpu' (801143CC): unmapped program memory write to 0C800010 = 00030000 & FFFF0000
	106	':maincpu' (801143E0): unmapped program memory write to 0C800010 = 00000000 & 0000FFFF
	107	':maincpu' (801143E0): unmapped program memory write to 0C800010 = 00000000 & 0000FFFF
	108	':maincpu' (801143E0): unmapped program memory write to 0C800010 = 00000000 & 0000FFFF
	109	':maincpu' (801143E0): unmapped program memory write to 0C800010 = 00000000 & 0000FFFF
	110
89	111	****************************************************************************
90	112
91	113	Namco System 23 and Super System 23 Hardware Overview (last updated 7th April 2013 at 12.49am)
r250251	r250252
1523	1545	DECLARE_WRITE16_MEMBER(iob_p6_w);
1524	1546	DECLARE_READ8_MEMBER(iob_gun_r);
1525	1547	DECLARE_READ16_MEMBER(iob_analog_r);
	1548	DECLARE_WRITE16_MEMBER(c435_state_pio_w);
	1549	DECLARE_WRITE16_MEMBER(c435_state_reset_w);
1526	1550	DECLARE_DRIVER_INIT(s23);
1527	1551	TILE_GET_INFO_MEMBER(TextTilemapGetInfo);
1528	1552	DECLARE_VIDEO_START(s23);
r250251	r250252
1537	1561	UINT16 nthword(const UINT32 *pSource, int offs);
1538	1562	inline INT32 u32_to_s24(UINT32 v);
1539	1563	inline INT32 u32_to_s10(UINT32 v);
	1564	float f24_to_f32(UINT32 v);
	1565
1540	1566	INT32 *c435_getv(UINT16 id);
1541	1567	INT16 *c435_getm(UINT16 id);
1542	1568
	1569	void c435_state_set_interrupt(const UINT16 *param);
	1570	void c435_state_set_projection_matrix_line(const UINT16 *param);
	1571	void c435_state_set(UINT16 type, const UINT16 *param);
	1572	int c435_get_state_entry_size(UINT16 type);
	1573
1543	1574	void c435_matrix_matrix_mul();
1544	1575	void c435_matrix_set();
1545	1576	void c435_vector_set();
1546	1577	void c435_matrix_vector_mul();
1547	1578	void c435_vector_matrix_mul();
	1579	void c435_state_set();
1548	1580	void c435_scaling_set();
1549		void c435_state_set_interrupt();
1550		void c435_state_set();
1551	1581	void c435_render();
1552	1582	void c435_flush();
1553	1583
r250251	r250252
1602	1632	return v & 0x200 ? v | 0xfffffe00 : v & 0x1ff;
1603	1633	}
1604	1634
	1635	float namcos23_state::f24_to_f32(UINT32 v)
	1636	{
	1637	// 8 bits exponent, 16 mantissa
	1638	// mantissa is 16-bits signed, 2-complement
	1639	// value is m * 2**(e-46)
	1640	// 1 is e=32, m=0x4000, -1 is e=31, m=0x8000
1605	1641
	1642	// This code turns it into a standard float
	1643	if(!v)
	1644	return 0;
	1645
	1646	UINT32 r = v & 0x8000 ? 0x80000000 : 0;
	1647	UINT16 m = r ? -v : v;
	1648	UINT8 e = (v >> 16) + 0x60;
	1649	while(!(m & 0x8000)) {
	1650	m <<= 1;
	1651	e--;
	1652	}
	1653
	1654	r = r | (e << 23) | ((m & 0x7fff) << 8);
	1655	return *(float *)&r;
	1656	}
	1657
1606	1658	INLINE UINT8 light(UINT8 c, float l)
1607	1659	{
1608	1660	if(l < 1)
r250251	r250252
1632	1684	return m_matrices[id];
1633	1685	}
1634	1686
	1687	void namcos23_state::c435_state_set_interrupt(const UINT16 *param)
	1688	{
	1689	if(param[0] & 1)
	1690	update_main_interrupts(m_main_irqcause | MAIN_C435_IRQ);
	1691	else
	1692	update_main_interrupts(m_main_irqcause & ~MAIN_C435_IRQ);
	1693	}
	1694
	1695	void namcos23_state::c435_state_set_projection_matrix_line(const UINT16 *param)
	1696	{
	1697	// timecrs2:
	1698	//   sx = 640/2, sy = 480/2, t = tan(fov/2) (fov=45 degrees)
	1699	//   line 1: 1 0 -(sx-a)/(sx/t) 0 -1  0 -(sx+a)/(sx/t) 0
	1700	//   line 2: 0 1 -(sy-b)/(sx/t) 0  0 -1 -(sy+b)/(sx/t) 0
	1701	//   line 3: 0 0 -1             c  0  0              0 sx/t
	1702
	1703	char buf[4096];
	1704	char *p = buf;
	1705	p += sprintf(p, "projection matrix line:");
	1706	for(int i=0; i<8; i++)
	1707	p += sprintf(p, " %f", f24_to_f32((param[2*i+1] << 16) | param[2*i+2]));
	1708	p += sprintf(p, "\n");
	1709	logerror(buf);
	1710	}
	1711
	1712	void namcos23_state::c435_state_set(UINT16 type, const UINT16 *param)
	1713	{
	1714	switch(type) {
	1715	case 0x0001: c435_state_set_interrupt(param); break;
	1716	case 0x00c8: c435_state_set_projection_matrix_line(param); break;
	1717	default: {
	1718	char buf[4096];
	1719	char *p = buf;
	1720	p += sprintf(buf, "WARNING: Unhandled state type %04x :", type);
	1721	for(int i=0; i<c435_get_state_entry_size(type); i++)
	1722	p += sprintf(p, " %04x", param[i]);
	1723	p += sprintf(p, "\n");
	1724	logerror(buf);
	1725	break;
	1726	}
	1727	}
	1728	}
	1729
	1730	WRITE16_MEMBER(namcos23_state::c435_state_reset_w)
	1731	{
	1732	m_c435_buffer_pos = 0;
	1733	}
	1734
	1735	WRITE16_MEMBER(namcos23_state::c435_state_pio_w)
	1736	{
	1737	m_c435_buffer[m_c435_buffer_pos++] = data;
	1738	int psize = c435_get_state_entry_size(m_c435_buffer[0]);
	1739	if(m_c435_buffer_pos < psize+1)
	1740	return;
	1741	c435_state_set(m_c435_buffer[0], m_c435_buffer+1);
	1742	m_c435_buffer_pos = 0;
	1743	}
	1744
	1745	int namcos23_state::c435_get_state_entry_size(UINT16 type)
	1746	{
	1747	switch(type) {
	1748	case 0x0001: return 1;
	1749	case 0x0009: return 19;
	1750	case 0x0042: return 41;
	1751	case 0x0046: return 13;
	1752	case 0x00c0: return 33;
	1753	case 0x00c6: return 13;
	1754	case 0x00c8: return 17;
	1755	default:
	1756	logerror("WARNING: Unknown size for state type %04x\n", type);
	1757	return -1;
	1758	}
	1759	}
	1760
1635	1761	void namcos23_state::c435_matrix_matrix_mul() // 0.0
1636	1762	{
1637	1763	if((m_c435_buffer[0] & 0xf) != 4) {
1638	1764	logerror("WARNING: c435_matrix_matrix_mul with size %d\n", m_c435_buffer[0] & 0xf);
1639	1765	return;
1640	1766	}
	1767	if(m_c435_buffer[0] != 0x0004)
	1768	logerror("WARNING: c435_matrix_matrix_mul header %04x\n", m_c435_buffer[0]);
1641	1769	if(m_c435_buffer[3] != 0xffff)
1642	1770	logerror("WARNING: c435_matrix_matrix_mul with +2=%04x\n", m_c435_buffer[3]);
1643	1771
r250251	r250252
1663	1791	return;
1664	1792	}
1665	1793
	1794	if(m_c435_buffer[0] != 0x0814 && m_c435_buffer[0] != 0x1014)
	1795	logerror("WARNING: c435_matrix_vector_mul header %04x\n", m_c435_buffer[0]);
	1796
	1797
1666	1798	if(m_c435_buffer[3] != 0xffff) {
1667	1799	INT32 *t        = c435_getv(m_c435_buffer[1]);
1668	1800	const INT16 *m  = c435_getm(m_c435_buffer[2]);
r250251	r250252
1690	1822	logerror("WARNING: c435_matrix_set with size %d\n", m_c435_buffer[0] & 0xf);
1691	1823	return;
1692	1824	}
	1825
	1826	if(m_c435_buffer[0] != 0x004a)
	1827	logerror("WARNING: c435_matrix_set header %04x\n", m_c435_buffer[0]);
	1828
1693	1829	INT16 *t = c435_getm(m_c435_buffer[1]);
1694	1830	for(int i=0; i<9; i++)
1695	1831	t[i] = m_c435_buffer[i+2];
r250251	r250252
1701	1837	logerror("WARNING: c435_vector_set with size %d\n", m_c435_buffer[0] & 0xf);
1702	1838	return;
1703	1839	}
	1840	if(m_c435_buffer[0] != 0x057)
	1841	logerror("WARNING: c435_vector_set header %04x\n", m_c435_buffer[0]);
	1842
1704	1843	INT32 *t = c435_getv(m_c435_buffer[1]);
1705	1844	for(int i=0; i<3; i++)
1706	1845	t[i] = u32_to_s24((m_c435_buffer[2*i+2] << 16) | m_c435_buffer[2*i+3]);
r250251	r250252
1715	1854	m_scaling = m_c435_buffer[1];
1716	1855	}
1717	1856
1718		void namcos23_state::c435_state_set_interrupt() // 4.f.0001
1719		{
1720		if(m_c435_buffer[0] != 0x4f02) {
1721		logerror("WARNING: c435_state_set_interrupt with size %d\n", m_c435_buffer[0] & 0xff);
1722		return;
1723		}
1724		if(m_c435_buffer[2] & 1)
1725		update_main_interrupts(m_main_irqcause | MAIN_C435_IRQ);
1726		else
1727		update_main_interrupts(m_main_irqcause & ~MAIN_C435_IRQ);
1728		}
1729
1730	1857	void namcos23_state::c435_state_set() // 4.f
1731	1858	{
1732	1859	if((m_c435_buffer[0] & 0xff) == 0) {
1733		logerror("WARNING: c435_state_set with size %d\n", m_c435_buffer[0] & 0xff);
	1860	logerror("WARNING: c435_state_set with zero size\n");
1734	1861	return;
1735	1862	}
1736		switch(m_c435_buffer[1]) {
1737		case 0x0001: c435_state_set_interrupt(); break;
1738		default:
1739		logerror("WARNING: c435_state_set(%04x, ...)\n", m_c435_buffer[1]);
1740		break;
	1863	int size = c435_get_state_entry_size(m_c435_buffer[1]);
	1864	if(size != (m_c435_buffer[0] & 0xff)-1)
	1865	{
	1866	logerror("WARNING: c435_state_set size disagreement (type=%04x, got %d, expected %d)\n", m_c435_buffer[1], (m_c435_buffer[0] & 0xff)-1, size);
	1867	return;
1741	1868	}
	1869
	1870	c435_state_set(m_c435_buffer[1], m_c435_buffer+2);
1742	1871	}
1743	1872
1744	1873	void namcos23_state::c435_render() // 8
1745	1874	{
1746	1875	if((m_c435_buffer[0] & 0xf) != 3) {
1747		logerror("WARNING: c435_render with size %d, header %04x", m_c435_buffer[0] & 0xf, m_c435_buffer[0]);
	1876	logerror("WARNING: c435_render with size %d, header %04x\n", m_c435_buffer[0] & 0xf, m_c435_buffer[0]);
1748	1877	return;
1749	1878	}
1750	1879
r250251	r250252
1768	1897	re->model.scaling = use_scaling ? m_scaling / 16384.0 : 1.0;
1769	1898	memcpy(re->model.m, m, sizeof(re->model.m));
1770	1899	memcpy(re->model.v, v, sizeof(re->model.v));
	1900	//   re->model.v[2] *= 768/420.0;
	1901
1771	1902	if(0)
1772		fprintf(stderr, "Render %04x (%f %f %f %f %f %f %f %f %f) (%f %f %f)\n",
	1903	logerror("Render %04x (%f %f %f %f %f %f %f %f %f) (%f %f %f) %f\n",
1773	1904	re->model.model,
1774	1905	re->model.m[0]/16384.0, re->model.m[1]/16384.0, re->model.m[2]/16384.0,
1775	1906	re->model.m[3]/16384.0, re->model.m[4]/16384.0, re->model.m[5]/16384.0,
1776	1907	re->model.m[6]/16384.0, re->model.m[7]/16384.0, re->model.m[8]/16384.0,
1777		re->model.v[0]/16384.0, re->model.v[1]/16384.0, re->model.v[2]/16384.0);
	1908	re->model.v[0]/16384.0, re->model.v[1]/16384.0, re->model.v[2]/16384.0,
	1909	re->model.scaling);
1778	1910
1779	1911	render.count[render.cur]++;
1780	1912	}
r250251	r250252
1830	1962	}
1831	1963
1832	1964	if(!known) {
1833		logerror("c435 -");
	1965	char buf[4096];
	1966	char *p = buf;
	1967	p += sprintf(p, "c435 -");
1834	1968	for(int i=0; i<m_c435_buffer_pos; i++)
1835		logerror(" %04x", m_c435_buffer[i]);
1836		logerror("\n");
	1969	p += sprintf(p, " %04x", m_c435_buffer[i]);
	1970	p += sprintf(p, "\n");
	1971	logerror(buf);
1837	1972	}
1838	1973
1839	1974	m_c435_buffer_pos = 0;
r250251	r250252
1930	2065	// 640/(3.125/3.75) = 768
1931	2066	// 480/(2.34375/3.75) = 768
1932	2067
1933		pv.x = 320 + 768 * pv.x;
1934		pv.y = 240 - 768 * pv.y;
	2068	#if 1
	2069	pv.x = 320 + 768*pv.x;
	2070	pv.y = 240 - 768*pv.y;
	2071	#else
	2072	pv.x = 320 + 410*pv.x;
	2073	pv.y = 240 - 410*pv.y;
	2074	#endif
	2075
1935	2076	pv.p[0] = 1.0f / pv.p[0];
1936	2077	}
1937	2078
r250251	r250252
1957	2098	void namcos23_state::render_one_model(const namcos23_render_entry *re)
1958	2099	{
1959	2100	render_t &render = m_render;
	2101	if(re->model.model < 0x80) {
	2102	logerror("WARNING: model %02x requested\n", re->model.model);
	2103	return;
	2104	}
	2105
	2106	if(re->model.model == 3486)
	2107	return;
	2108
1960	2109	UINT32 adr = m_ptrom[re->model.model];
1961	2110	if(adr >= m_ptrom_limit) {
1962	2111	logerror("WARNING: model %04x base address %08x out-of-bounds - pointram?\n", re->model.model, adr);
r250251	r250252
2761	2910	AM_RANGE(0x0a000000, 0x0affffff) AM_ROM AM_REGION("data", 0x1000000) AM_MIRROR(0x1000000)
2762	2911	AM_RANGE(0x0c000000, 0x0c00001f) AM_READWRITE16(c412_r, c412_w, 0xffffffff)
2763	2912	AM_RANGE(0x0c400000, 0x0c400007) AM_READWRITE16(c421_r, c421_w, 0xffffffff)
	2913	AM_RANGE(0x0c800010, 0x0c800013) AM_WRITE16(c435_state_reset_w, 0xffff0000)
	2914	AM_RANGE(0x0c800014, 0x0c800017) AM_WRITE16(c435_state_pio_w, 0x0000ffff)
2764	2915	AM_RANGE(0x0d000000, 0x0d00000f) AM_READWRITE16(ctl_r, ctl_w, 0xffffffff)
2765	2916	AM_RANGE(0x0e800000, 0x0e800003) AM_READWRITE16(sub_comm_r, sub_comm_w, 0xffffffff) // not sure
2766	2917	AM_RANGE(0x0fc00000, 0x0fffffff) AM_WRITENOP AM_ROM AM_REGION("user1", 0)
r250251	r250252
2904	3055
2905	3056	WRITE16_MEMBER(namcos23_state::mcu_pb_w)
2906	3057	{
2907		m_sub_portb = (m_sub_portb & 0x80) | (data & 0x7f);
	3058	m_sub_portb = (m_sub_portb & 0xc0) | (data & 0x3f);
2908	3059	m_rtc->ce_w((m_sub_portb & 0x20) && (m_sub_porta & 1));
2909	3060	m_settings->ce_w((m_sub_portb & 0x20) && !(m_sub_porta & 1));
2910	3061	}
r250251	r250252
3226	3377	INPUT_PORTS_END
3227	3378
3228	3379
	3380	static INPUT_PORTS_START( downhill )
	3381	PORT_START("P1")
	3382	PORT_BIT( 0xfff, IP_ACTIVE_LOW, IPT_UNKNOWN )
3229	3383
	3384	PORT_START("P2")
	3385	PORT_BIT( 0xfff, IP_ACTIVE_LOW, IPT_UNKNOWN )
3230	3386
	3387	PORT_START("IN01")
	3388	PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_BUTTON3)      // brake left
	3389	PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_START1)      // start
	3390	PORT_BIT(0x100, IP_ACTIVE_LOW, IPT_SERVICE) PORT_TOGGLE   // test switch
	3391	PORT_BIT(0x200, IP_ACTIVE_LOW, IPT_JOYSTICK_UP)      // select up
	3392	PORT_BIT(0x400, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN)   // select down
	3393	PORT_BIT(0x800, IP_ACTIVE_LOW, IPT_BUTTON1)   // enter
	3394	PORT_BIT(0xf00c, IP_ACTIVE_LOW, IPT_UNKNOWN)
3231	3395
	3396	PORT_START("IN23")
	3397	PORT_BIT(0x400, IP_ACTIVE_LOW, IPT_BUTTON4)      // brake right
	3398	PORT_BIT(0xfbff, IP_ACTIVE_LOW, IPT_UNKNOWN)
	3399
	3400	PORT_START("SERVICE")
	3401	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 )   // service coin
	3402
	3403	PORT_START("DSW")
	3404	PORT_SERVICE( 0x01, IP_ACTIVE_LOW )
	3405	PORT_DIPNAME( 0x02, 0x02, "Skip POST" )
	3406	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
	3407	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	3408	PORT_DIPNAME( 0x04, 0x04, "Freeze?" )
	3409	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
	3410	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	3411	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
	3412	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
	3413	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	3414	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
	3415	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	3416	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	3417	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	3418	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	3419	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	3420	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
	3421	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	3422	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	3423	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
	3424	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	3425	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	3426	INPUT_PORTS_END
	3427
	3428
3232	3429	/***************************************************************************
3233	3430
3234	3431	Machine Drivers
r250251	r250252
4930	5127	GAME( 1997, rapidrvrv2c, rapidrvr, gorgon,      rapidrvr,  namcos23_state, s23, ROT0, "Namco", "Rapid River (RD2 Ver. C)",     GAME_FLAGS ) // 97/11/27, Europe
4931	5128	GAME( 1997, rapidrvrp,   rapidrvr, gorgon,      rapidrvrp, namcos23_state, s23, ROT0, "Namco", "Rapid River (prototype)",      GAME_FLAGS ) // 97/11/10, USA
4932	5129	GAME( 1997, finfurl,     0,        gorgon,      finfurl,   namcos23_state, s23, ROT0, "Namco", "Final Furlong (FF2 Ver. A)",   GAME_FLAGS )
4933		GAME( 1997, downhill,    0,        s23,         s23,       namcos23_state, s23, ROT0, "Namco", "Downhill Bikers (DH3 Ver. A)", GAME_FLAGS )
	5130	GAME( 1997, downhill,    0,        s23,         downhill,  namcos23_state, s23, ROT0, "Namco", "Downhill Bikers (DH3 Ver. A)", GAME_FLAGS )
4934	5131	GAME( 1997, motoxgo,     0,        s23,         s23,       namcos23_state, s23, ROT0, "Namco", "Motocross Go! (MG3 Ver. A)",   GAME_FLAGS )
4935	5132	GAME( 1997, motoxgov2a,  motoxgo,  s23,         s23,       namcos23_state, s23, ROT0, "Namco", "Motocross Go! (MG2 Ver. A)",   GAME_FLAGS )
4936	5133	GAME( 1997, motoxgov1a,  motoxgo,  s23,         s23,       namcos23_state, s23, ROT0, "Namco", "Motocross Go! (MG1 Ver. A, set 1)", GAME_FLAGS )

trunk/src/mame/drivers/naomi.cpp

r250251	r250252
1580	1580	#include "includes/naomi.h"
1581	1581
1582	1582
1583		// for now, make buggy GCC/Mingw STFU about I64FMT
1584		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
1585		#pragma GCC diagnostic push
1586		#pragma GCC diagnostic ignored "-Wformat"
1587		#pragma GCC diagnostic ignored "-Wformat-extra-args"
1588		#endif
1589
1590
1591	1583	#define CPU_CLOCK (200000000)
1592	1584
1593	1585	READ64_MEMBER(naomi_state::naomi_arm_r )
r250251	r250252
9437	9429	GAME( 2006, xtrmhnt2, awbios, aw2c, aw2c, naomi_state, xtrmhnt2,   ROT0,   "Sega",                     "Extreme Hunting 2", GAME_FLAGS )
9438	9430	GAME( 2008, claychal, awbios, aw2c, aw2c, naomi_state, atomiswave, ROT0,   "Sega",                     "Sega Clay Challenge", GAME_FLAGS )
9439	9431	GAME( 2009, basschal, awbios, aw2c, aw2c, naomi_state, atomiswave, ROT0,   "Sega",                     "Sega Bass Fishing Challenge", GAME_FLAGS )
9440
9441		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
9442		#pragma GCC diagnostic pop
9443		#endif

trunk/src/mame/drivers/pse.cpp

r250251	r250252
7	7	Game Name                       DATA
8	8	-------------------------------------
9	9	1-2-4 Cocktail Table (197?)     UNKNOWN
10		Bazooka (1977)                  YES
11		Desert Patrol (1977)            YES
12		Espana (cabinet) (197?)         NO
13		Frenzy (1975)                   UNKNOWN
14		Game Tree (1978)                YES
15		Hodge Podge (197?)              UNKNOWN
16		Knights in Armor (1976)         YES
17		Maneater (1975)                 YES
	10	Bazooka (1976/11)               YES
	11	Desert Patrol (1977/11)         YES
	12	Espana (cabinet) (1975/10)      NO
	13	Frenzy (1975/08)                UNKNOWN
	14	Game Tree (1978/02)             YES
	15	Hodge Podge (1975?)             NO
	16	Knights in Armor (1976/06)      YES
	17	Maneater (1975/11)              YES
18	18	Play Five (1975?)               UNKNOWN
19		Scandia (cabinet) (1975)        NO
	19	Scandia (cabinet) (1975/08)     NO
20	20	Two Game (1974)                 UNKNOWN
21		U.N. Command (1977)             UNKNOWN
	21	U.N. Command (1977)             YES?
22	22
23	23	***************************************************************************/
24	24
r250251	r250252
79	79	// schematics
80	80	//...
81	81
82		//  NETDEV_ANALOG_CALLBACK(sound_cb, sound, psettl_state, sound_cb, "")
83		//  NETDEV_ANALOG_CALLBACK(video_cb, videomix, fixedfreq_device, update_vid, "fixfreq")
	82	//  NETDEV_ANALOG_CALLBACK(sound_cb, sound, psettl_state, sound_cb, "")
	83	//  NETDEV_ANALOG_CALLBACK(video_cb, videomix, fixedfreq_device, update_vid, "fixfreq")
84	84	NETLIST_END()
85	85
86	86
r250251	r250252
120	120
121	121	***************************************************************************/
122	122
	123	ROM_START( bazooka )
	124	ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 )
123	125
	126	ROM_REGION( 0x0840, "roms", ROMREGION_ERASE00 )
	127	ROM_LOAD( "bd2.k1",      0x0000, 0x0200, CRC(c9e9ed15) SHA1(624bbc10942a386040aef161b96d64021a842c9f) ) // 6341-1 - gfx: tank, truck, jeep motorcycle
	128	ROM_LOAD( "bd2.k4",      0x0200, 0x0200, CRC(c5a74df9) SHA1(2846a039e9bf372f3aa0b88ed89f9029eb7f797c) ) // 6341-1 - gfx: ambulance, stretcher, explosion
	129	ROM_LOAD( "bd1.d2",      0x0400, 0x0200, CRC(4fc10886) SHA1(b1c6f890994ba2182a4e7fc17582d6797dbd6ce9) ) // 6341-1 or 82s115
	130	ROM_LOAD( "bd1.e2",      0x0600, 0x0200, CRC(00179936) SHA1(e5417b8d3814dafe1278179b307a1b563a378cbe) ) // 6341-1 or 82s115
	131	ROM_LOAD( "bd2.e6",      0x0800, 0x0020, CRC(14b84564) SHA1(69cdd14e23094678c4b280f60cec963609181b00) ) // 82123
	132	ROM_LOAD( "bd2.e7",      0x0820, 0x0020, CRC(1bfb073f) SHA1(f6b26dcece71b2cf2ed4a537434edbe31cb10399) ) // 82123
	133	ROM_END
	134
	135	ROM_START( bazookabr )
	136	ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 )
	137
	138	ROM_REGION( 0x0840, "roms", ROMREGION_ERASE00 )
	139	ROM_LOAD( "1",           0x0000, 0x0200, CRC(edc34cb0) SHA1(f76a81833b015784e55b33189e9058cd24922f9b) )
	140	ROM_LOAD( "2",           0x0200, 0x0200, CRC(3e78e4c2) SHA1(814509eb773bfa87f1df933214f079e7dd2a8fa2) )
	141	ROM_LOAD( "3",           0x0400, 0x0200, CRC(4fc10886) SHA1(b1c6f890994ba2182a4e7fc17582d6797dbd6ce9) )
	142	ROM_LOAD( "4",           0x0600, 0x0200, CRC(00179936) SHA1(e5417b8d3814dafe1278179b307a1b563a378cbe) )
	143	ROM_LOAD( "bd2.e6",      0x0800, 0x0020, BAD_DUMP CRC(14b84564) SHA1(69cdd14e23094678c4b280f60cec963609181b00) ) // not dumped, taken from PSE set
	144	ROM_LOAD( "bd2.e7",      0x0820, 0x0020, BAD_DUMP CRC(1bfb073f) SHA1(f6b26dcece71b2cf2ed4a537434edbe31cb10399) ) // not dumped, taken from PSE set
	145	ROM_END
	146
124	147	ROM_START( dpatrol )
125	148	ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 )
126	149
r250251	r250252
168	191	ROM_END
169	192	*/
170	193
171
172		GAME( 1977, dpatrol, 0, pse, 0, driver_device, 0, ROT0, "Project Support Engineering", "Desert Patrol [TTL]", MACHINE_IS_SKELETON )
173		//GAME( 1976, knightar, 0, pse, 0, driver_device, 0, ROT0, "Project Support Engineering", "Knights in Armor [TTL]", MACHINE_IS_SKELETON )
174		//GAME( 1978, gametree, 0, pse, 0, driver_device, 0, ROT0, "Project Support Engineering", "Game Tree [TTL]", MACHINE_IS_SKELETON )
	194	GAME( 1976, bazooka,    0,       pse, 0, driver_device,  0, ROT0, "Project Support Engineering", "Bazooka [TTL]", MACHINE_IS_SKELETON )
	195	GAME( 1977, bazookabr,  bazooka, pse, 0, driver_device,  0, ROT0, "Taito do Brasil", "Bazooka (Brazil) [TTL]", MACHINE_IS_SKELETON )
	196	GAME( 1977, dpatrol,    0,       pse, 0, driver_device,  0, ROT0, "Project Support Engineering", "Desert Patrol [TTL]", MACHINE_IS_SKELETON )
	197	//GAME( 1976, knightar, 0,       pse, 0, driver_device,  0, ROT0, "Project Support Engineering", "Knights in Armor [TTL]", MACHINE_IS_SKELETON )
	198	//GAME( 1978, gametree, 0,       pse, 0, driver_device,  0, ROT0, "Project Support Engineering", "Game Tree [TTL]", MACHINE_IS_SKELETON )

trunk/src/mame/drivers/psikyo.cpp

r250251	r250252
1242	1242	ROM_END
1243	1243
1244	1244	ROM_START( sngkace )
1245
1246	1245	ROM_REGION( 0x100000, "maincpu", 0 )        /* Main CPU Code */
1247	1246	ROM_LOAD32_WORD_SWAP( "1-u127.bin", 0x000000, 0x040000, CRC(6c45b2f8) SHA1(08473297e174f3a6d67043f3b16f4e6b9c68b826) ) // 1&0
1248	1247	ROM_LOAD32_WORD_SWAP( "2-u126.bin", 0x000002, 0x040000, CRC(845a6760) SHA1(3b8fed294e28d9d8ef5cb5ec88b9ade396146a48) ) // 3&2
r250251	r250252
1262	1261
1263	1262	ROM_REGION( 0x040000, "spritelut", 0 )  /* Sprites LUT */
1264	1263	ROM_LOAD( "u11.bin",  0x000000, 0x040000, CRC(11a04d91) SHA1(5d146a9a39a70f2ee212ceab9a5469598432449e) ) // x1xxxxxxxxxxxxxxxx = 0xFF
	1264	ROM_END
1265	1265
	1266
	1267	ROM_START( sngkacea ) // the roms have a very visible "." symbol after the number, it might indicate a newer revision.
	1268	ROM_REGION( 0x100000, "maincpu", 0 )        /* Main CPU Code */
	1269	ROM_LOAD32_WORD_SWAP( "1.-u127.bin", 0x000000, 0x040000, CRC(3a43708d) SHA1(f38d22304f8957c6d81c8946a8a03676965d4dd4) ) // 1&0
	1270	ROM_LOAD32_WORD_SWAP( "2.-u126.bin", 0x000002, 0x040000, CRC(7aa50c46) SHA1(bad250f64c6d796a61be5e2eb71e2f5774f4278e) ) // 3&2
	1271
	1272	ROM_REGION( 0x020000, "audiocpu", 0 )       /* Sound CPU Code */
	1273	ROM_LOAD( "3-u58.bin", 0x00000, 0x20000, CRC(310f5c76) SHA1(dbfd1c5a7a514bccd89fc4f7191744cf76bb745d) )
	1274
	1275	ROM_REGION( 0x200000, "gfx1", 0 )   /* Sprites */
	1276	ROM_LOAD( "u14.bin",  0x000000, 0x200000, CRC(00a546cb) SHA1(30a8679b49928d5fcbe58b5eecc2ebd08173adf8) )
	1277
	1278	ROM_REGION( 0x200000, "gfx2", 0 )   /* Layers 0 + 1 */
	1279	ROM_LOAD( "u34.bin",  0x000000, 0x100000, CRC(e6a75bd8) SHA1(1aa84ea54584b6c8b2846194b48bf6d2afa67fee) )
	1280	ROM_LOAD( "u35.bin",  0x100000, 0x100000, CRC(c4ca0164) SHA1(c75422de2e0127cdc23d8c223b674a5bd85b00fb) )
	1281
	1282	ROM_REGION( 0x100000, "ymsnd", 0 )  /* Samples */
	1283	ROM_LOAD( "u68.bin",  0x000000, 0x100000, CRC(9a7f6c34) SHA1(c549b209bce1d2c6eeb512db198ad20c3f5fb0ea) )
	1284
	1285	ROM_REGION( 0x040000, "spritelut", 0 )  /* Sprites LUT */
	1286	ROM_LOAD( "u11.bin",  0x000000, 0x040000, CRC(11a04d91) SHA1(5d146a9a39a70f2ee212ceab9a5469598432449e) ) // x1xxxxxxxxxxxxxxxx = 0xFF
1266	1287	ROM_END
1267	1288
1268	1289
r250251	r250252
1992	2013
1993	2014	***************************************************************************/
1994	2015
1995		GAME( 1993, samuraia, 0,        sngkace,  samuraia, psikyo_state, sngkace,  ROT270, "Psikyo", "Samurai Aces (World)", MACHINE_SUPPORTS_SAVE ) // Banpresto?
1996		GAME( 1993, sngkace,  samuraia, sngkace,  sngkace, psikyo_state,  sngkace,  ROT270, "Psikyo", "Sengoku Ace (Japan)", MACHINE_SUPPORTS_SAVE ) // Banpresto?
	2016	GAME( 1993, samuraia,  0,        sngkace,  samuraia, psikyo_state, sngkace,  ROT270, "Psikyo", "Samurai Aces (World)", MACHINE_SUPPORTS_SAVE ) // Banpresto?
	2017	GAME( 1993, sngkace,   samuraia, sngkace,  sngkace, psikyo_state,  sngkace,  ROT270, "Psikyo", "Sengoku Ace (Japan, set 1)", MACHINE_SUPPORTS_SAVE ) // Banpresto?
	2018	GAME( 1993, sngkacea,  samuraia, sngkace,  sngkace, psikyo_state,  sngkace,  ROT270, "Psikyo", "Sengoku Ace (Japan, set 2)", MACHINE_SUPPORTS_SAVE ) // Banpresto?
1997	2019
1998	2020	GAME( 1994, gunbird,  0,        gunbird,  gunbird, psikyo_state,  gunbird,  ROT270, "Psikyo", "Gunbird (World)", MACHINE_SUPPORTS_SAVE )
1999	2021	GAME( 1994, gunbirdk, gunbird,  gunbird,  gunbirdj, psikyo_state, gunbird,  ROT270, "Psikyo", "Gunbird (Korea)", MACHINE_SUPPORTS_SAVE )

trunk/src/mame/drivers/psikyosh.cpp

r250251	r250252
703	703	PORT_START("INPUTS")
704	704	PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_COIN1 )
705	705	PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_COIN2 )
706
	706	PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_UNUSED )
	707	PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_UNUSED )
707	708	PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_SERVICE1 )
708	709	PORT_SERVICE_NO_TOGGLE( 0x00000020, IP_ACTIVE_LOW )
709	710	PORT_DIPNAME( 0x00000040, 0x00000040, "Tilt (Enables Debug Mode)" )     /* Debug stuff. Resets EEPROM? */
710	711	PORT_DIPSETTING(          0x00000040, DEF_STR( Off ) )
711	712	PORT_DIPSETTING(          0x00000000, DEF_STR( On ) )
712
	713	PORT_BIT( 0x00ffff80, IP_ACTIVE_LOW, IPT_UNUSED )
713	714	PORT_BIT( 0x01000000, IP_ACTIVE_LOW, IPT_START1 ) /* start for joystick */
	715	PORT_BIT( 0x02000000, IP_ACTIVE_LOW, IPT_UNUSED )
	716	PORT_BIT( 0x04000000, IP_ACTIVE_LOW, IPT_UNUSED )
714	717	PORT_BIT( 0x08000000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
715	718	PORT_BIT( 0x10000000, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
716	719	PORT_BIT( 0x20000000, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)

trunk/src/mame/drivers/shadfrce.cpp

r250251	r250252
571	571
572	572	/* Rom Defs. */
573	573
	574	// one of the high score tables in attract mode ends up corrupt on this set due to the game triggering a text dialog box, is this due to a timing error?
574	575	ROM_START( shadfrce )
575	576	ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
576		ROM_LOAD16_BYTE( "32a12-01.34", 0x00001, 0x40000, CRC(04501198) SHA1(50f981c13f9ed19d681d494376018ba86464ea13) ) /* US Version 2 */
577		ROM_LOAD16_BYTE( "32a13-01.26", 0x00000, 0x40000, CRC(b8f8a05c) SHA1(bd9d4218a7cf57b56aec1f7e710e02af8471f9d7) )
578		ROM_LOAD16_BYTE( "32a14-0.33",  0x80001, 0x40000, CRC(08279be9) SHA1(1833526b23feddb58b21874070ad2bf3b6be8dca) )
579		ROM_LOAD16_BYTE( "32a15-0.14",  0x80000, 0x40000, CRC(bfcadfea) SHA1(1caa9fc30d8622ce4c7221039c446e99cc8f5346) )
	577	ROM_LOAD16_BYTE( "32a12-011.34", 0x00001, 0x40000, CRC(0c041e08) SHA1(7b9d52cb1f6bc217c6e64287bd9630aa37243513) ) /* World Version 3 */
	578	ROM_LOAD16_BYTE( "32a13-010.26", 0x00000, 0x40000, CRC(00985361) SHA1(e9da1b096b25a6ee46bab6230dda66dccdd4bed8) )
	579	ROM_LOAD16_BYTE( "32a14-010.33", 0x80001, 0x40000, CRC(ea03ca25) SHA1(7af1ee7c36c70f80ba1e096473b5786b205ab00b) )
	580	ROM_LOAD16_BYTE( "32j15-01.14",  0x80000, 0x40000, CRC(3dc3a84a) SHA1(166ad91b93192d94e3f6d2fe6dde02f59d334f75) ) // matches Japan version 2, not US version 2
580	581
581	582	ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 Code */
582	583	ROM_LOAD( "32j10-0.42",  0x00000, 0x10000, CRC(65daf475) SHA1(7144332b2d17af8645e22e1926b33113db0d20e2) )
583	584
584	585	ROM_REGION( 0x020000, "chars", 0 ) /* Chars */
585		ROM_LOAD( "32a11-0.55",  0x00000, 0x20000, CRC(cfaf5e77) SHA1(eab76e085f695c74cc868aaf95f04ff2acf66ee9) )
	586	ROM_LOAD( "32j11-0.55",  0x00000, 0x20000, CRC(7252d993) SHA1(43f7de381841039aa290486aafb98e2cf3b8579b) )
586	587
587	588	ROM_REGION( 0xa00000, "sprites", 0 ) /* Sprite Tiles */
588	589	ROM_LOAD( "32j4-0.12",  0x000000, 0x200000, CRC(1ebea5b6) SHA1(35bd49dda9ad75326d45ffb10c87d83fc4f1b7a8) )
r250251	r250252
600	601	ROM_LOAD( "32j9-0.76",  0x000000, 0x080000, CRC(16001e81) SHA1(67928d2024f963aee91f1498b6f4c76101d2f3b8) )
601	602	ROM_END
602	603
603		ROM_START( shadfrcej )
	604	ROM_START( shadfrceu )
604	605	ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
605		ROM_LOAD16_BYTE( "32a12-011.34", 0x00001, 0x40000, CRC(0c041e08) SHA1(7b9d52cb1f6bc217c6e64287bd9630aa37243513) ) /* Japan Version 3 */
606		ROM_LOAD16_BYTE( "32a13-010.26", 0x00000, 0x40000, CRC(00985361) SHA1(e9da1b096b25a6ee46bab6230dda66dccdd4bed8) )
607		ROM_LOAD16_BYTE( "32a14-010.33", 0x80001, 0x40000, CRC(ea03ca25) SHA1(7af1ee7c36c70f80ba1e096473b5786b205ab00b) )
608		ROM_LOAD16_BYTE( "32j15-01.14",  0x80000, 0x40000, CRC(3dc3a84a) SHA1(166ad91b93192d94e3f6d2fe6dde02f59d334f75) )
	606	ROM_LOAD16_BYTE( "32a12-01.34", 0x00001, 0x40000, CRC(04501198) SHA1(50f981c13f9ed19d681d494376018ba86464ea13) ) /* US Version 2 */
	607	ROM_LOAD16_BYTE( "32a13-01.26", 0x00000, 0x40000, CRC(b8f8a05c) SHA1(bd9d4218a7cf57b56aec1f7e710e02af8471f9d7) )
	608	ROM_LOAD16_BYTE( "32a14-0.33",  0x80001, 0x40000, CRC(08279be9) SHA1(1833526b23feddb58b21874070ad2bf3b6be8dca) )
	609	ROM_LOAD16_BYTE( "32a15-0.14",  0x80000, 0x40000, CRC(bfcadfea) SHA1(1caa9fc30d8622ce4c7221039c446e99cc8f5346) )
609	610
610	611	ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 Code */
611	612	ROM_LOAD( "32j10-0.42",  0x00000, 0x10000, CRC(65daf475) SHA1(7144332b2d17af8645e22e1926b33113db0d20e2) )
612	613
613	614	ROM_REGION( 0x020000, "chars", 0 ) /* Chars */
614		ROM_LOAD( "32j11-0.55",  0x00000, 0x20000, CRC(7252d993) SHA1(43f7de381841039aa290486aafb98e2cf3b8579b) )
	615	ROM_LOAD( "32a11-0.55",  0x00000, 0x20000, CRC(cfaf5e77) SHA1(eab76e085f695c74cc868aaf95f04ff2acf66ee9) )
615	616
616	617	ROM_REGION( 0xa00000, "sprites", 0 ) /* Sprite Tiles */
617	618	ROM_LOAD( "32j4-0.12",  0x000000, 0x200000, CRC(1ebea5b6) SHA1(35bd49dda9ad75326d45ffb10c87d83fc4f1b7a8) )
r250251	r250252
629	630	ROM_LOAD( "32j9-0.76",  0x000000, 0x080000, CRC(16001e81) SHA1(67928d2024f963aee91f1498b6f4c76101d2f3b8) )
630	631	ROM_END
631	632
632		ROM_START( shadfrcejv2 )
	633	ROM_START( shadfrcej )
633	634	ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
634	635	ROM_LOAD16_BYTE( "32j12-01.34", 0x00001, 0x40000, CRC(38fdbe1d) SHA1(476d8ef2c0d2a8c568ce44631f93f8c730f91b08) ) /* Japan Version 2 */
635	636	ROM_LOAD16_BYTE( "32j13-01.26", 0x00000, 0x40000, CRC(6e1df6f1) SHA1(c165553fe967b437413dd7ddc87a267548dd0ca9) )
r250251	r250252
659	660	ROM_END
660	661
661	662
662		GAME( 1993, shadfrce,    0,        shadfrce, shadfrce, driver_device, 0, ROT0, "Technos Japan", "Shadow Force (US Version 2)", MACHINE_NO_COCKTAIL | MACHINE_SUPPORTS_SAVE )
663		GAME( 1993, shadfrcej,   shadfrce, shadfrce, shadfrce, driver_device, 0, ROT0, "Technos Japan", "Shadow Force (Japan Version 3)", MACHINE_NO_COCKTAIL | MACHINE_SUPPORTS_SAVE )
664		GAME( 1993, shadfrcejv2, shadfrce, shadfrce, shadfrce, driver_device, 0, ROT0, "Technos Japan", "Shadow Force (Japan Version 2)", MACHINE_NO_COCKTAIL | MACHINE_SUPPORTS_SAVE )
	663	GAME( 1993, shadfrce,   0,        shadfrce, shadfrce, driver_device, 0, ROT0, "Technos Japan", "Shadow Force (World, Version 3)", MACHINE_NO_COCKTAIL | MACHINE_SUPPORTS_SAVE )
	664	GAME( 1993, shadfrceu,  shadfrce, shadfrce, shadfrce, driver_device, 0, ROT0, "Technos Japan", "Shadow Force (US, Version 2)", MACHINE_NO_COCKTAIL | MACHINE_SUPPORTS_SAVE )
	665	GAME( 1993, shadfrcej,  shadfrce, shadfrce, shadfrce, driver_device, 0, ROT0, "Technos Japan", "Shadow Force (Japan, Version 2)", MACHINE_NO_COCKTAIL | MACHINE_SUPPORTS_SAVE )

trunk/src/mame/drivers/ssem.cpp

r250251	r250252
11	11	#include "cpu/ssem/ssem.h"
12	12	#include "imagedev/snapquik.h"
13	13
14		// for now, make buggy GCC/Mingw STFU about I64FMT
15		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
16		#pragma GCC diagnostic push
17		#pragma GCC diagnostic ignored "-Wformat"
18		#pragma GCC diagnostic ignored "-Wformat-extra-args"
19		#endif
20
21	14	class ssem_state : public driver_device
22	15	{
23	16	public:
r250251	r250252
649	642
650	643	/*   YEAR  NAME     PARENT    COMPAT   MACHINE  INPUT  INIT        COMPANY                       FULLNAME */
651	644	COMP(1948, ssem,    0,        0,       ssem,    ssem, driver_device,  0,   "Manchester University", "Small-Scale Experimental Machine (SSEM), 'Baby'", MACHINE_NO_SOUND_HW | MACHINE_SUPPORTS_SAVE )
652
653		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
654		#pragma GCC diagnostic pop
655		#endif

trunk/src/mame/drivers/taitottl.cpp

r250251	r250252
195	195	ROM_LOAD( "gn01.b9",     0x0000, 0x0800, CRC(69474a3a) SHA1(7396f1be991a0e6207eaa79e0206a5286a8d615d) )
196	196	ROM_END
197	197
198
199		ROM_START( bazooka )
200		ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 )
201
202		ROM_REGION( 0x0840, "roms", ROMREGION_ERASE00 )
203		ROM_LOAD( "bd2.k1",      0x0000, 0x0200, CRC(c9e9ed15) SHA1(624bbc10942a386040aef161b96d64021a842c9f) ) // 6341-1 - gfx: tank, truck, jeep motorcycle
204		ROM_LOAD( "bd2.k4",      0x0200, 0x0200, CRC(c5a74df9) SHA1(2846a039e9bf372f3aa0b88ed89f9029eb7f797c) ) // 6341-1 - gfx: ambulance, stretcher, explosion
205		ROM_LOAD( "bd1.d2",      0x0400, 0x0200, CRC(4fc10886) SHA1(b1c6f890994ba2182a4e7fc17582d6797dbd6ce9) ) // 6341-1 or 82s115
206		ROM_LOAD( "bd1.e2",      0x0600, 0x0200, CRC(00179936) SHA1(e5417b8d3814dafe1278179b307a1b563a378cbe) ) // 6341-1 or 82s115
207		ROM_LOAD( "bd2.e6",      0x0800, 0x0020, CRC(14b84564) SHA1(69cdd14e23094678c4b280f60cec963609181b00) ) // 82123
208		ROM_LOAD( "bd2.e7",      0x0820, 0x0020, CRC(1bfb073f) SHA1(f6b26dcece71b2cf2ed4a537434edbe31cb10399) ) // 82123
209		ROM_END
210
211
212		ROM_START( bazookabr )
213		ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 )
214
215		ROM_REGION( 0x0840, "roms", ROMREGION_ERASE00 )
216		ROM_LOAD( "1",           0x0000, 0x0200, CRC(edc34cb0) SHA1(f76a81833b015784e55b33189e9058cd24922f9b) )
217		ROM_LOAD( "2",           0x0200, 0x0200, CRC(3e78e4c2) SHA1(814509eb773bfa87f1df933214f079e7dd2a8fa2) )
218		ROM_LOAD( "3",           0x0400, 0x0200, CRC(4fc10886) SHA1(b1c6f890994ba2182a4e7fc17582d6797dbd6ce9) )
219		ROM_LOAD( "4",           0x0600, 0x0200, CRC(00179936) SHA1(e5417b8d3814dafe1278179b307a1b563a378cbe) )
220		ROM_LOAD( "bd2.e6",      0x0800, 0x0020, BAD_DUMP CRC(14b84564) SHA1(69cdd14e23094678c4b280f60cec963609181b00) ) // not dumped, taken from PSE set
221		ROM_LOAD( "bd2.e7",      0x0820, 0x0020, BAD_DUMP CRC(1bfb073f) SHA1(f6b26dcece71b2cf2ed4a537434edbe31cb10399) ) // not dumped, taken from PSE set
222		ROM_END
223
224
225	198	/*
226	199
227	200	Missile-X
r250251	r250252
279	252
280	253
281	254	GAME( 1977, gunman,    0,       taitottl, 0, driver_device,  0, ROT0, "Taito", "Gunman [TTL]", MACHINE_IS_SKELETON )
282		GAME( 1977, bazooka,   0,       taitottl, 0, driver_device,  0, ROT0, "Project Support Engineering", "Bazooka [TTL]", MACHINE_IS_SKELETON ) // clone of Taito Cross Fire - or is Cross Fire a clone of PSE Bazooka?
283		GAME( 1977, bazookabr, bazooka, taitottl, 0, driver_device,  0, ROT0, "Taito do Brasil", "Bazooka (Brazil) [TTL]", MACHINE_IS_SKELETON )
284	255	GAME( 1977, missilex,  0,       taitottl, 0, driver_device,  0, ROT0, "Taito", "Missile-X [TTL]", MACHINE_IS_SKELETON )
285	256	GAME( 1977, ttblock,   0,       taitottl, 0, driver_device,  0, ROT0, "Taito", "T.T. Block [TTL]", MACHINE_IS_SKELETON )
286	257	GAME( 1979, zzblock,   0,       taitottl, 0, driver_device,  0, ROT0, "Taito", "Zun Zun Block [TTL]", MACHINE_IS_SKELETON )

trunk/src/mame/includes/amstrad.h

r250251	r250252
31	31	#include "bus/cpc/hd20.h"
32	32	#include "bus/cpc/magicsound.h"
33	33	#include "bus/cpc/doubler.h"
	34	#include "bus/cpc/transtape.h"
34	35	#include "machine/ram.h"
35	36	#include "imagedev/cassette.h"
36	37	#include "bus/centronics/ctronics.h"

trunk/src/mame/includes/bbc.h

r250251	r250252
34	34
35	35	#define RS232_TAG       "rs232"
36	36
	37	enum machine_type_t
	38	{
	39	MODELA,
	40	MODELB,
	41	BPLUS,
	42	MASTER,
	43	COMPACT
	44	};
	45
37	46	class bbc_state : public driver_device
38	47	{
39	48	public:
r250251	r250252
41	50	driver_device(mconfig, type, tag),
42	51	m_maincpu(*this, "maincpu"),
43	52	m_ram(*this, RAM_TAG),
44		m_mc6845(*this, "mc6845"),
	53	m_hd6845(*this, "hd6845"),
45	54	m_adlc(*this, "mc6854"),
46	55	m_sn(*this, "sn76489"),
47	56	m_trom(*this, "saa5050"),
r250251	r250252
137	146	DECLARE_MACHINE_RESET(bbcm);
138	147	DECLARE_VIDEO_START(bbcm);
139	148
	149	DECLARE_MACHINE_START(bbcmc);
	150	DECLARE_MACHINE_RESET(bbcmc);
	151
140	152	DECLARE_PALETTE_INIT(bbc);
141	153	UINT32 screen_update_bbc(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
142	154	INTERRUPT_GEN_MEMBER(bbcb_vsync);
r250251	r250252
190	202	private:
191	203	required_device<cpu_device> m_maincpu;
192	204	required_device<ram_device> m_ram;
193		required_device<mc6845_device> m_mc6845;
	205	required_device<hd6845_device> m_hd6845;
194	206	optional_device<mc6854_device> m_adlc;
195	207	optional_device<sn76489_device> m_sn;
196	208	public: // HACK FOR MC6845
r250251	r250252
227	239
228	240	void check_interrupts();
229	241
	242	machine_type_t m_machinetype;
	243
230	244	bool m_os01;            // flag indicating whether OS 0.1 is being used
231	245	int m_SWRAMtype;        // this stores the DIP switch setting for the SWRAM type being used
232	246	int m_Speech;           // this stores the CONF setting for Speech enabled/disabled

trunk/src/mame/includes/chihiro.h

r250251	r250252
232	232	depthbuffer = NULL;
233	233	displayedtarget = NULL;
234	234	puller_channel = 0;
235		puller_subchannel = 0;
236	235	puller_waiting = 0;
237	236	debug_grab_texttype = -1;
238	237	debug_grab_textfile = NULL;
239		waitvblank_used = 0;
	238	waitvblank_used = 1;
240	239	memset(vertex_attribute_words, 0, sizeof(vertex_attribute_words));
241	240	memset(vertex_attribute_offset, 0, sizeof(vertex_attribute_offset));
242	241	}
r250251	r250252
254	253	int geforce_commandkind(UINT32 word);
255	254	UINT32 geforce_object_offset(UINT32 handle);
256	255	void geforce_read_dma_object(UINT32 handle, UINT32 &offset, UINT32 &size);
	256	void geforce_assign_object(address_space &space, UINT32 chanel, UINT32 subchannel, UINT32 address);
257	257	int geforce_exec_method(address_space &space, UINT32 channel, UINT32 subchannel, UINT32 method, UINT32 address, int &countlen);
258	258	UINT32 texture_get_texel(int number, int x, int y);
259		UINT8 *read_pixel(int x, int y, UINT32 c[4]);
	259	UINT8 *read_pixel(int x, int y, INT32 c[4]);
260	260	void write_pixel(int x, int y, UINT32 color, UINT32 depth);
261	261	void combiner_initialize_registers(UINT32 argb8[6]);
262	262	void combiner_initialize_stage(int stage_number);
r250251	r250252
496	496	int vertex_attribute_offset[16];
497	497	emu_timer *puller_timer;
498	498	int puller_channel;
499		int puller_subchannel;
500	499	int puller_waiting;
501	500	address_space *puller_space;
502	501	UINT32 dilated0[16][2048];
r250251	r250252
660	659	NV2A_RT_DEPTH_FORMAT_Z16 = 0x0001,
661	660	NV2A_RT_DEPTH_FORMAT_Z24S8 = 0x0002
662	661	};
663
664	662	enum NV2A_COLOR_FORMAT {
665		NV2A_COLOR_FORMAT_X1R5G6B5 = 0x0002,
666		NV2A_COLOR_FORMAT_R5G6B5 = 0x0003,
667		NV2A_COLOR_FORMAT_UNKNOWN4 = 0x0004,
668		NV2A_COLOR_FORMAT_X8R8G8B8 = 0x0005,
669		NV2A_COLOR_FORMAT_X1A7R8G8B8 = 0x0007,
670		NV2A_COLOR_FORMAT_A8R8G8B8 = 0x0008,
671		NV2A_COLOR_FORMAT_B8 = 0x0009,
672		NV2A_COLOR_FORMAT_G8B8 = 0x000a
	663	NV2A_COLOR_FORMAT_X1R5G5B5_Z1R5G5B5 = 1,
	664	NV2A_COLOR_FORMAT_X1R5G5B5_X1R5G5B5 = 2,
	665	NV2A_COLOR_FORMAT_R5G6B5 = 3,
	666	NV2A_COLOR_FORMAT_X8R8G8B8_Z8R8G8B8 = 4,
	667	NV2A_COLOR_FORMAT_X8R8G8B8_X8R8G8B8 = 5,
	668	NV2A_COLOR_FORMAT_X1A7R8G8B8_Z1A7R8G8B8 = 6,
	669	NV2A_COLOR_FORMAT_X1A7R8G8B8_X1A7R8G8B8 = 7,
	670	NV2A_COLOR_FORMAT_A8R8G8B8 = 8,
	671	NV2A_COLOR_FORMAT_B8 = 9,
	672	NV2A_COLOR_FORMAT_G8B8 = 10
673	673	};
674	674	};

trunk/src/mame/includes/fidelz80.h

r250251	r250252
2	2	// copyright-holders:Kevin Horton,Jonathan Gevaryahu,Sandro Ronco
3	3	/***************************************************************************
4	4
5		fidelz80.h
	5	Fidelity Electronics Z80 based board driver
6	6
7	7	****************************************************************************/
8	8
r250251	r250252
19	19	public:
20	20	fidelz80_state(const machine_config &mconfig, device_type type, const char *tag)
21	21	: driver_device(mconfig, type, tag),
22		m_maincpu(*this, "maincpu"),
23		m_speech(*this, "speech"),
24		m_beep(*this, "beeper"),
25		m_i8041(*this, "mcu"),
26		m_i8243(*this, "i8243")
27		{ }
	22	m_maincpu(*this, "maincpu"),
	23	m_speech(*this, "speech"),
	24	m_beep(*this, "beeper"),
	25	m_i8041(*this, "mcu"),
	26	m_i8243(*this, "i8243")
	27	{ }
28	28
29	29	required_device<cpu_device> m_maincpu;
30	30	optional_device<s14001a_device> m_speech;
r250251	r250252
32	32	optional_device<i8041_device> m_i8041;
33	33	optional_device<i8243_device> m_i8243;
34	34
35		UINT16 m_kp_matrix;         // keypad/leds matrix
36		UINT8 m_led_data;           // data for the two individual leds, in 0bxxxx12xx format
37		UINT8 m_led_selected;       // 5 bit selects for 7 seg leds and for common other leds, bits are (7seg leds are 0 1 2 3, common other leds are C) 0bxx3210xc
38		UINT16 m_digit_data;        // data for seg leds
	35	UINT16 m_kp_matrix;             // keypad/leds matrix
	36	UINT8 m_led_data;               // data for the two individual leds, in 0bxxxx12xx format
	37	UINT8 m_led_selected;           // 5 bit selects for 7 seg leds and for common other leds, bits are (7seg leds are 0 1 2 3, common other leds are C) 0bxx3210xc
	38	UINT16 m_digit_data;            // data for seg leds
39	39	UINT8 m_digit_line_status[4];   // prevent overwrite of m_digit_data
40	40
41		virtual void machine_reset();
42
43	41	//model VCC/UVC
44	42	void update_display();
45		DECLARE_READ8_MEMBER( fidelz80_portc_r );
46		DECLARE_WRITE8_MEMBER( fidelz80_portb_w );
47		DECLARE_WRITE8_MEMBER( fidelz80_portc_w );
48		DECLARE_WRITE8_MEMBER( cc10_porta_w );
49		DECLARE_READ8_MEMBER( vcc_portb_r );
50		DECLARE_WRITE8_MEMBER( vcc_porta_w );
	43	DECLARE_READ8_MEMBER(fidelz80_portc_r);
	44	DECLARE_WRITE8_MEMBER(fidelz80_portb_w);
	45	DECLARE_WRITE8_MEMBER(fidelz80_portc_w);
	46	DECLARE_WRITE8_MEMBER(cc10_porta_w);
	47	DECLARE_READ8_MEMBER(vcc_portb_r);
	48	DECLARE_WRITE8_MEMBER(vcc_porta_w);
51	49
52	50	//model 7014 and VBC
53		DECLARE_WRITE8_MEMBER(bridgec_speech_w );
	51	DECLARE_WRITE8_MEMBER(bridgec_speech_w);
54	52	DECLARE_WRITE8_MEMBER(kp_matrix_w);
55	53	DECLARE_READ8_MEMBER(unknown_r);
56	54	DECLARE_READ8_MEMBER(unknown2_r);
r250251	r250252
73	71	TIMER_DEVICE_CALLBACK_MEMBER(nmi_timer);
74	72
75	73	DECLARE_WRITE8_MEMBER(digit_w);
	74
	75	virtual void machine_start();
76	76	};
77	77
78	78

trunk/src/mame/includes/shadfrce.h

r250251	r250252
83	83
84	84	UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
85	85	void screen_eof(screen_device &screen, bool state);
86		void draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int y_offset );
	86	void draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect );
87	87	};

trunk/src/mame/layout/cmpacman.lay

r250251	r250252
47	47	<color red="1.0" green="0.5" blue="0.0" />
48	48	</rect>
49	49	<rect state="0">
50		<color red="0.15" green="0.075" blue="0.0" />
	50	<color red="0.5" green="0.25" blue="0.0" />
51	51	</rect>
52	52	<text string="TAKE">
53	53	<color red="0.0" green="0.0" blue="0.0" />
r250251	r250252
134	134	<color red="0.7" green="0.35" blue="0.0" />
135	135	</rect>
136	136	<rect state="0">
137		<color red="0.1" green="0.05" blue="0.0" />
	137	<color red="0.4" green="0.2" blue="0.0" />
138	138	</rect>
139	139	</element>
140	140

trunk/src/mame/machine/bbc.cpp

r250251	r250252
551	551	if ((offset>=0x200) && (offset<=0x2ff)) /* SHEILA */
552	552	{
553	553	myo = offset-0x200;
554		if ((myo>=0x00) && (myo<=0x06) && (myo+0x01) & 1) return m_mc6845->status_r(space, myo-0x00);                     /* Video controller */
555		if ((myo>=0x01) && (myo<=0x07) && (myo & 1))      return m_mc6845->register_r(space, myo-0x01);
	554	if ((myo>=0x00) && (myo<=0x06) && (myo+0x01) & 1) return m_hd6845->status_r(space, myo-0x00);                     /* Video controller */
	555	if ((myo>=0x01) && (myo<=0x07) && (myo & 1))      return m_hd6845->register_r(space, myo-0x01);
556	556	if ((myo>=0x08) && (myo<=0x0e) && (myo+0x01) & 1) return m_acia ? m_acia->status_r(space, myo-0x08) : 0xfe;       /* Serial controller */
557	557	if ((myo>=0x09) && (myo<=0x0f) && (myo & 1))      return m_acia ? m_acia->data_r(space, myo-0x09) : 0xfe;
558	558	if ((myo>=0x10) && (myo<=0x17))                   return 0xfe;                                                    /* Serial System Chip */
r250251	r250252
569	569	if ((myo>=0x60) && (myo<=0x7f))                   return m_via6522_1 ? m_via6522_1->read(space, myo-0x60) : 0xfe;
570	570	if ((myo>=0x80) && (myo<=0x9f))                   return 0xfe;
571	571	if ((myo>=0xa0) && (myo<=0xbf))                   return m_adlc ? m_adlc->read(space, myo & 0x03) : 0xfe;
572		if ((myo>=0xc0) && (myo<=0xdf))                   return 0xfe;
573		if ((myo>=0xe0) && (myo<=0xff))                   return 0xfe;
	572	if ((myo>=0xc0) && (myo<=0xdf))                   return 0xff;
	573	if ((myo>=0xe0) && (myo<=0xff))                   return 0xff;
574	574	}
575	575	return 0xfe;
576	576	}
r250251	r250252
582	582	if ((offset>=0x200) && (offset<=0x2ff)) /* SHEILA */
583	583	{
584	584	myo=offset-0x200;
585		if ((myo>=0x00) && (myo<=0x06) && (myo+0x01) & 1) m_mc6845->address_w(space, myo-0x00, data);                     /* Video Controller */
586		if ((myo>=0x01) && (myo<=0x07) && (myo & 1))      m_mc6845->register_w(space, myo-0x01, data);
	585	if ((myo>=0x00) && (myo<=0x06) && (myo+0x01) & 1) m_hd6845->address_w(space, myo-0x00, data);                     /* Video Controller */
	586	if ((myo>=0x01) && (myo<=0x07) && (myo & 1))      m_hd6845->register_w(space, myo-0x01, data);
587	587	if ((myo>=0x08) && (myo<=0x0e) && (myo+0x01) & 1) if (m_acia) m_acia->control_w(space, myo-0x08, data);           /* Serial controller */
588	588	if ((myo>=0x09) && (myo<=0x0f) && (myo & 1))      if (m_acia) m_acia->data_w(space, myo-0x09, data);
589	589	if ((myo>=0x10) && (myo<=0x17))                   bbc_SerialULA_w(space, myo-0x10, data);                         /* Serial System Chip */
r250251	r250252
893	893	}
894	894	break;
895	895	case 1:
896		if (m_rtc && m_MC146818_WR == 0)
	896	if (m_machinetype == MASTER && m_MC146818_WR == 0)
897	897	{
898	898	/* BBC Master has NVRAM Here */
899	899	m_MC146818_WR = 1;
r250251	r250252
911	911	}
912	912	break;
913	913	case 2:
914		if (m_rtc && m_MC146818_DS == 0)
	914	if (m_machinetype == MASTER && m_MC146818_DS == 0)
915	915	{
916	916	/* BBC Master has NVRAM Here */
917	917	m_MC146818_DS = 1;
r250251	r250252
976	976	}
977	977	break;
978	978	case 1:
979		if (m_rtc && m_MC146818_WR == 1)
	979	if (m_machinetype == MASTER && m_MC146818_WR == 1)
980	980	{
981	981	/* BBC Master has NVRAM Here */
982	982	m_MC146818_WR = 0;
r250251	r250252
994	994	}
995	995	break;
996	996	case 2:
997		if (m_rtc && m_MC146818_DS == 1)
	997	if (m_machinetype == MASTER && m_MC146818_DS == 1)
998	998	{
999	999	/* BBC Master has NVRAM Here */
1000	1000	m_MC146818_DS = 0;
r250251	r250252
1051	1051	}
1052	1052
1053	1053
1054		if (m_rtc)
	1054	if (m_machinetype == MASTER)
1055	1055	{
1056	1056	//set the Address Select
1057	1057	if (m_MC146818_AS != BIT(data,7))
r250251	r250252
1720	1720
1721	1721	MACHINE_START_MEMBER(bbc_state, bbca)
1722	1722	{
	1723	m_machinetype = MODELA;
1723	1724	bbc_setup_banks(m_bank4, 4, 0, 0x4000);
1724	1725	}
1725	1726
r250251	r250252
1749	1750
1750	1751	MACHINE_START_MEMBER(bbc_state, bbcb)
1751	1752	{
	1753	m_machinetype = MODELB;
1752	1754	m_mc6850_clock = 0;
1753	1755	bbc_setup_banks(m_bank4, 16, 0, 0x4000);
1754	1756	}
r250251	r250252
1771	1773
1772	1774	MACHINE_START_MEMBER(bbc_state, bbcbp)
1773	1775	{
	1776	m_machinetype = BPLUS;
1774	1777	m_mc6850_clock = 0;
1775	1778
1776	1779	m_maincpu->space(AS_PROGRAM).set_direct_update_handler(direct_update_delegate(FUNC(bbc_state::bbcbp_direct_handler), this));
r250251	r250252
1795	1798
1796	1799	MACHINE_START_MEMBER(bbc_state, bbcm)
1797	1800	{
	1801	m_machinetype = MASTER;
1798	1802	m_mc6850_clock = 0;
1799	1803
1800	1804	m_maincpu->space(AS_PROGRAM).set_direct_update_handler(direct_update_delegate(FUNC(bbc_state::bbcm_direct_handler), this));
r250251	r250252
1818	1822
1819	1823	bbcb_IC32_initialise(this);
1820	1824	}
	1825
	1826
	1827	MACHINE_START_MEMBER(bbc_state, bbcmc)
	1828	{
	1829	MACHINE_START_CALL_MEMBER(bbcm);
	1830
	1831	m_machinetype = COMPACT;
	1832	}
	1833
	1834	MACHINE_RESET_MEMBER(bbc_state, bbcmc)
	1835	{
	1836	MACHINE_RESET_CALL_MEMBER(bbcm);
	1837	}
		No newline at end of file

trunk/src/mame/machine/c65_old.cpp

r250251	r250252
1		// license:GPL-2.0+
2		// copyright-holders:Peter Trauner
3		/***************************************************************************
4		commodore c65 home computer
5		peter.trauner@jk.uni-linz.ac.at
6		documention
7		www.funet.fi
8		***************************************************************************/
9
10		#include "emu.h"
11
12		#include "includes/c65.h"
13		#include "cpu/m6502/m4510.h"
14		#include "sound/mos6581.h"
15		#include "machine/mos6526.h"
16		#include "bus/cbmiec/cbmiec.h"
17		#include "machine/ram.h"
18		#include "video/vic4567.h"
19		#include "imagedev/cassette.h"
20		#include "crsshair.h"
21		#include "formats/cbm_tap.h"
22
23		#define VERBOSE_LEVEL 0
24		#define DBG_LOG( MACHINE, N, M, A ) \
25		do { \
26		if(VERBOSE_LEVEL >= N) \
27		{ \
28		if( M ) \
29		logerror("%11.6f: %-24s", MACHINE.time().as_double(), (char*) M ); \
30		logerror A; \
31		} \
32		} while (0)
33
34
35
36		/***********************************************
37
38		Input Reading - Common Components
39
40		***********************************************/
41
42		/* These are needed by c64, c65 and c128, each machine has also additional specific
43		components in its INTERRUPT_GEN */
44
45		/* keyboard lines */
46		UINT8 c64_keyline[10];
47
48		void cbm_common_init(void)
49		{
50		int i;
51
52		for (i = 0; i < ARRAY_LENGTH(c64_keyline); i++)
53		c64_keyline[i] = 0xff;
54		}
55
56		static TIMER_CALLBACK( lightpen_tick )
57		{
58		if (((machine.root_device().ioport("CTRLSEL")->read() & 0x07) == 0x04) || ((machine.root_device().ioport("CTRLSEL")->read() & 0x07) == 0x06))
59		{
60		/* enable lightpen crosshair */
61		crosshair_set_screen(machine, 0, CROSSHAIR_SCREEN_ALL);
62		}
63		else
64		{
65		/* disable lightpen crosshair */
66		crosshair_set_screen(machine, 0, CROSSHAIR_SCREEN_NONE);
67		}
68		}
69
70		void cbm_common_interrupt( device_t *device )
71		{
72		int value, i;
73		int controller1 = device->machine().root_device().ioport("CTRLSEL")->read() & 0x07;
74		int controller2 = device->machine().root_device().ioport("CTRLSEL")->read() & 0x70;
75		static const char *const c64ports[] = { "ROW0", "ROW1", "ROW2", "ROW3", "ROW4", "ROW5", "ROW6", "ROW7" };
76
77		/* Lines 0-7 : common keyboard */
78		for (i = 0; i < 8; i++)
79		{
80		value = 0xff;
81		value &= ~device->machine().root_device().ioport(c64ports[i])->read();
82
83		/* Shift Lock is mapped on Left Shift */
84		if ((i == 1) && (device->machine().root_device().ioport("SPECIAL")->read() & 0x40))
85		value &= ~0x80;
86
87		c64_keyline[i] = value;
88		}
89
90
91		value = 0xff;
92		switch(controller1)
93		{
94		case 0x00:
95		value &= ~device->machine().root_device().ioport("JOY1_1B")->read();            /* Joy1 Directions + Button 1 */
96		break;
97
98		case 0x01:
99		if (device->machine().root_device().ioport("OTHER")->read() & 0x40)         /* Paddle2 Button */
100		value &= ~0x08;
101		if (device->machine().root_device().ioport("OTHER")->read() & 0x80)         /* Paddle1 Button */
102		value &= ~0x04;
103		break;
104
105		case 0x02:
106		if (device->machine().root_device().ioport("OTHER")->read() & 0x02)         /* Mouse Button Left */
107		value &= ~0x10;
108		if (device->machine().root_device().ioport("OTHER")->read() & 0x01)         /* Mouse Button Right */
109		value &= ~0x01;
110		break;
111
112		case 0x03:
113		value &= ~(device->machine().root_device().ioport("JOY1_2B")->read() & 0x1f);   /* Joy1 Directions + Button 1 */
114		break;
115
116		case 0x04:
117		/* was there any input on the lightpen? where is it mapped? */
118		//          if (device->machine().root_device().ioport("OTHER")->read() & 0x04)           /* Lightpen Signal */
119		//              value &= ?? ;
120		break;
121
122		case 0x07:
123		break;
124
125		default:
126		logerror("Invalid Controller 1 Setting %d\n", controller1);
127		break;
128		}
129
130		c64_keyline[8] = value;
131
132
133		value = 0xff;
134		switch(controller2)
135		{
136		case 0x00:
137		value &= ~device->machine().root_device().ioport("JOY2_1B")->read();            /* Joy2 Directions + Button 1 */
138		break;
139
140		case 0x10:
141		if (device->machine().root_device().ioport("OTHER")->read() & 0x10)         /* Paddle4 Button */
142		value &= ~0x08;
143		if (device->machine().root_device().ioport("OTHER")->read() & 0x20)         /* Paddle3 Button */
144		value &= ~0x04;
145		break;
146
147		case 0x20:
148		if (device->machine().root_device().ioport("OTHER")->read() & 0x02)         /* Mouse Button Left */
149		value &= ~0x10;
150		if (device->machine().root_device().ioport("OTHER")->read() & 0x01)         /* Mouse Button Right */
151		value &= ~0x01;
152		break;
153
154		case 0x30:
155		value &= ~(device->machine().root_device().ioport("JOY2_2B")->read() & 0x1f);   /* Joy2 Directions + Button 1 */
156		break;
157
158		case 0x40:
159		/* was there any input on the lightpen? where is it mapped? */
160		//          if (device->machine().root_device().ioport("OTHER")->read() & 0x04)           /* Lightpen Signal */
161		//              value &= ?? ;
162		break;
163
164		case 0x70:
165		break;
166
167		default:
168		logerror("Invalid Controller 2 Setting %d\n", controller2);
169		break;
170		}
171
172		c64_keyline[9] = value;
173
174		//  vic2_frame_interrupt does nothing so this is not necessary
175		//  vic2_frame_interrupt (device);
176
177		/* check if lightpen has been chosen as input: if so, enable crosshair */
178		device->machine().scheduler().timer_set(attotime::zero, FUNC(lightpen_tick));
179
180		set_led_status (device->machine(), 1, device->machine().root_device().ioport("SPECIAL")->read() & 0x40 ? 1 : 0);        /* Shift Lock */
181		set_led_status (device->machine(), 0, device->machine().root_device().ioport("CTRLSEL")->read() & 0x80 ? 1 : 0);        /* Joystick Swap */
182		}
183
184
185		/***********************************************
186
187		CIA Common Handlers
188
189		***********************************************/
190
191		/* These are shared by c64, c65 and c128. c65 and c128 also have additional specific
192		components (to select/read additional keyboard lines) */
193
194		/*
195		*  CIA 0 - Port A
196		* bits 7-0 keyboard line select
197		* bits 7,6: paddle select( 01 port a, 10 port b)
198		* bit 4: joystick a fire button
199		* bits 3,2: Paddles port a fire button
200		* bits 3-0: joystick a direction
201		*
202		*  CIA 0 - Port B
203		* bits 7-0: keyboard raw values
204		* bit 4: joystick b fire button, lightpen select
205		* bits 3,2: paddle b fire buttons (left,right)
206		* bits 3-0: joystick b direction
207		*
208		* flag cassette read input, serial request in
209		* irq to irq connected
210		*/
211
212		UINT8 cbm_common_cia0_port_a_r( device_t *device, UINT8 output_b )
213		{
214		UINT8 value = 0xff;
215
216		if (!(output_b & 0x80))
217		{
218		UINT8 t = 0xff;
219		if (!(c64_keyline[7] & 0x80)) t &= ~0x80;
220		if (!(c64_keyline[6] & 0x80)) t &= ~0x40;
221		if (!(c64_keyline[5] & 0x80)) t &= ~0x20;
222		if (!(c64_keyline[4] & 0x80)) t &= ~0x10;
223		if (!(c64_keyline[3] & 0x80)) t &= ~0x08;
224		if (!(c64_keyline[2] & 0x80)) t &= ~0x04;
225		if (!(c64_keyline[1] & 0x80)) t &= ~0x02;
226		if (!(c64_keyline[0] & 0x80)) t &= ~0x01;
227		value &= t;
228		}
229
230		if (!(output_b & 0x40))
231		{
232		UINT8 t = 0xff;
233		if (!(c64_keyline[7] & 0x40)) t &= ~0x80;
234		if (!(c64_keyline[6] & 0x40)) t &= ~0x40;
235		if (!(c64_keyline[5] & 0x40)) t &= ~0x20;
236		if (!(c64_keyline[4] & 0x40)) t &= ~0x10;
237		if (!(c64_keyline[3] & 0x40)) t &= ~0x08;
238		if (!(c64_keyline[2] & 0x40)) t &= ~0x04;
239		if (!(c64_keyline[1] & 0x40)) t &= ~0x02;
240		if (!(c64_keyline[0] & 0x40)) t &= ~0x01;
241		value &= t;
242		}
243
244		if (!(output_b & 0x20))
245		{
246		UINT8 t = 0xff;
247		if (!(c64_keyline[7] & 0x20)) t &= ~0x80;
248		if (!(c64_keyline[6] & 0x20)) t &= ~0x40;
249		if (!(c64_keyline[5] & 0x20)) t &= ~0x20;
250		if (!(c64_keyline[4] & 0x20)) t &= ~0x10;
251		if (!(c64_keyline[3] & 0x20)) t &= ~0x08;
252		if (!(c64_keyline[2] & 0x20)) t &= ~0x04;
253		if (!(c64_keyline[1] & 0x20)) t &= ~0x02;
254		if (!(c64_keyline[0] & 0x20)) t &= ~0x01;
255		value &= t;
256		}
257
258		if (!(output_b & 0x10))
259		{
260		UINT8 t = 0xff;
261		if (!(c64_keyline[7] & 0x10)) t &= ~0x80;
262		if (!(c64_keyline[6] & 0x10)) t &= ~0x40;
263		if (!(c64_keyline[5] & 0x10)) t &= ~0x20;
264		if (!(c64_keyline[4] & 0x10)) t &= ~0x10;
265		if (!(c64_keyline[3] & 0x10)) t &= ~0x08;
266		if (!(c64_keyline[2] & 0x10)) t &= ~0x04;
267		if (!(c64_keyline[1] & 0x10)) t &= ~0x02;
268		if (!(c64_keyline[0] & 0x10)) t &= ~0x01;
269		value &= t;
270		}
271
272		if (!(output_b & 0x08))
273		{
274		UINT8 t = 0xff;
275		if (!(c64_keyline[7] & 0x08)) t &= ~0x80;
276		if (!(c64_keyline[6] & 0x08)) t &= ~0x40;
277		if (!(c64_keyline[5] & 0x08)) t &= ~0x20;
278		if (!(c64_keyline[4] & 0x08)) t &= ~0x10;
279		if (!(c64_keyline[3] & 0x08)) t &= ~0x08;
280		if (!(c64_keyline[2] & 0x08)) t &= ~0x04;
281		if (!(c64_keyline[1] & 0x08)) t &= ~0x02;
282		if (!(c64_keyline[0] & 0x08)) t &= ~0x01;
283		value &= t;
284		}
285
286		if (!(output_b & 0x04))
287		{
288		UINT8 t = 0xff;
289		if (!(c64_keyline[7] & 0x04)) t &= ~0x80;
290		if (!(c64_keyline[6] & 0x04)) t &= ~0x40;
291		if (!(c64_keyline[5] & 0x04)) t &= ~0x20;
292		if (!(c64_keyline[4] & 0x04)) t &= ~0x10;
293		if (!(c64_keyline[3] & 0x04)) t &= ~0x08;
294		if (!(c64_keyline[2] & 0x04)) t &= ~0x04;
295		if (!(c64_keyline[1] & 0x04)) t &= ~0x02;
296		if (!(c64_keyline[0] & 0x04)) t &= ~0x01;
297		value &= t;
298		}
299
300		if (!(output_b & 0x02))
301		{
302		UINT8 t = 0xff;
303		if (!(c64_keyline[7] & 0x02)) t &= ~0x80;
304		if (!(c64_keyline[6] & 0x02)) t &= ~0x40;
305		if (!(c64_keyline[5] & 0x02)) t &= ~0x20;
306		if (!(c64_keyline[4] & 0x02)) t &= ~0x10;
307		if (!(c64_keyline[3] & 0x02)) t &= ~0x08;
308		if (!(c64_keyline[2] & 0x02)) t &= ~0x04;
309		if (!(c64_keyline[1] & 0x02)) t &= ~0x02;
310		if (!(c64_keyline[0] & 0x02)) t &= ~0x01;
311		value &= t;
312		}
313
314		if (!(output_b & 0x01))
315		{
316		UINT8 t = 0xff;
317		if (!(c64_keyline[7] & 0x01)) t &= ~0x80;
318		if (!(c64_keyline[6] & 0x01)) t &= ~0x40;
319		if (!(c64_keyline[5] & 0x01)) t &= ~0x20;
320		if (!(c64_keyline[4] & 0x01)) t &= ~0x10;
321		if (!(c64_keyline[3] & 0x01)) t &= ~0x08;
322		if (!(c64_keyline[2] & 0x01)) t &= ~0x04;
323		if (!(c64_keyline[1] & 0x01)) t &= ~0x02;
324		if (!(c64_keyline[0] & 0x01)) t &= ~0x01;
325		value &= t;
326		}
327
328		if ( device->machine().root_device().ioport("CTRLSEL")->read() & 0x80 )
329		value &= c64_keyline[8];
330		else
331		value &= c64_keyline[9];
332
333		return value;
334		}
335
336		UINT8 cbm_common_cia0_port_b_r( device_t *device, UINT8 output_a )
337		{
338		UINT8 value = 0xff;
339
340		if (!(output_a & 0x80)) value &= c64_keyline[7];
341		if (!(output_a & 0x40)) value &= c64_keyline[6];
342		if (!(output_a & 0x20)) value &= c64_keyline[5];
343		if (!(output_a & 0x10)) value &= c64_keyline[4];
344		if (!(output_a & 0x08)) value &= c64_keyline[3];
345		if (!(output_a & 0x04)) value &= c64_keyline[2];
346		if (!(output_a & 0x02)) value &= c64_keyline[1];
347		if (!(output_a & 0x01)) value &= c64_keyline[0];
348
349		if ( device->machine().root_device().ioport("CTRLSEL")->read() & 0x80 )
350		value &= c64_keyline[9];
351		else
352		value &= c64_keyline[8];
353
354		return value;
355		}
356
357
358		/***********************************************
359
360		CBM Cartridges
361
362		***********************************************/
363
364
365		/*  All the cartridge specific code has been moved
366		to machine/ drivers. Once more informations
367		surface about the cart expansions for systems
368		in c65.c, c128.c, cbmb.c and pet.c, the shared
369		code could be refactored to have here the
370		common functions                                */
371
372
373
374		/***********************************************
375
376		CBM Datasette Tapes
377
378		***********************************************/
379
380		#if 0
381		const cassette_interface cbm_cassette_interface =
382		{
383		cbm_cassette_formats,
384		NULL,
385		(cassette_state) (CASSETTE_STOPPED | CASSETTE_MOTOR_DISABLED | CASSETTE_SPEAKER_ENABLED),
386		NULL
387		};
388		#endif
389
390
391		/*UINT8 *c65_basic; */
392		/*UINT8 *c65_kernal; */
393		/*UINT8 *c65_dos; */
394		/*UINT8 *c65_monitor; */
395		/*UINT8 *c65_graphics; */
396
397
398		void c65_state::c65_nmi(  )
399		{
400		if (m_nmilevel != (ioport("SPECIAL")->read() & 0x80) || m_cia1_irq)   /* KEY_RESTORE */
401		{
402		m_maincpu->set_input_line(INPUT_LINE_NMI, (ioport("SPECIAL")->read() & 0x80) || m_cia1_irq);
403
404		m_nmilevel = (ioport("SPECIAL")->read() & 0x80) || m_cia1_irq;
405		}
406		}
407
408
409		/***********************************************
410
411		CIA Interfaces
412
413		***********************************************/
414
415		/*
416		*  CIA 0 - Port A keyboard line select
417		*  CIA 0 - Port B keyboard line read
418		*
419		*  flag cassette read input, serial request in
420		*  irq to irq connected
421		*
422		*  see machine/cbm.c
423		*/
424
425		READ8_MEMBER(c65_state::c65_cia0_port_a_r)
426		{
427		UINT8 cia0portb = m_cia0->pb_r(space, 0);
428
429		return cbm_common_cia0_port_a_r(m_cia0, cia0portb);
430		}
431
432		READ8_MEMBER(c65_state::c65_cia0_port_b_r)
433		{
434		UINT8 value = 0xff;
435		UINT8 cia0porta = m_cia0->pa_r(space, 0);
436
437		value &= cbm_common_cia0_port_b_r(m_cia0, cia0porta);
438
439		if (!(m_6511_port & 0x02))
440		value &= m_keyline;
441
442		return value;
443		}
444
445		WRITE8_MEMBER(c65_state::c65_cia0_port_b_w)
446		{
447		//  was there lightpen support in c65 video chip?
448		//  vic3_device *vic3 = machine().device<vic3_device>("vic3");
449		//  vic3->lightpen_write(data & 0x10);
450		}
451
452		void c65_state::c65_irq( int level )
453		{
454		if (level != m_old_level)
455		{
456		DBG_LOG(machine(), 3, "mos4510", ("irq %s\n", level ? "start" : "end"));
457		m_maincpu->set_input_line(M4510_IRQ_LINE, level);
458		m_old_level = level;
459		}
460		}
461
462		/* is this correct for c65 as well as c64? */
463		WRITE_LINE_MEMBER(c65_state::c65_cia0_interrupt)
464		{
465		m_cia0_irq = state;
466		c65_irq(state || m_vicirq);
467		}
468
469		/* is this correct for c65 as well as c64? */
470		WRITE_LINE_MEMBER(c65_state::c65_vic_interrupt)
471		{
472		#if 1
473		if (state != m_vicirq)
474		{
475		c65_irq (state || m_cia0_irq);
476		m_vicirq = state;
477		}
478		#endif
479		}
480
481		/*
482		* CIA 1 - Port A
483		* bit 7 serial bus data input
484		* bit 6 serial bus clock input
485		* bit 5 serial bus data output
486		* bit 4 serial bus clock output
487		* bit 3 serial bus atn output
488		* bit 2 rs232 data output
489		* bits 1-0 vic-chip system memory bank select
490		*
491		* CIA 1 - Port B
492		* bit 7 user rs232 data set ready
493		* bit 6 user rs232 clear to send
494		* bit 5 user
495		* bit 4 user rs232 carrier detect
496		* bit 3 user rs232 ring indicator
497		* bit 2 user rs232 data terminal ready
498		* bit 1 user rs232 request to send
499		* bit 0 user rs232 received data
500		*
501		* flag restore key or rs232 received data input
502		* irq to nmi connected ?
503		*/
504		READ8_MEMBER(c65_state::c65_cia1_port_a_r)
505		{
506		UINT8 value = 0xff;
507
508		if (!m_iec->clk_r())
509		value &= ~0x40;
510
511		if (!m_iec->data_r())
512		value &= ~0x80;
513
514		return value;
515		}
516
517		WRITE8_MEMBER(c65_state::c65_cia1_port_a_w)
518		{
519		static const int helper[4] = {0xc000, 0x8000, 0x4000, 0x0000};
520
521		m_iec->atn_w(!BIT(data, 3));
522		m_iec->clk_w(!BIT(data, 4));
523		m_iec->data_w(!BIT(data, 5));
524
525		m_vicaddr = m_memory + helper[data & 0x03];
526		}
527
528		WRITE_LINE_MEMBER(c65_state::c65_cia1_interrupt)
529		{
530		m_cia1_irq = state;
531		c65_nmi();
532		}
533
534		/***********************************************
535
536		Memory Handlers
537
538		***********************************************/
539
540		/* processor has only 1 mega address space !? */
541		/* and system 8 megabyte */
542		/* dma controller and bankswitch hardware ?*/
543		READ8_MEMBER( c65_state::c65_read_mem )
544		{
545		UINT8 result;
546		if (offset <= 0x0ffff)
547		result = m_memory[offset];
548		else
549		result = space.read_byte(offset);
550		return result;
551		}
552
553		WRITE8_MEMBER( c65_state::c65_write_mem )
554		{
555		if (offset <= 0x0ffff)
556		m_memory[offset] = data;
557		else
558		space.write_byte(offset, data);
559		}
560
561		/* dma chip at 0xd700
562		used:
563		writing banknumber to offset 2
564		writing hibyte to offset 1
565		writing lobyte to offset 0
566		cpu holded, dma transfer(data at address) executed, cpu activated
567
568		command data:
569		0 command (0 copy, 3 fill)
570		1,2 length
571		3,4,5 source
572		6,7,8 dest
573		9 subcommand
574		10 mod
575
576		version 1:
577		seldom copy (overlapping) from 0x402002 to 0x402008
578		(making place for new line in basic area)
579		for whats this bit 0x400000, or is this really the address?
580		maybe means add counter to address for access,
581		so allowing up or down copies, and reordering copies
582
583		version 2:
584		cmd 0x30 used for this
585		*/
586		void c65_state::c65_dma_port_w( int offset, int value )
587		{
588		PAIR pair, src, dst, len;
589		UINT8 cmd, fill;
590		int i;
591		address_space &space = m_maincpu->space(AS_PROGRAM);
592
593		switch (offset & 3)
594		{
595		case 2:
596		case 1:
597		m_dma.data[offset & 3] = value;
598		break;
599		case 0:
600		pair.b.h3 = 0;
601		pair.b.h2 = m_dma.data[2];
602		pair.b.h = m_dma.data[1];
603		pair.b.l = m_dma.data[0]=value;
604		cmd = c65_read_mem(space, pair.d++);
605		len.w.h = 0;
606		len.b.l = c65_read_mem(space, pair.d++);
607		len.b.h = c65_read_mem(space, pair.d++);
608		src.b.h3 = 0;
609		fill = src.b.l = c65_read_mem(space, pair.d++);
610		src.b.h = c65_read_mem(space, pair.d++);
611		src.b.h2 = c65_read_mem(space, pair.d++);
612		dst.b.h3 = 0;
613		dst.b.l = c65_read_mem(space, pair.d++);
614		dst.b.h = c65_read_mem(space, pair.d++);
615		dst.b.h2 = c65_read_mem(space, pair.d++);
616
617		switch (cmd)
618		{
619		case 0:
620		if (src.d == 0x3ffff) m_dump_dma = 1;
621		if (m_dump_dma)
622		DBG_LOG(space.machine(), 1,"dma copy job",
623		("len:%.4x src:%.6x dst:%.6x sub:%.2x modrm:%.2x\n",
624		len.w.l, src.d, dst.d, c65_read_mem(space, pair.d),
625		c65_read_mem(space, pair.d + 1) ) );
626		if ((m_dma.version == 1)
627		&& ( (src.d&0x400000) || (dst.d & 0x400000)))
628		{
629		if (!(src.d & 0x400000))
630		{
631		dst.d &= ~0x400000;
632		for (i = 0; i < len.w.l; i++)
633		c65_write_mem(space, dst.d--, c65_read_mem(space, src.d++));
634		}
635		else if (!(dst.d & 0x400000))
636		{
637		src.d &= ~0x400000;
638		for (i = 0; i < len.w.l; i++)
639		c65_write_mem(space, dst.d++, c65_read_mem(space, src.d--));
640		}
641		else
642		{
643		src.d &= ~0x400000;
644		dst.d &= ~0x400000;
645		for (i = 0; i < len.w.l; i++)
646		c65_write_mem(space, --dst.d, c65_read_mem(space, --src.d));
647		}
648		}
649		else
650		{
651		for (i = 0; i < len.w.l; i++)
652		c65_write_mem(space, dst.d++, c65_read_mem(space, src.d++));
653		}
654		break;
655		case 3:
656		DBG_LOG(space.machine(), 3,"dma fill job",
657		("len:%.4x value:%.2x dst:%.6x sub:%.2x modrm:%.2x\n",
658		len.w.l, fill, dst.d, c65_read_mem(space, pair.d),
659		c65_read_mem(space, pair.d + 1)));
660		for (i = 0; i < len.w.l; i++)
661		c65_write_mem(space, dst.d++, fill);
662		break;
663		case 0x30:
664		DBG_LOG(space.machine(), 1,"dma copy down",
665		("len:%.4x src:%.6x dst:%.6x sub:%.2x modrm:%.2x\n",
666		len.w.l, src.d, dst.d, c65_read_mem(space, pair.d),
667		c65_read_mem(space, pair.d + 1) ) );
668		for (i = 0; i < len.w.l; i++)
669		c65_write_mem(space, dst.d--,c65_read_mem(space, src.d--));
670		break;
671		default:
672		DBG_LOG(space.machine(), 1,"dma job",
673		("cmd:%.2x len:%.4x src:%.6x dst:%.6x sub:%.2x modrm:%.2x\n",
674		cmd,len.w.l, src.d, dst.d, c65_read_mem(space, pair.d),
675		c65_read_mem(space, pair.d + 1)));
676		}
677		break;
678		default:
679		DBG_LOG(space.machine(), 1, "dma chip write", ("%.3x %.2x\n", offset, value));
680		break;
681		}
682		}
683
684		int c65_state::c65_dma_port_r( int offset )
685		{
686		/* offset 3 bit 7 in progress ? */
687		DBG_LOG(machine(), 2, "dma chip read", ("%.3x\n", offset));
688		return 0x7f;
689		}
690
691		void c65_state::c65_6511_port_w( int offset, int value )
692		{
693		if (offset == 7)
694		{
695		m_6511_port = value;
696		}
697		DBG_LOG(machine(), 2, "r6511 write", ("%.2x %.2x\n", offset, value));
698		}
699
700		int c65_state::c65_6511_port_r( int offset )
701		{
702		int data = 0xff;
703
704		if (offset == 7)
705		{
706		if (ioport("SPECIAL")->read() & 0x20)
707		data &= ~1;
708		}
709		DBG_LOG(machine(), 2, "r6511 read", ("%.2x\n", offset));
710
711		return data;
712		}
713
714		/* one docu states custom 4191 disk controller
715		(for 2 1MB MFM disk drives, 1 internal, the other extern (optional) 1565
716		with integrated 512 byte buffer
717
718		0->0 reset ?
719
720		0->1, 0->0, wait until 2 positiv, 1->0 ???
721
722		0->0, 0 not 0 means no drive ???, other system entries
723
724
725		reg 0 write/read
726		0,1 written
727		bit 1 set
728		bit 2 set
729		bit 3 set
730		bit 4 set
731
732
733		reg 0 read
734		bit 0
735		bit 1
736		bit 2
737		0..2 ->$1d4
738
739		reg 1 write
740		$01 written
741		$18 written
742		$46 written
743		$80 written
744		$a1 written
745		$01 written, dec
746		$10 written
747
748		reg 2 read/write?(lsr)
749		bit 2
750		bit 4
751		bit 5 busy waiting until zero, then reading reg 7
752		bit 6 operation not activ flag!? or set overflow pin used
753		bit 7 busy flag?
754
755		reg 3 read/write?(rcr)
756		bit 1
757		bit 3
758		bit 7 busy flag?
759
760		reg 4
761		track??
762		0 written
763		read -> $1d2
764		cmp #$50
765		bcs
766
767
768		reg 5
769		sector ??
770		1 written
771		read -> $1d3
772		cmp #$b bcc
773
774
775		reg 6
776		head ??
777		0 written
778		read -> $1d1
779		cmp #2 bcc
780
781		reg 7 read
782		#4e written
783		12 times 0, a1 a1 a1 fe  written
784
785		reg 8 read
786		#ff written
787		16 times #ff written
788
789		reg 9
790		#60 written
791
792		might use the set overflow input
793
794		$21a6c 9a6c format
795		$21c97 9c97 write operation
796		$21ca0 9ca0 get byte?
797		$21cab 9cab read reg 7
798		$21caf 9caf write reg 7
799		$21cb3
800		*/
801
802		#define FDC_LOST 4
803		#define FDC_CRC 8
804		#define FDC_RNF 0x10
805		#define FDC_BUSY 0x80
806		#define FDC_IRQ 0x200
807
808		#define FDC_CMD_MOTOR_SPIN_UP 0x10
809
810		#if 0
811		void c65_state::c65_fdc_state(void)
812		{
813		switch (m_fdc.state)
814		{
815		case FDC_CMD_MOTOR_SPIN_UP:
816		if (machine().time() - m_fdc.time)
817		{
818		m_fdc.state = 0;
819		m_fdc.status &= ~FDC_BUSY;
820		}
821		break;
822		}
823		}
824		#endif
825
826		void c65_state::c65_fdc_w( int offset, int data )
827		{
828		DBG_LOG(machine(), 1, "fdc write", ("%.5x %.2x %.2x\n", machine().device("maincpu")->safe_pc(), offset, data));
829		switch (offset & 0xf)
830		{
831		case 0:
832		m_fdc.reg[0] = data;
833		break;
834		case 1:
835		m_fdc.reg[1] = data;
836		switch (data & 0xf9)
837		{
838		case 0x20: // wait for motor spin up
839		m_fdc.status &= ~(FDC_IRQ|FDC_LOST|FDC_CRC|FDC_RNF);
840		m_fdc.status |= FDC_BUSY;
841		m_fdc.time = machine().time();
842		m_fdc.state = FDC_CMD_MOTOR_SPIN_UP;
843		break;
844		case 0: // cancel
845		m_fdc.status &= ~(FDC_BUSY);
846		m_fdc.state = 0;
847		break;
848		case 0x80: // buffered write
849		case 0x40: // buffered read
850		case 0x81: // unbuffered write
851		case 0x41: // unbuffered read
852		case 0x30:case 0x31: // step
853		break;
854		}
855		break;
856		case 2: case 3: // read only
857		break;
858		case 4:
859		m_fdc.reg[offset & 0xf] = data;
860		m_fdc.track = data;
861		break;
862		case 5:
863		m_fdc.reg[offset & 0xf] = data;
864		m_fdc.sector = data;
865		break;
866		case 6:
867		m_fdc.reg[offset & 0xf] = data;
868		m_fdc.head = data;
869		break;
870		case 7:
871		m_fdc.buffer[m_fdc.cpu_pos++] = data;
872		break;
873		default:
874		m_fdc.reg[offset & 0xf] = data;
875		break;
876		}
877		}
878
879		int c65_state::c65_fdc_r( int offset )
880		{
881		UINT8 data = 0;
882		switch (offset & 0xf)
883		{
884		case 0:
885		data = m_fdc.reg[0];
886		break;
887		case 1:
888		data = m_fdc.reg[1];
889		break;
890		case 2:
891		data = m_fdc.status;
892		break;
893		case 3:
894		data = m_fdc.status >> 8;
895		break;
896		case 4:
897		data = m_fdc.track;
898		break;
899		case 5:
900		data = m_fdc.sector;
901		break;
902		case 6:
903		data = m_fdc.head;
904		break;
905		case 7:
906		data = m_fdc.buffer[m_fdc.cpu_pos++];
907		break;
908		default:
909		data = m_fdc.reg[offset & 0xf];
910		break;
911		}
912		DBG_LOG(machine(), 1, "fdc read", ("%.5x %.2x %.2x\n", machine().device("maincpu")->safe_pc(), offset, data));
913		return data;
914		}
915
916		/* version 1 ramcheck
917		write 0:0
918		read write read write 80000,90000,f0000
919		write 0:8
920		read write read write 80000,90000,f0000
921
922		version 2 ramcheck???
923		read 0:
924		write 0:0
925		read 0:
926		first read and second read bit 0x80 set --> nothing
927		write 0:0
928		read 0
929		write 0:ff
930		*/
931
932		READ8_MEMBER( c65_state::c65_ram_expansion_r )
933		{
934		UINT8 data = 0xff;
935		if (m_ram->size() > (128 * 1024))
936		data = m_expansion_ram.reg;
937		return data;
938		}
939
940		WRITE8_MEMBER( c65_state::c65_ram_expansion_w )
941		{
942		offs_t expansion_ram_begin;
943		offs_t expansion_ram_end;
944
945		if (m_ram->size() > (128 * 1024))
946		{
947		m_expansion_ram.reg = data;
948
949		expansion_ram_begin = 0x80000;
950		expansion_ram_end = 0x80000 + (m_ram->size() - 128*1024) - 1;
951
952		if (data == 0x00) {
953		space.install_readwrite_bank(expansion_ram_begin, expansion_ram_end,"bank16");
954		membank("bank16")->set_base(m_ram->pointer() + 128*1024);
955		} else {
956		space.nop_readwrite(expansion_ram_begin, expansion_ram_end);
957		}
958		}
959		}
960
961		WRITE8_MEMBER( c65_state::c65_write_io )
962		{
963		mos6581_device *sid_0 = machine().device<mos6581_device>("sid_r");
964		mos6581_device *sid_1 = machine().device<mos6581_device>("sid_l");
965		vic3_device *vic3 = machine().device<vic3_device>("vic3");
966
967		switch (offset & 0xf00)
968		{
969		case 0x000:
970		if (offset < 0x80)
971		vic3->port_w(space, offset & 0x7f, data);
972		else if (offset < 0xa0)
973		c65_fdc_w(offset & 0x1f, data);
974		else
975		{
976		c65_ram_expansion_w(space, offset & 0x1f, data, mem_mask);
977		/*ram expansion crtl optional */
978		}
979		break;
980		case 0x100:
981		case 0x200:
982		case 0x300:
983		vic3->palette_w(space, offset - 0x100, data);
984		break;
985		case 0x400:
986		if (offset<0x420) /* maybe 0x20 */
987		sid_0->write(space, offset & 0x3f, data);
988		else if (offset<0x440)
989		sid_1->write(space, offset & 0x3f, data);
990		else
991		DBG_LOG(machine(), 1, "io write", ("%.3x %.2x\n", offset, data));
992		break;
993		case 0x500:
994		DBG_LOG(machine(), 1, "io write", ("%.3x %.2x\n", offset, data));
995		break;
996		case 0x600:
997		c65_6511_port_w(offset & 0xff,data);
998		break;
999		case 0x700:
1000		c65_dma_port_w(offset & 0xff, data);
1001		break;
1002		}
1003		}
1004
1005		WRITE8_MEMBER( c65_state::c65_write_io_dc00 )
1006		{
1007		switch (offset & 0xf00)
1008		{
1009		case 0x000:
1010		m_cia0->write(space, offset, data);
1011		break;
1012		case 0x100:
1013		m_cia1->write(space, offset, data);
1014		break;
1015		case 0x200:
1016		case 0x300:
1017		DBG_LOG(machine(), 1, "io write", ("%.3x %.2x\n", offset+0xc00, data));
1018		break;
1019		}
1020		}
1021
1022		READ8_MEMBER( c65_state::c65_read_io )
1023		{
1024		mos6581_device *sid_0 = machine().device<mos6581_device>("sid_r");
1025		mos6581_device *sid_1 = machine().device<mos6581_device>("sid_l");
1026		vic3_device *vic3 = machine().device<vic3_device>("vic3");
1027
1028		switch (offset & 0xf00)
1029		{
1030		case 0x000:
1031		if (offset < 0x80)
1032		return vic3->port_r(space, offset & 0x7f);
1033		if (offset < 0xa0)
1034		return c65_fdc_r(offset & 0x1f);
1035		else
1036		{
1037		return c65_ram_expansion_r(space, offset & 0x1f, mem_mask);
1038		/*return; ram expansion crtl optional */
1039		}
1040		case 0x100:
1041		case 0x200:
1042		case 0x300:
1043		/* read only !? */
1044		DBG_LOG(machine(), 1, "io read", ("%.3x\n", offset));
1045		break;
1046		case 0x400:
1047		if (offset < 0x420)
1048		return sid_0->read(space, offset & 0x3f);
1049		if (offset < 0x440)
1050		return sid_1->read(space, offset & 0x3f);
1051		DBG_LOG(machine(), 1, "io read", ("%.3x\n", offset));
1052		break;
1053		case 0x500:
1054		DBG_LOG(machine(), 1, "io read", ("%.3x\n", offset));
1055		break;
1056		case 0x600:
1057		return c65_6511_port_r(offset&0xff);
1058		case 0x700:
1059		return c65_dma_port_r(offset&0xff);
1060		}
1061		return 0xff;
1062		}
1063
1064		READ8_MEMBER( c65_state::c65_read_io_dc00 )
1065		{
1066		switch (offset & 0x300)
1067		{
1068		case 0x000:
1069		return m_cia0->read(space, offset);
1070		case 0x100:
1071		return m_cia1->read(space, offset);
1072		case 0x200:
1073		case 0x300:
1074		DBG_LOG(machine(), 1, "io read", ("%.3x\n", offset+0xc00));
1075		break;
1076		}
1077		return 0xff;
1078		}
1079
1080
1081		/*
1082		d02f:
1083		init a5 96 written (seems to be switch to c65 or vic3 mode)
1084		go64 0 written
1085		*/
1086
1087		/* bit 1 external sync enable (genlock)
1088		bit 2 palette enable
1089		bit 6 vic3 c65 character set */
1090		WRITE8_MEMBER(c65_state::c65_bankswitch_interface)
1091		{
1092		DBG_LOG(machine(), 2, "c65 bankswitch", ("%.2x\n",data));
1093
1094		if (m_io_on)
1095		{
1096		if (data & 1)
1097		{
1098		membank("bank8")->set_base(m_colorram + 0x400);
1099		membank("bank9")->set_base(m_colorram + 0x400);
1100		m_maincpu->space(AS_PROGRAM).install_read_bank(0x0dc00, 0x0dfff, "bank8");
1101		m_maincpu->space(AS_PROGRAM).install_write_bank(0x0dc00, 0x0dfff, "bank9");
1102		}
1103		else
1104		{
1105		m_maincpu->space(AS_PROGRAM).install_read_handler(0x0dc00, 0x0dfff, read8_delegate(FUNC(c65_state::c65_read_io_dc00),this));
1106		m_maincpu->space(AS_PROGRAM).install_write_handler(0x0dc00, 0x0dfff, write8_delegate(FUNC(c65_state::c65_write_io_dc00),this));
1107		}
1108		}
1109
1110		m_io_dc00_on = !(data & 1);
1111		#if 0
1112		/* cartridge roms !?*/
1113		if (data & 0x08)
1114		membank("bank1")->set_base(m_roml);
1115		else
1116		membank("bank1")->set_base(m_memory + 0x8000);
1117
1118		if (data & 0x10)
1119		membank("bank2")->set_base(m_basic);
1120		else
1121		membank("bank2")->set_base(m_memory + 0xa000);
1122		#endif
1123		if ((m_old_value^data) & 0x20)
1124		{
1125		/* bankswitching faulty when doing actual page */
1126		if (data & 0x20)
1127		membank("bank3")->set_base(m_basic);
1128		else
1129		membank("bank3")->set_base(m_memory + 0xc000);
1130		}
1131		m_charset_select = data & 0x40;
1132		#if 0
1133		/* cartridge roms !?*/
1134		if (data & 0x80)
1135		membank("bank8")->set_base(m_kernal);
1136		else
1137		membank("bank6")->set_base(m_memory + 0xe000);
1138		#endif
1139		m_old_value = data;
1140		}
1141
1142		void c65_state::c65_bankswitch(  )
1143		{
1144		int data, loram, hiram, charen;
1145
1146		data = 0x00; // machine().device<m4510_device>("maincpu")->get_port();
1147		if (data == m_old_data)
1148		return;
1149
1150		DBG_LOG(machine(), 1, "bankswitch", ("%d\n", data & 7));
1151		loram = (data & 1) ? 1 : 0;
1152		hiram = (data & 2) ? 1 : 0;
1153		charen = (data & 4) ? 1 : 0;
1154
1155		if ((!m_game && m_exrom) || (loram && hiram && !m_exrom))
1156		membank("bank1")->set_base(m_roml);
1157		else
1158		membank("bank1")->set_base(m_memory + 0x8000);
1159
1160		if ((!m_game && m_exrom && hiram) || (!m_exrom))
1161		membank("bank2")->set_base(m_romh);
1162		else if (loram && hiram)
1163		membank("bank2")->set_base(m_basic);
1164		else
1165		membank("bank2")->set_base(m_memory + 0xa000);
1166
1167		if ((!m_game && m_exrom) || (charen && (loram || hiram)))
1168		{
1169		m_io_on = 1;
1170		membank("bank6")->set_base(m_colorram);
1171		membank("bank7")->set_base(m_colorram);
1172
1173		if (m_io_dc00_on)
1174		{
1175		m_maincpu->space(AS_PROGRAM).install_read_handler(0x0dc00, 0x0dfff, read8_delegate(FUNC(c65_state::c65_read_io_dc00),this));
1176		m_maincpu->space(AS_PROGRAM).install_write_handler(0x0dc00, 0x0dfff, write8_delegate(FUNC(c65_state::c65_write_io_dc00),this));
1177		}
1178		else
1179		{
1180		m_maincpu->space(AS_PROGRAM).install_read_bank(0x0dc00, 0x0dfff, "bank8");
1181		m_maincpu->space(AS_PROGRAM).install_write_bank(0x0dc00, 0x0dfff, "bank9");
1182		membank("bank8")->set_base(m_colorram + 0x400);
1183		membank("bank9")->set_base(m_colorram + 0x400);
1184		}
1185		m_maincpu->space(AS_PROGRAM).install_read_handler(0x0d000, 0x0d7ff, read8_delegate(FUNC(c65_state::c65_read_io),this));
1186		m_maincpu->space(AS_PROGRAM).install_write_handler(0x0d000, 0x0d7ff, write8_delegate(FUNC(c65_state::c65_write_io),this));
1187		}
1188		else
1189		{
1190		m_io_on = 0;
1191		membank("bank5")->set_base(m_memory + 0xd000);
1192		membank("bank7")->set_base(m_memory + 0xd800);
1193		membank("bank9")->set_base(m_memory + 0xdc00);
1194		if (!charen && (loram || hiram))
1195		{
1196		membank("bank4")->set_base(m_chargen);
1197		membank("bank6")->set_base(m_chargen + 0x800);
1198		membank("bank8")->set_base(m_chargen + 0xc00);
1199		}
1200		else
1201		{
1202		membank("bank4")->set_base(m_memory + 0xd000);
1203		membank("bank6")->set_base(m_memory + 0xd800);
1204		membank("bank8")->set_base(m_memory + 0xdc00);
1205		}
1206		m_maincpu->space(AS_PROGRAM).install_read_bank(0x0d000, 0x0d7ff, "bank4");
1207		m_maincpu->space(AS_PROGRAM).install_write_bank(0x0d000, 0x0d7ff, "bank5");
1208		}
1209
1210		if (!m_game && m_exrom)
1211		{
1212		membank("bank10")->set_base(m_romh);
1213		}
1214		else
1215		{
1216		if (hiram)
1217		{
1218		membank("bank10")->set_base(m_kernal);
1219		}
1220		else
1221		{
1222		membank("bank10")->set_base(m_memory + 0xe000);
1223		}
1224		}
1225		m_old_data = data;
1226		}
1227
1228		#ifdef UNUSED_FUNCTION
1229		void c65_state::c65_colorram_write( int offset, int value )
1230		{
1231		m_colorram[offset & 0x7ff] = value | 0xf0;
1232		}
1233		#endif
1234
1235		/*
1236		* only 14 address lines
1237		* a15 and a14 portlines
1238		* 0x1000-0x1fff, 0x9000-0x9fff char rom
1239		*/
1240		READ8_MEMBER(c65_state::c65_dma_read)
1241		{
1242		if (!m_game && m_exrom)
1243		{
1244		if (offset < 0x3000)
1245		return m_memory[offset];
1246		return m_romh[offset & 0x1fff];
1247		}
1248		if ((m_vicaddr == m_memory) || (m_vicaddr == m_memory + 0x8000))
1249		{
1250		if (offset < 0x1000)
1251		return m_vicaddr[offset & 0x3fff];
1252		if (offset < 0x2000) {
1253		if (m_charset_select)
1254		return m_chargen[offset & 0xfff];
1255		else
1256		return m_chargen[offset & 0xfff];
1257		}
1258		return m_vicaddr[offset & 0x3fff];
1259		}
1260		return m_vicaddr[offset & 0x3fff];
1261		}
1262
1263		READ8_MEMBER(c65_state::c65_dma_read_color)
1264		{
1265		if (m_c64mode)
1266		return m_colorram[offset & 0x3ff] & 0xf;
1267		return m_colorram[offset & 0x7ff];
1268		}
1269
1270		void c65_state::c65_common_driver_init(  )
1271		{
1272		m_memory = auto_alloc_array_clear(machine(), UINT8, 0x10000);
1273		membank("bank11")->set_base(m_memory + 0x00000);
1274		membank("bank12")->set_base(m_memory + 0x08000);
1275		membank("bank13")->set_base(m_memory + 0x0a000);
1276		membank("bank14")->set_base(m_memory + 0x0c000);
1277		membank("bank15")->set_base(m_memory + 0x0e000);
1278
1279		cbm_common_init();
1280		m_keyline = 0xff;
1281
1282		m_pal = 0;
1283		m_charset_select = 0;
1284		m_6511_port = 0xff;
1285		m_vicirq = 0;
1286		m_old_data = -1;
1287
1288		/* C65 had no datasette port */
1289		m_tape_on = 0;
1290		m_game = 1;
1291		m_exrom = 1;
1292
1293		/*memset(m_memory + 0x40000, 0, 0x800000 - 0x40000); */
1294		}
1295
1296		DRIVER_INIT_MEMBER(c65_state,c65)
1297		{
1298		m_dma.version = 2;
1299		c65_common_driver_init();
1300		}
1301
1302		DRIVER_INIT_MEMBER(c65_state,c65pal)
1303		{
1304		m_dma.version = 1;
1305		c65_common_driver_init();
1306		m_pal = 1;
1307		}
1308
1309		MACHINE_START_MEMBER(c65_state,c65)
1310		{
1311		/* clear upper memory */
1312		memset(m_ram->pointer() + 128*1024, 0xff, m_ram->size() -  128*1024);
1313
1314		//removed   cbm_drive_0_config (SERIAL, 10);
1315		//removed   cbm_drive_1_config (SERIAL, 11);
1316		m_vicaddr = m_memory;
1317
1318		m_c64mode = 0;
1319
1320		c65_bankswitch_interface(m_maincpu->space(AS_PROGRAM),0,0xff);
1321		c65_bankswitch();
1322		}
1323
1324
1325		INTERRUPT_GEN_MEMBER(c65_state::c65_frame_interrupt)
1326		{
1327		int value;
1328
1329		c65_nmi();
1330
1331		/* common keys input ports */
1332		cbm_common_interrupt(&device);
1333
1334		/* c65 specific: function keys input ports */
1335		value = 0xff;
1336
1337		value &= ~ioport("FUNCT")->read();
1338		m_keyline = value;
1339		}

trunk/src/mame/machine/dc.cpp

r250251	r250252
14	14	#include "machine/naomig1.h"
15	15	#include "video/powervr2.h"
16	16
17		// for now, make buggy GCC/Mingw STFU about I64FMT
18		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
19		#pragma GCC diagnostic push
20		#pragma GCC diagnostic ignored "-Wformat"
21		#pragma GCC diagnostic ignored "-Wformat-extra-args"
22		#endif
23
24	17	#define DEBUG_REGISTERS (1)
25	18
26	19	#if DEBUG_REGISTERS
r250251	r250252
729	722	{
730	723	m_powervr2->pvr_scanline_timer(param);
731	724	}
732		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
733		#pragma GCC diagnostic pop
734		#endif

trunk/src/mame/machine/naomim2.cpp

r250251	r250252
11	11
12	12	NAOMI_ROM_OFFSET bit29: ROM size/mapping selection, 0 - 4MB ROM mode, 1 - 8MB ROM mode
13	13
	14	bit28: Bank selection.
	15	in the case of flash-based 171-7885A ROM boards two of them can be stacked at once
	16	onto main board. each must be configured as Bank 0 or 1 via some (currently unknown) jumper.
	17	this bit selects which one ROM board will be accessed.
	18
14	19	note: if ROM is not mounted its area readed as 0xFF
15	20
16	21	8MB ROM mode:
r250251	r250252
166	171	void naomi_m2_board::board_write(offs_t offset, UINT16 data)
167	172	{
168	173	if(offset & 0x40000000) {
169		if((offset & 0x0f000000) == 0x02000000) {
	174	if(offset & 0x00020000) {
170	175	offset &= RAM_SIZE-1;
171	176	ram[offset] = data;
172	177	ram[offset+1] = data >> 8;
173	178	return;
174	179	}
175		switch(offset & 0x1fffffff) {
	180	switch(offset & 0x1ffff) {
176	181	case 0x1fff8: m_cryptdevice->set_addr_low(data); return;
177	182	case 0x1fffa: m_cryptdevice->set_addr_high(data);  return;
178	183	case 0x1fffc: m_cryptdevice->set_subkey(data); return;

trunk/src/mame/machine/xbox.cpp

r250251	r250252
16	16	#include "includes/chihiro.h"
17	17	#include "includes/xbox.h"
18	18
19		// for now, make buggy GCC/Mingw STFU about I64FMT
20		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
21		#pragma GCC diagnostic push
22		#pragma GCC diagnostic ignored "-Wformat"
23		#pragma GCC diagnostic ignored "-Wformat-extra-args"
24		#endif
25
26	19	#define LOG_PCI
27	20	//#define LOG_OHCI
28	21	//#define USB_ENABLED
r250251	r250252
1197	1190	static void hubintiasbridg_pci_w(device_t *busdevice, device_t *device, int function, int reg, UINT32 data, UINT32 mem_mask)
1198	1191	{
1199	1192	#ifdef LOG_PCI
1200		if (reg >= 16) device->logerror("  bus:0 function:%d register:%d data:%08X mask:%08X\n", function, reg, data, mem_mask);
	1193	if (reg >= 16) busdevice->logerror("  bus:0 function:%d register:%d data:%08X mask:%08X\n", function, reg, data, mem_mask);
1201	1194	#endif
1202	1195	}
1203	1196
r250251	r250252
1216	1209	static void dummy_pci_w(device_t *busdevice, device_t *device, int function, int reg, UINT32 data, UINT32 mem_mask)
1217	1210	{
1218	1211	#ifdef LOG_PCI
1219		if (reg >= 16) device->logerror("  bus:0 function:%d register:%d data:%08X mask:%08X\n", function, reg, data, mem_mask);
	1212	if (reg >= 16) busdevice->logerror("  bus:0 function:%d register:%d data:%08X mask:%08X\n", function, reg, data, mem_mask);
1220	1213	#endif
1221	1214	}
1222	1215
r250251	r250252
1536	1529	MCFG_SCREEN_UPDATE_DRIVER(xbox_base_state, screen_update_callback)
1537	1530	MCFG_SCREEN_VBLANK_DRIVER(xbox_base_state, vblank_callback)
1538	1531	MACHINE_CONFIG_END
1539
1540		#if (defined(__MINGW32__) && (__GNUC__ >= 5))
1541		#pragma GCC diagnostic pop
1542		#endif

trunk/src/mame/video/bbc.cpp

r250251	r250252
76	76	if (BIT(ma,13))
77	77	{
78	78	// IC 10 and IC 11
79		m = ((ma&0x3ff) | 0x3c00) | ((s&0x8)<<11);
	79	m = ((ma & 0x3ff) | 0x3c00) | ((s & 0x8)<<11);
80	80	} else {
81	81	// IC 8 and IC 9
82		m = ((ma&0xff)<<3) | (s<<11) | (ra&0x7);
	82	m = ((ma & 0xff)<<3) | (s<<11) | (ra & 0x7);
83	83	}
84	84	if (m_memorySize == 16)
85	85	return  m & 0x3fff;
r250251	r250252
144	144	// Set the control register in the Video ULA
145	145	case 0:
146	146	m_videoULA_Reg = data;
147		m_videoULA_master_cursor_size     = (m_videoULA_Reg>>7)&0x01;
	147	m_videoULA_master_cursor_size     = BIT(m_videoULA_Reg,7);
148	148	m_videoULA_width_of_cursor        = (m_videoULA_Reg>>5)&0x03;
149		m_videoULA_6845_clock_rate        = (m_videoULA_Reg>>4)&0x01;
	149	m_videoULA_6845_clock_rate        = BIT(m_videoULA_Reg,4);
150	150	m_videoULA_characters_per_line    = (m_videoULA_Reg>>2)&0x03;
151		m_videoULA_teletext_normal_select = (m_videoULA_Reg>>1)&0x01;
152		m_videoULA_flash_colour_select    =  m_videoULA_Reg    &0x01;
	151	m_videoULA_teletext_normal_select = BIT(m_videoULA_Reg,1);
	152	m_videoULA_flash_colour_select    = BIT(m_videoULA_Reg,0);
153	153
154	154	m_videoULA_palette_lookup = m_videoULA_flash_colour_select ? m_videoULA_palette0 : m_videoULA_palette1;
155	155
r250251	r250252
161	161	else
162	162	m_pixels_per_byte = pixels_per_byte_set[m_videoULA_characters_per_line | (m_videoULA_6845_clock_rate<<2)];
163	163
164		m_mc6845->set_hpixels_per_column(m_pixels_per_byte);
	164	m_hd6845->set_hpixels_per_column(m_pixels_per_byte);
165	165	if (m_videoULA_6845_clock_rate)
166		m_mc6845->set_clock(XTAL_16MHz/8);
	166	m_hd6845->set_clock(XTAL_16MHz/8);
167	167	else
168		m_mc6845->set_clock(XTAL_16MHz/16);
	168	m_hd6845->set_clock(XTAL_16MHz/16);
169	169	break;
170	170	// Set a palette register in the Video ULA
171	171	case 1:
172		int tpal = (data >> 4)&0x0f;
173		int tcol = data&0x0f;
	172	int tpal = (data >> 4) & 0x0f;
	173	int tcol = data & 0x0f;
174	174	m_videoULA_palette0[tpal] = tcol;
175	175	m_videoULA_palette1[tpal] = tcol<8 ? tcol : tcol^7;
176	176	break;
r250251	r250252
226	226	bitmap.pix32(y, (x_pos*m_pixels_per_byte)+pixelno) = rgb;
227	227	}
228	228	}
229
230		if (ra == 18)
231		{
232		m_trom->lose_w(1);
233		m_trom->lose_w(0);
234		}
235	229	}
236	230	else
237	231	{

trunk/src/mame/video/chihiro.cpp

r250251	r250252
1240	1240	}
1241	1241	}
1242	1242
1243		inline UINT8 *nv2a_renderer::read_pixel(int x, int y, UINT32 c[4])
	1243	inline UINT8 *nv2a_renderer::read_pixel(int x, int y, INT32 c[4])
1244	1244	{
1245	1245	UINT32 offset;
1246	1246	UINT32 color;
r250251	r250252
1261	1261	c[1] = pal6bit((color & 0x07e0) >> 5);
1262	1262	c[0] = pal5bit(color & 0x1f);
1263	1263	return (UINT8 *)addr16;
1264		case NV2A_COLOR_FORMAT_UNKNOWN4:
1265		case NV2A_COLOR_FORMAT_X8R8G8B8:
	1264	case NV2A_COLOR_FORMAT_X8R8G8B8_Z8R8G8B8:
	1265	case NV2A_COLOR_FORMAT_X8R8G8B8_X8R8G8B8:
1266	1266	addr = (UINT32 *)((UINT8 *)rendertarget + offset);
1267	1267	color = *addr;
1268	1268
r250251	r250252
1295	1295	UINT32 *daddr32;
1296	1296	UINT16 *daddr16;
1297	1297	UINT32 deptsten;
1298		UINT32 c[4], fb[4], s[4], d[4], cc[4];
	1298	INT32 c[4], fb[4], s[4], d[4], cc[4];
1299	1299	UINT32 dep, sten, stenc, stenv;
1300	1300	bool stencil_passed;
1301	1301	bool depth_passed;
r250251	r250252
1854	1854	if (color_mask != 0) {
1855	1855	UINT32 ct,ft,w;
1856	1856
1857		ct = (c[3] << 24) | (c[2] << 16) | (c[1] << 8) | c[0];
1858		ft = (fb[3] << 24) | (fb[2] << 16) | (fb[1] << 8) | fb[0];
	1857	ct = ((UINT32)c[3] << 24) | ((UINT32)c[2] << 16) | ((UINT32)c[1] << 8) | (UINT32)c[0];
	1858	ft = ((UINT32)fb[3] << 24) | ((UINT32)fb[2] << 16) | ((UINT32)fb[1] << 8) | (UINT32)fb[0];
1859	1859	w = (ft & ~color_mask) | (ct & color_mask);
1860	1860	switch (colorformat_rendertarget) {
1861	1861	case NV2A_COLOR_FORMAT_R5G6B5:
1862	1862	w = ((w >> 8) & 0xf800) + ((w >> 5) & 0x7e0) + ((w >> 3) & 0x1f);
1863	1863	*((UINT16 *)addr) = (UINT16)w;
1864	1864	break;
1865		case NV2A_COLOR_FORMAT_UNKNOWN4:
1866		case NV2A_COLOR_FORMAT_X8R8G8B8:
	1865	case NV2A_COLOR_FORMAT_X8R8G8B8_Z8R8G8B8:
	1866	case NV2A_COLOR_FORMAT_X8R8G8B8_X8R8G8B8:
1867	1867	*((UINT32 *)addr) = w;
1868	1868	break;
1869	1869	case NV2A_COLOR_FORMAT_A8R8G8B8:
r250251	r250252
2862	2862	m = 1;
2863	2863	// possible buffers: color, depth, stencil
2864	2864	// clear framebuffer
2865		if (data & 0xf0) {
	2865	if ((data & 0xf0) == 0xf0) {
2866	2866	if (bytespixel_rendertarget == 4) {
2867	2867	bitmap_rgb32 bm(rendertarget, (limits_rendertarget.right() + 1) * m, (limits_rendertarget.bottom() + 1) * m, pitch_rendertarget / 4);
2868	2868
r250251	r250252
2913	2913	case NV2A_COLOR_FORMAT_R5G6B5:
2914	2914	bytespixel_rendertarget = 2;
2915	2915	break;
2916		case NV2A_COLOR_FORMAT_UNKNOWN4:
2917		case NV2A_COLOR_FORMAT_X8R8G8B8:
	2916	case NV2A_COLOR_FORMAT_X8R8G8B8_Z8R8G8B8:
	2917	case NV2A_COLOR_FORMAT_X8R8G8B8_X8R8G8B8:
2918	2918	case NV2A_COLOR_FORMAT_A8R8G8B8:
2919	2919	bytespixel_rendertarget = 4;
2920	2920	break;
r250251	r250252
4018	4018	return 0;
4019	4019	}
4020	4020
	4021	void nv2a_renderer::geforce_assign_object(address_space & space, UINT32 chanel, UINT32 subchannel, UINT32 address)
	4022	{
	4023	int handle, objclass;
	4024
	4025	handle = space.read_dword(address);
	4026	handle = geforce_object_offset(handle);
	4027	#ifdef LOG_NV2A
	4028	machine().logerror("  assign to subchannel %d object at %d", subch, handle);
	4029	#endif
	4030	channel[chanel][subchannel].object.objhandle = handle;
	4031	handle = ramin[handle / 4];
	4032	objclass = handle & 0xff;
	4033	#ifdef LOG_NV2A
	4034	machine().logerror(" class %03X\n", objclass);
	4035	#endif
	4036	channel[chanel][subchannel].object.objclass = objclass;
	4037	}
	4038
4021	4039	TIMER_CALLBACK_MEMBER(nv2a_renderer::puller_timer_work)
4022	4040	{
4023		int chanel, subchannel;
4024		int method, count, handle, objclass;
	4041	int chanel;
	4042	int method, count;
4025	4043	UINT32 *dmaput, *dmaget;
4026	4044	UINT32 cmd, cmdtype;
4027	4045	int countlen;
r250251	r250252
4030	4048	UINT32 subch;
4031	4049
4032	4050	chanel = puller_channel;
4033		subchannel = puller_subchannel;
4034		dmaput = &channel[chanel][subchannel].regs[0x40 / 4];
4035		dmaget = &channel[chanel][subchannel].regs[0x44 / 4];
	4051	dmaput = &channel[chanel][0].regs[0x40 / 4];
	4052	dmaget = &channel[chanel][0].regs[0x44 / 4];
4036	4053	while (*dmaget != *dmaput) {
4037	4054	cmd = space->read_dword(*dmaget);
4038	4055	*dmaget += 4;
r250251	r250252
4041	4058	{
4042	4059	case 6: // jump
4043	4060	#ifdef LOG_NV2A
4044		printf("jump dmaget %08X", *dmaget);
	4061	machine().logerror("jump dmaget %08X", *dmaget);
4045	4062	#endif
4046	4063	*dmaget = cmd & 0xfffffffc;
4047	4064	#ifdef LOG_NV2A
4048		printf(" -> %08X\n\r", *dmaget);
	4065	machine().logerror(" -> %08X\n\r", *dmaget);
4049	4066	#endif
4050	4067	break;
4051	4068	case 0: // increasing method
r250251	r250252
4053	4070	subch = (cmd >> 13) & 7;
4054	4071	count = (cmd >> 18) & 2047;
4055	4072	if ((method == 0) && (count == 1)) {
4056		handle = space->read_dword(*dmaget);
4057		handle = geforce_object_offset(handle);
4058		#ifdef LOG_NV2A
4059		machine().logerror("  assign to subchannel %d object at %d", subch, handle);
4060		#endif
4061		channel[chanel][subch].object.objhandle = handle;
4062		handle = ramin[handle / 4];
4063		objclass = handle & 0xff;
4064		#ifdef LOG_NV2A
4065		machine().logerror(" class %03X\n", objclass);
4066		#endif
4067		channel[chanel][subch].object.objclass = objclass;
	4073	geforce_assign_object(*space, chanel, subch, *dmaget);
4068	4074	*dmaget += 4;
4069	4075	}
4070	4076	else {
r250251	r250252
4093	4099	subch = (cmd >> 13) & 7;
4094	4100	count = (cmd >> 18) & 2047;
4095	4101	if ((method == 0) && (count == 1)) {
4096		handle = space->read_dword(*dmaget);
4097		handle = geforce_object_offset(handle);
4098		#ifdef LOG_NV2A
4099		machine().logerror("  assign to subchannel %d object at %d", subch, handle);
4100		#endif
4101		channel[chanel][subch].object.objhandle = handle;
4102		handle = ramin[handle / 4];
4103		objclass = handle & 0xff;
4104		#ifdef LOG_NV2A
4105		machine().logerror(" class %03X\n", objclass);
4106		#endif
4107		channel[chanel][subch].object.objclass = objclass;
	4102	geforce_assign_object(*space, chanel, subch, *dmaget);
4108	4103	*dmaget += 4;
4109	4104	}
4110	4105	else {
r250251	r250252
4125	4120	count = space->read_dword(*dmaget);
4126	4121	*dmaget += 4;
4127	4122	if ((method == 0) && (count == 1)) {
4128		handle = space->read_dword(*dmaget);
4129		handle = geforce_object_offset(handle);
4130		#ifdef LOG_NV2A
4131		machine().logerror("  assign to subchannel %d object at %d", subch, handle);
4132		#endif
4133		channel[chanel][subch].object.objhandle = handle;
4134		handle = ramin[handle / 4];
4135		objclass = handle & 0xff;
4136		#ifdef LOG_NV2A
4137		machine().logerror(" class %03X\n", objclass);
4138		#endif
4139		channel[chanel][subch].object.objclass = objclass;
	4123	geforce_assign_object(*space, chanel, subch, *dmaget);
4140	4124	*dmaget += 4;
4141	4125	}
4142	4126	else {
r250251	r250252
4294	4278	subchannel = (suboffset >> (13 - 2)) & 7;
4295	4279	suboffset = suboffset & 0x7ff;
4296	4280	//machine().logerror("NV_2A: write channel[%02X,%d,%04X]=%08X\n",chanel,subchannel,suboffset*4,data & mem_mask);
	4281	COMBINE_DATA(&channel[chanel][subchannel].regs[suboffset]);
4297	4282	if (suboffset >= 0x80 / 4)
4298	4283	return;
4299		COMBINE_DATA(&channel[chanel][subchannel].regs[suboffset]);
4300	4284	if ((suboffset == 0x40 / 4) || (suboffset == 0x44 / 4)) { // DMA_PUT or DMA_GET
4301	4285	UINT32 *dmaput, *dmaget;
4302	4286
4303		dmaput = &channel[chanel][subchannel].regs[0x40 / 4];
4304		dmaget = &channel[chanel][subchannel].regs[0x44 / 4];
	4287	dmaput = &channel[chanel][0].regs[0x40 / 4];
	4288	dmaget = &channel[chanel][0].regs[0x44 / 4];
4305	4289	//printf("dmaget %08X dmaput %08X\n\r",*dmaget,*dmaput);
4306		if ((*dmaput == 0x048cf000) && (*dmaget == 0x07f4d000)) {
	4290	if ((*dmaput == 0x048cf000) && (*dmaget == 0x07f4d000)) { // only for outr2
4307	4291	*dmaget = *dmaput;
4308	4292	puller_waiting = 0;
4309	4293	puller_timer->enable(false);
r250251	r250252
4312	4296	if (*dmaget != *dmaput) {
4313	4297	if (puller_waiting == 0) {
4314	4298	puller_channel = chanel;
4315		puller_subchannel = subchannel;
4316	4299	puller_space = &space;
4317	4300	puller_timer->enable();
4318	4301	puller_timer->adjust(attotime::zero);

trunk/src/mame/video/shadfrce.cpp

r250251	r250252
101	101
102	102
103	103
104		void shadfrce_state::draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int y_offset )
	104	void shadfrce_state::draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect )
105	105	{
106	106	/* | ---- ---- hhhf Fe-Y | ---- ---- yyyy yyyy | ---- ---- TTTT TTTT | ---- ---- tttt tttt |
107	107	| ---- ---- -pCc cccX | ---- ---- xxxx xxxx | ---- ---- ---- ---- | ---- ---- ---- ---- | */
r250251	r250252
121	121	UINT16 *finish = m_spvideoram_old;
122	122	UINT16 *source = finish + 0x2000/2 - 8;
123	123	int hcount;
124		while (source >= finish)
	124	while( source>=finish )
125	125	{
	126	int ypos = 0x100 - (((source[0] & 0x0003) << 8) | (source[1] & 0x00ff));
	127	int xpos = (((source[4] & 0x0001) << 8) | (source[5] & 0x00ff)) + 1;
	128	int tile = ((source[2] & 0x00ff) << 8) | (source[3] & 0x00ff);
	129	int height = (source[0] & 0x00e0) >> 5;
126	130	int enable = ((source[0] & 0x0004));
	131	int flipx = ((source[0] & 0x0010) >> 4);
	132	int flipy = ((source[0] & 0x0008) >> 3);
	133	int pal = ((source[4] & 0x003e));
	134	int pri_mask = (source[4] & 0x0040) ? 0x02 : 0x00;
127	135
128		if (enable)
129		{
130		int ypos = 0x100 - (((source[0] & 0x0003) << 8) | (source[1] & 0x00ff));
131		int height = ((source[0] & 0x00e0) >> 5) ;
132		height += 1;
	136	if (pal & 0x20) pal ^= 0x60;    /* skip hole */
133	137
134		int bottom = ypos + y_offset;
135		int top = bottom - height * 16;
136
137		if (top > cliprect.max_y || bottom <= cliprect.min_y)
138		{
139		source -= 8;
140		continue;
	138	height++;
	139	if (enable) {
	140	for (hcount=0;hcount<height;hcount++) {
	141	gfx->prio_transpen(bitmap,cliprect,tile+hcount,pal,flipx,flipy,xpos,ypos-hcount*16-16,screen.priority(),pri_mask,0);
	142	gfx->prio_transpen(bitmap,cliprect,tile+hcount,pal,flipx,flipy,xpos-0x200,ypos-hcount*16-16,screen.priority(),pri_mask,0);
	143	gfx->prio_transpen(bitmap,cliprect,tile+hcount,pal,flipx,flipy,xpos,ypos-hcount*16-16+0x200,screen.priority(),pri_mask,0);
	144	gfx->prio_transpen(bitmap,cliprect,tile+hcount,pal,flipx,flipy,xpos-0x200,ypos-hcount*16-16+0x200,screen.priority(),pri_mask,0);
141	145	}
142
143		int xpos = (((source[4] & 0x0001) << 8) | (source[5] & 0x00ff)) + 1;
144		int tile = ((source[2] & 0x00ff) << 8) | (source[3] & 0x00ff);
145		int flipx = ((source[0] & 0x0010) >> 4);
146		int flipy = ((source[0] & 0x0008) >> 3);
147		int pal = ((source[4] & 0x003e));
148		int pri_mask = (source[4] & 0x0040) ? 0x02 : 0x00;
149
150		if (pal & 0x20) pal ^= 0x60;    /* skip hole */
151
152
153		for (hcount = 0; hcount < height; hcount++) {
154		gfx->prio_transpen(bitmap, cliprect, tile + hcount, pal, flipx, flipy, xpos, bottom-16, screen.priority(), pri_mask, 0);
155		gfx->prio_transpen(bitmap, cliprect, tile + hcount, pal, flipx, flipy, xpos - 0x200, bottom-16, screen.priority(), pri_mask, 0); // x wraparound
156		bottom -= 16;
157		}
158	146	}
159
160	147	source-=8;
161	148	}
162	149	}
r250251	r250252
169	156	{
170	157	m_bg1tilemap->draw(screen, bitmap, cliprect, 0,0);
171	158	m_bg0tilemap->draw(screen, bitmap, cliprect, 0,1);
172		draw_sprites(screen,bitmap,cliprect, 0);
173		draw_sprites(screen,bitmap,cliprect, 0x200); // y-wrap
	159	draw_sprites(screen,bitmap,cliprect);
174	160	m_fgtilemap->draw(screen, bitmap, cliprect, 0,0);
175	161	}
176	162	else

trunk/src/osd/modules/debugger/debugint.cpp

r250251	r250252
17	17	#include "debug/debugvw.h"
18	18	#include "debug/dvdisasm.h"
19	19	#include "debug/dvmemory.h"
20		#include "debug/dvstate.h"
21	20	#include "debug/debugcon.h"
22	21	#include "debug/debugcpu.h"
23	22
r250251	r250252
151	150	DISABLE_COPYING(DView_edit);
152	151
153	152	public:
154		DView_edit()
155		{ }
156		~DView_edit()
157		{ }
	153	DView_edit(): active(0), container(NULL) { }
	154	~DView_edit() { }
158	155	int                 active;
159	156	render_container *  container;
160	157	std::string         str;
r250251	r250252
1131	1128	x1 += UI_BOX_LR_BORDER;
1132	1129	x2 -= UI_BOX_LR_BORDER;
1133	1130	y1 += UI_BOX_TB_BORDER;
1134		y2 -= UI_BOX_TB_BORDER;
1135	1131
1136	1132	/* draw the text within it */
1137	1133	editor->container->manager().machine().ui().draw_text_full(editor->container, editor->str.c_str(), x1, y1, x2 - x1, JUSTIFY_CENTER, WRAP_TRUNCATE,

trunk/src/osd/modules/debugger/debugwin.cpp

r250251	r250252
22	22	#include "win/uimetrics.h"
23	23
24	24	#include "emu.h"
25		#include "uiinput.h"
26	25	#include "debugger.h"
27	26
28	27	#include "window.h"
29		#include "winmain.h"
30	28	#include "../../windows/input.h"
31	29
32	30

trunk/src/osd/modules/debugger/win/consolewininfo.cpp

r250251	r250252
9	9	#include "consolewininfo.h"
10	10
11	11	#include "debugviewinfo.h"
12		#include "disasmviewinfo.h"
13	12	#include "uimetrics.h"
14	13
15	14	#include "debug/debugcon.h"
r250251	r250252
84	83	set_cpu(*debug_cpu_get_visible_cpu(machine()));
85	84
86	85	// mark the edit box as the default focus and set it
87		set_default_focus();
	86	editwin_info::set_default_focus();
88	87	return;
89	88
90	89	cleanup:

trunk/src/osd/modules/debugger/win/debugviewinfo.cpp

r250251	r250252
315	315	// loop twice; once to fill the background and once to draw the text
316	316	for (int iter = 0; iter < 2; iter++)
317	317	{
318		COLORREF fgcolor = RGB(0x00,0x00,0x00);
	318	COLORREF fgcolor;
319	319	COLORREF bgcolor = RGB(0xff,0xff,0xff);
320	320	HBRUSH bgbrush = NULL;
321	321	int last_attrib = -1;

trunk/src/osd/modules/debugger/win/debugwininfo.cpp

r250251	r250252
11	11	#include "debugviewinfo.h"
12	12
13	13	#include "debug/debugcpu.h"
14		#include "imagedev/cassette.h"
15
16		#include "strconv.h"
17	14	#include "window.h"
18	15	#include "winutf8.h"
19	16

trunk/src/osd/modules/debugger/win/disasmwininfo.cpp

r250251	r250252
11	11	#include "debugviewinfo.h"
12	12	#include "disasmviewinfo.h"
13	13	#include "uimetrics.h"
14
15		#include "debugger.h"
16		#include "debug/debugcon.h"
17		#include "debug/debugcpu.h"
18
19	14	#include "winutf8.h"
20	15
21	16
r250251	r250252
38	33	update_caption();
39	34
40	35	// recompute the children once to get the maxwidth
41		recompute_children();
	36	disasmwin_info::recompute_children();
42	37
43	38	// position the window and recompute children again
44	39	SetWindowPos(window(), HWND_TOP, 100, 100, maxwidth(), 200, SWP_SHOWWINDOW);
45		recompute_children();
	40	disasmwin_info::recompute_children();
46	41
47	42	// mark the edit box as the default focus and set it
48		set_default_focus();
	43	editwin_info::set_default_focus();
49	44	}
50	45
51	46

trunk/src/osd/modules/debugger/win/logwininfo.cpp

r250251	r250252
38	38	SetWindowPos(window(), HWND_TOP, 100, 100, bounds.right - bounds.left, bounds.bottom - bounds.top, SWP_SHOWWINDOW);
39	39
40	40	// recompute the children
41		recompute_children();
	41	debugwin_info::recompute_children();
42	42	}
43	43
44	44

trunk/src/osd/modules/debugger/win/memorywininfo.cpp

r250251	r250252
59	59	update_caption();
60	60
61	61	// recompute the children once to get the maxwidth
62		recompute_children();
	62	memorywin_info::recompute_children();
63	63
64	64	// position the window and recompute children again
65	65	SetWindowPos(window(), HWND_TOP, 100, 100, maxwidth(), 200, SWP_SHOWWINDOW);
66		recompute_children();
	66	memorywin_info::recompute_children();
67	67
68	68	// mark the edit box as the default focus and set it
69		set_default_focus();
	69	editwin_info::set_default_focus();
70	70	}
71	71
72	72

trunk/src/osd/modules/debugger/win/pointswininfo.cpp

r250251	r250252
46	46	SetWindowPos(window(), HWND_TOP, 100, 100, bounds.right - bounds.left, bounds.bottom - bounds.top, SWP_SHOWWINDOW);
47	47
48	48	// recompute the children
49		recompute_children();
	49	debugwin_info::recompute_children();
50	50	}
51	51
52	52

trunk/src/osd/modules/debugger/win/uimetrics.cpp

r250251	r250252
31	31	m_debug_font = CreateFont(-MulDiv((size <= 0) ? 9 : size, GetDeviceCaps(temp_dc, LOGPIXELSY), 72), 0, 0, 0, FW_MEDIUM, FALSE, FALSE, FALSE,
32	32	ANSI_CHARSET, OUT_DEFAULT_PRECIS, CLIP_DEFAULT_PRECIS, DEFAULT_QUALITY, FIXED_PITCH, t_face);
33	33	osd_free(t_face);
34		t_face = NULL;
35	34
36	35	if (m_debug_font == NULL)
37	36	fatalerror("Unable to create debugger font\n");

trunk/src/osd/modules/font/font_none.cpp

r250251	r250252
21	21	virtual bool open(const char *font_path, const char *name, int &height);
22	22	virtual void close();
23	23	virtual bool get_bitmap(unicode_char chnum, bitmap_argb32 &bitmap, INT32 &width, INT32 &xoffs, INT32 &yoffs);
24		private:
25	24	};
26	25
27	26	bool osd_font_none::open(const char *font_path, const char *_name, int &height)

trunk/src/osd/modules/font/font_windows.cpp

r250251	r250252
34	34	//-------------------------------------------------
35	35
36	36	class osd_font_windows : public osd_font
37		{
	37	{
38	38	public:
	39	osd_font_windows(): m_font(NULL) { }
39	40	virtual ~osd_font_windows() { }
40	41
41	42	virtual bool open(const char *font_path, const char *name, int &height);

trunk/src/osd/modules/midi/none.cpp

r250251	r250252
41	41	virtual bool poll();
42	42	virtual int read(UINT8 *pOut);
43	43	virtual void write(UINT8 data);
44
45		private:
46		//int dummy;
47	44	};
48	45
49	46	osd_midi_device *none_module::create_midi_device()

trunk/src/osd/modules/midi/portmidi.cpp

r250251	r250252
44	44	#define MIDI_EOX    0xf7
45	45
46	46	class osd_midi_device_pm : public osd_midi_device
47		{
	47	{
48	48	public:
	49	osd_midi_device_pm(): pmStream(NULL), xmit_cnt(0), last_status(0), rx_sysex(false) { }
49	50	virtual ~osd_midi_device_pm() { }
50	51	virtual bool open_input(const char *devname);
51	52	virtual bool open_output(const char *devname);
r250251	r250252
208	209	{
209	210	return false;
210	211	}
211		return false;
212	212	}
213	213
214	214	void osd_midi_device_pm::close()

trunk/src/osd/modules/netdev/pcap.cpp

r250251	r250252
168	168	m_p = NULL;
169	169	return;
170	170	}
171		set_mac(get_mac());
	171	netdev_pcap::set_mac(get_mac());
172	172
173	173	#ifdef SDLMAME_MACOSX
174	174	m_ctx.head = 0;
r250251	r250252
206	206	ret = pcap_sendpacket_dl(m_p, buf, len);
207	207	printf("sent packet length %d, returned %d\n", len, ret);
208	208	return ret ? len : 0;
209		return (!pcap_sendpacket_dl(m_p, buf, len))?len:0;
	209	//return (!pcap_sendpacket_dl(m_p, buf, len))?len:0;
210	210	}
211	211
212	212	int netdev_pcap::recv_dev(UINT8 **buf)

trunk/src/osd/modules/render/d3d/d3d9intf.cpp

r250251	r250252
18	18
19	19	// MAMEOS headers
20	20	#include "d3dintf.h"
21		#include "winmain.h"
22	21
23	22
24	23
r250251	r250252
83	82	{
84	83	osd_printf_verbose("Direct3D: Unable to find Direct3DCreate9\n");
85	84	FreeLibrary(dllhandle);
86		dllhandle = NULL;
87	85	return NULL;
88	86	}
89	87
r250251	r250252
93	91	{
94	92	osd_printf_verbose("Direct3D: Error attempting to initialize Direct3D9\n");
95	93	FreeLibrary(dllhandle);
96		dllhandle = NULL;
97	94	return NULL;
98	95	}
99	96

trunk/src/osd/modules/render/d3d/d3dhlsl.cpp

r250251	r250252
29	29	#include "render.h"
30	30	#include "ui/ui.h"
31	31	#include "rendutil.h"
32		#include "options.h"
33	32	#include "emuopts.h"
34	33	#include "aviio.h"
35	34	#include "png.h"
r250251	r250252
39	38	#include "d3dintf.h"
40	39	#include "winmain.h"
41	40	#include "window.h"
42		#include "config.h"
43	41	#include "d3dcomm.h"
44	42	#include "modules/render/drawd3d.h"
45	43	#include "strconv.h"
r250251	r250252
178	176	//  shader manager constructor
179	177	//============================================================
180	178
181		shaders::shaders()
	179	shaders::shaders():
	180	d3dintf(NULL), machine(NULL), d3d(NULL), num_screens(0), curr_screen(0), curr_frame(0), write_ini(false), read_ini(false), hlsl_prescale_x(0), hlsl_prescale_y(0), bloom_count(0),
	181	vecbuf_type(), vecbuf_index(0), vecbuf_count(0), avi_output_file(NULL), avi_frame(0), avi_copy_surface(NULL), avi_copy_texture(NULL), avi_final_target(NULL), avi_final_texture(NULL),
	182	black_surface(NULL), black_texture(NULL), render_snap(false), snap_rendered(false), snap_copy_target(NULL), snap_copy_texture(NULL), snap_target(NULL), snap_texture(NULL),
	183	snap_width(0), snap_height(0), lines_pending(false), backbuffer(NULL), curr_effect(NULL), default_effect(NULL), prescale_effect(NULL), post_effect(NULL), distortion_effect(NULL),
	184	focus_effect(NULL), phosphor_effect(NULL), deconverge_effect(NULL), color_effect(NULL), yiq_encode_effect(NULL), yiq_decode_effect(NULL), bloom_effect(NULL),
	185	downsample_effect(NULL), vector_effect(NULL), fsfx_vertices(NULL), curr_texture(NULL), curr_render_target(NULL), curr_poly(NULL)
	186
182	187	{
183	188	master_enable = false;
184	189	vector_enable = true;
r250251	r250252
3435	3440	// find length of the device name
3436	3441	int end1 = snapstr.find("/", pos + 3);
3437	3442	int end2 = snapstr.find("%", pos + 3);
3438		int end = -1;
	3443	int end;
3439	3444
3440	3445	if ((end1 != -1) && (end2 != -1))
3441	3446	{

trunk/src/osd/modules/render/d3d/d3dhlsl.h

r250251	r250252
20	20	//  TYPE DEFINITIONS
21	21	//============================================================
22	22
	23	struct slider_state;
	24
23	25	namespace d3d
24	26	{
25	27	class effect;

trunk/src/osd/modules/render/drawd3d.cpp

r250251	r250252
27	27	// MAME headers
28	28	#include "emu.h"
29	29	#include "render.h"
30		#include "ui/ui.h"
	30
31	31	#include "rendutil.h"
32		#include "options.h"
33	32	#include "emuopts.h"
34	33	#include "aviio.h"
35		#include "png.h"
36	34
37	35	// MAMEOS headers
38	36	#include "modules/render/d3d/d3dintf.h"
39	37	#include "winmain.h"
40	38	#include "window.h"
41		#include "config.h"
42		#include "strconv.h"
43	39	#include "modules/render/d3d/d3dcomm.h"
44	40	#include "drawd3d.h"
45	41
r250251	r250252
616	612	}
617	613
618	614	renderer::renderer(osd_window *window)
619		: osd_renderer(window, FLAG_NONE)
	615	: osd_renderer(window, FLAG_NONE), m_adapter(0), m_width(0), m_height(0), m_refresh(0), m_create_error_count(0), m_device(NULL), m_gamma_supported(0), m_pixformat(),
	616	m_vertexbuf(NULL), m_lockedbuf(NULL), m_numverts(0), m_vectorbatch(NULL), m_batchindex(0), m_numpolys(0), m_restarting(false), m_mod2x_supported(0), m_mod4x_supported(0),
	617	m_screen_format(), m_last_texture(NULL), m_last_texture_flags(0), m_last_blendenable(0), m_last_blendop(0), m_last_blendsrc(0), m_last_blenddst(0), m_last_filter(0),
	618	m_last_wrap(), m_last_modmode(0), m_hlsl_buf(NULL), m_shaders(NULL), m_texture_manager(NULL), m_line_count(0)
620	619	{
621		m_device = NULL;
622		m_restarting = false;
623		m_shaders = NULL;
624		m_numverts = 0;
625		m_numpolys = 0;
626		m_vertexbuf = NULL;
627		m_lockedbuf = NULL;
628		m_vectorbatch = NULL;
629		m_last_texture = NULL;
630		m_hlsl_buf = NULL;
631		m_texture_manager = NULL;
632	620	}
633	621
634	622	int renderer::initialize()

trunk/src/osd/modules/render/drawdd.cpp

r250251	r250252
17	17	#include "emu.h"
18	18	#include "render.h"
19	19	#include "rendutil.h"
20		#include "options.h"
21	20	#include "rendersw.inc"
22	21
23	22	// MAMEOS headers
24	23	#include "winmain.h"
25	24	#include "window.h"
26		#include "config.h"
27	25
28	26
29	27
r250251	r250252
40	38	{
41	39	public:
42	40	renderer_dd(osd_window *window)
43		: osd_renderer(window, FLAG_NONE),
	41	: osd_renderer(window, FLAG_NONE),
	42	width(0),
	43	height(0),
	44	refresh(0),
44	45	//adapter(0),
45	46	adapter_ptr(NULL),
46	47	clearouter(0),

trunk/src/osd/modules/render/drawnone.cpp

r250251	r250252
32	32	virtual void record() { };
33	33	virtual void toggle_fsfx() { };
34	34	virtual void destroy();
35
36		private:
37	35	};
38	36
39	37	//============================================================

trunk/src/osd/modules/render/drawogl.cpp

r250251	r250252
19	19	// MAME headers
20	20	#include "osdcomm.h"
21	21	#include "emu.h"
22		#include "options.h"
23	22	#include "emuopts.h"
24	23
25	24	#ifndef OSD_WINDOWS

trunk/src/osd/modules/sound/direct_sound.cpp

r250251	r250252
174	174	memcpy(m_bytes2, (UINT8 const *)data + m_locked1, bytes - m_locked1);
175	175	}
176	176
177		result = unlock();
	177	unlock();
178	178	return DS_OK;
179	179	}
180	180	HRESULT clear()
r250251	r250252
189	189	assert(0U == m_locked2);
190	190	memset(m_bytes1, 0, m_locked1);
191	191
192		result = unlock();
	192	unlock();
193	193	return DS_OK;
194	194	}
195	195

trunk/src/osd/modules/sync/work_osd.cpp

r250251	r250252
444	444	osd_work_item *item;
445	445
446	446	// first allocate a new work item; try the free list first
447		INT32 lockslot = osd_scalable_lock_acquire(queue->lock);
	447	INT32 myslot = osd_scalable_lock_acquire(queue->lock);
448	448	do
449	449	{
450	450	item = (osd_work_item *)queue->free;
451	451	} while (item != NULL && compare_exchange_ptr((PVOID volatile *)&queue->free, item, item->next) != item);
452		osd_scalable_lock_release(queue->lock, lockslot);
	452	osd_scalable_lock_release(queue->lock, myslot);
453	453
454	454	// if nothing, allocate something new
455	455	if (item == NULL)

trunk/src/osd/sdl/sdldir.cpp

r250251	r250252
9	9	//============================================================
10	10
11	11	#ifdef SDLMAME_WIN32
12		#include "../windows/windir.c"
	12	#include "../windows/windir.cpp"
13	13	#else
14	14
15	15	#ifndef _LARGEFILE64_SOURCE

trunk/src/osd/sdl/sdlfile.cpp

r250251	r250252
9	9	//============================================================
10	10
11	11	#ifdef SDLMAME_WIN32
12		#include "../windows/winfile.c"
13		#include "../windows/winutil.c"
	12	#include "../windows/winfile.cpp"
	13	#include "../windows/winutil.cpp"
14	14	#else
15	15
16	16	#ifndef _LARGEFILE64_SOURCE

trunk/src/osd/sdl/sdlptty_unix.cpp

r250251	r250252
19	19	# include <termios.h>
20	20	# include <libutil.h>
21	21	#elif defined(SDLMAME_NETBSD) || defined(SDLMAME_MACOSX)
	22	# include <termios.h>
22	23	# include <util.h>
23	24	#elif defined(SDLMAME_OPENBSD)
24	25	# include <termios.h>

trunk/src/osd/sdl/sdlptty_win32.cpp

r250251	r250252
9	9	//
10	10	//============================================================
11	11
12		#include "../windows/winptty.c"
	12	#include "../windows/winptty.cpp"

trunk/src/osd/sdl/sdlsocket.cpp

r250251	r250252
9	9	//============================================================
10	10
11	11	#ifdef SDLMAME_WIN32
12		#include "../windows/winsocket.c"
	12	#include "../windows/winsocket.cpp"
13	13	#else
14	14
15	15	#include <stdio.h>

trunk/src/osd/strconv.cpp

r250251	r250252
13	13
14	14	// MAMEOS headers
15	15	#include "strconv.h"
16		#include "unicode.h"
17	16
18	17	#if defined(SDLMAME_WIN32) || defined(OSD_WINDOWS)
19	18	//============================================================
r250251	r250252
120	119	}
121	120
122	121	#else
123
	122	#include "unicode.h"
124	123	//============================================================
125	124	//  osd_uchar_from_osdchar
126	125	//============================================================

trunk/src/osd/windows/input.cpp

r250251	r250252
122	122	{
123	123	public:
124	124	device_info(running_machine &machine)
125		: m_machine(machine) { }
	125	: head(NULL), next(NULL), name(NULL), poll(NULL), device(NULL), m_machine(machine) { }
126	126
127	127	running_machine &machine() const { return m_machine; }
128	128

trunk/src/osd/windows/output.cpp

r250251	r250252
12	12
13	13	// MAME headers
14	14	#include "emu.h"
15		#include "osdepend.h"
16	15	#include "winmain.h"
17	16	// MAMEOS headers
18	17	#include "output.h"

trunk/src/osd/windows/video.cpp

r250251	r250252
13	13	// MAME headers
14	14	#include "emu.h"
15	15	#include "emuopts.h"
16		#include "osdepend.h"
17		#include "video/vector.h"
18	16	#include "render.h"
19		#include "rendutil.h"
20		#include "ui/ui.h"
21	17	#include "uiinput.h"
22	18
23	19	// MAMEOS headers
r250251	r250252
26	22	#include "window.h"
27	23	#include "input.h"
28	24	#include "strconv.h"
29		#include "config.h"
30	25
31	26	//============================================================
32	27	//  CONSTANTS
r250251	r250252
113	108	win_monitor_info::win_monitor_info(const HMONITOR handle, const char *monitor_device, float aspect)
114	109	: osd_monitor_info(&m_handle, monitor_device, aspect), m_handle(handle)
115	110	{
116		refresh();
	111	win_monitor_info::refresh();
117	112	}
118	113
119	114	win_monitor_info::~win_monitor_info()

trunk/src/osd/windows/winclip.cpp

r250251	r250252
76	76
77	77	char *osd_get_clipboard_text(void)
78	78	{
79		char *result = NULL;
	79	char *result;
80	80
81	81	// try to access unicode text
82	82	result = get_clipboard_text_by_format(CF_UNICODETEXT, convert_wide);

trunk/src/osd/windows/window.cpp

r250251	r250252
23	23
24	24	// MAME headers
25	25	#include "emu.h"
26		#include "emuopts.h"
27	26	#include "uiinput.h"
28	27
29	28	// MAMEOS headers
r250251	r250252
31	30	#include "window.h"
32	31	#include "video.h"
33	32	#include "input.h"
34		#include "strconv.h"
35		#include "config.h"
36	33	#include "winutf8.h"
37	34
38	35	#include "winutil.h"
r250251	r250252
617	614	RECT bounds;
618	615
619	616	// hide cursor
620		while (ShowCursor(FALSE) >= -1) ;
	617	while (ShowCursor(FALSE) >= -1) { };
621	618	ShowCursor(TRUE);
622	619
623	620	// store the cursor position
r250251	r250252
632	629	else
633	630	{
634	631	// show cursor
635		while (ShowCursor(TRUE) < 1) ;
	632	while (ShowCursor(TRUE) < 1) { };
636	633	ShowCursor(FALSE);
637	634
638	635	// allow cursor to move freely

trunk/src/osd/windows/winfile.cpp

r250251	r250252
20	20	// MAMEOS headers
21	21	#include "strconv.h"
22	22	#include "winutil.h"
23		#include "winutf8.h"
24	23
25	24	#include "winfile.h"
26	25
r250251	r250252
187	186	break;
188	187	case WINFILE_SOCKET:
189	188	return win_read_socket(file, buffer, offset, length, actual);
190		break;
191	189	case WINFILE_PTTY:
192	190	return win_read_ptty(file, buffer, offset, length, actual);
193		break;
194	191
195	192	}
196	193	return FILERR_NONE;
r250251	r250252
226	223	break;
227	224	case WINFILE_SOCKET:
228	225	return win_write_socket(file, buffer, offset, length, actual);
229		break;
230	226	case WINFILE_PTTY:
231	227	return win_write_ptty(file, buffer, offset, length, actual);
232		break;
233	228
234	229	}
235	230	return FILERR_NONE;
r250251	r250252
274	269	break;
275	270	case WINFILE_SOCKET:
276	271	return FILERR_FAILURE;
277		break;
278	272	case WINFILE_PTTY:
279	273	return FILERR_FAILURE;
280		break;
281	274
282	275	}
283	276	return FILERR_NONE;

trunk/src/osd/windows/winmain.cpp

r250251	r250252
29	29	#include "winmain.h"
30	30	#include "window.h"
31	31	#include "video.h"
32		#include "input.h"
33		#include "output.h"
34		#include "config.h"
35		#include "osdepend.h"
36		#include "strconv.h"
37	32	#include "winutf8.h"
38	33	#include "winutil.h"
39	34	#include "debugger.h"
r250251	r250252
417	412
418	413
419	414	// parse config and cmdline options
420		DWORD result = 0;
	415	DWORD result;
421	416	{
422	417	windows_options options;
423	418	windows_osd_interface osd(options);
r250251	r250252
1354	1349	//-------------------------------------------------
1355	1350
1356	1351	sampling_profiler::sampling_profiler(UINT32 max_seconds, UINT8 stack_depth = 0)
1357		: m_thread(NULL),
	1352	:   m_target_thread(NULL),
	1353	m_thread(NULL),
1358	1354	m_thread_id(0),
1359	1355	m_thread_exit(false),
1360	1356	m_stack_depth(stack_depth),

trunk/src/osd/windows/winsocket.cpp

r250251	r250252
16	16	// MAME headers
17	17	#include "osdcore.h"
18	18
19		// MAMEOS headers
20		#include "strconv.h"
21		#include "winutil.h"
22		#include "winutf8.h"
23
24	19	#include "winfile.h"
25	20
26	21	const char *winfile_socket_identifier  = "socket.";

trunk/src/osd/windows/winutf8.cpp

r250251	r250252
235	235	int x, int y, int width, int height, HWND parent, HMENU menu,
236	236	HINSTANCE instance, void* param)
237	237	{
238		TCHAR* t_classname = NULL;
	238	TCHAR* t_classname;
239	239	TCHAR* t_windowname = NULL;
240	240	HWND result = 0;
241	241

trunk/src/osd/windows/winutil.cpp

r250251	r250252
12	12
13	13	// MAMEOS headers
14	14	#include "winutil.h"
15		#include "strconv.h"
16	15
17	16	//============================================================
18	17	//  win_error_to_file_error

https://github.com/mamedev/mame/commit/8073884694bdc22c77645b3a5bbeb87b8ed3923a

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