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r41456 Thursday 29th October, 2015 at 22:19:40 UTC by David Haywood
internal map for internal things (nw)
[src/devices/bus/vcs]harmony_melody.c harmony_melody.h
[src/devices/cpu/arm7]lpc210x.c lpc210x.h

trunk/src/devices/bus/vcs/harmony_melody.c
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6767
6868
6969a26_rom_harmony_device::a26_rom_harmony_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
70                  : a26_rom_f8_device(mconfig, A26_ROM_HARMONY, "Atari 2600 ROM Cart HARMONY/MELODY", tag, owner, clock, "a2600_harmony", __FILE__)
70                  : a26_rom_f8_device(mconfig, A26_ROM_HARMONY, "Atari 2600 ROM Cart HARMONY/MELODY", tag, owner, clock, "a2600_harmony", __FILE__),
71                  m_cpu(*this, "arm")
7172{
7273}
7374
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8081   save_item(NAME(m_base_bank));
8182}
8283
83void a26_rom_harmony_device::device_reset()
84{
85   m_base_bank = 5;
86}
87
88
89READ8_MEMBER(a26_rom_harmony_device::read8_r)
90{
91   return m_rom[offset + (m_base_bank * 0x1000)];
92}
93
94
95READ32_MEMBER(a26_rom_harmony_device::armrom_r)
96{
97   UINT32 ret = (m_rom[offset * 4 + 3] << 24) |
98                  (m_rom[offset * 4 + 2] << 16) |
99               (m_rom[offset * 4 + 1] << 8) |
100                (m_rom[offset * 4 + 0] << 0);
101   return ret;
102}
103
104WRITE32_MEMBER(a26_rom_harmony_device::armrom_w)
105{
106
107}
108
109READ32_MEMBER(a26_rom_harmony_device::arm_E01FC088_r)
110{
111   return 0xffffffff;
112}
113
11484static ADDRESS_MAP_START( harmony_arm7_map, AS_PROGRAM, 32, a26_rom_harmony_device )
115   // todo: implement all this correctly
116   AM_RANGE(0x00000000, 0x00007fff) AM_READWRITE(armrom_r,armrom_w) // flash, 32k
117   AM_RANGE(0x40000000, 0x40001fff) AM_RAM // sram, 8k
118
119   AM_RANGE(0xE01FC088, 0xE01FC08b) AM_READ(arm_E01FC088_r)
85   // these are not listed in the ARM manual as internal areas, so probably external? what maps here?
86   AM_RANGE(0x3FFFC000, 0x3FFFC003) AM_RAM
87   AM_RANGE(0x3FFFC010, 0x3FFFC013) AM_RAM
88   AM_RANGE(0x3FFFC014, 0x3FFFC017) AM_RAM // reads
89   AM_RANGE(0x3FFFC018, 0x3FFFC01b) AM_RAM
12090ADDRESS_MAP_END
12191
12292static MACHINE_CONFIG_FRAGMENT( a26_harmony )
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130100}
131101
132102// actually if the ARM code is doing this and providing every opcode to the main CPU based
133// on bus activity then we shouldn't be doing this here.
103// on bus activity then we shouldn't be doing and of this here (if the ROM is actually
104// the internal Flash rom of the ARM CPU then the A2600 CPU won't be able to see it directly
105// at all?)
106//
107// instead we need the ARM monitoring the bus at all times and supplying the code on
108// demand transparent to the main CPU? is this theory correct?
109
110void a26_rom_harmony_device::device_reset()
111{
112   m_base_bank = 5;
113
114   memcpy(m_cpu->m_flash, m_rom, 0x8000);
115   m_cpu->reset();
116}
117
118READ8_MEMBER(a26_rom_harmony_device::read8_r)
119{
120   return m_rom[offset + (m_base_bank * 0x1000)];
121}
122
123
134124void a26_rom_harmony_device::check_bankswitch(offs_t offset)
135125{
136126   switch (offset)
trunk/src/devices/bus/vcs/harmony_melody.h
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2424   virtual DECLARE_READ8_MEMBER(read_rom);
2525   virtual DECLARE_WRITE8_MEMBER(write_bank);
2626
27   DECLARE_READ32_MEMBER(armrom_r);
28   DECLARE_WRITE32_MEMBER(armrom_w);
2927   
3028   DECLARE_READ8_MEMBER(read8_r);
3129
32   DECLARE_READ32_MEMBER(arm_E01FC088_r);
33
3430   void check_bankswitch(offs_t offset);
3531
3632protected:
33
34private:
35   required_device<lpc210x_device> m_cpu;
3736};
3837
3938
trunk/src/devices/cpu/arm7/lpc210x.c
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1616
1717const device_type LPC2103 = &device_creator<lpc210x_device>;
1818
19static ADDRESS_MAP_START( lpc2103_map, AS_PROGRAM, 32, lpc210x_device )
20   AM_RANGE(0x00000000, 0x00007fff) AM_READWRITE(flash_r, flash_w) // 32kb internal FLASH rom
21   AM_RANGE(0x40000000, 0x40001fff) AM_RAM // 8kb internal SROM (writes should actually latch - see docs)
1922
23   AM_RANGE(0xE01FC088, 0xE01FC08b) AM_READ(arm_E01FC088_r)
24ADDRESS_MAP_END
25
26
2027lpc210x_device::lpc210x_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
21   : arm7_cpu_device(mconfig, LPC2103, "LPC2103", tag, owner, clock, "lpc2103", __FILE__, 4, eARM_ARCHFLAGS_T, ENDIANNESS_LITTLE)
28   : arm7_cpu_device(mconfig, LPC2103, "LPC2103", tag, owner, clock, "lpc2103", __FILE__, 4, eARM_ARCHFLAGS_T, ENDIANNESS_LITTLE),
29    m_program_config("program", ENDIANNESS_LITTLE, 32, 32, 0, ADDRESS_MAP_NAME(lpc2103_map))
2230{
2331}
2432
33READ32_MEMBER(lpc210x_device::arm_E01FC088_r)
34{
35   return 0xffffffff;
36}
2537
38READ32_MEMBER(lpc210x_device::flash_r)
39{
40   UINT32 ret = (m_flash[offset * 4 + 3] << 24) |
41                  (m_flash[offset * 4 + 2] << 16) |
42               (m_flash[offset * 4 + 1] << 8) |
43                (m_flash[offset * 4 + 0] << 0);
44   return ret;
45}
2646
47WRITE32_MEMBER(lpc210x_device::flash_w)
48{
49   //
50}
51
52
53const address_space_config *lpc210x_device::memory_space_config(address_spacenum spacenum) const
54{
55   switch(spacenum)
56   {
57   case AS_PROGRAM:           return &m_program_config;
58   default:                   return NULL;
59   }
60}
61
62
63
64
2765//-------------------------------------------------
2866//  device_start - device-specific startup
2967//-------------------------------------------------
trunk/src/devices/cpu/arm7/lpc210x.h
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2626
2727   // static configuration helpers
2828
29   // todo, use an appropriate flash type instead
30   UINT8 m_flash[0x8000];
31
32
33   DECLARE_READ32_MEMBER(arm_E01FC088_r);
34   DECLARE_READ32_MEMBER(flash_r);
35   DECLARE_WRITE32_MEMBER(flash_w);
36
37
2938protected:
3039   // device-level overrides
3140   virtual machine_config_constructor device_mconfig_additions() const;
3241   virtual void device_start();
3342   virtual void device_reset();
3443
44   virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const;
3545
3646private:
47   address_space_config m_program_config;
48
3749};
3850
3951


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