trunk/src/devices/machine/z80scc.c
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| 73 | 73 | #include "z80scc.h" |
| 74 | 74 | |
| 75 | 75 | //************************************************************************** |
| 76 | | // MACROS / CONSTANTS |
| 76 | // MACROS / CONSTANTS |
| 77 | 77 | //************************************************************************** |
| 78 | 78 | |
| 79 | 79 | #define VERBOSE 0 |
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| 89 | 89 | #define FUNCNAME __PRETTY_FUNCTION__ |
| 90 | 90 | #endif |
| 91 | 91 | |
| 92 | | #define CHANA_TAG "cha" |
| 93 | | #define CHANB_TAG "chb" |
| 92 | #define CHANA_TAG "cha" |
| 93 | #define CHANB_TAG "chb" |
| 94 | 94 | |
| 95 | 95 | //************************************************************************** |
| 96 | | // DEVICE DEFINITIONS |
| 96 | // DEVICE DEFINITIONS |
| 97 | 97 | //************************************************************************** |
| 98 | 98 | // device type definition |
| 99 | 99 | const device_type Z80SCC = &device_creator<z80scc_device>; |
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| 108 | 108 | const device_type SCC8523L = &device_creator<scc8523L_device>; |
| 109 | 109 | |
| 110 | 110 | //------------------------------------------------- |
| 111 | | // device_mconfig_additions - |
| 111 | // device_mconfig_additions - |
| 112 | 112 | //------------------------------------------------- |
| 113 | 113 | MACHINE_CONFIG_FRAGMENT( z80scc ) |
| 114 | 114 | MCFG_DEVICE_ADD(CHANA_TAG, Z80SCC_CHANNEL, 0) |
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| 121 | 121 | } |
| 122 | 122 | |
| 123 | 123 | //************************************************************************** |
| 124 | | // LIVE DEVICE |
| 124 | // LIVE DEVICE |
| 125 | 125 | //************************************************************************** |
| 126 | 126 | |
| 127 | 127 | //------------------------------------------------- |
| 128 | | // z80scc_device - constructor |
| 128 | // z80scc_device - constructor |
| 129 | 129 | //------------------------------------------------- |
| 130 | 130 | |
| 131 | 131 | z80scc_device::z80scc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT32 variant, const char *shortname, const char *source) |
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| 213 | 213 | : z80scc_device(mconfig, SCC8523L, "SCC 8523L", tag, owner, clock, TYPE_SCC8523L, "scc8523L", __FILE__){ } |
| 214 | 214 | |
| 215 | 215 | //------------------------------------------------- |
| 216 | | // device_start - device-specific startup |
| 216 | // device_start - device-specific startup |
| 217 | 217 | //------------------------------------------------- |
| 218 | 218 | |
| 219 | 219 | void z80scc_device::device_start() |
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| 252 | 252 | |
| 253 | 253 | |
| 254 | 254 | //------------------------------------------------- |
| 255 | | // device_reset - device-specific reset |
| 255 | // device_reset - device-specific reset |
| 256 | 256 | //------------------------------------------------- |
| 257 | 257 | |
| 258 | 258 | void z80scc_device::device_reset() |
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| 269 | 269 | sources. These three sources of interrupts are: 1) Receiver, 2) Transmitter, and 3) External/Status |
| 270 | 270 | conditions. In addition, there are several conditions that may cause these interrupts.*/ |
| 271 | 271 | //------------------------------------------------- |
| 272 | | // z80daisy_irq_state - get interrupt status |
| 272 | // z80daisy_irq_state - get interrupt status |
| 273 | 273 | //------------------------------------------------- |
| 274 | 274 | |
| 275 | 275 | int z80scc_device::z80daisy_irq_state() |
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| 278 | 278 | int i; |
| 279 | 279 | |
| 280 | 280 | LOG(("%s %s A:%d%d%d B:%d%d%d ",FUNCNAME, tag(), |
| 281 | | m_int_state[0], m_int_state[1], m_int_state[2], |
| 282 | | m_int_state[3], m_int_state[4], m_int_state[5])); |
| 281 | m_int_state[0], m_int_state[1], m_int_state[2], |
| 282 | m_int_state[3], m_int_state[4], m_int_state[5])); |
| 283 | 283 | |
| 284 | 284 | // loop over all interrupt sources |
| 285 | 285 | for (i = 0; i < 6; i++) |
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| 300 | 300 | |
| 301 | 301 | |
| 302 | 302 | //------------------------------------------------- |
| 303 | | // z80daisy_irq_ack - interrupt acknowledge |
| 303 | // z80daisy_irq_ack - interrupt acknowledge |
| 304 | 304 | //------------------------------------------------- |
| 305 | 305 | |
| 306 | 306 | int z80scc_device::z80daisy_irq_ack() |
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| 333 | 333 | |
| 334 | 334 | |
| 335 | 335 | //------------------------------------------------- |
| 336 | | // z80daisy_irq_reti - return from interrupt |
| 336 | // z80daisy_irq_reti - return from interrupt |
| 337 | 337 | //------------------------------------------------- |
| 338 | 338 | |
| 339 | 339 | void z80scc_device::z80daisy_irq_reti() |
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| 360 | 360 | |
| 361 | 361 | |
| 362 | 362 | //------------------------------------------------- |
| 363 | | // check_interrupts - |
| 363 | // check_interrupts - |
| 364 | 364 | //------------------------------------------------- |
| 365 | 365 | |
| 366 | 366 | void z80scc_device::check_interrupts() |
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| 372 | 372 | |
| 373 | 373 | |
| 374 | 374 | //------------------------------------------------- |
| 375 | | // reset_interrupts - |
| 375 | // reset_interrupts - |
| 376 | 376 | //------------------------------------------------- |
| 377 | 377 | |
| 378 | 378 | void z80scc_device::reset_interrupts() |
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| 394 | 394 | Interrupt Vector Modification |
| 395 | 395 | V3 V2 V1 Status High/Status Low =0 |
| 396 | 396 | V4 V5 V6 Status High/Status Low =1 |
| 397 | | 0 0 0 Ch B Transmit Buffer Empty |
| 398 | | 0 0 1 Ch B External/Status Change |
| 399 | | 0 1 0 Ch B Receive Char. Available |
| 400 | | 0 1 1 Ch B Special Receive Condition |
| 401 | | 1 0 0 Ch A Transmit Buffer Empty |
| 402 | | 1 0 1 Ch A External/Status Change |
| 403 | | 1 1 0 Ch A Receive Char. Available |
| 404 | | 1 1 1 Ch A Special Receive Condition |
| 397 | 0 0 0 Ch B Transmit Buffer Empty |
| 398 | 0 0 1 Ch B External/Status Change |
| 399 | 0 1 0 Ch B Receive Char. Available |
| 400 | 0 1 1 Ch B Special Receive Condition |
| 401 | 1 0 0 Ch A Transmit Buffer Empty |
| 402 | 1 0 1 Ch A External/Status Change |
| 403 | 1 1 0 Ch A Receive Char. Available |
| 404 | 1 1 1 Ch A Special Receive Condition |
| 405 | 405 | */ |
| 406 | 406 | // Add channel offset according to table above |
| 407 | | src |= (i == CHANNEL_A ? 0x04 : 0x00 ); |
| 407 | src |= (i == CHANNEL_A ? 0x04 : 0x00 ); |
| 408 | 408 | |
| 409 | 409 | // Modify vector according to Hi/lo bit of WR9 |
| 410 | 410 | if (m_chanA->m_wr9 & z80scc_channel::WR9_BIT_SHSL) // Affect V4-V6 |
| 411 | 411 | { |
| 412 | 412 | vec |= src << 4; |
| 413 | 413 | } |
| 414 | | else // Affect V1-V3 |
| 414 | else // Affect V1-V3 |
| 415 | 415 | { |
| 416 | 416 | vec |= src << 1; |
| 417 | 417 | } |
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| 420 | 420 | |
| 421 | 421 | |
| 422 | 422 | //------------------------------------------------- |
| 423 | | // trigger_interrupt - |
| 423 | // trigger_interrupt - |
| 424 | 424 | //------------------------------------------------- |
| 425 | 425 | void z80scc_device::trigger_interrupt(int index, int state) |
| 426 | 426 | { |
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| 438 | 438 | LOG(("Master Interrupt Enable is not set, blocking attempt to interrupt\n")); |
| 439 | 439 | return; |
| 440 | 440 | } |
| 441 | | |
| 441 | |
| 442 | 442 | switch(state) |
| 443 | 443 | { |
| 444 | 444 | case z80scc_channel::INT_RECEIVE: |
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| 477 | 477 | logerror("Attempt to trigger interrupt of unknown origin blocked: %02x on channel %c\n", state, 'A' + index); |
| 478 | 478 | return; |
| 479 | 479 | } |
| 480 | | |
| 480 | |
| 481 | 481 | // Vector modification requested? |
| 482 | 482 | if (m_chanA->m_wr9 & z80scc_channel::WR9_BIT_VIS) |
| 483 | 483 | { |
| 484 | 484 | vector = modify_vector(vector, index, source); |
| 485 | 485 | } |
| 486 | | |
| 486 | |
| 487 | 487 | //LOG(("Z80SCC \"%s\": %c : Interrupt Request %u\n", tag(), 'A' + index, state)); |
| 488 | 488 | |
| 489 | 489 | // update vector register // TODO: What if interrupts are nested? May we loose the modified vector or even get the wrong one? |
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| 500 | 500 | */ |
| 501 | 501 | // Add channel offset to priority according to table above |
| 502 | 502 | priority = prio_level + (index == CHANNEL_A ? 3 : 0 ); |
| 503 | | |
| 503 | |
| 504 | 504 | // trigger interrupt |
| 505 | 505 | m_int_state[priority] |= Z80_DAISY_INT; |
| 506 | | |
| 506 | |
| 507 | 507 | // Based on the fact that prio levels are aligned with the bitorder of rr3 we can do this... |
| 508 | 508 | m_chanA->m_rr3 |= (prio_level << (index == CHANNEL_A ? 3 : 0 )); |
| 509 | | |
| 509 | |
| 510 | 510 | // check for interrupt |
| 511 | 511 | check_interrupts(); |
| 512 | 512 | } |
| 513 | 513 | |
| 514 | 514 | |
| 515 | 515 | //------------------------------------------------- |
| 516 | | // m1_r - interrupt acknowledge |
| 516 | // m1_r - interrupt acknowledge |
| 517 | 517 | //------------------------------------------------- |
| 518 | 518 | |
| 519 | 519 | int z80scc_device::m1_r() |
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| 523 | 523 | |
| 524 | 524 | |
| 525 | 525 | //------------------------------------------------- |
| 526 | | // cd_ba_r - Universal Bus read |
| 526 | // cd_ba_r - Universal Bus read |
| 527 | 527 | //------------------------------------------------- |
| 528 | 528 | READ8_MEMBER( z80scc_device::cd_ba_r ) |
| 529 | 529 | { |
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| 537 | 537 | logerror("Z80SCC cd_ba_r not supported by this device variant, you should probably use combinations of c*_r/w and d*_r/w (see z80scc.h)\n"); |
| 538 | 538 | return 0; |
| 539 | 539 | } |
| 540 | | |
| 541 | | // LOG(("z80scc_device::cd_ba_r ba:%02x cd:%02x\n", ba, cd)); |
| 540 | |
| 541 | // LOG(("z80scc_device::cd_ba_r ba:%02x cd:%02x\n", ba, cd)); |
| 542 | 542 | return cd ? channel->control_read() : channel->data_read(); |
| 543 | 543 | } |
| 544 | 544 | |
| 545 | 545 | //------------------------------------------------- |
| 546 | | // cd_ba_w - Universal Bus write |
| 546 | // cd_ba_w - Universal Bus write |
| 547 | 547 | //------------------------------------------------- |
| 548 | 548 | WRITE8_MEMBER( z80scc_device::cd_ba_w ) |
| 549 | 549 | { |
| 550 | 550 | int ba = BIT(offset, 0); |
| 551 | 551 | int cd = BIT(offset, 1); |
| 552 | 552 | z80scc_channel *channel = ba ? m_chanB : m_chanA; |
| 553 | | |
| 553 | |
| 554 | 554 | /* Expell non-Universal Bus variants */ |
| 555 | 555 | if ( !(m_variant & SET_Z85X3X) ) |
| 556 | 556 | { |
| 557 | 557 | logerror("Z80SCC cd_ba_w not supported by this device variant, you should probably use combinations of c*_r/w and d*_r/w (see z80scc.h)\n"); |
| 558 | 558 | return; |
| 559 | 559 | } |
| 560 | | |
| 561 | | // LOG(("z80scc_device::cd_ba_w ba:%02x cd:%02x\n", ba, cd)); |
| 560 | |
| 561 | // LOG(("z80scc_device::cd_ba_w ba:%02x cd:%02x\n", ba, cd)); |
| 562 | 562 | if (cd) |
| 563 | 563 | channel->control_write(data); |
| 564 | 564 | else |
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| 567 | 567 | |
| 568 | 568 | |
| 569 | 569 | //------------------------------------------------- |
| 570 | | // ba_cd_r - Universal Bus read |
| 570 | // ba_cd_r - Universal Bus read |
| 571 | 571 | //------------------------------------------------- |
| 572 | 572 | |
| 573 | 573 | READ8_MEMBER( z80scc_device::ba_cd_r ) |
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| 575 | 575 | int ba = BIT(offset, 1); |
| 576 | 576 | int cd = BIT(offset, 0); |
| 577 | 577 | z80scc_channel *channel = ba ? m_chanB : m_chanA; |
| 578 | | |
| 578 | |
| 579 | 579 | /* Expell non-Universal Bus variants */ |
| 580 | 580 | if ( !(m_variant & SET_Z85X3X) ) |
| 581 | 581 | { |
| 582 | 582 | logerror("Z80SCC ba_cd_r not supported by this device variant, you should probably use combinations of c*_r/w and d*_r/w (see z80scc.h)\n"); |
| 583 | 583 | return 0; |
| 584 | 584 | } |
| 585 | | |
| 586 | | // LOG(("z80scc_device::ba_cd_r ba:%02x cd:%02x\n", ba, cd)); |
| 585 | |
| 586 | // LOG(("z80scc_device::ba_cd_r ba:%02x cd:%02x\n", ba, cd)); |
| 587 | 587 | return cd ? channel->control_read() : channel->data_read(); |
| 588 | 588 | } |
| 589 | 589 | |
| 590 | 590 | |
| 591 | 591 | //------------------------------------------------- |
| 592 | | // ba_cd_w - |
| 592 | // ba_cd_w - |
| 593 | 593 | //------------------------------------------------- |
| 594 | 594 | |
| 595 | 595 | WRITE8_MEMBER( z80scc_device::ba_cd_w ) |
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| 597 | 597 | int ba = BIT(offset, 1); |
| 598 | 598 | int cd = BIT(offset, 0); |
| 599 | 599 | z80scc_channel *channel = ba ? m_chanB : m_chanA; |
| 600 | | |
| 600 | |
| 601 | 601 | /* Expell non-Universal Bus variants */ |
| 602 | 602 | if ( !(m_variant & SET_Z85X3X) ) |
| 603 | 603 | { |
| 604 | 604 | logerror("Z80SCC ba_cd_w not supported by this device variant, you should probably use combinations of c*_r/w and d*_r/w (see z80scc.h)\n"); |
| 605 | 605 | return; |
| 606 | 606 | } |
| 607 | | |
| 607 | |
| 608 | 608 | LOG(("z80scc_device::ba_cd_w ba:%02x cd:%02x\n", ba, cd)); |
| 609 | 609 | |
| 610 | 610 | if (cd) |
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| 614 | 614 | } |
| 615 | 615 | |
| 616 | 616 | //************************************************************************** |
| 617 | | // SCC CHANNEL |
| 617 | // SCC CHANNEL |
| 618 | 618 | //************************************************************************** |
| 619 | 619 | |
| 620 | 620 | //------------------------------------------------- |
| 621 | | // SCC_channel - constructor |
| 621 | // SCC_channel - constructor |
| 622 | 622 | //------------------------------------------------- |
| 623 | 623 | |
| 624 | 624 | z80scc_channel::z80scc_channel(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
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| 641 | 641 | LOG(("%s\n",FUNCNAME)); |
| 642 | 642 | |
| 643 | 643 | // Reset all registers |
| 644 | | m_rr0 = m_rr1 = m_rr2 = m_rr3 = m_rr4 = m_rr5 = m_rr6 = m_rr7 = m_rr8 |
| 644 | m_rr0 = m_rr1 = m_rr2 = m_rr3 = m_rr4 = m_rr5 = m_rr6 = m_rr7 = m_rr8 |
| 645 | 645 | = m_rr9 = m_rr10 = m_rr11 = m_rr12 = m_rr13 = m_rr14 = m_rr15 = 0; |
| 646 | | m_wr0 = m_wr1 = m_wr2 = m_wr3 = m_wr4 = m_wr5 = m_wr6 = m_wr7 = m_wr8 |
| 646 | m_wr0 = m_wr1 = m_wr2 = m_wr3 = m_wr4 = m_wr5 = m_wr6 = m_wr7 = m_wr8 |
| 647 | 647 | = m_wr9 = m_wr10 = m_wr11 = m_wr12 = m_wr13 = m_wr14 = m_wr15 = 0; |
| 648 | | |
| 648 | |
| 649 | 649 | for (int i = 0; i < 3; i++) // TODO adapt to SCC fifos |
| 650 | 650 | { |
| 651 | 651 | m_rx_data_fifo[i] = 0; |
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| 655 | 655 | |
| 656 | 656 | |
| 657 | 657 | //------------------------------------------------- |
| 658 | | // start - channel startup |
| 658 | // start - channel startup |
| 659 | 659 | //------------------------------------------------- |
| 660 | 660 | |
| 661 | 661 | void z80scc_channel::device_start() |
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| 665 | 665 | m_index = m_uart->get_channel_index(this); |
| 666 | 666 | |
| 667 | 667 | m_uart->m_wr0_ptrbits = 0; |
| 668 | | |
| 668 | |
| 669 | 669 | m_rx_fifo_sz = (m_uart->m_variant & SET_ESCC) ? 8 : 3; |
| 670 | 670 | m_rx_fifo_wp = m_rx_fifo_rp = 0; |
| 671 | | |
| 671 | |
| 672 | 672 | // state saving |
| 673 | 673 | save_item(NAME(m_rr0)); |
| 674 | 674 | save_item(NAME(m_rr1)); |
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| 725 | 725 | |
| 726 | 726 | |
| 727 | 727 | //------------------------------------------------- |
| 728 | | // reset - reset channel status |
| 728 | // reset - reset channel status |
| 729 | 729 | //------------------------------------------------- |
| 730 | 730 | |
| 731 | 731 | void z80scc_channel::device_reset() |
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| 737 | 737 | transmit_register_reset(); |
| 738 | 738 | |
| 739 | 739 | // Soft/Channel Reset values according to SCC users manual |
| 740 | | m_wr0 = 0x00; |
| 740 | m_wr0 = 0x00; |
| 741 | 741 | m_wr1 &= 0x24; |
| 742 | 742 | m_wr3 &= 0x01; |
| 743 | 743 | m_wr4 |= 0x04; |
| 744 | 744 | m_wr5 &= 0x61; |
| 745 | 745 | if (m_uart->m_variant & (z80scc_device::TYPE_SCC85C30 | SET_ESCC)) |
| 746 | 746 | m_wr7 = 0x20; |
| 747 | | m_wr9 &= 0xdf; // WR9 has a different hard reset value |
| 747 | m_wr9 &= 0xdf; // WR9 has a different hard reset value |
| 748 | 748 | m_wr10 &= 0x60; // WR10 has a different hard reset value |
| 749 | 749 | m_wr11 &= 0xff; // WR11 has a different hard reset value |
| 750 | 750 | m_wr14 &= 0xc3; // WR14 has a different hard reset value |
| 751 | 751 | m_wr14 |= 0x20; |
| 752 | | m_wr15 = 0xf8; |
| 752 | m_wr15 = 0xf8; |
| 753 | 753 | m_rr0 &= 0xfc; |
| 754 | 754 | m_rr0 |= 0x44; |
| 755 | 755 | m_rr1 &= 0x07; |
| 756 | 756 | m_rr1 |= 0x06; |
| 757 | | m_rr3 = 0x00; |
| 757 | m_rr3 = 0x00; |
| 758 | 758 | m_rr10 &= 0x40; |
| 759 | 759 | |
| 760 | 760 | #if 1 // old reset code |
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| 786 | 786 | |
| 787 | 787 | |
| 788 | 788 | //------------------------------------------------- |
| 789 | | // tra_callback - |
| 789 | // tra_callback - |
| 790 | 790 | //------------------------------------------------- |
| 791 | 791 | |
| 792 | 792 | void z80scc_channel::tra_callback() |
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| 812 | 812 | else if (!is_transmit_register_empty()) |
| 813 | 813 | { |
| 814 | 814 | int db = transmit_register_get_data_bit(); |
| 815 | | |
| 815 | |
| 816 | 816 | LOG(("%" I64FMT "d %s() \"%s \"Channel %c transmit data bit %d m_wr5:%02x\n", machine().firstcpu->total_cycles(), FUNCNAME, m_owner->tag(), 'A' + m_index, db, m_wr5)); |
| 817 | 817 | // transmit data |
| 818 | 818 | if (m_index == z80scc_device::CHANNEL_A) |
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| 829 | 829 | |
| 830 | 830 | |
| 831 | 831 | //------------------------------------------------- |
| 832 | | // tra_complete - |
| 832 | // tra_complete - |
| 833 | 833 | //------------------------------------------------- |
| 834 | 834 | |
| 835 | 835 | void z80scc_channel::tra_complete() |
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| 880 | 880 | |
| 881 | 881 | |
| 882 | 882 | //------------------------------------------------- |
| 883 | | // rcv_callback - |
| 883 | // rcv_callback - |
| 884 | 884 | //------------------------------------------------- |
| 885 | 885 | |
| 886 | 886 | void z80scc_channel::rcv_callback() |
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| 900 | 900 | |
| 901 | 901 | |
| 902 | 902 | //------------------------------------------------- |
| 903 | | // rcv_complete - |
| 903 | // rcv_complete - |
| 904 | 904 | //------------------------------------------------- |
| 905 | 905 | |
| 906 | 906 | void z80scc_channel::rcv_complete() |
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| 915 | 915 | |
| 916 | 916 | |
| 917 | 917 | //------------------------------------------------- |
| 918 | | // get_clock_mode - get clock divisor |
| 918 | // get_clock_mode - get clock divisor |
| 919 | 919 | //------------------------------------------------- |
| 920 | 920 | |
| 921 | 921 | int z80scc_channel::get_clock_mode() |
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| 924 | 924 | |
| 925 | 925 | switch (m_wr4 & WR4_CLOCK_RATE_MASK) |
| 926 | 926 | { |
| 927 | | case WR4_CLOCK_RATE_X1: clocks = 1; break; |
| 928 | | case WR4_CLOCK_RATE_X16: clocks = 16; break; |
| 929 | | case WR4_CLOCK_RATE_X32: clocks = 32; break; |
| 930 | | case WR4_CLOCK_RATE_X64: clocks = 64; break; |
| 927 | case WR4_CLOCK_RATE_X1: clocks = 1; break; |
| 928 | case WR4_CLOCK_RATE_X16: clocks = 16; break; |
| 929 | case WR4_CLOCK_RATE_X32: clocks = 32; break; |
| 930 | case WR4_CLOCK_RATE_X64: clocks = 64; break; |
| 931 | 931 | } |
| 932 | 932 | |
| 933 | 933 | return clocks; |
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| 955 | 955 | |
| 956 | 956 | void z80scc_channel::update_rts() |
| 957 | 957 | { |
| 958 | | // LOG(("%s(%d) \"%s\": %c \n", FUNCNAME, state, m_owner->tag(), 'A' + m_index)); |
| 958 | // LOG(("%s(%d) \"%s\": %c \n", FUNCNAME, state, m_owner->tag(), 'A' + m_index)); |
| 959 | 959 | if (m_wr5 & WR5_RTS) |
| 960 | 960 | { |
| 961 | 961 | // when the RTS bit is set, the _RTS output goes low |
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| 973 | 973 | } |
| 974 | 974 | |
| 975 | 975 | //------------------------------------------------- |
| 976 | | // get_stop_bits - get number of stop bits |
| 976 | // get_stop_bits - get number of stop bits |
| 977 | 977 | //------------------------------------------------- |
| 978 | 978 | |
| 979 | 979 | device_serial_interface::stop_bits_t z80scc_channel::get_stop_bits() |
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| 990 | 990 | |
| 991 | 991 | |
| 992 | 992 | //------------------------------------------------- |
| 993 | | // get_rx_word_length - get receive word length |
| 993 | // get_rx_word_length - get receive word length |
| 994 | 994 | //------------------------------------------------- |
| 995 | 995 | |
| 996 | 996 | int z80scc_channel::get_rx_word_length() |
| r249940 | r249941 | |
|---|
| 999 | 999 | |
| 1000 | 1000 | switch (m_wr3 & WR3_RX_WORD_LENGTH_MASK) |
| 1001 | 1001 | { |
| 1002 | | case WR3_RX_WORD_LENGTH_5: bits = 5; break; |
| 1003 | | case WR3_RX_WORD_LENGTH_6: bits = 6; break; |
| 1004 | | case WR3_RX_WORD_LENGTH_7: bits = 7; break; |
| 1005 | | case WR3_RX_WORD_LENGTH_8: bits = 8; break; |
| 1002 | case WR3_RX_WORD_LENGTH_5: bits = 5; break; |
| 1003 | case WR3_RX_WORD_LENGTH_6: bits = 6; break; |
| 1004 | case WR3_RX_WORD_LENGTH_7: bits = 7; break; |
| 1005 | case WR3_RX_WORD_LENGTH_8: bits = 8; break; |
| 1006 | 1006 | } |
| 1007 | 1007 | |
| 1008 | 1008 | return bits; |
| r249940 | r249941 | |
|---|
| 1010 | 1010 | |
| 1011 | 1011 | |
| 1012 | 1012 | //------------------------------------------------- |
| 1013 | | // get_tx_word_length - get transmit word length |
| 1013 | // get_tx_word_length - get transmit word length |
| 1014 | 1014 | //------------------------------------------------- |
| 1015 | 1015 | |
| 1016 | 1016 | int z80scc_channel::get_tx_word_length() |
| r249940 | r249941 | |
|---|
| 1019 | 1019 | |
| 1020 | 1020 | switch (m_wr5 & WR5_TX_WORD_LENGTH_MASK) |
| 1021 | 1021 | { |
| 1022 | | case WR5_TX_WORD_LENGTH_5: bits = 5; break; |
| 1023 | | case WR5_TX_WORD_LENGTH_6: bits = 6; break; |
| 1024 | | case WR5_TX_WORD_LENGTH_7: bits = 7; break; |
| 1025 | | case WR5_TX_WORD_LENGTH_8: bits = 8; break; |
| 1022 | case WR5_TX_WORD_LENGTH_5: bits = 5; break; |
| 1023 | case WR5_TX_WORD_LENGTH_6: bits = 6; break; |
| 1024 | case WR5_TX_WORD_LENGTH_7: bits = 7; break; |
| 1025 | case WR5_TX_WORD_LENGTH_8: bits = 8; break; |
| 1026 | 1026 | } |
| 1027 | 1027 | |
| 1028 | 1028 | return bits; |
| r249940 | r249941 | |
|---|
| 1231 | 1231 | } |
| 1232 | 1232 | |
| 1233 | 1233 | //------------------------------------------------- |
| 1234 | | // control_read - read control register |
| 1234 | // control_read - read control register |
| 1235 | 1235 | //------------------------------------------------- |
| 1236 | 1236 | UINT8 z80scc_channel::control_read() |
| 1237 | 1237 | { |
| r249940 | r249941 | |
|---|
| 1239 | 1239 | int reg = m_uart->m_wr0_ptrbits; //m_wr0; |
| 1240 | 1240 | int regmask = (WR0_REGISTER_MASK | (m_uart->m_wr0_ptrbits & WR0_POINT_HIGH)); |
| 1241 | 1241 | |
| 1242 | | // LOG(("%s(%02x) reg %02x, regmask %02x, WR0 %02x\n", __func__, data, reg, regmask, m_wr0)); |
| 1242 | // LOG(("%s(%02x) reg %02x, regmask %02x, WR0 %02x\n", __func__, data, reg, regmask, m_wr0)); |
| 1243 | 1243 | m_uart->m_wr0_ptrbits = 0; |
| 1244 | 1244 | reg &= regmask; |
| 1245 | 1245 | |
| r249940 | r249941 | |
|---|
| 1252 | 1252 | /* TODO. Sort out 80X30 limitations in register access */ |
| 1253 | 1253 | switch (reg) |
| 1254 | 1254 | { |
| 1255 | | case REG_RR0_STATUS: data = do_sccreg_rr0(); break; // TODO: verify handling of SCC specific bits: D6 and D1 |
| 1256 | | case REG_RR1_SPEC_RCV_COND: data = do_sccreg_rr1(); break; |
| 1255 | case REG_RR0_STATUS: data = do_sccreg_rr0(); break; // TODO: verify handling of SCC specific bits: D6 and D1 |
| 1256 | case REG_RR1_SPEC_RCV_COND: data = do_sccreg_rr1(); break; |
| 1257 | 1257 | case REG_RR2_INTERRUPT_VECT: data = do_sccreg_rr2(); break; // Channel dependent and SCC specific handling compared to SIO |
| 1258 | 1258 | /* registers 3-7 are specific to SCC. TODO: Check variant and log/stop misuse */ |
| 1259 | 1259 | case REG_RR3_INTERUPPT_PEND: data = do_sccreg_rr3(); break; |
| 1260 | | case REG_RR4_WR4_OR_RR0: data = do_sccreg_rr4(); break; |
| 1261 | | case REG_RR5_WR5_OR_RR0: data = do_sccreg_rr5(); break; |
| 1262 | | case REG_RR6_LSB_OR_RR2: data = do_sccreg_rr6(); break; |
| 1263 | | case REG_RR7_MSB_OR_RR3: data = do_sccreg_rr7(); break; |
| 1260 | case REG_RR4_WR4_OR_RR0: data = do_sccreg_rr4(); break; |
| 1261 | case REG_RR5_WR5_OR_RR0: data = do_sccreg_rr5(); break; |
| 1262 | case REG_RR6_LSB_OR_RR2: data = do_sccreg_rr6(); break; |
| 1263 | case REG_RR7_MSB_OR_RR3: data = do_sccreg_rr7(); break; |
| 1264 | 1264 | /* registers 8-15 are specific to SCC */ |
| 1265 | | case REG_RR8_RECEIVE_DATA: data = data_read(); break; |
| 1266 | | case REG_RR9_WR3_OR_RR13: data = do_sccreg_rr9(); break; |
| 1267 | | case REG_RR10_MISC_STATUS: data = do_sccreg_rr10(); break; |
| 1268 | | case REG_RR11_WR10_OR_RR15: data = do_sccreg_rr11(); break; |
| 1265 | case REG_RR8_RECEIVE_DATA: data = data_read(); break; |
| 1266 | case REG_RR9_WR3_OR_RR13: data = do_sccreg_rr9(); break; |
| 1267 | case REG_RR10_MISC_STATUS: data = do_sccreg_rr10(); break; |
| 1268 | case REG_RR11_WR10_OR_RR15: data = do_sccreg_rr11(); break; |
| 1269 | 1269 | case REG_RR12_LO_TIME_CONST: data = do_sccreg_rr12(); break; |
| 1270 | 1270 | case REG_RR13_HI_TIME_CONST: data = do_sccreg_rr13(); break; |
| 1271 | | case REG_RR14_WR7_OR_R10: data = do_sccreg_rr14(); break; |
| 1271 | case REG_RR14_WR7_OR_R10: data = do_sccreg_rr14(); break; |
| 1272 | 1272 | case REG_RR15_WR15_EXT_STAT: data = do_sccreg_rr15(); break; |
| 1273 | 1273 | default: |
| 1274 | 1274 | logerror("Z80SCC \"%s\" %s: %c : Unsupported RRx register:%02x\n", m_owner->tag(), __func__, 'A' + m_index, reg); |
| r249940 | r249941 | |
|---|
| 1308 | 1308 | m_wr0 = data; |
| 1309 | 1309 | m_uart->m_wr0_ptrbits = data & WR0_REGISTER_MASK; |
| 1310 | 1310 | |
| 1311 | | /* Sort out SCC specific behaviours from legacy SIO behaviour */ |
| 1311 | /* Sort out SCC specific behaviours from legacy SIO behaviour */ |
| 1312 | 1312 | /* WR0_Z_* are Z80X30 specific commands */ |
| 1313 | 1313 | switch (data & WR0_COMMAND_MASK) |
| 1314 | 1314 | { |
| r249940 | r249941 | |
|---|
| 1340 | 1340 | External/Status interrupt. However, if this second status change does not persist |
| 1341 | 1341 | (there are two transitions), another interrupt is not generated. Exceptions to this |
| 1342 | 1342 | rule are detailed in the RR0 description.*/ |
| 1343 | | // do_sccreg_wr0(data); |
| 1343 | // do_sccreg_wr0(data); |
| 1344 | 1344 | if (!m_zc) |
| 1345 | 1345 | { |
| 1346 | 1346 | m_rr0 |= RR0_ZC; |
| r249940 | r249941 | |
|---|
| 1441 | 1441 | LOG(("- Wait/Ready Enable %u\n", (data & WR1_WRDY_ENABLE) ? 1 : 0)); |
| 1442 | 1442 | LOG(("- Wait/Ready Function %s\n", (data & WR1_WRDY_FUNCTION) ? "Ready" : "Wait")); |
| 1443 | 1443 | LOG(("- Wait/Ready on %s\n", (data & WR1_WRDY_ON_RX_TX) ? "Receive" : "Transmit")); |
| 1444 | | |
| 1444 | |
| 1445 | 1445 | switch (data & WR1_RX_INT_MODE_MASK) |
| 1446 | 1446 | { |
| 1447 | 1447 | case WR1_RX_INT_DISABLE: |
| 1448 | 1448 | LOG(("- Receiver Interrupt Disabled\n")); |
| 1449 | 1449 | break; |
| 1450 | | |
| 1450 | |
| 1451 | 1451 | case WR1_RX_INT_FIRST: |
| 1452 | 1452 | LOG(("- Receiver Interrupt on First Character\n")); |
| 1453 | 1453 | break; |
| 1454 | | |
| 1454 | |
| 1455 | 1455 | case WR1_RX_INT_ALL_PARITY: |
| 1456 | 1456 | LOG(("- Receiver Interrupt on All Characters, Parity Affects Vector\n")); |
| 1457 | 1457 | break; |
| 1458 | | |
| 1458 | |
| 1459 | 1459 | case WR1_RX_INT_ALL: |
| 1460 | 1460 | LOG(("- Receiver Interrupt on All Characters\n")); |
| 1461 | 1461 | break; |
| r249940 | r249941 | |
|---|
| 1472 | 1472 | m_wr2 = data; |
| 1473 | 1473 | m_uart->m_chanA->m_rr2 = data; |
| 1474 | 1474 | m_uart->m_chanB->m_rr2 = data; /* TODO: Sort out the setting of ChanB depending on bits in WR9 */ |
| 1475 | | |
| 1475 | |
| 1476 | 1476 | m_uart->check_interrupts(); |
| 1477 | 1477 | } |
| 1478 | 1478 | |
| r249940 | r249941 | |
|---|
| 1589 | 1589 | /SYNC pin is unavailable for other use. The /SYNC signal is forced to zero internally. A hardware |
| 1590 | 1590 | reset forces /NO XTAL. (At least 20 ms should be allowed after this bit is set to allow the oscillator |
| 1591 | 1591 | to stabilize.)*/ |
| 1592 | | LOG((" Clock type %s\n", data & WR11_RCVCLK_TYPE ? "Crystal oscillator between RTxC and /SYNC pins" : "TTL level on RTxC pin")); |
| 1592 | LOG((" Clock type %s\n", data & WR11_RCVCLK_TYPE ? "Crystal oscillator between RTxC and /SYNC pins" : "TTL level on RTxC pin")); |
| 1593 | 1593 | /*Bits 6 and 5: Receiver Clock select bits 1 and 0 |
| 1594 | 1594 | These bits determine the source of the receive clock as listed below. They do not |
| 1595 | 1595 | interfere with any of the modes of operation in the SCC, but simply control a multiplexer just |
| 1596 | 1596 | before the internal receive clock input. A hardware reset forces the receive clock to come from the |
| 1597 | 1597 | /RTxC pin.*/ |
| 1598 | | LOG((" Receive clock source is: ")); |
| 1598 | LOG((" Receive clock source is: ")); |
| 1599 | 1599 | switch (data & WR11_RCVCLK_SRC_MASK) |
| 1600 | 1600 | { |
| 1601 | 1601 | case WR11_RCVCLK_SRC_RTXC: LOG(("RTxC\n")); break; |
| r249940 | r249941 | |
|---|
| 1611 | 1611 | degrees the output of the DPLL used by the receiver. This makes the received and transmitted bit |
| 1612 | 1612 | cells occur simultaneously, neglecting delays. A hardware reset selects the /TRxC pin as the |
| 1613 | 1613 | source of the transmit clocks.*/ |
| 1614 | | LOG((" Transmit clock source is: ")); |
| 1614 | LOG((" Transmit clock source is: ")); |
| 1615 | 1615 | switch (data & WR11_TRACLK_SRC_MASK) |
| 1616 | 1616 | { |
| 1617 | 1617 | case WR11_TRACLK_SRC_RTXC: LOG(("RTxC\n")); break; |
| r249940 | r249941 | |
|---|
| 1626 | 1626 | transmit clock is programmed to come from the /TRxC pin, /TRxC is an input, regardless of the |
| 1627 | 1627 | state of this bit. The /TRxC pin is also an input if this bit is set to 0. A hardware reset forces this bit |
| 1628 | 1628 | to 0.*/ |
| 1629 | | LOG((" TRxC pin is %s\n", data & WR11_TRXC_DIRECTION ? "Output" : "Input")); |
| 1629 | LOG((" TRxC pin is %s\n", data & WR11_TRXC_DIRECTION ? "Output" : "Input")); |
| 1630 | 1630 | /*Bits 1 and 0: /TRxC Output Source select bits 1 and 0 |
| 1631 | 1631 | These bits determine the signal to be echoed out of the SCC via the /TRxC pin as listed in Table |
| 1632 | 1632 | on page 167. No signal is produced if /TRxC has been programmed as the source of either the |
| r249940 | r249941 | |
|---|
| 1634 | 1634 | If the XTAL oscillator output is programmed to be echoed, and the XTAL oscillator is not enabled, |
| 1635 | 1635 | the /TRxC pin goes High. The DPLL signal that is echoed is the DPLL signal used by the receiver. |
| 1636 | 1636 | Hardware reset selects the XTAL oscillator as the output source*/ |
| 1637 | | LOG((" TRxC clock source is: ")); |
| 1637 | LOG((" TRxC clock source is: ")); |
| 1638 | 1638 | switch (data & WR11_TRXSRC_SRC_MASK) |
| 1639 | 1639 | { |
| 1640 | 1640 | case WR11_TRXSRC_SRC_XTAL: LOG(("the Oscillator\n")); break; |
| r249940 | r249941 | |
|---|
| 1656 | 1656 | the desired rate in bits per second and the BR clock period in seconds. This formula is derived |
| 1657 | 1657 | because the counter decrements from N down to zero-plus-one-cycle for reloading the time constant. |
| 1658 | 1658 | This is then fed to a toggle flip-flop to make the output a square wave. |
| 1659 | | |
| 1659 | |
| 1660 | 1660 | Time Constant = Clock Frequency / (2 * Desired Rate * Baud Rate Clock Period) - 2 |
| 1661 | | |
| 1661 | |
| 1662 | 1662 | */ |
| 1663 | 1663 | void z80scc_channel::do_sccreg_wr12(UINT8 data) |
| 1664 | 1664 | { |
| r249940 | r249941 | |
|---|
| 1670 | 1670 | void z80scc_channel::do_sccreg_wr13(UINT8 data) |
| 1671 | 1671 | { |
| 1672 | 1672 | m_wr13 = data; |
| 1673 | | LOG(("Z80SCC \"%s\": %c : %s %02x High byte of Time Constant for Baudrate generator - not implemented \n", m_owner->tag(), 'A' + m_index, __func__, data)); |
| 1673 | LOG(("Z80SCC \"%s\": %c : %s %02x High byte of Time Constant for Baudrate generator - not implemented \n", m_owner->tag(), 'A' + m_index, __func__, data)); |
| 1674 | 1674 | } |
| 1675 | 1675 | |
| 1676 | 1676 | /* |
| r249940 | r249941 | |
|---|
| 1743 | 1743 | interrupt. This is true, even if an External/Status condition is pending at the time the bit is set*/ |
| 1744 | 1744 | void z80scc_channel::do_sccreg_wr15(UINT8 data) |
| 1745 | 1745 | { |
| 1746 | | LOG(("%s(%d) \"%s\": %c : External/Status Control Bits - not implemented\n", |
| 1747 | | FUNCNAME, data, m_owner->tag(), 'A' + m_index)); |
| 1746 | LOG(("%s(%d) \"%s\": %c : External/Status Control Bits - not implemented\n", |
| 1747 | FUNCNAME, data, m_owner->tag(), 'A' + m_index)); |
| 1748 | 1748 | m_wr15 = data; |
| 1749 | 1749 | } |
| 1750 | 1750 | |
| 1751 | 1751 | /*TODO: Z80X30 Register Access |
| 1752 | 1752 | ---------------------------- |
| 1753 | | The Shift Right/Shift Left bit in the Channel B WR0 controls which bits are decoded to form the register |
| 1753 | The Shift Right/Shift Left bit in the Channel B WR0 controls which bits are decoded to form the register |
| 1754 | 1754 | address. See do_sccreg_wr0() for details */ |
| 1755 | 1755 | |
| 1756 | 1756 | /*Z85X30 Register Access |
| r249940 | r249941 | |
|---|
| 1771 | 1771 | RR0 may also be accessed in a single cycle. That is, it is not necessary to write the pointer bits |
| 1772 | 1772 | with 0 before accessing WR0 or RR0.*/ |
| 1773 | 1773 | //------------------------------------------------- |
| 1774 | | // control_write - write control register |
| 1774 | // control_write - write control register |
| 1775 | 1775 | //------------------------------------------------- |
| 1776 | 1776 | |
| 1777 | 1777 | void z80scc_channel::control_write(UINT8 data) |
| r249940 | r249941 | |
|---|
| 1782 | 1782 | m_uart->m_wr0_ptrbits = 0; // The "Point High" command is only valid for one access |
| 1783 | 1783 | |
| 1784 | 1784 | reg &= regmask; |
| 1785 | | |
| 1785 | |
| 1786 | 1786 | if (reg != 0) |
| 1787 | 1787 | { |
| 1788 | 1788 | // mask out register index |
| 1789 | 1789 | m_wr0 &= ~regmask; |
| 1790 | 1790 | } |
| 1791 | | |
| 1791 | |
| 1792 | 1792 | LOG(("\n%s(%02x) reg %02x, regmask %02x\n", FUNCNAME, data, reg, regmask)); |
| 1793 | | |
| 1793 | |
| 1794 | 1794 | /* TODO. Sort out 80X30 & other SCC variants limitations in register access */ |
| 1795 | 1795 | switch (reg) |
| 1796 | 1796 | { |
| 1797 | | case REG_WR0_COMMAND_REGPT: do_sccreg_wr0(data); ;break; |
| 1797 | case REG_WR0_COMMAND_REGPT: do_sccreg_wr0(data); ;break; |
| 1798 | 1798 | case REG_WR1_INT_DMA_ENABLE: do_sccreg_wr1(data); m_uart->check_interrupts(); break; |
| 1799 | | case REG_WR2_INT_VECTOR: do_sccreg_wr2(data); break; |
| 1799 | case REG_WR2_INT_VECTOR: do_sccreg_wr2(data); break; |
| 1800 | 1800 | case REG_WR3_RX_CONTROL: |
| 1801 | 1801 | do_sccreg_wr3(data); |
| 1802 | 1802 | update_serial(); |
| r249940 | r249941 | |
|---|
| 1816 | 1816 | break; |
| 1817 | 1817 | case REG_WR6_SYNC_OR_SDLC_A: do_sccreg_wr6(data); break; |
| 1818 | 1818 | case REG_WR7_SYNC_OR_SDLC_F: do_sccreg_wr7(data); break; |
| 1819 | | case REG_WR8_TRANSMIT_DATA: do_sccreg_wr8(data); break; |
| 1819 | case REG_WR8_TRANSMIT_DATA: do_sccreg_wr8(data); break; |
| 1820 | 1820 | case REG_WR9_MASTER_INT_CTRL: do_sccreg_wr9(data); break; |
| 1821 | 1821 | case REG_WR10_MSC_RX_TX_CTRL: do_sccreg_wr10(data); break; |
| 1822 | | case REG_WR11_CLOCK_MODES: do_sccreg_wr11(data); break; |
| 1823 | | case REG_WR12_LO_BAUD_GEN: do_sccreg_wr12(data); break; |
| 1824 | | case REG_WR13_HI_BAUD_GEN: do_sccreg_wr13(data); break; |
| 1825 | | case REG_WR14_MISC_CTRL: do_sccreg_wr14(data); break; |
| 1822 | case REG_WR11_CLOCK_MODES: do_sccreg_wr11(data); break; |
| 1823 | case REG_WR12_LO_BAUD_GEN: do_sccreg_wr12(data); break; |
| 1824 | case REG_WR13_HI_BAUD_GEN: do_sccreg_wr13(data); break; |
| 1825 | case REG_WR14_MISC_CTRL: do_sccreg_wr14(data); break; |
| 1826 | 1826 | case REG_WR15_EXT_ST_INT_CTRL:do_sccreg_wr15(data); break; |
| 1827 | 1827 | default: |
| 1828 | 1828 | logerror("Z80SCC \"%s\": %c : Unsupported WRx register:%02x\n", m_owner->tag(), 'A' + m_index, reg); |
| r249940 | r249941 | |
|---|
| 1831 | 1831 | |
| 1832 | 1832 | |
| 1833 | 1833 | //------------------------------------------------- |
| 1834 | | // data_read - read data register from fifo |
| 1834 | // data_read - read data register from fifo |
| 1835 | 1835 | //------------------------------------------------- |
| 1836 | 1836 | |
| 1837 | 1837 | UINT8 z80scc_channel::data_read() |
| r249940 | r249941 | |
|---|
| 1855 | 1855 | FIFO to preserve the status, it is necessary to issue the Error Reset command to |
| 1856 | 1856 | unlock it. Only the exit location of the FIFO is locked allowing more data to be |
| 1857 | 1857 | received into the other bytes of the Receive FIFO.*/ |
| 1858 | | |
| 1858 | |
| 1859 | 1859 | // load data from the FIFO |
| 1860 | 1860 | data = m_rx_fifo_rp_data(); |
| 1861 | | |
| 1861 | |
| 1862 | 1862 | // load error status from the FIFO |
| 1863 | 1863 | m_rr1 = (m_rr1 & ~(RR1_CRC_FRAMING_ERROR | RR1_RX_OVERRUN_ERROR | RR1_PARITY_ERROR)) | m_rx_error_fifo[m_rx_fifo_rp]; |
| 1864 | | |
| 1864 | |
| 1865 | 1865 | // trigger interrup and lock the fifo if an error is present |
| 1866 | 1866 | if (m_rr1 & (RR1_CRC_FRAMING_ERROR | RR1_RX_OVERRUN_ERROR | RR1_PARITY_ERROR)) |
| 1867 | 1867 | { |
| r249940 | r249941 | |
|---|
| 1925 | 1925 | } |
| 1926 | 1926 | } |
| 1927 | 1927 | |
| 1928 | | READ8_MEMBER (z80scc_device::da_r) { return m_chanA->data_read(); } |
| 1928 | READ8_MEMBER (z80scc_device::da_r) { return m_chanA->data_read(); } |
| 1929 | 1929 | WRITE8_MEMBER (z80scc_device::da_w) { m_chanA->data_write(data); } |
| 1930 | | READ8_MEMBER (z80scc_device::db_r) { return m_chanB->data_read(); } |
| 1930 | READ8_MEMBER (z80scc_device::db_r) { return m_chanB->data_read(); } |
| 1931 | 1931 | WRITE8_MEMBER (z80scc_device::db_w) { m_chanB->data_write(data); } |
| 1932 | 1932 | |
| 1933 | 1933 | //------------------------------------------------- |
| 1934 | | // data_write - write data register |
| 1934 | // data_write - write data register |
| 1935 | 1935 | //------------------------------------------------- |
| 1936 | 1936 | void z80scc_channel::data_write(UINT8 data) |
| 1937 | 1937 | { |
| r249940 | r249941 | |
|---|
| 1962 | 1962 | |
| 1963 | 1963 | |
| 1964 | 1964 | //------------------------------------------------- |
| 1965 | | // receive_data - receive data word into fifo |
| 1965 | // receive_data - receive data word into fifo |
| 1966 | 1966 | //------------------------------------------------- |
| 1967 | 1967 | |
| 1968 | 1968 | void z80scc_channel::receive_data(UINT8 data) |
| r249940 | r249941 | |
|---|
| 2013 | 2013 | |
| 2014 | 2014 | |
| 2015 | 2015 | //------------------------------------------------- |
| 2016 | | // cts_w - clear to send handler |
| 2016 | // cts_w - clear to send handler |
| 2017 | 2017 | //------------------------------------------------- |
| 2018 | 2018 | |
| 2019 | 2019 | WRITE_LINE_MEMBER( z80scc_channel::cts_w ) |
| r249940 | r249941 | |
|---|
| 2052 | 2052 | |
| 2053 | 2053 | |
| 2054 | 2054 | //------------------------------------------------- |
| 2055 | | // dcd_w - data carrier detected handler |
| 2055 | // dcd_w - data carrier detected handler |
| 2056 | 2056 | //------------------------------------------------- |
| 2057 | 2057 | |
| 2058 | 2058 | WRITE_LINE_MEMBER( z80scc_channel::dcd_w ) |
| r249940 | r249941 | |
|---|
| 2090 | 2090 | |
| 2091 | 2091 | |
| 2092 | 2092 | //------------------------------------------------- |
| 2093 | | // ri_w - ring indicator handler |
| 2093 | // ri_w - ring indicator handler |
| 2094 | 2094 | //------------------------------------------------- |
| 2095 | 2095 | |
| 2096 | 2096 | WRITE_LINE_MEMBER( z80scc_channel::ri_w ) |
| r249940 | r249941 | |
|---|
| 2122 | 2122 | } |
| 2123 | 2123 | |
| 2124 | 2124 | //------------------------------------------------- |
| 2125 | | // sync_w - sync handler |
| 2125 | // sync_w - sync handler |
| 2126 | 2126 | //------------------------------------------------- |
| 2127 | 2127 | WRITE_LINE_MEMBER( z80scc_channel::sync_w ) |
| 2128 | 2128 | { |
| r249940 | r249941 | |
|---|
| 2130 | 2130 | } |
| 2131 | 2131 | |
| 2132 | 2132 | //------------------------------------------------- |
| 2133 | | // rxc_w - receive clock |
| 2133 | // rxc_w - receive clock |
| 2134 | 2134 | //------------------------------------------------- |
| 2135 | 2135 | WRITE_LINE_MEMBER( z80scc_channel::rxc_w ) |
| 2136 | 2136 | { |
| r249940 | r249941 | |
|---|
| 2143 | 2143 | else if(state) |
| 2144 | 2144 | { |
| 2145 | 2145 | rx_clock_w(m_rx_clock < clocks/2); |
| 2146 | | |
| 2146 | |
| 2147 | 2147 | m_rx_clock++; |
| 2148 | 2148 | if (m_rx_clock == clocks) |
| 2149 | 2149 | m_rx_clock = 0; |
| 2150 | | |
| 2150 | |
| 2151 | 2151 | } |
| 2152 | 2152 | } |
| 2153 | 2153 | } |
| 2154 | 2154 | |
| 2155 | 2155 | //------------------------------------------------- |
| 2156 | | // txc_w - transmit clock |
| 2156 | // txc_w - transmit clock |
| 2157 | 2157 | //------------------------------------------------- |
| 2158 | 2158 | WRITE_LINE_MEMBER( z80scc_channel::txc_w ) |
| 2159 | 2159 | { |
| r249940 | r249941 | |
|---|
| 2166 | 2166 | else if(state) |
| 2167 | 2167 | { |
| 2168 | 2168 | tx_clock_w(m_tx_clock < clocks/2); |
| 2169 | | |
| 2169 | |
| 2170 | 2170 | m_tx_clock++; |
| 2171 | 2171 | if (m_tx_clock == clocks) |
| 2172 | 2172 | m_tx_clock = 0; |
| r249940 | r249941 | |
|---|
| 2175 | 2175 | } |
| 2176 | 2176 | |
| 2177 | 2177 | //------------------------------------------------- |
| 2178 | | // update_serial - |
| 2178 | // update_serial - |
| 2179 | 2179 | //------------------------------------------------- |
| 2180 | 2180 | void z80scc_channel::update_serial() |
| 2181 | 2181 | { |
| r249940 | r249941 | |
|---|
| 2202 | 2202 | if (m_rxc > 0) |
| 2203 | 2203 | { |
| 2204 | 2204 | set_rcv_rate(m_rxc / clocks); |
| 2205 | | LOG((" - Receiver clock: %d mode: %d rate: %d/%xh\n", m_rxc, clocks, m_rxc / clocks, m_rxc / clocks)); |
| 2205 | LOG((" - Receiver clock: %d mode: %d rate: %d/%xh\n", m_rxc, clocks, m_rxc / clocks, m_rxc / clocks)); |
| 2206 | 2206 | } |
| 2207 | 2207 | |
| 2208 | 2208 | if (m_txc > 0) |
| 2209 | 2209 | { |
| 2210 | 2210 | set_tra_rate(m_txc / clocks); |
| 2211 | | LOG((" - Transmit clock: %d mode: %d rate: %d/%xh\n", m_rxc, clocks, m_rxc / clocks, m_rxc / clocks)); |
| 2211 | LOG((" - Transmit clock: %d mode: %d rate: %d/%xh\n", m_rxc, clocks, m_rxc / clocks, m_rxc / clocks)); |
| 2212 | 2212 | } |
| 2213 | 2213 | } |
| 2214 | 2214 | |
| 2215 | 2215 | //------------------------------------------------- |
| 2216 | | // set_dtr - |
| 2216 | // set_dtr - |
| 2217 | 2217 | //------------------------------------------------- |
| 2218 | 2218 | void z80scc_channel::set_dtr(int state) |
| 2219 | 2219 | { |
| r249940 | r249941 | |
|---|
| 2229 | 2229 | |
| 2230 | 2230 | |
| 2231 | 2231 | //------------------------------------------------- |
| 2232 | | // write_rx - called by terminal through rs232/diserial |
| 2233 | | // when character is sent to board |
| 2232 | // write_rx - called by terminal through rs232/diserial |
| 2233 | // when character is sent to board |
| 2234 | 2234 | //------------------------------------------------- |
| 2235 | 2235 | WRITE_LINE_MEMBER(z80scc_channel::write_rx) |
| 2236 | 2236 | { |
trunk/src/devices/machine/z80scc.h
| r249940 | r249941 | |
|---|
| 2 | 2 | // copyright-holders:Joakim Larsson Edstrom |
| 3 | 3 | /*************************************************************************** |
| 4 | 4 | |
| 5 | | Z80-SCC Serial Communications Controller emulation |
| 5 | Z80-SCC Serial Communications Controller emulation |
| 6 | 6 | |
| 7 | 7 | **************************************************************************** |
| 8 | 8 | _____ _____ _____ _____ |
| r249940 | r249941 | |
|---|
| 38 | 38 | #include "cpu/z80/z80daisy.h" |
| 39 | 39 | |
| 40 | 40 | //************************************************************************** |
| 41 | | // DEVICE CONFIGURATION MACROS |
| 41 | // DEVICE CONFIGURATION MACROS |
| 42 | 42 | //************************************************************************** |
| 43 | 43 | |
| 44 | 44 | #define MCFG_Z80SCC_ADD(_tag, _clock, _rxa, _txa, _rxb, _txb) \ |
| r249940 | r249941 | |
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| 101 | 101 | |
| 102 | 102 | |
| 103 | 103 | //************************************************************************** |
| 104 | | // TYPE DEFINITIONS |
| 104 | // TYPE DEFINITIONS |
| 105 | 105 | //************************************************************************** |
| 106 | 106 | |
| 107 | 107 | // ======================> z80scc_channel |
| r249940 | r249941 | |
|---|
| 187 | 187 | int m_txc; |
| 188 | 188 | |
| 189 | 189 | // Register state |
| 190 | | // read registers enum |
| 190 | // read registers enum |
| 191 | 191 | UINT8 m_rr0; // REG_RR0_STATUS |
| 192 | 192 | UINT8 m_rr1; // REG_RR1_SPEC_RCV_COND |
| 193 | 193 | UINT8 m_rr2; // REG_RR2_INTERRUPT_VECT |
| r249940 | r249941 | |
|---|
| 197 | 197 | UINT8 m_rr6; // REG_RR6_LSB_OR_RR2 |
| 198 | 198 | UINT8 m_rr7; // REG_RR7_MSB_OR_RR3 |
| 199 | 199 | UINT8 m_rr8; // REG_RR8_RECEIVE_DATA |
| 200 | | UINT8 m_rr9; // REG_RR9_WR3_OR_RR13 |
| 200 | UINT8 m_rr9; // REG_RR9_WR3_OR_RR13 |
| 201 | 201 | UINT8 m_rr10; // REG_RR10_MISC_STATUS |
| 202 | 202 | UINT8 m_rr11; // REG_RR11_WR10_OR_RR15 |
| 203 | 203 | UINT8 m_rr12; // REG_RR12_LO_TIME_CONST |
| r249940 | r249941 | |
|---|
| 205 | 205 | UINT8 m_rr14; // REG_RR14_WR7_OR_R10 |
| 206 | 206 | UINT8 m_rr15; // REG_RR15_WR15_EXT_STAT |
| 207 | 207 | |
| 208 | | // write registers enum |
| 208 | // write registers enum |
| 209 | 209 | UINT8 m_wr0; // REG_WR0_COMMAND_REGPT |
| 210 | 210 | UINT8 m_wr1; // REG_WR1_INT_DMA_ENABLE |
| 211 | 211 | UINT8 m_wr2; // REG_WR2_INT_VECTOR |
| r249940 | r249941 | |
|---|
| 229 | 229 | { |
| 230 | 230 | INT_TRANSMIT = 0, |
| 231 | 231 | INT_EXTERNAL = 1, |
| 232 | | INT_RECEIVE = 2, |
| 233 | | INT_SPECIAL = 3 |
| 232 | INT_RECEIVE = 2, |
| 233 | INT_SPECIAL = 3 |
| 234 | 234 | }; |
| 235 | 235 | |
| 236 | 236 | // Read registers |
| 237 | 237 | enum |
| 238 | 238 | { |
| 239 | | REG_RR0_STATUS = 0, // SIO |
| 240 | | REG_RR1_SPEC_RCV_COND = 1, // SIO |
| 241 | | REG_RR2_INTERRUPT_VECT = 2, // SIO |
| 242 | | REG_RR3_INTERUPPT_PEND = 3, |
| 243 | | REG_RR4_WR4_OR_RR0 = 4, |
| 244 | | REG_RR5_WR5_OR_RR0 = 5, |
| 245 | | REG_RR6_LSB_OR_RR2 = 6, |
| 246 | | REG_RR7_MSB_OR_RR3 = 7, |
| 247 | | REG_RR8_RECEIVE_DATA = 8, |
| 248 | | REG_RR9_WR3_OR_RR13 = 9, |
| 249 | | REG_RR10_MISC_STATUS = 10, |
| 250 | | REG_RR11_WR10_OR_RR15 = 11, |
| 251 | | REG_RR12_LO_TIME_CONST = 12, |
| 252 | | REG_RR13_HI_TIME_CONST = 13, |
| 253 | | REG_RR14_WR7_OR_R10 = 14, |
| 254 | | REG_RR15_WR15_EXT_STAT = 15 |
| 239 | REG_RR0_STATUS = 0, // SIO |
| 240 | REG_RR1_SPEC_RCV_COND = 1, // SIO |
| 241 | REG_RR2_INTERRUPT_VECT = 2, // SIO |
| 242 | REG_RR3_INTERUPPT_PEND = 3, |
| 243 | REG_RR4_WR4_OR_RR0 = 4, |
| 244 | REG_RR5_WR5_OR_RR0 = 5, |
| 245 | REG_RR6_LSB_OR_RR2 = 6, |
| 246 | REG_RR7_MSB_OR_RR3 = 7, |
| 247 | REG_RR8_RECEIVE_DATA = 8, |
| 248 | REG_RR9_WR3_OR_RR13 = 9, |
| 249 | REG_RR10_MISC_STATUS = 10, |
| 250 | REG_RR11_WR10_OR_RR15 = 11, |
| 251 | REG_RR12_LO_TIME_CONST = 12, |
| 252 | REG_RR13_HI_TIME_CONST = 13, |
| 253 | REG_RR14_WR7_OR_R10 = 14, |
| 254 | REG_RR15_WR15_EXT_STAT = 15 |
| 255 | 255 | }; |
| 256 | | |
| 256 | |
| 257 | 257 | // Write registers |
| 258 | 258 | enum |
| 259 | 259 | { |
| 260 | | REG_WR0_COMMAND_REGPT = 0, // SIO |
| 261 | | REG_WR1_INT_DMA_ENABLE = 1, // SIO |
| 262 | | REG_WR2_INT_VECTOR = 2, // SIO |
| 263 | | REG_WR3_RX_CONTROL = 3, // SIO |
| 264 | | REG_WR4_RX_TX_MODES = 4, // SIO |
| 265 | | REG_WR5_TX_CONTROL = 5, // SIO |
| 266 | | REG_WR6_SYNC_OR_SDLC_A = 6, // SIO |
| 267 | | REG_WR7_SYNC_OR_SDLC_F = 7, // SIO |
| 268 | | REG_WR8_TRANSMIT_DATA = 8, |
| 260 | REG_WR0_COMMAND_REGPT = 0, // SIO |
| 261 | REG_WR1_INT_DMA_ENABLE = 1, // SIO |
| 262 | REG_WR2_INT_VECTOR = 2, // SIO |
| 263 | REG_WR3_RX_CONTROL = 3, // SIO |
| 264 | REG_WR4_RX_TX_MODES = 4, // SIO |
| 265 | REG_WR5_TX_CONTROL = 5, // SIO |
| 266 | REG_WR6_SYNC_OR_SDLC_A = 6, // SIO |
| 267 | REG_WR7_SYNC_OR_SDLC_F = 7, // SIO |
| 268 | REG_WR8_TRANSMIT_DATA = 8, |
| 269 | 269 | REG_WR9_MASTER_INT_CTRL = 9, |
| 270 | 270 | REG_WR10_MSC_RX_TX_CTRL = 10, |
| 271 | | REG_WR11_CLOCK_MODES = 11, |
| 272 | | REG_WR12_LO_BAUD_GEN = 12, |
| 273 | | REG_WR13_HI_BAUD_GEN = 13, |
| 274 | | REG_WR14_MISC_CTRL = 14, |
| 271 | REG_WR11_CLOCK_MODES = 11, |
| 272 | REG_WR12_LO_BAUD_GEN = 12, |
| 273 | REG_WR13_HI_BAUD_GEN = 13, |
| 274 | REG_WR14_MISC_CTRL = 14, |
| 275 | 275 | REG_WR15_EXT_ST_INT_CTRL= 15 |
| 276 | 276 | }; |
| 277 | 277 | |
| 278 | 278 | enum |
| 279 | 279 | { |
| 280 | | RR0_RX_CHAR_AVAILABLE = 0x01, // SIO bit |
| 281 | | RR0_ZC = 0x02, // SCC bit |
| 282 | | RR0_TX_BUFFER_EMPTY = 0x04, // SIO |
| 283 | | RR0_DCD = 0x08, // SIO |
| 284 | | RR0_RI = 0x10, // DART bit? TODO: investigate function and remove |
| 285 | | RR0_SYNC_HUNT = 0x10, // SIO bit, not supported |
| 286 | | RR0_CTS = 0x20, // SIO bit |
| 287 | | RR0_TX_UNDERRUN = 0x40, // SIO bit, not supported |
| 288 | | RR0_BREAK_ABORT = 0x80 // SIO bit, not supported |
| 280 | RR0_RX_CHAR_AVAILABLE = 0x01, // SIO bit |
| 281 | RR0_ZC = 0x02, // SCC bit |
| 282 | RR0_TX_BUFFER_EMPTY = 0x04, // SIO |
| 283 | RR0_DCD = 0x08, // SIO |
| 284 | RR0_RI = 0x10, // DART bit? TODO: investigate function and remove |
| 285 | RR0_SYNC_HUNT = 0x10, // SIO bit, not supported |
| 286 | RR0_CTS = 0x20, // SIO bit |
| 287 | RR0_TX_UNDERRUN = 0x40, // SIO bit, not supported |
| 288 | RR0_BREAK_ABORT = 0x80 // SIO bit, not supported |
| 289 | 289 | }; |
| 290 | 290 | |
| 291 | 291 | enum |
| 292 | 292 | { |
| 293 | | RR1_ALL_SENT = 0x01, // SIO/SCC bit |
| 294 | | RR1_RESIDUE_CODE_MASK = 0x0e, // SIO/SCC bits, not supported |
| 295 | | RR1_PARITY_ERROR = 0x10, // SIO/SCC bits |
| 296 | | RR1_RX_OVERRUN_ERROR = 0x20, // SIO/SCC bits |
| 297 | | RR1_CRC_FRAMING_ERROR = 0x40, // SIO/SCC bits |
| 298 | | RR1_END_OF_FRAME = 0x80 // SIO/SCC bits, not supported |
| 293 | RR1_ALL_SENT = 0x01, // SIO/SCC bit |
| 294 | RR1_RESIDUE_CODE_MASK = 0x0e, // SIO/SCC bits, not supported |
| 295 | RR1_PARITY_ERROR = 0x10, // SIO/SCC bits |
| 296 | RR1_RX_OVERRUN_ERROR = 0x20, // SIO/SCC bits |
| 297 | RR1_CRC_FRAMING_ERROR = 0x40, // SIO/SCC bits |
| 298 | RR1_END_OF_FRAME = 0x80 // SIO/SCC bits, not supported |
| 299 | 299 | }; |
| 300 | 300 | |
| 301 | 301 | enum |
| 302 | | { // TODO: overload SIO functionality |
| 303 | | RR2_INT_VECTOR_MASK = 0xff, // SCC channel A, SIO channel B (special case) |
| 304 | | RR2_INT_VECTOR_V1 = 0x02, // SIO (special case) /SCC Channel B |
| 305 | | RR2_INT_VECTOR_V2 = 0x04, // SIO (special case) /SCC Channel B |
| 306 | | RR2_INT_VECTOR_V3 = 0x08 // SIO (special case) /SCC Channel B |
| 302 | { // TODO: overload SIO functionality |
| 303 | RR2_INT_VECTOR_MASK = 0xff, // SCC channel A, SIO channel B (special case) |
| 304 | RR2_INT_VECTOR_V1 = 0x02, // SIO (special case) /SCC Channel B |
| 305 | RR2_INT_VECTOR_V2 = 0x04, // SIO (special case) /SCC Channel B |
| 306 | RR2_INT_VECTOR_V3 = 0x08 // SIO (special case) /SCC Channel B |
| 307 | 307 | }; |
| 308 | | |
| 308 | |
| 309 | 309 | enum |
| 310 | 310 | { |
| 311 | | RR3_CHANB_EXT_IP = 0x01, // SCC IP pending registers |
| 312 | | RR3_CHANB_TX_IP = 0x02, // only read in Channel A (for both channels) |
| 313 | | RR3_CHANB_RX_IP = 0x04, // channel B return all zero |
| 314 | | RR3_CHANA_EXT_IP = 0x08, |
| 315 | | RR3_CHANA_TX_IP = 0x10, |
| 316 | | RR3_CHANA_RX_IP = 0x20 |
| 311 | RR3_CHANB_EXT_IP = 0x01, // SCC IP pending registers |
| 312 | RR3_CHANB_TX_IP = 0x02, // only read in Channel A (for both channels) |
| 313 | RR3_CHANB_RX_IP = 0x04, // channel B return all zero |
| 314 | RR3_CHANA_EXT_IP = 0x08, |
| 315 | RR3_CHANA_TX_IP = 0x10, |
| 316 | RR3_CHANA_RX_IP = 0x20 |
| 317 | 317 | }; |
| 318 | | |
| 318 | |
| 319 | 319 | enum // Universal Bus WR0 commands for 85X30 |
| 320 | 320 | { |
| 321 | | WR0_REGISTER_MASK = 0x07, |
| 322 | | WR0_COMMAND_MASK = 0x38, // COMMANDS |
| 323 | | WR0_NULL = 0x00, // 0 0 0 |
| 324 | | WR0_POINT_HIGH = 0x08, // 0 0 1 |
| 325 | | WR0_RESET_EXT_STATUS = 0x10, // 0 1 0 |
| 326 | | WR0_SEND_ABORT = 0x18, // 0 1 1 |
| 327 | | WR0_ENABLE_INT_NEXT_RX = 0x20, // 1 0 0 |
| 328 | | WR0_RESET_TX_INT = 0x28, // 1 0 1 |
| 329 | | WR0_ERROR_RESET = 0x30, // 1 1 0 |
| 330 | | WR0_RESET_HIGHEST_IUS = 0x38, // 1 1 1 |
| 331 | | WR0_CRC_RESET_CODE_MASK = 0xc0, // RESET |
| 332 | | WR0_CRC_RESET_NULL = 0x00, // 0 0 |
| 333 | | WR0_CRC_RESET_RX = 0x40, // 0 1 |
| 334 | | WR0_CRC_RESET_TX = 0x80, // 1 0 |
| 321 | WR0_REGISTER_MASK = 0x07, |
| 322 | WR0_COMMAND_MASK = 0x38, // COMMANDS |
| 323 | WR0_NULL = 0x00, // 0 0 0 |
| 324 | WR0_POINT_HIGH = 0x08, // 0 0 1 |
| 325 | WR0_RESET_EXT_STATUS = 0x10, // 0 1 0 |
| 326 | WR0_SEND_ABORT = 0x18, // 0 1 1 |
| 327 | WR0_ENABLE_INT_NEXT_RX = 0x20, // 1 0 0 |
| 328 | WR0_RESET_TX_INT = 0x28, // 1 0 1 |
| 329 | WR0_ERROR_RESET = 0x30, // 1 1 0 |
| 330 | WR0_RESET_HIGHEST_IUS = 0x38, // 1 1 1 |
| 331 | WR0_CRC_RESET_CODE_MASK = 0xc0, // RESET |
| 332 | WR0_CRC_RESET_NULL = 0x00, // 0 0 |
| 333 | WR0_CRC_RESET_RX = 0x40, // 0 1 |
| 334 | WR0_CRC_RESET_TX = 0x80, // 1 0 |
| 335 | 335 | WR0_CRC_RESET_TX_UNDERRUN = 0xc0 // 1 1 |
| 336 | 336 | }; |
| 337 | 337 | |
| 338 | 338 | enum // ZBUS WR0 commands or 80X30 |
| 339 | 339 | { |
| 340 | | WR0_Z_COMMAND_MASK = 0x38, // COMMANDS |
| 341 | | WR0_Z_NULL_1 = 0x00, // 0 0 0 |
| 342 | | WR0_Z_NULL_2 = 0x08, // 0 0 1 |
| 343 | | WR0_Z_RESET_EXT_STATUS = 0x10, // 0 1 0 |
| 344 | | WR0_Z_SEND_ABORT = 0x18, // 0 1 1 |
| 345 | | WR0_Z_ENABLE_INT_NEXT_RX = 0x20, // 1 0 0 |
| 346 | | WR0_Z_RESET_TX_INT = 0x28, // 1 0 1 |
| 347 | | WR0_Z_ERROR_RESET = 0x30, // 1 1 0 |
| 348 | | WR0_Z_RESET_HIGHEST_IUS = 0x38, // 1 1 1 |
| 349 | | WR0_Z_SHIFT_MASK = 0x03, // SHIFT mode SDLC chan B |
| 350 | | WR0_Z_SEL_SHFT_LEFT = 0x02, // 1 0 |
| 351 | | WR0_Z_SEL_SHFT_RIGHT = 0x03 // 1 1 |
| 340 | WR0_Z_COMMAND_MASK = 0x38, // COMMANDS |
| 341 | WR0_Z_NULL_1 = 0x00, // 0 0 0 |
| 342 | WR0_Z_NULL_2 = 0x08, // 0 0 1 |
| 343 | WR0_Z_RESET_EXT_STATUS = 0x10, // 0 1 0 |
| 344 | WR0_Z_SEND_ABORT = 0x18, // 0 1 1 |
| 345 | WR0_Z_ENABLE_INT_NEXT_RX = 0x20, // 1 0 0 |
| 346 | WR0_Z_RESET_TX_INT = 0x28, // 1 0 1 |
| 347 | WR0_Z_ERROR_RESET = 0x30, // 1 1 0 |
| 348 | WR0_Z_RESET_HIGHEST_IUS = 0x38, // 1 1 1 |
| 349 | WR0_Z_SHIFT_MASK = 0x03, // SHIFT mode SDLC chan B |
| 350 | WR0_Z_SEL_SHFT_LEFT = 0x02, // 1 0 |
| 351 | WR0_Z_SEL_SHFT_RIGHT = 0x03 // 1 1 |
| 352 | 352 | }; |
| 353 | 353 | |
| 354 | 354 | enum |
| 355 | 355 | { |
| 356 | | WR1_EXT_INT_ENABLE = 0x01, |
| 357 | | WR1_TX_INT_ENABLE = 0x02, |
| 358 | | WR1_PARITY_IS_SPEC_COND = 0x04, |
| 359 | | WR1_RX_INT_MODE_MASK = 0x18, |
| 360 | | WR1_RX_INT_DISABLE = 0x00, |
| 361 | | WR1_RX_INT_FIRST = 0x08, |
| 362 | | WR1_RX_INT_ALL_PARITY = 0x10, // not supported |
| 363 | | WR1_RX_INT_ALL = 0x18, |
| 364 | | WR1_WRDY_ON_RX_TX = 0x20, // not supported |
| 365 | | WR1_WRDY_FUNCTION = 0x40, // not supported |
| 366 | | WR1_WRDY_ENABLE = 0x80 // not supported |
| 356 | WR1_EXT_INT_ENABLE = 0x01, |
| 357 | WR1_TX_INT_ENABLE = 0x02, |
| 358 | WR1_PARITY_IS_SPEC_COND = 0x04, |
| 359 | WR1_RX_INT_MODE_MASK = 0x18, |
| 360 | WR1_RX_INT_DISABLE = 0x00, |
| 361 | WR1_RX_INT_FIRST = 0x08, |
| 362 | WR1_RX_INT_ALL_PARITY = 0x10, // not supported |
| 363 | WR1_RX_INT_ALL = 0x18, |
| 364 | WR1_WRDY_ON_RX_TX = 0x20, // not supported |
| 365 | WR1_WRDY_FUNCTION = 0x40, // not supported |
| 366 | WR1_WRDY_ENABLE = 0x80 // not supported |
| 367 | 367 | }; |
| 368 | 368 | |
| 369 | 369 | enum |
| 370 | 370 | { |
| 371 | | WR3_RX_ENABLE = 0x01, |
| 371 | WR3_RX_ENABLE = 0x01, |
| 372 | 372 | WR3_SYNC_CHAR_LOAD_INHIBIT= 0x02, // not supported |
| 373 | | WR3_ADDRESS_SEARCH_MODE = 0x04, // not supported |
| 374 | | WR3_RX_CRC_ENABLE = 0x08, // not supported |
| 375 | | WR3_ENTER_HUNT_PHASE = 0x10, // not supported |
| 376 | | WR3_AUTO_ENABLES = 0x20, |
| 377 | | WR3_RX_WORD_LENGTH_MASK = 0xc0, |
| 378 | | WR3_RX_WORD_LENGTH_5 = 0x00, |
| 379 | | WR3_RX_WORD_LENGTH_7 = 0x40, |
| 380 | | WR3_RX_WORD_LENGTH_6 = 0x80, |
| 381 | | WR3_RX_WORD_LENGTH_8 = 0xc0 |
| 373 | WR3_ADDRESS_SEARCH_MODE = 0x04, // not supported |
| 374 | WR3_RX_CRC_ENABLE = 0x08, // not supported |
| 375 | WR3_ENTER_HUNT_PHASE = 0x10, // not supported |
| 376 | WR3_AUTO_ENABLES = 0x20, |
| 377 | WR3_RX_WORD_LENGTH_MASK = 0xc0, |
| 378 | WR3_RX_WORD_LENGTH_5 = 0x00, |
| 379 | WR3_RX_WORD_LENGTH_7 = 0x40, |
| 380 | WR3_RX_WORD_LENGTH_6 = 0x80, |
| 381 | WR3_RX_WORD_LENGTH_8 = 0xc0 |
| 382 | 382 | }; |
| 383 | 383 | |
| 384 | 384 | enum |
| 385 | 385 | { |
| 386 | | WR4_PARITY_ENABLE = 0x01, |
| 387 | | WR4_PARITY_EVEN = 0x02, |
| 388 | | WR4_STOP_BITS_MASK = 0x0c, |
| 389 | | WR4_STOP_BITS_1 = 0x04, |
| 390 | | WR4_STOP_BITS_1_5 = 0x08, // not supported |
| 391 | | WR4_STOP_BITS_2 = 0x0c, |
| 392 | | WR4_SYNC_MODE_MASK = 0x30, // not supported |
| 393 | | WR4_SYNC_MODE_8_BIT = 0x00, // not supported |
| 394 | | WR4_SYNC_MODE_16_BIT = 0x10, // not supported |
| 395 | | WR4_SYNC_MODE_SDLC = 0x20, // not supported |
| 396 | | WR4_SYNC_MODE_EXT = 0x30, // not supported |
| 397 | | WR4_CLOCK_RATE_MASK = 0xc0, |
| 398 | | WR4_CLOCK_RATE_X1 = 0x00, |
| 399 | | WR4_CLOCK_RATE_X16 = 0x40, |
| 400 | | WR4_CLOCK_RATE_X32 = 0x80, |
| 401 | | WR4_CLOCK_RATE_X64 = 0xc0 |
| 386 | WR4_PARITY_ENABLE = 0x01, |
| 387 | WR4_PARITY_EVEN = 0x02, |
| 388 | WR4_STOP_BITS_MASK = 0x0c, |
| 389 | WR4_STOP_BITS_1 = 0x04, |
| 390 | WR4_STOP_BITS_1_5 = 0x08, // not supported |
| 391 | WR4_STOP_BITS_2 = 0x0c, |
| 392 | WR4_SYNC_MODE_MASK = 0x30, // not supported |
| 393 | WR4_SYNC_MODE_8_BIT = 0x00, // not supported |
| 394 | WR4_SYNC_MODE_16_BIT = 0x10, // not supported |
| 395 | WR4_SYNC_MODE_SDLC = 0x20, // not supported |
| 396 | WR4_SYNC_MODE_EXT = 0x30, // not supported |
| 397 | WR4_CLOCK_RATE_MASK = 0xc0, |
| 398 | WR4_CLOCK_RATE_X1 = 0x00, |
| 399 | WR4_CLOCK_RATE_X16 = 0x40, |
| 400 | WR4_CLOCK_RATE_X32 = 0x80, |
| 401 | WR4_CLOCK_RATE_X64 = 0xc0 |
| 402 | 402 | }; |
| 403 | 403 | |
| 404 | 404 | enum |
| 405 | 405 | { |
| 406 | | WR5_TX_CRC_ENABLE = 0x01, // not supported |
| 407 | | WR5_RTS = 0x02, |
| 408 | | WR5_CRC16 = 0x04, // not supported |
| 409 | | WR5_TX_ENABLE = 0x08, |
| 410 | | WR5_SEND_BREAK = 0x10, |
| 411 | | WR5_TX_WORD_LENGTH_MASK = 0x60, |
| 412 | | WR5_TX_WORD_LENGTH_5 = 0x00, |
| 413 | | WR5_TX_WORD_LENGTH_6 = 0x40, |
| 414 | | WR5_TX_WORD_LENGTH_7 = 0x20, |
| 415 | | WR5_TX_WORD_LENGTH_8 = 0x60, |
| 416 | | WR5_DTR = 0x80 |
| 406 | WR5_TX_CRC_ENABLE = 0x01, // not supported |
| 407 | WR5_RTS = 0x02, |
| 408 | WR5_CRC16 = 0x04, // not supported |
| 409 | WR5_TX_ENABLE = 0x08, |
| 410 | WR5_SEND_BREAK = 0x10, |
| 411 | WR5_TX_WORD_LENGTH_MASK = 0x60, |
| 412 | WR5_TX_WORD_LENGTH_5 = 0x00, |
| 413 | WR5_TX_WORD_LENGTH_6 = 0x40, |
| 414 | WR5_TX_WORD_LENGTH_7 = 0x20, |
| 415 | WR5_TX_WORD_LENGTH_8 = 0x60, |
| 416 | WR5_DTR = 0x80 |
| 417 | 417 | }; |
| 418 | 418 | |
| 419 | 419 | /* SCC specifics */ |
| 420 | 420 | enum |
| 421 | 421 | { |
| 422 | | WR9_CMD_MASK = 0xC0, |
| 423 | | WR9_CMD_NORESET = 0x00, |
| 424 | | WR9_CMD_CHNB_RESET = 0x40, |
| 425 | | WR9_CMD_CHNA_RESET = 0x80, |
| 426 | | WR9_CMD_HW_RESET = 0xC0, |
| 427 | | WR9_BIT_VIS = 0x01, |
| 428 | | WR9_BIT_NV = 0x02, |
| 429 | | WR9_BIT_DLC = 0x04, |
| 430 | | WR9_BIT_MIE = 0x08, |
| 431 | | WR9_BIT_SHSL = 0x10, |
| 432 | | WR9_BIT_IACK = 0x20 |
| 422 | WR9_CMD_MASK = 0xC0, |
| 423 | WR9_CMD_NORESET = 0x00, |
| 424 | WR9_CMD_CHNB_RESET = 0x40, |
| 425 | WR9_CMD_CHNA_RESET = 0x80, |
| 426 | WR9_CMD_HW_RESET = 0xC0, |
| 427 | WR9_BIT_VIS = 0x01, |
| 428 | WR9_BIT_NV = 0x02, |
| 429 | WR9_BIT_DLC = 0x04, |
| 430 | WR9_BIT_MIE = 0x08, |
| 431 | WR9_BIT_SHSL = 0x10, |
| 432 | WR9_BIT_IACK = 0x20 |
| 433 | 433 | }; |
| 434 | 434 | |
| 435 | 435 | enum |
| 436 | 436 | { |
| 437 | | WR11_RCVCLK_TYPE = 0x80, |
| 437 | WR11_RCVCLK_TYPE = 0x80, |
| 438 | 438 | WR11_RCVCLK_SRC_MASK = 0x60, // RCV CLOCK |
| 439 | 439 | WR11_RCVCLK_SRC_RTXC = 0x00, // 0 0 |
| 440 | 440 | WR11_RCVCLK_SRC_TRXC = 0x20, // 0 1 |
| 441 | | WR11_RCVCLK_SRC_BR = 0x40, // 1 0 |
| 441 | WR11_RCVCLK_SRC_BR = 0x40, // 1 0 |
| 442 | 442 | WR11_RCVCLK_SRC_DPLL = 0x60, // 1 1 |
| 443 | 443 | WR11_TRACLK_SRC_MASK = 0x18, // TRA CLOCK |
| 444 | 444 | WR11_TRACLK_SRC_RTXC = 0x00, // 0 0 |
| 445 | 445 | WR11_TRACLK_SRC_TRXC = 0x08, // 0 1 |
| 446 | | WR11_TRACLK_SRC_BR = 0x10, // 1 0 |
| 446 | WR11_TRACLK_SRC_BR = 0x10, // 1 0 |
| 447 | 447 | WR11_TRACLK_SRC_DPLL = 0x18, // 1 1 |
| 448 | | WR11_TRXC_DIRECTION = 0x04, |
| 448 | WR11_TRXC_DIRECTION = 0x04, |
| 449 | 449 | WR11_TRXSRC_SRC_MASK = 0x03, // TRXX CLOCK |
| 450 | 450 | WR11_TRXSRC_SRC_XTAL = 0x00, // 0 0 |
| 451 | | WR11_TRXSRC_SRC_TRA = 0x01, // 0 1 |
| 452 | | WR11_TRXSRC_SRC_BR = 0x02, // 1 0 |
| 451 | WR11_TRXSRC_SRC_TRA = 0x01, // 0 1 |
| 452 | WR11_TRXSRC_SRC_BR = 0x02, // 1 0 |
| 453 | 453 | WR11_TRXSRC_SRC_DPLL = 0x03 // 1 1 |
| 454 | 454 | }; |
| 455 | 455 | |
| 456 | 456 | enum |
| 457 | 457 | { |
| 458 | | WR14_DPLL_CMD_MASK = 0xe0, // Command |
| 459 | | WR14_CMD_NULL = 0x00, // 0 0 0 |
| 460 | | WR14_CMD_ESM = 0x20, // 0 0 1 |
| 461 | | WR14_CMD_RMC = 0x40, // 0 1 0 |
| 458 | WR14_DPLL_CMD_MASK = 0xe0, // Command |
| 459 | WR14_CMD_NULL = 0x00, // 0 0 0 |
| 460 | WR14_CMD_ESM = 0x20, // 0 0 1 |
| 461 | WR14_CMD_RMC = 0x40, // 0 1 0 |
| 462 | 462 | WR14_CMD_DISABLE_DPLL = 0x60, // 0 1 1 |
| 463 | | WR14_CMD_SS_BGR = 0x80, // 1 0 0 |
| 464 | | WR14_CMD_SS_RTXC = 0xa0, // 1 0 1 |
| 465 | | WR14_CMD_SET_FM = 0xc0, // 1 1 0 |
| 466 | | WR14_CMD_SET_NRZI = 0xe0 // 1 1 1 |
| 463 | WR14_CMD_SS_BGR = 0x80, // 1 0 0 |
| 464 | WR14_CMD_SS_RTXC = 0xa0, // 1 0 1 |
| 465 | WR14_CMD_SET_FM = 0xc0, // 1 1 0 |
| 466 | WR14_CMD_SET_NRZI = 0xe0 // 1 1 1 |
| 467 | 467 | }; |
| 468 | 468 | |
| 469 | 469 | void update_serial(); |
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| 477 | 477 | int get_tx_word_length(); |
| 478 | 478 | |
| 479 | 479 | // receiver state |
| 480 | | UINT8 m_rx_data_fifo[8]; // receive data FIFO |
| 481 | | UINT8 m_rx_error_fifo[8]; // receive error FIFO |
| 482 | | UINT8 m_rx_error; // current receive error |
| 483 | | //int m_rx_fifo // receive FIFO pointer |
| 484 | | int m_rx_fifo_rp; // receive FIFO read pointer |
| 485 | | int m_rx_fifo_wp; // receive FIFO write pointer |
| 486 | | int m_rx_fifo_sz; // receive FIFO size |
| 480 | UINT8 m_rx_data_fifo[8]; // receive data FIFO |
| 481 | UINT8 m_rx_error_fifo[8]; // receive error FIFO |
| 482 | UINT8 m_rx_error; // current receive error |
| 483 | //int m_rx_fifo // receive FIFO pointer |
| 484 | int m_rx_fifo_rp; // receive FIFO read pointer |
| 485 | int m_rx_fifo_wp; // receive FIFO write pointer |
| 486 | int m_rx_fifo_sz; // receive FIFO size |
| 487 | 487 | |
| 488 | | int m_rx_clock; // receive clock pulse count |
| 489 | | int m_rx_first; // first character received |
| 490 | | int m_rx_break; // receive break condition |
| 491 | | UINT8 m_rx_rr0_latch; // read register 0 latched |
| 488 | int m_rx_clock; // receive clock pulse count |
| 489 | int m_rx_first; // first character received |
| 490 | int m_rx_break; // receive break condition |
| 491 | UINT8 m_rx_rr0_latch; // read register 0 latched |
| 492 | 492 | |
| 493 | 493 | int m_rxd; |
| 494 | | int m_ri; // ring indicator latch |
| 495 | | int m_cts; // clear to send latch |
| 496 | | int m_dcd; // data carrier detect latch |
| 494 | int m_ri; // ring indicator latch |
| 495 | int m_cts; // clear to send latch |
| 496 | int m_dcd; // data carrier detect latch |
| 497 | 497 | |
| 498 | 498 | // transmitter state |
| 499 | | UINT8 m_tx_data; // transmit data register |
| 500 | | int m_tx_clock; // transmit clock pulse count |
| 499 | UINT8 m_tx_data; // transmit data register |
| 500 | int m_tx_clock; // transmit clock pulse count |
| 501 | 501 | |
| 502 | | int m_dtr; // data terminal ready |
| 503 | | int m_rts; // request to send |
| 502 | int m_dtr; // data terminal ready |
| 503 | int m_rts; // request to send |
| 504 | 504 | |
| 505 | 505 | // synchronous state |
| 506 | | UINT16 m_sync; // sync character |
| 506 | UINT16 m_sync; // sync character |
| 507 | 507 | |
| 508 | 508 | int m_index; |
| 509 | 509 | z80scc_device *m_uart; |
| 510 | 510 | |
| 511 | 511 | // SCC specifics |
| 512 | | int m_ph; // Point high command to access regs 08-0f |
| 512 | int m_ph; // Point high command to access regs 08-0f |
| 513 | 513 | UINT8 m_zc; |
| 514 | 514 | }; |
| 515 | 515 | |
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| 607 | 607 | // Variants in the SCC family |
| 608 | 608 | enum |
| 609 | 609 | { |
| 610 | | TYPE_Z80SCC = 0x001, |
| 610 | TYPE_Z80SCC = 0x001, |
| 611 | 611 | TYPE_SCC8030 = 0x002, |
| 612 | 612 | TYPE_SCC80C30 = 0x004, |
| 613 | 613 | TYPE_SCC80230 = 0x008, |
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| 621 | 621 | #define SET_NMOS ( z80scc_device::TYPE_SCC8030 | z80scc_device::TYPE_SCC8530 ) |
| 622 | 622 | #define SET_CMOS ( z80scc_device::TYPE_SCC80C30 | z80scc_device::TYPE_SCC85C30 ) |
| 623 | 623 | #define SET_ESCC ( z80scc_device::TYPE_SCC80230 | z80scc_device::TYPE_SCC85230 | z80scc_device::TYPE_SCC8523L ) |
| 624 | | #define SET_EMSCC z80scc_device::TYPE_SCC85233 |
| 624 | #define SET_EMSCC z80scc_device::TYPE_SCC85233 |
| 625 | 625 | #define SET_Z80X30 ( z80scc_device::TYPE_SCC8030 | z80scc_device::TYPE_SCC80C30 | z80scc_device::TYPE_SCC80230 ) |
| 626 | 626 | #define SET_Z85X3X ( z80scc_device::TYPE_SCC8530 | z80scc_device::TYPE_SCC85C30 | z80scc_device::TYPE_SCC85230 \ |
| 627 | | | z80scc_device::TYPE_SCC8523L | z80scc_device::TYPE_SCC85233 ) |
| 627 | | z80scc_device::TYPE_SCC8523L | z80scc_device::TYPE_SCC85233 ) |
| 628 | 628 | |
| 629 | 629 | enum |
| 630 | 630 | { |
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| 641 | 641 | int m_rxcb; |
| 642 | 642 | int m_txcb; |
| 643 | 643 | |
| 644 | | devcb_write_line m_out_txda_cb; |
| 645 | | devcb_write_line m_out_dtra_cb; |
| 646 | | devcb_write_line m_out_rtsa_cb; |
| 647 | | devcb_write_line m_out_wrdya_cb; |
| 648 | | devcb_write_line m_out_synca_cb; |
| 644 | devcb_write_line m_out_txda_cb; |
| 645 | devcb_write_line m_out_dtra_cb; |
| 646 | devcb_write_line m_out_rtsa_cb; |
| 647 | devcb_write_line m_out_wrdya_cb; |
| 648 | devcb_write_line m_out_synca_cb; |
| 649 | 649 | |
| 650 | | devcb_write_line m_out_txdb_cb; |
| 651 | | devcb_write_line m_out_dtrb_cb; |
| 652 | | devcb_write_line m_out_rtsb_cb; |
| 653 | | devcb_write_line m_out_wrdyb_cb; |
| 654 | | devcb_write_line m_out_syncb_cb; |
| 650 | devcb_write_line m_out_txdb_cb; |
| 651 | devcb_write_line m_out_dtrb_cb; |
| 652 | devcb_write_line m_out_rtsb_cb; |
| 653 | devcb_write_line m_out_wrdyb_cb; |
| 654 | devcb_write_line m_out_syncb_cb; |
| 655 | 655 | |
| 656 | | devcb_write_line m_out_int_cb; |
| 657 | | devcb_write_line m_out_rxdrqa_cb; |
| 658 | | devcb_write_line m_out_txdrqa_cb; |
| 659 | | devcb_write_line m_out_rxdrqb_cb; |
| 660 | | devcb_write_line m_out_txdrqb_cb; |
| 656 | devcb_write_line m_out_int_cb; |
| 657 | devcb_write_line m_out_rxdrqa_cb; |
| 658 | devcb_write_line m_out_txdrqa_cb; |
| 659 | devcb_write_line m_out_rxdrqb_cb; |
| 660 | devcb_write_line m_out_txdrqb_cb; |
| 661 | 661 | |
| 662 | | int m_int_state[6]; // interrupt state |
| 662 | int m_int_state[6]; // interrupt state |
| 663 | 663 | |
| 664 | 664 | int m_variant; |
| 665 | 665 | UINT8 m_wr0_ptrbits; |
trunk/src/devices/machine/z80sio.c
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| 50 | 50 | #include "z80sio.h" |
| 51 | 51 | |
| 52 | 52 | //************************************************************************** |
| 53 | | // MACROS / CONSTANTS |
| 53 | // MACROS / CONSTANTS |
| 54 | 54 | //************************************************************************** |
| 55 | 55 | |
| 56 | 56 | #define VERBOSE 0 |
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| 68 | 68 | #define FUNCNAME __PRETTY_FUNCTION__ |
| 69 | 69 | #endif |
| 70 | 70 | |
| 71 | | #define CHANA_TAG "cha" |
| 72 | | #define CHANB_TAG "chb" |
| 71 | #define CHANA_TAG "cha" |
| 72 | #define CHANB_TAG "chb" |
| 73 | 73 | |
| 74 | 74 | |
| 75 | 75 | |
| 76 | 76 | //************************************************************************** |
| 77 | | // DEVICE DEFINITIONS |
| 77 | // DEVICE DEFINITIONS |
| 78 | 78 | //************************************************************************** |
| 79 | 79 | |
| 80 | 80 | // device type definition |
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| 82 | 82 | const device_type Z80SIO_CHANNEL = &device_creator<z80sio_channel>; |
| 83 | 83 | |
| 84 | 84 | //------------------------------------------------- |
| 85 | | // device_mconfig_additions - |
| 85 | // device_mconfig_additions - |
| 86 | 86 | //------------------------------------------------- |
| 87 | 87 | |
| 88 | 88 | MACHINE_CONFIG_FRAGMENT( z80sio ) |
| r249940 | r249941 | |
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| 96 | 96 | } |
| 97 | 97 | |
| 98 | 98 | //************************************************************************** |
| 99 | | // LIVE DEVICE |
| 99 | // LIVE DEVICE |
| 100 | 100 | //************************************************************************** |
| 101 | 101 | |
| 102 | 102 | //------------------------------------------------- |
| 103 | | // z80sio_device - constructor |
| 103 | // z80sio_device - constructor |
| 104 | 104 | //------------------------------------------------- |
| 105 | 105 | |
| 106 | 106 | z80sio_device::z80sio_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT32 variant, const char *shortname, const char *source) |
| r249940 | r249941 | |
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| 164 | 164 | } |
| 165 | 165 | |
| 166 | 166 | //------------------------------------------------- |
| 167 | | // device_start - device-specific startup |
| 167 | // device_start - device-specific startup |
| 168 | 168 | //------------------------------------------------- |
| 169 | 169 | void z80sio_device::device_start() |
| 170 | 170 | { |
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| 200 | 200 | |
| 201 | 201 | |
| 202 | 202 | //------------------------------------------------- |
| 203 | | // device_reset - device-specific reset |
| 203 | // device_reset - device-specific reset |
| 204 | 204 | //------------------------------------------------- |
| 205 | 205 | void z80sio_device::device_reset() |
| 206 | 206 | { |
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| 211 | 211 | } |
| 212 | 212 | |
| 213 | 213 | //------------------------------------------------- |
| 214 | | // z80daisy_irq_state - get interrupt status |
| 214 | // z80daisy_irq_state - get interrupt status |
| 215 | 215 | //------------------------------------------------- |
| 216 | 216 | int z80sio_device::z80daisy_irq_state() |
| 217 | 217 | { |
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| 220 | 220 | |
| 221 | 221 | |
| 222 | 222 | LOG(("%s %s A:%d%d%d%d B:%d%d%d%d ",FUNCNAME, tag(), |
| 223 | | m_int_state[0], m_int_state[1], m_int_state[2], m_int_state[3], |
| 224 | | m_int_state[4], m_int_state[5], m_int_state[6], m_int_state[7])); |
| 223 | m_int_state[0], m_int_state[1], m_int_state[2], m_int_state[3], |
| 224 | m_int_state[4], m_int_state[5], m_int_state[6], m_int_state[7])); |
| 225 | 225 | |
| 226 | 226 | // loop over all interrupt sources |
| 227 | 227 | for (i = 0; i < 8; i++) |
| r249940 | r249941 | |
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| 236 | 236 | } |
| 237 | 237 | |
| 238 | 238 | LOG(("Interrupt State %u\n", state)); |
| 239 | | |
| 239 | |
| 240 | 240 | return state; |
| 241 | 241 | } |
| 242 | 242 | |
| 243 | 243 | |
| 244 | 244 | //------------------------------------------------- |
| 245 | | // z80daisy_irq_ack - interrupt acknowledge |
| 245 | // z80daisy_irq_ack - interrupt acknowledge |
| 246 | 246 | //------------------------------------------------- |
| 247 | 247 | int z80sio_device::z80daisy_irq_ack() |
| 248 | 248 | { |
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| 274 | 274 | |
| 275 | 275 | |
| 276 | 276 | //------------------------------------------------- |
| 277 | | // z80daisy_irq_reti - return from interrupt |
| 277 | // z80daisy_irq_reti - return from interrupt |
| 278 | 278 | //------------------------------------------------- |
| 279 | 279 | void z80sio_device::z80daisy_irq_reti() |
| 280 | 280 | { |
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| 300 | 300 | |
| 301 | 301 | |
| 302 | 302 | //------------------------------------------------- |
| 303 | | // check_interrupts - |
| 303 | // check_interrupts - |
| 304 | 304 | //------------------------------------------------- |
| 305 | 305 | void z80sio_device::check_interrupts() |
| 306 | 306 | { |
| r249940 | r249941 | |
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| 311 | 311 | |
| 312 | 312 | |
| 313 | 313 | //------------------------------------------------- |
| 314 | | // reset_interrupts - |
| 314 | // reset_interrupts - |
| 315 | 315 | //------------------------------------------------- |
| 316 | 316 | void z80sio_device::reset_interrupts() |
| 317 | 317 | { |
| r249940 | r249941 | |
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| 327 | 327 | |
| 328 | 328 | |
| 329 | 329 | //------------------------------------------------- |
| 330 | | // trigger_interrupt - TODO: needs attention for SIO |
| 330 | // trigger_interrupt - TODO: needs attention for SIO |
| 331 | 331 | //------------------------------------------------- |
| 332 | 332 | void z80sio_device::trigger_interrupt(int index, int state) |
| 333 | 333 | { |
| r249940 | r249941 | |
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| 384 | 384 | // status affects vector |
| 385 | 385 | vector = (m_chanB->m_wr2 & 0xf1) | (!index << 3) | (state << 1); |
| 386 | 386 | } |
| 387 | | // } |
| 387 | // } |
| 388 | 388 | // update vector register |
| 389 | 389 | m_chanB->m_rr2 = vector; |
| 390 | 390 | |
| r249940 | r249941 | |
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| 398 | 398 | |
| 399 | 399 | |
| 400 | 400 | //------------------------------------------------- |
| 401 | | // m1_r - interrupt acknowledge |
| 401 | // m1_r - interrupt acknowledge |
| 402 | 402 | //------------------------------------------------- |
| 403 | 403 | int z80sio_device::m1_r() |
| 404 | 404 | { |
| r249940 | r249941 | |
|---|
| 408 | 408 | |
| 409 | 409 | |
| 410 | 410 | //------------------------------------------------- |
| 411 | | // cd_ba_r - |
| 411 | // cd_ba_r - |
| 412 | 412 | //------------------------------------------------- |
| 413 | 413 | READ8_MEMBER( z80sio_device::cd_ba_r ) |
| 414 | 414 | { |
| r249940 | r249941 | |
|---|
| 423 | 423 | |
| 424 | 424 | |
| 425 | 425 | //------------------------------------------------- |
| 426 | | // cd_ba_w - |
| 426 | // cd_ba_w - |
| 427 | 427 | //------------------------------------------------- |
| 428 | 428 | WRITE8_MEMBER( z80sio_device::cd_ba_w ) |
| 429 | 429 | { |
| r249940 | r249941 | |
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| 441 | 441 | |
| 442 | 442 | |
| 443 | 443 | //------------------------------------------------- |
| 444 | | // ba_cd_r - |
| 444 | // ba_cd_r - |
| 445 | 445 | //------------------------------------------------- |
| 446 | 446 | READ8_MEMBER( z80sio_device::ba_cd_r ) |
| 447 | 447 | { |
| r249940 | r249941 | |
|---|
| 456 | 456 | |
| 457 | 457 | |
| 458 | 458 | //------------------------------------------------- |
| 459 | | // ba_cd_w - |
| 459 | // ba_cd_w - |
| 460 | 460 | //------------------------------------------------- |
| 461 | 461 | WRITE8_MEMBER( z80sio_device::ba_cd_w ) |
| 462 | 462 | { |
| r249940 | r249941 | |
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| 473 | 473 | } |
| 474 | 474 | |
| 475 | 475 | //************************************************************************** |
| 476 | | // SIO CHANNEL |
| 476 | // SIO CHANNEL |
| 477 | 477 | //************************************************************************** |
| 478 | 478 | |
| 479 | 479 | //------------------------------------------------- |
| 480 | | // z80sio_channel - constructor |
| 480 | // z80sio_channel - constructor |
| 481 | 481 | //------------------------------------------------- |
| 482 | 482 | z80sio_channel::z80sio_channel(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 483 | 483 | : device_t(mconfig, Z80SIO_CHANNEL, "Z80 SIO channel", tag, owner, clock, "z80sio_channel", __FILE__), |
| r249940 | r249941 | |
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| 512 | 512 | |
| 513 | 513 | |
| 514 | 514 | //------------------------------------------------- |
| 515 | | // start - channel startup |
| 515 | // start - channel startup |
| 516 | 516 | //------------------------------------------------- |
| 517 | 517 | void z80sio_channel::device_start() |
| 518 | 518 | { |
| r249940 | r249941 | |
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| 555 | 555 | |
| 556 | 556 | |
| 557 | 557 | //------------------------------------------------- |
| 558 | | // reset - reset channel status |
| 558 | // reset - reset channel status |
| 559 | 559 | //------------------------------------------------- |
| 560 | 560 | void z80sio_channel::device_reset() |
| 561 | 561 | { |
| r249940 | r249941 | |
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| 590 | 590 | } |
| 591 | 591 | |
| 592 | 592 | //------------------------------------------------- |
| 593 | | // tra_callback - |
| 593 | // tra_callback - |
| 594 | 594 | //------------------------------------------------- |
| 595 | 595 | void z80sio_channel::tra_callback() |
| 596 | 596 | { |
| r249940 | r249941 | |
|---|
| 615 | 615 | else if (!is_transmit_register_empty()) |
| 616 | 616 | { |
| 617 | 617 | int db = transmit_register_get_data_bit(); |
| 618 | | |
| 618 | |
| 619 | 619 | LOG(("%" I64FMT "d %s() \"%s \"Channel %c transmit data bit %d m_wr5:%02x\n", machine().firstcpu->total_cycles(), FUNCNAME, m_owner->tag(), 'A' + m_index, db, m_wr5)); |
| 620 | 620 | // transmit data |
| 621 | 621 | if (m_index == z80sio_device::CHANNEL_A) |
| r249940 | r249941 | |
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| 632 | 632 | |
| 633 | 633 | |
| 634 | 634 | //------------------------------------------------- |
| 635 | | // tra_complete - |
| 635 | // tra_complete - |
| 636 | 636 | //------------------------------------------------- |
| 637 | 637 | void z80sio_channel::tra_complete() |
| 638 | 638 | { |
| r249940 | r249941 | |
|---|
| 683 | 683 | |
| 684 | 684 | |
| 685 | 685 | //------------------------------------------------- |
| 686 | | // rcv_callback - |
| 686 | // rcv_callback - |
| 687 | 687 | //------------------------------------------------- |
| 688 | 688 | void z80sio_channel::rcv_callback() |
| 689 | 689 | { |
| r249940 | r249941 | |
|---|
| 703 | 703 | |
| 704 | 704 | |
| 705 | 705 | //------------------------------------------------- |
| 706 | | // rcv_complete - |
| 706 | // rcv_complete - |
| 707 | 707 | //------------------------------------------------- |
| 708 | 708 | void z80sio_channel::rcv_complete() |
| 709 | 709 | { |
| r249940 | r249941 | |
|---|
| 717 | 717 | |
| 718 | 718 | |
| 719 | 719 | //------------------------------------------------- |
| 720 | | // get_clock_mode - get clock divisor |
| 720 | // get_clock_mode - get clock divisor |
| 721 | 721 | //------------------------------------------------- |
| 722 | 722 | |
| 723 | 723 | int z80sio_channel::get_clock_mode() |
| r249940 | r249941 | |
|---|
| 727 | 727 | |
| 728 | 728 | switch (m_wr4 & WR4_CLOCK_RATE_MASK) |
| 729 | 729 | { |
| 730 | | case WR4_CLOCK_RATE_X1: clocks = 1; break; |
| 731 | | case WR4_CLOCK_RATE_X16: clocks = 16; break; |
| 732 | | case WR4_CLOCK_RATE_X32: clocks = 32; break; |
| 733 | | case WR4_CLOCK_RATE_X64: clocks = 64; break; |
| 730 | case WR4_CLOCK_RATE_X1: clocks = 1; break; |
| 731 | case WR4_CLOCK_RATE_X16: clocks = 16; break; |
| 732 | case WR4_CLOCK_RATE_X32: clocks = 32; break; |
| 733 | case WR4_CLOCK_RATE_X64: clocks = 64; break; |
| 734 | 734 | } |
| 735 | 735 | |
| 736 | 736 | return clocks; |
| r249940 | r249941 | |
|---|
| 758 | 758 | |
| 759 | 759 | void z80sio_channel::update_rts() |
| 760 | 760 | { |
| 761 | | // LOG(("%s(%d) \"%s\" Channel %c \n", FUNCNAME, state, m_owner->tag(), 'A' + m_index)); |
| 761 | // LOG(("%s(%d) \"%s\" Channel %c \n", FUNCNAME, state, m_owner->tag(), 'A' + m_index)); |
| 762 | 762 | LOG(("%s() \"%s\" Channel %c \n", FUNCNAME, m_owner->tag(), 'A' + m_index)); |
| 763 | 763 | if (m_wr5 & WR5_RTS) |
| 764 | 764 | { |
| r249940 | r249941 | |
|---|
| 771 | 771 | // when the RTS bit is reset, the _RTS output goes high after the transmitter empties |
| 772 | 772 | m_rts = 0; |
| 773 | 773 | } |
| 774 | | |
| 774 | |
| 775 | 775 | // data terminal ready output follows the state programmed into the DTR bit*/ |
| 776 | 776 | set_dtr((m_wr5 & WR5_DTR) ? 0 : 1); |
| 777 | 777 | } |
| 778 | 778 | |
| 779 | 779 | //------------------------------------------------- |
| 780 | | // get_stop_bits - get number of stop bits |
| 780 | // get_stop_bits - get number of stop bits |
| 781 | 781 | //------------------------------------------------- |
| 782 | 782 | |
| 783 | 783 | device_serial_interface::stop_bits_t z80sio_channel::get_stop_bits() |
| r249940 | r249941 | |
|---|
| 795 | 795 | |
| 796 | 796 | |
| 797 | 797 | //------------------------------------------------- |
| 798 | | // get_rx_word_length - get receive word length |
| 798 | // get_rx_word_length - get receive word length |
| 799 | 799 | //------------------------------------------------- |
| 800 | 800 | |
| 801 | 801 | int z80sio_channel::get_rx_word_length() |
| r249940 | r249941 | |
|---|
| 805 | 805 | |
| 806 | 806 | switch (m_wr3 & WR3_RX_WORD_LENGTH_MASK) |
| 807 | 807 | { |
| 808 | | case WR3_RX_WORD_LENGTH_5: bits = 5; break; |
| 809 | | case WR3_RX_WORD_LENGTH_6: bits = 6; break; |
| 810 | | case WR3_RX_WORD_LENGTH_7: bits = 7; break; |
| 811 | | case WR3_RX_WORD_LENGTH_8: bits = 8; break; |
| 808 | case WR3_RX_WORD_LENGTH_5: bits = 5; break; |
| 809 | case WR3_RX_WORD_LENGTH_6: bits = 6; break; |
| 810 | case WR3_RX_WORD_LENGTH_7: bits = 7; break; |
| 811 | case WR3_RX_WORD_LENGTH_8: bits = 8; break; |
| 812 | 812 | } |
| 813 | 813 | |
| 814 | 814 | return bits; |
| r249940 | r249941 | |
|---|
| 816 | 816 | |
| 817 | 817 | |
| 818 | 818 | //------------------------------------------------- |
| 819 | | // get_tx_word_length - get transmit word length |
| 819 | // get_tx_word_length - get transmit word length |
| 820 | 820 | //------------------------------------------------- |
| 821 | 821 | |
| 822 | 822 | int z80sio_channel::get_tx_word_length() |
| r249940 | r249941 | |
|---|
| 826 | 826 | |
| 827 | 827 | switch (m_wr5 & WR5_TX_WORD_LENGTH_MASK) |
| 828 | 828 | { |
| 829 | | case WR5_TX_WORD_LENGTH_5: bits = 5; break; |
| 830 | | case WR5_TX_WORD_LENGTH_6: bits = 6; break; |
| 831 | | case WR5_TX_WORD_LENGTH_7: bits = 7; break; |
| 832 | | case WR5_TX_WORD_LENGTH_8: bits = 8; break; |
| 829 | case WR5_TX_WORD_LENGTH_5: bits = 5; break; |
| 830 | case WR5_TX_WORD_LENGTH_6: bits = 6; break; |
| 831 | case WR5_TX_WORD_LENGTH_7: bits = 7; break; |
| 832 | case WR5_TX_WORD_LENGTH_8: bits = 8; break; |
| 833 | 833 | } |
| 834 | 834 | |
| 835 | 835 | return bits; |
| r249940 | r249941 | |
|---|
| 869 | 869 | |
| 870 | 870 | |
| 871 | 871 | //------------------------------------------------- |
| 872 | | // control_read - read control register |
| 872 | // control_read - read control register |
| 873 | 873 | //------------------------------------------------- |
| 874 | 874 | |
| 875 | 875 | UINT8 z80sio_channel::control_read() |
| r249940 | r249941 | |
|---|
| 886 | 886 | |
| 887 | 887 | switch (reg) |
| 888 | 888 | { |
| 889 | | case REG_RR0_STATUS: data = do_sioreg_rr0(); break; |
| 890 | | case REG_RR1_SPEC_RCV_COND: data = do_sioreg_rr1(); break; |
| 889 | case REG_RR0_STATUS: data = do_sioreg_rr0(); break; |
| 890 | case REG_RR1_SPEC_RCV_COND: data = do_sioreg_rr1(); break; |
| 891 | 891 | case REG_RR2_INTERRUPT_VECT: data = do_sioreg_rr2(); break; |
| 892 | 892 | default: |
| 893 | 893 | logerror("Z80SIO \"%s\" Channel %c : Unsupported RRx register:%02x\n", m_owner->tag(), 'A' + m_index, reg); |
| r249940 | r249941 | |
|---|
| 937 | 937 | // update register to reflect wire values TODO: Check if this will fire new interrupts |
| 938 | 938 | if (!m_dcd) m_rr0 |= RR0_DCD; |
| 939 | 939 | if (m_sync) m_rr0 |= RR0_SYNC_HUNT; |
| 940 | | if (m_cts) m_rr0 |= RR0_CTS; |
| 941 | | |
| 940 | if (m_cts) m_rr0 |= RR0_CTS; |
| 941 | |
| 942 | 942 | LOG(("Z80SIO \"%s\" Channel %c : Reset External/Status Interrupt\n", m_owner->tag(), 'A' + m_index)); |
| 943 | 943 | break; |
| 944 | 944 | case WR0_CHANNEL_RESET: |
| r249940 | r249941 | |
|---|
| 968 | 968 | break; |
| 969 | 969 | default: |
| 970 | 970 | LOG(("Z80SIO \"%s\" Channel %c : Unsupported WR0 command %02x mask %02x\n", m_owner->tag(), 'A' + m_index, data, WR0_REGISTER_MASK)); |
| 971 | | |
| 971 | |
| 972 | 972 | } |
| 973 | 973 | do_sioreg_wr0_resets(data); |
| 974 | 974 | } |
| r249940 | r249941 | |
|---|
| 983 | 983 | LOG(("Z80SIO \"%s\" Channel %c : Wait/Ready Enable %u\n", m_owner->tag(), 'A' + m_index, (data & WR1_WRDY_ENABLE) ? 1 : 0)); |
| 984 | 984 | LOG(("Z80SIO \"%s\" Channel %c : Wait/Ready Function %s\n", m_owner->tag(), 'A' + m_index, (data & WR1_WRDY_FUNCTION) ? "Ready" : "Wait")); |
| 985 | 985 | LOG(("Z80SIO \"%s\" Channel %c : Wait/Ready on %s\n", m_owner->tag(), 'A' + m_index, (data & WR1_WRDY_ON_RX_TX) ? "Receive" : "Transmit")); |
| 986 | | |
| 986 | |
| 987 | 987 | switch (data & WR1_RX_INT_MODE_MASK) |
| 988 | 988 | { |
| 989 | 989 | case WR1_RX_INT_DISABLE: |
| 990 | 990 | LOG(("Z80SIO \"%s\" Channel %c : Receiver Interrupt Disabled\n", m_owner->tag(), 'A' + m_index)); |
| 991 | 991 | break; |
| 992 | | |
| 992 | |
| 993 | 993 | case WR1_RX_INT_FIRST: |
| 994 | 994 | LOG(("Z80SIO \"%s\" Channel %c : Receiver Interrupt on First Character\n", m_owner->tag(), 'A' + m_index)); |
| 995 | 995 | break; |
| 996 | | |
| 996 | |
| 997 | 997 | case WR1_RX_INT_ALL_PARITY: |
| 998 | 998 | LOG(("Z80SIO \"%s\" Channel %c : Receiver Interrupt on All Characters, Parity Affects Vector\n", m_owner->tag(), 'A' + m_index)); |
| 999 | 999 | break; |
| 1000 | | |
| 1000 | |
| 1001 | 1001 | case WR1_RX_INT_ALL: |
| 1002 | 1002 | LOG(("Z80SIO \"%s\" Channel %c : Receiver Interrupt on All Characters\n", m_owner->tag(), 'A' + m_index)); |
| 1003 | 1003 | break; |
| r249940 | r249941 | |
|---|
| 1058 | 1058 | } |
| 1059 | 1059 | |
| 1060 | 1060 | //------------------------------------------------- |
| 1061 | | // control_write - write control register |
| 1061 | // control_write - write control register |
| 1062 | 1062 | //------------------------------------------------- |
| 1063 | 1063 | void z80sio_channel::control_write(UINT8 data) |
| 1064 | 1064 | { |
| 1065 | | UINT8 reg = m_wr0 & WR0_REGISTER_MASK; |
| 1065 | UINT8 reg = m_wr0 & WR0_REGISTER_MASK; |
| 1066 | 1066 | |
| 1067 | 1067 | if (reg != 0) |
| 1068 | 1068 | { |
| 1069 | 1069 | // mask out register index |
| 1070 | 1070 | m_wr0 &= ~WR0_REGISTER_MASK; |
| 1071 | 1071 | } |
| 1072 | | |
| 1072 | |
| 1073 | 1073 | LOG(("\n%s(%02x) reg %02x\n", FUNCNAME, data, reg)); |
| 1074 | | |
| 1074 | |
| 1075 | 1075 | switch (reg) |
| 1076 | 1076 | { |
| 1077 | | case REG_WR0_COMMAND_REGPT: do_sioreg_wr0(data); break; |
| 1078 | | case REG_WR1_INT_DMA_ENABLE: do_sioreg_wr1(data); m_uart->check_interrupts(); break; |
| 1079 | | case REG_WR2_INT_VECTOR: do_sioreg_wr2(data); break; |
| 1080 | | case REG_WR3_RX_CONTROL: do_sioreg_wr3(data); update_serial(); break; |
| 1081 | | case REG_WR4_RX_TX_MODES: do_sioreg_wr4(data); update_serial(); break; |
| 1082 | | case REG_WR5_TX_CONTROL: do_sioreg_wr5(data); update_serial(); update_rts(); break; |
| 1083 | | case REG_WR6_SYNC_OR_SDLC_A: do_sioreg_wr6(data); break; |
| 1084 | | case REG_WR7_SYNC_OR_SDLC_F: do_sioreg_wr7(data); break; |
| 1077 | case REG_WR0_COMMAND_REGPT: do_sioreg_wr0(data); break; |
| 1078 | case REG_WR1_INT_DMA_ENABLE: do_sioreg_wr1(data); m_uart->check_interrupts(); break; |
| 1079 | case REG_WR2_INT_VECTOR: do_sioreg_wr2(data); break; |
| 1080 | case REG_WR3_RX_CONTROL: do_sioreg_wr3(data); update_serial(); break; |
| 1081 | case REG_WR4_RX_TX_MODES: do_sioreg_wr4(data); update_serial(); break; |
| 1082 | case REG_WR5_TX_CONTROL: do_sioreg_wr5(data); update_serial(); update_rts(); break; |
| 1083 | case REG_WR6_SYNC_OR_SDLC_A: do_sioreg_wr6(data); break; |
| 1084 | case REG_WR7_SYNC_OR_SDLC_F: do_sioreg_wr7(data); break; |
| 1085 | 1085 | default: |
| 1086 | 1086 | logerror("Z80SIO \"%s\" Channel %c : Unsupported WRx register:%02x\n", m_owner->tag(), 'A' + m_index, reg); |
| 1087 | 1087 | } |
| r249940 | r249941 | |
|---|
| 1089 | 1089 | |
| 1090 | 1090 | |
| 1091 | 1091 | //------------------------------------------------- |
| 1092 | | // data_read - read data register |
| 1092 | // data_read - read data register |
| 1093 | 1093 | //------------------------------------------------- |
| 1094 | 1094 | UINT8 z80sio_channel::data_read() |
| 1095 | 1095 | { |
| r249940 | r249941 | |
|---|
| 1099 | 1099 | { |
| 1100 | 1100 | // load data from the FIFO |
| 1101 | 1101 | data = m_rx_data_fifo[m_rx_fifo]; |
| 1102 | | |
| 1102 | |
| 1103 | 1103 | // load error status from the FIFO |
| 1104 | 1104 | m_rr1 = (m_rr1 & ~(RR1_CRC_FRAMING_ERROR | RR1_RX_OVERRUN_ERROR | RR1_PARITY_ERROR)) | m_rx_error_fifo[m_rx_fifo]; |
| 1105 | | |
| 1105 | |
| 1106 | 1106 | // decrease FIFO pointer |
| 1107 | 1107 | m_rx_fifo--; |
| 1108 | | |
| 1108 | |
| 1109 | 1109 | if (m_rx_fifo < 0) |
| 1110 | 1110 | { |
| 1111 | 1111 | // no more characters available in the FIFO |
| 1112 | 1112 | m_rr0 &= ~ RR0_RX_CHAR_AVAILABLE; |
| 1113 | 1113 | } |
| 1114 | 1114 | } |
| 1115 | | |
| 1115 | |
| 1116 | 1116 | LOG(("Z80SIO \"%s\" Channel %c : Data Register Read '%02x'\n", m_owner->tag(), 'A' + m_index, data)); |
| 1117 | | |
| 1117 | |
| 1118 | 1118 | return data; |
| 1119 | 1119 | } |
| 1120 | | |
| 1121 | 1120 | |
| 1121 | |
| 1122 | 1122 | //------------------------------------------------- |
| 1123 | | // data_write - write data register |
| 1123 | // data_write - write data register |
| 1124 | 1124 | //------------------------------------------------- |
| 1125 | 1125 | void z80sio_channel::data_write(UINT8 data) |
| 1126 | 1126 | { |
| r249940 | r249941 | |
|---|
| 1140 | 1140 | } |
| 1141 | 1141 | else |
| 1142 | 1142 | { |
| 1143 | | LOG((" Transmitter %s, data byte dropped\n", m_wr5 & WR5_TX_ENABLE ? "not enabled" : "not emptied")); |
| 1143 | LOG((" Transmitter %s, data byte dropped\n", m_wr5 & WR5_TX_ENABLE ? "not enabled" : "not emptied")); |
| 1144 | 1144 | m_rr0 &= ~RR0_TX_BUFFER_EMPTY; |
| 1145 | 1145 | } |
| 1146 | 1146 | |
| r249940 | r249941 | |
|---|
| 1149 | 1149 | |
| 1150 | 1150 | |
| 1151 | 1151 | //------------------------------------------------- |
| 1152 | | // receive_data - receive data word |
| 1152 | // receive_data - receive data word |
| 1153 | 1153 | //------------------------------------------------- |
| 1154 | 1154 | void z80sio_channel::receive_data(UINT8 data) |
| 1155 | 1155 | { |
| r249940 | r249941 | |
|---|
| 1157 | 1157 | |
| 1158 | 1158 | if (m_rx_fifo == 2) |
| 1159 | 1159 | { |
| 1160 | | LOG((" Overrun detected\n")); |
| 1160 | LOG((" Overrun detected\n")); |
| 1161 | 1161 | // receive overrun error detected |
| 1162 | 1162 | m_rx_error |= RR1_RX_OVERRUN_ERROR; |
| 1163 | 1163 | |
| r249940 | r249941 | |
|---|
| 1180 | 1180 | { |
| 1181 | 1181 | m_rx_fifo++; |
| 1182 | 1182 | } |
| 1183 | | |
| 1183 | |
| 1184 | 1184 | // store received character and error status into FIFO |
| 1185 | 1185 | m_rx_data_fifo[m_rx_fifo] = data; |
| 1186 | 1186 | m_rx_error_fifo[m_rx_fifo] = m_rx_error; |
| 1187 | | |
| 1187 | |
| 1188 | 1188 | m_rr0 |= RR0_RX_CHAR_AVAILABLE; |
| 1189 | | |
| 1189 | |
| 1190 | 1190 | // receive interrupt |
| 1191 | 1191 | switch (m_wr1 & WR1_RX_INT_MODE_MASK) |
| 1192 | 1192 | { |
| r249940 | r249941 | |
|---|
| 1210 | 1210 | |
| 1211 | 1211 | |
| 1212 | 1212 | //------------------------------------------------- |
| 1213 | | // cts_w - clear to send handler |
| 1213 | // cts_w - clear to send handler |
| 1214 | 1214 | //------------------------------------------------- |
| 1215 | 1215 | |
| 1216 | 1216 | WRITE_LINE_MEMBER( z80sio_channel::cts_w ) |
| r249940 | r249941 | |
|---|
| 1249 | 1249 | |
| 1250 | 1250 | |
| 1251 | 1251 | //------------------------------------------------- |
| 1252 | | // dcd_w - data carrier detected handler |
| 1252 | // dcd_w - data carrier detected handler |
| 1253 | 1253 | //------------------------------------------------- |
| 1254 | 1254 | |
| 1255 | 1255 | WRITE_LINE_MEMBER( z80sio_channel::dcd_w ) |
| r249940 | r249941 | |
|---|
| 1287 | 1287 | |
| 1288 | 1288 | |
| 1289 | 1289 | //------------------------------------------------- |
| 1290 | | // sh_w - Sync Hunt handler |
| 1290 | // sh_w - Sync Hunt handler |
| 1291 | 1291 | //------------------------------------------------- |
| 1292 | 1292 | |
| 1293 | 1293 | WRITE_LINE_MEMBER( z80sio_channel::sync_w ) |
| r249940 | r249941 | |
|---|
| 1320 | 1320 | |
| 1321 | 1321 | |
| 1322 | 1322 | //------------------------------------------------- |
| 1323 | | // rxc_w - receive clock |
| 1323 | // rxc_w - receive clock |
| 1324 | 1324 | //------------------------------------------------- |
| 1325 | 1325 | |
| 1326 | 1326 | WRITE_LINE_MEMBER( z80sio_channel::rxc_w ) |
| r249940 | r249941 | |
|---|
| 1342 | 1342 | |
| 1343 | 1343 | |
| 1344 | 1344 | //------------------------------------------------- |
| 1345 | | // txc_w - transmit clock |
| 1345 | // txc_w - transmit clock |
| 1346 | 1346 | //------------------------------------------------- |
| 1347 | 1347 | |
| 1348 | 1348 | WRITE_LINE_MEMBER( z80sio_channel::txc_w ) |
| r249940 | r249941 | |
|---|
| 1364 | 1364 | |
| 1365 | 1365 | |
| 1366 | 1366 | //------------------------------------------------- |
| 1367 | | // update_serial - |
| 1367 | // update_serial - |
| 1368 | 1368 | //------------------------------------------------- |
| 1369 | 1369 | void z80sio_channel::update_serial() |
| 1370 | 1370 | { |
| r249940 | r249941 | |
|---|
| 1402 | 1402 | |
| 1403 | 1403 | |
| 1404 | 1404 | //------------------------------------------------- |
| 1405 | | // set_dtr - |
| 1405 | // set_dtr - |
| 1406 | 1406 | //------------------------------------------------- |
| 1407 | 1407 | |
| 1408 | 1408 | void z80sio_channel::set_dtr(int state) |
| r249940 | r249941 | |
|---|
| 1417 | 1417 | } |
| 1418 | 1418 | |
| 1419 | 1419 | //------------------------------------------------- |
| 1420 | | // write_rx - |
| 1420 | // write_rx - |
| 1421 | 1421 | //------------------------------------------------- |
| 1422 | 1422 | |
| 1423 | 1423 | WRITE_LINE_MEMBER(z80sio_channel::write_rx) |
trunk/src/devices/machine/z80sio.h
| r249940 | r249941 | |
|---|
| 59 | 59 | #include "cpu/z80/z80daisy.h" |
| 60 | 60 | |
| 61 | 61 | //************************************************************************** |
| 62 | | // DEVICE CONFIGURATION MACROS |
| 62 | // DEVICE CONFIGURATION MACROS |
| 63 | 63 | //************************************************************************** |
| 64 | 64 | |
| 65 | 65 | #define MCFG_Z80SIO_ADD(_tag, _clock, _rxa, _txa, _rxb, _txb) \ |
| r249940 | r249941 | |
|---|
| 116 | 116 | |
| 117 | 117 | |
| 118 | 118 | //************************************************************************** |
| 119 | | // TYPE DEFINITIONS |
| 119 | // TYPE DEFINITIONS |
| 120 | 120 | //************************************************************************** |
| 121 | 121 | |
| 122 | 122 | // ======================> z80sio_channel |
| r249940 | r249941 | |
|---|
| 146 | 146 | UINT8 do_sioreg_rr0(); |
| 147 | 147 | UINT8 do_sioreg_rr1(); |
| 148 | 148 | UINT8 do_sioreg_rr2(); |
| 149 | | |
| 149 | |
| 150 | 150 | // write register handlers |
| 151 | 151 | void do_sioreg_wr0(UINT8 data); |
| 152 | 152 | void do_sioreg_wr0_resets(UINT8 data); |
| r249940 | r249941 | |
|---|
| 157 | 157 | void do_sioreg_wr5(UINT8 data); |
| 158 | 158 | void do_sioreg_wr6(UINT8 data); |
| 159 | 159 | void do_sioreg_wr7(UINT8 data); |
| 160 | | |
| 160 | |
| 161 | 161 | UINT8 control_read(); |
| 162 | 162 | void control_write(UINT8 data); |
| 163 | 163 | |
| r249940 | r249941 | |
|---|
| 178 | 178 | int m_txc; |
| 179 | 179 | |
| 180 | 180 | // Register state |
| 181 | | // read registers enum |
| 181 | // read registers enum |
| 182 | 182 | UINT8 m_rr0; // REG_RR0_STATUS |
| 183 | 183 | UINT8 m_rr1; // REG_RR1_SPEC_RCV_COND |
| 184 | 184 | UINT8 m_rr2; // REG_RR2_INTERRUPT_VECT |
| 185 | | // write registers enum |
| 185 | // write registers enum |
| 186 | 186 | UINT8 m_wr0; // REG_WR0_COMMAND_REGPT |
| 187 | 187 | UINT8 m_wr1; // REG_WR1_INT_DMA_ENABLE |
| 188 | 188 | UINT8 m_wr2; // REG_WR2_INT_VECTOR |
| r249940 | r249941 | |
|---|
| 206 | 206 | // Read registers |
| 207 | 207 | enum |
| 208 | 208 | { |
| 209 | | REG_RR0_STATUS = 0, |
| 210 | | REG_RR1_SPEC_RCV_COND = 1, |
| 211 | | REG_RR2_INTERRUPT_VECT = 2 |
| 209 | REG_RR0_STATUS = 0, |
| 210 | REG_RR1_SPEC_RCV_COND = 1, |
| 211 | REG_RR2_INTERRUPT_VECT = 2 |
| 212 | 212 | }; |
| 213 | | |
| 213 | |
| 214 | 214 | // Write registers |
| 215 | 215 | enum |
| 216 | 216 | { |
| 217 | | REG_WR0_COMMAND_REGPT = 0, |
| 218 | | REG_WR1_INT_DMA_ENABLE = 1, |
| 219 | | REG_WR2_INT_VECTOR = 2, |
| 220 | | REG_WR3_RX_CONTROL = 3, |
| 221 | | REG_WR4_RX_TX_MODES = 4, |
| 222 | | REG_WR5_TX_CONTROL = 5, |
| 223 | | REG_WR6_SYNC_OR_SDLC_A = 6, |
| 224 | | REG_WR7_SYNC_OR_SDLC_F = 7 |
| 217 | REG_WR0_COMMAND_REGPT = 0, |
| 218 | REG_WR1_INT_DMA_ENABLE = 1, |
| 219 | REG_WR2_INT_VECTOR = 2, |
| 220 | REG_WR3_RX_CONTROL = 3, |
| 221 | REG_WR4_RX_TX_MODES = 4, |
| 222 | REG_WR5_TX_CONTROL = 5, |
| 223 | REG_WR6_SYNC_OR_SDLC_A = 6, |
| 224 | REG_WR7_SYNC_OR_SDLC_F = 7 |
| 225 | 225 | }; |
| 226 | | |
| 226 | |
| 227 | 227 | enum |
| 228 | 228 | { |
| 229 | | RR0_RX_CHAR_AVAILABLE = 0x01, |
| 230 | | RR0_INTERRUPT_PENDING = 0x02, |
| 231 | | RR0_TX_BUFFER_EMPTY = 0x04, |
| 232 | | RR0_DCD = 0x08, |
| 233 | | RR0_SYNC_HUNT = 0x10, |
| 234 | | RR0_CTS = 0x20, |
| 235 | | RR0_TX_UNDERRUN = 0x40, |
| 236 | | RR0_BREAK_ABORT = 0x80 |
| 229 | RR0_RX_CHAR_AVAILABLE = 0x01, |
| 230 | RR0_INTERRUPT_PENDING = 0x02, |
| 231 | RR0_TX_BUFFER_EMPTY = 0x04, |
| 232 | RR0_DCD = 0x08, |
| 233 | RR0_SYNC_HUNT = 0x10, |
| 234 | RR0_CTS = 0x20, |
| 235 | RR0_TX_UNDERRUN = 0x40, |
| 236 | RR0_BREAK_ABORT = 0x80 |
| 237 | 237 | }; |
| 238 | 238 | |
| 239 | 239 | enum |
| 240 | 240 | { |
| 241 | | RR1_ALL_SENT = 0x01, |
| 242 | | RR1_RESIDUE_CODE_MASK = 0x0e, |
| 243 | | RR1_PARITY_ERROR = 0x10, |
| 244 | | RR1_RX_OVERRUN_ERROR = 0x20, |
| 245 | | RR1_CRC_FRAMING_ERROR = 0x40, |
| 246 | | RR1_END_OF_FRAME = 0x80 |
| 241 | RR1_ALL_SENT = 0x01, |
| 242 | RR1_RESIDUE_CODE_MASK = 0x0e, |
| 243 | RR1_PARITY_ERROR = 0x10, |
| 244 | RR1_RX_OVERRUN_ERROR = 0x20, |
| 245 | RR1_CRC_FRAMING_ERROR = 0x40, |
| 246 | RR1_END_OF_FRAME = 0x80 |
| 247 | 247 | }; |
| 248 | 248 | |
| 249 | 249 | enum |
| 250 | | { // TODO: overload SIO functionality |
| 251 | | RR2_INT_VECTOR_MASK = 0xff, // SCC channel A, SIO channel B (special case) |
| 252 | | RR2_INT_VECTOR_V1 = 0x02, // SIO (special case) /SCC Channel B |
| 253 | | RR2_INT_VECTOR_V2 = 0x04, // SIO (special case) /SCC Channel B |
| 254 | | RR2_INT_VECTOR_V3 = 0x08 // SIO (special case) /SCC Channel B |
| 250 | { // TODO: overload SIO functionality |
| 251 | RR2_INT_VECTOR_MASK = 0xff, // SCC channel A, SIO channel B (special case) |
| 252 | RR2_INT_VECTOR_V1 = 0x02, // SIO (special case) /SCC Channel B |
| 253 | RR2_INT_VECTOR_V2 = 0x04, // SIO (special case) /SCC Channel B |
| 254 | RR2_INT_VECTOR_V3 = 0x08 // SIO (special case) /SCC Channel B |
| 255 | 255 | }; |
| 256 | | |
| 256 | |
| 257 | 257 | enum |
| 258 | 258 | { |
| 259 | | WR0_REGISTER_MASK = 0x07, |
| 260 | | WR0_COMMAND_MASK = 0x38, |
| 261 | | WR0_NULL = 0x00, |
| 262 | | WR0_SEND_ABORT = 0x08, // not supported |
| 263 | | WR0_RESET_EXT_STATUS = 0x10, |
| 264 | | WR0_CHANNEL_RESET = 0x18, |
| 265 | | WR0_ENABLE_INT_NEXT_RX = 0x20, |
| 266 | | WR0_RESET_TX_INT = 0x28, // not supported |
| 267 | | WR0_ERROR_RESET = 0x30, |
| 268 | | WR0_RETURN_FROM_INT = 0x38, // not supported |
| 269 | | WR0_CRC_RESET_CODE_MASK = 0xc0, // not supported |
| 270 | | WR0_CRC_RESET_NULL = 0x00, // not supported |
| 271 | | WR0_CRC_RESET_RX = 0x40, // not supported |
| 272 | | WR0_CRC_RESET_TX = 0x80, // not supported |
| 259 | WR0_REGISTER_MASK = 0x07, |
| 260 | WR0_COMMAND_MASK = 0x38, |
| 261 | WR0_NULL = 0x00, |
| 262 | WR0_SEND_ABORT = 0x08, // not supported |
| 263 | WR0_RESET_EXT_STATUS = 0x10, |
| 264 | WR0_CHANNEL_RESET = 0x18, |
| 265 | WR0_ENABLE_INT_NEXT_RX = 0x20, |
| 266 | WR0_RESET_TX_INT = 0x28, // not supported |
| 267 | WR0_ERROR_RESET = 0x30, |
| 268 | WR0_RETURN_FROM_INT = 0x38, // not supported |
| 269 | WR0_CRC_RESET_CODE_MASK = 0xc0, // not supported |
| 270 | WR0_CRC_RESET_NULL = 0x00, // not supported |
| 271 | WR0_CRC_RESET_RX = 0x40, // not supported |
| 272 | WR0_CRC_RESET_TX = 0x80, // not supported |
| 273 | 273 | WR0_CRC_RESET_TX_UNDERRUN = 0xc0 // not supported |
| 274 | 274 | }; |
| 275 | 275 | |
| 276 | 276 | enum |
| 277 | 277 | { |
| 278 | | WR1_EXT_INT_ENABLE = 0x01, |
| 279 | | WR1_TX_INT_ENABLE = 0x02, |
| 280 | | WR1_STATUS_VECTOR = 0x04, |
| 281 | | WR1_RX_INT_MODE_MASK = 0x18, |
| 282 | | WR1_RX_INT_DISABLE = 0x00, |
| 283 | | WR1_RX_INT_FIRST = 0x08, |
| 284 | | WR1_RX_INT_ALL_PARITY = 0x10, // not supported |
| 285 | | WR1_RX_INT_ALL = 0x18, |
| 286 | | WR1_WRDY_ON_RX_TX = 0x20, // not supported |
| 287 | | WR1_WRDY_FUNCTION = 0x40, // not supported |
| 288 | | WR1_WRDY_ENABLE = 0x80 // not supported |
| 278 | WR1_EXT_INT_ENABLE = 0x01, |
| 279 | WR1_TX_INT_ENABLE = 0x02, |
| 280 | WR1_STATUS_VECTOR = 0x04, |
| 281 | WR1_RX_INT_MODE_MASK = 0x18, |
| 282 | WR1_RX_INT_DISABLE = 0x00, |
| 283 | WR1_RX_INT_FIRST = 0x08, |
| 284 | WR1_RX_INT_ALL_PARITY = 0x10, // not supported |
| 285 | WR1_RX_INT_ALL = 0x18, |
| 286 | WR1_WRDY_ON_RX_TX = 0x20, // not supported |
| 287 | WR1_WRDY_FUNCTION = 0x40, // not supported |
| 288 | WR1_WRDY_ENABLE = 0x80 // not supported |
| 289 | 289 | }; |
| 290 | 290 | |
| 291 | 291 | enum |
| 292 | 292 | { |
| 293 | | WR2_DATA_XFER_INT = 0x00, // not supported |
| 294 | | WR2_DATA_XFER_DMA_INT = 0x01, // not supported |
| 295 | | WR2_DATA_XFER_DMA = 0x02, // not supported |
| 296 | | WR2_DATA_XFER_ILLEGAL = 0x03, // not supported |
| 297 | | WR2_DATA_XFER_MASK = 0x03, // not supported |
| 298 | | WR2_PRIORITY = 0x04, // not supported |
| 299 | | WR2_MODE_8085_1 = 0x00, // not supported |
| 300 | | WR2_MODE_8085_2 = 0x08, // not supported |
| 301 | | WR2_MODE_8086_8088 = 0x10, // not supported |
| 302 | | WR2_MODE_ILLEGAL = 0x18, // not supported |
| 303 | | WR2_MODE_MASK = 0x18, // not supported |
| 304 | | WR2_VECTORED_INT = 0x20, // not supported |
| 305 | | WR2_PIN10_SYNDETB_RTSB = 0x80 // not supported |
| 293 | WR2_DATA_XFER_INT = 0x00, // not supported |
| 294 | WR2_DATA_XFER_DMA_INT = 0x01, // not supported |
| 295 | WR2_DATA_XFER_DMA = 0x02, // not supported |
| 296 | WR2_DATA_XFER_ILLEGAL = 0x03, // not supported |
| 297 | WR2_DATA_XFER_MASK = 0x03, // not supported |
| 298 | WR2_PRIORITY = 0x04, // not supported |
| 299 | WR2_MODE_8085_1 = 0x00, // not supported |
| 300 | WR2_MODE_8085_2 = 0x08, // not supported |
| 301 | WR2_MODE_8086_8088 = 0x10, // not supported |
| 302 | WR2_MODE_ILLEGAL = 0x18, // not supported |
| 303 | WR2_MODE_MASK = 0x18, // not supported |
| 304 | WR2_VECTORED_INT = 0x20, // not supported |
| 305 | WR2_PIN10_SYNDETB_RTSB = 0x80 // not supported |
| 306 | 306 | }; |
| 307 | 307 | |
| 308 | 308 | enum |
| 309 | 309 | { |
| 310 | | WR3_RX_ENABLE = 0x01, |
| 310 | WR3_RX_ENABLE = 0x01, |
| 311 | 311 | WR3_SYNC_CHAR_LOAD_INHIBIT= 0x02, // not supported |
| 312 | | WR3_ADDRESS_SEARCH_MODE = 0x04, // not supported |
| 313 | | WR3_RX_CRC_ENABLE = 0x08, // not supported |
| 314 | | WR3_ENTER_HUNT_PHASE = 0x10, // not supported |
| 315 | | WR3_AUTO_ENABLES = 0x20, |
| 316 | | WR3_RX_WORD_LENGTH_MASK = 0xc0, |
| 317 | | WR3_RX_WORD_LENGTH_5 = 0x00, |
| 318 | | WR3_RX_WORD_LENGTH_7 = 0x40, |
| 319 | | WR3_RX_WORD_LENGTH_6 = 0x80, |
| 320 | | WR3_RX_WORD_LENGTH_8 = 0xc0 |
| 312 | WR3_ADDRESS_SEARCH_MODE = 0x04, // not supported |
| 313 | WR3_RX_CRC_ENABLE = 0x08, // not supported |
| 314 | WR3_ENTER_HUNT_PHASE = 0x10, // not supported |
| 315 | WR3_AUTO_ENABLES = 0x20, |
| 316 | WR3_RX_WORD_LENGTH_MASK = 0xc0, |
| 317 | WR3_RX_WORD_LENGTH_5 = 0x00, |
| 318 | WR3_RX_WORD_LENGTH_7 = 0x40, |
| 319 | WR3_RX_WORD_LENGTH_6 = 0x80, |
| 320 | WR3_RX_WORD_LENGTH_8 = 0xc0 |
| 321 | 321 | }; |
| 322 | 322 | |
| 323 | 323 | enum |
| 324 | 324 | { |
| 325 | | WR4_PARITY_ENABLE = 0x01, |
| 326 | | WR4_PARITY_EVEN = 0x02, |
| 327 | | WR4_STOP_BITS_MASK = 0x0c, |
| 328 | | WR4_STOP_BITS_1 = 0x04, |
| 329 | | WR4_STOP_BITS_1_5 = 0x08, // not supported |
| 330 | | WR4_STOP_BITS_2 = 0x0c, |
| 331 | | WR4_SYNC_MODE_MASK = 0x30, // not supported |
| 332 | | WR4_SYNC_MODE_8_BIT = 0x00, // not supported |
| 333 | | WR4_SYNC_MODE_16_BIT = 0x10, // not supported |
| 334 | | WR4_SYNC_MODE_SDLC = 0x20, // not supported |
| 335 | | WR4_SYNC_MODE_EXT = 0x30, // not supported |
| 336 | | WR4_CLOCK_RATE_MASK = 0xc0, |
| 337 | | WR4_CLOCK_RATE_X1 = 0x00, |
| 338 | | WR4_CLOCK_RATE_X16 = 0x40, |
| 339 | | WR4_CLOCK_RATE_X32 = 0x80, |
| 340 | | WR4_CLOCK_RATE_X64 = 0xc0 |
| 325 | WR4_PARITY_ENABLE = 0x01, |
| 326 | WR4_PARITY_EVEN = 0x02, |
| 327 | WR4_STOP_BITS_MASK = 0x0c, |
| 328 | WR4_STOP_BITS_1 = 0x04, |
| 329 | WR4_STOP_BITS_1_5 = 0x08, // not supported |
| 330 | WR4_STOP_BITS_2 = 0x0c, |
| 331 | WR4_SYNC_MODE_MASK = 0x30, // not supported |
| 332 | WR4_SYNC_MODE_8_BIT = 0x00, // not supported |
| 333 | WR4_SYNC_MODE_16_BIT = 0x10, // not supported |
| 334 | WR4_SYNC_MODE_SDLC = 0x20, // not supported |
| 335 | WR4_SYNC_MODE_EXT = 0x30, // not supported |
| 336 | WR4_CLOCK_RATE_MASK = 0xc0, |
| 337 | WR4_CLOCK_RATE_X1 = 0x00, |
| 338 | WR4_CLOCK_RATE_X16 = 0x40, |
| 339 | WR4_CLOCK_RATE_X32 = 0x80, |
| 340 | WR4_CLOCK_RATE_X64 = 0xc0 |
| 341 | 341 | }; |
| 342 | 342 | |
| 343 | 343 | enum |
| 344 | 344 | { |
| 345 | | WR5_TX_CRC_ENABLE = 0x01, // not supported |
| 346 | | WR5_RTS = 0x02, |
| 347 | | WR5_CRC16 = 0x04, // not supported |
| 348 | | WR5_TX_ENABLE = 0x08, |
| 349 | | WR5_SEND_BREAK = 0x10, |
| 350 | | WR5_TX_WORD_LENGTH_MASK = 0x60, |
| 351 | | WR5_TX_WORD_LENGTH_5 = 0x00, |
| 352 | | WR5_TX_WORD_LENGTH_6 = 0x40, |
| 353 | | WR5_TX_WORD_LENGTH_7 = 0x20, |
| 354 | | WR5_TX_WORD_LENGTH_8 = 0x60, |
| 355 | | WR5_DTR = 0x80 |
| 345 | WR5_TX_CRC_ENABLE = 0x01, // not supported |
| 346 | WR5_RTS = 0x02, |
| 347 | WR5_CRC16 = 0x04, // not supported |
| 348 | WR5_TX_ENABLE = 0x08, |
| 349 | WR5_SEND_BREAK = 0x10, |
| 350 | WR5_TX_WORD_LENGTH_MASK = 0x60, |
| 351 | WR5_TX_WORD_LENGTH_5 = 0x00, |
| 352 | WR5_TX_WORD_LENGTH_6 = 0x40, |
| 353 | WR5_TX_WORD_LENGTH_7 = 0x20, |
| 354 | WR5_TX_WORD_LENGTH_8 = 0x60, |
| 355 | WR5_DTR = 0x80 |
| 356 | 356 | }; |
| 357 | 357 | |
| 358 | 358 | void update_serial(); |
| r249940 | r249941 | |
|---|
| 366 | 366 | int get_tx_word_length(); |
| 367 | 367 | |
| 368 | 368 | // receiver state |
| 369 | | UINT8 m_rx_data_fifo[3]; // receive data FIFO |
| 370 | | UINT8 m_rx_error_fifo[3]; // receive error FIFO |
| 371 | | UINT8 m_rx_error; // current receive error |
| 372 | | int m_rx_fifo; // receive FIFO pointer |
| 369 | UINT8 m_rx_data_fifo[3]; // receive data FIFO |
| 370 | UINT8 m_rx_error_fifo[3]; // receive error FIFO |
| 371 | UINT8 m_rx_error; // current receive error |
| 372 | int m_rx_fifo; // receive FIFO pointer |
| 373 | 373 | |
| 374 | | int m_rx_clock; // receive clock pulse count |
| 375 | | int m_rx_first; // first character received |
| 376 | | int m_rx_break; // receive break condition |
| 377 | | UINT8 m_rx_rr0_latch; // read register 0 latched |
| 374 | int m_rx_clock; // receive clock pulse count |
| 375 | int m_rx_first; // first character received |
| 376 | int m_rx_break; // receive break condition |
| 377 | UINT8 m_rx_rr0_latch; // read register 0 latched |
| 378 | 378 | |
| 379 | 379 | int m_rxd; |
| 380 | | int m_sh; // sync hunt |
| 381 | | int m_cts; // clear to send latch |
| 382 | | int m_dcd; // data carrier detect latch |
| 380 | int m_sh; // sync hunt |
| 381 | int m_cts; // clear to send latch |
| 382 | int m_dcd; // data carrier detect latch |
| 383 | 383 | |
| 384 | 384 | // transmitter state |
| 385 | | UINT8 m_tx_data; // transmit data register |
| 386 | | int m_tx_clock; // transmit clock pulse count |
| 385 | UINT8 m_tx_data; // transmit data register |
| 386 | int m_tx_clock; // transmit clock pulse count |
| 387 | 387 | |
| 388 | | int m_dtr; // data terminal ready |
| 389 | | int m_rts; // request to send |
| 388 | int m_dtr; // data terminal ready |
| 389 | int m_rts; // request to send |
| 390 | 390 | |
| 391 | 391 | // synchronous state |
| 392 | | UINT16 m_sync; // sync character |
| 392 | UINT16 m_sync; // sync character |
| 393 | 393 | |
| 394 | 394 | int m_index; |
| 395 | 395 | z80sio_device *m_uart; |
| r249940 | r249941 | |
|---|
| 403 | 403 | { |
| 404 | 404 | friend class z80sio_channel; |
| 405 | 405 | |
| 406 | | public: |
| 406 | public: |
| 407 | 407 | // construction/destruction |
| 408 | 408 | z80sio_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT32 variant, const char *shortname, const char *source); |
| 409 | 409 | z80sio_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 410 | | |
| 410 | |
| 411 | 411 | template<class _Object> static devcb_base &set_out_txda_callback(device_t &device, _Object object) { return downcast<z80sio_device &>(device).m_out_txda_cb.set_callback(object); } |
| 412 | 412 | template<class _Object> static devcb_base &set_out_dtra_callback(device_t &device, _Object object) { return downcast<z80sio_device &>(device).m_out_dtra_cb.set_callback(object); } |
| 413 | 413 | template<class _Object> static devcb_base &set_out_rtsa_callback(device_t &device, _Object object) { return downcast<z80sio_device &>(device).m_out_rtsa_cb.set_callback(object); } |
| r249940 | r249941 | |
|---|
| 504 | 504 | int m_rxcb; |
| 505 | 505 | int m_txcb; |
| 506 | 506 | |
| 507 | | devcb_write_line m_out_txda_cb; |
| 508 | | devcb_write_line m_out_dtra_cb; |
| 509 | | devcb_write_line m_out_rtsa_cb; |
| 510 | | devcb_write_line m_out_wrdya_cb; |
| 511 | | devcb_write_line m_out_synca_cb; |
| 507 | devcb_write_line m_out_txda_cb; |
| 508 | devcb_write_line m_out_dtra_cb; |
| 509 | devcb_write_line m_out_rtsa_cb; |
| 510 | devcb_write_line m_out_wrdya_cb; |
| 511 | devcb_write_line m_out_synca_cb; |
| 512 | 512 | |
| 513 | | devcb_write_line m_out_txdb_cb; |
| 514 | | devcb_write_line m_out_dtrb_cb; |
| 515 | | devcb_write_line m_out_rtsb_cb; |
| 516 | | devcb_write_line m_out_wrdyb_cb; |
| 517 | | devcb_write_line m_out_syncb_cb; |
| 513 | devcb_write_line m_out_txdb_cb; |
| 514 | devcb_write_line m_out_dtrb_cb; |
| 515 | devcb_write_line m_out_rtsb_cb; |
| 516 | devcb_write_line m_out_wrdyb_cb; |
| 517 | devcb_write_line m_out_syncb_cb; |
| 518 | 518 | |
| 519 | | devcb_write_line m_out_int_cb; |
| 520 | | devcb_write_line m_out_rxdrqa_cb; |
| 521 | | devcb_write_line m_out_txdrqa_cb; |
| 522 | | devcb_write_line m_out_rxdrqb_cb; |
| 523 | | devcb_write_line m_out_txdrqb_cb; |
| 519 | devcb_write_line m_out_int_cb; |
| 520 | devcb_write_line m_out_rxdrqa_cb; |
| 521 | devcb_write_line m_out_txdrqa_cb; |
| 522 | devcb_write_line m_out_rxdrqb_cb; |
| 523 | devcb_write_line m_out_txdrqb_cb; |
| 524 | 524 | |
| 525 | | int m_int_state[8]; // interrupt state |
| 525 | int m_int_state[8]; // interrupt state |
| 526 | 526 | int m_variant; |
| 527 | 527 | }; |
| 528 | 528 | |
trunk/src/mame/drivers/aristmk5.c
| r249940 | r249941 | |
|---|
| 1 | 1 | // license:BSD-3-Clause |
| 2 | | // copyright-holders:David Haywood, Palindrome |
| 2 | // copyright-holders:David Haywood, Palindrome, Roberto Fresca |
| 3 | 3 | /**************************************************************************************************************** |
| 4 | 4 | |
| 5 | 5 | Aristocrat MK5 / MKV hardware |
| r249940 | r249941 | |
|---|
| 522 | 522 | |
| 523 | 523 | |
| 524 | 524 | static MACHINE_CONFIG_START( aristmk5, aristmk5_state ) |
| 525 | | MCFG_CPU_ADD("maincpu", ARM, MASTER_CLOCK/6) // 12000000 |
| 525 | MCFG_CPU_ADD("maincpu", ARM, MASTER_CLOCK/6) // 12000000 |
| 526 | 526 | MCFG_CPU_PROGRAM_MAP(aristmk5_drame_map) |
| 527 | 527 | MCFG_WATCHDOG_TIME_INIT(attotime::from_seconds(2)) /* 1.6 - 2 seconds */ |
| 528 | 528 | |
| r249940 | r249941 | |
|---|
| 568 | 568 | MACHINE_CONFIG_END |
| 569 | 569 | |
| 570 | 570 | static MACHINE_CONFIG_START( aristmk5_usa, aristmk5_state ) |
| 571 | | MCFG_CPU_ADD("maincpu", ARM, MASTER_CLOCK/6) // 12000000 |
| 571 | MCFG_CPU_ADD("maincpu", ARM, MASTER_CLOCK/6) // 12000000 |
| 572 | 572 | MCFG_CPU_PROGRAM_MAP(aristmk5_map) |
| 573 | 573 | MCFG_WATCHDOG_TIME_INIT(attotime::from_seconds(2)) /* 1.6 - 2 seconds */ |
| 574 | 574 | |
| r249940 | r249941 | |
|---|
| 712 | 712 | ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 ) |
| 713 | 713 | ROM_END |
| 714 | 714 | |
| 715 | // MV4091 - 10 Credit Multiplier / 9 Line Multiline. |
| 716 | // QUEEN OF THE NILE - NSW/ACT B - 13/05/97. |
| 717 | // Marked as GHG409102 |
| 718 | // All devices are 27c4002 instead of 27c4096. |
| 719 | // Even when it's a NSW/ACT, the program seems to be for US-Export platforms... |
| 720 | ROM_START( qotna ) |
| 721 | ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) |
| 722 | ROM_LOAD32_WORD( "mv4091_qotn.u7", 0x000000, 0x80000, CRC(a00ab2cf) SHA1(eb3120fe4b1d0554c224c7646e727e86fd35975e) ) |
| 723 | ROM_LOAD32_WORD( "mv4091_qotn.u11", 0x000002, 0x80000, CRC(c4a35337) SHA1(d469ed154caed1f0a4cf89e67d852924c95172ed) ) |
| 724 | ROM_LOAD32_WORD( "mv4091_qotn.u8", 0x100000, 0x80000, CRC(16a629e1) SHA1(0dee11a2f1b2068a86b3e0b6c01d115555a657c9) ) |
| 725 | ROM_LOAD32_WORD( "mv4091_qotn.u12", 0x100002, 0x80000, CRC(7871a846) SHA1(ac1d741092afda842e1864f1a7a14137a9ee46d9) ) |
| 726 | |
| 727 | ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */ |
| 728 | |
| 729 | ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 ) |
| 730 | |
| 731 | ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 ) |
| 732 | ROM_END |
| 733 | |
| 715 | 734 | ROM_START( swthrt2v ) |
| 716 | 735 | ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) |
| 717 | 736 | ROM_LOAD32_WORD( "01j01986.u7", 0x000000, 0x80000, CRC(f51b2faa) SHA1(dbcfdbee92af5f89a8a2611bbc687ee0cc907642) ) |
| r249940 | r249941 | |
|---|
| 796 | 815 | |
| 797 | 816 | ROM_REGION( 0x100, "eeproms", 0 ) |
| 798 | 817 | ROM_LOAD( "st93c46.u27", 0x0000, 0x0080, CRC(115c305a) SHA1(684a70d74ec92564e17c4292cd357e603842c485) ) |
| 799 | | ROM_LOAD( "st93c46.u26", 0x0080, 0x0080, CRC(652d544c) SHA1(cd5bd20e9a0f22d7367cc169e2844a02751c7c91) ) // blank... all 0xff's |
| 818 | ROM_LOAD( "st93c46.u26", 0x0080, 0x0080, CRC(652d544c) SHA1(cd5bd20e9a0f22d7367cc169e2844a02751c7c91) ) // blank... all 0xff's |
| 800 | 819 | |
| 801 | 820 | ROM_REGION( 0x0005, "plds", 0 ) |
| 802 | 821 | ROM_LOAD( "gal20v8b.u22", 0x0000, 0x0001, NO_DUMP ) /* 28-Lead PLCC package. Unable to read */ |
| r249940 | r249941 | |
|---|
| 806 | 825 | ROM_LOAD( "gal20v8b.u65", 0x0000, 0x0001, NO_DUMP ) /* 28-Lead PLCC package. Unable to read */ |
| 807 | 826 | ROM_END |
| 808 | 827 | |
| 828 | // 630 - 10 Credit Multiplier / 9 Line Multiline. |
| 829 | // The Chariot Challenge - NSW/ACT - A - 10/08/98. |
| 830 | // 04J00714 |
| 831 | ROM_START( chariotc ) |
| 832 | ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) |
| 833 | ROM_LOAD32_WORD( "04j00714_chariot_challenge.u7", 0x000000, 0x80000, CRC(2f3a1af7) SHA1(e1448116a81687cb79dd380dfbc8decf1f83e649) ) |
| 834 | ROM_LOAD32_WORD( "04j00714_chariot_challenge.u11", 0x000002, 0x80000, CRC(ef4f49e8) SHA1(8ff21f679a55cdfebcf22c109dfd3b41773293bd) ) |
| 835 | ROM_LOAD32_WORD( "04j00714_chariot_challenge.u8", 0x100000, 0x80000, CRC(fa24cfde) SHA1(1725c38a8a15915d8aa8e59afef9ce1d6e8d01c5) ) |
| 836 | ROM_LOAD32_WORD( "04j00714_chariot_challenge.u12", 0x100002, 0x80000, CRC(b8d4a5ec) SHA1(097e44cdb30b9aafd7f5358c8f0cdd130ec0615e) ) |
| 837 | |
| 838 | ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */ |
| 839 | |
| 840 | ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 ) |
| 841 | |
| 842 | ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 ) |
| 843 | ROM_END |
| 844 | |
| 809 | 845 | ROM_START( wtiger ) |
| 810 | 846 | ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) |
| 811 | 847 | ROM_LOAD32_WORD( "0200954v.u7", 0x000000, 0x80000, CRC(752e54c5) SHA1(9317544a7cf2d9bf29347d31fe72331fc3d018ef) ) |
| r249940 | r249941 | |
|---|
| 888 | 924 | ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 ) |
| 889 | 925 | ROM_END |
| 890 | 926 | |
| 927 | // 603(a) - 3,5,10,25,50 Credit Multiplier / 20 Line Multiline. |
| 928 | // Cash Chameleon 100cm - Export B - 06/12/96. |
| 929 | // Marked as DHG4078. |
| 930 | ROM_START( cashcham ) |
| 931 | ARISTOCRAT_MK5_BIOS |
| 932 | ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) |
| 933 | ROM_LOAD32_WORD( "dhg4078_cash_chameleon.u7", 0x000000, 0x80000, CRC(cb407a19) SHA1(d98421d6548e48b413f6dfcab4e240e98fcc9a69) ) |
| 934 | ROM_LOAD32_WORD( "dhg4078_cash_chameleon.u11", 0x000002, 0x80000, CRC(94d73843) SHA1(ab236750c67e7fff3af831f1d03f45c45f280fd1) ) |
| 935 | ROM_LOAD32_WORD( "dhg4078_cash_chameleon.u8", 0x100000, 0x80000, CRC(4cae8a5d) SHA1(3232461afd75ce71f8a2cb4ac7e9a3caeb8aabcd) ) |
| 936 | ROM_LOAD32_WORD( "dhg4078_cash_chameleon.u12", 0x100002, 0x80000, CRC(39e17f0b) SHA1(25a0364fa45e4e78d6c365b0739606e71597bd71) ) |
| 937 | |
| 938 | ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */ |
| 939 | |
| 940 | ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 ) |
| 941 | |
| 942 | ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 ) |
| 943 | ROM_END |
| 944 | |
| 891 | 945 | ROM_START( goldprmd ) |
| 892 | 946 | ARISTOCRAT_MK5_BIOS |
| 893 | 947 | ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) |
| r249940 | r249941 | |
|---|
| 903 | 957 | ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 ) |
| 904 | 958 | ROM_END |
| 905 | 959 | |
| 960 | // 569/8 - 10 Credit Multiplier / 9 Line Multiline. |
| 961 | // Wild Cougar - Export D - 19/05/97. |
| 962 | // All devices are 27c4002 instead of 27c4096. |
| 963 | ROM_START( wldcougr ) |
| 964 | ARISTOCRAT_MK5_BIOS |
| 965 | ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) |
| 966 | ROM_LOAD32_WORD( "wild_cougar_export.u7", 0x000000, 0x80000, CRC(7ada053f) SHA1(5102b0b9db505454624750a3fd6db455682538f3) ) |
| 967 | ROM_LOAD32_WORD( "wild_cougar_export.u11", 0x000002, 0x80000, CRC(69a78695) SHA1(1ed89cf38dc85f752449a858cd9558bed235af58) ) |
| 968 | ROM_LOAD32_WORD( "wild_cougar_export.u8", 0x100000, 0x80000, CRC(496b0295) SHA1(237183a192ad9b4bc133014cc83149d4a7062785) ) |
| 969 | ROM_LOAD32_WORD( "wild_cougar_export.u12", 0x100002, 0x80000, CRC(fe2bafdc) SHA1(e8b454db44a532d75b3aff323855340695688f0f) ) |
| 970 | |
| 971 | ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */ |
| 972 | |
| 973 | ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 ) |
| 974 | |
| 975 | ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 ) |
| 976 | ROM_END |
| 977 | |
| 978 | // 593 - 10 Credit Multiplier / 9 Line Multiline. |
| 979 | // Bumble Bugs - Export D - 05/07/97. |
| 980 | // All devices are 27c4002 instead of 27c4096. |
| 981 | // Marked as CHG029604 and 92.691% |
| 982 | ROM_START( bumblbug ) |
| 983 | ARISTOCRAT_MK5_BIOS |
| 984 | ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) |
| 985 | ROM_LOAD32_WORD( "bumble_bugs_export.u7", 0x000000, 0x80000, CRC(ec605a36) SHA1(114e0840cfbd0c64645a5a33065db85462a0ba2d) ) // 92.691% |
| 986 | ROM_LOAD32_WORD( "bumble_bugs_export.u11", 0x000002, 0x80000, CRC(17b154bd) SHA1(efdf307670a3d74f7980fec2d2197d837d4c26e2) ) // 92.691% |
| 987 | ROM_LOAD32_WORD( "bumble_bugs_export.u8", 0x100000, 0x80000, CRC(e0c01d01) SHA1(9153129fd348a97da7cccf002e5d03e4b4db9264) ) // base |
| 988 | ROM_LOAD32_WORD( "bumble_bugs_export.u12", 0x100002, 0x80000, CRC(28700d5d) SHA1(87a583cd487da6cb4c2da5f62297f0e577269fae) ) // base |
| 989 | |
| 990 | ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */ |
| 991 | |
| 992 | ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 ) |
| 993 | |
| 994 | ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 ) |
| 995 | ROM_END |
| 996 | |
| 906 | 997 | // 586/7(b) - 10 Credit Multiplier / 9 Line Multiline. |
| 907 | | // Penguin Pays - Export B - 14/07/97. |
| 998 | // Penguin Pays - Export B - 14/07/97. |
| 908 | 999 | // All devices are 27c4002 instead of 27c4096. |
| 909 | 1000 | ROM_START( pengpays ) |
| 910 | 1001 | ARISTOCRAT_MK5_BIOS |
| r249940 | r249941 | |
|---|
| 921 | 1012 | ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 ) |
| 922 | 1013 | ROM_END |
| 923 | 1014 | |
| 924 | | // MV4104 3,5,10,20,25,50 Credit Multiplier / 9-20 Line Multiline. |
| 1015 | // MV4098 - 10 Credit Multiplier / 9 Line Multiline. |
| 1016 | // BOOT SCOOTIN' - Export A - 25/08/99. |
| 1017 | // All devices are 27c4002 instead of 27c4096. |
| 1018 | // Marked as GHG1012 and 92.767% |
| 1019 | ROM_START( bootsctn ) |
| 1020 | ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) |
| 1021 | ROM_LOAD32_WORD( "ghg1012_boot_scootin.u7", 0x000000, 0x80000, CRC(ca26f31e) SHA1(e8da31cc8d12bf8a28f1ca4d796259ae9010f8af) ) // 92.767% |
| 1022 | ROM_LOAD32_WORD( "ghg1012_boot_scootin.u11", 0x000002, 0x80000, CRC(61da1767) SHA1(83d4df1060975f03f291b9119c0d2b8debb0fb60) ) // 92.767% |
| 1023 | ROM_LOAD32_WORD( "ghg1012_boot_scootin.u8", 0x100000, 0x80000, CRC(9ae4d616) SHA1(60d4d36f75685dfe21f914fa4682cd6a64fcfa58) ) // base |
| 1024 | ROM_LOAD32_WORD( "ghg1012_boot_scootin.u12", 0x100002, 0x80000, CRC(2c50c083) SHA1(ae3b01200d152df9b2966b5308c71e9d1ad43d78) ) // base |
| 1025 | ROM_LOAD32_WORD( "ghg1012_boot_scootin.u9", 0x200000, 0x80000, CRC(c0a4920d) SHA1(d2c6d259d2e067b6e5ad72a6ef164aac7d72bc5a) ) // base |
| 1026 | ROM_LOAD32_WORD( "ghg1012_boot_scootin.u13", 0x200002, 0x80000, CRC(55716d82) SHA1(5b9982a49201842e9551a9c763a6babbb47a863e) ) // base |
| 1027 | ROM_LOAD32_WORD( "ghg1012_boot_scootin.u10", 0x300000, 0x80000, CRC(3ecdf7ee) SHA1(9d658a22da737daafdf6cb0d49009796036d04b1) ) // base |
| 1028 | ROM_LOAD32_WORD( "ghg1012_boot_scootin.u14", 0x300002, 0x80000, CRC(18934c51) SHA1(f7c9c95c687dbfe89747e7877157fde37bc1119e) ) // base |
| 1029 | |
| 1030 | ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */ |
| 1031 | |
| 1032 | ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 ) |
| 1033 | |
| 1034 | ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 ) |
| 1035 | ROM_END |
| 1036 | |
| 1037 | // MV4104 3,5,10,20,25,50 Credit Multiplier / 9-20 Line Multiline. |
| 925 | 1038 | // CUCKOO - Export C - 02/02/00. |
| 926 | 1039 | // All devices are 27c4002 instead of 27c4096. |
| 927 | 1040 | ROM_START( cuckoo ) |
| 928 | 1041 | ARISTOCRAT_MK5_BIOS |
| 929 | 1042 | ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) |
| 930 | | ROM_LOAD32_WORD( "mv4104_cuckoo.u7", 0x000000, 0x80000, CRC(0bd17338) SHA1(b8f467bdf8d76533a2b7d44fe93be414f25a3c31) ) // |
| 1043 | ROM_LOAD32_WORD( "mv4104_cuckoo.u7", 0x000000, 0x80000, CRC(0bd17338) SHA1(b8f467bdf8d76533a2b7d44fe93be414f25a3c31) ) // |
| 931 | 1044 | ROM_LOAD32_WORD( "mv4104_cuckoo.u11", 0x000002, 0x80000, CRC(4c407deb) SHA1(57589e61a376ddff99cd420eb47bf8c902c6a249) ) |
| 932 | 1045 | ROM_LOAD32_WORD( "mv4104_cuckoo.u8", 0x100000, 0x80000, CRC(33f52052) SHA1(89cbfe588d91244adff4c520fa94962d69ff20bf) ) |
| 933 | 1046 | ROM_LOAD32_WORD( "mv4104_cuckoo.u12", 0x100002, 0x80000, CRC(00bb7597) SHA1(f4d6b21091e320a82d59477469340633b001ed0d) ) |
| r249940 | r249941 | |
|---|
| 940 | 1053 | ROM_END |
| 941 | 1054 | |
| 942 | 1055 | // MV4115 - 5,10,20 Credit Multiplier / 9 Line Multiline. |
| 943 | | // Magic Mask [Reel Game] - Export A - 09/05/2000. |
| 1056 | // Magic Mask [Reel Game] - Export A - 09/05/2000. |
| 944 | 1057 | ROM_START( magicmsk ) |
| 945 | 1058 | ARISTOCRAT_MK5_BIOS |
| 946 | 1059 | ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) |
| r249940 | r249941 | |
|---|
| 957 | 1070 | ROM_END |
| 958 | 1071 | |
| 959 | 1072 | // MV4115 - 5,10,20 Credit Multiplier / 9 Line Multiline. |
| 960 | | // Magic Mask [Reel Game] - Export A - 09/05/2000. |
| 1073 | // Magic Mask [Reel Game] - Export A - 09/05/2000. |
| 961 | 1074 | // Alternate set with identical description, but way different |
| 962 | 1075 | // than the parent. All devices are 27c4002 instead of 27c4096. |
| 963 | 1076 | // |
| r249940 | r249941 | |
|---|
| 982 | 1095 | ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 ) |
| 983 | 1096 | ROM_END |
| 984 | 1097 | |
| 1098 | // MV4124/1 - 5,10,25,50 Credit Multiplier / 20 Line Multiline. |
| 1099 | // Adonis [Reel Game] - Export B - 31/07/01. |
| 1100 | // Marked as BHG1284. |
| 1101 | ROM_START( adonise ) |
| 1102 | ARISTOCRAT_MK5_BIOS |
| 1103 | ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) |
| 1104 | ROM_LOAD32_WORD( "bhg1284_mv4124_adonis.u7", 0x000000, 0x80000, CRC(ed6254d7) SHA1(d2b790fdd7f5fc7b78fcfc4c96d0fc272ccf8da6) ) |
| 1105 | ROM_LOAD32_WORD( "bhg1284_mv4124_adonis.u11", 0x000002, 0x80000, CRC(1f629286) SHA1(bce380a6a76c77bc790436bd6f94474a1db0c231) ) |
| 1106 | ROM_LOAD32_WORD( "bhg1284_mv4124_adonis.u8", 0x100000, 0x80000, CRC(b756c96d) SHA1(494df20090d415e83d599023203c13273e7925ad) ) |
| 1107 | ROM_LOAD32_WORD( "bhg1284_mv4124_adonis.u12", 0x100002, 0x80000, CRC(1d3b6b8f) SHA1(1ddcfd7323cc7e79d3e39d913fdb5cf5cd53d56d) ) |
| 1108 | |
| 1109 | ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */ |
| 1110 | |
| 1111 | ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 ) |
| 1112 | |
| 1113 | ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 ) |
| 1114 | ROM_END |
| 1115 | |
| 985 | 1116 | // MV4115/6 - 9/20 Line Multiline Multiplier. |
| 986 | 1117 | // Party Gras [Reel Game] - Export A - 10/11/2001. |
| 987 | 1118 | // All devices are 27c4002 instead of 27c4096. |
| r249940 | r249941 | |
|---|
| 1015 | 1146 | GAME( 1996, dolphntr, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Dolphin Treasure (0200424V, NSW/ACT)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // 602/1, B - 06/12/96, Rev 3 |
| 1016 | 1147 | GAME( 1996, dolphtra, dolphntr, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Dolphin Treasure (0100424V, NSW/ACT)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // 602/1, B - 06/12/96, Rev 1.24.4.0 |
| 1017 | 1148 | GAME( 1996, dolphtre, aristmk5, aristmk5_usa, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Dolphin Treasure (Export)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // 602/1, B - 06/12/96 |
| 1149 | GAME( 1996, cashcham, aristmk5, aristmk5_usa, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Cash Chameleon (Export)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // 603(a), B - 06/12/96 |
| 1018 | 1150 | GAME( 1997, goldprmd, aristmk5, aristmk5_usa, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Golden Pyramids (MV4091, USA)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // MV4091, B - 13/05/97 |
| 1019 | 1151 | GAME( 1997, qotn, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Queen of the Nile (0200439V, NSW/ACT)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // 602/4, B - 13/05/97 |
| 1152 | GAME( 1997, qotna, aristmk5, aristmk5_usa, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Queen of the Nile (MV4091, NSW/ACT)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // MV4091, B - 13/05/97 (US-Export HW?) |
| 1153 | GAME( 1997, wldcougr, aristmk5, aristmk5_usa, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Wild Cougar (Export)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // 569/8, D - 19/05/97 |
| 1020 | 1154 | GAME( 1997, dmdtouch, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Diamond Touch (0400433V, Local)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // 604, E - 30/06/97 |
| 1155 | GAME( 1997, bumblbug, aristmk5, aristmk5_usa, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Bumble Bugs (Export, 92.691%)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // 593, D - 05/07/97 |
| 1021 | 1156 | GAME( 1997, pengpays, aristmk5, aristmk5_usa, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Penguin Pays (Export)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // 586/7(b) B - 14/07/97 |
| 1022 | 1157 | GAME( 1998, adonis, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Adonis (0200751V, NSW/ACT)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // 602/9, A - 25/05/98, Rev 10 |
| 1023 | 1158 | GAME( 1998, adonisa, adonis, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Adonis (0100751V, NSW/ACT)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // 602/9, A - 25/05/98, Rev 9 |
| 1024 | 1159 | GAME( 1998, reelrock, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Reelin-n-Rockin (0100779V, Local)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // 628, A - 13/07/98 |
| 1025 | 1160 | GAME( 1998, indiandr, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Indian Dreaming (0100845V, Local)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // 628/1, B - 15/12/98 |
| 1161 | GAME( 1998, chariotc, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "The Chariot Challenge (04J00714, NSW/ACT)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // 630, A - 10/08/98, Rev 12 |
| 1026 | 1162 | GAME( 1999, wtiger, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "White Tiger Classic (0200954V, NSW/ACT)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // 638/1, B - 08/07/99 |
| 1163 | GAME( 1999, bootsctn, aristmk5, aristmk5_usa, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Boot Scootin' (Export, 92.767%)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // MV4098, A - 25/08/99 |
| 1027 | 1164 | GAME( 2000, cuckoo, aristmk5, aristmk5_usa, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Cuckoo (MV4104, Export)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // MV4104, C - 02/02/00 |
| 1028 | 1165 | GAME( 2000, magicmsk, aristmk5, aristmk5_usa, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Magic Mask (MV4115, Export, set 1)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // MV4115, A - 09/05/00 |
| 1029 | 1166 | GAME( 2000, magicmska, magicmsk, aristmk5_usa, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Magic Mask (MV4115, Export, set 2)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // MV4115, A - 09/05/00 |
| 1030 | 1167 | GAME( 2000, margmgc, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Margarita Magic (01J00101, NSW/ACT)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // JB005, A - 07/07/00 |
| 1031 | 1168 | GAME( 2001, geishanz, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Geisha (0101408V, New Zealand)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // MV4127, A - 05/03/01 |
| 1169 | GAME( 2001, adonise, aristmk5, aristmk5_usa, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Adonis (MV4124/1, Export)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // MV4124/1, B - 31/07/01 |
| 1032 | 1170 | GAME( 2001, partygrs, aristmk5, aristmk5_usa, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Party Gras (MV4115/6, Export)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_SOUND ) // MV4115/6, A - 10/11/01 |
trunk/src/mame/drivers/bublbobl.c
| r249940 | r249941 | |
|---|
| 266 | 266 | accesses done by the CPU, including to the YM2203 I/O ports. At the |
| 267 | 267 | very least, there should be some filters. |
| 268 | 268 | |
| 269 | there are also Bubble Bobble bootlegs with a P8749H MCU, however the MCU |
| 270 | is protected against reading and the main code only differs by 1 byte from |
| 271 | Bubble Bobble. If the MCU were to be dumped that would also make for |
| 272 | interesting comparisons. |
| 273 | |
| 269 | 274 | ***************************************************************************/ |
| 270 | 275 | |
| 271 | 276 | #include "emu.h" |
| r249940 | r249941 | |
|---|
| 556 | 561 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 557 | 562 | INPUT_PORTS_END |
| 558 | 563 | |
| 564 | |
| 565 | static INPUT_PORTS_START( boblcave ) |
| 566 | PORT_INCLUDE( boblbobl ) |
| 567 | |
| 568 | PORT_MODIFY( "DSW1" ) // not monster speed on this, causes startup hangs just like original bublbobl |
| 569 | PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW-B:7") |
| 570 | PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) // must be off (see notes) |
| 571 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 572 | PORT_DIPNAME( 0x80, 0x80, "ROM Type" ) PORT_DIPLOCATION("DSW-B:8") |
| 573 | PORT_DIPSETTING( 0x80, "IC52=512kb, IC53=none" ) // will hang on startup if set to wrong type |
| 574 | PORT_DIPSETTING( 0x00, "IC52=256kb, IC53=256kb" ) |
| 575 | INPUT_PORTS_END |
| 576 | |
| 559 | 577 | static INPUT_PORTS_START( sboblboblb ) |
| 560 | 578 | PORT_INCLUDE( boblbobl ) |
| 561 | 579 | |
| r249940 | r249941 | |
|---|
| 1359 | 1377 | ROM_LOAD( "pal16l8.u4", 0x0400, 0x0104, CRC(077d20a8) SHA1(8e568ffd6f66c3dd61708dd0f3be9c2ed488ae4b) ) |
| 1360 | 1378 | ROM_END |
| 1361 | 1379 | |
| 1380 | ROM_START( bbredux ) |
| 1381 | ROM_REGION( 0x30000, "maincpu", 0 ) |
| 1382 | ROM_LOAD( "redux_bb3", 0x00000, 0x8000, CRC(d51de9f3) SHA1(dc6bc93692145563a88c146eeb1d0361e25af840) ) |
| 1383 | /* ROMs banked at 8000-bfff */ |
| 1384 | ROM_LOAD( "redux_bb5", 0x10000, 0x8000, CRC(d29d3444) SHA1(3db694a6ba2ba2ed85d31c2bc4c7c94911b99b85) ) |
| 1385 | ROM_LOAD( "redux_bb4", 0x18000, 0x8000, CRC(984149bd) SHA1(9a0f96eee038712277f652545a343587f711b9aa) ) |
| 1386 | |
| 1387 | ROM_REGION( 0x10000, "slave", 0 ) /* 64k for the second CPU */ |
| 1388 | ROM_LOAD( "a78-08.37", 0x0000, 0x08000, CRC(ae11a07b) SHA1(af7a335c8da637103103cc274e077f123908ebb7) ) |
| 1389 | |
| 1390 | ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the third CPU */ |
| 1391 | ROM_LOAD( "a78-07.46", 0x0000, 0x08000, CRC(4f9a26e8) SHA1(3105b34b88a7134493c2b3f584729f8b0407a011) ) |
| 1392 | |
| 1393 | ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT ) |
| 1394 | ROM_LOAD( "a78-09.12", 0x00000, 0x8000, CRC(20358c22) SHA1(2297af6c53d5807bf90a8e081075b8c72a994fc5) ) /* 1st plane */ |
| 1395 | ROM_LOAD( "a78-10.13", 0x08000, 0x8000, CRC(930168a9) SHA1(fd358c3c3b424bca285f67a1589eb98a345ff670) ) |
| 1396 | ROM_LOAD( "a78-11.14", 0x10000, 0x8000, CRC(9773e512) SHA1(33c1687ee575d66bf0e98add45d06da827813765) ) |
| 1397 | ROM_LOAD( "a78-12.15", 0x18000, 0x8000, CRC(d045549b) SHA1(0c12077d3ddc2ce6aa45a0224ad5540f3f218446) ) |
| 1398 | ROM_LOAD( "a78-13.16", 0x20000, 0x8000, CRC(d0af35c5) SHA1(c5a89f4d73acc0db86654540b3abfd77b3757db5) ) |
| 1399 | ROM_LOAD( "a78-14.17", 0x28000, 0x8000, CRC(7b5369a8) SHA1(1307b26d80e6f36ebe6c442bebec41d20066eaf9) ) |
| 1400 | /* 0x30000-0x3ffff empty */ |
| 1401 | ROM_LOAD( "a78-15.30", 0x40000, 0x8000, CRC(6b61a413) SHA1(44eddf12fb46fceca2addbe6da929aaea7636b13) ) /* 2nd plane */ |
| 1402 | ROM_LOAD( "a78-16.31", 0x48000, 0x8000, CRC(b5492d97) SHA1(d5b045e3ebaa44809757a4220cefb3c6815470da) ) |
| 1403 | ROM_LOAD( "a78-17.32", 0x50000, 0x8000, CRC(d69762d5) SHA1(3326fef4e0bd86681a3047dc11886bb171ecb609) ) |
| 1404 | ROM_LOAD( "a78-18.33", 0x58000, 0x8000, CRC(9f243b68) SHA1(32dce8d311a4be003693182a999e4053baa6bb0a) ) |
| 1405 | ROM_LOAD( "a78-19.34", 0x60000, 0x8000, CRC(66e9438c) SHA1(b94e62b6fbe7f4e08086d0365afc5cff6e0ccafd) ) |
| 1406 | ROM_LOAD( "a78-20.35", 0x68000, 0x8000, CRC(9ef863ad) SHA1(29f91b5a3765e4d6e6c3382db1d8d8297b6e56c8) ) |
| 1407 | /* 0x70000-0x7ffff empty */ |
| 1408 | |
| 1409 | ROM_REGION( 0x0100, "proms", 0 ) |
| 1410 | ROM_LOAD( "a71-25.41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing */ |
| 1411 | |
| 1412 | ROM_REGION( 0x0600, "plds", 0 ) |
| 1413 | ROM_LOAD( "pal16r4.u36", 0x0000, 0x0104, CRC(22fe26ac) SHA1(bbbfcbe6faded4af7ceec57b800297c054a997da) ) |
| 1414 | ROM_LOAD( "pal16l8.u38", 0x0200, 0x0104, CRC(c02d9663) SHA1(5d23cfd96f072981fd5fcf0dd7e98459da58b662) ) |
| 1415 | ROM_LOAD( "pal16l8.u4", 0x0400, 0x0104, CRC(077d20a8) SHA1(8e568ffd6f66c3dd61708dd0f3be9c2ed488ae4b) ) |
| 1416 | ROM_END |
| 1417 | |
| 1362 | 1418 | ROM_START( sboblbobl ) |
| 1363 | 1419 | ROM_REGION( 0x30000, "maincpu", 0 ) |
| 1364 | 1420 | ROM_LOAD( "cpu2-3.bin", 0x00000, 0x08000, CRC(2d9107b6) SHA1(ab1a4a20f4b533cd06cc458668f407a8a14c9d70) ) |
| r249940 | r249941 | |
|---|
| 1459 | 1515 | |
| 1460 | 1516 | |
| 1461 | 1517 | |
| 1518 | ROM_START( sboblboblc ) |
| 1519 | ROM_REGION( 0x30000, "maincpu", 0 ) |
| 1520 | ROM_LOAD( "3", 0x00000, 0x08000, CRC(f2d44846) SHA1(dd1a29f2ff1938c31d4c6199cf970483ceb52485) ) |
| 1521 | /* ROMs banked at 8000-bfff */ |
| 1522 | ROM_LOAD( "5", 0x10000, 0x08000, CRC(3c5e4441) SHA1(b85da9d7e0148e950b76036d3f9a3d4a9dfa039c) ) |
| 1523 | ROM_LOAD( "4", 0x18000, 0x08000, CRC(1f29b5c0) SHA1(c15c84ca11cc10edac6340468bca463ecb2d89e6) ) |
| 1524 | /* 20000-2ffff empty */ |
| 1525 | |
| 1526 | ROM_REGION( 0x10000, "slave", 0 ) /* 64k for the second CPU */ |
| 1527 | ROM_LOAD( "1", 0x0000, 0x08000, CRC(ae11a07b) SHA1(af7a335c8da637103103cc274e077f123908ebb7) ) |
| 1528 | |
| 1529 | ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the third CPU */ |
| 1530 | ROM_LOAD( "2", 0x0000, 0x08000, CRC(4f9a26e8) SHA1(3105b34b88a7134493c2b3f584729f8b0407a011) ) |
| 1531 | |
| 1532 | ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT ) |
| 1533 | ROM_LOAD( "12", 0x00000, 0x8000, CRC(20358c22) SHA1(2297af6c53d5807bf90a8e081075b8c72a994fc5) ) /* 1st plane */ |
| 1534 | ROM_LOAD( "13", 0x08000, 0x8000, CRC(930168a9) SHA1(fd358c3c3b424bca285f67a1589eb98a345ff670) ) |
| 1535 | ROM_LOAD( "14", 0x10000, 0x8000, CRC(9773e512) SHA1(33c1687ee575d66bf0e98add45d06da827813765) ) |
| 1536 | ROM_LOAD( "15", 0x18000, 0x8000, CRC(d045549b) SHA1(0c12077d3ddc2ce6aa45a0224ad5540f3f218446) ) |
| 1537 | ROM_LOAD( "16", 0x20000, 0x8000, CRC(d0af35c5) SHA1(c5a89f4d73acc0db86654540b3abfd77b3757db5) ) |
| 1538 | ROM_LOAD( "17", 0x28000, 0x8000, CRC(7b5369a8) SHA1(1307b26d80e6f36ebe6c442bebec41d20066eaf9) ) |
| 1539 | /* 0x30000-0x3ffff empty */ |
| 1540 | ROM_LOAD( "6", 0x40000, 0x8000, CRC(6b61a413) SHA1(44eddf12fb46fceca2addbe6da929aaea7636b13) ) /* 2nd plane */ |
| 1541 | ROM_LOAD( "7", 0x48000, 0x8000, CRC(b5492d97) SHA1(d5b045e3ebaa44809757a4220cefb3c6815470da) ) |
| 1542 | ROM_LOAD( "8", 0x50000, 0x8000, CRC(d69762d5) SHA1(3326fef4e0bd86681a3047dc11886bb171ecb609) ) |
| 1543 | ROM_LOAD( "9", 0x58000, 0x8000, CRC(9f243b68) SHA1(32dce8d311a4be003693182a999e4053baa6bb0a) ) |
| 1544 | ROM_LOAD( "10", 0x60000, 0x8000, CRC(66e9438c) SHA1(b94e62b6fbe7f4e08086d0365afc5cff6e0ccafd) ) |
| 1545 | ROM_LOAD( "11", 0x68000, 0x8000, CRC(9ef863ad) SHA1(29f91b5a3765e4d6e6c3382db1d8d8297b6e56c8) ) |
| 1546 | /* 0x70000-0x7ffff empty */ |
| 1547 | |
| 1548 | ROM_REGION( 0x0100, "proms", 0 ) |
| 1549 | ROM_LOAD( "a71-25.41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing */ |
| 1550 | |
| 1551 | ROM_END |
| 1552 | |
| 1462 | 1553 | ROM_START( bub68705 ) |
| 1463 | 1554 | ROM_REGION( 0x30000, "maincpu", 0 ) /* Program roms match Bubble Bobble (older) */ |
| 1464 | 1555 | ROM_LOAD( "2.bin", 0x00000, 0x08000, CRC(32c8305b) SHA1(6bf69b3edfbefd33cd670a762b4bf0b39629a220) ) |
| r249940 | r249941 | |
|---|
| 1526 | 1617 | ROM_END |
| 1527 | 1618 | |
| 1528 | 1619 | |
| 1620 | ROM_START( bublcave ) |
| 1621 | ROM_REGION( 0x30000, "maincpu", 0 ) |
| 1622 | ROM_LOAD( "bublcave-06.51", 0x00000, 0x08000, CRC(e8b9af5e) SHA1(dec44e47634a402df212806e84e3a810f8442776) ) |
| 1623 | ROM_LOAD( "bublcave-05.52", 0x10000, 0x10000, CRC(cfe14cb8) SHA1(17d463c755f630ae9d05943515fa4828972bd7b0) ) |
| 1529 | 1624 | |
| 1625 | ROM_REGION( 0x10000, "slave", 0 ) |
| 1626 | ROM_LOAD( "bublcave-08.37", 0x0000, 0x08000, CRC(a9384086) SHA1(26e686671d6d3ba3759716bf46e7f951bbb8a291) ) |
| 1627 | |
| 1628 | ROM_REGION( 0x10000, "audiocpu", 0 ) |
| 1629 | ROM_LOAD( "a78-07.46", 0x0000, 0x08000, CRC(4f9a26e8) SHA1(3105b34b88a7134493c2b3f584729f8b0407a011) ) |
| 1630 | |
| 1631 | ROM_REGION( 0x10000, "mcu", 0 ) |
| 1632 | ROM_LOAD( "a78-01.17", 0xf000, 0x1000, CRC(b1bfb53d) SHA1(31b8f31acd3aa394acd80db362774749842e1285) ) |
| 1633 | |
| 1634 | ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT ) |
| 1635 | ROM_LOAD( "bublcave-09.12", 0x00000, 0x8000, CRC(b90b7eef) SHA1(de72e4635843ad76248aa3b4aa8f8a0bfd53879e) ) /* 1st plane */ |
| 1636 | ROM_LOAD( "bublcave-10.13", 0x08000, 0x8000, CRC(4fb22f05) SHA1(880104e86dbd00ae657cbc768722427503b6a59f) ) |
| 1637 | ROM_LOAD( "bublcave-11.14", 0x10000, 0x8000, CRC(9773e512) SHA1(33c1687ee575d66bf0e98add45d06da827813765) ) |
| 1638 | ROM_LOAD( "bublcave-12.15", 0x18000, 0x8000, CRC(e49eb49e) SHA1(2e05dc8833e10bef1a317d238c39fb9f362e9997) ) |
| 1639 | ROM_LOAD( "bublcave-13.16", 0x20000, 0x8000, CRC(61919734) SHA1(2c07e29f3dcc972d5eb47679ad81a0d7656b0cb2) ) |
| 1640 | ROM_LOAD( "bublcave-14.17", 0x28000, 0x8000, CRC(7e3a13bd) SHA1(bd4dba799340fa599f11cc68e03efe70ba6ba99b) ) |
| 1641 | ROM_LOAD( "bublcave-15.30", 0x40000, 0x8000, CRC(c253c73a) SHA1(3e187f6b9ca769772990068abe7b309417147d39) ) /* 2nd plane */ |
| 1642 | ROM_LOAD( "bublcave-16.31", 0x48000, 0x8000, CRC(e66c92ee) SHA1(12ea193c54121d08ad110c94cc075e29fef3ff85) ) |
| 1643 | ROM_LOAD( "bublcave-17.32", 0x50000, 0x8000, CRC(d69762d5) SHA1(3326fef4e0bd86681a3047dc11886bb171ecb609) ) |
| 1644 | ROM_LOAD( "bublcave-18.33", 0x58000, 0x8000, CRC(47ee2544) SHA1(c6946e824043a312ed437e548a64ef599effbd42) ) |
| 1645 | ROM_LOAD( "bublcave-19.34", 0x60000, 0x8000, CRC(1ceeb1fa) SHA1(eb29ff896d149f7ab4cf38a338df39df14ccc20c) ) |
| 1646 | ROM_LOAD( "bublcave-20.35", 0x68000, 0x8000, CRC(64322e24) SHA1(acff8a9fcaf74f198653080759898d15cccf04e8) ) |
| 1647 | |
| 1648 | ROM_REGION( 0x0100, "proms", 0 ) |
| 1649 | ROM_LOAD( "a71-25.41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing */ |
| 1650 | ROM_END |
| 1651 | |
| 1652 | |
| 1653 | ROM_START( boblcave ) |
| 1654 | ROM_REGION( 0x30000, "maincpu", 0 ) |
| 1655 | ROM_LOAD( "lc12_bb3", 0x00000, 0x08000, CRC(dddc9a24) SHA1(c0b31dd64d7359ae0ea5067db6ac8b54f9415e5a) ) |
| 1656 | /* ROMs banked at 8000-bfff */ |
| 1657 | ROM_LOAD( "lc12_bb5", 0x10000, 0x08000, CRC(0bc4de52) SHA1(55581a557dfd60d93642b89eb702c7170458b826) ) |
| 1658 | ROM_LOAD( "lc12_bb4", 0x18000, 0x08000, CRC(bd7afdf4) SHA1(a9bcdc857b1f252c36a5a70f5027a11737f8dd59) ) |
| 1659 | /* 20000-2ffff empty */ |
| 1660 | |
| 1661 | ROM_REGION( 0x10000, "slave", 0 ) /* 64k for the second CPU */ |
| 1662 | ROM_LOAD( "bublcave-08.37", 0x0000, 0x08000, CRC(a9384086) SHA1(26e686671d6d3ba3759716bf46e7f951bbb8a291) ) |
| 1663 | |
| 1664 | ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the third CPU */ |
| 1665 | ROM_LOAD( "a78-07.46", 0x0000, 0x08000, CRC(4f9a26e8) SHA1(3105b34b88a7134493c2b3f584729f8b0407a011) ) |
| 1666 | |
| 1667 | ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT ) |
| 1668 | ROM_LOAD( "bublcave-09.12", 0x00000, 0x8000, CRC(b90b7eef) SHA1(de72e4635843ad76248aa3b4aa8f8a0bfd53879e) ) /* 1st plane */ |
| 1669 | ROM_LOAD( "bublcave-10.13", 0x08000, 0x8000, CRC(4fb22f05) SHA1(880104e86dbd00ae657cbc768722427503b6a59f) ) |
| 1670 | ROM_LOAD( "bublcave-11.14", 0x10000, 0x8000, CRC(9773e512) SHA1(33c1687ee575d66bf0e98add45d06da827813765) ) |
| 1671 | ROM_LOAD( "bublcave-12.15", 0x18000, 0x8000, CRC(e49eb49e) SHA1(2e05dc8833e10bef1a317d238c39fb9f362e9997) ) |
| 1672 | ROM_LOAD( "bublcave-13.16", 0x20000, 0x8000, CRC(61919734) SHA1(2c07e29f3dcc972d5eb47679ad81a0d7656b0cb2) ) |
| 1673 | ROM_LOAD( "bublcave-14.17", 0x28000, 0x8000, CRC(7e3a13bd) SHA1(bd4dba799340fa599f11cc68e03efe70ba6ba99b) ) |
| 1674 | ROM_LOAD( "bublcave-15.30", 0x40000, 0x8000, CRC(c253c73a) SHA1(3e187f6b9ca769772990068abe7b309417147d39) ) /* 2nd plane */ |
| 1675 | ROM_LOAD( "bublcave-16.31", 0x48000, 0x8000, CRC(e66c92ee) SHA1(12ea193c54121d08ad110c94cc075e29fef3ff85) ) |
| 1676 | ROM_LOAD( "bublcave-17.32", 0x50000, 0x8000, CRC(d69762d5) SHA1(3326fef4e0bd86681a3047dc11886bb171ecb609) ) |
| 1677 | ROM_LOAD( "bublcave-18.33", 0x58000, 0x8000, CRC(47ee2544) SHA1(c6946e824043a312ed437e548a64ef599effbd42) ) |
| 1678 | ROM_LOAD( "bublcave-19.34", 0x60000, 0x8000, CRC(1ceeb1fa) SHA1(eb29ff896d149f7ab4cf38a338df39df14ccc20c) ) |
| 1679 | ROM_LOAD( "bublcave-20.35", 0x68000, 0x8000, CRC(64322e24) SHA1(acff8a9fcaf74f198653080759898d15cccf04e8) ) |
| 1680 | |
| 1681 | ROM_REGION( 0x0100, "proms", 0 ) |
| 1682 | ROM_LOAD( "a71-25.41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing */ |
| 1683 | |
| 1684 | ROM_REGION( 0x0600, "plds", 0 ) |
| 1685 | ROM_LOAD( "pal16r4.u36", 0x0000, 0x0104, CRC(22fe26ac) SHA1(bbbfcbe6faded4af7ceec57b800297c054a997da) ) |
| 1686 | ROM_LOAD( "pal16l8.u38", 0x0200, 0x0104, CRC(c02d9663) SHA1(5d23cfd96f072981fd5fcf0dd7e98459da58b662) ) |
| 1687 | ROM_LOAD( "pal16l8.u4", 0x0400, 0x0104, CRC(077d20a8) SHA1(8e568ffd6f66c3dd61708dd0f3be9c2ed488ae4b) ) |
| 1688 | ROM_END |
| 1689 | |
| 1690 | |
| 1691 | ROM_START( bublcave11 ) |
| 1692 | ROM_REGION( 0x30000, "maincpu", 0 ) |
| 1693 | ROM_LOAD( "bublcave10-06.51", 0x00000, 0x08000, CRC(185cc219) SHA1(dfb312f144fb01c07581cb8ea55ab0dc92ccd5b2) ) |
| 1694 | ROM_LOAD( "bublcave11-05.52", 0x10000, 0x10000, CRC(b6b02df3) SHA1(542589544216a54f84c213b161d7145934875d2b) ) |
| 1695 | |
| 1696 | ROM_REGION( 0x10000, "slave", 0 ) |
| 1697 | ROM_LOAD( "bublcave11-08.37", 0x0000, 0x08000, CRC(c5d14e62) SHA1(b32b1ca76b54755a69a7a346d01545f2699e1363) ) |
| 1698 | |
| 1699 | ROM_REGION( 0x10000, "audiocpu", 0 ) |
| 1700 | ROM_LOAD( "a78-07.46", 0x0000, 0x08000, CRC(4f9a26e8) SHA1(3105b34b88a7134493c2b3f584729f8b0407a011) ) |
| 1701 | |
| 1702 | ROM_REGION( 0x10000, "mcu", 0 ) |
| 1703 | ROM_LOAD( "a78-01.17", 0xf000, 0x1000, CRC(b1bfb53d) SHA1(31b8f31acd3aa394acd80db362774749842e1285) ) |
| 1704 | |
| 1705 | ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT ) |
| 1706 | ROM_LOAD( "bublcave-09.12", 0x00000, 0x8000, CRC(b90b7eef) SHA1(de72e4635843ad76248aa3b4aa8f8a0bfd53879e) ) /* 1st plane */ |
| 1707 | ROM_LOAD( "bublcave-10.13", 0x08000, 0x8000, CRC(4fb22f05) SHA1(880104e86dbd00ae657cbc768722427503b6a59f) ) |
| 1708 | ROM_LOAD( "bublcave-11.14", 0x10000, 0x8000, CRC(9773e512) SHA1(33c1687ee575d66bf0e98add45d06da827813765) ) |
| 1709 | ROM_LOAD( "bublcave-12.15", 0x18000, 0x8000, CRC(e49eb49e) SHA1(2e05dc8833e10bef1a317d238c39fb9f362e9997) ) |
| 1710 | ROM_LOAD( "bublcave-13.16", 0x20000, 0x8000, CRC(61919734) SHA1(2c07e29f3dcc972d5eb47679ad81a0d7656b0cb2) ) |
| 1711 | ROM_LOAD( "bublcave-14.17", 0x28000, 0x8000, CRC(7e3a13bd) SHA1(bd4dba799340fa599f11cc68e03efe70ba6ba99b) ) |
| 1712 | ROM_LOAD( "bublcave-15.30", 0x40000, 0x8000, CRC(c253c73a) SHA1(3e187f6b9ca769772990068abe7b309417147d39) ) /* 2nd plane */ |
| 1713 | ROM_LOAD( "bublcave-16.31", 0x48000, 0x8000, CRC(e66c92ee) SHA1(12ea193c54121d08ad110c94cc075e29fef3ff85) ) |
| 1714 | ROM_LOAD( "bublcave-17.32", 0x50000, 0x8000, CRC(d69762d5) SHA1(3326fef4e0bd86681a3047dc11886bb171ecb609) ) |
| 1715 | ROM_LOAD( "bublcave-18.33", 0x58000, 0x8000, CRC(47ee2544) SHA1(c6946e824043a312ed437e548a64ef599effbd42) ) |
| 1716 | ROM_LOAD( "bublcave-19.34", 0x60000, 0x8000, CRC(1ceeb1fa) SHA1(eb29ff896d149f7ab4cf38a338df39df14ccc20c) ) |
| 1717 | ROM_LOAD( "bublcave-20.35", 0x68000, 0x8000, CRC(64322e24) SHA1(acff8a9fcaf74f198653080759898d15cccf04e8) ) |
| 1718 | |
| 1719 | ROM_REGION( 0x0100, "proms", 0 ) |
| 1720 | ROM_LOAD( "a71-25.41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing */ |
| 1721 | ROM_END |
| 1722 | |
| 1723 | ROM_START( bublcave10 ) |
| 1724 | ROM_REGION( 0x30000, "maincpu", 0 ) |
| 1725 | ROM_LOAD( "bublcave10-06.51", 0x00000, 0x08000, CRC(185cc219) SHA1(dfb312f144fb01c07581cb8ea55ab0dc92ccd5b2) ) |
| 1726 | ROM_LOAD( "bublcave10-05.52", 0x10000, 0x10000, CRC(381cdde7) SHA1(0c9de44d7dbad754e873af8ddb5a2736f5ec2096) ) |
| 1727 | |
| 1728 | ROM_REGION( 0x10000, "slave", 0 ) |
| 1729 | ROM_LOAD( "bublcave10-08.37", 0x0000, 0x08000, CRC(026a68e1) SHA1(9e54310a9f1f5187ea6eb49d9189865b44708a7e) ) |
| 1730 | |
| 1731 | ROM_REGION( 0x10000, "audiocpu", 0 ) |
| 1732 | ROM_LOAD( "a78-07.46", 0x0000, 0x08000, CRC(4f9a26e8) SHA1(3105b34b88a7134493c2b3f584729f8b0407a011) ) |
| 1733 | |
| 1734 | ROM_REGION( 0x10000, "mcu", 0 ) |
| 1735 | ROM_LOAD( "a78-01.17", 0xf000, 0x1000, CRC(b1bfb53d) SHA1(31b8f31acd3aa394acd80db362774749842e1285) ) |
| 1736 | |
| 1737 | ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT ) |
| 1738 | ROM_LOAD( "bublcave-09.12", 0x00000, 0x8000, CRC(b90b7eef) SHA1(de72e4635843ad76248aa3b4aa8f8a0bfd53879e) ) /* 1st plane */ |
| 1739 | ROM_LOAD( "bublcave-10.13", 0x08000, 0x8000, CRC(4fb22f05) SHA1(880104e86dbd00ae657cbc768722427503b6a59f) ) |
| 1740 | ROM_LOAD( "bublcave-11.14", 0x10000, 0x8000, CRC(9773e512) SHA1(33c1687ee575d66bf0e98add45d06da827813765) ) |
| 1741 | ROM_LOAD( "bublcave-12.15", 0x18000, 0x8000, CRC(e49eb49e) SHA1(2e05dc8833e10bef1a317d238c39fb9f362e9997) ) |
| 1742 | ROM_LOAD( "bublcave-13.16", 0x20000, 0x8000, CRC(61919734) SHA1(2c07e29f3dcc972d5eb47679ad81a0d7656b0cb2) ) |
| 1743 | ROM_LOAD( "bublcave-14.17", 0x28000, 0x8000, CRC(7e3a13bd) SHA1(bd4dba799340fa599f11cc68e03efe70ba6ba99b) ) |
| 1744 | ROM_LOAD( "bublcave-15.30", 0x40000, 0x8000, CRC(c253c73a) SHA1(3e187f6b9ca769772990068abe7b309417147d39) ) /* 2nd plane */ |
| 1745 | ROM_LOAD( "bublcave-16.31", 0x48000, 0x8000, CRC(e66c92ee) SHA1(12ea193c54121d08ad110c94cc075e29fef3ff85) ) |
| 1746 | ROM_LOAD( "bublcave-17.32", 0x50000, 0x8000, CRC(d69762d5) SHA1(3326fef4e0bd86681a3047dc11886bb171ecb609) ) |
| 1747 | ROM_LOAD( "bublcave-18.33", 0x58000, 0x8000, CRC(47ee2544) SHA1(c6946e824043a312ed437e548a64ef599effbd42) ) |
| 1748 | ROM_LOAD( "bublcave-19.34", 0x60000, 0x8000, CRC(1ceeb1fa) SHA1(eb29ff896d149f7ab4cf38a338df39df14ccc20c) ) |
| 1749 | ROM_LOAD( "bublcave-20.35", 0x68000, 0x8000, CRC(64322e24) SHA1(acff8a9fcaf74f198653080759898d15cccf04e8) ) |
| 1750 | |
| 1751 | ROM_REGION( 0x0100, "proms", 0 ) |
| 1752 | ROM_LOAD( "a71-25.41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing */ |
| 1753 | ROM_END |
| 1754 | |
| 1755 | ROM_START( bublboblb ) |
| 1756 | ROM_REGION( 0x30000, "maincpu", 0 ) |
| 1757 | ROM_LOAD( "bbaladar.3", 0x00000, 0x8000, CRC(31bfc6fb) SHA1(6a72086d415a69b9e5c003ec6cf7858e8c4b346f) ) |
| 1758 | /* ROMs banked at 8000-bfff */ |
| 1759 | ROM_LOAD( "bbaladar.5", 0x10000, 0x8000, CRC(16386e9a) SHA1(77fa3f5ecce5c79ba52098c0870482459926b415) ) |
| 1760 | ROM_LOAD( "bbaladar.4", 0x18000, 0x8000, CRC(0c4bcb07) SHA1(3e3f7fa098d6be61d265cab5258dbd0e279bd8ed) ) |
| 1761 | |
| 1762 | ROM_REGION( 0x10000, "slave", 0 ) /* 64k for the second CPU */ |
| 1763 | ROM_LOAD( "a78-08.37", 0x0000, 0x08000, CRC(ae11a07b) SHA1(af7a335c8da637103103cc274e077f123908ebb7) ) |
| 1764 | |
| 1765 | ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the third CPU */ |
| 1766 | ROM_LOAD( "a78-07.46", 0x0000, 0x08000, CRC(4f9a26e8) SHA1(3105b34b88a7134493c2b3f584729f8b0407a011) ) |
| 1767 | |
| 1768 | ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT ) |
| 1769 | ROM_LOAD( "a78-09.12", 0x00000, 0x8000, CRC(20358c22) SHA1(2297af6c53d5807bf90a8e081075b8c72a994fc5) ) /* 1st plane */ |
| 1770 | ROM_LOAD( "a78-10.13", 0x08000, 0x8000, CRC(930168a9) SHA1(fd358c3c3b424bca285f67a1589eb98a345ff670) ) |
| 1771 | ROM_LOAD( "a78-11.14", 0x10000, 0x8000, CRC(9773e512) SHA1(33c1687ee575d66bf0e98add45d06da827813765) ) |
| 1772 | ROM_LOAD( "a78-12.15", 0x18000, 0x8000, CRC(d045549b) SHA1(0c12077d3ddc2ce6aa45a0224ad5540f3f218446) ) |
| 1773 | ROM_LOAD( "a78-13.16", 0x20000, 0x8000, CRC(d0af35c5) SHA1(c5a89f4d73acc0db86654540b3abfd77b3757db5) ) |
| 1774 | ROM_LOAD( "a78-14.17", 0x28000, 0x8000, CRC(7b5369a8) SHA1(1307b26d80e6f36ebe6c442bebec41d20066eaf9) ) |
| 1775 | /* 0x30000-0x3ffff empty */ |
| 1776 | ROM_LOAD( "a78-15.30", 0x40000, 0x8000, CRC(6b61a413) SHA1(44eddf12fb46fceca2addbe6da929aaea7636b13) ) /* 2nd plane */ |
| 1777 | ROM_LOAD( "a78-16.31", 0x48000, 0x8000, CRC(b5492d97) SHA1(d5b045e3ebaa44809757a4220cefb3c6815470da) ) |
| 1778 | ROM_LOAD( "a78-17.32", 0x50000, 0x8000, CRC(d69762d5) SHA1(3326fef4e0bd86681a3047dc11886bb171ecb609) ) |
| 1779 | ROM_LOAD( "a78-18.33", 0x58000, 0x8000, CRC(9f243b68) SHA1(32dce8d311a4be003693182a999e4053baa6bb0a) ) |
| 1780 | ROM_LOAD( "a78-19.34", 0x60000, 0x8000, CRC(66e9438c) SHA1(b94e62b6fbe7f4e08086d0365afc5cff6e0ccafd) ) |
| 1781 | ROM_LOAD( "a78-20.35", 0x68000, 0x8000, CRC(9ef863ad) SHA1(29f91b5a3765e4d6e6c3382db1d8d8297b6e56c8) ) |
| 1782 | /* 0x70000-0x7ffff empty */ |
| 1783 | |
| 1784 | ROM_REGION( 0x0100, "proms", 0 ) |
| 1785 | ROM_LOAD( "a71-25.41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing */ |
| 1786 | |
| 1787 | ROM_REGION( 0x0600, "plds", 0 ) |
| 1788 | ROM_LOAD( "pal16r4.u36", 0x0000, 0x0104, CRC(22fe26ac) SHA1(bbbfcbe6faded4af7ceec57b800297c054a997da) ) |
| 1789 | ROM_LOAD( "pal16l8.u38", 0x0200, 0x0104, CRC(c02d9663) SHA1(5d23cfd96f072981fd5fcf0dd7e98459da58b662) ) |
| 1790 | ROM_LOAD( "pal16l8.u4", 0x0400, 0x0104, CRC(077d20a8) SHA1(8e568ffd6f66c3dd61708dd0f3be9c2ed488ae4b) ) |
| 1791 | ROM_END |
| 1792 | |
| 1530 | 1793 | /************************************* |
| 1531 | 1794 | * |
| 1532 | 1795 | * Driver initialization |
| r249940 | r249941 | |
|---|
| 1598 | 1861 | GAME( 1986, sboblbobl, bublbobl, boblbobl, sboblbobl, bublbobl_state, bublbobl, ROT0, "bootleg (Datsu)", "Super Bobble Bobble (bootleg, set 1)", MACHINE_SUPPORTS_SAVE ) |
| 1599 | 1862 | GAME( 1986, sboblbobla, bublbobl, boblbobl, boblbobl, bublbobl_state, bublbobl, ROT0, "bootleg", "Super Bobble Bobble (bootleg, set 2)", MACHINE_SUPPORTS_SAVE ) |
| 1600 | 1863 | GAME( 1986, sboblboblb, bublbobl, boblbobl, sboblboblb, bublbobl_state, bublbobl, ROT0, "bootleg", "Super Bobble Bobble (bootleg, set 3)", MACHINE_SUPPORTS_SAVE ) |
| 1864 | GAME( 1986, sboblboblc, bublbobl, boblbobl, sboblboblb, bublbobl_state, bublbobl, ROT0, "bootleg", "Super Bubble Bobble (bootleg)", MACHINE_SUPPORTS_SAVE ) // the title screen on this one isn't hacked |
| 1601 | 1865 | GAME( 1986, bub68705, bublbobl, bub68705, bublbobl, bublbobl_state, bublbobl, ROT0, "bootleg", "Bubble Bobble (bootleg with 68705)", MACHINE_SUPPORTS_SAVE ) |
| 1602 | 1866 | |
| 1603 | 1867 | GAME( 1987, dland, bublbobl, boblbobl, dland, bublbobl_state, dland, ROT0, "bootleg", "Dream Land / Super Dream Land (bootleg of Bubble Bobble)", MACHINE_SUPPORTS_SAVE ) |
| 1868 | |
| 1869 | GAME( 2013, bbredux, bublbobl, boblbobl, boblbobl, bublbobl_state, bublbobl, ROT0, "bootleg (Punji)", "Bubble Bobble ('bootleg redux' hack for Bobble Bobble PCB)", MACHINE_SUPPORTS_SAVE ) // for use on non-MCU bootleg boards (Bobble Bobble etc.) has more faithful simulation of the protection device (JAN-04-2015 release) |
| 1870 | GAME( 2013, bublboblb, bublbobl, boblbobl, boblcave, bublbobl_state, bublbobl, ROT0, "bootleg (Aladar)", "Bubble Bobble (for Bobble Bobble PCB)", MACHINE_SUPPORTS_SAVE ) // alt bootleg/hack to restore proper MCU behavior to bootleg boards |
| 1871 | |
| 1872 | GAME( 2013, bublcave, bublbobl, bublbobl, bublbobl, bublbobl_state, bublbobl, ROT0, "hack (Bisboch and Aladar)", "Bubble Bobble: Lost Cave V1.2", MACHINE_SUPPORTS_SAVE ) |
| 1873 | GAME( 2013, boblcave, bublbobl, boblbobl, boblcave, bublbobl_state, bublbobl, ROT0, "hack (Bisboch and Aladar)", "Bubble Bobble: Lost Cave V1.2 (for Bobble Bobble PCB)", MACHINE_SUPPORTS_SAVE ) |
| 1874 | |
| 1875 | GAME( 2012, bublcave11, bublbobl, bublbobl, bublbobl, bublbobl_state, bublbobl, ROT0, "hack (Bisboch and Aladar)", "Bubble Bobble: Lost Cave V1.1", MACHINE_SUPPORTS_SAVE ) |
| 1876 | GAME( 2012, bublcave10, bublbobl, bublbobl, bublbobl, bublbobl_state, bublbobl, ROT0, "hack (Bisboch and Aladar)", "Bubble Bobble: Lost Cave V1.0", MACHINE_SUPPORTS_SAVE ) |
trunk/src/mame/drivers/by17.c
| r249940 | r249941 | |
|---|
| 91 | 91 | UINT8 m_segment[6]; |
| 92 | 92 | UINT8 m_lamp_decode; |
| 93 | 93 | UINT8 m_solenoid_features[20][4]; |
| 94 | | UINT8 m_io_hold_x[5]; // Used to hold switches closed (drop targets, balls in outholes/saucers etc). Solenoid activity release them. |
| 94 | UINT8 m_io_hold_x[5]; // Used to hold switches closed (drop targets, balls in outholes/saucers etc). Solenoid activity release them. |
| 95 | 95 | required_device<m6800_cpu_device> m_maincpu; |
| 96 | 96 | required_shared_ptr<UINT8> m_nvram; |
| 97 | 97 | required_device<pia6821_device> m_pia_u10; |
| r249940 | r249941 | |
|---|
| 125 | 125 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE2 ) PORT_NAME("Activity") PORT_CHANGED_MEMBER(DEVICE_SELF, by17_state, activity_button, NULL) |
| 126 | 126 | |
| 127 | 127 | PORT_START("DSW0") |
| 128 | | PORT_DIPNAME( 0x1f, 0x02, "Coin Slot 1") PORT_DIPLOCATION("SW0:!1,!2,!3,!4,!5") // same as 03 |
| 128 | PORT_DIPNAME( 0x1f, 0x02, "Coin Slot 1") PORT_DIPLOCATION("SW0:!1,!2,!3,!4,!5") // same as 03 |
| 129 | 129 | PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C )) |
| 130 | 130 | PORT_DIPSETTING( 0x02, DEF_STR( 1C_1C )) |
| 131 | 131 | PORT_DIPSETTING( 0x03, DEF_STR( 2C_1C )) |
| r249940 | r249941 | |
|---|
| 157 | 157 | PORT_DIPSETTING( 0x1d, "2 Coins/14 Credits") |
| 158 | 158 | PORT_DIPSETTING( 0x1e, "1 Coin/15 Credits") |
| 159 | 159 | PORT_DIPSETTING( 0x1f, "2 Coins/15 Credits") |
| 160 | | PORT_DIPNAME( 0x20, 0x20, "Score Level Award") PORT_DIPLOCATION("SW0:!6") |
| 160 | PORT_DIPNAME( 0x20, 0x20, "Score Level Award") PORT_DIPLOCATION("SW0:!6") |
| 161 | 161 | PORT_DIPSETTING( 0x00, "Extra Ball") |
| 162 | 162 | PORT_DIPSETTING( 0x20, "Replay") |
| 163 | | PORT_DIPNAME( 0x40, 0x00, "S07") PORT_DIPLOCATION("SW0:!7") |
| 163 | PORT_DIPNAME( 0x40, 0x00, "S07") PORT_DIPLOCATION("SW0:!7") |
| 164 | 164 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 165 | 165 | PORT_DIPSETTING( 0x40, DEF_STR( On )) |
| 166 | | PORT_DIPNAME( 0x80, 0x80, "Play Melodies") PORT_DIPLOCATION("SW0:!8") |
| 166 | PORT_DIPNAME( 0x80, 0x80, "Play Melodies") PORT_DIPLOCATION("SW0:!8") |
| 167 | 167 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 168 | 168 | PORT_DIPSETTING( 0x80, DEF_STR( On )) |
| 169 | 169 | |
| 170 | 170 | PORT_START("DSW1") |
| 171 | | PORT_DIPNAME( 0x1f, 0x02, "Coin Slot 3") PORT_DIPLOCATION("SW1:!1,!2,!3,!4,!5") // same as 01 |
| 171 | PORT_DIPNAME( 0x1f, 0x02, "Coin Slot 3") PORT_DIPLOCATION("SW1:!1,!2,!3,!4,!5") // same as 01 |
| 172 | 172 | PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C )) |
| 173 | 173 | PORT_DIPSETTING( 0x02, DEF_STR( 1C_1C )) |
| 174 | 174 | PORT_DIPSETTING( 0x03, DEF_STR( 2C_1C )) |
| r249940 | r249941 | |
|---|
| 200 | 200 | PORT_DIPSETTING( 0x1d, "2 Coins/14 Credits") |
| 201 | 201 | PORT_DIPSETTING( 0x1e, "1 Coin/15 Credits") |
| 202 | 202 | PORT_DIPSETTING( 0x1f, "2 Coins/15 Credits") |
| 203 | | PORT_DIPNAME( 0x20, 0x00, "S14") PORT_DIPLOCATION("SW1:!6") |
| 203 | PORT_DIPNAME( 0x20, 0x00, "S14") PORT_DIPLOCATION("SW1:!6") |
| 204 | 204 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 205 | 205 | PORT_DIPSETTING( 0x20, DEF_STR( On )) |
| 206 | | PORT_DIPNAME( 0x40, 0x40, "Award for Beating Highest Score") PORT_DIPLOCATION("SW1:!7") |
| 206 | PORT_DIPNAME( 0x40, 0x40, "Award for Beating Highest Score") PORT_DIPLOCATION("SW1:!7") |
| 207 | 207 | PORT_DIPSETTING( 0x00, "Novelty") |
| 208 | 208 | PORT_DIPSETTING( 0x40, "3 Credits") |
| 209 | | PORT_DIPNAME( 0x80, 0x80, "Balls per Game") PORT_DIPLOCATION("SW1:!8") |
| 209 | PORT_DIPNAME( 0x80, 0x80, "Balls per Game") PORT_DIPLOCATION("SW1:!8") |
| 210 | 210 | PORT_DIPSETTING( 0x00, "3") |
| 211 | 211 | PORT_DIPSETTING( 0x80, "5") |
| 212 | 212 | |
| 213 | 213 | PORT_START("DSW2") |
| 214 | | PORT_DIPNAME( 0x07, 0x01, "Maximum Credits") PORT_DIPLOCATION("SW2:!1,!2,!3") |
| 214 | PORT_DIPNAME( 0x07, 0x01, "Maximum Credits") PORT_DIPLOCATION("SW2:!1,!2,!3") |
| 215 | 215 | PORT_DIPSETTING( 0x00, "5") |
| 216 | 216 | PORT_DIPSETTING( 0x01, "10") |
| 217 | 217 | PORT_DIPSETTING( 0x02, "15") |
| r249940 | r249941 | |
|---|
| 220 | 220 | PORT_DIPSETTING( 0x05, "30") |
| 221 | 221 | PORT_DIPSETTING( 0x06, "35") |
| 222 | 222 | PORT_DIPSETTING( 0x07, "40") |
| 223 | | PORT_DIPNAME( 0x08, 0x08, "Credits Displayed") PORT_DIPLOCATION("SW2:!4") |
| 223 | PORT_DIPNAME( 0x08, 0x08, "Credits Displayed") PORT_DIPLOCATION("SW2:!4") |
| 224 | 224 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 225 | 225 | PORT_DIPSETTING( 0x08, DEF_STR( On )) |
| 226 | 226 | PORT_DIPNAME( 0x10, 0x10, "Match") |
| 227 | | PORT_DIPSETTING( 0x00, DEF_STR( Off )) PORT_DIPLOCATION("SW2:!5") |
| 227 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) PORT_DIPLOCATION("SW2:!5") |
| 228 | 228 | PORT_DIPSETTING( 0x10, DEF_STR( On )) |
| 229 | 229 | // from here, game-specific options |
| 230 | | PORT_DIPNAME( 0x20, 0x00, "S22 (game specific)") PORT_DIPLOCATION("SW2:!6") |
| 230 | PORT_DIPNAME( 0x20, 0x00, "S22 (game specific)") PORT_DIPLOCATION("SW2:!6") |
| 231 | 231 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 232 | 232 | PORT_DIPSETTING( 0x20, DEF_STR( On )) |
| 233 | | PORT_DIPNAME( 0x40, 0x00, "S23 (game specific)") PORT_DIPLOCATION("SW2:!7") |
| 233 | PORT_DIPNAME( 0x40, 0x00, "S23 (game specific)") PORT_DIPLOCATION("SW2:!7") |
| 234 | 234 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 235 | 235 | PORT_DIPSETTING( 0x40, DEF_STR( On )) |
| 236 | | PORT_DIPNAME( 0x80, 0x00, "No Free Balls or Games") PORT_DIPLOCATION("SW2:!8") // night rider |
| 236 | PORT_DIPNAME( 0x80, 0x00, "No Free Balls or Games") PORT_DIPLOCATION("SW2:!8") // night rider |
| 237 | 237 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 238 | 238 | PORT_DIPSETTING( 0x80, DEF_STR( On )) |
| 239 | 239 | |
| 240 | 240 | PORT_START("DSW3") |
| 241 | | PORT_DIPNAME( 0x0f, 0x00, "Coin Slot 2") PORT_DIPLOCATION("SW3:!1,!2,!3,!4") |
| 241 | PORT_DIPNAME( 0x0f, 0x00, "Coin Slot 2") PORT_DIPLOCATION("SW3:!1,!2,!3,!4") |
| 242 | 242 | PORT_DIPSETTING( 0x00, "Same as Slot 1") |
| 243 | 243 | PORT_DIPSETTING( 0x01, DEF_STR( 1C_1C )) |
| 244 | 244 | PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C )) |
| r249940 | r249941 | |
|---|
| 255 | 255 | PORT_DIPSETTING( 0x0d, "1 Coin/13 Credits") |
| 256 | 256 | PORT_DIPSETTING( 0x0e, "1 Coin/14 Credits") |
| 257 | 257 | PORT_DIPSETTING( 0x0f, "1 Coin/15 Credits") |
| 258 | | PORT_DIPNAME( 0x10, 0x00, "S29 (game specific)") PORT_DIPLOCATION("SW3:!5") |
| 258 | PORT_DIPNAME( 0x10, 0x00, "S29 (game specific)") PORT_DIPLOCATION("SW3:!5") |
| 259 | 259 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 260 | 260 | PORT_DIPSETTING( 0x10, DEF_STR( On )) |
| 261 | | PORT_DIPNAME( 0x20, 0x00, "S30 (game specific)") PORT_DIPLOCATION("SW3:!6") |
| 261 | PORT_DIPNAME( 0x20, 0x00, "S30 (game specific)") PORT_DIPLOCATION("SW3:!6") |
| 262 | 262 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 263 | 263 | PORT_DIPSETTING( 0x20, DEF_STR( On )) |
| 264 | | PORT_DIPNAME( 0x40, 0x00, "Awards") PORT_DIPLOCATION("SW3:!7") // night rider |
| 264 | PORT_DIPNAME( 0x40, 0x00, "Awards") PORT_DIPLOCATION("SW3:!7") // night rider |
| 265 | 265 | PORT_DIPSETTING( 0x00, "Conservative") |
| 266 | 266 | PORT_DIPSETTING( 0x40, "Liberal") |
| 267 | | PORT_DIPNAME( 0x80, 0x00, "Lane Adjustment") PORT_DIPLOCATION("SW3:!8") // night rider |
| 267 | PORT_DIPNAME( 0x80, 0x00, "Lane Adjustment") PORT_DIPLOCATION("SW3:!8") // night rider |
| 268 | 268 | PORT_DIPSETTING( 0x00, "Conservative") |
| 269 | 269 | PORT_DIPSETTING( 0x80, "Liberal") |
| 270 | 270 | |
| r249940 | r249941 | |
|---|
| 278 | 278 | // standard |
| 279 | 279 | PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_START1 ) |
| 280 | 280 | PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_TILT ) |
| 281 | | // PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Outhole") PORT_CODE(KEYCODE_BACKSPACE) |
| 282 | | PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, outhole_x0, (void *)0x07) // PORT_CODE(KEYCODE_BACKSPACE) |
| 281 | // PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Outhole") PORT_CODE(KEYCODE_BACKSPACE) |
| 282 | PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, outhole_x0, (void *)0x07) // PORT_CODE(KEYCODE_BACKSPACE) |
| 283 | 283 | |
| 284 | 284 | PORT_START("X1") |
| 285 | 285 | PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN3 ) |
| r249940 | r249941 | |
|---|
| 327 | 327 | PORT_INCLUDE( by17 ) |
| 328 | 328 | |
| 329 | 329 | PORT_MODIFY("DSW0") |
| 330 | | PORT_DIPNAME( 0x60, 0x60, "Award for Beating Highest Score") PORT_DIPLOCATION("SW0:!6,!7") |
| 330 | PORT_DIPNAME( 0x60, 0x60, "Award for Beating Highest Score") PORT_DIPLOCATION("SW0:!6,!7") |
| 331 | 331 | PORT_DIPSETTING( 0x00, "Nothing") |
| 332 | 332 | PORT_DIPSETTING( 0x20, "1 Credit") |
| 333 | 333 | PORT_DIPSETTING( 0x40, "2 Credits") |
| 334 | 334 | PORT_DIPSETTING( 0x60, "3 Credits") |
| 335 | 335 | |
| 336 | 336 | PORT_MODIFY("DSW1") |
| 337 | | PORT_DIPNAME( 0x40, 0x00, "S15") PORT_DIPLOCATION("SW1:!7") |
| 337 | PORT_DIPNAME( 0x40, 0x00, "S15") PORT_DIPLOCATION("SW1:!7") |
| 338 | 338 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 339 | 339 | PORT_DIPSETTING( 0x40, DEF_STR( On )) |
| 340 | 340 | |
| 341 | 341 | PORT_MODIFY("DSW2") |
| 342 | | PORT_DIPNAME( 0x20, 0x00, "S22") PORT_DIPLOCATION("SW2:!6") |
| 342 | PORT_DIPNAME( 0x20, 0x00, "S22") PORT_DIPLOCATION("SW2:!6") |
| 343 | 343 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 344 | 344 | PORT_DIPSETTING( 0x20, DEF_STR( On )) |
| 345 | | PORT_DIPNAME( 0x40, 0x00, "Saucer Award Feature") PORT_DIPLOCATION("SW2:!7") |
| 345 | PORT_DIPNAME( 0x40, 0x00, "Saucer Award Feature") PORT_DIPLOCATION("SW2:!7") |
| 346 | 346 | PORT_DIPSETTING( 0x00, "Start at 3000 Points") |
| 347 | 347 | PORT_DIPSETTING( 0x40, "Start at 2X Bonus") |
| 348 | | PORT_DIPNAME( 0x80, 0x00, "A & B Special Award Feature Per Ball") PORT_DIPLOCATION("SW2:!8") |
| 348 | PORT_DIPNAME( 0x80, 0x00, "A & B Special Award Feature Per Ball") PORT_DIPLOCATION("SW2:!8") |
| 349 | 349 | PORT_DIPSETTING( 0x00, "Award Special Once") |
| 350 | 350 | PORT_DIPSETTING( 0x80, "Award Special Alternates") |
| 351 | 351 | |
| 352 | 352 | PORT_MODIFY("DSW3") |
| 353 | | PORT_DIPNAME( 0x10, 0x00, "S29") PORT_DIPLOCATION("SW3:!5") |
| 353 | PORT_DIPNAME( 0x10, 0x00, "S29") PORT_DIPLOCATION("SW3:!5") |
| 354 | 354 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 355 | 355 | PORT_DIPSETTING( 0x10, DEF_STR( On )) |
| 356 | | PORT_DIPNAME( 0x60, 0x60, "Extra Ball / Specials Award Mode") PORT_DIPLOCATION("SW3:!6,!7") |
| 356 | PORT_DIPNAME( 0x60, 0x60, "Extra Ball / Specials Award Mode") PORT_DIPLOCATION("SW3:!6,!7") |
| 357 | 357 | PORT_DIPSETTING( 0x00, "Novelty / 50,000") |
| 358 | | // PORT_DIPSETTING( 0x20, "") |
| 358 | // PORT_DIPSETTING( 0x20, "") |
| 359 | 359 | PORT_DIPSETTING( 0x40, "Extra Ball / 50,000") |
| 360 | 360 | PORT_DIPSETTING( 0x60, "Extra Ball / Replay") |
| 361 | | PORT_DIPNAME( 0x80, 0x80, "Score Level Award") PORT_DIPLOCATION("SW3:!8") |
| 361 | PORT_DIPNAME( 0x80, 0x80, "Score Level Award") PORT_DIPLOCATION("SW3:!8") |
| 362 | 362 | PORT_DIPSETTING( 0x00, "Extra Ball") |
| 363 | 363 | PORT_DIPSETTING( 0x80, "Replay") |
| 364 | 364 | |
| 365 | | PORT_MODIFY("X2") /* Drop Target switches */ |
| 366 | | PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x20) // PORT_CODE(KEYCODE_K) |
| 367 | | PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x21) // PORT_CODE(KEYCODE_J) |
| 368 | | PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x22) // PORT_CODE(KEYCODE_H) |
| 369 | | PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x23) // PORT_CODE(KEYCODE_G) |
| 370 | | PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x24) // PORT_CODE(KEYCODE_F) |
| 371 | | PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x25) // PORT_CODE(KEYCODE_D) |
| 372 | | PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x26) // PORT_CODE(KEYCODE_S) |
| 373 | | PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x27) // PORT_CODE(KEYCODE_A) |
| 365 | PORT_MODIFY("X2") /* Drop Target switches */ |
| 366 | PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x20) // PORT_CODE(KEYCODE_K) |
| 367 | PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x21) // PORT_CODE(KEYCODE_J) |
| 368 | PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x22) // PORT_CODE(KEYCODE_H) |
| 369 | PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x23) // PORT_CODE(KEYCODE_G) |
| 370 | PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x24) // PORT_CODE(KEYCODE_F) |
| 371 | PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x25) // PORT_CODE(KEYCODE_D) |
| 372 | PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x26) // PORT_CODE(KEYCODE_S) |
| 373 | PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x27) // PORT_CODE(KEYCODE_A) |
| 374 | 374 | |
| 375 | 375 | PORT_MODIFY("X3") |
| 376 | | PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, saucer_x3, (void *)0x37) // PORT_CODE(KEYCODE_Q) |
| 376 | PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, saucer_x3, (void *)0x37) // PORT_CODE(KEYCODE_Q) |
| 377 | 377 | INPUT_PORTS_END |
| 378 | 378 | |
| 379 | 379 | static INPUT_PORTS_START( pwerplay ) |
| 380 | 380 | PORT_INCLUDE( by17 ) |
| 381 | 381 | |
| 382 | 382 | PORT_MODIFY("DSW0") |
| 383 | | PORT_DIPNAME( 0x60, 0x60, "Award for Beating Highest Score") PORT_DIPLOCATION("SW0:!6,!7") |
| 383 | PORT_DIPNAME( 0x60, 0x60, "Award for Beating Highest Score") PORT_DIPLOCATION("SW0:!6,!7") |
| 384 | 384 | PORT_DIPSETTING( 0x00, "Nothing") |
| 385 | 385 | PORT_DIPSETTING( 0x20, "1 Credit") |
| 386 | 386 | PORT_DIPSETTING( 0x40, "2 Credits") |
| 387 | 387 | PORT_DIPSETTING( 0x60, "3 Credits") |
| 388 | 388 | |
| 389 | 389 | PORT_MODIFY("DSW1") |
| 390 | | PORT_DIPNAME( 0x20, 0x00, "Drop Target Award Sequence") PORT_DIPLOCATION("SW1:!6") |
| 390 | PORT_DIPNAME( 0x20, 0x00, "Drop Target Award Sequence") PORT_DIPLOCATION("SW1:!6") |
| 391 | 391 | PORT_DIPSETTING( 0x00, "5X then Extra Ball") |
| 392 | 392 | PORT_DIPSETTING( 0x20, "5X and Extra Ball") |
| 393 | | PORT_DIPNAME( 0x40, 0x00, "Rollover Button Score") PORT_DIPLOCATION("SW1:!7") |
| 393 | PORT_DIPNAME( 0x40, 0x00, "Rollover Button Score") PORT_DIPLOCATION("SW1:!7") |
| 394 | 394 | PORT_DIPSETTING( 0x00, "Conservative - 100 Points") |
| 395 | 395 | PORT_DIPSETTING( 0x40, "Liberal - 1,000 Points") |
| 396 | 396 | |
| 397 | 397 | PORT_MODIFY("DSW2") |
| 398 | | PORT_DIPNAME( 0x20, 0x00, "Drop Target Bank Reset") PORT_DIPLOCATION("SW2:!6") |
| 398 | PORT_DIPNAME( 0x20, 0x00, "Drop Target Bank Reset") PORT_DIPLOCATION("SW2:!6") |
| 399 | 399 | PORT_DIPSETTING( 0x00, "Reset Both Banks") |
| 400 | 400 | PORT_DIPSETTING( 0x20, "Reset Completed Bank Only") |
| 401 | | PORT_DIPNAME( 0x40, 0x00, "Pop Bumper Scores") PORT_DIPLOCATION("SW2:!7") |
| 401 | PORT_DIPNAME( 0x40, 0x00, "Pop Bumper Scores") PORT_DIPLOCATION("SW2:!7") |
| 402 | 402 | PORT_DIPSETTING( 0x00, "Alternate 1,000 Points Top and Bottom") |
| 403 | 403 | PORT_DIPSETTING( 0x40, "All score 1,000 Points When Lit") |
| 404 | 404 | |
| 405 | 405 | PORT_MODIFY("DSW3") |
| 406 | | PORT_DIPNAME( 0x30, 0x20, "Top Saucer Specials Feature") PORT_DIPLOCATION("SW3:!5,!6") |
| 406 | PORT_DIPNAME( 0x30, 0x20, "Top Saucer Specials Feature") PORT_DIPLOCATION("SW3:!5,!6") |
| 407 | 407 | PORT_DIPSETTING( 0x00, "Outlane Specials do Not Light") |
| 408 | | // PORT_DIPSETTING( 0x10, "") |
| 408 | // PORT_DIPSETTING( 0x10, "") |
| 409 | 409 | PORT_DIPSETTING( 0x20, "Outlane Specials Alternate") |
| 410 | 410 | PORT_DIPSETTING( 0x30, "Outlane Specials Both Light") |
| 411 | | PORT_DIPNAME( 0xc0, 0xc0, "Award Mode") PORT_DIPLOCATION("SW3:!7,!8") |
| 411 | PORT_DIPNAME( 0xc0, 0xc0, "Award Mode") PORT_DIPLOCATION("SW3:!7,!8") |
| 412 | 412 | PORT_DIPSETTING( 0x00, "Novelty / 50,000") |
| 413 | | // PORT_DIPSETTING( 0x40, "") |
| 413 | // PORT_DIPSETTING( 0x40, "") |
| 414 | 414 | PORT_DIPSETTING( 0x80, "Extra Ball / 50,000") |
| 415 | 415 | PORT_DIPSETTING( 0xc0, "Extra Ball / Replay") |
| 416 | 416 | |
| 417 | | PORT_MODIFY("X2") /* Drop Target switches */ |
| 418 | | PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x20) // PORT_CODE(KEYCODE_K) |
| 419 | | PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x21) // PORT_CODE(KEYCODE_J) |
| 420 | | PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x22) // PORT_CODE(KEYCODE_H) |
| 421 | | PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x23) // PORT_CODE(KEYCODE_G) |
| 422 | | PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x24) // PORT_CODE(KEYCODE_F) |
| 423 | | PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x25) // PORT_CODE(KEYCODE_D) |
| 424 | | PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x26) // PORT_CODE(KEYCODE_S) |
| 425 | | PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x27) // PORT_CODE(KEYCODE_A) |
| 417 | PORT_MODIFY("X2") /* Drop Target switches */ |
| 418 | PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x20) // PORT_CODE(KEYCODE_K) |
| 419 | PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x21) // PORT_CODE(KEYCODE_J) |
| 420 | PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x22) // PORT_CODE(KEYCODE_H) |
| 421 | PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x23) // PORT_CODE(KEYCODE_G) |
| 422 | PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x24) // PORT_CODE(KEYCODE_F) |
| 423 | PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x25) // PORT_CODE(KEYCODE_D) |
| 424 | PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x26) // PORT_CODE(KEYCODE_S) |
| 425 | PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, drop_target_x2, (void *)0x27) // PORT_CODE(KEYCODE_A) |
| 426 | 426 | |
| 427 | 427 | PORT_MODIFY("X3") |
| 428 | | PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, saucer_x3, (void *)0x37) // PORT_CODE(KEYCODE_Q) |
| 428 | PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by17_state, saucer_x3, (void *)0x37) // PORT_CODE(KEYCODE_Q) |
| 429 | 429 | INPUT_PORTS_END |
| 430 | 430 | |
| 431 | 431 | |
| r249940 | r249941 | |
|---|
| 465 | 465 | |
| 466 | 466 | switch (bit_shift) |
| 467 | 467 | { |
| 468 | | case 0: if (machine().input().code_pressed_once(KEYCODE_K)) |
| 468 | case 0: if (machine().input().code_pressed_once(KEYCODE_K)) |
| 469 | 469 | m_io_hold_x[port] |= (1 << bit_shift); |
| 470 | 470 | break; |
| 471 | | case 1: if (machine().input().code_pressed_once(KEYCODE_J)) |
| 471 | case 1: if (machine().input().code_pressed_once(KEYCODE_J)) |
| 472 | 472 | m_io_hold_x[port] |= (1 << bit_shift); |
| 473 | 473 | break; |
| 474 | | case 2: if (machine().input().code_pressed_once(KEYCODE_H)) |
| 474 | case 2: if (machine().input().code_pressed_once(KEYCODE_H)) |
| 475 | 475 | m_io_hold_x[port] |= (1 << bit_shift); |
| 476 | 476 | break; |
| 477 | | case 3: if (machine().input().code_pressed_once(KEYCODE_G)) |
| 477 | case 3: if (machine().input().code_pressed_once(KEYCODE_G)) |
| 478 | 478 | m_io_hold_x[port] |= (1 << bit_shift); |
| 479 | 479 | break; |
| 480 | | case 4: if (machine().input().code_pressed_once(KEYCODE_F)) |
| 480 | case 4: if (machine().input().code_pressed_once(KEYCODE_F)) |
| 481 | 481 | m_io_hold_x[port] |= (1 << bit_shift); |
| 482 | 482 | break; |
| 483 | | case 5: if (machine().input().code_pressed_once(KEYCODE_D)) |
| 483 | case 5: if (machine().input().code_pressed_once(KEYCODE_D)) |
| 484 | 484 | m_io_hold_x[port] |= (1 << bit_shift); |
| 485 | 485 | break; |
| 486 | | case 6: if (machine().input().code_pressed_once(KEYCODE_S)) |
| 486 | case 6: if (machine().input().code_pressed_once(KEYCODE_S)) |
| 487 | 487 | m_io_hold_x[port] |= (1 << bit_shift); |
| 488 | 488 | break; |
| 489 | | case 7: if (machine().input().code_pressed_once(KEYCODE_A)) |
| 489 | case 7: if (machine().input().code_pressed_once(KEYCODE_A)) |
| 490 | 490 | m_io_hold_x[port] |= (1 << bit_shift); |
| 491 | 491 | break; |
| 492 | 492 | } |
| r249940 | r249941 | |
|---|
| 526 | 526 | |
| 527 | 527 | WRITE_LINE_MEMBER( by17_state::u10_ca2_w ) |
| 528 | 528 | { |
| 529 | | #if 0 // Display Blanking - Out of sync with video redraw rate and causes flicker so it's disabled |
| 529 | #if 0 // Display Blanking - Out of sync with video redraw rate and causes flicker so it's disabled |
| 530 | 530 | if (state == 0) |
| 531 | 531 | { |
| 532 | 532 | int digit; |
| r249940 | r249941 | |
|---|
| 547 | 547 | |
| 548 | 548 | WRITE_LINE_MEMBER( by17_state::u10_cb2_w ) |
| 549 | 549 | { |
| 550 | | // logerror("New U10 CB2 state %01x, was %01x. PIA=%02x\n", state, m_u10_cb2, m_u10a); |
| 550 | // logerror("New U10 CB2 state %01x, was %01x. PIA=%02x\n", state, m_u10_cb2, m_u10a); |
| 551 | 551 | |
| 552 | 552 | if (state == TRUE) |
| 553 | 553 | m_lamp_decode = m_u10a & 0x0f; |
| r249940 | r249941 | |
|---|
| 583 | 583 | |
| 584 | 584 | WRITE8_MEMBER( by17_state::u10_a_w ) |
| 585 | 585 | { |
| 586 | | // logerror("Writing %02x to U10 PIA, CB2 state is %01x, CA2 state is %01x, Lamp_Dec is %02x\n",data, m_u10_cb2, m_u10_ca2, (m_lamp_decode & 0x0f)); |
| 586 | // logerror("Writing %02x to U10 PIA, CB2 state is %01x, CA2 state is %01x, Lamp_Dec is %02x\n",data, m_u10_cb2, m_u10_ca2, (m_lamp_decode & 0x0f)); |
| 587 | 587 | |
| 588 | 588 | if (!m_u10_ca2) |
| 589 | 589 | { |
| 590 | | if (BIT(data, 0)==0) // Display 1 |
| 590 | if (BIT(data, 0)==0) // Display 1 |
| 591 | 591 | m_segment[1] = data>>4; |
| 592 | 592 | else |
| 593 | | if (BIT(data, 1)==0) // Display 2 |
| 593 | if (BIT(data, 1)==0) // Display 2 |
| 594 | 594 | m_segment[2] = data>>4; |
| 595 | 595 | else |
| 596 | | if (BIT(data, 2)==0) // Display 3 |
| 596 | if (BIT(data, 2)==0) // Display 3 |
| 597 | 597 | m_segment[3] = data>>4; |
| 598 | 598 | else |
| 599 | | if (BIT(data, 3)==0) // Display 4 |
| 599 | if (BIT(data, 3)==0) // Display 4 |
| 600 | 600 | m_segment[4] = data>>4; |
| 601 | 601 | } |
| 602 | 602 | |
| r249940 | r249941 | |
|---|
| 665 | 665 | |
| 666 | 666 | WRITE8_MEMBER( by17_state::u11_a_w ) |
| 667 | 667 | { |
| 668 | | if (BIT(data, 0)==0) // Display Credit/Ball |
| 668 | if (BIT(data, 0)==0) // Display Credit/Ball |
| 669 | 669 | { |
| 670 | 670 | m_segment[5] = m_u10a>>4; |
| 671 | 671 | } |
| r249940 | r249941 | |
|---|
| 691 | 691 | if BIT(data, 2) |
| 692 | 692 | m_digit = 6; |
| 693 | 693 | else |
| 694 | | if (BIT(data, 2) && BIT(data, 3)) // Aftermarket 7th digit strobe for 6 digit games |
| 694 | if (BIT(data, 2) && BIT(data, 3)) // Aftermarket 7th digit strobe for 6 digit games |
| 695 | 695 | m_digit = 7; |
| 696 | 696 | |
| 697 | 697 | if ((m_u10_ca2==0) && m_digit) |
| r249940 | r249941 | |
|---|
| 713 | 713 | { |
| 714 | 714 | if (!m_u11_cb2) |
| 715 | 715 | { |
| 716 | | if ((data & 0x0f) < 0x0f) // Momentary Solenoids |
| 716 | if ((data & 0x0f) < 0x0f) // Momentary Solenoids |
| 717 | 717 | { |
| 718 | 718 | output_set_indexed_value( "solenoid", (data & 0x0f), TRUE); |
| 719 | 719 | |
| 720 | | if (m_solenoid_features[(data & 0x0f)][3]) // Reset/release relevant switch after firing Solenoid |
| 720 | if (m_solenoid_features[(data & 0x0f)][3]) // Reset/release relevant switch after firing Solenoid |
| 721 | 721 | m_io_hold_x[(m_solenoid_features[(data & 0x0f)][2])] &= (m_solenoid_features[(data & 0x0f)][3]); |
| 722 | 722 | |
| 723 | | if (m_solenoid_features[(data & 0x0f)][0] != 0xff) // Play solenoid audio sample |
| 723 | if (m_solenoid_features[(data & 0x0f)][0] != 0xff) // Play solenoid audio sample |
| 724 | 724 | m_samples->start(m_solenoid_features[(data & 0x0f)][0], m_solenoid_features[(data & 0x0f)][1]); |
| 725 | 725 | } |
| 726 | | else // Rest output - all momentary solenoids are off |
| 726 | else // Rest output - all momentary solenoids are off |
| 727 | 727 | { |
| 728 | 728 | for (int i=0; i<15; i++) |
| 729 | 729 | { |
| r249940 | r249941 | |
|---|
| 747 | 747 | } |
| 748 | 748 | if ((m_u11b & 0x20) && ((data & 0x20)==0)) |
| 749 | 749 | { |
| 750 | | output_set_value("solenoid17", TRUE); // Coin Lockout Coil engage |
| 750 | output_set_value("solenoid17", TRUE); // Coin Lockout Coil engage |
| 751 | 751 | if (m_solenoid_features[17][0] != 0xff) |
| 752 | 752 | m_samples->start(m_solenoid_features[17][0], m_solenoid_features[17][1]); |
| 753 | 753 | } |
| 754 | 754 | else if ((data & 0x20) && ((m_u11b & 0x20)==0)) |
| 755 | 755 | { |
| 756 | | output_set_value("solenoid17", FALSE); // Coin Lockout Coil release |
| 756 | output_set_value("solenoid17", FALSE); // Coin Lockout Coil release |
| 757 | 757 | if (m_solenoid_features[17][0] != 0xff) |
| 758 | 758 | m_samples->start(m_solenoid_features[17][0], m_solenoid_features[17][2]); |
| 759 | 759 | } |
| 760 | 760 | if ((m_u11b & 0x40) && ((data & 0x40)==0)) |
| 761 | 761 | { |
| 762 | | output_set_value("solenoid18", TRUE); // Flipper Enable Relay engage |
| 762 | output_set_value("solenoid18", TRUE); // Flipper Enable Relay engage |
| 763 | 763 | if (m_solenoid_features[18][0] != 0xff) |
| 764 | 764 | m_samples->start(m_solenoid_features[18][0], m_solenoid_features[18][1]); |
| 765 | 765 | } |
| 766 | 766 | else if ((data & 0x40) && ((m_u11b & 0x40)==0)) |
| 767 | 767 | { |
| 768 | | output_set_value("solenoid18", FALSE); // Flipper Enable Relay release |
| 768 | output_set_value("solenoid18", FALSE); // Flipper Enable Relay release |
| 769 | 769 | if (m_solenoid_features[18][0] != 0xff) |
| 770 | 770 | m_samples->start(m_solenoid_features[18][0], m_solenoid_features[18][2]); |
| 771 | 771 | } |
| r249940 | r249941 | |
|---|
| 789 | 789 | // zero-cross detection |
| 790 | 790 | TIMER_DEVICE_CALLBACK_MEMBER( by17_state::timer_z_freq ) |
| 791 | 791 | { |
| 792 | | |
| 793 | 792 | /* Zero Crossing Detector - this timing is based on 50Hz AC line power input converted to unregulated DC |
| 794 | 793 | |
| 795 | | -+ +---+ |
| 794 | -+ +---+ |
| 796 | 795 | | | | |
| 797 | 796 | |<-------- 9.30ms -------->|<->|700us |
| 798 | 797 | | | | |
| 799 | | +--------------------------+ +----- |
| 798 | +--------------------------+ +----- |
| 800 | 799 | */ |
| 801 | 800 | |
| 802 | 801 | timer_device *zero_crossing_active_timer = machine().device<timer_device>("timer_z_pulse"); |
| r249940 | r249941 | |
|---|
| 825 | 824 | // 555 timer for display refresh |
| 826 | 825 | TIMER_DEVICE_CALLBACK_MEMBER( by17_state::u11_timer ) |
| 827 | 826 | { |
| 828 | | |
| 829 | 827 | /* +--------------------------+ +----- |
| 830 | 828 | | | | |
| 831 | 829 | |<-------- 2.85ms -------->|<->|300us |
| r249940 | r249941 | |
|---|
| 851 | 849 | |
| 852 | 850 | DRIVER_INIT_MEMBER( by17_state, by17 ) |
| 853 | 851 | { |
| 854 | | |
| 855 | 852 | static const UINT8 solenoid_features_default[20][4] = |
| 856 | 853 | { |
| 857 | 854 | // This table serves two functions and is configured on a per game basis: |
| r249940 | r249941 | |
|---|
| 860 | 857 | |
| 861 | 858 | // { Sound Channel, Sound Sample, Switch Strobe, Switch Return Mask } |
| 862 | 859 | /*00*/ { 0x00, 0x00, 0x00, 0x00 }, |
| 863 | | /*01*/ { 0x05, 0x01, 0x00, 0x00 }, // Chime 10 |
| 864 | | /*02*/ { 0x05, 0x02, 0x00, 0x00 }, // Chime 100 |
| 865 | | /*03*/ { 0x05, 0x03, 0x00, 0x00 }, // Chime 1000 |
| 866 | | /*04*/ { 0x05, 0x04, 0x00, 0x00 }, // Chime 10000 |
| 867 | | /*05*/ { 0x04, 0x00, 0x00, 0x00 }, // Knocker |
| 868 | | /*06*/ { 0x01, 0x09, 0x00, 0x7f }, // Outhole |
| 860 | /*01*/ { 0x05, 0x01, 0x00, 0x00 }, // Chime 10 |
| 861 | /*02*/ { 0x05, 0x02, 0x00, 0x00 }, // Chime 100 |
| 862 | /*03*/ { 0x05, 0x03, 0x00, 0x00 }, // Chime 1000 |
| 863 | /*04*/ { 0x05, 0x04, 0x00, 0x00 }, // Chime 10000 |
| 864 | /*05*/ { 0x04, 0x00, 0x00, 0x00 }, // Knocker |
| 865 | /*06*/ { 0x01, 0x09, 0x00, 0x7f }, // Outhole |
| 869 | 866 | /*07*/ { 0x00, 0x00, 0x00, 0x00 }, |
| 870 | 867 | /*08*/ { 0x02, 0x00, 0x00, 0x00 }, |
| 871 | 868 | /*09*/ { 0x02, 0x00, 0x00, 0x00 }, |
| r249940 | r249941 | |
|---|
| 874 | 871 | /*12*/ { 0x00, 0x00, 0x00, 0x00 }, |
| 875 | 872 | /*13*/ { 0x02, 0x00, 0x00, 0x00 }, |
| 876 | 873 | /*14*/ { 0x00, 0x00, 0x00, 0x00 }, |
| 877 | | /*15*/ { 0xff, 0xff, 0x00, 0x00 }, // None - all momentary solenoids off |
| 874 | /*15*/ { 0xff, 0xff, 0x00, 0x00 }, // None - all momentary solenoids off |
| 878 | 875 | // { Sound Channel, Sound engage, Sound release, Not Used } |
| 879 | 876 | /*16*/ { 0xff, 0xff, 0xff, 0x00 }, |
| 880 | | /*17*/ { 0x00, 0x0c, 0x0d, 0x00 }, // Coin Lockout coil |
| 881 | | /*18*/ { 0x00, 0x0e, 0x0f, 0x00 }, // Flipper Enable relay |
| 877 | /*17*/ { 0x00, 0x0c, 0x0d, 0x00 }, // Coin Lockout coil |
| 878 | /*18*/ { 0x00, 0x0e, 0x0f, 0x00 }, // Flipper Enable relay |
| 882 | 879 | /*19*/ { 0xff, 0xff, 0xff, 0x00 } |
| 883 | 880 | }; |
| 884 | 881 | |
| r249940 | r249941 | |
|---|
| 892 | 889 | |
| 893 | 890 | DRIVER_INIT_MEMBER( by17_state, matahari ) |
| 894 | 891 | { |
| 895 | | |
| 896 | 892 | static const UINT8 solenoid_features_matahari[20][4] = |
| 897 | 893 | { |
| 898 | 894 | // { Sound Channel, Sound Sample, Switch Strobe, Switch Return Mask } |
| 899 | | /*00*/ { 0x02, 0x05, 0x03, 0x7f }, // Saucer |
| 900 | | /*01*/ { 0x05, 0x01, 0x00, 0x00 }, // Chime 10 |
| 901 | | /*02*/ { 0x05, 0x02, 0x00, 0x00 }, // Chime 100 |
| 902 | | /*03*/ { 0x05, 0x03, 0x00, 0x00 }, // Chime 1000 |
| 903 | | /*04*/ { 0x05, 0x04, 0x00, 0x00 }, // Chime 10000 |
| 904 | | /*05*/ { 0x04, 0x06, 0x00, 0x00 }, // Knocker |
| 905 | | /*06*/ { 0x01, 0x09, 0x00, 0x7f }, // Outhole |
| 906 | | /*07*/ { 0x02, 0x00, 0x00, 0x00 }, // Pop Bumper Left Bottom |
| 907 | | /*08*/ { 0x02, 0x00, 0x00, 0x00 }, // Pop Bumper Left Top |
| 908 | | /*09*/ { 0x02, 0x00, 0x00, 0x00 }, // Pop Bumper Right Top |
| 909 | | /*10*/ { 0x02, 0x00, 0x00, 0x00 }, // Pop Bumper Right Bottom |
| 910 | | /*11*/ { 0x02, 0x07, 0x00, 0x00 }, // Slingshot Left |
| 911 | | /*12*/ { 0x00, 0x0b, 0x02, 0x0f }, // Drop Target Reset Left |
| 912 | | /*13*/ { 0x02, 0x07, 0x00, 0x00 }, // Slingshot Right |
| 913 | | /*14*/ { 0x03, 0x0b, 0x02, 0xf0 }, // Drop Target Reset Right |
| 914 | | /*15*/ { 0xff, 0xff, 0x00, 0x00 }, // None - all momentary solenoids off |
| 895 | /*00*/ { 0x02, 0x05, 0x03, 0x7f }, // Saucer |
| 896 | /*01*/ { 0x05, 0x01, 0x00, 0x00 }, // Chime 10 |
| 897 | /*02*/ { 0x05, 0x02, 0x00, 0x00 }, // Chime 100 |
| 898 | /*03*/ { 0x05, 0x03, 0x00, 0x00 }, // Chime 1000 |
| 899 | /*04*/ { 0x05, 0x04, 0x00, 0x00 }, // Chime 10000 |
| 900 | /*05*/ { 0x04, 0x06, 0x00, 0x00 }, // Knocker |
| 901 | /*06*/ { 0x01, 0x09, 0x00, 0x7f }, // Outhole |
| 902 | /*07*/ { 0x02, 0x00, 0x00, 0x00 }, // Pop Bumper Left Bottom |
| 903 | /*08*/ { 0x02, 0x00, 0x00, 0x00 }, // Pop Bumper Left Top |
| 904 | /*09*/ { 0x02, 0x00, 0x00, 0x00 }, // Pop Bumper Right Top |
| 905 | /*10*/ { 0x02, 0x00, 0x00, 0x00 }, // Pop Bumper Right Bottom |
| 906 | /*11*/ { 0x02, 0x07, 0x00, 0x00 }, // Slingshot Left |
| 907 | /*12*/ { 0x00, 0x0b, 0x02, 0x0f }, // Drop Target Reset Left |
| 908 | /*13*/ { 0x02, 0x07, 0x00, 0x00 }, // Slingshot Right |
| 909 | /*14*/ { 0x03, 0x0b, 0x02, 0xf0 }, // Drop Target Reset Right |
| 910 | /*15*/ { 0xff, 0xff, 0x00, 0x00 }, // None - all momentary solenoids off |
| 915 | 911 | // { Sound Channel, Sound engage, Sound release, Not Used } |
| 916 | 912 | /*16*/ { 0xff, 0xff, 0xff, 0x00 }, |
| 917 | | /*17*/ { 0x00, 0x0c, 0x0d, 0x00 }, // Coin Lockout coil |
| 918 | | /*18*/ { 0x00, 0x0e, 0x0f, 0x00 }, // Flipper Enable relay |
| 913 | /*17*/ { 0x00, 0x0c, 0x0d, 0x00 }, // Coin Lockout coil |
| 914 | /*18*/ { 0x00, 0x0e, 0x0f, 0x00 }, // Flipper Enable relay |
| 919 | 915 | /*19*/ { 0xff, 0xff, 0xff, 0x00 } |
| 920 | 916 | }; |
| 921 | 917 | |
| r249940 | r249941 | |
|---|
| 929 | 925 | |
| 930 | 926 | DRIVER_INIT_MEMBER( by17_state, pwerplay ) |
| 931 | 927 | { |
| 932 | | |
| 933 | 928 | static const UINT8 solenoid_features_pwerplay[20][4] = |
| 934 | 929 | { |
| 935 | 930 | // { Sound Channel, Sound Sample, Switch Strobe, Switch Return Mask } |
| 936 | | /*00*/ { 0x00, 0x10, 0x00, 0x00 }, // Post Down |
| 937 | | /*01*/ { 0x05, 0x01, 0x00, 0x00 }, // Chime 10 |
| 938 | | /*02*/ { 0x05, 0x02, 0x00, 0x00 }, // Chime 100 |
| 939 | | /*03*/ { 0x05, 0x03, 0x00, 0x00 }, // Chime 1000 |
| 940 | | /*04*/ { 0x05, 0x04, 0x00, 0x00 }, // Chime 10000 |
| 941 | | /*05*/ { 0x04, 0x06, 0x00, 0x00 }, // Knocker |
| 942 | | /*06*/ { 0x01, 0x09, 0x00, 0x7f }, // Outhole |
| 943 | | /*07*/ { 0x02, 0x05, 0x03, 0x7f }, // Saucer |
| 944 | | /*08*/ { 0x02, 0x00, 0x00, 0x00 }, // Pop Bumper Left |
| 945 | | /*09*/ { 0x02, 0x00, 0x00, 0x00 }, // Pop Bumper Right |
| 946 | | /*10*/ { 0x02, 0x00, 0x00, 0x00 }, // Pop Bumper Bottom |
| 947 | | /*11*/ { 0x02, 0x07, 0x00, 0x00 }, // Slingshot Left |
| 948 | | /*12*/ { 0x00, 0x0b, 0x02, 0x0f }, // Drop Target Reset Left |
| 949 | | /*13*/ { 0x02, 0x07, 0x00, 0x00 }, // Slingshot Right |
| 950 | | /*14*/ { 0x03, 0x0b, 0x02, 0xf0 }, // Drop Target Reset Right |
| 951 | | /*15*/ { 0xff, 0xff, 0x00, 0x00 }, // None - all momentary solenoids off |
| 931 | /*00*/ { 0x00, 0x10, 0x00, 0x00 }, // Post Down |
| 932 | /*01*/ { 0x05, 0x01, 0x00, 0x00 }, // Chime 10 |
| 933 | /*02*/ { 0x05, 0x02, 0x00, 0x00 }, // Chime 100 |
| 934 | /*03*/ { 0x05, 0x03, 0x00, 0x00 }, // Chime 1000 |
| 935 | /*04*/ { 0x05, 0x04, 0x00, 0x00 }, // Chime 10000 |
| 936 | /*05*/ { 0x04, 0x06, 0x00, 0x00 }, // Knocker |
| 937 | /*06*/ { 0x01, 0x09, 0x00, 0x7f }, // Outhole |
| 938 | /*07*/ { 0x02, 0x05, 0x03, 0x7f }, // Saucer |
| 939 | /*08*/ { 0x02, 0x00, 0x00, 0x00 }, // Pop Bumper Left |
| 940 | /*09*/ { 0x02, 0x00, 0x00, 0x00 }, // Pop Bumper Right |
| 941 | /*10*/ { 0x02, 0x00, 0x00, 0x00 }, // Pop Bumper Bottom |
| 942 | /*11*/ { 0x02, 0x07, 0x00, 0x00 }, // Slingshot Left |
| 943 | /*12*/ { 0x00, 0x0b, 0x02, 0x0f }, // Drop Target Reset Left |
| 944 | /*13*/ { 0x02, 0x07, 0x00, 0x00 }, // Slingshot Right |
| 945 | /*14*/ { 0x03, 0x0b, 0x02, 0xf0 }, // Drop Target Reset Right |
| 946 | /*15*/ { 0xff, 0xff, 0x00, 0x00 }, // None - all momentary solenoids off |
| 952 | 947 | // { Sound Channel, Sound engage, Sound release, Not Used } |
| 953 | | /*16*/ { 0x00, 0x11, 0x0f, 0x00 }, // Post Up |
| 954 | | /*17*/ { 0x00, 0x0c, 0x0d, 0x00 }, // Coin Lockout coil |
| 955 | | /*18*/ { 0x00, 0x0e, 0x0f, 0x00 }, // Flipper Enable relay |
| 948 | /*16*/ { 0x00, 0x11, 0x0f, 0x00 }, // Post Up |
| 949 | /*17*/ { 0x00, 0x0c, 0x0d, 0x00 }, // Coin Lockout coil |
| 950 | /*18*/ { 0x00, 0x0e, 0x0f, 0x00 }, // Flipper Enable relay |
| 956 | 951 | /*19*/ { 0xff, 0xff, 0xff, 0x00 } |
| 957 | 952 | }; |
| 958 | 953 | |
| r249940 | r249941 | |
|---|
| 977 | 972 | m_u11a = 0; |
| 978 | 973 | m_u11b = 0; |
| 979 | 974 | m_lamp_decode = 0x0f; |
| 980 | | m_io_hold_x[0] = 0x80; // Put ball in Outhole on startup |
| 975 | m_io_hold_x[0] = 0x80; // Put ball in Outhole on startup |
| 981 | 976 | m_io_hold_x[1] = m_io_hold_x[2] = m_io_hold_x[3] = m_io_hold_x[4] = 0; |
| 982 | 977 | } |
| 983 | 978 | |
| r249940 | r249941 | |
|---|
| 985 | 980 | |
| 986 | 981 | static MACHINE_CONFIG_START( by17, by17_state ) |
| 987 | 982 | /* basic machine hardware */ |
| 988 | | MCFG_CPU_ADD("maincpu", M6800, 530000) // No xtal, just 2 chips forming a multivibrator oscillator around 530KHz |
| 983 | MCFG_CPU_ADD("maincpu", M6800, 530000) // No xtal, just 2 chips forming a multivibrator oscillator around 530KHz |
| 989 | 984 | MCFG_CPU_PROGRAM_MAP(by17_map) |
| 990 | 985 | |
| 991 | 986 | MCFG_MACHINE_RESET_OVERRIDE( by17_state, by17 ) |
| 992 | 987 | |
| 993 | | MCFG_NVRAM_ADD_0FILL("nvram") // 'F' filled causes Credit Display to be blank on first startup |
| 988 | MCFG_NVRAM_ADD_0FILL("nvram") // 'F' filled causes Credit Display to be blank on first startup |
| 994 | 989 | |
| 995 | 990 | /* Video */ |
| 996 | 991 | MCFG_DEFAULT_LAYOUT(layout_by17) |
trunk/src/mame/drivers/by35.c
| r249940 | r249941 | |
|---|
| 173 | 173 | |
| 174 | 174 | |
| 175 | 175 | static ADDRESS_MAP_START( by35_map, AS_PROGRAM, 8, by35_state ) |
| 176 | | ADDRESS_MAP_GLOBAL_MASK(0x7fff) // A15 is not connected |
| 176 | ADDRESS_MAP_GLOBAL_MASK(0x7fff) // A15 is not connected |
| 177 | 177 | AM_RANGE(0x0000, 0x007f) AM_RAM |
| 178 | 178 | AM_RANGE(0x0088, 0x008b) AM_DEVREADWRITE("pia_u10", pia6821_device, read, write) |
| 179 | 179 | AM_RANGE(0x0090, 0x0093) AM_DEVREADWRITE("pia_u11", pia6821_device, read, write) |
| r249940 | r249941 | |
|---|
| 182 | 182 | ADDRESS_MAP_END |
| 183 | 183 | |
| 184 | 184 | static ADDRESS_MAP_START( nuovo_map, AS_PROGRAM, 8, by35_state ) |
| 185 | | // AM_RANGE(0x0000, 0x007f) AM_RAM // Schematics infer that the M6802 internal RAM is disabled. |
| 185 | // AM_RANGE(0x0000, 0x007f) AM_RAM // Schematics infer that the M6802 internal RAM is disabled. |
| 186 | 186 | AM_RANGE(0x0088, 0x008b) AM_DEVREADWRITE("pia_u10", pia6821_device, read, write) |
| 187 | 187 | AM_RANGE(0x0090, 0x0093) AM_DEVREADWRITE("pia_u11", pia6821_device, read, write) |
| 188 | 188 | AM_RANGE(0x0000, 0x07ff) AM_RAM AM_SHARE("nvram") |
| r249940 | r249941 | |
|---|
| 197 | 197 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE2 ) PORT_NAME("Activity") PORT_CHANGED_MEMBER(DEVICE_SELF, by35_state, activity_button, 0) |
| 198 | 198 | |
| 199 | 199 | PORT_START("DSW0") |
| 200 | | PORT_DIPNAME( 0x1f, 0x02, "Coin Slot 1") PORT_DIPLOCATION("SW0:!1,!2,!3,!4,!5") // same as 03 |
| 200 | PORT_DIPNAME( 0x1f, 0x02, "Coin Slot 1") PORT_DIPLOCATION("SW0:!1,!2,!3,!4,!5") // same as 03 |
| 201 | 201 | PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C )) |
| 202 | 202 | PORT_DIPSETTING( 0x02, DEF_STR( 1C_1C )) |
| 203 | 203 | PORT_DIPSETTING( 0x03, DEF_STR( 2C_1C )) |
| r249940 | r249941 | |
|---|
| 229 | 229 | PORT_DIPSETTING( 0x1d, "2 Coins/14 Credits") |
| 230 | 230 | PORT_DIPSETTING( 0x1e, "1 Coin/15 Credits") |
| 231 | 231 | PORT_DIPSETTING( 0x1f, "2 Coins/15 Credits") |
| 232 | | PORT_DIPNAME( 0x60, 0x40, "Award for Beating Highest Score") PORT_DIPLOCATION("SW0:!6,!7") |
| 232 | PORT_DIPNAME( 0x60, 0x40, "Award for Beating Highest Score") PORT_DIPLOCATION("SW0:!6,!7") |
| 233 | 233 | PORT_DIPSETTING( 0x00, "Nothing") |
| 234 | 234 | PORT_DIPSETTING( 0x20, "1 Credit") |
| 235 | 235 | PORT_DIPSETTING( 0x40, "2 Credits") |
| 236 | 236 | PORT_DIPSETTING( 0x60, "3 Credits") |
| 237 | | PORT_DIPNAME( 0x80, 0x80, "Melody Option 1") PORT_DIPLOCATION("SW0:!8") |
| 237 | PORT_DIPNAME( 0x80, 0x80, "Melody Option 1") PORT_DIPLOCATION("SW0:!8") |
| 238 | 238 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 239 | 239 | PORT_DIPSETTING( 0x80, DEF_STR( On )) |
| 240 | 240 | |
| 241 | 241 | PORT_START("DSW1") |
| 242 | | PORT_DIPNAME( 0x1f, 0x02, "Coin Slot 3") PORT_DIPLOCATION("SW1:!1,!2,!3,!4,!5") // same as 01 |
| 242 | PORT_DIPNAME( 0x1f, 0x02, "Coin Slot 3") PORT_DIPLOCATION("SW1:!1,!2,!3,!4,!5") // same as 01 |
| 243 | 243 | PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C )) |
| 244 | 244 | PORT_DIPSETTING( 0x02, DEF_STR( 1C_1C )) |
| 245 | 245 | PORT_DIPSETTING( 0x03, DEF_STR( 2C_1C )) |
| r249940 | r249941 | |
|---|
| 271 | 271 | PORT_DIPSETTING( 0x1d, "2 Coins/14 Credits") |
| 272 | 272 | PORT_DIPSETTING( 0x1e, "1 Coin/15 Credits") |
| 273 | 273 | PORT_DIPSETTING( 0x1f, "2 Coins/15 Credits") |
| 274 | | PORT_DIPNAME( 0x60, 0x60, "Score Level Award") PORT_DIPLOCATION("SW1:!6,!7") |
| 274 | PORT_DIPNAME( 0x60, 0x60, "Score Level Award") PORT_DIPLOCATION("SW1:!6,!7") |
| 275 | 275 | PORT_DIPSETTING( 0x00, "Nothing") |
| 276 | 276 | PORT_DIPSETTING( 0x40, "Extra Ball") |
| 277 | 277 | PORT_DIPSETTING( 0x60, "Replay") |
| 278 | | PORT_DIPNAME( 0x80, 0x80, "Balls Per Game") PORT_DIPLOCATION("SW1:!8") |
| 278 | PORT_DIPNAME( 0x80, 0x80, "Balls Per Game") PORT_DIPLOCATION("SW1:!8") |
| 279 | 279 | PORT_DIPSETTING( 0x00, "3") |
| 280 | 280 | PORT_DIPSETTING( 0x80, "5") |
| 281 | 281 | |
| 282 | 282 | PORT_START("DSW2") |
| 283 | | PORT_DIPNAME( 0x07, 0x01, "Maximum Credits") PORT_DIPLOCATION("SW2:!1,!2,!3") |
| 283 | PORT_DIPNAME( 0x07, 0x01, "Maximum Credits") PORT_DIPLOCATION("SW2:!1,!2,!3") |
| 284 | 284 | PORT_DIPSETTING( 0x00, "5") |
| 285 | 285 | PORT_DIPSETTING( 0x01, "10") |
| 286 | 286 | PORT_DIPSETTING( 0x02, "15") |
| r249940 | r249941 | |
|---|
| 289 | 289 | PORT_DIPSETTING( 0x05, "30") |
| 290 | 290 | PORT_DIPSETTING( 0x06, "35") |
| 291 | 291 | PORT_DIPSETTING( 0x07, "40") |
| 292 | | PORT_DIPNAME( 0x08, 0x08, "Credits Displayed") PORT_DIPLOCATION("SW2:!4") |
| 292 | PORT_DIPNAME( 0x08, 0x08, "Credits Displayed") PORT_DIPLOCATION("SW2:!4") |
| 293 | 293 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 294 | 294 | PORT_DIPSETTING( 0x08, DEF_STR( On )) |
| 295 | | PORT_DIPNAME( 0x10, 0x10, "Match Feature") PORT_DIPLOCATION("SW2:!5") |
| 295 | PORT_DIPNAME( 0x10, 0x10, "Match Feature") PORT_DIPLOCATION("SW2:!5") |
| 296 | 296 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 297 | 297 | PORT_DIPSETTING( 0x10, DEF_STR( On )) |
| 298 | | PORT_DIPNAME( 0x20, 0x00, "S22 (game specific)") PORT_DIPLOCATION("SW2:!6") |
| 298 | PORT_DIPNAME( 0x20, 0x00, "S22 (game specific)") PORT_DIPLOCATION("SW2:!6") |
| 299 | 299 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 300 | 300 | PORT_DIPSETTING( 0x20, DEF_STR( On )) |
| 301 | | PORT_DIPNAME( 0x40, 0x00, "S23 (game specific)") PORT_DIPLOCATION("SW2:!7") |
| 301 | PORT_DIPNAME( 0x40, 0x00, "S23 (game specific)") PORT_DIPLOCATION("SW2:!7") |
| 302 | 302 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 303 | 303 | PORT_DIPSETTING( 0x40, DEF_STR( On )) |
| 304 | | PORT_DIPNAME( 0x80, 0x00, "S24 (game specific)") PORT_DIPLOCATION("SW2:!8") |
| 304 | PORT_DIPNAME( 0x80, 0x00, "S24 (game specific)") PORT_DIPLOCATION("SW2:!8") |
| 305 | 305 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 306 | 306 | PORT_DIPSETTING( 0x80, DEF_STR( On )) |
| 307 | 307 | |
| 308 | 308 | PORT_START("DSW3") |
| 309 | | PORT_DIPNAME( 0x0f, 0x00, "Coin Slot 2") PORT_DIPLOCATION("SW3:!1,!2,!3,!4") |
| 309 | PORT_DIPNAME( 0x0f, 0x00, "Coin Slot 2") PORT_DIPLOCATION("SW3:!1,!2,!3,!4") |
| 310 | 310 | PORT_DIPSETTING( 0x00, "Same as Slot 1") |
| 311 | 311 | PORT_DIPSETTING( 0x01, DEF_STR( 1C_1C )) |
| 312 | 312 | PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C )) |
| r249940 | r249941 | |
|---|
| 323 | 323 | PORT_DIPSETTING( 0x0d, "1 Coin/13 Credits") |
| 324 | 324 | PORT_DIPSETTING( 0x0e, "1 Coin/14 Credits") |
| 325 | 325 | PORT_DIPSETTING( 0x0f, "1 Coin/15 Credits") |
| 326 | | PORT_DIPNAME( 0x10, 0x00, "S29 (game specific)") PORT_DIPLOCATION("SW3:!5") |
| 326 | PORT_DIPNAME( 0x10, 0x00, "S29 (game specific)") PORT_DIPLOCATION("SW3:!5") |
| 327 | 327 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 328 | 328 | PORT_DIPSETTING( 0x10, DEF_STR( On )) |
| 329 | | PORT_DIPNAME( 0x20, 0x00, "S30 (game specific)") PORT_DIPLOCATION("SW3:!6") |
| 329 | PORT_DIPNAME( 0x20, 0x00, "S30 (game specific)") PORT_DIPLOCATION("SW3:!6") |
| 330 | 330 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 331 | 331 | PORT_DIPSETTING( 0x20, DEF_STR( On )) |
| 332 | | PORT_DIPNAME( 0x40, 0x00, "S31 (game specific)") PORT_DIPLOCATION("SW3:!7") |
| 332 | PORT_DIPNAME( 0x40, 0x00, "S31 (game specific)") PORT_DIPLOCATION("SW3:!7") |
| 333 | 333 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 334 | 334 | PORT_DIPSETTING( 0x40, DEF_STR( On )) |
| 335 | | PORT_DIPNAME( 0x80, 0x80, "Melody Option 2") PORT_DIPLOCATION("SW3:!8") |
| 335 | PORT_DIPNAME( 0x80, 0x80, "Melody Option 2") PORT_DIPLOCATION("SW3:!8") |
| 336 | 336 | PORT_DIPSETTING( 0x00, DEF_STR( Off )) |
| 337 | 337 | PORT_DIPSETTING( 0x80, DEF_STR( On )) |
| 338 | 338 | |
| r249940 | r249941 | |
|---|
| 344 | 344 | PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_BACKSLASH) |
| 345 | 345 | PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_START1 ) |
| 346 | 346 | PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_TILT ) |
| 347 | | // PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Outhole") PORT_CODE(KEYCODE_BACKSPACE) |
| 347 | // PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Outhole") PORT_CODE(KEYCODE_BACKSPACE) |
| 348 | 348 | PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by35_state, outhole_x0, (void *)0x07) // PORT_CODE(KEYCODE_BACKSPACE) |
| 349 | 349 | |
| 350 | 350 | PORT_START("X1") |
| r249940 | r249941 | |
|---|
| 392 | 392 | PORT_INCLUDE( by35 ) |
| 393 | 393 | |
| 394 | 394 | PORT_MODIFY("DSW2") |
| 395 | | PORT_DIPNAME( 0x20, 0x00, "Drop Target Special") PORT_DIPLOCATION("SW2:!6") |
| 395 | PORT_DIPNAME( 0x20, 0x00, "Drop Target Special") PORT_DIPLOCATION("SW2:!6") |
| 396 | 396 | PORT_DIPSETTING( 0x00, "Lit Until Next Ball") |
| 397 | 397 | PORT_DIPSETTING( 0x20, "Lit Until Collected") |
| 398 | | PORT_DIPNAME( 0x40, 0x00, "Playmate Keys") PORT_DIPLOCATION("SW2:!7") |
| 398 | PORT_DIPNAME( 0x40, 0x00, "Playmate Keys") PORT_DIPLOCATION("SW2:!7") |
| 399 | 399 | PORT_DIPSETTING( 0x00, "Reset At Next Ball") |
| 400 | 400 | PORT_DIPSETTING( 0x40, "Remembered Next Ball") |
| 401 | | PORT_DIPNAME( 0x80, 0x00, "25000 Outlanes") PORT_DIPLOCATION("SW2:!8") |
| 401 | PORT_DIPNAME( 0x80, 0x00, "25000 Outlanes") PORT_DIPLOCATION("SW2:!8") |
| 402 | 402 | PORT_DIPSETTING( 0x00, "Alternate") |
| 403 | 403 | PORT_DIPSETTING( 0x80, "Both") |
| 404 | 404 | |
| 405 | 405 | PORT_MODIFY("DSW3") |
| 406 | | PORT_DIPNAME( 0x10, 0x00, "2 and 3 Key Lanes") PORT_DIPLOCATION("SW3:!5") |
| 406 | PORT_DIPNAME( 0x10, 0x00, "2 and 3 Key Lanes") PORT_DIPLOCATION("SW3:!5") |
| 407 | 407 | PORT_DIPSETTING( 0x00, "Separate") |
| 408 | 408 | PORT_DIPSETTING( 0x10, "Tied Together") |
| 409 | | PORT_DIPNAME( 0x20, 0x00, "1 and 4 Key Lanes") PORT_DIPLOCATION("SW3:!6") |
| 409 | PORT_DIPNAME( 0x20, 0x00, "1 and 4 Key Lanes") PORT_DIPLOCATION("SW3:!6") |
| 410 | 410 | PORT_DIPSETTING( 0x00, "Separate") |
| 411 | 411 | PORT_DIPSETTING( 0x20, "Tied Together") |
| 412 | | PORT_DIPNAME( 0x40, 0x00, "Rollover Button Award") PORT_DIPLOCATION("SW3:!7") |
| 412 | PORT_DIPNAME( 0x40, 0x00, "Rollover Button Award") PORT_DIPLOCATION("SW3:!7") |
| 413 | 413 | PORT_DIPSETTING( 0x00, "Extra Ball or Special Reset At Next Ball") |
| 414 | 414 | PORT_DIPSETTING( 0x40, "Extra Ball or Special Held Until Collected") |
| 415 | 415 | |
| 416 | | PORT_MODIFY("X0") /* Drop Target switches */ |
| 416 | PORT_MODIFY("X0") /* Drop Target switches */ |
| 417 | 417 | PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by35_state, drop_target_x0, (void *)0x00) // PORT_CODE(KEYCODE_STOP) |
| 418 | 418 | PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by35_state, drop_target_x0, (void *)0x01) // PORT_CODE(KEYCODE_SLASH) |
| 419 | 419 | PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, by35_state, drop_target_x0, (void *)0x02) // PORT_CODE(KEYCODE_OPENBRACE) |
| r249940 | r249941 | |
|---|
| 463 | 463 | |
| 464 | 464 | switch (bit_shift) |
| 465 | 465 | { |
| 466 | | case 0: if (machine().input().code_pressed_once(KEYCODE_STOP)) |
| 466 | case 0: if (machine().input().code_pressed_once(KEYCODE_STOP)) |
| 467 | 467 | m_io_hold_x[port] |= (1 << bit_shift); |
| 468 | 468 | break; |
| 469 | | case 1: if (machine().input().code_pressed_once(KEYCODE_SLASH)) |
| 469 | case 1: if (machine().input().code_pressed_once(KEYCODE_SLASH)) |
| 470 | 470 | m_io_hold_x[port] |= (1 << bit_shift); |
| 471 | 471 | break; |
| 472 | | case 2: if (machine().input().code_pressed_once(KEYCODE_OPENBRACE)) |
| 472 | case 2: if (machine().input().code_pressed_once(KEYCODE_OPENBRACE)) |
| 473 | 473 | m_io_hold_x[port] |= (1 << bit_shift); |
| 474 | 474 | break; |
| 475 | | case 3: if (machine().input().code_pressed_once(KEYCODE_CLOSEBRACE)) |
| 475 | case 3: if (machine().input().code_pressed_once(KEYCODE_CLOSEBRACE)) |
| 476 | 476 | m_io_hold_x[port] |= (1 << bit_shift); |
| 477 | 477 | break; |
| 478 | | case 4: if (machine().input().code_pressed_once(KEYCODE_BACKSLASH)) |
| 478 | case 4: if (machine().input().code_pressed_once(KEYCODE_BACKSLASH)) |
| 479 | 479 | m_io_hold_x[port] |= (1 << bit_shift); |
| 480 | 480 | break; |
| 481 | 481 | } |
| r249940 | r249941 | |
|---|
| 514 | 514 | |
| 515 | 515 | WRITE_LINE_MEMBER( by35_state::u10_ca2_w ) |
| 516 | 516 | { |
| 517 | | #if 0 // Display Blanking - Out of sync with video redraw rate and causes flicker so it's disabled |
| 517 | #if 0 // Display Blanking - Out of sync with video redraw rate and causes flicker so it's disabled |
| 518 | 518 | if (state == 0) |
| 519 | 519 | { |
| 520 | 520 | int digit; |
| r249940 | r249941 | |
|---|
| 535 | 535 | |
| 536 | 536 | WRITE_LINE_MEMBER( by35_state::u10_cb2_w ) |
| 537 | 537 | { |
| 538 | | // logerror("New U10 CB2 state %01x, was %01x. PIA=%02x\n", state, m_u10_cb2, m_u10a); |
| 538 | // logerror("New U10 CB2 state %01x, was %01x. PIA=%02x\n", state, m_u10_cb2, m_u10a); |
| 539 | 539 | |
| 540 | 540 | if (state == TRUE) |
| 541 | 541 | m_lamp_decode = m_u10a & 0x0f; |
| r249940 | r249941 | |
|---|
| 574 | 574 | snd_sustain_timer->adjust(attotime::from_msec(5)); |
| 575 | 575 | m_timer_as2888 = true; |
| 576 | 576 | |
| 577 | | m_discrete->write(space, NODE_08, 11); // 11 volt pulse |
| 577 | m_discrete->write(space, NODE_08, 11); // 11 volt pulse |
| 578 | 578 | } |
| 579 | 579 | |
| 580 | 580 | m_u11_cb2 = state; |
| r249940 | r249941 | |
|---|
| 587 | 587 | |
| 588 | 588 | WRITE8_MEMBER( by35_state::u10_a_w ) |
| 589 | 589 | { |
| 590 | | // logerror("Writing %02x to U10 PIA, CB2 state is %01x, CA2 state is %01x, Lamp_Dec is %02x\n",data, m_u10_cb2, m_u10_ca2, (m_lamp_decode & 0x0f)); |
| 590 | // logerror("Writing %02x to U10 PIA, CB2 state is %01x, CA2 state is %01x, Lamp_Dec is %02x\n",data, m_u10_cb2, m_u10_ca2, (m_lamp_decode & 0x0f)); |
| 591 | 591 | |
| 592 | 592 | if (!m_u10_ca2) |
| 593 | 593 | { |
| 594 | | if (BIT(data, 0)==0) // Display 1 |
| 594 | if (BIT(data, 0)==0) // Display 1 |
| 595 | 595 | m_segment[1] = data>>4; |
| 596 | 596 | else |
| 597 | | if (BIT(data, 1)==0) // Display 2 |
| 597 | if (BIT(data, 1)==0) // Display 2 |
| 598 | 598 | m_segment[2] = data>>4; |
| 599 | 599 | else |
| 600 | | if (BIT(data, 2)==0) // Display 3 |
| 600 | if (BIT(data, 2)==0) // Display 3 |
| 601 | 601 | m_segment[3] = data>>4; |
| 602 | 602 | else |
| 603 | | if (BIT(data, 3)==0) // Display 4 |
| 603 | if (BIT(data, 3)==0) // Display 4 |
| 604 | 604 | m_segment[4] = data>>4; |
| 605 | 605 | } |
| 606 | 606 | |
| r249940 | r249941 | |
|---|
| 669 | 669 | |
| 670 | 670 | WRITE8_MEMBER( by35_state::u11_a_w ) |
| 671 | 671 | { |
| 672 | | if (BIT(data, 0)==0) // Display Credit/Ball |
| 672 | if (BIT(data, 0)==0) // Display Credit/Ball |
| 673 | 673 | { |
| 674 | 674 | m_segment[5] = m_u10a>>4; |
| 675 | 675 | } |
| r249940 | r249941 | |
|---|
| 695 | 695 | if BIT(data, 2) |
| 696 | 696 | m_digit = 6; |
| 697 | 697 | else |
| 698 | | if (BIT(data, 2) && BIT(data, 3)) // Aftermarket 7th digit strobe for 6 digit games |
| 698 | if (BIT(data, 2) && BIT(data, 3)) // Aftermarket 7th digit strobe for 6 digit games |
| 699 | 699 | m_digit = 7; |
| 700 | 700 | else |
| 701 | 701 | if (BIT(data, 1) && m_7d) |
| r249940 | r249941 | |
|---|
| 720 | 720 | { |
| 721 | 721 | if (!m_u11_cb2) |
| 722 | 722 | { |
| 723 | | if ((data & 0x0f) < 0x0f) // Momentary Solenoids |
| 723 | if ((data & 0x0f) < 0x0f) // Momentary Solenoids |
| 724 | 724 | { |
| 725 | | if (m_solenoid_features[(data & 0x0f)][0] != 0xff) { // Play solenoid audio sample |
| 725 | if (m_solenoid_features[(data & 0x0f)][0] != 0xff) { // Play solenoid audio sample |
| 726 | 726 | if (output_get_indexed_value("solenoid", (data & 0x0f)) == FALSE) |
| 727 | 727 | m_samples->start(m_solenoid_features[(data & 0x0f)][0], m_solenoid_features[(data & 0x0f)][1]); |
| 728 | 728 | } |
| 729 | 729 | |
| 730 | 730 | output_set_indexed_value( "solenoid", (data & 0x0f), TRUE); |
| 731 | 731 | |
| 732 | | if (m_solenoid_features[(data & 0x0f)][3]) // Reset/release relevant switch after firing Solenoid |
| 732 | if (m_solenoid_features[(data & 0x0f)][3]) // Reset/release relevant switch after firing Solenoid |
| 733 | 733 | m_io_hold_x[(m_solenoid_features[(data & 0x0f)][2])] &= (m_solenoid_features[(data & 0x0f)][3]); |
| 734 | 734 | } |
| 735 | | else // Rest output - all momentary solenoids are off |
| 735 | else // Rest output - all momentary solenoids are off |
| 736 | 736 | { |
| 737 | 737 | for (int i=0; i<15; i++) |
| 738 | 738 | { |
| r249940 | r249941 | |
|---|
| 756 | 756 | } |
| 757 | 757 | if ((m_u11b & 0x20) && ((data & 0x20)==0)) |
| 758 | 758 | { |
| 759 | | output_set_value("solenoid17", TRUE); // Coin Lockout Coil engage |
| 759 | output_set_value("solenoid17", TRUE); // Coin Lockout Coil engage |
| 760 | 760 | if (m_solenoid_features[17][0] != 0xff) |
| 761 | 761 | m_samples->start(m_solenoid_features[17][0], m_solenoid_features[17][1]); |
| 762 | 762 | } |
| 763 | 763 | else if ((data & 0x20) && ((m_u11b & 0x20)==0)) |
| 764 | 764 | { |
| 765 | | output_set_value("solenoid17", FALSE); // Coin Lockout Coil release |
| 765 | output_set_value("solenoid17", FALSE); // Coin Lockout Coil release |
| 766 | 766 | if (m_solenoid_features[17][0] != 0xff) |
| 767 | 767 | m_samples->start(m_solenoid_features[17][0], m_solenoid_features[17][2]); |
| 768 | 768 | } |
| 769 | 769 | if ((m_u11b & 0x40) && ((data & 0x40)==0)) |
| 770 | 770 | { |
| 771 | | output_set_value("solenoid18", TRUE); // Flipper Enable Relay engage |
| 771 | output_set_value("solenoid18", TRUE); // Flipper Enable Relay engage |
| 772 | 772 | if (m_solenoid_features[18][0] != 0xff) |
| 773 | 773 | m_samples->start(m_solenoid_features[18][0], m_solenoid_features[18][1]); |
| 774 | 774 | } |
| 775 | 775 | else if ((data & 0x40) && ((m_u11b & 0x40)==0)) |
| 776 | 776 | { |
| 777 | | output_set_value("solenoid18", FALSE); // Flipper Enable Relay release |
| 777 | output_set_value("solenoid18", FALSE); // Flipper Enable Relay release |
| 778 | 778 | if (m_solenoid_features[18][0] != 0xff) |
| 779 | 779 | m_samples->start(m_solenoid_features[18][0], m_solenoid_features[18][2]); |
| 780 | 780 | } |
| r249940 | r249941 | |
|---|
| 803 | 803 | // zero-cross detection |
| 804 | 804 | TIMER_DEVICE_CALLBACK_MEMBER( by35_state::timer_z_freq ) |
| 805 | 805 | { |
| 806 | | |
| 807 | 806 | /* Zero Crossing Detector - this timing is based on 50Hz AC line power input converted to unregulated DC |
| 808 | 807 | |
| 809 | | -+ +---+ |
| 808 | -+ +---+ |
| 810 | 809 | | | | |
| 811 | 810 | |<-------- 9.30ms -------->|<->|700us |
| 812 | 811 | | | | |
| 813 | | +--------------------------+ +----- |
| 812 | +--------------------------+ +----- |
| 814 | 813 | */ |
| 815 | 814 | |
| 816 | 815 | timer_device *zero_crossing_active_timer = machine().device<timer_device>("timer_z_pulse"); |
| r249940 | r249941 | |
|---|
| 839 | 838 | // 555 timer for display refresh |
| 840 | 839 | TIMER_DEVICE_CALLBACK_MEMBER( by35_state::u11_timer ) |
| 841 | 840 | { |
| 842 | | |
| 843 | 841 | /* +--------------------------+ +----- |
| 844 | 842 | | | | |
| 845 | 843 | |<-------- 2.85ms -------->|<->|300us |
| r249940 | r249941 | |
|---|
| 875 | 873 | m_discrete->write(space, NODE_04, ((m_snd_div & 0x04)>>2) * 1); |
| 876 | 874 | m_discrete->write(space, NODE_01, ((m_snd_div & 0x01)>>0) * 1); |
| 877 | 875 | |
| 878 | | // if (m_snd_sel == 0x01) logerror("SndSel=%02x, Tone=%02x, Div=%02x\n",m_snd_sel, m_snd_tone_gen, m_snd_div); |
| 876 | // if (m_snd_sel == 0x01) logerror("SndSel=%02x, Tone=%02x, Div=%02x\n",m_snd_sel, m_snd_tone_gen, m_snd_div); |
| 879 | 877 | } |
| 880 | 878 | } |
| 881 | 879 | |
| r249940 | r249941 | |
|---|
| 887 | 885 | if ((m_u11a & 0x02) == 0) offs |= 0x10; |
| 888 | 886 | { |
| 889 | 887 | m_snd_sel = m_snd_prom[offs]; |
| 890 | | // logerror("SndSel read %02x from PROM addr %02x\n",m_snd_sel, offs ); |
| 888 | // logerror("SndSel read %02x from PROM addr %02x\n",m_snd_sel, offs ); |
| 891 | 889 | m_snd_sel = BITSWAP8(m_snd_sel,0,1,2,3,4,5,6,7); |
| 892 | 890 | |
| 893 | 891 | m_snd_tone_gen = m_snd_sel; |
| 894 | | // logerror("SndSel=%02x, Tone=%02x, Div=%02x\n",m_snd_sel, m_snd_tone_gen, m_snd_div); |
| 892 | // logerror("SndSel=%02x, Tone=%02x, Div=%02x\n",m_snd_sel, m_snd_tone_gen, m_snd_div); |
| 895 | 893 | } |
| 896 | 894 | |
| 897 | 895 | m_discrete->write(space, NODE_08, 0); |
| r249940 | r249941 | |
|---|
| 905 | 903 | |
| 906 | 904 | DRIVER_INIT_MEMBER( by35_state, by35_6 ) |
| 907 | 905 | { |
| 908 | | |
| 909 | 906 | static const UINT8 solenoid_features_default[20][4] = |
| 910 | 907 | { |
| 911 | 908 | // This table serves two functions and is configured on a per game basis: |
| r249940 | r249941 | |
|---|
| 918 | 915 | /*02*/ { 0x00, 0x00, 0x00, 0x00 }, |
| 919 | 916 | /*03*/ { 0x00, 0x00, 0x00, 0x00 }, |
| 920 | 917 | /*04*/ { 0x00, 0x00, 0x00, 0x00 }, |
| 921 | | /*05*/ { 0x04, 0x06, 0x00, 0x00 }, // Knocker |
| 922 | | /*06*/ { 0x01, 0x09, 0x00, 0x7f }, // Outhole |
| 918 | /*05*/ { 0x04, 0x06, 0x00, 0x00 }, // Knocker |
| 919 | /*06*/ { 0x01, 0x09, 0x00, 0x7f }, // Outhole |
| 923 | 920 | /*07*/ { 0x00, 0x0a, 0x00, 0x00 }, |
| 924 | 921 | /*08*/ { 0x02, 0x00, 0x00, 0x00 }, |
| 925 | 922 | /*09*/ { 0x02, 0x00, 0x00, 0x00 }, |
| r249940 | r249941 | |
|---|
| 928 | 925 | /*12*/ { 0x00, 0x0b, 0x00, 0x00 }, |
| 929 | 926 | /*13*/ { 0x02, 0x07, 0x00, 0x00 }, |
| 930 | 927 | /*14*/ { 0x00, 0x00, 0x00, 0x00 }, |
| 931 | | /*15*/ { 0xff, 0xff, 0x00, 0x00 }, // None - all momentary solenoids off |
| 928 | /*15*/ { 0xff, 0xff, 0x00, 0x00 }, // None - all momentary solenoids off |
| 932 | 929 | // { Sound Channel, Sound engage, Sound release, Not Used } |
| 933 | 930 | /*16*/ { 0xff, 0xff, 0xff, 0x00 }, |
| 934 | | /*17*/ { 0x00, 0x0c, 0x0d, 0x00 }, // Coin Lockout coil |
| 935 | | /*18*/ { 0x00, 0x0e, 0x0f, 0x00 }, // Flipper enable relay |
| 931 | /*17*/ { 0x00, 0x0c, 0x0d, 0x00 }, // Coin Lockout coil |
| 932 | /*18*/ { 0x00, 0x0e, 0x0f, 0x00 }, // Flipper enable relay |
| 936 | 933 | /*19*/ { 0xff, 0xff, 0xff, 0x00 } |
| 937 | 934 | }; |
| 938 | 935 | |
| r249940 | r249941 | |
|---|
| 949 | 946 | |
| 950 | 947 | DRIVER_INIT_MEMBER( by35_state, playboy ) |
| 951 | 948 | { |
| 952 | | |
| 953 | 949 | static const UINT8 solenoid_features_playboy[20][4] = |
| 954 | 950 | { |
| 955 | 951 | // { Sound Channel, Sound Sample, Switch Strobe, Switch Return Mask } |
| r249940 | r249941 | |
|---|
| 958 | 954 | /*02*/ { 0xff, 0xff, 0x00, 0x00 }, |
| 959 | 955 | /*03*/ { 0xff, 0xff, 0x00, 0x00 }, |
| 960 | 956 | /*04*/ { 0xff, 0xff, 0x00, 0x00 }, |
| 961 | | /*05*/ { 0x04, 0x06, 0x00, 0x00 }, // Knocker |
| 962 | | /*06*/ { 0x01, 0x09, 0x00, 0x7f }, // Outhole |
| 963 | | /*07*/ { 0x02, 0x0a, 0x03, 0x7f }, // Kickback Grotto |
| 964 | | /*08*/ { 0x02, 0x00, 0x00, 0x00 }, // Pop Bumper Left |
| 965 | | /*09*/ { 0x02, 0x00, 0x00, 0x00 }, // Pop Bumper Right |
| 966 | | /*10*/ { 0x02, 0x00, 0x00, 0x00 }, // Pop Bumper Bottom |
| 967 | | /*11*/ { 0x02, 0x07, 0x00, 0x00 }, // Slingshot Left |
| 968 | | /*12*/ { 0x03, 0x0b, 0x00, 0xe0 }, // Drop Target Reset |
| 969 | | /*13*/ { 0x02, 0x07, 0x00, 0x00 }, // Slingshot Right |
| 957 | /*05*/ { 0x04, 0x06, 0x00, 0x00 }, // Knocker |
| 958 | /*06*/ { 0x01, 0x09, 0x00, 0x7f }, // Outhole |
| 959 | /*07*/ { 0x02, 0x0a, 0x03, 0x7f }, // Kickback Grotto |
| 960 | /*08*/ { 0x02, 0x00, 0x00, 0x00 }, // Pop Bumper Left |
| 961 | /*09*/ { 0x02, 0x00, 0x00, 0x00 }, // Pop Bumper Right |
| 962 | /*10*/ { 0x02, 0x00, 0x00, 0x00 }, // Pop Bumper Bottom |
| 963 | /*11*/ { 0x02, 0x07, 0x00, 0x00 }, // Slingshot Left |
| 964 | /*12*/ { 0x03, 0x0b, 0x00, 0xe0 }, // Drop Target Reset |
| 965 | /*13*/ { 0x02, 0x07, 0x00, 0x00 }, // Slingshot Right |
| 970 | 966 | /*14*/ { 0xff, 0xff, 0x00, 0x00 }, |
| 971 | | /*15*/ { 0xff, 0xff, 0x00, 0x00 }, // None - all momentary solenoids off |
| 967 | /*15*/ { 0xff, 0xff, 0x00, 0x00 }, // None - all momentary solenoids off |
| 972 | 968 | // { Sound Channel, Sound engage, Sound release, Not Used } |
| 973 | 969 | /*16*/ { 0xff, 0xff, 0xff, 0x00 }, |
| 974 | | /*17*/ { 0x00, 0x0c, 0x0d, 0x00 }, // Coin Lockout coil |
| 975 | | /*18*/ { 0x00, 0x0e, 0x0f, 0x00 }, // Flipper enable relay |
| 970 | /*17*/ { 0x00, 0x0c, 0x0d, 0x00 }, // Coin Lockout coil |
| 971 | /*18*/ { 0x00, 0x0e, 0x0f, 0x00 }, // Flipper enable relay |
| 976 | 972 | /*19*/ { 0xff, 0xff, 0xff, 0x00 } |
| 977 | 973 | }; |
| 978 | 974 | |
| r249940 | r249941 | |
|---|
| 1009 | 1005 | m_u11a = 0; |
| 1010 | 1006 | m_u11b = 0; |
| 1011 | 1007 | m_lamp_decode = 0x0f; |
| 1012 | | m_io_hold_x[0] = 0x80; // Put ball in Outhole on startup |
| 1008 | m_io_hold_x[0] = 0x80; // Put ball in Outhole on startup |
| 1013 | 1009 | m_io_hold_x[1] = m_io_hold_x[2] = m_io_hold_x[3] = m_io_hold_x[4] = m_io_hold_x[5] = 0; |
| 1014 | 1010 | } |
| 1015 | 1011 | |
| r249940 | r249941 | |
|---|
| 1026 | 1022 | {0, 0, 0, 0}, /* r_node */ |
| 1027 | 1023 | {0, 0}, /* c{} */ |
| 1028 | 1024 | 0, /* rI */ |
| 1029 | | // RES_VOLTAGE_DIVIDER(RES_K(10), RES_R(360)), /* rF */ |
| 1025 | // RES_VOLTAGE_DIVIDER(RES_K(10), RES_R(360)), /* rF */ |
| 1030 | 1026 | RES_K(10), /* rF */ // not really |
| 1031 | 1027 | CAP_U(0.01), /* cF */ |
| 1032 | 1028 | 0, /* cAmp */ |
| r249940 | r249941 | |
|---|
| 1048 | 1044 | |
| 1049 | 1045 | static DISCRETE_SOUND_START(as2888) |
| 1050 | 1046 | |
| 1051 | | DISCRETE_INPUT_DATA(NODE_08) // Start Sustain Attenuation from 555 circuit |
| 1052 | | DISCRETE_INPUT_LOGIC(NODE_01) // Binary Counter B output (divide by 1) T2 |
| 1053 | | DISCRETE_INPUT_LOGIC(NODE_04) // Binary Counter D output (divide by 4) T3 |
| 1047 | DISCRETE_INPUT_DATA(NODE_08) // Start Sustain Attenuation from 555 circuit |
| 1048 | DISCRETE_INPUT_LOGIC(NODE_01) // Binary Counter B output (divide by 1) T2 |
| 1049 | DISCRETE_INPUT_LOGIC(NODE_04) // Binary Counter D output (divide by 4) T3 |
| 1054 | 1050 | |
| 1055 | | DISCRETE_DIVIDE(NODE_11, 1, NODE_01, 1) // 2 |
| 1051 | DISCRETE_DIVIDE(NODE_11, 1, NODE_01, 1) // 2 |
| 1056 | 1052 | DISCRETE_DIVIDE(NODE_14, 1, NODE_04, 1) |
| 1057 | 1053 | |
| 1058 | 1054 | |
| 1059 | | DISCRETE_RCFILTER(NODE_06, NODE_14, RES_K(15), CAP_U(0.1)) // T4 filter |
| 1055 | DISCRETE_RCFILTER(NODE_06, NODE_14, RES_K(15), CAP_U(0.1)) // T4 filter |
| 1060 | 1056 | #if 0 |
| 1061 | | DISCRETE_RCFILTER(NODE_05, NODE_11, RES_K(33), CAP_U(0.01)) // T1 filter |
| 1057 | DISCRETE_RCFILTER(NODE_05, NODE_11, RES_K(33), CAP_U(0.01)) // T1 filter |
| 1062 | 1058 | DISCRETE_ADDER2(NODE_07, 1, NODE_05, NODE_06) |
| 1063 | 1059 | #else |
| 1064 | 1060 | |
| 1065 | | DISCRETE_MIXER2(NODE_07, 1, NODE_11, NODE_06, &as2888_digital_mixer_info) // Mix and filter T1 and T4 together |
| 1061 | DISCRETE_MIXER2(NODE_07, 1, NODE_11, NODE_06, &as2888_digital_mixer_info) // Mix and filter T1 and T4 together |
| 1066 | 1062 | #endif |
| 1067 | 1063 | DISCRETE_RCDISC5(NODE_87, 1, NODE_08, RES_K(150), CAP_U(1.0)) |
| 1068 | 1064 | |
| 1069 | 1065 | DISCRETE_RCFILTER_VREF(NODE_88,NODE_87,RES_M(1),CAP_U(0.01),2) |
| 1070 | | DISCRETE_MULTIPLY(NODE_09, NODE_07, NODE_88) // Apply sustain |
| 1066 | DISCRETE_MULTIPLY(NODE_09, NODE_07, NODE_88) // Apply sustain |
| 1071 | 1067 | |
| 1072 | 1068 | DISCRETE_OP_AMP_FILTER(NODE_20, 1, NODE_09, 0, DISC_OP_AMP_FILTER_IS_HIGH_PASS_1, &as2888_preamp_info) |
| 1073 | 1069 | |
| 1074 | | DISCRETE_CRFILTER(NODE_25, NODE_20, RES_M(100), CAP_U(0.05)) // Resistor is fake. Capacitor in series between pre-amp and output amp. |
| 1070 | DISCRETE_CRFILTER(NODE_25, NODE_20, RES_M(100), CAP_U(0.05)) // Resistor is fake. Capacitor in series between pre-amp and output amp. |
| 1075 | 1071 | |
| 1076 | | DISCRETE_GAIN(NODE_30, NODE_25, 50) // Output amplifier LM380 fixed inbuilt gain of 50 |
| 1072 | DISCRETE_GAIN(NODE_30, NODE_25, 50) // Output amplifier LM380 fixed inbuilt gain of 50 |
| 1077 | 1073 | |
| 1078 | 1074 | DISCRETE_OUTPUT(NODE_30, 10000000) // 17000000 |
| 1079 | 1075 | DISCRETE_SOUND_END |
| r249940 | r249941 | |
|---|
| 1087 | 1083 | |
| 1088 | 1084 | MCFG_MACHINE_RESET_OVERRIDE( by35_state, by35 ) |
| 1089 | 1085 | |
| 1090 | | MCFG_NVRAM_ADD_0FILL("nvram") // 'F' filled causes Credit Display to be blank on first startup |
| 1086 | MCFG_NVRAM_ADD_0FILL("nvram") // 'F' filled causes Credit Display to be blank on first startup |
| 1091 | 1087 | |
| 1092 | 1088 | /* Video */ |
| 1093 | 1089 | MCFG_DEFAULT_LAYOUT(layout_by35) |
| r249940 | r249941 | |
|---|
| 2127 | 2123 | / 301/Bulls Eye |
| 2128 | 2124 | /-------------------------------*/ |
| 2129 | 2125 | ROM_START(bullseye) |
| 2130 | | ROM_REGION(0x8000, "maincpu", 0) // Actually seems to have an address mask of 0x3fff |
| 2126 | ROM_REGION(0x8000, "maincpu", 0) // Actually seems to have an address mask of 0x3fff |
| 2131 | 2127 | ROM_LOAD("bull.u2", 0x2000, 0x1000, CRC(a2951aa2) SHA1(f9c0826c5d1d6d904286678ed90de3850a13b5f4)) |
| 2132 | 2128 | ROM_LOAD("bull.u6", 0x3000, 0x1000, CRC(64d4b9c4) SHA1(bf4d0671372fd3a445c4c7330b9849171ca8048c)) |
| 2133 | 2129 | ROM_RELOAD( 0x7000, 0x1000) |
trunk/src/mame/drivers/m72.c
| r249940 | r249941 | |
|---|
| 13 | 13 | |
| 14 | 14 | M72-B-D (bottom) / M72-A-C (middle) / M72-ROM-C (top) |
| 15 | 15 | |
| 16 | | This is the original hardware used by R-type |
| 16 | This is the original hardware used by R-type |
| 17 | 17 | Z80 program uploaded to RAM rather than having a ROM |
| 18 | 18 | each of the 2 tile layers uses it's own set of ROMs. |
| 19 | | Flip bits are with the tile num, so 0x3fff max tiles |
| 20 | | per layer |
| 19 | Flip bits are with the tile num, so 0x3fff max tiles |
| 20 | per layer |
| 21 | 21 | |
| 22 | | M72-B-D (bottom) / M72-A-C (middle) / M72-C-A (top) |
| 22 | M72-B-D (bottom) / M72-A-C (middle) / M72-C-A (top) |
| 23 | 23 | |
| 24 | | This is used by all other M72 games, adds support |
| 25 | | for an I8751 MCU and sample playback |
| 24 | This is used by all other M72 games, adds support |
| 25 | for an I8751 MCU and sample playback |
| 26 | 26 | |
| 27 | 27 | |
| 28 | 28 | M81 - 2 PCB Stack |
| 29 | 29 | |
| 30 | | M81-A-B (top board) (seen on Dragon Breed) |
| 31 | | CPUs, program roms etc. |
| 30 | M81-A-B (top board) (seen on Dragon Breed) |
| 31 | CPUs, program roms etc. |
| 32 | 32 | |
| 33 | | M81-B-B (bottom board) (seen on Dragon Breed) |
| 34 | | supports |
| 35 | | 8 sprite ROMS |
| 36 | | 4 tile roms for FG layer (A0-A3) |
| 37 | | (Jumper J3 also allows them to be used for BG) |
| 38 | | 4 tile roms for BG layer (B0-B3) |
| 33 | M81-B-B (bottom board) (seen on Dragon Breed) |
| 34 | supports |
| 35 | 8 sprite ROMS |
| 36 | 4 tile roms for FG layer (A0-A3) |
| 37 | (Jumper J3 also allows them to be used for BG) |
| 38 | 4 tile roms for BG layer (B0-B3) |
| 39 | 39 | |
| 40 | | The Jumper at J3 seems to be an important difference |
| 41 | | from M72, it allows both the FG and BG layers to |
| 42 | | operate from a single set of ROMs. |
| 43 | | W - use both sets of ROMs |
| 44 | | S - use a single set of ROMs (A0-A3) |
| 40 | The Jumper at J3 seems to be an important difference |
| 41 | from M72, it allows both the FG and BG layers to |
| 42 | operate from a single set of ROMs. |
| 43 | W - use both sets of ROMs |
| 44 | S - use a single set of ROMs (A0-A3) |
| 45 | 45 | |
| 46 | 46 | |
| 47 | | revised hardware, Z80 uses a ROM, no MCU, same video |
| 47 | revised hardware, Z80 uses a ROM, no MCU, same video |
| 48 | 48 | system as M72 (some layer offsets - why?) |
| 49 | 49 | |
| 50 | 50 | |
| 51 | 51 | M82 - board made for Major Title, Z80 has a rom, no MCU |
| 52 | 52 | has an extra sprite layer, rowscroll, and a larger |
| 53 | | tilemap. Tile data from both tile layers now comes |
| 54 | | from a single set of ROMs, flip bits moved to 2nd |
| 55 | | word meaning max of 0xffff tiles. |
| 53 | tilemap. Tile data from both tile layers now comes |
| 54 | from a single set of ROMs, flip bits moved to 2nd |
| 55 | word meaning max of 0xffff tiles. |
| 56 | 56 | |
| 57 | | * Some games were converted to run on this board, |
| 58 | | leaving the extra sprite HW unused. |
| 57 | * Some games were converted to run on this board, |
| 58 | leaving the extra sprite HW unused. |
| 59 | 59 | |
| 60 | 60 | M84 - 2 PCB stack |
| 61 | 61 | functionally same as M82 but without the extra sprite hw?? |
| 62 | | |
| 63 | | M84-A-A (bottom board) (most games) |
| 64 | | supports |
| 65 | | 4 program roms |
| 66 | | 8 tile roms |
| 67 | | 1 snd prg, 1 voice rom |
| 68 | | CPUs and some customs etc. |
| 69 | 62 | |
| 70 | | M84-D-B (bottom board) (found on lightning swords / kengo) |
| 71 | | redesigned version of above but |
| 72 | | for V35 CPU? (seems to lack the UPD71059C interrupt |
| 73 | | controller which isn't needed when with the V35) |
| 63 | M84-A-A (bottom board) (most games) |
| 64 | supports |
| 65 | 4 program roms |
| 66 | 8 tile roms |
| 67 | 1 snd prg, 1 voice rom |
| 68 | CPUs and some customs etc. |
| 74 | 69 | |
| 75 | | M84-C-A (top board) (listed as for Hammering Harry) |
| 76 | | 4 sprite roms (in a row) |
| 77 | | 6 larger chips with detail removed |
| 78 | | etc. |
| 70 | M84-D-B (bottom board) (found on lightning swords / kengo) |
| 71 | redesigned version of above but |
| 72 | for V35 CPU? (seems to lack the UPD71059C interrupt |
| 73 | controller which isn't needed when with the V35) |
| 79 | 74 | |
| 80 | | M84-B-A (top board) (found on rytpe 2) |
| 81 | | M84-B-B (top board) (lightning swords / kengo) |
| 82 | | these both look very similar, if not the same |
| 75 | M84-C-A (top board) (listed as for Hammering Harry) |
| 76 | 4 sprite roms (in a row) |
| 77 | 6 larger chips with detail removed |
| 78 | etc. |
| 83 | 79 | |
| 84 | | 4 sprite roms (in a square) |
| 85 | | various NANAO marked customs |
| 86 | | KNA70H016(12) NANAO 0201 |
| 87 | | KNA65005 17 NANAO 9048KS |
| 88 | | KNA71H010(15) NANAO 0X2002 |
| 89 | | KNA72H010(14) NANAO 0Z2001 |
| 90 | | KNA71H009(13) NANAO 122001 |
| 91 | | KNA70H015(11) NANAO 092002 |
| 92 | | KNA91H014 NANAO 0Z2001V |
| 93 | | etc. |
| 80 | M84-B-A (top board) (found on rytpe 2) |
| 81 | M84-B-B (top board) (lightning swords / kengo) |
| 82 | these both look very similar, if not the same |
| 94 | 83 | |
| 84 | 4 sprite roms (in a square) |
| 85 | various NANAO marked customs |
| 86 | KNA70H016(12) NANAO 0201 |
| 87 | KNA65005 17 NANAO 9048KS |
| 88 | KNA71H010(15) NANAO 0X2002 |
| 89 | KNA72H010(14) NANAO 0Z2001 |
| 90 | KNA71H009(13) NANAO 122001 |
| 91 | KNA70H015(11) NANAO 092002 |
| 92 | KNA91H014 NANAO 0Z2001V |
| 93 | etc. |
| 95 | 94 | |
| 96 | 95 | |
| 96 | |
| 97 | 97 | M85 - Pound for Pound uses this, possibly just M84 with |
| 98 | 98 | a modified sound section? |
| 99 | | - most Jamma inputs not connected, trackball only |
| 99 | - most Jamma inputs not connected, trackball only |
| 100 | 100 | |
| 101 | 101 | |
| 102 | 102 | Year Board Protected? |
| r249940 | r249941 | |
|---|
| 147 | 147 | |
| 148 | 148 | IRQ controller |
| 149 | 149 | -------------- |
| 150 | | The IRQ controller is a UPD71059C |
| 150 | The IRQ controller is a UPD71059C |
| 151 | 151 | |
| 152 | 152 | The initialization consists of one write to port 0x40 and multiple writes |
| 153 | 153 | (2 or 3) to port 0x42. The first value written to 0x42 is the IRQ vector base. |
| r249940 | r249941 | |
|---|
| 212 | 212 | #define M72_TRIGGER_IRQ3 m_maincpu->set_input_line_and_vector(0, HOLD_LINE, m_upd71059c->HACK_get_base_vector()+3 ); /* Sound cpu->Main cpu interrupt */ |
| 213 | 213 | // not used due to HOLD LINE logic |
| 214 | 214 | #define M72_CLEAR_IRQ0 ; |
| 215 | | #define M72_CLEAR_IRQ1 ; |
| 215 | #define M72_CLEAR_IRQ1 ; |
| 216 | 216 | #define M72_CLEAR_IRQ2 ; |
| 217 | 217 | #define M72_CLEAR_IRQ3 ; |
| 218 | 218 | |
| 219 | 219 | #else |
| 220 | 220 | |
| 221 | | #define M72_TRIGGER_IRQ0 m_upd71059c->ir0_w(1); |
| 222 | | #define M72_TRIGGER_IRQ1 m_upd71059c->ir1_w(1); |
| 223 | | #define M72_TRIGGER_IRQ2 m_upd71059c->ir2_w(1); |
| 224 | | #define M72_TRIGGER_IRQ3 m_upd71059c->ir3_w(1); |
| 221 | #define M72_TRIGGER_IRQ0 m_upd71059c->ir0_w(1); |
| 222 | #define M72_TRIGGER_IRQ1 m_upd71059c->ir1_w(1); |
| 223 | #define M72_TRIGGER_IRQ2 m_upd71059c->ir2_w(1); |
| 224 | #define M72_TRIGGER_IRQ3 m_upd71059c->ir3_w(1); |
| 225 | 225 | // not sure when these should happen, probably the source of our issues |
| 226 | | #define M72_CLEAR_IRQ0 m_upd71059c->ir0_w(0); |
| 227 | | #define M72_CLEAR_IRQ1 m_upd71059c->ir1_w(0); |
| 228 | | #define M72_CLEAR_IRQ2 m_upd71059c->ir2_w(0); |
| 229 | | #define M72_CLEAR_IRQ3 m_upd71059c->ir3_w(0); |
| 226 | #define M72_CLEAR_IRQ0 m_upd71059c->ir0_w(0); |
| 227 | #define M72_CLEAR_IRQ1 m_upd71059c->ir1_w(0); |
| 228 | #define M72_CLEAR_IRQ2 m_upd71059c->ir2_w(0); |
| 229 | #define M72_CLEAR_IRQ3 m_upd71059c->ir3_w(0); |
| 230 | 230 | |
| 231 | 231 | #endif |
| 232 | 232 | |
| r249940 | r249941 | |
|---|
| 957 | 957 | AM_RANGE(0xd0000, 0xd3fff) AM_RAM_WRITE(videoram1_w) AM_SHARE("videoram1") \ |
| 958 | 958 | AM_RANGE(0xd8000, 0xdbfff) AM_RAM_WRITE(videoram2_w) AM_SHARE("videoram2") \ |
| 959 | 959 | AM_RANGE(0xffff0, 0xfffff) AM_ROM \ |
| 960 | | ADDRESS_MAP_END \ |
| 961 | | |
| 960 | ADDRESS_MAP_END |
| 962 | 961 | /* WORKRAM */ |
| 963 | 962 | M81_CPU1_MEMORY( xmultipl, 0x9c000 ) |
| 964 | 963 | M81_CPU1_MEMORY( dbreed, 0x88000 ) |
| r249940 | r249941 | |
|---|
| 979 | 978 | AM_RANGE(PALETTERAM2, PALETTERAM2+0xbff) AM_READWRITE(palette2_r, palette2_w) AM_SHARE("paletteram2") \ |
| 980 | 979 | AM_RANGE(0xe0000, 0xe3fff) AM_RAM /* work RAM */ \ |
| 981 | 980 | AM_RANGE(0xffff0, 0xfffff) AM_ROM \ |
| 982 | | ADDRESS_MAP_END \ |
| 983 | | |
| 981 | ADDRESS_MAP_END |
| 984 | 982 | M84_CPU1_MEMORY( rtype2, 0xd0000, 0xc8000, 0xd8000 ) |
| 985 | 983 | M84_CPU1_MEMORY( hharryu, 0xd0000, 0xa0000, 0xa8000 ) |
| 986 | 984 | M84_CPU1_MEMORY( kengo, 0x80000, 0xa0000, 0xa8000 ) |
| r249940 | r249941 | |
|---|
| 1988 | 1986 | |
| 1989 | 1987 | MCFG_VIDEO_START_OVERRIDE(m72_state,xmultipl) // different offsets |
| 1990 | 1988 | MACHINE_CONFIG_END |
| 1991 | | |
| 1989 | |
| 1992 | 1990 | static MACHINE_CONFIG_DERIVED( m81_dbreed, m81_xmultipl ) |
| 1993 | 1991 | MCFG_CPU_MODIFY("maincpu") |
| 1994 | 1992 | MCFG_CPU_PROGRAM_MAP(dbreed_map) |
| r249940 | r249941 | |
|---|
| 2049 | 2047 | MCFG_CPU_PROGRAM_MAP(kengo_map) |
| 2050 | 2048 | MCFG_CPU_IO_MAP(m84_v33_portmap) |
| 2051 | 2049 | //#ifndef USE_HACKED_IRQS |
| 2052 | | // MCFG_CPU_IRQ_ACKNOWLEDGE_DEVICE("upd71059c", pic8259_device, inta_cb) |
| 2050 | // MCFG_CPU_IRQ_ACKNOWLEDGE_DEVICE("upd71059c", pic8259_device, inta_cb) |
| 2053 | 2051 | //#endif |
| 2054 | 2052 | |
| 2055 | 2053 | MCFG_CPU_ADD("soundcpu", Z80, SOUND_CLOCK) |
| r249940 | r249941 | |
|---|
| 2058 | 2056 | MCFG_CPU_PERIODIC_INT_DRIVER(m72_state, nmi_line_pulse, 128*55) /* clocked by V1? (Vigilante) */ |
| 2059 | 2057 | /* IRQs are generated by main Z80 and YM2151 */ |
| 2060 | 2058 | |
| 2061 | | // MCFG_PIC8259_ADD( "upd71059c", INPUTLINE("maincpu", 0), VCC, NULL) |
| 2062 | | |
| 2059 | // MCFG_PIC8259_ADD( "upd71059c", INPUTLINE("maincpu", 0), VCC, NULL) |
| 2060 | |
| 2063 | 2061 | MCFG_MACHINE_START_OVERRIDE(m72_state,kengo) |
| 2064 | 2062 | MCFG_MACHINE_RESET_OVERRIDE(m72_state,kengo) |
| 2065 | 2063 | |
| r249940 | r249941 | |
|---|
| 2085 | 2083 | |
| 2086 | 2084 | /****************************************** M82 ***********************************************/ |
| 2087 | 2085 | |
| 2088 | | /* Major Title uses |
| 2086 | /* Major Title uses |
| 2089 | 2087 | |
| 2090 | 2088 | M82-A-A as the top board |
| 2091 | 2089 | M82-B-A and as the bottom board |
| r249940 | r249941 | |
|---|
| 2123 | 2121 | MACHINE_CONFIG_END |
| 2124 | 2122 | |
| 2125 | 2123 | |
| 2126 | | /* Pound for Pound uses |
| 2124 | /* Pound for Pound uses |
| 2127 | 2125 | M85-A-B / M85-B |
| 2128 | 2126 | */ |
| 2129 | 2127 | |
| r249940 | r249941 | |
|---|
| 2143 | 2141 | /* IRQs are generated by main Z80 and YM2151 */ |
| 2144 | 2142 | |
| 2145 | 2143 | MCFG_PIC8259_ADD( "upd71059c", INPUTLINE("maincpu", 0), VCC, NULL) |
| 2146 | | |
| 2144 | |
| 2147 | 2145 | /* video hardware */ |
| 2148 | 2146 | MCFG_GFXDECODE_ADD("gfxdecode", "palette", rtype2) |
| 2149 | 2147 | MCFG_PALETTE_ADD("palette", 512) |
| r249940 | r249941 | |
|---|
| 3474 | 3472 | |
| 3475 | 3473 | ROM_REGION( 0x0200, "proms", 0 ) /* located on M84-B-A */ |
| 3476 | 3474 | ROM_LOAD( "rt2_b-4n-.bin", 0x0000, 0x0100, CRC(b460c438) SHA1(00e20cf754b6fd5138ee4d2f6ec28dff9e292fe6) ) |
| 3477 | | ROM_LOAD( "rt2_b-4p-.bin", 0x0100, 0x0100, CRC(a4f2c4bc) SHA1(f13b0a4b52dcc6704063b676f09d83dcba170133) ) |
| 3475 | ROM_LOAD( "rt2_b-4p-.bin", 0x0100, 0x0100, CRC(a4f2c4bc) SHA1(f13b0a4b52dcc6704063b676f09d83dcba170133) ) |
| 3478 | 3476 | ROM_END |
| 3479 | 3477 | |
| 3480 | 3478 | ROM_START( rtype2jc ) |
| r249940 | r249941 | |
|---|
| 3677 | 3675 | |
| 3678 | 3676 | ROM_REGION( 0x0200, "proms", 0 ) /* located on M84-B-B */ |
| 3679 | 3677 | ROM_LOAD( "KEN_B-4N-.IC23", 0x0000, 0x0100, CRC(b460c438) SHA1(00e20cf754b6fd5138ee4d2f6ec28dff9e292fe6) ) |
| 3680 | | ROM_LOAD( "KEN_B-4P-.IC24", 0x0100, 0x0100, CRC(526f10ca) SHA1(e0ecd4db0720a4a37489e4d725843a2fbf266ebf) ) // differs from rtype 2 / ninja spirit |
| 3678 | ROM_LOAD( "KEN_B-4P-.IC24", 0x0100, 0x0100, CRC(526f10ca) SHA1(e0ecd4db0720a4a37489e4d725843a2fbf266ebf) ) // differs from rtype 2 / ninja spirit |
| 3681 | 3679 | ROM_END |
| 3682 | 3680 | |
| 3683 | 3681 | |
trunk/src/mame/drivers/pgm.c
| r249940 | r249941 | |
|---|
| 3904 | 3904 | ROM_REGION( 0x600000, "maincpu", 0 ) /* 68000 Code */ |
| 3905 | 3905 | /* doesn't use a separate BIOS rom */ |
| 3906 | 3906 | ROM_LOAD16_WORD_SWAP( "ketsui_v100.u38", 0x000000, 0x200000, CRC(dfe62f3b) SHA1(baa58d1ce47a707f84f65779ac0689894793e9d9) ) |
| 3907 | | // an alt version of this rom exists with 0xff fill in the unused area after 0x1443bc rather than random data like the one above, there are no code changes. |
| 3908 | | //ROM_LOAD16_WORD_SWAP( "ketsui_v100.u38", 0x000000, 0x200000, CRC(e140f8a4) SHA1(34fd25f8896935503d7537e89a4cd174e8995070) ) |
| 3909 | 3907 | |
| 3910 | 3908 | ROM_REGION( 0x4000, "prot", 0 ) /* ARM protection ASIC - internal rom */ |
| 3911 | 3909 | ROM_LOAD( "ket_igs027a.bin", 0x000000, 0x04000, NO_DUMP ) |
| r249940 | r249941 | |
|---|
| 3929 | 3927 | ROM_LOAD( "ket_defaults.nv", 0x0000000, 0x020000, CRC(3ca892d8) SHA1(67430df5217e453ae8140c5653deeadfad8fa684) ) |
| 3930 | 3928 | ROM_END |
| 3931 | 3929 | |
| 3930 | ROM_START( ket1 ) // only difference between this and ket1 is the rom fill on the unused area |
| 3931 | ROM_REGION( 0x600000, "maincpu", 0 ) /* 68000 Code */ |
| 3932 | /* doesn't use a separate BIOS rom */ |
| 3933 | ROM_LOAD16_WORD_SWAP( "ketsui_v100_alt_fill.u38", 0x000000, 0x200000, CRC(e140f8a4) SHA1(34fd25f8896935503d7537e89a4cd174e8995070) ) |
| 3934 | |
| 3935 | ROM_REGION( 0x4000, "prot", 0 ) /* ARM protection ASIC - internal rom */ |
| 3936 | ROM_LOAD( "ket_igs027a.bin", 0x000000, 0x04000, NO_DUMP ) |
| 3937 | |
| 3938 | ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */ |
| 3939 | ROM_LOAD( "pgm_t01s.rom", 0x000000, 0x200000, CRC(1a7123a0) SHA1(cc567f577bfbf45427b54d6695b11b74f2578af3) ) // same as standard PGM text bios - surface scratched to remove details |
| 3940 | ROM_LOAD( "t04701w064.u19", 0x180000, 0x800000, CRC(2665b041) SHA1(fb1107778b66f2af0de77ac82e1ee2902f53a959) ) //text-1 |
| 3941 | |
| 3942 | ROM_REGION( 0x1000000, "sprcol", 0 ) /* Sprite Colour Data */ |
| 3943 | ROM_LOAD( "a04701w064.u7", 0x0000000, 0x0800000, CRC(5ef1b94b) SHA1(f10dfa46e0a4d297c3a856aea5b49d648f98935c) ) //image-1 |
| 3944 | ROM_LOAD( "a04702w064.u8", 0x0800000, 0x0800000, CRC(26d6da7f) SHA1(f20e07a7994f41b5ed917f8b0119dc5542f3541c) ) //image-2 |
| 3945 | |
| 3946 | ROM_REGION( 0x0800000, "sprmask", 0 ) /* Sprite Masks + Colour Indexes */ |
| 3947 | ROM_LOAD( "b04701w064.u1", 0x0000000, 0x0800000, CRC(1bec008d) SHA1(07d117dc2eebb35727fb18a7c563acbaf25a8d36) ) //bitmap-1 |
| 3948 | |
| 3949 | ROM_REGION( 0x800000, "ics", ROMREGION_ERASE00 ) /* Samples - (8 bit mono 11025Hz) - */ |
| 3950 | /* there is a position for the PGM audio bios rom, but it's unpopulated, and the M of PGM has been scratched off the PCB */ |
| 3951 | ROM_LOAD( "m04701b032.u17", 0x400000, 0x400000, CRC(b46e22d1) SHA1(670853dc485942fb96380568494bdf3235f446ee) ) //music-1 |
| 3952 | |
| 3953 | ROM_REGION( 0x20000, "sram", 0 ) /* default settings */ |
| 3954 | ROM_LOAD( "ket_defaults.nv", 0x0000000, 0x020000, CRC(3ca892d8) SHA1(67430df5217e453ae8140c5653deeadfad8fa684) ) |
| 3955 | ROM_END |
| 3956 | |
| 3932 | 3957 | ROM_START( keta ) |
| 3933 | 3958 | ROM_REGION( 0x600000, "maincpu", 0 ) /* 68000 Code */ |
| 3934 | 3959 | /* doesn't use a separate BIOS rom */ |
| r249940 | r249941 | |
|---|
| 3983 | 4008 | ROM_LOAD( "ket_defaults.nv", 0x0000000, 0x020000, CRC(3ca892d8) SHA1(67430df5217e453ae8140c5653deeadfad8fa684) ) |
| 3984 | 4009 | ROM_END |
| 3985 | 4010 | |
| 4011 | |
| 4012 | ROM_START( ketarr10 ) |
| 4013 | ROM_REGION( 0x600000, "maincpu", 0 ) /* 68000 Code */ |
| 4014 | /* doesn't use a separate BIOS rom */ |
| 4015 | ROM_LOAD16_WORD_SWAP( "ketarr_v100.u38", 0x000000, 0x200000, CRC(d4c7a8ab) SHA1(65d104d17bd4fd03a2b44297a003ba03d746c7ee) ) |
| 4016 | |
| 4017 | ROM_REGION( 0x4000, "prot", 0 ) /* ARM protection ASIC - internal rom */ |
| 4018 | ROM_LOAD( "ket_igs027a.bin", 0x000000, 0x04000, NO_DUMP ) |
| 4019 | |
| 4020 | ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */ |
| 4021 | ROM_LOAD( "pgm_t01s.rom", 0x000000, 0x200000, CRC(1a7123a0) SHA1(cc567f577bfbf45427b54d6695b11b74f2578af3) ) // same as standard PGM text bios - surface scratched to remove details |
| 4022 | ROM_LOAD( "t04701w064.u19", 0x180000, 0x800000, CRC(2665b041) SHA1(fb1107778b66f2af0de77ac82e1ee2902f53a959) ) //text-1 |
| 4023 | |
| 4024 | ROM_REGION( 0x1000000, "sprcol", 0 ) /* Sprite Colour Data */ |
| 4025 | ROM_LOAD( "a04701w064.u7", 0x0000000, 0x0800000, CRC(5ef1b94b) SHA1(f10dfa46e0a4d297c3a856aea5b49d648f98935c) ) //image-1 |
| 4026 | ROM_LOAD( "a04702w064.u8", 0x0800000, 0x0800000, CRC(26d6da7f) SHA1(f20e07a7994f41b5ed917f8b0119dc5542f3541c) ) //image-2 |
| 4027 | |
| 4028 | ROM_REGION( 0x0800000, "sprmask", 0 ) /* Sprite Masks + Colour Indexes */ |
| 4029 | ROM_LOAD( "b04701w064.u1", 0x0000000, 0x0800000, CRC(1bec008d) SHA1(07d117dc2eebb35727fb18a7c563acbaf25a8d36) ) //bitmap-1 |
| 4030 | |
| 4031 | ROM_REGION( 0x800000, "ics", ROMREGION_ERASE00 ) /* Samples - (8 bit mono 11025Hz) - */ |
| 4032 | /* there is a position for the PGM audio bios rom, but it's unpopulated, and the M of PGM has been scratched off the PCB */ |
| 4033 | ROM_LOAD( "m04701b032.u17", 0x400000, 0x400000, CRC(b46e22d1) SHA1(670853dc485942fb96380568494bdf3235f446ee) ) //music-1 |
| 4034 | |
| 4035 | ROM_REGION( 0x20000, "sram", 0 ) /* default settings */ |
| 4036 | ROM_LOAD( "ket_defaults.nv", 0x0000000, 0x020000, CRC(3ca892d8) SHA1(67430df5217e453ae8140c5653deeadfad8fa684) ) |
| 4037 | ROM_END |
| 4038 | |
| 4039 | |
| 4040 | ROM_START( ketarrf ) |
| 4041 | ROM_REGION( 0x600000, "maincpu", 0 ) /* 68000 Code */ |
| 4042 | /* doesn't use a separate BIOS rom */ |
| 4043 | ROM_LOAD16_WORD_SWAP( "ketarrf_v100.u38", 0x000000, 0x200000, CRC(6ad17aa4) SHA1(791bd1a107433a3811c8a79ea26a73e66ddd296f) ) |
| 4044 | |
| 4045 | ROM_REGION( 0x4000, "prot", 0 ) /* ARM protection ASIC - internal rom */ |
| 4046 | ROM_LOAD( "ket_igs027a.bin", 0x000000, 0x04000, NO_DUMP ) |
| 4047 | |
| 4048 | ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */ |
| 4049 | ROM_LOAD( "pgm_t01s.rom", 0x000000, 0x200000, CRC(1a7123a0) SHA1(cc567f577bfbf45427b54d6695b11b74f2578af3) ) // same as standard PGM text bios - surface scratched to remove details |
| 4050 | ROM_LOAD( "t04701w064.u19", 0x180000, 0x800000, CRC(2665b041) SHA1(fb1107778b66f2af0de77ac82e1ee2902f53a959) ) //text-1 |
| 4051 | |
| 4052 | ROM_REGION( 0x1000000, "sprcol", 0 ) /* Sprite Colour Data */ |
| 4053 | ROM_LOAD( "a04701w064.u7", 0x0000000, 0x0800000, CRC(5ef1b94b) SHA1(f10dfa46e0a4d297c3a856aea5b49d648f98935c) ) //image-1 |
| 4054 | ROM_LOAD( "a04702w064.u8", 0x0800000, 0x0800000, CRC(26d6da7f) SHA1(f20e07a7994f41b5ed917f8b0119dc5542f3541c) ) //image-2 |
| 4055 | |
| 4056 | ROM_REGION( 0x0800000, "sprmask", 0 ) /* Sprite Masks + Colour Indexes */ |
| 4057 | ROM_LOAD( "b04701w064.u1", 0x0000000, 0x0800000, CRC(1bec008d) SHA1(07d117dc2eebb35727fb18a7c563acbaf25a8d36) ) //bitmap-1 |
| 4058 | |
| 4059 | ROM_REGION( 0x800000, "ics", ROMREGION_ERASE00 ) /* Samples - (8 bit mono 11025Hz) - */ |
| 4060 | /* there is a position for the PGM audio bios rom, but it's unpopulated, and the M of PGM has been scratched off the PCB */ |
| 4061 | ROM_LOAD( "m04701b032.u17", 0x400000, 0x400000, CRC(b46e22d1) SHA1(670853dc485942fb96380568494bdf3235f446ee) ) //music-1 |
| 4062 | |
| 4063 | ROM_REGION( 0x20000, "sram", 0 ) /* default settings */ |
| 4064 | ROM_LOAD( "ket_defaults.nv", 0x0000000, 0x020000, CRC(3ca892d8) SHA1(67430df5217e453ae8140c5653deeadfad8fa684) ) |
| 4065 | ROM_END |
| 4066 | |
| 4067 | ROM_START( ketarr15 ) |
| 4068 | ROM_REGION( 0x600000, "maincpu", 0 ) /* 68000 Code */ |
| 4069 | /* doesn't use a separate BIOS rom */ |
| 4070 | ROM_LOAD16_WORD_SWAP( "ketarr15_v100.u38", 0x000000, 0x200000, CRC(552a7d95) SHA1(4f3fb13f34d58a7482e1d26623d38aa0b54ca8dd) ) |
| 4071 | |
| 4072 | ROM_REGION( 0x4000, "prot", 0 ) /* ARM protection ASIC - internal rom */ |
| 4073 | ROM_LOAD( "ket_igs027a.bin", 0x000000, 0x04000, NO_DUMP ) |
| 4074 | |
| 4075 | ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */ |
| 4076 | ROM_LOAD( "pgm_t01s.rom", 0x000000, 0x200000, CRC(1a7123a0) SHA1(cc567f577bfbf45427b54d6695b11b74f2578af3) ) // same as standard PGM text bios - surface scratched to remove details |
| 4077 | ROM_LOAD( "t04701w064.u19", 0x180000, 0x800000, CRC(2665b041) SHA1(fb1107778b66f2af0de77ac82e1ee2902f53a959) ) //text-1 |
| 4078 | |
| 4079 | ROM_REGION( 0x1000000, "sprcol", 0 ) /* Sprite Colour Data */ |
| 4080 | ROM_LOAD( "a04701w064.u7", 0x0000000, 0x0800000, CRC(5ef1b94b) SHA1(f10dfa46e0a4d297c3a856aea5b49d648f98935c) ) //image-1 |
| 4081 | ROM_LOAD( "a04702w064.u8", 0x0800000, 0x0800000, CRC(26d6da7f) SHA1(f20e07a7994f41b5ed917f8b0119dc5542f3541c) ) //image-2 |
| 4082 | |
| 4083 | ROM_REGION( 0x0800000, "sprmask", 0 ) /* Sprite Masks + Colour Indexes */ |
| 4084 | ROM_LOAD( "b04701w064.u1", 0x0000000, 0x0800000, CRC(1bec008d) SHA1(07d117dc2eebb35727fb18a7c563acbaf25a8d36) ) //bitmap-1 |
| 4085 | |
| 4086 | ROM_REGION( 0x800000, "ics", ROMREGION_ERASE00 ) /* Samples - (8 bit mono 11025Hz) - */ |
| 4087 | /* there is a position for the PGM audio bios rom, but it's unpopulated, and the M of PGM has been scratched off the PCB */ |
| 4088 | ROM_LOAD( "m04701b032.u17", 0x400000, 0x400000, CRC(b46e22d1) SHA1(670853dc485942fb96380568494bdf3235f446ee) ) //music-1 |
| 4089 | |
| 4090 | ROM_REGION( 0x20000, "sram", 0 ) /* default settings */ |
| 4091 | ROM_LOAD( "ket_defaults.nv", 0x0000000, 0x020000, CRC(3ca892d8) SHA1(67430df5217e453ae8140c5653deeadfad8fa684) ) |
| 4092 | ROM_END |
| 4093 | |
| 4094 | ROM_START( ketarrs15 ) |
| 4095 | ROM_REGION( 0x600000, "maincpu", 0 ) /* 68000 Code */ |
| 4096 | /* doesn't use a separate BIOS rom */ |
| 4097 | ROM_LOAD16_WORD_SWAP( "ketarrs15_v100.u38", 0x000000, 0x200000, CRC(a95e71e0) SHA1(182c12e3581ebb20176d8abca41ee62aadcd63e0) ) |
| 4098 | |
| 4099 | ROM_REGION( 0x4000, "prot", 0 ) /* ARM protection ASIC - internal rom */ |
| 4100 | ROM_LOAD( "ket_igs027a.bin", 0x000000, 0x04000, NO_DUMP ) |
| 4101 | |
| 4102 | ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */ |
| 4103 | ROM_LOAD( "pgm_t01s.rom", 0x000000, 0x200000, CRC(1a7123a0) SHA1(cc567f577bfbf45427b54d6695b11b74f2578af3) ) // same as standard PGM text bios - surface scratched to remove details |
| 4104 | ROM_LOAD( "t04701w064.u19", 0x180000, 0x800000, CRC(2665b041) SHA1(fb1107778b66f2af0de77ac82e1ee2902f53a959) ) //text-1 |
| 4105 | |
| 4106 | ROM_REGION( 0x1000000, "sprcol", 0 ) /* Sprite Colour Data */ |
| 4107 | ROM_LOAD( "a04701w064.u7", 0x0000000, 0x0800000, CRC(5ef1b94b) SHA1(f10dfa46e0a4d297c3a856aea5b49d648f98935c) ) //image-1 |
| 4108 | ROM_LOAD( "a04702w064.u8", 0x0800000, 0x0800000, CRC(26d6da7f) SHA1(f20e07a7994f41b5ed917f8b0119dc5542f3541c) ) //image-2 |
| 4109 | |
| 4110 | ROM_REGION( 0x0800000, "sprmask", 0 ) /* Sprite Masks + Colour Indexes */ |
| 4111 | ROM_LOAD( "b04701w064.u1", 0x0000000, 0x0800000, CRC(1bec008d) SHA1(07d117dc2eebb35727fb18a7c563acbaf25a8d36) ) //bitmap-1 |
| 4112 | |
| 4113 | ROM_REGION( 0x800000, "ics", ROMREGION_ERASE00 ) /* Samples - (8 bit mono 11025Hz) - */ |
| 4114 | /* there is a position for the PGM audio bios rom, but it's unpopulated, and the M of PGM has been scratched off the PCB */ |
| 4115 | ROM_LOAD( "m04701b032.u17", 0x400000, 0x400000, CRC(b46e22d1) SHA1(670853dc485942fb96380568494bdf3235f446ee) ) //music-1 |
| 4116 | |
| 4117 | ROM_REGION( 0x20000, "sram", 0 ) /* default settings */ |
| 4118 | ROM_LOAD( "ket_defaults.nv", 0x0000000, 0x020000, CRC(3ca892d8) SHA1(67430df5217e453ae8140c5653deeadfad8fa684) ) |
| 4119 | ROM_END |
| 4120 | |
| 4121 | ROM_START( ketarr151 ) |
| 4122 | ROM_REGION( 0x600000, "maincpu", 0 ) /* 68000 Code */ |
| 4123 | /* doesn't use a separate BIOS rom */ |
| 4124 | ROM_LOAD16_WORD_SWAP( "ketarr151_v100.u38", 0x000000, 0x200000, CRC(2b7c030d) SHA1(9aaba1242d7ce29915a31d40341da82985927f9d) ) |
| 4125 | |
| 4126 | ROM_REGION( 0x4000, "prot", 0 ) /* ARM protection ASIC - internal rom */ |
| 4127 | ROM_LOAD( "ket_igs027a.bin", 0x000000, 0x04000, NO_DUMP ) |
| 4128 | |
| 4129 | ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */ |
| 4130 | ROM_LOAD( "pgm_t01s.rom", 0x000000, 0x200000, CRC(1a7123a0) SHA1(cc567f577bfbf45427b54d6695b11b74f2578af3) ) // same as standard PGM text bios - surface scratched to remove details |
| 4131 | ROM_LOAD( "t04701w064.u19", 0x180000, 0x800000, CRC(2665b041) SHA1(fb1107778b66f2af0de77ac82e1ee2902f53a959) ) //text-1 |
| 4132 | |
| 4133 | ROM_REGION( 0x1000000, "sprcol", 0 ) /* Sprite Colour Data */ |
| 4134 | ROM_LOAD( "a04701w064.u7", 0x0000000, 0x0800000, CRC(5ef1b94b) SHA1(f10dfa46e0a4d297c3a856aea5b49d648f98935c) ) //image-1 |
| 4135 | ROM_LOAD( "a04702w064.u8", 0x0800000, 0x0800000, CRC(26d6da7f) SHA1(f20e07a7994f41b5ed917f8b0119dc5542f3541c) ) //image-2 |
| 4136 | |
| 4137 | ROM_REGION( 0x0800000, "sprmask", 0 ) /* Sprite Masks + Colour Indexes */ |
| 4138 | ROM_LOAD( "b04701w064.u1", 0x0000000, 0x0800000, CRC(1bec008d) SHA1(07d117dc2eebb35727fb18a7c563acbaf25a8d36) ) //bitmap-1 |
| 4139 | |
| 4140 | ROM_REGION( 0x800000, "ics", ROMREGION_ERASE00 ) /* Samples - (8 bit mono 11025Hz) - */ |
| 4141 | /* there is a position for the PGM audio bios rom, but it's unpopulated, and the M of PGM has been scratched off the PCB */ |
| 4142 | ROM_LOAD( "m04701b032.u17", 0x400000, 0x400000, CRC(b46e22d1) SHA1(670853dc485942fb96380568494bdf3235f446ee) ) //music-1 |
| 4143 | |
| 4144 | ROM_REGION( 0x20000, "sram", 0 ) /* default settings */ |
| 4145 | ROM_LOAD( "ket_defaults.nv", 0x0000000, 0x020000, CRC(3ca892d8) SHA1(67430df5217e453ae8140c5653deeadfad8fa684) ) |
| 4146 | ROM_END |
| 4147 | |
| 4148 | ROM_START( ketarrs151 ) |
| 4149 | ROM_REGION( 0x600000, "maincpu", 0 ) /* 68000 Code */ |
| 4150 | /* doesn't use a separate BIOS rom */ |
| 4151 | ROM_LOAD16_WORD_SWAP( "ketarrs151_v100.u38", 0x000000, 0x200000, CRC(35c984e4) SHA1(d4517f318de0c40a3b30e41374f33bb355581434) ) |
| 4152 | |
| 4153 | ROM_REGION( 0x4000, "prot", 0 ) /* ARM protection ASIC - internal rom */ |
| 4154 | ROM_LOAD( "ket_igs027a.bin", 0x000000, 0x04000, NO_DUMP ) |
| 4155 | |
| 4156 | ROM_REGION( 0xc00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */ |
| 4157 | ROM_LOAD( "pgm_t01s.rom", 0x000000, 0x200000, CRC(1a7123a0) SHA1(cc567f577bfbf45427b54d6695b11b74f2578af3) ) // same as standard PGM text bios - surface scratched to remove details |
| 4158 | ROM_LOAD( "t04701w064.u19", 0x180000, 0x800000, CRC(2665b041) SHA1(fb1107778b66f2af0de77ac82e1ee2902f53a959) ) //text-1 |
| 4159 | |
| 4160 | ROM_REGION( 0x1000000, "sprcol", 0 ) /* Sprite Colour Data */ |
| 4161 | ROM_LOAD( "a04701w064.u7", 0x0000000, 0x0800000, CRC(5ef1b94b) SHA1(f10dfa46e0a4d297c3a856aea5b49d648f98935c) ) //image-1 |
| 4162 | ROM_LOAD( "a04702w064.u8", 0x0800000, 0x0800000, CRC(26d6da7f) SHA1(f20e07a7994f41b5ed917f8b0119dc5542f3541c) ) //image-2 |
| 4163 | |
| 4164 | ROM_REGION( 0x0800000, "sprmask", 0 ) /* Sprite Masks + Colour Indexes */ |
| 4165 | ROM_LOAD( "b04701w064.u1", 0x0000000, 0x0800000, CRC(1bec008d) SHA1(07d117dc2eebb35727fb18a7c563acbaf25a8d36) ) //bitmap-1 |
| 4166 | |
| 4167 | ROM_REGION( 0x800000, "ics", ROMREGION_ERASE00 ) /* Samples - (8 bit mono 11025Hz) - */ |
| 4168 | /* there is a position for the PGM audio bios rom, but it's unpopulated, and the M of PGM has been scratched off the PCB */ |
| 4169 | ROM_LOAD( "m04701b032.u17", 0x400000, 0x400000, CRC(b46e22d1) SHA1(670853dc485942fb96380568494bdf3235f446ee) ) //music-1 |
| 4170 | |
| 4171 | ROM_REGION( 0x20000, "sram", 0 ) /* default settings */ |
| 4172 | ROM_LOAD( "ket_defaults.nv", 0x0000000, 0x020000, CRC(3ca892d8) SHA1(67430df5217e453ae8140c5653deeadfad8fa684) ) |
| 4173 | ROM_END |
| 4174 | |
| 4175 | ROM_START( ketarr ) |
| 4176 | ROM_REGION( 0x600000, "maincpu", 0 ) |
| 4177 | ROM_LOAD16_WORD_SWAP( "ketarr17_v100.u38", 0x000000, 0x200000, CRC(2cb80b89) SHA1(e1aa072b8344890486e11795e02703aa2d234bb1) ) |
| 4178 | |
| 4179 | ROM_REGION( 0x4000, "prot", 0 ) |
| 4180 | ROM_LOAD( "ket_igs027a.bin", 0x000000, 0x04000, CRC(ab54d286) SHA1(897256b6709e1a4da9daba92b6bde39ccfccd8c1) ) |
| 4181 | |
| 4182 | ROM_REGION( 0xc00000, "tiles", 0 ) |
| 4183 | ROM_LOAD( "pgm_t01s.rom", 0x000000, 0x200000, CRC(1a7123a0) SHA1(cc567f577bfbf45427b54d6695b11b74f2578af3) ) |
| 4184 | ROM_LOAD( "t04701w064.u19", 0x180000, 0x800000, CRC(2665b041) SHA1(fb1107778b66f2af0de77ac82e1ee2902f53a959) ) //text-1 |
| 4185 | |
| 4186 | ROM_REGION( 0x1000000, "sprcol", 0 ) |
| 4187 | ROM_LOAD( "a04701w064.u7", 0x0000000, 0x0800000, CRC(5ef1b94b) SHA1(f10dfa46e0a4d297c3a856aea5b49d648f98935c) ) //image-1 |
| 4188 | ROM_LOAD( "a04702w064.u8", 0x0800000, 0x0800000, CRC(26d6da7f) SHA1(f20e07a7994f41b5ed917f8b0119dc5542f3541c) ) //image-2 |
| 4189 | |
| 4190 | ROM_REGION( 0x0800000, "sprmask", 0 ) |
| 4191 | ROM_LOAD( "b04701w064.u1", 0x0000000, 0x0800000, CRC(1bec008d) SHA1(07d117dc2eebb35727fb18a7c563acbaf25a8d36) ) //bitmap-1 |
| 4192 | |
| 4193 | ROM_REGION( 0x800000, "ics", ROMREGION_ERASE00 ) |
| 4194 | ROM_LOAD( "m04701b032.u17", 0x400000, 0x400000, CRC(b46e22d1) SHA1(670853dc485942fb96380568494bdf3235f446ee) ) //music-1 |
| 4195 | |
| 4196 | ROM_REGION( 0x20000, "sram", 0 ) /* default settings */ |
| 4197 | ROM_LOAD( "ket_defaults.nv", 0x0000000, 0x020000, CRC(3ca892d8) SHA1(67430df5217e453ae8140c5653deeadfad8fa684) ) |
| 4198 | ROM_END |
| 4199 | |
| 3986 | 4200 | ROM_START( espgal ) |
| 3987 | 4201 | ROM_REGION( 0x600000, "maincpu", 0 ) /* 68000 Code */ |
| 3988 | 4202 | /* doesn't use a separate BIOS rom */ |
| r249940 | r249941 | |
|---|
| 4312 | 4526 | GAME( 2002, ddpdojblka, ddpdoj, pgm_arm_type1_cave, pgm, pgm_arm_type1_state, ddp3, ROT270, "Cave (AMI license)", "DoDonPachi Dai-Ou-Jou (2002.10.07 Black Ver)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) // Displays "2002.04.05.Master Ver" (old) or "2002.10.07 Black Ver" (new) |
| 4313 | 4527 | |
| 4314 | 4528 | // the exact text of the 'version' shows which revision of the game it is; the newest has 2 '.' symbols in the string, the oldest, none. |
| 4529 | // the only difference between 'ket' and 'ket1' is the ROM fill at 0x1443bc-0x1c88cd, on ket1 it seems to be randomized / garbage data, on ket it's all 0xff, both have been seen on more than one PCB. |
| 4315 | 4530 | GAME( 2002, ket, 0, pgm_arm_type1_cave, pgm, pgm_arm_type1_state, ket, ROT270, "Cave (AMI license)", "Ketsui: Kizuna Jigoku Tachi (2003/01/01. Master Ver.)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) |
| 4531 | GAME( 2002, ket1, ket, pgm_arm_type1_cave, pgm, pgm_arm_type1_state, ket, ROT270, "Cave (AMI license)", "Ketsui: Kizuna Jigoku Tachi (2003/01/01. Master Ver.) (alt rom fill)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) |
| 4316 | 4532 | GAME( 2002, keta, ket, pgm_arm_type1_cave, pgm, pgm_arm_type1_state, ket, ROT270, "Cave (AMI license)", "Ketsui: Kizuna Jigoku Tachi (2003/01/01 Master Ver.)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) |
| 4317 | 4533 | GAME( 2002, ketb, ket, pgm_arm_type1_cave, pgm, pgm_arm_type1_state, ket, ROT270, "Cave (AMI license)", "Ketsui: Kizuna Jigoku Tachi (2003/01/01 Master Ver)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) |
| 4318 | 4534 | |
| 4535 | // these are modern hacks, some of them have been seen on original PCBs, also reportedly on a bootleg PCB with mostly original components but the ARM replaced with a custom chip. |
| 4536 | // this is a significantly reworked version of the game |
| 4537 | GAME( 2014, ketarr, ket, pgm_arm_type1_cave, pgm, pgm_arm_type1_state, ket, ROT270, "hack (trap15)", "Ketsui: Kizuna Jigoku Tachi (2014/07/16 ARRANGE 1.7 VER) (hack)", MACHINE_SUPPORTS_SAVE ) |
| 4538 | GAME( 2012, ketarr151, ket, pgm_arm_type1_cave, pgm, pgm_arm_type1_state, ket, ROT270, "hack (trap15)", "Ketsui: Kizuna Jigoku Tachi (2012/06/26 ARRANGE 1.51 VER) (hack)", MACHINE_SUPPORTS_SAVE ) // this apparently crashes on an original PGM PCB when displaying the text after starting a game, find out why and reproduce the issue in MAME. |
| 4539 | GAME( 2012, ketarr15, ket, pgm_arm_type1_cave, pgm, pgm_arm_type1_state, ket, ROT270, "hack (trap15)", "Ketsui: Kizuna Jigoku Tachi (2012/06/26 ARRANGE 1.5 VER) (hack)", MACHINE_SUPPORTS_SAVE ) |
| 4540 | GAME( 2012, ketarr10, ket, pgm_arm_type1_cave, pgm, pgm_arm_type1_state, ket, ROT270, "hack (trap15)", "Ketsui: Kizuna Jigoku Tachi (2012/04/17 ARRANGE VER) (hack)", MACHINE_SUPPORTS_SAVE ) |
| 4541 | |
| 4542 | // these simplify the scoring system |
| 4543 | GAME( 2012, ketarrs151, ket, pgm_arm_type1_cave, pgm, pgm_arm_type1_state, ket, ROT270, "hack (trap15)", "Ketsui: Kizuna Jigoku Tachi (2012/06/27 MR.STOIC 1.51 VER) (hack)", MACHINE_SUPPORTS_SAVE ) |
| 4544 | GAME( 2012, ketarrs15, ket, pgm_arm_type1_cave, pgm, pgm_arm_type1_state, ket, ROT270, "hack (trap15)", "Ketsui: Kizuna Jigoku Tachi (2012/06/27 MR.STOIC 1.5 VER) (hack)", MACHINE_SUPPORTS_SAVE ) |
| 4545 | |
| 4546 | // this has the 'programmed slowdown' removed. |
| 4547 | GAME( 2012, ketarrf, ket, pgm_arm_type1_cave, pgm, pgm_arm_type1_state, ket, ROT270, "hack (trap15)", "Ketsui: Kizuna Jigoku Tachi (2012/04/17 FAST. VER) (hack)", MACHINE_SUPPORTS_SAVE ) |
| 4548 | |
| 4549 | // this version is stupid, it just simulates what happens if the protection chip isn't returning proper values |
| 4550 | // ROM_LOAD16_WORD_SWAP( "ketarrb_v100.u38", 0x000000, 0x200000, CRC(ec7a4f92) SHA1(6351fb386586956fbdb5f0730c481fb539cc267a) ) |
| 4551 | // GAME( 2002, ketarrb, ket, pgm_arm_type1_cave, pgm, pgm_arm_type1_state, ket, ROT270, "trap15", "Ketsui: Kizuna Jigoku Tachi (2012/04/17 BACK. VER)", MACHINE_SUPPORTS_SAVE ) |
| 4552 | |
| 4553 | |
| 4319 | 4554 | GAME( 2003, espgal, 0, pgm_arm_type1_cave, pgm, pgm_arm_type1_state, espgal, ROT270, "Cave (AMI license)", "Espgaluda (2003/10/15 Master Ver)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) |
| 4320 | 4555 | |
| 4321 | 4556 | // protection simulated, but should be correct |
trunk/src/mame/drivers/replicator.c
| r249940 | r249941 | |
|---|
| 151 | 151 | class replicator_state : public driver_device |
| 152 | 152 | { |
| 153 | 153 | public: |
| 154 | | replicator_state(const machine_config &mconfig, device_type type, const char *tag) |
| 155 | | : driver_device(mconfig, type, tag), |
| 156 | | m_maincpu(*this, "maincpu"), |
| 157 | | m_lcdc(*this, "hd44780"), |
| 158 | | m_dac(*this, "dac") |
| 159 | | { |
| 160 | | } |
| 154 | replicator_state(const machine_config &mconfig, device_type type, const char *tag) |
| 155 | : driver_device(mconfig, type, tag), |
| 156 | m_maincpu(*this, "maincpu"), |
| 157 | m_lcdc(*this, "hd44780"), |
| 158 | m_dac(*this, "dac") |
| 159 | { |
| 160 | } |
| 161 | 161 | |
| 162 | | virtual void machine_start(); |
| 162 | virtual void machine_start(); |
| 163 | 163 | |
| 164 | | UINT8 m_port_a; |
| 165 | | UINT8 m_port_b; |
| 166 | | UINT8 m_port_c; |
| 167 | | UINT8 m_port_d; |
| 168 | | UINT8 m_port_e; |
| 169 | | UINT8 m_port_f; |
| 170 | | UINT8 m_port_g; |
| 171 | | UINT8 m_port_h; |
| 172 | | UINT8 m_port_j; |
| 173 | | UINT8 m_port_k; |
| 174 | | UINT8 m_port_l; |
| 164 | UINT8 m_port_a; |
| 165 | UINT8 m_port_b; |
| 166 | UINT8 m_port_c; |
| 167 | UINT8 m_port_d; |
| 168 | UINT8 m_port_e; |
| 169 | UINT8 m_port_f; |
| 170 | UINT8 m_port_g; |
| 171 | UINT8 m_port_h; |
| 172 | UINT8 m_port_j; |
| 173 | UINT8 m_port_k; |
| 174 | UINT8 m_port_l; |
| 175 | 175 | |
| 176 | | UINT8 shift_register_value; |
| 176 | UINT8 shift_register_value; |
| 177 | 177 | |
| 178 | | required_device<avr8_device> m_maincpu; |
| 179 | | required_device<hd44780_device> m_lcdc; |
| 180 | | required_device<dac_device> m_dac; |
| 178 | required_device<avr8_device> m_maincpu; |
| 179 | required_device<hd44780_device> m_lcdc; |
| 180 | required_device<dac_device> m_dac; |
| 181 | 181 | |
| 182 | | DECLARE_READ8_MEMBER(port_r); |
| 183 | | DECLARE_WRITE8_MEMBER(port_w); |
| 184 | | DECLARE_DRIVER_INIT(replicator); |
| 185 | | virtual void machine_reset(); |
| 186 | | DECLARE_PALETTE_INIT(replicator); |
| 182 | DECLARE_READ8_MEMBER(port_r); |
| 183 | DECLARE_WRITE8_MEMBER(port_w); |
| 184 | DECLARE_DRIVER_INIT(replicator); |
| 185 | virtual void machine_reset(); |
| 186 | DECLARE_PALETTE_INIT(replicator); |
| 187 | 187 | }; |
| 188 | 188 | |
| 189 | 189 | void replicator_state::machine_start() |
| r249940 | r249941 | |
|---|
| 192 | 192 | |
| 193 | 193 | READ8_MEMBER(replicator_state::port_r) |
| 194 | 194 | { |
| 195 | | switch( offset ) |
| 196 | | { |
| 197 | | case AVR8_IO_PORTA: |
| 198 | | { |
| 195 | switch( offset ) |
| 196 | { |
| 197 | case AVR8_IO_PORTA: |
| 198 | { |
| 199 | 199 | #if LOG_PORTS |
| 200 | | printf("[%08X] Port A READ (A-axis signals + B-axis STEP&DIR)\n", m_maincpu->m_shifted_pc); |
| 200 | printf("[%08X] Port A READ (A-axis signals + B-axis STEP&DIR)\n", m_maincpu->m_shifted_pc); |
| 201 | 201 | #endif |
| 202 | | return 0x00; |
| 203 | | } |
| 204 | | case AVR8_IO_PORTB: |
| 205 | | { |
| 202 | return 0x00; |
| 203 | } |
| 204 | case AVR8_IO_PORTB: |
| 205 | { |
| 206 | 206 | #if LOG_PORTS |
| 207 | | printf("[%08X] Port B READ (SD-CS; 1280-MISO/MOSI/SCK; EX2-FAN/HEAT/PWR-CHECK; BLINK)\n", m_maincpu->m_shifted_pc); |
| 207 | printf("[%08X] Port B READ (SD-CS; 1280-MISO/MOSI/SCK; EX2-FAN/HEAT/PWR-CHECK; BLINK)\n", m_maincpu->m_shifted_pc); |
| 208 | 208 | #endif |
| 209 | | return 0x00; |
| 210 | | } |
| 211 | | case AVR8_IO_PORTC: |
| 212 | | { |
| 209 | return 0x00; |
| 210 | } |
| 211 | case AVR8_IO_PORTC: |
| 212 | { |
| 213 | 213 | #if LOG_PORTS |
| 214 | | printf("[%08X] Port C READ (1280-EX1/EX2; LCD-signals; R&G-LED; DETECT)\n", m_maincpu->m_shifted_pc); |
| 214 | printf("[%08X] Port C READ (1280-EX1/EX2; LCD-signals; R&G-LED; DETECT)\n", m_maincpu->m_shifted_pc); |
| 215 | 215 | #endif |
| 216 | | return DETECT; //indicated that the Interface board is present. |
| 217 | | } |
| 218 | | case AVR8_IO_PORTD: |
| 219 | | { |
| 216 | return DETECT; //indicated that the Interface board is present. |
| 217 | } |
| 218 | case AVR8_IO_PORTD: |
| 219 | { |
| 220 | 220 | #if LOG_PORTS |
| 221 | | printf("[%08X] Port D READ (SDA/SCL; 1280-EX-TX/RX)\n", m_maincpu->m_shifted_pc); |
| 221 | printf("[%08X] Port D READ (SDA/SCL; 1280-EX-TX/RX)\n", m_maincpu->m_shifted_pc); |
| 222 | 222 | #endif |
| 223 | | return 0x00; |
| 224 | | } |
| 225 | | case AVR8_IO_PORTE: |
| 226 | | { |
| 223 | return 0x00; |
| 224 | } |
| 225 | case AVR8_IO_PORTE: |
| 226 | { |
| 227 | 227 | #if LOG_PORTS |
| 228 | | printf("[%08X] Port E READ (1280-TX/RX; THERMO-signals)\n", m_maincpu->m_shifted_pc); |
| 228 | printf("[%08X] Port E READ (1280-TX/RX; THERMO-signals)\n", m_maincpu->m_shifted_pc); |
| 229 | 229 | #endif |
| 230 | | return 0x00; |
| 231 | | } |
| 232 | | case AVR8_IO_PORTF: |
| 233 | | { |
| 230 | return 0x00; |
| 231 | } |
| 232 | case AVR8_IO_PORTF: |
| 233 | { |
| 234 | 234 | #if LOG_PORTS |
| 235 | | printf("[%08X] Port F READ (X-axis & Y-axis signals)\n", m_maincpu->m_shifted_pc); |
| 235 | printf("[%08X] Port F READ (X-axis & Y-axis signals)\n", m_maincpu->m_shifted_pc); |
| 236 | 236 | #endif |
| 237 | | return 0x00; |
| 238 | | } |
| 239 | | case AVR8_IO_PORTG: |
| 240 | | { |
| 237 | return 0x00; |
| 238 | } |
| 239 | case AVR8_IO_PORTG: |
| 240 | { |
| 241 | 241 | #if LOG_PORTS |
| 242 | | printf("[%08X] Port G READ (BUZZ; Cutoff-sr-check; B-axis EN; 1280-EX3/EX4)\n", m_maincpu->m_shifted_pc); |
| 242 | printf("[%08X] Port G READ (BUZZ; Cutoff-sr-check; B-axis EN; 1280-EX3/EX4)\n", m_maincpu->m_shifted_pc); |
| 243 | 243 | #endif |
| 244 | | return 0x00; |
| 245 | | } |
| 246 | | case AVR8_IO_PORTH: |
| 247 | | { |
| 244 | return 0x00; |
| 245 | } |
| 246 | case AVR8_IO_PORTH: |
| 247 | { |
| 248 | 248 | #if LOG_PORTS |
| 249 | | printf("[%08X] Port H READ (cuttoff-text/reset; EX1-FAN/HEAT/PWR-CHECK; SD-CD/SD-WP)\n", m_maincpu->m_shifted_pc); |
| 249 | printf("[%08X] Port H READ (cuttoff-text/reset; EX1-FAN/HEAT/PWR-CHECK; SD-CD/SD-WP)\n", m_maincpu->m_shifted_pc); |
| 250 | 250 | #endif |
| 251 | | return 0x00; |
| 252 | | } |
| 253 | | case AVR8_IO_PORTJ: |
| 254 | | { |
| 251 | return 0x00; |
| 252 | } |
| 253 | case AVR8_IO_PORTJ: |
| 254 | { |
| 255 | 255 | #if LOG_PORTS |
| 256 | | printf("[%08X] Port J READ (Interface buttons; POTS-SCL; B-axis-POT)\n", m_maincpu->m_shifted_pc); |
| 256 | printf("[%08X] Port J READ (Interface buttons; POTS-SCL; B-axis-POT)\n", m_maincpu->m_shifted_pc); |
| 257 | 257 | #endif |
| 258 | | return ioport("keypad")->read(); |
| 259 | | } |
| 260 | | case AVR8_IO_PORTK: |
| 261 | | { |
| 258 | return ioport("keypad")->read(); |
| 259 | } |
| 260 | case AVR8_IO_PORTK: |
| 261 | { |
| 262 | 262 | #if LOG_PORTS |
| 263 | | printf("[%08X] Port K READ (Z-axis signals; HBP-THERM; 1280-EX5/6/7)\n", m_maincpu->m_shifted_pc); |
| 263 | printf("[%08X] Port K READ (Z-axis signals; HBP-THERM; 1280-EX5/6/7)\n", m_maincpu->m_shifted_pc); |
| 264 | 264 | #endif |
| 265 | | return 0x00; |
| 266 | | } |
| 267 | | case AVR8_IO_PORTL: |
| 268 | | { |
| 265 | return 0x00; |
| 266 | } |
| 267 | case AVR8_IO_PORTL: |
| 268 | { |
| 269 | 269 | #if LOG_PORTS |
| 270 | | printf("[%08X] Port L READ (HBP; EXTRA-FET; X-MIN/MAX; Y-MIN/MAX; Z-MIN/MAX)\n", m_maincpu->m_shifted_pc); |
| 270 | printf("[%08X] Port L READ (HBP; EXTRA-FET; X-MIN/MAX; Y-MIN/MAX; Z-MIN/MAX)\n", m_maincpu->m_shifted_pc); |
| 271 | 271 | #endif |
| 272 | | return 0x00; |
| 273 | | } |
| 274 | | } |
| 275 | | return 0; |
| 272 | return 0x00; |
| 273 | } |
| 274 | } |
| 275 | return 0; |
| 276 | 276 | } |
| 277 | 277 | |
| 278 | 278 | WRITE8_MEMBER(replicator_state::port_w) |
| 279 | 279 | { |
| 280 | | switch( offset ) |
| 281 | | { |
| 282 | | case AVR8_IO_PORTA: |
| 283 | | { |
| 284 | | if (data == m_port_a) break; |
| 280 | switch( offset ) |
| 281 | { |
| 282 | case AVR8_IO_PORTA: |
| 283 | { |
| 284 | if (data == m_port_a) break; |
| 285 | 285 | #if LOG_PORTS |
| 286 | | UINT8 old_port_a = m_port_a; |
| 287 | | UINT8 changed = data ^ old_port_a; |
| 286 | UINT8 old_port_a = m_port_a; |
| 287 | UINT8 changed = data ^ old_port_a; |
| 288 | 288 | |
| 289 | | printf("[%08X] ", m_maincpu->m_shifted_pc); |
| 290 | | if(changed & A_AXIS_DIR) printf("[A] A_AXIS_DIR: %s\n", data & A_AXIS_DIR ? "HIGH" : "LOW"); |
| 291 | | if(changed & A_AXIS_STEP) printf("[A] A_AXIS_STEP: %s\n", data & A_AXIS_STEP ? "HIGH" : "LOW"); |
| 292 | | if(changed & A_AXIS_EN) printf("[A] A_AXIS_EN: %s\n", data & A_AXIS_EN ? "HIGH" : "LOW"); |
| 293 | | if(changed & A_AXIS_POT) printf("[A] A_AXIS_POT: %s\n", data & A_AXIS_POT ? "HIGH" : "LOW"); |
| 294 | | if(changed & B_AXIS_DIR) printf("[A] B_AXIS_DIR: %s\n", data & B_AXIS_DIR ? "HIGH" : "LOW"); |
| 295 | | if(changed & B_AXIS_STEP) printf("[A] B_AXIS_STEP: %s\n", data & B_AXIS_STEP ? "HIGH" : "LOW"); |
| 289 | printf("[%08X] ", m_maincpu->m_shifted_pc); |
| 290 | if(changed & A_AXIS_DIR) printf("[A] A_AXIS_DIR: %s\n", data & A_AXIS_DIR ? "HIGH" : "LOW"); |
| 291 | if(changed & A_AXIS_STEP) printf("[A] A_AXIS_STEP: %s\n", data & A_AXIS_STEP ? "HIGH" : "LOW"); |
| 292 | if(changed & A_AXIS_EN) printf("[A] A_AXIS_EN: %s\n", data & A_AXIS_EN ? "HIGH" : "LOW"); |
| 293 | if(changed & A_AXIS_POT) printf("[A] A_AXIS_POT: %s\n", data & A_AXIS_POT ? "HIGH" : "LOW"); |
| 294 | if(changed & B_AXIS_DIR) printf("[A] B_AXIS_DIR: %s\n", data & B_AXIS_DIR ? "HIGH" : "LOW"); |
| 295 | if(changed & B_AXIS_STEP) printf("[A] B_AXIS_STEP: %s\n", data & B_AXIS_STEP ? "HIGH" : "LOW"); |
| 296 | 296 | #endif |
| 297 | | m_port_a = data; |
| 298 | | break; |
| 299 | | } |
| 300 | | case AVR8_IO_PORTB: |
| 301 | | { |
| 302 | | if (data == m_port_b) break; |
| 297 | m_port_a = data; |
| 298 | break; |
| 299 | } |
| 300 | case AVR8_IO_PORTB: |
| 301 | { |
| 302 | if (data == m_port_b) break; |
| 303 | 303 | #if LOG_PORTS |
| 304 | | UINT8 old_port_b = m_port_b; |
| 305 | | UINT8 changed = data ^ old_port_b; |
| 304 | UINT8 old_port_b = m_port_b; |
| 305 | UINT8 changed = data ^ old_port_b; |
| 306 | 306 | |
| 307 | | printf("[%08X] ", m_maincpu->m_shifted_pc); |
| 308 | | if(changed & SD_CS) printf("[B] SD Card Chip Select: %s\n", data & SD_CS ? "HIGH" : "LOW"); |
| 309 | | if(changed & SCK_1280) printf("[B] 1280-SCK: %s\n", data & SCK_1280 ? "HIGH" : "LOW"); |
| 310 | | if(changed & MOSI_1280) printf("[B] 1280-MOSI: %s\n", data & MOSI_1280 ? "HIGH" : "LOW"); |
| 311 | | if(changed & MISO_1280) printf("[B] 1280-MISO: %s\n", data & MISO_1280 ? "HIGH" : "LOW"); |
| 312 | | if(changed & EX2_PWR_CHECK) printf("[B] EX2-PWR-CHECK: %s\n", data & EX2_PWR_CHECK ? "HIGH" : "LOW"); |
| 313 | | if(changed & EX2_HEAT) printf("[B] EX2_HEAT: %s\n", data & EX2_HEAT ? "HIGH" : "LOW"); |
| 314 | | if(changed & EX2_FAN) printf("[B] EX2_FAN: %s\n", data & EX2_FAN ? "HIGH" : "LOW"); |
| 315 | | if(changed & BLINK) printf("[B] BLINK: %s\n", data & BLINK ? "HIGH" : "LOW"); |
| 307 | printf("[%08X] ", m_maincpu->m_shifted_pc); |
| 308 | if(changed & SD_CS) printf("[B] SD Card Chip Select: %s\n", data & SD_CS ? "HIGH" : "LOW"); |
| 309 | if(changed & SCK_1280) printf("[B] 1280-SCK: %s\n", data & SCK_1280 ? "HIGH" : "LOW"); |
| 310 | if(changed & MOSI_1280) printf("[B] 1280-MOSI: %s\n", data & MOSI_1280 ? "HIGH" : "LOW"); |
| 311 | if(changed & MISO_1280) printf("[B] 1280-MISO: %s\n", data & MISO_1280 ? "HIGH" : "LOW"); |
| 312 | if(changed & EX2_PWR_CHECK) printf("[B] EX2-PWR-CHECK: %s\n", data & EX2_PWR_CHECK ? "HIGH" : "LOW"); |
| 313 | if(changed & EX2_HEAT) printf("[B] EX2_HEAT: %s\n", data & EX2_HEAT ? "HIGH" : "LOW"); |
| 314 | if(changed & EX2_FAN) printf("[B] EX2_FAN: %s\n", data & EX2_FAN ? "HIGH" : "LOW"); |
| 315 | if(changed & BLINK) printf("[B] BLINK: %s\n", data & BLINK ? "HIGH" : "LOW"); |
| 316 | 316 | #endif |
| 317 | | m_port_b = data; |
| 318 | | break; |
| 319 | | } |
| 320 | | case AVR8_IO_PORTC: |
| 321 | | { |
| 322 | | if (data == m_port_c) break; |
| 317 | m_port_b = data; |
| 318 | break; |
| 319 | } |
| 320 | case AVR8_IO_PORTC: |
| 321 | { |
| 322 | if (data == m_port_c) break; |
| 323 | 323 | |
| 324 | | UINT8 old_port_c = m_port_c; |
| 325 | | UINT8 changed = data ^ old_port_c; |
| 324 | UINT8 old_port_c = m_port_c; |
| 325 | UINT8 changed = data ^ old_port_c; |
| 326 | 326 | #if LOG_PORTS |
| 327 | | printf("[%08X] ", m_maincpu->m_shifted_pc); |
| 328 | | if(changed & EX2_1280) printf("[C] EX2_1280: %s\n", data & EX2_1280 ? "HIGH" : "LOW"); |
| 329 | | if(changed & EX1_1280) printf("[C] EX1_1280: %s\n", data & EX1_1280 ? "HIGH" : "LOW"); |
| 330 | | if(changed & LCD_CLK) printf("[C] LCD_CLK: %s\n", data & LCD_CLK ? "HIGH" : "LOW"); |
| 331 | | if(changed & LCD_DATA) printf("[C] LCD_DATA: %s\n", data & LCD_DATA ? "HIGH" : "LOW"); |
| 332 | | if(changed & LCD_STROBE) printf("[C] LCD_STROBE: %s\n", data & LCD_STROBE ? "HIGH" : "LOW"); |
| 333 | | if(changed & RLED) printf("[C] RLED: %s\n", data & RLED ? "HIGH" : "LOW"); |
| 334 | | if(changed & GLED) printf("[C] GLED: %s\n", data & GLED ? "HIGH" : "LOW"); |
| 335 | | if(changed & DETECT) printf("[C] DETECT: %s\n", data & DETECT ? "HIGH" : "LOW"); |
| 327 | printf("[%08X] ", m_maincpu->m_shifted_pc); |
| 328 | if(changed & EX2_1280) printf("[C] EX2_1280: %s\n", data & EX2_1280 ? "HIGH" : "LOW"); |
| 329 | if(changed & EX1_1280) printf("[C] EX1_1280: %s\n", data & EX1_1280 ? "HIGH" : "LOW"); |
| 330 | if(changed & LCD_CLK) printf("[C] LCD_CLK: %s\n", data & LCD_CLK ? "HIGH" : "LOW"); |
| 331 | if(changed & LCD_DATA) printf("[C] LCD_DATA: %s\n", data & LCD_DATA ? "HIGH" : "LOW"); |
| 332 | if(changed & LCD_STROBE) printf("[C] LCD_STROBE: %s\n", data & LCD_STROBE ? "HIGH" : "LOW"); |
| 333 | if(changed & RLED) printf("[C] RLED: %s\n", data & RLED ? "HIGH" : "LOW"); |
| 334 | if(changed & GLED) printf("[C] GLED: %s\n", data & GLED ? "HIGH" : "LOW"); |
| 335 | if(changed & DETECT) printf("[C] DETECT: %s\n", data & DETECT ? "HIGH" : "LOW"); |
| 336 | 336 | #endif |
| 337 | | if (changed & LCD_CLK){ |
| 338 | | /* The LCD is interfaced by an 8-bit shift register (74HC4094). */ |
| 339 | | if (data & LCD_CLK){//CLK positive edge |
| 340 | | shift_register_value = (shift_register_value << 1) | ((data & LCD_DATA) >> 3); |
| 341 | | //printf("[%08X] ", m_maincpu->m_shifted_pc); |
| 342 | | //printf("[C] LCD CLK positive edge. shift_register=0x%02X\n", shift_register_value); |
| 343 | | } |
| 344 | | } |
| 337 | if (changed & LCD_CLK){ |
| 338 | /* The LCD is interfaced by an 8-bit shift register (74HC4094). */ |
| 339 | if (data & LCD_CLK){//CLK positive edge |
| 340 | shift_register_value = (shift_register_value << 1) | ((data & LCD_DATA) >> 3); |
| 341 | //printf("[%08X] ", m_maincpu->m_shifted_pc); |
| 342 | //printf("[C] LCD CLK positive edge. shift_register=0x%02X\n", shift_register_value); |
| 343 | } |
| 344 | } |
| 345 | 345 | |
| 346 | | if(changed & LCD_STROBE){ |
| 347 | | if (data & LCD_STROBE){ //STROBE positive edge |
| 348 | | bool RS = (shift_register_value >> 1) & 1; |
| 349 | | bool RW = (shift_register_value >> 2) & 1; |
| 350 | | bool enable = (shift_register_value >> 3) & 1; |
| 351 | | UINT8 lcd_data = shift_register_value & 0xF0; |
| 346 | if(changed & LCD_STROBE){ |
| 347 | if (data & LCD_STROBE){ //STROBE positive edge |
| 348 | bool RS = (shift_register_value >> 1) & 1; |
| 349 | bool RW = (shift_register_value >> 2) & 1; |
| 350 | bool enable = (shift_register_value >> 3) & 1; |
| 351 | UINT8 lcd_data = shift_register_value & 0xF0; |
| 352 | 352 | |
| 353 | | if (enable && RW==0){ |
| 354 | | if (RS==0){ |
| 355 | | m_lcdc->control_write(space, 0, lcd_data); |
| 356 | | } else { |
| 357 | | m_lcdc->data_write(space, 0, lcd_data); |
| 358 | | } |
| 359 | | } |
| 360 | | } |
| 361 | | } |
| 362 | | m_port_c = data; |
| 353 | if (enable && RW==0){ |
| 354 | if (RS==0){ |
| 355 | m_lcdc->control_write(space, 0, lcd_data); |
| 356 | } else { |
| 357 | m_lcdc->data_write(space, 0, lcd_data); |
| 358 | } |
| 359 | } |
| 360 | } |
| 361 | } |
| 362 | m_port_c = data; |
| 363 | 363 | |
| 364 | | break; |
| 365 | | } |
| 366 | | case AVR8_IO_PORTD: |
| 367 | | { |
| 368 | | if (data == m_port_d) break; |
| 364 | break; |
| 365 | } |
| 366 | case AVR8_IO_PORTD: |
| 367 | { |
| 368 | if (data == m_port_d) break; |
| 369 | 369 | #if LOG_PORTS |
| 370 | | UINT8 old_port_d = m_port_d; |
| 371 | | UINT8 changed = data ^ old_port_d; |
| 370 | UINT8 old_port_d = m_port_d; |
| 371 | UINT8 changed = data ^ old_port_d; |
| 372 | 372 | |
| 373 | | printf("[%08X] ", m_maincpu->m_shifted_pc); |
| 374 | | if(changed & PORTD_SCL) printf("[D] PORTD_SCL: %s\n", data & PORTD_SCL ? "HIGH" : "LOW"); |
| 375 | | if(changed & PORTD_SDA) printf("[D] PORTD_SDA: %s\n", data & PORTD_SDA ? "HIGH" : "LOW"); |
| 376 | | if(changed & EX_RX_1280) printf("[D] EX_RX_1280: %s\n", data & EX_RX_1280 ? "HIGH" : "LOW"); |
| 377 | | if(changed & EX_TX_1280) printf("[D] EX_TX_1280: %s\n", data & EX_TX_1280 ? "HIGH" : "LOW"); |
| 373 | printf("[%08X] ", m_maincpu->m_shifted_pc); |
| 374 | if(changed & PORTD_SCL) printf("[D] PORTD_SCL: %s\n", data & PORTD_SCL ? "HIGH" : "LOW"); |
| 375 | if(changed & PORTD_SDA) printf("[D] PORTD_SDA: %s\n", data & PORTD_SDA ? "HIGH" : "LOW"); |
| 376 | if(changed & EX_RX_1280) printf("[D] EX_RX_1280: %s\n", data & EX_RX_1280 ? "HIGH" : "LOW"); |
| 377 | if(changed & EX_TX_1280) printf("[D] EX_TX_1280: %s\n", data & EX_TX_1280 ? "HIGH" : "LOW"); |
| 378 | 378 | #endif |
| 379 | | m_port_d = data; |
| 380 | | break; |
| 381 | | } |
| 382 | | case AVR8_IO_PORTE: |
| 383 | | { |
| 384 | | if (data == m_port_e) break; |
| 379 | m_port_d = data; |
| 380 | break; |
| 381 | } |
| 382 | case AVR8_IO_PORTE: |
| 383 | { |
| 384 | if (data == m_port_e) break; |
| 385 | 385 | #if LOG_PORTS |
| 386 | | UINT8 old_port_e = m_port_e; |
| 387 | | UINT8 changed = data ^ old_port_e; |
| 386 | UINT8 old_port_e = m_port_e; |
| 387 | UINT8 changed = data ^ old_port_e; |
| 388 | 388 | |
| 389 | | printf("[%08X] ", m_maincpu->m_shifted_pc); |
| 390 | | if(changed & RX_1280) printf("[E] 1280-RX: %s\n", data & RX_1280 ? "HIGH" : "LOW"); |
| 391 | | if(changed & TX_1280) printf("[E] 1280-TX: %s\n", data & TX_1280 ? "HIGH" : "LOW"); |
| 392 | | if(changed & THERMO_SCK) printf("[E] THERMO-SCK: %s\n", data & THERMO_SCK ? "HIGH" : "LOW"); |
| 393 | | if(changed & THERMO_CS1) printf("[E] THERMO-CS1: %s\n", data & THERMO_CS1 ? "HIGH" : "LOW"); |
| 394 | | if(changed & THERMO_CS2) printf("[E] THERMO-CS2: %s\n", data & THERMO_CS2 ? "HIGH" : "LOW"); |
| 395 | | if(changed & THERMO_DO) printf("[E] THERMO-DO: %s\n", data & THERMO_DO ? "HIGH" : "LOW"); |
| 389 | printf("[%08X] ", m_maincpu->m_shifted_pc); |
| 390 | if(changed & RX_1280) printf("[E] 1280-RX: %s\n", data & RX_1280 ? "HIGH" : "LOW"); |
| 391 | if(changed & TX_1280) printf("[E] 1280-TX: %s\n", data & TX_1280 ? "HIGH" : "LOW"); |
| 392 | if(changed & THERMO_SCK) printf("[E] THERMO-SCK: %s\n", data & THERMO_SCK ? "HIGH" : "LOW"); |
| 393 | if(changed & THERMO_CS1) printf("[E] THERMO-CS1: %s\n", data & THERMO_CS1 ? "HIGH" : "LOW"); |
| 394 | if(changed & THERMO_CS2) printf("[E] THERMO-CS2: %s\n", data & THERMO_CS2 ? "HIGH" : "LOW"); |
| 395 | if(changed & THERMO_DO) printf("[E] THERMO-DO: %s\n", data & THERMO_DO ? "HIGH" : "LOW"); |
| 396 | 396 | #endif |
| 397 | | m_port_e = data; |
| 398 | | break; |
| 399 | | } |
| 400 | | case AVR8_IO_PORTF: |
| 401 | | { |
| 402 | | if (data == m_port_f) break; |
| 397 | m_port_e = data; |
| 398 | break; |
| 399 | } |
| 400 | case AVR8_IO_PORTF: |
| 401 | { |
| 402 | if (data == m_port_f) break; |
| 403 | 403 | #if LOG_PORTS |
| 404 | | UINT8 old_port_f = m_port_f; |
| 405 | | UINT8 changed = data ^ old_port_f; |
| 404 | UINT8 old_port_f = m_port_f; |
| 405 | UINT8 changed = data ^ old_port_f; |
| 406 | 406 | |
| 407 | | printf("[%08X] ", m_maincpu->m_shifted_pc); |
| 408 | | if(changed & X_AXIS_DIR) printf("[F] X_AXIS_DIR: %s\n", data & X_AXIS_DIR ? "HIGH" : "LOW"); |
| 409 | | if(changed & X_AXIS_STEP) printf("[F] X_AXIS_STEP: %s\n", data & X_AXIS_STEP ? "HIGH" : "LOW"); |
| 410 | | if(changed & X_AXIS_EN) printf("[F] X_AXIS_EN: %s\n", data & X_AXIS_EN ? "HIGH" : "LOW"); |
| 411 | | if(changed & X_AXIS_POT) printf("[F] X_AXIS_POT: %s\n", data & X_AXIS_POT ? "HIGH" : "LOW"); |
| 412 | | if(changed & Y_AXIS_DIR) printf("[F] Y_AXIS_DIR: %s\n", data & Y_AXIS_DIR ? "HIGH" : "LOW"); |
| 413 | | if(changed & Y_AXIS_STEP) printf("[F] Y_AXIS_STEP: %s\n", data & Y_AXIS_STEP ? "HIGH" : "LOW"); |
| 414 | | if(changed & Y_AXIS_EN) printf("[F] Y_AXIS_EN: %s\n", data & Y_AXIS_EN ? "HIGH" : "LOW"); |
| 415 | | if(changed & Y_AXIS_POT) printf("[F] Y_AXIS_POT: %s\n", data & Y_AXIS_POT ? "HIGH" : "LOW"); |
| 407 | printf("[%08X] ", m_maincpu->m_shifted_pc); |
| 408 | if(changed & X_AXIS_DIR) printf("[F] X_AXIS_DIR: %s\n", data & X_AXIS_DIR ? "HIGH" : "LOW"); |
| 409 | if(changed & X_AXIS_STEP) printf("[F] X_AXIS_STEP: %s\n", data & X_AXIS_STEP ? "HIGH" : "LOW"); |
| 410 | if(changed & X_AXIS_EN) printf("[F] X_AXIS_EN: %s\n", data & X_AXIS_EN ? "HIGH" : "LOW"); |
| 411 | if(changed & X_AXIS_POT) printf("[F] X_AXIS_POT: %s\n", data & X_AXIS_POT ? "HIGH" : "LOW"); |
| 412 | if(changed & Y_AXIS_DIR) printf("[F] Y_AXIS_DIR: %s\n", data & Y_AXIS_DIR ? "HIGH" : "LOW"); |
| 413 | if(changed & Y_AXIS_STEP) printf("[F] Y_AXIS_STEP: %s\n", data & Y_AXIS_STEP ? "HIGH" : "LOW"); |
| 414 | if(changed & Y_AXIS_EN) printf("[F] Y_AXIS_EN: %s\n", data & Y_AXIS_EN ? "HIGH" : "LOW"); |
| 415 | if(changed & Y_AXIS_POT) printf("[F] Y_AXIS_POT: %s\n", data & Y_AXIS_POT ? "HIGH" : "LOW"); |
| 416 | 416 | #endif |
| 417 | | m_port_f = data; |
| 418 | | break; |
| 419 | | } |
| 420 | | case AVR8_IO_PORTG: |
| 421 | | { |
| 422 | | if (data == m_port_g) break; |
| 417 | m_port_f = data; |
| 418 | break; |
| 419 | } |
| 420 | case AVR8_IO_PORTG: |
| 421 | { |
| 422 | if (data == m_port_g) break; |
| 423 | 423 | |
| 424 | | UINT8 old_port_g = m_port_g; |
| 425 | | UINT8 changed = data ^ old_port_g; |
| 424 | UINT8 old_port_g = m_port_g; |
| 425 | UINT8 changed = data ^ old_port_g; |
| 426 | 426 | |
| 427 | 427 | #if LOG_PORTS |
| 428 | | printf("[%08X] ", m_maincpu->m_shifted_pc); |
| 429 | | if(changed & EX4_1280) printf("[G] EX4_1280: %s\n", data & EX4_1280 ? "HIGH" : "LOW"); |
| 430 | | if(changed & EX3_1280) printf("[G] EX3_1280: %s\n", data & EX3_1280 ? "HIGH" : "LOW"); |
| 431 | | if(changed & B_AXIS_EN) printf("[G] B_AXIS_EN: %s\n", data & B_AXIS_EN ? "HIGH" : "LOW"); |
| 432 | | if(changed & CUTOFF_SR_CHECK) printf("[G] CUTOFF_SR_CHECK: %s\n", data & CUTOFF_SR_CHECK ? "HIGH" : "LOW"); |
| 433 | | if(changed & BUZZ) printf("[G] BUZZ: %s\n", data & BUZZ ? "HIGH" : "LOW"); |
| 428 | printf("[%08X] ", m_maincpu->m_shifted_pc); |
| 429 | if(changed & EX4_1280) printf("[G] EX4_1280: %s\n", data & EX4_1280 ? "HIGH" : "LOW"); |
| 430 | if(changed & EX3_1280) printf("[G] EX3_1280: %s\n", data & EX3_1280 ? "HIGH" : "LOW"); |
| 431 | if(changed & B_AXIS_EN) printf("[G] B_AXIS_EN: %s\n", data & B_AXIS_EN ? "HIGH" : "LOW"); |
| 432 | if(changed & CUTOFF_SR_CHECK) printf("[G] CUTOFF_SR_CHECK: %s\n", data & CUTOFF_SR_CHECK ? "HIGH" : "LOW"); |
| 433 | if(changed & BUZZ) printf("[G] BUZZ: %s\n", data & BUZZ ? "HIGH" : "LOW"); |
| 434 | 434 | #endif |
| 435 | 435 | |
| 436 | | if(changed & BUZZ){ |
| 437 | | /* FIX-ME: What is the largest sample value allowed? |
| 438 | | I'm using 0x3F based on what I see in src/mame/drivers/craft.c |
| 439 | | But as the method is called "write_unsigned8", I guess we could have samples with values up to 0xFF, right? |
| 440 | | Anyway... With the 0x3F value we'll get a sound that is not so loud, which may be less annoying... :-) |
| 441 | | */ |
| 442 | | UINT8 audio_sample = (data & BUZZ) ? 0x3F : 0; |
| 443 | | m_dac->write_unsigned8(audio_sample << 1); |
| 444 | | } |
| 436 | if(changed & BUZZ){ |
| 437 | /* FIX-ME: What is the largest sample value allowed? |
| 438 | I'm using 0x3F based on what I see in src/mame/drivers/craft.c |
| 439 | But as the method is called "write_unsigned8", I guess we could have samples with values up to 0xFF, right? |
| 440 | Anyway... With the 0x3F value we'll get a sound that is not so loud, which may be less annoying... :-) |
| 441 | */ |
| 442 | UINT8 audio_sample = (data & BUZZ) ? 0x3F : 0; |
| 443 | m_dac->write_unsigned8(audio_sample << 1); |
| 444 | } |
| 445 | 445 | |
| 446 | | m_port_g = data; |
| 447 | | break; |
| 448 | | } |
| 449 | | case AVR8_IO_PORTH: |
| 450 | | { |
| 451 | | if (data == m_port_h) break; |
| 446 | m_port_g = data; |
| 447 | break; |
| 448 | } |
| 449 | case AVR8_IO_PORTH: |
| 450 | { |
| 451 | if (data == m_port_h) break; |
| 452 | 452 | #if LOG_PORTS |
| 453 | | UINT8 old_port_h = m_port_h; |
| 454 | | UINT8 changed = data ^ old_port_h; |
| 453 | UINT8 old_port_h = m_port_h; |
| 454 | UINT8 changed = data ^ old_port_h; |
| 455 | 455 | |
| 456 | | printf("[%08X] ", m_maincpu->m_shifted_pc); |
| 457 | | if(changed & CUTOFF_TEST) printf("[H] CUTOFF_TEST: %s\n", data & CUTOFF_TEST ? "HIGH" : "LOW"); |
| 458 | | if(changed & CUTOFF_RESET) printf("[H] CUTOFF_RESET: %s\n", data & CUTOFF_RESET ? "HIGH" : "LOW"); |
| 459 | | if(changed & EX1_PWR_CHECK) printf("[H] EX1_PWR_CHECK: %s\n", data & EX1_PWR_CHECK ? "HIGH" : "LOW"); |
| 460 | | if(changed & EX1_HEAT) printf("[H] EX1_HEAT: %s\n", data & EX1_HEAT ? "HIGH" : "LOW"); |
| 461 | | if(changed & EX1_FAN) printf("[H] EX1_FAN: %s\n", data & EX1_FAN ? "HIGH" : "LOW"); |
| 462 | | if(changed & SD_WP) printf("[H] SD_WP: %s\n", data & SD_WP ? "HIGH" : "LOW"); |
| 463 | | if(changed & SD_CD) printf("[H] SD_CD: %s\n", data & SD_CD ? "HIGH" : "LOW"); |
| 456 | printf("[%08X] ", m_maincpu->m_shifted_pc); |
| 457 | if(changed & CUTOFF_TEST) printf("[H] CUTOFF_TEST: %s\n", data & CUTOFF_TEST ? "HIGH" : "LOW"); |
| 458 | if(changed & CUTOFF_RESET) printf("[H] CUTOFF_RESET: %s\n", data & CUTOFF_RESET ? "HIGH" : "LOW"); |
| 459 | if(changed & EX1_PWR_CHECK) printf("[H] EX1_PWR_CHECK: %s\n", data & EX1_PWR_CHECK ? "HIGH" : "LOW"); |
| 460 | if(changed & EX1_HEAT) printf("[H] EX1_HEAT: %s\n", data & EX1_HEAT ? "HIGH" : "LOW"); |
| 461 | if(changed & EX1_FAN) printf("[H] EX1_FAN: %s\n", data & EX1_FAN ? "HIGH" : "LOW"); |
| 462 | if(changed & SD_WP) printf("[H] SD_WP: %s\n", data & SD_WP ? "HIGH" : "LOW"); |
| 463 | if(changed & SD_CD) printf("[H] SD_CD: %s\n", data & SD_CD ? "HIGH" : "LOW"); |
| 464 | 464 | #endif |
| 465 | | m_port_h = data; |
| 466 | | break; |
| 467 | | } |
| 468 | | case AVR8_IO_PORTJ: |
| 469 | | { |
| 470 | | if (data == m_port_j) break; |
| 465 | m_port_h = data; |
| 466 | break; |
| 467 | } |
| 468 | case AVR8_IO_PORTJ: |
| 469 | { |
| 470 | if (data == m_port_j) break; |
| 471 | 471 | #if LOG_PORTS |
| 472 | | UINT8 old_port_j = m_port_j; |
| 473 | | UINT8 changed = data ^ old_port_j; |
| 472 | UINT8 old_port_j = m_port_j; |
| 473 | UINT8 changed = data ^ old_port_j; |
| 474 | 474 | |
| 475 | | printf("[%08X] ", m_maincpu->m_shifted_pc); |
| 476 | | if(changed & BUTTON_CENTER) printf("[J] BUTTON_CENTER: %s\n", data & BUTTON_CENTER ? "HIGH" : "LOW"); |
| 477 | | if(changed & BUTTON_RIGHT) printf("[J] BUTTON_RIGHT: %s\n", data & BUTTON_RIGHT ? "HIGH" : "LOW"); |
| 478 | | if(changed & BUTTON_LEFT) printf("[J] BUTTON_LEFT: %s\n", data & BUTTON_LEFT ? "HIGH" : "LOW"); |
| 479 | | if(changed & BUTTON_DOWN) printf("[J] BUTTON_DOWN: %s\n", data & BUTTON_DOWN ? "HIGH" : "LOW"); |
| 480 | | if(changed & BUTTON_UP) printf("[J] BUTTON_UP: %s\n", data & BUTTON_UP ? "HIGH" : "LOW"); |
| 481 | | if(changed & POTS_SCL) printf("[J] POTS_SCL: %s\n", data & POTS_SCL ? "HIGH" : "LOW"); |
| 482 | | if(changed & B_AXIS_POT) printf("[J] B_AXIS_POT: %s\n", data & B_AXIS_POT ? "HIGH" : "LOW"); |
| 475 | printf("[%08X] ", m_maincpu->m_shifted_pc); |
| 476 | if(changed & BUTTON_CENTER) printf("[J] BUTTON_CENTER: %s\n", data & BUTTON_CENTER ? "HIGH" : "LOW"); |
| 477 | if(changed & BUTTON_RIGHT) printf("[J] BUTTON_RIGHT: %s\n", data & BUTTON_RIGHT ? "HIGH" : "LOW"); |
| 478 | if(changed & BUTTON_LEFT) printf("[J] BUTTON_LEFT: %s\n", data & BUTTON_LEFT ? "HIGH" : "LOW"); |
| 479 | if(changed & BUTTON_DOWN) printf("[J] BUTTON_DOWN: %s\n", data & BUTTON_DOWN ? "HIGH" : "LOW"); |
| 480 | if(changed & BUTTON_UP) printf("[J] BUTTON_UP: %s\n", data & BUTTON_UP ? "HIGH" : "LOW"); |
| 481 | if(changed & POTS_SCL) printf("[J] POTS_SCL: %s\n", data & POTS_SCL ? "HIGH" : "LOW"); |
| 482 | if(changed & B_AXIS_POT) printf("[J] B_AXIS_POT: %s\n", data & B_AXIS_POT ? "HIGH" : "LOW"); |
| 483 | 483 | #endif |
| 484 | | m_port_j = data; |
| 485 | | break; |
| 486 | | } |
| 487 | | case AVR8_IO_PORTK: |
| 488 | | { |
| 489 | | if (data == m_port_k) break; |
| 484 | m_port_j = data; |
| 485 | break; |
| 486 | } |
| 487 | case AVR8_IO_PORTK: |
| 488 | { |
| 489 | if (data == m_port_k) break; |
| 490 | 490 | #if LOG_PORTS |
| 491 | | UINT8 old_port_k = m_port_k; |
| 492 | | UINT8 changed = data ^ old_port_k; |
| 491 | UINT8 old_port_k = m_port_k; |
| 492 | UINT8 changed = data ^ old_port_k; |
| 493 | 493 | |
| 494 | | printf("[%08X] ", m_maincpu->m_shifted_pc); |
| 495 | | if(changed & Z_AXIS_DIR) printf("[K] Z_AXIS_DIR: %s\n", data & Z_AXIS_DIR ? "HIGH" : "LOW"); |
| 496 | | if(changed & Z_AXIS_STEP) printf("[K] Z_AXIS_STEP: %s\n", data & Z_AXIS_STEP ? "HIGH" : "LOW"); |
| 497 | | if(changed & Z_AXIS_EN) printf("[K] Z_AXIS_EN: %s\n", data & Z_AXIS_EN ? "HIGH" : "LOW"); |
| 498 | | if(changed & Z_AXIS_POT) printf("[K] Z_AXIS_POT: %s\n", data & Z_AXIS_POT ? "HIGH" : "LOW"); |
| 499 | | if(changed & EX7_1280) printf("[K] EX7_1280: %s\n", data & EX7_1280 ? "HIGH" : "LOW"); |
| 500 | | if(changed & EX6_1280) printf("[K] EX6_1280: %s\n", data & EX6_1280 ? "HIGH" : "LOW"); |
| 501 | | if(changed & EX5_1280) printf("[K] EX5_1280: %s\n", data & EX5_1280 ? "HIGH" : "LOW"); |
| 502 | | if(changed & HBP_THERM) printf("[K] HBP_THERM: %s\n", data & HBP_THERM ? "HIGH" : "LOW"); |
| 494 | printf("[%08X] ", m_maincpu->m_shifted_pc); |
| 495 | if(changed & Z_AXIS_DIR) printf("[K] Z_AXIS_DIR: %s\n", data & Z_AXIS_DIR ? "HIGH" : "LOW"); |
| 496 | if(changed & Z_AXIS_STEP) printf("[K] Z_AXIS_STEP: %s\n", data & Z_AXIS_STEP ? "HIGH" : "LOW"); |
| 497 | if(changed & Z_AXIS_EN) printf("[K] Z_AXIS_EN: %s\n", data & Z_AXIS_EN ? "HIGH" : "LOW"); |
| 498 | if(changed & Z_AXIS_POT) printf("[K] Z_AXIS_POT: %s\n", data & Z_AXIS_POT ? "HIGH" : "LOW"); |
| 499 | if(changed & EX7_1280) printf("[K] EX7_1280: %s\n", data & EX7_1280 ? "HIGH" : "LOW"); |
| 500 | if(changed & EX6_1280) printf("[K] EX6_1280: %s\n", data & EX6_1280 ? "HIGH" : "LOW"); |
| 501 | if(changed & EX5_1280) printf("[K] EX5_1280: %s\n", data & EX5_1280 ? "HIGH" : "LOW"); |
| 502 | if(changed & HBP_THERM) printf("[K] HBP_THERM: %s\n", data & HBP_THERM ? "HIGH" : "LOW"); |
| 503 | 503 | #endif |
| 504 | | m_port_k = data; |
| 505 | | break; |
| 506 | | } |
| 507 | | case AVR8_IO_PORTL: |
| 508 | | { |
| 509 | | if (data == m_port_l) break; |
| 504 | m_port_k = data; |
| 505 | break; |
| 506 | } |
| 507 | case AVR8_IO_PORTL: |
| 508 | { |
| 509 | if (data == m_port_l) break; |
| 510 | 510 | #if LOG_PORTS |
| 511 | | UINT8 old_port_l = m_port_l; |
| 512 | | UINT8 changed = data ^ old_port_l; |
| 511 | UINT8 old_port_l = m_port_l; |
| 512 | UINT8 changed = data ^ old_port_l; |
| 513 | 513 | |
| 514 | | printf("[%08X] ", m_maincpu->m_shifted_pc); |
| 515 | | if(changed & X_MIN) printf("[L] X_MIN: %s\n", data & X_MIN ? "HIGH" : "LOW"); |
| 516 | | if(changed & X_MAX) printf("[L] X_MAX: %s\n", data & X_MAX ? "HIGH" : "LOW"); |
| 517 | | if(changed & Y_MIN) printf("[L] Y_MIN: %s\n", data & Y_MIN ? "HIGH" : "LOW"); |
| 518 | | if(changed & Y_MAX) printf("[L] Y_MAX: %s\n", data & Y_MAX ? "HIGH" : "LOW"); |
| 519 | | if(changed & HBP) printf("[L] HBP: %s\n", data & HBP ? "HIGH" : "LOW"); |
| 520 | | if(changed & EXTRA_FET) printf("[L] EXTRA_FET: %s\n", data & EXTRA_FET ? "HIGH" : "LOW"); |
| 521 | | if(changed & Z_MIN) printf("[L] Z_MIN: %s\n", data & Z_MIN ? "HIGH" : "LOW"); |
| 522 | | if(changed & Z_MAX) printf("[L] Z_MAX: %s\n", data & Z_MAX ? "HIGH" : "LOW"); |
| 514 | printf("[%08X] ", m_maincpu->m_shifted_pc); |
| 515 | if(changed & X_MIN) printf("[L] X_MIN: %s\n", data & X_MIN ? "HIGH" : "LOW"); |
| 516 | if(changed & X_MAX) printf("[L] X_MAX: %s\n", data & X_MAX ? "HIGH" : "LOW"); |
| 517 | if(changed & Y_MIN) printf("[L] Y_MIN: %s\n", data & Y_MIN ? "HIGH" : "LOW"); |
| 518 | if(changed & Y_MAX) printf("[L] Y_MAX: %s\n", data & Y_MAX ? "HIGH" : "LOW"); |
| 519 | if(changed & HBP) printf("[L] HBP: %s\n", data & HBP ? "HIGH" : "LOW"); |
| 520 | if(changed & EXTRA_FET) printf("[L] EXTRA_FET: %s\n", data & EXTRA_FET ? "HIGH" : "LOW"); |
| 521 | if(changed & Z_MIN) printf("[L] Z_MIN: %s\n", data & Z_MIN ? "HIGH" : "LOW"); |
| 522 | if(changed & Z_MAX) printf("[L] Z_MAX: %s\n", data & Z_MAX ? "HIGH" : "LOW"); |
| 523 | 523 | #endif |
| 524 | | m_port_l = data; |
| 525 | | break; |
| 526 | | } |
| 527 | | } |
| 524 | m_port_l = data; |
| 525 | break; |
| 526 | } |
| 527 | } |
| 528 | 528 | } |
| 529 | 529 | |
| 530 | 530 | /****************************************************\ |
| r249940 | r249941 | |
|---|
| 532 | 532 | \****************************************************/ |
| 533 | 533 | |
| 534 | 534 | static ADDRESS_MAP_START( replicator_prg_map, AS_PROGRAM, 8, replicator_state ) |
| 535 | | AM_RANGE(0x0000, 0x1FFFF) AM_ROM |
| 535 | AM_RANGE(0x0000, 0x1FFFF) AM_ROM |
| 536 | 536 | ADDRESS_MAP_END |
| 537 | 537 | |
| 538 | 538 | static ADDRESS_MAP_START( replicator_data_map, AS_DATA, 8, replicator_state ) |
| 539 | | AM_RANGE(0x0200, 0x21FF) AM_RAM /* ATMEGA1280 Internal SRAM */ |
| 539 | AM_RANGE(0x0200, 0x21FF) AM_RAM /* ATMEGA1280 Internal SRAM */ |
| 540 | 540 | ADDRESS_MAP_END |
| 541 | 541 | |
| 542 | 542 | static ADDRESS_MAP_START( replicator_io_map, AS_IO, 8, replicator_state ) |
| 543 | | AM_RANGE(AVR8_IO_PORTA, AVR8_IO_PORTL) AM_READWRITE( port_r, port_w ) |
| 543 | AM_RANGE(AVR8_IO_PORTA, AVR8_IO_PORTL) AM_READWRITE( port_r, port_w ) |
| 544 | 544 | ADDRESS_MAP_END |
| 545 | 545 | |
| 546 | 546 | /****************************************************\ |
| r249940 | r249941 | |
|---|
| 548 | 548 | \****************************************************/ |
| 549 | 549 | |
| 550 | 550 | static INPUT_PORTS_START( replicator ) |
| 551 | | PORT_START("keypad") |
| 552 | | PORT_BIT(0x00000001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("CENTER") PORT_CODE(KEYCODE_M) |
| 553 | | PORT_BIT(0x00000002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("RIGHT") PORT_CODE(KEYCODE_D) |
| 554 | | PORT_BIT(0x00000004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("LEFT") PORT_CODE(KEYCODE_A) |
| 555 | | PORT_BIT(0x00000008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("DOWN") PORT_CODE(KEYCODE_S) |
| 556 | | PORT_BIT(0x00000010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("UP") PORT_CODE(KEYCODE_W) |
| 551 | PORT_START("keypad") |
| 552 | PORT_BIT(0x00000001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("CENTER") PORT_CODE(KEYCODE_M) |
| 553 | PORT_BIT(0x00000002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("RIGHT") PORT_CODE(KEYCODE_D) |
| 554 | PORT_BIT(0x00000004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("LEFT") PORT_CODE(KEYCODE_A) |
| 555 | PORT_BIT(0x00000008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("DOWN") PORT_CODE(KEYCODE_S) |
| 556 | PORT_BIT(0x00000010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("UP") PORT_CODE(KEYCODE_W) |
| 557 | 557 | INPUT_PORTS_END |
| 558 | 558 | |
| 559 | 559 | /****************************************************\ |
| r249940 | r249941 | |
|---|
| 566 | 566 | |
| 567 | 567 | void replicator_state::machine_reset() |
| 568 | 568 | { |
| 569 | | shift_register_value = 0; |
| 570 | | m_port_a = 0; |
| 571 | | m_port_b = 0; |
| 572 | | m_port_c = 0; |
| 573 | | m_port_d = 0; |
| 574 | | m_port_e = 0; |
| 575 | | m_port_f = 0; |
| 576 | | m_port_g = 0; |
| 577 | | m_port_h = 0; |
| 578 | | m_port_j = 0; |
| 579 | | m_port_k = 0; |
| 580 | | m_port_l = 0; |
| 569 | shift_register_value = 0; |
| 570 | m_port_a = 0; |
| 571 | m_port_b = 0; |
| 572 | m_port_c = 0; |
| 573 | m_port_d = 0; |
| 574 | m_port_e = 0; |
| 575 | m_port_f = 0; |
| 576 | m_port_g = 0; |
| 577 | m_port_h = 0; |
| 578 | m_port_j = 0; |
| 579 | m_port_k = 0; |
| 580 | m_port_l = 0; |
| 581 | 581 | } |
| 582 | 582 | |
| 583 | 583 | PALETTE_INIT_MEMBER(replicator_state, replicator) |
| 584 | 584 | { |
| 585 | 585 | //These colors were picked with the color picker in Inkscape, based on a photo of the LCD used in the Replicator 1 3d printer: |
| 586 | | palette.set_pen_color(0, rgb_t(0xCA, 0xE7, 0xEB)); |
| 587 | | palette.set_pen_color(1, rgb_t(0x78, 0xAB, 0xA8)); |
| 586 | palette.set_pen_color(0, rgb_t(0xCA, 0xE7, 0xEB)); |
| 587 | palette.set_pen_color(1, rgb_t(0x78, 0xAB, 0xA8)); |
| 588 | 588 | } |
| 589 | 589 | |
| 590 | 590 | static const gfx_layout hd44780_charlayout = |
| 591 | 591 | { |
| 592 | | 5, 8, /* 5 x 8 characters */ |
| 593 | | 256, /* 256 characters */ |
| 594 | | 1, /* 1 bits per pixel */ |
| 595 | | { 0 }, /* no bitplanes */ |
| 596 | | { 3, 4, 5, 6, 7}, |
| 597 | | { 0, 8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8}, |
| 598 | | 8*8 /* 8 bytes */ |
| 592 | 5, 8, /* 5 x 8 characters */ |
| 593 | 256, /* 256 characters */ |
| 594 | 1, /* 1 bits per pixel */ |
| 595 | { 0 }, /* no bitplanes */ |
| 596 | { 3, 4, 5, 6, 7}, |
| 597 | { 0, 8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8}, |
| 598 | 8*8 /* 8 bytes */ |
| 599 | 599 | }; |
| 600 | 600 | |
| 601 | 601 | static GFXDECODE_START( replicator ) |
| 602 | | GFXDECODE_ENTRY( "hd44780:cgrom", 0x0000, hd44780_charlayout, 0, 1 ) |
| 602 | GFXDECODE_ENTRY( "hd44780:cgrom", 0x0000, hd44780_charlayout, 0, 1 ) |
| 603 | 603 | GFXDECODE_END |
| 604 | 604 | |
| 605 | 605 | static MACHINE_CONFIG_START( replicator, replicator_state ) |
| 606 | 606 | |
| 607 | | MCFG_CPU_ADD("maincpu", ATMEGA1280, MASTER_CLOCK) |
| 608 | | MCFG_CPU_PROGRAM_MAP(replicator_prg_map) |
| 609 | | MCFG_CPU_DATA_MAP(replicator_data_map) |
| 610 | | MCFG_CPU_IO_MAP(replicator_io_map) |
| 607 | MCFG_CPU_ADD("maincpu", ATMEGA1280, MASTER_CLOCK) |
| 608 | MCFG_CPU_PROGRAM_MAP(replicator_prg_map) |
| 609 | MCFG_CPU_DATA_MAP(replicator_data_map) |
| 610 | MCFG_CPU_IO_MAP(replicator_io_map) |
| 611 | 611 | |
| 612 | | MCFG_CPU_AVR8_EEPROM("eeprom") |
| 613 | | MCFG_CPU_AVR8_LFUSE(0xFF) |
| 614 | | MCFG_CPU_AVR8_HFUSE(0xDA) |
| 615 | | MCFG_CPU_AVR8_EFUSE(0xF4) |
| 616 | | MCFG_CPU_AVR8_LOCK(0x0F) |
| 612 | MCFG_CPU_AVR8_EEPROM("eeprom") |
| 613 | MCFG_CPU_AVR8_LFUSE(0xFF) |
| 614 | MCFG_CPU_AVR8_HFUSE(0xDA) |
| 615 | MCFG_CPU_AVR8_EFUSE(0xF4) |
| 616 | MCFG_CPU_AVR8_LOCK(0x0F) |
| 617 | 617 | |
| 618 | | /*TODO: Add an ATMEGA8U2 for USB-Serial communications */ |
| 618 | /*TODO: Add an ATMEGA8U2 for USB-Serial communications */ |
| 619 | 619 | |
| 620 | | /* video hardware */ |
| 621 | | MCFG_SCREEN_ADD("screen", LCD) |
| 622 | | MCFG_SCREEN_REFRESH_RATE(50) |
| 623 | | MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */ |
| 624 | | MCFG_SCREEN_UPDATE_DEVICE("hd44780", hd44780_device, screen_update) |
| 625 | | MCFG_SCREEN_SIZE(120, 18*2) //4x20 chars |
| 626 | | MCFG_SCREEN_VISIBLE_AREA(0, 120-1, 0, 18*2-1) |
| 627 | | MCFG_SCREEN_PALETTE("palette") |
| 620 | /* video hardware */ |
| 621 | MCFG_SCREEN_ADD("screen", LCD) |
| 622 | MCFG_SCREEN_REFRESH_RATE(50) |
| 623 | MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */ |
| 624 | MCFG_SCREEN_UPDATE_DEVICE("hd44780", hd44780_device, screen_update) |
| 625 | MCFG_SCREEN_SIZE(120, 18*2) //4x20 chars |
| 626 | MCFG_SCREEN_VISIBLE_AREA(0, 120-1, 0, 18*2-1) |
| 627 | MCFG_SCREEN_PALETTE("palette") |
| 628 | 628 | |
| 629 | | MCFG_PALETTE_ADD("palette", 2) |
| 630 | | MCFG_PALETTE_INIT_OWNER(replicator_state, replicator) |
| 631 | | MCFG_GFXDECODE_ADD("gfxdecode", "palette", replicator) |
| 632 | | MCFG_DEFAULT_LAYOUT(layout_lcd) |
| 629 | MCFG_PALETTE_ADD("palette", 2) |
| 630 | MCFG_PALETTE_INIT_OWNER(replicator_state, replicator) |
| 631 | MCFG_GFXDECODE_ADD("gfxdecode", "palette", replicator) |
| 632 | MCFG_DEFAULT_LAYOUT(layout_lcd) |
| 633 | 633 | |
| 634 | | MCFG_HD44780_ADD("hd44780") |
| 635 | | MCFG_HD44780_LCD_SIZE(4, 20) |
| 634 | MCFG_HD44780_ADD("hd44780") |
| 635 | MCFG_HD44780_LCD_SIZE(4, 20) |
| 636 | 636 | |
| 637 | | /* sound hardware */ |
| 638 | | /* A piezo is connected to the PORT G bit 5 (OC0B pin driven by Timer/Counter #4) */ |
| 639 | | MCFG_SPEAKER_STANDARD_MONO("buzzer") |
| 640 | | MCFG_SOUND_ADD("dac", DAC, 0) |
| 641 | | MCFG_SOUND_ROUTE(0, "buzzer", 1.00) |
| 637 | /* sound hardware */ |
| 638 | /* A piezo is connected to the PORT G bit 5 (OC0B pin driven by Timer/Counter #4) */ |
| 639 | MCFG_SPEAKER_STANDARD_MONO("buzzer") |
| 640 | MCFG_SOUND_ADD("dac", DAC, 0) |
| 641 | MCFG_SOUND_ROUTE(0, "buzzer", 1.00) |
| 642 | 642 | |
| 643 | 643 | MACHINE_CONFIG_END |
| 644 | 644 | |
| 645 | 645 | ROM_START( replica1 ) |
| 646 | | ROM_REGION( 0x20000, "maincpu", 0 ) |
| 647 | | ROM_DEFAULT_BIOS("v750") |
| 646 | ROM_REGION( 0x20000, "maincpu", 0 ) |
| 647 | ROM_DEFAULT_BIOS("v750") |
| 648 | 648 | |
| 649 | | /* Version 5.1 release: |
| 650 | | - Initial firmware release |
| 651 | | */ |
| 652 | | ROM_SYSTEM_BIOS( 0, "v51", "V 5.1" ) |
| 653 | | ROMX_LOAD("mighty-mb40-v5.1.bin", 0x0000, 0x10b90, CRC(20d65cd1) SHA1(da18c3eb5a29a6bc1eecd92eaae6063fe29d0305), ROM_BIOS(1)) |
| 649 | /* Version 5.1 release: |
| 650 | - Initial firmware release |
| 651 | */ |
| 652 | ROM_SYSTEM_BIOS( 0, "v51", "V 5.1" ) |
| 653 | ROMX_LOAD("mighty-mb40-v5.1.bin", 0x0000, 0x10b90, CRC(20d65cd1) SHA1(da18c3eb5a29a6bc1eecd92eaae6063fe29d0305), ROM_BIOS(1)) |
| 654 | 654 | |
| 655 | | /* Version 5.2 release: |
| 656 | | - Nozzle Tolerance added to EEPROM |
| 657 | | - Updated onboard menus |
| 658 | | - X,Y calibration tool added |
| 659 | | */ |
| 660 | | ROM_SYSTEM_BIOS( 1, "v52", "V 5.2" ) |
| 661 | | ROMX_LOAD("mighty-mb40-v5.2.bin", 0x0000, 0x126c4, CRC(555e47cf) SHA1(9d24a3dbeddce16669bb4d29c3366220ddf15d2a), ROM_BIOS(2)) |
| 655 | /* Version 5.2 release: |
| 656 | - Nozzle Tolerance added to EEPROM |
| 657 | - Updated onboard menus |
| 658 | - X,Y calibration tool added |
| 659 | */ |
| 660 | ROM_SYSTEM_BIOS( 1, "v52", "V 5.2" ) |
| 661 | ROMX_LOAD("mighty-mb40-v5.2.bin", 0x0000, 0x126c4, CRC(555e47cf) SHA1(9d24a3dbeddce16669bb4d29c3366220ddf15d2a), ROM_BIOS(2)) |
| 662 | 662 | |
| 663 | | /* Version 5.5 release: |
| 664 | | - Acceleration added to motor motion |
| 665 | | - Digipot updates |
| 666 | | */ |
| 667 | | ROM_SYSTEM_BIOS( 2, "v55", "V 5.5" ) |
| 668 | | ROMX_LOAD("mighty-mb40-v5.5.bin", 0x0000, 0x1a420, CRC(9327d7e4) SHA1(d734ba2bda12f50ec3ac0035ab11591909d9edde), ROM_BIOS(3)) |
| 663 | /* Version 5.5 release: |
| 664 | - Acceleration added to motor motion |
| 665 | - Digipot updates |
| 666 | */ |
| 667 | ROM_SYSTEM_BIOS( 2, "v55", "V 5.5" ) |
| 668 | ROMX_LOAD("mighty-mb40-v5.5.bin", 0x0000, 0x1a420, CRC(9327d7e4) SHA1(d734ba2bda12f50ec3ac0035ab11591909d9edde), ROM_BIOS(3)) |
| 669 | 669 | |
| 670 | | /* Version 6.2.0 release: |
| 671 | | - Bug fix release to firmware 6.0 |
| 672 | | - Addresses wavy print issue above 1cm |
| 673 | | - Left extruder prints with makerware. |
| 674 | | */ |
| 675 | | ROM_SYSTEM_BIOS( 3, "v620", "V 6.2.0" ) |
| 676 | | ROMX_LOAD("mighty_one_v6.2.0.bin", 0x0000, 0x1cf54, CRC(00df6f48) SHA1(db05afc2e1ebc104fb04753634a911187e396556), ROM_BIOS(4)) |
| 670 | /* Version 6.2.0 release: |
| 671 | - Bug fix release to firmware 6.0 |
| 672 | - Addresses wavy print issue above 1cm |
| 673 | - Left extruder prints with makerware. |
| 674 | */ |
| 675 | ROM_SYSTEM_BIOS( 3, "v620", "V 6.2.0" ) |
| 676 | ROMX_LOAD("mighty_one_v6.2.0.bin", 0x0000, 0x1cf54, CRC(00df6f48) SHA1(db05afc2e1ebc104fb04753634a911187e396556), ROM_BIOS(4)) |
| 677 | 677 | |
| 678 | | /* Version 7.0.0 release: |
| 679 | | - Major upgrade to Stepper Motor Smoothness (via Sailfish team) |
| 680 | | - X3G format introduced |
| 681 | | - Heaters default to leaving 'preheat' on more of the time |
| 682 | | */ |
| 683 | | ROM_SYSTEM_BIOS( 4, "v700", "V 7.0.0" ) |
| 684 | | ROMX_LOAD("mighty_one_v7.0.0.bin", 0x0000, 0x1cb52, CRC(aa2a5fcf) SHA1(934e642b0b2d007689249680bad03c9255ae016a), ROM_BIOS(5)) |
| 678 | /* Version 7.0.0 release: |
| 679 | - Major upgrade to Stepper Motor Smoothness (via Sailfish team) |
| 680 | - X3G format introduced |
| 681 | - Heaters default to leaving 'preheat' on more of the time |
| 682 | */ |
| 683 | ROM_SYSTEM_BIOS( 4, "v700", "V 7.0.0" ) |
| 684 | ROMX_LOAD("mighty_one_v7.0.0.bin", 0x0000, 0x1cb52, CRC(aa2a5fcf) SHA1(934e642b0b2d007689249680bad03c9255ae016a), ROM_BIOS(5)) |
| 685 | 685 | |
| 686 | | /* Version 7.2.0 release: |
| 687 | | - Removes support for S3G files |
| 688 | | - X3G is the recognized format |
| 689 | | - Minor bug fixes |
| 690 | | */ |
| 691 | | ROM_SYSTEM_BIOS( 5, "v720", "V 7.2.0" ) |
| 692 | | ROMX_LOAD("mighty_one_v7.2.0.bin", 0x0000, 0x1cb80, CRC(5e546706) SHA1(ed4aaf7522d5a5beea7eb69bf2c85d7a89f8f188), ROM_BIOS(6)) |
| 686 | /* Version 7.2.0 release: |
| 687 | - Removes support for S3G files |
| 688 | - X3G is the recognized format |
| 689 | - Minor bug fixes |
| 690 | */ |
| 691 | ROM_SYSTEM_BIOS( 5, "v720", "V 7.2.0" ) |
| 692 | ROMX_LOAD("mighty_one_v7.2.0.bin", 0x0000, 0x1cb80, CRC(5e546706) SHA1(ed4aaf7522d5a5beea7eb69bf2c85d7a89f8f188), ROM_BIOS(6)) |
| 693 | 693 | |
| 694 | | /* Version 7.3.0 release: |
| 695 | | - Pause at Z Height |
| 696 | | - Elapsed time displays during prints |
| 697 | | - Minor bug fixes |
| 698 | | */ |
| 699 | | ROM_SYSTEM_BIOS( 6, "v730", "V 7.3.0" ) |
| 700 | | ROMX_LOAD("mighty_one_v7.3.0.bin", 0x0000, 0x1d738, CRC(71811ff5) SHA1(6728ea600ab3ff4b589adca90b0d700d9b70bd18), ROM_BIOS(7)) |
| 694 | /* Version 7.3.0 release: |
| 695 | - Pause at Z Height |
| 696 | - Elapsed time displays during prints |
| 697 | - Minor bug fixes |
| 698 | */ |
| 699 | ROM_SYSTEM_BIOS( 6, "v730", "V 7.3.0" ) |
| 700 | ROMX_LOAD("mighty_one_v7.3.0.bin", 0x0000, 0x1d738, CRC(71811ff5) SHA1(6728ea600ab3ff4b589adca90b0d700d9b70bd18), ROM_BIOS(7)) |
| 701 | 701 | |
| 702 | | /* Version 7.4.0 (bugfix) release: |
| 703 | | - Fixes issues with Z Pause and elapsed print time |
| 704 | | */ |
| 705 | | ROM_SYSTEM_BIOS( 7, "v740", "V 7.4.0" ) |
| 706 | | ROMX_LOAD("mighty_one_v7.4.0.bin", 0x0000, 0x1b9e2, CRC(97b05a27) SHA1(76ca2c9c1db2e006e501c3177a8a1aa693dda0f9), ROM_BIOS(8)) |
| 702 | /* Version 7.4.0 (bugfix) release: |
| 703 | - Fixes issues with Z Pause and elapsed print time |
| 704 | */ |
| 705 | ROM_SYSTEM_BIOS( 7, "v740", "V 7.4.0" ) |
| 706 | ROMX_LOAD("mighty_one_v7.4.0.bin", 0x0000, 0x1b9e2, CRC(97b05a27) SHA1(76ca2c9c1db2e006e501c3177a8a1aa693dda0f9), ROM_BIOS(8)) |
| 707 | 707 | |
| 708 | | /* Version 7.5.0 (bugfix) release: |
| 709 | | - Fixes issue with Heat Hold |
| 710 | | */ |
| 711 | | ROM_SYSTEM_BIOS( 8, "v750", "V 7.5.0" ) |
| 712 | | ROMX_LOAD("mighty_one_v7.5.0.bin", 0x0000, 0x1b9c4, CRC(169d6709) SHA1(62b5aacd1bc46969042aea7a50531ec467a4ff1f), ROM_BIOS(9)) |
| 708 | /* Version 7.5.0 (bugfix) release: |
| 709 | - Fixes issue with Heat Hold |
| 710 | */ |
| 711 | ROM_SYSTEM_BIOS( 8, "v750", "V 7.5.0" ) |
| 712 | ROMX_LOAD("mighty_one_v7.5.0.bin", 0x0000, 0x1b9c4, CRC(169d6709) SHA1(62b5aacd1bc46969042aea7a50531ec467a4ff1f), ROM_BIOS(9)) |
| 713 | 713 | |
| 714 | | /* Sailfish firmware image - Metam??quina experimental build v7.5.0 */ |
| 715 | | ROM_SYSTEM_BIOS( 9, "v750mm", "V 7.5.0 - Metam??quina" ) |
| 716 | | ROMX_LOAD("mighty_one_v7.5.0.mm.bin", 0x0000, 0x1ef9a, CRC(0d36d9e7) SHA1(a53899775b4c4eea87b6903758ebb75f06710a69), ROM_BIOS(10)) |
| 714 | /* Sailfish firmware image - Metam??quina experimental build v7.5.0 */ |
| 715 | ROM_SYSTEM_BIOS( 9, "v750mm", "V 7.5.0 - Metam??quina" ) |
| 716 | ROMX_LOAD("mighty_one_v7.5.0.mm.bin", 0x0000, 0x1ef9a, CRC(0d36d9e7) SHA1(a53899775b4c4eea87b6903758ebb75f06710a69), ROM_BIOS(10)) |
| 717 | 717 | |
| 718 | 718 | |
| 719 | | /*Arduino MEGA bootloader */ |
| 720 | | ROM_LOAD( "atmegaboot_168_atmega1280.bin", 0x1f000, 0x0f16, CRC(c041f8db) SHA1(d995ebf360a264cccacec65f6dc0c2257a3a9224) ) |
| 719 | /*Arduino MEGA bootloader */ |
| 720 | ROM_LOAD( "atmegaboot_168_atmega1280.bin", 0x1f000, 0x0f16, CRC(c041f8db) SHA1(d995ebf360a264cccacec65f6dc0c2257a3a9224) ) |
| 721 | 721 | |
| 722 | | /* on-die 4kbyte eeprom */ |
| 723 | | ROM_REGION( 0x1000, "eeprom", ROMREGION_ERASEFF ) |
| 722 | /* on-die 4kbyte eeprom */ |
| 723 | ROM_REGION( 0x1000, "eeprom", ROMREGION_ERASEFF ) |
| 724 | 724 | ROM_END |
| 725 | 725 | |
| 726 | 726 | /* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME */ |
trunk/src/mame/drivers/segac2.c
| r249940 | r249941 | |
|---|
| 30 | 30 | 1992 Puyo Puyo Sega / Compile 317-0203 C2 171-5992A |
| 31 | 31 | 1992 Tant-R (Japan) Sega 317-0211 C2 |
| 32 | 32 | 1992 Tant-R (Korea) Sega ? C2 |
| 33 | 1993 SegaSonic Popcorn Shop Sega 317-0140 C2 |
| 33 | 34 | 1994 PotoPoto (Japan) Sega 317-0218 C2 |
| 34 | 35 | 1994 Stack Columns (Japan) Sega 317-0219 C2 |
| 35 | 36 | 1994 Stack Columns (World) Sega 317-0223 C2 |
| r249940 | r249941 | |
|---|
| 931 | 932 | INPUT_PORTS_END |
| 932 | 933 | |
| 933 | 934 | |
| 935 | |
| 936 | static INPUT_PORTS_START( sonicpop ) |
| 937 | PORT_INCLUDE( systemc_generic ) |
| 938 | |
| 939 | PORT_MODIFY("P1") |
| 940 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Relay") // relay (must be ON by default or machine will instantly give an 'assistance' error) - pressing this advances the stages of operation (from type select, and during the turning of the wheel) |
| 941 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("Coinblock") // coinblock (inverted) |
| 942 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("Sensor") // sensor - causes an extra animation to play if you press it during attract and 'Sensor Advertise' dip is on |
| 943 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED ) |
| 944 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 ) PORT_NAME("Cup Select 2") // cup select 2 - pressing Cup Select 1 and 2 registers as 'Cup Select 3', I presume these are lines from the mechanical part. |
| 945 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Cup Select 1") // cup select 1 |
| 946 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Handle B") // handle B |
| 947 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Handle A") // handle A |
| 948 | |
| 949 | PORT_MODIFY("P2") |
| 950 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON9 ) PORT_NAME("Sold Out LED1") // sold out LED 1 - are these actually output lines? |
| 951 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON10 ) PORT_NAME("Sold Out LED2") // sold out LED 2 |
| 952 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON11 ) PORT_NAME("Sold Out LED3") // sold out LED 3 |
| 953 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED ) |
| 954 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_NAME("Sold Out SW2") // sold out SW 2 - holding these while coining up will show popcorn as unavailable, pressing all 3 will fault the machine |
| 955 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON8 ) PORT_NAME("Sold Out SW3") // sold out SW 3 |
| 956 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) |
| 957 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_NAME("Sold Out SW1") // sold out SW 1 |
| 958 | |
| 959 | PORT_MODIFY("SERVICE") |
| 960 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) // coin |
| 961 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE2 ) // 'reset' |
| 962 | PORT_SERVICE_NO_TOGGLE( 0x04, IP_ACTIVE_LOW ) |
| 963 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE1 ) |
| 964 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED ) |
| 965 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED ) |
| 966 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) |
| 967 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) |
| 968 | |
| 969 | PORT_MODIFY("DSW") |
| 970 | PORT_DIPNAME( 0x01, 0x01, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:1") |
| 971 | PORT_DIPSETTING( 0x01, DEF_STR( On ) ) |
| 972 | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 973 | PORT_DIPNAME( 0x02, 0x02, "Trouble BGM" ) PORT_DIPLOCATION("SW2:2") |
| 974 | PORT_DIPSETTING( 0x02, DEF_STR( On ) ) |
| 975 | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 976 | PORT_DIPNAME( 0x0c, 0x00, "Region" ) PORT_DIPLOCATION("SW2:3,4") |
| 977 | PORT_DIPSETTING( 0x00, DEF_STR( USA ) ) |
| 978 | PORT_DIPSETTING( 0x04, "Export" ) |
| 979 | PORT_DIPSETTING( 0x08, "USA (duplicate)" ) |
| 980 | PORT_DIPSETTING( 0x0c, DEF_STR( Japan ) ) |
| 981 | PORT_DIPNAME( 0x10, 0x10, "Sensor Advertise" ) PORT_DIPLOCATION("SW2:5") |
| 982 | PORT_DIPSETTING( 0x10, DEF_STR( On ) ) |
| 983 | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 984 | PORT_DIPUNUSED_DIPLOC( 0x20, IP_ACTIVE_LOW, "SW2:6" ) |
| 985 | PORT_DIPUNUSED_DIPLOC( 0x40, IP_ACTIVE_LOW, "SW2:7" ) |
| 986 | PORT_DIPUNUSED_DIPLOC( 0x80, IP_ACTIVE_LOW, "SW2:8" ) |
| 987 | INPUT_PORTS_END |
| 988 | |
| 989 | |
| 934 | 990 | static INPUT_PORTS_START( ribbit ) |
| 935 | 991 | PORT_INCLUDE( systemc_generic ) |
| 936 | 992 | |
| r249940 | r249941 | |
|---|
| 1635 | 1691 | ROM_LOAD( "epr-14394.ic4", 0x000000, 0x040000, CRC(476e30dd) SHA1(c9d381160c58b05763ea286a53c7ca6de074fda2) ) |
| 1636 | 1692 | ROM_END |
| 1637 | 1693 | |
| 1694 | ROM_START( sonicpop ) /* Sega Sonic Popcorn Shop (Rev.B) (c)1993 Sega - 834-9555-02 (EMP5032 labeled 317-0140) */ |
| 1695 | ROM_REGION( 0x200000, "maincpu", 0 ) |
| 1696 | ROM_LOAD16_BYTE( "epr-14592b.ic32", 0x000000, 0x040000, CRC(bac586a1) SHA1(0208213bfa1a5093e76edb1a7e0ba5ebc862801d) ) |
| 1697 | ROM_LOAD16_BYTE( "epr-15491b.ic31", 0x000001, 0x040000, CRC(527106c3) SHA1(97f08006bba4b87c304c7ad3b1480b77e99dff10) ) |
| 1698 | ROM_LOAD16_BYTE( "epr-15494.ic34", 0x100000, 0x040000, CRC(0520df5e) SHA1(5a795a1630d841406a106a566228223583deef44) ) |
| 1699 | ROM_LOAD16_BYTE( "epr-15493.ic33", 0x100001, 0x040000, CRC(d51b3b85) SHA1(66f6b4656841ab70ffde0141a613eaf91c06f86b) ) |
| 1638 | 1700 | |
| 1701 | ROM_REGION( 0x040000, "upd", 0 ) |
| 1702 | ROM_LOAD( "epr-15495.ic4", 0x000000, 0x040000, CRC(d3ee4c68) SHA1(557c57b22521339d94d9a3e6fd2af68a67a153b6) ) |
| 1703 | ROM_END |
| 1704 | |
| 1639 | 1705 | ROM_START( ribbit ) /* Ribbit (c)1991 Sega */ |
| 1640 | 1706 | ROM_REGION( 0x200000, "maincpu", 0 ) |
| 1641 | 1707 | ROM_LOAD16_BYTE( "epr-13833.ic32", 0x000000, 0x040000, CRC(5347f8ce) SHA1(b95b99536157edfbf0d74a42f64235f47dca7ee1) ) |
| r249940 | r249941 | |
|---|
| 2319 | 2385 | // YEAR, NAME, PARENT, MACHINE,INPUT, INIT, MONITOR,COMPANY,FULLNAME,FLAGS |
| 2320 | 2386 | /* System C Games */ |
| 2321 | 2387 | GAME( 1989, bloxeedc, bloxeed, segac, bloxeedc, segac2_state, bloxeedc, ROT0, "Sega / Elorg", "Bloxeed (World, C System)", 0 ) |
| 2322 | | GAME( 1989, bloxeedu, bloxeed, segac, bloxeedc, segac2_state, bloxeedc, ROT0, "Sega / Elorg", "Bloxeed (US, C System)", 0 ) |
| 2388 | GAME( 1989, bloxeedu, bloxeed, segac, bloxeedc, segac2_state, bloxeedc, ROT0, "Sega / Elorg", "Bloxeed (US, C System, Rev A)", 0 ) |
| 2323 | 2389 | |
| 2324 | 2390 | GAME( 1990, columns, 0, segac, columns, segac2_state, columns, ROT0, "Sega", "Columns (World)", 0 ) |
| 2325 | | GAME( 1990, columnsu, columns, segac, columnsu, segac2_state, columns, ROT0, "Sega", "Columns (US, cocktail)", 0 ) // has cocktail mode dsw |
| 2391 | GAME( 1990, columnsu, columns, segac, columnsu, segac2_state, columns, ROT0, "Sega", "Columns (US, cocktail, Rev A)", 0 ) // has cocktail mode dsw |
| 2326 | 2392 | GAME( 1990, columnsj, columns, segac, columns, segac2_state, columns, ROT0, "Sega", "Columns (Japan)", 0 ) |
| 2327 | 2393 | |
| 2328 | 2394 | GAME( 1990, columns2, 0, segac, columns2, segac2_state, columns2, ROT0, "Sega", "Columns II: The Voyage Through Time (World)", 0 ) |
| r249940 | r249941 | |
|---|
| 2353 | 2419 | GAME( 1994, tantrbl2, tantr, segac, ichir, segac2_state, tantr, ROT0, "bootleg", "Puzzle & Action: Tant-R (Japan) (bootleg set 2)", 0 ) // Common bootleg in Europe, C board, no samples |
| 2354 | 2420 | GAME( 1994, tantrbl3, tantr, segac, ichir, segac2_state, tantr, ROT0, "bootleg", "Puzzle & Action: Tant-R (Japan) (bootleg set 3)", 0 ) // Common bootleg in Europe, C board, no samples |
| 2355 | 2421 | |
| 2422 | // not really sure how this should hook up, things like the 'sold out' flags could be mechanical sensors, or from another MCU / CPU board in the actual popcorn part of the machine? |
| 2423 | GAME( 1993, sonicpop, 0, segac2, sonicpop, segac2_state, bloxeedc, ROT0, "Sega", "SegaSonic Popcorn Shop (Rev B)", MACHINE_MECHANICAL ) // region DSW for USA / Export / Japan, still speaks Japanese tho. 'Mechanical' part isn't emulated |
| 2424 | |
| 2356 | 2425 | GAME( 1994, potopoto, 0, segac2, potopoto, segac2_state, potopoto, ROT0, "Sega", "Poto Poto (Japan)", 0 ) |
| 2357 | 2426 | |
| 2358 | 2427 | GAME( 1994, stkclmns, 0, segac2, stkclmns, segac2_state, stkclmns, ROT0, "Sega", "Stack Columns (World)", 0 ) |
trunk/src/mame/drivers/unichamp.c
| r0 | r249941 | |
|---|
| 1 | // license:BSD-3-Clause |
| 2 | // copyright-holders:David Viens |
| 3 | /************************************************************************ |
| 4 | * Unisonic Champion 2711 (late 1977 based on part dates) |
| 5 | * |
| 6 | * Driver from plgDavid (David Viens) |
| 7 | * |
| 8 | * Thanks to Sylvain De Chantal (Sly D.C.) for the 2 test units, |
| 9 | * carts and FAQ: http://www.ccjvq.com/slydc/index/faq/2711 |
| 10 | * |
| 11 | * Thanks to Paul Robson for the GIC font rom. |
| 12 | * (http://worstconsole.blogspot.ca/2012/12/the-worstconsoleever.html) |
| 13 | * Note a spare dead GIC has been given to Lord Nightmare and should be sent for decap! |
| 14 | * |
| 15 | * The Unisonc Champion is the only known GI "Gimini Mid-Range 8950 Programmable Game Set" |
| 16 | * to ever reach the market, and only in limited quantities (aprox 500 units ever built) |
| 17 | * |
| 18 | * Architecture: |
| 19 | * Master IC : AY-3-8800-1 Graphics Interface (A.K.A. GIC, 40 pin) |
| 20 | * Slave IC : CP1610 CPU (40 pin, same as in the Intellivision) |
| 21 | * EXEC ROM : 9501-01009 (40 pin) at 0x0800 (factory mapped) |
| 22 | * |
| 23 | * The GIC generates the CPU Clock, the video signals and the audio. |
| 24 | * The CPU does NOT access the GIC directly. |
| 25 | * One way CPU->GIC 'communication' takes place through 256 bytes of shared RAM |
| 26 | * (using two 4x256 TMS4043NL-2 (2112-1) Static Rams at U3 and U4) |
| 27 | * |
| 28 | * In this design the GIC only allows the CPU to use the BUS (and shared RAM) |
| 29 | * a fraction of the frame time. (4.33ms for each 16.69ms, or 26% of the time) |
| 30 | * (the real ratio of clocks is 7752/29868 ) |
| 31 | * |
| 32 | * Boot: When the GIC let go of !RESET_OUT the EXEC Rom pushes 0x800 onto |
| 33 | * the bus for the CPU to fetch and place in R7 to start execution. |
| 34 | * This first CPU slice only last 3ms, then the GIC sets the CPU's BUSRQ low, |
| 35 | * stalling it for 12.36ms, then sets it high for 4.33ms etc... |
| 36 | * 59.95 times a second - NTSC |
| 37 | ************************************************************************/ |
| 38 | |
| 39 | #include "emu.h" |
| 40 | #include "cpu/cp1610/cp1610.h" |
| 41 | #include "video/gic.h" |
| 42 | |
| 43 | #include "bus/generic/slot.h" |
| 44 | #include "bus/generic/carts.h" |
| 45 | |
| 46 | class unichamp_state : public driver_device |
| 47 | { |
| 48 | public: |
| 49 | unichamp_state(const machine_config &mconfig, device_type type, const char *tag) |
| 50 | : driver_device(mconfig, type, tag), |
| 51 | m_maincpu(*this, "maincpu"), |
| 52 | m_gic(*this, "gic"), |
| 53 | m_cart(*this, "cartslot"), |
| 54 | m_ctrls(*this, "CTRLS"){} |
| 55 | |
| 56 | required_device<cpu_device> m_maincpu; |
| 57 | required_device<gic_device> m_gic; |
| 58 | required_device<generic_slot_device> m_cart; |
| 59 | |
| 60 | UINT8 m_ram[256]; |
| 61 | DECLARE_DRIVER_INIT(unichamp); |
| 62 | virtual void machine_start(); |
| 63 | virtual void machine_reset(); |
| 64 | DECLARE_PALETTE_INIT(unichamp); |
| 65 | |
| 66 | DECLARE_READ8_MEMBER(bext_r); |
| 67 | |
| 68 | DECLARE_READ16_MEMBER(unichamp_gicram_r); |
| 69 | DECLARE_WRITE16_MEMBER(unichamp_gicram_w); |
| 70 | |
| 71 | DECLARE_READ16_MEMBER(unichamp_trapl_r); |
| 72 | DECLARE_WRITE16_MEMBER(unichamp_trapl_w); |
| 73 | |
| 74 | UINT32 screen_update_unichamp(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); |
| 75 | |
| 76 | protected: |
| 77 | required_ioport m_ctrls; |
| 78 | virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr); |
| 79 | }; |
| 80 | |
| 81 | PALETTE_INIT_MEMBER(unichamp_state, unichamp) |
| 82 | { |
| 83 | /* |
| 84 | palette.set_pen_color(GIC_BLACK, rgb_t(0x00, 0x00, 0x00)); |
| 85 | palette.set_pen_color(GIC_RED, rgb_t(0xAE, 0x49, 0x41));//(from box shot) |
| 86 | palette.set_pen_color(GIC_GREEN, rgb_t(0x62, 0x95, 0x88));//(from box shot) |
| 87 | palette.set_pen_color(GIC_WHITE, rgb_t(0xFF, 0xFF, 0xFF)); |
| 88 | */ |
| 89 | |
| 90 | //using from intv.c instead as suggested by RB |
| 91 | palette.set_pen_color(GIC_BLACK, rgb_t(0x00, 0x00, 0x00)); |
| 92 | palette.set_pen_color(GIC_RED, rgb_t(0xFF, 0x3D, 0x10)); |
| 93 | //palette.set_pen_color(GIC_GREEN, rgb_t(0x38, 0x6B, 0x3F)); //intv's DARK GREEN |
| 94 | palette.set_pen_color(GIC_GREEN, rgb_t(0x00, 0xA7, 0x56)); //intv's GREEN |
| 95 | palette.set_pen_color(GIC_WHITE, rgb_t(0xFF, 0xFC, 0xFF)); |
| 96 | } |
| 97 | |
| 98 | |
| 99 | static ADDRESS_MAP_START( unichamp_mem, AS_PROGRAM, 16, unichamp_state ) |
| 100 | ADDRESS_MAP_GLOBAL_MASK(0x1FFF) //B13/B14/B15 are grounded! |
| 101 | AM_RANGE(0x0000, 0x00FF) AM_READWRITE(unichamp_gicram_r, unichamp_gicram_w) |
| 102 | AM_RANGE(0x0100, 0x07FF) AM_READWRITE(unichamp_trapl_r, unichamp_trapl_w) |
| 103 | AM_RANGE(0x0800, 0x17FF) AM_ROM AM_REGION("maincpu", 0x0800 << 1) // Carts and EXE ROM, 10-bits wide |
| 104 | ADDRESS_MAP_END |
| 105 | |
| 106 | |
| 107 | static INPUT_PORTS_START( unichamp ) |
| 108 | PORT_START( "CTRLS" ) |
| 109 | PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Y) PORT_CHAR('Y')// P1 YES (EBCA0) |
| 110 | PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_N) PORT_CHAR('N')// P1 NO (EBCA1) |
| 111 | PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_A) PORT_CHAR('A')// P2 YES (EBCA2) |
| 112 | PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_S) PORT_CHAR('S')// P2 NO (EBCA3) |
| 113 | PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_UNUSED |
| 114 | PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_UNUSED |
| 115 | PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_UNUSED |
| 116 | PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_UNUSED |
| 117 | INPUT_PORTS_END |
| 118 | |
| 119 | |
| 120 | void unichamp_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) |
| 121 | { |
| 122 | //TODO should we add an explicit Reset button in there just like the controller? |
| 123 | } |
| 124 | |
| 125 | |
| 126 | READ8_MEMBER(unichamp_state::bext_r) |
| 127 | { |
| 128 | //The BEXT instruction pushes a user-defined nibble out on the four EBCA pins (EBCA0 to EBCA3) |
| 129 | //and reads the ECBI input pin for HIGH or LOW signal to know whether or not to branch |
| 130 | |
| 131 | //The unisonic control system couldnt be simpler in desing. |
| 132 | //Each of the two player controllers has three buttons: |
| 133 | //one tying !RESET(GIC pin 21) to ground when closed - resetting the WHOLE system. |
| 134 | //a YES button (connecting EBCA0 to EBCI for Player1 and EBC2 to EBCI for Player2) |
| 135 | //a NO button (connecting EBCA1 to EBCI for Player1 and EBC3 to EBCI for Player2) |
| 136 | |
| 137 | //The CPU outputs a MASK of whatever it needs and checks the result. |
| 138 | //EG: Any player can choose if one or two players are going to play the game for instance |
| 139 | |
| 140 | UINT8 port = ioport("CTRLS")->read() & 0x0F; ////only lower nibble |
| 141 | |
| 142 | //We need to return logical high or low on the EBCI pin |
| 143 | return (port & offset)>0?1:0; |
| 144 | } |
| 145 | |
| 146 | |
| 147 | DRIVER_INIT_MEMBER(unichamp_state,unichamp) |
| 148 | { |
| 149 | m_gic->set_shared_memory(m_ram); |
| 150 | } |
| 151 | |
| 152 | void unichamp_state::machine_start() |
| 153 | { |
| 154 | m_gic->set_shared_memory(m_ram); |
| 155 | |
| 156 | if (m_cart->exists()){ |
| 157 | //flip endians in more "this surely exists in MAME" way? |
| 158 | //NOTE The unichamp roms have the same endianness as intv on disk and in memory |
| 159 | UINT8*ptr = m_cart->get_rom_base(); |
| 160 | size_t size = m_cart->get_rom_size(); |
| 161 | for(size_t i=0;i<size;i+=2){ |
| 162 | UINT8 TEMP = ptr[i]; |
| 163 | ptr[i] = ptr[i+1]; |
| 164 | ptr[i+1] = TEMP; |
| 165 | } |
| 166 | |
| 167 | m_maincpu->space(AS_PROGRAM).install_read_handler(0x1000, 0x1800, |
| 168 | read16_delegate(FUNC(generic_slot_device::read16_rom),(generic_slot_device*)m_cart)); |
| 169 | } |
| 170 | } |
| 171 | |
| 172 | /* Set Reset and INTR/INTRM Vector */ |
| 173 | void unichamp_state::machine_reset() |
| 174 | { |
| 175 | /* |
| 176 | the intv driver did not explain this but from the CP1600 manual: |
| 177 | When MSYNC* goes inactive (high), the bus control signals issue lAB, |
| 178 | and the CPU inputs from the bus into the PC the starting address of the main program. |
| 179 | Note that the initialization address can be defined by the user at any desired bus address or |
| 180 | can be the default address resulting from the logical state of the non-driven bus |
| 181 | */ |
| 182 | |
| 183 | //The Unisonic EXEC ROM chip (9501-01009) is self mapped at 0x0800 |
| 184 | //The cart ROMS are self mapped to 0x1000 |
| 185 | //upon boot the EXEC ROM puts 0x0800 on the bus for the CPU to use as first INT vector |
| 186 | |
| 187 | m_maincpu->set_input_line_vector(CP1610_RESET, 0x0800); |
| 188 | m_maincpu->set_input_line_vector(CP1610_INT_INTRM, 0x0804);//not used anyway |
| 189 | m_maincpu->set_input_line_vector(CP1610_INT_INTR, 0x0804);//not used anyway |
| 190 | |
| 191 | /* Set initial PC */ |
| 192 | m_maincpu->set_state_int(CP1610_R7, 0x0800); |
| 193 | } |
| 194 | |
| 195 | |
| 196 | UINT32 unichamp_state::screen_update_unichamp(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) |
| 197 | { |
| 198 | return m_gic->screen_update(screen, bitmap, cliprect); |
| 199 | } |
| 200 | |
| 201 | READ16_MEMBER( unichamp_state::unichamp_gicram_r ) |
| 202 | { |
| 203 | return (int)m_ram[offset]; |
| 204 | } |
| 205 | |
| 206 | WRITE16_MEMBER( unichamp_state::unichamp_gicram_w ) |
| 207 | { |
| 208 | m_ram[offset] = data&0xff; |
| 209 | } |
| 210 | |
| 211 | READ16_MEMBER( unichamp_state::unichamp_trapl_r ) |
| 212 | { |
| 213 | logerror("trapl_r(%x)\n",offset); |
| 214 | return (int)0; |
| 215 | } |
| 216 | |
| 217 | WRITE16_MEMBER( unichamp_state::unichamp_trapl_w ) |
| 218 | { |
| 219 | logerror("trapl_w(%x) = %x\n",offset,data); |
| 220 | } |
| 221 | |
| 222 | static MACHINE_CONFIG_START( unichamp, unichamp_state ) |
| 223 | /* basic machine hardware */ |
| 224 | |
| 225 | //The CPU is really clocked this way: |
| 226 | //MCFG_CPU_ADD("maincpu", CP1610, XTAL_3_579545MHz/4) |
| 227 | //But since it is only running 7752/29868 th's of the time... |
| 228 | //TODO find a more accurate method? (the emulation will me the same though) |
| 229 | MCFG_CPU_ADD("maincpu", CP1610, (int)((7752.0/29868.0)*XTAL_3_579545MHz/4)) |
| 230 | |
| 231 | MCFG_CPU_PROGRAM_MAP(unichamp_mem) |
| 232 | MCFG_QUANTUM_TIME(attotime::from_hz(60)) |
| 233 | MCFG_CP1610_BEXT_CALLBACK(READ8(unichamp_state, bext_r)) |
| 234 | |
| 235 | /* video hardware */ |
| 236 | MCFG_SCREEN_ADD("screen", RASTER) |
| 237 | MCFG_SCREEN_RAW_PARAMS( XTAL_3_579545MHz, |
| 238 | gic_device::LINE_CLOCKS, |
| 239 | gic_device::START_ACTIVE_SCAN, |
| 240 | gic_device::END_ACTIVE_SCAN, |
| 241 | gic_device::LINES, |
| 242 | gic_device::START_Y, |
| 243 | gic_device::START_Y + gic_device::SCREEN_HEIGHT ) |
| 244 | |
| 245 | MCFG_SCREEN_UPDATE_DRIVER(unichamp_state, screen_update_unichamp) |
| 246 | MCFG_SCREEN_PALETTE("palette") |
| 247 | |
| 248 | MCFG_PALETTE_ADD("palette", 4) |
| 249 | MCFG_PALETTE_INIT_OWNER(unichamp_state, unichamp) |
| 250 | |
| 251 | /* sound hardware */ |
| 252 | MCFG_SPEAKER_STANDARD_MONO("mono") |
| 253 | MCFG_GIC_ADD( "gic", XTAL_3_579545MHz, "screen" ) |
| 254 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40) |
| 255 | |
| 256 | /* cartridge */ |
| 257 | MCFG_GENERIC_CARTSLOT_ADD("cartslot", generic_linear_slot, "unichamp_cart") |
| 258 | MCFG_GENERIC_EXTENSIONS("bin,rom") |
| 259 | MCFG_SOFTWARE_LIST_ADD("cart_list", "unichamp") |
| 260 | |
| 261 | MACHINE_CONFIG_END |
| 262 | |
| 263 | |
| 264 | ROM_START(unichamp) |
| 265 | ROM_REGION(0x10000<<1,"maincpu", ROMREGION_ERASEFF) |
| 266 | |
| 267 | ROM_LOAD16_WORD( "9501-01009.u2", 0x0800<<1, 0x1000, CRC(49a0bd8f) SHA1(f4d126d3462ad351da4b75d76c75942d5a6f27ef)) |
| 268 | |
| 269 | //these below are for local tests. you can use them in softlist or -cart |
| 270 | //ROM_LOAD16_WORD( "pac-02.bin", 0x1000<<1, 0x1000, CRC(fe3213be) SHA1(5b9c407fe86865f3454d4be824a7f2bf53478f73)) |
| 271 | //ROM_LOAD16_WORD( "pac-03.bin", 0x1000<<1, 0x1000, CRC(f81f04bd) SHA1(82e2a0fda1787d5835c457ee5745b0db0cebe079)) |
| 272 | //ROM_LOAD16_WORD( "pac-04.bin", 0x1000<<1, 0x1000, CRC(cac09841) SHA1(bc9db83f26ed0810938156db6b104b4576754225)) |
| 273 | //ROM_LOAD16_WORD( "pac-05.bin", 0x1000<<1, 0x1000, CRC(d54a6090) SHA1(e85593096f43dcf14b08fd2c9fda277008a8df8b)) |
| 274 | ROM_END |
| 275 | |
| 276 | |
| 277 | CONS( 1977, unichamp, 0, 0, unichamp, unichamp, unichamp_state, unichamp, "Unisonic", "Champion 2711", 0/*MACHINE_IMPERFECT_GRAPHICS*/) |
trunk/src/mame/drivers/zx.c
| r249940 | r249941 | |
|---|
| 1 | 1 | // license:GPL-2.0+ |
| 2 | | // copyright-holders:Juergen Buchmueller, Krzysztof Strzecha, Robbbert |
| 2 | // copyright-holders: Olivier Galibert, Juergen Buchmueller, Krzysztof Strzecha, Robbbert |
| 3 | 3 | /*************************************************************************** |
| 4 | 4 | zx.c |
| 5 | 5 | |
| r249940 | r249941 | |
|---|
| 9 | 9 | Fixes and additions by Krzysztof Strzecha: |
| 10 | 10 | 07.06.2004 Tape loading added. Some cleanups of debug code. |
| 11 | 11 | Fixed stupid bug in timings (vblank duration). |
| 12 | | MACHINE_NOT_WORKING flag removed. |
| 12 | GAME_NOT_WORKING flag removed. |
| 13 | 13 | 29.05.2004 CPU clock, number of scanlines, vblank duration corrected. |
| 14 | 14 | Some cleanups. Two non-working TESTDRIVERS added. |
| 15 | 15 | 14.05.2004 Finally fixed and readded. |
| r249940 | r249941 | |
|---|
| 31 | 31 | - Modernised. |
| 32 | 32 | |
| 33 | 33 | To do / problems: |
| 34 | - Halt-on-nmi emulation needs a cycle-exact z80 |
| 34 | 35 | - Some memory areas are not mirrored as they should. |
| 35 | | - Video hardware is not fully emulated, so it does not support pseudo hi-res and hi-res modes. |
| 36 | 36 | - The screen in pc8300/pow3000/lambda jumps when you type something. |
| 37 | 37 | - lambda/pow3000 32k memory pack is unemulated, because where is the upper 16k mirror going to be? |
| 38 | 38 | - h4th and tree4th need their address maps worked out (eg, the stack is set to FB80) |
| r249940 | r249941 | |
|---|
| 47 | 47 | /* Memory Maps */ |
| 48 | 48 | |
| 49 | 49 | static ADDRESS_MAP_START( zx80_map, AS_PROGRAM, 8, zx_state ) |
| 50 | AM_RANGE(0x0000, 0x0fff) AM_ROM AM_MIRROR(0x3000) |
| 51 | AM_RANGE(0x4000, 0xffff) AM_RAM |
| 52 | ADDRESS_MAP_END |
| 53 | |
| 54 | static ADDRESS_MAP_START( zx81_map, AS_PROGRAM, 8, zx_state ) |
| 50 | 55 | AM_RANGE(0x0000, 0x1fff) AM_ROM AM_MIRROR(0x2000) |
| 51 | | AM_RANGE(0xc000, 0xffff) AM_RAM_READ(zx_ram_r) |
| 56 | AM_RANGE(0x4000, 0xffff) AM_RAM |
| 52 | 57 | ADDRESS_MAP_END |
| 53 | 58 | |
| 59 | static ADDRESS_MAP_START( ula_map, AS_DECRYPTED_OPCODES, 8, zx_state ) |
| 60 | AM_RANGE(0x0000, 0x7fff) AM_READ(ula_low_r) |
| 61 | AM_RANGE(0x8000, 0xffff) AM_READ(ula_high_r) |
| 62 | ADDRESS_MAP_END |
| 63 | |
| 54 | 64 | static ADDRESS_MAP_START( zx80_io_map, AS_IO, 8, zx_state ) |
| 55 | 65 | AM_RANGE(0x0000, 0xffff) AM_READWRITE(zx80_io_r, zx80_io_w) |
| 56 | 66 | ADDRESS_MAP_END |
| r249940 | r249941 | |
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| 291 | 301 | INPUT_PORTS_END |
| 292 | 302 | |
| 293 | 303 | |
| 294 | | /* F4 character display */ |
| 295 | | |
| 296 | | static const gfx_layout zx_gfx_layout = |
| 297 | | { |
| 298 | | 8, 8, /* 8x8 pixels */ |
| 299 | | 64, /* 64 codes */ |
| 300 | | 1, /* 1 bit per pixel */ |
| 301 | | {0}, /* no bitplanes */ |
| 302 | | /* x offsets */ |
| 303 | | {0, 1, 2, 3, 4, 5, 6, 7}, |
| 304 | | /* y offsets */ |
| 305 | | {0 * 8, 1 * 8, 2 * 8, 3 * 8, 4 * 8, 5 * 8, 6 * 8, 7 * 8}, |
| 306 | | 8 * 8 /* eight bytes per code */ |
| 307 | | }; |
| 308 | | |
| 309 | | |
| 310 | | /* Graphics Decode Information */ |
| 311 | | |
| 312 | | static GFXDECODE_START( zx80 ) |
| 313 | | GFXDECODE_ENTRY( "maincpu", 0x0e00, zx_gfx_layout, 0, 2 ) |
| 314 | | GFXDECODE_END |
| 315 | | |
| 316 | | static GFXDECODE_START( zx81 ) |
| 317 | | GFXDECODE_ENTRY( "maincpu", 0x1e00, zx_gfx_layout, 0, 2 ) |
| 318 | | GFXDECODE_END |
| 319 | | |
| 320 | | static GFXDECODE_START( pc8300 ) |
| 321 | | GFXDECODE_ENTRY( "gfx1", 0, zx_gfx_layout, 0, 2 ) |
| 322 | | GFXDECODE_END |
| 323 | | |
| 324 | | |
| 325 | | |
| 326 | 304 | /* Palette Initialization */ |
| 327 | 305 | |
| 328 | 306 | |
| r249940 | r249941 | |
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| 330 | 308 | { |
| 331 | 309 | palette.set_pen_color(0,rgb_t::white); /* white */ |
| 332 | 310 | palette.set_pen_color(1,rgb_t::black); /* black */ |
| 333 | | palette.set_pen_color(2,rgb_t::black); /* black */ |
| 334 | | palette.set_pen_color(3,rgb_t::white); /* white */ |
| 335 | 311 | } |
| 336 | 312 | |
| 337 | 313 | PALETTE_INIT_MEMBER(zx_state,ts1000) |
| 338 | 314 | { |
| 339 | 315 | palette.set_pen_color(0,rgb_t(64, 244, 244)); /* cyan */ |
| 340 | 316 | palette.set_pen_color(1,rgb_t::black); /* black */ |
| 341 | | palette.set_pen_color(2,rgb_t::black); /* black */ |
| 342 | | palette.set_pen_color(3,rgb_t(64, 244, 244)); /* cyan */ |
| 343 | 317 | } |
| 344 | 318 | |
| 345 | | |
| 346 | | #define ZX81_CPU_CLOCK 3250000 |
| 347 | | #define ZX81_CYCLES_PER_SCANLINE 207 |
| 348 | | #define ZX81_PIXELS_PER_SCANLINE 256 |
| 349 | | #define ZX81_CYCLES_PER_VBLANK 1235 |
| 350 | | #define ZX81_VBLANK_DURATION (1.0*ZX81_CYCLES_PER_VBLANK/ZX81_CPU_CLOCK*1000*1000) |
| 351 | | |
| 352 | | #define ZX81_PAL_SCANLINES 304 |
| 353 | | #define ZX81_PAL_FRAMES_PER_SECOND (1.0*ZX81_CPU_CLOCK/(ZX81_PAL_SCANLINES*ZX81_CYCLES_PER_SCANLINE+ZX81_CYCLES_PER_VBLANK)) |
| 354 | | |
| 355 | | #define ZX81_NTSC_SCANLINES 256 |
| 356 | | #define ZX81_NTSC_FRAMES_PER_SECOND (1.0*ZX81_CPU_CLOCK/(ZX81_NTSC_SCANLINES*ZX81_CYCLES_PER_SCANLINE+ZX81_CYCLES_PER_VBLANK)) |
| 357 | | |
| 358 | | /* Machine Drivers */ |
| 359 | | |
| 360 | 319 | static MACHINE_CONFIG_START( zx80, zx_state ) |
| 361 | 320 | /* basic machine hardware */ |
| 362 | | MCFG_CPU_ADD("maincpu", Z80, ZX81_CPU_CLOCK) |
| 321 | MCFG_CPU_ADD("maincpu", Z80, XTAL_6_5MHz/2) |
| 363 | 322 | MCFG_CPU_PROGRAM_MAP(zx80_map) |
| 364 | 323 | MCFG_CPU_IO_MAP(zx80_io_map) |
| 324 | MCFG_CPU_DECRYPTED_OPCODES_MAP(ula_map) |
| 325 | MCFG_Z80_SET_REFRESH_CALLBACK(WRITE16(zx_state, refresh_w)) |
| 326 | |
| 365 | 327 | MCFG_SCREEN_ADD("screen", RASTER) |
| 366 | | MCFG_SCREEN_REFRESH_RATE(ZX81_PAL_FRAMES_PER_SECOND) |
| 367 | | MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(ZX81_VBLANK_DURATION)) |
| 328 | MCFG_SCREEN_REFRESH_RATE(XTAL_6_5MHz/2/64159.0) // 54223 for NTSC |
| 368 | 329 | |
| 369 | | |
| 370 | 330 | /* video hardware */ |
| 371 | 331 | MCFG_SCREEN_UPDATE_DRIVER(zx_state, screen_update) |
| 372 | | MCFG_SCREEN_SIZE(ZX81_PIXELS_PER_SCANLINE, ZX81_PAL_SCANLINES) |
| 373 | | MCFG_SCREEN_VISIBLE_AREA(0, ZX81_PIXELS_PER_SCANLINE-1, 0, ZX81_PAL_SCANLINES-1) |
| 374 | | MCFG_SCREEN_VBLANK_DRIVER(zx_state, screen_eof_zx) |
| 332 | MCFG_SCREEN_SIZE(384, 311) |
| 333 | MCFG_SCREEN_VISIBLE_AREA(0, 383, 0, 310) |
| 375 | 334 | MCFG_SCREEN_PALETTE("palette") |
| 376 | 335 | |
| 377 | | MCFG_GFXDECODE_ADD("gfxdecode", "palette", zx80) |
| 378 | | MCFG_PALETTE_ADD("palette", 4) |
| 336 | MCFG_PALETTE_ADD("palette", 2) |
| 379 | 337 | MCFG_PALETTE_INIT_OWNER(zx_state,zx) |
| 380 | 338 | |
| 381 | | /* sound hardware */ |
| 382 | | MCFG_SPEAKER_STANDARD_MONO("mono") |
| 383 | | MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0) /* Used by pc8300/lambda/pow3000 */ |
| 384 | | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.75) |
| 385 | | MCFG_SOUND_WAVE_ADD(WAVE_TAG, "cassette") |
| 386 | | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) |
| 387 | | |
| 388 | 339 | MCFG_CASSETTE_ADD( "cassette" ) |
| 389 | 340 | MCFG_CASSETTE_FORMATS(zx80_o_format) |
| 390 | 341 | MCFG_CASSETTE_DEFAULT_STATE(CASSETTE_STOPPED | CASSETTE_SPEAKER_ENABLED) |
| r249940 | r249941 | |
|---|
| 392 | 343 | /* internal ram */ |
| 393 | 344 | MCFG_RAM_ADD(RAM_TAG) |
| 394 | 345 | MCFG_RAM_DEFAULT_SIZE("1K") |
| 395 | | MCFG_RAM_EXTRA_OPTIONS("16K") |
| 346 | MCFG_RAM_EXTRA_OPTIONS("16K,32K,48K") |
| 396 | 347 | MACHINE_CONFIG_END |
| 397 | 348 | |
| 398 | 349 | static MACHINE_CONFIG_DERIVED( zx81, zx80 ) |
| 399 | | |
| 400 | 350 | MCFG_CPU_MODIFY("maincpu") |
| 351 | MCFG_CPU_PROGRAM_MAP(zx81_map) |
| 401 | 352 | MCFG_CPU_IO_MAP(zx81_io_map) |
| 402 | 353 | |
| 403 | | MCFG_GFXDECODE_MODIFY("gfxdecode", zx81) |
| 404 | | |
| 405 | 354 | MCFG_CASSETTE_MODIFY( "cassette" ) |
| 406 | 355 | MCFG_CASSETTE_FORMATS(zx81_p_format) |
| 407 | 356 | MACHINE_CONFIG_END |
| 408 | 357 | |
| 358 | static MACHINE_CONFIG_DERIVED( zx81_spk, zx81 ) |
| 359 | /* sound hardware */ |
| 360 | /* Used by pc8300/lambda/pow3000 */ |
| 361 | MCFG_SPEAKER_STANDARD_MONO("mono") |
| 362 | MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0) |
| 363 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.75) |
| 364 | MCFG_SOUND_WAVE_ADD(WAVE_TAG, "cassette") |
| 365 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) |
| 366 | MACHINE_CONFIG_END |
| 367 | |
| 409 | 368 | static MACHINE_CONFIG_DERIVED( ts1000, zx81 ) |
| 410 | 369 | MCFG_PALETTE_MODIFY("palette") |
| 411 | | MCFG_PALETTE_INIT_OWNER(zx_state,ts1000) |
| 370 | MCFG_PALETTE_INIT_OWNER(zx_state, ts1000) |
| 412 | 371 | MACHINE_CONFIG_END |
| 413 | 372 | |
| 414 | 373 | static MACHINE_CONFIG_DERIVED( ts1500, ts1000 ) |
| 415 | | |
| 416 | 374 | /* internal ram */ |
| 417 | 375 | MCFG_RAM_MODIFY(RAM_TAG) |
| 418 | 376 | MCFG_RAM_DEFAULT_SIZE("16K") |
| 419 | 377 | MACHINE_CONFIG_END |
| 420 | 378 | |
| 421 | | static MACHINE_CONFIG_DERIVED( pc8300, zx81 ) |
| 422 | | |
| 379 | static MACHINE_CONFIG_DERIVED( pc8300, zx81_spk ) |
| 423 | 380 | MCFG_CPU_MODIFY("maincpu") |
| 424 | 381 | MCFG_CPU_IO_MAP(pc8300_io_map) |
| 425 | 382 | |
| 426 | | MCFG_MACHINE_RESET_OVERRIDE(zx_state,pc8300) |
| 427 | | |
| 428 | | MCFG_SCREEN_MODIFY("screen") |
| 429 | | MCFG_SCREEN_REFRESH_RATE(ZX81_NTSC_FRAMES_PER_SECOND) |
| 430 | | MCFG_SCREEN_SIZE(ZX81_PIXELS_PER_SCANLINE, ZX81_NTSC_SCANLINES) |
| 431 | | MCFG_SCREEN_VISIBLE_AREA(0, ZX81_PIXELS_PER_SCANLINE-1, 0, ZX81_NTSC_SCANLINES-1) |
| 432 | | |
| 433 | | MCFG_GFXDECODE_MODIFY("gfxdecode", pc8300) |
| 434 | | |
| 435 | 383 | /* internal ram */ |
| 436 | 384 | MCFG_RAM_MODIFY(RAM_TAG) |
| 437 | 385 | MCFG_RAM_DEFAULT_SIZE("16K") |
| 438 | 386 | MACHINE_CONFIG_END |
| 439 | 387 | |
| 440 | | static MACHINE_CONFIG_DERIVED( pow3000, zx81 ) |
| 441 | | |
| 388 | static MACHINE_CONFIG_DERIVED( pow3000, zx81_spk ) |
| 442 | 389 | MCFG_CPU_MODIFY("maincpu") |
| 443 | 390 | MCFG_CPU_IO_MAP(pow3000_io_map) |
| 444 | 391 | |
| 445 | | MCFG_MACHINE_RESET_OVERRIDE(zx_state,pow3000) |
| 446 | | |
| 447 | | MCFG_GFXDECODE_MODIFY("gfxdecode", pc8300) |
| 448 | | |
| 449 | 392 | /* internal ram */ |
| 450 | 393 | MCFG_RAM_MODIFY(RAM_TAG) |
| 451 | 394 | MCFG_RAM_DEFAULT_SIZE("2K") |
| r249940 | r249941 | |
|---|
| 456 | 399 | /* ROMs */ |
| 457 | 400 | |
| 458 | 401 | ROM_START(zx80) |
| 459 | | ROM_REGION( 0x10000, "maincpu",0 ) |
| 402 | ROM_REGION( 0x1000, "maincpu",0 ) |
| 460 | 403 | ROM_SYSTEM_BIOS(0, "default", "BASIC") |
| 461 | 404 | ROMX_LOAD( "zx80.rom", 0x0000, 0x1000, CRC(4c7fc597) SHA1(b6769a3197c77009e0933e038c15b43cf4c98c7a), ROM_BIOS(1) ) |
| 462 | 405 | ROM_SYSTEM_BIOS(1, "aszmic", "ASZMIC") |
| r249940 | r249941 | |
|---|
| 464 | 407 | ROM_END |
| 465 | 408 | |
| 466 | 409 | ROM_START(zx81) |
| 467 | | ROM_REGION( 0x10000, "maincpu",0 ) |
| 410 | ROM_REGION( 0x2000, "maincpu",0 ) |
| 468 | 411 | ROM_SYSTEM_BIOS(0, "3rd", "3rd rev.") |
| 469 | 412 | ROMX_LOAD( "zx81b.rom", 0x0000, 0x2000, CRC(522c37b8) SHA1(c6d8e06cb936989f6e1cc7a56d1f092da854a515), ROM_BIOS(1) ) |
| 470 | 413 | ROM_SYSTEM_BIOS(1, "1st", "1st rev.") |
| r249940 | r249941 | |
|---|
| 478 | 421 | ROM_END |
| 479 | 422 | |
| 480 | 423 | ROM_START(ts1000) |
| 481 | | ROM_REGION( 0x10000, "maincpu",0 ) |
| 424 | ROM_REGION( 0x2000, "maincpu",0 ) |
| 482 | 425 | ROM_LOAD( "zx81a.rom", 0x0000, 0x2000, CRC(4b1dd6eb) SHA1(7b143ee964e9ada89d1f9e88f0bd48d919184cfc) ) |
| 483 | 426 | ROM_END |
| 484 | 427 | |
| 485 | 428 | ROM_START(ts1500) |
| 486 | | ROM_REGION( 0x10000, "maincpu",0 ) |
| 429 | ROM_REGION( 0x2000, "maincpu",0 ) |
| 487 | 430 | ROM_LOAD( "d2364c_649.u2", 0x0000, 0x2000, CRC(7dd19c48) SHA1(3eb437359221b4406d236085ec66fa02278e7495) ) |
| 488 | 431 | ROM_END |
| 489 | 432 | |
| 490 | 433 | ROM_START(ringo470) |
| 491 | | ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF ) |
| 434 | ROM_REGION( 0x2000, "maincpu", ROMREGION_ERASEFF ) |
| 492 | 435 | ROM_LOAD( "ringo470.rom", 0x0000, 0x2000, CRC(b9c5abec) SHA1(191c4994adfffe4f83b98dc3959dde2724b1dbac) ) |
| 493 | 436 | ROM_END |
| 494 | 437 | |
| 495 | 438 | ROM_START(pc8300) |
| 496 | | ROM_REGION( 0x10000, "maincpu",0 ) |
| 439 | ROM_REGION( 0x2000, "maincpu",0 ) |
| 497 | 440 | ROM_LOAD( "8300_org.rom", 0x0000, 0x2000, CRC(a350f2b1) SHA1(6a9be484556cc27a9cd9d71085d2027c6243333f) ) |
| 498 | 441 | |
| 499 | 442 | ROM_REGION( 0x200, "gfx1", 0 ) |
| r249940 | r249941 | |
|---|
| 501 | 444 | ROM_END |
| 502 | 445 | |
| 503 | 446 | ROM_START(pow3000) |
| 504 | | ROM_REGION( 0x10000, "maincpu",0 ) |
| 447 | ROM_REGION( 0x2000, "maincpu",0 ) |
| 505 | 448 | ROM_LOAD( "pow3000.rom", 0x0000, 0x2000, CRC(8a49b2c3) SHA1(9b22daf2f3a991aa6a358ef95b091654c3ca1bdf) ) |
| 506 | 449 | |
| 507 | 450 | ROM_REGION( 0x200, "gfx1", 0 ) |
| r249940 | r249941 | |
|---|
| 509 | 452 | ROM_END |
| 510 | 453 | |
| 511 | 454 | ROM_START(lambda) |
| 512 | | ROM_REGION( 0x10000, "maincpu",0 ) |
| 455 | ROM_REGION( 0x2000, "maincpu",0 ) |
| 513 | 456 | ROM_LOAD( "lambda.rom", 0x0000, 0x2000, CRC(8a49b2c3) SHA1(9b22daf2f3a991aa6a358ef95b091654c3ca1bdf) ) |
| 514 | 457 | |
| 515 | 458 | ROM_REGION( 0x200, "gfx1", 0 ) |
| r249940 | r249941 | |
|---|
| 517 | 460 | ROM_END |
| 518 | 461 | |
| 519 | 462 | ROM_START( tk85 ) |
| 520 | | ROM_REGION( 0x10000, "maincpu", 0 ) |
| 463 | ROM_REGION( 0x2800, "maincpu", 0 ) |
| 521 | 464 | ROM_LOAD( "tk85.rom", 0x0000, 0x2800, CRC(8972d756) SHA1(7b961a1733fc047eb682150a32e17bca10a018d2) ) |
| 522 | 465 | ROM_END |
| 523 | 466 | |
| 524 | 467 | /* This homebrew has 192k of RAM and 32k of ROM via bankswitching. One of the primary bankswitching lines is /M1, |
| 525 | 468 | which is not emulated by MAME's z80. */ |
| 526 | 469 | ROM_START( zx97 ) |
| 527 | | ROM_REGION( 0x10000, "maincpu", 0 ) |
| 528 | | ROM_LOAD( "zx97.rom", 0x0000, 0x2000, CRC(5cf49744) SHA1(b2a486efdc7b2bc3dc8e5a441ea5532bfa3207bd) ) |
| 529 | | ROM_IGNORE( 0x6000 ) /* Unemulated bankswitched part */ |
| 470 | ROM_REGION( 0x8000, "maincpu", 0 ) |
| 471 | ROM_LOAD( "zx97.rom", 0x0000, 0x8000, CRC(5cf49744) SHA1(b2a486efdc7b2bc3dc8e5a441ea5532bfa3207bd) ) |
| 530 | 472 | ROM_END |
| 531 | 473 | |
| 532 | 474 | /* Game Drivers */ |
| 533 | 475 | |
| 534 | | /* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME FLAGS */ |
| 535 | | COMP( 1980, zx80, 0, 0, zx80, zx80, zx_state, zx, "Sinclair Research Ltd", "ZX-80", 0 ) |
| 536 | | COMP( 1981, zx81, 0, 0, zx81, zx81, zx_state, zx, "Sinclair Research Ltd", "ZX-81", 0 ) |
| 537 | | COMP( 1982, ts1000, zx81, 0, ts1000, zx81, zx_state, zx, "Timex Sinclair", "Timex Sinclair 1000", 0 ) |
| 538 | | COMP( 1983, ts1500, zx81, 0, ts1500, zx81, zx_state, zx, "Timex Sinclair", "Timex Sinclair 1500", 0 ) |
| 539 | | COMP( 1983, tk85, zx81, 0, ts1000, zx81, zx_state, zx, "Microdigital", "TK85", 0 ) |
| 540 | | COMP( 1983, ringo470, zx81, 0, ts1000, zx81, zx_state, zx, "Ritas do Brasil Ltda", "Ringo 470", 0 ) |
| 541 | | COMP( 1984, pc8300, zx81, 0, pc8300, pc8300, zx_state, zx, "Your Computer", "PC8300", 0 ) |
| 476 | COMP( 1980, zx80, 0, 0, zx80, zx80, zx_state, zx, "Sinclair Research Ltd", "ZX-80", MACHINE_NO_SOUND ) |
| 477 | COMP( 1981, zx81, 0, 0, zx81, zx81, zx_state, zx, "Sinclair Research Ltd", "ZX-81", MACHINE_NO_SOUND ) |
| 478 | COMP( 1982, ts1000, zx81, 0, ts1000, zx81, zx_state, zx, "Timex Sinclair", "Timex Sinclair 1000", MACHINE_NO_SOUND ) |
| 479 | COMP( 1983, ts1500, zx81, 0, ts1500, zx81, zx_state, zx, "Timex Sinclair", "Timex Sinclair 1500", MACHINE_NO_SOUND ) |
| 480 | COMP( 1983, tk85, zx81, 0, ts1000, zx81, zx_state, zx, "Microdigital", "TK85", MACHINE_NO_SOUND ) |
| 481 | COMP( 1983, ringo470, zx81, 0, ts1000, zx81, zx_state, zx, "Ritas do Brasil Ltda", "Ringo 470", MACHINE_NO_SOUND ) |
| 482 | COMP( 1984, pc8300, zx81, 0, pc8300, pc8300, zx_state, zx, "Your Computer", "PC8300", 0 ) |
| 542 | 483 | COMP( 1983, pow3000, zx81, 0, pow3000, pow3000, zx_state, zx, "Creon Enterprises", "Power 3000", 0 ) |
| 543 | 484 | COMP( 1982, lambda, zx81, 0, pow3000, pow3000, zx_state, zx, "Lambda Electronics Ltd", "Lambda 8300", 0 ) |
| 544 | | COMP( 1997, zx97, zx81, 0, zx81, zx81, zx_state, zx, "Wilf Rigter", "ZX97", MACHINE_NOT_WORKING | MACHINE_UNOFFICIAL ) |
| 485 | COMP( 1997, zx97, zx81, 0, zx81, zx81, zx_state, zx, "Wilf Rigter", "ZX97", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_UNOFFICIAL ) |
trunk/src/mame/includes/neogeo.h
| r249940 | r249941 | |
|---|
| 392 | 392 | ROM_LOAD16_WORD_SWAP_BIOS( 0, "sp-s2.sp1", 0x00000, 0x020000, CRC(9036d879) SHA1(4f5ed7105b7128794654ce82b51723e16e389543) ) /* Europe, 1 Slot, has also been found on 2 Slot and 4 Slot (the old hacks were designed for this one) */ \ |
| 393 | 393 | ROM_SYSTEM_BIOS( 1, "euro-s1", "Europe MVS (Ver. 1)" ) \ |
| 394 | 394 | ROM_LOAD16_WORD_SWAP_BIOS( 1, "sp-s.sp1", 0x00000, 0x020000, CRC(c7f2fa45) SHA1(09576ff20b4d6b365e78e6a5698ea450262697cd) ) /* Europe, 4 Slot */ \ |
| 395 | \ |
| 395 | 396 | ROM_SYSTEM_BIOS( 2, "us", "US MVS (Ver. 2?)" ) \ |
| 396 | 397 | ROM_LOAD16_WORD_SWAP_BIOS( 2, "sp-u2.sp1", 0x00000, 0x020000, CRC(e72943de) SHA1(5c6bba07d2ec8ac95776aa3511109f5e1e2e92eb) ) /* US, 2 Slot */ \ |
| 397 | 398 | ROM_SYSTEM_BIOS( 3, "us-e", "US MVS (Ver. 1)" ) \ |
| 398 | 399 | ROM_LOAD16_WORD_SWAP_BIOS( 3, "sp-e.sp1", 0x00000, 0x020000, CRC(2723a5b5) SHA1(5dbff7531cf04886cde3ef022fb5ca687573dcb8) ) /* US, 6 Slot (V5?) */ \ |
| 399 | | ROM_SYSTEM_BIOS( 4, "asia", "Asia MVS (Ver. 3)" ) \ |
| 400 | | ROM_LOAD16_WORD_SWAP_BIOS( 4, "asia-s3.rom", 0x00000, 0x020000, CRC(91b64be3) SHA1(720a3e20d26818632aedf2c2fd16c54f213543e1) ) /* Asia */ \ |
| 401 | | ROM_SYSTEM_BIOS( 5, "japan", "Japan MVS (Ver. 3)" ) \ |
| 402 | | ROM_LOAD16_WORD_SWAP_BIOS( 5, "vs-bios.rom", 0x00000, 0x020000, CRC(f0e8f27d) SHA1(ecf01eda815909f1facec62abf3594eaa8d11075) ) /* Japan, Ver 6 VS Bios */ \ |
| 403 | | ROM_SYSTEM_BIOS( 6, "japan-s2", "Japan MVS (Ver. 2)" ) \ |
| 404 | | ROM_LOAD16_WORD_SWAP_BIOS( 6, "sp-j2.sp1", 0x00000, 0x020000, CRC(acede59c) SHA1(b6f97acd282fd7e94d9426078a90f059b5e9dd91) ) /* Japan, Older */ \ |
| 405 | | ROM_SYSTEM_BIOS( 7, "japan-s1", "Japan MVS (Ver. 1)" ) \ |
| 406 | | ROM_LOAD16_WORD_SWAP_BIOS( 7, "sp1.jipan.1024", 0x00000, 0x020000, CRC(9fb0abe4) SHA1(18a987ce2229df79a8cf6a84f968f0e42ce4e59d) ) /* Japan, Older */ \ |
| 407 | | ROM_SYSTEM_BIOS( 8, "mv1c", "NEO-MVH MV1C" ) \ |
| 408 | | ROM_LOAD16_WORD_SWAP_BIOS( 8, "sp-45.sp1", 0x00000, 0x080000, CRC(03cc9f6a) SHA1(cdf1f49e3ff2bac528c21ed28449cf35b7957dc1) ) /* Latest Asia bios */ \ |
| 409 | | ROM_SYSTEM_BIOS( 9, "japan-j3", "Japan MVS (J3)" ) \ |
| 410 | | ROM_LOAD16_WORD_SWAP_BIOS( 9, "japan-j3.bin", 0x00000, 0x020000, CRC(dff6d41f) SHA1(e92910e20092577a4523a6b39d578a71d4de7085) ) /* Latest Japan bios; correct chip label unknown */ \ |
| 411 | | ROM_SYSTEM_BIOS(10, "japan-hotel", "Custom Japanese Hotel" ) \ |
| 412 | | ROM_LOAD16_WORD_SWAP_BIOS(10, "sp-1v1_3db8c.bin", 0x00000, 0x020000, CRC(162f0ebe) SHA1(fe1c6dd3dfcf97d960065b1bb46c1e11cb7bf271) ) /* 'rare MVS found in japanese hotels' shows v1.3 in test mode */ \ |
| 413 | | ROM_SYSTEM_BIOS(11, "unibios31", "Universe Bios (Hack, Ver. 3.1)" ) \ |
| 414 | | ROM_LOAD16_WORD_SWAP_BIOS(11, "uni-bios_3_1.rom", 0x00000, 0x020000, CRC(0c58093f) SHA1(29329a3448c2505e1ff45ffa75e61e9693165153) ) /* Universe Bios v3.1 (hack) */ \ |
| 415 | | ROM_SYSTEM_BIOS(12, "unibios30", "Universe Bios (Hack, Ver. 3.0)" ) \ |
| 416 | | ROM_LOAD16_WORD_SWAP_BIOS(12, "uni-bios_3_0.rom", 0x00000, 0x020000, CRC(a97c89a9) SHA1(97a5eff3b119062f10e31ad6f04fe4b90d366e7f) ) /* Universe Bios v3.0 (hack) */ \ |
| 417 | | ROM_SYSTEM_BIOS(13, "unibios23", "Universe Bios (Hack, Ver. 2.3)" ) \ |
| 418 | | ROM_LOAD16_WORD_SWAP_BIOS(13, "uni-bios_2_3.rom", 0x00000, 0x020000, CRC(27664eb5) SHA1(5b02900a3ccf3df168bdcfc98458136fd2b92ac0) ) /* Universe Bios v2.3 (hack) */ \ |
| 419 | | ROM_SYSTEM_BIOS(14, "unibios23o", "Universe Bios (Hack, Ver. 2.3, older?)" ) \ |
| 420 | | ROM_LOAD16_WORD_SWAP_BIOS(14, "uni-bios_2_3o.rom", 0x00000, 0x020000, CRC(601720ae) SHA1(1b8a72c720cdb5ee3f1d735bbcf447b09204b8d9) ) /* Universe Bios v2.3 (hack) alt version, withdrawn? */ \ |
| 421 | | ROM_SYSTEM_BIOS(15, "unibios22", "Universe Bios (Hack, Ver. 2.2)" ) \ |
| 422 | | ROM_LOAD16_WORD_SWAP_BIOS(15, "uni-bios_2_2.rom", 0x00000, 0x020000, CRC(2d50996a) SHA1(5241a4fb0c63b1a23fd1da8efa9c9a9bd3b4279c) ) /* Universe Bios v2.2 (hack) */ \ |
| 423 | | ROM_SYSTEM_BIOS(16, "unibios21", "Universe Bios (Hack, Ver. 2.1)" ) \ |
| 424 | | ROM_LOAD16_WORD_SWAP_BIOS(16, "uni-bios_2_1.rom", 0x00000, 0x020000, CRC(8dabf76b) SHA1(c23732c4491d966cf0373c65c83c7a4e88f0082c) ) /* Universe Bios v2.1 (hack) */ \ |
| 425 | | ROM_SYSTEM_BIOS(17, "unibios20", "Universe Bios (Hack, Ver. 2.0)" ) \ |
| 426 | | ROM_LOAD16_WORD_SWAP_BIOS(17, "uni-bios_2_0.rom", 0x00000, 0x020000, CRC(0c12c2ad) SHA1(37bcd4d30f3892078b46841d895a6eff16dc921e) ) /* Universe Bios v2.0 (hack) */ \ |
| 427 | | ROM_SYSTEM_BIOS(18, "unibios13", "Universe Bios (Hack, Ver. 1.3)" ) \ |
| 428 | | ROM_LOAD16_WORD_SWAP_BIOS(18, "uni-bios_1_3.rom", 0x00000, 0x020000, CRC(b24b44a0) SHA1(eca8851d30557b97c309a0d9f4a9d20e5b14af4e) ) /* Universe Bios v1.3 (hack) */ \ |
| 429 | | ROM_SYSTEM_BIOS(19, "unibios12", "Universe Bios (Hack, Ver. 1.2)" ) \ |
| 430 | | ROM_LOAD16_WORD_SWAP_BIOS(19, "uni-bios_1_2.rom", 0x00000, 0x020000, CRC(4fa698e9) SHA1(682e13ec1c42beaa2d04473967840c88fd52c75a) ) /* Universe Bios v1.2 (hack) */ \ |
| 431 | | ROM_SYSTEM_BIOS(20, "unibios12o", "Universe Bios (Hack, Ver. 1.2, older)" ) \ |
| 432 | | ROM_LOAD16_WORD_SWAP_BIOS(20, "uni-bios_1_2o.rom", 0x00000, 0x020000, CRC(e19d3ce9) SHA1(af88ef837f44a3af2d7144bb46a37c8512b67770) ) /* Universe Bios v1.2 (hack) alt version */ \ |
| 433 | | ROM_SYSTEM_BIOS(21, "unibios11", "Universe Bios (Hack, Ver. 1.1)" ) \ |
| 434 | | ROM_LOAD16_WORD_SWAP_BIOS(21, "uni-bios_1_1.rom", 0x00000, 0x020000, CRC(5dda0d84) SHA1(4153d533c02926a2577e49c32657214781ff29b7) ) /* Universe Bios v1.1 (hack) */ \ |
| 435 | | ROM_SYSTEM_BIOS(22, "unibios10", "Universe Bios (Hack, Ver. 1.0)" ) \ |
| 436 | | ROM_LOAD16_WORD_SWAP_BIOS(22, "uni-bios_1_0.rom", 0x00000, 0x020000, CRC(0ce453a0) SHA1(3b4c0cd26c176fc6b26c3a2f95143dd478f6abf9) ) /* Universe Bios v1.0 (hack) */ |
| 400 | ROM_SYSTEM_BIOS( 4, "us-v2", "US MVS (4 slot, Ver 2)" ) \ |
| 401 | ROM_LOAD16_WORD_SWAP_BIOS(4, "v2.bin", 0x00000, 0x020000, CRC(62f021f4) SHA1(62d372269e1b3161c64ae21123655a0a22ffd1bb) ) /* US, 4 slot */ \ |
| 402 | \ |
| 403 | ROM_SYSTEM_BIOS( 5, "asia", "Asia MVS (Ver. 3)" ) \ |
| 404 | ROM_LOAD16_WORD_SWAP_BIOS( 5, "asia-s3.rom", 0x00000, 0x020000, CRC(91b64be3) SHA1(720a3e20d26818632aedf2c2fd16c54f213543e1) ) /* Asia */ \ |
| 405 | \ |
| 406 | ROM_SYSTEM_BIOS( 6, "japan", "Japan MVS (Ver. 3)" ) \ |
| 407 | ROM_LOAD16_WORD_SWAP_BIOS( 6, "vs-bios.rom", 0x00000, 0x020000, CRC(f0e8f27d) SHA1(ecf01eda815909f1facec62abf3594eaa8d11075) ) /* Japan, Ver 6 VS Bios */ \ |
| 408 | ROM_SYSTEM_BIOS( 7, "japan-s2", "Japan MVS (Ver. 2)" ) \ |
| 409 | ROM_LOAD16_WORD_SWAP_BIOS( 7, "sp-j2.sp1", 0x00000, 0x020000, CRC(acede59c) SHA1(b6f97acd282fd7e94d9426078a90f059b5e9dd91) ) /* Japan, Older */ \ |
| 410 | ROM_SYSTEM_BIOS( 8, "japan-s1", "Japan MVS (Ver. 1)" ) \ |
| 411 | ROM_LOAD16_WORD_SWAP_BIOS( 8, "sp1.jipan.1024", 0x00000, 0x020000, CRC(9fb0abe4) SHA1(18a987ce2229df79a8cf6a84f968f0e42ce4e59d) ) /* Japan, Older */ \ |
| 412 | ROM_SYSTEM_BIOS( 9, "mv1c", "NEO-MVH MV1C" ) \ |
| 413 | ROM_LOAD16_WORD_SWAP_BIOS( 9, "sp-45.sp1", 0x00000, 0x080000, CRC(03cc9f6a) SHA1(cdf1f49e3ff2bac528c21ed28449cf35b7957dc1) ) /* Latest Asia bios */ \ |
| 414 | ROM_SYSTEM_BIOS( 10, "japan-j3", "Japan MVS (J3)" ) \ |
| 415 | ROM_LOAD16_WORD_SWAP_BIOS( 10, "japan-j3.bin", 0x00000, 0x020000, CRC(dff6d41f) SHA1(e92910e20092577a4523a6b39d578a71d4de7085) ) /* Latest Japan bios; correct chip label unknown */ \ |
| 416 | ROM_SYSTEM_BIOS(11, "japan-hotel", "Custom Japanese Hotel" ) \ |
| 417 | ROM_LOAD16_WORD_SWAP_BIOS(11, "sp-1v1_3db8c.bin", 0x00000, 0x020000, CRC(162f0ebe) SHA1(fe1c6dd3dfcf97d960065b1bb46c1e11cb7bf271) ) /* 'rare MVS found in japanese hotels' shows v1.3 in test mode */ \ |
| 418 | \ |
| 419 | ROM_SYSTEM_BIOS(12, "unibios31", "Universe Bios (Hack, Ver. 3.1)" ) \ |
| 420 | ROM_LOAD16_WORD_SWAP_BIOS(12, "uni-bios_3_1.rom", 0x00000, 0x020000, CRC(0c58093f) SHA1(29329a3448c2505e1ff45ffa75e61e9693165153) ) /* Universe Bios v3.1 (hack) */ \ |
| 421 | ROM_SYSTEM_BIOS(13, "unibios30", "Universe Bios (Hack, Ver. 3.0)" ) \ |
| 422 | ROM_LOAD16_WORD_SWAP_BIOS(13, "uni-bios_3_0.rom", 0x00000, 0x020000, CRC(a97c89a9) SHA1(97a5eff3b119062f10e31ad6f04fe4b90d366e7f) ) /* Universe Bios v3.0 (hack) */ \ |
| 423 | ROM_SYSTEM_BIOS(14, "unibios23", "Universe Bios (Hack, Ver. 2.3)" ) \ |
| 424 | ROM_LOAD16_WORD_SWAP_BIOS(14, "uni-bios_2_3.rom", 0x00000, 0x020000, CRC(27664eb5) SHA1(5b02900a3ccf3df168bdcfc98458136fd2b92ac0) ) /* Universe Bios v2.3 (hack) */ \ |
| 425 | ROM_SYSTEM_BIOS(15, "unibios23o", "Universe Bios (Hack, Ver. 2.3, older?)" ) \ |
| 426 | ROM_LOAD16_WORD_SWAP_BIOS(15, "uni-bios_2_3o.rom", 0x00000, 0x020000, CRC(601720ae) SHA1(1b8a72c720cdb5ee3f1d735bbcf447b09204b8d9) ) /* Universe Bios v2.3 (hack) alt version, withdrawn? */ \ |
| 427 | ROM_SYSTEM_BIOS(16, "unibios22", "Universe Bios (Hack, Ver. 2.2)" ) \ |
| 428 | ROM_LOAD16_WORD_SWAP_BIOS(16, "uni-bios_2_2.rom", 0x00000, 0x020000, CRC(2d50996a) SHA1(5241a4fb0c63b1a23fd1da8efa9c9a9bd3b4279c) ) /* Universe Bios v2.2 (hack) */ \ |
| 429 | ROM_SYSTEM_BIOS(17, "unibios21", "Universe Bios (Hack, Ver. 2.1)" ) \ |
| 430 | ROM_LOAD16_WORD_SWAP_BIOS(17, "uni-bios_2_1.rom", 0x00000, 0x020000, CRC(8dabf76b) SHA1(c23732c4491d966cf0373c65c83c7a4e88f0082c) ) /* Universe Bios v2.1 (hack) */ \ |
| 431 | ROM_SYSTEM_BIOS(18, "unibios20", "Universe Bios (Hack, Ver. 2.0)" ) \ |
| 432 | ROM_LOAD16_WORD_SWAP_BIOS(18, "uni-bios_2_0.rom", 0x00000, 0x020000, CRC(0c12c2ad) SHA1(37bcd4d30f3892078b46841d895a6eff16dc921e) ) /* Universe Bios v2.0 (hack) */ \ |
| 433 | ROM_SYSTEM_BIOS(19, "unibios13", "Universe Bios (Hack, Ver. 1.3)" ) \ |
| 434 | ROM_LOAD16_WORD_SWAP_BIOS(19, "uni-bios_1_3.rom", 0x00000, 0x020000, CRC(b24b44a0) SHA1(eca8851d30557b97c309a0d9f4a9d20e5b14af4e) ) /* Universe Bios v1.3 (hack) */ \ |
| 435 | ROM_SYSTEM_BIOS(20, "unibios12", "Universe Bios (Hack, Ver. 1.2)" ) \ |
| 436 | ROM_LOAD16_WORD_SWAP_BIOS(20, "uni-bios_1_2.rom", 0x00000, 0x020000, CRC(4fa698e9) SHA1(682e13ec1c42beaa2d04473967840c88fd52c75a) ) /* Universe Bios v1.2 (hack) */ \ |
| 437 | ROM_SYSTEM_BIOS(21, "unibios12o", "Universe Bios (Hack, Ver. 1.2, older)" ) \ |
| 438 | ROM_LOAD16_WORD_SWAP_BIOS(21, "uni-bios_1_2o.rom", 0x00000, 0x020000, CRC(e19d3ce9) SHA1(af88ef837f44a3af2d7144bb46a37c8512b67770) ) /* Universe Bios v1.2 (hack) alt version */ \ |
| 439 | ROM_SYSTEM_BIOS(22, "unibios11", "Universe Bios (Hack, Ver. 1.1)" ) \ |
| 440 | ROM_LOAD16_WORD_SWAP_BIOS(22, "uni-bios_1_1.rom", 0x00000, 0x020000, CRC(5dda0d84) SHA1(4153d533c02926a2577e49c32657214781ff29b7) ) /* Universe Bios v1.1 (hack) */ \ |
| 441 | ROM_SYSTEM_BIOS(23, "unibios10", "Universe Bios (Hack, Ver. 1.0)" ) \ |
| 442 | ROM_LOAD16_WORD_SWAP_BIOS(23, "uni-bios_1_0.rom", 0x00000, 0x020000, CRC(0ce453a0) SHA1(3b4c0cd26c176fc6b26c3a2f95143dd478f6abf9) ) /* Universe Bios v1.0 (hack) */ |
| 437 | 443 | |
| 438 | 444 | |
| 439 | 445 | |
trunk/src/mame/layout/by17_matahari.lay
| r249940 | r249941 | |
|---|
| 185 | 185 | <disk state="0"><color red="0.15" green="0.15" blue="0.15" /></disk> |
| 186 | 186 | <disk state="1"><color red="1.00" green="1.00" blue="1.00" /></disk> |
| 187 | 187 | </element> |
| 188 | | <element name="Lamp_Red" defstate="0"> <!-- Usually for Specials --> |
| 188 | <element name="Lamp_Red" defstate="0"> <!-- Usually for Specials --> |
| 189 | 189 | <disk state="0"><color red="0.15" green="0.00" blue="0.00" /></disk> |
| 190 | 190 | <disk state="1"><color red="1.00" green="0.00" blue="0.00" /></disk> |
| 191 | 191 | </element> |
| 192 | | <element name="Lamp_Amber" defstate="0"> <!-- Usually for Extra Ball--> |
| 192 | <element name="Lamp_Amber" defstate="0"> <!-- Usually for Extra Ball--> |
| 193 | 193 | <disk state="0"><color red="0.15" green="0.06" blue="0.00" /></disk> |
| 194 | 194 | <disk state="1"><color red="1.00" green="0.40" blue="0.00" /></disk> |
| 195 | 195 | </element> |
| r249940 | r249941 | |
|---|
| 384 | 384 | <text string="3k"><color red="0.0" green="0.0" blue="0.0" /><bounds x="06" y="08" width="12" height="12" /></text> |
| 385 | 385 | </element> |
| 386 | 386 | |
| 387 | | <element name="Lamp_Green_Arrow_04_2x" defstate="1"> <!-- Point at 4 o clock --> |
| 387 | <element name="Lamp_Green_Arrow_04_2x" defstate="1"> <!-- Point at 4 o clock --> |
| 388 | 388 | <rect state="1"><color red="0.00" green="1.00" blue="0.00" /><bounds x="00" y="00" width="08" height="03" /></rect> |
| 389 | 389 | <rect state="0"><color red="0.00" green="0.15" blue="0.00" /><bounds x="00" y="00" width="08" height="03" /></rect> |
| 390 | 390 | <rect state="1"><color red="0.00" green="1.00" blue="0.00" /><bounds x="05" y="03" width="08" height="03" /></rect> |
| r249940 | r249941 | |
|---|
| 406 | 406 | <text string="2x"><color red="0.0" green="0.0" blue="0.0" /><bounds x="18" y="08" width="15" height="15" /></text> |
| 407 | 407 | </element> |
| 408 | 408 | |
| 409 | | <element name="Lamp_Yellow_Arrow_04_3x" defstate="1"> <!-- Point at 4 o clock --> |
| 409 | <element name="Lamp_Yellow_Arrow_04_3x" defstate="1"> <!-- Point at 4 o clock --> |
| 410 | 410 | <rect state="1"><color red="1.00" green="1.00" blue="0.00" /><bounds x="00" y="00" width="08" height="03" /></rect> |
| 411 | 411 | <rect state="0"><color red="0.15" green="0.15" blue="0.00" /><bounds x="00" y="00" width="08" height="03" /></rect> |
| 412 | 412 | <rect state="1"><color red="1.00" green="1.00" blue="0.00" /><bounds x="05" y="03" width="08" height="03" /></rect> |
| r249940 | r249941 | |
|---|
| 428 | 428 | <text string="3x"><color red="0.0" green="0.0" blue="0.0" /><bounds x="18" y="08" width="15" height="15" /></text> |
| 429 | 429 | </element> |
| 430 | 430 | |
| 431 | | <element name="Lamp_White_Arrow_08_5x" defstate="1"> <!-- Point at 8 o clock --> |
| 431 | <element name="Lamp_White_Arrow_08_5x" defstate="1"> <!-- Point at 8 o clock --> |
| 432 | 432 | <rect state="1"><color red="1.00" green="1.00" blue="1.00" /><bounds x="28" y="00" width="08" height="03" /></rect> |
| 433 | 433 | <rect state="0"><color red="0.15" green="0.15" blue="0.15" /><bounds x="28" y="00" width="08" height="03" /></rect> |
| 434 | 434 | <rect state="1"><color red="1.00" green="1.00" blue="1.00" /><bounds x="23" y="03" width="08" height="03" /></rect> |
| r249940 | r249941 | |
|---|
| 450 | 450 | <text string="5x"><color red="0.0" green="0.0" blue="0.0" /><bounds x="06" y="08" width="15" height="15" /></text> |
| 451 | 451 | </element> |
| 452 | 452 | |
| 453 | | <element name="Lamp_Amber_Arrow_08" defstate="1"> <!-- Point at 8 o clock --> |
| 453 | <element name="Lamp_Amber_Arrow_08" defstate="1"> <!-- Point at 8 o clock --> |
| 454 | 454 | <rect state="1"><color red="1.00" green="0.40" blue="0.00" /><bounds x="28" y="00" width="08" height="03" /></rect> |
| 455 | 455 | <rect state="0"><color red="0.15" green="0.06" blue="0.00" /><bounds x="28" y="00" width="08" height="03" /></rect> |
| 456 | 456 | <rect state="1"><color red="1.00" green="0.40" blue="0.00" /><bounds x="23" y="03" width="08" height="03" /></rect> |
| r249940 | r249941 | |
|---|
| 471 | 471 | <rect state="0"><color red="0.15" green="0.06" blue="0.00" /><bounds x="00" y="18" width="20" height="03" /></rect> |
| 472 | 472 | </element> |
| 473 | 473 | |
| 474 | | <element name="Lamp_White_Arrow_11_A" defstate="1"> <!-- Point at 11 o clock --> |
| 474 | <element name="Lamp_White_Arrow_11_A" defstate="1"> <!-- Point at 11 o clock --> |
| 475 | 475 | <rect state="1"><color red="1.00" green="1.00" blue="1.00" /><bounds x="00" y="00" width="03" height="20" /></rect> |
| 476 | 476 | <rect state="0"><color red="0.15" green="0.15" blue="0.15" /><bounds x="00" y="00" width="03" height="20" /></rect> |
| 477 | 477 | <rect state="1"><color red="1.00" green="1.00" blue="1.00" /><bounds x="03" y="02" width="03" height="17" /></rect> |
| r249940 | r249941 | |
|---|
| 493 | 493 | <text string="A"><color red="0.0" green="0.0" blue="0.0" /><bounds x="-2" y="03" width="18" height="18" /></text> |
| 494 | 494 | </element> |
| 495 | 495 | |
| 496 | | <element name="Lamp_White_Arrow_01_B" defstate="1"> <!-- Point at 1 o clock --> |
| 496 | <element name="Lamp_White_Arrow_01_B" defstate="1"> <!-- Point at 1 o clock --> |
| 497 | 497 | <rect state="1"><color red="1.00" green="1.00" blue="1.00" /><bounds x="18" y="00" width="03" height="20" /></rect> |
| 498 | 498 | <rect state="0"><color red="0.15" green="0.15" blue="0.15" /><bounds x="18" y="00" width="03" height="20" /></rect> |
| 499 | 499 | <rect state="1"><color red="1.00" green="1.00" blue="1.00" /><bounds x="15" y="02" width="03" height="17" /></rect> |
| r249940 | r249941 | |
|---|
| 710 | 710 | |
| 711 | 711 | <!-- Background --> |
| 712 | 712 | <backdrop element="Canvas"><bounds x="0" y="0" width="640" height="480" /></backdrop> |
| 713 | | |
| 713 | |
| 714 | 714 | <bezel element="Draw_White"><bounds x="0" y="0" width="640" height="1" /></bezel> |
| 715 | 715 | <bezel element="Draw_White"><bounds x="0" y="0" width="1" height="480" /></bezel> |
| 716 | 716 | <bezel element="Draw_White"><bounds x="640" y="0" width="1" height="480" /></bezel> |
| r249940 | r249941 | |
|---|
| 735 | 735 | |
| 736 | 736 | |
| 737 | 737 | <!-- Player 1 Score --> |
| 738 | | <bezel name="lamp14" element="Lamp_P1"><bounds x="330" y="55" width="15" height="15" /></bezel> <!-- Backbox ~ 1st Player Up --> |
| 738 | <bezel name="lamp14" element="Lamp_P1"><bounds x="330" y="55" width="15" height="15" /></bezel> <!-- Backbox ~ 1st Player Up --> |
| 739 | 739 | <bezel name="digit17" element="Digit"><bounds x="360" y="55" width="10" height="15" /></bezel> |
| 740 | 740 | <bezel name="digit16" element="Digit"><bounds x="374" y="55" width="10" height="15" /></bezel> |
| 741 | 741 | <bezel name="digit15" element="Digit"><bounds x="388" y="55" width="10" height="15" /></bezel> |
| r249940 | r249941 | |
|---|
| 745 | 745 | <bezel name="digit11" element="Digit"><bounds x="444" y="55" width="10" height="15" /></bezel> |
| 746 | 746 | |
| 747 | 747 | <!-- Player 2 Score --> |
| 748 | | <bezel name="lamp29" element="Lamp_P2"><bounds x="615" y="55" width="15" height="15" /></bezel> <!-- Backbox ~ 2nd Player Up --> |
| 748 | <bezel name="lamp29" element="Lamp_P2"><bounds x="615" y="55" width="15" height="15" /></bezel> <!-- Backbox ~ 2nd Player Up --> |
| 749 | 749 | <bezel name="digit27" element="Digit"><bounds x="506" y="55" width="10" height="15" /></bezel> |
| 750 | 750 | <bezel name="digit26" element="Digit"><bounds x="520" y="55" width="10" height="15" /></bezel> |
| 751 | 751 | <bezel name="digit25" element="Digit"><bounds x="534" y="55" width="10" height="15" /></bezel> |
| r249940 | r249941 | |
|---|
| 755 | 755 | <bezel name="digit21" element="Digit"><bounds x="590" y="55" width="10" height="15" /></bezel> |
| 756 | 756 | |
| 757 | 757 | <!-- Player 3 Score --> |
| 758 | | <bezel name="lamp44" element="Lamp_P3"><bounds x="330" y="250" width="15" height="15" /></bezel> <!-- Backbox ~ 3rd Player Up --> |
| 758 | <bezel name="lamp44" element="Lamp_P3"><bounds x="330" y="250" width="15" height="15" /></bezel> <!-- Backbox ~ 3rd Player Up --> |
| 759 | 759 | <bezel name="digit37" element="Digit"><bounds x="360" y="250" width="10" height="15" /></bezel> |
| 760 | 760 | <bezel name="digit36" element="Digit"><bounds x="374" y="250" width="10" height="15" /></bezel> |
| 761 | 761 | <bezel name="digit35" element="Digit"><bounds x="388" y="250" width="10" height="15" /></bezel> |
| r249940 | r249941 | |
|---|
| 765 | 765 | <bezel name="digit31" element="Digit"><bounds x="444" y="250" width="10" height="15" /></bezel> |
| 766 | 766 | |
| 767 | 767 | <!-- Player 4 Score --> |
| 768 | | <bezel name="lamp59" element="Lamp_P4"><bounds x="615" y="250" width="15" height="15" /></bezel> <!-- Backbox ~ 4th Player Up --> |
| 768 | <bezel name="lamp59" element="Lamp_P4"><bounds x="615" y="250" width="15" height="15" /></bezel> <!-- Backbox ~ 4th Player Up --> |
| 769 | 769 | <bezel name="digit47" element="Digit"><bounds x="506" y="250" width="10" height="15" /></bezel> |
| 770 | 770 | <bezel name="digit46" element="Digit"><bounds x="520" y="250" width="10" height="15" /></bezel> |
| 771 | 771 | <bezel name="digit45" element="Digit"><bounds x="534" y="250" width="10" height="15" /></bezel> |
| r249940 | r249941 | |
|---|
| 776 | 776 | |
| 777 | 777 | <!-- Credits and Ball In Play / Match --> |
| 778 | 778 | <bezel element="Text_Credit"><bounds x="542" y="142" width="48" height="8" /></bezel> |
| 779 | | <bezel name="lamp12" element="Ball_In_Play"><bounds x="586" y="105" width="50" height="11" /></bezel> <!-- Backbox ~ Ball In Play --> |
| 780 | | <bezel name="lamp25" element="Match"><bounds x="596" y="152" width="25" height="11" /></bezel> <!-- Backbox ~ Match --> |
| 779 | <bezel name="lamp12" element="Ball_In_Play"><bounds x="586" y="105" width="50" height="11" /></bezel> <!-- Backbox ~ Ball In Play --> |
| 780 | <bezel name="lamp25" element="Match"><bounds x="596" y="152" width="25" height="11" /></bezel> <!-- Backbox ~ Match --> |
| 781 | 781 | <bezel name="digit55" element="Digit"><bounds x="554" y="125" width="10" height="15" /></bezel> |
| 782 | 782 | <bezel name="digit54" element="Digit"><bounds x="568" y="125" width="10" height="15" /></bezel> |
| 783 | 783 | <bezel name="digit52" element="Digit"><bounds x="596" y="125" width="10" height="15" /></bezel> |
| 784 | 784 | <bezel name="digit51" element="Digit"><bounds x="610" y="125" width="10" height="15" /></bezel> |
| 785 | 785 | |
| 786 | | <bezel name="lamp10" element="Shoot_Again"><bounds x="420" y="295" width="60" height="19" /></bezel> <!-- Backbox ~ Same Player Shoots Again --> |
| 787 | | <bezel name="lamp13" element="Lamp_1P"><bounds x="345" y="297" width="15" height="15" /></bezel> <!-- Backbox ~ 1 Player Game --> |
| 788 | | <bezel name="lamp28" element="Lamp_2P"><bounds x="360" y="297" width="15" height="15" /></bezel> <!-- Backbox ~ 2 Player Game --> |
| 789 | | <bezel name="lamp43" element="Lamp_3P"><bounds x="375" y="297" width="15" height="15" /></bezel> <!-- Backbox ~ 3 Player Game --> |
| 790 | | <bezel name="lamp58" element="Lamp_4P"><bounds x="390" y="297" width="15" height="15" /></bezel> <!-- Backbox ~ 4 Player Game --> |
| 791 | | <bezel name="lamp27" element="High_Score_To_Date"><bounds x="438" y="6" width="90" height="11" /></bezel> <!-- Backbox ~ High Score To Date --> |
| 792 | | <bezel name="lamp42" element="Game_Over"><bounds x="580" y="300" width="45" height="11" /></bezel> <!-- Backbox ~ Game Over --> |
| 793 | | <bezel name="lamp57" element="Tilt"><bounds x="480" y="297" width="50" height="16" /></bezel> <!-- Backbox ~ Tilt --> |
| 786 | <bezel name="lamp10" element="Shoot_Again"><bounds x="420" y="295" width="60" height="19" /></bezel> <!-- Backbox ~ Same Player Shoots Again --> |
| 787 | <bezel name="lamp13" element="Lamp_1P"><bounds x="345" y="297" width="15" height="15" /></bezel> <!-- Backbox ~ 1 Player Game --> |
| 788 | <bezel name="lamp28" element="Lamp_2P"><bounds x="360" y="297" width="15" height="15" /></bezel> <!-- Backbox ~ 2 Player Game --> |
| 789 | <bezel name="lamp43" element="Lamp_3P"><bounds x="375" y="297" width="15" height="15" /></bezel> <!-- Backbox ~ 3 Player Game --> |
| 790 | <bezel name="lamp58" element="Lamp_4P"><bounds x="390" y="297" width="15" height="15" /></bezel> <!-- Backbox ~ 4 Player Game --> |
| 791 | <bezel name="lamp27" element="High_Score_To_Date"><bounds x="438" y="6" width="90" height="11" /></bezel> <!-- Backbox ~ High Score To Date --> |
| 792 | <bezel name="lamp42" element="Game_Over"><bounds x="580" y="300" width="45" height="11" /></bezel> <!-- Backbox ~ Game Over --> |
| 793 | <bezel name="lamp57" element="Tilt"><bounds x="480" y="297" width="50" height="16" /></bezel> <!-- Backbox ~ Tilt --> |
| 794 | 794 | |
| 795 | 795 | |
| 796 | 796 | |
| r249940 | r249941 | |
|---|
| 801 | 801 | <bezel element="Text_60"><bounds x="552" y="418" width="30" height="11" /></bezel> |
| 802 | 802 | |
| 803 | 803 | <!-- Lamps controlled by U1 on Lamp Driver Board --> |
| 804 | | <bezel name="lamp0" element="Lamp_White"><bounds x="330" y="375" width="8" height="8" /></bezel> <!-- U1 00 --> |
| 805 | | <bezel name="lamp1" element="Lamp_White"><bounds x="345" y="375" width="8" height="8" /></bezel> <!-- U1 01 --> |
| 806 | | <bezel name="lamp2" element="Lamp_White"><bounds x="360" y="375" width="8" height="8" /></bezel> <!-- U1 02 --> |
| 807 | | <bezel name="lamp3" element="Lamp_White"><bounds x="375" y="375" width="8" height="8" /></bezel> <!-- U1 03 --> |
| 808 | | <bezel name="lamp4" element="Lamp_White"><bounds x="390" y="375" width="8" height="8" /></bezel> <!-- U1 04 --> |
| 809 | | <bezel name="lamp5" element="Lamp_White"><bounds x="405" y="375" width="8" height="8" /></bezel> <!-- U1 05 --> |
| 810 | | <bezel name="lamp6" element="Lamp_White"><bounds x="420" y="375" width="8" height="8" /></bezel> <!-- U1 06 --> |
| 811 | | <bezel name="lamp7" element="Lamp_White"><bounds x="435" y="375" width="8" height="8" /></bezel> <!-- U1 07 --> |
| 812 | | <bezel name="lamp8" element="Lamp_White"><bounds x="450" y="375" width="8" height="8" /></bezel> <!-- U1 08 --> |
| 813 | | <bezel name="lamp9" element="Lamp_White"><bounds x="465" y="375" width="8" height="8" /></bezel> <!-- U1 09 --> |
| 814 | | <bezel name="lamp10" element="Lamp_White"><bounds x="480" y="375" width="8" height="8" /></bezel> <!-- U1 10 --> |
| 815 | | <bezel name="lamp11" element="Lamp_White"><bounds x="495" y="375" width="8" height="8" /></bezel> <!-- U1 11 --> |
| 816 | | <bezel name="lamp12" element="Lamp_White"><bounds x="510" y="375" width="8" height="8" /></bezel> <!-- U1 12 --> |
| 817 | | <bezel name="lamp13" element="Lamp_White"><bounds x="525" y="375" width="8" height="8" /></bezel> <!-- U1 13 --> |
| 818 | | <bezel name="lamp14" element="Lamp_White"><bounds x="540" y="375" width="8" height="8" /></bezel> <!-- U1 14 --> |
| 804 | <bezel name="lamp0" element="Lamp_White"><bounds x="330" y="375" width="8" height="8" /></bezel> <!-- U1 00 --> |
| 805 | <bezel name="lamp1" element="Lamp_White"><bounds x="345" y="375" width="8" height="8" /></bezel> <!-- U1 01 --> |
| 806 | <bezel name="lamp2" element="Lamp_White"><bounds x="360" y="375" width="8" height="8" /></bezel> <!-- U1 02 --> |
| 807 | <bezel name="lamp3" element="Lamp_White"><bounds x="375" y="375" width="8" height="8" /></bezel> <!-- U1 03 --> |
| 808 | <bezel name="lamp4" element="Lamp_White"><bounds x="390" y="375" width="8" height="8" /></bezel> <!-- U1 04 --> |
| 809 | <bezel name="lamp5" element="Lamp_White"><bounds x="405" y="375" width="8" height="8" /></bezel> <!-- U1 05 --> |
| 810 | <bezel name="lamp6" element="Lamp_White"><bounds x="420" y="375" width="8" height="8" /></bezel> <!-- U1 06 --> |
| 811 | <bezel name="lamp7" element="Lamp_White"><bounds x="435" y="375" width="8" height="8" /></bezel> <!-- U1 07 --> |
| 812 | <bezel name="lamp8" element="Lamp_White"><bounds x="450" y="375" width="8" height="8" /></bezel> <!-- U1 08 --> |
| 813 | <bezel name="lamp9" element="Lamp_White"><bounds x="465" y="375" width="8" height="8" /></bezel> <!-- U1 09 --> |
| 814 | <bezel name="lamp10" element="Lamp_White"><bounds x="480" y="375" width="8" height="8" /></bezel> <!-- U1 10 --> |
| 815 | <bezel name="lamp11" element="Lamp_White"><bounds x="495" y="375" width="8" height="8" /></bezel> <!-- U1 11 --> |
| 816 | <bezel name="lamp12" element="Lamp_White"><bounds x="510" y="375" width="8" height="8" /></bezel> <!-- U1 12 --> |
| 817 | <bezel name="lamp13" element="Lamp_White"><bounds x="525" y="375" width="8" height="8" /></bezel> <!-- U1 13 --> |
| 818 | <bezel name="lamp14" element="Lamp_White"><bounds x="540" y="375" width="8" height="8" /></bezel> <!-- U1 14 --> |
| 819 | 819 | |
| 820 | 820 | <!-- Lamps controlled by U2 on Lamp Driver Board --> |
| 821 | | <bezel name="lamp15" element="Lamp_White"><bounds x="330" y="390" width="8" height="8" /></bezel> <!-- U2 00 --> |
| 822 | | <bezel name="lamp16" element="Lamp_White"><bounds x="345" y="390" width="8" height="8" /></bezel> <!-- U2 01 --> |
| 823 | | <bezel name="lamp17" element="Lamp_White"><bounds x="360" y="390" width="8" height="8" /></bezel> <!-- U2 02 --> |
| 824 | | <bezel name="lamp18" element="Lamp_White"><bounds x="375" y="390" width="8" height="8" /></bezel> <!-- U2 03 --> |
| 825 | | <bezel name="lamp19" element="Lamp_White"><bounds x="390" y="390" width="8" height="8" /></bezel> <!-- U2 04 --> |
| 826 | | <bezel name="lamp20" element="Lamp_White"><bounds x="405" y="390" width="8" height="8" /></bezel> <!-- U2 05 --> |
| 827 | | <bezel name="lamp21" element="Lamp_White"><bounds x="420" y="390" width="8" height="8" /></bezel> <!-- U2 06 --> |
| 828 | | <bezel name="lamp22" element="Lamp_White"><bounds x="435" y="390" width="8" height="8" /></bezel> <!-- U2 07 --> |
| 829 | | <bezel name="lamp23" element="Lamp_White"><bounds x="450" y="390" width="8" height="8" /></bezel> <!-- U2 08 --> |
| 830 | | <bezel name="lamp24" element="Lamp_White"><bounds x="465" y="390" width="8" height="8" /></bezel> <!-- U2 09 --> |
| 831 | | <bezel name="lamp25" element="Lamp_White"><bounds x="480" y="390" width="8" height="8" /></bezel> <!-- U2 10 --> |
| 832 | | <bezel name="lamp26" element="Lamp_White"><bounds x="495" y="390" width="8" height="8" /></bezel> <!-- U2 11 --> |
| 833 | | <bezel name="lamp27" element="Lamp_White"><bounds x="510" y="390" width="8" height="8" /></bezel> <!-- U2 12 --> |
| 834 | | <bezel name="lamp28" element="Lamp_White"><bounds x="525" y="390" width="8" height="8" /></bezel> <!-- U2 13 --> |
| 835 | | <bezel name="lamp29" element="Lamp_White"><bounds x="540" y="390" width="8" height="8" /></bezel> <!-- U2 14 --> |
| 821 | <bezel name="lamp15" element="Lamp_White"><bounds x="330" y="390" width="8" height="8" /></bezel> <!-- U2 00 --> |
| 822 | <bezel name="lamp16" element="Lamp_White"><bounds x="345" y="390" width="8" height="8" /></bezel> <!-- U2 01 --> |
| 823 | <bezel name="lamp17" element="Lamp_White"><bounds x="360" y="390" width="8" height="8" /></bezel> <!-- U2 02 --> |
| 824 | <bezel name="lamp18" element="Lamp_White"><bounds x="375" y="390" width="8" height="8" /></bezel> <!-- U2 03 --> |
| 825 | <bezel name="lamp19" element="Lamp_White"><bounds x="390" y="390" width="8" height="8" /></bezel> <!-- U2 04 --> |
| 826 | <bezel name="lamp20" element="Lamp_White"><bounds x="405" y="390" width="8" height="8" /></bezel> <!-- U2 05 --> |
| 827 | <bezel name="lamp21" element="Lamp_White"><bounds x="420" y="390" width="8" height="8" /></bezel> <!-- U2 06 --> |
| 828 | <bezel name="lamp22" element="Lamp_White"><bounds x="435" y="390" width="8" height="8" /></bezel> <!-- U2 07 --> |
| 829 | <bezel name="lamp23" element="Lamp_White"><bounds x="450" y="390" width="8" height="8" /></bezel> <!-- U2 08 --> |
| 830 | <bezel name="lamp24" element="Lamp_White"><bounds x="465" y="390" width="8" height="8" /></bezel> <!-- U2 09 --> |
| 831 | <bezel name="lamp25" element="Lamp_White"><bounds x="480" y="390" width="8" height="8" /></bezel> <!-- U2 10 --> |
| 832 | <bezel name="lamp26" element="Lamp_White"><bounds x="495" y="390" width="8" height="8" /></bezel> <!-- U2 11 --> |
| 833 | <bezel name="lamp27" element="Lamp_White"><bounds x="510" y="390" width="8" height="8" /></bezel> <!-- U2 12 --> |
| 834 | <bezel name="lamp28" element="Lamp_White"><bounds x="525" y="390" width="8" height="8" /></bezel> <!-- U2 13 --> |
| 835 | <bezel name="lamp29" element="Lamp_White"><bounds x="540" y="390" width="8" height="8" /></bezel> <!-- U2 14 --> |
| 836 | 836 | |
| 837 | 837 | <!-- Lamps controlled by U3 on Lamp Driver Board --> |
| 838 | | <bezel name="lamp30" element="Lamp_White"><bounds x="330" y="405" width="8" height="8" /></bezel> <!-- U3 00 --> |
| 839 | | <bezel name="lamp31" element="Lamp_White"><bounds x="345" y="405" width="8" height="8" /></bezel> <!-- U3 01 --> |
| 840 | | <bezel name="lamp32" element="Lamp_White"><bounds x="360" y="405" width="8" height="8" /></bezel> <!-- U3 02 --> |
| 841 | | <bezel name="lamp33" element="Lamp_White"><bounds x="375" y="405" width="8" height="8" /></bezel> <!-- U3 03 --> |
| 842 | | <bezel name="lamp34" element="Lamp_White"><bounds x="390" y="405" width="8" height="8" /></bezel> <!-- U3 04 --> |
| 843 | | <bezel name="lamp35" element="Lamp_White"><bounds x="405" y="405" width="8" height="8" /></bezel> <!-- U3 05 --> |
| 844 | | <bezel name="lamp36" element="Lamp_White"><bounds x="420" y="405" width="8" height="8" /></bezel> <!-- U3 06 --> |
| 845 | | <bezel name="lamp37" element="Lamp_White"><bounds x="435" y="405" width="8" height="8" /></bezel> <!-- U3 07 --> |
| 846 | | <bezel name="lamp38" element="Lamp_White"><bounds x="450" y="405" width="8" height="8" /></bezel> <!-- U3 08 --> |
| 847 | | <bezel name="lamp39" element="Lamp_White"><bounds x="465" y="405" width="8" height="8" /></bezel> <!-- U3 09 --> |
| 848 | | <bezel name="lamp40" element="Lamp_White"><bounds x="480" y="405" width="8" height="8" /></bezel> <!-- U3 10 --> |
| 849 | | <bezel name="lamp41" element="Lamp_White"><bounds x="495" y="405" width="8" height="8" /></bezel> <!-- U3 11 --> |
| 850 | | <bezel name="lamp42" element="Lamp_White"><bounds x="510" y="405" width="8" height="8" /></bezel> <!-- U3 12 --> |
| 851 | | <bezel name="lamp43" element="Lamp_White"><bounds x="525" y="405" width="8" height="8" /></bezel> <!-- U3 13 --> |
| 852 | | <bezel name="lamp44" element="Lamp_White"><bounds x="540" y="405" width="8" height="8" /></bezel> <!-- U3 14 --> |
| 838 | <bezel name="lamp30" element="Lamp_White"><bounds x="330" y="405" width="8" height="8" /></bezel> <!-- U3 00 --> |
| 839 | <bezel name="lamp31" element="Lamp_White"><bounds x="345" y="405" width="8" height="8" /></bezel> <!-- U3 01 --> |
| 840 | <bezel name="lamp32" element="Lamp_White"><bounds x="360" y="405" width="8" height="8" /></bezel> <!-- U3 02 --> |
| 841 | <bezel name="lamp33" element="Lamp_White"><bounds x="375" y="405" width="8" height="8" /></bezel> <!-- U3 03 --> |
| 842 | <bezel name="lamp34" element="Lamp_White"><bounds x="390" y="405" width="8" height="8" /></bezel> <!-- U3 04 --> |
| 843 | <bezel name="lamp35" element="Lamp_White"><bounds x="405" y="405" width="8" height="8" /></bezel> <!-- U3 05 --> |
| 844 | <bezel name="lamp36" element="Lamp_White"><bounds x="420" y="405" width="8" height="8" /></bezel> <!-- U3 06 --> |
| 845 | <bezel name="lamp37" element="Lamp_White"><bounds x="435" y="405" width="8" height="8" /></bezel> <!-- U3 07 --> |
| 846 | <bezel name="lamp38" element="Lamp_White"><bounds x="450" y="405" width="8" height="8" /></bezel> <!-- U3 08 --> |
| 847 | <bezel name="lamp39" element="Lamp_White"><bounds x="465" y="405" width="8" height="8" /></bezel> <!-- U3 09 --> |
| 848 | <bezel name="lamp40" element="Lamp_White"><bounds x="480" y="405" width="8" height="8" /></bezel> <!-- U3 10 --> |
| 849 | <bezel name="lamp41" element="Lamp_White"><bounds x="495" y="405" width="8" height="8" /></bezel> <!-- U3 11 --> |
| 850 | <bezel name="lamp42" element="Lamp_White"><bounds x="510" y="405" width="8" height="8" /></bezel> <!-- U3 12 --> |
| 851 | <bezel name="lamp43" element="Lamp_White"><bounds x="525" y="405" width="8" height="8" /></bezel> <!-- U3 13 --> |
| 852 | <bezel name="lamp44" element="Lamp_White"><bounds x="540" y="405" width="8" height="8" /></bezel> <!-- U3 14 --> |
| 853 | 853 | |
| 854 | 854 | <!-- Lamps controlled by U4 on Lamp Driver Board --> |
| 855 | | <bezel name="lamp45" element="Lamp_White"><bounds x="330" y="420" width="8" height="8" /></bezel> <!-- U4 00 --> |
| 856 | | <bezel name="lamp46" element="Lamp_White"><bounds x="345" y="420" width="8" height="8" /></bezel> <!-- U4 01 --> |
| 857 | | <bezel name="lamp47" element="Lamp_White"><bounds x="360" y="420" width="8" height="8" /></bezel> <!-- U4 02 --> |
| 858 | | <bezel name="lamp48" element="Lamp_White"><bounds x="375" y="420" width="8" height="8" /></bezel> <!-- U4 03 --> |
| 859 | | <bezel name="lamp49" element="Lamp_White"><bounds x="390" y="420" width="8" height="8" /></bezel> <!-- U4 04 --> |
| 860 | | <bezel name="lamp50" element="Lamp_White"><bounds x="405" y="420" width="8" height="8" /></bezel> <!-- U4 05 --> |
| 861 | | <bezel name="lamp51" element="Lamp_White"><bounds x="420" y="420" width="8" height="8" /></bezel> <!-- U4 06 --> |
| 862 | | <bezel name="lamp52" element="Lamp_White"><bounds x="435" y="420" width="8" height="8" /></bezel> <!-- U4 07 --> |
| 863 | | <bezel name="lamp53" element="Lamp_White"><bounds x="450" y="420" width="8" height="8" /></bezel> <!-- U4 08 --> |
| 864 | | <bezel name="lamp54" element="Lamp_White"><bounds x="465" y="420" width="8" height="8" /></bezel> <!-- U4 09 --> |
| 865 | | <bezel name="lamp55" element="Lamp_White"><bounds x="480" y="420" width="8" height="8" /></bezel> <!-- U4 10 --> |
| 866 | | <bezel name="lamp56" element="Lamp_White"><bounds x="495" y="420" width="8" height="8" /></bezel> <!-- U4 11 --> |
| 867 | | <bezel name="lamp57" element="Lamp_White"><bounds x="510" y="420" width="8" height="8" /></bezel> <!-- U4 12 --> |
| 868 | | <bezel name="lamp58" element="Lamp_White"><bounds x="525" y="420" width="8" height="8" /></bezel> <!-- U4 13 --> |
| 869 | | <bezel name="lamp59" element="Lamp_White"><bounds x="540" y="420" width="8" height="8" /></bezel> <!-- U4 14 --> |
| 855 | <bezel name="lamp45" element="Lamp_White"><bounds x="330" y="420" width="8" height="8" /></bezel> <!-- U4 00 --> |
| 856 | <bezel name="lamp46" element="Lamp_White"><bounds x="345" y="420" width="8" height="8" /></bezel> <!-- U4 01 --> |
| 857 | <bezel name="lamp47" element="Lamp_White"><bounds x="360" y="420" width="8" height="8" /></bezel> <!-- U4 02 --> |
| 858 | <bezel name="lamp48" element="Lamp_White"><bounds x="375" y="420" width="8" height="8" /></bezel> <!-- U4 03 --> |
| 859 | <bezel name="lamp49" element="Lamp_White"><bounds x="390" y="420" width="8" height="8" /></bezel> <!-- U4 04 --> |
| 860 | <bezel name="lamp50" element="Lamp_White"><bounds x="405" y="420" width="8" height="8" /></bezel> <!-- U4 05 --> |
| 861 | <bezel name="lamp51" element="Lamp_White"><bounds x="420" y="420" width="8" height="8" /></bezel> <!-- U4 06 --> |
| 862 | <bezel name="lamp52" element="Lamp_White"><bounds x="435" y="420" width="8" height="8" /></bezel> <!-- U4 07 --> |
| 863 | <bezel name="lamp53" element="Lamp_White"><bounds x="450" y="420" width="8" height="8" /></bezel> <!-- U4 08 --> |
| 864 | <bezel name="lamp54" element="Lamp_White"><bounds x="465" y="420" width="8" height="8" /></bezel> <!-- U4 09 --> |
| 865 | <bezel name="lamp55" element="Lamp_White"><bounds x="480" y="420" width="8" height="8" /></bezel> <!-- U4 10 --> |
| 866 | <bezel name="lamp56" element="Lamp_White"><bounds x="495" y="420" width="8" height="8" /></bezel> <!-- U4 11 --> |
| 867 | <bezel name="lamp57" element="Lamp_White"><bounds x="510" y="420" width="8" height="8" /></bezel> <!-- U4 12 --> |
| 868 | <bezel name="lamp58" element="Lamp_White"><bounds x="525" y="420" width="8" height="8" /></bezel> <!-- U4 13 --> |
| 869 | <bezel name="lamp59" element="Lamp_White"><bounds x="540" y="420" width="8" height="8" /></bezel> <!-- U4 14 --> |
| 870 | 870 | |
| 871 | 871 | |
| 872 | 872 | <bezel element="Text_Solenoids"><bounds x="382" y="437" width="100" height="11" /></bezel> |
| r249940 | r249941 | |
|---|
| 914 | 914 | |
| 915 | 915 | |
| 916 | 916 | <!-- Misc Lamps --> |
| 917 | | <bezel name="lamp55" element="Credit_Indicator"><bounds x="23" y="456" width="70" height="21" /></bezel> <!-- Credit Indicator --> |
| 917 | <bezel name="lamp55" element="Credit_Indicator"><bounds x="23" y="456" width="70" height="21" /></bezel> <!-- Credit Indicator --> |
| 918 | 918 | |
| 919 | | <bezel name="lamp52" element="Lamp_White_50k"><bounds x="009" y="322" width="09" height="09" /></bezel> <!-- 50,000 Outlane Left --> |
| 920 | | <bezel name="lamp37" element="Lamp_White_50k"><bounds x="301" y="322" width="09" height="09" /></bezel> <!-- 50,000 Outlane Right --> |
| 919 | <bezel name="lamp52" element="Lamp_White_50k"><bounds x="009" y="322" width="09" height="09" /></bezel> <!-- 50,000 Outlane Left --> |
| 920 | <bezel name="lamp37" element="Lamp_White_50k"><bounds x="301" y="322" width="09" height="09" /></bezel> <!-- 50,000 Outlane Right --> |
| 921 | 921 | <!-- Bonus End of Ball Lamps --> |
| 922 | | <bezel name="lamp0" element="Lamp_White_1k"> <bounds x="155" y="413" width="09" height="09" /></bezel> <!-- Bonus 1000 --> |
| 923 | | <bezel name="lamp15" element="Lamp_White_2k"> <bounds x="155" y="400" width="09" height="09" /></bezel> <!-- Bonus 2000 --> |
| 924 | | <bezel name="lamp30" element="Lamp_White_3k"> <bounds x="155" y="387" width="09" height="09" /></bezel> <!-- Bonus 3000 --> |
| 925 | | <bezel name="lamp45" element="Lamp_White_4k"> <bounds x="155" y="374" width="09" height="09" /></bezel> <!-- Bonus 4000 --> |
| 926 | | <bezel name="lamp1" element="Lamp_White_5k"> <bounds x="155" y="361" width="09" height="09" /></bezel> <!-- Bonus 5000 --> |
| 927 | | <bezel name="lamp16" element="Lamp_White_6k"> <bounds x="155" y="348" width="09" height="09" /></bezel> <!-- Bonus 6000 --> |
| 928 | | <bezel name="lamp31" element="Lamp_White_7k"> <bounds x="155" y="335" width="09" height="09" /></bezel> <!-- Bonus 7000 --> |
| 929 | | <bezel name="lamp46" element="Lamp_White_8k"> <bounds x="155" y="322" width="09" height="09" /></bezel> <!-- Bonus 8000 --> |
| 930 | | <bezel name="lamp2" element="Lamp_White_9k"> <bounds x="155" y="309" width="09" height="09" /></bezel> <!-- Bonus 9000 --> |
| 931 | | <bezel name="lamp17" element="Lamp_White_10k"><bounds x="140" y="292" width="12" height="12" /></bezel> <!-- Bonus 10000 --> |
| 932 | | <bezel name="lamp32" element="Lamp_White_20k"><bounds x="167" y="292" width="12" height="12" /></bezel> <!-- Bonus 20000 --> |
| 922 | <bezel name="lamp0" element="Lamp_White_1k"> <bounds x="155" y="413" width="09" height="09" /></bezel> <!-- Bonus 1000 --> |
| 923 | <bezel name="lamp15" element="Lamp_White_2k"> <bounds x="155" y="400" width="09" height="09" /></bezel> <!-- Bonus 2000 --> |
| 924 | <bezel name="lamp30" element="Lamp_White_3k"> <bounds x="155" y="387" width="09" height="09" /></bezel> <!-- Bonus 3000 --> |
| 925 | <bezel name="lamp45" element="Lamp_White_4k"> <bounds x="155" y="374" width="09" height="09" /></bezel> <!-- Bonus 4000 --> |
| 926 | <bezel name="lamp1" element="Lamp_White_5k"> <bounds x="155" y="361" width="09" height="09" /></bezel> <!-- Bonus 5000 --> |
| 927 | <bezel name="lamp16" element="Lamp_White_6k"> <bounds x="155" y="348" width="09" height="09" /></bezel> <!-- Bonus 6000 --> |
| 928 | <bezel name="lamp31" element="Lamp_White_7k"> <bounds x="155" y="335" width="09" height="09" /></bezel> <!-- Bonus 7000 --> |
| 929 | <bezel name="lamp46" element="Lamp_White_8k"> <bounds x="155" y="322" width="09" height="09" /></bezel> <!-- Bonus 8000 --> |
| 930 | <bezel name="lamp2" element="Lamp_White_9k"> <bounds x="155" y="309" width="09" height="09" /></bezel> <!-- Bonus 9000 --> |
| 931 | <bezel name="lamp17" element="Lamp_White_10k"><bounds x="140" y="292" width="12" height="12" /></bezel> <!-- Bonus 10000 --> |
| 932 | <bezel name="lamp32" element="Lamp_White_20k"><bounds x="167" y="292" width="12" height="12" /></bezel> <!-- Bonus 20000 --> |
| 933 | 933 | <!-- Bonus Multiplier Lamps --> |
| 934 | | <bezel name="lamp56" element="Lamp_Green_Arrow_04_2x"> <bounds x="111" y="317" width="20" height="12.5" /></bezel> <!-- 2X Bonus --> |
| 935 | | <bezel name="lamp41" element="Lamp_Yellow_Arrow_04_3x"><bounds x="111" y="337" width="20" height="12.5" /></bezel> <!-- 3X Bonus --> |
| 936 | | <bezel name="lamp26" element="Lamp_White_Arrow_08_5x"> <bounds x="188" y="317" width="20" height="12.5" /></bezel> <!-- 5X Bonus --> |
| 937 | | <bezel name="lamp40" element="Lamp_Amber_Arrow_08"> <bounds x="188" y="337" width="20" height="12.5" /></bezel> <!-- Extra Ball --> |
| 934 | <bezel name="lamp56" element="Lamp_Green_Arrow_04_2x"> <bounds x="111" y="317" width="20" height="12.5" /></bezel> <!-- 2X Bonus --> |
| 935 | <bezel name="lamp41" element="Lamp_Yellow_Arrow_04_3x"><bounds x="111" y="337" width="20" height="12.5" /></bezel> <!-- 3X Bonus --> |
| 936 | <bezel name="lamp26" element="Lamp_White_Arrow_08_5x"> <bounds x="188" y="317" width="20" height="12.5" /></bezel> <!-- 5X Bonus --> |
| 937 | <bezel name="lamp40" element="Lamp_Amber_Arrow_08"> <bounds x="188" y="337" width="20" height="12.5" /></bezel> <!-- Extra Ball --> |
| 938 | 938 | |
| 939 | 939 | <!-- Saucer Lamps --> |
| 940 | | <bezel name="lamp24" element="Lamp_White_Arrow_Up_5x"> <bounds x="154" y="102" width="11" height="22" /></bezel> <!-- 5X Bonus Potential --> |
| 941 | | <bezel name="lamp39" element="Lamp_Yellow_Arrow_Up_3x"><bounds x="154" y="128" width="11" height="22" /></bezel> <!-- 3X Bonus Potential --> |
| 942 | | <bezel name="lamp54" element="Lamp_Green_Arrow_Up_2x"> <bounds x="154" y="154" width="11" height="22" /></bezel> <!-- 2X Bonus Potential --> |
| 943 | | <bezel element="Lamp_White_Arrow_Up_3k"> <bounds x="154" y="180" width="11" height="22" /></bezel> <!-- Upper 3000 --> |
| 940 | <bezel name="lamp24" element="Lamp_White_Arrow_Up_5x"> <bounds x="154" y="102" width="11" height="22" /></bezel> <!-- 5X Bonus Potential --> |
| 941 | <bezel name="lamp39" element="Lamp_Yellow_Arrow_Up_3x"><bounds x="154" y="128" width="11" height="22" /></bezel> <!-- 3X Bonus Potential --> |
| 942 | <bezel name="lamp54" element="Lamp_Green_Arrow_Up_2x"> <bounds x="154" y="154" width="11" height="22" /></bezel> <!-- 2X Bonus Potential --> |
| 943 | <bezel element="Lamp_White_Arrow_Up_3k"> <bounds x="154" y="180" width="11" height="22" /></bezel> <!-- Upper 3000 --> |
| 944 | 944 | |
| 945 | 945 | <!-- "A" & "B" Potential Lamps --> |
| 946 | | <bezel name="lamp5" element="Lamp_White_1k"><bounds x="095" y="265" width="10" height="10" /></bezel> <!-- Upper 1000 --> |
| 947 | | <bezel name="lamp20" element="Lamp_White_2k"><bounds x="115" y="265" width="10" height="10" /></bezel> <!-- Upper 2000 --> |
| 948 | | <bezel name="lamp35" element="Lamp_White_3k"><bounds x="135" y="265" width="10" height="10" /></bezel> <!-- Upper 3000 --> |
| 949 | | <bezel name="lamp50" element="Lamp_White_4k"><bounds x="155" y="265" width="10" height="10" /></bezel> <!-- Upper 4000 --> |
| 950 | | <bezel name="lamp6" element="Lamp_White_5k"><bounds x="175" y="265" width="10" height="10" /></bezel> <!-- Upper 5000 --> |
| 951 | | <bezel name="lamp21" element="Lamp_Amber"> <bounds x="195" y="265" width="10" height="10" /></bezel> <!-- Extra Ball Potential --> |
| 952 | | <bezel name="lamp36" element="Lamp_Red"> <bounds x="215" y="265" width="10" height="10" /></bezel> <!-- Special Potential --> |
| 946 | <bezel name="lamp5" element="Lamp_White_1k"><bounds x="095" y="265" width="10" height="10" /></bezel> <!-- Upper 1000 --> |
| 947 | <bezel name="lamp20" element="Lamp_White_2k"><bounds x="115" y="265" width="10" height="10" /></bezel> <!-- Upper 2000 --> |
| 948 | <bezel name="lamp35" element="Lamp_White_3k"><bounds x="135" y="265" width="10" height="10" /></bezel> <!-- Upper 3000 --> |
| 949 | <bezel name="lamp50" element="Lamp_White_4k"><bounds x="155" y="265" width="10" height="10" /></bezel> <!-- Upper 4000 --> |
| 950 | <bezel name="lamp6" element="Lamp_White_5k"><bounds x="175" y="265" width="10" height="10" /></bezel> <!-- Upper 5000 --> |
| 951 | <bezel name="lamp21" element="Lamp_Amber"> <bounds x="195" y="265" width="10" height="10" /></bezel> <!-- Extra Ball Potential --> |
| 952 | <bezel name="lamp36" element="Lamp_Red"> <bounds x="215" y="265" width="10" height="10" /></bezel> <!-- Special Potential --> |
| 953 | 953 | |
| 954 | 954 | <!-- Drop Target Lamps --> |
| 955 | | <bezel name="lamp47" element="Lamp_Red"><bounds x="153" y="225" width="14" height="14" /></bezel> <!-- Special Potential --> |
| 955 | <bezel name="lamp47" element="Lamp_Red"><bounds x="153" y="225" width="14" height="14" /></bezel> <!-- Special Potential --> |
| 956 | 956 | |
| 957 | 957 | <!-- Outhole --> |
| 958 | 958 | <bezel name="solenoid6" element="Solenoid_Outhole"> <bounds x="150" y="455" width="58" height="22" /></bezel> |
trunk/src/mame/layout/by35_playboy.lay
| r249940 | r249941 | |
|---|
| 216 | 216 | <disk state="0"><color red="0.15" green="0.15" blue="0.15" /></disk> |
| 217 | 217 | <disk state="1"><color red="1.00" green="1.00" blue="1.00" /></disk> |
| 218 | 218 | </element> |
| 219 | | <element name="Lamp_Red" defstate="0"> <!-- Usually for Specials --> |
| 219 | <element name="Lamp_Red" defstate="0"> <!-- Usually for Specials --> |
| 220 | 220 | <disk state="0"><color red="0.15" green="0.00" blue="0.00" /></disk> |
| 221 | 221 | <disk state="1"><color red="1.00" green="0.00" blue="0.00" /></disk> |
| 222 | 222 | </element> |
| 223 | | <element name="Lamp_Amber" defstate="0"> <!-- Usually for Extra Ball--> |
| 223 | <element name="Lamp_Amber" defstate="0"> <!-- Usually for Extra Ball--> |
| 224 | 224 | <disk state="0"><color red="0.15" green="0.06" blue="0.00" /></disk> |
| 225 | 225 | <disk state="1"><color red="1.00" green="0.40" blue="0.00" /></disk> |
| 226 | 226 | </element> |
| r249940 | r249941 | |
|---|
| 409 | 409 | </element> |
| 410 | 410 | |
| 411 | 411 | |
| 412 | | <element name="Lamp_Red_Arrow_08" defstate="1"> <!-- Point at 8 o clock --> |
| 412 | <element name="Lamp_Red_Arrow_08" defstate="1"> <!-- Point at 8 o clock --> |
| 413 | 413 | <rect state="1"><color red="1.00" green="0.00" blue="0.00" /><bounds x="28" y="00" width="08" height="03" /></rect> |
| 414 | 414 | <rect state="0"><color red="0.15" green="0.00" blue="0.00" /><bounds x="28" y="00" width="08" height="03" /></rect> |
| 415 | 415 | <rect state="1"><color red="1.00" green="0.00" blue="0.00" /><bounds x="23" y="03" width="08" height="03" /></rect> |
| r249940 | r249941 | |
|---|
| 430 | 430 | <rect state="0"><color red="0.15" green="0.00" blue="0.00" /><bounds x="00" y="18" width="20" height="03" /></rect> |
| 431 | 431 | </element> |
| 432 | 432 | |
| 433 | | <element name="Lamp_Amber_Arrow_10" defstate="1"> <!-- Point at 10 o clock --> |
| 433 | <element name="Lamp_Amber_Arrow_10" defstate="1"> <!-- Point at 10 o clock --> |
| 434 | 434 | <rect state="1"><color red="1.00" green="0.40" blue="0.00" /><bounds x="28" y="18" width="08" height="03" /></rect> |
| 435 | 435 | <rect state="0"><color red="0.15" green="0.06" blue="0.00" /><bounds x="28" y="18" width="08" height="03" /></rect> |
| 436 | 436 | <rect state="1"><color red="1.00" green="0.40" blue="0.00" /><bounds x="23" y="15" width="08" height="03" /></rect> |
| r249940 | r249941 | |
|---|
| 451 | 451 | <rect state="0"><color red="0.15" green="0.06" blue="0.00" /><bounds x="00" y="00" width="20" height="03" /></rect> |
| 452 | 452 | </element> |
| 453 | 453 | |
| 454 | | <element name="Lamp_White_Arrow_01" defstate="1"> <!-- Point at 1 o clock --> |
| 454 | <element name="Lamp_White_Arrow_01" defstate="1"> <!-- Point at 1 o clock --> |
| 455 | 455 | <rect state="1"><color red="1.00" green="1.00" blue="1.00" /><bounds x="18" y="00" width="03" height="20" /></rect> |
| 456 | 456 | <rect state="0"><color red="0.15" green="0.15" blue="0.15" /><bounds x="18" y="00" width="03" height="20" /></rect> |
| 457 | 457 | <rect state="1"><color red="1.00" green="1.00" blue="1.00" /><bounds x="15" y="02" width="03" height="17" /></rect> |
| r249940 | r249941 | |
|---|
| 527 | 527 | <disk state="0"><color red="0.0" green="0.25" blue="0.0" /></disk> |
| 528 | 528 | <disk state="1"><color red="0.0" green="1.00" blue="0.0" /></disk> |
| 529 | 529 | </element> |
| 530 | | |
| 531 | 530 | |
| 532 | 531 | |
| 532 | |
| 533 | 533 | <!-- Solenoids --> |
| 534 | 534 | |
| 535 | 535 | <element name="Solenoid_PullDown"> |
| r249940 | r249941 | |
|---|
| 633 | 633 | |
| 634 | 634 | <!-- Background --> |
| 635 | 635 | <backdrop element="Canvas"><bounds x="000" y="000" width="640" height="480" /></backdrop> |
| 636 | | |
| 636 | |
| 637 | 637 | <bezel element="Draw_White"><bounds x="000" y="000" width="640" height="001" /></bezel> |
| 638 | 638 | <bezel element="Draw_White"><bounds x="000" y="000" width="001" height="480" /></bezel> |
| 639 | 639 | <bezel element="Draw_White"><bounds x="640" y="000" width="001" height="480" /></bezel> |
| 640 | 640 | <bezel element="Draw_White"><bounds x="000" y="480" width="640" height="001" /></bezel> |
| 641 | 641 | <bezel element="Draw_White"><bounds x="320" y="000" width="001" height="480" /></bezel> |
| 642 | 642 | <bezel element="Draw_White"><bounds x="320" y="320" width="320" height="001" /></bezel> |
| 643 | | <!-- <bezel element="Draw_White"><bounds x="159" y="000" width="001" height="480" /></bezel> --> |
| 643 | <!-- <bezel element="Draw_White"><bounds x="159" y="000" width="001" height="480" /></bezel> --> |
| 644 | 644 | |
| 645 | 645 | <bezel element="Title_Playboy"><bounds x="430" y="18" width="105" height="30" /></bezel> |
| 646 | 646 | |
| r249940 | r249941 | |
|---|
| 658 | 658 | |
| 659 | 659 | |
| 660 | 660 | <!-- Player 1 Score --> |
| 661 | | <bezel name="lamp14" element="Lamp_P1"><bounds x="330" y="55" width="15" height="15" /></bezel> <!-- Backbox ~ 1st Player Up --> |
| 661 | <bezel name="lamp14" element="Lamp_P1"><bounds x="330" y="55" width="15" height="15" /></bezel> <!-- Backbox ~ 1st Player Up --> |
| 662 | 662 | <bezel name="digit17" element="Digit"><bounds x="360" y="55" width="10" height="15" /></bezel> |
| 663 | 663 | <bezel name="digit16" element="Digit"><bounds x="374" y="55" width="10" height="15" /></bezel> |
| 664 | 664 | <bezel name="digit15" element="Digit"><bounds x="388" y="55" width="10" height="15" /></bezel> |
| r249940 | r249941 | |
|---|
| 668 | 668 | <bezel name="digit11" element="Digit"><bounds x="444" y="55" width="10" height="15" /></bezel> |
| 669 | 669 | |
| 670 | 670 | <!-- Player 2 Score --> |
| 671 | | <bezel name="lamp29" element="Lamp_P2"><bounds x="615" y="55" width="15" height="15" /></bezel> <!-- Backbox ~ 2nd Player Up --> |
| 671 | <bezel name="lamp29" element="Lamp_P2"><bounds x="615" y="55" width="15" height="15" /></bezel> <!-- Backbox ~ 2nd Player Up --> |
| 672 | 672 | <bezel name="digit27" element="Digit"><bounds x="506" y="55" width="10" height="15" /></bezel> |
| 673 | 673 | <bezel name="digit26" element="Digit"><bounds x="520" y="55" width="10" height="15" /></bezel> |
| 674 | 674 | <bezel name="digit25" element="Digit"><bounds x="534" y="55" width="10" height="15" /></bezel> |
| r249940 | r249941 | |
|---|
| 678 | 678 | <bezel name="digit21" element="Digit"><bounds x="590" y="55" width="10" height="15" /></bezel> |
| 679 | 679 | |
| 680 | 680 | <!-- Player 3 Score --> |
| 681 | | <bezel name="lamp44" element="Lamp_P3"><bounds x="330" y="250" width="15" height="15" /></bezel> <!-- Backbox ~ 3rd Player Up --> |
| 681 | <bezel name="lamp44" element="Lamp_P3"><bounds x="330" y="250" width="15" height="15" /></bezel> <!-- Backbox ~ 3rd Player Up --> |
| 682 | 682 | <bezel name="digit37" element="Digit"><bounds x="360" y="250" width="10" height="15" /></bezel> |
| 683 | 683 | <bezel name="digit36" element="Digit"><bounds x="374" y="250" width="10" height="15" /></bezel> |
| 684 | 684 | <bezel name="digit35" element="Digit"><bounds x="388" y="250" width="10" height="15" /></bezel> |
| r249940 | r249941 | |
|---|
| 688 | 688 | <bezel name="digit31" element="Digit"><bounds x="444" y="250" width="10" height="15" /></bezel> |
| 689 | 689 | |
| 690 | 690 | <!-- Player 4 Score --> |
| 691 | | <bezel name="lamp59" element="Lamp_P4"><bounds x="615" y="250" width="15" height="15" /></bezel> <!-- Backbox ~ 4th Player Up --> |
| 691 | <bezel name="lamp59" element="Lamp_P4"><bounds x="615" y="250" width="15" height="15" /></bezel> <!-- Backbox ~ 4th Player Up --> |
| 692 | 692 | <bezel name="digit47" element="Digit"><bounds x="506" y="250" width="10" height="15" /></bezel> |
| 693 | 693 | <bezel name="digit46" element="Digit"><bounds x="520" y="250" width="10" height="15" /></bezel> |
| 694 | 694 | <bezel name="digit45" element="Digit"><bounds x="534" y="250" width="10" height="15" /></bezel> |
| r249940 | r249941 | |
|---|
| 699 | 699 | |
| 700 | 700 | <!-- Credits and Ball In Play / Match --> |
| 701 | 701 | <bezel element="Text_Credit"><bounds x="542" y="142" width="48" height="8" /></bezel> |
| 702 | | <bezel name="lamp12" element="Ball_In_Play"><bounds x="586" y="105" width="50" height="11" /></bezel> <!-- Backbox ~ Ball In Play --> |
| 703 | | <bezel name="lamp25" element="Match"><bounds x="596" y="152" width="25" height="11" /></bezel> <!-- Backbox ~ Match --> |
| 702 | <bezel name="lamp12" element="Ball_In_Play"><bounds x="586" y="105" width="50" height="11" /></bezel> <!-- Backbox ~ Ball In Play --> |
| 703 | <bezel name="lamp25" element="Match"><bounds x="596" y="152" width="25" height="11" /></bezel> <!-- Backbox ~ Match --> |
| 704 | 704 | <bezel name="digit55" element="Digit"><bounds x="554" y="125" width="10" height="15" /></bezel> |
| 705 | 705 | <bezel name="digit54" element="Digit"><bounds x="568" y="125" width="10" height="15" /></bezel> |
| 706 | 706 | <bezel name="digit52" element="Digit"><bounds x="596" y="125" width="10" height="15" /></bezel> |
| 707 | 707 | <bezel name="digit51" element="Digit"><bounds x="610" y="125" width="10" height="15" /></bezel> |
| 708 | 708 | |
| 709 | | <bezel name="lamp10" element="Shoot_Again"><bounds x="420" y="295" width="60" height="19" /></bezel> <!-- Backbox ~ Same Player Shoots Again --> |
| 710 | | <bezel name="lamp13" element="Lamp_1P"><bounds x="345" y="297" width="15" height="15" /></bezel> <!-- Backbox ~ 1 Player Game --> |
| 711 | | <bezel name="lamp28" element="Lamp_2P"><bounds x="360" y="297" width="15" height="15" /></bezel> <!-- Backbox ~ 2 Player Game --> |
| 712 | | <bezel name="lamp43" element="Lamp_3P"><bounds x="375" y="297" width="15" height="15" /></bezel> <!-- Backbox ~ 3 Player Game --> |
| 713 | | <bezel name="lamp58" element="Lamp_4P"><bounds x="390" y="297" width="15" height="15" /></bezel> <!-- Backbox ~ 4 Player Game --> |
| 714 | | <bezel name="lamp27" element="High_Score_To_Date"><bounds x="438" y="6" width="90" height="11" /></bezel> <!-- Backbox ~ High Score To Date --> |
| 715 | | <bezel name="lamp42" element="Game_Over"><bounds x="580" y="300" width="45" height="11" /></bezel> <!-- Backbox ~ Game Over --> |
| 716 | | <bezel name="lamp57" element="Tilt"><bounds x="480" y="297" width="50" height="16" /></bezel> <!-- Backbox ~ Tilt --> |
| 709 | <bezel name="lamp10" element="Shoot_Again"><bounds x="420" y="295" width="60" height="19" /></bezel> <!-- Backbox ~ Same Player Shoots Again --> |
| 710 | <bezel name="lamp13" element="Lamp_1P"><bounds x="345" y="297" width="15" height="15" /></bezel> <!-- Backbox ~ 1 Player Game --> |
| 711 | <bezel name="lamp28" element="Lamp_2P"><bounds x="360" y="297" width="15" height="15" /></bezel> <!-- Backbox ~ 2 Player Game --> |
| 712 | <bezel name="lamp43" element="Lamp_3P"><bounds x="375" y="297" width="15" height="15" /></bezel> <!-- Backbox ~ 3 Player Game --> |
| 713 | <bezel name="lamp58" element="Lamp_4P"><bounds x="390" y="297" width="15" height="15" /></bezel> <!-- Backbox ~ 4 Player Game --> |
| 714 | <bezel name="lamp27" element="High_Score_To_Date"><bounds x="438" y="6" width="90" height="11" /></bezel> <!-- Backbox ~ High Score To Date --> |
| 715 | <bezel name="lamp42" element="Game_Over"><bounds x="580" y="300" width="45" height="11" /></bezel> <!-- Backbox ~ Game Over --> |
| 716 | <bezel name="lamp57" element="Tilt"><bounds x="480" y="297" width="50" height="16" /></bezel> <!-- Backbox ~ Tilt --> |
| 717 | 717 | |
| 718 | 718 | |
| 719 | 719 | |
| r249940 | r249941 | |
|---|
| 724 | 724 | <bezel element="Text_60"><bounds x="552" y="418" width="30" height="11" /></bezel> |
| 725 | 725 | |
| 726 | 726 | <!-- Lamps controlled by U1 on Lamp Driver Board --> |
| 727 | | <bezel name="lamp0" element="Lamp_White"><bounds x="330" y="375" width="8" height="8" /></bezel> <!-- U1 00 --> |
| 728 | | <bezel name="lamp1" element="Lamp_White"><bounds x="345" y="375" width="8" height="8" /></bezel> <!-- U1 01 --> |
| 729 | | <bezel name="lamp2" element="Lamp_White"><bounds x="360" y="375" width="8" height="8" /></bezel> <!-- U1 02 --> |
| 730 | | <bezel name="lamp3" element="Lamp_White"><bounds x="375" y="375" width="8" height="8" /></bezel> <!-- U1 03 --> |
| 731 | | <bezel name="lamp4" element="Lamp_White"><bounds x="390" y="375" width="8" height="8" /></bezel> <!-- U1 04 --> |
| 732 | | <bezel name="lamp5" element="Lamp_White"><bounds x="405" y="375" width="8" height="8" /></bezel> <!-- U1 05 --> |
| 733 | | <bezel name="lamp6" element="Lamp_White"><bounds x="420" y="375" width="8" height="8" /></bezel> <!-- U1 06 --> |
| 734 | | <bezel name="lamp7" element="Lamp_White"><bounds x="435" y="375" width="8" height="8" /></bezel> <!-- U1 07 --> |
| 735 | | <bezel name="lamp8" element="Lamp_White"><bounds x="450" y="375" width="8" height="8" /></bezel> <!-- U1 08 --> |
| 736 | | <bezel name="lamp9" element="Lamp_White"><bounds x="465" y="375" width="8" height="8" /></bezel> <!-- U1 09 --> |
| 737 | | <bezel name="lamp10" element="Lamp_White"><bounds x="480" y="375" width="8" height="8" /></bezel> <!-- U1 10 --> |
| 738 | | <bezel name="lamp11" element="Lamp_White"><bounds x="495" y="375" width="8" height="8" /></bezel> <!-- U1 11 --> |
| 739 | | <bezel name="lamp12" element="Lamp_White"><bounds x="510" y="375" width="8" height="8" /></bezel> <!-- U1 12 --> |
| 740 | | <bezel name="lamp13" element="Lamp_White"><bounds x="525" y="375" width="8" height="8" /></bezel> <!-- U1 13 --> |
| 741 | | <bezel name="lamp14" element="Lamp_White"><bounds x="540" y="375" width="8" height="8" /></bezel> <!-- U1 14 --> |
| 727 | <bezel name="lamp0" element="Lamp_White"><bounds x="330" y="375" width="8" height="8" /></bezel> <!-- U1 00 --> |
| 728 | <bezel name="lamp1" element="Lamp_White"><bounds x="345" y="375" width="8" height="8" /></bezel> <!-- U1 01 --> |
| 729 | <bezel name="lamp2" element="Lamp_White"><bounds x="360" y="375" width="8" height="8" /></bezel> <!-- U1 02 --> |
| 730 | <bezel name="lamp3" element="Lamp_White"><bounds x="375" y="375" width="8" height="8" /></bezel> <!-- U1 03 --> |
| 731 | <bezel name="lamp4" element="Lamp_White"><bounds x="390" y="375" width="8" height="8" /></bezel> <!-- U1 04 --> |
| 732 | <bezel name="lamp5" element="Lamp_White"><bounds x="405" y="375" width="8" height="8" /></bezel> <!-- U1 05 --> |
| 733 | <bezel name="lamp6" element="Lamp_White"><bounds x="420" y="375" width="8" height="8" /></bezel> <!-- U1 06 --> |
| 734 | <bezel name="lamp7" element="Lamp_White"><bounds x="435" y="375" width="8" height="8" /></bezel> <!-- U1 07 --> |
| 735 | <bezel name="lamp8" element="Lamp_White"><bounds x="450" y="375" width="8" height="8" /></bezel> <!-- U1 08 --> |
| 736 | <bezel name="lamp9" element="Lamp_White"><bounds x="465" y="375" width="8" height="8" /></bezel> <!-- U1 09 --> |
| 737 | <bezel name="lamp10" element="Lamp_White"><bounds x="480" y="375" width="8" height="8" /></bezel> <!-- U1 10 --> |
| 738 | <bezel name="lamp11" element="Lamp_White"><bounds x="495" y="375" width="8" height="8" /></bezel> <!-- U1 11 --> |
| 739 | <bezel name="lamp12" element="Lamp_White"><bounds x="510" y="375" width="8" height="8" /></bezel> <!-- U1 12 --> |
| 740 | <bezel name="lamp13" element="Lamp_White"><bounds x="525" y="375" width="8" height="8" /></bezel> <!-- U1 13 --> |
| 741 | <bezel name="lamp14" element="Lamp_White"><bounds x="540" y="375" width="8" height="8" /></bezel> <!-- U1 14 --> |
| 742 | 742 | |
| 743 | 743 | <!-- Lamps controlled by U2 on Lamp Driver Board --> |
| 744 | | <bezel name="lamp15" element="Lamp_White"><bounds x="330" y="390" width="8" height="8" /></bezel> <!-- U2 00 --> |
| 745 | | <bezel name="lamp16" element="Lamp_White"><bounds x="345" y="390" width="8" height="8" /></bezel> <!-- U2 01 --> |
| 746 | | <bezel name="lamp17" element="Lamp_White"><bounds x="360" y="390" width="8" height="8" /></bezel> <!-- U2 02 --> |
| 747 | | <bezel name="lamp18" element="Lamp_White"><bounds x="375" y="390" width="8" height="8" /></bezel> <!-- U2 03 --> |
| 748 | | <bezel name="lamp19" element="Lamp_White"><bounds x="390" y="390" width="8" height="8" /></bezel> <!-- U2 04 --> |
| 749 | | <bezel name="lamp20" element="Lamp_White"><bounds x="405" y="390" width="8" height="8" /></bezel> <!-- U2 05 --> |
| 750 | | <bezel name="lamp21" element="Lamp_White"><bounds x="420" y="390" width="8" height="8" /></bezel> <!-- U2 06 --> |
| 751 | | <bezel name="lamp22" element="Lamp_White"><bounds x="435" y="390" width="8" height="8" /></bezel> <!-- U2 07 --> |
| 752 | | <bezel name="lamp23" element="Lamp_White"><bounds x="450" y="390" width="8" height="8" /></bezel> <!-- U2 08 --> |
| 753 | | <bezel name="lamp24" element="Lamp_White"><bounds x="465" y="390" width="8" height="8" /></bezel> <!-- U2 09 --> |
| 754 | | <bezel name="lamp25" element="Lamp_White"><bounds x="480" y="390" width="8" height="8" /></bezel> <!-- U2 10 --> |
| 755 | | <bezel name="lamp26" element="Lamp_White"><bounds x="495" y="390" width="8" height="8" /></bezel> <!-- U2 11 --> |
| 756 | | <bezel name="lamp27" element="Lamp_White"><bounds x="510" y="390" width="8" height="8" /></bezel> <!-- U2 12 --> |
| 757 | | <bezel name="lamp28" element="Lamp_White"><bounds x="525" y="390" width="8" height="8" /></bezel> <!-- U2 13 --> |
| 758 | | <bezel name="lamp29" element="Lamp_White"><bounds x="540" y="390" width="8" height="8" /></bezel> <!-- U2 14 --> |
| 744 | <bezel name="lamp15" element="Lamp_White"><bounds x="330" y="390" width="8" height="8" /></bezel> <!-- U2 00 --> |
| 745 | <bezel name="lamp16" element="Lamp_White"><bounds x="345" y="390" width="8" height="8" /></bezel> <!-- U2 01 --> |
| 746 | <bezel name="lamp17" element="Lamp_White"><bounds x="360" y="390" width="8" height="8" /></bezel> <!-- U2 02 --> |
| 747 | <bezel name="lamp18" element="Lamp_White"><bounds x="375" y="390" width="8" height="8" /></bezel> <!-- U2 03 --> |
| 748 | <bezel name="lamp19" element="Lamp_White"><bounds x="390" y="390" width="8" height="8" /></bezel> <!-- U2 04 --> |
| 749 | <bezel name="lamp20" element="Lamp_White"><bounds x="405" y="390" width="8" height="8" /></bezel> <!-- U2 05 --> |
| 750 | <bezel name="lamp21" element="Lamp_White"><bounds x="420" y="390" width="8" height="8" /></bezel> <!-- U2 06 --> |
| 751 | <bezel name="lamp22" element="Lamp_White"><bounds x="435" y="390" width="8" height="8" /></bezel> <!-- U2 07 --> |
| 752 | <bezel name="lamp23" element="Lamp_White"><bounds x="450" y="390" width="8" height="8" /></bezel> <!-- U2 08 --> |
| 753 | <bezel name="lamp24" element="Lamp_White"><bounds x="465" y="390" width="8" height="8" /></bezel> <!-- U2 09 --> |
| 754 | <bezel name="lamp25" element="Lamp_White"><bounds x="480" y="390" width="8" height="8" /></bezel> <!-- U2 10 --> |
| 755 | <bezel name="lamp26" element="Lamp_White"><bounds x="495" y="390" width="8" height="8" /></bezel> <!-- U2 11 --> |
| 756 | <bezel name="lamp27" element="Lamp_White"><bounds x="510" y="390" width="8" height="8" /></bezel> <!-- U2 12 --> |
| 757 | <bezel name="lamp28" element="Lamp_White"><bounds x="525" y="390" width="8" height="8" /></bezel> <!-- U2 13 --> |
| 758 | <bezel name="lamp29" element="Lamp_White"><bounds x="540" y="390" width="8" height="8" /></bezel> <!-- U2 14 --> |
| 759 | 759 | |
| 760 | 760 | <!-- Lamps controlled by U3 on Lamp Driver Board --> |
| 761 | | <bezel name="lamp30" element="Lamp_White"><bounds x="330" y="405" width="8" height="8" /></bezel> <!-- U3 00 --> |
| 762 | | <bezel name="lamp31" element="Lamp_White"><bounds x="345" y="405" width="8" height="8" /></bezel> <!-- U3 01 --> |
| 763 | | <bezel name="lamp32" element="Lamp_White"><bounds x="360" y="405" width="8" height="8" /></bezel> <!-- U3 02 --> |
| 764 | | <bezel name="lamp33" element="Lamp_White"><bounds x="375" y="405" width="8" height="8" /></bezel> <!-- U3 03 --> |
| 765 | | <bezel name="lamp34" element="Lamp_White"><bounds x="390" y="405" width="8" height="8" /></bezel> <!-- U3 04 --> |
| 766 | | <bezel name="lamp35" element="Lamp_White"><bounds x="405" y="405" width="8" height="8" /></bezel> <!-- U3 05 --> |
| 767 | | <bezel name="lamp36" element="Lamp_White"><bounds x="420" y="405" width="8" height="8" /></bezel> <!-- U3 06 --> |
| 768 | | <bezel name="lamp37" element="Lamp_White"><bounds x="435" y="405" width="8" height="8" /></bezel> <!-- U3 07 --> |
| 769 | | <bezel name="lamp38" element="Lamp_White"><bounds x="450" y="405" width="8" height="8" /></bezel> <!-- U3 08 --> |
| 770 | | <bezel name="lamp39" element="Lamp_White"><bounds x="465" y="405" width="8" height="8" /></bezel> <!-- U3 09 --> |
| 771 | | <bezel name="lamp40" element="Lamp_White"><bounds x="480" y="405" width="8" height="8" /></bezel> <!-- U3 10 --> |
| 772 | | <bezel name="lamp41" element="Lamp_White"><bounds x="495" y="405" width="8" height="8" /></bezel> <!-- U3 11 --> |
| 773 | | <bezel name="lamp42" element="Lamp_White"><bounds x="510" y="405" width="8" height="8" /></bezel> <!-- U3 12 --> |
| 774 | | <bezel name="lamp43" element="Lamp_White"><bounds x="525" y="405" width="8" height="8" /></bezel> <!-- U3 13 --> |
| 775 | | <bezel name="lamp44" element="Lamp_White"><bounds x="540" y="405" width="8" height="8" /></bezel> <!-- U3 14 --> |
| 761 | <bezel name="lamp30" element="Lamp_White"><bounds x="330" y="405" width="8" height="8" /></bezel> <!-- U3 00 --> |
| 762 | <bezel name="lamp31" element="Lamp_White"><bounds x="345" y="405" width="8" height="8" /></bezel> <!-- U3 01 --> |
| 763 | <bezel name="lamp32" element="Lamp_White"><bounds x="360" y="405" width="8" height="8" /></bezel> <!-- U3 02 --> |
| 764 | <bezel name="lamp33" element="Lamp_White"><bounds x="375" y="405" width="8" height="8" /></bezel> <!-- U3 03 --> |
| 765 | <bezel name="lamp34" element="Lamp_White"><bounds x="390" y="405" width="8" height="8" /></bezel> <!-- U3 04 --> |
| 766 | <bezel name="lamp35" element="Lamp_White"><bounds x="405" y="405" width="8" height="8" /></bezel> <!-- U3 05 --> |
| 767 | <bezel name="lamp36" element="Lamp_White"><bounds x="420" y="405" width="8" height="8" /></bezel> <!-- U3 06 --> |
| 768 | <bezel name="lamp37" element="Lamp_White"><bounds x="435" y="405" width="8" height="8" /></bezel> <!-- U3 07 --> |
| 769 | <bezel name="lamp38" element="Lamp_White"><bounds x="450" y="405" width="8" height="8" /></bezel> <!-- U3 08 --> |
| 770 | <bezel name="lamp39" element="Lamp_White"><bounds x="465" y="405" width="8" height="8" /></bezel> <!-- U3 09 --> |
| 771 | <bezel name="lamp40" element="Lamp_White"><bounds x="480" y="405" width="8" height="8" /></bezel> <!-- U3 10 --> |
| 772 | <bezel name="lamp41" element="Lamp_White"><bounds x="495" y="405" width="8" height="8" /></bezel> <!-- U3 11 --> |
| 773 | <bezel name="lamp42" element="Lamp_White"><bounds x="510" y="405" width="8" height="8" /></bezel> <!-- U3 12 --> |
| 774 | <bezel name="lamp43" element="Lamp_White"><bounds x="525" y="405" width="8" height="8" /></bezel> <!-- U3 13 --> |
| 775 | <bezel name="lamp44" element="Lamp_White"><bounds x="540" y="405" width="8" height="8" /></bezel> <!-- U3 14 --> |
| 776 | 776 | |
| 777 | 777 | <!-- Lamps controlled by U4 on Lamp Driver Board --> |
| 778 | | <bezel name="lamp45" element="Lamp_White"><bounds x="330" y="420" width="8" height="8" /></bezel> <!-- U4 00 --> |
| 779 | | <bezel name="lamp46" element="Lamp_White"><bounds x="345" y="420" width="8" height="8" /></bezel> <!-- U4 01 --> |
| 780 | | <bezel name="lamp47" element="Lamp_White"><bounds x="360" y="420" width="8" height="8" /></bezel> <!-- U4 02 --> |
| 781 | | <bezel name="lamp48" element="Lamp_White"><bounds x="375" y="420" width="8" height="8" /></bezel> <!-- U4 03 --> |
| 782 | | <bezel name="lamp49" element="Lamp_White"><bounds x="390" y="420" width="8" height="8" /></bezel> <!-- U4 04 --> |
| 783 | | <bezel name="lamp50" element="Lamp_White"><bounds x="405" y="420" width="8" height="8" /></bezel> <!-- U4 05 --> |
| 784 | | <bezel name="lamp51" element="Lamp_White"><bounds x="420" y="420" width="8" height="8" /></bezel> <!-- U4 06 --> |
| 785 | | <bezel name="lamp52" element="Lamp_White"><bounds x="435" y="420" width="8" height="8" /></bezel> <!-- U4 07 --> |
| 786 | | <bezel name="lamp53" element="Lamp_White"><bounds x="450" y="420" width="8" height="8" /></bezel> <!-- U4 08 --> |
| 787 | | <bezel name="lamp54" element="Lamp_White"><bounds x="465" y="420" width="8" height="8" /></bezel> <!-- U4 09 --> |
| 788 | | <bezel name="lamp55" element="Lamp_White"><bounds x="480" y="420" width="8" height="8" /></bezel> <!-- U4 10 --> |
| 789 | | <bezel name="lamp56" element="Lamp_White"><bounds x="495" y="420" width="8" height="8" /></bezel> <!-- U4 11 --> |
| 790 | | <bezel name="lamp57" element="Lamp_White"><bounds x="510" y="420" width="8" height="8" /></bezel> <!-- U4 12 --> |
| 791 | | <bezel name="lamp58" element="Lamp_White"><bounds x="525" y="420" width="8" height="8" /></bezel> <!-- U4 13 --> |
| 792 | | <bezel name="lamp59" element="Lamp_White"><bounds x="540" y="420" width="8" height="8" /></bezel> <!-- U4 14 --> |
| 778 | <bezel name="lamp45" element="Lamp_White"><bounds x="330" y="420" width="8" height="8" /></bezel> <!-- U4 00 --> |
| 779 | <bezel name="lamp46" element="Lamp_White"><bounds x="345" y="420" width="8" height="8" /></bezel> <!-- U4 01 --> |
| 780 | <bezel name="lamp47" element="Lamp_White"><bounds x="360" y="420" width="8" height="8" /></bezel> <!-- U4 02 --> |
| 781 | <bezel name="lamp48" element="Lamp_White"><bounds x="375" y="420" width="8" height="8" /></bezel> <!-- U4 03 --> |
| 782 | <bezel name="lamp49" element="Lamp_White"><bounds x="390" y="420" width="8" height="8" /></bezel> <!-- U4 04 --> |
| 783 | <bezel name="lamp50" element="Lamp_White"><bounds x="405" y="420" width="8" height="8" /></bezel> <!-- U4 05 --> |
| 784 | <bezel name="lamp51" element="Lamp_White"><bounds x="420" y="420" width="8" height="8" /></bezel> <!-- U4 06 --> |
| 785 | <bezel name="lamp52" element="Lamp_White"><bounds x="435" y="420" width="8" height="8" /></bezel> <!-- U4 07 --> |
| 786 | <bezel name="lamp53" element="Lamp_White"><bounds x="450" y="420" width="8" height="8" /></bezel> <!-- U4 08 --> |
| 787 | <bezel name="lamp54" element="Lamp_White"><bounds x="465" y="420" width="8" height="8" /></bezel> <!-- U4 09 --> |
| 788 | <bezel name="lamp55" element="Lamp_White"><bounds x="480" y="420" width="8" height="8" /></bezel> <!-- U4 10 --> |
| 789 | <bezel name="lamp56" element="Lamp_White"><bounds x="495" y="420" width="8" height="8" /></bezel> <!-- U4 11 --> |
| 790 | <bezel name="lamp57" element="Lamp_White"><bounds x="510" y="420" width="8" height="8" /></bezel> <!-- U4 12 --> |
| 791 | <bezel name="lamp58" element="Lamp_White"><bounds x="525" y="420" width="8" height="8" /></bezel> <!-- U4 13 --> |
| 792 | <bezel name="lamp59" element="Lamp_White"><bounds x="540" y="420" width="8" height="8" /></bezel> <!-- U4 14 --> |
| 793 | 793 | |
| 794 | 794 | |
| 795 | 795 | <bezel element="Text_Solenoids"><bounds x="382" y="437" width="100" height="11" /></bezel> |
| r249940 | r249941 | |
|---|
| 837 | 837 | |
| 838 | 838 | |
| 839 | 839 | <!-- Misc Lamps --> |
| 840 | | <bezel name="lamp55" element="Credit_Indicator"> <bounds x="023" y="456" width="70" height="21" /></bezel> <!-- Credit Indicator --> |
| 841 | | <bezel name="lamp40" element="Lamp_Amber"> <bounds x="153.5" y="420" width="12" height="12" /></bezel> <!-- Extra Ball --> |
| 842 | | <bezel name="lamp49" element="Lamp_Red"> <bounds x="209" y="192" width="14" height="14" /></bezel> <!-- Special Drop Targets --> |
| 843 | | <bezel name="lamp47" element="Lamp_Red"> <bounds x="155" y="023" width="09" height="9" /></bezel> <!-- Special 1 - 5 Keys --> |
| 844 | | <bezel name="lamp56" element="Lamp_White_25k"> <bounds x="009" y="333" width="09" height="9" /></bezel> <!-- 25,000 Outlane Left --> |
| 845 | | <bezel name="lamp41" element="Lamp_White_25k"> <bounds x="301" y="333" width="09" height="9" /></bezel> <!-- 25,000 Outlane Right --> |
| 846 | | <bezel name="lamp53" element="Lamp_Amber_Arrow_10"><bounds x="055" y="198" width="20" height="12.5" /></bezel> <!-- Extra Ball Potential Rollover Button --> |
| 847 | | <bezel name="lamp38" element="Lamp_Red_Arrow_08"> <bounds x="055" y="148" width="20" height="12.5" /></bezel> <!-- Special Potential Rollover Button --> |
| 840 | <bezel name="lamp55" element="Credit_Indicator"> <bounds x="023" y="456" width="70" height="21" /></bezel> <!-- Credit Indicator --> |
| 841 | <bezel name="lamp40" element="Lamp_Amber"> <bounds x="153.5" y="420" width="12" height="12" /></bezel> <!-- Extra Ball --> |
| 842 | <bezel name="lamp49" element="Lamp_Red"> <bounds x="209" y="192" width="14" height="14" /></bezel> <!-- Special Drop Targets --> |
| 843 | <bezel name="lamp47" element="Lamp_Red"> <bounds x="155" y="023" width="09" height="9" /></bezel> <!-- Special 1 - 5 Keys --> |
| 844 | <bezel name="lamp56" element="Lamp_White_25k"> <bounds x="009" y="333" width="09" height="9" /></bezel> <!-- 25,000 Outlane Left --> |
| 845 | <bezel name="lamp41" element="Lamp_White_25k"> <bounds x="301" y="333" width="09" height="9" /></bezel> <!-- 25,000 Outlane Right --> |
| 846 | <bezel name="lamp53" element="Lamp_Amber_Arrow_10"><bounds x="055" y="198" width="20" height="12.5" /></bezel> <!-- Extra Ball Potential Rollover Button --> |
| 847 | <bezel name="lamp38" element="Lamp_Red_Arrow_08"> <bounds x="055" y="148" width="20" height="12.5" /></bezel> <!-- Special Potential Rollover Button --> |
| 848 | 848 | <!-- Bonus End of Ball Lamps --> |
| 849 | 849 | <bezel name="lamp0" element="Lamp_White_1k"> <bounds x="126" y="395" width="09" height="09" /></bezel> |
| 850 | 850 | <bezel name="lamp15" element="Lamp_White_2k"> <bounds x="126" y="380" width="09" height="09" /></bezel> |
| r249940 | r249941 | |
|---|
| 858 | 858 | <bezel name="lamp17" element="Lamp_White_10k"><bounds x="184" y="395" width="09" height="09" /></bezel> |
| 859 | 859 | <bezel name="lamp32" element="Lamp_White_20k"><bounds x="154" y="330" width="12" height="12" /></bezel> |
| 860 | 860 | <!-- Bonus Multiplier Lamps --> |
| 861 | | <bezel name="lamp51" element="Lamp_2x"><bounds x="134" y="318" width="14" height="14" /></bezel> <!-- 2X Bonus --> |
| 862 | | <bezel name="lamp36" element="Lamp_3x"><bounds x="172" y="318" width="14" height="14" /></bezel> <!-- 3X Bonus --> |
| 863 | | <bezel name="lamp21" element="Lamp_5x"><bounds x="153" y="310" width="14" height="14" /></bezel> <!-- 5X Bonus --> |
| 861 | <bezel name="lamp51" element="Lamp_2x"><bounds x="134" y="318" width="14" height="14" /></bezel> <!-- 2X Bonus --> |
| 862 | <bezel name="lamp36" element="Lamp_3x"><bounds x="172" y="318" width="14" height="14" /></bezel> <!-- 3X Bonus --> |
| 863 | <bezel name="lamp21" element="Lamp_5x"><bounds x="153" y="310" width="14" height="14" /></bezel> <!-- 5X Bonus --> |
| 864 | 864 | <!-- Grotto Lamps --> |
| 865 | | <bezel name="lamp19" element="Lamp_White_25k"><bounds x="17" y="090" width="12" height="12" /></bezel> <!-- 25,000 Grotto --> |
| 866 | | <bezel name="lamp5" element="Lamp_White_1"> <bounds x="09" y="132" width="09" height="09" /></bezel> <!-- 1 --> |
| 867 | | <bezel name="lamp20" element="Lamp_White_2"> <bounds x="09" y="147" width="09" height="09" /></bezel> <!-- 2 --> |
| 868 | | <bezel name="lamp35" element="Lamp_White_3"> <bounds x="09" y="162" width="09" height="09" /></bezel> <!-- 3 --> |
| 869 | | <bezel name="lamp50" element="Lamp_White_4"> <bounds x="09" y="177" width="09" height="09" /></bezel> <!-- 4 --> |
| 870 | | <bezel name="lamp6" element="Lamp_White_5"> <bounds x="09" y="192" width="09" height="09" /></bezel> <!-- 5 --> |
| 865 | <bezel name="lamp19" element="Lamp_White_25k"><bounds x="17" y="090" width="12" height="12" /></bezel> <!-- 25,000 Grotto --> |
| 866 | <bezel name="lamp5" element="Lamp_White_1"> <bounds x="09" y="132" width="09" height="09" /></bezel> <!-- 1 --> |
| 867 | <bezel name="lamp20" element="Lamp_White_2"> <bounds x="09" y="147" width="09" height="09" /></bezel> <!-- 2 --> |
| 868 | <bezel name="lamp35" element="Lamp_White_3"> <bounds x="09" y="162" width="09" height="09" /></bezel> <!-- 3 --> |
| 869 | <bezel name="lamp50" element="Lamp_White_4"> <bounds x="09" y="177" width="09" height="09" /></bezel> <!-- 4 --> |
| 870 | <bezel name="lamp6" element="Lamp_White_5"> <bounds x="09" y="192" width="09" height="09" /></bezel> <!-- 5 --> |
| 871 | 871 | <!-- Playmate of the Month Lamps --> |
| 872 | | <bezel name="lamp7" element="Lamp_White_March"> <bounds x="56" y="225" width="21" height="18" /></bezel> <!-- March --> |
| 873 | | <bezel name="lamp22" element="Lamp_White_May"> <bounds x="50" y="244" width="13" height="18" /></bezel> <!-- May --> |
| 874 | | <bezel name="lamp37" element="Lamp_White_January"> <bounds x="44" y="263" width="29" height="18" /></bezel> <!-- January --> |
| 875 | | <bezel name="lamp52" element="Lamp_White_July"> <bounds x="38" y="282" width="16" height="18" /></bezel> <!-- July --> |
| 876 | | <bezel name="lamp8" element="Lamp_White_September"><bounds x="32" y="301" width="37" height="18" /></bezel> <!-- September --> |
| 872 | <bezel name="lamp7" element="Lamp_White_March"> <bounds x="56" y="225" width="21" height="18" /></bezel> <!-- March --> |
| 873 | <bezel name="lamp22" element="Lamp_White_May"> <bounds x="50" y="244" width="13" height="18" /></bezel> <!-- May --> |
| 874 | <bezel name="lamp37" element="Lamp_White_January"> <bounds x="44" y="263" width="29" height="18" /></bezel> <!-- January --> |
| 875 | <bezel name="lamp52" element="Lamp_White_July"> <bounds x="38" y="282" width="16" height="18" /></bezel> <!-- July --> |
| 876 | <bezel name="lamp8" element="Lamp_White_September"><bounds x="32" y="301" width="37" height="18" /></bezel> <!-- September --> |
| 877 | 877 | |
| 878 | 878 | |
| 879 | 879 | |
trunk/src/mame/machine/psxcd.c
| r249940 | r249941 | |
|---|
| 1244 | 1244 | * |
| 1245 | 1245 | */ |
| 1246 | 1246 | ROM_START( psxcd ) |
| 1247 | | ROM_REGION( 0x10000, "cdrom_mcu", 0 ) |
| 1247 | ROM_REGION( 0x10000, "cdrom_mcu", 0 ) |
| 1248 | 1248 | |
| 1249 | | /* Retail PlayStation CD-ROM Firmware: |
| 1250 | | * |
| 1251 | | * Still missing: |
| 1252 | | * SCPH-1001, 3000, 3500, 5003, 5502, 5503, 7000W, 7001, 7002, 7003, 7503, 9003, 100, 101, 102 and 103. |
| 1253 | | */ |
| 1249 | /* Retail PlayStation CD-ROM Firmware: |
| 1250 | * |
| 1251 | * Still missing: |
| 1252 | * SCPH-1001, 3000, 3500, 5003, 5502, 5503, 7000W, 7001, 7002, 7003, 7503, 9003, 100, 101, 102 and 103. |
| 1253 | */ |
| 1254 | 1254 | |
| 1255 | | ROM_SYSTEM_BIOS( 0, "SCPH-1000-later", "SCPH-1000 NTSC:J (Later Ver.) [424660]" ) |
| 1256 | | ROMX_LOAD( "424660.bin", 0x0000, 0x4200, CRC(f82a2a46) SHA1(095434948d4c71cdfaa069e91053443887a6d139), ROM_BIOS(1) ) |
| 1255 | ROM_SYSTEM_BIOS( 0, "SCPH-1000-later", "SCPH-1000 NTSC:J (Later Ver.) [424660]" ) |
| 1256 | ROMX_LOAD( "424660.bin", 0x0000, 0x4200, CRC(f82a2a46) SHA1(095434948d4c71cdfaa069e91053443887a6d139), ROM_BIOS(1) ) |
| 1257 | 1257 | |
| 1258 | | ROM_SYSTEM_BIOS( 1, "SCPH-1000-early", "SCPH-1000 NTSC:J (Early Ver.) [424666]" ) |
| 1259 | | ROMX_LOAD( "424666.bin", 0x0000, 0x4200, CRC(60bc954e) SHA1(80674353daf95ffb4bd15cc4bb8cfa713370dd45), ROM_BIOS(2) ) |
| 1258 | ROM_SYSTEM_BIOS( 1, "SCPH-1000-early", "SCPH-1000 NTSC:J (Early Ver.) [424666]" ) |
| 1259 | ROMX_LOAD( "424666.bin", 0x0000, 0x4200, CRC(60bc954e) SHA1(80674353daf95ffb4bd15cc4bb8cfa713370dd45), ROM_BIOS(2) ) |
| 1260 | 1260 | |
| 1261 | | ROM_SYSTEM_BIOS( 2, "SCPH-1002-early", "SCPH-1002 PAL (Early PU-8) [424684]" ) |
| 1262 | | ROMX_LOAD( "424684.bin", 0x0000, 0x4200, CRC(84d46b2a) SHA1(9b06b1d407b784095ddbd45aeabafd689d2ee347), ROM_BIOS(3) ) |
| 1261 | ROM_SYSTEM_BIOS( 2, "SCPH-1002-early", "SCPH-1002 PAL (Early PU-8) [424684]" ) |
| 1262 | ROMX_LOAD( "424684.bin", 0x0000, 0x4200, CRC(84d46b2a) SHA1(9b06b1d407b784095ddbd45aeabafd689d2ee347), ROM_BIOS(3) ) |
| 1263 | 1263 | |
| 1264 | | /* Chip markings: C 1021 / SC430916PB / G63C 185 / JSAB9624F */ |
| 1265 | | ROM_SYSTEM_BIOS( 3, "SCPH-5000", "SCPH-5000 NTSC:J [SC430916]" ) |
| 1266 | | ROMX_LOAD( "sc430916.s19", 0x0000, 0xb195, CRC(487c8a40) SHA1(0ae8348fb43ab80845b0166494edc3e1565a3ef7), ROM_BIOS(4) ) |
| 1264 | /* Chip markings: C 1021 / SC430916PB / G63C 185 / JSAB9624F */ |
| 1265 | ROM_SYSTEM_BIOS( 3, "SCPH-5000", "SCPH-5000 NTSC:J [SC430916]" ) |
| 1266 | ROMX_LOAD( "sc430916.s19", 0x0000, 0xb195, CRC(487c8a40) SHA1(0ae8348fb43ab80845b0166494edc3e1565a3ef7), ROM_BIOS(4) ) |
| 1267 | 1267 | |
| 1268 | | /* Chip markings: C 1030 / SC430925PB / G63C 185 / JSBK9708C |
| 1269 | | Board Type: PU-18 / 1-664-537-11 */ |
| 1270 | | ROM_SYSTEM_BIOS( 4, "SCPH-5500", "SCPH-5500 NTSC:J [SC430925]" ) |
| 1271 | | ROMX_LOAD( "sc430925.s19", 0x0000, 0xb195, CRC(c09aa0c2) SHA1(b9ad66cc8ea4d6e2eb2709ffb77c9647f679097a), ROM_BIOS(5) ) |
| 1268 | /* Chip markings: C 1030 / SC430925PB / G63C 185 / JSBK9708C |
| 1269 | Board Type: PU-18 / 1-664-537-11 */ |
| 1270 | ROM_SYSTEM_BIOS( 4, "SCPH-5500", "SCPH-5500 NTSC:J [SC430925]" ) |
| 1271 | ROMX_LOAD( "sc430925.s19", 0x0000, 0xb195, CRC(c09aa0c2) SHA1(b9ad66cc8ea4d6e2eb2709ffb77c9647f679097a), ROM_BIOS(5) ) |
| 1272 | 1272 | |
| 1273 | | /* Chip markings: C 2030 / SC430930PB / G63C 185 / SSJZ9748A |
| 1274 | | Board Type: PU-18 / 1-664-537-62 */ |
| 1275 | | ROM_SYSTEM_BIOS( 5, "SCPH-5501", "SCPH-5501 NTSC:U/C [SC430930]" ) |
| 1276 | | ROMX_LOAD( "sc430930.s19", 0x0000, 0xb195, CRC(587b84c2) SHA1(556c3adc37e4eb64fd463c54f7a310c483e0e835), ROM_BIOS(6) ) |
| 1273 | /* Chip markings: C 2030 / SC430930PB / G63C 185 / SSJZ9748A |
| 1274 | Board Type: PU-18 / 1-664-537-62 */ |
| 1275 | ROM_SYSTEM_BIOS( 5, "SCPH-5501", "SCPH-5501 NTSC:U/C [SC430930]" ) |
| 1276 | ROMX_LOAD( "sc430930.s19", 0x0000, 0xb195, CRC(587b84c2) SHA1(556c3adc37e4eb64fd463c54f7a310c483e0e835), ROM_BIOS(6) ) |
| 1277 | 1277 | |
| 1278 | | /* ROM dump is the same as SCPH-5552 */ |
| 1279 | | ROM_SYSTEM_BIOS( 6, "SCPH-5502", "SCPH-5502 PAL [SC430929]" ) |
| 1280 | | ROMX_LOAD( "sc430929.bin", 0x0000, 0x4200, CRC(ba87a3e0) SHA1(f23458d13a518616a8592b8ddd668c052bc9be5a), ROM_BIOS(7) ) |
| 1278 | /* ROM dump is the same as SCPH-5552 */ |
| 1279 | ROM_SYSTEM_BIOS( 6, "SCPH-5502", "SCPH-5502 PAL [SC430929]" ) |
| 1280 | ROMX_LOAD( "sc430929.bin", 0x0000, 0x4200, CRC(ba87a3e0) SHA1(f23458d13a518616a8592b8ddd668c052bc9be5a), ROM_BIOS(7) ) |
| 1281 | 1281 | |
| 1282 | | ROM_SYSTEM_BIOS( 7, "SCPH-5903", "SCPH-5903 NTSC:J [SC430924PB]" ) |
| 1283 | | ROMX_LOAD( "sc430924.s19", 0x0000, 0xb195, CRC(dbe694b2) SHA1(ac72cb616b1449fe29e52faf6aad389118852d73), ROM_BIOS(8) ) |
| 1282 | ROM_SYSTEM_BIOS( 7, "SCPH-5903", "SCPH-5903 NTSC:J [SC430924PB]" ) |
| 1283 | ROMX_LOAD( "sc430924.s19", 0x0000, 0xb195, CRC(dbe694b2) SHA1(ac72cb616b1449fe29e52faf6aad389118852d73), ROM_BIOS(8) ) |
| 1284 | 1284 | |
| 1285 | | /* Chip markings: C 1040 / SC430934PB / G63C 185 / SSDG9745D */ |
| 1286 | | ROM_SYSTEM_BIOS( 8, "SCPH-7000", "SCPH-7000 NTSC:J [SC430934]" ) |
| 1287 | | ROMX_LOAD( "sc430934.s19", 0x0000, 0xb195, CRC(6443740c) SHA1(d9734c7135c75dbe7733079a2d4244a28c9e966e), ROM_BIOS(9) ) |
| 1285 | /* Chip markings: C 1040 / SC430934PB / G63C 185 / SSDG9745D */ |
| 1286 | ROM_SYSTEM_BIOS( 8, "SCPH-7000", "SCPH-7000 NTSC:J [SC430934]" ) |
| 1287 | ROMX_LOAD( "sc430934.s19", 0x0000, 0xb195, CRC(6443740c) SHA1(d9734c7135c75dbe7733079a2d4244a28c9e966e), ROM_BIOS(9) ) |
| 1288 | 1288 | |
| 1289 | | /* Chip markings: C 1050 / SC430938PB / G63C 185 / SSAM9850C */ |
| 1290 | | ROM_SYSTEM_BIOS( 9, "SCPH-7500", "SCPH-7500 NTSC:J [SC430938]" ) |
| 1291 | | ROMX_LOAD( "sc430938.s19", 0x0000, 0xb195, CRC(9744977a) SHA1(f017d34a98a8a023f6752ba9ed749bb9e2b836d5), ROM_BIOS(10) ) |
| 1289 | /* Chip markings: C 1050 / SC430938PB / G63C 185 / SSAM9850C */ |
| 1290 | ROM_SYSTEM_BIOS( 9, "SCPH-7500", "SCPH-7500 NTSC:J [SC430938]" ) |
| 1291 | ROMX_LOAD( "sc430938.s19", 0x0000, 0xb195, CRC(9744977a) SHA1(f017d34a98a8a023f6752ba9ed749bb9e2b836d5), ROM_BIOS(10) ) |
| 1292 | 1292 | |
| 1293 | | /* Chip markings: C 2050 / SC430940PB / G63C 185 / SSDL9838A */ |
| 1294 | | ROM_SYSTEM_BIOS( 10, "SCPH-7501", "SCPH-7501 NTSC:U/C [SC430940]" ) |
| 1295 | | ROMX_LOAD( "sc430940.s19", 0x0000, 0xb195, CRC(fd1c6ee7) SHA1(e72b5093a3e25de1548be7668179ff3e001e3ec5), ROM_BIOS(11) ) |
| 1293 | /* Chip markings: C 2050 / SC430940PB / G63C 185 / SSDL9838A */ |
| 1294 | ROM_SYSTEM_BIOS( 10, "SCPH-7501", "SCPH-7501 NTSC:U/C [SC430940]" ) |
| 1295 | ROMX_LOAD( "sc430940.s19", 0x0000, 0xb195, CRC(fd1c6ee7) SHA1(e72b5093a3e25de1548be7668179ff3e001e3ec5), ROM_BIOS(11) ) |
| 1296 | 1296 | |
| 1297 | | ROM_SYSTEM_BIOS( 11, "SCPH-7502", "SCPH-7502 PAL [SC430939]" ) |
| 1298 | | ROMX_LOAD( "sc430939.bin", 0x0000, 0x4200, CRC(9eafb045) SHA1(25d98454e567e064c06f840d57f763fb7c8b7219), ROM_BIOS(12) ) |
| 1297 | ROM_SYSTEM_BIOS( 11, "SCPH-7502", "SCPH-7502 PAL [SC430939]" ) |
| 1298 | ROMX_LOAD( "sc430939.bin", 0x0000, 0x4200, CRC(9eafb045) SHA1(25d98454e567e064c06f840d57f763fb7c8b7219), ROM_BIOS(12) ) |
| 1299 | 1299 | |
| 1300 | | ROM_SYSTEM_BIOS( 12, "SCPH-9000", "SCPH-9000 NTSC:J [SC430942]" ) |
| 1301 | | ROMX_LOAD( "sc430942.bin", 0x0000, 0x4200, NO_DUMP, ROM_BIOS(13) ) |
| 1300 | ROM_SYSTEM_BIOS( 12, "SCPH-9000", "SCPH-9000 NTSC:J [SC430942]" ) |
| 1301 | ROMX_LOAD( "sc430942.bin", 0x0000, 0x4200, NO_DUMP, ROM_BIOS(13) ) |
| 1302 | 1302 | |
| 1303 | | /* Chip markings: C 2060 / SC430944PB / G63C 185 / SSBR9924C */ |
| 1304 | | ROM_SYSTEM_BIOS( 13, "SCPH-9001", "SCPH-9001 NTSC:U/C [SC430944]" ) |
| 1305 | | ROMX_LOAD( "sc430944.s19", 0x0000, 0xb195, CRC(24011dfd) SHA1(db72ba02466942d1a1a07c4d855edd18f84de92e), ROM_BIOS(14) ) |
| 1303 | /* Chip markings: C 2060 / SC430944PB / G63C 185 / SSBR9924C */ |
| 1304 | ROM_SYSTEM_BIOS( 13, "SCPH-9001", "SCPH-9001 NTSC:U/C [SC430944]" ) |
| 1305 | ROMX_LOAD( "sc430944.s19", 0x0000, 0xb195, CRC(24011dfd) SHA1(db72ba02466942d1a1a07c4d855edd18f84de92e), ROM_BIOS(14) ) |
| 1306 | 1306 | |
| 1307 | | ROM_SYSTEM_BIOS( 14, "SCPH-9002", "SCPH-9002 PAL [SC430943]" ) |
| 1308 | | ROMX_LOAD( "sc430943.bin", 0x0000, 0x4200, CRC(2669a1a7) SHA1(62999e7f8429f381e19d44d2399b6017959f4f13), ROM_BIOS(15) ) |
| 1307 | ROM_SYSTEM_BIOS( 14, "SCPH-9002", "SCPH-9002 PAL [SC430943]" ) |
| 1308 | ROMX_LOAD( "sc430943.bin", 0x0000, 0x4200, CRC(2669a1a7) SHA1(62999e7f8429f381e19d44d2399b6017959f4f13), ROM_BIOS(15) ) |
| 1309 | 1309 | |
| 1310 | | /* Development PlayStation CD-ROM Firmware: |
| 1311 | | * |
| 1312 | | * Still missing: |
| 1313 | | * DTL-H1000, 1000H, 1001, 1001H, 1002, 1100, 1101, 1102, 1200, 1201, 2000, 2500, 2700, 3000, 3001 and 3002. |
| 1314 | | */ |
| 1310 | /* Development PlayStation CD-ROM Firmware: |
| 1311 | * |
| 1312 | * Still missing: |
| 1313 | * DTL-H1000, 1000H, 1001, 1001H, 1002, 1100, 1101, 1102, 1200, 1201, 2000, 2500, 2700, 3000, 3001 and 3002. |
| 1314 | */ |
| 1315 | 1315 | |
| 1316 | | /* Chip markings: D 2021 / SC430920PB / G63C 185 / JSAA9810A |
| 1317 | | * Note: Although this is a PAL unit, the ID string in the |
| 1318 | | * code is "for US/AEP", so it may be the same for all the |
| 1319 | | * debug consoles. |
| 1320 | | */ |
| 1321 | | ROM_SYSTEM_BIOS( 15, "DTL-H1202", "DTL-H1202 PAL [SC430920]" ) |
| 1322 | | ROMX_LOAD( "sc430920.s19", 0x0000, 0xb195, CRC(8380a5a2) SHA1(6fe45fd6fb96b12a25a45f39b5efd0be5e3f3e86), ROM_BIOS(16) ) |
| 1316 | /* Chip markings: D 2021 / SC430920PB / G63C 185 / JSAA9810A |
| 1317 | * Note: Although this is a PAL unit, the ID string in the |
| 1318 | * code is "for US/AEP", so it may be the same for all the |
| 1319 | * debug consoles. |
| 1320 | */ |
| 1321 | ROM_SYSTEM_BIOS( 15, "DTL-H1202", "DTL-H1202 PAL [SC430920]" ) |
| 1322 | ROMX_LOAD( "sc430920.s19", 0x0000, 0xb195, CRC(8380a5a2) SHA1(6fe45fd6fb96b12a25a45f39b5efd0be5e3f3e86), ROM_BIOS(16) ) |
| 1323 | 1323 | ROM_END |
| 1324 | 1324 | |
| 1325 | 1325 | const rom_entry *psxcd_device::device_rom_region() const |
| 1326 | 1326 | { |
| 1327 | 1327 | return ROM_NAME( psxcd ); |
| 1328 | 1328 | } |
| 1329 | | |
trunk/src/mame/video/gic.c
| r0 | r249941 | |
|---|
| 1 | // license:BSD-3-Clause |
| 2 | // copyright-holders:David Viens |
| 3 | /*************************************************************************** |
| 4 | |
| 5 | gic.c |
| 6 | |
| 7 | GI AY-3-8800-1 (Datasheet exists as AY-3-8500-1 Graphics Interface Chip) |
| 8 | For the GIMINI "Challenger" programmable game system. |
| 9 | |
| 10 | Really only ever used in the Unisonic Champion 2711 |
| 11 | |
| 12 | More LA tests made by plgDavid on hardware pretty much confirmed what is found |
| 13 | in the AY-3-8950-1 datasheet, but with more fine grained detail. |
| 14 | |
| 15 | the GIC does not have internal ram of any sort apart from shift registers, |
| 16 | instead it relies on the external shared ram, (see page 7-85) Appendix AY-3-8950-1 |
| 17 | |
| 18 | Unverified on LA (since the video pins are all connected into a composite mix): |
| 19 | at line 46 it lowers GIC_BUSY, until line 240 |
| 20 | |
| 21 | Verified using LA: |
| 22 | It will read the external ram areas continuously while GIC_BUSY is low (for 12.36ms) |
| 23 | |
| 24 | (NOTE: OCTAL) |
| 25 | |
| 26 | 000,001,002,003,004,005, 110,111,112,113,114,115,116,117,120,121,122,123,124,125 (15 times - No first bg line?) |
| 27 | 006,007,010,011,012,013, 110,111,112,113,114,115,116,117,120,121,122,123,124,125 (16 times) |
| 28 | |
| 29 | 014,015,016,017,020,021, 125,126,127,130,131,132,133,134,135,136,137,140,141,142 (16 times) |
| 30 | 022,023,024,025,026,027, 125,126,127,130,131,132,133,134,135,136,137,140,141,142 (16 times) |
| 31 | |
| 32 | 030,031,032,033,034,035, 142,143,144,145,146,147,150,151,152,153,154,155,156,157 (16 times) |
| 33 | 036,037,040,041,042,043, 142,143,144,145,146,147,150,151,152,153,154,155,156,157 (16 times) |
| 34 | |
| 35 | 044,045,046,047,050,051, 157,160,161,162,163,164,165,166,167,170,171,172,173,174 (16 times) |
| 36 | 052,053,054,055,056,057, 157,160,161,162,163,164,165,166,167,170,171,172,173,174 (16 times) |
| 37 | |
| 38 | 060,061,062,063,064,065, 174,175,176,177,200,201,202,203,204,205,206,207,210,211 (16 times) |
| 39 | 066,067,070,071,072,073, 174,175,176,177,200,201,202,203,204,205,206,207,210,211 (16 times) |
| 40 | |
| 41 | 074,075,076,077,100,101, 211,212,213,214,215,216,217,220,221,222,223,224,225,226 (16 times) |
| 42 | 102,103,104,105,106,107, 211,212,213,214,215,216,217,220,221,222,223,224,225,226 (16 times) |
| 43 | |
| 44 | 000,001,002,003,004,005, 000,001,002,003,004,005,006,007,010,011,012,013,014,015 (once! padding?) |
| 45 | |
| 46 | for a total of (12*20*16) = 3840 RAM reads (3 clocks per read at 1.79MHz) |
| 47 | |
| 48 | Then it relingishes control to the CPU by raising BUSREQ. |
| 49 | |
| 50 | Cloking in more detail: (in 1.79MHz clocks) |
| 51 | boot: |
| 52 | busy:1 5360 clocks |
| 53 | busy:0 22116 clocks |
| 54 | busy:1 7752 clocks |
| 55 | busy:0 22116 clocks |
| 56 | busy:1 7752 clocks |
| 57 | (...) |
| 58 | |
| 59 | There are NO IRQ handshakes, just BUSREQ sync shared RAM |
| 60 | |
| 61 | ***************************************************************************/ |
| 62 | |
| 63 | #include "emu.h" |
| 64 | #include "gic.h" |
| 65 | |
| 66 | // device type definition |
| 67 | const device_type GIC = &device_creator<gic_device>; |
| 68 | |
| 69 | |
| 70 | //Font data taken from Paul Robson's simulator |
| 71 | //http://worstconsole.blogspot.ca/2012/12/the-worstconsoleever.html |
| 72 | //A real AY-3-8800-1 (dead) is going to decap for a good dump |
| 73 | ROM_START( gic_font ) |
| 74 | ROM_REGION( 0x200, "cgrom", 0 ) |
| 75 | ROM_LOAD( "ay-3-8800-1.bin", 0x0000, 0x200, BAD_DUMP CRC(d9f11d2b) SHA1(60ef45d51d102cd3af78787008d9aed848137bee)) |
| 76 | ROM_END |
| 77 | |
| 78 | |
| 79 | //------------------------------------------------- |
| 80 | // gic_device - constructor |
| 81 | //------------------------------------------------- |
| 82 | |
| 83 | gic_device::gic_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 84 | : device_t(mconfig, GIC, "GIC", tag, owner, clock, "gic", __FILE__) |
| 85 | , device_sound_interface(mconfig, *this) |
| 86 | , device_video_interface(mconfig, *this) |
| 87 | , m_cgrom(0) |
| 88 | , m_audiocnt(0) |
| 89 | , m_audioval(0) |
| 90 | , m_audioreset(0) |
| 91 | , m_ram(0) |
| 92 | { |
| 93 | } |
| 94 | |
| 95 | |
| 96 | gic_device::gic_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, int lines, const char *shortname, const char *source) |
| 97 | : device_t(mconfig, type, name, tag, owner, clock, shortname, source) |
| 98 | , device_sound_interface(mconfig, *this) |
| 99 | , device_video_interface(mconfig, *this) |
| 100 | , m_cgrom(0) |
| 101 | , m_audiocnt(0) |
| 102 | , m_audioval(0) |
| 103 | , m_audioreset(0) |
| 104 | , m_ram(0) |
| 105 | { |
| 106 | } |
| 107 | |
| 108 | const rom_entry *gic_device::device_rom_region() const |
| 109 | { |
| 110 | //there is only one... how do I get rid of this? |
| 111 | return ROM_NAME( gic_font ); |
| 112 | } |
| 113 | |
| 114 | //------------------------------------------------- |
| 115 | // device_start - device-specific startup |
| 116 | //------------------------------------------------- |
| 117 | |
| 118 | void gic_device::device_start() |
| 119 | { |
| 120 | m_cgrom = memregion("cgrom")->base(); |
| 121 | |
| 122 | // Let the screen create our temporary bitmap with the screen's dimensions |
| 123 | m_screen->register_screen_bitmap(m_bitmap); |
| 124 | |
| 125 | m_vblank_timer = timer_alloc(TIMER_VBLANK); |
| 126 | m_vblank_timer->adjust( m_screen->time_until_pos(1, END_ACTIVE_SCAN + 18 ), 0, m_screen->scan_period() ); |
| 127 | |
| 128 | // allocate the audio stream |
| 129 | m_stream = stream_alloc( 0, 1, clock()/(2*228) ); |
| 130 | } |
| 131 | |
| 132 | |
| 133 | //------------------------------------------------- |
| 134 | // device_reset - device-specific reset |
| 135 | //------------------------------------------------- |
| 136 | |
| 137 | void gic_device::device_reset() |
| 138 | { |
| 139 | m_audiocnt=0; |
| 140 | m_audioval=0; |
| 141 | m_audioreset=0; |
| 142 | } |
| 143 | |
| 144 | #define GIC_CLUB 28 |
| 145 | #define GIC_SPACE 0 |
| 146 | |
| 147 | void gic_device::draw_char_left(int startx, int starty, UINT8 code, bitmap_ind16 &bitmap){ |
| 148 | UINT8*ptr = &m_cgrom[code*GIC_CHAR_H]; |
| 149 | |
| 150 | for (size_t y=0;y<GIC_CHAR_H;y++){ |
| 151 | UINT8 current = *ptr++; |
| 152 | UINT8 nextx=0; |
| 153 | UINT8 curry= starty+y; |
| 154 | for(UINT8 x=0x20;x!=0;x=x/2){ |
| 155 | if (current&x) |
| 156 | m_bitmap.pix16(curry,startx+nextx) = GIC_WHITE; |
| 157 | nextx++; |
| 158 | } |
| 159 | } |
| 160 | } |
| 161 | |
| 162 | void gic_device::draw_char_right(int startx, int starty, UINT8 code, bitmap_ind16 &bitmap, int bg_col){ |
| 163 | UINT8*ptr = &m_cgrom[code*GIC_CHAR_H]; |
| 164 | |
| 165 | for (size_t y=0;y<GIC_CHAR_H;y++){ |
| 166 | UINT8 current = *ptr++; |
| 167 | UINT8 nextx=0; |
| 168 | UINT8 curry= starty+y; |
| 169 | |
| 170 | m_bitmap.pix16(curry,startx+nextx) = bg_col; |
| 171 | nextx++; |
| 172 | for(UINT8 x=0x20;x!=0;x=x/2){ |
| 173 | m_bitmap.pix16(curry,startx+nextx) = (current&x)?GIC_WHITE:bg_col; |
| 174 | nextx++; |
| 175 | } |
| 176 | m_bitmap.pix16(curry,startx+nextx) = bg_col; |
| 177 | nextx++; |
| 178 | m_bitmap.pix16(curry,startx+nextx) = bg_col; |
| 179 | } |
| 180 | } |
| 181 | |
| 182 | UINT32 gic_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) |
| 183 | { |
| 184 | m_bitmap.fill(GIC_GREEN); |
| 185 | |
| 186 | size_t XSTART = BORDER_SIZE; |
| 187 | size_t YSTART = START_ACTIVE_SCAN; |
| 188 | |
| 189 | //left hand side first |
| 190 | UINT8 current=0; |
| 191 | for(UINT8 cy=0;cy<GIC_LEFT_H;cy++){ |
| 192 | for(UINT8 cx=0;cx<GIC_LEFT_W;cx++){ |
| 193 | draw_char_left(XSTART+(cx*GIC_CHAR_W), |
| 194 | YSTART+(cy*GIC_CHAR_H), |
| 195 | m_ram[current], |
| 196 | m_bitmap); |
| 197 | current++; |
| 198 | } |
| 199 | } |
| 200 | |
| 201 | //right hand side is next |
| 202 | current=0x48;//110 octal |
| 203 | XSTART+=(GIC_LEFT_W*GIC_CHAR_W)+1; |
| 204 | |
| 205 | for(UINT8 cy=0;cy<GIC_RIGHT_H;cy++){ |
| 206 | for(UINT8 cx=0;cx<GIC_RIGHT_W;cx++){ |
| 207 | //complex case |
| 208 | UINT8 data = m_ram[current++]; |
| 209 | |
| 210 | size_t currX = (XSTART+ (cx*(3+GIC_CHAR_W))); |
| 211 | size_t currUP = (YSTART+ (cy*(2*GIC_CHAR_H))); |
| 212 | size_t currLOW = (YSTART+GIC_CHAR_H+(cy*(2*GIC_CHAR_H))); |
| 213 | |
| 214 | switch(data&0xC0){ |
| 215 | case 0x00:{ |
| 216 | //lower rectangle only, normal char |
| 217 | draw_char_right(currX,currLOW,data,m_bitmap,GIC_GREEN); |
| 218 | }break; |
| 219 | |
| 220 | //White block |
| 221 | case 0xC0:{ |
| 222 | //upper rectangle |
| 223 | draw_char_right(currX,currUP, GIC_SPACE,m_bitmap,GIC_WHITE); |
| 224 | //lower rectangle |
| 225 | draw_char_right(currX,currLOW,GIC_SPACE,m_bitmap,GIC_WHITE); |
| 226 | }break; |
| 227 | |
| 228 | //Draw a card |
| 229 | case 0x40:{ |
| 230 | int bgColor = (data&0x10)?GIC_RED:GIC_BLACK; |
| 231 | //upper rectangle |
| 232 | draw_char_right(currX,currUP, (data&0xF)+0x30,m_bitmap,bgColor); |
| 233 | //lower rectangle |
| 234 | draw_char_right(currX,currLOW,GIC_CLUB+((data&0x30)>>4),m_bitmap,bgColor); |
| 235 | }break; |
| 236 | |
| 237 | default:printf("gic unknown char! %02X\n",data); break; |
| 238 | } |
| 239 | } |
| 240 | } |
| 241 | |
| 242 | copybitmap( bitmap, m_bitmap, 0, 0, 0, 0, cliprect ); |
| 243 | return 0; |
| 244 | } |
| 245 | |
| 246 | /* AUDIO SECTION */ |
| 247 | |
| 248 | void gic_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) |
| 249 | { |
| 250 | switch ( id ) |
| 251 | { |
| 252 | case TIMER_VBLANK: |
| 253 | //flag the audio to reset |
| 254 | m_audioreset = 1;//phase need to reset! on next clock/228 |
| 255 | break; |
| 256 | } |
| 257 | } |
| 258 | |
| 259 | #define GIC_AUDIO_BYTE 0x96 |
| 260 | |
| 261 | void gic_device::sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples) |
| 262 | { |
| 263 | stream_sample_t *buffer = outputs[0]; |
| 264 | |
| 265 | //Audio is basic and badly implemented (doubt that was the intent) |
| 266 | //The datasheet list the 3 different frequencies the GIC can generate: 500,1000 and 2000Hz |
| 267 | //but it is clear (for an audio guy at least) that the resulting spectrum |
| 268 | //is not a pure square wav. In fact, the counter is reset on vertical sync! |
| 269 | //http://twitter.com/plgDavid/status/527269086016077825 |
| 270 | //...thus creating a buzzing sound. |
| 271 | |
| 272 | //Dumping the audio pin value each time |
| 273 | // either (PHI2 made a 0->1 transition (1.789MHz) |
| 274 | // or (PHI1 made a 1->1 transition (1.789MHz) |
| 275 | //I found that the granularity of audio transitions |
| 276 | //(including phase resets and silences) was 228 clocks |
| 277 | //The audio subsystem thus runs at 1.789MHz/228 = 7849.88Hz |
| 278 | |
| 279 | //when 1 |
| 280 | //normal period:912 clocks (228*4) |
| 281 | //hi for 456 clocks |
| 282 | //lo for 456 clocks |
| 283 | //reset period: (each frame) |
| 284 | //hi for 228 clocks |
| 285 | //lo for 456 clocks |
| 286 | //when 2 |
| 287 | //normal period lasts 1824 clocks (228*8) |
| 288 | //hi for 912 clocks |
| 289 | //lo for 912 clocks |
| 290 | //reset period: (each frame) |
| 291 | //hi for 912 (228*4) |
| 292 | //lo for 1596 (228*7) |
| 293 | //hi for 912 (228*4) |
| 294 | //when 4 |
| 295 | //normal period lasts 3648 clocks (228*16) |
| 296 | //hi for 1824(228*8) |
| 297 | //lo for 1824(228*8) |
| 298 | //Reset period: |
| 299 | //lo for 1824(228*8) |
| 300 | //hi for 2508(228*11) |
| 301 | //lo for 1824(228*8) |
| 302 | //hi for 1824(228*8) |
| 303 | |
| 304 | if(!m_ram) return; |
| 305 | |
| 306 | UINT8 audioByte = m_ram[GIC_AUDIO_BYTE]*2; |
| 307 | |
| 308 | if(!audioByte){ |
| 309 | for(size_t i = 0; i < samples; i++) |
| 310 | *buffer++ = 0; |
| 311 | |
| 312 | m_audioval = 0; |
| 313 | m_audiocnt = 0; |
| 314 | m_audioreset = 0; |
| 315 | return;//early |
| 316 | } |
| 317 | |
| 318 | //forced resynch @ 59.95Hz |
| 319 | if(m_audioreset){ |
| 320 | m_audioval = 0;//forced low |
| 321 | m_audiocnt = 0; |
| 322 | m_audioreset = 0; |
| 323 | } |
| 324 | |
| 325 | for(size_t i=0; i < samples; i++){ |
| 326 | m_audiocnt++; |
| 327 | if(m_audiocnt >= audioByte){ |
| 328 | m_audioval = !m_audioval; |
| 329 | m_audiocnt=0; |
| 330 | } |
| 331 | *buffer++ = m_audioval<<13; |
| 332 | } |
| 333 | } |
trunk/src/mame/video/hng64.c
| r249940 | r249941 | |
|---|
| 168 | 168 | { |
| 169 | 169 | hng64_mark_tile_dirty(3, offset&0x3fff); |
| 170 | 170 | } |
| 171 | | // Offsets 0x40000 - 0x58000 are for "floor" scanline control |
| 172 | | |
| 171 | // Offsets 0x40000 - 0x58000 are for "floor" scanline control |
| 172 | |
| 173 | 173 | /* 400000 - 7fffff is scroll regs etc. */ |
| 174 | 174 | } |
| 175 | 175 | |
| r249940 | r249941 | |
|---|
| 435 | 435 | { |
| 436 | 436 | blit_parameters blit; |
| 437 | 437 | |
| 438 | | // notes: |
| 439 | | // - startx and starty MUST be UINT32 for calculations to work correctly |
| 440 | | // - srcbitmap->width and height are assumed to be a power of 2 to speed up wraparound |
| 438 | // notes: |
| 439 | // - startx and starty MUST be UINT32 for calculations to work correctly |
| 440 | // - srcbitmap->width and height are assumed to be a power of 2 to speed up wraparound |
| 441 | 441 | |
| 442 | 442 | // skip if disabled |
| 443 | 443 | //if (!tmap->enable) |
| r249940 | r249941 | |
|---|
| 474 | 474 | * -------+-1098-7654-3210-9876-5432-1098-7654-3210-+---------------- |
| 475 | 475 | * 0 | ---- -Cdd ---- -??Z ---- ---- ---- ---- | C = global complex zoom |
| 476 | 476 | | 0000 0011 - road edge alt 1 | dd = global tilemap dimension selector |
| 477 | | | 0000 0111 - road edge alt 2 | ? = Always Set? |
| 477 | | 0000 0111 - road edge alt 2 | ? = Always Set? |
| 478 | 478 | | | Z = Global Zoom Disable? |
| 479 | 479 | * 1 | oooo oooo oooo oooo ---- ---- ---- ---- | unknown - 0001 is a popular value. Explore. |
| 480 | 480 | * 1 | ---- ---- ---- ---- oooo oooo oooo oooo | unknown - untouched in sams64 games, initialized elsewhere |
| r249940 | r249941 | |
|---|
| 514 | 514 | // b = 4bpp/8bpp (seems correct) (beast busters, samsh64, sasm64 2, xrally switch it for some screens) |
| 515 | 515 | // r = tile size (seems correct) |
| 516 | 516 | // e = tilemap enable bit according to sams64_2 |
| 517 | | // z = z depth/priority? tilemaps might also be affected by min / max clip values somewhere? |
| 517 | // z = z depth/priority? tilemaps might also be affected by min / max clip values somewhere? |
| 518 | 518 | // (debug layer on buriki has priority 0x020, which would be highest) |
| 519 | 519 | */ |
| 520 | 520 | |
| 521 | 521 | |
| 522 | 522 | void hng64_state::hng64_drawtilemap(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect, int tm) |
| 523 | 523 | { |
| 524 | | // Useful bits from the global tilemap flags |
| 525 | | const UINT32& global_tileregs = m_videoregs[0x00]; |
| 524 | // Useful bits from the global tilemap flags |
| 525 | const UINT32& global_tileregs = m_videoregs[0x00]; |
| 526 | 526 | const int global_dimensions = (global_tileregs & 0x03000000) >> 24; |
| 527 | | const int global_alt_scroll_register_format = global_tileregs & 0x04000000; |
| 528 | | const int global_zoom_disable = global_tileregs & 0x00010000; |
| 529 | | |
| 530 | | // Debug blending on/off based on m_additive_tilemap_debug |
| 531 | | int debug_blend_enabled = 0; |
| 527 | const int global_alt_scroll_register_format = global_tileregs & 0x04000000; |
| 528 | const int global_zoom_disable = global_tileregs & 0x00010000; |
| 529 | |
| 530 | // Debug blending on/off based on m_additive_tilemap_debug |
| 531 | int debug_blend_enabled = 0; |
| 532 | 532 | if ((m_additive_tilemap_debug&(1 << tm))) |
| 533 | 533 | debug_blend_enabled = 1; |
| 534 | 534 | |
| r249940 | r249941 | |
|---|
| 537 | 537 | popmessage("unsupported global_dimensions on tilemaps"); |
| 538 | 538 | #endif |
| 539 | 539 | |
| 540 | | // Determine which tilemap registers and scroll base this tilemap uses |
| 541 | | UINT16 tileregs = 0; |
| 542 | | UINT16 scrollbase = 0; |
| 540 | // Determine which tilemap registers and scroll base this tilemap uses |
| 541 | UINT16 tileregs = 0; |
| 542 | UINT16 scrollbase = 0; |
| 543 | 543 | if (tm==0) |
| 544 | 544 | { |
| 545 | 545 | scrollbase = (m_videoregs[0x04]&0x3fff0000)>>16; |
| r249940 | r249941 | |
|---|
| 561 | 561 | tileregs = (m_videoregs[0x03]&0x0000ffff)>>0; |
| 562 | 562 | } |
| 563 | 563 | |
| 564 | | // Useful bits from the tilemap registers |
| 565 | | const UINT8 mosaicValueBits = (tileregs & 0xf000) >> 12; (void)mosaicValueBits; |
| 566 | | const UINT8 floorModeBit = (tileregs & 0x0800) >> 11; |
| 567 | | const UINT8 bppBit = (tileregs & 0x0400) >> 10; |
| 568 | | const UINT8 bigTilemapBit = (tileregs & 0x0200) >> 9; |
| 569 | | const UINT8 tilemapEnableBit = (tileregs & 0x0040) >> 6; (void)tilemapEnableBit; |
| 570 | | |
| 571 | | // Tilemap drawing enable (sams64_2 demo mode says this is legit) |
| 572 | | //if (!tilemapEnableBit) |
| 573 | | //{ |
| 574 | | // return; |
| 575 | | //} |
| 576 | | |
| 577 | | // Select the proper tilemap size |
| 578 | | tilemap_t* tilemap = NULL; |
| 564 | // Useful bits from the tilemap registers |
| 565 | const UINT8 mosaicValueBits = (tileregs & 0xf000) >> 12; (void)mosaicValueBits; |
| 566 | const UINT8 floorModeBit = (tileregs & 0x0800) >> 11; |
| 567 | const UINT8 bppBit = (tileregs & 0x0400) >> 10; |
| 568 | const UINT8 bigTilemapBit = (tileregs & 0x0200) >> 9; |
| 569 | const UINT8 tilemapEnableBit = (tileregs & 0x0040) >> 6; (void)tilemapEnableBit; |
| 570 | |
| 571 | // Tilemap drawing enable (sams64_2 demo mode says this is legit) |
| 572 | //if (!tilemapEnableBit) |
| 573 | //{ |
| 574 | // return; |
| 575 | //} |
| 576 | |
| 577 | // Select the proper tilemap size |
| 578 | tilemap_t* tilemap = NULL; |
| 579 | 579 | if (global_dimensions==0) |
| 580 | 580 | { |
| 581 | 581 | if (bigTilemapBit) tilemap = m_tilemap[tm].m_tilemap_16x16; |
| r249940 | r249941 | |
|---|
| 588 | 588 | } |
| 589 | 589 | |
| 590 | 590 | // Set the transmask so our manual copy is correct |
| 591 | | int transmask = 0x00; |
| 591 | int transmask = 0x00; |
| 592 | 592 | if (bppBit) |
| 593 | 593 | transmask = 0xff; |
| 594 | 594 | else |
| r249940 | r249941 | |
|---|
| 596 | 596 | |
| 597 | 597 | if (floorModeBit == 0x0000) |
| 598 | 598 | { |
| 599 | | // floor mode |
| 600 | | // life would be easier if the roz we're talking about for complex zoom wasn't setting this as well |
| 599 | // floor mode |
| 600 | // life would be easier if the roz we're talking about for complex zoom wasn't setting this as well |
| 601 | 601 | |
| 602 | | // fprintf(stderr, "Tilemap %d is a floor using :\n", tm); |
| 603 | | const UINT32 floorAddress = 0x40000 + (scrollbase << 4); |
| 602 | // fprintf(stderr, "Tilemap %d is a floor using :\n", tm); |
| 603 | const UINT32 floorAddress = 0x40000 + (scrollbase << 4); |
| 604 | 604 | |
| 605 | | // TODO: The row count is correct, but how is this layer clipped? m_tcram? |
| 606 | | |
| 607 | | // See how many lines we have in the data region |
| 608 | | // DEBUG: Change this to a loop that goes over each line and draws them - it's just for visualization now |
| 609 | | //int lineCount = 0; |
| 610 | | //for (int ii = 0; ii < 0x2000/4; ii += 4) |
| 611 | | //{ |
| 612 | | // const int realAddress = floorAddress/4; |
| 613 | | // if (m_videoram[realAddress+ii] == 0xffffff00 && m_videoram[realAddress+ii+1] == 0xffffff00) |
| 614 | | // continue; |
| 615 | | // if (m_videoram[realAddress+ii] == 0x00000000 && m_videoram[realAddress+ii+1] == 0x00000000) |
| 616 | | // continue; |
| 617 | | // |
| 618 | | // lineCount++; |
| 619 | | //} |
| 620 | | //printf("lines %d\n", lineCount); |
| 605 | // TODO: The row count is correct, but how is this layer clipped? m_tcram? |
| 621 | 606 | |
| 622 | | // Buriki uses a 2x mosaic effect on its floor, so its line count is half |
| 623 | | // (but so does fatfurwa - maybe it overdraws a bunch of pixels?) |
| 624 | | //if (m_mcu_type == BURIKI_MCU) |
| 625 | | // lineCount *= 2; |
| 607 | // See how many lines we have in the data region |
| 608 | // DEBUG: Change this to a loop that goes over each line and draws them - it's just for visualization now |
| 609 | //int lineCount = 0; |
| 610 | //for (int ii = 0; ii < 0x2000/4; ii += 4) |
| 611 | //{ |
| 612 | // const int realAddress = floorAddress/4; |
| 613 | // if (m_videoram[realAddress+ii] == 0xffffff00 && m_videoram[realAddress+ii+1] == 0xffffff00) |
| 614 | // continue; |
| 615 | // if (m_videoram[realAddress+ii] == 0x00000000 && m_videoram[realAddress+ii+1] == 0x00000000) |
| 616 | // continue; |
| 617 | // |
| 618 | // lineCount++; |
| 619 | //} |
| 620 | //printf("lines %d\n", lineCount); |
| 626 | 621 | |
| 627 | | // DEBUG - draw a horizontal green line where the uppermost line of the floor is drawn |
| 628 | | const rectangle &visarea = screen.visible_area(); |
| 629 | | //if (lineCount < visarea.height()) |
| 630 | | //{ |
| 631 | | // for (int ii = 0; ii < visarea.width(); ii++) |
| 632 | | // bitmap.pix32((visarea.height()-lineCount), ii) = 0xff00ff00; |
| 633 | | //} |
| 634 | | |
| 635 | | // HACK : Clear RAM - this is "needed" in fatfurwa since it doesn't clear its own ram (buriki does) |
| 636 | | // Figure out what the difference between the two programs is. It's possible writing to |
| 637 | | // the linescroll ram fills a buffer and it's cleared automatically between frames? |
| 638 | | for (int ii = 0; ii < 0x2000/4; ii++) |
| 639 | | { |
| 640 | | const int realAddress = floorAddress/4; |
| 641 | | m_videoram[realAddress+ii] = 0x00000000; |
| 642 | | } |
| 643 | | |
| 644 | | |
| 645 | | // Floor mode - per pixel simple / complex modes? -- every other line? |
| 622 | // Buriki uses a 2x mosaic effect on its floor, so its line count is half |
| 623 | // (but so does fatfurwa - maybe it overdraws a bunch of pixels?) |
| 624 | //if (m_mcu_type == BURIKI_MCU) |
| 625 | // lineCount *= 2; |
| 626 | |
| 627 | // DEBUG - draw a horizontal green line where the uppermost line of the floor is drawn |
| 628 | const rectangle &visarea = screen.visible_area(); |
| 629 | //if (lineCount < visarea.height()) |
| 630 | //{ |
| 631 | // for (int ii = 0; ii < visarea.width(); ii++) |
| 632 | // bitmap.pix32((visarea.height()-lineCount), ii) = 0xff00ff00; |
| 633 | //} |
| 634 | |
| 635 | // HACK : Clear RAM - this is "needed" in fatfurwa since it doesn't clear its own ram (buriki does) |
| 636 | // Figure out what the difference between the two programs is. It's possible writing to |
| 637 | // the linescroll ram fills a buffer and it's cleared automatically between frames? |
| 638 | for (int ii = 0; ii < 0x2000/4; ii++) |
| 639 | { |
| 640 | const int realAddress = floorAddress/4; |
| 641 | m_videoram[realAddress+ii] = 0x00000000; |
| 642 | } |
| 643 | |
| 644 | |
| 645 | // Floor mode - per pixel simple / complex modes? -- every other line? |
| 646 | 646 | // (there doesn't seem to be enough data in Buriki for every line at least) |
| 647 | 647 | rectangle clip = visarea; |
| 648 | 648 | |
| r249940 | r249941 | |
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| 650 | 650 | { |
| 651 | 651 | // Logic would dictate that this should be the 'complex' scroll register layout, |
| 652 | 652 | // but per-line. That doesn't work however. |
| 653 | | // |
| 653 | // |
| 654 | 654 | // You only have line data for the number of lines on the screen, not enough for |
| 655 | 655 | // the complex register layout |
| 656 | | // |
| 656 | // |
| 657 | 657 | // HOWEVER, using the code below doesn't work either. This might be because |
| 658 | 658 | // they have mosaic turned on, and it adopts a new meaning in linescroll modes? |
| 659 | | // |
| 659 | // |
| 660 | 660 | // The code below could also be wrong, and rowscroll simply acts the same in all |
| 661 | 661 | // modes, this is hard to know because ss64_2 barely uses it. |
| 662 | | // |
| 662 | // |
| 663 | 663 | // buriki line data is at 20146000 (physical) |
| 664 | 664 | |
| 665 | 665 | #if HNG64_VIDEO_DEBUG |
| r249940 | r249941 | |
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| 668 | 668 | } |
| 669 | 669 | else // 'simple' mode with linescroll, used in some ss64_2 levels (assumed to be correct, but doesn't do much with it.. so could be wrong) |
| 670 | 670 | { |
| 671 | | INT32 xtopleft, xmiddle; |
| 672 | | INT32 ytopleft, ymiddle; |
| 673 | | |
| 671 | INT32 xtopleft, xmiddle; |
| 672 | INT32 ytopleft, ymiddle; |
| 673 | |
| 674 | 674 | for (int line=0; line < 448; line++) |
| 675 | 675 | { |
| 676 | 676 | clip.min_y = clip.max_y = line; |
| r249940 | r249941 | |
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| 913 | 913 | |
| 914 | 914 | UINT32 hng64_state::screen_update_hng64(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 915 | 915 | { |
| 916 | | |
| 917 | 916 | #if 1 |
| 918 | 917 | // press in sams64_2 attract mode for a nice debug screen from the game |
| 919 | 918 | // not sure how functional it is, and it doesn't appear to test everything (rowscroll modes etc.) |
| r249940 | r249941 | |
|---|
| 939 | 938 | #endif |
| 940 | 939 | |
| 941 | 940 | |
| 942 | | // Initialize some buffers |
| 941 | // Initialize some buffers |
| 943 | 942 | bitmap.fill(m_tcram[0x50/4] & 0x10000 ? m_palette->black_pen() : m_palette->pen(0), cliprect); //FIXME: Is the register correct? check with HW tests |
| 944 | 943 | screen.priority().fill(0x00, cliprect); |
| 945 | 944 | |
| 946 | | // If the screen is disabled, don't draw anything (m_screen_dis is a shady variable at best) |
| 945 | // If the screen is disabled, don't draw anything (m_screen_dis is a shady variable at best) |
| 947 | 946 | if (m_screen_dis) |
| 948 | 947 | return 0; |
| 949 | 948 | |
| 950 | 949 | // If the auto-animation mask or bits have changed search for tiles using them and mark as dirty |
| 951 | | const UINT32 animmask = m_videoregs[0x0b]; |
| 950 | const UINT32 animmask = m_videoregs[0x0b]; |
| 952 | 951 | const UINT32 animbits = m_videoregs[0x0c]; |
| 953 | 952 | if ((m_old_animmask != animmask) || (m_old_animbits != animbits)) |
| 954 | 953 | { |
| r249940 | r249941 | |
|---|
| 977 | 976 | m_old_animbits = animbits; |
| 978 | 977 | } |
| 979 | 978 | |
| 980 | | // If any magic bits have been touched, mark every tilemap dirty |
| 981 | | UINT16 tileflags[4]; |
| 982 | | tileflags[0] = m_videoregs[0x02] >> 16; |
| 979 | // If any magic bits have been touched, mark every tilemap dirty |
| 980 | UINT16 tileflags[4]; |
| 981 | tileflags[0] = m_videoregs[0x02] >> 16; |
| 983 | 982 | tileflags[1] = m_videoregs[0x02] & 0xffff; |
| 984 | 983 | tileflags[2] = m_videoregs[0x03] >> 16; |
| 985 | 984 | tileflags[3] = m_videoregs[0x03] & 0xffff; |
| 986 | | const UINT16 IMPORTANT_DIRTY_TILEFLAG_MASK = 0x0600; |
| 985 | const UINT16 IMPORTANT_DIRTY_TILEFLAG_MASK = 0x0600; |
| 987 | 986 | for (int i = 0; i < 4; i++) |
| 988 | 987 | { |
| 989 | 988 | if ((m_old_tileflags[i] & IMPORTANT_DIRTY_TILEFLAG_MASK) != (tileflags[i] & IMPORTANT_DIRTY_TILEFLAG_MASK)) |
| r249940 | r249941 | |
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| 993 | 992 | } |
| 994 | 993 | } |
| 995 | 994 | |
| 996 | | // Draw the four tilemaps |
| 995 | // Draw the four tilemaps |
| 997 | 996 | hng64_drawtilemap(screen,bitmap,cliprect, 3); |
| 998 | 997 | hng64_drawtilemap(screen,bitmap,cliprect, 2); |
| 999 | 998 | hng64_drawtilemap(screen,bitmap,cliprect, 1); |
| r249940 | r249941 | |
|---|
| 1021 | 1020 | } |
| 1022 | 1021 | } |
| 1023 | 1022 | |
| 1024 | | // Draw the sprites on top of everything |
| 1023 | // Draw the sprites on top of everything |
| 1025 | 1024 | draw_sprites(screen, bitmap, cliprect); |
| 1026 | 1025 | |
| 1027 | | // Layer the global frame buffer operations on top of everything |
| 1028 | | // transition_control(bitmap, cliprect); |
| 1026 | // Layer the global frame buffer operations on top of everything |
| 1027 | // transition_control(bitmap, cliprect); |
| 1029 | 1028 | |
| 1030 | | |
| 1029 | |
| 1031 | 1030 | #if HNG64_VIDEO_DEBUG |
| 1032 | 1031 | if (0) |
| 1033 | 1032 | popmessage("%08x %08x %08x %08x %08x", m_spriteregs[0], m_spriteregs[1], m_spriteregs[2], m_spriteregs[3], m_spriteregs[4]); |
| r249940 | r249941 | |
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| 1036 | 1035 | popmessage("%08x %08x TR(%04x %04x %04x %04x) SB(%04x %04x %04x %04x) %08x %08x %08x %08x %08x AA(%08x %08x) %08x", |
| 1037 | 1036 | m_videoregs[0x00], |
| 1038 | 1037 | m_videoregs[0x01], |
| 1039 | | (m_videoregs[0x02]>>16)&0xffff, |
| 1040 | | (m_videoregs[0x02]>>0)&0xffff, // ss64_2 debug mode indicates that 0x0040 is enable! |
| 1041 | | (m_videoregs[0x03]>>16)&0xffff, // buriki agrees (debug data on text layer) xrally agress (pink layer) |
| 1042 | | (m_videoregs[0x03]>>0)&0xffff, // fatal fury doesn't (all backgrounds have it set) joy |
| 1043 | | (m_videoregs[0x04]>>16)&0xffff, |
| 1044 | | (m_videoregs[0x04]>>0)&0xffff, |
| 1045 | | (m_videoregs[0x05]>>16)&0xffff, |
| 1046 | | (m_videoregs[0x05]>>0)&0xffff, |
| 1038 | (m_videoregs[0x02]>>16)&0xffff, |
| 1039 | (m_videoregs[0x02]>>0)&0xffff, // ss64_2 debug mode indicates that 0x0040 is enable! |
| 1040 | (m_videoregs[0x03]>>16)&0xffff, // buriki agrees (debug data on text layer) xrally agress (pink layer) |
| 1041 | (m_videoregs[0x03]>>0)&0xffff, // fatal fury doesn't (all backgrounds have it set) joy |
| 1042 | (m_videoregs[0x04]>>16)&0xffff, |
| 1043 | (m_videoregs[0x04]>>0)&0xffff, |
| 1044 | (m_videoregs[0x05]>>16)&0xffff, |
| 1045 | (m_videoregs[0x05]>>0)&0xffff, |
| 1047 | 1046 | m_videoregs[0x06], |
| 1048 | 1047 | m_videoregs[0x07], |
| 1049 | 1048 | m_videoregs[0x08], |
| r249940 | r249941 | |
|---|
| 1107 | 1106 | popmessage("blend changed %02x", m_additive_tilemap_debug); |
| 1108 | 1107 | } |
| 1109 | 1108 | #endif |
| 1110 | | |
| 1109 | |
| 1111 | 1110 | return 0; |
| 1112 | 1111 | } |
| 1113 | 1112 | |