trunk/src/mame/machine/osborne1.c
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| 97 | 97 | |
| 98 | 98 | WRITE8_MEMBER( osborne1_state::osborne1_2000_w ) |
| 99 | 99 | { |
| 100 | #if 0 |
| 100 | 101 | /* Check whether regular RAM is enabled */ |
| 101 | 102 | if ( !m_bank2_enabled || (m_in_irq_handler && m_bankswitch == RAMMODE) ) |
| 102 | 103 | { |
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| 119 | 120 | if ( 0xC00 == (offset & 0xC00) ) /* Video PIA */ |
| 120 | 121 | m_pia1->write(space, offset & 0x03, data); |
| 121 | 122 | } |
| 123 | #else |
| 124 | // This code is a nasty hack that doesn't reflect hardware operation, |
| 125 | // but it gets us by while the bank selection implementation is inadequate |
| 126 | if ( ! m_bank2_enabled ) |
| 127 | { |
| 128 | m_ram->pointer()[ 0x2000 + offset ] = data; |
| 129 | } |
| 130 | else |
| 131 | { |
| 132 | if ( m_in_irq_handler && m_bankswitch == RAMMODE ) |
| 133 | { |
| 134 | m_ram->pointer()[ 0x2000 + offset ] = data; |
| 135 | } |
| 136 | /* Handle writes to the I/O area */ |
| 137 | switch( offset & 0x1F00 ) |
| 138 | { |
| 139 | case 0x100: /* Floppy */ |
| 140 | m_fdc->write(space, offset & 0x03, data); |
| 141 | break; |
| 142 | case 0x400: /* SCREEN-PAC */ |
| 143 | m_resolution = data & 0x01; |
| 144 | m_hc_left = (data >> 1) & 0x01; |
| 145 | break; |
| 146 | case 0x900: /* IEEE488 PIA */ |
| 147 | m_pia0->write(space, offset & 0x03, data ); |
| 148 | break; |
| 149 | case 0xA00: /* Serial */ |
| 150 | break; |
| 151 | case 0xC00: /* Video PIA */ |
| 152 | m_pia1->write(space, offset & 0x03, data ); |
| 153 | break; |
| 154 | } |
| 155 | } |
| 156 | #endif |
| 122 | 157 | } |
| 123 | 158 | |
| 124 | 159 | |
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| 393 | 428 | |
| 394 | 429 | void osborne1_state::machine_reset() |
| 395 | 430 | { |
| 396 | | address_space& space = m_maincpu->space(AS_PROGRAM); |
| 397 | 431 | /* Initialize memory configuration */ |
| 398 | | osborne1_bankswitch_w( space, 0x00, 0 ); |
| 432 | osborne1_bankswitch_w( m_maincpu->space(AS_IO), 0x00, 0 ); |
| 399 | 433 | |
| 400 | 434 | m_pia_0_irq_state = FALSE; |
| 401 | 435 | m_pia_1_irq_state = FALSE; |
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| 408 | 442 | |
| 409 | 443 | memset( m_ram->pointer() + 0x10000, 0xFF, 0x1000 ); |
| 410 | 444 | |
| 445 | address_space& space = m_maincpu->space(AS_PROGRAM); |
| 411 | 446 | space.set_direct_update_handler(direct_update_delegate(FUNC(osborne1_state::osborne1_opbase), this)); |
| 412 | 447 | } |
| 413 | 448 | |
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| 487 | 522 | osborne1_state *state = machine().driver_data<osborne1_state>(); |
| 488 | 523 | /* Enable ROM and I/O when IRQ is acknowledged */ |
| 489 | 524 | UINT8 old_bankswitch = state->m_bankswitch; |
| 490 | | address_space& space = state->m_maincpu->space(AS_PROGRAM); |
| 491 | 525 | |
| 492 | | state->osborne1_bankswitch_w( space, 0, 0 ); |
| 526 | state->osborne1_bankswitch_w( state->m_maincpu->space(AS_IO), 0, 0 ); |
| 493 | 527 | state->m_bankswitch = old_bankswitch; |
| 494 | 528 | state->m_in_irq_handler = 1; |
| 495 | 529 | return 0xF8; |