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r40631 Monday 7th September, 2015 at 15:32:04 UTC by R. Belmont
Merge pull request #312 from felipesanches/unitron_ap2ti Unitron APII+ TI: Fixing rom name and checksum and adding correct year metadata

[hash]	tutor.xml
[src/mame]	arcade.lst
[src/mame/drivers]	goldstar.c segaxbd.c
[src/mame/machine]	m2comm.c* m2comm.h* n64.c
[src/mess/drivers]	apple2e.c n64.c orao.c
[src/mess/includes]	orao.h
[src/mess/machine]	orao.c
[src/osd/modules/render]	drawogl.c

trunk/hash/tutor.xml

r249142	r249143
291	291	<info name="alt_title" value="Mr.DO!"/>
292	292	<info name="serial" value="019E"/>
293	293	<part name="cart" interface="tutor_cart">
294		<dataarea name="rom" size="8192">
295		<rom name="tomy 3l1.ic1.bin" size="8192" crc="1dfa3f4b" sha1="93d1c17c5edd44f27c28cde88a68f609b77feb0c" offset="0" />
	294	<dataarea name="rom" size="16384">
	295	<rom name="tomy 3l1.ic1.bin" size="16384" crc="1dfa3f4b" sha1="93d1c17c5edd44f27c28cde88a68f609b77feb0c" offset="0" />
296	296	</dataarea>
297	297	</part>
298	298	</software>

trunk/src/mame/arcade.lst

r249142	r249143
4802	4802	rachero         // 1990.?? Racing Hero (World, FD1094)
4803	4803	abcop           // 1990.?? A.B.Cop (World, FD1094)
4804	4804	abcopj          // 1991.01 A.B.Cop (Japan, FD1094)
4805		gpriderj        // 1990.10 GP Rider (Japan, FD1094)
4806		gprider         // 1990.?? GP Rider (World, FD1094)
4807		gpridert      // as above
4808		gprideru        // 1990.12 GP Rider (US, FD1094)
	4805	gpriderjs       // 1990.10 GP Rider (Japan, FD1094)
	4806	gpriderj      // as above
	4807	gpriders        // 1990.?? GP Rider (World, FD1094)
	4808	gprider          // as above
	4809	gpriderus       // 1990.12 GP Rider (US, FD1094)
	4810	gprideru       // as above
4809	4811	rascot          // 1991.?? Royal Ascot (Japan)
4810	4812
4811	4813

trunk/src/mame/drivers/goldstar.c

r249142	r249143
1741	1741	PORT_INCLUDE( cmv4_service )
1742	1742
1743	1743	PORT_START("DSW1")
1744		PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unused ) )   PORT_DIPLOCATION("DSW1:1")  /* OK */
	1744	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unused ) )           PORT_DIPLOCATION("DSW1:1")  /* OK */
1745	1745	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
1746	1746	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1747		PORT_DIPNAME( 0x02, 0x02, "Hopper Out Switch" ) PORT_DIPLOCATION("DSW1:2")  /* OK */
	1747	PORT_DIPNAME( 0x02, 0x02, "Hopper Out Switch" )         PORT_DIPLOCATION("DSW1:2")  /* OK */
1748	1748	PORT_DIPSETTING(    0x02, "Active Low" )
1749	1749	PORT_DIPSETTING(    0x00, "Active High" )
1750		PORT_DIPNAME( 0x04, 0x00, "Payout Mode" )       PORT_DIPLOCATION("DSW1:3")  /* OK */
	1750	PORT_DIPNAME( 0x04, 0x00, "Payout Mode" )               PORT_DIPLOCATION("DSW1:3")  /* OK */
1751	1751	PORT_DIPSETTING(    0x04, "Payout Switch" )
1752	1752	PORT_DIPSETTING(    0x00, "Automatic" )
1753		PORT_DIPNAME( 0x08, 0x00, "W-UP '7'" )          PORT_DIPLOCATION("DSW1:4")  /* not checked */
1754		PORT_DIPSETTING(    0x08, "Loss" )
1755		PORT_DIPSETTING(    0x00, "Even" )
1756		PORT_DIPNAME( 0x10, 0x00, "W-UP Pay Rate" )     PORT_DIPLOCATION("DSW1:5")  /* OK */
	1753	PORT_DIPNAME( 0x08, 0x00, "'7' In Double Up Game" )     PORT_DIPLOCATION("DSW1:4")  /* OK */
	1754	PORT_DIPSETTING(    0x08, "Even" )
	1755	PORT_DIPSETTING(    0x00, "Loss" )
	1756	PORT_DIPNAME( 0x10, 0x00, "Double Up Game Pay Rate" )   PORT_DIPLOCATION("DSW1:5")  /* OK */
1757	1757	PORT_DIPSETTING(    0x00, "80%" )
1758	1758	PORT_DIPSETTING(    0x10, "90%" )
1759		PORT_DIPNAME( 0x20, 0x00, "W-UP Game" )         PORT_DIPLOCATION("DSW1:6")  /* OK */
	1759	PORT_DIPNAME( 0x20, 0x00, "Double Up Game" )            PORT_DIPLOCATION("DSW1:6")  /* OK */
1760	1760	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
1761	1761	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1762		PORT_DIPNAME( 0xc0, 0xc0, "Bet Max" )           PORT_DIPLOCATION("DSW1:7,8")    /* OK */
	1762	PORT_DIPNAME( 0xc0, 0xc0, "Bet Max" )                   PORT_DIPLOCATION("DSW1:7,8")    /* OK */
1763	1763	PORT_DIPSETTING(    0x00, "8" )
1764	1764	PORT_DIPSETTING(    0x40, "16" )
1765	1765	PORT_DIPSETTING(    0x80, "32" )
r249142	r249143
1787	1787
1788	1788	PORT_INCLUDE( cmv4_dsw5 )
1789	1789	PORT_MODIFY("DSW5")
1790		PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )  PORT_DIPLOCATION("DSW5:1")  /* normally Display of Doll On Demo, but no whores in this set */
	1790	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )              PORT_DIPLOCATION("DSW5:1")  /* normally Display of Doll On Demo, but no whores in this set */
1791	1791	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
1792	1792	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1793	1793	/* Coin In Limit OK */
1794	1794	/* Condition For 3 Kind Of Bonus not checked */
1795		PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )  PORT_DIPLOCATION("DSW5:6")  /* normally Display Of Doll At All Fr. Bonus, but no whores in this set */
1796		PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
1797		PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1798		PORT_DIPNAME( 0x40, 0x40, "Skill Stop" )        PORT_DIPLOCATION("DSW5:7")  /* OK */
	1795	PORT_DIPNAME( 0x20, 0x20, "Show Odds In Double Up Game" )   PORT_DIPLOCATION("DSW5:6")  /* OK */
	1796	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1797	PORT_DIPSETTING(    0x20, DEF_STR( On ) )
	1798	PORT_DIPNAME( 0x40, 0x40, "Skill Stop" )                    PORT_DIPLOCATION("DSW5:7")  /* OK */
1799	1799	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
1800	1800	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1801		PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )  PORT_DIPLOCATION("DSW5:8")  /* normally Test Mode For Disp. Of Doll, but no whores in this set */
	1801	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )              PORT_DIPLOCATION("DSW5:8")  /* normally Test Mode For Disp. Of Doll, but no whores in this set */
1802	1802	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
1803	1803	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1804	1804	INPUT_PORTS_END

trunk/src/mame/drivers/segaxbd.c

r249142	r249143
371	371	: segaxbd_new_state(mconfig, type, tag),
372	372	m_subpcb(*this, "subpcb")
373	373	{
374		for (int i = 0; i < 0x10; i++)
	374	for (int i = 0; i < 0x800; i++)
375	375	{
376		shareram1[i] = 0x00;
377		shareram2[i] = 0x00;
	376	shareram[i] = 0x0000;
378	377	}
	378	rampage1 = 0x0000;
	379	rampage2 = 0x0000;
379	380	}
380	381
381
382	382	required_device<segaxbd_state> m_subpcb;
383	383
384		DECLARE_READ16_MEMBER(shareram1_r) { return shareram1[offset]; }
385		DECLARE_WRITE16_MEMBER(shareram1_w) { COMBINE_DATA(&shareram1[offset]); }
386		DECLARE_READ16_MEMBER(shareram2_r) { return shareram2[offset]; }
387		DECLARE_WRITE16_MEMBER(shareram2_w) {COMBINE_DATA(&shareram2[offset]); }
	384	DECLARE_READ16_MEMBER(shareram1_r) {
	385	if (offset < 0x10) {
	386	int address = (rampage1 << 4) + offset;
	387	return shareram[address];
	388	}
	389	return 0xffff;
	390	}
	391	DECLARE_WRITE16_MEMBER(shareram1_w) {
	392	if (offset < 0x10) {
	393	int address = (rampage1 << 4) + offset;
	394	COMBINE_DATA(&shareram[address]);
	395	} else if (offset == 0x10) {
	396	rampage1 = data & 0x00FF;
	397	}
	398	}
	399	DECLARE_READ16_MEMBER(shareram2_r) {
	400	if (offset < 0x10) {
	401	int address = (rampage2 << 4) + offset;
	402	return shareram[address];
	403	}
	404	return 0xffff;
	405	}
	406	DECLARE_WRITE16_MEMBER(shareram2_w) {
	407	if (offset < 0x10) {
	408	int address = (rampage2 << 4) + offset;
	409	COMBINE_DATA(&shareram[address]);
	410	} else if (offset == 0x10) {
	411	rampage2 = data & 0x007F;
	412	}
	413	}
388	414
389	415	DECLARE_DRIVER_INIT(gprider_double);
390	416
391
392		UINT16 shareram1[0x20];
393		UINT16 shareram2[0x20];
	417	UINT16 shareram[0x800];
	418	UINT16 rampage1;
	419	UINT16 rampage2;
394	420	};
395	421
396	422	//**************************************************************************
r249142	r249143
3362	3388	//  Custom Chip 315-5304 (IC 127)
3363	3389	//  IC BD Number: 834-7626-03 (roms are "MPR") / 834-7626-05 (roms are "EPR")
3364	3390	//
3365		ROM_START( gprider )
	3391	ROM_START( gpriders )
3366	3392	ROM_REGION( 0x80000, "mainpcb:maincpu", 0 ) // 68000 code
3367	3393	ROM_LOAD16_BYTE( "epr-13409.ic58", 0x00000, 0x20000, CRC(9abb81b6) SHA1(f6308f3ec99ee66677e86f6a915e4dff8557d25f) )
3368	3394	ROM_LOAD16_BYTE( "epr-13408.ic63", 0x00001, 0x20000, CRC(8e410e97) SHA1(2021d738064e57d175b59ba053d9ee35ed4516c8) )
r249142	r249143
3412	3438	ROM_END
3413	3439
3414	3440	// Twin setup
3415		ROM_START( gpridert )
	3441	ROM_START( gprider )
3416	3442	ROM_REGION( 0x80000, "mainpcb:maincpu", 0 ) // 68000 code
3417	3443	ROM_LOAD16_BYTE( "epr-13409.ic58", 0x00000, 0x20000, CRC(9abb81b6) SHA1(f6308f3ec99ee66677e86f6a915e4dff8557d25f) )
3418	3444	ROM_LOAD16_BYTE( "epr-13408.ic63", 0x00001, 0x20000, CRC(8e410e97) SHA1(2021d738064e57d175b59ba053d9ee35ed4516c8) )
r249142	r249143
3515	3541	//  Custom Chip 315-5304 (IC 127)
3516	3542	//  IC BD Number: 834-7626-01 (roms are "MPR") / 834-7626-04 (roms are "EPR")
3517	3543	//
	3544	ROM_START( gpriderus )
	3545	ROM_REGION( 0x80000, "mainpcb:maincpu", 0 ) // 68000 code
	3546	ROM_LOAD16_BYTE( "epr-13407.ic58", 0x00000, 0x20000, CRC(03553ebd) SHA1(041a71a2dce2ad56360f500cb11e29a629020160) )
	3547	ROM_LOAD16_BYTE( "epr-13406.ic63", 0x00001, 0x20000, CRC(122c711f) SHA1(2bcc51347e771a7e7f770e68b24d82497d24aa2e) )
	3548
	3549	ROM_REGION( 0x2000, "mainpcb:maincpu:key", 0 )  // decryption key
	3550	ROM_LOAD( "317-0162.key", 0x0000, 0x2000, CRC(8067de53) SHA1(e8cd1dfbad94856c6bd51569557667e72f0a5dd4) )
	3551
	3552	ROM_REGION( 0x80000, "mainpcb:subcpu", 0 ) // 2nd 68000 code
	3553	ROM_LOAD16_BYTE( "epr-13395.ic20", 0x00000, 0x20000,CRC(d6ccfac7) SHA1(9287ab08600163a0d9bd33618c629f99391316bd) )
	3554	ROM_LOAD16_BYTE( "epr-13394.ic29", 0x00001, 0x20000,CRC(914a55ec) SHA1(84fe1df12478990418b46b6800425e5599e9eff9) )
	3555	ROM_LOAD16_BYTE( "epr-13393.ic21", 0x40000, 0x20000,CRC(08d023cc) SHA1(d008d57e494f484a1a84896065d53fb9b1d8d60e) )
	3556	ROM_LOAD16_BYTE( "epr-13392.ic30", 0x40001, 0x20000,CRC(f927cd42) SHA1(67eab328c1fb878fe3d086d0639f5051b135a037) )
	3557
	3558	ROM_REGION( 0x30000, "mainpcb:gfx1", 0 ) // tiles
	3559	ROM_LOAD( "epr-13383.ic154", 0x00000, 0x10000, CRC(24f897a7) SHA1(68ba17067d90f07bb5a549017be4773b33ae81d0) )
	3560	ROM_LOAD( "epr-13384.ic153", 0x10000, 0x10000, CRC(fe8238bd) SHA1(601910bd86536e6b08f5308b298c8f01fa60f233) )
	3561	ROM_LOAD( "epr-13385.ic152", 0x20000, 0x10000, CRC(6df1b995) SHA1(5aab19b87a9ef162c30ccf5974cb795e37dba91f) )
	3562
	3563	ROM_REGION32_LE( 0x200000, "mainpcb:sprites", 0 ) // sprites
	3564	ROM_LOAD32_BYTE( "epr-13382.ic90",  0x000000, 0x20000, CRC(01dac209) SHA1(4c6b03308193c472f6cdbcede306f8ce6db0cc4b) )
	3565	ROM_LOAD32_BYTE( "epr-13381.ic94",  0x000001, 0x20000, CRC(3a50d931) SHA1(9d9cb1793f3b8f562ce0ea49f2afeef099f20859) )
	3566	ROM_LOAD32_BYTE( "epr-13380.ic98",  0x000002, 0x20000, CRC(ad1024c8) SHA1(86e941424b2e2e00940886e5daed640a78ed7403) )
	3567	ROM_LOAD32_BYTE( "epr-13379.ic102", 0x000003, 0x20000, CRC(1ac17625) SHA1(7aefd382041dd3f97936ecb8738a3f2c9780c58f) )
	3568	ROM_LOAD32_BYTE( "epr-13378.ic91",  0x080000, 0x20000, CRC(50c9b867) SHA1(dd9702b369ea8abd50da22ce721b7040428e9d4b) )
	3569	ROM_LOAD32_BYTE( "epr-13377.ic95",  0x080001, 0x20000, CRC(9b12f5c0) SHA1(2060420611b3354974c49bc80f556f945512570b) )
	3570	ROM_LOAD32_BYTE( "epr-13376.ic99",  0x080002, 0x20000, CRC(449ac518) SHA1(0438a72e53a7889d39ea7e2530e49a2594d97e90) )
	3571	ROM_LOAD32_BYTE( "epr-13375.ic103", 0x080003, 0x20000, CRC(5489a9ff) SHA1(c458cb55d957edae340535f54189438296f3ec2f) )
	3572	ROM_LOAD32_BYTE( "epr-13374.ic92",  0x100000, 0x20000, CRC(6a319e4f) SHA1(d9f92b15f4baa14745048073205add35b7d42d27) )
	3573	ROM_LOAD32_BYTE( "epr-13373.ic96",  0x100001, 0x20000, CRC(eca5588b) SHA1(11def0c293868193d457958fe7459fd8c31dbd2b) )
	3574	ROM_LOAD32_BYTE( "epr-13372.ic100", 0x100002, 0x20000, CRC(0b45a433) SHA1(82fa2b208eaf70b70524681fbc3ec70085e70d83) )
	3575	ROM_LOAD32_BYTE( "epr-13371.ic104", 0x100003, 0x20000, CRC(b68f4cff) SHA1(166f2a685cbc230c098fdc1646b6e632dd2b09dd) )
	3576	ROM_LOAD32_BYTE( "epr-13370.ic93",  0x180000, 0x20000, CRC(78276620) SHA1(2c4505c57a1e765f9cfd48fb1637d67d199a2f1d) )
	3577	ROM_LOAD32_BYTE( "epr-13369.ic97",  0x180001, 0x20000, CRC(8625bf0f) SHA1(0ae70bc0d54e25eecf4a11cf0600225dca35914d) )
	3578	ROM_LOAD32_BYTE( "epr-13368.ic101", 0x180002, 0x20000, CRC(0f50716c) SHA1(eb4c7f47e11c58fe0d58f67e6dafabc6291eabb8) )
	3579	ROM_LOAD32_BYTE( "epr-13367.ic105", 0x180003, 0x20000, CRC(4b1bb51f) SHA1(17fd5ac9e18dd6097a015e9d7b6815826f9c53f1) )
	3580
	3581	ROM_REGION( 0x10000, "mainpcb:gfx3", ROMREGION_ERASE00 ) // road gfx
	3582	// none??
	3583
	3584	ROM_REGION( 0x10000, "mainpcb:soundcpu", 0 ) // sound CPU
	3585	ROM_LOAD( "epr-13388.ic17",    0x00000, 0x10000, CRC(706581e4) SHA1(51c9dbf2bf0d6b8826de24cd33596f5c95136870) )
	3586
	3587	ROM_REGION( 0x80000, "mainpcb:pcm", ROMREGION_ERASEFF ) // Sega PCM sound data
	3588	ROM_LOAD( "epr-13391.ic11",    0x00000, 0x20000, CRC(8c30c867) SHA1(0d735291b1311890938f8a1143fae6af9feb2a69) )
	3589	ROM_LOAD( "epr-13390.ic12",    0x20000, 0x20000, CRC(8c93cd05) SHA1(bb08094abac6c104eddf14f634e9791f03122946) )
	3590	ROM_LOAD( "epr-13389.ic13",    0x40000, 0x20000, CRC(4e4c758e) SHA1(181750dfcdd6d5b28b063c980c251991163d9474) )
	3591	ROM_END
	3592
	3593	// twin setup
3518	3594	ROM_START( gprideru )
3519	3595	ROM_REGION( 0x80000, "mainpcb:maincpu", 0 ) // 68000 code
3520	3596	ROM_LOAD16_BYTE( "epr-13407.ic58", 0x00000, 0x20000, CRC(03553ebd) SHA1(041a71a2dce2ad56360f500cb11e29a629020160) )
r249142	r249143
3562	3638	ROM_LOAD( "epr-13391.ic11",    0x00000, 0x20000, CRC(8c30c867) SHA1(0d735291b1311890938f8a1143fae6af9feb2a69) )
3563	3639	ROM_LOAD( "epr-13390.ic12",    0x20000, 0x20000, CRC(8c93cd05) SHA1(bb08094abac6c104eddf14f634e9791f03122946) )
3564	3640	ROM_LOAD( "epr-13389.ic13",    0x40000, 0x20000, CRC(4e4c758e) SHA1(181750dfcdd6d5b28b063c980c251991163d9474) )
	3641
	3642	ROM_REGION( 0x80000, "subpcb:maincpu", 0 ) // 68000 code
	3643	ROM_LOAD16_BYTE( "epr-13407.ic58", 0x00000, 0x20000, CRC(03553ebd) SHA1(041a71a2dce2ad56360f500cb11e29a629020160) )
	3644	ROM_LOAD16_BYTE( "epr-13406.ic63", 0x00001, 0x20000, CRC(122c711f) SHA1(2bcc51347e771a7e7f770e68b24d82497d24aa2e) )
	3645
	3646	ROM_REGION( 0x2000, "subpcb:maincpu:key", 0 )  // decryption key
	3647	ROM_LOAD( "317-0162.key", 0x0000, 0x2000, CRC(8067de53) SHA1(e8cd1dfbad94856c6bd51569557667e72f0a5dd4) )
	3648
	3649	ROM_REGION( 0x80000, "subpcb:subcpu", 0 ) // 2nd 68000 code
	3650	ROM_LOAD16_BYTE( "epr-13395.ic20", 0x00000, 0x20000,CRC(d6ccfac7) SHA1(9287ab08600163a0d9bd33618c629f99391316bd) )
	3651	ROM_LOAD16_BYTE( "epr-13394.ic29", 0x00001, 0x20000,CRC(914a55ec) SHA1(84fe1df12478990418b46b6800425e5599e9eff9) )
	3652	ROM_LOAD16_BYTE( "epr-13393.ic21", 0x40000, 0x20000,CRC(08d023cc) SHA1(d008d57e494f484a1a84896065d53fb9b1d8d60e) )
	3653	ROM_LOAD16_BYTE( "epr-13392.ic30", 0x40001, 0x20000,CRC(f927cd42) SHA1(67eab328c1fb878fe3d086d0639f5051b135a037) )
	3654
	3655	ROM_REGION( 0x30000, "subpcb:gfx1", 0 ) // tiles
	3656	ROM_LOAD( "epr-13383.ic154", 0x00000, 0x10000, CRC(24f897a7) SHA1(68ba17067d90f07bb5a549017be4773b33ae81d0) )
	3657	ROM_LOAD( "epr-13384.ic153", 0x10000, 0x10000, CRC(fe8238bd) SHA1(601910bd86536e6b08f5308b298c8f01fa60f233) )
	3658	ROM_LOAD( "epr-13385.ic152", 0x20000, 0x10000, CRC(6df1b995) SHA1(5aab19b87a9ef162c30ccf5974cb795e37dba91f) )
	3659
	3660	ROM_REGION32_LE( 0x200000, "subpcb:sprites", 0 ) // sprites
	3661	ROM_LOAD32_BYTE( "epr-13382.ic90",  0x000000, 0x20000, CRC(01dac209) SHA1(4c6b03308193c472f6cdbcede306f8ce6db0cc4b) )
	3662	ROM_LOAD32_BYTE( "epr-13381.ic94",  0x000001, 0x20000, CRC(3a50d931) SHA1(9d9cb1793f3b8f562ce0ea49f2afeef099f20859) )
	3663	ROM_LOAD32_BYTE( "epr-13380.ic98",  0x000002, 0x20000, CRC(ad1024c8) SHA1(86e941424b2e2e00940886e5daed640a78ed7403) )
	3664	ROM_LOAD32_BYTE( "epr-13379.ic102", 0x000003, 0x20000, CRC(1ac17625) SHA1(7aefd382041dd3f97936ecb8738a3f2c9780c58f) )
	3665	ROM_LOAD32_BYTE( "epr-13378.ic91",  0x080000, 0x20000, CRC(50c9b867) SHA1(dd9702b369ea8abd50da22ce721b7040428e9d4b) )
	3666	ROM_LOAD32_BYTE( "epr-13377.ic95",  0x080001, 0x20000, CRC(9b12f5c0) SHA1(2060420611b3354974c49bc80f556f945512570b) )
	3667	ROM_LOAD32_BYTE( "epr-13376.ic99",  0x080002, 0x20000, CRC(449ac518) SHA1(0438a72e53a7889d39ea7e2530e49a2594d97e90) )
	3668	ROM_LOAD32_BYTE( "epr-13375.ic103", 0x080003, 0x20000, CRC(5489a9ff) SHA1(c458cb55d957edae340535f54189438296f3ec2f) )
	3669	ROM_LOAD32_BYTE( "epr-13374.ic92",  0x100000, 0x20000, CRC(6a319e4f) SHA1(d9f92b15f4baa14745048073205add35b7d42d27) )
	3670	ROM_LOAD32_BYTE( "epr-13373.ic96",  0x100001, 0x20000, CRC(eca5588b) SHA1(11def0c293868193d457958fe7459fd8c31dbd2b) )
	3671	ROM_LOAD32_BYTE( "epr-13372.ic100", 0x100002, 0x20000, CRC(0b45a433) SHA1(82fa2b208eaf70b70524681fbc3ec70085e70d83) )
	3672	ROM_LOAD32_BYTE( "epr-13371.ic104", 0x100003, 0x20000, CRC(b68f4cff) SHA1(166f2a685cbc230c098fdc1646b6e632dd2b09dd) )
	3673	ROM_LOAD32_BYTE( "epr-13370.ic93",  0x180000, 0x20000, CRC(78276620) SHA1(2c4505c57a1e765f9cfd48fb1637d67d199a2f1d) )
	3674	ROM_LOAD32_BYTE( "epr-13369.ic97",  0x180001, 0x20000, CRC(8625bf0f) SHA1(0ae70bc0d54e25eecf4a11cf0600225dca35914d) )
	3675	ROM_LOAD32_BYTE( "epr-13368.ic101", 0x180002, 0x20000, CRC(0f50716c) SHA1(eb4c7f47e11c58fe0d58f67e6dafabc6291eabb8) )
	3676	ROM_LOAD32_BYTE( "epr-13367.ic105", 0x180003, 0x20000, CRC(4b1bb51f) SHA1(17fd5ac9e18dd6097a015e9d7b6815826f9c53f1) )
	3677
	3678	ROM_REGION( 0x10000, "subpcb:gfx3", ROMREGION_ERASE00 ) // road gfx
	3679	// none??
	3680
	3681	ROM_REGION( 0x10000, "subpcb:soundcpu", 0 ) // sound CPU
	3682	ROM_LOAD( "epr-13388.ic17",    0x00000, 0x10000, CRC(706581e4) SHA1(51c9dbf2bf0d6b8826de24cd33596f5c95136870) )
	3683
	3684	ROM_REGION( 0x80000, "subpcb:pcm", ROMREGION_ERASEFF ) // Sega PCM sound data
	3685	ROM_LOAD( "epr-13391.ic11",    0x00000, 0x20000, CRC(8c30c867) SHA1(0d735291b1311890938f8a1143fae6af9feb2a69) )
	3686	ROM_LOAD( "epr-13390.ic12",    0x20000, 0x20000, CRC(8c93cd05) SHA1(bb08094abac6c104eddf14f634e9791f03122946) )
	3687	ROM_LOAD( "epr-13389.ic13",    0x40000, 0x20000, CRC(4e4c758e) SHA1(181750dfcdd6d5b28b063c980c251991163d9474) )
3565	3688	ROM_END
3566	3689
3567	3690	//*************************************************************************************************************************
r249142	r249143
3570	3693	//  Custom Chip 315-5304 (IC 127)
3571	3694	//  IC BD Number: 834-7626-01 (roms are "MPR") / 834-7626-04 (roms are "EPR")
3572	3695	//
	3696	ROM_START( gpriderjs )
	3697	ROM_REGION( 0x80000, "mainpcb:maincpu", 0 ) // 68000 code
	3698	ROM_LOAD16_BYTE( "epr-13387.ic58", 0x00000, 0x20000, CRC(a1e8b2c5) SHA1(22b70a9074263af808bb9dffee29cbcff7e304e3) )
	3699	ROM_LOAD16_BYTE( "epr-13386.ic63", 0x00001, 0x20000, CRC(d8be9e66) SHA1(d81c03b08fd6b971554b94e0adac131a1dcf3248) )
	3700
	3701	ROM_REGION( 0x2000, "mainpcb:maincpu:key", 0 )  // decryption key
	3702	ROM_LOAD( "317-0161.key", 0x0000, 0x2000, CRC(e38ddc16) SHA1(d1f7f261320cbc605b4f7e5a9c28f49af5471d87) )
	3703
	3704	ROM_REGION( 0x80000, "mainpcb:subcpu", 0 ) // 2nd 68000 code
	3705	ROM_LOAD16_BYTE( "epr-13395.ic20", 0x00000, 0x20000,CRC(d6ccfac7) SHA1(9287ab08600163a0d9bd33618c629f99391316bd) )
	3706	ROM_LOAD16_BYTE( "epr-13394.ic29", 0x00001, 0x20000,CRC(914a55ec) SHA1(84fe1df12478990418b46b6800425e5599e9eff9) )
	3707	ROM_LOAD16_BYTE( "epr-13393.ic21", 0x40000, 0x20000,CRC(08d023cc) SHA1(d008d57e494f484a1a84896065d53fb9b1d8d60e) )
	3708	ROM_LOAD16_BYTE( "epr-13392.ic30", 0x40001, 0x20000,CRC(f927cd42) SHA1(67eab328c1fb878fe3d086d0639f5051b135a037) )
	3709
	3710	ROM_REGION( 0x30000, "mainpcb:gfx1", 0 ) // tiles
	3711	ROM_LOAD( "epr-13383.ic154", 0x00000, 0x10000, CRC(24f897a7) SHA1(68ba17067d90f07bb5a549017be4773b33ae81d0) )
	3712	ROM_LOAD( "epr-13384.ic153", 0x10000, 0x10000, CRC(fe8238bd) SHA1(601910bd86536e6b08f5308b298c8f01fa60f233) )
	3713	ROM_LOAD( "epr-13385.ic152", 0x20000, 0x10000, CRC(6df1b995) SHA1(5aab19b87a9ef162c30ccf5974cb795e37dba91f) )
	3714
	3715	ROM_REGION32_LE( 0x200000, "mainpcb:sprites", 0 ) // sprites
	3716	ROM_LOAD32_BYTE( "epr-13382.ic90",  0x000000, 0x20000, CRC(01dac209) SHA1(4c6b03308193c472f6cdbcede306f8ce6db0cc4b) )
	3717	ROM_LOAD32_BYTE( "epr-13381.ic94",  0x000001, 0x20000, CRC(3a50d931) SHA1(9d9cb1793f3b8f562ce0ea49f2afeef099f20859) )
	3718	ROM_LOAD32_BYTE( "epr-13380.ic98",  0x000002, 0x20000, CRC(ad1024c8) SHA1(86e941424b2e2e00940886e5daed640a78ed7403) )
	3719	ROM_LOAD32_BYTE( "epr-13379.ic102", 0x000003, 0x20000, CRC(1ac17625) SHA1(7aefd382041dd3f97936ecb8738a3f2c9780c58f) )
	3720	ROM_LOAD32_BYTE( "epr-13378.ic91",  0x080000, 0x20000, CRC(50c9b867) SHA1(dd9702b369ea8abd50da22ce721b7040428e9d4b) )
	3721	ROM_LOAD32_BYTE( "epr-13377.ic95",  0x080001, 0x20000, CRC(9b12f5c0) SHA1(2060420611b3354974c49bc80f556f945512570b) )
	3722	ROM_LOAD32_BYTE( "epr-13376.ic99",  0x080002, 0x20000, CRC(449ac518) SHA1(0438a72e53a7889d39ea7e2530e49a2594d97e90) )
	3723	ROM_LOAD32_BYTE( "epr-13375.ic103", 0x080003, 0x20000, CRC(5489a9ff) SHA1(c458cb55d957edae340535f54189438296f3ec2f) )
	3724	ROM_LOAD32_BYTE( "epr-13374.ic92",  0x100000, 0x20000, CRC(6a319e4f) SHA1(d9f92b15f4baa14745048073205add35b7d42d27) )
	3725	ROM_LOAD32_BYTE( "epr-13373.ic96",  0x100001, 0x20000, CRC(eca5588b) SHA1(11def0c293868193d457958fe7459fd8c31dbd2b) )
	3726	ROM_LOAD32_BYTE( "epr-13372.ic100", 0x100002, 0x20000, CRC(0b45a433) SHA1(82fa2b208eaf70b70524681fbc3ec70085e70d83) )
	3727	ROM_LOAD32_BYTE( "epr-13371.ic104", 0x100003, 0x20000, CRC(b68f4cff) SHA1(166f2a685cbc230c098fdc1646b6e632dd2b09dd) )
	3728	ROM_LOAD32_BYTE( "epr-13370.ic93",  0x180000, 0x20000, CRC(78276620) SHA1(2c4505c57a1e765f9cfd48fb1637d67d199a2f1d) )
	3729	ROM_LOAD32_BYTE( "epr-13369.ic97",  0x180001, 0x20000, CRC(8625bf0f) SHA1(0ae70bc0d54e25eecf4a11cf0600225dca35914d) )
	3730	ROM_LOAD32_BYTE( "epr-13368.ic101", 0x180002, 0x20000, CRC(0f50716c) SHA1(eb4c7f47e11c58fe0d58f67e6dafabc6291eabb8) )
	3731	ROM_LOAD32_BYTE( "epr-13367.ic105", 0x180003, 0x20000, CRC(4b1bb51f) SHA1(17fd5ac9e18dd6097a015e9d7b6815826f9c53f1) )
	3732
	3733	ROM_REGION( 0x10000, "mainpcb:gfx3", ROMREGION_ERASE00 ) // road gfx
	3734	// none??
	3735
	3736	ROM_REGION( 0x10000, "mainpcb:soundcpu", 0 ) // sound CPU
	3737	ROM_LOAD( "epr-13388.ic17",    0x00000, 0x10000, CRC(706581e4) SHA1(51c9dbf2bf0d6b8826de24cd33596f5c95136870) )
	3738
	3739	ROM_REGION( 0x80000, "mainpcb:pcm", ROMREGION_ERASEFF ) // Sega PCM sound data
	3740	ROM_LOAD( "epr-13391.ic11",    0x00000, 0x20000, CRC(8c30c867) SHA1(0d735291b1311890938f8a1143fae6af9feb2a69) )
	3741	ROM_LOAD( "epr-13390.ic12",    0x20000, 0x20000, CRC(8c93cd05) SHA1(bb08094abac6c104eddf14f634e9791f03122946) )
	3742	ROM_LOAD( "epr-13389.ic13",    0x40000, 0x20000, CRC(4e4c758e) SHA1(181750dfcdd6d5b28b063c980c251991163d9474) )
	3743	ROM_END
	3744
	3745	// twin setup
3573	3746	ROM_START( gpriderj )
3574	3747	ROM_REGION( 0x80000, "mainpcb:maincpu", 0 ) // 68000 code
3575	3748	ROM_LOAD16_BYTE( "epr-13387.ic58", 0x00000, 0x20000, CRC(a1e8b2c5) SHA1(22b70a9074263af808bb9dffee29cbcff7e304e3) )
r249142	r249143
3617	3790	ROM_LOAD( "epr-13391.ic11",    0x00000, 0x20000, CRC(8c30c867) SHA1(0d735291b1311890938f8a1143fae6af9feb2a69) )
3618	3791	ROM_LOAD( "epr-13390.ic12",    0x20000, 0x20000, CRC(8c93cd05) SHA1(bb08094abac6c104eddf14f634e9791f03122946) )
3619	3792	ROM_LOAD( "epr-13389.ic13",    0x40000, 0x20000, CRC(4e4c758e) SHA1(181750dfcdd6d5b28b063c980c251991163d9474) )
	3793
	3794	ROM_REGION( 0x80000, "subpcb:maincpu", 0 ) // 68000 code
	3795	ROM_LOAD16_BYTE( "epr-13387.ic58", 0x00000, 0x20000, CRC(a1e8b2c5) SHA1(22b70a9074263af808bb9dffee29cbcff7e304e3) )
	3796	ROM_LOAD16_BYTE( "epr-13386.ic63", 0x00001, 0x20000, CRC(d8be9e66) SHA1(d81c03b08fd6b971554b94e0adac131a1dcf3248) )
	3797
	3798	ROM_REGION( 0x2000, "subpcb:maincpu:key", 0 )  // decryption key
	3799	ROM_LOAD( "317-0161.key", 0x0000, 0x2000, CRC(e38ddc16) SHA1(d1f7f261320cbc605b4f7e5a9c28f49af5471d87) )
	3800
	3801	ROM_REGION( 0x80000, "subpcb:subcpu", 0 ) // 2nd 68000 code
	3802	ROM_LOAD16_BYTE( "epr-13395.ic20", 0x00000, 0x20000,CRC(d6ccfac7) SHA1(9287ab08600163a0d9bd33618c629f99391316bd) )
	3803	ROM_LOAD16_BYTE( "epr-13394.ic29", 0x00001, 0x20000,CRC(914a55ec) SHA1(84fe1df12478990418b46b6800425e5599e9eff9) )
	3804	ROM_LOAD16_BYTE( "epr-13393.ic21", 0x40000, 0x20000,CRC(08d023cc) SHA1(d008d57e494f484a1a84896065d53fb9b1d8d60e) )
	3805	ROM_LOAD16_BYTE( "epr-13392.ic30", 0x40001, 0x20000,CRC(f927cd42) SHA1(67eab328c1fb878fe3d086d0639f5051b135a037) )
	3806
	3807	ROM_REGION( 0x30000, "subpcb:gfx1", 0 ) // tiles
	3808	ROM_LOAD( "epr-13383.ic154", 0x00000, 0x10000, CRC(24f897a7) SHA1(68ba17067d90f07bb5a549017be4773b33ae81d0) )
	3809	ROM_LOAD( "epr-13384.ic153", 0x10000, 0x10000, CRC(fe8238bd) SHA1(601910bd86536e6b08f5308b298c8f01fa60f233) )
	3810	ROM_LOAD( "epr-13385.ic152", 0x20000, 0x10000, CRC(6df1b995) SHA1(5aab19b87a9ef162c30ccf5974cb795e37dba91f) )
	3811
	3812	ROM_REGION32_LE( 0x200000, "subpcb:sprites", 0 ) // sprites
	3813	ROM_LOAD32_BYTE( "epr-13382.ic90",  0x000000, 0x20000, CRC(01dac209) SHA1(4c6b03308193c472f6cdbcede306f8ce6db0cc4b) )
	3814	ROM_LOAD32_BYTE( "epr-13381.ic94",  0x000001, 0x20000, CRC(3a50d931) SHA1(9d9cb1793f3b8f562ce0ea49f2afeef099f20859) )
	3815	ROM_LOAD32_BYTE( "epr-13380.ic98",  0x000002, 0x20000, CRC(ad1024c8) SHA1(86e941424b2e2e00940886e5daed640a78ed7403) )
	3816	ROM_LOAD32_BYTE( "epr-13379.ic102", 0x000003, 0x20000, CRC(1ac17625) SHA1(7aefd382041dd3f97936ecb8738a3f2c9780c58f) )
	3817	ROM_LOAD32_BYTE( "epr-13378.ic91",  0x080000, 0x20000, CRC(50c9b867) SHA1(dd9702b369ea8abd50da22ce721b7040428e9d4b) )
	3818	ROM_LOAD32_BYTE( "epr-13377.ic95",  0x080001, 0x20000, CRC(9b12f5c0) SHA1(2060420611b3354974c49bc80f556f945512570b) )
	3819	ROM_LOAD32_BYTE( "epr-13376.ic99",  0x080002, 0x20000, CRC(449ac518) SHA1(0438a72e53a7889d39ea7e2530e49a2594d97e90) )
	3820	ROM_LOAD32_BYTE( "epr-13375.ic103", 0x080003, 0x20000, CRC(5489a9ff) SHA1(c458cb55d957edae340535f54189438296f3ec2f) )
	3821	ROM_LOAD32_BYTE( "epr-13374.ic92",  0x100000, 0x20000, CRC(6a319e4f) SHA1(d9f92b15f4baa14745048073205add35b7d42d27) )
	3822	ROM_LOAD32_BYTE( "epr-13373.ic96",  0x100001, 0x20000, CRC(eca5588b) SHA1(11def0c293868193d457958fe7459fd8c31dbd2b) )
	3823	ROM_LOAD32_BYTE( "epr-13372.ic100", 0x100002, 0x20000, CRC(0b45a433) SHA1(82fa2b208eaf70b70524681fbc3ec70085e70d83) )
	3824	ROM_LOAD32_BYTE( "epr-13371.ic104", 0x100003, 0x20000, CRC(b68f4cff) SHA1(166f2a685cbc230c098fdc1646b6e632dd2b09dd) )
	3825	ROM_LOAD32_BYTE( "epr-13370.ic93",  0x180000, 0x20000, CRC(78276620) SHA1(2c4505c57a1e765f9cfd48fb1637d67d199a2f1d) )
	3826	ROM_LOAD32_BYTE( "epr-13369.ic97",  0x180001, 0x20000, CRC(8625bf0f) SHA1(0ae70bc0d54e25eecf4a11cf0600225dca35914d) )
	3827	ROM_LOAD32_BYTE( "epr-13368.ic101", 0x180002, 0x20000, CRC(0f50716c) SHA1(eb4c7f47e11c58fe0d58f67e6dafabc6291eabb8) )
	3828	ROM_LOAD32_BYTE( "epr-13367.ic105", 0x180003, 0x20000, CRC(4b1bb51f) SHA1(17fd5ac9e18dd6097a015e9d7b6815826f9c53f1) )
	3829
	3830	ROM_REGION( 0x10000, "subpcb:gfx3", ROMREGION_ERASE00 ) // road gfx
	3831	// none??
	3832
	3833	ROM_REGION( 0x10000, "subpcb:soundcpu", 0 ) // sound CPU
	3834	ROM_LOAD( "epr-13388.ic17",    0x00000, 0x10000, CRC(706581e4) SHA1(51c9dbf2bf0d6b8826de24cd33596f5c95136870) )
	3835
	3836	ROM_REGION( 0x80000, "subpcb:pcm", ROMREGION_ERASEFF ) // Sega PCM sound data
	3837	ROM_LOAD( "epr-13391.ic11",    0x00000, 0x20000, CRC(8c30c867) SHA1(0d735291b1311890938f8a1143fae6af9feb2a69) )
	3838	ROM_LOAD( "epr-13390.ic12",    0x20000, 0x20000, CRC(8c93cd05) SHA1(bb08094abac6c104eddf14f634e9791f03122946) )
	3839	ROM_LOAD( "epr-13389.ic13",    0x40000, 0x20000, CRC(4e4c758e) SHA1(181750dfcdd6d5b28b063c980c251991163d9474) )
3620	3840	ROM_END
3621	3841
3622
3623	3842	//*************************************************************************************************************************
3624	3843	//*************************************************************************************************************************
3625	3844	//*************************************************************************************************************************
r249142	r249143
3750	3969	m_mainpcb->install_gprider();
3751	3970	m_subpcb->install_gprider();
3752	3971
3753		m_mainpcb->m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x2F0000, 0x2F003f, read16_delegate(FUNC(segaxbd_new_state_double::shareram2_r), this), write16_delegate(FUNC(segaxbd_new_state_double::shareram1_w), this));
3754		m_subpcb->m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x2F0000, 0x2F003f, read16_delegate(FUNC(segaxbd_new_state_double::shareram1_r), this), write16_delegate(FUNC(segaxbd_new_state_double::shareram2_w), this));
	3972	m_mainpcb->m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x2F0000, 0x2F003f, read16_delegate(FUNC(segaxbd_new_state_double::shareram1_r), this), write16_delegate(FUNC(segaxbd_new_state_double::shareram1_w), this));
	3973	m_subpcb->m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x2F0000, 0x2F003f, read16_delegate(FUNC(segaxbd_new_state_double::shareram2_r), this), write16_delegate(FUNC(segaxbd_new_state_double::shareram2_w), this));
3755	3974	}
3756	3975
3757	3976
r249142	r249143
3780	3999	GAME( 1989, smgpja,   smgp,     sega_smgp_fd1094,    smgp,     segaxbd_new_state, smgp,     ROT0,   "Sega", "Super Monaco GP (Japan, Rev A, FD1094 317-0124a)", 0 )
3781	4000	GAME( 1990, abcop,    0,        sega_xboard_fd1094,  abcop,    driver_device,     0,  ROT0,   "Sega", "A.B. Cop (World, FD1094 317-0169b)", 0 )
3782	4001	GAME( 1990, abcopj,   abcop,    sega_xboard_fd1094,  abcop,    driver_device,     0,  ROT0,   "Sega", "A.B. Cop (Japan, FD1094 317-0169b)", 0 )
3783		GAME( 1990, gprider,  0,        sega_xboard_fd1094,  gprider, segaxbd_new_state, gprider,  ROT0,   "Sega", "GP Rider (World, FD1094 317-0163)", 0 )
3784		GAME( 1990, gprideru, gprider,  sega_xboard_fd1094,  gprider, segaxbd_new_state, gprider,  ROT0,   "Sega", "GP Rider (US, FD1094 317-0162)", 0 )
3785		GAME( 1990, gpriderj, gprider,  sega_xboard_fd1094,  gprider, segaxbd_new_state, gprider,  ROT0,   "Sega", "GP Rider (Japan, FD1094 317-0161)", 0 )
	4002	// wasn't officially available as a single PCB setup, but runs anyway albeit with messages suggesting you can compete against a rival that doesn't exist?
	4003	GAME( 1990, gpriders, gprider,  sega_xboard_fd1094,  gprider, segaxbd_new_state, gprider,  ROT0,   "Sega", "GP Rider (World, FD1094 317-0163)", 0 )
	4004	GAME( 1990, gpriderus,gprider,  sega_xboard_fd1094,  gprider, segaxbd_new_state, gprider,  ROT0,   "Sega", "GP Rider (US, FD1094 317-0162)", 0 )
	4005	GAME( 1990, gpriderjs,gprider,  sega_xboard_fd1094,  gprider, segaxbd_new_state, gprider,  ROT0,   "Sega", "GP Rider (Japan, FD1094 317-0161)", 0 )
3786	4006
3787		// multi X-Board (2 stacks directly connected, shared RAM on bridge PCB?)
3788		GAME( 1990, gpridert, gprider,  sega_xboard_fd1094_double, gprider_double,  segaxbd_new_state_double, gprider_double,  ROT0,   "Sega", "GP Rider (World, FD1094 317-0163) (master-slave setup)", MACHINE_NOT_WORKING ) // communication breaks down
	4007	// multi X-Board (2 stacks directly connected, shared RAM on bridge PCB - not networked)
	4008	GAME( 1990, gprider, 0,        sega_xboard_fd1094_double, gprider_double,  segaxbd_new_state_double, gprider_double,  ROT0,   "Sega", "GP Rider (World, FD1094 317-0163) (Twin setup)", 0 )
	4009	GAME( 1990, gprideru,gprider,  sega_xboard_fd1094_double, gprider_double,  segaxbd_new_state_double, gprider_double,  ROT0,   "Sega", "GP Rider (US, FD1094 317-0162) (Twin setup)", 0 )
	4010	GAME( 1990, gpriderj,gprider,  sega_xboard_fd1094_double, gprider_double,  segaxbd_new_state_double, gprider_double,  ROT0,   "Sega", "GP Rider (Japan, FD1094 317-0161) (Twin setup)", 0 )
3789	4011
3790	4012	// X-Board + other boards?
3791	4013	GAME( 1991, rascot,   0,        sega_rascot,         rascot,   segaxbd_new_state, rascot,   ROT0,   "Sega", "Royal Ascot (Japan, terminal?)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )

trunk/src/mame/machine/m2comm.c

r0	r249143
	1	// license:BSD-3-Clause
	2	// copyright-holders:Ariane Fugmann
	3
	4	/*
	5	Sega MODEL2 COMMUNICATION BOARD 837-10537
	6	( http://images.arianchen.de/sega-comm/daytona_comm.jpg )
	7	|-----------------------------------------------------------------------------|
	8	| |-------------------|                             |-------------------|     |
	9	| |-------------------|                             |-------------------|     |
	10	|          CN5                                               CN4           -- |
	11	| LED    Z80        LH5268A          16726.7        JP6 JP5 JP4 JP1        || |
	12	|                                                                         C|| |
	13	|        315-5751   315-5752                        uPD72103              N|| |
	14	|                                                                     JP7 8|| |
	15	|        LH5268A    LH5268A                                           JP8  || |
	16	|                                                                     JP9  -- |
	17	|        LH5268A    LH5268A                         315-5753A    315-5547     |
	18	|                                                                             |
	19	|                                                                         CN6 |
	20	| CN9                                                                         |
	21	|                                                                         CN7 |
	22	|          CN3                      CN2                      CN1              |
	23	| |-------------------|    |-------------------|    |-------------------|     |
	24	| |-------------------|    |-------------------|    |-------------------|     |
	25	|-----------------------------------------------------------------------------|
	26
	27	Setup:
	28	Z80        Zilog Z0840008PSC Z80 CPU (DIP40)
	29	LH5268A    SHARP LH5268AD-10LL 8k x8 SRAM (DIP28)
	30	uPD72103   NEC uPD72103 HDLC/Frame Relay Controller (QFP80)
	31	16726.7    M27C1001 128k x8 EPROM (DIP32, labelled 'EPR-16726')
	32	315-5751   Lattice GAL16V8B-25LP PAL (DIP20)
	33	315-5752   Lattice GAL16V8B-25LP PAL (DIP20)
	34	315-5753A  AMI 18CV8PC-15 PAL (DIP20)
	35	315-5547   AMI 18CV8PC-25 PAL (DIP20)
	36
	37	Board:
	38	837-10537  Daytona USA
	39
	40	EEPROM:
	41	16726.7    Daytona USA
	42
	43
	44	Sega PC BD MODEL2 A-CRX COMMUNICATION 837-11525
	45	( http://images.arianchen.de/sega-comm/srally_comm.jpg )
	46	|-------------------------------------------------------------------------------------------|
	47	| |-------------------|                             |-------------------|    |---------|    |
	48	| |-------------------|                             |-------------------|    |---------|    |
	49	|          CN5                                               CN4                CN10        |
	50	| LED    Z80        LH5268A          16726.7        JP6 JP5 JP4 JP1                         |
	51	|                                                                                           |
	52	|        315-5751   315-5752                        uPD72103                                |
	53	|                                                                                           |
	54	|        LH5268A    LH5268A                                                                 |
	55	|                                                                                        -- |
	56	|        LH5268A    LH5268A                         315-5753A    315-5547                || |
	57	|                                                                                       C|| |
	58	|                                                                                       N|| |
	59	| CN9                                                                                   8|| |
	60	|                                                                                   JP7  || |
	61	|          CN3                      CN2                      CN1                    JP8  -- |
	62	| |-------------------|    |-------------------|    |-------------------|           JP9     |
	63	| |-------------------|    |-------------------|    |-------------------|                   |
	64	|-------------------------------------------------------------------------------------------|
	65
	66	Setup:
	67	Z80        Zilog Z0840008PSC Z80 CPU (DIP40)
	68	LH5268A    SHARP LH5268AD-10LL 8k x8 SRAM (DIP28)
	69	uPD72103   NEC uPD72103 HDLC/Frame Relay Controller (QFP80)
	70	16726.7    M27C1001 128k x8 EPROM (DIP32, labelled 'EPR-16726')
	71	315-5751   Lattice GAL16V8B-25LP PAL (DIP20)
	72	315-5752   Lattice GAL16V8B-25LP PAL (DIP20)
	73	315-5753A  AMI 18CV8PC-15 PAL (DIP20)
	74	315-5547   AMI 18CV8PC-25 PAL (DIP20)
	75
	76	Board:
	77	837-11525
	78	837-11572  Sega Rally Championship
	79
	80	EEPROM:
	81	16726.7    Sega Rally Championship
	82	18643A.7   ManxTT
	83
	84
	85	Sega PC BD MODEL2 B-CRX COMMUNICATION 837-11615
	86	( http://images.arianchen.de/sega-comm/model2b-com_top.jpg )
	87	|-------------------------------------------------------------------------------------------|
	88	|                                                                                           |
	89	|  --                                                                                       |
	90	|  ||          18643A.7    MB84256A        Z80                                              |
	91	| C||                                                      MB84256A                         |
	92	| N||  JP9                       uPD72103A 315-5751                                         |
	93	| 8||  JP8                                                 MB84256A                         |
	94	|  ||  JP7                                 315-5752                                         |
	95	|  --                                                      MB84256A                         |
	96	|                                                                                           |
	97	|                                                          MB84256A                         |
	98	|                                          315-5753A                                        |
	99	| LED                                                                                       |
	100	|                                                    315-5547A                              |
	101	|                                                                                           |
	102	|                                                                              CN1          |
	103	|                                                                    |-------------------|  |
	104	|                                                  CN3               |-------------------|  |
	105	|-------------------------------------------------------------------------------------------|
	106
	107	Setup:
	108	Z80          Zilog Z0840008PSC Z80 CPU (DIP40)
	109	MB84256A     Fujitsu MB84256A-70LL 32k x8 SRAM (SDIP28)
	110	uPD72103A    NEC uPD72103 HDLC/Frame Relay Controller (QFP80)
	111	18643A.7     M27C1001 128k x8 EPROM (DIP32, labelled 'EPR-18643A')
	112	315-5751     Lattice GAL16V8B-25LP PAL (DIP20)
	113	315-5752     Lattice GAL16V8B-25LP PAL (DIP20)
	114	315-5753A    ICT PEEL18CV8P-15 PAL (DIP20)
	115	315-5547A    AMI 18CV8PC-25 PAL (DIP20)
	116
	117	Board:
	118	837-11615    Virtua On
	119	837-11615-02 Virtua On
	120
	121	EEPROM:
	122	18643.7      Virtua On
	123	18643A.7     Virtua On
	124
	125
	126
	127
	128	Sega PC BD MODEL2 C-CRX COMMUNICATION 837-12839
	129	|-------------------------------------------------------------------------------------------|
	130	|                                                                                           |
	131	|  --                                                                                       |
	132	|  ||          18643A.7    MB84256A        Z80                                              |
	133	| C||                                                      MB84256A                         |
	134	| N||  JP9                       uPD72103A 315-5751                                         |
	135	| 8||  JP8                                                 MB84256A                         |
	136	|  ||  JP7                                 315-5752                                         |
	137	|  --                                                      MB84256A                         |
	138	|                                                                                           |
	139	|                                                          MB84256A                         |
	140	|                                          315-5753A                                        |
	141	| LED                                                                                       |
	142	|                                                    315-5547A                              |
	143	|                                                                                           |
	144	|                                                                              CN1          |
	145	|                                                                    |-------------------|  |
	146	|                                                  CN3               |-------------------|  |
	147	|-------------------------------------------------------------------------------------------|
	148
	149	Setup:
	150	Z80        Zilog Z0840008PSC Z80 CPU (DIP40)
	151	MB84256A   Fujitsu MB84256A-70LL 32k x8 SRAM (SDIP28)
	152	uPD72103A  NEC uPD72103 HDLC/Frame Relay Controller (QFP80)
	153	18643A.7   M27C1001 128k x8 EPROM (DIP32, labelled 'EPR-18643A')
	154	315-5751   Lattice GAL16V8B-25LP PAL (DIP20)
	155	315-5752   Lattice GAL16V8B-25LP PAL (DIP20)
	156	315-5753A  ICT PEEL18CV8P-15 PAL (DIP20)
	157	315-5547A  AMI 18CV8PC-25 PAL (DIP20)
	158
	159	Board:
	160	837-12839  Sega Touring Car Championship
	161
	162	EEPROM:
	163	18643A.7   Sega Touring Car Championship
	164	*/
	165
	166	#include "machine/m2comm.h"
	167
	168	//#define __M2COMM_VERBOSE__
	169
	170	MACHINE_CONFIG_FRAGMENT( m2comm )
	171	MACHINE_CONFIG_END
	172
	173	//**************************************************************************
	174	//  GLOBAL VARIABLES
	175	//**************************************************************************
	176
	177	const device_type M2COMM = &device_creator<m2comm_device>;
	178
	179	//-------------------------------------------------
	180	//  machine_config_additions - device-specific
	181	//  machine configurations
	182	//-------------------------------------------------
	183
	184	machine_config_constructor m2comm_device::device_mconfig_additions() const
	185	{
	186	return MACHINE_CONFIG_NAME( m2comm );
	187	}
	188
	189	//**************************************************************************
	190	//  LIVE DEVICE
	191	//**************************************************************************
	192
	193	//-------------------------------------------------
	194	//  m2comm_device - constructor
	195	//-------------------------------------------------
	196
	197	m2comm_device::m2comm_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
	198	device_t(mconfig, M2COMM, "MODEL2 COMMUNICATION BD", tag, owner, clock, "m2comm", __FILE__),
	199	m_line_rx(OPEN_FLAG_WRITE | OPEN_FLAG_CREATE ),
	200	m_line_tx(OPEN_FLAG_READ)
	201	{
	202	// prepare localhost "filename"
	203	m_localhost[0] = 0;
	204	strcat(m_localhost, "socket.");
	205	strcat(m_localhost, mconfig.options().comm_localhost());
	206	strcat(m_localhost, ":");
	207	strcat(m_localhost, mconfig.options().comm_localport());
	208
	209	// prepare remotehost "filename"
	210	m_remotehost[0] = 0;
	211	strcat(m_remotehost, "socket.");
	212	strcat(m_remotehost, mconfig.options().comm_remotehost());
	213	strcat(m_remotehost, ":");
	214	strcat(m_remotehost, mconfig.options().comm_remoteport());
	215	}
	216
	217	//-------------------------------------------------
	218	//  device_start - device-specific startup
	219	//-------------------------------------------------
	220
	221	void m2comm_device::device_start()
	222	{
	223	}
	224
	225	//-------------------------------------------------
	226	//  device_reset - device-specific reset
	227	//-------------------------------------------------
	228
	229	void m2comm_device::device_reset()
	230	{
	231	set_linktype(16726);
	232	m_zfg = 0;
	233	m_cn = 0;
	234	m_fg = 0;
	235	}
	236
	237	READ8_MEMBER(m2comm_device::zfg_r)
	238	{
	239	UINT8 result = m_zfg | 0xFE;
	240	#ifdef __M2COMM_VERBOSE__
	241	printf("m2comm-zfg_r: read register %02x for value %02x\n", offset, result);
	242	#endif
	243	return result;
	244	}
	245
	246	WRITE8_MEMBER(m2comm_device::zfg_w)
	247	{
	248	#ifdef __M2COMM_VERBOSE__
	249	printf("m2comm-zfg_w: %02x\n", data);
	250	#endif
	251	m_zfg = data & 0x01;
	252	}
	253
	254	READ8_MEMBER(m2comm_device::share_r)
	255	{
	256	UINT8 result = m_shared[offset];
	257	#ifdef __M2COMM_VERBOSE__
	258	printf("m2comm-share_r: read shared memory %02x for value %02x\n", offset, result);
	259	#endif
	260	return result;
	261	}
	262
	263	WRITE8_MEMBER(m2comm_device::share_w)
	264	{
	265	#ifdef __M2COMM_VERBOSE__
	266	printf("m2comm-share_w: %02x %02x\n", offset, data);
	267	#endif
	268	m_shared[offset] = data;
	269	}
	270
	271	READ8_MEMBER(m2comm_device::cn_r)
	272	{
	273	return m_cn;
	274	}
	275
	276	WRITE8_MEMBER(m2comm_device::cn_w)
	277	{
	278	m_cn = data & 0x01;
	279
	280	#ifndef __M2COMM_SIMULATION__
	281	if (!m_cn)
	282	device_reset();
	283	#else
	284	if (!m_cn)
	285	{
	286	// reset command
	287	printf("M2COMM: board disabled\n");
	288	m_linkenable = 0x00;
	289	}
	290	else
	291	{
	292	// init command
	293	printf("M2COMM: board enabled\n");
	294	m_linkenable = 0x01;
	295	m_linkid = 0x00;
	296	m_linkalive = 0x00;
	297	m_linkcount = 0x00;
	298	m_linktimer = 0x04; //0x00E8; // 58 fps * 4s
	299
	300	comm_tick();
	301	}
	302	#endif
	303	}
	304
	305	READ8_MEMBER(m2comm_device::fg_r)
	306	{
	307	return m_fg | (~m_zfg << 7);
	308	}
	309
	310	WRITE8_MEMBER(m2comm_device::fg_w)
	311	{
	312	m_fg = data & 0x01;
	313	}
	314
	315	void m2comm_device::check_vint_irq()
	316	{
	317	#ifndef __M2COMM_SIMULATION__
	318	#else
	319	comm_tick();
	320	#endif
	321	}
	322
	323	#ifdef __M2COMM_SIMULATION__
	324	void m2comm_device::set_linktype(UINT16 linktype)
	325	{
	326	m_linktype = linktype;
	327
	328	switch (m_linktype)
	329	{
	330	case 16726:
	331	// Daytona USA / Sega Rally Championship
	332	printf("M2COMM: set mode 'EPR-16726 - Daytona USA'\n");
	333	break;
	334	}
	335	}
	336
	337	void m2comm_device::comm_tick()
	338	{
	339	switch (m_linktype)
	340	{
	341	case 16726:
	342	// Daytona USA / Sega Rally Championship
	343	comm_tick_16726();
	344	break;
	345	}
	346	}
	347
	348	void m2comm_device::comm_tick_16726()
	349	{
	350	if (m_linkenable == 0x01)
	351	{
	352	m_zfg ^= 1;
	353
	354	int frameStart = 0x2000;
	355	int frameOffset = 0x0000;
	356	int frameSize = 0x01c0;
	357	int dataSize = frameSize + 1;
	358	int togo = 0;
	359	int recv = 0;
	360	int idx = 0;
	361
	362	bool isMaster = (m_fg == 0x01);
	363	bool isSlave = (m_fg == 0x00);
	364
	365	// if link not yet established...
	366	if (m_linkalive == 0x00)
	367	{
	368	// waiting...
	369	m_shared[0] = 0x00;
	370	m_shared[2] = 0xff;
	371	m_shared[3] = 0xff;
	372
	373	// check rx socket
	374	if (!m_line_rx.is_open())
	375	{
	376	printf("M2COMM: listen on %s\n", m_localhost);
	377	m_line_rx.open(m_localhost);
	378	}
	379
	380	// check tx socket
	381	if (!m_line_tx.is_open())
	382	{
	383	printf("M2COMM: connect to %s\n", m_remotehost);
	384	m_line_tx.open(m_remotehost);
	385	}
	386
	387	// if both sockets are there check ring
	388	if ((m_line_rx.is_open()) && (m_line_tx.is_open()))
	389	{
	390	// try to read one messages
	391	recv = m_line_rx.read(m_buffer, dataSize);
	392	while (recv != 0)
	393	{
	394	// check if complete message
	395	if (recv == dataSize)
	396	{
	397	// check if message id
	398	idx = m_buffer[0];
	399
	400	// 0xFF - link id
	401	if (idx == 0xff)
	402	{
	403	if (isMaster)
	404	{
	405	// master gets first id and starts next state
	406	m_linkid = 0x01;
	407	m_linkcount = m_buffer[1];
	408	m_linktimer = 0x01;
	409	}
	410	else if (isSlave)
	411	{
	412	m_buffer[1]++;
	413	m_linkid = m_buffer[1];
	414
	415	// forward message
	416	m_line_tx.write(m_buffer, dataSize);
	417	}
	418	}
	419
	420	// 0xFE - link size
	421	else if (idx == 0xfe)
	422	{
	423	if (isSlave)
	424	{
	425	m_linkcount = m_buffer[1];
	426
	427	// forward message
	428	m_line_tx.write(m_buffer, dataSize);
	429	}
	430
	431	// consider it done
	432	printf("M2COMM: link established - id %02x of %02x\n", m_linkid, m_linkcount);
	433	m_linkalive = 0x01;
	434
	435	// write to shared mem
	436	m_shared[0] = 0x01;
	437	m_shared[2] = m_linkid;
	438	m_shared[3] = m_linkcount;
	439	}
	440	}
	441	else
	442	{
	443	// got only part of a message - read the rest (and drop it)
	444	// TODO: combine parts and push to "ring buffer"
	445	togo = dataSize - recv;
	446	while (togo > 0){
	447	recv = m_line_rx.read(m_buffer, togo);
	448	togo -= recv;
	449	}
	450	printf("M2COMM: droped a message...\n");
	451	}
	452
	453	if (m_linkalive == 0x00)
	454	recv = m_line_rx.read(m_buffer, dataSize);
	455	else
	456	recv = 0;
	457	}
	458
	459	// if we are master and link is not yet established
	460	if (isMaster && (m_linkalive == 0x00))
	461	{
	462	// send first packet
	463	if (m_linktimer == 0x00)
	464	{
	465	m_buffer[0] = 0xff;
	466	m_buffer[1] = 0x01;
	467	m_line_tx.write(m_buffer, dataSize);
	468	}
	469
	470	// send second packet
	471	else if (m_linktimer == 0x01)
	472	{
	473	m_buffer[0] = 0xfe;
	474	m_buffer[1] = m_linkcount;
	475	m_line_tx.write(m_buffer, dataSize);
	476
	477	// consider it done
	478	printf("M2COMM: link established - id %02x of %02x\n", m_linkid, m_linkcount);
	479	m_linkalive = 0x01;
	480
	481	// write to shared mem
	482	m_shared[0] = 0x01;
	483	m_shared[2] = m_linkid;
	484	m_shared[3] = m_linkcount;
	485	}
	486
	487	else if (m_linktimer > 0x02)
	488	{
	489	// decrease delay timer
	490	m_linktimer--;
	491	if (m_linktimer == 0x02)
	492	m_linktimer = 0x00;
	493	}
	494	}
	495	}
	496	}
	497
	498	// update "ring buffer" if link established
	499	if (m_linkalive == 0x01)
	500	{
	501	int togo = 0;
	502	// try to read one messages
	503	int recv = m_line_rx.read(m_buffer, dataSize);
	504	while (recv != 0)
	505	{
	506	// check if complete message
	507	if (recv == dataSize)
	508	{
	509	// check if valid id
	510	int idx = m_buffer[0];
	511	if (idx > 0 && idx <= m_linkcount) {
	512	int slotFrom = m_linkid - idx;
	513	int slotDest = slotFrom + m_linkcount;
	514	while (slotDest < 9) {
	515	slotDest += m_linkcount;
	516	}
	517	while (slotDest - m_linkcount > 0) {
	518	slotFrom = slotDest - m_linkcount;
	519	if (slotDest < 9) {
	520	int frameOffset1 = frameStart + slotFrom * frameSize;
	521	int frameOffset2 = frameStart + slotDest * frameSize;
	522	for (int j = 0x00 ; j < frameSize ; j++)
	523	{
	524	m_shared[frameOffset2 + j] = m_shared[frameOffset1 + j];
	525	}
	526	}
	527	slotDest -= m_linkcount;
	528	}
	529	if (slotDest > 0) {
	530	// save message to "ring buffer"
	531	frameOffset = frameStart + (slotDest * frameSize);
	532	for (int j = 0x00 ; j < frameSize ; j++)
	533	{
	534	m_shared[frameOffset + j] = m_buffer[1 + j];
	535	}
	536	}
	537	if (idx != m_linkid)
	538	{
	539	// forward message to other nodes
	540	m_line_tx.write(m_buffer, dataSize);
	541	}
	542	} else {
	543	if (!isMaster && idx == 0xF0){
	544	// 0xF0 - master addional bytes
	545	for (int j = 0x05 ; j < 0x10 ; j++)
	546	{
	547	m_shared[j] = m_buffer[1 + j];
	548	}
	549
	550	// forward message to other nodes
	551	m_line_tx.write(m_buffer, dataSize);
	552	}
	553	}
	554	}
	555	else
	556	{
	557	// got only part of a message - read the rest (and drop it)
	558	// TODO: combine parts and push to "ring buffer"
	559	togo = dataSize - recv;
	560	while (togo > 0){
	561	recv = m_line_rx.read(m_buffer, togo);
	562	togo -= recv;
	563	}
	564	printf("M2COMM: droped a message...\n");
	565	}
	566	recv = m_line_rx.read(m_buffer, dataSize);
	567	}
	568
	569	// push message to other nodes
	570	m_buffer[0] = m_linkid;
	571	for (int j = 0x00 ; j < frameSize ; j++)
	572	{
	573	m_buffer[1 + j] = m_shared[frameStart + j];
	574	}
	575	m_line_tx.write(m_buffer, dataSize);
	576
	577	// master sends some additional status bytes
	578	if (isMaster){
	579	m_buffer[0] = 0xF0;
	580	for (int j = 0x00 ; j < frameSize ; j++)
	581	{
	582	m_buffer[1 + j] = 0x00;
	583	}
	584	for (int j = 0x05 ; j < 0x10 ; j++)
	585	{
	586	m_buffer[1 + j] = m_shared[j];
	587	}
	588	// push message to other nodes
	589	m_line_tx.write(m_buffer, dataSize);
	590	}
	591	}
	592
	593	// clear 03
	594	//TODO:m_shared[3] = 0x00;
	595	}
	596	}
	597	#endif

trunk/src/mame/machine/m2comm.h

r0	r249143
	1	// license:BSD-3-Clause
	2	// copyright-holders:Ariane Fugmann
	3	#pragma once
	4
	5	#ifndef __M2COMM_H__
	6	#define __M2COMM_H__
	7
	8	#define __M2COMM_SIMULATION__
	9
	10	#include "emu.h"
	11
	12	#define MCFG_M2COMM_ADD(_tag ) \
	13	MCFG_DEVICE_ADD(_tag, M2COMM, 0)
	14
	15	//**************************************************************************
	16	//  TYPE DEFINITIONS
	17	//**************************************************************************
	18
	19	class m2comm_device : public device_t
	20	{
	21	public:
	22	// construction/destruction
	23	m2comm_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
	24
	25	// optional information overrides
	26	virtual machine_config_constructor device_mconfig_additions() const;
	27
	28	// single bit registers (74LS74)
	29	DECLARE_READ8_MEMBER(zfg_r);
	30	DECLARE_WRITE8_MEMBER(zfg_w);
	31	// shared memory 2k
	32	DECLARE_READ8_MEMBER(share_r);
	33	DECLARE_WRITE8_MEMBER(share_w);
	34
	35	// public API - stuff that gets called from host
	36	// shared memory 16k
	37	// reads/writes at I/O 0x01a10000-0x01a13fff
	38	// - share_r
	39	// - share_w
	40	// single bit registers (74LS74)
	41	// reads/writes at I/O 0x01a14000
	42	DECLARE_READ8_MEMBER(cn_r);
	43	DECLARE_WRITE8_MEMBER(cn_w);
	44	// reads/writes at I/O 0x01a14002
	45	DECLARE_READ8_MEMBER(fg_r);
	46	DECLARE_WRITE8_MEMBER(fg_w);
	47
	48	// IRQ logic - 5 = VINT, 7 = DLC
	49	void check_vint_irq();
	50	#ifdef __M2COMM_SIMULATION__
	51	void set_linktype(UINT16 linktype);
	52	#endif
	53
	54	protected:
	55	// device-level overrides
	56	virtual void device_start();
	57	virtual void device_reset();
	58
	59	private:
	60	UINT8 m_shared[0x4000]; // 16k shared memory
	61	UINT8   m_zfg;                  // z80 flip gate? purpose unknown, bit0 is stored
	62	UINT8   m_cn;                     // bit0 is used to enable/disable the comm board
	63	UINT8   m_fg;                     // flip gate? purpose unknown, bit0 is stored, bit7 is connected to ZFG bit 0
	64
	65	emu_file m_line_rx;    // rx line - can be either differential, simple serial or toslink
	66	emu_file m_line_tx;    // tx line - is differential, simple serial and toslink
	67	char m_localhost[256];
	68	char m_remotehost[256];
	69	UINT8 m_buffer[0x4000];
	70
	71	#ifdef __M2COMM_SIMULATION__
	72	UINT8 m_linkenable;
	73	UINT16 m_linktimer;
	74	UINT8 m_linkalive;
	75	UINT8 m_linkid;
	76	UINT8 m_linkcount;
	77
	78	UINT16 m_linktype;
	79
	80	void comm_tick();
	81
	82	void comm_tick_16726();
	83	#endif
	84	};
	85
	86	// device type definition
	87	extern const device_type M2COMM;
	88
	89	#endif  /* __M2COMM_H__ */

trunk/src/mame/machine/n64.c

r249142	r249143
2266	2266	}
2267	2267	else // dd read, BM Mode 1
2268	2268	{
2269		if(((dd_track_reg & 0xFFF) == 6) && (dd_start_block == 0))
	2269	if(((dd_track_reg & 0xFFF) == 6) && (dd_start_block == 0) && ((machine().root_device().ioport("input")->read() & 0x0100) == 0x0000))
2270	2270	{
	2271	//only fail read LBA 12 if retail disk drive
2271	2272	dd_status_reg &= ~DD_ASIC_STATUS_DREQ;
	2273	dd_buf_status_reg |= DD_BMST_MICRO_STATUS;
2272	2274	}
2273	2275	else if(dd_current_reg < SECTORS_PER_BLOCK)
2274	2276	{
r249142	r249143
2336	2338	sector = (UINT8*)machine().root_device().memregion("disk")->base();
2337	2339	sector += dd_track_offset;
2338	2340	sector += dd_start_block * SECTORS_PER_BLOCK * ddZoneSecSize[dd_zone];
2339		sector += (dd_current_reg) * ddZoneSecSize[dd_zone];
	2341	sector += (dd_current_reg) * (dd_sector_size + 1);
2340	2342
2341	2343	//logerror("Read Block %d, Sector %d\n", dd_start_block, dd_current_reg);
2342	2344
2343		for(int i = 0; i < ddZoneSecSize[dd_zone]/4; i++)
	2345	for(int i = 0; i < (dd_sector_size + 1)/4; i++)
2344	2346	{
2345	2347	dd_sector_data[i] = sector[(i*4 + 0)] << 24 | sector[(i*4 + 1)] << 16 |
2346	2348	sector[(i*4 + 2)] << 8  | sector[(i*4 + 3)];
r249142	r249143
2421	2423	ret = dd_seq_ctrl_reg;
2422	2424	break;
2423	2425	case 0x40/4: // ASIC ID
2424		ret = 0x00030000; // Japan Retail Drive
	2426	if ((machine().root_device().ioport("input")->read() & 0x0100) == 0x0000)
	2427	ret = 0x00030000; // Japan Retail Drive
	2428	else
	2429	ret = 0x00040000; // Development Drive
2425	2430	break;
2426	2431	}
2427	2432

trunk/src/mess/drivers/apple2e.c

r249142	r249143
2121	2121
2122	2122	// machine state switches
2123	2123	//
2124		Hires    = m_video->m_hires ? 1 : 0;
	2124	Hires    = (m_video->m_hires && m_video->m_graphics) ? 1 : 0;
2125	2125	Mixed    = m_video->m_mix ? 1 : 0;
2126	2126	Page2    = m_page2 ? 1 : 0;
2127	2127	_80Store = m_80store ? 1 : 0;

trunk/src/mess/drivers/n64.c

r249142	r249143
89	89
90	90	static INPUT_PORTS_START( n64 )
91	91	PORT_START("input")
92		PORT_CONFNAME(0x03, 0x01, "Controller Port 0 Device")
	92	PORT_CONFNAME(0x0003, 0x0001, "Controller Port 0 Device")
93	93	PORT_CONFSETTING(0x00, "None")
94	94	PORT_CONFSETTING(0x01, "Joypad")
95	95	PORT_CONFSETTING(0x02, "Mouse")
96		PORT_CONFNAME(0x0C, 0x00, "Controller Port 1 Device")
	96	PORT_CONFNAME(0x000C, 0x0000, "Controller Port 1 Device")
97	97	PORT_CONFSETTING(0x00, "None")
98	98	PORT_CONFSETTING(0x04, "Joypad")
99	99	PORT_CONFSETTING(0x08, "Mouse")
100		PORT_CONFNAME(0x30, 0x00, "Controller Port 2 Device")
	100	PORT_CONFNAME(0x0030, 0x0000, "Controller Port 2 Device")
101	101	PORT_CONFSETTING(0x00, "None")
102	102	PORT_CONFSETTING(0x10, "Joypad")
103	103	PORT_CONFSETTING(0x20, "Mouse")
104		PORT_CONFNAME(0xC0, 0x00, "Controller Port 3 Device")
	104	PORT_CONFNAME(0x00C0, 0x0000, "Controller Port 3 Device")
105	105	PORT_CONFSETTING(0x00, "None")
106	106	PORT_CONFSETTING(0x40, "Joypad")
107	107	PORT_CONFSETTING(0x80, "Mouse")
	108
	109	PORT_CONFNAME(0x0100, 0x0000, "Disk Drive")
	110	PORT_CONFSETTING(0x0000, "Retail")
	111	PORT_CONFSETTING(0x0100, "Development")
108	112
109	113	//Player 1
110	114	PORT_START("P1")

trunk/src/mess/drivers/orao.c

r249142	r249143
14	14
15	15	#include "emu.h"
16	16	#include "cpu/m6502/m6502.h"
17		#include "sound/dac.h"
	17	#include "sound/speaker.h"
18	18	#include "sound/wave.h"
19	19	#include "includes/orao.h"
20	20	#include "imagedev/cassette.h"
r249142	r249143
183	183
184	184	/* audio hardware */
185	185	MCFG_SPEAKER_STANDARD_MONO("mono")
186		MCFG_SOUND_ADD("dac", DAC, 0)
187		MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 8.00)
	186	MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0)
	187	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
188	188	MCFG_SOUND_WAVE_ADD(WAVE_TAG, "cassette")
189	189	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
190	190

trunk/src/mess/includes/orao.h

r249142	r249143
8	8
9	9	#ifndef ORAO_H_
10	10	#define ORAO_H_
11		#include "sound/dac.h"
	11	#include "sound/speaker.h"
12	12	#include "imagedev/cassette.h"
13	13
14	14	class orao_state : public driver_device
r249142	r249143
19	19	m_memory(*this, "memory"),
20	20	m_video_ram(*this, "video_ram"),
21	21	m_maincpu(*this, "maincpu"),
22		m_dac(*this, "dac"),
	22	m_speaker(*this, "speaker"),
23	23	m_cassette(*this, "cassette"),
24		m_line(*this, "LINE")
	24	m_line(*this, "LINE"),
	25	m_beep(0)
25	26	{ }
26	27
27	28	DECLARE_READ8_MEMBER(orao_io_r);
r249142	r249143
36	37	required_shared_ptr<UINT8> m_memory;
37	38	required_shared_ptr<UINT8> m_video_ram;
38	39	required_device<cpu_device> m_maincpu;
39		required_device<dac_device> m_dac;
	40	required_device<speaker_sound_device> m_speaker;
40	41	required_device<cassette_image_device> m_cassette;
41	42	required_ioport_array<20> m_line;
	43	UINT8 m_beep;
42	44	};
43	45
44	46	#endif /* ORAO_H_ */

trunk/src/mess/machine/orao.c

r249142	r249143
74	74	{
75	75	if (offset == 0x0800)
76	76	{
77		m_dac->write_unsigned8(data); //beeper
	77	m_speaker->level_w(m_beep);
	78	m_beep ^= 1;
78	79	}
79	80	}

trunk/src/osd/modules/render/drawogl.c

r249142	r249143
3117	3117	GL_CHECK_ERROR_NORMAL();
3118	3118	glViewport(0.0, 0.0, (GLsizei)texture->rawwidth, (GLsizei)texture->rawheight);
3119	3119	}
3120		else if ( shaderIdx==m_glsl_program_mb2sc )
	3120
	3121	if ( shaderIdx==m_glsl_program_mb2sc )
3121	3122	{
3122	3123	assert ( m_glsl_program_mb2sc < m_glsl_program_num-1 );
3123	3124	glPopAttrib(); // glViewport(0.0, 0.0, (GLsizei)window().width, (GLsizei)window().height)

https://github.com/mamedev/mame/commit/ecb3ff6d60fbc34993a2403e9b2b05161739b762

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