trunk/3rdparty/genie/src/host/scripts.c
| r249051 | r249052 | |
|---|
| 55 | 55 | "roject.getbasename(prjname, pattern)\nreturn pattern:gsub(\"%%%%\", prjname)\nend\nfunction premake.project.getfilename(prj, pattern)\nlocal fname = premake.project.getbasename(prj.name, pattern)\nfname = path.join(prj.location, fname)\nreturn path.getrelative(os.getcwd(), fname)\nend\n function premake.getlinks(cfg, kind, part)\nlocal result = iif (part == \"directory\" and kind == \"all\", cfg.libdirs, {})\nlocal cfgname = iif(cfg.name == cfg.project.name, \"\", cfg.name)\nlocal pathstyle = premake.getpathstyle(cfg)\nlocal namestyle = premake.getnamestyle(cfg)\nlocal function canlink(source, target)\nif (target.kind ~= \"SharedLib\" and target.kind ~= \"StaticLib\") then\nreturn false\nend\nif premake.iscppproject(source) then\nreturn premake.iscppproject(target)\nelseif premake.isdotnetproject(source) then\nreturn premake.isdotnetproject(target)\nend\nend\nfor _, link in ipairs(cfg.links) do\nlocal item\nlocal prj = premake.findproject(link)\nif prj and kind ~= \"system\" then\nlocal prjcfg = premake.getcon" |
| 56 | 56 | "fig(prj, cfgname, cfg.platform)\nif kind == \"dependencies\" or canlink(cfg, prjcfg) then\nif (part == \"directory\") then\nitem = path.rebase(prjcfg.linktarget.directory, prjcfg.location, cfg.location)\nelseif (part == \"basename\") then\nitem = prjcfg.linktarget.basename\nelseif (part == \"fullpath\") then\nitem = path.rebase(prjcfg.linktarget.fullpath, prjcfg.location, cfg.location)\nelseif (part == \"object\") then\nitem = prjcfg\nend\nend\nelseif not prj and (kind == \"system\" or kind == \"all\") then\nif (part == \"directory\") then\nitem = path.getdirectory(link)\nelseif (part == \"fullpath\") then\nitem = link\nif namestyle == \"windows\" then\nif premake.iscppproject(cfg) then\nitem = item .. \".lib\"\nelseif premake.isdotnetproject(cfg) then\nitem = item .. \".dll\"\nend\nend\nelseif part == \"name\" then\nitem = path.getname(link)\nelseif part == \"basename\" then\nitem = path.getbasename(link)\nelse\nitem = link\nend\nif item:find(\"/\", nil, true) then\nitem = path.getrelative(cfg.project.locatio" |
| 57 | 57 | "n, item)\nend\nend\nif item then\nif pathstyle == \"windows\" and part ~= \"object\" then\nitem = path.translate(item, \"\\\\\")\nend\nif not table.contains(result, item) then\ntable.insert(result, item)\nend\nend\nend\nreturn result\nend\nfunction premake.getnamestyle(cfg)\nreturn premake.platforms[cfg.platform].namestyle or premake.gettool(cfg).namestyle or \"posix\"\nend\nfunction premake.getpathstyle(cfg)\nif premake.action.current().os == \"windows\" then\nreturn \"windows\"\nelse\nreturn \"posix\"\nend\nend\nfunction premake.gettarget(cfg, direction, pathstyle, namestyle, system)\nif system == \"bsd\" then\nsystem = \"linux\"\nend\nlocal kind = cfg.kind\nif premake.iscppproject(cfg) then\nif (namestyle == \"windows\" or system == \"windows\")\nand kind == \"SharedLib\" and direction == \"link\"\nand not cfg.flags.NoImportLib\nthen\nkind = \"StaticLib\"\nend\nif namestyle == \"posix\" and system == \"windows\" and kind ~= \"StaticLib\" then\nnamestyle = \"windows\"\nend\nend\nlocal field = \"build\"\nif" |
| 58 | | " direction == \"link\" and cfg.kind == \"SharedLib\" then\nfield = \"implib\"\nend\nlocal name = cfg[field..\"name\"] or cfg.targetname or cfg.project.name\nlocal dir = cfg[field..\"dir\"] or cfg.targetdir or path.getrelative(cfg.location, cfg.basedir)\nlocal subdir = cfg[field..\"subdir\"] or cfg.targetsubdir or \".\"\nlocal prefix = \"\"\nlocal suffix = \"\"\nlocal ext = \"\"\nlocal bundlepath, bundlename\ndir = path.join(dir, subdir)\nif namestyle == \"windows\" then\nif kind == \"ConsoleApp\" or kind == \"WindowedApp\" then\next = \".exe\"\nelseif kind == \"SharedLib\" then\next = \".dll\"\nelseif kind == \"StaticLib\" then\next = \".lib\"\nend\nelseif namestyle == \"posix\" then\nif kind == \"WindowedApp\" and system == \"macosx\" then\nbundlename = name .. \".app\"\nbundlepath = path.join(dir, bundlename)\ndir = path.join(bundlepath, \"Contents/MacOS\")\nelseif (kind == \"ConsoleApp\" or kind == \"WindowedApp\") and system == \"os2\" then ext = \".exe\"\nelseif kind == \"SharedLib\" then\np" |
| 59 | | "refix = \"lib\"\next = iif(system == \"macosx\", \".dylib\", \".so\")\nelseif kind == \"StaticLib\" then\nprefix = \"lib\"\next = \".a\"\nend\nelseif namestyle == \"PS3\" then\nif kind == \"ConsoleApp\" or kind == \"WindowedApp\" then\next = \".elf\"\nelseif kind == \"StaticLib\" then\nprefix = \"lib\"\next = \".a\"\nend\nelseif namestyle == \"Orbis\" then\nif kind == \"ConsoleApp\" or kind == \"WindowedApp\" then\next = \".elf\"\nelseif kind == \"StaticLib\" then\nprefix = \"lib\"\next = \".a\"\nend\nend\nprefix = cfg[field..\"prefix\"] or cfg.targetprefix or prefix\nsuffix = cfg[field..\"suffix\"] or cfg.targetsuffix or suffix\next = cfg[field..\"extension\"] or cfg.targetextension or ext\nlocal result = { }\nresult.basename = name .. suffix\nresult.name = prefix .. name .. suffix .. ext\nresult.directory = dir\nresult.subdirectory = subdir\nresult.prefix = prefix\nresult.suffix = suffix\nresult.fullpath = path.join(result.directory, result.name)\nresult.bundlepath = bundl" |
| 60 | | "epath or result.fullpath\nif pathstyle == \"windows\" then\nresult.directory = path.translate(result.directory, \"\\\\\")\nresult.subdirectory = path.translate(result.subdirectory, \"\\\\\")\nresult.fullpath = path.translate(result.fullpath, \"\\\\\")\nend\nreturn result\nend\nfunction premake.gettool(cfg)\nif premake.iscppproject(cfg) then\nif _OPTIONS.cc then\nreturn premake[_OPTIONS.cc]\nend\nlocal action = premake.action.current()\nif action.valid_tools then\nreturn premake[action.valid_tools.cc[1]]\nend\nreturn premake.gcc\nelse\nreturn premake.dotnet\nend\nend\nfunction premake.project.getvpath(prj, abspath)\nlocal vpath = abspath\nlocal fname = path.getname(abspath)\nlocal max = abspath:len() - fname:len()\nfor replacement, patterns in pairs(prj.vpaths or {}) do\nfor _, pattern in ipairs(patterns) do\nlocal i = abspath:find(path.wildcards(pattern))\nif i == 1 then\ni = pattern:find(\"*\", 1, true) or (pattern:len() + 1)\nlocal leaf\nif i < max then\nleaf = abspath:sub(i)\nelse\nleaf = fname\nend" |
| 61 | | "\nif leaf:startswith(\"/\") then\nleaf = leaf:sub(2)\nend\nlocal stem = \"\"\nif replacement:len() > 0 then\nstem, stars = replacement:gsub(\"%*\", \"\")\nif stars == 0 then\nleaf = path.getname(leaf)\nend\nelse\nleaf = path.getname(leaf)\nend\nvpath = path.join(stem, leaf)\nend\nend\nend\nreturn path.trimdots(vpath)\nend\nfunction premake.hascppproject(sln)\nfor prj in premake.solution.eachproject(sln) do\nif premake.iscppproject(prj) then\nreturn true\nend\nend\nend\nfunction premake.hasdotnetproject(sln)\nfor prj in premake.solution.eachproject(sln) do\nif premake.isdotnetproject(prj) then\nreturn true\nend\nend\nend\nfunction premake.project.iscproject(prj)\nreturn prj.language == \"C\"\nend\nfunction premake.iscppproject(prj)\nreturn (prj.language == \"C\" or prj.language == \"C++\")\nend\nfunction premake.isdotnetproject(prj)\nreturn (prj.language == \"C#\")\nend\n", |
| 58 | " direction == \"link\" and cfg.kind == \"SharedLib\" then\nfield = \"implib\"\nend\nlocal name = cfg[field..\"name\"] or cfg.targetname or cfg.project.name\nlocal dir = cfg[field..\"dir\"] or cfg.targetdir or path.getrelative(cfg.location, cfg.basedir)\nlocal subdir = cfg[field..\"subdir\"] or cfg.targetsubdir or \".\"\nlocal prefix = \"\"\nlocal suffix = \"\"\nlocal ext = \"\"\nlocal bundlepath, bundlename\ndir = path.join(dir, subdir)\nif namestyle == \"windows\" then\nif kind == \"ConsoleApp\" or kind == \"WindowedApp\" then\next = \".exe\"\nelseif kind == \"SharedLib\" then\next = \".dll\"\nelseif kind == \"StaticLib\" then\next = \".lib\"\nend\nelseif namestyle == \"posix\" then\nif kind == \"WindowedApp\" and system == \"macosx\" then\nbundlename = name .. \".app\"\nbundlepath = path.join(dir, bundlename)\ndir = path.join(bundlepath, \"Contents/MacOS\")\nelseif kind == \"SharedLib\" then\nprefix = \"lib\"\next = iif(system == \"macosx\", \".dylib\", \".so\")\nelseif kind == \"StaticLib\" th" |
| 59 | "en\nprefix = \"lib\"\next = \".a\"\nend\nelseif namestyle == \"PS3\" then\nif kind == \"ConsoleApp\" or kind == \"WindowedApp\" then\next = \".elf\"\nelseif kind == \"StaticLib\" then\nprefix = \"lib\"\next = \".a\"\nend\nelseif namestyle == \"Orbis\" then\nif kind == \"ConsoleApp\" or kind == \"WindowedApp\" then\next = \".elf\"\nelseif kind == \"StaticLib\" then\nprefix = \"lib\"\next = \".a\"\nend\nend\nprefix = cfg[field..\"prefix\"] or cfg.targetprefix or prefix\nsuffix = cfg[field..\"suffix\"] or cfg.targetsuffix or suffix\next = cfg[field..\"extension\"] or cfg.targetextension or ext\nlocal result = { }\nresult.basename = name .. suffix\nresult.name = prefix .. name .. suffix .. ext\nresult.directory = dir\nresult.subdirectory = subdir\nresult.prefix = prefix\nresult.suffix = suffix\nresult.fullpath = path.join(result.directory, result.name)\nresult.bundlepath = bundlepath or result.fullpath\nif pathstyle == \"windows\" then\nresult.directory = path.translate(resul" |
| 60 | "t.directory, \"\\\\\")\nresult.subdirectory = path.translate(result.subdirectory, \"\\\\\")\nresult.fullpath = path.translate(result.fullpath, \"\\\\\")\nend\nreturn result\nend\nfunction premake.gettool(cfg)\nif premake.iscppproject(cfg) then\nif _OPTIONS.cc then\nreturn premake[_OPTIONS.cc]\nend\nlocal action = premake.action.current()\nif action.valid_tools then\nreturn premake[action.valid_tools.cc[1]]\nend\nreturn premake.gcc\nelse\nreturn premake.dotnet\nend\nend\nfunction premake.project.getvpath(prj, abspath)\nlocal vpath = abspath\nlocal fname = path.getname(abspath)\nlocal max = abspath:len() - fname:len()\nfor replacement, patterns in pairs(prj.vpaths or {}) do\nfor _, pattern in ipairs(patterns) do\nlocal i = abspath:find(path.wildcards(pattern))\nif i == 1 then\ni = pattern:find(\"*\", 1, true) or (pattern:len() + 1)\nlocal leaf\nif i < max then\nleaf = abspath:sub(i)\nelse\nleaf = fname\nend\nif leaf:startswith(\"/\") then\nleaf = leaf:sub(2)\nend\nlocal stem = \"\"\nif replacement:len() > 0" |
| 61 | " then\nstem, stars = replacement:gsub(\"%*\", \"\")\nif stars == 0 then\nleaf = path.getname(leaf)\nend\nelse\nleaf = path.getname(leaf)\nend\nvpath = path.join(stem, leaf)\nend\nend\nend\nreturn path.trimdots(vpath)\nend\nfunction premake.hascppproject(sln)\nfor prj in premake.solution.eachproject(sln) do\nif premake.iscppproject(prj) then\nreturn true\nend\nend\nend\nfunction premake.hasdotnetproject(sln)\nfor prj in premake.solution.eachproject(sln) do\nif premake.isdotnetproject(prj) then\nreturn true\nend\nend\nend\nfunction premake.project.iscproject(prj)\nreturn prj.language == \"C\"\nend\nfunction premake.iscppproject(prj)\nreturn (prj.language == \"C\" or prj.language == \"C++\")\nend\nfunction premake.isdotnetproject(prj)\nreturn (prj.language == \"C#\")\nend\n", |
| 62 | 62 | |
| 63 | 63 | /* base/config.lua */ |
| 64 | 64 | "premake.config = { }\nlocal config = premake.config\nfunction premake.config.isdebugbuild(cfg)\nif cfg.flags.Optimize or cfg.flags.OptimizeSize or cfg.flags.OptimizeSpeed then\nreturn false\nend\nif not cfg.flags.Symbols then\nreturn false\nend\nreturn true\nend\nfunction premake.config.isincrementallink(cfg)\nif cfg.kind == \"StaticLib\" \nor config.isoptimizedbuild(cfg.flags)\nor cfg.flags.NoIncrementalLink then\nreturn false\nend\nreturn true\nend\nfunction premake.config.isoptimizedbuild(flags)\nreturn flags.Optimize or flags.OptimizeSize or flags.OptimizeSpeed\nend\n", |
| r249051 | r249052 | |
|---|
| 184 | 184 | "ving)\nelse\n_p('\\t@echo Archiving %s', prj.name)\nend\nif (not prj.archivesplit_size) then\nprj.archivesplit_size=200\nend\nif (not prj.options.ArchiveSplit) then\n_p('\\t$(SILENT) $(LINKCMD) $(OBJECTS)')\nelse\n_p('\\t$(call RM,$(TARGET))')\n_p('\\t@$(call max_args,$(LINKCMD),'.. prj.archivesplit_size ..',$(OBJECTS))')\n_p('\\t$(SILENT) $(LINKCMD_NDX)')\nend\nelse\nif prj.msglinking then\n_p('\\t@echo ' .. prj.msglinking)\nelse\n_p('\\t@echo Linking %s', prj.name)\nend\n_p('\\t$(SILENT) $(LINKCMD)')\nend\n_p('\\t$(POSTBUILDCMDS)')\n_p('')\n_p('$(TARGETDIR):')\npremake.make_mkdirrule(\"$(TARGETDIR)\")\n_p('$(OBJDIRS):')\nif (not prj.solution.messageskip) or (not table.contains(prj.solution.messageskip, \"SkipCreatingMessage\")) then\n_p('\\t@echo Creating $(@)')\nend\n_p('\\t-$(call MKDIR,$@)')\n_p('')\nif os.is(\"MacOSX\") and prj.kind == \"WindowedApp\" then\n_p('$(dir $(TARGETDIR))PkgInfo:')\n_p('$(dir $(TARGETDIR))Info.plist:')\n_p('')\nend\n_p('clean:')\nif (not prj.solution.messageskip) or (not table.c" |
| 185 | 185 | "ontains(prj.solution.messageskip, \"SkipCleaningMessage\")) then\n_p('\\t@echo Cleaning %s', prj.name)\nend\n_p('ifeq (posix,$(SHELLTYPE))')\n_p('\\t$(SILENT) rm -f $(TARGET)')\n_p('\\t$(SILENT) rm -rf $(OBJDIR)')\n_p('else')\n_p('\\t$(SILENT) if exist $(subst /,\\\\\\\\,$(TARGET)) del $(subst /,\\\\\\\\,$(TARGET))')\n_p('\\t$(SILENT) if exist $(subst /,\\\\\\\\,$(OBJDIR)) rmdir /s /q $(subst /,\\\\\\\\,$(OBJDIR))')\n_p('endif')\n_p('')\n_p('prebuild:')\n_p('\\t$(PREBUILDCMDS)')\n_p('')\n_p('prelink:')\n_p('\\t$(PRELINKCMDS)')\n_p('')\ncpp.pchrules(prj)\ncpp.fileRules(prj)\ncpp.dependencyRules(prj)\nfor _, custombuildtask in ipairs(prj.custombuildtask or {}) do\nfor _, buildtask in ipairs(custombuildtask or {}) do\nlocal deps = string.format(\"%s \",path.getrelative(prj.location,buildtask[1]))\nfor _, depdata in ipairs(buildtask[3] or {}) do\ndeps = deps .. string.format(\"%s \",path.getrelative(prj.location,depdata))\nend\n_p('%s: %s'\n,path.getrelative(prj.location,buildtask[2])\n, deps\n)\nfor _, cmdline " |
| 186 | 186 | "in ipairs(buildtask[4] or {}) do\nlocal cmd = cmdline\nlocal num = 1\nfor _, depdata in ipairs(buildtask[3] or {}) do\ncmd = string.gsub(cmd,\"%$%(\" .. num ..\"%)\", string.format(\"%s \",path.getrelative(prj.location,depdata)))\nnum = num + 1\nend\ncmd = string.gsub(cmd, \"%$%(<%)\", \"$<\")\ncmd = string.gsub(cmd, \"%$%(@%)\", \"$@\")\n \n_p('\\t$(SILENT) %s',cmd)\nend\n_p('')\nend\nend\n_p('-include $(OBJECTS:%%.o=%%.d)')\n_p('ifneq (,$(PCH))')\n_p(' -include $(OBJDIR)/$(notdir $(PCH)).d')\n_p('endif')\nend\nfunction premake.gmake_cpp_header(prj, cc, platforms)\n_p('# %s project makefile autogenerated by GENie', premake.action.current().shortname)\n_p('ifndef config')\n_p(' config=%s', _MAKE.esc(premake.getconfigname(prj.solution.configurations[1], platforms[1], true)))\n_p('endif')\n_p('')\n_p('ifndef verbose')\n_p(' SILENT = @')\n_p('endif')\n_p('')\n_p('SHELLTYPE := msdos')\n_p('ifeq (,$(ComSpec)$(COMSPEC))')\n_p(' SHELLTYPE := posix')\n_p('endif')\n_p('ifeq (/bin,$(findstring /bin,$(SHELL)))')\n_p(" |
| 187 | | "' SHELLTYPE := posix')\n_p('endif')\n_p('ifeq (/bin,$(findstring /bin,$(MAKESHELL)))')\n_p(' SHELLTYPE := posix')\n_p('endif')\n_p('')\n_p('ifeq (posix,$(SHELLTYPE))')\n_p(' MKDIR = $(SILENT) mkdir -p \"$(1)\"')\n_p(' COPY = $(SILENT) cp -fR \"$(1)\" \"$(2)\"')\n_p(' RM= $(SILENT) rm -f \"$(1)\"')\n_p('else')\n_p(' MKDIR = $(SILENT) mkdir \"$(subst /,\\\\\\\\,$(1))\" 2> nul || exit 0')\n_p(' COPY = $(SILENT) copy /Y \"$(subst /,\\\\\\\\,$(1))\" \"$(subst /,\\\\\\\\,$(2))\"')\n_p(' RM = $(SILENT) del /F \"$(subst /,\\\\\\\\,$(1))\" 2> nul || exit 0')\n_p('endif')\n_p('')\n_p('CC = %s', cc.cc)\n_p('CXX = %s', cc.cxx)\n_p('AR = %s', cc.ar)\n_p('')\n_p('ifndef RESCOMP')\n_p(' ifdef WINDRES')\n_p(' RESCOMP = $(WINDRES)')\n_p(' else')\n_p(' RESCOMP = windres')\n_p(' endif')\n_p('endif')\n_p('')\nend\nfunction premake.gmake_cpp_config(prj, cfg, cc)\n_p('ifeq ($(config),%s)', _MAKE.esc(cfg.shortname))\ncpp.platformtools(cfg, cc)\n_p(' ' .. (table.contains(premake.make.override,\"OBJDIR\") and " |
| 188 | | "\"override \" or \"\") .. 'OBJDIR = %s', _MAKE.esc(cfg.objectsdir))\n_p(' ' .. (table.contains(premake.make.override,\"TARGETDIR\") and \"override \" or \"\") .. 'TARGETDIR = %s', _MAKE.esc(cfg.buildtarget.directory))\n_p(' ' .. (table.contains(premake.make.override,\"TARGET\") and \"override \" or \"\") .. 'TARGET = $(TARGETDIR)/%s', _MAKE.esc(cfg.buildtarget.name))\n_p(' DEFINES +=%s', make.list(cc.getdefines(cfg.defines)))\n_p(' INCLUDES +=%s', make.list(cc.getincludedirs(cfg.includedirs)))\ncpp.pchconfig(cfg)\ncpp.flags(cfg, cc)\ncpp.linker(prj, cfg, cc)\n_p(' OBJECTS := \\\\')\nfor _, file in ipairs(prj.files) do\nif path.iscppfile(file) then\nif not table.icontains(cfg.excludes, file) then\n_p('\\t$(OBJDIR)/%s.o \\\\'\n, _MAKE.esc(path.trimdots(path.removeext(file)))\n)\nend\nend\nend\n_p('')\n_p(' define PREBUILDCMDS')\nif #cfg.prebuildcommands > 0 then\n_p('\\t@echo Running pre-build commands')\n_p('\\t%s', table.implode(cfg.prebuildcommands, \"\", \"\", \"\\n\\t\"))\nend\n_p(' " |
| 189 | | " endef')\n_p(' define PRELINKCMDS')\nif #cfg.prelinkcommands > 0 then\n_p('\\t@echo Running pre-link commands')\n_p('\\t%s', table.implode(cfg.prelinkcommands, \"\", \"\", \"\\n\\t\"))\nend\n_p(' endef')\n_p(' define POSTBUILDCMDS')\nif #cfg.postbuildcommands > 0 then\n_p('\\t@echo Running post-build commands')\n_p('\\t%s', table.implode(cfg.postbuildcommands, \"\", \"\", \"\\n\\t\"))\nend\n_p(' endef')\nmake.settings(cfg, cc)\n_p('endif')\n_p('')\nend\nfunction cpp.platformtools(cfg, cc)\nlocal platform = cc.platforms[cfg.platform]\nif platform.cc then\n_p(' CC = %s', platform.cc)\nend\nif platform.cxx then\n_p(' CXX = %s', platform.cxx)\nend\nif platform.ar then\n_p(' AR = %s', platform.ar)\nend\nend\nfunction cpp.flags(cfg, cc)\nif cfg.pchheader and not cfg.flags.NoPCH then\n_p(' FORCE_INCLUDE += -include $(OBJDIR)/$(notdir $(PCH))')\nend\nif #cfg.forcedincludes > 0 then\n_p(' FORCE_INCLUDE += -include %s'\n,premake.esc(table.concat(cfg.forcedincludes, \";\")))\nend\n_p(' AL" |
| 190 | | "L_CPPFLAGS += $(CPPFLAGS) %s $(DEFINES) $(INCLUDES)', table.concat(cc.getcppflags(cfg), \" \"))\n_p(' ALL_CFLAGS += $(CFLAGS) $(ALL_CPPFLAGS) $(ARCH)%s', make.list(table.join(cc.getcflags(cfg), cfg.buildoptions, cfg.buildoptions_c)))\n_p(' ALL_CXXFLAGS += $(CXXFLAGS) $(CFLAGS) $(ALL_CPPFLAGS) $(ARCH)%s', make.list(table.join(cc.getcflags(cfg), cc.getcxxflags(cfg), cfg.buildoptions, cfg.buildoptions_cpp)))\n_p(' ALL_OBJCFLAGS += $(CXXFLAGS) $(CFLAGS) $(ALL_CPPFLAGS) $(ARCH)%s', make.list(table.join(cc.getcflags(cfg), cc.getcxxflags(cfg), cfg.buildoptions, cfg.buildoptions_objc)))\n_p(' ALL_RESFLAGS += $(RESFLAGS) $(DEFINES) $(INCLUDES)%s',\n make.list(table.join(cc.getdefines(cfg.resdefines),\n cc.getincludedirs(cfg.resincludedirs), cfg.resoptions)))\nend\nfunction cpp.linker(prj, cfg, cc)\n_p(' ALL_LDFLAGS += $(LDFLAGS)%s', make.list(table.join(cc.getlibdirflags(cfg), cc.getldflags(cfg), cfg.linkoptions)))\n_p(' LDDEPS +=%s', make.list(_MAKE.esc(premake.ge" |
| 191 | | "tlinks(cfg, \"siblings\", \"fullpath\"))))\n_p(' LIBS += $(LDDEPS)%s', make.list(cc.getlinkflags(cfg)))\nif cfg.kind == \"StaticLib\" then\nif cfg.platform:startswith(\"Universal\") then\n_p(' LINKCMD = libtool -o $(TARGET)')\nelse\nif (not prj.options.ArchiveSplit) then\nif cc.llvm then\n_p(' LINKCMD = $(AR) rcs $(TARGET)')\nelse\n_p(' LINKCMD = $(AR) -rcs $(TARGET)')\nend\nelse\nif cc.llvm then\n_p(' LINKCMD = $(AR) qc $(TARGET)')\n_p(' LINKCMD_NDX= $(AR) cs $(TARGET)')\nelse\n_p(' LINKCMD = $(AR) -qc $(TARGET)')\n_p(' LINKCMD_NDX= $(AR) -cs $(TARGET)')\nend\nend\nend\nelse\nlocal tool = iif(cfg.language == \"C\", \"CC\", \"CXX\")\n_p(' LINKCMD = $(%s) -o $(TARGET) $(OBJECTS) $(RESOURCES) $(ARCH) $(ALL_LDFLAGS) $(LIBS)', tool)\nend\nend\nfunction cpp.pchconfig(cfg)\nif not cfg.pchheader or cfg.flags.NoPCH then\nreturn\nend\nlocal pch = cfg.pchheader\nfor _, incdir in ipairs(cfg.includedirs) do\nlocal abspath = path.getabsolute(path.join(cfg.project.location, incdir))\nlocal te" |
| 192 | | "stname = path.join(abspath, pch)\nif os.isfile(testname) then\npch = path.getrelative(cfg.location, testname)\nbreak\nend\nend\n_p(' PCH = %s', _MAKE.esc(pch))\n_p(' GCH = $(OBJDIR)/$(notdir $(PCH)).gch')\nend\nfunction cpp.pchrules(prj)\n_p('ifneq (,$(PCH))')\n_p('$(GCH): $(PCH)')\n_p('\\t@echo $(notdir $<)')\nlocal cmd = iif(prj.language == \"C\", \"$(CC) -x c-header $(ALL_CFLAGS)\", \"$(CXX) -x c++-header $(ALL_CXXFLAGS)\")\n_p('\\t$(SILENT) %s -MMD -MP $(DEFINES) $(INCLUDES) -o \"$@\" -MF \"$(@:%%.gch=%%.d)\" -c \"$<\"', cmd)\n_p('endif')\n_p('')\nend\nfunction cpp.fileRules(prj)\nfor _, file in ipairs(prj.files or {}) do\nif path.iscppfile(file) then\n_p('$(OBJDIR)/%s.o: %s'\n, _MAKE.esc(path.trimdots(path.removeext(file)))\n, _MAKE.esc(file)\n)\nif (path.isobjcfile(file) and prj.msgcompile_objc) then\n_p('\\t@echo ' .. prj.msgcompile_objc)\nelseif prj.msgcompile then\n_p('\\t@echo ' .. prj.msgcompile)\nelse\n_p('\\t@echo $(notdir $<)')\nend\nif (path.isobjcfile(file)) then\n_p('\\t$(SILEN" |
| 193 | | "T) $(CXX) $(ALL_OBJCFLAGS) $(FORCE_INCLUDE) -o \"$@\" -MF $(@:%%.o=%%.d) -c \"$<\"')\nelse\ncpp.buildcommand(path.iscfile(file) and not prj.options.ForceCPP, \"o\")\nend\nfor _, task in ipairs(prj.postcompiletasks or {}) do\n_p('\\t$(SILENT) %s', task)\n_p('')\nend\n_p('')\nelseif (path.getextension(file) == \".rc\") then\n_p('$(OBJDIR)/%s.res: %s', _MAKE.esc(path.getbasename(file)), _MAKE.esc(file))\nif prj.msgresource then\n_p('\\t@echo ' .. prj.msgresource)\nelse\n_p('\\t@echo $(notdir $<)')\nend\n_p('\\t$(SILENT) $(RESCOMP) $< -O coff -o \"$@\" $(ALL_RESFLAGS)')\n_p('')\nend\nend\nend\nfunction cpp.dependencyRules(prj)\nfor _, dependency in ipairs(prj.dependency or {}) do\nfor _, dep in ipairs(dependency or {}) do\nif (dep[3]==nil or dep[3]==false) then\n_p('$(OBJDIR)/%s.o: %s'\n, _MAKE.esc(path.trimdots(path.removeext(path.getrelative(prj.location, dep[1]))))\n, _MAKE.esc(path.getrelative(prj.location, dep[2]))\n)\nelse\n_p('%s: %s'\n, _MAKE.esc(dep[1])\n, _MAKE.esc(path.getrelative(prj.location, dep[2]))" |
| 194 | | "\n)\nend\n_p('')\nend\nend\nend\nfunction cpp.buildcommand(iscfile, objext)\nlocal flags = iif(iscfile, '$(CC) $(ALL_CFLAGS)', '$(CXX) $(ALL_CXXFLAGS)')\n_p('\\t$(SILENT) %s $(FORCE_INCLUDE) -o \"$@\" -MF $(@:%%.%s=%%.d) -c \"$<\"', flags, objext)\nend\n", |
| 187 | "' SHELLTYPE := posix')\n_p('endif')\n_p('')\n_p('ifeq (posix,$(SHELLTYPE))')\n_p(' MKDIR = $(SILENT) mkdir -p \"$(1)\"')\n_p(' COPY = $(SILENT) cp -fR \"$(1)\" \"$(2)\"')\n_p(' RM= $(SILENT) rm -f \"$(1)\"')\n_p('else')\n_p(' MKDIR = $(SILENT) mkdir \"$(subst /,\\\\\\\\,$(1))\" 2> nul || exit 0')\n_p(' COPY = $(SILENT) copy /Y \"$(subst /,\\\\\\\\,$(1))\" \"$(subst /,\\\\\\\\,$(2))\"')\n_p(' RM = $(SILENT) del /F \"$(subst /,\\\\\\\\,$(1))\" 2> nul || exit 0')\n_p('endif')\n_p('')\n_p('CC = %s', cc.cc)\n_p('CXX = %s', cc.cxx)\n_p('AR = %s', cc.ar)\n_p('')\n_p('ifndef RESCOMP')\n_p(' ifdef WINDRES')\n_p(' RESCOMP = $(WINDRES)')\n_p(' else')\n_p(' RESCOMP = windres')\n_p(' endif')\n_p('endif')\n_p('')\nend\nfunction premake.gmake_cpp_config(prj, cfg, cc)\n_p('ifeq ($(config),%s)', _MAKE.esc(cfg.shortname))\ncpp.platformtools(cfg, cc)\n_p(' ' .. (table.contains(premake.make.override,\"OBJDIR\") and \"override \" or \"\") .. 'OBJDIR = %s', _MAKE.esc(cfg.objectsdir))\n_p(' ' .. (tabl" |
| 188 | "e.contains(premake.make.override,\"TARGETDIR\") and \"override \" or \"\") .. 'TARGETDIR = %s', _MAKE.esc(cfg.buildtarget.directory))\n_p(' ' .. (table.contains(premake.make.override,\"TARGET\") and \"override \" or \"\") .. 'TARGET = $(TARGETDIR)/%s', _MAKE.esc(cfg.buildtarget.name))\n_p(' DEFINES +=%s', make.list(cc.getdefines(cfg.defines)))\n_p(' INCLUDES +=%s', make.list(cc.getincludedirs(cfg.includedirs)))\ncpp.pchconfig(cfg)\ncpp.flags(cfg, cc)\ncpp.linker(prj, cfg, cc)\n_p(' OBJECTS := \\\\')\nfor _, file in ipairs(prj.files) do\nif path.iscppfile(file) then\nif not table.icontains(cfg.excludes, file) then\n_p('\\t$(OBJDIR)/%s.o \\\\'\n, _MAKE.esc(path.trimdots(path.removeext(file)))\n)\nend\nend\nend\n_p('')\n_p(' define PREBUILDCMDS')\nif #cfg.prebuildcommands > 0 then\n_p('\\t@echo Running pre-build commands')\n_p('\\t%s', table.implode(cfg.prebuildcommands, \"\", \"\", \"\\n\\t\"))\nend\n_p(' endef')\n_p(' define PRELINKCMDS')\nif #cfg.prelinkcommands > 0 then\n_p('\\t@echo Running" |
| 189 | " pre-link commands')\n_p('\\t%s', table.implode(cfg.prelinkcommands, \"\", \"\", \"\\n\\t\"))\nend\n_p(' endef')\n_p(' define POSTBUILDCMDS')\nif #cfg.postbuildcommands > 0 then\n_p('\\t@echo Running post-build commands')\n_p('\\t%s', table.implode(cfg.postbuildcommands, \"\", \"\", \"\\n\\t\"))\nend\n_p(' endef')\nmake.settings(cfg, cc)\n_p('endif')\n_p('')\nend\nfunction cpp.platformtools(cfg, cc)\nlocal platform = cc.platforms[cfg.platform]\nif platform.cc then\n_p(' CC = %s', platform.cc)\nend\nif platform.cxx then\n_p(' CXX = %s', platform.cxx)\nend\nif platform.ar then\n_p(' AR = %s', platform.ar)\nend\nend\nfunction cpp.flags(cfg, cc)\nif cfg.pchheader and not cfg.flags.NoPCH then\n_p(' FORCE_INCLUDE += -include $(OBJDIR)/$(notdir $(PCH))')\nend\nif #cfg.forcedincludes > 0 then\n_p(' FORCE_INCLUDE += -include %s'\n,premake.esc(table.concat(cfg.forcedincludes, \";\")))\nend\n_p(' ALL_CPPFLAGS += $(CPPFLAGS) %s $(DEFINES) $(INCLUDES)', table.concat(cc.getcppflags(cfg), \" " |
| 190 | "\"))\n_p(' ALL_CFLAGS += $(CFLAGS) $(ALL_CPPFLAGS) $(ARCH)%s', make.list(table.join(cc.getcflags(cfg), cfg.buildoptions, cfg.buildoptions_c)))\n_p(' ALL_CXXFLAGS += $(CXXFLAGS) $(CFLAGS) $(ALL_CPPFLAGS) $(ARCH)%s', make.list(table.join(cc.getcflags(cfg), cc.getcxxflags(cfg), cfg.buildoptions, cfg.buildoptions_cpp)))\n_p(' ALL_OBJCFLAGS += $(CXXFLAGS) $(CFLAGS) $(ALL_CPPFLAGS) $(ARCH)%s', make.list(table.join(cc.getcflags(cfg), cc.getcxxflags(cfg), cfg.buildoptions, cfg.buildoptions_objc)))\n_p(' ALL_RESFLAGS += $(RESFLAGS) $(DEFINES) $(INCLUDES)%s',\n make.list(table.join(cc.getdefines(cfg.resdefines),\n cc.getincludedirs(cfg.resincludedirs), cfg.resoptions)))\nend\nfunction cpp.linker(prj, cfg, cc)\n_p(' ALL_LDFLAGS += $(LDFLAGS)%s', make.list(table.join(cc.getlibdirflags(cfg), cc.getldflags(cfg), cfg.linkoptions)))\n_p(' LDDEPS +=%s', make.list(_MAKE.esc(premake.getlinks(cfg, \"siblings\", \"fullpath\"))))\n_p(' LIBS += $(LDDEPS)%s', make.list(cc.ge" |
| 191 | "tlinkflags(cfg)))\nif cfg.kind == \"StaticLib\" then\nif cfg.platform:startswith(\"Universal\") then\n_p(' LINKCMD = libtool -o $(TARGET)')\nelse\nif (not prj.options.ArchiveSplit) then\nif cc.llvm then\n_p(' LINKCMD = $(AR) rcs $(TARGET)')\nelse\n_p(' LINKCMD = $(AR) -rcs $(TARGET)')\nend\nelse\nif cc.llvm then\n_p(' LINKCMD = $(AR) qc $(TARGET)')\n_p(' LINKCMD_NDX= $(AR) cs $(TARGET)')\nelse\n_p(' LINKCMD = $(AR) -qc $(TARGET)')\n_p(' LINKCMD_NDX= $(AR) -cs $(TARGET)')\nend\nend\nend\nelse\nlocal tool = iif(cfg.language == \"C\", \"CC\", \"CXX\")\n_p(' LINKCMD = $(%s) -o $(TARGET) $(OBJECTS) $(RESOURCES) $(ARCH) $(ALL_LDFLAGS) $(LIBS)', tool)\nend\nend\nfunction cpp.pchconfig(cfg)\nif not cfg.pchheader or cfg.flags.NoPCH then\nreturn\nend\nlocal pch = cfg.pchheader\nfor _, incdir in ipairs(cfg.includedirs) do\nlocal abspath = path.getabsolute(path.join(cfg.project.location, incdir))\nlocal testname = path.join(abspath, pch)\nif os.isfile(testname) then\npch = path.getrelative(cfg.lo" |
| 192 | "cation, testname)\nbreak\nend\nend\n_p(' PCH = %s', _MAKE.esc(pch))\n_p(' GCH = $(OBJDIR)/$(notdir $(PCH)).gch')\nend\nfunction cpp.pchrules(prj)\n_p('ifneq (,$(PCH))')\n_p('$(GCH): $(PCH)')\n_p('\\t@echo $(notdir $<)')\nlocal cmd = iif(prj.language == \"C\", \"$(CC) -x c-header $(ALL_CFLAGS)\", \"$(CXX) -x c++-header $(ALL_CXXFLAGS)\")\n_p('\\t$(SILENT) %s -MMD -MP $(DEFINES) $(INCLUDES) -o \"$@\" -MF \"$(@:%%.gch=%%.d)\" -c \"$<\"', cmd)\n_p('endif')\n_p('')\nend\nfunction cpp.fileRules(prj)\nfor _, file in ipairs(prj.files or {}) do\nif path.iscppfile(file) then\n_p('$(OBJDIR)/%s.o: %s'\n, _MAKE.esc(path.trimdots(path.removeext(file)))\n, _MAKE.esc(file)\n)\nif (path.isobjcfile(file) and prj.msgcompile_objc) then\n_p('\\t@echo ' .. prj.msgcompile_objc)\nelseif prj.msgcompile then\n_p('\\t@echo ' .. prj.msgcompile)\nelse\n_p('\\t@echo $(notdir $<)')\nend\nif (path.isobjcfile(file)) then\n_p('\\t$(SILENT) $(CXX) $(ALL_OBJCFLAGS) $(FORCE_INCLUDE) -o \"$@\" -MF $(@:%%.o=%%.d) -c \"$<\"')\nelse\n" |
| 193 | "cpp.buildcommand(path.iscfile(file) and not prj.options.ForceCPP, \"o\")\nend\nfor _, task in ipairs(prj.postcompiletasks or {}) do\n_p('\\t$(SILENT) %s', task)\n_p('')\nend\n_p('')\nelseif (path.getextension(file) == \".rc\") then\n_p('$(OBJDIR)/%s.res: %s', _MAKE.esc(path.getbasename(file)), _MAKE.esc(file))\nif prj.msgresource then\n_p('\\t@echo ' .. prj.msgresource)\nelse\n_p('\\t@echo $(notdir $<)')\nend\n_p('\\t$(SILENT) $(RESCOMP) $< -O coff -o \"$@\" $(ALL_RESFLAGS)')\n_p('')\nend\nend\nend\nfunction cpp.dependencyRules(prj)\nfor _, dependency in ipairs(prj.dependency or {}) do\nfor _, dep in ipairs(dependency or {}) do\nif (dep[3]==nil or dep[3]==false) then\n_p('$(OBJDIR)/%s.o: %s'\n, _MAKE.esc(path.trimdots(path.removeext(path.getrelative(prj.location, dep[1]))))\n, _MAKE.esc(path.getrelative(prj.location, dep[2]))\n)\nelse\n_p('%s: %s'\n, _MAKE.esc(dep[1])\n, _MAKE.esc(path.getrelative(prj.location, dep[2]))\n)\nend\n_p('')\nend\nend\nend\nfunction cpp.buildcommand(iscfile, objext)\nlocal flags = i" |
| 194 | "if(iscfile, '$(CC) $(ALL_CFLAGS)', '$(CXX) $(ALL_CXXFLAGS)')\n_p('\\t$(SILENT) %s $(FORCE_INCLUDE) -o \"$@\" -MF $(@:%%.%s=%%.d) -c \"$<\"', flags, objext)\nend\n", |
| 195 | 195 | |
| 196 | 196 | /* actions/make/make_csharp.lua */ |
| 197 | 197 | "local function getresourcefilename(cfg, fname)\nif path.getextension(fname) == \".resx\" then\n local name = cfg.buildtarget.basename .. \".\"\n local dir = path.getdirectory(fname)\n if dir ~= \".\" then \nname = name .. path.translate(dir, \".\") .. \".\"\nend\nreturn \"$(OBJDIR)/\" .. _MAKE.esc(name .. path.getbasename(fname)) .. \".resources\"\nelse\nreturn fname\nend\nend\nfunction premake.make_csharp(prj)\nlocal csc = premake.dotnet\nlocal cfglibs = { }\nlocal cfgpairs = { }\nlocal anycfg\nfor cfg in premake.eachconfig(prj) do\nanycfg = cfg\ncfglibs[cfg] = premake.getlinks(cfg, \"siblings\", \"fullpath\")\ncfgpairs[cfg] = { }\nfor _, fname in ipairs(cfglibs[cfg]) do\nif path.getdirectory(fname) ~= cfg.buildtarget.directory then\ncfgpairs[cfg][\"$(TARGETDIR)/\" .. _MAKE.esc(path.getname(fname))] = _MAKE.esc(fname)\nend\nend\nend\nlocal sources = {}\nlocal embedded = { }\nlocal copypairs = { }\nfor fcfg in premake.project.eachfile(prj) do\nlocal action = csc.getbuildaction(fcfg)\nif action == \"Co" |
| 198 | 198 | "mpile\" then\ntable.insert(sources, fcfg.name)\nelseif action == \"EmbeddedResource\" then\ntable.insert(embedded, fcfg.name)\nelseif action == \"Content\" then\ncopypairs[\"$(TARGETDIR)/\" .. _MAKE.esc(path.getname(fcfg.name))] = _MAKE.esc(fcfg.name)\nelseif path.getname(fcfg.name):lower() == \"app.config\" then\ncopypairs[\"$(TARGET).config\"] = _MAKE.esc(fcfg.name)\nend\nend\nlocal paths = table.translate(prj.libdirs, function(v) return path.join(prj.basedir, v) end)\npaths = table.join({prj.basedir}, paths)\nfor _, libname in ipairs(premake.getlinks(prj, \"system\", \"fullpath\")) do\nlocal libdir = os.pathsearch(libname..\".dll\", unpack(paths))\nif (libdir) then\nlocal target = \"$(TARGETDIR)/\" .. _MAKE.esc(path.getname(libname))\nlocal source = path.getrelative(prj.basedir, path.join(libdir, libname))..\".dll\"\ncopypairs[target] = _MAKE.esc(source)\nend\nend\n_p('# %s project makefile autogenerated by GENie', premake.action.current().shortname)\n_p('')\n_p('ifndef config')\n_p(' config=%s', _MAKE.esc" |
| 199 | | "(prj.configurations[1]:lower()))\n_p('endif')\n_p('')\n_p('ifndef verbose')\n_p(' SILENT = @')\n_p('endif')\n_p('')\n_p('SHELLTYPE := msdos')\n_p('ifeq (,$(ComSpec)$(COMSPEC))')\n_p(' SHELLTYPE := posix')\n_p('endif')\n_p('ifeq (/bin,$(findstring /bin,$(SHELL)))')\n_p(' SHELLTYPE := posix')\n_p('endif')\n_p('ifeq (/bin,$(findstring /bin,$(MAKESHELL)))')\n_p(' SHELLTYPE := posix')\n_p('endif')\n_p('')\n_p('ifeq (posix,$(SHELLTYPE))')\n_p(' MKDIR = $(SILENT) mkdir -p \"$(1)\"')\n_p(' COPY = $(SILENT) cp -fR \"$(1)\" \"$(2)\"')\n_p('else')\n_p(' MKDIR = $(SILENT) mkdir \"$(subst /,\\\\\\\\,$(1))\" 2> nul')\n_p(' COPY = $(SILENT) copy /Y \"$(subst /,\\\\\\\\,$(1))\" \"$(subst /,\\\\\\\\,$(2))\"')\n_p('endif')\n_p('')\n_p('ifndef CSC')\n_p(' CSC=%s', csc.getcompilervar(prj))\n_p('endif')\n_p('')\n_p('ifndef RESGEN')\n_p(' RESGEN=resgen')\n_p('endif')\n_p('')\nlocal platforms = premake.filterplatforms(prj.solution, premake[_OPTIONS.cc].platforms)\ntable.insert(platforms, 1, \"\")\nfor cfg in premake.each" |
| 200 | | "config(prj) do\npremake.gmake_cs_config(cfg, csc, cfglibs)\nend\n_p('# To maintain compatibility with VS.NET, these values must be set at the project level')\n_p('TARGET := $(TARGETDIR)/%s', _MAKE.esc(prj.buildtarget.name))\n_p('FLAGS += /t:%s %s', csc.getkind(prj):lower(), table.implode(_MAKE.esc(prj.libdirs), \"/lib:\", \"\", \" \"))\n_p('REFERENCES += %s', table.implode(_MAKE.esc(premake.getlinks(prj, \"system\", \"basename\")), \"/r:\", \".dll\", \" \"))\n_p('')\n_p('SOURCES := \\\\')\nfor _, fname in ipairs(sources) do\n_p('\\t%s \\\\', _MAKE.esc(path.translate(fname)))\nend\n_p('')\n_p('EMBEDFILES := \\\\')\nfor _, fname in ipairs(embedded) do\n_p('\\t%s \\\\', getresourcefilename(prj, fname))\nend\n_p('')\n_p('COPYFILES += \\\\')\nfor target, source in pairs(cfgpairs[anycfg]) do\n_p('\\t%s \\\\', target)\nend\nfor target, source in pairs(copypairs) do\n_p('\\t%s \\\\', target)\nend\n_p('')\n_p('SHELLTYPE := msdos')\n_p('ifeq (,$(ComSpec)$(COMSPEC))')\n_p(' SHELLTYPE := posix')\n_p('endif')\n_p" |
| 201 | | "('ifeq (/bin,$(findstring /bin,$(SHELL)))')\n_p(' SHELLTYPE := posix')\n_p('endif')\n_p('ifeq (/bin,$(findstring /bin,$(MAKESHELL)))')\n_p(' SHELLTYPE := posix')\n_p('endif')\n_p('')\n_p('.PHONY: clean prebuild prelink')\n_p('')\n_p('all: $(TARGETDIR) $(OBJDIR) prebuild $(EMBEDFILES) $(COPYFILES) prelink $(TARGET)')\n_p('')\n_p('$(TARGET): $(SOURCES) $(EMBEDFILES) $(DEPENDS)')\n_p('\\t$(SILENT) $(CSC) /nologo /out:$@ $(FLAGS) $(REFERENCES) $(SOURCES) $(patsubst %%,/resource:%%,$(EMBEDFILES))')\n_p('\\t$(POSTBUILDCMDS)')\n_p('')\n_p('$(TARGETDIR):')\npremake.make_mkdirrule(\"$(TARGETDIR)\")\n_p('$(OBJDIR):')\npremake.make_mkdirrule(\"$(OBJDIR)\")\n_p('clean:')\n_p('\\t@echo Cleaning %s', prj.name)\n_p('ifeq (posix,$(SHELLTYPE))')\n_p('\\t$(SILENT) rm -f $(TARGETDIR)/%s.* $(COPYFILES)', prj.buildtarget.basename)\n_p('\\t$(SILENT) rm -rf $(OBJDIR)')\n_p('else')\n_p('\\t$(SILENT) if exist $(subst /,\\\\\\\\,$(TARGETDIR)/%s.*) del $(subst /,\\\\\\\\,$(TARGETDIR)/%s.*)', prj.buildtarget.basename, prj.buildtarget.b" |
| 202 | | "asename)\nfor target, source in pairs(cfgpairs[anycfg]) do\n_p('\\t$(SILENT) if exist $(subst /,\\\\\\\\,%s) del $(subst /,\\\\\\\\,%s)', target, target)\nend\nfor target, source in pairs(copypairs) do\n_p('\\t$(SILENT) if exist $(subst /,\\\\\\\\,%s) del $(subst /,\\\\\\\\,%s)', target, target)\nend\n_p('\\t$(SILENT) if exist $(subst /,\\\\\\\\,$(OBJDIR)) rmdir /s /q $(subst /,\\\\\\\\,$(OBJDIR))')\n_p('endif')\n_p('')\n_p('prebuild:')\n_p('\\t$(PREBUILDCMDS)')\n_p('')\n_p('prelink:')\n_p('\\t$(PRELINKCMDS)')\n_p('')\n_p('# Per-configuration copied file rules')\nfor cfg in premake.eachconfig(prj) do\n_p('ifneq (,$(findstring %s,$(config)))', _MAKE.esc(cfg.name:lower()))\nfor target, source in pairs(cfgpairs[cfg]) do\npremake.make_copyrule(source, target)\nend\n_p('endif')\n_p('')\nend\n_p('# Copied file rules')\nfor target, source in pairs(copypairs) do\npremake.make_copyrule(source, target)\nend\n_p('# Embedded file rules')\nfor _, fname in ipairs(embedded) do \nif path.getextension(fname) == \".resx\" then\n" |
| 203 | | "_p('%s: %s', getresourcefilename(prj, fname), _MAKE.esc(fname))\n_p('\\t$(SILENT) $(RESGEN) $^ $@')\nend\n_p('')\nend\nend\nfunction premake.gmake_cs_config(cfg, csc, cfglibs)\n_p('ifneq (,$(findstring %s,$(config)))', _MAKE.esc(cfg.name:lower()))\n_p(' TARGETDIR := %s', _MAKE.esc(cfg.buildtarget.directory))\n_p(' OBJDIR := %s', _MAKE.esc(cfg.objectsdir))\n_p(' DEPENDS := %s', table.concat(_MAKE.esc(premake.getlinks(cfg, \"dependencies\", \"fullpath\")), \" \"))\n_p(' REFERENCES := %s', table.implode(_MAKE.esc(cfglibs[cfg]), \"/r:\", \"\", \" \"))\n_p(' FLAGS += %s %s', table.implode(cfg.defines, \"/d:\", \"\", \" \"), table.concat(table.join(csc.getflags(cfg), cfg.buildoptions), \" \"))\n_p(' define PREBUILDCMDS')\nif #cfg.prebuildcommands > 0 then\n_p('\\t@echo Running pre-build commands')\n_p('\\t%s', table.implode(cfg.prebuildcommands, \"\", \"\", \"\\n\\t\"))\nend\n_p(' endef')\n_p(' define PRELINKCMDS')\nif #cfg.prelinkcommands > 0 then\n_p('\\t@echo Running pre-link commands')\n_p('\\" |
| 204 | | "t%s', table.implode(cfg.prelinkcommands, \"\", \"\", \"\\n\\t\"))\nend\n_p(' endef')\n_p(' define POSTBUILDCMDS')\nif #cfg.postbuildcommands > 0 then\n_p('\\t@echo Running post-build commands')\n_p('\\t%s', table.implode(cfg.postbuildcommands, \"\", \"\", \"\\n\\t\"))\nend\n_p(' endef')\n_p('endif')\n_p('')\nend\n", |
| 199 | "(prj.configurations[1]:lower()))\n_p('endif')\n_p('')\n_p('ifndef verbose')\n_p(' SILENT = @')\n_p('endif')\n_p('')\n_p('SHELLTYPE := msdos')\n_p('ifeq (,$(ComSpec)$(COMSPEC))')\n_p(' SHELLTYPE := posix')\n_p('endif')\n_p('ifeq (/bin,$(findstring /bin,$(SHELL)))')\n_p(' SHELLTYPE := posix')\n_p('endif')\n_p('')\n_p('ifeq (posix,$(SHELLTYPE))')\n_p(' MKDIR = $(SILENT) mkdir -p \"$(1)\"')\n_p(' COPY = $(SILENT) cp -fR \"$(1)\" \"$(2)\"')\n_p('else')\n_p(' MKDIR = $(SILENT) mkdir \"$(subst /,\\\\\\\\,$(1))\" 2> nul')\n_p(' COPY = $(SILENT) copy /Y \"$(subst /,\\\\\\\\,$(1))\" \"$(subst /,\\\\\\\\,$(2))\"')\n_p('endif')\n_p('')\n_p('ifndef CSC')\n_p(' CSC=%s', csc.getcompilervar(prj))\n_p('endif')\n_p('')\n_p('ifndef RESGEN')\n_p(' RESGEN=resgen')\n_p('endif')\n_p('')\nlocal platforms = premake.filterplatforms(prj.solution, premake[_OPTIONS.cc].platforms)\ntable.insert(platforms, 1, \"\")\nfor cfg in premake.eachconfig(prj) do\npremake.gmake_cs_config(cfg, csc, cfglibs)\nend\n_p('# To maintain compatibi" |
| 200 | "lity with VS.NET, these values must be set at the project level')\n_p('TARGET := $(TARGETDIR)/%s', _MAKE.esc(prj.buildtarget.name))\n_p('FLAGS += /t:%s %s', csc.getkind(prj):lower(), table.implode(_MAKE.esc(prj.libdirs), \"/lib:\", \"\", \" \"))\n_p('REFERENCES += %s', table.implode(_MAKE.esc(premake.getlinks(prj, \"system\", \"basename\")), \"/r:\", \".dll\", \" \"))\n_p('')\n_p('SOURCES := \\\\')\nfor _, fname in ipairs(sources) do\n_p('\\t%s \\\\', _MAKE.esc(path.translate(fname)))\nend\n_p('')\n_p('EMBEDFILES := \\\\')\nfor _, fname in ipairs(embedded) do\n_p('\\t%s \\\\', getresourcefilename(prj, fname))\nend\n_p('')\n_p('COPYFILES += \\\\')\nfor target, source in pairs(cfgpairs[anycfg]) do\n_p('\\t%s \\\\', target)\nend\nfor target, source in pairs(copypairs) do\n_p('\\t%s \\\\', target)\nend\n_p('')\n_p('SHELLTYPE := msdos')\n_p('ifeq (,$(ComSpec)$(COMSPEC))')\n_p(' SHELLTYPE := posix')\n_p('endif')\n_p('ifeq (/bin,$(findstring /bin,$(SHELL)))')\n_p(' SHELLTYPE := posix')\n_p('endif')\n_p('')" |
| 201 | "\n_p('.PHONY: clean prebuild prelink')\n_p('')\n_p('all: $(TARGETDIR) $(OBJDIR) prebuild $(EMBEDFILES) $(COPYFILES) prelink $(TARGET)')\n_p('')\n_p('$(TARGET): $(SOURCES) $(EMBEDFILES) $(DEPENDS)')\n_p('\\t$(SILENT) $(CSC) /nologo /out:$@ $(FLAGS) $(REFERENCES) $(SOURCES) $(patsubst %%,/resource:%%,$(EMBEDFILES))')\n_p('\\t$(POSTBUILDCMDS)')\n_p('')\n_p('$(TARGETDIR):')\npremake.make_mkdirrule(\"$(TARGETDIR)\")\n_p('$(OBJDIR):')\npremake.make_mkdirrule(\"$(OBJDIR)\")\n_p('clean:')\n_p('\\t@echo Cleaning %s', prj.name)\n_p('ifeq (posix,$(SHELLTYPE))')\n_p('\\t$(SILENT) rm -f $(TARGETDIR)/%s.* $(COPYFILES)', prj.buildtarget.basename)\n_p('\\t$(SILENT) rm -rf $(OBJDIR)')\n_p('else')\n_p('\\t$(SILENT) if exist $(subst /,\\\\\\\\,$(TARGETDIR)/%s.*) del $(subst /,\\\\\\\\,$(TARGETDIR)/%s.*)', prj.buildtarget.basename, prj.buildtarget.basename)\nfor target, source in pairs(cfgpairs[anycfg]) do\n_p('\\t$(SILENT) if exist $(subst /,\\\\\\\\,%s) del $(subst /,\\\\\\\\,%s)', target, target)\nend\nfor target, source in pa" |
| 202 | "irs(copypairs) do\n_p('\\t$(SILENT) if exist $(subst /,\\\\\\\\,%s) del $(subst /,\\\\\\\\,%s)', target, target)\nend\n_p('\\t$(SILENT) if exist $(subst /,\\\\\\\\,$(OBJDIR)) rmdir /s /q $(subst /,\\\\\\\\,$(OBJDIR))')\n_p('endif')\n_p('')\n_p('prebuild:')\n_p('\\t$(PREBUILDCMDS)')\n_p('')\n_p('prelink:')\n_p('\\t$(PRELINKCMDS)')\n_p('')\n_p('# Per-configuration copied file rules')\nfor cfg in premake.eachconfig(prj) do\n_p('ifneq (,$(findstring %s,$(config)))', _MAKE.esc(cfg.name:lower()))\nfor target, source in pairs(cfgpairs[cfg]) do\npremake.make_copyrule(source, target)\nend\n_p('endif')\n_p('')\nend\n_p('# Copied file rules')\nfor target, source in pairs(copypairs) do\npremake.make_copyrule(source, target)\nend\n_p('# Embedded file rules')\nfor _, fname in ipairs(embedded) do \nif path.getextension(fname) == \".resx\" then\n_p('%s: %s', getresourcefilename(prj, fname), _MAKE.esc(fname))\n_p('\\t$(SILENT) $(RESGEN) $^ $@')\nend\n_p('')\nend\nend\nfunction premake.gmake_cs_config(cfg, csc, cfglibs)\n_p('if" |
| 203 | "neq (,$(findstring %s,$(config)))', _MAKE.esc(cfg.name:lower()))\n_p(' TARGETDIR := %s', _MAKE.esc(cfg.buildtarget.directory))\n_p(' OBJDIR := %s', _MAKE.esc(cfg.objectsdir))\n_p(' DEPENDS := %s', table.concat(_MAKE.esc(premake.getlinks(cfg, \"dependencies\", \"fullpath\")), \" \"))\n_p(' REFERENCES := %s', table.implode(_MAKE.esc(cfglibs[cfg]), \"/r:\", \"\", \" \"))\n_p(' FLAGS += %s %s', table.implode(cfg.defines, \"/d:\", \"\", \" \"), table.concat(table.join(csc.getflags(cfg), cfg.buildoptions), \" \"))\n_p(' define PREBUILDCMDS')\nif #cfg.prebuildcommands > 0 then\n_p('\\t@echo Running pre-build commands')\n_p('\\t%s', table.implode(cfg.prebuildcommands, \"\", \"\", \"\\n\\t\"))\nend\n_p(' endef')\n_p(' define PRELINKCMDS')\nif #cfg.prelinkcommands > 0 then\n_p('\\t@echo Running pre-link commands')\n_p('\\t%s', table.implode(cfg.prelinkcommands, \"\", \"\", \"\\n\\t\"))\nend\n_p(' endef')\n_p(' define POSTBUILDCMDS')\nif #cfg.postbuildcommands > 0 then\n_p('\\t@echo Running post-bu" |
| 204 | "ild commands')\n_p('\\t%s', table.implode(cfg.postbuildcommands, \"\", \"\", \"\\n\\t\"))\nend\n_p(' endef')\n_p('endif')\n_p('')\nend\n", |
| 205 | 205 | |
| 206 | 206 | /* actions/vstudio/_vstudio.lua */ |
| 207 | 207 | "premake.vstudio = { }\nlocal toolsets = {\nvs2010 = \"v100\",\nvs2012 = \"v110\",\nvs2013 = \"v120\",\nvs2015 = \"v140\"\n}\npremake.vstudio.toolset = toolsets[_ACTION] or \"unknown?\"\npremake.vstudio.splashpath = ''\nlocal vstudio = premake.vstudio\nvstudio.platforms = {\nany = \"Any CPU\",\nmixed = \"Mixed Platforms\",\nNative = \"Win32\",\nx86 = \"x86\",\nx32 = \"Win32\",\nx64 = \"x64\",\nPS3 = \"PS3\",\nXbox360 = \"Xbox 360\",\nARM = \"ARM\",\nOrbis= \"Orbis\"\n}\nfunction vstudio.arch(prj)\nif (prj.language == \"C#\") then\nreturn \"Any CPU\"\nelse\nreturn \"Win32\"\nend\nend\nfunction vstudio.iswinrt()\nreturn vstudio.storeapp ~= nil and vstudio.storeapp ~= ''\nend\nfunction vstudio.buildconfigs(sln)\nlocal cfgs = { }\nlocal platforms = premake.filterplatforms(sln, vstudio.platforms, \"Native\")\nlocal hascpp = premake.hascppproject(sln)\nlocal hasdotnet = premake.hasdotnetproject(sln)\nif hasdotnet and (_ACTION > \"vs2008\" or hascpp) then\ntable.insert(platforms, 1, \"mix" |
trunk/src/emu/machine/68230pit.c
| r249051 | r249052 | |
|---|
| 1 | 1 | // license:BSD-3-Clause |
| 2 | 2 | // copyright-holders:Joakim Larsson Edstr??m |
| 3 | 3 | /********************************************************************** |
| 4 | | * |
| 5 | | * Motorola MC68230 PI/T Parallell Interface and Timer |
| 6 | | * |
| 7 | | * Revisions |
| 8 | | * 2015-07-15 JLE initial |
| 9 | | * |
| 10 | | * Todo |
| 11 | | * - Add clock and timers |
| 12 | | * - Add all missing registers |
| 13 | | * - Add configuration |
| 14 | | **********************************************************************/ |
| 15 | 4 | |
| 16 | | #include "68230pit.h" |
| 5 | Motorola MC68230 PI/T Parallell Interface and Timer |
| 17 | 6 | |
| 18 | | #define LOG(x) /* x */ |
| 7 | Revisions |
| 8 | 2015-07-15 JLE initial |
| 19 | 9 | |
| 20 | | //************************************************************************** |
| 21 | | // DEVICE TYPE DEFINITIONS |
| 22 | | //************************************************************************** |
| 10 | Todo |
| 11 | - Add clock and timers |
| 12 | - Add all missing registers |
| 13 | - Add configuration |
| 14 | **********************************************************************/ |
| 23 | 15 | |
| 24 | | const device_type PIT68230 = &device_creator<pit68230_device>; |
| 16 | /* |
| 17 | Force CPU-1 init sequence |
| 18 | 0801EA 0E0000 W 0000 PGCR data_w: 0000 -> 0000 & 00ff |
| 19 | 0801EA 0E0002 W 0000 PSRR data_w: 0000 -> 0001 & 00ff |
| 20 | 0801EA 0E0004 W FFFF PADDR data_w: 00ff -> 0002 & 00ff |
| 21 | 0801EA 0E0006 W 0000 PBDDR data_w: 0000 -> 0003 & 00ff |
| 22 | 0801F0 0E000C W 6060 PACR data_w: 0060 -> 0006 & 00ff |
| 23 | 0801F6 0E000E W A0A0 PBCR data_w: 00a0 -> 0007 & 00ff |
| 24 | 0801FC 0E0000 W 3030 PGCR data_w: 0030 -> 0000 & 00ff |
| 25 | 080202 0E000E W A8A8 PBCR data_w: 00a8 -> 0007 & 00ff |
| 26 | 080210 0E000E W A0A0 PBCR data_w: 00a0 -> 0007 & 00ff |
| 25 | 27 | |
| 26 | | //------------------------------------------------- |
| 27 | | // pit68230_device - constructors |
| 28 | | //------------------------------------------------- |
| 29 | | pit68230_device::pit68230_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT32 variant, const char *shortname, const char *source) |
| 30 | | : device_t (mconfig, type, name, tag, owner, clock, shortname, source), |
| 31 | | device_execute_interface (mconfig, *this) |
| 32 | | , m_icount (0) |
| 33 | | , m_write_pa (*this) |
| 34 | | , m_write_h2 (*this) |
| 35 | | { |
| 36 | | } |
| 28 | Force CPU-1 after one keypress in terminal |
| 29 | 081DC0 0E000C W 6868 PACR |
| 30 | 081DC8 0E000C W 6060 PACR |
| 31 | */ |
| 37 | 32 | |
| 38 | 33 | |
| 39 | | pit68230_device::pit68230_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 40 | | : device_t (mconfig, PIT68230, "PIT68230", tag, owner, clock, "pit68230", __FILE__), |
| 41 | | device_execute_interface (mconfig, *this) |
| 42 | | , m_icount (0) |
| 43 | | , m_write_pa (*this) |
| 44 | | , m_write_h2 (*this) |
| 45 | | { |
| 46 | | } |
| 34 | #include "emu.h" |
| 35 | #include "68230pit.h" |
| 47 | 36 | |
| 48 | | //------------------------------------------------- |
| 49 | | // device_start - device-specific startup |
| 50 | | //------------------------------------------------- |
| 51 | | void pit68230_device::device_start () |
| 52 | | { |
| 53 | | LOG (logerror ("PIT68230 device started\n")); |
| 54 | | m_icountptr = &m_icount; |
| 37 | /*************************************************************************** |
| 38 | IMPLEMENTATION |
| 39 | ***************************************************************************/ |
| 55 | 40 | |
| 56 | | // resolve callbacks |
| 57 | | m_write_pa.resolve_safe (); |
| 58 | | m_write_h2.resolve_safe (); |
| 59 | | } |
| 41 | // device type definition |
| 42 | const device_type PIT68230 = &device_creator<pit68230_device>; |
| 60 | 43 | |
| 61 | 44 | //------------------------------------------------- |
| 62 | | // device_reset - device-specific reset |
| 45 | // pit68230_device - constructor |
| 63 | 46 | //------------------------------------------------- |
| 64 | | void pit68230_device::device_reset () |
| 47 | |
| 48 | pit68230_device::pit68230_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 49 | : device_t(mconfig, PIT68230, "Motorola 68230 PI/T", tag, owner, clock, "pit68230", __FILE__) |
| 65 | 50 | { |
| 66 | | LOG (logerror ("PIT68230 device reseted\n")); |
| 67 | | m_pgcr = 0; |
| 68 | | m_psrr = 0; |
| 69 | | m_paddr = 0; |
| 70 | | m_pbddr = 0; |
| 71 | | m_pcddr = 0; |
| 72 | | m_pacr = 0; m_write_h2 (m_pacr); |
| 73 | | m_pbcr = 0; |
| 74 | | m_padr = 0; m_write_pa ((offs_t)0, m_padr); // TODO: check PADDR |
| 75 | | m_pbdr = 0; |
| 76 | | m_psr = 0; |
| 77 | 51 | } |
| 78 | 52 | |
| 79 | | //------------------------------------------------- |
| 80 | | // device_timer - handler timer events |
| 81 | | //------------------------------------------------- |
| 82 | | void pit68230_device::device_timer (emu_timer &timer, device_timer_id id, INT32 param, void *ptr) |
| 53 | void pit68230_device::device_start() |
| 83 | 54 | { |
| 55 | printf("PIT68230 device started\n"); |
| 84 | 56 | } |
| 85 | 57 | |
| 86 | | void pit68230_device::h1_set (UINT8 state) |
| 58 | void pit68230_device::device_reset() |
| 87 | 59 | { |
| 88 | | LOG (logerror ("h1_set %d @ m_psr %2x => ", state, m_psr)); |
| 89 | | if (state) m_psr |= 1; else m_psr &= ~1; |
| 90 | | LOG (logerror ("%02x %lld\n", m_psr, machine ().firstcpu->total_cycles ())); |
| 60 | printf("PIT68230 device reseted\n"); |
| 61 | m_pgcr = 0; |
| 62 | m_psrr = 0; |
| 63 | m_paddr = 0; |
| 64 | m_pbddr = 0; |
| 65 | m_pcddr = 0; |
| 66 | m_pacr = 0; |
| 67 | m_pbcr = 0; |
| 68 | m_padr = 0; |
| 69 | m_pbdr = 0; |
| 70 | m_psr = 0; |
| 91 | 71 | } |
| 92 | 72 | |
| 93 | | void pit68230_device::portb_setbit (UINT8 bit, UINT8 state) |
| 73 | WRITE8_MEMBER( pit68230_device::data_w ) |
| 94 | 74 | { |
| 95 | | LOG (logerror ("portb_setbit %d/%d @ m_pbdr %2x => ", bit, state, m_pbdr)); |
| 96 | | if (state) m_pbdr |= (1 << bit); else m_pbdr &= ~(1 << bit); |
| 97 | | LOG (logerror ("%02x %lld\n", m_pbdr, machine ().firstcpu->total_cycles ())); |
| 75 | printf("data_w: %04x -> ", data); |
| 76 | switch (offset) |
| 77 | { |
| 78 | case PIT_68230_PGCR: |
| 79 | printf("PGCR"); |
| 80 | m_pgcr = data; |
| 81 | break; |
| 82 | case PIT_68230_PSRR: |
| 83 | printf("PSRR"); |
| 84 | m_psrr = data; |
| 85 | break; |
| 86 | case PIT_68230_PADDR: |
| 87 | printf("PADDR"); |
| 88 | m_paddr = data; |
| 89 | break; |
| 90 | case PIT_68230_PBDDR: |
| 91 | printf("PBDDR"); |
| 92 | m_pbddr = data; |
| 93 | break; |
| 94 | case PIT_68230_PACR: |
| 95 | printf("PACR"); |
| 96 | m_pacr = data; |
| 97 | break; |
| 98 | case PIT_68230_PBCR: |
| 99 | printf("PBCR"); |
| 100 | m_pbcr = data; |
| 101 | break; |
| 102 | case PIT_68230_PADR: |
| 103 | printf("PADR"); |
| 104 | m_padr = data; |
| 105 | break; |
| 106 | case PIT_68230_PSR: |
| 107 | printf("PSR"); |
| 108 | m_padr = data; |
| 109 | break; |
| 110 | default: |
| 111 | printf("unhandled register %02x", offset); |
| 112 | } |
| 113 | printf("\n"); |
| 98 | 114 | } |
| 99 | 115 | |
| 100 | | //------------------------------------------------- |
| 101 | | // execute_run - |
| 102 | | //------------------------------------------------- |
| 103 | | void pit68230_device::execute_run () |
| 116 | READ8_MEMBER( pit68230_device::data_r ) |
| 104 | 117 | { |
| 105 | | do { |
| 106 | | synchronize (); |
| 118 | UINT8 data = 0; |
| 107 | 119 | |
| 108 | | m_icount--; |
| 109 | | } while (m_icount > 0); |
| 110 | | } |
| 120 | printf("data_r: "); |
| 121 | switch (offset) |
| 122 | { |
| 123 | case PIT_68230_PGCR: |
| 124 | printf("PGCR"); |
| 125 | data = m_pgcr; |
| 126 | break; |
| 127 | case PIT_68230_PSRR: |
| 128 | printf("PSRR"); |
| 129 | data = m_psrr; |
| 130 | break; |
| 131 | case PIT_68230_PADDR: |
| 132 | printf("PADDR"); |
| 133 | data = m_paddr; |
| 134 | break; |
| 135 | case PIT_68230_PBDDR: |
| 136 | printf("PBDDR"); |
| 137 | data = m_pbddr; |
| 138 | break; |
| 139 | case PIT_68230_PACR: |
| 140 | printf("PACR"); |
| 141 | data = m_pacr; |
| 142 | break; |
| 143 | case PIT_68230_PBCR: |
| 144 | printf("PBCR"); |
| 145 | data = m_pbcr; |
| 146 | break; |
| 147 | case PIT_68230_PADR: |
| 148 | printf("PADR"); |
| 149 | data = m_padr; |
| 150 | break; |
| 151 | case PIT_68230_PBDR: |
| 152 | /* 4.6.2. PORT B DATA REGISTER (PBDR). The port B data register is a holding register for moving data |
| 153 | to and from port B pins. The port B data direction register determines whether each pin is an input (zero) |
| 154 | or an output (one). This register is readable and writable at all times. Depending on the chosen mode/submode, |
| 155 | reading or writing may affect the double-buffered handshake mechanism. The port B data register is not affected |
| 156 | by the assertion of the RESET pin. PB0-PB7 sits on pins 17-24 on a 48 pin DIP package */ |
| 157 | printf("PBDR"); |
| 158 | data = m_pbdr; |
| 159 | // data = (m_pbdr & 0xfc) | 1; // CPU-1 centronics interface expects to see 2 lowest bits equal 1 for printer |
| 160 | break; |
| 161 | case PIT_68230_PSR: |
| 162 | printf("PSR"); |
| 163 | data = m_psr; |
| 164 | // data = m_psr | 1; // CPU-1 centronics interface expects status to be non zero |
| 165 | break; |
| 166 | default: |
| 167 | printf("unhandled register %02x", offset); |
| 168 | data = 0; |
| 169 | } |
| 170 | printf("\n"); |
| 111 | 171 | |
| 112 | | LOG (static INT32 ow_cnt = 0); |
| 113 | | LOG (static INT32 ow_data = 0); |
| 114 | | LOG (static INT32 ow_ofs = 0); |
| 115 | | |
| 116 | | WRITE8_MEMBER (pit68230_device::write){ |
| 117 | | switch (offset) { |
| 118 | | case PIT_68230_PGCR: |
| 119 | | m_pgcr = data; |
| 120 | | break; |
| 121 | | |
| 122 | | case PIT_68230_PSRR: |
| 123 | | m_psrr = data; |
| 124 | | break; |
| 125 | | |
| 126 | | case PIT_68230_PADDR: |
| 127 | | m_paddr = data; |
| 128 | | break; |
| 129 | | |
| 130 | | case PIT_68230_PBDDR: |
| 131 | | m_pbddr = data; |
| 132 | | break; |
| 133 | | |
| 134 | | case PIT_68230_PACR: |
| 135 | | m_pacr = data; |
| 136 | | // callbacks |
| 137 | | /*PACR in Mode 0 |
| 138 | | * 5 43 H2 Control in Submode 00 && 01 |
| 139 | | * ------------------------------------ |
| 140 | | * 0 XX Input pin - edge-sensitive status input, H2S is set on an asserted edge. |
| 141 | | * 1 00 Output pin - negated, H2S is always clear. |
| 142 | | * 1 01 Output pin - asserted, H2S is always clear. |
| 143 | | * 1 10 Output pin - interlocked input handshake protocol, H2S is always clear. |
| 144 | | * 1 11 Output pin - pulsed input handshake protocol, H2S is always clear. |
| 145 | | * |
| 146 | | * 5 43 H2 Control in Submode 1x |
| 147 | | * ------------------------------------ |
| 148 | | * 0 XX Input pin - edge-sensitive status input, H2S is set on an asserted edge. |
| 149 | | * 1 X0 Output pin - negated, H2S is always cleared. |
| 150 | | * 1 X1 Output pin - asserted, H2S is always cleared. |
| 151 | | */ |
| 152 | | m_write_h2 (m_pacr & 0x08 ? 1 : 0); // TODO: Check mode and submodes |
| 153 | | break; |
| 154 | | |
| 155 | | case PIT_68230_PBCR: |
| 156 | | m_pbcr = data; |
| 157 | | break; |
| 158 | | |
| 159 | | case PIT_68230_PADR: |
| 160 | | m_padr = data; |
| 161 | | // callbacks |
| 162 | | m_write_pa ((offs_t)0, m_padr); // TODO: check PADDR |
| 163 | | break; |
| 164 | | |
| 165 | | case PIT_68230_PSR: |
| 166 | | m_psr = data; |
| 167 | | break; |
| 168 | | |
| 169 | | default: |
| 170 | | LOG (logerror ("unhandled register %02x", offset)); |
| 171 | | } |
| 172 | | |
| 173 | | LOG (if (offset != ow_ofs || data != ow_data || ow_cnt >= 1000) { |
| 174 | | logerror ("\npit68230_device::write: previous identical operation performed %02x times\n", ow_cnt); |
| 175 | | ow_cnt = 0; |
| 176 | | ow_data = data; |
| 177 | | ow_ofs = offset; |
| 178 | | logerror ("pit68230_device::write: offset=%02x data=%02x %lld\n", ow_ofs, ow_data, machine ().firstcpu->total_cycles ()); |
| 179 | | } |
| 180 | | else |
| 181 | | ow_cnt++; ) |
| 172 | return data; |
| 182 | 173 | } |
| 183 | | |
| 184 | | LOG (static INT32 or_cnt = 0); |
| 185 | | LOG (static INT32 or_data = 0); |
| 186 | | LOG (static INT32 or_ofs = 0); |
| 187 | | |
| 188 | | READ8_MEMBER (pit68230_device::read){ |
| 189 | | UINT8 data = 0; |
| 190 | | |
| 191 | | switch (offset) { |
| 192 | | case PIT_68230_PGCR: |
| 193 | | data = m_pgcr; |
| 194 | | break; |
| 195 | | |
| 196 | | case PIT_68230_PSRR: |
| 197 | | data = m_psrr; |
| 198 | | break; |
| 199 | | |
| 200 | | case PIT_68230_PADDR: |
| 201 | | data = m_paddr; |
| 202 | | break; |
| 203 | | |
| 204 | | case PIT_68230_PBDDR: |
| 205 | | data = m_pbddr; |
| 206 | | break; |
| 207 | | |
| 208 | | case PIT_68230_PACR: |
| 209 | | data = m_pacr; |
| 210 | | break; |
| 211 | | |
| 212 | | case PIT_68230_PBCR: |
| 213 | | data = m_pbcr; |
| 214 | | break; |
| 215 | | |
| 216 | | case PIT_68230_PADR: |
| 217 | | data = m_padr; |
| 218 | | break; |
| 219 | | |
| 220 | | case PIT_68230_PBDR: |
| 221 | | /* 4.6.2. PORT B DATA REGISTER (PBDR). The port B data register is a holding |
| 222 | | * register for moving data to and from port B pins. The port B data direction |
| 223 | | * register determines whether each pin is an input (zero) or an output (one). |
| 224 | | * This register is readable and writable at all times. Depending on the chosen |
| 225 | | * mode/submode, reading or writing may affect the double-buffered handshake |
| 226 | | * mechanism. The port B data register is not affected by the assertion of the |
| 227 | | * RESET pin. PB0-PB7 sits on pins 17-24 on a 48 pin DIP package */ |
| 228 | | data = m_pbdr; |
| 229 | | break; |
| 230 | | |
| 231 | | case PIT_68230_PSR: |
| 232 | | /* 4.8. PORT STATUS REGISTER (PSR) The port status register contains information about |
| 233 | | * handshake pin activity. Bits 7-4 show the instantaneous level of the respective handshake |
| 234 | | * pin, and are independent of the handshake pin sense bits in the port general control |
| 235 | | * register. Bits 3-0 are the respective status bits referred to throughout this document. |
| 236 | | * Their interpretation depends on the programmed mode/submode of the PI/T. For bits |
| 237 | | * 3-0 a one is the active or asserted state. */ |
| 238 | | data = m_psr; |
| 239 | | break; |
| 240 | | |
| 241 | | default: |
| 242 | | LOG (logerror ("unhandled register %02x", offset)); |
| 243 | | data = 0; |
| 244 | | } |
| 245 | | |
| 246 | | LOG (if (offset != or_ofs || data != or_data || or_cnt >= 1000) { |
| 247 | | logerror ("\npit68230_device::read: previous identical operation performed %02x times\n", or_cnt); |
| 248 | | or_cnt = 0; |
| 249 | | or_data = data; |
| 250 | | or_ofs = offset; |
| 251 | | logerror ("pit68230_device::read: offset=%02x data=%02x %lld\n", or_ofs, or_data, machine ().firstcpu->total_cycles ()); |
| 252 | | } |
| 253 | | else |
| 254 | | or_cnt++; ) |
| 255 | | |
| 256 | | return data; |
| 257 | | } |
trunk/src/emu/sound/tms5110.c
| r249051 | r249052 | |
|---|
| 14 | 14 | |
| 15 | 15 | Todo: |
| 16 | 16 | - implement CS |
| 17 | - implement missing commands |
| 17 | 18 | - TMS5110_CMD_TEST_TALK is only partially implemented |
| 18 | 19 | |
| 19 | 20 | TMS5100: |
| r249051 | r249052 | |
|---|
| 211 | 212 | { |
| 212 | 213 | save_item(NAME(m_variant)); |
| 213 | 214 | |
| 215 | save_item(NAME(m_fifo)); |
| 216 | save_item(NAME(m_fifo_head)); |
| 217 | save_item(NAME(m_fifo_tail)); |
| 218 | save_item(NAME(m_fifo_count)); |
| 219 | |
| 214 | 220 | save_item(NAME(m_PDC)); |
| 215 | 221 | save_item(NAME(m_CTL_pins)); |
| 216 | 222 | save_item(NAME(m_SPEN)); |
| r249051 | r249052 | |
|---|
| 234 | 240 | save_item(NAME(m_old_frame_energy_idx)); |
| 235 | 241 | save_item(NAME(m_old_frame_pitch_idx)); |
| 236 | 242 | save_item(NAME(m_old_frame_k_idx)); |
| 237 | | save_item(NAME(m_old_zpar)); |
| 238 | | save_item(NAME(m_old_uv_zpar)); |
| 239 | 243 | #endif |
| 240 | 244 | save_item(NAME(m_current_energy)); |
| 241 | 245 | save_item(NAME(m_current_pitch)); |
| r249051 | r249052 | |
|---|
| 305 | 309 | } |
| 306 | 310 | #endif |
| 307 | 311 | |
| 312 | |
| 308 | 313 | /****************************************************************************************** |
| 309 | 314 | |
| 310 | | extract_bits -- extract a specific number of bits from the VSM |
| 315 | FIFO_data_write -- handle bit data write to the TMS5110 (as a result of toggling M0 pin) |
| 311 | 316 | |
| 312 | 317 | ******************************************************************************************/ |
| 318 | void tms5110_device::FIFO_data_write(int data) |
| 319 | { |
| 320 | /* add this bit to the FIFO */ |
| 321 | if (m_fifo_count < FIFO_SIZE) |
| 322 | { |
| 323 | m_fifo[m_fifo_tail] = (data&1); /* set bit to 1 or 0 */ |
| 313 | 324 | |
| 325 | m_fifo_tail = (m_fifo_tail + 1) % FIFO_SIZE; |
| 326 | m_fifo_count++; |
| 327 | |
| 328 | if (DEBUG_5110) logerror("Added bit to FIFO (size=%2d)\n", m_fifo_count); |
| 329 | } |
| 330 | else |
| 331 | { |
| 332 | if (DEBUG_5110) logerror("Ran out of room in the FIFO!\n"); |
| 333 | } |
| 334 | } |
| 335 | |
| 336 | /****************************************************************************************** |
| 337 | |
| 338 | extract_bits -- extract a specific number of bits from the FIFO |
| 339 | |
| 340 | ******************************************************************************************/ |
| 341 | |
| 314 | 342 | int tms5110_device::extract_bits(int count) |
| 315 | 343 | { |
| 316 | 344 | int val = 0; |
| 317 | | if (DEBUG_5110) logerror("requesting %d bits", count); |
| 318 | | for (int i = 0; i < count; i++) |
| 345 | if (DEBUG_5110) logerror("requesting %d bits from fifo: ", count); |
| 346 | while (count--) |
| 319 | 347 | { |
| 320 | | val = (val<<1) | new_int_read(); |
| 321 | | if (DEBUG_5110) logerror("bit read: %d\n", val&1); |
| 348 | val = (val << 1) | (m_fifo[m_fifo_head] & 1); |
| 349 | m_fifo_count--; |
| 350 | m_fifo_head = (m_fifo_head + 1) % FIFO_SIZE; |
| 322 | 351 | } |
| 323 | 352 | if (DEBUG_5110) logerror("returning: %02x\n", val); |
| 324 | 353 | return val; |
| 325 | 354 | } |
| 326 | 355 | |
| 356 | void tms5110_device::request_bits(int no) |
| 357 | { |
| 358 | for (int i = 0; i < no; i++) |
| 359 | { |
| 360 | UINT8 data = new_int_read(); |
| 361 | if (DEBUG_5110) logerror("bit added to fifo: %d\n", data); |
| 362 | FIFO_data_write(data); |
| 363 | } |
| 364 | } |
| 327 | 365 | |
| 328 | 366 | void tms5110_device::perform_dummy_read() |
| 329 | 367 | { |
| r249051 | r249052 | |
|---|
| 350 | 388 | int i, bitout; |
| 351 | 389 | INT32 this_sample; |
| 352 | 390 | |
| 391 | /* if we're not speaking, fill with nothingness */ |
| 392 | if (!m_TALKD) |
| 393 | goto empty; |
| 394 | |
| 353 | 395 | /* loop until the buffer is full or we've stopped speaking */ |
| 354 | | while (size > 0) |
| 396 | while ((size > 0) && m_TALKD) |
| 355 | 397 | { |
| 356 | | if(m_TALKD) // speaking |
| 398 | /* if it is the appropriate time to update the old energy/pitch indices, |
| 399 | * i.e. when IP=7, PC=12, T=17, subcycle=2, do so. Since IP=7 PC=12 T=17 |
| 400 | * is JUST BEFORE the transition to IP=0 PC=0 T=0 sybcycle=(0 or 1), |
| 401 | * which happens 4 T-cycles later), we change on the latter. |
| 402 | * The indices are updated here ~12 PCs before the new frame is applied. |
| 403 | */ |
| 404 | /** TODO: the patents 4331836, 4335277, and 4419540 disagree about the timing of this **/ |
| 405 | if ((m_IP == 0) && (m_PC == 0) && (m_subcycle < 2)) |
| 357 | 406 | { |
| 358 | | /* if we're ready for a new frame to be applied, i.e. when IP=0, PC=12, Sub=1 |
| 359 | | * (In reality, the frame was really loaded incrementally during the entire IP=0 |
| 360 | | * PC=x time period, but it doesn't affect anything until IP=0 PC=12 happens) |
| 361 | | */ |
| 362 | | if ((m_IP == 0) && (m_PC == 12) && (m_subcycle == 1)) |
| 363 | | { |
| 364 | | // HACK for regression testing, be sure to comment out before release! |
| 365 | | //m_RNG = 0x1234; |
| 366 | | // end HACK |
| 407 | m_OLDE = (m_new_frame_energy_idx == 0); |
| 408 | m_OLDP = (m_new_frame_pitch_idx == 0); |
| 409 | } |
| 367 | 410 | |
| 411 | /* if we're ready for a new frame to be applied, i.e. when IP=0, PC=12, Sub=1 |
| 412 | * (In reality, the frame was really loaded incrementally during the entire IP=0 |
| 413 | * PC=x time period, but it doesn't affect anything until IP=0 PC=12 happens) |
| 414 | */ |
| 415 | if ((m_IP == 0) && (m_PC == 12) && (m_subcycle == 1)) |
| 416 | { |
| 417 | // HACK for regression testing, be sure to comment out before release! |
| 418 | //m_RNG = 0x1234; |
| 419 | // end HACK |
| 420 | |
| 368 | 421 | #ifdef PERFECT_INTERPOLATION_HACK |
| 369 | | /* remember previous frame energy, pitch, and coefficients */ |
| 370 | | m_old_frame_energy_idx = m_new_frame_energy_idx; |
| 371 | | m_old_frame_pitch_idx = m_new_frame_pitch_idx; |
| 372 | | for (i = 0; i < m_coeff->num_k; i++) |
| 373 | | m_old_frame_k_idx[i] = m_new_frame_k_idx[i]; |
| 422 | /* remember previous frame energy, pitch, and coefficients */ |
| 423 | m_old_frame_energy_idx = m_new_frame_energy_idx; |
| 424 | m_old_frame_pitch_idx = m_new_frame_pitch_idx; |
| 425 | for (i = 0; i < m_coeff->num_k; i++) |
| 426 | m_old_frame_k_idx[i] = m_new_frame_k_idx[i]; |
| 374 | 427 | #endif |
| 375 | 428 | |
| 376 | | /* Parse a new frame into the new_target_energy, new_target_pitch and new_target_k[] */ |
| 377 | | parse_frame(); |
| 378 | | |
| 379 | | // if the new frame is unvoiced (or silenced via ZPAR), be sure to zero out the k5-k10 parameters |
| 380 | | // NOTE: this is probably the bug the tms5100/tmc0280 has, pre-rev D, I think. |
| 381 | | // GUESS: Pre-rev D versions start zeroing k5-k10 immediately upon new frame load regardless of interpolation inhibit |
| 382 | | // I.e. ZPAR = /TALKD || (PC>5&&P=0) |
| 383 | | // GUESS: D and later versions only start or stop zeroing k5-k10 at the IP7->IP0 transition AFTER the frame |
| 384 | | // I.e. ZPAR = /TALKD || (PC>5&&OLDP) |
| 385 | | #ifdef PERFECT_INTERPOLATION_HACK |
| 386 | | m_old_uv_zpar = m_uv_zpar; |
| 387 | | m_old_zpar = m_zpar; // unset old zpar on new frame |
| 429 | /* Parse a new frame into the new_target_energy, new_target_pitch and new_target_k[] */ |
| 430 | parse_frame(); |
| 431 | #ifdef DEBUG_PARSE_FRAME_DUMP |
| 432 | fprintf(stderr,"\n"); |
| 388 | 433 | #endif |
| 389 | | m_zpar = 0; |
| 390 | | //m_uv_zpar = (OLD_FRAME_UNVOICED_FLAG||m_zpar); // GUESS: fixed version in tmc0280d/tms5100a/cd280x/tms5110 |
| 391 | | m_uv_zpar = (NEW_FRAME_UNVOICED_FLAG||m_zpar); // GUESS: buggy version in tmc0280/tms5100 |
| 434 | /* if the new frame is unvoiced (or silenced via ZPAR), be sure to zero out the k5-k10 parameters */ |
| 435 | m_uv_zpar = NEW_FRAME_UNVOICED_FLAG | m_zpar; |
| 392 | 436 | |
| 393 | | /* if the new frame is a stop frame, unset both TALK and SPEN (via TCON). TALKD remains active while the energy is ramping to 0. */ |
| 394 | | if (NEW_FRAME_STOP_FLAG == 1) |
| 395 | | { |
| 396 | | m_TALK = m_SPEN = 0; |
| 397 | | } |
| 437 | /* if the new frame is a stop frame, unset both TALK and SPEN. TALKD remains active while the energy is ramping to 0. */ |
| 438 | if (NEW_FRAME_STOP_FLAG == 1) |
| 439 | { |
| 440 | m_TALK = m_SPEN = 0; |
| 441 | } |
| 398 | 442 | |
| 399 | | /* in all cases where interpolation would be inhibited, set the inhibit flag; otherwise clear it. |
| 400 | | Interpolation inhibit cases: |
| 401 | | * Old frame was voiced, new is unvoiced |
| 402 | | * Old frame was silence/zero energy, new has nonzero energy |
| 403 | | * Old frame was unvoiced, new is voiced (note this is the case on the patent but may not be correct on the real final chip) |
| 404 | | */ |
| 405 | | if ( ((OLD_FRAME_UNVOICED_FLAG == 0) && (NEW_FRAME_UNVOICED_FLAG == 1)) |
| 406 | | || ((OLD_FRAME_UNVOICED_FLAG == 1) && (NEW_FRAME_UNVOICED_FLAG == 0)) /* this line needs further investigation, starwars tie fighters may sound better without it */ |
| 407 | | || ((OLD_FRAME_SILENCE_FLAG == 1) && (NEW_FRAME_SILENCE_FLAG == 0)) ) |
| 408 | | m_inhibit = 1; |
| 409 | | else // normal frame, normal interpolation |
| 410 | | m_inhibit = 0; |
| 443 | /* in all cases where interpolation would be inhibited, set the inhibit flag; otherwise clear it. |
| 444 | Interpolation inhibit cases: |
| 445 | * Old frame was voiced, new is unvoiced |
| 446 | * Old frame was silence/zero energy, new has nonzero energy |
| 447 | * Old frame was unvoiced, new is voiced (note this is the case on the patent but may not be correct on the real final chip) |
| 448 | */ |
| 449 | if ( ((OLD_FRAME_UNVOICED_FLAG == 0) && (NEW_FRAME_UNVOICED_FLAG == 1)) |
| 450 | || ((OLD_FRAME_UNVOICED_FLAG == 1) && (NEW_FRAME_UNVOICED_FLAG == 0)) /* this line needs further investigation, starwars tie fighters may sound better without it */ |
| 451 | || ((OLD_FRAME_SILENCE_FLAG == 1) && (NEW_FRAME_SILENCE_FLAG == 0)) ) |
| 452 | m_inhibit = 1; |
| 453 | else // normal frame, normal interpolation |
| 454 | m_inhibit = 0; |
| 411 | 455 | |
| 412 | 456 | #ifdef DEBUG_GENERATION |
| 413 | | /* Debug info for current parsed frame */ |
| 414 | | fprintf(stderr, "OLDE: %d; OLDP: %d; ", m_OLDE, m_OLDP); |
| 415 | | fprintf(stderr,"Processing new frame: "); |
| 416 | | if (m_inhibit == 0) |
| 417 | | fprintf(stderr, "Normal Frame\n"); |
| 418 | | else |
| 419 | | fprintf(stderr,"Interpolation Inhibited\n"); |
| 420 | | fprintf(stderr,"*** current Energy, Pitch and Ks = %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d\n",m_current_energy, m_current_pitch, m_current_k[0], m_current_k[1], m_current_k[2], m_current_k[3], m_current_k[4], m_current_k[5], m_current_k[6], m_current_k[7], m_current_k[8], m_current_k[9]); |
| 421 | | fprintf(stderr,"*** target Energy(idx), Pitch, and Ks = %04d(%x),%04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d\n", |
| 422 | | (m_coeff->energytable[m_new_frame_energy_idx] * (1-m_zpar)), |
| 423 | | m_new_frame_energy_idx, |
| 424 | | (m_coeff->pitchtable[m_new_frame_pitch_idx] * (1-m_zpar)), |
| 425 | | (m_coeff->ktable[0][m_new_frame_k_idx[0]] * (1-m_zpar)), |
| 426 | | (m_coeff->ktable[1][m_new_frame_k_idx[1]] * (1-m_zpar)), |
| 427 | | (m_coeff->ktable[2][m_new_frame_k_idx[2]] * (1-m_zpar)), |
| 428 | | (m_coeff->ktable[3][m_new_frame_k_idx[3]] * (1-m_zpar)), |
| 429 | | (m_coeff->ktable[4][m_new_frame_k_idx[4]] * (1-m_uv_zpar)), |
| 430 | | (m_coeff->ktable[5][m_new_frame_k_idx[5]] * (1-m_uv_zpar)), |
| 431 | | (m_coeff->ktable[6][m_new_frame_k_idx[6]] * (1-m_uv_zpar)), |
| 432 | | (m_coeff->ktable[7][m_new_frame_k_idx[7]] * (1-m_uv_zpar)), |
| 433 | | (m_coeff->ktable[8][m_new_frame_k_idx[8]] * (1-m_uv_zpar)), |
| 434 | | (m_coeff->ktable[9][m_new_frame_k_idx[9]] * (1-m_uv_zpar)) ); |
| 457 | /* Debug info for current parsed frame */ |
| 458 | fprintf(stderr, "OLDE: %d; OLDP: %d; ", m_OLDE, m_OLDP); |
| 459 | fprintf(stderr,"Processing frame: "); |
| 460 | if (m_inhibit == 0) |
| 461 | fprintf(stderr, "Normal Frame\n"); |
| 462 | else |
| 463 | fprintf(stderr,"Interpolation Inhibited\n"); |
| 464 | fprintf(stderr,"*** current Energy, Pitch and Ks = %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d\n",m_current_energy, m_current_pitch, m_current_k[0], m_current_k[1], m_current_k[2], m_current_k[3], m_current_k[4], m_current_k[5], m_current_k[6], m_current_k[7], m_current_k[8], m_current_k[9]); |
| 465 | fprintf(stderr,"*** target Energy(idx), Pitch, and Ks = %04d(%x),%04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d\n", |
| 466 | (m_coeff->energytable[m_new_frame_energy_idx] * (1-m_zpar)), |
| 467 | m_new_frame_energy_idx, |
| 468 | (m_coeff->pitchtable[m_new_frame_pitch_idx] * (1-m_zpar)), |
| 469 | (m_coeff->ktable[0][m_new_frame_k_idx[0]] * (1-m_zpar)), |
| 470 | (m_coeff->ktable[1][m_new_frame_k_idx[1]] * (1-m_zpar)), |
| 471 | (m_coeff->ktable[2][m_new_frame_k_idx[2]] * (1-m_zpar)), |
| 472 | (m_coeff->ktable[3][m_new_frame_k_idx[3]] * (1-m_zpar)), |
| 473 | (m_coeff->ktable[4][m_new_frame_k_idx[4]] * (1-m_uv_zpar)), |
| 474 | (m_coeff->ktable[5][m_new_frame_k_idx[5]] * (1-m_uv_zpar)), |
| 475 | (m_coeff->ktable[6][m_new_frame_k_idx[6]] * (1-m_uv_zpar)), |
| 476 | (m_coeff->ktable[7][m_new_frame_k_idx[7]] * (1-m_uv_zpar)), |
| 477 | (m_coeff->ktable[8][m_new_frame_k_idx[8]] * (1-m_uv_zpar)), |
| 478 | (m_coeff->ktable[9][m_new_frame_k_idx[9]] * (1-m_uv_zpar)) ); |
| 435 | 479 | #endif |
| 436 | 480 | |
| 481 | } |
| 482 | else // Not a new frame, just interpolate the existing frame. |
| 483 | { |
| 484 | int inhibit_state = ((m_inhibit==1)&&(m_IP != 0)); // disable inhibit when reaching the last interp period, but don't overwrite the m_inhibit value |
| 485 | #ifdef PERFECT_INTERPOLATION_HACK |
| 486 | int samples_per_frame = m_subc_reload?175:266; // either (13 A cycles + 12 B cycles) * 7 interps for normal SPEAK/SPKEXT, or (13*2 A cycles + 12 B cycles) * 7 interps for SPKSLOW |
| 487 | //int samples_per_frame = m_subc_reload?200:304; // either (13 A cycles + 12 B cycles) * 8 interps for normal SPEAK/SPKEXT, or (13*2 A cycles + 12 B cycles) * 8 interps for SPKSLOW |
| 488 | int current_sample = (m_subcycle - m_subc_reload)+(m_PC*(3-m_subc_reload))+((m_subc_reload?25:38)*((m_IP-1)&7)); |
| 489 | //fprintf(stderr, "CS: %03d", current_sample); |
| 490 | // reset the current energy, pitch, etc to what it was at frame start |
| 491 | m_current_energy = (m_coeff->energytable[m_old_frame_energy_idx] * (1-m_zpar)); |
| 492 | m_current_pitch = (m_coeff->pitchtable[m_old_frame_pitch_idx] * (1-m_old_zpar)); |
| 493 | for (i = 0; i < 4; i++) |
| 494 | m_current_k[i] = (m_coeff->ktable[i][m_old_frame_k_idx[i]] * (1-m_old_zpar)); |
| 495 | for (i = 4; i < m_coeff->num_k; i++) |
| 496 | m_current_k[i] = (m_coeff->ktable[i][m_old_frame_k_idx[i]] * (1-m_uv_zpar)); |
| 497 | // now adjust each value to be exactly correct for each of the samples per frame |
| 498 | if (m_IP != 0) // if we're still interpolating... |
| 499 | { |
| 500 | m_current_energy += ((((m_coeff->energytable[m_new_frame_energy_idx] * (1-m_zpar)) - m_current_energy)*(1-inhibit_state))*current_sample)/samples_per_frame; |
| 501 | m_current_pitch += ((((m_coeff->pitchtable[m_new_frame_pitch_idx] * (1-m_zpar)) - m_current_pitch)*(1-inhibit_state))*current_sample)/samples_per_frame; |
| 502 | for (i = 0; i < m_coeff->num_k; i++) |
| 503 | m_current_k[i] += ((((m_coeff->ktable[i][m_new_frame_k_idx[i]] * (1-((i<4)?m_zpar:m_uv_zpar))) - m_current_k[i])*(1-inhibit_state))*current_sample)/samples_per_frame; |
| 437 | 504 | } |
| 438 | | else // Not a new frame, just interpolate the existing frame. |
| 505 | else // we're done, play this frame for 1/8 frame. |
| 439 | 506 | { |
| 440 | | int inhibit_state = ((m_inhibit==1)&&(m_IP != 0)); // disable inhibit when reaching the last interp period, but don't overwrite the m_inhibit value |
| 441 | | #ifdef PERFECT_INTERPOLATION_HACK |
| 442 | | int samples_per_frame = m_subc_reload?175:266; // either (13 A cycles + 12 B cycles) * 7 interps for normal SPEAK/SPKEXT, or (13*2 A cycles + 12 B cycles) * 7 interps for SPKSLOW |
| 443 | | //int samples_per_frame = m_subc_reload?200:304; // either (13 A cycles + 12 B cycles) * 8 interps for normal SPEAK/SPKEXT, or (13*2 A cycles + 12 B cycles) * 8 interps for SPKSLOW |
| 444 | | int current_sample = (m_subcycle - m_subc_reload)+(m_PC*(3-m_subc_reload))+((m_subc_reload?25:38)*((m_IP-1)&7)); |
| 445 | | //fprintf(stderr, "CS: %03d", current_sample); |
| 446 | | // reset the current energy, pitch, etc to what it was at frame start |
| 447 | | m_current_energy = (m_coeff->energytable[m_old_frame_energy_idx] * (1-m_old_zpar)); |
| 448 | | m_current_pitch = (m_coeff->pitchtable[m_old_frame_pitch_idx] * (1-m_old_zpar)); |
| 507 | m_current_energy = (m_coeff->energytable[m_new_frame_energy_idx] * (1-m_zpar)); |
| 508 | m_current_pitch = (m_coeff->pitchtable[m_new_frame_pitch_idx] * (1-m_zpar)); |
| 449 | 509 | for (i = 0; i < m_coeff->num_k; i++) |
| 450 | | m_current_k[i] = (m_coeff->ktable[i][m_old_frame_k_idx[i]] * (1-((i<4)?m_old_zpar:m_old_uv_zpar))); |
| 451 | | // now adjust each value to be exactly correct for each of the samples per frame |
| 452 | | if (m_IP != 0) // if we're still interpolating... |
| 453 | | { |
| 454 | | m_current_energy = (m_current_energy + (((m_coeff->energytable[m_new_frame_energy_idx] - m_current_energy)*(1-inhibit_state))*current_sample)/samples_per_frame)*(1-m_zpar); |
| 455 | | m_current_pitch = (m_current_pitch + (((m_coeff->pitchtable[m_new_frame_pitch_idx] - m_current_pitch)*(1-inhibit_state))*current_sample)/samples_per_frame)*(1-m_zpar); |
| 456 | | for (i = 0; i < m_coeff->num_k; i++) |
| 457 | | m_current_k[i] = (m_current_k[i] + (((m_coeff->ktable[i][m_new_frame_k_idx[i]] - m_current_k[i])*(1-inhibit_state))*current_sample)/samples_per_frame)*(1-((i<4)?m_zpar:m_uv_zpar)); |
| 458 | | } |
| 459 | | else // we're done, play this frame for 1/8 frame. |
| 460 | | { |
| 461 | | m_current_energy = (m_coeff->energytable[m_new_frame_energy_idx] * (1-m_zpar)); |
| 462 | | m_current_pitch = (m_coeff->pitchtable[m_new_frame_pitch_idx] * (1-m_zpar)); |
| 463 | | for (i = 0; i < m_coeff->num_k; i++) |
| 464 | | m_current_k[i] = (m_coeff->ktable[i][m_new_frame_k_idx[i]] * (1-((i<4)?m_zpar:m_uv_zpar))); |
| 465 | | } |
| 510 | m_current_k[i] = (m_coeff->ktable[i][m_new_frame_k_idx[i]] * (1-((i<4)?m_zpar:m_uv_zpar))); |
| 511 | } |
| 466 | 512 | #else |
| 467 | | //Updates to parameters only happen on subcycle '2' (B cycle) of PCs. |
| 468 | | if (m_subcycle == 2) |
| 513 | //Updates to parameters only happen on subcycle '2' (B cycle) of PCs. |
| 514 | if (m_subcycle == 2) |
| 515 | { |
| 516 | switch(m_PC) |
| 469 | 517 | { |
| 470 | | switch(m_PC) |
| 471 | | { |
| 472 | | case 0: /* PC = 0, B cycle, write updated energy */ |
| 473 | | m_current_energy = (m_current_energy + (((m_coeff->energytable[m_new_frame_energy_idx] - m_current_energy)*(1-inhibit_state)) INTERP_SHIFT))*(1-m_zpar); |
| 474 | | break; |
| 475 | | case 1: /* PC = 1, B cycle, write updated pitch */ |
| 476 | | m_current_pitch = (m_current_pitch + (((m_coeff->pitchtable[m_new_frame_pitch_idx] - m_current_pitch)*(1-inhibit_state)) INTERP_SHIFT))*(1-m_zpar); |
| 477 | | break; |
| 478 | | case 2: case 3: case 4: case 5: case 6: case 7: case 8: case 9: case 10: case 11: |
| 479 | | /* PC = 2 through 11, B cycle, write updated K1 through K10 */ |
| 480 | | m_current_k[m_PC-2] = (m_current_k[m_PC-2] + (((m_coeff->ktable[m_PC-2][m_new_frame_k_idx[m_PC-2]] - m_current_k[m_PC-2])*(1-inhibit_state)) INTERP_SHIFT))*(((m_PC-2)>4)?(1-m_uv_zpar):(1-m_zpar)); |
| 481 | | break; |
| 482 | | case 12: /* PC = 12 */ |
| 483 | | /* we should NEVER reach this point, PC=12 doesn't have a subcycle 2 */ |
| 484 | | break; |
| 485 | | } |
| 518 | case 0: /* PC = 0, B cycle, write updated energy */ |
| 519 | m_current_energy += ((((m_coeff->energytable[m_new_frame_energy_idx] * (1-m_zpar)) - m_current_energy)*(1-inhibit_state)) INTERP_SHIFT); |
| 520 | break; |
| 521 | case 1: /* PC = 1, B cycle, write updated pitch */ |
| 522 | m_current_pitch += ((((m_coeff->pitchtable[m_new_frame_pitch_idx] * (1-m_zpar)) - m_current_pitch)*(1-inhibit_state)) INTERP_SHIFT); |
| 523 | break; |
| 524 | case 2: case 3: case 4: case 5: case 6: case 7: case 8: case 9: case 10: case 11: |
| 525 | /* PC = 2 through 11, B cycle, write updated K1 through K10 */ |
| 526 | m_current_k[m_PC-2] += ((((m_coeff->ktable[m_PC-2][m_new_frame_k_idx[m_PC-2]] * (1-(((m_PC-2)<4)?m_zpar:m_uv_zpar))) - m_current_k[m_PC-2])*(1-inhibit_state)) INTERP_SHIFT); |
| 527 | break; |
| 528 | case 12: /* PC = 12, do nothing */ |
| 529 | break; |
| 486 | 530 | } |
| 531 | } |
| 487 | 532 | #endif |
| 488 | | } |
| 533 | } |
| 489 | 534 | |
| 490 | | // calculate the output |
| 491 | | if (OLD_FRAME_UNVOICED_FLAG == 1) |
| 492 | | { |
| 493 | | // generate unvoiced samples here |
| 494 | | if (m_RNG & 1) |
| 495 | | m_excitation_data = ~0x3F; /* according to the patent it is (either + or -) half of the maximum value in the chirp table, so either 01000000(0x40) or 11000000(0xC0)*/ |
| 496 | | else |
| 497 | | m_excitation_data = 0x40; |
| 498 | | } |
| 499 | | else /* (OLD_FRAME_UNVOICED_FLAG == 0) */ |
| 500 | | { |
| 501 | | // generate voiced samples here |
| 502 | | /* US patent 4331836 Figure 14B shows, and logic would hold, that a pitch based chirp |
| 503 | | * function has a chirp/peak and then a long chain of zeroes. |
| 504 | | * The last entry of the chirp rom is at address 0b110011 (51d), the 52nd sample, |
| 505 | | * and if the address reaches that point the ADDRESS incrementer is |
| 506 | | * disabled, forcing all samples beyond 51d to be == 51d |
| 507 | | */ |
| 508 | | if (m_pitch_count >= 51) |
| 509 | | m_excitation_data = (INT8)m_coeff->chirptable[51]; |
| 510 | | else /*m_pitch_count < 51*/ |
| 511 | | m_excitation_data = (INT8)m_coeff->chirptable[m_pitch_count]; |
| 512 | | } |
| 535 | // calculate the output |
| 536 | if (OLD_FRAME_UNVOICED_FLAG == 1) |
| 537 | { |
| 538 | // generate unvoiced samples here |
| 539 | if (m_RNG & 1) |
| 540 | m_excitation_data = ~0x3F; /* according to the patent it is (either + or -) half of the maximum value in the chirp table, so either 01000000(0x40) or 11000000(0xC0)*/ |
| 541 | else |
| 542 | m_excitation_data = 0x40; |
| 543 | } |
| 544 | else /* (OLD_FRAME_UNVOICED_FLAG == 0) */ |
| 545 | { |
| 546 | // generate voiced samples here |
| 547 | /* US patent 4331836 Figure 14B shows, and logic would hold, that a pitch based chirp |
| 548 | * function has a chirp/peak and then a long chain of zeroes. |
| 549 | * The last entry of the chirp rom is at address 0b110011 (51d), the 52nd sample, |
| 550 | * and if the address reaches that point the ADDRESS incrementer is |
| 551 | * disabled, forcing all samples beyond 51d to be == 51d |
| 552 | */ |
| 553 | if (m_pitch_count >= 51) |
| 554 | m_excitation_data = (INT8)m_coeff->chirptable[51]; |
| 555 | else /*m_pitch_count < 51*/ |
| 556 | m_excitation_data = (INT8)m_coeff->chirptable[m_pitch_count]; |
| 557 | } |
| 513 | 558 | |
| 514 | | // Update LFSR *20* times every sample (once per T cycle), like patent shows |
| 515 | | for (i=0; i<20; i++) |
| 516 | | { |
| 517 | | bitout = ((m_RNG >> 12) & 1) ^ |
| 518 | | ((m_RNG >> 3) & 1) ^ |
| 519 | | ((m_RNG >> 2) & 1) ^ |
| 520 | | ((m_RNG >> 0) & 1); |
| 521 | | m_RNG <<= 1; |
| 522 | | m_RNG |= bitout; |
| 523 | | } |
| 524 | | this_sample = lattice_filter(); /* execute lattice filter */ |
| 559 | // Update LFSR *20* times every sample (once per T cycle), like patent shows |
| 560 | for (i=0; i<20; i++) |
| 561 | { |
| 562 | bitout = ((m_RNG >> 12) & 1) ^ |
| 563 | ((m_RNG >> 3) & 1) ^ |
| 564 | ((m_RNG >> 2) & 1) ^ |
| 565 | ((m_RNG >> 0) & 1); |
| 566 | m_RNG <<= 1; |
| 567 | m_RNG |= bitout; |
| 568 | } |
| 569 | this_sample = lattice_filter(); /* execute lattice filter */ |
| 525 | 570 | #ifdef DEBUG_GENERATION_VERBOSE |
| 526 | | //fprintf(stderr,"C:%01d; ",m_subcycle); |
| 527 | | fprintf(stderr,"IP:%01d PC:%02d X:%04d E:%03d P:%03d Pc:%03d ",m_IP, m_PC, m_excitation_data, m_current_energy, m_current_pitch, m_pitch_count); |
| 528 | | //fprintf(stderr,"X:%04d E:%03d P:%03d Pc:%03d ", m_excitation_data, m_current_energy, m_current_pitch, m_pitch_count); |
| 529 | | for (i=0; i<10; i++) |
| 530 | | fprintf(stderr,"K%d:%04d ", i+1, m_current_k[i]); |
| 531 | | fprintf(stderr,"Out:%06d ", this_sample); |
| 532 | | //#ifdef PERFECT_INTERPOLATION_HACK |
| 533 | | // fprintf(stderr,"%d%d%d%d",m_old_zpar,m_zpar,m_old_uv_zpar,m_uv_zpar); |
| 534 | | //#else |
| 535 | | // fprintf(stderr,"x%dx%d",m_zpar,m_uv_zpar); |
| 536 | | //#endif |
| 537 | | fprintf(stderr,"\n"); |
| 571 | //fprintf(stderr,"C:%01d; ",m_subcycle); |
| 572 | fprintf(stderr,"IP:%01d PC:%02d X:%04d E:%03d P:%03d Pc:%03d ",m_IP, m_PC, m_excitation_data, m_current_energy, m_current_pitch, m_pitch_count); |
| 573 | //fprintf(stderr,"X:%04d E:%03d P:%03d Pc:%03d ", m_excitation_data, m_current_energy, m_current_pitch, m_pitch_count); |
| 574 | for (i=0; i<10; i++) |
| 575 | fprintf(stderr,"K%d:%04d ", i+1, m_current_k[i]); |
| 576 | fprintf(stderr,"Out:%06d", this_sample); |
| 577 | fprintf(stderr,"\n"); |
| 538 | 578 | #endif |
| 539 | | /* next, force result to 14 bits (since its possible that the addition at the final (k1) stage of the lattice overflowed) */ |
| 540 | | while (this_sample > 16383) this_sample -= 32768; |
| 541 | | while (this_sample < -16384) this_sample += 32768; |
| 542 | | if (m_digital_select == 0) // analog SPK pin output is only 8 bits, with clipping |
| 543 | | buffer[buf_count] = clip_analog(this_sample); |
| 544 | | else // digital I/O pin output is 12 bits |
| 545 | | { |
| 579 | /* next, force result to 14 bits (since its possible that the addition at the final (k1) stage of the lattice overflowed) */ |
| 580 | while (this_sample > 16383) this_sample -= 32768; |
| 581 | while (this_sample < -16384) this_sample += 32768; |
| 582 | if (m_digital_select == 0) // analog SPK pin output is only 8 bits, with clipping |
| 583 | buffer[buf_count] = clip_analog(this_sample); |
| 584 | else // digital I/O pin output is 12 bits |
| 585 | { |
| 546 | 586 | #ifdef ALLOW_4_LSB |
| 547 | | // input: ssss ssss ssss ssss ssnn nnnn nnnn nnnn |
| 548 | | // N taps: ^ = 0x2000; |
| 549 | | // output: ssss ssss ssss ssss snnn nnnn nnnn nnnN |
| 550 | | buffer[buf_count] = (this_sample<<1)|((this_sample&0x2000)>>13); |
| 587 | // input: ssss ssss ssss ssss ssnn nnnn nnnn nnnn |
| 588 | // N taps: ^ = 0x2000; |
| 589 | // output: ssss ssss ssss ssss snnn nnnn nnnn nnnN |
| 590 | buffer[buf_count] = (this_sample<<1)|((this_sample&0x2000)>>13); |
| 551 | 591 | #else |
| 552 | | this_sample &= ~0xF; |
| 553 | | // input: ssss ssss ssss ssss ssnn nnnn nnnn 0000 |
| 554 | | // N taps: ^^ ^^^ = 0x3E00; |
| 555 | | // output: ssss ssss ssss ssss snnn nnnn nnnN NNNN |
| 556 | | buffer[buf_count] = (this_sample<<1)|((this_sample&0x3E00)>>9); |
| 592 | this_sample &= ~0xF; |
| 593 | // input: ssss ssss ssss ssss ssnn nnnn nnnn 0000 |
| 594 | // N taps: ^^ ^^^ = 0x3E00; |
| 595 | // output: ssss ssss ssss ssss snnn nnnn nnnN NNNN |
| 596 | buffer[buf_count] = (this_sample<<1)|((this_sample&0x3E00)>>9); |
| 557 | 597 | #endif |
| 558 | | } |
| 559 | | // Update all counts |
| 598 | } |
| 599 | // Update all counts |
| 560 | 600 | |
| 561 | | m_subcycle++; |
| 562 | | if ((m_subcycle == 2) && (m_PC == 12)) // RESETF3 |
| 601 | m_subcycle++; |
| 602 | if ((m_subcycle == 2) && (m_PC == 12)) // RESETF3 |
| 603 | { |
| 604 | /* Circuit 412 in the patent acts a reset, resetting the pitch counter to 0 |
| 605 | * if INHIBIT was true during the most recent frame transition. |
| 606 | * The exact time this occurs is betwen IP=7, PC=12 sub=0, T=t12 |
| 607 | * and m_IP = 0, PC=0 sub=0, T=t12, a period of exactly 20 cycles, |
| 608 | * which overlaps the time OLDE and OLDP are updated at IP=7 PC=12 T17 |
| 609 | * (and hence INHIBIT itself 2 t-cycles later). We do it here because it is |
| 610 | * convenient and should make no difference in output. |
| 611 | */ |
| 612 | if ((m_IP == 7)&&(m_inhibit==1)) m_pitch_zero = 1; |
| 613 | if ((m_IP == 0)&&(m_pitch_zero==1)) m_pitch_zero = 0; |
| 614 | #ifdef PERFECT_INTERPOLATION_HACK |
| 615 | m_old_zpar = m_zpar; |
| 616 | #endif |
| 617 | m_zpar = 0; /* this gets effectively reset by resetf3, same signal which resets m_PC to 0 */ |
| 618 | if (m_IP == 7) // RESETL4 |
| 563 | 619 | { |
| 564 | | /* Circuit 412 in the patent acts a reset, resetting the pitch counter to 0 |
| 565 | | * if INHIBIT was true during the most recent frame transition. |
| 566 | | * The exact time this occurs is betwen IP=7, PC=12 sub=0, T=t12 |
| 567 | | * and m_IP = 0, PC=0 sub=0, T=t12, a period of exactly 20 cycles, |
| 568 | | * which overlaps the time OLDE and OLDP are updated at IP=7 PC=12 T17 |
| 569 | | * (and hence INHIBIT itself 2 t-cycles later). We do it here because it is |
| 570 | | * convenient and should make no difference in output. |
| 571 | | */ |
| 572 | | if ((m_IP == 7)&&(m_inhibit==1)) m_pitch_zero = 1; |
| 573 | | if ((m_IP == 0)&&(m_pitch_zero==1)) m_pitch_zero = 0; |
| 574 | | if (m_IP == 7) // RESETL4 |
| 575 | | { |
| 576 | | // Latch OLDE and OLDP |
| 577 | | OLD_FRAME_SILENCE_FLAG = NEW_FRAME_SILENCE_FLAG; // m_OLDE |
| 578 | | OLD_FRAME_UNVOICED_FLAG = NEW_FRAME_UNVOICED_FLAG; // m_OLDP |
| 579 | | /* if TALK was clear last frame, halt speech now, since TALKD (latched from TALK on new frame) just went inactive. */ |
| 620 | /* if TALK was clear last frame, halt speech now, since TALKD (latched from TALK on new frame) just went inactive. */ |
| 580 | 621 | #ifdef DEBUG_GENERATION |
| 581 | | if (m_TALK == 0) |
| 582 | | fprintf(stderr,"tms5110_process: processing frame: TALKD = 0 caused by stop frame or buffer empty, halting speech.\n"); |
| 622 | if (m_TALK == 0) |
| 623 | fprintf(stderr,"tms5110_process: processing frame: TALKD = 0 caused by stop frame or buffer empty, halting speech.\n"); |
| 583 | 624 | #endif |
| 584 | | m_TALKD = m_TALK; // TALKD is latched from TALK |
| 585 | | m_TALK = m_SPEN; // TALK is latched from SPEN |
| 586 | | } |
| 587 | | m_subcycle = m_subc_reload; |
| 588 | | m_PC = 0; |
| 589 | | m_IP++; |
| 590 | | m_IP&=0x7; |
| 625 | m_TALKD = m_TALK; // TALKD is latched from TALK |
| 626 | m_TALK = m_SPEN; // TALK is latched from SPEN |
| 591 | 627 | } |
| 592 | | else if (m_subcycle == 3) |
| 593 | | { |
| 594 | | m_subcycle = m_subc_reload; |
| 595 | | m_PC++; |
| 596 | | } |
| 597 | | m_pitch_count++; |
| 598 | | if ((m_pitch_count >= m_current_pitch)||(m_pitch_zero == 1)) m_pitch_count = 0; |
| 599 | | m_pitch_count &= 0x1FF; |
| 628 | m_subcycle = m_subc_reload; |
| 629 | m_PC = 0; |
| 630 | m_IP++; |
| 631 | m_IP&=0x7; |
| 600 | 632 | } |
| 601 | | else // m_TALKD == 0 |
| 633 | else if (m_subcycle == 3) |
| 602 | 634 | { |
| 603 | | m_subcycle++; |
| 604 | | if ((m_subcycle == 2) && (m_PC == 12)) // RESETF3 |
| 635 | m_subcycle = m_subc_reload; |
| 636 | m_PC++; |
| 637 | } |
| 638 | m_pitch_count++; |
| 639 | if ((m_pitch_count >= m_current_pitch)||(m_pitch_zero == 1)) m_pitch_count = 0; |
| 640 | m_pitch_count &= 0x1FF; |
| 641 | buf_count++; |
| 642 | size--; |
| 643 | } |
| 644 | |
| 645 | empty: |
| 646 | |
| 647 | while (size > 0) |
| 648 | { |
| 649 | m_subcycle++; |
| 650 | if ((m_subcycle == 2) && (m_PC == 12)) // RESETF3 |
| 651 | { |
| 652 | if (m_IP == 7) // RESETL4 |
| 605 | 653 | { |
| 606 | | if (m_IP == 7) // RESETL4 |
| 607 | | { |
| 608 | | m_TALKD = m_TALK; // TALKD is latched from TALK |
| 609 | | m_TALK = m_SPEN; // TALK is latched from SPEN |
| 610 | | } |
| 611 | | m_subcycle = m_subc_reload; |
| 612 | | m_PC = 0; |
| 613 | | m_IP++; |
| 614 | | m_IP&=0x7; |
| 654 | m_TALKD = m_TALK; // TALKD is latched from TALK |
| 655 | m_TALK = m_SPEN; // TALK is latched from SPEN |
| 615 | 656 | } |
| 616 | | else if (m_subcycle == 3) |
| 617 | | { |
| 618 | | m_subcycle = m_subc_reload; |
| 619 | | m_PC++; |
| 620 | | } |
| 621 | | buffer[buf_count] = -1; /* should be just -1; actual chip outputs -1 every idle sample; (cf note in data sheet, p 10, table 4) */ |
| 657 | m_subcycle = m_subc_reload; |
| 658 | m_PC = 0; |
| 659 | m_IP++; |
| 660 | m_IP&=0x7; |
| 622 | 661 | } |
| 623 | | buf_count++; |
| 624 | | size--; |
| 662 | else if (m_subcycle == 3) |
| 663 | { |
| 664 | m_subcycle = m_subc_reload; |
| 665 | m_PC++; |
| 666 | } |
| 667 | buffer[buf_count] = -1; /* should be just -1; actual chip outputs -1 every idle sample; (cf note in data sheet, p 10, table 4) */ |
| 668 | buf_count++; |
| 669 | size--; |
| 625 | 670 | } |
| 626 | 671 | } |
| 627 | 672 | |
| r249051 | r249052 | |
|---|
| 853 | 898 | m_SPEN = 1; /* start immediately */ |
| 854 | 899 | /* clear out variables before speaking */ |
| 855 | 900 | m_zpar = 1; // zero all the parameters |
| 856 | | m_uv_zpar = 1; // zero k4-k10 as well |
| 857 | | m_OLDE = 1; // 'silence/zpar' frames are zero energy |
| 858 | | m_OLDP = 1; // 'silence/zpar' frames are zero pitch |
| 859 | | #ifdef PERFECT_INTERPOLATION_HACK |
| 860 | | m_old_zpar = 1; // zero all the old parameters |
| 861 | | m_old_uv_zpar = 1; // zero old k4-k10 as well |
| 862 | | #endif |
| 863 | 901 | m_subc_reload = 0; // SPKSLOW means this is 0 |
| 902 | m_subcycle = m_subc_reload; |
| 903 | m_PC = 0; |
| 904 | m_IP = 0; |
| 864 | 905 | break; |
| 865 | 906 | |
| 866 | 907 | case TMS5110_CMD_READ_BIT: |
| r249051 | r249052 | |
|---|
| 874 | 915 | #ifdef DEBUG_COMMAND_DUMP |
| 875 | 916 | fprintf(stderr,"actually reading a bit now\n"); |
| 876 | 917 | #endif |
| 918 | request_bits(1); |
| 877 | 919 | m_CTL_buffer >>= 1; |
| 878 | 920 | m_CTL_buffer |= (extract_bits(1)<<3); |
| 879 | 921 | m_CTL_buffer &= 0xF; |
| r249051 | r249052 | |
|---|
| 888 | 930 | m_SPEN = 1; /* start immediately */ |
| 889 | 931 | /* clear out variables before speaking */ |
| 890 | 932 | m_zpar = 1; // zero all the parameters |
| 891 | | m_uv_zpar = 1; // zero k4-k10 as well |
| 892 | | m_OLDE = 1; // 'silence/zpar' frames are zero energy |
| 893 | | m_OLDP = 1; // 'silence/zpar' frames are zero pitch |
| 894 | | #ifdef PERFECT_INTERPOLATION_HACK |
| 895 | | m_old_zpar = 1; // zero all the old parameters |
| 896 | | m_old_uv_zpar = 1; // zero old k4-k10 as well |
| 897 | | #endif |
| 898 | 933 | m_subc_reload = 1; // SPEAK means this is 1 |
| 934 | m_subcycle = m_subc_reload; |
| 935 | m_PC = 0; |
| 936 | m_IP = 0; |
| 899 | 937 | break; |
| 900 | 938 | |
| 901 | 939 | case TMS5110_CMD_READ_BRANCH: |
| r249051 | r249052 | |
|---|
| 940 | 978 | |
| 941 | 979 | void tms5110_device::parse_frame() |
| 942 | 980 | { |
| 943 | | int i, rep_flag; |
| 981 | int bits, i, rep_flag; |
| 982 | /** TODO: get rid of bits handling here and move into extract_bits (as in tms5220.c) **/ |
| 983 | /* count the total number of bits available */ |
| 984 | bits = m_fifo_count; |
| 944 | 985 | |
| 986 | /* attempt to extract the energy index */ |
| 987 | bits -= m_coeff->energy_bits; |
| 988 | if (bits < 0) |
| 989 | { |
| 990 | request_bits( -bits ); /* toggle M0 to receive needed bits */ |
| 991 | bits = 0; |
| 992 | } |
| 945 | 993 | // attempt to extract the energy index |
| 946 | 994 | m_new_frame_energy_idx = extract_bits(m_coeff->energy_bits); |
| 947 | 995 | #ifdef DEBUG_PARSE_FRAME_DUMP |
| r249051 | r249052 | |
|---|
| 949 | 997 | fprintf(stderr," "); |
| 950 | 998 | #endif |
| 951 | 999 | |
| 1000 | /* if the energy index is 0 or 15, we're done |
| 1001 | |
| 1002 | if ((indx == 0) || (indx == 15)) |
| 1003 | { |
| 1004 | if (DEBUG_5110) logerror(" (4-bit energy=%d frame)\n",m_new_energy); |
| 1005 | |
| 1006 | // clear the k's |
| 1007 | if (indx == 0) |
| 1008 | { |
| 1009 | for (i = 0; i < m_coeff->num_k; i++) |
| 1010 | m_new_k[i] = 0; |
| 1011 | } |
| 1012 | |
| 1013 | // clear fifo if stop frame encountered |
| 1014 | if (indx == 15) |
| 1015 | { |
| 1016 | if (DEBUG_5110) logerror(" (4-bit energy=%d STOP frame)\n",m_new_energy); |
| 1017 | m_fifo_head = m_fifo_tail = m_fifo_count = 0; |
| 1018 | } |
| 1019 | return; |
| 1020 | }*/ |
| 952 | 1021 | // if the energy index is 0 or 15, we're done |
| 953 | 1022 | if ((m_new_frame_energy_idx == 0) || (m_new_frame_energy_idx == 15)) |
| 954 | 1023 | return; |
| 955 | 1024 | |
| 1025 | |
| 1026 | /* attempt to extract the repeat flag */ |
| 1027 | bits -= 1; |
| 1028 | if (bits < 0) |
| 1029 | { |
| 1030 | request_bits( -bits ); /* toggle M0 to receive needed bits */ |
| 1031 | bits = 0; |
| 1032 | } |
| 956 | 1033 | rep_flag = extract_bits(1); |
| 957 | 1034 | #ifdef DEBUG_PARSE_FRAME_DUMP |
| 958 | 1035 | printbits(rep_flag, 1); |
| 959 | 1036 | fprintf(stderr," "); |
| 960 | 1037 | #endif |
| 961 | 1038 | |
| 1039 | /* attempt to extract the pitch */ |
| 1040 | bits -= m_coeff->pitch_bits; |
| 1041 | if (bits < 0) |
| 1042 | { |
| 1043 | request_bits( -bits ); /* toggle M0 to receive needed bits */ |
| 1044 | bits = 0; |
| 1045 | } |
| 962 | 1046 | m_new_frame_pitch_idx = extract_bits(m_coeff->pitch_bits); |
| 963 | 1047 | #ifdef DEBUG_PARSE_FRAME_DUMP |
| 964 | 1048 | printbits(m_new_frame_pitch_idx,m_coeff->pitch_bits); |
| r249051 | r249052 | |
|---|
| 971 | 1055 | // extract first 4 K coefficients |
| 972 | 1056 | for (i = 0; i < 4; i++) |
| 973 | 1057 | { |
| 1058 | /* attempt to extract 4 K's */ |
| 1059 | bits -= m_coeff->kbits[i]; |
| 1060 | if (bits < 0) |
| 1061 | { |
| 1062 | request_bits( -bits ); /* toggle M0 to receive needed bits */ |
| 1063 | bits = 0; |
| 1064 | } |
| 974 | 1065 | m_new_frame_k_idx[i] = extract_bits(m_coeff->kbits[i]); |
| 975 | 1066 | #ifdef DEBUG_PARSE_FRAME_DUMP |
| 976 | 1067 | printbits(m_new_frame_k_idx[i],m_coeff->kbits[i]); |
| r249051 | r249052 | |
|---|
| 988 | 1079 | // If we got here, we need the remaining 6 K's |
| 989 | 1080 | for (i = 4; i < m_coeff->num_k; i++) |
| 990 | 1081 | { |
| 1082 | bits -= m_coeff->kbits[i]; |
| 1083 | if (bits < 0) |
| 1084 | { |
| 1085 | request_bits( -bits ); /* toggle M0 to receive needed bits */ |
| 1086 | bits = 0; |
| 1087 | } |
| 991 | 1088 | m_new_frame_k_idx[i] = extract_bits(m_coeff->kbits[i]); |
| 992 | 1089 | #ifdef DEBUG_PARSE_FRAME_DUMP |
| 993 | 1090 | printbits(m_new_frame_k_idx[i],m_coeff->kbits[i]); |
| 994 | 1091 | fprintf(stderr," "); |
| 995 | 1092 | #endif |
| 996 | 1093 | } |
| 997 | | #ifdef DEBUG_PARSE_FRAME_DUMP |
| 998 | | fprintf(stderr,"\n"); |
| 999 | | #endif |
| 1000 | 1094 | #ifdef VERBOSE |
| 1095 | if (m_speak_external) |
| 1096 | logerror("Parsed a frame successfully in FIFO - %d bits remaining\n", (m_fifo_count*8)-(m_fifo_bits_taken)); |
| 1097 | else |
| 1001 | 1098 | logerror("Parsed a frame successfully in ROM\n"); |
| 1002 | 1099 | #endif |
| 1003 | 1100 | return; |
| r249051 | r249052 | |
|---|
| 1141 | 1238 | void tms5110_device::device_reset() |
| 1142 | 1239 | { |
| 1143 | 1240 | m_digital_select = FORCE_DIGITAL; // assume analog output |
| 1241 | /* initialize the FIFO */ |
| 1242 | memset(m_fifo, 0, sizeof(m_fifo)); |
| 1243 | m_fifo_head = m_fifo_tail = m_fifo_count = 0; |
| 1144 | 1244 | |
| 1145 | 1245 | /* initialize the chip state */ |
| 1146 | 1246 | m_SPEN = m_TALK = m_TALKD = 0; |
| r249051 | r249052 | |
|---|
| 1153 | 1253 | #ifdef PERFECT_INTERPOLATION_HACK |
| 1154 | 1254 | m_old_frame_energy_idx = m_old_frame_pitch_idx = 0; |
| 1155 | 1255 | memset(m_old_frame_k_idx, 0, sizeof(m_old_frame_k_idx)); |
| 1156 | | m_old_zpar = m_old_uv_zpar = 0; |
| 1256 | m_old_zpar = 0; |
| 1157 | 1257 | #endif |
| 1158 | 1258 | m_new_frame_energy_idx = m_current_energy = m_previous_energy = 0; |
| 1159 | 1259 | m_new_frame_pitch_idx = m_current_pitch = 0; |
| r249051 | r249052 | |
|---|
| 1290 | 1390 | } |
| 1291 | 1391 | |
| 1292 | 1392 | |
| 1393 | |
| 1293 | 1394 | /****************************************************************************** |
| 1294 | 1395 | |
| 1396 | tms5110_ready_r -- return the not ready status from the sound chip |
| 1397 | |
| 1398 | ******************************************************************************/ |
| 1399 | |
| 1400 | int tms5110_device::ready_r() |
| 1401 | { |
| 1402 | /* bring up to date first */ |
| 1403 | m_stream->update(); |
| 1404 | return (m_fifo_count < FIFO_SIZE-1); |
| 1405 | } |
| 1406 | |
| 1407 | |
| 1408 | |
| 1409 | /****************************************************************************** |
| 1410 | |
| 1295 | 1411 | tms5110_update -- update the sound chip so that it is in sync with CPU execution |
| 1296 | 1412 | |
| 1297 | 1413 | ******************************************************************************/ |
trunk/src/emu/sound/tms5220.c
| r249051 | r249052 | |
|---|
| 271 | 271 | * or clip logic, even though the real hardware doesn't do this, partially verified by decap */ |
| 272 | 272 | #undef ALLOW_4_LSB |
| 273 | 273 | |
| 274 | | /* forces m_TALK active instantly whenever m_SPEN would be activated, causing speech delay to be reduced by up to one frame time */ |
| 275 | | /* for some reason, this hack makes victory behave better, though it does not match the patent */ |
| 276 | | #define FAST_START_HACK 1 |
| 277 | 274 | |
| 278 | | |
| 279 | 275 | /* *****configuration of chip connection stuff***** */ |
| 280 | 276 | /* must be defined; if 0, output the waveform as if it was tapped on the speaker pin as usual, if 1, output the waveform as if it was tapped on the i/o pin (volume is much lower in the latter case) */ |
| 281 | 277 | #define FORCE_DIGITAL 0 |
| r249051 | r249052 | |
|---|
| 365 | 361 | save_item(NAME(m_fifo_count)); |
| 366 | 362 | save_item(NAME(m_fifo_bits_taken)); |
| 367 | 363 | |
| 368 | | save_item(NAME(m_previous_TALK_STATUS)); |
| 369 | | save_item(NAME(m_SPEN)); |
| 370 | | save_item(NAME(m_DDIS)); |
| 371 | | save_item(NAME(m_TALK)); |
| 372 | | save_item(NAME(m_TALKD)); |
| 364 | save_item(NAME(m_speaking_now)); |
| 365 | save_item(NAME(m_speak_external)); |
| 366 | save_item(NAME(m_talk_status)); |
| 373 | 367 | save_item(NAME(m_buffer_low)); |
| 374 | 368 | save_item(NAME(m_buffer_empty)); |
| 375 | 369 | save_item(NAME(m_irq_pin)); |
| r249051 | r249052 | |
|---|
| 390 | 384 | save_item(NAME(m_current_pitch)); |
| 391 | 385 | save_item(NAME(m_current_k)); |
| 392 | 386 | |
| 387 | save_item(NAME(m_target_energy)); |
| 388 | save_item(NAME(m_target_pitch)); |
| 389 | save_item(NAME(m_target_k)); |
| 390 | |
| 393 | 391 | save_item(NAME(m_previous_energy)); |
| 394 | 392 | |
| 395 | 393 | save_item(NAME(m_subcycle)); |
| r249051 | r249052 | |
|---|
| 397 | 395 | save_item(NAME(m_PC)); |
| 398 | 396 | save_item(NAME(m_IP)); |
| 399 | 397 | save_item(NAME(m_inhibit)); |
| 400 | | save_item(NAME(m_uv_zpar)); |
| 401 | | save_item(NAME(m_zpar)); |
| 402 | | save_item(NAME(m_pitch_zero)); |
| 403 | 398 | save_item(NAME(m_c_variant_rate)); |
| 404 | 399 | save_item(NAME(m_pitch_count)); |
| 405 | 400 | |
| r249051 | r249052 | |
|---|
| 470 | 465 | |
| 471 | 466 | void tms5220_device::data_write(int data) |
| 472 | 467 | { |
| 473 | | int old_buffer_low = m_buffer_low; |
| 474 | 468 | #ifdef DEBUG_DUMP_INPUT_DATA |
| 475 | 469 | fprintf(stdout, "%c",data); |
| 476 | 470 | #endif |
| 477 | | if (m_DDIS) // If we're in speak external mode |
| 471 | if (m_speak_external) // If we're in speak external mode |
| 478 | 472 | { |
| 479 | 473 | // add this byte to the FIFO |
| 480 | 474 | if (m_fifo_count < FIFO_SIZE) |
| r249051 | r249052 | |
|---|
| 483 | 477 | m_fifo_tail = (m_fifo_tail + 1) % FIFO_SIZE; |
| 484 | 478 | m_fifo_count++; |
| 485 | 479 | #ifdef DEBUG_FIFO |
| 486 | | fprintf(stderr,"data_write: Added byte to FIFO (current count=%2d)\n", m_fifo_count); |
| 480 | logerror("data_write: Added byte to FIFO (current count=%2d)\n", m_fifo_count); |
| 487 | 481 | #endif |
| 488 | 482 | update_fifo_status_and_ints(); |
| 489 | | // if we just unset buffer low with that last write, and SPEN *was* zero (see circuit 251, sheet 12) |
| 490 | | if ((m_SPEN == 0) && ((old_buffer_low == 1) && (m_buffer_low == 0))) // MUST HAVE EDGE DETECT |
| 483 | if ((m_talk_status == 0) && (m_buffer_low == 0)) // we just unset buffer low with that last write, and talk status *was* zero... |
| 491 | 484 | { |
| 492 | | int i; |
| 485 | int i; |
| 493 | 486 | #ifdef DEBUG_FIFO |
| 494 | | fprintf(stderr,"data_write triggered SPEN to go active!\n"); |
| 487 | logerror("data_write triggered talk status to go active!\n"); |
| 495 | 488 | #endif |
| 496 | | // ...then we now have enough bytes to start talking; set zpar and clear out the new frame parameters (it will become old frame just before the first call to parse_frame() ) |
| 497 | | m_zpar = 1; |
| 498 | | m_uv_zpar = 1; // zero k4-k10 as well |
| 499 | | m_OLDE = 1; // 'silence/zpar' frames are zero energy |
| 500 | | m_OLDP = 1; // 'silence/zpar' frames are zero pitch |
| 501 | | #ifdef PERFECT_INTERPOLATION_HACK |
| 502 | | m_old_zpar = 1; // zero all the old parameters |
| 503 | | m_old_uv_zpar = 1; // zero old k4-k10 as well |
| 504 | | #endif |
| 505 | | m_SPEN = 1; |
| 506 | | #ifdef FAST_START_HACK |
| 507 | | m_TALK = 1; |
| 508 | | #endif |
| 489 | // ...then we now have enough bytes to start talking; clear out the new frame parameters (it will become old frame just before the first call to parse_frame() ) |
| 490 | // TODO: the 3 lines below (and others) are needed for victory to not fail its selftest due to a sample ending too late, may require additional investigation |
| 491 | m_subcycle = m_subc_reload; |
| 492 | m_PC = 0; |
| 493 | m_IP = reload_table[m_c_variant_rate&0x3]; // is this correct? should this be always 7 instead, so that the new frame is loaded quickly? |
| 509 | 494 | m_new_frame_energy_idx = 0; |
| 510 | 495 | m_new_frame_pitch_idx = 0; |
| 511 | 496 | for (i = 0; i < 4; i++) |
| r249051 | r249052 | |
|---|
| 514 | 499 | m_new_frame_k_idx[i] = 0xF; |
| 515 | 500 | for (i = 7; i < m_coeff->num_k; i++) |
| 516 | 501 | m_new_frame_k_idx[i] = 0x7; |
| 517 | | |
| 502 | m_talk_status = m_speaking_now = 1; |
| 518 | 503 | } |
| 519 | 504 | } |
| 520 | 505 | else |
| 521 | 506 | { |
| 522 | 507 | #ifdef DEBUG_FIFO |
| 523 | | fprintf(stderr,"data_write: Ran out of room in the tms52xx FIFO! this should never happen!\n"); |
| 508 | logerror("data_write: Ran out of room in the tms52xx FIFO! this should never happen!\n"); |
| 524 | 509 | // at this point, /READY should remain HIGH/inactive until the fifo has at least one byte open in it. |
| 525 | 510 | #endif |
| 526 | 511 | } |
| 527 | 512 | |
| 528 | 513 | |
| 529 | 514 | } |
| 530 | | else //(! m_DDIS) |
| 515 | else //(! m_speak_external) |
| 531 | 516 | // R Nabet : we parse commands at once. It is necessary for such commands as read. |
| 532 | 517 | process_command(data); |
| 533 | 518 | } |
| r249051 | r249052 | |
|---|
| 575 | 560 | m_buffer_low = 0; |
| 576 | 561 | |
| 577 | 562 | /* BE is set if neither byte 15 nor 14 of the fifo are in use; this |
| 578 | | translates to having fifo_count equal to exactly 0 |
| 579 | | */ |
| 563 | translates to having fifo_count equal to exactly 0 */ |
| 580 | 564 | if (m_fifo_count == 0) |
| 581 | 565 | { |
| 582 | 566 | // generate an interrupt if necessary; if /BE was inactive and is now active, set int. |
| 583 | 567 | if (!m_buffer_empty) |
| 584 | 568 | set_interrupt_state(1); |
| 585 | 569 | m_buffer_empty = 1; |
| 586 | | m_TALK = m_SPEN = 0; // /BE being active clears the TALK(TCON) status which in turn clears SPEN |
| 587 | 570 | } |
| 588 | 571 | else |
| 589 | 572 | m_buffer_empty = 0; |
| 590 | 573 | |
| 591 | | // generate an interrupt if /TS was active, and is now inactive. |
| 592 | | // also, in this case, regardless if DDIS was set, unset it. |
| 593 | | if (m_previous_TALK_STATUS == 1 && (TALK_STATUS == 0)) |
| 574 | /* TS is talk status and is set elsewhere in the fifo parser and in |
| 575 | the SPEAK command handler; however, if /BE is true during speak external |
| 576 | mode, it is immediately unset here. */ |
| 577 | if ((m_speak_external == 1) && (m_buffer_empty == 1)) |
| 594 | 578 | { |
| 595 | | #ifdef VERBOSE |
| 596 | | fprintf(stderr,"Talk status WAS 1, is now 0, unsetting DDIS and firing an interrupt!\n"); |
| 597 | | #endif |
| 598 | | set_interrupt_state(1); |
| 599 | | m_DDIS = 0; |
| 579 | // generate an interrupt: /TS was active, and is now inactive. |
| 580 | if (m_talk_status == 1) |
| 581 | { |
| 582 | m_talk_status = m_speak_external = 0; |
| 583 | set_interrupt_state(1); |
| 584 | } |
| 600 | 585 | } |
| 601 | | m_previous_TALK_STATUS = TALK_STATUS; |
| 602 | | |
| 586 | /* Note that TS being unset will also generate an interrupt when a STOP |
| 587 | frame is encountered; this is handled in the sample generator code and not here */ |
| 603 | 588 | } |
| 604 | 589 | |
| 605 | 590 | /********************************************************************************************** |
| r249051 | r249052 | |
|---|
| 612 | 597 | { |
| 613 | 598 | int val = 0; |
| 614 | 599 | |
| 615 | | if (m_DDIS) |
| 600 | if (m_speak_external) |
| 616 | 601 | { |
| 617 | 602 | // extract from FIFO |
| 618 | 603 | while (count--) |
| r249051 | r249052 | |
|---|
| 658 | 643 | /* clear the interrupt pin on status read */ |
| 659 | 644 | set_interrupt_state(0); |
| 660 | 645 | #ifdef DEBUG_PIN_READS |
| 661 | | fprintf(stderr,"Status read: TS=%d BL=%d BE=%d\n", TALK_STATUS, m_buffer_low, m_buffer_empty); |
| 646 | logerror("Status read: TS=%d BL=%d BE=%d\n", m_talk_status, m_buffer_low, m_buffer_empty); |
| 662 | 647 | #endif |
| 663 | 648 | |
| 664 | | return (TALK_STATUS << 7) | (m_buffer_low << 6) | (m_buffer_empty << 5); |
| 649 | return (m_talk_status << 7) | (m_buffer_low << 6) | (m_buffer_empty << 5); |
| 665 | 650 | } |
| 666 | 651 | } |
| 667 | 652 | |
| r249051 | r249052 | |
|---|
| 675 | 660 | int tms5220_device::ready_read() |
| 676 | 661 | { |
| 677 | 662 | #ifdef DEBUG_PIN_READS |
| 678 | | fprintf(stderr,"ready_read: ready pin read, io_ready is %d, fifo count is %d, DDIS(speak external) is %d\n", m_io_ready, m_fifo_count, m_DDIS); |
| 663 | logerror("ready_read: ready pin read, io_ready is %d, fifo count is %d\n", m_io_ready, m_fifo_count); |
| 679 | 664 | #endif |
| 680 | | return ((m_fifo_count < FIFO_SIZE)||(!m_DDIS)) && m_io_ready; |
| 665 | return ((m_fifo_count < FIFO_SIZE)||(!m_speak_external)) && m_io_ready; |
| 681 | 666 | } |
| 682 | 667 | |
| 683 | 668 | |
| r249051 | r249052 | |
|---|
| 733 | 718 | int tms5220_device::int_read() |
| 734 | 719 | { |
| 735 | 720 | #ifdef DEBUG_PIN_READS |
| 736 | | fprintf(stderr,"int_read: irq pin read, state is %d\n", m_irq_pin); |
| 721 | logerror("int_read: irq pin read, state is %d\n", m_irq_pin); |
| 737 | 722 | #endif |
| 738 | 723 | return m_irq_pin; |
| 739 | 724 | } |
| r249051 | r249052 | |
|---|
| 748 | 733 | void tms5220_device::process(INT16 *buffer, unsigned int size) |
| 749 | 734 | { |
| 750 | 735 | int buf_count=0; |
| 751 | | int i, bitout; |
| 736 | int i, bitout, zpar; |
| 752 | 737 | INT32 this_sample; |
| 753 | 738 | |
| 754 | | #ifdef VERBOSE |
| 755 | | fprintf(stderr,"process called with size of %d; IP=%d, PC=%d, subcycle=%d, m_SPEN=%d, m_TALK=%d, m_TALKD=%d\n", size, m_IP, m_PC, m_subcycle, m_SPEN, m_TALK, m_TALKD); |
| 756 | | #endif |
| 739 | /* the following gotos are probably safe to remove */ |
| 740 | /* if we're empty and still not speaking, fill with nothingness */ |
| 741 | if (!m_speaking_now) |
| 742 | goto empty; |
| 757 | 743 | |
| 744 | /* if speak external is set, but talk status is not (yet) set, |
| 745 | wait for buffer low to clear */ |
| 746 | if (!m_talk_status && m_speak_external && m_buffer_low) |
| 747 | goto empty; |
| 748 | |
| 758 | 749 | /* loop until the buffer is full or we've stopped speaking */ |
| 759 | | while (size > 0) |
| 750 | while ((size > 0) && m_speaking_now) |
| 760 | 751 | { |
| 761 | | if(m_TALKD) // speaking |
| 752 | /* if it is the appropriate time to update the old energy/pitch indices, |
| 753 | * i.e. when IP=7, PC=12, T=17, subcycle=2, do so. Since IP=7 PC=12 T=17 |
| 754 | * is JUST BEFORE the transition to IP=0 PC=0 T=0 sybcycle=(0 or 1), |
| 755 | * which happens 4 T-cycles later), we change on the latter. |
| 756 | * The indices are updated here ~12 PCs before the new frame is applied. |
| 757 | */ |
| 758 | /** TODO: the patents 4331836, 4335277, and 4419540 disagree about the timing of this **/ |
| 759 | if ((m_IP == 0) && (m_PC == 0) && (m_subcycle < 2)) |
| 762 | 760 | { |
| 763 | | /* if we're ready for a new frame to be applied, i.e. when IP=0, PC=12, Sub=1 |
| 764 | | * (In reality, the frame was really loaded incrementally during the entire IP=0 |
| 765 | | * PC=x time period, but it doesn't affect anything until IP=0 PC=12 happens) |
| 766 | | */ |
| 767 | | if ((m_IP == 0) && (m_PC == 12) && (m_subcycle == 1)) |
| 768 | | { |
| 769 | | // HACK for regression testing, be sure to comment out before release! |
| 770 | | //m_RNG = 0x1234; |
| 771 | | // end HACK |
| 761 | m_OLDE = (m_new_frame_energy_idx == 0); |
| 762 | m_OLDP = (m_new_frame_pitch_idx == 0); |
| 763 | } |
| 772 | 764 | |
| 773 | | /* appropriately override the interp count if needed; this will be incremented after the frame parse! */ |
| 774 | | m_IP = reload_table[m_c_variant_rate&0x3]; |
| 765 | /* if we're ready for a new frame to be applied, i.e. when IP=0, PC=12, Sub=1 |
| 766 | * (In reality, the frame was really loaded incrementally during the entire IP=0 |
| 767 | * PC=x time period, but it doesn't affect anything until IP=0 PC=12 happens) |
| 768 | */ |
| 769 | if ((m_IP == 0) && (m_PC == 12) && (m_subcycle == 1)) |
| 770 | { |
| 771 | // HACK for regression testing, be sure to comment out before release! |
| 772 | //m_RNG = 0x1234; |
| 773 | // end HACK |
| 775 | 774 | |
| 775 | /* appropriately override the interp count if needed; this will be incremented after the frame parse! */ |
| 776 | m_IP = reload_table[m_c_variant_rate&0x3]; |
| 777 | |
| 776 | 778 | #ifdef PERFECT_INTERPOLATION_HACK |
| 777 | | /* remember previous frame energy, pitch, and coefficients */ |
| 778 | | m_old_frame_energy_idx = m_new_frame_energy_idx; |
| 779 | | m_old_frame_pitch_idx = m_new_frame_pitch_idx; |
| 780 | | for (i = 0; i < m_coeff->num_k; i++) |
| 781 | | m_old_frame_k_idx[i] = m_new_frame_k_idx[i]; |
| 779 | /* remember previous frame energy, pitch, and coefficients */ |
| 780 | m_old_frame_energy_idx = m_new_frame_energy_idx; |
| 781 | m_old_frame_pitch_idx = m_new_frame_pitch_idx; |
| 782 | for (i = 0; i < m_coeff->num_k; i++) |
| 783 | m_old_frame_k_idx[i] = m_new_frame_k_idx[i]; |
| 782 | 784 | #endif |
| 783 | 785 | |
| 784 | | /* Parse a new frame into the new_target_energy, new_target_pitch and new_target_k[] */ |
| 785 | | parse_frame(); |
| 786 | /* if the talk status was clear last frame, halt speech now. */ |
| 787 | if (m_talk_status == 0) |
| 788 | { |
| 789 | #ifdef DEBUG_GENERATION |
| 790 | fprintf(stderr,"tms5220_process: processing frame: talk status = 0 caused by stop frame or buffer empty, halting speech.\n"); |
| 791 | #endif |
| 792 | if (m_speaking_now == 1) // we're done, set all coeffs to idle state but keep going for a bit... |
| 793 | { |
| 794 | /**TODO: should index clearing be done here, or elsewhere? **/ |
| 795 | m_new_frame_energy_idx = 0; |
| 796 | m_new_frame_pitch_idx = 0; |
| 797 | for (i = 0; i < 4; i++) |
| 798 | m_new_frame_k_idx[i] = 0; |
| 799 | for (i = 4; i < 7; i++) |
| 800 | m_new_frame_k_idx[i] = 0xF; |
| 801 | for (i = 7; i < m_coeff->num_k; i++) |
| 802 | m_new_frame_k_idx[i] = 0x7; |
| 803 | m_speaking_now = 2; // wait 8 extra interp periods before shutting down so we can interpolate everything to zero state |
| 804 | } |
| 805 | else // m_speaking_now == 2 // now we're really done. |
| 806 | { |
| 807 | m_speaking_now = 0; // finally halt speech |
| 808 | goto empty; |
| 809 | } |
| 810 | } |
| 786 | 811 | |
| 787 | | // if the new frame is unvoiced (or silenced via ZPAR), be sure to zero out the k5-k10 parameters |
| 788 | | // NOTE: this is probably the bug the tms5100/tmc0280 has, pre-rev D, I think. |
| 789 | | // GUESS: Pre-rev D versions start zeroing k5-k10 immediately upon new frame load regardless of interpolation inhibit |
| 790 | | // I.e. ZPAR = /TALKD || (PC>5&&P=0) |
| 791 | | // GUESS: D and later versions only start or stop zeroing k5-k10 at the IP7->IP0 transition AFTER the frame |
| 792 | | // I.e. ZPAR = /TALKD || (PC>5&&OLDP) |
| 793 | | #ifdef PERFECT_INTERPOLATION_HACK |
| 794 | | m_old_uv_zpar = m_uv_zpar; |
| 795 | | m_old_zpar = m_zpar; // unset old zpar on new frame |
| 812 | |
| 813 | /* Parse a new frame into the new_target_energy, new_target_pitch and new_target_k[], |
| 814 | * but only if we're not just about to end speech */ |
| 815 | if (m_speaking_now == 1) parse_frame(); |
| 816 | #ifdef DEBUG_PARSE_FRAME_DUMP |
| 817 | fprintf(stderr,"\n"); |
| 796 | 818 | #endif |
| 797 | | m_zpar = 0; |
| 798 | | //m_uv_zpar = (OLD_FRAME_UNVOICED_FLAG||m_zpar); // GUESS: fixed version in tmc0280d/tms5100a/cd280x/tms5110 |
| 799 | | m_uv_zpar = (NEW_FRAME_UNVOICED_FLAG||m_zpar); // GUESS: buggy version in tmc0280/tms5100 |
| 800 | 819 | |
| 801 | | /* if the new frame is a stop frame, unset both TALK and SPEN (via TCON). TALKD remains active while the energy is ramping to 0. */ |
| 802 | | if (NEW_FRAME_STOP_FLAG == 1) |
| 820 | /* if the new frame is a stop frame, set an interrupt and set talk status to 0 */ |
| 821 | /** TODO: investigate this later! **/ |
| 822 | if (NEW_FRAME_STOP_FLAG == 1) |
| 803 | 823 | { |
| 804 | | m_TALK = m_SPEN = 0; |
| 824 | m_talk_status = m_speak_external = 0; |
| 825 | set_interrupt_state(1); |
| 826 | update_fifo_status_and_ints(); |
| 805 | 827 | } |
| 806 | 828 | |
| 807 | | /* in all cases where interpolation would be inhibited, set the inhibit flag; otherwise clear it. |
| 808 | | Interpolation inhibit cases: |
| 809 | | * Old frame was voiced, new is unvoiced |
| 810 | | * Old frame was silence/zero energy, new has nonzero energy |
| 811 | | * Old frame was unvoiced, new is voiced |
| 812 | | * Old frame was unvoiced, new frame is silence/zero energy (unique to tms52xx) |
| 813 | | */ |
| 814 | | if ( ((OLD_FRAME_UNVOICED_FLAG == 0) && (NEW_FRAME_UNVOICED_FLAG == 1)) |
| 815 | | || ((OLD_FRAME_UNVOICED_FLAG == 1) && (NEW_FRAME_UNVOICED_FLAG == 0)) |
| 816 | | || ((OLD_FRAME_SILENCE_FLAG == 1) && (NEW_FRAME_SILENCE_FLAG == 0)) |
| 817 | | || ((OLD_FRAME_UNVOICED_FLAG == 1) && (NEW_FRAME_SILENCE_FLAG == 1)) ) |
| 818 | | m_inhibit = 1; |
| 819 | | else // normal frame, normal interpolation |
| 820 | | m_inhibit = 0; |
| 829 | /* in all cases where interpolation would be inhibited, set the inhibit flag; otherwise clear it. |
| 830 | Interpolation inhibit cases: |
| 831 | * Old frame was voiced, new is unvoiced |
| 832 | * Old frame was silence/zero energy, new has nonzero energy |
| 833 | * Old frame was unvoiced, new is voiced |
| 834 | * Old frame was unvoiced, new frame is silence/zero energy (unique to tms52xx) |
| 835 | */ |
| 836 | if ( ((OLD_FRAME_UNVOICED_FLAG == 0) && (NEW_FRAME_UNVOICED_FLAG == 1)) |
| 837 | || ((OLD_FRAME_UNVOICED_FLAG == 1) && (NEW_FRAME_UNVOICED_FLAG == 0)) |
| 838 | || ((OLD_FRAME_SILENCE_FLAG == 1) && (NEW_FRAME_SILENCE_FLAG == 0)) |
| 839 | || ((OLD_FRAME_UNVOICED_FLAG == 1) && (NEW_FRAME_SILENCE_FLAG == 1)) ) |
| 840 | m_inhibit = 1; |
| 841 | else // normal frame, normal interpolation |
| 842 | m_inhibit = 0; |
| 821 | 843 | |
| 844 | /* load new frame targets from tables, using parsed indices */ |
| 845 | m_target_energy = m_coeff->energytable[m_new_frame_energy_idx]; |
| 846 | m_target_pitch = m_coeff->pitchtable[m_new_frame_pitch_idx]; |
| 847 | zpar = NEW_FRAME_UNVOICED_FLAG; // find out if parameters k5-k10 should be zeroed |
| 848 | for (i = 0; i < 4; i++) |
| 849 | m_target_k[i] = m_coeff->ktable[i][m_new_frame_k_idx[i]]; |
| 850 | for (i = 4; i < m_coeff->num_k; i++) |
| 851 | m_target_k[i] = (m_coeff->ktable[i][m_new_frame_k_idx[i]] * (1-zpar)); |
| 852 | |
| 822 | 853 | #ifdef DEBUG_GENERATION |
| 823 | | /* Debug info for current parsed frame */ |
| 824 | | fprintf(stderr, "OLDE: %d; OLDP: %d; ", m_OLDE, m_OLDP); |
| 825 | | fprintf(stderr,"Processing new frame: "); |
| 826 | | if (m_inhibit == 0) |
| 827 | | fprintf(stderr, "Normal Frame\n"); |
| 828 | | else |
| 829 | | fprintf(stderr,"Interpolation Inhibited\n"); |
| 830 | | fprintf(stderr,"*** current Energy, Pitch and Ks = %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d\n",m_current_energy, m_current_pitch, m_current_k[0], m_current_k[1], m_current_k[2], m_current_k[3], m_current_k[4], m_current_k[5], m_current_k[6], m_current_k[7], m_current_k[8], m_current_k[9]); |
| 831 | | fprintf(stderr,"*** target Energy(idx), Pitch, and Ks = %04d(%x),%04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d\n", |
| 832 | | (m_coeff->energytable[m_new_frame_energy_idx] * (1-m_zpar)), |
| 833 | | m_new_frame_energy_idx, |
| 834 | | (m_coeff->pitchtable[m_new_frame_pitch_idx] * (1-m_zpar)), |
| 835 | | (m_coeff->ktable[0][m_new_frame_k_idx[0]] * (1-m_zpar)), |
| 836 | | (m_coeff->ktable[1][m_new_frame_k_idx[1]] * (1-m_zpar)), |
| 837 | | (m_coeff->ktable[2][m_new_frame_k_idx[2]] * (1-m_zpar)), |
| 838 | | (m_coeff->ktable[3][m_new_frame_k_idx[3]] * (1-m_zpar)), |
| 839 | | (m_coeff->ktable[4][m_new_frame_k_idx[4]] * (1-m_uv_zpar)), |
| 840 | | (m_coeff->ktable[5][m_new_frame_k_idx[5]] * (1-m_uv_zpar)), |
| 841 | | (m_coeff->ktable[6][m_new_frame_k_idx[6]] * (1-m_uv_zpar)), |
| 842 | | (m_coeff->ktable[7][m_new_frame_k_idx[7]] * (1-m_uv_zpar)), |
| 843 | | (m_coeff->ktable[8][m_new_frame_k_idx[8]] * (1-m_uv_zpar)), |
| 844 | | (m_coeff->ktable[9][m_new_frame_k_idx[9]] * (1-m_uv_zpar)) ); |
| 854 | /* Debug info for current parsed frame */ |
| 855 | fprintf(stderr, "OLDE: %d; OLDP: %d; ", m_OLDE, m_OLDP); |
| 856 | fprintf(stderr,"Processing frame: "); |
| 857 | if (m_inhibit == 0) |
| 858 | fprintf(stderr, "Normal Frame\n"); |
| 859 | else |
| 860 | fprintf(stderr,"Interpolation Inhibited\n"); |
| 861 | fprintf(stderr,"*** current Energy, Pitch and Ks = %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d\n",m_current_energy, m_current_pitch, m_current_k[0], m_current_k[1], m_current_k[2], m_current_k[3], m_current_k[4], m_current_k[5], m_current_k[6], m_current_k[7], m_current_k[8], m_current_k[9]); |
| 862 | fprintf(stderr,"*** target Energy(idx), Pitch, and Ks = %04d(%x),%04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d\n",m_target_energy, m_new_frame_energy_idx, m_target_pitch, m_target_k[0], m_target_k[1], m_target_k[2], m_target_k[3], m_target_k[4], m_target_k[5], m_target_k[6], m_target_k[7], m_target_k[8], m_target_k[9]); |
| 845 | 863 | #endif |
| 846 | 864 | |
| 847 | | } |
| 848 | | else // Not a new frame, just interpolate the existing frame. |
| 865 | /* if TS is now 0, ramp the energy down to 0. Is this really correct to hardware? */ |
| 866 | if (m_talk_status == 0) |
| 849 | 867 | { |
| 850 | | int inhibit_state = ((m_inhibit==1)&&(m_IP != 0)); // disable inhibit when reaching the last interp period, but don't overwrite the m_inhibit value |
| 851 | | #ifdef PERFECT_INTERPOLATION_HACK |
| 852 | | int samples_per_frame = m_subc_reload?175:266; // either (13 A cycles + 12 B cycles) * 7 interps for normal SPEAK/SPKEXT, or (13*2 A cycles + 12 B cycles) * 7 interps for SPKSLOW |
| 853 | | //int samples_per_frame = m_subc_reload?200:304; // either (13 A cycles + 12 B cycles) * 8 interps for normal SPEAK/SPKEXT, or (13*2 A cycles + 12 B cycles) * 8 interps for SPKSLOW |
| 854 | | int current_sample = (m_subcycle - m_subc_reload)+(m_PC*(3-m_subc_reload))+((m_subc_reload?25:38)*((m_IP-1)&7)); |
| 855 | | //fprintf(stderr, "CS: %03d", current_sample); |
| 856 | | // reset the current energy, pitch, etc to what it was at frame start |
| 857 | | m_current_energy = (m_coeff->energytable[m_old_frame_energy_idx] * (1-m_old_zpar)); |
| 858 | | m_current_pitch = (m_coeff->pitchtable[m_old_frame_pitch_idx] * (1-m_old_zpar)); |
| 859 | | for (i = 0; i < m_coeff->num_k; i++) |
| 860 | | m_current_k[i] = (m_coeff->ktable[i][m_old_frame_k_idx[i]] * (1-((i<4)?m_old_zpar:m_old_uv_zpar))); |
| 861 | | // now adjust each value to be exactly correct for each of the samples per frame |
| 862 | | if (m_IP != 0) // if we're still interpolating... |
| 863 | | { |
| 864 | | m_current_energy = (m_current_energy + (((m_coeff->energytable[m_new_frame_energy_idx] - m_current_energy)*(1-inhibit_state))*current_sample)/samples_per_frame)*(1-m_zpar); |
| 865 | | m_current_pitch = (m_current_pitch + (((m_coeff->pitchtable[m_new_frame_pitch_idx] - m_current_pitch)*(1-inhibit_state))*current_sample)/samples_per_frame)*(1-m_zpar); |
| 866 | | for (i = 0; i < m_coeff->num_k; i++) |
| 867 | | m_current_k[i] = (m_current_k[i] + (((m_coeff->ktable[i][m_new_frame_k_idx[i]] - m_current_k[i])*(1-inhibit_state))*current_sample)/samples_per_frame)*(1-((i<4)?m_zpar:m_uv_zpar)); |
| 868 | | } |
| 869 | | else // we're done, play this frame for 1/8 frame. |
| 870 | | { |
| 871 | | m_current_energy = (m_coeff->energytable[m_new_frame_energy_idx] * (1-m_zpar)); |
| 872 | | m_current_pitch = (m_coeff->pitchtable[m_new_frame_pitch_idx] * (1-m_zpar)); |
| 873 | | for (i = 0; i < m_coeff->num_k; i++) |
| 874 | | m_current_k[i] = (m_coeff->ktable[i][m_new_frame_k_idx[i]] * (1-((i<4)?m_zpar:m_uv_zpar))); |
| 875 | | } |
| 876 | | #else |
| 877 | | //Updates to parameters only happen on subcycle '2' (B cycle) of PCs. |
| 878 | | if (m_subcycle == 2) |
| 879 | | { |
| 880 | | switch(m_PC) |
| 881 | | { |
| 882 | | case 0: /* PC = 0, B cycle, write updated energy */ |
| 883 | | m_current_energy = (m_current_energy + (((m_coeff->energytable[m_new_frame_energy_idx] - m_current_energy)*(1-inhibit_state)) INTERP_SHIFT))*(1-m_zpar); |
| 884 | | break; |
| 885 | | case 1: /* PC = 1, B cycle, write updated pitch */ |
| 886 | | m_current_pitch = (m_current_pitch + (((m_coeff->pitchtable[m_new_frame_pitch_idx] - m_current_pitch)*(1-inhibit_state)) INTERP_SHIFT))*(1-m_zpar); |
| 887 | | break; |
| 888 | | case 2: case 3: case 4: case 5: case 6: case 7: case 8: case 9: case 10: case 11: |
| 889 | | /* PC = 2 through 11, B cycle, write updated K1 through K10 */ |
| 890 | | m_current_k[m_PC-2] = (m_current_k[m_PC-2] + (((m_coeff->ktable[m_PC-2][m_new_frame_k_idx[m_PC-2]] - m_current_k[m_PC-2])*(1-inhibit_state)) INTERP_SHIFT))*(((m_PC-2)>4)?(1-m_uv_zpar):(1-m_zpar)); |
| 891 | | break; |
| 892 | | case 12: /* PC = 12 */ |
| 893 | | /* we should NEVER reach this point, PC=12 doesn't have a subcycle 2 */ |
| 894 | | break; |
| 895 | | } |
| 896 | | } |
| 868 | #ifdef DEBUG_GENERATION |
| 869 | fprintf(stderr,"Talk status is 0, forcing target energy to 0\n"); |
| 897 | 870 | #endif |
| 871 | m_target_energy = 0; |
| 898 | 872 | } |
| 873 | } |
| 874 | else // Not a new frame, just interpolate the existing frame. |
| 875 | { |
| 876 | int inhibit_state = ((m_inhibit==1)&&(m_IP != 0)); // disable inhibit when reaching the last interp period, but don't overwrite the m_inhibit value |
| 877 | #ifdef PERFECT_INTERPOLATION_HACK |
| 878 | int samples_per_frame = m_subc_reload?175:266; // either (13 A cycles + 12 B cycles) * 7 interps for normal SPEAK/SPKEXT, or (13*2 A cycles + 12 B cycles) * 7 interps for SPKSLOW |
| 879 | //int samples_per_frame = m_subc_reload?200:304; // either (13 A cycles + 12 B cycles) * 8 interps for normal SPEAK/SPKEXT, or (13*2 A cycles + 12 B cycles) * 8 interps for SPKSLOW |
| 880 | int current_sample = (m_subcycle - m_subc_reload)+(m_PC*(3-m_subc_reload))+((m_subc_reload?25:38)*((m_IP-1)&7)); |
| 899 | 881 | |
| 900 | | // calculate the output |
| 901 | | if (OLD_FRAME_UNVOICED_FLAG == 1) |
| 882 | zpar = OLD_FRAME_UNVOICED_FLAG; |
| 883 | //fprintf(stderr, "CS: %03d", current_sample); |
| 884 | // reset the current energy, pitch, etc to what it was at frame start |
| 885 | m_current_energy = m_coeff->energytable[m_old_frame_energy_idx]; |
| 886 | m_current_pitch = m_coeff->pitchtable[m_old_frame_pitch_idx]; |
| 887 | for (i = 0; i < 4; i++) |
| 888 | m_current_k[i] = m_coeff->ktable[i][m_old_frame_k_idx[i]]; |
| 889 | for (i = 4; i < m_coeff->num_k; i++) |
| 890 | m_current_k[i] = (m_coeff->ktable[i][m_old_frame_k_idx[i]] * (1-zpar)); |
| 891 | // now adjust each value to be exactly correct for each of the samples per frame |
| 892 | if (m_IP != 0) // if we're still interpolating... |
| 902 | 893 | { |
| 903 | | // generate unvoiced samples here |
| 904 | | if (m_RNG & 1) |
| 905 | | m_excitation_data = ~0x3F; /* according to the patent it is (either + or -) half of the maximum value in the chirp table, so either 01000000(0x40) or 11000000(0xC0)*/ |
| 906 | | else |
| 907 | | m_excitation_data = 0x40; |
| 894 | m_current_energy += (((m_target_energy - m_current_energy)*(1-inhibit_state))*current_sample)/samples_per_frame; |
| 895 | m_current_pitch += (((m_target_pitch - m_current_pitch)*(1-inhibit_state))*current_sample)/samples_per_frame; |
| 896 | for (i = 0; i < m_coeff->num_k; i++) |
| 897 | m_current_k[i] += (((m_target_k[i] - m_current_k[i])*(1-inhibit_state))*current_sample)/samples_per_frame; |
| 908 | 898 | } |
| 909 | | else /* (OLD_FRAME_UNVOICED_FLAG == 0) */ |
| 899 | else // we're done, play this frame for 1/8 frame. |
| 910 | 900 | { |
| 911 | | // generate voiced samples here |
| 912 | | /* US patent 4331836 Figure 14B shows, and logic would hold, that a pitch based chirp |
| 913 | | * function has a chirp/peak and then a long chain of zeroes. |
| 914 | | * The last entry of the chirp rom is at address 0b110011 (51d), the 52nd sample, |
| 915 | | * and if the address reaches that point the ADDRESS incrementer is |
| 916 | | * disabled, forcing all samples beyond 51d to be == 51d |
| 917 | | */ |
| 918 | | if (m_pitch_count >= 51) |
| 919 | | m_excitation_data = (INT8)m_coeff->chirptable[51]; |
| 920 | | else /*m_pitch_count < 51*/ |
| 921 | | m_excitation_data = (INT8)m_coeff->chirptable[m_pitch_count]; |
| 901 | m_current_energy = m_target_energy; |
| 902 | m_current_pitch = m_target_pitch; |
| 903 | for (i = 0; i < m_coeff->num_k; i++) |
| 904 | m_current_k[i] = m_target_k[i]; |
| 922 | 905 | } |
| 923 | | |
| 924 | | // Update LFSR *20* times every sample (once per T cycle), like patent shows |
| 925 | | for (i=0; i<20; i++) |
| 906 | #else |
| 907 | //Updates to parameters only happen on subcycle '2' (B cycle) of PCs. |
| 908 | if (m_subcycle == 2) |
| 926 | 909 | { |
| 927 | | bitout = ((m_RNG >> 12) & 1) ^ |
| 928 | | ((m_RNG >> 3) & 1) ^ |
| 929 | | ((m_RNG >> 2) & 1) ^ |
| 930 | | ((m_RNG >> 0) & 1); |
| 931 | | m_RNG <<= 1; |
| 932 | | m_RNG |= bitout; |
| 910 | switch(m_PC) |
| 911 | { |
| 912 | case 0: /* PC = 0, B cycle, write updated energy */ |
| 913 | m_current_energy += (((m_target_energy - m_current_energy)*(1-inhibit_state)) INTERP_SHIFT); |
| 914 | break; |
| 915 | case 1: /* PC = 1, B cycle, write updated pitch */ |
| 916 | m_current_pitch += (((m_target_pitch - m_current_pitch)*(1-inhibit_state)) INTERP_SHIFT); |
| 917 | break; |
| 918 | case 2: case 3: case 4: case 5: case 6: case 7: case 8: case 9: case 10: case 11: |
| 919 | /* PC = 2 through 11, B cycle, write updated K1 through K10 */ |
| 920 | m_current_k[m_PC-2] += (((m_target_k[m_PC-2] - m_current_k[m_PC-2])*(1-inhibit_state)) INTERP_SHIFT); |
| 921 | break; |
| 922 | case 12: /* PC = 12, do nothing */ |
| 923 | break; |
| 924 | } |
| 933 | 925 | } |
| 934 | | this_sample = lattice_filter(); /* execute lattice filter */ |
| 926 | #endif |
| 927 | } |
| 928 | |
| 929 | // calculate the output |
| 930 | if (OLD_FRAME_UNVOICED_FLAG == 1) |
| 931 | { |
| 932 | // generate unvoiced samples here |
| 933 | if (m_RNG & 1) |
| 934 | m_excitation_data = ~0x3F; /* according to the patent it is (either + or -) half of the maximum value in the chirp table, so either 01000000(0x40) or 11000000(0xC0)*/ |
| 935 | else |
| 936 | m_excitation_data = 0x40; |
| 937 | } |
| 938 | else /* (OLD_FRAME_UNVOICED_FLAG == 0) */ |
| 939 | { |
| 940 | // generate voiced samples here |
| 941 | /* US patent 4331836 Figure 14B shows, and logic would hold, that a pitch based chirp |
| 942 | * function has a chirp/peak and then a long chain of zeroes. |
| 943 | * The last entry of the chirp rom is at address 0b110011 (51d), the 52nd sample, |
| 944 | * and if the address reaches that point the ADDRESS incrementer is |
| 945 | * disabled, forcing all samples beyond 51d to be == 51d |
| 946 | */ |
| 947 | if (m_pitch_count >= 51) |
| 948 | m_excitation_data = (INT8)m_coeff->chirptable[51]; |
| 949 | else /*m_pitch_count < 51*/ |
| 950 | m_excitation_data = (INT8)m_coeff->chirptable[m_pitch_count]; |
| 951 | } |
| 952 | |
| 953 | // Update LFSR *20* times every sample (once per T cycle), like patent shows |
| 954 | for (i=0; i<20; i++) |
| 955 | { |
| 956 | bitout = ((m_RNG >> 12) & 1) ^ |
| 957 | ((m_RNG >> 3) & 1) ^ |
| 958 | ((m_RNG >> 2) & 1) ^ |
| 959 | ((m_RNG >> 0) & 1); |
| 960 | m_RNG <<= 1; |
| 961 | m_RNG |= bitout; |
| 962 | } |
| 963 | this_sample = lattice_filter(); /* execute lattice filter */ |
| 935 | 964 | #ifdef DEBUG_GENERATION_VERBOSE |
| 936 | | //fprintf(stderr,"C:%01d; ",m_subcycle); |
| 937 | | fprintf(stderr,"IP:%01d PC:%02d X:%04d E:%03d P:%03d Pc:%03d ",m_IP, m_PC, m_excitation_data, m_current_energy, m_current_pitch, m_pitch_count); |
| 938 | | //fprintf(stderr,"X:%04d E:%03d P:%03d Pc:%03d ", m_excitation_data, m_current_energy, m_current_pitch, m_pitch_count); |
| 939 | | for (i=0; i<10; i++) |
| 940 | | fprintf(stderr,"K%d:%04d ", i+1, m_current_k[i]); |
| 941 | | fprintf(stderr,"Out:%06d ", this_sample); |
| 942 | | //#ifdef PERFECT_INTERPOLATION_HACK |
| 943 | | // fprintf(stderr,"%d%d%d%d",m_old_zpar,m_zpar,m_old_uv_zpar,m_uv_zpar); |
| 944 | | //#else |
| 945 | | // fprintf(stderr,"x%dx%d",m_zpar,m_uv_zpar); |
| 946 | | //#endif |
| 947 | | fprintf(stderr,"\n"); |
| 965 | //fprintf(stderr,"C:%01d; ",m_subcycle); |
| 966 | fprintf(stderr,"IP:%01d PC:%02d X:%04d E:%03d P:%03d Pc:%03d ",m_IP, m_PC, m_excitation_data, m_current_energy, m_current_pitch, m_pitch_count); |
| 967 | //fprintf(stderr,"X:%04d E:%03d P:%03d Pc:%03d ", m_excitation_data, m_current_energy, m_current_pitch, m_pitch_count); |
| 968 | for (i=0; i<10; i++) |
| 969 | fprintf(stderr,"K%d:%04d ", i+1, m_current_k[i]); |
| 970 | fprintf(stderr,"Out:%06d", this_sample); |
| 971 | fprintf(stderr,"\n"); |
| 948 | 972 | #endif |
| 949 | | /* next, force result to 14 bits (since its possible that the addition at the final (k1) stage of the lattice overflowed) */ |
| 950 | | while (this_sample > 16383) this_sample -= 32768; |
| 951 | | while (this_sample < -16384) this_sample += 32768; |
| 952 | | if (m_digital_select == 0) // analog SPK pin output is only 8 bits, with clipping |
| 953 | | buffer[buf_count] = clip_analog(this_sample); |
| 954 | | else // digital I/O pin output is 12 bits |
| 955 | | { |
| 973 | /* next, force result to 14 bits (since its possible that the addition at the final (k1) stage of the lattice overflowed) */ |
| 974 | while (this_sample > 16383) this_sample -= 32768; |
| 975 | while (this_sample < -16384) this_sample += 32768; |
| 976 | if (m_digital_select == 0) // analog SPK pin output is only 8 bits, with clipping |
| 977 | buffer[buf_count] = clip_analog(this_sample); |
| 978 | else // digital I/O pin output is 12 bits |
| 979 | { |
| 956 | 980 | #ifdef ALLOW_4_LSB |
| 957 | | // input: ssss ssss ssss ssss ssnn nnnn nnnn nnnn |
| 958 | | // N taps: ^ = 0x2000; |
| 959 | | // output: ssss ssss ssss ssss snnn nnnn nnnn nnnN |
| 960 | | buffer[buf_count] = (this_sample<<1)|((this_sample&0x2000)>>13); |
| 981 | // input: ssss ssss ssss ssss ssnn nnnn nnnn nnnn |
| 982 | // N taps: ^ = 0x2000; |
| 983 | // output: ssss ssss ssss ssss snnn nnnn nnnn nnnN |
| 984 | buffer[buf_count] = (this_sample<<1)|((this_sample&0x2000)>>13); |
| 961 | 985 | #else |
| 962 | | this_sample &= ~0xF; |
| 963 | | // input: ssss ssss ssss ssss ssnn nnnn nnnn 0000 |
| 964 | | // N taps: ^^ ^^^ = 0x3E00; |
| 965 | | // output: ssss ssss ssss ssss snnn nnnn nnnN NNNN |
| 966 | | buffer[buf_count] = (this_sample<<1)|((this_sample&0x3E00)>>9); |
| 986 | this_sample &= ~0xF; |
| 987 | // input: ssss ssss ssss ssss ssnn nnnn nnnn 0000 |
| 988 | // N taps: ^^ ^^^ = 0x3E00; |
| 989 | // output: ssss ssss ssss ssss snnn nnnn nnnN NNNN |
| 990 | buffer[buf_count] = (this_sample<<1)|((this_sample&0x3E00)>>9); |
| 967 | 991 | #endif |
| 968 | | } |
| 969 | | // Update all counts |
| 992 | } |
| 993 | // Update all counts |
| 970 | 994 | |
| 971 | | m_subcycle++; |
| 972 | | if ((m_subcycle == 2) && (m_PC == 12)) // RESETF3 |
| 973 | | { |
| 974 | | /* Circuit 412 in the patent acts a reset, resetting the pitch counter to 0 |
| 975 | | * if INHIBIT was true during the most recent frame transition. |
| 976 | | * The exact time this occurs is betwen IP=7, PC=12 sub=0, T=t12 |
| 977 | | * and m_IP = 0, PC=0 sub=0, T=t12, a period of exactly 20 cycles, |
| 978 | | * which overlaps the time OLDE and OLDP are updated at IP=7 PC=12 T17 |
| 979 | | * (and hence INHIBIT itself 2 t-cycles later). We do it here because it is |
| 980 | | * convenient and should make no difference in output. |
| 981 | | */ |
| 982 | | if ((m_IP == 7)&&(m_inhibit==1)) m_pitch_zero = 1; |
| 983 | | if ((m_IP == 0)&&(m_pitch_zero==1)) m_pitch_zero = 0; |
| 984 | | if (m_IP == 7) // RESETL4 |
| 985 | | { |
| 986 | | // Latch OLDE and OLDP |
| 987 | | OLD_FRAME_SILENCE_FLAG = NEW_FRAME_SILENCE_FLAG; // m_OLDE |
| 988 | | OLD_FRAME_UNVOICED_FLAG = NEW_FRAME_UNVOICED_FLAG; // m_OLDP |
| 989 | | /* if TALK was clear last frame, halt speech now, since TALKD (latched from TALK on new frame) just went inactive. */ |
| 990 | | #ifdef DEBUG_GENERATION |
| 991 | | fprintf(stderr,"RESETL4, about to update status: IP=%d, PC=%d, subcycle=%d, m_SPEN=%d, m_TALK=%d, m_TALKD=%d\n", m_IP, m_PC, m_subcycle, m_SPEN, m_TALK, m_TALKD); |
| 992 | | #endif |
| 993 | | #ifdef DEBUG_GENERATION |
| 994 | | if (m_TALK == 0) |
| 995 | | fprintf(stderr,"tms5220_process: processing frame: TALKD = 0 caused by stop frame or buffer empty, halting speech.\n"); |
| 996 | | #endif |
| 997 | | m_TALKD = m_TALK; // TALKD is latched from TALK |
| 998 | | update_fifo_status_and_ints(); // to trigger an interrupt if TALK_STATUS is now inactive |
| 999 | | m_TALK = m_SPEN; // TALK is latched from SPEN |
| 1000 | | #ifdef DEBUG_GENERATION |
| 1001 | | fprintf(stderr,"RESETL4, status updated: IP=%d, PC=%d, subcycle=%d, m_SPEN=%d, m_TALK=%d, m_TALKD=%d\n", m_IP, m_PC, m_subcycle, m_SPEN, m_TALK, m_TALKD); |
| 1002 | | #endif |
| 1003 | | } |
| 1004 | | m_subcycle = m_subc_reload; |
| 1005 | | m_PC = 0; |
| 1006 | | m_IP++; |
| 1007 | | m_IP&=0x7; |
| 1008 | | } |
| 1009 | | else if (m_subcycle == 3) |
| 1010 | | { |
| 1011 | | m_subcycle = m_subc_reload; |
| 1012 | | m_PC++; |
| 1013 | | } |
| 1014 | | m_pitch_count++; |
| 1015 | | if ((m_pitch_count >= m_current_pitch)||(m_pitch_zero == 1)) m_pitch_count = 0; |
| 1016 | | m_pitch_count &= 0x1FF; |
| 995 | m_subcycle++; |
| 996 | if ((m_subcycle == 2) && (m_PC == 12)) |
| 997 | { |
| 998 | /* Circuit 412 in the patent acts a reset, resetting the pitch counter to 0 |
| 999 | * if INHIBIT was true during the most recent frame transition. |
| 1000 | * The exact time this occurs is betwen IP=7, PC=12 sub=0, T=t12 |
| 1001 | * and m_IP = 0, PC=0 sub=0, T=t12, a period of exactly 20 cycles, |
| 1002 | * which overlaps the time OLDE and OLDP are updated at IP=7 PC=12 T17 |
| 1003 | * (and hence INHIBIT itself 2 t-cycles later). We do it here because it is |
| 1004 | * convenient and should make no difference in output. |
| 1005 | */ |
| 1006 | if ((m_IP == 7)&&(m_inhibit==1)) m_pitch_count = 0; |
| 1007 | m_subcycle = m_subc_reload; |
| 1008 | m_PC = 0; |
| 1009 | m_IP++; |
| 1010 | m_IP&=0x7; |
| 1017 | 1011 | } |
| 1018 | | else // m_TALKD == 0 |
| 1012 | else if (m_subcycle == 3) |
| 1019 | 1013 | { |
| 1020 | | m_subcycle++; |
| 1021 | | if ((m_subcycle == 2) && (m_PC == 12)) // RESETF3 |
| 1022 | | { |
| 1023 | | if (m_IP == 7) // RESETL4 |
| 1024 | | { |
| 1025 | | m_TALKD = m_TALK; // TALKD is latched from TALK |
| 1026 | | m_TALK = m_SPEN; // TALK is latched from SPEN |
| 1027 | | } |
| 1028 | | m_subcycle = m_subc_reload; |
| 1029 | | m_PC = 0; |
| 1030 | | m_IP++; |
| 1031 | | m_IP&=0x7; |
| 1032 | | } |
| 1033 | | else if (m_subcycle == 3) |
| 1034 | | { |
| 1035 | | m_subcycle = m_subc_reload; |
| 1036 | | m_PC++; |
| 1037 | | } |
| 1038 | | buffer[buf_count] = -1; /* should be just -1; actual chip outputs -1 every idle sample; (cf note in data sheet, p 10, table 4) */ |
| 1014 | m_subcycle = m_subc_reload; |
| 1015 | m_PC++; |
| 1039 | 1016 | } |
| 1040 | | buf_count++; |
| 1041 | | size--; |
| 1017 | m_pitch_count++; |
| 1018 | if (m_pitch_count >= m_current_pitch) m_pitch_count = 0; |
| 1019 | m_pitch_count &= 0x1FF; |
| 1020 | buf_count++; |
| 1021 | size--; |
| 1042 | 1022 | } |
| 1023 | |
| 1024 | empty: |
| 1025 | |
| 1026 | while (size > 0) |
| 1027 | { |
| 1028 | m_subcycle++; |
| 1029 | if ((m_subcycle == 2) && (m_PC == 12)) |
| 1030 | { |
| 1031 | m_subcycle = m_subc_reload; |
| 1032 | m_PC = 0; |
| 1033 | m_IP++; |
| 1034 | m_IP&=0x7; |
| 1035 | } |
| 1036 | else if (m_subcycle == 3) |
| 1037 | { |
| 1038 | m_subcycle = m_subc_reload; |
| 1039 | m_PC++; |
| 1040 | } |
| 1041 | buffer[buf_count] = -1; /* should be just -1; actual chip outputs -1 every idle sample; (cf note in data sheet, p 10, table 4) */ |
| 1042 | buf_count++; |
| 1043 | size--; |
| 1044 | } |
| 1043 | 1045 | } |
| 1044 | 1046 | |
| 1045 | 1047 | /********************************************************************************************** |
| r249051 | r249052 | |
|---|
| 1180 | 1182 | |
| 1181 | 1183 | void tms5220_device::process_command(unsigned char cmd) |
| 1182 | 1184 | { |
| 1183 | | int i; |
| 1184 | 1185 | #ifdef DEBUG_COMMAND_DUMP |
| 1185 | 1186 | fprintf(stderr,"process_command called with parameter %02X\n",cmd); |
| 1186 | 1187 | #endif |
| r249051 | r249052 | |
|---|
| 1188 | 1189 | switch (cmd & 0x70) |
| 1189 | 1190 | { |
| 1190 | 1191 | case 0x10 : /* read byte */ |
| 1191 | | if (TALK_STATUS == 0) /* TALKST must be clear for RDBY */ |
| 1192 | if (m_talk_status == 0) /* TALKST must be clear for RDBY */ |
| 1192 | 1193 | { |
| 1193 | 1194 | if (m_schedule_dummy_read) |
| 1194 | 1195 | { |
| r249051 | r249052 | |
|---|
| 1210 | 1211 | break; |
| 1211 | 1212 | |
| 1212 | 1213 | case 0x30 : /* read and branch */ |
| 1213 | | if (TALK_STATUS == 0) /* TALKST must be clear for RB */ |
| 1214 | if (m_talk_status == 0) /* TALKST must be clear for RB */ |
| 1214 | 1215 | { |
| 1215 | 1216 | #ifdef VERBOSE |
| 1216 | | fprintf(stderr,"read and branch command received\n"); |
| 1217 | logerror("read and branch command received\n"); |
| 1217 | 1218 | #endif |
| 1218 | 1219 | m_RDB_flag = FALSE; |
| 1219 | 1220 | if (m_speechrom) |
| r249051 | r249052 | |
|---|
| 1222 | 1223 | break; |
| 1223 | 1224 | |
| 1224 | 1225 | case 0x40 : /* load address */ |
| 1225 | | if (TALK_STATUS == 0) /* TALKST must be clear for LA */ |
| 1226 | if (m_talk_status == 0) /* TALKST must be clear for LA */ |
| 1226 | 1227 | { |
| 1227 | 1228 | /* tms5220 data sheet says that if we load only one 4-bit nibble, it won't work. |
| 1228 | 1229 | This code does not care about this. */ |
| r249051 | r249052 | |
|---|
| 1239 | 1240 | if (m_speechrom) |
| 1240 | 1241 | m_speechrom->read(1); |
| 1241 | 1242 | } |
| 1242 | | m_SPEN = 1; |
| 1243 | | #ifdef FAST_START_HACK |
| 1244 | | m_TALK = 1; |
| 1245 | | #endif |
| 1246 | | m_DDIS = 0; |
| 1247 | | m_zpar = 1; // zero all the parameters |
| 1248 | | m_uv_zpar = 1; // zero k4-k10 as well |
| 1249 | | m_OLDE = 1; // 'silence/zpar' frames are zero energy |
| 1250 | | m_OLDP = 1; // 'silence/zpar' frames are zero pitch |
| 1251 | | #ifdef PERFECT_INTERPOLATION_HACK |
| 1252 | | m_old_zpar = 1; // zero all the old parameters |
| 1253 | | m_old_uv_zpar = 1; // zero old k4-k10 as well |
| 1254 | | #endif |
| 1255 | | // following is semi-hack but matches idle state observed on chip |
| 1243 | m_speaking_now = 1; |
| 1244 | m_speak_external = 0; |
| 1245 | m_talk_status = 1; /* start immediately */ |
| 1246 | /* clear out variables before speaking */ |
| 1247 | // TODO: similar to the victory case described above, but for VSM speech |
| 1248 | m_subcycle = m_subc_reload; |
| 1249 | m_PC = 0; |
| 1250 | m_IP = reload_table[m_c_variant_rate&0x3]; |
| 1256 | 1251 | m_new_frame_energy_idx = 0; |
| 1257 | 1252 | m_new_frame_pitch_idx = 0; |
| 1253 | int i; |
| 1258 | 1254 | for (i = 0; i < 4; i++) |
| 1259 | 1255 | m_new_frame_k_idx[i] = 0; |
| 1260 | 1256 | for (i = 4; i < 7; i++) |
| r249051 | r249052 | |
|---|
| 1264 | 1260 | break; |
| 1265 | 1261 | |
| 1266 | 1262 | case 0x60 : /* speak external */ |
| 1267 | | // SPKEXT going active activates SPKEE which clears the fifo |
| 1263 | //SPKEXT going active activates SPKEE which clears the fifo |
| 1268 | 1264 | m_fifo_head = m_fifo_tail = m_fifo_count = m_fifo_bits_taken = 0; |
| 1269 | | // SPEN is enabled when the fifo passes half full (falling edge of BL signal) |
| 1270 | | m_DDIS = 1; |
| 1271 | | m_zpar = 1; // zero all the parameters |
| 1272 | | m_uv_zpar = 1; // zero k4-k10 as well |
| 1273 | | m_OLDE = 1; // 'silence/zpar' frames are zero energy |
| 1274 | | m_OLDP = 1; // 'silence/zpar' frames are zero pitch |
| 1275 | | #ifdef PERFECT_INTERPOLATION_HACK |
| 1276 | | m_old_zpar = 1; // zero all the old parameters |
| 1277 | | m_old_uv_zpar = 1; // zero old k4-k10 as well |
| 1278 | | #endif |
| 1279 | | // following is semi-hack but matches idle state observed on chip |
| 1280 | | m_new_frame_energy_idx = 0; |
| 1281 | | m_new_frame_pitch_idx = 0; |
| 1282 | | for (i = 0; i < 4; i++) |
| 1283 | | m_new_frame_k_idx[i] = 0; |
| 1284 | | for (i = 4; i < 7; i++) |
| 1285 | | m_new_frame_k_idx[i] = 0xF; |
| 1286 | | for (i = 7; i < m_coeff->num_k; i++) |
| 1287 | | m_new_frame_k_idx[i] = 0x7; |
| 1265 | m_speak_external = 1; |
| 1288 | 1266 | m_RDB_flag = FALSE; |
| 1289 | 1267 | break; |
| 1290 | 1268 | |
| r249051 | r249052 | |
|---|
| 1330 | 1308 | m_IP = reload_table[m_c_variant_rate&0x3]; |
| 1331 | 1309 | |
| 1332 | 1310 | update_fifo_status_and_ints(); |
| 1333 | | if (m_DDIS && m_buffer_empty) goto ranout; |
| 1311 | if (!m_talk_status) goto ranout; |
| 1334 | 1312 | |
| 1335 | 1313 | // attempt to extract the energy index |
| 1336 | 1314 | m_new_frame_energy_idx = extract_bits(m_coeff->energy_bits); |
| r249051 | r249052 | |
|---|
| 1339 | 1317 | fprintf(stderr," "); |
| 1340 | 1318 | #endif |
| 1341 | 1319 | update_fifo_status_and_ints(); |
| 1342 | | if (m_DDIS && m_buffer_empty) goto ranout; |
| 1320 | if (!m_talk_status) goto ranout; |
| 1343 | 1321 | // if the energy index is 0 or 15, we're done |
| 1344 | 1322 | if ((m_new_frame_energy_idx == 0) || (m_new_frame_energy_idx == 15)) |
| 1345 | 1323 | return; |
| r249051 | r249052 | |
|---|
| 1359 | 1337 | fprintf(stderr," "); |
| 1360 | 1338 | #endif |
| 1361 | 1339 | update_fifo_status_and_ints(); |
| 1362 | | if (m_DDIS && m_buffer_empty) goto ranout; |
| 1340 | if (!m_talk_status) goto ranout; |
| 1363 | 1341 | // if this is a repeat frame, just do nothing, it will reuse the old coefficients |
| 1364 | 1342 | if (rep_flag) |
| 1365 | 1343 | return; |
| r249051 | r249052 | |
|---|
| 1373 | 1351 | fprintf(stderr," "); |
| 1374 | 1352 | #endif |
| 1375 | 1353 | update_fifo_status_and_ints(); |
| 1376 | | if (m_DDIS && m_buffer_empty) goto ranout; |
| 1354 | if (!m_talk_status) goto ranout; |
| 1377 | 1355 | } |
| 1378 | 1356 | |
| 1379 | 1357 | // if the pitch index was zero, we only need 4 K's... |
| r249051 | r249052 | |
|---|
| 1392 | 1370 | fprintf(stderr," "); |
| 1393 | 1371 | #endif |
| 1394 | 1372 | update_fifo_status_and_ints(); |
| 1395 | | if (m_DDIS && m_buffer_empty) goto ranout; |
| 1373 | if (!m_talk_status) goto ranout; |
| 1396 | 1374 | } |
| 1397 | | #ifdef DEBUG_PARSE_FRAME_DUMP |
| 1398 | | fprintf(stderr,"\n"); |
| 1399 | | #endif |
| 1400 | 1375 | #ifdef VERBOSE |
| 1401 | | if (m_DDIS) |
| 1402 | | fprintf(stderr,"Parsed a frame successfully in FIFO - %d bits remaining\n", (m_fifo_count*8)-(m_fifo_bits_taken)); |
| 1376 | if (m_speak_external) |
| 1377 | logerror("Parsed a frame successfully in FIFO - %d bits remaining\n", (m_fifo_count*8)-(m_fifo_bits_taken)); |
| 1403 | 1378 | else |
| 1404 | | fprintf(stderr,"Parsed a frame successfully in ROM\n"); |
| 1379 | logerror("Parsed a frame successfully in ROM\n"); |
| 1405 | 1380 | #endif |
| 1406 | 1381 | return; |
| 1407 | 1382 | |
| 1408 | 1383 | ranout: |
| 1409 | 1384 | #ifdef DEBUG_FRAME_ERRORS |
| 1410 | | fprintf(stderr,"Ran out of bits on a parse!\n"); |
| 1385 | logerror("Ran out of bits on a parse!\n"); |
| 1411 | 1386 | #endif |
| 1412 | 1387 | return; |
| 1413 | 1388 | } |
| r249051 | r249052 | |
|---|
| 1422 | 1397 | { |
| 1423 | 1398 | if (!TMS5220_IS_52xx) return; // bail out if not a 52xx chip, since there's no int pin |
| 1424 | 1399 | #ifdef DEBUG_PIN_READS |
| 1425 | | fprintf(stderr,"irq pin set to state %d\n", state); |
| 1400 | logerror("irq pin set to state %d\n", state); |
| 1426 | 1401 | #endif |
| 1427 | 1402 | if (!m_irq_handler.isnull() && state != m_irq_pin) |
| 1428 | 1403 | m_irq_handler(!state); |
| r249051 | r249052 | |
|---|
| 1439 | 1414 | { |
| 1440 | 1415 | int state = ready_read(); |
| 1441 | 1416 | #ifdef DEBUG_PIN_READS |
| 1442 | | fprintf(stderr,"ready pin set to state %d\n", state); |
| 1417 | logerror("ready pin set to state %d\n", state); |
| 1443 | 1418 | #endif |
| 1444 | 1419 | if (!m_readyq_handler.isnull() && state != m_ready_pin) |
| 1445 | 1420 | m_readyq_handler(!state); |
| r249051 | r249052 | |
|---|
| 1539 | 1514 | |
| 1540 | 1515 | /* initialize the chip state */ |
| 1541 | 1516 | /* Note that we do not actually clear IRQ on start-up : IRQ is even raised if m_buffer_empty or m_buffer_low are 0 */ |
| 1542 | | m_SPEN = m_DDIS = m_TALK = m_TALKD = m_previous_TALK_STATUS = m_irq_pin = m_ready_pin = 0; |
| 1517 | m_speaking_now = m_speak_external = m_talk_status = m_irq_pin = m_ready_pin = 0; |
| 1543 | 1518 | set_interrupt_state(0); |
| 1544 | 1519 | update_ready_state(); |
| 1545 | 1520 | m_buffer_empty = m_buffer_low = 1; |
| r249051 | r249052 | |
|---|
| 1550 | 1525 | #ifdef PERFECT_INTERPOLATION_HACK |
| 1551 | 1526 | m_old_frame_energy_idx = m_old_frame_pitch_idx = 0; |
| 1552 | 1527 | memset(m_old_frame_k_idx, 0, sizeof(m_old_frame_k_idx)); |
| 1553 | | m_old_zpar = 0; |
| 1554 | 1528 | #endif |
| 1555 | | m_new_frame_energy_idx = m_current_energy = m_previous_energy = 0; |
| 1556 | | m_new_frame_pitch_idx = m_current_pitch = 0; |
| 1557 | | m_zpar = m_uv_zpar = 0; |
| 1529 | m_new_frame_energy_idx = m_current_energy = m_target_energy = m_previous_energy = 0; |
| 1530 | m_new_frame_pitch_idx = m_current_pitch = m_target_pitch = 0; |
| 1558 | 1531 | memset(m_new_frame_k_idx, 0, sizeof(m_new_frame_k_idx)); |
| 1559 | 1532 | memset(m_current_k, 0, sizeof(m_current_k)); |
| 1533 | memset(m_target_k, 0, sizeof(m_target_k)); |
| 1560 | 1534 | |
| 1561 | 1535 | /* initialize the sample generators */ |
| 1562 | 1536 | m_inhibit = 1; |
| r249051 | r249052 | |
|---|
| 1600 | 1574 | /* Write */ |
| 1601 | 1575 | /* bring up to date first */ |
| 1602 | 1576 | #ifdef DEBUG_IO_READY |
| 1603 | | fprintf(stderr,"Serviced write: %02x\n", m_write_latch); |
| 1577 | logerror("Serviced write: %02x\n", m_write_latch); |
| 1604 | 1578 | //fprintf(stderr, "Processed write data: %02X\n", m_write_latch); |
| 1605 | 1579 | #endif |
| 1606 | 1580 | m_stream->update(); |
| r249051 | r249052 | |
|---|
| 1636 | 1610 | m_true_timing = 1; |
| 1637 | 1611 | state &= 0x01; |
| 1638 | 1612 | #ifdef DEBUG_RS_WS |
| 1639 | | fprintf(stderr,"/RS written with data: %d\n", state); |
| 1613 | logerror("/RS written with data: %d\n", state); |
| 1640 | 1614 | #endif |
| 1641 | 1615 | new_val = (m_rs_ws & 0x01) | (state<<1); |
| 1642 | 1616 | if (new_val != m_rs_ws) |
| r249051 | r249052 | |
|---|
| 1649 | 1623 | #ifdef DEBUG_RS_WS |
| 1650 | 1624 | else |
| 1651 | 1625 | /* illegal */ |
| 1652 | | fprintf(stderr,"tms5220_rs_w: illegal\n"); |
| 1626 | logerror("tms5220_rs_w: illegal\n"); |
| 1653 | 1627 | #endif |
| 1654 | 1628 | return; |
| 1655 | 1629 | } |
| r249051 | r249052 | |
|---|
| 1667 | 1641 | { |
| 1668 | 1642 | /* high to low - schedule ready cycle */ |
| 1669 | 1643 | #ifdef DEBUG_RS_WS |
| 1670 | | fprintf(stderr,"Scheduling ready cycle for /RS...\n"); |
| 1644 | logerror("Scheduling ready cycle for /RS...\n"); |
| 1671 | 1645 | #endif |
| 1672 | 1646 | /* upon /RS being activated, /READY goes inactive after 100 nsec from data sheet, through 3 asynchronous gates on patent. This is effectively within one clock, so we immediately set io_ready to 0 and activate the callback. */ |
| 1673 | 1647 | m_io_ready = 0; |
| r249051 | r249052 | |
|---|
| 1688 | 1662 | m_true_timing = 1; |
| 1689 | 1663 | state &= 0x01; |
| 1690 | 1664 | #ifdef DEBUG_RS_WS |
| 1691 | | fprintf(stderr,"/WS written with data: %d\n", state); |
| 1665 | logerror("/WS written with data: %d\n", state); |
| 1692 | 1666 | #endif |
| 1693 | 1667 | new_val = (m_rs_ws & 0x02) | (state<<0); |
| 1694 | 1668 | if (new_val != m_rs_ws) |
| r249051 | r249052 | |
|---|
| 1701 | 1675 | #ifdef DEBUG_RS_WS |
| 1702 | 1676 | else |
| 1703 | 1677 | /* illegal */ |
| 1704 | | fprintf(stderr,"tms5220_ws_w: illegal\n"); |
| 1678 | logerror("tms5220_ws_w: illegal\n"); |
| 1705 | 1679 | #endif |
| 1706 | 1680 | return; |
| 1707 | 1681 | } |
| r249051 | r249052 | |
|---|
| 1719 | 1693 | { |
| 1720 | 1694 | /* high to low - schedule ready cycle */ |
| 1721 | 1695 | #ifdef DEBUG_RS_WS |
| 1722 | | fprintf(stderr,"Scheduling ready cycle for /WS...\n"); |
| 1696 | logerror("Scheduling ready cycle for /WS...\n"); |
| 1723 | 1697 | #endif |
| 1724 | 1698 | /* upon /WS being activated, /READY goes inactive after 100 nsec from data sheet, through 3 asynchronous gates on patent. This is effectively within one clock, so we immediately set io_ready to 0 and activate the callback. */ |
| 1725 | 1699 | m_io_ready = 0; |
| r249051 | r249052 | |
|---|
| 1752 | 1726 | if (space.debugger_access()) return; |
| 1753 | 1727 | |
| 1754 | 1728 | #ifdef DEBUG_RS_WS |
| 1755 | | fprintf(stderr,"tms5220_data_w: data %02x\n", data); |
| 1729 | logerror("tms5220_data_w: data %02x\n", data); |
| 1756 | 1730 | #endif |
| 1757 | 1731 | if (!m_true_timing) |
| 1758 | 1732 | { |
| r249051 | r249052 | |
|---|
| 1765 | 1739 | /* actually in a write ? */ |
| 1766 | 1740 | #ifdef DEBUG_RS_WS |
| 1767 | 1741 | if (!(m_rs_ws == 0x02)) |
| 1768 | | fprintf(stderr,"tms5220_data_w: data written outside ws, status: %02x!\n", m_rs_ws); |
| 1742 | logerror("tms5220_data_w: data written outside ws, status: %02x!\n", m_rs_ws); |
| 1769 | 1743 | #endif |
| 1770 | 1744 | m_write_latch = data; |
| 1771 | 1745 | } |
| r249051 | r249052 | |
|---|
| 1797 | 1771 | return m_read_latch; |
| 1798 | 1772 | #ifdef DEBUG_RS_WS |
| 1799 | 1773 | else |
| 1800 | | fprintf(stderr,"tms5220_status_r: data read outside rs!\n"); |
| 1774 | logerror("tms5220_status_r: data read outside rs!\n"); |
| 1801 | 1775 | #endif |
| 1802 | 1776 | return 0xff; |
| 1803 | 1777 | } |
trunk/src/mame/drivers/chexx.c
| r249051 | r249052 | |
|---|
| 1 | | // license:BSD-3-Clause |
| 2 | | // copyright-holders:Luca Elia |
| 3 | | /*************************************************************************** |
| 4 | | |
| 5 | | Electro-mechanical bubble hockey games: |
| 6 | | |
| 7 | | - Chexx (1983 version) by ICE |
| 8 | | http://www.pinrepair.com/arcade/chexx.htm |
| 9 | | |
| 10 | | - Face-Off, an illegal? copy of Chexx |
| 11 | | http://valker.us/gameroom/SegaFaceOff.htm |
| 12 | | https://casetext.com/case/innovative-concepts-in-ent-v-entertainment-enter |
| 13 | | |
| 14 | | (Some sources indicate these may have been copied from a earlier Sega game called Face-Off) |
| 15 | | |
| 16 | | ***************************************************************************/ |
| 17 | | |
| 18 | | #include "emu.h" |
| 19 | | #include "cpu/m6502/m6502.h" |
| 20 | | #include "sound/ay8910.h" |
| 21 | | #include "sound/digitalk.h" |
| 22 | | #include "machine/6522via.h" |
| 23 | | #include "chexx.lh" |
| 24 | | |
| 25 | | #define MAIN_CLOCK XTAL_4MHz |
| 26 | | |
| 27 | | class chexx_state : public driver_device |
| 28 | | { |
| 29 | | public: |
| 30 | | chexx_state(const machine_config &mconfig, device_type type, const char *tag) |
| 31 | | : driver_device(mconfig, type, tag), |
| 32 | | m_maincpu(*this, "maincpu"), |
| 33 | | m_via(*this, "via6522"), |
| 34 | | m_digitalker(*this, "digitalker"), |
| 35 | | m_aysnd(*this, "aysnd") |
| 36 | | { |
| 37 | | } |
| 38 | | |
| 39 | | // devices |
| 40 | | required_device<cpu_device> m_maincpu; |
| 41 | | required_device<via6522_device> m_via; |
| 42 | | required_device<digitalker_device> m_digitalker; |
| 43 | | optional_device<ay8910_device> m_aysnd; // only faceoffh |
| 44 | | |
| 45 | | // vars |
| 46 | | UINT8 m_port_a, m_port_b; |
| 47 | | UINT8 m_bank; |
| 48 | | UINT32 m_shift; |
| 49 | | UINT8 m_lamp; |
| 50 | | UINT8 m_ay_cmd, m_ay_data; |
| 51 | | |
| 52 | | // callbacks |
| 53 | | TIMER_DEVICE_CALLBACK_MEMBER(update); |
| 54 | | |
| 55 | | // handlers |
| 56 | | DECLARE_READ8_MEMBER(via_a_in); |
| 57 | | DECLARE_READ8_MEMBER(via_b_in); |
| 58 | | |
| 59 | | DECLARE_WRITE8_MEMBER(via_a_out); |
| 60 | | DECLARE_WRITE8_MEMBER(via_b_out); |
| 61 | | |
| 62 | | DECLARE_WRITE_LINE_MEMBER(via_ca2_out); |
| 63 | | DECLARE_WRITE_LINE_MEMBER(via_cb1_out); |
| 64 | | DECLARE_WRITE_LINE_MEMBER(via_cb2_out); |
| 65 | | DECLARE_WRITE_LINE_MEMBER(via_irq_out); |
| 66 | | |
| 67 | | DECLARE_READ8_MEMBER(input_r); |
| 68 | | |
| 69 | | DECLARE_WRITE8_MEMBER(ay_w); |
| 70 | | DECLARE_WRITE8_MEMBER(lamp_w); |
| 71 | | |
| 72 | | // digitalker |
| 73 | | void digitalker_set_bank(UINT8 bank); |
| 74 | | |
| 75 | | // driver_device overrides |
| 76 | | virtual void machine_start(); |
| 77 | | virtual void machine_reset(); |
| 78 | | }; |
| 79 | | |
| 80 | | |
| 81 | | // VIA |
| 82 | | |
| 83 | | READ8_MEMBER(chexx_state::via_a_in) |
| 84 | | { |
| 85 | | UINT8 ret = 0; |
| 86 | | logerror("%s: VIA read A: %02X\n", machine().describe_context(), ret); |
| 87 | | return ret; |
| 88 | | } |
| 89 | | READ8_MEMBER(chexx_state::via_b_in) |
| 90 | | { |
| 91 | | UINT8 ret = 0; |
| 92 | | logerror("%s: VIA read B: %02X\n", machine().describe_context(), ret); |
| 93 | | return ret; |
| 94 | | } |
| 95 | | |
| 96 | | WRITE8_MEMBER(chexx_state::via_a_out) |
| 97 | | { |
| 98 | | m_port_a = data; // multiplexer |
| 99 | | |
| 100 | | m_digitalker->digitalker_data_w(space, 0, data, 0); |
| 101 | | |
| 102 | | // logerror("%s: VIA write A = %02X\n", machine().describe_context(), data); |
| 103 | | } |
| 104 | | WRITE8_MEMBER(chexx_state::via_b_out) |
| 105 | | { |
| 106 | | m_port_b = data; |
| 107 | | |
| 108 | | digitalker_set_bank(data & 3); |
| 109 | | m_digitalker->set_output_gain(0, BIT(data,2) ? 1.0f : 0.0f); // bit 2 controls the Digitalker output |
| 110 | | coin_counter_w(machine(), 0, BIT(~data,3)); |
| 111 | | // bit 4 is EJECT |
| 112 | | // bit 7 is related to speaker out |
| 113 | | |
| 114 | | // logerror("%s: VIA write B = %02X\n", machine().describe_context(), data); |
| 115 | | } |
| 116 | | |
| 117 | | WRITE_LINE_MEMBER(chexx_state::via_ca2_out) |
| 118 | | { |
| 119 | | m_digitalker->digitalker_0_cms_w(CLEAR_LINE); |
| 120 | | m_digitalker->digitalker_0_cs_w(CLEAR_LINE); |
| 121 | | m_digitalker->digitalker_0_wr_w(state ? ASSERT_LINE : CLEAR_LINE); |
| 122 | | |
| 123 | | // logerror("%s: VIA write CA2 = %02X\n", machine().describe_context(), state); |
| 124 | | } |
| 125 | | WRITE_LINE_MEMBER(chexx_state::via_cb1_out) |
| 126 | | { |
| 127 | | // logerror("%s: VIA write CB1 = %02X\n", machine().describe_context(), state); |
| 128 | | } |
| 129 | | WRITE_LINE_MEMBER(chexx_state::via_cb2_out) |
| 130 | | { |
| 131 | | m_shift = ((m_shift << 1) & 0xffffff) | state; |
| 132 | | |
| 133 | | // 7segs (score) |
| 134 | | static const UINT8 patterns[16] = { 0x3f, 0x06, 0x5b, 0x4f, 0x66, 0x6d, 0x7c, 0x07, 0x7f, 0x67, 0, 0, 0, 0, 0, 0 }; // 4511 |
| 135 | | |
| 136 | | output_set_digit_value(0, patterns[(m_shift >> (16+4)) & 0xf]); |
| 137 | | output_set_digit_value(1, patterns[(m_shift >> (16+0)) & 0xf]); |
| 138 | | |
| 139 | | output_set_digit_value(2, patterns[(m_shift >> (8+4)) & 0xf]); |
| 140 | | output_set_digit_value(3, patterns[(m_shift >> (8+0)) & 0xf]); |
| 141 | | |
| 142 | | // Leds (period being played) |
| 143 | | output_set_led_value(0, BIT(m_shift,2)); |
| 144 | | output_set_led_value(1, BIT(m_shift,1)); |
| 145 | | output_set_led_value(2, BIT(m_shift,0)); |
| 146 | | |
| 147 | | // logerror("%s: VIA write CB2 = %02X\n", machine().describe_context(), state); |
| 148 | | } |
| 149 | | WRITE_LINE_MEMBER(chexx_state::via_irq_out) |
| 150 | | { |
| 151 | | m_maincpu->set_input_line(INPUT_LINE_IRQ0, state ? ASSERT_LINE : CLEAR_LINE); |
| 152 | | // logerror("%s: VIA write IRQ = %02X\n", machine().describe_context(), state); |
| 153 | | } |
| 154 | | |
| 155 | | READ8_MEMBER(chexx_state::input_r) |
| 156 | | { |
| 157 | | UINT8 ret = ioport("DSW")->read(); // bits 0-3 |
| 158 | | UINT8 inp = ioport("INPUT")->read(); // bit 7 (multiplexed) |
| 159 | | |
| 160 | | for (int i = 0; i < 8; ++i) |
| 161 | | if ( ((~m_port_a) & (1 << i)) && ((~inp) & (1 << i)) ) |
| 162 | | ret &= 0x7f; |
| 163 | | |
| 164 | | return ret; |
| 165 | | } |
| 166 | | |
| 167 | | // Chexx Memory Map |
| 168 | | |
| 169 | | static ADDRESS_MAP_START( chexx83_map, AS_PROGRAM, 8, chexx_state ) |
| 170 | | AM_RANGE(0x0000, 0x007f) AM_RAM AM_MIRROR(0x100) // 6810 - 128 x 8 static RAM |
| 171 | | AM_RANGE(0x4000, 0x400f) AM_DEVREADWRITE("via6522", via6522_device, read, write) |
| 172 | | AM_RANGE(0x8000, 0x8000) AM_READ(input_r) |
| 173 | | AM_RANGE(0xf800, 0xffff) AM_ROM AM_REGION("maincpu", 0) |
| 174 | | ADDRESS_MAP_END |
| 175 | | |
| 176 | | // Face-Off Memory Map |
| 177 | | |
| 178 | | WRITE8_MEMBER(chexx_state::lamp_w) |
| 179 | | { |
| 180 | | m_lamp = data; |
| 181 | | output_set_lamp_value(0, BIT(m_lamp,0)); |
| 182 | | output_set_lamp_value(1, BIT(m_lamp,1)); |
| 183 | | } |
| 184 | | |
| 185 | | WRITE8_MEMBER(chexx_state::ay_w) |
| 186 | | { |
| 187 | | if (offset) |
| 188 | | { |
| 189 | | m_ay_data = data; |
| 190 | | return; |
| 191 | | } |
| 192 | | |
| 193 | | if (m_ay_cmd == 0x00 && data == 0x03) |
| 194 | | { |
| 195 | | m_aysnd->address_w(space, offset, m_ay_data, mem_mask); |
| 196 | | // logerror("%s: AY addr = %02X\n", machine().describe_context(), m_ay_data); |
| 197 | | } |
| 198 | | else if (m_ay_cmd == 0x00 && data == 0x02) |
| 199 | | { |
| 200 | | m_aysnd->data_w(space, offset, m_ay_data, mem_mask); |
| 201 | | // logerror("%s: AY data = %02X\n", machine().describe_context(), m_ay_data); |
| 202 | | } |
| 203 | | m_ay_cmd = data; |
| 204 | | } |
| 205 | | |
| 206 | | static ADDRESS_MAP_START( faceoffh_map, AS_PROGRAM, 8, chexx_state ) |
| 207 | | AM_RANGE(0x0000, 0x007f) AM_RAM AM_MIRROR(0x100) // M58725P - 2KB |
| 208 | | AM_RANGE(0x4000, 0x400f) AM_DEVREADWRITE("via6522", via6522_device, read, write) |
| 209 | | AM_RANGE(0x8000, 0x8000) AM_READ(input_r) |
| 210 | | AM_RANGE(0xa000, 0xa001) AM_WRITE(ay_w) |
| 211 | | AM_RANGE(0xc000, 0xc000) AM_WRITE(lamp_w) |
| 212 | | AM_RANGE(0xf000, 0xffff) AM_ROM AM_REGION("maincpu", 0) |
| 213 | | ADDRESS_MAP_END |
| 214 | | |
| 215 | | // Inputs |
| 216 | | |
| 217 | | static INPUT_PORTS_START( chexx83 ) |
| 218 | | PORT_START("COIN") |
| 219 | | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1) // play anthem |
| 220 | | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(1) // play anthem |
| 221 | | |
| 222 | | PORT_START("INPUT") |
| 223 | | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("P1 Goal Sensor") |
| 224 | | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 ) PORT_NAME("P2 Goal Sensor") |
| 225 | | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START3 ) PORT_NAME("Puck Near Goal Sensors") // play "ohh" sample |
| 226 | | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("P1 Boo Button") // stop anthem, play "boo" sample, eject puck |
| 227 | | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("P2 Boo Button") // stop anthem, play "boo" sample, eject puck |
| 228 | | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Puck Eject Ready Sensor") |
| 229 | | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 230 | | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 231 | | |
| 232 | | PORT_START("DSW") |
| 233 | | PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2") |
| 234 | | PORT_DIPSETTING( 0x03, DEF_STR( 4C_1C ) ) |
| 235 | | PORT_DIPSETTING( 0x02, DEF_STR( 3C_1C ) ) |
| 236 | | PORT_DIPSETTING( 0x01, DEF_STR( 2C_1C ) ) |
| 237 | | PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) |
| 238 | | PORT_DIPNAME( 0x0c, 0x00, "Game Duration (mins)" ) PORT_DIPLOCATION("SW1:3,4") |
| 239 | | PORT_DIPSETTING( 0x00, "2" ) // 40 |
| 240 | | PORT_DIPSETTING( 0x04, "3" ) // 60 |
| 241 | | PORT_DIPSETTING( 0x08, "4" ) // 80 |
| 242 | | PORT_DIPSETTING( 0x0c, "5" ) // 100 |
| 243 | | PORT_BIT( 0x70, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 244 | | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SPECIAL ) // multiplexed inputs |
| 245 | | INPUT_PORTS_END |
| 246 | | |
| 247 | | // Machine |
| 248 | | |
| 249 | | void chexx_state::machine_start() |
| 250 | | { |
| 251 | | } |
| 252 | | |
| 253 | | void chexx_state::digitalker_set_bank(UINT8 bank) |
| 254 | | { |
| 255 | | if (m_bank != bank) |
| 256 | | { |
| 257 | | UINT8 *src = memregion("samples")->base(); |
| 258 | | UINT8 *dst = memregion("digitalker")->base(); |
| 259 | | |
| 260 | | memcpy(dst, src + bank * 0x4000, 0x4000); |
| 261 | | |
| 262 | | m_bank = bank; |
| 263 | | } |
| 264 | | } |
| 265 | | |
| 266 | | void chexx_state::machine_reset() |
| 267 | | { |
| 268 | | m_bank = -1; |
| 269 | | digitalker_set_bank(0); |
| 270 | | } |
| 271 | | |
| 272 | | TIMER_DEVICE_CALLBACK_MEMBER(chexx_state::update) |
| 273 | | { |
| 274 | | // NMI on coin-in |
| 275 | | UINT8 coin = (~ioport("COIN")->read()) & 0x03; |
| 276 | | m_maincpu->set_input_line(INPUT_LINE_NMI, coin ? ASSERT_LINE : CLEAR_LINE); |
| 277 | | |
| 278 | | // VIA CA1 connected to Digitalker INTR line |
| 279 | | m_via->write_ca1(m_digitalker->digitalker_0_intr_r()); |
| 280 | | |
| 281 | | #if 0 |
| 282 | | // Play the digitalker samples (it's not hooked up correctly yet) |
| 283 | | static UINT8 sample = 0, bank = 0; |
| 284 | | |
| 285 | | if (machine().input().code_pressed_once(KEYCODE_Q)) |
| 286 | | --bank; |
| 287 | | if (machine().input().code_pressed_once(KEYCODE_W)) |
| 288 | | ++bank; |
| 289 | | bank %= 3; |
| 290 | | digitalker_set_bank(bank); |
| 291 | | |
| 292 | | if (machine().input().code_pressed_once(KEYCODE_A)) |
| 293 | | --sample; |
| 294 | | if (machine().input().code_pressed_once(KEYCODE_S)) |
| 295 | | ++sample; |
| 296 | | |
| 297 | | if (machine().input().code_pressed_once(KEYCODE_Z)) |
| 298 | | { |
| 299 | | m_digitalker->digitalker_0_cms_w(CLEAR_LINE); |
| 300 | | m_digitalker->digitalker_0_cs_w(CLEAR_LINE); |
| 301 | | |
| 302 | | address_space &space = m_maincpu->space(AS_PROGRAM); |
| 303 | | m_digitalker->digitalker_data_w(space, 0, sample, 0); |
| 304 | | |
| 305 | | m_digitalker->digitalker_0_wr_w(ASSERT_LINE); |
| 306 | | m_digitalker->digitalker_0_wr_w(CLEAR_LINE); |
| 307 | | m_digitalker->digitalker_0_wr_w(ASSERT_LINE); |
| 308 | | } |
| 309 | | #endif |
| 310 | | } |
| 311 | | |
| 312 | | static MACHINE_CONFIG_START( chexx83, chexx_state ) |
| 313 | | |
| 314 | | // basic machine hardware |
| 315 | | MCFG_CPU_ADD("maincpu", M6502, MAIN_CLOCK/2) |
| 316 | | MCFG_CPU_PROGRAM_MAP(chexx83_map) |
| 317 | | MCFG_TIMER_DRIVER_ADD_PERIODIC("update", chexx_state, update, attotime::from_hz(60)) |
| 318 | | |
| 319 | | // via |
| 320 | | MCFG_DEVICE_ADD("via6522", VIA6522, MAIN_CLOCK/4) |
| 321 | | |
| 322 | | MCFG_VIA6522_READPA_HANDLER(READ8(chexx_state, via_a_in)) |
| 323 | | MCFG_VIA6522_READPB_HANDLER(READ8(chexx_state, via_b_in)) |
| 324 | | |
| 325 | | MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(chexx_state, via_a_out)) |
| 326 | | MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(chexx_state, via_b_out)) |
| 327 | | |
| 328 | | MCFG_VIA6522_CA2_HANDLER(WRITELINE(chexx_state, via_ca2_out)) |
| 329 | | MCFG_VIA6522_CB1_HANDLER(WRITELINE(chexx_state, via_cb1_out)) |
| 330 | | MCFG_VIA6522_CB2_HANDLER(WRITELINE(chexx_state, via_cb2_out)) |
| 331 | | MCFG_VIA6522_IRQ_HANDLER(WRITELINE(chexx_state, via_irq_out)) |
| 332 | | |
| 333 | | // Layout |
| 334 | | MCFG_DEFAULT_LAYOUT(layout_chexx) |
| 335 | | |
| 336 | | // sound hardware |
| 337 | | MCFG_SPEAKER_STANDARD_MONO("mono") |
| 338 | | MCFG_DIGITALKER_ADD("digitalker", MAIN_CLOCK) |
| 339 | | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.16) |
| 340 | | MACHINE_CONFIG_END |
| 341 | | |
| 342 | | static MACHINE_CONFIG_DERIVED( faceoffh, chexx83 ) |
| 343 | | MCFG_CPU_MODIFY("maincpu") |
| 344 | | MCFG_CPU_PROGRAM_MAP(faceoffh_map) |
| 345 | | |
| 346 | | MCFG_SOUND_ADD("aysnd", AY8910, MAIN_CLOCK/2) |
| 347 | | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30) |
| 348 | | MACHINE_CONFIG_END |
| 349 | | |
| 350 | | // ROMs |
| 351 | | |
| 352 | | /*************************************************************************** |
| 353 | | |
| 354 | | Chexx Hockey (1983 version 1.1) |
| 355 | | |
| 356 | | The "long and skinny" Moog CPU board used a 6502 for the processor, |
| 357 | | a 6522 for the PIA, a 6810 static RAM, eight 52164 64k bit sound ROM chips, |
| 358 | | a 40 pin 54104 sound chip, and a single 2716 CPU EPROM |
| 359 | | |
| 360 | | ***************************************************************************/ |
| 361 | | |
| 362 | | ROM_START( chexx83 ) |
| 363 | | ROM_REGION( 0x0800, "maincpu", 0 ) |
| 364 | | ROM_LOAD( "chexx83.u4", 0x0000, 0x0800, CRC(a34abac1) SHA1(75a31670eb6d1b62ba984f0bac7c6e6067f6ae87) ) |
| 365 | | |
| 366 | | ROM_REGION( 0x4000, "digitalker", ROMREGION_ERASE00 ) |
| 367 | | // bank switched (from samples region) |
| 368 | | |
| 369 | | ROM_REGION( 0x10000, "samples", ROMREGION_ERASE00 ) |
| 370 | | ROM_LOAD( "chexx83.u12", 0x0000, 0x2000, NO_DUMP ) |
| 371 | | ROM_LOAD( "chexx83.u13", 0x2000, 0x2000, NO_DUMP ) |
| 372 | | ROM_LOAD( "chexx83.u14", 0x4000, 0x2000, NO_DUMP ) |
| 373 | | ROM_LOAD( "chexx83.u15", 0x6000, 0x2000, NO_DUMP ) |
| 374 | | ROM_LOAD( "chexx83.u16", 0x8000, 0x2000, NO_DUMP ) |
| 375 | | ROM_LOAD( "chexx83.u17", 0xa000, 0x2000, NO_DUMP ) |
| 376 | | ROM_LOAD( "chexx83.u18", 0xc000, 0x2000, NO_DUMP ) |
| 377 | | ROM_LOAD( "chexx83.u19", 0xe000, 0x2000, NO_DUMP ) |
| 378 | | ROM_END |
| 379 | | |
| 380 | | /*************************************************************************** |
| 381 | | |
| 382 | | Face-Off PCB? |
| 383 | | |
| 384 | | Entertainment Enterprises Ltd. 1983 (sticker) |
| 385 | | Serial No. 025402 (sticker) |
| 386 | | MADE IN JAPAN (etched) |
| 387 | | |
| 388 | | CPU: R6502P |
| 389 | | RAM: M58725P (2KB) |
| 390 | | I/O: R6522P (VIA) |
| 391 | | Samples: Digitalker (MM54104) |
| 392 | | Music: AY-3-8910 |
| 393 | | Misc: XTAL 4MHz, DSW4, 42-pin connector |
| 394 | | |
| 395 | | ***************************************************************************/ |
| 396 | | |
| 397 | | ROM_START( faceoffh ) |
| 398 | | ROM_REGION( 0x1000, "maincpu", 0 ) |
| 399 | | // "Copyright (c) 1983 SoftLogic JAPAN" |
| 400 | | ROM_LOAD( "1.5d", 0x0000, 0x1000, CRC(6ab050be) SHA1(ebecae855e22e9c3c46bdee51f84fd5352bf191a) ) |
| 401 | | |
| 402 | | ROM_REGION( 0x4000, "digitalker", ROMREGION_ERASE00 ) |
| 403 | | // bank switched (from samples region) |
| 404 | | |
| 405 | | ROM_REGION( 0x10000, "samples", 0 ) |
| 406 | | ROM_LOAD( "9.2a", 0x0000, 0x2000, CRC(059b3725) SHA1(5837bee1ef34ce19a3101b851ca55029776e4b3e) ) // digitalker header |
| 407 | | ROM_LOAD( "8.2b", 0x2000, 0x2000, CRC(679da4e1) SHA1(01a5b9dd132c1b0de97c153d7de226f5bf357338) ) |
| 408 | | |
| 409 | | ROM_LOAD( "7.2c", 0x4000, 0x2000, CRC(f8461b33) SHA1(717a8842e0ce9ba94dd59504a324bede4844e389) ) // digitalker header |
| 410 | | ROM_LOAD( "6.2d", 0x6000, 0x2000, CRC(156c91e0) SHA1(6017d4b5609b214a6e66dcd76493a7d1442c04d4) ) |
| 411 | | |
| 412 | | ROM_LOAD( "5.3a", 0x8000, 0x2000, CRC(19904604) SHA1(633c211a9a822cdf597a6f3c221ae9c8d6482e82) ) // digitalker header |
| 413 | | ROM_LOAD( "4.3b", 0xa000, 0x2000, CRC(c3386d51) SHA1(7882e88db55ba914be81075e4b2d76e246c34d3b) ) |
| 414 | | |
| 415 | | ROM_FILL( 0xc000, 0x2000, 0xff ) // unpopulated |
| 416 | | ROM_FILL( 0xe000, 0x2000, 0xff ) // unpopulated |
| 417 | | ROM_END |
| 418 | | |
| 419 | | GAME( 1983, chexx83, 0, chexx83, chexx83, driver_device, 0, ROT270, "ICE", "Chexx (EM Bubble Hockey, 1983 1.1)", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_NO_SOUND ) |
| 420 | | GAME( 1983, faceoffh, chexx83, faceoffh, chexx83, driver_device, 0, ROT270, "SoftLogic (Entertainment Enterprises, Ltd. license)", "Face-Off (EM Bubble Hockey)", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_IMPERFECT_SOUND ) |
trunk/src/mame/drivers/faceoffh.c
| r0 | r249052 | |
|---|
| 1 | // license:BSD-3-Clause |
| 2 | // copyright-holders:Luca Elia |
| 3 | /*************************************************************************** |
| 4 | |
| 5 | Sound board for an unknown game. Most probably a bubble hockey EM game |
| 6 | titled "Face-Off", an illegal? copy of Chexx Hockey by ICE. See here: |
| 7 | |
| 8 | http://valker.us/gameroom/SegaFaceOff.htm |
| 9 | https://casetext.com/case/innovative-concepts-in-ent-v-entertainment-enter |
| 10 | http://www.pinrepair.com/arcade/chexx.htm |
| 11 | |
| 12 | "Copyright (c) 1983 SoftLogic JAPAN" in the program rom. |
| 13 | |
| 14 | The same PCB, with serial 025707, is allegedly for "Vampire" (prototype). |
| 15 | |
| 16 | PCB: |
| 17 | |
| 18 | Entertainment Enterprises Ltd. 1983 (sticker) |
| 19 | Serial No. 025402 (sticker) |
| 20 | MADE IN JAPAN (etched) |
| 21 | |
| 22 | CPU: R6502P |
| 23 | RAM: M58725P (2KB) |
| 24 | I/O: R6522P (VIA) |
| 25 | Speech: Digitalker |
| 26 | Sound: AY-3-8910 |
| 27 | Misc: XTAL 4MHz, DSW4, 42-pin connector |
| 28 | |
| 29 | ***************************************************************************/ |
| 30 | |
| 31 | #include "emu.h" |
| 32 | #include "cpu/m6502/m6502.h" |
| 33 | #include "sound/ay8910.h" |
| 34 | #include "sound/digitalk.h" |
| 35 | #include "machine/6522via.h" |
| 36 | |
| 37 | #define MAIN_CLOCK XTAL_4MHz |
| 38 | |
| 39 | class faceoffh_state : public driver_device |
| 40 | { |
| 41 | public: |
| 42 | faceoffh_state(const machine_config &mconfig, device_type type, const char *tag) |
| 43 | : driver_device(mconfig, type, tag), |
| 44 | m_audiocpu(*this, "audiocpu"), |
| 45 | m_digitalker(*this, "digitalker"), |
| 46 | m_aysnd(*this, "aysnd") |
| 47 | { |
| 48 | } |
| 49 | |
| 50 | // devices |
| 51 | required_device<cpu_device> m_audiocpu; |
| 52 | required_device<digitalker_device> m_digitalker; |
| 53 | required_device<ay8910_device> m_aysnd; |
| 54 | |
| 55 | // vars |
| 56 | UINT8 m_ay_cmd, m_ay_data; |
| 57 | UINT8 m_port_a, m_port_b; |
| 58 | UINT8 m_coin; |
| 59 | UINT8 m_bank; |
| 60 | UINT32 m_shift; |
| 61 | |
| 62 | // screen updates |
| 63 | UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); |
| 64 | |
| 65 | // handlers |
| 66 | DECLARE_READ8_MEMBER(via_a_in); |
| 67 | DECLARE_READ8_MEMBER(via_b_in); |
| 68 | |
| 69 | DECLARE_WRITE8_MEMBER(via_a_out); |
| 70 | DECLARE_WRITE8_MEMBER(via_b_out); |
| 71 | |
| 72 | DECLARE_WRITE_LINE_MEMBER(via_ca2_out); |
| 73 | DECLARE_WRITE_LINE_MEMBER(via_cb1_out); |
| 74 | DECLARE_WRITE_LINE_MEMBER(via_cb2_out); |
| 75 | DECLARE_WRITE_LINE_MEMBER(via_irq_out); |
| 76 | |
| 77 | DECLARE_WRITE8_MEMBER(faceoffh_ay_w); |
| 78 | DECLARE_READ8_MEMBER(faceoffh_coin_r); |
| 79 | DECLARE_WRITE8_MEMBER(faceoffh_coin_w); |
| 80 | |
| 81 | // digitalker |
| 82 | void digitalker_set_bank(UINT8 bank); |
| 83 | |
| 84 | // driver_device overrides |
| 85 | virtual void machine_start(); |
| 86 | virtual void machine_reset(); |
| 87 | |
| 88 | virtual void video_start(); |
| 89 | }; |
| 90 | |
| 91 | |
| 92 | // VIA |
| 93 | |
| 94 | READ8_MEMBER(faceoffh_state::via_a_in) |
| 95 | { |
| 96 | UINT8 ret = 0; |
| 97 | logerror("%s: VIA read A: %02X\n", machine().describe_context(), ret); |
| 98 | return ret; |
| 99 | } |
| 100 | READ8_MEMBER(faceoffh_state::via_b_in) |
| 101 | { |
| 102 | UINT8 ret = 0; |
| 103 | logerror("%s: VIA read B: %02X\n", machine().describe_context(), ret); |
| 104 | return ret; |
| 105 | } |
| 106 | |
| 107 | WRITE8_MEMBER(faceoffh_state::via_a_out) |
| 108 | { |
| 109 | m_port_a = data; // multiplexer |
| 110 | // logerror("%s: VIA write A = %02X\n", machine().describe_context(), data); |
| 111 | } |
| 112 | WRITE8_MEMBER(faceoffh_state::via_b_out) |
| 113 | { |
| 114 | m_port_b = data; |
| 115 | // logerror("%s: VIA write B = %02X\n", machine().describe_context(), data); |
| 116 | } |
| 117 | |
| 118 | WRITE_LINE_MEMBER(faceoffh_state::via_ca2_out) |
| 119 | { |
| 120 | // logerror("%s: VIA write CA2 = %02X\n", machine().describe_context(), state); |
| 121 | } |
| 122 | WRITE_LINE_MEMBER(faceoffh_state::via_cb1_out) |
| 123 | { |
| 124 | // logerror("%s: VIA write CB1 = %02X\n", machine().describe_context(), state); |
| 125 | } |
| 126 | WRITE_LINE_MEMBER(faceoffh_state::via_cb2_out) |
| 127 | { |
| 128 | m_shift = ((m_shift << 1) & 0xffffff) | state; |
| 129 | // logerror("%s: VIA write CB2 = %02X\n", machine().describe_context(), state); |
| 130 | } |
| 131 | WRITE_LINE_MEMBER(faceoffh_state::via_irq_out) |
| 132 | { |
| 133 | m_audiocpu->set_input_line(INPUT_LINE_IRQ0, state ? ASSERT_LINE : CLEAR_LINE); |
| 134 | // logerror("%s: VIA write IRQ = %02X\n", machine().describe_context(), state); |
| 135 | } |
| 136 | |
| 137 | // Video |
| 138 | |
| 139 | void faceoffh_state::video_start() |
| 140 | { |
| 141 | } |
| 142 | |
| 143 | UINT32 faceoffh_state::screen_update( screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect ) |
| 144 | { |
| 145 | // NMI on coin-in? |
| 146 | UINT8 coin = (~ioport("INPUTS")->read()) & 0x03; |
| 147 | m_audiocpu->set_input_line(INPUT_LINE_NMI, coin ? ASSERT_LINE : CLEAR_LINE); |
| 148 | |
| 149 | // Play the digitalker samples (it's not hooked up yet) |
| 150 | static UINT8 sample = 0, bank = 0; |
| 151 | |
| 152 | if (screen.machine().input().code_pressed_once(KEYCODE_Q)) |
| 153 | --bank; |
| 154 | if (screen.machine().input().code_pressed_once(KEYCODE_W)) |
| 155 | ++bank; |
| 156 | bank %= 3; |
| 157 | digitalker_set_bank(bank); |
| 158 | |
| 159 | if (screen.machine().input().code_pressed_once(KEYCODE_A)) |
| 160 | --sample; |
| 161 | if (screen.machine().input().code_pressed_once(KEYCODE_S)) |
| 162 | ++sample; |
| 163 | |
| 164 | if (screen.machine().input().code_pressed_once(KEYCODE_Z)) |
| 165 | { |
| 166 | m_digitalker->digitalker_0_cms_w(CLEAR_LINE); |
| 167 | m_digitalker->digitalker_0_cs_w(CLEAR_LINE); |
| 168 | |
| 169 | address_space &space = m_audiocpu->space(AS_PROGRAM); |
| 170 | m_digitalker->digitalker_data_w(space, 0, sample, 0xff); |
| 171 | |
| 172 | m_digitalker->digitalker_0_wr_w(ASSERT_LINE); |
| 173 | m_digitalker->digitalker_0_wr_w(CLEAR_LINE); |
| 174 | m_digitalker->digitalker_0_wr_w(ASSERT_LINE); |
| 175 | } |
| 176 | |
| 177 | popmessage("COIN: %02X VIAB: %02X\nCOUNT: %02X %02X LEDS: %02X\nSAMPLE: %02X (B%X)", |
| 178 | m_coin, m_port_b, |
| 179 | (m_shift >> 16) & 0xff, (m_shift >> 8) & 0xff, (m_shift >> 0) & 0xff, // 2 x 7-seg, 3 leds |
| 180 | sample, bank |
| 181 | ); |
| 182 | return 0; |
| 183 | } |
| 184 | |
| 185 | // Sound |
| 186 | |
| 187 | #if 0 |
| 188 | READ8_MEMBER(scramble_state::faceoffh_digitalker_intr_r) |
| 189 | { |
| 190 | return m_digitalker->digitalker_0_intr_r(); |
| 191 | } |
| 192 | |
| 193 | WRITE8_MEMBER(scramble_state::faceoffh_digitalker_control_w) |
| 194 | { |
| 195 | m_digitalker->digitalker_0_cs_w (data & 1 ? ASSERT_LINE : CLEAR_LINE); |
| 196 | m_digitalker->digitalker_0_cms_w(data & 2 ? ASSERT_LINE : CLEAR_LINE); |
| 197 | m_digitalker->digitalker_0_wr_w (data & 4 ? ASSERT_LINE : CLEAR_LINE); |
| 198 | } |
| 199 | #endif |
| 200 | |
| 201 | WRITE8_MEMBER(faceoffh_state::faceoffh_ay_w) |
| 202 | { |
| 203 | if (offset) |
| 204 | { |
| 205 | m_ay_data = data; |
| 206 | return; |
| 207 | } |
| 208 | |
| 209 | if (m_ay_cmd == 0x00 && data == 0x03) |
| 210 | { |
| 211 | m_aysnd->address_w(space, offset, m_ay_data, mem_mask); |
| 212 | // logerror("%s: AY addr = %02X\n", machine().describe_context(), m_ay_data); |
| 213 | } |
| 214 | else if (m_ay_cmd == 0x00 && data == 0x02) |
| 215 | { |
| 216 | m_aysnd->data_w(space, offset, m_ay_data, mem_mask); |
| 217 | // logerror("%s: AY data = %02X\n", machine().describe_context(), m_ay_data); |
| 218 | } |
| 219 | m_ay_cmd = data; |
| 220 | } |
| 221 | |
| 222 | // Memory Map |
| 223 | |
| 224 | READ8_MEMBER(faceoffh_state::faceoffh_coin_r) |
| 225 | { |
| 226 | UINT8 ret = ioport("DSW")->read(); // bits 0-3 |
| 227 | UINT8 inp = ioport("INPUTS")->read(); // bit 7 (multiplexed) |
| 228 | |
| 229 | for (int i = 0; i < 8; ++i) |
| 230 | if ( ((~m_port_a) & (1 << i)) && ((~inp) & (1 << i)) ) |
| 231 | ret &= 0x7f; |
| 232 | |
| 233 | return ret; |
| 234 | } |
| 235 | |
| 236 | WRITE8_MEMBER(faceoffh_state::faceoffh_coin_w) |
| 237 | { |
| 238 | m_coin = data; |
| 239 | // coin_counter_w(machine(), 0, data & 0x01); |
| 240 | // coin_counter_w(machine(), 1, data & 0x02); |
| 241 | coin_lockout_w(machine(), 0, data & 0x01); |
| 242 | coin_lockout_w(machine(), 1, data & 0x02); |
| 243 | } |
| 244 | |
| 245 | //M58725P - 2KB |
| 246 | static ADDRESS_MAP_START( faceoffh_map, AS_PROGRAM, 8, faceoffh_state ) |
| 247 | AM_RANGE(0x0000, 0x00ff) AM_RAM |
| 248 | AM_RANGE(0x0100, 0x01ff) AM_RAM |
| 249 | |
| 250 | AM_RANGE(0x4000, 0x400f) AM_DEVREADWRITE("via6522", via6522_device, read, write) |
| 251 | |
| 252 | AM_RANGE(0x8000, 0x8000) AM_READ(faceoffh_coin_r) |
| 253 | |
| 254 | AM_RANGE(0xa000, 0xa001) AM_WRITE(faceoffh_ay_w) |
| 255 | |
| 256 | AM_RANGE(0xc000, 0xc000) AM_WRITE(faceoffh_coin_w) |
| 257 | |
| 258 | AM_RANGE(0xf000, 0xffff) AM_ROM AM_REGION("audiocpu", 0) |
| 259 | ADDRESS_MAP_END |
| 260 | |
| 261 | // Inputs |
| 262 | |
| 263 | static INPUT_PORTS_START( faceoffh ) |
| 264 | PORT_START("INPUTS") |
| 265 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1) // coin 1 (start music) |
| 266 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(1) // coin 2 (start music) |
| 267 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 ) // ? |
| 268 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) // (stop music) |
| 269 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 ) // (stop music) |
| 270 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON3 ) // ? |
| 271 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON4 ) |
| 272 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON5 ) |
| 273 | |
| 274 | PORT_START("DSW") |
| 275 | PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2") |
| 276 | PORT_DIPSETTING( 0x03, DEF_STR( 4C_1C ) ) |
| 277 | PORT_DIPSETTING( 0x02, DEF_STR( 3C_1C ) ) |
| 278 | PORT_DIPSETTING( 0x01, DEF_STR( 2C_1C ) ) |
| 279 | PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) |
| 280 | PORT_DIPNAME( 0x0c, 0x00, "Game Duration (mins)" ) PORT_DIPLOCATION("SW1:3,4") |
| 281 | PORT_DIPSETTING( 0x00, "2" ) // 40 |
| 282 | PORT_DIPSETTING( 0x04, "3" ) // 60 |
| 283 | PORT_DIPSETTING( 0x08, "4" ) // 80 |
| 284 | PORT_DIPSETTING( 0x0c, "5" ) // 100 |
| 285 | PORT_BIT( 0x70, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 286 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SPECIAL ) // multiplexed inputs |
| 287 | INPUT_PORTS_END |
| 288 | |
| 289 | // Machine |
| 290 | |
| 291 | void faceoffh_state::machine_start() |
| 292 | { |
| 293 | } |
| 294 | |
| 295 | void faceoffh_state::digitalker_set_bank(UINT8 bank) |
| 296 | { |
| 297 | if (m_bank != bank) |
| 298 | { |
| 299 | UINT8 *src = memregion("samples")->base(); |
| 300 | UINT8 *dst = memregion("digitalker")->base(); |
| 301 | |
| 302 | memcpy(dst, src + bank * 0x4000, 0x4000); |
| 303 | |
| 304 | m_bank = bank; |
| 305 | } |
| 306 | } |
| 307 | |
| 308 | void faceoffh_state::machine_reset() |
| 309 | { |
| 310 | m_bank = -1; |
| 311 | digitalker_set_bank(0); |
| 312 | } |
| 313 | |
| 314 | static MACHINE_CONFIG_START( faceoffh, faceoffh_state ) |
| 315 | |
| 316 | // basic machine hardware |
| 317 | MCFG_CPU_ADD("audiocpu", M6502, MAIN_CLOCK/2) |
| 318 | MCFG_CPU_PROGRAM_MAP(faceoffh_map) |
| 319 | // MCFG_CPU_VBLANK_INT_DRIVER("screen", faceoffh_state, irq0_line_hold) |
| 320 | // MCFG_CPU_VBLANK_INT_DRIVER("screen", faceoffh_state, nmi_line_pulse) |
| 321 | |
| 322 | // via |
| 323 | MCFG_DEVICE_ADD("via6522", VIA6522, MAIN_CLOCK/4) |
| 324 | |
| 325 | MCFG_VIA6522_READPA_HANDLER(READ8(faceoffh_state,via_a_in)) |
| 326 | MCFG_VIA6522_READPB_HANDLER(READ8(faceoffh_state,via_b_in)) |
| 327 | |
| 328 | MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(faceoffh_state, via_a_out)) |
| 329 | MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(faceoffh_state, via_b_out)) |
| 330 | |
| 331 | MCFG_VIA6522_CA2_HANDLER(WRITELINE(faceoffh_state, via_ca2_out)) |
| 332 | MCFG_VIA6522_CB1_HANDLER(WRITELINE(faceoffh_state, via_cb1_out)) |
| 333 | MCFG_VIA6522_CB2_HANDLER(WRITELINE(faceoffh_state, via_cb2_out)) |
| 334 | MCFG_VIA6522_IRQ_HANDLER(WRITELINE(faceoffh_state, via_irq_out)/*DEVWRITELINE("audiocpu", m6502_device, write_irq4)*/) |
| 335 | |
| 336 | // video hardware |
| 337 | MCFG_SCREEN_ADD("screen", RASTER) |
| 338 | MCFG_SCREEN_REFRESH_RATE(60) |
| 339 | MCFG_SCREEN_UPDATE_DRIVER(faceoffh_state, screen_update) |
| 340 | MCFG_SCREEN_SIZE(256, 256) |
| 341 | MCFG_SCREEN_VISIBLE_AREA(0, 256-1, 0, 256-1) |
| 342 | MCFG_SCREEN_PALETTE("palette") |
| 343 | |
| 344 | MCFG_PALETTE_ADD("palette", 16) |
| 345 | |
| 346 | // sound hardware |
| 347 | MCFG_SPEAKER_STANDARD_MONO("mono") |
| 348 | MCFG_SOUND_ADD("aysnd", AY8910, MAIN_CLOCK/2) |
| 349 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30) |
| 350 | |
| 351 | MCFG_DIGITALKER_ADD("digitalker", MAIN_CLOCK) |
| 352 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.16) |
| 353 | MACHINE_CONFIG_END |
| 354 | |
| 355 | // ROMs |
| 356 | |
| 357 | ROM_START( faceoffh ) |
| 358 | ROM_REGION( 0x1000, "audiocpu", 0 ) |
| 359 | ROM_LOAD( "1.5d", 0x0000, 0x1000, CRC(6ab050be) SHA1(ebecae855e22e9c3c46bdee51f84fd5352bf191a) ) |
| 360 | |
| 361 | ROM_REGION( 0x4000, "digitalker", ROMREGION_ERASE00 ) |
| 362 | // bank switched (from samples region) |
| 363 | |
| 364 | ROM_REGION( 0xc000, "samples", 0 ) |
| 365 | ROM_LOAD( "9.2a", 0x0000, 0x2000, CRC(059b3725) SHA1(5837bee1ef34ce19a3101b851ca55029776e4b3e) ) // digitalker header |
| 366 | ROM_LOAD( "8.2b", 0x2000, 0x2000, CRC(679da4e1) SHA1(01a5b9dd132c1b0de97c153d7de226f5bf357338) ) |
| 367 | |
| 368 | ROM_LOAD( "7.2c", 0x4000, 0x2000, CRC(f8461b33) SHA1(717a8842e0ce9ba94dd59504a324bede4844e389) ) // digitalker header |
| 369 | ROM_LOAD( "6.2d", 0x6000, 0x2000, CRC(156c91e0) SHA1(6017d4b5609b214a6e66dcd76493a7d1442c04d4) ) |
| 370 | |
| 371 | ROM_LOAD( "5.3a", 0x8000, 0x2000, CRC(19904604) SHA1(633c211a9a822cdf597a6f3c221ae9c8d6482e82) ) // digitalker header |
| 372 | ROM_LOAD( "4.3b", 0xa000, 0x2000, CRC(c3386d51) SHA1(7882e88db55ba914be81075e4b2d76e246c34d3b) ) |
| 373 | ROM_END |
| 374 | |
| 375 | GAME( 1983, faceoffh, 0, faceoffh, faceoffh, driver_device, 0, ROT270, "SoftLogic (Entertainment Enterprises, Ltd. license)", "Face-Off (EM Bubble Hockey)", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_IMPERFECT_SOUND ) |
trunk/src/mame/drivers/seattle.c
| r249051 | r249052 | |
|---|
| 2756 | 2756 | ROM_REGION32_LE( 0x80000, "user1", 0 ) /* Boot Code Version L1.2 (10/8/96) */ |
| 2757 | 2757 | ROM_LOAD( "wg3dh_12.u32", 0x000000, 0x80000, CRC(15e4cea2) SHA1(72c0db7dc53ce645ba27a5311b5ce803ad39f131) ) |
| 2758 | 2758 | |
| 2759 | | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2759 | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2760 | 2760 | |
| 2761 | 2761 | DISK_REGION( "ide:0:hdd:image" ) /* Hard Drive Version 1.3 (Guts 10/15/96, Main 10/15/96) */ |
| 2762 | 2762 | DISK_IMAGE( "wg3dh", 0, SHA1(4fc6f25d7f043d9bcf8743aa8df1d9be3cbc375b) ) |
| r249051 | r249052 | |
|---|
| 2770 | 2770 | ROM_REGION32_LE( 0x80000, "user1", 0 ) /* Boot Code Version 1.0ce 7/2/97 */ |
| 2771 | 2771 | ROM_LOAD( "mace10ce.u32", 0x000000, 0x80000, CRC(7a50b37e) SHA1(33788835f84a9443566c80bee9f20a1691490c6d) ) |
| 2772 | 2772 | |
| 2773 | | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2773 | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2774 | 2774 | |
| 2775 | 2775 | DISK_REGION( "ide:0:hdd:image" ) /* Hard Drive Version 1.0B 6/10/97 (Guts 7/2/97, Main 7/2/97) */ |
| 2776 | 2776 | DISK_IMAGE( "mace", 0, SHA1(96ec8d3ff5dd894e21aa81403bcdbeba44bb97ea) ) |
| r249051 | r249052 | |
|---|
| 2784 | 2784 | ROM_REGION32_LE( 0x80000, "user1", 0 ) /* Boot Code Version ??? 5/7/97 */ |
| 2785 | 2785 | ROM_LOAD( "maceboot.u32", 0x000000, 0x80000, CRC(effe3ebc) SHA1(7af3ca3580d6276ffa7ab8b4c57274e15ee6bcbb) ) |
| 2786 | 2786 | |
| 2787 | | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2787 | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2788 | 2788 | |
| 2789 | 2789 | DISK_REGION( "ide:0:hdd:image" ) /* Hard Drive Version 1.0a (Guts 6/9/97, Main 5/12/97) */ |
| 2790 | 2790 | DISK_IMAGE( "macea", 0, BAD_DUMP SHA1(9bd4a60627915d71932cab24f89c48ea21f4c1cb) ) |
| r249051 | r249052 | |
|---|
| 2798 | 2798 | ROM_REGION32_LE( 0x80000, "user1", 0 ) /* Boot Code Version L1.0 */ |
| 2799 | 2799 | ROM_LOAD( "hdboot.u32", 0x000000, 0x80000, CRC(39a35f1b) SHA1(c46d83448399205d38e6e41dd56abbc362254254) ) |
| 2800 | 2800 | |
| 2801 | | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2801 | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2802 | 2802 | |
| 2803 | 2803 | ROM_REGION32_LE( 0x200000, "cageboot", 0 ) /* TMS320C31 boot ROM Version L1.0 */ |
| 2804 | 2804 | ROM_LOAD32_BYTE( "sndboot.u69", 0x000000, 0x080000, CRC(7e52cdc7) SHA1(f735063e19d2ca672cef6d761a2a47df272e8c59) ) |
| r249051 | r249052 | |
|---|
| 2818 | 2818 | ROM_REGION32_LE( 0x80000, "user1", 0 ) /* Boot Code */ |
| 2819 | 2819 | ROM_LOAD( "boot.bin", 0x000000, 0x080000, CRC(0555b3cf) SHA1(a48abd6d06a26f4f9b6c52d8c0af6095b6be57fd) ) |
| 2820 | 2820 | |
| 2821 | | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2821 | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2822 | 2822 | |
| 2823 | 2823 | ROM_REGION32_LE( 0x200000, "cageboot", 0 ) /* TMS320C31 boot ROM */ |
| 2824 | 2824 | ROM_LOAD32_BYTE( "audboot.bin", 0x000000, 0x080000, CRC(c70c060d) SHA1(dd014bd13efdf5adc5450836bd4650351abefc46) ) |
| r249051 | r249052 | |
|---|
| 2838 | 2838 | ROM_REGION32_LE( 0x80000, "user1", 0 ) /* Boot Code Version 1.2 (2/18/98) */ |
| 2839 | 2839 | ROM_LOAD( "caspd1_2.u32", 0x000000, 0x80000, CRC(0a235e4e) SHA1(b352f10fad786260b58bd344b5002b6ea7aaf76d) ) |
| 2840 | 2840 | |
| 2841 | | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2841 | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2842 | 2842 | |
| 2843 | 2843 | DISK_REGION( "ide:0:hdd:image" ) /* Release version 2.1a (4/17/98) (Guts 1.25 4/17/98, Main 4/17/98) */ |
| 2844 | 2844 | DISK_IMAGE( "calspeed", 0, SHA1(08d411c591d4b8bbdd6437ea80d01c4cec8516f8) ) |
| r249051 | r249052 | |
|---|
| 2851 | 2851 | ROM_REGION32_LE( 0x80000, "user1", 0 ) /* Boot Code Version 1.2 (2/18/98) */ |
| 2852 | 2852 | ROM_LOAD( "caspd1_2.u32", 0x000000, 0x80000, CRC(0a235e4e) SHA1(b352f10fad786260b58bd344b5002b6ea7aaf76d) ) |
| 2853 | 2853 | |
| 2854 | | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2854 | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2855 | 2855 | |
| 2856 | 2856 | DISK_REGION( "ide:0:hdd:image" ) /* Release version 1.0r8a (4/10/98) (Guts 4/10/98, Main 4/10/98) */ |
| 2857 | 2857 | DISK_IMAGE( "cs_10r8a", 0, SHA1(ba4e7589740e0647938c81c5082bb71d8826bad4) ) |
| r249051 | r249052 | |
|---|
| 2864 | 2864 | ROM_REGION32_LE( 0x80000, "user1", 0 ) /* Boot Code Version 1.2 (2/18/98) */ |
| 2865 | 2865 | ROM_LOAD( "caspd1_2.u32", 0x000000, 0x80000, CRC(0a235e4e) SHA1(b352f10fad786260b58bd344b5002b6ea7aaf76d) ) |
| 2866 | 2866 | |
| 2867 | | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2867 | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2868 | 2868 | |
| 2869 | 2869 | DISK_REGION( "ide:0:hdd:image" ) /* Release version 1.0r7a (3/4/98) (Guts 3/3/98, Main 1/19/98) */ |
| 2870 | 2870 | DISK_IMAGE( "calspeda", 0, SHA1(6b1c3a7530195ef7309b06a651b01c8b3ece92c6) ) |
| r249051 | r249052 | |
|---|
| 2881 | 2881 | ROM_REGION32_LE( 0x80000, "user1", 0 ) |
| 2882 | 2882 | ROM_LOAD( "vtrxboot.bin", 0x000000, 0x80000, CRC(ee487a6c) SHA1(fb9efda85047cf615f24f7276a9af9fd542f3354) ) |
| 2883 | 2883 | |
| 2884 | | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2884 | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2885 | 2885 | |
| 2886 | 2886 | DISK_REGION( "ide:0:hdd:image" ) |
| 2887 | 2887 | DISK_IMAGE( "vaportrx", 0, SHA1(fe53ca7643d2ed2745086abb7f2243c69678cab1) ) |
| r249051 | r249052 | |
|---|
| 2895 | 2895 | ROM_REGION32_LE( 0x80000, "user1", 0 ) |
| 2896 | 2896 | ROM_LOAD( "vtrxboot.bin", 0x000000, 0x80000, CRC(ee487a6c) SHA1(fb9efda85047cf615f24f7276a9af9fd542f3354) ) |
| 2897 | 2897 | |
| 2898 | | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2898 | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2899 | 2899 | |
| 2900 | 2900 | DISK_REGION( "ide:0:hdd:image" ) /* Guts: Apr 10 1998 11:03:14 Main: Apr 10 1998 11:27:44 */ |
| 2901 | 2901 | DISK_IMAGE( "vaportrp", 0, SHA1(6c86637c442ebd6994eee8c0ae0dce343c35dbe9) ) |
| r249051 | r249052 | |
|---|
| 2909 | 2909 | ROM_REGION16_LE( 0x10000, "dcs", 0 ) /* ADSP-2115 data Version 1.02 */ |
| 2910 | 2910 | ROM_LOAD16_BYTE( "sound102.u95", 0x000000, 0x8000, CRC(bec7d3ae) SHA1(db80aa4a645804a4574b07b9f34dec6b6b64190d) ) |
| 2911 | 2911 | |
| 2912 | | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2912 | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2913 | 2913 | |
| 2914 | 2914 | ROM_REGION32_LE( 0x80000, "user1", 0 ) /* Seattle System Boot ROM Version 0.1i Apr 14 1997 14:52:53 */ |
| 2915 | 2915 | ROM_LOAD( "biofreak.u32", 0x000000, 0x80000, CRC(cefa00bb) SHA1(7e171610ede1e8a448fb8d175f9cb9e7d549de28) ) |
| r249051 | r249052 | |
|---|
| 2923 | 2923 | ROM_REGION16_LE( 0x10000, "dcs", 0 ) /* ADSP-2115 data Version 1.02 */ |
| 2924 | 2924 | ROM_LOAD16_BYTE( "sound102.u95", 0x000000, 0x8000, CRC(bec7d3ae) SHA1(db80aa4a645804a4574b07b9f34dec6b6b64190d) ) |
| 2925 | 2925 | |
| 2926 | | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2926 | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2927 | 2927 | |
| 2928 | 2928 | ROM_REGION32_LE( 0x80000, "user1", 0 ) /* Boot Code Version 1.2 */ |
| 2929 | 2929 | ROM_LOAD( "blitz1_2.u32", 0x000000, 0x80000, CRC(38dbecf5) SHA1(7dd5a5b3baf83a7f8f877ff4cd3f5e8b5201b36f) ) |
| r249051 | r249052 | |
|---|
| 2937 | 2937 | ROM_REGION16_LE( 0x10000, "dcs", 0 ) /* ADSP-2115 data Version 1.02 */ |
| 2938 | 2938 | ROM_LOAD16_BYTE( "sound102.u95", 0x000000, 0x8000, CRC(bec7d3ae) SHA1(db80aa4a645804a4574b07b9f34dec6b6b64190d) ) |
| 2939 | 2939 | |
| 2940 | | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2940 | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2941 | 2941 | |
| 2942 | 2942 | ROM_REGION32_LE( 0x80000, "user1", 0 ) /* Boot Code Version 1.1 */ |
| 2943 | 2943 | ROM_LOAD( "blitz1_1.u32", 0x000000, 0x80000, CRC(8163ce02) SHA1(89b432d8879052f6c5534ee49599f667f50a010f) ) |
| r249051 | r249052 | |
|---|
| 2951 | 2951 | ROM_REGION16_LE( 0x10000, "dcs", 0 ) /* ADSP-2115 data Version 1.02 */ |
| 2952 | 2952 | ROM_LOAD16_BYTE( "sound102.u95", 0x000000, 0x8000, CRC(bec7d3ae) SHA1(db80aa4a645804a4574b07b9f34dec6b6b64190d) ) |
| 2953 | 2953 | |
| 2954 | | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2954 | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2955 | 2955 | |
| 2956 | 2956 | ROM_REGION32_LE( 0x80000, "user1", 0 ) /* Boot Code Version 1.0 */ |
| 2957 | 2957 | ROM_LOAD( "bltz9910.u32", 0x000000, 0x80000, CRC(777119b2) SHA1(40d255181c2f3a787919c339e83593fd506779a5) ) |
| r249051 | r249052 | |
|---|
| 2970 | 2970 | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) // to use this rom run with -bios up130 and go into TEST mode to update. |
| 2971 | 2971 | ROM_SYSTEM_BIOS( 0, "noupdate", "No Update Rom" ) |
| 2972 | 2972 | ROM_SYSTEM_BIOS( 1, "up130", "Update to 1.30" ) |
| 2973 | | ROMX_LOAD( "rev.-1.3.u33", 0x000000, 0x100000, CRC(0a0fde5a) SHA1(1edb671c66819f634a9f1daa35331a99b2bda01a), ROM_BIOS(2) ) |
| 2973 | ROMX_LOAD( "rev.-1.3.u33", 0x000000, 0x100000, CRC(0a0fde5a) SHA1(1edb671c66819f634a9f1daa35331a99b2bda01a), ROM_BIOS(2) ) |
| 2974 | 2974 | |
| 2975 | 2975 | DISK_REGION( "ide:0:hdd:image" ) /* Hard Drive Version 1.30 */ |
| 2976 | 2976 | DISK_IMAGE( "blitz99a", 0, SHA1(43f834727ce01d7a63b482fc28cbf292477fc6f2) ) |
| r249051 | r249052 | |
|---|
| 2981 | 2981 | ROM_REGION16_LE( 0x10000, "dcs", 0 ) /* ADSP-2115 data Version 1.02 */ |
| 2982 | 2982 | ROM_LOAD16_BYTE( "sound102.u95", 0x000000, 0x8000, CRC(bec7d3ae) SHA1(db80aa4a645804a4574b07b9f34dec6b6b64190d) ) |
| 2983 | 2983 | |
| 2984 | | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2984 | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2985 | 2985 | |
| 2986 | 2986 | ROM_REGION32_LE( 0x80000, "user1", 0 ) /* Boot Code Version 1.4 */ |
| 2987 | 2987 | ROM_LOAD( "bltz2k14.u32", 0x000000, 0x80000, CRC(ac4f0051) SHA1(b8125c17370db7bfd9b783230b4ef3d5b22a2025) ) |
| r249051 | r249052 | |
|---|
| 2995 | 2995 | ROM_REGION16_LE( 0x10000, "dcs", 0 ) /* ADSP-2115 data Version 1.02 */ |
| 2996 | 2996 | ROM_LOAD16_BYTE( "sound102.u95", 0x000000, 0x8000, CRC(bec7d3ae) SHA1(db80aa4a645804a4574b07b9f34dec6b6b64190d) ) |
| 2997 | 2997 | |
| 2998 | | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2998 | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 2999 | 2999 | |
| 3000 | 3000 | ROM_REGION32_LE( 0x80000, "user1", 0 ) /* Boot Rom Version 1.9 */ |
| 3001 | 3001 | ROM_LOAD( "carnevil1_9.u32", 0x000000, 0x80000, CRC(82c07f2e) SHA1(fa51c58022ce251c53bad12fc6ffadb35adb8162) ) |
| r249051 | r249052 | |
|---|
| 3009 | 3009 | ROM_REGION16_LE( 0x10000, "dcs", 0 ) /* ADSP-2115 data Version 1.02 */ |
| 3010 | 3010 | ROM_LOAD16_BYTE( "sound102.u95", 0x000000, 0x8000, CRC(bec7d3ae) SHA1(db80aa4a645804a4574b07b9f34dec6b6b64190d) ) |
| 3011 | 3011 | |
| 3012 | | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 3012 | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 3013 | 3013 | |
| 3014 | 3014 | ROM_REGION32_LE( 0x80000, "user1", 0 ) /* Boot Rom Version 1.9 */ |
| 3015 | 3015 | ROM_LOAD( "carnevil1_9.u32", 0x000000, 0x80000, CRC(82c07f2e) SHA1(fa51c58022ce251c53bad12fc6ffadb35adb8162) ) |
| r249051 | r249052 | |
|---|
| 3023 | 3023 | ROM_REGION16_LE( 0x10000, "dcs", 0 ) /* ADSP-2115 data Version 1.02 */ |
| 3024 | 3024 | ROM_LOAD16_BYTE( "seattle.snd", 0x000000, 0x8000, BAD_DUMP CRC(bec7d3ae) SHA1(db80aa4a645804a4574b07b9f34dec6b6b64190d) ) |
| 3025 | 3025 | |
| 3026 | | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 3026 | ROM_REGION32_LE( 0x100000, "update", ROMREGION_ERASEFF ) |
| 3027 | 3027 | |
| 3028 | 3028 | ROM_REGION32_LE( 0x80000, "user1", 0 ) /* Boot Rom Version 9. */ |
| 3029 | 3029 | ROM_LOAD( "hyprdrve.u32", 0x000000, 0x80000, CRC(3e18cb80) SHA1(b18cc4253090ee1d65d72a7ec0c426ed08c4f238) ) |
trunk/src/mame/video/chihiro.c
| r249051 | r249052 | |
|---|
| 3 | 3 | #include "emu.h" |
| 4 | 4 | #include "video/poly.h" |
| 5 | 5 | #include "bitmap.h" |
| 6 | | #include "machine/pic8259.h" |
| 7 | 6 | #include "includes/chihiro.h" |
| 8 | 7 | |
| 9 | 8 | //#define LOG_NV2A |
| r249051 | r249052 | |
|---|
| 946 | 945 | UINT32 nv2a_renderer::geforce_object_offset(UINT32 handle) |
| 947 | 946 | { |
| 948 | 947 | UINT32 h = ((((handle >> 11) ^ handle) >> 11) ^ handle) & 0x7ff; |
| 949 | | UINT32 o = (pfifo[0x210 / 4] & 0x1ff) << 8; // 0x1ff is not certain |
| 948 | UINT32 o = (pfifo[0x210 / 4] & 0x1f) << 8; // or 12 ? |
| 950 | 949 | UINT32 e = o + h * 8; // at 0xfd000000+0x00700000 |
| 951 | 950 | UINT32 w; |
| 952 | 951 | |
| 953 | | if (ramin[e / 4] != handle) { |
| 954 | | // this should never happen |
| 955 | | for (UINT32 aa = o / 4; aa < (sizeof(ramin) / 4); aa = aa + 2) { |
| 956 | | if (ramin[aa] == handle) { |
| 957 | | e = aa * 4; |
| 958 | | } |
| 959 | | } |
| 960 | | } |
| 952 | if (ramin[e / 4] != handle) |
| 953 | e = 0; |
| 961 | 954 | w = ramin[e / 4 + 1]; |
| 962 | | return (w & 0xffff) * 0x10; // 0xffff is not certain |
| 955 | return (w & 0xffff) * 0x10; |
| 963 | 956 | } |
| 964 | 957 | |
| 965 | 958 | void nv2a_renderer::geforce_read_dma_object(UINT32 handle, UINT32 &offset, UINT32 &size) |
| r249051 | r249052 | |
|---|
| 1253 | 1246 | addr = rendertarget + (dilated0[dilate_rendertarget][x] + dilated1[dilate_rendertarget][y]); |
| 1254 | 1247 | else // type_rendertarget == LINEAR*/ |
| 1255 | 1248 | addr = rendertarget + (pitch_rendertarget / 4)*y + x; |
| 1256 | | fbcolor = 0; |
| 1257 | | if (color_mask != 0) |
| 1258 | | fbcolor = *addr; |
| 1249 | fbcolor = *addr; |
| 1259 | 1250 | daddr=depthbuffer + (pitch_depthbuffer / 4)*y + x; |
| 1260 | 1251 | deptsten = *daddr; |
| 1261 | 1252 | c[3] = color >> 24; |
| r249051 | r249052 | |
|---|
| 1781 | 1772 | break; |
| 1782 | 1773 | } |
| 1783 | 1774 | } |
| 1784 | | if (color_mask != 0) { |
| 1785 | | UINT32 fbcolor_tmp; |
| 1786 | | |
| 1787 | | fbcolor_tmp = (c[3] << 24) | (c[2] << 16) | (c[1] << 8) | c[0]; |
| 1788 | | *addr = (fbcolor & ~color_mask) | (fbcolor_tmp & color_mask); |
| 1789 | | } |
| 1775 | fbcolor = (c[3] << 24) | (c[2] << 16) | (c[1] << 8) | c[0]; |
| 1776 | *addr = fbcolor; |
| 1790 | 1777 | if (depth_write_enabled) |
| 1791 | 1778 | dep = depth; |
| 1792 | 1779 | deptsten = (dep << 8) | sten; |
| r249051 | r249052 | |
|---|
| 2246 | 2233 | maddress = method * 4; |
| 2247 | 2234 | data = space.read_dword(address); |
| 2248 | 2235 | channel[chanel][subchannel].object.method[method] = data; |
| 2249 | | #ifdef LOG_NV2A |
| 2250 | | printf("A:%08X MTHD:%08X D:%08X\n\r",address,maddress,data); |
| 2251 | | #endif |
| 2252 | 2236 | if (maddress == 0x17fc) { |
| 2253 | 2237 | indexesleft_count = 0; |
| 2254 | 2238 | indexesleft_first = 0; |
| r249051 | r249052 | |
|---|
| 2286 | 2270 | } |
| 2287 | 2271 | wait(); |
| 2288 | 2272 | } |
| 2289 | | else if (type == nv2a_renderer::TRIANGLE_FAN) { |
| 2290 | | vertex_nv vert[3]; |
| 2291 | | vertex_t xy[3]; |
| 2292 | | |
| 2293 | | read_vertices_0x1810(space, vert, offset, 2); |
| 2294 | | convert_vertices_poly(vert, xy, 2); |
| 2295 | | count = count - 2; |
| 2296 | | offset = offset + 2; |
| 2297 | | for (n = 0; n <= count; n++) { |
| 2298 | | read_vertices_0x1810(space, vert + (((n + 1) & 1) + 1), offset + n, 1); |
| 2299 | | convert_vertices_poly(vert + (((n + 1) & 1) + 1), xy + (((n + 1) & 1) + 1), 1); |
| 2300 | | render_triangle(limits_rendertarget, renderspans, 4 + 4 * 2, xy[0], xy[(~(n + 1) & 1) + 1], xy[((n + 1) & 1) + 1]); |
| 2301 | | } |
| 2302 | | wait(); |
| 2303 | | } |
| 2304 | 2273 | else if (type == nv2a_renderer::TRIANGLE_STRIP) { |
| 2305 | 2274 | vertex_nv vert[4]; |
| 2306 | 2275 | vertex_t xy[4]; |
| r249051 | r249052 | |
|---|
| 2342 | 2311 | // each dword after 1800 contains two 16 bit index values to select the vartices |
| 2343 | 2312 | // each dword after 1808 contains a 32 bit index value to select the vartices |
| 2344 | 2313 | type = channel[chanel][subchannel].object.method[0x17fc / 4]; |
| 2314 | #ifdef LOG_NV2A |
| 2315 | printf("vertex %d %d %d\n\r", type, offset, count); |
| 2316 | #endif |
| 2345 | 2317 | if (type == nv2a_renderer::QUADS) { |
| 2346 | 2318 | while (1) { |
| 2347 | 2319 | vertex_nv vert[4]; |
| r249051 | r249052 | |
|---|
| 2360 | 2332 | render_polygon<4>(limits_rendertarget, renderspans, 4 + 4 * 2, xy); // 4 rgba, 4 texture units 2 uv |
| 2361 | 2333 | } |
| 2362 | 2334 | } |
| 2363 | | else if (type == nv2a_renderer::TRIANGLE_FAN) { |
| 2364 | | if ((countlen * mult + indexesleft_count) >= 3) { |
| 2365 | | vertex_nv vert[3]; |
| 2366 | | vertex_t xy[3]; |
| 2367 | | int c, count; |
| 2368 | | |
| 2369 | | if (mult == 1) |
| 2370 | | c = read_vertices_0x1808(space, vert, address, 2); |
| 2371 | | else |
| 2372 | | c = read_vertices_0x1800(space, vert, address, 2); |
| 2373 | | convert_vertices_poly(vert, xy, 2); |
| 2374 | | address = address + c * 4; |
| 2375 | | countlen = countlen - c; |
| 2376 | | count = countlen * mult + indexesleft_count; |
| 2377 | | for (n = 1; n <= count; n++) { |
| 2378 | | if (mult == 1) |
| 2379 | | c = read_vertices_0x1808(space, vert + ((n & 1) + 1), address, 1); |
| 2380 | | else |
| 2381 | | c = read_vertices_0x1800(space, vert + ((n & 1) + 1), address, 1); |
| 2382 | | |
| 2383 | | convert_vertices_poly(vert + ((n & 1) + 1), xy + ((n & 1) + 1), 1); |
| 2384 | | address = address + c * 4; |
| 2385 | | countlen = countlen - c; |
| 2386 | | render_triangle(limits_rendertarget, renderspans, 4 + 4 * 2, xy[0], xy[(~n & 1) + 1], xy[(n & 1) + 1]); |
| 2387 | | } |
| 2388 | | wait(); |
| 2389 | | } |
| 2390 | | } |
| 2391 | 2335 | else if (type == nv2a_renderer::TRIANGLES) { |
| 2392 | 2336 | while (1) { |
| 2393 | 2337 | vertex_nv vert[3]; |
| r249051 | r249052 | |
|---|
| 2502 | 2446 | } |
| 2503 | 2447 | wait(); |
| 2504 | 2448 | } |
| 2505 | | else if (type == nv2a_renderer::TRIANGLES) { |
| 2506 | | while (countlen > 0) { |
| 2507 | | vertex_nv vert[3]; |
| 2508 | | vertex_t xy[3]; |
| 2509 | | int c; |
| 2510 | | |
| 2511 | | c = read_vertices_0x1818(space, vert, address, 3); |
| 2512 | | convert_vertices_poly(vert, xy, 3); |
| 2513 | | countlen = countlen - c; |
| 2514 | | if (countlen < 0) { |
| 2515 | | logerror("Method 0x1818 missing %d words to draw a complete primitive\n", -countlen); |
| 2516 | | countlen = 0; |
| 2517 | | break; |
| 2518 | | } |
| 2519 | | address = address + c * 3; |
| 2520 | | render_triangle(limits_rendertarget, renderspans, 4 + 4 * 2, xy[0], xy[1], xy[2]); // 4 rgba, 4 texture units 2 uv |
| 2521 | | } |
| 2522 | | } |
| 2523 | 2449 | else if (type == nv2a_renderer::TRIANGLE_STRIP) { |
| 2524 | 2450 | vertex_nv vert[4]; |
| 2525 | 2451 | vertex_t xy[4]; |
| r249051 | r249052 | |
|---|
| 2687 | 2613 | // clear colors |
| 2688 | 2614 | UINT32 color = channel[chanel][subchannel].object.method[0x1d90 / 4]; |
| 2689 | 2615 | bm.fill(color); |
| 2690 | | #ifdef LOG_NV2A |
| 2691 | | printf("clearscreen\n\r"); |
| 2692 | | #endif |
| 2616 | //printf("clearscreen\n\r"); |
| 2693 | 2617 | } |
| 2694 | 2618 | if ((data & 0x03) == 3) { |
| 2695 | 2619 | bitmap_rgb32 bm(depthbuffer, (limits_rendertarget.right() + 1) * m, (limits_rendertarget.bottom() + 1) * m, pitch_rendertarget / 4); // why *2 ? |
| r249051 | r249052 | |
|---|
| 2725 | 2649 | dilate_rendertarget = dilatechose[(log2width_rendertarget << 4) + log2height_rendertarget]; |
| 2726 | 2650 | } |
| 2727 | 2651 | if (maddress == 0x020c) { |
| 2652 | // line size ? |
| 2728 | 2653 | pitch_rendertarget=data & 0xffff; |
| 2729 | 2654 | pitch_depthbuffer=(data >> 16) & 0xffff; |
| 2730 | | #ifdef LOG_NV2A |
| 2731 | | printf("Pitch color %04X zbuffer %04X\n\r",pitch_rendertarget,pitch_depthbuffer); |
| 2732 | | #endif |
| 2655 | //printf("Pitch color %04X zbuffer %04X\n\r",pitch_rendertarget,pitch_depthbuffer); |
| 2733 | 2656 | countlen--; |
| 2734 | 2657 | } |
| 2735 | 2658 | if (maddress == 0x0100) { |
| 2736 | | countlen--; |
| 2737 | | if (data != 0) { |
| 2738 | | pgraph[0x704 / 4] = 0x100; |
| 2739 | | pgraph[0x708 / 4] = data; |
| 2740 | | pgraph[0x100 / 4] |= 1; |
| 2741 | | pgraph[0x108 / 4] |= 1; |
| 2742 | | if (update_interrupts() == true) |
| 2743 | | interruptdevice->ir3_w(1); // IRQ 3 |
| 2744 | | else |
| 2745 | | interruptdevice->ir3_w(0); // IRQ 3 |
| 2746 | | return 2; |
| 2659 | // just temporarily |
| 2660 | if ((data & 0x1f) == 1) { |
| 2661 | data = data >> 5; |
| 2662 | data = data & 0x0ffffff0; |
| 2663 | displayedtarget = (UINT32 *)direct_access_ptr(data); |
| 2747 | 2664 | } |
| 2748 | | else |
| 2749 | | return 0; |
| 2750 | 2665 | } |
| 2751 | 2666 | if (maddress == 0x0130) { |
| 2752 | 2667 | countlen--; |
| r249051 | r249052 | |
|---|
| 2755 | 2670 | else |
| 2756 | 2671 | return 0; |
| 2757 | 2672 | } |
| 2758 | | if (maddress == 0x1d8c) { |
| 2759 | | countlen--; |
| 2760 | | // it is used to specify the clear value for the depth buffer (zbuffer) |
| 2761 | | // but also as a parameter for interrupt routines |
| 2762 | | pgraph[0x1a88 / 4] = data; |
| 2763 | | } |
| 2764 | | if (maddress == 0x1d90) { |
| 2765 | | countlen--; |
| 2766 | | // it is used to specify the clear value for the color buffer |
| 2767 | | // but also as a parameter for interrupt routines |
| 2768 | | pgraph[0x186c / 4] = data; |
| 2769 | | } |
| 2770 | 2673 | if (maddress == 0x0210) { |
| 2771 | 2674 | // framebuffer offset ? |
| 2772 | 2675 | rendertarget = (UINT32 *)direct_access_ptr(data); |
| 2773 | | #ifdef LOG_NV2A |
| 2774 | | printf("Render target at %08X\n\r", data); |
| 2775 | | #endif |
| 2676 | //printf("Render target at %08X\n\r",data); |
| 2776 | 2677 | countlen--; |
| 2777 | 2678 | } |
| 2778 | 2679 | if (maddress == 0x0214) { |
| 2779 | 2680 | // zbuffer offset ? |
| 2780 | 2681 | depthbuffer = (UINT32 *)direct_access_ptr(data); |
| 2781 | | #ifdef LOG_NV2A |
| 2782 | | printf("Depth buffer at %08X\n\r",data); |
| 2783 | | #endif |
| 2682 | //printf("Depth buffer at %08X\n\r",data); |
| 2784 | 2683 | if ((data == 0) || (data > 0x7ffffffc)) |
| 2785 | 2684 | depth_write_enabled = false; |
| 2786 | 2685 | else if (channel[chanel][subchannel].object.method[0x035c / 4] != 0) |
| r249051 | r249052 | |
|---|
| 2810 | 2709 | if (maddress == 0x0354) { |
| 2811 | 2710 | depth_function = data; |
| 2812 | 2711 | } |
| 2813 | | if (maddress == 0x0358) { |
| 2814 | | //color_mask = data; |
| 2815 | | if (data & 0x000000ff) |
| 2816 | | data |= 0x000000ff; |
| 2817 | | if (data & 0x0000ff00) |
| 2818 | | data |= 0x0000ff00; |
| 2819 | | if (data & 0x00ff0000) |
| 2820 | | data |= 0x00ff0000; |
| 2821 | | if (data & 0xff000000) |
| 2822 | | data |= 0xff000000; |
| 2823 | | color_mask = data; |
| 2824 | | } |
| 2825 | 2712 | if (maddress == 0x035c) { |
| 2826 | 2713 | UINT32 g = channel[chanel][subchannel].object.method[0x0214 / 4]; |
| 2827 | 2714 | depth_write_enabled = data != 0; |
| r249051 | r249052 | |
|---|
| 3761 | 3648 | combiner.function_Aop3 = MAX(MIN((combiner.function_Aop3 + biasa) * scalea, 1.0f), -1.0f); |
| 3762 | 3649 | } |
| 3763 | 3650 | |
| 3764 | | void nv2a_renderer::vblank_callback(screen_device &screen, bool state) |
| 3651 | bool nv2a_renderer::vblank_callback(screen_device &screen, bool state) |
| 3765 | 3652 | { |
| 3766 | | #ifdef LOG_NV2A |
| 3767 | | printf("vblank_callback\n\r"); |
| 3768 | | #endif |
| 3769 | | if ((state == true) && (puller_waiting == 1)) { |
| 3770 | | puller_waiting = 0; |
| 3771 | | puller_timer_work(NULL, 0); |
| 3772 | | } |
| 3773 | | if (state == true) { |
| 3653 | //printf("vblank_callback\n\r"); |
| 3654 | if (state == true) |
| 3774 | 3655 | pcrtc[0x100 / 4] |= 1; |
| 3775 | | pcrtc[0x808 / 4] |= 0x10000; |
| 3776 | | } |
| 3777 | | else { |
| 3778 | | pcrtc[0x100 / 4] &= ~1; |
| 3779 | | pcrtc[0x808 / 4] &= ~0x10000; |
| 3780 | | } |
| 3781 | | if (update_interrupts() == true) |
| 3782 | | interruptdevice->ir3_w(1); // IRQ 3 |
| 3783 | 3656 | else |
| 3784 | | interruptdevice->ir3_w(0); // IRQ 3 |
| 3785 | | } |
| 3786 | | |
| 3787 | | bool nv2a_renderer::update_interrupts() |
| 3788 | | { |
| 3657 | pcrtc[0x100 / 4] &= ~1; |
| 3789 | 3658 | if (pcrtc[0x100 / 4] & pcrtc[0x140 / 4]) |
| 3790 | 3659 | pmc[0x100 / 4] |= 0x1000000; |
| 3791 | 3660 | else |
| 3792 | 3661 | pmc[0x100 / 4] &= ~0x1000000; |
| 3793 | | if (pgraph[0x100 / 4] & pgraph[0x140 / 4]) |
| 3794 | | pmc[0x100 / 4] |= 0x1000; |
| 3795 | | else |
| 3796 | | pmc[0x100 / 4] &= ~0x1000; |
| 3797 | | if (((pmc[0x100 / 4] & 0x7fffffff) && (pmc[0x140 / 4] & 1)) || ((pmc[0x100 / 4] & 0x80000000) && (pmc[0x140 / 4] & 2))) { |
| 3662 | if ((state == true) && (puller_waiting == 1)) { |
| 3663 | puller_waiting = 0; |
| 3664 | puller_timer_work(NULL, 0); |
| 3665 | } |
| 3666 | if ((pmc[0x100 / 4] != 0) && (pmc[0x140 / 4] != 0)) { |
| 3798 | 3667 | // send interrupt |
| 3799 | 3668 | return true; |
| 3800 | 3669 | } |
| r249051 | r249052 | |
|---|
| 3823 | 3692 | int countlen; |
| 3824 | 3693 | int ret; |
| 3825 | 3694 | address_space *space = puller_space; |
| 3826 | | #ifdef LOG_NV2A |
| 3827 | | UINT32 subch; |
| 3828 | | #endif |
| 3829 | 3695 | |
| 3830 | 3696 | chanel = puller_channel; |
| 3831 | 3697 | subchannel = puller_subchannel; |
| r249051 | r249052 | |
|---|
| 3882 | 3748 | } |
| 3883 | 3749 | if (ret != 0) { |
| 3884 | 3750 | puller_timer->enable(false); |
| 3885 | | puller_waiting = ret; |
| 3751 | puller_waiting = 1; |
| 3886 | 3752 | return; |
| 3887 | 3753 | } |
| 3888 | 3754 | } |
| r249051 | r249052 | |
|---|
| 3981 | 3847 | //logerror("NV_2A: read PRAMIN[%06X] value %08X\n",offset*4-0x00700000,ret); |
| 3982 | 3848 | } |
| 3983 | 3849 | else if ((offset >= 0x00400000 / 4) && (offset < 0x00402000 / 4)) { |
| 3984 | | ret = pgraph[offset - 0x00400000 / 4]; |
| 3985 | 3850 | //logerror("NV_2A: read PGRAPH[%06X] value %08X\n",offset*4-0x00400000,ret); |
| 3986 | 3851 | } |
| 3987 | 3852 | else if ((offset >= 0x00600000 / 4) && (offset < 0x00601000 / 4)) { |
| r249051 | r249052 | |
|---|
| 4005 | 3870 | //logerror("NV_2A: read channel[%02X,%d,%04X]=%08X\n",chanel,subchannel,suboffset*4,ret); |
| 4006 | 3871 | return ret; |
| 4007 | 3872 | } |
| 3873 | else |
| 3874 | { |
| 3875 | /* nothing */ |
| 3876 | } |
| 4008 | 3877 | //logerror("NV_2A: read at %08X mask %08X value %08X\n",0xfd000000+offset*4,mem_mask,ret); |
| 4009 | 3878 | return ret; |
| 4010 | 3879 | } |
| 4011 | 3880 | |
| 4012 | 3881 | WRITE32_MEMBER(nv2a_renderer::geforce_w) |
| 4013 | 3882 | { |
| 4014 | | UINT32 old; |
| 4015 | | bool update_int; |
| 4016 | | |
| 4017 | | update_int = false; |
| 4018 | 3883 | if ((offset >= 0x00101000 / 4) && (offset < 0x00102000 / 4)) { |
| 4019 | 3884 | //logerror("NV_2A: write STRAPS[%06X] mask %08X value %08X\n",offset*4-0x00101000,mem_mask,data); |
| 4020 | 3885 | } |
| r249051 | r249052 | |
|---|
| 4033 | 3898 | //logerror("NV_2A: write PRAMIN[%06X]=%08X\n",offset*4-0x00700000,data & mem_mask); |
| 4034 | 3899 | } |
| 4035 | 3900 | else if ((offset >= 0x00400000 / 4) && (offset < 0x00402000 / 4)) { |
| 4036 | | int e = offset - 0x00400000 / 4; |
| 4037 | | if (e >= (sizeof(pgraph) / sizeof(UINT32))) |
| 4038 | | return; |
| 4039 | | old = pgraph[e]; |
| 4040 | | COMBINE_DATA(pgraph + e); |
| 4041 | | if (e == 0x100 / 4) { |
| 4042 | | pgraph[e] = old & ~data; |
| 4043 | | if (data & 1) |
| 4044 | | pgraph[0x108 / 4] = 0; |
| 4045 | | update_int = true; |
| 4046 | | } |
| 4047 | | if (e == 0x140 / 4) |
| 4048 | | update_int = true; |
| 4049 | | if (e == 0x720 / 4) { |
| 4050 | | if ((data & 1) && (puller_waiting == 2)) { |
| 4051 | | puller_waiting = 0; |
| 4052 | | puller_timer->enable(); |
| 4053 | | puller_timer->adjust(attotime::zero); |
| 4054 | | } |
| 4055 | | } |
| 4056 | | if ((e >= 0x900 / 4) && (e < 0xa00 / 4)) |
| 4057 | | pgraph[e] = 0; |
| 4058 | 3901 | //logerror("NV_2A: write PGRAPH[%06X]=%08X\n",offset*4-0x00400000,data & mem_mask); |
| 4059 | 3902 | } |
| 4060 | 3903 | else if ((offset >= 0x00600000 / 4) && (offset < 0x00601000 / 4)) { |
| 4061 | 3904 | int e = offset - 0x00600000 / 4; |
| 4062 | 3905 | if (e >= (sizeof(pcrtc) / sizeof(UINT32))) |
| 4063 | 3906 | return; |
| 4064 | | old = pcrtc[e]; |
| 4065 | 3907 | COMBINE_DATA(pcrtc + e); |
| 4066 | | if (e == 0x100 / 4) { |
| 4067 | | pcrtc[e] = old & ~data; |
| 4068 | | update_int = true; |
| 4069 | | } |
| 4070 | | if (e == 0x140 / 4) |
| 4071 | | update_int = true; |
| 4072 | 3908 | if (e == 0x800 / 4) { |
| 4073 | | displayedtarget = (UINT32 *)direct_access_ptr(pcrtc[e]); |
| 4074 | | #ifdef LOG_NV2A |
| 4075 | | printf("crtc buffer %08X\n\r", data); |
| 4076 | | #endif |
| 3909 | displayedtarget = (UINT32 *)direct_access_ptr(data); |
| 3910 | //printf("crtc buffer %08X\n\r", data); |
| 4077 | 3911 | } |
| 4078 | 3912 | //logerror("NV_2A: write PCRTC[%06X]=%08X\n",offset*4-0x00600000,data & mem_mask); |
| 4079 | 3913 | } |
| r249051 | r249052 | |
|---|
| 4088 | 3922 | // 32 channels size 0x10000 each, 8 subchannels per channel size 0x2000 each |
| 4089 | 3923 | int chanel, subchannel, suboffset; |
| 4090 | 3924 | //int method, count, handle, objclass; |
| 3925 | #ifdef LOG_NV2A |
| 3926 | int subch; |
| 3927 | #endif |
| 4091 | 3928 | |
| 4092 | 3929 | suboffset = offset - 0x00800000 / 4; |
| 4093 | 3930 | chanel = (suboffset >> (16 - 2)) & 31; |
| r249051 | r249052 | |
|---|
| 4122 | 3959 | } |
| 4123 | 3960 | //else |
| 4124 | 3961 | // logerror("NV_2A: write at %08X mask %08X value %08X\n",0xfd000000+offset*4,mem_mask,data); |
| 4125 | | if (update_int == true) { |
| 4126 | | if (update_interrupts() == true) |
| 4127 | | interruptdevice->ir3_w(1); // IRQ 3 |
| 4128 | | else |
| 4129 | | interruptdevice->ir3_w(0); // IRQ 3 |
| 4130 | | } |
| 4131 | 3962 | } |
| 4132 | 3963 | |
| 4133 | 3964 | void nv2a_renderer::savestate_items() |
| r249051 | r249052 | |
|---|
| 4140 | 3971 | puller_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(nv2a_renderer::puller_timer_work), this), (void *)"NV2A Puller Timer"); |
| 4141 | 3972 | puller_timer->enable(false); |
| 4142 | 3973 | } |
| 4143 | | |
| 4144 | | void nv2a_renderer::set_interrupt_device(pic8259_device *device) |
| 4145 | | { |
| 4146 | | interruptdevice = device; |
| 4147 | | } |
trunk/src/mess/drivers/force68k.c
| r249051 | r249052 | |
|---|
| 1 | | // license:BSD-3-Clause |
| 1 | // license:BSD-3-Clause |
| 2 | 2 | // copyright-holders:Joakim Larsson Edstr??m |
| 3 | 3 | /*************************************************************************** |
| 4 | | * |
| 5 | | * Force SYS68K CPU-1/CPU-6 VME SBC drivers, initially based on the 68ksbc.c |
| 6 | | * |
| 7 | | * 13/06/2015 |
| 8 | | * |
| 9 | | * The info found on the links below is for a later revisions of the board I have |
| 10 | | * but it is somewhat compatible so I got the system ROM up and running in terminal. |
| 11 | | * My CPU-1 board has proms from 1983 and the PCB has no rev markings so probably |
| 12 | | * the original or a very early design. The board real estate differs from the later |
| 13 | | * CPU-1:s I found pictures of but has the same main chips and functions. |
| 14 | | * |
| 15 | | * http://bitsavers.trailing-edge.com/pdf/forceComputers/1988_Force_VMEbus_Products.pdf |
| 16 | | * http://www.artisantg.com/info/P_wUovN.pdf |
| 17 | | * |
| 18 | | * Some info from those documents: |
| 19 | | * |
| 20 | | * Address Map |
| 21 | | * ---------------------------------------------------------- |
| 22 | | * Address Range Description |
| 23 | | * ---------------------------------------------------------- |
| 24 | | * 000 000 - 000 007 Initialisation vectors from system EPROM |
| 25 | | * 000 008 - 01F FFF Dynamic RAM on CPU-1 B |
| 26 | | * 000 008 - 07F FFF Dynamic RAM on CPU-1 D |
| 27 | | * 080 008 - 09F FFF SYSTEM EPROM Area |
| 28 | | * OAO 000 - OBF FFF USER EPROMArea |
| 29 | | * 0C0 041 - 0C0 043 ACIA (P3) Host |
| 30 | | * 0C0 080 - 0C0 082 ACIA (P4) Terminal |
| 31 | | * 0C0 101 - 0C0 103 ACIA (P5) Remote device (eg serial printer) |
| 32 | | * 0C0 401 - 0C0 42F RTC |
| 33 | | * OEO 001 - 0E0 035 PI/T (eg centronics printer) |
| 34 | | * OEO 200 - 0E0 2FF FPU |
| 35 | | * OEO 300 - 0E0 300 Reset Off |
| 36 | | * OEO 380 - 0E0 380 Reset On |
| 37 | | * 100 000 - FEF FFF VMEbus addresses (A24) |
| 38 | | * FFO 000 - FFF FFF VMEbus Short I/O (A16) |
| 39 | | * ---------------------------------------------------------- |
| 40 | | * |
| 41 | | * Interrupt sources |
| 42 | | * ---------------------------------------------------------- |
| 43 | | * Description Device Lvl IRQ VME board |
| 44 | | * /Board Vector Address |
| 45 | | * ---------------------------------------------------------- |
| 46 | | * On board Sources |
| 47 | | * ABORT Switch 7 31 |
| 48 | | * Real Time Clock (RTC) 58167A 6 30 |
| 49 | | * Parallel/Timer (PI/T) 68230 5 29 |
| 50 | | * Terminal ACIA 6850 4 28 |
| 51 | | * Remote ACIA 6850 3 27 |
| 52 | | * Host ACIA 6850 2 26 |
| 53 | | * ACFAIL, SYSFAIL VME 5 29 |
| 54 | | * Off board Sources (other VME boards) |
| 55 | | * 6 Port Serial I/O board SIO 4 64-75 0xb00000 |
| 56 | | * 8 Port Serial I/O board ISIO 4 76-83 0x960000 |
| 57 | | * Disk Controller WFC 3 119 0xb01000 |
| 58 | | * SCSI Controller ISCSI 4 119 0xa00000 |
| 59 | | * Slot 1 Controller Board ASCU 7 31 0xb02000 |
| 60 | | * ---------------------------------------------------------- |
| 61 | | * |
| 62 | | * TODO: |
| 63 | | * - Finish 3 x ACIA6850, host and remote interface left, terminal works |
| 64 | | * - Finish 1 x 68230 Motorola, Parallel Interface / Timer as required by ROM |
| 65 | | * - Configure PIT to the Centronics device printer interface as |
| 66 | | * supported by ROM (DONE) |
| 67 | | * - Add 1 x Abort Switch |
| 68 | | * - Add 1 x Reset Switch |
| 69 | | * - Add 1 x Halt LED |
| 70 | | * - Add a jumper field device as supported by PCB |
| 71 | | * - Add configurable serial connector between ACIA:s and |
| 72 | | * - Real terminal emulator, ie rs232 "socket" |
| 73 | | * - Debug console |
| 74 | | * - Add VME bus driver |
| 75 | | * |
| 76 | | ****************************************************************************/ |
| 77 | 4 | |
| 5 | Force SYS68K CPU-1/CPU-6 VME SBC drivers, initially based on the 68ksbc.c |
| 6 | |
| 7 | 13/06/2015 |
| 8 | |
| 9 | The info found on the links below is for a later revisions of the board I have |
| 10 | but I hope it is somewhat compatible so I can get it up and running at least. |
| 11 | My CPU-1 board has proms from 1983 and no rev markings so probably the original. |
| 12 | |
| 13 | http://bitsavers.trailing-edge.com/pdf/forceComputers/1988_Force_VMEbus_Products.pdf |
| 14 | http://www.artisantg.com/info/P_wUovN.pdf |
| 15 | |
| 16 | Some info from those documents: |
| 17 | |
| 18 | Address Map |
| 19 | ---------------------------------------------------------- |
| 20 | Address Range Description |
| 21 | ---------------------------------------------------------- |
| 22 | 000 000 - 000 007 Initialisation vectors from system EPROM |
| 23 | 000 008 - 01F FFF Dynamic RAM on CPU-1 B |
| 24 | 000 008 - 07F FFF Dynamic RAM on CPU-1 D |
| 25 | 080 008 - 09F FFF SYSTEM EPROM Area |
| 26 | OAO 000 - OBF FFF USER EPROMArea |
| 27 | 0C0 041 - 0C0 043 ACIA (P3) Host |
| 28 | 0C0 080 - 0C0 082 ACIA (P4) Terminal |
| 29 | 0C0 101 - 0C0 103 ACIA (P5) Remote device (eg serial printer) |
| 30 | 0C0 401 - 0C0 42F RTC |
| 31 | OEO 001 - 0E0 035 PI/T (eg centronics printer) |
| 32 | OEO 200 - 0E0 2FF FPU |
| 33 | OEO 300 - 0E0 300 Reset Off |
| 34 | OEO 380 - 0E0 380 Reset On |
| 35 | 100 000 - FEF FFF VMEbus addresses (A24) |
| 36 | FFO 000 - FFF FFF VMEbus Short I/O (A16) |
| 37 | ---------------------------------------------------------- |
| 38 | |
| 39 | Interrupt sources |
| 40 | ---------------------------------------------------------- |
| 41 | Description Device Lvl IRQ VME board |
| 42 | /Board Vector Address |
| 43 | ---------------------------------------------------------- |
| 44 | On board Sources |
| 45 | ABORT Switch 7 31 |
| 46 | Real Time Clock (RTC) 58167A 6 30 |
| 47 | Parallel/Timer (PI/T) 68230 5 29 |
| 48 | Terminal ACIA 6850 4 28 |
| 49 | Remote ACIA 6850 3 27 |
| 50 | Host ACIA 6850 2 26 |
| 51 | ACFAIL, SYSFAIL VME 5 29 |
| 52 | Off board Sources (other VME boards) |
| 53 | 6 Port Serial I/O board SIO 4 64-75 0xb00000 |
| 54 | 8 Port Serial I/O board ISIO 4 76-83 0x960000 |
| 55 | Disk Controller WFC 3 119 0xb01000 |
| 56 | SCSI Controller ISCSI 4 119 0xa00000 |
| 57 | Slot 1 Controller Board ASCU 7 31 0xb02000 |
| 58 | ---------------------------------------------------------- |
| 59 | |
| 60 | 10. The VMEbus |
| 61 | --------------- |
| 62 | The implemented VMEbus Interface includes 24 address, 16 data, |
| 63 | 6 address modifier and the asynchronous control signals. |
| 64 | A single level bus arbiter is provided to build multi master |
| 65 | systems. In addition to the bus arbiter, a separate slave bus |
| 66 | arbitration allows selection of the arbitration level (0-3). |
| 67 | |
| 68 | The address modifier range .,Short 110 Access?? can be selected |
| 69 | via a jumper for variable system generation. The 7 interrupt |
| 70 | request levels of the VMEbus are fully supported from the |
| 71 | SYS68K1CPU-1 B/D. For multi-processing, each IRQ signal can be |
| 72 | enabled/disabled via a jumper field. |
| 73 | |
| 74 | Additionally, the SYS68K1CPU-1 B/D supports the ACFAIL, SYSRESET, |
| 75 | SYSFAIL and SYSCLK signal (16 MHz). |
| 76 | |
| 77 | |
| 78 | TODO: |
| 79 | - Finish 2 x ACIA6850, host and remote interface left, terminal works |
| 80 | - Finish 1 x 68230 Motorola, Parallel Interface / Timer |
| 81 | - Connect Port B to a Centronics printer interface |
| 82 | - Add 1 x Abort Switch |
| 83 | - Add configurable serial connector between ACIA:s and |
| 84 | - Real terminal emulator, ie rs232 "socket" |
| 85 | - Debug console |
| 86 | - Add VME bus driver |
| 87 | |
| 88 | ****************************************************************************/ |
| 89 | |
| 78 | 90 | #include "emu.h" |
| 79 | 91 | #include "bus/rs232/rs232.h" |
| 80 | 92 | #include "cpu/m68000/m68000.h" |
| r249051 | r249052 | |
|---|
| 82 | 94 | #include "machine/68230pit.h" |
| 83 | 95 | #include "machine/6850acia.h" |
| 84 | 96 | #include "machine/clock.h" |
| 85 | | #include "bus/centronics/ctronics.h" |
| 86 | | #include "bus/generic/slot.h" |
| 87 | | #include "bus/generic/carts.h" |
| 88 | 97 | |
| 89 | | #define LOG(x) x |
| 90 | | |
| 91 | 98 | #define BAUDGEN_CLOCK XTAL_1_8432MHz |
| 92 | 99 | /* |
| 93 | | * The baudrate on the Force68k CPU-1 to CPU-6 is generated by a |
| 94 | | * Motorola 14411 bitrate generator, the CPU-6 documents matches the circuits |
| 95 | | * that I could find on the CPU-1 board. Here how I calculated the clock for |
| 96 | | * the factory settings. No need to add selectors until terminal.c supports |
| 97 | | * configurable baudrates. Fortunality CPU-1 was shipped with 9600N8! |
| 98 | | * |
| 99 | | * From the documents: |
| 100 | | * |
| 101 | | * 3 RS232C interfaces, strap selectable baud rate from 110-9600 or 600-19200 baud |
| 102 | | * |
| 103 | | * Default Jumper Settings of B7: |
| 104 | | * -------------------------------- |
| 105 | | * GND 10 - 11 RSA input on 14411 |
| 106 | | * F1 on 14411 1 - 20 Baud selector of the terminal port |
| 107 | | * F1 on 14411 3 - 18 Baud selector of the host port |
| 108 | | * F1 on 14411 5 - 16 Baud selector of the remote port |
| 109 | | * |
| 110 | | * The RSB input on the 14411 is kept high always so RSA=0, RSB=1 and a 1.8432MHz crystal |
| 111 | | * generates 153600 on the F1 output pin which by default strapping is connected to all |
| 112 | | * three 6850 acias on the board. These can be strapped separatelly to speedup downloads. |
| 113 | | * |
| 114 | | * The selectable outputs from 14411, F1-F16: |
| 115 | | * X16 RSA=0,RSB=1: 153600, 115200, 76800, 57600, 38400, 28800, 19200, 9600, 4800, 3200, 2153.3, 1758.8, 1200, 921600, 1843000 |
| 116 | | * X64 RSA=1,RSB=1: 614400, 460800, 307200, 230400, 153600, 115200, 76800, 57600, 38400, 28800, 19200, 9600, 4800, 921600, 1843000 |
| 117 | | * |
| 118 | | * However, the datasheet says baudrate is strapable for 110-9600 but the output is 153600 |
| 119 | | * so the system rom MUST setup the acia to divide by 16 to generate the correct baudrate. |
| 120 | | * |
| 121 | | */ |
| 100 | The baudrate on the Force68k CPU-1 to CPU-6 is generated by a |
| 101 | Motorola 14411 bitrate generator, the CPU-6 documents matches the circuits |
| 102 | that I could find on the CPU-1 board. Here how I calculated the clock for |
| 103 | the factory settings. No need to add selectors until terminal.c supports |
| 104 | configurable baudrates. Fortunality CPU-1 was shipped with 9600N8! |
| 105 | |
| 106 | From the documents: |
| 107 | |
| 108 | 3 RS232C interfaces, strap selectable baud rate from 110-9600 or 600-19200 baud |
| 109 | |
| 110 | Default Jumper Settings of B7: |
| 111 | -------------------------------- |
| 112 | GND 10 - 11 RSA input on 14411 |
| 113 | F1 on 14411 1 - 20 Baud selector of the terminal port |
| 114 | F1 on 14411 3 - 18 Baud selector of the host port |
| 115 | F1 on 14411 5 - 16 Baud selector of the remote port |
| 116 | |
| 117 | The RSB input on the 14411 is kept high always so RSA=0, RSB=1 and a 1.8432MHz crystal |
| 118 | generates 153600 on the F1 output pin which by default strapping is connected to all |
| 119 | three 6850 acias on the board. These can be strapped separatelly to speedup downloads. |
| 120 | |
| 121 | The selectable outputs from 14411, F1-F16: |
| 122 | X16 RSA=0,RSB=1: 153600, 115200, 76800, 57600, 38400, 28800, 19200, 9600, 4800, 3200, 2153.3, 1758.8, 1200, 921600, 1843000 |
| 123 | X64 RSA=1,RSB=1: 614400, 460800, 307200, 230400, 153600, 115200, 76800, 57600, 38400, 28800, 19200, 9600, 4800, 921600, 1843000 |
| 124 | |
| 125 | However, the datasheet says baudrate is strapable for 110-9600 but the output is 153600 |
| 126 | so the system rom MUST setup the acia to divide by 16 to generate the correct baudrate. |
| 127 | |
| 128 | */ |
| 122 | 129 | #define ACIA_CLOCK (BAUDGEN_CLOCK / 12) |
| 123 | 130 | |
| 124 | 131 | class force68k_state : public driver_device |
| 125 | 132 | { |
| 126 | 133 | public: |
| 127 | | force68k_state(const machine_config &mconfig, device_type type, const char *tag) : |
| 128 | | driver_device (mconfig, type, tag), |
| 129 | | m_maincpu (*this, "maincpu"), |
| 130 | | m_rtc (*this, "rtc"), |
| 131 | | m_pit (*this, "pit"), |
| 132 | | m_aciahost (*this, "aciahost"), |
| 133 | | m_aciaterm (*this, "aciaterm"), |
| 134 | | m_aciaremt (*this, "aciaremt"), |
| 135 | | m_centronics (*this, "centronics") |
| 136 | | , m_centronics_ack (0) |
| 137 | | , m_centronics_busy (0) |
| 138 | | , m_centronics_perror (0) |
| 139 | | , m_centronics_select (0) |
| 140 | | ,m_cart(*this, "exp_rom1") |
| 141 | | { |
| 142 | | } |
| 134 | force68k_state(const machine_config &mconfig, device_type type, const char *tag) : |
| 135 | driver_device(mconfig, type, tag), |
| 136 | // m_rtc(*this, "rtc") |
| 137 | m_maincpu(*this, "maincpu"), |
| 138 | m_rtc(*this, "rtc"), |
| 139 | m_pit(*this, "pit"), |
| 140 | m_aciahost(*this, "aciahost"), |
| 141 | m_aciaterm(*this, "aciaterm"), |
| 142 | m_aciaremt(*this, "aciaremt") |
| 143 | { |
| 144 | } |
| 143 | 145 | |
| 144 | | DECLARE_READ16_MEMBER (bootvect_r); |
| 145 | | DECLARE_READ16_MEMBER (vme_a24_r); |
| 146 | | DECLARE_WRITE16_MEMBER (vme_a24_w); |
| 147 | | DECLARE_READ16_MEMBER (vme_a16_r); |
| 148 | | DECLARE_WRITE16_MEMBER (vme_a16_w); |
| 149 | | virtual void machine_start (); |
| 150 | | // clocks |
| 151 | | DECLARE_WRITE_LINE_MEMBER (write_aciahost_clock); |
| 152 | | DECLARE_WRITE_LINE_MEMBER (write_aciaterm_clock); |
| 153 | | DECLARE_WRITE_LINE_MEMBER (write_aciaremt_clock); |
| 154 | | // centronics printer interface |
| 155 | | DECLARE_WRITE_LINE_MEMBER (centronics_ack_w); |
| 156 | | DECLARE_WRITE_LINE_MEMBER (centronics_busy_w); |
| 157 | | DECLARE_WRITE_LINE_MEMBER (centronics_perror_w); |
| 158 | | DECLARE_WRITE_LINE_MEMBER (centronics_select_w); |
| 159 | | // User EPROM/SRAM slot(s) |
| 160 | | int force68k_load_cart(device_image_interface &image, generic_slot_device *slot); |
| 161 | | DECLARE_DEVICE_IMAGE_LOAD_MEMBER (exp1_load) { return force68k_load_cart(image, m_cart); } |
| 162 | | DECLARE_READ16_MEMBER (read16_rom); |
| 146 | DECLARE_READ16_MEMBER(bootvect_r); |
| 147 | virtual void machine_start(); |
| 148 | DECLARE_WRITE_LINE_MEMBER(write_aciahost_clock); |
| 149 | DECLARE_WRITE_LINE_MEMBER(write_aciaterm_clock); |
| 150 | DECLARE_WRITE_LINE_MEMBER(write_aciaremt_clock); |
| 163 | 151 | |
| 164 | | protected: |
| 165 | | |
| 166 | 152 | private: |
| 167 | | required_device<cpu_device> m_maincpu; |
| 168 | | required_device<mm58167_device> m_rtc; |
| 169 | | required_device<pit68230_device> m_pit; |
| 170 | | required_device<acia6850_device> m_aciahost; |
| 171 | | required_device<acia6850_device> m_aciaterm; |
| 172 | | required_device<acia6850_device> m_aciaremt; |
| 173 | | optional_device<centronics_device> m_centronics; |
| 153 | required_device<cpu_device> m_maincpu; |
| 154 | required_device<mm58167_device> m_rtc; |
| 155 | required_device<pit68230_device> m_pit; |
| 156 | required_device<acia6850_device> m_aciahost; |
| 157 | required_device<acia6850_device> m_aciaterm; |
| 158 | required_device<acia6850_device> m_aciaremt; |
| 174 | 159 | |
| 175 | | INT32 m_centronics_ack; |
| 176 | | INT32 m_centronics_busy; |
| 177 | | INT32 m_centronics_perror; |
| 178 | | INT32 m_centronics_select; |
| 179 | | |
| 180 | | // Pointer to System ROMs needed by bootvect_r |
| 181 | | UINT16 *m_sysrom; |
| 182 | | UINT16 *m_usrrom; |
| 183 | | |
| 184 | | required_device<generic_slot_device> m_cart; |
| 185 | | |
| 160 | // Pointer to System ROMs needed by bootvect_r |
| 161 | UINT16 *m_sysrom; |
| 186 | 162 | }; |
| 187 | 163 | |
| 188 | | static ADDRESS_MAP_START (force68k_mem, AS_PROGRAM, 16, force68k_state) |
| 189 | | ADDRESS_MAP_UNMAP_HIGH |
| 190 | | AM_RANGE (0x000000, 0x000007) AM_ROM AM_READ (bootvect_r) /* Vectors mapped from System EPROM */ |
| 191 | | AM_RANGE (0x000008, 0x01ffff) AM_RAM /* DRAM CPU-1B */ |
| 192 | | //AM_RANGE (0x020000, 0x07ffff) AM_RAM /* Additional DRAM CPU-1D */ |
| 193 | | AM_RANGE (0x080000, 0x083fff) AM_ROM /* System EPROM Area 16Kb DEBUGGER supplied as default on CPU-1B/D */ |
| 194 | | AM_RANGE (0x084000, 0x09ffff) AM_ROM /* System EPROM Area 112Kb additional space for System ROM */ |
| 195 | | //AM_RANGE (0x0a0000, 0x0bffff) AM_ROM /* User EPROM/SRAM Area, max 128Kb mapped by a cartslot */ |
| 196 | | AM_RANGE (0x0c0040, 0x0c0041) AM_DEVREADWRITE8 ("aciahost", acia6850_device, status_r, control_w, 0x00ff) |
| 197 | | AM_RANGE (0x0c0042, 0x0c0043) AM_DEVREADWRITE8 ("aciahost", acia6850_device, data_r, data_w, 0x00ff) |
| 198 | | AM_RANGE (0x0c0080, 0x0c0081) AM_DEVREADWRITE8 ("aciaterm", acia6850_device, status_r, control_w, 0xff00) |
| 199 | | AM_RANGE (0x0c0082, 0x0c0083) AM_DEVREADWRITE8 ("aciaterm", acia6850_device, data_r, data_w, 0xff00) |
| 200 | | AM_RANGE (0x0c0100, 0x0c0101) AM_DEVREADWRITE8 ("aciaremt", acia6850_device, status_r, control_w, 0x00ff) |
| 201 | | AM_RANGE (0x0c0102, 0x0c0103) AM_DEVREADWRITE8 ("aciaremt", acia6850_device, data_r, data_w, 0x00ff) |
| 202 | | AM_RANGE (0x0c0400, 0x0c042f) AM_DEVREADWRITE8 ("rtc", mm58167_device, read, write, 0x00ff) |
| 203 | | AM_RANGE (0x0e0000, 0x0e0035) AM_DEVREADWRITE8 ("pit", pit68230_device, read, write, 0x00ff) |
| 164 | static ADDRESS_MAP_START(force68k_mem, AS_PROGRAM, 16, force68k_state) |
| 165 | ADDRESS_MAP_UNMAP_HIGH |
| 166 | AM_RANGE(0x000000, 0x000007) AM_ROM AM_READ(bootvect_r) /* Vectors mapped from System EPROM */ |
| 167 | AM_RANGE(0x000008, 0x01ffff) AM_RAM /* DRAM */ |
| 168 | AM_RANGE(0x080000, 0x09ffff) AM_ROM /* System EPROM Area */ |
| 169 | // AM_RANGE(0x0a0000, 0x0bffff) AM_ROM /* User EPROM Area */ |
| 170 | AM_RANGE(0x0c0040, 0x0c0041) AM_DEVREADWRITE8("aciahost", acia6850_device, status_r, control_w, 0x00ff) |
| 171 | AM_RANGE(0x0c0042, 0x0c0043) AM_DEVREADWRITE8("aciahost", acia6850_device, data_r, data_w, 0x00ff) |
| 172 | AM_RANGE(0x0c0080, 0x0c0081) AM_DEVREADWRITE8("aciaterm", acia6850_device, status_r, control_w, 0xff00) |
| 173 | AM_RANGE(0x0c0082, 0x0c0083) AM_DEVREADWRITE8("aciaterm", acia6850_device, data_r, data_w, 0xff00) |
| 174 | AM_RANGE(0x0c0100, 0x0c0101) AM_DEVREADWRITE8("aciaremt", acia6850_device, status_r, control_w, 0x00ff) |
| 175 | AM_RANGE(0x0c0102, 0x0c0103) AM_DEVREADWRITE8("aciaremt", acia6850_device, data_r, data_w, 0x00ff) |
| 176 | AM_RANGE(0x0c0400, 0x0c042f) AM_DEVREADWRITE8("rtc", mm58167_device, read, write, 0x00ff) |
| 177 | AM_RANGE(0x0e0000, 0x0e0035) AM_DEVREADWRITE8("pit", pit68230_device, data_r, data_w, 0x00ff) |
| 204 | 178 | // AM_RANGE(0x0e0200, 0x0e0380) AM_READWRITE(fpu_r, fpu_w) /* optional FPCP 68881 FPU interface */ |
| 205 | | AM_RANGE(0x100000, 0xfeffff) AM_READWRITE(vme_a24_r, vme_a24_w) /* VMEbus Rev B addresses (24 bits) */ |
| 206 | | AM_RANGE(0xff0000, 0xffffff) AM_READWRITE(vme_a16_r, vme_a16_w) /* VMEbus Rev B addresses (16 bits) */ |
| 179 | // AM_RANGE(0x100000, 0xfeffff) /* VMEbus Rev B addresses (24 bits) */ |
| 180 | // AM_RANGE(0xff0000, 0xffffff) /* VMEbus Rev B addresses (16 bits) */ |
| 207 | 181 | ADDRESS_MAP_END |
| 208 | 182 | |
| 209 | 183 | /* Input ports */ |
| 210 | | static INPUT_PORTS_START (force68k) |
| 184 | static INPUT_PORTS_START( force68k ) |
| 211 | 185 | INPUT_PORTS_END |
| 212 | 186 | |
| 213 | | /* |
| 214 | | * Centronics support |
| 215 | | * |
| 216 | | * The system ROMs has support for a parallel printer interface but the signals are just routed to row A |
| 217 | | * of the VME P2 connector so no on board Centronics connector is available but assumed to be added on a |
| 218 | | * separate I/O board. After some detective work I found that the ROM works as follows: |
| 219 | | * |
| 220 | | * The 'PA' (Printer Attach) command issues a <cr> on Port A and sends a strobe on H2 it then loops over |
| 221 | | * the select signal, bit 0 on Port B, and the ack signal on HS1, both to be non zero. The support is really |
| 222 | | * flawed as the strobe signal goes high instead of low ( this might assume an inverting driver on the |
| 223 | | * P2 board ) and the busy signal is not checked at all. Or I might have assumed it all wrong, but it now |
| 224 | | * works with the generic centronics printer driver. Need the printer board documentation to improve further. |
| 225 | | * |
| 226 | | * When the 'PA' command is successful everything printed to screen is mirrored on the printer. Use the |
| 227 | | * 'NOPA' command to stop mirroring. I had no printer ROMs so could not test it with a "real" printer. |
| 228 | | * |
| 229 | | * Force CPU-1 init sequence for MC68230 PIT |
| 230 | | * ----------------------------------------- |
| 231 | | * 0801E6 0E0000 W 00 -> PGCR Mode 0 (uni8), H34 dis, H12 dis, H1234 HZ |
| 232 | | * 0801E6 0E0002 W 00 -> PSRR PC4, PC5, H1S>H2S>H3S>H4S |
| 233 | | * 0801E6 0E0004 W FF -> PADDR Port A all Outputs |
| 234 | | * 0801E6 0E0006 W 00 -> PBDDR Port B all Inputs |
| 235 | | * 0801EA 0E000C W 60 -> PACR Port A Mode 01, pin def, dbfr H1 data rec, H2 status/int, H2 output neg, H2S clrd |
| 236 | | * 0801F0 0E000E W A0 -> PBCR Port B mode 1x, H4 output neg, H4S clrd, H3 int dis, H3 edg input, H3S set by assrt edg |
| 237 | | * 0801F6 0E0000 W 30 -> PGCR H34 enable, H12enable |
| 238 | | * 0801FC 0E000E W A8 -> PBCR +H4 asserted |
| 239 | | * 08020A 0E000E W A0 -> PBCR +H4 negated |
| 240 | | * |
| 241 | | * Upon PA (Printer Attach) command enabling the Centronics printer mode |
| 242 | | * --------------------------------------------------------------------- |
| 243 | | * 081DB4 0E0011 W D0 -> PADR Data to Port A |
| 244 | | * 081DB8 0E000D W 68 -> PACR H2 output asserted Centronics Strobe |
| 245 | | * 081DC0 0E000D W 60 -> PACR H2 output negated |
| 246 | | * 081DD0 0E0013 R 00 <- PBDR Port B polled for 01 (data) & 03 (mask) |
| 247 | | * |
| 248 | | */ |
| 249 | | |
| 250 | | /* Centronics ACK handler |
| 251 | | * The centronics ack signal is expected by the ROM to arrive at H1 input line |
| 252 | | */ |
| 253 | | WRITE_LINE_MEMBER (force68k_state::centronics_ack_w) |
| 187 | void force68k_state::machine_start() |
| 254 | 188 | { |
| 255 | | // LOG (logerror ("centronics_ack_w(%d) %lld\n", state, m_maincpu->total_cycles ())); |
| 256 | | m_centronics_ack = state; |
| 257 | | m_pit->h1_set (state); |
| 189 | m_sysrom = (UINT16*)(memregion("maincpu")->base() + 0x080000); |
| 258 | 190 | } |
| 259 | 191 | |
| 260 | | /* Centronics BUSY handler |
| 261 | | * The centronics busy signal is not used by the ROM driver afaik |
| 262 | | */ |
| 263 | | WRITE_LINE_MEMBER (force68k_state::centronics_busy_w){ |
| 264 | | // LOG (logerror ("centronics_busy_w(%d) %lld\n", state, m_maincpu->total_cycles ())); |
| 265 | | m_centronics_busy = state; |
| 192 | READ16_MEMBER(force68k_state::bootvect_r) |
| 193 | { |
| 194 | return m_sysrom[offset]; |
| 266 | 195 | } |
| 267 | 196 | |
| 268 | | /* Centronics PERROR handler |
| 269 | | * The centronics perror signal is not used by the ROM driver afaik |
| 270 | | */ |
| 271 | | WRITE_LINE_MEMBER (force68k_state::centronics_perror_w){ |
| 272 | | // LOG (logerror ("centronics_perror_w(%d) %lld\n", state, m_maincpu->total_cycles ())); |
| 273 | | m_centronics_perror = state; |
| 197 | WRITE_LINE_MEMBER(force68k_state::write_aciahost_clock) |
| 198 | { |
| 199 | m_aciahost->write_txc(state); |
| 200 | m_aciahost->write_rxc(state); |
| 274 | 201 | } |
| 275 | 202 | |
| 276 | | /* Centronics SELECT handler |
| 277 | | * The centronics select signal is expected by the ROM on Port B bit 0 |
| 278 | | */ |
| 279 | | WRITE_LINE_MEMBER (force68k_state::centronics_select_w){ |
| 280 | | // LOG (logerror ("centronics_select_w(%d) %lld\n", state, m_maincpu->total_cycles ())); |
| 281 | | m_centronics_select = state; |
| 282 | | m_pit->portb_setbit (0, state); |
| 283 | | } |
| 284 | | |
| 285 | | /* Start it up */ |
| 286 | | void force68k_state::machine_start () |
| 203 | WRITE_LINE_MEMBER(force68k_state::write_aciaterm_clock) |
| 287 | 204 | { |
| 288 | | LOG (logerror ("machine_start\n")); |
| 289 | | |
| 290 | | save_item (NAME (m_centronics_busy)); |
| 291 | | save_item (NAME (m_centronics_ack)); |
| 292 | | save_item (NAME (m_centronics_select)); |
| 293 | | save_item (NAME (m_centronics_perror)); |
| 294 | | |
| 295 | | /* Setup pointer to bootvector in ROM for bootvector handler bootvect_r */ |
| 296 | | m_sysrom = (UINT16*)(memregion ("maincpu")->base () + 0x080000); |
| 297 | | |
| 298 | | /* Map user ROM/RAM socket(s) */ |
| 299 | | if (m_cart->exists()) |
| 300 | | { |
| 301 | | m_usrrom = (UINT16*)m_cart->get_rom_base(); |
| 302 | | #if 0 // This should be the correct way but produces odd and even bytes swapped |
| 303 | | m_maincpu->space(AS_PROGRAM).install_read_handler(0xa0000, 0xbffff, read16_delegate(FUNC(generic_slot_device::read16_rom), (generic_slot_device*)m_cart)); |
| 304 | | #else // So we installs a custom very ineffecient handler for now until we understand hwp to solve the problem better |
| 305 | | m_maincpu->space(AS_PROGRAM).install_read_handler(0xa0000, 0xbffff, read16_delegate(FUNC(force68k_state::read16_rom), this)); |
| 306 | | #endif |
| 307 | | } |
| 205 | m_aciaterm->write_txc(state); |
| 206 | m_aciaterm->write_rxc(state); |
| 308 | 207 | } |
| 309 | 208 | |
| 310 | | /* A very ineffecient User cart emulation of two 8 bit sockets (odd and even) */ |
| 311 | | READ16_MEMBER (force68k_state::read16_rom){ |
| 312 | | offset = offset % m_cart->common_get_size("rom"); // Don't read outside buffer... |
| 313 | | return ((m_usrrom [offset] << 8) & 0xff00) | ((m_usrrom [offset] >> 8) & 0x00ff); |
| 314 | | } |
| 315 | | |
| 316 | | /* Boot vector handler, the PCB hardwires the first 8 bytes from 0x80000 to 0x0 */ |
| 317 | | READ16_MEMBER (force68k_state::bootvect_r){ |
| 318 | | return m_sysrom [offset]; |
| 319 | | } |
| 320 | | |
| 321 | | /* 10. The VMEbus (text from board documentation) |
| 322 | | * --------------- |
| 323 | | * The implemented VMEbus Interface includes 24 address, 16 data, |
| 324 | | * 6 address modifier and the asynchronous control signals. |
| 325 | | * A single level bus arbiter is provided to build multi master |
| 326 | | * systems. In addition to the bus arbiter, a separate slave bus |
| 327 | | * arbitration allows selection of the arbitration level (0-3). |
| 328 | | * |
| 329 | | * The address modifier range .,Short 110 Access« can be selected |
| 330 | | * via a jumper for variable system generation. The 7 interrupt |
| 331 | | * request levels of the VMEbus are fully supported from the |
| 332 | | * SYS68K1CPU-1 B/D. For multi-processing, each IRQ signal can be |
| 333 | | * enabled/disabled via a jumper field. |
| 334 | | * |
| 335 | | * Additionally, the SYS68K1CPU-1 B/D supports the ACFAIL, SYSRESET, |
| 336 | | * SYSFAIL and SYSCLK signal (16 MHz). |
| 337 | | */ |
| 338 | | |
| 339 | | /* Dummy VME access methods until the VME bus device is ready for use */ |
| 340 | | READ16_MEMBER (force68k_state::vme_a24_r){ |
| 341 | | LOG (logerror ("vme_a24_r\n")); |
| 342 | | return (UINT16) 0; |
| 343 | | } |
| 344 | | |
| 345 | | WRITE16_MEMBER (force68k_state::vme_a24_w){ |
| 346 | | LOG (logerror ("vme_a24_w\n")); |
| 347 | | } |
| 348 | | |
| 349 | | READ16_MEMBER (force68k_state::vme_a16_r){ |
| 350 | | LOG (logerror ("vme_16_r\n")); |
| 351 | | return (UINT16) 0; |
| 352 | | } |
| 353 | | |
| 354 | | WRITE16_MEMBER (force68k_state::vme_a16_w){ |
| 355 | | LOG (logerror ("vme_a16_w\n")); |
| 356 | | } |
| 357 | | |
| 358 | | /* |
| 359 | | * Serial port clock sources can all be driven by different outputs of the 14411 |
| 360 | | */ |
| 361 | | WRITE_LINE_MEMBER (force68k_state::write_aciahost_clock){ |
| 362 | | m_aciahost->write_txc (state); |
| 363 | | m_aciahost->write_rxc (state); |
| 364 | | } |
| 365 | | |
| 366 | | WRITE_LINE_MEMBER (force68k_state::write_aciaterm_clock){ |
| 367 | | m_aciaterm->write_txc (state); |
| 368 | | m_aciaterm->write_rxc (state); |
| 369 | | } |
| 370 | | |
| 371 | | WRITE_LINE_MEMBER (force68k_state::write_aciaremt_clock){ |
| 372 | | m_aciaremt->write_txc (state); |
| 373 | | m_aciaremt->write_rxc (state); |
| 374 | | } |
| 375 | | |
| 376 | | /* |
| 377 | | * 4. The USER Area (Text from the board manual) |
| 378 | | The USER area contains two 28 pin sockets with JEDEC compatible pin out. |
| 379 | | To allow the usage of static RAM's, the access to the USER area is byte |
| 380 | | oriented. Table 3. lists the usable device types. |
| 381 | | |
| 382 | | Bits Bytes EPROM SRAM |
| 383 | | -------------------------- |
| 384 | | 2Kx16 4 Kbyte 2716 6116 |
| 385 | | 4Kx16 8 Kbyte 2732 |
| 386 | | 8Kx16 16 Kbyte 2764 6264 |
| 387 | | 16Kx16 32 Kbyte 27128 |
| 388 | | 32Kx16 64 Kbyte 27256 |
| 389 | | -------------------------- |
| 390 | | */ |
| 391 | | // Implementation of static 2 x 64K EPROM in sockets J10/J11 as 16 bit wide cartridge for easier |
| 392 | | // software handling. TODO: make configurable according to table above. |
| 393 | | static MACHINE_CONFIG_FRAGMENT( fccpu1_eprom_sockets ) |
| 394 | | MCFG_GENERIC_CARTSLOT_ADD("exp_rom1", generic_plain_slot, "fccpu1_cart") |
| 395 | | MCFG_GENERIC_EXTENSIONS("bin,rom") |
| 396 | | MCFG_GENERIC_WIDTH(GENERIC_ROM16_WIDTH) |
| 397 | | MCFG_GENERIC_ENDIAN(ENDIANNESS_BIG) |
| 398 | | MCFG_GENERIC_LOAD(force68k_state, exp1_load) |
| 399 | | // MCFG_SOFTWARE_LIST_ADD("cart_list", "fccpu1_cart") |
| 400 | | MACHINE_CONFIG_END |
| 401 | | |
| 402 | | /*************************** |
| 403 | | Rom loading functions |
| 404 | | ****************************/ |
| 405 | | int force68k_state::force68k_load_cart(device_image_interface &image, generic_slot_device *slot) |
| 209 | WRITE_LINE_MEMBER(force68k_state::write_aciaremt_clock) |
| 406 | 210 | { |
| 407 | | UINT32 size = slot->common_get_size("rom"); |
| 408 | | |
| 409 | | if (size > 0x20000) // Max 128Kb |
| 410 | | { |
| 411 | | LOG( printf("Cartridge size exceeding max size (128Kb): %d\n", size) ); |
| 412 | | image.seterror(IMAGE_ERROR_UNSPECIFIED, "Cartridge size exceeding max size (128Kb)"); |
| 413 | | return IMAGE_INIT_FAIL; |
| 414 | | } |
| 415 | | |
| 416 | | slot->rom_alloc(size, GENERIC_ROM16_WIDTH, ENDIANNESS_BIG); |
| 417 | | slot->common_load_rom(slot->get_rom_base(), size, "rom"); |
| 418 | | |
| 419 | | return IMAGE_INIT_PASS; |
| 211 | m_aciaremt->write_txc(state); |
| 212 | m_aciaremt->write_rxc(state); |
| 420 | 213 | } |
| 421 | 214 | |
| 422 | | /* |
| 423 | | * Machine configuration |
| 424 | | */ |
| 425 | | static MACHINE_CONFIG_START (fccpu1, force68k_state) |
| 426 | | /* basic machine hardware */ |
| 427 | | MCFG_CPU_ADD ("maincpu", M68000, XTAL_16MHz / 2) |
| 428 | | MCFG_CPU_PROGRAM_MAP (force68k_mem) |
| 215 | static MACHINE_CONFIG_START( fccpu1, force68k_state ) |
| 216 | /* basic machine hardware */ |
| 217 | MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz / 2) |
| 218 | MCFG_CPU_PROGRAM_MAP(force68k_mem) |
| 429 | 219 | |
| 430 | | /* P3/Host Port config |
| 431 | | * LO command causes ROM monitor to expect S-records on HOST port by default |
| 432 | | * Implementation through nullmodem currently does not support handshakes so |
| 433 | | * the ROM momitor is over-run while checking for checksums etc if used with |
| 434 | | * UI mount <file> feature. |
| 435 | | */ |
| 436 | | MCFG_DEVICE_ADD ("aciahost", ACIA6850, 0) |
| 220 | /* P3/Host Port config */ |
| 221 | MCFG_DEVICE_ADD("aciahost", ACIA6850, 0) |
| 222 | MCFG_DEVICE_ADD("aciahost_clock", CLOCK, ACIA_CLOCK) |
| 223 | MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(force68k_state, write_aciahost_clock)) |
| 437 | 224 | |
| 438 | | MCFG_ACIA6850_TXD_HANDLER (DEVWRITELINE ("rs232host", rs232_port_device, write_txd)) |
| 439 | | MCFG_ACIA6850_RTS_HANDLER (DEVWRITELINE ("rs232host", rs232_port_device, write_rts)) |
| 225 | /* P4/Terminal Port config */ |
| 226 | MCFG_DEVICE_ADD("aciaterm", ACIA6850, 0) |
| 440 | 227 | |
| 441 | | MCFG_RS232_PORT_ADD ("rs232host", default_rs232_devices, "null_modem") |
| 442 | | MCFG_RS232_RXD_HANDLER (DEVWRITELINE ("aciahost", acia6850_device, write_rxd)) |
| 443 | | MCFG_RS232_CTS_HANDLER (DEVWRITELINE ("aciahost", acia6850_device, write_cts)) |
| 228 | MCFG_ACIA6850_TXD_HANDLER(DEVWRITELINE("rs232trm", rs232_port_device, write_txd)) |
| 229 | MCFG_ACIA6850_RTS_HANDLER(DEVWRITELINE("rs232trm", rs232_port_device, write_rts)) |
| 444 | 230 | |
| 445 | | MCFG_DEVICE_ADD ("aciahost_clock", CLOCK, ACIA_CLOCK) |
| 446 | | MCFG_CLOCK_SIGNAL_HANDLER (WRITELINE (force68k_state, write_aciahost_clock)) |
| 231 | MCFG_RS232_PORT_ADD("rs232trm", default_rs232_devices, "terminal") |
| 232 | MCFG_RS232_RXD_HANDLER(DEVWRITELINE("aciaterm", acia6850_device, write_rxd)) |
| 233 | MCFG_RS232_CTS_HANDLER(DEVWRITELINE("aciaterm", acia6850_device, write_cts)) |
| 447 | 234 | |
| 448 | | /* P4/Terminal Port config */ |
| 449 | | MCFG_DEVICE_ADD ("aciaterm", ACIA6850, 0) |
| 235 | MCFG_DEVICE_ADD("aciaterm_clock", CLOCK, ACIA_CLOCK) |
| 236 | MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(force68k_state, write_aciaterm_clock)) |
| 450 | 237 | |
| 451 | | MCFG_ACIA6850_TXD_HANDLER (DEVWRITELINE ("rs232trm", rs232_port_device, write_txd)) |
| 452 | | MCFG_ACIA6850_RTS_HANDLER (DEVWRITELINE ("rs232trm", rs232_port_device, write_rts)) |
| 238 | /* P5/Remote Port config */ |
| 239 | MCFG_DEVICE_ADD("aciaremt", ACIA6850, 0) |
| 453 | 240 | |
| 454 | | MCFG_RS232_PORT_ADD ("rs232trm", default_rs232_devices, "terminal") |
| 455 | | MCFG_RS232_RXD_HANDLER (DEVWRITELINE ("aciaterm", acia6850_device, write_rxd)) |
| 456 | | MCFG_RS232_CTS_HANDLER (DEVWRITELINE ("aciaterm", acia6850_device, write_cts)) |
| 241 | #define PRINTER 0 |
| 242 | #if PRINTER |
| 243 | MCFG_ACIA6850_TXD_HANDLER(DEVWRITELINE("rs232rmt", rs232_port_device, write_txd)) |
| 244 | MCFG_ACIA6850_RTS_HANDLER(DEVWRITELINE("rs232rmt", rs232_port_device, write_rts)) |
| 457 | 245 | |
| 458 | | MCFG_DEVICE_ADD ("aciaterm_clock", CLOCK, ACIA_CLOCK) |
| 459 | | MCFG_CLOCK_SIGNAL_HANDLER (WRITELINE (force68k_state, write_aciaterm_clock)) |
| 246 | MCFG_RS232_PORT_ADD("rs232rmt", default_rs232_devices, "printer") |
| 247 | MCFG_RS232_RXD_HANDLER(DEVWRITELINE("aciaremt", acia6850_device, write_rxd)) |
| 248 | MCFG_RS232_CTS_HANDLER(DEVWRITELINE("aciaremt", acia6850_device, write_cts)) |
| 249 | #endif |
| 460 | 250 | |
| 461 | | /* P5/Remote Port config */ |
| 462 | | MCFG_DEVICE_ADD ("aciaremt", ACIA6850, 0) |
| 251 | MCFG_DEVICE_ADD("aciaremt_clock", CLOCK, ACIA_CLOCK) |
| 252 | MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(force68k_state, write_aciaterm_clock)) |
| 463 | 253 | |
| 464 | | MCFG_DEVICE_ADD ("aciaremt_clock", CLOCK, ACIA_CLOCK) |
| 465 | | MCFG_CLOCK_SIGNAL_HANDLER (WRITELINE (force68k_state, write_aciaterm_clock)) |
| 254 | /* RTC Real Time Clock device */ |
| 255 | MCFG_DEVICE_ADD("rtc", MM58167, XTAL_32_768kHz) |
| 466 | 256 | |
| 467 | | /* RTC Real Time Clock device */ |
| 468 | | MCFG_DEVICE_ADD ("rtc", MM58167, XTAL_32_768kHz) |
| 257 | /* PIT Parallel Interface and Timer device, assuming strapped for on board clock */ |
| 258 | MCFG_DEVICE_ADD("pit", PIT68230, XTAL_16MHz / 2) |
| 469 | 259 | |
| 470 | | /* PIT Parallel Interface and Timer device, assuming strapped for on board clock */ |
| 471 | | MCFG_DEVICE_ADD ("pit", PIT68230, XTAL_16MHz / 2) |
| 472 | | MCFG_PIT68230_PA_OUTPUT_CALLBACK (DEVWRITE8 ("cent_data_out", output_latch_device, write)) |
| 473 | | MCFG_PIT68230_H2_CALLBACK (DEVWRITELINE ("centronics", centronics_device, write_strobe)) |
| 260 | MACHINE_CONFIG_END |
| 474 | 261 | |
| 475 | | // centronics |
| 476 | | MCFG_CENTRONICS_ADD ("centronics", centronics_devices, "printer") |
| 477 | | MCFG_CENTRONICS_ACK_HANDLER (WRITELINE (force68k_state, centronics_ack_w)) |
| 478 | | MCFG_CENTRONICS_BUSY_HANDLER (WRITELINE (force68k_state, centronics_busy_w)) |
| 479 | | MCFG_CENTRONICS_PERROR_HANDLER (WRITELINE (force68k_state, centronics_perror_w)) |
| 480 | | MCFG_CENTRONICS_SELECT_HANDLER (WRITELINE (force68k_state, centronics_select_w)) |
| 481 | | MCFG_CENTRONICS_OUTPUT_LATCH_ADD ("cent_data_out", "centronics") |
| 262 | #if 0 |
| 482 | 263 | |
| 483 | | // EPROM sockets |
| 484 | | MCFG_FRAGMENT_ADD(fccpu1_eprom_sockets) |
| 264 | static MACHINE_CONFIG_START( fccpu6, force68k_state ) |
| 265 | MCFG_CPU_ADD("maincpu", M68000, XTAL_8MHz) /* Jumper B10 Mode B */ |
| 266 | MCFG_CPU_PROGRAM_MAP(force68k_mem) |
| 485 | 267 | MACHINE_CONFIG_END |
| 486 | 268 | |
| 487 | | #if 0 /* |
| 488 | | * CPU-6 family is device and adressmap compatible with CPU-1 but with additions |
| 489 | | * such as an optional 68881 FPU |
| 490 | | */ |
| 491 | | static MACHINE_CONFIG_START (fccpu6, force68k_state) |
| 492 | | MCFG_CPU_ADD ("maincpu", M68000, XTAL_8MHz) /* Jumper B10 Mode B */ |
| 493 | | MCFG_CPU_PROGRAM_MAP (force68k_mem) |
| 269 | static MACHINE_CONFIG_START( fccpu6a, force68k_state ) |
| 270 | MCFG_CPU_ADD("maincpu", M68000, XTAL_12_5MHz) /* Jumper B10 Mode A */ |
| 271 | MCFG_CPU_PROGRAM_MAP(force68k_mem) |
| 494 | 272 | MACHINE_CONFIG_END |
| 495 | 273 | |
| 496 | | static MACHINE_CONFIG_START (fccpu6a, force68k_state) |
| 497 | | MCFG_CPU_ADD ("maincpu", M68000, XTAL_12_5MHz) /* Jumper B10 Mode A */ |
| 498 | | MCFG_CPU_PROGRAM_MAP (force68k_mem) |
| 274 | static MACHINE_CONFIG_START( fccpu6v, force68k_state ) |
| 275 | MCFG_CPU_ADD("maincpu", M68010, XTAL_8MHz) /* Jumper B10 Mode B */ |
| 276 | MCFG_CPU_PROGRAM_MAP(force68k_mem) |
| 499 | 277 | MACHINE_CONFIG_END |
| 500 | 278 | |
| 501 | | static MACHINE_CONFIG_START (fccpu6v, force68k_state) |
| 502 | | MCFG_CPU_ADD ("maincpu", M68010, XTAL_8MHz) /* Jumper B10 Mode B */ |
| 503 | | MCFG_CPU_PROGRAM_MAP (force68k_mem) |
| 279 | static MACHINE_CONFIG_START( fccpu6va, force68k_state ) |
| 280 | MCFG_CPU_ADD("maincpu", M68010, XTAL_12_5MHz) /* Jumper B10 Mode A */ |
| 281 | MCFG_CPU_PROGRAM_MAP(force68k_mem) |
| 504 | 282 | MACHINE_CONFIG_END |
| 505 | 283 | |
| 506 | | static MACHINE_CONFIG_START (fccpu6va, force68k_state) |
| 507 | | MCFG_CPU_ADD ("maincpu", M68010, XTAL_12_5MHz) /* Jumper B10 Mode A */ |
| 508 | | MCFG_CPU_PROGRAM_MAP (force68k_mem) |
| 284 | static MACHINE_CONFIG_START( fccpu6vb, force68k_state ) |
| 285 | MCFG_CPU_ADD("maincpu", M68010, XTAL_12_5MHz) /* Jumper B10 Mode A */ |
| 286 | MCFG_CPU_PROGRAM_MAP(force68k_mem) |
| 509 | 287 | MACHINE_CONFIG_END |
| 510 | | |
| 511 | | static MACHINE_CONFIG_START (fccpu6vb, force68k_state) |
| 512 | | MCFG_CPU_ADD ("maincpu", M68010, XTAL_12_5MHz) /* Jumper B10 Mode A */ |
| 513 | | MCFG_CPU_PROGRAM_MAP (force68k_mem) |
| 514 | | MACHINE_CONFIG_END |
| 515 | 288 | #endif |
| 516 | 289 | |
| 517 | 290 | /* ROM definitions */ |
| 518 | | ROM_START (fccpu1) |
| 519 | | ROM_REGION (0x1000000, "maincpu", 0) |
| 291 | ROM_START( fccpu1 ) |
| 292 | ROM_REGION(0x1000000, "maincpu", 0) |
| 520 | 293 | |
| 521 | | ROM_LOAD16_BYTE ("fccpu1V1.0L.j8.bin", 0x080001, 0x2000, CRC (3ac6f08f) SHA1 (502f6547b508d8732bd68bbbb2402d8c30fefc3b)) |
| 522 | | ROM_LOAD16_BYTE ("fccpu1V1.0L.j9.bin", 0x080000, 0x2000, CRC (035315fb) SHA1 (90dc44d9c25d28428233e6846da6edce2d69e440)) |
| 523 | | |
| 524 | | /* |
| 525 | | * System ROM terminal commands |
| 526 | | * |
| 527 | | * COMMAND SUMMARY DESCRIPTION (From CPU-1B datasheet, ROMs were dumped |
| 528 | | * from a CPU-1 board so some features might be missing or different) |
| 529 | | * --------------------------------------------------------------------------- |
| 530 | | * BF <address1> <address2> <data> <CR> Block Fill memory - from addr1 through addr2 with data |
| 531 | | * BM <address1> <address2> <address 3> <CR> Block Move - move from addr1 through addr2to addr3 |
| 532 | | * BR [<address> [; <count>] ... ] <CR> Set/display Breakpoint |
| 533 | | * BS <address1> <address2> <data> <CR> Block Search - search addr1 through addr2 for data |
| 534 | | * BT <address1> <address2> <CR> Block Test of memory |
| 535 | | * DC <expression> <CR> Data Conversion |
| 536 | | * DF <CR> Display Formatted registers |
| 537 | | * DU [n] <address1> <address2>[<string>] <CR> Dump memory to object file |
| 538 | | * GO or G [<address] <CR> Execute program. |
| 539 | | * GD [<address] <CR> Go Direct |
| 540 | | * GT <address> <CR> Exec prog: temporary breakpoint |
| 541 | | * HE<CR> Help; display monitor commands |
| 542 | | * LO [n] [;<options] <CR> Load Object file |
| 543 | | * MD <address> [<count>] <CR> Memory Display |
| 544 | | * MM or M <address> [<data<][;<options>] <CR> Memory Modify |
| 545 | | * MS <address> <data1 > <data2> < ... <CR> Memory Set - starting at addr with data 1. data 2 ... |
| 546 | | * NOBR [<address> ... ] <CR> Remove Breakpoint |
| 547 | | * NOPA <CR> Printer Detach (Centronics on PIT/P2) |
| 548 | | * OF <CR> Offset |
| 549 | | * PA <CR> Printer Attach (Centronics on PIT/P2) |
| 550 | | * PF[n] <CR> Set/display Port Format |
| 551 | | * RM <CR> Register Modify |
| 552 | | * TM [<exit character>] <CR> Transparent Mode |
| 553 | | * TR OR T [<count] <CR> Trace |
| 554 | | * TT <address> <CR> Trace: temporary breakpoint |
| 555 | | * VE [n] [<string] <CR> Verify memory/object file |
| 556 | | * ---------------------------------------------------------------------------- |
| 557 | | * .AO - .A7 [<expression] <CR> Display/set address register |
| 558 | | * .00 - .07 [<expression] <CR> Display/set data register |
| 559 | | * .RO - .R6 [<expression] <CR> Display/set offset register |
| 560 | | * .PC [<expression] <CR> Display/set program counter |
| 561 | | * .SR [<expression] <CR> Display/set status register |
| 562 | | * .SS [<expression] <CR> Display/set supervisor stack |
| 563 | | * .US [<expression] <CR> Display/set user stack |
| 564 | | * ---------------------------------------------------------------------------- |
| 565 | | * MD <address> [<count>]; DI <CR> Disassemble memory location |
| 566 | | * MM <address>; DI <CR> Disassemble/Assemble memory location |
| 567 | | * ---------------------------------------------------------------------------- |
| 568 | | * Undocumented commands found in ROM table at address 0x80308 |
| 569 | | * .* No WHAT message displayed, no action seen. |
| 570 | | */ |
| 294 | ROM_LOAD16_BYTE( "fccpu1V1.0L.j8.bin", 0x080001, 0x2000, CRC(3ac6f08f) SHA1(502f6547b508d8732bd68bbbb2402d8c30fefc3b) ) |
| 295 | ROM_LOAD16_BYTE( "fccpu1V1.0L.j9.bin", 0x080000, 0x2000, CRC(035315fb) SHA1(90dc44d9c25d28428233e6846da6edce2d69e440) ) |
| 296 | /* COMMAND SUMMARY DESCRIPTION (From CPU-1B datasheet, ROMs were dumped |
| 297 | from a CPU-1 board so some features might be missing or different) |
| 298 | --------------------------------------------------------------------------- |
| 299 | BF <address1> <address2> <data> <CR> Block Fill memory - from addr1 through addr2 with data |
| 300 | BM <address1> <address2> <address 3> <CR> Block Move - move from addr1 through addr2to addr3 |
| 301 | BR [<address> [; <count>] ... ] <CR> Set/display Breakpoint |
| 302 | BS <address1> <address2> <data> <CR> Block Search - search addr1 through addr2 for data |
| 303 | BT <address1> <address2> <CR> Block Test of memory |
| 304 | DC <expression> <CR> Data Conversion |
| 305 | DF <CR> Display Formatted registers |
| 306 | DU [n] <address1> <address2>[<string>] <CR> Dump memory to object file |
| 307 | GO [<address] <CR> Execute program |
| 308 | GD [<address] <CR> Go Direct |
| 309 | GT <address> <CR> Exec prog: temporary breakpoint |
| 310 | HE<CR> Help; display monitor commands |
| 311 | LO [n] [;<options] <CR> Load Object file |
| 312 | MD <address> [<count?? <CR> Memory Display |
| 313 | MM <address> [<data?? [;<options?? <CR> Memory Modify |
| 314 | MS <address> <data1 > <data2> < ... <CR> Memory Set - starting at addr with data 1. data 2 ... |
| 315 | NOBR [<address> ... ] <CR> Remove Breakpoint |
| 316 | NOPA <CR> Printer Detach (Centronics on PIT/P2) |
| 317 | OF <CR> Offset |
| 318 | PA <CR> Printer Attach (Centronics on PIT/P2) |
| 319 | PF[n] <CR> Set/display Port Format |
| 320 | RM <CR> Register Modify |
| 321 | TM [<exit character?? <CR> Transparent Mode |
| 322 | TR [<count] <CR> Trace |
| 323 | TT <address> <CR> Trace: temporary breakpoint |
| 324 | VE [n] [<string] <CR> Verify memory/object file |
| 325 | ---------------------------------------------------------------------------- |
| 326 | .AO - .A7 [<expression] <CR> Display/set address register |
| 327 | .00 - .07 [<expression] <CR> Display/set data register |
| 328 | .RO - .R6 [<expression] <CR> Display/set offset register |
| 329 | .PC [<expression] <CR> Display/set program counter |
| 330 | .SR [<expression] <CR> Display/set status register |
| 331 | .SS [<expression] <CR> Display/set supervisor stack |
| 332 | .US [<expression] <CR> Display/set user stack |
| 333 | ---------------------------------------------------------------------------- |
| 334 | MD <address> [<count>]; D1 <CR> Disassemble memory location |
| 335 | MM <address>; DI <CR> Disassemble/Assemble memory location |
| 336 | ---------------------------------------------------------------------------- |
| 337 | */ |
| 571 | 338 | ROM_END |
| 572 | 339 | |
| 573 | | /* |
| 574 | | * CPU-6 ROMs were generally based om VMEPROM which contained the PDOS RTOS from Eyring Research. |
| 575 | | * I don't have these but if anyone can dump them and send to me I can verify that they work as expected. |
| 576 | | */ |
| 577 | 340 | #if 0 |
| 578 | | ROM_START (fccpu6) |
| 579 | | ROM_REGION (0x1000000, "maincpu", 0) |
| 341 | ROM_START( fccpu6 ) |
| 342 | ROM_REGION(0x1000000, "maincpu", 0) |
| 580 | 343 | ROM_END |
| 581 | 344 | |
| 582 | | ROM_START (fccpu6a) |
| 583 | | ROM_REGION (0x1000000, "maincpu", 0) |
| 345 | ROM_START( fccpu6a ) |
| 346 | ROM_REGION(0x1000000, "maincpu", 0) |
| 584 | 347 | ROM_END |
| 585 | 348 | |
| 586 | | ROM_START (fccpu6v) |
| 587 | | ROM_REGION (0x1000000, "maincpu", 0) |
| 349 | ROM_START( fccpu6v ) |
| 350 | ROM_REGION(0x1000000, "maincpu", 0) |
| 588 | 351 | ROM_END |
| 589 | 352 | |
| 590 | | ROM_START (fccpu6va) |
| 591 | | ROM_REGION (0x1000000, "maincpu", 0) |
| 353 | ROM_START( fccpu6va ) |
| 354 | ROM_REGION(0x1000000, "maincpu", 0) |
| 592 | 355 | ROM_END |
| 593 | 356 | |
| 594 | | ROM_START (fccpu6vb) |
| 595 | | ROM_REGION (0x1000000, "maincpu", 0) |
| 357 | ROM_START( fccpu6vb ) |
| 358 | ROM_REGION(0x1000000, "maincpu", 0) |
| 596 | 359 | ROM_END |
| 597 | 360 | #endif |
| 598 | 361 | |
trunk/src/mess/drivers/hp64k.c
| r249051 | r249052 | |
|---|
| 216 | 216 | |
| 217 | 217 | DECLARE_READ16_MEMBER(hp64k_usart_r); |
| 218 | 218 | DECLARE_WRITE16_MEMBER(hp64k_usart_w); |
| 219 | | DECLARE_WRITE_LINE_MEMBER(hp64k_rxrdy_w); |
| 220 | | DECLARE_WRITE_LINE_MEMBER(hp64k_txrdy_w); |
| 221 | | DECLARE_WRITE_LINE_MEMBER(hp64k_txd_w); |
| 222 | | DECLARE_WRITE_LINE_MEMBER(hp64k_dtr_w); |
| 223 | | DECLARE_WRITE_LINE_MEMBER(hp64k_rts_w); |
| 219 | DECLARE_WRITE_LINE_MEMBER(hp64k_rxrdy_w); |
| 220 | DECLARE_WRITE_LINE_MEMBER(hp64k_txrdy_w); |
| 221 | DECLARE_WRITE_LINE_MEMBER(hp64k_txd_w); |
| 222 | DECLARE_WRITE_LINE_MEMBER(hp64k_dtr_w); |
| 223 | DECLARE_WRITE_LINE_MEMBER(hp64k_rts_w); |
| 224 | 224 | DECLARE_WRITE16_MEMBER(hp64k_loopback_w); |
| 225 | | void hp64k_update_loopback(void); |
| 226 | | DECLARE_WRITE_LINE_MEMBER(hp64k_rs232_rxd_w); |
| 227 | | DECLARE_WRITE_LINE_MEMBER(hp64k_rs232_dcd_w); |
| 228 | | DECLARE_WRITE_LINE_MEMBER(hp64k_rs232_cts_w); |
| 229 | | |
| 225 | void hp64k_update_loopback(void); |
| 226 | DECLARE_WRITE_LINE_MEMBER(hp64k_rs232_rxd_w); |
| 227 | DECLARE_WRITE_LINE_MEMBER(hp64k_rs232_dcd_w); |
| 228 | DECLARE_WRITE_LINE_MEMBER(hp64k_rs232_cts_w); |
| 229 | |
| 230 | 230 | DECLARE_WRITE16_MEMBER(hp64k_beep_w); |
| 231 | 231 | TIMER_DEVICE_CALLBACK_MEMBER(hp64k_beeper_off); |
| 232 | 232 | |
| 233 | | DECLARE_WRITE_LINE_MEMBER(hp64k_baud_clk_w); |
| 233 | DECLARE_WRITE_LINE_MEMBER(hp64k_baud_clk_w); |
| 234 | 234 | private: |
| 235 | 235 | required_device<hp_5061_3011_cpu_device> m_cpu; |
| 236 | 236 | required_device<i8275_device> m_crtc; |
| r249051 | r249052 | |
|---|
| 248 | 248 | required_ioport m_rs232_sw; |
| 249 | 249 | required_device<beep_device> m_beeper; |
| 250 | 250 | required_device<timer_device> m_beep_timer; |
| 251 | | required_device<clock_device> m_baud_rate; |
| 252 | | required_ioport m_s5_sw; |
| 253 | | required_device<i8251_device> m_uart; |
| 254 | | required_device<rs232_port_device> m_rs232; |
| 251 | required_device<clock_device> m_baud_rate; |
| 252 | required_ioport m_s5_sw; |
| 253 | required_device<i8251_device> m_uart; |
| 254 | required_device<rs232_port_device> m_rs232; |
| 255 | 255 | |
| 256 | 256 | // Character generator |
| 257 | 257 | const UINT8 *m_chargen; |
| r249051 | r249052 | |
|---|
| 302 | 302 | floppy_state_t m_floppy_if_state; |
| 303 | 303 | floppy_image_device *m_current_floppy; |
| 304 | 304 | |
| 305 | | // RS232 I/F |
| 306 | | bool m_16x_clk; |
| 307 | | bool m_baud_clk; |
| 308 | | UINT8 m_16x_div; |
| 309 | | bool m_loopback; |
| 310 | | bool m_txd_state; |
| 311 | | bool m_dtr_state; |
| 312 | | bool m_rts_state; |
| 305 | // RS232 I/F |
| 306 | bool m_16x_clk; |
| 307 | bool m_baud_clk; |
| 308 | UINT8 m_16x_div; |
| 309 | bool m_loopback; |
| 310 | bool m_txd_state; |
| 311 | bool m_dtr_state; |
| 312 | bool m_rts_state; |
| 313 | 313 | }; |
| 314 | 314 | |
| 315 | 315 | static ADDRESS_MAP_START(cpu_mem_map , AS_PROGRAM , 16 , hp64k_state) |
| r249051 | r249052 | |
|---|
| 329 | 329 | // PA = 4, IC = [0..3] |
| 330 | 330 | // Floppy I/F |
| 331 | 331 | AM_RANGE(HP_MAKE_IOADDR(4 , 0) , HP_MAKE_IOADDR(4 , 3)) AM_READWRITE(hp64k_flp_r , hp64k_flp_w) |
| 332 | | // PA = 5, IC = [0..3] |
| 333 | | // Write to USART |
| 334 | | AM_RANGE(HP_MAKE_IOADDR(5 , 0) , HP_MAKE_IOADDR(5 , 3)) AM_WRITE(hp64k_usart_w) |
| 332 | // PA = 5, IC = [0..3] |
| 333 | // Write to USART |
| 334 | AM_RANGE(HP_MAKE_IOADDR(5 , 0) , HP_MAKE_IOADDR(5 , 3)) AM_WRITE(hp64k_usart_w) |
| 335 | 335 | // PA = 6, IC = [0..3] |
| 336 | 336 | // Read from USART |
| 337 | 337 | AM_RANGE(HP_MAKE_IOADDR(6 , 0) , HP_MAKE_IOADDR(6 , 3)) AM_READ(hp64k_usart_r) |
| 338 | 338 | // PA = 7, IC = 2 |
| 339 | 339 | // Rear-panel switches and loopback relay control |
| 340 | | AM_RANGE(HP_MAKE_IOADDR(7 , 2) , HP_MAKE_IOADDR(7 , 2)) AM_READWRITE(hp64k_rear_sw_r , hp64k_loopback_w) |
| 340 | AM_RANGE(HP_MAKE_IOADDR(7 , 2) , HP_MAKE_IOADDR(7 , 2)) AM_READWRITE(hp64k_rear_sw_r , hp64k_loopback_w) |
| 341 | 341 | // PA = 9, IC = [0..3] |
| 342 | 342 | // Beeper control & interrupt status read |
| 343 | 343 | AM_RANGE(HP_MAKE_IOADDR(9 , 0) , HP_MAKE_IOADDR(9 , 3)) AM_WRITE(hp64k_beep_w) |
| r249051 | r249052 | |
|---|
| 366 | 366 | m_rear_panel_sw(*this , "rear_sw"), |
| 367 | 367 | m_rs232_sw(*this , "rs232_sw"), |
| 368 | 368 | m_beeper(*this , "beeper"), |
| 369 | | m_beep_timer(*this , "beep_timer"), |
| 370 | | m_baud_rate(*this , "baud_rate"), |
| 371 | | m_s5_sw(*this , "s5_sw"), |
| 372 | | m_uart(*this , "uart"), |
| 373 | | m_rs232(*this , "rs232") |
| 369 | m_beep_timer(*this , "beep_timer"), |
| 370 | m_baud_rate(*this , "baud_rate"), |
| 371 | m_s5_sw(*this , "s5_sw"), |
| 372 | m_uart(*this , "uart"), |
| 373 | m_rs232(*this , "rs232") |
| 374 | 374 | { |
| 375 | 375 | } |
| 376 | 376 | |
| r249051 | r249052 | |
|---|
| 387 | 387 | |
| 388 | 388 | // Divisors of K1135 baud rate generator |
| 389 | 389 | static unsigned baud_rate_divisors[] = { |
| 390 | | 6336, |
| 391 | | 4224, |
| 392 | | 2880, |
| 393 | | 2355, |
| 394 | | 2112, |
| 395 | | 1056, |
| 396 | | 528, |
| 397 | | 264, |
| 398 | | 176, |
| 399 | | 158, |
| 400 | | 132, |
| 401 | | 88, |
| 402 | | 66, |
| 403 | | 44, |
| 404 | | 33, |
| 405 | | 16 |
| 390 | 6336, |
| 391 | 4224, |
| 392 | 2880, |
| 393 | 2355, |
| 394 | 2112, |
| 395 | 1056, |
| 396 | 528, |
| 397 | 264, |
| 398 | 176, |
| 399 | 158, |
| 400 | 132, |
| 401 | 88, |
| 402 | 66, |
| 403 | 44, |
| 404 | 33, |
| 405 | 16 |
| 406 | 406 | }; |
| 407 | 407 | |
| 408 | 408 | void hp64k_state::machine_reset() |
| r249051 | r249052 | |
|---|
| 428 | 428 | m_floppy0_wpt = false; |
| 429 | 429 | m_floppy1_wpt = false; |
| 430 | 430 | m_beeper->set_state(0); |
| 431 | | m_baud_rate->set_unscaled_clock(BAUD_RATE_GEN_CLOCK / baud_rate_divisors[ (m_s5_sw->read() >> 1) & 0xf ]); |
| 432 | | m_16x_clk = (m_rs232_sw->read() & 0x02) != 0; |
| 433 | | m_loopback = false; |
| 434 | | m_txd_state = true; |
| 435 | | m_dtr_state = true; |
| 436 | | m_rts_state = true; |
| 437 | | |
| 431 | m_baud_rate->set_unscaled_clock(BAUD_RATE_GEN_CLOCK / baud_rate_divisors[ (m_s5_sw->read() >> 1) & 0xf ]); |
| 432 | m_16x_clk = (m_rs232_sw->read() & 0x02) != 0; |
| 433 | m_loopback = false; |
| 434 | m_txd_state = true; |
| 435 | m_dtr_state = true; |
| 436 | m_rts_state = true; |
| 437 | |
| 438 | 438 | } |
| 439 | 439 | |
| 440 | 440 | UINT8 hp64k_state::hp64k_crtc_filter(UINT8 data) |
| r249051 | r249052 | |
|---|
| 958 | 958 | |
| 959 | 959 | READ16_MEMBER(hp64k_state::hp64k_usart_r) |
| 960 | 960 | { |
| 961 | | UINT16 tmp; |
| 961 | UINT16 tmp; |
| 962 | 962 | |
| 963 | | if ((offset & 1) == 0) { |
| 964 | | tmp = m_uart->status_r(space , 0); |
| 965 | | } else { |
| 966 | | tmp = m_uart->data_r(space , 0); |
| 967 | | } |
| 968 | | |
| 963 | if ((offset & 1) == 0) { |
| 964 | tmp = m_uart->status_r(space , 0); |
| 965 | } else { |
| 966 | tmp = m_uart->data_r(space , 0); |
| 967 | } |
| 968 | |
| 969 | 969 | // bit 8 == bit 7 rear panel switches (modem/terminal) ??? |
| 970 | 970 | |
| 971 | | tmp |= (m_rs232_sw->read() << 8); |
| 971 | tmp |= (m_rs232_sw->read() << 8); |
| 972 | 972 | |
| 973 | | if (BIT(m_rear_panel_sw->read() , 7)) { |
| 974 | | BIT_SET(tmp , 8); |
| 975 | | } |
| 976 | | |
| 973 | if (BIT(m_rear_panel_sw->read() , 7)) { |
| 974 | BIT_SET(tmp , 8); |
| 975 | } |
| 976 | |
| 977 | 977 | return tmp; |
| 978 | 978 | } |
| 979 | 979 | |
| 980 | 980 | WRITE16_MEMBER(hp64k_state::hp64k_usart_w) |
| 981 | 981 | { |
| 982 | | if ((offset & 1) == 0) { |
| 983 | | m_uart->control_w(space , 0 , (UINT8)(data & 0xff)); |
| 984 | | } else { |
| 985 | | m_uart->data_w(space , 0 , (UINT8)(data & 0xff)); |
| 986 | | } |
| 982 | if ((offset & 1) == 0) { |
| 983 | m_uart->control_w(space , 0 , (UINT8)(data & 0xff)); |
| 984 | } else { |
| 985 | m_uart->data_w(space , 0 , (UINT8)(data & 0xff)); |
| 986 | } |
| 987 | 987 | } |
| 988 | 988 | |
| 989 | 989 | WRITE_LINE_MEMBER(hp64k_state::hp64k_rxrdy_w) |
| 990 | 990 | { |
| 991 | | if (state) { |
| 992 | | BIT_SET(m_irl_pending , 6); |
| 993 | | } else { |
| 994 | | BIT_CLR(m_irl_pending , 6); |
| 995 | | } |
| 991 | if (state) { |
| 992 | BIT_SET(m_irl_pending , 6); |
| 993 | } else { |
| 994 | BIT_CLR(m_irl_pending , 6); |
| 995 | } |
| 996 | 996 | |
| 997 | | hp64k_update_irl(); |
| 997 | hp64k_update_irl(); |
| 998 | 998 | } |
| 999 | 999 | |
| 1000 | 1000 | WRITE_LINE_MEMBER(hp64k_state::hp64k_txrdy_w) |
| 1001 | 1001 | { |
| 1002 | | if (state) { |
| 1003 | | BIT_SET(m_irl_pending , 5); |
| 1004 | | } else { |
| 1005 | | BIT_CLR(m_irl_pending , 5); |
| 1006 | | } |
| 1002 | if (state) { |
| 1003 | BIT_SET(m_irl_pending , 5); |
| 1004 | } else { |
| 1005 | BIT_CLR(m_irl_pending , 5); |
| 1006 | } |
| 1007 | 1007 | |
| 1008 | | hp64k_update_irl(); |
| 1008 | hp64k_update_irl(); |
| 1009 | 1009 | } |
| 1010 | 1010 | |
| 1011 | 1011 | WRITE_LINE_MEMBER(hp64k_state::hp64k_txd_w) |
| 1012 | 1012 | { |
| 1013 | | m_txd_state = state; |
| 1014 | | if (m_loopback) { |
| 1015 | | m_uart->write_rxd(state); |
| 1016 | | } |
| 1017 | | m_rs232->write_txd(state); |
| 1013 | m_txd_state = state; |
| 1014 | if (m_loopback) { |
| 1015 | m_uart->write_rxd(state); |
| 1016 | } |
| 1017 | m_rs232->write_txd(state); |
| 1018 | 1018 | } |
| 1019 | 1019 | |
| 1020 | 1020 | WRITE_LINE_MEMBER(hp64k_state::hp64k_dtr_w) |
| 1021 | 1021 | { |
| 1022 | | m_dtr_state = state; |
| 1023 | | if (m_loopback) { |
| 1024 | | m_uart->write_dsr(state); |
| 1025 | | } |
| 1026 | | m_rs232->write_dtr(state); |
| 1022 | m_dtr_state = state; |
| 1023 | if (m_loopback) { |
| 1024 | m_uart->write_dsr(state); |
| 1025 | } |
| 1026 | m_rs232->write_dtr(state); |
| 1027 | 1027 | } |
| 1028 | 1028 | |
| 1029 | 1029 | WRITE_LINE_MEMBER(hp64k_state::hp64k_rts_w) |
| 1030 | 1030 | { |
| 1031 | | if (BIT(m_s5_sw->read() , 0)) { |
| 1032 | | // Full duplex, RTS/ = 0 |
| 1033 | | state = 0; |
| 1034 | | } |
| 1035 | | m_rts_state = state; |
| 1036 | | if (m_loopback) { |
| 1037 | | m_uart->write_cts(state); |
| 1038 | | } |
| 1039 | | m_rs232->write_rts(state); |
| 1031 | if (BIT(m_s5_sw->read() , 0)) { |
| 1032 | // Full duplex, RTS/ = 0 |
| 1033 | state = 0; |
| 1034 | } |
| 1035 | m_rts_state = state; |
| 1036 | if (m_loopback) { |
| 1037 | m_uart->write_cts(state); |
| 1038 | } |
| 1039 | m_rs232->write_rts(state); |
| 1040 | 1040 | } |
| 1041 | 1041 | |
| 1042 | 1042 | WRITE16_MEMBER(hp64k_state::hp64k_loopback_w) |
| 1043 | 1043 | { |
| 1044 | | m_loopback = BIT(data , 11); |
| 1045 | | hp64k_update_loopback(); |
| 1044 | m_loopback = BIT(data , 11); |
| 1045 | hp64k_update_loopback(); |
| 1046 | 1046 | } |
| 1047 | 1047 | |
| 1048 | 1048 | void hp64k_state::hp64k_update_loopback(void) |
| 1049 | 1049 | { |
| 1050 | | if (m_loopback) { |
| 1051 | | m_uart->write_rxd(m_txd_state); |
| 1052 | | m_uart->write_dsr(m_dtr_state); |
| 1053 | | m_uart->write_cts(m_rts_state); |
| 1054 | | } else { |
| 1055 | | m_uart->write_rxd(m_rs232->rxd_r()); |
| 1056 | | m_uart->write_dsr(m_rs232->dcd_r()); |
| 1057 | | m_uart->write_cts(m_rs232->cts_r()); |
| 1058 | | } |
| 1050 | if (m_loopback) { |
| 1051 | m_uart->write_rxd(m_txd_state); |
| 1052 | m_uart->write_dsr(m_dtr_state); |
| 1053 | m_uart->write_cts(m_rts_state); |
| 1054 | } else { |
| 1055 | m_uart->write_rxd(m_rs232->rxd_r()); |
| 1056 | m_uart->write_dsr(m_rs232->dcd_r()); |
| 1057 | m_uart->write_cts(m_rs232->cts_r()); |
| 1058 | } |
| 1059 | 1059 | } |
| 1060 | 1060 | |
| 1061 | 1061 | WRITE_LINE_MEMBER(hp64k_state::hp64k_rs232_rxd_w) |
| 1062 | 1062 | { |
| 1063 | | if (!m_loopback) { |
| 1064 | | m_uart->write_rxd(state); |
| 1065 | | } |
| 1063 | if (!m_loopback) { |
| 1064 | m_uart->write_rxd(state); |
| 1065 | } |
| 1066 | 1066 | } |
| 1067 | 1067 | |
| 1068 | 1068 | WRITE_LINE_MEMBER(hp64k_state::hp64k_rs232_dcd_w) |
| 1069 | 1069 | { |
| 1070 | | if (!m_loopback) { |
| 1071 | | m_uart->write_dsr(state); |
| 1072 | | } |
| 1070 | if (!m_loopback) { |
| 1071 | m_uart->write_dsr(state); |
| 1072 | } |
| 1073 | 1073 | } |
| 1074 | 1074 | |
| 1075 | 1075 | WRITE_LINE_MEMBER(hp64k_state::hp64k_rs232_cts_w) |
| 1076 | 1076 | { |
| 1077 | | if (!m_loopback) { |
| 1078 | | m_uart->write_cts(state); |
| 1079 | | } |
| 1077 | if (!m_loopback) { |
| 1078 | m_uart->write_cts(state); |
| 1079 | } |
| 1080 | 1080 | } |
| 1081 | 1081 | |
| 1082 | 1082 | WRITE16_MEMBER(hp64k_state::hp64k_beep_w) |
| r249051 | r249052 | |
|---|
| 1095 | 1095 | |
| 1096 | 1096 | WRITE_LINE_MEMBER(hp64k_state::hp64k_baud_clk_w) |
| 1097 | 1097 | { |
| 1098 | | if (!m_16x_clk) { |
| 1099 | | if (state && !m_baud_clk) { |
| 1100 | | m_16x_div++; |
| 1101 | | } |
| 1102 | | m_baud_clk = !!state; |
| 1103 | | state = BIT(m_16x_div , 3); |
| 1104 | | } |
| 1105 | | m_uart->write_txc(state); |
| 1106 | | m_uart->write_rxc(state); |
| 1098 | if (!m_16x_clk) { |
| 1099 | if (state && !m_baud_clk) { |
| 1100 | m_16x_div++; |
| 1101 | } |
| 1102 | m_baud_clk = !!state; |
| 1103 | state = BIT(m_16x_div , 3); |
| 1104 | } |
| 1105 | m_uart->write_txc(state); |
| 1106 | m_uart->write_rxc(state); |
| 1107 | 1107 | } |
| 1108 | 1108 | |
| 1109 | 1109 | static INPUT_PORTS_START(hp64k) |
| r249051 | r249052 | |
|---|
| 1321 | 1321 | PORT_DIPSETTING(0x00 , "1x") |
| 1322 | 1322 | PORT_DIPSETTING(0x02 , "16x") |
| 1323 | 1323 | |
| 1324 | | PORT_START("s5_sw") |
| 1325 | | PORT_DIPNAME(0x01 , 0x00 , "Duplex") |
| 1326 | | PORT_DIPLOCATION("S5 IO:!1") |
| 1327 | | PORT_DIPSETTING(0x00 , "Half duplex") |
| 1328 | | PORT_DIPSETTING(0x01 , "Full duplex") |
| 1329 | | PORT_DIPNAME(0x1e , 0x00 , "Baud rate") |
| 1330 | | PORT_DIPLOCATION("S5 IO:!5,!4,!3,!2") |
| 1331 | | PORT_DIPSETTING(0x00 , "50") |
| 1332 | | PORT_DIPSETTING(0x02 , "75") |
| 1333 | | PORT_DIPSETTING(0x04 , "110") |
| 1334 | | PORT_DIPSETTING(0x06 , "134.5") |
| 1335 | | PORT_DIPSETTING(0x08 , "150") |
| 1336 | | PORT_DIPSETTING(0x0a , "300") |
| 1337 | | PORT_DIPSETTING(0x0c , "600") |
| 1338 | | PORT_DIPSETTING(0x0e , "1200") |
| 1339 | | PORT_DIPSETTING(0x10 , "1800") |
| 1340 | | PORT_DIPSETTING(0x12 , "2000") |
| 1341 | | PORT_DIPSETTING(0x14 , "2400") |
| 1342 | | PORT_DIPSETTING(0x16 , "3600") |
| 1343 | | PORT_DIPSETTING(0x18 , "4800") |
| 1344 | | PORT_DIPSETTING(0x1a , "7200") |
| 1345 | | PORT_DIPSETTING(0x1c , "9600") |
| 1346 | | PORT_DIPSETTING(0x1e , "19200") |
| 1324 | PORT_START("s5_sw") |
| 1325 | PORT_DIPNAME(0x01 , 0x00 , "Duplex") |
| 1326 | PORT_DIPLOCATION("S5 IO:!1") |
| 1327 | PORT_DIPSETTING(0x00 , "Half duplex") |
| 1328 | PORT_DIPSETTING(0x01 , "Full duplex") |
| 1329 | PORT_DIPNAME(0x1e , 0x00 , "Baud rate") |
| 1330 | PORT_DIPLOCATION("S5 IO:!5,!4,!3,!2") |
| 1331 | PORT_DIPSETTING(0x00 , "50") |
| 1332 | PORT_DIPSETTING(0x02 , "75") |
| 1333 | PORT_DIPSETTING(0x04 , "110") |
| 1334 | PORT_DIPSETTING(0x06 , "134.5") |
| 1335 | PORT_DIPSETTING(0x08 , "150") |
| 1336 | PORT_DIPSETTING(0x0a , "300") |
| 1337 | PORT_DIPSETTING(0x0c , "600") |
| 1338 | PORT_DIPSETTING(0x0e , "1200") |
| 1339 | PORT_DIPSETTING(0x10 , "1800") |
| 1340 | PORT_DIPSETTING(0x12 , "2000") |
| 1341 | PORT_DIPSETTING(0x14 , "2400") |
| 1342 | PORT_DIPSETTING(0x16 , "3600") |
| 1343 | PORT_DIPSETTING(0x18 , "4800") |
| 1344 | PORT_DIPSETTING(0x1a , "7200") |
| 1345 | PORT_DIPSETTING(0x1c , "9600") |
| 1346 | PORT_DIPSETTING(0x1e , "19200") |
| 1347 | 1347 | |
| 1348 | 1348 | INPUT_PORTS_END |
| 1349 | 1349 | |
| r249051 | r249052 | |
|---|
| 1366 | 1366 | |
| 1367 | 1367 | // Clock = 25 MHz / 9 * (112/114) |
| 1368 | 1368 | MCFG_DEVICE_ADD("crtc" , I8275 , 2729045) |
| 1369 | | MCFG_VIDEO_SET_SCREEN("screen") |
| 1369 | MCFG_VIDEO_SET_SCREEN("screen") |
| 1370 | 1370 | MCFG_I8275_CHARACTER_WIDTH(9) |
| 1371 | 1371 | MCFG_I8275_DRAW_CHARACTER_CALLBACK_OWNER(hp64k_state , crtc_display_pixels) |
| 1372 | 1372 | MCFG_I8275_DRQ_CALLBACK(WRITELINE(hp64k_state , hp64k_crtc_drq_w)) |
| r249051 | r249052 | |
|---|
| 1375 | 1375 | MCFG_SCREEN_ADD("screen" , RASTER) |
| 1376 | 1376 | MCFG_SCREEN_UPDATE_DEVICE("crtc" , i8275_device , screen_update) |
| 1377 | 1377 | MCFG_SCREEN_REFRESH_RATE(60) |
| 1378 | | MCFG_SCREEN_SIZE(720 , 390) |
| 1378 | MCFG_SCREEN_SIZE(720 , 390) |
| 1379 | 1379 | MCFG_PALETTE_ADD_MONOCHROME_GREEN_HIGHLIGHT("palette") |
| 1380 | 1380 | |
| 1381 | | MCFG_FD1791_ADD("fdc" , XTAL_4MHz / 4) |
| 1381 | MCFG_FD1791_ADD("fdc" , XTAL_4MHz / 4) |
| 1382 | 1382 | MCFG_WD_FDC_FORCE_READY |
| 1383 | 1383 | MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(hp64k_state , hp64k_flp_intrq_w)) |
| 1384 | 1384 | MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(hp64k_state , hp64k_flp_drq_w)) |
| r249051 | r249052 | |
|---|
| 1410 | 1410 | |
| 1411 | 1411 | MCFG_TIMER_DRIVER_ADD("beep_timer" , hp64k_state , hp64k_beeper_off); |
| 1412 | 1412 | |
| 1413 | | MCFG_DEVICE_ADD("baud_rate" , CLOCK , 0) |
| 1414 | | MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(hp64k_state , hp64k_baud_clk_w)); |
| 1413 | MCFG_DEVICE_ADD("baud_rate" , CLOCK , 0) |
| 1414 | MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(hp64k_state , hp64k_baud_clk_w)); |
| 1415 | 1415 | |
| 1416 | | MCFG_DEVICE_ADD("uart" , I8251 , 0) |
| 1417 | | MCFG_I8251_RXRDY_HANDLER(WRITELINE(hp64k_state , hp64k_rxrdy_w)); |
| 1418 | | MCFG_I8251_TXRDY_HANDLER(WRITELINE(hp64k_state , hp64k_txrdy_w)); |
| 1419 | | MCFG_I8251_TXD_HANDLER(WRITELINE(hp64k_state , hp64k_txd_w)); |
| 1420 | | MCFG_I8251_DTR_HANDLER(WRITELINE(hp64k_state , hp64k_dtr_w)); |
| 1421 | | MCFG_I8251_RTS_HANDLER(WRITELINE(hp64k_state , hp64k_rts_w)); |
| 1416 | MCFG_DEVICE_ADD("uart" , I8251 , 0) |
| 1417 | MCFG_I8251_RXRDY_HANDLER(WRITELINE(hp64k_state , hp64k_rxrdy_w)); |
| 1418 | MCFG_I8251_TXRDY_HANDLER(WRITELINE(hp64k_state , hp64k_txrdy_w)); |
| 1419 | MCFG_I8251_TXD_HANDLER(WRITELINE(hp64k_state , hp64k_txd_w)); |
| 1420 | MCFG_I8251_DTR_HANDLER(WRITELINE(hp64k_state , hp64k_dtr_w)); |
| 1421 | MCFG_I8251_RTS_HANDLER(WRITELINE(hp64k_state , hp64k_rts_w)); |
| 1422 | 1422 | |
| 1423 | | MCFG_RS232_PORT_ADD("rs232" , default_rs232_devices , NULL) |
| 1424 | | MCFG_RS232_RXD_HANDLER(WRITELINE(hp64k_state , hp64k_rs232_rxd_w)) |
| 1425 | | MCFG_RS232_DCD_HANDLER(WRITELINE(hp64k_state , hp64k_rs232_dcd_w)) |
| 1426 | | MCFG_RS232_CTS_HANDLER(WRITELINE(hp64k_state , hp64k_rs232_cts_w)) |
| 1427 | | |
| 1423 | MCFG_RS232_PORT_ADD("rs232" , default_rs232_devices , NULL) |
| 1424 | MCFG_RS232_RXD_HANDLER(WRITELINE(hp64k_state , hp64k_rs232_rxd_w)) |
| 1425 | MCFG_RS232_DCD_HANDLER(WRITELINE(hp64k_state , hp64k_rs232_dcd_w)) |
| 1426 | MCFG_RS232_CTS_HANDLER(WRITELINE(hp64k_state , hp64k_rs232_cts_w)) |
| 1427 | |
| 1428 | 1428 | MACHINE_CONFIG_END |
| 1429 | 1429 | |
| 1430 | 1430 | ROM_START(hp64k) |