trunk/src/emu/machine/68230pit.c
| r248377 | r248378 | |
| 67 | 67 | m_pbcr = 0; |
| 68 | 68 | m_padr = 0; |
| 69 | 69 | m_pbdr = 0; |
| 70 | m_psr = 0; |
| 70 | 71 | } |
| 71 | 72 | |
| 72 | 73 | WRITE8_MEMBER( pit68230_device::data_w ) |
| r248377 | r248378 | |
| 98 | 99 | printf("PBCR"); |
| 99 | 100 | m_pbcr = data; |
| 100 | 101 | break; |
| 102 | case PIT_68230_PADR: |
| 103 | printf("PADR"); |
| 104 | m_padr = data; |
| 105 | break; |
| 106 | case PIT_68230_PSR: |
| 107 | printf("PSR"); |
| 108 | m_padr = data; |
| 109 | break; |
| 101 | 110 | default: |
| 102 | 111 | printf("unhandled register %02x", offset); |
| 103 | 112 | } |
| r248377 | r248378 | |
| 139 | 148 | printf("PADR"); |
| 140 | 149 | data = m_padr; |
| 141 | 150 | break; |
| 142 | | case PIT_68230_PBDR: |
| 151 | case PIT_68230_PBDR: |
| 152 | /* 4.6.2. PORT B DATA REGISTER (PBDR). The port B data register is a holding register for moving data |
| 153 | to and from port B pins. The port B data direction register determines whether each pin is an input (zero) |
| 154 | or an output (one). This register is readable and writable at all times. Depending on the chosen mode/submode, |
| 155 | reading or writing may affect the double-buffered handshake mechanism. The port B data register is not affected |
| 156 | by the assertion of the RESET pin. PB0-PB7 sits on pins 17-24 on a 48 pin DIP package */ |
| 143 | 157 | printf("PBDR"); |
| 144 | 158 | data = m_pbdr; |
| 159 | // data = (m_pbdr & 0xfc) | 1; // CPU-1 centronics interface expects to see 2 lowest bits equal 1 for printer |
| 145 | 160 | break; |
| 161 | case PIT_68230_PSR: |
| 162 | printf("PSR"); |
| 163 | data = m_psr; |
| 164 | // data = m_psr | 1; // CPU-1 centronics interface expects status to be non zero |
| 165 | break; |
| 146 | 166 | default: |
| 147 | 167 | printf("unhandled register %02x", offset); |
| 168 | data = 0; |
| 148 | 169 | } |
| 149 | 170 | printf("\n"); |
| 150 | 171 | |