trunk/src/emu/machine/pci9050.c
| r245654 | r245655 | |
| 1 | | /********************************************************************* |
| 2 | | |
| 3 | | pci9050.c - PLX PCI9050 PCI to 4x Local Bus Bridge |
| 4 | | |
| 5 | | by R. Belmont |
| 6 | | |
| 7 | | PCI spaces: |
| 8 | | 0 - (config memory) not used |
| 9 | | 1 - (config I/O) config regs |
| 10 | | 2 - local bus 1 window |
| 11 | | 3 - local bus 2 window |
| 12 | | 4 - local bus 3 window |
| 13 | | 5 - local bus 4 window |
| 14 | | |
| 15 | | PCI9050 is located, mapped, and initialized at BFC00700. |
| 16 | | |
| 17 | | The boot ROM then copies ROM to RAM, jumps to RAM, and starts trying to |
| 18 | | access Zeus 2 video through the mapped windows. |
| 19 | | |
| 20 | | *********************************************************************/ |
| 21 | | |
| 22 | | #include "pci9050.h" |
| 23 | | |
| 24 | | const device_type PCI9050 = &device_creator<pci9050_device>; |
| 25 | | |
| 26 | | DEVICE_ADDRESS_MAP_START(map, 32, pci9050_device) |
| 27 | | AM_RANGE(0x00, 0x5f) AM_READWRITE(reg_r, reg_w) |
| 28 | | ADDRESS_MAP_END |
| 29 | | |
| 30 | | pci9050_device::pci9050_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 31 | | : pci_device(mconfig, PCI9050, "PLX PCI9050 PCI to Local Bus Bridge", tag, owner, clock, "pci9050", __FILE__) |
| 32 | | { |
| 33 | | } |
| 34 | | |
| 35 | | enum |
| 36 | | { |
| 37 | | CFG_LS0_RANGE = 0, |
| 38 | | CFG_LS1_RANGE, |
| 39 | | CFG_LS2_RANGE, |
| 40 | | CFG_LS3_RANGE, |
| 41 | | CFG_ROM_RANGE, |
| 42 | | CFG_LS0_BASE, |
| 43 | | CFG_LS1_BASE, |
| 44 | | CFG_LS2_BASE, |
| 45 | | CFG_LS3_BASE, |
| 46 | | CFG_ROM_BASE, |
| 47 | | CFG_LS0_DESCRIPTORS, |
| 48 | | CFG_LS1_DESCRIPTORS, |
| 49 | | CFG_LS2_DESCRIPTORS, |
| 50 | | CFG_LS3_DESCRIPTORS, |
| 51 | | CFG_ROM_DESCRIPTORS, |
| 52 | | CFG_CS0_BASE, |
| 53 | | CFG_CS1_BASE, |
| 54 | | CFG_CS2_BASE, |
| 55 | | CFG_CS3_BASE, |
| 56 | | CFG_IRQ_CTRL_STATUS, |
| 57 | | CFG_MISC_CTRL |
| 58 | | }; |
| 59 | | |
| 60 | | void pci9050_device::device_start() |
| 61 | | { |
| 62 | | pci_device::device_start(); |
| 63 | | |
| 64 | | skip_map_regs(1); // we don't use map 0 |
| 65 | | add_map(0x60, M_IO, FUNC(pci9050_device::map)); // map 1 is our config registers |
| 66 | | } |
| 67 | | |
| 68 | | void pci9050_device::device_config_complete() |
| 69 | | { |
| 70 | | } |
| 71 | | |
| 72 | | void pci9050_device::device_reset() |
| 73 | | { |
| 74 | | pci_device::device_reset(); |
| 75 | | } |
| 76 | | |
| 77 | | READ32_MEMBER (pci9050_device::reg_r) |
| 78 | | { |
| 79 | | UINT32 result = m_regs[offset]; |
| 80 | | |
| 81 | | logerror("%06X:PCI9050 read from reg %02x = %08x (mask %08x)\n", space.device().safe_pc(), offset*4, result, mem_mask); |
| 82 | | |
| 83 | | return result; |
| 84 | | } |
| 85 | | |
| 86 | | WRITE32_MEMBER(pci9050_device::reg_w) |
| 87 | | { |
| 88 | | m_regs[offset] = data; |
| 89 | | |
| 90 | | switch (offset) |
| 91 | | { |
| 92 | | case CFG_LS0_RANGE: |
| 93 | | logerror("%06X:PCI9050 local bus 0 range %08x: %s flags %d pf %d addr bits 27-4 %08x\n", space.device().safe_pc(), data, (data & 1) ? "I/O" : "MEM", (data & 6)>>1, (data & 8)>>3, data & 0xfffffff); |
| 94 | | break; |
| 95 | | |
| 96 | | case CFG_LS1_RANGE: |
| 97 | | logerror("%06X:PCI9050 local bus 1 range %08x: %s flags %d pf %d addr bits 27-4 %08x\n", space.device().safe_pc(), data, (data & 1) ? "I/O" : "MEM", (data & 6)>>1, (data & 8)>>3, data & 0xfffffff); |
| 98 | | break; |
| 99 | | |
| 100 | | case CFG_LS2_RANGE: |
| 101 | | logerror("%06X:PCI9050 local bus 2 range %08x: %s flags %d pf %d addr bits 27-4 %08x\n", space.device().safe_pc(), data, (data & 1) ? "I/O" : "MEM", (data & 6)>>1, (data & 8)>>3, data & 0xfffffff); |
| 102 | | break; |
| 103 | | |
| 104 | | case CFG_LS3_RANGE: |
| 105 | | logerror("%06X:PCI9050 local bus 3 range %08x: %s flags %d pf %d addr bits 27-4 %08x\n", space.device().safe_pc(), data, (data & 1) ? "I/O" : "MEM", (data & 6)>>1, (data & 8)>>3, data & 0xfffffff); |
| 106 | | break; |
| 107 | | |
| 108 | | case CFG_ROM_RANGE: |
| 109 | | logerror("%06X:PCI9050 ROM range %08x: addr bits 27-11 %08x\n", space.device().safe_pc(), data, data & 0xfffff800); |
| 110 | | break; |
| 111 | | |
| 112 | | case CFG_LS0_BASE: |
| 113 | | logerror("%06X:PCI9050 local bus 0 base %08x: enable %d remap %08x\n", space.device().safe_pc(), data, data&1, data & 0x0ffffffe); |
| 114 | | break; |
| 115 | | |
| 116 | | case CFG_LS1_BASE: |
| 117 | | logerror("%06X:PCI9050 local bus 1 base %08x: enable %d remap %08x\n", space.device().safe_pc(), data, data&1, data & 0x0ffffffe); |
| 118 | | break; |
| 119 | | |
| 120 | | case CFG_LS2_BASE: |
| 121 | | logerror("%06X:PCI9050 local bus 2 base %08x: enable %d remap %08x\n", space.device().safe_pc(), data, data&1, data & 0x0ffffffe); |
| 122 | | break; |
| 123 | | |
| 124 | | case CFG_LS3_BASE: |
| 125 | | logerror("%06X:PCI9050 local bus 3 base %08x: enable %d remap %08x\n", space.device().safe_pc(), data, data&1, data & 0x0ffffffe); |
| 126 | | break; |
| 127 | | |
| 128 | | case CFG_ROM_BASE: |
| 129 | | logerror("%06X:PCI9050 ROM base %08x: remap %08x\n", space.device().safe_pc(), data, data & 0x0ffff800); |
| 130 | | break; |
| 131 | | |
| 132 | | case CFG_LS0_DESCRIPTORS: |
| 133 | | logerror("%06X:PCI9050 local bus 0 descriptors %08x: burst %d prefetch %d width %d, endian %s, endian mode %d\n", space.device().safe_pc(), data, data&1, (data >> 5) & 1, (data >> 22) & 3, ((data >> 24) & 1) ? "BE" : "LE", (data >> 25) & 1); |
| 134 | | break; |
| 135 | | |
| 136 | | case CFG_LS1_DESCRIPTORS: |
| 137 | | logerror("%06X:PCI9050 local bus 1 descriptors %08x: burst %d prefetch %d width %d, endian %s, endian mode %d\n", space.device().safe_pc(), data, data&1, (data >> 5) & 1, (data >> 22) & 3, ((data >> 24) & 1) ? "BE" : "LE", (data >> 25) & 1); |
| 138 | | break; |
| 139 | | |
| 140 | | case CFG_LS2_DESCRIPTORS: |
| 141 | | logerror("%06X:PCI9050 local bus 2 descriptors %08x: burst %d prefetch %d width %d, endian %s, endian mode %d\n", space.device().safe_pc(), data, data&1, (data >> 5) & 1, (data >> 22) & 3, ((data >> 24) & 1) ? "BE" : "LE", (data >> 25) & 1); |
| 142 | | break; |
| 143 | | |
| 144 | | case CFG_LS3_DESCRIPTORS: |
| 145 | | logerror("%06X:PCI9050 local bus 3 descriptors %08x: burst %d prefetch %d width %d, endian %s, endian mode %d\n", space.device().safe_pc(), data, data&1, (data >> 5) & 1, (data >> 22) & 3, ((data >> 24) & 1) ? "BE" : "LE", (data >> 25) & 1); |
| 146 | | break; |
| 147 | | |
| 148 | | case CFG_ROM_DESCRIPTORS: |
| 149 | | logerror("%06X:PCI9050 ROM descriptors %08x: burst %d prefetch %d bits %d, endian %s, endian mode %d\n", space.device().safe_pc(), data, data&1, (data >> 5) & 1, (data >> 22) & 3, ((data >> 24) & 1) ? "BE" : "LE", (data >> 25) & 1); |
| 150 | | break; |
| 151 | | |
| 152 | | case CFG_CS0_BASE: |
| 153 | | logerror("%06X:PCI9050 chip select 0 base %08x: enable %d size %08x\n", space.device().safe_pc(), data, data&1, data&0xfffffffe); |
| 154 | | break; |
| 155 | | |
| 156 | | case CFG_CS1_BASE: |
| 157 | | logerror("%06X:PCI9050 chip select 1 base %08x: enable %d size %08x\n", space.device().safe_pc(), data, data&1, data&0xfffffffe); |
| 158 | | break; |
| 159 | | |
| 160 | | case CFG_CS2_BASE: |
| 161 | | logerror("%06X:PCI9050 chip select 2 base %08x: enable %d size %08x\n", space.device().safe_pc(), data, data&1, data&0xfffffffe); |
| 162 | | break; |
| 163 | | |
| 164 | | case CFG_CS3_BASE: |
| 165 | | logerror("%06X:PCI9050 chip select 3 base %08x: enable %d size %08x\n", space.device().safe_pc(), data, data&1, data&0xfffffffe); |
| 166 | | break; |
| 167 | | |
| 168 | | case CFG_IRQ_CTRL_STATUS: |
| 169 | | logerror("%06X:PCI9050 IRQ control %08x\n", space.device().safe_pc(), data); |
| 170 | | break; |
| 171 | | |
| 172 | | case CFG_MISC_CTRL: |
| 173 | | logerror("%06X:PCI9050 misc control %08x\n", space.device().safe_pc(), data); |
| 174 | | break; |
| 175 | | |
| 176 | | default: |
| 177 | | logerror("%06X:PCI9050 write to offset %02x = %08x (mask %08x)\n", space.device().safe_pc(), offset*4, data, mem_mask); |
| 178 | | break; |
| 179 | | } |
| 180 | | |
| 181 | | } |
trunk/src/mess/audio/upd1771.c
| r245654 | r245655 | |
| 174 | 174 | #define LOG 0 |
| 175 | 175 | |
| 176 | 176 | /* |
| 177 | | Each of the 8 waveforms have been extracted from the uPD1771c-017 internal |
| 178 | | ROM, from offset 0x1fd (start of first waveform) to offset 0x2fc (end of |
| 179 | | last waveform). |
| 180 | | (note: given test mode dumping offset non-clarity it may be 0x200-0x2ff) |
| 181 | | The waveforms are stored in an 8-bit sign-magnitude format, so if in ROM the |
| 182 | | upper bit is 0x80, invert the lower 7 bits to get the 2's complement result |
| 183 | | seen here. |
| 184 | | Note that only the last 4 waveforms appear to have been intended for use as |
| 185 | | waveforms; the first four look as if they're playing back a piece of code as |
| 186 | | wave data. |
| 177 | Each of the 8 waveforms have been sampled at 192kHz using period 0xFF, |
| 178 | filtered, and each of the 32 levels have been calculated with averages on around 10 samples |
| 179 | (removing the transition samples) then quantized to int8_t's. |
| 180 | We are not clear on the exact DAC details yet, especially with regards to volume changes. |
| 181 | |
| 182 | External AC coupling is assumed in the use of this DAC, so we will center the 8bit data using a signed container |
| 187 | 183 | */ |
| 188 | 184 | const char WAVEFORMS[8][32]={ |
| 189 | | { 0, 0,-123,-123, -61, -23, 125, 107, 94, 83,-128,-128,-128, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0,-128,-128,-128, 0, 0, 0, 0, 0, 0}, |
| 190 | | { 37, 16, 32, -21, 32, 52, 4, 4, 33, 18, 60, 56, 0, 8, 5, 16, 65, 19, 69, 16, -2, 19, 37, 16, 97, 19, 0, 87, 127, -3, 1, 2}, |
| 191 | | { 0, 8, 1, 52, 4, 0, 0, 77, 81,-109, 47, 97, -83,-109, 38, 97, 0, 52, 4, 0, 1, 4, 1, 22, 2, -46, 33, 97, 0, 8, -85, -99}, |
| 192 | | { 47, 97, 40, 97, -3, 25, 64, 17, 0, 52, 12, 5, 12, 5, 12, 5, 12, 5, 12, 5, 8, 4,-114, 19, 0, 52,-122, 21, 2, 5, 0, 8}, |
| 193 | | { -52, -96,-118,-128,-111, -74, -37, -5, 31, 62, 89, 112, 127, 125, 115, 93, 57, 23, 0, -16, -8, 15, 37, 54, 65, 70, 62, 54, 43, 31, 19, 0}, |
| 194 | | { -81,-128, -61, 13, 65, 93, 127, 47, 41, 44, 52, 55, 56, 58, 58, 34, 0, 68, 76, 72, 61, 108, 55, 29, 32, 39, 43, 49, 50, 51, 51, 0}, |
| 195 | | { -21, -45, -67, -88,-105,-114,-122,-128,-123,-116,-103, -87, -70, -53, -28, -9, 22, 46, 67, 86, 102, 114, 123, 125, 127, 117, 104, 91, 72, 51, 28, 0}, |
| 196 | | { -78,-118,-128,-102, -54, -3, 40, 65, 84, 88, 84, 80, 82, 88, 94, 103, 110, 119, 122, 125, 122, 122, 121, 123, 125, 126, 127, 127, 125, 118, 82, 0} |
| 185 | { -5, -5, -5,-117,-116, -53, -10, 127, 120, 108, 97, -121,-121,-121, -4, -4, -4, -4, -4, -4, -4, -4, -4, -4,-119,-119,-118, -2, -2, -2, -2, -2}, |
| 186 | { 6, -21, -1, -41, -1, 25, -35, -35, -1, -16, 34, 29, -37, -30, -33, -20, 38, -15, 50, -20, -20, -15, 7, -20, 77, -15, -37, 69, 93, -21, -38, -37}, |
| 187 | { -11, -4, -11, 51, -9, -11, -11, 84, 87,-112, 44, 102, -86,-112, 35, 103, -12, 51, -10, -12, -12, -9, -12, 13, -11, -44, 25, 103, -12, -5, -90,-101}, |
| 188 | { 40, 98, 31, 98, -1, 13, 58, 3, -18, 45, -5, -13, -5, -13, -5, -13, -5, -13, -5, -13, -10, -15,-121, 5, -17, 45,-128, 8, -16, -12, -16, -9}, |
| 189 | { -53,-101,-121,-128,-113, -77, -34, 5, 26, 63, 97, 117, 119, 119, 115, 99, 54, 13, -13, -11, -2, 3, 31, 52, 62, 74, 60, 51, 38, 22, 8, -14}, |
| 190 | { -86,-128, -60, 3, 65, 101, 119, 44, 37, 41, 51, 53, 55, 58, 58, 29, -12, 74, 82, 77, 59, 113, 52, 21, 24, 34, 39, 45, 48, 48, 48, -13}, |
| 191 | { -15, -18, -46, -67, -95,-111,-117,-124,-128,-123,-116, -105, -89, -72, -50, -21, 2, 16, 46, 76, 95, 111, 118, 119, 119, 119, 117, 110, 97, 75, 47, 18}, |
| 192 | { -84,-121,-128,-105, -51, 7, 38, 66, 93, 97, 93, 88, 89, 96, 102, 111, 116, 118, 118, 119, 118, 118, 117, 117, 118, 118, 117, 117, 117, 115, 85, -14} |
| 197 | 193 | }; |
| 198 | 194 | |
| 199 | 195 | |