trunk/src/emu/cpu/hmcs40/hmcs40.h
| r244948 | r244949 | |
| 27 | 27 | hmcs40_cpu_device::set_write_d_callback(*device, DEVCB_##_devcb); |
| 28 | 28 | |
| 29 | 29 | |
| 30 | enum |
| 31 | { |
| 32 | HMCS40_PORT_R0X = 0, |
| 33 | HMCS40_PORT_R1X, |
| 34 | HMCS40_PORT_R2X, |
| 35 | HMCS40_PORT_R3X, |
| 36 | HMCS40_PORT_R4X, |
| 37 | HMCS40_PORT_R5X, |
| 38 | HMCS40_PORT_R6X, |
| 39 | HMCS40_PORT_R7X |
| 40 | }; |
| 30 | 41 | |
| 42 | |
| 43 | // pinout reference |
| 44 | |
| 45 | /* |
| 46 | _________________ |
| 47 | D3 1 |* | 42 D2 |
| 48 | D4 2 | | 41 D1 |
| 49 | D5 3 | | 40 D0 |
| 50 | D6 4 | | 39 R33 |
| 51 | D7 5 | | 38 R32 |
| 52 | D8 6 | | 37 R31 |
| 53 | D9 7 | | 36 R30 |
| 54 | D10 8 | | 35 R23 ....................................... |
| 55 | D11 9 | | 34 R22 : |
| 56 | D12 10 | HD38750 | 33 R21 : |
| 57 | D13 11 | HD38800 | 32 R20 : |
| 58 | D14 12 | | 31 INT1 : |
| 59 | D15 13 | | 30 INT0 : _________________ |
| 60 | Vdisp 14 | | 29 R13 : D4 1 |* | 64 D3 |
| 61 | RESET 15 | | 28 R12 : D5 2 | | 63 D2 |
| 62 | Vbb 16 | | 27 R11 : D6 3 | | 62 D1 |
| 63 | Vdd 17 | | 26 R10 : D7 4 | | 61 D0 |
| 64 | OSC 18 | | 25 R03 : D8 5 | | 60 R63 |
| 65 | <NC> 19 | | 24 R02 : D9 6 | | 59 R62 |
| 66 | /TEST 20 | | 23 R01 : <NC> 7 | | 58 <NC> |
| 67 | Vss 21 |_________________| 22 R00 : <NC> 8 | | 57 <NC> |
| 68 | <NC> 9 | | 56 <NC> |
| 69 | D10 10 | | 55 R61 |
| 70 | D8 D7 D6 D5 D4 <NC>D3 D2 D1 D0 D11 11 | | 54 R60 |
| 71 | 5 4 3 2 1 54 53 52 51 50 D12 12 | | 53 R33 |
| 72 | __________________________________ D13 13 | | 52 R32 |
| 73 | / | D14 14 | | 51 R31 |
| 74 | D9 6 | | 49 R63 D15 15 | | 50 R30 |
| 75 | D10 7 | | 48 R62 R40 16 | | 49 R23 |
| 76 | D11 8 | | 47 R61 R41 17 | | 48 R22 |
| 77 | D12 9 | | 46 R60 R42 18 | | 47 R21 |
| 78 | D13 10 | | 45 R33 R43 19 | | 46 R20 |
| 79 | D14 11 | | 44 R32 R50 20 | | 45 INT1 |
| 80 | D15 12 | | 43 R31 R51 21 | | 44 INT0 |
| 81 | R40 13 | HD38820 | 42 R30 R52 22 | HD38820 | 43 R13 |
| 82 | R41 14 | (FP-54 pkg) | 41 R23 R53 23 | (DP-64S pkg) | 42 R12 |
| 83 | R42 15 | | 40 R22 Vdisp 24 | | 41 <NC> |
| 84 | R43 16 | | 39 R21 <NC> 25 | | 40 <NC> |
| 85 | R50 17 | | 38 R20 RESET 26 | | 39 <NC> |
| 86 | R51 18 | | 37 INT1 Vbb 27 | | 38 R11 |
| 87 | R52 19 | | 36 INT0 Vdd 28 | | 37 R10 |
| 88 | R53 20 | | 35 R13 OSC 29 | | 36 R03 |
| 89 | Vdisp 21 | | 34 R12 <NC> 30 | | 35 R02 |
| 90 | RESET 22 | | 33 R11 /TEST 31 | | 34 R01 |
| 91 | |__________________________________| Vss 32 |_________________| 33 R00 |
| 92 | |
| 93 | 23 24 25 26 27 28 29 30 31 32 |
| 94 | Vbb | OSC | Vss R00 | R02 | R10 |
| 95 | Vdd /TEST R01 R03 |
| 96 | */ |
| 97 | |
| 98 | |
| 31 | 99 | class hmcs40_cpu_device : public cpu_device |
| 32 | 100 | { |
| 33 | 101 | public: |
trunk/src/mess/drivers/hh_hmcs40.c
| r244948 | r244949 | |
| 95 | 95 | DECLARE_WRITE8_MEMBER(alnattck_plate_w); |
| 96 | 96 | DECLARE_READ16_MEMBER(alnattck_d_r); |
| 97 | 97 | DECLARE_WRITE16_MEMBER(alnattck_d_w); |
| 98 | |
| 99 | void egalaxn2_display(); |
| 100 | DECLARE_READ8_MEMBER(egalaxn2_input_r); |
| 101 | DECLARE_WRITE8_MEMBER(egalaxn2_plate_w); |
| 102 | DECLARE_WRITE16_MEMBER(egalaxn2_grid_w); |
| 98 | 103 | }; |
| 99 | 104 | |
| 100 | 105 | |
| r244948 | r244949 | |
| 566 | 571 | |
| 567 | 572 | ***************************************************************************/ |
| 568 | 573 | |
| 574 | void hh_hmcs40_state::egalaxn2_display() |
| 575 | { |
| 576 | UINT32 grid = BITSWAP16(m_grid,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14); |
| 577 | UINT32 plate = BITSWAP24(m_plate,23,22,21,20,15,14,13,12,7,6,5,4,3,2,1,0,19,18,17,16,11,10,9,8); |
| 578 | |
| 579 | display_matrix(24, 15, plate, grid); |
| 580 | } |
| 581 | |
| 582 | WRITE16_MEMBER(hh_hmcs40_state::egalaxn2_grid_w) |
| 583 | { |
| 584 | // D0: speaker out |
| 585 | m_speaker->level_w(data & 1); |
| 586 | |
| 587 | // D1-D4: input mux |
| 588 | m_inp_mux = data >> 1 & 0xf; |
| 589 | |
| 590 | // D1-D15: vfd matrix grid |
| 591 | m_grid = data >> 1; |
| 592 | egalaxn2_display(); |
| 593 | } |
| 594 | |
| 595 | WRITE8_MEMBER(hh_hmcs40_state::egalaxn2_plate_w) |
| 596 | { |
| 597 | // R10-R63: vfd matrix plate |
| 598 | int shift = (offset - HMCS40_PORT_R1X) * 4; |
| 599 | m_plate = (m_plate & ~(0xf << shift)) | (data << shift); |
| 600 | |
| 601 | egalaxn2_display(); |
| 602 | } |
| 603 | |
| 604 | READ8_MEMBER(hh_hmcs40_state::egalaxn2_input_r) |
| 605 | { |
| 606 | // R0x: multiplexed inputs |
| 607 | return read_inputs(4); |
| 608 | } |
| 609 | |
| 610 | |
| 569 | 611 | static INPUT_PORTS_START( egalaxn2 ) |
| 612 | PORT_START("IN.0") // D1 port R0x |
| 613 | PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) |
| 614 | PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_16WAY // separate directional buttons, hence 16way |
| 615 | PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNUSED ) |
| 616 | PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_16WAY // " |
| 617 | |
| 618 | PORT_START("IN.1") // D2 port R0x |
| 619 | PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2) PORT_16WAY // separate directional buttons, hence 16way |
| 620 | PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2) PORT_16WAY // " |
| 621 | PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_PLAYER(2) PORT_16WAY // " |
| 622 | PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2) PORT_16WAY // " |
| 623 | |
| 624 | PORT_START("IN.2") // D3 port R0x |
| 625 | PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNUSED ) |
| 626 | PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2) |
| 627 | PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNUSED ) |
| 628 | PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) |
| 629 | |
| 630 | PORT_START("IN.3") // D4 port R0x |
| 631 | PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNUSED ) |
| 632 | PORT_CONFNAME( 0x02, 0x02, "Skill" ) |
| 633 | PORT_CONFSETTING( 0x02, "1" ) |
| 634 | PORT_CONFSETTING( 0x00, "2" ) |
| 635 | PORT_CONFNAME( 0x0c, 0x00, "Players" ) |
| 636 | PORT_CONFSETTING( 0x08, "0 (Demo)" ) |
| 637 | PORT_CONFSETTING( 0x00, "1" ) |
| 638 | PORT_CONFSETTING( 0x04, "2" ) |
| 570 | 639 | INPUT_PORTS_END |
| 571 | 640 | |
| 572 | 641 | |
| r244948 | r244949 | |
| 574 | 643 | |
| 575 | 644 | /* basic machine hardware */ |
| 576 | 645 | MCFG_CPU_ADD("maincpu", HD38820, 400000) // approximation - RC osc. |
| 646 | MCFG_HMCS40_READ_R_CB(0, READ8(hh_hmcs40_state, egalaxn2_input_r)) |
| 647 | MCFG_HMCS40_WRITE_R_CB(1, WRITE8(hh_hmcs40_state, egalaxn2_plate_w)) |
| 648 | MCFG_HMCS40_WRITE_R_CB(2, WRITE8(hh_hmcs40_state, egalaxn2_plate_w)) |
| 649 | MCFG_HMCS40_WRITE_R_CB(3, WRITE8(hh_hmcs40_state, egalaxn2_plate_w)) |
| 650 | MCFG_HMCS40_WRITE_R_CB(4, WRITE8(hh_hmcs40_state, egalaxn2_plate_w)) |
| 651 | MCFG_HMCS40_WRITE_R_CB(5, WRITE8(hh_hmcs40_state, egalaxn2_plate_w)) |
| 652 | MCFG_HMCS40_WRITE_R_CB(6, WRITE8(hh_hmcs40_state, egalaxn2_plate_w)) |
| 653 | MCFG_HMCS40_WRITE_D_CB(WRITE16(hh_hmcs40_state, egalaxn2_grid_w)) |
| 577 | 654 | |
| 578 | | // MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_hmcs40_state, display_decay_tick, attotime::from_msec(1)) |
| 655 | MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_hmcs40_state, display_decay_tick, attotime::from_msec(1)) |
| 579 | 656 | MCFG_DEFAULT_LAYOUT(layout_hh_hmcs40_test) |
| 580 | 657 | |
| 581 | 658 | /* no video! */ |
trunk/src/mess/drivers/hh_ucom4.c
| r244948 | r244949 | |
| 850 | 850 | |
| 851 | 851 | static INPUT_PORTS_START( tmpacman ) |
| 852 | 852 | PORT_START("IN.0") // port A |
| 853 | | PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_16WAY // 4 separate directional buttons, hence 16way |
| 854 | | PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_16WAY |
| 855 | | PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_16WAY |
| 856 | | PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_16WAY |
| 853 | PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_16WAY // separate directional buttons, hence 16way |
| 854 | PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_16WAY // " |
| 855 | PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_16WAY // " |
| 856 | PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_16WAY // " |
| 857 | 857 | |
| 858 | 858 | PORT_START("IN.1") // port B |
| 859 | 859 | PORT_CONFNAME( 0x01, 0x00, DEF_STR( Difficulty ) ) |
| r244948 | r244949 | |
| 967 | 967 | |
| 968 | 968 | PORT_START("IN.1") // D0 port A |
| 969 | 969 | PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2) // on non-mirrored view, swap P2 left/right |
| 970 | | PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2) // " |
| 971 | | PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2) |
| 972 | | PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_PLAYER(2) |
| 970 | PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2) // " |
| 971 | PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2) |
| 972 | PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_PLAYER(2) |
| 973 | 973 | |
| 974 | 974 | PORT_START("IN.2") // port B |
| 975 | 975 | PORT_CONFNAME( 0x01, 0x01, "Players" ) |