trunk/src/mame/drivers/speedspn.c
| r244895 | r244896 | |
| 54 | 54 | |
| 55 | 55 | ******************************************************************************/ |
| 56 | 56 | |
| 57 | | READ8_MEMBER(speedspn_state::speedspn_irq_ack_r) |
| 57 | READ8_MEMBER(speedspn_state::irq_ack_r) |
| 58 | 58 | { |
| 59 | 59 | // I think this simply acknowledges the IRQ #0, it's read within the handler and the |
| 60 | 60 | // value is discarded |
| 61 | 61 | return 0; |
| 62 | 62 | } |
| 63 | 63 | |
| 64 | | WRITE8_MEMBER(speedspn_state::speedspn_banked_rom_change) |
| 64 | WRITE8_MEMBER(speedspn_state::rombank_w) |
| 65 | 65 | { |
| 66 | | /* is this weird banking some form of protection? */ |
| 67 | | |
| 68 | | UINT8 *rom = memregion("maincpu")->base(); |
| 69 | | int addr; |
| 70 | | |
| 71 | | switch (data) |
| 66 | if (data > 8) |
| 72 | 67 | { |
| 73 | | case 0: addr = 0x28000; break; |
| 74 | | case 1: addr = 0x14000; break; |
| 75 | | case 2: addr = 0x1c000; break; |
| 76 | | case 3: addr = 0x54000; break; |
| 77 | | case 4: addr = 0x48000; break; |
| 78 | | case 5: addr = 0x3c000; break; |
| 79 | | case 6: addr = 0x18000; break; |
| 80 | | case 7: addr = 0x4c000; break; |
| 81 | | case 8: addr = 0x50000; break; |
| 82 | | default: |
| 83 | | popmessage ("Unmapped Bank Write %02x", data); |
| 84 | | addr = 0; |
| 85 | | break; |
| 68 | popmessage ("Unmapped Bank Write %02x", data); |
| 69 | data = 0; |
| 86 | 70 | } |
| 87 | | |
| 88 | | membank("bank1")->set_base(&rom[addr + 0x8000]); |
| 71 | m_prgbank->set_entry(data); |
| 89 | 72 | } |
| 90 | 73 | |
| 91 | 74 | /*** SOUND RELATED ***********************************************************/ |
| 92 | 75 | |
| 93 | | WRITE8_MEMBER(speedspn_state::speedspn_sound_w) |
| 76 | WRITE8_MEMBER(speedspn_state::sound_w) |
| 94 | 77 | { |
| 95 | 78 | soundlatch_byte_w(space, 1, data); |
| 96 | 79 | m_audiocpu->set_input_line(0, HOLD_LINE); |
| 97 | 80 | } |
| 98 | 81 | |
| 99 | | WRITE8_MEMBER(speedspn_state::oki_banking_w) |
| 82 | WRITE8_MEMBER(speedspn_state::okibank_w) |
| 100 | 83 | { |
| 101 | | m_oki->set_bank_base(0x40000 * (data & 3)); |
| 84 | m_okibank->set_entry(data & 3); |
| 102 | 85 | } |
| 103 | 86 | |
| 104 | 87 | /*** MEMORY MAPS *************************************************************/ |
| 105 | 88 | |
| 106 | 89 | /* main cpu */ |
| 107 | 90 | |
| 108 | | static ADDRESS_MAP_START( speedspn_map, AS_PROGRAM, 8, speedspn_state ) |
| 91 | static ADDRESS_MAP_START( program_map, AS_PROGRAM, 8, speedspn_state ) |
| 109 | 92 | AM_RANGE(0x0000, 0x7fff) AM_ROM |
| 110 | 93 | AM_RANGE(0x8000, 0x87ff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette") /* RAM COLOUR */ |
| 111 | | AM_RANGE(0x8800, 0x8fff) AM_RAM_WRITE(speedspn_attram_w) AM_SHARE("attram") |
| 112 | | AM_RANGE(0x9000, 0x9fff) AM_READWRITE(speedspn_vidram_r,speedspn_vidram_w) /* RAM FIX / RAM OBJECTS (selected by bit 0 of port 17) */ |
| 94 | AM_RANGE(0x8800, 0x8fff) AM_RAM_WRITE(attram_w) AM_SHARE("attram") |
| 95 | AM_RANGE(0x9000, 0x9fff) AM_READWRITE(vidram_r, vidram_w) /* RAM FIX / RAM OBJECTS (selected by bit 0 of port 17) */ |
| 113 | 96 | AM_RANGE(0xa000, 0xa7ff) AM_RAM |
| 114 | 97 | AM_RANGE(0xa800, 0xafff) AM_RAM |
| 115 | 98 | AM_RANGE(0xb000, 0xbfff) AM_RAM /* RAM PROGRAM */ |
| 116 | | AM_RANGE(0xc000, 0xffff) AM_ROMBANK("bank1") /* banked ROM */ |
| 99 | AM_RANGE(0xc000, 0xffff) AM_ROMBANK("prgbank") /* banked ROM */ |
| 117 | 100 | ADDRESS_MAP_END |
| 118 | 101 | |
| 119 | | static ADDRESS_MAP_START( speedspn_io_map, AS_IO, 8, speedspn_state ) |
| 102 | static ADDRESS_MAP_START( io_map, AS_IO, 8, speedspn_state ) |
| 120 | 103 | ADDRESS_MAP_GLOBAL_MASK(0xff) |
| 121 | | AM_RANGE(0x07, 0x07) AM_WRITE(speedspn_global_display_w) |
| 104 | AM_RANGE(0x07, 0x07) AM_WRITE(display_disable_w) |
| 122 | 105 | AM_RANGE(0x10, 0x10) AM_READ_PORT("SYSTEM") |
| 123 | 106 | AM_RANGE(0x11, 0x11) AM_READ_PORT("P1") |
| 124 | | AM_RANGE(0x12, 0x12) AM_READ_PORT("P2") AM_WRITE(speedspn_banked_rom_change) |
| 125 | | AM_RANGE(0x13, 0x13) AM_READ_PORT("DSW1") AM_WRITE(speedspn_sound_w) |
| 107 | AM_RANGE(0x12, 0x12) AM_READ_PORT("P2") AM_WRITE(rombank_w) |
| 108 | AM_RANGE(0x13, 0x13) AM_READ_PORT("DSW1") AM_WRITE(sound_w) |
| 126 | 109 | AM_RANGE(0x14, 0x14) AM_READ_PORT("DSW2") |
| 127 | | AM_RANGE(0x16, 0x16) AM_READ(speedspn_irq_ack_r) // @@@ could be watchdog, value is discarded |
| 128 | | AM_RANGE(0x17, 0x17) AM_WRITE(speedspn_banked_vidram_change) |
| 110 | AM_RANGE(0x16, 0x16) AM_READ(irq_ack_r) // @@@ could be watchdog, value is discarded |
| 111 | AM_RANGE(0x17, 0x17) AM_WRITE(vidram_bank_w) |
| 129 | 112 | ADDRESS_MAP_END |
| 130 | 113 | |
| 131 | 114 | /* sound cpu */ |
| 132 | 115 | |
| 133 | | static ADDRESS_MAP_START( speedspn_sound_map, AS_PROGRAM, 8, speedspn_state ) |
| 116 | static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, speedspn_state ) |
| 134 | 117 | AM_RANGE(0x0000, 0x7fff) AM_ROM |
| 135 | 118 | AM_RANGE(0x8000, 0x87ff) AM_RAM |
| 136 | | AM_RANGE(0x9000, 0x9000) AM_WRITE(oki_banking_w) |
| 119 | AM_RANGE(0x9000, 0x9000) AM_WRITE(okibank_w) |
| 137 | 120 | AM_RANGE(0x9800, 0x9800) AM_DEVREADWRITE("oki", okim6295_device, read, write) |
| 138 | 121 | AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_byte_r) |
| 139 | 122 | ADDRESS_MAP_END |
| 140 | 123 | |
| 124 | static ADDRESS_MAP_START( oki_map, AS_0, 8, speedspn_state ) |
| 125 | AM_RANGE(0x00000, 0x1ffff) AM_ROM |
| 126 | AM_RANGE(0x20000, 0x3ffff) AM_ROMBANK("okibank") |
| 127 | ADDRESS_MAP_END |
| 141 | 128 | |
| 142 | 129 | /*** INPUT PORT **************************************************************/ |
| 143 | 130 | |
| r244895 | r244896 | |
| 265 | 252 | |
| 266 | 253 | /*** MACHINE DRIVER **********************************************************/ |
| 267 | 254 | |
| 255 | void speedspn_state::machine_start() |
| 256 | { |
| 257 | /* is this weird banking some form of protection? */ |
| 258 | UINT8 *rom = memregion("maincpu")->base(); |
| 259 | m_prgbank->configure_entry(0, &rom[0x28000]); |
| 260 | m_prgbank->configure_entry(1, &rom[0x14000]); |
| 261 | m_prgbank->configure_entry(2, &rom[0x1c000]); |
| 262 | m_prgbank->configure_entry(3, &rom[0x54000]); |
| 263 | m_prgbank->configure_entry(4, &rom[0x48000]); |
| 264 | m_prgbank->configure_entry(5, &rom[0x3c000]); |
| 265 | m_prgbank->configure_entry(6, &rom[0x18000]); |
| 266 | m_prgbank->configure_entry(7, &rom[0x4c000]); |
| 267 | m_prgbank->configure_entry(8, &rom[0x50000]); |
| 268 | m_prgbank->set_entry(0); |
| 268 | 269 | |
| 270 | m_okibank->configure_entries(0, 4, memregion("oki")->base(), 0x20000); |
| 271 | m_okibank->set_entry(0); |
| 272 | } |
| 273 | |
| 274 | |
| 269 | 275 | static MACHINE_CONFIG_START( speedspn, speedspn_state ) |
| 270 | 276 | |
| 271 | 277 | /* basic machine hardware */ |
| 272 | 278 | MCFG_CPU_ADD("maincpu",Z80,6000000) /* 6 MHz */ |
| 273 | | MCFG_CPU_PROGRAM_MAP(speedspn_map) |
| 274 | | MCFG_CPU_IO_MAP(speedspn_io_map) |
| 279 | MCFG_CPU_PROGRAM_MAP(program_map) |
| 280 | MCFG_CPU_IO_MAP(io_map) |
| 275 | 281 | MCFG_CPU_VBLANK_INT_DRIVER("screen", speedspn_state, irq0_line_hold) |
| 276 | 282 | |
| 277 | 283 | MCFG_CPU_ADD("audiocpu", Z80,6000000) /* 6 MHz */ |
| 278 | | MCFG_CPU_PROGRAM_MAP(speedspn_sound_map) |
| 284 | MCFG_CPU_PROGRAM_MAP(sound_map) |
| 279 | 285 | |
| 280 | 286 | /* video hardware */ |
| 281 | 287 | MCFG_SCREEN_ADD("screen", RASTER) |
| r244895 | r244896 | |
| 283 | 289 | MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) |
| 284 | 290 | MCFG_SCREEN_SIZE(64*8, 32*8) |
| 285 | 291 | MCFG_SCREEN_VISIBLE_AREA(8*8, 56*8-1, 1*8, 31*8-1) |
| 286 | | MCFG_SCREEN_UPDATE_DRIVER(speedspn_state, screen_update_speedspn) |
| 292 | MCFG_SCREEN_UPDATE_DRIVER(speedspn_state, screen_update) |
| 287 | 293 | MCFG_SCREEN_PALETTE("palette") |
| 288 | 294 | |
| 289 | 295 | MCFG_GFXDECODE_ADD("gfxdecode", "palette", speedspn) |
| r244895 | r244896 | |
| 295 | 301 | |
| 296 | 302 | MCFG_OKIM6295_ADD("oki", 1122000, OKIM6295_PIN7_HIGH) // clock frequency & pin 7 not verified |
| 297 | 303 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) |
| 304 | MCFG_DEVICE_ADDRESS_MAP(AS_0, oki_map) |
| 298 | 305 | MACHINE_CONFIG_END |
| 299 | 306 | |
| 300 | 307 | /*** ROM LOADING *************************************************************/ |
| 301 | 308 | |
| 302 | 309 | ROM_START( speedspn ) |
| 303 | | ROM_REGION( 0x088000, "maincpu", 0 ) /* CPU1 code */ |
| 310 | ROM_REGION( 0x080000, "maincpu", 0 ) /* CPU1 code */ |
| 304 | 311 | /* most of this is probably actually banked */ |
| 305 | | ROM_LOAD( "tch-ss1.u78", 0x00000, 0x008000, CRC(41b6b45b) SHA1(d969119959db4cc3be50f188bfa41e4b4896eaca) ) /* fixed code */ |
| 306 | | ROM_CONTINUE( 0x10000, 0x078000 ) /* banked data */ |
| 312 | ROM_LOAD( "tch-ss1.u78", 0x00000, 0x080000, CRC(41b6b45b) SHA1(d969119959db4cc3be50f188bfa41e4b4896eaca) ) |
| 307 | 313 | |
| 308 | 314 | ROM_REGION( 0x10000, "audiocpu", 0 ) /* CPU2 code */ |
| 309 | 315 | ROM_LOAD( "tch-ss2.u96", 0x00000, 0x10000, CRC(4611fd0c) SHA1(b49ad6a8be6ccfef0b2ed187fb3b008fb7eeb2b5) ) // FIRST AND SECOND HALF IDENTICAL |
| 310 | 316 | |
| 311 | | ROM_REGION( 0x080000, "user1", 0 ) /* Samples */ |
| 317 | ROM_REGION( 0x080000, "oki", 0 ) /* Samples */ |
| 312 | 318 | ROM_LOAD( "tch-ss3.u95", 0x00000, 0x080000, CRC(1c9deb5e) SHA1(89f01a8e8bdb0eee47e9195b312d2e65d41d3548) ) |
| 313 | 319 | |
| 314 | | /* $00000-$20000 stays the same in all sound banks, */ |
| 315 | | /* the second half of the bank is what gets switched */ |
| 316 | | ROM_REGION( 0x100000, "oki", 0 ) /* Samples */ |
| 317 | | ROM_COPY( "user1", 0x000000, 0x000000, 0x020000) |
| 318 | | ROM_COPY( "user1", 0x000000, 0x020000, 0x020000) |
| 319 | | ROM_COPY( "user1", 0x000000, 0x040000, 0x020000) |
| 320 | | ROM_COPY( "user1", 0x020000, 0x060000, 0x020000) |
| 321 | | ROM_COPY( "user1", 0x000000, 0x080000, 0x020000) |
| 322 | | ROM_COPY( "user1", 0x040000, 0x0a0000, 0x020000) |
| 323 | | ROM_COPY( "user1", 0x000000, 0x0c0000, 0x020000) |
| 324 | | ROM_COPY( "user1", 0x060000, 0x0e0000, 0x020000) |
| 325 | | |
| 326 | 320 | ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT ) /* GFX */ |
| 327 | 321 | ROM_LOAD( "tch-ss4.u70", 0x00000, 0x020000, CRC(41517859) SHA1(3c5102e41c5a70e02ed88ea43ca63edf13f4c1b9) ) |
| 328 | 322 | ROM_LOAD( "tch-ss5.u69", 0x20000, 0x020000, CRC(832b2f34) SHA1(7a3060869a9698c9ed4187b239a70e273de64e3c) ) |
| r244895 | r244896 | |
| 338 | 332 | |
| 339 | 333 | /*** GAME DRIVERS ************************************************************/ |
| 340 | 334 | |
| 341 | | GAME( 1994, speedspn, 0, speedspn, speedspn, driver_device, 0, ROT180, "TCH", "Speed Spin", 0 ) |
| 335 | GAME( 1994, speedspn, 0, speedspn, speedspn, driver_device, 0, ROT180, "TCH", "Speed Spin", GAME_SUPPORTS_SAVE ) |
trunk/src/mame/includes/speedspn.h
| r244895 | r244896 | |
| 5 | 5 | public: |
| 6 | 6 | speedspn_state(const machine_config &mconfig, device_type type, const char *tag) |
| 7 | 7 | : driver_device(mconfig, type, tag), |
| 8 | | m_attram(*this, "attram"), |
| 9 | 8 | m_maincpu(*this, "maincpu"), |
| 10 | 9 | m_audiocpu(*this, "audiocpu"), |
| 11 | 10 | m_oki(*this, "oki"), |
| 12 | 11 | m_gfxdecode(*this, "gfxdecode"), |
| 13 | | m_palette(*this, "palette") { } |
| 12 | m_palette(*this, "palette"), |
| 13 | m_prgbank(*this, "prgbank"), |
| 14 | m_okibank(*this, "okibank"), |
| 15 | m_attram(*this, "attram") { } |
| 14 | 16 | |
| 15 | | required_shared_ptr<UINT8> m_attram; |
| 16 | | tilemap_t *m_tilemap; |
| 17 | | UINT8 m_display_disable; |
| 18 | | int m_bank_vidram; |
| 19 | | UINT8* m_vidram; |
| 20 | | DECLARE_READ8_MEMBER(speedspn_irq_ack_r); |
| 21 | | DECLARE_WRITE8_MEMBER(speedspn_banked_rom_change); |
| 22 | | DECLARE_WRITE8_MEMBER(speedspn_sound_w); |
| 23 | | DECLARE_WRITE8_MEMBER(speedspn_vidram_w); |
| 24 | | DECLARE_WRITE8_MEMBER(speedspn_attram_w); |
| 25 | | DECLARE_READ8_MEMBER(speedspn_vidram_r); |
| 26 | | DECLARE_WRITE8_MEMBER(speedspn_banked_vidram_change); |
| 27 | | DECLARE_WRITE8_MEMBER(speedspn_global_display_w); |
| 28 | | DECLARE_WRITE8_MEMBER(oki_banking_w); |
| 29 | | TILE_GET_INFO_MEMBER(get_speedspn_tile_info); |
| 30 | | virtual void video_start(); |
| 31 | | UINT32 screen_update_speedspn(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); |
| 32 | | void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect ); |
| 33 | 17 | required_device<cpu_device> m_maincpu; |
| 34 | 18 | required_device<cpu_device> m_audiocpu; |
| 35 | 19 | required_device<okim6295_device> m_oki; |
| 36 | 20 | required_device<gfxdecode_device> m_gfxdecode; |
| 37 | 21 | required_device<palette_device> m_palette; |
| 22 | |
| 23 | required_memory_bank m_prgbank; |
| 24 | required_memory_bank m_okibank; |
| 25 | required_shared_ptr<UINT8> m_attram; |
| 26 | |
| 27 | tilemap_t *m_tilemap; |
| 28 | bool m_display_disable; |
| 29 | UINT32 m_bank_vidram; |
| 30 | dynamic_array<UINT8> m_vidram; |
| 31 | DECLARE_READ8_MEMBER(irq_ack_r); |
| 32 | DECLARE_WRITE8_MEMBER(rombank_w); |
| 33 | DECLARE_WRITE8_MEMBER(sound_w); |
| 34 | DECLARE_WRITE8_MEMBER(vidram_w); |
| 35 | DECLARE_WRITE8_MEMBER(attram_w); |
| 36 | DECLARE_READ8_MEMBER(vidram_r); |
| 37 | DECLARE_WRITE8_MEMBER(vidram_bank_w); |
| 38 | DECLARE_WRITE8_MEMBER(display_disable_w); |
| 39 | DECLARE_WRITE8_MEMBER(okibank_w); |
| 40 | TILE_GET_INFO_MEMBER(get_tile_info); |
| 41 | virtual void machine_start(); |
| 42 | virtual void video_start(); |
| 43 | UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); |
| 44 | void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect ); |
| 38 | 45 | }; |
trunk/src/mame/video/speedspn.c
| r244895 | r244896 | |
| 4 | 4 | #include "includes/speedspn.h" |
| 5 | 5 | |
| 6 | 6 | |
| 7 | | TILE_GET_INFO_MEMBER(speedspn_state::get_speedspn_tile_info) |
| 7 | TILE_GET_INFO_MEMBER(speedspn_state::get_tile_info) |
| 8 | 8 | { |
| 9 | 9 | int code = m_vidram[tile_index*2+1] | (m_vidram[tile_index*2] << 8); |
| 10 | 10 | int attr = m_attram[tile_index^0x400]; |
| r244895 | r244896 | |
| 14 | 14 | |
| 15 | 15 | void speedspn_state::video_start() |
| 16 | 16 | { |
| 17 | | m_vidram = auto_alloc_array(machine(), UINT8, 0x1000 * 2); |
| 18 | | m_tilemap = &machine().tilemap().create(m_gfxdecode, tilemap_get_info_delegate(FUNC(speedspn_state::get_speedspn_tile_info),this),TILEMAP_SCAN_COLS, 8, 8,64,32); |
| 17 | m_display_disable = false; |
| 18 | m_bank_vidram = 0; |
| 19 | m_vidram.resize_and_clear(0x1000 * 2); |
| 20 | m_tilemap = &machine().tilemap().create(m_gfxdecode, tilemap_get_info_delegate(FUNC(speedspn_state::get_tile_info),this),TILEMAP_SCAN_COLS, 8, 8,64,32); |
| 21 | |
| 22 | save_item(NAME(m_display_disable)); |
| 23 | save_item(NAME(m_bank_vidram)); |
| 24 | save_item(NAME(m_vidram)); |
| 19 | 25 | } |
| 20 | 26 | |
| 21 | | WRITE8_MEMBER(speedspn_state::speedspn_vidram_w) |
| 27 | WRITE8_MEMBER(speedspn_state::vidram_w) |
| 22 | 28 | { |
| 23 | 29 | m_vidram[offset + m_bank_vidram] = data; |
| 24 | 30 | |
| r244895 | r244896 | |
| 26 | 32 | m_tilemap->mark_tile_dirty(offset/2); |
| 27 | 33 | } |
| 28 | 34 | |
| 29 | | WRITE8_MEMBER(speedspn_state::speedspn_attram_w) |
| 35 | WRITE8_MEMBER(speedspn_state::attram_w) |
| 30 | 36 | { |
| 31 | 37 | m_attram[offset] = data; |
| 32 | 38 | |
| 33 | 39 | m_tilemap->mark_tile_dirty(offset^0x400); |
| 34 | 40 | } |
| 35 | 41 | |
| 36 | | READ8_MEMBER(speedspn_state::speedspn_vidram_r) |
| 42 | READ8_MEMBER(speedspn_state::vidram_r) |
| 37 | 43 | { |
| 38 | 44 | return m_vidram[offset + m_bank_vidram]; |
| 39 | 45 | } |
| 40 | 46 | |
| 41 | | WRITE8_MEMBER(speedspn_state::speedspn_banked_vidram_change) |
| 47 | WRITE8_MEMBER(speedspn_state::vidram_bank_w) |
| 42 | 48 | { |
| 43 | 49 | // logerror("VidRam Bank: %04x\n", data); |
| 44 | 50 | m_bank_vidram = data & 1; |
| 45 | 51 | m_bank_vidram *= 0x1000; |
| 46 | 52 | } |
| 47 | 53 | |
| 48 | | WRITE8_MEMBER(speedspn_state::speedspn_global_display_w) |
| 54 | WRITE8_MEMBER(speedspn_state::display_disable_w) |
| 49 | 55 | { |
| 50 | 56 | // logerror("Global display: %u\n", data); |
| 51 | 57 | m_display_disable = data & 1; |
| r244895 | r244896 | |
| 85 | 91 | } |
| 86 | 92 | |
| 87 | 93 | |
| 88 | | UINT32 speedspn_state::screen_update_speedspn(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) |
| 94 | UINT32 speedspn_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) |
| 89 | 95 | { |
| 90 | 96 | if (m_display_disable) |
| 91 | 97 | { |