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r36365 Tuesday 10th March, 2015 at 17:31:13 UTC by Osso
shougi.c, shuuz.c, xain.c: added save state support (nw)

[src/mame/drivers]	shougi.c shuuz.c xain.c
[src/mame/includes]	shuuz.h xain.h
[src/mame/video]	shuuz.c xain.c

trunk/src/mame/drivers/shougi.c

r244876	r244877
92	92	public:
93	93	shougi_state(const machine_config &mconfig, device_type type, const char *tag)
94	94	: driver_device(mconfig, type, tag),
95		m_videoram(*this, "videoram"),
96	95	m_maincpu(*this, "maincpu"),
97	96	m_subcpu(*this, "sub"),
98		m_mcu(*this, "mcu") { }
	97	m_mcu(*this, "mcu"),
	98	m_videoram(*this, "videoram") { }
99	99
	100	required_device<cpu_device> m_maincpu;
	101	required_device<cpu_device> m_subcpu;
	102	required_device<cpu_device> m_mcu;
	103
100	104	required_shared_ptr<UINT8> m_videoram;
	105
101	106	int m_nmi_enabled;
	107	int m_r;
102	108	//UINT8 *m_cpu_sharedram;
103	109	//UINT8 m_cpu_sharedram_control_val;
104		int m_r;
	110
105	111	DECLARE_WRITE8_MEMBER(cpu_sharedram_sub_w);
106	112	DECLARE_WRITE8_MEMBER(cpu_sharedram_main_w);
107	113	DECLARE_READ8_MEMBER(cpu_sharedram_r);
108	114	DECLARE_WRITE8_MEMBER(cpu_shared_ctrl_sub_w);
109	115	DECLARE_WRITE8_MEMBER(cpu_shared_ctrl_main_w);
110		DECLARE_WRITE8_MEMBER(shougi_watchdog_reset_w);
111		DECLARE_WRITE8_MEMBER(shougi_mcu_halt_off_w);
112		DECLARE_WRITE8_MEMBER(shougi_mcu_halt_on_w);
	116	DECLARE_WRITE8_MEMBER(mcu_halt_off_w);
	117	DECLARE_WRITE8_MEMBER(mcu_halt_on_w);
113	118	DECLARE_WRITE8_MEMBER(nmi_disable_and_clear_line_w);
114	119	DECLARE_WRITE8_MEMBER(nmi_enable_w);
115	120	DECLARE_READ8_MEMBER(dummy_r);
	121
116	122	DECLARE_PALETTE_INIT(shougi);
117		UINT32 screen_update_shougi(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
118		INTERRUPT_GEN_MEMBER(shougi_vblank_nmi);
119		required_device<cpu_device> m_maincpu;
120		required_device<cpu_device> m_subcpu;
121		required_device<cpu_device> m_mcu;
	123	virtual void machine_start();
	124
	125	UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	126
	127	INTERRUPT_GEN_MEMBER(vblank_nmi);
122	128	};
123	129
124	130
	131	void shougi_state::machine_start()
	132	{
	133	save_item(NAME(m_nmi_enabled));
	134	save_item(NAME(m_r));
	135	}
125	136
	137
126	138	/***************************************************************************
127	139
128	140	Convert the color PROMs into a more useable format.
r244876	r244877
182	194
183	195
184	196
185		UINT32 shougi_state::screen_update_shougi(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
	197	UINT32 shougi_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
186	198	{
187	199	int offs;
188	200
r244876	r244877
217	229
218	230	WRITE8_MEMBER(shougi_state::cpu_sharedram_sub_w)
219	231	{
220		if (cpu_sharedram_control_val!=0) logerror("sub CPU access to shared RAM when access set for main cpu\n");
221		cpu_sharedram[offset] = data;
	232	if (m_cpu_sharedram_control_val!=0) logerror("sub CPU access to shared RAM when access set for main cpu\n");
	233	m_cpu_sharedram[offset] = data;
222	234	}
223	235
224	236	WRITE8_MEMBER(shougi_state::cpu_sharedram_main_w)
225	237	{
226		if (cpu_sharedram_control_val!=1) logerror("main CPU access to shared RAM when access set for sub cpu\n");
227		cpu_sharedram[offset] = data;
	238	if (m_cpu_sharedram_control_val!=1) logerror("main CPU access to shared RAM when access set for sub cpu\n");
	239	m_cpu_sharedram[offset] = data;
228	240	}
229	241
230	242	READ8_MEMBER(shougi_state::cpu_sharedram_r)
231	243	{
232		return cpu_sharedram[offset];
	244	return m_cpu_sharedram[offset];
233	245	}
234	246
235	247	#endif
236	248
237	249	WRITE8_MEMBER(shougi_state::cpu_shared_ctrl_sub_w)
238	250	{
239		//cpu_sharedram_control_val = 0;
	251	//m_cpu_sharedram_control_val = 0;
240	252	//logerror("cpu_sharedram_ctrl=SUB");
241	253	}
242	254
243	255	WRITE8_MEMBER(shougi_state::cpu_shared_ctrl_main_w)
244	256	{
245		//cpu_sharedram_control_val = 1;
	257	//m_cpu_sharedram_control_val = 1;
246	258	//logerror("cpu_sharedram_ctrl=MAIN");
247	259	}
248	260
249		WRITE8_MEMBER(shougi_state::shougi_watchdog_reset_w)
	261	WRITE8_MEMBER(shougi_state::mcu_halt_off_w)
250	262	{
251		watchdog_reset_w(space,0,data);
252		}
253
254		WRITE8_MEMBER(shougi_state::shougi_mcu_halt_off_w)
255		{
256	263	/* logerror("mcu HALT OFF"); */
257	264	m_mcu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
258	265	}
259	266
260		WRITE8_MEMBER(shougi_state::shougi_mcu_halt_on_w)
	267	WRITE8_MEMBER(shougi_state::mcu_halt_on_w)
261	268	{
262	269	/* logerror("mcu HALT ON"); */
263	270	m_mcu->set_input_line(INPUT_LINE_HALT,ASSERT_LINE);
r244876	r244877
278	285	m_nmi_enabled = 1; /* enable NMIs */
279	286	}
280	287
281		INTERRUPT_GEN_MEMBER(shougi_state::shougi_vblank_nmi)
	288	INTERRUPT_GEN_MEMBER(shougi_state::vblank_nmi)
282	289	{
283	290	if ( m_nmi_enabled == 1 )
284	291	{
r244876	r244877
298	305	AM_RANGE(0x4801, 0x4801) AM_WRITE(nmi_disable_and_clear_line_w)
299	306	AM_RANGE(0x4802, 0x4802) AM_NOP
300	307	AM_RANGE(0x4803, 0x4803) AM_NOP
301		AM_RANGE(0x4804, 0x4804) AM_WRITE(shougi_mcu_halt_off_w)
	308	AM_RANGE(0x4804, 0x4804) AM_WRITE(mcu_halt_off_w)
302	309	AM_RANGE(0x4807, 0x4807) AM_WRITENOP    //?????? connected to +5v via resistor
303	310	AM_RANGE(0x4808, 0x4808) AM_WRITE(cpu_shared_ctrl_main_w)
304	311	AM_RANGE(0x4809, 0x4809) AM_WRITE(nmi_enable_w)
305	312	AM_RANGE(0x480a, 0x480a) AM_NOP
306	313	AM_RANGE(0x480b, 0x480b) AM_NOP
307		AM_RANGE(0x480c, 0x480c) AM_WRITE(shougi_mcu_halt_on_w)
	314	AM_RANGE(0x480c, 0x480c) AM_WRITE(mcu_halt_on_w)
308	315	AM_RANGE(0x480f, 0x480f) AM_NOP
309	316
310	317	AM_RANGE(0x5000, 0x5000) AM_READ_PORT("P1")
311		AM_RANGE(0x5800, 0x5800) AM_READ_PORT("P2") AM_WRITE(shougi_watchdog_reset_w)   /* game won't boot if watchdog doesn't work */
	318	AM_RANGE(0x5800, 0x5800) AM_READ_PORT("P2") AM_WRITE(watchdog_reset_w)   /* game won't boot if watchdog doesn't work */
312	319	AM_RANGE(0x6000, 0x6000) AM_DEVWRITE("aysnd", ay8910_device, address_w)
313	320	AM_RANGE(0x6800, 0x6800) AM_DEVWRITE("aysnd", ay8910_device, data_w)
314	321	AM_RANGE(0x7000, 0x73ff) AM_RAM AM_SHARE("share1") /* 2114 x 2 (0x400 x 4bit each) */
r244876	r244877
408	415
409	416	MCFG_CPU_ADD("maincpu", Z80,10000000/4)
410	417	MCFG_CPU_PROGRAM_MAP(main_map)
411		MCFG_CPU_VBLANK_INT_DRIVER("screen", shougi_state, shougi_vblank_nmi)
	418	MCFG_CPU_VBLANK_INT_DRIVER("screen", shougi_state, vblank_nmi)
412	419
413	420	MCFG_CPU_ADD("sub", Z80,10000000/4)
414	421	MCFG_CPU_PROGRAM_MAP(sub_map)
415	422	MCFG_CPU_IO_MAP(readport_sub)
416		/* NMIs triggered in shougi_vblank_nmi() */
	423	/* NMIs triggered in vblank_nmi() */
417	424
418	425	/* MCU */
419	426	MCFG_CPU_ADD("mcu", ALPHA8201, 10000000/4/8)
r244876	r244877
428	435	MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
429	436	MCFG_SCREEN_SIZE(256, 256)
430	437	MCFG_SCREEN_VISIBLE_AREA(0, 255, 0, 255)
431		MCFG_SCREEN_UPDATE_DRIVER(shougi_state, screen_update_shougi)
	438	MCFG_SCREEN_UPDATE_DRIVER(shougi_state, screen_update)
432	439	MCFG_SCREEN_PALETTE("palette")
433	440
434	441	MCFG_PALETTE_ADD("palette", 32)
r244876	r244877
489	496
490	497
491	498
492		GAME( 1982, shougi,  0,      shougi, shougi, driver_device,  0, ROT0, "Alpha Denshi Co.", "Shougi", 0 )
493		GAME( 1982, shougi2, shougi, shougi, shougi2, driver_device, 0, ROT0, "Alpha Denshi Co.", "Shougi 2", 0 )
	499	GAME( 1982, shougi,  0,      shougi, shougi, driver_device,  0, ROT0, "Alpha Denshi Co.", "Shougi", GAME_SUPPORTS_SAVE )
	500	GAME( 1982, shougi2, shougi, shougi, shougi2, driver_device, 0, ROT0, "Alpha Denshi Co.", "Shougi 2", GAME_SUPPORTS_SAVE )

trunk/src/mame/drivers/shuuz.c

r244876	r244877
25	25	#include "includes/shuuz.h"
26	26
27	27
	28	void shuuz_state::machine_start()
	29	{
	30	save_item(NAME(m_cur));
	31	}
28	32
29	33	/*************************************
30	34	*
r244876	r244877
245	249	/* note: these parameters are from published specs, not derived */
246	250	/* the board uses a VAD chip to generate video signals */
247	251	MCFG_SCREEN_RAW_PARAMS(ATARI_CLOCK_14MHz/2, 456, 0, 336, 262, 0, 240)
248		MCFG_SCREEN_UPDATE_DRIVER(shuuz_state, screen_update_shuuz)
	252	MCFG_SCREEN_UPDATE_DRIVER(shuuz_state, screen_update)
249	253	MCFG_SCREEN_PALETTE("palette")
250	254
251		MCFG_VIDEO_START_OVERRIDE(shuuz_state,shuuz)
252
253	255	/* sound hardware */
254	256	MCFG_SPEAKER_STANDARD_MONO("mono")
255	257
r244876	r244877
340	342	*
341	343	*************************************/
342	344
343		GAME( 1990, shuuz,  0,     shuuz, shuuz, driver_device,  0, ROT0, "Atari Games", "Shuuz (version 8.0)", 0 )
344		GAME( 1990, shuuz2, shuuz, shuuz, shuuz2, driver_device, 0, ROT0, "Atari Games", "Shuuz (version 7.1)", 0 )
	345	GAME( 1990, shuuz,  0,     shuuz, shuuz, driver_device,  0, ROT0, "Atari Games", "Shuuz (version 8.0)", GAME_SUPPORTS_SAVE )
	346	GAME( 1990, shuuz2, shuuz, shuuz, shuuz2, driver_device, 0, ROT0, "Atari Games", "Shuuz (version 7.1)", GAME_SUPPORTS_SAVE )

trunk/src/mame/drivers/xain.c

r244876	r244877
173	173	return (vcount - 0x18) | 0x100;
174	174	}
175	175
176		TIMER_DEVICE_CALLBACK_MEMBER(xain_state::xain_scanline)
	176	TIMER_DEVICE_CALLBACK_MEMBER(xain_state::scanline)
177	177	{
178	178	int scanline = param;
179	179	int screen_height = m_screen->height();
r244876	r244877
209	209	}
210	210	}
211	211
212		WRITE8_MEMBER(xain_state::xainCPUA_bankswitch_w)
	212	WRITE8_MEMBER(xain_state::cpuA_bankswitch_w)
213	213	{
214	214	m_pri = data & 0x7;
215	215	membank("bank1")->set_entry((data >> 3) & 1);
216	216	}
217	217
218		WRITE8_MEMBER(xain_state::xainCPUB_bankswitch_w)
	218	WRITE8_MEMBER(xain_state::cpuB_bankswitch_w)
219	219	{
220	220	membank("bank2")->set_entry(data & 1);
221	221	}
222	222
223		WRITE8_MEMBER(xain_state::xain_sound_command_w)
	223	WRITE8_MEMBER(xain_state::sound_command_w)
224	224	{
225	225	soundlatch_byte_w(space,offset,data);
226	226	m_audiocpu->set_input_line(M6809_IRQ_LINE, HOLD_LINE);
227	227	}
228	228
229		WRITE8_MEMBER(xain_state::xain_main_irq_w)
	229	WRITE8_MEMBER(xain_state::main_irq_w)
230	230	{
231	231	switch (offset)
232	232	{
r244876	r244877
245	245	}
246	246	}
247	247
248		WRITE8_MEMBER(xain_state::xain_irqA_assert_w)
	248	WRITE8_MEMBER(xain_state::irqA_assert_w)
249	249	{
250	250	m_maincpu->set_input_line(M6809_IRQ_LINE, ASSERT_LINE);
251	251	}
252	252
253		WRITE8_MEMBER(xain_state::xain_irqB_clear_w)
	253	WRITE8_MEMBER(xain_state::irqB_clear_w)
254	254	{
255	255	m_subcpu->set_input_line(M6809_IRQ_LINE, CLEAR_LINE);
256	256	}
257	257
258		READ8_MEMBER(xain_state::xain_68705_r)
	258	READ8_MEMBER(xain_state::m68705_r)
259	259	{
260	260	m_mcu_ready = 1;
261	261	return m_from_mcu;
262	262	}
263	263
264		WRITE8_MEMBER(xain_state::xain_68705_w)
	264	WRITE8_MEMBER(xain_state::m68705_w)
265	265	{
266	266	m_from_main = data;
267	267	m_mcu_accept = 0;
r244876	r244877
270	270	m_mcu->set_input_line(0, ASSERT_LINE);
271	271	}
272	272
273		CUSTOM_INPUT_MEMBER(xain_state::xain_vblank_r)
	273	CUSTOM_INPUT_MEMBER(xain_state::vblank_r)
274	274	{
275	275	return m_vblank;
276	276	}
r244876	r244877
282	282
283	283	***************************************************************************/
284	284
285		READ8_MEMBER(xain_state::xain_68705_port_a_r)
	285	READ8_MEMBER(xain_state::m68705_port_a_r)
286	286	{
287	287	return (m_port_a_out & m_ddr_a) | (m_port_a_in & ~m_ddr_a);
288	288	}
289	289
290		WRITE8_MEMBER(xain_state::xain_68705_port_a_w)
	290	WRITE8_MEMBER(xain_state::m68705_port_a_w)
291	291	{
292	292	m_port_a_out = data;
293	293	}
294	294
295		WRITE8_MEMBER(xain_state::xain_68705_ddr_a_w)
	295	WRITE8_MEMBER(xain_state::m68705_ddr_a_w)
296	296	{
297	297	m_ddr_a = data;
298	298	}
299	299
300		READ8_MEMBER(xain_state::xain_68705_port_b_r)
	300	READ8_MEMBER(xain_state::m68705_port_b_r)
301	301	{
302	302	return (m_port_b_out & m_ddr_b) | (m_port_b_in & ~m_ddr_b);
303	303	}
304	304
305		WRITE8_MEMBER(xain_state::xain_68705_port_b_w)
	305	WRITE8_MEMBER(xain_state::m68705_port_b_w)
306	306	{
307	307	if ((m_ddr_b & 0x02) && (~data & 0x02))
308	308	{
r244876	r244877
325	325	m_port_b_out = data;
326	326	}
327	327
328		WRITE8_MEMBER(xain_state::xain_68705_ddr_b_w)
	328	WRITE8_MEMBER(xain_state::m68705_ddr_b_w)
329	329	{
330	330	m_ddr_b = data;
331	331	}
332	332
333		READ8_MEMBER(xain_state::xain_68705_port_c_r)
	333	READ8_MEMBER(xain_state::m68705_port_c_r)
334	334	{
335	335	m_port_c_in = 0;
336	336
r244876	r244877
342	342	return (m_port_c_out & m_ddr_c) | (m_port_c_in & ~m_ddr_c);
343	343	}
344	344
345		WRITE8_MEMBER(xain_state::xain_68705_port_c_w)
	345	WRITE8_MEMBER(xain_state::m68705_port_c_w)
346	346	{
347	347	m_port_c_out = data;
348	348	}
349	349
350		WRITE8_MEMBER(xain_state::xain_68705_ddr_c_w)
	350	WRITE8_MEMBER(xain_state::m68705_ddr_c_w)
351	351	{
352	352	m_ddr_c = data;
353	353	}
r244876	r244877
385	385
386	386	static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, xain_state )
387	387	AM_RANGE(0x0000, 0x1fff) AM_RAM AM_SHARE("share1")
388		AM_RANGE(0x2000, 0x27ff) AM_RAM_WRITE(xain_charram_w) AM_SHARE("charram")
389		AM_RANGE(0x2800, 0x2fff) AM_RAM_WRITE(xain_bgram1_w) AM_SHARE("bgram1")
390		AM_RANGE(0x3000, 0x37ff) AM_RAM_WRITE(xain_bgram0_w) AM_SHARE("bgram0")
	388	AM_RANGE(0x2000, 0x27ff) AM_RAM_WRITE(charram_w) AM_SHARE("charram")
	389	AM_RANGE(0x2800, 0x2fff) AM_RAM_WRITE(bgram1_w) AM_SHARE("bgram1")
	390	AM_RANGE(0x3000, 0x37ff) AM_RAM_WRITE(bgram0_w) AM_SHARE("bgram0")
391	391	AM_RANGE(0x3800, 0x397f) AM_RAM AM_SHARE("spriteram")
392	392	AM_RANGE(0x3a00, 0x3a00) AM_READ_PORT("P1")
393		AM_RANGE(0x3a00, 0x3a01) AM_WRITE(xain_scrollxP1_w)
	393	AM_RANGE(0x3a00, 0x3a01) AM_WRITE(scrollxP1_w)
394	394	AM_RANGE(0x3a01, 0x3a01) AM_READ_PORT("P2")
395	395	AM_RANGE(0x3a02, 0x3a02) AM_READ_PORT("DSW0")
396		AM_RANGE(0x3a02, 0x3a03) AM_WRITE(xain_scrollyP1_w)
	396	AM_RANGE(0x3a02, 0x3a03) AM_WRITE(scrollyP1_w)
397	397	AM_RANGE(0x3a03, 0x3a03) AM_READ_PORT("DSW1")
398		AM_RANGE(0x3a04, 0x3a04) AM_READ(xain_68705_r)
399		AM_RANGE(0x3a04, 0x3a05) AM_WRITE(xain_scrollxP0_w)
	398	AM_RANGE(0x3a04, 0x3a04) AM_READ(m68705_r)
	399	AM_RANGE(0x3a04, 0x3a05) AM_WRITE(scrollxP0_w)
400	400	AM_RANGE(0x3a05, 0x3a05) AM_READ_PORT("VBLANK")
401	401	AM_RANGE(0x3a06, 0x3a06) AM_READ(mcu_comm_reset_r)
402		AM_RANGE(0x3a06, 0x3a07) AM_WRITE(xain_scrollyP0_w)
403		AM_RANGE(0x3a08, 0x3a08) AM_WRITE(xain_sound_command_w)
404		AM_RANGE(0x3a09, 0x3a0c) AM_WRITE(xain_main_irq_w)
405		AM_RANGE(0x3a0d, 0x3a0d) AM_WRITE(xain_flipscreen_w)
406		AM_RANGE(0x3a0e, 0x3a0e) AM_WRITE(xain_68705_w)
407		AM_RANGE(0x3a0f, 0x3a0f) AM_WRITE(xainCPUA_bankswitch_w)
	402	AM_RANGE(0x3a06, 0x3a07) AM_WRITE(scrollyP0_w)
	403	AM_RANGE(0x3a08, 0x3a08) AM_WRITE(sound_command_w)
	404	AM_RANGE(0x3a09, 0x3a0c) AM_WRITE(main_irq_w)
	405	AM_RANGE(0x3a0d, 0x3a0d) AM_WRITE(flipscreen_w)
	406	AM_RANGE(0x3a0e, 0x3a0e) AM_WRITE(m68705_w)
	407	AM_RANGE(0x3a0f, 0x3a0f) AM_WRITE(cpuA_bankswitch_w)
408	408	AM_RANGE(0x3c00, 0x3dff) AM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
409	409	AM_RANGE(0x3e00, 0x3fff) AM_DEVWRITE("palette", palette_device, write_ext) AM_SHARE("palette_ext")
410	410	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")
r244876	r244877
413	413
414	414	static ADDRESS_MAP_START( cpu_map_B, AS_PROGRAM, 8, xain_state )
415	415	AM_RANGE(0x0000, 0x1fff) AM_RAM AM_SHARE("share1")
416		AM_RANGE(0x2000, 0x2000) AM_WRITE(xain_irqA_assert_w)
417		AM_RANGE(0x2800, 0x2800) AM_WRITE(xain_irqB_clear_w)
418		AM_RANGE(0x3000, 0x3000) AM_WRITE(xainCPUB_bankswitch_w)
	416	AM_RANGE(0x2000, 0x2000) AM_WRITE(irqA_assert_w)
	417	AM_RANGE(0x2800, 0x2800) AM_WRITE(irqB_clear_w)
	418	AM_RANGE(0x3000, 0x3000) AM_WRITE(cpuB_bankswitch_w)
419	419	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank2")
420	420	AM_RANGE(0x8000, 0xffff) AM_ROM
421	421	ADDRESS_MAP_END
422	422
423	423	static ADDRESS_MAP_START( mcu_map, AS_PROGRAM, 8, xain_state )
424	424	ADDRESS_MAP_GLOBAL_MASK(0x7ff)
425		AM_RANGE(0x0000, 0x0000) AM_READWRITE(xain_68705_port_a_r, xain_68705_port_a_w)
426		AM_RANGE(0x0001, 0x0001) AM_READWRITE(xain_68705_port_b_r, xain_68705_port_b_w)
427		AM_RANGE(0x0002, 0x0002) AM_READWRITE(xain_68705_port_c_r, xain_68705_port_c_w)
428		AM_RANGE(0x0004, 0x0004) AM_WRITE(xain_68705_ddr_a_w)
429		AM_RANGE(0x0005, 0x0005) AM_WRITE(xain_68705_ddr_b_w)
430		AM_RANGE(0x0006, 0x0006) AM_WRITE(xain_68705_ddr_c_w)
	425	AM_RANGE(0x0000, 0x0000) AM_READWRITE(m68705_port_a_r, m68705_port_a_w)
	426	AM_RANGE(0x0001, 0x0001) AM_READWRITE(m68705_port_b_r, m68705_port_b_w)
	427	AM_RANGE(0x0002, 0x0002) AM_READWRITE(m68705_port_c_r, m68705_port_c_w)
	428	AM_RANGE(0x0004, 0x0004) AM_WRITE(m68705_ddr_a_w)
	429	AM_RANGE(0x0005, 0x0005) AM_WRITE(m68705_ddr_b_w)
	430	AM_RANGE(0x0006, 0x0006) AM_WRITE(m68705_ddr_c_w)
431	431	//  AM_RANGE(0x0008, 0x0008) AM_READWRITE(m68705_tdr_r, m68705_tdr_w)
432	432	//  AM_RANGE(0x0009, 0x0009) AM_READWRITE(m68705_tcr_r, m68705_tcr_w)
433	433	AM_RANGE(0x0010, 0x007f) AM_RAM
r244876	r244877
513	513	PORT_START("VBLANK")
514	514	PORT_BIT( 0x03, IP_ACTIVE_LOW,  IPT_UNUSED )
515	515	PORT_BIT( 0x04, IP_ACTIVE_LOW,  IPT_COIN3 )
516		PORT_BIT( 0x18, IP_ACTIVE_HIGH, IPT_SPECIAL) PORT_CUSTOM_MEMBER(DEVICE_SELF, xain_state,mcu_status_r, NULL)
517		PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, xain_state,xain_vblank_r, NULL)   /* VBLANK */
	516	PORT_BIT( 0x18, IP_ACTIVE_HIGH, IPT_SPECIAL) PORT_CUSTOM_MEMBER(DEVICE_SELF, xain_state, mcu_status_r, NULL)
	517	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, xain_state, vblank_r, NULL)   /* VBLANK */
518	518	PORT_BIT( 0xc0, IP_ACTIVE_LOW,  IPT_UNUSED )
519	519	INPUT_PORTS_END
520	520
r244876	r244877
549	549	GFXDECODE_END
550	550
551	551
552		/* handler called by the 2203 emulator when the internal timers cause an IRQ */
553		WRITE_LINE_MEMBER(xain_state::irqhandler)
554		{
555		m_audiocpu->set_input_line(M6809_FIRQ_LINE, state ? ASSERT_LINE : CLEAR_LINE);
556		}
557
558	552	void xain_state::machine_start()
559	553	{
560	554	membank("bank1")->configure_entries(0, 2, memregion("maincpu")->base() + 0x4000, 0xc000);
561	555	membank("bank2")->configure_entries(0, 2, memregion("sub")->base()  + 0x4000, 0xc000);
562	556	membank("bank1")->set_entry(0);
563	557	membank("bank2")->set_entry(0);
	558
	559	save_item(NAME(m_vblank));
	560
	561	if (m_mcu)
	562	{
	563	save_item(NAME(m_from_main));
	564	save_item(NAME(m_from_mcu));
	565	save_item(NAME(m_ddr_a));
	566	save_item(NAME(m_ddr_b));
	567	save_item(NAME(m_ddr_c));
	568	save_item(NAME(m_port_a_out));
	569	save_item(NAME(m_port_b_out));
	570	save_item(NAME(m_port_c_out));
	571	save_item(NAME(m_port_a_in));
	572	save_item(NAME(m_port_b_in));
	573	save_item(NAME(m_port_c_in));
	574	save_item(NAME(m_mcu_ready));
	575	save_item(NAME(m_mcu_accept));
	576	}
564	577	}
565	578
566	579	static MACHINE_CONFIG_START( xsleena, xain_state )
r244876	r244877
568	581	/* basic machine hardware */
569	582	MCFG_CPU_ADD("maincpu", M6809, CPU_CLOCK)
570	583	MCFG_CPU_PROGRAM_MAP(main_map)
571		MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", xain_state, xain_scanline, "screen", 0, 1)
	584	MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", xain_state, scanline, "screen", 0, 1)
572	585
573	586	MCFG_CPU_ADD("sub", M6809, CPU_CLOCK)
574	587	MCFG_CPU_PROGRAM_MAP(cpu_map_B)
r244876	r244877
585	598	/* video hardware */
586	599	MCFG_SCREEN_ADD("screen", RASTER)
587	600	MCFG_SCREEN_RAW_PARAMS(PIXEL_CLOCK, 384, 0, 256, 272, 8, 248)   /* based on ddragon driver */
588		MCFG_SCREEN_UPDATE_DRIVER(xain_state, screen_update_xain)
	601	MCFG_SCREEN_UPDATE_DRIVER(xain_state, screen_update)
589	602	MCFG_SCREEN_PALETTE("palette")
590	603
591	604	MCFG_GFXDECODE_ADD("gfxdecode", "palette", xain)
r244876	r244877
596	609	MCFG_SPEAKER_STANDARD_MONO("mono")
597	610
598	611	MCFG_SOUND_ADD("ym1", YM2203, MCU_CLOCK)
599		MCFG_YM2203_IRQ_HANDLER(WRITELINE(xain_state, irqhandler))
	612	MCFG_YM2203_IRQ_HANDLER(INPUTLINE("audiocpu", M6809_FIRQ_LINE))
600	613	MCFG_SOUND_ROUTE(0, "mono", 0.50)
601	614	MCFG_SOUND_ROUTE(1, "mono", 0.50)
602	615	MCFG_SOUND_ROUTE(2, "mono", 0.50)
r244876	r244877
835	848	ROM_END
836	849
837	850
838		GAME( 1986, xsleena,  0,       xsleena,  xsleena, driver_device, 0, ROT0, "Technos Japan (Taito license)", "Xain'd Sleena (World)", 0 )
839		GAME( 1986, xsleenaj, xsleena, xsleena,  xsleena, driver_device, 0, ROT0, "Technos Japan", "Xain'd Sleena (Japan)", 0 )
840		GAME( 1986, solrwarr, xsleena, xsleena,  xsleena, driver_device, 0, ROT0, "Technos Japan (Taito / Memetron license)", "Solar-Warrior (US)", 0 )
841		GAME( 1986, xsleenab, xsleena, xsleenab, xsleena, driver_device, 0, ROT0, "bootleg", "Xain'd Sleena (bootleg)", 0 )
	851	GAME( 1986, xsleena,  0,       xsleena,  xsleena, driver_device, 0, ROT0, "Technos Japan (Taito license)", "Xain'd Sleena (World)", GAME_SUPPORTS_SAVE )
	852	GAME( 1986, xsleenaj, xsleena, xsleena,  xsleena, driver_device, 0, ROT0, "Technos Japan", "Xain'd Sleena (Japan)", GAME_SUPPORTS_SAVE )
	853	GAME( 1986, solrwarr, xsleena, xsleena,  xsleena, driver_device, 0, ROT0, "Technos Japan (Taito / Memetron license)", "Solar-Warrior (US)", GAME_SUPPORTS_SAVE )
	854	GAME( 1986, xsleenab, xsleena, xsleenab, xsleena, driver_device, 0, ROT0, "bootleg", "Xain'd Sleena (bootleg)", GAME_SUPPORTS_SAVE )

trunk/src/mame/includes/shuuz.h

r244876	r244877
19	19	required_device<atari_vad_device> m_vad;
20	20
21	21	int m_cur[2];
	22
22	23	virtual void update_interrupts();
	24
23	25	DECLARE_WRITE16_MEMBER(latch_w);
24	26	DECLARE_READ16_MEMBER(leta_r);
25	27	DECLARE_READ16_MEMBER(special_port0_r);
	28
	29	virtual void machine_start();
	30
26	31	TILE_GET_INFO_MEMBER(get_playfield_tile_info);
27		DECLARE_MACHINE_START(shuuz);
28		DECLARE_VIDEO_START(shuuz);
29		UINT32 screen_update_shuuz(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	32
	33	UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
30	34
31	35	static const atari_motion_objects_config s_mob_config;
32	36	};

trunk/src/mame/includes/xain.h

r244876	r244877
3	3	public:
4	4	xain_state(const machine_config &mconfig, device_type type, const char *tag)
5	5	: driver_device(mconfig, type, tag),
6		m_charram(*this, "charram"),
7		m_bgram0(*this, "bgram0"),
8		m_bgram1(*this, "bgram1"),
9		m_spriteram(*this, "spriteram"),
10	6	m_maincpu(*this, "maincpu"),
11	7	m_audiocpu(*this, "audiocpu"),
12	8	m_subcpu(*this, "sub"),
13	9	m_mcu(*this, "mcu"),
14	10	m_gfxdecode(*this, "gfxdecode"),
15	11	m_screen(*this, "screen"),
16		m_palette(*this, "palette") { }
	12	m_palette(*this, "palette"),
	13	m_charram(*this, "charram"),
	14	m_bgram0(*this, "bgram0"),
	15	m_bgram1(*this, "bgram1"),
	16	m_spriteram(*this, "spriteram") { }
17	17
	18	required_device<cpu_device> m_maincpu;
	19	required_device<cpu_device> m_audiocpu;
	20	required_device<cpu_device> m_subcpu;
	21	optional_device<cpu_device> m_mcu;
	22	required_device<gfxdecode_device> m_gfxdecode;
	23	required_device<screen_device> m_screen;
	24	required_device<palette_device> m_palette;
	25
	26	required_shared_ptr<UINT8> m_charram;
	27	required_shared_ptr<UINT8> m_bgram0;
	28	required_shared_ptr<UINT8> m_bgram1;
	29	required_shared_ptr<UINT8> m_spriteram;
	30
18	31	int m_vblank;
19	32	int m_from_main;
20	33	int m_from_mcu;
r244876	r244877
29	42	UINT8 m_port_c_in;
30	43	int m_mcu_ready;
31	44	int m_mcu_accept;
32		required_shared_ptr<UINT8> m_charram;
33		required_shared_ptr<UINT8> m_bgram0;
34		required_shared_ptr<UINT8> m_bgram1;
35	45	UINT8 m_pri;
36	46	tilemap_t *m_char_tilemap;
37	47	tilemap_t *m_bgram0_tilemap;
r244876	r244877
40	50	UINT8 m_scrollyP0[2];
41	51	UINT8 m_scrollxP1[2];
42	52	UINT8 m_scrollyP1[2];
43		required_shared_ptr<UINT8> m_spriteram;
44		DECLARE_WRITE8_MEMBER(xainCPUA_bankswitch_w);
45		DECLARE_WRITE8_MEMBER(xainCPUB_bankswitch_w);
46		DECLARE_WRITE8_MEMBER(xain_sound_command_w);
47		DECLARE_WRITE8_MEMBER(xain_main_irq_w);
48		DECLARE_WRITE8_MEMBER(xain_irqA_assert_w);
49		DECLARE_WRITE8_MEMBER(xain_irqB_clear_w);
50		DECLARE_READ8_MEMBER(xain_68705_r);
51		DECLARE_WRITE8_MEMBER(xain_68705_w);
52		DECLARE_READ8_MEMBER(xain_68705_port_a_r);
53		DECLARE_WRITE8_MEMBER(xain_68705_port_a_w);
54		DECLARE_WRITE8_MEMBER(xain_68705_ddr_a_w);
55		DECLARE_READ8_MEMBER(xain_68705_port_b_r);
56		DECLARE_WRITE8_MEMBER(xain_68705_port_b_w);
57		DECLARE_WRITE8_MEMBER(xain_68705_ddr_b_w);
58		DECLARE_READ8_MEMBER(xain_68705_port_c_r);
59		DECLARE_WRITE8_MEMBER(xain_68705_port_c_w);
60		DECLARE_WRITE8_MEMBER(xain_68705_ddr_c_w);
	53
	54	DECLARE_WRITE8_MEMBER(cpuA_bankswitch_w);
	55	DECLARE_WRITE8_MEMBER(cpuB_bankswitch_w);
	56	DECLARE_WRITE8_MEMBER(sound_command_w);
	57	DECLARE_WRITE8_MEMBER(main_irq_w);
	58	DECLARE_WRITE8_MEMBER(irqA_assert_w);
	59	DECLARE_WRITE8_MEMBER(irqB_clear_w);
	60	DECLARE_READ8_MEMBER(m68705_r);
	61	DECLARE_WRITE8_MEMBER(m68705_w);
	62	DECLARE_READ8_MEMBER(m68705_port_a_r);
	63	DECLARE_WRITE8_MEMBER(m68705_port_a_w);
	64	DECLARE_WRITE8_MEMBER(m68705_ddr_a_w);
	65	DECLARE_READ8_MEMBER(m68705_port_b_r);
	66	DECLARE_WRITE8_MEMBER(m68705_port_b_w);
	67	DECLARE_WRITE8_MEMBER(m68705_ddr_b_w);
	68	DECLARE_READ8_MEMBER(m68705_port_c_r);
	69	DECLARE_WRITE8_MEMBER(m68705_port_c_w);
	70	DECLARE_WRITE8_MEMBER(m68705_ddr_c_w);
61	71	DECLARE_READ8_MEMBER(mcu_comm_reset_r);
62		DECLARE_WRITE8_MEMBER(xain_bgram0_w);
63		DECLARE_WRITE8_MEMBER(xain_bgram1_w);
64		DECLARE_WRITE8_MEMBER(xain_charram_w);
65		DECLARE_WRITE8_MEMBER(xain_scrollxP0_w);
66		DECLARE_WRITE8_MEMBER(xain_scrollyP0_w);
67		DECLARE_WRITE8_MEMBER(xain_scrollxP1_w);
68		DECLARE_WRITE8_MEMBER(xain_scrollyP1_w);
69		DECLARE_WRITE8_MEMBER(xain_flipscreen_w);
70		DECLARE_CUSTOM_INPUT_MEMBER(xain_vblank_r);
	72	DECLARE_WRITE8_MEMBER(bgram0_w);
	73	DECLARE_WRITE8_MEMBER(bgram1_w);
	74	DECLARE_WRITE8_MEMBER(charram_w);
	75	DECLARE_WRITE8_MEMBER(scrollxP0_w);
	76	DECLARE_WRITE8_MEMBER(scrollyP0_w);
	77	DECLARE_WRITE8_MEMBER(scrollxP1_w);
	78	DECLARE_WRITE8_MEMBER(scrollyP1_w);
	79	DECLARE_WRITE8_MEMBER(flipscreen_w);
	80
	81	DECLARE_CUSTOM_INPUT_MEMBER(vblank_r);
71	82	DECLARE_CUSTOM_INPUT_MEMBER(mcu_status_r);
	83
72	84	TILEMAP_MAPPER_MEMBER(back_scan);
73	85	TILE_GET_INFO_MEMBER(get_bgram0_tile_info);
74	86	TILE_GET_INFO_MEMBER(get_bgram1_tile_info);
75	87	TILE_GET_INFO_MEMBER(get_char_tile_info);
	88
76	89	virtual void machine_start();
77	90	virtual void video_start();
78		UINT32 screen_update_xain(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
79		TIMER_DEVICE_CALLBACK_MEMBER(xain_scanline);
	91
	92	UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
80	93	void draw_sprites(bitmap_ind16 &bitmap,const rectangle &cliprect);
81	94	inline int scanline_to_vcount(int scanline);
82		DECLARE_WRITE_LINE_MEMBER(irqhandler);
83		required_device<cpu_device> m_maincpu;
84		required_device<cpu_device> m_audiocpu;
85		required_device<cpu_device> m_subcpu;
86		optional_device<cpu_device> m_mcu;
87		required_device<gfxdecode_device> m_gfxdecode;
88		required_device<screen_device> m_screen;
89		required_device<palette_device> m_palette;
	95
	96	TIMER_DEVICE_CALLBACK_MEMBER(scanline);
90	97	};

trunk/src/mame/video/shuuz.c

r244876	r244877
68	68	0                   /* resulting value to indicate "special" */
69	69	};
70	70
71		VIDEO_START_MEMBER(shuuz_state,shuuz)
72		{
73		}
74	71
75
76
77	72	/*************************************
78	73	*
79	74	*  Main refresh
80	75	*
81	76	*************************************/
82	77
83		UINT32 shuuz_state::screen_update_shuuz(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
	78	UINT32 shuuz_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
84	79	{
85	80	// start drawing
86	81	m_vad->mob()->draw_async(cliprect);

trunk/src/mame/video/xain.c

r244876	r244877
89	89	m_bgram0_tilemap->set_transparent_pen(0);
90	90	m_bgram1_tilemap->set_transparent_pen(0);
91	91	m_char_tilemap->set_transparent_pen(0);
	92
	93	save_item(NAME(m_pri));
	94	save_item(NAME(m_scrollxP0));
	95	save_item(NAME(m_scrollyP0));
	96	save_item(NAME(m_scrollxP1));
	97	save_item(NAME(m_scrollyP1));
92	98	}
93	99
94	100
r244876	r244877
99	105
100	106	***************************************************************************/
101	107
102		WRITE8_MEMBER(xain_state::xain_bgram0_w)
	108	WRITE8_MEMBER(xain_state::bgram0_w)
103	109	{
104	110	m_bgram0[offset] = data;
105	111	m_bgram0_tilemap->mark_tile_dirty(offset & 0x3ff);
106	112	}
107	113
108		WRITE8_MEMBER(xain_state::xain_bgram1_w)
	114	WRITE8_MEMBER(xain_state::bgram1_w)
109	115	{
110	116	m_bgram1[offset] = data;
111	117	m_bgram1_tilemap->mark_tile_dirty(offset & 0x3ff);
112	118	}
113	119
114		WRITE8_MEMBER(xain_state::xain_charram_w)
	120	WRITE8_MEMBER(xain_state::charram_w)
115	121	{
116	122	m_charram[offset] = data;
117	123	m_char_tilemap->mark_tile_dirty(offset & 0x3ff);
118	124	}
119	125
120		WRITE8_MEMBER(xain_state::xain_scrollxP0_w)
	126	WRITE8_MEMBER(xain_state::scrollxP0_w)
121	127	{
122	128	m_scrollxP0[offset] = data;
123	129	m_bgram0_tilemap->set_scrollx(0, m_scrollxP0[0]|(m_scrollxP0[1]<<8));
124	130	}
125	131
126		WRITE8_MEMBER(xain_state::xain_scrollyP0_w)
	132	WRITE8_MEMBER(xain_state::scrollyP0_w)
127	133	{
128	134	m_scrollyP0[offset] = data;
129	135	m_bgram0_tilemap->set_scrolly(0, m_scrollyP0[0]|(m_scrollyP0[1]<<8));
130	136	}
131	137
132		WRITE8_MEMBER(xain_state::xain_scrollxP1_w)
	138	WRITE8_MEMBER(xain_state::scrollxP1_w)
133	139	{
134	140	m_scrollxP1[offset] = data;
135	141	m_bgram1_tilemap->set_scrollx(0, m_scrollxP1[0]|(m_scrollxP1[1]<<8));
136	142	}
137	143
138		WRITE8_MEMBER(xain_state::xain_scrollyP1_w)
	144	WRITE8_MEMBER(xain_state::scrollyP1_w)
139	145	{
140	146	m_scrollyP1[offset] = data;
141	147	m_bgram1_tilemap->set_scrolly(0, m_scrollyP1[0]|(m_scrollyP1[1]<<8));
142	148	}
143	149
144	150
145		WRITE8_MEMBER(xain_state::xain_flipscreen_w)
	151	WRITE8_MEMBER(xain_state::flipscreen_w)
146	152	{
147	153	flip_screen_set(data & 1);
148	154	}
r244876	r244877
156	162
157	163	void xain_state::draw_sprites(bitmap_ind16 &bitmap,const rectangle &cliprect)
158	164	{
159		UINT8 *spriteram = m_spriteram;
160		int offs;
161
162		for (offs = 0; offs < m_spriteram.bytes();offs += 4)
	165	for (int offs = 0; offs < m_spriteram.bytes();offs += 4)
163	166	{
164	167	int sx,sy,flipx,flipy;
165		int attr = spriteram[offs+1];
166		int numtile = spriteram[offs+2] | ((attr & 7) << 8);
	168	int attr = m_spriteram[offs+1];
	169	int numtile = m_spriteram[offs+2] | ((attr & 7) << 8);
167	170	int color = (attr & 0x38) >> 3;
168	171
169		sx = 238 - spriteram[offs+3];
	172	sx = 238 - m_spriteram[offs+3];
170	173	if (sx <= -7) sx += 256;
171		sy = 240 - spriteram[offs];
	174	sy = 240 - m_spriteram[offs];
172	175	if (sy <= -7) sy += 256;
173	176	flipx = attr & 0x40;
174	177	flipy = 0;
r244876	r244877
204	207	}
205	208	}
206	209
207		UINT32 xain_state::screen_update_xain(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
	210	UINT32 xain_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
208	211	{
209	212	switch (m_pri&0x7)
210	213	{

https://github.com/mamedev/mame/commit/2c57d68ec7fce9b17d5c387493a3b5f9996f219f

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