trunk/src/emu/cpu/hmcs40/hmcs40.c
| r244787 | r244788 | |
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| 140 | 140 | // zerofill |
| 141 | 141 | memset(m_stack, 0, sizeof(m_stack)); |
| 142 | 142 | m_op = 0; |
| 143 | m_prev_op = 0; |
| 143 | 144 | m_arg = 0; |
| 144 | 145 | m_pc = 0; |
| 146 | m_page = 0; |
| 145 | 147 | m_a = 0; |
| 146 | 148 | m_b = 0; |
| 147 | 149 | m_x = 0; |
| r244787 | r244788 | |
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| 154 | 156 | // register for savestates |
| 155 | 157 | save_item(NAME(m_stack)); |
| 156 | 158 | save_item(NAME(m_op)); |
| 159 | save_item(NAME(m_prev_op)); |
| 157 | 160 | save_item(NAME(m_arg)); |
| 158 | 161 | save_item(NAME(m_pc)); |
| 162 | save_item(NAME(m_page)); |
| 159 | 163 | save_item(NAME(m_a)); |
| 160 | 164 | save_item(NAME(m_b)); |
| 161 | 165 | save_item(NAME(m_x)); |
| r244787 | r244788 | |
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| 216 | 220 | inline void hmcs40_cpu_device::fetch_arg() |
| 217 | 221 | { |
| 218 | 222 | // P is the only 2-byte opcode |
| 219 | | if (m_op == 0x3ff) |
| 223 | if ((m_op & 0x3f8) == 0x368) |
| 220 | 224 | { |
| 221 | 225 | m_icount--; |
| 222 | 226 | m_arg = m_program->read_word(m_pc << 1); |
| r244787 | r244788 | |
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| 230 | 234 | { |
| 231 | 235 | m_icount--; |
| 232 | 236 | |
| 237 | // LPU is handled 1 cycle later |
| 238 | if ((m_prev_op & 0x3e0) == 0x340) |
| 239 | m_pc = ((m_page << 6) | (m_pc & 0x3f)) & m_prgmask; |
| 240 | |
| 241 | // remember previous opcode |
| 242 | m_prev_op = m_op; |
| 243 | |
| 244 | // fetch next opcode |
| 233 | 245 | debugger_instruction_hook(this, m_pc << 1); |
| 234 | 246 | m_op = m_program->read_word(m_pc << 1); |
| 235 | 247 | increment_pc(); |
trunk/src/emu/cpu/hmcs40/hmcs40op.inc
| r244787 | r244788 | |
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| 431 | 431 | void hmcs40_cpu_device::op_br() |
| 432 | 432 | { |
| 433 | 433 | // BR a: Branch on Status 1 |
| 434 | | op_illegal(); |
| 434 | if (m_s) |
| 435 | m_pc = (m_pc & ~0x3f) | (m_op & 0x3f); |
| 436 | else |
| 437 | m_s = 1; |
| 435 | 438 | } |
| 436 | 439 | |
| 437 | 440 | void hmcs40_cpu_device::op_cal() |
| 438 | 441 | { |
| 439 | 442 | // CAL a: Subroutine Jump on Status 1 |
| 440 | | op_illegal(); |
| 443 | if (m_s) |
| 444 | { |
| 445 | push_stack(); |
| 446 | m_pc = m_op & 0x3f; // short calls default to page 0 |
| 447 | } |
| 448 | else |
| 449 | m_s = 1; |
| 441 | 450 | } |
| 442 | 451 | |
| 443 | 452 | void hmcs40_cpu_device::op_lpu() |
| 444 | 453 | { |
| 445 | 454 | // LPU u: Load Program Counter Upper on Status 1 |
| 446 | | op_illegal(); |
| 455 | if (m_s) |
| 456 | m_page = m_op & 0x1f; |
| 457 | else |
| 458 | m_op = 0; |
| 447 | 459 | } |
| 448 | 460 | |
| 449 | 461 | void hmcs40_cpu_device::op_tbr() |
| 450 | 462 | { |
| 451 | 463 | // TBR p: Table Branch |
| 452 | | op_illegal(); |
| 464 | m_pc = (m_a | m_b << 4 | m_c << 8 | ((m_op & 7) << 9)) & m_prgmask; |
| 453 | 465 | } |
| 454 | 466 | |
| 455 | 467 | void hmcs40_cpu_device::op_rtn() |
| 456 | 468 | { |
| 457 | 469 | // RTN: Return from Subroutine |
| 458 | | op_illegal(); |
| 470 | pop_stack(); |
| 459 | 471 | } |
| 460 | 472 | |
| 461 | 473 | |