branches/kale/src/emu/cpu/z180/z180.c
| r244714 | r244715 | |
| 817 | 817 | switch (port + Z180_CNTLA0) |
| 818 | 818 | { |
| 819 | 819 | case Z180_CNTLA0: |
| 820 | | data = IO_CNTLA0 & Z180_CNTLA0_RMASK; |
| 820 | data = m_data->read_byte(0); |
| 821 | // data = IO_CNTLA0 & Z180_CNTLA0_RMASK; |
| 821 | 822 | LOG(("Z180 '%s' CNTLA0 rd $%02x ($%02x)\n", tag(), data, m_io[port & 0x3f])); |
| 822 | 823 | break; |
| 823 | 824 | |
| 824 | 825 | case Z180_CNTLA1: |
| 825 | | data = IO_CNTLA1 & Z180_CNTLA1_RMASK; |
| 826 | data = m_data->read_byte(1); |
| 827 | //data = IO_CNTLA1 & Z180_CNTLA1_RMASK; |
| 826 | 828 | LOG(("Z180 '%s' CNTLA1 rd $%02x ($%02x)\n", tag(), data, m_io[port & 0x3f])); |
| 827 | 829 | break; |
| 828 | 830 | |
| 829 | 831 | case Z180_CNTLB0: |
| 830 | | data = IO_CNTLB0 & Z180_CNTLB0_RMASK; |
| 832 | data = m_data->read_byte(2); |
| 833 | //data = IO_CNTLB0 & Z180_CNTLB0_RMASK; |
| 831 | 834 | LOG(("Z180 '%s' CNTLB0 rd $%02x ($%02x)\n", tag(), data, m_io[port & 0x3f])); |
| 832 | 835 | break; |
| 833 | 836 | |
| 834 | 837 | case Z180_CNTLB1: |
| 835 | | data = IO_CNTLB1 & Z180_CNTLB1_RMASK; |
| 838 | data = m_data->read_byte(3); |
| 839 | //data = IO_CNTLB1 & Z180_CNTLB1_RMASK; |
| 836 | 840 | LOG(("Z180 '%s' CNTLB1 rd $%02x ($%02x)\n", tag(), data, m_io[port & 0x3f])); |
| 837 | 841 | break; |
| 838 | 842 | |
| 839 | 843 | case Z180_STAT0: |
| 840 | | data = IO_STAT0 & Z180_STAT0_RMASK; |
| 844 | data = m_data->read_byte(4); |
| 845 | //data = IO_STAT0 & Z180_STAT0_RMASK; |
| 841 | 846 | data |= 0x02; // kludge for 20pacgal |
| 842 | 847 | LOG(("Z180 '%s' STAT0 rd $%02x ($%02x)\n", tag(), data, m_io[port & 0x3f])); |
| 843 | 848 | break; |
| 844 | 849 | |
| 845 | 850 | case Z180_STAT1: |
| 846 | | data = IO_STAT1 & Z180_STAT1_RMASK; |
| 851 | data = m_data->read_byte(5); |
| 852 | // data = IO_STAT1 & Z180_STAT1_RMASK; |
| 847 | 853 | LOG(("Z180 '%s' STAT1 rd $%02x ($%02x)\n", tag(), data, m_io[port & 0x3f])); |
| 848 | 854 | break; |
| 849 | 855 | |
| 850 | 856 | case Z180_TDR0: |
| 851 | | data = m_data->read_byte(0); //IO_TDR0 & Z180_TDR0_RMASK; |
| 857 | data = m_data->read_byte(6); //IO_TDR0 & Z180_TDR0_RMASK; |
| 852 | 858 | |
| 853 | 859 | LOG(("Z180 '%s' TDR0 rd $%02x ($%02x)\n", tag(), data, m_io[port & 0x3f])); |
| 854 | 860 | break; |
| 855 | 861 | |
| 856 | 862 | case Z180_TDR1: |
| 857 | | data = m_data->read_byte(1); //IO_TDR1 & Z180_TDR1_RMASK; |
| 863 | data = m_data->read_byte(7); //IO_TDR1 & Z180_TDR1_RMASK; |
| 858 | 864 | LOG(("Z180 '%s' TDR1 rd $%02x ($%02x)\n", tag(), data, m_io[port & 0x3f])); |
| 859 | 865 | break; |
| 860 | 866 | |
| 861 | 867 | case Z180_RDR0: |
| 862 | | data = m_data->read_byte(2); |
| 868 | data = m_data->read_byte(8); |
| 863 | 869 | //data = IO_RDR0 & Z180_RDR0_RMASK; |
| 864 | 870 | LOG(("Z180 '%s' RDR0 rd $%02x ($%02x)\n", tag(), data, m_io[port & 0x3f])); |
| 865 | 871 | break; |
| 866 | 872 | |
| 867 | 873 | case Z180_RDR1: |
| 868 | | data = m_data->read_byte(3); |
| 874 | data = m_data->read_byte(9); |
| 869 | 875 | //data = IO_RDR1 & Z180_RDR1_RMASK; |
| 870 | 876 | LOG(("Z180 '%s' RDR1 rd $%02x ($%02x)\n", tag(), data, m_io[port & 0x3f])); |
| 871 | 877 | break; |
| r244714 | r244715 | |
| 1250 | 1256 | { |
| 1251 | 1257 | case Z180_CNTLA0: |
| 1252 | 1258 | LOG(("Z180 '%s' CNTLA0 wr $%02x ($%02x)\n", tag(), data, data & Z180_CNTLA0_WMASK)); |
| 1259 | m_data->write_byte(0,data); |
| 1260 | |
| 1253 | 1261 | IO_CNTLA0 = (IO_CNTLA0 & ~Z180_CNTLA0_WMASK) | (data & Z180_CNTLA0_WMASK); |
| 1254 | 1262 | break; |
| 1255 | 1263 | |
| 1256 | 1264 | case Z180_CNTLA1: |
| 1257 | 1265 | LOG(("Z180 '%s' CNTLA1 wr $%02x ($%02x)\n", tag(), data, data & Z180_CNTLA1_WMASK)); |
| 1266 | m_data->write_byte(1,data); |
| 1267 | |
| 1258 | 1268 | IO_CNTLA1 = (IO_CNTLA1 & ~Z180_CNTLA1_WMASK) | (data & Z180_CNTLA1_WMASK); |
| 1259 | 1269 | break; |
| 1260 | 1270 | |
| 1261 | 1271 | case Z180_CNTLB0: |
| 1262 | 1272 | LOG(("Z180 '%s' CNTLB0 wr $%02x ($%02x)\n", tag(), data, data & Z180_CNTLB0_WMASK)); |
| 1273 | m_data->write_byte(2,data); |
| 1274 | |
| 1263 | 1275 | IO_CNTLB0 = (IO_CNTLB0 & ~Z180_CNTLB0_WMASK) | (data & Z180_CNTLB0_WMASK); |
| 1264 | 1276 | break; |
| 1265 | 1277 | |
| 1266 | 1278 | case Z180_CNTLB1: |
| 1267 | 1279 | LOG(("Z180 '%s' CNTLB1 wr $%02x ($%02x)\n", tag(), data, data & Z180_CNTLB1_WMASK)); |
| 1280 | m_data->write_byte(3,data); |
| 1281 | |
| 1268 | 1282 | IO_CNTLB1 = (IO_CNTLB1 & ~Z180_CNTLB1_WMASK) | (data & Z180_CNTLB1_WMASK); |
| 1269 | 1283 | break; |
| 1270 | 1284 | |
| 1271 | 1285 | case Z180_STAT0: |
| 1272 | 1286 | LOG(("Z180 '%s' STAT0 wr $%02x ($%02x)\n", tag(), data, data & Z180_STAT0_WMASK)); |
| 1287 | m_data->write_byte(4,data); |
| 1288 | |
| 1273 | 1289 | IO_STAT0 = (IO_STAT0 & ~Z180_STAT0_WMASK) | (data & Z180_STAT0_WMASK); |
| 1274 | 1290 | break; |
| 1275 | 1291 | |
| 1276 | 1292 | case Z180_STAT1: |
| 1277 | 1293 | LOG(("Z180 '%s' STAT1 wr $%02x ($%02x)\n", tag(), data, data & Z180_STAT1_WMASK)); |
| 1294 | m_data->write_byte(5,data); |
| 1295 | |
| 1278 | 1296 | IO_STAT1 = (IO_STAT1 & ~Z180_STAT1_WMASK) | (data & Z180_STAT1_WMASK); |
| 1279 | 1297 | break; |
| 1280 | 1298 | |
| 1281 | 1299 | case Z180_TDR0: |
| 1282 | 1300 | LOG(("Z180 '%s' TDR0 wr $%02x ($%02x)\n", tag(), data, data & Z180_TDR0_WMASK)); |
| 1283 | | m_data->write_byte(0,data); |
| 1301 | m_data->write_byte(6,data); |
| 1284 | 1302 | IO_TDR0 = (IO_TDR0 & ~Z180_TDR0_WMASK) | (data & Z180_TDR0_WMASK); |
| 1285 | 1303 | break; |
| 1286 | 1304 | |
| 1287 | 1305 | case Z180_TDR1: |
| 1288 | 1306 | LOG(("Z180 '%s' TDR1 wr $%02x ($%02x)\n", tag(), data, data & Z180_TDR1_WMASK)); |
| 1289 | | m_data->write_byte(1,data); |
| 1307 | m_data->write_byte(7,data); |
| 1290 | 1308 | IO_TDR1 = (IO_TDR1 & ~Z180_TDR1_WMASK) | (data & Z180_TDR1_WMASK); |
| 1291 | 1309 | break; |
| 1292 | 1310 | |
| 1293 | 1311 | case Z180_RDR0: |
| 1294 | 1312 | LOG(("Z180 '%s' RDR0 wr $%02x ($%02x)\n", tag(), data, data & Z180_RDR0_WMASK)); |
| 1295 | | m_data->write_byte(2,data); |
| 1313 | m_data->write_byte(8,data); |
| 1296 | 1314 | |
| 1297 | 1315 | IO_RDR0 = (IO_RDR0 & ~Z180_RDR0_WMASK) | (data & Z180_RDR0_WMASK); |
| 1298 | 1316 | break; |
| 1299 | 1317 | |
| 1300 | 1318 | case Z180_RDR1: |
| 1301 | 1319 | LOG(("Z180 '%s' RDR1 wr $%02x ($%02x)\n", tag(), data, data & Z180_RDR1_WMASK)); |
| 1302 | | m_data->write_byte(3,data); |
| 1320 | m_data->write_byte(9,data); |
| 1303 | 1321 | |
| 1304 | 1322 | IO_RDR1 = (IO_RDR1 & ~Z180_RDR1_WMASK) | (data & Z180_RDR1_WMASK); |
| 1305 | 1323 | |
branches/kale/src/mame/drivers/asuka.c
| r244714 | r244715 | |
| 1929 | 1929 | AM_RANGE(0x00, 0x3f) AM_RAM // z180 internal I/O regs |
| 1930 | 1930 | ADDRESS_MAP_END |
| 1931 | 1931 | |
| 1932 | |
| 1932 | 1933 | static ADDRESS_MAP_START( cadash_sub_data, AS_DATA, 8, cadash_state ) |
| 1933 | 1934 | |
| 1934 | 1935 | ADDRESS_MAP_END |
| 1935 | 1936 | |
| 1936 | 1937 | static ADDRESS_MAP_START( cadash_sub_data_2, AS_DATA, 8, cadash_state ) |
| 1937 | | |
| 1938 | 1938 | ADDRESS_MAP_END |
| 1939 | 1939 | |
| 1940 | 1940 | |
| r244714 | r244715 | |
| 1948 | 1948 | MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz/2) /* verified on pcb */ |
| 1949 | 1949 | MCFG_CPU_PROGRAM_MAP(cadash_z80_map) |
| 1950 | 1950 | |
| 1951 | | MCFG_CPU_ADD("subcpu", Z180, 4000000) /* 4 MHz ??? */ |
| 1951 | MCFG_CPU_ADD("subcpu", Z180, 10000000) /* 4 MHz ??? */ |
| 1952 | 1952 | MCFG_CPU_PROGRAM_MAP(cadash_sub_map) |
| 1953 | 1953 | MCFG_CPU_IO_MAP(cadash_sub_io) |
| 1954 | 1954 | MCFG_CPU_DATA_MAP(cadash_sub_data) |
| r244714 | r244715 | |
| 1960 | 1960 | MCFG_CPU_ADD("audiocpu_2", Z80, XTAL_8MHz/2) /* verified on pcb */ |
| 1961 | 1961 | MCFG_CPU_PROGRAM_MAP(cadash_z80_map_2) |
| 1962 | 1962 | |
| 1963 | | MCFG_CPU_ADD("subcpu_2", Z180, 4000000) /* 4 MHz ??? */ |
| 1963 | MCFG_CPU_ADD("subcpu_2", Z180, 10000000) /* 4 MHz ??? */ |
| 1964 | 1964 | MCFG_CPU_PROGRAM_MAP(cadash_sub_map_2) |
| 1965 | 1965 | MCFG_CPU_IO_MAP(cadash_sub_io_2) |
| 1966 | 1966 | MCFG_CPU_DATA_MAP(cadash_sub_data_2) |