trunk/src/mame/drivers/tbowl.c
| r243789 | r243790 | |
| 33 | 33 | |
| 34 | 34 | WRITE8_MEMBER(tbowl_state::tbowlb_bankswitch_w) |
| 35 | 35 | { |
| 36 | | int bankaddress; |
| 37 | | UINT8 *RAM = memregion("maincpu")->base(); |
| 38 | | |
| 39 | | |
| 40 | | bankaddress = 0x10000 + ((data & 0xf8) << 8); |
| 41 | | membank("bank1")->set_base(&RAM[bankaddress]); |
| 36 | membank("mainbank")->set_entry(data >> 3); |
| 42 | 37 | } |
| 43 | 38 | |
| 44 | 39 | WRITE8_MEMBER(tbowl_state::tbowlc_bankswitch_w) |
| 45 | 40 | { |
| 46 | | int bankaddress; |
| 47 | | UINT8 *RAM = memregion("sub")->base(); |
| 48 | | |
| 49 | | |
| 50 | | bankaddress = 0x10000 + ((data & 0xf8) << 8); |
| 51 | | |
| 52 | | |
| 53 | | membank("bank2")->set_base(&RAM[bankaddress]); |
| 41 | membank("subbank")->set_entry(data >> 3); |
| 54 | 42 | } |
| 55 | 43 | |
| 56 | 44 | /*** Shared Ram Handlers |
| 57 | 45 | |
| 58 | 46 | ***/ |
| 59 | 47 | |
| 60 | | READ8_MEMBER(tbowl_state::shared_r) |
| 61 | | { |
| 62 | | return m_shared_ram[offset]; |
| 63 | | } |
| 64 | | |
| 65 | | WRITE8_MEMBER(tbowl_state::shared_w) |
| 66 | | { |
| 67 | | m_shared_ram[offset] = data; |
| 68 | | } |
| 69 | | |
| 70 | 48 | WRITE8_MEMBER(tbowl_state::tbowl_sound_command_w) |
| 71 | 49 | { |
| 72 | 50 | soundlatch_byte_w(space, offset, data); |
| r243789 | r243790 | |
| 92 | 70 | AM_RANGE(0xc000, 0xdfff) AM_RAM_WRITE(tbowl_bgvideoram_w) AM_SHARE("bgvideoram") |
| 93 | 71 | AM_RANGE(0xe000, 0xefff) AM_RAM_WRITE(tbowl_txvideoram_w) AM_SHARE("txvideoram") |
| 94 | 72 | // AM_RANGE(0xf000, 0xf000) AM_WRITE(unknown_write) * written during start-up, not again */ |
| 95 | | AM_RANGE(0xf000, 0xf7ff) AM_ROMBANK("bank1") |
| 96 | | AM_RANGE(0xf800, 0xfbff) AM_READWRITE(shared_r, shared_w) AM_SHARE("shared_ram") /* check */ |
| 73 | AM_RANGE(0xf000, 0xf7ff) AM_ROMBANK("mainbank") |
| 74 | AM_RANGE(0xf800, 0xfbff) AM_RAM AM_SHARE("shared_ram") /* check */ |
| 97 | 75 | AM_RANGE(0xfc00, 0xfc00) AM_READ_PORT("P1") AM_WRITE(tbowlb_bankswitch_w) |
| 98 | 76 | AM_RANGE(0xfc01, 0xfc01) AM_READ_PORT("P2") |
| 99 | 77 | // AM_RANGE(0xfc01, 0xfc01) AM_WRITE(unknown_write) /* written during start-up, not again */ |
| r243789 | r243790 | |
| 132 | 110 | AM_RANGE(0xc000, 0xd7ff) AM_WRITEONLY |
| 133 | 111 | AM_RANGE(0xd800, 0xdfff) AM_WRITEONLY AM_SHARE("spriteram") |
| 134 | 112 | AM_RANGE(0xe000, 0xefff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette") // 2x palettes, one for each monitor? |
| 135 | | AM_RANGE(0xf000, 0xf7ff) AM_ROMBANK("bank2") |
| 136 | | AM_RANGE(0xf800, 0xfbff) AM_READWRITE(shared_r, shared_w) |
| 113 | AM_RANGE(0xf000, 0xf7ff) AM_ROMBANK("subbank") |
| 114 | AM_RANGE(0xf800, 0xfbff) AM_RAM AM_SHARE("shared_ram") |
| 137 | 115 | AM_RANGE(0xfc00, 0xfc00) AM_WRITE(tbowlc_bankswitch_w) |
| 138 | 116 | AM_RANGE(0xfc01, 0xfc01) AM_WRITENOP /* ? */ |
| 139 | 117 | AM_RANGE(0xfc02, 0xfc02) AM_WRITE(tbowl_trigger_nmi) /* ? */ |
| r243789 | r243790 | |
| 436 | 414 | |
| 437 | 415 | ***/ |
| 438 | 416 | |
| 417 | void tbowl_state::machine_start() |
| 418 | { |
| 419 | membank("mainbank")->configure_entries(0, 32, memregion("maincpu")->base() + 0x10000, 0x800); |
| 420 | membank("subbank")->configure_entries(0, 32, memregion("sub")->base() + 0x10000, 0x800); |
| 421 | } |
| 422 | |
| 439 | 423 | void tbowl_state::machine_reset() |
| 440 | 424 | { |
| 441 | 425 | m_adpcm_pos[0] = m_adpcm_pos[1] = 0; |
trunk/src/mame/drivers/tecmo.c
| r243789 | r243790 | |
| 56 | 56 | |
| 57 | 57 | WRITE8_MEMBER(tecmo_state::bankswitch_w) |
| 58 | 58 | { |
| 59 | | int bankaddress; |
| 60 | | UINT8 *RAM = memregion("maincpu")->base(); |
| 61 | | |
| 62 | | |
| 63 | | bankaddress = 0x10000 + ((data & 0xf8) << 8); |
| 64 | | membank("bank1")->set_base(&RAM[bankaddress]); |
| 59 | membank("bank1")->set_entry(data >> 3); |
| 65 | 60 | } |
| 66 | 61 | |
| 67 | 62 | WRITE8_MEMBER(tecmo_state::sound_command_w) |
| r243789 | r243790 | |
| 601 | 596 | |
| 602 | 597 | void tecmo_state::machine_start() |
| 603 | 598 | { |
| 599 | membank("bank1")->configure_entries(0, 32, memregion("maincpu")->base() + 0x10000, 0x800); |
| 600 | |
| 604 | 601 | save_item(NAME(m_adpcm_pos)); |
| 605 | 602 | save_item(NAME(m_adpcm_end)); |
| 606 | 603 | save_item(NAME(m_adpcm_data)); |
| r243789 | r243790 | |
| 769 | 766 | */ |
| 770 | 767 | |
| 771 | 768 | ROM_START( rygar ) |
| 772 | | ROM_REGION( 0x18000, "maincpu", 0 ) |
| 769 | ROM_REGION( 0x20000, "maincpu", 0 ) |
| 773 | 770 | ROM_LOAD( "5.5p", 0x00000, 0x08000, CRC(062cd55d) SHA1(656e29c890f5de964920b7841b3e11469cd20051) ) /* code */ |
| 774 | 771 | ROM_LOAD( "cpu_5m.bin", 0x08000, 0x04000, CRC(7ac5191b) SHA1(305f39d974f906f9bc24e9fe2ca58e647925ab63) ) /* code */ |
| 775 | 772 | ROM_LOAD( "cpu_5j.bin", 0x10000, 0x08000, CRC(ed76d606) SHA1(39c8a07e9a1f218ad088d00a2c9dfc993efafb6b) ) /* banked at f000-f7ff */ |
| r243789 | r243790 | |
| 803 | 800 | ROM_END |
| 804 | 801 | |
| 805 | 802 | ROM_START( rygar2 ) |
| 806 | | ROM_REGION( 0x18000, "maincpu", 0 ) |
| 803 | ROM_REGION( 0x20000, "maincpu", 0 ) |
| 807 | 804 | ROM_LOAD( "5p.bin", 0x00000, 0x08000, CRC(151ffc0b) SHA1(0eb877f2c68d3d1f52d7b12d0a8ad08c9932c054) ) /* code */ |
| 808 | 805 | ROM_LOAD( "cpu_5m.bin", 0x08000, 0x04000, CRC(7ac5191b) SHA1(305f39d974f906f9bc24e9fe2ca58e647925ab63) ) /* code */ |
| 809 | 806 | ROM_LOAD( "cpu_5j.bin", 0x10000, 0x08000, CRC(ed76d606) SHA1(39c8a07e9a1f218ad088d00a2c9dfc993efafb6b) ) /* banked at f000-f7ff */ |
| r243789 | r243790 | |
| 838 | 835 | |
| 839 | 836 | /* There is a known bootleg board which uses U locations but without Tecmo etchings which is a match for rygar3 */ |
| 840 | 837 | ROM_START( rygar3 ) |
| 841 | | ROM_REGION( 0x18000, "maincpu", 0 ) |
| 838 | ROM_REGION( 0x20000, "maincpu", 0 ) |
| 842 | 839 | ROM_LOAD( "cpu_5p.bin", 0x00000, 0x08000, CRC(e79c054a) SHA1(1aaffa53d121d5c55899bf18e85c42333fe0df54) ) /* code */ |
| 843 | 840 | ROM_LOAD( "cpu_5m.bin", 0x08000, 0x04000, CRC(7ac5191b) SHA1(305f39d974f906f9bc24e9fe2ca58e647925ab63) ) /* code */ |
| 844 | 841 | ROM_LOAD( "cpu_5j.bin", 0x10000, 0x08000, CRC(ed76d606) SHA1(39c8a07e9a1f218ad088d00a2c9dfc993efafb6b) ) /* banked at f000-f7ff */ |
| r243789 | r243790 | |
| 872 | 869 | ROM_END |
| 873 | 870 | |
| 874 | 871 | ROM_START( rygarj ) |
| 875 | | ROM_REGION( 0x18000, "maincpu", 0 ) |
| 872 | ROM_REGION( 0x20000, "maincpu", 0 ) |
| 876 | 873 | |
| 877 | 874 | ROM_LOAD( "cpuj_5p.bin", 0x00000, 0x08000, CRC(b39698ba) SHA1(01a5a12a71973ad117b0bbd763e470f89c439e45) ) /* code */ |
| 878 | 875 | ROM_LOAD( "cpuj_5m.bin", 0x08000, 0x04000, CRC(3f180979) SHA1(c4c2e9f83b06b8677978800bfcc39f4ba3b344ab) ) /* code */ |
trunk/src/mame/drivers/wc90.c
| r243789 | r243790 | |
| 81 | 81 | |
| 82 | 82 | WRITE8_MEMBER(wc90_state::bankswitch_w) |
| 83 | 83 | { |
| 84 | | int bankaddress; |
| 85 | | UINT8 *RAM = memregion("maincpu")->base(); |
| 86 | | |
| 87 | | |
| 88 | | bankaddress = 0x10000 + ( ( data & 0xf8 ) << 8 ); |
| 89 | | membank("bank1")->set_base(&RAM[bankaddress] ); |
| 84 | membank("mainbank")->set_entry(data >> 3); |
| 90 | 85 | } |
| 91 | 86 | |
| 92 | 87 | WRITE8_MEMBER(wc90_state::bankswitch1_w) |
| 93 | 88 | { |
| 94 | | int bankaddress; |
| 95 | | UINT8 *RAM = memregion("sub")->base(); |
| 96 | | |
| 97 | | |
| 98 | | bankaddress = 0x10000 + ( ( data & 0xf8 ) << 8 ); |
| 99 | | membank("bank2")->set_base(&RAM[bankaddress] ); |
| 89 | membank("subbank")->set_entry(data >> 3); |
| 100 | 90 | } |
| 101 | 91 | |
| 102 | 92 | WRITE8_MEMBER(wc90_state::sound_command_w) |
| r243789 | r243790 | |
| 115 | 105 | AM_RANGE(0xc000, 0xcfff) AM_RAM_WRITE(bgvideoram_w) AM_SHARE("bgvideoram") |
| 116 | 106 | AM_RANGE(0xd000, 0xdfff) AM_RAM |
| 117 | 107 | AM_RANGE(0xe000, 0xefff) AM_RAM_WRITE(txvideoram_w) AM_SHARE("txvideoram") /* tx video ram */ |
| 118 | | AM_RANGE(0xf000, 0xf7ff) AM_ROMBANK("bank1") |
| 108 | AM_RANGE(0xf000, 0xf7ff) AM_ROMBANK("mainbank") |
| 119 | 109 | AM_RANGE(0xf800, 0xfbff) AM_RAM AM_SHARE("share1") |
| 120 | 110 | AM_RANGE(0xfc00, 0xfc00) AM_READ_PORT("P1") |
| 121 | 111 | AM_RANGE(0xfc02, 0xfc02) AM_READ_PORT("P2") |
| r243789 | r243790 | |
| 145 | 135 | AM_RANGE(0xd000, 0xd7ff) AM_RAM AM_SHARE("spriteram") |
| 146 | 136 | AM_RANGE(0xd800, 0xdfff) AM_RAM |
| 147 | 137 | AM_RANGE(0xe000, 0xe7ff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette") |
| 148 | | AM_RANGE(0xf000, 0xf7ff) AM_ROMBANK("bank2") |
| 138 | AM_RANGE(0xf000, 0xf7ff) AM_ROMBANK("subbank") |
| 149 | 139 | AM_RANGE(0xf800, 0xfbff) AM_RAM AM_SHARE("share1") |
| 150 | 140 | AM_RANGE(0xfc00, 0xfc00) AM_WRITE(bankswitch1_w) |
| 151 | 141 | AM_RANGE(0xfc01, 0xfc01) AM_WRITE(watchdog_reset_w) |
| r243789 | r243790 | |
| 288 | 278 | GFXDECODE_END |
| 289 | 279 | |
| 290 | 280 | |
| 291 | | |
| 292 | | /* handler called by the 2608 emulator when the internal timers cause an IRQ */ |
| 293 | | WRITE_LINE_MEMBER(wc90_state::irqhandler) |
| 281 | void wc90_state::machine_start() |
| 294 | 282 | { |
| 295 | | m_audiocpu->set_input_line(0, state ? ASSERT_LINE : CLEAR_LINE); |
| 283 | membank("mainbank")->configure_entries(0, 32, memregion("maincpu")->base() + 0x10000, 0x800); |
| 284 | membank("subbank")->configure_entries(0, 32, memregion("sub")->base() + 0x10000, 0x800); |
| 296 | 285 | } |
| 297 | 286 | |
| 287 | |
| 298 | 288 | static MACHINE_CONFIG_START( wc90, wc90_state ) |
| 299 | 289 | |
| 300 | 290 | /* basic machine hardware */ |
| r243789 | r243790 | |
| 330 | 320 | MCFG_SPEAKER_STANDARD_MONO("mono") |
| 331 | 321 | |
| 332 | 322 | MCFG_SOUND_ADD("ymsnd", YM2608, XTAL_8MHz) /* verified on pcb */ |
| 333 | | MCFG_YM2608_IRQ_HANDLER(WRITELINE(wc90_state, irqhandler)) |
| 323 | MCFG_YM2608_IRQ_HANDLER(INPUTLINE("audiocpu", 0)) |
| 334 | 324 | MCFG_SOUND_ROUTE(0, "mono", 0.50) |
| 335 | 325 | MCFG_SOUND_ROUTE(1, "mono", 1.0) |
| 336 | 326 | MCFG_SOUND_ROUTE(2, "mono", 1.0) |
trunk/src/mame/drivers/wc90b.c
| r243789 | r243790 | |
| 98 | 98 | |
| 99 | 99 | WRITE8_MEMBER(wc90b_state::wc90b_bankswitch_w) |
| 100 | 100 | { |
| 101 | | int bankaddress; |
| 102 | | UINT8 *ROM = memregion("maincpu")->base(); |
| 103 | | |
| 104 | | bankaddress = 0x10000 + ((data & 0xf8) << 8); |
| 105 | | membank("bank1")->set_base(&ROM[bankaddress]); |
| 101 | membank("mainbank")->set_entry(data >> 3); |
| 106 | 102 | } |
| 107 | 103 | |
| 108 | 104 | WRITE8_MEMBER(wc90b_state::wc90b_bankswitch1_w) |
| 109 | 105 | { |
| 110 | | int bankaddress; |
| 111 | | UINT8 *ROM = memregion("sub")->base(); |
| 112 | | |
| 113 | | bankaddress = 0x10000 + ((data & 0xf8) << 8); |
| 114 | | membank("bank2")->set_base(&ROM[bankaddress]); |
| 106 | membank("subbank")->set_entry(data >> 3); |
| 115 | 107 | } |
| 116 | 108 | |
| 117 | 109 | WRITE8_MEMBER(wc90b_state::wc90b_sound_command_w) |
| r243789 | r243790 | |
| 122 | 114 | |
| 123 | 115 | WRITE8_MEMBER(wc90b_state::adpcm_control_w) |
| 124 | 116 | { |
| 125 | | int bankaddress; |
| 126 | | UINT8 *ROM = memregion("audiocpu")->base(); |
| 127 | | |
| 128 | | /* the code writes either 2 or 3 in the bottom two bits */ |
| 129 | | bankaddress = 0x10000 + (data & 0x01) * 0x4000; |
| 130 | | membank("bank3")->set_base(&ROM[bankaddress]); |
| 131 | | |
| 117 | membank("audiobank")->set_entry(data & 0x01); |
| 132 | 118 | m_msm->reset_w(data & 0x08); |
| 133 | 119 | } |
| 134 | 120 | |
| r243789 | r243790 | |
| 144 | 130 | AM_RANGE(0xa000, 0xafff) AM_RAM_WRITE(wc90b_fgvideoram_w) AM_SHARE("fgvideoram") |
| 145 | 131 | AM_RANGE(0xc000, 0xcfff) AM_RAM_WRITE(wc90b_bgvideoram_w) AM_SHARE("bgvideoram") |
| 146 | 132 | AM_RANGE(0xe000, 0xefff) AM_RAM_WRITE(wc90b_txvideoram_w) AM_SHARE("txvideoram") |
| 147 | | AM_RANGE(0xf000, 0xf7ff) AM_ROMBANK("bank1") |
| 133 | AM_RANGE(0xf000, 0xf7ff) AM_ROMBANK("mainbank") |
| 148 | 134 | AM_RANGE(0xf800, 0xfbff) AM_RAM AM_SHARE("share1") |
| 149 | 135 | AM_RANGE(0xfc00, 0xfc00) AM_WRITE(wc90b_bankswitch_w) |
| 150 | 136 | AM_RANGE(0xfd00, 0xfd00) AM_WRITE(wc90b_sound_command_w) |
| r243789 | r243790 | |
| 166 | 152 | AM_RANGE(0xd800, 0xdfff) AM_RAM |
| 167 | 153 | AM_RANGE(0xe000, 0xe7ff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette") |
| 168 | 154 | AM_RANGE(0xe800, 0xefff) AM_ROM |
| 169 | | AM_RANGE(0xf000, 0xf7ff) AM_ROMBANK("bank2") |
| 155 | AM_RANGE(0xf000, 0xf7ff) AM_ROMBANK("subbank") |
| 170 | 156 | AM_RANGE(0xf800, 0xfbff) AM_RAM AM_SHARE("share1") |
| 171 | 157 | AM_RANGE(0xfc00, 0xfc00) AM_WRITE(wc90b_bankswitch1_w) |
| 172 | 158 | ADDRESS_MAP_END |
| 173 | 159 | |
| 174 | 160 | static ADDRESS_MAP_START( sound_cpu, AS_PROGRAM, 8, wc90b_state ) |
| 175 | 161 | AM_RANGE(0x0000, 0x7fff) AM_ROM |
| 176 | | AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank3") |
| 162 | AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("audiobank") |
| 177 | 163 | AM_RANGE(0xe000, 0xe000) AM_WRITE(adpcm_control_w) |
| 178 | 164 | AM_RANGE(0xe400, 0xe400) AM_WRITE(adpcm_data_w) |
| 179 | 165 | AM_RANGE(0xe800, 0xe801) AM_DEVREADWRITE("ymsnd", ym2203_device, read, write) |
| r243789 | r243790 | |
| 322 | 308 | |
| 323 | 309 | |
| 324 | 310 | |
| 325 | | /* handler called by the 2203 emulator when the internal timers cause an IRQ */ |
| 326 | | WRITE_LINE_MEMBER(wc90b_state::irqhandler) |
| 327 | | { |
| 328 | | /* NMI writes to MSM ports *only*! -AS */ |
| 329 | | //m_audiocpu->set_input_line(INPUT_LINE_NMI, state ? ASSERT_LINE : CLEAR_LINE); |
| 330 | | } |
| 331 | | |
| 332 | 311 | WRITE_LINE_MEMBER(wc90b_state::adpcm_int) |
| 333 | 312 | { |
| 334 | 313 | m_toggle ^= 1; |
| r243789 | r243790 | |
| 341 | 320 | m_msm->data_w((m_msm5205next & 0x0f) >> 0); |
| 342 | 321 | } |
| 343 | 322 | |
| 323 | void wc90b_state::machine_start() |
| 324 | { |
| 325 | membank("mainbank")->configure_entries(0, 32, memregion("maincpu")->base() + 0x10000, 0x800); |
| 326 | membank("subbank")->configure_entries(0, 32, memregion("sub")->base() + 0x10000, 0x800); |
| 327 | membank("audiobank")->configure_entries(0, 2, memregion("audiocpu")->base() + 0x8000, 0x4000); |
| 328 | } |
| 344 | 329 | |
| 330 | |
| 345 | 331 | static MACHINE_CONFIG_START( wc90b, wc90b_state ) |
| 346 | 332 | |
| 347 | 333 | /* basic machine hardware */ |
| r243789 | r243790 | |
| 375 | 361 | MCFG_SPEAKER_STANDARD_MONO("mono") |
| 376 | 362 | |
| 377 | 363 | MCFG_SOUND_ADD("ymsnd", YM2203, YM2203_CLOCK) |
| 378 | | MCFG_YM2203_IRQ_HANDLER(WRITELINE(wc90b_state, irqhandler)) |
| 379 | 364 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.20) |
| 380 | 365 | |
| 381 | 366 | MCFG_SOUND_ADD("msm", MSM5205, MSM5205_CLOCK) |
| r243789 | r243790 | |
| 393 | 378 | ROM_LOAD( "a04.bin", 0x00000, 0x10000, CRC(3d535e2f) SHA1(f1e1878b5a8316e770c74a1e1f29a7a81a4e5dfe) ) /* c000-ffff is not used */ |
| 394 | 379 | ROM_LOAD( "a05.bin", 0x10000, 0x10000, CRC(9e421c4b) SHA1(e23a1f1d5d1e960696f45df653869712eb889839) ) /* banked at f000-f7ff */ |
| 395 | 380 | |
| 396 | | ROM_REGION( 0x18000, "audiocpu", 0 ) |
| 397 | | ROM_LOAD( "a01.bin", 0x00000, 0x8000, CRC(3d317622) SHA1(ae4e8c5247bc215a2769786cb8639bce2f80db22) ) |
| 398 | | ROM_CONTINUE( 0x10000, 0x8000 ) /* banked at 8000-bfff */ |
| 381 | ROM_REGION( 0x10000, "audiocpu", 0 ) |
| 382 | ROM_LOAD( "a01.bin", 0x00000, 0x10000, CRC(3d317622) SHA1(ae4e8c5247bc215a2769786cb8639bce2f80db22) ) |
| 399 | 383 | |
| 400 | 384 | ROM_REGION( 0x010000, "gfx1", 0 ) |
| 401 | 385 | ROM_LOAD( "a06.bin", 0x000000, 0x04000, CRC(3b5387b7) SHA1(b839b4eafe8bf6f9e841e19fee1bdb64a66f3448) ) |
| r243789 | r243790 | |
| 436 | 420 | ROM_LOAD( "a04.bin", 0x00000, 0x10000, CRC(3d535e2f) SHA1(f1e1878b5a8316e770c74a1e1f29a7a81a4e5dfe) ) /* c000-ffff is not used */ |
| 437 | 421 | ROM_LOAD( "a05.bin", 0x10000, 0x10000, CRC(9e421c4b) SHA1(e23a1f1d5d1e960696f45df653869712eb889839) ) /* banked at f000-f7ff */ |
| 438 | 422 | |
| 439 | | ROM_REGION( 0x18000, "audiocpu", 0 ) |
| 440 | | ROM_LOAD( "a01.bin", 0x00000, 0x8000, CRC(3d317622) SHA1(ae4e8c5247bc215a2769786cb8639bce2f80db22) ) |
| 441 | | ROM_CONTINUE( 0x10000, 0x8000 ) /* banked at 8000-bfff */ |
| 423 | ROM_REGION( 0x10000, "audiocpu", 0 ) |
| 424 | ROM_LOAD( "a01.bin", 0x00000, 0x10000, CRC(3d317622) SHA1(ae4e8c5247bc215a2769786cb8639bce2f80db22) ) |
| 442 | 425 | |
| 443 | 426 | ROM_REGION( 0x010000, "gfx1", 0 ) |
| 444 | 427 | ROM_LOAD( "a06", 0x000000, 0x04000, CRC(0c054481) SHA1(eebab099a4db5fbf13522ecd67bfa741e16e40d4) ) |
| r243789 | r243790 | |
| 490 | 473 | ROM_LOAD( "a04.bin", 0x00000, 0x10000, CRC(3d535e2f) SHA1(f1e1878b5a8316e770c74a1e1f29a7a81a4e5dfe) ) /* c000-ffff is not used */ |
| 491 | 474 | ROM_LOAD( "el_ic98_27c512_05.bin",0x10000, 0x10000, CRC(c70d8c13) SHA1(365718725ea7d0355c68ba703b7f9624cb1134bc) ) |
| 492 | 475 | |
| 493 | | ROM_REGION( 0x18000, "audiocpu", 0 ) |
| 494 | | ROM_LOAD( "a01.bin", 0x00000, 0x8000, CRC(3d317622) SHA1(ae4e8c5247bc215a2769786cb8639bce2f80db22) ) |
| 495 | | ROM_CONTINUE( 0x10000, 0x8000 ) /* banked at 8000-bfff */ |
| 476 | ROM_REGION( 0x10000, "audiocpu", 0 ) |
| 477 | ROM_LOAD( "a01.bin", 0x00000, 0x10000, CRC(3d317622) SHA1(ae4e8c5247bc215a2769786cb8639bce2f80db22) ) |
| 496 | 478 | |
| 497 | 479 | ROM_REGION( 0x010000, "gfx1", 0 ) |
| 498 | 480 | ROM_LOAD( "a06.bin", 0x000000, 0x04000, CRC(3b5387b7) SHA1(b839b4eafe8bf6f9e841e19fee1bdb64a66f3448) ) |
trunk/src/mame/includes/tbowl.h
| r243789 | r243790 | |
| 6 | 6 | public: |
| 7 | 7 | tbowl_state(const machine_config &mconfig, device_type type, const char *tag) |
| 8 | 8 | : driver_device(mconfig, type, tag), |
| 9 | | m_shared_ram(*this, "shared_ram"), |
| 10 | 9 | m_txvideoram(*this, "txvideoram"), |
| 11 | 10 | m_bgvideoram(*this, "bgvideoram"), |
| 12 | 11 | m_bg2videoram(*this, "bg2videoram"), |
| r243789 | r243790 | |
| 23 | 22 | int m_adpcm_pos[2]; |
| 24 | 23 | int m_adpcm_end[2]; |
| 25 | 24 | int m_adpcm_data[2]; |
| 26 | | required_shared_ptr<UINT8> m_shared_ram; |
| 27 | 25 | required_shared_ptr<UINT8> m_txvideoram; |
| 28 | 26 | required_shared_ptr<UINT8> m_bgvideoram; |
| 29 | 27 | required_shared_ptr<UINT8> m_bg2videoram; |
| r243789 | r243790 | |
| 38 | 36 | DECLARE_WRITE8_MEMBER(tbowl_coin_counter_w); |
| 39 | 37 | DECLARE_WRITE8_MEMBER(tbowlb_bankswitch_w); |
| 40 | 38 | DECLARE_WRITE8_MEMBER(tbowlc_bankswitch_w); |
| 41 | | DECLARE_READ8_MEMBER(shared_r); |
| 42 | | DECLARE_WRITE8_MEMBER(shared_w); |
| 43 | 39 | DECLARE_WRITE8_MEMBER(tbowl_sound_command_w); |
| 44 | 40 | DECLARE_WRITE8_MEMBER(tbowl_trigger_nmi); |
| 45 | 41 | DECLARE_WRITE8_MEMBER(tbowl_adpcm_start_w); |
| r243789 | r243790 | |
| 59 | 55 | TILE_GET_INFO_MEMBER(get_tx_tile_info); |
| 60 | 56 | TILE_GET_INFO_MEMBER(get_bg_tile_info); |
| 61 | 57 | TILE_GET_INFO_MEMBER(get_bg2_tile_info); |
| 58 | virtual void machine_start(); |
| 62 | 59 | virtual void machine_reset(); |
| 63 | 60 | virtual void video_start(); |
| 64 | 61 | UINT32 screen_update_tbowl_left(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); |