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r35274 Thursday 26th February, 2015 at 00:40:30 UTC by Couriersud
Merge branch 'master' of https://github.com/mamedev/mame.git

[src/emu/bus]	bus.mak
[src/emu/bus/scsi]	omti5100.c* omti5100.h*
[src/emu/machine]	machine.mak omti5100.c omti5100.h pic8259.c wd_fdc.c
[src/mess]	mess.mak
[src/mess/drivers]	pcd.c tispeak.c
[src/mess/machine]	pcd_kbd.c* pcd_kbd.h*
[src/osd/windows]	windows.mak

trunk/src/emu/bus/bus.mak

r243785	r243786
1453	1453	BUSOBJS += $(BUSOBJ)/scsi/sa1403d.o
1454	1454	BUSOBJS += $(BUSOBJ)/scsi/s1410.o
1455	1455	BUSOBJS += $(BUSOBJ)/scsi/pc9801_sasi.o
	1456	BUSOBJS += $(BUSOBJ)/scsi/omti5100.o
1456	1457	endif
1457	1458
1458	1459	#-------------------------------------------------

trunk/src/emu/bus/scsi/omti5100.c

r0	r243786
	1	#include "omti5100.h"
	2
	3	#define OMTI_STATUS_NOT_READY 0x04
	4	#define OMTI_READ_DATA_BUFFER 0xec
	5	#define OMTI_ASSIGN_DISK_PARAM 0xc2
	6
	7	const device_type OMTI5100 = &device_creator<omti5100_device>;
	8
	9	#if 0
	10	ROM_START( omti5100 )
	11	ROM_REGION(0x1000, "mcu", 0) // Hitachi Z8
	12	ROM_LOAD("100240-N.7a", 0x0000, 0x1000, CRC(d227d6cb) SHA1(3d6140764d3d043428c941826370ebf1597c63bd))
	13	ROM_END
	14
	15	const rom_entry *omti5100_device::device_rom_region() const
	16	{
	17	return ROM_NAME( omti5100 );
	18	}
	19	#endif
	20
	21	omti5100_device::omti5100_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
	22	: scsihd_device(mconfig, OMTI5100, "OMTI 5100", tag, owner, clock, "omti5100", __FILE__),
	23	m_image0(*this, "image0"),
	24	m_image1(*this, "image1")
	25	{
	26	}
	27
	28	void omti5100_device::device_start()
	29	{
	30	m_image = m_image0;
	31	scsihle_device::device_start();
	32	}
	33
	34	void omti5100_device::ExecCommand()
	35	{
	36	harddisk_image_device *image = ((command[1] >> 5) & 1) ? m_image1 : m_image0;
	37	switch(command[0])
	38	{
	39	case OMTI_READ_DATA_BUFFER:
	40	m_phase = SCSI_PHASE_DATAIN;
	41	m_status_code = SCSI_STATUS_CODE_GOOD;
	42	m_transfer_length = 512;
	43	break;
	44	case OMTI_ASSIGN_DISK_PARAM:
	45	m_phase = SCSI_PHASE_DATAOUT;
	46	m_status_code = SCSI_STATUS_CODE_GOOD;
	47	m_transfer_length = 10;
	48	break;
	49	default:
	50	if(!image)
	51	{
	52	m_phase = SCSI_PHASE_STATUS;
	53	m_status_code = SCSI_STATUS_CODE_CHECK_CONDITION;
	54	m_sense_asc = OMTI_STATUS_NOT_READY;
	55	m_transfer_length = 0;
	56	}
	57	else
	58	{
	59	SetDevice(image);
	60	scsihd_device::ExecCommand();
	61	}
	62	break;
	63	}
	64	}
	65
	66	void omti5100_device::ReadData( UINT8 *data, int dataLength )
	67	{
	68	switch( command[ 0 ] )
	69	{
	70	case OMTI_READ_DATA_BUFFER:
	71	data[0] = '5';
	72	data[1] = '1';
	73	data[2] = '0';
	74	data[3] = '0';
	75	break;
	76
	77	default:
	78	scsihd_device::ReadData( data, dataLength );
	79	break;
	80	}
	81	}
	82
	83	static MACHINE_CONFIG_FRAGMENT( omti5100 )
	84	MCFG_HARDDISK_ADD("image0")
	85	MCFG_HARDDISK_ADD("image1")
	86	MACHINE_CONFIG_END
	87
	88
	89	machine_config_constructor omti5100_device::device_mconfig_additions() const
	90	{
	91	return MACHINE_CONFIG_NAME( omti5100 );
	92	}

trunk/src/emu/bus/scsi/omti5100.h

r0	r243786
	1	#ifndef OMTI5100_H_
	2	#define OMTI5100_H_
	3
	4	#include "emu.h"
	5	#include "scsi.h"
	6	#include "scsihd.h"
	7	#include "imagedev/harddriv.h"
	8
	9	class omti5100_device : public scsihd_device
	10	{
	11	public:
	12	omti5100_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
	13
	14	virtual machine_config_constructor device_mconfig_additions() const;
	15	//virtual const rom_entry *device_rom_region() const;
	16
	17	virtual void ExecCommand();
	18	virtual void ReadData( UINT8 *data, int dataLength );
	19	void device_start();
	20
	21	private:
	22	required_device<harddisk_image_device> m_image0;
	23	required_device<harddisk_image_device> m_image1;
	24	};
	25
	26	extern const device_type OMTI5100;
	27
	28	#endif /* OMTI5100_H_ */

trunk/src/emu/machine/machine.mak

r243785	r243786
1221	1221
1222	1222	#-------------------------------------------------
1223	1223	#
1224		#@src/emu/machine/omti5100.h,MACHINES += OMTI5100
1225		#-------------------------------------------------
1226
1227		ifneq ($(filter OMTI5100,$(MACHINES)),)
1228		MACHINEOBJS += $(MACHINEOBJ)/omti5100.o
1229		endif
1230
1231		#-------------------------------------------------
1232		#
1233	1224	#@src/emu/machine/pcf8593.h,MACHINES += PCF8593
1234	1225	#-------------------------------------------------
1235	1226

trunk/src/emu/machine/omti5100.c

r243785	r243786
1		/***************************************************************************
2
3		SMS OMTI 5100
4
5		license: MAME, GPL-2.0+
6		copyright-holders: Dirk Best
7
8		SCSI/SASI Intelligent Data Controller
9
10		Note: - Skeleton device
11		- Supports up to two ST-506/412 hard drives
12		- Z8681 (Z8)
13		- 8 KB RAM
14		- 2 KB Buffer RAM
15
16		***************************************************************************/
17
18		#include "omti5100.h"
19
20
21		//**************************************************************************
22		//  CONSTANTS
23		//**************************************************************************
24
25		#define VERBOSE 1
26
27
28		//**************************************************************************
29		//  DEVICE DEFINITIONS
30		//**************************************************************************
31
32		const device_type OMTI5100 = &device_creator<omti5100_device>;
33
34		//-------------------------------------------------
35		//  rom_region - device-specific ROM region
36		//-------------------------------------------------
37
38		ROM_START( omti5100_firmware )
39		ROM_REGION(0x2000, "firmware", 0)
40		ROM_LOAD("1002401-n.7a", 0x0000, 0x2000, CRC(d531e25c) SHA1(22e4762a70841b80e843a5d76175c1fdb6838e18))
41		ROM_END
42
43		const rom_entry *omti5100_device::device_rom_region() const
44		{
45		return ROM_NAME( omti5100_firmware );
46		}
47
48		//-------------------------------------------------
49		//  machine_config_additions - device-specific
50		//  machine configurations
51		//-------------------------------------------------
52
53		static MACHINE_CONFIG_FRAGMENT( omti5100_z8 )
54		//  MCFG_CPU_ADD("z8", Z8681, XTAL_20MHz / 3 /* ??? */)
55		MACHINE_CONFIG_END
56
57		machine_config_constructor omti5100_device::device_mconfig_additions() const
58		{
59		return MACHINE_CONFIG_NAME( omti5100_z8 );
60		}
61
62
63		//**************************************************************************
64		//  LIVE DEVICE
65		//**************************************************************************
66
67		//-------------------------------------------------
68		//  omti5100_device - constructor
69		//-------------------------------------------------
70
71		omti5100_device::omti5100_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
72		device_t(mconfig, OMTI5100, "OMTI 5100 SCSI/SASI Controller", tag, owner, clock, "omti5100", __FILE__),
73		//  m_cpu(*this, "z8"),
74		m_bsy_w(*this),
75		m_cd_w(*this),
76		m_io_w(*this),
77		m_req_w(*this),
78		m_msg_w(*this)
79		{
80		}
81
82		//-------------------------------------------------
83		//  device_start - device-specific startup
84		//-------------------------------------------------
85
86		void omti5100_device::device_start()
87		{
88		// resolve callbacks
89		m_bsy_w.resolve_safe();
90		m_cd_w.resolve_safe();
91		m_io_w.resolve_safe();
92		m_req_w.resolve_safe();
93		m_msg_w.resolve_safe();
94		}
95
96		//-------------------------------------------------
97		//  device_reset - device-specific reset
98		//-------------------------------------------------
99
100		void omti5100_device::device_reset()
101		{
102		}
103
104
105		//**************************************************************************
106		//  IMPLEMENTATION
107		//**************************************************************************
108
109		READ8_MEMBER( omti5100_device::data_r )
110		{
111		if (VERBOSE)
112		logerror("%s: data_r\n", tag());
113
114		return 0xff;
115		}
116
117		WRITE8_MEMBER( omti5100_device::data_w )
118		{
119		if (VERBOSE)
120		logerror("%s: rst_w: %02x\n", tag(), data);
121		}
122
123		READ_LINE_MEMBER( omti5100_device::parity_r )
124		{
125		if (VERBOSE)
126		logerror("%s: parity_r\n", tag());
127
128		return 1;
129		}
130
131		WRITE_LINE_MEMBER( omti5100_device::parity_w )
132		{
133		if (VERBOSE)
134		logerror("%s: parity_w: %d\n", tag(), state);
135		}
136
137		WRITE_LINE_MEMBER( omti5100_device::rst_w )
138		{
139		if (VERBOSE)
140		logerror("%s: rst_w: %d\n", tag(), state);
141		}
142
143		WRITE_LINE_MEMBER( omti5100_device::sel_w )
144		{
145		if (VERBOSE)
146		logerror("%s: sel_w: %d\n", tag(), state);
147		}
148
149		WRITE_LINE_MEMBER( omti5100_device::ack_w )
150		{
151		if (VERBOSE)
152		logerror("%s: ack_w: %d\n", tag(), state);
153		}

trunk/src/emu/machine/omti5100.h

r243785	r243786
1		/***************************************************************************
2
3		SMS OMTI 5100
4
5		license: MAME, GPL-2.0+
6		copyright-holders: Dirk Best
7
8		SCSI/SASI Intelligent Data Controller
9
10		***************************************************************************/
11
12		#pragma once
13
14		#ifndef __OMTI5100_H__
15		#define __OMTI5100_H__
16
17		#include "emu.h"
18		#include "cpu/z8/z8.h"
19
20
21		//**************************************************************************
22		//  INTERFACE CONFIGURATION MACROS
23		//**************************************************************************
24
25		#define MCFG_OMTI5100_ADD(_tag) \
26		MCFG_DEVICE_ADD(_tag, OMTI5100, 0)
27
28		#define MCFG_OMTI5100_BSY_HANDLER(_devcb) \
29		devcb = &omti5100_device::set_bsy_handler(*device, DEVCB_##_devcb);
30
31		#define MCFG_OMTI5100_CD_HANDLER(_devcb) \
32		devcb = &omti5100_device::set_cd_handler(*device, DEVCB_##_devcb);
33
34		#define MCFG_OMTI5100_IO_HANDLER(_devcb) \
35		devcb = &omti5100_device::set_io_handler(*device, DEVCB_##_devcb);
36
37		#define MCFG_OMTI5100_REQ_HANDLER(_devcb) \
38		devcb = &omti5100_device::set_req_handler(*device, DEVCB_##_devcb);
39
40		#define MCFG_OMTI5100_MSG_HANDLER(_devcb) \
41		devcb = &omti5100_device::set_msg_handler(*device, DEVCB_##_devcb);
42
43
44		//**************************************************************************
45		//  TYPE DEFINITIONS
46		//**************************************************************************
47
48		// ======================> omti5100_device
49
50		class omti5100_device : public device_t
51		{
52		public:
53		// construction/destruction
54		omti5100_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
55
56		// callbacks
57		template<class _Object> static devcb_base &set_bsy_handler(device_t &device, _Object object)
58		{ return downcast<omti5100_device &>(device).m_bsy_w.set_callback(object); }
59
60		template<class _Object> static devcb_base &set_cd_handler(device_t &device, _Object object)
61		{ return downcast<omti5100_device &>(device).m_cd_w.set_callback(object); }
62
63		template<class _Object> static devcb_base &set_io_handler(device_t &device, _Object object)
64		{ return downcast<omti5100_device &>(device).m_io_w.set_callback(object); }
65
66		template<class _Object> static devcb_base &set_req_handler(device_t &device, _Object object)
67		{ return downcast<omti5100_device &>(device).m_req_w.set_callback(object); }
68
69		template<class _Object> static devcb_base &set_msg_handler(device_t &device, _Object object)
70		{ return downcast<omti5100_device &>(device).m_msg_w.set_callback(object); }
71
72		// data
73		DECLARE_READ8_MEMBER( data_r );
74		DECLARE_WRITE8_MEMBER( data_w );
75		DECLARE_READ_LINE_MEMBER( parity_r );
76		DECLARE_WRITE_LINE_MEMBER( parity_w );
77
78		// control
79		DECLARE_WRITE_LINE_MEMBER( rst_w );
80		DECLARE_WRITE_LINE_MEMBER( sel_w );
81		DECLARE_WRITE_LINE_MEMBER( ack_w );
82
83		protected:
84		// device_t overrides
85		virtual const rom_entry *device_rom_region() const;
86		virtual machine_config_constructor device_mconfig_additions() const;
87		virtual void device_start();
88		virtual void device_reset();
89
90		private:
91		//  required_device<z8681_device> m_cpu;
92
93		devcb_write_line m_bsy_w;
94		devcb_write_line m_cd_w;
95		devcb_write_line m_io_w;
96		devcb_write_line m_req_w;
97		devcb_write_line m_msg_w;
98		};
99
100		// device type definition
101		extern const device_type OMTI5100;
102
103		#endif // __OMTI5100_H__

trunk/src/emu/machine/pic8259.c

r243785	r243786
44	44	{
45	45	logerror("pic8259_timerproc() %s: PIC triggering IRQ #%d\n", tag(), irq);
46	46	}
47		if (!BIT(m_ocw3, 2))
48		{
49		m_out_int_func(1);
50		}
	47	m_out_int_func(1);
51	48	return;
52	49	}
53	50	// if sfnm and in-service don't continue
54	51	if((m_isr & mask) && m_master && m_cascade && m_nested && (m_slave & mask))
55	52	break;
56	53	}
57		if (!BIT(m_ocw3, 2))
58		{
59		m_out_int_func(0);
60		}
	54	m_out_int_func(0);
61	55	}
62	56
63	57

trunk/src/emu/machine/wd_fdc.c

r243785	r243786
273	273	}
274	274
275	275	if(main_state == SEEK && track == data) {
276		sub_state = SEEK_DONE;
	276	sub_state = SEEK_WAIT_STABILIZATION_TIME;
	277	delay_cycles(t_gen, 30000);
277	278	}
278	279
279	280	if(sub_state == SPINUP_DONE) {

trunk/src/mess/drivers/pcd.c

r243785	r243786
15	15	#include "machine/nvram.h"
16	16	#include "machine/pic8259.h"
17	17	#include "machine/mc2661.h"
18		#include "machine/omti5100.h"
19	18	#include "machine/wd_fdc.h"
20	19	#include "machine/mc146818.h"
	20	#include "machine/pcd_kbd.h"
21	21	#include "sound/speaker.h"
22	22	#include "video/scn2674.h"
23	23	#include "formats/pc_dsk.h"
	24	#include "bus/scsi/omti5100.h"
24	25
25	26	//**************************************************************************
26	27	//  TYPE DEFINITIONS
r243785	r243786
35	36	m_pic1(*this, "pic1"),
36	37	m_pic2(*this, "pic2"),
37	38	m_speaker(*this, "speaker"),
38		m_sasi(*this, "sasi"),
39	39	m_fdc(*this, "fdc"),
40	40	m_rtc(*this, "rtc"),
41	41	m_crtc(*this, "crtc"),
42	42	m_palette(*this, "palette"),
43	43	m_gfxdecode(*this, "gfxdecode"),
	44	m_scsi(*this, "scsi"),
	45	m_scsi_data_out(*this, "scsi_data_out"),
	46	m_scsi_data_in(*this, "scsi_data_in"),
44	47	m_vram(*this, "vram"),
45	48	m_charram(8*1024)
46	49	{ }
r243785	r243786
59	62	DECLARE_WRITE8_MEMBER( led_w );
60	63	DECLARE_READ8_MEMBER( detect_r );
61	64	DECLARE_WRITE8_MEMBER( detect_w );
62		DECLARE_READ8_MEMBER( dskctl_r );
63		DECLARE_WRITE8_MEMBER( dskctl_w );
	65	DECLARE_READ16_MEMBER( dskctl_r );
	66	DECLARE_WRITE16_MEMBER( dskctl_w );
64	67	DECLARE_READ8_MEMBER( mcu_r );
65	68	DECLARE_WRITE8_MEMBER( mcu_w );
	69	DECLARE_READ8_MEMBER( scsi_r );
	70	DECLARE_WRITE8_MEMBER( scsi_w );
66	71	DECLARE_WRITE8_MEMBER( vram_sw_w );
67		DECLARE_READ16_MEMBER( vram_r );
68	72	DECLARE_WRITE16_MEMBER( vram_w );
69	73	SCN2674_DRAW_CHARACTER_MEMBER(display_pixels);
70	74	DECLARE_FLOPPY_FORMATS( floppy_formats );
	75	DECLARE_WRITE_LINE_MEMBER(write_scsi_bsy);
	76	DECLARE_WRITE_LINE_MEMBER(write_scsi_cd);
	77	DECLARE_WRITE_LINE_MEMBER(write_scsi_io);
	78	DECLARE_WRITE_LINE_MEMBER(write_scsi_msg);
	79	DECLARE_WRITE_LINE_MEMBER(write_scsi_req);
71	80
72	81	protected:
73	82	// driver_device overrides
74	83	virtual void machine_start();
75	84	virtual void machine_reset();
	85	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
76	86
77	87	private:
78	88	required_device<i80186_cpu_device> m_maincpu;
79	89	required_device<pic8259_device> m_pic1;
80	90	required_device<pic8259_device> m_pic2;
81	91	required_device<speaker_sound_device> m_speaker;
82		required_device<omti5100_device> m_sasi;
83	92	required_device<wd2793_t> m_fdc;
84	93	required_device<mc146818_device> m_rtc;
85	94	required_device<scn2674_device> m_crtc;
86	95	required_device<palette_device> m_palette;
87	96	required_device<gfxdecode_device> m_gfxdecode;
	97	required_device<SCSI_PORT_DEVICE> m_scsi;
	98	required_device<output_latch_device> m_scsi_data_out;
	99	required_device<input_buffer_device> m_scsi_data_in;
88	100	required_shared_ptr<UINT16> m_vram;
89	101	dynamic_buffer m_charram;
90		UINT8 m_stat, m_led, m_dskctl, m_vram_sw;
	102	UINT8 m_stat, m_led, m_vram_sw;
	103	int m_msg, m_bsy, m_io, m_cd, m_req, m_rst;
	104	emu_timer *m_req_hack;
	105	UINT16 m_dskctl;
91	106	};
92	107
93	108
r243785	r243786
107	122	{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8, 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8 },
108	123	8*16
109	124	};
	125
	126	void pcd_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
	127	{
	128	// TODO: remove this hack
	129	if(m_req)
	130	m_maincpu->drq0_w(1);
	131	}
	132
110	133	void pcd_state::machine_start()
111	134	{
112	135	m_gfxdecode->set_gfx(0, global_alloc(gfx_element(machine().device<palette_device>("palette"), pcd_charlayout, m_charram, 0, 1, 0)));
	136	m_req_hack = timer_alloc();
113	137	}
114	138
115	139	void pcd_state::machine_reset()
r243785	r243786
118	142	m_led = 0;
119	143	m_dskctl = 0;
120	144	m_vram_sw = 1;
	145	m_rst = 0;
121	146	}
122	147
123	148	READ8_MEMBER( pcd_state::irq_callback )
r243785	r243786
136	161	m_speaker->level_w(state);
137	162	}
138	163
139		READ16_MEMBER( pcd_state::vram_r )
140		{
141		return m_vram[offset];
142		}
143
144	164	WRITE16_MEMBER( pcd_state::vram_w )
145	165	{
146	166	if(m_vram_sw)
r243785	r243786
216	236	{
217	237	}
218	238
219		READ8_MEMBER( pcd_state::dskctl_r )
	239	READ16_MEMBER( pcd_state::dskctl_r )
220	240	{
221	241	return m_dskctl;
222	242	}
223	243
224		WRITE8_MEMBER( pcd_state::dskctl_w )
	244	WRITE16_MEMBER( pcd_state::dskctl_w )
225	245	{
226	246	floppy_image_device *floppy0 = m_fdc->subdevice<floppy_connector>("0")->get_device();
227	247	floppy_image_device *floppy1 = m_fdc->subdevice<floppy_connector>("1")->get_device();
228	248
229		if((data & 1) && floppy0)
	249	COMBINE_DATA(&m_dskctl);
	250
	251	if((m_dskctl & 1) && floppy0)
230	252	m_fdc->set_floppy(floppy0);
231	253
232	254	if(floppy0)
233	255	{
234		floppy0->mon_w(!(data & 4));
235		floppy0->ss_w((data & 8) != 0);
	256	floppy0->mon_w(!(m_dskctl & 4));
	257	floppy0->ss_w((m_dskctl & 8) != 0);
236	258	}
237	259	if(floppy1)
238	260	{
239		floppy1->mon_w(!(data & 4));
240		floppy1->ss_w((data & 8) != 0);
	261	floppy1->mon_w(!(m_dskctl & 4));
	262	floppy1->ss_w((m_dskctl & 8) != 0);
241	263	}
242		m_dskctl = data;
243	264	}
244	265
245	266	READ8_MEMBER( pcd_state::led_r )
r243785	r243786
266	287	UINT16 data = m_vram[address];
267	288	data = (data >> 8) | (data << 8);
268	289	for(int i = 0; i < 16; i++)
269		bitmap.pix32(y, x + i) = m_palette->pen((data & (1 << (16 - i))) ? 1 : 0);
	290	bitmap.pix32(y, x + i) = m_palette->pen((data & (1 << (15 - i))) ? 1 : 0);
270	291	}
271	292	else
272	293	{
273	294	UINT8 data = m_charram[(m_vram[address] & 0xff) * 16 + linecount];
274	295	for(int i = 0; i < 8; i++)
275		bitmap.pix32(y, x + i) = m_palette->pen((data & (1 << (8 - i))) ? 1 : 0);
	296	bitmap.pix32(y, x + i) = m_palette->pen((data & (1 << (7 - i))) ? 1 : 0);
276	297	}
277	298	}
278	299
	300	READ8_MEMBER(pcd_state::scsi_r)
	301	{
	302	UINT8 ret = 0;
	303
	304	switch(offset)
	305	{
	306	case 0:
	307	case 2:
	308	ret = m_scsi_data_in->read();
	309	m_scsi->write_ack(1);
	310	if(!offset)
	311	m_maincpu->drq0_w(0);
	312	break;
	313
	314	case 1:
	315	ret = (m_cd << 7) | (m_req << 5) | (m_bsy << 4);
	316	break;
	317	}
	318
	319	return ret;
	320	}
	321
	322	WRITE8_MEMBER(pcd_state::scsi_w)
	323	{
	324	switch(offset)
	325	{
	326	case 0:
	327	m_scsi_data_out->write(data);
	328	m_scsi->write_ack(1);
	329	if(m_cd)
	330	{
	331	m_maincpu->drq0_w(0);
	332	m_req_hack->adjust(attotime::never);
	333	}
	334	break;
	335	case 1:
	336	if(data & 4)
	337	{
	338	m_rst = 1;
	339	m_scsi->write_rst(1);
	340	break;
	341	}
	342	if(m_rst)
	343	{
	344	m_rst = 0;
	345	m_scsi->write_rst(0);
	346	break;
	347	}
	348
	349	if(!m_bsy)
	350	{
	351	m_scsi_data_out->write(0);
	352	m_scsi->write_sel(1);
	353	}
	354	break;
	355	}
	356	}
	357
	358	WRITE_LINE_MEMBER(pcd_state::write_scsi_bsy)
	359	{
	360	m_bsy = state ? 1 : 0;
	361	m_scsi->write_sel(0);
	362	}
	363	WRITE_LINE_MEMBER(pcd_state::write_scsi_cd)
	364	{
	365	m_cd = state ? 1 : 0;
	366	}
	367	WRITE_LINE_MEMBER(pcd_state::write_scsi_io)
	368	{
	369	m_io = state ? 1 : 0;
	370	}
	371	WRITE_LINE_MEMBER(pcd_state::write_scsi_msg)
	372	{
	373	m_msg = state ? 1 : 0;
	374	}
	375
	376	WRITE_LINE_MEMBER(pcd_state::write_scsi_req)
	377	{
	378	m_req = state ? 1 : 0;
	379	if(state)
	380	{
	381	if(!m_cd)
	382	{
	383	m_maincpu->drq0_w(1);
	384	m_req_hack->adjust(attotime::from_msec(10)); // poke the dmac
	385	}
	386	else if(m_msg)
	387	{
	388	m_scsi_data_in->read();
	389	m_scsi->write_ack(1);
	390	}
	391	}
	392	else
	393	m_scsi->write_ack(0);
	394	}
279	395	//**************************************************************************
280	396	//  ADDRESS MAPS
281	397	//**************************************************************************
282	398
283	399	static ADDRESS_MAP_START( pcd_map, AS_PROGRAM, 16, pcd_state )
284	400	AM_RANGE(0x00000, 0x3ffff) AM_RAM // fixed 256k for now
285		AM_RANGE(0xf0000, 0xf7fff) AM_READWRITE(vram_r, vram_w) AM_SHARE("vram")
	401	AM_RANGE(0xf0000, 0xf7fff) AM_READONLY AM_WRITE(vram_w) AM_SHARE("vram")
286	402	AM_RANGE(0xfc000, 0xfffff) AM_ROM AM_REGION("bios", 0)
287	403	AM_RANGE(0x00000, 0xfffff) AM_READWRITE8(nmi_io_r, nmi_io_w, 0xffff)
288	404	ADDRESS_MAP_END
r243785	r243786
297	413	AM_RANGE(0xf840, 0xf841) AM_READWRITE8(led_r, led_w, 0xff00)
298	414	AM_RANGE(0xf880, 0xf8bf) AM_READWRITE8(rtc_r, rtc_w, 0xffff)
299	415	AM_RANGE(0xf900, 0xf903) AM_DEVREADWRITE8("fdc", wd2793_t, read, write, 0xffff)
300		AM_RANGE(0xf904, 0xf905) AM_READWRITE8(dskctl_r, dskctl_w, 0x00ff)
301		//AM_RANGE(0xf940, 0xf943) scsi
	416	AM_RANGE(0xf904, 0xf905) AM_READWRITE(dskctl_r, dskctl_w)
	417	AM_RANGE(0xf940, 0xf943) AM_READWRITE8(scsi_r, scsi_w, 0xffff)
302	418	AM_RANGE(0xf980, 0xf98f) AM_DEVWRITE8("crtc", scn2674_device, write, 0x00ff)
303	419	AM_RANGE(0xf980, 0xf98f) AM_DEVREAD8("crtc", scn2674_device, read, 0xff00)
304	420	AM_RANGE(0xf9a0, 0xf9a1) AM_WRITE8(vram_sw_w, 0x00ff)
r243785	r243786
347	463	// nvram
348	464	MCFG_NVRAM_ADD_1FILL("nvram")
349	465
350		// sasi controller
351		MCFG_OMTI5100_ADD("sasi")
352
353	466	// floppy disk controller
354	467	MCFG_WD2793x_ADD("fdc", XTAL_16MHz/8/2)
355	468	MCFG_WD_FDC_INTRQ_CALLBACK(DEVWRITELINE("pic1", pic8259_device, ir6_w))
r243785	r243786
361	474
362	475	// usart
363	476	MCFG_DEVICE_ADD("usart1", MC2661, XTAL_4_9152MHz)
364		MCFG_MC2661_TXEMT_DSCHG_HANDLER(DEVWRITELINE("pic1", pic8259_device, ir2_w))
	477	MCFG_MC2661_RXRDY_HANDLER(DEVWRITELINE("pic1", pic8259_device, ir3_w))
	478	MCFG_MC2661_TXRDY_HANDLER(DEVWRITELINE("pic1", pic8259_device, ir3_w))
365	479	MCFG_DEVICE_ADD("usart2", MC2661, XTAL_4_9152MHz)
366		MCFG_MC2661_TXEMT_DSCHG_HANDLER(DEVWRITELINE("pic1", pic8259_device, ir3_w))
	480	MCFG_MC2661_RXRDY_HANDLER(DEVWRITELINE("pic1", pic8259_device, ir2_w))
	481	//MCFG_MC2661_TXRDY_HANDLER(DEVWRITELINE("pic1", pic8259_device, ir2_w)) // this gets stuck high causing the keyboard to not work
	482	MCFG_MC2661_TXD_HANDLER(DEVWRITELINE("keyboard", pcd_keyboard_device, t0_w))
367	483	MCFG_DEVICE_ADD("usart3", MC2661, XTAL_4_9152MHz)
368		MCFG_MC2661_TXEMT_DSCHG_HANDLER(DEVWRITELINE("pic1", pic8259_device, ir4_w))
	484	MCFG_MC2661_RXRDY_HANDLER(DEVWRITELINE("pic1", pic8259_device, ir4_w))
	485	MCFG_MC2661_TXRDY_HANDLER(DEVWRITELINE("pic1", pic8259_device, ir4_w))
369	486
370	487	// sound hardware
371	488	MCFG_SPEAKER_STANDARD_MONO("mono")
r243785	r243786
390	507	// rtc
391	508	MCFG_MC146818_ADD("rtc", XTAL_32_768kHz)
392	509	MCFG_MC146818_IRQ_HANDLER(DEVWRITELINE("pic1", pic8259_device, ir7_w))
	510
	511	MCFG_DEVICE_ADD("keyboard", PCD_KEYBOARD, 0)
	512	MCFG_PCD_KEYBOARD_OUT_TX_HANDLER(DEVWRITELINE("usart2", mc2661_device, rx_w))
	513
	514	MCFG_DEVICE_ADD("scsi", SCSI_PORT, 0)
	515	MCFG_SCSI_DATA_INPUT_BUFFER("scsi_data_in")
	516	MCFG_SCSI_MSG_HANDLER(WRITELINE(pcd_state, write_scsi_msg))
	517	MCFG_SCSI_BSY_HANDLER(WRITELINE(pcd_state, write_scsi_bsy))
	518	MCFG_SCSI_IO_HANDLER(WRITELINE(pcd_state, write_scsi_io))
	519	MCFG_SCSI_CD_HANDLER(WRITELINE(pcd_state, write_scsi_cd))
	520	MCFG_SCSI_REQ_HANDLER(WRITELINE(pcd_state, write_scsi_req))
	521
	522	MCFG_SCSI_OUTPUT_LATCH_ADD("scsi_data_out", "scsi")
	523	MCFG_DEVICE_ADD("scsi_data_in", INPUT_BUFFER, 0)
	524	MCFG_SCSIDEV_ADD("scsi:1", "harddisk", OMTI5100, SCSI_ID_0)
393	525	MACHINE_CONFIG_END
394	526
395	527
r243785	r243786
411	543	// gfx card (scn2674 with 8741), to be moved
412	544	ROM_REGION(0x400, "graphics", 0)
413	545	ROM_LOAD("s36361-d321-v1.bin", 0x000, 0x400, CRC(69baeb2a) SHA1(98b9cd0f38c51b4988a3aed0efcf004bedd115ff))
414
415		// keyboard (8035), to be moved
416		ROM_REGION(0x1000, "keyboard", 0)
417		ROM_LOAD("pcd_keyboard.bin", 0x0000, 0x1000, CRC(d227d6cb) SHA1(3d6140764d3d043428c941826370ebf1597c63bd))
418	546	ROM_END
419	547
420	548

trunk/src/mess/drivers/tispeak.c

r243785	r243786
68	68	- notes: this one has a dedicated voice actor
69	69
70	70	Speak & Spell (France) "La Dictee Magique", 1980
71		- MCU: CD2702*
	71	- MCU: CD2702**
72	72	- TMS51xx: 16KB CD2352
73	73
74	74	Speak & Spell (Germany) "Buddy", 1980
75		- MCU: CD2702* (same as French 1980 version)
	75	- MCU: CD2702** (same as French 1980 version)
76	76	- TMS51xx(1/2): 16KB CD2345*
77	77	- TMS51xx(2/2): 16KB CD2346*
78	78
79	79	Speak & Spell (Italy) "Grillo Parlante", 1982
80		- MCU: CD2702* (same as French 1980 version)
81		- TMS51xx: 16KB? CD62190*
	80	- MCU: CD2702** (same as French 1980 version)
	81	- TMS51xx: 16KB? CD62190**
82	82
83	83	Speak & Spell Compact (US), 1981
84		- MCU: CD8011*
	84	- MCU: CD8011**
85	85	- TMS51xx: 16KB CD2354
86	86	- TMS51xx: 16KB CD2354A (rev.A)
87	87	- notes: no display, MCU is TMS1100 instead of TMS0270
88	88
89	89	Speak & Spell Compact (UK) "Speak & Write", 1981
90		- MCU: CD8011* (same as US 1981 version)
	90	- MCU: CD8011** (same as US 1981 version)
91	91	- TMS51xx: 16KB CD62174 (rev.A)
92	92	- notes: anecdotes from the developer, the same person working on the original UK version:
93	93	"We included a pencil and writing pad - it was now about 'writing'.",
r243785	r243786
169	169	Touch & Tell:
170	170
171	171	Touch & Tell (US), 1981
172		- MCU: CD8012*
	172	- MCU: CD8012**
173	173	- TMS51xx: 4KB CD2610
174	174	- notes: MCU is TMS1100 instead of TMS0270. CD8010 is seen in some devices
175	175	too, maybe an earlier version?
r243785	r243786
242	242	Other devices:
243	243
244	244	Vocaid (US), 1982
245		- MCU: CD8012*
	245	- MCU: CD8012**
246	246	- CD2802: 16KB CD2357
247	247	- notes: MCU is the same as in Touch & Tell, but instead of a toddler's toy,
248	248	you get a serious medical aid device for the voice-impaired.

trunk/src/mess/machine/pcd_kbd.c

r0	r243786
	1	#include "pcd_kbd.h"
	2
	3	const device_type PCD_KEYBOARD = &device_creator<pcd_keyboard_device>;
	4
	5	ROM_START( pcd_keyboard )
	6	ROM_REGION(0x1000, "mcu", 0)
	7	ROM_LOAD("pcd_keyboard.bin", 0x0000, 0x1000, CRC(d227d6cb) SHA1(3d6140764d3d043428c941826370ebf1597c63bd))
	8	ROM_END
	9
	10
	11	const rom_entry *pcd_keyboard_device::device_rom_region() const
	12	{
	13	return ROM_NAME( pcd_keyboard );
	14	}
	15
	16	static ADDRESS_MAP_START( pcd_keyboard_map, AS_PROGRAM, 8, pcd_keyboard_device )
	17	AM_RANGE(0x000, 0xfff) AM_ROM
	18	ADDRESS_MAP_END
	19
	20	static ADDRESS_MAP_START( pcd_keyboard_io, AS_IO, 8, pcd_keyboard_device )
	21	AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_READ(bus_r)
	22	AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(p1_r, p1_w)
	23	AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(t0_r)
	24	ADDRESS_MAP_END
	25
	26	static MACHINE_CONFIG_FRAGMENT( pcd_keyboard )
	27	MCFG_CPU_ADD("mcu", I8035, 5760000*2) // FIXME: the mc2661 baud rate calculation
	28	MCFG_CPU_PROGRAM_MAP(pcd_keyboard_map)
	29	MCFG_CPU_IO_MAP(pcd_keyboard_io)
	30
	31	// sound hardware
	32	MCFG_SPEAKER_STANDARD_MONO("mono")
	33	MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0)
	34	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
	35	MACHINE_CONFIG_END
	36
	37	machine_config_constructor pcd_keyboard_device::device_mconfig_additions() const
	38	{
	39	return MACHINE_CONFIG_NAME( pcd_keyboard );
	40	}
	41
	42	INPUT_PORTS_START( pcd_keyboard )
	43	PORT_START("ROW.0")
	44	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_ESC) PORT_CHAR(UCHAR_MAMEKEY(ESC))
	45	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!')
	46	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q')
	47	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A')
	48	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_LALT) PORT_CHAR('<') PORT_CHAR('>')
	49	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
	50	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6_PAD) PORT_CHAR(UCHAR_MAMEKEY(6_PAD))
	51	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )
	52
	53	PORT_START("ROW.1")
	54	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F1) PORT_CHAR(UCHAR_MAMEKEY(F1))
	55	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('"')
	56	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W')
	57	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S')
	58	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y')
	59	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Unknown 0x79")
	60	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2_PAD) PORT_CHAR(UCHAR_MAMEKEY(2_PAD))
	61	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )
	62
	63	PORT_START("ROW.2")
	64	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F2) PORT_CHAR(UCHAR_MAMEKEY(F2))
	65	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') // shifted is U+00A7 section sign
	66	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E')
	67	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D')
	68	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X')
	69	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
	70	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_5_PAD) PORT_CHAR(UCHAR_MAMEKEY(5_PAD))
	71	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Keypad " UTF8_PLUSMINUS)
	72
	73	PORT_START("ROW.3")
	74	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F3) PORT_CHAR(UCHAR_MAMEKEY(F3))
	75	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$')
	76	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R')
	77	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F')
	78	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C')
	79	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Unknown 0x7C")
	80	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1_PAD) PORT_CHAR(UCHAR_MAMEKEY(1_PAD))
	81	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Keypad =") PORT_CODE(KEYCODE_ENTER_PAD) PORT_CHAR(UCHAR_MAMEKEY(ENTER_PAD))
	82
	83	PORT_START("ROW.4")
	84	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F4) PORT_CHAR(UCHAR_MAMEKEY(F4))
	85	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%')
	86	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T')
	87	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G')
	88	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V')
	89	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Unknown 0x7A")
	90	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Unknown 0x60")
	91	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Unknown 0x1F")
	92
	93	PORT_START("ROW.5")
	94	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Unknown 0x65")
	95	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&')
	96	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z')
	97	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H')
	98	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B')
	99	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
	100	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED )
	101	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME(UTF8_DOWN) PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN))
	102
	103	PORT_START("ROW.6")
	104	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F5) PORT_CHAR(UCHAR_MAMEKEY(F5))
	105	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('/')
	106	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U')
	107	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J')
	108	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N')
	109	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("SEITE")
	110	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Unknown 0x06")
	111	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Unknown 0x1D")
	112
	113	PORT_START("ROW.7")
	114	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F6) PORT_CHAR(UCHAR_MAMEKEY(F6))
	115	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(')
	116	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I')
	117	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K')
	118	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M')
	119	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("DRUCK")
	120	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_9_PAD) PORT_CHAR(UCHAR_MAMEKEY(9_PAD))
	121	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Unknown 0x18")
	122
	123	PORT_START("ROW.8")
	124	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F7) PORT_CHAR(UCHAR_MAMEKEY(F7))
	125	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR(')')
	126	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O')
	127	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L')
	128	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR(';')
	129	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("L" O_UMLAUT "CHEN") PORT_CODE(KEYCODE_DEL) PORT_CHAR(UCHAR_MAMEKEY(DEL))
	130	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Unknown 0x05")
	131	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("EINF" U_UMLAUT "GEN") PORT_CODE(KEYCODE_INSERT) PORT_CHAR(UCHAR_MAMEKEY(INSERT))
	132
	133	PORT_START("ROW.9")
	134	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F8) PORT_CHAR(UCHAR_MAMEKEY(F8))
	135	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR('=')
	136	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P')
	137	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("{") PORT_CODE(KEYCODE_COLON) PORT_CHAR('{') PORT_CHAR(0x00D6)
	138	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR(':')
	139	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Unknown 0x78")
	140	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Keypad +") PORT_CODE(KEYCODE_PLUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(PLUS_PAD))
	141	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Unknown 0x11")
	142
	143	PORT_START("ROW.10")
	144	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Unknown 0x6A")
	145	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("?") PORT_CODE(KEYCODE_MINUS) PORT_CHAR('?') PORT_CHAR('~')
	146	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("[") PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR(0x00DC)
	147	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("}") PORT_CODE(KEYCODE_QUOTE) PORT_CHAR('}') PORT_CHAR(0x00C4)
	148	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("-") PORT_CODE(KEYCODE_SLASH) PORT_CHAR('-') PORT_CHAR('_')
	149	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("D2")
	150	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4_PAD) PORT_CHAR(UCHAR_MAMEKEY(4_PAD))
	151	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME(UTF8_RIGHT) PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT))
	152
	153	PORT_START("ROW.11")
	154	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Unknown 0x6F")
	155	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Keypad ,") PORT_CODE(KEYCODE_DEL_PAD) PORT_CHAR(UCHAR_MAMEKEY(DEL_PAD))
	156	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("CE")
	157	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3_PAD) PORT_CHAR(UCHAR_MAMEKEY(3_PAD))
	158	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED )
	159	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Unknown 0x70")
	160	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Keypad -") PORT_CODE(KEYCODE_MINUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(MINUS_PAD))
	161	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("ZEILE")
	162
	163	PORT_START("ROW.12")
	164	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F12) PORT_CHAR(UCHAR_MAMEKEY(F12))
	165	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Unknown 0x10")
	166	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("HILFE")
	167	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME(UTF8_UP) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP))
	168	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ')
	169	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Unknown 0x77")
	170	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Keypad " UTF8_MULTIPLY) PORT_CODE(KEYCODE_ASTERISK)
	171	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_RALT)
	172
	173	PORT_START("ROW.13")
	174	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F11) PORT_CHAR(UCHAR_MAMEKEY(F11))
	175	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8)
	176	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("TABL")
	177	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("UP/LEFT")
	178	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Unknown 0x12")
	179	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7_PAD) PORT_CHAR(UCHAR_MAMEKEY(7_PAD))
	180	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_0_PAD) PORT_CHAR(UCHAR_MAMEKEY(0_PAD))
	181
	182	PORT_START("ROW.14")
	183	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F10) PORT_CHAR(UCHAR_MAMEKEY(F10))
	184	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('\\') PORT_CHAR('|')
	185	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_ENTER) PORT_CHAR('\r')
	186	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("TABR") PORT_CODE(KEYCODE_TAB) PORT_CHAR('\t')
	187	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME(UTF8_LEFT) PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT))
	188	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Unknown 0x71")
	189	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Unknown 0x04")
	190	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Keypad " UTF8_DIVIDE) PORT_CODE(KEYCODE_SLASH_PAD)
	191
	192	PORT_START("ROW.15")
	193	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F9) PORT_CHAR(UCHAR_MAMEKEY(F9))
	194	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("'") PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('\'') PORT_CHAR('`')
	195	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("]") PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(']') PORT_CHAR('*')
	196	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("#") PORT_CHAR('#') PORT_CHAR('^')
	197	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED )
	198	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("D1")
	199	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_8_PAD) PORT_CHAR(UCHAR_MAMEKEY(8_PAD))
	200	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Unknown 0x0C")
	201
	202	PORT_START("ROW.16")
	203	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNUSED )
	204	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("PAUSE") PORT_CODE(KEYCODE_PAUSE)
	205	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNUSED )
	206	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("LOCK") PORT_CODE(KEYCODE_CAPSLOCK)
	207	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("SHIFT") PORT_CODE(KEYCODE_LSHIFT)
	208	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Unknown 0x3C")
	209	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Unknown 0x7E")
	210	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )
	211	INPUT_PORTS_END
	212
	213
	214	ioport_constructor pcd_keyboard_device::device_input_ports() const
	215	{
	216	return INPUT_PORTS_NAME( pcd_keyboard );
	217	}
	218
	219	pcd_keyboard_device::pcd_keyboard_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
	220	: device_t(mconfig, PCD_KEYBOARD, "PC-D Keyboard", tag, owner, clock, "pcd_kbd", __FILE__),
	221	m_rows(*this, "ROW"),
	222	m_data(0),
	223	m_p1(0),
	224	m_out_tx_handler(*this)
	225	{
	226	}
	227
	228	void pcd_keyboard_device::device_start()
	229	{
	230	m_out_tx_handler.resolve_safe();
	231	m_out_tx_handler(1);
	232	}
	233
	234	READ8_MEMBER( pcd_keyboard_device::bus_r )
	235	{
	236	if(m_p1 & 0x10)
	237	return m_rows[16]->read();
	238	return m_rows[m_p1 & 0xf]->read();
	239	}
	240
	241	READ8_MEMBER( pcd_keyboard_device::p1_r )
	242	{
	243	return m_p1;
	244	}
	245
	246	WRITE8_MEMBER( pcd_keyboard_device::p1_w )
	247	{
	248	m_p1 = data;
	249	m_out_tx_handler(BIT(data, 5));
	250	}
	251
	252	READ8_MEMBER( pcd_keyboard_device::t0_r )
	253	{
	254	return m_t0;
	255	}
	256
	257	WRITE_LINE_MEMBER( pcd_keyboard_device::t0_w )
	258	{
	259	m_t0 = state;
	260	}

trunk/src/mess/machine/pcd_kbd.h

r0	r243786
	1	#ifndef PCD_KBD_H_
	2	#define PCD_KBD_H_
	3
	4	#include "emu.h"
	5	#include "cpu/mcs48/mcs48.h"
	6	#include "sound/speaker.h"
	7
	8	#define MCFG_PCD_KEYBOARD_OUT_TX_HANDLER(_devcb) \
	9	devcb = &pcd_keyboard_device::set_out_tx_handler(*device, DEVCB_##_devcb);
	10
	11	class pcd_keyboard_device :  public device_t
	12	{
	13	public:
	14	pcd_keyboard_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
	15
	16	template<class _Object> static devcb_base &set_out_tx_handler(device_t &device, _Object object) { return downcast<pcd_keyboard_device &>(device).m_out_tx_handler.set_callback(object); }
	17
	18	virtual const rom_entry *device_rom_region() const;
	19	virtual machine_config_constructor device_mconfig_additions() const;
	20	virtual ioport_constructor device_input_ports() const;
	21
	22	void device_start();
	23
	24	DECLARE_READ8_MEMBER( bus_r );
	25	DECLARE_READ8_MEMBER( p1_r );
	26	DECLARE_WRITE8_MEMBER( p1_w );
	27	DECLARE_READ8_MEMBER( t0_r );
	28	DECLARE_WRITE_LINE_MEMBER( t0_w );
	29	private:
	30	required_ioport_array<17> m_rows;
	31	UINT8 m_data, m_p1;
	32	bool m_t0;
	33	devcb_write_line m_out_tx_handler;
	34	};
	35
	36	extern const device_type PCD_KEYBOARD;
	37
	38	#endif /* PCD_KBD_H_ */

trunk/src/mess/mess.mak

r243785	r243786
1661	1661
1662	1662	$(MESSOBJ)/siemens.a:           \
1663	1663	$(MESS_DRIVERS)/pcd.o       \
	1664	$(MESS_MACHINE)/pcd_kbd.o       \
1664	1665
1665	1666	$(MESSOBJ)/slicer.a:           \
1666	1667	$(MESS_DRIVERS)/slicer.o   \

trunk/src/osd/windows/windows.mak

r243785	r243786
477	477	$(MOC) $(INCPATH) $< -o $@
478	478
479	479	OSDOBJS += \
480		$(OSDOBJ)/modules/debugger/qt/debugqtview.o \
481		$(OSDOBJ)/modules/debugger/qt/debugqtwindow.o \
482		$(OSDOBJ)/modules/debugger/qt/debugqtlogwindow.o \
483		$(OSDOBJ)/modules/debugger/qt/debugqtdasmwindow.o \
484		$(OSDOBJ)/modules/debugger/qt/debugqtmainwindow.o \
485		$(OSDOBJ)/modules/debugger/qt/debugqtmemorywindow.o \
486		$(OSDOBJ)/modules/debugger/qt/debugqtbreakpointswindow.o \
487		$(OSDOBJ)/modules/debugger/qt/debugqtdeviceswindow.o \
488		$(OSDOBJ)/modules/debugger/qt/debugqtdeviceinformationwindow.o \
489		$(OSDOBJ)/modules/debugger/qt/debugqtview.moc.o \
490		$(OSDOBJ)/modules/debugger/qt/debugqtwindow.moc.o \
491		$(OSDOBJ)/modules/debugger/qt/debugqtlogwindow.moc.o \
492		$(OSDOBJ)/modules/debugger/qt/debugqtdasmwindow.moc.o \
493		$(OSDOBJ)/modules/debugger/qt/debugqtmainwindow.moc.o \
494		$(OSDOBJ)/modules/debugger/qt/debugqtmemorywindow.moc.o \
495		$(OSDOBJ)/modules/debugger/qt/debugqtbreakpointswindow.moc.o \
496		$(OSDOBJ)/modules/debugger/qt/debugqtdeviceswindow.moc.o \
497		$(OSDOBJ)/modules/debugger/qt/debugqtdeviceinformationwindow.moc.o
	480	$(OSDOBJ)/modules/debugger/qt/debuggerview.o \
	481	$(OSDOBJ)/modules/debugger/qt/windowqt.o \
	482	$(OSDOBJ)/modules/debugger/qt/logwindow.o \
	483	$(OSDOBJ)/modules/debugger/qt/dasmwindow.o \
	484	$(OSDOBJ)/modules/debugger/qt/mainwindow.o \
	485	$(OSDOBJ)/modules/debugger/qt/memorywindow.o \
	486	$(OSDOBJ)/modules/debugger/qt/breakpointswindow.o \
	487	$(OSDOBJ)/modules/debugger/qt/deviceswindow.o \
	488	$(OSDOBJ)/modules/debugger/qt/deviceinformationwindow.o \
	489	$(OSDOBJ)/modules/debugger/qt/debuggerview.moc.o \
	490	$(OSDOBJ)/modules/debugger/qt/windowqt.moc.o \
	491	$(OSDOBJ)/modules/debugger/qt/logwindow.moc.o \
	492	$(OSDOBJ)/modules/debugger/qt/dasmwindow.moc.o \
	493	$(OSDOBJ)/modules/debugger/qt/mainwindow.moc.o \
	494	$(OSDOBJ)/modules/debugger/qt/memorywindow.moc.o \
	495	$(OSDOBJ)/modules/debugger/qt/breakpointswindow.moc.o \
	496	$(OSDOBJ)/modules/debugger/qt/deviceswindow.moc.o \
	497	$(OSDOBJ)/modules/debugger/qt/deviceinformationwindow.moc.o
498	498	endif
499	499
500	500	#-------------------------------------------------

https://github.com/mamedev/mame/commit/a7e6dbdef2b30fe94695472b6ec440b88c58dfa1

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