trunk/src/mess/drivers/pc9801.c
r243668 | r243669 | |
1410 | 1410 | { |
1411 | 1411 | if(BIT(m_egc.regs[2], 10)) |
1412 | 1412 | { |
1413 | | m_egc.leftover[0] = m_egc.leftover[1] = m_egc.leftover[2] = m_egc.leftover[3] = 0; |
| 1413 | m_egc.leftover[0] = 0; |
1414 | 1414 | egc_shift(0, data); |
1415 | 1415 | // leftover[0] is inited above, set others to same |
1416 | 1416 | m_egc.leftover[1] = m_egc.leftover[2] = m_egc.leftover[3] = m_egc.leftover[0]; |
r243668 | r243669 | |
1422 | 1422 | // mask off the bits before the start |
1423 | 1423 | if(m_egc.first) |
1424 | 1424 | { |
1425 | | mask &= dir ? ~((1 << dst_off) - 1) : ((1 << (dst_off + 1)) - 1); |
1426 | | if(!m_egc.init) |
| 1425 | mask &= dir ? ~((1 << dst_off) - 1) : ((1 << (16 - dst_off)) - 1); |
| 1426 | if(BIT(m_egc.regs[2], 10) && !m_egc.init) |
1427 | 1427 | m_egc.leftover[0] = m_egc.leftover[1] = m_egc.leftover[2] = m_egc.leftover[3] = 0; |
1428 | 1428 | } |
1429 | 1429 | |
r243668 | r243669 | |
1513 | 1513 | m_egc.pat[2] = m_video_ram_2[plane_off + (0x4000 * 3)]; |
1514 | 1514 | m_egc.pat[3] = m_video_ram_2[plane_off]; |
1515 | 1515 | } |
| 1516 | if(m_egc.first && !m_egc.init) |
| 1517 | { |
| 1518 | m_egc.leftover[0] = m_egc.leftover[1] = m_egc.leftover[2] = m_egc.leftover[3] = 0; |
| 1519 | m_egc.init = true; |
| 1520 | } |
1516 | 1521 | for(int i = 0; i < 4; i++) |
1517 | 1522 | m_egc.src[i] = egc_shift(i, m_video_ram_2[plane_off + (((i + 1) & 3) * 0x4000)]); |
1518 | 1523 | |
r243668 | r243669 | |
1568 | 1573 | { |
1569 | 1574 | if((m_grcg.mode & (1 << i)) == 0) |
1570 | 1575 | { |
1571 | | |
1572 | 1576 | if(mem_mask & 0xff) |
1573 | 1577 | { |
1574 | 1578 | vram[offset | (((i + 1) & 3) * 0x8000)] &= ~(data >> 0); |
r243668 | r243669 | |
1896 | 1900 | else if(offset == 7) |
1897 | 1901 | { |
1898 | 1902 | // logerror("%02x GRCG TILE %02x\n",data,m_grcg.tile_index); |
1899 | | m_grcg.tile[m_grcg.tile_index] = BITSWAP16((UINT16) data,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7); |
| 1903 | m_grcg.tile[m_grcg.tile_index] = BITSWAP8(data,0,1,2,3,4,5,6,7); |
1900 | 1904 | m_grcg.tile_index ++; |
1901 | 1905 | m_grcg.tile_index &= 3; |
1902 | 1906 | return; |
r243668 | r243669 | |
1910 | 1914 | if(!m_ex_video_ff[2]) |
1911 | 1915 | return; |
1912 | 1916 | |
1913 | | COMBINE_DATA(&m_egc.regs[offset]); |
| 1917 | if(!(m_egc.regs[1] & 0x6000) || (offset != 4)) // why? |
| 1918 | COMBINE_DATA(&m_egc.regs[offset]); |
1914 | 1919 | switch(offset) |
1915 | 1920 | { |
1916 | 1921 | case 1: |