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r35072 Monday 16th February, 2015 at 18:42:43 UTC by R. Belmont
m68k: emulate instruction cache for 68020/68EC020. [R. Belmont]

nw: Drivers tested gained anywhere from 3-10% unthrottled on Taito F3 and Konami GX games, 10-12% on the Mac II, and 140% on Semicom's dreamwld.
[src/emu/cpu/m68000]m68000.h m68kcpu.c m68kcpu.h

trunk/src/emu/cpu/m68000/m68000.h
r243583r243584
356356   UINT16 mmu_tmp_buserror_rw;   /* temporary hack: (first) bus error rw */
357357
358358   UINT32 ic_address[M68K_IC_SIZE];   /* instruction cache address data */
359   UINT16 ic_data[M68K_IC_SIZE];      /* instruction cache content data */
359   UINT32 ic_data[M68K_IC_SIZE];      /* instruction cache content data */
360   bool   ic_valid[M68K_IC_SIZE];      /* instruction cache valid flags */
360361
361362
362363
363
364364   /* 68307 / 68340 internal address map */
365365   address_space *internal;
366366
trunk/src/emu/cpu/m68000/m68kcpu.c
r243583r243584
24782478   mmu_tmp_buserror_rw = 0;
24792479
24802480   for (int i=0;i<M68K_IC_SIZE;i++)
2481   {
24812482      ic_address[i] = 0;
2482
2483   for (int i=0;i<M68K_IC_SIZE;i++)
24842483      ic_data[i] = 0;
2484      ic_valid[i] = false;
2485   }
24852486
24862487   internal = 0;
24872488}
trunk/src/emu/cpu/m68000/m68kcpu.h
r243583r243584
683683
684684INLINE UINT32 m68ki_ic_readimm16(m68000_base_device *m68k, UINT32 address)
685685{
686/*  if(CPU_TYPE_IS_EC020_PLUS(m68k->cpu_type) && (m68k->cacr & M68K_CACR_EI))
687    {
688        UINT32 ic_offset = (address >> 1) % M68K_IC_SIZE;
689        if (m68k->ic_address[ic_offset] == address)
690        {
691            return m68k->ic_data[ic_offset];
692        }
693        else
694        {
695            UINT32 data = m68k->memory.readimm16(address);
696            if (!m68k->mmu_tmp_buserror_occurred)
697            {
698                m68k->ic_data[ic_offset] = data;
699                m68k->ic_address[ic_offset] = address;
700            }
701            return data;
702        }
703    }
704    else*/
686   if (m68k->cacr & M68K_CACR_EI)
705687   {
706      return m68k->/*memory.*/readimm16(address);
688      // 68020 series I-cache (MC68020 User's Manual, Section 4 - On-Chip Cache Memory)
689      if (m68k->cpu_type & (CPU_TYPE_EC020 | CPU_TYPE_020))
690      {
691         UINT32 tag = (address >> 8) | (m68k->s_flag ? 0x1000000 : 0);
692         int idx = (address >> 2) & 0x3f;   // 1-of-64 select
693
694         // do a cache fill if the line is invalid or the tags don't match
695         if ((!m68k->ic_valid[idx]) || (m68k->ic_address[idx] != tag))
696         {
697            m68k->ic_data[idx] = m68k->read32(address & ~3);
698
699//            printf("m68k: doing cache fill at %08x (tag %08x idx %d)\n", address, tag, idx);
700
701            // if no buserror occured, validate the tag
702            if (!m68k->mmu_tmp_buserror_occurred)
703            {
704               m68k->ic_address[idx] = tag;
705               m68k->ic_valid[idx] = true;
706            }
707            else
708            {
709               return m68k->readimm16(address);
710            }
711         }
712
713         // at this point, the cache is guaranteed to be valid, either as
714         // a hit or because we just filled it.
715         if (address & 2)
716         {
717            return m68k->ic_data[idx] & 0xffff;
718         }
719         else
720         {
721            return m68k->ic_data[idx] >> 16;
722         }
723      }
707724   }
708725
709   // this can't happen, but Apple GCC insists
710//  return 0;
726   return m68k->readimm16(address);
711727}
712728
713729/* Handles all immediate reads, does address error check, function code setting,


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