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r34925 Sunday 8th February, 2015 at 12:34:41 UTC by hap
tmtennis hooked up ports
[src/emu/cpu/ucom4]ucom4.c ucom4op.inc
[src/mess/drivers]tmtennis.c

trunk/src/emu/cpu/ucom4/ucom4.c
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110110
111111void ucom4_cpu_device::device_start()
112112{
113   assert(NEC_UCOM4_PORTA == 0);
114   
113115   m_program = &space(AS_PROGRAM);
114116   m_data = &space(AS_DATA);
115117   m_prgmask = (1 << m_prgwidth) - 1;
trunk/src/emu/cpu/ucom4/ucom4op.inc
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3838   
3939   switch (index)
4040   {
41      case NEC_UCOM4_PORTA: inp = m_read_a(index, 0xff) & 0xf; break;
42      case NEC_UCOM4_PORTB: inp = m_read_b(index, 0xff) & 0xf; break;
43      case NEC_UCOM4_PORTC: inp = m_read_c(index, 0xff) & 0xf; break;
44      case NEC_UCOM4_PORTD: inp = m_read_d(index, 0xff) & 0xf; break;
41      case NEC_UCOM4_PORTA: inp = m_read_a(index, 0xff); break;
42      case NEC_UCOM4_PORTB: inp = m_read_b(index, 0xff); break;
43      case NEC_UCOM4_PORTC: inp = m_read_c(index, 0xff); break;
44      case NEC_UCOM4_PORTD: inp = m_read_d(index, 0xff); break;
4545
4646      default:
4747         logerror("%s read from unknown port %c at $%03X\n", tag(), 'A' + index, m_pc);
4848         break;
4949   }
5050
51   return inp;
51   return inp & 0xf;
5252}
5353
5454void ucom4_cpu_device::output_w(int index, UINT8 data)
trunk/src/mess/drivers/tmtennis.c
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2828   tmtennis_state(const machine_config &mconfig, device_type type, const char *tag)
2929      : driver_device(mconfig, type, tag),
3030      m_maincpu(*this, "maincpu"),
31      m_button_matrix(*this, "IN"),
3132      m_speaker(*this, "speaker")
3233   { }
3334
3435   required_device<cpu_device> m_maincpu;
36   required_ioport_array<2> m_button_matrix;
3537   required_device<speaker_sound_device> m_speaker;
38   
39   UINT8 m_input_mux;
40   UINT16 m_plate;
41   UINT16 m_grid;
3642
43   DECLARE_READ8_MEMBER(input_r);
44   DECLARE_WRITE8_MEMBER(port_e_w);
45   DECLARE_WRITE8_MEMBER(plate_w);
46   DECLARE_WRITE8_MEMBER(grid_w);
47
3748   virtual void machine_start();
3849};
3950
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4556
4657***************************************************************************/
4758
59READ8_MEMBER(tmtennis_state::input_r)
60{
61   // port A/B: buttons
62   UINT8 inp = 0xff;
4863
64   // read selected button rows
65   for (int i = 0; i < 2; i++)
66      if (~m_input_mux & (1 << i))
67         inp &= m_button_matrix[i]->read();
4968
69   return inp >> (offset*4);
70}
71
72WRITE8_MEMBER(tmtennis_state::port_e_w)
73{
74   // E0/E1: input mux
75   // E2: speaker out
76   // E3: N/C
77   m_input_mux = data & 3;
78   m_speaker->level_w(data >> 2 & 1);
79}
80
81WRITE8_MEMBER(tmtennis_state::plate_w)
82{
83   // port C/D/F: vfd matrix plate
84   if (offset == NEC_UCOM4_PORTF) offset--;
85   int shift = (offset - NEC_UCOM4_PORTC) * 4;
86   m_plate = (m_plate & ~(0xf << shift)) | (data << shift);
87}
88
89WRITE8_MEMBER(tmtennis_state::grid_w)
90{
91   // port G/H/I: vfd matrix grid
92   int shift = (offset - NEC_UCOM4_PORTG) * 4;
93   m_grid = (m_grid & ~(0xf << shift)) | (data << shift);
94}
95
96
5097/***************************************************************************
5198
5299  Inputs
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54101***************************************************************************/
55102
56103static INPUT_PORTS_START( tmtennis )
104   PORT_START("IN.0") // E0 port A/B
105   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
106   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
107   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
108   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(2)
109   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_PLAYER(2)
110   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_PLAYER(2)
111   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_PLAYER(2)
112   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON8 ) PORT_PLAYER(2)
113
114   PORT_START("IN.1") // E1 port A/B
115   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
116   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 )
117   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 )
118   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON4 )
119   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON5 )
120   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON6 )
121   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON7 )
122   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON8 )
57123INPUT_PORTS_END
58124
59125
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66132
67133void tmtennis_state::machine_start()
68134{
135   // zerofill
136   m_input_mux = 0;
137   m_plate = 0;
138   m_grid = 0;
139
140   // register for savestates
141   save_item(NAME(m_input_mux));
142   save_item(NAME(m_plate));
143   save_item(NAME(m_grid));
69144}
70145
71146
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73148
74149   /* basic machine hardware */
75150   MCFG_CPU_ADD("maincpu", NEC_D552, MASTER_CLOCK_PRO2)
151   MCFG_UCOM4_READ_A_CB(READ8(tmtennis_state, input_r))
152   MCFG_UCOM4_READ_B_CB(READ8(tmtennis_state, input_r))
153   MCFG_UCOM4_WRITE_C_CB(WRITE8(tmtennis_state, plate_w))
154   MCFG_UCOM4_WRITE_D_CB(WRITE8(tmtennis_state, plate_w))
155   MCFG_UCOM4_WRITE_E_CB(WRITE8(tmtennis_state, port_e_w))
156   MCFG_UCOM4_WRITE_F_CB(WRITE8(tmtennis_state, plate_w))
157   MCFG_UCOM4_WRITE_G_CB(WRITE8(tmtennis_state, grid_w))
158   MCFG_UCOM4_WRITE_H_CB(WRITE8(tmtennis_state, grid_w))
159   MCFG_UCOM4_WRITE_I_CB(WRITE8(tmtennis_state, grid_w))
76160
77161   MCFG_DEFAULT_LAYOUT(layout_tmtennis)
78162


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