trunk/src/mess/drivers/pc9801.c
| r243432 | r243433 | |
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| 496 | 496 | |
| 497 | 497 | virtual void video_start(); |
| 498 | 498 | UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); |
| 499 | virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr); |
| 499 | 500 | |
| 501 | enum |
| 502 | { |
| 503 | TIMER_VBIRQ |
| 504 | }; |
| 505 | |
| 506 | emu_timer *m_vbirq; |
| 500 | 507 | UINT8 *m_ipl_rom; |
| 501 | 508 | UINT8 *m_char_rom; |
| 502 | 509 | UINT8 *m_kanji_rom; |
| r243432 | r243433 | |
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| 504 | 511 | UINT8 m_dma_offset[4]; |
| 505 | 512 | int m_dack; |
| 506 | 513 | |
| 507 | | UINT8 m_vrtc_irq_mask; |
| 508 | 514 | UINT8 m_video_ff[8],m_gfx_ff; |
| 509 | 515 | UINT8 m_txt_scroll_reg[8]; |
| 510 | 516 | UINT8 m_pal_clut[4]; |
| r243432 | r243433 | |
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| 562 | 568 | DECLARE_WRITE_LINE_MEMBER( write_uart_clock ); |
| 563 | 569 | DECLARE_WRITE8_MEMBER(rtc_dmapg_w); |
| 564 | 570 | DECLARE_WRITE8_MEMBER(nmi_ctrl_w); |
| 565 | | DECLARE_WRITE8_MEMBER(vrtc_mask_w); |
| 571 | DECLARE_WRITE8_MEMBER(vrtc_clear_w); |
| 566 | 572 | DECLARE_WRITE8_MEMBER(pc9801_video_ff_w); |
| 567 | 573 | DECLARE_READ8_MEMBER(txt_scrl_r); |
| 568 | 574 | DECLARE_WRITE8_MEMBER(txt_scrl_w); |
| r243432 | r243433 | |
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| 731 | 737 | #define ANALOG_16_MODE 0 |
| 732 | 738 | #define ANALOG_256_MODE 0x10 |
| 733 | 739 | |
| 740 | void pc9801_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) |
| 741 | { |
| 742 | switch(id) |
| 743 | { |
| 744 | case TIMER_VBIRQ: |
| 745 | m_pic1->ir2_w(0); |
| 746 | } |
| 747 | } |
| 748 | |
| 734 | 749 | void pc9801_state::video_start() |
| 735 | 750 | { |
| 736 | 751 | m_tvram = auto_alloc_array(machine(), UINT16, 0x2000); |
| r243432 | r243433 | |
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| 988 | 1003 | m_nmi_ff = (offset & 2) >> 1; |
| 989 | 1004 | } |
| 990 | 1005 | |
| 991 | | WRITE8_MEMBER(pc9801_state::vrtc_mask_w) |
| 1006 | WRITE8_MEMBER(pc9801_state::vrtc_clear_w) |
| 992 | 1007 | { |
| 993 | | m_vrtc_irq_mask = 1; |
| 1008 | m_pic1->ir2_w(0); |
| 994 | 1009 | } |
| 995 | 1010 | |
| 996 | 1011 | WRITE8_MEMBER(pc9801_state::pc9801_video_ff_w) |
| r243432 | r243433 | |
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| 1723 | 1738 | AM_RANGE(0x0050, 0x0057) AM_DEVREADWRITE8("ppi8255_fdd", i8255_device, read, write, 0xff00) |
| 1724 | 1739 | AM_RANGE(0x0050, 0x0053) AM_WRITE8(nmi_ctrl_w,0x00ff) // NMI FF / i8255 floppy port (2d?) |
| 1725 | 1740 | AM_RANGE(0x0060, 0x0063) AM_DEVREADWRITE8("upd7220_chr", upd7220_device, read, write, 0x00ff) //upd7220 character ports / <undefined> |
| 1726 | | AM_RANGE(0x0064, 0x0065) AM_WRITE8(vrtc_mask_w,0x00ff) |
| 1741 | AM_RANGE(0x0064, 0x0065) AM_WRITE8(vrtc_clear_w,0x00ff) |
| 1727 | 1742 | AM_RANGE(0x0068, 0x0069) AM_WRITE8(pc9801_video_ff_w,0x00ff) //mode FF / <undefined> |
| 1728 | 1743 | // AM_RANGE(0x006c, 0x006f) border color / <undefined> |
| 1729 | 1744 | AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("pit8253", pit8253_device, read, write, 0xff00) |
| r243432 | r243433 | |
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| 2417 | 2432 | AM_RANGE(0x0050, 0x0053) AM_WRITE8(pc9801rs_nmi_w, 0xffffffff) |
| 2418 | 2433 | AM_RANGE(0x005c, 0x005f) AM_READ16(pc9821_timestamp_r,0xffffffff) AM_WRITENOP // artic |
| 2419 | 2434 | AM_RANGE(0x0060, 0x0063) AM_DEVREADWRITE8("upd7220_chr", upd7220_device, read, write, 0x00ff00ff) //upd7220 character ports / <undefined> |
| 2420 | | AM_RANGE(0x0064, 0x0067) AM_WRITE8(vrtc_mask_w, 0x000000ff) |
| 2435 | AM_RANGE(0x0064, 0x0067) AM_WRITE8(vrtc_clear_w, 0x000000ff) |
| 2421 | 2436 | AM_RANGE(0x0068, 0x006b) AM_WRITE8(pc9821_video_ff_w, 0x00ff00ff) //mode FF / <undefined> |
| 2422 | 2437 | AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("pit8253", pit8253_device, read, write, 0xff00ff00) |
| 2423 | 2438 | AM_RANGE(0x0070, 0x007f) AM_READWRITE8(grcg_r, grcg_w, 0x00ff00ff) //display registers "GRCG" / i8253 pit |
| r243432 | r243433 | |
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| 2982 | 2997 | m_rtc->oe_w(1); |
| 2983 | 2998 | |
| 2984 | 2999 | m_ipl_rom = memregion("ipl")->base(); |
| 3000 | m_vbirq = timer_alloc(TIMER_VBIRQ); |
| 2985 | 3001 | |
| 2986 | 3002 | save_item(NAME(m_sasi_data)); |
| 2987 | 3003 | save_item(NAME(m_sasi_data_enable)); |
| 2988 | 3004 | save_item(NAME(m_sasi_ctrl)); |
| 2989 | | save_item(NAME(m_vrtc_irq_mask)); |
| 2990 | 3005 | } |
| 2991 | 3006 | |
| 2992 | 3007 | MACHINE_START_MEMBER(pc9801_state,pc9801f) |
| r243432 | r243433 | |
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| 3116 | 3131 | |
| 3117 | 3132 | INTERRUPT_GEN_MEMBER(pc9801_state::pc9801_vrtc_irq) |
| 3118 | 3133 | { |
| 3119 | | if(m_vrtc_irq_mask) |
| 3120 | | { |
| 3121 | | m_pic1->ir2_w(0); |
| 3122 | | m_pic1->ir2_w(1); |
| 3123 | | m_vrtc_irq_mask = 0; // TODO: this irq auto-masks? |
| 3124 | | } |
| 3125 | | // else |
| 3126 | | // pic8259_ir2_w(machine().device("pic8259_master"), 0); |
| 3134 | m_pic1->ir2_w(1); |
| 3135 | m_vbirq->adjust(m_screen->time_until_vblank_end()); |
| 3127 | 3136 | } |
| 3128 | 3137 | |
| 3129 | 3138 | |