trunk/src/mame/audio/t5182.c
| r243420 | r243421 | |
| 2 | 2 | |
| 3 | 3 | Toshiba T5182 die map, by Jonathan Gevaryahu AKA Lord Nightmare, |
| 4 | 4 | with assistance from Kevin Horton. |
| 5 | | T5182 supplied by Tomasz 'Dox' Slanina which came from a Dark Mist PCB bought by Guru |
| 5 | T5182 supplied by Tomasz 'Dox' Slanina |
| 6 | 6 | |
| 7 | 7 | Die Diagram: |
| 8 | 8 | |------------------------| |
| r243420 | r243421 | |
| 152 | 152 | const device_type T5182 = &device_creator<t5182_device>; |
| 153 | 153 | |
| 154 | 154 | t5182_device::t5182_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 155 | | : device_t(mconfig, T5182, "T5182 MCU", tag, owner, clock, "t5182", __FILE__), |
| 156 | | m_ourcpu(*this, "t5182_z80"), |
| 157 | | m_sharedram(*this, "sharedram"), |
| 155 | : device_t(mconfig, T5182, "T5182 MCU", tag, owner, clock, "toshiba_t5182", __FILE__), |
| 156 | m_t5182_sharedram(NULL), |
| 158 | 157 | m_irqstate(0), |
| 159 | 158 | m_semaphore_main(0), |
| 160 | 159 | m_semaphore_snd(0) |
| 161 | 160 | { |
| 162 | 161 | } |
| 163 | 162 | |
| 163 | //------------------------------------------------- |
| 164 | // device_config_complete - perform any |
| 165 | // operations now that the configuration is |
| 166 | // complete |
| 167 | //------------------------------------------------- |
| 164 | 168 | |
| 169 | void t5182_device::device_config_complete() |
| 170 | { |
| 171 | } |
| 172 | |
| 165 | 173 | //------------------------------------------------- |
| 166 | 174 | // device_start - device-specific startup |
| 167 | 175 | //------------------------------------------------- |
| 168 | 176 | |
| 169 | 177 | void t5182_device::device_start() |
| 170 | 178 | { |
| 171 | | m_setirq_cb = timer_alloc(SETIRQ_CB); |
| 172 | | |
| 179 | m_t5182_sharedram = reinterpret_cast<UINT8 *>(machine().root_device().memshare("t5182_sharedram")->ptr()); |
| 180 | |
| 181 | save_pointer(NAME(m_t5182_sharedram), sizeof(UINT8)); |
| 173 | 182 | save_item(NAME(m_irqstate)); |
| 174 | 183 | save_item(NAME(m_semaphore_main)); |
| 175 | 184 | save_item(NAME(m_semaphore_snd)); |
| 185 | |
| 186 | m_ourcpu = machine().device<cpu_device>("t5182_z80"); |
| 176 | 187 | } |
| 177 | 188 | |
| 178 | 189 | READ8_MEMBER(t5182_device::sharedram_r) |
| 179 | 190 | { |
| 180 | | return m_sharedram[offset]; |
| 191 | return m_t5182_sharedram[offset]; |
| 181 | 192 | } |
| 182 | 193 | |
| 183 | 194 | WRITE8_MEMBER(t5182_device::sharedram_w) |
| 184 | 195 | { |
| 185 | | m_sharedram[offset] = data; |
| 196 | m_t5182_sharedram[offset] = data; |
| 186 | 197 | } |
| 187 | 198 | |
| 188 | 199 | TIMER_CALLBACK_MEMBER( t5182_device::setirq_callback ) |
| r243420 | r243421 | |
| 219 | 230 | m_ourcpu->set_input_line(0,ASSERT_LINE); |
| 220 | 231 | } |
| 221 | 232 | |
| 222 | | void t5182_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) |
| 223 | | { |
| 224 | | switch (id) |
| 225 | | { |
| 226 | | case SETIRQ_CB: |
| 227 | | setirq_callback(ptr, param); |
| 228 | | break; |
| 229 | | default: |
| 230 | | assert_always(FALSE, "Unknown id in t5182_device::device_timer"); |
| 231 | | } |
| 232 | | } |
| 233 | 233 | |
| 234 | |
| 234 | 235 | WRITE8_MEMBER( t5182_device::sound_irq_w ) |
| 235 | 236 | { |
| 236 | | synchronize(SETIRQ_CB, CPU_ASSERT); |
| 237 | space.machine().scheduler().synchronize(timer_expired_delegate(FUNC(t5182_device::setirq_callback), this), CPU_ASSERT); |
| 237 | 238 | } |
| 238 | 239 | |
| 239 | 240 | WRITE8_MEMBER( t5182_device::ym2151_irq_ack_w ) |
| 240 | 241 | { |
| 241 | | synchronize(SETIRQ_CB, YM2151_ACK); |
| 242 | space.machine().scheduler().synchronize(timer_expired_delegate(FUNC(t5182_device::setirq_callback), this), YM2151_ACK); |
| 242 | 243 | } |
| 243 | 244 | |
| 244 | 245 | WRITE8_MEMBER( t5182_device::cpu_irq_ack_w ) |
| 245 | 246 | { |
| 246 | | synchronize(SETIRQ_CB, CPU_CLEAR); |
| 247 | space.machine().scheduler().synchronize(timer_expired_delegate(FUNC(t5182_device::setirq_callback), this), CPU_CLEAR); |
| 247 | 248 | } |
| 248 | 249 | |
| 249 | 250 | WRITE_LINE_MEMBER(t5182_device::ym2151_irq_handler) |
| 250 | 251 | { |
| 251 | 252 | if (state) |
| 252 | | synchronize(SETIRQ_CB, YM2151_ASSERT); |
| 253 | machine().scheduler().synchronize(timer_expired_delegate(FUNC(t5182_device::setirq_callback), this), YM2151_ASSERT); |
| 253 | 254 | else |
| 254 | | synchronize(SETIRQ_CB, YM2151_CLEAR); |
| 255 | machine().scheduler().synchronize(timer_expired_delegate(FUNC(t5182_device::setirq_callback), this), YM2151_CLEAR); |
| 255 | 256 | } |
| 256 | 257 | |
| 257 | 258 | READ8_MEMBER(t5182_device::sharedram_semaphore_snd_r) |
| r243420 | r243421 | |
| 284 | 285 | return m_semaphore_main | (m_irqstate & 2); |
| 285 | 286 | } |
| 286 | 287 | |
| 287 | | // ROM definition for the Toshiba T5182 Custom CPU internal program ROM |
| 288 | | ROM_START( t5182 ) |
| 289 | | ROM_REGION( 0x2000, "cpu", 0 ) |
| 290 | | ROM_LOAD( "t5182.rom", 0x0000, 0x2000, CRC(d354c8fc) SHA1(a1c9e1ac293f107f69cc5788cf6abc3db1646e33) ) |
| 291 | | ROM_END |
| 292 | | |
| 293 | 288 | //------------------------------------------------- |
| 294 | | // rom_region - return a pointer to the device's |
| 295 | | // internal ROM region |
| 289 | // MACHINE_CONFIG_FRAGMENT( t5182 ) |
| 296 | 290 | //------------------------------------------------- |
| 297 | | const rom_entry *t5182_device::device_rom_region() const |
| 298 | | { |
| 299 | | return ROM_NAME( t5182 ); |
| 300 | | } |
| 301 | 291 | |
| 302 | | INPUT_PORTS_START(t5182) |
| 303 | | PORT_START("T5182_COIN") |
| 304 | | PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(2) |
| 305 | | PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(2) |
| 306 | | INPUT_PORTS_END |
| 292 | MACHINE_CONFIG_FRAGMENT( t5182 ) |
| 293 | MCFG_CPU_ADD("t5182_z80", Z80, T5182_CLOCK) |
| 294 | MCFG_CPU_PROGRAM_MAP(t5182_map) |
| 295 | MCFG_CPU_IO_MAP(t5182_io) |
| 307 | 296 | |
| 308 | | //------------------------------------------------- |
| 309 | | // input_ports - return a pointer to the implicit |
| 310 | | // input ports description for this device |
| 311 | | //------------------------------------------------- |
| 297 | MACHINE_CONFIG_END |
| 312 | 298 | |
| 313 | | ioport_constructor t5182_device::device_input_ports() const |
| 314 | | { |
| 315 | | return INPUT_PORTS_NAME(t5182); |
| 316 | | } |
| 317 | | |
| 318 | 299 | |
| 319 | 300 | // 4000-407F RAM shared with main CPU |
| 320 | 301 | // 4000 output queue length |
| r243420 | r243421 | |
| 334 | 315 | // A0XX |
| 335 | 316 | // rest unused |
| 336 | 317 | ADDRESS_MAP_START( t5182_map, AS_PROGRAM, 8, t5182_device ) |
| 337 | | AM_RANGE(0x0000, 0x1fff) AM_ROM AM_REGION("cpu", 0) // internal ROM |
| 318 | AM_RANGE(0x0000, 0x1fff) AM_ROM // internal ROM |
| 338 | 319 | AM_RANGE(0x2000, 0x27ff) AM_RAM AM_MIRROR(0x1800) // internal RAM |
| 339 | | AM_RANGE(0x4000, 0x40ff) AM_RAM AM_MIRROR(0x3F00) AM_SHARE("sharedram") // 2016 with four 74ls245s, one each for main and t5182 address and data. pins 23, 22, 20, 19, 18 are all tied low so only 256 bytes are usable |
| 340 | | AM_RANGE(0x8000, 0xffff) AM_ROM AM_REGION(":t5182_z80", 0) // external ROM |
| 320 | AM_RANGE(0x4000, 0x40ff) AM_RAM AM_MIRROR(0x3F00) AM_SHARE("t5182_sharedram") // 2016 with four 74ls245s, one each for main and t5182 address and data. pins 23, 22, 20, 19, 18 are all tied low so only 256 bytes are usable |
| 321 | AM_RANGE(0x8000, 0xffff) AM_ROM // external ROM |
| 341 | 322 | ADDRESS_MAP_END |
| 342 | 323 | |
| 343 | 324 | |
| r243420 | r243421 | |
| 353 | 334 | // 50 W test mode status flags (bit 0 = ROM test fail, bit 1 = RAM test fail, bit 2 = YM2151 IRQ not received) |
| 354 | 335 | ADDRESS_MAP_START( t5182_io, AS_IO, 8, t5182_device ) |
| 355 | 336 | ADDRESS_MAP_GLOBAL_MASK(0xff) |
| 356 | | AM_RANGE(0x00, 0x01) AM_DEVREADWRITE(":ymsnd", ym2151_device, read, write) |
| 357 | | AM_RANGE(0x10, 0x10) AM_WRITE(sharedram_semaphore_snd_acquire_w) |
| 358 | | AM_RANGE(0x11, 0x11) AM_WRITE(sharedram_semaphore_snd_release_w) |
| 359 | | AM_RANGE(0x12, 0x12) AM_WRITE(ym2151_irq_ack_w) |
| 360 | | AM_RANGE(0x13, 0x13) AM_WRITE(cpu_irq_ack_w) |
| 361 | | AM_RANGE(0x20, 0x20) AM_READ(sharedram_semaphore_main_r) |
| 362 | | AM_RANGE(0x30, 0x30) AM_READ_PORT("T5182_COIN") |
| 337 | AM_RANGE(0x00, 0x01) AM_DEVREADWRITE("ymsnd", ym2151_device, read, write) |
| 338 | AM_RANGE(0x10, 0x10) AM_DEVWRITE("t5182", t5182_device, sharedram_semaphore_snd_acquire_w) |
| 339 | AM_RANGE(0x11, 0x11) AM_DEVWRITE("t5182", t5182_device, sharedram_semaphore_snd_release_w) |
| 340 | AM_RANGE(0x12, 0x12) AM_DEVWRITE("t5182", t5182_device, ym2151_irq_ack_w) |
| 341 | AM_RANGE(0x13, 0x13) AM_DEVWRITE("t5182", t5182_device, cpu_irq_ack_w) |
| 342 | AM_RANGE(0x20, 0x20) AM_DEVREAD("t5182", t5182_device, sharedram_semaphore_main_r) |
| 343 | AM_RANGE(0x30, 0x30) AM_READ_PORT(T5182COINPORT) |
| 363 | 344 | ADDRESS_MAP_END |
| 364 | | |
| 365 | | |
| 366 | | //------------------------------------------------- |
| 367 | | // MACHINE_CONFIG_FRAGMENT( t5182 ) |
| 368 | | //------------------------------------------------- |
| 369 | | |
| 370 | | MACHINE_CONFIG_FRAGMENT( t5182 ) |
| 371 | | MCFG_CPU_ADD("t5182_z80", Z80, T5182_CLOCK) |
| 372 | | MCFG_CPU_PROGRAM_MAP(t5182_map) |
| 373 | | MCFG_CPU_IO_MAP(t5182_io) |
| 374 | | |
| 375 | | MACHINE_CONFIG_END |
| 376 | | |
| 377 | | //------------------------------------------------- |
| 378 | | // machine_config_additions - device-specific |
| 379 | | // machine configurations |
| 380 | | //------------------------------------------------- |
| 381 | | |
| 382 | | machine_config_constructor t5182_device::device_mconfig_additions() const |
| 383 | | { |
| 384 | | return MACHINE_CONFIG_NAME( t5182 ); |
| 385 | | } |
trunk/src/mame/drivers/darkmist.c
| r243420 | r243421 | |
| 28 | 28 | #include "includes/darkmist.h" |
| 29 | 29 | |
| 30 | 30 | |
| 31 | | WRITE8_MEMBER(darkmist_state::hw_w) |
| 31 | WRITE8_MEMBER(darkmist_state::darkmist_hw_w) |
| 32 | 32 | { |
| 33 | 33 | m_hw=data; |
| 34 | 34 | membank("bank1")->set_base(&memregion("maincpu")->base()[0x010000+((data&0x80)?0x4000:0)]); |
| r243420 | r243421 | |
| 40 | 40 | AM_RANGE(0xc801, 0xc801) AM_READ_PORT("P1") |
| 41 | 41 | AM_RANGE(0xc802, 0xc802) AM_READ_PORT("P2") |
| 42 | 42 | AM_RANGE(0xc803, 0xc803) AM_READ_PORT("START") |
| 43 | | AM_RANGE(0xc804, 0xc804) AM_WRITE(hw_w) |
| 43 | AM_RANGE(0xc804, 0xc804) AM_WRITE(darkmist_hw_w) |
| 44 | 44 | AM_RANGE(0xc805, 0xc805) AM_WRITEONLY AM_SHARE("spritebank") |
| 45 | 45 | AM_RANGE(0xc806, 0xc806) AM_READ_PORT("DSW1") |
| 46 | 46 | AM_RANGE(0xc807, 0xc807) AM_READ_PORT("DSW2") |
| r243420 | r243421 | |
| 173 | 173 | PORT_DIPSETTING( 0x80, DEF_STR( No ) ) |
| 174 | 174 | PORT_DIPSETTING( 0x00, DEF_STR( Yes ) ) |
| 175 | 175 | |
| 176 | PORT_START(T5182COINPORT) |
| 177 | PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(2) |
| 178 | PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(2) |
| 179 | |
| 176 | 180 | INPUT_PORTS_END |
| 177 | 181 | |
| 178 | 182 | static const gfx_layout charlayout = |
| r243420 | r243421 | |
| 209 | 213 | GFXDECODE_ENTRY( "gfx3", 0, tilelayout, 0, 16*4 ) |
| 210 | 214 | GFXDECODE_END |
| 211 | 215 | |
| 212 | | TIMER_DEVICE_CALLBACK_MEMBER(darkmist_state::scanline) |
| 216 | TIMER_DEVICE_CALLBACK_MEMBER(darkmist_state::darkmist_scanline) |
| 213 | 217 | { |
| 214 | 218 | int scanline = param; |
| 215 | 219 | |
| r243420 | r243421 | |
| 226 | 230 | /* basic machine hardware */ |
| 227 | 231 | MCFG_CPU_ADD("maincpu", Z80,4000000) /* ? MHz */ |
| 228 | 232 | MCFG_CPU_PROGRAM_MAP(memmap) |
| 229 | | MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", darkmist_state, scanline, "screen", 0, 1) |
| 233 | MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", darkmist_state, darkmist_scanline, "screen", 0, 1) |
| 230 | 234 | |
| 231 | | MCFG_DEVICE_ADD("t5182", T5182, 0) |
| 232 | | |
| 235 | MCFG_T5182_ADD("t5182") |
| 236 | MCFG_FRAGMENT_ADD(t5182) |
| 233 | 237 | |
| 234 | 238 | /* video hardware */ |
| 235 | 239 | MCFG_SCREEN_ADD("screen", RASTER) |
| r243420 | r243421 | |
| 237 | 241 | MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) |
| 238 | 242 | MCFG_SCREEN_SIZE(256, 256) |
| 239 | 243 | MCFG_SCREEN_VISIBLE_AREA(0, 256-1, 16, 256-16-1) |
| 240 | | MCFG_SCREEN_UPDATE_DRIVER(darkmist_state, screen_update) |
| 244 | MCFG_SCREEN_UPDATE_DRIVER(darkmist_state, screen_update_darkmist) |
| 241 | 245 | MCFG_SCREEN_PALETTE("palette") |
| 242 | 246 | |
| 243 | 247 | MCFG_GFXDECODE_ADD("gfxdecode", "palette", darkmist) |
| r243420 | r243421 | |
| 262 | 266 | |
| 263 | 267 | ROM_LOAD( "dm_16.rom", 0x10000, 0x08000, CRC(094579d9) SHA1(2449bc9ba38396912ee9b72dd870ea9fcff95776) ) |
| 264 | 268 | |
| 265 | | ROM_REGION( 0x8000, "t5182_z80", 0 ) /* Toshiba T5182 external ROM */ |
| 266 | | ROM_LOAD( "dm_17.rom", 0x0000, 0x8000, CRC(7723dcae) SHA1(a0c69e7a7b6fd74f7ed6b9c6419aed94aabcd4b0) ) |
| 269 | ROM_REGION( 0x10000, "t5182_z80", 0 ) /* Toshiba T5182 module */ |
| 270 | ROM_LOAD( "t5182.rom", 0x0000, 0x2000, CRC(d354c8fc) SHA1(a1c9e1ac293f107f69cc5788cf6abc3db1646e33) ) |
| 271 | ROM_LOAD( "dm_17.rom", 0x8000, 0x8000, CRC(7723dcae) SHA1(a0c69e7a7b6fd74f7ed6b9c6419aed94aabcd4b0) ) |
| 267 | 272 | |
| 268 | 273 | ROM_REGION( 0x4000, "gfx1", 0 ) |
| 269 | 274 | ROM_LOAD( "dm_13.rom", 0x00000, 0x02000, CRC(38bb38d9) SHA1(d751990166dd3d503c5de7667679b96210061cd1) ) |
| r243420 | r243421 | |
| 390 | 395 | int i; |
| 391 | 396 | UINT8 *ROM = memregion("t5182_z80")->base(); |
| 392 | 397 | |
| 393 | | for(i=0x0000;i<0x2000;i++) |
| 398 | for(i=0x8000;i<0x10000;i++) |
| 394 | 399 | ROM[i] = BITSWAP8(ROM[i], 7,1,2,3,4,5,6,0); |
| 395 | 400 | } |
| 396 | 401 | |
| r243420 | r243421 | |
| 468 | 473 | } |
| 469 | 474 | } |
| 470 | 475 | |
| 471 | | GAME( 1986, darkmist, 0, darkmist, darkmist, darkmist_state, darkmist, ROT270, "Taito Corporation", "The Lost Castle In Darkmist", GAME_IMPERFECT_GRAPHICS | GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE ) |
| 476 | GAME( 1986, darkmist, 0, darkmist, darkmist, darkmist_state, darkmist, ROT270, "Taito Corporation", "The Lost Castle In Darkmist", GAME_IMPERFECT_GRAPHICS|GAME_NO_COCKTAIL ) |
trunk/src/mame/drivers/mustache.c
| r243420 | r243421 | |
| 43 | 43 | static ADDRESS_MAP_START( memmap, AS_PROGRAM, 8, mustache_state ) |
| 44 | 44 | AM_RANGE(0x0000, 0x7fff) AM_ROM |
| 45 | 45 | AM_RANGE(0x8000, 0xbfff) AM_ROM |
| 46 | | AM_RANGE(0xc000, 0xcfff) AM_RAM_WRITE(videoram_w) AM_SHARE("videoram") |
| 46 | AM_RANGE(0xc000, 0xcfff) AM_RAM_WRITE(mustache_videoram_w) AM_SHARE("videoram") |
| 47 | 47 | AM_RANGE(0xd000, 0xd000) AM_DEVWRITE("t5182", t5182_device, sound_irq_w) |
| 48 | 48 | AM_RANGE(0xd001, 0xd001) AM_DEVREAD("t5182", t5182_device, sharedram_semaphore_snd_r) |
| 49 | 49 | AM_RANGE(0xd002, 0xd002) AM_DEVWRITE("t5182", t5182_device, sharedram_semaphore_main_acquire_w) |
| r243420 | r243421 | |
| 54 | 54 | AM_RANGE(0xd802, 0xd802) AM_READ_PORT("START") |
| 55 | 55 | AM_RANGE(0xd803, 0xd803) AM_READ_PORT("DSWA") |
| 56 | 56 | AM_RANGE(0xd804, 0xd804) AM_READ_PORT("DSWB") |
| 57 | | AM_RANGE(0xd806, 0xd806) AM_WRITE(scroll_w) |
| 58 | | AM_RANGE(0xd807, 0xd807) AM_WRITE(video_control_w) |
| 57 | AM_RANGE(0xd806, 0xd806) AM_WRITE(mustache_scroll_w) |
| 58 | AM_RANGE(0xd807, 0xd807) AM_WRITE(mustache_video_control_w) |
| 59 | 59 | AM_RANGE(0xe800, 0xefff) AM_WRITEONLY AM_SHARE("spriteram") |
| 60 | 60 | AM_RANGE(0xf000, 0xffff) AM_RAM |
| 61 | 61 | ADDRESS_MAP_END |
| r243420 | r243421 | |
| 123 | 123 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 124 | 124 | // There is an 8th dipswitch here, which controls screen flip, but the operator sheet implies it does it via hardware, i.e. not readable by cpu. May need further investigation. |
| 125 | 125 | |
| 126 | PORT_START(T5182COINPORT) |
| 127 | PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(2) |
| 128 | PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(2) |
| 126 | 129 | INPUT_PORTS_END |
| 127 | 130 | |
| 128 | 131 | |
| r243420 | r243421 | |
| 152 | 155 | GFXDECODE_ENTRY( "gfx2", 0, spritelayout, 0x80, 8 ) |
| 153 | 156 | GFXDECODE_END |
| 154 | 157 | |
| 155 | | TIMER_DEVICE_CALLBACK_MEMBER(mustache_state::scanline) |
| 158 | TIMER_DEVICE_CALLBACK_MEMBER(mustache_state::mustache_scanline) |
| 156 | 159 | { |
| 157 | 160 | int scanline = param; |
| 158 | 161 | |
| r243420 | r243421 | |
| 170 | 173 | /* basic machine hardware */ |
| 171 | 174 | MCFG_CPU_ADD("maincpu", Z80, CPU_CLOCK) |
| 172 | 175 | MCFG_CPU_PROGRAM_MAP(memmap) |
| 173 | | MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", mustache_state, scanline, "screen", 0, 1) |
| 176 | MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", mustache_state, mustache_scanline, "screen", 0, 1) |
| 174 | 177 | |
| 175 | | MCFG_DEVICE_ADD("t5182", T5182, 0) |
| 178 | MCFG_T5182_ADD("t5182") |
| 179 | MCFG_FRAGMENT_ADD(t5182) |
| 176 | 180 | |
| 177 | | |
| 178 | 181 | /* video hardware */ |
| 179 | 182 | MCFG_SCREEN_ADD("screen", RASTER) |
| 180 | 183 | MCFG_SCREEN_REFRESH_RATE(56.747) |
| 181 | 184 | MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) |
| 182 | 185 | MCFG_SCREEN_SIZE(32*8, 32*8) |
| 183 | 186 | MCFG_SCREEN_VISIBLE_AREA(1*8, 31*8-1, 0, 31*8-1) |
| 184 | | MCFG_SCREEN_UPDATE_DRIVER(mustache_state, screen_update) |
| 187 | MCFG_SCREEN_UPDATE_DRIVER(mustache_state, screen_update_mustache) |
| 185 | 188 | MCFG_SCREEN_PALETTE("palette") |
| 186 | 189 | |
| 187 | 190 | MCFG_GFXDECODE_ADD("gfxdecode", "palette", mustache) |
| r243420 | r243421 | |
| 204 | 207 | ROM_LOAD( "mustache.h18", 0x0000, 0x8000, CRC(123bd9b8) SHA1(33a7cba5c3a54b0b1a15dd1e24d298b6f7274321) ) |
| 205 | 208 | ROM_LOAD( "mustache.h16", 0x8000, 0x4000, CRC(62552beb) SHA1(ee10991d7de0596608fa1db48805781cbfbbdb9f) ) |
| 206 | 209 | |
| 207 | | ROM_REGION( 0x8000, "t5182_z80", 0 ) /* Toshiba T5182 external ROM */ |
| 208 | | ROM_LOAD( "mustache.e5", 0x0000, 0x8000, CRC(efbb1943) SHA1(3320e9eaeb776d09ed63f7dedc79e720674e6718) ) |
| 210 | ROM_REGION( 0x10000, "t5182_z80", 0 ) /* Toshiba T5182 module */ |
| 211 | ROM_LOAD( "t5182.rom", 0x0000, 0x2000, CRC(d354c8fc) SHA1(a1c9e1ac293f107f69cc5788cf6abc3db1646e33) ) |
| 212 | ROM_LOAD( "mustache.e5", 0x8000, 0x8000, CRC(efbb1943) SHA1(3320e9eaeb776d09ed63f7dedc79e720674e6718) ) |
| 209 | 213 | |
| 210 | 214 | ROM_REGION( 0x0c000, "gfx1",0) /* BG tiles */ |
| 211 | 215 | ROM_LOAD( "mustache.a13", 0x0000, 0x4000, CRC(9baee4a7) SHA1(31bcec838789462e67e54ebe7256db9fc4e51b69) ) |
| r243420 | r243421 | |
| 274 | 278 | } |
| 275 | 279 | |
| 276 | 280 | |
| 277 | | GAME( 1987, mustache, 0, mustache, mustache, mustache_state, mustache, ROT90, "Seibu Kaihatsu (March license)", "Mustache Boy", GAME_SUPPORTS_SAVE ) |
| 281 | GAME( 1987, mustache, 0, mustache, mustache, mustache_state, mustache, ROT90, "Seibu Kaihatsu (March license)", "Mustache Boy", 0 ) |
trunk/src/mame/drivers/panicr.c
| r243420 | r243421 | |
| 69 | 69 | public: |
| 70 | 70 | panicr_state(const machine_config &mconfig, device_type type, const char *tag) |
| 71 | 71 | : driver_device(mconfig, type, tag), |
| 72 | m_mainram(*this, "mainram"), |
| 73 | m_spriteram(*this, "spriteram"), |
| 74 | m_textram(*this, "textram"), |
| 75 | m_spritebank(*this, "spritebank"), |
| 72 | 76 | m_maincpu(*this, "maincpu"), |
| 73 | 77 | m_t5182(*this, "t5182"), |
| 74 | 78 | m_gfxdecode(*this, "gfxdecode"), |
| 75 | 79 | m_screen(*this, "screen"), |
| 76 | | m_palette(*this, "palette"), |
| 77 | | m_mainram(*this, "mainram"), |
| 78 | | m_spriteram(*this, "spriteram"), |
| 79 | | m_textram(*this, "textram"), |
| 80 | | m_spritebank(*this, "spritebank") { } |
| 80 | m_palette(*this, "palette") { } |
| 81 | 81 | |
| 82 | required_shared_ptr<UINT8> m_mainram; |
| 83 | required_shared_ptr<UINT8> m_spriteram; |
| 84 | required_shared_ptr<UINT8> m_textram; |
| 85 | required_shared_ptr<UINT8> m_spritebank; |
| 86 | |
| 82 | 87 | required_device<cpu_device> m_maincpu; |
| 83 | 88 | required_device<t5182_device> m_t5182; |
| 84 | 89 | required_device<gfxdecode_device> m_gfxdecode; |
| 85 | 90 | required_device<screen_device> m_screen; |
| 86 | 91 | required_device<palette_device> m_palette; |
| 87 | | |
| 88 | | required_shared_ptr<UINT8> m_mainram; |
| 89 | | required_shared_ptr<UINT8> m_spriteram; |
| 90 | | required_shared_ptr<UINT8> m_textram; |
| 91 | | required_shared_ptr<UINT8> m_spritebank; |
| 92 | 92 | |
| 93 | 93 | tilemap_t *m_bgtilemap; |
| 94 | 94 | tilemap_t *m_infotilemap_2; |
| 95 | |
| 95 | 96 | tilemap_t *m_txttilemap; |
| 96 | | |
| 97 | 97 | int m_scrollx; |
| 98 | | bitmap_ind16 *m_temprender; |
| 99 | | bitmap_ind16 *m_tempbitmap_1; |
| 100 | | rectangle m_tempbitmap_clip; |
| 101 | 98 | |
| 102 | | DECLARE_READ8_MEMBER(collision_r); |
| 103 | | DECLARE_WRITE8_MEMBER(scrollx_lo_w); |
| 104 | | DECLARE_WRITE8_MEMBER(scrollx_hi_w); |
| 105 | | DECLARE_WRITE8_MEMBER(output_w); |
| 99 | DECLARE_READ8_MEMBER(panicr_collision_r); |
| 100 | DECLARE_WRITE8_MEMBER(panicr_scrollx_lo_w); |
| 101 | DECLARE_WRITE8_MEMBER(panicr_scrollx_hi_w); |
| 102 | DECLARE_WRITE8_MEMBER(panicr_output_w); |
| 106 | 103 | DECLARE_READ8_MEMBER(t5182shared_r); |
| 107 | 104 | DECLARE_WRITE8_MEMBER(t5182shared_w); |
| 108 | 105 | |
| 106 | DECLARE_DRIVER_INIT(panicr); |
| 109 | 107 | TILE_GET_INFO_MEMBER(get_bgtile_info); |
| 110 | 108 | TILE_GET_INFO_MEMBER(get_infotile_info); |
| 111 | 109 | TILE_GET_INFO_MEMBER(get_infotile_info_2); |
| 112 | 110 | TILE_GET_INFO_MEMBER(get_infotile_info_3); |
| 113 | 111 | TILE_GET_INFO_MEMBER(get_infotile_info_4); |
| 112 | |
| 114 | 113 | TILE_GET_INFO_MEMBER(get_txttile_info); |
| 115 | | |
| 116 | | DECLARE_DRIVER_INIT(panicr); |
| 117 | 114 | virtual void video_start(); |
| 118 | 115 | DECLARE_PALETTE_INIT(panicr); |
| 119 | | |
| 120 | | UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); |
| 116 | UINT32 screen_update_panicr(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); |
| 117 | TIMER_DEVICE_CALLBACK_MEMBER(panicr_scanline); |
| 121 | 118 | void draw_sprites(bitmap_ind16 &bitmap,const rectangle &cliprect ); |
| 122 | | |
| 123 | | TIMER_DEVICE_CALLBACK_MEMBER(scanline); |
| 119 | |
| 120 | bitmap_ind16 *m_temprender; |
| 121 | |
| 122 | bitmap_ind16 *m_tempbitmap_1; |
| 123 | rectangle m_tempbitmap_clip; |
| 124 | 124 | }; |
| 125 | 125 | |
| 126 | 126 | |
| r243420 | r243421 | |
| 243 | 243 | |
| 244 | 244 | m_txttilemap = &machine().tilemap().create(m_gfxdecode, tilemap_get_info_delegate(FUNC(panicr_state::get_txttile_info),this),TILEMAP_SCAN_ROWS,8,8,32,32 ); |
| 245 | 245 | m_txttilemap->configure_groups(*m_gfxdecode->gfx(0), 0); |
| 246 | | |
| 247 | | save_item(NAME(m_scrollx)); |
| 248 | 246 | } |
| 249 | 247 | |
| 250 | 248 | void panicr_state::draw_sprites(bitmap_ind16 &bitmap,const rectangle &cliprect ) |
| 251 | 249 | { |
| 250 | UINT8 *spriteram = m_spriteram; |
| 252 | 251 | int offs,flipx,flipy,x,y,color,sprite; |
| 253 | 252 | |
| 254 | 253 | |
| r243420 | r243421 | |
| 257 | 256 | for (offs = m_spriteram.bytes() - 16; offs>=0; offs-=16) |
| 258 | 257 | { |
| 259 | 258 | flipx = 0; |
| 260 | | flipy = m_spriteram[offs+1] & 0x80; |
| 261 | | y = m_spriteram[offs+2]; |
| 262 | | x = m_spriteram[offs+3]; |
| 263 | | if (m_spriteram[offs+1] & 0x40) x -= 0x100; |
| 259 | flipy = spriteram[offs+1] & 0x80; |
| 260 | y = spriteram[offs+2]; |
| 261 | x = spriteram[offs+3]; |
| 262 | if (spriteram[offs+1] & 0x40) x -= 0x100; |
| 264 | 263 | |
| 265 | | if (m_spriteram[offs+1] & 0x20) |
| 264 | if (spriteram[offs+1] & 0x20) |
| 266 | 265 | { |
| 267 | 266 | // often set |
| 268 | 267 | } |
| 269 | 268 | |
| 270 | | if (m_spriteram[offs+1] & 0x10) |
| 269 | if (spriteram[offs+1] & 0x10) |
| 271 | 270 | { |
| 272 | | popmessage("(spriteram[offs+1] & 0x10) %02x\n", (m_spriteram[offs+1] & 0x10)); |
| 271 | popmessage("(spriteram[offs+1] & 0x10) %02x\n", (spriteram[offs+1] & 0x10)); |
| 273 | 272 | } |
| 274 | 273 | |
| 275 | 274 | |
| 276 | | color = m_spriteram[offs+1] & 0x0f; |
| 277 | | sprite = m_spriteram[offs+0] | (*m_spritebank << 8); |
| 275 | color = spriteram[offs+1] & 0x0f; |
| 276 | sprite = spriteram[offs+0] | (*m_spritebank << 8); |
| 278 | 277 | |
| 279 | 278 | m_gfxdecode->gfx(2)->transmask(bitmap,cliprect, |
| 280 | 279 | sprite, |
| r243420 | r243421 | |
| 283 | 282 | } |
| 284 | 283 | } |
| 285 | 284 | |
| 286 | | UINT32 panicr_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) |
| 285 | UINT32 panicr_state::screen_update_panicr(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) |
| 287 | 286 | { |
| 288 | 287 | m_bgtilemap->set_scrollx(0, m_scrollx); |
| 289 | 288 | m_bgtilemap->draw(screen, *m_temprender, m_tempbitmap_clip, 0,0); |
| r243420 | r243421 | |
| 342 | 341 | |
| 343 | 342 | ***************************************************************************/ |
| 344 | 343 | |
| 345 | | READ8_MEMBER(panicr_state::collision_r) |
| 344 | READ8_MEMBER(panicr_state::panicr_collision_r) |
| 346 | 345 | { |
| 347 | 346 | // re-render the collision data here |
| 348 | 347 | // collisions are based on 2 bits from the tile data, relative to a page of tiles |
| r243420 | r243421 | |
| 385 | 384 | } |
| 386 | 385 | |
| 387 | 386 | |
| 388 | | WRITE8_MEMBER(panicr_state::scrollx_lo_w) |
| 387 | WRITE8_MEMBER(panicr_state::panicr_scrollx_lo_w) |
| 389 | 388 | { |
| 390 | | logerror("scrollx_lo_w %02x\n", data); |
| 389 | logerror("panicr_scrollx_lo_w %02x\n", data); |
| 391 | 390 | m_scrollx = (m_scrollx & 0xff00) | (data << 1 & 0xfe) | (data >> 7 & 0x01); |
| 392 | 391 | } |
| 393 | 392 | |
| 394 | | WRITE8_MEMBER(panicr_state::scrollx_hi_w) |
| 393 | WRITE8_MEMBER(panicr_state::panicr_scrollx_hi_w) |
| 395 | 394 | { |
| 396 | | logerror("scrollx_hi_w %02x\n", data); |
| 395 | logerror("panicr_scrollx_hi_w %02x\n", data); |
| 397 | 396 | m_scrollx = (m_scrollx & 0xff) | ((data &0xf0) << 4) | ((data & 0x0f) << 12); |
| 398 | 397 | } |
| 399 | 398 | |
| 400 | | WRITE8_MEMBER(panicr_state::output_w) |
| 399 | WRITE8_MEMBER(panicr_state::panicr_output_w) |
| 401 | 400 | { |
| 402 | 401 | // d6, d7: play counter? (it only triggers on 1st coin) |
| 403 | 402 | coin_counter_w(machine(), 0, (data & 0x40) ? 1 : 0); |
| 404 | 403 | coin_counter_w(machine(), 1, (data & 0x80) ? 1 : 0); |
| 405 | 404 | |
| 406 | | logerror("output_w %02x\n", data); |
| 405 | logerror("panicr_output_w %02x\n", data); |
| 407 | 406 | |
| 408 | 407 | // other bits: ? |
| 409 | 408 | } |
| r243420 | r243421 | |
| 427 | 426 | AM_RANGE(0x00000, 0x01fff) AM_RAM AM_SHARE("mainram") |
| 428 | 427 | AM_RANGE(0x02000, 0x03cff) AM_RAM AM_SHARE("spriteram") // how big is sprite ram, some places definitely have sprites at 3000+ |
| 429 | 428 | AM_RANGE(0x03d00, 0x03fff) AM_RAM |
| 430 | | AM_RANGE(0x08000, 0x0bfff) AM_READ(collision_r) |
| 429 | AM_RANGE(0x08000, 0x0bfff) AM_READ(panicr_collision_r) |
| 431 | 430 | AM_RANGE(0x0c000, 0x0cfff) AM_RAM AM_SHARE("textram") |
| 432 | 431 | AM_RANGE(0x0d000, 0x0d000) AM_DEVWRITE("t5182", t5182_device, sound_irq_w) |
| 433 | 432 | AM_RANGE(0x0d002, 0x0d002) AM_DEVWRITE("t5182", t5182_device, sharedram_semaphore_main_acquire_w) |
| r243420 | r243421 | |
| 439 | 438 | AM_RANGE(0x0d404, 0x0d404) AM_READ_PORT("START") |
| 440 | 439 | AM_RANGE(0x0d406, 0x0d406) AM_READ_PORT("DSW1") |
| 441 | 440 | AM_RANGE(0x0d407, 0x0d407) AM_READ_PORT("DSW2") |
| 442 | | AM_RANGE(0x0d802, 0x0d802) AM_WRITE(scrollx_hi_w) |
| 443 | | AM_RANGE(0x0d804, 0x0d804) AM_WRITE(scrollx_lo_w) |
| 444 | | AM_RANGE(0x0d80a, 0x0d80a) AM_WRITE(output_w) |
| 441 | AM_RANGE(0x0d802, 0x0d802) AM_WRITE(panicr_scrollx_hi_w) |
| 442 | AM_RANGE(0x0d804, 0x0d804) AM_WRITE(panicr_scrollx_lo_w) |
| 443 | AM_RANGE(0x0d80a, 0x0d80a) AM_WRITE(panicr_output_w) |
| 445 | 444 | AM_RANGE(0x0d80c, 0x0d80c) AM_WRITEONLY AM_SHARE("spritebank") |
| 446 | 445 | AM_RANGE(0x0d818, 0x0d818) AM_WRITENOP // watchdog? |
| 447 | 446 | AM_RANGE(0xf0000, 0xfffff) AM_ROM |
| r243420 | r243421 | |
| 520 | 519 | PORT_DIPSETTING( 0x80, DEF_STR( Upright ) ) |
| 521 | 520 | PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) ) |
| 522 | 521 | |
| 522 | PORT_START(T5182COINPORT) |
| 523 | PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(2) |
| 524 | PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(2) |
| 523 | 525 | INPUT_PORTS_END |
| 524 | 526 | |
| 525 | 527 | |
| r243420 | r243421 | |
| 592 | 594 | GFXDECODE_END |
| 593 | 595 | |
| 594 | 596 | |
| 595 | | TIMER_DEVICE_CALLBACK_MEMBER(panicr_state::scanline) |
| 597 | TIMER_DEVICE_CALLBACK_MEMBER(panicr_state::panicr_scanline) |
| 596 | 598 | { |
| 597 | 599 | int scanline = param; |
| 598 | 600 | |
| r243420 | r243421 | |
| 606 | 608 | static MACHINE_CONFIG_START( panicr, panicr_state ) |
| 607 | 609 | MCFG_CPU_ADD("maincpu", V20,MASTER_CLOCK/2) /* Sony 8623h9 CXQ70116D-8 (V20 compatible) */ |
| 608 | 610 | MCFG_CPU_PROGRAM_MAP(panicr_map) |
| 609 | | MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", panicr_state, scanline, "screen", 0, 1) |
| 611 | MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", panicr_state, panicr_scanline, "screen", 0, 1) |
| 610 | 612 | |
| 611 | | MCFG_DEVICE_ADD("t5182", T5182, 0) |
| 612 | | |
| 613 | MCFG_T5182_ADD("t5182") |
| 614 | MCFG_FRAGMENT_ADD(t5182) |
| 613 | 615 | |
| 614 | 616 | MCFG_SCREEN_ADD("screen", RASTER) |
| 615 | 617 | MCFG_SCREEN_REFRESH_RATE(60) |
| r243420 | r243421 | |
| 617 | 619 | MCFG_SCREEN_SIZE(32*8, 32*8) |
| 618 | 620 | // MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 0*8, 32*8-1) |
| 619 | 621 | MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1) |
| 620 | | MCFG_SCREEN_UPDATE_DRIVER(panicr_state, screen_update) |
| 622 | MCFG_SCREEN_UPDATE_DRIVER(panicr_state, screen_update_panicr) |
| 621 | 623 | MCFG_SCREEN_PALETTE("palette") |
| 622 | 624 | |
| 623 | 625 | MCFG_GFXDECODE_ADD("gfxdecode", "palette", panicr) |
| r243420 | r243421 | |
| 641 | 643 | ROM_LOAD16_BYTE("2.19m", 0x0f0000, 0x08000, CRC(3d48b0b5) SHA1(a6e8b38971a8964af463c16f32bb7dbd301dd314) ) |
| 642 | 644 | ROM_LOAD16_BYTE("1.19n", 0x0f0001, 0x08000, CRC(674131b9) SHA1(63499cd5ad39e79e70f3ba7060680f0aa133f095) ) |
| 643 | 645 | |
| 644 | | ROM_REGION( 0x8000, "t5182_z80", 0 ) /* Toshiba T5182 external ROM */ |
| 645 | | ROM_LOAD( "22d.bin", 0x0000, 0x8000, CRC(eb1a46e1) SHA1(278859ae4bca9f421247e646d789fa1206dcd8fc) ) |
| 646 | ROM_REGION( 0x10000, "t5182_z80", 0 ) /* Toshiba T5182 module */ |
| 647 | ROM_LOAD( "t5182.rom", 0x0000, 0x2000, CRC(d354c8fc) SHA1(a1c9e1ac293f107f69cc5788cf6abc3db1646e33) ) |
| 648 | ROM_LOAD( "22d.bin", 0x8000, 0x8000, CRC(eb1a46e1) SHA1(278859ae4bca9f421247e646d789fa1206dcd8fc) ) |
| 646 | 649 | |
| 647 | 650 | ROM_REGION( 0x04000, "gfx1", 0 ) |
| 648 | 651 | ROM_LOAD( "13f.bin", 0x000000, 0x2000, CRC(4e6b3c04) SHA1(f388969d5d822df0eaa4d8300cbf9cee47468360) ) |
| r243420 | r243421 | |
| 679 | 682 | ROM_LOAD16_BYTE("2g.19m", 0x0f0000, 0x08000, CRC(cf759403) SHA1(1a0911c943ecc752e46873c9a5da981745f7562d) ) |
| 680 | 683 | ROM_LOAD16_BYTE("1g.19n", 0x0f0001, 0x08000, CRC(06877f9b) SHA1(8b92209d6422ff2b1f3cb66bd39a3ff84e399eec) ) |
| 681 | 684 | |
| 682 | | ROM_REGION( 0x10000, "t5182_z80", 0 ) /* Toshiba T5182 external ROM */ |
| 683 | | ROM_LOAD( "22d.bin", 0x0000, 0x8000, CRC(eb1a46e1) SHA1(278859ae4bca9f421247e646d789fa1206dcd8fc) ) |
| 685 | ROM_REGION( 0x10000, "t5182_z80", 0 ) /* Toshiba T5182 module */ |
| 686 | ROM_LOAD( "t5182.rom", 0x0000, 0x2000, CRC(d354c8fc) SHA1(a1c9e1ac293f107f69cc5788cf6abc3db1646e33) ) |
| 687 | ROM_LOAD( "22d.bin", 0x8000, 0x8000, CRC(eb1a46e1) SHA1(278859ae4bca9f421247e646d789fa1206dcd8fc) ) |
| 684 | 688 | |
| 685 | 689 | ROM_REGION( 0x04000, "gfx1", 0 ) |
| 686 | 690 | ROM_LOAD( "13f.bin", 0x000000, 0x2000, CRC(4e6b3c04) SHA1(f388969d5d822df0eaa4d8300cbf9cee47468360) ) |
| r243420 | r243421 | |
| 828 | 832 | } |
| 829 | 833 | |
| 830 | 834 | |
| 831 | | GAME( 1986, panicr, 0, panicr, panicr, panicr_state, panicr, ROT270, "Seibu Kaihatsu (Taito license)", "Panic Road (Japan)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE ) |
| 832 | | GAME( 1986, panicrg, panicr, panicr, panicr, panicr_state, panicr, ROT270, "Seibu Kaihatsu (Tuning license)", "Panic Road (Germany)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE ) |
| 835 | GAME( 1986, panicr, 0, panicr, panicr, panicr_state, panicr, ROT270, "Seibu Kaihatsu (Taito license)", "Panic Road (Japan)", GAME_IMPERFECT_GRAPHICS ) |
| 836 | GAME( 1986, panicrg, panicr, panicr, panicr, panicr_state, panicr, ROT270, "Seibu Kaihatsu (Tuning license)", "Panic Road (Germany)", GAME_IMPERFECT_GRAPHICS ) |
trunk/src/mess/drivers/tmtennis.c
| r243420 | r243421 | |
| 1 | | // license:BSD-3-Clause |
| 2 | | // copyright-holders:hap |
| 3 | | /*************************************************************************** |
| 4 | | |
| 5 | | Tomy Tennis (manufactured in Japan) |
| 6 | | * board labeled TOMY TN-04 TENNIS |
| 7 | | * NEC uCOM-44 MCU, labeled D552C 048 |
| 8 | | * VFD display NEC FIP11AM15T (FIP=fluorescent indicator panel) |
| 9 | | |
| 10 | | |
| 11 | | ***************************************************************************/ |
| 12 | | |
| 13 | | #include "emu.h" |
| 14 | | #include "cpu/ucom4/ucom4.h" |
| 15 | | #include "sound/speaker.h" |
| 16 | | |
| 17 | | #include "tmtennis.lh" |
| 18 | | |
| 19 | | // master clock is from an LC circuit oscillating by default at 360kHz, |
| 20 | | // the difficulty switch puts a capacitor across it to slow it down to 260kHz |
| 21 | | #define MASTER_CLOCK_PRO1 (260000) |
| 22 | | #define MASTER_CLOCK_PRO2 (360000) |
| 23 | | |
| 24 | | |
| 25 | | class tmtennis_state : public driver_device |
| 26 | | { |
| 27 | | public: |
| 28 | | tmtennis_state(const machine_config &mconfig, device_type type, const char *tag) |
| 29 | | : driver_device(mconfig, type, tag), |
| 30 | | m_maincpu(*this, "maincpu"), |
| 31 | | m_speaker(*this, "speaker") |
| 32 | | { } |
| 33 | | |
| 34 | | required_device<cpu_device> m_maincpu; |
| 35 | | required_device<speaker_sound_device> m_speaker; |
| 36 | | |
| 37 | | virtual void machine_start(); |
| 38 | | }; |
| 39 | | |
| 40 | | |
| 41 | | |
| 42 | | /*************************************************************************** |
| 43 | | |
| 44 | | I/O |
| 45 | | |
| 46 | | ***************************************************************************/ |
| 47 | | |
| 48 | | |
| 49 | | |
| 50 | | /*************************************************************************** |
| 51 | | |
| 52 | | Inputs |
| 53 | | |
| 54 | | ***************************************************************************/ |
| 55 | | |
| 56 | | static INPUT_PORTS_START( tmtennis ) |
| 57 | | INPUT_PORTS_END |
| 58 | | |
| 59 | | |
| 60 | | |
| 61 | | /*************************************************************************** |
| 62 | | |
| 63 | | Machine Config |
| 64 | | |
| 65 | | ***************************************************************************/ |
| 66 | | |
| 67 | | void tmtennis_state::machine_start() |
| 68 | | { |
| 69 | | } |
| 70 | | |
| 71 | | |
| 72 | | static MACHINE_CONFIG_START( tmtennis, tmtennis_state ) |
| 73 | | |
| 74 | | /* basic machine hardware */ |
| 75 | | MCFG_CPU_ADD("maincpu", NEC_D552, MASTER_CLOCK_PRO2) |
| 76 | | |
| 77 | | MCFG_DEFAULT_LAYOUT(layout_tmtennis) |
| 78 | | |
| 79 | | /* no video! */ |
| 80 | | |
| 81 | | /* sound hardware */ |
| 82 | | MCFG_SPEAKER_STANDARD_MONO("mono") |
| 83 | | MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0) |
| 84 | | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) |
| 85 | | MACHINE_CONFIG_END |
| 86 | | |
| 87 | | |
| 88 | | |
| 89 | | /*************************************************************************** |
| 90 | | |
| 91 | | Game driver(s) |
| 92 | | |
| 93 | | ***************************************************************************/ |
| 94 | | |
| 95 | | ROM_START( tmtennis ) |
| 96 | | ROM_REGION( 0x0400, "maincpu", 0 ) |
| 97 | | ROM_LOAD( "d552c-048", 0x0000, 0x0400, CRC(78702003) SHA1(4d427d4dbeed901770c682338867f58c7b54eee3) ) |
| 98 | | ROM_END |
| 99 | | |
| 100 | | |
| 101 | | CONS( 1980, tmtennis, 0, 0, tmtennis, tmtennis, driver_device, 0, "Tomy", "Tomytronic Tennis", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) |
trunk/src/mess/machine/mbee.c
| r243420 | r243421 | |
| 274 | 274 | |
| 275 | 275 | ************************************************************/ |
| 276 | 276 | |
| 277 | | void mbee_state::mbee256_setup_banks(UINT8 data) |
| 277 | void mbee_state::mbee256_setup_banks(UINT8 data, bool first_time) |
| 278 | 278 | { |
| 279 | 279 | // (bits 0-5 are referred to as S0-S5) |
| 280 | 280 | address_space &mem = m_maincpu->space(AS_PROGRAM); |
| 281 | 281 | UINT8 *prom = memregion("proms")->base(); |
| 282 | 282 | UINT8 b_data = BITSWAP8(data, 7,5,3,2,4,6,1,0) & 0x3b; // arrange data bits to S0,S1,-,S4,S2,S3 |
| 283 | | UINT8 b_bank, b_byte, b_byte_t, b_addr; |
| 283 | UINT8 b_bank, b_byte, b_byte_t, b_addr, p_bank = 1; |
| 284 | 284 | UINT16 b_vid; |
| 285 | 285 | char banktag[10]; |
| 286 | 286 | |
| 287 | | for (b_bank = 0; b_bank < 16; b_bank++) |
| 287 | if (first_time || (b_data != m_bank_array[0])) |
| 288 | 288 | { |
| 289 | | b_vid = b_bank << 12; |
| 290 | | mem.unmap_readwrite (b_vid, b_vid + 0xfff); |
| 291 | | b_addr = BITSWAP8(b_bank, 7,4,5,3,1,2,6,0) & 0x1f; // arrange address bits to A12,-,A14,A13,A15 |
| 289 | m_bank_array[0] = b_data; |
| 292 | 290 | |
| 293 | | // Calculate read-bank |
| 294 | | b_byte_t = prom[b_addr | (b_data << 8) | 0x82]; // read-bank (RDS and MREQ are low, RFSH is high) |
| 295 | | b_byte = BITSWAP8(b_byte_t, 7,5,0,3,6,2,1,4); // rearrange so that bits 0-2 are rambank, bit 3 = rom select, bit 4 = video select, others not used |
| 296 | | if (!BIT(data, 5)) |
| 297 | | b_byte &= 0xfb; // U42/1 - S17 only valid if S5 is on |
| 298 | | if (!BIT(b_byte, 4)) |
| 291 | for (b_bank = 0; b_bank < 16; b_bank++) |
| 299 | 292 | { |
| 300 | | // select video |
| 301 | | mem.install_read_handler (b_vid, b_vid + 0x7ff, read8_delegate(FUNC(mbee_state::mbeeppc_low_r), this)); |
| 302 | | mem.install_read_handler (b_vid + 0x800, b_vid + 0xfff, read8_delegate(FUNC(mbee_state::mbeeppc_high_r), this)); |
| 303 | | } |
| 304 | | else |
| 305 | | { |
| 306 | | sprintf(banktag, "bankr%d", b_bank); |
| 307 | | mem.install_read_bank( b_vid, b_vid+0xfff, banktag ); |
| 293 | b_vid = b_bank << 12; |
| 294 | b_addr = BITSWAP8(b_bank, 7,4,5,3,1,2,6,0) & 0x1f; // arrange address bits to A12,-,A14,A13,A15 |
| 308 | 295 | |
| 309 | | if (!BIT(b_byte, 3)) |
| 310 | | membank(banktag)->set_entry(64 + (b_bank & 3)); // read from rom |
| 311 | | else |
| 312 | | membank(banktag)->set_entry((b_bank & 7) | ((b_byte & 7) << 3)); // ram |
| 313 | | } |
| 296 | // Calculate read-bank |
| 297 | b_byte_t = prom[b_addr | (b_data << 8) | 0x82]; // read-bank (RDS and MREQ are low, RFSH is high) |
| 298 | b_byte = BITSWAP8(b_byte_t, 7,5,0,3,6,2,1,4); // rearrange so that bits 0-2 are rambank, bit 3 = rom select, bit 4 = video select, others not used |
| 314 | 299 | |
| 315 | | // Calculate write-bank |
| 316 | | b_byte_t = prom[b_addr | (b_data << 8) | 0xc0]; // write-bank (XWR and MREQ are low, RFSH is high) |
| 317 | | b_byte = BITSWAP8(b_byte_t, 7,5,0,3,6,2,1,4); // rearrange so that bits 0-2 are rambank, bit 3 = rom select, bit 4 = video select, others not used |
| 318 | | if (!BIT(data, 5)) |
| 319 | | b_byte &= 0xfb; // U42/1 - S17 only valid if S5 is on |
| 320 | | if (!BIT(b_byte, 4)) |
| 321 | | { |
| 322 | | // select video |
| 323 | | mem.install_write_handler (b_vid, b_vid + 0x7ff, write8_delegate(FUNC(mbee_state::mbeeppc_low_w), this)); |
| 324 | | mem.install_write_handler (b_vid + 0x800, b_vid + 0xfff, write8_delegate(FUNC(mbee_state::mbeeppc_high_w), this)); |
| 325 | | } |
| 326 | | else |
| 327 | | { |
| 328 | | sprintf(banktag, "bankw%d", b_bank); |
| 329 | | mem.install_write_bank( b_vid, b_vid+0xfff, banktag ); |
| 300 | if (first_time || (b_byte != m_bank_array[p_bank])) |
| 301 | { |
| 302 | m_bank_array[p_bank] = b_byte; |
| 330 | 303 | |
| 331 | | if (!BIT(b_byte, 3)) |
| 332 | | membank(banktag)->set_entry(64); // write to rom dummy area |
| 333 | | else |
| 334 | | membank(banktag)->set_entry((b_bank & 7) | ((b_byte & 7) << 3)); // ram |
| 304 | if (!BIT(data, 5)) |
| 305 | b_byte &= 0xfb; // U42/1 - S17 only valid if S5 is on |
| 306 | |
| 307 | mem.unmap_read (b_vid, b_vid + 0xfff); |
| 308 | |
| 309 | if (!BIT(b_byte, 4)) |
| 310 | { |
| 311 | // select video |
| 312 | mem.install_read_handler (b_vid, b_vid + 0x7ff, read8_delegate(FUNC(mbee_state::mbeeppc_low_r), this)); |
| 313 | mem.install_read_handler (b_vid + 0x800, b_vid + 0xfff, read8_delegate(FUNC(mbee_state::mbeeppc_high_r), this)); |
| 314 | } |
| 315 | else |
| 316 | { |
| 317 | sprintf(banktag, "bankr%d", b_bank); |
| 318 | mem.install_read_bank( b_vid, b_vid+0xfff, banktag ); |
| 319 | |
| 320 | if (!BIT(b_byte, 3)) |
| 321 | membank(banktag)->set_entry(64 + (b_bank & 3)); // read from rom |
| 322 | else |
| 323 | membank(banktag)->set_entry((b_bank & 7) | ((b_byte & 7) << 3)); // ram |
| 324 | } |
| 325 | } |
| 326 | p_bank++; |
| 327 | |
| 328 | // Calculate write-bank |
| 329 | b_byte_t = prom[b_addr | (b_data << 8) | 0xc0]; // write-bank (XWR and MREQ are low, RFSH is high) |
| 330 | b_byte = BITSWAP8(b_byte_t, 7,5,0,3,6,2,1,4); // rearrange so that bits 0-2 are rambank, bit 3 = rom select, bit 4 = video select, others not used |
| 331 | |
| 332 | if (first_time || (b_byte != m_bank_array[p_bank])) |
| 333 | { |
| 334 | m_bank_array[p_bank] = b_byte; |
| 335 | |
| 336 | if (!BIT(data, 5)) |
| 337 | b_byte &= 0xfb; // U42/1 - S17 only valid if S5 is on |
| 338 | |
| 339 | mem.unmap_write (b_vid, b_vid + 0xfff); |
| 340 | |
| 341 | if (!BIT(b_byte, 4)) |
| 342 | { |
| 343 | // select video |
| 344 | mem.install_write_handler (b_vid, b_vid + 0x7ff, write8_delegate(FUNC(mbee_state::mbeeppc_low_w), this)); |
| 345 | mem.install_write_handler (b_vid + 0x800, b_vid + 0xfff, write8_delegate(FUNC(mbee_state::mbeeppc_high_w), this)); |
| 346 | } |
| 347 | else |
| 348 | { |
| 349 | sprintf(banktag, "bankw%d", b_bank); |
| 350 | mem.install_write_bank( b_vid, b_vid+0xfff, banktag ); |
| 351 | |
| 352 | if (!BIT(b_byte, 3)) |
| 353 | membank(banktag)->set_entry(64); // write to rom dummy area |
| 354 | else |
| 355 | membank(banktag)->set_entry((b_bank & 7) | ((b_byte & 7) << 3)); // ram |
| 356 | } |
| 357 | } |
| 358 | p_bank++; |
| 335 | 359 | } |
| 336 | 360 | } |
| 337 | 361 | } |
| 338 | 362 | |
| 339 | 363 | WRITE8_MEMBER( mbee_state::mbee256_50_w ) |
| 340 | 364 | { |
| 341 | | mbee256_setup_banks(data & 0x3f); |
| 365 | mbee256_setup_banks(data & 0x3f, 0); |
| 342 | 366 | } |
| 343 | 367 | |
| 344 | 368 | /*********************************************************** |
| r243420 | r243421 | |
| 356 | 380 | |
| 357 | 381 | WRITE8_MEMBER( mbee_state::mbee128_50_w ) |
| 358 | 382 | { |
| 359 | | mbee256_setup_banks(data & 0x1f); // S5 not used |
| 383 | mbee256_setup_banks(data & 0x1f, 0); // S5 not used |
| 360 | 384 | } |
| 361 | 385 | |
| 362 | 386 | |
| r243420 | r243421 | |
| 476 | 500 | MACHINE_RESET_MEMBER( mbee_state, mbee128 ) |
| 477 | 501 | { |
| 478 | 502 | machine_reset_common_disk(); |
| 479 | | mbee256_setup_banks(0); // set banks to default |
| 503 | mbee256_setup_banks(0, 1); // set banks to default |
| 480 | 504 | m_maincpu->set_pc(0x8000); |
| 481 | 505 | } |
| 482 | 506 | |
| r243420 | r243421 | |
| 486 | 510 | for (i = 0; i < 15; i++) m_mbee256_was_pressed[i] = 0; |
| 487 | 511 | m_mbee256_q_pos = 0; |
| 488 | 512 | machine_reset_common_disk(); |
| 489 | | mbee256_setup_banks(0); // set banks to default |
| 513 | mbee256_setup_banks(0, 1); // set banks to default |
| 490 | 514 | m_maincpu->set_pc(0x8000); |
| 491 | 515 | } |
| 492 | 516 | |