trunk/src/lib/formats/pc98_dsk.c
| r243384 | r243385 | |
| 59 | 59 | }, |
| 60 | 60 | { /* 1200K 5 1/4 inch high density */ |
| 61 | 61 | floppy_image::FF_525, floppy_image::DSHD, floppy_image::MFM, |
| 62 | | 1200, 15, 40, 2, 512, {}, 1, {}, 80, 50, 22, 84 |
| 62 | 1200, 15, 80, 2, 512, {}, 1, {}, 80, 50, 22, 84 |
| 63 | 63 | }, |
| 64 | 64 | { /* 720K 3 1/2 inch double density */ |
| 65 | 65 | floppy_image::FF_35, floppy_image::DSDD, floppy_image::MFM, |
| r243384 | r243385 | |
| 67 | 67 | }, |
| 68 | 68 | { /* 1200K 3 1/2 inch high density (japanese variant) - gaps unverified */ |
| 69 | 69 | floppy_image::FF_35, floppy_image::DSHD, floppy_image::MFM, |
| 70 | | 1200, 15, 40, 2, 512, {}, 1, {}, 80, 50, 22, 84 |
| 70 | 1200, 15, 80, 2, 512, {}, 1, {}, 80, 50, 22, 84 |
| 71 | 71 | }, |
| 72 | 72 | { /* 1440K 3 1/2 inch high density */ |
| 73 | 73 | floppy_image::FF_35, floppy_image::DSHD, floppy_image::MFM, |
trunk/src/mess/drivers/pc9801.c
| r243384 | r243385 | |
| 13 | 13 | - Finish DIP-Switches support |
| 14 | 14 | - text scrolling |
| 15 | 15 | - GRCG+ |
| 16 | | - EGC |
| 17 | 16 | - rewrite using slot devices |
| 18 | 17 | - some later SWs put "Invalid command byte 05" (Absolutely Mahjong on Epson logo) |
| 19 | 18 | - investigate on POR bit |
| r243384 | r243385 | |
| 78 | 77 | - Armored Flagship Atragon: needs HDD install |
| 79 | 78 | - Arquephos: needs extra sound board(s)? |
| 80 | 79 | - Asoko no Koufuku: black screen with BGM, waits at 0x225f6; |
| 81 | | - Aura Battler Dumbine: upd7220: unimplemented FIGD, has layer clearance bugs on gameplay; |
| 82 | 80 | - Band-Kun: (how to run this without installing?) |
| 83 | 81 | - Battle Chess: wants some dip-switches to be on in DSW4, too slow during IA thinking? |
| 84 | 82 | - Bishoujo Audition: Moans with a "(program) ended. remove the floppy disk and turn off the poewr." |
| r243384 | r243385 | |
| 106 | 104 | - Uchiyama Aki no Chou Bangai: keyboard irq is fussy (sometimes it doesn't register a key press); |
| 107 | 105 | - Uno: uses EGC |
| 108 | 106 | - Viper V16 Demo: moans with a JP message; |
| 107 | - Windows 2: EGC drawing issue (byte wide writes?) |
| 109 | 108 | |
| 110 | 109 | per-game TODO (PC-9821): |
| 111 | 110 | - Battle Skin Panic: gfx bugs at the Gainax logo, it crashes after it; |
| r243384 | r243385 | |
| 115 | 114 | - Animahjong V3 makes advantage of the possibility of installing 2 sound boards, where SFX and BGMs are played on separate chips. |
| 116 | 115 | - Apple Club 1/2 needs data disks to load properly; |
| 117 | 116 | - Beast Lord: needs a titan.fnt, in MS-DOS |
| 117 | - To deprotect BASIC modules set 0xcd7 in ram to 0 |
| 118 | 118 | |
| 119 | 119 | ======================================================================================== |
| 120 | 120 | |
| r243384 | r243385 | |
| 550 | 550 | INT16 count; |
| 551 | 551 | UINT16 leftover[4]; |
| 552 | 552 | bool first; |
| 553 | bool init; |
| 553 | 554 | } m_egc; |
| 554 | 555 | |
| 555 | 556 | /* PC9821 specific */ |
| r243384 | r243385 | |
| 588 | 589 | DECLARE_WRITE16_MEMBER(upd7220_grcg_w); |
| 589 | 590 | void egc_blit_w(UINT32 offset, UINT16 data, UINT16 mem_mask); |
| 590 | 591 | UINT16 egc_blit_r(UINT32 offset, UINT16 mem_mask); |
| 591 | | inline UINT16 egc_do_partial_op(int plane, UINT16 src, UINT16 pat, UINT16 dst); |
| 592 | 592 | UINT32 pc9801_286_a20(bool state); |
| 593 | 593 | |
| 594 | 594 | DECLARE_READ8_MEMBER(ide_hack_r); |
| r243384 | r243385 | |
| 670 | 670 | private: |
| 671 | 671 | UINT8 m_sdip_read(UINT16 port, UINT8 sdip_offset); |
| 672 | 672 | void m_sdip_write(UINT16 port, UINT8 sdip_offset,UINT8 data); |
| 673 | UINT16 egc_do_partial_op(int plane, UINT16 src, UINT16 pat, UINT16 dst); |
| 674 | UINT16 egc_shift(int plane, UINT16 val); |
| 673 | 675 | public: |
| 674 | 676 | DECLARE_MACHINE_START(pc9801_common); |
| 675 | 677 | DECLARE_MACHINE_START(pc9801f); |
| r243384 | r243385 | |
| 1330 | 1332 | m_video_ram_2[(offset>>1)+0x04000+m_vram_bank*0x10000] = (ram & (0xff00 >> mask)) | (data << mask); |
| 1331 | 1333 | } |
| 1332 | 1334 | |
| 1333 | | inline UINT16 pc9801_state::egc_do_partial_op(int plane, UINT16 src, UINT16 pat, UINT16 dst) |
| 1335 | UINT16 pc9801_state::egc_shift(int plane, UINT16 val) |
| 1334 | 1336 | { |
| 1335 | | UINT16 out = 0; |
| 1336 | | int src_off, dst_off; |
| 1337 | | UINT16 src_tmp = src; |
| 1338 | | |
| 1337 | int src_off = m_egc.regs[6] & 0xf, dst_off = (m_egc.regs[6] >> 4) & 0xf; |
| 1338 | int left = src_off - dst_off, right = dst_off - src_off; |
| 1339 | UINT16 out; |
| 1339 | 1340 | if(m_egc.regs[6] & 0x1000) |
| 1340 | 1341 | { |
| 1341 | | src_off = 15 - (m_egc.regs[6] & 0xf); |
| 1342 | | dst_off = 15 - ((m_egc.regs[6] >> 4) & 0xf); |
| 1342 | if(right >= 0) |
| 1343 | { |
| 1344 | out = (val >> right) | m_egc.leftover[plane]; |
| 1345 | m_egc.leftover[plane] = val << (16 - right); |
| 1346 | } |
| 1347 | else |
| 1348 | { |
| 1349 | out = (val >> (16 - left)) | m_egc.leftover[plane]; |
| 1350 | m_egc.leftover[plane] = val << left; |
| 1351 | } |
| 1343 | 1352 | } |
| 1344 | 1353 | else |
| 1345 | 1354 | { |
| 1346 | | src_off = m_egc.regs[6] & 0xf; |
| 1347 | | dst_off = (m_egc.regs[6] >> 4) & 0xf; |
| 1355 | if(right >= 0) |
| 1356 | { |
| 1357 | out = (val << right) | m_egc.leftover[plane]; |
| 1358 | m_egc.leftover[plane] = val >> (16 - right); |
| 1359 | } |
| 1360 | else |
| 1361 | { |
| 1362 | out = (val << (16 - left)) | m_egc.leftover[plane]; |
| 1363 | m_egc.leftover[plane] = val >> left; |
| 1364 | } |
| 1348 | 1365 | } |
| 1366 | return out; |
| 1367 | } |
| 1349 | 1368 | |
| 1350 | | if(src_off < dst_off) |
| 1351 | | { |
| 1352 | | src = src_tmp << (dst_off - src_off); |
| 1353 | | src |= m_egc.leftover[plane]; |
| 1354 | | m_egc.leftover[plane] = src_tmp >> (16 - (dst_off - src_off)); |
| 1355 | | } |
| 1356 | | else |
| 1357 | | { |
| 1358 | | src = src_tmp >> (src_off - dst_off); |
| 1359 | | src |= m_egc.leftover[plane]; |
| 1360 | | m_egc.leftover[plane] = src_tmp << (16 - (src_off - dst_off)); |
| 1361 | | } |
| 1369 | UINT16 pc9801_state::egc_do_partial_op(int plane, UINT16 src, UINT16 pat, UINT16 dst) |
| 1370 | { |
| 1371 | UINT16 out = 0; |
| 1372 | int dst_off = (m_egc.regs[6] >> 4) & 0xf; |
| 1373 | UINT16 src_tmp = src; |
| 1362 | 1374 | |
| 1363 | 1375 | for(int i = 7; i >= 0; i--) |
| 1364 | 1376 | { |
| r243384 | r243385 | |
| 1375 | 1387 | { |
| 1376 | 1388 | UINT16 mask = m_egc.regs[4] & mem_mask, out = 0; |
| 1377 | 1389 | bool dir = !(m_egc.regs[6] & 0x1000); |
| 1378 | | int dst_off = (m_egc.regs[6] >> 4) & 0xf; |
| 1390 | int dst_off = (m_egc.regs[6] >> 4) & 0xf, src_off = m_egc.regs[6] & 0xf; |
| 1379 | 1391 | offset &= 0x13fff; |
| 1380 | 1392 | |
| 1381 | | if((((m_egc.regs[2] >> 11) & 3) == 1) || ((((m_egc.regs[2] >> 11) & 3) == 2) && !BIT(m_egc.regs[2], 10))) |
| 1393 | if(!m_egc.init && (src_off > dst_off)) |
| 1382 | 1394 | { |
| 1383 | | UINT16 end_mask = 0xffff, start_mask = 0xffff; |
| 1384 | | // mask off the bits before the start |
| 1385 | | if(m_egc.first) |
| 1395 | if(BIT(m_egc.regs[2], 10)) |
| 1386 | 1396 | { |
| 1387 | 1397 | m_egc.leftover[0] = m_egc.leftover[1] = m_egc.leftover[2] = m_egc.leftover[3] = 0; |
| 1388 | | start_mask = dir ? ~((1 << dst_off) - 1) : ((1 << (15 - dst_off)) - 1); |
| 1398 | egc_shift(0, data); |
| 1399 | // leftover[0] is inited above, set others to same |
| 1400 | m_egc.leftover[1] = m_egc.leftover[2] = m_egc.leftover[3] = m_egc.leftover[0]; |
| 1389 | 1401 | } |
| 1402 | m_egc.init = true; |
| 1403 | return; |
| 1404 | } |
| 1390 | 1405 | |
| 1391 | | // mask off the bits past the end of the blit |
| 1392 | | if(m_egc.count < 16) |
| 1406 | // mask off the bits before the start |
| 1407 | if(m_egc.first) |
| 1408 | { |
| 1409 | mask &= dir ? ~((1 << dst_off) - 1) : ((1 << (dst_off + 1)) - 1); |
| 1410 | if(!m_egc.init) |
| 1411 | m_egc.leftover[0] = m_egc.leftover[1] = m_egc.leftover[2] = m_egc.leftover[3] = 0; |
| 1412 | } |
| 1413 | |
| 1414 | // mask off the bits past the end of the blit |
| 1415 | if(m_egc.count < 16) |
| 1416 | { |
| 1417 | UINT16 end_mask = dir ? ((1 << m_egc.count) - 1) : ~((1 << (16 - m_egc.count)) - 1); |
| 1418 | // if the blit is less than 16 bits, adjust the masks |
| 1419 | if(m_egc.first) |
| 1393 | 1420 | { |
| 1394 | | end_mask = dir ? ((1 << m_egc.count) - 1) : ~((1 << (16 - m_egc.count)) - 1); |
| 1395 | | // if the blit is less than 16 bits, adjust the masks |
| 1396 | | if(start_mask != 0xffff) |
| 1397 | | { |
| 1398 | | if(dir) |
| 1399 | | end_mask <<= dst_off; |
| 1400 | | else |
| 1401 | | end_mask >>= (15 - dst_off); |
| 1402 | | } |
| 1421 | if(dir) |
| 1422 | end_mask <<= dst_off; |
| 1423 | else |
| 1424 | end_mask >>= dst_off; |
| 1403 | 1425 | } |
| 1404 | | mask &= end_mask & start_mask; |
| 1426 | mask &= end_mask; |
| 1405 | 1427 | } |
| 1406 | 1428 | |
| 1407 | 1429 | for(int i = 0; i < 4; i++) |
| r243384 | r243385 | |
| 1410 | 1432 | { |
| 1411 | 1433 | UINT16 src = m_egc.src[i] & mem_mask, pat = m_egc.pat[i]; |
| 1412 | 1434 | if(BIT(m_egc.regs[2], 10)) |
| 1413 | | src = data; |
| 1435 | src = egc_shift(i, data); |
| 1414 | 1436 | |
| 1415 | 1437 | if((m_egc.regs[2] & 0x300) == 0x200) |
| 1416 | 1438 | pat = m_video_ram_2[offset + (((i + 1) & 3) * 0x4000)]; |
| r243384 | r243385 | |
| 1442 | 1464 | } |
| 1443 | 1465 | if(mem_mask != 0xffff) |
| 1444 | 1466 | { |
| 1445 | | dst_off &= 7; |
| 1446 | 1467 | if(m_egc.first) |
| 1447 | | m_egc.count -= dir ? 8 - dst_off : (dst_off + 1); |
| 1468 | m_egc.count -= 8 - (dst_off & 7); |
| 1448 | 1469 | else |
| 1449 | 1470 | m_egc.count -= 8; |
| 1450 | 1471 | } |
| 1451 | 1472 | else |
| 1452 | 1473 | { |
| 1453 | 1474 | if(m_egc.first) |
| 1454 | | m_egc.count -= dir ? 16 - dst_off : (dst_off + 1); |
| 1475 | m_egc.count -= 16 - dst_off; |
| 1455 | 1476 | else |
| 1456 | 1477 | m_egc.count -= 16; |
| 1457 | 1478 | } |
| r243384 | r243385 | |
| 1461 | 1482 | if(m_egc.count <= 0) |
| 1462 | 1483 | { |
| 1463 | 1484 | m_egc.first = true; |
| 1485 | m_egc.init = false; |
| 1464 | 1486 | m_egc.count = (m_egc.regs[7] & 0xfff) + 1; |
| 1465 | 1487 | } |
| 1466 | 1488 | } |
| r243384 | r243385 | |
| 1475 | 1497 | m_egc.pat[2] = m_video_ram_2[plane_off + (0x4000 * 3)]; |
| 1476 | 1498 | m_egc.pat[3] = m_video_ram_2[plane_off]; |
| 1477 | 1499 | } |
| 1478 | | if(!BIT(m_egc.regs[2], 10)) |
| 1479 | | { |
| 1480 | | m_egc.src[0] = m_video_ram_2[plane_off + 0x4000]; |
| 1481 | | m_egc.src[1] = m_video_ram_2[plane_off + (0x4000 * 2)]; |
| 1482 | | m_egc.src[2] = m_video_ram_2[plane_off + (0x4000 * 3)]; |
| 1483 | | m_egc.src[3] = m_video_ram_2[plane_off]; |
| 1484 | | } |
| 1500 | for(int i = 0; i < 4; i++) |
| 1501 | m_egc.src[i] = egc_shift(i, m_video_ram_2[plane_off + (((i + 1) & 3) * 0x4000)]); |
| 1502 | |
| 1485 | 1503 | if(BIT(m_egc.regs[2], 13)) |
| 1486 | 1504 | return m_video_ram_2[offset]; |
| 1487 | 1505 | else |
| 1488 | | return m_video_ram_2[plane_off + (((m_egc.regs[1] >> 8) + 1) & 3) * 0x4000]; |
| 1506 | return m_egc.src[(m_egc.regs[1] >> 8) & 3]; |
| 1489 | 1507 | } |
| 1490 | 1508 | |
| 1491 | 1509 | READ16_MEMBER(pc9801_state::upd7220_grcg_r) |
| r243384 | r243385 | |
| 1906 | 1924 | case 7: |
| 1907 | 1925 | m_egc.count = (m_egc.regs[7] & 0xfff) + 1; |
| 1908 | 1926 | m_egc.first = true; |
| 1927 | m_egc.init = false; |
| 1909 | 1928 | break; |
| 1910 | 1929 | } |
| 1911 | 1930 | } |
| r243384 | r243385 | |
| 2969 | 2988 | save_item(NAME(m_sasi_data)); |
| 2970 | 2989 | save_item(NAME(m_sasi_data_enable)); |
| 2971 | 2990 | save_item(NAME(m_sasi_ctrl)); |
| 2991 | save_item(NAME(m_vrtc_irq_mask)); |
| 2972 | 2992 | } |
| 2973 | 2993 | |
| 2974 | 2994 | MACHINE_START_MEMBER(pc9801_state,pc9801f) |