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r34873 Thursday 5th February, 2015 at 18:18:12 UTC by Carl
(mess) pc9801: fix egc shifter (nw)
[src/lib/formats]pc98_dsk.c
[src/mess/drivers]pc9801.c

trunk/src/lib/formats/pc98_dsk.c
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5959   },
6060   {   /* 1200K 5 1/4 inch high density */
6161      floppy_image::FF_525, floppy_image::DSHD, floppy_image::MFM,
62      1200, 15, 40, 2, 512, {}, 1, {}, 80, 50, 22, 84
62      1200, 15, 80, 2, 512, {}, 1, {}, 80, 50, 22, 84
6363   },
6464   {   /*  720K 3 1/2 inch double density */
6565      floppy_image::FF_35,  floppy_image::DSDD, floppy_image::MFM,
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6767   },
6868   {   /* 1200K 3 1/2 inch high density (japanese variant) - gaps unverified */
6969      floppy_image::FF_35,  floppy_image::DSHD, floppy_image::MFM,
70      1200, 15, 40, 2, 512, {}, 1, {}, 80, 50, 22, 84
70      1200, 15, 80, 2, 512, {}, 1, {}, 80, 50, 22, 84
7171   },
7272   {   /* 1440K 3 1/2 inch high density */
7373      floppy_image::FF_35,  floppy_image::DSHD, floppy_image::MFM,
trunk/src/mess/drivers/pc9801.c
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1313    - Finish DIP-Switches support
1414    - text scrolling
1515    - GRCG+
16    - EGC
1716    - rewrite using slot devices
1817    - some later SWs put "Invalid command byte 05" (Absolutely Mahjong on Epson logo)
1918    - investigate on POR bit
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7877    - Armored Flagship Atragon: needs HDD install
7978    - Arquephos: needs extra sound board(s)?
8079    - Asoko no Koufuku: black screen with BGM, waits at 0x225f6;
81    - Aura Battler Dumbine: upd7220: unimplemented FIGD, has layer clearance bugs on gameplay;
8280    - Band-Kun: (how to run this without installing?)
8381    - Battle Chess: wants some dip-switches to be on in DSW4, too slow during IA thinking?
8482    - Bishoujo Audition: Moans with a "(program) ended. remove the floppy disk and turn off the poewr."
r243384r243385
106104    - Uchiyama Aki no Chou Bangai: keyboard irq is fussy (sometimes it doesn't register a key press);
107105    - Uno: uses EGC
108106    - Viper V16 Demo: moans with a JP message;
107    - Windows 2: EGC drawing issue (byte wide writes?)
109108
110109    per-game TODO (PC-9821):
111110    - Battle Skin Panic: gfx bugs at the Gainax logo, it crashes after it;
r243384r243385
115114    - Animahjong V3 makes advantage of the possibility of installing 2 sound boards, where SFX and BGMs are played on separate chips.
116115    - Apple Club 1/2 needs data disks to load properly;
117116    - Beast Lord: needs a titan.fnt, in MS-DOS
117    - To deprotect BASIC modules set 0xcd7 in ram to 0
118118
119119========================================================================================
120120
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550550      INT16 count;
551551      UINT16 leftover[4];
552552      bool first;
553      bool init;
553554   } m_egc;
554555
555556   /* PC9821 specific */
r243384r243385
588589   DECLARE_WRITE16_MEMBER(upd7220_grcg_w);
589590   void egc_blit_w(UINT32 offset, UINT16 data, UINT16 mem_mask);
590591   UINT16 egc_blit_r(UINT32 offset, UINT16 mem_mask);
591   inline UINT16 egc_do_partial_op(int plane, UINT16 src, UINT16 pat, UINT16 dst);
592592   UINT32 pc9801_286_a20(bool state);
593593
594594   DECLARE_READ8_MEMBER(ide_hack_r);
r243384r243385
670670private:
671671   UINT8 m_sdip_read(UINT16 port, UINT8 sdip_offset);
672672   void m_sdip_write(UINT16 port, UINT8 sdip_offset,UINT8 data);
673   UINT16 egc_do_partial_op(int plane, UINT16 src, UINT16 pat, UINT16 dst);
674   UINT16 egc_shift(int plane, UINT16 val);
673675public:
674676   DECLARE_MACHINE_START(pc9801_common);
675677   DECLARE_MACHINE_START(pc9801f);
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13301332   m_video_ram_2[(offset>>1)+0x04000+m_vram_bank*0x10000] = (ram & (0xff00 >> mask)) | (data << mask);
13311333}
13321334
1333inline UINT16 pc9801_state::egc_do_partial_op(int plane, UINT16 src, UINT16 pat, UINT16 dst)
1335UINT16 pc9801_state::egc_shift(int plane, UINT16 val)
13341336{
1335   UINT16 out = 0;
1336   int src_off, dst_off;
1337   UINT16 src_tmp = src;
1338
1337   int src_off = m_egc.regs[6] & 0xf, dst_off = (m_egc.regs[6] >> 4) & 0xf;
1338   int left = src_off - dst_off, right = dst_off - src_off;
1339   UINT16 out;
13391340   if(m_egc.regs[6] & 0x1000)
13401341   {
1341      src_off = 15 - (m_egc.regs[6] & 0xf);
1342      dst_off = 15 - ((m_egc.regs[6] >> 4) & 0xf);
1342      if(right >= 0)
1343      {
1344         out = (val >> right) | m_egc.leftover[plane];
1345         m_egc.leftover[plane] = val << (16 - right);
1346      }
1347      else
1348      {
1349         out = (val >> (16 - left)) | m_egc.leftover[plane];
1350         m_egc.leftover[plane] = val << left;
1351      }
13431352   }
13441353   else
13451354   {
1346      src_off = m_egc.regs[6] & 0xf;
1347      dst_off = (m_egc.regs[6] >> 4) & 0xf;
1355      if(right >= 0)
1356      {
1357         out = (val << right) | m_egc.leftover[plane];
1358         m_egc.leftover[plane] = val >> (16 - right);
1359      }
1360      else
1361      {
1362         out = (val << (16 - left)) | m_egc.leftover[plane];
1363         m_egc.leftover[plane] = val >> left;
1364      }
13481365   }
1366   return out;
1367}
13491368
1350   if(src_off < dst_off)
1351   {
1352      src = src_tmp << (dst_off - src_off);
1353      src |= m_egc.leftover[plane];
1354      m_egc.leftover[plane] = src_tmp >> (16 - (dst_off - src_off));
1355   }
1356   else
1357   {
1358      src = src_tmp >> (src_off - dst_off);
1359      src |= m_egc.leftover[plane];
1360      m_egc.leftover[plane] = src_tmp << (16 - (src_off - dst_off));
1361   }
1369UINT16 pc9801_state::egc_do_partial_op(int plane, UINT16 src, UINT16 pat, UINT16 dst)
1370{
1371   UINT16 out = 0;
1372   int dst_off = (m_egc.regs[6] >> 4) & 0xf;
1373   UINT16 src_tmp = src;
13621374
13631375   for(int i = 7; i >= 0; i--)
13641376   {
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13751387{
13761388   UINT16 mask = m_egc.regs[4] & mem_mask, out = 0;
13771389   bool dir = !(m_egc.regs[6] & 0x1000);
1378   int dst_off = (m_egc.regs[6] >> 4) & 0xf;
1390   int dst_off = (m_egc.regs[6] >> 4) & 0xf, src_off = m_egc.regs[6] & 0xf;
13791391   offset &= 0x13fff;
13801392
1381   if((((m_egc.regs[2] >> 11) & 3) == 1) || ((((m_egc.regs[2] >> 11) & 3) == 2) && !BIT(m_egc.regs[2], 10)))
1393   if(!m_egc.init && (src_off > dst_off))
13821394   {
1383      UINT16 end_mask = 0xffff, start_mask = 0xffff;
1384      // mask off the bits before the start
1385      if(m_egc.first)
1395      if(BIT(m_egc.regs[2], 10))
13861396      {
13871397         m_egc.leftover[0] = m_egc.leftover[1] = m_egc.leftover[2] = m_egc.leftover[3] = 0;
1388         start_mask = dir ? ~((1 << dst_off) - 1) : ((1 << (15 - dst_off)) - 1);
1398         egc_shift(0, data);
1399         // leftover[0] is inited above, set others to same
1400         m_egc.leftover[1] = m_egc.leftover[2] = m_egc.leftover[3] = m_egc.leftover[0];
13891401      }
1402      m_egc.init = true;
1403      return;
1404   }
13901405
1391      // mask off the bits past the end of the blit
1392      if(m_egc.count < 16)
1406   // mask off the bits before the start
1407   if(m_egc.first)
1408   {
1409      mask &= dir ? ~((1 << dst_off) - 1) : ((1 << (dst_off + 1)) - 1);
1410      if(!m_egc.init)
1411         m_egc.leftover[0] = m_egc.leftover[1] = m_egc.leftover[2] = m_egc.leftover[3] = 0;
1412   }
1413
1414   // mask off the bits past the end of the blit
1415   if(m_egc.count < 16)
1416   {
1417      UINT16 end_mask = dir ? ((1 << m_egc.count) - 1) : ~((1 << (16 - m_egc.count)) - 1);
1418      // if the blit is less than 16 bits, adjust the masks
1419      if(m_egc.first)
13931420      {
1394         end_mask = dir ? ((1 << m_egc.count) - 1) : ~((1 << (16 - m_egc.count)) - 1);
1395         // if the blit is less than 16 bits, adjust the masks
1396         if(start_mask != 0xffff)
1397         {
1398            if(dir)
1399               end_mask <<= dst_off;
1400            else
1401               end_mask >>= (15 - dst_off);
1402         }
1421         if(dir)
1422            end_mask <<= dst_off;
1423         else
1424            end_mask >>= dst_off;
14031425      }
1404      mask &= end_mask & start_mask;
1426      mask &= end_mask;
14051427   }
14061428
14071429   for(int i = 0; i < 4; i++)
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14101432      {
14111433         UINT16 src = m_egc.src[i] & mem_mask, pat = m_egc.pat[i];
14121434         if(BIT(m_egc.regs[2], 10))
1413            src = data;
1435            src = egc_shift(i, data);
14141436
14151437         if((m_egc.regs[2] & 0x300) == 0x200)
14161438            pat = m_video_ram_2[offset + (((i + 1) & 3) * 0x4000)];
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14421464   }
14431465   if(mem_mask != 0xffff)
14441466   {
1445      dst_off &= 7;
14461467      if(m_egc.first)
1447         m_egc.count -= dir ? 8 - dst_off : (dst_off + 1);
1468         m_egc.count -= 8 - (dst_off & 7);
14481469      else
14491470         m_egc.count -= 8;
14501471   }
14511472   else
14521473   {
14531474      if(m_egc.first)
1454         m_egc.count -= dir ? 16 - dst_off : (dst_off + 1);
1475         m_egc.count -= 16 - dst_off;
14551476      else
14561477         m_egc.count -= 16;
14571478   }
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14611482   if(m_egc.count <= 0)
14621483   {
14631484      m_egc.first = true;
1485      m_egc.init = false;
14641486      m_egc.count = (m_egc.regs[7] & 0xfff) + 1;
14651487   }
14661488}
r243384r243385
14751497      m_egc.pat[2] = m_video_ram_2[plane_off + (0x4000 * 3)];
14761498      m_egc.pat[3] = m_video_ram_2[plane_off];
14771499   }
1478   if(!BIT(m_egc.regs[2], 10))
1479   {
1480      m_egc.src[0] = m_video_ram_2[plane_off + 0x4000];
1481      m_egc.src[1] = m_video_ram_2[plane_off + (0x4000 * 2)];
1482      m_egc.src[2] = m_video_ram_2[plane_off + (0x4000 * 3)];
1483      m_egc.src[3] = m_video_ram_2[plane_off];
1484   }
1500   for(int i = 0; i < 4; i++)
1501      m_egc.src[i] = egc_shift(i, m_video_ram_2[plane_off + (((i + 1) & 3) * 0x4000)]);
1502
14851503   if(BIT(m_egc.regs[2], 13))
14861504      return m_video_ram_2[offset];
14871505   else
1488      return m_video_ram_2[plane_off + (((m_egc.regs[1] >> 8) + 1) & 3) * 0x4000];
1506      return m_egc.src[(m_egc.regs[1] >> 8) & 3];
14891507}
14901508
14911509READ16_MEMBER(pc9801_state::upd7220_grcg_r)
r243384r243385
19061924      case 7:
19071925         m_egc.count = (m_egc.regs[7] & 0xfff) + 1;
19081926         m_egc.first = true;
1927         m_egc.init = false;
19091928         break;
19101929   }
19111930}
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29692988   save_item(NAME(m_sasi_data));
29702989   save_item(NAME(m_sasi_data_enable));
29712990   save_item(NAME(m_sasi_ctrl));
2991   save_item(NAME(m_vrtc_irq_mask));
29722992}
29732993
29742994MACHINE_START_MEMBER(pc9801_state,pc9801f)


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