trunk/src/mess/drivers/c65.c
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| 20 | 20 | |
| 21 | 21 | #include "emu.h" |
| 22 | 22 | #include "cpu/m6502/m4510.h" |
| 23 | #include "machine/mos6526.h" |
| 23 | 24 | |
| 24 | 25 | #define MAIN_CLOCK XTAL_3_5MHz |
| 25 | 26 | |
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| 29 | 30 | c65_state(const machine_config &mconfig, device_type type, const char *tag) |
| 30 | 31 | : driver_device(mconfig, type, tag), |
| 31 | 32 | m_maincpu(*this, "maincpu"), |
| 33 | m_cia0(*this, "cia_0"), |
| 34 | m_cia1(*this, "cia_1"), |
| 32 | 35 | m_screen(*this, "screen"), |
| 33 | 36 | m_palette(*this, "palette"), |
| 34 | 37 | m_workram(*this, "wram"), |
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| 42 | 45 | |
| 43 | 46 | // devices |
| 44 | 47 | required_device<m4510_device> m_maincpu; |
| 48 | required_device<mos6526_device> m_cia0; |
| 49 | required_device<mos6526_device> m_cia1; |
| 45 | 50 | required_device<screen_device> m_screen; |
| 46 | 51 | required_device<palette_device> m_palette; |
| 47 | 52 | required_shared_ptr<UINT8> m_workram; |
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| 154 | 159 | case 0x12: |
| 155 | 160 | res = (m_screen->vpos() & 0xff); |
| 156 | 161 | return res; |
| 162 | case 0x19: |
| 163 | return m_VIC2_IRQPend; |
| 164 | |
| 157 | 165 | case 0x20: |
| 158 | 166 | return m_VIC2_EXTColor; |
| 159 | | case 0x19: |
| 160 | | return m_VIC2_IRQPend; |
| 167 | |
| 161 | 168 | case 0x30: |
| 162 | 169 | return m_VIC3_ControlA; |
| 163 | 170 | case 0x31: |
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| 307 | 314 | else |
| 308 | 315 | { |
| 309 | 316 | // CIA at 0xdc00 |
| 317 | switch((offset & 0x700) | 0x800) |
| 318 | { |
| 319 | case 0xc00: |
| 320 | return m_cia0->read(space,offset); |
| 321 | case 0xd00: |
| 322 | return m_cia1->read(space,offset); |
| 323 | default: |
| 324 | printf("Unknown I/O access read to offset %04x\n",offset); |
| 325 | break; |
| 326 | } |
| 327 | |
| 310 | 328 | } |
| 311 | 329 | |
| 312 | 330 | return 0xff; |
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| 319 | 337 | else |
| 320 | 338 | { |
| 321 | 339 | // CIA at 0xdc00 |
| 340 | switch((offset & 0x700) | 0x800) |
| 341 | { |
| 342 | case 0xc00: |
| 343 | m_cia0->write(space,offset,data); |
| 344 | break; |
| 345 | |
| 346 | case 0xd00: |
| 347 | m_cia1->write(space,offset,data); |
| 348 | break; |
| 349 | default: |
| 350 | printf("Unknown I/O access write to offset %04x data = %02x\n",offset,data); |
| 351 | break; |
| 352 | } |
| 322 | 353 | } |
| 323 | 354 | |
| 324 | 355 | } |
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| 458 | 489 | MCFG_CPU_PROGRAM_MAP(c65_map) |
| 459 | 490 | MCFG_CPU_VBLANK_INT_DRIVER("screen",c65_state,vic3_vblank_irq) |
| 460 | 491 | |
| 492 | MCFG_DEVICE_ADD("cia_0", MOS6526, MAIN_CLOCK) |
| 493 | MCFG_MOS6526_TOD(60) |
| 494 | // MCFG_MOS6526_IRQ_CALLBACK(WRITELINE(c65_state, c65_cia0_interrupt)) |
| 495 | // MCFG_MOS6526_PA_INPUT_CALLBACK(READ8(c65_state, c65_cia0_port_a_r)) |
| 496 | // MCFG_MOS6526_PB_INPUT_CALLBACK(READ8(c65_state, c65_cia0_port_b_r)) |
| 497 | // MCFG_MOS6526_PB_OUTPUT_CALLBACK(WRITE8(c65_state, c65_cia0_port_b_w)) |
| 498 | |
| 499 | MCFG_DEVICE_ADD("cia_1", MOS6526, MAIN_CLOCK) |
| 500 | MCFG_MOS6526_TOD(60) |
| 501 | // MCFG_MOS6526_IRQ_CALLBACK(WRITELINE(c65_state, c65_cia1_interrupt)) |
| 502 | // MCFG_MOS6526_PA_INPUT_CALLBACK(READ8(c65_state, c65_cia1_port_a_r)) |
| 503 | // MCFG_MOS6526_PA_OUTPUT_CALLBACK(WRITE8(c65_state, c65_cia1_port_a_w)) |
| 504 | |
| 505 | |
| 461 | 506 | /* video hardware */ |
| 462 | 507 | MCFG_SCREEN_ADD("screen", RASTER) |
| 463 | 508 | // MCFG_SCREEN_REFRESH_RATE(60) |