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r34831 Wednesday 4th February, 2015 at 08:20:14 UTC by Robbbert
(MESS) improvements to mbee256. Thanks to RedSkullDC for dumping the bankswitching prom, and ubee512-author for advice.

[src/mess/drivers]	mbee.c
[src/mess/includes]	mbee.h
[src/mess/machine]	mbee.c

trunk/src/mess/drivers/mbee.c

r243342	r243343
22	22	The unemulated Matilda is a IBM XT clone fitted with a NEC V40, and has the
23	23	ability to emulate the 256TC as mentioned above.
24	24
25		Floppy Disk types (as used by ubee512)
26		- ss80 - single sided 80 track
27		- ds40 - double-sided 40 track - 400KB
28		- ds80, ds82, ds84 - double sided 80 track - 800KB
29		- dsk - various - 211KB, 421KB, 841KB
	25	Floppy formats:
	26	- All disks are the standard CPCEMU 'dsk' format.
	27	- Types are 9cm 80 track, and 13cm 40 track (single or double sided)
	28	- 13cm has been specified as QD to prevent a nasty crash if an 80-track disk was mounted
	29	- The tracks/sector layout is the same regardless of size
	30	- Although certain models came with particular drives as standard, users could add
	31	the other size if they wished. We support both sizes on any model.
30	32
31	33	Microbee Standard / Plus memory map
32	34
r243342	r243343
82	84
83	85	- Fix Paste (it loses most of the characters)
84	86
85		- RTC for 256TC works, but it is supposed to be an option on other
86		models. It is being completely ignored.
	87	- all except 256tc: RTC is optional, but it is being totally ignored.
87	88
88	89	- Most early models have a clock in Telcom, and in the menu. It doesn't
89	90	work.
90	91
91		- The Monitor program on 256TC crashes the system. This appears
92		to be a MAME core bug involving the z80pio.
	92	- various fdc issues:
	93	- only some ds40 disks can be used. All 80-track disks fail.
	94	- some disks show no or partial directory listing.
	95	- some disks cause MESS to freeze.
	96	- ENMF pin missing from wd_fdc.
	97	- incorrect timing for track register causes 256tc failure to boot a disk.
	98	- 56k model takes about 2 minutes to boot a disk if loaded via command line.
	99
	100	- 256tc: At the menu, if F2 pressed to activate the Monitor, the emulated machine
	101	crashes due to a bug in z80pio emulation.
	102
	103	- 256tc: Keyboard ROM U60 needs to be dumped.
	104	- 128k: PROM PAL needs to be dumped, so that the bankswitching can be fixed.
93	105
94		- The 256TC corrupts itself when a floppy disk is detected.
95
96		- Disk system doesn't work because of fdc problems.
97
98	106	- Teleterm: keyboard is problematic, and cursor doesn't show.
99	107
100	108
r243342	r243343
113	121	in the emulator for some years. Conversion to the new modern
114	122	implementation (2013-07-05) has not resolved the issue.
115	123
116		There are 3 types of microbee disks available in the wild.
117
118		- CPCEMU-format "dsk" disks, which has an already-working
119		format "dsk_dsk".
120
121		- ubee512-format disks, such as "ds80,ds82,ds84,ss80", etc.
122		These are described in "mbee_dsk", but it's not known if it
123		works as yet.
124
125		- There a "img" format for the 128k boot disk. The internal
126		layout is not known and no work has been done.
127
128
129	124	****************************************************************************/
130	125
131	126
132	127	#include "includes/mbee.h"
133		#include "formats/mbee_dsk.h"
134	128	#include "formats/mbee_cas.h"
135	129
136	130
r243342	r243343
219	213	AM_RANGE(0xf800, 0xffff) AM_RAMBANK("bankfh")
220	214	ADDRESS_MAP_END
221	215
	216	static ADDRESS_MAP_START(mbee256_mem, AS_PROGRAM, 8, mbee_state)
	217	AM_RANGE(0x0000, 0x0fff) AM_READ_BANK("bankr0") AM_WRITE_BANK("bankw0")
	218	AM_RANGE(0x1000, 0x1fff) AM_READ_BANK("bankr1") AM_WRITE_BANK("bankw1")
	219	AM_RANGE(0x2000, 0x2fff) AM_READ_BANK("bankr2") AM_WRITE_BANK("bankw2")
	220	AM_RANGE(0x3000, 0x3fff) AM_READ_BANK("bankr3") AM_WRITE_BANK("bankw3")
	221	AM_RANGE(0x4000, 0x4fff) AM_READ_BANK("bankr4") AM_WRITE_BANK("bankw4")
	222	AM_RANGE(0x5000, 0x5fff) AM_READ_BANK("bankr5") AM_WRITE_BANK("bankw5")
	223	AM_RANGE(0x6000, 0x6fff) AM_READ_BANK("bankr6") AM_WRITE_BANK("bankw6")
	224	AM_RANGE(0x7000, 0x7fff) AM_READ_BANK("bankr7") AM_WRITE_BANK("bankw7")
	225	AM_RANGE(0x8000, 0x8fff) AM_READ_BANK("bankr8") AM_WRITE_BANK("bankw8")
	226	AM_RANGE(0x9000, 0x9fff) AM_READ_BANK("bankr9") AM_WRITE_BANK("bankw9")
	227	AM_RANGE(0xa000, 0xafff) AM_READ_BANK("bankr10") AM_WRITE_BANK("bankw10")
	228	AM_RANGE(0xb000, 0xbfff) AM_READ_BANK("bankr11") AM_WRITE_BANK("bankw11")
	229	AM_RANGE(0xc000, 0xcfff) AM_READ_BANK("bankr12") AM_WRITE_BANK("bankw12")
	230	AM_RANGE(0xd000, 0xdfff) AM_READ_BANK("bankr13") AM_WRITE_BANK("bankw13")
	231	AM_RANGE(0xe000, 0xefff) AM_READ_BANK("bankr14") AM_WRITE_BANK("bankw14")
	232	AM_RANGE(0xf000, 0xffff) AM_READ_BANK("bankr15") AM_WRITE_BANK("bankw15")
	233	ADDRESS_MAP_END
	234
222	235	static ADDRESS_MAP_START(mbeett_mem, AS_PROGRAM, 8, mbee_state)
223	236	AM_RANGE(0x0000, 0x0fff) AM_RAMBANK("boot")
224	237	AM_RANGE(0x1000, 0x7fff) AM_RAM
r243342	r243343
614	627	static GFXDECODE_START( mbeeppc )
615	628	GFXDECODE_ENTRY( "gfx", 0x0000, mbee_charlayout, 0, 8 )
616	629	GFXDECODE_END
617		#if 0
618		static LEGACY_FLOPPY_OPTIONS_START(mbee)
619		LEGACY_FLOPPY_OPTION(ss80, "ss80", "SS80 disk image", basicdsk_identify_default, basicdsk_construct_default, NULL,
620		HEADS([1])
621		TRACKS([80])
622		SECTORS([10])
623		SECTOR_LENGTH([512])
624		FIRST_SECTOR_ID([1]))
625		LEGACY_FLOPPY_OPTION(ds40, "ds40", "DS40 disk image", basicdsk_identify_default, basicdsk_construct_default, NULL,
626		HEADS([2])
627		TRACKS([40])
628		SECTORS([10])
629		SECTOR_LENGTH([512])
630		FIRST_SECTOR_ID([1]))
631		LEGACY_FLOPPY_OPTION(ds80, "ds80", "DS80 disk image", basicdsk_identify_default, basicdsk_construct_default, NULL,
632		HEADS([2])
633		TRACKS([80])
634		SECTORS([10])
635		SECTOR_LENGTH([512])
636		FIRST_SECTOR_ID([21]))
637		LEGACY_FLOPPY_OPTION(ds84, "ds82,ds84", "DS84 disk image", basicdsk_identify_default, basicdsk_construct_default, NULL,
638		HEADS([2])
639		TRACKS([80])
640		SECTORS([10])
641		SECTOR_LENGTH([512])
642		FIRST_SECTOR_ID([1]))
643		LEGACY_FLOPPY_OPTIONS_END
644	630
645		static const floppy_interface mbee_floppy_interface =
646		{
647		FLOPPY_STANDARD_5_25_DSHD,
648		LEGACY_FLOPPY_OPTIONS_NAME(mbee),
649		NULL
650		};
651		#endif
652
653		FLOPPY_FORMATS_MEMBER( mbee_state::floppy_formats )
654		FLOPPY_MBEE_FORMAT
655		FLOPPY_FORMATS_END
656
657	631	static SLOT_INTERFACE_START( mbee_floppies )
658		SLOT_INTERFACE( "35dd", FLOPPY_35_DD )
659		SLOT_INTERFACE( "525dd", FLOPPY_525_QD )
	632	SLOT_INTERFACE( "drive3a", FLOPPY_35_DD )
	633	SLOT_INTERFACE( "drive3b", FLOPPY_35_DD )
	634	SLOT_INTERFACE( "drive5a", FLOPPY_525_QD )
	635	SLOT_INTERFACE( "drive5b", FLOPPY_525_QD )
660	636	SLOT_INTERFACE_END
661	637
662	638
r243342	r243343
686	662	MCFG_GFXDECODE_ADD("gfxdecode", "palette", mbee)
687	663	MCFG_PALETTE_ADD_MONOCHROME_AMBER("palette") // usually sold with amber or green monitor
688	664
689		MCFG_VIDEO_START_OVERRIDE(mbee_state,mbee)
	665	MCFG_VIDEO_START_OVERRIDE(mbee_state, mbee)
690	666
691	667	/* sound hardware */
692	668	MCFG_SPEAKER_STANDARD_MONO("mono")
r243342	r243343
813	789	MCFG_CPU_IO_MAP(mbee56_io)
814	790	MCFG_MACHINE_RESET_OVERRIDE(mbee_state, mbee56 )
815	791	MCFG_WD2793x_ADD("fdc", XTAL_4MHz / 4) // divided by 2 externally, then divided by 2 internally (/ENMF pin not emulated)
816		MCFG_FLOPPY_DRIVE_ADD("fdc:0", mbee_floppies, "525dd", mbee_state::floppy_formats)
817		MCFG_FLOPPY_DRIVE_ADD("fdc:1", mbee_floppies, "35dd", mbee_state::floppy_formats)
	792	MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(mbee_state, fdc_intrq_w))
	793	MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(mbee_state, fdc_drq_w))
	794	MCFG_FLOPPY_DRIVE_ADD("fdc:0", mbee_floppies, "drive5a", floppy_image_device::default_floppy_formats)
	795	MCFG_FLOPPY_DRIVE_ADD("fdc:1", mbee_floppies, "drive5b", floppy_image_device::default_floppy_formats)
818	796	MACHINE_CONFIG_END
819	797
820	798	static MACHINE_CONFIG_DERIVED( mbee64, mbee56 )
r243342	r243343
830	808	MCFG_CPU_IO_MAP(mbee128_io)
831	809	MCFG_MACHINE_RESET_OVERRIDE(mbee_state, mbee128 )
832	810	MCFG_WD2793x_ADD("fdc", XTAL_4MHz / 4)
833		MCFG_FLOPPY_DRIVE_ADD("fdc:0", mbee_floppies, "35dd", mbee_state::floppy_formats)
834		MCFG_FLOPPY_DRIVE_ADD("fdc:1", mbee_floppies, "525dd", mbee_state::floppy_formats)
	811	MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(mbee_state, fdc_intrq_w))
	812	MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(mbee_state, fdc_drq_w))
	813	MCFG_FLOPPY_DRIVE_ADD("fdc:0", mbee_floppies, "drive5a", floppy_image_device::default_floppy_formats)
	814	MCFG_FLOPPY_DRIVE_ADD("fdc:1", mbee_floppies, "drive5b", floppy_image_device::default_floppy_formats)
835	815	MACHINE_CONFIG_END
836	816
837	817	static MACHINE_CONFIG_DERIVED( mbee256, mbee128 )
838	818	MCFG_CPU_MODIFY( "maincpu" )
	819	MCFG_CPU_PROGRAM_MAP(mbee256_mem)
839	820	MCFG_CPU_IO_MAP(mbee256_io)
840	821	MCFG_MACHINE_RESET_OVERRIDE(mbee_state, mbee256 )
841	822	MCFG_MC146818_ADD( "rtc", XTAL_32_768kHz )
r243342	r243343
846	827	MCFG_MC6845_CHAR_WIDTH(8)
847	828	MCFG_MC6845_UPDATE_ROW_CB(mbee_state, mbeeppc_update_row)
848	829	MCFG_MC6845_ADDR_CHANGED_CB(mbee_state, mbee256_update_addr)
	830	MCFG_DEVICE_REMOVE("fdc:0")
	831	MCFG_DEVICE_REMOVE("fdc:1")
	832	MCFG_FLOPPY_DRIVE_ADD("fdc:0", mbee_floppies, "drive3a", floppy_image_device::default_floppy_formats)
	833	MCFG_FLOPPY_DRIVE_ADD("fdc:1", mbee_floppies, "drive3b", floppy_image_device::default_floppy_formats)
849	834	MACHINE_CONFIG_END
850	835
851	836	static MACHINE_CONFIG_DERIVED( mbeett, mbeeppc )
r243342	r243343
1160	1145	ROM_END
1161	1146
1162	1147	ROM_START( mbee256 ) // 256tc
1163		ROM_REGION(0x40000,"maincpu", ROMREGION_ERASEFF)
	1148	ROM_REGION(0x40000, "rams", ROMREGION_ERASEFF)
1164	1149
1165		ROM_REGION(0x7000,"bootrom", ROMREGION_ERASEFF)
	1150	ROM_REGION(0x5000, "roms", 0) // rom plus dummy area
1166	1151	ROM_SYSTEM_BIOS( 0, "1.20", "Version 1.20" )
1167		ROMX_LOAD("256tc_boot_1.20.rom", 0x0000, 0x4000, CRC(fe8d6a84) SHA1(a037a1b90b18a2180e9f5f216b829fcd480449a4), ROM_BIOS(1) )
	1152	ROMX_LOAD("256tc_boot_1.20.u38", 0x0000, 0x4000, CRC(fe8d6a84) SHA1(a037a1b90b18a2180e9f5f216b829fcd480449a4), ROM_BIOS(1) )
1168	1153	ROM_SYSTEM_BIOS( 1, "1.15", "Version 1.15" )
1169		ROMX_LOAD("256tc_boot_1.15.rom", 0x0000, 0x4000, CRC(1902062d) SHA1(e4a1c0b3f4996e313da0bac0edb6d34e3270723e), ROM_BIOS(2) )
	1154	ROMX_LOAD("256tc_boot_1.15.u38", 0x0000, 0x4000, CRC(1902062d) SHA1(e4a1c0b3f4996e313da0bac0edb6d34e3270723e), ROM_BIOS(2) )
1170	1155
	1156	ROM_REGION(0x4000, "proms", 0)
	1157	ROM_LOAD( "silver.u39", 0x0000, 0x4000, CRC(c34aab64) SHA1(781fe648488dec90185760f8e081e488b73b68bf) )
	1158
1171	1159	ROM_REGION(0x9800, "gfx", 0)
1172		ROM_LOAD("char256.bin",           0x1000, 0x1000, CRC(9372af3c) SHA1(a63591822c0504de2fed52e88d64e1dbd6124b74) )
	1160	ROM_LOAD("char256.u53", 0x1000, 0x1000, CRC(9372af3c) SHA1(a63591822c0504de2fed52e88d64e1dbd6124b74) )
1173	1161	ROM_IGNORE( 0x1000 )    // throw away swedish characters for now
1174	1162	ROM_COPY( "gfx", 0x1000, 0x0000, 0x1000 )
1175	1163
r243342	r243343
1184	1172
1185	1173	***************************************************************************/
1186	1174
1187		/*    YEAR  NAME      PARENT    COMPAT  MACHINE   INPUT     INIT       COMPANY         FULLNAME */
1188		COMP( 1982, mbee,     0,    0,  mbee,     mbee, mbee_state,     mbee,           "Applied Technology",  "Microbee 16 Standard" , 0 )
1189		COMP( 1982, mbeeic,   mbee, 0,  mbeeic,   mbee, mbee_state,     mbeeic,         "Applied Technology",  "Microbee 32 IC" , 0 )
1190		COMP( 1982, mbeepc,   mbee, 0,  mbeepc,   mbee, mbee_state,     mbeepc,         "Applied Technology",  "Microbee Personal Communicator" , 0 )
1191		COMP( 1985, mbeepc85, mbee, 0,  mbeepc85, mbee, mbee_state,     mbeepc85,       "Applied Technology",  "Microbee PC85" , 0 )
1192		COMP( 1985, mbeepc85b,mbee, 0,  mbeepc85b,mbee, mbee_state,     mbeepc85,       "Applied Technology",  "Microbee PC85 (New version)" , 0 )
1193		COMP( 1985, mbeepc85s,mbee, 0,  mbeepc85, mbee, mbee_state,     mbeepc85,       "Applied Technology",  "Microbee PC85 (Swedish)" , 0 )
1194		COMP( 1986, mbeeppc,  mbee, 0,  mbeeppc,  mbee, mbee_state,     mbeeppc,        "Applied Technology",  "Microbee Premium PC85" , 0 )
1195		COMP( 1986, mbeett,   mbee, 0,  mbeett,   mbee256, mbee_state,  mbeett,     "Applied Technology",  "Microbee Teleterm" , GAME_NOT_WORKING )
1196		COMP( 1986, mbee56,   mbee, 0,  mbee56,   mbee, mbee_state,     mbee56,         "Applied Technology",  "Microbee 56k" , GAME_NOT_WORKING )
1197		COMP( 1986, mbee64,   mbee, 0,  mbee64,   mbee, mbee_state,     mbee64,         "Applied Technology",  "Microbee 64k" , GAME_NOT_WORKING )
1198		COMP( 1986, mbee128,  mbee, 0,  mbee128,  mbee, mbee_state,     mbee128,        "Applied Technology",  "Microbee 128k" , GAME_NOT_WORKING )
1199		COMP( 1987, mbee256,  mbee, 0,  mbee256,  mbee256, mbee_state,  mbee256,        "Applied Technology",  "Microbee 256TC" , GAME_NOT_WORKING )
	1175	/*    YEAR  NAME      PARENT    COMPAT  MACHINE   INPUT     CLASS        INIT         COMPANY                   FULLNAME */
	1176	COMP( 1982, mbee,     0,        0,      mbee,     mbee,     mbee_state,  mbee,       "Applied Technology",  "Microbee 16 Standard" , 0 )
	1177	COMP( 1982, mbeeic,   mbee,     0,      mbeeic,   mbee,     mbee_state,  mbeeic,     "Applied Technology",  "Microbee 32 IC" , 0 )
	1178	COMP( 1982, mbeepc,   mbee,     0,      mbeepc,   mbee,     mbee_state,  mbeepc,     "Applied Technology",  "Microbee Personal Communicator" , 0 )
	1179	COMP( 1985, mbeepc85, mbee,     0,      mbeepc85, mbee,     mbee_state,  mbeepc85,   "Applied Technology",  "Microbee PC85" , 0 )
	1180	COMP( 1985, mbeepc85b,mbee,     0,      mbeepc85b,mbee,     mbee_state,  mbeepc85,   "Applied Technology",  "Microbee PC85 (New version)" , 0 )
	1181	COMP( 1985, mbeepc85s,mbee,     0,      mbeepc85, mbee,     mbee_state,  mbeepc85,   "Applied Technology",  "Microbee PC85 (Swedish)" , 0 )
	1182	COMP( 1986, mbeeppc,  mbee,     0,      mbeeppc,  mbee,     mbee_state,  mbeeppc,    "Applied Technology",  "Microbee Premium PC85" , 0 )
	1183	COMP( 1986, mbeett,   mbee,     0,      mbeett,   mbee256,  mbee_state,  mbeett,     "Applied Technology",  "Microbee Teleterm" , GAME_NOT_WORKING )
	1184	COMP( 1986, mbee56,   mbee,     0,      mbee56,   mbee,     mbee_state,  mbee56,     "Applied Technology",  "Microbee 56k" , GAME_NOT_WORKING )
	1185	COMP( 1986, mbee64,   mbee,     0,      mbee64,   mbee,     mbee_state,  mbee64,     "Applied Technology",  "Microbee 64k" , GAME_NOT_WORKING )
	1186	COMP( 1986, mbee128,  mbee,     0,      mbee128,  mbee,     mbee_state,  mbee128,    "Applied Technology",  "Microbee 128k" , GAME_NOT_WORKING )
	1187	COMP( 1987, mbee256,  mbee,     0,      mbee256,  mbee256,  mbee_state,  mbee256,    "Applied Technology",  "Microbee 256TC" , GAME_NOT_WORKING )

trunk/src/mess/includes/mbee.h

r243342	r243343
34	34	};
35	35
36	36	mbee_state(const machine_config &mconfig, device_type type, const char *tag)
37		: driver_device(mconfig, type, tag),
38		m_maincpu(*this, "maincpu"),
39		m_pio(*this, "z80pio"),
40		m_cassette(*this, "cassette"),
41		m_wave(*this, WAVE_TAG),
42		m_speaker(*this, "speaker"),
43		m_centronics(*this, "centronics"),
44		m_cent_data_out(*this, "cent_data_out"),
45		m_crtc(*this, "crtc"),
46		m_fdc(*this, "fdc"),
47		m_floppy0(*this, "fdc:0"),
48		m_floppy1(*this, "fdc:1"),
49		m_rtc(*this, "rtc"),
50		m_boot(*this, "boot"),
51		m_pak(*this, "pak"),
52		m_telcom(*this, "telcom"),
53		m_basic(*this, "basic"),
54		m_bankl(*this, "bankl"),
55		m_bankh(*this, "bankh"),
56		m_bank1(*this, "bank1"),
57		m_bank8l(*this, "bank8l"),
58		m_bank8h(*this, "bank8h"),
59		m_bank9(*this, "bank9"),
60		m_bankfl(*this, "bankfl"),
61		m_bankfh(*this, "bankfh"),
62		m_io_x0(*this, "X0"),
63		m_io_x1(*this, "X1"),
64		m_io_x2(*this, "X2"),
65		m_io_x3(*this, "X3"),
66		m_io_x4(*this, "X4"),
67		m_io_x5(*this, "X5"),
68		m_io_x6(*this, "X6"),
69		m_io_x7(*this, "X7"),
70		m_io_extra(*this, "EXTRA"),
71		m_io_config(*this, "CONFIG"),
72		m_io_x8(*this, "X8"),
73		m_io_x9(*this, "X9"),
74		m_io_x10(*this, "X10"),
75		m_io_x11(*this, "X11"),
76		m_io_x12(*this, "X12"),
77		m_io_x13(*this, "X13"),
78		m_io_x14(*this, "X14"),
79		m_screen(*this, "screen"),
80		m_palette(*this, "palette") { }
	37	: driver_device(mconfig, type, tag)
	38	, m_palette(*this, "palette")
	39	, m_maincpu(*this, "maincpu")
	40	, m_pio(*this, "z80pio")
	41	, m_cassette(*this, "cassette")
	42	, m_wave(*this, WAVE_TAG)
	43	, m_speaker(*this, "speaker")
	44	, m_centronics(*this, "centronics")
	45	, m_cent_data_out(*this, "cent_data_out")
	46	, m_crtc(*this, "crtc")
	47	, m_fdc(*this, "fdc")
	48	, m_floppy0(*this, "fdc:0")
	49	, m_floppy1(*this, "fdc:1")
	50	, m_rtc(*this, "rtc")
	51	, m_boot(*this, "boot")
	52	, m_pak(*this, "pak")
	53	, m_telcom(*this, "telcom")
	54	, m_basic(*this, "basic")
	55	, m_bankl(*this, "bankl")
	56	, m_bankh(*this, "bankh")
	57	, m_bank1(*this, "bank1")
	58	, m_bank8l(*this, "bank8l")
	59	, m_bank8h(*this, "bank8h")
	60	, m_bank9(*this, "bank9")
	61	, m_bankfl(*this, "bankfl")
	62	, m_bankfh(*this, "bankfh")
	63	, m_io_x0(*this, "X0")
	64	, m_io_x1(*this, "X1")
	65	, m_io_x2(*this, "X2")
	66	, m_io_x3(*this, "X3")
	67	, m_io_x4(*this, "X4")
	68	, m_io_x5(*this, "X5")
	69	, m_io_x6(*this, "X6")
	70	, m_io_x7(*this, "X7")
	71	, m_io_extra(*this, "EXTRA")
	72	, m_io_config(*this, "CONFIG")
	73	, m_io_x8(*this, "X8")
	74	, m_io_x9(*this, "X9")
	75	, m_io_x10(*this, "X10")
	76	, m_io_x11(*this, "X11")
	77	, m_io_x12(*this, "X12")
	78	, m_io_x13(*this, "X13")
	79	, m_io_x14(*this, "X14")
	80	, m_screen(*this, "screen")
	81	{ }
81	82
82	83	DECLARE_WRITE8_MEMBER( mbee_04_w );
83	84	DECLARE_WRITE8_MEMBER( mbee_06_w );
r243342	r243343
148	149	TIMER_CALLBACK_MEMBER(mbee_reset);
149	150	DECLARE_QUICKLOAD_LOAD_MEMBER( mbee );
150	151	DECLARE_QUICKLOAD_LOAD_MEMBER( mbee_z80bin );
	152	WRITE_LINE_MEMBER(fdc_intrq_w);
	153	WRITE_LINE_MEMBER(fdc_drq_w);
151	154	DECLARE_FLOPPY_FORMATS(floppy_formats);
152	155	UINT8 *m_p_videoram;
153	156	UINT8 *m_p_gfxram;
r243342	r243343
165	168	MC6845_ON_UPDATE_ADDR_CHANGED(mbee_update_addr);
166	169	MC6845_ON_UPDATE_ADDR_CHANGED(mbee256_update_addr);
167	170
	171	required_device<palette_device> m_palette;
168	172	private:
169	173	size_t m_size;
170	174	UINT8 m_clock_pulse;
r243342	r243343
178	182	UINT8 m_sy6545_status;
179	183	UINT8 m_sy6545_reg[32];
180	184	UINT8 m_sy6545_ind;
	185	UINT8 m_fdc_rq;
	186	void mbee256_setup_banks(UINT8 data);
181	187	void sy6545_cursor_configure();
182	188	void keyboard_matrix_r(int offs);
	189	void machine_reset_common_disk();
	190	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
183	191	required_device<cpu_device> m_maincpu;
184	192	required_device<z80pio_device> m_pio;
185	193	required_device<cassette_image_device> m_cassette;
r243342	r243343
192	200	optional_device<floppy_connector> m_floppy0;
193	201	optional_device<floppy_connector> m_floppy1;
194	202	optional_device<mc146818_device> m_rtc;
195		required_memory_bank m_boot;
	203	optional_memory_bank m_boot;
196	204	optional_memory_bank m_pak;
197	205	optional_memory_bank m_telcom;
198	206	optional_memory_bank m_basic;
r243342	r243343
222	230	optional_ioport m_io_x13;
223	231	optional_ioport m_io_x14;
224	232	required_device<screen_device> m_screen;
225		public:
226		required_device<palette_device> m_palette;
227
228		void machine_reset_common_disk();
229		virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
230	233	};
231	234
232	235	#endif /* MBEE_H_ */

trunk/src/mess/machine/mbee.c

r243342	r243343
89	89
90	90	*************************************************************************************/
91	91
	92	WRITE_LINE_MEMBER( mbee_state::fdc_intrq_w )
	93	{
	94	m_fdc_rq = (m_fdc_rq & 2) | state;
	95	}
	96
	97	WRITE_LINE_MEMBER( mbee_state::fdc_drq_w )
	98	{
	99	m_fdc_rq = (m_fdc_rq & 1) | (state << 1);
	100	}
	101
92	102	READ8_MEMBER( mbee_state::mbee_fdc_status_r )
93	103	{
94	104	/*  d7 indicate if IRQ or DRQ is occuring (1=happening)
95	105	d6..d0 not used */
96	106
97		return 0x7f | ((m_fdc->intrq_r() || m_fdc->drq_r()) ? 0x80 : 0);
	107	return m_fdc_rq ? 0xff : 0x7f;
98	108	}
99	109
100	110	WRITE8_MEMBER( mbee_state::mbee_fdc_motor_w )
r243342	r243343
131	141	TIMER_CALLBACK_MEMBER(mbee_state::mbee256_kbd)
132	142	{
133	143	/* Keyboard scanner is a Mostek M3870 chip. Its speed of operation is determined by a 15k resistor on
134		pin 2 (XTL2) and is therefore unknown. If a key change is detected (up or down), the /strobe
	144	pin 2 (XTL2) and is therefore 2MHz. If a key change is detected (up or down), the /strobe
135	145	line activates, sending a high to bit 1 of port 2 (one of the pio input lines). The next read of
136	146	port 18 will clear this line, and read the key scancode. It will also signal the 3870 that the key
137	147	data has been read, on pin 38 (/extint). The 3870 can cache up to 9 keys. With no rom dump
r243342	r243343
256	266
257	267	256TC Memory Banking
258	268
259		Bits 0, 1 and 5 select which bank goes into 0000-7FFF.
260		Bit 2 disables ROM, replacing it with RAM.
261		Bit 3 disables Video, replacing it with RAM.
262		Bit 4 switches the video circuits between F000-FFFF and
263		8000-8FFF.
	269	Selection of ROM, RAM, and video access by the CPU is controlled by U39,
	270	a PAL14L8. When read as an ordinary rom it is 16k in size. The dumper has
	271	arranged the pins as (bit0,1,..) (input = 1,23,2,3,4,5,6,7,8,9,10,11,14,13)
	272	and (output = 22,21,20,19,18,17,16,15). The prom is also used to control
	273	the refresh required by the dynamic rams, however we ignore this function.
264	274
265		In case of a clash, video overrides ROM which overrides RAM.
266
267	275	************************************************************/
268	276
269		WRITE8_MEMBER( mbee_state::mbee256_50_w )
	277	void mbee_state::mbee256_setup_banks(UINT8 data)
270	278	{
	279	data &= 0x3f; // U28 (bits 0-5 are referred to as S0-S5)
271	280	address_space &mem = m_maincpu->space(AS_PROGRAM);
	281	UINT8 *prom = memregion("proms")->base();
	282	UINT8 b_data = BITSWAP8(data, 7,5,3,2,4,6,1,0) & 0x3b; // arrange data bits to S0,S1,-,S4,S2,S3
	283	UINT8 b_bank, b_byte, b_byte_t, b_addr;
	284	UINT16 b_vid;
	285	char banktag[10];
272	286
273		// primary low banks
274		m_boot->set_entry((data & 3) | ((data & 0x20) >> 3));
275		m_bank1->set_entry((data & 3) | ((data & 0x20) >> 3));
	287	for (b_bank = 0; b_bank < 16; b_bank++)
	288	{
	289	b_vid = b_bank << 12;
	290	mem.unmap_readwrite (b_vid, b_vid + 0xfff);
	291	b_addr = BITSWAP8(b_bank, 7,4,5,3,1,2,6,0) & 0x1f; // arrange address bits to A12,-,A14,A13,A15
276	292
277		// 9000-EFFF
278		m_bank9->set_entry((data & 4) ? 1 : 0);
	293	// Calculate read-bank
	294	b_byte_t = prom[b_addr | (b_data << 8) | 0x82]; // read-bank (RDS and MREQ are low, RFSH is high)
	295	b_byte = BITSWAP8(b_byte_t, 7,5,0,3,6,2,1,4); // rearrange so that bits 0-2 are rambank, bit 3 = rom select, bit 4 = video select, others not used
	296	if (!BIT(data, 5))
	297	b_byte &= 0xfb;  // U42/1 - S17 only valid if S5 is on
	298	if (!BIT(b_byte, 4))
	299	{
	300	// select video
	301	mem.install_read_handler (b_vid, b_vid + 0x7ff, read8_delegate(FUNC(mbee_state::mbeeppc_low_r), this));
	302	mem.install_read_handler (b_vid + 0x800, b_vid + 0xfff, read8_delegate(FUNC(mbee_state::mbeeppc_high_r), this));
	303	}
	304	else
	305	{
	306	sprintf(banktag, "bankr%d", b_bank);
	307	mem.install_read_bank( b_vid, b_vid+0xfff, banktag );
279	308
280		// 8000-8FFF, F000-FFFF
281		mem.unmap_readwrite (0x8000, 0x87ff);
282		mem.unmap_readwrite (0x8800, 0x8fff);
283		mem.unmap_readwrite (0xf000, 0xf7ff);
284		mem.unmap_readwrite (0xf800, 0xffff);
	309	if (!BIT(b_byte, 3))
	310	membank(banktag)->set_entry(64 + (b_bank & 3)); // read from rom
	311	else
	312	membank(banktag)->set_entry((b_bank & 7) | ((b_byte & 7) << 3)); // ram
	313	}
285	314
286		switch (data & 0x1c)
287		{
288		case 0x00:
289		mem.install_read_bank (0x8000, 0x87ff, "bank8l");
290		mem.install_read_bank (0x8800, 0x8fff, "bank8h");
291		mem.install_readwrite_handler (0xf000, 0xf7ff, read8_delegate(FUNC(mbee_state::mbeeppc_low_r), this), write8_delegate(FUNC(mbee_state::mbeeppc_low_w), this));
292		mem.install_readwrite_handler (0xf800, 0xffff, read8_delegate(FUNC(mbee_state::mbeeppc_high_r), this), write8_delegate(FUNC(mbee_state::mbeeppc_high_w), this));
293		m_bank8l->set_entry(0); // rom
294		m_bank8h->set_entry(0); // rom
295		break;
296		case 0x04:
297		mem.install_read_bank (0x8000, 0x87ff, "bank8l");
298		mem.install_read_bank (0x8800, 0x8fff, "bank8h");
299		mem.install_readwrite_handler (0xf000, 0xf7ff, read8_delegate(FUNC(mbee_state::mbeeppc_low_r), this), write8_delegate(FUNC(mbee_state::mbeeppc_low_w), this));
300		mem.install_readwrite_handler (0xf800, 0xffff, read8_delegate(FUNC(mbee_state::mbeeppc_high_r), this), write8_delegate(FUNC(mbee_state::mbeeppc_high_w), this));
301		m_bank8l->set_entry(1); // ram
302		m_bank8h->set_entry(1); // ram
303		break;
304		case 0x08:
305		case 0x18:
306		mem.install_read_bank (0x8000, 0x87ff, "bank8l");
307		mem.install_read_bank (0x8800, 0x8fff, "bank8h");
308		mem.install_read_bank (0xf000, 0xf7ff, "bankfl");
309		mem.install_read_bank (0xf800, 0xffff, "bankfh");
310		m_bank8l->set_entry(0); // rom
311		m_bank8h->set_entry(0); // rom
312		m_bankfl->set_entry(0); // ram
313		m_bankfh->set_entry(0); // ram
314		break;
315		case 0x0c:
316		case 0x1c:
317		mem.install_read_bank (0x8000, 0x87ff, "bank8l");
318		mem.install_read_bank (0x8800, 0x8fff, "bank8h");
319		mem.install_read_bank (0xf000, 0xf7ff, "bankfl");
320		mem.install_read_bank (0xf800, 0xffff, "bankfh");
321		m_bank8l->set_entry(1); // ram
322		m_bank8h->set_entry(1); // ram
323		m_bankfl->set_entry(0); // ram
324		m_bankfh->set_entry(0); // ram
325		break;
326		case 0x10:
327		case 0x14:
328		mem.install_readwrite_handler (0x8000, 0x87ff, read8_delegate(FUNC(mbee_state::mbeeppc_low_r), this), write8_delegate(FUNC(mbee_state::mbeeppc_low_w), this));
329		mem.install_readwrite_handler (0x8800, 0x8fff, read8_delegate(FUNC(mbee_state::mbeeppc_high_r), this), write8_delegate(FUNC(mbee_state::mbeeppc_high_w), this));
330		mem.install_read_bank (0xf000, 0xf7ff, "bankfl");
331		mem.install_read_bank (0xf800, 0xffff, "bankfh");
332		m_bankfl->set_entry(0); // ram
333		m_bankfh->set_entry(0); // ram
334		break;
	315	// Calculate write-bank
	316	b_byte_t = prom[b_addr | (b_data << 8) | 0xc0]; // write-bank (XWR and MREQ are low, RFSH is high)
	317	b_byte = BITSWAP8(b_byte_t, 7,5,0,3,6,2,1,4); // rearrange so that bits 0-2 are rambank, bit 3 = rom select, bit 4 = video select, others not used
	318	if (!BIT(data, 5))
	319	b_byte &= 0xfb;  // U42/1 - S17 only valid if S5 is on
	320	if (!BIT(b_byte, 4))
	321	{
	322	// select video
	323	mem.install_write_handler (b_vid, b_vid + 0x7ff, write8_delegate(FUNC(mbee_state::mbeeppc_low_w), this));
	324	mem.install_write_handler (b_vid + 0x800, b_vid + 0xfff, write8_delegate(FUNC(mbee_state::mbeeppc_high_w), this));
	325	}
	326	else
	327	{
	328	sprintf(banktag, "bankw%d", b_bank);
	329	mem.install_write_bank( b_vid, b_vid+0xfff, banktag );
	330
	331	if (!BIT(b_byte, 3))
	332	membank(banktag)->set_entry(64); // write to rom dummy area
	333	else
	334	membank(banktag)->set_entry((b_bank & 7) | ((b_byte & 7) << 3)); // ram
	335	}
335	336	}
336	337	}
337	338
	339	WRITE8_MEMBER( mbee_state::mbee256_50_w )
	340	{
	341	mbee256_setup_banks(data);
	342	}
	343
338	344	/***********************************************************
339	345
340	346	128k Memory Banking
r243342	r243343
508	514
509	515	void mbee_state::machine_reset_common_disk()
510	516	{
	517	m_fdc_rq = 0;
511	518	}
512	519
513	520	MACHINE_RESET_MEMBER(mbee_state,mbee)
r243342	r243343
533	540
534	541	MACHINE_RESET_MEMBER(mbee_state,mbee128)
535	542	{
536		address_space &mem = m_maincpu->space(AS_PROGRAM);
	543	address_space &mem = m_maincpu->space(AS_IO);
537	544	machine_reset_common_disk();
538	545	mbee128_50_w(mem,0,0); // set banks to default
539		m_boot->set_entry(4); // boot time
	546	m_boot->set_entry(8); // boot time
540	547	}
541	548
542	549	MACHINE_RESET_MEMBER(mbee_state,mbee256)
543	550	{
544	551	UINT8 i;
545		address_space &mem = m_maincpu->space(AS_PROGRAM);
546	552	machine_reset_common_disk();
547	553	for (i = 0; i < 15; i++) m_mbee256_was_pressed[i] = 0;
548	554	m_mbee256_q_pos = 0;
549		mbee256_50_w(mem,0,0); // set banks to default
550		m_boot->set_entry(8); // boot time
551		timer_set(attotime::from_usec(4), TIMER_MBEE_RESET);
	555	mbee256_setup_banks(0); // set banks to default
	556	m_maincpu->set_pc(0x8000);
552	557	}
553	558
554	559	MACHINE_RESET_MEMBER(mbee_state,mbeett)
r243342	r243343
690	695
691	696	RAM = memregion("bootrom")->base();
692	697	m_bank9->configure_entry(0, &RAM[0x1000]); // rom
693		m_boot->configure_entry(4, &RAM[0x0000]); // rom at boot for 4usec
	698	m_boot->configure_entry(8, &RAM[0x0000]); // rom at boot for 4usec
694	699	m_bank8l->configure_entry(0, &RAM[0x0000]); // rom
695	700	m_bank8h->configure_entry(0, &RAM[0x0800]); // rom
696	701
r243342	r243343
699	704
700	705	DRIVER_INIT_MEMBER(mbee_state,mbee256)
701	706	{
702		UINT8 *RAM = memregion("maincpu")->base();
703		m_boot->configure_entries(0, 8, &RAM[0x0000], 0x8000); // standard banks 0000
704		m_bank1->configure_entries(0, 8, &RAM[0x1000], 0x8000); // standard banks 1000
705		m_bank8l->configure_entry(1, &RAM[0x0000]); // shadow ram
706		m_bank8h->configure_entry(1, &RAM[0x0800]); // shadow ram
707		m_bank9->configure_entry(1, &RAM[0x1000]); // shadow ram
708		m_bankfl->configure_entry(0, &RAM[0xf000]); // shadow ram
709		m_bankfh->configure_entry(0, &RAM[0xf800]); // shadow ram
	707	UINT8 *RAM = memregion("rams")->base();
	708	UINT8 *ROM = memregion("roms")->base();
	709	char banktag[10];
710	710
711		RAM = memregion("bootrom")->base();
712		m_bank9->configure_entry(0, &RAM[0x1000]); // rom
713		m_boot->configure_entry(8, &RAM[0x0000]); // rom at boot for 4usec
714		m_bank8l->configure_entry(0, &RAM[0x0000]); // rom
715		m_bank8h->configure_entry(0, &RAM[0x0800]); // rom
	711	for (UINT8 b_bank = 0; b_bank < 16; b_bank++)
	712	{
	713	sprintf(banktag, "bankr%d", b_bank);
	714	membank(banktag)->configure_entries(0, 64, &RAM[0x0000], 0x1000); // RAM banks
	715	membank(banktag)->configure_entries(64, 4, &ROM[0x0000], 0x1000); // rom
716	716
	717	sprintf(banktag, "bankw%d", b_bank);
	718	membank(banktag)->configure_entries(0, 64, &RAM[0x0000], 0x1000); // RAM banks
	719	membank(banktag)->configure_entries(64, 1, &ROM[0x4000], 0x1000); // dummy rom
	720	}
	721
717	722	timer_set(attotime::from_hz(1), TIMER_MBEE_RTC_IRQ);   /* timer for rtc */
718		timer_set(attotime::from_hz(25), TIMER_MBEE256_KBD);   /* timer for kbd */
	723	timer_set(attotime::from_hz(50), TIMER_MBEE256_KBD);   /* timer for kbd */
719	724
720	725	m_size = 0x8000;
721	726	}

https://github.com/mamedev/mame/commit/0f602ba86a28f5d952fa606a63e5a263798262df

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