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r34790 Sunday 1st February, 2015 at 13:03:07 UTC by Miodrag Milanović
Merge branch 'master' of https://github.com/mamedev/mame
[src/emu/cpu/amis2000]amis2000.c amis2000.h amis2000d.c amis2000op.inc
[src/mess/drivers]wildfire.c

trunk/src/emu/cpu/amis2000/amis2000.c
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55  American Microsystems, Inc.(AMI) S2000-family 4-bit MCU cores, introduced late 1970s
66 
77  TODO:
8  - bug(s)? - MESS wildfire.c doesn't work yet
98  - unemulated opcodes (need more testing material)
109  - support external program map
10  - STATUS pin(wildfire.c sound?)
1111  - add 50/60hz timer
1212  - add S2200/S2400
1313
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1616#include "amis2000.h"
1717#include "debugger.h"
1818
19#include "amis2000op.inc"
1920
21
2022// S2000 is the most basic one, 64 nibbles internal RAM and 1KB internal ROM
2123// S2150 increased RAM to 80 nibbles and ROM to 1.5KB
2224// high-voltage output versions of these chips (S2000A and S2150A) are identical overall
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3133
3234static ADDRESS_MAP_START(program_1_5k, AS_PROGRAM, 8, amis2000_device)
3335   AM_RANGE(0x0000, 0x03ff) AM_ROM
34   AM_RANGE(0x0400, 0x05ff) AM_ROM AM_MIRROR(0x200)
36   AM_RANGE(0x0400, 0x05ff) AM_NOP
37   AM_RANGE(0x0600, 0x07ff) AM_ROM
3538ADDRESS_MAP_END
3639
3740
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151154   m_i = 0;
152155   m_k = 0;
153156   m_d = 0;
157   m_d_active = false;
158   m_d_polarity = 0;
154159   m_a = 0;
155160
156161   // register for savestates
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170175   save_item(NAME(m_i));
171176   save_item(NAME(m_k));
172177   save_item(NAME(m_d));
178   save_item(NAME(m_d_active));
179   save_item(NAME(m_d_polarity));
173180   save_item(NAME(m_a));
174181
175182   // register state for debugger
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199206   m_op = 0;
200207   
201208   // clear i/o
209   m_d_polarity = 0;
210   m_d = 0; d_latch_out(false);
211   m_a = 0; m_write_a(0, 0, 0xffff);
202212   m_i = 0;
203213   m_k = 0;
204   m_d = 0; m_write_d(0, 0, 0xff);
205   m_a = 0; m_write_a(0, 0, 0xffff);
206214}
207215
208216
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211219//  execute
212220//-------------------------------------------------
213221
214#include "amis2000op.inc"
215
216222void amis2000_device::execute_run()
217223{
218224   while (m_icount > 0)
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246252            switch (m_op)
247253            {
248254         case 0x00: op_nop(); break;
249         case 0x01: op_illegal(); break; // reserved for devkit-use
255         case 0x01: op_halt(); break;
250256         case 0x02: op_rt(); break;
251257         case 0x03: op_rts(); break;
252258         case 0x04: op_psh(); break;
trunk/src/emu/cpu/amis2000/amis2000.h
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9292   UINT8 m_i;                  // 4-bit i-pins latch
9393   UINT8 m_k;                  // 4-bit k-pins latch
9494   UINT8 m_d;                  // 8-bit d-pins latch
95   bool m_d_active;            // d-pins available for direct i/o(floating), or outputting d-latch
96   UINT8 m_d_polarity;         // invert d-latch output
9597   UINT16 m_a;                 // 13-bit a-pins latch (master strobe latch)
9698
9799   devcb_read8 m_read_k;
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106108   void ram_w(UINT8 data);
107109   void pop_callstack();
108110   void push_callstack();
109   void op_illegal();
111   void d_latch_out(bool active);
110112   
111113   void op_lai();
112114   void op_lab();
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141143   void op_rt();
142144   void op_rts();
143145   void op_nop();
146   void op_halt();
144147
145148   void op_szc();
146149   void op_szm();
trunk/src/emu/cpu/amis2000/amis2000d.c
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1717   mLAM, mXC, mXCI, mXCD, mSTM, mRSM,
1818   mADD, mADCS, mADIS, mAND, mXOR, mCMA, mSTC, mRSC, mSF1, mRF1, mSF2, mRF2,
1919   mSAM, mSZM, mSBE, mSZC, mSOS, mSZK, mSZI, mTF1, mTF2,
20   mPP, mJMP, mJMS, mRT, mRTS, mNOP,
21   mINP, mOUT, mDISB, mDISN, mMVS, mPSH, mPSL, mEUR,
22   mILL
20   mPP, mJMP, mJMS, mRT, mRTS, mNOP, mHALT,
21   mINP, mOUT, mDISB, mDISN, mMVS, mPSH, mPSL, mEUR
2322};
2423
2524static const char *const s_mnemonics[] =
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2827   "LAM", "XC", "XCI", "XCD", "STM", "RSM",
2928   "ADD", "ADCS", "ADIS", "AND", "XOR", "CMA", "STC", "RSC", "SF1", "RF1", "SF2", "RF2",
3029   "SAM", "SZM", "SBE", "SZC", "SOS", "SZK", "SZI", "TF1", "TF2",
31   "PP", "JMP", "JMS", "RT", "RTS", "NOP",
32   "INP", "OUT", "DISB", "DISN", "MVS", "PSH", "PSL", "EUR",
33   "?"
30   "PP", "JMP", "JMS", "RT", "RTS", "NOP", "HALT",
31   "INP", "OUT", "DISB", "DISN", "MVS", "PSH", "PSL", "EUR"
3432};
3533
3634
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4341   0, 0, 0, 0, 0, 0,
4442   0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
4543   0, 0, 0, 0, 0, 0, 0, 0, 0,
46   0, 0, _OVER, _OUT, _OUT, 0,
47   0, 0, 0, 0, 0, 0, 0, 0,
48   0
44   0, 0, _OVER, _OUT, _OUT, 0, 0,
45   0, 0, 0, 0, 0, 0, 0, 0
4946};
5047
5148
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5552   -2, -2, -2, -2, 2, 2,
5653   0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0,
5754   0, 2, 0, 0, 0, 0, 0, 0, 0,
58   -4, 6, 6, 0, 0, 0,
59   0, 0, 0, 0, 0, 0, 0, 0,
60   0
55   -4, 6, 6, 0, 0, 0, 0,
56   0, 0, 0, 0, 0, 0, 0, 0
6157};
6258
6359
6460static const UINT8 s2000_mnemonic[0x100] =
6561{
6662   /* 0x00 */
67   mNOP, mILL, mRT, mRTS, mPSH, mPSL, mAND, mSOS,
63   mNOP, mHALT, mRT, mRTS, mPSH, mPSL, mAND, mSOS,
6864   mSBE, mSZC, mSTC, mRSC, mLAE, mXAE, mINP, mEUR,
6965   /* 0x10 */
7066   mCMA, mXABU, mLAB, mXAB, mADCS, mXOR, mADD, mSAM,
trunk/src/emu/cpu/amis2000/amis2000op.inc
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3333   m_callstack[0] = m_pc & m_callstack_mask;
3434}
3535
36void amis2000_device::op_illegal()
36void amis2000_device::d_latch_out(bool active)
3737{
38   logerror("%s unknown opcode $%02X at $%04X\n", tag(), m_op, m_pc);
38   m_write_d(0, active ? (m_d ^ m_d_polarity) : 0, 0xff);
39   m_d_active = active;
3940}
4041
4142
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195196void amis2000_device::op_inp()
196197{
197198   // INP: input D-pins to ACC and RAM
198   op_illegal();
199   UINT8 in = m_d_active ? m_d : m_read_d(0, 0xff);
200   m_acc = in & 0xf;
201   ram_w(in >> 4 & 0xf);
199202}
200203
201204void amis2000_device::op_out()
202205{
203206   // OUT: pulse output ACC and RAM to D-pins
204   op_illegal();
207   logerror("%s unknown opcode $%02X at $%04X\n", tag(), m_op, m_pc);
205208}
206209
207210void amis2000_device::op_disb()
208211{
209212   // DISB: set D-latch to ACC and RAM directly
210213   m_d = m_acc | ram_r() << 4;
211   m_write_d(0, m_d, 0xff);
212   // TODO: exit from floating mode on D-pins
214   d_latch_out(true);
213215}
214216
215217void amis2000_device::op_disn()
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221223      0x7e, 0x30, 0x6d, 0x79, 0x33, 0x5b, 0x5f, 0x70, 0x7f, 0x7b, 0x77, 0x1f, 0x4e, 0x3d, 0x4f, 0x47
222224   };
223225   m_d = lut_segment_decoder[m_acc] | (m_carry ? 0x80 : 0x00);
224   m_write_d(0, m_d, 0xff);
225   // TODO: exit from floating mode on D-pins
226   d_latch_out(true);
226227}
227228
228229void amis2000_device::op_mvs()
229230{
230231   // MVS: output master strobe latch to A-pins
232   d_latch_out(false);
231233   m_write_a(0, m_a, 0xffff);
232   // TODO: enter floating mode on D-pins
233234}
234235
235236void amis2000_device::op_psh()
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244245
245246      case 0xe:
246247         // exit from floating mode on D-pins
247         // ?
248         d_latch_out(true);
248249         break;
249250
250251      case 0xf:
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271272
272273      case 0xe:
273274         // enter floating mode on D-pins
274         // ?
275         d_latch_out(false);
275276         break;
276277
277278      case 0xf:
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288289
289290void amis2000_device::op_eur()
290291{
291   // EUR: set timer frequency(European) and D-latch polarity
292   op_illegal();
292   // EUR: set timer frequency(European) and D-latch polarity, via ACC
293   m_d_polarity = (m_acc & 1) ? 0x00 : 0xff;
294   d_latch_out(m_d_active); // refresh
293295}
294296
295297
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350352   // NOP: no operation
351353}
352354
355void amis2000_device::op_halt()
356{
357   // HALT: debugger breakpoint for devkit-use
358   logerror("%s unknown opcode $%02X at $%04X\n", tag(), m_op, m_pc);
359}
353360
361
354362// Skip Instructions
355363
356364void amis2000_device::op_szc()
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393401void amis2000_device::op_sos()
394402{
395403   // SOS: skip next on SF(timer output), clear SF
396   op_illegal();
404   logerror("%s unknown opcode $%02X at $%04X\n", tag(), m_op, m_pc);
397405}
398406
399407void amis2000_device::op_tf1()
trunk/src/mess/drivers/wildfire.c
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108108***************************************************************************/
109109
110110ROM_START( wildfire )
111   ROM_REGION( 0x0600, "maincpu", 0 )
112   ROM_LOAD( "us4341385", 0x0000, 0x0600, CRC(84ac0f1f) SHA1(1e00ddd402acfc2cc267c34eed4b89d863e2144f) ) // from patent US4334679, data should be correct (it included checksums)
111   ROM_REGION( 0x0800, "maincpu", ROMREGION_ERASE00 )
112   ROM_LOAD( "us4341385", 0x0000, 0x0400, CRC(84ac0f1f) SHA1(1e00ddd402acfc2cc267c34eed4b89d863e2144f) ) // from patent US4334679, data should be correct (it included checksums)
113   ROM_CONTINUE(          0x0600, 0x0200 )
113114ROM_END
114115
115116

https://github.com/mamedev/mame/commit/6cb68032195a9cb17260bd556188c6c087099b33

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