trunk/src/mame/drivers/naomi.c
| r243169 | r243170 | |
|---|
| 2618 | 2618 | MACHINE_CONFIG_END |
| 2619 | 2619 | |
| 2620 | 2620 | static MACHINE_CONFIG_DERIVED( naomi_base, naomi_aw_base ) |
| 2621 | | MCFG_MIE_ADD("mie", 4000000, "maple_dc", 0, 0, 0, 0, ":MIE.3", 0, ":MIE.5", 0, 0) // Actual frequency unknown |
| 2621 | MCFG_MIE_ADD("mie", XTAL_32MHz/2, "maple_dc", 0, 0, 0, 0, ":MIE.3", 0, ":MIE.5", 0, 0) // Actual frequency unknown, most likely 1/2 of 32MHz XTAL or even 2/3 (yes, 21MHz Z80 core) |
| 2622 | 2622 | MCFG_SEGA_837_13551_DEVICE_ADD("837_13551", "mie", ":TILT", ":P1", ":P2", ":A0", ":A1", ":A2", ":A3", ":A4", ":A5", ":A6", ":A7", ":OUTPUT") |
| 2623 | 2623 | MCFG_EEPROM_SERIAL_93C46_8BIT_ADD("mie_eeprom") |
| 2624 | 2624 | |
trunk/src/mame/machine/mie.c
| r243169 | r243170 | |
|---|
| 103 | 103 | save_item(NAME(irq_enable)); |
| 104 | 104 | save_item(NAME(irq_pending)); |
| 105 | 105 | save_item(NAME(maple_irqlevel)); |
| 106 | |
| 107 | // patch out MIE RAM test |
| 108 | // TODO: figure out why SH4 code doesn't wait long enough for internal firmware's RAM test completed in the case of reset |
| 109 | UINT32 *rom = (UINT32*)memregion("mie")->base(); |
| 110 | rom[0x144/4] = 0x0001d8c3; |
| 106 | 111 | } |
| 107 | 112 | |
| 108 | 113 | void mie_device::device_reset() |
| r243169 | r243170 | |
|---|
| 164 | 169 | control |= CTRL_TFB|CTRL_EMP; |
| 165 | 170 | } |
| 166 | 171 | } |
| 172 | if(control & CTRL_HRES) { |
| 173 | raise_irq(maple_irqlevel); |
| 174 | } |
| 167 | 175 | } |
| 168 | 176 | |
| 169 | 177 | void mie_device::maple_w(const UINT32 *data, UINT32 in_size) |
| 170 | 178 | { |
| 171 | 179 | memcpy(tbuf, data, in_size*4); |
| 172 | 180 | lreg = in_size-1; |
| 173 | | control &= ~(CTRL_TXB|CTRL_TFB|CTRL_RFB|CTRL_BFOV); |
| 181 | // currently not known how/then CTRL_HRES is cleared after reset, lets clear it at packet receive |
| 182 | control &= ~(CTRL_HRES|CTRL_TXB|CTRL_TFB|CTRL_RFB|CTRL_BFOV); |
| 174 | 183 | control |= CTRL_RXB; |
| 175 | 184 | |
| 176 | 185 | timer->adjust(attotime::from_usec(20)); |
| r243169 | r243170 | |
|---|
| 357 | 366 | |
| 358 | 367 | void mie_device::maple_reset() |
| 359 | 368 | { |
| 360 | | // ignoring reset maple pattern is HUGE HACK |
| 361 | | // current implementation works only because of in such case procedure of firmware upload by games will be skipped at all |
| 362 | | // so in better case - inputs doesnt work if game uses very different firmware version than already uploaded by BIOS, in worst case - game hang/reboot |
| 363 | | // TODO: figure out why game code doesn't wait long enough for internal firmware's RAM test completed in the case of proper reset |
| 369 | control &= ~(CTRL_RXB|CTRL_TXB|CTRL_TFB|CTRL_RFB|CTRL_BFOV); |
| 370 | control |= CTRL_HRES; |
| 371 | |
| 372 | timer->adjust(attotime::from_usec(20)); |
| 364 | 373 | } |