Previous 199869 Revisions Next

r34610 Monday 26th January, 2015 at 00:26:25 UTC by David Haywood
refactor funkball.c flash access to use intelfsh.c via bankdev, doesn't improve anything tho (nw)
[src/emu/machine]intelfsh.c intelfsh.h
[src/mame/drivers]funkball.c

trunk/src/emu/machine/intelfsh.c
r243121r243122
102102const device_type INTEL_TE28F160 = &device_creator<intel_te28f160_device>;
103103const device_type SHARP_UNK128MBIT = &device_creator<sharp_unk128mbit_device>;
104104const device_type INTEL_28F320J3D = &device_creator<intel_28f320j3d_device>;
105const device_type INTEL_28F320J5 = &device_creator<intel_28f320j5_device>;
106
105107const device_type SST_39VF400A = &device_creator<sst_39vf400a_device>;
106108
107109static ADDRESS_MAP_START( memory_map8_512Kb, AS_PROGRAM, 8, intelfsh_device )
r243121r243122
246248      m_sector_is_4k = true;
247249      map = ADDRESS_MAP_NAME( memory_map16_32Mb );
248250      break;
251   case FLASH_INTEL_28F320J5: // funkball
252      m_bits = 16;
253      m_size = 0x400000;
254      m_maker_id = MFG_INTEL;
255      m_device_id = 0x14;
256//      m_sector_is_4k = true; 128kb?
257      map = ADDRESS_MAP_NAME( memory_map16_32Mb );
258      break;
249259   case FLASH_SST_39VF020:
250260      m_bits = 8;
251261      m_size = 0x40000;
r243121r243122
446456intel_28f320j3d_device::intel_28f320j3d_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
447457   : intelfsh16_device(mconfig, INTEL_28F320J3D, "Intel 28F320J3D Flash", tag, owner, clock, FLASH_INTEL_28F320J3D, "intel_28f320j3d", __FILE__) { }
448458
459intel_28f320j5_device::intel_28f320j5_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
460   : intelfsh16_device(mconfig, INTEL_28F320J5, "Intel 28F320J3D_a Flash", tag, owner, clock, FLASH_INTEL_28F320J5, "intel_28f320j5", __FILE__) { }
461
462
449463sst_39vf400a_device::sst_39vf400a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
450464   : intelfsh16_device(mconfig, SST_39VF400A, "SST 39VF400A Flash", tag, owner, clock, FLASH_SST_39VF400A, "sst_39vf400a", __FILE__) { }
451465
trunk/src/emu/machine/intelfsh.h
r243121r243122
8282#define MCFG_INTEL_28F320J3D_ADD(_tag) \
8383   MCFG_DEVICE_ADD(_tag, INTEL_28F320J3D, 0)
8484
85#define MCFG_INTEL_28F320J5_ADD(_tag) \
86   MCFG_DEVICE_ADD(_tag, INTEL_28F320J5, 0)
87
8588#define MCFG_SST_39VF400A_ADD(_tag) \
8689   MCFG_DEVICE_ADD(_tag, SST_39VF400A, 0)
8790
r243121r243122
128131      FLASH_INTEL_TE28F160,
129132      FLASH_SHARP_UNK128MBIT,
130133      FLASH_INTEL_28F320J3D,
134      FLASH_INTEL_28F320J5,
131135      FLASH_SST_39VF400A
132136   };
133137
r243121r243122
363367   intel_28f320j3d_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
364368};
365369
370class intel_28f320j5_device : public intelfsh16_device
371{
372public:
373   intel_28f320j5_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
374};
375
366376class sst_39vf400a_device : public intelfsh16_device
367377{
368378public:
r243121r243122
397407extern const device_type INTEL_TE28F160;
398408extern const device_type SHARP_UNK128MBIT;
399409extern const device_type INTEL_28F320J3D;
410extern const device_type INTEL_28F320J5;
400411extern const device_type SST_39VF400A;
401412
402413#endif
trunk/src/mame/drivers/funkball.c
r243121r243122
7676#include "machine/idectrl.h"
7777#include "video/voodoo.h"
7878#include "machine/pcshare.h"
79#include "machine/bankdev.h"
80#include "machine/intelfsh.h"
7981
8082
8183class funkball_state : public pcat_base_state
r243121r243122
8486   funkball_state(const machine_config &mconfig, device_type type, const char *tag)
8587      : pcat_base_state(mconfig, type, tag),
8688         m_voodoo(*this, "voodoo_0"),
87         m_unk_ram(*this, "unk_ram"){ }
89         m_unk_ram(*this, "unk_ram"),
90         m_flashbank(*this, "flashbank")
91   { }
8892
8993   UINT8 m_funkball_config_reg_sel;
9094   UINT8 m_funkball_config_regs[256];
9195   UINT32 m_cx5510_regs[256/4];
92   UINT16 m_flash_addr;
9396   UINT8 *m_bios_ram;
94   UINT8 m_flash_cmd;
95   UINT8 m_flash_data_cmd;
9697
9798   UINT32 m_biu_ctrl_reg[256/4];
9899
100   UINT32 flashbank_addr;
101
99102   // devices
100103   required_device<voodoo_1_device> m_voodoo;
101104
102105   required_shared_ptr<UINT32> m_unk_ram;
106   required_device<address_map_bank_device> m_flashbank;
103107
104108   DECLARE_READ8_MEMBER( get_slave_ack );
105   DECLARE_WRITE8_MEMBER( flash_w );
106   DECLARE_READ8_MEMBER( flash_data_r );
107   DECLARE_WRITE8_MEMBER( flash_data_w );
109   DECLARE_WRITE32_MEMBER( flash_w );
108110//  DECLARE_WRITE8_MEMBER( bios_ram_w );
109111   DECLARE_READ8_MEMBER( test_r );
110112   DECLARE_READ8_MEMBER( serial_r );
r243121r243122
272274   }
273275}
274276
275WRITE8_MEMBER( funkball_state::flash_w )
277WRITE32_MEMBER(funkball_state::flash_w)
276278{
277   if(!(offset & 0x2))
278   {
279      m_flash_addr = (offset & 1) ? ((m_flash_addr & 0xff) | (data << 8)) : ((m_flash_addr & 0xff00) | (data));
280      //printf("%08x ADDR\n",m_flash_addr << 16);
281   }
282   else if(offset == 2)
283   {
284      /* 0x83: read from u29/u30
285         0x03: read from u3
286         0x81: init device
287      */
288      m_flash_cmd = data;
289      printf("%02x CMD\n",data);
290   }
291   else
292      printf("%02x %02x\n",offset,data);
293}
279   COMBINE_DATA(&flashbank_addr);
280   int tempbank = (flashbank_addr & 0x7fff) | ((flashbank_addr & 0x00800000) >> 8);
281   m_flashbank->set_bank(tempbank);
294282
295READ8_MEMBER( funkball_state::flash_data_r )
296{
297   if(m_flash_data_cmd == 0x90)
298   {
299      if(offset == 0 && (m_flash_addr == 0))
300         return 0x89; // manufacturer code
283   // note, other bits get used, but ignoring to keep the virtual bank space size sane.
301284
302      if(offset == 2 && (m_flash_addr == 0))
303         return (m_flash_cmd & 0x80) ? 0x15 : 0x14; // device code, 32 MBit in both cases
304
305      if(offset > 3)
306         printf("%02x FLASH DATA 0x90\n",offset);
307
308      return 0;
309   }
310
311   if(m_flash_data_cmd == 0xff)
312   {
313      UINT8 *ROM = memregion(m_flash_cmd & 0x80 ? "data_flash" : "prg_flash")->base();
314
315      return ROM[offset + (m_flash_addr << 16)];
316   }
317
318   printf("%02x %08x %02x %02x\n",offset,m_flash_addr << 16,m_flash_cmd,m_flash_data_cmd);
319
320   return 0;
321285}
322286
323WRITE8_MEMBER( funkball_state::flash_data_w )
324{
325   if(offset == 0)
326   {
327      m_flash_data_cmd = data;
328   }
329   else
330      printf("%08x %02x FLASH DATA W %08x\n",offset,data,m_flash_addr << 16);
331}
332287
333288READ32_MEMBER(funkball_state::biu_ctrl_r)
334289{
r243121r243122
378333static ADDRESS_MAP_START(funkball_map, AS_PROGRAM, 32, funkball_state)
379334   AM_RANGE(0x00000000, 0x0009ffff) AM_RAM
380335   AM_RANGE(0x000a0000, 0x000affff) AM_RAM
381   AM_RANGE(0x000b0000, 0x000bffff) AM_READWRITE8(flash_data_r,flash_data_w,0xffffffff)
336   AM_RANGE(0x000b0000, 0x000bffff) AM_DEVICE("flashbank", address_map_bank_device, amap32)
382337   AM_RANGE(0x000c0000, 0x000cffff) AM_RAM
383338   AM_RANGE(0x000d0000, 0x000dffff) AM_RAM
384339   AM_RANGE(0x000e0000, 0x000e3fff) AM_ROMBANK("bios_ext1")
r243121r243122
398353   AM_RANGE(0xfffe0000, 0xffffffff) AM_ROM AM_REGION("bios", 0)    /* System BIOS */
399354ADDRESS_MAP_END
400355
356static ADDRESS_MAP_START( flashbank_map, AS_PROGRAM, 32, funkball_state )
357   AM_RANGE(0x00000000, 0x003fffff) AM_DEVREADWRITE16("u29", intel_28f320j5_device, read, write, 0xffffffff )
358   AM_RANGE(0x00400000, 0x007fffff) AM_DEVREADWRITE16("u30", intel_28f320j5_device, read, write, 0xffffffff )
359   AM_RANGE(0x00800000, 0x00bfffff) AM_DEVREADWRITE16("u3", intel_28f320j5_device, read, write, 0xffffffff )
360   /* it checks for 64MBit chips at 0x80000000 the way things are set up, they must return an intel Flash ID of 0x15 */
361ADDRESS_MAP_END
362
401363static ADDRESS_MAP_START(funkball_io, AS_IO, 32, funkball_state)
402364   AM_RANGE(0x0020, 0x0023) AM_READWRITE8(io20_r, io20_w, 0xffff0000)
403365   AM_IMPORT_FROM(pcat32_io_common)
r243121r243122
409371
410372   AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write)
411373
412   AM_RANGE(0x0360, 0x0363) AM_WRITE8(flash_w,0xffffffff)
374   AM_RANGE(0x0360, 0x0363) AM_WRITE(flash_w)
413375
414376//  AM_RANGE(0x0320, 0x0323) AM_READ(test_r)
415377   AM_RANGE(0x0360, 0x036f) AM_READ8(test_r,0xffffffff) // inputs
r243121r243122
862824   MCFG_IDE_CONTROLLER_ADD("ide", ata_devices, "hdd", NULL, true)
863825   MCFG_ATA_INTERFACE_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))
864826
827   MCFG_DEVICE_ADD("flashbank", ADDRESS_MAP_BANK, 0)
828   MCFG_DEVICE_PROGRAM_MAP(flashbank_map)
829   MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE)
830   MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(32)
831   MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(64)
832   MCFG_ADDRESS_MAP_BANK_STRIDE(0x10000)
833
865834   /* video hardware */
866835   MCFG_DEVICE_ADD("voodoo_0", VOODOO_1, STD_VOODOO_1_CLOCK)
867836   MCFG_VOODOO_FBMEM(2)
r243121r243122
875844   MCFG_SCREEN_UPDATE_DRIVER(funkball_state, screen_update)
876845   MCFG_SCREEN_SIZE(1024, 1024)
877846   MCFG_SCREEN_VISIBLE_AREA(0, 511, 16, 447)
847
848   MCFG_INTEL_28F320J5_ADD("u29")
849   MCFG_INTEL_28F320J5_ADD("u30")
850   MCFG_INTEL_28F320J5_ADD("u3")
878851MACHINE_CONFIG_END
879852
880853ROM_START( funkball )
881854   ROM_REGION32_LE(0x20000, "bios", ROMREGION_ERASEFF)
882855   ROM_LOAD( "512k-epr.u62", 0x010000, 0x010000, CRC(cced894a) SHA1(298c81716e375da4b7215f3e588a45ca3ea7e35c) )
883856
884   ROM_REGION(0x8000000, "prg_flash", ROMREGION_ERASE00)
857   ROM_REGION(0x4000000, "u3", ROMREGION_ERASE00)
885858   ROM_LOAD16_WORD_SWAP( "flash.u3", 0x0000000, 0x400000, CRC(fb376abc) SHA1(ea4c48bb6cd2055431a33f5c426e52c7af6997eb) )
886859
887   ROM_REGION(0x8000000, "data_flash", ROMREGION_ERASE00)
888   ROM_LOAD( "flash.u29",0x0000000, 0x400000, CRC(7cf6ff4b) SHA1(4ccdd4864ad92cc218998f3923997119a1a9dd1d) )
889   ROM_LOAD( "flash.u30",0x0400000, 0x400000, CRC(1d46717a) SHA1(acfbd0a2ccf4d717779733c4a9c639296c3bbe0e) )
860   ROM_REGION(0x8000000, "u29", ROMREGION_ERASE00)
861   ROM_LOAD16_WORD_SWAP( "flash.u29",0x0000000, 0x400000, CRC(7cf6ff4b) SHA1(4ccdd4864ad92cc218998f3923997119a1a9dd1d) )
862
863   ROM_REGION(0x4000000, "u30", ROMREGION_ERASE00)
864   ROM_LOAD16_WORD_SWAP( "flash.u30",0x0400000, 0x400000, CRC(1d46717a) SHA1(acfbd0a2ccf4d717779733c4a9c639296c3bbe0e) )
890865ROM_END
891866
892867

https://github.com/mamedev/mame/commit/86b12e10d804bc2613b7535f3d9ed33c97c1078a

Previous 199869 Revisions Next

© 1997-2024 The MAME Team