trunk/src/emu/cpu/tms0980/tms0980.c
| r242961 | r242962 | |
| 429 | 429 | m_sr = 0; |
| 430 | 430 | m_pa = 0; |
| 431 | 431 | m_pb = 0; |
| 432 | m_ps = 0; |
| 432 | 433 | m_a = 0; |
| 433 | 434 | m_x = 0; |
| 434 | 435 | m_y = 0; |
| r242961 | r242962 | |
| 466 | 467 | save_item(NAME(m_sr)); |
| 467 | 468 | save_item(NAME(m_pa)); |
| 468 | 469 | save_item(NAME(m_pb)); |
| 470 | save_item(NAME(m_ps)); |
| 469 | 471 | save_item(NAME(m_a)); |
| 470 | 472 | save_item(NAME(m_x)); |
| 471 | 473 | save_item(NAME(m_y)); |
| r242961 | r242962 | |
| 636 | 638 | tms1100_cpu_device::device_reset(); |
| 637 | 639 | |
| 638 | 640 | // small differences in 00-3f area |
| 639 | | m_fixed_decode[0x09] = F_COMX; // ! |
| 641 | m_fixed_decode[0x09] = F_COMX; |
| 640 | 642 | m_fixed_decode[0x0b] = F_TPC; |
| 641 | 643 | } |
| 642 | 644 | |
| r242961 | r242962 | |
| 958 | 960 | //------------------------------------------------- |
| 959 | 961 | |
| 960 | 962 | // handle branches: |
| 963 | |
| 964 | // TMS1000/common |
| 961 | 965 | // note: add(latch) and bl(branch latch) are specific to 0980 series, |
| 962 | 966 | // c(chapter) bits are specific to 1100(and 1400) series |
| 963 | 967 | |
| 964 | | // TMS1000/common: |
| 965 | | |
| 966 | 968 | void tms1xxx_cpu_device::op_br() |
| 967 | 969 | { |
| 968 | 970 | // BR/BL: conditional branch |
| 969 | | if (!m_status) |
| 970 | | return; |
| 971 | | |
| 972 | | if (!m_clatch) |
| 973 | | m_pa = m_pb; |
| 974 | | m_ca = m_cb; |
| 975 | | m_pc = m_opcode & m_pc_mask; |
| 971 | if (m_status) |
| 972 | { |
| 973 | if (m_clatch == 0) |
| 974 | m_pa = m_pb; |
| 975 | m_ca = m_cb; |
| 976 | m_pc = m_opcode & m_pc_mask; |
| 977 | } |
| 976 | 978 | } |
| 977 | 979 | |
| 978 | 980 | void tms1xxx_cpu_device::op_call() |
| 979 | 981 | { |
| 980 | 982 | // CALL/CALLL: conditional call |
| 981 | | if (!m_status) |
| 982 | | return; |
| 983 | if (m_status) |
| 984 | { |
| 985 | UINT8 prev_pa = m_pa; |
| 983 | 986 | |
| 984 | | UINT8 prev_pa = m_pa; |
| 985 | | if (!m_clatch) |
| 986 | | { |
| 987 | | m_sr = m_pc; |
| 988 | | m_clatch = 1; |
| 989 | | m_pa = m_pb; |
| 990 | | m_cs = m_ca; |
| 987 | if (m_clatch == 0) |
| 988 | { |
| 989 | m_clatch = 1; |
| 990 | m_sr = m_pc; |
| 991 | m_pa = m_pb; |
| 992 | m_cs = m_ca; |
| 993 | } |
| 994 | m_ca = m_cb; |
| 995 | m_pb = prev_pa; |
| 996 | m_pc = m_opcode & m_pc_mask; |
| 991 | 997 | } |
| 992 | | m_ca = m_cb; |
| 993 | | m_pb = prev_pa; |
| 994 | | m_pc = m_opcode & m_pc_mask; |
| 995 | 998 | } |
| 996 | 999 | |
| 997 | 1000 | void tms1xxx_cpu_device::op_retn() |
| 998 | 1001 | { |
| 999 | 1002 | // RETN: return from subroutine |
| 1000 | | if (m_clatch) |
| 1003 | if (m_clatch == 1) |
| 1001 | 1004 | { |
| 1005 | m_clatch = 0; |
| 1002 | 1006 | m_pc = m_sr; |
| 1003 | | m_clatch = 0; |
| 1004 | 1007 | m_ca = m_cs; |
| 1005 | 1008 | } |
| 1006 | 1009 | m_add = 0; |
| r242961 | r242962 | |
| 1014 | 1017 | void tms1400_cpu_device::op_br() |
| 1015 | 1018 | { |
| 1016 | 1019 | // BR/BL: conditional branch |
| 1017 | | if (!m_status) |
| 1018 | | return; |
| 1019 | | |
| 1020 | | //.. |
| 1020 | if (m_status) |
| 1021 | { |
| 1022 | m_pa = m_pb; // don't care about clatch |
| 1023 | m_ca = m_cb; |
| 1024 | m_pc = m_opcode & m_pc_mask; |
| 1025 | } |
| 1021 | 1026 | } |
| 1022 | 1027 | |
| 1023 | 1028 | void tms1400_cpu_device::op_call() |
| 1024 | 1029 | { |
| 1025 | 1030 | // CALL/CALLL: conditional call |
| 1026 | | if (!m_status) |
| 1027 | | return; |
| 1031 | if (m_status) |
| 1032 | { |
| 1033 | // 3-level stack, mask clatch 3 bits (no need to mask others) |
| 1034 | m_clatch = (m_clatch << 1 | 1) & 7; |
| 1028 | 1035 | |
| 1029 | | //.. |
| 1036 | m_sr = m_sr << m_pc_bits | m_pc; |
| 1037 | m_pc = m_opcode & m_pc_mask; |
| 1038 | |
| 1039 | m_ps = m_ps << 4 | m_pa; |
| 1040 | m_pa = m_pb; |
| 1041 | |
| 1042 | m_cs = m_cs << 2 | m_ca; |
| 1043 | m_ca = m_cb; |
| 1044 | } |
| 1045 | else |
| 1046 | { |
| 1047 | m_pb = m_pa; |
| 1048 | m_cb = m_ca; |
| 1049 | } |
| 1030 | 1050 | } |
| 1031 | 1051 | |
| 1032 | 1052 | void tms1400_cpu_device::op_retn() |
| 1033 | 1053 | { |
| 1034 | 1054 | // RETN: return from subroutine |
| 1035 | | //.. |
| 1055 | if (m_clatch & 1) |
| 1056 | { |
| 1057 | m_clatch >>= 1; |
| 1058 | |
| 1059 | m_pc = m_sr & m_pc_mask; |
| 1060 | m_sr >>= m_pc_bits; |
| 1061 | |
| 1062 | m_pa = m_pb = m_ps & 0xf; |
| 1063 | m_ps >>= 4; |
| 1064 | |
| 1065 | m_ca = m_cb = m_cs & 3; |
| 1066 | m_cs >>= 2; |
| 1067 | } |
| 1036 | 1068 | } |
| 1037 | 1069 | |
| 1038 | 1070 | |
| 1039 | 1071 | // handle other: |
| 1040 | 1072 | |
| 1041 | | // TMS1000/common: |
| 1073 | // TMS1000/common |
| 1042 | 1074 | |
| 1043 | 1075 | void tms1xxx_cpu_device::op_sbit() |
| 1044 | 1076 | { |
| r242961 | r242962 | |
| 1158 | 1190 | |
| 1159 | 1191 | |
| 1160 | 1192 | // TMS0980-specific (and possibly child classes) |
| 1193 | |
| 1161 | 1194 | void tms0980_cpu_device::op_comx() |
| 1162 | 1195 | { |
| 1163 | 1196 | // COMX: complement X register, but not the MSB |
| r242961 | r242962 | |
| 1203 | 1236 | |
| 1204 | 1237 | |
| 1205 | 1238 | // TMS0270-specific |
| 1239 | |
| 1206 | 1240 | void tms0270_cpu_device::op_setr() |
| 1207 | 1241 | { |
| 1208 | 1242 | // same as default, but handle write to output in dynamic_output |
trunk/src/emu/cpu/tms0980/tms0980.h
| r242961 | r242962 | |
| 139 | 139 | optional_device<pla_device> m_spla; |
| 140 | 140 | |
| 141 | 141 | UINT8 m_pc; // 6 or 7-bit program counter |
| 142 | | UINT8 m_sr; // 6 or 7-bit subroutine return register |
| 142 | UINT32 m_sr; // 6 or 7-bit subroutine return register(s) |
| 143 | 143 | UINT8 m_pa; // 4-bit page address register |
| 144 | 144 | UINT8 m_pb; // 4-bit page buffer register |
| 145 | UINT16 m_ps; // 4-bit page subroutine register(s) |
| 145 | 146 | UINT8 m_a; // 4-bit accumulator |
| 146 | 147 | UINT8 m_x; // 2,3,or 4-bit RAM X register |
| 147 | 148 | UINT8 m_y; // 4-bit RAM Y register |
| 148 | | UINT8 m_ca; // chapter address bit |
| 149 | | UINT8 m_cb; // chapter buffer bit |
| 150 | | UINT8 m_cs; // chapter subroutine bit |
| 149 | UINT8 m_ca; // chapter address register |
| 150 | UINT8 m_cb; // chapter buffer register |
| 151 | UINT16 m_cs; // chapter subroutine register(s) |
| 151 | 152 | UINT16 m_r; |
| 152 | 153 | UINT16 m_o; |
| 153 | 154 | UINT8 m_cki_bus; |
| r242961 | r242962 | |
| 160 | 161 | UINT8 m_status; |
| 161 | 162 | UINT8 m_status_latch; |
| 162 | 163 | UINT8 m_eac; // end around carry bit |
| 163 | | UINT8 m_clatch; // call latch bit |
| 164 | UINT8 m_clatch; // call latch bit(s) |
| 164 | 165 | UINT8 m_add; // add latch bit |
| 165 | 166 | UINT8 m_bl; // branch latch bit |
| 166 | 167 | |