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r34450 Sunday 18th January, 2015 at 01:36:18 UTC by hap
added tms1400 callstack
[src/emu/cpu/tms0980]tms0980.c tms0980.h

trunk/src/emu/cpu/tms0980/tms0980.c
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429429   m_sr = 0;
430430   m_pa = 0;
431431   m_pb = 0;
432   m_ps = 0;
432433   m_a = 0;
433434   m_x = 0;
434435   m_y = 0;
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466467   save_item(NAME(m_sr));
467468   save_item(NAME(m_pa));
468469   save_item(NAME(m_pb));
470   save_item(NAME(m_ps));
469471   save_item(NAME(m_a));
470472   save_item(NAME(m_x));
471473   save_item(NAME(m_y));
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636638   tms1100_cpu_device::device_reset();
637639
638640   // small differences in 00-3f area
639   m_fixed_decode[0x09] = F_COMX; // !
641   m_fixed_decode[0x09] = F_COMX;
640642   m_fixed_decode[0x0b] = F_TPC;
641643}
642644
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958960//-------------------------------------------------
959961
960962// handle branches:
963
964// TMS1000/common
961965// note: add(latch) and bl(branch latch) are specific to 0980 series,
962966// c(chapter) bits are specific to 1100(and 1400) series
963967
964// TMS1000/common:
965
966968void tms1xxx_cpu_device::op_br()
967969{
968970   // BR/BL: conditional branch
969   if (!m_status)
970      return;
971
972   if (!m_clatch)
973      m_pa = m_pb;
974   m_ca = m_cb;
975   m_pc = m_opcode & m_pc_mask;
971   if (m_status)
972   {
973      if (m_clatch == 0)
974         m_pa = m_pb;
975      m_ca = m_cb;
976      m_pc = m_opcode & m_pc_mask;
977   }
976978}
977979
978980void tms1xxx_cpu_device::op_call()
979981{
980982   // CALL/CALLL: conditional call
981   if (!m_status)
982      return;
983   if (m_status)
984   {
985      UINT8 prev_pa = m_pa;
983986
984   UINT8 prev_pa = m_pa;
985   if (!m_clatch)
986   {
987      m_sr = m_pc;
988      m_clatch = 1;
989      m_pa = m_pb;
990      m_cs = m_ca;
987      if (m_clatch == 0)
988      {
989         m_clatch = 1;
990         m_sr = m_pc;
991         m_pa = m_pb;
992         m_cs = m_ca;
993      }
994      m_ca = m_cb;
995      m_pb = prev_pa;
996      m_pc = m_opcode & m_pc_mask;
991997   }
992   m_ca = m_cb;
993   m_pb = prev_pa;
994   m_pc = m_opcode & m_pc_mask;
995998}
996999
9971000void tms1xxx_cpu_device::op_retn()
9981001{
9991002   // RETN: return from subroutine
1000   if (m_clatch)
1003   if (m_clatch == 1)
10011004   {
1005      m_clatch = 0;
10021006      m_pc = m_sr;
1003      m_clatch = 0;
10041007      m_ca = m_cs;
10051008   }
10061009   m_add = 0;
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10141017void tms1400_cpu_device::op_br()
10151018{
10161019   // BR/BL: conditional branch
1017   if (!m_status)
1018      return;
1019   
1020   //..
1020   if (m_status)
1021   {
1022      m_pa = m_pb; // don't care about clatch
1023      m_ca = m_cb;
1024      m_pc = m_opcode & m_pc_mask;
1025   }
10211026}
10221027
10231028void tms1400_cpu_device::op_call()
10241029{
10251030   // CALL/CALLL: conditional call
1026   if (!m_status)
1027      return;
1031   if (m_status)
1032   {
1033      // 3-level stack, mask clatch 3 bits (no need to mask others)
1034      m_clatch = (m_clatch << 1 | 1) & 7;
10281035
1029   //..
1036      m_sr = m_sr << m_pc_bits | m_pc;
1037      m_pc = m_opcode & m_pc_mask;
1038
1039      m_ps = m_ps << 4 | m_pa;
1040      m_pa = m_pb;
1041     
1042      m_cs = m_cs << 2 | m_ca;
1043      m_ca = m_cb;
1044   }
1045   else
1046   {
1047      m_pb = m_pa;
1048      m_cb = m_ca;
1049   }
10301050}
10311051
10321052void tms1400_cpu_device::op_retn()
10331053{
10341054   // RETN: return from subroutine
1035   //..
1055   if (m_clatch & 1)
1056   {
1057      m_clatch >>= 1;
1058
1059      m_pc = m_sr & m_pc_mask;
1060      m_sr >>= m_pc_bits;
1061     
1062      m_pa = m_pb = m_ps & 0xf;
1063      m_ps >>= 4;
1064     
1065      m_ca = m_cb = m_cs & 3;
1066      m_cs >>= 2;
1067   }
10361068}
10371069
10381070
10391071// handle other:
10401072
1041// TMS1000/common:
1073// TMS1000/common
10421074
10431075void tms1xxx_cpu_device::op_sbit()
10441076{
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11581190
11591191
11601192// TMS0980-specific (and possibly child classes)
1193
11611194void tms0980_cpu_device::op_comx()
11621195{
11631196   // COMX: complement X register, but not the MSB
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12031236
12041237
12051238// TMS0270-specific
1239
12061240void tms0270_cpu_device::op_setr()
12071241{
12081242   // same as default, but handle write to output in dynamic_output
trunk/src/emu/cpu/tms0980/tms0980.h
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139139   optional_device<pla_device> m_spla;
140140
141141   UINT8   m_pc;        // 6 or 7-bit program counter
142   UINT8  m_sr;        // 6 or 7-bit subroutine return register
142   UINT32  m_sr;        // 6 or 7-bit subroutine return register(s)
143143   UINT8   m_pa;        // 4-bit page address register
144144   UINT8   m_pb;        // 4-bit page buffer register
145   UINT16  m_ps;        // 4-bit page subroutine register(s)
145146   UINT8   m_a;         // 4-bit accumulator
146147   UINT8   m_x;         // 2,3,or 4-bit RAM X register
147148   UINT8   m_y;         // 4-bit RAM Y register
148   UINT8   m_ca;        // chapter address bit
149   UINT8   m_cb;        // chapter buffer bit
150   UINT8   m_cs;        // chapter subroutine bit
149   UINT8   m_ca;        // chapter address register
150   UINT8   m_cb;        // chapter buffer register
151   UINT16  m_cs;        // chapter subroutine register(s)
151152   UINT16  m_r;
152153   UINT16  m_o;
153154   UINT8   m_cki_bus;
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160161   UINT8   m_status;
161162   UINT8   m_status_latch;
162163   UINT8   m_eac;       // end around carry bit
163   UINT8   m_clatch;    // call latch bit
164   UINT8   m_clatch;    // call latch bit(s)
164165   UINT8   m_add;       // add latch bit
165166   UINT8   m_bl;        // branch latch bit
166167


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