MAME SVN History

199869 Revisions

r34433 Friday 16th January, 2015 at 00:09:11 UTC by Couriersud
Remove unnecessary oscore.h include

[hash]	~~apple3.xml~~
[src/emu]	emu.mak emuopts.h
[src/emu/bus/vcs]	dpc.c
[src/emu/cpu/tms0980]	tms0980.c tms0980.h
[src/emu/machine]	atahle.c idehd.c
[src/emu/sound]	tiaintf.c tiasound.c tiasound.h
[src/emu/ui]	~~devopt.c~~ ~~devopt.h~~ filemngr.c filemngr.h slotopt.c
[src/lib/util]	chd.c
[src/mame]	mame.lst
[src/mame/drivers]	aleck64.c chihiro.c peplus.c stfight.c stlforce.c strnskil.c tourtabl.c
[src/mame/includes]	stfight.h stlforce.h strnskil.h
[src/mame/machine]	stfight.c
[src/mame/video]	strnskil.c tia.c tia.h
[src/mess/drivers]	a2600.c apple3.c comp4.c elecdet.c fmtowns.c ngen.c
[src/mess/machine]	ngen_kb.c
[src/osd/osdmini]	minimain.c osdmini.h osdmini.mak
[src/regtests/chdman/input/createhd_4]	~~in.params~~
[src/regtests/chdman/input/createhd_5]	~~in.params~~
[src/regtests/chdman/output/createhd_4]	~~out.chd~~
[src/regtests/chdman/output/createhd_5]	~~out.chd~~
[src/tools]	chdman.c

trunk/hash/apple3.xml
r242944	r242945
1		<?xml version="1.0"?>
2		<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
3
4		<softwarelist name="apple3" description="Apple III 5.25 disks">
5
6		<software name="magneto">
7		<description>Capt'n Magneto (PD release APPLE-3-WAP-GAM-03)</description> <!-- was also released commercially - need those images, original game is 1983, this is a PD release of it from 1995 -->
8		<year>1995</year>
9		<publisher>Al Evans / WAP</publisher>
10
11		<part name="flop1" interface="floppy_5_25">
12		<dataarea name="flop" size="143360">
13		<rom name="apple-3-wap-gam-03a.dsk" size="143360" crc="fec20dbb" sha1="5ee6b1610649ad32df8ab00a2a272c3b79a92f26" offset="0x0000" />
14		</dataarea>
15		</part>
16		<part name="flop2" interface="floppy_5_25">
17		<dataarea name="flop" size="143360">
18		<rom name="apple-3-wap-gam-03b.dsk" size="143360" crc="a489f0b3" sha1="82c369ffec141b551732522edbe6d726b28da181" offset="0x0000" />
19		</dataarea>
20		</part>
21		</software>
22
23
24		</softwarelist>

trunk/src/emu/bus/vcs/dpc.c
r242944	r242945
26	26	{
27	27	m_oscillator = timer_alloc(TIMER_OSC);
28	28	m_oscillator->reset();
29
30		for (int i = 0; i < 8; i++)
31		{
32		save_item(NAME(m_df[i].top), i);
33		save_item(NAME(m_df[i].bottom), i);
34		save_item(NAME(m_df[i].low), i);
35		save_item(NAME(m_df[i].high), i);
36		save_item(NAME(m_df[i].flag), i);
37		save_item(NAME(m_df[i].music_mode), i);
38		save_item(NAME(m_df[i].osc_clk), i);
39		}
40
41		save_item(NAME(m_movamt));
42		save_item(NAME(m_latch_62));
43		save_item(NAME(m_latch_64));
44		save_item(NAME(m_dlc));
45		save_item(NAME(m_shift_reg));
46	29	}
47	30
48	31	void dpc_device::device_reset()

trunk/src/emu/cpu/tms0980/tms0980.c
r242944	r242945
69	69	*/
70	70
71	71	/* Microinstructions */
72		#define M_15TN (1<<0) /* 15 to -ALU */
73		#define M_ATN (1<<1) /* ACC to -ALU */
74		#define M_AUTA (1<<2) /* ALU to ACC */
75		#define M_AUTY (1<<3) /* ALU to Y */
76		#define M_C8 (1<<4) /* CARRY8 to STATUS */
77		#define M_CIN (1<<5) /* Carry In to ALU */
78		#define M_CKM (1<<6) /* CKB to MEM */
79		#define M_CKN (1<<7) /* CKB to -ALU */
80		#define M_CKP (1<<8) /* CKB to +ALU */
81		#define M_MTN (1<<9) /* MEM to -ALU */
82		#define M_MTP (1<<10) /* MEM to +ALU */
83		#define M_NATN (1<<11) /* ~ACC to -ALU */
84		#define M_NE (1<<12) /* COMP to STATUS */
85		#define M_STO (1<<13) /* ACC to MEM */
86		#define M_STSL (1<<14) /* STATUS to Status Latch */
87		#define M_YTP (1<<15) /* Y to +ALU */
	72	#define M_15TN 0x00000001 /* 15 to -ALU */
	73	#define M_ATN 0x00000002 /* ACC to -ALU */
	74	#define M_AUTA 0x00000004 /* ALU to ACC */
	75	#define M_AUTY 0x00000008 /* ALU to Y */
	76	#define M_C8 0x00000010 /* CARRY8 to STATUS */
	77	#define M_CIN 0x00000020 /* Carry In to ALU */
	78	#define M_CKM 0x00000040 /* CKB to MEM */
	79	#define M_CKN 0x00000080 /* CKB to -ALU */
	80	#define M_CKP 0x00000100 /* CKB to +ALU */
	81	#define M_MTN 0x00000200 /* MEM to -ALU */
	82	#define M_MTP 0x00000400 /* MEM to +ALU */
	83	#define M_NATN 0x00000800 /* ~ACC to -ALU */
	84	#define M_NE 0x00001000 /* COMP to STATUS */
	85	#define M_STO 0x00002000 /* ACC to MEM */
	86	#define M_STSL 0x00004000 /* STATUS to Status Latch */
	87	#define M_YTP 0x00008000 /* Y to +ALU */
88	88
89		#define M_CME (1<<16) /* Conditional Memory Enable */
90		#define M_DMTP (1<<17) /* DAM to +ALU */
91		#define M_NDMTP (1<<18) /* ~DAM to +ALU */
92		#define M_SSE (1<<19) /* Special Status Enable */
93		#define M_SSS (1<<20) /* Special Status Sample */
	89	#define M_CME 0x00010000 /* Conditional Memory Enable */
	90	#define M_DMTP 0x00020000 /* DAM to +ALU */
	91	#define M_NDMTP 0x00040000 /* ~DAM to +ALU */
	92	#define M_SSE 0x00080000 /* Special Status Enable */
	93	#define M_SSS 0x00100000 /* Special Status Sample */
94	94
95		#define M_RSTR (1<<21) /* -> line #36, F_RSTR (TMS02x0 custom) */
96		#define M_UNK1 (1<<22) /* -> line #37, F_???? (TMS0270 custom) */
	95	#define M_RSTR 0x00200000 /* -> line #36, F_RSTR (TMS02x0 custom) */
	96	#define M_UNK1 0x00400000 /* -> line #37, F_???? (TMS0270 custom) */
97	97
98	98	/* Standard/fixed instructions - these are documented more in their specific handlers below */
99		#define F_BR (1<<0)
100		#define F_CALL (1<<1)
101		#define F_CLO (1<<2)
102		#define F_COMC (1<<3)
103		#define F_COMX (1<<4)
104		#define F_COMX8 (1<<5)
105		#define F_LDP (1<<6)
106		#define F_LDX (1<<7)
107		#define F_RBIT (1<<8)
108		#define F_RETN (1<<9)
109		#define F_RSTR (1<<10)
110		#define F_SBIT (1<<11)
111		#define F_SETR (1<<12)
112		#define F_TDO (1<<13)
113		#define F_TPC (1<<14)
	99	#define F_BR 0x00000001
	100	#define F_CALL 0x00000002
	101	#define F_CLO 0x00000004
	102	#define F_COMC 0x00000008
	103	#define F_COMX 0x00000010
	104	#define F_COMX8 0x00000020
	105	#define F_LDP 0x00000040
	106	#define F_LDX 0x00000080
	107	#define F_RBIT 0x00000100
	108	#define F_RETN 0x00000200
	109	#define F_RSTR 0x00000400
	110	#define F_SBIT 0x00000800
	111	#define F_SETR 0x00001000
	112	#define F_TDO 0x00002000
114	113
115		#define F_OFF (1<<15)
116		#define F_REAC (1<<16)
117		#define F_SAL (1<<17)
118		#define F_SBL (1<<18)
119		#define F_SEAC (1<<19)
120		#define F_XDA (1<<20)
	114	#define F_OFF 0x00004000
	115	#define F_REAC 0x00008000
	116	#define F_SAL 0x00010000
	117	#define F_SBL 0x00020000
	118	#define F_SEAC 0x00040000
	119	#define F_XDA 0x00080000
121	120
122	121
123	122	// supported types:
r242944	r242945
133	132	// - 20-term output PLA(opla) at the top-left
134	133	// - the ALU is between the opla and mpla
135	134	const device_type TMS1000 = &device_creator<tms1000_cpu_device>; // 28-pin DIP, 11 R pins
136		const device_type TMS1070 = &device_creator<tms1070_cpu_device>; // ~~almost~~ same as tms1000, just supports higher voltage
	135	const device_type TMS1070 = &device_creator<tms1070_cpu_device>; // same as tms1000, just supports higher voltage
137	136	const device_type TMS1200 = &device_creator<tms1200_cpu_device>; // 40-pin DIP, 13 R pins
138	137	// TMS1270 has 10 O pins, how does that work?
139	138
140	139	// TMS1100 is nearly the same as TMS1000, some different opcodes, and with double the RAM and ROM
141	140	const device_type TMS1100 = &device_creator<tms1100_cpu_device>; // 28-pin DIP, 11 R pins
142		const device_type TMS1170 = &device_creator<tms1170_cpu_device>; // almost same as tms1100, just supports higher voltage
143	141	const device_type TMS1300 = &device_creator<tms1300_cpu_device>; // 40-pin DIP, 16 R pins
144		const device_type TMS1370 = &device_creator<tms1370_cpu_device>; // almost same as tms1300, just supports higher voltage
145	142
146		// TMS1400 follows the TMS1100, it doubles the ROM size again (4 chapters of 16 pages), and adds a 3-level callstack
147		// - rotate the view and mirror the OR-mask to get the proper layout of the mpla, the default is identical to tms1100
148		// - the opla size is increased from 20 to 32 terms
149		const device_type TMS1400 = &device_creator<tms1400_cpu_device>; // 28-pin DIP, 11 R pins
150		const device_type TMS1470 = &device_creator<tms1470_cpu_device>; // almost same as tms1400, just supports higher voltage
151
152	143	// TMS0980
153	144	// - 64x9bit RAM array at the bottom-left (set up as 144x4)
154	145	// - 2048x9bit ROM array at the bottom-left
r242944	r242945
186	177	AM_RANGE(0x000, 0x7ff) AM_ROM
187	178	ADDRESS_MAP_END
188	179
189		static ADDRESS_MAP_START(program_12bit_8, AS_PROGRAM, 8, tms1xxx_cpu_device)
190		AM_RANGE(0x000, 0xfff) AM_ROM
191		ADDRESS_MAP_END
192	180
193
194	181	static ADDRESS_MAP_START(data_64x4, AS_DATA, 8, tms1xxx_cpu_device)
195	182	AM_RANGE(0x00, 0x3f) AM_RAM
196	183	ADDRESS_MAP_END
r242944	r242945
230	217	: tms1000_cpu_device(mconfig, type, name, tag, owner, clock, o_pins, r_pins, pc_bits, byte_bits, x_bits, prgwidth, program, datawidth, data, shortname, source)
231	218	{ }
232	219
233		tms1170_cpu_device::tms1170_cpu_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
234		: tms1100_cpu_device(mconfig, TMS1170, "TMS1170", tag, owner, clock, 8, 11, 6, 8, 3, 11, ADDRESS_MAP_NAME(program_11bit_8), 7, ADDRESS_MAP_NAME(data_128x4), "tms1170", __FILE__)
235		{ }
236
237	220	tms1300_cpu_device::tms1300_cpu_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
238		: tms1100_cpu_device(mconfig, TMS1300, "TMS1300", tag, owner, clock, 8, 16, 6, 8, 3, 11, ADDRESS_MAP_NAME(program_11bit_8), 7, ADDRESS_MAP_NAME(data_128x4), "tms1300", __FILE__)
	221	: tms1100_cpu_device(mconfig, TMS1300, "TMS1200", tag, owner, clock, 8, 16, 6, 8, 3, 11, ADDRESS_MAP_NAME(program_11bit_8), 7, ADDRESS_MAP_NAME(data_128x4), "tms1300", __FILE__)
239	222	{ }
240	223
241		tms1370_cpu_device::tms1370_cpu_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
242		: tms1100_cpu_device(mconfig, TMS1370, "TMS1370", tag, owner, clock, 8, 16, 6, 8, 3, 11, ADDRESS_MAP_NAME(program_11bit_8), 7, ADDRESS_MAP_NAME(data_128x4), "tms1370", __FILE__)
243		{ }
244	224
245
246		tms1400_cpu_device::tms1400_cpu_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
247		: tms1100_cpu_device(mconfig, TMS1400, "TMS1400", tag, owner, clock, 8, 11, 6, 8, 3, 12, ADDRESS_MAP_NAME(program_12bit_8), 7, ADDRESS_MAP_NAME(data_128x4), "tms1400", __FILE__)
248		{ }
249
250		tms1400_cpu_device::tms1400_cpu_device(const machine_config &mconfig, device_type type, const char name, const char tag, device_t owner, UINT32 clock, UINT8 o_pins, UINT8 r_pins, UINT8 pc_bits, UINT8 byte_bits, UINT8 x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char shortname, const char *source)
251		: tms1100_cpu_device(mconfig, type, name, tag, owner, clock, o_pins, r_pins, pc_bits, byte_bits, x_bits, prgwidth, program, datawidth, data, shortname, source)
252		{ }
253
254		tms1470_cpu_device::tms1470_cpu_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
255		: tms1400_cpu_device(mconfig, TMS1470, "TMS1470", tag, owner, clock, 8, 10, 6, 8, 3, 12, ADDRESS_MAP_NAME(program_12bit_8), 7, ADDRESS_MAP_NAME(data_128x4), "tms1470", __FILE__)
256		{ }
257
258
259	225	tms0970_cpu_device::tms0970_cpu_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
260	226	: tms1000_cpu_device(mconfig, TMS0970, "TMS0970", tag, owner, clock, 8, 11, 6, 8, 2, 10, ADDRESS_MAP_NAME(program_10bit_8), 6, ADDRESS_MAP_NAME(data_64x4), "tms0970", __FILE__)
261	227	{ }
r242944	r242945
298	264	}
299	265
300	266
301		static MACHINE_CONFIG_FRAGMENT(tms1400)
302
303		// microinstructions PLA, output PLA
304		MCFG_PLA_ADD("mpla", 8, 16, 30)
305		MCFG_PLA_FILEFORMAT(PLA_FMT_BERKELEY)
306		MCFG_PLA_ADD("opla", 5, 8, 32)
307		MCFG_PLA_FILEFORMAT(PLA_FMT_BERKELEY)
308		MACHINE_CONFIG_END
309
310		machine_config_constructor tms1400_cpu_device::device_mconfig_additions() const
311		{
312		return MACHINE_CONFIG_NAME(tms1400);
313		}
314
315
316	267	static MACHINE_CONFIG_FRAGMENT(tms0970)
317	268
318	269	// main opcodes PLA, microinstructions PLA, output PLA, segment PLA
r242944	r242945
631	582	for (int i = 0x3c; i < 0x40; i++) m_fixed_decode[i] = 0;
632	583	}
633	584
634		void tms1400_cpu_device::device_reset()
635		{
636		tms1100_cpu_device::device_reset();
637	585
638		// small differences in 00-3f area
639		m_fixed_decode[0x09] = F_COMX; // !
640		m_fixed_decode[0x0b] = F_TPC;
641		}
642
643
644	586	void tms0970_cpu_device::device_reset()
645	587	{
646	588	// common reset
r242944	r242945
957	899	// fixed opcode set
958	900	//-------------------------------------------------
959	901
960		// handle branches:
961		// note: add(latch) and bl(branch latch) are specific to 0980 series,
962		// c(chapter) bits are specific to 1100(and 1400) series
963
964	902	// TMS1000/common:
965	903
966		void tms1xxx_cpu_device::op_br()
967		{
968		// BR/BL: conditional branch
969		if (!m_status)
970		return;
971
972		if (!m_clatch)
973		m_pa = m_pb;
974		m_ca = m_cb;
975		m_pc = m_opcode & m_pc_mask;
976		}
977
978		void tms1xxx_cpu_device::op_call()
979		{
980		// CALL/CALLL: conditional call
981		if (!m_status)
982		return;
983
984		UINT8 prev_pa = m_pa;
985		if (!m_clatch)
986		{
987		m_sr = m_pc;
988		m_clatch = 1;
989		m_pa = m_pb;
990		m_cs = m_ca;
991		}
992		m_ca = m_cb;
993		m_pb = prev_pa;
994		m_pc = m_opcode & m_pc_mask;
995		}
996
997		void tms1xxx_cpu_device::op_retn()
998		{
999		// RETN: return from subroutine
1000		if (m_clatch)
1001		{
1002		m_pc = m_sr;
1003		m_clatch = 0;
1004		m_ca = m_cs;
1005		}
1006		m_add = 0;
1007		m_bl = 0;
1008		m_pa = m_pb;
1009		}
1010
1011
1012		// TMS1400-specific
1013
1014		void tms1400_cpu_device::op_br()
1015		{
1016		// BR/BL: conditional branch
1017		if (!m_status)
1018		return;
1019
1020		//..
1021		}
1022
1023		void tms1400_cpu_device::op_call()
1024		{
1025		// CALL/CALLL: conditional call
1026		if (!m_status)
1027		return;
1028
1029		//..
1030		}
1031
1032		void tms1400_cpu_device::op_retn()
1033		{
1034		// RETN: return from subroutine
1035		//..
1036		}
1037
1038
1039		// handle other:
1040
1041		// TMS1000/common:
1042
1043	904	void tms1xxx_cpu_device::op_sbit()
1044	905	{
1045	906	// SBIT: set memory bit
r242944	r242945
1131	992	}
1132	993
1133	994
1134		// TMS1400-specific
1135
1136		void tms1xxx_cpu_device::op_tpc()
1137		{
1138		// TPC: transfer page buffer to chapter buffer
1139		m_cb = m_pb & 3;
1140		}
1141
1142
1143	995	// TMS0970-specific (and possibly child classes)
1144	996	void tms0970_cpu_device::op_setr()
1145	997	{
r242944	r242945
1243	1095	// fetch: rom address 1/2
1244	1096
1245	1097	// execute: br/call 2/2
1246		if (m_fixed & F_BR) op_br();
1247		if (m_fixed & F_CALL) op_call();
1248		if (m_fixed & F_RETN) op_retn();
	1098	// note: add(latch) and bl(branch latch) are specific to 0980 series,
	1099	// c(chapter) bits are specific to 1100 series
	1100	if (m_status)
	1101	{
	1102	UINT8 new_pc = m_opcode & m_pc_mask;
1249	1103
	1104	// BR: conditional branch
	1105	if (m_fixed & F_BR)
	1106	{
	1107	if (m_clatch == 0)
	1108	m_pa = m_pb;
	1109	m_ca = m_cb;
	1110	m_pc = new_pc;
	1111	}
	1112
	1113	// CALL: conditional call
	1114	if (m_fixed & F_CALL)
	1115	{
	1116	UINT8 prev_pa = m_pa;
	1117	if (m_clatch == 0)
	1118	{
	1119	m_sr = m_pc;
	1120	m_clatch = 1;
	1121	m_pa = m_pb;
	1122	m_cs = m_ca;
	1123	}
	1124	m_ca = m_cb;
	1125	m_pb = prev_pa;
	1126	m_pc = new_pc;
	1127	}
	1128	}
	1129
	1130	// RETN: return from subroutine
	1131	if (m_fixed & F_RETN)
	1132	{
	1133	if (m_clatch == 1)
	1134	{
	1135	m_pc = m_sr;
	1136	m_clatch = 0;
	1137	m_ca = m_cs;
	1138	}
	1139	m_add = 0;
	1140	m_bl = 0;
	1141	m_pa = m_pb;
	1142	}
	1143
1250	1144	// execute: k input valid, read ram, clear alu inputs
1251	1145	dynamic_output();
1252	1146	set_cki_bus();
r242944	r242945
1322	1216	if (m_fixed & F_COMX8) op_comx8();
1323	1217	if (m_fixed & F_LDP) op_ldp();
1324	1218	if (m_fixed & F_COMC) op_comc();
1325		if (m_fixed & F_TPC) op_tpc();
1326	1219	if (m_fixed & F_OFF) op_off();
1327	1220	if (m_fixed & F_SEAC) op_seac();
1328	1221	if (m_fixed & F_REAC) op_reac();

trunk/src/emu/cpu/tms0980/tms0980.h
r242944	r242945
106	106	virtual void dynamic_output() { ; } // not used by default
107	107	virtual void read_opcode();
108	108
109		virtual void op_br();
110		virtual void op_call();
111		virtual void op_retn();
112
113	109	virtual void op_sbit();
114	110	virtual void op_rbit();
115	111	virtual void op_setr();
r242944	r242945
122	118	virtual void op_ldp();
123	119
124	120	virtual void op_comc();
125		virtual void op_tpc();
126	121	virtual void op_xda();
127	122	virtual void op_off();
128	123	virtual void op_seac();
r242944	r242945
249	244	virtual void op_rstr();
250	245	};
251	246
252		class tms1170_cpu_device : public tms1100_cpu_device
253		{
254		public:
255		tms1170_cpu_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
256		};
257
258	247	class tms1300_cpu_device : public tms1100_cpu_device
259	248	{
260	249	public:
261	250	tms1300_cpu_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
262	251	};
263	252
264		class tms1370_cpu_device : public tms1100_cpu_device
265		{
266		public:
267		tms1370_cpu_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
268		};
269	253
270
271		class tms1400_cpu_device : public tms1100_cpu_device
272		{
273		public:
274		tms1400_cpu_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
275		tms1400_cpu_device(const machine_config &mconfig, device_type type, const char name, const char tag, device_t owner, UINT32 clock, UINT8 o_pins, UINT8 r_pins, UINT8 pc_bits, UINT8 byte_bits, UINT8 x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char shortname, const char *source);
276
277		protected:
278		// overrides
279		virtual void device_reset();
280		virtual machine_config_constructor device_mconfig_additions() const;
281
282		virtual void op_br();
283		virtual void op_call();
284		virtual void op_retn();
285
286		virtual void op_setr() { tms1xxx_cpu_device::op_setr(); } // no anomaly with MSB of X register
287		virtual void op_rstr() { tms1xxx_cpu_device::op_rstr(); } // "
288		};
289
290		class tms1470_cpu_device : public tms1400_cpu_device
291		{
292		public:
293		tms1470_cpu_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
294		};
295
296
297	254	class tms0970_cpu_device : public tms1000_cpu_device
298	255	{
299	256	public:
r242944	r242945
387	344	extern const device_type TMS1070;
388	345	extern const device_type TMS1200;
389	346	extern const device_type TMS1100;
390		extern const device_type TMS1170;
391	347	extern const device_type TMS1300;
392		extern const device_type TMS1370;
393		extern const device_type TMS1400;
394		extern const device_type TMS1470;
395	348	extern const device_type TMS0970;
396	349	extern const device_type TMS0980;
397	350	extern const device_type TMS0270;

trunk/src/emu/emu.mak
r242944	r242945
120	120	$(EMUOBJ)/ui/mainmenu.o \
121	121	$(EMUOBJ)/ui/miscmenu.o \
122	122	$(EMUOBJ)/ui/barcode.o \
123		$(EMUOBJ)/ui/devopt.o \
124	123	$(EMUOBJ)/ui/filemngr.o \
125	124	$(EMUOBJ)/ui/filesel.o \
126	125	$(EMUOBJ)/ui/imgcntrl.o \

trunk/src/emu/emuopts.h
r242944	r242945
354	354
355	355	const char main_value(astring &buffer, const char option) const;
356	356	const char sub_value(astring &buffer, const char name, const char *subname) const;
357		bool add_slot_options(bool isfirst);
358
359	357	private:
360	358	// device-specific option handling
361	359	void add_device_options(bool isfirst);
	360	bool add_slot_options(bool isfirst);
362	361	void update_slot_options();
363	362
364	363	// INI parsing helper

trunk/src/emu/machine/atahle.c
r242944	r242945
82	82	m_buffer.resize(sector_length());
83	83	save_item(NAME(m_buffer));
84	84	save_item(NAME(m_buffer_offset));
85		save_item(NAME(m_buffer_size));
86	85	save_item(NAME(m_error));
87	86	save_item(NAME(m_feature));
88	87	save_item(NAME(m_sector_count));

trunk/src/emu/machine/idehd.c
r242944	r242945
179	179	ata_hle_device::device_start();
180	180
181	181	save_item(NAME(m_can_identify_device));
182		save_item(NAME(m_num_cylinders));
183		save_item(NAME(m_num_sectors));
184		save_item(NAME(m_num_heads));
185
186	182	save_item(NAME(m_cur_lba));
187	183	save_item(NAME(m_sectors_until_int));
188	184	save_item(NAME(m_master_password_enable));

trunk/src/emu/sound/tiaintf.c
r242944	r242945
30	30	void tia_device::device_start()
31	31	{
32	32	m_channel = stream_alloc(0, 1, clock());
33		m_chip = tia_sound_init(~~this,~~ clock(), clock(), 16);
	33	m_chip = tia_sound_init(clock(), clock(), 16);
34	34	assert_always(m_chip != NULL, "Error creating TIA chip");
35	35	}
36	36

trunk/src/emu/sound/tiasound.c
r242944	r242945
526	526	}
527	527	}
528	528
529		static void tia_save_state(device_t device, tia tia)
530		{
531		device->save_item(NAME(tia->AUDC));
532		device->save_item(NAME(tia->AUDF));
533		device->save_item(NAME(tia->AUDV));
534		device->save_item(NAME(tia->Outvol));
535		device->save_item(NAME(tia->P4));
536		device->save_item(NAME(tia->P5));
537		device->save_item(NAME(tia->P9));
538		device->save_item(NAME(tia->Div_n_cnt));
539		device->save_item(NAME(tia->Div_n_max));
540		device->save_item(NAME(tia->Div_3_cnt));
541		device->save_item(NAME(tia->Samp_n_cnt));
542		device->save_item(NAME(tia->oversampling));
543		}
544
545	529	/*****************************************************************************/
546	530	/* Module: tia_sh_start() */
547	531	/* Purpose: to handle the power-up initialization functions */
r242944	r242945
557	541	/* */
558	542	/*****************************************************************************/
559	543
560		void tia_sound_init(~~device_t device,~~ int clock, int sample_rate, int gain)
	544	void *tia_sound_init(int clock, int sample_rate, int gain)
561	545	{
562	546	struct tia *chip;
563	547	int chan;
r242944	r242945
597	581	chip->P5[chan] = 0;
598	582	chip->P9[chan] = 0;
599	583	}
600
601		tia_save_state(device, chip);
602	584
603	585	return chip;
604	586	}

trunk/src/emu/sound/tiasound.h
r242944	r242945
37	37	#ifndef __TIASOUND_H__
38	38	#define __TIASOUND_H__
39	39
40		void tia_sound_init(~~device_t device,~~ int clock, int sample_rate, int gain);
	40	void *tia_sound_init(int clock, int sample_rate, int gain);
41	41	void tia_sound_free(void *chip);
42	42	void tia_process (void chip, stream_sample_t buffer, int length);
43	43	void tia_write(void *chip, offs_t offset, UINT8 data);

trunk/src/emu/ui/devopt.c
r242944	r242945
1		/*********************************************************************
2
3		ui/devopt.c
4
5		Internal menu for the device configuration.
6
7		Copyright Nicola Salmoria and the MAME Team.
8		Visit http://mamedev.org for licensing and usage restrictions.
9
10		*********************************************************************/
11
12		#include "emu.h"
13		#include "ui/ui.h"
14		#include "ui/devopt.h"
15
16		/*-------------------------------------------------
17		ui_device_config - handle the game information
18		menu
19		-------------------------------------------------*/
20
21		ui_menu_device_config::ui_menu_device_config(running_machine &machine, render_container container, device_slot_interface slot, device_slot_option *option) : ui_menu(machine, container)
22		{
23		astring tmp_tag;
24		tmp_tag.cpy(slot->device().tag()).cat(":").cat(option->name());
25		m_option = option;
26		m_owner = slot;
27		m_mounted = false;
28
29		device_iterator deviter(machine.config().root_device());
30		for (device_t *device = deviter.first(); device != NULL; device = deviter.next())
31		{
32		if (strcmp(device->tag(), tmp_tag.cstr()) == 0)
33		{
34		m_mounted = true;
35		break;
36		}
37		}
38		}
39
40		void ui_menu_device_config::populate()
41		{
42		astring string;
43		device_t *dev;
44
45		string.printf("[This option is%s currently mounted in the running system]\n\n", m_mounted ? "" : " NOT");
46		string.catprintf("Option: %s\n", m_option->name());
47
48		dev = const_cast<machine_config &>(machine().config()).device_add(&machine().config().root_device(), m_option->name(), m_option->devtype(), 0);
49
50		string.catprintf("Device: %s\n", dev->name());
51		if (!m_mounted)
52		string.cat("\nIf you select this option, the following items will be enabled:\n");
53		else
54		string.cat("\nThe selected option enables the following items:\n");
55
56		// loop over all CPUs
57		execute_interface_iterator execiter(*dev);
58		if (execiter.count() > 0)
59		{
60		string.cat("* CPU:\n");
61		tagmap_t<UINT8> exectags;
62		for (device_execute_interface *exec = execiter.first(); exec != NULL; exec = execiter.next())
63		{
64		if (exectags.add(exec->device().tag(), 1, FALSE) == TMERR_DUPLICATE)
65		continue;
66
67		// get cpu specific clock that takes internal multiplier/dividers into account
68		int clock = exec->device().clock();
69
70		// count how many identical CPUs we have
71		int count = 1;
72		const char *name = exec->device().name();
73		execute_interface_iterator execinneriter(*dev);
74		for (device_execute_interface *scan = execinneriter.first(); scan != NULL; scan = execinneriter.next())
75		{
76		if (exec->device().type() == scan->device().type() && strcmp(name, scan->device().name()) == 0 && exec->device().clock() == scan->device().clock())
77		if (exectags.add(scan->device().tag(), 1, FALSE) != TMERR_DUPLICATE)
78		count++;
79		}
80
81		// if more than one, prepend a #x in front of the CPU name
82		if (count > 1)
83		string.catprintf(" %d" UTF8_MULTIPLY, count);
84		else
85		string.cat(" ");
86		string.cat(name);
87
88		// display clock in kHz or MHz
89		if (clock >= 1000000)
90		string.catprintf(" %d.%06d" UTF8_NBSP "MHz\n", clock / 1000000, clock % 1000000);
91		else
92		string.catprintf(" %d.%03d" UTF8_NBSP "kHz\n", clock / 1000, clock % 1000);
93		}
94		}
95
96		// display screen information
97		screen_device_iterator scriter(*dev);
98		if (scriter.count() > 0)
99		{
100		string.cat("* Video:\n");
101		for (screen_device *screen = scriter.first(); screen != NULL; screen = scriter.next())
102		{
103		string.catprintf(" Screen '%s': ", screen->tag());
104
105		if (screen->screen_type() == SCREEN_TYPE_VECTOR)
106		string.cat("Vector\n");
107		else
108		{
109		const rectangle &visarea = screen->visible_area();
110
111		string.catprintf("%d " UTF8_MULTIPLY " %d (%s) %f" UTF8_NBSP "Hz\n",
112		visarea.width(), visarea.height(),
113		(machine().system().flags & ORIENTATION_SWAP_XY) ? "V" : "H",
114		ATTOSECONDS_TO_HZ(screen->frame_period().attoseconds));
115		}
116		}
117		}
118
119		// loop over all sound chips
120		sound_interface_iterator snditer(*dev);
121		if (snditer.count() > 0)
122		{
123		string.cat("* Sound:\n");
124		tagmap_t<UINT8> soundtags;
125		for (device_sound_interface *sound = snditer.first(); sound != NULL; sound = snditer.next())
126		{
127		if (soundtags.add(sound->device().tag(), 1, FALSE) == TMERR_DUPLICATE)
128		continue;
129
130		// count how many identical sound chips we have
131		int count = 1;
132		sound_interface_iterator sndinneriter(*dev);
133		for (device_sound_interface *scan = sndinneriter.first(); scan != NULL; scan = sndinneriter.next())
134		{
135		if (sound->device().type() == scan->device().type() && sound->device().clock() == scan->device().clock())
136		if (soundtags.add(scan->device().tag(), 1, FALSE) != TMERR_DUPLICATE)
137		count++;
138		}
139		// if more than one, prepend a #x in front of the CPU name
140		if (count > 1)
141		string.catprintf(" %d" UTF8_MULTIPLY, count);
142		else
143		string.cat(" ");
144		string.cat(sound->device().name());
145
146		// display clock in kHz or MHz
147		int clock = sound->device().clock();
148		if (clock >= 1000000)
149		string.catprintf(" %d.%06d" UTF8_NBSP "MHz\n", clock / 1000000, clock % 1000000);
150		else if (clock != 0)
151		string.catprintf(" %d.%03d" UTF8_NBSP "kHz\n", clock / 1000, clock % 1000);
152		else
153		string.cat("\n");
154		}
155		}
156
157		int input = 0, input_mj = 0, input_hana = 0, input_gamble = 0, input_analog = 0, input_adjust = 0;
158		int dips = 0, confs = 0;
159		astring errors, dips_opt, confs_opt;
160		ioport_list portlist;
161		device_iterator iptiter(*dev);
162		for (device_t *iptdev = iptiter.first(); iptdev != NULL; iptdev = iptiter.next())
163		portlist.append(*iptdev, errors);
164
165		// check if the device adds inputs to the system
166		for (ioport_port *port = portlist.first(); port != NULL; port = port->next())
167		for (ioport_field *field = port->first_field(); field != NULL; field = field->next())
168		{
169		if (field->type() >= IPT_MAHJONG_FIRST && field->type() < IPT_MAHJONG_LAST)
170		input_mj++;
171		else if (field->type() >= IPT_HANAFUDA_FIRST && field->type() < IPT_HANAFUDA_LAST)
172		input_hana++;
173		else if (field->type() >= IPT_GAMBLING_FIRST && field->type() < IPT_GAMBLING_LAST)
174		input_gamble++;
175		else if (field->type() >= IPT_ANALOG_FIRST && field->type() < IPT_ANALOG_LAST)
176		input_analog++;
177		else if (field->type() == IPT_ADJUSTER)
178		input_adjust++;
179		else if (field->type() >= IPT_START1 && field->type() < IPT_UI_FIRST)
180		input++;
181		else if (field->type() == IPT_DIPSWITCH)
182		{
183		dips++;
184		dips_opt.cat(" ").cat(field->name());
185		for (ioport_setting *setting = field->first_setting(); setting != NULL; setting = setting->next())
186		{
187		if (setting->value() == field->defvalue())
188		{
189		dips_opt.catprintf(" [default: %s]\n", setting->name());
190		break;
191		}
192		}
193		}
194		else if (field->type() == IPT_CONFIG)
195		{
196		confs++;
197		confs_opt.cat(" ").cat(field->name());
198		for (ioport_setting *setting = field->first_setting(); setting != NULL; setting = setting->next())
199		{
200		if (setting->value() == field->defvalue())
201		{
202		confs_opt.catprintf(" [default: %s]\n", setting->name());
203		break;
204		}
205		}
206		}
207		}
208
209		if (dips)
210		string.cat("* Dispwitch settings:\n").cat(dips_opt);
211		if (confs)
212		string.cat("* Configuration settings:\n").cat(confs_opt);
213		if (input + input_mj + input_hana + input_gamble + input_analog + input_adjust)
214		string.cat("* Input device(s):\n");
215		if (input)
216		string.catprintf(" Player inputs [%d inputs]\n", input);
217		if (input_mj)
218		string.catprintf(" Mahjong inputs [%d inputs]\n", input_mj);
219		if (input_hana)
220		string.catprintf(" Hanafuda inputs [%d inputs]\n", input_hana);
221		if (input_gamble)
222		string.catprintf(" Gambling inputs [%d inputs]\n", input_gamble);
223		if (input_analog)
224		string.catprintf(" Analog inputs [%d inputs]\n", input_analog);
225		if (input_adjust)
226		string.catprintf(" Adjuster inputs [%d inputs]\n", input_adjust);
227
228		image_interface_iterator imgiter(*dev);
229		if (imgiter.count() > 0)
230		{
231		string.cat("* Media Options:\n");
232		for (const device_image_interface *imagedev = imgiter.first(); imagedev != NULL; imagedev = imgiter.next())
233		string.catprintf(" %s [tag: %s]\n", imagedev->image_type_name(), imagedev->device().tag());
234		}
235
236		slot_interface_iterator slotiter(*dev);
237		if (slotiter.count() > 0)
238		{
239		string.cat("* Slot Options:\n");
240		for (const device_slot_interface *slot = slotiter.first(); slot != NULL; slot = slotiter.next())
241		string.catprintf(" %s [default: %s]\n", slot->device().tag(), slot->default_option() ? slot->default_option() : "----");
242		}
243
244		if ((execiter.count() + scriter.count() + snditer.count() + imgiter.count() + slotiter.count() + input + input_mj + input_hana + input_gamble + input_analog + input_adjust) == 0)
245		string.cat("[None]\n");
246
247		const_cast<machine_config &>(machine().config()).device_remove(&machine().config().root_device(), m_option->name());
248		item_append(string, NULL, MENU_FLAG_MULTILINE, NULL);
249		}
250
251		void ui_menu_device_config::handle()
252		{
253		/* process the menu */
254		process(0);
255		}
256
257		ui_menu_device_config::~ui_menu_device_config()
258		{
259		}

trunk/src/emu/ui/devopt.h
r242944	r242945
1		/***************************************************************************
2
3		ui/devopt.h
4
5		Internal menu for the device configuration.
6
7		Copyright Nicola Salmoria and the MAME Team.
8		Visit http://mamedev.org for licensing and usage restrictions.
9
10		***************************************************************************/
11
12		#pragma once
13
14		#ifndef __UI_DEVOPT_H__
15		#define __UI_DEVOPT_H__
16
17		class ui_menu_device_config : public ui_menu {
18		public:
19		ui_menu_device_config(running_machine &machine, render_container container, device_slot_interface slot, device_slot_option *option);
20		virtual ~ui_menu_device_config();
21		virtual void populate();
22		virtual void handle();
23
24		private:
25		device_slot_interface *m_owner;
26		device_slot_option *m_option;
27		bool m_mounted;
28		};
29
30
31		#endif /* __UI_DEVOPT_H__ */

trunk/src/emu/ui/filemngr.c
r242944	r242945
59	59	}
60	60
61	61
62		void ui_menu_file_manager::fill_image_line(device_image_interface *img, astring &instance, astring &filename)
63		{
64		// get the image type/id
65		instance.printf("%s (%s)", img->instance_name(), img->brief_instance_name());
66
67		// get the base name
68		if (img->basename() != NULL)
69		{
70		filename.cpy(img->basename());
71
72		// if the image has been loaded through softlist, also show the loaded part
73		if (img->part_entry() != NULL)
74		{
75		const software_part *tmp = img->part_entry();
76		if (tmp->name() != NULL)
77		{
78		filename.cat(" (");
79		filename.cat(tmp->name());
80		// also check if this part has a specific part_id (e.g. "Map Disc", "Bonus Disc", etc.), and in case display it
81		if (img->get_feature("part_id") != NULL)
82		{
83		filename.cat(": ");
84		filename.cat(img->get_feature("part_id"));
85		}
86		filename.cat(")");
87		}
88		}
89		}
90		else
91		filename.cpy("---");
92		}
93
94	62	//-------------------------------------------------
95	63	// populate
96	64	//-------------------------------------------------
97	65
98	66	void ui_menu_file_manager::populate()
99	67	{
100		astring buffer, tmp_inst, tmp_name;
101		bool first_entry = true;
102		astring prev_owner;
	68	astring buffer;
	69	bool first = true;
103	70
104	71	// cycle through all devices for this system
105		device_iterator iter(machine().root_device());
106		tagmap_t<UINT8> devtags;
107		for (device_t *dev = iter.first(); dev != NULL; dev = iter.next())
	72	image_interface_iterator iter(machine().root_device());
	73	for (device_image_interface *image = iter.first(); image != NULL; image = iter.next())
108	74	{
109		bool tag_appended = false;
110		if (devtags.add(dev->tag(), 1, FALSE) == TMERR_DUPLICATE)
111		continue;
	75	if (first)
	76	first = false;
	77	else
	78	item_append("", NULL, MENU_FLAG_DISABLE, NULL);
112	79
113		// check whether it owns an image interface
114		image_interface_iterator subiter(*dev);
115		if (subiter.count() > 0)
116		{
117		// if so, cycle through all its image interfaces
118		image_interface_iterator subiter(*dev);
119		for (device_image_interface *scan = subiter.first(); scan != NULL; scan = subiter.next())
	80	// get the image type/id
	81	buffer.printf("%s (%s)", image->instance_name(), image->brief_instance_name());
	82	item_append(buffer, "", MENU_FLAG_DISABLE, NULL);
	83	item_append("Device", image->device().tag(), MENU_FLAG_DISABLE, NULL);
	84
	85	// get the base name
	86	if (image->basename() != NULL)
	87	{
	88	buffer.cpy(image->basename());
	89
	90	// if the image has been loaded through softlist, also show the loaded part
	91	if (image->part_entry() != NULL)
120	92	{
121		// if it is a children device, and not something further down the device tree, we want it in the menu!
122		if (strcmp(scan->device().owner()->tag(), dev->tag()) == 0)
123		if (devtags.add(scan->device().tag(), 1, FALSE) != TMERR_DUPLICATE)
	93	const software_part *tmp = image->part_entry();
	94	if (tmp->name() != NULL)
	95	{
	96	buffer.cat(" (");
	97	buffer.cat(tmp->name());
	98	// also check if this part has a specific part_id (e.g. "Map Disc", "Bonus Disc", etc.), and in case display it
	99	if (image->get_feature("part_id") != NULL)
124	100	{
125		// check whether we already had some devices with the same owner: if not, output the owner tag!
126		if (!tag_appended)
127		{
128		if (first_entry)
129		first_entry = false;
130		else
131		item_append(MENU_SEPARATOR_ITEM, NULL, 0, NULL);
132		buffer.printf("[root%s]", dev->tag());
133		item_append(buffer, NULL, 0, NULL);
134		tag_appended = true;
135		}
136		// finally, append the image interface to the menu
137		fill_image_line(scan, tmp_inst, tmp_name);
138		item_append(tmp_inst, tmp_name, 0, (void *) scan);
	101	buffer.cat(": ");
	102	buffer.cat(image->get_feature("part_id"));
139	103	}
	104	buffer.cat(")");
	105	}
140	106	}
141	107	}
	108	else
	109	buffer.cpy("---");
	110
	111	// record the menu item
	112	item_append("Mounted File", buffer, 0, (void *) image);
142	113	}
143	114	item_append(MENU_SEPARATOR_ITEM, NULL, 0, NULL);
144	115	item_append("Reset", NULL, 0, (void *)1);

trunk/src/emu/ui/filemngr.h
r242944	r242945
25	25	virtual void populate();
26	26	virtual void handle();
27	27	virtual void custom_render(void *selectedref, float top, float bottom, float x, float y, float x2, float y2);
28
29		void fill_image_line(device_image_interface *img, astring &instance, astring &filename);
30	28	};
31	29
32	30	#endif /* __UI_FILEMNGR_H__ */

trunk/src/emu/ui/slotopt.c
r242944	r242945
13	13
14	14	#include "ui/ui.h"
15	15	#include "ui/slotopt.h"
16		#include "ui/devopt.h"
17	16
18	17
19	18	/*-------------------------------------------------
r242944	r242945
188	187	if (menu_event != NULL && menu_event->itemref != NULL)
189	188	{
190	189	if ((FPTR)menu_event->itemref == 1 && menu_event->iptkey == IPT_UI_SELECT)
191		{
192		machine().options().add_slot_options(false);
193	190	machine().schedule_hard_reset();
194		}
195	191	else if (menu_event->iptkey == IPT_UI_LEFT \|\| menu_event->iptkey == IPT_UI_RIGHT)
196	192	{
197	193	device_slot_interface slot = (device_slot_interface )menu_event->itemref;
r242944	r242945
199	195	set_slot_device(slot, val);
200	196	reset(UI_MENU_RESET_REMEMBER_REF);
201	197	}
202		else if (menu_event->iptkey == IPT_UI_SELECT)
203		{
204		device_slot_interface slot = (device_slot_interface )menu_event->itemref;
205		device_slot_option *option = slot_get_current_option(slot);
206		if (option)
207		ui_menu::stack_push(auto_alloc_clear(machine(), ui_menu_device_config(machine(), container, slot, option)));
208		}
209	198	}
210	199	}

trunk/src/lib/util/chd.c
r242944	r242945
2665	2665	// advance the read pointer
2666	2666	m_read_done_offset += numbytes;
2667	2667	}
2668		catch (chd_error& err)
2669		{
2670		fprintf(stderr, "CHD error occured: %s\n", chd_file::error_string(err));
2671		m_read_error = true;
2672		}
2673	2668	catch (std::exception& ex)
2674	2669	{
2675	2670	fprintf(stderr, "exception occured: %s\n", ex.what());

trunk/src/mame/drivers/aleck64.c
r242944	r242945
103	103	JAPAN
104	104
105	105
	106	On bootup, they also mention 'T.L.S' (Temporary Landing System), which seems
	107	to be the hardware system, designed by Arika Co. Ltd.
106	108
107	109
108	110	PCB Layout
r242944	r242945
183	185	DECLARE_DRIVER_INIT(aleck64);
184	186	DECLARE_WRITE32_MEMBER(aleck_dips_w);
185	187	DECLARE_READ32_MEMBER(aleck_dips_r);
186		DECLARE_READ16_MEMBER(e90_prot_r);
187		DECLARE_WRITE16_MEMBER(e90_prot_w);
188	188	private:
189	189	UINT32 m_dip_read_offset;
190	190	};
r242944	r242945
311	311	AM_RANGE(0x1fc00000, 0x1fc007bf) AM_ROM AM_REGION("user1", 0) // PIF ROM
312	312	AM_RANGE(0x1fc007c0, 0x1fc007ff) AM_DEVREADWRITE("rcp", n64_periphs, pif_ram_r, pif_ram_w)
313	313
314		AM_RANGE(0xc0000000, 0xc07fffff) AM_RAM // SDRAM, Aleck 64 specific
	314	/*
	315	Surely this should mirror main ram? srmvs crashes, and
	316	vivdolls overwrites it's memory test code if it does mirror
	317	*/
	318	AM_RANGE(0xc0000000, 0xc07fffff) AM_RAM
315	319
316	320	AM_RANGE(0xc0800000, 0xc0800fff) AM_READWRITE(aleck_dips_r,aleck_dips_w)
317		ADDRE~~SS_M~~AP_~~END~~
	321	AM_RANGE(0xd0000000, 0xd00fffff) AM_RAM // mtetrisc, write only, mirror?
318	322
319		/*
320		E90 protection handlers
321		*/
322
323		READ16_MEMBER(aleck64_state::e90_prot_r)
324		{
325		// offset 0 $800 = status ready, active high
326		return 0;
327		}
328
329		WRITE16_MEMBER(aleck64_state::e90_prot_w)
330		{
331		switch(offset*2)
332		{
333		case 0x16:
334		if(data != 6 && data != 7)
335		printf("! %04x %04x %08x\n",offset*2,data,mem_mask);
336
337		if(data & 1) // 0 -> 1 transition
338		{
339		for(int i=0;i<0x1000;i+=4)
340		space.write_dword(0x007502f4+i,space.read_dword(0xd0000000+i));
341		}
342		break;
343		//0x1e bit 0 probably enables the chip
344		default:
345		printf("%04x %04x %08x\n",offset*2,data,mem_mask);
346		break;
347		}
348		}
349
350		static ADDRESS_MAP_START( e90_map, AS_PROGRAM, 32, aleck64_state )
351		AM_IMPORT_FROM( n64_map )
352		AM_RANGE(0xd0000000, 0xd0000fff) AM_RAM
353		AM_RANGE(0xd0010000, 0xd0010fff) AM_RAM
354		AM_RANGE(0xd0030000, 0xd003001f) AM_READWRITE16(e90_prot_r, e90_prot_w,0xffffffff)
355	323	ADDRESS_MAP_END
356	324
357	325	static ADDRESS_MAP_START( rsp_map, AS_PROGRAM, 32, aleck64_state )
r242944	r242945
383	351	PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_SENSITIVITY(30) PORT_KEYDELTA(30) PORT_PLAYER(1)
384	352
385	353	PORT_START("P1_ANALOG_Y")
386		PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(30) PORT_KEYDELTA(30) PORT_PLAYER(1) ~~PORT_REVERSE~~
	354	PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0xff,0x00) PORT_SENSITIVITY(30) PORT_KEYDELTA(30) PORT_PLAYER(1)
387	355
388	356	PORT_START("P2")
389	357	PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2) // Button A
r242944	r242945
406	374	PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_SENSITIVITY(30) PORT_KEYDELTA(30) PORT_PLAYER(2)
407	375
408	376	PORT_START("P2_ANALOG_Y")
409		PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(30) PORT_KEYDELTA(30) PORT_PLAYER(2) ~~PORT_REVERSE~~
	377	PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0xff,0x00) PORT_SENSITIVITY(30) PORT_KEYDELTA(30) PORT_PLAYER(2)
410	378
411	379	PORT_START("IN0")
412	380	PORT_DIPNAME( 0x80000000, 0x80000000, "DIPSW1 #8" ) PORT_DIPLOCATION("SW1:8")
r242944	r242945
489	457	PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_UNUSED )
490	458	PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_UNUSED )
491	459	PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_PLAYER(2)
	460
492	461	INPUT_PORTS_END
493	462
494	463	static INPUT_PORTS_START( mtetrisc )
r242944	r242945
873	842	MCFG_N64_PERIPHS_ADD("rcp");
874	843	MACHINE_CONFIG_END
875	844
876		static MACHINE_CONFIG_DERIVED( a64_e90, aleck64 )
877		MCFG_CPU_MODIFY("maincpu")
878		MCFG_CPU_PROGRAM_MAP(e90_map)
879		MACHINE_CONFIG_END
880
881	845	DRIVER_INIT_MEMBER(aleck64_state,aleck64)
882	846	{
883	847	UINT8 *rom = memregion("user2")->base();
r242944	r242945
1111	1075	GAME( 1998, aleck64, 0, aleck64, aleck64, aleck64_state, aleck64, ROT0, "Nintendo / Seta", "Aleck64 PIF BIOS", GAME_IS_BIOS_ROOT)
1112	1076
1113	1077	// games
1114		GAME( 1998, 11beat, aleck64, aleck64, 11beat, aleck64_state, aleck64, ROT0, "Hudson", "Eleven Beat", GAME_NOT_WORKING ) // crashes at kick off / during attract with DRC
1115		GAME( 1998, mtetrisc, aleck64, a64_e90, mtetrisc, aleck64_state, aleck64, ROT0, "Capcom", "Magical Tetris Challenge (981009 Japan)", GAME_NOT_WORKING\|GAME_IMPERFECT_GRAPHICS )
	1078	GAME( 1998, 11beat, aleck64, aleck64, 11beat, aleck64_state, aleck64, ROT0, "Hudson", "Eleven Beat", GAME_NOT_WORKING\|GAME_NO_SOUND ) // crashes at kick off / during attract
	1079	GAME( 1998, mtetrisc, aleck64, aleck64, mtetrisc, aleck64_state, aleck64, ROT0, "Capcom", "Magical Tetris Challenge (981009 Japan)", GAME_NOT_WORKING\|GAME_IMPERFECT_GRAPHICS )
1116	1080	GAME( 1998, starsldr, aleck64, aleck64, starsldr, aleck64_state, aleck64, ROT0, "Hudson / Seta", "Star Soldier: Vanishing Earth", GAME_IMPERFECT_GRAPHICS )
1117	1081	GAME( 1998, vivdolls, aleck64, aleck64, aleck64, aleck64_state, aleck64, ROT0, "Visco", "Vivid Dolls", GAME_IMPERFECT_GRAPHICS )
1118	1082	GAME( 1999, srmvs, aleck64, aleck64, srmvs, aleck64_state, aleck64, ROT0, "Seta", "Super Real Mahjong VS", GAME_NOT_WORKING\|GAME_IMPERFECT_GRAPHICS )

trunk/src/mame/drivers/chihiro.c
r242944	r242945
369	369	#include "debug/debugcon.h"
370	370	#include "debug/debugcmd.h"
371	371	#include "debug/debugcpu.h"
372		#include "osdcore.h"
373	372	#include "includes/chihiro.h"
374	373
375	374	#define LOG_PCI

trunk/src/mame/drivers/peplus.c
r242944	r242945
1624	1624	ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
1625	1625	ROM_END
1626	1626
1627		ROM_START( pepp0038 ) /* Normal board : Standard Draw Poker (PP0038) */
1628		/*
1629		PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
1630		----------------------------------------------------------
1631		PE 1 2 3 4 6 9 25 50 300 900
1632		% Range: 95.8-97.8% Optimum: 99.8% Hit Frequency: 45.4%
1633		Programs Available: PP0038, X002121P
1634		*/
1635		ROM_REGION( 0x10000, "maincpu", 0 )
1636		ROM_LOAD( "pp0038_a45-a74.u68", 0x00000, 0x10000, CRC(85fe387e) SHA1(a0aa4cb422c04066d61d665943eced30b2eaf5b2) ) /* Game Version: A45, Library Version: A74 */
1637
1638		ROM_REGION( 0x020000, "gfx1", 0 )
1639		ROM_LOAD( "mro-cg821.u72", 0x00000, 0x8000, CRC(e91f1192) SHA1(1a00027b681fad6b350366b2dff7411445a07f05) )
1640		ROM_LOAD( "mgo-cg821.u73", 0x08000, 0x8000, CRC(fa417bbc) SHA1(8c59d9156fb52099bf76b0a7e0da3a27518d6f19) )
1641		ROM_LOAD( "mbo-cg821.u74", 0x10000, 0x8000, CRC(4229457a) SHA1(aa1f26792279a834ed2025d6be58fa7ea38329fd) )
1642		ROM_LOAD( "mxo-cg821.u75", 0x18000, 0x8000, CRC(2da9729a) SHA1(3a5cf4c794e0057bdb705e0c7da541c3c8b48591) )
1643
1644		ROM_REGION( 0x100, "proms", 0 )
1645		ROM_LOAD( "cap904.u50", 0x0000, 0x0100, CRC(0eec8336) SHA1(a6585c978dbc2f4f3818e3a5b92f8c28be23c4c0) ) /* BPROM type N82S135N verified */
1646		ROM_END
1647
1648	1627	ROM_START( pepp0040 ) /* Normal board : Standard Draw Poker (PP0040) */
1649	1628	/*
1650	1629	PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
r242944	r242945
2286	2265	ROM_LOAD( "cap740.u50", 0x0000, 0x0100, CRC(6fe619c4) SHA1(49e43dafd010ce0fe9b2a63b96a4ddedcb933c6d) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
2287	2266	ROM_END
2288	2267
2289		ROM_START( pepp0116a ) /* Normal board : Standard Draw Poker (PP0116) */
2290		/*
2291		PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
2292		----------------------------------------------------------
2293		BA 1 2 3 4 5 8 25 50 250 800
2294		% Range: 93.8-95.8% Optimum: 97.8% Hit Frequency: 45.3%
2295		Programs Available: PP0116
2296		*/
2297		ROM_REGION( 0x10000, "maincpu", 0 )
2298		ROM_LOAD( "pp0116_554-544.u68", 0x00000, 0x8000, CRC(27aba06b) SHA1(7976a2b2577c28e332091cbbcb4c7d53ffbea827) ) /* Game Version: 554, Library Version: 544, Video Lib Ver: 544 */
2299		ROM_RELOAD( 0x08000, 0x8000) /* 32K version built using earlier gaming libraries */
2300
2301		ROM_REGION( 0x020000, "gfx1", 0 )
2302		ROM_LOAD( "mro-cg864.u72", 0x00000, 0x8000, CRC(f4ac28b9) SHA1(35c8a603120f35bd92905e0491e9ae5cd201e13f) ) /* 09/13/89 @ IGT L89-1706 */
2303		ROM_LOAD( "mgo-cg864.u73", 0x08000, 0x8000, CRC(da8efcb9) SHA1(942c6b613074c52f6ed1c2fce78d46ef0f221c48) ) /* Custom Mirage casino card backs */
2304		ROM_LOAD( "mbo-cg864.u74", 0x10000, 0x8000, CRC(d48ac9cd) SHA1(a62d6c1daf199856aa1777d1d99fe81399215e36) )
2305		ROM_LOAD( "mxo-cg864.u75", 0x18000, 0x8000, CRC(04f81245) SHA1(055271c6c502fad3be5f2d694a94f96bf3176404) )
2306
2307		ROM_REGION( 0x100, "proms", 0 )
2308		ROM_LOAD( "cap864.u50", 0x0000, 0x0100, CRC(c80e5743) SHA1(edf4e5a68905cc566077613d856bc90b8136a227) ) /* BPROM type DM74LS471 (compatible with N82S135N) verified */
2309		ROM_END
2310
2311	2268	ROM_START( pepp0118 ) /* Normal board : Standard Draw Poker (PP0118) */
2312	2269	/*
2313	2270	PayTable Js+ 2PR 3K STR FL FH 4K SF RF (Bonus)
r242944	r242945
9075	9032	GAMEL(1987, pepp0014, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0014) Standard Draw Poker (International)", 0, layout_pe_poker )
9076	9033	GAMEL(1987, pepp0014a, pepp0002, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0014) Standard Draw Poker", 0, layout_pe_poker )
9077	9034	GAMEL(1987, pepp0023, pepp0002, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0023) 10's or Better", 0, layout_pe_poker )
9078		GAMEL(1987, pepp0038, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0038) Standard Draw Poker", 0, layout_pe_poker )
9079	9035	GAMEL(1987, pepp0040, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0040) Standard Draw Poker", 0, layout_pe_poker )
9080	9036	GAMEL(1987, pepp0040a, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0040) Standard Draw Poker (International)", 0, layout_pe_poker )
9081	9037	GAMEL(1987, pepp0041, pepp0002, peplus, peplus_poker, peplus_state, peplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0041) Standard Draw Poker", 0, layout_pe_poker )
r242944	r242945
9105	9061	GAMEL(1987, pepp0083, pepp0002, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0083) 10's or Better", 0, layout_pe_poker )
9106	9062	GAMEL(1987, pepp0103, pepp0055, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0103) Deuces Wild Poker", 0, layout_pe_poker )
9107	9063	GAMEL(1987, pepp0116, pepp0002, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0116) Standard Draw Poker", 0, layout_pe_poker )
9108		GAMEL(1987, pepp0116a, pepp0002, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0116) Standard Draw Poker (Mirage)", 0, layout_pe_poker )
9109	9064	GAMEL(1987, pepp0118, pepp0002, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0118) Standard Draw Poker", 0, layout_pe_poker )
9110	9065	GAMEL(1987, pepp0120, 0, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0120) Wild Sevens Poker", 0, layout_pe_poker )
9111	9066	GAMEL(1987, pepp0125, pepp0055, peplus, peplus_poker, peplus_state, nonplus, ROT0, "IGT - International Game Technology", "Player's Edge Plus (PP0125) Deuces Wild Poker", 0, layout_pe_poker )

trunk/src/mame/drivers/stfight.c
r242944	r242945
247	247	#include "cpu/z80/z80.h"
248	248	#include "cpu/m6805/m6805.h"
249	249	#include "sound/2203intf.h"
	250	#include "sound/msm5205.h"
250	251	#include "includes/stfight.h"
251	252
252	253	static ADDRESS_MAP_START( cpu1_map, AS_PROGRAM, 8, stfight_state )
r242944	r242945
1036	1037	ROM_END
1037	1038
1038	1039	// Note: Marked GAME_IMPERFECT_SOUND due to YM2203 clock issue
1039		GAME( 1986, empcity, 0, stfight, stfight, stfight_state, empcity, ROT0, "Seibu Kaihatsu", "Empire City: 1931 (bootleg?)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE )
1040		GAME( 1986, empcityu, empcity, stfight, stfight, stfight_state, stfight, ROT0, "Seibu Kaihatsu (Taito / Romstar license)", "Empire City: 1931 (US)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE ) // different title logo
1041		GAME( 1986, empcityj, empcity, stfight, stfight, stfight_state, stfight, ROT0, "Seibu Kaihatsu (Taito license)", "Empire City: 1931 (Japan)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE )
1042		GAME( 1986, empcityi, empcity, stfight, stfight, stfight_state, stfight, ROT0, "Seibu Kaihatsu (Eurobed license)", "Empire City: 1931 (Italy)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE )
1043		GAME( 1986, stfight, empcity, stfight, stfight, stfight_state, stfight, ROT0, "Seibu Kaihatsu (Tuning license)", "Street Fight (Germany)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE )
1044		GAME( 1986, stfighta, empcity, stfight, stfight, stfight_state, stfight, ROT0, "Seibu Kaihatsu", "Street Fight (bootleg?)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE )
	1040	GAME( 1986, empcity, 0, stfight, stfight, stfight_state, empcity, ROT0, "Seibu Kaihatsu", "Empire City: 1931 (bootleg?)", GAME_IMPERFECT_SOUND )
	1041	GAME( 1986, empcityu, empcity, stfight, stfight, stfight_state, stfight, ROT0, "Seibu Kaihatsu (Taito / Romstar license)", "Empire City: 1931 (US)", GAME_IMPERFECT_SOUND ) // different title logo
	1042	GAME( 1986, empcityj, empcity, stfight, stfight, stfight_state, stfight, ROT0, "Seibu Kaihatsu (Taito license)", "Empire City: 1931 (Japan)", GAME_IMPERFECT_SOUND )
	1043	GAME( 1986, empcityi, empcity, stfight, stfight, stfight_state, stfight, ROT0, "Seibu Kaihatsu (Eurobed license)", "Empire City: 1931 (Italy)", GAME_IMPERFECT_SOUND )
	1044	GAME( 1986, stfight, empcity, stfight, stfight, stfight_state, stfight, ROT0, "Seibu Kaihatsu (Tuning license)", "Street Fight (Germany)", GAME_IMPERFECT_SOUND )
	1045	GAME( 1986, stfighta, empcity, stfight, stfight, stfight_state, stfight, ROT0, "Seibu Kaihatsu", "Street Fight (bootleg?)", GAME_IMPERFECT_SOUND )
1045	1046	/* Cross Shooter runs on a slightly modified PCB, with a different text tilemap and gfx blobs (see also cshooter.c) */
1046		GAME( 1987, cshooter, 0, cshooter,cshooter, stfight_state, cshooter,ROT270,"Seibu Kaihatsu (Taito license)", "Cross Shooter (not encrypted)", GAME_NOT_WORKING ~~\| GAME_SUPPORTS_SAVE~~ )
	1047	GAME( 1987, cshooter, 0, cshooter,cshooter, stfight_state, cshooter,ROT270,"Seibu Kaihatsu (Taito license)", "Cross Shooter (not encrypted)", GAME_NOT_WORKING )

trunk/src/mame/drivers/stlforce.c
r242944	r242945
370	370	}
371	371
372	372
373		GAME( 1994, stlforce, 0, stlforce, stlforce, stlforce_state, stlforce, ROT0, "Electronic Devices Italy / Ecogames S.L. Spain", "Steel Force", GAME_SUPPORTS_SAVE )
374		GAME( 1995, twinbrat, 0, twinbrat, stlforce, stlforce_state, twinbrat, ROT0, "Elettronica Video-Games S.R.L.", "Twin Brats (set 1)", GAME_SUPPORTS_SAVE )
375		GAME( 1995, twinbrata,twinbrat, twinbrat, stlforce, stlforce_state, twinbrat, ROT0, "Elettronica Video-Games S.R.L.", "Twin Brats (set 2)", GAME_SUPPORTS_SAVE )
	373	GAME( 1994, stlforce, 0, stlforce, stlforce, stlforce_state, stlforce, ROT0, "Electronic Devices Italy / Ecogames S.L. Spain", "Steel Force", 0 )
	374	GAME( 1995, twinbrat, 0, twinbrat, stlforce, stlforce_state, twinbrat, ROT0, "Elettronica Video-Games S.R.L.", "Twin Brats (set 1)", 0 )
	375	GAME( 1995, twinbrata,twinbrat, twinbrat, stlforce, stlforce_state, twinbrat, ROT0, "Elettronica Video-Games S.R.L.", "Twin Brats (set 2)", 0 )

trunk/src/mame/drivers/strnskil.c
r242944	r242945
22	22	#include "sound/sn76496.h"
23	23	#include "includes/strnskil.h"
24	24
25
26
27		void strnskil_state::machine_start()
28		{
29		save_item(NAME(m_scrl_ctrl));
30		save_item(NAME(m_irq_source));
31		}
32
33	25	/****************************************************************************/
34	26
35	27	READ8_MEMBER(strnskil_state::strnskil_d800_r)
r242944	r242945
541	533	m_maincpu->space(AS_PROGRAM).install_write_handler(0xd80d, 0xd80d, write8_delegate(FUNC(strnskil_state::protection_w),this));
542	534	}
543	535
544		GAME( 1984, strnskil, 0, strnskil, strnskil, driver_device, 0, ROT0, "Sun Electronics", "Strength & Skill", GAME_SUPPORTS_SAVE )
545		GAME( 1984, guiness, strnskil, strnskil, strnskil, driver_device, 0, ROT0, "Sun Electronics", "The Guiness (Japan)", GAME_SUPPORTS_SAVE )
546		GAME( 1984, banbam, 0, banbam, banbam, strnskil_state, banbam, ROT0, "Sun Electronics", "BanBam", GAME_UNEMULATED_PROTECTION \| GAME_SUPPORTS_SAVE )
547		GAME( 1984, pettanp, banbam, strnskil, banbam, strnskil_state, pettanp, ROT0, "Sun Electronics", "Pettan Pyuu (Japan)", GAME_UNEMULATED_PROTECTION \| GAME_SUPPORTS_SAVE )
	536	GAME( 1984, strnskil, 0, strnskil, strnskil, driver_device, 0, ROT0, "Sun Electronics", "Strength & Skill", 0 )
	537	GAME( 1984, guiness, strnskil, strnskil, strnskil, driver_device, 0, ROT0, "Sun Electronics", "The Guiness (Japan)", 0 )
	538	GAME( 1984, banbam, 0, banbam, banbam, strnskil_state, banbam, ROT0, "Sun Electronics", "BanBam", GAME_UNEMULATED_PROTECTION )
	539	GAME( 1984, pettanp, banbam, strnskil, banbam, strnskil_state, pettanp, ROT0, "Sun Electronics", "Pettan Pyuu (Japan)", GAME_UNEMULATED_PROTECTION )

trunk/src/mame/drivers/tourtabl.c
r242944	r242945
20	20	: driver_device(mconfig, type, tag),
21	21	m_maincpu(*this, "maincpu") { }
22	22
23		required_device<cpu_device> m_maincpu;
24
25	23	DECLARE_WRITE8_MEMBER(tourtabl_led_w);
26	24	DECLARE_READ16_MEMBER(tourtabl_read_input_port);
27	25	DECLARE_READ8_MEMBER(tourtabl_get_databus_contents);
28	26	DECLARE_WRITE8_MEMBER(watchdog_w);
	27	required_device<cpu_device> m_maincpu;
29	28	};
30	29
31	30
r242944	r242945
202	201	ROM_END
203	202
204	203
205		GAME( 1978, tourtabl, 0, tourtabl, tourtabl, driver_device, 0, ROT0, "Atari", "Tournament Table (set 1)", GAME_SUPPORTS_SAVE )
206		GAME( 1978, tourtab2, tourtabl, tourtabl, tourtabl, driver_device, 0, ROT0, "Atari", "Tournament Table (set 2)", GAME_SUPPORTS_SAVE )
	204	GAME( 1978, tourtabl, 0, tourtabl, tourtabl, driver_device, 0, ROT0, "Atari", "Tournament Table (set 1)", 0 )
	205	GAME( 1978, tourtab2, tourtabl, tourtabl, tourtabl, driver_device, 0, ROT0, "Atari", "Tournament Table (set 2)", 0 )

trunk/src/mame/includes/stfight.h
r242944	r242945
10	10
11	11	stfight_state(const machine_config &mconfig, device_type type, const char *tag)
12	12	: driver_device(mconfig, type, tag),
	13	m_text_char_ram(*this, "text_char_ram"),
	14	m_text_attr_ram(*this, "text_attr_ram"),
	15	m_tx_vram(*this, "tx_vram"),
	16	m_vh_latch_ram(*this, "vh_latch_ram"),
	17	m_sprite_ram(*this, "sprite_ram"),
13	18	m_maincpu(*this, "maincpu"),
14	19	m_audiocpu(*this, "audiocpu"),
15	20	m_mcu(*this, "mcu"),
16	21	m_msm(*this, "msm"),
17	22	m_gfxdecode(*this, "gfxdecode"),
18		m_palette(*this, "palette"),
19		m_text_char_ram(*this, "text_char_ram"),
20		m_text_attr_ram(*this, "text_attr_ram"),
21		m_tx_vram(*this, "tx_vram"),
22		m_vh_latch_ram(*this, "vh_latch_ram"),
23		m_sprite_ram(*this, "sprite_ram") { }
	23	m_palette(*this, "palette") { }
24	24
	25	optional_shared_ptr<UINT8> m_text_char_ram;
	26	optional_shared_ptr<UINT8> m_text_attr_ram;
	27	optional_shared_ptr<UINT8> m_tx_vram;
	28	required_shared_ptr<UINT8> m_vh_latch_ram;
	29	required_shared_ptr<UINT8> m_sprite_ram;
25	30	required_device<cpu_device> m_maincpu;
26	31	required_device<cpu_device> m_audiocpu;
27	32	required_device<cpu_device> m_mcu;
28	33	required_device<msm5205_device> m_msm;
29	34	required_device<gfxdecode_device> m_gfxdecode;
30	35	required_device<palette_device> m_palette;
31
32		optional_shared_ptr<UINT8> m_text_char_ram;
33		optional_shared_ptr<UINT8> m_text_attr_ram;
34		optional_shared_ptr<UINT8> m_tx_vram;
35		required_shared_ptr<UINT8> m_vh_latch_ram;
36		required_shared_ptr<UINT8> m_sprite_ram;
37	36
38	37	UINT8 *m_decrypt;
39	38	UINT8 m_fm_data;
r242944	r242945
80	79
81	80	DECLARE_VIDEO_START(stfight);
82	81	DECLARE_VIDEO_START(cshooter);
83		virtual void machine_start();
84	82	virtual void machine_reset();
85	83	DECLARE_PALETTE_INIT(stfight);
86	84	UINT32 screen_update_stfight(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
r242944	r242945
108	106	UINT8 m_portB_out, m_portB_in;
109	107	UINT8 m_portC_out, m_portC_in;
110	108	UINT8 m_ddrA, m_ddrB, m_ddrC;
	109	UINT8 m_from_main, m_main_sent;
111	110
112	111	protected:
113	112	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);

trunk/src/mame/includes/stlforce.h
r242944	r242945
6	6	public:
7	7	stlforce_state(const machine_config &mconfig, device_type type, const char *tag)
8	8	: driver_device(mconfig, type, tag),
9		m_maincpu(*this, "maincpu"),
10		m_oki(*this, "oki"),
11		m_eeprom(*this, "eeprom"),
12		m_gfxdecode(*this, "gfxdecode"),
13		m_palette(*this, "palette"),
14	9	m_bg_videoram(*this, "bg_videoram"),
15	10	m_mlow_videoram(*this, "mlow_videoram"),
16	11	m_mhigh_videoram(*this, "mhigh_videoram"),
r242944	r242945
19	14	m_mlow_scrollram(*this, "mlow_scrollram"),
20	15	m_mhigh_scrollram(*this, "mhigh_scrollram"),
21	16	m_vidattrram(*this, "vidattrram"),
22		m_spriteram(*this, "spriteram") { }
	17	m_spriteram(*this, "spriteram"),
	18	m_maincpu(*this, "maincpu"),
	19	m_oki(*this, "oki"),
	20	m_eeprom(*this, "eeprom"),
	21	m_gfxdecode(*this, "gfxdecode"),
	22	m_palette(*this, "palette") { }
23	23
24		required_device<cpu_device> m_maincpu;
25		required_device<okim6295_device> m_oki;
26		required_device<eeprom_serial_93cxx_device> m_eeprom;
27		required_device<gfxdecode_device> m_gfxdecode;
28		required_device<palette_device> m_palette;
	24	tilemap_t *m_bg_tilemap;
	25	tilemap_t *m_mlow_tilemap;
	26	tilemap_t *m_mhigh_tilemap;
	27	tilemap_t *m_tx_tilemap;
29	28
30	29	required_shared_ptr<UINT16> m_bg_videoram;
31	30	required_shared_ptr<UINT16> m_mlow_videoram;
r242944	r242945
35	34	required_shared_ptr<UINT16> m_mlow_scrollram;
36	35	required_shared_ptr<UINT16> m_mhigh_scrollram;
37	36	required_shared_ptr<UINT16> m_vidattrram;
	37
38	38	required_shared_ptr<UINT16> m_spriteram;
39
40		tilemap_t *m_bg_tilemap;
41		tilemap_t *m_mlow_tilemap;
42		tilemap_t *m_mhigh_tilemap;
43		tilemap_t *m_tx_tilemap;
44	39
45	40	int m_sprxoffs;
46
47	41	DECLARE_WRITE16_MEMBER(stlforce_bg_videoram_w);
48	42	DECLARE_WRITE16_MEMBER(stlforce_mlow_videoram_w);
49	43	DECLARE_WRITE16_MEMBER(stlforce_mhigh_videoram_w);
50	44	DECLARE_WRITE16_MEMBER(stlforce_tx_videoram_w);
51	45	DECLARE_WRITE16_MEMBER(eeprom_w);
52	46	DECLARE_WRITE16_MEMBER(oki_bank_w);
53
54	47	DECLARE_DRIVER_INIT(twinbrat);
55	48	DECLARE_DRIVER_INIT(stlforce);
56
57	49	TILE_GET_INFO_MEMBER(get_stlforce_bg_tile_info);
58	50	TILE_GET_INFO_MEMBER(get_stlforce_mlow_tile_info);
59	51	TILE_GET_INFO_MEMBER(get_stlforce_mhigh_tile_info);
60	52	TILE_GET_INFO_MEMBER(get_stlforce_tx_tile_info);
61
62	53	virtual void video_start();
63	54	UINT32 screen_update_stlforce(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
64	55	void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect );
	56	required_device<cpu_device> m_maincpu;
	57	required_device<okim6295_device> m_oki;
	58	required_device<eeprom_serial_93cxx_device> m_eeprom;
	59	required_device<gfxdecode_device> m_gfxdecode;
	60	required_device<palette_device> m_palette;
65	61	};

trunk/src/mame/includes/strnskil.h
r242944	r242945
5	5	: driver_device(mconfig, type, tag),
6	6	m_maincpu(*this,"maincpu"),
7	7	m_subcpu(*this,"sub"),
8		m_gfxdecode(*this, "gfxdecode"),
9		m_palette(*this, "palette"),
10	8	m_videoram(*this, "videoram"),
11	9	m_xscroll(*this, "xscroll"),
12		m_spriteram(*this, "spriteram") { }
	10	m_spriteram(*this, "spriteram"),
	11	m_gfxdecode(*this, "gfxdecode"),
	12	m_palette(*this, "palette") { }
13	13
14	14	required_device<cpu_device> m_maincpu;
15	15	required_device<cpu_device> m_subcpu;
16		required_device<gfxdecode_device> m_gfxdecode;
17		required_device<palette_device> m_palette;
18
19	16	required_shared_ptr<UINT8> m_videoram;
20	17	required_shared_ptr<UINT8> m_xscroll;
21	18	required_shared_ptr<UINT8> m_spriteram;
	19	required_device<gfxdecode_device> m_gfxdecode;
	20	required_device<palette_device> m_palette;
22	21
23	22	UINT8 m_scrl_ctrl;
24	23	tilemap_t *m_bg_tilemap;
25	24	UINT8 m_irq_source;
26
27		TIMER_DEVICE_CALLBACK_MEMBER(strnskil_irq);
28	25
29	26	DECLARE_READ8_MEMBER(strnskil_d800_r);
30	27	DECLARE_READ8_MEMBER(pettanp_protection_r);
r242944	r242945
32	29	DECLARE_WRITE8_MEMBER(protection_w);
33	30	DECLARE_WRITE8_MEMBER(strnskil_videoram_w);
34	31	DECLARE_WRITE8_MEMBER(strnskil_scrl_ctrl_w);
35
36	32	DECLARE_DRIVER_INIT(banbam);
37	33	DECLARE_DRIVER_INIT(pettanp);
38
39	34	TILE_GET_INFO_MEMBER(get_bg_tile_info);
40
41		virtual void machine_start();
42	35	virtual void video_start();
43	36	DECLARE_PALETTE_INIT(strnskil);
44	37	UINT32 screen_update_strnskil(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
	38	TIMER_DEVICE_CALLBACK_MEMBER(strnskil_irq);
45	39	void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect);
46	40	};

trunk/src/mame/machine/stfight.c
r242944	r242945
1	1	/***************************************************************************
2	2
3		~~stfig~~ht.c
	3	machine.c
4	4
5	5	Functions to emulate general aspects of the machine (RAM, ROM, interrupts,
6	6	I/O ports)
r242944	r242945
63	63	( ( ( src ^ A ) >> 1 ) & 0x08 ) \|
64	64	( ~( ( src >> 6 ) ^ A ) & 0x01 );
65	65	}
66
67	66	}
68	67
69	68	DRIVER_INIT_MEMBER(stfight_state,stfight)
r242944	r242945
75	74	{
76	75	}
77	76
78		void stfight_state::machine_start()
79		{
80		save_item(NAME(m_fm_data));
81		save_item(NAME(m_cpu_to_mcu_data));
82		save_item(NAME(m_cpu_to_mcu_empty));
83		save_item(NAME(m_adpcm_data_offs));
84		save_item(NAME(m_adpcm_nibble));
85		save_item(NAME(m_adpcm_reset));
86		save_item(NAME(m_coin_state));
87		save_item(NAME(m_sprite_base));
88		save_item(NAME(m_portA_out));
89		save_item(NAME(m_portA_in));
90		save_item(NAME(m_portB_out));
91		save_item(NAME(m_portB_in));
92		save_item(NAME(m_portC_out));
93		save_item(NAME(m_portC_in));
94		save_item(NAME(m_ddrA));
95		save_item(NAME(m_ddrB));
96		save_item(NAME(m_ddrC));
97		}
98
99	77	void stfight_state::machine_reset()
100	78	{
101	79	m_fm_data = 0;

trunk/src/mame/mame.lst
r242944	r242945
11054	11054	pepp0014 // (c) 1987 IGT - International Game Technology
11055	11055	pepp0014a // (c) 1987 IGT - International Game Technology
11056	11056	pepp0023 // (c) 1987 IGT - International Game Technology
11057		pepp0038 // (c) 1987 IGT - International Game Technology
11058	11057	pepp0040 // (c) 1987 IGT - International Game Technology
11059	11058	pepp0040a // (c) 1987 IGT - International Game Technology
11060	11059	pepp0041 // (c) 1987 IGT - International Game Technology
r242944	r242945
11084	11083	pepp0083 // (c) 1987 IGT - International Game Technology
11085	11084	pepp0103 // (c) 1987 IGT - International Game Technology
11086	11085	pepp0116 // (c) 1987 IGT - International Game Technology
11087		pepp0116a // (c) 1987 IGT - International Game Technology
11088	11086	pepp0118 // (c) 1987 IGT - International Game Technology
11089	11087	pepp0120 // (c) 1987 IGT - International Game Technology
11090	11088	pepp0125 // (c) 1987 IGT - International Game Technology

trunk/src/mame/video/strnskil.c
r242944	r242945
41	41
42	42	WRITE8_MEMBER(strnskil_state::strnskil_videoram_w)
43	43	{
44		m_videoram[offset] = data;
	44	UINT8 *videoram = m_videoram;
	45	videoram[offset] = data;
45	46	m_bg_tilemap->mark_tile_dirty(offset / 2);
46	47	}
47	48
r242944	r242945
58	59
59	60	TILE_GET_INFO_MEMBER(strnskil_state::get_bg_tile_info)
60	61	{
61		int attr = m_videoram[tile_index * 2];
62		int code = m_videoram[(tile_index * 2) + 1] + ((attr & 0x60) << 3);
	62	UINT8 *videoram = m_videoram;
	63	int attr = videoram[tile_index * 2];
	64	int code = videoram[(tile_index * 2) + 1] + ((attr & 0x60) << 3);
63	65	int color = (attr & 0x1f) \| ((attr & 0x80) >> 2);
64	66
65	67	SET_TILE_INFO_MEMBER(0, code, color, 0);
r242944	r242945
75	77
76	78	void strnskil_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect)
77	79	{
	80	UINT8 *spriteram = m_spriteram;
78	81	int offs;
79	82
80	83	for (offs = 0x60; offs < 0x100; offs += 4)
81	84	{
82		int code = m_spriteram[offs + 1];
83		int color = m_spriteram[offs + 2] & 0x3f;
	85	int code = spriteram[offs + 1];
	86	int color = spriteram[offs + 2] & 0x3f;
84	87	int flipx = flip_screen_x();
85	88	int flipy = flip_screen_y();
86	89
87		int sx = m_spriteram[offs + 3];
88		int sy = m_spriteram[offs];
	90	int sx = spriteram[offs + 3];
	91	int sy = spriteram[offs];
89	92	int px, py;
90	93
91	94	if (flip_screen())
r242944	r242945
115	118
116	119	UINT32 strnskil_state::screen_update_strnskil(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
117	120	{
	121	int row;
118	122	const UINT8 *usr1 = memregion("user1")->base();
119	123
120		for (~~int~~ row = 0; row < 32; row++)
	124	for (row = 0; row < 32; row++)
121	125	{
122	126	if (m_scrl_ctrl != 0x07)
123	127	{

trunk/src/mame/video/tia.c
r242944	r242945
430	430	helper[0] = auto_bitmap_ind16_alloc(machine(), cx, TIA_MAX_SCREEN_HEIGHT);
431	431	helper[1] = auto_bitmap_ind16_alloc(machine(), cx, TIA_MAX_SCREEN_HEIGHT);
432	432	helper[2] = auto_bitmap_ind16_alloc(machine(), cx, TIA_MAX_SCREEN_HEIGHT);
433
434		register_save_state();
435	433	}
436	434
437	435
r242944	r242945
667	665
668	666	int tia_video_device::current_x()
669	667	{
670		return 3 * ((machine().~~dev~~ic~~e<c~~pu~~_device>("maincpu")~~->total_cycles() - frame_cycles) % 76) - 68;
	668	return 3 * ((machine().firstcpu->total_cycles() - frame_cycles) % 76) - 68;
671	669	}
672	670
673	671
674	672	int tia_video_device::current_y()
675	673	{
676		return (machine().~~dev~~ic~~e<c~~pu~~_device>("maincpu")~~->total_cycles() - frame_cycles) / 76;
	674	return (machine().firstcpu->total_cycles() - frame_cycles) / 76;
677	675	}
678	676
679	677
r242944	r242945
1012	1010
1013	1011	WRITE8_MEMBER( tia_video_device::WSYNC_w )
1014	1012	{
1015		int cycles = machine().~~dev~~ic~~e<c~~pu~~_device>("maincpu")~~->total_cycles() - frame_cycles;
	1013	int cycles = machine().firstcpu->total_cycles() - frame_cycles;
1016	1014
1017	1015	if (cycles % 76)
1018	1016	{
r242944	r242945
1053	1051	{
1054	1052	if (data & 0x80)
1055	1053	{
1056		paddle_start = machine().~~dev~~ic~~e<c~~pu~~_device>("maincpu")~~->total_cycles();
	1054	paddle_start = machine().firstcpu->total_cycles();
1057	1055	}
1058	1056	if ( ! ( VBLANK & 0x40 ) ) {
1059	1057	INPT4 = 0x80;
r242944	r242945
1806	1804
1807	1805	READ8_MEMBER( tia_video_device::INPT_r )
1808	1806	{
1809		UINT64 elapsed = machine().~~dev~~ic~~e<c~~pu~~_device>("maincpu")~~->total_cycles() - paddle_start;
	1807	UINT64 elapsed = machine().firstcpu->total_cycles() - paddle_start;
1810	1808	UINT16 input = TIA_INPUT_PORT_ALWAYS_ON;
1811	1809	if ( !m_read_input_port_cb.isnull() )
1812	1810	{
r242944	r242945
2179	2177	COLUBK = 0;
2180	2178	COLUPF = 0;
2181	2179	}
2182
2183
2184		void tia_video_device::register_save_state()
2185		{
2186		save_item(NAME(p0gfx.start_pixel));
2187		save_item(NAME(p0gfx.start_drawing));
2188		save_item(NAME(p0gfx.size));
2189		save_item(NAME(p0gfx.skipclip));
2190		save_item(NAME(p1gfx.start_pixel));
2191		save_item(NAME(p1gfx.start_drawing));
2192		save_item(NAME(p1gfx.size));
2193		save_item(NAME(p1gfx.skipclip));
2194		save_item(NAME(frame_cycles));
2195		save_item(NAME(paddle_start));
2196		save_item(NAME(horzP0));
2197		save_item(NAME(horzP1));
2198		save_item(NAME(horzM0));
2199		save_item(NAME(horzM1));
2200		save_item(NAME(horzBL));
2201		save_item(NAME(motclkP0));
2202		save_item(NAME(motclkP1));
2203		save_item(NAME(motclkM0));
2204		save_item(NAME(motclkM1));
2205		save_item(NAME(motclkBL));
2206		save_item(NAME(startP0));
2207		save_item(NAME(startP1));
2208		save_item(NAME(startM0));
2209		save_item(NAME(startM1));
2210		save_item(NAME(skipclipP0));
2211		save_item(NAME(skipclipP1));
2212		save_item(NAME(skipM0delay));
2213		save_item(NAME(skipM1delay));
2214		save_item(NAME(current_bitmap));
2215		save_item(NAME(prev_x));
2216		save_item(NAME(prev_y));
2217		save_item(NAME(VSYNC));
2218		save_item(NAME(VBLANK));
2219		save_item(NAME(COLUP0));
2220		save_item(NAME(COLUP1));
2221		save_item(NAME(COLUBK));
2222		save_item(NAME(COLUPF));
2223		save_item(NAME(CTRLPF));
2224		save_item(NAME(GRP0));
2225		save_item(NAME(GRP1));
2226		save_item(NAME(REFP0));
2227		save_item(NAME(REFP1));
2228		save_item(NAME(HMP0));
2229		save_item(NAME(HMP1));
2230		save_item(NAME(HMM0));
2231		save_item(NAME(HMM1));
2232		save_item(NAME(HMBL));
2233		save_item(NAME(VDELP0));
2234		save_item(NAME(VDELP1));
2235		save_item(NAME(VDELBL));
2236		save_item(NAME(NUSIZ0));
2237		save_item(NAME(NUSIZ1));
2238		save_item(NAME(ENAM0));
2239		save_item(NAME(ENAM1));
2240		save_item(NAME(ENABL));
2241		save_item(NAME(CXM0P));
2242		save_item(NAME(CXM1P));
2243		save_item(NAME(CXP0FB));
2244		save_item(NAME(CXP1FB));
2245		save_item(NAME(CXM0FB));
2246		save_item(NAME(CXM1FB));
2247		save_item(NAME(CXBLPF));
2248		save_item(NAME(CXPPMM));
2249		save_item(NAME(RESMP0));
2250		save_item(NAME(RESMP1));
2251		save_item(NAME(PF0));
2252		save_item(NAME(PF1));
2253		save_item(NAME(PF2));
2254		save_item(NAME(INPT4));
2255		save_item(NAME(INPT5));
2256		save_item(NAME(prevGRP0));
2257		save_item(NAME(prevGRP1));
2258		save_item(NAME(prevENABL));
2259		save_item(NAME(HMOVE_started));
2260		save_item(NAME(HMOVE_started_previous));
2261		save_item(NAME(HMP0_latch));
2262		save_item(NAME(HMP1_latch));
2263		save_item(NAME(HMM0_latch));
2264		save_item(NAME(HMM1_latch));
2265		save_item(NAME(HMBL_latch));
2266		save_item(NAME(REFLECT));
2267		save_item(NAME(NUSIZx_changed));
2268		}

trunk/src/mame/video/tia.h
r242944	r242945
199	199	bitmap_ind16 *helper[3];
200	200
201	201	UINT16 screen_height;
202
203		void register_save_state();
204	202	};
205	203
206	204	class tia_pal_video_device : public tia_video_device

trunk/src/mess/drivers/a2600.c
r242944	r242945
209	209	if ( supported_screen_heights[i] != m_current_screen_height )
210	210	{
211	211	m_current_screen_height = supported_screen_heights[i];
212		// m_screen->configure(228, m_current_screen_height, &visarea[i], HZ_TO_ATTOSECONDS( MASTER_CLOCK_NTSC ) * 228 * m_current_screen_height );
	212	// machine.first_screen()->configure(228, m_current_screen_height, &visarea[i], HZ_TO_ATTOSECONDS( MASTER_CLOCK_NTSC ) * 228 * m_current_screen_height );
213	213	}
214	214	}
215	215	}
r242944	r242945
226	226	if ( supported_screen_heights[i] != m_current_screen_height )
227	227	{
228	228	m_current_screen_height = supported_screen_heights[i];
229		// m_screen->configure(228, m_current_screen_height, &visarea[i], HZ_TO_ATTOSECONDS( MASTER_CLOCK_PAL ) * 228 * m_current_screen_height );
	229	// machine.first_screen()->configure(228, m_current_screen_height, &visarea[i], HZ_TO_ATTOSECONDS( MASTER_CLOCK_PAL ) * 228 * m_current_screen_height );
230	230	}
231	231	}
232	232	}
r242944	r242945
316	316
317	317	/* Banks may have changed, reset the cpu so it uses the correct reset vector */
318	318	m_maincpu->reset();
319
320		save_item(NAME(m_current_screen_height));
321	319	}
322	320
323	321
r242944	r242945
543	541	#define rom_a2600p rom_a2600
544	542
545	543	/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME */
546		CONS( 1977, a2600, 0, 0, a2600, a2600, driver_device, 0, "Atari", "Atari 2600 (NTSC)" , GAME_SUPPORTS_SAVE )
547		CONS( 1978, a2600p, a2600, 0, a2600p, a2600, driver_device, 0, "Atari", "Atari 2600 (PAL)", GAME_SUPPORTS_SAVE )
	544	CONS( 1977, a2600, 0, 0, a2600, a2600, driver_device, 0, "Atari", "Atari 2600 (NTSC)" , 0)
	545	CONS( 1978, a2600p, a2600, 0, a2600p, a2600, driver_device, 0, "Atari", "Atari 2600 (PAL)", 0)

trunk/src/mess/drivers/apple3.c
r242944	r242945
102	102	MCFG_FLOPPY_DRIVE_ADD("2", a3_floppies, "525", apple3_state::floppy_formats)
103	103	MCFG_FLOPPY_DRIVE_ADD("3", a3_floppies, "525", apple3_state::floppy_formats)
104	104
105		/* softlist for fdc */
106		MCFG_SOFTWARE_LIST_ADD("flop525_list","apple3")
107
108	105	/* acia */
109	106	MCFG_DEVICE_ADD("acia", MOS6551, 0)
110	107	MCFG_MOS6551_XTAL(XTAL_1_8432MHz) // HACK: The schematic shows an external clock generator but using a XTAL is faster to emulate.

trunk/src/mess/drivers/comp4.c
r242944	r242945
141	141	static INPUT_PORTS_START( comp4 )
142	142	PORT_START("IN.0") // O1
143	143	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_R) PORT_CODE(KEYCODE_DEL) PORT_CODE(KEYCODE_DEL_PAD) PORT_NAME("R")
144		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1) PORT_CODE(KEYCODE_1_PAD) PORT_NAME("1")
145		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4) PORT_CODE(KEYCODE_4_PAD) PORT_NAME("4")
	144	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4) PORT_CODE(KEYCODE_1_PAD) PORT_NAME("1")
	145	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1) PORT_CODE(KEYCODE_4_PAD) PORT_NAME("4")
146	146	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7) PORT_CODE(KEYCODE_7_PAD) PORT_NAME("7")
147	147
148	148	PORT_START("IN.1") // O2
149	149	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_0) PORT_CODE(KEYCODE_0_PAD) PORT_NAME("0")
150		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2) PORT_CODE(KEYCODE_2_PAD) PORT_NAME("2")
151		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_5) PORT_CODE(KEYCODE_5_PAD) PORT_NAME("5")
	150	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_5) PORT_CODE(KEYCODE_2_PAD) PORT_NAME("2")
	151	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2) PORT_CODE(KEYCODE_5_PAD) PORT_NAME("5")
152	152	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_8) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("8")
153	153
154	154	PORT_START("IN.2") // O3
155	155	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_E) PORT_CODE(KEYCODE_ENTER) PORT_CODE(KEYCODE_ENTER_PAD) PORT_NAME("E")
156		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3) PORT_CODE(KEYCODE_3_PAD) PORT_NAME("3")
157		PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6) PORT_CODE(KEYCODE_6_PAD) PORT_NAME("6")
	156	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6) PORT_CODE(KEYCODE_3_PAD) PORT_NAME("3")
	157	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3) PORT_CODE(KEYCODE_6_PAD) PORT_NAME("6")
158	158	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_9) PORT_CODE(KEYCODE_9_PAD) PORT_NAME("9")
159	159	INPUT_PORTS_END
160	160

trunk/src/mess/drivers/elecdet.c
r242944	r242945
7	7	hardware (and concept) is very similar to Parker Bros Stop Thief
8	8
9	9	This is an electronic board game. It requires game cards with suspect info,
10		and good old pen and paper to record game progress. To start the game, enter
11		difficulty(1-3), then number of players(1-4), then [ENTER]. Refer to the
12		manual for more information.
	10	and good old pen and paper to record game progress. Refer to the manual
	11	on how to play it.
13	12
14	13
15	14	TODO:
r242944	r242945
297	296
298	297	ROM_START( elecdet )
299	298	ROM_REGION( 0x1000, "maincpu", 0 )
300		ROM_LOAD( "tms0980nll_mp6100a", 0x0000, 0x1000, CRC(~~816~~0a~~081~~) SHA1(~~14cbfc0529~~ad8~~3a58e0~~dc15fe8~~ba5~~94947e49f08) )
	299	ROM_LOAD( "tms0980nll_mp6100a", 0x0000, 0x1000, CRC(f33f02ae) SHA1(a978d9cc1ba7897f6e8997715da265eb8c4a0c34) )
301	300
302	301	ROM_REGION( 1246, "maincpu:ipla", 0 )
303	302	ROM_LOAD( "tms0980_default_ipla.pla", 0, 1246, CRC(42db9a38) SHA1(2d127d98028ec8ec6ea10c179c25e447b14ba4d0) )

trunk/src/mess/drivers/fmtowns.c
r242944	r242945
15	15	1024 sprites (16x16), rendered direct to VRAM
16	16	16 colour text mode, rendered direct to VRAM
17	17
18		Later models add an unknown single channel 16-bit PCM/ADPCM (FreshTV, SJ, MX), and CL-GD543x Windows accelerator chipsets (SJ)
19	18
20
21	19	Fujitsu FM-Towns Marty
22	20
23	21	Japanese console, based on the FM-Towns computer, using an AMD 80386SX CPU,

trunk/src/mess/drivers/ngen.c
r242944	r242945
83	83	m_dmac(*this,"dmac"),
84	84	m_pic(*this,"pic"),
85	85	m_pit(*this,"pit"),
86		m_disk_rom(*this,"disk"),
87	86	m_vram(*this,"vram"),
88	87	m_fontram(*this,"fontram"),
89	88	m_fdc(*this,"fdc"),
90		m_fd0(*this,"fdc:0"),
91		m_fdc_timer(*this,"fdc_timer"),
92		m_hdc_timer(*this,"hdc_timer")
	89	m_fd0(*this,"fdc:0")
93	90	{}
94	91
95	92	DECLARE_WRITE_LINE_MEMBER(pit_out0_w);
r242944	r242945
100	97	DECLARE_WRITE16_MEMBER(cpu_peripheral_cb);
101	98	DECLARE_WRITE16_MEMBER(peripheral_w);
102	99	DECLARE_READ16_MEMBER(peripheral_r);
103		DECLARE_WRITE16_MEMBER(xbus_w);
104		DECLARE_READ16_MEMBER(xbus_r);
	100	DECLARE_WRITE16_MEMBER(port00_w);
	101	DECLARE_READ16_MEMBER(port00_r);
105	102	DECLARE_WRITE_LINE_MEMBER(dma_hrq_changed);
106	103	DECLARE_WRITE_LINE_MEMBER(dma_eop_changed);
107	104	DECLARE_WRITE_LINE_MEMBER(dack0_w);
r242944	r242945
115	112	DECLARE_READ8_MEMBER( dma_0_dack_r ) { UINT16 ret = 0xffff; m_dma_high_byte = ret & 0xff00; return ret; }
116	113	DECLARE_READ8_MEMBER( dma_1_dack_r ) { UINT16 ret = 0xffff; m_dma_high_byte = ret & 0xff00; return ret; }
117	114	DECLARE_READ8_MEMBER( dma_2_dack_r ) { UINT16 ret = 0xffff; m_dma_high_byte = ret & 0xff00; return ret; }
118		DECLARE_READ8_MEMBER( dma_3_dack_r );
119		DECLARE_WRITE8_MEMBER( dma_0_dack_w ){ popmessage("IOW0: data %02x",data); }
	115	DECLARE_READ8_MEMBER( dma_3_dack_r ) { UINT16 ret = 0xffff; m_dma_high_byte = ret & 0xff00; return ret; }
	116	DECLARE_WRITE8_MEMBER( dma_0_dack_w ){ popmessage("IOW: data %02x",data); }
120	117	DECLARE_WRITE8_MEMBER( dma_1_dack_w ){ }
121	118	DECLARE_WRITE8_MEMBER( dma_2_dack_w ){ }
122		DECLARE_WRITE8_MEMBER( dma_3_dack_w ){ popmessage("IOW3: data %02x",data); }
123
124		DECLARE_WRITE16_MEMBER(hfd_w);
125		DECLARE_READ16_MEMBER(fhd_r);
	119	DECLARE_WRITE8_MEMBER( dma_3_dack_w ){ }
126	120	DECLARE_WRITE_LINE_MEMBER(fdc_irq_w);
127	121	DECLARE_WRITE_LINE_MEMBER(fdc_drq_w);
128	122	DECLARE_WRITE8_MEMBER(fdc_control_w);
129	123	DECLARE_READ8_MEMBER(irq_cb);
130		DECLARE_WRITE8_MEMBER(hdc_control_w);
131		DECLARE_WRITE8_MEMBER(disk_addr_ext);
132	124
133	125	protected:
134	126	virtual void machine_reset();
r242944	r242945
141	133	required_device<am9517a_device> m_dmac;
142	134	required_device<pic8259_device> m_pic;
143	135	required_device<pit8254_device> m_pit;
144		optional_memory_region m_disk_rom;
145	136	optional_shared_ptr<UINT16> m_vram;
146	137	optional_shared_ptr<UINT16> m_fontram;
147	138	optional_device<wd2797_t> m_fdc;
148	139	optional_device<floppy_connector> m_fd0;
149		optional_device<pit8253_device> m_fdc_timer;
150		optional_device<pit8253_device> m_hdc_timer;
151	140
152	141	void set_dma_channel(int channel, int state);
153	142
154		UINT8 m_xbus_current; // currently selected X-Bus module
155	143	UINT16 m_peripheral;
156	144	UINT16 m_upper;
157	145	UINT16 m_middle;
r242944	r242945
161	149	INT8 m_dma_channel;
162	150	UINT16 m_dma_high_byte;
163	151	UINT16 m_control;
164		UINT16 m_disk_rom_ptr;
165		UINT8 m_hdc_control;
166		UINT8 m_disk_page;
167	152	};
168	153
169	154	class ngen386_state : public driver_device
r242944	r242945
264	249	case 0x0f:
265	250	if(mem_mask & 0x00ff)
266	251	m_dmac->write(space,offset,data & 0xff);
267		logerror("(PC=%06x) DMA write offset %04x data %04x mask %04x\n",m_maincpu->device_t::safe_pc(),offset,data,mem_mask);
	252	//logerror("(PC=%06x) DMA write offset %04x data %04x mask %04x\n",m_maincpu->device_t::safe_pc(),offset,data,mem_mask);
268	253	break;
269	254	case 0x80: // DMA page offset?
270	255	case 0x81:
r242944	r242945
273	258	if(mem_mask & 0x00ff)
274	259	m_dma_offset[offset-0x80] = data & 0xff;
275	260	break;
276		case 0xc0: // X-Bus modules reset
277		m_xbus_current = 0;
278		break;
279	261	case 0x10c:
280	262	if(mem_mask & 0x00ff)
281	263	m_pic->write(space,0,data & 0xff);
r242944	r242945
397	379
398	380	// X-bus module select
399	381	// The bootstrap ROM creates a table at 0:FC9h, with a count, followed by the module IDs of each
400		// expansion module. The base I/O address for the currently selected module is set by writing to
401		// this register (bits 0-7 are ignored)
402		// TODO: make expansion modules slot devices
403		WRITE16_MEMBER(ngen_state::xbus_w)
	382	// expansion module. The base I/O address for each module is 0x100*module number.
	383	// Module 0 is the main processor module, module 1 is the next module attached, and so on.
	384	WRITE16_MEMBER(ngen_state::port00_w)
404	385	{
405		UINT16 addr = (data & 0x00ff) << 8;
406		address_space& io = m_maincpu->device_t::memory().space(AS_IO);
407		switch(m_xbus_current)
408		{
409		case 0x00: // Floppy/Hard disk module
410		io.install_readwrite_handler(addr,addr+0xff,0,0,read16_delegate(FUNC(ngen_state::fhd_r),this),write16_delegate(FUNC(ngen_state::hfd_w),this));
411		break;
412		default:
413		m_maincpu->set_input_line(INPUT_LINE_NMI,PULSE_LINE); // reached end of the modules
414		break;
415		}
416		if(addr != 0)
417		logerror("SYS: X-Bus module %i address set %04x\n",m_xbus_current+1,addr);
418		m_xbus_current++;
	386	m_port00 = data;
	387	logerror("SYS: X-Bus module select %04x\n",data);
419	388	}
420	389
421		// returns X-bus module ID and info in the low byte (can indicate if the device is bootable, has a boot ROM (needs to be written to RAM via DMA), or if it supports a non-80186 CPU)
422		// bit 6, I think, indicates a bootable device
423		// Known module IDs:
424		// 0x1070 - Floppy/Hard disk module
425		// 0x3141 - QIC Tape module
426		READ16_MEMBER(ngen_state::xbus_r)
	390	// returns X-bus module ID (what is the low byte for?)
	391	// For now, we'll hard code a floppy disk module (or try to)
	392	READ16_MEMBER(ngen_state::port00_r)
427	393	{
428		UINT16 ret = 0xffff;
429
430		switch(m_xbus_current)
431		{
432		case 0x00:
433		ret = 0x1070; // Floppy/Hard disk module
434		break;
435		default:
436		m_maincpu->set_input_line(INPUT_LINE_NMI,PULSE_LINE); // reached the end of the modules
437		ret = 0x0080;
438		break;
439		}
440		return ret;
	394	if(m_port00 > 0)
	395	m_maincpu->set_input_line(INPUT_LINE_NMI,PULSE_LINE);
	396	if(m_port00 == 0)
	397	return 0x0040; // module ID of 0x40 = dual floppy disk module (need hardware manual to find other module IDs)
	398	else
	399	return 0x0080; // invalid device?
441	400	}
442	401
443
444		// Floppy/Hard disk module
445		WRITE16_MEMBER(ngen_state::hfd_w)
446		{
447		switch(offset)
448		{
449		case 0x00:
450		case 0x01:
451		case 0x02:
452		case 0x03:
453		if(mem_mask & 0x00ff)
454		m_fdc->write(space,offset,data & 0xff);
455		break;
456		case 0x04:
457		if(mem_mask & 0x00ff)
458		fdc_control_w(space,offset,data & 0xff);
459		break;
460		case 0x05:
461		if(mem_mask & 0x00ff)
462		hdc_control_w(space,offset,data & 0xff);
463		break;
464		case 0x07:
465		if(mem_mask & 0x00ff)
466		disk_addr_ext(space,offset,data & 0xff);
467		break;
468		case 0x08:
469		case 0x09:
470		case 0x0a:
471		case 0x0b:
472		if(mem_mask & 0x00ff)
473		m_fdc_timer->write(space,offset,data & 0xff);
474		break;
475		case 0x10:
476		case 0x11:
477		case 0x12:
478		case 0x13:
479		case 0x14:
480		case 0x15:
481		case 0x16:
482		case 0x17:
483		logerror("WD1010 register %i write %02x mask %04x\n",offset-0x10,data & 0xff,mem_mask);
484		break;
485		case 0x18:
486		case 0x19:
487		case 0x1a:
488		case 0x1b:
489		if(mem_mask & 0x00ff)
490		m_hdc_timer->write(space,offset,data & 0xff);
491		break;
492		}
493		}
494
495		READ16_MEMBER(ngen_state::fhd_r)
496		{
497		UINT16 ret = 0xffff;
498
499		switch(offset)
500		{
501		case 0x00:
502		case 0x01:
503		case 0x02:
504		case 0x03:
505		if(mem_mask & 0x00ff)
506		ret = m_fdc->read(space,offset);
507		break;
508		case 0x08:
509		case 0x09:
510		case 0x0a:
511		case 0x0b:
512		if(mem_mask & 0x00ff)
513		ret = m_fdc_timer->read(space,offset);
514		break;
515		case 0x10:
516		case 0x11:
517		case 0x12:
518		case 0x13:
519		case 0x14:
520		case 0x15:
521		case 0x16:
522		case 0x17:
523		logerror("WD1010 register %i read, mask %04x\n",offset-0x10,mem_mask);
524		break;
525		case 0x18:
526		case 0x19:
527		case 0x1a:
528		case 0x1b:
529		if(mem_mask & 0x00ff)
530		ret = m_hdc_timer->read(space,offset);
531		break;
532		}
533
534		return ret;
535		}
536
537	402	WRITE_LINE_MEMBER(ngen_state::fdc_irq_w)
538	403	{
539	404	m_pic->ir7_w(state);
r242944	r242945
544	409	m_dmac->dreq3_w(state);
545	410	}
546	411
547		// Floppy disk control register
548		// Bit 0 - enable drive and LED
549		// Bit 2 - floppy motor
550		// Bit 5 - side select
551		// Bit 6 - 1 = 2Mhz for seek, 0 = 1MHz for read/write
552		// Bit 7 - FDC reset
553	412	WRITE8_MEMBER(ngen_state::fdc_control_w)
554	413	{
555	414	m_fdc->set_floppy(m_fd0->get_device());
556		m_fd0->get_device()->mon_w(~data & 0x04);
557		m_fd0->get_device()->ss_w(data & 0x20);
558		if(~data & 0x80)
559		m_fdc->soft_reset();
	415	m_fd0->get_device()->mon_w((~data) & 0x80);
	416	m_fdc->dden_w(~data & 0x04);
560	417	}
561	418
562		// Hard disk control register
563		// bit 0 - Drive select 0 - selects module hard disk
564		// bit 1 - Drive select 1 - selects expansion module hard disk (if available)
565		// bit 2 - enable DMA transfer of module ROM contents to X-Bus master memory
566		// bits 3-5 - select head / expansion module head
567		// bit 6 - write enable, must be set to write to a hard disk
568		// bit 7 - HDC reset
569		WRITE8_MEMBER(ngen_state::hdc_control_w)
570		{
571		m_hdc_control = data;
572		if(m_hdc_control & 0x04)
573		{
574		m_disk_rom_ptr = 0;
575		popmessage("HDD: DMA ROM transfer start\n");
576		m_dmac->dreq3_w(1);
577		//m_dmac->dreq3_w(0);
578		}
579		}
580
581		// page of system RAM to access
582		// bit 7 = disables read/write signals to the WD1010
583		WRITE8_MEMBER(ngen_state::disk_addr_ext)
584		{
585		m_disk_page = data & 0x7f;
586		}
587
588	419	WRITE_LINE_MEMBER( ngen_state::dma_hrq_changed )
589	420	{
590	421	m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE);
r242944	r242945
599	430	else
600	431	m_control &= ~0x02;
601	432	}
602		if(m_dma_channel == 3)
603		{
604		if(state)
605		{
606		if(m_hdc_control & 0x04) // ROM transfer?
607		m_hdc_control &= ~0x04; // switch it off when done
608		}
609		}
610	433	}
611	434
612	435	void ngen_state::set_dma_channel(int channel, int state)
r242944	r242945
622	445	WRITE_LINE_MEMBER( ngen_state::dack2_w ) { set_dma_channel(2, state); }
623	446	WRITE_LINE_MEMBER( ngen_state::dack3_w ) { set_dma_channel(3, state); }
624	447
625		READ8_MEMBER(ngen_state::dma_3_dack_r)
626		{
627		UINT16 ret = 0xffff;
628
629		if((m_hdc_control & 0x04) && m_disk_rom)
630		{
631		ret = m_disk_rom->base()[m_disk_rom_ptr++] << 8;
632		printf("DMA3 DACK: returning %02x\n",ret);
633		if(m_disk_rom_ptr < 0x1000)
634		{
635		m_dmac->dreq3_w(1);
636		//m_dmac->dreq3_w(0);
637		}
638		}
639		m_dma_high_byte = ret & 0xff00;
640		return ret;
641		}
642
643	448	READ8_MEMBER(ngen_state::dma_read_word)
644	449	{
645	450	address_space& prog_space = m_maincpu->space(AS_PROGRAM); // get the right address space
r242944	r242945
693	498	{
694	499	m_port00 = 0;
695	500	m_control = 0;
696		m_xbus_current = 0;
697	501	m_viduart->write_dsr(0);
698	502	m_viduart->write_cts(0);
699	503	m_fd0->get_device()->set_rpm(300);
r242944	r242945
708	512	ADDRESS_MAP_END
709	513
710	514	static ADDRESS_MAP_START( ngen_io, AS_IO, 16, ngen_state )
711		AM_RANGE(0x0000, 0x0001) AM_READWRITE(xbus_r,xbus_w)
712
713		// Floppy/Hard disk module
714		// AM_RANGE(0x0100, 0x0107) AM_DEVREADWRITE8("fdc",wd2797_t,read,write,0x00ff) // a guess for now
715		// AM_RANGE(0x0108, 0x0109) AM_WRITE8(fdc_control_w,0x00ff)
716		// AM_RANGE(0x010a, 0x010b) AM_WRITE8(hdc_control_w,0x00ff)
717		// AM_RANGE(0x010e, 0x010f) AM_WRITE8(disk_addr_ext,0x00ff) // X-Bus extended address register
718		// AM_RANGE(0x0110, 0x0117) AM_DEVREADWRITE8("fdc_timer",pit8253_device,read,write,0x00ff)
719		// 0x0120-0x012f - WD1010 Winchester disk controller (unemulated)
720		// AM_RANGE(0x0130, 0x0137) AM_DEVREADWRITE8("hdc_timer",pit8253_device,read,write,0x00ff)
721
	515	AM_RANGE(0x0000, 0x0001) AM_READWRITE(port00_r,port00_w)
	516	AM_RANGE(0x0100, 0x0107) AM_DEVREADWRITE8("fdc",wd2797_t,read,write,0x00ff) // a guess for now
	517	AM_RANGE(0x0108, 0x0109) AM_WRITE8(fdc_control_w,0x00ff)
	518	AM_RANGE(0x0110, 0x0117) AM_DEVREADWRITE8("fdc_timer",pit8253_device,read,write,0x00ff)
722	519	ADDRESS_MAP_END
723	520
724	521	static ADDRESS_MAP_START( ngen386_mem, AS_PROGRAM, 32, ngen_state )
r242944	r242945
823	620
824	621	// keyboard UART (patent says i8251 is used for keyboard communications, it is located on the video board)
825	622	MCFG_DEVICE_ADD("videouart", I8251, 0) // main clock unknown, Rx/Tx clocks are 19.53kHz
826		// MCFG_I8251_TXEMPTY_HANDLER(DEVWRITELINE("pic",pic8259_device,ir4_w))
	623	MCFG_I8251_TXEMPTY_HANDLER(DEVWRITELINE("pic",pic8259_device,ir4_w))
827	624	MCFG_I8251_TXD_HANDLER(DEVWRITELINE("keyboard", rs232_port_device, write_txd))
828	625	MCFG_RS232_PORT_ADD("keyboard", keyboard, "ngen")
829	626	MCFG_RS232_RXD_HANDLER(DEVWRITELINE("videouart", i8251_device, write_rxd))
r242944	r242945
838	635	MCFG_WD_FDC_FORCE_READY
839	636	MCFG_DEVICE_ADD("fdc_timer", PIT8253, 0)
840	637	MCFG_PIT8253_CLK0(XTAL_20MHz / 20)
841		MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic",pic8259_device,ir7_w))
	638	MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic",pic8259_device,ir4_w))
842	639	MCFG_PIT8253_CLK1(XTAL_20MHz / 20)
843		MCFG_PIT8253_OUT1_HANDLER(DEVWRITELINE("pic",pic8259_device,ir7_w))
	640	MCFG_PIT8253_OUT1_HANDLER(DEVWRITELINE("pic",pic8259_device,ir4_w))
844	641	MCFG_PIT8253_CLK2(XTAL_20MHz / 20)
845		MCFG_PIT8253_OUT2_HANDLER(DEVWRITELINE("pic",pic8259_device,ir7_w))
	642	MCFG_PIT8253_OUT2_HANDLER(DEVWRITELINE("pic",pic8259_device,ir4_w))
846	643	// TODO: WD1010 HDC (not implemented)
847	644	MCFG_DEVICE_ADD("hdc_timer", PIT8253, 0)
848	645	MCFG_FLOPPY_DRIVE_ADD("fdc:0", ngen_floppies, "525qd", floppy_image_device::default_floppy_formats)

trunk/src/mess/machine/ngen_kb.c
r242944	r242945
12	12	void ngen_keyboard_device::write(UINT8 data)
13	13	{
14	14	// To be figured out
15		// Code 0x92 is sent on startup, perhaps resets the keyboard MCU
16		// Codes 0xAx and 0xBx appear to control the keyboard LEDs, lower nibbles controlling the state of the LEDs
17		// When setting an error code via the LEDs, 0xB0 then 0xAE is sent (presumably for error code 0xE0),
18		// so that means that 0xAx controls the Overtype, Lock, F1 and F2 LEDs, and 0xBx controls the F3, F8, F9 and F10 LEDs.
19	15	logerror("KB: received character %02x\n",data);
20	16	}
21	17

trunk/src/osd/osdmini/minimain.c
r242944	r242945
55	55
56	56
57	57	//============================================================
58		// mini_osd_options
59		//============================================================
60
61		mini_osd_options::mini_osd_options()
62		: osd_options()
63		{
64		//add_entries(s_option_entries);
65		}
66
67		//============================================================
68	58	// main
69	59	//============================================================
70	60
r242944	r242945
72	62	{
73	63	// cli_frontend does the heavy lifting; if we have osd-specific options, we
74	64	// create a derivative of cli_options and add our own
75		mini_osd_options options;
76		mini_osd_interface osd(options);
77		osd.register_options();
	65	cli_options options;
	66	mini_osd_interface osd;
	67	osd.register_options(options);
78	68	cli_frontend frontend(options, osd);
79	69	return frontend.execute(argc, argv);
80	70	}
r242944	r242945
84	74	// constructor
85	75	//============================================================
86	76
87		mini_osd_interface::mini_osd_interface(mini_osd_options &options)
88		: osd_common_t(options)
	77	mini_osd_interface::mini_osd_interface()
89	78	{
90	79	}
91	80
r242944	r242945
106	95	void mini_osd_interface::init(running_machine &machine)
107	96	{
108	97	// call our parent
109		osd_~~commo~~n_t::init(machine);
	98	osd_interface::init(machine);
110	99
111	100	// initialize the video system by allocating a rendering target
112	101	our_target = machine.render().target_alloc();

trunk/src/osd/osdmini/osdmini.h
r242944	r242945
8	8
9	9	#include "options.h"
10	10	#include "osdepend.h"
11		#include "modules/lib/osdobj_common.h"
12	11
13	12
14		class mini_osd_options : public osd_options
15		{
16		public:
17		// construction/destruction
18		mini_osd_options();
19
20		};
21
22	13	//============================================================
23	14	// TYPE DEFINITIONS
24	15	//============================================================
25	16
26		class mini_osd_interface : public osd_~~commo~~n_t
	17	class mini_osd_interface : public osd_interface
27	18	{
28	19	public:
29	20	// construction/destruction
30		mini_osd_interface(~~mini_osd_options &options~~);
	21	mini_osd_interface();
31	22	virtual ~mini_osd_interface();
32	23
33	24	// general overridables

trunk/src/osd/osdmini/osdmini.mak
r242944	r242945
50	50	OSDSRC = $(SRC)/osd
51	51	OSDOBJ = $(OBJ)/osd
52	52
53		OBJDIRS += $(MINIOBJ) \
54		$(OSDOBJ)/modules/sync \
55		$(OSDOBJ)/modules/lib \
56		$(OSDOBJ)/modules/midi
	53	OBJDIRS += $(MINIOBJ) $(OSDOBJ)/modules/sync
57	54
	55
	56
58	57	#-------------------------------------------------
59	58	# OSD core library
60	59	#-------------------------------------------------
r242944	r242945
65	64	$(MINIOBJ)/minimisc.o \
66	65	$(MINIOBJ)/minisync.o \
67	66	$(MINIOBJ)/minitime.o \
	67	$(OSDOBJ)/modules/sync/work_mini.o \
68	68
69	69	#-------------------------------------------------
70	70	# OSD mini library
71	71	#-------------------------------------------------
72	72
73	73	OSDOBJS = \
74		$(MINIOBJ)/minimain.o \
75		$(OSDOBJ)/modules/sync/work_mini.o \
76		$(OSDOBJ)/modules/lib/osdobj_common.o \
77		$(OSDOBJ)/modules/midi/none.o \
	74	$(MINIOBJ)/minimain.o
78	75
79	76	ifeq ($(OS),Windows_NT)
80	77	LIBS += -lwinmm -lwsock32

trunk/src/tools/chdman.c
r242944	r242945
87	87	#define OPTION_VERBOSE "verbose"
88	88	#define OPTION_FIX "fix"
89	89	#define OPTION_NUMPROCESSORS "numprocessors"
90		#define OPTION_SIZE "size"
91	90
92	91
93	92	//**************************************************************************
r242944	r242945
529	528	{ OPTION_NO_CHECKSUM, "nocs", false, ": do not include this metadata information in the overall SHA-1" },
530	529	{ OPTION_FIX, "f", false, ": fix the SHA-1 if it is incorrect" },
531	530	{ OPTION_VERBOSE, "v", false, ": output additional information" },
532		{ OPTION_SIZE, "s", true, ": <bytes>: size of the output file" },
533	531	};
534	532
535	533
r242944	r242945
581	579	OPTION_COMPRESSION,
582	580	OPTION_IDENT,
583	581	OPTION_CHS,
584		OPTION_SIZE,
585	582	OPTION_SECTOR_SIZE,
586	583	OPTION_NUMPROCESSORS
587	584	}
r242944	r242945
904	901	if (filesize == 0)
905	902	report_error(1, "Can't guess CHS values because there is no input file");
906	903
	904	// validate the size
	905	if (filesize % sectorsize != 0)
	906	report_error(1, "Can't guess CHS values because data size is not divisible by %d", sectorsize);
	907	;
	908
907	909	// now find a valid value
908	910	for (UINT32 totalsectors = filesize / sectorsize; ; totalsectors++)
909	911	for (UINT32 cursectors = 63; cursectors > 1; cursectors--)
r242944	r242945
1685	1687	parse_hunk_size(params, sector_size, hunk_size);
1686	1688
1687	1689	// process input start/end (needs to know hunk_size)
1688		UINT64 filesize = 0;
1689	1690	UINT64 input_start = 0;
1690	1691	UINT64 input_end = 0;
1691	1692	if (input_file != NULL)
1692		{
1693	1693	parse_input_start_end(params, core_fsize(input_file), hunk_size, hunk_size, input_start, input_end);
1694		filesize = input_end - input_start;
1695		}
1696		else
1697		{
1698		astring *size_str = params.find(OPTION_SIZE);
1699		if (size_str != NULL)
1700		{
1701		if (sscanf(*size_str, "%"I64FMT"d", &filesize) != 1)
1702		report_error(1, "Invalid size string");
1703		}
1704		}
1705
	1694
1706	1695	// process compression
1707	1696	chd_codec_type compression[4];
1708	1697	memcpy(compression, s_default_hd_compression, sizeof(compression));
r242944	r242945
1757	1746	if (sscanf(metadata, HARD_DISK_METADATA_FORMAT, &cylinders, &heads, &sectors, &sector_size) != 4)
1758	1747	report_error(1, "Error parsing hard disk metadata in parent CHD");
1759	1748	}
1760
1761		// validate the size
1762		if (filesize % sector_size != 0)
1763		report_error(1, "Data size is not divisible by sector size %d", sector_size);
1764	1749
1765	1750	// if no CHS values, try to guess them
1766	1751	if (cylinders == 0)
1767	1752	{
1768		if (input_file == NULL && filesize == 0)
	1753	if (input_file == NULL && input_end - input_start == 0)
1769	1754	report_error(1, "Blank hard drives must specify either a length or a set of CHS values");
1770		guess_chs(input_file_str, filesize, sector_size, cylinders, heads, sectors, sector_size);
	1755	guess_chs(input_file_str, input_end - input_start, sector_size, cylinders, heads, sectors, sector_size);
1771	1756	}
1772	1757	UINT32 totalsectors = cylinders * heads * sectors;
1773	1758
r242944	r242945
1782	1767	if (input_start != 0 \|\| input_end != core_fsize(input_file))
1783	1768	{
1784	1769	printf("Input start: %s\n", big_int_string(tempstr, input_start));
1785		printf("Input length: %s\n", big_int_string(tempstr, filesize));
	1770	printf("Input length: %s\n", big_int_string(tempstr, input_end - input_start));
1786	1771	}
1787	1772	}
1788	1773	printf("Compression: %s\n", compression_string(tempstr, compression));
r242944	r242945
2923	2908	(*s_commands[cmdnum].handler)(parameters);
2924	2909	return 0;
2925	2910	}
2926		catch (chd_error &err)
2927		{
2928		fprintf(stderr, "CHD error occured (main): %s\n", chd_file::error_string(err));
2929		return 1;
2930		}
2931	2911	catch (fatal_error &err)
2932	2912	{
2933		fprintf(stderr, "Fatal error occured: %d\n", err.error());
2934	2913	return err.error();
2935	2914	}
2936	2915	catch (std::exception& ex)

https://github.com/mamedev/mame/commit/597f5e536b133eddf5a40e5f2ceb47b82937da2f

199869 Revisions