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r34075 Friday 26th December, 2014 at 23:42:10 UTC by David Haywood
arcompact - start to add the hardware loop support (nw)

[src/emu/cpu/arcompact]

arcompact.c arcompact.h arcompact_common.h arcompact_execute.c arcompact_make.py arcompactdasm_ops.c

trunk/src/emu/cpu/arcompact/arcompact.c

r242586	r242587
63	63	state_add( 0,  "PC", m_debugger_temp).callimport().callexport().formatstr("%08X");
64	64
65	65	state_add( 0x10,  "STATUS32", m_debugger_temp).callimport().callexport().formatstr("%08X");
	66	state_add( 0x11,  "LP_START", m_debugger_temp).callimport().callexport().formatstr("%08X");
	67	state_add( 0x12,  "LP_END", m_debugger_temp).callimport().callexport().formatstr("%08X");
66	68
67	69	state_add(STATE_GENPC, "GENPC", m_debugger_temp).callexport().noshow();
68	70
r242586	r242587
88	90	case 0x10:
89	91	m_debugger_temp = m_status32;
90	92	break;
	93	case 0x11:
	94	m_debugger_temp = m_LP_START;
	95	break;
	96	case 0x12:
	97	m_debugger_temp = m_LP_END;
	98	break;
91	99
92	100	case STATE_GENPC:
93	101	m_debugger_temp = m_pc;
r242586	r242587
116	124	case 0x10:
117	125	m_status32 = m_debugger_temp;
118	126	break;
	127	case 0x11:
	128	m_LP_START = m_debugger_temp;
	129	break;
	130	case 0x12:
	131	m_LP_END = m_debugger_temp;
	132	break;
119	133
120	134	default:
121	135	if ((index >= 0x100) && (index < 0x140))
r242586	r242587
137	151	m_regs[i] = 0;
138	152
139	153	m_status32 = 0;
	154	m_LP_START = 0;
	155	m_LP_END = 0;
	156
140	157	}
141	158
142	159	/*****************************************************************************/

trunk/src/emu/cpu/arcompact/arcompact.h

r242586	r242587
186	186	ARCOMPACT_RETTYPE arcompact_handle04_2b(OPS_32);
187	187	ARCOMPACT_RETTYPE arcompact_handle04_2f_00(OPS_32);
188	188	ARCOMPACT_RETTYPE arcompact_handle04_2f_01(OPS_32);
189		ARCOMPACT_RETTYPE arcompact_handle04_2f_02(OPS_32);
	189	//   ARCOMPACT_RETTYPE arcompact_handle04_2f_02(OPS_32);
190	190	ARCOMPACT_RETTYPE arcompact_handle04_2f_03(OPS_32);
191	191	ARCOMPACT_RETTYPE arcompact_handle04_2f_04(OPS_32);
192	192	ARCOMPACT_RETTYPE arcompact_handle04_2f_05(OPS_32);
r242586	r242587
778	778	ARCOMPACT_HANDLER04_TYPE_PM(04_16);
779	779	ARCOMPACT_HANDLER04_TYPE_PM(04_20);
780	780
	781	ARCOMPACT_HANDLER04_TYPE_PM(04_2f_02);
781	782	ARCOMPACT_HANDLER04_TYPE_PM(04_2f_07);
782	783	ARCOMPACT_HANDLER04_TYPE_PM(04_2f_08);
783	784
r242586	r242587
815	816	//   f  e  d  c| b  a  9  8| 7  6  5  4| 3  2  1  0
816	817	//  -  -  -  L| Z  N  C  V| U DE AE A2|A1 E2 E1  H
817	818	UINT32 m_status32;
	819
	820	UINT32 m_LP_START;
	821	UINT32 m_LP_END;
	822
818	823	};
819	824
820	825	#define V_OVERFLOW_FLAG (0x00000100)
r242586	r242587
845	850	// Condition 0x0c (LE)
846	851	#define CONDITION_LE ((STATUS32_CHECK_Z) || (STATUS32_CHECK_N && !STATUS32_CHECK_V) ||  (!STATUS32_CHECK_N && STATUS32_CHECK_V)) // Z or (N and /V) or (/N and V)
847	852	#define CONDITION_EQ (STATUS32_CHECK_Z)
	853	#define CONDITION_CS (STATUS32_CHECK_C)
848	854
849	855	extern const device_type ARCA5;
850	856

trunk/src/emu/cpu/arcompact/arcompact_common.h

r242586	r242587
19	19	#define REG_SP (0x1c) // r28
20	20	#define REG_ILINK1 (0x1d) // r29
21	21	#define REG_ILINK2 (0x1e) // r30
	22	#define REG_LP_COUNT (0x3c) // r60

trunk/src/emu/cpu/arcompact/arcompact_execute.c

r242586	r242587
36	36	m_pc = get_insruction(op);
37	37	}
38	38
	39	// hardware loops
	40	if (m_pc == m_LP_END)
	41	{
	42	if (m_regs[REG_LP_COUNT] != 1)
	43	{
	44	m_pc = m_LP_START;
	45	}
	46	m_regs[REG_LP_COUNT]--;
	47
	48	}
	49
39	50	m_icount--;
40	51	}
41	52
r242586	r242587
138	149	case 0x02: return !CONDITION_EQ; // NE
139	150	case 0x03: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
140	151	case 0x04: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
141		case 0x05: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
	152	case 0x05: return CONDITION_CS; // CS (Carry Set / Lower than)
142	153	case 0x06: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
143	154	case 0x07: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
144	155	case 0x08: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
r242586	r242587
2054	2065	ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_28(OPS_32) // LPcc (loop setup)
2055	2066	{
2056	2067	int size = 4;
2057
	2068	//   COMMON32_GET_breg; // breg is reserved
2058	2069	COMMON32_GET_p;
2059
	2070
2060	2071	if (p == 0x00)
2061	2072	{
	2073	arcompact_fatal("<illegal LPcc, p = 0x00)");
2062	2074	}
2063	2075	else if (p == 0x01)
2064	2076	{
	2077	arcompact_fatal("<illegal LPcc, p = 0x01)");
2065	2078	}
2066	2079	else if (p == 0x02) // Loop unconditional
2067		{
	2080	{ // 0010 0RRR 1010 1000 0RRR ssss ssSS SSSS
	2081	COMMON32_GET_s12
	2082	if (S & 0x800) S = -0x800 + (S&0x7ff);
	2083
	2084	arcompact_fatal("Lp unconditional not supported %d", S);
2068	2085	}
2069	2086	else if (p == 0x03) // Loop conditional
2070		{
	2087	{ // 0010 0RRR 1110 1000 0RRR uuuu uu1Q QQQQ
	2088	COMMON32_GET_u6
	2089	COMMON32_GET_CONDITION
	2090	//arcompact_fatal("Lp conditional %s not supported %d", conditions[condition], u);
	2091
	2092	// if the loop condition fails then just jump to after the end of the loop, don't set any registers
	2093	if (!check_condition(condition))
	2094	{
	2095	UINT32 realoffset = PC_ALIGNED32 + (u * 2);
	2096	return realoffset;
	2097	}
	2098	else
	2099	{
	2100	// otherwise set up the loop positions
	2101	m_LP_START = m_pc + (size >> 0);
	2102	m_LP_END = PC_ALIGNED32 + (u * 2);
	2103	return m_pc + (size>>0);
	2104	}
	2105
2071	2106	}
2072	2107
2073		arcompact_log("unimplemented LPcc %08x", op);
2074	2108	return m_pc + (size>>0);
2075	2109
2076	2110	}
r242586	r242587
2211	2245	}
2212	2246
2213	2247
2214		#define SETUP_HANDLE04_2f_0x_P00 \
2215		int size = 4; \
2216		UINT32 limm = 0; \
2217		\
2218		COMMON32_GET_breg; \
2219		COMMON32_GET_F; \
2220		COMMON32_GET_creg; \
2221		\
2222		UINT32 c; \
2223		\
2224		if (creg == LIMM_REG) \
2225		{ \
2226		GET_LIMM_32; \
2227		size = 8; \
2228		c = limm; \
2229		} \
2230		else \
2231		{ \
2232		c = m_regs[creg]; \
2233		} \
2234		/* todo: is the limm, limm syntax valid? (it's pointless.) */ \
2235		/* todo: if breg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */ \
2236	2248
2237
2238
2239	2249	ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_00(OPS_32)  { return arcompact_handle04_2f_helper(PARAMS, "ASL"); } // ASL
2240	2250	ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_01(OPS_32)  { return arcompact_handle04_2f_helper(PARAMS, "ASR"); } // ASR
2241		ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_02(OPS_32)  { return arcompact_handle04_2f_helper(PARAMS, "LSR"); } // LSR
	2251
2242	2252	ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_03(OPS_32)  { return arcompact_handle04_2f_helper(PARAMS, "ROR"); } // ROR
2243	2253	ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_04(OPS_32)  { return arcompact_handle04_2f_helper(PARAMS, "RCC"); } // RCC
2244	2254	ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_05(OPS_32)  { return arcompact_handle04_2f_helper(PARAMS, "SEXB"); } // SEXB
2245	2255	ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_06(OPS_32)  { return arcompact_handle04_2f_helper(PARAMS, "SEXW"); } // SEXW
2246	2256
2247	2257
2248		// EXTW b <- c  or  EXTW  b <- limm   or EXTW  limm <- c (no result)  or EXTW  limm, limm (invalid?)
2249		ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_08_p00(OPS_32) // note 'b' destination for 04_2f_08_xx group
2250		{
2251		SETUP_HANDLE04_2f_0x_P00;
2252
2253		m_regs[breg] = c & 0x0000ffff;
2254		if (F)
2255		{
2256		arcompact_fatal("arcompact_handle04_2f_08_p00 (EXTW) (F set)\n"); // not yet supported
2257		}
2258
2259		return m_pc + (size >> 0);
2260		}
2261
2262		ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_08_p01(OPS_32)
2263		{
2264		int size = 4;
2265		arcompact_fatal("arcompact_handle04_2f_08_p01 (EXTW)\n");
2266		return m_pc + (size >> 0);
2267		}
2268
2269		ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_08_p10(OPS_32)
2270		{
2271		int size = 4;
2272		arcompact_fatal("illegal 04_2f_08_p10 (EXTW)\n"); // illegal mode because 'S' bits have already been used for opcode select
2273		return m_pc + (size >> 0);
2274		}
2275
2276		ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_08_p11_m0(OPS_32)
2277		{
2278		int size = 4;
2279		arcompact_fatal("arcompact_handle04_2f_08_p11_m0 (EXTW)\n");  // illegal mode because 'Q' bits have already been used for opcode select
2280		return m_pc + (size >> 0);
2281		}
2282
2283		ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_08_p11_m1(OPS_32)
2284		{
2285		int size = 4;
2286		arcompact_fatal("arcompact_handle04_2f_08_p11_m1 (EXTW)\n");  // illegal mode because 'Q' bits have already been used for opcode select
2287		return m_pc + (size >> 0);
2288		}
2289
2290
2291	2258	ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_09(OPS_32)  { return arcompact_handle04_2f_helper(PARAMS, "ABS"); } // ABS
2292	2259	ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_0a(OPS_32)  { return arcompact_handle04_2f_helper(PARAMS, "NOT"); } // NOT
2293	2260	ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_0b(OPS_32)  { return arcompact_handle04_2f_helper(PARAMS, "RCL"); } // RLC

trunk/src/emu/cpu/arcompact/arcompact_make.py

r242586	r242587
9	9	print >>f, "      if (result == 0x00000000) { STATUS32_SET_Z; }"
10	10	print >>f, "      else { STATUS32_CLEAR_Z; }"
11	11
	12	def EmitGroup04_Handle_NZC_LSR1_Flags(f, funcname, opname):
	13	print >>f, "      if (result & 0x80000000) { STATUS32_SET_N; }"
	14	print >>f, "      else { STATUS32_CLEAR_N; }"
	15	print >>f, "      if (result == 0x00000000) { STATUS32_SET_Z; }"
	16	print >>f, "      else { STATUS32_CLEAR_Z; }"
	17	print >>f, "      if (c == 0x00000001) { STATUS32_SET_C; }"
	18	print >>f, "      else { STATUS32_CLEAR_C; }"
	19
	20
	21
12	22	def EmitGroup04_no_Flags(f, funcname, opname):
13	23	print >>f, "      // no flag changes"
14	24
r242586	r242587
289	299	EmitGroup04(f, "05_01", "LSR", "UINT32 result = b >> (c&0x1f);", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags  )
290	300
291	301	# the 04_2f subgroup uses the same encoding, but the areg is already used as sub-opcode select, so any modes relying on areg bits for other reasons (sign, condition) (modes 10, 11m0, 11m1) are illegal.  the destination is also breg not areg
292		EmitGroup04(f, "04_2f_07", "EXTB", "UINT32 result = c & 0x000000ff;", "m_regs[breg] = result;","", 2,1, -1, EmitGroup04_unsupported_Flags  ) # no alt handler (invalid path)
	302	EmitGroup04(f, "04_2f_02", "LSR1", "UINT32 result = c >> 1;",          "m_regs[breg] = result;","", 2,1, -1, EmitGroup04_Handle_NZC_LSR1_Flags  ) # no alt handler (invalid path)
	303	EmitGroup04(f, "04_2f_07", "EXTB", "UINT32 result = c & 0x000000ff;",  "m_regs[breg] = result;","", 2,1, -1, EmitGroup04_unsupported_Flags  ) # ^
	304	EmitGroup04(f, "04_2f_08", "EXTW", "UINT32 result = c & 0x0000ffff;",  "m_regs[breg] = result;","", 2,1, -1, EmitGroup04_unsupported_Flags  ) # ^
293	305
294	306
295	307	#  xxx_S b, b, u5 format opcodes

trunk/src/emu/cpu/arcompact/arcompactdasm_ops.c

r242586	r242587
887	887	{ // 0010 0RRR 1110 1000 0RRR uuuu uu1Q QQQQ
888	888	COMMON32_GET_u6
889	889	COMMON32_GET_CONDITION
890		output += sprintf(output, "LP<%s> (start %08x, end %08x)", conditions[condition], pc + 4, pc + u*2);
	890	output += sprintf(output, "LP<%s> (start %08x, end %08x)", conditions[condition], pc + 4, PC_ALIGNED32 + u*2);
891	891
892	892	int unused = (op & 0x00000020)>>5;
893	893	if (unused==0)    output += sprintf(output, "(unused bit not set)");

https://github.com/mamedev/mame/commit/3b359283955547bc8cae7fe3cd85cc4b03ba299d

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