trunk/src/emu/cpu/arcompact/arcompact.h
| r242579 | r242580 | |
| 148 | 148 | ARCOMPACT_RETTYPE arcompact_handle03(OPS_32); |
| 149 | 149 | // ARCOMPACT_RETTYPE arcompact_handle04_00(OPS_32); |
| 150 | 150 | ARCOMPACT_RETTYPE arcompact_handle04_01(OPS_32); |
| 151 | | ARCOMPACT_RETTYPE arcompact_handle04_02(OPS_32); |
| 151 | // ARCOMPACT_RETTYPE arcompact_handle04_02(OPS_32); |
| 152 | 152 | ARCOMPACT_RETTYPE arcompact_handle04_03(OPS_32); |
| 153 | 153 | // ARCOMPACT_RETTYPE arcompact_handle04_04(OPS_32); |
| 154 | 154 | // ARCOMPACT_RETTYPE arcompact_handle04_05(OPS_32); |
| r242579 | r242580 | |
| 167 | 167 | ARCOMPACT_RETTYPE arcompact_handle04_12(OPS_32); |
| 168 | 168 | ARCOMPACT_RETTYPE arcompact_handle04_13(OPS_32); |
| 169 | 169 | ARCOMPACT_RETTYPE arcompact_handle04_14(OPS_32); |
| 170 | | ARCOMPACT_RETTYPE arcompact_handle04_15(OPS_32); |
| 170 | // ARCOMPACT_RETTYPE arcompact_handle04_15(OPS_32); |
| 171 | 171 | // ARCOMPACT_RETTYPE arcompact_handle04_16(OPS_32); |
| 172 | 172 | ARCOMPACT_RETTYPE arcompact_handle04_17(OPS_32); |
| 173 | 173 | ARCOMPACT_RETTYPE arcompact_handle04_18(OPS_32); |
| r242579 | r242580 | |
| 767 | 767 | ARCOMPACT_RETTYPE get_insruction(OPS_32); |
| 768 | 768 | |
| 769 | 769 | ARCOMPACT_HANDLER04_TYPE_PM(04_00); |
| 770 | ARCOMPACT_HANDLER04_TYPE_PM(04_02); |
| 770 | 771 | ARCOMPACT_HANDLER04_TYPE_PM(04_04); |
| 771 | 772 | ARCOMPACT_HANDLER04_TYPE_PM(04_05); |
| 772 | 773 | ARCOMPACT_HANDLER04_TYPE_PM(04_06); |
| 773 | 774 | ARCOMPACT_HANDLER04_TYPE_PM(04_07); |
| 774 | 775 | ARCOMPACT_HANDLER04_TYPE_PM(04_0a); |
| 775 | 776 | ARCOMPACT_HANDLER04_TYPE_PM(04_0f); |
| 777 | ARCOMPACT_HANDLER04_TYPE_PM(04_15); |
| 776 | 778 | ARCOMPACT_HANDLER04_TYPE_PM(04_16); |
| 777 | 779 | ARCOMPACT_HANDLER04_TYPE_PM(04_20); |
| 778 | 780 | |
| r242579 | r242580 | |
| 838 | 840 | #define STATUS32_CLEAR_Z (m_status32 &= ~Z_ZERO_FLAG) |
| 839 | 841 | #define STATUS32_CHECK_Z (m_status32 & Z_ZERO_FLAG) |
| 840 | 842 | |
| 843 | // Condition 0x0c (LE) |
| 844 | #define CONDITION_LE ((STATUS32_CHECK_Z) || (STATUS32_CHECK_N && !STATUS32_CHECK_V) || (!STATUS32_CHECK_N && STATUS32_CHECK_V)) // Z or (N and /V) or (/N and V) |
| 841 | 845 | |
| 842 | 846 | extern const device_type ARCA5; |
| 843 | 847 | |
trunk/src/emu/cpu/arcompact/arcompact_execute.c
| r242579 | r242580 | |
| 1727 | 1727 | return arcompact_handle04_helper(PARAMS, opcodes_04[0x01], /*"ADC"*/ 0,0); |
| 1728 | 1728 | } |
| 1729 | 1729 | |
| 1730 | | ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_02(OPS_32) |
| 1731 | | { |
| 1732 | | return arcompact_handle04_helper(PARAMS, opcodes_04[0x02], /*"SUB"*/ 0,0); |
| 1733 | | } |
| 1734 | 1730 | |
| 1731 | |
| 1735 | 1732 | ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_03(OPS_32) |
| 1736 | 1733 | { |
| 1737 | 1734 | return arcompact_handle04_helper(PARAMS, opcodes_04[0x03], /*"SBC"*/ 0,0); |
| r242579 | r242580 | |
| 1900 | 1897 | return arcompact_handle04_helper(PARAMS, opcodes_04[0x14], /*"ADD1"*/ 0,0); |
| 1901 | 1898 | } |
| 1902 | 1899 | |
| 1903 | | ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_15(OPS_32) |
| 1904 | | { |
| 1905 | | return arcompact_handle04_helper(PARAMS, opcodes_04[0x15], /*"ADD2"*/ 0,0); |
| 1906 | | } |
| 1907 | 1900 | |
| 1908 | 1901 | |
| 1909 | 1902 | |
| r242579 | r242580 | |
| 3036 | 3029 | return m_pc + (2 >> 0); |
| 3037 | 3030 | } |
| 3038 | 3031 | |
| 3039 | | ARCOMPACT_RETTYPE arcompact_device::arcompact_handle17_00(OPS_16) // ASL_S b, b, u5 |
| 3040 | | { |
| 3041 | | int breg, u; |
| 3042 | | |
| 3043 | | COMMON16_GET_breg; |
| 3044 | | COMMON16_GET_u5; |
| 3045 | | |
| 3046 | | REG_16BIT_RANGE(breg); |
| 3047 | | |
| 3048 | | // only bottom 5 bits are used if ASL operations, we only have 5 bits anyway here |
| 3049 | | m_regs[breg] = m_regs[breg] << (u&0x1f); |
| 3050 | | |
| 3051 | | return m_pc + (2 >> 0); |
| 3052 | | |
| 3053 | | } |
| 3054 | | |
| 3055 | | ARCOMPACT_RETTYPE arcompact_device::arcompact_handle17_01(OPS_16) |
| 3056 | | { |
| 3057 | | return arcompact_handle_l7_0x_helper(PARAMS, "LSR_S"); |
| 3058 | | } |
| 3059 | | |
| 3060 | | ARCOMPACT_RETTYPE arcompact_device::arcompact_handle17_02(OPS_16) // ASR_S b,b,u5 |
| 3061 | | { |
| 3062 | | int breg, u; |
| 3063 | | |
| 3064 | | COMMON16_GET_breg; |
| 3065 | | COMMON16_GET_u5; |
| 3066 | | |
| 3067 | | REG_16BIT_RANGE(breg); |
| 3068 | | |
| 3069 | | // only bottom 5 bits are used if ASR operations, we only have 5 bits anyway here |
| 3070 | | INT32 temp = (INT32)m_regs[breg]; // treat it as a signed value, so sign extension occurs during shift |
| 3071 | | |
| 3072 | | m_regs[breg] = temp >> (u&0x1f); |
| 3073 | | |
| 3074 | | return m_pc + (2 >> 0); |
| 3075 | | } |
| 3076 | | |
| 3077 | | ARCOMPACT_RETTYPE arcompact_device::arcompact_handle17_03(OPS_16) // SUB_S b,b,u5 |
| 3078 | | { |
| 3079 | | int breg, u; |
| 3080 | | |
| 3081 | | COMMON16_GET_breg; |
| 3082 | | COMMON16_GET_u5; |
| 3083 | | |
| 3084 | | REG_16BIT_RANGE(breg); |
| 3085 | | |
| 3086 | | m_regs[breg] = m_regs[breg] - u; |
| 3087 | | |
| 3088 | | return m_pc + (2 >> 0); |
| 3089 | | } |
| 3090 | | |
| 3091 | | ARCOMPACT_RETTYPE arcompact_device::arcompact_handle17_04(OPS_16) // BSET_S b,b,u5 |
| 3092 | | { |
| 3093 | | int breg, u; |
| 3094 | | |
| 3095 | | COMMON16_GET_breg; |
| 3096 | | COMMON16_GET_u5; |
| 3097 | | |
| 3098 | | REG_16BIT_RANGE(breg); |
| 3099 | | |
| 3100 | | m_regs[breg] = m_regs[breg] | (1 << (u & 0x1f)); |
| 3101 | | |
| 3102 | | return m_pc + (2 >> 0); |
| 3103 | | } |
| 3104 | | |
| 3105 | 3032 | ARCOMPACT_RETTYPE arcompact_device::arcompact_handle17_05(OPS_16) |
| 3106 | 3033 | { |
| 3107 | 3034 | return arcompact_handle_l7_0x_helper(PARAMS, "BCLR_S"); |
| 3108 | 3035 | } |
| 3109 | 3036 | |
| 3110 | | ARCOMPACT_RETTYPE arcompact_device::arcompact_handle17_06(OPS_16) // BMSK b,b,u5 |
| 3111 | | { |
| 3112 | | int breg, u; |
| 3113 | | |
| 3114 | | COMMON16_GET_breg; |
| 3115 | | COMMON16_GET_u5; |
| 3116 | | |
| 3117 | | REG_16BIT_RANGE(breg); |
| 3118 | | |
| 3119 | | u &= 0x1f; |
| 3120 | | |
| 3121 | | m_regs[breg] = m_regs[breg] | ((1 << (u + 1)) - 1); |
| 3122 | | |
| 3123 | | return m_pc + (2 >> 0); |
| 3124 | | } |
| 3125 | | |
| 3126 | 3037 | ARCOMPACT_RETTYPE arcompact_device::arcompact_handle17_07(OPS_16) |
| 3127 | 3038 | { |
| 3128 | 3039 | return arcompact_handle_l7_0x_helper(PARAMS, "BTST_S"); |
| 3129 | 3040 | } |
| 3130 | 3041 | |
| 3042 | |
| 3043 | |
| 3131 | 3044 | ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_0x_helper(OPS_16, const char* optext, int st) |
| 3132 | 3045 | { |
| 3133 | 3046 | arcompact_log("unimplemented %s %04x (0x18_0x group)", optext, op); |
| r242579 | r242580 | |
| 3460 | 3373 | ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03_00(OPS_16) { return arcompact_handle1e_03_0x_helper(PARAMS, "BGT_S"); } |
| 3461 | 3374 | ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03_01(OPS_16) { return arcompact_handle1e_03_0x_helper(PARAMS, "BGE_S"); } |
| 3462 | 3375 | ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03_02(OPS_16) { return arcompact_handle1e_03_0x_helper(PARAMS, "BLT_S"); } |
| 3463 | | ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03_03(OPS_16) { return arcompact_handle1e_03_0x_helper(PARAMS, "BLE_S"); } |
| 3376 | |
| 3377 | ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03_03(OPS_16) // BLE_S |
| 3378 | { |
| 3379 | if (CONDITION_LE) |
| 3380 | { |
| 3381 | int s = (op & 0x003f) >> 0; op &= ~0x003f; |
| 3382 | if (s & 0x020) s = -0x20 + (s & 0x1f); |
| 3383 | UINT32 realaddress = PC_ALIGNED32 + (s * 2); |
| 3384 | //m_regs[REG_BLINK] = m_pc + (2 >> 0); // don't link |
| 3385 | return realaddress; |
| 3386 | } |
| 3387 | |
| 3388 | return m_pc + (2 >> 0); |
| 3389 | } |
| 3390 | |
| 3464 | 3391 | ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03_04(OPS_16) { return arcompact_handle1e_03_0x_helper(PARAMS, "BHI_S"); } |
| 3465 | 3392 | ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03_05(OPS_16) { return arcompact_handle1e_03_0x_helper(PARAMS, "BHS_S"); } |
| 3466 | 3393 | ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03_06(OPS_16) { return arcompact_handle1e_03_0x_helper(PARAMS, "BLO_S"); } |
trunk/src/emu/cpu/arcompact/arcompact_make.py
| r242579 | r242580 | |
| 155 | 155 | print >>f, "" |
| 156 | 156 | print >>f, "" |
| 157 | 157 | |
| 158 | # xxx_S b, b, u5 format opcodes |
| 159 | def EmitGroup17(f,funcname, opname, opexecute): |
| 160 | print >>f, "ARCOMPACT_RETTYPE arcompact_device::arcompact_handle%s(OPS_16)" % (funcname) |
| 161 | print >>f, "{" |
| 162 | print >>f, " int breg, u;" |
| 163 | print >>f, " " |
| 164 | print >>f, " COMMON16_GET_breg;" |
| 165 | print >>f, " COMMON16_GET_u5;" |
| 166 | print >>f, " " |
| 167 | print >>f, " REG_16BIT_RANGE(breg);" |
| 168 | print >>f, " " |
| 169 | print >>f, " %s" % (opexecute) |
| 170 | print >>f, " " |
| 171 | print >>f, " return m_pc + (2 >> 0);" |
| 172 | print >>f, "}" |
| 173 | print >>f, "" |
| 174 | print >>f, "" |
| 175 | |
| 176 | |
| 177 | |
| 158 | 178 | try: |
| 159 | 179 | f = open(sys.argv[1], "w") |
| 160 | 180 | except Exception, err: |
| r242579 | r242580 | |
| 164 | 184 | |
| 165 | 185 | EmitGroup04(f, "04_00", "ADD", "m_regs[areg] = b + c;" ) |
| 166 | 186 | |
| 187 | EmitGroup04(f, "04_02", "SUB", "m_regs[areg] = b - c;" ) |
| 188 | |
| 167 | 189 | EmitGroup04(f, "04_04", "AND", "m_regs[areg] = b & c;" ) |
| 168 | 190 | EmitGroup04(f, "04_05", "OR", "m_regs[areg] = b | c;" ) |
| 169 | 191 | EmitGroup04(f, "04_06", "BIC", "m_regs[areg] = b & (~c);" ) |
| r242579 | r242580 | |
| 171 | 193 | |
| 172 | 194 | EmitGroup04(f, "04_0f", "BSET", "m_regs[areg] = b | (1 << (c & 0x1f));" ) |
| 173 | 195 | |
| 196 | EmitGroup04(f, "04_15", "ADD2", "m_regs[areg] = b + (c << 2);" ) |
| 174 | 197 | EmitGroup04(f, "04_16", "ADD3", "m_regs[areg] = b + (c << 3);" ) |
| 175 | 198 | |
| 176 | 199 | |
| 177 | 200 | EmitGroup04(f, "05_00", "ASL", "m_regs[areg] = b << (c&0x1f);" ) |
| 178 | 201 | EmitGroup04(f, "05_01", "LSR", "m_regs[areg] = b >> (c&0x1f);" ) |
| 179 | 202 | |
| 203 | # xxx_S b, b, u5 format opcodes |
| 204 | EmitGroup17(f, "17_00", "ASL_S", "m_regs[breg] = m_regs[breg] << (u&0x1f);" ) |
| 205 | EmitGroup17(f, "17_01", "LSR_S", "m_regs[breg] = m_regs[breg] >> (u&0x1f);" ) |
| 206 | EmitGroup17(f, "17_02", "ASR_S", "INT32 temp = (INT32)m_regs[breg]; m_regs[breg] = temp >> (u&0x1f); // treat it as a signed value, so sign extension occurs during shift" ) |
| 207 | EmitGroup17(f, "17_03", "SUB_S", "m_regs[breg] = m_regs[breg] - u;" ) |
| 208 | EmitGroup17(f, "17_04", "BSET_S", "m_regs[breg] = m_regs[breg] | (1 << (u & 0x1f));" ) |
| 180 | 209 | |
| 210 | EmitGroup17(f, "17_06", "BMSK_S", "m_regs[breg] = m_regs[breg] | ((1 << (u + 1)) - 1);" ) |
| 211 | |
| 212 | |
| 213 | |
| 214 | |