Previous 199869 Revisions Next

r34022 Monday 22nd December, 2014 at 23:17:07 UTC by David Haywood
pass a bit more of the bios self-validation (nw)
[src/emu/cpu/arcompact]arcompact_execute.c

trunk/src/emu/cpu/arcompact/arcompact_execute.c
r242533r242534
12661266{
12671267   BR_REGREG_SETUP
12681268
1269   // BRLO
1269   // BRLO (unsigned operation)
12701270   if (b < c)
12711271   {
12721272      BR_TAKEJUMP
r242533r242534
12801280{
12811281   BR_REGREG_SETUP
12821282
1283   // BRHS
1283   // BRHS (unsigned operation)
12841284   if (b >= c)
12851285   {
12861286      BR_TAKEJUMP
r242533r242534
13001300   return m_pc + (size>>0);
13011301}
13021302
1303#define BR_REGIMM_SETUP \
1304   int size = 4; \
1305   GET_01_01_01_BRANCH_ADDR \
1306   COMMON32_GET_u6; \
1307   COMMON32_GET_breg; \
1308   int n = (op & 0x00000020) >> 5; \
1309   UINT32 b,c; \
1310   c = u; \
1311   /* comparing a LIMM  to an immediate is pointless, is it a valid encoding? */ \
1312   if ((breg != LIMM_REG)) \
1313   { \
1314      b = m_regs[breg]; \
1315   } \
1316   else \
1317   { \
1318      UINT32 limm; \
1319      GET_LIMM_32; \
1320      size = 8; \
1321      b = limm; \
1322   } \
1323
1324
13031325// register -immediate cases
1304ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_00(OPS_32)  { return arcompact_01_01_01_helper(PARAMS, "BREQ"); }
1305ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_01(OPS_32)  { return arcompact_01_01_01_helper(PARAMS, "BRNE"); }
1306ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_02(OPS_32)  { return arcompact_01_01_01_helper(PARAMS, "BRLT"); }
1307ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_03(OPS_32)  { return arcompact_01_01_01_helper(PARAMS, "BRGE"); }
1308ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_04(OPS_32)  { return arcompact_01_01_01_helper(PARAMS, "BRLO"); }
1326ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_00(OPS_32) // BREQ reg-imm
1327{
1328   BR_REGIMM_SETUP
1329   
1330   // BREQ
1331   if (b == c)
1332   {
1333      BR_TAKEJUMP
1334   }
1335   
1336   return m_pc + (size>>0);
1337}
13091338
1310ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_05(OPS_32) // register - immediate BRHS
1339ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_01(OPS_32) // BRNE reg-imm
13111340{
1312   int size = 4;
1341   BR_REGIMM_SETUP
1342   
1343   // BRNE
1344   if (b != c)
1345   {
1346      BR_TAKEJUMP
1347   }
1348   
1349   return m_pc + (size>>0);
1350}
13131351
1314   GET_01_01_01_BRANCH_ADDR
1315   COMMON32_GET_u6;
1316   COMMON32_GET_breg;
13171352
1318   int n = (op & 0x00000020) >> 5;
13191353
1320   UINT32 b,c;
1321
1322   c = u;
1323
1324    // comparing a LIMM  to an immediate is pointless, is it a valid encoding?
1325   if ((breg != LIMM_REG))
1354ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_02(OPS_32) // BRLT reg-imm
1355{
1356   BR_REGIMM_SETUP
1357   
1358   // BRLT  (signed operation)
1359   if ((INT32)b < (INT32)c)
13261360   {
1327      b = m_regs[breg];
1361      BR_TAKEJUMP
13281362   }
1329   else
1330   {
1331      UINT32 limm;
1332      GET_LIMM_32;
1333      size = 8;
1334      b = limm;
1335   }
1363   
1364   return m_pc + (size>>0);
13361365
1337   // BRHS
1338   if (b >= c) // check
1366}
1367ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_03(OPS_32)  { return arcompact_01_01_01_helper(PARAMS, "BRGE"); }
1368ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_04(OPS_32)  { return arcompact_01_01_01_helper(PARAMS, "BRLO"); }
1369
1370ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_05(OPS_32) // register - immediate BRHS
1371{
1372   BR_REGIMM_SETUP
1373
1374   // BRHS (unsigned operation)
1375   if (b >= c)
13391376   {
13401377      BR_TAKEJUMP
13411378   }
r242533r242534
13501387ARCOMPACT_RETTYPE arcompact_device::arcompact_handle02(OPS_32)
13511388{
13521389   int size = 4;
1390   UINT32 limm = 0;
1391
1392   int S = (op & 0x00008000) >> 15;// op &= ~0x00008000;
1393   int s = (op & 0x00ff0000) >> 16;// op &= ~0x00ff0000;
1394   if (S) s = -0x100 + s;
1395
13531396   COMMON32_GET_breg;
1397   COMMON32_GET_areg
13541398
1355   //UINT32 limm = 0;
1399   int X = (op & 0x00000040) >> 6;  //op &= ~0x00000040;
1400   int Z = (op & 0x00000180) >> 7;  //op &= ~0x00000180;
1401   int a = (op & 0x00000600) >> 9;  //op &= ~0x00000600;
1402//   int D = (op & 0x00000800) >> 11;// op &= ~0x00000800; // we don't use the data cache currently
1403
1404   UINT32 address = m_regs[breg];
1405
13561406   if (breg == LIMM_REG)
13571407   {
1358      //GET_LIMM_32;
1408      GET_LIMM_32;
13591409      size = 8;
1410
1411      address = limm;
13601412   }
13611413
1362   arcompact_log("unimplemented LD %08x", op);
1414   // address manipulation
1415   if ((a == 0) || (a == 1))
1416   {
1417      address = address + s;
1418   }
1419   else if (a == 2)
1420   {
1421      //address = address;
1422   }
1423   else if (a == 3)
1424   {
1425      if (Z == 0)
1426         address = address + (s << 2);
1427      else if (Z==2)
1428         address = address + (s << 1);
1429      else // Z == 1 and Z == 3 are invalid here
1430         arcompact_fatal("illegal LD %08x (data size %d mode %d)", op, Z, a);
1431   }
1432
1433   UINT32 readdata = 0;
1434
1435   // read data
1436   if (Z == 0)
1437   {
1438      readdata = READ32(address >> 2);
1439
1440      if (X) // sign extend is not supported for long reads
1441         arcompact_fatal("illegal LD %08x (data size %d mode %d with X)", op, Z, a);
1442
1443   }
1444   else if (Z == 1)
1445   {
1446      readdata = READ8(address >> 0);
1447
1448      if (X) // todo
1449         arcompact_fatal("illegal LD %08x (data size %d mode %d with X)", op, Z, a);
1450
1451   }
1452   else if (Z == 2)
1453   {
1454      readdata = READ16(address >> 1);
1455
1456      if (X) // todo
1457         arcompact_fatal("illegal LD %08x (data size %d mode %d with X)", op, Z, a);
1458
1459   }
1460   else if (Z == 3)
1461   { // Z == 3 is always illegal
1462      arcompact_fatal("illegal LD %08x (data size %d mode %d)", op, Z, a);
1463   }
1464
1465   m_regs[areg] = readdata;
1466
1467   // writeback / increment
1468   if ((a == 1) || (a == 2))
1469   {
1470      if (breg==limm)
1471         arcompact_fatal("illegal LD %08x (data size %d mode %d)", op, Z, a); // using the LIMM as the base register and an increment mode is illegal
1472
1473      m_regs[breg] = m_regs[breg] + s;
1474   }
1475
13631476   return m_pc + (size>>0);
13641477
13651478}
r242533r242534
13711484   int got_limm = 0;
13721485   int S = (op & 0x00008000) >> 15;
13731486   int s = (op & 0x00ff0000) >> 16;
1487   if (S) s = -0x100 + s;
13741488
13751489   COMMON32_GET_breg;
13761490   COMMON32_GET_creg;
1377
1378   if (S) s = -0x100 + s;
1379
1491   
13801492//   int R = (op & 0x00000001) >> 0; // bit 0 is reserved
13811493   int Z = (op & 0x00000006) >> 1;
13821494   int a = (op & 0x00000018) >> 3;
r242533r242534
22302342   {
22312343   }   
22322344
2233   arcompact_log("unimplemented LD %08x", op);
2345   arcompact_log("unimplemented LD %08x (type 04_3x)", op);
22342346   return m_pc + (size>>0);
22352347}
22362348
r242533r242534
25572669
25582670ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_0x_helper(OPS_16, const char* optext, int nodst)
25592671{
2560   arcompact_log("unimplemented %s %04x", optext, op);
2672   arcompact_log("unimplemented %s %04x (0xf_0x group)", optext, op);
25612673   return m_pc + (2 >> 0);
25622674}
25632675
r242533r242534
25702682ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_0c(OPS_16)  { return arcompact_handle0f_0x_helper(PARAMS, "MUL64_S",2);  } // actual destination is special multiply registers
25712683ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_0d(OPS_16)  { return arcompact_handle0f_0x_helper(PARAMS, "SEXB_S",0); }
25722684ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_0e(OPS_16)  { return arcompact_handle0f_0x_helper(PARAMS, "SEXW_S",0); }
2573ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_0f(OPS_16)  { return arcompact_handle0f_0x_helper(PARAMS, "EXTB_S",0); }
2685
2686ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_0f(OPS_16) // EXTB_S
2687{
2688   int breg, creg;
2689
2690   COMMON16_GET_breg;
2691   COMMON16_GET_creg;
2692
2693   REG_16BIT_RANGE(breg);
2694   REG_16BIT_RANGE(creg);
2695
2696   m_regs[breg] = m_regs[creg] & 0xff;
2697
2698   return m_pc + (2 >> 0);
2699
2700}
2701
25742702ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_10(OPS_16)  { return arcompact_handle0f_0x_helper(PARAMS, "EXTW_S",0); }
25752703ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_11(OPS_16)  { return arcompact_handle0f_0x_helper(PARAMS, "ABS_S",0);  }
25762704ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_12(OPS_16)  { return arcompact_handle0f_0x_helper(PARAMS, "NOT_S",0);  }
r242533r242534
26692797
26702798ARCOMPACT_RETTYPE arcompact_device::arcompact_handle_l7_0x_helper(OPS_16, const char* optext)
26712799{
2672   arcompact_log("unimplemented %s %04x", optext, op);
2800   arcompact_log("unimplemented %s %04x (l7_0x group)", optext, op);
26732801   return m_pc + (2 >> 0);
26742802}
26752803
2676ARCOMPACT_RETTYPE arcompact_device::arcompact_handle17_00(OPS_16)
2804ARCOMPACT_RETTYPE arcompact_device::arcompact_handle17_00(OPS_16) // ASL_S b, b, u5
26772805{
2678   return arcompact_handle_l7_0x_helper(PARAMS, "ASL_S");
2806   int breg, u;
2807
2808   COMMON16_GET_breg;
2809   COMMON16_GET_u5;
2810
2811   REG_16BIT_RANGE(breg);
2812
2813   // only bottom 5 bits are used if ASL operations, we only have 5 bits anyway here
2814   m_regs[breg] = m_regs[breg] << (u&0x1f);
2815
2816   return m_pc + (2 >> 0);
2817
26792818}
26802819
26812820ARCOMPACT_RETTYPE arcompact_device::arcompact_handle17_01(OPS_16)
r242533r242534
26832822   return arcompact_handle_l7_0x_helper(PARAMS, "LSR_S");
26842823}
26852824
2686ARCOMPACT_RETTYPE arcompact_device::arcompact_handle17_02(OPS_16)
2825ARCOMPACT_RETTYPE arcompact_device::arcompact_handle17_02(OPS_16) // ASR_S b,b,u5
26872826{
2688   return arcompact_handle_l7_0x_helper(PARAMS, "ASR_S");
2827   int breg, u;
2828
2829   COMMON16_GET_breg;
2830   COMMON16_GET_u5;
2831
2832   REG_16BIT_RANGE(breg);
2833
2834   // only bottom 5 bits are used if ASR operations, we only have 5 bits anyway here
2835   INT32 temp = (INT32)m_regs[breg]; // treat it as a signed value, so sign extension occurs during shift
2836   
2837   m_regs[breg] = temp >> (u&0x1f);
2838
2839   return m_pc + (2 >> 0);
26892840}
26902841
26912842ARCOMPACT_RETTYPE arcompact_device::arcompact_handle17_03(OPS_16)

https://github.com/mamedev/mame/commit/cfc977bd4e734d064c16f52a81c7b101fc875e4b

Previous 199869 Revisions Next

© 1997-2024 The MAME Team