trunk/src/emu/cpu/arcompact/arcompact_execute.c
| r242511 | r242512 | |
| 120 | 120 | limm = (READ16((m_pc + 4) >> 1) << 16); \ |
| 121 | 121 | limm |= READ16((m_pc + 6) >> 1); \ |
| 122 | 122 | |
| 123 | #define GET_LIMM_16 \ |
| 124 | limm = (READ16((m_pc + 2) >> 1) << 16); \ |
| 125 | limm |= READ16((m_pc + 4) >> 1); \ |
| 123 | 126 | |
| 124 | 127 | |
| 125 | 128 | #define PC_ALIGNED32 \ |
| r242511 | r242512 | |
| 1228 | 1231 | int size = 4; |
| 1229 | 1232 | //UINT32 limm = 0; |
| 1230 | 1233 | int got_limm = 0; |
| 1234 | int S = (op & 0x00008000) >> 15;// op &= ~0x00008000; |
| 1235 | int s = (op & 0x00ff0000) >> 16;// op &= ~0x00ff0000; |
| 1231 | 1236 | |
| 1232 | 1237 | COMMON32_GET_breg; |
| 1233 | 1238 | COMMON32_GET_creg; |
| 1234 | 1239 | |
| 1240 | if (S) s = -0x100 + s; |
| 1241 | |
| 1242 | // int R = (op & 0x00000001) >> 0; op &= ~0x00000001; // bit 0 is reserved |
| 1243 | int Z = (op & 0x00000006) >> 1; op &= ~0x00000006; |
| 1244 | int a = (op & 0x00000018) >> 3; op &= ~0x00000018; |
| 1245 | // int D = (op & 0x00000020) >> 5; op &= ~0x00000020; // we don't use the data cache currently |
| 1246 | |
| 1235 | 1247 | if (breg == LIMM_REG) |
| 1236 | 1248 | { |
| 1237 | 1249 | //GET_LIMM_32; |
| r242511 | r242512 | |
| 1252 | 1264 | |
| 1253 | 1265 | } |
| 1254 | 1266 | |
| 1255 | | arcompact_log("unimplemented ST %08x", op); |
| 1267 | if (Z == 0) |
| 1268 | { |
| 1269 | UINT32 address = m_regs[breg] + s; |
| 1270 | |
| 1271 | WRITE32(address>>2, m_regs[creg]); |
| 1272 | } |
| 1273 | else if (Z == 1) |
| 1274 | { |
| 1275 | arcompact_fatal("illegal ST %08x (data size %d mode %d)", op, Z, a); |
| 1276 | } |
| 1277 | else if (Z == 2) |
| 1278 | { |
| 1279 | arcompact_fatal("illegal ST %08x (data size %d mode %d)", op, Z, a); |
| 1280 | } |
| 1281 | else |
| 1282 | { |
| 1283 | arcompact_fatal("illegal ST %08x (data size %d mode %d)", op, Z, a); |
| 1284 | } |
| 1285 | |
| 1286 | // todo, handle 'a' increment modes |
| 1287 | |
| 1256 | 1288 | return m_pc + (size>>0); |
| 1257 | 1289 | |
| 1258 | 1290 | } |
| r242511 | r242512 | |
| 1846 | 1878 | { |
| 1847 | 1879 | } |
| 1848 | 1880 | |
| 1849 | | arcompact_log("unimplemented ST %08x", op); |
| 1881 | arcompact_log("unimplemented SR %08x", op); |
| 1850 | 1882 | return m_pc + (size>>0); |
| 1851 | 1883 | } |
| 1852 | 1884 | |
| r242511 | r242512 | |
| 2164 | 2196 | return arcompact_handle0e_0x_helper(PARAMS, "ADD_S", 0); |
| 2165 | 2197 | } |
| 2166 | 2198 | |
| 2167 | | ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0e_01(OPS_16) |
| 2199 | // 16-bit MOV with extended register range |
| 2200 | ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0e_01(OPS_16) // MOV_S b <- h |
| 2168 | 2201 | { |
| 2169 | | return arcompact_handle0e_0x_helper(PARAMS, "MOV_S", 0); |
| 2202 | int h,breg; |
| 2203 | int size = 2; |
| 2204 | |
| 2205 | GROUP_0e_GET_h; |
| 2206 | COMMON16_GET_breg; |
| 2207 | REG_16BIT_RANGE(breg); |
| 2208 | |
| 2209 | if (h == LIMM_REG) |
| 2210 | { |
| 2211 | // opcode iiii ibbb hhhI Ihhh |
| 2212 | // MOV_S b, limm 0111 0bbb 1100 1111 [LIMM] (h == LIMM) |
| 2213 | |
| 2214 | UINT32 limm; |
| 2215 | GET_LIMM_16; |
| 2216 | size = 6; |
| 2217 | |
| 2218 | m_regs[breg] = limm; |
| 2219 | |
| 2220 | } |
| 2221 | else |
| 2222 | { |
| 2223 | // opcode iiii ibbb hhhI Ihhh |
| 2224 | // MOV_S b,h 0111 0bbb hhh0 1HHH |
| 2225 | m_regs[breg] = m_regs[h]; |
| 2226 | } |
| 2227 | |
| 2228 | return m_pc+ (size>>0); |
| 2170 | 2229 | } |
| 2171 | 2230 | |
| 2172 | 2231 | ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0e_02(OPS_16) |
| r242511 | r242512 | |
| 2176 | 2235 | |
| 2177 | 2236 | ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0e_03(OPS_16) |
| 2178 | 2237 | { |
| 2179 | | return arcompact_handle0e_0x_helper(PARAMS, "MOV_S", 1); |
| 2238 | return arcompact_handle0e_0x_helper(PARAMS, "MOV_S (0e_03 type)", 1); |
| 2180 | 2239 | } |
| 2181 | 2240 | |
| 2182 | 2241 | |
| r242511 | r242512 | |
| 2403 | 2462 | // op bits remaining for 0x18_07_xx subgroups 0x0700 |
| 2404 | 2463 | ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_01(OPS_16) |
| 2405 | 2464 | { |
| 2406 | | arcompact_log("unimplemented PUSH_S %04x", op); |
| 2407 | | return m_pc + (2 >> 0);; |
| 2465 | int breg; |
| 2466 | COMMON16_GET_breg; |
| 2467 | REG_16BIT_RANGE(breg); |
| 2468 | |
| 2469 | m_regs[REG_SP] -= 4; |
| 2470 | |
| 2471 | WRITE32(m_regs[REG_SP] >> 2, m_regs[breg]); |
| 2472 | |
| 2473 | return m_pc + (2 >> 0); |
| 2408 | 2474 | } |
| 2409 | 2475 | |
| 2410 | 2476 | |
| 2411 | 2477 | ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_11(OPS_16) |
| 2412 | 2478 | { |
| 2413 | | arcompact_log("unimplemented PUSH_S [BLINK] %04x", op); |
| 2414 | | return m_pc + (2 >> 0);; |
| 2479 | // breg bits are reserved |
| 2480 | |
| 2481 | m_regs[REG_SP] -= 4; |
| 2482 | |
| 2483 | WRITE32(m_regs[REG_SP] >> 2, m_regs[REG_BLINK]); |
| 2484 | |
| 2485 | return m_pc + (2 >> 0); |
| 2415 | 2486 | } |
| 2416 | 2487 | |
| 2417 | 2488 | |
| r242511 | r242512 | |
| 2434 | 2505 | |
| 2435 | 2506 | ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1b(OPS_16) |
| 2436 | 2507 | { |
| 2437 | | arcompact_log("unimplemented MOV_S %04x", op); |
| 2508 | arcompact_log("unimplemented MOV_S (1b type) %04x", op); |
| 2438 | 2509 | return m_pc + (2 >> 0);; |
| 2439 | 2510 | } |
| 2440 | 2511 | |
trunk/src/emu/cpu/arcompact/arcompactdasm_ops.c
| r242511 | r242512 | |
| 1476 | 1476 | UINT32 limm; |
| 1477 | 1477 | GET_LIMM; |
| 1478 | 1478 | size = 6; |
| 1479 | | if (!revop) print("%s %s, (%08x) (%04x)", optext, regnames[breg], limm, op); |
| 1480 | | else print("%s (%08x), %s (%04x)", optext, limm, regnames[breg], op); |
| 1479 | if (!revop) print("%s %s <- 0x%08x", optext, regnames[breg], limm); |
| 1480 | else print("%s 0x%08x <- %s", optext, limm, regnames[breg]); |
| 1481 | 1481 | } |
| 1482 | 1482 | else |
| 1483 | 1483 | { |
| 1484 | | if (!revop) print("%s %s, %s (%04x)", optext, regnames[breg], regnames[h], op); |
| 1485 | | else print("%s %s, %s (%04x)", optext, regnames[h], regnames[breg], op); |
| 1484 | if (!revop) print("%s %s <- %s", optext, regnames[breg], regnames[h]); |
| 1485 | else print("%s %s <- %s", optext, regnames[h], regnames[breg]); |
| 1486 | 1486 | |
| 1487 | 1487 | } |
| 1488 | 1488 | |
| r242511 | r242512 | |
| 1792 | 1792 | // op bits remaining for 0x18_06_xx subgroups 0x0700 |
| 1793 | 1793 | int arcompact_handle18_06_01_dasm(DASM_OPS_16) |
| 1794 | 1794 | { |
| 1795 | | int breg = (op & 0x0700) >> 8; |
| 1796 | | op &= ~0x0700; // all bits now used |
| 1795 | int breg; |
| 1796 | COMMON16_GET_breg |
| 1797 | 1797 | REG_16BIT_RANGE(breg) |
| 1798 | 1798 | |
| 1799 | 1799 | print("POP_S %s", regnames[breg]); |
| r242511 | r242512 | |
| 1817 | 1817 | // op bits remaining for 0x18_07_xx subgroups 0x0700 |
| 1818 | 1818 | int arcompact_handle18_07_01_dasm(DASM_OPS_16) |
| 1819 | 1819 | { |
| 1820 | | int breg = (op & 0x0700) >> 8; |
| 1821 | | op &= ~0x0700; // all bits now used |
| 1820 | int breg; |
| 1821 | COMMON16_GET_breg |
| 1822 | 1822 | REG_16BIT_RANGE(breg) |
| 1823 | 1823 | |
| 1824 | 1824 | print("PUSH_S %s", regnames[breg]); |