Previous 199869 Revisions Next

r33968 Friday 19th December, 2014 at 21:20:07 UTC by Jonathan Gevaryahu
(MESS) Fix VSM rom read through the tms51xx, and add tms6100 hookup to tispeak.c, fixing speech in speak and spell and speak and math. The drivers are usable but no display yet. Fixed speak and spell clock speed (it is 1/2 the clock input of the tms51xx chip) [Lord Nightmare]

Non-Whatsnew Note: this commit breaks the speech in radar scope trs02 set (because the rom it has has the bits in the backwards order). I will fix this later.
[src/emu/machine]tms6100.c
[src/emu/sound]tms5110.c
[src/mess/drivers]tispeak.c

trunk/src/emu/machine/tms6100.c
r242479r242480
182182            else
183183            {
184184               /* read bit at address */
185               m_data = (m_rom[m_address >> 3] >> ((m_address & 0x07) ^ 0x07)) & 1;
185               m_data = (m_rom[m_address >> 3] >> (m_address & 0x07)) & 1;
186186               m_address++;
187187            }
188188            m_state &= ~TMS6100_READ_PENDING;
trunk/src/emu/sound/tms5110.c
r242479r242480
88     Various fixes by Lord Nightmare
99     Additional enhancements by Couriersud
1010     Sub-interpolation-cycle parameter updating added by Lord Nightmare
11     Read-bit and Output fixes by Lord Nightmare
1112
1213     Todo:
1314        - implement CS
r242479r242480
148149   new_int_write(0, 0, 0, 0); // romclk 0, m0 0, m1 0, addr bus nybble = 0/open bus
149150   if (!m_data_cb.isnull())
150151      return m_data_cb();
152   if (DEBUG_5110) logerror("WARNING: CALLBACK MISSING, RETURNING 0!\n");
151153   return 0;
152154}
153155
r242479r242480
230232int tms5110_device::extract_bits(int count)
231233{
232234   int val = 0;
233
235   if (DEBUG_5110) logerror("requesting %d bits from fifo: ", count);
234236   while (count--)
235237   {
236238      val = (val << 1) | (m_fifo[m_fifo_head] & 1);
237239      m_fifo_count--;
238240      m_fifo_head = (m_fifo_head + 1) % FIFO_SIZE;
239241   }
242   if (DEBUG_5110) logerror("returning: %02x\n", val);
240243   return val;
241244}
242245
r242479r242480
245248   for (int i = 0; i < no; i++)
246249   {
247250      UINT8 data = new_int_read();
251      if (DEBUG_5110) logerror("bit added to fifo: %d\n", data);
248252      FIFO_data_write(data);
249253   }
250254}
r242479r242480
591595      m_PDC = data & 0x1;
592596      if (m_PDC == 0) /* toggling 1->0 processes command on CTL_pins */
593597      {
598         if (DEBUG_5110) logerror("PDC falling edge: ");
594599         /* first pdc toggles output, next toggles input */
595600         switch (m_state)
596601         {
r242479r242480
598603            /* continue */
599604            break;
600605         case CTL_STATE_NEXT_TTALK_OUTPUT:
606            if (DEBUG_5110) logerror("Switching CTL bus direction to output for Test Talk\n");
601607            m_state = CTL_STATE_TTALK_OUTPUT;
602608            return;
603609         case CTL_STATE_TTALK_OUTPUT:
610            if (DEBUG_5110) logerror("Switching CTL bus direction back to input from Test Talk\n");
604611            m_state = CTL_STATE_INPUT;
605612            return;
606613         case CTL_STATE_NEXT_OUTPUT:
614            if (DEBUG_5110) logerror("Switching CTL bus direction for Read Bit Buffer Output\n");
607615            m_state = CTL_STATE_OUTPUT;
608616            return;
609617         case CTL_STATE_OUTPUT:
618            if (DEBUG_5110) logerror("Switching CTL bus direction back to input from Read Bit Buffer Output\n");
610619            m_state = CTL_STATE_INPUT;
611620            return;
612621         }
613622         /* the only real commands we handle now are SPEAK and RESET */
614623         if (m_next_is_address)
615624         {
625            if (DEBUG_5110) logerror("Loading address nybble %02x to VSMs\n", m_CTL_pins);
616626            m_next_is_address = FALSE;
617627            m_address = m_address | ((m_CTL_pins & 0x0F)<<m_addr_bit);
618628            m_addr_bit = (m_addr_bit + 4) % 12;
r242479r242480
621631         }
622632         else
623633         {
634            if (DEBUG_5110) logerror("Got command nybble %02x: ", m_CTL_pins);
624635            switch (m_CTL_pins & 0xe) /*CTL1 - don't care*/
625636            {
626637            case TMS5110_CMD_RESET:
638               if (DEBUG_5110) logerror("RESET\n");
627639               perform_dummy_read();
628640               reset();
629641               break;
630642
631643            case TMS5110_CMD_LOAD_ADDRESS:
644               if (DEBUG_5110) logerror("LOAD ADDRESS\n");
632645               m_next_is_address = TRUE;
633646               break;
634647
635648            case TMS5110_CMD_OUTPUT:
649               if (DEBUG_5110) logerror("OUTPUT (from read-bit buffer)\n");
636650               m_state = CTL_STATE_NEXT_OUTPUT;
637651               break;
638652
639653            case TMS5110_CMD_SPKSLOW:
654               if (DEBUG_5110) logerror("SPKSLOW (todo: this isn't implemented right yet)\n");
640655               perform_dummy_read();
641656               m_speaking_now = 1;
642657               //should FIFO be cleared now ????? there is no fifo! the fifo is a lie!
643658               break;
644659
645660            case TMS5110_CMD_READ_BIT:
661               if (DEBUG_5110) logerror("READ BIT\n");
646662               if (m_schedule_dummy_read)
647663                  perform_dummy_read();
648664               else
649665               {
666                  if (DEBUG_5110) logerror("actually reading a bit now\n");
650667                  request_bits(1);
651                  //m_CTL_pins = (m_CTL_pins & 0x0E) | extract_bits(1);
652                  m_CTL_buffer <<= 1;
653                  m_CTL_buffer |= extract_bits(1);
668                  m_CTL_buffer >>= 1;
669                  m_CTL_buffer |= (extract_bits(1)<<3);
654670                  m_CTL_buffer &= 0xF;
655671               }
656672               break;
657673
658674            case TMS5110_CMD_SPEAK:
675               if (DEBUG_5110) logerror("SPEAK\n");
659676               perform_dummy_read();
660677               m_speaking_now = 1;
661678               //should FIFO be cleared now ????? there is no fifo! the fifo is a lie!
662679               break;
663680
664681            case TMS5110_CMD_READ_BRANCH:
682               if (DEBUG_5110) logerror("READ AND BRANCH\n");
665683               new_int_write(0,1,1,0);
666684               new_int_write(1,1,1,0);
667685               new_int_write(0,1,1,0);
r242479r242480
672690               break;
673691
674692            case TMS5110_CMD_TEST_TALK:
693               if (DEBUG_5110) logerror("TEST TALK\n");
675694               m_state = CTL_STATE_NEXT_TTALK_OUTPUT;
676695               break;
677696
r242479r242480
10091028
10101029/******************************************************************************
10111030
1012     tms5110_ctl_r -- read status from the sound chip
1013
1014        bit 0 = TS - Talk Status is active (high) when the VSP is processing speech data.
1031     tms5110_ctl_r -- read from the VSP (51xx) control bus
1032        The CTL bus can be in three states:
1033        1. Test talk output:
1034            bit 0 = TS - Talk Status is active (high) when the VSP is processing speech data.
10151035                Talk Status goes active at the initiation of a SPEAK command.
10161036                It goes inactive (low) when the stop code (Energy=1111) is processed, or
10171037                immediately(?????? not TMS5110) by a RESET command.
1018        TMS5110 datasheets mention this is only available as a result of executing
1019                TEST TALK command.
1038            other bits may be open bus
1039        2. 'read bit' buffer contents output:
1040            bits 0-3 = buffer contents
1041        3. Input 'open bus' state:
1042            bits 0-3 = high-z
10201043
1021                FIXME: data read not implemented, CTL1 only available after TALK command
1022
10231044******************************************************************************/
10241045
10251046READ8_MEMBER( tms5110_device::ctl_r )
r242479r242480
10281049   m_stream->update();
10291050   if (m_state == CTL_STATE_TTALK_OUTPUT)
10301051   {
1031      //if (DEBUG_5110) logerror("Status read (status=%2d)\n", m_talk_status);
1052      if (DEBUG_5110) logerror("Status read while outputting Test Talk (status=%2d)\n", m_talk_status);
10321053      return (m_talk_status << 0); /*CTL1 = still talking ? */
10331054   }
10341055   else if (m_state == CTL_STATE_OUTPUT)
10351056   {
1036      //if (DEBUG_5110) logerror("Status read (status=%2d)\n", m_talk_status);
1057      if (DEBUG_5110) logerror("Status read while outputting buffer (buffer=%2d)\n", m_CTL_buffer);
10371058      return (m_CTL_buffer);
10381059   }
1039   else
1060   else // we're reading with the bus in input mode! just return the last thing written to the bus
10401061   {
1041      //if (DEBUG_5110) logerror("Status read (not in output mode)\n");
1042      return (0);
1062      if (DEBUG_5110) logerror("Status read (not in output mode), returning %02x\n", m_CTL_pins);
1063      return (m_CTL_pins);
10431064   }
10441065}
10451066
r242479r242480
11281149/******************************************************************************
11291150
11301151     tms5110_set_frequency -- adjusts the playback frequency
1152    TODO: kill this function; we should be adjusting the tms51xx device clock itself,
1153    not setting it here!
11311154
11321155******************************************************************************/
11331156
r242479r242480
11361159   m_stream->set_sample_rate(frequency / 80);
11371160}
11381161
1162
1163
1164/* from here on in this file is a VSM 'Emulator' circuit used by bagman and ad2083 */
1165
11391166/*
11401167 *
11411168 * General Interface design (Bagman)
trunk/src/mess/drivers/tispeak.c
r242479r242480
99#include "emu.h"
1010#include "cpu/tms0980/tms0980.h"
1111#include "sound/tms5110.h"
12#include "machine/tms6100.h"
1213
1314#include "tispeak.lh"
1415
r242479r242480
256257static MACHINE_CONFIG_START( tispeak, tispeak_state )
257258
258259   /* basic machine hardware */
259   MCFG_CPU_ADD("maincpu", TMS0270, MASTER_CLOCK)
260   MCFG_CPU_ADD("maincpu", TMS0270, XTAL_640kHz/2)
260261   MCFG_TMS1XXX_READ_K_CB(READ8(tispeak_state, read_k))
261262   MCFG_TMS1XXX_WRITE_O_CB(WRITE16(tispeak_state, write_o))
262263   MCFG_TMS1XXX_WRITE_R_CB(WRITE16(tispeak_state, write_r))
r242479r242480
271272   /* no video! */
272273
273274   /* sound hardware */
275   MCFG_DEVICE_ADD("tms6100", TMS6100, 0)
276
274277   MCFG_SPEAKER_STANDARD_MONO("mono")
275278   MCFG_SOUND_ADD("tms5100", TMS5100, XTAL_640kHz)
279   MCFG_TMS5110_M0_CB(DEVWRITELINE("tms6100", tms6100_device, tms6100_m0_w))
280   MCFG_TMS5110_M1_CB(DEVWRITELINE("tms6100", tms6100_device, tms6100_m1_w))
281   MCFG_TMS5110_ADDR_CB(DEVWRITE8("tms6100", tms6100_device, tms6100_addr_w))
282   MCFG_TMS5110_DATA_CB(DEVREADLINE("tms6100", tms6100_device, tms6100_data_r))
283   MCFG_TMS5110_ROMCLK_CB(DEVWRITELINE("tms6100", tms6100_device, tms6100_romclock_w))
276284   MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
285   
277286MACHINE_CONFIG_END
278287
279288
r242479r242480
295304   ROM_REGION( 1246, "maincpu:opla", 0 )
296305   ROM_LOAD( "tms0270_cd2708_opla.pla", 0, 1246, BAD_DUMP CRC(e70836e2) SHA1(70e7dcdf81ae2052874fb21c504fcc06b2649f9a) ) // "
297306
298   ROM_REGION( 0x8000, "tms5100", 0 )
307   ROM_REGION( 0x8000, "tms6100", 0 )
299308   ROM_LOAD( "tmc0351.vsm", 0x0000, 0x4000, CRC(beea3373) SHA1(8b0f7586d2f12c3d4a885fdb528cf23feffa1a3b) )
300309   ROM_LOAD( "tmc0352.vsm", 0x4000, 0x4000, CRC(d51f0587) SHA1(ddaa484be1bba5fef46b481cafae517e4acaa8ed) )
301310ROM_END
r242479r242480
311320   ROM_REGION( 1246, "maincpu:opla", 0 )
312321   ROM_LOAD( "tms0270_cd2708_opla.pla", 0, 1246, BAD_DUMP CRC(e70836e2) SHA1(70e7dcdf81ae2052874fb21c504fcc06b2649f9a) ) // "
313322
314   ROM_REGION( 0x8000, "tms5100", 0 )
323   ROM_REGION( 0x8000, "tms6100", 0 )
315324   ROM_LOAD( "cd2392.vsm", 0x0000, 0x4000, CRC(4ed2e920) SHA1(8896f29e25126c1e4d9a47c9a325b35dddecc61f) )
316325   ROM_LOAD( "cd2393.vsm", 0x4000, 0x4000, CRC(571d5b5a) SHA1(83284755d9b77267d320b5b87fdc39f352433715) )
317326ROM_END


Previous 199869 Revisions Next


© 1997-2024 The MAME Team