trunk/src/emu/cpu/arcompact/arcompactdasm_ops.c
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| 898 | 898 | |
| 899 | 899 | |
| 900 | 900 | |
| 901 | int arcompact_handle04_2a_dasm(DASM_OPS_32) // Load FROM Auxiliary register TO register |
| 902 | { |
| 903 | |
| 904 | // pp F |
| 905 | // 0010 0bbb 0010 1010 0BBB CCCC CCRR RRRR |
| 906 | // 0010 0bbb 0010 1010 0BBB 1111 10RR RRRR |
| 907 | // 0010 0bbb 0110 1010 0BBB uuuu uu00 0000 |
| 908 | // 0010 0bbb 1010 1010 0BBB ssss ssSS SSSS |
| 909 | |
| 910 | |
| 911 | int size = 4; |
| 912 | UINT32 limm = 0; |
| 913 | int got_limm = 0; |
| 914 | |
| 915 | int p = (op & 0x00c00000) >> 22; op &= ~0x00c00000; |
| 916 | COMMON32_GET_breg; |
| 917 | int F = (op & 0x00008000) >> 15; op &= ~0x00008000; // must be 0 |
| 918 | |
| 919 | output += sprintf( output, "LR"); |
| 920 | if (F) output += sprintf( output, ".<F set, illegal>"); |
| 921 | // output += sprintf( output, " p(%d)", p); |
| 922 | |
| 923 | |
| 924 | |
| 925 | if (breg == LIMM_REG) |
| 926 | { |
| 927 | output += sprintf( output, "<no dest>" ); // illegal encoding? |
| 928 | } |
| 929 | else |
| 930 | { |
| 931 | output += sprintf(output, " %s, ", regnames[breg]); |
| 932 | } |
| 933 | |
| 934 | |
| 935 | |
| 936 | if (p == 0) |
| 937 | { |
| 938 | |
| 939 | int C = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0; |
| 940 | int res = (op & 0x0000003f) >> 0; op &= ~0x0000003f; |
| 941 | |
| 942 | if (C == LIMM_REG) |
| 943 | { |
| 944 | if (!got_limm) |
| 945 | { |
| 946 | GET_LIMM_32; |
| 947 | size = 8; |
| 948 | } |
| 949 | |
| 950 | output += sprintf( output, "(%08x) ", limm ); |
| 951 | |
| 952 | } |
| 953 | else |
| 954 | { |
| 955 | output += sprintf( output, "C(%s) ", regnames[C]); |
| 956 | } |
| 957 | |
| 958 | if (res) output += sprintf( output, "reserved(%02x) ", res ); |
| 959 | } |
| 960 | else if (p == 1) |
| 961 | { |
| 962 | int U = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0; |
| 963 | int res = (op & 0x0000003f) >> 0; op &= ~0x0000003f; |
| 964 | |
| 965 | output += sprintf( output, "U(%02x) ", U ); |
| 966 | |
| 967 | if (res) output += sprintf( output, "reserved(%02x) ", res ); |
| 968 | } |
| 969 | else if (p == 2) |
| 970 | { |
| 971 | COMMON32_GET_s12; |
| 972 | |
| 973 | output += sprintf( output, "S(%03x)", S); |
| 974 | |
| 975 | } |
| 976 | else if (p == 3) |
| 977 | { |
| 978 | output += sprintf( output, " <mode 3, illegal>"); |
| 979 | } |
| 980 | |
| 981 | return size; |
| 982 | } |
| 983 | |
| 984 | int arcompact_handle04_2b_dasm(DASM_OPS_32) // Store TO Auxiliary register FROM register |
| 985 | { |
| 986 | // code at ~ 40073DFE in leapster bios is manually setting up a loop this way |
| 987 | // rather than using the lPcc opcode |
| 988 | |
| 989 | int size = 4; |
| 990 | UINT32 limm = 0; |
| 991 | int got_limm = 0; |
| 992 | |
| 993 | int p = (op & 0x00c00000) >> 22; op &= ~0x00c00000; |
| 994 | COMMON32_GET_breg; |
| 995 | int F = (op & 0x00008000) >> 15; op &= ~0x00008000; |
| 996 | |
| 997 | output += sprintf( output, "SR"); |
| 998 | if (F) output += sprintf( output, ".<F set, illegal>"); |
| 999 | // output += sprintf( output, " p(%d)", p); |
| 1000 | |
| 1001 | |
| 1002 | |
| 1003 | if (breg == LIMM_REG) |
| 1004 | { |
| 1005 | GET_LIMM_32; |
| 1006 | size = 8; |
| 1007 | got_limm = 1; |
| 1008 | output += sprintf( output, " %08x -> ", limm ); |
| 1009 | |
| 1010 | } |
| 1011 | else |
| 1012 | { |
| 1013 | output += sprintf(output, " %s -> ", regnames[breg]); |
| 1014 | } |
| 1015 | |
| 1016 | |
| 1017 | |
| 1018 | if (p == 0) |
| 1019 | { |
| 1020 | |
| 1021 | int C = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0; |
| 1022 | int res = (op & 0x0000003f) >> 0; op &= ~0x0000003f; |
| 1023 | |
| 1024 | if (C == LIMM_REG) |
| 1025 | { |
| 1026 | if (!got_limm) |
| 1027 | { |
| 1028 | GET_LIMM_32; |
| 1029 | size = 8; |
| 1030 | } |
| 1031 | |
| 1032 | output += sprintf( output, "[%08x]", limm ); |
| 1033 | |
| 1034 | } |
| 1035 | else |
| 1036 | { |
| 1037 | output += sprintf( output, "[%s]", regnames[C]); |
| 1038 | |
| 1039 | |
| 1040 | } |
| 1041 | |
| 1042 | if (res) output += sprintf( output, " (reserved %02x) ", res ); |
| 1043 | |
| 1044 | |
| 1045 | } |
| 1046 | else if (p == 1) |
| 1047 | { |
| 1048 | int U = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0; |
| 1049 | int res = (op & 0x0000003f) >> 0; op &= ~0x0000003f; |
| 1050 | |
| 1051 | output += sprintf( output, "[%02x]", U ); |
| 1052 | |
| 1053 | if (res) output += sprintf( output, " (reserved %02x) ", res ); |
| 1054 | |
| 1055 | |
| 1056 | } |
| 1057 | else if (p == 2) |
| 1058 | { |
| 1059 | COMMON32_GET_s12; |
| 1060 | |
| 1061 | output += sprintf( output, "[%03x]", S); |
| 1062 | |
| 1063 | } |
| 1064 | else if (p == 3) |
| 1065 | { |
| 1066 | output += sprintf( output, " <mode 3, illegal>"); |
| 1067 | } |
| 1068 | |
| 1069 | return size;} |
| 1070 | |
| 1071 | |
| 901 | 1072 | int arcompact_handle04_29_dasm(DASM_OPS_32) { print("FLAG (%08x)", op); return 4;} |
| 902 | | int arcompact_handle04_2a_dasm(DASM_OPS_32) { print("LR (%08x)", op); return 4;} |
| 903 | | int arcompact_handle04_2b_dasm(DASM_OPS_32) { print("SR (%08x)", op); return 4;} |
| 904 | 1073 | |
| 905 | 1074 | |
| 906 | 1075 | int arcompact_handle04_2f_helper_dasm(DASM_OPS_32, const char* optext) |
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| 1524 | 1693 | |
| 1525 | 1694 | // op bits remaining for 0x18_xx subgroups 0x071f |
| 1526 | 1695 | |
| 1527 | | int arcompact_handle18_00_dasm(DASM_OPS_16) |
| 1696 | int arcompact_handle18_0x_helper_dasm(DASM_OPS_16, const char* optext, int st) |
| 1528 | 1697 | { |
| 1529 | | print("LD_S (SP) (%04x)", op); |
| 1698 | int breg, u; |
| 1699 | |
| 1700 | COMMON16_GET_breg; |
| 1701 | COMMON16_GET_u5; |
| 1702 | |
| 1703 | REG_16BIT_RANGE(breg); |
| 1704 | |
| 1705 | output += sprintf( output, "%s %s ", optext, regnames[breg]); |
| 1706 | if (st==1) output += sprintf( output, "-> "); |
| 1707 | else output += sprintf( output, "<- "); |
| 1708 | output += sprintf( output, "[SP, 0x%02x]", u*4); |
| 1709 | |
| 1530 | 1710 | return 2; |
| 1531 | 1711 | } |
| 1532 | 1712 | |
| 1713 | int arcompact_handle18_00_dasm(DASM_OPS_16) |
| 1714 | { |
| 1715 | return arcompact_handle18_0x_helper_dasm(DASM_PARAMS, "LD_S", 0); |
| 1716 | } |
| 1717 | |
| 1533 | 1718 | int arcompact_handle18_01_dasm(DASM_OPS_16) |
| 1534 | 1719 | { |
| 1535 | | print("LDB_S (SP) (%04x)", op); |
| 1536 | | return 2; |
| 1720 | return arcompact_handle18_0x_helper_dasm(DASM_PARAMS, "LDB_S", 0); |
| 1537 | 1721 | } |
| 1538 | 1722 | |
| 1539 | 1723 | int arcompact_handle18_02_dasm(DASM_OPS_16) |
| 1540 | 1724 | { |
| 1541 | | print("ST_S (SP) (%04x)", op); |
| 1542 | | return 2; |
| 1725 | return arcompact_handle18_0x_helper_dasm(DASM_PARAMS, "ST_S", 1); |
| 1543 | 1726 | } |
| 1544 | 1727 | |
| 1545 | 1728 | int arcompact_handle18_03_dasm(DASM_OPS_16) |
| 1546 | 1729 | { |
| 1547 | | print("STB_S (SP) (%04x)", op); |
| 1548 | | return 2; |
| 1730 | return arcompact_handle18_0x_helper_dasm(DASM_PARAMS, "STB_S", 1); |
| 1549 | 1731 | } |
| 1550 | 1732 | |
| 1551 | 1733 | int arcompact_handle18_04_dasm(DASM_OPS_16) |
| 1552 | 1734 | { |
| 1553 | | print("ADD_S (SP) (%04x)", op); |
| 1554 | | return 2; |
| 1735 | return arcompact_handle18_0x_helper_dasm(DASM_PARAMS, "ADD_S", 1); // check format |
| 1555 | 1736 | } |
| 1556 | 1737 | |
| 1557 | 1738 | // op bits remaining for 0x18_05_xx subgroups 0x001f |
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| 1560 | 1741 | int u = op & 0x001f; |
| 1561 | 1742 | op &= ~0x001f; // all bits now used |
| 1562 | 1743 | |
| 1563 | | print("ADD_S %02x (SP)", u); |
| 1744 | print("ADD_S SP, SP, %02x", u*4); |
| 1564 | 1745 | return 2; |
| 1565 | 1746 | |
| 1566 | 1747 | } |
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| 1570 | 1751 | int u = op & 0x001f; |
| 1571 | 1752 | op &= ~0x001f; // all bits now used |
| 1572 | 1753 | |
| 1573 | | print("SUB_S %02x (SP)", u); |
| 1754 | print("SUB_S SP, SP, %02x", u*4); |
| 1574 | 1755 | return 2; |
| 1575 | 1756 | } |
| 1576 | 1757 | |