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r33932 Wednesday 17th December, 2014 at 12:41:07 UTC by David Haywood
arcompact: dasm of the zero overhead loop instructions (nw)
[src/emu/cpu/arcompact]arcompactdasm_dispatch.c arcompactdasm_ops.c

trunk/src/emu/cpu/arcompact/arcompactdasm_dispatch.c
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663663{
664664   int size = 2;
665665   // General Register Instructions (16-bit)
666   // 01111 bbb ccc iiiii
666   // 0111 1bbb ccci iiii
667667   UINT8 subinstr = (op & 0x01f) >> 0;
668668   op &= ~0x001f;
669669
trunk/src/emu/cpu/arcompact/arcompactdasm_ops.c
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212212   int B_temp = (op & 0x00007000) >> 12; op &= ~0x00007000; \
213213   int breg = b_temp | (B_temp << 3); \
214214
215#define COMMON32_GET_s12 \
216      int S_temp = (op & 0x0000003f) >> 0; op &= ~0x0000003f; \
217      int s_temp = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0; \
218      int S = s_temp | (S_temp<<6); \
219
220#define COMMON32_GET_CONDITION \
221      UINT8 condition = op & 0x0000001f;  op &= ~0x0000001f;
222
223
215224#define COMMON16_GET_breg \
216225   breg =  ((op & 0x0700) >>8); \
217226   op &= ~0x0700; \
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272281   address |= ((op & 0x0000ffc0) >> 6) << 10;
273282   if (address & 0x800000) address = -0x800000 + (address & 0x7fffff);
274283   int n = (op & 0x00000020) >> 5; op &= ~0x00000020;
275   UINT8 condition = op & 0x0000001f;
284   COMMON32_GET_CONDITION
276285
277286   output  += sprintf( output, "B%s(%s) %08x", delaybit[n], conditions[condition], PC_ALIGNED32 + (address * 2));
278287   return size;
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307316   if (address & 0x800000) address = -0x800000 + (address&0x7fffff);   
308317   int n = (op & 0x00000020) >> 5; op &= ~0x00000020;
309318
310   UINT8 condition = op & 0x0000001f;
319   COMMON32_GET_CONDITION
311320
312321   output  += sprintf( output, "BL%s(%s) %08x", delaybit[n], conditions[condition], PC_ALIGNED32 + (address *2) );
313322   return size;
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629638   }
630639   else if (p == 2)
631640   {
632      int S = (op & 0x00000fff) >> 0; op &= ~0x00000fff;
641      COMMON32_GET_s12;
642
633643      output  += sprintf( output, "S(%02x)", S);
634644
635645   }
636646   else if (p == 3)
637647   {
638648      int M = (op & 0x00000020) >> 5; op &= ~0x00000020;
639      int Q = (op & 0x0000001f) >> 0; op &= ~0x0000001f;
640   
649      COMMON32_GET_CONDITION   
641650
642651      output  += sprintf( output, " M(%d)", M);
643      output  += sprintf( output, " Cond<%s> ", conditions[Q]);
652      output  += sprintf( output, " Cond<%s> ", conditions[condition]);
644653
645654      if (M == 0)
646655      {
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851860
852861
853862
854int arcompact_handle04_28_dasm(DASM_OPS_32)  { print("LPcc (%08x)", op); return 4;}
863int arcompact_handle04_28_dasm(DASM_OPS_32) // LPcc (loop setup)
864{
865   COMMON32_GET_breg; // breg is reserved
866   int p = (op & 0x00c00000) >> 22; op &= ~0x00c00000;
867
868   if (p == 0x00)
869   {
870      print("<illegal LPcc, p = 0x00)");
871   }
872   else if (p == 0x01)
873   {
874      print("<illegal LPcc, p = 0x01)");
875   }
876   else if (p == 0x02) // Loop unconditional
877   { // 0010 0RRR 1010 1000 0RRR ssss ssSS SSSS
878      COMMON32_GET_s12
879      if (S & 0x800) S = -0x800 + (S&0x7ff);
880
881      output += sprintf(output, "LP (start %08x, end %08x)", pc + 4, pc + S*2);
882   }
883   else if (p == 0x03) // Loop conditional
884   { // 0010 0RRR 1110 1000 0RRR uuuu uu1Q QQQQ
885      int u = (op & 0x00000fc0)>>6;
886      COMMON32_GET_CONDITION
887      output += sprintf(output, "LP<%s> (start %08x, end %08x)", conditions[condition], pc + 4, pc + u*2);
888
889      int unused = (op & 0x00000020)>>5;
890      if (unused==0)    output += sprintf(output, "(unused bit not set)");
891
892   }
893
894   if (breg) output += sprintf(output, "(reseved B bits set %02x)", breg);
895
896   return 4;
897}
898
899
900
855901int arcompact_handle04_29_dasm(DASM_OPS_32)  { print("FLAG (%08x)", op); return 4;}
856902int arcompact_handle04_2a_dasm(DASM_OPS_32)  { print("LR (%08x)", op); return 4;}
857903int arcompact_handle04_2b_dasm(DASM_OPS_32)  { print("SR (%08x)", op); return 4;}
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871917   output  += sprintf( output, "%s", flagbit[F]);
872918//   output  += sprintf( output, " p(%d)", p);
873919   
874   
875   output += sprintf(output, " %s, ", regnames[breg]);
920   if (breg == LIMM_REG)
921   {
922      output += sprintf(output, " <no dst>, ");
923      // if using the 'EX' opcode this is illegal
924   }
925   else
926   {
927      output += sprintf(output, " %s, ", regnames[breg]);
928   }
876929
877
878930   if (p == 0)
879931   {
880932      int C = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0;
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943995int arcompact_handle04_3x_helper_dasm(DASM_OPS_32, int dsize, int extend)
944996{
945997   int size = 4;
946   UINT32 limm;
998   UINT32 limm=0;
947999   int got_limm = 0;
9481000
9491001   output += sprintf(output, "LD");
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13411393
13421394int arcompact_handle0f_0c_dasm(DASM_OPS_16)  { print("MUL64_S mulres <- b * c  (%08x)", op); return 2;} // special
13431395int arcompact_handle0f_1e_dasm(DASM_OPS_16)  { print("TRAP_S (%08x)", op); return 2;} // special
1344int arcompact_handle0f_1f_dasm(DASM_OPS_16)  { print("BRK_S (%08x)", op); return 2;} // special
13451396
1397int arcompact_handle0f_1f_dasm(DASM_OPS_16)  // special
1398{
1399   int bc = (op & 0x07e0)>>5; op &= ~0x07e0;
13461400
1401   if (bc == 0x003f)
1402   {
1403      print("BRK_S");
1404   }
1405   else
1406   {
1407      print("<illegal BRK_S>");
1408   }
1409   return 2;
1410}
1411
1412
13471413int arcompact_handle_ld_helper_dasm(DASM_OPS_16, const char* optext, int shift, int swap)
13481414{
13491415   int breg, creg, u;


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