trunk/src/emu/cpu/arcompact/arcompactdasm_ops.c
| r242443 | r242444 | |
| 212 | 212 | int B_temp = (op & 0x00007000) >> 12; op &= ~0x00007000; \ |
| 213 | 213 | int breg = b_temp | (B_temp << 3); \ |
| 214 | 214 | |
| 215 | #define COMMON32_GET_s12 \ |
| 216 | int S_temp = (op & 0x0000003f) >> 0; op &= ~0x0000003f; \ |
| 217 | int s_temp = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0; \ |
| 218 | int S = s_temp | (S_temp<<6); \ |
| 219 | |
| 220 | #define COMMON32_GET_CONDITION \ |
| 221 | UINT8 condition = op & 0x0000001f; op &= ~0x0000001f; |
| 222 | |
| 223 | |
| 215 | 224 | #define COMMON16_GET_breg \ |
| 216 | 225 | breg = ((op & 0x0700) >>8); \ |
| 217 | 226 | op &= ~0x0700; \ |
| r242443 | r242444 | |
| 272 | 281 | address |= ((op & 0x0000ffc0) >> 6) << 10; |
| 273 | 282 | if (address & 0x800000) address = -0x800000 + (address & 0x7fffff); |
| 274 | 283 | int n = (op & 0x00000020) >> 5; op &= ~0x00000020; |
| 275 | | UINT8 condition = op & 0x0000001f; |
| 284 | COMMON32_GET_CONDITION |
| 276 | 285 | |
| 277 | 286 | output += sprintf( output, "B%s(%s) %08x", delaybit[n], conditions[condition], PC_ALIGNED32 + (address * 2)); |
| 278 | 287 | return size; |
| r242443 | r242444 | |
| 307 | 316 | if (address & 0x800000) address = -0x800000 + (address&0x7fffff); |
| 308 | 317 | int n = (op & 0x00000020) >> 5; op &= ~0x00000020; |
| 309 | 318 | |
| 310 | | UINT8 condition = op & 0x0000001f; |
| 319 | COMMON32_GET_CONDITION |
| 311 | 320 | |
| 312 | 321 | output += sprintf( output, "BL%s(%s) %08x", delaybit[n], conditions[condition], PC_ALIGNED32 + (address *2) ); |
| 313 | 322 | return size; |
| r242443 | r242444 | |
| 629 | 638 | } |
| 630 | 639 | else if (p == 2) |
| 631 | 640 | { |
| 632 | | int S = (op & 0x00000fff) >> 0; op &= ~0x00000fff; |
| 641 | COMMON32_GET_s12; |
| 642 | |
| 633 | 643 | output += sprintf( output, "S(%02x)", S); |
| 634 | 644 | |
| 635 | 645 | } |
| 636 | 646 | else if (p == 3) |
| 637 | 647 | { |
| 638 | 648 | int M = (op & 0x00000020) >> 5; op &= ~0x00000020; |
| 639 | | int Q = (op & 0x0000001f) >> 0; op &= ~0x0000001f; |
| 640 | | |
| 649 | COMMON32_GET_CONDITION |
| 641 | 650 | |
| 642 | 651 | output += sprintf( output, " M(%d)", M); |
| 643 | | output += sprintf( output, " Cond<%s> ", conditions[Q]); |
| 652 | output += sprintf( output, " Cond<%s> ", conditions[condition]); |
| 644 | 653 | |
| 645 | 654 | if (M == 0) |
| 646 | 655 | { |
| r242443 | r242444 | |
| 851 | 860 | |
| 852 | 861 | |
| 853 | 862 | |
| 854 | | int arcompact_handle04_28_dasm(DASM_OPS_32) { print("LPcc (%08x)", op); return 4;} |
| 863 | int arcompact_handle04_28_dasm(DASM_OPS_32) // LPcc (loop setup) |
| 864 | { |
| 865 | COMMON32_GET_breg; // breg is reserved |
| 866 | int p = (op & 0x00c00000) >> 22; op &= ~0x00c00000; |
| 867 | |
| 868 | if (p == 0x00) |
| 869 | { |
| 870 | print("<illegal LPcc, p = 0x00)"); |
| 871 | } |
| 872 | else if (p == 0x01) |
| 873 | { |
| 874 | print("<illegal LPcc, p = 0x01)"); |
| 875 | } |
| 876 | else if (p == 0x02) // Loop unconditional |
| 877 | { // 0010 0RRR 1010 1000 0RRR ssss ssSS SSSS |
| 878 | COMMON32_GET_s12 |
| 879 | if (S & 0x800) S = -0x800 + (S&0x7ff); |
| 880 | |
| 881 | output += sprintf(output, "LP (start %08x, end %08x)", pc + 4, pc + S*2); |
| 882 | } |
| 883 | else if (p == 0x03) // Loop conditional |
| 884 | { // 0010 0RRR 1110 1000 0RRR uuuu uu1Q QQQQ |
| 885 | int u = (op & 0x00000fc0)>>6; |
| 886 | COMMON32_GET_CONDITION |
| 887 | output += sprintf(output, "LP<%s> (start %08x, end %08x)", conditions[condition], pc + 4, pc + u*2); |
| 888 | |
| 889 | int unused = (op & 0x00000020)>>5; |
| 890 | if (unused==0) output += sprintf(output, "(unused bit not set)"); |
| 891 | |
| 892 | } |
| 893 | |
| 894 | if (breg) output += sprintf(output, "(reseved B bits set %02x)", breg); |
| 895 | |
| 896 | return 4; |
| 897 | } |
| 898 | |
| 899 | |
| 900 | |
| 855 | 901 | int arcompact_handle04_29_dasm(DASM_OPS_32) { print("FLAG (%08x)", op); return 4;} |
| 856 | 902 | int arcompact_handle04_2a_dasm(DASM_OPS_32) { print("LR (%08x)", op); return 4;} |
| 857 | 903 | int arcompact_handle04_2b_dasm(DASM_OPS_32) { print("SR (%08x)", op); return 4;} |
| r242443 | r242444 | |
| 871 | 917 | output += sprintf( output, "%s", flagbit[F]); |
| 872 | 918 | // output += sprintf( output, " p(%d)", p); |
| 873 | 919 | |
| 874 | | |
| 875 | | output += sprintf(output, " %s, ", regnames[breg]); |
| 920 | if (breg == LIMM_REG) |
| 921 | { |
| 922 | output += sprintf(output, " <no dst>, "); |
| 923 | // if using the 'EX' opcode this is illegal |
| 924 | } |
| 925 | else |
| 926 | { |
| 927 | output += sprintf(output, " %s, ", regnames[breg]); |
| 928 | } |
| 876 | 929 | |
| 877 | | |
| 878 | 930 | if (p == 0) |
| 879 | 931 | { |
| 880 | 932 | int C = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0; |
| r242443 | r242444 | |
| 943 | 995 | int arcompact_handle04_3x_helper_dasm(DASM_OPS_32, int dsize, int extend) |
| 944 | 996 | { |
| 945 | 997 | int size = 4; |
| 946 | | UINT32 limm; |
| 998 | UINT32 limm=0; |
| 947 | 999 | int got_limm = 0; |
| 948 | 1000 | |
| 949 | 1001 | output += sprintf(output, "LD"); |
| r242443 | r242444 | |
| 1341 | 1393 | |
| 1342 | 1394 | int arcompact_handle0f_0c_dasm(DASM_OPS_16) { print("MUL64_S mulres <- b * c (%08x)", op); return 2;} // special |
| 1343 | 1395 | int arcompact_handle0f_1e_dasm(DASM_OPS_16) { print("TRAP_S (%08x)", op); return 2;} // special |
| 1344 | | int arcompact_handle0f_1f_dasm(DASM_OPS_16) { print("BRK_S (%08x)", op); return 2;} // special |
| 1345 | 1396 | |
| 1397 | int arcompact_handle0f_1f_dasm(DASM_OPS_16) // special |
| 1398 | { |
| 1399 | int bc = (op & 0x07e0)>>5; op &= ~0x07e0; |
| 1346 | 1400 | |
| 1401 | if (bc == 0x003f) |
| 1402 | { |
| 1403 | print("BRK_S"); |
| 1404 | } |
| 1405 | else |
| 1406 | { |
| 1407 | print("<illegal BRK_S>"); |
| 1408 | } |
| 1409 | return 2; |
| 1410 | } |
| 1411 | |
| 1412 | |
| 1347 | 1413 | int arcompact_handle_ld_helper_dasm(DASM_OPS_16, const char* optext, int shift, int swap) |
| 1348 | 1414 | { |
| 1349 | 1415 | int breg, creg, u; |